diff --git a/.gitignore b/.gitignore
index afaddb753e728167a88813968bcf00a3303871cd..19e26994a8d0a3e11cf72f2337176a5d70b3c673 100644
--- a/.gitignore
+++ b/.gitignore
@@ -22,3 +22,7 @@ docs/build
./riscof_work
./env
+
+sail_cSim
+
+spike
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index b20eb862a5dc97173182e21d746a63dab28195c3..80b38f504beb47a965e04fda986b1cf1bfaae0f4 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -35,7 +35,7 @@ deploy:
- eval "$(pyenv virtualenv-init -)"
- pyenv shell 3.6.10
- pip3 install --upgrade pip
- - pip install -U twine semver
+ - pip install -U twine semver python-gitlab
- python setup.py sdist
- python -m twine upload --username "__token__" --password $pypitoken dist/*
- python /scratch/version-extract.py
diff --git a/CHANGELOG.md b/CHANGELOG.md
index 97f5f6f649d8773d6100814695828661bdad5bd3..06918596fd385576313da466ce2a2623b9cc1a2e 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -2,6 +2,15 @@
This project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+## [1.19.0] - 2021-04-24
+- Added new rv64i and rv32i tests from arch-test repo
+- Added K_unratified tests from arch-test repo
+- Addded all relevant coverage files
+- Updated coverage support to pick local coverage files
+- Updated setup phase to dump out sail_cSim reference model
+- Updated the config.ini and model setup files
+- Updated docs
+
## [1.18.4] - 2021-01-27
- Fixed missing coverage.html during pip installation.
diff --git a/CONTRIBUTING.rst b/CONTRIBUTING.rst
index 55a292d5eb12a6867131b8331b3ae1dd9210a630..1206f8ce59d9077e8effcf168bc1faf6574b8533 100644
--- a/CONTRIBUTING.rst
+++ b/CONTRIBUTING.rst
@@ -71,6 +71,6 @@ A reminder for the maintainers on how to deploy.
Make sure all your changes are committed.
Then run::
-$ bumpversion --config-file setup.cfg patch # possible: major / minor / patch
+$ bumpversion --no-tag --config-file setup.cfg patch # possible: major / minor / patch
$ git push origin name-of-your-branch
diff --git a/MANIFEST.in b/MANIFEST.in
index 40c30dd3680bf29483e6fc4746023617bf21c8f8..851e3a48bade98fac331fdfa496b81451dc9266c 100644
--- a/MANIFEST.in
+++ b/MANIFEST.in
@@ -1,5 +1,7 @@
recursive-include riscof/suite *.S *.h
+recursive-include riscof/coverage *
+
recursive-include riscof/Templates *
recursive-include riscof/framework *.yaml
diff --git a/README.rst b/README.rst
index 43cd073af12a526e3440c798256bc0005376d845..2e7225da9ecd584eafd33fcb03eb0016f911c3d3 100644
--- a/README.rst
+++ b/README.rst
@@ -1,10 +1,9 @@
RISCOF
===========
-**RISCOF** is a RISC-V Compliance Framework.
+**RISCOF** is a RISC-V Architectural Test Framework.
LICENSE: BSD-3 Clause.
Latest documentation of RISCOF :
* `HTML `_
- * `PDF `_
diff --git a/docs/Makefile b/docs/Makefile
index eecc2cfaa513dde33a6cb30033155096bac4ad31..6f485c61d213d18fb1f09c492523adae7203a7d3 100644
--- a/docs/Makefile
+++ b/docs/Makefile
@@ -4,7 +4,7 @@
# You can set these variables from the command line.
SPHINXOPTS =
SPHINXBUILD = sphinx-build
-SPHINXPROJ = RISVComplianceFramework
+SPHINXPROJ = RISCVArchTestFramework
SOURCEDIR = source
BUILDDIR = build
@@ -17,4 +17,4 @@ help:
# Catch-all target: route all unknown targets to Sphinx using the new
# "make mode" option. $(O) is meant as a shortcut for $(SPHINXOPTS).
%: Makefile
- @$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
\ No newline at end of file
+ @$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
diff --git a/docs/requirements.txt b/docs/requirements.txt
index a1933e2f457d842a3243d5446aa5ebd4d17bd952..74f7829851cfca413b1d40755f1e59b233ed52fb 100644
--- a/docs/requirements.txt
+++ b/docs/requirements.txt
@@ -20,17 +20,17 @@ pytz==2019.1
PyYAML==5.1.1
requests==2.22.0
restructuredtext-lint==1.3.0
-ruamel.yaml==0.15.97
six==1.12.0
smmap2==2.0.5
snowballstemmer==1.2.1
-Sphinx==3.0.4
+Sphinx==3.5.3
sphinx-rtd-theme==0.4.3
sphinxcontrib-autoyaml==0.5.0
sphinxcontrib-mermaid
sphinxcontrib-websupport==1.1.2
-sphinxcontrib-bibtex
+sphinxcontrib-bibtex==1.0.0
stevedore==1.30.1
urllib3==1.25.3
twine==1.13.0
-sphinx_tabs
+sphinx_tabs==2.1.0
+m2r2==0.2.7
diff --git a/docs/source/changelog.rst b/docs/source/changelog.rst
new file mode 100644
index 0000000000000000000000000000000000000000..74cca8f1c978c846faff74aab38f995d4acbc68d
--- /dev/null
+++ b/docs/source/changelog.rst
@@ -0,0 +1,8 @@
+.. raw:: latex
+
+ \pagebreak
+
+.. _revisions:
+
+.. mdinclude:: ../../CHANGELOG.md
+
diff --git a/docs/source/conf.py b/docs/source/conf.py
index e3b7c23b5731a48431f39c147744ffd784e8279d..d4390f051c86926d3d356043ba5d6bbdaf091a33 100644
--- a/docs/source/conf.py
+++ b/docs/source/conf.py
@@ -34,9 +34,9 @@ version = get_version()
# The full version, including alpha/beta/rc tags
release = version
-#def setup(app):
-# app.add_stylesheet("custom.css")
-# app.add_css_file("_static/custom.css")
+def setup(app):
+ app.add_stylesheet("custom.css")
+ app.add_css_file("_static/custom.css")
# -- General configuration ---------------------------------------------------
@@ -57,7 +57,8 @@ extensions = [
'sphinx.ext.viewcode',
'sphinxcontrib.autoyaml',
'sphinxcontrib.bibtex',
- 'sphinx_tabs.tabs'
+ 'sphinx_tabs.tabs',
+ 'm2r2'
]
# Add any paths that contain templates here, relative to this directory.
templates_path = ['_templates']
@@ -163,7 +164,7 @@ html_show_license = True
# Output file base name for HTML help builder.
-htmlhelp_basename = 'RISCVComplianceFrameworkdoc'
+htmlhelp_basename = 'RISCVArchTestFrameworkdoc'
# -- Options for LaTeX output ------------------------------------------------
@@ -261,7 +262,7 @@ latex_elements = {
%%% Alternating Footer for two side
\fancyfoot[LO, LE]{\small \bf{Copyright \textcopyright \the\year \textbf{ } InCore Semiconductors Pvt. Ltd.}}
- %\fancyfoot[LO, LE]{\scriptsize \bf{RISCOF}}
+ %\fancyfoot[LO, LE]{\scriptsize \bf{RISCOF: RISC-V Architectural Test Framework}}
%%% page number
\fancyfoot[RO, RE]{\thepage}
@@ -303,7 +304,7 @@ latex_elements = {
\includegraphics[scale=0.2]{incore_logo.png}
\end{figure}
\vspace*{40mm} %%% * is used to give space from top
- \textbf{\Huge {RISC-V ISA Coverage}}
+ \textbf{\Huge {RISCOF: RISC-V Architectural Test Framework}}
\vspace*{40mm} %%% * is used to give space from top
@@ -374,7 +375,7 @@ latex_elements = {
# (source start file, target name, title,
# author, documentclass [howto, manual, or own class]).
latex_documents = [
- (master_doc, 'RISCVComplianceFramework.tex', 'RISC-V Compliance Framework Documentation',
+ (master_doc, 'RISCVArchTestFramework.tex', 'RISC-V Architectural Test Framework Documentation',
'InCore Semiconductors Pvt. Ltd.', 'manual'),
]
@@ -387,7 +388,7 @@ latex_show_pagerefs = True
# One entry per manual page. List of tuples
# (source start file, name, description, authors, manual section).
man_pages = [
- (master_doc, 'risvcomplianceframework', 'RISCV Compliance Framework Documentation',
+ (master_doc, 'risvarchtestframework', 'RISCV Architectural Test Framework Documentation',
[author], 1)
]
@@ -398,8 +399,8 @@ man_pages = [
# (source start file, target name, title, author,
# dir menu entry, description, category)
texinfo_documents = [
- (master_doc, 'RISCVComplianceFramework', 'RISC-V Compliance Framework Documentation',
- author, 'RISCVComplianceFramework', 'One line description of project.',
+ (master_doc, 'RISCVArchTestFramework', 'RISC-V Architectural Test Framework Documentation',
+ author, 'RISCVArchTestFramework', 'One line description of project.',
'Miscellaneous'),
]
diff --git a/docs/source/index.rst b/docs/source/index.rst
index 30be28050cf86eb97c3a15bd9791acafc548121f..4350fd69ac390f0f6a9267ccc9ebbecfffd9341f 100644
--- a/docs/source/index.rst
+++ b/docs/source/index.rst
@@ -18,3 +18,4 @@ Welcome to RISCOF
testformat
RISCV-Config [External]
code-doc
+ changelog
diff --git a/docs/source/installation.rst b/docs/source/installation.rst
index 7a076c2947e7bddfbc2605425bf08c4685e54733..c3fa2ce3a329d06c4bca9dacd155aa8a8445d002 100644
--- a/docs/source/installation.rst
+++ b/docs/source/installation.rst
@@ -1,9 +1,9 @@
.. See LICENSE.incore for details
-.. _quickstart:
-
.. highlight:: shell
+.. _quickstart:
+
==========
Quickstart
==========
@@ -175,10 +175,12 @@ Once you have installed RISCOF you can execute ``riscof --help`` to print the he
.. code-block:: bash
+
usage: riscof [-h] [--version] [--verbose]
- {gendb,setup,validateyaml,run,testlist} ...
+ {coverage,gendb,setup,validateyaml,run,testlist} ...
- This program checks compliance for a DUT.
+ RISCOF is a framework used to run the Architectural Tests on a DUT and check
+ compatibility with the RISC-V ISA
optional arguments:
--verbose [Default=info]
@@ -188,15 +190,27 @@ Once you have installed RISCOF you can execute ``riscof --help`` to print the he
Action:
The action to be performed by riscof.
- {gendb,setup,validateyaml,run,testlist}
+ {coverage,gendb,setup,validateyaml,run,testlist}
List of actions supported by riscof.
+ coverage Generate Coverage Report for the given YAML spec.
gendb Generate Database for the standard suite.
setup Initiate setup for riscof.
validateyaml Validate the Input YAMLs using riscv-config.
run Run the tests on DUT and reference and compare
signatures.
testlist Generate the test list for the given DUT and suite.
- Uses the architectural suite by default.
+ Action 'coverage'
+
+ usage: riscof coverage [-h] [--config PATH] [--cgf PATH] [--suite PATH]
+ [--no-browser]
+
+ optional arguments:
+ --cgf PATH The Path to the cgf file(s). Multiple allowed
+ --config PATH The Path to the config file. [Default=./config.ini]
+ --no-browser Do not open the browser for showing the test report.
+ --suite PATH The Path to the custom suite directory.
+ -h, --help show this help message and exit
+
Action 'gendb'
usage: riscof gendb [-h] [--suite PATH]
@@ -211,7 +225,7 @@ Once you have installed RISCOF you can execute ``riscof --help`` to print the he
optional arguments:
--dutname NAME Name of DUT plugin. [Default=spike]
- --refname NAME Name of Reference plugin. [Default=riscvOVPsim]
+ --refname NAME Name of Reference plugin. [Default=sail_cSim]
-h, --help show this help message and exit
Action 'validateyaml'
@@ -371,54 +385,85 @@ provide a quick and standard way of building the model, compiling the tests and
on the models. Along with the python plugins of each model, one would also have to provide the
`YAML` configuration files of the DUT as per the norms of ``riscv-config``. Some models might also
require special macros to be executed as prelude or post-testing. These macros can be provided to
-RISCOF as a header file: ``compliance_model.h``.
+RISCOF as a header file: ``model_test.h``.
-For the sake of this guide, we will use some of the pre-built plugins for riscof available at:
-`riscof-plugins `_. We will specifically use the
-spike_simple and sail_cSim plugins.
+For sample templates of pre-built plugins please refer to : `riscof-plugins `_.
-.. note:: If you are using `pyenv` as mentioned above, make sure to enable that environment before
- performing the following steps since we will now start using riscof.
+To make things even simpler, RISCOF generates standard pre-built templates for DUTs and Reference
+Models for the user via the ``setup`` command as shown below::
-.. code-block:: bash
-
- $ git clone https://gitlab.com/incoresemi/riscof-plugins.git
+ $ riscof setup --dutname=spike
-To create necessary environment files use the following command::
+The above command will generate the following files and directories in the current directory::
- $ riscof setup --dutname=spike_simple --refname=sail_cSim
+ ├──config.ini # configuration file for riscof
+ ├──spike/ # DUT plugin templates
+ ├── env
+ │ ├── link.ld
+ │ └── model_test.h
+ ├── riscof_spike.py
+ ├── spike_isa.yaml
+ └── spike_platform.yaml
+ ├──sail_cSim/ # reference plugin templates
+ ├── env
+ │ ├── link.ld
+ │ └── model_test.h
+ ├── __init__.py
+ └── riscof_sail_cSim.py
-The above command will generate a file named ``config.ini`` and a folder named ``spike_simple``.
-The ``config.ini`` file is used to capture specific paths of the plugins of reference and DUT model,
-along with the paths to isa and platform input YAMLs. The folder ``spike_simple`` contains
-various templates of files that would be required for compliance of any generic DUT.
-Components of this folder will be modified by the user as per the DUT spec.
-Since we are going to use pre-built plugins for this guide, we will ignore the ``spike_simple``
-folder for now.
-.. note:: For specific examples on modifications to environment files, please check the
- corresponding files for various targets available in the riscof-plugins directory.
-Based on the path you have downloaded the riscof-plugins directory, you will need to modify the
-``config.ini`` file to look similar to the following::
+The ``config.ini`` file is used to capture specific paths of the plugins of reference and DUT model,
+along with the paths to isa and platform input YAMLs. The ``config.ini`` will look something like this by default::
[RISCOF]
ReferencePlugin=sail_cSim
- ReferencePluginPath=/path/to/riscof-plugins/sail_cSim
- DUTPlugin=spike_simple
- DUTPluginPath=/path/to/riscof-plugins/spike_simple
+ ReferencePluginPath=/path/to/riscof/sail_cSim
+ DUTPlugin=spike
+ DUTPluginPath=/path/to/riscof/spike
## Example configuration for spike plugin.
- [spike_simple]
- pluginpath=/path/to/riscof-plugins/spike_simple/
- ispec=/path/to/riscof-plugins/spike_simple/spike_simple_isa.yaml
- pspec=/path/to/riscof-plugins/spike_simple/spike_simple_platform.yaml
+ [spike]
+ pluginpath=/path/to/riscof/spike/
+ ispec=/path/to/riscof/spike/spike_isa.yaml
+ pspec=/path/to/riscof/spike/spike_platform.yaml
[sail_cSim]
- pluginpath=/path/to/riscof-plugins/sail_cSim
+ pluginpath=/path/to/riscof/sail_cSim
+
+If the SAIL binaries (i.e. ``riscv_sim_RV32``) are not in your $PATH you may want to add the following to the last line of the
+above config::
+
+ PATH=
+
+
+The folder ``spike`` contains various templates of files that would be required for testing of
+any generic DUT. Components of this folder will need to be modified by the user as per the DUT spec.
+Since our DUT model in this guide is spike, you will only have to change the execute command at line 100 of
+spike/riscof_spike.py to the following:
+
+.. code-block:: python
+
+ execute += self.dut_exe + ' --log-commits --log dump --isa={0} +signature={1} +signature-granularity=4 {2};'.format(self.isa, sig_file, elf)
+
+
+.. note:: Custom DUTs can go through the various ``#TODO`` comments to figure out what changes need to be
+ made in the respective python file.
+
+The configuration of spike we will be using is available in the ``spike/spike_isa.yaml``. Modifying
+this will change the tests applicable for the DUT. For now let's leave it as is. For more
+information on creating and modifying your plugins can be found in :ref:`plugins`
+
+The ``sail_cSim`` directory holds the plugin files for the reference SAIL model. Changes to any of
+the files in this directory are typically not required (unless you know what you are doing)
+
+We are now ready to run the architectural tests on the DUT via RISCOF.
-We are now ready to run compliance via RISCOF
+.. tip:: By default RISCOF resorts to using RISC-V's SAIL C Emulator as a reference model. To generate
+ templates for a reference model add the argument '--refname myref' to the setup command above. This
+ will generate a *myref* directory containing template files for defining a reference model plugin.
+ Lookout for the #TODO in the python file for places where changes will be required.
Running RISCOF
==============
@@ -435,23 +480,22 @@ This should print the following:
.. code-block:: bash
- [INFO] : Reading configuration from: /scratch/git-repo/incoresemi/riscof-plugins/config.ini
+ [INFO] : Reading configuration from: /scratch/git-repo/incoresemi/riscof/config.ini
[INFO] : Preparing Models
[INFO] : Input-ISA file
- [INFO] : Loading input file: /scratch/git-repo/incoresemi/riscof-plugins/spike_simple/sample_isa.yaml
+ [INFO] : Loading input file: /scratch/git-repo/incoresemi/riscof/spike/sample_isa.yaml
[INFO] : Load Schema /home/neel/.pyenv/versions/3.7.0/envs/venv/lib/python3.7/site-packages/riscv_config/schemas/schema_isa.yaml
[INFO] : Initiating Validation
[INFO] : No Syntax errors in Input ISA Yaml. :)
- [INFO] : Dumping out Normalized Checked YAML: /scratch/git-repo/incoresemi/riscof-plugins/riscof_work/sample_isa_checked.yaml
+ [INFO] : Dumping out Normalized Checked YAML: /scratch/git-repo/incoresemi/riscof/riscof_work/sample_isa_checked.yaml
[INFO] : Input-Platform file
- [INFO] : Loading input file: /scratch/git-repo/incoresemi/riscof-plugins/spike_simple/sample_platform.yaml
+ [INFO] : Loading input file: /scratch/git-repo/incoresemi/riscof/spike/sample_platform.yaml
[INFO] : Load Schema /home/neel/.pyenv/versions/3.7.0/envs/venv/lib/python3.7/site-packages/riscv_config/schemas/schema_platform.yaml
[INFO] : Initiating Validation
[INFO] : No Syntax errors in Input Platform Yaml. :)
- [INFO] : Dumping out Normalized Checked YAML: /scratch/git-repo/incoresemi/riscof-plugins/riscof_work/sample_platform_checked.yaml
+ [INFO] : Dumping out Normalized Checked YAML: /scratch/git-repo/incoresemi/riscof/riscof_work/sample_platform_checked.yaml
-The next step is generate the list of tests that need to be run on the models for declaring
-compliance.
+The next step is generate the list of tests that need to be run on the models.
.. code-block:: bash
@@ -469,17 +513,17 @@ something similar to the following:
.. code-block:: yaml
suite/rv32i_m/C/C-ADD.S:
- work_dir: /scratch/git-repo/incoresemi/riscof-plugins/riscof_work/rv32i_m/C/C-ADD.S
+ work_dir: /scratch/git-repo/incoresemi/riscof/riscof_work/rv32i_m/C/C-ADD.S
macros: [TEST_CASE_1=True, XLEN=32]
isa: RV32IC
test_path: /home/neel/.pyenv/versions/3.7.0/envs/venv/lib/python3.7/site-packages/riscof/suite/rv32i_m/C/C-ADD.S
suite/rv32i_m/C/C-ADDI.S:
- work_dir: /scratch/git-repo/incoresemi/riscof-plugins/riscof_work/rv32i_m/C/C-ADDI.S
+ work_dir: /scratch/git-repo/incoresemi/riscof/riscof_work/rv32i_m/C/C-ADDI.S
macros: [TEST_CASE_1=True, XLEN=32]
isa: RV32IC
test_path: /home/neel/.pyenv/versions/3.7.0/envs/venv/lib/python3.7/site-packages/riscof/suite/rv32i_m/C/C-ADDI.S
suite/rv32i_m/C/C-ADDI16SP.S:
- work_dir: /scratch/git-repo/incoresemi/riscof-plugins/riscof_work/rv32i_m/C/C-ADDI16SP.S
+ work_dir: /scratch/git-repo/incoresemi/riscof/riscof_work/rv32i_m/C/C-ADDI16SP.S
macros: [TEST_CASE_1=True, XLEN=32]
isa: RV32IC
...
diff --git a/docs/source/intro.rst b/docs/source/intro.rst
index 0201341a2091ea65d1f6ea8e7f281fd101a763dd..dbf9769536364a9ecb6ad0d6ba98406f0c150a54 100644
--- a/docs/source/intro.rst
+++ b/docs/source/intro.rst
@@ -2,7 +2,7 @@
Introduction
############
-**RISCOF** - The RISC-V Compliance Framework is a python based framework which enables testing of a RISC-V
+**RISCOF** - The RISC-V Compatibility Framework is a python based framework which enables testing of a RISC-V
target (hard or soft implementations) against a standard RISC-V golden reference model using a suite
of RISC-V architectural assembly tests.
diff --git a/docs/source/newtest.rst b/docs/source/newtest.rst
index aefb2aeb4364a13631b3b6500cc74ee90eacc9b9..45b58784b174e184ec6069ac29752a7fbad72551 100644
--- a/docs/source/newtest.rst
+++ b/docs/source/newtest.rst
@@ -4,8 +4,8 @@
Adding New Tests
################
-This section pertains to developers who wish to add new tests to the compliance
-suite. Please follow the below steps for such contributions:
+This section pertains to developers who wish to add new tests to the architectural test suite.
+Please follow the below steps for such contributions:
1. All tests should strictly follow the test-spec format available here:
:ref:`Test Spec Format`
diff --git a/docs/source/overview.rst b/docs/source/overview.rst
index ff0b0df4be7cf63faca95eb354f1b5ced0e60d79..0f91b97823b15f543b0ea0cb966c34cb7ebb061b 100644
--- a/docs/source/overview.rst
+++ b/docs/source/overview.rst
@@ -114,7 +114,7 @@ This subsection describes at an abstract level a typical flow that will have to
authors to contribute their tests to RISCOF's architectural test suite.
A test by a contributor must always adhere to the :ref:`Test Format Spec `. The
-test can either be auto-generated using tools like `RISCV-CTG `_
+test can either be auto-generated using tools like `RISCV-CTG `_
or can be handwritten.
Once a suite or directory of tests is available, the contributor can force RISCOF to use only those
diff --git a/docs/source/plugins.rst b/docs/source/plugins.rst
index 82bfcac2f4f9bb444457d0931f00398cb9d980d1..c0aadd9549bb480ba86c3a6b7a216e2c962bb616 100644
--- a/docs/source/plugins.rst
+++ b/docs/source/plugins.rst
@@ -36,18 +36,18 @@ Generate Templates
A sample template of the plugin and all other required collateral can be generated through RISCOF
using the following command::
- $ riscof setup --refname=sail_cSim --dutname=spike_simple
+ $ riscof setup --refname=sail_cSim --dutname=spike
-.. note:: You can change the name from spike_simple to the name of your target
+.. note:: You can change the name from spike to the name of your target
-This above command should generate a spike_simple folder with the following contents:
+This above command should generate a spike folder with the following contents:
.. code-block:: bash
env # contains sample header file and linker file
- riscof_spike_simple.py # sample spike plugin for RISCOF
- spike_simple_isa.yaml # sample ISA YAML configuration file
- spike_simple_platform.yaml # sample PLATFORM YAML configuration file
+ riscof_spike.py # sample spike plugin for RISCOF
+ spike_isa.yaml # sample ISA YAML configuration file
+ spike_platform.yaml # sample PLATFORM YAML configuration file
The command will also generate a sample ``config.ini`` file with the following contents:
@@ -56,23 +56,26 @@ The command will also generate a sample ``config.ini`` file with the following c
[RISCOF]
ReferencePlugin=cSail
ReferencePluginPath=/scratch/git-repo/incoresemi/riscof/sail_cSim
- DUTPlugin=spike_simple
- DUTPluginPath=/scratch/git-repo/incoresemi/riscof/spike_simple
+ DUTPlugin=spike
+ DUTPluginPath=/scratch/git-repo/incoresemi/riscof/spike
- [spike_simple]
- pluginpath=/scratch/git-repo/incoresemi/riscof/spike_simple
- ispec=/scratch/git-repo/incoresemi/riscof/spike_simple/spike_simple_isa.yaml
- pspec=/scratch/git-repo/incoresemi/riscof/spike_simple/spike_simple_platform.yaml
+ [spike]
+ pluginpath=/scratch/git-repo/incoresemi/riscof/spike
+ ispec=/scratch/git-repo/incoresemi/riscof/spike/spike_isa.yaml
+ pspec=/scratch/git-repo/incoresemi/riscof/spike/spike_platform.yaml
+
+ [sail_cSim]
+ pluginpath=/scratch/git-repo/incoresemi/riscof/sail_cSim
The following changes need to be made:
1. Fix the paths in the ``config.ini`` to point to the folder containing the respective riscof_*.py files.
-2. The macros in the ``spike_simple/env/compliance_model.h`` can be updated based on the model. Definitions of
+2. The macros in the ``spike/env/model_test.h`` can be updated based on the model. Definitions of
the macros and their use is available in the :ref:`test_format_spec`.
3. Update the ``riscof_.py`` with respective functions as described in the following
paragraphs.
-The plugin file in the ``spike_simple`` folder: riscof_spike_simple.py is the one that needs to be
+The plugin file in the ``spike`` folder: riscof_spike.py is the one that needs to be
changed and updated for each model. As can be seen from this python file, it creates a Metaclass for the plugins
supported by the abstract base class. This class basically offers the users three basic
functions: ``initialize`` , ``build`` and ``runTests``. For each model RISCOF calls these functions in the following order:
@@ -89,11 +92,15 @@ Config.ini Syntax
The ``config.ini`` file generated using the above ``--setup`` command is used by RISCOF to locate the DUT and Reference
plugins (along with their necessary collaterals). The config file also allows you to define specific nodes/fields
-which can be used by the respective plugin. For e.g., in the default ``config.ini`` template the
-`pluginpath` variable under the `[spike_simple]` header is available to the riscof_spike_simple.py
-plugins by RISCOF. Similarly one can define more variables and prefixes here which can directly be
+which can be used by the respective model plugins. For e.g., in the default ``config.ini`` template the
+`pluginpath` variable under the `[spike]` header is available to the riscof_spike.py
+plugin via RISCOF. Similarly one can define more variables and prefixes here which can directly be
used in the plugins.
+For example, in the case of sail we can define a `PATH` variable which can point to where the C
+emulator binaries are located. This allows the plugin to directly probe which variable and use this
+as part of the execution commands.
+
The idea here is to have a single place of change which is easy rather than hard-coding the same
within the plugins.
@@ -117,6 +124,46 @@ different actions in different functions as opposed to what is outlined in this
they comply with the order of the functions being called and the signatures are generated in their
respective directories at the end of the `runTest` function.
+__init__ (self, *args, **kwargs)
+--------------------------------
+
+This is the constructor function for the pluginTemplate class. The configuration dictionary of the
+plugin, as specified in the ``config.ini``, is passed to the plugin via the kwargs argument.
+
+In this function you will also need to define the path of the model executable in the `dut_exe`
+variable as shown in line-6 below. Note, this variable can be dierctly set in the ``config.ini`` by
+setting the `PATH` variable under the model plugin's header.
+
+The `num_jobs` variable, in line-7, is used to indicate the number of parallel jobs that can be
+spawned for simulation.
+
+Finally, thise constructor will capture the paths to the plugin, the isa yaml and the platform yaml
+for further usage (as seen in lines 13-14).
+
+.. code-block:: python
+ :linenos:
+
+ def __init__(self, *args, **kwargs):
+ sclass = super().__init__(*args, **kwargs)
+
+ config = kwargs.get('config')
+
+ self.dut_exe = os.path.join(config['PATH'] if 'PATH' in config else "","spike")
+ self.num_jobs = str(config['jobs'] if 'jobs' in config else 1)
+ if config is None:
+ print("Please enter input file paths in configuration.")
+ raise SystemExit
+ else:
+ self.isa_spec = os.path.abspath(config['ispec'])
+ self.platform_spec = os.path.abspath(config['pspec'])
+ self.pluginpath=os.path.abspath(config['pluginpath'])
+
+ return sclass
+
+.. warning:: if the config is empty or if the isa and platform yamls are not available in the
+ specified paths, the above function shall generate an error and exit.
+
+
initialize (suite, workdir, env)
--------------------------------
@@ -124,60 +171,83 @@ This function is typically meant to create and initialize all necessary variable
compilation commands, elf2hex utility command, objdump command, include directories, etc.
This function provides the following arguments which can be used:
-1. `suite`: This argument holds the absolute path of the directory where the compliance suite
+1. `suite`: This argument holds the absolute path of the directory where the architectural test suite
exists.This can be used to replace the name of the file to create directories in proper order.
2. `workdir`: This argument holds the absolute path of the work directory where all the execution
and meta files/states will be dumped as part of running RISCOF.
-3. `compliance_env`: This argument holds the absolute path of the directory where all the compliance header
- files are located. This should be used to initialize the include arguments to the
+3. `archtest_env`: This argument holds the absolute path of the directory where all the
+ architectural test header files are located. This should be used to initialize the include arguments to the
compiler/assembler.
An example of this function is shown below:
.. code-block:: python
-
- def initialise(self, suite, work_dir, compliance_env):
- if shutil.which('spike') is None:
- logger.error('Please install spike to proceed further')
- sys.exit(0)
- self.work_dir = work_dir
- self.compile_cmd = 'riscv{1}-unknown-elf-gcc -march={0} \
- -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles\
- -T '+self.pluginpath+'/env/link.ld\
- -I '+self.pluginpath+'/env/\
- -I ' + compliance_env
+ :linenos:
+
+ def initialise(self, suite, work_dir, archtest_env):
+ if shutil.which(self.dut_exe) is None:
+ logger.error(self.dut_exe+' Not Found')
+ logger.error('Please install Executable for spike to proceed further')
+ sys.exit(0)
+ self.work_dir = work_dir
+
+ #TODO: The following assumes you are using the riscv-gcc toolchain. If
+ # not please change appropriately
+ self.compile_cmd = 'riscv{1}-unknown-elf-gcc -march={0} \
+ -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles\
+ -T '+self.pluginpath+'/env/link.ld\
+ -I '+self.pluginpath+'/env/\
+ -I ' + archtest_env
+
+ # set all the necessary variables like compile command, elf2hex
+ # commands, objdump cmds. etc whichever you feel necessary and required
+ # for your plugin.
+
+The `dut_exe` variable in line-2 above, is derived and set in the `__init__` function described
+earlier. This function checks if the `dut_exe` is indeed available and throws an error if not. The
+above template is used for the riscv-gnu-toolchain. If you are using an alternate or custom
+toolchain the `compile_cmd`, in line-10 above, will have to be changed appropriately.
+
+One can also choose to add moer commands like objdump, elf2hex, etc from line 202 onwards which will
+be used further during the build and run phases.
build(isa_yaml, platform_yaml)
------------------------------
RISCOF is not limited to validating only a RTL targets, but can also be used to validate
instruction set simulators (ISS) or modern day core-generators like rocket or chromite. These ISS
-and core generators have to ability to tune themselves to a specific set of options as defined in
-the standardized RISCV-CONFIG YAML. Thus the `build` phase can be used as an intermediate stage to
-build or configure not only these models/targets but also be used to build respective tool-chains.
+and core generators have the ability to tune themselves to a specific set of configurations as defined in
+the standardized RISCV-CONFIG YAML. Thus, the `build` phase can be used as an intermediate stage to
+build or configure not only these models/targets but also be used to build respective custom tool-chains that may be required.
The `build` function provides the following arguments:
-1. `isa_spec`: This argument holds the path to the ISA config YAML. This can be used to extract
+1. `isa_spec`: This argument holds the path to the validated ISA config YAML. This can be used to extract
various fields from the YAML (e.g. ISA) and configure the DUT accordingly.
-2. `platform_spec`: This argument holds the path to the PLATFORM config YAML and can be used
+2. `platform_spec`: This argument holds the path to the validated PLATFORM config YAML and can be used
similarly as above.
An example of this function for an ISS like spike is show below:
.. code-block:: python
-
- def build(self, isa_spec, platform_spec):
- ispec = utils.load_yaml(isa_yaml)['hart0']
- self.xlen = ('64' if 64 in ispec['supported_xlen'] else '32')
- self.isa = 'rv' + self.xlen
- self.compile_cmd = self.compile_cmd+' -mabi='+('lp64 ' if 64 in ispec['supported_xlen'] else 'ilp32 ')
- if "I" in ispec["ISA"]:
- self.isa += 'i'
- if "M" in ispec["ISA"]:
- self.isa += 'm'
- if "C" in ispec["ISA"]:
- self.isa += 'c'
+ :linenos:
+
+ def build(self, isa_spec, platform_spec):
+ ispec = utils.load_yaml(isa_yaml)['hart0']
+ self.xlen = ('64' if 64 in ispec['supported_xlen'] else '32')
+ self.isa = 'rv' + self.xlen
+ #TODO: The following assumes you are using the riscv-gcc toolchain. If
+ # not please change appropriately
+ self.compile_cmd = self.compile_cmd+' -mabi='+('lp64 ' if 64 in ispec['supported_xlen'] else 'ilp32 ')
+ if "I" in ispec["ISA"]:
+ self.isa += 'i'
+ if "M" in ispec["ISA"]:
+ self.isa += 'm'
+ if "C" in ispec["ISA"]:
+ self.isa += 'c'
+
+ # based on the validated isa and platform configure your simulator or
+ # build your RTL here
.. note:: For RTL targets this phase is typically empty and no actions are required. Though, one
could choose to compile the RTL in this phase if required.
@@ -204,24 +274,25 @@ performing the same commands.
.. code-block:: python
+ :linenos:
- def runTests(self, testList):
- for file in testList:
- testentry = testList[file]
- test = testentry['test_path']
- test_dir = testentry['work_dir']
+ def runTests(self, testList):
+ for file in testList:
+ testentry = testList[file]
+ test = testentry['test_path']
+ test_dir = testentry['work_dir']
- elf = 'my.elf'
- sig_file = os.path.join(test_dir, self.name[:-1] + ".signature")
+ elf = 'my.elf'
+ sig_file = os.path.join(test_dir, self.name[:-1] + ".signature")
- cmd = self.compile_cmd.format(testentry['isa'].lower(), self.xlen) + ' ' + test + ' -o ' + elf
- compile_cmd = cmd + ' -D' + " -D".join(testentry['macros'])
- logger.debug('Compiling test: ' + test)
- utils.shellCommand(compile_cmd).run(cwd=test_dir)
+ cmd = self.compile_cmd.format(testentry['isa'].lower(), self.xlen) + ' ' + test + ' -o ' + elf
+ compile_cmd = cmd + ' -D' + " -D".join(testentry['macros'])
+ logger.debug('Compiling test: ' + test)
+ utils.shellCommand(compile_cmd).run(cwd=test_dir)
- execute = spike_path + 'spike --isa={0} +signature={1} +signature-granularity=4 {2}'.format(self.isa, sig_file, elf)
- logger.debug('Executing on Spike ' + execute)
- utils.shellCommand(execute).run(cwd=test_dir)
+ execute = spike_path + 'spike --isa={0} +signature={1} +signature-granularity=4 {2}'.format(self.isa, sig_file, elf)
+ logger.debug('Executing on Spike ' + execute)
+ utils.shellCommand(execute).run(cwd=test_dir)
An example which uses the ``makeUtil`` utility is show below. Here a Makefile is first generated
where every test is a make target. the utility automatically creates the relevant targets and only
@@ -231,25 +302,32 @@ The user can choose to use a different make command by setting
the ``make.makeCommand``. More details of this utility are available at: :ref:`utils`
.. code-block:: bash
+ :linenos:
def runTests(self, testList):
make = utils.makeUtil(makefilePath=os.path.join(self.work_dir, "Makefile." + self.name[:-1]))
- make.makeCommand = 'make -j' + parallel_jobs
+ make.makeCommand = 'make -j' + self.num_jobs
for file in testList:
testentry = testList[file]
test = testentry['test_path']
test_dir = testentry['work_dir']
- elf = 'my.elf'
-
- execute = "cd "+testentry['work_dir']+";"
+ elf = 'dut.elf'
+
+ execute = "@cd "+testentry['work_dir']+";"
cmd = self.compile_cmd.format(testentry['isa'].lower(), self.xlen) + ' ' + test + ' -o ' + elf
+
+ #TODO: we are using -D to enable compile time macros. If your
+ # toolchain is not riscv-gcc you may want to change the below code
compile_cmd = cmd + ' -D' + " -D".join(testentry['macros'])
execute+=compile_cmd+";"
sig_file = os.path.join(test_dir, self.name[:-1] + ".signature")
- execute += spike_path + 'spike --isa={0} +signature={1} +signature-granularity=4 {2};'.format(self.isa, sig_file, elf)
+
+ #TODO: You will need to add any other arguments to your DUT
+ # executable if any in the quotes below
+ execute += self.dut_exe + ' --log-commits --log dump --isa={0} +signature={1} +signature-granularity=4 {2};'.format(self.isa, sig_file, elf)
make.add_target(execute)
make.execute_all(self.work_dir)
diff --git a/docs/source/quickstart.rst b/docs/source/quickstart.rst
deleted file mode 100644
index 0d9dbf6a091710b6d83b5a7203b7e5cba8ee5ecb..0000000000000000000000000000000000000000
--- a/docs/source/quickstart.rst
+++ /dev/null
@@ -1,500 +0,0 @@
-.. _quickstart:
-
-##########
-Quickstart
-##########
-
-This doc is meant to serve as a quick-guide to setup RISCOF and perform a sample compliance check
-between ``spike`` (DUT in this case) and ``riscvOVPsim`` (Golden model in this case).
-
-Install Python
-==============
-
-Ubuntu
-------
-
-Ubuntu 17.10 and 18.04 by default come with python-3.6.9 which is sufficient for using riscv-config.
-
-If you are are Ubuntu 16.10 and 17.04 you can directly install python3.6 using the Universe
-repository::
-
- $ sudo apt-get install python3.6
- $ pip3 install --upgrade pip
-
-If you are using Ubuntu 14.04 or 16.04 you need to get python3.6 from a Personal Package Archive
-(PPA)::
-
- $ sudo add-apt-repository ppa:deadsnakes/ppa
- $ sudo apt-get update
- $ sudo apt-get install python3.6 -y
- $ pip3 install --upgrade pip
-
-You should now have 2 binaries: ``python3`` and ``pip3`` available in your $PATH.
-You can check the versions as below::
-
- $ python3 --version
- Python 3.6.9
- $ pip3 --version
- pip 20.1 from .local/lib/python3.6/site-packages/pip (python 3.6)
-
-Centos:7
---------
-The CentOS 7 Linux distribution includes Python 2 by default. However, as of CentOS 7.7, Python 3
-is available in the base package repository which can be installed using the following commands::
-
- $ sudo yum update -y
- $ sudo yum install -y python3
- $ pip3 install --upgrade pip
-
-For versions prior to 7.7 you can install python3.6 using third-party repositories, such as the
-IUS repository::
-
- $ sudo yum update -y
- $ sudo yum install yum-utils
- $ sudo yum install https://centos7.iuscommunity.org/ius-release.rpm
- $ sudo yum install python36u
- $ pip3 install --upgrade pip
-
-You can check the versions::
-
- $ python3 --version
- Python 3.6.8
- $ pip --version
- pip 20.1 from .local/lib/python3.6/site-packages/pip (python 3.6)
-
-
-Using Virtualenv for Python
----------------------------
-
-Many a times users face issues in installing and managing multiple python versions. This is actually
-a major issue as many gui elements in Linux use the default python versions, in which case installing
-python3.6 using the above methods might break other software. We thus advise the use of **pyenv** to
-install python3.6.
-
-For Ubuntu and CentosOS, please follow the steps here: https://github.com/pyenv/pyenv#basic-github-checkout
-
-RHEL users can find more detailed guides for virtual-env here: https://developers.redhat.com/blog/2018/08/13/install-python3-rhel/#create-env
-
-Once you have pyenv installed do the following to install python 3.6.0::
-
- $ pyenv install 3.6.0
- $ pip3 install --upgrade pip
- $ pyenv shell 3.6.0
-
-You can check the version in the **same shell**::
-
- $ python --version
- Python 3.6.0
- $ pip --version
- pip 20.1 from .local/lib/python3.6/site-packages/pip (python 3.6)
-
-Install RISCOF
-==============
-
-.. note:: If you are using `pyenv` as mentioned above, make sure to enable that environment before
- performing the following steps.
-
-.. code-block:: bash
-
- $ pip3 install riscof
-
-To update an already installed version of RISCOF to the latest version:
-
-.. code-block:: bash
-
- $ pip3 install -U riscof
-
-To checkout a specific version of riscof:
-
-.. code-block:: bash
-
- $ pip3 install riscof==1.x.x
-
-Once you have RISCOF installed, executing ``riscof --help`` should print the following on the terminal:
-
-.. code-block:: bash
-
-
- usage: riscof [-h] [--version] [--verbose]
- {gendb,setup,validateyaml,run,testlist} ...
-
- This program checks compliance for a DUT.
-
- optional arguments:
- --verbose [Default=info]
- --version, -v Print version of RISCOF being used
- -h, --help show this help message and exit
-
- Action:
- The action to be performed by riscof.
-
- {gendb,setup,validateyaml,run,testlist}
- List of actions supported by riscof.
- gendb Generate Database for the standard suite.
- setup Initiate setup for riscof.
- validateyaml Validate the Input YAMLs using riscv-config.
- run Run the tests on DUT and reference and compare
- signatures.
- testlist Generate the test list for the given DUT and suite.
- Uses the compliance suite by default.
- Action 'gendb'
-
- usage: riscof gendb [-h] [--suite PATH]
-
- optional arguments:
- --suite PATH The Path to the custom suite directory.
- -h, --help show this help message and exit
-
- Action 'setup'
-
- usage: riscof setup [-h] [--dutname NAME] [--refname NAME]
-
- optional arguments:
- --dutname NAME Name of DUT plugin. [Default=spike]
- --refname NAME Name of Reference plugin. [Default=riscvOVPsim]
- -h, --help show this help message and exit
-
- Action 'validateyaml'
-
- usage: riscof validateyaml [-h] [--config PATH]
-
- optional arguments:
- --config PATH The Path to the config file. [Default=./config.ini]
- -h, --help show this help message and exit
-
- Action 'run'
-
- usage: riscof run [-h] [--config PATH] [--suite PATH] [--no-browser]
-
- optional arguments:
- --config PATH The Path to the config file. [Default=./config.ini]
- --no-browser Do not open the browser for showing the test report.
- --suite PATH The Path to the custom suite directory.
- -h, --help show this help message and exit
-
- Action 'testlist'
-
- usage: riscof testlist [-h] [--config PATH] [--suite PATH]
-
- optional arguments:
- --config PATH The Path to the config file. [Default=./config.ini]
- --suite PATH The Path to the custom suite directory.
- -h, --help show this help message and exit
-
-
-Install RISCV-GNU Toolchain
-===========================
-
-This guide will use the 32-bit riscv-gnu tool chain to compile the compliance suite.
-If you already have the 32-bit gnu-toolchain available, you can skip to the next section.
-
-.. note:: The git clone and installation will take significant time. Please be patient. If you face
- issues with any of the following steps please refer to
- https://github.com/riscv/riscv-gnu-toolchain for further help in installation.
-
-
-Ubuntu Users
-------------
-
-.. code-block:: bash
-
- $ sudo apt-get install autoconf automake autotools-dev curl python3 libmpc-dev \
- libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool \
- patchutils bc zlib1g-dev libexpat-dev
- $ git clone --recursive https://github.com/riscv/riscv-gnu-toolchain
- $ git clone --recursive https://github.com/riscv/riscv-opcodes.git
- $ cd riscv-gnu-toolchain
- $ ./configure --prefix=/path/to/install --with-arch=rv32gc --with-abi=ilp32d # for 32-bit toolchain
- $ [sudo] make # sudo is required depending on the path chosen in the previous setup
-
-CentosOS/RHEL
--------------
-
-.. code-block:: bash
-
- $ sudo yum install autoconf automake python3 libmpc-devel mpfr-devel gmp-devel \
- gawk bison flex texinfo patchutils gcc gcc-c++ zlib-devel expat-devel
- $ git clone --recursive https://github.com/riscv/riscv-gnu-toolchain
- $ git clone --recursive https://github.com/riscv/riscv-opcodes.git
- $ cd riscv-gnu-toolchain
- $ ./configure --prefix=/path/to/install --with-arch=rv32gc --with-abi=ilp32d # for 32-bit toolchain
- $ [sudo] make # sudo is required depending on the path chosen in the previous setup
-
-Make sure to add the path ``/path/to/install`` to your `$PATH` in the .bashrc/cshrc
-With this you should now have all the following available as command line arguments::
-
- riscv32-unknown-elf-addr2line riscv32-unknown-elf-elfedit
- riscv32-unknown-elf-ar riscv32-unknown-elf-g++
- riscv32-unknown-elf-as riscv32-unknown-elf-gcc
- riscv32-unknown-elf-c++ riscv32-unknown-elf-gcc-8.3.0
- riscv32-unknown-elf-c++filt riscv32-unknown-elf-gcc-ar
- riscv32-unknown-elf-cpp riscv32-unknown-elf-gcc-nm
- riscv32-unknown-elf-gcc-ranlib riscv32-unknown-elf-gprof
- riscv32-unknown-elf-gcov riscv32-unknown-elf-ld
- riscv32-unknown-elf-gcov-dump riscv32-unknown-elf-ld.bfd
- riscv32-unknown-elf-gcov-tool riscv32-unknown-elf-nm
- riscv32-unknown-elf-gdb riscv32-unknown-elf-objcopy
- riscv32-unknown-elf-gdb-add-index riscv32-unknown-elf-objdump
- riscv32-unknown-elf-ranlib riscv32-unknown-elf-readelf
- riscv32-unknown-elf-run riscv32-unknown-elf-size
- riscv32-unknown-elf-strings riscv32-unknown-elf-strip
-
-Install DUT and Golden Models
-=============================
-
-This guide is going to prove compliance of the spike model (the DUT) against the riscvOVPsim model
-(the Golden model), both of which need to be installed.
-
-Installing SPIKE (a.k.a riscv-isa-sim)
---------------------------------------
-
-.. code-block:: bash
-
- $ git clone https://github.com/riscv/riscv-isa-sim.git
- $ cd riscv-isa-sim
- $ mkdir build
- $ cd build
- $ ../configure --prefix=/path/to/install
- $ make
- $ [sudo] make install #sudo is required depending on the path chosen in the previous setup
-
-Make sure to add the path ``/path/to/install`` to your `$PATH` in the .bashrc/cshrc
-Once installed, executing ``spike`` on the terminal should print the following::
-
- usage: spike [host options] [target options]
- Host Options:
- -p Simulate processors [default 1]
- -m Provide MiB of target memory [default 2048]
- -m Provide memory regions of size m and n bytes
- at base addresses a and b (with 4 KiB alignment)
- -d Interactive debug mode
- -g Track histogram of PCs
- -l Generate a log of execution
- -h Print this help message
- -H Start halted, allowing a debugger to connect
- --isa= RISC-V ISA string [default RV64IMAFDC]
- --pc= Override ELF entry point
- --hartids= Explicitly specify hartids, default is 0,1,...
- --ic=:: Instantiate a cache model with S sets,
- --dc=:: W ways, and B-byte blocks (with S and
- --l2=:: B both powers of 2).
- --extension= Specify RoCC Extension
- --extlib= Shared library to load
- --rbb-port= Listen on for remote bitbang connection
- --dump-dts Print device tree string and exit
- --disable-dtb Don't write the device tree blob into memory
- --progsize= Progsize for the debug module [default 2]
- --debug-sba= Debug bus master supports up to wide accesses [default 0]
- --debug-auth Debug module requires debugger to authenticate
-
-
-Installing riscvOVPsim
-----------------------
-
-.. code-block:: bash
-
- $ git clone https://github.com/riscv/riscv-ovpsim.git --recursive
- $ export PATH=$PATH:/riscv-ovpsim/bin/Linux64/
-
-Once installed, open a new terminal and check the version::
-
- $ riscvOVPsim.exe --version
- 20200206.0
-
-
-Create Necessary Env Files
-==========================
-
-RISCOF requires python plugins for each model (DUT and Golden) to be submitted. These plugins
-provide a quick and standard way of building the model, compiling the tests and executing the tests
-on the models. Along with the python plugins of each model, one would also have to provide the
-`YAML` configuration files of the DUT as per the norms of ``riscv-config``. Some models might also
-require special macros to be executed as prelude or post-testing. These macros can be provided to
-RISCOF as a header file: ``compliance_model.h``.
-
-For the sake of this guide, we will use some of the pre-built plugins for riscof available at:
-`riscof-plugins `_. We will specifically use the
-spike_simple and riscvOVPsim plugins.
-
-.. note:: If you are using `pyenv` as mentioned above, make sure to enable that environment before
- performing the following steps since we will now start using riscof.
-
-.. code-block:: bash
-
- $ git clone https://gitlab.com/incoresemi/riscof-plugins.git
-
-To create necessary environment files use the following command::
-
- $ riscof setup --dutname=spike_simple --refname=riscvOVPsim
-
-The above command will generate a file named ``config.ini`` and a folder named ``spike_simple``.
-The ``config.ini`` file is used to capture specific paths of the plugins of reference and DUT model,
-along with the paths to isa and platform input YAMLs. The folder ``spike_simple`` contains
-various templates of files that would be required for compliance of any generic DUT.
-Components of this folder will be modified by the user as per the DUT spec.
-Since we are going to use pre-built plugins for this guide, we will ignore the ``spike_simple``
-folder for now.
-
-.. note:: For specific examples on modifications to environment files, please check the
- corresponding files for various targets available in the riscof-plugins directory.
-
-Based on the path you have downloaded the riscof-plugins directory, you will need to modify the
-``config.ini`` file to look similar to the following::
-
-
- [RISCOF]
- ReferencePlugin=riscvOVPsim
- ReferencePluginPath=/path/to/riscof-plugins/riscvOVPsim
- DUTPlugin=spike_simple
- DUTPluginPath=/path/to/riscof-plugins/spike_simple
-
- ## Example configuration for spike plugin.
- [spike_simple]
- pluginpath=/path/to/riscof-plugins/spike_simple/
- ispec=/path/to/riscof-plugins/spike_simple/spike_simple_isa.yaml
- pspec=/path/to/riscof-plugins/spike_simple/spike_simple_platform.yaml
-
-We are now ready to run compliance via RISCOF
-
-Running RISCOF
-==============
-
-The RISCOF run is divided into three steps as shown in the overview Figure.
-The first step is to check if the input yaml files are configured correctly. This step internally calls
-the ``riscv-config`` on both the isa and platform yaml files indicated in the ``config.ini`` file.
-
-.. code-block:: bash
-
- riscof validateyaml --config=config.ini
-
-This should print the following:
-
-.. code-block:: bash
-
- [INFO] : Reading configuration from: /scratch/git-repo/incoresemi/riscof-plugins/config.ini
- [INFO] : Preparing Models
- [INFO] : Input-ISA file
- [INFO] : Loading input file: /scratch/git-repo/incoresemi/riscof-plugins/spike_simple/sample_isa.yaml
- [INFO] : Load Schema /home/neel/.pyenv/versions/3.7.0/envs/venv/lib/python3.7/site-packages/riscv_config/schemas/schema_isa.yaml
- [INFO] : Initiating Validation
- [INFO] : No Syntax errors in Input ISA Yaml. :)
- [INFO] : Dumping out Normalized Checked YAML: /scratch/git-repo/incoresemi/riscof-plugins/riscof_work/sample_isa_checked.yaml
- [INFO] : Input-Platform file
- [INFO] : Loading input file: /scratch/git-repo/incoresemi/riscof-plugins/spike_simple/sample_platform.yaml
- [INFO] : Load Schema /home/neel/.pyenv/versions/3.7.0/envs/venv/lib/python3.7/site-packages/riscv_config/schemas/schema_platform.yaml
- [INFO] : Initiating Validation
- [INFO] : No Syntax errors in Input Platform Yaml. :)
- [INFO] : Dumping out Normalized Checked YAML: /scratch/git-repo/incoresemi/riscof-plugins/riscof_work/sample_platform_checked.yaml
-
-The next step is generate the list of tests that need to be run on the models for declaring
-compliance.
-
-.. code-block:: bash
-
- riscof testlist --config=config.ini
-
-This step calls the validate-step and thus the output adds one more line to the above dump:
-
-.. code-block:: bash
-
- [INFO] : Selecting Tests.
-
-The tests are listed in the file: ``riscof_work/test_list.yaml`` which should probably look
-something similar to the following:
-
-.. code-block:: yaml
-
- suite/rv32i_m/C/C-ADD.S:
- work_dir: /scratch/git-repo/incoresemi/riscof-plugins/riscof_work/rv32i_m/C/C-ADD.S
- macros: [TEST_CASE_1=True, XLEN=32]
- isa: RV32IC
- test_path: /home/neel/.pyenv/versions/3.7.0/envs/venv/lib/python3.7/site-packages/riscof/suite/rv32i_m/C/C-ADD.S
- suite/rv32i_m/C/C-ADDI.S:
- work_dir: /scratch/git-repo/incoresemi/riscof-plugins/riscof_work/rv32i_m/C/C-ADDI.S
- macros: [TEST_CASE_1=True, XLEN=32]
- isa: RV32IC
- test_path: /home/neel/.pyenv/versions/3.7.0/envs/venv/lib/python3.7/site-packages/riscof/suite/rv32i_m/C/C-ADDI.S
- suite/rv32i_m/C/C-ADDI16SP.S:
- work_dir: /scratch/git-repo/incoresemi/riscof-plugins/riscof_work/rv32i_m/C/C-ADDI16SP.S
- macros: [TEST_CASE_1=True, XLEN=32]
- isa: RV32IC
- ...
- ...
- ...
-
-The last step is to run the tests on the each of the models and compare the signature values to
-guarantee correctness.
-
-.. code-block:: bash
-
- riscof run --config=config.ini
-
-This should compile and execute the tests on each of the models and end up with the following log:
-
-
-.. code-block:: bash
-
- ...
- ...
- ...
- [INFO] : Initiating signature checking.
- [INFO] : Following 55 tests have been run :
-
- [INFO] : TEST NAME : COMMIT ID : STATUS
- [INFO] : suite/rv32i_m/I/I-ADD-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-ADDI-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-AND-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-ANDI-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-AUIPC-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-BEQ-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-BGE-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-BGEU-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-BLT-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-BLTU-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-BNE-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-CSRRC-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-CSRRCI-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-CSRRS-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-CSRRSI-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-CSRRW-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-CSRRWI-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-DELAY_SLOTS-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-EBREAK-01.S : 3a4a3a576666d5153ae6a844e74a45f953245e57 : Passed
- [INFO] : suite/rv32i_m/I/I-ECALL-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-ENDIANESS-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-FENCE.I-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-IO.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-JAL-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-JALR-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-LB-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-LBU-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-LH-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-LHU-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-LUI-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-LW-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-MISALIGN_JMP-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-MISALIGN_LDST-02.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-NOP-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-OR-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-ORI-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-RF_size-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-RF_width-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-RF_x0-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SB-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SH-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SLL-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SLLI-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SLT-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SLTI-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SLTIU-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SLTU-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SRA-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SRAI-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SRL-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SRLI-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SUB-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-SW-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-XOR-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
- [INFO] : suite/rv32i_m/I/I-XORI-01.S : d50921ef64708678832770fd842355aa2b0684af : Passed
-
-And will also open a HTML page with all the information.
diff --git a/docs/source/testformat.rst b/docs/source/testformat.rst
index 7b764087130ec804c34f1856b10ca53c1db668ef..928e595a7f39b9a2ad95aa2d7049f322f1537bb0 100644
--- a/docs/source/testformat.rst
+++ b/docs/source/testformat.rst
@@ -196,7 +196,7 @@ significant amount of the framework shall depend on the existence of these macro
- condStr is evaluated to determine if the test-case is enabled and sets name variable +
- condStr can also define compile time macros required for the test-case to be enabled. +
- the test-case must be delimited with an #ifdef CaseName/#endif pair +
- - the format of CondStr can be found in https://riscof.readthedocs.io/en/latest/cond_spec.html#cond-spec
+ - the format of CondStr can be found in https://riscof.readthedocs.io/en/latest/testformat.html#rvtest-case-condition-formating
Required, Model-defined Macros
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -339,8 +339,8 @@ Instead, each of those should be a separate :ref:`The test case ` who
the common reference document entry for that test and test case number.
-RVTEST_CASE Condition Formating
--------------------------------
+RVTEST_CASE Condition Formatting
+--------------------------------
This section describes the format for the conditions `CondStr` to be followed while writing the ``RVTEST_CASE`` macro.
Each of the statements within this macro ends with a ';' .
diff --git a/docs/source/testlist.rst b/docs/source/testlist.rst
index 4dc276243a1dc73a254e5f77e76d77f583f9be35..6e7680dd33ff6f488d9790d4c2eaece3c3b6cc77 100644
--- a/docs/source/testlist.rst
+++ b/docs/source/testlist.rst
@@ -5,7 +5,7 @@ Test List Format
################
For a given ISA and PLATFORM YAML configuration files, RISCOF is capable of generating a list of
-tests that need to be executed on the DUT and Golden model for compliance. This test list can be
+tests that need to be executed on the DUT and Golden model. This test list can be
generated using the following command:
.. code-block:: bash
@@ -24,7 +24,7 @@ syntax:
test_path:
The test-list is meant to be used by the DUT/Golden model plugins to generate execution
-environments/Makefile for compliance testing.
+environments/Makefile for architectural suite testing.
A sample test_list.yaml would look like the following:
diff --git a/riscof/Templates/setup/model/env/compliance_model.h b/riscof/Templates/setup/model/env/compliance_model.h
deleted file mode 100644
index b37463cde4d780b70bf522399293d3e788c009b7..0000000000000000000000000000000000000000
--- a/riscof/Templates/setup/model/env/compliance_model.h
+++ /dev/null
@@ -1,49 +0,0 @@
-#ifndef _COMPLIANCE_MODEL_H
-#define _COMPLIANCE_MODEL_H
-
-//-----------------------------------------------------------------------
-// Model specific Macros
-//-----------------------------------------------------------------------
-
-#define RVMODEL_DATA_SECTION \
-//Define the data section required for debugging and io operations here.
-
-//RV_COMPLIANCE_HALT
-#define RVMODEL_HALT \
-//Define the halt sequence for the implementation here.
-
-#define RVMODEL_BOOT \
-//Define the boot sequence for the implementation here.
-
-//RV_COMPLIANCE_DATA_BEGIN
-//Change the definition in the following macros if the implementation expects
-//different labels for identifying the signature section.
-#define RVMODEL_DATA_BEGIN \
- RVMODEL_DATA_SECTION \
- .align 4; .global begin_signature; begin_signature:
-
-//RV_COMPLIANCE_DATA_END
-#define RVMODEL_DATA_END \
- .align 4; .global end_signature; end_signature:
-
-
-//Define the IO macros as required.
-//RVTEST_IO_INIT
-#define RVMODEL_IO_INIT \
-
-//RVTEST_IO_WRITE_STR
-#define RVMODEL_IO_WRITE_STR(_R, _STR) \
-
-//RVTEST_IO_CHECK
-#define RVMODEL_IO_CHECK() \
-
-//RVTEST_IO_ASSERT_GPR_EQ
-#define RVMODEL_IO_ASSERT_GPR_EQ(_S, _R, _I) \
-
-//RVTEST_IO_ASSERT_SFPR_EQ
-#define RVMODEL_IO_ASSERT_SFPR_EQ(_F, _R, _I) \
-
-//RVTEST_IO_ASSERT_DFPR_EQ
-#define RVMODEL_IO_ASSERT_DFPR_EQ(_D, _R, _I) \
-
-#endif // _COMPLIANCE_MODEL_H
diff --git a/riscof/Templates/setup/model/env/link.ld b/riscof/Templates/setup/model/env/link.ld
index 187ef6f81e381b827754580d42cb6efd8b2a5bd9..8ad95e049bedb9b8c3619ed3608028828425628a 100644
--- a/riscof/Templates/setup/model/env/link.ld
+++ b/riscof/Templates/setup/model/env/link.ld
@@ -1,5 +1,5 @@
OUTPUT_ARCH( "riscv" )
-ENTRY(_start)
+ENTRY(rvtest_entry_point)
SECTIONS
{
diff --git a/riscof/Templates/setup/model/env/model_test.h b/riscof/Templates/setup/model/env/model_test.h
new file mode 100644
index 0000000000000000000000000000000000000000..ef4cc44990e7bf9975064f1f8ed774ac29fe8bde
--- /dev/null
+++ b/riscof/Templates/setup/model/env/model_test.h
@@ -0,0 +1,65 @@
+#ifndef _COMPLIANCE_MODEL_H
+#define _COMPLIANCE_MODEL_H
+#if XLEN == 64
+ #define ALIGNMENT 3
+#else
+ #define ALIGNMENT 2
+#endif
+
+#define RVMODEL_DATA_SECTION \
+ .pushsection .tohost,"aw",@progbits; \
+ .align 8; .global tohost; tohost: .dword 0; \
+ .align 8; .global fromhost; fromhost: .dword 0; \
+ .popsection; \
+ .align 8; .global begin_regstate; begin_regstate: \
+ .word 128; \
+ .align 8; .global end_regstate; end_regstate: \
+ .word 4;
+
+//RV_COMPLIANCE_HALT
+#define RVMODEL_HALT \
+ li x1, 1; \
+ write_tohost: \
+ sw x1, tohost, t5; \
+ j write_tohost;
+
+#define RVMODEL_BOOT
+
+//RV_COMPLIANCE_DATA_BEGIN
+#define RVMODEL_DATA_BEGIN \
+ RVMODEL_DATA_SECTION \
+ .align ALIGNMENT;\
+ .global begin_signature; begin_signature:
+
+//RV_COMPLIANCE_DATA_END
+#define RVMODEL_DATA_END \
+ .global end_signature; end_signature:
+
+//RVTEST_IO_INIT
+#define RVMODEL_IO_INIT
+//RVTEST_IO_WRITE_STR
+#define RVMODEL_IO_WRITE_STR(_R, _STR)
+//RVTEST_IO_CHECK
+#define RVMODEL_IO_CHECK()
+//RVTEST_IO_ASSERT_GPR_EQ
+#define RVMODEL_IO_ASSERT_GPR_EQ(_S, _R, _I)
+//RVTEST_IO_ASSERT_SFPR_EQ
+#define RVMODEL_IO_ASSERT_SFPR_EQ(_F, _R, _I)
+//RVTEST_IO_ASSERT_DFPR_EQ
+#define RVMODEL_IO_ASSERT_DFPR_EQ(_D, _R, _I)
+
+#define RVMODEL_SET_MSW_INT \
+ li t1, 1; \
+ li t2, 0x2000000; \
+ sw t1, 0(t2);
+
+#define RVMODEL_CLEAR_MSW_INT \
+ li t2, 0x2000000; \
+ sw x0, 0(t2);
+
+#define RVMODEL_CLEAR_MTIMER_INT
+
+#define RVMODEL_CLEAR_MEXT_INT
+
+
+#endif // _COMPLIANCE_MODEL_H
diff --git a/riscof/Templates/setup/model/model_isa.yaml b/riscof/Templates/setup/model/model_isa.yaml
index d3f2b75d7e3204e95f415d2a01c26ea2a051fd59..fe8f8b115971aefd3231aa5a952c38dfe5e08c20 100644
--- a/riscof/Templates/setup/model/model_isa.yaml
+++ b/riscof/Templates/setup/model/model_isa.yaml
@@ -1,6 +1,29 @@
hart_ids: [0]
hart0:
ISA: RV32IMCZicsr_Zifencei
+ physical_addr_sz: 32
User_Spec_Version: '2.3'
supported_xlen: [32]
- physical_addr_sz: 32
+ misa:
+ reset-val: 0x40001104
+ rv32:
+ accessible: true
+ mxl:
+ implemented: true
+ type:
+ warl:
+ dependency_fields: []
+ legal:
+ - mxl[1:0] in [0x1]
+ wr_illegal:
+ - Unchanged
+ extensions:
+ implemented: true
+ type:
+ warl:
+ dependency_fields: []
+ legal:
+ - extensions[25:0] bitmask [0x0001104, 0x0000000]
+ wr_illegal:
+ - Unchanged
+
diff --git a/riscof/Templates/setup/model/model_platform.yaml b/riscof/Templates/setup/model/model_platform.yaml
index 4b99ed9c113e26e8a018687b9692ee6fd0749cfe..8e1a3d8e30f0a2e51a5c158a4f55cd612aa52eb1 100644
--- a/riscof/Templates/setup/model/model_platform.yaml
+++ b/riscof/Templates/setup/model/model_platform.yaml
@@ -1,3 +1,9 @@
+mtime:
+ implemented: true
+ address: 0xbff8
+mtimecmp:
+ implemented: true
+ address: 0x4000
nmi:
label: nmi_vector
reset:
diff --git a/riscof/Templates/setup/model/riscof_model.py b/riscof/Templates/setup/model/riscof_model.py
index 7a4c05cab199037ae644371d78412e2924e3b48d..122a8cc21875effd1e49aa2e993538b01c937841 100644
--- a/riscof/Templates/setup/model/riscof_model.py
+++ b/riscof/Templates/setup/model/riscof_model.py
@@ -15,14 +15,19 @@ from riscof.pluginTemplate import pluginTemplate
logger = logging.getLogger()
-class spike_simple(pluginTemplate):
- __model__ = "Spike"
- __version__ = "0.5.0"
+class dutname(pluginTemplate):
+ __model__ = "dutname"
+
+ #TODO: please update the below to indicate family, version, etc of your DUT.
+ __version__ = "XXX"
def __init__(self, *args, **kwargs):
sclass = super().__init__(*args, **kwargs)
config = kwargs.get('config')
+
+ self.dut_exe = os.path.join(config['PATH'] if 'PATH' in config else "","dutname")
+ self.num_jobs = str(config['jobs'] if 'jobs' in config else 1)
if config is None:
print("Please enter input file paths in configuration.")
raise SystemExit
@@ -33,29 +38,66 @@ class spike_simple(pluginTemplate):
return sclass
- def initialise(self, suite, work_dir, compliance_env):
+ def initialise(self, suite, work_dir, archtest_env):
+ if shutil.which(self.dut_exe) is None:
+ logger.error(self.dut_exe+' Not Found')
+ logger.error('Please install Executable for dutname to proceed further')
+ sys.exit(0)
self.work_dir = work_dir
- self.compile_cmd = ''
+
+ #TODO: The following assumes you are using the riscv-gcc toolchain. If
+ # not please change appropriately
+ self.compile_cmd = 'riscv{1}-unknown-elf-gcc -march={0} \
+ -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles\
+ -T '+self.pluginpath+'/env/link.ld\
+ -I '+self.pluginpath+'/env/\
+ -I ' + archtest_env
# set all the necessary variables like compile command, elf2hex
# commands, objdump cmds. etc whichever you feel necessary and required
# for your plugin.
def build(self, isa_yaml, platform_yaml):
- ispec = utils.load_yaml(isa_yaml)
- self.isa = ispec["ISA"]
+ ispec = utils.load_yaml(isa_yaml)['hart0']
+ self.xlen = ('64' if 64 in ispec['supported_xlen'] else '32')
+ self.isa = 'rv' + self.xlen
+ #TODO: The following assumes you are using the riscv-gcc toolchain. If
+ # not please change appropriately
+ self.compile_cmd = self.compile_cmd+' -mabi='+('lp64 ' if 64 in ispec['supported_xlen'] else 'ilp32 ')
+ if "I" in ispec["ISA"]:
+ self.isa += 'i'
+ if "M" in ispec["ISA"]:
+ self.isa += 'm'
+ if "C" in ispec["ISA"]:
+ self.isa += 'c'
- # based on the validated isa and platform configure your simulator ro
+ # based on the validated isa and platform configure your simulator or
# build your RTL here
- def runTests(self, testList):
+ def runTests(self, testList, cgf_file=None):
+ make = utils.makeUtil(makefilePath=os.path.join(self.work_dir, "Makefile." + self.name[:-1]))
+ make.makeCommand = 'make -j' + self.num_jobs
for file in testList:
testentry = testList[file]
- test = os.path.join(constants.root, str(file))
+ test = testentry['test_path']
test_dir = testentry['work_dir']
- # compile each test
- # execute each test on simulator/DUT
- # fix signature format if required
+ elf = 'dut.elf'
+ execute = "@cd "+testentry['work_dir']+";"
+
+ cmd = self.compile_cmd.format(testentry['isa'].lower(), self.xlen) + ' ' + test + ' -o ' + elf
+
+ #TODO: we are using -D to enable compile time macros. If your
+ # toolchain is not riscv-gcc you may want to change the below code
+ compile_cmd = cmd + ' -D' + " -D".join(testentry['macros'])
+ execute+=compile_cmd+";"
+
+ sig_file = os.path.join(test_dir, self.name[:-1] + ".signature")
+
+ #TODO: You will need to add any other arguments to your DUT
+ # executable if any in the quotes below
+ execute += self.dut_exe + ''
+ make.add_target(execute)
+ make.execute_all(self.work_dir)
diff --git a/riscof/Templates/setup/reference/env/link.ld b/riscof/Templates/setup/reference/env/link.ld
new file mode 100644
index 0000000000000000000000000000000000000000..8ad95e049bedb9b8c3619ed3608028828425628a
--- /dev/null
+++ b/riscof/Templates/setup/reference/env/link.ld
@@ -0,0 +1,18 @@
+OUTPUT_ARCH( "riscv" )
+ENTRY(rvtest_entry_point)
+
+SECTIONS
+{
+ . = 0x80000000;
+ .text.init : { *(.text.init) }
+ . = ALIGN(0x1000);
+ .tohost : { *(.tohost) }
+ . = ALIGN(0x1000);
+ .text : { *(.text) }
+ . = ALIGN(0x1000);
+ .data : { *(.data) }
+ .data.string : { *(.data.string)}
+ .bss : { *(.bss) }
+ _end = .;
+}
+
diff --git a/riscof/Templates/setup/reference/env/model_test.h b/riscof/Templates/setup/reference/env/model_test.h
new file mode 100644
index 0000000000000000000000000000000000000000..cc8cfde1019f93afdb9580b15fd3538877cc1c2d
--- /dev/null
+++ b/riscof/Templates/setup/reference/env/model_test.h
@@ -0,0 +1,59 @@
+#ifndef _COMPLIANCE_MODEL_H
+#define _COMPLIANCE_MODEL_H
+#if XLEN == 64
+ #define ALIGNMENT 3
+#else
+ #define ALIGNMENT 2
+#endif
+
+#define RVMODEL_DATA_SECTION \
+ .pushsection .tohost,"aw",@progbits; \
+ .align 8; .global tohost; tohost: .dword 0; \
+ .align 8; .global fromhost; fromhost: .dword 0; \
+ .popsection; \
+ .align 8; .global begin_regstate; begin_regstate: \
+ .word 128; \
+ .align 8; .global end_regstate; end_regstate: \
+ .word 4;
+
+//RV_COMPLIANCE_HALT
+#define RVMODEL_HALT \
+ li x1, 1; \
+ write_tohost: \
+ sw x1, tohost, t5; \
+ j write_tohost;
+
+#define RVMODEL_BOOT
+
+//RV_COMPLIANCE_DATA_BEGIN
+#define RVMODEL_DATA_BEGIN \
+ .align 4; .global begin_signature; begin_signature:
+
+//RV_COMPLIANCE_DATA_END
+#define RVMODEL_DATA_END \
+ .align 4; .global end_signature; end_signature: \
+ RVMODEL_DATA_SECTION \
+
+//RVTEST_IO_INIT
+#define RVMODEL_IO_INIT
+//RVTEST_IO_WRITE_STR
+#define RVMODEL_IO_WRITE_STR(_R, _STR)
+//RVTEST_IO_CHECK
+#define RVMODEL_IO_CHECK()
+//RVTEST_IO_ASSERT_GPR_EQ
+#define RVMODEL_IO_ASSERT_GPR_EQ(_S, _R, _I)
+//RVTEST_IO_ASSERT_SFPR_EQ
+#define RVMODEL_IO_ASSERT_SFPR_EQ(_F, _R, _I)
+//RVTEST_IO_ASSERT_DFPR_EQ
+#define RVMODEL_IO_ASSERT_DFPR_EQ(_D, _R, _I)
+
+#define RVMODEL_SET_MSW_INT
+
+#define RVMODEL_CLEAR_MSW_INT
+
+#define RVMODEL_CLEAR_MTIMER_INT
+
+#define RVMODEL_CLEAR_MEXT_INT
+
+
+#endif // _COMPLIANCE_MODEL_H
diff --git a/riscof/Templates/setup/reference/riscof_model.py b/riscof/Templates/setup/reference/riscof_model.py
new file mode 100644
index 0000000000000000000000000000000000000000..4a1a5016824c16fbc88ff1249ece1d00647110dd
--- /dev/null
+++ b/riscof/Templates/setup/reference/riscof_model.py
@@ -0,0 +1,122 @@
+import os
+import re
+import shutil
+import subprocess
+import shlex
+import logging
+import random
+import string
+from string import Template
+import sys
+
+import riscof.utils as utils
+import riscof.constants as constants
+from riscof.pluginTemplate import pluginTemplate
+
+logger = logging.getLogger()
+
+class refname(pluginTemplate):
+ __model__ = "refname"
+
+ #TODO: please update the below to indicate family, version, etc of your DUT.
+ __version__ = "XXX"
+
+ def __init__(self, *args, **kwargs):
+ sclass = super().__init__(*args, **kwargs)
+
+ config = kwargs.get('config')
+
+ self.ref_exe = os.path.join(config['PATH'] if 'PATH' in config else "","refname")
+ self.num_jobs = str(config['jobs'] if 'jobs' in config else 1)
+ self.pluginpath=os.path.abspath(config['pluginpath'])
+
+ return sclass
+
+ def initialise(self, suite, work_dir, archtest_env):
+ self.suite = suite
+ if shutil.which(self.ref_exe) is None:
+ logger.error('Please install Executable for DUTNAME to proceed further')
+ sys.exit(0)
+ self.work_dir = work_dir
+
+ #TODO: The following assumes you are using the riscv-gcc toolchain. If
+ # not please change appropriately
+ self.objdump_cmd = 'riscv{1}-unknown-elf-objdump -D {0} > {2};'
+ self.compile_cmd = 'riscv{1}-unknown-elf-gcc -march={0} \
+ -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles\
+ -T '+self.pluginpath+'/env/link.ld\
+ -I '+self.pluginpath+'/env/\
+ -I ' + archtest_env
+
+ # set all the necessary variables like compile command, elf2hex
+ # commands, objdump cmds. etc whichever you feel necessary and required
+ # for your plugin.
+
+ def build(self, isa_yaml, platform_yaml):
+ ispec = utils.load_yaml(isa_yaml)['hart0']
+ self.xlen = ('64' if 64 in ispec['supported_xlen'] else '32')
+ self.isa = 'rv' + self.xlen
+ #TODO: The following assumes you are using the riscv-gcc toolchain. If
+ # not please change appropriately
+ self.compile_cmd = self.compile_cmd+' -mabi='+('lp64 ' if 64 in ispec['supported_xlen'] else 'ilp32 ')
+ if "I" in ispec["ISA"]:
+ self.isa += 'i'
+ if "M" in ispec["ISA"]:
+ self.isa += 'm'
+ if "C" in ispec["ISA"]:
+ self.isa += 'c'
+ if "F" in ispec["ISA"]:
+ self.isa += 'f'
+ if "D" in ispec["ISA"]:
+ self.isa += 'd'
+
+ # based on the validated isa and platform configure your simulator or
+ # build your RTL here
+
+ def runTests(self, testList, cgf_file=None):
+ make = utils.makeUtil(makefilePath=os.path.join(self.work_dir, "Makefile." + self.name[:-1]))
+ make.makeCommand = 'make -j' + self.num_jobs
+ for file in testList:
+ testentry = testList[file]
+ test = testentry['test_path']
+ test_dir = testentry['work_dir']
+ test_name = test.rsplit('/',1)[1][:-2]
+
+ elf = 'ref.elf'
+
+ execute = "@cd "+testentry['work_dir']+";"
+
+ cmd = self.compile_cmd.format(testentry['isa'].lower(), self.xlen) + ' ' + test + ' -o ' + elf
+
+ #TODO: we are using -D to enable compile time macros. If your
+ # toolchain is not riscv-gcc you may want to change the below code
+ compile_cmd = cmd + ' -D' + " -D".join(testentry['macros'])
+ execute+=compile_cmd+";"
+
+ execute += self.objdump_cmd.format(elf, self.xlen, 'ref.disass')
+ sig_file = os.path.join(test_dir, self.name[:-1] + ".signature")
+
+ #TODO: You will need to add any other arguments to your DUT
+ # executable if any in the quotes below
+ execute += self.ref_exe + ''
+
+ #TODO: The following is useful only if your reference model can
+ # support coverage extraction from riscv-isac. Else leave it
+ # commented out
+
+ #cov_str = ' '
+ #for label in testentry['coverage_labels']:
+ # cov_str+=' -l '+label
+ #if cgf_file is not None:
+ # coverage_cmd = 'riscv_isac --verbose info coverage -d \
+ # -t {0}.log --mode c_sail -o coverage.rpt \
+ # --sig-label begin_signature end_signature \
+ # --test-label rvtest_code_begin rvtest_code_end \
+ # -e {0}.elf -c {1} -x{2} {3};'.format(\
+ # test_name, ' -c '.join(cgf_file), self.xlen, cov_str)
+ #else:
+ # coverage_cmd = ''
+ #execute+=coverage_cmd
+
+ make.add_target(execute)
+ make.execute_all(self.work_dir)
diff --git a/riscof/Templates/setup/sail_cSim/__init__.py b/riscof/Templates/setup/sail_cSim/__init__.py
new file mode 100644
index 0000000000000000000000000000000000000000..0bfb5a62b4f6c2c8cb1a6a865bc2d4b36ebfa64e
--- /dev/null
+++ b/riscof/Templates/setup/sail_cSim/__init__.py
@@ -0,0 +1,2 @@
+from pkgutil import extend_path
+__path__ = extend_path(__path__, __name__)
\ No newline at end of file
diff --git a/riscof/Templates/setup/sail_cSim/env/link.ld b/riscof/Templates/setup/sail_cSim/env/link.ld
new file mode 100644
index 0000000000000000000000000000000000000000..8ad95e049bedb9b8c3619ed3608028828425628a
--- /dev/null
+++ b/riscof/Templates/setup/sail_cSim/env/link.ld
@@ -0,0 +1,18 @@
+OUTPUT_ARCH( "riscv" )
+ENTRY(rvtest_entry_point)
+
+SECTIONS
+{
+ . = 0x80000000;
+ .text.init : { *(.text.init) }
+ . = ALIGN(0x1000);
+ .tohost : { *(.tohost) }
+ . = ALIGN(0x1000);
+ .text : { *(.text) }
+ . = ALIGN(0x1000);
+ .data : { *(.data) }
+ .data.string : { *(.data.string)}
+ .bss : { *(.bss) }
+ _end = .;
+}
+
diff --git a/riscof/Templates/setup/sail_cSim/env/model_test.h b/riscof/Templates/setup/sail_cSim/env/model_test.h
new file mode 100644
index 0000000000000000000000000000000000000000..5a362683c0c84649e00feb71ba2e5ae54e765f8e
--- /dev/null
+++ b/riscof/Templates/setup/sail_cSim/env/model_test.h
@@ -0,0 +1,60 @@
+#ifndef _COMPLIANCE_MODEL_H
+#define _COMPLIANCE_MODEL_H
+#if XLEN == 64
+ #define ALIGNMENT 3
+#else
+ #define ALIGNMENT 2
+#endif
+
+#define RVMODEL_DATA_SECTION \
+ .pushsection .tohost,"aw",@progbits; \
+ .align 8; .global tohost; tohost: .dword 0; \
+ .align 8; .global fromhost; fromhost: .dword 0; \
+ .popsection; \
+ .align 8; .global begin_regstate; begin_regstate: \
+ .word 128; \
+ .align 8; .global end_regstate; end_regstate: \
+ .word 4;
+
+//RV_COMPLIANCE_HALT
+#define RVMODEL_HALT \
+ li x1, 1; \
+ write_tohost: \
+ sw x1, tohost, t5; \
+ j write_tohost;
+
+#define RVMODEL_BOOT
+
+//RV_COMPLIANCE_DATA_BEGIN
+#define RVMODEL_DATA_BEGIN \
+ RVMODEL_DATA_SECTION \
+ .align ALIGNMENT;\
+ .global begin_signature; begin_signature:
+
+//RV_COMPLIANCE_DATA_END
+#define RVMODEL_DATA_END \
+ .global end_signature; end_signature:
+
+//RVTEST_IO_INIT
+#define RVMODEL_IO_INIT
+//RVTEST_IO_WRITE_STR
+#define RVMODEL_IO_WRITE_STR(_R, _STR)
+//RVTEST_IO_CHECK
+#define RVMODEL_IO_CHECK()
+//RVTEST_IO_ASSERT_GPR_EQ
+#define RVMODEL_IO_ASSERT_GPR_EQ(_S, _R, _I)
+//RVTEST_IO_ASSERT_SFPR_EQ
+#define RVMODEL_IO_ASSERT_SFPR_EQ(_F, _R, _I)
+//RVTEST_IO_ASSERT_DFPR_EQ
+#define RVMODEL_IO_ASSERT_DFPR_EQ(_D, _R, _I)
+
+#define RVMODEL_SET_MSW_INT
+
+#define RVMODEL_CLEAR_MSW_INT
+
+#define RVMODEL_CLEAR_MTIMER_INT
+
+#define RVMODEL_CLEAR_MEXT_INT
+
+
+#endif // _COMPLIANCE_MODEL_H
diff --git a/riscof/Templates/setup/sail_cSim/riscof_sail_cSim.py b/riscof/Templates/setup/sail_cSim/riscof_sail_cSim.py
new file mode 100644
index 0000000000000000000000000000000000000000..9914a8ffbaf24ba55306232f73ecc9072acbabb4
--- /dev/null
+++ b/riscof/Templates/setup/sail_cSim/riscof_sail_cSim.py
@@ -0,0 +1,99 @@
+import os
+import re
+import shutil
+import subprocess
+import shlex
+import logging
+import random
+import string
+from string import Template
+
+import riscof.utils as utils
+from riscof.pluginTemplate import pluginTemplate
+import riscof.constants as constants
+from riscv_isac.isac import isac
+
+logger = logging.getLogger()
+
+class sail_cSim(pluginTemplate):
+ __model__ = "sail_c_simulator"
+ __version__ = "0.5.0"
+
+ def __init__(self, *args, **kwargs):
+ sclass = super().__init__(*args, **kwargs)
+
+ config = kwargs.get('config')
+ self.num_jobs = str(config['jobs'] if 'jobs' in config else 1)
+ self.pluginpath = os.path.abspath(config['pluginpath'])
+ self.sail_exe = { '32' : os.path.join(config['PATH'] if 'PATH' in config else "","riscv_sim_RV32"),
+ '64' : os.path.join(config['PATH'] if 'PATH' in config else "","riscv_sim_RV64")}
+
+ return sclass
+
+ def initialise(self, suite, work_dir, archtest_env):
+ self.suite = suite
+ self.work_dir = work_dir
+ self.objdump_cmd = 'riscv{1}-unknown-elf-objdump -D {0} > {2};'
+ self.compile_cmd = 'riscv{1}-unknown-elf-gcc -march={0} \
+ -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles\
+ -T '+self.pluginpath+'/env/link.ld\
+ -I '+self.pluginpath+'/env/\
+ -I ' + archtest_env
+
+ def build(self, isa_yaml, platform_yaml):
+ ispec = utils.load_yaml(isa_yaml)['hart0']
+ self.xlen = ('64' if 64 in ispec['supported_xlen'] else '32')
+ self.isa = 'rv' + self.xlen
+ self.compile_cmd = self.compile_cmd+' -mabi='+('lp64 ' if 64 in ispec['supported_xlen'] else 'ilp32 ')
+ if "I" in ispec["ISA"]:
+ self.isa += 'i'
+ if "M" in ispec["ISA"]:
+ self.isa += 'm'
+ if "C" in ispec["ISA"]:
+ self.isa += 'c'
+ if "F" in ispec["ISA"]:
+ self.isa += 'f'
+ if "D" in ispec["ISA"]:
+ self.isa += 'd'
+
+ def runTests(self, testList, cgf_file=None):
+ make = utils.makeUtil(makefilePath=os.path.join(self.work_dir, "Makefile." + self.name[:-1]))
+ make.makeCommand = 'make -j' + self.num_jobs
+ for file in testList:
+ testentry = testList[file]
+ test = testentry['test_path']
+ test_dir = testentry['work_dir']
+ test_name = test.rsplit('/',1)[1][:-2]
+
+ elf = 'ref.elf'
+
+ execute = "@cd "+testentry['work_dir']+";"
+
+ cmd = self.compile_cmd.format(testentry['isa'].lower(), self.xlen) + ' ' + test + ' -o ' + elf
+ compile_cmd = cmd + ' -D' + " -D".join(testentry['macros'])
+ execute+=compile_cmd+";"
+
+ execute += self.objdump_cmd.format(elf, self.xlen, 'ref.disass')
+ sig_file = os.path.join(test_dir, self.name[:-1] + ".signature")
+
+ execute += self.sail_exe[self.xlen] + ' --test-signature={0} {1} > {2}.log 2>&1;'.format(sig_file, elf, test_name)
+
+ cov_str = ' '
+ for label in testentry['coverage_labels']:
+ cov_str+=' -l '+label
+
+ if cgf_file is not None:
+ coverage_cmd = 'riscv_isac --verbose info coverage -d \
+ -t {0}.log --mode c_sail -o coverage.rpt \
+ --sig-label begin_signature end_signature \
+ --test-label rvtest_code_begin rvtest_code_end \
+ -e ref.elf -c {1} -x{2} {3};'.format(\
+ test_name, ' -c '.join(cgf_file), self.xlen, cov_str)
+ else:
+ coverage_cmd = ''
+
+
+ execute+=coverage_cmd
+
+ make.add_target(execute)
+ make.execute_all(self.work_dir)
diff --git a/riscof/__init__.py b/riscof/__init__.py
index 4a3e2ef0a3d0db018d9913ee479b21bda8ec0a6e..5a100ade8f626fb043cf7015c3cfd5771ed78654 100644
--- a/riscof/__init__.py
+++ b/riscof/__init__.py
@@ -1,7 +1,7 @@
# See LICENSE.incore for details
-"""Top-level package for RISCOF - RISC-V Compliance Framework."""
+"""Top-level package for RISCOF - RISC-V Architectural Test Framework."""
__author__ = """InCore Semiconductors Pvt Ltd"""
__email__ = 'info@incoresemi.com'
-__version__ = '1.18.4'
+__version__ = '1.19.0'
diff --git a/riscof/constants.py b/riscof/constants.py
index 3db494f18605312a81b9a5afeac22599fb24c64a..d59e72eb7e35497a03bb637956759930381830db 100644
--- a/riscof/constants.py
+++ b/riscof/constants.py
@@ -3,7 +3,16 @@ import os
root = os.path.abspath(os.path.dirname(__file__))
suite = os.path.join(root,"suite/")
-cgf_file = os.path.join(root,"suite/compliance.cgf")
+cgf_dir = os.path.join(root,"coverage/")
+
+cgf_file = []
+cgf_file.append(os.path.join(root,"coverage/dataset.cgf"))
+for path in os.listdir(cgf_dir):
+ if path != 'dataset.cgf':
+ full_path = os.path.join(cgf_dir, path)
+ if os.path.isfile(full_path):
+ cgf_file.append(full_path)
+
framework_db = os.path.join(root, "framework/database.yaml")
cwd = os.getcwd()
work_dir = os.path.join(cwd, "riscof_work/")
@@ -11,6 +20,7 @@ html_template = os.path.join(root, 'Templates/report.html')
coverage_template = os.path.join(root, 'Templates/coverage.html')
css = os.path.join(root, 'Templates/style.css')
env = os.path.join(root, suite + "env/")
+
config_temp = '''[RISCOF]
ReferencePlugin={0}
ReferencePluginPath={1}
@@ -21,6 +31,9 @@ DUTPluginPath={3}
pluginpath={3}
ispec={3}/{2}_isa.yaml
pspec={3}/{2}_platform.yaml
+
+[{0}]
+pluginpath={1}
'''
diff --git a/riscof/coverage/dataset.cgf b/riscof/coverage/dataset.cgf
new file mode 100644
index 0000000000000000000000000000000000000000..d786910062aabdac0f9dafb3170c0bffde9d2cf2
--- /dev/null
+++ b/riscof/coverage/dataset.cgf
@@ -0,0 +1,323 @@
+# For Licence details look at https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg/-/blob/master/LICENSE.incore
+
+datasets:
+ rv32e_regs_mx0: &rv32e_regs_mx0
+ x1: 0
+ x2: 0
+ x3: 0
+ x4: 0
+ x5: 0
+ x6: 0
+ x7: 0
+ x8: 0
+ x9: 0
+ x10: 0
+ x11: 0
+ x12: 0
+ x13: 0
+ x14: 0
+ x15: 0
+ rv32e_regs: &rv32e_regs
+ x0: 0
+ x1: 0
+ x2: 0
+ x3: 0
+ x4: 0
+ x5: 0
+ x6: 0
+ x7: 0
+ x8: 0
+ x9: 0
+ x10: 0
+ x11: 0
+ x12: 0
+ x13: 0
+ x14: 0
+ x15: 0
+
+ all_regs: &all_regs
+ x0: 0
+ x1: 0
+ x2: 0
+ x3: 0
+ x4: 0
+ x5: 0
+ x6: 0
+ x7: 0
+ x8: 0
+ x9: 0
+ x10: 0
+ x11: 0
+ x12: 0
+ x13: 0
+ x14: 0
+ x15: 0
+ x16: 0
+ x17: 0
+ x18: 0
+ x19: 0
+ x20: 0
+ x21: 0
+ x22: 0
+ x23: 0
+ x24: 0
+ x25: 0
+ x26: 0
+ x27: 0
+ x28: 0
+ x29: 0
+ x30: 0
+ x31: 0
+
+ c_regs: &c_regs
+ x8: 0
+ x9: 0
+ x10: 0
+ x11: 0
+ x12: 0
+ x13: 0
+ x14: 0
+ x15: 0
+
+ all_regs_mx2: &all_regs_mx2
+ x1: 0
+ x3: 0
+ x4: 0
+ x5: 0
+ x6: 0
+ x7: 0
+ x8: 0
+ x9: 0
+ x10: 0
+ x11: 0
+ x12: 0
+ x13: 0
+ x14: 0
+ x15: 0
+ x16: 0
+ x17: 0
+ x18: 0
+ x19: 0
+ x20: 0
+ x21: 0
+ x22: 0
+ x23: 0
+ x24: 0
+ x25: 0
+ x26: 0
+ x27: 0
+ x28: 0
+ x29: 0
+ x30: 0
+ x31: 0
+
+ all_regs_mx0: &all_regs_mx0
+ x1: 0
+ x2: 0
+ x3: 0
+ x4: 0
+ x5: 0
+ x6: 0
+ x7: 0
+ x8: 0
+ x9: 0
+ x10: 0
+ x11: 0
+ x12: 0
+ x13: 0
+ x14: 0
+ x15: 0
+ x16: 0
+ x17: 0
+ x18: 0
+ x19: 0
+ x20: 0
+ x21: 0
+ x22: 0
+ x23: 0
+ x24: 0
+ x25: 0
+ x26: 0
+ x27: 0
+ x28: 0
+ x29: 0
+ x30: 0
+ x31: 0
+
+ cbfmt_immval_sgn: &cbfmt_immval_sgn
+ 'imm_val == (-2**(6-1))': 0
+ 'imm_val == 0': 0
+ 'imm_val == (2**(6-1)-1)': 0
+ 'imm_val == 1': 0
+
+ rfmt_op_comb: &rfmt_op_comb
+ 'rs1 == rs2 != rd': 0
+ 'rs1 == rd != rs2': 0
+ 'rs2 == rd != rs1': 0
+ 'rs1 == rs2 == rd': 0
+ 'rs1 != rs2 and rs1 != rd and rs2 != rd': 0
+
+ ifmt_op_comb: &ifmt_op_comb
+ 'rs1 == rd': 0
+ 'rs1 != rd': 0
+
+ sfmt_op_comb: &sfmt_op_comb
+ 'rs1 == rs2': 0
+ 'rs1 != rs2': 0
+
+ base_rs1val_sgn: &base_rs1val_sgn
+ 'rs1_val == (-2**(xlen-1))': 0
+ 'rs1_val == 0': 0
+ 'rs1_val == (2**(xlen-1)-1)': 0
+ 'rs1_val == 1': 0
+
+ base_rs2val_sgn: &base_rs2val_sgn
+ 'rs2_val == (-2**(xlen-1))': 0
+ 'rs2_val == 0': 0
+ 'rs2_val == (2**(xlen-1)-1)': 0
+ 'rs2_val == 1': 0
+
+ base_rs1val_unsgn: &base_rs1val_unsgn
+ 'rs1_val == 0': 0
+ 'rs1_val == (2**(xlen)-1)': 0
+ 'rs1_val == 1': 0
+
+ base_rs2val_unsgn: &base_rs2val_unsgn
+ 'rs2_val == 0': 0
+ 'rs2_val == (2**(xlen)-1)': 0
+ 'rs2_val == 1': 0
+
+ rfmt_val_comb_sgn: &rfmt_val_comb_sgn
+ 'rs1_val > 0 and rs2_val > 0': 0
+ 'rs1_val > 0 and rs2_val < 0': 0
+ 'rs1_val < 0 and rs2_val < 0': 0
+ 'rs1_val < 0 and rs2_val > 0': 0
+ 'rs1_val == rs2_val': 0
+ 'rs1_val != rs2_val': 0
+
+ rfmt_val_comb_unsgn: &rfmt_val_comb_unsgn
+ 'rs1_val > 0 and rs2_val > 0': 0
+ 'rs1_val == rs2_val and rs1_val > 0 and rs2_val > 0': 0
+ 'rs1_val != rs2_val and rs1_val > 0 and rs2_val > 0': 0
+
+ ifmt_val_comb_sgn: &ifmt_val_comb_sgn
+ 'rs1_val == imm_val': 0
+ 'rs1_val != imm_val': 0
+ 'rs1_val > 0 and imm_val > 0': 0
+ 'rs1_val > 0 and imm_val < 0': 0
+ 'rs1_val < 0 and imm_val > 0': 0
+ 'rs1_val < 0 and imm_val < 0': 0
+
+ ifmt_val_comb_unsgn: &ifmt_val_comb_unsgn
+ 'rs1_val == imm_val and rs1_val > 0 and imm_val > 0': 0
+ 'rs1_val != imm_val and rs1_val > 0 and imm_val > 0': 0
+
+ ifmt_base_immval_sgn: &ifmt_base_immval_sgn
+ 'imm_val == (-2**(12-1))': 0
+ 'imm_val == 0': 0
+ 'imm_val == (2**(12-1)-1)': 0
+ 'imm_val == 1': 0
+
+ ifmt_base_immval_unsgn: &ifmt_base_immval_unsgn
+ 'imm_val == 0': 0
+ 'imm_val == (2**(12)-1)': 0
+ 'imm_val == 1': 0
+
+ ifmt_base_shift: &ifmt_base_shift
+ 'rs1_val < 0 and imm_val > 0 and imm_val < xlen': 0
+ 'rs1_val > 0 and imm_val > 0 and imm_val < xlen': 0
+ 'rs1_val < 0 and imm_val == 0': 0
+ 'rs1_val > 0 and imm_val == 0': 0
+ 'rs1_val < 0 and imm_val == (xlen-1)': 0
+ 'rs1_val > 0 and imm_val == (xlen-1)': 0
+ 'rs1_val == imm_val and imm_val > 0 and imm_val < xlen': 0
+ 'rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < xlen': 0
+ 'rs1_val == 0 and imm_val >= 0 and imm_val < xlen': 0
+ 'rs1_val == (2**(xlen-1)-1) and imm_val >= 0 and imm_val < xlen': 0
+ 'rs1_val == 1 and imm_val >= 0 and imm_val < xlen': 0
+
+ ifmt_base_shift_32w: &ifmt_base_shift_32w
+ 'rs1_val < 0 and imm_val > 0 and imm_val < 32': 0
+ 'rs1_val > 0 and imm_val > 0 and imm_val < 32': 0
+ 'rs1_val < 0 and imm_val == 0': 0
+ 'rs1_val > 0 and imm_val == 0': 0
+ 'rs1_val < 0 and imm_val == 31': 0
+ 'rs1_val > 0 and imm_val == 31': 0
+ 'rs1_val == imm_val and imm_val > 0 and imm_val < 32': 0
+ 'rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < 32': 0
+ 'rs1_val == 0 and imm_val >= 0 and imm_val < 32': 0
+ 'rs1_val == (2**(xlen-1)-1) and imm_val >= 0 and imm_val < 32': 0
+ 'rs1_val == 1 and imm_val >= 0 and imm_val < 32': 0
+
+
+ rfmt_base_shift: &rfmt_base_shift
+ 'rs1_val < 0 and rs2_val > 0 and rs2_val < xlen': 0
+ 'rs1_val > 0 and rs2_val > 0 and rs2_val < xlen': 0
+ 'rs1_val < 0 and rs2_val == 0': 0
+ 'rs1_val > 0 and rs2_val == 0': 0
+ 'rs1_val == rs2_val and rs2_val > 0 and rs2_val < xlen': 0
+ 'rs1_val == (-2**(xlen-1)) and rs2_val >= 0 and rs2_val < xlen': 0
+ 'rs1_val == 0 and rs2_val >= 0 and rs2_val < xlen': 0
+ 'rs1_val == (2**(xlen-1)-1) and rs2_val >= 0 and rs2_val < xlen': 0
+ 'rs1_val == 1 and rs2_val >= 0 and rs2_val < xlen': 0
+
+ bfmt_base_branch_val_align_sgn: &bfmt_base_branch_val_align_sgn
+ 'rs1_val > 0 and rs2_val > 0 and imm_val & 0x03 == 0': 0
+ 'rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0': 0
+ 'rs1_val < 0 and rs2_val < 0 and imm_val & 0x03 == 0': 0
+ 'rs1_val < 0 and rs2_val > 0 and imm_val & 0x03 == 0': 0
+ 'rs1_val == rs2_val and imm_val > 0 and imm_val & 0x03 == 0': 0
+ 'rs1_val == rs2_val and imm_val < 0 and imm_val & 0x03 == 0': 0
+ 'rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0': 0
+ 'rs1_val > rs2_val and imm_val < 0 and imm_val & 0x03 == 0': 0
+ 'rs1_val < rs2_val and imm_val > 0 and imm_val & 0x03 == 0': 0
+ 'rs1_val < rs2_val and imm_val < 0 and imm_val & 0x03 == 0': 0
+
+ bfmt_base_branch_val_align_unsgn: &bfmt_base_branch_val_align_unsgn
+ 'rs1_val > 0 and rs2_val > 0': 0
+ 'rs1_val > 0 and rs2_val > 0 and rs1_val == rs2_val and imm_val > 0': 0
+ 'rs1_val > 0 and rs2_val > 0 and rs1_val == rs2_val and imm_val < 0': 0
+ 'rs1_val > 0 and rs2_val > 0 and rs1_val > rs2_val and imm_val > 0 ': 0
+ 'rs1_val > 0 and rs2_val > 0 and rs1_val > rs2_val and imm_val < 0 ': 0
+ 'rs1_val > 0 and rs2_val > 0 and rs1_val < rs2_val and imm_val > 0 ': 0
+ 'rs1_val > 0 and rs2_val > 0 and rs1_val < rs2_val and imm_val < 0 ': 0
+
+ rs1val_walking: &rs1val_walking
+ 'walking_ones("rs1_val", xlen)': 0
+ 'walking_zeros("rs1_val", xlen)': 0
+ 'alternate("rs1_val",xlen)': 0
+
+ rs2val_walking: &rs2val_walking
+ 'walking_ones("rs2_val", xlen)': 0
+ 'walking_zeros("rs2_val", xlen)': 0
+ 'alternate("rs2_val",xlen)': 0
+
+ ifmt_immval_walking: &ifmt_immval_walking
+ 'walking_ones("imm_val", 12)': 0
+ 'walking_zeros("imm_val", 12)': 0
+ 'alternate("imm_val",12)': 0
+
+ rs1val_walking_unsgn: &rs1val_walking_unsgn
+ 'walking_ones("rs1_val", xlen,False)': 0
+ 'walking_zeros("rs1_val", xlen,False)': 0
+ 'alternate("rs1_val",xlen,False)': 0
+
+ rs2val_walking_unsgn: &rs2val_walking_unsgn
+ 'walking_ones("rs2_val", xlen,False)': 0
+ 'walking_zeros("rs2_val", xlen,False)': 0
+ 'alternate("rs2_val",xlen,False)': 0
+
+ crfmt_val_comb_sgn: &crfmt_val_comb_sgn
+ 'rs2_val > 0': 0
+ 'rs2_val < 0': 0
+
+ cbimm_val_walking: &cbimm_val_walking
+ 'walking_ones("imm_val", 6)': 0
+ 'walking_zeros("imm_val", 6)': 0
+ 'alternate("imm_val",6)': 0
+
+ ifmt_immval_walking_unsgn: &ifmt_immval_walking_unsgn
+ 'walking_ones("imm_val", 12,False)': 0
+ 'walking_zeros("imm_val", 12,False)': 0
+ 'alternate("imm_val",12,False)': 0
+
diff --git a/riscof/coverage/rvi.cgf b/riscof/coverage/rvi.cgf
new file mode 100644
index 0000000000000000000000000000000000000000..899bea46bfa5bfe93ec1962610ba5343a1fc9fa6
--- /dev/null
+++ b/riscof/coverage/rvi.cgf
@@ -0,0 +1,1003 @@
+# For Licence details look at https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg/-/blob/master/LICENSE.incore
+
+fence:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ fence: 0
+
+addi:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ addi: 0
+ rs1:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ <<: [ *ifmt_val_comb_sgn, *base_rs1val_sgn, *ifmt_base_immval_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val",("imm_val",12)])': 0
+ <<: [*rs1val_walking, *ifmt_immval_walking]
+
+slti:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ slti: 0
+ rs1:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ <<: [*ifmt_val_comb_sgn , *base_rs1val_sgn , *ifmt_base_immval_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val",("imm_val",12)])': 0
+ <<: [*rs1val_walking, *ifmt_immval_walking]
+
+sltiu:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ sltiu: 0
+ rs1:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ <<: [*ifmt_val_comb_unsgn , *base_rs1val_unsgn , *ifmt_base_immval_unsgn]
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val",("imm_val",12)],signed=False)': 0
+ <<: [*rs1val_walking_unsgn, *ifmt_immval_walking_unsgn]
+
+andi:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ andi: 0
+ rs1:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ <<: [*ifmt_val_comb_sgn , *base_rs1val_sgn , *ifmt_base_immval_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val",("imm_val",12)])': 0
+ <<: [*rs1val_walking, *ifmt_immval_walking]
+
+ori:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ ori: 0
+ rs1:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ <<: [*ifmt_val_comb_sgn , *base_rs1val_sgn , *ifmt_base_immval_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val",("imm_val",12)])': 0
+ <<: [*rs1val_walking, *ifmt_immval_walking]
+
+xori:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ xori: 0
+ rs1:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ <<: [*ifmt_val_comb_sgn , *base_rs1val_sgn , *ifmt_base_immval_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val",("imm_val",12)])': 0
+ <<: [*rs1val_walking, *ifmt_immval_walking]
+
+slli:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ slli: 0
+ rs1:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ <<: *ifmt_base_shift
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val"])': 0
+ <<: [*rs1val_walking]
+ 'walking_ones("imm_val", ceil(log(xlen,2)), False)': 0
+ 'walking_zeros("imm_val", ceil(log(xlen,2)), False)': 0
+ 'alternate("imm_val", ceil(log(xlen,2)), False)': 0
+
+srai:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ srai: 0
+ rs1:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ <<: *ifmt_base_shift
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val"])': 0
+ <<: [*rs1val_walking]
+ 'walking_ones("imm_val", ceil(log(xlen,2)), False)': 0
+ 'walking_zeros("imm_val", ceil(log(xlen,2)), False)': 0
+ 'alternate("imm_val", ceil(log(xlen,2)), False)': 0
+
+srli:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ srli: 0
+ rs1:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ <<: *ifmt_base_shift
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val"])': 0
+ <<: [*rs1val_walking]
+ 'walking_ones("imm_val", ceil(log(xlen,2)), False)': 0
+ 'walking_zeros("imm_val", ceil(log(xlen,2)), False)': 0
+ 'alternate("imm_val", ceil(log(xlen,2)), False)': 0
+
+add:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ add: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+sub:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ sub: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+slt:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ slt: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+sltu:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ sltu: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_unsgn , *base_rs2val_unsgn , *rfmt_val_comb_unsgn]
+ abstract_comb:
+ 'sp_dataset(xlen,signed=False)': 0
+ <<: [*rs1val_walking_unsgn, *rs2val_walking_unsgn]
+
+and:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ and: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+or:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ or: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+xor:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ xor: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+sll:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ sll: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: *rfmt_base_shift
+ abstract_comb:
+ <<: [*rs1val_walking]
+ 'sp_dataset(xlen,var_lst=["rs1_val"])': 0
+ 'walking_ones("rs2_val", ceil(log(xlen,2)), False)': 0
+ 'walking_zeros("rs2_val", ceil(log(xlen,2)), False)': 0
+ 'alternate("rs2_val", ceil(log(xlen,2)), False)': 0
+
+srl:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ srl: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: *rfmt_base_shift
+ abstract_comb:
+ <<: [*rs1val_walking]
+ 'sp_dataset(xlen,var_lst=["rs1_val"])': 0
+ 'walking_ones("rs2_val", ceil(log(xlen,2)), False)': 0
+ 'walking_zeros("rs2_val", ceil(log(xlen,2)), False)': 0
+ 'alternate("rs2_val", ceil(log(xlen,2)), False)': 0
+
+sra:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ sra: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: *rfmt_base_shift
+ abstract_comb:
+ <<: [*rs1val_walking]
+ 'sp_dataset(xlen,var_lst=["rs1_val"])': 0
+ 'walking_ones("rs2_val", ceil(log(xlen,2)), False)': 0
+ 'walking_zeros("rs2_val", ceil(log(xlen,2)), False)': 0
+ 'alternate("rs2_val", ceil(log(xlen,2)), False)': 0
+
+beq:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ beq: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ op_comb:
+ <<: *sfmt_op_comb
+ val_comb:
+ <<: *bfmt_base_branch_val_align_sgn
+ abstract_comb:
+ <<: [*rs1val_walking, *rs2val_walking]
+ 'sp_dataset(xlen)': 0
+
+bge:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ bge: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ op_comb:
+ <<: *sfmt_op_comb
+ val_comb:
+ <<: *bfmt_base_branch_val_align_sgn
+ abstract_comb:
+ <<: [*rs1val_walking, *rs2val_walking]
+ 'sp_dataset(xlen)': 0
+
+bgeu:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ bgeu: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ op_comb:
+ <<: *sfmt_op_comb
+ val_comb:
+ <<: *bfmt_base_branch_val_align_unsgn
+ abstract_comb:
+ <<: [*rs1val_walking_unsgn, *rs2val_walking_unsgn]
+ 'sp_dataset(xlen,signed=False)': 0
+
+blt:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ blt: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ op_comb:
+ <<: *sfmt_op_comb
+ val_comb:
+ <<: *bfmt_base_branch_val_align_sgn
+ abstract_comb:
+ <<: [*rs1val_walking, *rs2val_walking]
+ 'sp_dataset(xlen)': 0
+
+bltu:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ bltu: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ op_comb:
+ <<: *sfmt_op_comb
+ val_comb:
+ <<: *bfmt_base_branch_val_align_unsgn
+ abstract_comb:
+ <<: [*rs1val_walking_unsgn, *rs2val_walking_unsgn]
+ 'sp_dataset(xlen,signed=False)': 0
+
+bne:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ bne: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ op_comb:
+ <<: *sfmt_op_comb
+ val_comb:
+ <<: *bfmt_base_branch_val_align_sgn
+ abstract_comb:
+ <<: [*rs1val_walking, *rs2val_walking]
+ 'sp_dataset(xlen)': 0
+
+lhu-align:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ lhu: 0
+ rs1:
+ <<: *all_regs_mx0
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ 'ea_align == 0 and (imm_val % 4) == 0': 0
+ 'ea_align == 0 and (imm_val % 4) == 1': 0
+ 'ea_align == 0 and (imm_val % 4) == 2': 0
+ 'ea_align == 0 and (imm_val % 4) == 3': 0
+ 'ea_align == 2 and (imm_val % 4) == 0': 0
+ 'ea_align == 2 and (imm_val % 4) == 1': 0
+ 'ea_align == 2 and (imm_val % 4) == 2': 0
+ 'ea_align == 2 and (imm_val % 4) == 3': 0
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ 'imm_val == 0': 0
+
+lh-align:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ lh: 0
+ rs1:
+ <<: *all_regs_mx0
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ 'ea_align == 0 and (imm_val % 4) == 0': 0
+ 'ea_align == 0 and (imm_val % 4) == 1': 0
+ 'ea_align == 0 and (imm_val % 4) == 2': 0
+ 'ea_align == 0 and (imm_val % 4) == 3': 0
+ 'ea_align == 2 and (imm_val % 4) == 0': 0
+ 'ea_align == 2 and (imm_val % 4) == 1': 0
+ 'ea_align == 2 and (imm_val % 4) == 2': 0
+ 'ea_align == 2 and (imm_val % 4) == 3': 0
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ 'imm_val == 0': 0
+
+lbu-align:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ lbu: 0
+ rs1:
+ <<: *all_regs_mx0
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ 'ea_align == 0 and (imm_val % 4) == 0': 0
+ 'ea_align == 0 and (imm_val % 4) == 1': 0
+ 'ea_align == 0 and (imm_val % 4) == 2': 0
+ 'ea_align == 0 and (imm_val % 4) == 3': 0
+ 'ea_align == 2 and (imm_val % 4) == 0': 0
+ 'ea_align == 2 and (imm_val % 4) == 1': 0
+ 'ea_align == 2 and (imm_val % 4) == 2': 0
+ 'ea_align == 2 and (imm_val % 4) == 3': 0
+ 'ea_align == 1 and (imm_val % 4) == 0': 0
+ 'ea_align == 1 and (imm_val % 4) == 1': 0
+ 'ea_align == 1 and (imm_val % 4) == 2': 0
+ 'ea_align == 1 and (imm_val % 4) == 3': 0
+ 'ea_align == 3 and (imm_val % 4) == 0': 0
+ 'ea_align == 3 and (imm_val % 4) == 1': 0
+ 'ea_align == 3 and (imm_val % 4) == 2': 0
+ 'ea_align == 3 and (imm_val % 4) == 3': 0
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ 'imm_val == 0': 0
+
+lb-align:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ lb: 0
+ rs1:
+ <<: *all_regs_mx0
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ 'ea_align == 0 and (imm_val % 4) == 0': 0
+ 'ea_align == 0 and (imm_val % 4) == 1': 0
+ 'ea_align == 0 and (imm_val % 4) == 2': 0
+ 'ea_align == 0 and (imm_val % 4) == 3': 0
+ 'ea_align == 2 and (imm_val % 4) == 0': 0
+ 'ea_align == 2 and (imm_val % 4) == 1': 0
+ 'ea_align == 2 and (imm_val % 4) == 2': 0
+ 'ea_align == 2 and (imm_val % 4) == 3': 0
+ 'ea_align == 1 and (imm_val % 4) == 0': 0
+ 'ea_align == 1 and (imm_val % 4) == 1': 0
+ 'ea_align == 1 and (imm_val % 4) == 2': 0
+ 'ea_align == 1 and (imm_val % 4) == 3': 0
+ 'ea_align == 3 and (imm_val % 4) == 0': 0
+ 'ea_align == 3 and (imm_val % 4) == 1': 0
+ 'ea_align == 3 and (imm_val % 4) == 2': 0
+ 'ea_align == 3 and (imm_val % 4) == 3': 0
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ 'imm_val == 0': 0
+
+lw-align:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ lw: 0
+ rs1:
+ <<: *all_regs_mx0
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ 'ea_align == 0 and (imm_val % 4) == 0': 0
+ 'ea_align == 0 and (imm_val % 4) == 1': 0
+ 'ea_align == 0 and (imm_val % 4) == 2': 0
+ 'ea_align == 0 and (imm_val % 4) == 3': 0
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ 'imm_val == 0': 0
+
+
+sh-align:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ sh: 0
+ rs1:
+ <<: *all_regs_mx0
+ rs2:
+ <<: *all_regs
+ op_comb:
+ 'rs1 != rs2': 0
+ val_comb:
+ <<: [ *base_rs2val_sgn]
+ 'ea_align == 0 and (imm_val % 4) == 0': 0
+ 'ea_align == 0 and (imm_val % 4) == 1': 0
+ 'ea_align == 0 and (imm_val % 4) == 2': 0
+ 'ea_align == 0 and (imm_val % 4) == 3': 0
+ 'ea_align == 2 and (imm_val % 4) == 0': 0
+ 'ea_align == 2 and (imm_val % 4) == 1': 0
+ 'ea_align == 2 and (imm_val % 4) == 2': 0
+ 'ea_align == 2 and (imm_val % 4) == 3': 0
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ 'imm_val == 0': 0
+ abstract_comb:
+ <<: [*rs2val_walking]
+
+sb-align:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ sb: 0
+ rs1:
+ <<: *all_regs_mx0
+ rs2:
+ <<: *all_regs
+ op_comb:
+ 'rs1 != rs2': 0
+ val_comb:
+ 'ea_align == 0 and (imm_val % 4) == 0': 0
+ 'ea_align == 0 and (imm_val % 4) == 1': 0
+ 'ea_align == 0 and (imm_val % 4) == 2': 0
+ 'ea_align == 0 and (imm_val % 4) == 3': 0
+ 'ea_align == 2 and (imm_val % 4) == 0': 0
+ 'ea_align == 2 and (imm_val % 4) == 1': 0
+ 'ea_align == 2 and (imm_val % 4) == 2': 0
+ 'ea_align == 2 and (imm_val % 4) == 3': 0
+ 'ea_align == 1 and (imm_val % 4) == 0': 0
+ 'ea_align == 1 and (imm_val % 4) == 1': 0
+ 'ea_align == 1 and (imm_val % 4) == 2': 0
+ 'ea_align == 1 and (imm_val % 4) == 3': 0
+ 'ea_align == 3 and (imm_val % 4) == 0': 0
+ 'ea_align == 3 and (imm_val % 4) == 1': 0
+ 'ea_align == 3 and (imm_val % 4) == 2': 0
+ 'ea_align == 3 and (imm_val % 4) == 3': 0
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ 'imm_val == 0': 0
+ <<: [ *base_rs2val_sgn]
+ abstract_comb:
+ <<: [*rs2val_walking]
+
+sw-align:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ sw: 0
+ rs1:
+ <<: *all_regs_mx0
+ rs2:
+ <<: *all_regs
+ op_comb:
+ 'rs1 != rs2': 0
+ val_comb:
+ 'ea_align == 0 and (imm_val % 4) == 0': 0
+ 'ea_align == 0 and (imm_val % 4) == 1': 0
+ 'ea_align == 0 and (imm_val % 4) == 2': 0
+ 'ea_align == 0 and (imm_val % 4) == 3': 0
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ 'imm_val == 0': 0
+ <<: [ *base_rs2val_sgn]
+ abstract_comb:
+ <<: [*rs2val_walking]
+
+auipc:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ auipc: 0
+ rd:
+ <<: *all_regs
+ val_comb:
+ 'imm_val == 0': 0
+ 'imm_val > 0': 0
+ 'imm_val == ((2**20)-1)': 0
+ abstract_comb:
+ 'sp_dataset(20,["imm_val"],signed=False)': 0
+ 'walking_ones("imm_val", 20, False)': 0
+ 'walking_zeros("imm_val", 20, False)': 0
+ 'alternate("imm_val", 20, False)': 0
+
+lui:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ lui: 0
+ rd:
+ <<: *all_regs
+ val_comb:
+ 'imm_val == 0': 0
+ 'imm_val > 0': 0
+ 'imm_val == ((2**20)-1)': 0
+ abstract_comb:
+ 'sp_dataset(20,["imm_val"],signed=False)': 0
+ 'walking_ones("imm_val", 20, False)': 0
+ 'walking_zeros("imm_val", 20, False)': 0
+ 'alternate("imm_val", 20, False)': 0
+
+jal:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ jal: 0
+ rd:
+ <<: *all_regs
+ val_comb:
+ 'imm_val < 0' : 0
+ 'imm_val > 0': 0
+ 'imm_val == (-(2**(18)))': 0
+ 'imm_val == ((2**(18)))': 0
+
+jalr:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ jalr: 0
+ rs1:
+ <<: *all_regs_mx0
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ abstract_comb:
+ <<: *ifmt_immval_walking
+
+lwu-align:
+ config:
+ - check ISA:=regex(.*RV64.*I.*)
+ opcode:
+ lwu: 0
+ rs1:
+ <<: *all_regs_mx0
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ 'ea_align == 0 and (imm_val % 4) == 0': 0
+ 'ea_align == 0 and (imm_val % 4) == 1': 0
+ 'ea_align == 0 and (imm_val % 4) == 2': 0
+ 'ea_align == 0 and (imm_val % 4) == 3': 0
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ 'imm_val == 0': 0
+
+ld-align:
+ config:
+ - check ISA:=regex(.*RV64.*I.*)
+ opcode:
+ ld: 0
+ rs1:
+ <<: *all_regs_mx0
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ 'ea_align == 0 and (imm_val % 8) == 0': 0
+ 'ea_align == 0 and (imm_val % 8) == 1': 0
+ 'ea_align == 0 and (imm_val % 8) == 2': 0
+ 'ea_align == 0 and (imm_val % 8) == 3': 0
+ 'ea_align == 0 and (imm_val % 8) == 4': 0
+ 'ea_align == 0 and (imm_val % 8) == 5': 0
+ 'ea_align == 0 and (imm_val % 8) == 6': 0
+ 'ea_align == 0 and (imm_val % 8) == 7': 0
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ 'imm_val == 0': 0
+
+sd-align:
+ config:
+ - check ISA:=regex(.*RV64.*I.*)
+ opcode:
+ sd: 0
+ rs1:
+ <<: *all_regs_mx0
+ rs2:
+ <<: *all_regs
+ op_comb:
+ 'rs1 != rs2': 0
+ val_comb:
+ 'ea_align == 0 and (imm_val % 8) == 0': 0
+ 'ea_align == 0 and (imm_val % 8) == 1': 0
+ 'ea_align == 0 and (imm_val % 8) == 2': 0
+ 'ea_align == 0 and (imm_val % 8) == 3': 0
+ 'ea_align == 0 and (imm_val % 8) == 4': 0
+ 'ea_align == 0 and (imm_val % 8) == 5': 0
+ 'ea_align == 0 and (imm_val % 8) == 6': 0
+ 'ea_align == 0 and (imm_val % 8) == 7': 0
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ 'imm_val == 0': 0
+ <<: [ *base_rs2val_sgn]
+ abstract_comb:
+ <<: [*rs2val_walking]
+
+addiw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*)
+ opcode:
+ addiw: 0
+ rs1:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ <<: [ *ifmt_val_comb_sgn, *base_rs1val_sgn, *ifmt_base_immval_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val",("imm_val",12)])': 0
+ <<: [*rs1val_walking, *ifmt_immval_walking]
+
+slliw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*)
+ opcode:
+ slliw: 0
+ rs1:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ <<: *ifmt_base_shift_32w
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val"])': 0
+ <<: [*rs1val_walking]
+ 'walking_ones("imm_val", 5, False)': 0
+ 'walking_zeros("imm_val", 5, False)': 0
+ 'alternate("imm_val", 5, False)': 0
+
+srliw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*)
+ opcode:
+ srliw: 0
+ rs1:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ <<: *ifmt_base_shift_32w
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val"])': 0
+ <<: [*rs1val_walking]
+ 'walking_ones("imm_val", 5, False)': 0
+ 'walking_zeros("imm_val", 5, False)': 0
+ 'alternate("imm_val", 5, False)': 0
+
+sraiw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*)
+ opcode:
+ sraiw: 0
+ rs1:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *ifmt_op_comb
+ val_comb:
+ <<: *ifmt_base_shift_32w
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val"])': 0
+ <<: [*rs1val_walking]
+ 'walking_ones("imm_val", 5, False)': 0
+ 'walking_zeros("imm_val", 5, False)': 0
+ 'alternate("imm_val", 5, False)': 0
+
+addw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*)
+ opcode:
+ addw: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+subw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*)
+ opcode:
+ subw: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+sllw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*)
+ opcode:
+ sllw: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: *rfmt_base_shift
+ abstract_comb:
+ <<: [*rs1val_walking]
+ 'sp_dataset(xlen,var_lst=["rs1_val"])': 0
+ 'walking_ones("rs2_val", 5, False)': 0
+ 'walking_zeros("rs2_val", 5, False)': 0
+ 'alternate("rs2_val", 5, False)': 0
+
+srlw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*)
+ opcode:
+ srlw: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: *rfmt_base_shift
+ abstract_comb:
+ <<: [*rs1val_walking]
+ 'sp_dataset(xlen,var_lst=["rs1_val"])': 0
+ 'walking_ones("rs2_val", 5, False)': 0
+ 'walking_zeros("rs2_val", 5, False)': 0
+ 'alternate("rs2_val", 5, False)': 0
+sraw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*)
+ opcode:
+ sraw: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: *rfmt_base_shift
+ abstract_comb:
+ <<: [*rs1val_walking]
+ 'sp_dataset(xlen,var_lst=["rs1_val"])': 0
+ 'walking_ones("rs2_val", 5, False)': 0
+ 'walking_zeros("rs2_val", 5, False)': 0
+ 'alternate("rs2_val", 5, False)': 0
diff --git a/riscof/coverage/rvi_c.cgf b/riscof/coverage/rvi_c.cgf
new file mode 100644
index 0000000000000000000000000000000000000000..13642915d5f563a3318844fc358fce9913d7ddf0
--- /dev/null
+++ b/riscof/coverage/rvi_c.cgf
@@ -0,0 +1,586 @@
+# For Licence details look at https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg/-/blob/master/LICENSE.incore
+
+cebreak:
+ config:
+ - check ISA:=regex(.*I.*Zicsr.*.C*)
+ opcode:
+ c.ebreak: 0
+
+caddi4spn:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.addi4spn: 0
+ rd:
+ <<: *c_regs
+ val_comb:
+ 'imm_val > 0' : 0
+ 'imm_val == 1020': 0
+ abstract_comb:
+ 'walking_ones("imm_val", 8,False,scale_func = lambda x: x*4)': 0
+ 'walking_zeros("imm_val", 8,False,scale_func = lambda x: x*4)': 0
+ 'alternate("imm_val",8,False,scale_func = lambda x: x*4)': 0
+
+clw:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.lw: 0
+ rs1:
+ <<: *c_regs
+ rd:
+ <<: *c_regs
+ op_comb:
+ 'rs1 == rd': 0
+ 'rs1 != rd': 0
+ val_comb:
+ 'imm_val > 0': 0
+ 'imm_val == 0': 0
+ abstract_comb:
+ 'walking_ones("imm_val",5,False, scale_func = lambda x: x*4)': 0
+ 'walking_zeros("imm_val",5,False, scale_func = lambda x: x*4)': 0
+ 'alternate("imm_val",5, False,scale_func = lambda x: x*4)': 0
+
+cld:
+ config:
+ - check ISA:=regex(.*RV64.*I.*C.*)
+ opcode:
+ c.ld: 0
+ rs1:
+ <<: *c_regs
+ rd:
+ <<: *c_regs
+ op_comb:
+ 'rs1 == rd': 0
+ 'rs1 != rd': 0
+ val_comb:
+ 'imm_val > 0': 0
+ 'imm_val == 0': 0
+ abstract_comb:
+ 'walking_ones("imm_val",5,False, scale_func = lambda x: x*8)': 0
+ 'walking_zeros("imm_val",5,False, scale_func = lambda x: x*8)': 0
+ 'alternate("imm_val",5, False,scale_func = lambda x: x*8)': 0
+
+csw:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.sw: 0
+ rs1:
+ <<: *c_regs
+ rs2:
+ <<: *c_regs
+ op_comb:
+ 'rs1 != rs2': 0
+ val_comb:
+ 'imm_val > 0': 0
+ 'imm_val == 0': 0
+ <<: [ *base_rs2val_sgn]
+ abstract_comb:
+ <<: [*rs2val_walking]
+ 'walking_ones("imm_val",5,False, scale_func = lambda x: x*4)': 0
+ 'walking_zeros("imm_val",5,False, scale_func = lambda x: x*4)': 0
+ 'alternate("imm_val",5, False,scale_func = lambda x: x*4)': 0
+
+csd:
+ config:
+ - check ISA:=regex(.*RV64.*I.*C.*)
+ opcode:
+ c.sd: 0
+ rs1:
+ <<: *c_regs
+ rs2:
+ <<: *c_regs
+ op_comb:
+ 'rs1 != rs2': 0
+ val_comb:
+ 'imm_val > 0': 0
+ 'imm_val == 0': 0
+ <<: [ *base_rs2val_sgn]
+ abstract_comb:
+ <<: [*rs2val_walking]
+ 'walking_ones("imm_val",5,False, scale_func = lambda x: x*8)': 0
+ 'walking_zeros("imm_val",5,False, scale_func = lambda x: x*8)': 0
+ 'alternate("imm_val",5, False,scale_func = lambda x: x*8)': 0
+
+cnop:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.nop: 0
+ val_comb:
+ abstract_comb:
+ <<: *cbimm_val_walking
+
+caddi:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.addi: 0
+ rd:
+ <<: *all_regs_mx0
+ val_comb:
+ <<: [*base_rs1val_sgn, *cbfmt_immval_sgn, *ifmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val",("imm_val",6)])': 0
+ <<: [*rs1val_walking, *cbimm_val_walking]
+
+cjal:
+ config:
+ - check ISA:=regex(.*RV32.*I.*C.*)
+ opcode:
+ c.jal: 0
+ val_comb:
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ abstract_comb:
+ 'walking_ones("imm_val", 11,fltr_func =lambda x: (x>=10 and x<2030) or (x<=-8 and x>-2030),scale_func = lambda x: x*2)': 0
+ 'walking_zeros("imm_val", 11,fltr_func =lambda x: (x>=10 and x<2030) or (x<=-8 and x>-2030),scale_func = lambda x: x*2)': 0
+ 'alternate("imm_val",11, fltr_func =lambda x: (x>=10 and x<2030) or (x<=-8 and x>-2030) ,scale_func = lambda x: x*2)': 0
+
+
+caddiw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*C.*)
+ opcode:
+ c.addiw: 0
+ rd:
+ <<: *all_regs_mx0
+ val_comb:
+ 'rs1_val == (-2**(xlen-1))': 0
+ 'rs1_val == 0': 0
+ 'rs1_val == (2**(xlen-1)-1)': 0
+ 'rs1_val == 1': 0
+ <<: [*cbfmt_immval_sgn, *ifmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val",("imm_val",6)])': 0
+ 'walking_ones("rs1_val", xlen)': 0
+ 'walking_zeros("rs1_val", xlen)': 0
+ 'alternate("rs1_val",xlen)': 0
+ <<: [*cbimm_val_walking]
+
+cli:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.li: 0
+ rd:
+ <<: *all_regs
+ val_comb:
+ <<: [*cbfmt_immval_sgn]
+ abstract_comb:
+ 'walking_ones("imm_val", 6)': 0
+ 'walking_zeros("imm_val", 6)': 0
+ 'alternate("imm_val", 6)': 0
+
+caddi16sp:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.addi16sp: 0
+ rd:
+ x2: 0
+ val_comb:
+ <<: [*base_rs1val_sgn,*ifmt_val_comb_sgn]
+ 'imm_val == -512': 0
+ 'imm_val == 496': 0
+ abstract_comb:
+ <<: [*rs1val_walking]
+ 'walking_ones("imm_val", 6,True,scale_func = lambda x: x*16)': 0
+ 'walking_zeros("imm_val", 6,True,scale_func = lambda x: x*16)': 0
+ 'alternate("imm_val",6,True,scale_func = lambda x: x*16)': 0
+
+clui:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.lui: 0
+ rd:
+ x0: 0
+ x1: 0
+ x3: 0
+ x4: 0
+ x5: 0
+ x6: 0
+ x7: 0
+ x8: 0
+ x9: 0
+ x10: 0
+ x11: 0
+ x12: 0
+ x13: 0
+ x14: 0
+ x15: 0
+ x16: 0
+ x17: 0
+ x18: 0
+ x19: 0
+ x20: 0
+ x21: 0
+ x22: 0
+ x23: 0
+ x24: 0
+ x25: 0
+ x26: 0
+ x27: 0
+ x28: 0
+ x29: 0
+ x30: 0
+ x31: 0
+
+ val_comb:
+ 'rs1_val > 0 and imm_val > 32': 0
+ 'rs1_val > 0 and imm_val < 32 and imm_val !=0 ': 0
+ 'rs1_val < 0 and imm_val > 32': 0
+ 'rs1_val < 0 and imm_val < 32 and imm_val !=0 ': 0
+ abstract_comb:
+ 'walking_ones("imm_val", 6, False)': 0
+ 'walking_zeros("imm_val", 6, False)': 0
+ 'alternate("imm_val", 6, False)': 0
+
+csrli:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.srli: 0
+ rs1:
+ <<: *c_regs
+ val_comb:
+ 'rs1_val < 0 and imm_val < xlen': 0
+ 'rs1_val > 0 and imm_val < xlen': 0
+ 'rs1_val == imm_val and imm_val != 0 and imm_val < xlen': 0
+ 'rs1_val == (-2**(xlen-1)) and imm_val != 0 and imm_val < xlen': 0
+ 'rs1_val == 0 and imm_val != 0 and imm_val < xlen': 0
+ 'rs1_val == (2**(xlen-1)-1) and imm_val != 0 and imm_val < xlen': 0
+ 'rs1_val == 1 and imm_val != 0 and imm_val < xlen': 0
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val"])': 0
+ <<: [*rs1val_walking]
+ 'walking_ones("imm_val", ceil(log(xlen,2)), False)': 0
+ 'walking_zeros("imm_val", ceil(log(xlen,2)), False)': 0
+ 'alternate("imm_val", ceil(log(xlen,2)), False)': 0
+
+csrai:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.srai: 0
+ rs1:
+ <<: *c_regs
+ val_comb:
+ 'rs1_val < 0 and imm_val < xlen': 0
+ 'rs1_val > 0 and imm_val < xlen': 0
+ 'rs1_val == imm_val and imm_val != 0 and imm_val < xlen': 0
+ 'rs1_val == (-2**(xlen-1)) and imm_val != 0 and imm_val < xlen': 0
+ 'rs1_val == 0 and imm_val != 0 and imm_val < xlen': 0
+ 'rs1_val == (2**(xlen-1)-1) and imm_val != 0 and imm_val < xlen': 0
+ 'rs1_val == 1 and imm_val != 0 and imm_val < xlen': 0
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val"])': 0
+ <<: [*rs1val_walking]
+ 'walking_ones("imm_val", ceil(log(xlen,2)), False)': 0
+ 'walking_zeros("imm_val", ceil(log(xlen,2)), False)': 0
+ 'alternate("imm_val", ceil(log(xlen,2)), False)': 0
+
+candi:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.andi: 0
+ rs1:
+ <<: *c_regs
+ val_comb:
+ <<: [*base_rs1val_sgn,*cbfmt_immval_sgn,*ifmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val",("imm_val",6)])': 0
+ <<: [*rs1val_walking, *cbimm_val_walking]
+
+csub:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.sub: 0
+ rs1:
+ <<: *c_regs
+ rs2:
+ <<: *c_regs
+ op_comb:
+ <<: *sfmt_op_comb
+ val_comb:
+ <<: [*crfmt_val_comb_sgn, *base_rs1val_sgn, *base_rs2val_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking,*rs2val_walking]
+
+cxor:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.xor: 0
+ rs1:
+ <<: *c_regs
+ rs2:
+ <<: *c_regs
+ op_comb:
+ <<: *sfmt_op_comb
+ val_comb:
+ <<: [*crfmt_val_comb_sgn, *base_rs1val_sgn, *base_rs2val_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking,*rs2val_walking]
+
+cor:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.or: 0
+ rs1:
+ <<: *c_regs
+ rs2:
+ <<: *c_regs
+ op_comb:
+ <<: *sfmt_op_comb
+ val_comb:
+ <<: [*crfmt_val_comb_sgn, *base_rs1val_sgn,*base_rs2val_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking,*rs2val_walking]
+
+cand:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.and: 0
+ rs1:
+ <<: *c_regs
+ rs2:
+ <<: *c_regs
+ op_comb:
+ <<: *sfmt_op_comb
+ val_comb:
+ <<: [*crfmt_val_comb_sgn, *base_rs1val_sgn,*base_rs2val_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking,*rs2val_walking]
+
+csubw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*C.*)
+ opcode:
+ c.subw: 0
+ rs1:
+ <<: *c_regs
+ rs2:
+ <<: *c_regs
+ op_comb:
+ <<: *sfmt_op_comb
+ val_comb:
+ <<: [*crfmt_val_comb_sgn, *base_rs1val_sgn, *base_rs2val_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking,*rs2val_walking]
+
+caddw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*C.*)
+ opcode:
+ c.addw: 0
+ rs1:
+ <<: *c_regs
+ rs2:
+ <<: *c_regs
+ op_comb:
+ <<: *sfmt_op_comb
+ val_comb:
+ <<: [*crfmt_val_comb_sgn, *base_rs1val_sgn, *base_rs2val_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking,*rs2val_walking]
+
+cj:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.j: 0
+ val_comb:
+ 'imm_val > 0': 0
+ 'imm_val < 0': 0
+ abstract_comb:
+ 'walking_ones("imm_val", 11,fltr_func =lambda x: (x>=10 and x<2030) or (x<=-8 and x>-2030),scale_func = lambda x: x*2)': 0
+ 'walking_zeros("imm_val", 11,fltr_func =lambda x: (x>=10 and x<2030) or (x<=-8 and x>-2030),scale_func = lambda x: x*2)': 0
+ 'alternate("imm_val",11, fltr_func =lambda x: (x>=10 and x<2030) or (x<=-8 and x>-2030) ,scale_func = lambda x: x*2)': 0
+
+cbeqz:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.beqz: 0
+ rs1:
+ <<: *c_regs
+ val_comb:
+ 'rs1_val > 0 and imm_val > 0': 0
+ 'rs1_val < 0 and imm_val > 0': 0
+ 'rs1_val == 0 and imm_val > 0': 0
+ 'rs1_val > 0 and imm_val < 0': 0
+ 'rs1_val < 0 and imm_val < 0': 0
+ 'rs1_val == 0 and imm_val < 0': 0
+ <<: [*base_rs1val_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val"])': 0
+ <<: [*rs1val_walking]
+
+cbnez:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.bnez: 0
+ rs1:
+ <<: *c_regs
+ val_comb:
+ 'rs1_val > 0 and imm_val > 0': 0
+ 'rs1_val < 0 and imm_val > 0': 0
+ 'rs1_val == 0 and imm_val > 0': 0
+ 'rs1_val > 0 and imm_val < 0': 0
+ 'rs1_val < 0 and imm_val < 0': 0
+ 'rs1_val == 0 and imm_val < 0': 0
+ <<: [*base_rs1val_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val"])': 0
+ <<: [*rs1val_walking]
+
+cslli:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.slli: 0
+ rd:
+ <<: *c_regs
+ val_comb:
+ 'rs1_val < 0 and imm_val < xlen': 0
+ 'rs1_val > 0 and imm_val < xlen': 0
+ 'rs1_val == imm_val and imm_val != 0 and imm_val < xlen': 0
+ 'rs1_val == (-2**(xlen-1)) and imm_val != 0 and imm_val < xlen': 0
+ 'rs1_val == 0 and imm_val != 0 and imm_val < xlen': 0
+ 'rs1_val == (2**(xlen-1)-1) and imm_val != 0 and imm_val < xlen': 0
+ 'rs1_val == 1 and imm_val != 0 and imm_val < xlen': 0
+ abstract_comb:
+ 'sp_dataset(xlen,["rs1_val"])': 0
+ <<: [*rs1val_walking]
+ 'walking_ones("imm_val", ceil(log(xlen,2)), False)': 0
+ 'walking_zeros("imm_val", ceil(log(xlen,2)), False)': 0
+ 'alternate("imm_val", ceil(log(xlen,2)), False)': 0
+
+clwsp:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.lwsp: 0
+ rd:
+ <<: *all_regs_mx0
+ val_comb:
+ 'imm_val > 0': 0
+ 'imm_val == 0': 0
+ abstract_comb:
+ 'walking_ones("imm_val",6,False, scale_func = lambda x: x*4)': 0
+ 'walking_zeros("imm_val",6,False, scale_func = lambda x: x*4)': 0
+ 'alternate("imm_val",6, False,scale_func = lambda x: x*4)': 0
+
+cldsp:
+ config:
+ - check ISA:=regex(.*RV64.*I.*C.*)
+ opcode:
+ c.ldsp: 0
+ rd:
+ <<: *all_regs_mx0
+ val_comb:
+ 'imm_val > 0': 0
+ 'imm_val == 0': 0
+ abstract_comb:
+ 'walking_ones("imm_val",6,False, scale_func = lambda x: x*8)': 0
+ 'walking_zeros("imm_val",6,False, scale_func = lambda x: x*8)': 0
+ 'alternate("imm_val",6, False,scale_func = lambda x: x*8)': 0
+
+cjr:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.jr: 0
+ rs1:
+ <<: *all_regs_mx0
+
+cmv:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.mv: 0
+ rs2:
+ <<: *all_regs_mx0
+ rd:
+ <<: *all_regs
+ op_comb:
+ 'rs2 == rd and rs2 != 0': 0
+ 'rs2 != rd and rs2 != 0': 0
+ val_comb:
+ <<: [*base_rs2val_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen,["rs2_val"])': 0
+ <<: [*rs2val_walking]
+
+cadd:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.add: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs_mx0
+ op_comb:
+ <<: *sfmt_op_comb
+ val_comb:
+ <<: [*crfmt_val_comb_sgn, *base_rs1val_sgn,*base_rs2val_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking,*rs2val_walking]
+
+cjalr:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.jalr: 0
+ rs1:
+ <<: *all_regs_mx0
+
+cswsp:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ opcode:
+ c.swsp: 0
+ rs2:
+ <<: *all_regs_mx2
+ val_comb:
+ 'imm_val > 0': 0
+ 'imm_val == 0': 0
+ <<: [ *base_rs2val_sgn]
+ abstract_comb:
+ <<: [*rs2val_walking]
+ 'walking_ones("imm_val",6,False, scale_func = lambda x: x*4)': 0
+ 'walking_zeros("imm_val",6,False, scale_func = lambda x: x*4)': 0
+ 'alternate("imm_val",6, False,scale_func = lambda x: x*4)': 0
+
+csdsp:
+ config:
+ - check ISA:=regex(.*RV64.*I.*C.*)
+ opcode:
+ c.sdsp: 0
+ rs2:
+ <<: *all_regs_mx2
+ val_comb:
+ 'imm_val > 0': 0
+ 'imm_val == 0': 0
+ <<: [ *base_rs2val_sgn]
+ abstract_comb:
+ <<: [*rs2val_walking]
+ 'walking_ones("imm_val",6,False, scale_func = lambda x: x*8)': 0
+ 'walking_zeros("imm_val",6,False, scale_func = lambda x: x*8)': 0
+ 'alternate("imm_val",6, False,scale_func = lambda x: x*8)': 0
diff --git a/riscof/coverage/rvi_fencei.cgf b/riscof/coverage/rvi_fencei.cgf
new file mode 100644
index 0000000000000000000000000000000000000000..9a32e494d4c3eb967511a07908cc2a296a6fc258
--- /dev/null
+++ b/riscof/coverage/rvi_fencei.cgf
@@ -0,0 +1,8 @@
+
+fencei:
+ config:
+ - check ISA:=regex(.*I.*Zifencei.*)
+ opcode:
+ fence.i: 0
+
+
diff --git a/riscof/coverage/rvi_m.cgf b/riscof/coverage/rvi_m.cgf
new file mode 100644
index 0000000000000000000000000000000000000000..88dd077e7f8f0d76b320944576cf7616372a9477
--- /dev/null
+++ b/riscof/coverage/rvi_m.cgf
@@ -0,0 +1,250 @@
+# For Licence details look at https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg/-/blob/master/LICENSE.incore
+
+mul:
+ config:
+ - check ISA:=regex(.*I.*M.*)
+ opcode:
+ mul: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+mulh:
+ config:
+ - check ISA:=regex(.*I.*M.*)
+ opcode:
+ mulh: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+mulhu:
+ config:
+ - check ISA:=regex(.*I.*M.*)
+ opcode:
+ mulhu: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_unsgn , *base_rs2val_unsgn , *rfmt_val_comb_unsgn]
+ abstract_comb:
+ 'sp_dataset(xlen,signed=False)': 0
+ <<: [*rs1val_walking_unsgn, *rs2val_walking_unsgn]
+
+mulhsu:
+ config:
+ - check ISA:=regex(.*I.*M.*)
+ opcode:
+ mulhsu: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_unsgn, *rfmt_val_comb_unsgn]
+ 'rs1_val < 0 and rs2_val > 0': 0
+ abstract_comb:
+ 'sp_dataset(xlen,[("rs1_val",xlen),("rs2_val",xlen,False)])': 0
+ <<: [*rs1val_walking, *rs2val_walking_unsgn]
+
+div:
+ config:
+ - check ISA:=regex(.*I.*M.*)
+ opcode:
+ div: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+divu:
+ config:
+ - check ISA:=regex(.*I.*M.*)
+ opcode:
+ divu: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_unsgn , *base_rs2val_unsgn , *rfmt_val_comb_unsgn]
+ abstract_comb:
+ 'sp_dataset(xlen,signed=False)': 0
+ <<: [*rs1val_walking_unsgn, *rs2val_walking_unsgn]
+
+rem:
+ config:
+ - check ISA:=regex(.*I.*M.*)
+ opcode:
+ rem: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+remu:
+ config:
+ - check ISA:=regex(.*I.*M.*)
+ opcode:
+ remu: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_unsgn , *base_rs2val_unsgn , *rfmt_val_comb_unsgn]
+ abstract_comb:
+ 'sp_dataset(xlen,signed=False)': 0
+ <<: [*rs1val_walking_unsgn, *rs2val_walking_unsgn]
+
+mulw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*M.*)
+ opcode:
+ mulw: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+divw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*M.*)
+ opcode:
+ divw: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+divuw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*M.*)
+ opcode:
+ divuw: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_unsgn , *base_rs2val_unsgn , *rfmt_val_comb_unsgn]
+ abstract_comb:
+ 'sp_dataset(xlen,signed=False)': 0
+ <<: [*rs1val_walking_unsgn, *rs2val_walking_unsgn]
+
+remw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*M.*)
+ opcode:
+ remw: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_sgn , *base_rs2val_sgn , *rfmt_val_comb_sgn]
+ abstract_comb:
+ 'sp_dataset(xlen)': 0
+ <<: [*rs1val_walking, *rs2val_walking]
+
+remuw:
+ config:
+ - check ISA:=regex(.*RV64.*I.*M.*)
+ opcode:
+ remuw: 0
+ rs1:
+ <<: *all_regs
+ rs2:
+ <<: *all_regs
+ rd:
+ <<: *all_regs
+ op_comb:
+ <<: *rfmt_op_comb
+ val_comb:
+ <<: [*base_rs1val_unsgn , *base_rs2val_unsgn , *rfmt_val_comb_unsgn]
+ abstract_comb:
+ 'sp_dataset(xlen,signed=False)': 0
+ <<: [*rs1val_walking_unsgn, *rs2val_walking_unsgn]
+
diff --git a/riscof/coverage/rvi_priv.cgf b/riscof/coverage/rvi_priv.cgf
new file mode 100644
index 0000000000000000000000000000000000000000..c36521eca118da27915860c4cab0508263b3f059
--- /dev/null
+++ b/riscof/coverage/rvi_priv.cgf
@@ -0,0 +1,201 @@
+ecall:
+ config:
+ - check ISA:=regex(.*I.*); def rvtest_mtrap_routine=True
+ opcode:
+ ecall: 0
+
+ebreak:
+ config:
+ - check ISA:=regex(.*I.*); def rvtest_mtrap_routine=True
+ opcode:
+ ebreak: 0
+
+misalign-lh:
+ cond: check ISA:=regex(.*I.*Zicsr.*)
+ config:
+ - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True
+ - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
+ opcode:
+ lh: 0
+ val_comb:
+ 'ea_align == 1': 0
+
+misalign-lhu:
+ config:
+ - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True
+ - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
+ cond: check ISA:=regex(.*I.*Zicsr.*)
+ opcode:
+ lhu: 0
+ val_comb:
+ 'ea_align == 1': 0
+
+misalign-lwu:
+ config:
+ - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True
+ - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
+ cond: check ISA:=regex(.*64.*I.*Zicsr.*)
+ opcode:
+ lwu: 0
+ val_comb:
+ 'ea_align == 1': 0
+ 'ea_align == 2': 0
+ 'ea_align == 3': 0
+
+misalign-sd:
+ config:
+ - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True
+ - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
+ cond: check ISA:=regex(.*64.*I.*Zicsr.*)
+ opcode:
+ sd: 0
+ val_comb:
+ 'ea_align == 1': 0
+ 'ea_align == 2': 0
+ 'ea_align == 3': 0
+ 'ea_align == 4': 0
+ 'ea_align == 5': 0
+ 'ea_align == 6': 0
+ 'ea_align == 7': 0
+
+misalign-ld:
+ config:
+ - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True
+ - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
+ cond: check ISA:=regex(.*64.*I.*)
+ opcode:
+ ld: 0
+ val_comb:
+ 'ea_align == 1': 0
+ 'ea_align == 2': 0
+ 'ea_align == 3': 0
+ 'ea_align == 4': 0
+ 'ea_align == 5': 0
+ 'ea_align == 6': 0
+ 'ea_align == 7': 0
+
+misalign-lw:
+ config:
+ - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True
+ - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
+ cond: check ISA:=regex(.*I.*Zicsr.*)
+ opcode:
+ lw: 0
+ val_comb:
+ 'ea_align == 1': 0
+ 'ea_align == 2': 0
+ 'ea_align == 3': 0
+
+misalign-sh:
+ config:
+ - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True
+ - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
+ cond: check ISA:=regex(.*I.*Zicsr.*)
+ opcode:
+ sh: 0
+ val_comb:
+ 'ea_align == 1': 0
+
+misalign-sw:
+ config:
+ - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True
+ - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
+ cond: check ISA:=regex(.*I.*Zicsr.*)
+ opcode:
+ sw: 0
+ val_comb:
+ 'ea_align == 1': 0
+ 'ea_align == 2': 0
+ 'ea_align == 3': 0
+
+misalign2-jalr:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ - check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True
+ cond: check ISA:=regex(.*I.*)
+ opcode:
+ jalr: 0
+ val_comb:
+ 'imm_val%2 == 1 and ea_align == 2': 0
+ 'imm_val%2 == 0 and ea_align == 2': 0
+
+misalign1-jalr:
+ config:
+ - check ISA:=regex(.*I.*)
+ opcode:
+ jalr: 0
+ val_comb:
+ 'imm_val%2 == 1 and ea_align == 1': 0
+ 'imm_val%2 == 0 and ea_align == 1': 0
+
+misalign-jal:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ - check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True
+ cond: check ISA:=regex(.*I.*)
+ opcode:
+ jal: 0
+ val_comb:
+ 'ea_align == 2': 0
+
+misalign-bge:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ - check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True
+ cond: check ISA:=regex(.*I.*)
+ opcode:
+ bge: 0
+ val_comb:
+ ' rs1_val>rs2_val and ea_align == 2': 0
+
+misalign-bgeu:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ - check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True
+ cond: check ISA:=regex(.*I.*)
+ opcode:
+ bgeu: 0
+ val_comb:
+ ' rs1_val>rs2_val and ea_align == 2': 0
+
+misalign-blt:
+ config:
+ - check ISA:=regex(.*I.*C.*)
+ - check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True
+ cond: check ISA:=regex(.*I.*)
+ opcode:
+ blt: 0
+ val_comb:
+ ' rs1_val ****/
+ /**** 12: <--------------------- Vect+mode ----------> ****/
+ /*********************************************************************/
+ /* in general, CSRs loaded in t2, addresses into t3 */
+
+ common_mhandler: /* enter with link in t6 */
+ SREG t5, 5*REGWIDTH(sp)
+ SREG t4, 4*REGWIDTH(sp)
+ SREG t3, 3*REGWIDTH(sp)
+ SREG t2, 2*REGWIDTH(sp)
+ SREG t1, 1*REGWIDTH(sp) /* save other temporaries */
+
+ LREG t1, 0(sp) /* load trap sig pointer (runs backwards from DATA_END) */
+
+ LA( t3, mtrampoline)
+ sub t2, t6, t3 /* reloc “link” to 0..63 to show which int vector was taken */
+ addi t2, t2, MMODE_SIG /* insert mode# into 1:0 */
+ SREG t2, 0*REGWIDTH(t1) /* save 1st sig value, (vect, trapmode) */
+ sv_mcause:
+ csrr t2, CSR_MCAUSE
+ SREG t2, 1*REGWIDTH(t1) /* save 2nd sig value, (mcause) */
+
+ bltz t2, common_mint_handler /* this is a interrupt, not a trap */
+
+ /********************************************************************/
+ /**** This is the exceptions specific code, storing relative mepc****/
+ /**** & relative tval signatures. tval is relocated by code or ****/
+ /**** data start, or 0 depending on mcause. mepc signature value ****/
+ /**** is relocated by code start, and restored adjusted depending****/
+ /**** on op alignment so trapped op isn't re-executed. ****/
+ /********************************************************************/
+ common_mexcpt_handler:
+ csrr t2, CSR_MEPC
+ sv_mepc:
+ LA( t3, rvtest_prolog_done) /* offset to compensate for different loader offsets */
+ sub t4, t2, t3 /* convert mepc to rel offset of beginning of test*/
+ SREG t4, 2*REGWIDTH(t1) /* save 3rd sig value, (rel mepc) into trap signature area */
+ adj_mepc: //adj mepc so there is padding after op, and its 8B aligned
+ andi t4, t2, 0x2 /* set to 2 if mepc was misaligned */
+ sub t2, t2, t4 /* adjust mepc to prev 4B alignment */
+ addi t2, t2, 0x8 /* adjust mepc, so it skips past the op, has padding & is 4B aligned */
+ csrw CSR_MEPC, t2 /* restore adjusted value, has 1,2, or 3 bytes of padding */
+
+
+ /* calculate relative mtval if it’s an address (by code_begin or data_begin amt) */
+ /* note that masks that determine this are implementation specific from YAML */
+
+ /* masks are bit reversed, so mcause==0 bit is in MSB (so different for RV32 and RV64) */
+
+ adj_mtval:
+ csrr t2, CSR_MCAUSE /* code begin adjustment amount already in t3 */
+
+ LI(t4, CODE_REL_TVAL_MSK) /* trap#s 12, 3,1,0, -- adjust w/ code_begin */
+ sll t4, t4, t2 /* put bit# in MSB */
+ bltz t4, sv_mtval /* correct adjustment is code_begin in t3 */
+
+ LA( t3, mtrap_sigptr) /* adjustment assuming access is to signature region */
+ LI(t4, DATA_REL_TVAL_MSK) /* trap#s not 14, 11..8, 2 adjust w/ data_begin */
+ sll t4, t4, t2 /* put bit# in MSB */
+ bgez t4, no_adj /* correct adjustment is data_begin in t3 */
+ sigbound_chk:
+ csrr t4, CSR_MTVAL /* do a bounds check on mtval */
+ bge t3, t4, sv_mtval /* if mtval is greater than the rvmodel_data_begin then use that as anchor */
+ LA( t3, rvtest_data_begin) /* else change anchor to rvtest_data_begin */
+ blt t3, t4, sv_mtval /* before the signature, use data_begin adj */
+ mv t4, t3 /* use sig relative adjust */
+ no_adj:
+ LI(t3, 0) /* else zero adjustment amt */
+
+ // For Illegal op handling
+ addi t2, t2, -2 /* check if mcause==2 (illegal op) */
+ bnez t2, sv_mtval /* not illegal op, no special treatment */
+ csrr t2, CSR_MTVAL
+ bnez t2, sv_mtval /* mtval isn’t zero, no special treatment */
+ illop:
+ LI(t5, 0x20000) /* get mprv mask */
+ csrrs t5, CSR_MSTATUS, t5 /* set mprv while saving the old value */
+ csrr t3, CSR_MEPC
+ lhu t2, 0(t3) /* load 1st 16b of opc w/ old priv, endianess*/
+ andi t4, t2, 0x3
+ addi t4, t4, -0x3 /* does opcode[1:0]==0b11? (Meaning >16b op) */
+ bnez t4, sv_mtval /* entire mtval is in tt2, adj amt will be set to zero */
+ lhu t4, 2(t3)
+ sll t4, t4, 16
+ or t3, t2, t4 /* get 2nd hwd, align it & insert it into opcode */
+ csrw CSR_MSTATUS, t5 /* restore mstatus */
+
+/*******FIXME: this will not handle 48 or 64b opcodes in an RV64) ********/
+
+ sv_mtval:
+ csrr t2, CSR_MTVAL
+ sub t2, t2, t3 /* perform mtval adjust by either code or data position or zero*/
+ SREG t2, 3*REGWIDTH(t1) /* save 4th sig value, (rel mtval) into trap signature area */
+
+ resto_rtn: /* restore and return */
+ addi t1, t1,4*REGWIDTH /* adjust trap signature ptr (traps always save 4 words) */
+ SREG t1, 0*REGWIDTH(sp) /* save updated trap sig pointer (pts to trap_sigptr */
+
+ LREG t1, 1*REGWIDTH(sp)
+ LREG t2, 2*REGWIDTH(sp)
+ LREG t3, 3*REGWIDTH(sp)
+ LREG t4, 4*REGWIDTH(sp)
+ LREG t5, 5*REGWIDTH(sp)
+ LREG t6, 6*REGWIDTH(sp) /* restore temporaries */
+
+ csrrw sp, CSR_MSCRATCH, sp /* restore sp from scratch */
+ mret
+
+ common_mint_handler: /* t1 has sig ptr, t2 has mcause */
+
+ LI(t3, 1)
+ sll t3, t3, t2 /* create mask 1<> 11) & 1) << 11))
+
+#define TEST_JALR_OP(tempreg, rd, rs1, imm, swreg, offset,adj) \
+5: ;\
+ LA(rd,5b ) ;\
+ .if adj & 1 == 1 ;\
+ LA(rs1, 3f-imm+adj-1 ) ;\
+ jalr rd, imm+1(rs1) ;\
+ .else ;\
+ LA(rs1, 3f-imm+adj) ;\
+ jalr rd, imm(rs1) ;\
+ .endif ;\
+ nop ;\
+ nop ;\
+ xori rd,rd, 0x2 ;\
+ j 4f ;\
+ ;\
+3: .if adj & 2 == 2 ;\
+ .fill 2,1,0x00 ;\
+ .endif ;\
+ xori rd,rd, 0x3 ;\
+ j 4f ;\
+ .if adj&2 == 2 ;\
+ .fill 2,1,0x00 ;\
+ .endif ;\
+ ;\
+4: LA(tempreg, 5b ) ;\
+ andi tempreg,tempreg,~(3) ;\
+ sub rd,rd,tempreg ;\
+ RVTEST_SIGUPD(swreg,rd,offset)
+//SREG rd, offset(swreg);
+
+#define TEST_JAL_OP(tempreg, rd, imm, label, swreg, offset, adj)\
+5: ;\
+ LA(tempreg, 2f ) ;\
+ jalr x0,0(tempreg) ;\
+6: LA(tempreg, 4f ) ;\
+ jalr x0,0(tempreg) ;\
+1: .if adj & 2 == 2 ;\
+ .fill 2,1,0x00 ;\
+ .endif ;\
+ xori rd,rd, 0x1 ;\
+ beq x0,x0,6b ;\
+ .if adj & 2 == 2 ;\
+ .fill 2,1,0x00 ;\
+ .endif ;\
+ .if (imm/2) - 2 >= 0 ;\
+ .set num,(imm/2)-2 ;\
+ .else ;\
+ .set num,0 ;\
+ .endif ;\
+ .if label == 3f ;\
+ .set num,0 ;\
+ .endif ;\
+ .rept num ;\
+ nop ;\
+ .endr ;\
+ ;\
+2: jal rd, label+(adj) ;\
+ .if adj & 2 == 2 ;\
+ nop ;\
+ nop ;\
+ .endif ;\
+ xori rd,rd, 0x2 ;\
+ j 4f ;\
+ .if (imm/2) - 3 >= 0 ;\
+ .set num,(imm/2)-3 ;\
+ .else ;\
+ .set num,0 ;\
+ .endif ;\
+ .if label == 1b ;\
+ .set num,0 ;\
+ .endif ;\
+ .rept num ;\
+ nop ;\
+ .endr ;\
+3: .if adj & 2 == 2 ;\
+ .fill 2,1,0x00 ;\
+ .endif ;\
+ xori rd,rd, 0x3 ;\
+ LA(tempreg, 4f ) ;\
+ jalr x0,0(tempreg) ;\
+ .if adj&2 == 2 ;\
+ .fill 2,1,0x00 ;\
+ .endif ;\
+4: LA(tempreg, 5b ) ;\
+ andi tempreg,tempreg,~(3) ;\
+ sub rd,rd,tempreg ;\
+ RVTEST_SIGUPD(swreg,rd,offset)
+//SREG rd, offset(swreg);
+
+#define TEST_BRANCH_OP(inst, tempreg, reg1, reg2, val1, val2, imm, label, swreg, offset,adj) \
+ LI(reg1, MASK_XLEN(val1)) ;\
+ LI(reg2, MASK_XLEN(val2)) ;\
+ addi tempreg,x0,0 ;\
+ j 2f ;\
+ ;\
+1: .if adj & 2 == 2 ;\
+ .fill 2,1,0x00 ;\
+ .endif ;\
+ addi tempreg,tempreg, 0x1 ;\
+ j 4f ;\
+ .if adj & 2 == 2 ;\
+ .fill 2,1,0x00 ;\
+ .endif ;\
+ .if (imm/2) - 2 >= 0 ;\
+ .set num,(imm/2)-2 ;\
+ .else ;\
+ .set num,0 ;\
+ .endif ;\
+ .if label == 3f ;\
+ .set num,0 ;\
+ .endif ;\
+ .rept num ;\
+ nop ;\
+ .endr ;\
+ ;\
+2: inst reg1, reg2, label+adj ;\
+ addi tempreg, tempreg,0x2 ;\
+ j 4f ;\
+ .if (imm/4) - 3 >= 0 ;\
+ .set num,(imm/4)-3 ;\
+ .else ;\
+ .set num,0 ;\
+ .endif ;\
+ .if label == 1b ;\
+ .set num,0 ;\
+ .endif ;\
+ .rept num ;\
+ nop ;\
+ .endr ;\
+ ;\
+3: .if adj & 2 == 2 ;\
+ .fill 2,1,0x00 ;\
+ .endif ;\
+ addi tempreg, tempreg,0x3 ;\
+ j 4f ;\
+ .if adj&2 == 2 ;\
+ .fill 2,1,0x00 ;\
+ .endif ;\
+ ;\
+4: RVTEST_SIGUPD(swreg,tempreg,offset)
+//SREG tempreg, offset(swreg);
+
+#define TEST_STORE(swreg,testreg,index,rs1,rs2,rs2_val,imm_val,offset,inst,adj) ;\
+LI(rs2,rs2_val) ;\
+addi rs1,swreg,offset+adj ;\
+LI(testreg,imm_val) ;\
+sub rs1,rs1,testreg ;\
+inst rs2, imm_val(rs1) ;\
+nop ;\
+nop
+
+#define TEST_LOAD(swreg,testreg,index,rs1,destreg,imm_val,offset,inst,adj) ;\
+LA(rs1,rvtest_data+(index*4)+adj-imm_val) ;\
+inst destreg, imm_val(rs1) ;\
+nop ;\
+nop ;\
+RVTEST_SIGUPD(swreg,destreg,offset)
+//SREG destreg, offset(swreg);
+
+#define TEST_CSR_FIELD(ADDRESS,TEMP_REG,MASK_REG,NEG_MASK_REG,VAL,DEST_REG,OFFSET,BASE_REG) \
+ LI(TEMP_REG,VAL);\
+ and TEMP_REG,TEMP_REG,MASK_REG;\
+ csrr DEST_REG,ADDRESS;\
+ and DEST_REG,DEST_REG,NEG_MASK_REG;\
+ or TEMP_REG,TEMP_REG,DEST_REG;\
+ csrw ADDRESS,TEMP_REG;\
+ csrr DEST_REG,ADDRESS;\
+ RVTEST_SIGUPD(BASE_REG,DEST_REG,OFFSET)
+
+
+#define TEST_CASE(testreg, destreg, correctval, swreg, offset, code... ) \
+ code; \
+ RVTEST_SIGUPD(swreg,destreg,offset); \
+ RVMODEL_IO_ASSERT_GPR_EQ(testreg, destreg, correctval)
+
+#define TEST_AUIPC(inst, destreg, correctval, imm, swreg, offset, testreg) \
+ TEST_CASE(testreg, destreg, correctval, swreg, offset, \
+ LA testreg, 1f; \
+ 1: \
+ inst destreg, imm; \
+ sub destreg, destreg, testreg; \
+ )
+
+//Tests for a instructions with register-immediate operand
+#define TEST_IMM_OP( inst, destreg, reg, correctval, val, imm, swreg, offset, testreg) \
+ TEST_CASE(testreg, destreg, correctval, swreg, offset, \
+ LI(reg, MASK_XLEN(val)); \
+ inst destreg, reg, SEXT_IMM(imm); \
+ )
+
+//Tests for a instructions with register-register operand
+#define TEST_RR_OP(inst, destreg, reg1, reg2, correctval, val1, val2, swreg, offset, testreg) \
+ TEST_CASE(testreg, destreg, correctval, swreg, offset, \
+ LI(reg1, MASK_XLEN(val1)); \
+ LI(reg2, MASK_XLEN(val2)); \
+ inst destreg, reg1, reg2; \
+ )
+
+#define TEST_CNOP_OP( inst, testreg, imm_val, swreg, offset) \
+ TEST_CASE(testreg, x0, 0, swreg, offset, \
+ inst imm_val; \
+ )
+
+#define TEST_CMV_OP( inst, destreg, reg, correctval, val2, swreg, offset, testreg) \
+ TEST_CASE(testreg, destreg, correctval, swreg, offset, \
+ LI(reg, MASK_XLEN(val2)); \
+ inst destreg, reg; \
+ )
+
+#define TEST_CR_OP( inst, destreg, reg, correctval, val1, val2, swreg, offset, testreg) \
+ TEST_CASE(testreg, destreg, correctval, swreg, offset, \
+ LI(reg, MASK_XLEN(val2)); \
+ LI(destreg, MASK_XLEN(val1)); \
+ inst destreg, reg; \
+ )
+
+#define TEST_CI_OP( inst, destreg, correctval, val, imm, swreg, offset, testreg) \
+ TEST_CASE(testreg, destreg, correctval, swreg, offset, \
+ LI(destreg, MASK_XLEN(val)); \
+ inst destreg, imm; \
+ )
+
+#define TEST_CADDI4SPN_OP( inst, destreg, correctval, imm, swreg, offset, testreg) \
+ TEST_CASE(testreg, destreg, correctval, swreg, offset, \
+ LI(x2, 0); \
+ inst destreg, x2,imm; \
+ )
+
+#define TEST_CBRANCH_OP(inst, tempreg, reg2, val2, imm, label, swreg, offset) \
+ LI(reg2, MASK_XLEN(val2)) ;\
+ j 2f ;\
+ addi tempreg, x0,0 ;\
+ .option push ;\
+ .option norvc ;\
+1: addi tempreg, tempreg,0x1 ;\
+ j 4f ;\
+ .option pop ;\
+ .if (imm/2) - 4 >= 0 ;\
+ .set num,(imm/2)-4 ;\
+ .else ;\
+ .set num,0 ;\
+ .endif ;\
+ .if label == 3f ;\
+ .set num,0 ;\
+ .endif ;\
+ .rept num ;\
+ c.nop ;\
+ .endr ;\
+2: inst reg2, label ;\
+ .option push ;\
+ .option norvc ;\
+ addi tempreg, tempreg, 0x2 ;\
+ j 4f ;\
+ .option pop ;\
+ .if (imm/2) - 5 >= 0 ;\
+ .set num,(imm/2)-5 ;\
+ .else ;\
+ .set num,0 ;\
+ .endif ;\
+ .if label == 1b ;\
+ .set num,0 ;\
+ .endif ;\
+ .rept num ;\
+ c.nop ;\
+ .endr ;\
+ ;\
+3: addi tempreg, tempreg ,0x3 ;\
+ ;\
+4: RVTEST_SIGUPD(swreg,tempreg,offset)
+//SREG tempreg, offset(swreg);
+
+
+#define TEST_CJ_OP(inst, tempreg, imm, label, swreg, offset) \
+ .option push ;\
+ .option norvc ;\
+ j 2f ;\
+ addi tempreg,x0,0 ;\
+1: addi tempreg, tempreg,0x1 ;\
+ j 4f ;\
+ .option pop ;\
+ .if (imm/2) - 4 >= 0 ;\
+ .set num,(imm/2)-4 ;\
+ .else ;\
+ .set num,0 ;\
+ .endif ;\
+ .if label == 3f ;\
+ .set num,0 ;\
+ .endif ;\
+ .rept num ;\
+ c.nop ;\
+ .endr ;\
+2: inst label ;\
+ .option push ;\
+ .option norvc ;\
+ addi tempreg, tempreg, 0x2 ;\
+ j 4f ;\
+ .option pop ;\
+ .if (imm/2) - 5 >= 0 ;\
+ .set num,(imm/2)-5 ;\
+ .else ;\
+ .set num,0 ;\
+ .endif ;\
+ .if label == 1b ;\
+ .set num,0 ;\
+ .endif ;\
+ .rept num ;\
+ c.nop ;\
+ .endr ;\
+ ;\
+3: addi tempreg, tempreg, 0x3 ;\
+ ;\
+4: RVTEST_SIGUPD(swreg,tempreg,offset)
+//SREG tempreg, offset(swreg);
+
+#define TEST_CJAL_OP(inst, tempreg, imm, label, swreg, offset) \
+5: ;\
+ j 2f ;\
+ ;\
+ .option push ;\
+ .option norvc ;\
+1: xori x1,x1, 0x1 ;\
+ j 4f ;\
+ .option pop ;\
+ .if (imm/2) - 4 >= 0 ;\
+ .set num,(imm/2)-4 ;\
+ .else ;\
+ .set num,0 ;\
+ .endif ;\
+ .if label == 3f ;\
+ .set num,0 ;\
+ .endif ;\
+ .rept num ;\
+ c.nop ;\
+ .endr ;\
+2: inst label ;\
+ .option push ;\
+ .option norvc ;\
+ xori x1,x1, 0x2 ;\
+ j 4f ;\
+ .option pop ;\
+ .if (imm/2) - 5 >= 0 ;\
+ .set num,(imm/2)-5 ;\
+ .else ;\
+ .set num,0 ;\
+ .endif ;\
+ .if label == 1b ;\
+ .set num,0 ;\
+ .endif ;\
+ .rept num ;\
+ c.nop ;\
+ .endr ;\
+ ;\
+3: xori x1,x1, 0x3 ;\
+ ;\
+4: LA(tempreg, 5b) ;\
+ andi tempreg,tempreg,~(3) ;\
+ sub x1,x1,tempreg ;\
+ RVTEST_SIGUPD(swreg,x1,offset)
+//SREG x1, offset(swreg);
+
+#define TEST_CJR_OP(tempreg, rs1, swreg, offset) \
+5: ;\
+ LA(rs1, 3f) ;\
+ ;\
+2: c.jr rs1 ;\
+ xori rs1,rs1, 0x2 ;\
+ j 4f ;\
+ ;\
+3: xori rs1,rs1, 0x3 ;\
+ ;\
+4: LA(tempreg, 5b) ;\
+ andi tempreg,tempreg,~(3) ;\
+ sub rs1,rs1,tempreg ;\
+ RVTEST_SIGUPD(swreg,rs1,offset)
+//SREG rs1, offset(swreg);
+
+#define TEST_CJALR_OP(tempreg, rs1, swreg, offset) \
+5: ;\
+ LA(rs1, 3f ) ;\
+ ;\
+2: c.jalr rs1 ;\
+ xori x1,x1, 0x2 ;\
+ j 4f ;\
+ ;\
+3: xori x1,x1, 0x3 ;\
+ ;\
+4: LA(tempreg, 5b ) ;\
+ andi tempreg,tempreg,~(3) ;\
+ sub x1,x1,tempreg ;\
+ RVTEST_SIGUPD(swreg,x1,offset)
+//SREG x1, offset(swreg);
+
+
+//--------------------------------- Migration aliases ------------------------------------------
+#ifdef RV_COMPLIANCE_RV32M
+ #warning "RV_COMPLIANCE_RV32M macro will be deprecated."
+ #define RVMODEL_BOOT \
+ RVTEST_IO_INIT; \
+ RV_COMPLIANCE_RV32M ; \
+ RV_COMPLIANCE_CODE_BEGIN
+#endif
+
+#define SWSIG(a, b)
+
+#ifdef RV_COMPLIANCE_DATA_BEGIN
+ #warning "RV_COMPLIANCE_DATA_BEGIN macro deprecated in v0.2. Please use RVMODEL_DATA_BEGIN instead"
+ #define RVMODEL_DATA_BEGIN \
+ RV_COMPLIANCE_DATA_BEGIN
+#endif
+
+#ifdef RV_COMPLIANCE_DATA_END
+ #warning "RV_COMPLIANCE_DATA_END macro deprecated in v0.2. Please use RVMODEL_DATA_END instead"
+ #define RVMODEL_DATA_END \
+ RV_COMPLIANCE_DATA_END
+#endif
+
+#ifdef RV_COMPLIANCE_HALT
+ #warning "RV_COMPLIANCE_HALT macro deprecated in v0.2. Please use RVMODEL_HALT instead"
+ #define RVMODEL_HALT \
+ RV_COMPLIANCE_HALT
+#endif
+
+#ifdef RVTEST_IO_ASSERT_GPR_EQ
+ #warning "RVTEST_IO_ASSERT_GPR_EQ macro deprecated in v0.2. Please use RVMODEL_IO_ASSERT_GPR_EQ instead"
+ #define RVMODEL_IO_ASSERT_GPR_EQ(_SP, _R, _I) \
+ RVTEST_IO_ASSERT_GPR_EQ(_SP,_R, _I)
+#endif
+
+#ifdef RVTEST_IO_WRITE_STR
+ #warning "RVTEST_IO_WRITE_STR macro deprecated in v0.2. Please use RVMODEL_IO_WRITE_STR instead"
+ #define RVMODEL_IO_WRITE_STR(_SP, _STR) \
+ RVTEST_IO_WRITE_STR(_SP, _STR)
+#endif
+
+#ifdef RVTEST_IO_INIT
+ #warning "RVTEST_IO_INIT is deprecated in v0.2. Please use RVMODEL_BOOT for initialization"
+#endif
+
+#ifdef RVTEST_IO_CHECK
+ #warning "RVTEST_IO_CHECK is deprecated in v0.2.
+#endif
diff --git a/riscof/suite/env/compliance_test.h b/riscof/suite/env/compliance_test.h
deleted file mode 100644
index 6e783cc322f13f81d3835d24414d40dd2aa52b1e..0000000000000000000000000000000000000000
--- a/riscof/suite/env/compliance_test.h
+++ /dev/null
@@ -1,528 +0,0 @@
-#ifndef _COMPLIANCE_TEST_H
-#define _COMPLIANCE_TEST_H
-
-#include "encoding.h"
-// TODO the following should come from the YAML.
-#ifndef NUM_SPECD_INTCAUSES
-#define NUM_SPECD_INTCAUSES 16
-#endif
-
-//-----------------------------------------------------------------------
-// RV Compliance Macros
-//-----------------------------------------------------------------------
-
-#if XLEN==64
- #define SREG sd
- #define LREG ld
- #define REGWIDTH 8
-#else
- #if XLEN==32
- #define SREG sw
- #define LREG lw
- #define REGWIDTH 4
- #endif
-#endif
-#define MMODE_SIG 3
-#define RLENG (REGWIDTH<<3)
-
-#define RVTEST_ISA(_STR)
-
-// ----------------------------------- CODE BEGIN w/ TRAP HANDLER START ------------------------ //
-.macro RVTEST_CODE_BEGIN
- .section .text.init;
- .globl rvtest_start; \
- rvtest_start:
-#ifdef rvtest_mtrap_routine
- jal rvtest_trap_prolog
-#endif
- .globl rvtest_code_begin
- rvtest_code_begin:
-.endm
-
-// --------------------------------- CODE BEGIN w/ TRAP HANDLER END -----------------------------//
-
-.macro RVTEST_CODE_END
- .align 4;
- .global rvtest_code_end
- rvtest_code_end:
-#ifdef rvtest_mtrap_routine
- .option push
- .option norvc
- j exit_cleanup
-
- rvtest_trap_prolog:
- /******************************************************************************/
- /**** Prolog, to be run before any tests ****/
- /**** #include 1 copy of this per mode in rvmodel_boot code? ****/
- /**** ------------------------------------------------------------------- ****/
- /**** if xTVEC isn't completely RW, then we need to change the code at its ****/
- /**** target. The entire trap trampoline and mtrap handler replaces the ****/
- /**** area pointed to by mtvec, after saving its original contents first. ****/
- /**** If it isn't possible to fully write that area, restore and fail. ****/
- /******************************************************************************/
-
- //trap_handler_prolog; enter with t1..t6 available
-
- // TODO: The initial piece of code kept the mscratch to point to mtrap_sigptr. I have modified it to
- // point to the trapreg_sv. The first entry of the trapreg_sv holds the pointer to the mtrap_sigptr
- // + OFFSET. This allows the trapreg_sv to be outside the signature and independent of relative
- // position from the mtrap_sigptr
- init_mscratch:
- la t1, trapreg_sv
- csrrw t1, mscratch, t1 // swap old mscratch. mscratch not points to trapreg_sv
- la t2, mscratch_save // TODO Lost t2 here
- SREG t1, 0(t2) // save old mscratch in mscratch_save region
- csrr t1, mscratch // read the trapreg_sv address
- la t2, mtrap_sigptr // locate the start of the trap signature
- SREG t2, 0(t1) // save mtrap_sigptr at first location of trapreg_sv
- init_mtvec:
- la t1, mtrampoline
- la t4, mtvec_save
- csrrw t2, mtvec, t1 // swap mtvec and trap_trampoline
- SREG t2, 0(t4) // save orig mtvec
- csrr t3, mtvec // now read new_mtval back
- beq t3, t1, rvtest_code_begin // if mtvec==trap_trampoline, mtvec is writable, continue
-
- /****************************************************************/
- /**** fixed mtvec, can't move it so move trampoline instead ****/
- /**** t1=trampoline, t2=oldmtvec, t3=save area, t4=save end ****/
- /****************************************************************/
-
- init_tramp: /**** copy trampoline at mtvec tgt ****/
- // TODO: its possible that the mtvec is at reset value and not initialized by
- // the Boot-code. But you reached here because the trampoline address does not
- // satify the alignment constraints of the mtvec. restoring with t2 doesn't
- // achieve anything. What could be done here is to load the mtvec with a legal
- // value from the WARL field of the YAML.
-
- csrw mtvec, t2 // restore orig mtvec, will now attemp to copy trampoline to it
- la t3, tramptbl_sv // addr of save area
- addi t4, t2, 64+NUM_SPECD_INTCAUSES*8 // end of save area
-
- overwrite_tt: // now build new trampoline table with offsets base from curr mtvec
- lw t6, 0(t2) // get original mtvec target
- sw t6, 0(t3) // save it
- lw t5, 0(t1) // get trampoline src
- sw t5, 0(t2) // overwrite mtvec target
- lw t6, 0(t2) // rd it back to make sure it was written
- bne t6, t5, resto_tramp // table isn't fully writable, restore and give up
- addi t1, t1, 4 // next src index
- addi t2, t2, 4 // next tgt index
- addi t3, t3, 4 // next save index
- bne t3, t4, overwrite_tt // not done, loop
- j rvtest_code_begin
-
- resto_tramp: // vector table not writeable, restore
- LREG t4, -80-NUM_SPECD_INTCAUSES*8(t5) // load mtvec_SAVE (used as end of loop marker)
- LREG t1, -72-NUM_SPECD_INTCAUSES*8(t5) // load mscratch_SAVE at fixed offset from table end
- csrw mscratch, t1 // restore mscratch
-
-
- resto_loop: // goes backwards, t2= dest vec tbl ptr, t3=src save area ptr, t4=vec tbl begin
- lw t6, 0(t3) // read saved tgt entry
- sw t6, 0(t2) // restore original tgt
- addi t2, t2, -4 // prev tgt index
- addi t3, t3, -4 // prev save index
- bne t2, t4, resto_loop // didn't restore to begining yet, loop
-
- j rvtest_code_end // failure to replace trampoline
-
- // TODO: All the above needs to be put up in a separate macro of subsumed inside the
- // RVTEST_CODE_BEGIN macro but before the rvtest_code_begin
-
- #define mhandler \
- csrrw sp, mscratch, sp; \
- SREG t6, 6*REGWIDTH(sp); \
- la t6, common_mhandler; \
- jalr t6, t6; \
- nop; \
-
- /**********************************************************************/
- /**** This is the entry point for all m-modetraps, vectored or not.****/
- /**** At entry, mscratch will contain a pointer to a scratch area. ****/
- /**** This is an array of branches at 4B intevals that spreads out ****/
- /**** to an array of 32B mhandler macros for specd int causes, and ****/
- /**** to a return for anything above that (which causes a mismatch)****/
- /**********************************************************************/
- mtrampoline: // 64 or 32 entry table
- // TODO: Earlier routine did not iterate the way expected.
- value = 0
- .rept NUM_SPECD_INTCAUSES // located at each possible int vectors
- j mtrap_handler + 32*(value) //offset < +/- 1MB
- value = value + 1
- .endr
- .rept RLENG-NUM_SPECD_INTCAUSES // fill at each impossible entry
- mret
- .endr
-
- mtrap_handler: /* after executing, sp points to temp save area, t4 is PC */
- .rept NUM_SPECD_INTCAUSES
- mhandler
- .endr
- /*********************************************************************/
- /**** common code for all ints & exceptions, will fork to handle ****/
- /**** each separately. The common handler first stores trap mode+ ****/
- /**** vector, and mcause signatures. All traps have 4wd sigs, but ****/
- /**** sw and timer ints only store 3 of the 4. ****/
- /**** sig offset Exception ExtInt SWInt TimerInt ****/
- /**** 0: tval IntID -1 -1 ****/
- /**** 4: mepc mip mip mip ****/
- /**** 8: <---------------------- mcause -------------> ****/
- /**** 12: <--------------------- Vect+mode ----------> ****/
- /*********************************************************************/
- /* in general, CSRs loaded in t2, addresses into t3 */
-
- common_mhandler: /* enter with link in t6 */
- SREG t5, 5*REGWIDTH(sp)
- SREG t4, 4*REGWIDTH(sp)
- SREG t3, 3*REGWIDTH(sp)
- SREG t2, 2*REGWIDTH(sp)
- SREG t1, 1*REGWIDTH(sp) /* save other temporaries */
-
- LREG t1, 0(sp) /* load trap sig pointer (runs backwards from DATA_END) */
-
- la t3, mtrampoline
- sub t2, t6, t3 /* reloc “link” to 0..63 to show which int vector was taken */
- addi t2, t2, MMODE_SIG /* insert mode# into 1:0 */
- SREG t2, 0*REGWIDTH(t1) /* save 1st sig value, (vect, trapmode) */
- sv_mcause:
- csrr t2, mcause
- SREG t2, 1*REGWIDTH(t1) /* save 2nd sig value, (mcause) */
-
- bltz t2, common_mint_handler /* this is a interrupt, not a trap */
-
- /********************************************************************/
- /**** This is the exceptions specific code, storing relative mepc****/
- /**** & relative tval signatures. tval is relocated by code or ****/
- /**** data start, or 0 depending on mcause. mepc signature value ****/
- /**** is relocated by code start, and restored adjusted depending****/
- /**** on op alignment so trapped op isn't re-executed. ****/
- /********************************************************************/
- // TODO: the sigptr also grows downwards (i.e. increments from the previous value) just like the
- // rest of the signature.
- common_mexcpt_handler:
- csrr t2, mepc
- sv_mepc:
- la t3, rvtest_code_begin /* offset to compensate for different loader offsets */
- sub t4, t2, t3 /* convert mepc to rel offset of beginning of test*/
- SREG t4, 2*REGWIDTH(t1) /* save 3rd sig value, (rel mepc) into trap signature area */
- adj_mepc: //adj mepc so there is padding after op, and its 8B aligned
- andi t4, t2, 0x2 /* set to 2 if mepc was misaligned */
- sub t2, t2, t4 /* adjust mepc to prev 4B alignment */
- addi t2, t2, 0x8 /* adjust mepc, so it skips past the op, has padding & is 4B aligned */
- csrw mepc, t2 /* restore adjusted value, has 1,2, or 3 bytes of padding */
-
-
- // TODO: skipped this since not completely convinced.
- /* calculate relative mtval if it’s an address (by code_begin or data_begin amt) */
- /* note that masks that determine this are implementation specific from YAML */
-
- /* masks are bit reversed, so mcause==0 bit is in MSB (so different for RV32 and RV64) */
-
- //adj_mtval:
- // csrr t2, mcause /* code begin adjustment amount already in t3 */
- //
- // li t4, CODE_REL_TVAL_MSK /* trap#s 12, 3,1,0, -- adjust w/ code_begin */
- // sll t4, t4, t2 /* put bit# in MSB */
- // bltz t4, sv_mtval /* correct adjustment is data_begin in t3 */
- //
- // la t3, signature_start /* adjustment for data_begin */
- // li t4, DATA_REL_TVAL_MSK /* trap#s not 14, 11..8, 2 adjust w/ data_begin */
- // sll t4, t4, t2 /* put bit# in MSB */
- // bltz t4, sv_mtval /* correct adjustment is data_begin in t3 */
- //
- // li t3, 0 /* else zero adjustment amt */
- sv_mtval:
- csrr t2, mtval
- sub t2, t2, t3 /* perform mtval adjust by either code or data position or zero*/
- SREG t2, 3*REGWIDTH(t1) /* save 4th sig value, (rel mtval) into trap signature area */
-
- resto_rtn: /* restore and return */
- addi t1, t1,4*REGWIDTH /* adjust trap signature ptr (traps always save 4 words) */
- SREG t1, 0*REGWIDTH(sp) /* save updated trap sig pointer (pts to trap_sigptr */
-
- LREG t1, 1*REGWIDTH(sp)
- LREG t2, 2*REGWIDTH(sp)
- LREG t3, 3*REGWIDTH(sp)
- LREG t4, 4*REGWIDTH(sp)
- LREG t5, 5*REGWIDTH(sp)
- LREG t6, 6*REGWIDTH(sp) /* restore temporaries */
-
- csrrw sp, mscratch, sp /* restore sp from scratch */
- mret
-
- common_mint_handler: /* t1 has sig ptr, t2 has mcause */
-
- li t3, 1
- sll t3, t3, t2 /* create mask 1<=16 are ratified */
-
- 1: // xtvec_installed:
- ret
-
- // ----------------------------------------------------------------------------------------------
- // ----------------------------------------------------------------------------------------------
- // ----------------------------------------------------------------------------------------------
- // ----------------------------------------------------------------------------------------------
-
- // TODO: The following 2 labels need to be put under the RVTEST_CODE_END. Need to ensure its after
- // rvtest_code_end so that the entire test is within the rvtest_code_begin and rvtest_code_end and
- // none of the boot, trap, etc. routines are part of this region.
- exit_cleanup://COMPLIANCE_HALT should get here
- la t3, tramptbl_sv+ 64+NUM_SPECD_INTCAUSES*8 // end of save area
-
- la t5, mtvec_save
- LREG t1, 8(t5)
- csrw mscratch, t1 // restore mscratch
- LREG t4, 0(t5) // load orig mtvec
- csrrw t2, mtvec, t4 // restore mtvec (not redundant)
- bne t4, t2, 1f// if saved!=mtvec, done, else need to restore
-
- addi t2, t4, 64+NUM_SPECD_INTCAUSES*8 // start pt is end of vect area
- resto_vec: // goes backwards, t2= dest vec tbl ptr,
- // t3=src save area ptr, t4=vec tbl begin
- lw t6, 0(t3) // read saved tgt entry
- sw t6, 0(t2) // restore original tgt
- addi t2, t2, -4 // prev tgt index
- addi t3, t3, -4 // prev save index
- bne t2, t4, resto_vec // didn't get to end, continue
- 1:
- rvtest_end:
- .option pop
-#endif
-.endm
-
-
-.macro RVTEST_DATA_BEGIN
-.data
-#ifdef rvtest_mtrap_routine
-trapreg_sv:
- .fill 7, REGWIDTH, 0xdeaddead /* handler reg save area, 1 extra wd just in case */
-tramptbl_sv: // save area of existing trampoline table
-.rept NUM_SPECD_INTCAUSES
- J .+0 /* prototype jump instruction, offset to be filled in */
-.endr
-mtvec_save:
- .dword 0 /* save area for incoming mtvec */
-mscratch_save:
- .dword 0 /* save area for incoming mscratch */
-#endif
-
-.endm
-
-.macro RVTEST_DATA_END
-.align 5;
-.endm
-
-
-#define RVTEST_CASE(_PNAME,_DSTR,...)
-
-#define RVTEST_SIGBASE(_R,_TAG) \
- la _R,_TAG;\
- .set offset,0;
-
-#define RVTEST_SIGUPD(_BR,_R,_TAG)\
- SREG _R,offset(_BR);\
- .set offset,offset+REGWIDTH;
-
-#endif //_COMPLIANCE_TEST_H
-
-//------------------------------ BORROWED FROM ANDREW's RISC-V TEST MACROS -----------------------//
-#define MASK_XLEN(x) ((x) & ((1 << (__riscv_xlen - 1) << 1) - 1))
-
-#define SEXT_IMM(x) ((x) | (-(((x) >> 11) & 1) << 11))
-
-#define TEST_CSR_FIELD(ADDRESS,TEMP_REG,MASK_REG,NEG_MASK_REG,VAL,DEST_REG,OFFSET,BASE_REG) \
- li TEMP_REG,VAL;\
- and TEMP_REG,TEMP_REG,MASK_REG;\
- csrr DEST_REG,ADDRESS;\
- and DEST_REG,DEST_REG,NEG_MASK_REG;\
- or TEMP_REG,TEMP_REG,DEST_REG;\
- csrw ADDRESS,TEMP_REG;\
- csrr DEST_REG,ADDRESS;\
- RVTEST_SIGUPD(BASE_REG,DEST_REG,OFFSET)
-
-
-#define TEST_CASE(testreg, destreg, correctval, swreg, offset, code... ) \
- code; \
- SREG destreg, offset(swreg);
-
-// RVMODEL_IO_ASSERT_GPR_EQ(testreg, destreg, correctval)
-
-
-#define TEST_AUIPC(inst, destreg, correctval, imm, swreg, offset, testreg) \
- TEST_CASE(testreg, destreg, correctval, swreg, offset, \
- 1: \
- inst destreg, imm; \
- la swreg, 1b; \
- sub destreg, destreg, swreg; \
- )
-
-//Tests for a instructions with register-immediate operand
-#define TEST_IMM_OP( inst, destreg, reg, correctval, val, imm, swreg, offset, testreg) \
- TEST_CASE(testreg, destreg, correctval, swreg, offset, \
- li reg, MASK_XLEN(val); \
- inst destreg, reg, SEXT_IMM(imm); \
- )
-
-//Tests for a instructions with register-register operand
-#define TEST_RR_OP(inst, destreg, reg1, reg2, correctval, val1, val2, swreg, offset, testreg) \
- TEST_CASE(testreg, destreg, correctval, swreg, offset, \
- li reg1, MASK_XLEN(val1); \
- li reg2, MASK_XLEN(val2); \
- inst destreg, reg1, reg2; \
- )
-
-#define TEST_RR_SRC2( inst, destreg, reg, correctval, val1, val2, swreg, offset, testreg) \
- TEST_CASE( testreg, destreg, correctval, swreg, offset, \
- li reg, MASK_XLEN(val1); \
- li destreg, MASK_XLEN(val2); \
- inst destreg, reg, destreg; \
- )
-
-#define TEST_CR_OP( inst, destreg, reg, correctval, val1, val2, swreg, offset, testreg) \
- TEST_CASE(testreg, destreg, correctval, swreg, offset, \
- li reg, MASK_XLEN(val1); \
- li destreg, MASK_XLEN(val2); \
- inst destreg, reg; \
- )
-
-#define TEST_CI_OP( inst, destreg, correctval, val, imm, swreg, offset, testreg) \
- TEST_CASE(testreg, destreg, correctval, swreg, offset, \
- li destreg, MASK_XLEN(val); \
- inst destreg, imm; \
- )
-
-#define TEST_CADDI16SP(correctval, imm, swreg, offset, testreg) \
- TEST_CASE(testreg, x2, correctval, swreg, offset, \
- c.addi16sp x2, imm; \
- )
-
-#define TEST_CADDI4SPN(destreg, correctval, imm, swreg, offset, testreg) \
- TEST_CASE(testreg,destreg, correctval, swreg, offset, \
- c.addi4spn destreg, x2, SEXT_IMM(imm); \
- )
-
-#define TEST_CJ(inst, reg, val, swreg, offset, testreg) \
- TEST_CASE(testreg, reg, val, swreg, offset, \
- li reg, val; \
- inst 1f; \
- li reg, 0x123ab; \
-1: \
- )
-
-#define TEST_CJL(inst, reg, val, swreg, offset, testreg) \
- TEST_CASE(testreg, reg, val, swreg, offset, \
- li x10, val; \
- la reg, 1f; \
- inst reg; \
- li x10, 0x123ab; \
-1: \
- )
-
-#define TEST_CBEQZ(reg, val, swreg, offset, testreg) \
- TEST_CASE(testreg, reg, 0x0, swreg, offset, \
- li reg, val; \
- c.sub reg, reg; \
- c.beqz reg, 3f; \
- li reg, 0x123ab; \
-3: \
- )
-
-#define TEST_CBNEZ(reg, val, swreg, offset, testreg) \
- TEST_CASE(testreg, reg, 0x0, swreg, offset, \
- li reg, val; \
- c.bnez reg, 4f; \
- li reg, 0x0; \
-4: \
- )
-
-#define TEST_CL(inst, reg, imm, swreg, offset, testreg, correctval) \
- TEST_CASE(testreg, reg, correctval, swreg, offset, \
- la reg, test_data; \
- inst reg, imm(reg); \
- )
-
-#define TEST_CLWSP(reg, imm, swreg, offset, testreg, correctval) \
- TEST_CASE(testreg, reg, correctval, swreg, offset, \
- la x2, test_data; \
- c.lwsp reg, imm(x2); \
- )
-
-#define TEST_CSW(test_data, inst, reg1, reg2, correctval, imm, swreg, offset, testreg) \
- TEST_CASE(testreg, reg1, correctval, swreg, offset, \
- li reg1, correctval; \
- la reg2, test_data; \
- inst reg1, imm(reg2); \
- lw reg1, imm(reg2); \
- )
-
-#define TEST_CSWSP(test_data, reg, correctval, imm, swreg, offset, testreg) \
- TEST_CASE(testreg, reg, correctval, swreg, offset, \
- la x2, test_data; \
- li reg, correctval; \
- c.swsp reg, imm(x2); \
- lw reg, imm(x2); \
- )
-
diff --git a/riscof/suite/env/encoding.h b/riscof/suite/env/encoding.h
index c109ce189d86d956b53dda88b016e88960fc7539..a39d5b1f3e02f074d1bd0ff5a8b2e24a43843f76 100644
--- a/riscof/suite/env/encoding.h
+++ b/riscof/suite/env/encoding.h
@@ -1,5 +1,27 @@
-// See LICENSE for license details.
+/*
+* Copyright (c) 2012-2015, The Regents of the University of California (Regents).
+* All Rights Reserved.
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+* 1. Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* 2. Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* 3. Neither the name of the Regents nor the
+* names of its contributors may be used to endorse or promote products
+* derived from this software without specific prior written permission.
+* IN NO EVENT SHALL REGENTS BE LIABLE TO ANY PARTY FOR DIRECT, INDIRECT,
+* SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING LOST PROFITS, ARISING
+* OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF REGENTS HAS
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* REGENTS SPECIFICALLY DISCLAIMS ANY WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+* PURPOSE. THE SOFTWARE AND ACCOMPANYING DOCUMENTATION, IF ANY, PROVIDED
+* HEREUNDER IS PROVIDED "AS IS". REGENTS HAS NO OBLIGATION TO PROVIDE
+* MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+*/
#ifndef RISCV_CSR_ENCODING_H
#define RISCV_CSR_ENCODING_H
diff --git a/riscof/suite/rv32i_m/C/C-ADD.S b/riscof/suite/rv32i_m/C/C-ADD.S
deleted file mode 100644
index 898596e00baa7d1e65e63dada7367dd0f897b8e2..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-ADD.S
+++ /dev/null
@@ -1,135 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.ADD-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.ADD.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True", cadd)
-
- # ---------------------------------------------------------------------------------------------
-
-RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CR_OP(c.add, x3, x4, 0, 0x0, 0x0, x2, 0, x31)
- TEST_CR_OP(c.add, x8, x9, 0x1, 0x0, 0x1, x2, 4, x31)
- TEST_CR_OP(c.add, x11, x12, 0xffffffff, 0x0, -0x1, x2, 8, x31)
- TEST_CR_OP(c.add, x13, x14, 0x7fff, 0x0, 0x7fff, x2, 12, x31)
- TEST_CR_OP(c.add, x15, x16, 0x8000, 0x0, 0x8000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CR_OP(c.add, x17, x18, 0x1, 0x1, 0x0, x2, 0, x31)
- TEST_CR_OP(c.add, x19, x20, 0x2, 0x1, 0x1, x2, 4, x31)
- TEST_CR_OP(c.add, x21, x22, 0, 0x1, -0x1, x2, 8, x31)
- TEST_CR_OP(c.add, x23, x24, 0x8000, 0x1, 0x7fff, x2, 12, x31)
- TEST_CR_OP(c.add, x25, x26, 0x8001, 0x1, 0x8000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CR_OP(c.add, x27, x28, 0xffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_CR_OP(c.add, x29, x30, 0, -0x1, 0x1, x2, 4, x31)
- TEST_CR_OP(c.add, x21, x3, 0xfffffffe, -0x1, -0x1, x2, 8, x31)
- TEST_CR_OP(c.add, x4, x8, 0x7ffe, -0x1, 0x7fff, x2, 12, x31)
- TEST_CR_OP(c.add, x9, x11, 0x7fff, -0x1, 0x8000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CR_OP(c.add, x12, x13, 0x7fff, 0x7fff, 0x0, x2, 0, x31)
- TEST_CR_OP(c.add, x14, x15, 0x8000, 0x7fff, 0x1, x2, 4, x31)
- TEST_CR_OP(c.add, x16, x17, 0x7ffe, 0x7fff, -0x1, x2, 8, x31)
- TEST_CR_OP(c.add, x18, x19, 0xfffe, 0x7fff, 0x7fff, x2, 12, x31)
- TEST_CR_OP(c.add, x20, x21, 0xffff, 0x7fff, 0x8000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CR_OP(c.add, x22, x23, 0x8000, 0x8000, 0x0, x2, 0, x31)
- TEST_CR_OP(c.add, x24, x25, 0x8001, 0x8000, 0x1, x2, 4, x31)
- TEST_CR_OP(c.add, x26, x27, 0x7fff, 0x8000, -0x1, x2, 8, x31)
- TEST_CR_OP(c.add, x28, x29, 0xffff, 0x8000, 0x7fff, x2, 12, x31)
- TEST_CR_OP(c.add, x30, x21, 0x10000, 0x8000, 0x8000, x2, 16, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-ADDI.S b/riscof/suite/rv32i_m/C/C-ADDI.S
deleted file mode 100644
index 2abd7a15d4ffb7b1b41a017cfc002eac5a89a68c..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-ADDI.S
+++ /dev/null
@@ -1,135 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.ADDI-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.ADDI.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True", caddi)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CI_OP(c.addi, x3, 0x1, 0x0, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.addi, x4, 0x2, 0x0, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.addi, x8, 0xf, 0x0, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.addi, x9, 0x10, 0x0, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.addi, x11, 0x1f, 0x0, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CI_OP(c.addi, x12, 0x2, 0x1, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.addi, x13, 0x3, 0x1, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.addi, x14, 0x10, 0x1, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.addi, x15, 0x11, 0x1, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.addi, x16, 0x20, 0x1, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CI_OP(c.addi, x17, 0, -0x1, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.addi, x18, 0x1, -0x1, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.addi, x19, 0xe, -0x1, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.addi, x20, 0xf, -0x1, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.addi, x21, 0x1e, -0x1, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CI_OP(c.addi, x22, 0x80000, 0x7ffff, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.addi, x23, 0x80001, 0x7ffff, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.addi, x24, 0x8000e, 0x7ffff, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.addi, x25, 0x8000f, 0x7ffff, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.addi, x26, 0x8001e, 0x7ffff, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CI_OP(c.addi, x27, 0x80001, 0x80000, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.addi, x28, 0x80002, 0x80000, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.addi, x29, 0x8000f, 0x80000, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.addi, x30, 0x80010, 0x80000, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.addi, x21, 0x8001f, 0x80000, 0x1f, x2, 16 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-ADDI16SP.S b/riscof/suite/rv32i_m/C/C-ADDI16SP.S
deleted file mode 100644
index 492f5345c9263cdc38b88af817e2b1b761ff00f2..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-ADDI16SP.S
+++ /dev/null
@@ -1,118 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.ADDI16SP-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.ADDI16SP.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True", caddi16sp)
-
- # initialize SP
- li x2, 0x0
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x1, test_1_res
-
- TEST_CADDI16SP(0x10, 16, x1, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x1, test_2_res
-
- TEST_CADDI16SP(0x30, 32, x1, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x1, test_3_res
-
- TEST_CADDI16SP(0x70, 64, x1, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x1, test_4_res
-
- TEST_CADDI16SP(0x260, 496, x1, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x1, test_5_res
-
- TEST_CADDI16SP(0x60, -512, x1, 0 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 1, 4, -1
-test_2_res:
- .fill 1, 4, -1
-test_3_res:
- .fill 1, 4, -1
-test_4_res:
- .fill 1, 4, -1
-test_5_res:
- .fill 1, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-ADDI4SPN.S b/riscof/suite/rv32i_m/C/C-ADDI4SPN.S
deleted file mode 100644
index 45e421ceac366c63d8447fccbfe0181f9f1a8ec2..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-ADDI4SPN.S
+++ /dev/null
@@ -1,118 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.ADDI4SPN-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.ADDI4SPN.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True", caddi4spn)
-
- # initialize SP
- li x2, 0x0
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x1, test_1_res
-
- TEST_CADDI4SPN(x12, 0x4, 0x4, x1, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x1, test_2_res
-
- TEST_CADDI4SPN(x13, 0x8, 0x8, x1, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x1, test_3_res
-
- TEST_CADDI4SPN(x14, 0xc, 0xc, x1, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x1, test_4_res
-
- TEST_CADDI4SPN(x15, 0x10, 0x10, x1, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x1, test_5_res
-
- TEST_CADDI4SPN(x8, 0x3fc, 0x3fc, x1, 0 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 1, 4, -1
-test_2_res:
- .fill 1, 4, -1
-test_3_res:
- .fill 1, 4, -1
-test_4_res:
- .fill 1, 4, -1
-test_5_res:
- .fill 1, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-AND.S b/riscof/suite/rv32i_m/C/C-AND.S
deleted file mode 100644
index a494bd0f53f3b354c0cf1d9b8590934ba8bf1617..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-AND.S
+++ /dev/null
@@ -1,135 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.AND-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.AND.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True",cand)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CR_OP(c.and, x9, x11, 0x0, 0x0, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.and, x12, x13, 0x0, 0x0, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.and, x14, x15, 0x0, 0x0, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.and, x8, x9, 0x0, 0x0, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.and, x11, x12, 0x0, 0x0, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CR_OP(c.and, x13, x14, 0x0, 0x1, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.and, x15, x8, 0x1, 0x1, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.and, x9, x11, 0x1, 0x1, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.and, x12, x13, 0x1, 0x1, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.and, x14, x15, 0x0, 0x1, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CR_OP(c.and, x8, x9, 0x0, -0x1, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.and, x11, x12, 0x1, -0x1, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.and, x13, x14, 0xffffffff, -0x1, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.and, x15, x8, 0x7fff, -0x1, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.and, x9, x11, 0x8000, -0x1, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CR_OP(c.and, x12, x13, 0x0, 0x7fff, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.and, x14, x15, 0x1, 0x7fff, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.and, x8, x9, 0x7fff, 0x7fff, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.and, x11, x12, 0x7fff, 0x7fff, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.and, x13, x14, 0x0, 0x7fff, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CR_OP(c.and, x15, x8, 0x0, 0x8000, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.and, x9, x11, 0x0, 0x8000, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.and, x12, x13, 0x8000, 0x8000, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.and, x14, x15, 0x0, 0x8000, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.and, x8, x9, 0x8000, 0x8000, 0x8000, x2, 16 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-ANDI.S b/riscof/suite/rv32i_m/C/C-ANDI.S
deleted file mode 100644
index 629e065c514efb3ca4c7c4575535ddf48d79bbab..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-ANDI.S
+++ /dev/null
@@ -1,135 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.ANDI-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.ANDI.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True", candi)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CI_OP(c.andi, x11, 0x0, 0x0, 0x0, x2, 0 , x31)
- TEST_CI_OP(c.andi, x12, 0x0, 0x0, 0x1, x2, 4 , x31)
- TEST_CI_OP(c.andi, x13, 0x0, 0x0, 0x10, x2, 8 , x31)
- TEST_CI_OP(c.andi, x14, 0x0, 0x0, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.andi, x15, 0x0, 0x0, -0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CI_OP(c.andi, x8, 0x0, 0x1, 0x0, x2, 0 , x31)
- TEST_CI_OP(c.andi, x9, 0x1, 0x1, 0x1, x2, 4 , x31)
- TEST_CI_OP(c.andi, x11, 0x0, 0x1, 0x10, x2, 8 , x31)
- TEST_CI_OP(c.andi, x12, 0x1, 0x1, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.andi, x13, 0x1, 0x1, -0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CI_OP(c.andi, x14, 0x0, -0x1, 0x0, x2, 0 , x31)
- TEST_CI_OP(c.andi, x15, 0x1, -0x1, 0x1, x2, 4 , x31)
- TEST_CI_OP(c.andi, x8, 0x10, -0x1, 0x10, x2, 8 , x31)
- TEST_CI_OP(c.andi, x9, 0x1f, -0x1, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.andi, x11, 0xffffffe1, -0x1, -0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CI_OP(c.andi, x12, 0x0, 0x7ffff, 0x0, x2, 0 , x31)
- TEST_CI_OP(c.andi, x13, 0x1, 0x7ffff, 0x1, x2, 4 , x31)
- TEST_CI_OP(c.andi, x14, 0x10, 0x7ffff, 0x10, x2, 8 , x31)
- TEST_CI_OP(c.andi, x15, 0x1f, 0x7ffff, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.andi, x8, 0x7ffe1, 0x7ffff, -0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CI_OP(c.andi, x9, 0x0, 0x80000, 0x0, x2, 0 , x31)
- TEST_CI_OP(c.andi, x11, 0x0, 0x80000, 0x1, x2, 4 , x31)
- TEST_CI_OP(c.andi, x12, 0x0, 0x80000, 0x10, x2, 8 , x31)
- TEST_CI_OP(c.andi, x13, 0x0, 0x80000, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.andi, x14, 0x80000, 0x80000, -0x1f, x2, 16 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-BEQZ.S b/riscof/suite/rv32i_m/C/C-BEQZ.S
deleted file mode 100644
index bacdfa6f4a75c6f31fb191f2534aaf856b857aba..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-BEQZ.S
+++ /dev/null
@@ -1,115 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.BEQZ-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.BEQZ.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True",cbeqz)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CBEQZ(x15, 0x0, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CBEQZ(x8, 0x1, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CBEQZ(x9, -0x1, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CBEQZ(x11, 0x7fff, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CBEQZ(x12, 0x8000, x2, 0 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 1, 4, -1
-test_2_res:
- .fill 1, 4, -1
-test_3_res:
- .fill 1, 4, -1
-test_4_res:
- .fill 1, 4, -1
-test_5_res:
- .fill 1, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-BNEZ.S b/riscof/suite/rv32i_m/C/C-BNEZ.S
deleted file mode 100644
index b9b10ba633333b5849c37b2b175cffaa84920d79..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-BNEZ.S
+++ /dev/null
@@ -1,115 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.BNEZ-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.BNEZ.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True",cbnez)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CBNEZ(x13, 0x0, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CBNEZ(x14, 0x1, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CBNEZ(x15, -0x1, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CBNEZ(x8, 0x7fff, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CBNEZ(x9, 0x8000, x2, 0 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 1, 4, -1
-test_2_res:
- .fill 1, 4, -1
-test_3_res:
- .fill 1, 4, -1
-test_4_res:
- .fill 1, 4, -1
-test_5_res:
- .fill 1, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-J.S b/riscof/suite/rv32i_m/C/C-J.S
deleted file mode 100644
index f8d97724de808a41d35a9eae2322f21285212e23..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-J.S
+++ /dev/null
@@ -1,115 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.J-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.J.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True", cj)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CJ(c.j, x11, 0x0, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CJ(c.j, x12, 0x1, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CJ(c.j, x13, -0x1, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CJ(c.j, x14, 0x7fff, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CJ(c.j, x15, 0x8000, x2, 0 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 1, 4, -1
-test_2_res:
- .fill 1, 4, -1
-test_3_res:
- .fill 1, 4, -1
-test_4_res:
- .fill 1, 4, -1
-test_5_res:
- .fill 1, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-JAL.S b/riscof/suite/rv32i_m/C/C-JAL.S
deleted file mode 100644
index 9e98d47f6b074d567b79b06c0b68e64bafb2cc18..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-JAL.S
+++ /dev/null
@@ -1,115 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.JAL-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.JAL.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True", cjal)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CJ(c.jal, x8, 0x0, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CJ(c.jal, x9, 0x1, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CJ(c.jal, x11, -0x1, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CJ(c.jal, x12, 0x7fff, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CJ(c.jal, x13, 0x8000, x2, 0 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 1, 4, -1
-test_2_res:
- .fill 1, 4, -1
-test_3_res:
- .fill 1, 4, -1
-test_4_res:
- .fill 1, 4, -1
-test_5_res:
- .fill 1, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-JALR.S b/riscof/suite/rv32i_m/C/C-JALR.S
deleted file mode 100644
index 12e36cc7852c92dec87f3e20328c9ed4ac58dedb..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-JALR.S
+++ /dev/null
@@ -1,115 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.JALR-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.JALR.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True", cjalr)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CJL(c.jalr, x12, 0x0, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CJL(c.jalr, x13, 0x1, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CJL(c.jalr, x14, -0x1, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CJL(c.jalr, x15, 0x7fff, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CJL(c.jalr, x16, 0x8000, x2, 0 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 1, 4, -1
-test_2_res:
- .fill 1, 4, -1
-test_3_res:
- .fill 1, 4, -1
-test_4_res:
- .fill 1, 4, -1
-test_5_res:
- .fill 1, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-JR.S b/riscof/suite/rv32i_m/C/C-JR.S
deleted file mode 100644
index e9b5582025d975ddf6bc1c52ba17e727c03a1b35..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-JR.S
+++ /dev/null
@@ -1,115 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.JR-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.JR.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True", cjr)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CJL(c.jr, x3, 0x0, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CJL(c.jr, x4, 0x1, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CJL(c.jr, x8, -0x1, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CJL(c.jr, x9, 0x7fff, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CJL(c.jr, x11, 0x8000, x2, 0 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 1, 4, -1
-test_2_res:
- .fill 1, 4, -1
-test_3_res:
- .fill 1, 4, -1
-test_4_res:
- .fill 1, 4, -1
-test_5_res:
- .fill 1, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-LI.S b/riscof/suite/rv32i_m/C/C-LI.S
deleted file mode 100644
index ae8db3f9acd67b35c19e5c1496c22fc8286ec4a5..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-LI.S
+++ /dev/null
@@ -1,135 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.LI-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.LI.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True", cli)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CI_OP(c.li, x3, 0x0, 0x0, 0x0, x2, 0 , x31)
- TEST_CI_OP(c.li, x4, 0x1, 0x0, 0x1, x2, 4 , x31)
- TEST_CI_OP(c.li, x8, 0x10, 0x0, 0x10, x2, 8 , x31)
- TEST_CI_OP(c.li, x9, 0x1f, 0x0, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.li, x11, 0xffffffe1, 0x0, -0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CI_OP(c.li, x12, 0x0, 0x1, 0x0, x2, 0 , x31)
- TEST_CI_OP(c.li, x13, 0x1, 0x1, 0x1, x2, 4 , x31)
- TEST_CI_OP(c.li, x14, 0x10, 0x1, 0x10, x2, 8 , x31)
- TEST_CI_OP(c.li, x15, 0x1f, 0x1, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.li, x16, 0xffffffe1, 0x1, -0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CI_OP(c.li, x17, 0x0, -0x1, 0x0, x2, 0 , x31)
- TEST_CI_OP(c.li, x18, 0x1, -0x1, 0x1, x2, 4 , x31)
- TEST_CI_OP(c.li, x19, 0x10, -0x1, 0x10, x2, 8 , x31)
- TEST_CI_OP(c.li, x20, 0x1f, -0x1, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.li, x21, 0xffffffe1, -0x1, -0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CI_OP(c.li, x22, 0x0, 0x7ffff, 0x0, x2, 0 , x31)
- TEST_CI_OP(c.li, x23, 0x1, 0x7ffff, 0x1, x2, 4 , x31)
- TEST_CI_OP(c.li, x24, 0x10, 0x7ffff, 0x10, x2, 8 , x31)
- TEST_CI_OP(c.li, x25, 0x1f, 0x7ffff, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.li, x26, 0xffffffe1, 0x7ffff, -0x1f, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CI_OP(c.li, x27, 0x0, 0x80000, 0x0, x2, 0 , x31)
- TEST_CI_OP(c.li, x28, 0x1, 0x80000, 0x1, x2, 4 , x31)
- TEST_CI_OP(c.li, x29, 0x10, 0x80000, 0x10, x2, 8 , x31)
- TEST_CI_OP(c.li, x30, 0x1f, 0x80000, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.li, x21, 0xffffffe1, 0x80000, -0x1f, x2, 16 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-LUI.S b/riscof/suite/rv32i_m/C/C-LUI.S
deleted file mode 100644
index 38667fb2f15fdfde1c192c09bb627dc227fb150f..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-LUI.S
+++ /dev/null
@@ -1,135 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.LUI-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.LUI.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True", clui)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CI_OP(c.lui, x3, 0x1000, 0x0, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.lui, x4, 0x2000, 0x0, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.lui, x8, 0xf000, 0x0, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.lui, x9, 0x0001f000, 0x0, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.lui, x11, 0xfffff000, 0x0, 0xfffff, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CI_OP(c.lui, x12, 0x1000, 0x1, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.lui, x13, 0x2000, 0x1, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.lui, x14, 0xf000, 0x1, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.lui, x15, 0x0001f000, 0x1, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.lui, x16, 0xfffff000, 0x1, 0xfffff, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CI_OP(c.lui, x17, 0x1000, -0x1, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.lui, x18, 0x2000, -0x1, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.lui, x19, 0xf000, -0x1, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.lui, x20, 0x0001f000, -0x1, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.lui, x21, 0xfffff000, -0x1, 0xfffff, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CI_OP(c.lui, x22, 0x1000, 0x7ffff, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.lui, x23, 0x2000, 0x7ffff, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.lui, x24, 0xf000, 0x7ffff, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.lui, x25, 0x0001f000, 0x7ffff, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.lui, x26, 0xfffff000, 0x7ffff, 0xfffff, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CI_OP(c.lui, x27, 0x1000, 0x80000, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.lui, x28, 0x2000, 0x80000, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.lui, x29, 0xf000, 0x80000, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.lui, x30, 0x0001f000, 0x80000, 0x1f, x2, 12 , x31)
- TEST_CI_OP(c.lui, x21, 0xfffff000, 0x80000, 0xfffff, x2, 16 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-LW.S b/riscof/suite/rv32i_m/C/C-LW.S
deleted file mode 100644
index 5d35d9d4456b858e051075c2f565b8a921ae8d26..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-LW.S
+++ /dev/null
@@ -1,124 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.LW-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.LW.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True", clw)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CL(c.lw, x14, 0, x2, 0 , x31, 0x11111111)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CL(c.lw, x15, 4, x2, 0 , x31, 0x22222222)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CL(c.lw, x8, 8, x2, 0 , x31, 0x33333333)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CL(c.lw, x9, 100, x2, 0 , x31, 0x44444444)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CL(c.lw, x13, 124, x2, 0 , x31, 0x55555555)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-.align 4
-test_data:
- .word 0x11111111
- .word 0x22222222
- .word 0x33333333
- .fill 22, 4, -1
- .word 0x44444444
- .fill 5, 4, -1
- .word 0x55555555
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 1, 4, -1
-test_2_res:
- .fill 1, 4, -1
-test_3_res:
- .fill 1, 4, -1
-test_4_res:
- .fill 1, 4, -1
-test_5_res:
- .fill 1, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-LWSP.S b/riscof/suite/rv32i_m/C/C-LWSP.S
deleted file mode 100644
index a9a2807aec62a8a6ecd6dc087d853d5efd7093ff..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-LWSP.S
+++ /dev/null
@@ -1,125 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.LWSP-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.LWSP.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True",clwsp)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x1, test_1_res
-
- TEST_CLWSP(x4, 0, x1, 0 , x31, 0x11111111)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x1, test_2_res
-
- TEST_CLWSP(x8, 4, x1, 0 , x31, 0x22222222)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x1, test_3_res
-
- TEST_CLWSP(x16, 8, x1, 0 , x31, 0x33333333)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x1, test_4_res
-
- TEST_CLWSP(x21, 124, x1, 0 , x31, 0x44444444)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x1, test_5_res
-
- TEST_CLWSP(x21, 252, x1, 0 , x31, 0x55555555)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-.align 4
-test_data:
- .word 0x11111111
- .word 0x22222222
- .word 0x33333333
- .fill 28, 4, -1
- .word 0x44444444
- .fill 31, 4, -1
- .word 0x55555555
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 1, 4, -1
-test_2_res:
- .fill 1, 4, -1
-test_3_res:
- .fill 1, 4, -1
-test_4_res:
- .fill 1, 4, -1
-test_5_res:
- .fill 1, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/C/C-MV.S b/riscof/suite/rv32i_m/C/C-MV.S
deleted file mode 100644
index 5781a85a5004e8e2dceeb13297545266dad149cd..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-MV.S
+++ /dev/null
@@ -1,135 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.MV-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.MV.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True",cmv)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CR_OP(c.mv, x11, x12, 0x0, 0x0, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.mv, x13, x14, 0x0, 0x0, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.mv, x15, x8, 0x0, 0x0, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.mv, x9, x11, 0x0, 0x0, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.mv, x12, x13, 0x0, 0x0, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CR_OP(c.mv, x14, x15, 0x1, 0x1, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.mv, x8, x9, 0x1, 0x1, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.mv, x11, x12, 0x1, 0x1, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.mv, x13, x14, 0x1, 0x1, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.mv, x15, x8, 0x1, 0x1, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CR_OP(c.mv, x9, x11, 0xffffffff, -0x1, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.mv, x12, x13, 0xffffffff, -0x1, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.mv, x14, x15, 0xffffffff, -0x1, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.mv, x8, x9, 0xffffffff, -0x1, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.mv, x11, x12, 0xffffffff, -0x1, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CR_OP(c.mv, x13, x14, 0x7fff, 0x7fff, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.mv, x15, x8, 0x7fff, 0x7fff, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.mv, x9, x11, 0x7fff, 0x7fff, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.mv, x12, x13, 0x7fff, 0x7fff, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.mv, x14, x15, 0x7fff, 0x7fff, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CR_OP(c.mv, x8, x9, 0x8000, 0x8000, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.mv, x11, x12, 0x8000, 0x8000, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.mv, x13, x14, 0x8000, 0x8000, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.mv, x15, x8, 0x8000, 0x8000, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.mv, x9, x11, 0x8000, 0x8000, 0x8000, x2, 16 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-OR.S b/riscof/suite/rv32i_m/C/C-OR.S
deleted file mode 100644
index ce8e0d9b2dda076e977f169f1c60b44977511c10..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-OR.S
+++ /dev/null
@@ -1,135 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.OR-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.OR.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True",cor)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CR_OP(c.or, x15, x8, 0x0, 0x0, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.or, x9, x11, 0x1, 0x0, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.or, x12, x13, 0xffffffff, 0x0, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.or, x14, x15, 0x7fff, 0x0, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.or, x8, x9, 0x8000, 0x0, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CR_OP(c.or, x11, x12, 0x1, 0x1, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.or, x13, x14, 0x1, 0x1, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.or, x15, x8, 0xffffffff, 0x1, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.or, x9, x11, 0x7fff, 0x1, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.or, x12, x13, 0x8001, 0x1, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CR_OP(c.or, x14, x15, 0xffffffff, -0x1, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.or, x8, x9, 0xffffffff, -0x1, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.or, x11, x12, 0xffffffff, -0x1, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.or, x13, x14, 0xffffffff, -0x1, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.or, x15, x8, 0xffffffff, -0x1, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CR_OP(c.or, x9, x11, 0x7fff, 0x7fff, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.or, x12, x13, 0x7fff, 0x7fff, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.or, x14, x15, 0xffffffff, 0x7fff, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.or, x8, x9, 0x7fff, 0x7fff, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.or, x11, x12, 0xffff, 0x7fff, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CR_OP(c.or, x13, x14, 0x8000, 0x8000, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.or, x15, x8, 0x8001, 0x8000, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.or, x9, x11, 0xffffffff, 0x8000, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.or, x12, x13, 0xffff, 0x8000, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.or, x14, x15, 0x8000, 0x8000, 0x8000, x2, 16 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-SLLI.S b/riscof/suite/rv32i_m/C/C-SLLI.S
deleted file mode 100644
index 4616e3f92e93c4d8eb00570ea01e8d0b33709a3d..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-SLLI.S
+++ /dev/null
@@ -1,135 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.SLLI-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.SLLI.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True",cslli)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CI_OP(c.slli, x3, 0x0, 0x0, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.slli, x4, 0x0, 0x0, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.slli, x8, 0x0, 0x0, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.slli, x9, 0x0, 0x0, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.slli, x11, 0x0, 0x0, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CI_OP(c.slli, x12, 0x2, 0x1, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.slli, x13, 0x4, 0x1, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.slli, x14, 0x8000, 0x1, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.slli, x15, 0x10000, 0x1, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.slli, x16, 0x80000000, 0x1, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CI_OP(c.slli, x17, 0xfffffffe, -0x1, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.slli, x18, 0xfffffffc, -0x1, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.slli, x19, 0xffff8000, -0x1, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.slli, x20, 0xffff0000, -0x1, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.slli, x21, 0x80000000, -0x1, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CI_OP(c.slli, x22, 0xffffe, 0x7ffff, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.slli, x23, 0x1ffffc, 0x7ffff, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.slli, x24, 0xffff8000, 0x7ffff, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.slli, x25, 0xffff0000, 0x7ffff, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.slli, x26, 0x80000000, 0x7ffff, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CI_OP(c.slli, x27, 0x100000, 0x80000, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.slli, x28, 0x200000, 0x80000, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.slli, x29, 0x0, 0x80000, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.slli, x30, 0x0, 0x80000, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.slli, x21, 0x0, 0x80000, 0x1f, x2, 16 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-SRAI.S b/riscof/suite/rv32i_m/C/C-SRAI.S
deleted file mode 100644
index fbdbdb7306873312a810cad7f3c516f8e158be59..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-SRAI.S
+++ /dev/null
@@ -1,135 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.SRAI-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.SRAI.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True", csrai)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CI_OP(c.srai, x9, 0x0, 0x0, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.srai, x11, 0x0, 0x0, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.srai, x12, 0x0, 0x0, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.srai, x13, 0x0, 0x0, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.srai, x14, 0x0, 0x0, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CI_OP(c.srai, x15, 0x0, 0x1, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.srai, x8, 0x0, 0x1, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.srai, x9, 0x0, 0x1, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.srai, x11, 0x0, 0x1, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.srai, x12, 0x0, 0x1, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CI_OP(c.srai, x13, 0xffffffff, -0x1, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.srai, x14, 0xffffffff, -0x1, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.srai, x15, 0xffffffff, -0x1, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.srai, x8, 0xffffffff, -0x1, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.srai, x9, 0xffffffff, -0x1, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CI_OP(c.srai, x11, 0x3ffff, 0x7ffff, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.srai, x12, 0x1ffff, 0x7ffff, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.srai, x13, 0xf, 0x7ffff, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.srai, x14, 0x7, 0x7ffff, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.srai, x15, 0x0, 0x7ffff, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CI_OP(c.srai, x8, 0x40000, 0x80000, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.srai, x9, 0x20000, 0x80000, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.srai, x11, 0x10, 0x80000, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.srai, x12, 0x8, 0x80000, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.srai, x13, 0x0, 0x80000, 0x1f, x2, 16 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-SRLI.S b/riscof/suite/rv32i_m/C/C-SRLI.S
deleted file mode 100644
index 6ae61e47a0faaef518cbf29aaa3b9cec037bf506..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-SRLI.S
+++ /dev/null
@@ -1,135 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.SRLI-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.SRLI.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True",csrli)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CI_OP(c.srli, x14, 0x0, 0x0, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.srli, x15, 0x0, 0x0, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.srli, x8, 0x0, 0x0, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.srli, x9, 0x0, 0x0, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.srli, x11, 0x0, 0x0, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CI_OP(c.srli, x12, 0x0, 0x1, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.srli, x13, 0x0, 0x1, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.srli, x14, 0x0, 0x1, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.srli, x15, 0x0, 0x1, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.srli, x8, 0x0, 0x1, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CI_OP(c.srli, x9, 0x7fffffff, -0x1, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.srli, x11, 0x3fffffff, -0x1, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.srli, x12, 0x1ffff, -0x1, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.srli, x13, 0xffff, -0x1, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.srli, x14, 0x1, -0x1, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CI_OP(c.srli, x15, 0x3ffff, 0x7ffff, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.srli, x8, 0x1ffff, 0x7ffff, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.srli, x9, 0xf, 0x7ffff, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.srli, x11, 0x7, 0x7ffff, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.srli, x12, 0x0, 0x7ffff, 0x1f, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CI_OP(c.srli, x13, 0x40000, 0x80000, 0x1, x2, 0 , x31)
- TEST_CI_OP(c.srli, x14, 0x20000, 0x80000, 0x2, x2, 4 , x31)
- TEST_CI_OP(c.srli, x15, 0x10, 0x80000, 0xf, x2, 8 , x31)
- TEST_CI_OP(c.srli, x8, 0x8, 0x80000, 0x10, x2, 12 , x31)
- TEST_CI_OP(c.srli, x9, 0x0, 0x80000, 0x1f, x2, 16 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-SUB.S b/riscof/suite/rv32i_m/C/C-SUB.S
deleted file mode 100644
index f5b1b890490f920a84f041f20b42064c31d5d985..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-SUB.S
+++ /dev/null
@@ -1,135 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.SUB-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.SUB.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True",csub)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CR_OP(c.sub, x9, x11, 0x0, 0x0, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.sub, x12, x13, 0x1, 0x0, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.sub, x14, x15, 0xffffffff, 0x0, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.sub, x8, x9, 0x7fff, 0x0, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.sub, x11, x12, 0x8000, 0x0, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CR_OP(c.sub, x13, x14, 0xffffffff, 0x1, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.sub, x15, x8, 0x0, 0x1, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.sub, x9, x11, 0xfffffffe, 0x1, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.sub, x12, x13, 0x7ffe, 0x1, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.sub, x14, x15, 0x7fff, 0x1, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CR_OP(c.sub, x8, x9, 0x1, -0x1, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.sub, x11, x12, 0x2, -0x1, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.sub, x13, x14, 0x0, -0x1, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.sub, x15, x8, 0x8000, -0x1, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.sub, x9, x11, 0x8001, -0x1, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CR_OP(c.sub, x12, x13, 0xffff8001, 0x7fff, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.sub, x14, x15, 0xffff8002, 0x7fff, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.sub, x8, x9, 0xffff8000, 0x7fff, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.sub, x11, x12, 0x0, 0x7fff, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.sub, x13, x14, 0x1, 0x7fff, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CR_OP(c.sub, x15, x8, 0xffff8000, 0x8000, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.sub, x9, x11, 0xffff8001, 0x8000, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.sub, x12, x13, 0xffff7fff, 0x8000, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.sub, x14, x15, 0xffffffff, 0x8000, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.sub, x8, x9, 0, 0x8000, 0x8000, x2, 16 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-SW.S b/riscof/suite/rv32i_m/C/C-SW.S
deleted file mode 100644
index 4d8ac00259de56ff399aa60d25664c9c7787b1f7..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-SW.S
+++ /dev/null
@@ -1,117 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.SW-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.SW.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True",csw)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CSW(test_data, c.sw, x8, x12, 0x11111111, 0, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CSW(test_data, c.sw, x9, x15, 0x22222222, 4, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CSW(test_data, c.sw, x10, x9, 0x33333333, 8, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CSW(test_data, c.sw, x13, x14, 0x44444444, 16, x2, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CSW(test_data, c.sw, x15, x12, 0x55555555, 124, x2, 0 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 1, 4, -1
-test_2_res:
- .fill 1, 4, -1
-test_3_res:
- .fill 1, 4, 0
-test_4_res:
- .fill 1, 4, -1
-test_5_res:
- .fill 1, 4, -1
-test_data:
- .fill 32, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-SWSP.S b/riscof/suite/rv32i_m/C/C-SWSP.S
deleted file mode 100644
index a26a5d9a6a0dd5321eb330c2930a1c2c63633379..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-SWSP.S
+++ /dev/null
@@ -1,118 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.SWSP-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.SWSP.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True",cswsp)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x1, test_1_res
-
- TEST_CSWSP(test_data, x3, 0x11111111, 0, x1, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x1, test_2_res
-
- TEST_CSWSP(test_data, x4, 0x22222222, 4, x1, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x1, test_3_res
-
- TEST_CSWSP(test_data, x16, 0x33333333, 8, x1, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x1, test_4_res
-
- TEST_CSWSP(test_data, x24, 0x44444444, 16, x1, 0 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x1, test_5_res
-
- TEST_CSWSP(test_data, x21, 0x55555555, 124, x1, 0 , x31)
-
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 1, 4, -1
-test_2_res:
- .fill 1, 4, -1
-test_3_res:
- .fill 1, 4, -1
-test_4_res:
- .fill 1, 4, -1
-test_5_res:
- .fill 1, 4, -1
-test_data:
- .fill 32, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/C-XOR.S b/riscof/suite/rv32i_m/C/C-XOR.S
deleted file mode 100644
index 29ab8fefb0139f08314e89d3c88ddb60c0aac8bb..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/C/C-XOR.S
+++ /dev/null
@@ -1,135 +0,0 @@
-# RISC-V Compliance Test RV32IMC-C.XOR-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IMC Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction C.XOR.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IC")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
- #ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*C.*); def TEST_CASE_1=True",cxor)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_CR_OP(c.xor, x8, x9, 0x0, 0x0, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.xor, x11, x12, 0x1, 0x0, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.xor, x13, x14, 0xffffffff, 0x0, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.xor, x15, x8, 0x7fff, 0x0, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.xor, x9, x11, 0x8000, 0x0, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_CR_OP(c.xor, x12, x13, 0x1, 0x1, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.xor, x14, x15, 0x0, 0x1, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.xor, x8, x9, 0xfffffffe, 0x1, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.xor, x11, x12, 0x7ffe, 0x1, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.xor, x13, x14, 0x8001, 0x1, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_CR_OP(c.xor, x15, x8, 0xffffffff, -0x1, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.xor, x9, x11, 0xfffffffe, -0x1, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.xor, x12, x13, 0x0, -0x1, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.xor, x14, x15, 0xffff8000, -0x1, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.xor, x8, x9, 0xffff7fff, -0x1, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_CR_OP(c.xor, x11, x12, 0x7fff, 0x7fff, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.xor, x13, x14, 0x7ffe, 0x7fff, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.xor, x15, x8, 0xffff8000, 0x7fff, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.xor, x9, x11, 0x0, 0x7fff, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.xor, x12, x13, 0xffff, 0x7fff, 0x8000, x2, 16 , x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_CR_OP(c.xor, x14, x15, 0x8000, 0x8000, 0x0, x2, 0 , x31)
- TEST_CR_OP(c.xor, x8, x9, 0x8001, 0x8000, 0x1, x2, 4 , x31)
- TEST_CR_OP(c.xor, x11, x12, 0xffff7fff, 0x8000, -0x1, x2, 8 , x31)
- TEST_CR_OP(c.xor, x13, x14, 0xffff, 0x8000, 0x7fff, x2, 12 , x31)
- TEST_CR_OP(c.xor, x15, x8, 0x0, 0x8000, 0x8000, x2, 16 , x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cadd-01.S b/riscof/suite/rv32i_m/C/cadd-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..d283c56ea6339cff2a672c55be7daf118a248d19
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cadd-01.S
@@ -0,0 +1,3004 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.add instruction of the RISC-V C extension for the cadd covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cadd)
+
+RVTEST_SIGBASE( x8,signature_x8_1)
+
+inst_0:
+// rs1 != rs2, rs1==x23, rs2==x28, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648, rs2_val < 0, rs1_val == 0
+// opcode: c.add; op1:x23; op2:x28; op1val:0x0; op2val:-0x80000000
+TEST_CR_OP( c.add, x23, x28, 0x80000000, 0x0, -0x80000000, x8, 0, x4)
+
+inst_1:
+// rs1 == rs2, rs1==x3, rs2==x3, rs2_val == 0, rs1_val == 65536
+// opcode: c.add; op1:x3; op2:x3; op1val:0x10000; op2val:0x10000
+TEST_CR_OP( c.add, x3, x3, 0x20000, 0x10000, 0x10000, x8, 4, x4)
+
+inst_2:
+// rs1==x15, rs2==x30, rs2_val == (2**(xlen-1)-1), rs2_val > 0, rs2_val == 2147483647
+// opcode: c.add; op1:x15; op2:x30; op1val:0x0; op2val:0x7fffffff
+TEST_CR_OP( c.add, x15, x30, 0x7fffffff, 0x0, 0x7fffffff, x8, 8, x4)
+
+inst_3:
+// rs1==x22, rs2==x5, rs2_val == 1, rs1_val == -129
+// opcode: c.add; op1:x22; op2:x5; op1val:-0x81; op2val:0x1
+TEST_CR_OP( c.add, x22, x5, 0xffffff80, -0x81, 0x1, x8, 12, x4)
+
+inst_4:
+// rs1==x7, rs2==x13, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648
+// opcode: c.add; op1:x7; op2:x13; op1val:-0x80000000; op2val:0x3fffffff
+TEST_CR_OP( c.add, x7, x13, 0xbfffffff, -0x80000000, 0x3fffffff, x8, 16, x4)
+
+inst_5:
+// rs1==x0, rs2==x2, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647
+// opcode: c.add; op1:x0; op2:x2; op1val:0x0; op2val:-0xb503
+TEST_CR_OP( c.add, x0, x2, 0, 0x0, -0xb503, x8, 20, x4)
+
+inst_6:
+// rs1==x20, rs2==x1, rs1_val == 1, rs2_val == -2097153
+// opcode: c.add; op1:x20; op2:x1; op1val:0x1; op2val:-0x200001
+TEST_CR_OP( c.add, x20, x1, 0xffe00000, 0x1, -0x200001, x8, 24, x4)
+
+inst_7:
+// rs1==x27, rs2==x6, rs2_val == 2,
+// opcode: c.add; op1:x27; op2:x6; op1val:0x3fffffff; op2val:0x2
+TEST_CR_OP( c.add, x27, x6, 0x40000001, 0x3fffffff, 0x2, x8, 28, x4)
+
+inst_8:
+// rs1==x2, rs2==x22, rs2_val == 4, rs1_val==858993459 and rs2_val==4
+// opcode: c.add; op1:x2; op2:x22; op1val:0x33333333; op2val:0x4
+TEST_CR_OP( c.add, x2, x22, 0x33333337, 0x33333333, 0x4, x8, 32, x4)
+
+inst_9:
+// rs1==x12, rs2==x27, rs2_val == 8,
+// opcode: c.add; op1:x12; op2:x27; op1val:-0x6; op2val:0x8
+TEST_CR_OP( c.add, x12, x27, 0x2, -0x6, 0x8, x8, 36, x4)
+
+inst_10:
+// rs1==x13, rs2==x25, rs2_val == 16, rs1_val == -2
+// opcode: c.add; op1:x13; op2:x25; op1val:-0x2; op2val:0x10
+TEST_CR_OP( c.add, x13, x25, 0xe, -0x2, 0x10, x8, 40, x4)
+
+inst_11:
+// rs1==x11, rs2==x10, rs2_val == 32, rs1_val == 524288
+// opcode: c.add; op1:x11; op2:x10; op1val:0x80000; op2val:0x20
+TEST_CR_OP( c.add, x11, x10, 0x80020, 0x80000, 0x20, x8, 44, x4)
+
+inst_12:
+// rs1==x16, rs2==x15, rs2_val == 64, rs1_val == 33554432
+// opcode: c.add; op1:x16; op2:x15; op1val:0x2000000; op2val:0x40
+TEST_CR_OP( c.add, x16, x15, 0x2000040, 0x2000000, 0x40, x8, 48, x4)
+
+inst_13:
+// rs1==x25, rs2==x16, rs2_val == 128, rs1_val == 67108864
+// opcode: c.add; op1:x25; op2:x16; op1val:0x4000000; op2val:0x80
+TEST_CR_OP( c.add, x25, x16, 0x4000080, 0x4000000, 0x80, x8, 52, x4)
+
+inst_14:
+// rs1==x18, rs2==x19, rs2_val == 256, rs1_val == -8388609
+// opcode: c.add; op1:x18; op2:x19; op1val:-0x800001; op2val:0x100
+TEST_CR_OP( c.add, x18, x19, 0xff8000ff, -0x800001, 0x100, x8, 56, x4)
+
+inst_15:
+// rs1==x6, rs2==x12, rs2_val == 512, rs1_val == 2097152
+// opcode: c.add; op1:x6; op2:x12; op1val:0x200000; op2val:0x200
+TEST_CR_OP( c.add, x6, x12, 0x200200, 0x200000, 0x200, x8, 60, x4)
+
+inst_16:
+// rs1==x29, rs2==x20, rs2_val == 1024, rs1_val == 262144
+// opcode: c.add; op1:x29; op2:x20; op1val:0x40000; op2val:0x400
+TEST_CR_OP( c.add, x29, x20, 0x40400, 0x40000, 0x400, x8, 64, x4)
+
+inst_17:
+// rs1==x26, rs2==x29, rs2_val == 2048,
+// opcode: c.add; op1:x26; op2:x29; op1val:0x10000; op2val:0x800
+TEST_CR_OP( c.add, x26, x29, 0x10800, 0x10000, 0x800, x8, 68, x4)
+
+inst_18:
+// rs1==x17, rs2==x18, rs2_val == 4096, rs1_val == -65537
+// opcode: c.add; op1:x17; op2:x18; op1val:-0x10001; op2val:0x1000
+TEST_CR_OP( c.add, x17, x18, 0xffff0fff, -0x10001, 0x1000, x8, 72, x4)
+
+inst_19:
+// rs1==x14, rs2==x9, rs2_val == 8192,
+// opcode: c.add; op1:x14; op2:x9; op1val:-0x2; op2val:0x2000
+TEST_CR_OP( c.add, x14, x9, 0x1ffe, -0x2, 0x2000, x8, 76, x4)
+
+inst_20:
+// rs1==x1, rs2==x14, rs2_val == 16384,
+// opcode: c.add; op1:x1; op2:x14; op1val:0x0; op2val:0x4000
+TEST_CR_OP( c.add, x1, x14, 0x4000, 0x0, 0x4000, x8, 80, x4)
+
+inst_21:
+// rs1==x31, rs2==x23, rs2_val == 32768,
+// opcode: c.add; op1:x31; op2:x23; op1val:0x3fffffff; op2val:0x8000
+TEST_CR_OP( c.add, x31, x23, 0x40007fff, 0x3fffffff, 0x8000, x8, 84, x4)
+
+inst_22:
+// rs1==x4, rs2==x26, rs2_val == 65536, rs1_val == -2097153
+// opcode: c.add; op1:x4; op2:x26; op1val:-0x200001; op2val:0x10000
+TEST_CR_OP( c.add, x4, x26, 0xffe0ffff, -0x200001, 0x10000, x8, 88, x2)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_23:
+// rs1==x24, rs2==x31, rs2_val == 131072,
+// opcode: c.add; op1:x24; op2:x31; op1val:0x66666667; op2val:0x20000
+TEST_CR_OP( c.add, x24, x31, 0x66686667, 0x66666667, 0x20000, x1, 0, x2)
+
+inst_24:
+// rs1==x5, rs2==x11, rs2_val == 262144,
+// opcode: c.add; op1:x5; op2:x11; op1val:0x4000000; op2val:0x40000
+TEST_CR_OP( c.add, x5, x11, 0x4040000, 0x4000000, 0x40000, x1, 4, x2)
+
+inst_25:
+// rs1==x28, rs2==x17, rs2_val == 524288, rs1_val == -17
+// opcode: c.add; op1:x28; op2:x17; op1val:-0x11; op2val:0x80000
+TEST_CR_OP( c.add, x28, x17, 0x7ffef, -0x11, 0x80000, x1, 8, x2)
+
+inst_26:
+// rs1==x19, rs2==x4, rs2_val == 1048576, rs1_val == -65
+// opcode: c.add; op1:x19; op2:x4; op1val:-0x41; op2val:0x100000
+TEST_CR_OP( c.add, x19, x4, 0xfffbf, -0x41, 0x100000, x1, 12, x2)
+
+inst_27:
+// rs1==x9, rs2==x24, rs2_val == 2097152,
+// opcode: c.add; op1:x9; op2:x24; op1val:-0xa; op2val:0x200000
+TEST_CR_OP( c.add, x9, x24, 0x1ffff6, -0xa, 0x200000, x1, 16, x2)
+
+inst_28:
+// rs1==x8, rs2==x21, rs2_val == 4194304,
+// opcode: c.add; op1:x8; op2:x21; op1val:0x33333332; op2val:0x400000
+TEST_CR_OP( c.add, x8, x21, 0x33733332, 0x33333332, 0x400000, x1, 20, x2)
+
+inst_29:
+// rs1==x30, rs2==x7, rs2_val == 8388608, rs1_val == -1431655766
+// opcode: c.add; op1:x30; op2:x7; op1val:-0x55555556; op2val:0x800000
+TEST_CR_OP( c.add, x30, x7, 0xab2aaaaa, -0x55555556, 0x800000, x1, 24, x2)
+
+inst_30:
+// rs1==x10, rs2==x8, rs2_val == 16777216, rs1_val == -134217729
+// opcode: c.add; op1:x10; op2:x8; op1val:-0x8000001; op2val:0x1000000
+TEST_CR_OP( c.add, x10, x8, 0xf8ffffff, -0x8000001, 0x1000000, x1, 28, x2)
+
+inst_31:
+// rs1==x21, rs2_val == 33554432,
+// opcode: c.add; op1:x21; op2:x31; op1val:0x0; op2val:0x2000000
+TEST_CR_OP( c.add, x21, x31, 0x2000000, 0x0, 0x2000000, x1, 32, x2)
+
+inst_32:
+// rs2_val == 67108864,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x41; op2val:0x4000000
+TEST_CR_OP( c.add, x10, x11, 0x3ffffbf, -0x41, 0x4000000, x1, 36, x2)
+
+inst_33:
+// rs2_val == 134217728, rs1_val == -32769
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x8001; op2val:0x8000000
+TEST_CR_OP( c.add, x10, x11, 0x7ff7fff, -0x8001, 0x8000000, x1, 40, x2)
+
+inst_34:
+// rs2_val == 268435456, rs1_val == 4
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x10000000
+TEST_CR_OP( c.add, x10, x11, 0x10000004, 0x4, 0x10000000, x1, 44, x2)
+
+inst_35:
+// rs2_val == 536870912,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x200001; op2val:0x20000000
+TEST_CR_OP( c.add, x10, x11, 0x1fdfffff, -0x200001, 0x20000000, x1, 48, x2)
+
+inst_36:
+// rs2_val == 1073741824,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x40000; op2val:0x40000000
+TEST_CR_OP( c.add, x10, x11, 0x40040000, 0x40000, 0x40000000, x1, 52, x2)
+
+inst_37:
+// rs2_val == -2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0x2
+TEST_CR_OP( c.add, x10, x11, 0x2, 0x4, -0x2, x1, 56, x2)
+
+inst_38:
+// rs2_val == -3,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x8001; op2val:-0x3
+TEST_CR_OP( c.add, x10, x11, 0xffff7ffc, -0x8001, -0x3, x1, 60, x2)
+
+inst_39:
+// rs2_val == -5, rs1_val == -2049
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x801; op2val:-0x5
+TEST_CR_OP( c.add, x10, x11, 0xfffff7fa, -0x801, -0x5, x1, 64, x2)
+
+inst_40:
+// rs2_val == -9, rs1_val == 8
+// opcode: c.add; op1:x10; op2:x11; op1val:0x8; op2val:-0x9
+TEST_CR_OP( c.add, x10, x11, 0xffffffff, 0x8, -0x9, x1, 68, x2)
+
+inst_41:
+// rs2_val == -17,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x8; op2val:-0x11
+TEST_CR_OP( c.add, x10, x11, 0xffffffe7, -0x8, -0x11, x1, 72, x2)
+
+inst_42:
+// rs2_val == -33,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x7; op2val:-0x21
+TEST_CR_OP( c.add, x10, x11, 0xffffffe6, 0x7, -0x21, x1, 76, x2)
+
+inst_43:
+// rs2_val == -65, rs1_val == -1025
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x401; op2val:-0x41
+TEST_CR_OP( c.add, x10, x11, 0xfffffbbe, -0x401, -0x41, x1, 80, x2)
+
+inst_44:
+// rs2_val == -129,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:-0x81
+TEST_CR_OP( c.add, x10, x11, 0x666665e6, 0x66666667, -0x81, x1, 84, x2)
+
+inst_45:
+// rs2_val == -257, rs1_val == -1073741825
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x40000001; op2val:-0x101
+TEST_CR_OP( c.add, x10, x11, 0xbffffefe, -0x40000001, -0x101, x1, 88, x2)
+
+inst_46:
+// rs2_val == -513,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x7fffffff; op2val:-0x201
+TEST_CR_OP( c.add, x10, x11, 0x7ffffdfe, 0x7fffffff, -0x201, x1, 92, x2)
+
+inst_47:
+// rs2_val == -1025, rs1_val == 16384
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4000; op2val:-0x401
+TEST_CR_OP( c.add, x10, x11, 0x3bff, 0x4000, -0x401, x1, 96, x2)
+
+inst_48:
+// rs2_val == -2049,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3fffffff; op2val:-0x801
+TEST_CR_OP( c.add, x10, x11, 0x3ffff7fe, 0x3fffffff, -0x801, x1, 100, x2)
+
+inst_49:
+// rs2_val == -4097, rs1_val == -513
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x201; op2val:-0x1001
+TEST_CR_OP( c.add, x10, x11, 0xffffedfe, -0x201, -0x1001, x1, 104, x2)
+
+inst_50:
+// rs2_val == -8193,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x8; op2val:-0x2001
+TEST_CR_OP( c.add, x10, x11, 0xffffe007, 0x8, -0x2001, x1, 108, x2)
+
+inst_51:
+// rs2_val == -16385,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:-0x4001
+TEST_CR_OP( c.add, x10, x11, 0x3332f331, 0x33333332, -0x4001, x1, 112, x2)
+
+inst_52:
+// rs2_val == -32769,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x200001; op2val:-0x8001
+TEST_CR_OP( c.add, x10, x11, 0xffdf7ffe, -0x200001, -0x8001, x1, 116, x2)
+
+inst_53:
+// rs2_val == -65537, rs1_val == 4096
+// opcode: c.add; op1:x10; op2:x11; op1val:0x1000; op2val:-0x10001
+TEST_CR_OP( c.add, x10, x11, 0xffff0fff, 0x1000, -0x10001, x1, 120, x2)
+
+inst_54:
+// rs2_val == -131073, rs1_val == 8388608
+// opcode: c.add; op1:x10; op2:x11; op1val:0x800000; op2val:-0x20001
+TEST_CR_OP( c.add, x10, x11, 0x7dffff, 0x800000, -0x20001, x1, 124, x2)
+
+inst_55:
+// rs2_val == -262145, rs1_val == 32
+// opcode: c.add; op1:x10; op2:x11; op1val:0x20; op2val:-0x40001
+TEST_CR_OP( c.add, x10, x11, 0xfffc001f, 0x20, -0x40001, x1, 128, x2)
+
+inst_56:
+// rs2_val == -524289, rs1_val == 1048576
+// opcode: c.add; op1:x10; op2:x11; op1val:0x100000; op2val:-0x80001
+TEST_CR_OP( c.add, x10, x11, 0x7ffff, 0x100000, -0x80001, x1, 132, x2)
+
+inst_57:
+// rs2_val == -1048577,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x6; op2val:-0x100001
+TEST_CR_OP( c.add, x10, x11, 0xffeffff9, -0x6, -0x100001, x1, 136, x2)
+
+inst_58:
+// rs2_val == -4194305, rs1_val == -9
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x9; op2val:-0x400001
+TEST_CR_OP( c.add, x10, x11, 0xffbffff6, -0x9, -0x400001, x1, 140, x2)
+
+inst_59:
+// rs2_val == -8388609,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:-0x800001
+TEST_CR_OP( c.add, x10, x11, 0xff7fffff, 0x0, -0x800001, x1, 144, x2)
+
+inst_60:
+// rs2_val == -16777217,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:-0x1000001
+TEST_CR_OP( c.add, x10, x11, 0xff00b503, 0xb504, -0x1000001, x1, 148, x2)
+
+inst_61:
+// rs2_val == -33554433,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:-0x2000001
+TEST_CR_OP( c.add, x10, x11, 0xfdffffff, 0x0, -0x2000001, x1, 152, x2)
+
+inst_62:
+// rs2_val == -67108865,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:-0x4000001
+TEST_CR_OP( c.add, x10, x11, 0xfc00b503, 0xb504, -0x4000001, x1, 156, x2)
+
+inst_63:
+// rs2_val == -134217729,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xa; op2val:-0x8000001
+TEST_CR_OP( c.add, x10, x11, 0xf7fffff5, -0xa, -0x8000001, x1, 160, x2)
+
+inst_64:
+// rs2_val == -268435457,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x10000001
+TEST_CR_OP( c.add, x10, x11, 0x9aaaaaa9, -0x55555556, -0x10000001, x1, 164, x2)
+
+inst_65:
+// rs2_val == -536870913,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:-0x20000001
+TEST_CR_OP( c.add, x10, x11, 0xe0000004, 0x5, -0x20000001, x1, 168, x2)
+
+inst_66:
+// rs2_val == -1073741825,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x6; op2val:-0x40000001
+TEST_CR_OP( c.add, x10, x11, 0xbffffff9, -0x6, -0x40000001, x1, 172, x2)
+
+inst_67:
+// rs2_val == 1431655765, rs1_val==5 and rs2_val==1431655765
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x5555555a, 0x5, 0x55555555, x1, 176, x2)
+
+inst_68:
+// rs2_val == -1431655766, rs1_val==-46340 and rs2_val==-1431655766
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaa9f5a6, -0xb504, -0x55555556, x1, 180, x2)
+
+inst_69:
+// rs1_val == 2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x40000000
+TEST_CR_OP( c.add, x10, x11, 0x40000002, 0x2, 0x40000000, x1, 184, x2)
+
+inst_70:
+// rs1_val == 16,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x10; op2val:0x40000
+TEST_CR_OP( c.add, x10, x11, 0x40010, 0x10, 0x40000, x1, 188, x2)
+
+inst_71:
+// rs1_val == 64,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x40; op2val:-0x8001
+TEST_CR_OP( c.add, x10, x11, 0xffff803f, 0x40, -0x8001, x1, 192, x2)
+
+inst_72:
+// rs1_val == 128,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x80; op2val:-0x1
+TEST_CR_OP( c.add, x10, x11, 0x7f, 0x80, -0x1, x1, 196, x2)
+
+inst_73:
+// rs1_val == 256,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x100; op2val:-0x81
+TEST_CR_OP( c.add, x10, x11, 0x7f, 0x100, -0x81, x1, 200, x2)
+
+inst_74:
+// rs1_val == 512,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x200; op2val:0x4000
+TEST_CR_OP( c.add, x10, x11, 0x4200, 0x200, 0x4000, x1, 204, x2)
+
+inst_75:
+// rs1_val == 1024,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x400; op2val:-0x8001
+TEST_CR_OP( c.add, x10, x11, 0xffff83ff, 0x400, -0x8001, x1, 208, x2)
+
+inst_76:
+// rs1_val == 2048,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x800; op2val:-0x401
+TEST_CR_OP( c.add, x10, x11, 0x3ff, 0x800, -0x401, x1, 212, x2)
+
+inst_77:
+// rs1_val == 8192,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2000; op2val:0x1000
+TEST_CR_OP( c.add, x10, x11, 0x3000, 0x2000, 0x1000, x1, 216, x2)
+
+inst_78:
+// rs1_val == 32768,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x8000; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x5555d554, 0x8000, 0x55555554, x1, 220, x2)
+
+inst_79:
+// rs1_val == 131072,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x20000; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x33353332, 0x20000, 0x33333332, x1, 224, x2)
+
+inst_80:
+// rs1_val == 4194304,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x400000; op2val:0x10
+TEST_CR_OP( c.add, x10, x11, 0x400010, 0x400000, 0x10, x1, 228, x2)
+
+inst_81:
+// rs1_val == 16777216,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x1000000; op2val:-0x201
+TEST_CR_OP( c.add, x10, x11, 0xfffdff, 0x1000000, -0x201, x1, 232, x2)
+
+inst_82:
+// rs1_val == 134217728,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x8000000; op2val:-0xa
+TEST_CR_OP( c.add, x10, x11, 0x7fffff6, 0x8000000, -0xa, x1, 236, x2)
+
+inst_83:
+// rs1_val == 268435456,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x10000000; op2val:-0x80000000
+TEST_CR_OP( c.add, x10, x11, 0x90000000, 0x10000000, -0x80000000, x1, 240, x2)
+
+inst_84:
+// rs1_val == 536870912,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x20000000; op2val:-0x5
+TEST_CR_OP( c.add, x10, x11, 0x1ffffffb, 0x20000000, -0x5, x1, 244, x2)
+
+inst_85:
+// rs1_val == 1073741824,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x40000000; op2val:0x20
+TEST_CR_OP( c.add, x10, x11, 0x40000020, 0x40000000, 0x20, x1, 248, x2)
+
+inst_86:
+// rs1_val == -3,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x3; op2val:0x2000
+TEST_CR_OP( c.add, x10, x11, 0x1ffd, -0x3, 0x2000, x1, 252, x2)
+
+inst_87:
+// rs1_val == -5,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xfffffffd, -0x5, 0x2, x1, 256, x2)
+
+inst_88:
+// rs1_val == -33,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x21; op2val:0x7fffffff
+TEST_CR_OP( c.add, x10, x11, 0x7fffffde, -0x21, 0x7fffffff, x1, 260, x2)
+
+inst_89:
+// rs1_val == -257,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x101; op2val:0x1
+TEST_CR_OP( c.add, x10, x11, 0xffffff00, -0x101, 0x1, x1, 264, x2)
+
+inst_90:
+// rs1_val == -4097,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x1001; op2val:0x400
+TEST_CR_OP( c.add, x10, x11, 0xfffff3ff, -0x1001, 0x400, x1, 268, x2)
+
+inst_91:
+// rs1_val == -8193,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x2001; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xffffdfff, -0x2001, 0x0, x1, 272, x2)
+
+inst_92:
+// rs1_val == -16385,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x4001; op2val:0x1000
+TEST_CR_OP( c.add, x10, x11, 0xffffcfff, -0x4001, 0x1000, x1, 276, x2)
+
+inst_93:
+// rs1_val == -131073,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x20001; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x55535555, -0x20001, 0x55555556, x1, 280, x2)
+
+inst_94:
+// rs1_val == -262145,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x40001; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0xfffb4afc, -0x40001, -0xb503, x1, 284, x2)
+
+inst_95:
+// rs1_val == -524289,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x80001; op2val:0x40000
+TEST_CR_OP( c.add, x10, x11, 0xfffbffff, -0x80001, 0x40000, x1, 288, x2)
+
+inst_96:
+// rs1_val == -1048577,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x100001; op2val:0x4000000
+TEST_CR_OP( c.add, x10, x11, 0x3efffff, -0x100001, 0x4000000, x1, 292, x2)
+
+inst_97:
+// rs1_val == -4194305,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x400001; op2val:0x200
+TEST_CR_OP( c.add, x10, x11, 0xffc001ff, -0x400001, 0x200, x1, 296, x2)
+
+inst_98:
+// rs1_val == -16777217,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x1000001; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x54555553, -0x1000001, 0x55555554, x1, 300, x2)
+
+inst_99:
+// rs1_val == -33554433,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x2000001; op2val:0x40000
+TEST_CR_OP( c.add, x10, x11, 0xfe03ffff, -0x2000001, 0x40000, x1, 304, x2)
+
+inst_100:
+// rs1_val == -67108865,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x4000001; op2val:-0x4001
+TEST_CR_OP( c.add, x10, x11, 0xfbffbffe, -0x4000001, -0x4001, x1, 308, x2)
+
+inst_101:
+// rs1_val == -268435457,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x10000001; op2val:0x10000000
+TEST_CR_OP( c.add, x10, x11, 0xffffffff, -0x10000001, 0x10000000, x1, 312, x2)
+
+inst_102:
+// rs1_val == -536870913,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x20000001; op2val:-0x20000001
+TEST_CR_OP( c.add, x10, x11, 0xbffffffe, -0x20000001, -0x20000001, x1, 316, x2)
+
+inst_103:
+// rs1_val == 1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x8000
+TEST_CR_OP( c.add, x10, x11, 0x5555d555, 0x55555555, 0x8000, x1, 320, x2)
+
+inst_104:
+// rs1_val==3 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x6, 0x3, 0x3, x1, 324, x2)
+
+inst_105:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x55555558, 0x3, 0x55555555, x1, 328, x2)
+
+inst_106:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaad, 0x3, -0x55555556, x1, 332, x2)
+
+inst_107:
+// rs1_val==3 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x8, 0x3, 0x5, x1, 336, x2)
+
+inst_108:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x33333336, 0x3, 0x33333333, x1, 340, x2)
+
+inst_109:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x66666669, 0x3, 0x66666666, x1, 344, x2)
+
+inst_110:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0xffff4aff, 0x3, -0xb504, x1, 348, x2)
+
+inst_111:
+// rs1_val==3 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0xb507, 0x3, 0xb504, x1, 352, x2)
+
+inst_112:
+// rs1_val==3 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x5, 0x3, 0x2, x1, 356, x2)
+
+inst_113:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x55555557, 0x3, 0x55555554, x1, 360, x2)
+
+inst_114:
+// rs1_val==3 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x3, 0x3, 0x0, x1, 364, x2)
+
+inst_115:
+// rs1_val==3 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x7, 0x3, 0x4, x1, 368, x2)
+
+inst_116:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x33333335, 0x3, 0x33333332, x1, 372, x2)
+
+inst_117:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x66666668, 0x3, 0x66666665, x1, 376, x2)
+
+inst_118:
+// rs1_val==3 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0xb506, 0x3, 0xb503, x1, 380, x2)
+
+inst_119:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x55555559, 0x3, 0x55555556, x1, 384, x2)
+
+inst_120:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaae, 0x3, -0x55555555, x1, 388, x2)
+
+inst_121:
+// rs1_val==3 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x9, 0x3, 0x6, x1, 392, x2)
+
+inst_122:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x33333337, 0x3, 0x33333334, x1, 396, x2)
+
+inst_123:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x6666666a, 0x3, 0x66666667, x1, 400, x2)
+
+inst_124:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0xffff4b00, 0x3, -0xb503, x1, 404, x2)
+
+inst_125:
+// rs1_val==3 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0xb508, 0x3, 0xb505, x1, 408, x2)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x55555558, 0x55555555, 0x3, x1, 412, x2)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaa, 0x55555555, 0x55555555, x1, 416, x2)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xffffffff, 0x55555555, -0x55555556, x1, 420, x2)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x5555555a, 0x55555555, 0x5, x1, 424, x2)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x88888888, 0x55555555, 0x33333333, x1, 428, x2)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbb, 0x55555555, 0x66666666, x1, 432, x2)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0x5554a051, 0x55555555, -0xb504, x1, 436, x2)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x55560a59, 0x55555555, 0xb504, x1, 440, x2)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x55555557, 0x55555555, 0x2, x1, 444, x2)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaa9, 0x55555555, 0x55555554, x1, 448, x2)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x55555555, 0x55555555, 0x0, x1, 452, x2)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x55555559, 0x55555555, 0x4, x1, 456, x2)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x88888887, 0x55555555, 0x33333332, x1, 460, x2)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbba, 0x55555555, 0x66666665, x1, 464, x2)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0x55560a58, 0x55555555, 0xb503, x1, 468, x2)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab, 0x55555555, 0x55555556, x1, 472, x2)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x0, 0x55555555, -0x55555555, x1, 476, x2)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x5555555b, 0x55555555, 0x6, x1, 480, x2)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x88888889, 0x55555555, 0x33333334, x1, 484, x2)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbc, 0x55555555, 0x66666667, x1, 488, x2)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0x5554a052, 0x55555555, -0xb503, x1, 492, x2)
+
+inst_147:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x55560a5a, 0x55555555, 0xb505, x1, 496, x2)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaad, -0x55555556, 0x3, x1, 500, x2)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xffffffff, -0x55555556, 0x55555555, x1, 504, x2)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x55555554, -0x55555556, -0x55555556, x1, 508, x2)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaf, -0x55555556, 0x5, x1, 512, x2)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0xdddddddd, -0x55555556, 0x33333333, x1, 516, x2)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x11111110, -0x55555556, 0x66666666, x1, 520, x2)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0xaaa9f5a6, -0x55555556, -0xb504, x1, 524, x2)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0xaaab5fae, -0x55555556, 0xb504, x1, 528, x2)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaac, -0x55555556, 0x2, x1, 532, x2)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0xfffffffe, -0x55555556, 0x55555554, x1, 536, x2)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaa, -0x55555556, 0x0, x1, 540, x2)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaae, -0x55555556, 0x4, x1, 544, x2)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0xdddddddc, -0x55555556, 0x33333332, x1, 548, x2)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x1111110f, -0x55555556, 0x66666665, x1, 552, x2)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0xaaab5fad, -0x55555556, 0xb503, x1, 556, x2)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x0, -0x55555556, 0x55555556, x1, 560, x2)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x55555555, -0x55555556, -0x55555555, x1, 564, x2)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaab0, -0x55555556, 0x6, x1, 568, x2)
+
+inst_166:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0xddddddde, -0x55555556, 0x33333334, x1, 572, x2)
+
+inst_167:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x11111111, -0x55555556, 0x66666667, x1, 576, x2)
+
+inst_168:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0xaaa9f5a7, -0x55555556, -0xb503, x1, 580, x2)
+
+inst_169:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0xaaab5faf, -0x55555556, 0xb505, x1, 584, x2)
+
+inst_170:
+// rs1_val==5 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x8, 0x5, 0x3, x1, 588, x2)
+
+inst_171:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaf, 0x5, -0x55555556, x1, 592, x2)
+
+inst_172:
+// rs1_val==5 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xa, 0x5, 0x5, x1, 596, x2)
+
+inst_173:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x33333338, 0x5, 0x33333333, x1, 600, x2)
+
+inst_174:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x6666666b, 0x5, 0x66666666, x1, 604, x2)
+
+inst_175:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0xffff4b01, 0x5, -0xb504, x1, 608, x2)
+
+inst_176:
+// rs1_val==5 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0xb509, 0x5, 0xb504, x1, 612, x2)
+
+inst_177:
+// rs1_val==5 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x7, 0x5, 0x2, x1, 616, x2)
+
+inst_178:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x55555559, 0x5, 0x55555554, x1, 620, x2)
+
+inst_179:
+// rs1_val==5 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x5, 0x5, 0x0, x1, 624, x2)
+
+inst_180:
+// rs1_val==5 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x9, 0x5, 0x4, x1, 628, x2)
+
+inst_181:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x33333337, 0x5, 0x33333332, x1, 632, x2)
+
+inst_182:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x6666666a, 0x5, 0x66666665, x1, 636, x2)
+
+inst_183:
+// rs1_val==5 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0xb508, 0x5, 0xb503, x1, 640, x2)
+
+inst_184:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x5555555b, 0x5, 0x55555556, x1, 644, x2)
+
+inst_185:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaab0, 0x5, -0x55555555, x1, 648, x2)
+
+inst_186:
+// rs1_val==5 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xb, 0x5, 0x6, x1, 652, x2)
+
+inst_187:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x33333339, 0x5, 0x33333334, x1, 656, x2)
+
+inst_188:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x6666666c, 0x5, 0x66666667, x1, 660, x2)
+
+inst_189:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0xffff4b02, 0x5, -0xb503, x1, 664, x2)
+
+inst_190:
+// rs1_val==5 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0xb50a, 0x5, 0xb505, x1, 668, x2)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x33333336, 0x33333333, 0x3, x1, 672, x2)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x88888888, 0x33333333, 0x55555555, x1, 676, x2)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xdddddddd, 0x33333333, -0x55555556, x1, 680, x2)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x33333338, 0x33333333, 0x5, x1, 684, x2)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x66666666, 0x33333333, 0x33333333, x1, 688, x2)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x99999999, 0x33333333, 0x66666666, x1, 692, x2)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0x33327e2f, 0x33333333, -0xb504, x1, 696, x2)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x3333e837, 0x33333333, 0xb504, x1, 700, x2)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x33333335, 0x33333333, 0x2, x1, 704, x2)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x88888887, 0x33333333, 0x55555554, x1, 708, x2)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x33333333, 0x33333333, 0x0, x1, 712, x2)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x66666665, 0x33333333, 0x33333332, x1, 716, x2)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x99999998, 0x33333333, 0x66666665, x1, 720, x2)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0x3333e836, 0x33333333, 0xb503, x1, 724, x2)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x88888889, 0x33333333, 0x55555556, x1, 728, x2)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xddddddde, 0x33333333, -0x55555555, x1, 732, x2)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x33333339, 0x33333333, 0x6, x1, 736, x2)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x66666667, 0x33333333, 0x33333334, x1, 740, x2)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x9999999a, 0x33333333, 0x66666667, x1, 744, x2)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0x33327e30, 0x33333333, -0xb503, x1, 748, x2)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x3333e838, 0x33333333, 0xb505, x1, 752, x2)
+
+inst_212:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x66666669, 0x66666666, 0x3, x1, 756, x2)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbb, 0x66666666, 0x55555555, x1, 760, x2)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x11111110, 0x66666666, -0x55555556, x1, 764, x2)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x6666666b, 0x66666666, 0x5, x1, 768, x2)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x99999999, 0x66666666, 0x33333333, x1, 772, x2)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0xcccccccc, 0x66666666, 0x66666666, x1, 776, x2)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0x6665b162, 0x66666666, -0xb504, x1, 780, x2)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x66671b6a, 0x66666666, 0xb504, x1, 784, x2)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x66666668, 0x66666666, 0x2, x1, 788, x2)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbba, 0x66666666, 0x55555554, x1, 792, x2)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x66666666, 0x66666666, 0x0, x1, 796, x2)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x6666666a, 0x66666666, 0x4, x1, 800, x2)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x99999998, 0x66666666, 0x33333332, x1, 804, x2)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0xcccccccb, 0x66666666, 0x66666665, x1, 808, x2)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0x66671b69, 0x66666666, 0xb503, x1, 812, x2)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbc, 0x66666666, 0x55555556, x1, 816, x2)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x11111111, 0x66666666, -0x55555555, x1, 820, x2)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x6666666c, 0x66666666, 0x6, x1, 824, x2)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x9999999a, 0x66666666, 0x33333334, x1, 828, x2)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0xcccccccd, 0x66666666, 0x66666667, x1, 832, x2)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0x6665b163, 0x66666666, -0xb503, x1, 836, x2)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x66671b6b, 0x66666666, 0xb505, x1, 840, x2)
+
+inst_234:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xffff4aff, -0xb504, 0x3, x1, 844, x2)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x5554a051, -0xb504, 0x55555555, x1, 848, x2)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xffff4b01, -0xb504, 0x5, x1, 852, x2)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x33327e2f, -0xb504, 0x33333333, x1, 856, x2)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x6665b162, -0xb504, 0x66666666, x1, 860, x2)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0xfffe95f8, -0xb504, -0xb504, x1, 864, x2)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x0, -0xb504, 0xb504, x1, 868, x2)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xffff4afe, -0xb504, 0x2, x1, 872, x2)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x5554a050, -0xb504, 0x55555554, x1, 876, x2)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xffff4afc, -0xb504, 0x0, x1, 880, x2)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xffff4b00, -0xb504, 0x4, x1, 884, x2)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x33327e2e, -0xb504, 0x33333332, x1, 888, x2)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x6665b161, -0xb504, 0x66666665, x1, 892, x2)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0xffffffff, -0xb504, 0xb503, x1, 896, x2)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x5554a052, -0xb504, 0x55555556, x1, 900, x2)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaa9f5a7, -0xb504, -0x55555555, x1, 904, x2)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xffff4b02, -0xb504, 0x6, x1, 908, x2)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x33327e30, -0xb504, 0x33333334, x1, 912, x2)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x6665b163, -0xb504, 0x66666667, x1, 916, x2)
+
+inst_253:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0xfffe95f9, -0xb504, -0xb503, x1, 920, x2)
+
+inst_254:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x1, -0xb504, 0xb505, x1, 924, x2)
+
+inst_255:
+// rs1_val==46340 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xb507, 0xb504, 0x3, x1, 928, x2)
+
+inst_256:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x55560a59, 0xb504, 0x55555555, x1, 932, x2)
+
+inst_257:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaab5fae, 0xb504, -0x55555556, x1, 936, x2)
+
+inst_258:
+// rs1_val==46340 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xb509, 0xb504, 0x5, x1, 940, x2)
+
+inst_259:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x3333e837, 0xb504, 0x33333333, x1, 944, x2)
+
+inst_260:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x66671b6a, 0xb504, 0x66666666, x1, 948, x2)
+
+inst_261:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0x0, 0xb504, -0xb504, x1, 952, x2)
+
+inst_262:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x16a08, 0xb504, 0xb504, x1, 956, x2)
+
+inst_263:
+// rs1_val==46340 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xb506, 0xb504, 0x2, x1, 960, x2)
+
+inst_264:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x55560a58, 0xb504, 0x55555554, x1, 964, x2)
+
+inst_265:
+// rs1_val==46340 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xb504, 0xb504, 0x0, x1, 968, x2)
+
+inst_266:
+// rs1_val==46340 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xb508, 0xb504, 0x4, x1, 972, x2)
+
+inst_267:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x3333e836, 0xb504, 0x33333332, x1, 976, x2)
+
+inst_268:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x66671b69, 0xb504, 0x66666665, x1, 980, x2)
+
+inst_269:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0x16a07, 0xb504, 0xb503, x1, 984, x2)
+
+inst_270:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x55560a5a, 0xb504, 0x55555556, x1, 988, x2)
+
+inst_271:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaab5faf, 0xb504, -0x55555555, x1, 992, x2)
+
+inst_272:
+// rs1_val==46340 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xb50a, 0xb504, 0x6, x1, 996, x2)
+
+inst_273:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x3333e838, 0xb504, 0x33333334, x1, 1000, x2)
+
+inst_274:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x66671b6b, 0xb504, 0x66666667, x1, 1004, x2)
+
+inst_275:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0x1, 0xb504, -0xb503, x1, 1008, x2)
+
+inst_276:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x16a09, 0xb504, 0xb505, x1, 1012, x2)
+
+inst_277:
+// rs1_val==2 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x5, 0x2, 0x3, x1, 1016, x2)
+
+inst_278:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x55555557, 0x2, 0x55555555, x1, 1020, x2)
+
+inst_279:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaac, 0x2, -0x55555556, x1, 1024, x2)
+
+inst_280:
+// rs1_val==2 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x7, 0x2, 0x5, x1, 1028, x2)
+
+inst_281:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x33333335, 0x2, 0x33333333, x1, 1032, x2)
+
+inst_282:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x66666668, 0x2, 0x66666666, x1, 1036, x2)
+
+inst_283:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0xffff4afe, 0x2, -0xb504, x1, 1040, x2)
+
+inst_284:
+// rs1_val==2 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0xb506, 0x2, 0xb504, x1, 1044, x2)
+
+inst_285:
+// rs1_val==2 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x4, 0x2, 0x2, x1, 1048, x2)
+
+inst_286:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x55555556, 0x2, 0x55555554, x1, 1052, x2)
+
+inst_287:
+// rs1_val==2 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x2, 0x2, 0x0, x1, 1056, x2)
+
+inst_288:
+// rs1_val==2 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x6, 0x2, 0x4, x1, 1060, x2)
+
+inst_289:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x33333334, 0x2, 0x33333332, x1, 1064, x2)
+
+inst_290:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x66666667, 0x2, 0x66666665, x1, 1068, x2)
+
+inst_291:
+// rs1_val==2 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0xb505, 0x2, 0xb503, x1, 1072, x2)
+
+inst_292:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x55555558, 0x2, 0x55555556, x1, 1076, x2)
+
+inst_293:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaad, 0x2, -0x55555555, x1, 1080, x2)
+
+inst_294:
+// rs1_val==2 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x8, 0x2, 0x6, x1, 1084, x2)
+
+inst_295:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x33333336, 0x2, 0x33333334, x1, 1088, x2)
+
+inst_296:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x66666669, 0x2, 0x66666667, x1, 1092, x2)
+
+inst_297:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0xffff4aff, 0x2, -0xb503, x1, 1096, x2)
+
+inst_298:
+// rs1_val==2 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0xb507, 0x2, 0xb505, x1, 1100, x2)
+
+inst_299:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x55555557, 0x55555554, 0x3, x1, 1104, x2)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaa9, 0x55555554, 0x55555555, x1, 1108, x2)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xfffffffe, 0x55555554, -0x55555556, x1, 1112, x2)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x55555559, 0x55555554, 0x5, x1, 1116, x2)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x88888887, 0x55555554, 0x33333333, x1, 1120, x2)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbba, 0x55555554, 0x66666666, x1, 1124, x2)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0x5554a050, 0x55555554, -0xb504, x1, 1128, x2)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x55560a58, 0x55555554, 0xb504, x1, 1132, x2)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x55555556, 0x55555554, 0x2, x1, 1136, x2)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaa8, 0x55555554, 0x55555554, x1, 1140, x2)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x55555554, 0x55555554, 0x0, x1, 1144, x2)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x55555558, 0x55555554, 0x4, x1, 1148, x2)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x88888886, 0x55555554, 0x33333332, x1, 1152, x2)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbb9, 0x55555554, 0x66666665, x1, 1156, x2)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0x55560a57, 0x55555554, 0xb503, x1, 1160, x2)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaa, 0x55555554, 0x55555556, x1, 1164, x2)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xffffffff, 0x55555554, -0x55555555, x1, 1168, x2)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x5555555a, 0x55555554, 0x6, x1, 1172, x2)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x88888888, 0x55555554, 0x33333334, x1, 1176, x2)
+
+inst_318:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbb, 0x55555554, 0x66666667, x1, 1180, x2)
+
+inst_319:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0x5554a051, 0x55555554, -0xb503, x1, 1184, x2)
+
+inst_320:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x55560a59, 0x55555554, 0xb505, x1, 1188, x2)
+
+inst_321:
+// rs1_val==0 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x3, 0x0, 0x3, x1, 1192, x2)
+
+inst_322:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x55555555, 0x0, 0x55555555, x1, 1196, x2)
+
+inst_323:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaa, 0x0, -0x55555556, x1, 1200, x2)
+
+inst_324:
+// rs1_val==0 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x5, 0x0, 0x5, x1, 1204, x2)
+
+inst_325:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x33333333, 0x0, 0x33333333, x1, 1208, x2)
+
+inst_326:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x66666666, 0x0, 0x66666666, x1, 1212, x2)
+
+inst_327:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0xffff4afc, 0x0, -0xb504, x1, 1216, x2)
+
+inst_328:
+// rs1_val==0 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0xb504, 0x0, 0xb504, x1, 1220, x2)
+
+inst_329:
+// rs1_val==0 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x2, 0x0, 0x2, x1, 1224, x2)
+
+inst_330:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0xaaa9f5a8, -0x55555555, -0xb503, x1, 1228, x2)
+
+inst_331:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0xaaab5fb0, -0x55555555, 0xb505, x1, 1232, x2)
+
+inst_332:
+// rs1_val==6 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x9, 0x6, 0x3, x1, 1236, x2)
+
+inst_333:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x5555555b, 0x6, 0x55555555, x1, 1240, x2)
+
+inst_334:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaab0, 0x6, -0x55555556, x1, 1244, x2)
+
+inst_335:
+// rs1_val==6 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xb, 0x6, 0x5, x1, 1248, x2)
+
+inst_336:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x33333339, 0x6, 0x33333333, x1, 1252, x2)
+
+inst_337:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x6666666c, 0x6, 0x66666666, x1, 1256, x2)
+
+inst_338:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0xffff4b02, 0x6, -0xb504, x1, 1260, x2)
+
+inst_339:
+// rs1_val==6 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0xb50a, 0x6, 0xb504, x1, 1264, x2)
+
+inst_340:
+// rs1_val==6 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x8, 0x6, 0x2, x1, 1268, x2)
+
+inst_341:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x5555555a, 0x6, 0x55555554, x1, 1272, x2)
+
+inst_342:
+// rs1_val==6 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x6, 0x6, 0x0, x1, 1276, x2)
+
+inst_343:
+// rs1_val==6 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xa, 0x6, 0x4, x1, 1280, x2)
+
+inst_344:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x33333338, 0x6, 0x33333332, x1, 1284, x2)
+
+inst_345:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x6666666b, 0x6, 0x66666665, x1, 1288, x2)
+
+inst_346:
+// rs1_val==6 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0xb509, 0x6, 0xb503, x1, 1292, x2)
+
+inst_347:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x5555555c, 0x6, 0x55555556, x1, 1296, x2)
+
+inst_348:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaab1, 0x6, -0x55555555, x1, 1300, x2)
+
+inst_349:
+// rs1_val==6 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xc, 0x6, 0x6, x1, 1304, x2)
+
+inst_350:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x3333333a, 0x6, 0x33333334, x1, 1308, x2)
+
+inst_351:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x6666666d, 0x6, 0x66666667, x1, 1312, x2)
+
+inst_352:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0xffff4b03, 0x6, -0xb503, x1, 1316, x2)
+
+inst_353:
+// rs1_val==6 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0xb50b, 0x6, 0xb505, x1, 1320, x2)
+
+inst_354:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x33333337, 0x33333334, 0x3, x1, 1324, x2)
+
+inst_355:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x88888889, 0x33333334, 0x55555555, x1, 1328, x2)
+
+inst_356:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xddddddde, 0x33333334, -0x55555556, x1, 1332, x2)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x33333339, 0x33333334, 0x5, x1, 1336, x2)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x66666667, 0x33333334, 0x33333333, x1, 1340, x2)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x9999999a, 0x33333334, 0x66666666, x1, 1344, x2)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0x33327e30, 0x33333334, -0xb504, x1, 1348, x2)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x3333e838, 0x33333334, 0xb504, x1, 1352, x2)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x33333336, 0x33333334, 0x2, x1, 1356, x2)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x88888888, 0x33333334, 0x55555554, x1, 1360, x2)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x33333334, 0x33333334, 0x0, x1, 1364, x2)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x33333338, 0x33333334, 0x4, x1, 1368, x2)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x66666666, 0x33333334, 0x33333332, x1, 1372, x2)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x99999999, 0x33333334, 0x66666665, x1, 1376, x2)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0x3333e837, 0x33333334, 0xb503, x1, 1380, x2)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x8888888a, 0x33333334, 0x55555556, x1, 1384, x2)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xdddddddf, 0x33333334, -0x55555555, x1, 1388, x2)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x3333333a, 0x33333334, 0x6, x1, 1392, x2)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x66666668, 0x33333334, 0x33333334, x1, 1396, x2)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x9999999b, 0x33333334, 0x66666667, x1, 1400, x2)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0x33327e31, 0x33333334, -0xb503, x1, 1404, x2)
+
+inst_375:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x3333e839, 0x33333334, 0xb505, x1, 1408, x2)
+
+inst_376:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x6666666a, 0x66666667, 0x3, x1, 1412, x2)
+
+inst_377:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbc, 0x66666667, 0x55555555, x1, 1416, x2)
+
+inst_378:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x11111111, 0x66666667, -0x55555556, x1, 1420, x2)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x6666666c, 0x66666667, 0x5, x1, 1424, x2)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x9999999a, 0x66666667, 0x33333333, x1, 1428, x2)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0xcccccccd, 0x66666667, 0x66666666, x1, 1432, x2)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0x6665b163, 0x66666667, -0xb504, x1, 1436, x2)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x66671b6b, 0x66666667, 0xb504, x1, 1440, x2)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x66666669, 0x66666667, 0x2, x1, 1444, x2)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbb, 0x66666667, 0x55555554, x1, 1448, x2)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x66666667, 0x66666667, 0x0, x1, 1452, x2)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x6666666b, 0x66666667, 0x4, x1, 1456, x2)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x99999999, 0x66666667, 0x33333332, x1, 1460, x2)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0xcccccccc, 0x66666667, 0x66666665, x1, 1464, x2)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0x66671b6a, 0x66666667, 0xb503, x1, 1468, x2)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbd, 0x66666667, 0x55555556, x1, 1472, x2)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x11111112, 0x66666667, -0x55555555, x1, 1476, x2)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x6666666d, 0x66666667, 0x6, x1, 1480, x2)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x9999999b, 0x66666667, 0x33333334, x1, 1484, x2)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0xccccccce, 0x66666667, 0x66666667, x1, 1488, x2)
+
+inst_396:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0x6665b164, 0x66666667, -0xb503, x1, 1492, x2)
+
+inst_397:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x66671b6c, 0x66666667, 0xb505, x1, 1496, x2)
+
+inst_398:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xffff4b00, -0xb503, 0x3, x1, 1500, x2)
+
+inst_399:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x5554a052, -0xb503, 0x55555555, x1, 1504, x2)
+
+inst_400:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaa9f5a7, -0xb503, -0x55555556, x1, 1508, x2)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xffff4b02, -0xb503, 0x5, x1, 1512, x2)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x33327e30, -0xb503, 0x33333333, x1, 1516, x2)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x6665b163, -0xb503, 0x66666666, x1, 1520, x2)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0xfffe95f9, -0xb503, -0xb504, x1, 1524, x2)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x1, -0xb503, 0xb504, x1, 1528, x2)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xffff4aff, -0xb503, 0x2, x1, 1532, x2)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x5554a051, -0xb503, 0x55555554, x1, 1536, x2)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xffff4afd, -0xb503, 0x0, x1, 1540, x2)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xffff4b01, -0xb503, 0x4, x1, 1544, x2)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x33327e2f, -0xb503, 0x33333332, x1, 1548, x2)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x6665b162, -0xb503, 0x66666665, x1, 1552, x2)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0x0, -0xb503, 0xb503, x1, 1556, x2)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x5554a053, -0xb503, 0x55555556, x1, 1560, x2)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaa9f5a8, -0xb503, -0x55555555, x1, 1564, x2)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xffff4b03, -0xb503, 0x6, x1, 1568, x2)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x33327e31, -0xb503, 0x33333334, x1, 1572, x2)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x6665b164, -0xb503, 0x66666667, x1, 1576, x2)
+
+inst_418:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0xfffe95fa, -0xb503, -0xb503, x1, 1580, x2)
+
+inst_419:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x2, -0xb503, 0xb505, x1, 1584, x2)
+
+inst_420:
+// rs1_val==46341 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xb508, 0xb505, 0x3, x1, 1588, x2)
+
+inst_421:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x55560a5a, 0xb505, 0x55555555, x1, 1592, x2)
+
+inst_422:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaab5faf, 0xb505, -0x55555556, x1, 1596, x2)
+
+inst_423:
+// rs1_val==46341 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xb50a, 0xb505, 0x5, x1, 1600, x2)
+
+inst_424:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x3333e838, 0xb505, 0x33333333, x1, 1604, x2)
+
+inst_425:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x66671b6b, 0xb505, 0x66666666, x1, 1608, x2)
+
+inst_426:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0x1, 0xb505, -0xb504, x1, 1612, x2)
+
+inst_427:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x16a09, 0xb505, 0xb504, x1, 1616, x2)
+
+inst_428:
+// rs1_val==46341 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xb507, 0xb505, 0x2, x1, 1620, x2)
+
+inst_429:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x55560a59, 0xb505, 0x55555554, x1, 1624, x2)
+
+inst_430:
+// rs1_val==46341 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xb505, 0xb505, 0x0, x1, 1628, x2)
+
+inst_431:
+// rs1_val==46341 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xb509, 0xb505, 0x4, x1, 1632, x2)
+
+inst_432:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x3333e837, 0xb505, 0x33333332, x1, 1636, x2)
+
+inst_433:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x66671b6a, 0xb505, 0x66666665, x1, 1640, x2)
+
+inst_434:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0x16a08, 0xb505, 0xb503, x1, 1644, x2)
+
+inst_435:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x55560a5b, 0xb505, 0x55555556, x1, 1648, x2)
+
+inst_436:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaab5fb0, 0xb505, -0x55555555, x1, 1652, x2)
+
+inst_437:
+// rs1_val==46341 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xb50b, 0xb505, 0x6, x1, 1656, x2)
+
+inst_438:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x3333e839, 0xb505, 0x33333334, x1, 1660, x2)
+
+inst_439:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x66671b6c, 0xb505, 0x66666667, x1, 1664, x2)
+
+inst_440:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0x2, 0xb505, -0xb503, x1, 1668, x2)
+
+inst_441:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb505; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x16a0a, 0xb505, 0xb505, x1, 1672, x2)
+
+inst_442:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x55555554, 0x0, 0x55555554, x1, 1676, x2)
+
+inst_443:
+// rs1_val==0 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x0, 0x0, 0x0, x1, 1680, x2)
+
+inst_444:
+// rs1_val==0 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x4, 0x0, 0x4, x1, 1684, x2)
+
+inst_445:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x33333332, 0x0, 0x33333332, x1, 1688, x2)
+
+inst_446:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x66666665, 0x0, 0x66666665, x1, 1692, x2)
+
+inst_447:
+// rs1_val==0 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0xb503, 0x0, 0xb503, x1, 1696, x2)
+
+inst_448:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x55555556, 0x0, 0x55555556, x1, 1700, x2)
+
+inst_449:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab, 0x0, -0x55555555, x1, 1704, x2)
+
+inst_450:
+// rs1_val==0 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x6, 0x0, 0x6, x1, 1708, x2)
+
+inst_451:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x33333334, 0x0, 0x33333334, x1, 1712, x2)
+
+inst_452:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x66666667, 0x0, 0x66666667, x1, 1716, x2)
+
+inst_453:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0xffff4afd, 0x0, -0xb503, x1, 1720, x2)
+
+inst_454:
+// rs1_val==0 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0xb505, 0x0, 0xb505, x1, 1724, x2)
+
+inst_455:
+// rs1_val==4 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x7, 0x4, 0x3, x1, 1728, x2)
+
+inst_456:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x55555559, 0x4, 0x55555555, x1, 1732, x2)
+
+inst_457:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaae, 0x4, -0x55555556, x1, 1736, x2)
+
+inst_458:
+// rs1_val==4 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x9, 0x4, 0x5, x1, 1740, x2)
+
+inst_459:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x33333337, 0x4, 0x33333333, x1, 1744, x2)
+
+inst_460:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x6666666a, 0x4, 0x66666666, x1, 1748, x2)
+
+inst_461:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0xffff4b00, 0x4, -0xb504, x1, 1752, x2)
+
+inst_462:
+// rs1_val==4 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0xb508, 0x4, 0xb504, x1, 1756, x2)
+
+inst_463:
+// rs1_val==4 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x6, 0x4, 0x2, x1, 1760, x2)
+
+inst_464:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x55555558, 0x4, 0x55555554, x1, 1764, x2)
+
+inst_465:
+// rs1_val==4 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x4, 0x4, 0x0, x1, 1768, x2)
+
+inst_466:
+// rs1_val==4 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x8, 0x4, 0x4, x1, 1772, x2)
+
+inst_467:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x33333336, 0x4, 0x33333332, x1, 1776, x2)
+
+inst_468:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x66666669, 0x4, 0x66666665, x1, 1780, x2)
+
+inst_469:
+// rs1_val==4 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0xb507, 0x4, 0xb503, x1, 1784, x2)
+
+inst_470:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x5555555a, 0x4, 0x55555556, x1, 1788, x2)
+
+inst_471:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaf, 0x4, -0x55555555, x1, 1792, x2)
+
+inst_472:
+// rs1_val==4 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xa, 0x4, 0x6, x1, 1796, x2)
+
+inst_473:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x33333338, 0x4, 0x33333334, x1, 1800, x2)
+
+inst_474:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x6666666b, 0x4, 0x66666667, x1, 1804, x2)
+
+inst_475:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0xffff4b01, 0x4, -0xb503, x1, 1808, x2)
+
+inst_476:
+// rs1_val==4 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0xb509, 0x4, 0xb505, x1, 1812, x2)
+
+inst_477:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x33333335, 0x33333332, 0x3, x1, 1816, x2)
+
+inst_478:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x88888887, 0x33333332, 0x55555555, x1, 1820, x2)
+
+inst_479:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xdddddddc, 0x33333332, -0x55555556, x1, 1824, x2)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x33333337, 0x33333332, 0x5, x1, 1828, x2)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x66666665, 0x33333332, 0x33333333, x1, 1832, x2)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x99999998, 0x33333332, 0x66666666, x1, 1836, x2)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0x33327e2e, 0x33333332, -0xb504, x1, 1840, x2)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x3333e836, 0x33333332, 0xb504, x1, 1844, x2)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x33333334, 0x33333332, 0x2, x1, 1848, x2)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x88888886, 0x33333332, 0x55555554, x1, 1852, x2)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x33333332, 0x33333332, 0x0, x1, 1856, x2)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x33333336, 0x33333332, 0x4, x1, 1860, x2)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x66666664, 0x33333332, 0x33333332, x1, 1864, x2)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x99999997, 0x33333332, 0x66666665, x1, 1868, x2)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0x3333e835, 0x33333332, 0xb503, x1, 1872, x2)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x88888888, 0x33333332, 0x55555556, x1, 1876, x2)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xdddddddd, 0x33333332, -0x55555555, x1, 1880, x2)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x33333338, 0x33333332, 0x6, x1, 1884, x2)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x66666666, 0x33333332, 0x33333334, x1, 1888, x2)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x99999999, 0x33333332, 0x66666667, x1, 1892, x2)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0x33327e2f, 0x33333332, -0xb503, x1, 1896, x2)
+
+inst_498:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x3333e837, 0x33333332, 0xb505, x1, 1900, x2)
+
+inst_499:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x66666668, 0x66666665, 0x3, x1, 1904, x2)
+
+inst_500:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbba, 0x66666665, 0x55555555, x1, 1908, x2)
+
+inst_501:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x1111110f, 0x66666665, -0x55555556, x1, 1912, x2)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x6666666a, 0x66666665, 0x5, x1, 1916, x2)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x99999998, 0x66666665, 0x33333333, x1, 1920, x2)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0xcccccccb, 0x66666665, 0x66666666, x1, 1924, x2)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0x6665b161, 0x66666665, -0xb504, x1, 1928, x2)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x66671b69, 0x66666665, 0xb504, x1, 1932, x2)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x66666667, 0x66666665, 0x2, x1, 1936, x2)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbb9, 0x66666665, 0x55555554, x1, 1940, x2)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x66666665, 0x66666665, 0x0, x1, 1944, x2)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x66666669, 0x66666665, 0x4, x1, 1948, x2)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x99999997, 0x66666665, 0x33333332, x1, 1952, x2)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0xccccccca, 0x66666665, 0x66666665, x1, 1956, x2)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0x66671b68, 0x66666665, 0xb503, x1, 1960, x2)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbb, 0x66666665, 0x55555556, x1, 1964, x2)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x11111110, 0x66666665, -0x55555555, x1, 1968, x2)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x6666666b, 0x66666665, 0x6, x1, 1972, x2)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x99999999, 0x66666665, 0x33333334, x1, 1976, x2)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0xcccccccc, 0x66666665, 0x66666667, x1, 1980, x2)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0x6665b162, 0x66666665, -0xb503, x1, 1984, x2)
+
+inst_520:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x66671b6a, 0x66666665, 0xb505, x1, 1988, x2)
+
+inst_521:
+// rs1_val==46339 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xb506, 0xb503, 0x3, x1, 1992, x2)
+
+inst_522:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x55560a58, 0xb503, 0x55555555, x1, 1996, x2)
+
+inst_523:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaab5fad, 0xb503, -0x55555556, x1, 2000, x2)
+
+inst_524:
+// rs1_val==46339 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xb508, 0xb503, 0x5, x1, 2004, x2)
+
+inst_525:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x3333e836, 0xb503, 0x33333333, x1, 2008, x2)
+
+inst_526:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x66671b69, 0xb503, 0x66666666, x1, 2012, x2)
+
+inst_527:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0xffffffff, 0xb503, -0xb504, x1, 2016, x2)
+
+inst_528:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x16a07, 0xb503, 0xb504, x1, 2020, x2)
+
+inst_529:
+// rs1_val==46339 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xb505, 0xb503, 0x2, x1, 2024, x2)
+
+inst_530:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0x55560a57, 0xb503, 0x55555554, x1, 2028, x2)
+
+inst_531:
+// rs1_val==46339 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xb503, 0xb503, 0x0, x1, 2032, x2)
+
+inst_532:
+// rs1_val==46339 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xb507, 0xb503, 0x4, x1, 2036, x2)
+
+inst_533:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x3333e835, 0xb503, 0x33333332, x1, 2040, x2)
+
+inst_534:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x66671b68, 0xb503, 0x66666665, x1, 2044, x2)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_535:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0x16a06, 0xb503, 0xb503, x1, 0, x2)
+
+inst_536:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x55560a59, 0xb503, 0x55555556, x1, 4, x2)
+
+inst_537:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaab5fae, 0xb503, -0x55555555, x1, 8, x2)
+
+inst_538:
+// rs1_val==46339 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xb509, 0xb503, 0x6, x1, 12, x2)
+
+inst_539:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x3333e837, 0xb503, 0x33333334, x1, 16, x2)
+
+inst_540:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x66671b6a, 0xb503, 0x66666667, x1, 20, x2)
+
+inst_541:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0x0, 0xb503, -0xb503, x1, 24, x2)
+
+inst_542:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb503; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x16a08, 0xb503, 0xb505, x1, 28, x2)
+
+inst_543:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x55555559, 0x55555556, 0x3, x1, 32, x2)
+
+inst_544:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab, 0x55555556, 0x55555555, x1, 36, x2)
+
+inst_545:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x0, 0x55555556, -0x55555556, x1, 40, x2)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x5555555b, 0x55555556, 0x5, x1, 44, x2)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0x88888889, 0x55555556, 0x33333333, x1, 48, x2)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbc, 0x55555556, 0x66666666, x1, 52, x2)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0x5554a052, 0x55555556, -0xb504, x1, 56, x2)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0x55560a5a, 0x55555556, 0xb504, x1, 60, x2)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x55555558, 0x55555556, 0x2, x1, 64, x2)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaa, 0x55555556, 0x55555554, x1, 68, x2)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x55555556, 0x55555556, 0x0, x1, 72, x2)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x5555555a, 0x55555556, 0x4, x1, 76, x2)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0x88888888, 0x55555556, 0x33333332, x1, 80, x2)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbb, 0x55555556, 0x66666665, x1, 84, x2)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0x55560a59, 0x55555556, 0xb503, x1, 88, x2)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaac, 0x55555556, 0x55555556, x1, 92, x2)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x1, 0x55555556, -0x55555555, x1, 96, x2)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x5555555c, 0x55555556, 0x6, x1, 100, x2)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0x8888888a, 0x55555556, 0x33333334, x1, 104, x2)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbd, 0x55555556, 0x66666667, x1, 108, x2)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb503
+TEST_CR_OP( c.add, x10, x11, 0x5554a053, 0x55555556, -0xb503, x1, 112, x2)
+
+inst_564:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb505
+TEST_CR_OP( c.add, x10, x11, 0x55560a5b, 0x55555556, 0xb505, x1, 116, x2)
+
+inst_565:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaae, -0x55555555, 0x3, x1, 120, x2)
+
+inst_566:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x0, -0x55555555, 0x55555555, x1, 124, x2)
+
+inst_567:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x55555555, -0x55555555, -0x55555556, x1, 128, x2)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaab0, -0x55555555, 0x5, x1, 132, x2)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333333
+TEST_CR_OP( c.add, x10, x11, 0xddddddde, -0x55555555, 0x33333333, x1, 136, x2)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666666
+TEST_CR_OP( c.add, x10, x11, 0x11111111, -0x55555555, 0x66666666, x1, 140, x2)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb504
+TEST_CR_OP( c.add, x10, x11, 0xaaa9f5a7, -0x55555555, -0xb504, x1, 144, x2)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb504
+TEST_CR_OP( c.add, x10, x11, 0xaaab5faf, -0x55555555, 0xb504, x1, 148, x2)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaad, -0x55555555, 0x2, x1, 152, x2)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555554
+TEST_CR_OP( c.add, x10, x11, 0xffffffff, -0x55555555, 0x55555554, x1, 156, x2)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab, -0x55555555, 0x0, x1, 160, x2)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaf, -0x55555555, 0x4, x1, 164, x2)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333332
+TEST_CR_OP( c.add, x10, x11, 0xdddddddd, -0x55555555, 0x33333332, x1, 168, x2)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666665
+TEST_CR_OP( c.add, x10, x11, 0x11111110, -0x55555555, 0x66666665, x1, 172, x2)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb503
+TEST_CR_OP( c.add, x10, x11, 0xaaab5fae, -0x55555555, 0xb503, x1, 176, x2)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555556
+TEST_CR_OP( c.add, x10, x11, 0x1, -0x55555555, 0x55555556, x1, 180, x2)
+
+inst_581:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555555
+TEST_CR_OP( c.add, x10, x11, 0x55555556, -0x55555555, -0x55555555, x1, 184, x2)
+
+inst_582:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaab1, -0x55555555, 0x6, x1, 188, x2)
+
+inst_583:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333334
+TEST_CR_OP( c.add, x10, x11, 0xdddddddf, -0x55555555, 0x33333334, x1, 192, x2)
+
+inst_584:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666667
+TEST_CR_OP( c.add, x10, x11, 0x11111112, -0x55555555, 0x66666667, x1, 196, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x8_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x8_1:
+ .fill 23*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 50*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/caddi-01.S b/riscof/suite/rv32i_m/C/caddi-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..d6678ea0a911fa64da32e3e2fa9ed5c9dea35518
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/caddi-01.S
@@ -0,0 +1,1949 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.addi instruction of the RISC-V C extension for the caddi covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",caddi)
+
+RVTEST_SIGBASE( x11,signature_x11_1)
+
+inst_0:
+// rd==x27, rs1_val == imm_val, rs1_val > 0 and imm_val > 0
+// opcode:c.addi; op1:x27; dest:x27 op1val:0x9; immval:0x9
+TEST_CI_OP( c.addi, x27, 0x12, 0x9, 0x9, x11, 0, x18)
+
+inst_1:
+// rd==x9, rs1_val != imm_val, imm_val == (2**(6-1)-1), imm_val == 31, rs1_val < 0 and imm_val > 0
+// opcode:c.addi; op1:x9; dest:x9 op1val:-0x40000000; immval:0x1f
+TEST_CI_OP( c.addi, x9, 0xc000001f, -0x40000000, 0x1f, x11, 4, x18)
+
+inst_2:
+// rd==x22, rs1_val > 0 and imm_val < 0, imm_val == -17
+// opcode:c.addi; op1:x22; dest:x22 op1val:0x9; immval:-0x11
+TEST_CI_OP( c.addi, x22, 0xfffffff8, 0x9, -0x11, x11, 8, x18)
+
+inst_3:
+// rd==x12, rs1_val < 0 and imm_val < 0, rs1_val == -1025
+// opcode:c.addi; op1:x12; dest:x12 op1val:-0x401; immval:-0x7
+TEST_CI_OP( c.addi, x12, 0xfffffbf8, -0x401, -0x7, x11, 12, x18)
+
+inst_4:
+// rd==x16, imm_val == (-2**(6-1)), imm_val == -32, rs1_val == 16
+// opcode:c.addi; op1:x16; dest:x16 op1val:0x10; immval:-0x20
+TEST_CI_OP( c.addi, x16, 0xfffffff0, 0x10, -0x20, x11, 16, x18)
+
+inst_5:
+// rd==x10, imm_val == 0, rs1_val == 4, rs1_val==4 and imm_val==0
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x4, 0x4, 0x0, x11, 20, x18)
+
+inst_6:
+// rd==x14, imm_val == 1, rs1_val == 256
+// opcode:c.addi; op1:x14; dest:x14 op1val:0x100; immval:0x1
+TEST_CI_OP( c.addi, x14, 0x101, 0x100, 0x1, x11, 24, x18)
+
+inst_7:
+// rd==x13, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648
+// opcode:c.addi; op1:x13; dest:x13 op1val:-0x80000000; immval:0x1f
+TEST_CI_OP( c.addi, x13, 0x8000001f, -0x80000000, 0x1f, x11, 28, x18)
+
+inst_8:
+// rd==x31, rs1_val == 0, rs1_val==0 and imm_val==0
+// opcode:c.addi; op1:x31; dest:x31 op1val:0x0; immval:0x0
+TEST_CI_OP( c.addi, x31, 0x0, 0x0, 0x0, x11, 32, x18)
+
+inst_9:
+// rd==x3, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647, imm_val == -22
+// opcode:c.addi; op1:x3; dest:x3 op1val:0x7fffffff; immval:-0x16
+TEST_CI_OP( c.addi, x3, 0x7fffffe9, 0x7fffffff, -0x16, x11, 36, x18)
+
+inst_10:
+// rd==x7, rs1_val == 1, imm_val == 4
+// opcode:c.addi; op1:x7; dest:x7 op1val:0x1; immval:0x4
+TEST_CI_OP( c.addi, x7, 0x5, 0x1, 0x4, x11, 40, x18)
+
+inst_11:
+// rd==x1, imm_val == 2, rs1_val==1717986918 and imm_val==2
+// opcode:c.addi; op1:x1; dest:x1 op1val:0x66666666; immval:0x2
+TEST_CI_OP( c.addi, x1, 0x66666668, 0x66666666, 0x2, x11, 44, x18)
+
+inst_12:
+// rd==x30, imm_val == 8, rs1_val == -4194305
+// opcode:c.addi; op1:x30; dest:x30 op1val:-0x400001; immval:0x8
+TEST_CI_OP( c.addi, x30, 0xffc00007, -0x400001, 0x8, x11, 48, x18)
+
+inst_13:
+// rd==x6, imm_val == 16, rs1_val == -131073
+// opcode:c.addi; op1:x6; dest:x6 op1val:-0x20001; immval:0x10
+TEST_CI_OP( c.addi, x6, 0xfffe000f, -0x20001, 0x10, x11, 52, x18)
+
+inst_14:
+// rd==x19, imm_val == -2, rs1_val == -2
+// opcode:c.addi; op1:x19; dest:x19 op1val:-0x2; immval:-0x2
+TEST_CI_OP( c.addi, x19, 0xfffffffc, -0x2, -0x2, x11, 56, x18)
+
+inst_15:
+// rd==x25, imm_val == -3, rs1_val == -536870913
+// opcode:c.addi; op1:x25; dest:x25 op1val:-0x20000001; immval:-0x3
+TEST_CI_OP( c.addi, x25, 0xdffffffc, -0x20000001, -0x3, x11, 60, x18)
+
+inst_16:
+// rd==x28, imm_val == -5,
+// opcode:c.addi; op1:x28; dest:x28 op1val:-0x7; immval:-0x5
+TEST_CI_OP( c.addi, x28, 0xfffffff4, -0x7, -0x5, x11, 64, x18)
+
+inst_17:
+// rd==x24, imm_val == -9,
+// opcode:c.addi; op1:x24; dest:x24 op1val:-0x7; immval:-0x9
+TEST_CI_OP( c.addi, x24, 0xfffffff0, -0x7, -0x9, x11, 68, x18)
+
+inst_18:
+// rd==x15, imm_val == 21, rs1_val == 8
+// opcode:c.addi; op1:x15; dest:x15 op1val:0x8; immval:0x15
+TEST_CI_OP( c.addi, x15, 0x1d, 0x8, 0x15, x11, 72, x18)
+
+inst_19:
+// rd==x2, rs1_val == 2, rs1_val==2 and imm_val==2
+// opcode:c.addi; op1:x2; dest:x2 op1val:0x2; immval:0x2
+TEST_CI_OP( c.addi, x2, 0x4, 0x2, 0x2, x11, 76, x18)
+
+inst_20:
+// rd==x8, rs1_val == 32,
+// opcode:c.addi; op1:x8; dest:x8 op1val:0x20; immval:0x3
+TEST_CI_OP( c.addi, x8, 0x23, 0x20, 0x3, x11, 80, x18)
+
+inst_21:
+// rd==x23, rs1_val == 64,
+// opcode:c.addi; op1:x23; dest:x23 op1val:0x40; immval:-0x7
+TEST_CI_OP( c.addi, x23, 0x39, 0x40, -0x7, x11, 84, x18)
+
+inst_22:
+// rd==x17, rs1_val == 128,
+// opcode:c.addi; op1:x17; dest:x17 op1val:0x80; immval:-0x4
+TEST_CI_OP( c.addi, x17, 0x7c, 0x80, -0x4, x11, 88, x18)
+
+inst_23:
+// rd==x20, rs1_val == 512,
+// opcode:c.addi; op1:x20; dest:x20 op1val:0x200; immval:0x2
+TEST_CI_OP( c.addi, x20, 0x202, 0x200, 0x2, x11, 92, x18)
+
+inst_24:
+// rd==x5, rs1_val == 1024,
+// opcode:c.addi; op1:x5; dest:x5 op1val:0x400; immval:0x10
+TEST_CI_OP( c.addi, x5, 0x410, 0x400, 0x10, x11, 96, x18)
+
+inst_25:
+// rd==x26, rs1_val == 2048,
+// opcode:c.addi; op1:x26; dest:x26 op1val:0x800; immval:0x10
+TEST_CI_OP( c.addi, x26, 0x810, 0x800, 0x10, x11, 100, x18)
+
+inst_26:
+// rd==x4, rs1_val == 4096,
+// opcode:c.addi; op1:x4; dest:x4 op1val:0x1000; immval:0x15
+TEST_CI_OP( c.addi, x4, 0x1015, 0x1000, 0x15, x11, 104, x18)
+
+inst_27:
+// rd==x29, rs1_val == 8192,
+// opcode:c.addi; op1:x29; dest:x29 op1val:0x2000; immval:-0x4
+TEST_CI_OP( c.addi, x29, 0x1ffc, 0x2000, -0x4, x11, 108, x2)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_28:
+// rd==x18, rs1_val == 16384,
+// opcode:c.addi; op1:x18; dest:x18 op1val:0x4000; immval:0x0
+TEST_CI_OP( c.addi, x18, 0x4000, 0x4000, 0x0, x1, 0, x2)
+
+inst_29:
+// rd==x11, rs1_val == 32768,
+// opcode:c.addi; op1:x11; dest:x11 op1val:0x8000; immval:0x6
+TEST_CI_OP( c.addi, x11, 0x8006, 0x8000, 0x6, x1, 4, x2)
+
+inst_30:
+// rd==x21, rs1_val == 65536,
+// opcode:c.addi; op1:x21; dest:x21 op1val:0x10000; immval:0x5
+TEST_CI_OP( c.addi, x21, 0x10005, 0x10000, 0x5, x1, 8, x2)
+
+inst_31:
+// rs1_val == 131072,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x20000; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x1fffc, 0x20000, -0x4, x1, 12, x2)
+
+inst_32:
+// rs1_val == 262144,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x40000; immval:-0x7
+TEST_CI_OP( c.addi, x10, 0x3fff9, 0x40000, -0x7, x1, 16, x2)
+
+inst_33:
+// rs1_val == 524288,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x80000; immval:-0x10
+TEST_CI_OP( c.addi, x10, 0x7fff0, 0x80000, -0x10, x1, 20, x2)
+
+inst_34:
+// rs1_val == 1048576,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x100000; immval:-0x9
+TEST_CI_OP( c.addi, x10, 0xffff7, 0x100000, -0x9, x1, 24, x2)
+
+inst_35:
+// rs1_val == 2097152,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x200000; immval:-0x16
+TEST_CI_OP( c.addi, x10, 0x1fffea, 0x200000, -0x16, x1, 28, x2)
+
+inst_36:
+// rs1_val == 4194304,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x400000; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x400009, 0x400000, 0x9, x1, 32, x2)
+
+inst_37:
+// rs1_val == 8388608,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x800000; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x7ffffc, 0x800000, -0x4, x1, 36, x2)
+
+inst_38:
+// rs1_val == 16777216,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x1000000; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x1000004, 0x1000000, 0x4, x1, 40, x2)
+
+inst_39:
+// rs1_val == 33554432,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2000000; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x2000004, 0x2000000, 0x4, x1, 44, x2)
+
+inst_40:
+// rs1_val == 67108864,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4000000; immval:-0x10
+TEST_CI_OP( c.addi, x10, 0x3fffff0, 0x4000000, -0x10, x1, 48, x2)
+
+inst_41:
+// rs1_val == 134217728,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x8000000; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x8000000, 0x8000000, 0x0, x1, 52, x2)
+
+inst_42:
+// rs1_val == 268435456,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x10000000; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x10000004, 0x10000000, 0x4, x1, 56, x2)
+
+inst_43:
+// rs1_val == 536870912,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x20000000; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x20000000, 0x20000000, 0x0, x1, 60, x2)
+
+inst_44:
+// rs1_val == 1073741824,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x40000000; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x3fffffff, 0x40000000, -0x1, x1, 64, x2)
+
+inst_45:
+// rs1_val == -3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x3; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x3, -0x3, 0x6, x1, 68, x2)
+
+inst_46:
+// rs1_val == -5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5; immval:-0x20
+TEST_CI_OP( c.addi, x10, 0xffffffdb, -0x5, -0x20, x1, 72, x2)
+
+inst_47:
+// rs1_val == -9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x9; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xfffffff2, -0x9, -0x5, x1, 76, x2)
+
+inst_48:
+// rs1_val == -17,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x11; immval:0x1f
+TEST_CI_OP( c.addi, x10, 0xe, -0x11, 0x1f, x1, 80, x2)
+
+inst_49:
+// rs1_val == -33,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x21; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xffffffde, -0x21, -0x1, x1, 84, x2)
+
+inst_50:
+// rs1_val == -65,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x41; immval:-0x16
+TEST_CI_OP( c.addi, x10, 0xffffffa9, -0x41, -0x16, x1, 88, x2)
+
+inst_51:
+// rs1_val == -129,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x81; immval:-0x20
+TEST_CI_OP( c.addi, x10, 0xffffff5f, -0x81, -0x20, x1, 92, x2)
+
+inst_52:
+// rs1_val == -257,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x101; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xfffffefb, -0x101, -0x4, x1, 96, x2)
+
+inst_53:
+// rs1_val == -513,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x201; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xfffffe03, -0x201, 0x4, x1, 100, x2)
+
+inst_54:
+// rs1_val == -2049,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x801; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xfffff804, -0x801, 0x5, x1, 104, x2)
+
+inst_55:
+// rs1_val == -4097,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x1001; immval:0x10
+TEST_CI_OP( c.addi, x10, 0xfffff00f, -0x1001, 0x10, x1, 108, x2)
+
+inst_56:
+// rs1_val == -8193,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x2001; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xffffe004, -0x2001, 0x5, x1, 112, x2)
+
+inst_57:
+// rs1_val == -16385,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x4001; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xffffbffe, -0x4001, -0x1, x1, 116, x2)
+
+inst_58:
+// rs1_val == -32769,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x8001; immval:0xf
+TEST_CI_OP( c.addi, x10, 0xffff800e, -0x8001, 0xf, x1, 120, x2)
+
+inst_59:
+// rs1_val == -65537,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x10001; immval:-0x9
+TEST_CI_OP( c.addi, x10, 0xfffefff6, -0x10001, -0x9, x1, 124, x2)
+
+inst_60:
+// rs1_val == -262145,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x40001; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xfffbfffa, -0x40001, -0x5, x1, 128, x2)
+
+inst_61:
+// rs1_val == -524289,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x80001; immval:-0x10
+TEST_CI_OP( c.addi, x10, 0xfff7ffef, -0x80001, -0x10, x1, 132, x2)
+
+inst_62:
+// rs1_val == -1048577,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x100001; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xffeffffd, -0x100001, -0x2, x1, 136, x2)
+
+inst_63:
+// rs1_val == -2097153,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x200001; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xffe00004, -0x200001, 0x5, x1, 140, x2)
+
+inst_64:
+// rs1_val == -8388609,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x800001; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xff7ffffb, -0x800001, -0x4, x1, 144, x2)
+
+inst_65:
+// rs1_val == -16777217,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x1000001; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xff000004, -0x1000001, 0x5, x1, 148, x2)
+
+inst_66:
+// rs1_val == -33554433,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x2000001; immval:-0x8
+TEST_CI_OP( c.addi, x10, 0xfdfffff7, -0x2000001, -0x8, x1, 152, x2)
+
+inst_67:
+// rs1_val == -67108865,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x4000001; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xfc000003, -0x4000001, 0x4, x1, 156, x2)
+
+inst_68:
+// rs1_val == -134217729,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x8000001; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xf8000006, -0x8000001, 0x7, x1, 160, x2)
+
+inst_69:
+// rs1_val == -268435457,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x10000001; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xf0000003, -0x10000001, 0x4, x1, 164, x2)
+
+inst_70:
+// rs1_val == -1073741825,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x40000001; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xc0000003, -0x40000001, 0x4, x1, 168, x2)
+
+inst_71:
+// rs1_val == 1431655765, rs1_val==1431655765 and imm_val==4
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x55555559, 0x55555555, 0x4, x1, 172, x2)
+
+inst_72:
+// rs1_val == -1431655766, rs1_val==-1431655766 and imm_val==-2
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xaaaaaaa8, -0x55555556, -0x2, x1, 176, x2)
+
+inst_73:
+// rs1_val==3 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x6, 0x3, 0x3, x1, 180, x2)
+
+inst_74:
+// rs1_val==3 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x8, 0x3, 0x5, x1, 184, x2)
+
+inst_75:
+// rs1_val==3 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xd, 0x3, 0xa, x1, 188, x2)
+
+inst_76:
+// rs1_val==3 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x9, 0x3, 0x6, x1, 192, x2)
+
+inst_77:
+// rs1_val==3 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x1, 0x3, -0x2, x1, 196, x2)
+
+inst_78:
+// rs1_val==3 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xfffffffe, 0x3, -0x5, x1, 200, x2)
+
+inst_79:
+// rs1_val==3 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x5, 0x3, 0x2, x1, 204, x2)
+
+inst_80:
+// rs1_val==3 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x7, 0x3, 0x4, x1, 208, x2)
+
+inst_81:
+// rs1_val==3 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xc, 0x3, 0x9, x1, 212, x2)
+
+inst_82:
+// rs1_val==3 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x3, 0x3, 0x0, x1, 216, x2)
+
+inst_83:
+// rs1_val==3 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xe, 0x3, 0xb, x1, 220, x2)
+
+inst_84:
+// rs1_val==3 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xa, 0x3, 0x7, x1, 224, x2)
+
+inst_85:
+// rs1_val==3 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x2, 0x3, -0x1, x1, 228, x2)
+
+inst_86:
+// rs1_val==3 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xffffffff, 0x3, -0x4, x1, 232, x2)
+
+inst_87:
+// rs1_val==1431655765 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x55555558, 0x55555555, 0x3, x1, 236, x2)
+
+inst_88:
+// rs1_val==1431655765 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x5555555a, 0x55555555, 0x5, x1, 240, x2)
+
+inst_89:
+// rs1_val==1431655765 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x5555555f, 0x55555555, 0xa, x1, 244, x2)
+
+inst_90:
+// rs1_val==1431655765 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x5555555b, 0x55555555, 0x6, x1, 248, x2)
+
+inst_91:
+// rs1_val==1431655765 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x55555553, 0x55555555, -0x2, x1, 252, x2)
+
+inst_92:
+// rs1_val==1431655765 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x55555550, 0x55555555, -0x5, x1, 256, x2)
+
+inst_93:
+// rs1_val==1431655765 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x55555557, 0x55555555, 0x2, x1, 260, x2)
+
+inst_94:
+// rs1_val==1431655765 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x5555555e, 0x55555555, 0x9, x1, 264, x2)
+
+inst_95:
+// rs1_val==1431655765 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x55555555, 0x55555555, 0x0, x1, 268, x2)
+
+inst_96:
+// rs1_val==1431655765 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x55555560, 0x55555555, 0xb, x1, 272, x2)
+
+inst_97:
+// rs1_val==1431655765 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x5555555c, 0x55555555, 0x7, x1, 276, x2)
+
+inst_98:
+// rs1_val==1431655765 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x55555554, 0x55555555, -0x1, x1, 280, x2)
+
+inst_99:
+// rs1_val==1431655765 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555555; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x55555551, 0x55555555, -0x4, x1, 284, x2)
+
+inst_100:
+// rs1_val==-1431655766 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xaaaaaaad, -0x55555556, 0x3, x1, 288, x2)
+
+inst_101:
+// rs1_val==-1431655766 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaf, -0x55555556, 0x5, x1, 292, x2)
+
+inst_102:
+// rs1_val==-1431655766 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xaaaaaab4, -0x55555556, 0xa, x1, 296, x2)
+
+inst_103:
+// rs1_val==-1431655766 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xaaaaaab0, -0x55555556, 0x6, x1, 300, x2)
+
+inst_104:
+// rs1_val==-1431655766 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xaaaaaaa5, -0x55555556, -0x5, x1, 304, x2)
+
+inst_105:
+// rs1_val==-1431655766 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xaaaaaaac, -0x55555556, 0x2, x1, 308, x2)
+
+inst_106:
+// rs1_val==-1431655766 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xaaaaaaae, -0x55555556, 0x4, x1, 312, x2)
+
+inst_107:
+// rs1_val==-1431655766 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xaaaaaab3, -0x55555556, 0x9, x1, 316, x2)
+
+inst_108:
+// rs1_val==-1431655766 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaa, -0x55555556, 0x0, x1, 320, x2)
+
+inst_109:
+// rs1_val==-1431655766 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xaaaaaab5, -0x55555556, 0xb, x1, 324, x2)
+
+inst_110:
+// rs1_val==-1431655766 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xaaaaaab1, -0x55555556, 0x7, x1, 328, x2)
+
+inst_111:
+// rs1_val==-1431655766 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xaaaaaaa9, -0x55555556, -0x1, x1, 332, x2)
+
+inst_112:
+// rs1_val==-1431655766 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555556; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xaaaaaaa6, -0x55555556, -0x4, x1, 336, x2)
+
+inst_113:
+// rs1_val==5 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x8, 0x5, 0x3, x1, 340, x2)
+
+inst_114:
+// rs1_val==5 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xa, 0x5, 0x5, x1, 344, x2)
+
+inst_115:
+// rs1_val==5 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xf, 0x5, 0xa, x1, 348, x2)
+
+inst_116:
+// rs1_val==5 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xb, 0x5, 0x6, x1, 352, x2)
+
+inst_117:
+// rs1_val==5 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x3, 0x5, -0x2, x1, 356, x2)
+
+inst_118:
+// rs1_val==5 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x0, 0x5, -0x5, x1, 360, x2)
+
+inst_119:
+// rs1_val==5 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x7, 0x5, 0x2, x1, 364, x2)
+
+inst_120:
+// rs1_val==5 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x9, 0x5, 0x4, x1, 368, x2)
+
+inst_121:
+// rs1_val==5 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xe, 0x5, 0x9, x1, 372, x2)
+
+inst_122:
+// rs1_val==5 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x5, 0x5, 0x0, x1, 376, x2)
+
+inst_123:
+// rs1_val==5 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x10, 0x5, 0xb, x1, 380, x2)
+
+inst_124:
+// rs1_val==5 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xc, 0x5, 0x7, x1, 384, x2)
+
+inst_125:
+// rs1_val==5 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x4, 0x5, -0x1, x1, 388, x2)
+
+inst_126:
+// rs1_val==5 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x1, 0x5, -0x4, x1, 392, x2)
+
+inst_127:
+// rs1_val==858993459 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x33333336, 0x33333333, 0x3, x1, 396, x2)
+
+inst_128:
+// rs1_val==858993459 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x33333338, 0x33333333, 0x5, x1, 400, x2)
+
+inst_129:
+// rs1_val==858993459 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x3333333d, 0x33333333, 0xa, x1, 404, x2)
+
+inst_130:
+// rs1_val==858993459 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x33333339, 0x33333333, 0x6, x1, 408, x2)
+
+inst_131:
+// rs1_val==858993459 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x33333331, 0x33333333, -0x2, x1, 412, x2)
+
+inst_132:
+// rs1_val==858993459 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x3333332e, 0x33333333, -0x5, x1, 416, x2)
+
+inst_133:
+// rs1_val==858993459 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x33333335, 0x33333333, 0x2, x1, 420, x2)
+
+inst_134:
+// rs1_val==858993459 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x33333337, 0x33333333, 0x4, x1, 424, x2)
+
+inst_135:
+// rs1_val==858993459 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x3333333c, 0x33333333, 0x9, x1, 428, x2)
+
+inst_136:
+// rs1_val==858993459 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x33333333, 0x33333333, 0x0, x1, 432, x2)
+
+inst_137:
+// rs1_val==858993459 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x3333333e, 0x33333333, 0xb, x1, 436, x2)
+
+inst_138:
+// rs1_val==858993459 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x3333333a, 0x33333333, 0x7, x1, 440, x2)
+
+inst_139:
+// rs1_val==858993459 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x33333332, 0x33333333, -0x1, x1, 444, x2)
+
+inst_140:
+// rs1_val==858993459 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333333; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x3333332f, 0x33333333, -0x4, x1, 448, x2)
+
+inst_141:
+// rs1_val==1717986918 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666666; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x66666669, 0x66666666, 0x3, x1, 452, x2)
+
+inst_142:
+// rs1_val==1717986918 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666666; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x6666666b, 0x66666666, 0x5, x1, 456, x2)
+
+inst_143:
+// rs1_val==1717986918 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666666; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x66666670, 0x66666666, 0xa, x1, 460, x2)
+
+inst_144:
+// rs1_val==1717986918 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666666; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x6666666c, 0x66666666, 0x6, x1, 464, x2)
+
+inst_145:
+// rs1_val==1717986918 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666666; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x66666664, 0x66666666, -0x2, x1, 468, x2)
+
+inst_146:
+// rs1_val==1717986918 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666666; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x66666661, 0x66666666, -0x5, x1, 472, x2)
+
+inst_147:
+// rs1_val==1717986918 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666666; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x6666666a, 0x66666666, 0x4, x1, 476, x2)
+
+inst_148:
+// rs1_val==1717986918 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666666; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x6666666f, 0x66666666, 0x9, x1, 480, x2)
+
+inst_149:
+// rs1_val==1717986918 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666666; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x66666666, 0x66666666, 0x0, x1, 484, x2)
+
+inst_150:
+// rs1_val==1717986918 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666666; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x66666671, 0x66666666, 0xb, x1, 488, x2)
+
+inst_151:
+// rs1_val==1717986918 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666666; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x6666666d, 0x66666666, 0x7, x1, 492, x2)
+
+inst_152:
+// rs1_val==1717986918 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666666; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x66666665, 0x66666666, -0x1, x1, 496, x2)
+
+inst_153:
+// rs1_val==1717986918 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666666; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x66666662, 0x66666666, -0x4, x1, 500, x2)
+
+inst_154:
+// rs1_val==-46340 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xffff4aff, -0xb504, 0x3, x1, 504, x2)
+
+inst_155:
+// rs1_val==-46340 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xffff4b01, -0xb504, 0x5, x1, 508, x2)
+
+inst_156:
+// rs1_val==-46340 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xffff4b06, -0xb504, 0xa, x1, 512, x2)
+
+inst_157:
+// rs1_val==-46340 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xffff4b02, -0xb504, 0x6, x1, 516, x2)
+
+inst_158:
+// rs1_val==-46340 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xffff4afa, -0xb504, -0x2, x1, 520, x2)
+
+inst_159:
+// rs1_val==-46340 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xffff4af7, -0xb504, -0x5, x1, 524, x2)
+
+inst_160:
+// rs1_val==-46340 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xffff4afe, -0xb504, 0x2, x1, 528, x2)
+
+inst_161:
+// rs1_val==-46340 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xffff4b00, -0xb504, 0x4, x1, 532, x2)
+
+inst_162:
+// rs1_val==-46340 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xffff4b05, -0xb504, 0x9, x1, 536, x2)
+
+inst_163:
+// rs1_val==-46340 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xffff4afc, -0xb504, 0x0, x1, 540, x2)
+
+inst_164:
+// rs1_val==-46340 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xffff4b07, -0xb504, 0xb, x1, 544, x2)
+
+inst_165:
+// rs1_val==-46340 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xffff4b03, -0xb504, 0x7, x1, 548, x2)
+
+inst_166:
+// rs1_val==-46340 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xffff4afb, -0xb504, -0x1, x1, 552, x2)
+
+inst_167:
+// rs1_val==-46340 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xffff4af8, -0xb504, -0x4, x1, 556, x2)
+
+inst_168:
+// rs1_val==46340 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xb507, 0xb504, 0x3, x1, 560, x2)
+
+inst_169:
+// rs1_val==46340 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xb509, 0xb504, 0x5, x1, 564, x2)
+
+inst_170:
+// rs1_val==46340 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xb50e, 0xb504, 0xa, x1, 568, x2)
+
+inst_171:
+// rs1_val==46340 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xb50a, 0xb504, 0x6, x1, 572, x2)
+
+inst_172:
+// rs1_val==46340 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xb502, 0xb504, -0x2, x1, 576, x2)
+
+inst_173:
+// rs1_val==46340 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xb4ff, 0xb504, -0x5, x1, 580, x2)
+
+inst_174:
+// rs1_val==46340 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xb506, 0xb504, 0x2, x1, 584, x2)
+
+inst_175:
+// rs1_val==46340 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xb508, 0xb504, 0x4, x1, 588, x2)
+
+inst_176:
+// rs1_val==46340 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xb50d, 0xb504, 0x9, x1, 592, x2)
+
+inst_177:
+// rs1_val==46340 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xb504, 0xb504, 0x0, x1, 596, x2)
+
+inst_178:
+// rs1_val==46340 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xb50f, 0xb504, 0xb, x1, 600, x2)
+
+inst_179:
+// rs1_val==46340 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xb50b, 0xb504, 0x7, x1, 604, x2)
+
+inst_180:
+// rs1_val==46340 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xb503, 0xb504, -0x1, x1, 608, x2)
+
+inst_181:
+// rs1_val==46340 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xb500, 0xb504, -0x4, x1, 612, x2)
+
+inst_182:
+// rs1_val==2 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x5, 0x2, 0x3, x1, 616, x2)
+
+inst_183:
+// rs1_val==2 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x7, 0x2, 0x5, x1, 620, x2)
+
+inst_184:
+// rs1_val==2 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xc, 0x2, 0xa, x1, 624, x2)
+
+inst_185:
+// rs1_val==2 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x8, 0x2, 0x6, x1, 628, x2)
+
+inst_186:
+// rs1_val==2 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x0, 0x2, -0x2, x1, 632, x2)
+
+inst_187:
+// rs1_val==2 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xfffffffd, 0x2, -0x5, x1, 636, x2)
+
+inst_188:
+// rs1_val==2 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x6, 0x2, 0x4, x1, 640, x2)
+
+inst_189:
+// rs1_val==2 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xb, 0x2, 0x9, x1, 644, x2)
+
+inst_190:
+// rs1_val==2 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x2, 0x2, 0x0, x1, 648, x2)
+
+inst_191:
+// rs1_val==2 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xd, 0x2, 0xb, x1, 652, x2)
+
+inst_192:
+// rs1_val==2 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x9, 0x2, 0x7, x1, 656, x2)
+
+inst_193:
+// rs1_val==2 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x1, 0x2, -0x1, x1, 660, x2)
+
+inst_194:
+// rs1_val==2 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xfffffffe, 0x2, -0x4, x1, 664, x2)
+
+inst_195:
+// rs1_val==1431655764 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x55555557, 0x55555554, 0x3, x1, 668, x2)
+
+inst_196:
+// rs1_val==1431655764 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x55555559, 0x55555554, 0x5, x1, 672, x2)
+
+inst_197:
+// rs1_val==1431655764 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x5555555e, 0x55555554, 0xa, x1, 676, x2)
+
+inst_198:
+// rs1_val==1431655764 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x5555555a, 0x55555554, 0x6, x1, 680, x2)
+
+inst_199:
+// rs1_val==1431655764 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x55555552, 0x55555554, -0x2, x1, 684, x2)
+
+inst_200:
+// rs1_val==1431655764 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x5555554f, 0x55555554, -0x5, x1, 688, x2)
+
+inst_201:
+// rs1_val==1431655764 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x55555556, 0x55555554, 0x2, x1, 692, x2)
+
+inst_202:
+// rs1_val==1431655764 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x55555558, 0x55555554, 0x4, x1, 696, x2)
+
+inst_203:
+// rs1_val==1431655764 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x5555555d, 0x55555554, 0x9, x1, 700, x2)
+
+inst_204:
+// rs1_val==1431655764 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x55555554, 0x55555554, 0x0, x1, 704, x2)
+
+inst_205:
+// rs1_val==1431655764 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x5555555f, 0x55555554, 0xb, x1, 708, x2)
+
+inst_206:
+// rs1_val==1431655764 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x5555555b, 0x55555554, 0x7, x1, 712, x2)
+
+inst_207:
+// rs1_val==1431655764 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x55555553, 0x55555554, -0x1, x1, 716, x2)
+
+inst_208:
+// rs1_val==1431655764 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555554; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x55555550, 0x55555554, -0x4, x1, 720, x2)
+
+inst_209:
+// rs1_val==0 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x3, 0x0, 0x3, x1, 724, x2)
+
+inst_210:
+// rs1_val==0 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x5, 0x0, 0x5, x1, 728, x2)
+
+inst_211:
+// rs1_val==0 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xa, 0x0, 0xa, x1, 732, x2)
+
+inst_212:
+// rs1_val==0 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x6, 0x0, 0x6, x1, 736, x2)
+
+inst_213:
+// rs1_val==0 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xfffffffe, 0x0, -0x2, x1, 740, x2)
+
+inst_214:
+// rs1_val==0 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xfffffffb, 0x0, -0x5, x1, 744, x2)
+
+inst_215:
+// rs1_val==0 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x2, 0x0, 0x2, x1, 748, x2)
+
+inst_216:
+// rs1_val==0 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x4, 0x0, 0x4, x1, 752, x2)
+
+inst_217:
+// rs1_val==0 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x9, 0x0, 0x9, x1, 756, x2)
+
+inst_218:
+// rs1_val==0 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xb, 0x0, 0xb, x1, 760, x2)
+
+inst_219:
+// rs1_val==0 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x7, 0x0, 0x7, x1, 764, x2)
+
+inst_220:
+// rs1_val==0 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xffffffff, 0x0, -0x1, x1, 768, x2)
+
+inst_221:
+// rs1_val==0 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xfffffffc, 0x0, -0x4, x1, 772, x2)
+
+inst_222:
+// rs1_val==4 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x7, 0x4, 0x3, x1, 776, x2)
+
+inst_223:
+// rs1_val==4 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x9, 0x4, 0x5, x1, 780, x2)
+
+inst_224:
+// rs1_val==4 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xe, 0x4, 0xa, x1, 784, x2)
+
+inst_225:
+// rs1_val==4 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xa, 0x4, 0x6, x1, 788, x2)
+
+inst_226:
+// rs1_val==4 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x2, 0x4, -0x2, x1, 792, x2)
+
+inst_227:
+// rs1_val==4 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xffffffff, 0x4, -0x5, x1, 796, x2)
+
+inst_228:
+// rs1_val==4 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x6, 0x4, 0x2, x1, 800, x2)
+
+inst_229:
+// rs1_val==4 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x8, 0x4, 0x4, x1, 804, x2)
+
+inst_230:
+// rs1_val==4 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xd, 0x4, 0x9, x1, 808, x2)
+
+inst_231:
+// rs1_val==4 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xf, 0x4, 0xb, x1, 812, x2)
+
+inst_232:
+// rs1_val==4 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xb, 0x4, 0x7, x1, 816, x2)
+
+inst_233:
+// rs1_val==4 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x3, 0x4, -0x1, x1, 820, x2)
+
+inst_234:
+// rs1_val==4 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x0, 0x4, -0x4, x1, 824, x2)
+
+inst_235:
+// rs1_val==858993458 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x33333335, 0x33333332, 0x3, x1, 828, x2)
+
+inst_236:
+// rs1_val==858993458 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x33333337, 0x33333332, 0x5, x1, 832, x2)
+
+inst_237:
+// rs1_val==858993458 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x3333333c, 0x33333332, 0xa, x1, 836, x2)
+
+inst_238:
+// rs1_val==858993458 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x33333338, 0x33333332, 0x6, x1, 840, x2)
+
+inst_239:
+// rs1_val==858993458 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x33333330, 0x33333332, -0x2, x1, 844, x2)
+
+inst_240:
+// rs1_val==858993458 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x3333332d, 0x33333332, -0x5, x1, 848, x2)
+
+inst_241:
+// rs1_val==858993458 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x33333334, 0x33333332, 0x2, x1, 852, x2)
+
+inst_242:
+// rs1_val==858993458 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x33333336, 0x33333332, 0x4, x1, 856, x2)
+
+inst_243:
+// rs1_val==858993458 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x3333333b, 0x33333332, 0x9, x1, 860, x2)
+
+inst_244:
+// rs1_val==858993458 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x33333332, 0x33333332, 0x0, x1, 864, x2)
+
+inst_245:
+// rs1_val==858993458 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x3333333d, 0x33333332, 0xb, x1, 868, x2)
+
+inst_246:
+// rs1_val==858993458 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x33333339, 0x33333332, 0x7, x1, 872, x2)
+
+inst_247:
+// rs1_val==858993458 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x33333331, 0x33333332, -0x1, x1, 876, x2)
+
+inst_248:
+// rs1_val==858993458 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333332; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x3333332e, 0x33333332, -0x4, x1, 880, x2)
+
+inst_249:
+// rs1_val==1717986917 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x66666668, 0x66666665, 0x3, x1, 884, x2)
+
+inst_250:
+// rs1_val==1717986917 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x6666666a, 0x66666665, 0x5, x1, 888, x2)
+
+inst_251:
+// rs1_val==1717986917 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x6666666f, 0x66666665, 0xa, x1, 892, x2)
+
+inst_252:
+// rs1_val==1717986917 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x6666666b, 0x66666665, 0x6, x1, 896, x2)
+
+inst_253:
+// rs1_val==1717986917 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x66666663, 0x66666665, -0x2, x1, 900, x2)
+
+inst_254:
+// rs1_val==1717986917 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x66666660, 0x66666665, -0x5, x1, 904, x2)
+
+inst_255:
+// rs1_val==1717986917 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x66666667, 0x66666665, 0x2, x1, 908, x2)
+
+inst_256:
+// rs1_val==1717986917 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x66666669, 0x66666665, 0x4, x1, 912, x2)
+
+inst_257:
+// rs1_val==1717986917 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x6666666e, 0x66666665, 0x9, x1, 916, x2)
+
+inst_258:
+// rs1_val==1717986917 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x66666665, 0x66666665, 0x0, x1, 920, x2)
+
+inst_259:
+// rs1_val==1717986917 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x66666670, 0x66666665, 0xb, x1, 924, x2)
+
+inst_260:
+// rs1_val==1717986917 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x6666666c, 0x66666665, 0x7, x1, 928, x2)
+
+inst_261:
+// rs1_val==1717986917 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x66666664, 0x66666665, -0x1, x1, 932, x2)
+
+inst_262:
+// rs1_val==1717986917 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666665; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x66666661, 0x66666665, -0x4, x1, 936, x2)
+
+inst_263:
+// rs1_val==46339 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xb506, 0xb503, 0x3, x1, 940, x2)
+
+inst_264:
+// rs1_val==46339 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xb508, 0xb503, 0x5, x1, 944, x2)
+
+inst_265:
+// rs1_val==46339 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xb50d, 0xb503, 0xa, x1, 948, x2)
+
+inst_266:
+// rs1_val==46339 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xb509, 0xb503, 0x6, x1, 952, x2)
+
+inst_267:
+// rs1_val==46339 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xb501, 0xb503, -0x2, x1, 956, x2)
+
+inst_268:
+// rs1_val==46339 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xb4fe, 0xb503, -0x5, x1, 960, x2)
+
+inst_269:
+// rs1_val==46339 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xb505, 0xb503, 0x2, x1, 964, x2)
+
+inst_270:
+// rs1_val==46339 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xb507, 0xb503, 0x4, x1, 968, x2)
+
+inst_271:
+// rs1_val==46339 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xb50c, 0xb503, 0x9, x1, 972, x2)
+
+inst_272:
+// rs1_val==46339 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xb503, 0xb503, 0x0, x1, 976, x2)
+
+inst_273:
+// rs1_val==46339 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xb50e, 0xb503, 0xb, x1, 980, x2)
+
+inst_274:
+// rs1_val==46339 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xb50a, 0xb503, 0x7, x1, 984, x2)
+
+inst_275:
+// rs1_val==46339 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xb502, 0xb503, -0x1, x1, 988, x2)
+
+inst_276:
+// rs1_val==46339 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb503; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xb4ff, 0xb503, -0x4, x1, 992, x2)
+
+inst_277:
+// rs1_val==1431655766 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x55555559, 0x55555556, 0x3, x1, 996, x2)
+
+inst_278:
+// rs1_val==1431655766 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x5555555b, 0x55555556, 0x5, x1, 1000, x2)
+
+inst_279:
+// rs1_val==1431655766 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x55555560, 0x55555556, 0xa, x1, 1004, x2)
+
+inst_280:
+// rs1_val==1431655766 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x5555555c, 0x55555556, 0x6, x1, 1008, x2)
+
+inst_281:
+// rs1_val==1431655766 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x55555554, 0x55555556, -0x2, x1, 1012, x2)
+
+inst_282:
+// rs1_val==1431655766 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x55555551, 0x55555556, -0x5, x1, 1016, x2)
+
+inst_283:
+// rs1_val==1431655766 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x55555558, 0x55555556, 0x2, x1, 1020, x2)
+
+inst_284:
+// rs1_val==1431655766 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x5555555a, 0x55555556, 0x4, x1, 1024, x2)
+
+inst_285:
+// rs1_val==1431655766 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x5555555f, 0x55555556, 0x9, x1, 1028, x2)
+
+inst_286:
+// rs1_val==1431655766 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x55555556, 0x55555556, 0x0, x1, 1032, x2)
+
+inst_287:
+// rs1_val==1431655766 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x55555561, 0x55555556, 0xb, x1, 1036, x2)
+
+inst_288:
+// rs1_val==1431655766 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x5555555d, 0x55555556, 0x7, x1, 1040, x2)
+
+inst_289:
+// rs1_val==1431655766 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x55555555, 0x55555556, -0x1, x1, 1044, x2)
+
+inst_290:
+// rs1_val==1431655766 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x55555556; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x55555552, 0x55555556, -0x4, x1, 1048, x2)
+
+inst_291:
+// rs1_val==-1431655765 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xaaaaaaae, -0x55555555, 0x3, x1, 1052, x2)
+
+inst_292:
+// rs1_val==-1431655765 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xaaaaaab0, -0x55555555, 0x5, x1, 1056, x2)
+
+inst_293:
+// rs1_val==-1431655765 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xaaaaaab5, -0x55555555, 0xa, x1, 1060, x2)
+
+inst_294:
+// rs1_val==-1431655765 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xaaaaaab1, -0x55555555, 0x6, x1, 1064, x2)
+
+inst_295:
+// rs1_val==-1431655765 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xaaaaaaa9, -0x55555555, -0x2, x1, 1068, x2)
+
+inst_296:
+// rs1_val==-1431655765 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xaaaaaaa6, -0x55555555, -0x5, x1, 1072, x2)
+
+inst_297:
+// rs1_val==-1431655765 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xaaaaaaad, -0x55555555, 0x2, x1, 1076, x2)
+
+inst_298:
+// rs1_val==-1431655765 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaf, -0x55555555, 0x4, x1, 1080, x2)
+
+inst_299:
+// rs1_val==-1431655765 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xaaaaaab4, -0x55555555, 0x9, x1, 1084, x2)
+
+inst_300:
+// rs1_val==-1431655765 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xaaaaaaab, -0x55555555, 0x0, x1, 1088, x2)
+
+inst_301:
+// rs1_val==-1431655765 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xaaaaaab6, -0x55555555, 0xb, x1, 1092, x2)
+
+inst_302:
+// rs1_val==-1431655765 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xaaaaaab2, -0x55555555, 0x7, x1, 1096, x2)
+
+inst_303:
+// rs1_val==-1431655765 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaa, -0x55555555, -0x1, x1, 1100, x2)
+
+inst_304:
+// rs1_val==-1431655765 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x55555555; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xaaaaaaa7, -0x55555555, -0x4, x1, 1104, x2)
+
+inst_305:
+// rs1_val==6 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x9, 0x6, 0x3, x1, 1108, x2)
+
+inst_306:
+// rs1_val==6 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xb, 0x6, 0x5, x1, 1112, x2)
+
+inst_307:
+// rs1_val==6 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x10, 0x6, 0xa, x1, 1116, x2)
+
+inst_308:
+// rs1_val==6 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xc, 0x6, 0x6, x1, 1120, x2)
+
+inst_309:
+// rs1_val==6 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x4, 0x6, -0x2, x1, 1124, x2)
+
+inst_310:
+// rs1_val==6 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x1, 0x6, -0x5, x1, 1128, x2)
+
+inst_311:
+// rs1_val==6 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x8, 0x6, 0x2, x1, 1132, x2)
+
+inst_312:
+// rs1_val==-46339 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xffff4afc, -0xb503, -0x1, x1, 1136, x2)
+
+inst_313:
+// rs1_val==-46339 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xffff4af9, -0xb503, -0x4, x1, 1140, x2)
+
+inst_314:
+// rs1_val==46341 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xb508, 0xb505, 0x3, x1, 1144, x2)
+
+inst_315:
+// rs1_val==46341 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xb50a, 0xb505, 0x5, x1, 1148, x2)
+
+inst_316:
+// rs1_val==46341 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xb50f, 0xb505, 0xa, x1, 1152, x2)
+
+inst_317:
+// rs1_val==46341 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xb50b, 0xb505, 0x6, x1, 1156, x2)
+
+inst_318:
+// rs1_val==46341 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xb503, 0xb505, -0x2, x1, 1160, x2)
+
+inst_319:
+// rs1_val==46341 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xb500, 0xb505, -0x5, x1, 1164, x2)
+
+inst_320:
+// rs1_val==46341 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xb507, 0xb505, 0x2, x1, 1168, x2)
+
+inst_321:
+// rs1_val==46341 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xb509, 0xb505, 0x4, x1, 1172, x2)
+
+inst_322:
+// rs1_val==46341 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xb50e, 0xb505, 0x9, x1, 1176, x2)
+
+inst_323:
+// rs1_val==46341 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xb505, 0xb505, 0x0, x1, 1180, x2)
+
+inst_324:
+// rs1_val==46341 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xb510, 0xb505, 0xb, x1, 1184, x2)
+
+inst_325:
+// rs1_val==46341 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xb50c, 0xb505, 0x7, x1, 1188, x2)
+
+inst_326:
+// rs1_val==46341 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xb504, 0xb505, -0x1, x1, 1192, x2)
+
+inst_327:
+// rs1_val==46341 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb505; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xb501, 0xb505, -0x4, x1, 1196, x2)
+
+inst_328:
+// rs1_val==6 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xa, 0x6, 0x4, x1, 1200, x2)
+
+inst_329:
+// rs1_val==6 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xf, 0x6, 0x9, x1, 1204, x2)
+
+inst_330:
+// rs1_val==6 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x6, 0x6, 0x0, x1, 1208, x2)
+
+inst_331:
+// rs1_val==6 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x11, 0x6, 0xb, x1, 1212, x2)
+
+inst_332:
+// rs1_val==6 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xd, 0x6, 0x7, x1, 1216, x2)
+
+inst_333:
+// rs1_val==6 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x5, 0x6, -0x1, x1, 1220, x2)
+
+inst_334:
+// rs1_val==6 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x2, 0x6, -0x4, x1, 1224, x2)
+
+inst_335:
+// rs1_val==858993460 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x33333337, 0x33333334, 0x3, x1, 1228, x2)
+
+inst_336:
+// rs1_val==858993460 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x33333339, 0x33333334, 0x5, x1, 1232, x2)
+
+inst_337:
+// rs1_val==858993460 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x3333333e, 0x33333334, 0xa, x1, 1236, x2)
+
+inst_338:
+// rs1_val==858993460 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x3333333a, 0x33333334, 0x6, x1, 1240, x2)
+
+inst_339:
+// rs1_val==858993460 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x33333332, 0x33333334, -0x2, x1, 1244, x2)
+
+inst_340:
+// rs1_val==858993460 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x3333332f, 0x33333334, -0x5, x1, 1248, x2)
+
+inst_341:
+// rs1_val==858993460 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x33333336, 0x33333334, 0x2, x1, 1252, x2)
+
+inst_342:
+// rs1_val==858993460 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x33333338, 0x33333334, 0x4, x1, 1256, x2)
+
+inst_343:
+// rs1_val==858993460 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x3333333d, 0x33333334, 0x9, x1, 1260, x2)
+
+inst_344:
+// rs1_val==858993460 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x33333334, 0x33333334, 0x0, x1, 1264, x2)
+
+inst_345:
+// rs1_val==858993460 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x3333333f, 0x33333334, 0xb, x1, 1268, x2)
+
+inst_346:
+// rs1_val==858993460 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x3333333b, 0x33333334, 0x7, x1, 1272, x2)
+
+inst_347:
+// rs1_val==858993460 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x33333333, 0x33333334, -0x1, x1, 1276, x2)
+
+inst_348:
+// rs1_val==858993460 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x33333334; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x33333330, 0x33333334, -0x4, x1, 1280, x2)
+
+inst_349:
+// rs1_val==1717986919 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x6666666a, 0x66666667, 0x3, x1, 1284, x2)
+
+inst_350:
+// rs1_val==1717986919 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x6666666c, 0x66666667, 0x5, x1, 1288, x2)
+
+inst_351:
+// rs1_val==1717986919 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x66666671, 0x66666667, 0xa, x1, 1292, x2)
+
+inst_352:
+// rs1_val==1717986919 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x6666666d, 0x66666667, 0x6, x1, 1296, x2)
+
+inst_353:
+// rs1_val==1717986919 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x66666665, 0x66666667, -0x2, x1, 1300, x2)
+
+inst_354:
+// rs1_val==1717986919 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x66666662, 0x66666667, -0x5, x1, 1304, x2)
+
+inst_355:
+// rs1_val==1717986919 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x66666669, 0x66666667, 0x2, x1, 1308, x2)
+
+inst_356:
+// rs1_val==1717986919 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x6666666b, 0x66666667, 0x4, x1, 1312, x2)
+
+inst_357:
+// rs1_val==1717986919 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x66666670, 0x66666667, 0x9, x1, 1316, x2)
+
+inst_358:
+// rs1_val==1717986919 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x66666667, 0x66666667, 0x0, x1, 1320, x2)
+
+inst_359:
+// rs1_val==1717986919 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x66666672, 0x66666667, 0xb, x1, 1324, x2)
+
+inst_360:
+// rs1_val==1717986919 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x6666666e, 0x66666667, 0x7, x1, 1328, x2)
+
+inst_361:
+// rs1_val==1717986919 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x66666666, 0x66666667, -0x1, x1, 1332, x2)
+
+inst_362:
+// rs1_val==1717986919 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x66666667; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x66666663, 0x66666667, -0x4, x1, 1336, x2)
+
+inst_363:
+// rs1_val==-46339 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xffff4b00, -0xb503, 0x3, x1, 1340, x2)
+
+inst_364:
+// rs1_val==-46339 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xffff4b02, -0xb503, 0x5, x1, 1344, x2)
+
+inst_365:
+// rs1_val==-46339 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xffff4b07, -0xb503, 0xa, x1, 1348, x2)
+
+inst_366:
+// rs1_val==-46339 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xffff4b03, -0xb503, 0x6, x1, 1352, x2)
+
+inst_367:
+// rs1_val==-46339 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xffff4afb, -0xb503, -0x2, x1, 1356, x2)
+
+inst_368:
+// rs1_val==-46339 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xffff4af8, -0xb503, -0x5, x1, 1360, x2)
+
+inst_369:
+// rs1_val==-46339 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xffff4aff, -0xb503, 0x2, x1, 1364, x2)
+
+inst_370:
+// rs1_val==-46339 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xffff4b01, -0xb503, 0x4, x1, 1368, x2)
+
+inst_371:
+// rs1_val==-46339 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xffff4b06, -0xb503, 0x9, x1, 1372, x2)
+
+inst_372:
+// rs1_val==-46339 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xffff4afd, -0xb503, 0x0, x1, 1376, x2)
+
+inst_373:
+// rs1_val==-46339 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xffff4b08, -0xb503, 0xb, x1, 1380, x2)
+
+inst_374:
+// rs1_val==-46339 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb503; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xffff4b04, -0xb503, 0x7, x1, 1384, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x11_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x11_1:
+ .fill 28*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 347*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/caddi16sp-01.S b/riscof/suite/rv32i_m/C/caddi16sp-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..373c0992bd36fdd0d984358612287c1c38186a18
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/caddi16sp-01.S
@@ -0,0 +1,414 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.addi16sp instruction of the RISC-V C extension for the caddi16sp covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",caddi16sp)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rd==x2, rs1_val == imm_val, rs1_val == 32, rs1_val > 0 and imm_val > 0, imm_val == 32
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x20; immval:0x20
+TEST_CI_OP( c.addi16sp, x2, 0x40, 0x20, 0x20, x1, 0, x3)
+
+inst_1:
+// rs1_val != imm_val, rs1_val > 0 and imm_val < 0, rs1_val == 4
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x4; immval:-0x60
+TEST_CI_OP( c.addi16sp, x2, 0xffffffa4, 0x4, -0x60, x1, 4, x3)
+
+inst_2:
+// rs1_val < 0 and imm_val > 0, rs1_val == -5
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x5; immval:0x30
+TEST_CI_OP( c.addi16sp, x2, 0x2b, -0x5, 0x30, x1, 8, x3)
+
+inst_3:
+// rs1_val < 0 and imm_val < 0, rs1_val == -536870913
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x20000001; immval:-0x60
+TEST_CI_OP( c.addi16sp, x2, 0xdfffff9f, -0x20000001, -0x60, x1, 12, x3)
+
+inst_4:
+// rs1_val == (-2**(xlen-1)), rs1_val == -2147483648
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x80000000; immval:-0x10
+TEST_CI_OP( c.addi16sp, x2, 0x7ffffff0, -0x80000000, -0x10, x1, 16, x3)
+
+inst_5:
+// rs1_val == 0,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x0; immval:0xf0
+TEST_CI_OP( c.addi16sp, x2, 0xf0, 0x0, 0xf0, x1, 20, x3)
+
+inst_6:
+// rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x7fffffff; immval:0x30
+TEST_CI_OP( c.addi16sp, x2, 0x8000002f, 0x7fffffff, 0x30, x1, 24, x3)
+
+inst_7:
+// rs1_val == 1,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x1; immval:0x90
+TEST_CI_OP( c.addi16sp, x2, 0x91, 0x1, 0x90, x1, 28, x3)
+
+inst_8:
+// imm_val == -512, rs1_val == 8
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x8; immval:-0x200
+TEST_CI_OP( c.addi16sp, x2, 0xfffffe08, 0x8, -0x200, x1, 32, x3)
+
+inst_9:
+// imm_val == 496, rs1_val == 2097152
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x200000; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0x2001f0, 0x200000, 0x1f0, x1, 36, x3)
+
+inst_10:
+// rs1_val == 2,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x2; immval:-0x10
+TEST_CI_OP( c.addi16sp, x2, 0xfffffff2, 0x2, -0x10, x1, 40, x3)
+
+inst_11:
+// rs1_val == 16,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x10; immval:0x50
+TEST_CI_OP( c.addi16sp, x2, 0x60, 0x10, 0x50, x1, 44, x3)
+
+inst_12:
+// rs1_val == 64,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x40; immval:0x20
+TEST_CI_OP( c.addi16sp, x2, 0x60, 0x40, 0x20, x1, 48, x3)
+
+inst_13:
+// rs1_val == 128, imm_val == -32
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x80; immval:-0x20
+TEST_CI_OP( c.addi16sp, x2, 0x60, 0x80, -0x20, x1, 52, x3)
+
+inst_14:
+// rs1_val == 256,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x100; immval:-0x70
+TEST_CI_OP( c.addi16sp, x2, 0x90, 0x100, -0x70, x1, 56, x3)
+
+inst_15:
+// rs1_val == 512,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x200; immval:0x50
+TEST_CI_OP( c.addi16sp, x2, 0x250, 0x200, 0x50, x1, 60, x3)
+
+inst_16:
+// rs1_val == 1024, imm_val == -80
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x400; immval:-0x50
+TEST_CI_OP( c.addi16sp, x2, 0x3b0, 0x400, -0x50, x1, 64, x3)
+
+inst_17:
+// rs1_val == 2048,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x800; immval:0x20
+TEST_CI_OP( c.addi16sp, x2, 0x820, 0x800, 0x20, x1, 68, x3)
+
+inst_18:
+// rs1_val == 4096, imm_val == 128
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x1000; immval:0x80
+TEST_CI_OP( c.addi16sp, x2, 0x1080, 0x1000, 0x80, x1, 72, x3)
+
+inst_19:
+// rs1_val == 8192,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x2000; immval:-0x10
+TEST_CI_OP( c.addi16sp, x2, 0x1ff0, 0x2000, -0x10, x1, 76, x3)
+
+inst_20:
+// rs1_val == 16384, imm_val == -272
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x4000; immval:-0x110
+TEST_CI_OP( c.addi16sp, x2, 0x3ef0, 0x4000, -0x110, x1, 80, x3)
+
+inst_21:
+// rs1_val == 32768,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x8000; immval:-0x10
+TEST_CI_OP( c.addi16sp, x2, 0x7ff0, 0x8000, -0x10, x1, 84, x3)
+
+inst_22:
+// rs1_val == 65536, imm_val == 336
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x10000; immval:0x150
+TEST_CI_OP( c.addi16sp, x2, 0x10150, 0x10000, 0x150, x1, 88, x3)
+
+inst_23:
+// rs1_val == 131072,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x20000; immval:-0x200
+TEST_CI_OP( c.addi16sp, x2, 0x1fe00, 0x20000, -0x200, x1, 92, x3)
+
+inst_24:
+// rs1_val == 262144,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x40000; immval:-0x20
+TEST_CI_OP( c.addi16sp, x2, 0x3ffe0, 0x40000, -0x20, x1, 96, x3)
+
+inst_25:
+// rs1_val == 524288, imm_val == 256
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x80000; immval:0x100
+TEST_CI_OP( c.addi16sp, x2, 0x80100, 0x80000, 0x100, x1, 100, x3)
+
+inst_26:
+// rs1_val == 1048576, imm_val == -144
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x100000; immval:-0x90
+TEST_CI_OP( c.addi16sp, x2, 0xfff70, 0x100000, -0x90, x1, 104, x3)
+
+inst_27:
+// rs1_val == 4194304,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x400000; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0x4001f0, 0x400000, 0x1f0, x1, 108, x3)
+
+inst_28:
+// rs1_val == 8388608,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x800000; immval:0x80
+TEST_CI_OP( c.addi16sp, x2, 0x800080, 0x800000, 0x80, x1, 112, x3)
+
+inst_29:
+// rs1_val == 16777216,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x1000000; immval:-0x110
+TEST_CI_OP( c.addi16sp, x2, 0xfffef0, 0x1000000, -0x110, x1, 116, x3)
+
+inst_30:
+// rs1_val == 33554432,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x2000000; immval:-0x90
+TEST_CI_OP( c.addi16sp, x2, 0x1ffff70, 0x2000000, -0x90, x1, 120, x3)
+
+inst_31:
+// rs1_val == 67108864,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x4000000; immval:0x20
+TEST_CI_OP( c.addi16sp, x2, 0x4000020, 0x4000000, 0x20, x1, 124, x3)
+
+inst_32:
+// rs1_val == 134217728,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x8000000; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0x80001f0, 0x8000000, 0x1f0, x1, 128, x3)
+
+inst_33:
+// rs1_val == 268435456,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x10000000; immval:0x50
+TEST_CI_OP( c.addi16sp, x2, 0x10000050, 0x10000000, 0x50, x1, 132, x3)
+
+inst_34:
+// rs1_val == 536870912,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x20000000; immval:0xf0
+TEST_CI_OP( c.addi16sp, x2, 0x200000f0, 0x20000000, 0xf0, x1, 136, x3)
+
+inst_35:
+// rs1_val == 1073741824,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x40000000; immval:0x90
+TEST_CI_OP( c.addi16sp, x2, 0x40000090, 0x40000000, 0x90, x1, 140, x3)
+
+inst_36:
+// rs1_val == -2,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x2; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0x1ee, -0x2, 0x1f0, x1, 144, x3)
+
+inst_37:
+// rs1_val == -3, imm_val == 64
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x3; immval:0x40
+TEST_CI_OP( c.addi16sp, x2, 0x3d, -0x3, 0x40, x1, 148, x3)
+
+inst_38:
+// rs1_val == -9,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x9; immval:0x60
+TEST_CI_OP( c.addi16sp, x2, 0x57, -0x9, 0x60, x1, 152, x3)
+
+inst_39:
+// rs1_val == -2097153,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x200001; immval:-0xa0
+TEST_CI_OP( c.addi16sp, x2, 0xffdfff5f, -0x200001, -0xa0, x1, 156, x3)
+
+inst_40:
+// rs1_val == -4194305,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x400001; immval:0x70
+TEST_CI_OP( c.addi16sp, x2, 0xffc0006f, -0x400001, 0x70, x1, 160, x3)
+
+inst_41:
+// rs1_val == -8388609,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x800001; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0xff8001ef, -0x800001, 0x1f0, x1, 164, x3)
+
+inst_42:
+// rs1_val == -16777217,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x1000001; immval:0x90
+TEST_CI_OP( c.addi16sp, x2, 0xff00008f, -0x1000001, 0x90, x1, 168, x3)
+
+inst_43:
+// rs1_val == -33554433,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x2000001; immval:0x100
+TEST_CI_OP( c.addi16sp, x2, 0xfe0000ff, -0x2000001, 0x100, x1, 172, x3)
+
+inst_44:
+// rs1_val == -67108865,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x4000001; immval:-0x100
+TEST_CI_OP( c.addi16sp, x2, 0xfbfffeff, -0x4000001, -0x100, x1, 176, x3)
+
+inst_45:
+// rs1_val == -134217729,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x8000001; immval:-0x200
+TEST_CI_OP( c.addi16sp, x2, 0xf7fffdff, -0x8000001, -0x200, x1, 180, x3)
+
+inst_46:
+// rs1_val == -268435457,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x10000001; immval:-0x100
+TEST_CI_OP( c.addi16sp, x2, 0xeffffeff, -0x10000001, -0x100, x1, 184, x3)
+
+inst_47:
+// rs1_val == -1073741825,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x40000001; immval:0x90
+TEST_CI_OP( c.addi16sp, x2, 0xc000008f, -0x40000001, 0x90, x1, 188, x3)
+
+inst_48:
+// rs1_val == 1431655765,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x55555555; immval:-0xa0
+TEST_CI_OP( c.addi16sp, x2, 0x555554b5, 0x55555555, -0xa0, x1, 192, x3)
+
+inst_49:
+// rs1_val == -1431655766,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x55555556; immval:0x70
+TEST_CI_OP( c.addi16sp, x2, 0xaaaaab1a, -0x55555556, 0x70, x1, 196, x3)
+
+inst_50:
+// imm_val == 16, rs1_val == -32769
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x8001; immval:0x10
+TEST_CI_OP( c.addi16sp, x2, 0xffff800f, -0x8001, 0x10, x1, 200, x3)
+
+inst_51:
+// imm_val == -48,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x100; immval:-0x30
+TEST_CI_OP( c.addi16sp, x2, 0xd0, 0x100, -0x30, x1, 204, x3)
+
+inst_52:
+// imm_val == -352,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x8000000; immval:-0x160
+TEST_CI_OP( c.addi16sp, x2, 0x7fffea0, 0x8000000, -0x160, x1, 208, x3)
+
+inst_53:
+// rs1_val == -17,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x11; immval:-0x110
+TEST_CI_OP( c.addi16sp, x2, 0xfffffedf, -0x11, -0x110, x1, 212, x3)
+
+inst_54:
+// rs1_val == -33,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x21; immval:0x80
+TEST_CI_OP( c.addi16sp, x2, 0x5f, -0x21, 0x80, x1, 216, x3)
+
+inst_55:
+// rs1_val == -65,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x41; immval:0x40
+TEST_CI_OP( c.addi16sp, x2, 0xffffffff, -0x41, 0x40, x1, 220, x3)
+
+inst_56:
+// rs1_val == -129,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x81; immval:0x40
+TEST_CI_OP( c.addi16sp, x2, 0xffffffbf, -0x81, 0x40, x1, 224, x3)
+
+inst_57:
+// rs1_val == -257,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x101; immval:-0x110
+TEST_CI_OP( c.addi16sp, x2, 0xfffffdef, -0x101, -0x110, x1, 228, x3)
+
+inst_58:
+// rs1_val == -513,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x201; immval:0x100
+TEST_CI_OP( c.addi16sp, x2, 0xfffffeff, -0x201, 0x100, x1, 232, x3)
+
+inst_59:
+// rs1_val == -1025,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x401; immval:-0x90
+TEST_CI_OP( c.addi16sp, x2, 0xfffffb6f, -0x401, -0x90, x1, 236, x3)
+
+inst_60:
+// rs1_val == -2049,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x801; immval:0x90
+TEST_CI_OP( c.addi16sp, x2, 0xfffff88f, -0x801, 0x90, x1, 240, x3)
+
+inst_61:
+// rs1_val == -4097,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x1001; immval:-0x50
+TEST_CI_OP( c.addi16sp, x2, 0xffffefaf, -0x1001, -0x50, x1, 244, x3)
+
+inst_62:
+// rs1_val == -8193,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x2001; immval:0x50
+TEST_CI_OP( c.addi16sp, x2, 0xffffe04f, -0x2001, 0x50, x1, 248, x3)
+
+inst_63:
+// rs1_val == -16385,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x4001; immval:-0xa0
+TEST_CI_OP( c.addi16sp, x2, 0xffffbf5f, -0x4001, -0xa0, x1, 252, x3)
+
+inst_64:
+// rs1_val == -65537,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x10001; immval:0x150
+TEST_CI_OP( c.addi16sp, x2, 0xffff014f, -0x10001, 0x150, x1, 256, x3)
+
+inst_65:
+// rs1_val == -131073,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x20001; immval:-0x90
+TEST_CI_OP( c.addi16sp, x2, 0xfffdff6f, -0x20001, -0x90, x1, 260, x3)
+
+inst_66:
+// rs1_val == -262145,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x40001; immval:0x20
+TEST_CI_OP( c.addi16sp, x2, 0xfffc001f, -0x40001, 0x20, x1, 264, x3)
+
+inst_67:
+// rs1_val == -524289,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x80001; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0xfff801ef, -0x80001, 0x1f0, x1, 268, x3)
+
+inst_68:
+// rs1_val == -1048577,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x100001; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0xfff001ef, -0x100001, 0x1f0, x1, 272, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 69*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/caddi4spn-01.S b/riscof/suite/rv32i_m/C/caddi4spn-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..9d12e22377deafeab64677fa0c9d6da8d3a0ac69
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/caddi4spn-01.S
@@ -0,0 +1,169 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.addi4spn instruction of the RISC-V C extension for the caddi4spn covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",caddi4spn)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rd==x14, imm_val > 0,
+// opcode:c.addi4spn; dest:x14; immval:0x1c
+TEST_CADDI4SPN_OP( c.addi4spn, x14, 0x1c, 0x1c, x1, 0, x2)
+
+inst_1:
+// rd==x8, imm_val == 1020,
+// opcode:c.addi4spn; dest:x8; immval:0x3fc
+TEST_CADDI4SPN_OP( c.addi4spn, x8, 0x3fc, 0x3fc, x1, 4, x2)
+
+inst_2:
+// rd==x9, imm_val == 4,
+// opcode:c.addi4spn; dest:x9; immval:0x4
+TEST_CADDI4SPN_OP( c.addi4spn, x9, 0x4, 0x4, x1, 8, x2)
+
+inst_3:
+// rd==x15, imm_val == 8,
+// opcode:c.addi4spn; dest:x15; immval:0x8
+TEST_CADDI4SPN_OP( c.addi4spn, x15, 0x8, 0x8, x1, 12, x2)
+
+inst_4:
+// rd==x10, imm_val == 16,
+// opcode:c.addi4spn; dest:x10; immval:0x10
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x10, 0x10, x1, 16, x2)
+
+inst_5:
+// rd==x12, imm_val == 32,
+// opcode:c.addi4spn; dest:x12; immval:0x20
+TEST_CADDI4SPN_OP( c.addi4spn, x12, 0x20, 0x20, x1, 20, x2)
+
+inst_6:
+// rd==x11, imm_val == 64,
+// opcode:c.addi4spn; dest:x11; immval:0x40
+TEST_CADDI4SPN_OP( c.addi4spn, x11, 0x40, 0x40, x1, 24, x2)
+
+inst_7:
+// rd==x13, imm_val == 128,
+// opcode:c.addi4spn; dest:x13; immval:0x80
+TEST_CADDI4SPN_OP( c.addi4spn, x13, 0x80, 0x80, x1, 28, x2)
+
+inst_8:
+// imm_val == 256,
+// opcode:c.addi4spn; dest:x10; immval:0x100
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x100, 0x100, x1, 32, x2)
+
+inst_9:
+// imm_val == 512,
+// opcode:c.addi4spn; dest:x10; immval:0x200
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x200, 0x200, x1, 36, x2)
+
+inst_10:
+// imm_val == 1016,
+// opcode:c.addi4spn; dest:x10; immval:0x3f8
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x3f8, 0x3f8, x1, 40, x2)
+
+inst_11:
+// imm_val == 1012,
+// opcode:c.addi4spn; dest:x10; immval:0x3f4
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x3f4, 0x3f4, x1, 44, x2)
+
+inst_12:
+// imm_val == 1004,
+// opcode:c.addi4spn; dest:x10; immval:0x3ec
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x3ec, 0x3ec, x1, 48, x2)
+
+inst_13:
+// imm_val == 764,
+// opcode:c.addi4spn; dest:x10; immval:0x2fc
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x2fc, 0x2fc, x1, 52, x2)
+
+inst_14:
+// imm_val == 508,
+// opcode:c.addi4spn; dest:x10; immval:0x1fc
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x1fc, 0x1fc, x1, 56, x2)
+
+inst_15:
+// imm_val == 340,
+// opcode:c.addi4spn; dest:x10; immval:0x154
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x154, 0x154, x1, 60, x2)
+
+inst_16:
+// imm_val == 680,
+// opcode:c.addi4spn; dest:x10; immval:0x2a8
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x2a8, 0x2a8, x1, 64, x2)
+
+inst_17:
+// imm_val == 988,
+// opcode:c.addi4spn; dest:x10; immval:0x3dc
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x3dc, 0x3dc, x1, 68, x2)
+
+inst_18:
+// imm_val == 956,
+// opcode:c.addi4spn; dest:x10; immval:0x3bc
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x3bc, 0x3bc, x1, 72, x2)
+
+inst_19:
+// imm_val == 892,
+// opcode:c.addi4spn; dest:x10; immval:0x37c
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x37c, 0x37c, x1, 76, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cand-01.S b/riscof/suite/rv32i_m/C/cand-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..74496887653eb5e6cf6619f0fec82f9fb7d4c8bc
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cand-01.S
@@ -0,0 +1,3004 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.and instruction of the RISC-V C extension for the cand covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cand)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x8, rs2==x12, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648, rs2_val < 0, rs1_val == 0
+// opcode: c.and; op1:x8; op2:x12; op1val:0x0; op2val:-0x80000000
+TEST_CR_OP( c.and, x8, x12, 0x0, 0x0, -0x80000000, x1, 0, x2)
+
+inst_1:
+// rs1 == rs2, rs1==x11, rs2==x11, rs2_val == 0, rs1_val == -262145
+// opcode: c.and; op1:x11; op2:x11; op1val:-0x40001; op2val:-0x40001
+TEST_CR_OP( c.and, x11, x11, 0xfffbffff, -0x40001, -0x40001, x1, 4, x2)
+
+inst_2:
+// rs1==x13, rs2==x9, rs2_val == (2**(xlen-1)-1), rs2_val > 0, rs2_val == 2147483647, rs1_val == -33
+// opcode: c.and; op1:x13; op2:x9; op1val:-0x21; op2val:0x7fffffff
+TEST_CR_OP( c.and, x13, x9, 0x7fffffdf, -0x21, 0x7fffffff, x1, 8, x2)
+
+inst_3:
+// rs1==x9, rs2==x8, rs2_val == 1, rs1_val == -5
+// opcode: c.and; op1:x9; op2:x8; op1val:-0x5; op2val:0x1
+TEST_CR_OP( c.and, x9, x8, 0x1, -0x5, 0x1, x1, 12, x2)
+
+inst_4:
+// rs1==x14, rs2==x13, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648
+// opcode: c.and; op1:x14; op2:x13; op1val:-0x80000000; op2val:0x7fffffff
+TEST_CR_OP( c.and, x14, x13, 0x0, -0x80000000, 0x7fffffff, x1, 16, x2)
+
+inst_5:
+// rs1==x10, rs2==x14, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647, rs2_val == 268435456
+// opcode: c.and; op1:x10; op2:x14; op1val:0x7fffffff; op2val:0x10000000
+TEST_CR_OP( c.and, x10, x14, 0x10000000, 0x7fffffff, 0x10000000, x1, 20, x2)
+
+inst_6:
+// rs1==x12, rs2==x15, rs1_val == 1, rs2_val == -268435457
+// opcode: c.and; op1:x12; op2:x15; op1val:0x1; op2val:-0x10000001
+TEST_CR_OP( c.and, x12, x15, 0x1, 0x1, -0x10000001, x1, 24, x2)
+
+inst_7:
+// rs1==x15, rs2==x10, rs2_val == 2, rs1_val == -536870913
+// opcode: c.and; op1:x15; op2:x10; op1val:-0x20000001; op2val:0x2
+TEST_CR_OP( c.and, x15, x10, 0x2, -0x20000001, 0x2, x1, 28, x2)
+
+inst_8:
+// rs2_val == 4, rs1_val == 2, rs1_val==2 and rs2_val==4
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x4, x1, 32, x2)
+
+inst_9:
+// rs2_val == 8,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x8
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x55555554, 0x8, x1, 36, x2)
+
+inst_10:
+// rs2_val == 16, rs1_val == -129
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x81; op2val:0x10
+TEST_CR_OP( c.and, x10, x11, 0x10, -0x81, 0x10, x1, 40, x2)
+
+inst_11:
+// rs2_val == 32,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x20
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x20, x1, 44, x2)
+
+inst_12:
+// rs2_val == 64,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5; op2val:0x40
+TEST_CR_OP( c.and, x10, x11, 0x40, -0x5, 0x40, x1, 48, x2)
+
+inst_13:
+// rs2_val == 128,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x80
+TEST_CR_OP( c.and, x10, x11, 0x80, -0xb503, 0x80, x1, 52, x2)
+
+inst_14:
+// rs2_val == 256, rs1_val == 536870912
+// opcode: c.and; op1:x10; op2:x11; op1val:0x20000000; op2val:0x100
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x20000000, 0x100, x1, 56, x2)
+
+inst_15:
+// rs2_val == 512,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x200
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x200, x1, 60, x2)
+
+inst_16:
+// rs2_val == 1024, rs1_val == 1024
+// opcode: c.and; op1:x10; op2:x11; op1val:0x400; op2val:0x400
+TEST_CR_OP( c.and, x10, x11, 0x400, 0x400, 0x400, x1, 64, x2)
+
+inst_17:
+// rs2_val == 2048, rs1_val == -2
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x2; op2val:0x800
+TEST_CR_OP( c.and, x10, x11, 0x800, -0x2, 0x800, x1, 68, x2)
+
+inst_18:
+// rs2_val == 4096, rs1_val == 16384
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4000; op2val:0x1000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4000, 0x1000, x1, 72, x2)
+
+inst_19:
+// rs2_val == 8192,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x2000
+TEST_CR_OP( c.and, x10, x11, 0x2000, 0xb505, 0x2000, x1, 76, x2)
+
+inst_20:
+// rs2_val == 16384, rs1_val == -67108865
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x4000001; op2val:0x4000
+TEST_CR_OP( c.and, x10, x11, 0x4000, -0x4000001, 0x4000, x1, 80, x2)
+
+inst_21:
+// rs2_val == 32768, rs1_val == -4194305
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x400001; op2val:0x8000
+TEST_CR_OP( c.and, x10, x11, 0x8000, -0x400001, 0x8000, x1, 84, x2)
+
+inst_22:
+// rs2_val == 65536, rs1_val == 512
+// opcode: c.and; op1:x10; op2:x11; op1val:0x200; op2val:0x10000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x200, 0x10000, x1, 88, x2)
+
+inst_23:
+// rs2_val == 131072, rs1_val == -134217729
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x8000001; op2val:0x20000
+TEST_CR_OP( c.and, x10, x11, 0x20000, -0x8000001, 0x20000, x1, 92, x2)
+
+inst_24:
+// rs2_val == 262144,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x4; op2val:0x40000
+TEST_CR_OP( c.and, x10, x11, 0x40000, -0x4, 0x40000, x1, 96, x2)
+
+inst_25:
+// rs2_val == 524288,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x21; op2val:0x80000
+TEST_CR_OP( c.and, x10, x11, 0x80000, -0x21, 0x80000, x1, 100, x2)
+
+inst_26:
+// rs2_val == 1048576, rs1_val == 64
+// opcode: c.and; op1:x10; op2:x11; op1val:0x40; op2val:0x100000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x40, 0x100000, x1, 104, x2)
+
+inst_27:
+// rs2_val == 2097152,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x200000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb503, 0x200000, x1, 108, x2)
+
+inst_28:
+// rs2_val == 4194304,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x400000
+TEST_CR_OP( c.and, x10, x11, 0x400000, 0x66666666, 0x400000, x1, 112, x2)
+
+inst_29:
+// rs2_val == 8388608,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x800000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504, 0x800000, x1, 116, x2)
+
+inst_30:
+// rs2_val == 16777216,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x1000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5, 0x1000000, x1, 120, x2)
+
+inst_31:
+// rs2_val == 33554432,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4000; op2val:0x2000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4000, 0x2000000, x1, 124, x2)
+
+inst_32:
+// rs2_val == 67108864, rs1_val == -1073741825
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x40000001; op2val:0x4000000
+TEST_CR_OP( c.and, x10, x11, 0x4000000, -0x40000001, 0x4000000, x1, 128, x2)
+
+inst_33:
+// rs2_val == 134217728,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x8000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x8000000, x1, 132, x2)
+
+inst_34:
+// rs2_val == 536870912, rs1_val == 16
+// opcode: c.and; op1:x10; op2:x11; op1val:0x10; op2val:0x20000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x10, 0x20000000, x1, 136, x2)
+
+inst_35:
+// rs2_val == 1073741824, rs1_val == 4
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x40000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0x40000000, x1, 140, x2)
+
+inst_36:
+// rs2_val == -2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:-0x2
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6, -0x2, x1, 144, x2)
+
+inst_37:
+// rs2_val == -3,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x40001; op2val:-0x3
+TEST_CR_OP( c.and, x10, x11, 0xfffbfffd, -0x40001, -0x3, x1, 148, x2)
+
+inst_38:
+// rs2_val == -5,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x21; op2val:-0x5
+TEST_CR_OP( c.and, x10, x11, 0xffffffdb, -0x21, -0x5, x1, 152, x2)
+
+inst_39:
+// rs2_val == -9, rs1_val == 65536
+// opcode: c.and; op1:x10; op2:x11; op1val:0x10000; op2val:-0x9
+TEST_CR_OP( c.and, x10, x11, 0x10000, 0x10000, -0x9, x1, 156, x2)
+
+inst_40:
+// rs2_val == -17,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:-0x11
+TEST_CR_OP( c.and, x10, x11, 0x66666665, 0x66666665, -0x11, x1, 160, x2)
+
+inst_41:
+// rs2_val == -33, rs1_val == 524288
+// opcode: c.and; op1:x10; op2:x11; op1val:0x80000; op2val:-0x21
+TEST_CR_OP( c.and, x10, x11, 0x80000, 0x80000, -0x21, x1, 164, x2)
+
+inst_42:
+// rs2_val == -65,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:-0x41
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3, -0x41, x1, 168, x2)
+
+inst_43:
+// rs2_val == -129,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4000; op2val:-0x81
+TEST_CR_OP( c.and, x10, x11, 0x4000, 0x4000, -0x81, x1, 172, x2)
+
+inst_44:
+// rs2_val == -257,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x9; op2val:-0x101
+TEST_CR_OP( c.and, x10, x11, 0x9, 0x9, -0x101, x1, 176, x2)
+
+inst_45:
+// rs2_val == -513,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:-0x201
+TEST_CR_OP( c.and, x10, x11, 0xb504, 0xb504, -0x201, x1, 180, x2)
+
+inst_46:
+// rs2_val == -1025,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:-0x401
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, -0x401, x1, 184, x2)
+
+inst_47:
+// rs2_val == -2049, rs1_val == 134217728
+// opcode: c.and; op1:x10; op2:x11; op1val:0x8000000; op2val:-0x801
+TEST_CR_OP( c.and, x10, x11, 0x8000000, 0x8000000, -0x801, x1, 188, x2)
+
+inst_48:
+// rs2_val == -4097,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3fffffff; op2val:-0x1001
+TEST_CR_OP( c.and, x10, x11, 0x3fffefff, 0x3fffffff, -0x1001, x1, 192, x2)
+
+inst_49:
+// rs2_val == -8193,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x80000; op2val:-0x2001
+TEST_CR_OP( c.and, x10, x11, 0x80000, 0x80000, -0x2001, x1, 196, x2)
+
+inst_50:
+// rs2_val == -16385,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:-0x4001
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6, -0x4001, x1, 200, x2)
+
+inst_51:
+// rs2_val == -32769,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:-0x8001
+TEST_CR_OP( c.and, x10, x11, 0x55555554, 0x55555554, -0x8001, x1, 204, x2)
+
+inst_52:
+// rs2_val == -65537,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x7; op2val:-0x10001
+TEST_CR_OP( c.and, x10, x11, 0x7, 0x7, -0x10001, x1, 208, x2)
+
+inst_53:
+// rs2_val == -131073,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5; op2val:-0x20001
+TEST_CR_OP( c.and, x10, x11, 0xfffdfffb, -0x5, -0x20001, x1, 212, x2)
+
+inst_54:
+// rs2_val == -262145,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x7; op2val:-0x40001
+TEST_CR_OP( c.and, x10, x11, 0xfffbfff9, -0x7, -0x40001, x1, 216, x2)
+
+inst_55:
+// rs2_val == -524289, rs1_val == -9
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x9; op2val:-0x80001
+TEST_CR_OP( c.and, x10, x11, 0xfff7fff7, -0x9, -0x80001, x1, 220, x2)
+
+inst_56:
+// rs2_val == -1048577,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x10; op2val:-0x100001
+TEST_CR_OP( c.and, x10, x11, 0x10, 0x10, -0x100001, x1, 224, x2)
+
+inst_57:
+// rs2_val == -2097153,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x40; op2val:-0x200001
+TEST_CR_OP( c.and, x10, x11, 0x40, 0x40, -0x200001, x1, 228, x2)
+
+inst_58:
+// rs2_val == -4194305,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:-0x400001
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3, -0x400001, x1, 232, x2)
+
+inst_59:
+// rs2_val == -8388609, rs1_val == 128
+// opcode: c.and; op1:x10; op2:x11; op1val:0x80; op2val:-0x800001
+TEST_CR_OP( c.and, x10, x11, 0x80, 0x80, -0x800001, x1, 236, x2)
+
+inst_60:
+// rs2_val == -16777217, rs1_val == 256
+// opcode: c.and; op1:x10; op2:x11; op1val:0x100; op2val:-0x1000001
+TEST_CR_OP( c.and, x10, x11, 0x100, 0x100, -0x1000001, x1, 240, x2)
+
+inst_61:
+// rs2_val == -33554433,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:-0x2000001
+TEST_CR_OP( c.and, x10, x11, 0xfdff4afc, -0xb504, -0x2000001, x1, 244, x2)
+
+inst_62:
+// rs2_val == -67108865, rs1_val == -2097153
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x200001; op2val:-0x4000001
+TEST_CR_OP( c.and, x10, x11, 0xfbdfffff, -0x200001, -0x4000001, x1, 248, x2)
+
+inst_63:
+// rs2_val == -134217729,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:-0x8000001
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, -0x8000001, x1, 252, x2)
+
+inst_64:
+// rs2_val == -536870913,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x7; op2val:-0x20000001
+TEST_CR_OP( c.and, x10, x11, 0xdffffff9, -0x7, -0x20000001, x1, 256, x2)
+
+inst_65:
+// rs2_val == -1073741825,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:-0x40000001
+TEST_CR_OP( c.and, x10, x11, 0x33333333, 0x33333333, -0x40000001, x1, 260, x2)
+
+inst_66:
+// rs2_val == 1431655765, rs1_val == -4097
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x1001; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x55554555, -0x1001, 0x55555555, x1, 264, x2)
+
+inst_67:
+// rs2_val == -1431655766, rs1_val == 2097152
+// opcode: c.and; op1:x10; op2:x11; op1val:0x200000; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x200000, 0x200000, -0x55555556, x1, 268, x2)
+
+inst_68:
+// rs1_val == 8,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x8; op2val:-0x10000001
+TEST_CR_OP( c.and, x10, x11, 0x8, 0x8, -0x10000001, x1, 272, x2)
+
+inst_69:
+// rs1_val == 32,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x20; op2val:0x8000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x20, 0x8000000, x1, 276, x2)
+
+inst_70:
+// rs1_val == 2048,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x800; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x800, 0xb505, x1, 280, x2)
+
+inst_71:
+// rs1_val == 4096,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x1000; op2val:-0x401
+TEST_CR_OP( c.and, x10, x11, 0x1000, 0x1000, -0x401, x1, 284, x2)
+
+inst_72:
+// rs1_val == 8192,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2000; op2val:-0x8
+TEST_CR_OP( c.and, x10, x11, 0x2000, 0x2000, -0x8, x1, 288, x2)
+
+inst_73:
+// rs1_val == 32768,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x8000; op2val:-0x40000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x8000, -0x40000000, x1, 292, x2)
+
+inst_74:
+// rs1_val == 131072,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x20000; op2val:-0x6
+TEST_CR_OP( c.and, x10, x11, 0x20000, 0x20000, -0x6, x1, 296, x2)
+
+inst_75:
+// rs1_val == 262144,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x40000; op2val:0x10
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x40000, 0x10, x1, 300, x2)
+
+inst_76:
+// rs1_val == 1048576,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x100000; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x100000, 0x100000, 0x33333334, x1, 304, x2)
+
+inst_77:
+// rs1_val == 4194304,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x400000; op2val:-0x2
+TEST_CR_OP( c.and, x10, x11, 0x400000, 0x400000, -0x2, x1, 308, x2)
+
+inst_78:
+// rs1_val == 8388608,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x800000; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x800000, 0x5, x1, 312, x2)
+
+inst_79:
+// rs1_val == 16777216,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x1000000; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x1000000, 0x1000000, 0x55555555, x1, 316, x2)
+
+inst_80:
+// rs1_val == 33554432,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2000000; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x2000000, 0x2000000, 0x33333334, x1, 320, x2)
+
+inst_81:
+// rs1_val == 67108864,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4000000; op2val:0x7fffffff
+TEST_CR_OP( c.and, x10, x11, 0x4000000, 0x4000000, 0x7fffffff, x1, 324, x2)
+
+inst_82:
+// rs1_val == 268435456,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x10000000; op2val:-0x401
+TEST_CR_OP( c.and, x10, x11, 0x10000000, 0x10000000, -0x401, x1, 328, x2)
+
+inst_83:
+// rs1_val == 1073741824,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x40000000; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x40000000, 0x40000000, -0xb503, x1, 332, x2)
+
+inst_84:
+// rs1_val == -3,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x3; op2val:0x20000
+TEST_CR_OP( c.and, x10, x11, 0x20000, -0x3, 0x20000, x1, 336, x2)
+
+inst_85:
+// rs1_val == -17,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x11; op2val:-0x200001
+TEST_CR_OP( c.and, x10, x11, 0xffdfffef, -0x11, -0x200001, x1, 340, x2)
+
+inst_86:
+// rs1_val == -65,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x41; op2val:0x200000
+TEST_CR_OP( c.and, x10, x11, 0x200000, -0x41, 0x200000, x1, 344, x2)
+
+inst_87:
+// rs1_val == -257,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x101; op2val:0x100
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x101, 0x100, x1, 348, x2)
+
+inst_88:
+// rs1_val == -513,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x201; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x6, -0x201, 0x6, x1, 352, x2)
+
+inst_89:
+// rs1_val == -1025,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x401; op2val:-0x1000001
+TEST_CR_OP( c.and, x10, x11, 0xfefffbff, -0x401, -0x1000001, x1, 356, x2)
+
+inst_90:
+// rs1_val == -2049,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x801; op2val:0x2000000
+TEST_CR_OP( c.and, x10, x11, 0x2000000, -0x801, 0x2000000, x1, 360, x2)
+
+inst_91:
+// rs1_val == -8193,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x2001; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0xffff4afc, -0x2001, -0xb504, x1, 364, x2)
+
+inst_92:
+// rs1_val == -16385,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x4001; op2val:0x2000
+TEST_CR_OP( c.and, x10, x11, 0x2000, -0x4001, 0x2000, x1, 368, x2)
+
+inst_93:
+// rs1_val == -32769,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x8001; op2val:-0x40000001
+TEST_CR_OP( c.and, x10, x11, 0xbfff7fff, -0x8001, -0x40000001, x1, 372, x2)
+
+inst_94:
+// rs1_val == -65537,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x10001; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0xfffe4afc, -0x10001, -0xb504, x1, 376, x2)
+
+inst_95:
+// rs1_val == -131073,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x20001; op2val:0x100000
+TEST_CR_OP( c.and, x10, x11, 0x100000, -0x20001, 0x100000, x1, 380, x2)
+
+inst_96:
+// rs1_val == -524289,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x80001; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, -0x80001, 0x4, x1, 384, x2)
+
+inst_97:
+// rs1_val == -1048577,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x100001; op2val:-0x101
+TEST_CR_OP( c.and, x10, x11, 0xffeffeff, -0x100001, -0x101, x1, 388, x2)
+
+inst_98:
+// rs1_val == -8388609,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x800001; op2val:0x1000
+TEST_CR_OP( c.and, x10, x11, 0x1000, -0x800001, 0x1000, x1, 392, x2)
+
+inst_99:
+// rs1_val == -16777217,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x1000001; op2val:-0x2001
+TEST_CR_OP( c.and, x10, x11, 0xfeffdfff, -0x1000001, -0x2001, x1, 396, x2)
+
+inst_100:
+// rs1_val == -33554433,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x2000001; op2val:-0x10001
+TEST_CR_OP( c.and, x10, x11, 0xfdfeffff, -0x2000001, -0x10001, x1, 400, x2)
+
+inst_101:
+// rs1_val == -268435457,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x10000001; op2val:-0x2000001
+TEST_CR_OP( c.and, x10, x11, 0xedffffff, -0x10000001, -0x2000001, x1, 404, x2)
+
+inst_102:
+// rs1_val == 1431655765, rs1_val==1431655765 and rs2_val==1717986917
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x44444445, 0x55555555, 0x66666665, x1, 408, x2)
+
+inst_103:
+// rs1_val == -1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x80
+TEST_CR_OP( c.and, x10, x11, 0x80, -0x55555556, 0x80, x1, 412, x2)
+
+inst_104:
+// rs1_val==3 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3, 0x3, x1, 416, x2)
+
+inst_105:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x3, 0x55555555, x1, 420, x2)
+
+inst_106:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, -0x55555556, x1, 424, x2)
+
+inst_107:
+// rs1_val==3 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x3, 0x5, x1, 428, x2)
+
+inst_108:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3, 0x33333333, x1, 432, x2)
+
+inst_109:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, 0x66666666, x1, 436, x2)
+
+inst_110:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3, -0xb504, x1, 440, x2)
+
+inst_111:
+// rs1_val==3 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3, 0xb504, x1, 444, x2)
+
+inst_112:
+// rs1_val==3 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, 0x2, x1, 448, x2)
+
+inst_113:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3, 0x55555554, x1, 452, x2)
+
+inst_114:
+// rs1_val==3 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3, 0x0, x1, 456, x2)
+
+inst_115:
+// rs1_val==3 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3, 0x4, x1, 460, x2)
+
+inst_116:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, 0x33333332, x1, 464, x2)
+
+inst_117:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x3, 0x66666665, x1, 468, x2)
+
+inst_118:
+// rs1_val==3 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3, 0xb503, x1, 472, x2)
+
+inst_119:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, 0x55555556, x1, 476, x2)
+
+inst_120:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3, -0x55555555, x1, 480, x2)
+
+inst_121:
+// rs1_val==3 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, 0x6, x1, 484, x2)
+
+inst_122:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3, 0x33333334, x1, 488, x2)
+
+inst_123:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3, 0x66666667, x1, 492, x2)
+
+inst_124:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x3, -0xb503, x1, 496, x2)
+
+inst_125:
+// rs1_val==3 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x3, 0xb505, x1, 500, x2)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x55555555, 0x3, x1, 504, x2)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x55555555, 0x55555555, 0x55555555, x1, 508, x2)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x55555555, -0x55555556, x1, 512, x2)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x55555555, 0x5, x1, 516, x2)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x11111111, 0x55555555, 0x33333333, x1, 520, x2)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x44444444, 0x55555555, 0x66666666, x1, 524, x2)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x55554054, 0x55555555, -0xb504, x1, 528, x2)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x1504, 0x55555555, 0xb504, x1, 532, x2)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x55555555, 0x2, x1, 536, x2)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x55555554, 0x55555555, 0x55555554, x1, 540, x2)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x55555555, 0x0, x1, 544, x2)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x55555555, 0x4, x1, 548, x2)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x11111110, 0x55555555, 0x33333332, x1, 552, x2)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x1501, 0x55555555, 0xb503, x1, 556, x2)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x55555554, 0x55555555, 0x55555556, x1, 560, x2)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x55555555, -0x55555555, x1, 564, x2)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x55555555, 0x6, x1, 568, x2)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x11111114, 0x55555555, 0x33333334, x1, 572, x2)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x44444445, 0x55555555, 0x66666667, x1, 576, x2)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x55554055, 0x55555555, -0xb503, x1, 580, x2)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x1505, 0x55555555, 0xb505, x1, 584, x2)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x55555556, 0x3, x1, 588, x2)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x55555556, 0x55555555, x1, 592, x2)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaa, -0x55555556, -0x55555556, x1, 596, x2)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x55555556, 0x5, x1, 600, x2)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x22222222, -0x55555556, 0x33333333, x1, 604, x2)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x22222222, -0x55555556, 0x66666666, x1, 608, x2)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0xaaaa0aa8, -0x55555556, -0xb504, x1, 612, x2)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0xa000, -0x55555556, 0xb504, x1, 616, x2)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x55555556, 0x2, x1, 620, x2)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x55555556, 0x55555554, x1, 624, x2)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x55555556, 0x0, x1, 628, x2)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x55555556, 0x4, x1, 632, x2)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x22222222, -0x55555556, 0x33333332, x1, 636, x2)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x22222220, -0x55555556, 0x66666665, x1, 640, x2)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0xa002, -0x55555556, 0xb503, x1, 644, x2)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x55555556, 0x55555556, x1, 648, x2)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaa, -0x55555556, -0x55555555, x1, 652, x2)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x55555556, 0x6, x1, 656, x2)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x22222220, -0x55555556, 0x33333334, x1, 660, x2)
+
+inst_166:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x22222222, -0x55555556, 0x66666667, x1, 664, x2)
+
+inst_167:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0xaaaa0aa8, -0x55555556, -0xb503, x1, 668, x2)
+
+inst_168:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0xa000, -0x55555556, 0xb505, x1, 672, x2)
+
+inst_169:
+// rs1_val==5 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x5, 0x3, x1, 676, x2)
+
+inst_170:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x5, 0x55555555, x1, 680, x2)
+
+inst_171:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5, -0x55555556, x1, 684, x2)
+
+inst_172:
+// rs1_val==5 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x5, 0x5, x1, 688, x2)
+
+inst_173:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x5, 0x33333333, x1, 692, x2)
+
+inst_174:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0x66666666, x1, 696, x2)
+
+inst_175:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, -0xb504, x1, 700, x2)
+
+inst_176:
+// rs1_val==5 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0xb504, x1, 704, x2)
+
+inst_177:
+// rs1_val==5 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5, 0x2, x1, 708, x2)
+
+inst_178:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0x55555554, x1, 712, x2)
+
+inst_179:
+// rs1_val==5 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5, 0x0, x1, 716, x2)
+
+inst_180:
+// rs1_val==5 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0x4, x1, 720, x2)
+
+inst_181:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5, 0x33333332, x1, 724, x2)
+
+inst_182:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x5, 0x66666665, x1, 728, x2)
+
+inst_183:
+// rs1_val==5 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x5, 0xb503, x1, 732, x2)
+
+inst_184:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0x55555556, x1, 736, x2)
+
+inst_185:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x5, -0x55555555, x1, 740, x2)
+
+inst_186:
+// rs1_val==5 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0x6, x1, 744, x2)
+
+inst_187:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0x33333334, x1, 748, x2)
+
+inst_188:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x5, 0x66666667, x1, 752, x2)
+
+inst_189:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x5, -0xb503, x1, 756, x2)
+
+inst_190:
+// rs1_val==5 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x5, 0xb505, x1, 760, x2)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x33333333, 0x3, x1, 764, x2)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x11111111, 0x33333333, 0x55555555, x1, 768, x2)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x22222222, 0x33333333, -0x55555556, x1, 772, x2)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x33333333, 0x5, x1, 776, x2)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x33333333, 0x33333333, 0x33333333, x1, 780, x2)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x22222222, 0x33333333, 0x66666666, x1, 784, x2)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x33330230, 0x33333333, -0xb504, x1, 788, x2)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x3100, 0x33333333, 0xb504, x1, 792, x2)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x33333333, 0x2, x1, 796, x2)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x11111110, 0x33333333, 0x55555554, x1, 800, x2)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x33333333, 0x0, x1, 804, x2)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x33333333, 0x4, x1, 808, x2)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x33333332, 0x33333333, 0x33333332, x1, 812, x2)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x22222221, 0x33333333, 0x66666665, x1, 816, x2)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x3103, 0x33333333, 0xb503, x1, 820, x2)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x11111112, 0x33333333, 0x55555556, x1, 824, x2)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x22222223, 0x33333333, -0x55555555, x1, 828, x2)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x33333333, 0x6, x1, 832, x2)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x33333330, 0x33333333, 0x33333334, x1, 836, x2)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x22222223, 0x33333333, 0x66666667, x1, 840, x2)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x33330231, 0x33333333, -0xb503, x1, 844, x2)
+
+inst_212:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x3101, 0x33333333, 0xb505, x1, 848, x2)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x66666666, 0x3, x1, 852, x2)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x44444444, 0x66666666, 0x55555555, x1, 856, x2)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x22222222, 0x66666666, -0x55555556, x1, 860, x2)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x66666666, 0x5, x1, 864, x2)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x22222222, 0x66666666, 0x33333333, x1, 868, x2)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x66666666, 0x66666666, 0x66666666, x1, 872, x2)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x66664264, 0x66666666, -0xb504, x1, 876, x2)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x2404, 0x66666666, 0xb504, x1, 880, x2)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x66666666, 0x2, x1, 884, x2)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x44444444, 0x66666666, 0x55555554, x1, 888, x2)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x66666666, 0x0, x1, 892, x2)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x66666666, 0x4, x1, 896, x2)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x22222222, 0x66666666, 0x33333332, x1, 900, x2)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x66666664, 0x66666666, 0x66666665, x1, 904, x2)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x2402, 0x66666666, 0xb503, x1, 908, x2)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x44444446, 0x66666666, 0x55555556, x1, 912, x2)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x22222222, 0x66666666, -0x55555555, x1, 916, x2)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x66666666, 0x6, x1, 920, x2)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x22222224, 0x66666666, 0x33333334, x1, 924, x2)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x66666666, 0x66666666, 0x66666667, x1, 928, x2)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x66664264, 0x66666666, -0xb503, x1, 932, x2)
+
+inst_234:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x2404, 0x66666666, 0xb505, x1, 936, x2)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x0, -0xb504, 0x3, x1, 940, x2)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x55554054, -0xb504, 0x55555555, x1, 944, x2)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0xaaaa0aa8, -0xb504, -0x55555556, x1, 948, x2)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb504, 0x5, x1, 952, x2)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x33330230, -0xb504, 0x33333333, x1, 956, x2)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x66664264, -0xb504, 0x66666666, x1, 960, x2)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0xffff4afc, -0xb504, -0xb504, x1, 964, x2)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb504, 0xb504, x1, 968, x2)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, -0xb504, 0x2, x1, 972, x2)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x55554054, -0xb504, 0x55555554, x1, 976, x2)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, -0xb504, 0x0, x1, 980, x2)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb504, 0x4, x1, 984, x2)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x33330230, -0xb504, 0x33333332, x1, 988, x2)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x66664264, -0xb504, 0x66666665, x1, 992, x2)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x0, -0xb504, 0xb503, x1, 996, x2)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x55554054, -0xb504, 0x55555556, x1, 1000, x2)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0xaaaa0aa8, -0xb504, -0x55555555, x1, 1004, x2)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb504, 0x6, x1, 1008, x2)
+
+inst_253:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x33330234, -0xb504, 0x33333334, x1, 1012, x2)
+
+inst_254:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x66664264, -0xb504, 0x66666667, x1, 1016, x2)
+
+inst_255:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0xffff4afc, -0xb504, -0xb503, x1, 1020, x2)
+
+inst_256:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb504, 0xb505, x1, 1024, x2)
+
+inst_257:
+// rs1_val==46340 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504, 0x3, x1, 1028, x2)
+
+inst_258:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x1504, 0xb504, 0x55555555, x1, 1032, x2)
+
+inst_259:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0xa000, 0xb504, -0x55555556, x1, 1036, x2)
+
+inst_260:
+// rs1_val==46340 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0xb504, 0x5, x1, 1040, x2)
+
+inst_261:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x3100, 0xb504, 0x33333333, x1, 1044, x2)
+
+inst_262:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x2404, 0xb504, 0x66666666, x1, 1048, x2)
+
+inst_263:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x4, 0xb504, -0xb504, x1, 1052, x2)
+
+inst_264:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0xb504, 0xb504, 0xb504, x1, 1056, x2)
+
+inst_265:
+// rs1_val==46340 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504, 0x2, x1, 1060, x2)
+
+inst_266:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x1504, 0xb504, 0x55555554, x1, 1064, x2)
+
+inst_267:
+// rs1_val==46340 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504, 0x0, x1, 1068, x2)
+
+inst_268:
+// rs1_val==46340 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0xb504, 0x4, x1, 1072, x2)
+
+inst_269:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x3100, 0xb504, 0x33333332, x1, 1076, x2)
+
+inst_270:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x2404, 0xb504, 0x66666665, x1, 1080, x2)
+
+inst_271:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0xb500, 0xb504, 0xb503, x1, 1084, x2)
+
+inst_272:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x1504, 0xb504, 0x55555556, x1, 1088, x2)
+
+inst_273:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0xa000, 0xb504, -0x55555555, x1, 1092, x2)
+
+inst_274:
+// rs1_val==46340 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0xb504, 0x6, x1, 1096, x2)
+
+inst_275:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x3104, 0xb504, 0x33333334, x1, 1100, x2)
+
+inst_276:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x2404, 0xb504, 0x66666667, x1, 1104, x2)
+
+inst_277:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x4, 0xb504, -0xb503, x1, 1108, x2)
+
+inst_278:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0xb504, 0xb504, 0xb505, x1, 1112, x2)
+
+inst_279:
+// rs1_val==2 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x3, x1, 1116, x2)
+
+inst_280:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x55555555, x1, 1120, x2)
+
+inst_281:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, -0x55555556, x1, 1124, x2)
+
+inst_282:
+// rs1_val==2 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x5, x1, 1128, x2)
+
+inst_283:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x33333333, x1, 1132, x2)
+
+inst_284:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x66666666, x1, 1136, x2)
+
+inst_285:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, -0xb504, x1, 1140, x2)
+
+inst_286:
+// rs1_val==2 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0xb504, x1, 1144, x2)
+
+inst_287:
+// rs1_val==2 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x2, x1, 1148, x2)
+
+inst_288:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x55555554, x1, 1152, x2)
+
+inst_289:
+// rs1_val==2 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x0, x1, 1156, x2)
+
+inst_290:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x33333332, x1, 1160, x2)
+
+inst_291:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x66666665, x1, 1164, x2)
+
+inst_292:
+// rs1_val==2 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0xb503, x1, 1168, x2)
+
+inst_293:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x55555556, x1, 1172, x2)
+
+inst_294:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, -0x55555555, x1, 1176, x2)
+
+inst_295:
+// rs1_val==2 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x6, x1, 1180, x2)
+
+inst_296:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x33333334, x1, 1184, x2)
+
+inst_297:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x66666667, x1, 1188, x2)
+
+inst_298:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, -0xb503, x1, 1192, x2)
+
+inst_299:
+// rs1_val==2 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0xb505, x1, 1196, x2)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x55555554, 0x3, x1, 1200, x2)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x55555554, 0x55555554, 0x55555555, x1, 1204, x2)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x55555554, -0x55555556, x1, 1208, x2)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x55555554, 0x5, x1, 1212, x2)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x11111110, 0x55555554, 0x33333333, x1, 1216, x2)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x44444444, 0x55555554, 0x66666666, x1, 1220, x2)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x55554054, 0x55555554, -0xb504, x1, 1224, x2)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x1504, 0x55555554, 0xb504, x1, 1228, x2)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x55555554, 0x2, x1, 1232, x2)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x55555554, 0x55555554, 0x55555554, x1, 1236, x2)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x55555554, 0x0, x1, 1240, x2)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x55555554, 0x4, x1, 1244, x2)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x11111110, 0x55555554, 0x33333332, x1, 1248, x2)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x44444444, 0x55555554, 0x66666665, x1, 1252, x2)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x1500, 0x55555554, 0xb503, x1, 1256, x2)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x55555554, 0x55555554, 0x55555556, x1, 1260, x2)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x55555554, -0x55555555, x1, 1264, x2)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x55555554, 0x6, x1, 1268, x2)
+
+inst_318:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x11111114, 0x55555554, 0x33333334, x1, 1272, x2)
+
+inst_319:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x44444444, 0x55555554, 0x66666667, x1, 1276, x2)
+
+inst_320:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x55554054, 0x55555554, -0xb503, x1, 1280, x2)
+
+inst_321:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x1504, 0x55555554, 0xb505, x1, 1284, x2)
+
+inst_322:
+// rs1_val==0 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x3, x1, 1288, x2)
+
+inst_323:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x55555555, x1, 1292, x2)
+
+inst_324:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, -0x55555556, x1, 1296, x2)
+
+inst_325:
+// rs1_val==0 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x5, x1, 1300, x2)
+
+inst_326:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x33333333, x1, 1304, x2)
+
+inst_327:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x66666666, x1, 1308, x2)
+
+inst_328:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, -0xb504, x1, 1312, x2)
+
+inst_329:
+// rs1_val==0 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0xb504, x1, 1316, x2)
+
+inst_330:
+// rs1_val==0 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x2, x1, 1320, x2)
+
+inst_331:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0xaaaa0aa9, -0x55555555, -0xb503, x1, 1324, x2)
+
+inst_332:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0xa001, -0x55555555, 0xb505, x1, 1328, x2)
+
+inst_333:
+// rs1_val==6 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, 0x3, x1, 1332, x2)
+
+inst_334:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0x55555555, x1, 1336, x2)
+
+inst_335:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, -0x55555556, x1, 1340, x2)
+
+inst_336:
+// rs1_val==6 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0x5, x1, 1344, x2)
+
+inst_337:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, 0x33333333, x1, 1348, x2)
+
+inst_338:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6, 0x66666666, x1, 1352, x2)
+
+inst_339:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, -0xb504, x1, 1356, x2)
+
+inst_340:
+// rs1_val==6 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0xb504, x1, 1360, x2)
+
+inst_341:
+// rs1_val==6 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, 0x2, x1, 1364, x2)
+
+inst_342:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0x55555554, x1, 1368, x2)
+
+inst_343:
+// rs1_val==6 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x6, 0x0, x1, 1372, x2)
+
+inst_344:
+// rs1_val==6 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0x4, x1, 1376, x2)
+
+inst_345:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, 0x33333332, x1, 1380, x2)
+
+inst_346:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0x66666665, x1, 1384, x2)
+
+inst_347:
+// rs1_val==6 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, 0xb503, x1, 1388, x2)
+
+inst_348:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6, 0x55555556, x1, 1392, x2)
+
+inst_349:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, -0x55555555, x1, 1396, x2)
+
+inst_350:
+// rs1_val==6 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6, 0x6, x1, 1400, x2)
+
+inst_351:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0x33333334, x1, 1404, x2)
+
+inst_352:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6, 0x66666667, x1, 1408, x2)
+
+inst_353:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, -0xb503, x1, 1412, x2)
+
+inst_354:
+// rs1_val==6 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0xb505, x1, 1416, x2)
+
+inst_355:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x33333334, 0x3, x1, 1420, x2)
+
+inst_356:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x11111114, 0x33333334, 0x55555555, x1, 1424, x2)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x22222220, 0x33333334, -0x55555556, x1, 1428, x2)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x33333334, 0x5, x1, 1432, x2)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x33333330, 0x33333334, 0x33333333, x1, 1436, x2)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x22222224, 0x33333334, 0x66666666, x1, 1440, x2)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x33330234, 0x33333334, -0xb504, x1, 1444, x2)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x3104, 0x33333334, 0xb504, x1, 1448, x2)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x33333334, 0x2, x1, 1452, x2)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x11111114, 0x33333334, 0x55555554, x1, 1456, x2)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x33333334, 0x0, x1, 1460, x2)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x33333334, 0x4, x1, 1464, x2)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x33333330, 0x33333334, 0x33333332, x1, 1468, x2)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x22222224, 0x33333334, 0x66666665, x1, 1472, x2)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x3100, 0x33333334, 0xb503, x1, 1476, x2)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x11111114, 0x33333334, 0x55555556, x1, 1480, x2)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x22222220, 0x33333334, -0x55555555, x1, 1484, x2)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x33333334, 0x6, x1, 1488, x2)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x33333334, 0x33333334, 0x33333334, x1, 1492, x2)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x22222224, 0x33333334, 0x66666667, x1, 1496, x2)
+
+inst_375:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x33330234, 0x33333334, -0xb503, x1, 1500, x2)
+
+inst_376:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x3104, 0x33333334, 0xb505, x1, 1504, x2)
+
+inst_377:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x66666667, 0x3, x1, 1508, x2)
+
+inst_378:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x44444445, 0x66666667, 0x55555555, x1, 1512, x2)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x22222222, 0x66666667, -0x55555556, x1, 1516, x2)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x66666667, 0x5, x1, 1520, x2)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x22222223, 0x66666667, 0x33333333, x1, 1524, x2)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x66666666, 0x66666667, 0x66666666, x1, 1528, x2)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x66664264, 0x66666667, -0xb504, x1, 1532, x2)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x2404, 0x66666667, 0xb504, x1, 1536, x2)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x66666667, 0x2, x1, 1540, x2)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x44444444, 0x66666667, 0x55555554, x1, 1544, x2)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x66666667, 0x0, x1, 1548, x2)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x66666667, 0x4, x1, 1552, x2)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x22222222, 0x66666667, 0x33333332, x1, 1556, x2)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x66666665, 0x66666667, 0x66666665, x1, 1560, x2)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x2403, 0x66666667, 0xb503, x1, 1564, x2)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x44444446, 0x66666667, 0x55555556, x1, 1568, x2)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x22222223, 0x66666667, -0x55555555, x1, 1572, x2)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x66666667, 0x6, x1, 1576, x2)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x22222224, 0x66666667, 0x33333334, x1, 1580, x2)
+
+inst_396:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x66666667, 0x66666667, 0x66666667, x1, 1584, x2)
+
+inst_397:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x66664265, 0x66666667, -0xb503, x1, 1588, x2)
+
+inst_398:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x2405, 0x66666667, 0xb505, x1, 1592, x2)
+
+inst_399:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x1, -0xb503, 0x3, x1, 1596, x2)
+
+inst_400:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x55554055, -0xb503, 0x55555555, x1, 1600, x2)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0xaaaa0aa8, -0xb503, -0x55555556, x1, 1604, x2)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x5, -0xb503, 0x5, x1, 1608, x2)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x33330231, -0xb503, 0x33333333, x1, 1612, x2)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x66664264, -0xb503, 0x66666666, x1, 1616, x2)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0xffff4afc, -0xb503, -0xb504, x1, 1620, x2)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb503, 0xb504, x1, 1624, x2)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, -0xb503, 0x2, x1, 1628, x2)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x55554054, -0xb503, 0x55555554, x1, 1632, x2)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, -0xb503, 0x0, x1, 1636, x2)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb503, 0x4, x1, 1640, x2)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x33330230, -0xb503, 0x33333332, x1, 1644, x2)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x66664265, -0xb503, 0x66666665, x1, 1648, x2)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x1, -0xb503, 0xb503, x1, 1652, x2)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x55554054, -0xb503, 0x55555556, x1, 1656, x2)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0xaaaa0aa9, -0xb503, -0x55555555, x1, 1660, x2)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb503, 0x6, x1, 1664, x2)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x33330234, -0xb503, 0x33333334, x1, 1668, x2)
+
+inst_418:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x66664265, -0xb503, 0x66666667, x1, 1672, x2)
+
+inst_419:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0xffff4afd, -0xb503, -0xb503, x1, 1676, x2)
+
+inst_420:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x5, -0xb503, 0xb505, x1, 1680, x2)
+
+inst_421:
+// rs1_val==46341 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x1, 0xb505, 0x3, x1, 1684, x2)
+
+inst_422:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x1505, 0xb505, 0x55555555, x1, 1688, x2)
+
+inst_423:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0xa000, 0xb505, -0x55555556, x1, 1692, x2)
+
+inst_424:
+// rs1_val==46341 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x5, 0xb505, 0x5, x1, 1696, x2)
+
+inst_425:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x3101, 0xb505, 0x33333333, x1, 1700, x2)
+
+inst_426:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x2404, 0xb505, 0x66666666, x1, 1704, x2)
+
+inst_427:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x4, 0xb505, -0xb504, x1, 1708, x2)
+
+inst_428:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0xb504, 0xb505, 0xb504, x1, 1712, x2)
+
+inst_429:
+// rs1_val==46341 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb505, 0x2, x1, 1716, x2)
+
+inst_430:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x1504, 0xb505, 0x55555554, x1, 1720, x2)
+
+inst_431:
+// rs1_val==46341 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb505, 0x0, x1, 1724, x2)
+
+inst_432:
+// rs1_val==46341 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0xb505, 0x4, x1, 1728, x2)
+
+inst_433:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x3100, 0xb505, 0x33333332, x1, 1732, x2)
+
+inst_434:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x2405, 0xb505, 0x66666665, x1, 1736, x2)
+
+inst_435:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0xb501, 0xb505, 0xb503, x1, 1740, x2)
+
+inst_436:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x1504, 0xb505, 0x55555556, x1, 1744, x2)
+
+inst_437:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0xa001, 0xb505, -0x55555555, x1, 1748, x2)
+
+inst_438:
+// rs1_val==46341 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0xb505, 0x6, x1, 1752, x2)
+
+inst_439:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x3104, 0xb505, 0x33333334, x1, 1756, x2)
+
+inst_440:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x2405, 0xb505, 0x66666667, x1, 1760, x2)
+
+inst_441:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x5, 0xb505, -0xb503, x1, 1764, x2)
+
+inst_442:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb505; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0xb505, 0xb505, 0xb505, x1, 1768, x2)
+
+inst_443:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x55555554, x1, 1772, x2)
+
+inst_444:
+// rs1_val==0 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x0, x1, 1776, x2)
+
+inst_445:
+// rs1_val==0 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x4, x1, 1780, x2)
+
+inst_446:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x33333332, x1, 1784, x2)
+
+inst_447:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x66666665, x1, 1788, x2)
+
+inst_448:
+// rs1_val==0 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0xb503, x1, 1792, x2)
+
+inst_449:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x55555556, x1, 1796, x2)
+
+inst_450:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, -0x55555555, x1, 1800, x2)
+
+inst_451:
+// rs1_val==0 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x6, x1, 1804, x2)
+
+inst_452:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x33333334, x1, 1808, x2)
+
+inst_453:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x66666667, x1, 1812, x2)
+
+inst_454:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, -0xb503, x1, 1816, x2)
+
+inst_455:
+// rs1_val==0 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0xb505, x1, 1820, x2)
+
+inst_456:
+// rs1_val==4 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0x3, x1, 1824, x2)
+
+inst_457:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x55555555, x1, 1828, x2)
+
+inst_458:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, -0x55555556, x1, 1832, x2)
+
+inst_459:
+// rs1_val==4 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x5, x1, 1836, x2)
+
+inst_460:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0x33333333, x1, 1840, x2)
+
+inst_461:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x66666666, x1, 1844, x2)
+
+inst_462:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, -0xb504, x1, 1848, x2)
+
+inst_463:
+// rs1_val==4 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0xb504, x1, 1852, x2)
+
+inst_464:
+// rs1_val==4 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0x2, x1, 1856, x2)
+
+inst_465:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x55555554, x1, 1860, x2)
+
+inst_466:
+// rs1_val==4 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0x0, x1, 1864, x2)
+
+inst_467:
+// rs1_val==4 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x4, x1, 1868, x2)
+
+inst_468:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0x33333332, x1, 1872, x2)
+
+inst_469:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x66666665, x1, 1876, x2)
+
+inst_470:
+// rs1_val==4 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0xb503, x1, 1880, x2)
+
+inst_471:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x55555556, x1, 1884, x2)
+
+inst_472:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, -0x55555555, x1, 1888, x2)
+
+inst_473:
+// rs1_val==4 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x6, x1, 1892, x2)
+
+inst_474:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x33333334, x1, 1896, x2)
+
+inst_475:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x66666667, x1, 1900, x2)
+
+inst_476:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, -0xb503, x1, 1904, x2)
+
+inst_477:
+// rs1_val==4 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0xb505, x1, 1908, x2)
+
+inst_478:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x33333332, 0x3, x1, 1912, x2)
+
+inst_479:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x11111110, 0x33333332, 0x55555555, x1, 1916, x2)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x22222222, 0x33333332, -0x55555556, x1, 1920, x2)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x33333332, 0x5, x1, 1924, x2)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x33333332, 0x33333332, 0x33333333, x1, 1928, x2)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x22222222, 0x33333332, 0x66666666, x1, 1932, x2)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x33330230, 0x33333332, -0xb504, x1, 1936, x2)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x3100, 0x33333332, 0xb504, x1, 1940, x2)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x33333332, 0x2, x1, 1944, x2)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x11111110, 0x33333332, 0x55555554, x1, 1948, x2)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x33333332, 0x0, x1, 1952, x2)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x33333332, 0x4, x1, 1956, x2)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x33333332, 0x33333332, 0x33333332, x1, 1960, x2)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x22222220, 0x33333332, 0x66666665, x1, 1964, x2)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x3102, 0x33333332, 0xb503, x1, 1968, x2)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x11111112, 0x33333332, 0x55555556, x1, 1972, x2)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x22222222, 0x33333332, -0x55555555, x1, 1976, x2)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x33333332, 0x6, x1, 1980, x2)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x33333330, 0x33333332, 0x33333334, x1, 1984, x2)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x22222222, 0x33333332, 0x66666667, x1, 1988, x2)
+
+inst_498:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x33330230, 0x33333332, -0xb503, x1, 1992, x2)
+
+inst_499:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x3100, 0x33333332, 0xb505, x1, 1996, x2)
+
+inst_500:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x66666665, 0x3, x1, 2000, x2)
+
+inst_501:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x44444445, 0x66666665, 0x55555555, x1, 2004, x2)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x22222220, 0x66666665, -0x55555556, x1, 2008, x2)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x66666665, 0x5, x1, 2012, x2)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x22222221, 0x66666665, 0x33333333, x1, 2016, x2)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x66666664, 0x66666665, 0x66666666, x1, 2020, x2)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x66664264, 0x66666665, -0xb504, x1, 2024, x2)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x2404, 0x66666665, 0xb504, x1, 2028, x2)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x66666665, 0x2, x1, 2032, x2)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x44444444, 0x66666665, 0x55555554, x1, 2036, x2)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x66666665, 0x0, x1, 2040, x2)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x66666665, 0x4, x1, 2044, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x22222220, 0x66666665, 0x33333332, x1, 0, x2)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x66666665, 0x66666665, 0x66666665, x1, 4, x2)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x2401, 0x66666665, 0xb503, x1, 8, x2)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x44444444, 0x66666665, 0x55555556, x1, 12, x2)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x22222221, 0x66666665, -0x55555555, x1, 16, x2)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x66666665, 0x6, x1, 20, x2)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x22222224, 0x66666665, 0x33333334, x1, 24, x2)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x66666665, 0x66666665, 0x66666667, x1, 28, x2)
+
+inst_520:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x66664265, 0x66666665, -0xb503, x1, 32, x2)
+
+inst_521:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x2405, 0x66666665, 0xb505, x1, 36, x2)
+
+inst_522:
+// rs1_val==46339 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x3, 0xb503, 0x3, x1, 40, x2)
+
+inst_523:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x1501, 0xb503, 0x55555555, x1, 44, x2)
+
+inst_524:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0xa002, 0xb503, -0x55555556, x1, 48, x2)
+
+inst_525:
+// rs1_val==46339 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x1, 0xb503, 0x5, x1, 52, x2)
+
+inst_526:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x3103, 0xb503, 0x33333333, x1, 56, x2)
+
+inst_527:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x2402, 0xb503, 0x66666666, x1, 60, x2)
+
+inst_528:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb503, -0xb504, x1, 64, x2)
+
+inst_529:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0xb500, 0xb503, 0xb504, x1, 68, x2)
+
+inst_530:
+// rs1_val==46339 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0xb503, 0x2, x1, 72, x2)
+
+inst_531:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x1500, 0xb503, 0x55555554, x1, 76, x2)
+
+inst_532:
+// rs1_val==46339 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb503, 0x0, x1, 80, x2)
+
+inst_533:
+// rs1_val==46339 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb503, 0x4, x1, 84, x2)
+
+inst_534:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x3102, 0xb503, 0x33333332, x1, 88, x2)
+
+inst_535:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x2401, 0xb503, 0x66666665, x1, 92, x2)
+
+inst_536:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0xb503, 0xb503, 0xb503, x1, 96, x2)
+
+inst_537:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x1502, 0xb503, 0x55555556, x1, 100, x2)
+
+inst_538:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0xa003, 0xb503, -0x55555555, x1, 104, x2)
+
+inst_539:
+// rs1_val==46339 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, 0xb503, 0x6, x1, 108, x2)
+
+inst_540:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x3100, 0xb503, 0x33333334, x1, 112, x2)
+
+inst_541:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x2403, 0xb503, 0x66666667, x1, 116, x2)
+
+inst_542:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x1, 0xb503, -0xb503, x1, 120, x2)
+
+inst_543:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb503; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0xb501, 0xb503, 0xb505, x1, 124, x2)
+
+inst_544:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x55555556, 0x3, x1, 128, x2)
+
+inst_545:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x55555554, 0x55555556, 0x55555555, x1, 132, x2)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x55555556, -0x55555556, x1, 136, x2)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x55555556, 0x5, x1, 140, x2)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x11111112, 0x55555556, 0x33333333, x1, 144, x2)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x44444446, 0x55555556, 0x66666666, x1, 148, x2)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0x55554054, 0x55555556, -0xb504, x1, 152, x2)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0x1504, 0x55555556, 0xb504, x1, 156, x2)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x55555556, 0x2, x1, 160, x2)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x55555554, 0x55555556, 0x55555554, x1, 164, x2)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x55555556, 0x0, x1, 168, x2)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x55555556, 0x4, x1, 172, x2)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x11111112, 0x55555556, 0x33333332, x1, 176, x2)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x44444444, 0x55555556, 0x66666665, x1, 180, x2)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0x1502, 0x55555556, 0xb503, x1, 184, x2)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x55555556, 0x55555556, 0x55555556, x1, 188, x2)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x55555556, -0x55555555, x1, 192, x2)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x55555556, 0x6, x1, 196, x2)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x11111114, 0x55555556, 0x33333334, x1, 200, x2)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x44444446, 0x55555556, 0x66666667, x1, 204, x2)
+
+inst_564:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb503
+TEST_CR_OP( c.and, x10, x11, 0x55554054, 0x55555556, -0xb503, x1, 208, x2)
+
+inst_565:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb505
+TEST_CR_OP( c.and, x10, x11, 0x1504, 0x55555556, 0xb505, x1, 212, x2)
+
+inst_566:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x3, -0x55555555, 0x3, x1, 216, x2)
+
+inst_567:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555555
+TEST_CR_OP( c.and, x10, x11, 0x1, -0x55555555, 0x55555555, x1, 220, x2)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555556
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaa, -0x55555555, -0x55555556, x1, 224, x2)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x1, -0x55555555, 0x5, x1, 228, x2)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333333
+TEST_CR_OP( c.and, x10, x11, 0x22222223, -0x55555555, 0x33333333, x1, 232, x2)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666666
+TEST_CR_OP( c.and, x10, x11, 0x22222222, -0x55555555, 0x66666666, x1, 236, x2)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb504
+TEST_CR_OP( c.and, x10, x11, 0xaaaa0aa8, -0x55555555, -0xb504, x1, 240, x2)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb504
+TEST_CR_OP( c.and, x10, x11, 0xa000, -0x55555555, 0xb504, x1, 244, x2)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x55555555, 0x2, x1, 248, x2)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555554
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x55555555, 0x55555554, x1, 252, x2)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x55555555, 0x0, x1, 256, x2)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x55555555, 0x4, x1, 260, x2)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333332
+TEST_CR_OP( c.and, x10, x11, 0x22222222, -0x55555555, 0x33333332, x1, 264, x2)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666665
+TEST_CR_OP( c.and, x10, x11, 0x22222221, -0x55555555, 0x66666665, x1, 268, x2)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb503
+TEST_CR_OP( c.and, x10, x11, 0xa003, -0x55555555, 0xb503, x1, 272, x2)
+
+inst_581:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555556
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x55555555, 0x55555556, x1, 276, x2)
+
+inst_582:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555555
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaab, -0x55555555, -0x55555555, x1, 280, x2)
+
+inst_583:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x55555555, 0x6, x1, 284, x2)
+
+inst_584:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333334
+TEST_CR_OP( c.and, x10, x11, 0x22222220, -0x55555555, 0x33333334, x1, 288, x2)
+
+inst_585:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666667
+TEST_CR_OP( c.and, x10, x11, 0x22222223, -0x55555555, 0x66666667, x1, 292, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 74*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/candi-01.S b/riscof/suite/rv32i_m/C/candi-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..c67a3e618227cad17a681fbe0e4987e83450a0ad
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/candi-01.S
@@ -0,0 +1,1949 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.andi instruction of the RISC-V C extension for the candi covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",candi)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1==x14, rs1_val == imm_val, rs1_val < 0 and imm_val < 0
+// opcode: c.andi; op1:x14; immval:-0x6
+TEST_CI_OP( c.andi, x14, 0xfffffffa, -0x6, -0x6, x1, 0, x2)
+
+inst_1:
+// rs1==x10, rs1_val != imm_val, rs1_val == -32769, rs1_val < 0 and imm_val > 0
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0xa, -0x8001, 0xa, x1, 4, x2)
+
+inst_2:
+// rs1==x13, rs1_val > 0 and imm_val > 0, rs1_val == 8192
+// opcode: c.andi; op1:x13; immval:0x5
+TEST_CI_OP( c.andi, x13, 0x0, 0x2000, 0x5, x1, 8, x2)
+
+inst_3:
+// rs1==x15, rs1_val > 0 and imm_val < 0, rs1_val == 256
+// opcode: c.andi; op1:x15; immval:-0x1
+TEST_CI_OP( c.andi, x15, 0x100, 0x100, -0x1, x1, 12, x2)
+
+inst_4:
+// rs1==x12, imm_val == (-2**(6-1)), imm_val == -32, rs1_val == 8
+// opcode: c.andi; op1:x12; immval:-0x20
+TEST_CI_OP( c.andi, x12, 0x0, 0x8, -0x20, x1, 16, x2)
+
+inst_5:
+// rs1==x11, imm_val == 0, rs1_val==-46340 and imm_val==0
+// opcode: c.andi; op1:x11; immval:0x0
+TEST_CI_OP( c.andi, x11, 0x0, -0xb504, 0x0, x1, 20, x2)
+
+inst_6:
+// rs1==x9, imm_val == (2**(6-1)-1), imm_val == 31, rs1_val == -33
+// opcode: c.andi; op1:x9; immval:0x1f
+TEST_CI_OP( c.andi, x9, 0x1f, -0x21, 0x1f, x1, 24, x2)
+
+inst_7:
+// rs1==x8, imm_val == 1,
+// opcode: c.andi; op1:x8; immval:0x1
+TEST_CI_OP( c.andi, x8, 0x0, 0x2000, 0x1, x1, 28, x2)
+
+inst_8:
+// rs1_val == (-2**(xlen-1)), rs1_val == -2147483648
+// opcode: c.andi; op1:x10; immval:0x1
+TEST_CI_OP( c.andi, x10, 0x0, -0x80000000, 0x1, x1, 32, x2)
+
+inst_9:
+// rs1_val == 0, rs1_val==0 and imm_val==4, imm_val == 4
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x4, x1, 36, x2)
+
+inst_10:
+// rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x7fffffff, 0x0, x1, 40, x2)
+
+inst_11:
+// rs1_val == 1,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x1, 0x1, 0x3, x1, 44, x2)
+
+inst_12:
+// imm_val == 2, rs1_val==5 and imm_val==2
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x5, 0x2, x1, 48, x2)
+
+inst_13:
+// imm_val == 8, rs1_val == -2
+// opcode: c.andi; op1:x10; immval:0x8
+TEST_CI_OP( c.andi, x10, 0x8, -0x2, 0x8, x1, 52, x2)
+
+inst_14:
+// imm_val == 16, rs1_val == -1048577
+// opcode: c.andi; op1:x10; immval:0x10
+TEST_CI_OP( c.andi, x10, 0x10, -0x100001, 0x10, x1, 56, x2)
+
+inst_15:
+// imm_val == -2, rs1_val==3 and imm_val==-2
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x3, -0x2, x1, 60, x2)
+
+inst_16:
+// imm_val == -3, rs1_val == 1048576
+// opcode: c.andi; op1:x10; immval:-0x3
+TEST_CI_OP( c.andi, x10, 0x100000, 0x100000, -0x3, x1, 64, x2)
+
+inst_17:
+// imm_val == -5, rs1_val==1717986919 and imm_val==-5
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x66666663, 0x66666667, -0x5, x1, 68, x2)
+
+inst_18:
+// imm_val == -9,
+// opcode: c.andi; op1:x10; immval:-0x9
+TEST_CI_OP( c.andi, x10, 0x66666665, 0x66666665, -0x9, x1, 72, x2)
+
+inst_19:
+// imm_val == -17,
+// opcode: c.andi; op1:x10; immval:-0x11
+TEST_CI_OP( c.andi, x10, 0x3, 0x3, -0x11, x1, 76, x2)
+
+inst_20:
+// imm_val == 21, rs1_val == 268435456
+// opcode: c.andi; op1:x10; immval:0x15
+TEST_CI_OP( c.andi, x10, 0x0, 0x10000000, 0x15, x1, 80, x2)
+
+inst_21:
+// imm_val == -22,
+// opcode: c.andi; op1:x10; immval:-0x16
+TEST_CI_OP( c.andi, x10, 0x0, 0x5, -0x16, x1, 84, x2)
+
+inst_22:
+// rs1_val == 2, rs1_val==2 and imm_val==5
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x2, 0x5, x1, 88, x2)
+
+inst_23:
+// rs1_val == 4, rs1_val==4 and imm_val==10
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, 0xa, x1, 92, x2)
+
+inst_24:
+// rs1_val == 16,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x10, 0x2, x1, 96, x2)
+
+inst_25:
+// rs1_val == 32,
+// opcode: c.andi; op1:x10; immval:-0x10
+TEST_CI_OP( c.andi, x10, 0x20, 0x20, -0x10, x1, 100, x2)
+
+inst_26:
+// rs1_val == 64,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x40, 0x0, x1, 104, x2)
+
+inst_27:
+// rs1_val == 128,
+// opcode: c.andi; op1:x10; immval:0x1f
+TEST_CI_OP( c.andi, x10, 0x0, 0x80, 0x1f, x1, 108, x2)
+
+inst_28:
+// rs1_val == 512,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x200, 0x4, x1, 112, x2)
+
+inst_29:
+// rs1_val == 1024,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x400, 0x4, x1, 116, x2)
+
+inst_30:
+// rs1_val == 2048,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x800, 0x800, -0x2, x1, 120, x2)
+
+inst_31:
+// rs1_val == 4096,
+// opcode: c.andi; op1:x10; immval:0x15
+TEST_CI_OP( c.andi, x10, 0x0, 0x1000, 0x15, x1, 124, x2)
+
+inst_32:
+// rs1_val == 16384,
+// opcode: c.andi; op1:x10; immval:-0x20
+TEST_CI_OP( c.andi, x10, 0x4000, 0x4000, -0x20, x1, 128, x2)
+
+inst_33:
+// rs1_val == 32768,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x8000, 0x3, x1, 132, x2)
+
+inst_34:
+// rs1_val == 65536,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x10000, 0x2, x1, 136, x2)
+
+inst_35:
+// rs1_val == 131072,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x0, 0x20000, 0x6, x1, 140, x2)
+
+inst_36:
+// rs1_val == 262144,
+// opcode: c.andi; op1:x10; immval:-0x6
+TEST_CI_OP( c.andi, x10, 0x40000, 0x40000, -0x6, x1, 144, x2)
+
+inst_37:
+// rs1_val == 524288,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x80000, 0x80000, -0x1, x1, 148, x2)
+
+inst_38:
+// rs1_val == 2097152,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x200000, 0x0, x1, 152, x2)
+
+inst_39:
+// rs1_val == 4194304,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x400000, 0x400000, -0x2, x1, 156, x2)
+
+inst_40:
+// rs1_val == 8388608,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x0, 0x800000, 0xb, x1, 160, x2)
+
+inst_41:
+// rs1_val == 16777216,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x1000000, 0x0, x1, 164, x2)
+
+inst_42:
+// rs1_val == 33554432,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x0, 0x2000000, 0x6, x1, 168, x2)
+
+inst_43:
+// rs1_val == 67108864,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x4000000, 0x4, x1, 172, x2)
+
+inst_44:
+// rs1_val == 134217728,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x8000000, 0x0, x1, 176, x2)
+
+inst_45:
+// rs1_val == 536870912,
+// opcode: c.andi; op1:x10; immval:-0x3
+TEST_CI_OP( c.andi, x10, 0x20000000, 0x20000000, -0x3, x1, 180, x2)
+
+inst_46:
+// rs1_val == 1073741824,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x40000000, 0x4, x1, 184, x2)
+
+inst_47:
+// rs1_val == -3,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x8, -0x3, 0xa, x1, 188, x2)
+
+inst_48:
+// rs1_val == -5,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xfffffffb, -0x5, -0x1, x1, 192, x2)
+
+inst_49:
+// rs1_val == -9,
+// opcode: c.andi; op1:x10; immval:0x10
+TEST_CI_OP( c.andi, x10, 0x10, -0x9, 0x10, x1, 196, x2)
+
+inst_50:
+// rs1_val == -17,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xffffffee, -0x11, -0x2, x1, 200, x2)
+
+inst_51:
+// rs1_val == -65,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x7, -0x41, 0x7, x1, 204, x2)
+
+inst_52:
+// rs1_val == -129,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, -0x81, 0x4, x1, 208, x2)
+
+inst_53:
+// rs1_val == -257,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, -0x101, 0x6, x1, 212, x2)
+
+inst_54:
+// rs1_val == -513,
+// opcode: c.andi; op1:x10; immval:0x10
+TEST_CI_OP( c.andi, x10, 0x10, -0x201, 0x10, x1, 216, x2)
+
+inst_55:
+// rs1_val == -1025,
+// opcode: c.andi; op1:x10; immval:0x1
+TEST_CI_OP( c.andi, x10, 0x1, -0x401, 0x1, x1, 220, x2)
+
+inst_56:
+// rs1_val == -2049,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, -0x801, 0x2, x1, 224, x2)
+
+inst_57:
+// rs1_val == -4097,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x9, -0x1001, 0x9, x1, 228, x2)
+
+inst_58:
+// rs1_val == -8193,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x7, -0x2001, 0x7, x1, 232, x2)
+
+inst_59:
+// rs1_val == -16385,
+// opcode: c.andi; op1:x10; immval:-0xa
+TEST_CI_OP( c.andi, x10, 0xffffbff6, -0x4001, -0xa, x1, 236, x2)
+
+inst_60:
+// rs1_val == -65537,
+// opcode: c.andi; op1:x10; immval:-0x3
+TEST_CI_OP( c.andi, x10, 0xfffefffd, -0x10001, -0x3, x1, 240, x2)
+
+inst_61:
+// rs1_val == -131073,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, -0x20001, 0x2, x1, 244, x2)
+
+inst_62:
+// rs1_val == -262145,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xfffbffff, -0x40001, -0x1, x1, 248, x2)
+
+inst_63:
+// rs1_val == -524289,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, -0x80001, 0x3, x1, 252, x2)
+
+inst_64:
+// rs1_val == -2097153,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0xb, -0x200001, 0xb, x1, 256, x2)
+
+inst_65:
+// rs1_val == -4194305,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, -0x400001, 0x4, x1, 260, x2)
+
+inst_66:
+// rs1_val == -8388609,
+// opcode: c.andi; op1:x10; immval:-0x3
+TEST_CI_OP( c.andi, x10, 0xff7ffffd, -0x800001, -0x3, x1, 264, x2)
+
+inst_67:
+// rs1_val == -16777217,
+// opcode: c.andi; op1:x10; immval:-0x11
+TEST_CI_OP( c.andi, x10, 0xfeffffef, -0x1000001, -0x11, x1, 268, x2)
+
+inst_68:
+// rs1_val == -33554433,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, -0x2000001, 0x0, x1, 272, x2)
+
+inst_69:
+// rs1_val == -67108865,
+// opcode: c.andi; op1:x10; immval:0x10
+TEST_CI_OP( c.andi, x10, 0x10, -0x4000001, 0x10, x1, 276, x2)
+
+inst_70:
+// rs1_val == -134217729,
+// opcode: c.andi; op1:x10; immval:0xf
+TEST_CI_OP( c.andi, x10, 0xf, -0x8000001, 0xf, x1, 280, x2)
+
+inst_71:
+// rs1_val == -268435457,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, -0x10000001, 0x6, x1, 284, x2)
+
+inst_72:
+// rs1_val == -536870913,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, -0x20000001, 0x5, x1, 288, x2)
+
+inst_73:
+// rs1_val == -1073741825,
+// opcode: c.andi; op1:x10; immval:-0x8
+TEST_CI_OP( c.andi, x10, 0xbffffff8, -0x40000001, -0x8, x1, 292, x2)
+
+inst_74:
+// rs1_val == 1431655765, rs1_val==1431655765 and imm_val==4
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x55555555, 0x4, x1, 296, x2)
+
+inst_75:
+// rs1_val == -1431655766,
+// opcode: c.andi; op1:x10; immval:-0xa
+TEST_CI_OP( c.andi, x10, 0xaaaaaaa2, -0x55555556, -0xa, x1, 300, x2)
+
+inst_76:
+// rs1_val==3 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, 0x3, 0x3, x1, 304, x2)
+
+inst_77:
+// rs1_val==3 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x1, 0x3, 0x5, x1, 308, x2)
+
+inst_78:
+// rs1_val==3 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x3, 0xa, x1, 312, x2)
+
+inst_79:
+// rs1_val==3 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, 0x3, 0x6, x1, 316, x2)
+
+inst_80:
+// rs1_val==3 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x3, 0x3, -0x5, x1, 320, x2)
+
+inst_81:
+// rs1_val==3 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x3, 0x2, x1, 324, x2)
+
+inst_82:
+// rs1_val==3 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x3, 0x4, x1, 328, x2)
+
+inst_83:
+// rs1_val==3 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0x3, 0x9, x1, 332, x2)
+
+inst_84:
+// rs1_val==3 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x3, 0x0, x1, 336, x2)
+
+inst_85:
+// rs1_val==3 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x3, 0x3, 0xb, x1, 340, x2)
+
+inst_86:
+// rs1_val==3 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x3, 0x3, 0x7, x1, 344, x2)
+
+inst_87:
+// rs1_val==3 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x3, 0x3, -0x1, x1, 348, x2)
+
+inst_88:
+// rs1_val==3 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x3, -0x4, x1, 352, x2)
+
+inst_89:
+// rs1_val==1431655765 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x1, 0x55555555, 0x3, x1, 356, x2)
+
+inst_90:
+// rs1_val==1431655765 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, 0x55555555, 0x5, x1, 360, x2)
+
+inst_91:
+// rs1_val==1431655765 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x55555555, 0xa, x1, 364, x2)
+
+inst_92:
+// rs1_val==1431655765 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0x55555555, 0x6, x1, 368, x2)
+
+inst_93:
+// rs1_val==1431655765 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x55555554, 0x55555555, -0x2, x1, 372, x2)
+
+inst_94:
+// rs1_val==1431655765 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x55555551, 0x55555555, -0x5, x1, 376, x2)
+
+inst_95:
+// rs1_val==1431655765 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x55555555, 0x2, x1, 380, x2)
+
+inst_96:
+// rs1_val==1431655765 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0x55555555, 0x9, x1, 384, x2)
+
+inst_97:
+// rs1_val==1431655765 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x55555555, 0x0, x1, 388, x2)
+
+inst_98:
+// rs1_val==1431655765 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x1, 0x55555555, 0xb, x1, 392, x2)
+
+inst_99:
+// rs1_val==1431655765 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x5, 0x55555555, 0x7, x1, 396, x2)
+
+inst_100:
+// rs1_val==1431655765 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x55555555, 0x55555555, -0x1, x1, 400, x2)
+
+inst_101:
+// rs1_val==1431655765 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x55555554, 0x55555555, -0x4, x1, 404, x2)
+
+inst_102:
+// rs1_val==-1431655766 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, -0x55555556, 0x3, x1, 408, x2)
+
+inst_103:
+// rs1_val==-1431655766 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, -0x55555556, 0x5, x1, 412, x2)
+
+inst_104:
+// rs1_val==-1431655766 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0xa, -0x55555556, 0xa, x1, 416, x2)
+
+inst_105:
+// rs1_val==-1431655766 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, -0x55555556, 0x6, x1, 420, x2)
+
+inst_106:
+// rs1_val==-1431655766 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xaaaaaaaa, -0x55555556, -0x2, x1, 424, x2)
+
+inst_107:
+// rs1_val==-1431655766 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xaaaaaaaa, -0x55555556, -0x5, x1, 428, x2)
+
+inst_108:
+// rs1_val==-1431655766 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, -0x55555556, 0x2, x1, 432, x2)
+
+inst_109:
+// rs1_val==-1431655766 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, -0x55555556, 0x4, x1, 436, x2)
+
+inst_110:
+// rs1_val==-1431655766 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x8, -0x55555556, 0x9, x1, 440, x2)
+
+inst_111:
+// rs1_val==-1431655766 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, -0x55555556, 0x0, x1, 444, x2)
+
+inst_112:
+// rs1_val==-1431655766 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0xa, -0x55555556, 0xb, x1, 448, x2)
+
+inst_113:
+// rs1_val==-1431655766 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x2, -0x55555556, 0x7, x1, 452, x2)
+
+inst_114:
+// rs1_val==-1431655766 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xaaaaaaaa, -0x55555556, -0x1, x1, 456, x2)
+
+inst_115:
+// rs1_val==-1431655766 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xaaaaaaa8, -0x55555556, -0x4, x1, 460, x2)
+
+inst_116:
+// rs1_val==5 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x1, 0x5, 0x3, x1, 464, x2)
+
+inst_117:
+// rs1_val==5 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, 0x5, 0x5, x1, 468, x2)
+
+inst_118:
+// rs1_val==5 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x5, 0xa, x1, 472, x2)
+
+inst_119:
+// rs1_val==5 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0x5, 0x6, x1, 476, x2)
+
+inst_120:
+// rs1_val==5 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x4, 0x5, -0x2, x1, 480, x2)
+
+inst_121:
+// rs1_val==5 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x1, 0x5, -0x5, x1, 484, x2)
+
+inst_122:
+// rs1_val==5 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x5, 0x4, x1, 488, x2)
+
+inst_123:
+// rs1_val==5 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0x5, 0x9, x1, 492, x2)
+
+inst_124:
+// rs1_val==5 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x5, 0x0, x1, 496, x2)
+
+inst_125:
+// rs1_val==5 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x1, 0x5, 0xb, x1, 500, x2)
+
+inst_126:
+// rs1_val==5 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x5, 0x5, 0x7, x1, 504, x2)
+
+inst_127:
+// rs1_val==5 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x5, 0x5, -0x1, x1, 508, x2)
+
+inst_128:
+// rs1_val==5 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x5, -0x4, x1, 512, x2)
+
+inst_129:
+// rs1_val==858993459 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, 0x33333333, 0x3, x1, 516, x2)
+
+inst_130:
+// rs1_val==858993459 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x1, 0x33333333, 0x5, x1, 520, x2)
+
+inst_131:
+// rs1_val==858993459 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x33333333, 0xa, x1, 524, x2)
+
+inst_132:
+// rs1_val==858993459 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, 0x33333333, 0x6, x1, 528, x2)
+
+inst_133:
+// rs1_val==858993459 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x33333332, 0x33333333, -0x2, x1, 532, x2)
+
+inst_134:
+// rs1_val==858993459 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x33333333, 0x33333333, -0x5, x1, 536, x2)
+
+inst_135:
+// rs1_val==858993459 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x33333333, 0x2, x1, 540, x2)
+
+inst_136:
+// rs1_val==858993459 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x33333333, 0x4, x1, 544, x2)
+
+inst_137:
+// rs1_val==858993459 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0x33333333, 0x9, x1, 548, x2)
+
+inst_138:
+// rs1_val==858993459 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x33333333, 0x0, x1, 552, x2)
+
+inst_139:
+// rs1_val==858993459 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x3, 0x33333333, 0xb, x1, 556, x2)
+
+inst_140:
+// rs1_val==858993459 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x3, 0x33333333, 0x7, x1, 560, x2)
+
+inst_141:
+// rs1_val==858993459 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x33333333, 0x33333333, -0x1, x1, 564, x2)
+
+inst_142:
+// rs1_val==858993459 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x33333330, 0x33333333, -0x4, x1, 568, x2)
+
+inst_143:
+// rs1_val==1717986918 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, 0x66666666, 0x3, x1, 572, x2)
+
+inst_144:
+// rs1_val==1717986918 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0x66666666, 0x5, x1, 576, x2)
+
+inst_145:
+// rs1_val==1717986918 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x66666666, 0xa, x1, 580, x2)
+
+inst_146:
+// rs1_val==1717986918 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, 0x66666666, 0x6, x1, 584, x2)
+
+inst_147:
+// rs1_val==1717986918 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x66666666, 0x66666666, -0x2, x1, 588, x2)
+
+inst_148:
+// rs1_val==1717986918 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x66666662, 0x66666666, -0x5, x1, 592, x2)
+
+inst_149:
+// rs1_val==1717986918 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x66666666, 0x2, x1, 596, x2)
+
+inst_150:
+// rs1_val==1717986918 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x66666666, 0x4, x1, 600, x2)
+
+inst_151:
+// rs1_val==1717986918 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x66666666, 0x9, x1, 604, x2)
+
+inst_152:
+// rs1_val==1717986918 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x66666666, 0x0, x1, 608, x2)
+
+inst_153:
+// rs1_val==1717986918 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x2, 0x66666666, 0xb, x1, 612, x2)
+
+inst_154:
+// rs1_val==1717986918 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x6, 0x66666666, 0x7, x1, 616, x2)
+
+inst_155:
+// rs1_val==1717986918 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x66666666, 0x66666666, -0x1, x1, 620, x2)
+
+inst_156:
+// rs1_val==1717986918 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x66666664, 0x66666666, -0x4, x1, 624, x2)
+
+inst_157:
+// rs1_val==-46340 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, -0xb504, 0x3, x1, 628, x2)
+
+inst_158:
+// rs1_val==-46340 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, -0xb504, 0x5, x1, 632, x2)
+
+inst_159:
+// rs1_val==-46340 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x8, -0xb504, 0xa, x1, 636, x2)
+
+inst_160:
+// rs1_val==-46340 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, -0xb504, 0x6, x1, 640, x2)
+
+inst_161:
+// rs1_val==-46340 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xffff4afc, -0xb504, -0x2, x1, 644, x2)
+
+inst_162:
+// rs1_val==-46340 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xffff4af8, -0xb504, -0x5, x1, 648, x2)
+
+inst_163:
+// rs1_val==-46340 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, -0xb504, 0x2, x1, 652, x2)
+
+inst_164:
+// rs1_val==-46340 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, -0xb504, 0x4, x1, 656, x2)
+
+inst_165:
+// rs1_val==-46340 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x8, -0xb504, 0x9, x1, 660, x2)
+
+inst_166:
+// rs1_val==-46340 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x8, -0xb504, 0xb, x1, 664, x2)
+
+inst_167:
+// rs1_val==-46340 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x4, -0xb504, 0x7, x1, 668, x2)
+
+inst_168:
+// rs1_val==-46340 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xffff4afc, -0xb504, -0x1, x1, 672, x2)
+
+inst_169:
+// rs1_val==-46340 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xffff4afc, -0xb504, -0x4, x1, 676, x2)
+
+inst_170:
+// rs1_val==46340 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504, 0x3, x1, 680, x2)
+
+inst_171:
+// rs1_val==46340 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0xb504, 0x5, x1, 684, x2)
+
+inst_172:
+// rs1_val==46340 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504, 0xa, x1, 688, x2)
+
+inst_173:
+// rs1_val==46340 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0xb504, 0x6, x1, 692, x2)
+
+inst_174:
+// rs1_val==46340 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xb504, 0xb504, -0x2, x1, 696, x2)
+
+inst_175:
+// rs1_val==46340 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xb500, 0xb504, -0x5, x1, 700, x2)
+
+inst_176:
+// rs1_val==46340 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504, 0x2, x1, 704, x2)
+
+inst_177:
+// rs1_val==46340 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0xb504, 0x4, x1, 708, x2)
+
+inst_178:
+// rs1_val==46340 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504, 0x9, x1, 712, x2)
+
+inst_179:
+// rs1_val==46340 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504, 0x0, x1, 716, x2)
+
+inst_180:
+// rs1_val==46340 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504, 0xb, x1, 720, x2)
+
+inst_181:
+// rs1_val==46340 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x4, 0xb504, 0x7, x1, 724, x2)
+
+inst_182:
+// rs1_val==46340 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xb504, 0xb504, -0x1, x1, 728, x2)
+
+inst_183:
+// rs1_val==46340 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xb504, 0xb504, -0x4, x1, 732, x2)
+
+inst_184:
+// rs1_val==2 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, 0x3, x1, 736, x2)
+
+inst_185:
+// rs1_val==2 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, 0xa, x1, 740, x2)
+
+inst_186:
+// rs1_val==2 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, 0x6, x1, 744, x2)
+
+inst_187:
+// rs1_val==2 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, -0x2, x1, 748, x2)
+
+inst_188:
+// rs1_val==2 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, -0x5, x1, 752, x2)
+
+inst_189:
+// rs1_val==2 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, 0x2, x1, 756, x2)
+
+inst_190:
+// rs1_val==2 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x2, 0x4, x1, 760, x2)
+
+inst_191:
+// rs1_val==2 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x2, 0x9, x1, 764, x2)
+
+inst_192:
+// rs1_val==2 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x2, 0x0, x1, 768, x2)
+
+inst_193:
+// rs1_val==2 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, 0xb, x1, 772, x2)
+
+inst_194:
+// rs1_val==2 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, 0x7, x1, 776, x2)
+
+inst_195:
+// rs1_val==2 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, -0x1, x1, 780, x2)
+
+inst_196:
+// rs1_val==2 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x2, -0x4, x1, 784, x2)
+
+inst_197:
+// rs1_val==1431655764 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x55555554, 0x3, x1, 788, x2)
+
+inst_198:
+// rs1_val==1431655764 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0x55555554, 0x5, x1, 792, x2)
+
+inst_199:
+// rs1_val==1431655764 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x55555554, 0xa, x1, 796, x2)
+
+inst_200:
+// rs1_val==1431655764 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0x55555554, 0x6, x1, 800, x2)
+
+inst_201:
+// rs1_val==1431655764 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x55555554, 0x55555554, -0x2, x1, 804, x2)
+
+inst_202:
+// rs1_val==1431655764 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x55555550, 0x55555554, -0x5, x1, 808, x2)
+
+inst_203:
+// rs1_val==1431655764 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x55555554, 0x2, x1, 812, x2)
+
+inst_204:
+// rs1_val==1431655764 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x55555554, 0x4, x1, 816, x2)
+
+inst_205:
+// rs1_val==1431655764 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x55555554, 0x9, x1, 820, x2)
+
+inst_206:
+// rs1_val==1431655764 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x55555554, 0x0, x1, 824, x2)
+
+inst_207:
+// rs1_val==1431655764 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x0, 0x55555554, 0xb, x1, 828, x2)
+
+inst_208:
+// rs1_val==1431655764 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x4, 0x55555554, 0x7, x1, 832, x2)
+
+inst_209:
+// rs1_val==1431655764 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x55555554, 0x55555554, -0x1, x1, 836, x2)
+
+inst_210:
+// rs1_val==1431655764 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x55555554, 0x55555554, -0x4, x1, 840, x2)
+
+inst_211:
+// rs1_val==0 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x3, x1, 844, x2)
+
+inst_212:
+// rs1_val==0 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x5, x1, 848, x2)
+
+inst_213:
+// rs1_val==0 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0xa, x1, 852, x2)
+
+inst_214:
+// rs1_val==0 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x6, x1, 856, x2)
+
+inst_215:
+// rs1_val==0 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, -0x2, x1, 860, x2)
+
+inst_216:
+// rs1_val==0 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, -0x5, x1, 864, x2)
+
+inst_217:
+// rs1_val==0 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x2, x1, 868, x2)
+
+inst_218:
+// rs1_val==0 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x9, x1, 872, x2)
+
+inst_219:
+// rs1_val==0 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x0, x1, 876, x2)
+
+inst_220:
+// rs1_val==0 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0xb, x1, 880, x2)
+
+inst_221:
+// rs1_val==0 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x7, x1, 884, x2)
+
+inst_222:
+// rs1_val==0 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, -0x1, x1, 888, x2)
+
+inst_223:
+// rs1_val==0 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, -0x4, x1, 892, x2)
+
+inst_224:
+// rs1_val==4 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, 0x3, x1, 896, x2)
+
+inst_225:
+// rs1_val==4 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, 0x5, x1, 900, x2)
+
+inst_226:
+// rs1_val==4 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, 0x6, x1, 904, x2)
+
+inst_227:
+// rs1_val==4 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, -0x2, x1, 908, x2)
+
+inst_228:
+// rs1_val==4 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, -0x5, x1, 912, x2)
+
+inst_229:
+// rs1_val==4 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, 0x2, x1, 916, x2)
+
+inst_230:
+// rs1_val==4 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, 0x4, x1, 920, x2)
+
+inst_231:
+// rs1_val==4 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, 0x9, x1, 924, x2)
+
+inst_232:
+// rs1_val==4 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, 0x0, x1, 928, x2)
+
+inst_233:
+// rs1_val==4 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, 0xb, x1, 932, x2)
+
+inst_234:
+// rs1_val==4 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, 0x7, x1, 936, x2)
+
+inst_235:
+// rs1_val==4 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, -0x1, x1, 940, x2)
+
+inst_236:
+// rs1_val==4 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, -0x4, x1, 944, x2)
+
+inst_237:
+// rs1_val==858993458 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, 0x33333332, 0x3, x1, 948, x2)
+
+inst_238:
+// rs1_val==858993458 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x33333332, 0x5, x1, 952, x2)
+
+inst_239:
+// rs1_val==858993458 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x33333332, 0xa, x1, 956, x2)
+
+inst_240:
+// rs1_val==858993458 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, 0x33333332, 0x6, x1, 960, x2)
+
+inst_241:
+// rs1_val==858993458 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x33333332, 0x33333332, -0x2, x1, 964, x2)
+
+inst_242:
+// rs1_val==858993458 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x33333332, 0x33333332, -0x5, x1, 968, x2)
+
+inst_243:
+// rs1_val==858993458 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x33333332, 0x2, x1, 972, x2)
+
+inst_244:
+// rs1_val==858993458 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x33333332, 0x4, x1, 976, x2)
+
+inst_245:
+// rs1_val==858993458 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x33333332, 0x9, x1, 980, x2)
+
+inst_246:
+// rs1_val==858993458 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x33333332, 0x0, x1, 984, x2)
+
+inst_247:
+// rs1_val==858993458 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x2, 0x33333332, 0xb, x1, 988, x2)
+
+inst_248:
+// rs1_val==858993458 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x2, 0x33333332, 0x7, x1, 992, x2)
+
+inst_249:
+// rs1_val==858993458 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x33333332, 0x33333332, -0x1, x1, 996, x2)
+
+inst_250:
+// rs1_val==858993458 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x33333330, 0x33333332, -0x4, x1, 1000, x2)
+
+inst_251:
+// rs1_val==1717986917 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x1, 0x66666665, 0x3, x1, 1004, x2)
+
+inst_252:
+// rs1_val==1717986917 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, 0x66666665, 0x5, x1, 1008, x2)
+
+inst_253:
+// rs1_val==1717986917 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x66666665, 0xa, x1, 1012, x2)
+
+inst_254:
+// rs1_val==1717986917 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0x66666665, 0x6, x1, 1016, x2)
+
+inst_255:
+// rs1_val==1717986917 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x66666664, 0x66666665, -0x2, x1, 1020, x2)
+
+inst_256:
+// rs1_val==1717986917 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x66666661, 0x66666665, -0x5, x1, 1024, x2)
+
+inst_257:
+// rs1_val==1717986917 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x66666665, 0x2, x1, 1028, x2)
+
+inst_258:
+// rs1_val==1717986917 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x66666665, 0x4, x1, 1032, x2)
+
+inst_259:
+// rs1_val==1717986917 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0x66666665, 0x9, x1, 1036, x2)
+
+inst_260:
+// rs1_val==1717986917 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x66666665, 0x0, x1, 1040, x2)
+
+inst_261:
+// rs1_val==1717986917 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x1, 0x66666665, 0xb, x1, 1044, x2)
+
+inst_262:
+// rs1_val==1717986917 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x5, 0x66666665, 0x7, x1, 1048, x2)
+
+inst_263:
+// rs1_val==1717986917 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x66666665, 0x66666665, -0x1, x1, 1052, x2)
+
+inst_264:
+// rs1_val==1717986917 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x66666664, 0x66666665, -0x4, x1, 1056, x2)
+
+inst_265:
+// rs1_val==46339 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, 0xb503, 0x3, x1, 1060, x2)
+
+inst_266:
+// rs1_val==46339 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x1, 0xb503, 0x5, x1, 1064, x2)
+
+inst_267:
+// rs1_val==46339 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0xb503, 0xa, x1, 1068, x2)
+
+inst_268:
+// rs1_val==46339 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, 0xb503, 0x6, x1, 1072, x2)
+
+inst_269:
+// rs1_val==46339 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xb502, 0xb503, -0x2, x1, 1076, x2)
+
+inst_270:
+// rs1_val==46339 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xb503, 0xb503, -0x5, x1, 1080, x2)
+
+inst_271:
+// rs1_val==46339 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0xb503, 0x2, x1, 1084, x2)
+
+inst_272:
+// rs1_val==46339 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0xb503, 0x4, x1, 1088, x2)
+
+inst_273:
+// rs1_val==46339 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0xb503, 0x9, x1, 1092, x2)
+
+inst_274:
+// rs1_val==46339 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0xb503, 0x0, x1, 1096, x2)
+
+inst_275:
+// rs1_val==46339 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x3, 0xb503, 0xb, x1, 1100, x2)
+
+inst_276:
+// rs1_val==46339 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x3, 0xb503, 0x7, x1, 1104, x2)
+
+inst_277:
+// rs1_val==46339 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xb503, 0xb503, -0x1, x1, 1108, x2)
+
+inst_278:
+// rs1_val==46339 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xb500, 0xb503, -0x4, x1, 1112, x2)
+
+inst_279:
+// rs1_val==1431655766 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, 0x55555556, 0x3, x1, 1116, x2)
+
+inst_280:
+// rs1_val==1431655766 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0x55555556, 0x5, x1, 1120, x2)
+
+inst_281:
+// rs1_val==1431655766 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x55555556, 0xa, x1, 1124, x2)
+
+inst_282:
+// rs1_val==1431655766 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, 0x55555556, 0x6, x1, 1128, x2)
+
+inst_283:
+// rs1_val==1431655766 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x55555556, 0x55555556, -0x2, x1, 1132, x2)
+
+inst_284:
+// rs1_val==1431655766 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x55555552, 0x55555556, -0x5, x1, 1136, x2)
+
+inst_285:
+// rs1_val==1431655766 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x55555556, 0x2, x1, 1140, x2)
+
+inst_286:
+// rs1_val==1431655766 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x55555556, 0x4, x1, 1144, x2)
+
+inst_287:
+// rs1_val==1431655766 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x55555556, 0x9, x1, 1148, x2)
+
+inst_288:
+// rs1_val==1431655766 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x55555556, 0x0, x1, 1152, x2)
+
+inst_289:
+// rs1_val==1431655766 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x2, 0x55555556, 0xb, x1, 1156, x2)
+
+inst_290:
+// rs1_val==1431655766 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x6, 0x55555556, 0x7, x1, 1160, x2)
+
+inst_291:
+// rs1_val==1431655766 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x55555556, 0x55555556, -0x1, x1, 1164, x2)
+
+inst_292:
+// rs1_val==1431655766 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x55555554, 0x55555556, -0x4, x1, 1168, x2)
+
+inst_293:
+// rs1_val==-1431655765 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, -0x55555555, 0x3, x1, 1172, x2)
+
+inst_294:
+// rs1_val==-1431655765 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x1, -0x55555555, 0x5, x1, 1176, x2)
+
+inst_295:
+// rs1_val==-1431655765 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0xa, -0x55555555, 0xa, x1, 1180, x2)
+
+inst_296:
+// rs1_val==-1431655765 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, -0x55555555, 0x6, x1, 1184, x2)
+
+inst_297:
+// rs1_val==-1431655765 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xaaaaaaaa, -0x55555555, -0x2, x1, 1188, x2)
+
+inst_298:
+// rs1_val==-1431655765 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xaaaaaaab, -0x55555555, -0x5, x1, 1192, x2)
+
+inst_299:
+// rs1_val==-1431655765 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, -0x55555555, 0x2, x1, 1196, x2)
+
+inst_300:
+// rs1_val==-1431655765 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, -0x55555555, 0x4, x1, 1200, x2)
+
+inst_301:
+// rs1_val==-1431655765 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x9, -0x55555555, 0x9, x1, 1204, x2)
+
+inst_302:
+// rs1_val==-1431655765 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, -0x55555555, 0x0, x1, 1208, x2)
+
+inst_303:
+// rs1_val==-1431655765 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0xb, -0x55555555, 0xb, x1, 1212, x2)
+
+inst_304:
+// rs1_val==-1431655765 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x3, -0x55555555, 0x7, x1, 1216, x2)
+
+inst_305:
+// rs1_val==-1431655765 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xaaaaaaab, -0x55555555, -0x1, x1, 1220, x2)
+
+inst_306:
+// rs1_val==-1431655765 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xaaaaaaa8, -0x55555555, -0x4, x1, 1224, x2)
+
+inst_307:
+// rs1_val==6 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, 0x6, 0x3, x1, 1228, x2)
+
+inst_308:
+// rs1_val==6 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0x6, 0x5, x1, 1232, x2)
+
+inst_309:
+// rs1_val==6 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x6, 0xa, x1, 1236, x2)
+
+inst_310:
+// rs1_val==6 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, 0x6, 0x6, x1, 1240, x2)
+
+inst_311:
+// rs1_val==6 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x6, 0x6, -0x2, x1, 1244, x2)
+
+inst_312:
+// rs1_val==6 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x2, 0x6, -0x5, x1, 1248, x2)
+
+inst_313:
+// rs1_val==-46339 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xffff4afd, -0xb503, -0x1, x1, 1252, x2)
+
+inst_314:
+// rs1_val==-46339 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xffff4afc, -0xb503, -0x4, x1, 1256, x2)
+
+inst_315:
+// rs1_val==46341 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x1, 0xb505, 0x3, x1, 1260, x2)
+
+inst_316:
+// rs1_val==46341 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, 0xb505, 0x5, x1, 1264, x2)
+
+inst_317:
+// rs1_val==46341 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0xb505, 0xa, x1, 1268, x2)
+
+inst_318:
+// rs1_val==46341 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0xb505, 0x6, x1, 1272, x2)
+
+inst_319:
+// rs1_val==46341 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xb504, 0xb505, -0x2, x1, 1276, x2)
+
+inst_320:
+// rs1_val==46341 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xb501, 0xb505, -0x5, x1, 1280, x2)
+
+inst_321:
+// rs1_val==46341 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0xb505, 0x2, x1, 1284, x2)
+
+inst_322:
+// rs1_val==46341 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0xb505, 0x4, x1, 1288, x2)
+
+inst_323:
+// rs1_val==46341 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0xb505, 0x9, x1, 1292, x2)
+
+inst_324:
+// rs1_val==46341 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0xb505, 0x0, x1, 1296, x2)
+
+inst_325:
+// rs1_val==46341 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x1, 0xb505, 0xb, x1, 1300, x2)
+
+inst_326:
+// rs1_val==46341 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x5, 0xb505, 0x7, x1, 1304, x2)
+
+inst_327:
+// rs1_val==46341 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xb505, 0xb505, -0x1, x1, 1308, x2)
+
+inst_328:
+// rs1_val==46341 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xb504, 0xb505, -0x4, x1, 1312, x2)
+
+inst_329:
+// rs1_val==6 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x6, 0x2, x1, 1316, x2)
+
+inst_330:
+// rs1_val==6 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x6, 0x4, x1, 1320, x2)
+
+inst_331:
+// rs1_val==6 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x6, 0x9, x1, 1324, x2)
+
+inst_332:
+// rs1_val==6 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x6, 0x0, x1, 1328, x2)
+
+inst_333:
+// rs1_val==6 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x2, 0x6, 0xb, x1, 1332, x2)
+
+inst_334:
+// rs1_val==6 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x6, 0x6, 0x7, x1, 1336, x2)
+
+inst_335:
+// rs1_val==6 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x6, 0x6, -0x1, x1, 1340, x2)
+
+inst_336:
+// rs1_val==6 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x6, -0x4, x1, 1344, x2)
+
+inst_337:
+// rs1_val==858993460 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x33333334, 0x3, x1, 1348, x2)
+
+inst_338:
+// rs1_val==858993460 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0x33333334, 0x5, x1, 1352, x2)
+
+inst_339:
+// rs1_val==858993460 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x33333334, 0xa, x1, 1356, x2)
+
+inst_340:
+// rs1_val==858993460 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0x33333334, 0x6, x1, 1360, x2)
+
+inst_341:
+// rs1_val==858993460 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x33333334, 0x33333334, -0x2, x1, 1364, x2)
+
+inst_342:
+// rs1_val==858993460 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x33333330, 0x33333334, -0x5, x1, 1368, x2)
+
+inst_343:
+// rs1_val==858993460 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x33333334, 0x2, x1, 1372, x2)
+
+inst_344:
+// rs1_val==858993460 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x33333334, 0x4, x1, 1376, x2)
+
+inst_345:
+// rs1_val==858993460 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x33333334, 0x9, x1, 1380, x2)
+
+inst_346:
+// rs1_val==858993460 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x33333334, 0x0, x1, 1384, x2)
+
+inst_347:
+// rs1_val==858993460 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x0, 0x33333334, 0xb, x1, 1388, x2)
+
+inst_348:
+// rs1_val==858993460 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x4, 0x33333334, 0x7, x1, 1392, x2)
+
+inst_349:
+// rs1_val==858993460 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x33333334, 0x33333334, -0x1, x1, 1396, x2)
+
+inst_350:
+// rs1_val==858993460 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x33333334, 0x33333334, -0x4, x1, 1400, x2)
+
+inst_351:
+// rs1_val==1717986919 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, 0x66666667, 0x3, x1, 1404, x2)
+
+inst_352:
+// rs1_val==1717986919 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, 0x66666667, 0x5, x1, 1408, x2)
+
+inst_353:
+// rs1_val==1717986919 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x66666667, 0xa, x1, 1412, x2)
+
+inst_354:
+// rs1_val==1717986919 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, 0x66666667, 0x6, x1, 1416, x2)
+
+inst_355:
+// rs1_val==1717986919 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x66666666, 0x66666667, -0x2, x1, 1420, x2)
+
+inst_356:
+// rs1_val==1717986919 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x66666667, 0x2, x1, 1424, x2)
+
+inst_357:
+// rs1_val==1717986919 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x66666667, 0x4, x1, 1428, x2)
+
+inst_358:
+// rs1_val==1717986919 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0x66666667, 0x9, x1, 1432, x2)
+
+inst_359:
+// rs1_val==1717986919 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x66666667, 0x0, x1, 1436, x2)
+
+inst_360:
+// rs1_val==1717986919 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x3, 0x66666667, 0xb, x1, 1440, x2)
+
+inst_361:
+// rs1_val==1717986919 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x7, 0x66666667, 0x7, x1, 1444, x2)
+
+inst_362:
+// rs1_val==1717986919 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x66666667, 0x66666667, -0x1, x1, 1448, x2)
+
+inst_363:
+// rs1_val==1717986919 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x66666664, 0x66666667, -0x4, x1, 1452, x2)
+
+inst_364:
+// rs1_val==-46339 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x1, -0xb503, 0x3, x1, 1456, x2)
+
+inst_365:
+// rs1_val==-46339 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, -0xb503, 0x5, x1, 1460, x2)
+
+inst_366:
+// rs1_val==-46339 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x8, -0xb503, 0xa, x1, 1464, x2)
+
+inst_367:
+// rs1_val==-46339 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, -0xb503, 0x6, x1, 1468, x2)
+
+inst_368:
+// rs1_val==-46339 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xffff4afc, -0xb503, -0x2, x1, 1472, x2)
+
+inst_369:
+// rs1_val==-46339 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xffff4af9, -0xb503, -0x5, x1, 1476, x2)
+
+inst_370:
+// rs1_val==-46339 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, -0xb503, 0x2, x1, 1480, x2)
+
+inst_371:
+// rs1_val==-46339 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, -0xb503, 0x4, x1, 1484, x2)
+
+inst_372:
+// rs1_val==-46339 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x9, -0xb503, 0x9, x1, 1488, x2)
+
+inst_373:
+// rs1_val==-46339 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, -0xb503, 0x0, x1, 1492, x2)
+
+inst_374:
+// rs1_val==-46339 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x9, -0xb503, 0xb, x1, 1496, x2)
+
+inst_375:
+// rs1_val==-46339 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x5, -0xb503, 0x7, x1, 1500, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 376*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cbeqz-01.S b/riscof/suite/rv32i_m/C/cbeqz-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..9afd02c0d0b816b14ea368e938887550ea521561
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cbeqz-01.S
@@ -0,0 +1,494 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.beqz instruction of the RISC-V C extension for the cbeqz covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cbeqz)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1==x9, rs1_val == (-2**(xlen-1)), rs1_val < 0 and imm_val < 0, rs1_val == -2147483648
+// opcode:c.beqz; op1:x9; op1val:-0x80000000; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x9, -0x80000000, 0x10, 1b, x1, 0)
+
+inst_1:
+// rs1==x10, rs1_val == 0, rs1_val == 0 and imm_val < 0, rs1_val==0
+// opcode:c.beqz; op1:x10; op1val:0x0; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x0, 0xa, 1b, x1, 4)
+
+inst_2:
+// rs1==x13, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647, rs1_val > 0 and imm_val > 0
+// opcode:c.beqz; op1:x13; op1val:0x7fffffff; immval:0x20
+TEST_CBRANCH_OP(c.beqz, x2, x13, 0x7fffffff, 0x20, 3f, x1, 8)
+
+inst_3:
+// rs1==x8, rs1_val == 1, rs1_val > 0 and imm_val < 0
+// opcode:c.beqz; op1:x8; op1val:0x1; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x8, 0x1, 0x12, 1b, x1, 12)
+
+inst_4:
+// rs1==x11, rs1_val < 0 and imm_val > 0, rs1_val == -131073
+// opcode:c.beqz; op1:x11; op1val:-0x20001; immval:0x7e
+TEST_CBRANCH_OP(c.beqz, x2, x11, -0x20001, 0x7e, 3f, x1, 16)
+
+inst_5:
+// rs1==x12, rs1_val == 0 and imm_val > 0,
+// opcode:c.beqz; op1:x12; op1val:0x0; immval:0x20
+TEST_CBRANCH_OP(c.beqz, x2, x12, 0x0, 0x20, 3f, x1, 20)
+
+inst_6:
+// rs1==x15, rs1_val == 2, rs1_val==2
+// opcode:c.beqz; op1:x15; op1val:0x2; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x15, 0x2, 0x6, 3f, x1, 24)
+
+inst_7:
+// rs1==x14, rs1_val == 4, rs1_val==4
+// opcode:c.beqz; op1:x14; op1val:0x4; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x14, 0x4, 0xa, 3f, x1, 28)
+
+inst_8:
+// rs1_val == 8,
+// opcode:c.beqz; op1:x10; op1val:0x8; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x8, 0x12, 1b, x1, 32)
+
+inst_9:
+// rs1_val == 16,
+// opcode:c.beqz; op1:x10; op1val:0x10; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x10, 0xe, 1b, x1, 36)
+
+inst_10:
+// rs1_val == 32,
+// opcode:c.beqz; op1:x10; op1val:0x20; immval:0x40
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x20, 0x40, 3f, x1, 40)
+
+inst_11:
+// rs1_val == 64,
+// opcode:c.beqz; op1:x10; op1val:0x40; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x40, 0xc, 3f, x1, 44)
+
+inst_12:
+// rs1_val == 128,
+// opcode:c.beqz; op1:x10; op1val:0x80; immval:0x14
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x80, 0x14, 1b, x1, 48)
+
+inst_13:
+// rs1_val == 256,
+// opcode:c.beqz; op1:x10; op1val:0x100; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x100, 0xa, 1b, x1, 52)
+
+inst_14:
+// rs1_val == 512,
+// opcode:c.beqz; op1:x10; op1val:0x200; immval:0x7e
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x200, 0x7e, 3f, x1, 56)
+
+inst_15:
+// rs1_val == 1024,
+// opcode:c.beqz; op1:x10; op1val:0x400; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x400, 0x10, 1b, x1, 60)
+
+inst_16:
+// rs1_val == 2048,
+// opcode:c.beqz; op1:x10; op1val:0x800; immval:0xac
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x800, 0xac, 1b, x1, 64)
+
+inst_17:
+// rs1_val == 4096,
+// opcode:c.beqz; op1:x10; op1val:0x1000; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x1000, 0x6, 3f, x1, 68)
+
+inst_18:
+// rs1_val == 8192,
+// opcode:c.beqz; op1:x10; op1val:0x2000; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x2000, 0xe, 3f, x1, 72)
+
+inst_19:
+// rs1_val == 16384,
+// opcode:c.beqz; op1:x10; op1val:0x4000; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x4000, 0x4, 1b, x1, 76)
+
+inst_20:
+// rs1_val == 32768,
+// opcode:c.beqz; op1:x10; op1val:0x8000; immval:0x40
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x8000, 0x40, 3f, x1, 80)
+
+inst_21:
+// rs1_val == 65536,
+// opcode:c.beqz; op1:x10; op1val:0x10000; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x10000, 0x8, 3f, x1, 84)
+
+inst_22:
+// rs1_val == 131072,
+// opcode:c.beqz; op1:x10; op1val:0x20000; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x20000, 0x6, 3f, x1, 88)
+
+inst_23:
+// rs1_val == 262144,
+// opcode:c.beqz; op1:x10; op1val:0x40000; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x40000, 0x4, 1b, x1, 92)
+
+inst_24:
+// rs1_val == 524288,
+// opcode:c.beqz; op1:x10; op1val:0x80000; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x80000, 0xe, 3f, x1, 96)
+
+inst_25:
+// rs1_val == 1048576,
+// opcode:c.beqz; op1:x10; op1val:0x100000; immval:0x22
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x100000, 0x22, 1b, x1, 100)
+
+inst_26:
+// rs1_val == 2097152,
+// opcode:c.beqz; op1:x10; op1val:0x200000; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x200000, 0x6, 3f, x1, 104)
+
+inst_27:
+// rs1_val == 4194304,
+// opcode:c.beqz; op1:x10; op1val:0x400000; immval:0x40
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x400000, 0x40, 3f, x1, 108)
+
+inst_28:
+// rs1_val == 8388608,
+// opcode:c.beqz; op1:x10; op1val:0x800000; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x800000, 0x6, 3f, x1, 112)
+
+inst_29:
+// rs1_val == 16777216,
+// opcode:c.beqz; op1:x10; op1val:0x1000000; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x1000000, 0xa, 3f, x1, 116)
+
+inst_30:
+// rs1_val == 33554432,
+// opcode:c.beqz; op1:x10; op1val:0x2000000; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x2000000, 0xa, 3f, x1, 120)
+
+inst_31:
+// rs1_val == 67108864,
+// opcode:c.beqz; op1:x10; op1val:0x4000000; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x4000000, 0xa, 1b, x1, 124)
+
+inst_32:
+// rs1_val == 134217728,
+// opcode:c.beqz; op1:x10; op1val:0x8000000; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x8000000, 0xa, 1b, x1, 128)
+
+inst_33:
+// rs1_val == 268435456,
+// opcode:c.beqz; op1:x10; op1val:0x10000000; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x10000000, 0xe, 3f, x1, 132)
+
+inst_34:
+// rs1_val == 536870912,
+// opcode:c.beqz; op1:x10; op1val:0x20000000; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x20000000, 0x80, 3f, x1, 136)
+
+inst_35:
+// rs1_val == 1073741824,
+// opcode:c.beqz; op1:x10; op1val:0x40000000; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x40000000, 0xc, 1b, x1, 140)
+
+inst_36:
+// rs1_val == -2,
+// opcode:c.beqz; op1:x10; op1val:-0x2; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x2, 0xe, 3f, x1, 144)
+
+inst_37:
+// rs1_val == -3,
+// opcode:c.beqz; op1:x10; op1val:-0x3; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x3, 0x10, 1b, x1, 148)
+
+inst_38:
+// rs1_val == -5,
+// opcode:c.beqz; op1:x10; op1val:-0x5; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x5, 0x6, 3f, x1, 152)
+
+inst_39:
+// rs1_val == -9,
+// opcode:c.beqz; op1:x10; op1val:-0x9; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x9, 0x10, 3f, x1, 156)
+
+inst_40:
+// rs1_val == -17,
+// opcode:c.beqz; op1:x10; op1val:-0x11; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x11, 0x4, 1b, x1, 160)
+
+inst_41:
+// rs1_val == -33,
+// opcode:c.beqz; op1:x10; op1val:-0x21; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x21, 0x6, 1b, x1, 164)
+
+inst_42:
+// rs1_val == -65,
+// opcode:c.beqz; op1:x10; op1val:-0x41; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x41, 0x6, 3f, x1, 168)
+
+inst_43:
+// rs1_val == -129,
+// opcode:c.beqz; op1:x10; op1val:-0x81; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x81, 0x10, 1b, x1, 172)
+
+inst_44:
+// rs1_val == -257,
+// opcode:c.beqz; op1:x10; op1val:-0x101; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x101, 0xa, 1b, x1, 176)
+
+inst_45:
+// rs1_val == -513,
+// opcode:c.beqz; op1:x10; op1val:-0x201; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x201, 0x6, 3f, x1, 180)
+
+inst_46:
+// rs1_val == -1025,
+// opcode:c.beqz; op1:x10; op1val:-0x401; immval:0x20
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x401, 0x20, 3f, x1, 184)
+
+inst_47:
+// rs1_val == -2049,
+// opcode:c.beqz; op1:x10; op1val:-0x801; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x801, 0xe, 3f, x1, 188)
+
+inst_48:
+// rs1_val == -4097,
+// opcode:c.beqz; op1:x10; op1val:-0x1001; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x1001, 0x10, 3f, x1, 192)
+
+inst_49:
+// rs1_val == -8193,
+// opcode:c.beqz; op1:x10; op1val:-0x2001; immval:0x22
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x2001, 0x22, 1b, x1, 196)
+
+inst_50:
+// rs1_val == -16385,
+// opcode:c.beqz; op1:x10; op1val:-0x4001; immval:0x7e
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x4001, 0x7e, 3f, x1, 200)
+
+inst_51:
+// rs1_val == -32769,
+// opcode:c.beqz; op1:x10; op1val:-0x8001; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x8001, 0x6, 1b, x1, 204)
+
+inst_52:
+// rs1_val == -65537,
+// opcode:c.beqz; op1:x10; op1val:-0x10001; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x10001, 0x80, 3f, x1, 208)
+
+inst_53:
+// rs1_val == -262145,
+// opcode:c.beqz; op1:x10; op1val:-0x40001; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x40001, 0x12, 3f, x1, 212)
+
+inst_54:
+// rs1_val == -524289,
+// opcode:c.beqz; op1:x10; op1val:-0x80001; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x80001, 0x10, 1b, x1, 216)
+
+inst_55:
+// rs1_val == -1048577,
+// opcode:c.beqz; op1:x10; op1val:-0x100001; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x100001, 0x10, 3f, x1, 220)
+
+inst_56:
+// rs1_val == -8388609,
+// opcode:c.beqz; op1:x10; op1val:-0x800001; immval:0xaa
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x800001, 0xaa, 3f, x1, 224)
+
+inst_57:
+// rs1_val == -16777217,
+// opcode:c.beqz; op1:x10; op1val:-0x1000001; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x1000001, 0x10, 3f, x1, 228)
+
+inst_58:
+// rs1_val == -33554433,
+// opcode:c.beqz; op1:x10; op1val:-0x2000001; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x2000001, 0x10, 3f, x1, 232)
+
+inst_59:
+// rs1_val == -67108865,
+// opcode:c.beqz; op1:x10; op1val:-0x4000001; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x4000001, 0xc, 1b, x1, 236)
+
+inst_60:
+// rs1_val == -134217729,
+// opcode:c.beqz; op1:x10; op1val:-0x8000001; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x8000001, 0x8, 1b, x1, 240)
+
+inst_61:
+// rs1_val == -268435457,
+// opcode:c.beqz; op1:x10; op1val:-0x10000001; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x10000001, 0x8, 1b, x1, 244)
+
+inst_62:
+// rs1_val == -536870913,
+// opcode:c.beqz; op1:x10; op1val:-0x20000001; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x20000001, 0x80, 1b, x1, 248)
+
+inst_63:
+// rs1_val == -1073741825,
+// opcode:c.beqz; op1:x10; op1val:-0x40000001; immval:0x20
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x40000001, 0x20, 3f, x1, 252)
+
+inst_64:
+// rs1_val == 1431655765, rs1_val==1431655765
+// opcode:c.beqz; op1:x10; op1val:0x55555555; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x55555555, 0x6, 1b, x1, 256)
+
+inst_65:
+// rs1_val == -1431655766, rs1_val==-1431655766
+// opcode:c.beqz; op1:x10; op1val:-0x55555556; immval:0x22
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x55555556, 0x22, 1b, x1, 260)
+
+inst_66:
+// rs1_val==3,
+// opcode:c.beqz; op1:x10; op1val:0x3; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x3, 0x4, 3f, x1, 264)
+
+inst_67:
+// rs1_val==5,
+// opcode:c.beqz; op1:x10; op1val:0x5; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x5, 0x6, 3f, x1, 268)
+
+inst_68:
+// rs1_val==858993459,
+// opcode:c.beqz; op1:x10; op1val:0x33333333; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x33333333, 0xe, 3f, x1, 272)
+
+inst_69:
+// rs1_val==1717986918,
+// opcode:c.beqz; op1:x10; op1val:0x66666666; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x66666666, 0xa, 1b, x1, 276)
+
+inst_70:
+// rs1_val==46341,
+// opcode:c.beqz; op1:x10; op1val:0xb505; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0xb505, 0x12, 1b, x1, 280)
+
+inst_71:
+// rs1_val==-46340,
+// opcode:c.beqz; op1:x10; op1val:-0xb504; immval:0x22
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0xb504, 0x22, 1b, x1, 284)
+
+inst_72:
+// rs1_val==46340,
+// opcode:c.beqz; op1:x10; op1val:0xb504; immval:0xaa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0xb504, 0xaa, 3f, x1, 288)
+
+inst_73:
+// rs1_val==1431655764,
+// opcode:c.beqz; op1:x10; op1val:0x55555554; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x55555554, 0xc, 1b, x1, 292)
+
+inst_74:
+// rs1_val == -4194305,
+// opcode:c.beqz; op1:x10; op1val:-0x400001; immval:0x42
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x400001, 0x42, 1b, x1, 296)
+
+inst_75:
+// rs1_val==1717986919,
+// opcode:c.beqz; op1:x10; op1val:0x66666667; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x66666667, 0x4, 1b, x1, 300)
+
+inst_76:
+// rs1_val==858993458,
+// opcode:c.beqz; op1:x10; op1val:0x33333332; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x33333332, 0x4, 1b, x1, 304)
+
+inst_77:
+// rs1_val==1717986917,
+// opcode:c.beqz; op1:x10; op1val:0x66666665; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x66666665, 0x80, 1b, x1, 308)
+
+inst_78:
+// rs1_val==46339,
+// opcode:c.beqz; op1:x10; op1val:0xb503; immval:0x7e
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0xb503, 0x7e, 3f, x1, 312)
+
+inst_79:
+// rs1_val==1431655766,
+// opcode:c.beqz; op1:x10; op1val:0x55555556; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x55555556, 0x12, 3f, x1, 316)
+
+inst_80:
+// rs1_val==-1431655765,
+// opcode:c.beqz; op1:x10; op1val:-0x55555555; immval:0xaa
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x55555555, 0xaa, 3f, x1, 320)
+
+inst_81:
+// rs1_val==6,
+// opcode:c.beqz; op1:x10; op1val:0x6; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x6, 0xc, 1b, x1, 324)
+
+inst_82:
+// rs1_val==858993460,
+// opcode:c.beqz; op1:x10; op1val:0x33333334; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x33333334, 0x8, 1b, x1, 328)
+
+inst_83:
+// rs1_val == -2097153,
+// opcode:c.beqz; op1:x10; op1val:-0x200001; immval:0x20
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x200001, 0x20, 3f, x1, 332)
+
+inst_84:
+// rs1_val==-46339,
+// opcode:c.beqz; op1:x10; op1val:-0xb503; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0xb503, 0x12, 3f, x1, 336)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 85*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cbnez-01.S b/riscof/suite/rv32i_m/C/cbnez-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..91b54893f8a99d8ab9d7f6fcb93c1414b19a01a0
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cbnez-01.S
@@ -0,0 +1,494 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.bnez instruction of the RISC-V C extension for the cbnez covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cbnez)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1==x10, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648, rs1_val < 0 and imm_val > 0
+// opcode: c.bnez; op1:x10; op1val:-0x80000000; immval:0x7e
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x80000000, 0x7e, 3f, x1, 0)
+
+inst_1:
+// rs1==x15, rs1_val == 0, rs1_val == 0 and imm_val < 0, rs1_val==0
+// opcode: c.bnez; op1:x15; op1val:0x0; immval:0xac
+TEST_CBRANCH_OP(c.bnez, x2, x15, 0x0, 0xac, 1b, x1, 4)
+
+inst_2:
+// rs1==x11, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647, rs1_val > 0 and imm_val > 0
+// opcode: c.bnez; op1:x11; op1val:0x7fffffff; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x11, 0x7fffffff, 0x80, 3f, x1, 8)
+
+inst_3:
+// rs1==x14, rs1_val == 1,
+// opcode: c.bnez; op1:x14; op1val:0x1; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x14, 0x1, 0xe, 3f, x1, 12)
+
+inst_4:
+// rs1==x12, rs1_val == 0 and imm_val > 0,
+// opcode: c.bnez; op1:x12; op1val:0x0; immval:0xaa
+TEST_CBRANCH_OP(c.bnez, x2, x12, 0x0, 0xaa, 3f, x1, 16)
+
+inst_5:
+// rs1==x9, rs1_val > 0 and imm_val < 0, rs1_val==858993459
+// opcode: c.bnez; op1:x9; op1val:0x33333333; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x9, 0x33333333, 0x8, 1b, x1, 20)
+
+inst_6:
+// rs1==x8, rs1_val < 0 and imm_val < 0, rs1_val == -5
+// opcode: c.bnez; op1:x8; op1val:-0x5; immval:0x22
+TEST_CBRANCH_OP(c.bnez, x2, x8, -0x5, 0x22, 1b, x1, 24)
+
+inst_7:
+// rs1==x13, rs1_val == 2, rs1_val==2
+// opcode: c.bnez; op1:x13; op1val:0x2; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x13, 0x2, 0x10, 3f, x1, 28)
+
+inst_8:
+// rs1_val == 4, rs1_val==4
+// opcode: c.bnez; op1:x10; op1val:0x4; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x4, 0x8, 3f, x1, 32)
+
+inst_9:
+// rs1_val == 8,
+// opcode: c.bnez; op1:x10; op1val:0x8; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x8, 0x12, 1b, x1, 36)
+
+inst_10:
+// rs1_val == 16,
+// opcode: c.bnez; op1:x10; op1val:0x10; immval:0x22
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x10, 0x22, 1b, x1, 40)
+
+inst_11:
+// rs1_val == 32,
+// opcode: c.bnez; op1:x10; op1val:0x20; immval:0x7e
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x20, 0x7e, 3f, x1, 44)
+
+inst_12:
+// rs1_val == 64,
+// opcode: c.bnez; op1:x10; op1val:0x40; immval:0x20
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x40, 0x20, 3f, x1, 48)
+
+inst_13:
+// rs1_val == 128,
+// opcode: c.bnez; op1:x10; op1val:0x80; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x80, 0x8, 1b, x1, 52)
+
+inst_14:
+// rs1_val == 256,
+// opcode: c.bnez; op1:x10; op1val:0x100; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x100, 0x8, 1b, x1, 56)
+
+inst_15:
+// rs1_val == 512,
+// opcode: c.bnez; op1:x10; op1val:0x200; immval:0xac
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x200, 0xac, 1b, x1, 60)
+
+inst_16:
+// rs1_val == 1024,
+// opcode: c.bnez; op1:x10; op1val:0x400; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x400, 0x12, 3f, x1, 64)
+
+inst_17:
+// rs1_val == 2048,
+// opcode: c.bnez; op1:x10; op1val:0x800; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x800, 0x80, 3f, x1, 68)
+
+inst_18:
+// rs1_val == 4096,
+// opcode: c.bnez; op1:x10; op1val:0x1000; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x1000, 0x12, 1b, x1, 72)
+
+inst_19:
+// rs1_val == 8192,
+// opcode: c.bnez; op1:x10; op1val:0x2000; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x2000, 0xa, 3f, x1, 76)
+
+inst_20:
+// rs1_val == 16384,
+// opcode: c.bnez; op1:x10; op1val:0x4000; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x4000, 0x8, 3f, x1, 80)
+
+inst_21:
+// rs1_val == 32768,
+// opcode: c.bnez; op1:x10; op1val:0x8000; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x8000, 0x12, 1b, x1, 84)
+
+inst_22:
+// rs1_val == 65536,
+// opcode: c.bnez; op1:x10; op1val:0x10000; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x10000, 0x8, 1b, x1, 88)
+
+inst_23:
+// rs1_val == 131072,
+// opcode: c.bnez; op1:x10; op1val:0x20000; immval:0x42
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x20000, 0x42, 1b, x1, 92)
+
+inst_24:
+// rs1_val == 262144,
+// opcode: c.bnez; op1:x10; op1val:0x40000; immval:0xac
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x40000, 0xac, 1b, x1, 96)
+
+inst_25:
+// rs1_val == 524288,
+// opcode: c.bnez; op1:x10; op1val:0x80000; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x80000, 0x12, 1b, x1, 100)
+
+inst_26:
+// rs1_val == 1048576,
+// opcode: c.bnez; op1:x10; op1val:0x100000; immval:0x14
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x100000, 0x14, 1b, x1, 104)
+
+inst_27:
+// rs1_val == 2097152,
+// opcode: c.bnez; op1:x10; op1val:0x200000; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x200000, 0x4, 1b, x1, 108)
+
+inst_28:
+// rs1_val == 4194304,
+// opcode: c.bnez; op1:x10; op1val:0x400000; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x400000, 0xe, 3f, x1, 112)
+
+inst_29:
+// rs1_val == 8388608,
+// opcode: c.bnez; op1:x10; op1val:0x800000; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x800000, 0xe, 1b, x1, 116)
+
+inst_30:
+// rs1_val == 16777216,
+// opcode: c.bnez; op1:x10; op1val:0x1000000; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x1000000, 0xe, 3f, x1, 120)
+
+inst_31:
+// rs1_val == 33554432,
+// opcode: c.bnez; op1:x10; op1val:0x2000000; immval:0xac
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x2000000, 0xac, 1b, x1, 124)
+
+inst_32:
+// rs1_val == 67108864,
+// opcode: c.bnez; op1:x10; op1val:0x4000000; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x4000000, 0x6, 1b, x1, 128)
+
+inst_33:
+// rs1_val == 134217728,
+// opcode: c.bnez; op1:x10; op1val:0x8000000; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x8000000, 0xa, 1b, x1, 132)
+
+inst_34:
+// rs1_val == 268435456,
+// opcode: c.bnez; op1:x10; op1val:0x10000000; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x10000000, 0x10, 3f, x1, 136)
+
+inst_35:
+// rs1_val == 536870912,
+// opcode: c.bnez; op1:x10; op1val:0x20000000; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x20000000, 0x8, 1b, x1, 140)
+
+inst_36:
+// rs1_val == 1073741824,
+// opcode: c.bnez; op1:x10; op1val:0x40000000; immval:0xaa
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x40000000, 0xaa, 3f, x1, 144)
+
+inst_37:
+// rs1_val == -2,
+// opcode: c.bnez; op1:x10; op1val:-0x2; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x2, 0x4, 1b, x1, 148)
+
+inst_38:
+// rs1_val == -3,
+// opcode: c.bnez; op1:x10; op1val:-0x3; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x3, 0x12, 3f, x1, 152)
+
+inst_39:
+// rs1_val == -9,
+// opcode: c.bnez; op1:x10; op1val:-0x9; immval:0x22
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x9, 0x22, 1b, x1, 156)
+
+inst_40:
+// rs1_val == -17,
+// opcode: c.bnez; op1:x10; op1val:-0x11; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x11, 0x6, 3f, x1, 160)
+
+inst_41:
+// rs1_val == -33,
+// opcode: c.bnez; op1:x10; op1val:-0x21; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x21, 0x80, 1b, x1, 164)
+
+inst_42:
+// rs1_val == -65,
+// opcode: c.bnez; op1:x10; op1val:-0x41; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x41, 0x6, 1b, x1, 168)
+
+inst_43:
+// rs1_val == -129,
+// opcode: c.bnez; op1:x10; op1val:-0x81; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x81, 0x8, 1b, x1, 172)
+
+inst_44:
+// rs1_val == -257,
+// opcode: c.bnez; op1:x10; op1val:-0x101; immval:0x14
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x101, 0x14, 1b, x1, 176)
+
+inst_45:
+// rs1_val == -513,
+// opcode: c.bnez; op1:x10; op1val:-0x201; immval:0x82
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x201, 0x82, 1b, x1, 180)
+
+inst_46:
+// rs1_val == -1025,
+// opcode: c.bnez; op1:x10; op1val:-0x401; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x401, 0x12, 3f, x1, 184)
+
+inst_47:
+// rs1_val == -2049,
+// opcode: c.bnez; op1:x10; op1val:-0x801; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x801, 0xa, 3f, x1, 188)
+
+inst_48:
+// rs1_val == -4097,
+// opcode: c.bnez; op1:x10; op1val:-0x1001; immval:0xc
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x1001, 0xc, 1b, x1, 192)
+
+inst_49:
+// rs1_val == -8193,
+// opcode: c.bnez; op1:x10; op1val:-0x2001; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x2001, 0xe, 1b, x1, 196)
+
+inst_50:
+// rs1_val == -16385,
+// opcode: c.bnez; op1:x10; op1val:-0x4001; immval:0x22
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x4001, 0x22, 1b, x1, 200)
+
+inst_51:
+// rs1_val == -32769,
+// opcode: c.bnez; op1:x10; op1val:-0x8001; immval:0xc
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x8001, 0xc, 3f, x1, 204)
+
+inst_52:
+// rs1_val == -65537,
+// opcode: c.bnez; op1:x10; op1val:-0x10001; immval:0x14
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x10001, 0x14, 1b, x1, 208)
+
+inst_53:
+// rs1_val == -131073,
+// opcode: c.bnez; op1:x10; op1val:-0x20001; immval:0x42
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x20001, 0x42, 1b, x1, 212)
+
+inst_54:
+// rs1_val == -262145,
+// opcode: c.bnez; op1:x10; op1val:-0x40001; immval:0x40
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x40001, 0x40, 3f, x1, 216)
+
+inst_55:
+// rs1_val == -524289,
+// opcode: c.bnez; op1:x10; op1val:-0x80001; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x80001, 0x8, 3f, x1, 220)
+
+inst_56:
+// rs1_val == -8388609,
+// opcode: c.bnez; op1:x10; op1val:-0x800001; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x800001, 0x80, 1b, x1, 224)
+
+inst_57:
+// rs1_val == -16777217,
+// opcode: c.bnez; op1:x10; op1val:-0x1000001; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x1000001, 0x4, 3f, x1, 228)
+
+inst_58:
+// rs1_val == -33554433,
+// opcode: c.bnez; op1:x10; op1val:-0x2000001; immval:0x14
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x2000001, 0x14, 1b, x1, 232)
+
+inst_59:
+// rs1_val == -67108865,
+// opcode: c.bnez; op1:x10; op1val:-0x4000001; immval:0x7e
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x4000001, 0x7e, 3f, x1, 236)
+
+inst_60:
+// rs1_val == -134217729,
+// opcode: c.bnez; op1:x10; op1val:-0x8000001; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x8000001, 0x80, 3f, x1, 240)
+
+inst_61:
+// rs1_val == -268435457,
+// opcode: c.bnez; op1:x10; op1val:-0x10000001; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x10000001, 0x12, 1b, x1, 244)
+
+inst_62:
+// rs1_val == -536870913,
+// opcode: c.bnez; op1:x10; op1val:-0x20000001; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x20000001, 0xe, 1b, x1, 248)
+
+inst_63:
+// rs1_val == -1073741825,
+// opcode: c.bnez; op1:x10; op1val:-0x40000001; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x40000001, 0xe, 1b, x1, 252)
+
+inst_64:
+// rs1_val == 1431655765, rs1_val==1431655765
+// opcode: c.bnez; op1:x10; op1val:0x55555555; immval:0xc
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x55555555, 0xc, 1b, x1, 256)
+
+inst_65:
+// rs1_val == -1431655766, rs1_val==-1431655766
+// opcode: c.bnez; op1:x10; op1val:-0x55555556; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x55555556, 0x80, 3f, x1, 260)
+
+inst_66:
+// rs1_val==3,
+// opcode: c.bnez; op1:x10; op1val:0x3; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x3, 0x10, 1b, x1, 264)
+
+inst_67:
+// rs1_val==5,
+// opcode: c.bnez; op1:x10; op1val:0x5; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x5, 0x80, 1b, x1, 268)
+
+inst_68:
+// rs1_val==1717986918,
+// opcode: c.bnez; op1:x10; op1val:0x66666666; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x66666666, 0x12, 3f, x1, 272)
+
+inst_69:
+// rs1_val==-46340,
+// opcode: c.bnez; op1:x10; op1val:-0xb504; immval:0x7e
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0xb504, 0x7e, 3f, x1, 276)
+
+inst_70:
+// rs1_val==46341,
+// opcode: c.bnez; op1:x10; op1val:0xb505; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0xb505, 0x10, 1b, x1, 280)
+
+inst_71:
+// rs1_val==-46339,
+// opcode: c.bnez; op1:x10; op1val:-0xb503; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0xb503, 0xe, 1b, x1, 284)
+
+inst_72:
+// rs1_val==46340,
+// opcode: c.bnez; op1:x10; op1val:0xb504; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0xb504, 0x80, 3f, x1, 288)
+
+inst_73:
+// rs1_val==1431655764,
+// opcode: c.bnez; op1:x10; op1val:0x55555554; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x55555554, 0x4, 3f, x1, 292)
+
+inst_74:
+// rs1_val == -1048577,
+// opcode: c.bnez; op1:x10; op1val:-0x100001; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x100001, 0x12, 1b, x1, 296)
+
+inst_75:
+// rs1_val==1717986919,
+// opcode: c.bnez; op1:x10; op1val:0x66666667; immval:0x20
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x66666667, 0x20, 3f, x1, 300)
+
+inst_76:
+// rs1_val==858993458,
+// opcode: c.bnez; op1:x10; op1val:0x33333332; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x33333332, 0x10, 1b, x1, 304)
+
+inst_77:
+// rs1_val==1717986917,
+// opcode: c.bnez; op1:x10; op1val:0x66666665; immval:0x40
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x66666665, 0x40, 3f, x1, 308)
+
+inst_78:
+// rs1_val==46339,
+// opcode: c.bnez; op1:x10; op1val:0xb503; immval:0x42
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0xb503, 0x42, 1b, x1, 312)
+
+inst_79:
+// rs1_val==1431655766,
+// opcode: c.bnez; op1:x10; op1val:0x55555556; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x55555556, 0x4, 3f, x1, 316)
+
+inst_80:
+// rs1_val==-1431655765,
+// opcode: c.bnez; op1:x10; op1val:-0x55555555; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x55555555, 0xe, 1b, x1, 320)
+
+inst_81:
+// rs1_val==6,
+// opcode: c.bnez; op1:x10; op1val:0x6; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x6, 0x80, 1b, x1, 324)
+
+inst_82:
+// rs1_val==858993460,
+// opcode: c.bnez; op1:x10; op1val:0x33333334; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x33333334, 0xe, 1b, x1, 328)
+
+inst_83:
+// rs1_val == -2097153,
+// opcode: c.bnez; op1:x10; op1val:-0x200001; immval:0xac
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x200001, 0xac, 1b, x1, 332)
+
+inst_84:
+// rs1_val == -4194305,
+// opcode: c.bnez; op1:x10; op1val:-0x400001; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x400001, 0x12, 1b, x1, 336)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 85*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cebreak-01.S b/riscof/suite/rv32i_m/C/cebreak-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..1311edd8a2539a9e9a279b75fdc9b47dc9fca08f
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cebreak-01.S
@@ -0,0 +1,70 @@
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.ebreak instruction of the RISC-V C extension.
+//
+
+
+#include "model_test.h"
+#include "arch_test.h"
+
+RVTEST_ISA("RV32IC")
+
+# Test code region
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*.C*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",cebreak)
+
+ # ---------------------------------------------------------------------------------------------
+
+ la x1, test_A_res
+
+ li x2, 0x11111111
+ c.ebreak
+ .align 2
+ .option push
+ .option norvc
+ nop
+ .option pop
+ sw x0, 0(x1)
+ sw x2, 4(x1)
+
+ RVMODEL_IO_WRITE_STR(x30, "# Test part A - test EBREAK\n");
+
+ RVMODEL_IO_WRITE_STR(x30, "# Test End\n")
+
+#endif
+
+ # ---------------------------------------------------------------------------------------------
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+# Input data section.
+ .data
+ .align 4
+RVTEST_DATA_END
+
+# Output data section.
+RVMODEL_DATA_BEGIN
+
+test_A_res:
+ .fill 2, 4, 0xdeadbeef
+
+mtrap_sigptr:
+ .fill 4, 4, 0xdeadbeef
+
+#ifdef rvtest_gpr_save
+gpr_save:
+ .fill 32*(XLEN/32), 4, 0xdeadbeef
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cj-01.S b/riscof/suite/rv32i_m/C/cj-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..7c96b5e0ca6ff52ada6b0918f043438233de4506
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cj-01.S
@@ -0,0 +1,159 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.j instruction of the RISC-V C extension for the cj covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cj)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// imm_val > 0, imm_val == 1024
+// opcode:c.j; immval:0x400
+TEST_CJ_OP(c.j, x2, 0x400, 3f, x1, 0)
+
+inst_1:
+// imm_val < 0,
+// opcode:c.j; immval:0x8
+TEST_CJ_OP(c.j, x2, 0x8, 1b, x1, 4)
+
+inst_2:
+// imm_val == 16,
+// opcode:c.j; immval:0x10
+TEST_CJ_OP(c.j, x2, 0x10, 3f, x1, 8)
+
+inst_3:
+// imm_val == 32,
+// opcode:c.j; immval:0x20
+TEST_CJ_OP(c.j, x2, 0x20, 3f, x1, 12)
+
+inst_4:
+// imm_val == 64,
+// opcode:c.j; immval:0x40
+TEST_CJ_OP(c.j, x2, 0x40, 3f, x1, 16)
+
+inst_5:
+// imm_val == 128,
+// opcode:c.j; immval:0x80
+TEST_CJ_OP(c.j, x2, 0x80, 3f, x1, 20)
+
+inst_6:
+// imm_val == 256,
+// opcode:c.j; immval:0x100
+TEST_CJ_OP(c.j, x2, 0x100, 3f, x1, 24)
+
+inst_7:
+// imm_val == 512,
+// opcode:c.j; immval:0x200
+TEST_CJ_OP(c.j, x2, 0x200, 3f, x1, 28)
+
+inst_8:
+// imm_val == -10,
+// opcode:c.j; immval:0xa
+TEST_CJ_OP(c.j, x2, 0xa, 1b, x1, 32)
+
+inst_9:
+// imm_val == -18,
+// opcode:c.j; immval:0x12
+TEST_CJ_OP(c.j, x2, 0x12, 1b, x1, 36)
+
+inst_10:
+// imm_val == -34,
+// opcode:c.j; immval:0x22
+TEST_CJ_OP(c.j, x2, 0x22, 1b, x1, 40)
+
+inst_11:
+// imm_val == -1026,
+// opcode:c.j; immval:0x402
+TEST_CJ_OP(c.j, x2, 0x402, 1b, x1, 44)
+
+inst_12:
+// imm_val == -1366,
+// opcode:c.j; immval:0x556
+TEST_CJ_OP(c.j, x2, 0x556, 1b, x1, 48)
+
+inst_13:
+// imm_val == 1364,
+// opcode:c.j; immval:0x554
+TEST_CJ_OP(c.j, x2, 0x554, 3f, x1, 52)
+
+inst_14:
+// imm_val == -66,
+// opcode:c.j; immval:0x42
+TEST_CJ_OP(c.j, x2, 0x42, 1b, x1, 56)
+
+inst_15:
+// imm_val == -130,
+// opcode:c.j; immval:0x82
+TEST_CJ_OP(c.j, x2, 0x82, 1b, x1, 60)
+
+inst_16:
+// imm_val == -258,
+// opcode:c.j; immval:0x102
+TEST_CJ_OP(c.j, x2, 0x102, 1b, x1, 64)
+
+inst_17:
+// imm_val == -514,
+// opcode:c.j; immval:0x202
+TEST_CJ_OP(c.j, x2, 0x202, 1b, x1, 68)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 18*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cjal-01.S b/riscof/suite/rv32i_m/C/cjal-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..a64f917611c60c9899896c7d51c685c696662132
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cjal-01.S
@@ -0,0 +1,159 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.jal instruction of the RISC-V C extension for the cjal covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*RV32.*I.*C.*);def TEST_CASE_1=True;",cjal)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// imm_val > 0,
+// opcode:c.jal; immval:0x4
+TEST_CJAL_OP(c.jal, x3, 0x4, 3f, x2, 0)
+
+inst_1:
+// imm_val < 0, imm_val == -10
+// opcode:c.jal; immval:0xa
+TEST_CJAL_OP(c.jal, x3, 0xa, 1b, x2, 4)
+
+inst_2:
+// imm_val == 16,
+// opcode:c.jal; immval:0x10
+TEST_CJAL_OP(c.jal, x3, 0x10, 3f, x2, 8)
+
+inst_3:
+// imm_val == 32,
+// opcode:c.jal; immval:0x20
+TEST_CJAL_OP(c.jal, x3, 0x20, 3f, x2, 12)
+
+inst_4:
+// imm_val == 64,
+// opcode:c.jal; immval:0x40
+TEST_CJAL_OP(c.jal, x3, 0x40, 3f, x2, 16)
+
+inst_5:
+// imm_val == 128,
+// opcode:c.jal; immval:0x80
+TEST_CJAL_OP(c.jal, x3, 0x80, 3f, x2, 20)
+
+inst_6:
+// imm_val == 256,
+// opcode:c.jal; immval:0x100
+TEST_CJAL_OP(c.jal, x3, 0x100, 3f, x2, 24)
+
+inst_7:
+// imm_val == 512,
+// opcode:c.jal; immval:0x200
+TEST_CJAL_OP(c.jal, x3, 0x200, 3f, x2, 28)
+
+inst_8:
+// imm_val == 1024,
+// opcode:c.jal; immval:0x400
+TEST_CJAL_OP(c.jal, x3, 0x400, 3f, x2, 32)
+
+inst_9:
+// imm_val == -18,
+// opcode:c.jal; immval:0x12
+TEST_CJAL_OP(c.jal, x3, 0x12, 1b, x2, 36)
+
+inst_10:
+// imm_val == -34,
+// opcode:c.jal; immval:0x22
+TEST_CJAL_OP(c.jal, x3, 0x22, 1b, x2, 40)
+
+inst_11:
+// imm_val == -1026,
+// opcode:c.jal; immval:0x402
+TEST_CJAL_OP(c.jal, x3, 0x402, 1b, x2, 44)
+
+inst_12:
+// imm_val == -1366,
+// opcode:c.jal; immval:0x556
+TEST_CJAL_OP(c.jal, x3, 0x556, 1b, x2, 48)
+
+inst_13:
+// imm_val == 1364,
+// opcode:c.jal; immval:0x554
+TEST_CJAL_OP(c.jal, x3, 0x554, 3f, x2, 52)
+
+inst_14:
+// imm_val == -66,
+// opcode:c.jal; immval:0x42
+TEST_CJAL_OP(c.jal, x3, 0x42, 1b, x2, 56)
+
+inst_15:
+// imm_val == -130,
+// opcode:c.jal; immval:0x82
+TEST_CJAL_OP(c.jal, x3, 0x82, 1b, x2, 60)
+
+inst_16:
+// imm_val == -258,
+// opcode:c.jal; immval:0x102
+TEST_CJAL_OP(c.jal, x3, 0x102, 1b, x2, 64)
+
+inst_17:
+// imm_val == -514,
+// opcode:c.jal; immval:0x202
+TEST_CJAL_OP(c.jal, x3, 0x202, 1b, x2, 68)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 18*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cjalr-01.S b/riscof/suite/rv32i_m/C/cjalr-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..833163809ab0d8b6a2d036122256e78e2df787f6
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cjalr-01.S
@@ -0,0 +1,229 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.jalr instruction of the RISC-V C extension for the cjalr covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cjalr)
+
+RVTEST_SIGBASE( x10,signature_x10_1)
+
+inst_0:
+// rs1==x22,
+// opcode:c.jalr; op1:x22
+TEST_CJALR_OP(x11, x22, x10, 0)
+
+inst_1:
+// rs1==x30,
+// opcode:c.jalr; op1:x30
+TEST_CJALR_OP(x11, x30, x10, 4)
+
+inst_2:
+// rs1==x8,
+// opcode:c.jalr; op1:x8
+TEST_CJALR_OP(x11, x8, x10, 8)
+
+inst_3:
+// rs1==x15,
+// opcode:c.jalr; op1:x15
+TEST_CJALR_OP(x11, x15, x10, 12)
+
+inst_4:
+// rs1==x17,
+// opcode:c.jalr; op1:x17
+TEST_CJALR_OP(x11, x17, x10, 16)
+
+inst_5:
+// rs1==x9,
+// opcode:c.jalr; op1:x9
+TEST_CJALR_OP(x11, x9, x10, 20)
+
+inst_6:
+// rs1==x4,
+// opcode:c.jalr; op1:x4
+TEST_CJALR_OP(x11, x4, x10, 24)
+
+inst_7:
+// rs1==x5,
+// opcode:c.jalr; op1:x5
+TEST_CJALR_OP(x11, x5, x10, 28)
+
+inst_8:
+// rs1==x1,
+// opcode:c.jalr; op1:x1
+TEST_CJALR_OP(x11, x1, x10, 32)
+
+inst_9:
+// rs1==x28,
+// opcode:c.jalr; op1:x28
+TEST_CJALR_OP(x11, x28, x10, 36)
+
+inst_10:
+// rs1==x31,
+// opcode:c.jalr; op1:x31
+TEST_CJALR_OP(x11, x31, x10, 40)
+
+inst_11:
+// rs1==x18,
+// opcode:c.jalr; op1:x18
+TEST_CJALR_OP(x11, x18, x10, 44)
+
+inst_12:
+// rs1==x19,
+// opcode:c.jalr; op1:x19
+TEST_CJALR_OP(x11, x19, x10, 48)
+
+inst_13:
+// rs1==x7,
+// opcode:c.jalr; op1:x7
+TEST_CJALR_OP(x11, x7, x10, 52)
+
+inst_14:
+// rs1==x21,
+// opcode:c.jalr; op1:x21
+TEST_CJALR_OP(x11, x21, x10, 56)
+
+inst_15:
+// rs1==x13,
+// opcode:c.jalr; op1:x13
+TEST_CJALR_OP(x11, x13, x10, 60)
+
+inst_16:
+// rs1==x29,
+// opcode:c.jalr; op1:x29
+TEST_CJALR_OP(x11, x29, x10, 64)
+
+inst_17:
+// rs1==x12,
+// opcode:c.jalr; op1:x12
+TEST_CJALR_OP(x11, x12, x10, 68)
+
+inst_18:
+// rs1==x6,
+// opcode:c.jalr; op1:x6
+TEST_CJALR_OP(x11, x6, x10, 72)
+
+inst_19:
+// rs1==x20,
+// opcode:c.jalr; op1:x20
+TEST_CJALR_OP(x11, x20, x10, 76)
+
+inst_20:
+// rs1==x25,
+// opcode:c.jalr; op1:x25
+TEST_CJALR_OP(x11, x25, x10, 80)
+
+inst_21:
+// rs1==x26,
+// opcode:c.jalr; op1:x26
+TEST_CJALR_OP(x11, x26, x10, 84)
+
+inst_22:
+// rs1==x24,
+// opcode:c.jalr; op1:x24
+TEST_CJALR_OP(x11, x24, x10, 88)
+
+inst_23:
+// rs1==x14,
+// opcode:c.jalr; op1:x14
+TEST_CJALR_OP(x11, x14, x10, 92)
+
+inst_24:
+// rs1==x3,
+// opcode:c.jalr; op1:x3
+TEST_CJALR_OP(x11, x3, x10, 96)
+
+inst_25:
+// rs1==x27,
+// opcode:c.jalr; op1:x27
+TEST_CJALR_OP(x11, x27, x10, 100)
+
+inst_26:
+// rs1==x2,
+// opcode:c.jalr; op1:x2
+TEST_CJALR_OP(x11, x2, x10, 104)
+
+inst_27:
+// rs1==x23,
+// opcode:c.jalr; op1:x23
+TEST_CJALR_OP(x3, x23, x10, 108)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_28:
+// rs1==x11,
+// opcode:c.jalr; op1:x11
+TEST_CJALR_OP(x3, x11, x2, 0)
+
+inst_29:
+// rs1==x16,
+// opcode:c.jalr; op1:x16
+TEST_CJALR_OP(x3, x16, x2, 4)
+
+inst_30:
+// rs1==x10,
+// opcode:c.jalr; op1:x10
+TEST_CJALR_OP(x3, x10, x2, 8)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x10_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x10_1:
+ .fill 28*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 3*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cjr-01.S b/riscof/suite/rv32i_m/C/cjr-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..355e8c7a3bcbb6b5f710f5283387387e4b3b1d69
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cjr-01.S
@@ -0,0 +1,229 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.jr instruction of the RISC-V C extension for the cjr covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cjr)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rs1==x21,
+// opcode: c.jr; op1:x21
+TEST_CJR_OP(x6, x21, x2, 0)
+
+inst_1:
+// rs1==x30,
+// opcode: c.jr; op1:x30
+TEST_CJR_OP(x6, x30, x2, 4)
+
+inst_2:
+// rs1==x20,
+// opcode: c.jr; op1:x20
+TEST_CJR_OP(x6, x20, x2, 8)
+
+inst_3:
+// rs1==x11,
+// opcode: c.jr; op1:x11
+TEST_CJR_OP(x6, x11, x2, 12)
+
+inst_4:
+// rs1==x19,
+// opcode: c.jr; op1:x19
+TEST_CJR_OP(x6, x19, x2, 16)
+
+inst_5:
+// rs1==x27,
+// opcode: c.jr; op1:x27
+TEST_CJR_OP(x6, x27, x2, 20)
+
+inst_6:
+// rs1==x1,
+// opcode: c.jr; op1:x1
+TEST_CJR_OP(x6, x1, x2, 24)
+
+inst_7:
+// rs1==x9,
+// opcode: c.jr; op1:x9
+TEST_CJR_OP(x6, x9, x2, 28)
+
+inst_8:
+// rs1==x22,
+// opcode: c.jr; op1:x22
+TEST_CJR_OP(x6, x22, x2, 32)
+
+inst_9:
+// rs1==x3,
+// opcode: c.jr; op1:x3
+TEST_CJR_OP(x6, x3, x2, 36)
+
+inst_10:
+// rs1==x5,
+// opcode: c.jr; op1:x5
+TEST_CJR_OP(x6, x5, x2, 40)
+
+inst_11:
+// rs1==x18,
+// opcode: c.jr; op1:x18
+TEST_CJR_OP(x6, x18, x2, 44)
+
+inst_12:
+// rs1==x24,
+// opcode: c.jr; op1:x24
+TEST_CJR_OP(x6, x24, x2, 48)
+
+inst_13:
+// rs1==x25,
+// opcode: c.jr; op1:x25
+TEST_CJR_OP(x6, x25, x2, 52)
+
+inst_14:
+// rs1==x8,
+// opcode: c.jr; op1:x8
+TEST_CJR_OP(x6, x8, x2, 56)
+
+inst_15:
+// rs1==x28,
+// opcode: c.jr; op1:x28
+TEST_CJR_OP(x6, x28, x2, 60)
+
+inst_16:
+// rs1==x14,
+// opcode: c.jr; op1:x14
+TEST_CJR_OP(x6, x14, x2, 64)
+
+inst_17:
+// rs1==x4,
+// opcode: c.jr; op1:x4
+TEST_CJR_OP(x6, x4, x2, 68)
+
+inst_18:
+// rs1==x15,
+// opcode: c.jr; op1:x15
+TEST_CJR_OP(x6, x15, x2, 72)
+
+inst_19:
+// rs1==x12,
+// opcode: c.jr; op1:x12
+TEST_CJR_OP(x6, x12, x2, 76)
+
+inst_20:
+// rs1==x29,
+// opcode: c.jr; op1:x29
+TEST_CJR_OP(x6, x29, x2, 80)
+
+inst_21:
+// rs1==x23,
+// opcode: c.jr; op1:x23
+TEST_CJR_OP(x6, x23, x2, 84)
+
+inst_22:
+// rs1==x31,
+// opcode: c.jr; op1:x31
+TEST_CJR_OP(x6, x31, x2, 88)
+
+inst_23:
+// rs1==x26,
+// opcode: c.jr; op1:x26
+TEST_CJR_OP(x6, x26, x2, 92)
+
+inst_24:
+// rs1==x7,
+// opcode: c.jr; op1:x7
+TEST_CJR_OP(x6, x7, x2, 96)
+
+inst_25:
+// rs1==x13,
+// opcode: c.jr; op1:x13
+TEST_CJR_OP(x6, x13, x2, 100)
+
+inst_26:
+// rs1==x17,
+// opcode: c.jr; op1:x17
+TEST_CJR_OP(x3, x17, x2, 104)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_27:
+// rs1==x2,
+// opcode: c.jr; op1:x2
+TEST_CJR_OP(x3, x2, x1, 0)
+
+inst_28:
+// rs1==x6,
+// opcode: c.jr; op1:x6
+TEST_CJR_OP(x3, x6, x1, 4)
+
+inst_29:
+// rs1==x16,
+// opcode: c.jr; op1:x16
+TEST_CJR_OP(x3, x16, x1, 8)
+
+inst_30:
+// rs1==x10,
+// opcode: c.jr; op1:x10
+TEST_CJR_OP(x3, x10, x1, 12)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 27*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 4*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cli-01.S b/riscof/suite/rv32i_m/C/cli-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..6fe34c5c93ed473562da5b25114cc682bcc5de89
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cli-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.li instruction of the RISC-V C extension for the cli covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cli)
+
+RVTEST_SIGBASE( x4,signature_x4_1)
+
+inst_0:
+// rd==x10, imm_val == (-2**(6-1)), imm_val == -32
+// opcode:c.li; dest:x10; immval:-0x20
+TEST_CASE(x19, x10, -0x20, x4, 0, c.li x10, -0x20;)
+
+inst_1:
+// rd==x18, imm_val == 0,
+// opcode:c.li; dest:x18; immval:0x0
+TEST_CASE(x19, x18, 0x0, x4, 4, c.li x18, 0x0;)
+
+inst_2:
+// rd==x16, imm_val == (2**(6-1)-1), imm_val == 31
+// opcode:c.li; dest:x16; immval:0x1f
+TEST_CASE(x19, x16, 0x1f, x4, 8, c.li x16, 0x1f;)
+
+inst_3:
+// rd==x29, imm_val == 1,
+// opcode:c.li; dest:x29; immval:0x1
+TEST_CASE(x19, x29, 0x1, x4, 12, c.li x29, 0x1;)
+
+inst_4:
+// rd==x15, imm_val == 2,
+// opcode:c.li; dest:x15; immval:0x2
+TEST_CASE(x19, x15, 0x2, x4, 16, c.li x15, 0x2;)
+
+inst_5:
+// rd==x2, imm_val == 4,
+// opcode:c.li; dest:x2; immval:0x4
+TEST_CASE(x19, x2, 0x4, x4, 20, c.li x2, 0x4;)
+
+inst_6:
+// rd==x14, imm_val == 8,
+// opcode:c.li; dest:x14; immval:0x8
+TEST_CASE(x19, x14, 0x8, x4, 24, c.li x14, 0x8;)
+
+inst_7:
+// rd==x27, imm_val == 16,
+// opcode:c.li; dest:x27; immval:0x10
+TEST_CASE(x19, x27, 0x10, x4, 28, c.li x27, 0x10;)
+
+inst_8:
+// rd==x8, imm_val == -22,
+// opcode:c.li; dest:x8; immval:-0x16
+TEST_CASE(x19, x8, -0x16, x4, 32, c.li x8, -0x16;)
+
+inst_9:
+// rd==x13, imm_val == -2,
+// opcode:c.li; dest:x13; immval:-0x2
+TEST_CASE(x19, x13, -0x2, x4, 36, c.li x13, -0x2;)
+
+inst_10:
+// rd==x30, imm_val == -3,
+// opcode:c.li; dest:x30; immval:-0x3
+TEST_CASE(x19, x30, -0x3, x4, 40, c.li x30, -0x3;)
+
+inst_11:
+// rd==x11, imm_val == -5,
+// opcode:c.li; dest:x11; immval:-0x5
+TEST_CASE(x19, x11, -0x5, x4, 44, c.li x11, -0x5;)
+
+inst_12:
+// rd==x6, imm_val == -9,
+// opcode:c.li; dest:x6; immval:-0x9
+TEST_CASE(x19, x6, -0x9, x4, 48, c.li x6, -0x9;)
+
+inst_13:
+// rd==x26, imm_val == -17,
+// opcode:c.li; dest:x26; immval:-0x11
+TEST_CASE(x19, x26, -0x11, x4, 52, c.li x26, -0x11;)
+
+inst_14:
+// rd==x9, imm_val == 21,
+// opcode:c.li; dest:x9; immval:0x15
+TEST_CASE(x19, x9, 0x15, x4, 56, c.li x9, 0x15;)
+
+inst_15:
+// rd==x1,
+// opcode:c.li; dest:x1; immval:0x0
+TEST_CASE(x19, x1, 0x0, x4, 60, c.li x1, 0x0;)
+
+inst_16:
+// rd==x12,
+// opcode:c.li; dest:x12; immval:0x0
+TEST_CASE(x19, x12, 0x0, x4, 64, c.li x12, 0x0;)
+
+inst_17:
+// rd==x17,
+// opcode:c.li; dest:x17; immval:0x0
+TEST_CASE(x19, x17, 0x0, x4, 68, c.li x17, 0x0;)
+
+inst_18:
+// rd==x7,
+// opcode:c.li; dest:x7; immval:0x0
+TEST_CASE(x19, x7, 0x0, x4, 72, c.li x7, 0x0;)
+
+inst_19:
+// rd==x5,
+// opcode:c.li; dest:x5; immval:0x0
+TEST_CASE(x19, x5, 0x0, x4, 76, c.li x5, 0x0;)
+
+inst_20:
+// rd==x20,
+// opcode:c.li; dest:x20; immval:0x0
+TEST_CASE(x19, x20, 0x0, x4, 80, c.li x20, 0x0;)
+
+inst_21:
+// rd==x0,
+// opcode:c.li; dest:x0; immval:0x0
+TEST_CASE(x19, x0, 0, x4, 84, c.li x0, 0x0;)
+
+inst_22:
+// rd==x31,
+// opcode:c.li; dest:x31; immval:0x0
+TEST_CASE(x19, x31, 0x0, x4, 88, c.li x31, 0x0;)
+
+inst_23:
+// rd==x24,
+// opcode:c.li; dest:x24; immval:0x0
+TEST_CASE(x19, x24, 0x0, x4, 92, c.li x24, 0x0;)
+
+inst_24:
+// rd==x3,
+// opcode:c.li; dest:x3; immval:0x0
+TEST_CASE(x19, x3, 0x0, x4, 96, c.li x3, 0x0;)
+
+inst_25:
+// rd==x22,
+// opcode:c.li; dest:x22; immval:0x0
+TEST_CASE(x19, x22, 0x0, x4, 100, c.li x22, 0x0;)
+
+inst_26:
+// rd==x25,
+// opcode:c.li; dest:x25; immval:0x0
+TEST_CASE(x19, x25, 0x0, x4, 104, c.li x25, 0x0;)
+
+inst_27:
+// rd==x21,
+// opcode:c.li; dest:x21; immval:0x0
+TEST_CASE(x19, x21, 0x0, x4, 108, c.li x21, 0x0;)
+
+inst_28:
+// rd==x19,
+// opcode:c.li; dest:x19; immval:0x0
+TEST_CASE(x2, x19, 0x0, x4, 112, c.li x19, 0x0;)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_29:
+// rd==x28,
+// opcode:c.li; dest:x28; immval:0x0
+TEST_CASE(x2, x28, 0x0, x1, 0, c.li x28, 0x0;)
+
+inst_30:
+// rd==x4,
+// opcode:c.li; dest:x4; immval:0x0
+TEST_CASE(x2, x4, 0x0, x1, 4, c.li x4, 0x0;)
+
+inst_31:
+// rd==x23,
+// opcode:c.li; dest:x23; immval:0x0
+TEST_CASE(x2, x23, 0x0, x1, 8, c.li x23, 0x0;)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x4_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_1:
+ .fill 29*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 3*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/clui-01.S b/riscof/suite/rv32i_m/C/clui-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..ac2b73e9666949c004d9082277ae93e0d9fe4419
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/clui-01.S
@@ -0,0 +1,229 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.lui instruction of the RISC-V C extension for the clui covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",clui)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rd==x12, rs1_val > 0 and imm_val > 32, imm_val == 42
+// opcode:c.lui; op1:x12; dest:x12 op1val:0x80; immval:0xfffea
+TEST_CI_OP( c.lui, x12, 0xfffea000, 0x80, 0xfffea, x2, 0, x13)
+
+inst_1:
+// rd==x21, rs1_val > 0 and imm_val < 32 and imm_val !=0 ,
+// opcode:c.lui; op1:x21; dest:x21 op1val:0x20; immval:0xc
+TEST_CI_OP( c.lui, x21, 0xc000, 0x20, 0xc, x2, 4, x13)
+
+inst_2:
+// rd==x27, rs1_val < 0 and imm_val > 32,
+// opcode:c.lui; op1:x27; dest:x27 op1val:-0x11; immval:0xfffff
+TEST_CI_OP( c.lui, x27, 0xfffff000, -0x11, 0xfffff, x2, 8, x13)
+
+inst_3:
+// rd==x23, rs1_val < 0 and imm_val < 32 and imm_val !=0 ,
+// opcode:c.lui; op1:x23; dest:x23 op1val:-0x2; immval:0xf
+TEST_CI_OP( c.lui, x23, 0xf000, -0x2, 0xf, x2, 12, x13)
+
+inst_4:
+// rd==x19, imm_val == 1,
+// opcode:c.lui; op1:x19; dest:x19 op1val:-0x8000001; immval:0x1
+TEST_CI_OP( c.lui, x19, 0x1000, -0x8000001, 0x1, x2, 16, x13)
+
+inst_5:
+// rd==x20, imm_val == 2,
+// opcode:c.lui; op1:x20; dest:x20 op1val:-0x10001; immval:0x2
+TEST_CI_OP( c.lui, x20, 0x2000, -0x10001, 0x2, x2, 20, x13)
+
+inst_6:
+// rd==x8, imm_val == 4,
+// opcode:c.lui; op1:x8; dest:x8 op1val:0x1000; immval:0x4
+TEST_CI_OP( c.lui, x8, 0x4000, 0x1000, 0x4, x2, 24, x13)
+
+inst_7:
+// rd==x29, imm_val == 8,
+// opcode:c.lui; op1:x29; dest:x29 op1val:0x7fffffff; immval:0x8
+TEST_CI_OP( c.lui, x29, 0x8000, 0x7fffffff, 0x8, x2, 28, x13)
+
+inst_8:
+// rd==x31, imm_val == 16,
+// opcode:c.lui; op1:x31; dest:x31 op1val:-0x5; immval:0x10
+TEST_CI_OP( c.lui, x31, 0x10000, -0x5, 0x10, x2, 32, x13)
+
+inst_9:
+// rd==x14, imm_val == 32,
+// opcode:c.lui; op1:x14; dest:x14 op1val:0x400000; immval:0xfffe0
+TEST_CI_OP( c.lui, x14, 0xfffe0000, 0x400000, 0xfffe0, x2, 36, x13)
+
+inst_10:
+// rd==x3, imm_val == 21,
+// opcode:c.lui; op1:x3; dest:x3 op1val:-0x2000001; immval:0x15
+TEST_CI_OP( c.lui, x3, 0x15000, -0x2000001, 0x15, x2, 40, x13)
+
+inst_11:
+// rd==x4, imm_val == 62,
+// opcode:c.lui; op1:x4; dest:x4 op1val:-0x7; immval:0xffffe
+TEST_CI_OP( c.lui, x4, 0xffffe000, -0x7, 0xffffe, x2, 44, x13)
+
+inst_12:
+// rd==x17, imm_val == 61,
+// opcode:c.lui; op1:x17; dest:x17 op1val:0x4000; immval:0xffffd
+TEST_CI_OP( c.lui, x17, 0xffffd000, 0x4000, 0xffffd, x2, 48, x13)
+
+inst_13:
+// rd==x10, imm_val == 59,
+// opcode:c.lui; op1:x10; dest:x10 op1val:0x40000; immval:0xffffb
+TEST_CI_OP( c.lui, x10, 0xffffb000, 0x40000, 0xffffb, x2, 52, x13)
+
+inst_14:
+// rd==x7, imm_val == 55,
+// opcode:c.lui; op1:x7; dest:x7 op1val:-0x201; immval:0xffff7
+TEST_CI_OP( c.lui, x7, 0xffff7000, -0x201, 0xffff7, x2, 56, x13)
+
+inst_15:
+// rd==x22, imm_val == 47,
+// opcode:c.lui; op1:x22; dest:x22 op1val:0x5; immval:0xfffef
+TEST_CI_OP( c.lui, x22, 0xfffef000, 0x5, 0xfffef, x2, 60, x13)
+
+inst_16:
+// rd==x5, imm_val == 31,
+// opcode:c.lui; op1:x5; dest:x5 op1val:0x20; immval:0x1f
+TEST_CI_OP( c.lui, x5, 0x1f000, 0x20, 0x1f, x2, 64, x13)
+
+inst_17:
+// rd==x25,
+// opcode:c.lui; op1:x25; dest:x25 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x25, 0x1000, -0x80000000, 0x1, x2, 68, x13)
+
+inst_18:
+// rd==x28,
+// opcode:c.lui; op1:x28; dest:x28 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x28, 0x1000, -0x80000000, 0x1, x2, 72, x13)
+
+inst_19:
+// rd==x0,
+// opcode:c.lui; op1:x0; dest:x0 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x0, 0, -0x80000000, 0x1, x2, 76, x13)
+
+inst_20:
+// rd==x11,
+// opcode:c.lui; op1:x11; dest:x11 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x11, 0x1000, -0x80000000, 0x1, x2, 80, x13)
+
+inst_21:
+// rd==x1,
+// opcode:c.lui; op1:x1; dest:x1 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x1, 0x1000, -0x80000000, 0x1, x2, 84, x13)
+
+inst_22:
+// rd==x18,
+// opcode:c.lui; op1:x18; dest:x18 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x18, 0x1000, -0x80000000, 0x1, x2, 88, x13)
+
+inst_23:
+// rd==x9,
+// opcode:c.lui; op1:x9; dest:x9 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x9, 0x1000, -0x80000000, 0x1, x2, 92, x13)
+
+inst_24:
+// rd==x26,
+// opcode:c.lui; op1:x26; dest:x26 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x26, 0x1000, -0x80000000, 0x1, x2, 96, x13)
+
+inst_25:
+// rd==x30,
+// opcode:c.lui; op1:x30; dest:x30 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x30, 0x1000, -0x80000000, 0x1, x2, 100, x13)
+
+inst_26:
+// rd==x16,
+// opcode:c.lui; op1:x16; dest:x16 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x16, 0x1000, -0x80000000, 0x1, x2, 104, x13)
+
+inst_27:
+// rd==x6,
+// opcode:c.lui; op1:x6; dest:x6 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x6, 0x1000, -0x80000000, 0x1, x2, 108, x13)
+
+inst_28:
+// rd==x15,
+// opcode:c.lui; op1:x15; dest:x15 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x15, 0x1000, -0x80000000, 0x1, x2, 112, x3)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_29:
+// rd==x24,
+// opcode:c.lui; op1:x24; dest:x24 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x24, 0x1000, -0x80000000, 0x1, x1, 0, x3)
+
+inst_30:
+// rd==x13,
+// opcode:c.lui; op1:x13; dest:x13 op1val:-0x80000000; immval:0x1
+TEST_CI_OP( c.lui, x13, 0x1000, -0x80000000, 0x1, x1, 4, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 29*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 2*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/clw-01.S b/riscof/suite/rv32i_m/C/clw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..ba8ced252ee310de58309347cec22533de78a11a
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/clw-01.S
@@ -0,0 +1,139 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.lw instruction of the RISC-V C extension for the clw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",clw)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 == rd, rd==x12, rs1==x12, imm_val > 0,
+// opcode: c.lw; op1:x12; dest:x12; immval:0x30
+TEST_LOAD(x1,x2,0,x12,x12,0x30,0,c.lw,0)
+
+inst_1:
+// rs1 != rd, rd==x11, rs1==x10, imm_val == 0,
+// opcode: c.lw; op1:x10; dest:x11; immval:0x0
+TEST_LOAD(x1,x2,0,x10,x11,0x0,4,c.lw,0)
+
+inst_2:
+// rd==x14, rs1==x9, imm_val == 4,
+// opcode: c.lw; op1:x9; dest:x14; immval:0x4
+TEST_LOAD(x1,x2,0,x9,x14,0x4,8,c.lw,0)
+
+inst_3:
+// rd==x13, rs1==x15, imm_val == 8,
+// opcode: c.lw; op1:x15; dest:x13; immval:0x8
+TEST_LOAD(x1,x2,0,x15,x13,0x8,12,c.lw,0)
+
+inst_4:
+// rd==x10, rs1==x14, imm_val == 16,
+// opcode: c.lw; op1:x14; dest:x10; immval:0x10
+TEST_LOAD(x1,x2,0,x14,x10,0x10,16,c.lw,0)
+
+inst_5:
+// rd==x15, rs1==x8, imm_val == 32,
+// opcode: c.lw; op1:x8; dest:x15; immval:0x20
+TEST_LOAD(x1,x2,0,x8,x15,0x20,20,c.lw,0)
+
+inst_6:
+// rd==x8, rs1==x11, imm_val == 64,
+// opcode: c.lw; op1:x11; dest:x8; immval:0x40
+TEST_LOAD(x1,x2,0,x11,x8,0x40,24,c.lw,0)
+
+inst_7:
+// rd==x9, rs1==x13, imm_val == 120,
+// opcode: c.lw; op1:x13; dest:x9; immval:0x78
+TEST_LOAD(x1,x2,0,x13,x9,0x78,28,c.lw,0)
+
+inst_8:
+// imm_val == 116,
+// opcode: c.lw; op1:x11; dest:x10; immval:0x74
+TEST_LOAD(x1,x2,0,x11,x10,0x74,32,c.lw,0)
+
+inst_9:
+// imm_val == 108,
+// opcode: c.lw; op1:x11; dest:x10; immval:0x6c
+TEST_LOAD(x1,x2,0,x11,x10,0x6c,36,c.lw,0)
+
+inst_10:
+// imm_val == 92,
+// opcode: c.lw; op1:x11; dest:x10; immval:0x5c
+TEST_LOAD(x1,x2,0,x11,x10,0x5c,40,c.lw,0)
+
+inst_11:
+// imm_val == 60,
+// opcode: c.lw; op1:x11; dest:x10; immval:0x3c
+TEST_LOAD(x1,x2,0,x11,x10,0x3c,44,c.lw,0)
+
+inst_12:
+// imm_val == 84,
+// opcode: c.lw; op1:x11; dest:x10; immval:0x54
+TEST_LOAD(x1,x2,0,x11,x10,0x54,48,c.lw,0)
+
+inst_13:
+// imm_val == 40,
+// opcode: c.lw; op1:x11; dest:x10; immval:0x28
+TEST_LOAD(x1,x2,0,x11,x10,0x28,52,c.lw,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 14*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/clwsp-01.S b/riscof/suite/rv32i_m/C/clwsp-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..2d06cf9c2844646dce8f5b96769506a9a880de1d
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/clwsp-01.S
@@ -0,0 +1,229 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.lwsp instruction of the RISC-V C extension for the clwsp covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",clwsp)
+
+RVTEST_SIGBASE( x7,signature_x7_1)
+
+inst_0:
+// rd==x18, imm_val > 0, imm_val == 128
+// opcode: c.lwsp; op1:x2; dest:x18; immval:0x80
+TEST_LOAD(x7,x20,0,x2,x18,0x80,0,c.lwsp,0)
+
+inst_1:
+// rd==x12, imm_val == 0,
+// opcode: c.lwsp; op1:x2; dest:x12; immval:0x0
+TEST_LOAD(x7,x20,0,x2,x12,0x0,4,c.lwsp,0)
+
+inst_2:
+// rd==x2, imm_val == 4,
+// opcode: c.lwsp; op1:x2; dest:x2; immval:0x4
+TEST_LOAD(x7,x20,0,x2,x2,0x4,8,c.lwsp,0)
+
+inst_3:
+// rd==x19, imm_val == 8,
+// opcode: c.lwsp; op1:x2; dest:x19; immval:0x8
+TEST_LOAD(x7,x20,0,x2,x19,0x8,12,c.lwsp,0)
+
+inst_4:
+// rd==x8, imm_val == 16,
+// opcode: c.lwsp; op1:x2; dest:x8; immval:0x10
+TEST_LOAD(x7,x20,0,x2,x8,0x10,16,c.lwsp,0)
+
+inst_5:
+// rd==x16, imm_val == 32,
+// opcode: c.lwsp; op1:x2; dest:x16; immval:0x20
+TEST_LOAD(x7,x20,0,x2,x16,0x20,20,c.lwsp,0)
+
+inst_6:
+// rd==x13, imm_val == 64,
+// opcode: c.lwsp; op1:x2; dest:x13; immval:0x40
+TEST_LOAD(x7,x20,0,x2,x13,0x40,24,c.lwsp,0)
+
+inst_7:
+// rd==x3, imm_val == 248,
+// opcode: c.lwsp; op1:x2; dest:x3; immval:0xf8
+TEST_LOAD(x7,x20,0,x2,x3,0xf8,28,c.lwsp,0)
+
+inst_8:
+// rd==x15, imm_val == 244,
+// opcode: c.lwsp; op1:x2; dest:x15; immval:0xf4
+TEST_LOAD(x7,x20,0,x2,x15,0xf4,32,c.lwsp,0)
+
+inst_9:
+// rd==x29, imm_val == 236,
+// opcode: c.lwsp; op1:x2; dest:x29; immval:0xec
+TEST_LOAD(x7,x20,0,x2,x29,0xec,36,c.lwsp,0)
+
+inst_10:
+// rd==x27, imm_val == 220,
+// opcode: c.lwsp; op1:x2; dest:x27; immval:0xdc
+TEST_LOAD(x7,x20,0,x2,x27,0xdc,40,c.lwsp,0)
+
+inst_11:
+// rd==x25, imm_val == 188,
+// opcode: c.lwsp; op1:x2; dest:x25; immval:0xbc
+TEST_LOAD(x7,x20,0,x2,x25,0xbc,44,c.lwsp,0)
+
+inst_12:
+// rd==x14, imm_val == 124,
+// opcode: c.lwsp; op1:x2; dest:x14; immval:0x7c
+TEST_LOAD(x7,x20,0,x2,x14,0x7c,48,c.lwsp,0)
+
+inst_13:
+// rd==x17, imm_val == 84,
+// opcode: c.lwsp; op1:x2; dest:x17; immval:0x54
+TEST_LOAD(x7,x20,0,x2,x17,0x54,52,c.lwsp,0)
+
+inst_14:
+// rd==x9, imm_val == 168,
+// opcode: c.lwsp; op1:x2; dest:x9; immval:0xa8
+TEST_LOAD(x7,x20,0,x2,x9,0xa8,56,c.lwsp,0)
+
+inst_15:
+// rd==x22,
+// opcode: c.lwsp; op1:x2; dest:x22; immval:0x0
+TEST_LOAD(x7,x20,0,x2,x22,0x0,60,c.lwsp,0)
+
+inst_16:
+// rd==x6,
+// opcode: c.lwsp; op1:x2; dest:x6; immval:0x0
+TEST_LOAD(x7,x20,0,x2,x6,0x0,64,c.lwsp,0)
+
+inst_17:
+// rd==x31,
+// opcode: c.lwsp; op1:x2; dest:x31; immval:0x0
+TEST_LOAD(x7,x20,0,x2,x31,0x0,68,c.lwsp,0)
+
+inst_18:
+// rd==x1,
+// opcode: c.lwsp; op1:x2; dest:x1; immval:0x0
+TEST_LOAD(x7,x20,0,x2,x1,0x0,72,c.lwsp,0)
+
+inst_19:
+// rd==x28,
+// opcode: c.lwsp; op1:x2; dest:x28; immval:0x0
+TEST_LOAD(x7,x20,0,x2,x28,0x0,76,c.lwsp,0)
+
+inst_20:
+// rd==x5,
+// opcode: c.lwsp; op1:x2; dest:x5; immval:0x0
+TEST_LOAD(x7,x20,0,x2,x5,0x0,80,c.lwsp,0)
+
+inst_21:
+// rd==x10,
+// opcode: c.lwsp; op1:x2; dest:x10; immval:0x0
+TEST_LOAD(x7,x20,0,x2,x10,0x0,84,c.lwsp,0)
+
+inst_22:
+// rd==x26,
+// opcode: c.lwsp; op1:x2; dest:x26; immval:0x0
+TEST_LOAD(x7,x20,0,x2,x26,0x0,88,c.lwsp,0)
+
+inst_23:
+// rd==x23,
+// opcode: c.lwsp; op1:x2; dest:x23; immval:0x0
+TEST_LOAD(x7,x20,0,x2,x23,0x0,92,c.lwsp,0)
+
+inst_24:
+// rd==x4,
+// opcode: c.lwsp; op1:x2; dest:x4; immval:0x0
+TEST_LOAD(x7,x20,0,x2,x4,0x0,96,c.lwsp,0)
+
+inst_25:
+// rd==x11,
+// opcode: c.lwsp; op1:x2; dest:x11; immval:0x0
+TEST_LOAD(x7,x20,0,x2,x11,0x0,100,c.lwsp,0)
+
+inst_26:
+// rd==x30,
+// opcode: c.lwsp; op1:x2; dest:x30; immval:0x0
+TEST_LOAD(x7,x20,0,x2,x30,0x0,104,c.lwsp,0)
+
+inst_27:
+// rd==x20,
+// opcode: c.lwsp; op1:x2; dest:x20; immval:0x0
+TEST_LOAD(x7,x3,0,x2,x20,0x0,108,c.lwsp,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_28:
+// rd==x21,
+// opcode: c.lwsp; op1:x2; dest:x21; immval:0x0
+TEST_LOAD(x1,x3,0,x2,x21,0x0,0,c.lwsp,0)
+
+inst_29:
+// rd==x24,
+// opcode: c.lwsp; op1:x2; dest:x24; immval:0x0
+TEST_LOAD(x1,x3,0,x2,x24,0x0,4,c.lwsp,0)
+
+inst_30:
+// rd==x7,
+// opcode: c.lwsp; op1:x2; dest:x7; immval:0x0
+TEST_LOAD(x1,x3,0,x2,x7,0x0,8,c.lwsp,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x7_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_1:
+ .fill 28*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 3*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cmv-01.S b/riscof/suite/rv32i_m/C/cmv-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..c352a9f848fae54b2c4316daf21e84949f650361
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cmv-01.S
@@ -0,0 +1,499 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.mv instruction of the RISC-V C extension for the cmv covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cmv)
+
+RVTEST_SIGBASE( x5,signature_x5_1)
+
+inst_0:
+// rs2 != rd and rs2 != 0, rd==x16, rs2==x23, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648
+// opcode: c.mv; op2:x23; dest:x16; op2val:-0x80000000
+TEST_CMV_OP( c.mv, x16, x23, -0x80000000, -0x80000000, x5, 0, x4)
+
+inst_1:
+// rs2 == rd and rs2 != 0, rd==x11, rs2==x11, rs2_val == 0, rs2_val==0
+// opcode: c.mv; op2:x11; dest:x11; op2val:0x0
+TEST_CMV_OP( c.mv, x11, x11, 0x0, 0x0, x5, 4, x4)
+
+inst_2:
+// rd==x24, rs2==x2, rs2_val == (2**(xlen-1)-1), rs2_val == 2147483647
+// opcode: c.mv; op2:x2; dest:x24; op2val:0x7fffffff
+TEST_CMV_OP( c.mv, x24, x2, 0x7fffffff, 0x7fffffff, x5, 8, x4)
+
+inst_3:
+// rd==x19, rs2==x28, rs2_val == 1,
+// opcode: c.mv; op2:x28; dest:x19; op2val:0x1
+TEST_CMV_OP( c.mv, x19, x28, 0x1, 0x1, x5, 12, x4)
+
+inst_4:
+// rd==x6, rs2==x17, rs2_val == 2, rs2_val==2
+// opcode: c.mv; op2:x17; dest:x6; op2val:0x2
+TEST_CMV_OP( c.mv, x6, x17, 0x2, 0x2, x5, 16, x4)
+
+inst_5:
+// rd==x18, rs2==x9, rs2_val == 4, rs2_val==4
+// opcode: c.mv; op2:x9; dest:x18; op2val:0x4
+TEST_CMV_OP( c.mv, x18, x9, 0x4, 0x4, x5, 20, x4)
+
+inst_6:
+// rd==x21, rs2==x13, rs2_val == 8,
+// opcode: c.mv; op2:x13; dest:x21; op2val:0x8
+TEST_CMV_OP( c.mv, x21, x13, 0x8, 0x8, x5, 24, x4)
+
+inst_7:
+// rd==x26, rs2==x6, rs2_val == 16,
+// opcode: c.mv; op2:x6; dest:x26; op2val:0x10
+TEST_CMV_OP( c.mv, x26, x6, 0x10, 0x10, x5, 28, x4)
+
+inst_8:
+// rd==x3, rs2==x20, rs2_val == 32,
+// opcode: c.mv; op2:x20; dest:x3; op2val:0x20
+TEST_CMV_OP( c.mv, x3, x20, 0x20, 0x20, x5, 32, x4)
+
+inst_9:
+// rd==x31, rs2==x12, rs2_val == 64,
+// opcode: c.mv; op2:x12; dest:x31; op2val:0x40
+TEST_CMV_OP( c.mv, x31, x12, 0x40, 0x40, x5, 36, x4)
+
+inst_10:
+// rd==x2, rs2==x16, rs2_val == 128,
+// opcode: c.mv; op2:x16; dest:x2; op2val:0x80
+TEST_CMV_OP( c.mv, x2, x16, 0x80, 0x80, x5, 40, x4)
+
+inst_11:
+// rd==x14, rs2==x15, rs2_val == 256,
+// opcode: c.mv; op2:x15; dest:x14; op2val:0x100
+TEST_CMV_OP( c.mv, x14, x15, 0x100, 0x100, x5, 44, x4)
+
+inst_12:
+// rd==x20, rs2==x25, rs2_val == 512,
+// opcode: c.mv; op2:x25; dest:x20; op2val:0x200
+TEST_CMV_OP( c.mv, x20, x25, 0x200, 0x200, x5, 48, x4)
+
+inst_13:
+// rd==x28, rs2==x24, rs2_val == 1024,
+// opcode: c.mv; op2:x24; dest:x28; op2val:0x400
+TEST_CMV_OP( c.mv, x28, x24, 0x400, 0x400, x5, 52, x4)
+
+inst_14:
+// rd==x15, rs2==x26, rs2_val == 2048,
+// opcode: c.mv; op2:x26; dest:x15; op2val:0x800
+TEST_CMV_OP( c.mv, x15, x26, 0x800, 0x800, x5, 56, x4)
+
+inst_15:
+// rd==x13, rs2==x18, rs2_val == 4096,
+// opcode: c.mv; op2:x18; dest:x13; op2val:0x1000
+TEST_CMV_OP( c.mv, x13, x18, 0x1000, 0x1000, x5, 60, x4)
+
+inst_16:
+// rd==x8, rs2==x1, rs2_val == 8192,
+// opcode: c.mv; op2:x1; dest:x8; op2val:0x2000
+TEST_CMV_OP( c.mv, x8, x1, 0x2000, 0x2000, x5, 64, x4)
+
+inst_17:
+// rd==x7, rs2==x10, rs2_val == 16384,
+// opcode: c.mv; op2:x10; dest:x7; op2val:0x4000
+TEST_CMV_OP( c.mv, x7, x10, 0x4000, 0x4000, x5, 68, x4)
+
+inst_18:
+// rd==x30, rs2==x8, rs2_val == 32768,
+// opcode: c.mv; op2:x8; dest:x30; op2val:0x8000
+TEST_CMV_OP( c.mv, x30, x8, 0x8000, 0x8000, x5, 72, x4)
+
+inst_19:
+// rd==x27, rs2==x21, rs2_val == 65536,
+// opcode: c.mv; op2:x21; dest:x27; op2val:0x10000
+TEST_CMV_OP( c.mv, x27, x21, 0x10000, 0x10000, x5, 76, x4)
+
+inst_20:
+// rd==x9, rs2==x27, rs2_val == 131072,
+// opcode: c.mv; op2:x27; dest:x9; op2val:0x20000
+TEST_CMV_OP( c.mv, x9, x27, 0x20000, 0x20000, x5, 80, x6)
+
+inst_21:
+// rd==x10, rs2==x14, rs2_val == 262144,
+// opcode: c.mv; op2:x14; dest:x10; op2val:0x40000
+TEST_CMV_OP( c.mv, x10, x14, 0x40000, 0x40000, x5, 84, x6)
+
+inst_22:
+// rd==x25, rs2==x30, rs2_val == 524288,
+// opcode: c.mv; op2:x30; dest:x25; op2val:0x80000
+TEST_CMV_OP( c.mv, x25, x30, 0x80000, 0x80000, x5, 88, x6)
+
+inst_23:
+// rd==x22, rs2==x4, rs2_val == 1048576,
+// opcode: c.mv; op2:x4; dest:x22; op2val:0x100000
+TEST_CMV_OP( c.mv, x22, x4, 0x100000, 0x100000, x5, 92, x6)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_24:
+// rd==x4, rs2==x19, rs2_val == 2097152,
+// opcode: c.mv; op2:x19; dest:x4; op2val:0x200000
+TEST_CMV_OP( c.mv, x4, x19, 0x200000, 0x200000, x2, 0, x6)
+
+inst_25:
+// rd==x0, rs2==x29, rs2_val == 4194304,
+// opcode: c.mv; op2:x29; dest:x0; op2val:0x400000
+TEST_CMV_OP( c.mv, x0, x29, 0, 0x400000, x2, 4, x6)
+
+inst_26:
+// rd==x23, rs2==x7, rs2_val == 8388608,
+// opcode: c.mv; op2:x7; dest:x23; op2val:0x800000
+TEST_CMV_OP( c.mv, x23, x7, 0x800000, 0x800000, x2, 8, x6)
+
+inst_27:
+// rd==x29, rs2==x31, rs2_val == 16777216,
+// opcode: c.mv; op2:x31; dest:x29; op2val:0x1000000
+TEST_CMV_OP( c.mv, x29, x31, 0x1000000, 0x1000000, x2, 12, x6)
+
+inst_28:
+// rd==x12, rs2==x3, rs2_val == 33554432,
+// opcode: c.mv; op2:x3; dest:x12; op2val:0x2000000
+TEST_CMV_OP( c.mv, x12, x3, 0x2000000, 0x2000000, x2, 16, x6)
+
+inst_29:
+// rd==x5, rs2==x22, rs2_val == 67108864,
+// opcode: c.mv; op2:x22; dest:x5; op2val:0x4000000
+TEST_CMV_OP( c.mv, x5, x22, 0x4000000, 0x4000000, x2, 20, x6)
+
+inst_30:
+// rd==x1, rs2==x5, rs2_val == 134217728,
+// opcode: c.mv; op2:x5; dest:x1; op2val:0x8000000
+TEST_CMV_OP( c.mv, x1, x5, 0x8000000, 0x8000000, x2, 24, x6)
+
+inst_31:
+// rd==x17, rs2_val == 268435456,
+// opcode: c.mv; op2:x31; dest:x17; op2val:0x10000000
+TEST_CMV_OP( c.mv, x17, x31, 0x10000000, 0x10000000, x2, 28, x6)
+
+inst_32:
+// rs2_val == 536870912,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x20000000
+TEST_CMV_OP( c.mv, x10, x11, 0x20000000, 0x20000000, x2, 32, x6)
+
+inst_33:
+// rs2_val == 1073741824,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x40000000
+TEST_CMV_OP( c.mv, x10, x11, 0x40000000, 0x40000000, x2, 36, x6)
+
+inst_34:
+// rs2_val == -2,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x2
+TEST_CMV_OP( c.mv, x10, x11, -0x2, -0x2, x2, 40, x6)
+
+inst_35:
+// rs2_val == -3,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x3
+TEST_CMV_OP( c.mv, x10, x11, -0x3, -0x3, x2, 44, x6)
+
+inst_36:
+// rs2_val == -5,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x5
+TEST_CMV_OP( c.mv, x10, x11, -0x5, -0x5, x2, 48, x6)
+
+inst_37:
+// rs2_val == -9,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x9
+TEST_CMV_OP( c.mv, x10, x11, -0x9, -0x9, x2, 52, x6)
+
+inst_38:
+// rs2_val == -17,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x11
+TEST_CMV_OP( c.mv, x10, x11, -0x11, -0x11, x2, 56, x6)
+
+inst_39:
+// rs2_val == -33,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x21
+TEST_CMV_OP( c.mv, x10, x11, -0x21, -0x21, x2, 60, x6)
+
+inst_40:
+// rs2_val == -65,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x41
+TEST_CMV_OP( c.mv, x10, x11, -0x41, -0x41, x2, 64, x6)
+
+inst_41:
+// rs2_val == -129,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x81
+TEST_CMV_OP( c.mv, x10, x11, -0x81, -0x81, x2, 68, x6)
+
+inst_42:
+// rs2_val == -257,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x101
+TEST_CMV_OP( c.mv, x10, x11, -0x101, -0x101, x2, 72, x6)
+
+inst_43:
+// rs2_val == -513,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x201
+TEST_CMV_OP( c.mv, x10, x11, -0x201, -0x201, x2, 76, x6)
+
+inst_44:
+// rs2_val == -1025,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x401
+TEST_CMV_OP( c.mv, x10, x11, -0x401, -0x401, x2, 80, x6)
+
+inst_45:
+// rs2_val == -2049,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x801
+TEST_CMV_OP( c.mv, x10, x11, -0x801, -0x801, x2, 84, x6)
+
+inst_46:
+// rs2_val == -4097,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x1001
+TEST_CMV_OP( c.mv, x10, x11, -0x1001, -0x1001, x2, 88, x6)
+
+inst_47:
+// rs2_val == -8193,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x2001
+TEST_CMV_OP( c.mv, x10, x11, -0x2001, -0x2001, x2, 92, x6)
+
+inst_48:
+// rs2_val == -16385,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x4001
+TEST_CMV_OP( c.mv, x10, x11, -0x4001, -0x4001, x2, 96, x6)
+
+inst_49:
+// rs2_val == -32769,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x8001
+TEST_CMV_OP( c.mv, x10, x11, -0x8001, -0x8001, x2, 100, x6)
+
+inst_50:
+// rs2_val == -65537,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x10001
+TEST_CMV_OP( c.mv, x10, x11, -0x10001, -0x10001, x2, 104, x6)
+
+inst_51:
+// rs2_val == -131073,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x20001
+TEST_CMV_OP( c.mv, x10, x11, -0x20001, -0x20001, x2, 108, x6)
+
+inst_52:
+// rs2_val == -262145,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x40001
+TEST_CMV_OP( c.mv, x10, x11, -0x40001, -0x40001, x2, 112, x6)
+
+inst_53:
+// rs2_val == -524289,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x80001
+TEST_CMV_OP( c.mv, x10, x11, -0x80001, -0x80001, x2, 116, x6)
+
+inst_54:
+// rs2_val == -1048577,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x100001
+TEST_CMV_OP( c.mv, x10, x11, -0x100001, -0x100001, x2, 120, x6)
+
+inst_55:
+// rs2_val == -536870913,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x20000001
+TEST_CMV_OP( c.mv, x10, x11, -0x20000001, -0x20000001, x2, 124, x6)
+
+inst_56:
+// rs2_val == -1073741825,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x40000001
+TEST_CMV_OP( c.mv, x10, x11, -0x40000001, -0x40000001, x2, 128, x6)
+
+inst_57:
+// rs2_val == 1431655765, rs2_val==1431655765
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x55555555
+TEST_CMV_OP( c.mv, x10, x11, 0x55555555, 0x55555555, x2, 132, x6)
+
+inst_58:
+// rs2_val == -1431655766, rs2_val==-1431655766
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x55555556
+TEST_CMV_OP( c.mv, x10, x11, -0x55555556, -0x55555556, x2, 136, x6)
+
+inst_59:
+// rs2_val==3,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x3
+TEST_CMV_OP( c.mv, x10, x11, 0x3, 0x3, x2, 140, x6)
+
+inst_60:
+// rs2_val==5,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x5
+TEST_CMV_OP( c.mv, x10, x11, 0x5, 0x5, x2, 144, x6)
+
+inst_61:
+// rs2_val==858993459,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x33333333
+TEST_CMV_OP( c.mv, x10, x11, 0x33333333, 0x33333333, x2, 148, x6)
+
+inst_62:
+// rs2_val==1717986918,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x66666666
+TEST_CMV_OP( c.mv, x10, x11, 0x66666666, 0x66666666, x2, 152, x6)
+
+inst_63:
+// rs2_val==-46340,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0xb504
+TEST_CMV_OP( c.mv, x10, x11, -0xb504, -0xb504, x2, 156, x6)
+
+inst_64:
+// rs2_val==46340,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0xb504
+TEST_CMV_OP( c.mv, x10, x11, 0xb504, 0xb504, x2, 160, x6)
+
+inst_65:
+// rs2_val==1431655764,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x55555554
+TEST_CMV_OP( c.mv, x10, x11, 0x55555554, 0x55555554, x2, 164, x6)
+
+inst_66:
+// rs2_val==858993458,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x33333332
+TEST_CMV_OP( c.mv, x10, x11, 0x33333332, 0x33333332, x2, 168, x6)
+
+inst_67:
+// rs2_val==1717986917,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x66666665
+TEST_CMV_OP( c.mv, x10, x11, 0x66666665, 0x66666665, x2, 172, x6)
+
+inst_68:
+// rs2_val==46339,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0xb503
+TEST_CMV_OP( c.mv, x10, x11, 0xb503, 0xb503, x2, 176, x6)
+
+inst_69:
+// rs2_val == -2097153,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x200001
+TEST_CMV_OP( c.mv, x10, x11, -0x200001, -0x200001, x2, 180, x6)
+
+inst_70:
+// rs2_val==46341,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0xb505
+TEST_CMV_OP( c.mv, x10, x11, 0xb505, 0xb505, x2, 184, x6)
+
+inst_71:
+// rs2_val==-46339,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0xb503
+TEST_CMV_OP( c.mv, x10, x11, -0xb503, -0xb503, x2, 188, x6)
+
+inst_72:
+// rs2_val==1431655766,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x55555556
+TEST_CMV_OP( c.mv, x10, x11, 0x55555556, 0x55555556, x2, 192, x6)
+
+inst_73:
+// rs2_val==-1431655765,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x55555555
+TEST_CMV_OP( c.mv, x10, x11, -0x55555555, -0x55555555, x2, 196, x6)
+
+inst_74:
+// rs2_val==6,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x6
+TEST_CMV_OP( c.mv, x10, x11, 0x6, 0x6, x2, 200, x6)
+
+inst_75:
+// rs2_val==858993460,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x33333334
+TEST_CMV_OP( c.mv, x10, x11, 0x33333334, 0x33333334, x2, 204, x6)
+
+inst_76:
+// rs2_val==1717986919,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x66666667
+TEST_CMV_OP( c.mv, x10, x11, 0x66666667, 0x66666667, x2, 208, x6)
+
+inst_77:
+// rs2_val == -4194305,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x400001
+TEST_CMV_OP( c.mv, x10, x11, -0x400001, -0x400001, x2, 212, x6)
+
+inst_78:
+// rs2_val == -8388609,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x800001
+TEST_CMV_OP( c.mv, x10, x11, -0x800001, -0x800001, x2, 216, x6)
+
+inst_79:
+// rs2_val == -16777217,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x1000001
+TEST_CMV_OP( c.mv, x10, x11, -0x1000001, -0x1000001, x2, 220, x6)
+
+inst_80:
+// rs2_val == -33554433,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x2000001
+TEST_CMV_OP( c.mv, x10, x11, -0x2000001, -0x2000001, x2, 224, x6)
+
+inst_81:
+// rs2_val == -67108865,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x4000001
+TEST_CMV_OP( c.mv, x10, x11, -0x4000001, -0x4000001, x2, 228, x6)
+
+inst_82:
+// rs2_val == -134217729,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x8000001
+TEST_CMV_OP( c.mv, x10, x11, -0x8000001, -0x8000001, x2, 232, x6)
+
+inst_83:
+// rs2_val == -268435457,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x10000001
+TEST_CMV_OP( c.mv, x10, x11, -0x10000001, -0x10000001, x2, 236, x6)
+
+inst_84:
+// rs2_val == 4194304,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x400000
+TEST_CMV_OP( c.mv, x10, x11, 0x400000, 0x400000, x2, 240, x6)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x5_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_1:
+ .fill 24*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 61*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cnop-01.S b/riscof/suite/rv32i_m/C/cnop-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..4dc35ef6af84f0e5a223eabc6dbf7de7b8a42e79
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cnop-01.S
@@ -0,0 +1,139 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.nop instruction of the RISC-V C extension for the cnop covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cnop)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// imm_val == 1,
+// opcode:c.nop; immval:0x1
+TEST_CNOP_OP(c.nop, x2, 0x1, x1, 0)
+
+inst_1:
+// imm_val == 2,
+// opcode:c.nop; immval:0x2
+TEST_CNOP_OP(c.nop, x2, 0x2, x1, 4)
+
+inst_2:
+// imm_val == 4,
+// opcode:c.nop; immval:0x4
+TEST_CNOP_OP(c.nop, x2, 0x4, x1, 8)
+
+inst_3:
+// imm_val == 8,
+// opcode:c.nop; immval:0x8
+TEST_CNOP_OP(c.nop, x2, 0x8, x1, 12)
+
+inst_4:
+// imm_val == 16,
+// opcode:c.nop; immval:0x10
+TEST_CNOP_OP(c.nop, x2, 0x10, x1, 16)
+
+inst_5:
+// imm_val == -32,
+// opcode:c.nop; immval:-0x20
+TEST_CNOP_OP(c.nop, x2, -0x20, x1, 20)
+
+inst_6:
+// imm_val == -2,
+// opcode:c.nop; immval:-0x2
+TEST_CNOP_OP(c.nop, x2, -0x2, x1, 24)
+
+inst_7:
+// imm_val == -3,
+// opcode:c.nop; immval:-0x3
+TEST_CNOP_OP(c.nop, x2, -0x3, x1, 28)
+
+inst_8:
+// imm_val == -5,
+// opcode:c.nop; immval:-0x5
+TEST_CNOP_OP(c.nop, x2, -0x5, x1, 32)
+
+inst_9:
+// imm_val == -9,
+// opcode:c.nop; immval:-0x9
+TEST_CNOP_OP(c.nop, x2, -0x9, x1, 36)
+
+inst_10:
+// imm_val == -17,
+// opcode:c.nop; immval:-0x11
+TEST_CNOP_OP(c.nop, x2, -0x11, x1, 40)
+
+inst_11:
+// imm_val == 31,
+// opcode:c.nop; immval:0x1f
+TEST_CNOP_OP(c.nop, x2, 0x1f, x1, 44)
+
+inst_12:
+// imm_val == 21,
+// opcode:c.nop; immval:0x15
+TEST_CNOP_OP(c.nop, x2, 0x15, x1, 48)
+
+inst_13:
+// imm_val == -22,
+// opcode:c.nop; immval:-0x16
+TEST_CNOP_OP(c.nop, x2, -0x16, x1, 52)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 14*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cor-01.S b/riscof/suite/rv32i_m/C/cor-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..913366a29b5f25d1672762db61cef8d68ea75798
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cor-01.S
@@ -0,0 +1,3024 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.or instruction of the RISC-V C extension for the cor covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cor)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x11, rs2==x12, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648, rs2_val < 0, rs1_val == -2049
+// opcode: c.or; op1:x11; op2:x12; op1val:-0x801; op2val:-0x80000000
+TEST_CR_OP( c.or, x11, x12, 0xfffff7ff, -0x801, -0x80000000, x1, 0, x2)
+
+inst_1:
+// rs1 == rs2, rs1==x13, rs2==x13, rs2_val == 0,
+// opcode: c.or; op1:x13; op2:x13; op1val:-0x7; op2val:-0x7
+TEST_CR_OP( c.or, x13, x13, 0xfffffff9, -0x7, -0x7, x1, 4, x2)
+
+inst_2:
+// rs1==x9, rs2==x8, rs2_val == (2**(xlen-1)-1), rs2_val > 0, rs2_val == 2147483647
+// opcode: c.or; op1:x9; op2:x8; op1val:0x5; op2val:0x7fffffff
+TEST_CR_OP( c.or, x9, x8, 0x7fffffff, 0x5, 0x7fffffff, x1, 8, x2)
+
+inst_3:
+// rs1==x8, rs2==x10, rs2_val == 1, rs1_val == 8
+// opcode: c.or; op1:x8; op2:x10; op1val:0x8; op2val:0x1
+TEST_CR_OP( c.or, x8, x10, 0x9, 0x8, 0x1, x1, 12, x2)
+
+inst_4:
+// rs1==x12, rs2==x15, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648
+// opcode: c.or; op1:x12; op2:x15; op1val:-0x80000000; op2val:-0x7
+TEST_CR_OP( c.or, x12, x15, 0xfffffff9, -0x80000000, -0x7, x1, 16, x2)
+
+inst_5:
+// rs1==x10, rs2==x11, rs1_val == 0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x9
+TEST_CR_OP( c.or, x10, x11, 0x9, 0x0, 0x9, x1, 20, x2)
+
+inst_6:
+// rs1==x15, rs2==x14, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647
+// opcode: c.or; op1:x15; op2:x14; op1val:0x7fffffff; op2val:-0x4
+TEST_CR_OP( c.or, x15, x14, 0xffffffff, 0x7fffffff, -0x4, x1, 24, x2)
+
+inst_7:
+// rs1==x14, rs2==x9, rs1_val == 1, rs2_val == -257
+// opcode: c.or; op1:x14; op2:x9; op1val:0x1; op2val:-0x101
+TEST_CR_OP( c.or, x14, x9, 0xfffffeff, 0x1, -0x101, x1, 28, x2)
+
+inst_8:
+// rs2_val == 2, rs1_val == -8388609
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x800001; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xff7fffff, -0x800001, 0x2, x1, 32, x2)
+
+inst_9:
+// rs2_val == 4, rs1_val==0 and rs2_val==4
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x4, 0x0, 0x4, x1, 36, x2)
+
+inst_10:
+// rs2_val == 8,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x1; op2val:0x8
+TEST_CR_OP( c.or, x10, x11, 0x9, 0x1, 0x8, x1, 40, x2)
+
+inst_11:
+// rs2_val == 16, rs1_val == 67108864
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4000000; op2val:0x10
+TEST_CR_OP( c.or, x10, x11, 0x4000010, 0x4000000, 0x10, x1, 44, x2)
+
+inst_12:
+// rs2_val == 32, rs1_val == -33
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x21; op2val:0x20
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x21, 0x20, x1, 48, x2)
+
+inst_13:
+// rs2_val == 64, rs1_val == -4194305
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x400001; op2val:0x40
+TEST_CR_OP( c.or, x10, x11, 0xffbfffff, -0x400001, 0x40, x1, 52, x2)
+
+inst_14:
+// rs2_val == 128, rs1_val == 4
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x80
+TEST_CR_OP( c.or, x10, x11, 0x84, 0x4, 0x80, x1, 56, x2)
+
+inst_15:
+// rs2_val == 256, rs1_val == -32769
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x8001; op2val:0x100
+TEST_CR_OP( c.or, x10, x11, 0xffff7fff, -0x8001, 0x100, x1, 60, x2)
+
+inst_16:
+// rs2_val == 512, rs1_val == 16
+// opcode: c.or; op1:x10; op2:x11; op1val:0x10; op2val:0x200
+TEST_CR_OP( c.or, x10, x11, 0x210, 0x10, 0x200, x1, 64, x2)
+
+inst_17:
+// rs2_val == 1024,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x400
+TEST_CR_OP( c.or, x10, x11, 0x400, 0x0, 0x400, x1, 68, x2)
+
+inst_18:
+// rs2_val == 2048, rs1_val == 2048
+// opcode: c.or; op1:x10; op2:x11; op1val:0x800; op2val:0x800
+TEST_CR_OP( c.or, x10, x11, 0x800, 0x800, 0x800, x1, 72, x2)
+
+inst_19:
+// rs2_val == 4096, rs1_val == -65
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x41; op2val:0x1000
+TEST_CR_OP( c.or, x10, x11, 0xffffffbf, -0x41, 0x1000, x1, 76, x2)
+
+inst_20:
+// rs2_val == 8192,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x2000
+TEST_CR_OP( c.or, x10, x11, 0x33333332, 0x33333332, 0x2000, x1, 80, x2)
+
+inst_21:
+// rs2_val == 16384, rs1_val == 262144
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40000; op2val:0x4000
+TEST_CR_OP( c.or, x10, x11, 0x44000, 0x40000, 0x4000, x1, 84, x2)
+
+inst_22:
+// rs2_val == 32768, rs1_val == -3
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x3; op2val:0x8000
+TEST_CR_OP( c.or, x10, x11, 0xfffffffd, -0x3, 0x8000, x1, 88, x2)
+
+inst_23:
+// rs2_val == 65536,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x41; op2val:0x10000
+TEST_CR_OP( c.or, x10, x11, 0xffffffbf, -0x41, 0x10000, x1, 92, x2)
+
+inst_24:
+// rs2_val == 131072,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x1; op2val:0x20000
+TEST_CR_OP( c.or, x10, x11, 0x20001, 0x1, 0x20000, x1, 96, x2)
+
+inst_25:
+// rs2_val == 262144,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x3; op2val:0x40000
+TEST_CR_OP( c.or, x10, x11, 0xfffffffd, -0x3, 0x40000, x1, 100, x2)
+
+inst_26:
+// rs2_val == 524288,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x3; op2val:0x80000
+TEST_CR_OP( c.or, x10, x11, 0xfffffffd, -0x3, 0x80000, x1, 104, x2)
+
+inst_27:
+// rs2_val == 1048576,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x40000000; op2val:0x100000
+TEST_CR_OP( c.or, x10, x11, 0xc0100000, -0x40000000, 0x100000, x1, 108, x2)
+
+inst_28:
+// rs2_val == 2097152, rs1_val == 33554432
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2000000; op2val:0x200000
+TEST_CR_OP( c.or, x10, x11, 0x2200000, 0x2000000, 0x200000, x1, 112, x2)
+
+inst_29:
+// rs2_val == 4194304, rs1_val == 134217728
+// opcode: c.or; op1:x10; op2:x11; op1val:0x8000000; op2val:0x400000
+TEST_CR_OP( c.or, x10, x11, 0x8400000, 0x8000000, 0x400000, x1, 116, x2)
+
+inst_30:
+// rs2_val == 8388608, rs1_val == 65536
+// opcode: c.or; op1:x10; op2:x11; op1val:0x10000; op2val:0x800000
+TEST_CR_OP( c.or, x10, x11, 0x810000, 0x10000, 0x800000, x1, 120, x2)
+
+inst_31:
+// rs2_val == 16777216,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x1000000
+TEST_CR_OP( c.or, x10, x11, 0x100b504, 0xb504, 0x1000000, x1, 124, x2)
+
+inst_32:
+// rs2_val == 33554432, rs1_val == -1073741825
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x40000001; op2val:0x2000000
+TEST_CR_OP( c.or, x10, x11, 0xbfffffff, -0x40000001, 0x2000000, x1, 128, x2)
+
+inst_33:
+// rs2_val == 67108864,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x41; op2val:0x4000000
+TEST_CR_OP( c.or, x10, x11, 0xffffffbf, -0x41, 0x4000000, x1, 132, x2)
+
+inst_34:
+// rs2_val == 134217728,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x10; op2val:0x8000000
+TEST_CR_OP( c.or, x10, x11, 0x8000010, 0x10, 0x8000000, x1, 136, x2)
+
+inst_35:
+// rs2_val == 268435456,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x7; op2val:0x10000000
+TEST_CR_OP( c.or, x10, x11, 0xfffffff9, -0x7, 0x10000000, x1, 140, x2)
+
+inst_36:
+// rs2_val == 536870912, rs1_val == 8192
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2000; op2val:0x20000000
+TEST_CR_OP( c.or, x10, x11, 0x20002000, 0x2000, 0x20000000, x1, 144, x2)
+
+inst_37:
+// rs2_val == 1073741824, rs1_val == 64
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40; op2val:0x40000000
+TEST_CR_OP( c.or, x10, x11, 0x40000040, 0x40, 0x40000000, x1, 148, x2)
+
+inst_38:
+// rs2_val == -2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x8; op2val:-0x2
+TEST_CR_OP( c.or, x10, x11, 0xfffffffe, 0x8, -0x2, x1, 152, x2)
+
+inst_39:
+// rs2_val == -3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40; op2val:-0x3
+TEST_CR_OP( c.or, x10, x11, 0xfffffffd, 0x40, -0x3, x1, 156, x2)
+
+inst_40:
+// rs2_val == -5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:-0x5
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, 0x55555556, -0x5, x1, 160, x2)
+
+inst_41:
+// rs2_val == -9,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x10; op2val:-0x9
+TEST_CR_OP( c.or, x10, x11, 0xfffffff7, 0x10, -0x9, x1, 164, x2)
+
+inst_42:
+// rs2_val == -17, rs1_val == 2
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:-0x11
+TEST_CR_OP( c.or, x10, x11, 0xffffffef, 0x2, -0x11, x1, 168, x2)
+
+inst_43:
+// rs2_val == -33,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:-0x21
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, 0x33333334, -0x21, x1, 172, x2)
+
+inst_44:
+// rs2_val == -65,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x8; op2val:-0x41
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x8, -0x41, x1, 176, x2)
+
+inst_45:
+// rs2_val == -129,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:-0x81
+TEST_CR_OP( c.or, x10, x11, 0xffffff7f, 0x2, -0x81, x1, 180, x2)
+
+inst_46:
+// rs2_val == -513,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:-0x201
+TEST_CR_OP( c.or, x10, x11, 0xfffffdff, 0x55555554, -0x201, x1, 184, x2)
+
+inst_47:
+// rs2_val == -1025,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:-0x401
+TEST_CR_OP( c.or, x10, x11, 0xfffffbff, 0x6, -0x401, x1, 188, x2)
+
+inst_48:
+// rs2_val == -2049,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:-0x801
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0xb503, -0x801, x1, 192, x2)
+
+inst_49:
+// rs2_val == -4097,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:-0x1001
+TEST_CR_OP( c.or, x10, x11, 0xffffefff, 0x5, -0x1001, x1, 196, x2)
+
+inst_50:
+// rs2_val == -8193,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:-0x2001
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, 0x66666666, -0x2001, x1, 200, x2)
+
+inst_51:
+// rs2_val == -16385, rs1_val == 8388608
+// opcode: c.or; op1:x10; op2:x11; op1val:0x800000; op2val:-0x4001
+TEST_CR_OP( c.or, x10, x11, 0xffffbfff, 0x800000, -0x4001, x1, 204, x2)
+
+inst_52:
+// rs2_val == -32769,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x400001; op2val:-0x8001
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x400001, -0x8001, x1, 208, x2)
+
+inst_53:
+// rs2_val == -65537,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x80000000; op2val:-0x10001
+TEST_CR_OP( c.or, x10, x11, 0xfffeffff, -0x80000000, -0x10001, x1, 212, x2)
+
+inst_54:
+// rs2_val == -131073, rs1_val == -17
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x11; op2val:-0x20001
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x11, -0x20001, x1, 216, x2)
+
+inst_55:
+// rs2_val == -262145,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x8; op2val:-0x40001
+TEST_CR_OP( c.or, x10, x11, 0xfffbffff, 0x8, -0x40001, x1, 220, x2)
+
+inst_56:
+// rs2_val == -524289,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x41; op2val:-0x80001
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x41, -0x80001, x1, 224, x2)
+
+inst_57:
+// rs2_val == -1048577,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:-0x100001
+TEST_CR_OP( c.or, x10, x11, 0xffefffff, 0x5, -0x100001, x1, 228, x2)
+
+inst_58:
+// rs2_val == -2097153,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4000000; op2val:-0x200001
+TEST_CR_OP( c.or, x10, x11, 0xffdfffff, 0x4000000, -0x200001, x1, 232, x2)
+
+inst_59:
+// rs2_val == -4194305,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:-0x400001
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, 0x55555556, -0x400001, x1, 236, x2)
+
+inst_60:
+// rs2_val == -8388609,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xa; op2val:-0x800001
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0xa, -0x800001, x1, 240, x2)
+
+inst_61:
+// rs2_val == -16777217,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:-0x1000001
+TEST_CR_OP( c.or, x10, x11, 0xfeffffff, 0x2, -0x1000001, x1, 244, x2)
+
+inst_62:
+// rs2_val == -33554433, rs1_val == 1431655765
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:-0x2000001
+TEST_CR_OP( c.or, x10, x11, 0xfdffffff, 0x55555555, -0x2000001, x1, 248, x2)
+
+inst_63:
+// rs2_val == -67108865,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x4; op2val:-0x4000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x4, -0x4000001, x1, 252, x2)
+
+inst_64:
+// rs2_val == -134217729,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x8000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x55555555, -0x8000001, x1, 256, x2)
+
+inst_65:
+// rs2_val == -268435457,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40000; op2val:-0x10000001
+TEST_CR_OP( c.or, x10, x11, 0xefffffff, 0x40000, -0x10000001, x1, 260, x2)
+
+inst_66:
+// rs2_val == -536870913, rs1_val == -8193
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x2001; op2val:-0x20000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x2001, -0x20000001, x1, 264, x2)
+
+inst_67:
+// rs2_val == -1073741825,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:-0x40000001
+TEST_CR_OP( c.or, x10, x11, 0xbfffffff, 0x0, -0x40000001, x1, 268, x2)
+
+inst_68:
+// rs2_val == 1431655765, rs1_val==5 and rs2_val==1431655765
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x55555555, 0x5, 0x55555555, x1, 272, x2)
+
+inst_69:
+// rs2_val == -1431655766, rs1_val == -2097153
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x200001; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x200001, -0x55555556, x1, 276, x2)
+
+inst_70:
+// rs1_val == 32,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x20; op2val:-0x200001
+TEST_CR_OP( c.or, x10, x11, 0xffdfffff, 0x20, -0x200001, x1, 280, x2)
+
+inst_71:
+// rs1_val == 128,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x80; op2val:0x20000000
+TEST_CR_OP( c.or, x10, x11, 0x20000080, 0x80, 0x20000000, x1, 284, x2)
+
+inst_72:
+// rs1_val == 256,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x100; op2val:0x40000
+TEST_CR_OP( c.or, x10, x11, 0x40100, 0x100, 0x40000, x1, 288, x2)
+
+inst_73:
+// rs1_val == 512,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x200; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x205, 0x200, 0x5, x1, 292, x2)
+
+inst_74:
+// rs1_val == 1024,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x400; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x400, 0x400, 0x0, x1, 296, x2)
+
+inst_75:
+// rs1_val == 4096,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x1000; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xb503, 0x1000, 0xb503, x1, 300, x2)
+
+inst_76:
+// rs1_val == 16384,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4000; op2val:0x1000000
+TEST_CR_OP( c.or, x10, x11, 0x1004000, 0x4000, 0x1000000, x1, 304, x2)
+
+inst_77:
+// rs1_val == 32768,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x8000; op2val:0x4000
+TEST_CR_OP( c.or, x10, x11, 0xc000, 0x8000, 0x4000, x1, 308, x2)
+
+inst_78:
+// rs1_val == 131072,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x20000; op2val:0x200000
+TEST_CR_OP( c.or, x10, x11, 0x220000, 0x20000, 0x200000, x1, 312, x2)
+
+inst_79:
+// rs1_val == 524288,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x80000; op2val:0x7fffffff
+TEST_CR_OP( c.or, x10, x11, 0x7fffffff, 0x80000, 0x7fffffff, x1, 316, x2)
+
+inst_80:
+// rs1_val == 1048576,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x100000; op2val:0x40
+TEST_CR_OP( c.or, x10, x11, 0x100040, 0x100000, 0x40, x1, 320, x2)
+
+inst_81:
+// rs1_val == 2097152,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x200000; op2val:-0x80001
+TEST_CR_OP( c.or, x10, x11, 0xfff7ffff, 0x200000, -0x80001, x1, 324, x2)
+
+inst_82:
+// rs1_val == 4194304,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x400000; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff4afc, 0x400000, -0xb504, x1, 328, x2)
+
+inst_83:
+// rs1_val == 16777216,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x1000000; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x1000006, 0x1000000, 0x6, x1, 332, x2)
+
+inst_84:
+// rs1_val == 268435456,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x10000000; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x10000004, 0x10000000, 0x4, x1, 336, x2)
+
+inst_85:
+// rs1_val == 536870912,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x20000000; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x20000002, 0x20000000, 0x2, x1, 340, x2)
+
+inst_86:
+// rs1_val == 1073741824,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40000000; op2val:0x40000000
+TEST_CR_OP( c.or, x10, x11, 0x40000000, 0x40000000, 0x40000000, x1, 344, x2)
+
+inst_87:
+// rs1_val == -2,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x2; op2val:-0x5
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x2, -0x5, x1, 348, x2)
+
+inst_88:
+// rs1_val == -5,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x5, 0x66666667, x1, 352, x2)
+
+inst_89:
+// rs1_val == -9,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x9; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xfffffff7, -0x9, 0xb503, x1, 356, x2)
+
+inst_90:
+// rs1_val == -129,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x81; op2val:0x1000
+TEST_CR_OP( c.or, x10, x11, 0xffffff7f, -0x81, 0x1000, x1, 360, x2)
+
+inst_91:
+// rs1_val == -257,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x101; op2val:-0x21
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x101, -0x21, x1, 364, x2)
+
+inst_92:
+// rs1_val == -513,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x201; op2val:-0x3
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x201, -0x3, x1, 368, x2)
+
+inst_93:
+// rs1_val == -1025,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x401; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xfffffbff, -0x401, 0x4, x1, 372, x2)
+
+inst_94:
+// rs1_val == -4097,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x1001; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x1001, 0x55555555, x1, 376, x2)
+
+inst_95:
+// rs1_val == -16385,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x4001; op2val:-0x40000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x4001, -0x40000001, x1, 380, x2)
+
+inst_96:
+// rs1_val == -65537,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x10001; op2val:-0x80000000
+TEST_CR_OP( c.or, x10, x11, 0xfffeffff, -0x10001, -0x80000000, x1, 384, x2)
+
+inst_97:
+// rs1_val == -131073,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x20001; op2val:0x8
+TEST_CR_OP( c.or, x10, x11, 0xfffdffff, -0x20001, 0x8, x1, 388, x2)
+
+inst_98:
+// rs1_val == -262145,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x40001; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xfffbffff, -0x40001, 0x5, x1, 392, x2)
+
+inst_99:
+// rs1_val == -524289,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x80001; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xfff7ffff, -0x80001, 0x55555555, x1, 396, x2)
+
+inst_100:
+// rs1_val == -1048577,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x100001; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x100001, -0xb504, x1, 400, x2)
+
+inst_101:
+// rs1_val == -16777217,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x1000001; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xfeffffff, -0x1000001, 0x0, x1, 404, x2)
+
+inst_102:
+// rs1_val == -33554433,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x2000001; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xfdffffff, -0x2000001, 0x6, x1, 408, x2)
+
+inst_103:
+// rs1_val == -67108865,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x4000001; op2val:-0x5
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x4000001, -0x5, x1, 412, x2)
+
+inst_104:
+// rs1_val == -134217729,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x8000001; op2val:-0x81
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x8000001, -0x81, x1, 416, x2)
+
+inst_105:
+// rs1_val == -268435457,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x10000001; op2val:-0x800001
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x10000001, -0x800001, x1, 420, x2)
+
+inst_106:
+// rs1_val == -536870913,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x20000001; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x20000001, -0x55555556, x1, 424, x2)
+
+inst_107:
+// rs1_val == -1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xa
+TEST_CR_OP( c.or, x10, x11, 0xfffffffe, -0x55555556, -0xa, x1, 428, x2)
+
+inst_108:
+// rs1_val==3 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x3, 0x3, 0x3, x1, 432, x2)
+
+inst_109:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x3, 0x55555555, x1, 436, x2)
+
+inst_110:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaab, 0x3, -0x55555556, x1, 440, x2)
+
+inst_111:
+// rs1_val==3 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x3, 0x5, x1, 444, x2)
+
+inst_112:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x33333333, 0x3, 0x33333333, x1, 448, x2)
+
+inst_113:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x3, 0x66666666, x1, 452, x2)
+
+inst_114:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff4aff, 0x3, -0xb504, x1, 456, x2)
+
+inst_115:
+// rs1_val==3 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0x3, 0xb504, x1, 460, x2)
+
+inst_116:
+// rs1_val==3 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x3, 0x3, 0x2, x1, 464, x2)
+
+inst_117:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x3, 0x55555554, x1, 468, x2)
+
+inst_118:
+// rs1_val==3 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x3, 0x3, 0x0, x1, 472, x2)
+
+inst_119:
+// rs1_val==3 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x3, 0x4, x1, 476, x2)
+
+inst_120:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x33333333, 0x3, 0x33333332, x1, 480, x2)
+
+inst_121:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x3, 0x66666665, x1, 484, x2)
+
+inst_122:
+// rs1_val==3 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xb503, 0x3, 0xb503, x1, 488, x2)
+
+inst_123:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x3, 0x55555556, x1, 492, x2)
+
+inst_124:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaab, 0x3, -0x55555555, x1, 496, x2)
+
+inst_125:
+// rs1_val==3 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x3, 0x6, x1, 500, x2)
+
+inst_126:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x33333337, 0x3, 0x33333334, x1, 504, x2)
+
+inst_127:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x3, 0x66666667, x1, 508, x2)
+
+inst_128:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff4aff, 0x3, -0xb503, x1, 512, x2)
+
+inst_129:
+// rs1_val==3 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0x3, 0xb505, x1, 516, x2)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x55555555, 0x3, x1, 520, x2)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x55555555, 0x55555555, 0x55555555, x1, 524, x2)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, 0x55555555, -0x55555556, x1, 528, x2)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x55555555, 0x55555555, 0x5, x1, 532, x2)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x55555555, 0x33333333, x1, 536, x2)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x55555555, 0x66666666, x1, 540, x2)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff5ffd, 0x55555555, -0xb504, x1, 544, x2)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0x5555f555, 0x55555555, 0xb504, x1, 548, x2)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x55555555, 0x2, x1, 552, x2)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x55555555, 0x55555555, 0x55555554, x1, 556, x2)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x55555555, 0x55555555, 0x0, x1, 560, x2)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x55555555, 0x55555555, 0x4, x1, 564, x2)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x55555555, 0x33333332, x1, 568, x2)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x77777775, 0x55555555, 0x66666665, x1, 572, x2)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0x5555f557, 0x55555555, 0xb503, x1, 576, x2)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x55555555, 0x55555556, x1, 580, x2)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, 0x55555555, -0x55555555, x1, 584, x2)
+
+inst_147:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x55555555, 0x6, x1, 588, x2)
+
+inst_148:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x77777775, 0x55555555, 0x33333334, x1, 592, x2)
+
+inst_149:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x55555555, 0x66666667, x1, 596, x2)
+
+inst_150:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff5ffd, 0x55555555, -0xb503, x1, 600, x2)
+
+inst_151:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0x5555f555, 0x55555555, 0xb505, x1, 604, x2)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaab, -0x55555556, 0x3, x1, 608, x2)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x55555556, 0x55555555, x1, 612, x2)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaa, -0x55555556, -0x55555556, x1, 616, x2)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaf, -0x55555556, 0x5, x1, 620, x2)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbb, -0x55555556, 0x33333333, x1, 624, x2)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeee, -0x55555556, 0x66666666, x1, 628, x2)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffffeafe, -0x55555556, -0xb504, x1, 632, x2)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0xaaaabfae, -0x55555556, 0xb504, x1, 636, x2)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaa, -0x55555556, 0x2, x1, 640, x2)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0xfffffffe, -0x55555556, 0x55555554, x1, 644, x2)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaa, -0x55555556, 0x0, x1, 648, x2)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaae, -0x55555556, 0x4, x1, 652, x2)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbba, -0x55555556, 0x33333332, x1, 656, x2)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeef, -0x55555556, 0x66666665, x1, 660, x2)
+
+inst_166:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xaaaabfab, -0x55555556, 0xb503, x1, 664, x2)
+
+inst_167:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xfffffffe, -0x55555556, 0x55555556, x1, 668, x2)
+
+inst_168:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaab, -0x55555556, -0x55555555, x1, 672, x2)
+
+inst_169:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaae, -0x55555556, 0x6, x1, 676, x2)
+
+inst_170:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbe, -0x55555556, 0x33333334, x1, 680, x2)
+
+inst_171:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeef, -0x55555556, 0x66666667, x1, 684, x2)
+
+inst_172:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffffeaff, -0x55555556, -0xb503, x1, 688, x2)
+
+inst_173:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0xaaaabfaf, -0x55555556, 0xb505, x1, 692, x2)
+
+inst_174:
+// rs1_val==5 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x5, 0x3, x1, 696, x2)
+
+inst_175:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaf, 0x5, -0x55555556, x1, 700, x2)
+
+inst_176:
+// rs1_val==5 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x5, 0x5, 0x5, x1, 704, x2)
+
+inst_177:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x33333337, 0x5, 0x33333333, x1, 708, x2)
+
+inst_178:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x5, 0x66666666, x1, 712, x2)
+
+inst_179:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff4afd, 0x5, -0xb504, x1, 716, x2)
+
+inst_180:
+// rs1_val==5 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0xb505, 0x5, 0xb504, x1, 720, x2)
+
+inst_181:
+// rs1_val==5 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x5, 0x2, x1, 724, x2)
+
+inst_182:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x55555555, 0x5, 0x55555554, x1, 728, x2)
+
+inst_183:
+// rs1_val==5 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x5, 0x5, 0x0, x1, 732, x2)
+
+inst_184:
+// rs1_val==5 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x5, 0x5, 0x4, x1, 736, x2)
+
+inst_185:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x33333337, 0x5, 0x33333332, x1, 740, x2)
+
+inst_186:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x66666665, 0x5, 0x66666665, x1, 744, x2)
+
+inst_187:
+// rs1_val==5 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0x5, 0xb503, x1, 748, x2)
+
+inst_188:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x5, 0x55555556, x1, 752, x2)
+
+inst_189:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaf, 0x5, -0x55555555, x1, 756, x2)
+
+inst_190:
+// rs1_val==5 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x5, 0x6, x1, 760, x2)
+
+inst_191:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x33333335, 0x5, 0x33333334, x1, 764, x2)
+
+inst_192:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x5, 0x66666667, x1, 768, x2)
+
+inst_193:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff4afd, 0x5, -0xb503, x1, 772, x2)
+
+inst_194:
+// rs1_val==5 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0xb505, 0x5, 0xb505, x1, 776, x2)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x33333333, 0x33333333, 0x3, x1, 780, x2)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x33333333, 0x55555555, x1, 784, x2)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbb, 0x33333333, -0x55555556, x1, 788, x2)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x33333337, 0x33333333, 0x5, x1, 792, x2)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x33333333, 0x33333333, 0x33333333, x1, 796, x2)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x33333333, 0x66666666, x1, 800, x2)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff7bff, 0x33333333, -0xb504, x1, 804, x2)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0x3333b737, 0x33333333, 0xb504, x1, 808, x2)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x33333333, 0x33333333, 0x2, x1, 812, x2)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x33333333, 0x55555554, x1, 816, x2)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x33333333, 0x33333333, 0x0, x1, 820, x2)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x33333337, 0x33333333, 0x4, x1, 824, x2)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x33333333, 0x33333333, 0x33333332, x1, 828, x2)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x33333333, 0x66666665, x1, 832, x2)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0x3333b733, 0x33333333, 0xb503, x1, 836, x2)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x33333333, 0x55555556, x1, 840, x2)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbb, 0x33333333, -0x55555555, x1, 844, x2)
+
+inst_212:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x33333337, 0x33333333, 0x6, x1, 848, x2)
+
+inst_213:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x33333337, 0x33333333, 0x33333334, x1, 852, x2)
+
+inst_214:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x33333333, 0x66666667, x1, 856, x2)
+
+inst_215:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff7bff, 0x33333333, -0xb503, x1, 860, x2)
+
+inst_216:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0x3333b737, 0x33333333, 0xb505, x1, 864, x2)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666666, 0x3, x1, 868, x2)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x66666666, 0x55555555, x1, 872, x2)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeee, 0x66666666, -0x55555556, x1, 876, x2)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666666, 0x5, x1, 880, x2)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x66666666, 0x33333333, x1, 884, x2)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x66666666, 0x66666666, 0x66666666, x1, 888, x2)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff6efe, 0x66666666, -0xb504, x1, 892, x2)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0x6666f766, 0x66666666, 0xb504, x1, 896, x2)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x66666666, 0x66666666, 0x2, x1, 900, x2)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x66666666, 0x55555554, x1, 904, x2)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x66666666, 0x66666666, 0x0, x1, 908, x2)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x66666666, 0x66666666, 0x4, x1, 912, x2)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x66666666, 0x33333332, x1, 916, x2)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666666, 0x66666665, x1, 920, x2)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0x6666f767, 0x66666666, 0xb503, x1, 924, x2)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x66666666, 0x55555556, x1, 928, x2)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeef, 0x66666666, -0x55555555, x1, 932, x2)
+
+inst_234:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x66666666, 0x66666666, 0x6, x1, 936, x2)
+
+inst_235:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x66666666, 0x33333334, x1, 940, x2)
+
+inst_236:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666666, 0x66666667, x1, 944, x2)
+
+inst_237:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff6eff, 0x66666666, -0xb503, x1, 948, x2)
+
+inst_238:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0x6666f767, 0x66666666, 0xb505, x1, 952, x2)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xffff4aff, -0xb504, 0x3, x1, 956, x2)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xffff5ffd, -0xb504, 0x55555555, x1, 960, x2)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xffffeafe, -0xb504, -0x55555556, x1, 964, x2)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xffff4afd, -0xb504, 0x5, x1, 968, x2)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0xffff7bff, -0xb504, 0x33333333, x1, 972, x2)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0xffff6efe, -0xb504, 0x66666666, x1, 976, x2)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff4afc, -0xb504, -0xb504, x1, 980, x2)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0xfffffffc, -0xb504, 0xb504, x1, 984, x2)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xffff4afe, -0xb504, 0x2, x1, 988, x2)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0xffff5ffc, -0xb504, 0x55555554, x1, 992, x2)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xffff4afc, -0xb504, 0x0, x1, 996, x2)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xffff4afc, -0xb504, 0x4, x1, 1000, x2)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0xffff7bfe, -0xb504, 0x33333332, x1, 1004, x2)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0xffff6efd, -0xb504, 0x66666665, x1, 1008, x2)
+
+inst_253:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0xb504, 0xb503, x1, 1012, x2)
+
+inst_254:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xffff5ffe, -0xb504, 0x55555556, x1, 1016, x2)
+
+inst_255:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xffffeaff, -0xb504, -0x55555555, x1, 1020, x2)
+
+inst_256:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xffff4afe, -0xb504, 0x6, x1, 1024, x2)
+
+inst_257:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0xffff7bfc, -0xb504, 0x33333334, x1, 1028, x2)
+
+inst_258:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0xffff6eff, -0xb504, 0x66666667, x1, 1032, x2)
+
+inst_259:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff4afd, -0xb504, -0xb503, x1, 1036, x2)
+
+inst_260:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0xfffffffd, -0xb504, 0xb505, x1, 1040, x2)
+
+inst_261:
+// rs1_val==46340 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0xb504, 0x3, x1, 1044, x2)
+
+inst_262:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x5555f555, 0xb504, 0x55555555, x1, 1048, x2)
+
+inst_263:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaabfae, 0xb504, -0x55555556, x1, 1052, x2)
+
+inst_264:
+// rs1_val==46340 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xb505, 0xb504, 0x5, x1, 1056, x2)
+
+inst_265:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x3333b737, 0xb504, 0x33333333, x1, 1060, x2)
+
+inst_266:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x6666f766, 0xb504, 0x66666666, x1, 1064, x2)
+
+inst_267:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xfffffffc, 0xb504, -0xb504, x1, 1068, x2)
+
+inst_268:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0xb504, 0xb504, 0xb504, x1, 1072, x2)
+
+inst_269:
+// rs1_val==46340 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xb506, 0xb504, 0x2, x1, 1076, x2)
+
+inst_270:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x5555f554, 0xb504, 0x55555554, x1, 1080, x2)
+
+inst_271:
+// rs1_val==46340 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xb504, 0xb504, 0x0, x1, 1084, x2)
+
+inst_272:
+// rs1_val==46340 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xb504, 0xb504, 0x4, x1, 1088, x2)
+
+inst_273:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x3333b736, 0xb504, 0x33333332, x1, 1092, x2)
+
+inst_274:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x6666f765, 0xb504, 0x66666665, x1, 1096, x2)
+
+inst_275:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0xb504, 0xb503, x1, 1100, x2)
+
+inst_276:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x5555f556, 0xb504, 0x55555556, x1, 1104, x2)
+
+inst_277:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaabfaf, 0xb504, -0x55555555, x1, 1108, x2)
+
+inst_278:
+// rs1_val==46340 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xb506, 0xb504, 0x6, x1, 1112, x2)
+
+inst_279:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x3333b734, 0xb504, 0x33333334, x1, 1116, x2)
+
+inst_280:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x6666f767, 0xb504, 0x66666667, x1, 1120, x2)
+
+inst_281:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xfffffffd, 0xb504, -0xb503, x1, 1124, x2)
+
+inst_282:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0xb505, 0xb504, 0xb505, x1, 1128, x2)
+
+inst_283:
+// rs1_val==2 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x3, 0x2, 0x3, x1, 1132, x2)
+
+inst_284:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x2, 0x55555555, x1, 1136, x2)
+
+inst_285:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaa, 0x2, -0x55555556, x1, 1140, x2)
+
+inst_286:
+// rs1_val==2 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x2, 0x5, x1, 1144, x2)
+
+inst_287:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x33333333, 0x2, 0x33333333, x1, 1148, x2)
+
+inst_288:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x66666666, 0x2, 0x66666666, x1, 1152, x2)
+
+inst_289:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff4afe, 0x2, -0xb504, x1, 1156, x2)
+
+inst_290:
+// rs1_val==2 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0xb506, 0x2, 0xb504, x1, 1160, x2)
+
+inst_291:
+// rs1_val==2 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x2, 0x2, 0x2, x1, 1164, x2)
+
+inst_292:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x2, 0x55555554, x1, 1168, x2)
+
+inst_293:
+// rs1_val==2 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x2, 0x2, 0x0, x1, 1172, x2)
+
+inst_294:
+// rs1_val==2 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x2, 0x4, x1, 1176, x2)
+
+inst_295:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x33333332, 0x2, 0x33333332, x1, 1180, x2)
+
+inst_296:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x2, 0x66666665, x1, 1184, x2)
+
+inst_297:
+// rs1_val==2 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xb503, 0x2, 0xb503, x1, 1188, x2)
+
+inst_298:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x2, 0x55555556, x1, 1192, x2)
+
+inst_299:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaab, 0x2, -0x55555555, x1, 1196, x2)
+
+inst_300:
+// rs1_val==2 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x2, 0x6, x1, 1200, x2)
+
+inst_301:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x33333336, 0x2, 0x33333334, x1, 1204, x2)
+
+inst_302:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x2, 0x66666667, x1, 1208, x2)
+
+inst_303:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff4aff, 0x2, -0xb503, x1, 1212, x2)
+
+inst_304:
+// rs1_val==2 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0x2, 0xb505, x1, 1216, x2)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x55555554, 0x3, x1, 1220, x2)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x55555555, 0x55555554, 0x55555555, x1, 1224, x2)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xfffffffe, 0x55555554, -0x55555556, x1, 1228, x2)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x55555555, 0x55555554, 0x5, x1, 1232, x2)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x55555554, 0x33333333, x1, 1236, x2)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x55555554, 0x66666666, x1, 1240, x2)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff5ffc, 0x55555554, -0xb504, x1, 1244, x2)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0x5555f554, 0x55555554, 0xb504, x1, 1248, x2)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x55555554, 0x2, x1, 1252, x2)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x55555554, 0x55555554, 0x55555554, x1, 1256, x2)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x55555554, 0x55555554, 0x0, x1, 1260, x2)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x55555554, 0x55555554, 0x4, x1, 1264, x2)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x55555554, 0x33333332, x1, 1268, x2)
+
+inst_318:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x77777775, 0x55555554, 0x66666665, x1, 1272, x2)
+
+inst_319:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0x5555f557, 0x55555554, 0xb503, x1, 1276, x2)
+
+inst_320:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x55555554, 0x55555556, x1, 1280, x2)
+
+inst_321:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, 0x55555554, -0x55555555, x1, 1284, x2)
+
+inst_322:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x55555554, 0x6, x1, 1288, x2)
+
+inst_323:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x77777774, 0x55555554, 0x33333334, x1, 1292, x2)
+
+inst_324:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x55555554, 0x66666667, x1, 1296, x2)
+
+inst_325:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff5ffd, 0x55555554, -0xb503, x1, 1300, x2)
+
+inst_326:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0x5555f555, 0x55555554, 0xb505, x1, 1304, x2)
+
+inst_327:
+// rs1_val==0 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x3, 0x0, 0x3, x1, 1308, x2)
+
+inst_328:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x55555555, 0x0, 0x55555555, x1, 1312, x2)
+
+inst_329:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaa, 0x0, -0x55555556, x1, 1316, x2)
+
+inst_330:
+// rs1_val==0 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x5, 0x0, 0x5, x1, 1320, x2)
+
+inst_331:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x33333333, 0x0, 0x33333333, x1, 1324, x2)
+
+inst_332:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x66666666, 0x0, 0x66666666, x1, 1328, x2)
+
+inst_333:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff4afc, 0x0, -0xb504, x1, 1332, x2)
+
+inst_334:
+// rs1_val==0 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0xb504, 0x0, 0xb504, x1, 1336, x2)
+
+inst_335:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffffeaff, -0x55555555, -0xb503, x1, 1340, x2)
+
+inst_336:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0xaaaabfaf, -0x55555555, 0xb505, x1, 1344, x2)
+
+inst_337:
+// rs1_val==6 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x6, 0x3, x1, 1348, x2)
+
+inst_338:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x6, 0x55555555, x1, 1352, x2)
+
+inst_339:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaae, 0x6, -0x55555556, x1, 1356, x2)
+
+inst_340:
+// rs1_val==6 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x6, 0x5, x1, 1360, x2)
+
+inst_341:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x33333337, 0x6, 0x33333333, x1, 1364, x2)
+
+inst_342:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x66666666, 0x6, 0x66666666, x1, 1368, x2)
+
+inst_343:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff4afe, 0x6, -0xb504, x1, 1372, x2)
+
+inst_344:
+// rs1_val==6 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0xb506, 0x6, 0xb504, x1, 1376, x2)
+
+inst_345:
+// rs1_val==6 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x6, 0x2, x1, 1380, x2)
+
+inst_346:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x6, 0x55555554, x1, 1384, x2)
+
+inst_347:
+// rs1_val==6 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x6, 0x0, x1, 1388, x2)
+
+inst_348:
+// rs1_val==6 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x6, 0x4, x1, 1392, x2)
+
+inst_349:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x33333336, 0x6, 0x33333332, x1, 1396, x2)
+
+inst_350:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x6, 0x66666665, x1, 1400, x2)
+
+inst_351:
+// rs1_val==6 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0x6, 0xb503, x1, 1404, x2)
+
+inst_352:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x6, 0x55555556, x1, 1408, x2)
+
+inst_353:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaf, 0x6, -0x55555555, x1, 1412, x2)
+
+inst_354:
+// rs1_val==6 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x6, 0x6, x1, 1416, x2)
+
+inst_355:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x33333336, 0x6, 0x33333334, x1, 1420, x2)
+
+inst_356:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x6, 0x66666667, x1, 1424, x2)
+
+inst_357:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff4aff, 0x6, -0xb503, x1, 1428, x2)
+
+inst_358:
+// rs1_val==6 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0x6, 0xb505, x1, 1432, x2)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x33333337, 0x33333334, 0x3, x1, 1436, x2)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x77777775, 0x33333334, 0x55555555, x1, 1440, x2)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbe, 0x33333334, -0x55555556, x1, 1444, x2)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x33333335, 0x33333334, 0x5, x1, 1448, x2)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x33333337, 0x33333334, 0x33333333, x1, 1452, x2)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x33333334, 0x66666666, x1, 1456, x2)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff7bfc, 0x33333334, -0xb504, x1, 1460, x2)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0x3333b734, 0x33333334, 0xb504, x1, 1464, x2)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x33333336, 0x33333334, 0x2, x1, 1468, x2)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x77777774, 0x33333334, 0x55555554, x1, 1472, x2)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x33333334, 0x33333334, 0x0, x1, 1476, x2)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x33333334, 0x33333334, 0x4, x1, 1480, x2)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x33333336, 0x33333334, 0x33333332, x1, 1484, x2)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x77777775, 0x33333334, 0x66666665, x1, 1488, x2)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0x3333b737, 0x33333334, 0xb503, x1, 1492, x2)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x33333334, 0x55555556, x1, 1496, x2)
+
+inst_375:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbf, 0x33333334, -0x55555555, x1, 1500, x2)
+
+inst_376:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x33333336, 0x33333334, 0x6, x1, 1504, x2)
+
+inst_377:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x33333334, 0x33333334, 0x33333334, x1, 1508, x2)
+
+inst_378:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x33333334, 0x66666667, x1, 1512, x2)
+
+inst_379:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff7bfd, 0x33333334, -0xb503, x1, 1516, x2)
+
+inst_380:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0x3333b735, 0x33333334, 0xb505, x1, 1520, x2)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666667, 0x3, x1, 1524, x2)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x66666667, 0x55555555, x1, 1528, x2)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeef, 0x66666667, -0x55555556, x1, 1532, x2)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666667, 0x5, x1, 1536, x2)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x66666667, 0x33333333, x1, 1540, x2)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666667, 0x66666666, x1, 1544, x2)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff6eff, 0x66666667, -0xb504, x1, 1548, x2)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0x6666f767, 0x66666667, 0xb504, x1, 1552, x2)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666667, 0x2, x1, 1556, x2)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x66666667, 0x55555554, x1, 1560, x2)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666667, 0x0, x1, 1564, x2)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666667, 0x4, x1, 1568, x2)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x66666667, 0x33333332, x1, 1572, x2)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666667, 0x66666665, x1, 1576, x2)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0x6666f767, 0x66666667, 0xb503, x1, 1580, x2)
+
+inst_396:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x66666667, 0x55555556, x1, 1584, x2)
+
+inst_397:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeef, 0x66666667, -0x55555555, x1, 1588, x2)
+
+inst_398:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666667, 0x6, x1, 1592, x2)
+
+inst_399:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x66666667, 0x33333334, x1, 1596, x2)
+
+inst_400:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666667, 0x66666667, x1, 1600, x2)
+
+inst_401:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff6eff, 0x66666667, -0xb503, x1, 1604, x2)
+
+inst_402:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0x6666f767, 0x66666667, 0xb505, x1, 1608, x2)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xffff4aff, -0xb503, 0x3, x1, 1612, x2)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xffff5ffd, -0xb503, 0x55555555, x1, 1616, x2)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xffffeaff, -0xb503, -0x55555556, x1, 1620, x2)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xffff4afd, -0xb503, 0x5, x1, 1624, x2)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0xffff7bff, -0xb503, 0x33333333, x1, 1628, x2)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0xffff6eff, -0xb503, 0x66666666, x1, 1632, x2)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff4afd, -0xb503, -0xb504, x1, 1636, x2)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0xfffffffd, -0xb503, 0xb504, x1, 1640, x2)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xffff4aff, -0xb503, 0x2, x1, 1644, x2)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0xffff5ffd, -0xb503, 0x55555554, x1, 1648, x2)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xffff4afd, -0xb503, 0x0, x1, 1652, x2)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xffff4afd, -0xb503, 0x4, x1, 1656, x2)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0xffff7bff, -0xb503, 0x33333332, x1, 1660, x2)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0xffff6efd, -0xb503, 0x66666665, x1, 1664, x2)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0xb503, 0xb503, x1, 1668, x2)
+
+inst_418:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xffff5fff, -0xb503, 0x55555556, x1, 1672, x2)
+
+inst_419:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xffffeaff, -0xb503, -0x55555555, x1, 1676, x2)
+
+inst_420:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xffff4aff, -0xb503, 0x6, x1, 1680, x2)
+
+inst_421:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0xffff7bfd, -0xb503, 0x33333334, x1, 1684, x2)
+
+inst_422:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0xffff6eff, -0xb503, 0x66666667, x1, 1688, x2)
+
+inst_423:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff4afd, -0xb503, -0xb503, x1, 1692, x2)
+
+inst_424:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0xfffffffd, -0xb503, 0xb505, x1, 1696, x2)
+
+inst_425:
+// rs1_val==46341 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0xb505, 0x3, x1, 1700, x2)
+
+inst_426:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x5555f555, 0xb505, 0x55555555, x1, 1704, x2)
+
+inst_427:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaabfaf, 0xb505, -0x55555556, x1, 1708, x2)
+
+inst_428:
+// rs1_val==46341 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xb505, 0xb505, 0x5, x1, 1712, x2)
+
+inst_429:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x3333b737, 0xb505, 0x33333333, x1, 1716, x2)
+
+inst_430:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x6666f767, 0xb505, 0x66666666, x1, 1720, x2)
+
+inst_431:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xfffffffd, 0xb505, -0xb504, x1, 1724, x2)
+
+inst_432:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0xb505, 0xb505, 0xb504, x1, 1728, x2)
+
+inst_433:
+// rs1_val==46341 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0xb505, 0x2, x1, 1732, x2)
+
+inst_434:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x5555f555, 0xb505, 0x55555554, x1, 1736, x2)
+
+inst_435:
+// rs1_val==46341 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xb505, 0xb505, 0x0, x1, 1740, x2)
+
+inst_436:
+// rs1_val==46341 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xb505, 0xb505, 0x4, x1, 1744, x2)
+
+inst_437:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x3333b737, 0xb505, 0x33333332, x1, 1748, x2)
+
+inst_438:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x6666f765, 0xb505, 0x66666665, x1, 1752, x2)
+
+inst_439:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0xb505, 0xb503, x1, 1756, x2)
+
+inst_440:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x5555f557, 0xb505, 0x55555556, x1, 1760, x2)
+
+inst_441:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaabfaf, 0xb505, -0x55555555, x1, 1764, x2)
+
+inst_442:
+// rs1_val==46341 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0xb505, 0x6, x1, 1768, x2)
+
+inst_443:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x3333b735, 0xb505, 0x33333334, x1, 1772, x2)
+
+inst_444:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x6666f767, 0xb505, 0x66666667, x1, 1776, x2)
+
+inst_445:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xfffffffd, 0xb505, -0xb503, x1, 1780, x2)
+
+inst_446:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb505; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0xb505, 0xb505, 0xb505, x1, 1784, x2)
+
+inst_447:
+// rs1_val==0 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x2, 0x0, 0x2, x1, 1788, x2)
+
+inst_448:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x55555554, 0x0, 0x55555554, x1, 1792, x2)
+
+inst_449:
+// rs1_val==0 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x0, 0x0, 0x0, x1, 1796, x2)
+
+inst_450:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x33333332, 0x0, 0x33333332, x1, 1800, x2)
+
+inst_451:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x66666665, 0x0, 0x66666665, x1, 1804, x2)
+
+inst_452:
+// rs1_val==0 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xb503, 0x0, 0xb503, x1, 1808, x2)
+
+inst_453:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x0, 0x55555556, x1, 1812, x2)
+
+inst_454:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaab, 0x0, -0x55555555, x1, 1816, x2)
+
+inst_455:
+// rs1_val==0 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x0, 0x6, x1, 1820, x2)
+
+inst_456:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x33333334, 0x0, 0x33333334, x1, 1824, x2)
+
+inst_457:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x0, 0x66666667, x1, 1828, x2)
+
+inst_458:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff4afd, 0x0, -0xb503, x1, 1832, x2)
+
+inst_459:
+// rs1_val==0 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0xb505, 0x0, 0xb505, x1, 1836, x2)
+
+inst_460:
+// rs1_val==4 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x4, 0x3, x1, 1840, x2)
+
+inst_461:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x55555555, 0x4, 0x55555555, x1, 1844, x2)
+
+inst_462:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaae, 0x4, -0x55555556, x1, 1848, x2)
+
+inst_463:
+// rs1_val==4 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x5, 0x4, 0x5, x1, 1852, x2)
+
+inst_464:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x33333337, 0x4, 0x33333333, x1, 1856, x2)
+
+inst_465:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x66666666, 0x4, 0x66666666, x1, 1860, x2)
+
+inst_466:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff4afc, 0x4, -0xb504, x1, 1864, x2)
+
+inst_467:
+// rs1_val==4 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0xb504, 0x4, 0xb504, x1, 1868, x2)
+
+inst_468:
+// rs1_val==4 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x4, 0x2, x1, 1872, x2)
+
+inst_469:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x55555554, 0x4, 0x55555554, x1, 1876, x2)
+
+inst_470:
+// rs1_val==4 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x4, 0x4, 0x0, x1, 1880, x2)
+
+inst_471:
+// rs1_val==4 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x4, 0x4, 0x4, x1, 1884, x2)
+
+inst_472:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x33333336, 0x4, 0x33333332, x1, 1888, x2)
+
+inst_473:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x66666665, 0x4, 0x66666665, x1, 1892, x2)
+
+inst_474:
+// rs1_val==4 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0x4, 0xb503, x1, 1896, x2)
+
+inst_475:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x4, 0x55555556, x1, 1900, x2)
+
+inst_476:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaf, 0x4, -0x55555555, x1, 1904, x2)
+
+inst_477:
+// rs1_val==4 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x4, 0x6, x1, 1908, x2)
+
+inst_478:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x33333334, 0x4, 0x33333334, x1, 1912, x2)
+
+inst_479:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x4, 0x66666667, x1, 1916, x2)
+
+inst_480:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff4afd, 0x4, -0xb503, x1, 1920, x2)
+
+inst_481:
+// rs1_val==4 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0xb505, 0x4, 0xb505, x1, 1924, x2)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x33333333, 0x33333332, 0x3, x1, 1928, x2)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x33333332, 0x55555555, x1, 1932, x2)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbba, 0x33333332, -0x55555556, x1, 1936, x2)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x33333337, 0x33333332, 0x5, x1, 1940, x2)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x33333333, 0x33333332, 0x33333333, x1, 1944, x2)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x33333332, 0x66666666, x1, 1948, x2)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff7bfe, 0x33333332, -0xb504, x1, 1952, x2)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0x3333b736, 0x33333332, 0xb504, x1, 1956, x2)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x33333332, 0x33333332, 0x2, x1, 1960, x2)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x33333332, 0x55555554, x1, 1964, x2)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x33333332, 0x33333332, 0x0, x1, 1968, x2)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x33333336, 0x33333332, 0x4, x1, 1972, x2)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x33333332, 0x33333332, 0x33333332, x1, 1976, x2)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x33333332, 0x66666665, x1, 1980, x2)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0x3333b733, 0x33333332, 0xb503, x1, 1984, x2)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x33333332, 0x55555556, x1, 1988, x2)
+
+inst_498:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbb, 0x33333332, -0x55555555, x1, 1992, x2)
+
+inst_499:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x33333336, 0x33333332, 0x6, x1, 1996, x2)
+
+inst_500:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x33333336, 0x33333332, 0x33333334, x1, 2000, x2)
+
+inst_501:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x33333332, 0x66666667, x1, 2004, x2)
+
+inst_502:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff7bff, 0x33333332, -0xb503, x1, 2008, x2)
+
+inst_503:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0x3333b737, 0x33333332, 0xb505, x1, 2012, x2)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666665, 0x3, x1, 2016, x2)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x77777775, 0x66666665, 0x55555555, x1, 2020, x2)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeef, 0x66666665, -0x55555556, x1, 2024, x2)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x66666665, 0x66666665, 0x5, x1, 2028, x2)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x66666665, 0x33333333, x1, 2032, x2)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666665, 0x66666666, x1, 2036, x2)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff6efd, 0x66666665, -0xb504, x1, 2040, x2)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0x6666f765, 0x66666665, 0xb504, x1, 2044, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666665, 0x2, x1, 0, x2)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x77777775, 0x66666665, 0x55555554, x1, 4, x2)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x66666665, 0x66666665, 0x0, x1, 8, x2)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x66666665, 0x66666665, 0x4, x1, 12, x2)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x66666665, 0x33333332, x1, 16, x2)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x66666665, 0x66666665, 0x66666665, x1, 20, x2)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0x6666f767, 0x66666665, 0xb503, x1, 24, x2)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x66666665, 0x55555556, x1, 28, x2)
+
+inst_520:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeef, 0x66666665, -0x55555555, x1, 32, x2)
+
+inst_521:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666665, 0x6, x1, 36, x2)
+
+inst_522:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x77777775, 0x66666665, 0x33333334, x1, 40, x2)
+
+inst_523:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x66666667, 0x66666665, 0x66666667, x1, 44, x2)
+
+inst_524:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff6efd, 0x66666665, -0xb503, x1, 48, x2)
+
+inst_525:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0x6666f765, 0x66666665, 0xb505, x1, 52, x2)
+
+inst_526:
+// rs1_val==46339 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xb503, 0xb503, 0x3, x1, 56, x2)
+
+inst_527:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x5555f557, 0xb503, 0x55555555, x1, 60, x2)
+
+inst_528:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaabfab, 0xb503, -0x55555556, x1, 64, x2)
+
+inst_529:
+// rs1_val==46339 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0xb503, 0x5, x1, 68, x2)
+
+inst_530:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x3333b733, 0xb503, 0x33333333, x1, 72, x2)
+
+inst_531:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x6666f767, 0xb503, 0x66666666, x1, 76, x2)
+
+inst_532:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, 0xb503, -0xb504, x1, 80, x2)
+
+inst_533:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0xb503, 0xb504, x1, 84, x2)
+
+inst_534:
+// rs1_val==46339 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xb503, 0xb503, 0x2, x1, 88, x2)
+
+inst_535:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x5555f557, 0xb503, 0x55555554, x1, 92, x2)
+
+inst_536:
+// rs1_val==46339 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xb503, 0xb503, 0x0, x1, 96, x2)
+
+inst_537:
+// rs1_val==46339 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0xb503, 0x4, x1, 100, x2)
+
+inst_538:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x3333b733, 0xb503, 0x33333332, x1, 104, x2)
+
+inst_539:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x6666f767, 0xb503, 0x66666665, x1, 108, x2)
+
+inst_540:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xb503, 0xb503, 0xb503, x1, 112, x2)
+
+inst_541:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x5555f557, 0xb503, 0x55555556, x1, 116, x2)
+
+inst_542:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaabfab, 0xb503, -0x55555555, x1, 120, x2)
+
+inst_543:
+// rs1_val==46339 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0xb503, 0x6, x1, 124, x2)
+
+inst_544:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x3333b737, 0xb503, 0x33333334, x1, 128, x2)
+
+inst_545:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x6666f767, 0xb503, 0x66666667, x1, 132, x2)
+
+inst_546:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, 0xb503, -0xb503, x1, 136, x2)
+
+inst_547:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb503; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0xb507, 0xb503, 0xb505, x1, 140, x2)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x55555556, 0x3, x1, 144, x2)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x55555556, 0x55555555, x1, 148, x2)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xfffffffe, 0x55555556, -0x55555556, x1, 152, x2)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x55555557, 0x55555556, 0x5, x1, 156, x2)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x55555556, 0x33333333, x1, 160, x2)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x55555556, 0x66666666, x1, 164, x2)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffff5ffe, 0x55555556, -0xb504, x1, 168, x2)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0x5555f556, 0x55555556, 0xb504, x1, 172, x2)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x55555556, 0x2, x1, 176, x2)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x55555556, 0x55555554, x1, 180, x2)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x55555556, 0x0, x1, 184, x2)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x55555556, 0x4, x1, 188, x2)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x55555556, 0x33333332, x1, 192, x2)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x55555556, 0x66666665, x1, 196, x2)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0x5555f557, 0x55555556, 0xb503, x1, 200, x2)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x55555556, 0x55555556, x1, 204, x2)
+
+inst_564:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, 0x55555556, -0x55555555, x1, 208, x2)
+
+inst_565:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x55555556, 0x55555556, 0x6, x1, 212, x2)
+
+inst_566:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0x77777776, 0x55555556, 0x33333334, x1, 216, x2)
+
+inst_567:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0x77777777, 0x55555556, 0x66666667, x1, 220, x2)
+
+inst_568:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb503
+TEST_CR_OP( c.or, x10, x11, 0xffff5fff, 0x55555556, -0xb503, x1, 224, x2)
+
+inst_569:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb505
+TEST_CR_OP( c.or, x10, x11, 0x5555f557, 0x55555556, 0xb505, x1, 228, x2)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaab, -0x55555555, 0x3, x1, 232, x2)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x55555555, 0x55555555, x1, 236, x2)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaab, -0x55555555, -0x55555556, x1, 240, x2)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaf, -0x55555555, 0x5, x1, 244, x2)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333333
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbb, -0x55555555, 0x33333333, x1, 248, x2)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666666
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeef, -0x55555555, 0x66666666, x1, 252, x2)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb504
+TEST_CR_OP( c.or, x10, x11, 0xffffeaff, -0x55555555, -0xb504, x1, 256, x2)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb504
+TEST_CR_OP( c.or, x10, x11, 0xaaaabfaf, -0x55555555, 0xb504, x1, 260, x2)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaab, -0x55555555, 0x2, x1, 264, x2)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555554
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x55555555, 0x55555554, x1, 268, x2)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaab, -0x55555555, 0x0, x1, 272, x2)
+
+inst_581:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaf, -0x55555555, 0x4, x1, 276, x2)
+
+inst_582:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333332
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbb, -0x55555555, 0x33333332, x1, 280, x2)
+
+inst_583:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666665
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeef, -0x55555555, 0x66666665, x1, 284, x2)
+
+inst_584:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb503
+TEST_CR_OP( c.or, x10, x11, 0xaaaabfab, -0x55555555, 0xb503, x1, 288, x2)
+
+inst_585:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555556
+TEST_CR_OP( c.or, x10, x11, 0xffffffff, -0x55555555, 0x55555556, x1, 292, x2)
+
+inst_586:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaab, -0x55555555, -0x55555555, x1, 296, x2)
+
+inst_587:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaf, -0x55555555, 0x6, x1, 300, x2)
+
+inst_588:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333334
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbf, -0x55555555, 0x33333334, x1, 304, x2)
+
+inst_589:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666667
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeef, -0x55555555, 0x66666667, x1, 308, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 78*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cslli-01.S b/riscof/suite/rv32i_m/C/cslli-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..dc5b68f82cf8bfd67e47ee65ffcb7b5940f02b36
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cslli-01.S
@@ -0,0 +1,499 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.slli instruction of the RISC-V C extension for the cslli covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cslli)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rd==x11, rs1_val < 0 and imm_val < xlen,
+// opcode:c.slli; op1:x11; dest:x11 op1val:-0xa; immval:0x12
+TEST_CI_OP( c.slli, x11, 0xffd80000, -0xa, 0x12, x1, 0, x2)
+
+inst_1:
+// rd==x9, rs1_val > 0 and imm_val < xlen, imm_val == 23, rs1_val == 1 and imm_val != 0 and imm_val < xlen, rs1_val == 1
+// opcode:c.slli; op1:x9; dest:x9 op1val:0x1; immval:0x17
+TEST_CI_OP( c.slli, x9, 0x800000, 0x1, 0x17, x1, 4, x2)
+
+inst_2:
+// rd==x10, rs1_val == imm_val and imm_val != 0 and imm_val < xlen, rs1_val == 4, rs1_val==4, imm_val == 4
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x4; immval:0x4
+TEST_CI_OP( c.slli, x10, 0x40, 0x4, 0x4, x1, 8, x2)
+
+inst_3:
+// rd==x12, rs1_val == (-2**(xlen-1)) and imm_val != 0 and imm_val < xlen, rs1_val == -2147483648
+// opcode:c.slli; op1:x12; dest:x12 op1val:-0x80000000; immval:0x11
+TEST_CI_OP( c.slli, x12, 0x0, -0x80000000, 0x11, x1, 12, x2)
+
+inst_4:
+// rd==x13, rs1_val == 0 and imm_val != 0 and imm_val < xlen, imm_val == 21, rs1_val==0
+// opcode:c.slli; op1:x13; dest:x13 op1val:0x0; immval:0x15
+TEST_CI_OP( c.slli, x13, 0x0, 0x0, 0x15, x1, 16, x2)
+
+inst_5:
+// rd==x14, rs1_val == (2**(xlen-1)-1) and imm_val != 0 and imm_val < xlen, imm_val == 29, rs1_val == 2147483647
+// opcode:c.slli; op1:x14; dest:x14 op1val:0x7fffffff; immval:0x1d
+TEST_CI_OP( c.slli, x14, 0xe0000000, 0x7fffffff, 0x1d, x1, 20, x2)
+
+inst_6:
+// rd==x8, rs1_val == 2, rs1_val==2
+// opcode:c.slli; op1:x8; dest:x8 op1val:0x2; immval:0xc
+TEST_CI_OP( c.slli, x8, 0x2000, 0x2, 0xc, x1, 24, x2)
+
+inst_7:
+// rd==x15, rs1_val == 8,
+// opcode:c.slli; op1:x15; dest:x15 op1val:0x8; immval:0x5
+TEST_CI_OP( c.slli, x15, 0x100, 0x8, 0x5, x1, 28, x2)
+
+inst_8:
+// rs1_val == 16,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x10; immval:0x1f
+TEST_CI_OP( c.slli, x10, 0x0, 0x10, 0x1f, x1, 32, x2)
+
+inst_9:
+// rs1_val == 32, imm_val == 10
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x20; immval:0xa
+TEST_CI_OP( c.slli, x10, 0x8000, 0x20, 0xa, x1, 36, x2)
+
+inst_10:
+// rs1_val == 64, imm_val == 27
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x40; immval:0x1b
+TEST_CI_OP( c.slli, x10, 0x0, 0x40, 0x1b, x1, 40, x2)
+
+inst_11:
+// rs1_val == 128,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x80; immval:0x12
+TEST_CI_OP( c.slli, x10, 0x2000000, 0x80, 0x12, x1, 44, x2)
+
+inst_12:
+// rs1_val == 256,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x100; immval:0x4
+TEST_CI_OP( c.slli, x10, 0x1000, 0x100, 0x4, x1, 48, x2)
+
+inst_13:
+// rs1_val == 512,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x200; immval:0xc
+TEST_CI_OP( c.slli, x10, 0x200000, 0x200, 0xc, x1, 52, x2)
+
+inst_14:
+// rs1_val == 1024,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x400; immval:0xb
+TEST_CI_OP( c.slli, x10, 0x200000, 0x400, 0xb, x1, 56, x2)
+
+inst_15:
+// rs1_val == 2048, imm_val == 8
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x800; immval:0x8
+TEST_CI_OP( c.slli, x10, 0x80000, 0x800, 0x8, x1, 60, x2)
+
+inst_16:
+// rs1_val == 4096,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x1000; immval:0x6
+TEST_CI_OP( c.slli, x10, 0x40000, 0x1000, 0x6, x1, 64, x2)
+
+inst_17:
+// rs1_val == 8192,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x2000; immval:0xd
+TEST_CI_OP( c.slli, x10, 0x4000000, 0x2000, 0xd, x1, 68, x2)
+
+inst_18:
+// rs1_val == 16384,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x4000; immval:0x7
+TEST_CI_OP( c.slli, x10, 0x200000, 0x4000, 0x7, x1, 72, x2)
+
+inst_19:
+// rs1_val == 32768,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x8000; immval:0xc
+TEST_CI_OP( c.slli, x10, 0x8000000, 0x8000, 0xc, x1, 76, x2)
+
+inst_20:
+// rs1_val == 65536, imm_val == 2
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x10000; immval:0x2
+TEST_CI_OP( c.slli, x10, 0x40000, 0x10000, 0x2, x1, 80, x2)
+
+inst_21:
+// rs1_val == 131072,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x20000; immval:0x12
+TEST_CI_OP( c.slli, x10, 0x0, 0x20000, 0x12, x1, 84, x2)
+
+inst_22:
+// rs1_val == 262144,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x40000; immval:0x3
+TEST_CI_OP( c.slli, x10, 0x200000, 0x40000, 0x3, x1, 88, x2)
+
+inst_23:
+// rs1_val == 524288,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x80000; immval:0xa
+TEST_CI_OP( c.slli, x10, 0x20000000, 0x80000, 0xa, x1, 92, x2)
+
+inst_24:
+// rs1_val == 1048576,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x100000; immval:0x5
+TEST_CI_OP( c.slli, x10, 0x2000000, 0x100000, 0x5, x1, 96, x2)
+
+inst_25:
+// rs1_val == 2097152,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x200000; immval:0x12
+TEST_CI_OP( c.slli, x10, 0x0, 0x200000, 0x12, x1, 100, x2)
+
+inst_26:
+// rs1_val == 4194304,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x400000; immval:0x1d
+TEST_CI_OP( c.slli, x10, 0x0, 0x400000, 0x1d, x1, 104, x2)
+
+inst_27:
+// rs1_val == 8388608,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x800000; immval:0x8
+TEST_CI_OP( c.slli, x10, 0x80000000, 0x800000, 0x8, x1, 108, x2)
+
+inst_28:
+// rs1_val == 16777216,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x1000000; immval:0x5
+TEST_CI_OP( c.slli, x10, 0x20000000, 0x1000000, 0x5, x1, 112, x2)
+
+inst_29:
+// rs1_val == 33554432,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x2000000; immval:0xb
+TEST_CI_OP( c.slli, x10, 0x0, 0x2000000, 0xb, x1, 116, x2)
+
+inst_30:
+// rs1_val == 67108864,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x4000000; immval:0xc
+TEST_CI_OP( c.slli, x10, 0x0, 0x4000000, 0xc, x1, 120, x2)
+
+inst_31:
+// rs1_val == 134217728,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x8000000; immval:0x7
+TEST_CI_OP( c.slli, x10, 0x0, 0x8000000, 0x7, x1, 124, x2)
+
+inst_32:
+// rs1_val == 268435456, imm_val == 16
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x10000000; immval:0x10
+TEST_CI_OP( c.slli, x10, 0x0, 0x10000000, 0x10, x1, 128, x2)
+
+inst_33:
+// rs1_val == 536870912,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x20000000; immval:0x11
+TEST_CI_OP( c.slli, x10, 0x0, 0x20000000, 0x11, x1, 132, x2)
+
+inst_34:
+// rs1_val == 1073741824,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x40000000; immval:0xd
+TEST_CI_OP( c.slli, x10, 0x0, 0x40000000, 0xd, x1, 136, x2)
+
+inst_35:
+// rs1_val == -2, imm_val == 15
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x2; immval:0xf
+TEST_CI_OP( c.slli, x10, 0xffff0000, -0x2, 0xf, x1, 140, x2)
+
+inst_36:
+// rs1_val == -3,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x3; immval:0x7
+TEST_CI_OP( c.slli, x10, 0xfffffe80, -0x3, 0x7, x1, 144, x2)
+
+inst_37:
+// rs1_val == -5,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x5; immval:0x11
+TEST_CI_OP( c.slli, x10, 0xfff60000, -0x5, 0x11, x1, 148, x2)
+
+inst_38:
+// rs1_val == -9,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x9; immval:0xb
+TEST_CI_OP( c.slli, x10, 0xffffb800, -0x9, 0xb, x1, 152, x2)
+
+inst_39:
+// rs1_val == -17,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x11; immval:0xf
+TEST_CI_OP( c.slli, x10, 0xfff78000, -0x11, 0xf, x1, 156, x2)
+
+inst_40:
+// rs1_val == -33,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x21; immval:0x1f
+TEST_CI_OP( c.slli, x10, 0x80000000, -0x21, 0x1f, x1, 160, x2)
+
+inst_41:
+// rs1_val == -65,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x41; immval:0x10
+TEST_CI_OP( c.slli, x10, 0xffbf0000, -0x41, 0x10, x1, 164, x2)
+
+inst_42:
+// rs1_val == -129,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x81; immval:0xc
+TEST_CI_OP( c.slli, x10, 0xfff7f000, -0x81, 0xc, x1, 168, x2)
+
+inst_43:
+// rs1_val == -257,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x101; immval:0x12
+TEST_CI_OP( c.slli, x10, 0xfbfc0000, -0x101, 0x12, x1, 172, x2)
+
+inst_44:
+// rs1_val == -513,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x201; immval:0x4
+TEST_CI_OP( c.slli, x10, 0xffffdff0, -0x201, 0x4, x1, 176, x2)
+
+inst_45:
+// rs1_val == -1025,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x401; immval:0x17
+TEST_CI_OP( c.slli, x10, 0xff800000, -0x401, 0x17, x1, 180, x2)
+
+inst_46:
+// rs1_val == -2049,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x801; immval:0xd
+TEST_CI_OP( c.slli, x10, 0xfeffe000, -0x801, 0xd, x1, 184, x2)
+
+inst_47:
+// rs1_val == -4097,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x1001; immval:0xc
+TEST_CI_OP( c.slli, x10, 0xfefff000, -0x1001, 0xc, x1, 188, x2)
+
+inst_48:
+// rs1_val == -8193, imm_val == 1
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x2001; immval:0x1
+TEST_CI_OP( c.slli, x10, 0xffffbffe, -0x2001, 0x1, x1, 192, x2)
+
+inst_49:
+// rs1_val == -16385,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x4001; immval:0xd
+TEST_CI_OP( c.slli, x10, 0xf7ffe000, -0x4001, 0xd, x1, 196, x2)
+
+inst_50:
+// rs1_val == -32769,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x8001; immval:0xf
+TEST_CI_OP( c.slli, x10, 0xbfff8000, -0x8001, 0xf, x1, 200, x2)
+
+inst_51:
+// rs1_val == -65537,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x10001; immval:0x7
+TEST_CI_OP( c.slli, x10, 0xff7fff80, -0x10001, 0x7, x1, 204, x2)
+
+inst_52:
+// rs1_val == -131073,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x20001; immval:0x2
+TEST_CI_OP( c.slli, x10, 0xfff7fffc, -0x20001, 0x2, x1, 208, x2)
+
+inst_53:
+// rs1_val == -262145,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x40001; immval:0x1f
+TEST_CI_OP( c.slli, x10, 0x80000000, -0x40001, 0x1f, x1, 212, x2)
+
+inst_54:
+// rs1_val == -524289,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x80001; immval:0x15
+TEST_CI_OP( c.slli, x10, 0xffe00000, -0x80001, 0x15, x1, 216, x2)
+
+inst_55:
+// rs1_val == -1048577,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x100001; immval:0x9
+TEST_CI_OP( c.slli, x10, 0xdffffe00, -0x100001, 0x9, x1, 220, x2)
+
+inst_56:
+// rs1_val == -2097153,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x200001; immval:0xd
+TEST_CI_OP( c.slli, x10, 0xffffe000, -0x200001, 0xd, x1, 224, x2)
+
+inst_57:
+// rs1_val == -33554433,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x2000001; immval:0x8
+TEST_CI_OP( c.slli, x10, 0xffffff00, -0x2000001, 0x8, x1, 228, x2)
+
+inst_58:
+// rs1_val == -67108865,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x4000001; immval:0x15
+TEST_CI_OP( c.slli, x10, 0xffe00000, -0x4000001, 0x15, x1, 232, x2)
+
+inst_59:
+// rs1_val == -134217729,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x8000001; immval:0xf
+TEST_CI_OP( c.slli, x10, 0xffff8000, -0x8000001, 0xf, x1, 236, x2)
+
+inst_60:
+// rs1_val == -268435457,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x10000001; immval:0x8
+TEST_CI_OP( c.slli, x10, 0xffffff00, -0x10000001, 0x8, x1, 240, x2)
+
+inst_61:
+// rs1_val == -536870913,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x20000001; immval:0x13
+TEST_CI_OP( c.slli, x10, 0xfff80000, -0x20000001, 0x13, x1, 244, x2)
+
+inst_62:
+// rs1_val == -1073741825,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x40000001; immval:0xa
+TEST_CI_OP( c.slli, x10, 0xfffffc00, -0x40000001, 0xa, x1, 248, x2)
+
+inst_63:
+// rs1_val == 1431655765, rs1_val==1431655765
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x55555555; immval:0x2
+TEST_CI_OP( c.slli, x10, 0x55555554, 0x55555555, 0x2, x1, 252, x2)
+
+inst_64:
+// rs1_val == -1431655766, rs1_val==-1431655766
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x55555556; immval:0x1
+TEST_CI_OP( c.slli, x10, 0x55555554, -0x55555556, 0x1, x1, 256, x2)
+
+inst_65:
+// rs1_val==3,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x3; immval:0x7
+TEST_CI_OP( c.slli, x10, 0x180, 0x3, 0x7, x1, 260, x2)
+
+inst_66:
+// rs1_val==5,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x5; immval:0xd
+TEST_CI_OP( c.slli, x10, 0xa000, 0x5, 0xd, x1, 264, x2)
+
+inst_67:
+// rs1_val==858993459,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x33333333; immval:0x8
+TEST_CI_OP( c.slli, x10, 0x33333300, 0x33333333, 0x8, x1, 268, x2)
+
+inst_68:
+// rs1_val==1717986918,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x66666666; immval:0x3
+TEST_CI_OP( c.slli, x10, 0x33333330, 0x66666666, 0x3, x1, 272, x2)
+
+inst_69:
+// rs1_val==-46340,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0xb504; immval:0x1
+TEST_CI_OP( c.slli, x10, 0xfffe95f8, -0xb504, 0x1, x1, 276, x2)
+
+inst_70:
+// rs1_val==46340,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0xb504; immval:0x1
+TEST_CI_OP( c.slli, x10, 0x16a08, 0xb504, 0x1, x1, 280, x2)
+
+inst_71:
+// imm_val == 30,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x55555555; immval:0x1e
+TEST_CI_OP( c.slli, x10, 0x40000000, 0x55555555, 0x1e, x1, 284, x2)
+
+inst_72:
+// rs1_val==46341,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0xb505; immval:0xd
+TEST_CI_OP( c.slli, x10, 0x16a0a000, 0xb505, 0xd, x1, 288, x2)
+
+inst_73:
+// rs1_val==1431655764,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x55555554; immval:0x5
+TEST_CI_OP( c.slli, x10, 0xaaaaaa80, 0x55555554, 0x5, x1, 292, x2)
+
+inst_74:
+// rs1_val==-46339,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0xb503; immval:0x8
+TEST_CI_OP( c.slli, x10, 0xff4afd00, -0xb503, 0x8, x1, 296, x2)
+
+inst_75:
+// rs1_val==858993458,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x33333332; immval:0x12
+TEST_CI_OP( c.slli, x10, 0xccc80000, 0x33333332, 0x12, x1, 300, x2)
+
+inst_76:
+// rs1_val==1717986917,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x66666665; immval:0xf
+TEST_CI_OP( c.slli, x10, 0x33328000, 0x66666665, 0xf, x1, 304, x2)
+
+inst_77:
+// rs1_val==46339,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0xb503; immval:0x1e
+TEST_CI_OP( c.slli, x10, 0xc0000000, 0xb503, 0x1e, x1, 308, x2)
+
+inst_78:
+// rs1_val==1431655766,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x55555556; immval:0x1e
+TEST_CI_OP( c.slli, x10, 0x80000000, 0x55555556, 0x1e, x1, 312, x2)
+
+inst_79:
+// rs1_val==-1431655765,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x55555555; immval:0x15
+TEST_CI_OP( c.slli, x10, 0x55600000, -0x55555555, 0x15, x1, 316, x2)
+
+inst_80:
+// rs1_val==6,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x6; immval:0x11
+TEST_CI_OP( c.slli, x10, 0xc0000, 0x6, 0x11, x1, 320, x2)
+
+inst_81:
+// rs1_val==858993460,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x33333334; immval:0x3
+TEST_CI_OP( c.slli, x10, 0x999999a0, 0x33333334, 0x3, x1, 324, x2)
+
+inst_82:
+// rs1_val==1717986919,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x66666667; immval:0x10
+TEST_CI_OP( c.slli, x10, 0x66670000, 0x66666667, 0x10, x1, 328, x2)
+
+inst_83:
+// rs1_val == -4194305,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x400001; immval:0x10
+TEST_CI_OP( c.slli, x10, 0xffff0000, -0x400001, 0x10, x1, 332, x2)
+
+inst_84:
+// rs1_val == -8388609,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x800001; immval:0x10
+TEST_CI_OP( c.slli, x10, 0xffff0000, -0x800001, 0x10, x1, 336, x2)
+
+inst_85:
+// rs1_val == -16777217,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x1000001; immval:0x15
+TEST_CI_OP( c.slli, x10, 0xffe00000, -0x1000001, 0x15, x1, 340, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 86*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/csrai-01.S b/riscof/suite/rv32i_m/C/csrai-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..4a6f1afe41a2d10c28a8c0116cc04cbef5e21afc
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/csrai-01.S
@@ -0,0 +1,504 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.srai instruction of the RISC-V C extension for the csrai covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",csrai)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1==x11, rs1_val < 0 and imm_val < xlen, imm_val == 29
+// opcode:c.srai; op1:x11; dest:x11 op1val:-0x4; immval:0x1d
+TEST_CI_OP( c.srai, x11, 0xffffffff, -0x4, 0x1d, x1, 0, x2)
+
+inst_1:
+// rs1==x8, rs1_val > 0 and imm_val < xlen, rs1_val == 8
+// opcode:c.srai; op1:x8; dest:x8 op1val:0x8; immval:0xc
+TEST_CI_OP( c.srai, x8, 0x0, 0x8, 0xc, x1, 4, x2)
+
+inst_2:
+// rs1==x10, rs1_val == imm_val and imm_val != 0 and imm_val < xlen,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x7; immval:0x7
+TEST_CI_OP( c.srai, x10, 0x0, 0x7, 0x7, x1, 8, x2)
+
+inst_3:
+// rs1==x12, rs1_val == (-2**(xlen-1)) and imm_val != 0 and imm_val < xlen, rs1_val == -2147483648
+// opcode:c.srai; op1:x12; dest:x12 op1val:-0x80000000; immval:0xc
+TEST_CI_OP( c.srai, x12, 0xfff80000, -0x80000000, 0xc, x1, 12, x2)
+
+inst_4:
+// rs1==x13, rs1_val == 0 and imm_val != 0 and imm_val < xlen, rs1_val==0
+// opcode:c.srai; op1:x13; dest:x13 op1val:0x0; immval:0x6
+TEST_CI_OP( c.srai, x13, 0x0, 0x0, 0x6, x1, 16, x2)
+
+inst_5:
+// rs1==x9, rs1_val == (2**(xlen-1)-1) and imm_val != 0 and imm_val < xlen, imm_val == 15, rs1_val == 2147483647
+// opcode:c.srai; op1:x9; dest:x9 op1val:0x7fffffff; immval:0xf
+TEST_CI_OP( c.srai, x9, 0xffff, 0x7fffffff, 0xf, x1, 20, x2)
+
+inst_6:
+// rs1==x14, rs1_val == 1 and imm_val != 0 and imm_val < xlen, imm_val == 16, rs1_val == 1
+// opcode:c.srai; op1:x14; dest:x14 op1val:0x1; immval:0x10
+TEST_CI_OP( c.srai, x14, 0x0, 0x1, 0x10, x1, 24, x2)
+
+inst_7:
+// rs1==x15, rs1_val == 2, rs1_val==2, imm_val == 23
+// opcode:c.srai; op1:x15; dest:x15 op1val:0x2; immval:0x17
+TEST_CI_OP( c.srai, x15, 0x0, 0x2, 0x17, x1, 28, x2)
+
+inst_8:
+// rs1_val == 4, rs1_val==4
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x4; immval:0x9
+TEST_CI_OP( c.srai, x10, 0x0, 0x4, 0x9, x1, 32, x2)
+
+inst_9:
+// rs1_val == 16,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x10; immval:0x6
+TEST_CI_OP( c.srai, x10, 0x0, 0x10, 0x6, x1, 36, x2)
+
+inst_10:
+// rs1_val == 32,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x20; immval:0x10
+TEST_CI_OP( c.srai, x10, 0x0, 0x20, 0x10, x1, 40, x2)
+
+inst_11:
+// rs1_val == 64, imm_val == 1
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x40; immval:0x1
+TEST_CI_OP( c.srai, x10, 0x20, 0x40, 0x1, x1, 44, x2)
+
+inst_12:
+// rs1_val == 128,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x80; immval:0x7
+TEST_CI_OP( c.srai, x10, 0x1, 0x80, 0x7, x1, 48, x2)
+
+inst_13:
+// rs1_val == 256, imm_val == 27
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x100; immval:0x1b
+TEST_CI_OP( c.srai, x10, 0x0, 0x100, 0x1b, x1, 52, x2)
+
+inst_14:
+// rs1_val == 512,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x200; immval:0x5
+TEST_CI_OP( c.srai, x10, 0x10, 0x200, 0x5, x1, 56, x2)
+
+inst_15:
+// rs1_val == 1024,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x400; immval:0x17
+TEST_CI_OP( c.srai, x10, 0x0, 0x400, 0x17, x1, 60, x2)
+
+inst_16:
+// rs1_val == 2048,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x800; immval:0xe
+TEST_CI_OP( c.srai, x10, 0x0, 0x800, 0xe, x1, 64, x2)
+
+inst_17:
+// rs1_val == 4096,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x1000; immval:0x6
+TEST_CI_OP( c.srai, x10, 0x40, 0x1000, 0x6, x1, 68, x2)
+
+inst_18:
+// rs1_val == 8192,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x2000; immval:0x7
+TEST_CI_OP( c.srai, x10, 0x40, 0x2000, 0x7, x1, 72, x2)
+
+inst_19:
+// rs1_val == 16384, imm_val == 8
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x4000; immval:0x8
+TEST_CI_OP( c.srai, x10, 0x40, 0x4000, 0x8, x1, 76, x2)
+
+inst_20:
+// rs1_val == 32768,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x8000; immval:0x1b
+TEST_CI_OP( c.srai, x10, 0x0, 0x8000, 0x1b, x1, 80, x2)
+
+inst_21:
+// rs1_val == 65536,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x10000; immval:0xf
+TEST_CI_OP( c.srai, x10, 0x2, 0x10000, 0xf, x1, 84, x2)
+
+inst_22:
+// rs1_val == 131072, imm_val == 30
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x20000; immval:0x1e
+TEST_CI_OP( c.srai, x10, 0x0, 0x20000, 0x1e, x1, 88, x2)
+
+inst_23:
+// rs1_val == 262144,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x40000; immval:0x13
+TEST_CI_OP( c.srai, x10, 0x0, 0x40000, 0x13, x1, 92, x2)
+
+inst_24:
+// rs1_val == 524288,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x80000; immval:0x1d
+TEST_CI_OP( c.srai, x10, 0x0, 0x80000, 0x1d, x1, 96, x2)
+
+inst_25:
+// rs1_val == 1048576,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x100000; immval:0x12
+TEST_CI_OP( c.srai, x10, 0x4, 0x100000, 0x12, x1, 100, x2)
+
+inst_26:
+// rs1_val == 2097152,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x200000; immval:0x1
+TEST_CI_OP( c.srai, x10, 0x100000, 0x200000, 0x1, x1, 104, x2)
+
+inst_27:
+// rs1_val == 4194304,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x400000; immval:0x10
+TEST_CI_OP( c.srai, x10, 0x40, 0x400000, 0x10, x1, 108, x2)
+
+inst_28:
+// rs1_val == 8388608,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x800000; immval:0x5
+TEST_CI_OP( c.srai, x10, 0x40000, 0x800000, 0x5, x1, 112, x2)
+
+inst_29:
+// rs1_val == 16777216,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x1000000; immval:0x12
+TEST_CI_OP( c.srai, x10, 0x40, 0x1000000, 0x12, x1, 116, x2)
+
+inst_30:
+// rs1_val == 33554432,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x2000000; immval:0x1f
+TEST_CI_OP( c.srai, x10, 0x0, 0x2000000, 0x1f, x1, 120, x2)
+
+inst_31:
+// rs1_val == 67108864,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x4000000; immval:0x12
+TEST_CI_OP( c.srai, x10, 0x100, 0x4000000, 0x12, x1, 124, x2)
+
+inst_32:
+// rs1_val == 134217728,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x8000000; immval:0xc
+TEST_CI_OP( c.srai, x10, 0x8000, 0x8000000, 0xc, x1, 128, x2)
+
+inst_33:
+// rs1_val == 268435456,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x10000000; immval:0x1b
+TEST_CI_OP( c.srai, x10, 0x2, 0x10000000, 0x1b, x1, 132, x2)
+
+inst_34:
+// rs1_val == 536870912,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x20000000; immval:0xe
+TEST_CI_OP( c.srai, x10, 0x8000, 0x20000000, 0xe, x1, 136, x2)
+
+inst_35:
+// rs1_val == 1073741824,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x40000000; immval:0x1
+TEST_CI_OP( c.srai, x10, 0x20000000, 0x40000000, 0x1, x1, 140, x2)
+
+inst_36:
+// rs1_val == -2,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x2; immval:0x7
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x2, 0x7, x1, 144, x2)
+
+inst_37:
+// rs1_val == -3,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x3; immval:0x17
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x3, 0x17, x1, 148, x2)
+
+inst_38:
+// rs1_val == -5, imm_val == 4
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x5; immval:0x4
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x5, 0x4, x1, 152, x2)
+
+inst_39:
+// rs1_val == -9,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x9; immval:0x7
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x9, 0x7, x1, 156, x2)
+
+inst_40:
+// rs1_val == -17,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x11; immval:0x1f
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x11, 0x1f, x1, 160, x2)
+
+inst_41:
+// rs1_val == -33,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x21; immval:0x1
+TEST_CI_OP( c.srai, x10, 0xffffffef, -0x21, 0x1, x1, 164, x2)
+
+inst_42:
+// rs1_val == -65,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x41; immval:0x13
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x41, 0x13, x1, 168, x2)
+
+inst_43:
+// rs1_val == -129, imm_val == 2
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x81; immval:0x2
+TEST_CI_OP( c.srai, x10, 0xffffffdf, -0x81, 0x2, x1, 172, x2)
+
+inst_44:
+// rs1_val == -257,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x101; immval:0x10
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x101, 0x10, x1, 176, x2)
+
+inst_45:
+// rs1_val == -513,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x201; immval:0x12
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x201, 0x12, x1, 180, x2)
+
+inst_46:
+// rs1_val == -1025,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x401; immval:0xb
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x401, 0xb, x1, 184, x2)
+
+inst_47:
+// rs1_val == -2049, imm_val == 21
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x801; immval:0x15
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x801, 0x15, x1, 188, x2)
+
+inst_48:
+// rs1_val == -4097,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x1001; immval:0xc
+TEST_CI_OP( c.srai, x10, 0xfffffffe, -0x1001, 0xc, x1, 192, x2)
+
+inst_49:
+// rs1_val == -8193,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x2001; immval:0x13
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x2001, 0x13, x1, 196, x2)
+
+inst_50:
+// rs1_val == -16385,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x4001; immval:0x12
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x4001, 0x12, x1, 200, x2)
+
+inst_51:
+// rs1_val == -32769,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x8001; immval:0xf
+TEST_CI_OP( c.srai, x10, 0xfffffffe, -0x8001, 0xf, x1, 204, x2)
+
+inst_52:
+// rs1_val == -65537,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x10001; immval:0x17
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x10001, 0x17, x1, 208, x2)
+
+inst_53:
+// rs1_val == -131073,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x20001; immval:0x6
+TEST_CI_OP( c.srai, x10, 0xfffff7ff, -0x20001, 0x6, x1, 212, x2)
+
+inst_54:
+// rs1_val == -262145,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x40001; immval:0x12
+TEST_CI_OP( c.srai, x10, 0xfffffffe, -0x40001, 0x12, x1, 216, x2)
+
+inst_55:
+// rs1_val == -524289,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x80001; immval:0x7
+TEST_CI_OP( c.srai, x10, 0xffffefff, -0x80001, 0x7, x1, 220, x2)
+
+inst_56:
+// rs1_val == -1048577,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x100001; immval:0x6
+TEST_CI_OP( c.srai, x10, 0xffffbfff, -0x100001, 0x6, x1, 224, x2)
+
+inst_57:
+// rs1_val == -2097153,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x200001; immval:0x7
+TEST_CI_OP( c.srai, x10, 0xffffbfff, -0x200001, 0x7, x1, 228, x2)
+
+inst_58:
+// rs1_val == -33554433,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x2000001; immval:0x1
+TEST_CI_OP( c.srai, x10, 0xfeffffff, -0x2000001, 0x1, x1, 232, x2)
+
+inst_59:
+// rs1_val == -67108865,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x4000001; immval:0x1b
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x4000001, 0x1b, x1, 236, x2)
+
+inst_60:
+// rs1_val == -134217729,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x8000001; immval:0x1d
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0x8000001, 0x1d, x1, 240, x2)
+
+inst_61:
+// rs1_val == -268435457,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x10000001; immval:0x10
+TEST_CI_OP( c.srai, x10, 0xffffefff, -0x10000001, 0x10, x1, 244, x2)
+
+inst_62:
+// rs1_val == -536870913,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x20000001; immval:0x17
+TEST_CI_OP( c.srai, x10, 0xffffffbf, -0x20000001, 0x17, x1, 248, x2)
+
+inst_63:
+// rs1_val == -1073741825,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x40000001; immval:0xd
+TEST_CI_OP( c.srai, x10, 0xfffdffff, -0x40000001, 0xd, x1, 252, x2)
+
+inst_64:
+// rs1_val == 1431655765, rs1_val==1431655765
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x55555555; immval:0xc
+TEST_CI_OP( c.srai, x10, 0x55555, 0x55555555, 0xc, x1, 256, x2)
+
+inst_65:
+// rs1_val == -1431655766, rs1_val==-1431655766
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x55555556; immval:0x2
+TEST_CI_OP( c.srai, x10, 0xeaaaaaaa, -0x55555556, 0x2, x1, 260, x2)
+
+inst_66:
+// rs1_val==3,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x3; immval:0x2
+TEST_CI_OP( c.srai, x10, 0x0, 0x3, 0x2, x1, 264, x2)
+
+inst_67:
+// rs1_val==5,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x5; immval:0x1e
+TEST_CI_OP( c.srai, x10, 0x0, 0x5, 0x1e, x1, 268, x2)
+
+inst_68:
+// rs1_val==858993459,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x33333333; immval:0x3
+TEST_CI_OP( c.srai, x10, 0x6666666, 0x33333333, 0x3, x1, 272, x2)
+
+inst_69:
+// rs1_val==1717986918,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x66666666; immval:0x1
+TEST_CI_OP( c.srai, x10, 0x33333333, 0x66666666, 0x1, x1, 276, x2)
+
+inst_70:
+// rs1_val==-46340,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0xb504; immval:0xd
+TEST_CI_OP( c.srai, x10, 0xfffffffa, -0xb504, 0xd, x1, 280, x2)
+
+inst_71:
+// rs1_val==46340,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0xb504; immval:0x12
+TEST_CI_OP( c.srai, x10, 0x0, 0xb504, 0x12, x1, 284, x2)
+
+inst_72:
+// imm_val == 10,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x20000000; immval:0xa
+TEST_CI_OP( c.srai, x10, 0x80000, 0x20000000, 0xa, x1, 288, x2)
+
+inst_73:
+// rs1_val==46341,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0xb505; immval:0xb
+TEST_CI_OP( c.srai, x10, 0x16, 0xb505, 0xb, x1, 292, x2)
+
+inst_74:
+// rs1_val==1431655764,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x55555554; immval:0x4
+TEST_CI_OP( c.srai, x10, 0x5555555, 0x55555554, 0x4, x1, 296, x2)
+
+inst_75:
+// rs1_val==-46339,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0xb503; immval:0x1e
+TEST_CI_OP( c.srai, x10, 0xffffffff, -0xb503, 0x1e, x1, 300, x2)
+
+inst_76:
+// rs1_val==858993458,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x33333332; immval:0x8
+TEST_CI_OP( c.srai, x10, 0x333333, 0x33333332, 0x8, x1, 304, x2)
+
+inst_77:
+// rs1_val==1717986917,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x66666665; immval:0x1b
+TEST_CI_OP( c.srai, x10, 0xc, 0x66666665, 0x1b, x1, 308, x2)
+
+inst_78:
+// rs1_val==46339,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0xb503; immval:0x5
+TEST_CI_OP( c.srai, x10, 0x5a8, 0xb503, 0x5, x1, 312, x2)
+
+inst_79:
+// rs1_val==1431655766,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x55555556; immval:0x12
+TEST_CI_OP( c.srai, x10, 0x1555, 0x55555556, 0x12, x1, 316, x2)
+
+inst_80:
+// rs1_val==-1431655765,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x55555555; immval:0xf
+TEST_CI_OP( c.srai, x10, 0xffff5555, -0x55555555, 0xf, x1, 320, x2)
+
+inst_81:
+// rs1_val==6,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x6; immval:0xe
+TEST_CI_OP( c.srai, x10, 0x0, 0x6, 0xe, x1, 324, x2)
+
+inst_82:
+// rs1_val==858993460,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x33333334; immval:0x17
+TEST_CI_OP( c.srai, x10, 0x66, 0x33333334, 0x17, x1, 328, x2)
+
+inst_83:
+// rs1_val==1717986919,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x66666667; immval:0x1
+TEST_CI_OP( c.srai, x10, 0x33333333, 0x66666667, 0x1, x1, 332, x2)
+
+inst_84:
+// rs1_val == -4194305,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x400001; immval:0xa
+TEST_CI_OP( c.srai, x10, 0xffffefff, -0x400001, 0xa, x1, 336, x2)
+
+inst_85:
+// rs1_val == -8388609,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x800001; immval:0xe
+TEST_CI_OP( c.srai, x10, 0xfffffdff, -0x800001, 0xe, x1, 340, x2)
+
+inst_86:
+// rs1_val == -16777217,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x1000001; immval:0x12
+TEST_CI_OP( c.srai, x10, 0xffffffbf, -0x1000001, 0x12, x1, 344, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 87*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/csrli-01.S b/riscof/suite/rv32i_m/C/csrli-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..0b71cfee42db3baea160d1445e3f0c8634bf6ec3
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/csrli-01.S
@@ -0,0 +1,494 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.srli instruction of the RISC-V C extension for the csrli covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",csrli)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1==x15, rs1_val < 0 and imm_val < xlen, rs1_val == -524289
+// opcode:c.srli; op1:x15; dest:x15 op1val:-0x80001; immval:0x1f
+TEST_CI_OP( c.srli, x15, 0x1, -0x80001, 0x1f, x1, 0, x2)
+
+inst_1:
+// rs1==x14, rs1_val > 0 and imm_val < xlen, rs1_val == 4, rs1_val==4
+// opcode:c.srli; op1:x14; dest:x14 op1val:0x4; immval:0xb
+TEST_CI_OP( c.srli, x14, 0x0, 0x4, 0xb, x1, 4, x2)
+
+inst_2:
+// rs1==x9, rs1_val == imm_val and imm_val != 0 and imm_val < xlen, rs1_val == 8, imm_val == 8
+// opcode:c.srli; op1:x9; dest:x9 op1val:0x8; immval:0x8
+TEST_CI_OP( c.srli, x9, 0x0, 0x8, 0x8, x1, 8, x2)
+
+inst_3:
+// rs1==x13, rs1_val == (-2**(xlen-1)) and imm_val != 0 and imm_val < xlen, imm_val == 27, rs1_val == -2147483648
+// opcode:c.srli; op1:x13; dest:x13 op1val:-0x80000000; immval:0x1b
+TEST_CI_OP( c.srli, x13, 0x10, -0x80000000, 0x1b, x1, 12, x2)
+
+inst_4:
+// rs1==x8, rs1_val == 0 and imm_val != 0 and imm_val < xlen, rs1_val==0
+// opcode:c.srli; op1:x8; dest:x8 op1val:0x0; immval:0x11
+TEST_CI_OP( c.srli, x8, 0x0, 0x0, 0x11, x1, 16, x2)
+
+inst_5:
+// rs1==x10, rs1_val == (2**(xlen-1)-1) and imm_val != 0 and imm_val < xlen, rs1_val == 2147483647
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x7fffffff; immval:0xb
+TEST_CI_OP( c.srli, x10, 0xfffff, 0x7fffffff, 0xb, x1, 20, x2)
+
+inst_6:
+// rs1==x11, rs1_val == 1 and imm_val != 0 and imm_val < xlen, imm_val == 2, rs1_val == 1
+// opcode:c.srli; op1:x11; dest:x11 op1val:0x1; immval:0x2
+TEST_CI_OP( c.srli, x11, 0x0, 0x1, 0x2, x1, 24, x2)
+
+inst_7:
+// rs1==x12, rs1_val == 2, rs1_val==2
+// opcode:c.srli; op1:x12; dest:x12 op1val:0x2; immval:0xe
+TEST_CI_OP( c.srli, x12, 0x0, 0x2, 0xe, x1, 28, x2)
+
+inst_8:
+// rs1_val == 16,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x10; immval:0x2
+TEST_CI_OP( c.srli, x10, 0x4, 0x10, 0x2, x1, 32, x2)
+
+inst_9:
+// rs1_val == 32, imm_val == 23
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x20; immval:0x17
+TEST_CI_OP( c.srli, x10, 0x0, 0x20, 0x17, x1, 36, x2)
+
+inst_10:
+// rs1_val == 64,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x40; immval:0x8
+TEST_CI_OP( c.srli, x10, 0x0, 0x40, 0x8, x1, 40, x2)
+
+inst_11:
+// rs1_val == 128,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x80; immval:0xc
+TEST_CI_OP( c.srli, x10, 0x0, 0x80, 0xc, x1, 44, x2)
+
+inst_12:
+// rs1_val == 256,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x100; immval:0x2
+TEST_CI_OP( c.srli, x10, 0x40, 0x100, 0x2, x1, 48, x2)
+
+inst_13:
+// rs1_val == 512,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x200; immval:0x13
+TEST_CI_OP( c.srli, x10, 0x0, 0x200, 0x13, x1, 52, x2)
+
+inst_14:
+// rs1_val == 1024,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x400; immval:0x9
+TEST_CI_OP( c.srli, x10, 0x2, 0x400, 0x9, x1, 56, x2)
+
+inst_15:
+// rs1_val == 2048,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x800; immval:0x13
+TEST_CI_OP( c.srli, x10, 0x0, 0x800, 0x13, x1, 60, x2)
+
+inst_16:
+// rs1_val == 4096, imm_val == 16
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x1000; immval:0x10
+TEST_CI_OP( c.srli, x10, 0x0, 0x1000, 0x10, x1, 64, x2)
+
+inst_17:
+// rs1_val == 8192,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x2000; immval:0x13
+TEST_CI_OP( c.srli, x10, 0x0, 0x2000, 0x13, x1, 68, x2)
+
+inst_18:
+// rs1_val == 16384,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x4000; immval:0xe
+TEST_CI_OP( c.srli, x10, 0x1, 0x4000, 0xe, x1, 72, x2)
+
+inst_19:
+// rs1_val == 32768,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x8000; immval:0x1b
+TEST_CI_OP( c.srli, x10, 0x0, 0x8000, 0x1b, x1, 76, x2)
+
+inst_20:
+// rs1_val == 65536,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x10000; immval:0x6
+TEST_CI_OP( c.srli, x10, 0x400, 0x10000, 0x6, x1, 80, x2)
+
+inst_21:
+// rs1_val == 131072,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x20000; immval:0x2
+TEST_CI_OP( c.srli, x10, 0x8000, 0x20000, 0x2, x1, 84, x2)
+
+inst_22:
+// rs1_val == 262144,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x40000; immval:0xc
+TEST_CI_OP( c.srli, x10, 0x40, 0x40000, 0xc, x1, 88, x2)
+
+inst_23:
+// rs1_val == 524288, imm_val == 21
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x80000; immval:0x15
+TEST_CI_OP( c.srli, x10, 0x0, 0x80000, 0x15, x1, 92, x2)
+
+inst_24:
+// rs1_val == 1048576,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x100000; immval:0xb
+TEST_CI_OP( c.srli, x10, 0x200, 0x100000, 0xb, x1, 96, x2)
+
+inst_25:
+// rs1_val == 2097152, imm_val == 10
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x200000; immval:0xa
+TEST_CI_OP( c.srli, x10, 0x800, 0x200000, 0xa, x1, 100, x2)
+
+inst_26:
+// rs1_val == 4194304, imm_val == 15
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x400000; immval:0xf
+TEST_CI_OP( c.srli, x10, 0x80, 0x400000, 0xf, x1, 104, x2)
+
+inst_27:
+// rs1_val == 8388608,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x800000; immval:0xb
+TEST_CI_OP( c.srli, x10, 0x1000, 0x800000, 0xb, x1, 108, x2)
+
+inst_28:
+// rs1_val == 16777216,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x1000000; immval:0x8
+TEST_CI_OP( c.srli, x10, 0x10000, 0x1000000, 0x8, x1, 112, x2)
+
+inst_29:
+// rs1_val == 33554432,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x2000000; immval:0x5
+TEST_CI_OP( c.srli, x10, 0x100000, 0x2000000, 0x5, x1, 116, x2)
+
+inst_30:
+// rs1_val == 67108864,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x4000000; immval:0x2
+TEST_CI_OP( c.srli, x10, 0x1000000, 0x4000000, 0x2, x1, 120, x2)
+
+inst_31:
+// rs1_val == 134217728, imm_val == 29
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x8000000; immval:0x1d
+TEST_CI_OP( c.srli, x10, 0x0, 0x8000000, 0x1d, x1, 124, x2)
+
+inst_32:
+// rs1_val == 268435456,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x10000000; immval:0x13
+TEST_CI_OP( c.srli, x10, 0x200, 0x10000000, 0x13, x1, 128, x2)
+
+inst_33:
+// rs1_val == 536870912,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x20000000; immval:0x13
+TEST_CI_OP( c.srli, x10, 0x400, 0x20000000, 0x13, x1, 132, x2)
+
+inst_34:
+// rs1_val == 1073741824,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x40000000; immval:0xa
+TEST_CI_OP( c.srli, x10, 0x100000, 0x40000000, 0xa, x1, 136, x2)
+
+inst_35:
+// rs1_val == -2,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x2; immval:0xa
+TEST_CI_OP( c.srli, x10, 0x3fffff, -0x2, 0xa, x1, 140, x2)
+
+inst_36:
+// rs1_val == -3,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x3; immval:0x1f
+TEST_CI_OP( c.srli, x10, 0x1, -0x3, 0x1f, x1, 144, x2)
+
+inst_37:
+// rs1_val == -5,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x5; immval:0x8
+TEST_CI_OP( c.srli, x10, 0xffffff, -0x5, 0x8, x1, 148, x2)
+
+inst_38:
+// rs1_val == -9,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x9; immval:0x12
+TEST_CI_OP( c.srli, x10, 0x3fff, -0x9, 0x12, x1, 152, x2)
+
+inst_39:
+// rs1_val == -17,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x11; immval:0xc
+TEST_CI_OP( c.srli, x10, 0xfffff, -0x11, 0xc, x1, 156, x2)
+
+inst_40:
+// rs1_val == -33,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x21; immval:0xb
+TEST_CI_OP( c.srli, x10, 0x1fffff, -0x21, 0xb, x1, 160, x2)
+
+inst_41:
+// rs1_val == -65,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x41; immval:0x7
+TEST_CI_OP( c.srli, x10, 0x1ffffff, -0x41, 0x7, x1, 164, x2)
+
+inst_42:
+// rs1_val == -129,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x81; immval:0x15
+TEST_CI_OP( c.srli, x10, 0x7ff, -0x81, 0x15, x1, 168, x2)
+
+inst_43:
+// rs1_val == -257,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x101; immval:0x1d
+TEST_CI_OP( c.srli, x10, 0x7, -0x101, 0x1d, x1, 172, x2)
+
+inst_44:
+// rs1_val == -513,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x201; immval:0x10
+TEST_CI_OP( c.srli, x10, 0xffff, -0x201, 0x10, x1, 176, x2)
+
+inst_45:
+// rs1_val == -1025,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x401; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x1fffff7f, -0x401, 0x3, x1, 180, x2)
+
+inst_46:
+// rs1_val == -2049,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x801; immval:0x13
+TEST_CI_OP( c.srli, x10, 0x1fff, -0x801, 0x13, x1, 184, x2)
+
+inst_47:
+// rs1_val == -4097, imm_val == 1
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x1001; immval:0x1
+TEST_CI_OP( c.srli, x10, 0x7ffff7ff, -0x1001, 0x1, x1, 188, x2)
+
+inst_48:
+// rs1_val == -8193,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x2001; immval:0x7
+TEST_CI_OP( c.srli, x10, 0x1ffffbf, -0x2001, 0x7, x1, 192, x2)
+
+inst_49:
+// rs1_val == -16385,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x4001; immval:0x6
+TEST_CI_OP( c.srli, x10, 0x3fffeff, -0x4001, 0x6, x1, 196, x2)
+
+inst_50:
+// rs1_val == -32769,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x8001; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x1fffefff, -0x8001, 0x3, x1, 200, x2)
+
+inst_51:
+// rs1_val == -65537,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x10001; immval:0x7
+TEST_CI_OP( c.srli, x10, 0x1fffdff, -0x10001, 0x7, x1, 204, x2)
+
+inst_52:
+// rs1_val == -131073,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x20001; immval:0x7
+TEST_CI_OP( c.srli, x10, 0x1fffbff, -0x20001, 0x7, x1, 208, x2)
+
+inst_53:
+// rs1_val == -262145,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x40001; immval:0x1d
+TEST_CI_OP( c.srli, x10, 0x7, -0x40001, 0x1d, x1, 212, x2)
+
+inst_54:
+// rs1_val == -1048577,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x100001; immval:0x11
+TEST_CI_OP( c.srli, x10, 0x7ff7, -0x100001, 0x11, x1, 216, x2)
+
+inst_55:
+// rs1_val == -2097153, imm_val == 4
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x200001; immval:0x4
+TEST_CI_OP( c.srli, x10, 0xffdffff, -0x200001, 0x4, x1, 220, x2)
+
+inst_56:
+// rs1_val == -4194305,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x400001; immval:0x1b
+TEST_CI_OP( c.srli, x10, 0x1f, -0x400001, 0x1b, x1, 224, x2)
+
+inst_57:
+// rs1_val == -33554433,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x2000001; immval:0x13
+TEST_CI_OP( c.srli, x10, 0x1fbf, -0x2000001, 0x13, x1, 228, x2)
+
+inst_58:
+// rs1_val == -67108865,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x4000001; immval:0x17
+TEST_CI_OP( c.srli, x10, 0x1f7, -0x4000001, 0x17, x1, 232, x2)
+
+inst_59:
+// rs1_val == -134217729,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x8000001; immval:0xd
+TEST_CI_OP( c.srli, x10, 0x7bfff, -0x8000001, 0xd, x1, 236, x2)
+
+inst_60:
+// rs1_val == -268435457,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x10000001; immval:0x8
+TEST_CI_OP( c.srli, x10, 0xefffff, -0x10000001, 0x8, x1, 240, x2)
+
+inst_61:
+// rs1_val == -536870913,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x20000001; immval:0x8
+TEST_CI_OP( c.srli, x10, 0xdfffff, -0x20000001, 0x8, x1, 244, x2)
+
+inst_62:
+// rs1_val == -1073741825,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x40000001; immval:0xe
+TEST_CI_OP( c.srli, x10, 0x2ffff, -0x40000001, 0xe, x1, 248, x2)
+
+inst_63:
+// rs1_val == 1431655765, rs1_val==1431655765
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x55555555; immval:0x9
+TEST_CI_OP( c.srli, x10, 0x2aaaaa, 0x55555555, 0x9, x1, 252, x2)
+
+inst_64:
+// rs1_val == -1431655766, rs1_val==-1431655766
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x55555556; immval:0x17
+TEST_CI_OP( c.srli, x10, 0x155, -0x55555556, 0x17, x1, 256, x2)
+
+inst_65:
+// rs1_val==3,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x3; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x0, 0x3, 0x3, x1, 260, x2)
+
+inst_66:
+// rs1_val==5,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x5; immval:0xb
+TEST_CI_OP( c.srli, x10, 0x0, 0x5, 0xb, x1, 264, x2)
+
+inst_67:
+// rs1_val==858993459,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x33333333; immval:0x2
+TEST_CI_OP( c.srli, x10, 0xccccccc, 0x33333333, 0x2, x1, 268, x2)
+
+inst_68:
+// rs1_val==1717986918,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x66666666; immval:0x15
+TEST_CI_OP( c.srli, x10, 0x333, 0x66666666, 0x15, x1, 272, x2)
+
+inst_69:
+// rs1_val==-46340,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0xb504; immval:0x17
+TEST_CI_OP( c.srli, x10, 0x1ff, -0xb504, 0x17, x1, 276, x2)
+
+inst_70:
+// imm_val == 30,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x21; immval:0x1e
+TEST_CI_OP( c.srli, x10, 0x3, -0x21, 0x1e, x1, 280, x2)
+
+inst_71:
+// rs1_val==46340,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0xb504; immval:0x7
+TEST_CI_OP( c.srli, x10, 0x16a, 0xb504, 0x7, x1, 284, x2)
+
+inst_72:
+// rs1_val==1431655764,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x55555554; immval:0x12
+TEST_CI_OP( c.srli, x10, 0x1555, 0x55555554, 0x12, x1, 288, x2)
+
+inst_73:
+// rs1_val==46341,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0xb505; immval:0x1d
+TEST_CI_OP( c.srli, x10, 0x0, 0xb505, 0x1d, x1, 292, x2)
+
+inst_74:
+// rs1_val==858993458,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x33333332; immval:0x1e
+TEST_CI_OP( c.srli, x10, 0x0, 0x33333332, 0x1e, x1, 296, x2)
+
+inst_75:
+// rs1_val==1717986917,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x66666665; immval:0x2
+TEST_CI_OP( c.srli, x10, 0x19999999, 0x66666665, 0x2, x1, 300, x2)
+
+inst_76:
+// rs1_val==46339,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0xb503; immval:0xc
+TEST_CI_OP( c.srli, x10, 0xb, 0xb503, 0xc, x1, 304, x2)
+
+inst_77:
+// rs1_val==1431655766,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x55555556; immval:0x8
+TEST_CI_OP( c.srli, x10, 0x555555, 0x55555556, 0x8, x1, 308, x2)
+
+inst_78:
+// rs1_val==-1431655765,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x55555555; immval:0x10
+TEST_CI_OP( c.srli, x10, 0xaaaa, -0x55555555, 0x10, x1, 312, x2)
+
+inst_79:
+// rs1_val==6,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x6; immval:0x10
+TEST_CI_OP( c.srli, x10, 0x0, 0x6, 0x10, x1, 316, x2)
+
+inst_80:
+// rs1_val==858993460,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x33333334; immval:0xb
+TEST_CI_OP( c.srli, x10, 0x66666, 0x33333334, 0xb, x1, 320, x2)
+
+inst_81:
+// rs1_val==1717986919,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x66666667; immval:0xc
+TEST_CI_OP( c.srli, x10, 0x66666, 0x66666667, 0xc, x1, 324, x2)
+
+inst_82:
+// rs1_val==-46339,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0xb503; immval:0x9
+TEST_CI_OP( c.srli, x10, 0x7fffa5, -0xb503, 0x9, x1, 328, x2)
+
+inst_83:
+// rs1_val == -8388609,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x800001; immval:0x5
+TEST_CI_OP( c.srli, x10, 0x7fbffff, -0x800001, 0x5, x1, 332, x2)
+
+inst_84:
+// rs1_val == -16777217,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x1000001; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x1fdfffff, -0x1000001, 0x3, x1, 336, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 85*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/csub-01.S b/riscof/suite/rv32i_m/C/csub-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..f807afc6f0cd782e995a074198c2a70600f850c8
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/csub-01.S
@@ -0,0 +1,2979 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.sub instruction of the RISC-V C extension for the csub covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",csub)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x9, rs2==x14, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648, rs2_val < 0, rs1_val == -4097
+// opcode: c.sub; op1:x9; op2:x14; op1val:-0x1001; op2val:-0x80000000
+TEST_CR_OP( c.sub, x9, x14, 0x7fffefff, -0x1001, -0x80000000, x1, 0, x2)
+
+inst_1:
+// rs1 == rs2, rs1==x12, rs2==x12, rs2_val == 0, rs1_val == 262144
+// opcode: c.sub; op1:x12; op2:x12; op1val:0x40000; op2val:0x40000
+TEST_CR_OP( c.sub, x12, x12, 0x0, 0x40000, 0x40000, x1, 4, x2)
+
+inst_2:
+// rs1==x14, rs2==x13, rs2_val == (2**(xlen-1)-1), rs2_val > 0, rs2_val == 2147483647, rs1_val == 0
+// opcode: c.sub; op1:x14; op2:x13; op1val:0x0; op2val:0x7fffffff
+TEST_CR_OP( c.sub, x14, x13, 0x80000001, 0x0, 0x7fffffff, x1, 8, x2)
+
+inst_3:
+// rs1==x10, rs2==x9, rs2_val == 1, rs1_val == 8
+// opcode: c.sub; op1:x10; op2:x9; op1val:0x8; op2val:0x1
+TEST_CR_OP( c.sub, x10, x9, 0x7, 0x8, 0x1, x1, 12, x2)
+
+inst_4:
+// rs1==x11, rs2==x8, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648, rs2_val == 16384
+// opcode: c.sub; op1:x11; op2:x8; op1val:-0x80000000; op2val:0x4000
+TEST_CR_OP( c.sub, x11, x8, 0x7fffc000, -0x80000000, 0x4000, x1, 16, x2)
+
+inst_5:
+// rs1==x15, rs2==x10, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647
+// opcode: c.sub; op1:x15; op2:x10; op1val:0x7fffffff; op2val:0x4000
+TEST_CR_OP( c.sub, x15, x10, 0x7fffbfff, 0x7fffffff, 0x4000, x1, 20, x2)
+
+inst_6:
+// rs1==x13, rs2==x15, rs1_val == 1, rs2_val == -134217729
+// opcode: c.sub; op1:x13; op2:x15; op1val:0x1; op2val:-0x8000001
+TEST_CR_OP( c.sub, x13, x15, 0x8000002, 0x1, -0x8000001, x1, 24, x2)
+
+inst_7:
+// rs1==x8, rs2==x11, rs2_val == 2,
+// opcode: c.sub; op1:x8; op2:x11; op1val:-0x6; op2val:0x2
+TEST_CR_OP( c.sub, x8, x11, 0xfffffff8, -0x6, 0x2, x1, 28, x2)
+
+inst_8:
+// rs2_val == 4, rs1_val==4 and rs2_val==4, rs1_val == 4
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x4, 0x4, x1, 32, x2)
+
+inst_9:
+// rs2_val == 8, rs1_val == 2048
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x800; op2val:0x8
+TEST_CR_OP( c.sub, x10, x11, 0x7f8, 0x800, 0x8, x1, 36, x2)
+
+inst_10:
+// rs2_val == 16, rs1_val == 1048576
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x100000; op2val:0x10
+TEST_CR_OP( c.sub, x10, x11, 0xffff0, 0x100000, 0x10, x1, 40, x2)
+
+inst_11:
+// rs2_val == 32,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x1001; op2val:0x20
+TEST_CR_OP( c.sub, x10, x11, 0xffffefdf, -0x1001, 0x20, x1, 44, x2)
+
+inst_12:
+// rs2_val == 64,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x40
+TEST_CR_OP( c.sub, x10, x11, 0xb4c3, 0xb503, 0x40, x1, 48, x2)
+
+inst_13:
+// rs2_val == 128,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x80
+TEST_CR_OP( c.sub, x10, x11, 0x333332b2, 0x33333332, 0x80, x1, 52, x2)
+
+inst_14:
+// rs2_val == 256,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x7; op2val:0x100
+TEST_CR_OP( c.sub, x10, x11, 0xffffff07, 0x7, 0x100, x1, 56, x2)
+
+inst_15:
+// rs2_val == 512, rs1_val == 1073741824
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x40000000; op2val:0x200
+TEST_CR_OP( c.sub, x10, x11, 0x3ffffe00, 0x40000000, 0x200, x1, 60, x2)
+
+inst_16:
+// rs2_val == 1024, rs1_val == -257
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x101; op2val:0x400
+TEST_CR_OP( c.sub, x10, x11, 0xfffffaff, -0x101, 0x400, x1, 64, x2)
+
+inst_17:
+// rs2_val == 2048,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x7; op2val:0x800
+TEST_CR_OP( c.sub, x10, x11, 0xfffff807, 0x7, 0x800, x1, 68, x2)
+
+inst_18:
+// rs2_val == 4096,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x1000
+TEST_CR_OP( c.sub, x10, x11, 0xfffff005, 0x5, 0x1000, x1, 72, x2)
+
+inst_19:
+// rs2_val == 8192,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x2000
+TEST_CR_OP( c.sub, x10, x11, 0x33331334, 0x33333334, 0x2000, x1, 76, x2)
+
+inst_20:
+// rs2_val == 32768, rs1_val == 32
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x20; op2val:0x8000
+TEST_CR_OP( c.sub, x10, x11, 0xffff8020, 0x20, 0x8000, x1, 80, x2)
+
+inst_21:
+// rs2_val == 65536, rs1_val == -16777217
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x1000001; op2val:0x10000
+TEST_CR_OP( c.sub, x10, x11, 0xfefeffff, -0x1000001, 0x10000, x1, 84, x2)
+
+inst_22:
+// rs2_val == 131072, rs1_val == -65
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x41; op2val:0x20000
+TEST_CR_OP( c.sub, x10, x11, 0xfffdffbf, -0x41, 0x20000, x1, 88, x2)
+
+inst_23:
+// rs2_val == 262144, rs1_val == -1025
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x401; op2val:0x40000
+TEST_CR_OP( c.sub, x10, x11, 0xfffbfbff, -0x401, 0x40000, x1, 92, x2)
+
+inst_24:
+// rs2_val == 524288,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x80000
+TEST_CR_OP( c.sub, x10, x11, 0xfff80005, 0x5, 0x80000, x1, 96, x2)
+
+inst_25:
+// rs2_val == 1048576,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x40000000; op2val:0x100000
+TEST_CR_OP( c.sub, x10, x11, 0xbff00000, -0x40000000, 0x100000, x1, 100, x2)
+
+inst_26:
+// rs2_val == 2097152,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x200000
+TEST_CR_OP( c.sub, x10, x11, 0xffe00000, 0x0, 0x200000, x1, 104, x2)
+
+inst_27:
+// rs2_val == 4194304, rs1_val == 256
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x100; op2val:0x400000
+TEST_CR_OP( c.sub, x10, x11, 0xffc00100, 0x100, 0x400000, x1, 108, x2)
+
+inst_28:
+// rs2_val == 8388608, rs1_val == -3
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x3; op2val:0x800000
+TEST_CR_OP( c.sub, x10, x11, 0xff7ffffd, -0x3, 0x800000, x1, 112, x2)
+
+inst_29:
+// rs2_val == 16777216, rs1_val == 2
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x1000000
+TEST_CR_OP( c.sub, x10, x11, 0xff000002, 0x2, 0x1000000, x1, 116, x2)
+
+inst_30:
+// rs2_val == 33554432, rs1_val == -17
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x11; op2val:0x2000000
+TEST_CR_OP( c.sub, x10, x11, 0xfdffffef, -0x11, 0x2000000, x1, 120, x2)
+
+inst_31:
+// rs2_val == 67108864, rs1_val == 268435456
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x10000000; op2val:0x4000000
+TEST_CR_OP( c.sub, x10, x11, 0xc000000, 0x10000000, 0x4000000, x1, 124, x2)
+
+inst_32:
+// rs2_val == 134217728, rs1_val == 33554432
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2000000; op2val:0x8000000
+TEST_CR_OP( c.sub, x10, x11, 0xfa000000, 0x2000000, 0x8000000, x1, 128, x2)
+
+inst_33:
+// rs2_val == 268435456,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x1; op2val:0x10000000
+TEST_CR_OP( c.sub, x10, x11, 0xf0000001, 0x1, 0x10000000, x1, 132, x2)
+
+inst_34:
+// rs2_val == 536870912, rs1_val == 1431655765
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x20000000
+TEST_CR_OP( c.sub, x10, x11, 0x35555555, 0x55555555, 0x20000000, x1, 136, x2)
+
+inst_35:
+// rs2_val == 1073741824, rs1_val == -9
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x9; op2val:0x40000000
+TEST_CR_OP( c.sub, x10, x11, 0xbffffff7, -0x9, 0x40000000, x1, 140, x2)
+
+inst_36:
+// rs2_val == -2, rs1_val == 67108864
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4000000; op2val:-0x2
+TEST_CR_OP( c.sub, x10, x11, 0x4000002, 0x4000000, -0x2, x1, 144, x2)
+
+inst_37:
+// rs2_val == -3, rs1_val == -33554433
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x2000001; op2val:-0x3
+TEST_CR_OP( c.sub, x10, x11, 0xfe000002, -0x2000001, -0x3, x1, 148, x2)
+
+inst_38:
+// rs2_val == -5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:-0x5
+TEST_CR_OP( c.sub, x10, x11, 0x33333339, 0x33333334, -0x5, x1, 152, x2)
+
+inst_39:
+// rs2_val == -9, rs1_val == -262145
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x40001; op2val:-0x9
+TEST_CR_OP( c.sub, x10, x11, 0xfffc0008, -0x40001, -0x9, x1, 156, x2)
+
+inst_40:
+// rs2_val == -17,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:-0x11
+TEST_CR_OP( c.sub, x10, x11, 0x11, 0x0, -0x11, x1, 160, x2)
+
+inst_41:
+// rs2_val == -33, rs1_val == 16
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x10; op2val:-0x21
+TEST_CR_OP( c.sub, x10, x11, 0x31, 0x10, -0x21, x1, 164, x2)
+
+inst_42:
+// rs2_val == -65, rs1_val == -1073741825
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x40000001; op2val:-0x41
+TEST_CR_OP( c.sub, x10, x11, 0xc0000040, -0x40000001, -0x41, x1, 168, x2)
+
+inst_43:
+// rs2_val == -129,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x8; op2val:-0x81
+TEST_CR_OP( c.sub, x10, x11, 0x89, 0x8, -0x81, x1, 172, x2)
+
+inst_44:
+// rs2_val == -257,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x3; op2val:-0x101
+TEST_CR_OP( c.sub, x10, x11, 0xfe, -0x3, -0x101, x1, 176, x2)
+
+inst_45:
+// rs2_val == -513,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x4; op2val:-0x201
+TEST_CR_OP( c.sub, x10, x11, 0x1fd, -0x4, -0x201, x1, 180, x2)
+
+inst_46:
+// rs2_val == -1025, rs1_val == -2
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x2; op2val:-0x401
+TEST_CR_OP( c.sub, x10, x11, 0x3ff, -0x2, -0x401, x1, 184, x2)
+
+inst_47:
+// rs2_val == -2049,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:-0x801
+TEST_CR_OP( c.sub, x10, x11, 0x801, 0x0, -0x801, x1, 188, x2)
+
+inst_48:
+// rs2_val == -4097, rs1_val == -129
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x81; op2val:-0x1001
+TEST_CR_OP( c.sub, x10, x11, 0xf80, -0x81, -0x1001, x1, 192, x2)
+
+inst_49:
+// rs2_val == -8193, rs1_val == -2049
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x801; op2val:-0x2001
+TEST_CR_OP( c.sub, x10, x11, 0x1800, -0x801, -0x2001, x1, 196, x2)
+
+inst_50:
+// rs2_val == -16385,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x800; op2val:-0x4001
+TEST_CR_OP( c.sub, x10, x11, 0x4801, 0x800, -0x4001, x1, 200, x2)
+
+inst_51:
+// rs2_val == -32769,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x401; op2val:-0x8001
+TEST_CR_OP( c.sub, x10, x11, 0x7c00, -0x401, -0x8001, x1, 204, x2)
+
+inst_52:
+// rs2_val == -65537, rs1_val == 524288
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x80000; op2val:-0x10001
+TEST_CR_OP( c.sub, x10, x11, 0x90001, 0x80000, -0x10001, x1, 208, x2)
+
+inst_53:
+// rs2_val == -131073,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x7fffffff; op2val:-0x20001
+TEST_CR_OP( c.sub, x10, x11, 0x80020000, 0x7fffffff, -0x20001, x1, 212, x2)
+
+inst_54:
+// rs2_val == -262145,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:-0x40001
+TEST_CR_OP( c.sub, x10, x11, 0x40003, 0x2, -0x40001, x1, 216, x2)
+
+inst_55:
+// rs2_val == -524289,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:-0x80001
+TEST_CR_OP( c.sub, x10, x11, 0x80003, 0x2, -0x80001, x1, 220, x2)
+
+inst_56:
+// rs2_val == -1048577,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x800; op2val:-0x100001
+TEST_CR_OP( c.sub, x10, x11, 0x100801, 0x800, -0x100001, x1, 224, x2)
+
+inst_57:
+// rs2_val == -2097153,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:-0x200001
+TEST_CR_OP( c.sub, x10, x11, 0x33533334, 0x33333333, -0x200001, x1, 228, x2)
+
+inst_58:
+// rs2_val == -4194305, rs1_val == 32768
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x8000; op2val:-0x400001
+TEST_CR_OP( c.sub, x10, x11, 0x408001, 0x8000, -0x400001, x1, 232, x2)
+
+inst_59:
+// rs2_val == -8388609,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x401; op2val:-0x800001
+TEST_CR_OP( c.sub, x10, x11, 0x7ffc00, -0x401, -0x800001, x1, 236, x2)
+
+inst_60:
+// rs2_val == -16777217,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:-0x1000001
+TEST_CR_OP( c.sub, x10, x11, 0x34333334, 0x33333333, -0x1000001, x1, 240, x2)
+
+inst_61:
+// rs2_val == -33554433, rs1_val == -2097153
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x200001; op2val:-0x2000001
+TEST_CR_OP( c.sub, x10, x11, 0x1e00000, -0x200001, -0x2000001, x1, 244, x2)
+
+inst_62:
+// rs2_val == -67108865,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:-0x4000001
+TEST_CR_OP( c.sub, x10, x11, 0x3ff4afe, -0xb503, -0x4000001, x1, 248, x2)
+
+inst_63:
+// rs2_val == -268435457,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xa; op2val:-0x10000001
+TEST_CR_OP( c.sub, x10, x11, 0xffffff7, -0xa, -0x10000001, x1, 252, x2)
+
+inst_64:
+// rs2_val == -536870913, rs1_val == 8192
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2000; op2val:-0x20000001
+TEST_CR_OP( c.sub, x10, x11, 0x20002001, 0x2000, -0x20000001, x1, 256, x2)
+
+inst_65:
+// rs2_val == -1073741825, rs1_val == -1431655766
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x40000001
+TEST_CR_OP( c.sub, x10, x11, 0xeaaaaaab, -0x55555556, -0x40000001, x1, 260, x2)
+
+inst_66:
+// rs2_val == 1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x2000001; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xa8aaaaaa, -0x2000001, 0x55555555, x1, 264, x2)
+
+inst_67:
+// rs2_val == -1431655766, rs1_val==-46339 and rs2_val==-1431655766
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x5554a053, -0xb503, -0x55555556, x1, 268, x2)
+
+inst_68:
+// rs1_val == 64,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x40; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x999999db, 0x40, 0x66666665, x1, 272, x2)
+
+inst_69:
+// rs1_val == 128,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x80; op2val:0x1000000
+TEST_CR_OP( c.sub, x10, x11, 0xff000080, 0x80, 0x1000000, x1, 276, x2)
+
+inst_70:
+// rs1_val == 512,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x200; op2val:0x20
+TEST_CR_OP( c.sub, x10, x11, 0x1e0, 0x200, 0x20, x1, 280, x2)
+
+inst_71:
+// rs1_val == 1024,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x400; op2val:-0x2
+TEST_CR_OP( c.sub, x10, x11, 0x402, 0x400, -0x2, x1, 284, x2)
+
+inst_72:
+// rs1_val == 4096,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x1000; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xc503, 0x1000, -0xb503, x1, 288, x2)
+
+inst_73:
+// rs1_val == 16384,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4000; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x4000, 0x4000, 0x0, x1, 292, x2)
+
+inst_74:
+// rs1_val == 65536,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x10000; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x999a999b, 0x10000, 0x66666665, x1, 296, x2)
+
+inst_75:
+// rs1_val == 131072,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x20000; op2val:0x100000
+TEST_CR_OP( c.sub, x10, x11, 0xfff20000, 0x20000, 0x100000, x1, 300, x2)
+
+inst_76:
+// rs1_val == 2097152,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x200000; op2val:0x400000
+TEST_CR_OP( c.sub, x10, x11, 0xffe00000, 0x200000, 0x400000, x1, 304, x2)
+
+inst_77:
+// rs1_val == 4194304,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x400000; op2val:-0x21
+TEST_CR_OP( c.sub, x10, x11, 0x400021, 0x400000, -0x21, x1, 308, x2)
+
+inst_78:
+// rs1_val == 8388608,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x800000; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x7ffffe, 0x800000, 0x2, x1, 312, x2)
+
+inst_79:
+// rs1_val == 16777216,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x1000000; op2val:-0x80001
+TEST_CR_OP( c.sub, x10, x11, 0x1080001, 0x1000000, -0x80001, x1, 316, x2)
+
+inst_80:
+// rs1_val == 134217728,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x8000000; op2val:-0x11
+TEST_CR_OP( c.sub, x10, x11, 0x8000011, 0x8000000, -0x11, x1, 320, x2)
+
+inst_81:
+// rs1_val == 536870912,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x20000000; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0xb999999b, 0x20000000, 0x66666665, x1, 324, x2)
+
+inst_82:
+// rs1_val == -5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5; op2val:0x400
+TEST_CR_OP( c.sub, x10, x11, 0xfffffbfb, -0x5, 0x400, x1, 328, x2)
+
+inst_83:
+// rs1_val == -33,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x21; op2val:-0x41
+TEST_CR_OP( c.sub, x10, x11, 0x20, -0x21, -0x41, x1, 332, x2)
+
+inst_84:
+// rs1_val == -513,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x201; op2val:-0x4
+TEST_CR_OP( c.sub, x10, x11, 0xfffffe03, -0x201, -0x4, x1, 336, x2)
+
+inst_85:
+// rs1_val == -8193,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x2001; op2val:0x80
+TEST_CR_OP( c.sub, x10, x11, 0xffffdf7f, -0x2001, 0x80, x1, 340, x2)
+
+inst_86:
+// rs1_val == -16385,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x4001; op2val:-0x100001
+TEST_CR_OP( c.sub, x10, x11, 0xfc000, -0x4001, -0x100001, x1, 344, x2)
+
+inst_87:
+// rs1_val == -32769,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x8001; op2val:0x10
+TEST_CR_OP( c.sub, x10, x11, 0xffff7fef, -0x8001, 0x10, x1, 348, x2)
+
+inst_88:
+// rs1_val == -65537,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x10001; op2val:0x400
+TEST_CR_OP( c.sub, x10, x11, 0xfffefbff, -0x10001, 0x400, x1, 352, x2)
+
+inst_89:
+// rs1_val == -131073,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x20001; op2val:-0x40001
+TEST_CR_OP( c.sub, x10, x11, 0x20000, -0x20001, -0x40001, x1, 356, x2)
+
+inst_90:
+// rs1_val == -524289,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x80001; op2val:-0x80000000
+TEST_CR_OP( c.sub, x10, x11, 0x7ff7ffff, -0x80001, -0x80000000, x1, 360, x2)
+
+inst_91:
+// rs1_val == -1048577,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x100001; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaa9aaaa9, -0x100001, 0x55555556, x1, 364, x2)
+
+inst_92:
+// rs1_val == -4194305,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x400001; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xffc0b503, -0x400001, -0xb504, x1, 368, x2)
+
+inst_93:
+// rs1_val == -8388609,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x800001; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xaa2aaaab, -0x800001, 0x55555554, x1, 372, x2)
+
+inst_94:
+// rs1_val == -67108865,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x4000001; op2val:-0x1
+TEST_CR_OP( c.sub, x10, x11, 0xfc000000, -0x4000001, -0x1, x1, 376, x2)
+
+inst_95:
+// rs1_val == -134217729,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x8000001; op2val:0x40000000
+TEST_CR_OP( c.sub, x10, x11, 0xb7ffffff, -0x8000001, 0x40000000, x1, 380, x2)
+
+inst_96:
+// rs1_val == -268435457,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x10000001; op2val:0x1000
+TEST_CR_OP( c.sub, x10, x11, 0xefffefff, -0x10000001, 0x1000, x1, 384, x2)
+
+inst_97:
+// rs1_val == -536870913,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x20000001; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x35555555, -0x20000001, -0x55555556, x1, 388, x2)
+
+inst_98:
+// rs1_val==3 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x3, 0x3, x1, 392, x2)
+
+inst_99:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaae, 0x3, 0x55555555, x1, 396, x2)
+
+inst_100:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x55555559, 0x3, -0x55555556, x1, 400, x2)
+
+inst_101:
+// rs1_val==3 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe, 0x3, 0x5, x1, 404, x2)
+
+inst_102:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0xccccccd0, 0x3, 0x33333333, x1, 408, x2)
+
+inst_103:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x9999999d, 0x3, 0x66666666, x1, 412, x2)
+
+inst_104:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xb507, 0x3, -0xb504, x1, 416, x2)
+
+inst_105:
+// rs1_val==3 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xffff4aff, 0x3, 0xb504, x1, 420, x2)
+
+inst_106:
+// rs1_val==3 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x3, 0x2, x1, 424, x2)
+
+inst_107:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaf, 0x3, 0x55555554, x1, 428, x2)
+
+inst_108:
+// rs1_val==3 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x3, 0x3, 0x0, x1, 432, x2)
+
+inst_109:
+// rs1_val==3 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, 0x3, 0x4, x1, 436, x2)
+
+inst_110:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0xccccccd1, 0x3, 0x33333332, x1, 440, x2)
+
+inst_111:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x9999999e, 0x3, 0x66666665, x1, 444, x2)
+
+inst_112:
+// rs1_val==3 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xffff4b00, 0x3, 0xb503, x1, 448, x2)
+
+inst_113:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaad, 0x3, 0x55555556, x1, 452, x2)
+
+inst_114:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x55555558, 0x3, -0x55555555, x1, 456, x2)
+
+inst_115:
+// rs1_val==3 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffd, 0x3, 0x6, x1, 460, x2)
+
+inst_116:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccf, 0x3, 0x33333334, x1, 464, x2)
+
+inst_117:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x9999999c, 0x3, 0x66666667, x1, 468, x2)
+
+inst_118:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xb506, 0x3, -0xb503, x1, 472, x2)
+
+inst_119:
+// rs1_val==3 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0xffff4afe, 0x3, 0xb505, x1, 476, x2)
+
+inst_120:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x55555552, 0x55555555, 0x3, x1, 480, x2)
+
+inst_121:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x55555555, 0x55555555, x1, 484, x2)
+
+inst_122:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab, 0x55555555, -0x55555556, x1, 488, x2)
+
+inst_123:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x55555550, 0x55555555, 0x5, x1, 492, x2)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0x22222222, 0x55555555, 0x33333333, x1, 496, x2)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeef, 0x55555555, 0x66666666, x1, 500, x2)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x55560a59, 0x55555555, -0xb504, x1, 504, x2)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x5554a051, 0x55555555, 0xb504, x1, 508, x2)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x55555553, 0x55555555, 0x2, x1, 512, x2)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x55555555, 0x55555554, x1, 516, x2)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x55555555, 0x55555555, 0x0, x1, 520, x2)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x55555551, 0x55555555, 0x4, x1, 524, x2)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0x22222223, 0x55555555, 0x33333332, x1, 528, x2)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeef0, 0x55555555, 0x66666665, x1, 532, x2)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x5554a052, 0x55555555, 0xb503, x1, 536, x2)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, 0x55555555, 0x55555556, x1, 540, x2)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaa, 0x55555555, -0x55555555, x1, 544, x2)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x5555554f, 0x55555555, 0x6, x1, 548, x2)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0x22222221, 0x55555555, 0x33333334, x1, 552, x2)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeee, 0x55555555, 0x66666667, x1, 556, x2)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x55560a58, 0x55555555, -0xb503, x1, 560, x2)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0x5554a050, 0x55555555, 0xb505, x1, 564, x2)
+
+inst_142:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa7, -0x55555556, 0x3, x1, 568, x2)
+
+inst_143:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x55555555, -0x55555556, 0x55555555, x1, 572, x2)
+
+inst_144:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x0, -0x55555556, -0x55555556, x1, 576, x2)
+
+inst_145:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa5, -0x55555556, 0x5, x1, 580, x2)
+
+inst_146:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0x77777777, -0x55555556, 0x33333333, x1, 584, x2)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x44444444, -0x55555556, 0x66666666, x1, 588, x2)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xaaab5fae, -0x55555556, -0xb504, x1, 592, x2)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xaaa9f5a6, -0x55555556, 0xb504, x1, 596, x2)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa8, -0x55555556, 0x2, x1, 600, x2)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0x55555556, -0x55555556, 0x55555554, x1, 604, x2)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaa, -0x55555556, 0x0, x1, 608, x2)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa6, -0x55555556, 0x4, x1, 612, x2)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0x77777778, -0x55555556, 0x33333332, x1, 616, x2)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x44444445, -0x55555556, 0x66666665, x1, 620, x2)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xaaa9f5a7, -0x55555556, 0xb503, x1, 624, x2)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x55555554, -0x55555556, 0x55555556, x1, 628, x2)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, -0x55555556, -0x55555555, x1, 632, x2)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa4, -0x55555556, 0x6, x1, 636, x2)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0x77777776, -0x55555556, 0x33333334, x1, 640, x2)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x44444443, -0x55555556, 0x66666667, x1, 644, x2)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xaaab5fad, -0x55555556, -0xb503, x1, 648, x2)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0xaaa9f5a5, -0x55555556, 0xb505, x1, 652, x2)
+
+inst_164:
+// rs1_val==5 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x5, 0x3, x1, 656, x2)
+
+inst_165:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaab0, 0x5, 0x55555555, x1, 660, x2)
+
+inst_166:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x5555555b, 0x5, -0x55555556, x1, 664, x2)
+
+inst_167:
+// rs1_val==5 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x5, 0x5, x1, 668, x2)
+
+inst_168:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0xccccccd2, 0x5, 0x33333333, x1, 672, x2)
+
+inst_169:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x9999999f, 0x5, 0x66666666, x1, 676, x2)
+
+inst_170:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xb509, 0x5, -0xb504, x1, 680, x2)
+
+inst_171:
+// rs1_val==5 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xffff4b01, 0x5, 0xb504, x1, 684, x2)
+
+inst_172:
+// rs1_val==5 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x3, 0x5, 0x2, x1, 688, x2)
+
+inst_173:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaab1, 0x5, 0x55555554, x1, 692, x2)
+
+inst_174:
+// rs1_val==5 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x5, 0x5, 0x0, x1, 696, x2)
+
+inst_175:
+// rs1_val==5 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x5, 0x4, x1, 700, x2)
+
+inst_176:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0xccccccd3, 0x5, 0x33333332, x1, 704, x2)
+
+inst_177:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x999999a0, 0x5, 0x66666665, x1, 708, x2)
+
+inst_178:
+// rs1_val==5 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xffff4b02, 0x5, 0xb503, x1, 712, x2)
+
+inst_179:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaf, 0x5, 0x55555556, x1, 716, x2)
+
+inst_180:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x5555555a, 0x5, -0x55555555, x1, 720, x2)
+
+inst_181:
+// rs1_val==5 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, 0x5, 0x6, x1, 724, x2)
+
+inst_182:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0xccccccd1, 0x5, 0x33333334, x1, 728, x2)
+
+inst_183:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x9999999e, 0x5, 0x66666667, x1, 732, x2)
+
+inst_184:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xb508, 0x5, -0xb503, x1, 736, x2)
+
+inst_185:
+// rs1_val==5 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0xffff4b00, 0x5, 0xb505, x1, 740, x2)
+
+inst_186:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x33333330, 0x33333333, 0x3, x1, 744, x2)
+
+inst_187:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xddddddde, 0x33333333, 0x55555555, x1, 748, x2)
+
+inst_188:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x88888889, 0x33333333, -0x55555556, x1, 752, x2)
+
+inst_189:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x3333332e, 0x33333333, 0x5, x1, 756, x2)
+
+inst_190:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x33333333, 0x33333333, x1, 760, x2)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccd, 0x33333333, 0x66666666, x1, 764, x2)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x3333e837, 0x33333333, -0xb504, x1, 768, x2)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x33327e2f, 0x33333333, 0xb504, x1, 772, x2)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x33333331, 0x33333333, 0x2, x1, 776, x2)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xdddddddf, 0x33333333, 0x55555554, x1, 780, x2)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x33333333, 0x33333333, 0x0, x1, 784, x2)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x3333332f, 0x33333333, 0x4, x1, 788, x2)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x33333333, 0x33333332, x1, 792, x2)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0xccccccce, 0x33333333, 0x66666665, x1, 796, x2)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x33327e30, 0x33333333, 0xb503, x1, 800, x2)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xdddddddd, 0x33333333, 0x55555556, x1, 804, x2)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x88888888, 0x33333333, -0x55555555, x1, 808, x2)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x3333332d, 0x33333333, 0x6, x1, 812, x2)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, 0x33333333, 0x33333334, x1, 816, x2)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccc, 0x33333333, 0x66666667, x1, 820, x2)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x3333e836, 0x33333333, -0xb503, x1, 824, x2)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0x33327e2e, 0x33333333, 0xb505, x1, 828, x2)
+
+inst_208:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x66666663, 0x66666666, 0x3, x1, 832, x2)
+
+inst_209:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x11111111, 0x66666666, 0x55555555, x1, 836, x2)
+
+inst_210:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xbbbbbbbc, 0x66666666, -0x55555556, x1, 840, x2)
+
+inst_211:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x66666661, 0x66666666, 0x5, x1, 844, x2)
+
+inst_212:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0x33333333, 0x66666666, 0x33333333, x1, 848, x2)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x66666666, 0x66666666, x1, 852, x2)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x66671b6a, 0x66666666, -0xb504, x1, 856, x2)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x6665b162, 0x66666666, 0xb504, x1, 860, x2)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x66666664, 0x66666666, 0x2, x1, 864, x2)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0x11111112, 0x66666666, 0x55555554, x1, 868, x2)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x66666666, 0x66666666, 0x0, x1, 872, x2)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x66666662, 0x66666666, 0x4, x1, 876, x2)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0x33333334, 0x66666666, 0x33333332, x1, 880, x2)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x66666666, 0x66666665, x1, 884, x2)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x6665b163, 0x66666666, 0xb503, x1, 888, x2)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x11111110, 0x66666666, 0x55555556, x1, 892, x2)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xbbbbbbbb, 0x66666666, -0x55555555, x1, 896, x2)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x66666660, 0x66666666, 0x6, x1, 900, x2)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0x33333332, 0x66666666, 0x33333334, x1, 904, x2)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, 0x66666666, 0x66666667, x1, 908, x2)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x66671b69, 0x66666666, -0xb503, x1, 912, x2)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0x6665b161, 0x66666666, 0xb505, x1, 916, x2)
+
+inst_230:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xffff4af9, -0xb504, 0x3, x1, 920, x2)
+
+inst_231:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaa9f5a7, -0xb504, 0x55555555, x1, 924, x2)
+
+inst_232:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x5554a052, -0xb504, -0x55555556, x1, 928, x2)
+
+inst_233:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xffff4af7, -0xb504, 0x5, x1, 932, x2)
+
+inst_234:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccc17c9, -0xb504, 0x33333333, x1, 936, x2)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x9998e496, -0xb504, 0x66666666, x1, 940, x2)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x0, -0xb504, -0xb504, x1, 944, x2)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xfffe95f8, -0xb504, 0xb504, x1, 948, x2)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xffff4afa, -0xb504, 0x2, x1, 952, x2)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaa9f5a8, -0xb504, 0x55555554, x1, 956, x2)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xffff4afc, -0xb504, 0x0, x1, 960, x2)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xffff4af8, -0xb504, 0x4, x1, 964, x2)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0xcccc17ca, -0xb504, 0x33333332, x1, 968, x2)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x9998e497, -0xb504, 0x66666665, x1, 972, x2)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xfffe95f9, -0xb504, 0xb503, x1, 976, x2)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaa9f5a6, -0xb504, 0x55555556, x1, 980, x2)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x5554a051, -0xb504, -0x55555555, x1, 984, x2)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xffff4af6, -0xb504, 0x6, x1, 988, x2)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccc17c8, -0xb504, 0x33333334, x1, 992, x2)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x9998e495, -0xb504, 0x66666667, x1, 996, x2)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, -0xb504, -0xb503, x1, 1000, x2)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0xfffe95f7, -0xb504, 0xb505, x1, 1004, x2)
+
+inst_252:
+// rs1_val==46340 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xb501, 0xb504, 0x3, x1, 1008, x2)
+
+inst_253:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaab5faf, 0xb504, 0x55555555, x1, 1012, x2)
+
+inst_254:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x55560a5a, 0xb504, -0x55555556, x1, 1016, x2)
+
+inst_255:
+// rs1_val==46340 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xb4ff, 0xb504, 0x5, x1, 1020, x2)
+
+inst_256:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccd81d1, 0xb504, 0x33333333, x1, 1024, x2)
+
+inst_257:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x999a4e9e, 0xb504, 0x66666666, x1, 1028, x2)
+
+inst_258:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x16a08, 0xb504, -0xb504, x1, 1032, x2)
+
+inst_259:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0xb504, 0xb504, x1, 1036, x2)
+
+inst_260:
+// rs1_val==46340 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xb502, 0xb504, 0x2, x1, 1040, x2)
+
+inst_261:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaab5fb0, 0xb504, 0x55555554, x1, 1044, x2)
+
+inst_262:
+// rs1_val==46340 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xb504, 0xb504, 0x0, x1, 1048, x2)
+
+inst_263:
+// rs1_val==46340 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xb500, 0xb504, 0x4, x1, 1052, x2)
+
+inst_264:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0xcccd81d2, 0xb504, 0x33333332, x1, 1056, x2)
+
+inst_265:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x999a4e9f, 0xb504, 0x66666665, x1, 1060, x2)
+
+inst_266:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0xb504, 0xb503, x1, 1064, x2)
+
+inst_267:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaab5fae, 0xb504, 0x55555556, x1, 1068, x2)
+
+inst_268:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x55560a59, 0xb504, -0x55555555, x1, 1072, x2)
+
+inst_269:
+// rs1_val==46340 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xb4fe, 0xb504, 0x6, x1, 1076, x2)
+
+inst_270:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccd81d0, 0xb504, 0x33333334, x1, 1080, x2)
+
+inst_271:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x999a4e9d, 0xb504, 0x66666667, x1, 1084, x2)
+
+inst_272:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x16a07, 0xb504, -0xb503, x1, 1088, x2)
+
+inst_273:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, 0xb504, 0xb505, x1, 1092, x2)
+
+inst_274:
+// rs1_val==2 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, 0x2, 0x3, x1, 1096, x2)
+
+inst_275:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaad, 0x2, 0x55555555, x1, 1100, x2)
+
+inst_276:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x55555558, 0x2, -0x55555556, x1, 1104, x2)
+
+inst_277:
+// rs1_val==2 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffd, 0x2, 0x5, x1, 1108, x2)
+
+inst_278:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccf, 0x2, 0x33333333, x1, 1112, x2)
+
+inst_279:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x9999999c, 0x2, 0x66666666, x1, 1116, x2)
+
+inst_280:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xb506, 0x2, -0xb504, x1, 1120, x2)
+
+inst_281:
+// rs1_val==2 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xffff4afe, 0x2, 0xb504, x1, 1124, x2)
+
+inst_282:
+// rs1_val==2 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x2, 0x2, x1, 1128, x2)
+
+inst_283:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaae, 0x2, 0x55555554, x1, 1132, x2)
+
+inst_284:
+// rs1_val==2 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x2, 0x0, x1, 1136, x2)
+
+inst_285:
+// rs1_val==2 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe, 0x2, 0x4, x1, 1140, x2)
+
+inst_286:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0xccccccd0, 0x2, 0x33333332, x1, 1144, x2)
+
+inst_287:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x9999999d, 0x2, 0x66666665, x1, 1148, x2)
+
+inst_288:
+// rs1_val==2 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xffff4aff, 0x2, 0xb503, x1, 1152, x2)
+
+inst_289:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaac, 0x2, 0x55555556, x1, 1156, x2)
+
+inst_290:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x55555557, 0x2, -0x55555555, x1, 1160, x2)
+
+inst_291:
+// rs1_val==2 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffc, 0x2, 0x6, x1, 1164, x2)
+
+inst_292:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0xccccccce, 0x2, 0x33333334, x1, 1168, x2)
+
+inst_293:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x9999999b, 0x2, 0x66666667, x1, 1172, x2)
+
+inst_294:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xb505, 0x2, -0xb503, x1, 1176, x2)
+
+inst_295:
+// rs1_val==2 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0xffff4afd, 0x2, 0xb505, x1, 1180, x2)
+
+inst_296:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x55555551, 0x55555554, 0x3, x1, 1184, x2)
+
+inst_297:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, 0x55555554, 0x55555555, x1, 1188, x2)
+
+inst_298:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaa, 0x55555554, -0x55555556, x1, 1192, x2)
+
+inst_299:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x5555554f, 0x55555554, 0x5, x1, 1196, x2)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0x22222221, 0x55555554, 0x33333333, x1, 1200, x2)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeee, 0x55555554, 0x66666666, x1, 1204, x2)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x55560a58, 0x55555554, -0xb504, x1, 1208, x2)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x5554a050, 0x55555554, 0xb504, x1, 1212, x2)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x55555552, 0x55555554, 0x2, x1, 1216, x2)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x55555554, 0x55555554, x1, 1220, x2)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x55555554, 0x55555554, 0x0, x1, 1224, x2)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x55555550, 0x55555554, 0x4, x1, 1228, x2)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0x22222222, 0x55555554, 0x33333332, x1, 1232, x2)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeef, 0x55555554, 0x66666665, x1, 1236, x2)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x5554a051, 0x55555554, 0xb503, x1, 1240, x2)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe, 0x55555554, 0x55555556, x1, 1244, x2)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9, 0x55555554, -0x55555555, x1, 1248, x2)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x5555554e, 0x55555554, 0x6, x1, 1252, x2)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0x22222220, 0x55555554, 0x33333334, x1, 1256, x2)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeed, 0x55555554, 0x66666667, x1, 1260, x2)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x55560a57, 0x55555554, -0xb503, x1, 1264, x2)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0x5554a04f, 0x55555554, 0xb505, x1, 1268, x2)
+
+inst_318:
+// rs1_val==0 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffd, 0x0, 0x3, x1, 1272, x2)
+
+inst_319:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab, 0x0, 0x55555555, x1, 1276, x2)
+
+inst_320:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x55555556, 0x0, -0x55555556, x1, 1280, x2)
+
+inst_321:
+// rs1_val==0 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffb, 0x0, 0x5, x1, 1284, x2)
+
+inst_322:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccd, 0x0, 0x33333333, x1, 1288, x2)
+
+inst_323:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x9999999a, 0x0, 0x66666666, x1, 1292, x2)
+
+inst_324:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xb504, 0x0, -0xb504, x1, 1296, x2)
+
+inst_325:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xaaab5fae, -0x55555555, -0xb503, x1, 1300, x2)
+
+inst_326:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0xaaa9f5a6, -0x55555555, 0xb505, x1, 1304, x2)
+
+inst_327:
+// rs1_val==6 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x3, 0x6, 0x3, x1, 1308, x2)
+
+inst_328:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaab1, 0x6, 0x55555555, x1, 1312, x2)
+
+inst_329:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x5555555c, 0x6, -0x55555556, x1, 1316, x2)
+
+inst_330:
+// rs1_val==6 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x6, 0x5, x1, 1320, x2)
+
+inst_331:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0xccccccd3, 0x6, 0x33333333, x1, 1324, x2)
+
+inst_332:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x999999a0, 0x6, 0x66666666, x1, 1328, x2)
+
+inst_333:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xb50a, 0x6, -0xb504, x1, 1332, x2)
+
+inst_334:
+// rs1_val==6 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xffff4b02, 0x6, 0xb504, x1, 1336, x2)
+
+inst_335:
+// rs1_val==6 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x4, 0x6, 0x2, x1, 1340, x2)
+
+inst_336:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaab2, 0x6, 0x55555554, x1, 1344, x2)
+
+inst_337:
+// rs1_val==6 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x6, 0x6, 0x0, x1, 1348, x2)
+
+inst_338:
+// rs1_val==6 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x6, 0x4, x1, 1352, x2)
+
+inst_339:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0xccccccd4, 0x6, 0x33333332, x1, 1356, x2)
+
+inst_340:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x999999a1, 0x6, 0x66666665, x1, 1360, x2)
+
+inst_341:
+// rs1_val==6 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xffff4b03, 0x6, 0xb503, x1, 1364, x2)
+
+inst_342:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaab0, 0x6, 0x55555556, x1, 1368, x2)
+
+inst_343:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x5555555b, 0x6, -0x55555555, x1, 1372, x2)
+
+inst_344:
+// rs1_val==6 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x6, 0x6, x1, 1376, x2)
+
+inst_345:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0xccccccd2, 0x6, 0x33333334, x1, 1380, x2)
+
+inst_346:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x9999999f, 0x6, 0x66666667, x1, 1384, x2)
+
+inst_347:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xb509, 0x6, -0xb503, x1, 1388, x2)
+
+inst_348:
+// rs1_val==6 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0xffff4b01, 0x6, 0xb505, x1, 1392, x2)
+
+inst_349:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x33333331, 0x33333334, 0x3, x1, 1396, x2)
+
+inst_350:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xdddddddf, 0x33333334, 0x55555555, x1, 1400, x2)
+
+inst_351:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x8888888a, 0x33333334, -0x55555556, x1, 1404, x2)
+
+inst_352:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x3333332f, 0x33333334, 0x5, x1, 1408, x2)
+
+inst_353:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x33333334, 0x33333333, x1, 1412, x2)
+
+inst_354:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0xccccccce, 0x33333334, 0x66666666, x1, 1416, x2)
+
+inst_355:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x3333e838, 0x33333334, -0xb504, x1, 1420, x2)
+
+inst_356:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x33327e30, 0x33333334, 0xb504, x1, 1424, x2)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x33333332, 0x33333334, 0x2, x1, 1428, x2)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xdddddde0, 0x33333334, 0x55555554, x1, 1432, x2)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x33333334, 0x33333334, 0x0, x1, 1436, x2)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x33333330, 0x33333334, 0x4, x1, 1440, x2)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x33333334, 0x33333332, x1, 1444, x2)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccf, 0x33333334, 0x66666665, x1, 1448, x2)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x33327e31, 0x33333334, 0xb503, x1, 1452, x2)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xddddddde, 0x33333334, 0x55555556, x1, 1456, x2)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x88888889, 0x33333334, -0x55555555, x1, 1460, x2)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x3333332e, 0x33333334, 0x6, x1, 1464, x2)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x33333334, 0x33333334, x1, 1468, x2)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccd, 0x33333334, 0x66666667, x1, 1472, x2)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x3333e837, 0x33333334, -0xb503, x1, 1476, x2)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0x33327e2f, 0x33333334, 0xb505, x1, 1480, x2)
+
+inst_371:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x66666664, 0x66666667, 0x3, x1, 1484, x2)
+
+inst_372:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x11111112, 0x66666667, 0x55555555, x1, 1488, x2)
+
+inst_373:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xbbbbbbbd, 0x66666667, -0x55555556, x1, 1492, x2)
+
+inst_374:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x66666662, 0x66666667, 0x5, x1, 1496, x2)
+
+inst_375:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0x33333334, 0x66666667, 0x33333333, x1, 1500, x2)
+
+inst_376:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x66666667, 0x66666666, x1, 1504, x2)
+
+inst_377:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x66671b6b, 0x66666667, -0xb504, x1, 1508, x2)
+
+inst_378:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x6665b163, 0x66666667, 0xb504, x1, 1512, x2)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x66666665, 0x66666667, 0x2, x1, 1516, x2)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0x11111113, 0x66666667, 0x55555554, x1, 1520, x2)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x66666667, 0x66666667, 0x0, x1, 1524, x2)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x66666663, 0x66666667, 0x4, x1, 1528, x2)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0x33333335, 0x66666667, 0x33333332, x1, 1532, x2)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x66666667, 0x66666665, x1, 1536, x2)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x6665b164, 0x66666667, 0xb503, x1, 1540, x2)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x11111111, 0x66666667, 0x55555556, x1, 1544, x2)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xbbbbbbbc, 0x66666667, -0x55555555, x1, 1548, x2)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x66666661, 0x66666667, 0x6, x1, 1552, x2)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0x33333333, 0x66666667, 0x33333334, x1, 1556, x2)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x66666667, 0x66666667, x1, 1560, x2)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x66671b6a, 0x66666667, -0xb503, x1, 1564, x2)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0x6665b162, 0x66666667, 0xb505, x1, 1568, x2)
+
+inst_393:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xffff4afa, -0xb503, 0x3, x1, 1572, x2)
+
+inst_394:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaa9f5a8, -0xb503, 0x55555555, x1, 1576, x2)
+
+inst_395:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xffff4af8, -0xb503, 0x5, x1, 1580, x2)
+
+inst_396:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccc17ca, -0xb503, 0x33333333, x1, 1584, x2)
+
+inst_397:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x9998e497, -0xb503, 0x66666666, x1, 1588, x2)
+
+inst_398:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x1, -0xb503, -0xb504, x1, 1592, x2)
+
+inst_399:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xfffe95f9, -0xb503, 0xb504, x1, 1596, x2)
+
+inst_400:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xffff4afb, -0xb503, 0x2, x1, 1600, x2)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaa9f5a9, -0xb503, 0x55555554, x1, 1604, x2)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xffff4afd, -0xb503, 0x0, x1, 1608, x2)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xffff4af9, -0xb503, 0x4, x1, 1612, x2)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0xcccc17cb, -0xb503, 0x33333332, x1, 1616, x2)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x9998e498, -0xb503, 0x66666665, x1, 1620, x2)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xfffe95fa, -0xb503, 0xb503, x1, 1624, x2)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaa9f5a7, -0xb503, 0x55555556, x1, 1628, x2)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x5554a052, -0xb503, -0x55555555, x1, 1632, x2)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xffff4af7, -0xb503, 0x6, x1, 1636, x2)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccc17c9, -0xb503, 0x33333334, x1, 1640, x2)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x9998e496, -0xb503, 0x66666667, x1, 1644, x2)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x0, -0xb503, -0xb503, x1, 1648, x2)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0xfffe95f8, -0xb503, 0xb505, x1, 1652, x2)
+
+inst_414:
+// rs1_val==46341 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xb502, 0xb505, 0x3, x1, 1656, x2)
+
+inst_415:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaab5fb0, 0xb505, 0x55555555, x1, 1660, x2)
+
+inst_416:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x55560a5b, 0xb505, -0x55555556, x1, 1664, x2)
+
+inst_417:
+// rs1_val==46341 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xb500, 0xb505, 0x5, x1, 1668, x2)
+
+inst_418:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccd81d2, 0xb505, 0x33333333, x1, 1672, x2)
+
+inst_419:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x999a4e9f, 0xb505, 0x66666666, x1, 1676, x2)
+
+inst_420:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x16a09, 0xb505, -0xb504, x1, 1680, x2)
+
+inst_421:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0xb505, 0xb504, x1, 1684, x2)
+
+inst_422:
+// rs1_val==46341 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xb503, 0xb505, 0x2, x1, 1688, x2)
+
+inst_423:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaab5fb1, 0xb505, 0x55555554, x1, 1692, x2)
+
+inst_424:
+// rs1_val==46341 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xb505, 0xb505, 0x0, x1, 1696, x2)
+
+inst_425:
+// rs1_val==46341 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xb501, 0xb505, 0x4, x1, 1700, x2)
+
+inst_426:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0xcccd81d3, 0xb505, 0x33333332, x1, 1704, x2)
+
+inst_427:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x999a4ea0, 0xb505, 0x66666665, x1, 1708, x2)
+
+inst_428:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0xb505, 0xb503, x1, 1712, x2)
+
+inst_429:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaab5faf, 0xb505, 0x55555556, x1, 1716, x2)
+
+inst_430:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x55560a5a, 0xb505, -0x55555555, x1, 1720, x2)
+
+inst_431:
+// rs1_val==46341 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xb4ff, 0xb505, 0x6, x1, 1724, x2)
+
+inst_432:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccd81d1, 0xb505, 0x33333334, x1, 1728, x2)
+
+inst_433:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x999a4e9e, 0xb505, 0x66666667, x1, 1732, x2)
+
+inst_434:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x16a08, 0xb505, -0xb503, x1, 1736, x2)
+
+inst_435:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb505; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0xb505, 0xb505, x1, 1740, x2)
+
+inst_436:
+// rs1_val==0 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xffff4afc, 0x0, 0xb504, x1, 1744, x2)
+
+inst_437:
+// rs1_val==0 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe, 0x0, 0x2, x1, 1748, x2)
+
+inst_438:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaac, 0x0, 0x55555554, x1, 1752, x2)
+
+inst_439:
+// rs1_val==0 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x0, 0x0, x1, 1756, x2)
+
+inst_440:
+// rs1_val==0 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffc, 0x0, 0x4, x1, 1760, x2)
+
+inst_441:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0xccccccce, 0x0, 0x33333332, x1, 1764, x2)
+
+inst_442:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x9999999b, 0x0, 0x66666665, x1, 1768, x2)
+
+inst_443:
+// rs1_val==0 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xffff4afd, 0x0, 0xb503, x1, 1772, x2)
+
+inst_444:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaa, 0x0, 0x55555556, x1, 1776, x2)
+
+inst_445:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x55555555, 0x0, -0x55555555, x1, 1780, x2)
+
+inst_446:
+// rs1_val==0 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffa, 0x0, 0x6, x1, 1784, x2)
+
+inst_447:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccc, 0x0, 0x33333334, x1, 1788, x2)
+
+inst_448:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x99999999, 0x0, 0x66666667, x1, 1792, x2)
+
+inst_449:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xb503, 0x0, -0xb503, x1, 1796, x2)
+
+inst_450:
+// rs1_val==0 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0xffff4afb, 0x0, 0xb505, x1, 1800, x2)
+
+inst_451:
+// rs1_val==4 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x4, 0x3, x1, 1804, x2)
+
+inst_452:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaf, 0x4, 0x55555555, x1, 1808, x2)
+
+inst_453:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x5555555a, 0x4, -0x55555556, x1, 1812, x2)
+
+inst_454:
+// rs1_val==4 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, 0x4, 0x5, x1, 1816, x2)
+
+inst_455:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0xccccccd1, 0x4, 0x33333333, x1, 1820, x2)
+
+inst_456:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x9999999e, 0x4, 0x66666666, x1, 1824, x2)
+
+inst_457:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xb508, 0x4, -0xb504, x1, 1828, x2)
+
+inst_458:
+// rs1_val==4 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xffff4b00, 0x4, 0xb504, x1, 1832, x2)
+
+inst_459:
+// rs1_val==4 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x4, 0x2, x1, 1836, x2)
+
+inst_460:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaab0, 0x4, 0x55555554, x1, 1840, x2)
+
+inst_461:
+// rs1_val==4 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x4, 0x4, 0x0, x1, 1844, x2)
+
+inst_462:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0xccccccd2, 0x4, 0x33333332, x1, 1848, x2)
+
+inst_463:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x9999999f, 0x4, 0x66666665, x1, 1852, x2)
+
+inst_464:
+// rs1_val==4 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xffff4b01, 0x4, 0xb503, x1, 1856, x2)
+
+inst_465:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaae, 0x4, 0x55555556, x1, 1860, x2)
+
+inst_466:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x55555559, 0x4, -0x55555555, x1, 1864, x2)
+
+inst_467:
+// rs1_val==4 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe, 0x4, 0x6, x1, 1868, x2)
+
+inst_468:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0xccccccd0, 0x4, 0x33333334, x1, 1872, x2)
+
+inst_469:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x9999999d, 0x4, 0x66666667, x1, 1876, x2)
+
+inst_470:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xb507, 0x4, -0xb503, x1, 1880, x2)
+
+inst_471:
+// rs1_val==4 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0xffff4aff, 0x4, 0xb505, x1, 1884, x2)
+
+inst_472:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x3333332f, 0x33333332, 0x3, x1, 1888, x2)
+
+inst_473:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xdddddddd, 0x33333332, 0x55555555, x1, 1892, x2)
+
+inst_474:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x88888888, 0x33333332, -0x55555556, x1, 1896, x2)
+
+inst_475:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x3333332d, 0x33333332, 0x5, x1, 1900, x2)
+
+inst_476:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, 0x33333332, 0x33333333, x1, 1904, x2)
+
+inst_477:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccc, 0x33333332, 0x66666666, x1, 1908, x2)
+
+inst_478:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x3333e836, 0x33333332, -0xb504, x1, 1912, x2)
+
+inst_479:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x33327e2e, 0x33333332, 0xb504, x1, 1916, x2)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x33333330, 0x33333332, 0x2, x1, 1920, x2)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xddddddde, 0x33333332, 0x55555554, x1, 1924, x2)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x33333332, 0x33333332, 0x0, x1, 1928, x2)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x3333332e, 0x33333332, 0x4, x1, 1932, x2)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x33333332, 0x33333332, x1, 1936, x2)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccd, 0x33333332, 0x66666665, x1, 1940, x2)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x33327e2f, 0x33333332, 0xb503, x1, 1944, x2)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xdddddddc, 0x33333332, 0x55555556, x1, 1948, x2)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x88888887, 0x33333332, -0x55555555, x1, 1952, x2)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x3333332c, 0x33333332, 0x6, x1, 1956, x2)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe, 0x33333332, 0x33333334, x1, 1960, x2)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccb, 0x33333332, 0x66666667, x1, 1964, x2)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x3333e835, 0x33333332, -0xb503, x1, 1968, x2)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0x33327e2d, 0x33333332, 0xb505, x1, 1972, x2)
+
+inst_494:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x66666662, 0x66666665, 0x3, x1, 1976, x2)
+
+inst_495:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x11111110, 0x66666665, 0x55555555, x1, 1980, x2)
+
+inst_496:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xbbbbbbbb, 0x66666665, -0x55555556, x1, 1984, x2)
+
+inst_497:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x66666660, 0x66666665, 0x5, x1, 1988, x2)
+
+inst_498:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0x33333332, 0x66666665, 0x33333333, x1, 1992, x2)
+
+inst_499:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, 0x66666665, 0x66666666, x1, 1996, x2)
+
+inst_500:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x66671b69, 0x66666665, -0xb504, x1, 2000, x2)
+
+inst_501:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x6665b161, 0x66666665, 0xb504, x1, 2004, x2)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x66666663, 0x66666665, 0x2, x1, 2008, x2)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0x11111111, 0x66666665, 0x55555554, x1, 2012, x2)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x66666665, 0x66666665, 0x0, x1, 2016, x2)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x66666661, 0x66666665, 0x4, x1, 2020, x2)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0x33333333, 0x66666665, 0x33333332, x1, 2024, x2)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x66666665, 0x66666665, x1, 2028, x2)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x6665b162, 0x66666665, 0xb503, x1, 2032, x2)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x1111110f, 0x66666665, 0x55555556, x1, 2036, x2)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xbbbbbbba, 0x66666665, -0x55555555, x1, 2040, x2)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x6666665f, 0x66666665, 0x6, x1, 2044, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0x33333331, 0x66666665, 0x33333334, x1, 0, x2)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe, 0x66666665, 0x66666667, x1, 4, x2)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x66671b68, 0x66666665, -0xb503, x1, 8, x2)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0x6665b160, 0x66666665, 0xb505, x1, 12, x2)
+
+inst_516:
+// rs1_val==46339 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xb500, 0xb503, 0x3, x1, 16, x2)
+
+inst_517:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaab5fae, 0xb503, 0x55555555, x1, 20, x2)
+
+inst_518:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x55560a59, 0xb503, -0x55555556, x1, 24, x2)
+
+inst_519:
+// rs1_val==46339 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xb4fe, 0xb503, 0x5, x1, 28, x2)
+
+inst_520:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccd81d0, 0xb503, 0x33333333, x1, 32, x2)
+
+inst_521:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x999a4e9d, 0xb503, 0x66666666, x1, 36, x2)
+
+inst_522:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x16a07, 0xb503, -0xb504, x1, 40, x2)
+
+inst_523:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff, 0xb503, 0xb504, x1, 44, x2)
+
+inst_524:
+// rs1_val==46339 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xb501, 0xb503, 0x2, x1, 48, x2)
+
+inst_525:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaab5faf, 0xb503, 0x55555554, x1, 52, x2)
+
+inst_526:
+// rs1_val==46339 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xb503, 0xb503, 0x0, x1, 56, x2)
+
+inst_527:
+// rs1_val==46339 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xb4ff, 0xb503, 0x4, x1, 60, x2)
+
+inst_528:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0xcccd81d1, 0xb503, 0x33333332, x1, 64, x2)
+
+inst_529:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x999a4e9e, 0xb503, 0x66666665, x1, 68, x2)
+
+inst_530:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0xb503, 0xb503, x1, 72, x2)
+
+inst_531:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaab5fad, 0xb503, 0x55555556, x1, 76, x2)
+
+inst_532:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x55560a58, 0xb503, -0x55555555, x1, 80, x2)
+
+inst_533:
+// rs1_val==46339 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xb4fd, 0xb503, 0x6, x1, 84, x2)
+
+inst_534:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccd81cf, 0xb503, 0x33333334, x1, 88, x2)
+
+inst_535:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x999a4e9c, 0xb503, 0x66666667, x1, 92, x2)
+
+inst_536:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x16a06, 0xb503, -0xb503, x1, 96, x2)
+
+inst_537:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb503; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe, 0xb503, 0xb505, x1, 100, x2)
+
+inst_538:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x55555553, 0x55555556, 0x3, x1, 104, x2)
+
+inst_539:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x55555556, 0x55555555, x1, 108, x2)
+
+inst_540:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaac, 0x55555556, -0x55555556, x1, 112, x2)
+
+inst_541:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x55555551, 0x55555556, 0x5, x1, 116, x2)
+
+inst_542:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0x22222223, 0x55555556, 0x33333333, x1, 120, x2)
+
+inst_543:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeef0, 0x55555556, 0x66666666, x1, 124, x2)
+
+inst_544:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x55560a5a, 0x55555556, -0xb504, x1, 128, x2)
+
+inst_545:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0x5554a052, 0x55555556, 0xb504, x1, 132, x2)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x55555554, 0x55555556, 0x2, x1, 136, x2)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x55555556, 0x55555554, x1, 140, x2)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x55555556, 0x55555556, 0x0, x1, 144, x2)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x55555552, 0x55555556, 0x4, x1, 148, x2)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0x22222224, 0x55555556, 0x33333332, x1, 152, x2)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeef1, 0x55555556, 0x66666665, x1, 156, x2)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x5554a053, 0x55555556, 0xb503, x1, 160, x2)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x55555556, 0x55555556, x1, 164, x2)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab, 0x55555556, -0x55555555, x1, 168, x2)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x55555550, 0x55555556, 0x6, x1, 172, x2)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0x22222222, 0x55555556, 0x33333334, x1, 176, x2)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeef, 0x55555556, 0x66666667, x1, 180, x2)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb503
+TEST_CR_OP( c.sub, x10, x11, 0x55560a59, 0x55555556, -0xb503, x1, 184, x2)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb505
+TEST_CR_OP( c.sub, x10, x11, 0x5554a051, 0x55555556, 0xb505, x1, 188, x2)
+
+inst_560:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa8, -0x55555555, 0x3, x1, 192, x2)
+
+inst_561:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x55555556, -0x55555555, 0x55555555, x1, 196, x2)
+
+inst_562:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x1, -0x55555555, -0x55555556, x1, 200, x2)
+
+inst_563:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa6, -0x55555555, 0x5, x1, 204, x2)
+
+inst_564:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333333
+TEST_CR_OP( c.sub, x10, x11, 0x77777778, -0x55555555, 0x33333333, x1, 208, x2)
+
+inst_565:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666666
+TEST_CR_OP( c.sub, x10, x11, 0x44444445, -0x55555555, 0x66666666, x1, 212, x2)
+
+inst_566:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xaaab5faf, -0x55555555, -0xb504, x1, 216, x2)
+
+inst_567:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb504
+TEST_CR_OP( c.sub, x10, x11, 0xaaa9f5a7, -0x55555555, 0xb504, x1, 220, x2)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9, -0x55555555, 0x2, x1, 224, x2)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555554
+TEST_CR_OP( c.sub, x10, x11, 0x55555557, -0x55555555, 0x55555554, x1, 228, x2)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab, -0x55555555, 0x0, x1, 232, x2)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa7, -0x55555555, 0x4, x1, 236, x2)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333332
+TEST_CR_OP( c.sub, x10, x11, 0x77777779, -0x55555555, 0x33333332, x1, 240, x2)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666665
+TEST_CR_OP( c.sub, x10, x11, 0x44444446, -0x55555555, 0x66666665, x1, 244, x2)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb503
+TEST_CR_OP( c.sub, x10, x11, 0xaaa9f5a8, -0x55555555, 0xb503, x1, 248, x2)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555556
+TEST_CR_OP( c.sub, x10, x11, 0x55555555, -0x55555555, 0x55555556, x1, 252, x2)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555555
+TEST_CR_OP( c.sub, x10, x11, 0x0, -0x55555555, -0x55555555, x1, 256, x2)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa5, -0x55555555, 0x6, x1, 260, x2)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333334
+TEST_CR_OP( c.sub, x10, x11, 0x77777777, -0x55555555, 0x33333334, x1, 264, x2)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666667
+TEST_CR_OP( c.sub, x10, x11, 0x44444444, -0x55555555, 0x66666667, x1, 268, x2)
+
+inst_580:
+// rs2_val == 0, rs1_val == 262144
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x40000; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x40000, 0x40000, 0x0, x1, 272, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 69*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/csw-01.S b/riscof/suite/rv32i_m/C/csw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..78e01468e389cc26ac26a03ed5a936b981b2fafb
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/csw-01.S
@@ -0,0 +1,419 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.sw instruction of the RISC-V C extension for the csw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",csw)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x12, rs2==x14, rs2_val == (-2**(xlen-1)), imm_val == 16, imm_val > 0, rs2_val == -2147483648
+// opcode:c.sw; op1:x12; op2:x14; op2val:-0x80000000; immval:0x10
+TEST_STORE(x1,x2,0,x12,x14,-0x80000000,0x10,0,c.sw,0)
+
+inst_1:
+// rs1==x14, rs2==x9, rs2_val == 0, imm_val == 32
+// opcode:c.sw; op1:x14; op2:x9; op2val:0x0; immval:0x20
+TEST_STORE(x1,x2,0,x14,x9,0x0,0x20,4,c.sw,0)
+
+inst_2:
+// rs1==x13, rs2==x12, rs2_val == (2**(xlen-1)-1), rs2_val == 2147483647, imm_val == 120
+// opcode:c.sw; op1:x13; op2:x12; op2val:0x7fffffff; immval:0x78
+TEST_STORE(x1,x2,0,x13,x12,0x7fffffff,0x78,8,c.sw,0)
+
+inst_3:
+// rs1==x9, rs2==x11, rs2_val == 1,
+// opcode:c.sw; op1:x9; op2:x11; op2val:0x1; immval:0x1c
+TEST_STORE(x1,x2,0,x9,x11,0x1,0x1c,12,c.sw,0)
+
+inst_4:
+// rs1==x11, rs2==x8, imm_val == 0, rs2_val == -9
+// opcode:c.sw; op1:x11; op2:x8; op2val:-0x9; immval:0x0
+TEST_STORE(x1,x2,0,x11,x8,-0x9,0x0,16,c.sw,0)
+
+inst_5:
+// rs1==x8, rs2==x15, rs2_val == 2,
+// opcode:c.sw; op1:x8; op2:x15; op2val:0x2; immval:0x0
+TEST_STORE(x1,x2,0,x8,x15,0x2,0x0,20,c.sw,0)
+
+inst_6:
+// rs1==x15, rs2==x10, rs2_val == 4,
+// opcode:c.sw; op1:x15; op2:x10; op2val:0x4; immval:0x78
+TEST_STORE(x1,x2,0,x15,x10,0x4,0x78,24,c.sw,0)
+
+inst_7:
+// rs1==x10, rs2==x13, rs2_val == 8,
+// opcode:c.sw; op1:x10; op2:x13; op2val:0x8; immval:0x2c
+TEST_STORE(x1,x2,0,x10,x13,0x8,0x2c,28,c.sw,0)
+
+inst_8:
+// rs2_val == 16,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x10; immval:0x4c
+TEST_STORE(x1,x2,0,x10,x11,0x10,0x4c,32,c.sw,0)
+
+inst_9:
+// rs2_val == 32,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x20; immval:0x2c
+TEST_STORE(x1,x2,0,x10,x11,0x20,0x2c,36,c.sw,0)
+
+inst_10:
+// rs2_val == 64, imm_val == 60
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x40; immval:0x3c
+TEST_STORE(x1,x2,0,x10,x11,0x40,0x3c,40,c.sw,0)
+
+inst_11:
+// rs2_val == 128,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x80; immval:0x34
+TEST_STORE(x1,x2,0,x10,x11,0x80,0x34,44,c.sw,0)
+
+inst_12:
+// rs2_val == 256, imm_val == 4
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x100; immval:0x4
+TEST_STORE(x1,x2,0,x10,x11,0x100,0x4,48,c.sw,0)
+
+inst_13:
+// rs2_val == 512,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x200; immval:0x48
+TEST_STORE(x1,x2,0,x10,x11,0x200,0x48,52,c.sw,0)
+
+inst_14:
+// rs2_val == 1024, imm_val == 116
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x400; immval:0x74
+TEST_STORE(x1,x2,0,x10,x11,0x400,0x74,56,c.sw,0)
+
+inst_15:
+// rs2_val == 2048,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x800; immval:0xc
+TEST_STORE(x1,x2,0,x10,x11,0x800,0xc,60,c.sw,0)
+
+inst_16:
+// rs2_val == 4096,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x1000; immval:0x78
+TEST_STORE(x1,x2,0,x10,x11,0x1000,0x78,64,c.sw,0)
+
+inst_17:
+// rs2_val == 8192,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x2000; immval:0x14
+TEST_STORE(x1,x2,0,x10,x11,0x2000,0x14,68,c.sw,0)
+
+inst_18:
+// rs2_val == 16384,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x4000; immval:0x0
+TEST_STORE(x1,x2,0,x10,x11,0x4000,0x0,72,c.sw,0)
+
+inst_19:
+// rs2_val == 32768,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x8000; immval:0x24
+TEST_STORE(x1,x2,0,x10,x11,0x8000,0x24,76,c.sw,0)
+
+inst_20:
+// rs2_val == 65536, imm_val == 64
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x10000; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,0x10000,0x40,80,c.sw,0)
+
+inst_21:
+// rs2_val == 131072,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x20000; immval:0x78
+TEST_STORE(x1,x2,0,x10,x11,0x20000,0x78,84,c.sw,0)
+
+inst_22:
+// rs2_val == 262144,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x40000; immval:0x78
+TEST_STORE(x1,x2,0,x10,x11,0x40000,0x78,88,c.sw,0)
+
+inst_23:
+// rs2_val == 524288,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x80000; immval:0x2c
+TEST_STORE(x1,x2,0,x10,x11,0x80000,0x2c,92,c.sw,0)
+
+inst_24:
+// rs2_val == 1048576,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x100000; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,0x100000,0x40,96,c.sw,0)
+
+inst_25:
+// rs2_val == 2097152,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x200000; immval:0x14
+TEST_STORE(x1,x2,0,x10,x11,0x200000,0x14,100,c.sw,0)
+
+inst_26:
+// rs2_val == 4194304,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x400000; immval:0x24
+TEST_STORE(x1,x2,0,x10,x11,0x400000,0x24,104,c.sw,0)
+
+inst_27:
+// rs2_val == 8388608,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x800000; immval:0x0
+TEST_STORE(x1,x2,0,x10,x11,0x800000,0x0,108,c.sw,0)
+
+inst_28:
+// rs2_val == 16777216,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x1000000; immval:0x74
+TEST_STORE(x1,x2,0,x10,x11,0x1000000,0x74,112,c.sw,0)
+
+inst_29:
+// rs2_val == 33554432,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x2000000; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,0x2000000,0x40,116,c.sw,0)
+
+inst_30:
+// rs2_val == 67108864,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x4000000; immval:0x74
+TEST_STORE(x1,x2,0,x10,x11,0x4000000,0x74,120,c.sw,0)
+
+inst_31:
+// rs2_val == 134217728,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x8000000; immval:0x44
+TEST_STORE(x1,x2,0,x10,x11,0x8000000,0x44,124,c.sw,0)
+
+inst_32:
+// rs2_val == 268435456,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x10000000; immval:0x10
+TEST_STORE(x1,x2,0,x10,x11,0x10000000,0x10,128,c.sw,0)
+
+inst_33:
+// rs2_val == 536870912,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x20000000; immval:0x44
+TEST_STORE(x1,x2,0,x10,x11,0x20000000,0x44,132,c.sw,0)
+
+inst_34:
+// rs2_val == 1073741824,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x40000000; immval:0x24
+TEST_STORE(x1,x2,0,x10,x11,0x40000000,0x24,136,c.sw,0)
+
+inst_35:
+// rs2_val == -2,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x2; immval:0x2c
+TEST_STORE(x1,x2,0,x10,x11,-0x2,0x2c,140,c.sw,0)
+
+inst_36:
+// rs2_val == -3,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x3; immval:0x30
+TEST_STORE(x1,x2,0,x10,x11,-0x3,0x30,144,c.sw,0)
+
+inst_37:
+// rs2_val == -5,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x5; immval:0x18
+TEST_STORE(x1,x2,0,x10,x11,-0x5,0x18,148,c.sw,0)
+
+inst_38:
+// rs2_val == -17,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x11; immval:0x48
+TEST_STORE(x1,x2,0,x10,x11,-0x11,0x48,152,c.sw,0)
+
+inst_39:
+// rs2_val == -33, imm_val == 108
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x21; immval:0x6c
+TEST_STORE(x1,x2,0,x10,x11,-0x21,0x6c,156,c.sw,0)
+
+inst_40:
+// rs2_val == -65,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x41; immval:0x1c
+TEST_STORE(x1,x2,0,x10,x11,-0x41,0x1c,160,c.sw,0)
+
+inst_41:
+// rs2_val == -134217729,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x8000001; immval:0x44
+TEST_STORE(x1,x2,0,x10,x11,-0x8000001,0x44,164,c.sw,0)
+
+inst_42:
+// rs2_val == -268435457,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x10000001; immval:0x34
+TEST_STORE(x1,x2,0,x10,x11,-0x10000001,0x34,168,c.sw,0)
+
+inst_43:
+// rs2_val == -536870913,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x20000001; immval:0x18
+TEST_STORE(x1,x2,0,x10,x11,-0x20000001,0x18,172,c.sw,0)
+
+inst_44:
+// rs2_val == -1073741825,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x40000001; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,-0x40000001,0x40,176,c.sw,0)
+
+inst_45:
+// rs2_val == 1431655765,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x55555555; immval:0x7c
+TEST_STORE(x1,x2,0,x10,x11,0x55555555,0x7c,180,c.sw,0)
+
+inst_46:
+// rs2_val == -1431655766,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x55555556; immval:0x34
+TEST_STORE(x1,x2,0,x10,x11,-0x55555556,0x34,184,c.sw,0)
+
+inst_47:
+// imm_val == 8,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x800; immval:0x8
+TEST_STORE(x1,x2,0,x10,x11,0x800,0x8,188,c.sw,0)
+
+inst_48:
+// imm_val == 92,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x1; immval:0x5c
+TEST_STORE(x1,x2,0,x10,x11,0x1,0x5c,192,c.sw,0)
+
+inst_49:
+// imm_val == 84, rs2_val == -67108865
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x4000001; immval:0x54
+TEST_STORE(x1,x2,0,x10,x11,-0x4000001,0x54,196,c.sw,0)
+
+inst_50:
+// imm_val == 40,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x5; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,0x5,0x28,200,c.sw,0)
+
+inst_51:
+// rs2_val == -129,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x81; immval:0x54
+TEST_STORE(x1,x2,0,x10,x11,-0x81,0x54,204,c.sw,0)
+
+inst_52:
+// rs2_val == -257,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x101; immval:0x74
+TEST_STORE(x1,x2,0,x10,x11,-0x101,0x74,208,c.sw,0)
+
+inst_53:
+// rs2_val == -513,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x201; immval:0x8
+TEST_STORE(x1,x2,0,x10,x11,-0x201,0x8,212,c.sw,0)
+
+inst_54:
+// rs2_val == -1025,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x401; immval:0x3c
+TEST_STORE(x1,x2,0,x10,x11,-0x401,0x3c,216,c.sw,0)
+
+inst_55:
+// rs2_val == -2049,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x801; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,-0x801,0x40,220,c.sw,0)
+
+inst_56:
+// rs2_val == -4097,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x1001; immval:0x5c
+TEST_STORE(x1,x2,0,x10,x11,-0x1001,0x5c,224,c.sw,0)
+
+inst_57:
+// rs2_val == -8193,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x2001; immval:0x14
+TEST_STORE(x1,x2,0,x10,x11,-0x2001,0x14,228,c.sw,0)
+
+inst_58:
+// rs2_val == -16385,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x4001; immval:0x24
+TEST_STORE(x1,x2,0,x10,x11,-0x4001,0x24,232,c.sw,0)
+
+inst_59:
+// rs2_val == -32769,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x8001; immval:0x54
+TEST_STORE(x1,x2,0,x10,x11,-0x8001,0x54,236,c.sw,0)
+
+inst_60:
+// rs2_val == -65537,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x10001; immval:0x2c
+TEST_STORE(x1,x2,0,x10,x11,-0x10001,0x2c,240,c.sw,0)
+
+inst_61:
+// rs2_val == -131073,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x20001; immval:0x20
+TEST_STORE(x1,x2,0,x10,x11,-0x20001,0x20,244,c.sw,0)
+
+inst_62:
+// rs2_val == -262145,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x40001; immval:0x10
+TEST_STORE(x1,x2,0,x10,x11,-0x40001,0x10,248,c.sw,0)
+
+inst_63:
+// rs2_val == -524289,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x80001; immval:0x54
+TEST_STORE(x1,x2,0,x10,x11,-0x80001,0x54,252,c.sw,0)
+
+inst_64:
+// rs2_val == -1048577,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x100001; immval:0x78
+TEST_STORE(x1,x2,0,x10,x11,-0x100001,0x78,256,c.sw,0)
+
+inst_65:
+// rs2_val == -2097153,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x200001; immval:0x30
+TEST_STORE(x1,x2,0,x10,x11,-0x200001,0x30,260,c.sw,0)
+
+inst_66:
+// rs2_val == -4194305,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x400001; immval:0x44
+TEST_STORE(x1,x2,0,x10,x11,-0x400001,0x44,264,c.sw,0)
+
+inst_67:
+// rs2_val == -8388609,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x800001; immval:0x1c
+TEST_STORE(x1,x2,0,x10,x11,-0x800001,0x1c,268,c.sw,0)
+
+inst_68:
+// rs2_val == -16777217,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x1000001; immval:0x10
+TEST_STORE(x1,x2,0,x10,x11,-0x1000001,0x10,272,c.sw,0)
+
+inst_69:
+// rs2_val == -33554433,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x2000001; immval:0x1c
+TEST_STORE(x1,x2,0,x10,x11,-0x2000001,0x1c,276,c.sw,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 70*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cswsp-01.S b/riscof/suite/rv32i_m/C/cswsp-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..5e319c06dbb793164799c92c96bbebad6bbdd86f
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cswsp-01.S
@@ -0,0 +1,419 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.swsp instruction of the RISC-V C extension for the cswsp covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cswsp)
+
+RVTEST_SIGBASE( x8,signature_x8_1)
+
+inst_0:
+// rs2==x18, rs2_val == (-2**(xlen-1)), imm_val > 0, rs2_val == -2147483648
+// opcode:c.swsp; op1:x2; op2:x18; op2val:-0x80000000; immval:0xc
+TEST_STORE(x8,x11,0,x2,x18,-0x80000000,0xc,0,c.swsp,0)
+
+inst_1:
+// rs2==x19, rs2_val == 0,
+// opcode:c.swsp; op1:x2; op2:x19; op2val:0x0; immval:0x38
+TEST_STORE(x8,x11,0,x2,x19,0x0,0x38,4,c.swsp,0)
+
+inst_2:
+// rs2==x21, rs2_val == (2**(xlen-1)-1), rs2_val == 2147483647
+// opcode:c.swsp; op1:x2; op2:x21; op2val:0x7fffffff; immval:0x18
+TEST_STORE(x8,x11,0,x2,x21,0x7fffffff,0x18,8,c.swsp,0)
+
+inst_3:
+// rs2==x7, rs2_val == 1,
+// opcode:c.swsp; op1:x2; op2:x7; op2val:0x1; immval:0x2c
+TEST_STORE(x8,x11,0,x2,x7,0x1,0x2c,12,c.swsp,0)
+
+inst_4:
+// rs2==x6, imm_val == 0, rs2_val == 524288
+// opcode:c.swsp; op1:x2; op2:x6; op2val:0x80000; immval:0x0
+TEST_STORE(x8,x11,0,x2,x6,0x80000,0x0,16,c.swsp,0)
+
+inst_5:
+// rs2==x26, rs2_val == 2,
+// opcode:c.swsp; op1:x2; op2:x26; op2val:0x2; immval:0x48
+TEST_STORE(x8,x11,0,x2,x26,0x2,0x48,20,c.swsp,0)
+
+inst_6:
+// rs2==x14, rs2_val == 4, imm_val == 64
+// opcode:c.swsp; op1:x2; op2:x14; op2val:0x4; immval:0x40
+TEST_STORE(x8,x11,0,x2,x14,0x4,0x40,24,c.swsp,0)
+
+inst_7:
+// rs2==x3, rs2_val == 8, imm_val == 220
+// opcode:c.swsp; op1:x2; op2:x3; op2val:0x8; immval:0xdc
+TEST_STORE(x8,x11,0,x2,x3,0x8,0xdc,28,c.swsp,0)
+
+inst_8:
+// rs2==x1, rs2_val == 16,
+// opcode:c.swsp; op1:x2; op2:x1; op2val:0x10; immval:0x4c
+TEST_STORE(x8,x11,0,x2,x1,0x10,0x4c,32,c.swsp,0)
+
+inst_9:
+// rs2==x15, rs2_val == 32, imm_val == 244
+// opcode:c.swsp; op1:x2; op2:x15; op2val:0x20; immval:0xf4
+TEST_STORE(x8,x11,0,x2,x15,0x20,0xf4,36,c.swsp,0)
+
+inst_10:
+// rs2==x12, rs2_val == 64,
+// opcode:c.swsp; op1:x2; op2:x12; op2val:0x40; immval:0x14
+TEST_STORE(x8,x11,0,x2,x12,0x40,0x14,40,c.swsp,0)
+
+inst_11:
+// rs2==x16, rs2_val == 128,
+// opcode:c.swsp; op1:x2; op2:x16; op2val:0x80; immval:0x34
+TEST_STORE(x8,x11,0,x2,x16,0x80,0x34,44,c.swsp,0)
+
+inst_12:
+// rs2==x30, rs2_val == 256, imm_val == 32
+// opcode:c.swsp; op1:x2; op2:x30; op2val:0x100; immval:0x20
+TEST_STORE(x8,x11,0,x2,x30,0x100,0x20,48,c.swsp,0)
+
+inst_13:
+// rs2==x5, rs2_val == 512,
+// opcode:c.swsp; op1:x2; op2:x5; op2val:0x200; immval:0xfc
+TEST_STORE(x8,x11,0,x2,x5,0x200,0xfc,52,c.swsp,0)
+
+inst_14:
+// rs2==x9, rs2_val == 1024,
+// opcode:c.swsp; op1:x2; op2:x9; op2val:0x400; immval:0x3c
+TEST_STORE(x8,x11,0,x2,x9,0x400,0x3c,56,c.swsp,0)
+
+inst_15:
+// rs2==x25, rs2_val == 2048,
+// opcode:c.swsp; op1:x2; op2:x25; op2val:0x800; immval:0x48
+TEST_STORE(x8,x11,0,x2,x25,0x800,0x48,60,c.swsp,0)
+
+inst_16:
+// rs2==x22, rs2_val == 4096,
+// opcode:c.swsp; op1:x2; op2:x22; op2val:0x1000; immval:0x44
+TEST_STORE(x8,x11,0,x2,x22,0x1000,0x44,64,c.swsp,0)
+
+inst_17:
+// rs2==x4, rs2_val == 8192, imm_val == 4
+// opcode:c.swsp; op1:x2; op2:x4; op2val:0x2000; immval:0x4
+TEST_STORE(x8,x11,0,x2,x4,0x2000,0x4,68,c.swsp,0)
+
+inst_18:
+// rs2==x17, rs2_val == 16384, imm_val == 8
+// opcode:c.swsp; op1:x2; op2:x17; op2val:0x4000; immval:0x8
+TEST_STORE(x8,x11,0,x2,x17,0x4000,0x8,72,c.swsp,0)
+
+inst_19:
+// rs2==x27, rs2_val == 32768, imm_val == 124
+// opcode:c.swsp; op1:x2; op2:x27; op2val:0x8000; immval:0x7c
+TEST_STORE(x8,x11,0,x2,x27,0x8000,0x7c,76,c.swsp,0)
+
+inst_20:
+// rs2==x24, rs2_val == 65536,
+// opcode:c.swsp; op1:x2; op2:x24; op2val:0x10000; immval:0x3c
+TEST_STORE(x8,x11,0,x2,x24,0x10000,0x3c,80,c.swsp,0)
+
+inst_21:
+// rs2==x20, rs2_val == 131072,
+// opcode:c.swsp; op1:x2; op2:x20; op2val:0x20000; immval:0x40
+TEST_STORE(x8,x11,0,x2,x20,0x20000,0x40,84,c.swsp,0)
+
+inst_22:
+// rs2==x10, rs2_val == 262144,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x40000; immval:0xf4
+TEST_STORE(x8,x11,0,x2,x10,0x40000,0xf4,88,c.swsp,0)
+
+inst_23:
+// rs2==x23, rs2_val == 1048576,
+// opcode:c.swsp; op1:x2; op2:x23; op2val:0x100000; immval:0xfc
+TEST_STORE(x8,x11,0,x2,x23,0x100000,0xfc,92,c.swsp,0)
+
+inst_24:
+// rs2==x13, rs2_val == 2097152,
+// opcode:c.swsp; op1:x2; op2:x13; op2val:0x200000; immval:0x1c
+TEST_STORE(x8,x11,0,x2,x13,0x200000,0x1c,96,c.swsp,0)
+
+inst_25:
+// rs2==x29, rs2_val == 4194304,
+// opcode:c.swsp; op1:x2; op2:x29; op2val:0x400000; immval:0x48
+TEST_STORE(x8,x11,0,x2,x29,0x400000,0x48,100,c.swsp,0)
+
+inst_26:
+// rs2==x31, rs2_val == 8388608, imm_val == 16
+// opcode:c.swsp; op1:x2; op2:x31; op2val:0x800000; immval:0x10
+TEST_STORE(x8,x3,0,x2,x31,0x800000,0x10,104,c.swsp,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_27:
+// rs2==x11, rs2_val == 16777216,
+// opcode:c.swsp; op1:x2; op2:x11; op2val:0x1000000; immval:0xc
+TEST_STORE(x1,x3,0,x2,x11,0x1000000,0xc,0,c.swsp,0)
+
+inst_28:
+// rs2==x8, rs2_val == 33554432,
+// opcode:c.swsp; op1:x2; op2:x8; op2val:0x2000000; immval:0xfc
+TEST_STORE(x1,x3,0,x2,x8,0x2000000,0xfc,4,c.swsp,0)
+
+inst_29:
+// rs2==x28, rs2_val == 67108864,
+// opcode:c.swsp; op1:x2; op2:x28; op2val:0x4000000; immval:0x2c
+TEST_STORE(x1,x3,0,x2,x28,0x4000000,0x2c,8,c.swsp,0)
+
+inst_30:
+// rs2_val == 134217728,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x8000000; immval:0x14
+TEST_STORE(x1,x3,0,x2,x10,0x8000000,0x14,12,c.swsp,0)
+
+inst_31:
+// rs2_val == 268435456, imm_val == 128
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x10000000; immval:0x80
+TEST_STORE(x1,x3,0,x2,x10,0x10000000,0x80,16,c.swsp,0)
+
+inst_32:
+// rs2_val == 536870912,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x20000000; immval:0x0
+TEST_STORE(x1,x3,0,x2,x10,0x20000000,0x0,20,c.swsp,0)
+
+inst_33:
+// rs2_val == 1073741824,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x40000000; immval:0x3c
+TEST_STORE(x1,x3,0,x2,x10,0x40000000,0x3c,24,c.swsp,0)
+
+inst_34:
+// rs2_val == -2,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x2; immval:0x30
+TEST_STORE(x1,x3,0,x2,x10,-0x2,0x30,28,c.swsp,0)
+
+inst_35:
+// rs2_val == -3,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x3; immval:0xc
+TEST_STORE(x1,x3,0,x2,x10,-0x3,0xc,32,c.swsp,0)
+
+inst_36:
+// rs2_val == -5, imm_val == 248
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x5; immval:0xf8
+TEST_STORE(x1,x3,0,x2,x10,-0x5,0xf8,36,c.swsp,0)
+
+inst_37:
+// rs2_val == -9,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x9; immval:0x14
+TEST_STORE(x1,x3,0,x2,x10,-0x9,0x14,40,c.swsp,0)
+
+inst_38:
+// rs2_val == -17,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x11; immval:0x2c
+TEST_STORE(x1,x3,0,x2,x10,-0x11,0x2c,44,c.swsp,0)
+
+inst_39:
+// rs2_val == -33,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x21; immval:0x34
+TEST_STORE(x1,x3,0,x2,x10,-0x21,0x34,48,c.swsp,0)
+
+inst_40:
+// rs2_val == -134217729,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x8000001; immval:0x28
+TEST_STORE(x1,x3,0,x2,x10,-0x8000001,0x28,52,c.swsp,0)
+
+inst_41:
+// rs2_val == -268435457,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x10000001; immval:0x4c
+TEST_STORE(x1,x3,0,x2,x10,-0x10000001,0x4c,56,c.swsp,0)
+
+inst_42:
+// rs2_val == -536870913,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x20000001; immval:0x30
+TEST_STORE(x1,x3,0,x2,x10,-0x20000001,0x30,60,c.swsp,0)
+
+inst_43:
+// rs2_val == -1073741825,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x40000001; immval:0x7c
+TEST_STORE(x1,x3,0,x2,x10,-0x40000001,0x7c,64,c.swsp,0)
+
+inst_44:
+// rs2_val == 1431655765, imm_val == 236
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x55555555; immval:0xec
+TEST_STORE(x1,x3,0,x2,x10,0x55555555,0xec,68,c.swsp,0)
+
+inst_45:
+// rs2_val == -1431655766, imm_val == 188
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x55555556; immval:0xbc
+TEST_STORE(x1,x3,0,x2,x10,-0x55555556,0xbc,72,c.swsp,0)
+
+inst_46:
+// imm_val == 84,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x80000; immval:0x54
+TEST_STORE(x1,x3,0,x2,x10,0x80000,0x54,76,c.swsp,0)
+
+inst_47:
+// imm_val == 168,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x21; immval:0xa8
+TEST_STORE(x1,x3,0,x2,x10,-0x21,0xa8,80,c.swsp,0)
+
+inst_48:
+// rs2_val == -65,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x41; immval:0xdc
+TEST_STORE(x1,x3,0,x2,x10,-0x41,0xdc,84,c.swsp,0)
+
+inst_49:
+// rs2_val == -129,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x81; immval:0xf4
+TEST_STORE(x1,x3,0,x2,x10,-0x81,0xf4,88,c.swsp,0)
+
+inst_50:
+// rs2_val == -257,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x101; immval:0x80
+TEST_STORE(x1,x3,0,x2,x10,-0x101,0x80,92,c.swsp,0)
+
+inst_51:
+// rs2_val == -513,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x201; immval:0xc
+TEST_STORE(x1,x3,0,x2,x10,-0x201,0xc,96,c.swsp,0)
+
+inst_52:
+// rs2_val == -1025,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x401; immval:0x20
+TEST_STORE(x1,x3,0,x2,x10,-0x401,0x20,100,c.swsp,0)
+
+inst_53:
+// rs2_val == -2049,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x801; immval:0x40
+TEST_STORE(x1,x3,0,x2,x10,-0x801,0x40,104,c.swsp,0)
+
+inst_54:
+// rs2_val == -4097,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x1001; immval:0x38
+TEST_STORE(x1,x3,0,x2,x10,-0x1001,0x38,108,c.swsp,0)
+
+inst_55:
+// rs2_val == -8193,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x2001; immval:0x80
+TEST_STORE(x1,x3,0,x2,x10,-0x2001,0x80,112,c.swsp,0)
+
+inst_56:
+// rs2_val == -16385,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x4001; immval:0x34
+TEST_STORE(x1,x3,0,x2,x10,-0x4001,0x34,116,c.swsp,0)
+
+inst_57:
+// rs2_val == -32769,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x8001; immval:0x80
+TEST_STORE(x1,x3,0,x2,x10,-0x8001,0x80,120,c.swsp,0)
+
+inst_58:
+// rs2_val == -65537,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x10001; immval:0x2c
+TEST_STORE(x1,x3,0,x2,x10,-0x10001,0x2c,124,c.swsp,0)
+
+inst_59:
+// rs2_val == -131073,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x20001; immval:0x4
+TEST_STORE(x1,x3,0,x2,x10,-0x20001,0x4,128,c.swsp,0)
+
+inst_60:
+// rs2_val == -262145,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x40001; immval:0x18
+TEST_STORE(x1,x3,0,x2,x10,-0x40001,0x18,132,c.swsp,0)
+
+inst_61:
+// rs2_val == -524289,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x80001; immval:0x24
+TEST_STORE(x1,x3,0,x2,x10,-0x80001,0x24,136,c.swsp,0)
+
+inst_62:
+// rs2_val == -1048577,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x100001; immval:0xec
+TEST_STORE(x1,x3,0,x2,x10,-0x100001,0xec,140,c.swsp,0)
+
+inst_63:
+// rs2_val == -2097153,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x200001; immval:0xbc
+TEST_STORE(x1,x3,0,x2,x10,-0x200001,0xbc,144,c.swsp,0)
+
+inst_64:
+// rs2_val == -4194305,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x400001; immval:0x80
+TEST_STORE(x1,x3,0,x2,x10,-0x400001,0x80,148,c.swsp,0)
+
+inst_65:
+// rs2_val == -8388609,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x800001; immval:0x4
+TEST_STORE(x1,x3,0,x2,x10,-0x800001,0x4,152,c.swsp,0)
+
+inst_66:
+// rs2_val == -16777217,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x1000001; immval:0xf4
+TEST_STORE(x1,x3,0,x2,x10,-0x1000001,0xf4,156,c.swsp,0)
+
+inst_67:
+// rs2_val == -33554433,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x2000001; immval:0x4c
+TEST_STORE(x1,x3,0,x2,x10,-0x2000001,0x4c,160,c.swsp,0)
+
+inst_68:
+// rs2_val == -67108865,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x4000001; immval:0x8
+TEST_STORE(x1,x3,0,x2,x10,-0x4000001,0x8,164,c.swsp,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x8_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x8_1:
+ .fill 27*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 42*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/C/cxor-01.S b/riscof/suite/rv32i_m/C/cxor-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..fcee6bc0329ef19694b1d56912edd735da02fffc
--- /dev/null
+++ b/riscof/suite/rv32i_m/C/cxor-01.S
@@ -0,0 +1,2989 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:37:04 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32ic.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.xor instruction of the RISC-V C extension for the cxor covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cxor)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x10, rs2==x14, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648, rs2_val < 0
+// opcode: c.xor; op1:x10; op2:x14; op1val:0x5; op2val:-0x80000000
+TEST_CR_OP( c.xor, x10, x14, 0x80000005, 0x5, -0x80000000, x1, 0, x2)
+
+inst_1:
+// rs1 == rs2, rs1==x9, rs2==x9, rs2_val == 0, rs1_val == 32768
+// opcode: c.xor; op1:x9; op2:x9; op1val:0x8000; op2val:0x8000
+TEST_CR_OP( c.xor, x9, x9, 0x0, 0x8000, 0x8000, x1, 4, x2)
+
+inst_2:
+// rs1==x12, rs2==x15, rs2_val == (2**(xlen-1)-1), rs2_val > 0, rs2_val == 2147483647
+// opcode: c.xor; op1:x12; op2:x15; op1val:-0x4; op2val:0x7fffffff
+TEST_CR_OP( c.xor, x12, x15, 0x80000003, -0x4, 0x7fffffff, x1, 8, x2)
+
+inst_3:
+// rs1==x15, rs2==x13, rs2_val == 1,
+// opcode: c.xor; op1:x15; op2:x13; op1val:0x6; op2val:0x1
+TEST_CR_OP( c.xor, x15, x13, 0x7, 0x6, 0x1, x1, 12, x2)
+
+inst_4:
+// rs1==x8, rs2==x12, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648
+// opcode: c.xor; op1:x8; op2:x12; op1val:-0x80000000; op2val:-0xb504
+TEST_CR_OP( c.xor, x8, x12, 0x7fff4afc, -0x80000000, -0xb504, x1, 16, x2)
+
+inst_5:
+// rs1==x14, rs2==x10, rs1_val == 0, rs2_val == 1024
+// opcode: c.xor; op1:x14; op2:x10; op1val:0x0; op2val:0x400
+TEST_CR_OP( c.xor, x14, x10, 0x400, 0x0, 0x400, x1, 20, x2)
+
+inst_6:
+// rs1==x11, rs2==x8, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647
+// opcode: c.xor; op1:x11; op2:x8; op1val:0x7fffffff; op2val:0x6
+TEST_CR_OP( c.xor, x11, x8, 0x7ffffff9, 0x7fffffff, 0x6, x1, 24, x2)
+
+inst_7:
+// rs1==x13, rs2==x11, rs1_val == 1, rs2_val == 64
+// opcode: c.xor; op1:x13; op2:x11; op1val:0x1; op2val:0x40
+TEST_CR_OP( c.xor, x13, x11, 0x41, 0x1, 0x40, x1, 28, x2)
+
+inst_8:
+// rs2_val == 2, rs1_val == -5
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xfffffff9, -0x5, 0x2, x1, 32, x2)
+
+inst_9:
+// rs2_val == 4, rs1_val == -1431655766, rs1_val==-1431655766 and rs2_val==4
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaae, -0x55555556, 0x4, x1, 36, x2)
+
+inst_10:
+// rs2_val == 8, rs1_val == 2048
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x800; op2val:0x8
+TEST_CR_OP( c.xor, x10, x11, 0x808, 0x800, 0x8, x1, 40, x2)
+
+inst_11:
+// rs2_val == 16, rs1_val == -32769
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x8001; op2val:0x10
+TEST_CR_OP( c.xor, x10, x11, 0xffff7fef, -0x8001, 0x10, x1, 44, x2)
+
+inst_12:
+// rs2_val == 32, rs1_val == 268435456
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x10000000; op2val:0x20
+TEST_CR_OP( c.xor, x10, x11, 0x10000020, 0x10000000, 0x20, x1, 48, x2)
+
+inst_13:
+// rs2_val == 128, rs1_val == -4194305
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x400001; op2val:0x80
+TEST_CR_OP( c.xor, x10, x11, 0xffbfff7f, -0x400001, 0x80, x1, 52, x2)
+
+inst_14:
+// rs2_val == 256, rs1_val == 536870912
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x20000000; op2val:0x100
+TEST_CR_OP( c.xor, x10, x11, 0x20000100, 0x20000000, 0x100, x1, 56, x2)
+
+inst_15:
+// rs2_val == 512, rs1_val == -33
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x21; op2val:0x200
+TEST_CR_OP( c.xor, x10, x11, 0xfffffddf, -0x21, 0x200, x1, 60, x2)
+
+inst_16:
+// rs2_val == 2048, rs1_val == -67108865
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x4000001; op2val:0x800
+TEST_CR_OP( c.xor, x10, x11, 0xfbfff7ff, -0x4000001, 0x800, x1, 64, x2)
+
+inst_17:
+// rs2_val == 4096,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x8; op2val:0x1000
+TEST_CR_OP( c.xor, x10, x11, 0xffffeff8, -0x8, 0x1000, x1, 68, x2)
+
+inst_18:
+// rs2_val == 8192,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x80000000; op2val:0x2000
+TEST_CR_OP( c.xor, x10, x11, 0x80002000, -0x80000000, 0x2000, x1, 72, x2)
+
+inst_19:
+// rs2_val == 16384, rs1_val == -2
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x2; op2val:0x4000
+TEST_CR_OP( c.xor, x10, x11, 0xffffbffe, -0x2, 0x4000, x1, 76, x2)
+
+inst_20:
+// rs2_val == 32768,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x8000
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa2aab, -0x55555555, 0x8000, x1, 80, x2)
+
+inst_21:
+// rs2_val == 65536,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x10000
+TEST_CR_OP( c.xor, x10, x11, 0x55545554, 0x55555554, 0x10000, x1, 84, x2)
+
+inst_22:
+// rs2_val == 131072,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x20000
+TEST_CR_OP( c.xor, x10, x11, 0x66646665, 0x66666665, 0x20000, x1, 88, x2)
+
+inst_23:
+// rs2_val == 262144,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x40000
+TEST_CR_OP( c.xor, x10, x11, 0x66626667, 0x66666667, 0x40000, x1, 92, x2)
+
+inst_24:
+// rs2_val == 524288, rs1_val == -524289
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x80001; op2val:0x80000
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff, -0x80001, 0x80000, x1, 96, x2)
+
+inst_25:
+// rs2_val == 1048576,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x80001; op2val:0x100000
+TEST_CR_OP( c.xor, x10, x11, 0xffe7ffff, -0x80001, 0x100000, x1, 100, x2)
+
+inst_26:
+// rs2_val == 2097152,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x200000
+TEST_CR_OP( c.xor, x10, x11, 0x200005, 0x5, 0x200000, x1, 104, x2)
+
+inst_27:
+// rs2_val == 4194304,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x400001; op2val:0x400000
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff, -0x400001, 0x400000, x1, 108, x2)
+
+inst_28:
+// rs2_val == 8388608, rs1_val == 512
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x200; op2val:0x800000
+TEST_CR_OP( c.xor, x10, x11, 0x800200, 0x200, 0x800000, x1, 112, x2)
+
+inst_29:
+// rs2_val == 16777216,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xa; op2val:0x1000000
+TEST_CR_OP( c.xor, x10, x11, 0xfefffff6, -0xa, 0x1000000, x1, 116, x2)
+
+inst_30:
+// rs2_val == 33554432,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x2000000
+TEST_CR_OP( c.xor, x10, x11, 0x57555554, 0x55555554, 0x2000000, x1, 120, x2)
+
+inst_31:
+// rs2_val == 67108864, rs1_val == -513
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x201; op2val:0x4000000
+TEST_CR_OP( c.xor, x10, x11, 0xfbfffdff, -0x201, 0x4000000, x1, 124, x2)
+
+inst_32:
+// rs2_val == 134217728, rs1_val == -65
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x41; op2val:0x8000000
+TEST_CR_OP( c.xor, x10, x11, 0xf7ffffbf, -0x41, 0x8000000, x1, 128, x2)
+
+inst_33:
+// rs2_val == 268435456, rs1_val == 16384
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4000; op2val:0x10000000
+TEST_CR_OP( c.xor, x10, x11, 0x10004000, 0x4000, 0x10000000, x1, 132, x2)
+
+inst_34:
+// rs2_val == 536870912,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x20000000
+TEST_CR_OP( c.xor, x10, x11, 0x20000000, 0x0, 0x20000000, x1, 136, x2)
+
+inst_35:
+// rs2_val == 1073741824,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x40000000
+TEST_CR_OP( c.xor, x10, x11, 0x4000b504, 0xb504, 0x40000000, x1, 140, x2)
+
+inst_36:
+// rs2_val == -2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:-0x2
+TEST_CR_OP( c.xor, x10, x11, 0xffff4afb, 0xb505, -0x2, x1, 144, x2)
+
+inst_37:
+// rs2_val == -3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3fffffff; op2val:-0x3
+TEST_CR_OP( c.xor, x10, x11, 0xc0000002, 0x3fffffff, -0x3, x1, 148, x2)
+
+inst_38:
+// rs2_val == -5, rs1_val == -257
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x101; op2val:-0x5
+TEST_CR_OP( c.xor, x10, x11, 0x104, -0x101, -0x5, x1, 152, x2)
+
+inst_39:
+// rs2_val == -9, rs1_val == 65536
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x10000; op2val:-0x9
+TEST_CR_OP( c.xor, x10, x11, 0xfffefff7, 0x10000, -0x9, x1, 156, x2)
+
+inst_40:
+// rs2_val == -17, rs1_val == 134217728
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x8000000; op2val:-0x11
+TEST_CR_OP( c.xor, x10, x11, 0xf7ffffef, 0x8000000, -0x11, x1, 160, x2)
+
+inst_41:
+// rs2_val == -33,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x21
+TEST_CR_OP( c.xor, x10, x11, 0x55555574, -0x55555555, -0x21, x1, 164, x2)
+
+inst_42:
+// rs2_val == -65,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:-0x41
+TEST_CR_OP( c.xor, x10, x11, 0xffffffb9, 0x6, -0x41, x1, 168, x2)
+
+inst_43:
+// rs2_val == -129,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x21; op2val:-0x81
+TEST_CR_OP( c.xor, x10, x11, 0xa0, -0x21, -0x81, x1, 172, x2)
+
+inst_44:
+// rs2_val == -257,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:-0x101
+TEST_CR_OP( c.xor, x10, x11, 0xfffffeff, 0x0, -0x101, x1, 176, x2)
+
+inst_45:
+// rs2_val == -513,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:-0x201
+TEST_CR_OP( c.xor, x10, x11, 0xb702, -0xb503, -0x201, x1, 180, x2)
+
+inst_46:
+// rs2_val == -1025, rs1_val == -262145
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x40001; op2val:-0x401
+TEST_CR_OP( c.xor, x10, x11, 0x40400, -0x40001, -0x401, x1, 184, x2)
+
+inst_47:
+// rs2_val == -2049, rs1_val == 67108864
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4000000; op2val:-0x801
+TEST_CR_OP( c.xor, x10, x11, 0xfbfff7ff, 0x4000000, -0x801, x1, 188, x2)
+
+inst_48:
+// rs2_val == -4097,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x80000000; op2val:-0x1001
+TEST_CR_OP( c.xor, x10, x11, 0x7fffefff, -0x80000000, -0x1001, x1, 192, x2)
+
+inst_49:
+// rs2_val == -8193, rs1_val == 2
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:-0x2001
+TEST_CR_OP( c.xor, x10, x11, 0xffffdffd, 0x2, -0x2001, x1, 196, x2)
+
+inst_50:
+// rs2_val == -16385, rs1_val == 1073741824
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x40000000; op2val:-0x4001
+TEST_CR_OP( c.xor, x10, x11, 0xbfffbfff, 0x40000000, -0x4001, x1, 200, x2)
+
+inst_51:
+// rs2_val == -32769, rs1_val == -33554433
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x2000001; op2val:-0x8001
+TEST_CR_OP( c.xor, x10, x11, 0x2008000, -0x2000001, -0x8001, x1, 204, x2)
+
+inst_52:
+// rs2_val == -65537,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x6; op2val:-0x10001
+TEST_CR_OP( c.xor, x10, x11, 0x10005, -0x6, -0x10001, x1, 208, x2)
+
+inst_53:
+// rs2_val == -131073, rs1_val == -536870913
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x20000001; op2val:-0x20001
+TEST_CR_OP( c.xor, x10, x11, 0x20020000, -0x20000001, -0x20001, x1, 212, x2)
+
+inst_54:
+// rs2_val == -262145,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x80001; op2val:-0x40001
+TEST_CR_OP( c.xor, x10, x11, 0xc0000, -0x80001, -0x40001, x1, 216, x2)
+
+inst_55:
+// rs2_val == -524289, rs1_val == 1048576
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x100000; op2val:-0x80001
+TEST_CR_OP( c.xor, x10, x11, 0xffe7ffff, 0x100000, -0x80001, x1, 220, x2)
+
+inst_56:
+// rs2_val == -1048577,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x20000000; op2val:-0x100001
+TEST_CR_OP( c.xor, x10, x11, 0xdfefffff, 0x20000000, -0x100001, x1, 224, x2)
+
+inst_57:
+// rs2_val == -2097153, rs1_val == 262144
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x40000; op2val:-0x200001
+TEST_CR_OP( c.xor, x10, x11, 0xffdbffff, 0x40000, -0x200001, x1, 228, x2)
+
+inst_58:
+// rs2_val == -4194305,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:-0x400001
+TEST_CR_OP( c.xor, x10, x11, 0xcc8ccccd, 0x33333332, -0x400001, x1, 232, x2)
+
+inst_59:
+// rs2_val == -8388609, rs1_val == 32
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x20; op2val:-0x800001
+TEST_CR_OP( c.xor, x10, x11, 0xff7fffdf, 0x20, -0x800001, x1, 236, x2)
+
+inst_60:
+// rs2_val == -16777217, rs1_val == -2097153
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x200001; op2val:-0x1000001
+TEST_CR_OP( c.xor, x10, x11, 0x1200000, -0x200001, -0x1000001, x1, 240, x2)
+
+inst_61:
+// rs2_val == -33554433,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:-0x2000001
+TEST_CR_OP( c.xor, x10, x11, 0xcecccccd, 0x33333332, -0x2000001, x1, 244, x2)
+
+inst_62:
+// rs2_val == -67108865, rs1_val == -4097
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x1001; op2val:-0x4000001
+TEST_CR_OP( c.xor, x10, x11, 0x4001000, -0x1001, -0x4000001, x1, 248, x2)
+
+inst_63:
+// rs2_val == -134217729, rs1_val == 131072
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x20000; op2val:-0x8000001
+TEST_CR_OP( c.xor, x10, x11, 0xf7fdffff, 0x20000, -0x8000001, x1, 252, x2)
+
+inst_64:
+// rs2_val == -268435457,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x20; op2val:-0x10000001
+TEST_CR_OP( c.xor, x10, x11, 0xefffffdf, 0x20, -0x10000001, x1, 256, x2)
+
+inst_65:
+// rs2_val == -536870913, rs1_val == 2097152
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x200000; op2val:-0x20000001
+TEST_CR_OP( c.xor, x10, x11, 0xdfdfffff, 0x200000, -0x20000001, x1, 260, x2)
+
+inst_66:
+// rs2_val == -1073741825,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:-0x40000001
+TEST_CR_OP( c.xor, x10, x11, 0xbfffffff, 0x0, -0x40000001, x1, 264, x2)
+
+inst_67:
+// rs2_val == 1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x7fffffff; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x2aaaaaaa, 0x7fffffff, 0x55555555, x1, 268, x2)
+
+inst_68:
+// rs2_val == -1431655766, rs1_val == 4194304
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x400000; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaeaaaaa, 0x400000, -0x55555556, x1, 272, x2)
+
+inst_69:
+// rs1_val == 4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x2000
+TEST_CR_OP( c.xor, x10, x11, 0x2004, 0x4, 0x2000, x1, 276, x2)
+
+inst_70:
+// rs1_val == 8,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x8; op2val:0x20000
+TEST_CR_OP( c.xor, x10, x11, 0x20008, 0x8, 0x20000, x1, 280, x2)
+
+inst_71:
+// rs1_val == 16,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x10; op2val:0x100
+TEST_CR_OP( c.xor, x10, x11, 0x110, 0x10, 0x100, x1, 284, x2)
+
+inst_72:
+// rs1_val == 64,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x40; op2val:-0x401
+TEST_CR_OP( c.xor, x10, x11, 0xfffffbbf, 0x40, -0x401, x1, 288, x2)
+
+inst_73:
+// rs1_val == 128,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x80; op2val:-0x40000001
+TEST_CR_OP( c.xor, x10, x11, 0xbfffff7f, 0x80, -0x40000001, x1, 292, x2)
+
+inst_74:
+// rs1_val == 256,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x100; op2val:0x4000000
+TEST_CR_OP( c.xor, x10, x11, 0x4000100, 0x100, 0x4000000, x1, 296, x2)
+
+inst_75:
+// rs1_val == 1024,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x400; op2val:-0x10000001
+TEST_CR_OP( c.xor, x10, x11, 0xeffffbff, 0x400, -0x10000001, x1, 300, x2)
+
+inst_76:
+// rs1_val == 4096,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x1000; op2val:0x20
+TEST_CR_OP( c.xor, x10, x11, 0x1020, 0x1000, 0x20, x1, 304, x2)
+
+inst_77:
+// rs1_val == 8192,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2000; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x2005, 0x2000, 0x5, x1, 308, x2)
+
+inst_78:
+// rs1_val == 524288,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x80000; op2val:-0x1000001
+TEST_CR_OP( c.xor, x10, x11, 0xfef7ffff, 0x80000, -0x1000001, x1, 312, x2)
+
+inst_79:
+// rs1_val == 8388608,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x800000; op2val:-0x2000001
+TEST_CR_OP( c.xor, x10, x11, 0xfd7fffff, 0x800000, -0x2000001, x1, 316, x2)
+
+inst_80:
+// rs1_val == 16777216,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x1000000; op2val:-0x100001
+TEST_CR_OP( c.xor, x10, x11, 0xfeefffff, 0x1000000, -0x100001, x1, 320, x2)
+
+inst_81:
+// rs1_val == 33554432,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2000000; op2val:-0x7
+TEST_CR_OP( c.xor, x10, x11, 0xfdfffff9, 0x2000000, -0x7, x1, 324, x2)
+
+inst_82:
+// rs1_val == -3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x3; op2val:-0x100001
+TEST_CR_OP( c.xor, x10, x11, 0x100002, -0x3, -0x100001, x1, 328, x2)
+
+inst_83:
+// rs1_val == -9,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x9; op2val:-0x201
+TEST_CR_OP( c.xor, x10, x11, 0x208, -0x9, -0x201, x1, 332, x2)
+
+inst_84:
+// rs1_val == -17,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x11; op2val:-0x10001
+TEST_CR_OP( c.xor, x10, x11, 0x10010, -0x11, -0x10001, x1, 336, x2)
+
+inst_85:
+// rs1_val == -129,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x81; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xffffff7d, -0x81, 0x2, x1, 340, x2)
+
+inst_86:
+// rs1_val == -1025,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x401; op2val:-0x20000001
+TEST_CR_OP( c.xor, x10, x11, 0x20000400, -0x401, -0x20000001, x1, 344, x2)
+
+inst_87:
+// rs1_val == -2049,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x801; op2val:0x200000
+TEST_CR_OP( c.xor, x10, x11, 0xffdff7ff, -0x801, 0x200000, x1, 348, x2)
+
+inst_88:
+// rs1_val == -8193,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x2001; op2val:-0x20001
+TEST_CR_OP( c.xor, x10, x11, 0x22000, -0x2001, -0x20001, x1, 352, x2)
+
+inst_89:
+// rs1_val == -16385,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x4001; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xf503, -0x4001, -0xb504, x1, 356, x2)
+
+inst_90:
+// rs1_val == -65537,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x10001; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x1b502, -0x10001, -0xb503, x1, 360, x2)
+
+inst_91:
+// rs1_val == -131073,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x20001; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x999b9999, -0x20001, 0x66666666, x1, 364, x2)
+
+inst_92:
+// rs1_val == -1048577,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x100001; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xffeffffa, -0x100001, 0x5, x1, 368, x2)
+
+inst_93:
+// rs1_val == -8388609,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x800001; op2val:0x4000000
+TEST_CR_OP( c.xor, x10, x11, 0xfb7fffff, -0x800001, 0x4000000, x1, 372, x2)
+
+inst_94:
+// rs1_val == -16777217,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x1000001; op2val:-0x400001
+TEST_CR_OP( c.xor, x10, x11, 0x1400000, -0x1000001, -0x400001, x1, 376, x2)
+
+inst_95:
+// rs1_val == -134217729,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x8000001; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0xc4cccccd, -0x8000001, 0x33333332, x1, 380, x2)
+
+inst_96:
+// rs1_val == -268435457,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x10000001; op2val:0x20000000
+TEST_CR_OP( c.xor, x10, x11, 0xcfffffff, -0x10000001, 0x20000000, x1, 384, x2)
+
+inst_97:
+// rs1_val == -1073741825,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x40000001; op2val:-0x11
+TEST_CR_OP( c.xor, x10, x11, 0x40000010, -0x40000001, -0x11, x1, 388, x2)
+
+inst_98:
+// rs1_val == 1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:-0x100001
+TEST_CR_OP( c.xor, x10, x11, 0xaabaaaaa, 0x55555555, -0x100001, x1, 392, x2)
+
+inst_99:
+// rs1_val==3 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x3, 0x3, x1, 396, x2)
+
+inst_100:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x55555556, 0x3, 0x55555555, x1, 400, x2)
+
+inst_101:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaa9, 0x3, -0x55555556, x1, 404, x2)
+
+inst_102:
+// rs1_val==3 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x3, 0x5, x1, 408, x2)
+
+inst_103:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x33333330, 0x3, 0x33333333, x1, 412, x2)
+
+inst_104:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x66666665, 0x3, 0x66666666, x1, 416, x2)
+
+inst_105:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xffff4aff, 0x3, -0xb504, x1, 420, x2)
+
+inst_106:
+// rs1_val==3 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xb507, 0x3, 0xb504, x1, 424, x2)
+
+inst_107:
+// rs1_val==3 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x3, 0x2, x1, 428, x2)
+
+inst_108:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x55555557, 0x3, 0x55555554, x1, 432, x2)
+
+inst_109:
+// rs1_val==3 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x3, 0x0, x1, 436, x2)
+
+inst_110:
+// rs1_val==3 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0x3, 0x4, x1, 440, x2)
+
+inst_111:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x33333331, 0x3, 0x33333332, x1, 444, x2)
+
+inst_112:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x66666666, 0x3, 0x66666665, x1, 448, x2)
+
+inst_113:
+// rs1_val==3 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xb500, 0x3, 0xb503, x1, 452, x2)
+
+inst_114:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x55555555, 0x3, 0x55555556, x1, 456, x2)
+
+inst_115:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaa8, 0x3, -0x55555555, x1, 460, x2)
+
+inst_116:
+// rs1_val==3 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x5, 0x3, 0x6, x1, 464, x2)
+
+inst_117:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x33333337, 0x3, 0x33333334, x1, 468, x2)
+
+inst_118:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x66666664, 0x3, 0x66666667, x1, 472, x2)
+
+inst_119:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xffff4afe, 0x3, -0xb503, x1, 476, x2)
+
+inst_120:
+// rs1_val==3 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0xb506, 0x3, 0xb505, x1, 480, x2)
+
+inst_121:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x55555556, 0x55555555, 0x3, x1, 484, x2)
+
+inst_122:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x55555555, 0x55555555, x1, 488, x2)
+
+inst_123:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff, 0x55555555, -0x55555556, x1, 492, x2)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x55555550, 0x55555555, 0x5, x1, 496, x2)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x66666666, 0x55555555, 0x33333333, x1, 500, x2)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x33333333, 0x55555555, 0x66666666, x1, 504, x2)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fa9, 0x55555555, -0xb504, x1, 508, x2)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x5555e051, 0x55555555, 0xb504, x1, 512, x2)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x55555557, 0x55555555, 0x2, x1, 516, x2)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x55555555, 0x55555554, x1, 520, x2)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x55555555, 0x55555555, 0x0, x1, 524, x2)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x55555551, 0x55555555, 0x4, x1, 528, x2)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x66666667, 0x55555555, 0x33333332, x1, 532, x2)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x33333330, 0x55555555, 0x66666665, x1, 536, x2)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x5555e056, 0x55555555, 0xb503, x1, 540, x2)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x55555555, 0x55555556, x1, 544, x2)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffe, 0x55555555, -0x55555555, x1, 548, x2)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x55555553, 0x55555555, 0x6, x1, 552, x2)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x66666661, 0x55555555, 0x33333334, x1, 556, x2)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x33333332, 0x55555555, 0x66666667, x1, 560, x2)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fa8, 0x55555555, -0xb503, x1, 564, x2)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555555; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0x5555e050, 0x55555555, 0xb505, x1, 568, x2)
+
+inst_143:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaa9, -0x55555556, 0x3, x1, 572, x2)
+
+inst_144:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff, -0x55555556, 0x55555555, x1, 576, x2)
+
+inst_145:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x0, -0x55555556, -0x55555556, x1, 580, x2)
+
+inst_146:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaf, -0x55555556, 0x5, x1, 584, x2)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x99999999, -0x55555556, 0x33333333, x1, 588, x2)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc, -0x55555556, 0x66666666, x1, 592, x2)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x5555e056, -0x55555556, -0xb504, x1, 596, x2)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fae, -0x55555556, 0xb504, x1, 600, x2)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaa8, -0x55555556, 0x2, x1, 604, x2)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffe, -0x55555556, 0x55555554, x1, 608, x2)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa, -0x55555556, 0x0, x1, 612, x2)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x99999998, -0x55555556, 0x33333332, x1, 616, x2)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccf, -0x55555556, 0x66666665, x1, 620, x2)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fa9, -0x55555556, 0xb503, x1, 624, x2)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffc, -0x55555556, 0x55555556, x1, 628, x2)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x1, -0x55555556, -0x55555555, x1, 632, x2)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaac, -0x55555556, 0x6, x1, 636, x2)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x9999999e, -0x55555556, 0x33333334, x1, 640, x2)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccd, -0x55555556, 0x66666667, x1, 644, x2)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x5555e057, -0x55555556, -0xb503, x1, 648, x2)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1faf, -0x55555556, 0xb505, x1, 652, x2)
+
+inst_164:
+// rs1_val==5 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x5, 0x3, x1, 656, x2)
+
+inst_165:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x55555550, 0x5, 0x55555555, x1, 660, x2)
+
+inst_166:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaf, 0x5, -0x55555556, x1, 664, x2)
+
+inst_167:
+// rs1_val==5 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x5, 0x5, x1, 668, x2)
+
+inst_168:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x33333336, 0x5, 0x33333333, x1, 672, x2)
+
+inst_169:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x66666663, 0x5, 0x66666666, x1, 676, x2)
+
+inst_170:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xffff4af9, 0x5, -0xb504, x1, 680, x2)
+
+inst_171:
+// rs1_val==5 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xb501, 0x5, 0xb504, x1, 684, x2)
+
+inst_172:
+// rs1_val==5 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0x5, 0x2, x1, 688, x2)
+
+inst_173:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x55555551, 0x5, 0x55555554, x1, 692, x2)
+
+inst_174:
+// rs1_val==5 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x5, 0x5, 0x0, x1, 696, x2)
+
+inst_175:
+// rs1_val==5 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x5, 0x4, x1, 700, x2)
+
+inst_176:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x33333337, 0x5, 0x33333332, x1, 704, x2)
+
+inst_177:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x66666660, 0x5, 0x66666665, x1, 708, x2)
+
+inst_178:
+// rs1_val==5 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xb506, 0x5, 0xb503, x1, 712, x2)
+
+inst_179:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x55555553, 0x5, 0x55555556, x1, 716, x2)
+
+inst_180:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaae, 0x5, -0x55555555, x1, 720, x2)
+
+inst_181:
+// rs1_val==5 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x5, 0x6, x1, 724, x2)
+
+inst_182:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x33333331, 0x5, 0x33333334, x1, 728, x2)
+
+inst_183:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x66666662, 0x5, 0x66666667, x1, 732, x2)
+
+inst_184:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xffff4af8, 0x5, -0xb503, x1, 736, x2)
+
+inst_185:
+// rs1_val==5 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0xb500, 0x5, 0xb505, x1, 740, x2)
+
+inst_186:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x33333330, 0x33333333, 0x3, x1, 744, x2)
+
+inst_187:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x66666666, 0x33333333, 0x55555555, x1, 748, x2)
+
+inst_188:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x99999999, 0x33333333, -0x55555556, x1, 752, x2)
+
+inst_189:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x33333336, 0x33333333, 0x5, x1, 756, x2)
+
+inst_190:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x33333333, 0x33333333, x1, 760, x2)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x55555555, 0x33333333, 0x66666666, x1, 764, x2)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xcccc79cf, 0x33333333, -0xb504, x1, 768, x2)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x33338637, 0x33333333, 0xb504, x1, 772, x2)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x33333331, 0x33333333, 0x2, x1, 776, x2)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x66666667, 0x33333333, 0x55555554, x1, 780, x2)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x33333333, 0x33333333, 0x0, x1, 784, x2)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x33333337, 0x33333333, 0x4, x1, 788, x2)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x33333333, 0x33333332, x1, 792, x2)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x55555556, 0x33333333, 0x66666665, x1, 796, x2)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x33338630, 0x33333333, 0xb503, x1, 800, x2)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x66666665, 0x33333333, 0x55555556, x1, 804, x2)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x99999998, 0x33333333, -0x55555555, x1, 808, x2)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x33333335, 0x33333333, 0x6, x1, 812, x2)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0x33333333, 0x33333334, x1, 816, x2)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x55555554, 0x33333333, 0x66666667, x1, 820, x2)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xcccc79ce, 0x33333333, -0xb503, x1, 824, x2)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333333; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0x33338636, 0x33333333, 0xb505, x1, 828, x2)
+
+inst_208:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x66666665, 0x66666666, 0x3, x1, 832, x2)
+
+inst_209:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x33333333, 0x66666666, 0x55555555, x1, 836, x2)
+
+inst_210:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc, 0x66666666, -0x55555556, x1, 840, x2)
+
+inst_211:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x66666663, 0x66666666, 0x5, x1, 844, x2)
+
+inst_212:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x55555555, 0x66666666, 0x33333333, x1, 848, x2)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x66666666, 0x66666666, x1, 852, x2)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x99992c9a, 0x66666666, -0xb504, x1, 856, x2)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x6666d362, 0x66666666, 0xb504, x1, 860, x2)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x66666664, 0x66666666, 0x2, x1, 864, x2)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x33333332, 0x66666666, 0x55555554, x1, 868, x2)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x66666666, 0x66666666, 0x0, x1, 872, x2)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x66666662, 0x66666666, 0x4, x1, 876, x2)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x55555554, 0x66666666, 0x33333332, x1, 880, x2)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x66666666, 0x66666665, x1, 884, x2)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x6666d365, 0x66666666, 0xb503, x1, 888, x2)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x33333330, 0x66666666, 0x55555556, x1, 892, x2)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccd, 0x66666666, -0x55555555, x1, 896, x2)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x66666660, 0x66666666, 0x6, x1, 900, x2)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x55555552, 0x66666666, 0x33333334, x1, 904, x2)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x66666666, 0x66666667, x1, 908, x2)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x99992c9b, 0x66666666, -0xb503, x1, 912, x2)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666666; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0x6666d363, 0x66666666, 0xb505, x1, 916, x2)
+
+inst_230:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xffff4aff, -0xb504, 0x3, x1, 920, x2)
+
+inst_231:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fa9, -0xb504, 0x55555555, x1, 924, x2)
+
+inst_232:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x5555e056, -0xb504, -0x55555556, x1, 928, x2)
+
+inst_233:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xffff4af9, -0xb504, 0x5, x1, 932, x2)
+
+inst_234:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0xcccc79cf, -0xb504, 0x33333333, x1, 936, x2)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x99992c9a, -0xb504, 0x66666666, x1, 940, x2)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x0, -0xb504, -0xb504, x1, 944, x2)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xfffffff8, -0xb504, 0xb504, x1, 948, x2)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xffff4afe, -0xb504, 0x2, x1, 952, x2)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fa8, -0xb504, 0x55555554, x1, 956, x2)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xffff4afc, -0xb504, 0x0, x1, 960, x2)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xffff4af8, -0xb504, 0x4, x1, 964, x2)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0xcccc79ce, -0xb504, 0x33333332, x1, 968, x2)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x99992c99, -0xb504, 0x66666665, x1, 972, x2)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff, -0xb504, 0xb503, x1, 976, x2)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1faa, -0xb504, 0x55555556, x1, 980, x2)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x5555e057, -0xb504, -0x55555555, x1, 984, x2)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xffff4afa, -0xb504, 0x6, x1, 988, x2)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0xcccc79c8, -0xb504, 0x33333334, x1, 992, x2)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x99992c9b, -0xb504, 0x66666667, x1, 996, x2)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x1, -0xb504, -0xb503, x1, 1000, x2)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0xfffffff9, -0xb504, 0xb505, x1, 1004, x2)
+
+inst_252:
+// rs1_val==46340 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xb507, 0xb504, 0x3, x1, 1008, x2)
+
+inst_253:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x5555e051, 0xb504, 0x55555555, x1, 1012, x2)
+
+inst_254:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fae, 0xb504, -0x55555556, x1, 1016, x2)
+
+inst_255:
+// rs1_val==46340 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xb501, 0xb504, 0x5, x1, 1020, x2)
+
+inst_256:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x33338637, 0xb504, 0x33333333, x1, 1024, x2)
+
+inst_257:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x6666d362, 0xb504, 0x66666666, x1, 1028, x2)
+
+inst_258:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xfffffff8, 0xb504, -0xb504, x1, 1032, x2)
+
+inst_259:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0xb504, 0xb504, x1, 1036, x2)
+
+inst_260:
+// rs1_val==46340 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xb506, 0xb504, 0x2, x1, 1040, x2)
+
+inst_261:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x5555e050, 0xb504, 0x55555554, x1, 1044, x2)
+
+inst_262:
+// rs1_val==46340 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xb504, 0xb504, 0x0, x1, 1048, x2)
+
+inst_263:
+// rs1_val==46340 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xb500, 0xb504, 0x4, x1, 1052, x2)
+
+inst_264:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x33338636, 0xb504, 0x33333332, x1, 1056, x2)
+
+inst_265:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x6666d361, 0xb504, 0x66666665, x1, 1060, x2)
+
+inst_266:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0xb504, 0xb503, x1, 1064, x2)
+
+inst_267:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x5555e052, 0xb504, 0x55555556, x1, 1068, x2)
+
+inst_268:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1faf, 0xb504, -0x55555555, x1, 1072, x2)
+
+inst_269:
+// rs1_val==46340 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xb502, 0xb504, 0x6, x1, 1076, x2)
+
+inst_270:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x33338630, 0xb504, 0x33333334, x1, 1080, x2)
+
+inst_271:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x6666d363, 0xb504, 0x66666667, x1, 1084, x2)
+
+inst_272:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xfffffff9, 0xb504, -0xb503, x1, 1088, x2)
+
+inst_273:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0xb504, 0xb505, x1, 1092, x2)
+
+inst_274:
+// rs1_val==2 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x2, 0x3, x1, 1096, x2)
+
+inst_275:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x55555557, 0x2, 0x55555555, x1, 1100, x2)
+
+inst_276:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaa8, 0x2, -0x55555556, x1, 1104, x2)
+
+inst_277:
+// rs1_val==2 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0x2, 0x5, x1, 1108, x2)
+
+inst_278:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x33333331, 0x2, 0x33333333, x1, 1112, x2)
+
+inst_279:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x66666664, 0x2, 0x66666666, x1, 1116, x2)
+
+inst_280:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xffff4afe, 0x2, -0xb504, x1, 1120, x2)
+
+inst_281:
+// rs1_val==2 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xb506, 0x2, 0xb504, x1, 1124, x2)
+
+inst_282:
+// rs1_val==2 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x2, 0x2, x1, 1128, x2)
+
+inst_283:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x55555556, 0x2, 0x55555554, x1, 1132, x2)
+
+inst_284:
+// rs1_val==2 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x2, 0x0, x1, 1136, x2)
+
+inst_285:
+// rs1_val==2 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x2, 0x4, x1, 1140, x2)
+
+inst_286:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x33333330, 0x2, 0x33333332, x1, 1144, x2)
+
+inst_287:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x66666667, 0x2, 0x66666665, x1, 1148, x2)
+
+inst_288:
+// rs1_val==2 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xb501, 0x2, 0xb503, x1, 1152, x2)
+
+inst_289:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x55555554, 0x2, 0x55555556, x1, 1156, x2)
+
+inst_290:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaa9, 0x2, -0x55555555, x1, 1160, x2)
+
+inst_291:
+// rs1_val==2 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x4, 0x2, 0x6, x1, 1164, x2)
+
+inst_292:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x33333336, 0x2, 0x33333334, x1, 1168, x2)
+
+inst_293:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x66666665, 0x2, 0x66666667, x1, 1172, x2)
+
+inst_294:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xffff4aff, 0x2, -0xb503, x1, 1176, x2)
+
+inst_295:
+// rs1_val==2 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0xb507, 0x2, 0xb505, x1, 1180, x2)
+
+inst_296:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x55555557, 0x55555554, 0x3, x1, 1184, x2)
+
+inst_297:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x55555554, 0x55555555, x1, 1188, x2)
+
+inst_298:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffe, 0x55555554, -0x55555556, x1, 1192, x2)
+
+inst_299:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x55555551, 0x55555554, 0x5, x1, 1196, x2)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x66666667, 0x55555554, 0x33333333, x1, 1200, x2)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x33333332, 0x55555554, 0x66666666, x1, 1204, x2)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fa8, 0x55555554, -0xb504, x1, 1208, x2)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x5555e050, 0x55555554, 0xb504, x1, 1212, x2)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x55555556, 0x55555554, 0x2, x1, 1216, x2)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x55555554, 0x55555554, x1, 1220, x2)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x55555554, 0x55555554, 0x0, x1, 1224, x2)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x55555550, 0x55555554, 0x4, x1, 1228, x2)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x66666666, 0x55555554, 0x33333332, x1, 1232, x2)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x33333331, 0x55555554, 0x66666665, x1, 1236, x2)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x5555e057, 0x55555554, 0xb503, x1, 1240, x2)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x55555554, 0x55555556, x1, 1244, x2)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff, 0x55555554, -0x55555555, x1, 1248, x2)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x55555552, 0x55555554, 0x6, x1, 1252, x2)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x66666660, 0x55555554, 0x33333334, x1, 1256, x2)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x33333333, 0x55555554, 0x66666667, x1, 1260, x2)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fa9, 0x55555554, -0xb503, x1, 1264, x2)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555554; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0x5555e051, 0x55555554, 0xb505, x1, 1268, x2)
+
+inst_318:
+// rs1_val==0 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x0, 0x3, x1, 1272, x2)
+
+inst_319:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x55555555, 0x0, 0x55555555, x1, 1276, x2)
+
+inst_320:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa, 0x0, -0x55555556, x1, 1280, x2)
+
+inst_321:
+// rs1_val==0 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x5, 0x0, 0x5, x1, 1284, x2)
+
+inst_322:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x33333333, 0x0, 0x33333333, x1, 1288, x2)
+
+inst_323:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x66666666, 0x0, 0x66666666, x1, 1292, x2)
+
+inst_324:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xffff4afc, 0x0, -0xb504, x1, 1296, x2)
+
+inst_325:
+// rs1_val==0 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xb504, 0x0, 0xb504, x1, 1300, x2)
+
+inst_326:
+// rs1_val==0 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x0, 0x2, x1, 1304, x2)
+
+inst_327:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x5555e056, -0x55555555, -0xb503, x1, 1308, x2)
+
+inst_328:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fae, -0x55555555, 0xb505, x1, 1312, x2)
+
+inst_329:
+// rs1_val==6 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x5, 0x6, 0x3, x1, 1316, x2)
+
+inst_330:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x55555553, 0x6, 0x55555555, x1, 1320, x2)
+
+inst_331:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaac, 0x6, -0x55555556, x1, 1324, x2)
+
+inst_332:
+// rs1_val==6 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x6, 0x5, x1, 1328, x2)
+
+inst_333:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x33333335, 0x6, 0x33333333, x1, 1332, x2)
+
+inst_334:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x66666660, 0x6, 0x66666666, x1, 1336, x2)
+
+inst_335:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xffff4afa, 0x6, -0xb504, x1, 1340, x2)
+
+inst_336:
+// rs1_val==6 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xb502, 0x6, 0xb504, x1, 1344, x2)
+
+inst_337:
+// rs1_val==6 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x4, 0x6, 0x2, x1, 1348, x2)
+
+inst_338:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x55555552, 0x6, 0x55555554, x1, 1352, x2)
+
+inst_339:
+// rs1_val==6 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x6, 0x0, x1, 1356, x2)
+
+inst_340:
+// rs1_val==6 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x6, 0x4, x1, 1360, x2)
+
+inst_341:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x33333334, 0x6, 0x33333332, x1, 1364, x2)
+
+inst_342:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x66666663, 0x6, 0x66666665, x1, 1368, x2)
+
+inst_343:
+// rs1_val==6 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xb505, 0x6, 0xb503, x1, 1372, x2)
+
+inst_344:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x55555550, 0x6, 0x55555556, x1, 1376, x2)
+
+inst_345:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaad, 0x6, -0x55555555, x1, 1380, x2)
+
+inst_346:
+// rs1_val==6 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x6, 0x6, x1, 1384, x2)
+
+inst_347:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x33333332, 0x6, 0x33333334, x1, 1388, x2)
+
+inst_348:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x66666661, 0x6, 0x66666667, x1, 1392, x2)
+
+inst_349:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xffff4afb, 0x6, -0xb503, x1, 1396, x2)
+
+inst_350:
+// rs1_val==6 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0xb503, 0x6, 0xb505, x1, 1400, x2)
+
+inst_351:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x33333337, 0x33333334, 0x3, x1, 1404, x2)
+
+inst_352:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x66666661, 0x33333334, 0x55555555, x1, 1408, x2)
+
+inst_353:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x9999999e, 0x33333334, -0x55555556, x1, 1412, x2)
+
+inst_354:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x33333331, 0x33333334, 0x5, x1, 1416, x2)
+
+inst_355:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0x33333334, 0x33333333, x1, 1420, x2)
+
+inst_356:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x55555552, 0x33333334, 0x66666666, x1, 1424, x2)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xcccc79c8, 0x33333334, -0xb504, x1, 1428, x2)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x33338630, 0x33333334, 0xb504, x1, 1432, x2)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x33333336, 0x33333334, 0x2, x1, 1436, x2)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x66666660, 0x33333334, 0x55555554, x1, 1440, x2)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x33333334, 0x33333334, 0x0, x1, 1444, x2)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x33333330, 0x33333334, 0x4, x1, 1448, x2)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x33333334, 0x33333332, x1, 1452, x2)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x55555551, 0x33333334, 0x66666665, x1, 1456, x2)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x33338637, 0x33333334, 0xb503, x1, 1460, x2)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x66666662, 0x33333334, 0x55555556, x1, 1464, x2)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x9999999f, 0x33333334, -0x55555555, x1, 1468, x2)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x33333332, 0x33333334, 0x6, x1, 1472, x2)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x33333334, 0x33333334, x1, 1476, x2)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x55555553, 0x33333334, 0x66666667, x1, 1480, x2)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xcccc79c9, 0x33333334, -0xb503, x1, 1484, x2)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333334; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0x33338631, 0x33333334, 0xb505, x1, 1488, x2)
+
+inst_373:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x66666664, 0x66666667, 0x3, x1, 1492, x2)
+
+inst_374:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x33333332, 0x66666667, 0x55555555, x1, 1496, x2)
+
+inst_375:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccd, 0x66666667, -0x55555556, x1, 1500, x2)
+
+inst_376:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x66666662, 0x66666667, 0x5, x1, 1504, x2)
+
+inst_377:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x55555554, 0x66666667, 0x33333333, x1, 1508, x2)
+
+inst_378:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x66666667, 0x66666666, x1, 1512, x2)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x99992c9b, 0x66666667, -0xb504, x1, 1516, x2)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x6666d363, 0x66666667, 0xb504, x1, 1520, x2)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x66666665, 0x66666667, 0x2, x1, 1524, x2)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x33333333, 0x66666667, 0x55555554, x1, 1528, x2)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x66666667, 0x66666667, 0x0, x1, 1532, x2)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x66666663, 0x66666667, 0x4, x1, 1536, x2)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x55555555, 0x66666667, 0x33333332, x1, 1540, x2)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x66666667, 0x66666665, x1, 1544, x2)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x6666d364, 0x66666667, 0xb503, x1, 1548, x2)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x33333331, 0x66666667, 0x55555556, x1, 1552, x2)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc, 0x66666667, -0x55555555, x1, 1556, x2)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x66666661, 0x66666667, 0x6, x1, 1560, x2)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x55555553, 0x66666667, 0x33333334, x1, 1564, x2)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x66666667, 0x66666667, x1, 1568, x2)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x99992c9a, 0x66666667, -0xb503, x1, 1572, x2)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666667; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0x6666d362, 0x66666667, 0xb505, x1, 1576, x2)
+
+inst_395:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xffff4afe, -0xb503, 0x3, x1, 1580, x2)
+
+inst_396:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fa8, -0xb503, 0x55555555, x1, 1584, x2)
+
+inst_397:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x5555e057, -0xb503, -0x55555556, x1, 1588, x2)
+
+inst_398:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xffff4af8, -0xb503, 0x5, x1, 1592, x2)
+
+inst_399:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0xcccc79ce, -0xb503, 0x33333333, x1, 1596, x2)
+
+inst_400:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x99992c9b, -0xb503, 0x66666666, x1, 1600, x2)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x1, -0xb503, -0xb504, x1, 1604, x2)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xfffffff9, -0xb503, 0xb504, x1, 1608, x2)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xffff4aff, -0xb503, 0x2, x1, 1612, x2)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fa9, -0xb503, 0x55555554, x1, 1616, x2)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xffff4afd, -0xb503, 0x0, x1, 1620, x2)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xffff4af9, -0xb503, 0x4, x1, 1624, x2)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0xcccc79cf, -0xb503, 0x33333332, x1, 1628, x2)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x99992c98, -0xb503, 0x66666665, x1, 1632, x2)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffe, -0xb503, 0xb503, x1, 1636, x2)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fab, -0xb503, 0x55555556, x1, 1640, x2)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x5555e056, -0xb503, -0x55555555, x1, 1644, x2)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xffff4afb, -0xb503, 0x6, x1, 1648, x2)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0xcccc79c9, -0xb503, 0x33333334, x1, 1652, x2)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x99992c9a, -0xb503, 0x66666667, x1, 1656, x2)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x0, -0xb503, -0xb503, x1, 1660, x2)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb503; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0xfffffff8, -0xb503, 0xb505, x1, 1664, x2)
+
+inst_417:
+// rs1_val==46341 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xb506, 0xb505, 0x3, x1, 1668, x2)
+
+inst_418:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x5555e050, 0xb505, 0x55555555, x1, 1672, x2)
+
+inst_419:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1faf, 0xb505, -0x55555556, x1, 1676, x2)
+
+inst_420:
+// rs1_val==46341 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xb500, 0xb505, 0x5, x1, 1680, x2)
+
+inst_421:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x33338636, 0xb505, 0x33333333, x1, 1684, x2)
+
+inst_422:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x6666d363, 0xb505, 0x66666666, x1, 1688, x2)
+
+inst_423:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xfffffff9, 0xb505, -0xb504, x1, 1692, x2)
+
+inst_424:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0xb505, 0xb504, x1, 1696, x2)
+
+inst_425:
+// rs1_val==46341 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xb507, 0xb505, 0x2, x1, 1700, x2)
+
+inst_426:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x5555e051, 0xb505, 0x55555554, x1, 1704, x2)
+
+inst_427:
+// rs1_val==46341 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xb505, 0xb505, 0x0, x1, 1708, x2)
+
+inst_428:
+// rs1_val==46341 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xb501, 0xb505, 0x4, x1, 1712, x2)
+
+inst_429:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x33338637, 0xb505, 0x33333332, x1, 1716, x2)
+
+inst_430:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x6666d360, 0xb505, 0x66666665, x1, 1720, x2)
+
+inst_431:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0xb505, 0xb503, x1, 1724, x2)
+
+inst_432:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x5555e053, 0xb505, 0x55555556, x1, 1728, x2)
+
+inst_433:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fae, 0xb505, -0x55555555, x1, 1732, x2)
+
+inst_434:
+// rs1_val==46341 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xb503, 0xb505, 0x6, x1, 1736, x2)
+
+inst_435:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x33338631, 0xb505, 0x33333334, x1, 1740, x2)
+
+inst_436:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x6666d362, 0xb505, 0x66666667, x1, 1744, x2)
+
+inst_437:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xfffffff8, 0xb505, -0xb503, x1, 1748, x2)
+
+inst_438:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb505; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0xb505, 0xb505, x1, 1752, x2)
+
+inst_439:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x55555554, 0x0, 0x55555554, x1, 1756, x2)
+
+inst_440:
+// rs1_val==0 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x0, 0x0, x1, 1760, x2)
+
+inst_441:
+// rs1_val==0 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x4, 0x0, 0x4, x1, 1764, x2)
+
+inst_442:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x33333332, 0x0, 0x33333332, x1, 1768, x2)
+
+inst_443:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x66666665, 0x0, 0x66666665, x1, 1772, x2)
+
+inst_444:
+// rs1_val==0 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xb503, 0x0, 0xb503, x1, 1776, x2)
+
+inst_445:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x55555556, 0x0, 0x55555556, x1, 1780, x2)
+
+inst_446:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaab, 0x0, -0x55555555, x1, 1784, x2)
+
+inst_447:
+// rs1_val==0 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x0, 0x6, x1, 1788, x2)
+
+inst_448:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x33333334, 0x0, 0x33333334, x1, 1792, x2)
+
+inst_449:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x66666667, 0x0, 0x66666667, x1, 1796, x2)
+
+inst_450:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xffff4afd, 0x0, -0xb503, x1, 1800, x2)
+
+inst_451:
+// rs1_val==0 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0xb505, 0x0, 0xb505, x1, 1804, x2)
+
+inst_452:
+// rs1_val==4 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0x4, 0x3, x1, 1808, x2)
+
+inst_453:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x55555551, 0x4, 0x55555555, x1, 1812, x2)
+
+inst_454:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaae, 0x4, -0x55555556, x1, 1816, x2)
+
+inst_455:
+// rs1_val==4 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x4, 0x5, x1, 1820, x2)
+
+inst_456:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x33333337, 0x4, 0x33333333, x1, 1824, x2)
+
+inst_457:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x66666662, 0x4, 0x66666666, x1, 1828, x2)
+
+inst_458:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xffff4af8, 0x4, -0xb504, x1, 1832, x2)
+
+inst_459:
+// rs1_val==4 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xb500, 0x4, 0xb504, x1, 1836, x2)
+
+inst_460:
+// rs1_val==4 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x4, 0x2, x1, 1840, x2)
+
+inst_461:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x55555550, 0x4, 0x55555554, x1, 1844, x2)
+
+inst_462:
+// rs1_val==4 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x4, 0x4, 0x0, x1, 1848, x2)
+
+inst_463:
+// rs1_val==4 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x4, 0x4, x1, 1852, x2)
+
+inst_464:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x33333336, 0x4, 0x33333332, x1, 1856, x2)
+
+inst_465:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x66666661, 0x4, 0x66666665, x1, 1860, x2)
+
+inst_466:
+// rs1_val==4 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xb507, 0x4, 0xb503, x1, 1864, x2)
+
+inst_467:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x55555552, 0x4, 0x55555556, x1, 1868, x2)
+
+inst_468:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaf, 0x4, -0x55555555, x1, 1872, x2)
+
+inst_469:
+// rs1_val==4 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x4, 0x6, x1, 1876, x2)
+
+inst_470:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x33333330, 0x4, 0x33333334, x1, 1880, x2)
+
+inst_471:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x66666663, 0x4, 0x66666667, x1, 1884, x2)
+
+inst_472:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xffff4af9, 0x4, -0xb503, x1, 1888, x2)
+
+inst_473:
+// rs1_val==4 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0xb501, 0x4, 0xb505, x1, 1892, x2)
+
+inst_474:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x33333331, 0x33333332, 0x3, x1, 1896, x2)
+
+inst_475:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x66666667, 0x33333332, 0x55555555, x1, 1900, x2)
+
+inst_476:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x99999998, 0x33333332, -0x55555556, x1, 1904, x2)
+
+inst_477:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x33333337, 0x33333332, 0x5, x1, 1908, x2)
+
+inst_478:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x33333332, 0x33333333, x1, 1912, x2)
+
+inst_479:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x55555554, 0x33333332, 0x66666666, x1, 1916, x2)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xcccc79ce, 0x33333332, -0xb504, x1, 1920, x2)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x33338636, 0x33333332, 0xb504, x1, 1924, x2)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x33333330, 0x33333332, 0x2, x1, 1928, x2)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x66666666, 0x33333332, 0x55555554, x1, 1932, x2)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x33333332, 0x33333332, 0x0, x1, 1936, x2)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x33333336, 0x33333332, 0x4, x1, 1940, x2)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x33333332, 0x33333332, x1, 1944, x2)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x55555557, 0x33333332, 0x66666665, x1, 1948, x2)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x33338631, 0x33333332, 0xb503, x1, 1952, x2)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x66666664, 0x33333332, 0x55555556, x1, 1956, x2)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x99999999, 0x33333332, -0x55555555, x1, 1960, x2)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x33333334, 0x33333332, 0x6, x1, 1964, x2)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x33333332, 0x33333334, x1, 1968, x2)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x55555555, 0x33333332, 0x66666667, x1, 1972, x2)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xcccc79cf, 0x33333332, -0xb503, x1, 1976, x2)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x33333332; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0x33338637, 0x33333332, 0xb505, x1, 1980, x2)
+
+inst_496:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x66666666, 0x66666665, 0x3, x1, 1984, x2)
+
+inst_497:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x33333330, 0x66666665, 0x55555555, x1, 1988, x2)
+
+inst_498:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccf, 0x66666665, -0x55555556, x1, 1992, x2)
+
+inst_499:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x66666660, 0x66666665, 0x5, x1, 1996, x2)
+
+inst_500:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x55555556, 0x66666665, 0x33333333, x1, 2000, x2)
+
+inst_501:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x66666665, 0x66666666, x1, 2004, x2)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x99992c99, 0x66666665, -0xb504, x1, 2008, x2)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x6666d361, 0x66666665, 0xb504, x1, 2012, x2)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x66666667, 0x66666665, 0x2, x1, 2016, x2)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x33333331, 0x66666665, 0x55555554, x1, 2020, x2)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x66666665, 0x66666665, 0x0, x1, 2024, x2)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x66666661, 0x66666665, 0x4, x1, 2028, x2)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x55555557, 0x66666665, 0x33333332, x1, 2032, x2)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x66666665, 0x66666665, x1, 2036, x2)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x6666d366, 0x66666665, 0xb503, x1, 2040, x2)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x33333333, 0x66666665, 0x55555556, x1, 2044, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xccccccce, 0x66666665, -0x55555555, x1, 0, x2)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x66666663, 0x66666665, 0x6, x1, 4, x2)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x55555551, 0x66666665, 0x33333334, x1, 8, x2)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x66666665, 0x66666667, x1, 12, x2)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x99992c98, 0x66666665, -0xb503, x1, 16, x2)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x66666665; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0x6666d360, 0x66666665, 0xb505, x1, 20, x2)
+
+inst_518:
+// rs1_val==46339 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xb500, 0xb503, 0x3, x1, 24, x2)
+
+inst_519:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x5555e056, 0xb503, 0x55555555, x1, 28, x2)
+
+inst_520:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fa9, 0xb503, -0x55555556, x1, 32, x2)
+
+inst_521:
+// rs1_val==46339 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xb506, 0xb503, 0x5, x1, 36, x2)
+
+inst_522:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x33338630, 0xb503, 0x33333333, x1, 40, x2)
+
+inst_523:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x6666d365, 0xb503, 0x66666666, x1, 44, x2)
+
+inst_524:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff, 0xb503, -0xb504, x1, 48, x2)
+
+inst_525:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0xb503, 0xb504, x1, 52, x2)
+
+inst_526:
+// rs1_val==46339 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xb501, 0xb503, 0x2, x1, 56, x2)
+
+inst_527:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x5555e057, 0xb503, 0x55555554, x1, 60, x2)
+
+inst_528:
+// rs1_val==46339 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xb503, 0xb503, 0x0, x1, 64, x2)
+
+inst_529:
+// rs1_val==46339 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xb507, 0xb503, 0x4, x1, 68, x2)
+
+inst_530:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x33338631, 0xb503, 0x33333332, x1, 72, x2)
+
+inst_531:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x6666d366, 0xb503, 0x66666665, x1, 76, x2)
+
+inst_532:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0xb503, 0xb503, x1, 80, x2)
+
+inst_533:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x5555e055, 0xb503, 0x55555556, x1, 84, x2)
+
+inst_534:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fa8, 0xb503, -0x55555555, x1, 88, x2)
+
+inst_535:
+// rs1_val==46339 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xb505, 0xb503, 0x6, x1, 92, x2)
+
+inst_536:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x33338637, 0xb503, 0x33333334, x1, 96, x2)
+
+inst_537:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x6666d364, 0xb503, 0x66666667, x1, 100, x2)
+
+inst_538:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffe, 0xb503, -0xb503, x1, 104, x2)
+
+inst_539:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb503; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0xb503, 0xb505, x1, 108, x2)
+
+inst_540:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x55555555, 0x55555556, 0x3, x1, 112, x2)
+
+inst_541:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x55555556, 0x55555555, x1, 116, x2)
+
+inst_542:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffc, 0x55555556, -0x55555556, x1, 120, x2)
+
+inst_543:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x55555553, 0x55555556, 0x5, x1, 124, x2)
+
+inst_544:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x66666665, 0x55555556, 0x33333333, x1, 128, x2)
+
+inst_545:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0x33333330, 0x55555556, 0x66666666, x1, 132, x2)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1faa, 0x55555556, -0xb504, x1, 136, x2)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x5555e052, 0x55555556, 0xb504, x1, 140, x2)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x55555554, 0x55555556, 0x2, x1, 144, x2)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x55555556, 0x55555554, x1, 148, x2)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x55555556, 0x55555556, 0x0, x1, 152, x2)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x55555552, 0x55555556, 0x4, x1, 156, x2)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x66666664, 0x55555556, 0x33333332, x1, 160, x2)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0x33333333, 0x55555556, 0x66666665, x1, 164, x2)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0x5555e055, 0x55555556, 0xb503, x1, 168, x2)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x55555556, 0x55555556, x1, 172, x2)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffd, 0x55555556, -0x55555555, x1, 176, x2)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x55555550, 0x55555556, 0x6, x1, 180, x2)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x66666662, 0x55555556, 0x33333334, x1, 184, x2)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0x33333331, 0x55555556, 0x66666667, x1, 188, x2)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fab, 0x55555556, -0xb503, x1, 192, x2)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x55555556; op2val:0xb505
+TEST_CR_OP( c.xor, x10, x11, 0x5555e053, 0x55555556, 0xb505, x1, 196, x2)
+
+inst_562:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaa8, -0x55555555, 0x3, x1, 200, x2)
+
+inst_563:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffe, -0x55555555, 0x55555555, x1, 204, x2)
+
+inst_564:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0x1, -0x55555555, -0x55555556, x1, 208, x2)
+
+inst_565:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaae, -0x55555555, 0x5, x1, 212, x2)
+
+inst_566:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333333
+TEST_CR_OP( c.xor, x10, x11, 0x99999998, -0x55555555, 0x33333333, x1, 216, x2)
+
+inst_567:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666666
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccd, -0x55555555, 0x66666666, x1, 220, x2)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb504
+TEST_CR_OP( c.xor, x10, x11, 0x5555e057, -0x55555555, -0xb504, x1, 224, x2)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb504
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1faf, -0x55555555, 0xb504, x1, 228, x2)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaa9, -0x55555555, 0x2, x1, 232, x2)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555554
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff, -0x55555555, 0x55555554, x1, 236, x2)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaab, -0x55555555, 0x0, x1, 240, x2)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaf, -0x55555555, 0x4, x1, 244, x2)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333332
+TEST_CR_OP( c.xor, x10, x11, 0x99999999, -0x55555555, 0x33333332, x1, 248, x2)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666665
+TEST_CR_OP( c.xor, x10, x11, 0xccccccce, -0x55555555, 0x66666665, x1, 252, x2)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb503
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa1fa8, -0x55555555, 0xb503, x1, 256, x2)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555556
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffd, -0x55555555, 0x55555556, x1, 260, x2)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555555
+TEST_CR_OP( c.xor, x10, x11, 0x0, -0x55555555, -0x55555555, x1, 264, x2)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaad, -0x55555555, 0x6, x1, 268, x2)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333334
+TEST_CR_OP( c.xor, x10, x11, 0x9999999f, -0x55555555, 0x33333334, x1, 272, x2)
+
+inst_581:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666667
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc, -0x55555555, 0x66666667, x1, 276, x2)
+
+inst_582:
+// rs2_val == 0, rs1_val == 32768
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x8000; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x8000, 0x8000, 0x0, x1, 280, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 71*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/I-ADD-01.S b/riscof/suite/rv32i_m/I/I-ADD-01.S
deleted file mode 100644
index 3dcdf2e6825498b63da38c55b558c6846f3986fa..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-ADD-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test ADD-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'ADD'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", add)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_RR_OP(add, x0, x31, x16, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_RR_OP(add, x1, x30, x15, 0xfffff802, 0x1, -0x7ff, x5, 4, x6) # Testcase 1
- TEST_RR_OP(add, x2, x29, x14, 0xffffffff, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_RR_OP(add, x3, x28, x13, 0xfffff5cb, 0x7ff, -0x1234, x5, 12, x6) # Testcase 3
- TEST_RR_OP(add, x4, x27, x12, 0x80000000, 0x0, 0x80000000, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_RR_OP(add, x5, x26, x11, 0x1a34, 0x800, 0x1234, x1, 0, x2) # Testcase 5
- TEST_RR_OP(add, x6, x25, x10, 0x7654320, 0x7654321, 0xffffffff, x1, 4, x2) # Testcase 6
- TEST_RR_OP(add, x7, x24, x9, 0x80000000, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_RR_OP(add, x8, x23, x8, 0x80000000, 0x1, 0x7fffffff, x1, 12, x2) # Testcase 8
- TEST_RR_OP(add, x9, x22, x7, 0x7654320, 0xffffffff, 0x7654321, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_RR_OP(add, x10, x21, x6, 0x1a34, 0x1234, 0x800, x1, 0, x7) # Testcase 10
- TEST_RR_OP(add, x11, x20, x5, 0x80000000, 0x80000000, 0x0, x1, 4, x7) # Testcase 11
- TEST_RR_OP(add, x12, x19, x4, 0xfffff5cb, -0x1234, 0x7ff, x1, 8, x7) # Testcase 12
- TEST_RR_OP(add, x13, x18, x3, 0xfffffffe, -0x1, -0x1, x1, 12, x7) # Testcase 13
- TEST_RR_OP(add, x14, x17, x2, 0xfffff802, -0x7ff, 0x1, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_OP(add, x15, x16, x1, 0x0, 0x0, 0x0, x2, 0, x3) # Testcase 15
- TEST_RR_OP(add, x16, x15, x0, 0xffffffff, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_RR_OP(add, x17, x14, x31, 0xfffff802, 0x1, -0x7ff, x2, 8, x3) # Testcase 17
- TEST_RR_OP(add, x18, x13, x30, 0xffffffff, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_RR_OP(add, x19, x12, x29, 0xfffff5cb, 0x7ff, -0x1234, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_RR_OP(add, x20, x11, x28, 0x80000000, 0x0, 0x80000000, x1, 0, x2) # Testcase 20
- TEST_RR_OP(add, x21, x10, x27, 0x1a34, 0x800, 0x1234, x1, 4, x2) # Testcase 21
- TEST_RR_OP(add, x22, x9, x26, 0x7654320, 0x7654321, 0xffffffff, x1, 8, x2) # Testcase 22
- TEST_RR_OP(add, x23, x8, x25, 0x80000000, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_RR_OP(add, x24, x7, x24, 0x80000000, 0x1, 0x7fffffff, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_RR_OP(add, x25, x6, x23, 0x7654320, 0xffffffff, 0x7654321, x1, 0, x7) # Testcase 25
- TEST_RR_OP(add, x26, x5, x22, 0x1a34, 0x1234, 0x800, x1, 4, x7) # Testcase 26
- TEST_RR_OP(add, x27, x4, x21, 0x80000000, 0x80000000, 0x0, x1, 8, x7) # Testcase 27
- TEST_RR_OP(add, x28, x3, x20, 0xfffff5cb, -0x1234, 0x7ff, x1, 12, x7) # Testcase 28
- TEST_RR_OP(add, x29, x2, x19, 0xfffffffe, -0x1, -0x1, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_RR_OP(add, x30, x1, x18, 0xfffff802, -0x7ff, 0x1, x2, 0, x3) # Testcase 30
- TEST_RR_OP(add, x31, x0, x17, 0x0, 0x0, 0x0, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-ADDI-01.S b/riscof/suite/rv32i_m/I/I-ADDI-01.S
deleted file mode 100644
index d9d74b0845427b5ff2a890f0794548943e3d3d43..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-ADDI-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test ADDI-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'ADDI'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", addi)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_IMM_OP(addi, x0, x31, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_IMM_OP(addi, x1, x30, 0xfffff802, 0x1, -0x7ff, x5, 4, x6) # Testcase 1
- TEST_IMM_OP(addi, x2, x29, 0xffffffff, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_IMM_OP(addi, x3, x28, 0xffffffff, 0x7ff, -0x800, x5, 12, x6) # Testcase 3
- TEST_IMM_OP(addi, x4, x27, 0xfffff800, 0x0, 0x800, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_IMM_OP(addi, x5, x26, 0x0, 0x800, 0x800, x1, 0, x2) # Testcase 5
- TEST_IMM_OP(addi, x6, x25, 0x7653b21, 0x7654321, 0x800, x1, 4, x2) # Testcase 6
- TEST_IMM_OP(addi, x7, x24, 0x80000000, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_IMM_OP(addi, x8, x23, 0xfffff801, 0x1, 0x800, x1, 12, x2) # Testcase 8
- TEST_IMM_OP(addi, x9, x22, 0xfffff7ff, 0xffffffff, 0x800, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_IMM_OP(addi, x10, x21, 0xa34, 0x1234, 0x800, x1, 0, x7) # Testcase 10
- TEST_IMM_OP(addi, x11, x20, 0x80000000, 0x80000000, 0x0, x1, 4, x7) # Testcase 11
- TEST_IMM_OP(addi, x12, x19, 0xfffff5cb, -0x1234, 0x7ff, x1, 8, x7) # Testcase 12
- TEST_IMM_OP(addi, x13, x18, 0xfffffffe, -0x1, -0x1, x1, 12, x7) # Testcase 13
- TEST_IMM_OP(addi, x14, x17, 0xfffff802, -0x7ff, 0x1, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_IMM_OP(addi, x15, x16, 0x0, 0x0, 0x0, x2, 0, x3) # Testcase 15
- TEST_IMM_OP(addi, x16, x15, 0xffffffff, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_IMM_OP(addi, x17, x14, 0xfffff802, 0x1, -0x7ff, x2, 8, x3) # Testcase 17
- TEST_IMM_OP(addi, x18, x13, 0xffffffff, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_IMM_OP(addi, x19, x12, 0xffffffff, 0x7ff, -0x800, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_IMM_OP(addi, x20, x11, 0xfffff800, 0x0, 0x800, x1, 0, x2) # Testcase 20
- TEST_IMM_OP(addi, x21, x10, 0x0, 0x800, 0x800, x1, 4, x2) # Testcase 21
- TEST_IMM_OP(addi, x22, x9, 0x7653b21, 0x7654321, 0x800, x1, 8, x2) # Testcase 22
- TEST_IMM_OP(addi, x23, x8, 0x80000000, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_IMM_OP(addi, x24, x7, 0xfffff801, 0x1, 0x800, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_IMM_OP(addi, x25, x6, 0xfffff7ff, 0xffffffff, 0x800, x1, 0, x7) # Testcase 25
- TEST_IMM_OP(addi, x26, x5, 0xa34, 0x1234, 0x800, x1, 4, x7) # Testcase 26
- TEST_IMM_OP(addi, x27, x4, 0x80000000, 0x80000000, 0x0, x1, 8, x7) # Testcase 27
- TEST_IMM_OP(addi, x28, x3, 0xfffff5cb, -0x1234, 0x7ff, x1, 12, x7) # Testcase 28
- TEST_IMM_OP(addi, x29, x2, 0xfffffffe, -0x1, -0x1, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_IMM_OP(addi, x30, x1, 0xfffff802, -0x7ff, 0x1, x2, 0, x3) # Testcase 30
- TEST_IMM_OP(addi, x31, x0, 0x0, 0x0, 0x0, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-AND-01.S b/riscof/suite/rv32i_m/I/I-AND-01.S
deleted file mode 100644
index cbf8bfbd8dd8e7fccf712ce53aa59930946e5a23..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-AND-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test AND-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'AND'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", and)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_RR_OP(and, x0, x31, x16, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_RR_OP(and, x1, x30, x15, 0x1, 0x1, -0x7ff, x5, 4, x6) # Testcase 1
- TEST_RR_OP(and, x2, x29, x14, 0x0, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_RR_OP(and, x3, x28, x13, 0x5cc, 0x7ff, -0x1234, x5, 12, x6) # Testcase 3
- TEST_RR_OP(and, x4, x27, x12, 0x0, 0x0, 0x80000000, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_RR_OP(and, x5, x26, x11, 0x0, 0x800, 0x1234, x1, 0, x2) # Testcase 5
- TEST_RR_OP(and, x6, x25, x10, 0x7654321, 0x7654321, 0xffffffff, x1, 4, x2) # Testcase 6
- TEST_RR_OP(and, x7, x24, x9, 0x1, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_RR_OP(and, x8, x23, x8, 0x1, 0x1, 0x7fffffff, x1, 12, x2) # Testcase 8
- TEST_RR_OP(and, x9, x22, x7, 0x7654321, 0xffffffff, 0x7654321, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_RR_OP(and, x10, x21, x6, 0x0, 0x1234, 0x800, x1, 0, x7) # Testcase 10
- TEST_RR_OP(and, x11, x20, x5, 0x0, 0x80000000, 0x0, x1, 4, x7) # Testcase 11
- TEST_RR_OP(and, x12, x19, x4, 0x5cc, -0x1234, 0x7ff, x1, 8, x7) # Testcase 12
- TEST_RR_OP(and, x13, x18, x3, 0xffffffff, -0x1, -0x1, x1, 12, x7) # Testcase 13
- TEST_RR_OP(and, x14, x17, x2, 0x1, -0x7ff, 0x1, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_OP(and, x15, x16, x1, 0x0, 0x0, 0x0, x2, 0, x3) # Testcase 15
- TEST_RR_OP(and, x16, x15, x0, 0x0, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_RR_OP(and, x17, x14, x31, 0x1, 0x1, -0x7ff, x2, 8, x3) # Testcase 17
- TEST_RR_OP(and, x18, x13, x30, 0x0, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_RR_OP(and, x19, x12, x29, 0x5cc, 0x7ff, -0x1234, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_RR_OP(and, x20, x11, x28, 0x0, 0x0, 0x80000000, x1, 0, x2) # Testcase 20
- TEST_RR_OP(and, x21, x10, x27, 0x0, 0x800, 0x1234, x1, 4, x2) # Testcase 21
- TEST_RR_OP(and, x22, x9, x26, 0x7654321, 0x7654321, 0xffffffff, x1, 8, x2) # Testcase 22
- TEST_RR_OP(and, x23, x8, x25, 0x1, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_RR_OP(and, x24, x7, x24, 0x1, 0x1, 0x7fffffff, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_RR_OP(and, x25, x6, x23, 0x7654321, 0xffffffff, 0x7654321, x1, 0, x7) # Testcase 25
- TEST_RR_OP(and, x26, x5, x22, 0x0, 0x1234, 0x800, x1, 4, x7) # Testcase 26
- TEST_RR_OP(and, x27, x4, x21, 0x0, 0x80000000, 0x0, x1, 8, x7) # Testcase 27
- TEST_RR_OP(and, x28, x3, x20, 0x5cc, -0x1234, 0x7ff, x1, 12, x7) # Testcase 28
- TEST_RR_OP(and, x29, x2, x19, 0xffffffff, -0x1, -0x1, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_RR_OP(and, x30, x1, x18, 0x1, -0x7ff, 0x1, x2, 0, x3) # Testcase 30
- TEST_RR_OP(and, x31, x0, x17, 0x0, 0x0, 0x0, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-ANDI-01.S b/riscof/suite/rv32i_m/I/I-ANDI-01.S
deleted file mode 100644
index 7f14ed0270db5e40daf0b2f9ac3869e357f2d49b..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-ANDI-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test ANDI-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'ANDI'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",andi)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_IMM_OP(andi, x0, x31, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_IMM_OP(andi, x1, x30, 0x1, 0x1, -0x7ff, x5, 4, x6) # Testcase 1
- TEST_IMM_OP(andi, x2, x29, 0x0, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_IMM_OP(andi, x3, x28, 0x0, 0x7ff, -0x800, x5, 12, x6) # Testcase 3
- TEST_IMM_OP(andi, x4, x27, 0x0, 0x0, 0x800, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_IMM_OP(andi, x5, x26, 0x800, 0x800, 0x800, x1, 0, x2) # Testcase 5
- TEST_IMM_OP(andi, x6, x25, 0x7654000, 0x7654321, 0x800, x1, 4, x2) # Testcase 6
- TEST_IMM_OP(andi, x7, x24, 0x1, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_IMM_OP(andi, x8, x23, 0x0, 0x1, 0x800, x1, 12, x2) # Testcase 8
- TEST_IMM_OP(andi, x9, x22, 0xfffff800, 0xffffffff, 0x800, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_IMM_OP(andi, x10, x21, 0x1000, 0x1234, 0x800, x1, 0, x7) # Testcase 10
- TEST_IMM_OP(andi, x11, x20, 0x0, 0x80000000, 0x0, x1, 4, x7) # Testcase 11
- TEST_IMM_OP(andi, x12, x19, 0x5cc, -0x1234, 0x7ff, x1, 8, x7) # Testcase 12
- TEST_IMM_OP(andi, x13, x18, 0xffffffff, -0x1, -0x1, x1, 12, x7) # Testcase 13
- TEST_IMM_OP(andi, x14, x17, 0x1, -0x7ff, 0x1, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_IMM_OP(andi, x15, x16, 0x0, 0x0, 0x0, x2, 0, x3) # Testcase 15
- TEST_IMM_OP(andi, x16, x15, 0x0, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_IMM_OP(andi, x17, x14, 0x1, 0x1, -0x7ff, x2, 8, x3) # Testcase 17
- TEST_IMM_OP(andi, x18, x13, 0x0, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_IMM_OP(andi, x19, x12, 0x0, 0x7ff, -0x800, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_IMM_OP(andi, x20, x11, 0x0, 0x0, 0x800, x1, 0, x2) # Testcase 20
- TEST_IMM_OP(andi, x21, x10, 0x800, 0x800, 0x800, x1, 4, x2) # Testcase 21
- TEST_IMM_OP(andi, x22, x9, 0x7654000, 0x7654321, 0x800, x1, 8, x2) # Testcase 22
- TEST_IMM_OP(andi, x23, x8, 0x1, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_IMM_OP(andi, x24, x7, 0x0, 0x1, 0x800, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_IMM_OP(andi, x25, x6, 0xfffff800, 0xffffffff, 0x800, x1, 0, x7) # Testcase 25
- TEST_IMM_OP(andi, x26, x5, 0x1000, 0x1234, 0x800, x1, 4, x7) # Testcase 26
- TEST_IMM_OP(andi, x27, x4, 0x0, 0x80000000, 0x0, x1, 8, x7) # Testcase 27
- TEST_IMM_OP(andi, x28, x3, 0x5cc, -0x1234, 0x7ff, x1, 12, x7) # Testcase 28
- TEST_IMM_OP(andi, x29, x2, 0xffffffff, -0x1, -0x1, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_IMM_OP(andi, x30, x1, 0x1, -0x7ff, 0x1, x2, 0, x3) # Testcase 30
- TEST_IMM_OP(andi, x31, x0, 0x0, 0x0, 0x0, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-AUIPC-01.S b/riscof/suite/rv32i_m/I/I-AUIPC-01.S
deleted file mode 100644
index 7de19b23f575e4a2d1368a740f3f416ad4da5c79..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-AUIPC-01.S
+++ /dev/null
@@ -1,393 +0,0 @@
-# RISC-V Compliance Test AUIPC-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'AUIPC'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", auipc)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- # Testcase 0: imm:0x0, result rd:x0(0x0)
-1:
- auipc x0, 0x0
- la x7, 1b
- sub x0, x0, x7
- sw x0, 0(x5)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x0, 0x0)
-
- # Testcase 1: imm:0x0, result rd:x1(0x0)
-1:
- auipc x1, 0x0
- la x7, 1b
- sub x1, x1, x7
- sw x1, 4(x5)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0)
-
- # Testcase 2: imm:0x7ff, result rd:x2(0x7ff000)
-1:
- auipc x2, 0x7ff
- la x7, 1b
- sub x2, x2, x7
- sw x2, 8(x5)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x7ff000)
-
- # Testcase 3: imm:0x1, result rd:x3(0x1000)
-1:
- auipc x3, 0x1
- la x7, 1b
- sub x3, x3, x7
- sw x3, 12(x5)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x1000)
-
- # Testcase 4: imm:0x1234, result rd:x4(0x1234000)
-1:
- auipc x4, 0x1234
- la x7, 1b
- sub x4, x4, x7
- sw x4, 16(x5)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x1234000)
-
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- # Testcase 5: imm:0x80000, result rd:x5(0x80000000)
-1:
- auipc x5, 0x80000
- la x3, 1b
- sub x5, x5, x3
- sw x5, 0(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x80000000)
-
- # Testcase 6: imm:0x1234, result rd:x6(0x1234000)
-1:
- auipc x6, 0x1234
- la x3, 1b
- sub x6, x6, x3
- sw x6, 4(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x1234000)
-
- # Testcase 7: imm:0xfffff, result rd:x7(0xfffff000)
-1:
- auipc x7, 0xfffff
- la x3, 1b
- sub x7, x7, x3
- sw x7, 8(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffff000)
-
- # Testcase 8: imm:0x1, result rd:x8(0x1000)
-1:
- auipc x8, 0x1
- la x3, 1b
- sub x8, x8, x3
- sw x8, 12(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x1000)
-
- # Testcase 9: imm:0x7ffff, result rd:x9(0x7ffff000)
-1:
- auipc x9, 0x7ffff
- la x3, 1b
- sub x9, x9, x3
- sw x9, 16(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x7ffff000)
-
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- # Testcase 10: imm:0x54321, result rd:x10(0x54321000)
-1:
- auipc x10, 0x54321
- la x8, 1b
- sub x10, x10, x8
- sw x10, 0(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x10, 0x54321000)
-
- # Testcase 11: imm:0x800, result rd:x11(0x800000)
-1:
- auipc x11, 0x800
- la x8, 1b
- sub x11, x11, x8
- sw x11, 4(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x800000)
-
- # Testcase 12: imm:0x0, result rd:x12(0x0)
-1:
- auipc x12, 0x0
- la x8, 1b
- sub x12, x12, x8
- sw x12, 8(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0)
-
- # Testcase 13: imm:0x7ff, result rd:x13(0x7ff000)
-1:
- auipc x13, 0x7ff
- la x8, 1b
- sub x13, x13, x8
- sw x13, 12(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x7ff000)
-
- # Testcase 14: imm:0x0, result rd:x14(0x0)
-1:
- auipc x14, 0x0
- la x8, 1b
- sub x14, x14, x8
- sw x14, 16(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0)
-
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- # Testcase 15: imm:0x1, result rd:x15(0x1000)
-1:
- auipc x15, 0x1
- la x4, 1b
- sub x15, x15, x4
- sw x15, 0(x2)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x15, 0x1000)
-
- # Testcase 16: imm:0x0, result rd:x16(0x0)
-1:
- auipc x16, 0x0
- la x4, 1b
- sub x16, x16, x4
- sw x16, 4(x2)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0)
-
- # Testcase 17: imm:0x0, result rd:x17(0x0)
-1:
- auipc x17, 0x0
- la x4, 1b
- sub x17, x17, x4
- sw x17, 8(x2)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0)
-
- # Testcase 18: imm:0x7ff, result rd:x18(0x7ff000)
-1:
- auipc x18, 0x7ff
- la x4, 1b
- sub x18, x18, x4
- sw x18, 12(x2)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x7ff000)
-
- # Testcase 19: imm:0x1, result rd:x19(0x1000)
-1:
- auipc x19, 0x1
- la x4, 1b
- sub x19, x19, x4
- sw x19, 16(x2)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x1000)
-
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- # Testcase 20: imm:0x1234, result rd:x20(0x1234000)
-1:
- auipc x20, 0x1234
- la x3, 1b
- sub x20, x20, x3
- sw x20, 0(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x1234000)
-
- # Testcase 21: imm:0x80000, result rd:x21(0x80000000)
-1:
- auipc x21, 0x80000
- la x3, 1b
- sub x21, x21, x3
- sw x21, 4(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x80000000)
-
- # Testcase 22: imm:0x1234, result rd:x22(0x1234000)
-1:
- auipc x22, 0x1234
- la x3, 1b
- sub x22, x22, x3
- sw x22, 8(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x1234000)
-
- # Testcase 23: imm:0xfffff, result rd:x23(0xfffff000)
-1:
- auipc x23, 0xfffff
- la x3, 1b
- sub x23, x23, x3
- sw x23, 12(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfffff000)
-
- # Testcase 24: imm:0x1, result rd:x24(0x1000)
-1:
- auipc x24, 0x1
- la x3, 1b
- sub x24, x24, x3
- sw x24, 16(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x1000)
-
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- # Testcase 25: imm:0x7ffff, result rd:x25(0x7ffff000)
-1:
- auipc x25, 0x7ffff
- la x8, 1b
- sub x25, x25, x8
- sw x25, 0(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x25, 0x7ffff000)
-
- # Testcase 26: imm:0x54321, result rd:x26(0x54321000)
-1:
- auipc x26, 0x54321
- la x8, 1b
- sub x26, x26, x8
- sw x26, 4(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x54321000)
-
- # Testcase 27: imm:0x800, result rd:x27(0x800000)
-1:
- auipc x27, 0x800
- la x8, 1b
- sub x27, x27, x8
- sw x27, 8(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x800000)
-
- # Testcase 28: imm:0x0, result rd:x28(0x0)
-1:
- auipc x28, 0x0
- la x8, 1b
- sub x28, x28, x8
- sw x28, 12(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0)
-
- # Testcase 29: imm:0x7ff, result rd:x29(0x7ff000)
-1:
- auipc x29, 0x7ff
- la x8, 1b
- sub x29, x29, x8
- sw x29, 16(x1)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x7ff000)
-
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- # Testcase 30: imm:0x0, result rd:x30(0x0)
-1:
- auipc x30, 0x0
- la x4, 1b
- sub x30, x30, x4
- sw x30, 0(x2)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x30, 0x0)
-
- # Testcase 31: imm:0x1, result rd:x31(0x1000)
-1:
- auipc x31, 0x1
- la x4, 1b
- sub x31, x31, x4
- sw x31, 4(x2)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x31, 0x1000)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-BEQ-01.S b/riscof/suite/rv32i_m/I/I-BEQ-01.S
deleted file mode 100644
index 086913fbe6d7ed577ee672060fdad966902c1dff..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-BEQ-01.S
+++ /dev/null
@@ -1,495 +0,0 @@
-# RISC-V Compliance Test BEQ-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'BEQ'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",beq)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x2, test_1_res
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 0, \
- li x1, 0xcccc; \
- li x31, -0x1; \
- li x16, 0x0; \
- beq x31, x16, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 4, \
- li x1, 0xcccc; \
- li x30, 0x1; \
- li x15, -0x7ff; \
- beq x30, x15, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 8, \
- li x1, 0xcccc; \
- li x29, 0x0; \
- li x14, -0x1; \
- beq x29, x14, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 12, \
- li x1, 0xcccc; \
- li x28, 0x7ff; \
- li x13, -0x1234; \
- beq x28, x13, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 16, \
- li x1, 0xcccc; \
- li x27, 0x0; \
- li x12, 0x80000000; \
- beq x27, x12, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x2, test_2_res
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 0, \
- li x1, 0xcccc; \
- li x26, 0x800; \
- li x11, 0x1234; \
- beq x26, x11, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 4, \
- li x1, 0xcccc; \
- li x25, 0x7654321; \
- li x10, 0xffffffff; \
- beq x25, x10, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 8, \
- li x1, 0xcccc; \
- li x24, 0x7fffffff; \
- li x9, 0x1; \
- beq x24, x9, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 12, \
- li x1, 0xcccc; \
- li x23, 0x1; \
- li x8, 0x7fffffff; \
- beq x23, x8, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 16, \
- li x1, 0xcccc; \
- li x22, 0xffffffff; \
- li x7, 0x7654321; \
- beq x22, x7, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x7, test_3_res
-
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 0, \
- li x1, 0xcccc; \
- li x21, 0x1234; \
- li x6, 0x800; \
- beq x21, x6, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 4, \
- li x1, 0xcccc; \
- li x20, 0x80000000; \
- li x5, 0x0; \
- beq x20, x5, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 8, \
- li x1, 0xcccc; \
- li x19, -0x1234; \
- li x4, 0x7ff; \
- beq x19, x4, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 12, \
- li x1, 0xcccc; \
- li x18, -0x1; \
- li x3, -0x1; \
- beq x18, x3, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 16, \
- li x1, 0xcccc; \
- li x17, -0x7ff; \
- li x2, 0x1; \
- beq x17, x2, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x3, test_4_res
-
-
- // Result = 1
- TEST_CASE(x4, x2, 0xcccc, x3, 0, \
- li x2, 0xcccc; \
- li x16, 0x0; \
- li x1, 0x0; \
- beq x16, x1, 1f; \
- li x2, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 4, \
- li x1, 0xcccc; \
- li x15, -0x1; \
- li x0, 0x0; \
- beq x15, x0, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 8, \
- li x1, 0xcccc; \
- li x14, 0x1; \
- li x31, -0x7ff; \
- beq x14, x31, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 12, \
- li x1, 0xcccc; \
- li x13, 0x0; \
- li x30, -0x1; \
- beq x13, x30, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 16, \
- li x1, 0xcccc; \
- li x12, 0x7ff; \
- li x29, -0x1234; \
- beq x12, x29, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x2, test_5_res
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 0, \
- li x1, 0xcccc; \
- li x11, 0x0; \
- li x28, 0x80000000; \
- beq x11, x28, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 4, \
- li x1, 0xcccc; \
- li x10, 0x800; \
- li x27, 0x1234; \
- beq x10, x27, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 8, \
- li x1, 0xcccc; \
- li x9, 0x7654321; \
- li x26, 0xffffffff; \
- beq x9, x26, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 12, \
- li x1, 0xcccc; \
- li x8, 0x7fffffff; \
- li x25, 0x1; \
- beq x8, x25, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 16, \
- li x1, 0xcccc; \
- li x7, 0x1; \
- li x24, 0x7fffffff; \
- beq x7, x24, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x7, test_6_res
-
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 0, \
- li x1, 0xcccc; \
- li x6, 0xffffffff; \
- li x23, 0x7654321; \
- beq x6, x23, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 4, \
- li x1, 0xcccc; \
- li x5, 0x1234; \
- li x22, 0x800; \
- beq x5, x22, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 8, \
- li x1, 0xcccc; \
- li x4, 0x80000000; \
- li x21, 0x0; \
- beq x4, x21, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 12, \
- li x1, 0xcccc; \
- li x3, -0x1234; \
- li x20, 0x7ff; \
- beq x3, x20, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 16, \
- li x1, 0xcccc; \
- li x2, -0x1; \
- li x19, -0x1; \
- beq x2, x19, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x3, test_7_res
-
-
- // Result = 0
- TEST_CASE(x4, x2, 0x123ab, x3, 0, \
- li x2, 0xcccc; \
- li x1, -0x7ff; \
- li x18, 0x1; \
- beq x1, x18, 1f; \
- li x2, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 4, \
- li x1, 0xcccc; \
- li x0, 0x0; \
- li x17, 0x0; \
- beq x0, x17, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-BGE-01.S b/riscof/suite/rv32i_m/I/I-BGE-01.S
deleted file mode 100644
index 49f5831a982d4f64e691685a9d0171a151bb2a07..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-BGE-01.S
+++ /dev/null
@@ -1,495 +0,0 @@
-# RISC-V Compliance Test BGE-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'BGE'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",bge)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x2, test_1_res
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 0, \
- li x1, 0xcccc; \
- li x31, -0x1; \
- li x16, 0x0; \
- bge x31, x16, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 4, \
- li x1, 0xcccc; \
- li x30, 0x1; \
- li x15, -0x7ff; \
- bge x30, x15, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 8, \
- li x1, 0xcccc; \
- li x29, 0x0; \
- li x14, -0x1; \
- bge x29, x14, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 12, \
- li x1, 0xcccc; \
- li x28, 0x7ff; \
- li x13, -0x1234; \
- bge x28, x13, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 16, \
- li x1, 0xcccc; \
- li x27, 0x0; \
- li x12, 0x80000000; \
- bge x27, x12, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x2, test_2_res
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 0, \
- li x1, 0xcccc; \
- li x26, 0x800; \
- li x11, 0x1234; \
- bge x26, x11, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 4, \
- li x1, 0xcccc; \
- li x25, 0x7654321; \
- li x10, 0xffffffff; \
- bge x25, x10, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 8, \
- li x1, 0xcccc; \
- li x24, 0x7fffffff; \
- li x9, 0x1; \
- bge x24, x9, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 12, \
- li x1, 0xcccc; \
- li x23, 0x1; \
- li x8, 0x7fffffff; \
- bge x23, x8, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 16, \
- li x1, 0xcccc; \
- li x22, 0xffffffff; \
- li x7, 0x7654321; \
- bge x22, x7, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x7, test_3_res
-
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 0, \
- li x1, 0xcccc; \
- li x21, 0x1234; \
- li x6, 0x800; \
- bge x21, x6, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 4, \
- li x1, 0xcccc; \
- li x20, 0x80000000; \
- li x5, 0x0; \
- bge x20, x5, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 8, \
- li x1, 0xcccc; \
- li x19, -0x1234; \
- li x4, 0x7ff; \
- bge x19, x4, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 12, \
- li x1, 0xcccc; \
- li x18, -0x1; \
- li x3, -0x1; \
- bge x18, x3, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 16, \
- li x1, 0xcccc; \
- li x17, -0x7ff; \
- li x2, 0x1; \
- bge x17, x2, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x3, test_4_res
-
-
- // Result = 1
- TEST_CASE(x4, x2, 0xcccc, x3, 0, \
- li x2, 0xcccc; \
- li x16, 0x0; \
- li x1, 0x0; \
- bge x16, x1, 1f; \
- li x2, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 4, \
- li x1, 0xcccc; \
- li x15, -0x1; \
- li x0, 0x0; \
- bge x15, x0, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 8, \
- li x1, 0xcccc; \
- li x14, 0x1; \
- li x31, -0x7ff; \
- bge x14, x31, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 12, \
- li x1, 0xcccc; \
- li x13, 0x0; \
- li x30, -0x1; \
- bge x13, x30, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 16, \
- li x1, 0xcccc; \
- li x12, 0x7ff; \
- li x29, -0x1234; \
- bge x12, x29, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x2, test_5_res
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 0, \
- li x1, 0xcccc; \
- li x11, 0x0; \
- li x28, 0x80000000; \
- bge x11, x28, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 4, \
- li x1, 0xcccc; \
- li x10, 0x800; \
- li x27, 0x1234; \
- bge x10, x27, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 8, \
- li x1, 0xcccc; \
- li x9, 0x7654321; \
- li x26, 0xffffffff; \
- bge x9, x26, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 12, \
- li x1, 0xcccc; \
- li x8, 0x7fffffff; \
- li x25, 0x1; \
- bge x8, x25, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 16, \
- li x1, 0xcccc; \
- li x7, 0x1; \
- li x24, 0x7fffffff; \
- bge x7, x24, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x7, test_6_res
-
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 0, \
- li x1, 0xcccc; \
- li x6, 0xffffffff; \
- li x23, 0x7654321; \
- bge x6, x23, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 4, \
- li x1, 0xcccc; \
- li x5, 0x1234; \
- li x22, 0x800; \
- bge x5, x22, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 8, \
- li x1, 0xcccc; \
- li x4, 0x80000000; \
- li x21, 0x0; \
- bge x4, x21, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 12, \
- li x1, 0xcccc; \
- li x3, -0x1234; \
- li x20, 0x7ff; \
- bge x3, x20, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 16, \
- li x1, 0xcccc; \
- li x2, -0x1; \
- li x19, -0x1; \
- bge x2, x19, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x3, test_7_res
-
-
- // Result = 0
- TEST_CASE(x4, x2, 0x123ab, x3, 0, \
- li x2, 0xcccc; \
- li x1, -0x7ff; \
- li x18, 0x1; \
- bge x1, x18, 1f; \
- li x2, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 4, \
- li x1, 0xcccc; \
- li x0, 0x0; \
- li x17, 0x0; \
- bge x0, x17, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-BGEU-01.S b/riscof/suite/rv32i_m/I/I-BGEU-01.S
deleted file mode 100644
index 5fe352c6953e7ea96eeef45c59b73584d02a967e..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-BGEU-01.S
+++ /dev/null
@@ -1,495 +0,0 @@
-# RISC-V Compliance Test BGEU-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'BGEU'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", bgeu)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x2, test_1_res
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 0, \
- li x1, 0xcccc; \
- li x31, -0x1; \
- li x16, 0x0; \
- bgeu x31, x16, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 4, \
- li x1, 0xcccc; \
- li x30, 0x1; \
- li x15, -0x7ff; \
- bgeu x30, x15, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 8, \
- li x1, 0xcccc; \
- li x29, 0x0; \
- li x14, -0x1; \
- bgeu x29, x14, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 12, \
- li x1, 0xcccc; \
- li x28, 0x7ff; \
- li x13, -0x1234; \
- bgeu x28, x13, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 16, \
- li x1, 0xcccc; \
- li x27, 0x0; \
- li x12, 0x80000000; \
- bgeu x27, x12, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x2, test_2_res
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 0, \
- li x1, 0xcccc; \
- li x26, 0x800; \
- li x11, 0x1234; \
- bgeu x26, x11, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 4, \
- li x1, 0xcccc; \
- li x25, 0x7654321; \
- li x10, 0xffffffff; \
- bgeu x25, x10, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 8, \
- li x1, 0xcccc; \
- li x24, 0x7fffffff; \
- li x9, 0x1; \
- bgeu x24, x9, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 12, \
- li x1, 0xcccc; \
- li x23, 0x1; \
- li x8, 0x7fffffff; \
- bgeu x23, x8, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 16, \
- li x1, 0xcccc; \
- li x22, 0xffffffff; \
- li x7, 0x7654321; \
- bgeu x22, x7, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x7, test_3_res
-
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 0, \
- li x1, 0xcccc; \
- li x21, 0x1234; \
- li x6, 0x800; \
- bgeu x21, x6, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 4, \
- li x1, 0xcccc; \
- li x20, 0x80000000; \
- li x5, 0x0; \
- bgeu x20, x5, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 8, \
- li x1, 0xcccc; \
- li x19, -0x1234; \
- li x4, 0x7ff; \
- bgeu x19, x4, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 12, \
- li x1, 0xcccc; \
- li x18, -0x1; \
- li x3, -0x1; \
- bgeu x18, x3, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 16, \
- li x1, 0xcccc; \
- li x17, -0x7ff; \
- li x2, 0x1; \
- bgeu x17, x2, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x3, test_4_res
-
-
- // Result = 1
- TEST_CASE(x4, x2, 0xcccc, x3, 0, \
- li x2, 0xcccc; \
- li x16, 0x0; \
- li x1, 0x0; \
- bgeu x16, x1, 1f; \
- li x2, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 4, \
- li x1, 0xcccc; \
- li x15, -0x1; \
- li x0, 0x0; \
- bgeu x15, x0, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 8, \
- li x1, 0xcccc; \
- li x14, 0x1; \
- li x31, -0x7ff; \
- bgeu x14, x31, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 12, \
- li x1, 0xcccc; \
- li x13, 0x0; \
- li x30, -0x1; \
- bgeu x13, x30, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 16, \
- li x1, 0xcccc; \
- li x12, 0x7ff; \
- li x29, -0x1234; \
- bgeu x12, x29, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x2, test_5_res
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 0, \
- li x1, 0xcccc; \
- li x11, 0x0; \
- li x28, 0x80000000; \
- bgeu x11, x28, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 4, \
- li x1, 0xcccc; \
- li x10, 0x800; \
- li x27, 0x1234; \
- bgeu x10, x27, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 8, \
- li x1, 0xcccc; \
- li x9, 0x7654321; \
- li x26, 0xffffffff; \
- bgeu x9, x26, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 12, \
- li x1, 0xcccc; \
- li x8, 0x7fffffff; \
- li x25, 0x1; \
- bgeu x8, x25, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 16, \
- li x1, 0xcccc; \
- li x7, 0x1; \
- li x24, 0x7fffffff; \
- bgeu x7, x24, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x7, test_6_res
-
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 0, \
- li x1, 0xcccc; \
- li x6, 0xffffffff; \
- li x23, 0x7654321; \
- bgeu x6, x23, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 4, \
- li x1, 0xcccc; \
- li x5, 0x1234; \
- li x22, 0x800; \
- bgeu x5, x22, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 8, \
- li x1, 0xcccc; \
- li x4, 0x80000000; \
- li x21, 0x0; \
- bgeu x4, x21, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 12, \
- li x1, 0xcccc; \
- li x3, -0x1234; \
- li x20, 0x7ff; \
- bgeu x3, x20, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 16, \
- li x1, 0xcccc; \
- li x2, -0x1; \
- li x19, -0x1; \
- bgeu x2, x19, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x3, test_7_res
-
-
- // Result = 1
- TEST_CASE(x4, x2, 0xcccc, x3, 0, \
- li x2, 0xcccc; \
- li x1, -0x7ff; \
- li x18, 0x1; \
- bgeu x1, x18, 1f; \
- li x2, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 4, \
- li x1, 0xcccc; \
- li x0, 0x0; \
- li x17, 0x0; \
- bgeu x0, x17, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-BLT-01.S b/riscof/suite/rv32i_m/I/I-BLT-01.S
deleted file mode 100644
index 9da92b44c73d4eceef3df7e00383a5bbe78a5da5..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-BLT-01.S
+++ /dev/null
@@ -1,495 +0,0 @@
-# RISC-V Compliance Test BLT-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'BLT'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",blt)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x2, test_1_res
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 0, \
- li x1, 0xcccc; \
- li x31, -0x1; \
- li x16, 0x0; \
- blt x31, x16, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 4, \
- li x1, 0xcccc; \
- li x30, 0x1; \
- li x15, -0x7ff; \
- blt x30, x15, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 8, \
- li x1, 0xcccc; \
- li x29, 0x0; \
- li x14, -0x1; \
- blt x29, x14, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 12, \
- li x1, 0xcccc; \
- li x28, 0x7ff; \
- li x13, -0x1234; \
- blt x28, x13, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 16, \
- li x1, 0xcccc; \
- li x27, 0x0; \
- li x12, 0x80000000; \
- blt x27, x12, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x2, test_2_res
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 0, \
- li x1, 0xcccc; \
- li x26, 0x800; \
- li x11, 0x1234; \
- blt x26, x11, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 4, \
- li x1, 0xcccc; \
- li x25, 0x7654321; \
- li x10, 0xffffffff; \
- blt x25, x10, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 8, \
- li x1, 0xcccc; \
- li x24, 0x7fffffff; \
- li x9, 0x1; \
- blt x24, x9, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 12, \
- li x1, 0xcccc; \
- li x23, 0x1; \
- li x8, 0x7fffffff; \
- blt x23, x8, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 16, \
- li x1, 0xcccc; \
- li x22, 0xffffffff; \
- li x7, 0x7654321; \
- blt x22, x7, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x7, test_3_res
-
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 0, \
- li x1, 0xcccc; \
- li x21, 0x1234; \
- li x6, 0x800; \
- blt x21, x6, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 4, \
- li x1, 0xcccc; \
- li x20, 0x80000000; \
- li x5, 0x0; \
- blt x20, x5, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 8, \
- li x1, 0xcccc; \
- li x19, -0x1234; \
- li x4, 0x7ff; \
- blt x19, x4, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 12, \
- li x1, 0xcccc; \
- li x18, -0x1; \
- li x3, -0x1; \
- blt x18, x3, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 16, \
- li x1, 0xcccc; \
- li x17, -0x7ff; \
- li x2, 0x1; \
- blt x17, x2, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x3, test_4_res
-
-
- // Result = 0
- TEST_CASE(x4, x2, 0x123ab, x3, 0, \
- li x2, 0xcccc; \
- li x16, 0x0; \
- li x1, 0x0; \
- blt x16, x1, 1f; \
- li x2, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 4, \
- li x1, 0xcccc; \
- li x15, -0x1; \
- li x0, 0x0; \
- blt x15, x0, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 8, \
- li x1, 0xcccc; \
- li x14, 0x1; \
- li x31, -0x7ff; \
- blt x14, x31, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 12, \
- li x1, 0xcccc; \
- li x13, 0x0; \
- li x30, -0x1; \
- blt x13, x30, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 16, \
- li x1, 0xcccc; \
- li x12, 0x7ff; \
- li x29, -0x1234; \
- blt x12, x29, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x2, test_5_res
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 0, \
- li x1, 0xcccc; \
- li x11, 0x0; \
- li x28, 0x80000000; \
- blt x11, x28, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 4, \
- li x1, 0xcccc; \
- li x10, 0x800; \
- li x27, 0x1234; \
- blt x10, x27, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 8, \
- li x1, 0xcccc; \
- li x9, 0x7654321; \
- li x26, 0xffffffff; \
- blt x9, x26, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 12, \
- li x1, 0xcccc; \
- li x8, 0x7fffffff; \
- li x25, 0x1; \
- blt x8, x25, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 16, \
- li x1, 0xcccc; \
- li x7, 0x1; \
- li x24, 0x7fffffff; \
- blt x7, x24, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x7, test_6_res
-
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 0, \
- li x1, 0xcccc; \
- li x6, 0xffffffff; \
- li x23, 0x7654321; \
- blt x6, x23, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 4, \
- li x1, 0xcccc; \
- li x5, 0x1234; \
- li x22, 0x800; \
- blt x5, x22, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 8, \
- li x1, 0xcccc; \
- li x4, 0x80000000; \
- li x21, 0x0; \
- blt x4, x21, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 12, \
- li x1, 0xcccc; \
- li x3, -0x1234; \
- li x20, 0x7ff; \
- blt x3, x20, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 16, \
- li x1, 0xcccc; \
- li x2, -0x1; \
- li x19, -0x1; \
- blt x2, x19, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x3, test_7_res
-
-
- // Result = 1
- TEST_CASE(x4, x2, 0xcccc, x3, 0, \
- li x2, 0xcccc; \
- li x1, -0x7ff; \
- li x18, 0x1; \
- blt x1, x18, 1f; \
- li x2, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 4, \
- li x1, 0xcccc; \
- li x0, 0x0; \
- li x17, 0x0; \
- blt x0, x17, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-BLTU-01.S b/riscof/suite/rv32i_m/I/I-BLTU-01.S
deleted file mode 100644
index bf7cc02fa734aaa5428d94e6cc0cc61e28987c8d..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-BLTU-01.S
+++ /dev/null
@@ -1,495 +0,0 @@
-# RISC-V Compliance Test BLTU-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'BLTU'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",bltu)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x2, test_1_res
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 0, \
- li x1, 0xcccc; \
- li x31, -0x1; \
- li x16, 0x0; \
- bltu x31, x16, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 4, \
- li x1, 0xcccc; \
- li x30, 0x1; \
- li x15, -0x7ff; \
- bltu x30, x15, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 8, \
- li x1, 0xcccc; \
- li x29, 0x0; \
- li x14, -0x1; \
- bltu x29, x14, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 12, \
- li x1, 0xcccc; \
- li x28, 0x7ff; \
- li x13, -0x1234; \
- bltu x28, x13, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 16, \
- li x1, 0xcccc; \
- li x27, 0x0; \
- li x12, 0x80000000; \
- bltu x27, x12, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x2, test_2_res
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 0, \
- li x1, 0xcccc; \
- li x26, 0x800; \
- li x11, 0x1234; \
- bltu x26, x11, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 4, \
- li x1, 0xcccc; \
- li x25, 0x7654321; \
- li x10, 0xffffffff; \
- bltu x25, x10, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 8, \
- li x1, 0xcccc; \
- li x24, 0x7fffffff; \
- li x9, 0x1; \
- bltu x24, x9, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 12, \
- li x1, 0xcccc; \
- li x23, 0x1; \
- li x8, 0x7fffffff; \
- bltu x23, x8, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 16, \
- li x1, 0xcccc; \
- li x22, 0xffffffff; \
- li x7, 0x7654321; \
- bltu x22, x7, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x7, test_3_res
-
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 0, \
- li x1, 0xcccc; \
- li x21, 0x1234; \
- li x6, 0x800; \
- bltu x21, x6, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 4, \
- li x1, 0xcccc; \
- li x20, 0x80000000; \
- li x5, 0x0; \
- bltu x20, x5, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 8, \
- li x1, 0xcccc; \
- li x19, -0x1234; \
- li x4, 0x7ff; \
- bltu x19, x4, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 12, \
- li x1, 0xcccc; \
- li x18, -0x1; \
- li x3, -0x1; \
- bltu x18, x3, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 16, \
- li x1, 0xcccc; \
- li x17, -0x7ff; \
- li x2, 0x1; \
- bltu x17, x2, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x3, test_4_res
-
-
- // Result = 0
- TEST_CASE(x4, x2, 0x123ab, x3, 0, \
- li x2, 0xcccc; \
- li x16, 0x0; \
- li x1, 0x0; \
- bltu x16, x1, 1f; \
- li x2, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 4, \
- li x1, 0xcccc; \
- li x15, -0x1; \
- li x0, 0x0; \
- bltu x15, x0, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 8, \
- li x1, 0xcccc; \
- li x14, 0x1; \
- li x31, -0x7ff; \
- bltu x14, x31, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 12, \
- li x1, 0xcccc; \
- li x13, 0x0; \
- li x30, -0x1; \
- bltu x13, x30, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 16, \
- li x1, 0xcccc; \
- li x12, 0x7ff; \
- li x29, -0x1234; \
- bltu x12, x29, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x2, test_5_res
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 0, \
- li x1, 0xcccc; \
- li x11, 0x0; \
- li x28, 0x80000000; \
- bltu x11, x28, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 4, \
- li x1, 0xcccc; \
- li x10, 0x800; \
- li x27, 0x1234; \
- bltu x10, x27, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 8, \
- li x1, 0xcccc; \
- li x9, 0x7654321; \
- li x26, 0xffffffff; \
- bltu x9, x26, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0x123ab, x2, 12, \
- li x1, 0xcccc; \
- li x8, 0x7fffffff; \
- li x25, 0x1; \
- bltu x8, x25, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 16, \
- li x1, 0xcccc; \
- li x7, 0x1; \
- li x24, 0x7fffffff; \
- bltu x7, x24, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x7, test_6_res
-
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 0, \
- li x1, 0xcccc; \
- li x6, 0xffffffff; \
- li x23, 0x7654321; \
- bltu x6, x23, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 4, \
- li x1, 0xcccc; \
- li x5, 0x1234; \
- li x22, 0x800; \
- bltu x5, x22, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 8, \
- li x1, 0xcccc; \
- li x4, 0x80000000; \
- li x21, 0x0; \
- bltu x4, x21, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 12, \
- li x1, 0xcccc; \
- li x3, -0x1234; \
- li x20, 0x7ff; \
- bltu x3, x20, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 16, \
- li x1, 0xcccc; \
- li x2, -0x1; \
- li x19, -0x1; \
- bltu x2, x19, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x3, test_7_res
-
-
- // Result = 0
- TEST_CASE(x4, x2, 0x123ab, x3, 0, \
- li x2, 0xcccc; \
- li x1, -0x7ff; \
- li x18, 0x1; \
- bltu x1, x18, 1f; \
- li x2, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 4, \
- li x1, 0xcccc; \
- li x0, 0x0; \
- li x17, 0x0; \
- bltu x0, x17, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-BNE-01.S b/riscof/suite/rv32i_m/I/I-BNE-01.S
deleted file mode 100644
index 2ffab9a850a424f40bcf550026b684a46081c8f6..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-BNE-01.S
+++ /dev/null
@@ -1,495 +0,0 @@
-# RISC-V Compliance Test BNE-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'BNE'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",bne)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x2, test_1_res
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 0, \
- li x1, 0xcccc; \
- li x31, -0x1; \
- li x16, 0x0; \
- bne x31, x16, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 4, \
- li x1, 0xcccc; \
- li x30, 0x1; \
- li x15, -0x7ff; \
- bne x30, x15, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 8, \
- li x1, 0xcccc; \
- li x29, 0x0; \
- li x14, -0x1; \
- bne x29, x14, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 12, \
- li x1, 0xcccc; \
- li x28, 0x7ff; \
- li x13, -0x1234; \
- bne x28, x13, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 16, \
- li x1, 0xcccc; \
- li x27, 0x0; \
- li x12, 0x80000000; \
- bne x27, x12, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x2, test_2_res
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 0, \
- li x1, 0xcccc; \
- li x26, 0x800; \
- li x11, 0x1234; \
- bne x26, x11, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 4, \
- li x1, 0xcccc; \
- li x25, 0x7654321; \
- li x10, 0xffffffff; \
- bne x25, x10, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 8, \
- li x1, 0xcccc; \
- li x24, 0x7fffffff; \
- li x9, 0x1; \
- bne x24, x9, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 12, \
- li x1, 0xcccc; \
- li x23, 0x1; \
- li x8, 0x7fffffff; \
- bne x23, x8, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 16, \
- li x1, 0xcccc; \
- li x22, 0xffffffff; \
- li x7, 0x7654321; \
- bne x22, x7, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x7, test_3_res
-
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 0, \
- li x1, 0xcccc; \
- li x21, 0x1234; \
- li x6, 0x800; \
- bne x21, x6, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 4, \
- li x1, 0xcccc; \
- li x20, 0x80000000; \
- li x5, 0x0; \
- bne x20, x5, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 8, \
- li x1, 0xcccc; \
- li x19, -0x1234; \
- li x4, 0x7ff; \
- bne x19, x4, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 12, \
- li x1, 0xcccc; \
- li x18, -0x1; \
- li x3, -0x1; \
- bne x18, x3, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 16, \
- li x1, 0xcccc; \
- li x17, -0x7ff; \
- li x2, 0x1; \
- bne x17, x2, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x3, test_4_res
-
-
- // Result = 0
- TEST_CASE(x4, x2, 0x123ab, x3, 0, \
- li x2, 0xcccc; \
- li x16, 0x0; \
- li x1, 0x0; \
- bne x16, x1, 1f; \
- li x2, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 4, \
- li x1, 0xcccc; \
- li x15, -0x1; \
- li x0, 0x0; \
- bne x15, x0, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 8, \
- li x1, 0xcccc; \
- li x14, 0x1; \
- li x31, -0x7ff; \
- bne x14, x31, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 12, \
- li x1, 0xcccc; \
- li x13, 0x0; \
- li x30, -0x1; \
- bne x13, x30, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x4, x1, 0xcccc, x3, 16, \
- li x1, 0xcccc; \
- li x12, 0x7ff; \
- li x29, -0x1234; \
- bne x12, x29, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x2, test_5_res
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 0, \
- li x1, 0xcccc; \
- li x11, 0x0; \
- li x28, 0x80000000; \
- bne x11, x28, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 4, \
- li x1, 0xcccc; \
- li x10, 0x800; \
- li x27, 0x1234; \
- bne x10, x27, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 8, \
- li x1, 0xcccc; \
- li x9, 0x7654321; \
- li x26, 0xffffffff; \
- bne x9, x26, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 12, \
- li x1, 0xcccc; \
- li x8, 0x7fffffff; \
- li x25, 0x1; \
- bne x8, x25, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 1
- TEST_CASE(x3, x1, 0xcccc, x2, 16, \
- li x1, 0xcccc; \
- li x7, 0x1; \
- li x24, 0x7fffffff; \
- bne x7, x24, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x7, test_6_res
-
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 0, \
- li x1, 0xcccc; \
- li x6, 0xffffffff; \
- li x23, 0x7654321; \
- bne x6, x23, 1f; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 4, \
- li x1, 0xcccc; \
- li x5, 0x1234; \
- li x22, 0x800; \
- bne x5, x22, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 8, \
- li x1, 0xcccc; \
- li x4, 0x80000000; \
- li x21, 0x0; \
- bne x4, x21, 2b; \
- li x1, 0x123ab; \
-4: \
- )
-
-
- // Result = 1
- TEST_CASE(x8, x1, 0xcccc, x7, 12, \
- li x1, 0xcccc; \
- li x3, -0x1234; \
- li x20, 0x7ff; \
- bne x3, x20, 4f; \
- li x1, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x8, x1, 0x123ab, x7, 16, \
- li x1, 0xcccc; \
- li x2, -0x1; \
- li x19, -0x1; \
- bne x2, x19, 5f; \
- li x1, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x3, test_7_res
-
-
- // Result = 1
- TEST_CASE(x4, x2, 0xcccc, x3, 0, \
- li x2, 0xcccc; \
- li x1, -0x7ff; \
- li x18, 0x1; \
- bne x1, x18, 1f; \
- li x2, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x4, x1, 0x123ab, x3, 4, \
- li x1, 0xcccc; \
- li x0, 0x0; \
- li x17, 0x0; \
- bne x0, x17, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-DELAY_SLOTS-01.S b/riscof/suite/rv32i_m/I/I-DELAY_SLOTS-01.S
deleted file mode 100644
index f6f636e3749bfb0335349c1ec5ccc129cb1b56e4..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-DELAY_SLOTS-01.S
+++ /dev/null
@@ -1,266 +0,0 @@
-# RISC-V Compliance Test I-DELAY_SLOTS-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing delay slots of jump and branch instructions.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", nop)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - test JAL\n");
-
- # Address for test results
- la x1, test_A1_res
-
- # Test
- li x2, 0x11111111
- jal x0, 1f
- li x2, 0
-1:
-
- # Store results
- sw x2, 0(x1)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x2, 0x11111111)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - test JALR\n");
-
- # Address for test results
- la x1, test_A2_res
-
- # Test
- li x2, 0x22222222
- la x4, 1f
- jalr x0, x4, 0
- li x2, 0
-1:
-
- # Store results
- sw x2, 0(x1)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x2, 0x22222222)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part B1 - test BEQ\n");
-
- # Address for test results
- la x1, test_B1_res
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- li x2, 0x33333333
- beq x5, x5, 1f
- li x2, 0
-1:
-
- # Store results
- sw x2, 0(x1)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x2, 0x33333333)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A3 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part B2 - test BNE\n");
-
- # Address for test results
- la x1, test_B2_res
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- li x2, 0x44444444
- bne x5, x6, 1f
- li x2, 0
-1:
-
- # Store results
- sw x2, 0(x1)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x2, 0x44444444)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A4 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part B3 - test BLT\n");
-
- # Address for test results
- la x1, test_B3_res
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- li x2, 0x55555555
- blt x5, x6, 1f
- li x2, 0
-1:
-
- # Store results
- sw x2, 0(x1)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x2, 0x55555555)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A5 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part B4 - test BLTU\n");
-
- # Address for test results
- la x1, test_B4_res
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- li x2, 0x66666666
- bltu x5, x6, 1f
- li x2, 0
-1:
-
- # Store results
- sw x2, 0(x1)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x2, 0x66666666)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part B - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part B5 - test BGE\n");
-
- # Address for test results
- la x1, test_B5_res
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- li x2, 0x77777777
- bge x6, x5, 1f
- li x2, 0
-1:
-
- # Store results
- sw x2, 0(x1)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x2, 0x77777777)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part C - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part B6 - test BGEU\n");
-
- # Address for test results
- la x1, test_B6_res
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- li x2, 0x88888888
- bgeu x6, x5, 1f
- li x2, 0
-1:
-
- # Store results
- sw x2, 0(x1)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x2, 0x88888888)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part D - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A1_res:
- .fill 1, 4, -1
-test_A2_res:
- .fill 1, 4, -1
-test_B1_res:
- .fill 1, 4, -1
-test_B2_res:
- .fill 1, 4, -1
-test_B3_res:
- .fill 1, 4, -1
-test_B4_res:
- .fill 1, 4, -1
-test_B5_res:
- .fill 1, 4, -1
-test_B6_res:
- .fill 1, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/I-ENDIANESS-01.S b/riscof/suite/rv32i_m/I/I-ENDIANESS-01.S
deleted file mode 100644
index 0bc677d1b5051587d62728b617be8995880796d9..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-ENDIANESS-01.S
+++ /dev/null
@@ -1,115 +0,0 @@
-# RISC-V Compliance Test I-ENDIANESS-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing ENDIANESS of RISC-V processor.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", lui, lbu, lw)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A - test loading word by LW, LH, LB\n");
-
- # Addresses for test data and results
- la x16, test_A_data
- la x17, test_A_res
-
- # Test
- lw x1, 0(x16)
- lhu x2, 0(x16)
- lhu x3, 2(x16)
- lbu x4, -1(x16)
- lbu x5, 0(x16)
- lbu x6, 1(x16)
- lbu x7, 2(x16)
- lbu x8, 3(x16)
-
- # Store results
- sw x1, 0(x17)
- sw x2, 4(x17)
- sw x3, 8(x17)
- sw x4, 12(x17)
- sw x5, 16(x17)
- sw x6, 20(x17)
- sw x7, 24(x17)
- sw x8, 28(x17)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x17, x1, 0x01234567)
- RVMODEL_IO_ASSERT_GPR_EQ(x17, x2, 0x00004567)
- RVMODEL_IO_ASSERT_GPR_EQ(x17, x3, 0x00000123)
- RVMODEL_IO_ASSERT_GPR_EQ(x17, x4, 0x00000089)
- RVMODEL_IO_ASSERT_GPR_EQ(x17, x5, 0x00000067)
- RVMODEL_IO_ASSERT_GPR_EQ(x17, x6, 0x00000045)
- RVMODEL_IO_ASSERT_GPR_EQ(x17, x7, 0x00000023)
- RVMODEL_IO_ASSERT_GPR_EQ(x17, x8, 0x00000001)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
- .word 0x89ABCDEF
-test_A_data:
- .word 0x01234567
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A_res:
- .fill 8, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/I-IO-01.S b/riscof/suite/rv32i_m/I/I-IO-01.S
deleted file mode 100644
index 5df97fe4a6e40b4a030d78b0ca862ffc45260c48..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-IO-01.S
+++ /dev/null
@@ -1,429 +0,0 @@
-# RISC-V Compliance Test I-IO-01
-#
-# Additions Copyright (c) 2005-2018 Imperas Software Ltd., www.imperas.com
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction IO-S.
-
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region.
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", lui, add, addi, ori, xori, slli)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - general test of value 0 with 0, 1, -1, MIN, MAX register values\n");
-
- # Addresses for test data and results
- la x1, test_A1_data
- la x2, test_A1_res
-
- # Load testdata
- lw x3, 0(x1)
-
- # Register initialization
- li x4, 0
- li x5, 1
- li x6, -1
- li x7, 0x7FFFFFFF
- li x8, 0x80000000
-
- # Test
- add x4, x3, x4
- add x5, x3, x5
- add x6, x3, x6
- add x7, x3, x7
- add x8, x3, x8
-
- # Store results
- sw x3, 0(x2)
- sw x4, 4(x2)
- sw x5, 8(x2)
- sw x6, 12(x2)
- sw x7, 16(x2)
- sw x8, 20(x2)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000001)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xFFFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x7FFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x80000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - general test of value 1 with 0, 1, -1, MIN, MAX register values\n");
-
- # Addresses for test data and results
- la x1, test_A2_data
- la x2, test_A2_res
-
- # Load testdata
- lw x8, 0(x1)
-
- # Register initialization
- li x9, 0
- li x10, 1
- li x11, -1
- li x12, 0x7FFFFFFF
- li x13, 0x80000000
-
- # Test
- add x9, x8, x9
- add x10, x8, x10
- add x11, x8, x11
- add x12, x8, x12
- add x13, x8, x13
-
- # Store results
- sw x8, 0(x2)
- sw x9, 4(x2)
- sw x10, 8(x2)
- sw x11, 12(x2)
- sw x12, 16(x2)
- sw x13, 20(x2)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000001)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000001)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000002)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x80000001)
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A3 - general test of value -1 with 0, 1, -1, MIN, MAX register values\n");
-
- # Addresses for test data and results
- la x1, test_A3_data
- la x2, test_A3_res
-
- # Load testdata
- lw x13, 0(x1)
-
- # Register initialization
- li x14, 0
- li x15, 1
- li x16, -1
- li x17, 0x7FFFFFFF
- li x18, 0x80000000
-
- # Test
- add x14, x13, x14
- add x15, x13, x15
- add x16, x13, x16
- add x17, x13, x17
- add x18, x13, x18
-
- # Store results
- sw x13, 0(x2)
- sw x14, 4(x2)
- sw x15, 8(x2)
- sw x16, 12(x2)
- sw x17, 16(x2)
- sw x18, 20(x2)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xFFFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0xFFFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x15, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x16, 0xFFFFFFFE)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x7FFFFFFE)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x7FFFFFFF)
- RVMODEL_IO_WRITE_STR(x31, "# Test part A3 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A4 - general test of value 0x7FFFFFFF with 0, 1, -1, MIN, MAX register values\n");
-
- # Addresses for test data and results
- la x1, test_A4_data
- la x2, test_A4_res
-
- # Load testdata
- lw x18, 0(x1)
-
- # Register initialization
- li x19, 0
- li x20, 1
- li x21, -1
- li x22, 0x7FFFFFFF
- li x23, 0x80000000
-
- # Test execution
- add x19, x18, x19
- add x20, x18, x20
- add x21, x18, x21
- add x22, x18, x22
- add x23, x18, x23
-
- # Store results
- sw x18, 0(x2)
- sw x19, 4(x2)
- sw x20, 8(x2)
- sw x21, 12(x2)
- sw x22, 16(x2)
- sw x23, 20(x2)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x7FFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x7FFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x7FFFFFFE)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xFFFFFFFE)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xFFFFFFFF)
- RVMODEL_IO_WRITE_STR(x31, "# Test part A4 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A5 - general test of value 0x80000000 with 0, 1, -1, MIN, MAX register values\n");
-
- # Addresses for test data and results
- la x1, test_A5_data
- la x2, test_A5_res
-
- # Load testdata
- lw x23, 0(x1)
-
- # Register initialization
- li x24, 0
- li x25, 1
- li x26, -1
- li x27, 0x7FFFFFFF
- li x28, 0x80000000
-
- # Test
- add x24, x23, x24
- add x25, x23, x25
- add x26, x23, x26
- add x27, x23, x27
- add x28, x23, x28
-
- # Store results
- sw x23, 0(x2)
- sw x24, 4(x2)
- sw x25, 8(x2)
- sw x26, 12(x2)
- sw x27, 16(x2)
- sw x28, 20(x2)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x80000001)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x7FFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xFFFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test part A5 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part B - testing forwarding between instructions\n");
-
- # Addresses for test data and results
- la x25, test_B_data
- la x26, test_B_res
-
- # Load testdata
- lw x28, 0(x25)
-
- # Register initialization
- li x27, 0x1
-
- # Test
- add x29, x28, x27
- add x30, x29, x27
- add x31, x30, x27
- add x1, x31, x27
- add x2, x1, x27
- add x3, x2, x27
-
- # store results
- sw x27, 0(x26)
- sw x28, 4(x26)
- sw x29, 8(x26)
- sw x30, 12(x26)
- sw x31, 16(x26)
- sw x1, 20(x26)
- sw x2, 24(x26)
- sw x3, 28(x26)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x27, 0x00000001)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x28, 0x0000ABCD)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x29, 0x0000ABCE)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x30, 0x0000ABCF)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x31, 0x0000ABD0)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x1, 0x0000ABD1)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x2, 0x0000ABD2)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x3, 0x0000ABD3)
- RVMODEL_IO_WRITE_STR(x31, "# Test part B - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part C - testing writing to x0\n");
-
- # Addresses for test data and results
- la x1, test_C_data
- la x2, test_C_res
-
- # Load testdata
- lw x28, 0(x1)
-
- # Register initialization
- li x27, 0xF7FF8818
-
- # Test
- add x0, x28, x27
-
- # store results
- sw x0, 0(x2)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test part C - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part D - testing forwarding throught x0\n");
-
- # Addresses for test data and results
- la x1, test_D_data
- la x2, test_D_res
-
- # Load testdata
- lw x28, 0(x1)
-
- # Register initialization
- li x27, 0xF7FF8818
-
- # Test
- add x0, x28, x27
- add x5, x0, x0
-
- # store results
- sw x0, 0(x2)
- sw x5, 4(x2)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
- //RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test part D - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part E - testing moving (add with x0)\n");
-
- # Addresses for test data and results
- la x1, test_E_data
- la x2, test_E_res
-
- # Load testdata
- lw x3, 0(x1)
-
- # Test
- add x4, x3, x0
- add x5, x4, x0
- add x6, x0, x5
- add x14, x6, x0
- add x15, x14, x0
- add x16, x15, x0
- add x25, x0, x16
- add x26, x0, x25
- add x27, x26, x0
-
- # Store results
- sw x4, 0(x2)
- sw x26, 4(x2)
- sw x27, 8(x2)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x36925814)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x36925814)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x36925814)
- RVMODEL_IO_WRITE_STR(x31, "# Test part E - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-test_A1_data:
- .word 0
-test_A2_data:
- .word 1
-test_A3_data:
- .word -1
-test_A4_data:
- .word 0x7FFFFFFF
-test_A5_data:
- .word 0x80000000
-test_B_data:
- .word 0x0000ABCD
-test_C_data:
- .word 0x12345678
-test_D_data:
- .word 0xFEDCBA98
-test_E_data:
- .word 0x36925814
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_A1_res:
- .fill 6, 4, -1
-test_A2_res:
- .fill 6, 4, -1
-test_A3_res:
- .fill 6, 4, -1
-test_A4_res:
- .fill 6, 4, -1
-test_A5_res:
- .fill 6, 4, -1
-test_B_res:
- .fill 8, 4, -1
-test_C_res:
- .fill 1, 4, -1
-test_D_res:
- .fill 2, 4, -1
-test_E_res:
- .fill 3, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/I-JAL-01.S b/riscof/suite/rv32i_m/I/I-JAL-01.S
deleted file mode 100644
index a04893383ee94a33d1cf8dcd4445882426a35fc0..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-JAL-01.S
+++ /dev/null
@@ -1,431 +0,0 @@
-# RISC-V Compliance Test JAL-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'JAL'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",jal)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
-
- // Result = 0
- TEST_CASE(x6, x0, 0, x5, 0, \
- li x0, 0xcccc; \
- jal x31, 1f; \
- li x0, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x6, x1, 0xcccc, x5, 4, \
- li x1, 0xcccc; \
- jal x30, 2f; \
- li x1, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x6, x2, 0xcccc, x5, 8, \
- li x2, 0xcccc; \
- jal x29, 2b; \
- li x2, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x6, x3, 0xcccc, x5, 12, \
- li x3, 0xcccc; \
- jal x28, 4f; \
- li x3, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x6, x4, 0xcccc, x5, 16, \
- li x4, 0xcccc; \
- jal x27, 5f; \
- li x4, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
-
- // Result = 0
- TEST_CASE(x2, x5, 0xcccc, x1, 0, \
- li x5, 0xcccc; \
- jal x26, 1f; \
- li x5, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x2, x6, 0xcccc, x1, 4, \
- li x6, 0xcccc; \
- jal x25, 2f; \
- li x6, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x2, x7, 0xcccc, x1, 8, \
- li x7, 0xcccc; \
- jal x24, 2b; \
- li x7, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x2, x8, 0xcccc, x1, 12, \
- li x8, 0xcccc; \
- jal x23, 4f; \
- li x8, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x2, x9, 0xcccc, x1, 16, \
- li x9, 0xcccc; \
- jal x22, 5f; \
- li x9, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
-
- // Result = 0
- TEST_CASE(x7, x10, 0xcccc, x1, 0, \
- li x10, 0xcccc; \
- jal x21, 1f; \
- li x10, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x7, x11, 0xcccc, x1, 4, \
- li x11, 0xcccc; \
- jal x20, 2f; \
- li x11, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x7, x12, 0xcccc, x1, 8, \
- li x12, 0xcccc; \
- jal x19, 2b; \
- li x12, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x7, x13, 0xcccc, x1, 12, \
- li x13, 0xcccc; \
- jal x18, 4f; \
- li x13, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x7, x14, 0xcccc, x1, 16, \
- li x14, 0xcccc; \
- jal x17, 5f; \
- li x14, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
-
- // Result = 0
- TEST_CASE(x3, x15, 0xcccc, x2, 0, \
- li x15, 0xcccc; \
- jal x16, 1f; \
- li x15, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x3, x16, 0xcccc, x2, 4, \
- li x16, 0xcccc; \
- jal x15, 2f; \
- li x16, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x3, x17, 0xcccc, x2, 8, \
- li x17, 0xcccc; \
- jal x14, 2b; \
- li x17, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x3, x18, 0xcccc, x2, 12, \
- li x18, 0xcccc; \
- jal x13, 4f; \
- li x18, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x3, x19, 0xcccc, x2, 16, \
- li x19, 0xcccc; \
- jal x12, 5f; \
- li x19, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
-
- // Result = 0
- TEST_CASE(x2, x20, 0xcccc, x1, 0, \
- li x20, 0xcccc; \
- jal x11, 1f; \
- li x20, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x2, x21, 0xcccc, x1, 4, \
- li x21, 0xcccc; \
- jal x10, 2f; \
- li x21, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x2, x22, 0xcccc, x1, 8, \
- li x22, 0xcccc; \
- jal x9, 2b; \
- li x22, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x2, x23, 0xcccc, x1, 12, \
- li x23, 0xcccc; \
- jal x8, 4f; \
- li x23, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x2, x24, 0xcccc, x1, 16, \
- li x24, 0xcccc; \
- jal x7, 5f; \
- li x24, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
-
- // Result = 0
- TEST_CASE(x7, x25, 0xcccc, x1, 0, \
- li x25, 0xcccc; \
- jal x6, 1f; \
- li x25, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x7, x26, 0xcccc, x1, 4, \
- li x26, 0xcccc; \
- jal x5, 2f; \
- li x26, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x7, x27, 0xcccc, x1, 8, \
- li x27, 0xcccc; \
- jal x4, 2b; \
- li x27, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x7, x28, 0xcccc, x1, 12, \
- li x28, 0xcccc; \
- jal x3, 4f; \
- li x28, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x7, x29, 0xcccc, x1, 16, \
- li x29, 0xcccc; \
- jal x2, 5f; \
- li x29, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
-
- // Result = 0
- TEST_CASE(x3, x30, 0xcccc, x2, 0, \
- li x30, 0xcccc; \
- jal x1, 1f; \
- li x30, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x3, x31, 0xcccc, x2, 4, \
- li x31, 0xcccc; \
- jal x0, 2f; \
- li x31, 0x123ab; \
-2: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-JALR-01.S b/riscof/suite/rv32i_m/I/I-JALR-01.S
deleted file mode 100644
index 92acd59ab21252adc6861d5e6eb10dfd73006005..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-JALR-01.S
+++ /dev/null
@@ -1,463 +0,0 @@
-# RISC-V Compliance Test JALR-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'JALR'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",jalr)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
-
- // Result = 0
- TEST_CASE(x6, x31, 0xcccc, x5, 0, \
- li x31, 0xcccc; \
- la x16, 1f - 0; \
- jalr x0, x16, 0; \
- li x31, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x6, x30, 0xcccc, x5, 4, \
- li x30, 0xcccc; \
- la x15, 2f - 1; \
- jalr x1, x15, 1; \
- li x30, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x6, x29, 0xcccc, x5, 8, \
- li x29, 0xcccc; \
- la x14, 2b + 1; \
- jalr x2, x14, -1; \
- li x29, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x6, x28, 0xcccc, x5, 12, \
- li x28, 0xcccc; \
- la x13, 4f - 4; \
- jalr x3, x13, 4; \
- li x28, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x6, x27, 0xcccc, x5, 16, \
- li x27, 0xcccc; \
- la x12, 5f - 2; \
- jalr x4, x12, 2; \
- li x27, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
-
- // Result = 0
- TEST_CASE(x2, x26, 0xcccc, x1, 0, \
- li x26, 0xcccc; \
- la x11, 1f + 4; \
- jalr x5, x11, -4; \
- li x26, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x2, x25, 0xcccc, x1, 4, \
- li x25, 0xcccc; \
- la x10, 2f - 3; \
- jalr x6, x10, 3; \
- li x25, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x2, x24, 0xcccc, x1, 8, \
- li x24, 0xcccc; \
- la x9, 2b + 2; \
- jalr x7, x9, -2; \
- li x24, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x2, x23, 0xcccc, x1, 12, \
- li x23, 0xcccc; \
- la x8, 4f - 0; \
- jalr x8, x8, 0; \
- li x23, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x2, x22, 0xcccc, x1, 16, \
- li x22, 0xcccc; \
- la x7, 5f - 1; \
- jalr x9, x7, 1; \
- li x22, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
-
- // Result = 0
- TEST_CASE(x7, x21, 0xcccc, x1, 0, \
- li x21, 0xcccc; \
- la x6, 1f + 1; \
- jalr x10, x6, -1; \
- li x21, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x7, x20, 0xcccc, x1, 4, \
- li x20, 0xcccc; \
- la x5, 2f - 4; \
- jalr x11, x5, 4; \
- li x20, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x7, x19, 0xcccc, x1, 8, \
- li x19, 0xcccc; \
- la x4, 2b - 2; \
- jalr x12, x4, 2; \
- li x19, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x7, x18, 0xcccc, x1, 12, \
- li x18, 0xcccc; \
- la x3, 4f + 4; \
- jalr x13, x3, -4; \
- li x18, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x7, x17, 0xcccc, x1, 16, \
- li x17, 0xcccc; \
- la x2, 5f - 3; \
- jalr x14, x2, 3; \
- li x17, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
-
- // Result = 0
- TEST_CASE(x3, x16, 0xcccc, x2, 0, \
- li x16, 0xcccc; \
- la x1, 1f + 2; \
- jalr x15, x1, -2; \
- li x16, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x3, x15, 0xcccc, x2, 4, \
- li x15, 0xcccc; \
- la x1, 2f - 0; \
- jalr x16, x1, 0; \
- li x15, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x3, x14, 0xcccc, x2, 8, \
- li x14, 0xcccc; \
- la x31, 2b - 1; \
- jalr x17, x31, 1; \
- li x14, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x3, x13, 0xcccc, x2, 12, \
- li x13, 0xcccc; \
- la x30, 4f + 1; \
- jalr x18, x30, -1; \
- li x13, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x3, x12, 0xcccc, x2, 16, \
- li x12, 0xcccc; \
- la x29, 5f - 4; \
- jalr x19, x29, 4; \
- li x12, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
-
- // Result = 0
- TEST_CASE(x2, x11, 0xcccc, x1, 0, \
- li x11, 0xcccc; \
- la x28, 1f - 2; \
- jalr x20, x28, 2; \
- li x11, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x2, x10, 0xcccc, x1, 4, \
- li x10, 0xcccc; \
- la x27, 2f + 4; \
- jalr x21, x27, -4; \
- li x10, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x2, x9, 0xcccc, x1, 8, \
- li x9, 0xcccc; \
- la x26, 2b - 3; \
- jalr x22, x26, 3; \
- li x9, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x2, x8, 0xcccc, x1, 12, \
- li x8, 0xcccc; \
- la x25, 4f + 2; \
- jalr x23, x25, -2; \
- li x8, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x2, x7, 0xcccc, x1, 16, \
- li x7, 0xcccc; \
- la x24, 5f - 0; \
- jalr x24, x24, 0; \
- li x7, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
-
- // Result = 0
- TEST_CASE(x7, x6, 0xcccc, x1, 0, \
- li x6, 0xcccc; \
- la x23, 1f - 1; \
- jalr x25, x23, 1; \
- li x6, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x7, x5, 0xcccc, x1, 4, \
- li x5, 0xcccc; \
- la x22, 2f + 1; \
- jalr x26, x22, -1; \
- li x5, 0x123ab; \
-2: \
- )
-
-
- jal x0, 3f
-2:
- jal x0, 4f
-3:
- // Result = 0
- TEST_CASE(x7, x4, 0xcccc, x1, 8, \
- li x4, 0xcccc; \
- la x21, 2b - 4; \
- jalr x27, x21, 4; \
- li x4, 0x123ab; \
-4: \
- )
-
-
- // Result = 0
- TEST_CASE(x7, x3, 0xcccc, x1, 12, \
- li x3, 0xcccc; \
- la x20, 4f - 2; \
- jalr x28, x20, 2; \
- li x3, 0x123ab; \
-4: \
- )
-
- // Result = 0
- TEST_CASE(x7, x2, 0xcccc, x1, 16, \
- li x2, 0xcccc; \
- la x19, 5f + 4; \
- jalr x29, x19, -4; \
- li x2, 0x123ab; \
-5: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
-
- // Result = 0
- TEST_CASE(x3, x1, 0xcccc, x2, 0, \
- li x1, 0xcccc; \
- la x18, 1f - 3; \
- jalr x30, x18, 3; \
- li x1, 0x123ab; \
-1: \
- )
-
- // Result = 0
- TEST_CASE(x3, x0, 0, x2, 4, \
- li x0, 0xcccc; \
- la x17, 2f + 2; \
- jalr x31, x17, -2; \
- li x0, 0x123ab; \
-2: \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-LB-01.S b/riscof/suite/rv32i_m/I/I-LB-01.S
deleted file mode 100644
index 1df5c1d50e27ca091f4951d3f5d2379aba8b190e..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-LB-01.S
+++ /dev/null
@@ -1,283 +0,0 @@
-# RISC-V Compliance Test LB-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'LB'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",lb-align)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # Addresses for test data and results
- la x5, test_1_res
-
- TEST_CASE(x7, x0, 0x0, x5, 0, \
- la x31, test_data; \
- lb x0, 0x0(x31); \
- )
- TEST_CASE(x7, x1, 0xffffffbb, x5, 4, \
- la x30, test_data; \
- lb x1, -0x2(x30); \
- )
- TEST_CASE(x7, x2, 0xffffffdd, x5, 8, \
- la x29, test_data; \
- lb x2, 0x3(x29); \
- )
- TEST_CASE(x7, x3, 0xc, x5, 12, \
- la x28, test_data; \
- lb x3, -0x4(x28); \
- )
- TEST_CASE(x7, x4, 0xd, x5, 16, \
- la x27, test_data; \
- lb x4, 0x2(x27); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # Addresses for test data and results
- la x1, test_2_res
-
- TEST_CASE(x3, x5, 0xfffffff0, x1, 0, \
- la x26, test_data; \
- lb x5, 0x4(x26); \
- )
- TEST_CASE(x3, x6, 0xb, x1, 4, \
- la x25, test_data; \
- lb x6, -0x1(x25); \
- )
- TEST_CASE(x3, x7, 0xe, x1, 8, \
- la x24, test_data; \
- lb x7, 0x1(x24); \
- )
- TEST_CASE(x3, x8, 0xffffffee, x1, 12, \
- la x23, test_data; \
- lb x8, 0x0(x23); \
- )
- TEST_CASE(x3, x9, 0xffffffbb, x1, 16, \
- la x22, test_data; \
- lb x9, -0x2(x22); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # Addresses for test data and results
- la x1, test_3_res
-
- TEST_CASE(x8, x10, 0xffffffdd, x1, 0, \
- la x21, test_data; \
- lb x10, 0x3(x21); \
- )
- TEST_CASE(x8, x11, 0xc, x1, 4, \
- la x20, test_data; \
- lb x11, -0x4(x20); \
- )
- TEST_CASE(x8, x12, 0xd, x1, 8, \
- la x19, test_data; \
- lb x12, 0x2(x19); \
- )
- TEST_CASE(x8, x13, 0xfffffff0, x1, 12, \
- la x18, test_data; \
- lb x13, 0x4(x18); \
- )
- TEST_CASE(x8, x14, 0xb, x1, 16, \
- la x17, test_data; \
- lb x14, -0x1(x17); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # Addresses for test data and results
- la x2, test_4_res
-
- TEST_CASE(x4, x15, 0xe, x2, 0, \
- la x16, test_data; \
- lb x15, 0x1(x16); \
- )
- TEST_CASE(x4, x16, 0xffffffee, x2, 4, \
- la x15, test_data; \
- lb x16, 0x0(x15); \
- )
- TEST_CASE(x4, x17, 0xffffffbb, x2, 8, \
- la x14, test_data; \
- lb x17, -0x2(x14); \
- )
- TEST_CASE(x4, x18, 0xffffffdd, x2, 12, \
- la x13, test_data; \
- lb x18, 0x3(x13); \
- )
- TEST_CASE(x4, x19, 0xc, x2, 16, \
- la x12, test_data; \
- lb x19, -0x4(x12); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # Addresses for test data and results
- la x1, test_5_res
-
- TEST_CASE(x3, x20, 0xd, x1, 0, \
- la x11, test_data; \
- lb x20, 0x2(x11); \
- )
- TEST_CASE(x3, x21, 0xfffffff0, x1, 4, \
- la x10, test_data; \
- lb x21, 0x4(x10); \
- )
- TEST_CASE(x3, x22, 0xb, x1, 8, \
- la x9, test_data; \
- lb x22, -0x1(x9); \
- )
- TEST_CASE(x3, x23, 0xe, x1, 12, \
- la x8, test_data; \
- lb x23, 0x1(x8); \
- )
- TEST_CASE(x3, x24, 0xffffffee, x1, 16, \
- la x7, test_data; \
- lb x24, 0x0(x7); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # Addresses for test data and results
- la x1, test_6_res
-
- TEST_CASE(x8, x25, 0xffffffbb, x1, 0, \
- la x6, test_data; \
- lb x25, -0x2(x6); \
- )
- TEST_CASE(x8, x26, 0xffffffdd, x1, 4, \
- la x5, test_data; \
- lb x26, 0x3(x5); \
- )
- TEST_CASE(x8, x27, 0xc, x1, 8, \
- la x4, test_data; \
- lb x27, -0x4(x4); \
- )
- TEST_CASE(x8, x28, 0xd, x1, 12, \
- la x3, test_data; \
- lb x28, 0x2(x3); \
- )
- TEST_CASE(x8, x29, 0xfffffff0, x1, 16, \
- la x2, test_data; \
- lb x29, 0x4(x2); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # Addresses for test data and results
- la x2, test_7_res
-
- TEST_CASE(x4, x30, 0xb, x2, 0, \
- la x1, test_data; \
- lb x30, -0x1(x1); \
- )
- TEST_CASE(x4, x31, 0xe, x2, 4, \
- la x1, test_data; \
- lb x31, 0x1(x1); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-test_data_start:
-
- .word 0x11f1f222
- .word 0xf33344f4
- .word 0x55f5f666
- .word 0xf77788f8
- .word 0x99090aaa
- .word 0xbbbcc0c
-test_data:
- .word 0xdd0d0eee
- .word 0xfff00f0
- .word 0x12345678
- .word 0x9abcdef0
- .word 0x76543210
- .word 0xfedcba98
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-LBU-01.S b/riscof/suite/rv32i_m/I/I-LBU-01.S
deleted file mode 100644
index a78a752cecdc071228a137346738e91344e935cd..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-LBU-01.S
+++ /dev/null
@@ -1,283 +0,0 @@
-# RISC-V Compliance Test LBU-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'LBU'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",lbu-align)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # Addresses for test data and results
- la x5, test_1_res
-
- TEST_CASE(x7, x0, 0x0, x5, 0, \
- la x31, test_data; \
- lbu x0, 0x0(x31); \
- )
- TEST_CASE(x7, x1, 0xbb, x5, 4, \
- la x30, test_data; \
- lbu x1, -0x2(x30); \
- )
- TEST_CASE(x7, x2, 0xdd, x5, 8, \
- la x29, test_data; \
- lbu x2, 0x3(x29); \
- )
- TEST_CASE(x7, x3, 0xc, x5, 12, \
- la x28, test_data; \
- lbu x3, -0x4(x28); \
- )
- TEST_CASE(x7, x4, 0xd, x5, 16, \
- la x27, test_data; \
- lbu x4, 0x2(x27); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # Addresses for test data and results
- la x1, test_2_res
-
- TEST_CASE(x3, x5, 0xf0, x1, 0, \
- la x26, test_data; \
- lbu x5, 0x4(x26); \
- )
- TEST_CASE(x3, x6, 0xb, x1, 4, \
- la x25, test_data; \
- lbu x6, -0x1(x25); \
- )
- TEST_CASE(x3, x7, 0xe, x1, 8, \
- la x24, test_data; \
- lbu x7, 0x1(x24); \
- )
- TEST_CASE(x3, x8, 0xee, x1, 12, \
- la x23, test_data; \
- lbu x8, 0x0(x23); \
- )
- TEST_CASE(x3, x9, 0xbb, x1, 16, \
- la x22, test_data; \
- lbu x9, -0x2(x22); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # Addresses for test data and results
- la x1, test_3_res
-
- TEST_CASE(x8, x10, 0xdd, x1, 0, \
- la x21, test_data; \
- lbu x10, 0x3(x21); \
- )
- TEST_CASE(x8, x11, 0xc, x1, 4, \
- la x20, test_data; \
- lbu x11, -0x4(x20); \
- )
- TEST_CASE(x8, x12, 0xd, x1, 8, \
- la x19, test_data; \
- lbu x12, 0x2(x19); \
- )
- TEST_CASE(x8, x13, 0xf0, x1, 12, \
- la x18, test_data; \
- lbu x13, 0x4(x18); \
- )
- TEST_CASE(x8, x14, 0xb, x1, 16, \
- la x17, test_data; \
- lbu x14, -0x1(x17); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # Addresses for test data and results
- la x2, test_4_res
-
- TEST_CASE(x4, x15, 0xe, x2, 0, \
- la x16, test_data; \
- lbu x15, 0x1(x16); \
- )
- TEST_CASE(x4, x16, 0xee, x2, 4, \
- la x15, test_data; \
- lbu x16, 0x0(x15); \
- )
- TEST_CASE(x4, x17, 0xbb, x2, 8, \
- la x14, test_data; \
- lbu x17, -0x2(x14); \
- )
- TEST_CASE(x4, x18, 0xdd, x2, 12, \
- la x13, test_data; \
- lbu x18, 0x3(x13); \
- )
- TEST_CASE(x4, x19, 0xc, x2, 16, \
- la x12, test_data; \
- lbu x19, -0x4(x12); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # Addresses for test data and results
- la x1, test_5_res
-
- TEST_CASE(x3, x20, 0xd, x1, 0, \
- la x11, test_data; \
- lbu x20, 0x2(x11); \
- )
- TEST_CASE(x3, x21, 0xf0, x1, 4, \
- la x10, test_data; \
- lbu x21, 0x4(x10); \
- )
- TEST_CASE(x3, x22, 0xb, x1, 8, \
- la x9, test_data; \
- lbu x22, -0x1(x9); \
- )
- TEST_CASE(x3, x23, 0xe, x1, 12, \
- la x8, test_data; \
- lbu x23, 0x1(x8); \
- )
- TEST_CASE(x3, x24, 0xee, x1, 16, \
- la x7, test_data; \
- lbu x24, 0x0(x7); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # Addresses for test data and results
- la x1, test_6_res
-
- TEST_CASE(x8, x25, 0xbb, x1, 0, \
- la x6, test_data; \
- lbu x25, -0x2(x6); \
- )
- TEST_CASE(x8, x26, 0xdd, x1, 4, \
- la x5, test_data; \
- lbu x26, 0x3(x5); \
- )
- TEST_CASE(x8, x27, 0xc, x1, 8, \
- la x4, test_data; \
- lbu x27, -0x4(x4); \
- )
- TEST_CASE(x8, x28, 0xd, x1, 12, \
- la x3, test_data; \
- lbu x28, 0x2(x3); \
- )
- TEST_CASE(x8, x29, 0xf0, x1, 16, \
- la x2, test_data; \
- lbu x29, 0x4(x2); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # Addresses for test data and results
- la x2, test_7_res
-
- TEST_CASE(x4, x30, 0xb, x2, 0, \
- la x1, test_data; \
- lbu x30, -0x1(x1); \
- )
- TEST_CASE(x4, x31, 0xe, x2, 4, \
- la x1, test_data; \
- lbu x31, 0x1(x1); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-test_data_start:
-
- .word 0x11f1f222
- .word 0xf33344f4
- .word 0x55f5f666
- .word 0xf77788f8
- .word 0x99090aaa
- .word 0xbbbcc0c
-test_data:
- .word 0xdd0d0eee
- .word 0xfff00f0
- .word 0x12345678
- .word 0x9abcdef0
- .word 0x76543210
- .word 0xfedcba98
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-LH-01.S b/riscof/suite/rv32i_m/I/I-LH-01.S
deleted file mode 100644
index aa807ce6f5905b170fa310f7414993cc208ef7c0..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-LH-01.S
+++ /dev/null
@@ -1,283 +0,0 @@
-# RISC-V Compliance Test LH-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'LH'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",lh-align)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # Addresses for test data and results
- la x5, test_1_res
-
- TEST_CASE(x7, x0, 0x0, x5, 0, \
- la x31, test_data; \
- lh x0, 0x0(x31); \
- )
- TEST_CASE(x7, x1, 0xbbb, x5, 4, \
- la x30, test_data; \
- lh x1, -0x2(x30); \
- )
- TEST_CASE(x7, x2, 0xffffdd0d, x5, 8, \
- la x29, test_data; \
- lh x2, 0x2(x29); \
- )
- TEST_CASE(x7, x3, 0xffffcc0c, x5, 12, \
- la x28, test_data; \
- lh x3, -0x4(x28); \
- )
- TEST_CASE(x7, x4, 0xffffdd0d, x5, 16, \
- la x27, test_data; \
- lh x4, 0x2(x27); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # Addresses for test data and results
- la x1, test_2_res
-
- TEST_CASE(x3, x5, 0xf0, x1, 0, \
- la x26, test_data; \
- lh x5, 0x4(x26); \
- )
- TEST_CASE(x3, x6, 0xeee, x1, 4, \
- la x25, test_data; \
- lh x6, 0x0(x25); \
- )
- TEST_CASE(x3, x7, 0xeee, x1, 8, \
- la x24, test_data; \
- lh x7, 0x0(x24); \
- )
- TEST_CASE(x3, x8, 0xeee, x1, 12, \
- la x23, test_data; \
- lh x8, 0x0(x23); \
- )
- TEST_CASE(x3, x9, 0xbbb, x1, 16, \
- la x22, test_data; \
- lh x9, -0x2(x22); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # Addresses for test data and results
- la x1, test_3_res
-
- TEST_CASE(x8, x10, 0xffffdd0d, x1, 0, \
- la x21, test_data; \
- lh x10, 0x2(x21); \
- )
- TEST_CASE(x8, x11, 0xffffcc0c, x1, 4, \
- la x20, test_data; \
- lh x11, -0x4(x20); \
- )
- TEST_CASE(x8, x12, 0xffffdd0d, x1, 8, \
- la x19, test_data; \
- lh x12, 0x2(x19); \
- )
- TEST_CASE(x8, x13, 0xf0, x1, 12, \
- la x18, test_data; \
- lh x13, 0x4(x18); \
- )
- TEST_CASE(x8, x14, 0xeee, x1, 16, \
- la x17, test_data; \
- lh x14, 0x0(x17); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # Addresses for test data and results
- la x2, test_4_res
-
- TEST_CASE(x4, x15, 0xeee, x2, 0, \
- la x16, test_data; \
- lh x15, 0x0(x16); \
- )
- TEST_CASE(x4, x16, 0xeee, x2, 4, \
- la x15, test_data; \
- lh x16, 0x0(x15); \
- )
- TEST_CASE(x4, x17, 0xbbb, x2, 8, \
- la x14, test_data; \
- lh x17, -0x2(x14); \
- )
- TEST_CASE(x4, x18, 0xffffdd0d, x2, 12, \
- la x13, test_data; \
- lh x18, 0x2(x13); \
- )
- TEST_CASE(x4, x19, 0xffffcc0c, x2, 16, \
- la x12, test_data; \
- lh x19, -0x4(x12); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # Addresses for test data and results
- la x1, test_5_res
-
- TEST_CASE(x3, x20, 0xffffdd0d, x1, 0, \
- la x11, test_data; \
- lh x20, 0x2(x11); \
- )
- TEST_CASE(x3, x21, 0xf0, x1, 4, \
- la x10, test_data; \
- lh x21, 0x4(x10); \
- )
- TEST_CASE(x3, x22, 0xeee, x1, 8, \
- la x9, test_data; \
- lh x22, 0x0(x9); \
- )
- TEST_CASE(x3, x23, 0xeee, x1, 12, \
- la x8, test_data; \
- lh x23, 0x0(x8); \
- )
- TEST_CASE(x3, x24, 0xeee, x1, 16, \
- la x7, test_data; \
- lh x24, 0x0(x7); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # Addresses for test data and results
- la x1, test_6_res
-
- TEST_CASE(x8, x25, 0xbbb, x1, 0, \
- la x6, test_data; \
- lh x25, -0x2(x6); \
- )
- TEST_CASE(x8, x26, 0xffffdd0d, x1, 4, \
- la x5, test_data; \
- lh x26, 0x2(x5); \
- )
- TEST_CASE(x8, x27, 0xffffcc0c, x1, 8, \
- la x4, test_data; \
- lh x27, -0x4(x4); \
- )
- TEST_CASE(x8, x28, 0xffffdd0d, x1, 12, \
- la x3, test_data; \
- lh x28, 0x2(x3); \
- )
- TEST_CASE(x8, x29, 0xf0, x1, 16, \
- la x2, test_data; \
- lh x29, 0x4(x2); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # Addresses for test data and results
- la x2, test_7_res
-
- TEST_CASE(x4, x30, 0xeee, x2, 0, \
- la x1, test_data; \
- lh x30, 0x0(x1); \
- )
- TEST_CASE(x4, x31, 0xeee, x2, 4, \
- la x1, test_data; \
- lh x31, 0x0(x1); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-test_data_start:
-
- .word 0x11f1f222
- .word 0xf33344f4
- .word 0x55f5f666
- .word 0xf77788f8
- .word 0x99090aaa
- .word 0xbbbcc0c
-test_data:
- .word 0xdd0d0eee
- .word 0xfff00f0
- .word 0x12345678
- .word 0x9abcdef0
- .word 0x76543210
- .word 0xfedcba98
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-LHU-01.S b/riscof/suite/rv32i_m/I/I-LHU-01.S
deleted file mode 100644
index cd9111aa1c392f484342af811e39b73a00d71c01..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-LHU-01.S
+++ /dev/null
@@ -1,283 +0,0 @@
-# RISC-V Compliance Test LHU-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'LHU'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",lhu-align)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # Addresses for test data and results
- la x5, test_1_res
-
- TEST_CASE(x7, x0, 0x0, x5, 0, \
- la x31, test_data; \
- lhu x0, 0x0(x31); \
- )
- TEST_CASE(x7, x1, 0xbbb, x5, 4, \
- la x30, test_data; \
- lhu x1, -0x2(x30); \
- )
- TEST_CASE(x7, x2, 0xdd0d, x5, 8, \
- la x29, test_data; \
- lhu x2, 0x2(x29); \
- )
- TEST_CASE(x7, x3, 0xcc0c, x5, 12, \
- la x28, test_data; \
- lhu x3, -0x4(x28); \
- )
- TEST_CASE(x7, x4, 0xdd0d, x5, 16, \
- la x27, test_data; \
- lhu x4, 0x2(x27); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # Addresses for test data and results
- la x1, test_2_res
-
- TEST_CASE(x3, x5, 0xf0, x1, 0, \
- la x26, test_data; \
- lhu x5, 0x4(x26); \
- )
- TEST_CASE(x3, x6, 0xeee, x1, 4, \
- la x25, test_data; \
- lhu x6, 0x0(x25); \
- )
- TEST_CASE(x3, x7, 0xeee, x1, 8, \
- la x24, test_data; \
- lhu x7, 0x0(x24); \
- )
- TEST_CASE(x3, x8, 0xeee, x1, 12, \
- la x23, test_data; \
- lhu x8, 0x0(x23); \
- )
- TEST_CASE(x3, x9, 0xbbb, x1, 16, \
- la x22, test_data; \
- lhu x9, -0x2(x22); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # Addresses for test data and results
- la x1, test_3_res
-
- TEST_CASE(x8, x10, 0xdd0d, x1, 0, \
- la x21, test_data; \
- lhu x10, 0x2(x21); \
- )
- TEST_CASE(x8, x11, 0xcc0c, x1, 4, \
- la x20, test_data; \
- lhu x11, -0x4(x20); \
- )
- TEST_CASE(x8, x12, 0xdd0d, x1, 8, \
- la x19, test_data; \
- lhu x12, 0x2(x19); \
- )
- TEST_CASE(x8, x13, 0xf0, x1, 12, \
- la x18, test_data; \
- lhu x13, 0x4(x18); \
- )
- TEST_CASE(x8, x14, 0xeee, x1, 16, \
- la x17, test_data; \
- lhu x14, 0x0(x17); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # Addresses for test data and results
- la x2, test_4_res
-
- TEST_CASE(x4, x15, 0xeee, x2, 0, \
- la x16, test_data; \
- lhu x15, 0x0(x16); \
- )
- TEST_CASE(x4, x16, 0xeee, x2, 4, \
- la x15, test_data; \
- lhu x16, 0x0(x15); \
- )
- TEST_CASE(x4, x17, 0xbbb, x2, 8, \
- la x14, test_data; \
- lhu x17, -0x2(x14); \
- )
- TEST_CASE(x4, x18, 0xdd0d, x2, 12, \
- la x13, test_data; \
- lhu x18, 0x2(x13); \
- )
- TEST_CASE(x4, x19, 0xcc0c, x2, 16, \
- la x12, test_data; \
- lhu x19, -0x4(x12); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # Addresses for test data and results
- la x1, test_5_res
-
- TEST_CASE(x3, x20, 0xdd0d, x1, 0, \
- la x11, test_data; \
- lhu x20, 0x2(x11); \
- )
- TEST_CASE(x3, x21, 0xf0, x1, 4, \
- la x10, test_data; \
- lhu x21, 0x4(x10); \
- )
- TEST_CASE(x3, x22, 0xeee, x1, 8, \
- la x9, test_data; \
- lhu x22, 0x0(x9); \
- )
- TEST_CASE(x3, x23, 0xeee, x1, 12, \
- la x8, test_data; \
- lhu x23, 0x0(x8); \
- )
- TEST_CASE(x3, x24, 0xeee, x1, 16, \
- la x7, test_data; \
- lhu x24, 0x0(x7); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # Addresses for test data and results
- la x1, test_6_res
-
- TEST_CASE(x8, x25, 0xbbb, x1, 0, \
- la x6, test_data; \
- lhu x25, -0x2(x6); \
- )
- TEST_CASE(x8, x26, 0xdd0d, x1, 4, \
- la x5, test_data; \
- lhu x26, 0x2(x5); \
- )
- TEST_CASE(x8, x27, 0xcc0c, x1, 8, \
- la x4, test_data; \
- lhu x27, -0x4(x4); \
- )
- TEST_CASE(x8, x28, 0xdd0d, x1, 12, \
- la x3, test_data; \
- lhu x28, 0x2(x3); \
- )
- TEST_CASE(x8, x29, 0xf0, x1, 16, \
- la x2, test_data; \
- lhu x29, 0x4(x2); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # Addresses for test data and results
- la x2, test_7_res
-
- TEST_CASE(x4, x30, 0xeee, x2, 0, \
- la x1, test_data; \
- lhu x30, 0x0(x1); \
- )
- TEST_CASE(x4, x31, 0xeee, x2, 4, \
- la x1, test_data; \
- lhu x31, 0x0(x1); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-test_data_start:
-
- .word 0x11f1f222
- .word 0xf33344f4
- .word 0x55f5f666
- .word 0xf77788f8
- .word 0x99090aaa
- .word 0xbbbcc0c
-test_data:
- .word 0xdd0d0eee
- .word 0xfff00f0
- .word 0x12345678
- .word 0x9abcdef0
- .word 0x76543210
- .word 0xfedcba98
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-LUI-01.S b/riscof/suite/rv32i_m/I/I-LUI-01.S
deleted file mode 100644
index 65744cac4655449f4b34fd654b99c5b4cfad2023..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-LUI-01.S
+++ /dev/null
@@ -1,235 +0,0 @@
-# RISC-V Compliance Test LUI-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'LUI'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",lui)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_CASE(x6, x0, 0x0, x5, 0, \
- lui x0, 0x0; \
- )
- TEST_CASE(x6, x1, 0x0, x5, 4, \
- lui x1, 0x0; \
- )
- TEST_CASE(x6, x2, 0x7ff000, x5, 8, \
- lui x2, 0x7ff; \
- )
- TEST_CASE(x6, x3, 0x1000, x5, 12, \
- lui x3, 0x1; \
- )
- TEST_CASE(x6, x4, 0x1234000, x5, 16, \
- lui x4, 0x1234; \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_CASE(x2, x5, 0x80000000, x1, 0, \
- lui x5, 0x80000; \
- )
- TEST_CASE(x2, x6, 0x1234000, x1, 4, \
- lui x6, 0x1234; \
- )
- TEST_CASE(x2, x7, 0xfffff000, x1, 8, \
- lui x7, 0xfffff; \
- )
- TEST_CASE(x2, x8, 0x1000, x1, 12, \
- lui x8, 0x1; \
- )
- TEST_CASE(x2, x9, 0x7ffff000, x1, 16, \
- lui x9, 0x7ffff; \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_CASE(x7, x10, 0x54321000, x1, 0, \
- lui x10, 0x54321; \
- )
- TEST_CASE(x7, x11, 0x800000, x1, 4, \
- lui x11, 0x800; \
- )
- TEST_CASE(x7, x12, 0x0, x1, 8, \
- lui x12, 0x0; \
- )
- TEST_CASE(x7, x13, 0x7ff000, x1, 12, \
- lui x13, 0x7ff; \
- )
- TEST_CASE(x7, x14, 0x0, x1, 16, \
- lui x14, 0x0; \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_CASE(x3, x15, 0x1000, x2, 0, \
- lui x15, 0x1; \
- )
- TEST_CASE(x3, x16, 0x0, x2, 4, \
- lui x16, 0x0; \
- )
- TEST_CASE(x3, x17, 0x0, x2, 8, \
- lui x17, 0x0; \
- )
- TEST_CASE(x3, x18, 0x7ff000, x2, 12, \
- lui x18, 0x7ff; \
- )
- TEST_CASE(x3, x19, 0x1000, x2, 16, \
- lui x19, 0x1; \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_CASE(x2, x20, 0x1234000, x1, 0, \
- lui x20, 0x1234; \
- )
- TEST_CASE(x2, x21, 0x80000000, x1, 4, \
- lui x21, 0x80000; \
- )
- TEST_CASE(x2, x22, 0x1234000, x1, 8, \
- lui x22, 0x1234; \
- )
- TEST_CASE(x2, x23, 0xfffff000, x1, 12, \
- lui x23, 0xfffff; \
- )
- TEST_CASE(x2, x24, 0x1000, x1, 16, \
- lui x24, 0x1; \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_CASE(x7, x25, 0x7ffff000, x1, 0, \
- lui x25, 0x7ffff; \
- )
- TEST_CASE(x7, x26, 0x54321000, x1, 4, \
- lui x26, 0x54321; \
- )
- TEST_CASE(x7, x27, 0x800000, x1, 8, \
- lui x27, 0x800; \
- )
- TEST_CASE(x7, x28, 0x0, x1, 12, \
- lui x28, 0x0; \
- )
- TEST_CASE(x7, x29, 0x7ff000, x1, 16, \
- lui x29, 0x7ff; \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_CASE(x3, x30, 0x0, x2, 0, \
- lui x30, 0x0; \
- )
- TEST_CASE(x3, x31, 0x1000, x2, 4, \
- lui x31, 0x1; \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-LW-01.S b/riscof/suite/rv32i_m/I/I-LW-01.S
deleted file mode 100644
index ba2a42f0a8a4e736ad0bd1e9e69176c7eaf4732f..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-LW-01.S
+++ /dev/null
@@ -1,283 +0,0 @@
-# RISC-V Compliance Test LW-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'LW'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",lw-align)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # Addresses for test data and results
- la x5, test_1_res
-
- TEST_CASE(x7, x0, 0x0, x5, 0, \
- la x31, test_data; \
- lw x0, 0x0(x31); \
- )
- TEST_CASE(x7, x1, 0xdd0d0eee, x5, 4, \
- la x30, test_data; \
- lw x1, 0x0(x30); \
- )
- TEST_CASE(x7, x2, 0xdd0d0eee, x5, 8, \
- la x29, test_data; \
- lw x2, 0x0(x29); \
- )
- TEST_CASE(x7, x3, 0xbbbcc0c, x5, 12, \
- la x28, test_data; \
- lw x3, -0x4(x28); \
- )
- TEST_CASE(x7, x4, 0xdd0d0eee, x5, 16, \
- la x27, test_data; \
- lw x4, 0x0(x27); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # Addresses for test data and results
- la x1, test_2_res
-
- TEST_CASE(x3, x5, 0xfff00f0, x1, 0, \
- la x26, test_data; \
- lw x5, 0x4(x26); \
- )
- TEST_CASE(x3, x6, 0xdd0d0eee, x1, 4, \
- la x25, test_data; \
- lw x6, 0x0(x25); \
- )
- TEST_CASE(x3, x7, 0xdd0d0eee, x1, 8, \
- la x24, test_data; \
- lw x7, 0x0(x24); \
- )
- TEST_CASE(x3, x8, 0xdd0d0eee, x1, 12, \
- la x23, test_data; \
- lw x8, 0x0(x23); \
- )
- TEST_CASE(x3, x9, 0xdd0d0eee, x1, 16, \
- la x22, test_data; \
- lw x9, 0x0(x22); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # Addresses for test data and results
- la x1, test_3_res
-
- TEST_CASE(x8, x10, 0xdd0d0eee, x1, 0, \
- la x21, test_data; \
- lw x10, 0x0(x21); \
- )
- TEST_CASE(x8, x11, 0xbbbcc0c, x1, 4, \
- la x20, test_data; \
- lw x11, -0x4(x20); \
- )
- TEST_CASE(x8, x12, 0xdd0d0eee, x1, 8, \
- la x19, test_data; \
- lw x12, 0x0(x19); \
- )
- TEST_CASE(x8, x13, 0xfff00f0, x1, 12, \
- la x18, test_data; \
- lw x13, 0x4(x18); \
- )
- TEST_CASE(x8, x14, 0xdd0d0eee, x1, 16, \
- la x17, test_data; \
- lw x14, 0x0(x17); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # Addresses for test data and results
- la x2, test_4_res
-
- TEST_CASE(x4, x15, 0xdd0d0eee, x2, 0, \
- la x16, test_data; \
- lw x15, 0x0(x16); \
- )
- TEST_CASE(x4, x16, 0xdd0d0eee, x2, 4, \
- la x15, test_data; \
- lw x16, 0x0(x15); \
- )
- TEST_CASE(x4, x17, 0xdd0d0eee, x2, 8, \
- la x14, test_data; \
- lw x17, 0x0(x14); \
- )
- TEST_CASE(x4, x18, 0xdd0d0eee, x2, 12, \
- la x13, test_data; \
- lw x18, 0x0(x13); \
- )
- TEST_CASE(x4, x19, 0xbbbcc0c, x2, 16, \
- la x12, test_data; \
- lw x19, -0x4(x12); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # Addresses for test data and results
- la x1, test_5_res
-
- TEST_CASE(x3, x20, 0xdd0d0eee, x1, 0, \
- la x11, test_data; \
- lw x20, 0x0(x11); \
- )
- TEST_CASE(x3, x21, 0xfff00f0, x1, 4, \
- la x10, test_data; \
- lw x21, 0x4(x10); \
- )
- TEST_CASE(x3, x22, 0xdd0d0eee, x1, 8, \
- la x9, test_data; \
- lw x22, 0x0(x9); \
- )
- TEST_CASE(x3, x23, 0xdd0d0eee, x1, 12, \
- la x8, test_data; \
- lw x23, 0x0(x8); \
- )
- TEST_CASE(x3, x24, 0xdd0d0eee, x1, 16, \
- la x7, test_data; \
- lw x24, 0x0(x7); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # Addresses for test data and results
- la x1, test_6_res
-
- TEST_CASE(x8, x25, 0xdd0d0eee, x1, 0, \
- la x6, test_data; \
- lw x25, 0x0(x6); \
- )
- TEST_CASE(x8, x26, 0xdd0d0eee, x1, 4, \
- la x5, test_data; \
- lw x26, 0x0(x5); \
- )
- TEST_CASE(x8, x27, 0xbbbcc0c, x1, 8, \
- la x4, test_data; \
- lw x27, -0x4(x4); \
- )
- TEST_CASE(x8, x28, 0xdd0d0eee, x1, 12, \
- la x3, test_data; \
- lw x28, 0x0(x3); \
- )
- TEST_CASE(x8, x29, 0xfff00f0, x1, 16, \
- la x2, test_data; \
- lw x29, 0x4(x2); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # Addresses for test data and results
- la x2, test_7_res
-
- TEST_CASE(x4, x30, 0xdd0d0eee, x2, 0, \
- la x1, test_data; \
- lw x30, 0x0(x1); \
- )
- TEST_CASE(x4, x31, 0xdd0d0eee, x2, 4, \
- la x1, test_data; \
- lw x31, 0x0(x1); \
- )
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-test_data_start:
-
- .word 0x11f1f222
- .word 0xf33344f4
- .word 0x55f5f666
- .word 0xf77788f8
- .word 0x99090aaa
- .word 0xbbbcc0c
-test_data:
- .word 0xdd0d0eee
- .word 0xfff00f0
- .word 0x12345678
- .word 0x9abcdef0
- .word 0x76543210
- .word 0xfedcba98
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-NOP-01.S b/riscof/suite/rv32i_m/I/I-NOP-01.S
deleted file mode 100644
index a3c9d8ccd65365a637877fc319366ac83575fcb3..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-NOP-01.S
+++ /dev/null
@@ -1,216 +0,0 @@
-# RISC-V Compliance Test I-NOP-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing pseudo instruction NOP.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region.
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",lui, addi, ori, xori, slli)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - general test, instruction should not change any register\n");
-
- # Addresses for test data and results
- la x1, test_A1_res
-
- # Register initialization
- li x2, 2
- li x3, 3
- li x4, 4
- li x5, 5
- li x6, 6
- li x7, 7
- li x8, 8
- li x9, 9
- li x10, 10
- li x11, 11
- li x12, 12
- li x13, 13
- li x14, 14
- li x15, 15
- li x16, 16
- li x17, 17
- li x18, 18
- li x19, 19
- li x20, 20
- li x21, 21
- li x22, 22
- li x23, 23
- li x24, 24
- li x25, 25
- li x26, 26
- li x27, 27
- li x28, 28
- li x29, 29
- li x30, 30
- li x31, 31
-
- #Test
- nop
- nop
- nop
- nop
- nop
- nop
-
- # Store results
- sw x0, 0( x1 )
- sw x2, 4( x1 )
- sw x3, 8( x1 )
- sw x4, 12( x1 )
- sw x5, 16( x1 )
- sw x6, 20( x1 )
- sw x7, 24( x1 )
- sw x8, 28( x1 )
- sw x9, 32( x1 )
- sw x10, 36( x1 )
- sw x11, 40( x1 )
- sw x12, 44( x1 )
- sw x13, 48( x1 )
- sw x14, 52( x1 )
- sw x15, 56( x1 )
- sw x16, 60( x1 )
- sw x17, 64( x1 )
- sw x18, 68( x1 )
- sw x19, 72( x1 )
- sw x20, 76( x1 )
- sw x21, 80( x1 )
- sw x22, 84( x1 )
- sw x23, 88( x1 )
- sw x24, 92( x1 )
- sw x25, 96( x1 )
- sw x26, 100( x1 )
- sw x27, 104( x1 )
- sw x28, 108( x1 )
- sw x29, 112( x1 )
- sw x30, 116( x1 )
- sw x31, 120( x1 )
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x2, 0x00000002)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x3, 0x00000003)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x4, 0x00000004)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x5, 0x00000005)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x6, 0x00000006)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x7, 0x00000007)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x8, 0x00000008)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x9, 0x00000009)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x10, 0x0000000A)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x11, 0x0000000B)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x12, 0x0000000C)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x13, 0x0000000D)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x14, 0x0000000E)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x15, 0x0000000F)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x16, 0x00000010)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x17, 0x00000011)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x18, 0x00000012)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x19, 0x00000013)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x20, 0x00000014)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x21, 0x00000015)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x22, 0x00000016)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x23, 0x00000017)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x24, 0x00000018)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x25, 0x00000019)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x26, 0x0000001A)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x27, 0x0000001B)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x28, 0x0000001C)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x29, 0x0000001D)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x30, 0x0000001E)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x31, 0x0000001F)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - general test, only 5 cycles are executed\n");
-
- # Addresses for test data and results
- la x3, test_A2_res
-
- # Register initialization
- auipc x8, 0
-
- #Test
- nop
- nop
- nop
- nop
- nop
-
- # Store results
- auipc x9, 0
- sub x9, x9, x8
-
- # Store results
- sw x9, 0( x3 )
-
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x9, 0x00000018)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A1_res:
- .fill 31, 4, -1
-test_A2_res:
- .fill 1, 4, -1
-
-RVMODEL_DATA_END # End of test output data region.
diff --git a/riscof/suite/rv32i_m/I/I-OR-01.S b/riscof/suite/rv32i_m/I/I-OR-01.S
deleted file mode 100644
index 412a38148fdf19a53f81fd727edb69ccf2455f86..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-OR-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test OR-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'OR'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",or)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_RR_OP(or, x0, x31, x16, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_RR_OP(or, x1, x30, x15, 0xfffff801, 0x1, -0x7ff, x5, 4, x6) # Testcase 1
- TEST_RR_OP(or, x2, x29, x14, 0xffffffff, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_RR_OP(or, x3, x28, x13, 0xffffefff, 0x7ff, -0x1234, x5, 12, x6) # Testcase 3
- TEST_RR_OP(or, x4, x27, x12, 0x80000000, 0x0, 0x80000000, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_RR_OP(or, x5, x26, x11, 0x1a34, 0x800, 0x1234, x1, 0, x2) # Testcase 5
- TEST_RR_OP(or, x6, x25, x10, 0xffffffff, 0x7654321, 0xffffffff, x1, 4, x2) # Testcase 6
- TEST_RR_OP(or, x7, x24, x9, 0x7fffffff, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_RR_OP(or, x8, x23, x8, 0x7fffffff, 0x1, 0x7fffffff, x1, 12, x2) # Testcase 8
- TEST_RR_OP(or, x9, x22, x7, 0xffffffff, 0xffffffff, 0x7654321, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_RR_OP(or, x10, x21, x6, 0x1a34, 0x1234, 0x800, x1, 0, x7) # Testcase 10
- TEST_RR_OP(or, x11, x20, x5, 0x80000000, 0x80000000, 0x0, x1, 4, x7) # Testcase 11
- TEST_RR_OP(or, x12, x19, x4, 0xffffefff, -0x1234, 0x7ff, x1, 8, x7) # Testcase 12
- TEST_RR_OP(or, x13, x18, x3, 0xffffffff, -0x1, -0x1, x1, 12, x7) # Testcase 13
- TEST_RR_OP(or, x14, x17, x2, 0xfffff801, -0x7ff, 0x1, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_OP(or, x15, x16, x1, 0x0, 0x0, 0x0, x2, 0, x3) # Testcase 15
- TEST_RR_OP(or, x16, x15, x0, 0xffffffff, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_RR_OP(or, x17, x14, x31, 0xfffff801, 0x1, -0x7ff, x2, 8, x3) # Testcase 17
- TEST_RR_OP(or, x18, x13, x30, 0xffffffff, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_RR_OP(or, x19, x12, x29, 0xffffefff, 0x7ff, -0x1234, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_RR_OP(or, x20, x11, x28, 0x80000000, 0x0, 0x80000000, x1, 0, x2) # Testcase 20
- TEST_RR_OP(or, x21, x10, x27, 0x1a34, 0x800, 0x1234, x1, 4, x2) # Testcase 21
- TEST_RR_OP(or, x22, x9, x26, 0xffffffff, 0x7654321, 0xffffffff, x1, 8, x2) # Testcase 22
- TEST_RR_OP(or, x23, x8, x25, 0x7fffffff, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_RR_OP(or, x24, x7, x24, 0x7fffffff, 0x1, 0x7fffffff, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_RR_OP(or, x25, x6, x23, 0xffffffff, 0xffffffff, 0x7654321, x1, 0, x7) # Testcase 25
- TEST_RR_OP(or, x26, x5, x22, 0x1a34, 0x1234, 0x800, x1, 4, x7) # Testcase 26
- TEST_RR_OP(or, x27, x4, x21, 0x80000000, 0x80000000, 0x0, x1, 8, x7) # Testcase 27
- TEST_RR_OP(or, x28, x3, x20, 0xffffefff, -0x1234, 0x7ff, x1, 12, x7) # Testcase 28
- TEST_RR_OP(or, x29, x2, x19, 0xffffffff, -0x1, -0x1, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_RR_OP(or, x30, x1, x18, 0xfffff801, -0x7ff, 0x1, x2, 0, x3) # Testcase 30
- TEST_RR_OP(or, x31, x0, x17, 0x0, 0x0, 0x0, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-ORI-01.S b/riscof/suite/rv32i_m/I/I-ORI-01.S
deleted file mode 100644
index cc0fe6bfd00c32e881f4cc1da251d583cbe40048..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-ORI-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test ORI-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'ORI'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",ori)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_IMM_OP(ori, x0, x31, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_IMM_OP(ori, x1, x30, 0xfffff801, 0x1, -0x7ff, x5, 4, x6) # Testcase 1
- TEST_IMM_OP(ori, x2, x29, 0xffffffff, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_IMM_OP(ori, x3, x28, 0xffffffff, 0x7ff, -0x800, x5, 12, x6) # Testcase 3
- TEST_IMM_OP(ori, x4, x27, 0xfffff800, 0x0, 0x800, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_IMM_OP(ori, x5, x26, 0xfffff800, 0x800, 0x800, x1, 0, x2) # Testcase 5
- TEST_IMM_OP(ori, x6, x25, 0xfffffb21, 0x7654321, 0x800, x1, 4, x2) # Testcase 6
- TEST_IMM_OP(ori, x7, x24, 0x7fffffff, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_IMM_OP(ori, x8, x23, 0xfffff801, 0x1, 0x800, x1, 12, x2) # Testcase 8
- TEST_IMM_OP(ori, x9, x22, 0xffffffff, 0xffffffff, 0x800, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_IMM_OP(ori, x10, x21, 0xfffffa34, 0x1234, 0x800, x1, 0, x7) # Testcase 10
- TEST_IMM_OP(ori, x11, x20, 0x80000000, 0x80000000, 0x0, x1, 4, x7) # Testcase 11
- TEST_IMM_OP(ori, x12, x19, 0xffffefff, -0x1234, 0x7ff, x1, 8, x7) # Testcase 12
- TEST_IMM_OP(ori, x13, x18, 0xffffffff, -0x1, -0x1, x1, 12, x7) # Testcase 13
- TEST_IMM_OP(ori, x14, x17, 0xfffff801, -0x7ff, 0x1, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_IMM_OP(ori, x15, x16, 0x0, 0x0, 0x0, x2, 0, x3) # Testcase 15
- TEST_IMM_OP(ori, x16, x15, 0xffffffff, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_IMM_OP(ori, x17, x14, 0xfffff801, 0x1, -0x7ff, x2, 8, x3) # Testcase 17
- TEST_IMM_OP(ori, x18, x13, 0xffffffff, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_IMM_OP(ori, x19, x12, 0xffffffff, 0x7ff, -0x800, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_IMM_OP(ori, x20, x11, 0xfffff800, 0x0, 0x800, x1, 0, x2) # Testcase 20
- TEST_IMM_OP(ori, x21, x10, 0xfffff800, 0x800, 0x800, x1, 4, x2) # Testcase 21
- TEST_IMM_OP(ori, x22, x9, 0xfffffb21, 0x7654321, 0x800, x1, 8, x2) # Testcase 22
- TEST_IMM_OP(ori, x23, x8, 0x7fffffff, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_IMM_OP(ori, x24, x7, 0xfffff801, 0x1, 0x800, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_IMM_OP(ori, x25, x6, 0xffffffff, 0xffffffff, 0x800, x1, 0, x7) # Testcase 25
- TEST_IMM_OP(ori, x26, x5, 0xfffffa34, 0x1234, 0x800, x1, 4, x7) # Testcase 26
- TEST_IMM_OP(ori, x27, x4, 0x80000000, 0x80000000, 0x0, x1, 8, x7) # Testcase 27
- TEST_IMM_OP(ori, x28, x3, 0xffffefff, -0x1234, 0x7ff, x1, 12, x7) # Testcase 28
- TEST_IMM_OP(ori, x29, x2, 0xffffffff, -0x1, -0x1, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_IMM_OP(ori, x30, x1, 0xfffff801, -0x7ff, 0x1, x2, 0, x3) # Testcase 30
- TEST_IMM_OP(ori, x31, x0, 0x0, 0x0, 0x0, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-RF_size-01.S b/riscof/suite/rv32i_m/I/I-RF_size-01.S
deleted file mode 100644
index f2267ad7762e85febf826a99454fc59a766d194e..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-RF_size-01.S
+++ /dev/null
@@ -1,214 +0,0 @@
-# RISC-V Compliance Test I-RF_size-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing size of register file.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", lui, addi, ori, xori, slli)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - test registers x0 - x15\n");
-
- # Address for test results
- la x16, test_A1_res
-
- # Test
- li x0, 0x42726e6f
- li x1, 0x56333249
- li x2, 0x2d562052
- li x3, 0x52697363
- li x4, 0x736b7920
- li x5, 0x73746572
- li x6, 0x6e204e6f
- li x7, 0x4d696c61
- li x8, 0x6f646173
- li x9, 0x6b794063
- li x10, 0x74657273
- li x11, 0x286e6f73
- li x12, 0x656b2048
- li x13, 0x20526164
- li x14, 0x6f6d292c
- li x15, 0x69702e63
-
- # Store results
- sw x0, 0(x16)
- sw x1, 4(x16)
- sw x2, 8(x16)
- sw x3, 12(x16)
- sw x4, 16(x16)
- sw x5, 20(x16)
- sw x6, 24(x16)
- sw x7, 28(x16)
- sw x8, 32(x16)
- sw x9, 36(x16)
- sw x10, 40(x16)
- sw x11, 44(x16)
- sw x12, 48(x16)
- sw x13, 52(x16)
- sw x14, 56(x16)
- sw x15, 60(x16)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x1, 0x56333249)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x2, 0x2D562052)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x3, 0x52697363)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x4, 0x736B7920)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x5, 0x73746572)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x6, 0x6E204E6F)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x7, 0x4D696C61)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x8, 0x6F646173)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x9, 0x6B794063)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x10, 0x74657273)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x11, 0x286E6F73)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x12, 0x656B2048)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x13, 0x20526164)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x14, 0x6F6D292C)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x15, 0x69702E63)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - test registers x16 - x30\n");
-
- # Address for test results
- la x4, test_A2_res
-
- # Test
- li x16, 0x636f6461
- li x17, 0x6a656b40
- li x18, 0x20286861
- li x19, 0x616a656b
- li x20, 0x61766520
- li x21, 0x2e204c65
- li x22, 0x636f6d29
- li x23, 0x7369702e
- li x24, 0x6620796f
- li x25, 0x67652069
- li x26, 0x65737361
- li x27, 0x7573206d
- li x28, 0x3a290d0a
- li x29, 0x68697320
- li x30, 0x61642074
- li x31, 0x75207265
-
- # Store results
- sw x16, 0(x4)
- sw x17, 4(x4)
- sw x18, 8(x4)
- sw x19, 12(x4)
- sw x20, 16(x4)
- sw x21, 20(x4)
- sw x22, 24(x4)
- sw x23, 28(x4)
- sw x24, 32(x4)
- sw x25, 36(x4)
- sw x26, 40(x4)
- sw x27, 44(x4)
- sw x28, 48(x4)
- sw x29, 52(x4)
- sw x30, 56(x4)
- sw x31, 60(x4)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x636F6461)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x6A656B40)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x20286861)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x616A656B)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x20, 0x61766520)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x21, 0x2E204C65)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x22, 0x636F6D29)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x23, 0x7369702E)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x24, 0x6620796F)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x25, 0x67652069)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x26, 0x65737361)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x27, 0x7573206D)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x28, 0x3A290D0A)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x29, 0x68697320)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x30, 0x61642074)
- RVMODEL_IO_ASSERT_GPR_EQ(x4, x31, 0x75207265)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A3 - test registers x0 - x3 again (were not overwritten)\n");
-
- # Address for test results
- la x4, test_A3_res
-
- # Test
- sw x0, 0(x4)
- sw x1, 4(x4)
- sw x2, 8(x4)
- sw x3, 12(x4)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A3 - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A1_res:
- .fill 16, 4, -1
-test_A2_res:
- .fill 16, 4, -1
-test_A3_res:
- .fill 4, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/I-RF_width-01.S b/riscof/suite/rv32i_m/I/I-RF_width-01.S
deleted file mode 100644
index c1d6edf82838ceff44321348a87c05be4f40e68b..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-RF_width-01.S
+++ /dev/null
@@ -1,358 +0,0 @@
-# RISC-V Compliance Test I-RF_width-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing width of register file.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", lui, addi, ori, xori, slli)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - test x1 - x15 are 32 bits\n");
-
- # Address for test results
- la x16, test_A1_res
-
- # Init registers
- li x0, 1
- li x1, 1
- li x2, 1
- li x3, 1
- li x4, 1
- li x5, 1
- li x6, 1
- li x7, 1
- li x8, 1
- li x9, 1
- li x10, 1
- li x11, 1
- li x12, 1
- li x13, 1
- li x14, 1
- li x15, 1
-
-
- # Test
- slli x1, x1, 31
- bltz x1, 1f
- li x1, 0
-
-1:
- slli x2, x2, 31
- bltz x2, 1f
- li x2, 0
-
-1:
- slli x3, x3, 31
- bltz x3, 1f
- li x3, 0
-
-1:
- slli x4, x4, 31
- bltz x4, 1f
- li x4, 0
-
-1:
- slli x5, x5, 31
- bltz x5, 1f
- li x5, 0
-
-1:
- slli x6, x6, 31
- bltz x6, 1f
- li x6, 0
-
-1:
- slli x7, x7, 31
- bltz x7, 1f
- li x7, 0
-
-1:
- slli x8, x8, 31
- bltz x8, 1f
- li x8, 0
-
-1:
- slli x9, x9, 31
- bltz x9, 1f
- li x9, 0
-
-1:
- slli x10, x10, 31
- bltz x10, 1f
- li x10, 0
-
-1:
- slli x11, x11, 31
- bltz x11, 1f
- li x11, 0
-
-1:
- slli x12, x12, 31
- bltz x12, 1f
- li x12, 0
-
-1:
- slli x13, x13, 31
- bltz x13, 1f
- li x13, 0
-
-1:
- slli x14, x14, 31
- bltz x14, 1f
- li x14, 0
-
-1:
- slli x15, x15, 31
- bltz x15, 1f
- li x15, 0
-
-1:
-
- # Store results
- sw x0, 0(x16)
- sw x1, 4(x16)
- sw x2, 8(x16)
- sw x3, 12(x16)
- sw x4, 16(x16)
- sw x5, 20(x16)
- sw x6, 24(x16)
- sw x7, 28(x16)
- sw x8, 32(x16)
- sw x9, 36(x16)
- sw x10, 40(x16)
- sw x11, 44(x16)
- sw x12, 48(x16)
- sw x13, 52(x16)
- sw x14, 56(x16)
- sw x15, 60(x16)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x1, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x2, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x3, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x4, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x5, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x6, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x7, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x8, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x9, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x10, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x11, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x12, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x13, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x14, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x16, x15, 0x80000000)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - test x16 - x30 are 32 bits\n");
-
- # Address for test results
- la x1, test_A2_res
-
- # Init registers
- li x16, 1
- li x17, 1
- li x18, 1
- li x19, 1
- li x20, 1
- li x21, 1
- li x22, 1
- li x23, 1
- li x24, 1
- li x25, 1
- li x26, 1
- li x27, 1
- li x28, 1
- li x29, 1
- li x30, 1
- li x31, 1
-
- # Test
- slli x16, x16, 31
- bltz x16, 1f
- li x16, 0
-
-1:
- slli x17, x17, 31
- bltz x17, 1f
- li x17, 0
-
-1:
- slli x18, x18, 31
- bltz x18, 1f
- li x18, 0
-
-1:
- slli x19, x19, 31
- bltz x19, 1f
- li x19, 0
-
-1:
- slli x20, x20, 31
- bltz x20, 1f
- li x20, 0
-
-1:
- slli x21, x21, 31
- bltz x21, 1f
- li x21, 0
-
-1:
- slli x22, x22, 31
- bltz x22, 1f
- li x22, 0
-
-1:
- slli x23, x23, 31
- bltz x23, 1f
- li x23, 0
-
-1:
- slli x24, x24, 31
- bltz x24, 1f
- li x24, 0
-
-1:
- slli x25, x25, 31
- bltz x25, 1f
- li x25, 0
-
-1:
- slli x26, x26, 31
- bltz x26, 1f
- li x26, 0
-
-1:
- slli x27, x27, 31
- bltz x27, 1f
- li x27, 0
-
-1:
- slli x28, x28, 31
- bltz x28, 1f
- li x28, 0
-
-1:
- slli x29, x29, 31
- bltz x29, 1f
- li x29, 0
-
-1:
- slli x30, x30, 31
- bltz x30, 1f
- li x30, 0
-
-1:
- slli x31, x31, 31
- bltz x31, 1f
- li x31, 0
-
-1:
-
- # Store results
- sw x16, 0(x1)
- sw x17, 4(x1)
- sw x18, 8(x1)
- sw x19, 12(x1)
- sw x20, 16(x1)
- sw x21, 20(x1)
- sw x22, 24(x1)
- sw x23, 28(x1)
- sw x24, 32(x1)
- sw x25, 36(x1)
- sw x26, 40(x1)
- sw x27, 44(x1)
- sw x28, 48(x1)
- sw x29, 52(x1)
- sw x30, 56(x1)
- sw x31, 60(x1)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x16, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x17, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x18, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x19, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x20, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x21, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x22, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x23, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x24, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x25, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x26, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x27, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x28, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x29, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x30, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x31, 0x80000000)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A1_res:
- .fill 16, 4, -1
-test_A2_res:
- .fill 16, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/I-RF_x0-01.S b/riscof/suite/rv32i_m/I/I-RF_x0-01.S
deleted file mode 100644
index 5d69fca9b4bf577e63dcdabb75ae5497a903cf64..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-RF_x0-01.S
+++ /dev/null
@@ -1,206 +0,0 @@
-# RISC-V Compliance Test I-RF_x0-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing x0 is hardwired 0.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", lui, slli, srli, srai, addi, ori, xori, slli)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - test computational instructions - register-immediate\n");
-
- # Address for test results
- la x31, test_A1_res
-
- # Test
- lui x0, 0xABCDE
- addi x0, x0, 1
- ori x0, x0, 0x7F0
- andi x0, x0, 0x53F
- xori x0, x0, 0xFFFFF803
- slli x0, x0, 5
- srai x0, x0, 2
- srli x0, x0, 4
-
- # Store results
- sw x0, 0(x31)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - test computational instructions - register-register\n");
-
- # Address for test results
- la x31, test_A2_res
-
- # Register initialization
- li x1, 0x1
- li x2, 0x7F0
- li x3, 0x53F
- li x4, 0xFFFFF803
- li x5, 0x5
- li x6, 0x2
- li x7, 0x4
- li x8, 0x18
-
- # Test
- auipc x0, 0xABCDE
- add x0, x0, x1
- or x0, x0, x2
- and x0, x0, x3
- xor x0, x0, x4
- sll x0, x0, x5
- sra x0, x0, x6
- srl x0, x0, x7
- sub x0, x0, x8
-
- # Store results
- sw x0, 0(x31)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A3 - test compare instructions\n");
-
- # Address for test results
- la x31, test_A3_res
-
- # Register initialization
- li x1, 0x1
- li x2, 0x2
-
- # Test and store
- slt x0, x1, x2
- sw x0, 0(x31)
-
- sltu x0, x1, x2
- sw x0, 4(x31)
-
- slti x0, x1, 2
- sw x0, 8(x31)
-
- sltiu x0, x1, 2
- sw x0, 12(x31)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A3 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A4 - test jump and link instructions\n");
-
- # Address for test results
- la x31, test_A4_res
-
- # Test and store
- jal x0, 1f
-1:
- sw x0, 0(x31)
-
- la x1, 1f
- jalr x0, x1, 0
-1:
- sw x0, 4(x31)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A4 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A5 - test load instructions\n");
-
- # Addresses for test data and results
- la x1, test_A5_data
- la x31, test_A5_res
-
- # Test and store
- lw x0, 0(x1)
- sw x0, 0(x31)
-
- lh x0, 0(x1)
- sw x0, 4(x31)
-
- lb x0, 0(x1)
- sw x0, 8(x31)
-
- lbu x0, 0(x1)
- sw x0, 12(x31)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A5 - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-test_A5_data:
- .word 0x42524E4F
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A1_res:
- .fill 1, 4, -1
-test_A2_res:
- .fill 1, 4, -1
-test_A3_res:
- .fill 4, 4, -1
-test_A4_res:
- .fill 2, 4, -1
-test_A5_res:
- .fill 4, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/I-SB-01.S b/riscof/suite/rv32i_m/I/I-SB-01.S
deleted file mode 100644
index 4077058eb16cc3922284e15edb196a4107195998..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SB-01.S
+++ /dev/null
@@ -1,427 +0,0 @@
-# RISC-V Compliance Test SB-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SB'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",sb-align)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # Addresses for test results
- la x5, test_1_res
-
- # Clear memory
- sb x0, 0x0(x5)
- # Test
- li x16, -0x1
- addi x31, x5, 0
- sb x16, 0x0(x31)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, -0x1)
- # Clear memory
- sb x0, -0x2(x5)
- # Test
- li x15, 0x1
- addi x30, x5, 0
- sb x15, -0x2(x30)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x1)
- # Clear memory
- sb x0, 0x3(x5)
- # Test
- li x14, 0x0
- addi x29, x5, 0
- sb x14, 0x3(x29)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x0)
- # Clear memory
- sb x0, -0x4(x5)
- # Test
- li x13, 0x7ff
- addi x28, x5, 0
- sb x13, -0x4(x28)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x7ff)
- # Clear memory
- sb x0, 0x2(x5)
- # Test
- li x12, 0x0
- addi x27, x5, 0
- sb x12, 0x2(x27)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x27, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x12, 0x0)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # Addresses for test results
- la x1, test_2_res
-
- # Clear memory
- sb x0, 0x4(x1)
- # Test
- li x11, 0x800
- addi x26, x1, 0
- sb x11, 0x4(x26)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x800)
- # Clear memory
- sb x0, -0x1(x1)
- # Test
- li x10, 0x7654321
- addi x25, x1, 0
- sb x10, -0x1(x25)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x7654321)
- # Clear memory
- sb x0, 0x1(x1)
- # Test
- li x9, 0x7fffffff
- addi x24, x1, 0
- sb x9, 0x1(x24)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x7fffffff)
- # Clear memory
- sb x0, 0x0(x1)
- # Test
- li x8, 0x1
- addi x23, x1, 0
- sb x8, 0x0(x23)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x1)
- # Clear memory
- sb x0, -0x2(x1)
- # Test
- li x7, 0xffffffff
- addi x22, x1, 0
- sb x7, -0x2(x22)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffffffff)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # Addresses for test results
- la x1, test_3_res
-
- # Clear memory
- sb x0, 0x3(x1)
- # Test
- li x6, 0x1234
- addi x21, x1, 0
- sb x6, 0x3(x21)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x21, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x1234)
- # Clear memory
- sb x0, -0x4(x1)
- # Test
- li x5, 0x80000000
- addi x20, x1, 0
- sb x5, -0x4(x20)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x20, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x80000000)
- # Clear memory
- sb x0, 0x2(x1)
- # Test
- li x4, -0x1234
- addi x19, x1, 0
- sb x4, 0x2(x19)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x19, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, -0x1234)
- # Clear memory
- sb x0, 0x4(x1)
- # Test
- li x3, -0x1
- addi x18, x1, 0
- sb x3, 0x4(x18)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x18, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, -0x1)
- # Clear memory
- sb x0, -0x1(x1)
- # Test
- li x2, -0x7ff
- addi x17, x1, 0
- sb x2, -0x1(x17)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x17, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, -0x7ff)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # Addresses for test results
- la x2, test_4_res
-
- # Clear memory
- sb x0, 0x1(x2)
- # Test
- li x1, 0x0
- addi x16, x2, 0
- sb x1, 0x1(x16)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x1, 0x0)
- # Clear memory
- sb x0, 0x0(x2)
- # Test
- li x0, -0x1
- addi x15, x2, 0
- sb x0, 0x0(x15)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x15, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x0, 0)
- # Clear memory
- sb x0, -0x2(x2)
- # Test
- li x31, 0x1
- addi x14, x2, 0
- sb x31, -0x2(x14)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x14, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x31, 0x1)
- # Clear memory
- sb x0, 0x3(x2)
- # Test
- li x30, 0x0
- addi x13, x2, 0
- sb x30, 0x3(x13)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x13, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x30, 0x0)
- # Clear memory
- sb x0, -0x4(x2)
- # Test
- li x29, 0x7ff
- addi x12, x2, 0
- sb x29, -0x4(x12)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x12, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x29, 0x7ff)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # Addresses for test results
- la x1, test_5_res
-
- # Clear memory
- sb x0, 0x2(x1)
- # Test
- li x28, 0x0
- addi x11, x1, 0
- sb x28, 0x2(x11)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0)
- # Clear memory
- sb x0, 0x4(x1)
- # Test
- li x27, 0x800
- addi x10, x1, 0
- sb x27, 0x4(x10)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x800)
- # Clear memory
- sb x0, -0x1(x1)
- # Test
- li x26, 0x7654321
- addi x9, x1, 0
- sb x26, -0x1(x9)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x7654321)
- # Clear memory
- sb x0, 0x1(x1)
- # Test
- li x25, 0x7fffffff
- addi x8, x1, 0
- sb x25, 0x1(x8)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x7fffffff)
- # Clear memory
- sb x0, 0x0(x1)
- # Test
- li x24, 0x1
- addi x7, x1, 0
- sb x24, 0x0(x7)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x1)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # Addresses for test results
- la x1, test_6_res
-
- # Clear memory
- sb x0, -0x2(x1)
- # Test
- li x23, 0xffffffff
- addi x6, x1, 0
- sb x23, -0x2(x6)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x23, 0xffffffff)
- # Clear memory
- sb x0, 0x3(x1)
- # Test
- li x22, 0x1234
- addi x5, x1, 0
- sb x22, 0x3(x5)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x22, 0x1234)
- # Clear memory
- sb x0, -0x4(x1)
- # Test
- li x21, 0x80000000
- addi x4, x1, 0
- sb x21, -0x4(x4)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x21, 0x80000000)
- # Clear memory
- sb x0, 0x2(x1)
- # Test
- li x20, -0x1234
- addi x3, x1, 0
- sb x20, 0x2(x3)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x20, -0x1234)
- # Clear memory
- sb x0, 0x4(x1)
- # Test
- li x19, -0x1
- addi x2, x1, 0
- sb x19, 0x4(x2)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x19, -0x1)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # Addresses for test results
- la x2, test_7_res
-
- # Clear memory
- sb x0, -0x1(x2)
- # Test
- li x18, -0x7ff
- addi x1, x2, 0
- sb x18, -0x1(x1)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x1, test_7_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, -0x7ff)
- # Clear memory
- sb x0, 0x1(x2)
- # Test
- li x17, 0x0
- addi x1, x2, 0
- sb x17, 0x1(x1)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x1, test_7_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0)
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-SH-01.S b/riscof/suite/rv32i_m/I/I-SH-01.S
deleted file mode 100644
index ac6d7aa4ebc2782eaa7b6041f3f3bfa7784452c9..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SH-01.S
+++ /dev/null
@@ -1,427 +0,0 @@
-# RISC-V Compliance Test SH-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SH'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",sh-align)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # Addresses for test results
- la x5, test_1_res
-
- # Clear memory
- sh x0, 0x0(x5)
- # Test
- li x16, -0x1
- addi x31, x5, 0
- sh x16, 0x0(x31)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, -0x1)
- # Clear memory
- sh x0, -0x2(x5)
- # Test
- li x15, 0x1
- addi x30, x5, 0
- sh x15, -0x2(x30)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x1)
- # Clear memory
- sh x0, 0x2(x5)
- # Test
- li x14, 0x0
- addi x29, x5, 0
- sh x14, 0x2(x29)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x0)
- # Clear memory
- sh x0, -0x4(x5)
- # Test
- li x13, 0x7ff
- addi x28, x5, 0
- sh x13, -0x4(x28)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x7ff)
- # Clear memory
- sh x0, 0x2(x5)
- # Test
- li x12, 0x0
- addi x27, x5, 0
- sh x12, 0x2(x27)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x27, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x12, 0x0)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # Addresses for test results
- la x1, test_2_res
-
- # Clear memory
- sh x0, 0x4(x1)
- # Test
- li x11, 0x800
- addi x26, x1, 0
- sh x11, 0x4(x26)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x800)
- # Clear memory
- sh x0, 0x0(x1)
- # Test
- li x10, 0x7654321
- addi x25, x1, 0
- sh x10, 0x0(x25)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x7654321)
- # Clear memory
- sh x0, 0x0(x1)
- # Test
- li x9, 0x7fffffff
- addi x24, x1, 0
- sh x9, 0x0(x24)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x7fffffff)
- # Clear memory
- sh x0, 0x0(x1)
- # Test
- li x8, 0x1
- addi x23, x1, 0
- sh x8, 0x0(x23)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x1)
- # Clear memory
- sh x0, -0x2(x1)
- # Test
- li x7, 0xffffffff
- addi x22, x1, 0
- sh x7, -0x2(x22)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffffffff)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # Addresses for test results
- la x1, test_3_res
-
- # Clear memory
- sh x0, 0x2(x1)
- # Test
- li x6, 0x1234
- addi x21, x1, 0
- sh x6, 0x2(x21)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x21, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x1234)
- # Clear memory
- sh x0, -0x4(x1)
- # Test
- li x5, 0x80000000
- addi x20, x1, 0
- sh x5, -0x4(x20)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x20, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x80000000)
- # Clear memory
- sh x0, 0x2(x1)
- # Test
- li x4, -0x1234
- addi x19, x1, 0
- sh x4, 0x2(x19)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x19, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, -0x1234)
- # Clear memory
- sh x0, 0x4(x1)
- # Test
- li x3, -0x1
- addi x18, x1, 0
- sh x3, 0x4(x18)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x18, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, -0x1)
- # Clear memory
- sh x0, 0x0(x1)
- # Test
- li x2, -0x7ff
- addi x17, x1, 0
- sh x2, 0x0(x17)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x17, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, -0x7ff)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # Addresses for test results
- la x2, test_4_res
-
- # Clear memory
- sh x0, 0x0(x2)
- # Test
- li x1, 0x0
- addi x16, x2, 0
- sh x1, 0x0(x16)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x1, 0x0)
- # Clear memory
- sh x0, 0x0(x2)
- # Test
- li x0, -0x1
- addi x15, x2, 0
- sh x0, 0x0(x15)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x15, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x0, 0)
- # Clear memory
- sh x0, -0x2(x2)
- # Test
- li x31, 0x1
- addi x14, x2, 0
- sh x31, -0x2(x14)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x14, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x31, 0x1)
- # Clear memory
- sh x0, 0x2(x2)
- # Test
- li x30, 0x0
- addi x13, x2, 0
- sh x30, 0x2(x13)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x13, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x30, 0x0)
- # Clear memory
- sh x0, -0x4(x2)
- # Test
- li x29, 0x7ff
- addi x12, x2, 0
- sh x29, -0x4(x12)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x12, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x29, 0x7ff)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # Addresses for test results
- la x1, test_5_res
-
- # Clear memory
- sh x0, 0x2(x1)
- # Test
- li x28, 0x0
- addi x11, x1, 0
- sh x28, 0x2(x11)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0)
- # Clear memory
- sh x0, 0x4(x1)
- # Test
- li x27, 0x800
- addi x10, x1, 0
- sh x27, 0x4(x10)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x800)
- # Clear memory
- sh x0, 0x0(x1)
- # Test
- li x26, 0x7654321
- addi x9, x1, 0
- sh x26, 0x0(x9)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x7654321)
- # Clear memory
- sh x0, 0x0(x1)
- # Test
- li x25, 0x7fffffff
- addi x8, x1, 0
- sh x25, 0x0(x8)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x7fffffff)
- # Clear memory
- sh x0, 0x0(x1)
- # Test
- li x24, 0x1
- addi x7, x1, 0
- sh x24, 0x0(x7)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x1)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # Addresses for test results
- la x1, test_6_res
-
- # Clear memory
- sh x0, -0x2(x1)
- # Test
- li x23, 0xffffffff
- addi x6, x1, 0
- sh x23, -0x2(x6)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x23, 0xffffffff)
- # Clear memory
- sh x0, 0x2(x1)
- # Test
- li x22, 0x1234
- addi x5, x1, 0
- sh x22, 0x2(x5)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x22, 0x1234)
- # Clear memory
- sh x0, -0x4(x1)
- # Test
- li x21, 0x80000000
- addi x4, x1, 0
- sh x21, -0x4(x4)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x21, 0x80000000)
- # Clear memory
- sh x0, 0x2(x1)
- # Test
- li x20, -0x1234
- addi x3, x1, 0
- sh x20, 0x2(x3)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x20, -0x1234)
- # Clear memory
- sh x0, 0x4(x1)
- # Test
- li x19, -0x1
- addi x2, x1, 0
- sh x19, 0x4(x2)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x19, -0x1)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # Addresses for test results
- la x2, test_7_res
-
- # Clear memory
- sh x0, 0x0(x2)
- # Test
- li x18, -0x7ff
- addi x1, x2, 0
- sh x18, 0x0(x1)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x1, test_7_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, -0x7ff)
- # Clear memory
- sh x0, 0x0(x2)
- # Test
- li x17, 0x0
- addi x1, x2, 0
- sh x17, 0x0(x1)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x1, test_7_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0)
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-SLL-01.S b/riscof/suite/rv32i_m/I/I-SLL-01.S
deleted file mode 100644
index 9ec6049b097bdc6f922456cd7e80caa1d459f427..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SLL-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test SLL-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SLL'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", sll)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_RR_OP(sll, x0, x31, x16, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_RR_OP(sll, x1, x30, x15, 0x1, 0x1, 0x0, x5, 4, x6) # Testcase 1
- TEST_RR_OP(sll, x2, x29, x14, 0x0, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_RR_OP(sll, x3, x28, x13, 0x7ff0, 0x7ff, 0x4, x5, 12, x6) # Testcase 3
- TEST_RR_OP(sll, x4, x27, x12, 0x0, 0x0, 0x8, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_RR_OP(sll, x5, x26, x11, 0x0, 0x800, 0x1f, x1, 0, x2) # Testcase 5
- TEST_RR_OP(sll, x6, x25, x10, 0x43210000, 0x7654321, 0x10, x1, 4, x2) # Testcase 6
- TEST_RR_OP(sll, x7, x24, x9, 0x80000000, 0x7fffffff, -0x1, x1, 8, x2) # Testcase 7
- TEST_RR_OP(sll, x8, x23, x8, 0x1, 0x1, 0x0, x1, 12, x2) # Testcase 8
- TEST_RR_OP(sll, x9, x22, x7, 0xffffffff, 0xffffffff, 0x0, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_RR_OP(sll, x10, x21, x6, 0x0, 0x1234, -0x1, x1, 0, x7) # Testcase 10
- TEST_RR_OP(sll, x11, x20, x5, 0x0, 0x80000000, 0x4, x1, 4, x7) # Testcase 11
- TEST_RR_OP(sll, x12, x19, x4, 0xffedcc00, -0x1234, 0x8, x1, 8, x7) # Testcase 12
- TEST_RR_OP(sll, x13, x18, x3, 0x80000000, -0x1, 0x1f, x1, 12, x7) # Testcase 13
- TEST_RR_OP(sll, x14, x17, x2, 0xf8010000, -0x7ff, 0x10, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_OP(sll, x15, x16, x1, 0x0, 0x0, -0x1, x2, 0, x3) # Testcase 15
- TEST_RR_OP(sll, x16, x15, x0, 0xffffffff, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_RR_OP(sll, x17, x14, x31, 0x1, 0x1, 0x0, x2, 8, x3) # Testcase 17
- TEST_RR_OP(sll, x18, x13, x30, 0x0, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_RR_OP(sll, x19, x12, x29, 0x7ff0, 0x7ff, 0x4, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_RR_OP(sll, x20, x11, x28, 0x0, 0x0, 0x8, x1, 0, x2) # Testcase 20
- TEST_RR_OP(sll, x21, x10, x27, 0x0, 0x800, 0x1f, x1, 4, x2) # Testcase 21
- TEST_RR_OP(sll, x22, x9, x26, 0x43210000, 0x7654321, 0x10, x1, 8, x2) # Testcase 22
- TEST_RR_OP(sll, x23, x8, x25, 0x80000000, 0x7fffffff, -0x1, x1, 12, x2) # Testcase 23
- TEST_RR_OP(sll, x24, x7, x24, 0x1, 0x1, 0x0, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_RR_OP(sll, x25, x6, x23, 0xffffffff, 0xffffffff, 0x0, x1, 0, x7) # Testcase 25
- TEST_RR_OP(sll, x26, x5, x22, 0x0, 0x1234, -0x1, x1, 4, x7) # Testcase 26
- TEST_RR_OP(sll, x27, x4, x21, 0x0, 0x80000000, 0x4, x1, 8, x7) # Testcase 27
- TEST_RR_OP(sll, x28, x3, x20, 0xffedcc00, -0x1234, 0x8, x1, 12, x7) # Testcase 28
- TEST_RR_OP(sll, x29, x2, x19, 0x80000000, -0x1, 0x1f, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_RR_OP(sll, x30, x1, x18, 0xf8010000, -0x7ff, 0x10, x2, 0, x3) # Testcase 30
- TEST_RR_OP(sll, x31, x0, x17, 0x0, 0x0, -0x1, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-SLLI-01.S b/riscof/suite/rv32i_m/I/I-SLLI-01.S
deleted file mode 100644
index e96bd4b4b680056a040579e9d8b23e1b85b69b28..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SLLI-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test SLLI-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SLLI'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", slli)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_IMM_OP(slli, x0, x31, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_IMM_OP(slli, x1, x30, 0x1, 0x1, 0x0, x5, 4, x6) # Testcase 1
- TEST_IMM_OP(slli, x2, x29, 0x0, 0x0, 0x1, x5, 8, x6) # Testcase 2
- TEST_IMM_OP(slli, x3, x28, 0x7ff0, 0x7ff, 0x4, x5, 12, x6) # Testcase 3
- TEST_IMM_OP(slli, x4, x27, 0x0, 0x0, 0x8, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_IMM_OP(slli, x5, x26, 0x0, 0x800, 0x1f, x1, 0, x2) # Testcase 5
- TEST_IMM_OP(slli, x6, x25, 0x43210000, 0x7654321, 0x10, x1, 4, x2) # Testcase 6
- TEST_IMM_OP(slli, x7, x24, 0xfffffffe, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_IMM_OP(slli, x8, x23, 0x1, 0x1, 0x0, x1, 12, x2) # Testcase 8
- TEST_IMM_OP(slli, x9, x22, 0xffffffff, 0xffffffff, 0x0, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_IMM_OP(slli, x10, x21, 0x2468, 0x1234, 0x1, x1, 0, x7) # Testcase 10
- TEST_IMM_OP(slli, x11, x20, 0x0, 0x80000000, 0x4, x1, 4, x7) # Testcase 11
- TEST_IMM_OP(slli, x12, x19, 0xffedcc00, -0x1234, 0x8, x1, 8, x7) # Testcase 12
- TEST_IMM_OP(slli, x13, x18, 0x80000000, -0x1, 0x1f, x1, 12, x7) # Testcase 13
- TEST_IMM_OP(slli, x14, x17, 0xf8010000, -0x7ff, 0x10, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_IMM_OP(slli, x15, x16, 0x0, 0x0, 0x1, x2, 0, x3) # Testcase 15
- TEST_IMM_OP(slli, x16, x15, 0xffffffff, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_IMM_OP(slli, x17, x14, 0x1, 0x1, 0x0, x2, 8, x3) # Testcase 17
- TEST_IMM_OP(slli, x18, x13, 0x0, 0x0, 0x1, x2, 12, x3) # Testcase 18
- TEST_IMM_OP(slli, x19, x12, 0x7ff0, 0x7ff, 0x4, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_IMM_OP(slli, x20, x11, 0x0, 0x0, 0x8, x1, 0, x2) # Testcase 20
- TEST_IMM_OP(slli, x21, x10, 0x0, 0x800, 0x1f, x1, 4, x2) # Testcase 21
- TEST_IMM_OP(slli, x22, x9, 0x43210000, 0x7654321, 0x10, x1, 8, x2) # Testcase 22
- TEST_IMM_OP(slli, x23, x8, 0xfffffffe, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_IMM_OP(slli, x24, x7, 0x1, 0x1, 0x0, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_IMM_OP(slli, x25, x6, 0xffffffff, 0xffffffff, 0x0, x1, 0, x7) # Testcase 25
- TEST_IMM_OP(slli, x26, x5, 0x2468, 0x1234, 0x1, x1, 4, x7) # Testcase 26
- TEST_IMM_OP(slli, x27, x4, 0x0, 0x80000000, 0x4, x1, 8, x7) # Testcase 27
- TEST_IMM_OP(slli, x28, x3, 0xffedcc00, -0x1234, 0x8, x1, 12, x7) # Testcase 28
- TEST_IMM_OP(slli, x29, x2, 0x80000000, -0x1, 0x1f, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_IMM_OP(slli, x30, x1, 0xf8010000, -0x7ff, 0x10, x2, 0, x3) # Testcase 30
- TEST_IMM_OP(slli, x31, x0, 0x0, 0x0, 0x1, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-SLT-01.S b/riscof/suite/rv32i_m/I/I-SLT-01.S
deleted file mode 100644
index d1351249186bad92db064b0d22d59a81cad25887..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SLT-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test SLT-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SLT'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", slt)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_RR_OP(slt, x0, x31, x16, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_RR_OP(slt, x1, x30, x15, 0x0, 0x1, -0x7ff, x5, 4, x6) # Testcase 1
- TEST_RR_OP(slt, x2, x29, x14, 0x0, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_RR_OP(slt, x3, x28, x13, 0x0, 0x7ff, -0x1234, x5, 12, x6) # Testcase 3
- TEST_RR_OP(slt, x4, x27, x12, 0x0, 0x0, 0x80000000, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_RR_OP(slt, x5, x26, x11, 0x1, 0x800, 0x1234, x1, 0, x2) # Testcase 5
- TEST_RR_OP(slt, x6, x25, x10, 0x0, 0x7654321, 0xffffffff, x1, 4, x2) # Testcase 6
- TEST_RR_OP(slt, x7, x24, x9, 0x0, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_RR_OP(slt, x8, x23, x8, 0x1, 0x1, 0x7fffffff, x1, 12, x2) # Testcase 8
- TEST_RR_OP(slt, x9, x22, x7, 0x1, 0xffffffff, 0x7654321, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_RR_OP(slt, x10, x21, x6, 0x0, 0x1234, 0x800, x1, 0, x7) # Testcase 10
- TEST_RR_OP(slt, x11, x20, x5, 0x1, 0x80000000, 0x0, x1, 4, x7) # Testcase 11
- TEST_RR_OP(slt, x12, x19, x4, 0x1, -0x1234, 0x7ff, x1, 8, x7) # Testcase 12
- TEST_RR_OP(slt, x13, x18, x3, 0x0, -0x1, -0x1, x1, 12, x7) # Testcase 13
- TEST_RR_OP(slt, x14, x17, x2, 0x1, -0x7ff, 0x1, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_OP(slt, x15, x16, x1, 0x0, 0x0, 0x0, x2, 0, x3) # Testcase 15
- TEST_RR_OP(slt, x16, x15, x0, 0x1, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_RR_OP(slt, x17, x14, x31, 0x0, 0x1, -0x7ff, x2, 8, x3) # Testcase 17
- TEST_RR_OP(slt, x18, x13, x30, 0x0, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_RR_OP(slt, x19, x12, x29, 0x0, 0x7ff, -0x1234, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_RR_OP(slt, x20, x11, x28, 0x0, 0x0, 0x80000000, x1, 0, x2) # Testcase 20
- TEST_RR_OP(slt, x21, x10, x27, 0x1, 0x800, 0x1234, x1, 4, x2) # Testcase 21
- TEST_RR_OP(slt, x22, x9, x26, 0x0, 0x7654321, 0xffffffff, x1, 8, x2) # Testcase 22
- TEST_RR_OP(slt, x23, x8, x25, 0x0, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_RR_OP(slt, x24, x7, x24, 0x1, 0x1, 0x7fffffff, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_RR_OP(slt, x25, x6, x23, 0x1, 0xffffffff, 0x7654321, x1, 0, x7) # Testcase 25
- TEST_RR_OP(slt, x26, x5, x22, 0x0, 0x1234, 0x800, x1, 4, x7) # Testcase 26
- TEST_RR_OP(slt, x27, x4, x21, 0x1, 0x80000000, 0x0, x1, 8, x7) # Testcase 27
- TEST_RR_OP(slt, x28, x3, x20, 0x1, -0x1234, 0x7ff, x1, 12, x7) # Testcase 28
- TEST_RR_OP(slt, x29, x2, x19, 0x0, -0x1, -0x1, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_RR_OP(slt, x30, x1, x18, 0x1, -0x7ff, 0x1, x2, 0, x3) # Testcase 30
- TEST_RR_OP(slt, x31, x0, x17, 0x0, 0x0, 0x0, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-SLTI-01.S b/riscof/suite/rv32i_m/I/I-SLTI-01.S
deleted file mode 100644
index 1d7f75c69e9c8b65c1dfc23d2608d0890b387a20..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SLTI-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test SLTI-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SLTI'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", slti)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_IMM_OP(slti, x0, x31, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_IMM_OP(slti, x1, x30, 0x0, 0x1, -0x7ff, x5, 4, x6) # Testcase 1
- TEST_IMM_OP(slti, x2, x29, 0x0, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_IMM_OP(slti, x3, x28, 0x0, 0x7ff, -0x800, x5, 12, x6) # Testcase 3
- TEST_IMM_OP(slti, x4, x27, 0x0, 0x0, 0x800, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_IMM_OP(slti, x5, x26, 0x0, 0x800, 0x800, x1, 0, x2) # Testcase 5
- TEST_IMM_OP(slti, x6, x25, 0x0, 0x7654321, 0x800, x1, 4, x2) # Testcase 6
- TEST_IMM_OP(slti, x7, x24, 0x0, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_IMM_OP(slti, x8, x23, 0x0, 0x1, 0x800, x1, 12, x2) # Testcase 8
- TEST_IMM_OP(slti, x9, x22, 0x0, 0xffffffff, 0x800, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_IMM_OP(slti, x10, x21, 0x0, 0x1234, 0x800, x1, 0, x7) # Testcase 10
- TEST_IMM_OP(slti, x11, x20, 0x1, 0x80000000, 0x0, x1, 4, x7) # Testcase 11
- TEST_IMM_OP(slti, x12, x19, 0x1, -0x1234, 0x7ff, x1, 8, x7) # Testcase 12
- TEST_IMM_OP(slti, x13, x18, 0x0, -0x1, -0x1, x1, 12, x7) # Testcase 13
- TEST_IMM_OP(slti, x14, x17, 0x1, -0x7ff, 0x1, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_IMM_OP(slti, x15, x16, 0x0, 0x0, 0x0, x2, 0, x3) # Testcase 15
- TEST_IMM_OP(slti, x16, x15, 0x1, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_IMM_OP(slti, x17, x14, 0x0, 0x1, -0x7ff, x2, 8, x3) # Testcase 17
- TEST_IMM_OP(slti, x18, x13, 0x0, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_IMM_OP(slti, x19, x12, 0x0, 0x7ff, -0x800, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_IMM_OP(slti, x20, x11, 0x0, 0x0, 0x800, x1, 0, x2) # Testcase 20
- TEST_IMM_OP(slti, x21, x10, 0x0, 0x800, 0x800, x1, 4, x2) # Testcase 21
- TEST_IMM_OP(slti, x22, x9, 0x0, 0x7654321, 0x800, x1, 8, x2) # Testcase 22
- TEST_IMM_OP(slti, x23, x8, 0x0, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_IMM_OP(slti, x24, x7, 0x0, 0x1, 0x800, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_IMM_OP(slti, x25, x6, 0x0, 0xffffffff, 0x800, x1, 0, x7) # Testcase 25
- TEST_IMM_OP(slti, x26, x5, 0x0, 0x1234, 0x800, x1, 4, x7) # Testcase 26
- TEST_IMM_OP(slti, x27, x4, 0x1, 0x80000000, 0x0, x1, 8, x7) # Testcase 27
- TEST_IMM_OP(slti, x28, x3, 0x1, -0x1234, 0x7ff, x1, 12, x7) # Testcase 28
- TEST_IMM_OP(slti, x29, x2, 0x0, -0x1, -0x1, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_IMM_OP(slti, x30, x1, 0x1, -0x7ff, 0x1, x2, 0, x3) # Testcase 30
- TEST_IMM_OP(slti, x31, x0, 0x0, 0x0, 0x0, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-SLTIU-01.S b/riscof/suite/rv32i_m/I/I-SLTIU-01.S
deleted file mode 100644
index ff6564490b27bc3fb54ba8c51a5bdcd8707a7e3f..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SLTIU-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test SLTIU-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SLTIU'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", sltiu)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_IMM_OP(sltiu, x0, x31, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_IMM_OP(sltiu, x1, x30, 0x1, 0x1, -0x7ff, x5, 4, x6) # Testcase 1
- TEST_IMM_OP(sltiu, x2, x29, 0x1, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_IMM_OP(sltiu, x3, x28, 0x1, 0x7ff, -0x800, x5, 12, x6) # Testcase 3
- TEST_IMM_OP(sltiu, x4, x27, 0x1, 0x0, 0x800, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_IMM_OP(sltiu, x5, x26, 0x1, 0x800, 0x800, x1, 0, x2) # Testcase 5
- TEST_IMM_OP(sltiu, x6, x25, 0x1, 0x7654321, 0x800, x1, 4, x2) # Testcase 6
- TEST_IMM_OP(sltiu, x7, x24, 0x0, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_IMM_OP(sltiu, x8, x23, 0x1, 0x1, 0x800, x1, 12, x2) # Testcase 8
- TEST_IMM_OP(sltiu, x9, x22, 0x0, 0xffffffff, 0x800, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_IMM_OP(sltiu, x10, x21, 0x1, 0x1234, 0x800, x1, 0, x7) # Testcase 10
- TEST_IMM_OP(sltiu, x11, x20, 0x0, 0x80000000, 0x0, x1, 4, x7) # Testcase 11
- TEST_IMM_OP(sltiu, x12, x19, 0x0, -0x1234, 0x7ff, x1, 8, x7) # Testcase 12
- TEST_IMM_OP(sltiu, x13, x18, 0x0, -0x1, -0x1, x1, 12, x7) # Testcase 13
- TEST_IMM_OP(sltiu, x14, x17, 0x0, -0x7ff, 0x1, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_IMM_OP(sltiu, x15, x16, 0x0, 0x0, 0x0, x2, 0, x3) # Testcase 15
- TEST_IMM_OP(sltiu, x16, x15, 0x0, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_IMM_OP(sltiu, x17, x14, 0x1, 0x1, -0x7ff, x2, 8, x3) # Testcase 17
- TEST_IMM_OP(sltiu, x18, x13, 0x1, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_IMM_OP(sltiu, x19, x12, 0x1, 0x7ff, -0x800, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_IMM_OP(sltiu, x20, x11, 0x1, 0x0, 0x800, x1, 0, x2) # Testcase 20
- TEST_IMM_OP(sltiu, x21, x10, 0x1, 0x800, 0x800, x1, 4, x2) # Testcase 21
- TEST_IMM_OP(sltiu, x22, x9, 0x1, 0x7654321, 0x800, x1, 8, x2) # Testcase 22
- TEST_IMM_OP(sltiu, x23, x8, 0x0, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_IMM_OP(sltiu, x24, x7, 0x1, 0x1, 0x800, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_IMM_OP(sltiu, x25, x6, 0x0, 0xffffffff, 0x800, x1, 0, x7) # Testcase 25
- TEST_IMM_OP(sltiu, x26, x5, 0x1, 0x1234, 0x800, x1, 4, x7) # Testcase 26
- TEST_IMM_OP(sltiu, x27, x4, 0x0, 0x80000000, 0x0, x1, 8, x7) # Testcase 27
- TEST_IMM_OP(sltiu, x28, x3, 0x0, -0x1234, 0x7ff, x1, 12, x7) # Testcase 28
- TEST_IMM_OP(sltiu, x29, x2, 0x0, -0x1, -0x1, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_IMM_OP(sltiu, x30, x1, 0x0, -0x7ff, 0x1, x2, 0, x3) # Testcase 30
- TEST_IMM_OP(sltiu, x31, x0, 0x0, 0x0, 0x0, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-SLTU-01.S b/riscof/suite/rv32i_m/I/I-SLTU-01.S
deleted file mode 100644
index e18b52905a80d09c03af0dd25f19c6354be3936c..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SLTU-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test SLTU-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SLTU'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", sltu)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_RR_OP(sltu, x0, x31, x16, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_RR_OP(sltu, x1, x30, x15, 0x1, 0x1, -0x7ff, x5, 4, x6) # Testcase 1
- TEST_RR_OP(sltu, x2, x29, x14, 0x1, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_RR_OP(sltu, x3, x28, x13, 0x1, 0x7ff, -0x1234, x5, 12, x6) # Testcase 3
- TEST_RR_OP(sltu, x4, x27, x12, 0x1, 0x0, 0x80000000, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_RR_OP(sltu, x5, x26, x11, 0x1, 0x800, 0x1234, x1, 0, x2) # Testcase 5
- TEST_RR_OP(sltu, x6, x25, x10, 0x1, 0x7654321, 0xffffffff, x1, 4, x2) # Testcase 6
- TEST_RR_OP(sltu, x7, x24, x9, 0x0, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_RR_OP(sltu, x8, x23, x8, 0x1, 0x1, 0x7fffffff, x1, 12, x2) # Testcase 8
- TEST_RR_OP(sltu, x9, x22, x7, 0x0, 0xffffffff, 0x7654321, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_RR_OP(sltu, x10, x21, x6, 0x0, 0x1234, 0x800, x1, 0, x7) # Testcase 10
- TEST_RR_OP(sltu, x11, x20, x5, 0x0, 0x80000000, 0x0, x1, 4, x7) # Testcase 11
- TEST_RR_OP(sltu, x12, x19, x4, 0x0, -0x1234, 0x7ff, x1, 8, x7) # Testcase 12
- TEST_RR_OP(sltu, x13, x18, x3, 0x0, -0x1, -0x1, x1, 12, x7) # Testcase 13
- TEST_RR_OP(sltu, x14, x17, x2, 0x0, -0x7ff, 0x1, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_OP(sltu, x15, x16, x1, 0x0, 0x0, 0x0, x2, 0, x3) # Testcase 15
- TEST_RR_OP(sltu, x16, x15, x0, 0x0, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_RR_OP(sltu, x17, x14, x31, 0x1, 0x1, -0x7ff, x2, 8, x3) # Testcase 17
- TEST_RR_OP(sltu, x18, x13, x30, 0x1, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_RR_OP(sltu, x19, x12, x29, 0x1, 0x7ff, -0x1234, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_RR_OP(sltu, x20, x11, x28, 0x1, 0x0, 0x80000000, x1, 0, x2) # Testcase 20
- TEST_RR_OP(sltu, x21, x10, x27, 0x1, 0x800, 0x1234, x1, 4, x2) # Testcase 21
- TEST_RR_OP(sltu, x22, x9, x26, 0x1, 0x7654321, 0xffffffff, x1, 8, x2) # Testcase 22
- TEST_RR_OP(sltu, x23, x8, x25, 0x0, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_RR_OP(sltu, x24, x7, x24, 0x1, 0x1, 0x7fffffff, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_RR_OP(sltu, x25, x6, x23, 0x0, 0xffffffff, 0x7654321, x1, 0, x7) # Testcase 25
- TEST_RR_OP(sltu, x26, x5, x22, 0x0, 0x1234, 0x800, x1, 4, x7) # Testcase 26
- TEST_RR_OP(sltu, x27, x4, x21, 0x0, 0x80000000, 0x0, x1, 8, x7) # Testcase 27
- TEST_RR_OP(sltu, x28, x3, x20, 0x0, -0x1234, 0x7ff, x1, 12, x7) # Testcase 28
- TEST_RR_OP(sltu, x29, x2, x19, 0x0, -0x1, -0x1, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_RR_OP(sltu, x30, x1, x18, 0x0, -0x7ff, 0x1, x2, 0, x3) # Testcase 30
- TEST_RR_OP(sltu, x31, x0, x17, 0x0, 0x0, 0x0, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-SRA-01.S b/riscof/suite/rv32i_m/I/I-SRA-01.S
deleted file mode 100644
index 4420dc6cded9371cc55edc7717c1a31710dfcf46..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SRA-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test SRA-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SRA'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", sra)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_RR_OP(sra, x0, x31, x16, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_RR_OP(sra, x1, x30, x15, 0x1, 0x1, 0x0, x5, 4, x6) # Testcase 1
- TEST_RR_OP(sra, x2, x29, x14, 0x0, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_RR_OP(sra, x3, x28, x13, 0x7f, 0x7ff, 0x4, x5, 12, x6) # Testcase 3
- TEST_RR_OP(sra, x4, x27, x12, 0x0, 0x0, 0x8, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_RR_OP(sra, x5, x26, x11, 0x0, 0x800, 0x1f, x1, 0, x2) # Testcase 5
- TEST_RR_OP(sra, x6, x25, x10, 0x765, 0x7654321, 0x10, x1, 4, x2) # Testcase 6
- TEST_RR_OP(sra, x7, x24, x9, 0x0, 0x7fffffff, -0x1, x1, 8, x2) # Testcase 7
- TEST_RR_OP(sra, x8, x23, x8, 0x1, 0x1, 0x0, x1, 12, x2) # Testcase 8
- TEST_RR_OP(sra, x9, x22, x7, 0xffffffff, 0xffffffff, 0x0, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_RR_OP(sra, x10, x21, x6, 0x0, 0x1234, -0x1, x1, 0, x7) # Testcase 10
- TEST_RR_OP(sra, x11, x20, x5, 0xf8000000, 0x80000000, 0x4, x1, 4, x7) # Testcase 11
- TEST_RR_OP(sra, x12, x19, x4, 0xffffffed, -0x1234, 0x8, x1, 8, x7) # Testcase 12
- TEST_RR_OP(sra, x13, x18, x3, 0xffffffff, -0x1, 0x1f, x1, 12, x7) # Testcase 13
- TEST_RR_OP(sra, x14, x17, x2, 0xffffffff, -0x7ff, 0x10, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_OP(sra, x15, x16, x1, 0x0, 0x0, -0x1, x2, 0, x3) # Testcase 15
- TEST_RR_OP(sra, x16, x15, x0, 0xffffffff, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_RR_OP(sra, x17, x14, x31, 0x1, 0x1, 0x0, x2, 8, x3) # Testcase 17
- TEST_RR_OP(sra, x18, x13, x30, 0x0, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_RR_OP(sra, x19, x12, x29, 0x7f, 0x7ff, 0x4, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_RR_OP(sra, x20, x11, x28, 0x0, 0x0, 0x8, x1, 0, x2) # Testcase 20
- TEST_RR_OP(sra, x21, x10, x27, 0x0, 0x800, 0x1f, x1, 4, x2) # Testcase 21
- TEST_RR_OP(sra, x22, x9, x26, 0x765, 0x7654321, 0x10, x1, 8, x2) # Testcase 22
- TEST_RR_OP(sra, x23, x8, x25, 0x0, 0x7fffffff, -0x1, x1, 12, x2) # Testcase 23
- TEST_RR_OP(sra, x24, x7, x24, 0x1, 0x1, 0x0, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_RR_OP(sra, x25, x6, x23, 0xffffffff, 0xffffffff, 0x0, x1, 0, x7) # Testcase 25
- TEST_RR_OP(sra, x26, x5, x22, 0x0, 0x1234, -0x1, x1, 4, x7) # Testcase 26
- TEST_RR_OP(sra, x27, x4, x21, 0xf8000000, 0x80000000, 0x4, x1, 8, x7) # Testcase 27
- TEST_RR_OP(sra, x28, x3, x20, 0xffffffed, -0x1234, 0x8, x1, 12, x7) # Testcase 28
- TEST_RR_OP(sra, x29, x2, x19, 0xffffffff, -0x1, 0x1f, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_RR_OP(sra, x30, x1, x18, 0xffffffff, -0x7ff, 0x10, x2, 0, x3) # Testcase 30
- TEST_RR_OP(sra, x31, x0, x17, 0x0, 0x0, -0x1, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-SRAI-01.S b/riscof/suite/rv32i_m/I/I-SRAI-01.S
deleted file mode 100644
index 4f50c46dd7bf37b75479a88eafa7be95e5453085..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SRAI-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test SRAI-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SRAI'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", srai)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_IMM_OP(srai, x0, x31, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_IMM_OP(srai, x1, x30, 0x1, 0x1, 0x0, x5, 4, x6) # Testcase 1
- TEST_IMM_OP(srai, x2, x29, 0x0, 0x0, 0x1, x5, 8, x6) # Testcase 2
- TEST_IMM_OP(srai, x3, x28, 0x7f, 0x7ff, 0x4, x5, 12, x6) # Testcase 3
- TEST_IMM_OP(srai, x4, x27, 0x0, 0x0, 0x8, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_IMM_OP(srai, x5, x26, 0x0, 0x800, 0x1f, x1, 0, x2) # Testcase 5
- TEST_IMM_OP(srai, x6, x25, 0x765, 0x7654321, 0x10, x1, 4, x2) # Testcase 6
- TEST_IMM_OP(srai, x7, x24, 0x3fffffff, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_IMM_OP(srai, x8, x23, 0x1, 0x1, 0x0, x1, 12, x2) # Testcase 8
- TEST_IMM_OP(srai, x9, x22, 0xffffffff, 0xffffffff, 0x0, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_IMM_OP(srai, x10, x21, 0x91a, 0x1234, 0x1, x1, 0, x7) # Testcase 10
- TEST_IMM_OP(srai, x11, x20, 0xf8000000, 0x80000000, 0x4, x1, 4, x7) # Testcase 11
- TEST_IMM_OP(srai, x12, x19, 0xffffffed, -0x1234, 0x8, x1, 8, x7) # Testcase 12
- TEST_IMM_OP(srai, x13, x18, 0xffffffff, -0x1, 0x1f, x1, 12, x7) # Testcase 13
- TEST_IMM_OP(srai, x14, x17, 0xffffffff, -0x7ff, 0x10, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_IMM_OP(srai, x15, x16, 0x0, 0x0, 0x1, x2, 0, x3) # Testcase 15
- TEST_IMM_OP(srai, x16, x15, 0xffffffff, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_IMM_OP(srai, x17, x14, 0x1, 0x1, 0x0, x2, 8, x3) # Testcase 17
- TEST_IMM_OP(srai, x18, x13, 0x0, 0x0, 0x1, x2, 12, x3) # Testcase 18
- TEST_IMM_OP(srai, x19, x12, 0x7f, 0x7ff, 0x4, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_IMM_OP(srai, x20, x11, 0x0, 0x0, 0x8, x1, 0, x2) # Testcase 20
- TEST_IMM_OP(srai, x21, x10, 0x0, 0x800, 0x1f, x1, 4, x2) # Testcase 21
- TEST_IMM_OP(srai, x22, x9, 0x765, 0x7654321, 0x10, x1, 8, x2) # Testcase 22
- TEST_IMM_OP(srai, x23, x8, 0x3fffffff, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_IMM_OP(srai, x24, x7, 0x1, 0x1, 0x0, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_IMM_OP(srai, x25, x6, 0xffffffff, 0xffffffff, 0x0, x1, 0, x7) # Testcase 25
- TEST_IMM_OP(srai, x26, x5, 0x91a, 0x1234, 0x1, x1, 4, x7) # Testcase 26
- TEST_IMM_OP(srai, x27, x4, 0xf8000000, 0x80000000, 0x4, x1, 8, x7) # Testcase 27
- TEST_IMM_OP(srai, x28, x3, 0xffffffed, -0x1234, 0x8, x1, 12, x7) # Testcase 28
- TEST_IMM_OP(srai, x29, x2, 0xffffffff, -0x1, 0x1f, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_IMM_OP(srai, x30, x1, 0xffffffff, -0x7ff, 0x10, x2, 0, x3) # Testcase 30
- TEST_IMM_OP(srai, x31, x0, 0x0, 0x0, 0x1, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-SRL-01.S b/riscof/suite/rv32i_m/I/I-SRL-01.S
deleted file mode 100644
index 09d45639148fdcf9d8c3e246d14124610f5cea79..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SRL-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test SRL-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SRL'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", srl)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_RR_OP(srl, x0, x31, x16, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_RR_OP(srl, x1, x30, x15, 0x1, 0x1, 0x0, x5, 4, x6) # Testcase 1
- TEST_RR_OP(srl, x2, x29, x14, 0x0, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_RR_OP(srl, x3, x28, x13, 0xf0000000, 0x7ff, 0x4, x5, 12, x6) # Testcase 3
- TEST_RR_OP(srl, x4, x27, x12, 0x0, 0x0, 0x8, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_RR_OP(srl, x5, x26, x11, 0x1000, 0x800, 0x1f, x1, 0, x2) # Testcase 5
- TEST_RR_OP(srl, x6, x25, x10, 0x43210000, 0x7654321, 0x10, x1, 4, x2) # Testcase 6
- TEST_RR_OP(srl, x7, x24, x9, 0xfffffffe, 0x7fffffff, -0x1, x1, 8, x2) # Testcase 7
- TEST_RR_OP(srl, x8, x23, x8, 0x1, 0x1, 0x0, x1, 12, x2) # Testcase 8
- TEST_RR_OP(srl, x9, x22, x7, 0xffffffff, 0xffffffff, 0x0, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_RR_OP(srl, x10, x21, x6, 0x2468, 0x1234, -0x1, x1, 0, x7) # Testcase 10
- TEST_RR_OP(srl, x11, x20, x5, 0x0, 0x80000000, 0x4, x1, 4, x7) # Testcase 11
- TEST_RR_OP(srl, x12, x19, x4, 0xcc000000, -0x1234, 0x8, x1, 8, x7) # Testcase 12
- TEST_RR_OP(srl, x13, x18, x3, 0xfffffffe, -0x1, 0x1f, x1, 12, x7) # Testcase 13
- TEST_RR_OP(srl, x14, x17, x2, 0xf8010000, -0x7ff, 0x10, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_OP(srl, x15, x16, x1, 0x0, 0x0, -0x1, x2, 0, x3) # Testcase 15
- TEST_RR_OP(srl, x16, x15, x0, 0xffffffff, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_RR_OP(srl, x17, x14, x31, 0x1, 0x1, 0x0, x2, 8, x3) # Testcase 17
- TEST_RR_OP(srl, x18, x13, x30, 0x0, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_RR_OP(srl, x19, x12, x29, 0xf0000000, 0x7ff, 0x4, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_RR_OP(srl, x20, x11, x28, 0x0, 0x0, 0x8, x1, 0, x2) # Testcase 20
- TEST_RR_OP(srl, x21, x10, x27, 0x1000, 0x800, 0x1f, x1, 4, x2) # Testcase 21
- TEST_RR_OP(srl, x22, x9, x26, 0x43210000, 0x7654321, 0x10, x1, 8, x2) # Testcase 22
- TEST_RR_OP(srl, x23, x8, x25, 0xfffffffe, 0x7fffffff, -0x1, x1, 12, x2) # Testcase 23
- TEST_RR_OP(srl, x24, x7, x24, 0x1, 0x1, 0x0, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_RR_OP(srl, x25, x6, x23, 0xffffffff, 0xffffffff, 0x0, x1, 0, x7) # Testcase 25
- TEST_RR_OP(srl, x26, x5, x22, 0x2468, 0x1234, -0x1, x1, 4, x7) # Testcase 26
- TEST_RR_OP(srl, x27, x4, x21, 0x0, 0x80000000, 0x4, x1, 8, x7) # Testcase 27
- TEST_RR_OP(srl, x28, x3, x20, 0xcc000000, -0x1234, 0x8, x1, 12, x7) # Testcase 28
- TEST_RR_OP(srl, x29, x2, x19, 0xfffffffe, -0x1, 0x1f, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_RR_OP(srl, x30, x1, x18, 0xf8010000, -0x7ff, 0x10, x2, 0, x3) # Testcase 30
- TEST_RR_OP(srl, x31, x0, x17, 0x0, 0x0, -0x1, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-SRLI-01.S b/riscof/suite/rv32i_m/I/I-SRLI-01.S
deleted file mode 100644
index 79882b11a804ee0db7381f2474bcfd4587227b2a..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SRLI-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test SRLI-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SRLI'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", srli)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_IMM_OP(srli, x0, x31, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_IMM_OP(srli, x1, x30, 0x1, 0x1, 0x0, x5, 4, x6) # Testcase 1
- TEST_IMM_OP(srli, x2, x29, 0x0, 0x0, 0x1, x5, 8, x6) # Testcase 2
- TEST_IMM_OP(srli, x3, x28, 0x7f, 0x7ff, 0x4, x5, 12, x6) # Testcase 3
- TEST_IMM_OP(srli, x4, x27, 0x0, 0x0, 0x8, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_IMM_OP(srli, x5, x26, 0x0, 0x800, 0x1f, x1, 0, x2) # Testcase 5
- TEST_IMM_OP(srli, x6, x25, 0x765, 0x7654321, 0x10, x1, 4, x2) # Testcase 6
- TEST_IMM_OP(srli, x7, x24, 0x3fffffff, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_IMM_OP(srli, x8, x23, 0x1, 0x1, 0x0, x1, 12, x2) # Testcase 8
- TEST_IMM_OP(srli, x9, x22, 0xffffffff, 0xffffffff, 0x0, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_IMM_OP(srli, x10, x21, 0x91a, 0x1234, 0x1, x1, 0, x7) # Testcase 10
- TEST_IMM_OP(srli, x11, x20, 0x8000000, 0x80000000, 0x4, x1, 4, x7) # Testcase 11
- TEST_IMM_OP(srli, x12, x19, 0xffffed, -0x1234, 0x8, x1, 8, x7) # Testcase 12
- TEST_IMM_OP(srli, x13, x18, 0x1, -0x1, 0x1f, x1, 12, x7) # Testcase 13
- TEST_IMM_OP(srli, x14, x17, 0xffff, -0x7ff, 0x10, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_IMM_OP(srli, x15, x16, 0x0, 0x0, 0x1, x2, 0, x3) # Testcase 15
- TEST_IMM_OP(srli, x16, x15, 0xffffffff, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_IMM_OP(srli, x17, x14, 0x1, 0x1, 0x0, x2, 8, x3) # Testcase 17
- TEST_IMM_OP(srli, x18, x13, 0x0, 0x0, 0x1, x2, 12, x3) # Testcase 18
- TEST_IMM_OP(srli, x19, x12, 0x7f, 0x7ff, 0x4, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_IMM_OP(srli, x20, x11, 0x0, 0x0, 0x8, x1, 0, x2) # Testcase 20
- TEST_IMM_OP(srli, x21, x10, 0x0, 0x800, 0x1f, x1, 4, x2) # Testcase 21
- TEST_IMM_OP(srli, x22, x9, 0x765, 0x7654321, 0x10, x1, 8, x2) # Testcase 22
- TEST_IMM_OP(srli, x23, x8, 0x3fffffff, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_IMM_OP(srli, x24, x7, 0x1, 0x1, 0x0, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_IMM_OP(srli, x25, x6, 0xffffffff, 0xffffffff, 0x0, x1, 0, x7) # Testcase 25
- TEST_IMM_OP(srli, x26, x5, 0x91a, 0x1234, 0x1, x1, 4, x7) # Testcase 26
- TEST_IMM_OP(srli, x27, x4, 0x8000000, 0x80000000, 0x4, x1, 8, x7) # Testcase 27
- TEST_IMM_OP(srli, x28, x3, 0xffffed, -0x1234, 0x8, x1, 12, x7) # Testcase 28
- TEST_IMM_OP(srli, x29, x2, 0x1, -0x1, 0x1f, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_IMM_OP(srli, x30, x1, 0xffff, -0x7ff, 0x10, x2, 0, x3) # Testcase 30
- TEST_IMM_OP(srli, x31, x0, 0x0, 0x0, 0x1, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-SUB-01.S b/riscof/suite/rv32i_m/I/I-SUB-01.S
deleted file mode 100644
index a73efe0983aa682e7b268b7ad611e3cdd09afba9..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SUB-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test SUB-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SUB'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", sub)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_RR_OP(sub, x0, x31, x16, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_RR_OP(sub, x1, x30, x15, 0x800, 0x1, -0x7ff, x5, 4, x6) # Testcase 1
- TEST_RR_OP(sub, x2, x29, x14, 0x1, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_RR_OP(sub, x3, x28, x13, 0x1a33, 0x7ff, -0x1234, x5, 12, x6) # Testcase 3
- TEST_RR_OP(sub, x4, x27, x12, 0x80000000, 0x0, 0x80000000, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_RR_OP(sub, x5, x26, x11, 0xfffff5cc, 0x800, 0x1234, x1, 0, x2) # Testcase 5
- TEST_RR_OP(sub, x6, x25, x10, 0x7654322, 0x7654321, 0xffffffff, x1, 4, x2) # Testcase 6
- TEST_RR_OP(sub, x7, x24, x9, 0x7ffffffe, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_RR_OP(sub, x8, x23, x8, 0x80000002, 0x1, 0x7fffffff, x1, 12, x2) # Testcase 8
- TEST_RR_OP(sub, x9, x22, x7, 0xf89abcde, 0xffffffff, 0x7654321, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_RR_OP(sub, x10, x21, x6, 0xa34, 0x1234, 0x800, x1, 0, x7) # Testcase 10
- TEST_RR_OP(sub, x11, x20, x5, 0x80000000, 0x80000000, 0x0, x1, 4, x7) # Testcase 11
- TEST_RR_OP(sub, x12, x19, x4, 0xffffe5cd, -0x1234, 0x7ff, x1, 8, x7) # Testcase 12
- TEST_RR_OP(sub, x13, x18, x3, 0x0, -0x1, -0x1, x1, 12, x7) # Testcase 13
- TEST_RR_OP(sub, x14, x17, x2, 0xfffff800, -0x7ff, 0x1, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_OP(sub, x15, x16, x1, 0x0, 0x0, 0x0, x2, 0, x3) # Testcase 15
- TEST_RR_OP(sub, x16, x15, x0, 0xffffffff, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_RR_OP(sub, x17, x14, x31, 0x800, 0x1, -0x7ff, x2, 8, x3) # Testcase 17
- TEST_RR_OP(sub, x18, x13, x30, 0x1, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_RR_OP(sub, x19, x12, x29, 0x1a33, 0x7ff, -0x1234, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_RR_OP(sub, x20, x11, x28, 0x80000000, 0x0, 0x80000000, x1, 0, x2) # Testcase 20
- TEST_RR_OP(sub, x21, x10, x27, 0xfffff5cc, 0x800, 0x1234, x1, 4, x2) # Testcase 21
- TEST_RR_OP(sub, x22, x9, x26, 0x7654322, 0x7654321, 0xffffffff, x1, 8, x2) # Testcase 22
- TEST_RR_OP(sub, x23, x8, x25, 0x7ffffffe, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_RR_OP(sub, x24, x7, x24, 0x80000002, 0x1, 0x7fffffff, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_RR_OP(sub, x25, x6, x23, 0xf89abcde, 0xffffffff, 0x7654321, x1, 0, x7) # Testcase 25
- TEST_RR_OP(sub, x26, x5, x22, 0xa34, 0x1234, 0x800, x1, 4, x7) # Testcase 26
- TEST_RR_OP(sub, x27, x4, x21, 0x80000000, 0x80000000, 0x0, x1, 8, x7) # Testcase 27
- TEST_RR_OP(sub, x28, x3, x20, 0xffffe5cd, -0x1234, 0x7ff, x1, 12, x7) # Testcase 28
- TEST_RR_OP(sub, x29, x2, x19, 0x0, -0x1, -0x1, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_RR_OP(sub, x30, x1, x18, 0xfffff800, -0x7ff, 0x1, x2, 0, x3) # Testcase 30
- TEST_RR_OP(sub, x31, x0, x17, 0x0, 0x0, 0x0, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-SW-01.S b/riscof/suite/rv32i_m/I/I-SW-01.S
deleted file mode 100644
index 3914ace02ff08c7bd70dd052fce09cdaada0fbbd..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-SW-01.S
+++ /dev/null
@@ -1,427 +0,0 @@
-# RISC-V Compliance Test SW-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'SW'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", sw-align)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # Addresses for test results
- la x5, test_1_res
-
- # Clear memory
- sw x0, 0x0(x5)
- # Test
- li x16, -0x1
- addi x31, x5, 0
- sw x16, 0x0(x31)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, -0x1)
- # Clear memory
- sw x0, 0x0(x5)
- # Test
- li x15, 0x1
- addi x30, x5, 0
- sw x15, 0x0(x30)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x1)
- # Clear memory
- sw x0, 0x0(x5)
- # Test
- li x14, 0x0
- addi x29, x5, 0
- sw x14, 0x0(x29)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x0)
- # Clear memory
- sw x0, -0x4(x5)
- # Test
- li x13, 0x7ff
- addi x28, x5, 0
- sw x13, -0x4(x28)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x7ff)
- # Clear memory
- sw x0, 0x0(x5)
- # Test
- li x12, 0x0
- addi x27, x5, 0
- sw x12, 0x0(x27)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x6, x27, test_1_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x6, x12, 0x0)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # Addresses for test results
- la x1, test_2_res
-
- # Clear memory
- sw x0, 0x4(x1)
- # Test
- li x11, 0x800
- addi x26, x1, 0
- sw x11, 0x4(x26)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x800)
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x10, 0x7654321
- addi x25, x1, 0
- sw x10, 0x0(x25)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x7654321)
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x9, 0x7fffffff
- addi x24, x1, 0
- sw x9, 0x0(x24)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x7fffffff)
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x8, 0x1
- addi x23, x1, 0
- sw x8, 0x0(x23)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x1)
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x7, 0xffffffff
- addi x22, x1, 0
- sw x7, 0x0(x22)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, test_2_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffffffff)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # Addresses for test results
- la x1, test_3_res
-
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x6, 0x1234
- addi x21, x1, 0
- sw x6, 0x0(x21)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x21, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x1234)
- # Clear memory
- sw x0, -0x4(x1)
- # Test
- li x5, 0x80000000
- addi x20, x1, 0
- sw x5, -0x4(x20)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x20, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x80000000)
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x4, -0x1234
- addi x19, x1, 0
- sw x4, 0x0(x19)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x19, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, -0x1234)
- # Clear memory
- sw x0, 0x4(x1)
- # Test
- li x3, -0x1
- addi x18, x1, 0
- sw x3, 0x4(x18)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x18, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, -0x1)
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x2, -0x7ff
- addi x17, x1, 0
- sw x2, 0x0(x17)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x17, test_3_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, -0x7ff)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # Addresses for test results
- la x2, test_4_res
-
- # Clear memory
- sw x0, 0x0(x2)
- # Test
- li x1, 0x0
- addi x16, x2, 0
- sw x1, 0x0(x16)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x1, 0x0)
- # Clear memory
- sw x0, 0x0(x2)
- # Test
- li x0, -0x1
- addi x15, x2, 0
- sw x0, 0x0(x15)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x15, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x0, 0)
- # Clear memory
- sw x0, 0x0(x2)
- # Test
- li x31, 0x1
- addi x14, x2, 0
- sw x31, 0x0(x14)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x14, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x31, 0x1)
- # Clear memory
- sw x0, 0x0(x2)
- # Test
- li x30, 0x0
- addi x13, x2, 0
- sw x30, 0x0(x13)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x13, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x30, 0x0)
- # Clear memory
- sw x0, -0x4(x2)
- # Test
- li x29, 0x7ff
- addi x12, x2, 0
- sw x29, -0x4(x12)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x12, test_4_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x29, 0x7ff)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # Addresses for test results
- la x1, test_5_res
-
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x28, 0x0
- addi x11, x1, 0
- sw x28, 0x0(x11)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0)
- # Clear memory
- sw x0, 0x4(x1)
- # Test
- li x27, 0x800
- addi x10, x1, 0
- sw x27, 0x4(x10)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x800)
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x26, 0x7654321
- addi x9, x1, 0
- sw x26, 0x0(x9)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x7654321)
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x25, 0x7fffffff
- addi x8, x1, 0
- sw x25, 0x0(x8)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x7fffffff)
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x24, 0x1
- addi x7, x1, 0
- sw x24, 0x0(x7)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, test_5_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x1)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # Addresses for test results
- la x1, test_6_res
-
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x23, 0xffffffff
- addi x6, x1, 0
- sw x23, 0x0(x6)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x23, 0xffffffff)
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x22, 0x1234
- addi x5, x1, 0
- sw x22, 0x0(x5)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x22, 0x1234)
- # Clear memory
- sw x0, -0x4(x1)
- # Test
- li x21, 0x80000000
- addi x4, x1, 0
- sw x21, -0x4(x4)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x21, 0x80000000)
- # Clear memory
- sw x0, 0x0(x1)
- # Test
- li x20, -0x1234
- addi x3, x1, 0
- sw x20, 0x0(x3)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x20, -0x1234)
- # Clear memory
- sw x0, 0x4(x1)
- # Test
- li x19, -0x1
- addi x2, x1, 0
- sw x19, 0x4(x2)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, test_6_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x7, x19, -0x1)
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # Addresses for test results
- la x2, test_7_res
-
- # Clear memory
- sw x0, 0x0(x2)
- # Test
- li x18, -0x7ff
- addi x1, x2, 0
- sw x18, 0x0(x1)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x1, test_7_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, -0x7ff)
- # Clear memory
- sw x0, 0x0(x2)
- # Test
- li x17, 0x0
- addi x1, x2, 0
- sw x17, 0x0(x1)
-
- #RVMODEL_IO_ASSERT_GPR_EQ(x3, x1, test_7_res)
- RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0)
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-XOR-01.S b/riscof/suite/rv32i_m/I/I-XOR-01.S
deleted file mode 100644
index bd3d662863125888ad21e685e09e3cabd976e027..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-XOR-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test XOR-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'XOR'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", xor)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_RR_OP(xor, x0, x31, x16, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_RR_OP(xor, x1, x30, x15, 0xfffff800, 0x1, -0x7ff, x5, 4, x6) # Testcase 1
- TEST_RR_OP(xor, x2, x29, x14, 0xffffffff, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_RR_OP(xor, x3, x28, x13, 0xffffea33, 0x7ff, -0x1234, x5, 12, x6) # Testcase 3
- TEST_RR_OP(xor, x4, x27, x12, 0x80000000, 0x0, 0x80000000, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_RR_OP(xor, x5, x26, x11, 0x1a34, 0x800, 0x1234, x1, 0, x2) # Testcase 5
- TEST_RR_OP(xor, x6, x25, x10, 0xf89abcde, 0x7654321, 0xffffffff, x1, 4, x2) # Testcase 6
- TEST_RR_OP(xor, x7, x24, x9, 0x7ffffffe, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_RR_OP(xor, x8, x23, x8, 0x7ffffffe, 0x1, 0x7fffffff, x1, 12, x2) # Testcase 8
- TEST_RR_OP(xor, x9, x22, x7, 0xf89abcde, 0xffffffff, 0x7654321, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_RR_OP(xor, x10, x21, x6, 0x1a34, 0x1234, 0x800, x1, 0, x7) # Testcase 10
- TEST_RR_OP(xor, x11, x20, x5, 0x80000000, 0x80000000, 0x0, x1, 4, x7) # Testcase 11
- TEST_RR_OP(xor, x12, x19, x4, 0xffffea33, -0x1234, 0x7ff, x1, 8, x7) # Testcase 12
- TEST_RR_OP(xor, x13, x18, x3, 0x0, -0x1, -0x1, x1, 12, x7) # Testcase 13
- TEST_RR_OP(xor, x14, x17, x2, 0xfffff800, -0x7ff, 0x1, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_OP(xor, x15, x16, x1, 0x0, 0x0, 0x0, x2, 0, x3) # Testcase 15
- TEST_RR_OP(xor, x16, x15, x0, 0xffffffff, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_RR_OP(xor, x17, x14, x31, 0xfffff800, 0x1, -0x7ff, x2, 8, x3) # Testcase 17
- TEST_RR_OP(xor, x18, x13, x30, 0xffffffff, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_RR_OP(xor, x19, x12, x29, 0xffffea33, 0x7ff, -0x1234, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_RR_OP(xor, x20, x11, x28, 0x80000000, 0x0, 0x80000000, x1, 0, x2) # Testcase 20
- TEST_RR_OP(xor, x21, x10, x27, 0x1a34, 0x800, 0x1234, x1, 4, x2) # Testcase 21
- TEST_RR_OP(xor, x22, x9, x26, 0xf89abcde, 0x7654321, 0xffffffff, x1, 8, x2) # Testcase 22
- TEST_RR_OP(xor, x23, x8, x25, 0x7ffffffe, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_RR_OP(xor, x24, x7, x24, 0x7ffffffe, 0x1, 0x7fffffff, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_RR_OP(xor, x25, x6, x23, 0xf89abcde, 0xffffffff, 0x7654321, x1, 0, x7) # Testcase 25
- TEST_RR_OP(xor, x26, x5, x22, 0x1a34, 0x1234, 0x800, x1, 4, x7) # Testcase 26
- TEST_RR_OP(xor, x27, x4, x21, 0x80000000, 0x80000000, 0x0, x1, 8, x7) # Testcase 27
- TEST_RR_OP(xor, x28, x3, x20, 0xffffea33, -0x1234, 0x7ff, x1, 12, x7) # Testcase 28
- TEST_RR_OP(xor, x29, x2, x19, 0x0, -0x1, -0x1, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_RR_OP(xor, x30, x1, x18, 0xfffff800, -0x7ff, 0x1, x2, 0, x3) # Testcase 30
- TEST_RR_OP(xor, x31, x0, x17, 0x0, 0x0, 0x0, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/I-XORI-01.S b/riscof/suite/rv32i_m/I/I-XORI-01.S
deleted file mode 100644
index 94fc0bbb3a4a342b876b1cffd9101118859be6d2..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/I/I-XORI-01.S
+++ /dev/null
@@ -1,171 +0,0 @@
-# RISC-V Compliance Test XORI-01
-#
-#
-# Copyright (c) 2019 Imperas Software Ltd., www.imperas.com
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
-# either express or implied.
-#
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-#
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.1
-# Description: Testing instruction 'XORI'.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", xori)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1\n")
-
-
- # address for test results
- la x5, test_1_res
-
- TEST_IMM_OP(xori, x0, x31, 0x0, -0x1, 0x0, x5, 0, x6) # Testcase 0
- TEST_IMM_OP(xori, x1, x30, 0xfffff800, 0x1, -0x7ff, x5, 4, x6) # Testcase 1
- TEST_IMM_OP(xori, x2, x29, 0xffffffff, 0x0, -0x1, x5, 8, x6) # Testcase 2
- TEST_IMM_OP(xori, x3, x28, 0xffffffff, 0x7ff, -0x800, x5, 12, x6) # Testcase 3
- TEST_IMM_OP(xori, x4, x27, 0xfffff800, 0x0, 0x800, x5, 16, x6) # Testcase 4
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2\n")
-
-
- # address for test results
- la x1, test_2_res
-
- TEST_IMM_OP(xori, x5, x26, 0xfffff000, 0x800, 0x800, x1, 0, x2) # Testcase 5
- TEST_IMM_OP(xori, x6, x25, 0xf89abb21, 0x7654321, 0x800, x1, 4, x2) # Testcase 6
- TEST_IMM_OP(xori, x7, x24, 0x7ffffffe, 0x7fffffff, 0x1, x1, 8, x2) # Testcase 7
- TEST_IMM_OP(xori, x8, x23, 0xfffff801, 0x1, 0x800, x1, 12, x2) # Testcase 8
- TEST_IMM_OP(xori, x9, x22, 0x7ff, 0xffffffff, 0x800, x1, 16, x2) # Testcase 9
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3\n")
-
-
- # address for test results
- la x1, test_3_res
-
- TEST_IMM_OP(xori, x10, x21, 0xffffea34, 0x1234, 0x800, x1, 0, x7) # Testcase 10
- TEST_IMM_OP(xori, x11, x20, 0x80000000, 0x80000000, 0x0, x1, 4, x7) # Testcase 11
- TEST_IMM_OP(xori, x12, x19, 0xffffea33, -0x1234, 0x7ff, x1, 8, x7) # Testcase 12
- TEST_IMM_OP(xori, x13, x18, 0x0, -0x1, -0x1, x1, 12, x7) # Testcase 13
- TEST_IMM_OP(xori, x14, x17, 0xfffff800, -0x7ff, 0x1, x1, 16, x7) # Testcase 14
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4\n")
-
-
- # address for test results
- la x2, test_4_res
-
- TEST_IMM_OP(xori, x15, x16, 0x0, 0x0, 0x0, x2, 0, x3) # Testcase 15
- TEST_IMM_OP(xori, x16, x15, 0xffffffff, -0x1, 0x0, x2, 4, x3) # Testcase 16
- TEST_IMM_OP(xori, x17, x14, 0xfffff800, 0x1, -0x7ff, x2, 8, x3) # Testcase 17
- TEST_IMM_OP(xori, x18, x13, 0xffffffff, 0x0, -0x1, x2, 12, x3) # Testcase 18
- TEST_IMM_OP(xori, x19, x12, 0xffffffff, 0x7ff, -0x800, x2, 16, x3) # Testcase 19
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5\n")
-
-
- # address for test results
- la x1, test_5_res
-
- TEST_IMM_OP(xori, x20, x11, 0xfffff800, 0x0, 0x800, x1, 0, x2) # Testcase 20
- TEST_IMM_OP(xori, x21, x10, 0xfffff000, 0x800, 0x800, x1, 4, x2) # Testcase 21
- TEST_IMM_OP(xori, x22, x9, 0xf89abb21, 0x7654321, 0x800, x1, 8, x2) # Testcase 22
- TEST_IMM_OP(xori, x23, x8, 0x7ffffffe, 0x7fffffff, 0x1, x1, 12, x2) # Testcase 23
- TEST_IMM_OP(xori, x24, x7, 0xfffff801, 0x1, 0x800, x1, 16, x2) # Testcase 24
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 6\n")
-
-
- # address for test results
- la x1, test_6_res
-
- TEST_IMM_OP(xori, x25, x6, 0x7ff, 0xffffffff, 0x800, x1, 0, x7) # Testcase 25
- TEST_IMM_OP(xori, x26, x5, 0xffffea34, 0x1234, 0x800, x1, 4, x7) # Testcase 26
- TEST_IMM_OP(xori, x27, x4, 0x80000000, 0x80000000, 0x0, x1, 8, x7) # Testcase 27
- TEST_IMM_OP(xori, x28, x3, 0xffffea33, -0x1234, 0x7ff, x1, 12, x7) # Testcase 28
- TEST_IMM_OP(xori, x29, x2, 0x0, -0x1, -0x1, x1, 16, x7) # Testcase 29
-
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test number 7\n")
-
-
- # address for test results
- la x2, test_7_res
-
- TEST_IMM_OP(xori, x30, x1, 0xfffff800, -0x7ff, 0x1, x2, 0, x3) # Testcase 30
- TEST_IMM_OP(xori, x31, x0, 0x0, 0x0, 0x0, x2, 4, x3) # Testcase 31
-
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
-
diff --git a/riscof/suite/rv32i_m/I/add-01.S b/riscof/suite/rv32i_m/I/add-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..0e34618e0e6ebee8349e0c9c3711dc5939237a46
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/add-01.S
@@ -0,0 +1,3024 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the add instruction of the RISC-V I extension for the add covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",add)
+
+RVTEST_SIGBASE( x3,signature_x3_1)
+
+inst_0:
+// rs2 == rd != rs1, rs1==x4, rs2==x24, rd==x24, rs1_val > 0 and rs2_val > 0, rs2_val == 1, rs1_val == (2**(xlen-1)-1), rs1_val != rs2_val, rs1_val == 2147483647
+// opcode: add ; op1:x4; op2:x24; dest:x24; op1val:0x7fffffff; op2val:0x1
+TEST_RR_OP(add, x24, x4, x24, 0x80000000, 0x7fffffff, 0x1, x3, 0, x18)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x10, rs2==x10, rd==x28, rs1_val > 0 and rs2_val < 0, rs2_val == -257, rs1_val == 131072
+// opcode: add ; op1:x10; op2:x10; dest:x28; op1val:0x20000; op2val:0x20000
+TEST_RR_OP(add, x28, x10, x10, 0x40000, 0x20000, 0x20000, x3, 4, x18)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x21, rs2==x21, rd==x21, rs1_val < 0 and rs2_val < 0, rs1_val == -16777217
+// opcode: add ; op1:x21; op2:x21; dest:x21; op1val:-0x1000001; op2val:-0x1000001
+TEST_RR_OP(add, x21, x21, x21, 0xfdfffffe, -0x1000001, -0x1000001, x3, 8, x18)
+
+inst_3:
+// rs1 == rd != rs2, rs1==x22, rs2==x31, rd==x22, rs1_val < 0 and rs2_val > 0, rs1_val == -2, rs2_val == 262144
+// opcode: add ; op1:x22; op2:x31; dest:x22; op1val:-0x2; op2val:0x40000
+TEST_RR_OP(add, x22, x22, x31, 0x3fffe, -0x2, 0x40000, x3, 12, x18)
+
+inst_4:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x12, rs2==x6, rd==x11, rs1_val == rs2_val, rs1_val==1431655766 and rs2_val==1431655766
+// opcode: add ; op1:x12; op2:x6; dest:x11; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(add, x11, x12, x6, 0xaaaaaaac, 0x55555556, 0x55555556, x3, 16, x18)
+
+inst_5:
+// rs1==x29, rs2==x13, rd==x10, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648, rs1_val == 2
+// opcode: add ; op1:x29; op2:x13; dest:x10; op1val:0x2; op2val:-0x80000000
+TEST_RR_OP(add, x10, x29, x13, 0x80000002, 0x2, -0x80000000, x3, 20, x18)
+
+inst_6:
+// rs1==x31, rs2==x5, rd==x26, rs2_val == 0, rs1_val == -17
+// opcode: add ; op1:x31; op2:x5; dest:x26; op1val:-0x11; op2val:0x0
+TEST_RR_OP(add, x26, x31, x5, 0xffffffef, -0x11, 0x0, x3, 24, x18)
+
+inst_7:
+// rs1==x2, rs2==x1, rd==x7, rs2_val == (2**(xlen-1)-1), rs2_val == 2147483647
+// opcode: add ; op1:x2; op2:x1; dest:x7; op1val:0x66666666; op2val:0x7fffffff
+TEST_RR_OP(add, x7, x2, x1, 0xe6666665, 0x66666666, 0x7fffffff, x3, 28, x18)
+
+inst_8:
+// rs1==x8, rs2==x25, rd==x14, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648, rs2_val == -1431655766
+// opcode: add ; op1:x8; op2:x25; dest:x14; op1val:-0x80000000; op2val:-0x55555556
+TEST_RR_OP(add, x14, x8, x25, 0x2aaaaaaa, -0x80000000, -0x55555556, x3, 32, x18)
+
+inst_9:
+// rs1==x13, rs2==x8, rd==x1, rs1_val == 0, rs2_val == -33554433
+// opcode: add ; op1:x13; op2:x8; dest:x1; op1val:0x0; op2val:-0x2000001
+TEST_RR_OP(add, x1, x13, x8, 0xfdffffff, 0x0, -0x2000001, x3, 36, x18)
+
+inst_10:
+// rs1==x28, rs2==x9, rd==x0, rs1_val == 1, rs2_val == 8388608
+// opcode: add ; op1:x28; op2:x9; dest:x0; op1val:0x1; op2val:0x800000
+TEST_RR_OP(add, x0, x28, x9, 0, 0x1, 0x800000, x3, 40, x18)
+
+inst_11:
+// rs1==x14, rs2==x4, rd==x20, rs2_val == 2,
+// opcode: add ; op1:x14; op2:x4; dest:x20; op1val:0x7; op2val:0x2
+TEST_RR_OP(add, x20, x14, x4, 0x9, 0x7, 0x2, x3, 44, x18)
+
+inst_12:
+// rs1==x7, rs2==x19, rd==x16, rs2_val == 4, rs1_val == 8
+// opcode: add ; op1:x7; op2:x19; dest:x16; op1val:0x8; op2val:0x4
+TEST_RR_OP(add, x16, x7, x19, 0xc, 0x8, 0x4, x3, 48, x18)
+
+inst_13:
+// rs1==x23, rs2==x29, rd==x8, rs2_val == 8, rs1_val == 2048
+// opcode: add ; op1:x23; op2:x29; dest:x8; op1val:0x800; op2val:0x8
+TEST_RR_OP(add, x8, x23, x29, 0x808, 0x800, 0x8, x3, 52, x18)
+
+inst_14:
+// rs1==x5, rs2==x27, rd==x13, rs2_val == 16,
+// opcode: add ; op1:x5; op2:x27; dest:x13; op1val:0x0; op2val:0x10
+TEST_RR_OP(add, x13, x5, x27, 0x10, 0x0, 0x10, x3, 56, x18)
+
+inst_15:
+// rs1==x25, rs2==x20, rd==x27, rs2_val == 32,
+// opcode: add ; op1:x25; op2:x20; dest:x27; op1val:0x55555556; op2val:0x20
+TEST_RR_OP(add, x27, x25, x20, 0x55555576, 0x55555556, 0x20, x3, 60, x18)
+
+inst_16:
+// rs1==x15, rs2==x26, rd==x17, rs2_val == 64,
+// opcode: add ; op1:x15; op2:x26; dest:x17; op1val:-0x11; op2val:0x40
+TEST_RR_OP(add, x17, x15, x26, 0x2f, -0x11, 0x40, x3, 64, x18)
+RVTEST_SIGBASE( x8,signature_x8_0)
+
+inst_17:
+// rs1==x17, rs2==x2, rd==x29, rs2_val == 128, rs1_val == -5
+// opcode: add ; op1:x17; op2:x2; dest:x29; op1val:-0x5; op2val:0x80
+TEST_RR_OP(add, x29, x17, x2, 0x7b, -0x5, 0x80, x8, 0, x10)
+
+inst_18:
+// rs1==x24, rs2==x17, rd==x4, rs2_val == 256, rs1_val == 32
+// opcode: add ; op1:x24; op2:x17; dest:x4; op1val:0x20; op2val:0x100
+TEST_RR_OP(add, x4, x24, x17, 0x120, 0x20, 0x100, x8, 4, x10)
+
+inst_19:
+// rs1==x16, rs2==x11, rd==x2, rs2_val == 512, rs1_val == 1073741824
+// opcode: add ; op1:x16; op2:x11; dest:x2; op1val:0x40000000; op2val:0x200
+TEST_RR_OP(add, x2, x16, x11, 0x40000200, 0x40000000, 0x200, x8, 8, x10)
+
+inst_20:
+// rs1==x0, rs2==x16, rd==x6, rs2_val == 1024,
+// opcode: add ; op1:x0; op2:x16; dest:x6; op1val:0x0; op2val:0x400
+TEST_RR_OP(add, x6, x0, x16, 0x400, 0x0, 0x400, x8, 12, x10)
+
+inst_21:
+// rs1==x11, rs2==x3, rd==x31, rs2_val == 2048,
+// opcode: add ; op1:x11; op2:x3; dest:x31; op1val:-0x55555555; op2val:0x800
+TEST_RR_OP(add, x31, x11, x3, 0xaaaab2ab, -0x55555555, 0x800, x8, 16, x10)
+
+inst_22:
+// rs1==x18, rs2==x0, rd==x12, rs2_val == 4096, rs1_val == 4
+// opcode: add ; op1:x18; op2:x0; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(add, x12, x18, x0, 0x4, 0x4, 0x0, x8, 20, x10)
+
+inst_23:
+// rs1==x30, rs2==x7, rd==x9, rs2_val == 8192, rs1_val == -33554433
+// opcode: add ; op1:x30; op2:x7; dest:x9; op1val:-0x2000001; op2val:0x2000
+TEST_RR_OP(add, x9, x30, x7, 0xfe001fff, -0x2000001, 0x2000, x8, 24, x10)
+
+inst_24:
+// rs1==x3, rs2==x30, rd==x5, rs2_val == 16384,
+// opcode: add ; op1:x3; op2:x30; dest:x5; op1val:0xb503; op2val:0x4000
+TEST_RR_OP(add, x5, x3, x30, 0xf503, 0xb503, 0x4000, x8, 28, x10)
+
+inst_25:
+// rs1==x27, rs2==x28, rd==x18, rs2_val == 32768,
+// opcode: add ; op1:x27; op2:x28; dest:x18; op1val:-0xb503; op2val:0x8000
+TEST_RR_OP(add, x18, x27, x28, 0xffffcafd, -0xb503, 0x8000, x8, 32, x10)
+
+inst_26:
+// rs1==x9, rs2==x14, rd==x15, rs2_val == 65536, rs1_val == -513
+// opcode: add ; op1:x9; op2:x14; dest:x15; op1val:-0x201; op2val:0x10000
+TEST_RR_OP(add, x15, x9, x14, 0xfdff, -0x201, 0x10000, x8, 36, x10)
+
+inst_27:
+// rs1==x26, rs2==x15, rd==x3, rs2_val == 131072, rs1_val == 64
+// opcode: add ; op1:x26; op2:x15; dest:x3; op1val:0x40; op2val:0x20000
+TEST_RR_OP(add, x3, x26, x15, 0x20040, 0x40, 0x20000, x8, 40, x10)
+
+inst_28:
+// rs1==x1, rs2==x18, rd==x23, rs2_val == 524288,
+// opcode: add ; op1:x1; op2:x18; dest:x23; op1val:0x3; op2val:0x80000
+TEST_RR_OP(add, x23, x1, x18, 0x80003, 0x3, 0x80000, x8, 44, x10)
+
+inst_29:
+// rs1==x6, rs2==x12, rd==x30, rs2_val == 1048576, rs1_val == -65537
+// opcode: add ; op1:x6; op2:x12; dest:x30; op1val:-0x10001; op2val:0x100000
+TEST_RR_OP(add, x30, x6, x12, 0xeffff, -0x10001, 0x100000, x8, 48, x10)
+
+inst_30:
+// rs1==x20, rs2==x22, rd==x19, rs2_val == 2097152, rs1_val == -4194305
+// opcode: add ; op1:x20; op2:x22; dest:x19; op1val:-0x400001; op2val:0x200000
+TEST_RR_OP(add, x19, x20, x22, 0xffdfffff, -0x400001, 0x200000, x8, 52, x10)
+
+inst_31:
+// rs1==x19, rs2==x23, rd==x25, rs2_val == 4194304, rs1_val == 4194304
+// opcode: add ; op1:x19; op2:x23; dest:x25; op1val:0x400000; op2val:0x400000
+TEST_RR_OP(add, x25, x19, x23, 0x800000, 0x400000, 0x400000, x8, 56, x10)
+
+inst_32:
+// rs2_val == 16777216,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x1000000
+TEST_RR_OP(add, x12, x10, x11, 0xff4afd, -0xb503, 0x1000000, x8, 60, x2)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_33:
+// rs2_val == 33554432, rs1_val == -131073
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x2000000
+TEST_RR_OP(add, x12, x10, x11, 0x1fdffff, -0x20001, 0x2000000, x1, 0, x2)
+
+inst_34:
+// rs2_val == 67108864,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4000000
+TEST_RR_OP(add, x12, x10, x11, 0x4000000, 0x0, 0x4000000, x1, 4, x2)
+
+inst_35:
+// rs2_val == 134217728, rs1_val == -32769
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x8000000
+TEST_RR_OP(add, x12, x10, x11, 0x7ff7fff, -0x8001, 0x8000000, x1, 8, x2)
+
+inst_36:
+// rs2_val == 268435456,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x10000000
+TEST_RR_OP(add, x12, x10, x11, 0x50000000, 0x40000000, 0x10000000, x1, 12, x2)
+
+inst_37:
+// rs2_val == 536870912, rs1_val == -16385
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x20000000
+TEST_RR_OP(add, x12, x10, x11, 0x1fffbfff, -0x4001, 0x20000000, x1, 16, x2)
+
+inst_38:
+// rs2_val == 1073741824, rs1_val == 65536
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x40000000
+TEST_RR_OP(add, x12, x10, x11, 0x40010000, 0x10000, 0x40000000, x1, 20, x2)
+
+inst_39:
+// rs2_val == -2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x2
+TEST_RR_OP(add, x12, x10, x11, 0x2, 0x4, -0x2, x1, 24, x2)
+
+inst_40:
+// rs2_val == -3, rs1_val == -33
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x3
+TEST_RR_OP(add, x12, x10, x11, 0xffffffdc, -0x21, -0x3, x1, 28, x2)
+
+inst_41:
+// rs2_val == -5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x5
+TEST_RR_OP(add, x12, x10, x11, 0xffffffda, -0x21, -0x5, x1, 32, x2)
+
+inst_42:
+// rs2_val == -9,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:-0x9
+TEST_RR_OP(add, x12, x10, x11, 0xfffdfff6, -0x20001, -0x9, x1, 36, x2)
+
+inst_43:
+// rs2_val == -17,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x11
+TEST_RR_OP(add, x12, x10, x11, 0x7ef, 0x800, -0x11, x1, 40, x2)
+
+inst_44:
+// rs2_val == -33, rs1_val == 536870912
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:-0x21
+TEST_RR_OP(add, x12, x10, x11, 0x1fffffdf, 0x20000000, -0x21, x1, 44, x2)
+
+inst_45:
+// rs2_val == -65,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffff; op2val:-0x41
+TEST_RR_OP(add, x12, x10, x11, 0x7fffffbe, 0x7fffffff, -0x41, x1, 48, x2)
+
+inst_46:
+// rs2_val == -129, rs1_val == -8388609
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:-0x81
+TEST_RR_OP(add, x12, x10, x11, 0xff7fff7e, -0x800001, -0x81, x1, 52, x2)
+
+inst_47:
+// rs2_val == -513,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x201
+TEST_RR_OP(add, x12, x10, x11, 0xffff48fb, -0xb504, -0x201, x1, 56, x2)
+
+inst_48:
+// rs2_val == -1025, rs1_val == -4097
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:-0x401
+TEST_RR_OP(add, x12, x10, x11, 0xffffebfe, -0x1001, -0x401, x1, 60, x2)
+
+inst_49:
+// rs2_val == -2049,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x801
+TEST_RR_OP(add, x12, x10, x11, 0xfffff803, 0x4, -0x801, x1, 64, x2)
+
+inst_50:
+// rs2_val == -4097,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x1001
+TEST_RR_OP(add, x12, x10, x11, 0xffff3afc, -0xb503, -0x1001, x1, 68, x2)
+
+inst_51:
+// rs2_val == -8193,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x2001
+TEST_RR_OP(add, x12, x10, x11, 0x9503, 0xb504, -0x2001, x1, 72, x2)
+
+inst_52:
+// rs2_val == -16385,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffff; op2val:-0x4001
+TEST_RR_OP(add, x12, x10, x11, 0x7fffbffe, 0x7fffffff, -0x4001, x1, 76, x2)
+
+inst_53:
+// rs2_val == -32769, rs1_val == -3
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0x8001
+TEST_RR_OP(add, x12, x10, x11, 0xffff7ffc, -0x3, -0x8001, x1, 80, x2)
+
+inst_54:
+// rs2_val == -65537,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x10001
+TEST_RR_OP(add, x12, x10, x11, 0xffffb502, 0xb503, -0x10001, x1, 84, x2)
+
+inst_55:
+// rs2_val == -131073, rs1_val == -1431655766
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x20001
+TEST_RR_OP(add, x12, x10, x11, 0xaaa8aaa9, -0x55555556, -0x20001, x1, 88, x2)
+
+inst_56:
+// rs2_val == -262145, rs1_val == 16777216
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:-0x40001
+TEST_RR_OP(add, x12, x10, x11, 0xfbffff, 0x1000000, -0x40001, x1, 92, x2)
+
+inst_57:
+// rs2_val == -524289,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffff; op2val:-0x80001
+TEST_RR_OP(add, x12, x10, x11, 0x7ff7fffe, 0x7fffffff, -0x80001, x1, 96, x2)
+
+inst_58:
+// rs2_val == -1048577,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x100001
+TEST_RR_OP(add, x12, x10, x11, 0xfff007ff, 0x800, -0x100001, x1, 100, x2)
+
+inst_59:
+// rs2_val == -2097153,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:-0x200001
+TEST_RR_OP(add, x12, x10, x11, 0xffe00007, 0x8, -0x200001, x1, 104, x2)
+
+inst_60:
+// rs2_val == -4194305, rs1_val == 8192
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:-0x400001
+TEST_RR_OP(add, x12, x10, x11, 0xffc01fff, 0x2000, -0x400001, x1, 108, x2)
+
+inst_61:
+// rs2_val == -8388609,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x800001
+TEST_RR_OP(add, x12, x10, x11, 0xff7fffde, -0x21, -0x800001, x1, 112, x2)
+
+inst_62:
+// rs2_val == -16777217, rs1_val == -2097153
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:-0x1000001
+TEST_RR_OP(add, x12, x10, x11, 0xfedffffe, -0x200001, -0x1000001, x1, 116, x2)
+
+inst_63:
+// rs2_val == -67108865,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x4000001
+TEST_RR_OP(add, x12, x10, x11, 0xfc000001, 0x2, -0x4000001, x1, 120, x2)
+
+inst_64:
+// rs2_val == -134217729, rs1_val == 1431655765
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x8000001
+TEST_RR_OP(add, x12, x10, x11, 0x4d555554, 0x55555555, -0x8000001, x1, 124, x2)
+
+inst_65:
+// rs2_val == -268435457,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x10000001
+TEST_RR_OP(add, x12, x10, x11, 0xf001ffff, 0x20000, -0x10000001, x1, 128, x2)
+
+inst_66:
+// rs2_val == -536870913,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x20000001
+TEST_RR_OP(add, x12, x10, x11, 0xe001ffff, 0x20000, -0x20000001, x1, 132, x2)
+
+inst_67:
+// rs2_val == -1073741825,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:-0x40000001
+TEST_RR_OP(add, x12, x10, x11, 0xc0000006, 0x7, -0x40000001, x1, 136, x2)
+
+inst_68:
+// rs2_val == 1431655765, rs1_val == 1048576
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x55655555, 0x100000, 0x55555555, x1, 140, x2)
+
+inst_69:
+// rs1_val == 16,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x33333343, 0x10, 0x33333333, x1, 144, x2)
+
+inst_70:
+// rs1_val == 128,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x333333b2, 0x80, 0x33333332, x1, 148, x2)
+
+inst_71:
+// rs1_val == 256,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0xa
+TEST_RR_OP(add, x12, x10, x11, 0xf6, 0x100, -0xa, x1, 152, x2)
+
+inst_72:
+// rs1_val == 512,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xffff4cfd, 0x200, -0xb503, x1, 156, x2)
+
+inst_73:
+// rs1_val == 1024,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x55555955, 0x400, 0x55555555, x1, 160, x2)
+
+inst_74:
+// rs1_val == 4096,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x1005, 0x1000, 0x5, x1, 164, x2)
+
+inst_75:
+// rs1_val == 16384,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:-0x801
+TEST_RR_OP(add, x12, x10, x11, 0x37ff, 0x4000, -0x801, x1, 168, x2)
+
+inst_76:
+// rs1_val == 32768,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x1000001
+TEST_RR_OP(add, x12, x10, x11, 0xff007fff, 0x8000, -0x1000001, x1, 172, x2)
+
+inst_77:
+// rs1_val == 262144,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0x1000000
+TEST_RR_OP(add, x12, x10, x11, 0x1040000, 0x40000, 0x1000000, x1, 176, x2)
+
+inst_78:
+// rs1_val == 524288,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0x8000
+TEST_RR_OP(add, x12, x10, x11, 0x88000, 0x80000, 0x8000, x1, 180, x2)
+
+inst_79:
+// rs1_val == 2097152,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0x10000000
+TEST_RR_OP(add, x12, x10, x11, 0x10200000, 0x200000, 0x10000000, x1, 184, x2)
+
+inst_80:
+// rs1_val == 8388608,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:-0x401
+TEST_RR_OP(add, x12, x10, x11, 0x7ffbff, 0x800000, -0x401, x1, 188, x2)
+
+inst_81:
+// rs1_val == 33554432,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x57555555, 0x2000000, 0x55555555, x1, 192, x2)
+
+inst_82:
+// rs1_val == 67108864,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x8000
+TEST_RR_OP(add, x12, x10, x11, 0x4008000, 0x4000000, 0x8000, x1, 196, x2)
+
+inst_83:
+// rs1_val == 134217728,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x3b333332, 0x8000000, 0x33333332, x1, 200, x2)
+
+inst_84:
+// rs1_val == 268435456,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:-0x40000000
+TEST_RR_OP(add, x12, x10, x11, 0xd0000000, 0x10000000, -0x40000000, x1, 204, x2)
+
+inst_85:
+// rs1_val == -9,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:-0x80001
+TEST_RR_OP(add, x12, x10, x11, 0xfff7fff6, -0x9, -0x80001, x1, 208, x2)
+
+inst_86:
+// rs1_val == -65,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:-0x80000000
+TEST_RR_OP(add, x12, x10, x11, 0x7fffffbf, -0x41, -0x80000000, x1, 212, x2)
+
+inst_87:
+// rs1_val == -129,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaa29, -0x81, -0x55555556, x1, 216, x2)
+
+inst_88:
+// rs1_val == -257,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xffffff02, -0x101, 0x3, x1, 220, x2)
+
+inst_89:
+// rs1_val == -1025,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:-0x8
+TEST_RR_OP(add, x12, x10, x11, 0xfffffbf7, -0x401, -0x8, x1, 224, x2)
+
+inst_90:
+// rs1_val == -2049,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xfffff802, -0x801, 0x3, x1, 228, x2)
+
+inst_91:
+// rs1_val == -8193,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xffffe001, -0x2001, 0x2, x1, 232, x2)
+
+inst_92:
+// rs1_val == -262145,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:-0x800001
+TEST_RR_OP(add, x12, x10, x11, 0xff7bfffe, -0x40001, -0x800001, x1, 236, x2)
+
+inst_93:
+// rs1_val == -524289,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xfff8b503, -0x80001, 0xb504, x1, 240, x2)
+
+inst_94:
+// rs1_val == -1048577,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:-0x40000000
+TEST_RR_OP(add, x12, x10, x11, 0xbfefffff, -0x100001, -0x40000000, x1, 244, x2)
+
+inst_95:
+// rs1_val == -67108865,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x62666664, -0x4000001, 0x66666665, x1, 248, x2)
+
+inst_96:
+// rs1_val == -134217729,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x10000001
+TEST_RR_OP(add, x12, x10, x11, 0xe7fffffe, -0x8000001, -0x10000001, x1, 252, x2)
+
+inst_97:
+// rs1_val == -268435457,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x800
+TEST_RR_OP(add, x12, x10, x11, 0xf00007ff, -0x10000001, 0x800, x1, 256, x2)
+
+inst_98:
+// rs1_val == -536870913,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x20000
+TEST_RR_OP(add, x12, x10, x11, 0xe001ffff, -0x20000001, 0x20000, x1, 260, x2)
+
+inst_99:
+// rs1_val == -1073741825,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:-0x81
+TEST_RR_OP(add, x12, x10, x11, 0xbfffff7e, -0x40000001, -0x81, x1, 264, x2)
+
+inst_100:
+// rs1_val==3 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x6, 0x3, 0x3, x1, 268, x2)
+
+inst_101:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x55555558, 0x3, 0x55555555, x1, 272, x2)
+
+inst_102:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaad, 0x3, -0x55555556, x1, 276, x2)
+
+inst_103:
+// rs1_val==3 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x8, 0x3, 0x5, x1, 280, x2)
+
+inst_104:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x33333336, 0x3, 0x33333333, x1, 284, x2)
+
+inst_105:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x66666669, 0x3, 0x66666666, x1, 288, x2)
+
+inst_106:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xffff4aff, 0x3, -0xb504, x1, 292, x2)
+
+inst_107:
+// rs1_val==3 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xb507, 0x3, 0xb504, x1, 296, x2)
+
+inst_108:
+// rs1_val==3 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x5, 0x3, 0x2, x1, 300, x2)
+
+inst_109:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x55555557, 0x3, 0x55555554, x1, 304, x2)
+
+inst_110:
+// rs1_val==3 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x3, 0x3, 0x0, x1, 308, x2)
+
+inst_111:
+// rs1_val==3 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x7, 0x3, 0x4, x1, 312, x2)
+
+inst_112:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x33333335, 0x3, 0x33333332, x1, 316, x2)
+
+inst_113:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x66666668, 0x3, 0x66666665, x1, 320, x2)
+
+inst_114:
+// rs1_val==3 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xb506, 0x3, 0xb503, x1, 324, x2)
+
+inst_115:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x55555559, 0x3, 0x55555556, x1, 328, x2)
+
+inst_116:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaae, 0x3, -0x55555555, x1, 332, x2)
+
+inst_117:
+// rs1_val==3 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x9, 0x3, 0x6, x1, 336, x2)
+
+inst_118:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x33333337, 0x3, 0x33333334, x1, 340, x2)
+
+inst_119:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x6666666a, 0x3, 0x66666667, x1, 344, x2)
+
+inst_120:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b00, 0x3, -0xb503, x1, 348, x2)
+
+inst_121:
+// rs1_val==3 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0xb508, 0x3, 0xb505, x1, 352, x2)
+
+inst_122:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x55555558, 0x55555555, 0x3, x1, 356, x2)
+
+inst_123:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaa, 0x55555555, 0x55555555, x1, 360, x2)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff, 0x55555555, -0x55555556, x1, 364, x2)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x5555555a, 0x55555555, 0x5, x1, 368, x2)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x88888888, 0x55555555, 0x33333333, x1, 372, x2)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbb, 0x55555555, 0x66666666, x1, 376, x2)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x5554a051, 0x55555555, -0xb504, x1, 380, x2)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x55560a59, 0x55555555, 0xb504, x1, 384, x2)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x55555557, 0x55555555, 0x2, x1, 388, x2)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaa9, 0x55555555, 0x55555554, x1, 392, x2)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x55555555, 0x55555555, 0x0, x1, 396, x2)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x55555559, 0x55555555, 0x4, x1, 400, x2)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x88888887, 0x55555555, 0x33333332, x1, 404, x2)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbba, 0x55555555, 0x66666665, x1, 408, x2)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x55560a58, 0x55555555, 0xb503, x1, 412, x2)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab, 0x55555555, 0x55555556, x1, 416, x2)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x0, 0x55555555, -0x55555555, x1, 420, x2)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x5555555b, 0x55555555, 0x6, x1, 424, x2)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x88888889, 0x55555555, 0x33333334, x1, 428, x2)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbc, 0x55555555, 0x66666667, x1, 432, x2)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x5554a052, 0x55555555, -0xb503, x1, 436, x2)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x55560a5a, 0x55555555, 0xb505, x1, 440, x2)
+
+inst_144:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaad, -0x55555556, 0x3, x1, 444, x2)
+
+inst_145:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff, -0x55555556, 0x55555555, x1, 448, x2)
+
+inst_146:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x55555554, -0x55555556, -0x55555556, x1, 452, x2)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaf, -0x55555556, 0x5, x1, 456, x2)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddd, -0x55555556, 0x33333333, x1, 460, x2)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x11111110, -0x55555556, 0x66666666, x1, 464, x2)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xaaa9f5a6, -0x55555556, -0xb504, x1, 468, x2)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xaaab5fae, -0x55555556, 0xb504, x1, 472, x2)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaac, -0x55555556, 0x2, x1, 476, x2)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffe, -0x55555556, 0x55555554, x1, 480, x2)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaa, -0x55555556, 0x0, x1, 484, x2)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaae, -0x55555556, 0x4, x1, 488, x2)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddc, -0x55555556, 0x33333332, x1, 492, x2)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x1111110f, -0x55555556, 0x66666665, x1, 496, x2)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xaaab5fad, -0x55555556, 0xb503, x1, 500, x2)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x0, -0x55555556, 0x55555556, x1, 504, x2)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x55555555, -0x55555556, -0x55555555, x1, 508, x2)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaab0, -0x55555556, 0x6, x1, 512, x2)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0xddddddde, -0x55555556, 0x33333334, x1, 516, x2)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x11111111, -0x55555556, 0x66666667, x1, 520, x2)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xaaa9f5a7, -0x55555556, -0xb503, x1, 524, x2)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0xaaab5faf, -0x55555556, 0xb505, x1, 528, x2)
+
+inst_166:
+// rs1_val==5 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x8, 0x5, 0x3, x1, 532, x2)
+
+inst_167:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x5555555a, 0x5, 0x55555555, x1, 536, x2)
+
+inst_168:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaf, 0x5, -0x55555556, x1, 540, x2)
+
+inst_169:
+// rs1_val==5 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xa, 0x5, 0x5, x1, 544, x2)
+
+inst_170:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x33333338, 0x5, 0x33333333, x1, 548, x2)
+
+inst_171:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x6666666b, 0x5, 0x66666666, x1, 552, x2)
+
+inst_172:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b01, 0x5, -0xb504, x1, 556, x2)
+
+inst_173:
+// rs1_val==5 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xb509, 0x5, 0xb504, x1, 560, x2)
+
+inst_174:
+// rs1_val==5 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x7, 0x5, 0x2, x1, 564, x2)
+
+inst_175:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x55555559, 0x5, 0x55555554, x1, 568, x2)
+
+inst_176:
+// rs1_val==5 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x5, 0x5, 0x0, x1, 572, x2)
+
+inst_177:
+// rs1_val==5 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x9, 0x5, 0x4, x1, 576, x2)
+
+inst_178:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x33333337, 0x5, 0x33333332, x1, 580, x2)
+
+inst_179:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x6666666a, 0x5, 0x66666665, x1, 584, x2)
+
+inst_180:
+// rs1_val==5 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xb508, 0x5, 0xb503, x1, 588, x2)
+
+inst_181:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x5555555b, 0x5, 0x55555556, x1, 592, x2)
+
+inst_182:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaab0, 0x5, -0x55555555, x1, 596, x2)
+
+inst_183:
+// rs1_val==5 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xb, 0x5, 0x6, x1, 600, x2)
+
+inst_184:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x33333339, 0x5, 0x33333334, x1, 604, x2)
+
+inst_185:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x6666666c, 0x5, 0x66666667, x1, 608, x2)
+
+inst_186:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b02, 0x5, -0xb503, x1, 612, x2)
+
+inst_187:
+// rs1_val==5 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0xb50a, 0x5, 0xb505, x1, 616, x2)
+
+inst_188:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x33333336, 0x33333333, 0x3, x1, 620, x2)
+
+inst_189:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x88888888, 0x33333333, 0x55555555, x1, 624, x2)
+
+inst_190:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddd, 0x33333333, -0x55555556, x1, 628, x2)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x33333338, 0x33333333, 0x5, x1, 632, x2)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x66666666, 0x33333333, 0x33333333, x1, 636, x2)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x99999999, 0x33333333, 0x66666666, x1, 640, x2)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x33327e2f, 0x33333333, -0xb504, x1, 644, x2)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x3333e837, 0x33333333, 0xb504, x1, 648, x2)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x33333335, 0x33333333, 0x2, x1, 652, x2)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x88888887, 0x33333333, 0x55555554, x1, 656, x2)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x33333333, 0x33333333, 0x0, x1, 660, x2)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x33333337, 0x33333333, 0x4, x1, 664, x2)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x66666665, 0x33333333, 0x33333332, x1, 668, x2)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x99999998, 0x33333333, 0x66666665, x1, 672, x2)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x3333e836, 0x33333333, 0xb503, x1, 676, x2)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x88888889, 0x33333333, 0x55555556, x1, 680, x2)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xddddddde, 0x33333333, -0x55555555, x1, 684, x2)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x33333339, 0x33333333, 0x6, x1, 688, x2)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x66666667, 0x33333333, 0x33333334, x1, 692, x2)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x9999999a, 0x33333333, 0x66666667, x1, 696, x2)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x33327e30, 0x33333333, -0xb503, x1, 700, x2)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x3333e838, 0x33333333, 0xb505, x1, 704, x2)
+
+inst_210:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x66666669, 0x66666666, 0x3, x1, 708, x2)
+
+inst_211:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbb, 0x66666666, 0x55555555, x1, 712, x2)
+
+inst_212:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x11111110, 0x66666666, -0x55555556, x1, 716, x2)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x6666666b, 0x66666666, 0x5, x1, 720, x2)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x99999999, 0x66666666, 0x33333333, x1, 724, x2)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccc, 0x66666666, 0x66666666, x1, 728, x2)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x6665b162, 0x66666666, -0xb504, x1, 732, x2)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x66671b6a, 0x66666666, 0xb504, x1, 736, x2)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x66666668, 0x66666666, 0x2, x1, 740, x2)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbba, 0x66666666, 0x55555554, x1, 744, x2)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x66666666, 0x66666666, 0x0, x1, 748, x2)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x6666666a, 0x66666666, 0x4, x1, 752, x2)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x99999998, 0x66666666, 0x33333332, x1, 756, x2)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccb, 0x66666666, 0x66666665, x1, 760, x2)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x66671b69, 0x66666666, 0xb503, x1, 764, x2)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbc, 0x66666666, 0x55555556, x1, 768, x2)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x11111111, 0x66666666, -0x55555555, x1, 772, x2)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x6666666c, 0x66666666, 0x6, x1, 776, x2)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x9999999a, 0x66666666, 0x33333334, x1, 780, x2)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccd, 0x66666666, 0x66666667, x1, 784, x2)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x6665b163, 0x66666666, -0xb503, x1, 788, x2)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x66671b6b, 0x66666666, 0xb505, x1, 792, x2)
+
+inst_232:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xffff4aff, -0xb504, 0x3, x1, 796, x2)
+
+inst_233:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x5554a051, -0xb504, 0x55555555, x1, 800, x2)
+
+inst_234:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaa9f5a6, -0xb504, -0x55555556, x1, 804, x2)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b01, -0xb504, 0x5, x1, 808, x2)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x33327e2f, -0xb504, 0x33333333, x1, 812, x2)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x6665b162, -0xb504, 0x66666666, x1, 816, x2)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xfffe95f8, -0xb504, -0xb504, x1, 820, x2)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x0, -0xb504, 0xb504, x1, 824, x2)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xffff4afe, -0xb504, 0x2, x1, 828, x2)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x5554a050, -0xb504, 0x55555554, x1, 832, x2)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xffff4afc, -0xb504, 0x0, x1, 836, x2)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b00, -0xb504, 0x4, x1, 840, x2)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x33327e2e, -0xb504, 0x33333332, x1, 844, x2)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x6665b161, -0xb504, 0x66666665, x1, 848, x2)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff, -0xb504, 0xb503, x1, 852, x2)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x5554a052, -0xb504, 0x55555556, x1, 856, x2)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaa9f5a7, -0xb504, -0x55555555, x1, 860, x2)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b02, -0xb504, 0x6, x1, 864, x2)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x33327e30, -0xb504, 0x33333334, x1, 868, x2)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x6665b163, -0xb504, 0x66666667, x1, 872, x2)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xfffe95f9, -0xb504, -0xb503, x1, 876, x2)
+
+inst_253:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x1, -0xb504, 0xb505, x1, 880, x2)
+
+inst_254:
+// rs1_val==46340 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xb507, 0xb504, 0x3, x1, 884, x2)
+
+inst_255:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x55560a59, 0xb504, 0x55555555, x1, 888, x2)
+
+inst_256:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaab5fae, 0xb504, -0x55555556, x1, 892, x2)
+
+inst_257:
+// rs1_val==46340 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xb509, 0xb504, 0x5, x1, 896, x2)
+
+inst_258:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x3333e837, 0xb504, 0x33333333, x1, 900, x2)
+
+inst_259:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x66671b6a, 0xb504, 0x66666666, x1, 904, x2)
+
+inst_260:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x0, 0xb504, -0xb504, x1, 908, x2)
+
+inst_261:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x16a08, 0xb504, 0xb504, x1, 912, x2)
+
+inst_262:
+// rs1_val==46340 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xb506, 0xb504, 0x2, x1, 916, x2)
+
+inst_263:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x55560a58, 0xb504, 0x55555554, x1, 920, x2)
+
+inst_264:
+// rs1_val==46340 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xb504, 0xb504, 0x0, x1, 924, x2)
+
+inst_265:
+// rs1_val==46340 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xb508, 0xb504, 0x4, x1, 928, x2)
+
+inst_266:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x3333e836, 0xb504, 0x33333332, x1, 932, x2)
+
+inst_267:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x66671b69, 0xb504, 0x66666665, x1, 936, x2)
+
+inst_268:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x16a07, 0xb504, 0xb503, x1, 940, x2)
+
+inst_269:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x55560a5a, 0xb504, 0x55555556, x1, 944, x2)
+
+inst_270:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaab5faf, 0xb504, -0x55555555, x1, 948, x2)
+
+inst_271:
+// rs1_val==46340 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xb50a, 0xb504, 0x6, x1, 952, x2)
+
+inst_272:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x3333e838, 0xb504, 0x33333334, x1, 956, x2)
+
+inst_273:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x66671b6b, 0xb504, 0x66666667, x1, 960, x2)
+
+inst_274:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x1, 0xb504, -0xb503, x1, 964, x2)
+
+inst_275:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x16a09, 0xb504, 0xb505, x1, 968, x2)
+
+inst_276:
+// rs1_val==2 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x5, 0x2, 0x3, x1, 972, x2)
+
+inst_277:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x55555557, 0x2, 0x55555555, x1, 976, x2)
+
+inst_278:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaac, 0x2, -0x55555556, x1, 980, x2)
+
+inst_279:
+// rs1_val==2 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x7, 0x2, 0x5, x1, 984, x2)
+
+inst_280:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x33333335, 0x2, 0x33333333, x1, 988, x2)
+
+inst_281:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x66666668, 0x2, 0x66666666, x1, 992, x2)
+
+inst_282:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xffff4afe, 0x2, -0xb504, x1, 996, x2)
+
+inst_283:
+// rs1_val==2 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xb506, 0x2, 0xb504, x1, 1000, x2)
+
+inst_284:
+// rs1_val==2 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x4, 0x2, 0x2, x1, 1004, x2)
+
+inst_285:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x55555556, 0x2, 0x55555554, x1, 1008, x2)
+
+inst_286:
+// rs1_val==2 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x2, 0x2, 0x0, x1, 1012, x2)
+
+inst_287:
+// rs1_val==2 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x6, 0x2, 0x4, x1, 1016, x2)
+
+inst_288:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x33333334, 0x2, 0x33333332, x1, 1020, x2)
+
+inst_289:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x66666667, 0x2, 0x66666665, x1, 1024, x2)
+
+inst_290:
+// rs1_val==2 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xb505, 0x2, 0xb503, x1, 1028, x2)
+
+inst_291:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x55555558, 0x2, 0x55555556, x1, 1032, x2)
+
+inst_292:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaad, 0x2, -0x55555555, x1, 1036, x2)
+
+inst_293:
+// rs1_val==2 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x8, 0x2, 0x6, x1, 1040, x2)
+
+inst_294:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x33333336, 0x2, 0x33333334, x1, 1044, x2)
+
+inst_295:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x66666669, 0x2, 0x66666667, x1, 1048, x2)
+
+inst_296:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xffff4aff, 0x2, -0xb503, x1, 1052, x2)
+
+inst_297:
+// rs1_val==2 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0xb507, 0x2, 0xb505, x1, 1056, x2)
+
+inst_298:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x55555557, 0x55555554, 0x3, x1, 1060, x2)
+
+inst_299:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaa9, 0x55555554, 0x55555555, x1, 1064, x2)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffe, 0x55555554, -0x55555556, x1, 1068, x2)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x55555559, 0x55555554, 0x5, x1, 1072, x2)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x88888887, 0x55555554, 0x33333333, x1, 1076, x2)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbba, 0x55555554, 0x66666666, x1, 1080, x2)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x5554a050, 0x55555554, -0xb504, x1, 1084, x2)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x55560a58, 0x55555554, 0xb504, x1, 1088, x2)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x55555556, 0x55555554, 0x2, x1, 1092, x2)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaa8, 0x55555554, 0x55555554, x1, 1096, x2)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x55555554, 0x55555554, 0x0, x1, 1100, x2)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x55555558, 0x55555554, 0x4, x1, 1104, x2)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x88888886, 0x55555554, 0x33333332, x1, 1108, x2)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbb9, 0x55555554, 0x66666665, x1, 1112, x2)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x55560a57, 0x55555554, 0xb503, x1, 1116, x2)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaa, 0x55555554, 0x55555556, x1, 1120, x2)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff, 0x55555554, -0x55555555, x1, 1124, x2)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x5555555a, 0x55555554, 0x6, x1, 1128, x2)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x88888888, 0x55555554, 0x33333334, x1, 1132, x2)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbb, 0x55555554, 0x66666667, x1, 1136, x2)
+
+inst_318:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x5554a051, 0x55555554, -0xb503, x1, 1140, x2)
+
+inst_319:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x55560a59, 0x55555554, 0xb505, x1, 1144, x2)
+
+inst_320:
+// rs1_val==0 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x3, 0x0, 0x3, x1, 1148, x2)
+
+inst_321:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x55555555, 0x0, 0x55555555, x1, 1152, x2)
+
+inst_322:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaa, 0x0, -0x55555556, x1, 1156, x2)
+
+inst_323:
+// rs1_val==0 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x5, 0x0, 0x5, x1, 1160, x2)
+
+inst_324:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x33333333, 0x0, 0x33333333, x1, 1164, x2)
+
+inst_325:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x66666666, 0x0, 0x66666666, x1, 1168, x2)
+
+inst_326:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xffff4afc, 0x0, -0xb504, x1, 1172, x2)
+
+inst_327:
+// rs1_val==0 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xb504, 0x0, 0xb504, x1, 1176, x2)
+
+inst_328:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x55555556, -0x55555555, -0x55555555, x1, 1180, x2)
+
+inst_329:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaab1, -0x55555555, 0x6, x1, 1184, x2)
+
+inst_330:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddf, -0x55555555, 0x33333334, x1, 1188, x2)
+
+inst_331:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x11111112, -0x55555555, 0x66666667, x1, 1192, x2)
+
+inst_332:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xaaa9f5a8, -0x55555555, -0xb503, x1, 1196, x2)
+
+inst_333:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0xaaab5fb0, -0x55555555, 0xb505, x1, 1200, x2)
+
+inst_334:
+// rs1_val==6 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x9, 0x6, 0x3, x1, 1204, x2)
+
+inst_335:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x5555555b, 0x6, 0x55555555, x1, 1208, x2)
+
+inst_336:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaab0, 0x6, -0x55555556, x1, 1212, x2)
+
+inst_337:
+// rs1_val==6 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xb, 0x6, 0x5, x1, 1216, x2)
+
+inst_338:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x33333339, 0x6, 0x33333333, x1, 1220, x2)
+
+inst_339:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x6666666c, 0x6, 0x66666666, x1, 1224, x2)
+
+inst_340:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b02, 0x6, -0xb504, x1, 1228, x2)
+
+inst_341:
+// rs1_val==6 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xb50a, 0x6, 0xb504, x1, 1232, x2)
+
+inst_342:
+// rs1_val==6 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x8, 0x6, 0x2, x1, 1236, x2)
+
+inst_343:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x5555555a, 0x6, 0x55555554, x1, 1240, x2)
+
+inst_344:
+// rs1_val==6 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x6, 0x6, 0x0, x1, 1244, x2)
+
+inst_345:
+// rs1_val==6 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xa, 0x6, 0x4, x1, 1248, x2)
+
+inst_346:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x33333338, 0x6, 0x33333332, x1, 1252, x2)
+
+inst_347:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x6666666b, 0x6, 0x66666665, x1, 1256, x2)
+
+inst_348:
+// rs1_val==6 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xb509, 0x6, 0xb503, x1, 1260, x2)
+
+inst_349:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x5555555c, 0x6, 0x55555556, x1, 1264, x2)
+
+inst_350:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaab1, 0x6, -0x55555555, x1, 1268, x2)
+
+inst_351:
+// rs1_val==6 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xc, 0x6, 0x6, x1, 1272, x2)
+
+inst_352:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x3333333a, 0x6, 0x33333334, x1, 1276, x2)
+
+inst_353:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x6666666d, 0x6, 0x66666667, x1, 1280, x2)
+
+inst_354:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b03, 0x6, -0xb503, x1, 1284, x2)
+
+inst_355:
+// rs1_val==6 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0xb50b, 0x6, 0xb505, x1, 1288, x2)
+
+inst_356:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x33333337, 0x33333334, 0x3, x1, 1292, x2)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x88888889, 0x33333334, 0x55555555, x1, 1296, x2)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xddddddde, 0x33333334, -0x55555556, x1, 1300, x2)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x33333339, 0x33333334, 0x5, x1, 1304, x2)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x66666667, 0x33333334, 0x33333333, x1, 1308, x2)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x9999999a, 0x33333334, 0x66666666, x1, 1312, x2)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x33327e30, 0x33333334, -0xb504, x1, 1316, x2)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x3333e838, 0x33333334, 0xb504, x1, 1320, x2)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x33333336, 0x33333334, 0x2, x1, 1324, x2)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x88888888, 0x33333334, 0x55555554, x1, 1328, x2)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x33333334, 0x33333334, 0x0, x1, 1332, x2)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x33333338, 0x33333334, 0x4, x1, 1336, x2)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x66666666, 0x33333334, 0x33333332, x1, 1340, x2)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x99999999, 0x33333334, 0x66666665, x1, 1344, x2)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x3333e837, 0x33333334, 0xb503, x1, 1348, x2)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x8888888a, 0x33333334, 0x55555556, x1, 1352, x2)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddf, 0x33333334, -0x55555555, x1, 1356, x2)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x3333333a, 0x33333334, 0x6, x1, 1360, x2)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x66666668, 0x33333334, 0x33333334, x1, 1364, x2)
+
+inst_375:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x9999999b, 0x33333334, 0x66666667, x1, 1368, x2)
+
+inst_376:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x33327e31, 0x33333334, -0xb503, x1, 1372, x2)
+
+inst_377:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x3333e839, 0x33333334, 0xb505, x1, 1376, x2)
+
+inst_378:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x6666666a, 0x66666667, 0x3, x1, 1380, x2)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbc, 0x66666667, 0x55555555, x1, 1384, x2)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x11111111, 0x66666667, -0x55555556, x1, 1388, x2)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x6666666c, 0x66666667, 0x5, x1, 1392, x2)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x9999999a, 0x66666667, 0x33333333, x1, 1396, x2)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccd, 0x66666667, 0x66666666, x1, 1400, x2)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x6665b163, 0x66666667, -0xb504, x1, 1404, x2)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x66671b6b, 0x66666667, 0xb504, x1, 1408, x2)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x66666669, 0x66666667, 0x2, x1, 1412, x2)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbb, 0x66666667, 0x55555554, x1, 1416, x2)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x66666667, 0x66666667, 0x0, x1, 1420, x2)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x6666666b, 0x66666667, 0x4, x1, 1424, x2)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x99999999, 0x66666667, 0x33333332, x1, 1428, x2)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccc, 0x66666667, 0x66666665, x1, 1432, x2)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x66671b6a, 0x66666667, 0xb503, x1, 1436, x2)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbd, 0x66666667, 0x55555556, x1, 1440, x2)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x11111112, 0x66666667, -0x55555555, x1, 1444, x2)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x6666666d, 0x66666667, 0x6, x1, 1448, x2)
+
+inst_396:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x9999999b, 0x66666667, 0x33333334, x1, 1452, x2)
+
+inst_397:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0xccccccce, 0x66666667, 0x66666667, x1, 1456, x2)
+
+inst_398:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x6665b164, 0x66666667, -0xb503, x1, 1460, x2)
+
+inst_399:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x66671b6c, 0x66666667, 0xb505, x1, 1464, x2)
+
+inst_400:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b00, -0xb503, 0x3, x1, 1468, x2)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x5554a052, -0xb503, 0x55555555, x1, 1472, x2)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaa9f5a7, -0xb503, -0x55555556, x1, 1476, x2)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b02, -0xb503, 0x5, x1, 1480, x2)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x33327e30, -0xb503, 0x33333333, x1, 1484, x2)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x6665b163, -0xb503, 0x66666666, x1, 1488, x2)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xfffe95f9, -0xb503, -0xb504, x1, 1492, x2)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x1, -0xb503, 0xb504, x1, 1496, x2)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xffff4aff, -0xb503, 0x2, x1, 1500, x2)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x5554a051, -0xb503, 0x55555554, x1, 1504, x2)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xffff4afd, -0xb503, 0x0, x1, 1508, x2)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b01, -0xb503, 0x4, x1, 1512, x2)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x33327e2f, -0xb503, 0x33333332, x1, 1516, x2)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x6665b162, -0xb503, 0x66666665, x1, 1520, x2)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x0, -0xb503, 0xb503, x1, 1524, x2)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x5554a053, -0xb503, 0x55555556, x1, 1528, x2)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaa9f5a8, -0xb503, -0x55555555, x1, 1532, x2)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b03, -0xb503, 0x6, x1, 1536, x2)
+
+inst_418:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x33327e31, -0xb503, 0x33333334, x1, 1540, x2)
+
+inst_419:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x6665b164, -0xb503, 0x66666667, x1, 1544, x2)
+
+inst_420:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xfffe95fa, -0xb503, -0xb503, x1, 1548, x2)
+
+inst_421:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x2, -0xb503, 0xb505, x1, 1552, x2)
+
+inst_422:
+// rs1_val==46341 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xb508, 0xb505, 0x3, x1, 1556, x2)
+
+inst_423:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x55560a5a, 0xb505, 0x55555555, x1, 1560, x2)
+
+inst_424:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaab5faf, 0xb505, -0x55555556, x1, 1564, x2)
+
+inst_425:
+// rs1_val==46341 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xb50a, 0xb505, 0x5, x1, 1568, x2)
+
+inst_426:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x3333e838, 0xb505, 0x33333333, x1, 1572, x2)
+
+inst_427:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x66671b6b, 0xb505, 0x66666666, x1, 1576, x2)
+
+inst_428:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x1, 0xb505, -0xb504, x1, 1580, x2)
+
+inst_429:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x16a09, 0xb505, 0xb504, x1, 1584, x2)
+
+inst_430:
+// rs1_val==46341 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xb507, 0xb505, 0x2, x1, 1588, x2)
+
+inst_431:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x55560a59, 0xb505, 0x55555554, x1, 1592, x2)
+
+inst_432:
+// rs1_val==46341 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xb505, 0xb505, 0x0, x1, 1596, x2)
+
+inst_433:
+// rs1_val==46341 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xb509, 0xb505, 0x4, x1, 1600, x2)
+
+inst_434:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x3333e837, 0xb505, 0x33333332, x1, 1604, x2)
+
+inst_435:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x66671b6a, 0xb505, 0x66666665, x1, 1608, x2)
+
+inst_436:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x16a08, 0xb505, 0xb503, x1, 1612, x2)
+
+inst_437:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x55560a5b, 0xb505, 0x55555556, x1, 1616, x2)
+
+inst_438:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaab5fb0, 0xb505, -0x55555555, x1, 1620, x2)
+
+inst_439:
+// rs1_val==46341 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xb50b, 0xb505, 0x6, x1, 1624, x2)
+
+inst_440:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x3333e839, 0xb505, 0x33333334, x1, 1628, x2)
+
+inst_441:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x66671b6c, 0xb505, 0x66666667, x1, 1632, x2)
+
+inst_442:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x2, 0xb505, -0xb503, x1, 1636, x2)
+
+inst_443:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x16a0a, 0xb505, 0xb505, x1, 1640, x2)
+
+inst_444:
+// rs1_val==0 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x2, 0x0, 0x2, x1, 1644, x2)
+
+inst_445:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x55555554, 0x0, 0x55555554, x1, 1648, x2)
+
+inst_446:
+// rs1_val==0 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x0, 0x0, 0x0, x1, 1652, x2)
+
+inst_447:
+// rs1_val==0 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x4, 0x0, 0x4, x1, 1656, x2)
+
+inst_448:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x33333332, 0x0, 0x33333332, x1, 1660, x2)
+
+inst_449:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x66666665, 0x0, 0x66666665, x1, 1664, x2)
+
+inst_450:
+// rs1_val==0 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xb503, 0x0, 0xb503, x1, 1668, x2)
+
+inst_451:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x55555556, 0x0, 0x55555556, x1, 1672, x2)
+
+inst_452:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab, 0x0, -0x55555555, x1, 1676, x2)
+
+inst_453:
+// rs1_val==0 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x6, 0x0, 0x6, x1, 1680, x2)
+
+inst_454:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x33333334, 0x0, 0x33333334, x1, 1684, x2)
+
+inst_455:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x66666667, 0x0, 0x66666667, x1, 1688, x2)
+
+inst_456:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xffff4afd, 0x0, -0xb503, x1, 1692, x2)
+
+inst_457:
+// rs1_val==0 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0xb505, 0x0, 0xb505, x1, 1696, x2)
+
+inst_458:
+// rs1_val==4 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x7, 0x4, 0x3, x1, 1700, x2)
+
+inst_459:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x55555559, 0x4, 0x55555555, x1, 1704, x2)
+
+inst_460:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaae, 0x4, -0x55555556, x1, 1708, x2)
+
+inst_461:
+// rs1_val==4 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x9, 0x4, 0x5, x1, 1712, x2)
+
+inst_462:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x33333337, 0x4, 0x33333333, x1, 1716, x2)
+
+inst_463:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x6666666a, 0x4, 0x66666666, x1, 1720, x2)
+
+inst_464:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b00, 0x4, -0xb504, x1, 1724, x2)
+
+inst_465:
+// rs1_val==4 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xb508, 0x4, 0xb504, x1, 1728, x2)
+
+inst_466:
+// rs1_val==4 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x6, 0x4, 0x2, x1, 1732, x2)
+
+inst_467:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x55555558, 0x4, 0x55555554, x1, 1736, x2)
+
+inst_468:
+// rs1_val==4 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x4, 0x4, 0x0, x1, 1740, x2)
+
+inst_469:
+// rs1_val==4 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x8, 0x4, 0x4, x1, 1744, x2)
+
+inst_470:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x33333336, 0x4, 0x33333332, x1, 1748, x2)
+
+inst_471:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x66666669, 0x4, 0x66666665, x1, 1752, x2)
+
+inst_472:
+// rs1_val==4 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xb507, 0x4, 0xb503, x1, 1756, x2)
+
+inst_473:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x5555555a, 0x4, 0x55555556, x1, 1760, x2)
+
+inst_474:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaf, 0x4, -0x55555555, x1, 1764, x2)
+
+inst_475:
+// rs1_val==4 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xa, 0x4, 0x6, x1, 1768, x2)
+
+inst_476:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x33333338, 0x4, 0x33333334, x1, 1772, x2)
+
+inst_477:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x6666666b, 0x4, 0x66666667, x1, 1776, x2)
+
+inst_478:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xffff4b01, 0x4, -0xb503, x1, 1780, x2)
+
+inst_479:
+// rs1_val==4 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0xb509, 0x4, 0xb505, x1, 1784, x2)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x33333335, 0x33333332, 0x3, x1, 1788, x2)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x88888887, 0x33333332, 0x55555555, x1, 1792, x2)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddc, 0x33333332, -0x55555556, x1, 1796, x2)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x33333337, 0x33333332, 0x5, x1, 1800, x2)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x66666665, 0x33333332, 0x33333333, x1, 1804, x2)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x99999998, 0x33333332, 0x66666666, x1, 1808, x2)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x33327e2e, 0x33333332, -0xb504, x1, 1812, x2)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x3333e836, 0x33333332, 0xb504, x1, 1816, x2)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x33333334, 0x33333332, 0x2, x1, 1820, x2)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x88888886, 0x33333332, 0x55555554, x1, 1824, x2)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x33333332, 0x33333332, 0x0, x1, 1828, x2)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x33333336, 0x33333332, 0x4, x1, 1832, x2)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x66666664, 0x33333332, 0x33333332, x1, 1836, x2)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x99999997, 0x33333332, 0x66666665, x1, 1840, x2)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x3333e835, 0x33333332, 0xb503, x1, 1844, x2)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x88888888, 0x33333332, 0x55555556, x1, 1848, x2)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddd, 0x33333332, -0x55555555, x1, 1852, x2)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x33333338, 0x33333332, 0x6, x1, 1856, x2)
+
+inst_498:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x66666666, 0x33333332, 0x33333334, x1, 1860, x2)
+
+inst_499:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x99999999, 0x33333332, 0x66666667, x1, 1864, x2)
+
+inst_500:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x33327e2f, 0x33333332, -0xb503, x1, 1868, x2)
+
+inst_501:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x3333e837, 0x33333332, 0xb505, x1, 1872, x2)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x66666668, 0x66666665, 0x3, x1, 1876, x2)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbba, 0x66666665, 0x55555555, x1, 1880, x2)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x1111110f, 0x66666665, -0x55555556, x1, 1884, x2)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x6666666a, 0x66666665, 0x5, x1, 1888, x2)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x99999998, 0x66666665, 0x33333333, x1, 1892, x2)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccb, 0x66666665, 0x66666666, x1, 1896, x2)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x6665b161, 0x66666665, -0xb504, x1, 1900, x2)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x66671b69, 0x66666665, 0xb504, x1, 1904, x2)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x66666667, 0x66666665, 0x2, x1, 1908, x2)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbb9, 0x66666665, 0x55555554, x1, 1912, x2)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x66666665, 0x66666665, 0x0, x1, 1916, x2)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x66666669, 0x66666665, 0x4, x1, 1920, x2)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x99999997, 0x66666665, 0x33333332, x1, 1924, x2)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0xccccccca, 0x66666665, 0x66666665, x1, 1928, x2)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x66671b68, 0x66666665, 0xb503, x1, 1932, x2)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbb, 0x66666665, 0x55555556, x1, 1936, x2)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x11111110, 0x66666665, -0x55555555, x1, 1940, x2)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x6666666b, 0x66666665, 0x6, x1, 1944, x2)
+
+inst_520:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x99999999, 0x66666665, 0x33333334, x1, 1948, x2)
+
+inst_521:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccc, 0x66666665, 0x66666667, x1, 1952, x2)
+
+inst_522:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x6665b162, 0x66666665, -0xb503, x1, 1956, x2)
+
+inst_523:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x66671b6a, 0x66666665, 0xb505, x1, 1960, x2)
+
+inst_524:
+// rs1_val==46339 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xb506, 0xb503, 0x3, x1, 1964, x2)
+
+inst_525:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x55560a58, 0xb503, 0x55555555, x1, 1968, x2)
+
+inst_526:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaab5fad, 0xb503, -0x55555556, x1, 1972, x2)
+
+inst_527:
+// rs1_val==46339 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xb508, 0xb503, 0x5, x1, 1976, x2)
+
+inst_528:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x3333e836, 0xb503, 0x33333333, x1, 1980, x2)
+
+inst_529:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x66671b69, 0xb503, 0x66666666, x1, 1984, x2)
+
+inst_530:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff, 0xb503, -0xb504, x1, 1988, x2)
+
+inst_531:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x16a07, 0xb503, 0xb504, x1, 1992, x2)
+
+inst_532:
+// rs1_val==46339 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xb505, 0xb503, 0x2, x1, 1996, x2)
+
+inst_533:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0x55560a57, 0xb503, 0x55555554, x1, 2000, x2)
+
+inst_534:
+// rs1_val==46339 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xb503, 0xb503, 0x0, x1, 2004, x2)
+
+inst_535:
+// rs1_val==46339 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xb507, 0xb503, 0x4, x1, 2008, x2)
+
+inst_536:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x3333e835, 0xb503, 0x33333332, x1, 2012, x2)
+
+inst_537:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x66671b68, 0xb503, 0x66666665, x1, 2016, x2)
+
+inst_538:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x16a06, 0xb503, 0xb503, x1, 2020, x2)
+
+inst_539:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x55560a59, 0xb503, 0x55555556, x1, 2024, x2)
+
+inst_540:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaab5fae, 0xb503, -0x55555555, x1, 2028, x2)
+
+inst_541:
+// rs1_val==46339 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xb509, 0xb503, 0x6, x1, 2032, x2)
+
+inst_542:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x3333e837, 0xb503, 0x33333334, x1, 2036, x2)
+
+inst_543:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0x66671b6a, 0xb503, 0x66666667, x1, 2040, x2)
+
+inst_544:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x0, 0xb503, -0xb503, x1, 2044, x2)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_545:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x16a08, 0xb503, 0xb505, x1, 0, x2)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x55555559, 0x55555556, 0x3, x1, 4, x2)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab, 0x55555556, 0x55555555, x1, 8, x2)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x0, 0x55555556, -0x55555556, x1, 12, x2)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x5555555b, 0x55555556, 0x5, x1, 16, x2)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0x88888889, 0x55555556, 0x33333333, x1, 20, x2)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbc, 0x55555556, 0x66666666, x1, 24, x2)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x5554a052, 0x55555556, -0xb504, x1, 28, x2)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0x55560a5a, 0x55555556, 0xb504, x1, 32, x2)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x55555558, 0x55555556, 0x2, x1, 36, x2)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaa, 0x55555556, 0x55555554, x1, 40, x2)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x55555556, 0x55555556, 0x0, x1, 44, x2)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x5555555a, 0x55555556, 0x4, x1, 48, x2)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0x88888888, 0x55555556, 0x33333332, x1, 52, x2)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbb, 0x55555556, 0x66666665, x1, 56, x2)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x55560a59, 0x55555556, 0xb503, x1, 60, x2)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x1, 0x55555556, -0x55555555, x1, 64, x2)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x5555555c, 0x55555556, 0x6, x1, 68, x2)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(add, x12, x10, x11, 0x8888888a, 0x55555556, 0x33333334, x1, 72, x2)
+
+inst_564:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbd, 0x55555556, 0x66666667, x1, 76, x2)
+
+inst_565:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb503
+TEST_RR_OP(add, x12, x10, x11, 0x5554a053, 0x55555556, -0xb503, x1, 80, x2)
+
+inst_566:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(add, x12, x10, x11, 0x55560a5b, 0x55555556, 0xb505, x1, 84, x2)
+
+inst_567:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaae, -0x55555555, 0x3, x1, 88, x2)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555555
+TEST_RR_OP(add, x12, x10, x11, 0x0, -0x55555555, 0x55555555, x1, 92, x2)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x55555555, -0x55555555, -0x55555556, x1, 96, x2)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaab0, -0x55555555, 0x5, x1, 100, x2)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333333
+TEST_RR_OP(add, x12, x10, x11, 0xddddddde, -0x55555555, 0x33333333, x1, 104, x2)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666666
+TEST_RR_OP(add, x12, x10, x11, 0x11111111, -0x55555555, 0x66666666, x1, 108, x2)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xaaa9f5a7, -0x55555555, -0xb504, x1, 112, x2)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb504
+TEST_RR_OP(add, x12, x10, x11, 0xaaab5faf, -0x55555555, 0xb504, x1, 116, x2)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaad, -0x55555555, 0x2, x1, 120, x2)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555554
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff, -0x55555555, 0x55555554, x1, 124, x2)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab, -0x55555555, 0x0, x1, 128, x2)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaf, -0x55555555, 0x4, x1, 132, x2)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333332
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddd, -0x55555555, 0x33333332, x1, 136, x2)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666665
+TEST_RR_OP(add, x12, x10, x11, 0x11111110, -0x55555555, 0x66666665, x1, 140, x2)
+
+inst_581:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb503
+TEST_RR_OP(add, x12, x10, x11, 0xaaab5fae, -0x55555555, 0xb503, x1, 144, x2)
+
+inst_582:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555556
+TEST_RR_OP(add, x12, x10, x11, 0x1, -0x55555555, 0x55555556, x1, 148, x2)
+
+inst_583:
+// rs1_val > 0 and rs2_val < 0, rs2_val == -257, rs1_val == 131072
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x101
+TEST_RR_OP(add, x12, x10, x11, 0x1feff, 0x20000, -0x101, x1, 152, x2)
+
+inst_584:
+// rs1_val < 0 and rs2_val < 0, rs1_val == -16777217
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:-0x7
+TEST_RR_OP(add, x12, x10, x11, 0xfefffff8, -0x1000001, -0x7, x1, 156, x2)
+
+inst_585:
+// rs1_val == 1, rs2_val == 8388608
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x800000
+TEST_RR_OP(add, x12, x10, x11, 0x800001, 0x1, 0x800000, x1, 160, x2)
+
+inst_586:
+// rs2_val == 1024,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x400
+TEST_RR_OP(add, x12, x10, x11, 0xffff4efc, -0xb504, 0x400, x1, 164, x2)
+
+inst_587:
+// rs2_val == 4096, rs1_val == 4
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x1000
+TEST_RR_OP(add, x12, x10, x11, 0x1004, 0x4, 0x1000, x1, 168, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x3_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_1:
+ .fill 17*(XLEN/32),4,0xdeadbeef
+
+
+signature_x8_0:
+ .fill 16*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 43*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/addi-01.S b/riscof/suite/rv32i_m/I/addi-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..2a53e2f5f76849db3742136bdf1a8bf15e7c278b
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/addi-01.S
@@ -0,0 +1,2884 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the addi instruction of the RISC-V I extension for the addi covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",addi)
+
+RVTEST_SIGBASE( x14,signature_x14_1)
+
+inst_0:
+// rs1 != rd, rs1==x20, rd==x7, imm_val == (-2**(12-1)), imm_val == -2048, rs1_val != imm_val, rs1_val == 536870912, rs1_val > 0 and imm_val < 0
+// opcode: addi ; op1:x20; dest:x7; op1val:0x20000000; immval:-0x800
+TEST_IMM_OP( addi, x7, x20, 0x1ffff800, 0x20000000, -0x800, x14, 0, x1)
+
+inst_1:
+// rs1 == rd, rs1==x3, rd==x3, imm_val == 0, rs1_val == 1024
+// opcode: addi ; op1:x3; dest:x3; op1val:0x400; immval:0x0
+TEST_IMM_OP( addi, x3, x3, 0x400, 0x400, 0x0, x14, 4, x1)
+
+inst_2:
+// rs1==x4, rd==x22, imm_val == (2**(12-1)-1), rs1_val < 0 and imm_val > 0, imm_val == 2047, rs1_val == -513
+// opcode: addi ; op1:x4; dest:x22; op1val:-0x201; immval:0x7ff
+TEST_IMM_OP( addi, x22, x4, 0x5fe, -0x201, 0x7ff, x14, 8, x1)
+
+inst_3:
+// rs1==x30, rd==x11, imm_val == 1, rs1_val == 0
+// opcode: addi ; op1:x30; dest:x11; op1val:0x0; immval:0x1
+TEST_IMM_OP( addi, x11, x30, 0x1, 0x0, 0x1, x14, 12, x1)
+
+inst_4:
+// rs1==x27, rd==x31, rs1_val == (-2**(xlen-1)), imm_val == 16, rs1_val == -2147483648
+// opcode: addi ; op1:x27; dest:x31; op1val:-0x80000000; immval:0x10
+TEST_IMM_OP( addi, x31, x27, 0x80000010, -0x80000000, 0x10, x14, 16, x1)
+
+inst_5:
+// rs1==x17, rd==x30, rs1_val == (2**(xlen-1)-1), rs1_val > 0 and imm_val > 0, rs1_val == 2147483647
+// opcode: addi ; op1:x17; dest:x30; op1val:0x7fffffff; immval:0x6
+TEST_IMM_OP( addi, x30, x17, 0x80000005, 0x7fffffff, 0x6, x14, 20, x1)
+
+inst_6:
+// rs1==x18, rd==x28, rs1_val == 1, imm_val == 4
+// opcode: addi ; op1:x18; dest:x28; op1val:0x1; immval:0x4
+TEST_IMM_OP( addi, x28, x18, 0x5, 0x1, 0x4, x14, 24, x1)
+
+inst_7:
+// rs1==x13, rd==x6, rs1_val == imm_val, rs1_val==5 and imm_val==5
+// opcode: addi ; op1:x13; dest:x6; op1val:0x5; immval:0x5
+TEST_IMM_OP( addi, x6, x13, 0xa, 0x5, 0x5, x14, 28, x1)
+
+inst_8:
+// rs1==x10, rd==x16, rs1_val < 0 and imm_val < 0, imm_val == -33
+// opcode: addi ; op1:x10; dest:x16; op1val:-0x55555555; immval:-0x21
+TEST_IMM_OP( addi, x16, x10, 0xaaaaaa8a, -0x55555555, -0x21, x14, 32, x1)
+
+inst_9:
+// rs1==x9, rd==x21, imm_val == 2, rs1_val == -17
+// opcode: addi ; op1:x9; dest:x21; op1val:-0x11; immval:0x2
+TEST_IMM_OP( addi, x21, x9, 0xfffffff1, -0x11, 0x2, x14, 36, x1)
+
+inst_10:
+// rs1==x7, rd==x2, imm_val == 8,
+// opcode: addi ; op1:x7; dest:x2; op1val:0xb505; immval:0x8
+TEST_IMM_OP( addi, x2, x7, 0xb50d, 0xb505, 0x8, x14, 40, x1)
+
+inst_11:
+// rs1==x22, rd==x18, imm_val == 32,
+// opcode: addi ; op1:x22; dest:x18; op1val:-0xb504; immval:0x20
+TEST_IMM_OP( addi, x18, x22, 0xffff4b1c, -0xb504, 0x20, x14, 44, x1)
+
+inst_12:
+// rs1==x29, rd==x0, imm_val == 64, rs1_val == -2097153
+// opcode: addi ; op1:x29; dest:x0; op1val:-0x200001; immval:0x40
+TEST_IMM_OP( addi, x0, x29, 0, -0x200001, 0x40, x14, 48, x1)
+
+inst_13:
+// rs1==x25, rd==x13, imm_val == 128,
+// opcode: addi ; op1:x25; dest:x13; op1val:0x5; immval:0x80
+TEST_IMM_OP( addi, x13, x25, 0x85, 0x5, 0x80, x14, 52, x1)
+
+inst_14:
+// rs1==x11, rd==x29, imm_val == 256, rs1_val == -33554433
+// opcode: addi ; op1:x11; dest:x29; op1val:-0x2000001; immval:0x100
+TEST_IMM_OP( addi, x29, x11, 0xfe0000ff, -0x2000001, 0x100, x14, 56, x1)
+
+inst_15:
+// rs1==x6, rd==x8, imm_val == 512, rs1_val == 16
+// opcode: addi ; op1:x6; dest:x8; op1val:0x10; immval:0x200
+TEST_IMM_OP( addi, x8, x6, 0x210, 0x10, 0x200, x14, 60, x1)
+
+inst_16:
+// rs1==x19, rd==x4, imm_val == 1024, rs1_val == 2
+// opcode: addi ; op1:x19; dest:x4; op1val:0x2; immval:0x400
+TEST_IMM_OP( addi, x4, x19, 0x402, 0x2, 0x400, x14, 64, x1)
+
+inst_17:
+// rs1==x12, rd==x10, imm_val == -2,
+// opcode: addi ; op1:x12; dest:x10; op1val:0x55555554; immval:-0x2
+TEST_IMM_OP( addi, x10, x12, 0x55555552, 0x55555554, -0x2, x14, 68, x1)
+
+inst_18:
+// rs1==x31, rd==x26, imm_val == -3, rs1_val == 1431655765
+// opcode: addi ; op1:x31; dest:x26; op1val:0x55555555; immval:-0x3
+TEST_IMM_OP( addi, x26, x31, 0x55555552, 0x55555555, -0x3, x14, 72, x1)
+
+inst_19:
+// rs1==x26, rd==x15, imm_val == -5,
+// opcode: addi ; op1:x26; dest:x15; op1val:0x55555554; immval:-0x5
+TEST_IMM_OP( addi, x15, x26, 0x5555554f, 0x55555554, -0x5, x14, 76, x1)
+
+inst_20:
+// rs1==x5, rd==x19, imm_val == -9,
+// opcode: addi ; op1:x5; dest:x19; op1val:0x3; immval:-0x9
+TEST_IMM_OP( addi, x19, x5, 0xfffffffa, 0x3, -0x9, x14, 80, x1)
+
+inst_21:
+// rs1==x0, rd==x1, imm_val == -17,
+// opcode: addi ; op1:x0; dest:x1; op1val:0x0; immval:-0x11
+TEST_IMM_OP( addi, x1, x0, 0xffffffef, 0x0, -0x11, x14, 84, x4)
+RVTEST_SIGBASE( x3,signature_x3_0)
+
+inst_22:
+// rs1==x24, rd==x23, imm_val == -65, rs1_val == 8388608
+// opcode: addi ; op1:x24; dest:x23; op1val:0x800000; immval:-0x41
+TEST_IMM_OP( addi, x23, x24, 0x7fffbf, 0x800000, -0x41, x3, 0, x4)
+
+inst_23:
+// rs1==x15, rd==x27, imm_val == -129,
+// opcode: addi ; op1:x15; dest:x27; op1val:-0x11; immval:-0x81
+TEST_IMM_OP( addi, x27, x15, 0xffffff6e, -0x11, -0x81, x3, 4, x4)
+
+inst_24:
+// rs1==x14, rd==x17, imm_val == -257,
+// opcode: addi ; op1:x14; dest:x17; op1val:0x55555555; immval:-0x101
+TEST_IMM_OP( addi, x17, x14, 0x55555454, 0x55555555, -0x101, x3, 8, x4)
+
+inst_25:
+// rs1==x21, rd==x25, imm_val == -513,
+// opcode: addi ; op1:x21; dest:x25; op1val:0x55555556; immval:-0x201
+TEST_IMM_OP( addi, x25, x21, 0x55555355, 0x55555556, -0x201, x3, 12, x4)
+
+inst_26:
+// rs1==x1, rd==x24, imm_val == -1025, rs1_val == 8192
+// opcode: addi ; op1:x1; dest:x24; op1val:0x2000; immval:-0x401
+TEST_IMM_OP( addi, x24, x1, 0x1bff, 0x2000, -0x401, x3, 16, x4)
+
+inst_27:
+// rs1==x16, rd==x12, imm_val == 1365, rs1_val==-1431655766 and imm_val==1365, rs1_val == -1431655766
+// opcode: addi ; op1:x16; dest:x12; op1val:-0x55555556; immval:0x555
+TEST_IMM_OP( addi, x12, x16, 0xaaaaafff, -0x55555556, 0x555, x3, 20, x4)
+
+inst_28:
+// rs1==x2, rd==x14, imm_val == -1366, rs1_val==0 and imm_val==-1366
+// opcode: addi ; op1:x2; dest:x14; op1val:0x0; immval:-0x556
+TEST_IMM_OP( addi, x14, x2, 0xfffffaaa, 0x0, -0x556, x3, 24, x4)
+
+inst_29:
+// rs1==x23, rd==x20, rs1_val == 4, rs1_val==4 and imm_val==4
+// opcode: addi ; op1:x23; dest:x20; op1val:0x4; immval:0x4
+TEST_IMM_OP( addi, x20, x23, 0x8, 0x4, 0x4, x3, 28, x4)
+
+inst_30:
+// rs1==x28, rd==x5, rs1_val == 8,
+// opcode: addi ; op1:x28; dest:x5; op1val:0x8; immval:0x10
+TEST_IMM_OP( addi, x5, x28, 0x18, 0x8, 0x10, x3, 32, x4)
+
+inst_31:
+// rs1==x8, rd==x9, rs1_val == 32,
+// opcode: addi ; op1:x8; dest:x9; op1val:0x20; immval:-0x2c
+TEST_IMM_OP( addi, x9, x8, 0xfffffff4, 0x20, -0x2c, x3, 36, x4)
+
+inst_32:
+// rs1_val == 64,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x40; immval:-0x41
+TEST_IMM_OP( addi, x11, x10, 0xffffffff, 0x40, -0x41, x3, 40, x4)
+
+inst_33:
+// rs1_val == 128,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x80; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x85, 0x80, 0x5, x3, 44, x4)
+
+inst_34:
+// rs1_val == 256,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x100; immval:-0x400
+TEST_IMM_OP( addi, x11, x10, 0xfffffd00, 0x100, -0x400, x3, 48, x4)
+
+inst_35:
+// rs1_val == 512,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x200; immval:0x100
+TEST_IMM_OP( addi, x11, x10, 0x300, 0x200, 0x100, x3, 52, x4)
+
+inst_36:
+// rs1_val == 2048,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x800; immval:-0xa
+TEST_IMM_OP( addi, x11, x10, 0x7f6, 0x800, -0xa, x3, 56, x4)
+
+inst_37:
+// rs1_val == 4096,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x1000; immval:0x40
+TEST_IMM_OP( addi, x11, x10, 0x1040, 0x1000, 0x40, x3, 60, x4)
+
+inst_38:
+// rs1_val == 16384,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4000; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x4332, 0x4000, 0x332, x3, 64, x4)
+
+inst_39:
+// rs1_val == 32768,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x8000; immval:-0x400
+TEST_IMM_OP( addi, x11, x10, 0x7c00, 0x8000, -0x400, x3, 68, x4)
+
+inst_40:
+// rs1_val == 65536,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x10000; immval:-0x101
+TEST_IMM_OP( addi, x11, x10, 0xfeff, 0x10000, -0x101, x3, 72, x4)
+
+inst_41:
+// rs1_val == 131072,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x20000; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x20004, 0x20000, 0x4, x3, 76, x4)
+
+inst_42:
+// rs1_val == 262144,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x40000; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x40000, 0x40000, 0x0, x3, 80, x4)
+
+inst_43:
+// rs1_val == 524288,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x80000; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x80005, 0x80000, 0x5, x3, 84, x4)
+
+inst_44:
+// rs1_val == 1048576,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x100000; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x10002c, 0x100000, 0x2c, x3, 88, x4)
+
+inst_45:
+// rs1_val == 2097152,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x200000; immval:-0x4
+TEST_IMM_OP( addi, x11, x10, 0x1ffffc, 0x200000, -0x4, x3, 92, x4)
+
+inst_46:
+// rs1_val == 4194304,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x400000; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x40002e, 0x400000, 0x2e, x3, 96, x4)
+
+inst_47:
+// rs1_val == 16777216,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x1000000; immval:-0x400
+TEST_IMM_OP( addi, x11, x10, 0xfffc00, 0x1000000, -0x400, x3, 100, x4)
+
+inst_48:
+// rs1_val == 33554432,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2000000; immval:-0x11
+TEST_IMM_OP( addi, x11, x10, 0x1ffffef, 0x2000000, -0x11, x3, 104, x4)
+
+inst_49:
+// rs1_val == 67108864,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4000000; immval:-0x2
+TEST_IMM_OP( addi, x11, x10, 0x3fffffe, 0x4000000, -0x2, x3, 108, x4)
+
+inst_50:
+// rs1_val == 134217728,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x8000000; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x8000003, 0x8000000, 0x3, x3, 112, x4)
+
+inst_51:
+// rs1_val == 268435456,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x10000000; immval:-0x81
+TEST_IMM_OP( addi, x11, x10, 0xfffff7f, 0x10000000, -0x81, x3, 116, x4)
+
+inst_52:
+// rs1_val == 1073741824,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x40000000; immval:-0x2
+TEST_IMM_OP( addi, x11, x10, 0x3ffffffe, 0x40000000, -0x2, x3, 120, x4)
+
+inst_53:
+// rs1_val == -2,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x2; immval:-0x201
+TEST_IMM_OP( addi, x11, x10, 0xfffffdfd, -0x2, -0x201, x3, 124, x4)
+
+inst_54:
+// rs1_val == -3,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x3; immval:-0x9
+TEST_IMM_OP( addi, x11, x10, 0xfffffff4, -0x3, -0x9, x3, 128, x4)
+
+inst_55:
+// rs1_val == -5,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffce, -0x5, -0x2d, x3, 132, x4)
+
+inst_56:
+// rs1_val == -9,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x9; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x32b, -0x9, 0x334, x3, 136, x4)
+
+inst_57:
+// rs1_val == -33,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x21; immval:-0x5
+TEST_IMM_OP( addi, x11, x10, 0xffffffda, -0x21, -0x5, x3, 140, x4)
+
+inst_58:
+// rs1_val == -65,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x41; immval:-0x9
+TEST_IMM_OP( addi, x11, x10, 0xffffffb6, -0x41, -0x9, x3, 144, x4)
+
+inst_59:
+// rs1_val == -129,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x81; immval:-0x11
+TEST_IMM_OP( addi, x11, x10, 0xffffff6e, -0x81, -0x11, x3, 148, x4)
+
+inst_60:
+// rs1_val == -257,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x101; immval:0x200
+TEST_IMM_OP( addi, x11, x10, 0xff, -0x101, 0x200, x3, 152, x4)
+
+inst_61:
+// rs1_val == -1025,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x401; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xfffffbd3, -0x401, -0x2c, x3, 156, x4)
+
+inst_62:
+// rs1_val == -2049,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x801; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xfffff803, -0x801, 0x4, x3, 160, x4)
+
+inst_63:
+// rs1_val == -4097,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x1001; immval:0x8
+TEST_IMM_OP( addi, x11, x10, 0xfffff007, -0x1001, 0x8, x3, 164, x4)
+
+inst_64:
+// rs1_val == -8193,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x2001; immval:-0x201
+TEST_IMM_OP( addi, x11, x10, 0xffffddfe, -0x2001, -0x201, x3, 168, x4)
+
+inst_65:
+// rs1_val == -16385,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x4001; immval:0x400
+TEST_IMM_OP( addi, x11, x10, 0xffffc3ff, -0x4001, 0x400, x3, 172, x4)
+
+inst_66:
+// rs1_val == -32769,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x8001; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xffff7aa9, -0x8001, -0x556, x3, 176, x4)
+
+inst_67:
+// rs1_val == -65537,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x10001; immval:0x7
+TEST_IMM_OP( addi, x11, x10, 0xffff0006, -0x10001, 0x7, x3, 180, x4)
+
+inst_68:
+// rs1_val == -131073,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x20001; immval:0x80
+TEST_IMM_OP( addi, x11, x10, 0xfffe007f, -0x20001, 0x80, x3, 184, x4)
+
+inst_69:
+// rs1_val == -262145,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x40001; immval:0x8
+TEST_IMM_OP( addi, x11, x10, 0xfffc0007, -0x40001, 0x8, x3, 188, x4)
+
+inst_70:
+// rs1_val == -524289,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x80001; immval:-0x800
+TEST_IMM_OP( addi, x11, x10, 0xfff7f7ff, -0x80001, -0x800, x3, 192, x4)
+
+inst_71:
+// rs1_val == -1048577,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x100001; immval:-0x21
+TEST_IMM_OP( addi, x11, x10, 0xffefffde, -0x100001, -0x21, x3, 196, x4)
+
+inst_72:
+// rs1_val == -4194305,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x400001; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xffc00553, -0x400001, 0x554, x3, 200, x4)
+
+inst_73:
+// rs1_val == -8388609,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x800001; immval:-0xa
+TEST_IMM_OP( addi, x11, x10, 0xff7ffff5, -0x800001, -0xa, x3, 204, x4)
+
+inst_74:
+// rs1_val == -16777217,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x1000001; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xff00002b, -0x1000001, 0x2c, x3, 208, x4)
+
+inst_75:
+// rs1_val == -67108865,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x4000001; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xfc000005, -0x4000001, 0x6, x3, 212, x4)
+
+inst_76:
+// rs1_val == -134217729,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x8000001; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xf8000665, -0x8000001, 0x666, x3, 216, x4)
+
+inst_77:
+// rs1_val == -268435457,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x10000001; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xf000002d, -0x10000001, 0x2e, x3, 220, x4)
+
+inst_78:
+// rs1_val == -536870913,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x20000001; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xe0000002, -0x20000001, 0x3, x3, 224, x4)
+
+inst_79:
+// rs1_val == -1073741825,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x40000001; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xc0000665, -0x40000001, 0x666, x3, 228, x4)
+
+inst_80:
+// rs1_val==3 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x6, 0x3, 0x3, x3, 232, x4)
+
+inst_81:
+// rs1_val==3 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x558, 0x3, 0x555, x3, 236, x4)
+
+inst_82:
+// rs1_val==3 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffaad, 0x3, -0x556, x3, 240, x4)
+
+inst_83:
+// rs1_val==3 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x8, 0x3, 0x5, x3, 244, x4)
+
+inst_84:
+// rs1_val==3 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x336, 0x3, 0x333, x3, 248, x4)
+
+inst_85:
+// rs1_val==3 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x669, 0x3, 0x666, x3, 252, x4)
+
+inst_86:
+// rs1_val==3 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffd6, 0x3, -0x2d, x3, 256, x4)
+
+inst_87:
+// rs1_val==3 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x30, 0x3, 0x2d, x3, 260, x4)
+
+inst_88:
+// rs1_val==3 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x5, 0x3, 0x2, x3, 264, x4)
+
+inst_89:
+// rs1_val==3 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x557, 0x3, 0x554, x3, 268, x4)
+
+inst_90:
+// rs1_val==3 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x3, 0x3, 0x0, x3, 272, x4)
+
+inst_91:
+// rs1_val==3 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x7, 0x3, 0x4, x3, 276, x4)
+
+inst_92:
+// rs1_val==3 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x335, 0x3, 0x332, x3, 280, x4)
+
+inst_93:
+// rs1_val==3 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x668, 0x3, 0x665, x3, 284, x4)
+
+inst_94:
+// rs1_val==3 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x2f, 0x3, 0x2c, x3, 288, x4)
+
+inst_95:
+// rs1_val==3 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x559, 0x3, 0x556, x3, 292, x4)
+
+inst_96:
+// rs1_val==3 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xfffffaae, 0x3, -0x555, x3, 296, x4)
+
+inst_97:
+// rs1_val==3 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x9, 0x3, 0x6, x3, 300, x4)
+
+inst_98:
+// rs1_val==3 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x337, 0x3, 0x334, x3, 304, x4)
+
+inst_99:
+// rs1_val==3 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x66a, 0x3, 0x667, x3, 308, x4)
+
+inst_100:
+// rs1_val==3 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffd7, 0x3, -0x2c, x3, 312, x4)
+
+inst_101:
+// rs1_val==3 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x31, 0x3, 0x2e, x3, 316, x4)
+
+inst_102:
+// rs1_val==1431655765 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x55555558, 0x55555555, 0x3, x3, 320, x4)
+
+inst_103:
+// rs1_val==1431655765 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x55555aaa, 0x55555555, 0x555, x3, 324, x4)
+
+inst_104:
+// rs1_val==1431655765 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x55554fff, 0x55555555, -0x556, x3, 328, x4)
+
+inst_105:
+// rs1_val==1431655765 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x5555555a, 0x55555555, 0x5, x3, 332, x4)
+
+inst_106:
+// rs1_val==1431655765 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x55555888, 0x55555555, 0x333, x3, 336, x4)
+
+inst_107:
+// rs1_val==1431655765 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x55555bbb, 0x55555555, 0x666, x3, 340, x4)
+
+inst_108:
+// rs1_val==1431655765 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x55555528, 0x55555555, -0x2d, x3, 344, x4)
+
+inst_109:
+// rs1_val==1431655765 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x55555582, 0x55555555, 0x2d, x3, 348, x4)
+
+inst_110:
+// rs1_val==1431655765 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x55555557, 0x55555555, 0x2, x3, 352, x4)
+
+inst_111:
+// rs1_val==1431655765 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x55555aa9, 0x55555555, 0x554, x3, 356, x4)
+
+inst_112:
+// rs1_val==1431655765 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x55555555, 0x55555555, 0x0, x3, 360, x4)
+
+inst_113:
+// rs1_val==1431655765 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x55555559, 0x55555555, 0x4, x3, 364, x4)
+
+inst_114:
+// rs1_val==1431655765 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x55555887, 0x55555555, 0x332, x3, 368, x4)
+
+inst_115:
+// rs1_val==1431655765 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x55555bba, 0x55555555, 0x665, x3, 372, x4)
+
+inst_116:
+// rs1_val==1431655765 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x55555581, 0x55555555, 0x2c, x3, 376, x4)
+
+inst_117:
+// rs1_val==1431655765 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x55555aab, 0x55555555, 0x556, x3, 380, x4)
+
+inst_118:
+// rs1_val==1431655765 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x55555000, 0x55555555, -0x555, x3, 384, x4)
+
+inst_119:
+// rs1_val==1431655765 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x5555555b, 0x55555555, 0x6, x3, 388, x4)
+
+inst_120:
+// rs1_val==1431655765 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x55555889, 0x55555555, 0x334, x3, 392, x4)
+
+inst_121:
+// rs1_val==1431655765 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x55555bbc, 0x55555555, 0x667, x3, 396, x4)
+
+inst_122:
+// rs1_val==1431655765 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x55555529, 0x55555555, -0x2c, x3, 400, x4)
+
+inst_123:
+// rs1_val==1431655765 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x55555583, 0x55555555, 0x2e, x3, 404, x4)
+
+inst_124:
+// rs1_val==-1431655766 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaad, -0x55555556, 0x3, x3, 408, x4)
+
+inst_125:
+// rs1_val==-1431655766 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xaaaaa554, -0x55555556, -0x556, x3, 412, x4)
+
+inst_126:
+// rs1_val==-1431655766 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaf, -0x55555556, 0x5, x3, 416, x4)
+
+inst_127:
+// rs1_val==-1431655766 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaddd, -0x55555556, 0x333, x3, 420, x4)
+
+inst_128:
+// rs1_val==-1431655766 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xaaaab110, -0x55555556, 0x666, x3, 424, x4)
+
+inst_129:
+// rs1_val==-1431655766 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaa7d, -0x55555556, -0x2d, x3, 428, x4)
+
+inst_130:
+// rs1_val==-1431655766 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaad7, -0x55555556, 0x2d, x3, 432, x4)
+
+inst_131:
+// rs1_val==-1431655766 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaac, -0x55555556, 0x2, x3, 436, x4)
+
+inst_132:
+// rs1_val==-1431655766 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaffe, -0x55555556, 0x554, x3, 440, x4)
+
+inst_133:
+// rs1_val==-1431655766 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaa, -0x55555556, 0x0, x3, 444, x4)
+
+inst_134:
+// rs1_val==-1431655766 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaae, -0x55555556, 0x4, x3, 448, x4)
+
+inst_135:
+// rs1_val==-1431655766 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaddc, -0x55555556, 0x332, x3, 452, x4)
+
+inst_136:
+// rs1_val==-1431655766 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xaaaab10f, -0x55555556, 0x665, x3, 456, x4)
+
+inst_137:
+// rs1_val==-1431655766 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaad6, -0x55555556, 0x2c, x3, 460, x4)
+
+inst_138:
+// rs1_val==-1431655766 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xaaaab000, -0x55555556, 0x556, x3, 464, x4)
+
+inst_139:
+// rs1_val==-1431655766 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xaaaaa555, -0x55555556, -0x555, x3, 468, x4)
+
+inst_140:
+// rs1_val==-1431655766 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaab0, -0x55555556, 0x6, x3, 472, x4)
+
+inst_141:
+// rs1_val==-1431655766 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xaaaaadde, -0x55555556, 0x334, x3, 476, x4)
+
+inst_142:
+// rs1_val==-1431655766 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xaaaab111, -0x55555556, 0x667, x3, 480, x4)
+
+inst_143:
+// rs1_val==-1431655766 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaa7e, -0x55555556, -0x2c, x3, 484, x4)
+
+inst_144:
+// rs1_val==-1431655766 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaad8, -0x55555556, 0x2e, x3, 488, x4)
+
+inst_145:
+// rs1_val==5 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x8, 0x5, 0x3, x3, 492, x4)
+
+inst_146:
+// rs1_val==5 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x55a, 0x5, 0x555, x3, 496, x4)
+
+inst_147:
+// rs1_val==5 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffaaf, 0x5, -0x556, x3, 500, x4)
+
+inst_148:
+// rs1_val==5 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x338, 0x5, 0x333, x3, 504, x4)
+
+inst_149:
+// rs1_val==5 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x66b, 0x5, 0x666, x3, 508, x4)
+
+inst_150:
+// rs1_val==5 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffd8, 0x5, -0x2d, x3, 512, x4)
+
+inst_151:
+// rs1_val==5 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x32, 0x5, 0x2d, x3, 516, x4)
+
+inst_152:
+// rs1_val==5 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x7, 0x5, 0x2, x3, 520, x4)
+
+inst_153:
+// rs1_val==5 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x559, 0x5, 0x554, x3, 524, x4)
+
+inst_154:
+// rs1_val==5 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x5, 0x5, 0x0, x3, 528, x4)
+
+inst_155:
+// rs1_val==5 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x9, 0x5, 0x4, x3, 532, x4)
+
+inst_156:
+// rs1_val==5 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x337, 0x5, 0x332, x3, 536, x4)
+
+inst_157:
+// rs1_val==5 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x66a, 0x5, 0x665, x3, 540, x4)
+
+inst_158:
+// rs1_val==5 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x31, 0x5, 0x2c, x3, 544, x4)
+
+inst_159:
+// rs1_val==5 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x55b, 0x5, 0x556, x3, 548, x4)
+
+inst_160:
+// rs1_val==5 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xfffffab0, 0x5, -0x555, x3, 552, x4)
+
+inst_161:
+// rs1_val==5 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xb, 0x5, 0x6, x3, 556, x4)
+
+inst_162:
+// rs1_val==5 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x339, 0x5, 0x334, x3, 560, x4)
+
+inst_163:
+// rs1_val==5 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x66c, 0x5, 0x667, x3, 564, x4)
+
+inst_164:
+// rs1_val==5 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffd9, 0x5, -0x2c, x3, 568, x4)
+
+inst_165:
+// rs1_val==5 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x33, 0x5, 0x2e, x3, 572, x4)
+
+inst_166:
+// rs1_val==858993459 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x33333336, 0x33333333, 0x3, x3, 576, x4)
+
+inst_167:
+// rs1_val==858993459 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x33333888, 0x33333333, 0x555, x3, 580, x4)
+
+inst_168:
+// rs1_val==858993459 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x33332ddd, 0x33333333, -0x556, x3, 584, x4)
+
+inst_169:
+// rs1_val==858993459 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x33333338, 0x33333333, 0x5, x3, 588, x4)
+
+inst_170:
+// rs1_val==858993459 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x33333666, 0x33333333, 0x333, x3, 592, x4)
+
+inst_171:
+// rs1_val==858993459 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x33333999, 0x33333333, 0x666, x3, 596, x4)
+
+inst_172:
+// rs1_val==858993459 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x33333306, 0x33333333, -0x2d, x3, 600, x4)
+
+inst_173:
+// rs1_val==858993459 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x33333360, 0x33333333, 0x2d, x3, 604, x4)
+
+inst_174:
+// rs1_val==858993459 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x33333335, 0x33333333, 0x2, x3, 608, x4)
+
+inst_175:
+// rs1_val==858993459 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x33333887, 0x33333333, 0x554, x3, 612, x4)
+
+inst_176:
+// rs1_val==858993459 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x33333333, 0x33333333, 0x0, x3, 616, x4)
+
+inst_177:
+// rs1_val==858993459 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x33333337, 0x33333333, 0x4, x3, 620, x4)
+
+inst_178:
+// rs1_val==858993459 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x33333665, 0x33333333, 0x332, x3, 624, x4)
+
+inst_179:
+// rs1_val==858993459 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x33333998, 0x33333333, 0x665, x3, 628, x4)
+
+inst_180:
+// rs1_val==858993459 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x3333335f, 0x33333333, 0x2c, x3, 632, x4)
+
+inst_181:
+// rs1_val==858993459 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x33333889, 0x33333333, 0x556, x3, 636, x4)
+
+inst_182:
+// rs1_val==858993459 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x33332dde, 0x33333333, -0x555, x3, 640, x4)
+
+inst_183:
+// rs1_val==858993459 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x33333339, 0x33333333, 0x6, x3, 644, x4)
+
+inst_184:
+// rs1_val==858993459 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x33333667, 0x33333333, 0x334, x3, 648, x4)
+
+inst_185:
+// rs1_val==858993459 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x3333399a, 0x33333333, 0x667, x3, 652, x4)
+
+inst_186:
+// rs1_val==858993459 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x33333307, 0x33333333, -0x2c, x3, 656, x4)
+
+inst_187:
+// rs1_val==858993459 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x33333361, 0x33333333, 0x2e, x3, 660, x4)
+
+inst_188:
+// rs1_val==1717986918 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x66666669, 0x66666666, 0x3, x3, 664, x4)
+
+inst_189:
+// rs1_val==1717986918 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x66666bbb, 0x66666666, 0x555, x3, 668, x4)
+
+inst_190:
+// rs1_val==1717986918 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x66666110, 0x66666666, -0x556, x3, 672, x4)
+
+inst_191:
+// rs1_val==1717986918 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x6666666b, 0x66666666, 0x5, x3, 676, x4)
+
+inst_192:
+// rs1_val==1717986918 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x66666999, 0x66666666, 0x333, x3, 680, x4)
+
+inst_193:
+// rs1_val==1717986918 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x66666ccc, 0x66666666, 0x666, x3, 684, x4)
+
+inst_194:
+// rs1_val==1717986918 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x66666639, 0x66666666, -0x2d, x3, 688, x4)
+
+inst_195:
+// rs1_val==1717986918 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x66666693, 0x66666666, 0x2d, x3, 692, x4)
+
+inst_196:
+// rs1_val==1717986918 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x66666668, 0x66666666, 0x2, x3, 696, x4)
+
+inst_197:
+// rs1_val==1717986918 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x66666bba, 0x66666666, 0x554, x3, 700, x4)
+
+inst_198:
+// rs1_val==1717986918 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x66666666, 0x66666666, 0x0, x3, 704, x4)
+
+inst_199:
+// rs1_val==1717986918 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x6666666a, 0x66666666, 0x4, x3, 708, x4)
+
+inst_200:
+// rs1_val==1717986918 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x66666998, 0x66666666, 0x332, x3, 712, x4)
+
+inst_201:
+// rs1_val==1717986918 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x66666ccb, 0x66666666, 0x665, x3, 716, x4)
+
+inst_202:
+// rs1_val==1717986918 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x66666692, 0x66666666, 0x2c, x3, 720, x4)
+
+inst_203:
+// rs1_val==1717986918 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x66666bbc, 0x66666666, 0x556, x3, 724, x4)
+
+inst_204:
+// rs1_val==1717986918 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x66666111, 0x66666666, -0x555, x3, 728, x4)
+
+inst_205:
+// rs1_val==1717986918 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x6666666c, 0x66666666, 0x6, x3, 732, x4)
+
+inst_206:
+// rs1_val==1717986918 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x6666699a, 0x66666666, 0x334, x3, 736, x4)
+
+inst_207:
+// rs1_val==1717986918 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x66666ccd, 0x66666666, 0x667, x3, 740, x4)
+
+inst_208:
+// rs1_val==1717986918 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x6666663a, 0x66666666, -0x2c, x3, 744, x4)
+
+inst_209:
+// rs1_val==1717986918 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x66666694, 0x66666666, 0x2e, x3, 748, x4)
+
+inst_210:
+// rs1_val==-46340 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xffff4aff, -0xb504, 0x3, x3, 752, x4)
+
+inst_211:
+// rs1_val==-46340 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xffff5051, -0xb504, 0x555, x3, 756, x4)
+
+inst_212:
+// rs1_val==-46340 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xffff45a6, -0xb504, -0x556, x3, 760, x4)
+
+inst_213:
+// rs1_val==-46340 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xffff4b01, -0xb504, 0x5, x3, 764, x4)
+
+inst_214:
+// rs1_val==-46340 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xffff4e2f, -0xb504, 0x333, x3, 768, x4)
+
+inst_215:
+// rs1_val==-46340 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xffff5162, -0xb504, 0x666, x3, 772, x4)
+
+inst_216:
+// rs1_val==-46340 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffff4acf, -0xb504, -0x2d, x3, 776, x4)
+
+inst_217:
+// rs1_val==-46340 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffff4b29, -0xb504, 0x2d, x3, 780, x4)
+
+inst_218:
+// rs1_val==-46340 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xffff4afe, -0xb504, 0x2, x3, 784, x4)
+
+inst_219:
+// rs1_val==-46340 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xffff5050, -0xb504, 0x554, x3, 788, x4)
+
+inst_220:
+// rs1_val==-46340 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xffff4afc, -0xb504, 0x0, x3, 792, x4)
+
+inst_221:
+// rs1_val==-46340 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xffff4b00, -0xb504, 0x4, x3, 796, x4)
+
+inst_222:
+// rs1_val==-46340 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xffff4e2e, -0xb504, 0x332, x3, 800, x4)
+
+inst_223:
+// rs1_val==-46340 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xffff5161, -0xb504, 0x665, x3, 804, x4)
+
+inst_224:
+// rs1_val==-46340 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffff4b28, -0xb504, 0x2c, x3, 808, x4)
+
+inst_225:
+// rs1_val==-46340 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xffff5052, -0xb504, 0x556, x3, 812, x4)
+
+inst_226:
+// rs1_val==-46340 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xffff45a7, -0xb504, -0x555, x3, 816, x4)
+
+inst_227:
+// rs1_val==-46340 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xffff4b02, -0xb504, 0x6, x3, 820, x4)
+
+inst_228:
+// rs1_val==-46340 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xffff4e30, -0xb504, 0x334, x3, 824, x4)
+
+inst_229:
+// rs1_val==-46340 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xffff5163, -0xb504, 0x667, x3, 828, x4)
+
+inst_230:
+// rs1_val==-46340 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffff4ad0, -0xb504, -0x2c, x3, 832, x4)
+
+inst_231:
+// rs1_val==-46340 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xffff4b2a, -0xb504, 0x2e, x3, 836, x4)
+
+inst_232:
+// rs1_val==46340 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xb507, 0xb504, 0x3, x3, 840, x4)
+
+inst_233:
+// rs1_val==46340 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xba59, 0xb504, 0x555, x3, 844, x4)
+
+inst_234:
+// rs1_val==46340 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xafae, 0xb504, -0x556, x3, 848, x4)
+
+inst_235:
+// rs1_val==46340 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xb509, 0xb504, 0x5, x3, 852, x4)
+
+inst_236:
+// rs1_val==46340 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xb837, 0xb504, 0x333, x3, 856, x4)
+
+inst_237:
+// rs1_val==46340 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xbb6a, 0xb504, 0x666, x3, 860, x4)
+
+inst_238:
+// rs1_val==46340 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xb4d7, 0xb504, -0x2d, x3, 864, x4)
+
+inst_239:
+// rs1_val==46340 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xb531, 0xb504, 0x2d, x3, 868, x4)
+
+inst_240:
+// rs1_val==46340 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xb506, 0xb504, 0x2, x3, 872, x4)
+
+inst_241:
+// rs1_val==46340 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xba58, 0xb504, 0x554, x3, 876, x4)
+
+inst_242:
+// rs1_val==46340 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xb504, 0xb504, 0x0, x3, 880, x4)
+
+inst_243:
+// rs1_val==46340 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xb508, 0xb504, 0x4, x3, 884, x4)
+
+inst_244:
+// rs1_val==46340 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xb836, 0xb504, 0x332, x3, 888, x4)
+
+inst_245:
+// rs1_val==46340 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xbb69, 0xb504, 0x665, x3, 892, x4)
+
+inst_246:
+// rs1_val==46340 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xb530, 0xb504, 0x2c, x3, 896, x4)
+
+inst_247:
+// rs1_val==46340 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xba5a, 0xb504, 0x556, x3, 900, x4)
+
+inst_248:
+// rs1_val==46340 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xafaf, 0xb504, -0x555, x3, 904, x4)
+
+inst_249:
+// rs1_val==46340 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xb50a, 0xb504, 0x6, x3, 908, x4)
+
+inst_250:
+// rs1_val==46340 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xb838, 0xb504, 0x334, x3, 912, x4)
+
+inst_251:
+// rs1_val==46340 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xbb6b, 0xb504, 0x667, x3, 916, x4)
+
+inst_252:
+// rs1_val==46340 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xb4d8, 0xb504, -0x2c, x3, 920, x4)
+
+inst_253:
+// rs1_val==46340 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xb532, 0xb504, 0x2e, x3, 924, x4)
+
+inst_254:
+// rs1_val==2 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x5, 0x2, 0x3, x3, 928, x4)
+
+inst_255:
+// rs1_val==2 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x557, 0x2, 0x555, x3, 932, x4)
+
+inst_256:
+// rs1_val==2 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffaac, 0x2, -0x556, x3, 936, x4)
+
+inst_257:
+// rs1_val==2 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x7, 0x2, 0x5, x3, 940, x4)
+
+inst_258:
+// rs1_val==2 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x335, 0x2, 0x333, x3, 944, x4)
+
+inst_259:
+// rs1_val==2 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x668, 0x2, 0x666, x3, 948, x4)
+
+inst_260:
+// rs1_val==2 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffd5, 0x2, -0x2d, x3, 952, x4)
+
+inst_261:
+// rs1_val==2 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x2f, 0x2, 0x2d, x3, 956, x4)
+
+inst_262:
+// rs1_val==2 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x4, 0x2, 0x2, x3, 960, x4)
+
+inst_263:
+// rs1_val==2 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x556, 0x2, 0x554, x3, 964, x4)
+
+inst_264:
+// rs1_val==2 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x2, 0x2, 0x0, x3, 968, x4)
+
+inst_265:
+// rs1_val==2 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x6, 0x2, 0x4, x3, 972, x4)
+
+inst_266:
+// rs1_val==2 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x334, 0x2, 0x332, x3, 976, x4)
+
+inst_267:
+// rs1_val==2 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x667, 0x2, 0x665, x3, 980, x4)
+
+inst_268:
+// rs1_val==2 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x2e, 0x2, 0x2c, x3, 984, x4)
+
+inst_269:
+// rs1_val==2 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x558, 0x2, 0x556, x3, 988, x4)
+
+inst_270:
+// rs1_val==2 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xfffffaad, 0x2, -0x555, x3, 992, x4)
+
+inst_271:
+// rs1_val==2 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x8, 0x2, 0x6, x3, 996, x4)
+
+inst_272:
+// rs1_val==2 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x336, 0x2, 0x334, x3, 1000, x4)
+
+inst_273:
+// rs1_val==2 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x669, 0x2, 0x667, x3, 1004, x4)
+
+inst_274:
+// rs1_val==2 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffd6, 0x2, -0x2c, x3, 1008, x4)
+
+inst_275:
+// rs1_val==2 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x30, 0x2, 0x2e, x3, 1012, x4)
+
+inst_276:
+// rs1_val==1431655764 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x55555557, 0x55555554, 0x3, x3, 1016, x4)
+
+inst_277:
+// rs1_val==1431655764 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x55555aa9, 0x55555554, 0x555, x3, 1020, x4)
+
+inst_278:
+// rs1_val==1431655764 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x55554ffe, 0x55555554, -0x556, x3, 1024, x4)
+
+inst_279:
+// rs1_val==1431655764 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x55555559, 0x55555554, 0x5, x3, 1028, x4)
+
+inst_280:
+// rs1_val==1431655764 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x55555887, 0x55555554, 0x333, x3, 1032, x4)
+
+inst_281:
+// rs1_val==1431655764 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x55555bba, 0x55555554, 0x666, x3, 1036, x4)
+
+inst_282:
+// rs1_val==1431655764 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x55555527, 0x55555554, -0x2d, x3, 1040, x4)
+
+inst_283:
+// rs1_val==1431655764 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x55555581, 0x55555554, 0x2d, x3, 1044, x4)
+
+inst_284:
+// rs1_val==1431655764 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x55555556, 0x55555554, 0x2, x3, 1048, x4)
+
+inst_285:
+// rs1_val==1431655764 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x55555aa8, 0x55555554, 0x554, x3, 1052, x4)
+
+inst_286:
+// rs1_val==1431655764 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x55555554, 0x55555554, 0x0, x3, 1056, x4)
+
+inst_287:
+// rs1_val==1431655764 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x55555558, 0x55555554, 0x4, x3, 1060, x4)
+
+inst_288:
+// rs1_val==1431655764 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x55555886, 0x55555554, 0x332, x3, 1064, x4)
+
+inst_289:
+// rs1_val==1431655764 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x55555bb9, 0x55555554, 0x665, x3, 1068, x4)
+
+inst_290:
+// rs1_val==1431655764 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x55555580, 0x55555554, 0x2c, x3, 1072, x4)
+
+inst_291:
+// rs1_val==1431655764 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x55555aaa, 0x55555554, 0x556, x3, 1076, x4)
+
+inst_292:
+// rs1_val==1431655764 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x55554fff, 0x55555554, -0x555, x3, 1080, x4)
+
+inst_293:
+// rs1_val==1431655764 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x5555555a, 0x55555554, 0x6, x3, 1084, x4)
+
+inst_294:
+// rs1_val==1431655764 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x55555888, 0x55555554, 0x334, x3, 1088, x4)
+
+inst_295:
+// rs1_val==1431655764 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x55555bbb, 0x55555554, 0x667, x3, 1092, x4)
+
+inst_296:
+// rs1_val==1431655764 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x55555528, 0x55555554, -0x2c, x3, 1096, x4)
+
+inst_297:
+// rs1_val==1431655764 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x55555582, 0x55555554, 0x2e, x3, 1100, x4)
+
+inst_298:
+// rs1_val==0 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x3, 0x0, 0x3, x3, 1104, x4)
+
+inst_299:
+// rs1_val==0 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x555, 0x0, 0x555, x3, 1108, x4)
+
+inst_300:
+// rs1_val==0 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x5, 0x0, 0x5, x3, 1112, x4)
+
+inst_301:
+// rs1_val==0 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x333, 0x0, 0x333, x3, 1116, x4)
+
+inst_302:
+// rs1_val==0 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x666, 0x0, 0x666, x3, 1120, x4)
+
+inst_303:
+// rs1_val==0 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffd3, 0x0, -0x2d, x3, 1124, x4)
+
+inst_304:
+// rs1_val==0 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x2d, 0x0, 0x2d, x3, 1128, x4)
+
+inst_305:
+// rs1_val==858993460 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x33333666, 0x33333334, 0x332, x3, 1132, x4)
+
+inst_306:
+// rs1_val==858993460 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x33333999, 0x33333334, 0x665, x3, 1136, x4)
+
+inst_307:
+// rs1_val==858993460 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x33333360, 0x33333334, 0x2c, x3, 1140, x4)
+
+inst_308:
+// rs1_val==858993460 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x3333388a, 0x33333334, 0x556, x3, 1144, x4)
+
+inst_309:
+// rs1_val==858993460 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x33332ddf, 0x33333334, -0x555, x3, 1148, x4)
+
+inst_310:
+// rs1_val==858993460 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x3333333a, 0x33333334, 0x6, x3, 1152, x4)
+
+inst_311:
+// rs1_val==858993460 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x33333668, 0x33333334, 0x334, x3, 1156, x4)
+
+inst_312:
+// rs1_val==858993460 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x3333399b, 0x33333334, 0x667, x3, 1160, x4)
+
+inst_313:
+// rs1_val==858993460 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x33333308, 0x33333334, -0x2c, x3, 1164, x4)
+
+inst_314:
+// rs1_val==858993460 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x33333362, 0x33333334, 0x2e, x3, 1168, x4)
+
+inst_315:
+// rs1_val==1717986919 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x6666666a, 0x66666667, 0x3, x3, 1172, x4)
+
+inst_316:
+// rs1_val==1717986919 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x66666bbc, 0x66666667, 0x555, x3, 1176, x4)
+
+inst_317:
+// rs1_val==1717986919 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x66666111, 0x66666667, -0x556, x3, 1180, x4)
+
+inst_318:
+// rs1_val==1717986919 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x6666666c, 0x66666667, 0x5, x3, 1184, x4)
+
+inst_319:
+// rs1_val==1717986919 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x6666699a, 0x66666667, 0x333, x3, 1188, x4)
+
+inst_320:
+// rs1_val==1717986919 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x66666ccd, 0x66666667, 0x666, x3, 1192, x4)
+
+inst_321:
+// rs1_val==1717986919 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x6666663a, 0x66666667, -0x2d, x3, 1196, x4)
+
+inst_322:
+// rs1_val==1717986919 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x66666694, 0x66666667, 0x2d, x3, 1200, x4)
+
+inst_323:
+// rs1_val==1717986919 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x66666669, 0x66666667, 0x2, x3, 1204, x4)
+
+inst_324:
+// rs1_val==1717986919 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x66666bbb, 0x66666667, 0x554, x3, 1208, x4)
+
+inst_325:
+// rs1_val==1717986919 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x66666667, 0x66666667, 0x0, x3, 1212, x4)
+
+inst_326:
+// rs1_val==1717986919 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x6666666b, 0x66666667, 0x4, x3, 1216, x4)
+
+inst_327:
+// rs1_val==1717986919 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x66666999, 0x66666667, 0x332, x3, 1220, x4)
+
+inst_328:
+// rs1_val==1717986919 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x66666ccc, 0x66666667, 0x665, x3, 1224, x4)
+
+inst_329:
+// rs1_val==1717986919 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x66666693, 0x66666667, 0x2c, x3, 1228, x4)
+
+inst_330:
+// rs1_val==1717986919 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x66666bbd, 0x66666667, 0x556, x3, 1232, x4)
+
+inst_331:
+// rs1_val==1717986919 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x66666112, 0x66666667, -0x555, x3, 1236, x4)
+
+inst_332:
+// rs1_val==1717986919 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x6666666d, 0x66666667, 0x6, x3, 1240, x4)
+
+inst_333:
+// rs1_val==1717986919 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x6666699b, 0x66666667, 0x334, x3, 1244, x4)
+
+inst_334:
+// rs1_val==1717986919 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x66666cce, 0x66666667, 0x667, x3, 1248, x4)
+
+inst_335:
+// rs1_val==1717986919 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x6666663b, 0x66666667, -0x2c, x3, 1252, x4)
+
+inst_336:
+// rs1_val==1717986919 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x66666695, 0x66666667, 0x2e, x3, 1256, x4)
+
+inst_337:
+// rs1_val==-46339 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xffff4b00, -0xb503, 0x3, x3, 1260, x4)
+
+inst_338:
+// rs1_val==-46339 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xffff5052, -0xb503, 0x555, x3, 1264, x4)
+
+inst_339:
+// rs1_val==-46339 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xffff45a7, -0xb503, -0x556, x3, 1268, x4)
+
+inst_340:
+// rs1_val==-46339 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xffff4b02, -0xb503, 0x5, x3, 1272, x4)
+
+inst_341:
+// rs1_val==-46339 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xffff4e30, -0xb503, 0x333, x3, 1276, x4)
+
+inst_342:
+// rs1_val==-46339 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xffff5163, -0xb503, 0x666, x3, 1280, x4)
+
+inst_343:
+// rs1_val==-46339 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffff4ad0, -0xb503, -0x2d, x3, 1284, x4)
+
+inst_344:
+// rs1_val==-46339 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffff4b2a, -0xb503, 0x2d, x3, 1288, x4)
+
+inst_345:
+// rs1_val==-46339 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xffff4aff, -0xb503, 0x2, x3, 1292, x4)
+
+inst_346:
+// rs1_val==-46339 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xffff5051, -0xb503, 0x554, x3, 1296, x4)
+
+inst_347:
+// rs1_val==-46339 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xffff4afd, -0xb503, 0x0, x3, 1300, x4)
+
+inst_348:
+// rs1_val==-46339 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xffff4b01, -0xb503, 0x4, x3, 1304, x4)
+
+inst_349:
+// rs1_val==-46339 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xffff4e2f, -0xb503, 0x332, x3, 1308, x4)
+
+inst_350:
+// rs1_val==-46339 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xffff5162, -0xb503, 0x665, x3, 1312, x4)
+
+inst_351:
+// rs1_val==-46339 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffff4b29, -0xb503, 0x2c, x3, 1316, x4)
+
+inst_352:
+// rs1_val==-46339 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xffff5053, -0xb503, 0x556, x3, 1320, x4)
+
+inst_353:
+// rs1_val==-46339 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xffff45a8, -0xb503, -0x555, x3, 1324, x4)
+
+inst_354:
+// rs1_val==-46339 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xffff4b03, -0xb503, 0x6, x3, 1328, x4)
+
+inst_355:
+// rs1_val==-46339 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xffff4e31, -0xb503, 0x334, x3, 1332, x4)
+
+inst_356:
+// rs1_val==-46339 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xffff5164, -0xb503, 0x667, x3, 1336, x4)
+
+inst_357:
+// rs1_val==-46339 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffff4ad1, -0xb503, -0x2c, x3, 1340, x4)
+
+inst_358:
+// rs1_val==-46339 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xffff4b2b, -0xb503, 0x2e, x3, 1344, x4)
+
+inst_359:
+// rs1_val==46341 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xb508, 0xb505, 0x3, x3, 1348, x4)
+
+inst_360:
+// rs1_val==46341 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xba5a, 0xb505, 0x555, x3, 1352, x4)
+
+inst_361:
+// rs1_val==46341 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xafaf, 0xb505, -0x556, x3, 1356, x4)
+
+inst_362:
+// rs1_val==46341 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xb50a, 0xb505, 0x5, x3, 1360, x4)
+
+inst_363:
+// rs1_val==46341 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xb838, 0xb505, 0x333, x3, 1364, x4)
+
+inst_364:
+// rs1_val==46341 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xbb6b, 0xb505, 0x666, x3, 1368, x4)
+
+inst_365:
+// rs1_val==46341 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xb4d8, 0xb505, -0x2d, x3, 1372, x4)
+
+inst_366:
+// rs1_val==46341 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xb532, 0xb505, 0x2d, x3, 1376, x4)
+
+inst_367:
+// rs1_val==46341 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xb507, 0xb505, 0x2, x3, 1380, x4)
+
+inst_368:
+// rs1_val==46341 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xba59, 0xb505, 0x554, x3, 1384, x4)
+
+inst_369:
+// rs1_val==46341 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xb505, 0xb505, 0x0, x3, 1388, x4)
+
+inst_370:
+// rs1_val==46341 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xb509, 0xb505, 0x4, x3, 1392, x4)
+
+inst_371:
+// rs1_val==46341 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xb837, 0xb505, 0x332, x3, 1396, x4)
+
+inst_372:
+// rs1_val==46341 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xbb6a, 0xb505, 0x665, x3, 1400, x4)
+
+inst_373:
+// rs1_val==46341 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xb531, 0xb505, 0x2c, x3, 1404, x4)
+
+inst_374:
+// rs1_val==46341 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xba5b, 0xb505, 0x556, x3, 1408, x4)
+
+inst_375:
+// rs1_val==46341 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xafb0, 0xb505, -0x555, x3, 1412, x4)
+
+inst_376:
+// rs1_val==46341 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xb50b, 0xb505, 0x6, x3, 1416, x4)
+
+inst_377:
+// rs1_val==46341 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xb839, 0xb505, 0x334, x3, 1420, x4)
+
+inst_378:
+// rs1_val==46341 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xbb6c, 0xb505, 0x667, x3, 1424, x4)
+
+inst_379:
+// rs1_val==46341 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xb4d9, 0xb505, -0x2c, x3, 1428, x4)
+
+inst_380:
+// rs1_val==46341 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb505; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xb533, 0xb505, 0x2e, x3, 1432, x4)
+
+inst_381:
+// rs1_val==0 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x2, 0x0, 0x2, x3, 1436, x4)
+
+inst_382:
+// rs1_val==0 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x554, 0x0, 0x554, x3, 1440, x4)
+
+inst_383:
+// rs1_val==0 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x0, 0x0, 0x0, x3, 1444, x4)
+
+inst_384:
+// rs1_val==0 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x4, 0x0, 0x4, x3, 1448, x4)
+
+inst_385:
+// rs1_val==0 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x332, 0x0, 0x332, x3, 1452, x4)
+
+inst_386:
+// rs1_val==0 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x665, 0x0, 0x665, x3, 1456, x4)
+
+inst_387:
+// rs1_val==0 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x2c, 0x0, 0x2c, x3, 1460, x4)
+
+inst_388:
+// rs1_val==0 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x556, 0x0, 0x556, x3, 1464, x4)
+
+inst_389:
+// rs1_val==0 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xfffffaab, 0x0, -0x555, x3, 1468, x4)
+
+inst_390:
+// rs1_val==0 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x6, 0x0, 0x6, x3, 1472, x4)
+
+inst_391:
+// rs1_val==0 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x334, 0x0, 0x334, x3, 1476, x4)
+
+inst_392:
+// rs1_val==0 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x667, 0x0, 0x667, x3, 1480, x4)
+
+inst_393:
+// rs1_val==0 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffd4, 0x0, -0x2c, x3, 1484, x4)
+
+inst_394:
+// rs1_val==0 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x2e, 0x0, 0x2e, x3, 1488, x4)
+
+inst_395:
+// rs1_val==4 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x7, 0x4, 0x3, x3, 1492, x4)
+
+inst_396:
+// rs1_val==4 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x559, 0x4, 0x555, x3, 1496, x4)
+
+inst_397:
+// rs1_val==4 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffaae, 0x4, -0x556, x3, 1500, x4)
+
+inst_398:
+// rs1_val==4 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x9, 0x4, 0x5, x3, 1504, x4)
+
+inst_399:
+// rs1_val==4 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x337, 0x4, 0x333, x3, 1508, x4)
+
+inst_400:
+// rs1_val==4 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x66a, 0x4, 0x666, x3, 1512, x4)
+
+inst_401:
+// rs1_val==4 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffd7, 0x4, -0x2d, x3, 1516, x4)
+
+inst_402:
+// rs1_val==4 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x31, 0x4, 0x2d, x3, 1520, x4)
+
+inst_403:
+// rs1_val==4 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x6, 0x4, 0x2, x3, 1524, x4)
+
+inst_404:
+// rs1_val==4 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x558, 0x4, 0x554, x3, 1528, x4)
+
+inst_405:
+// rs1_val==4 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x4, 0x4, 0x0, x3, 1532, x4)
+
+inst_406:
+// rs1_val==4 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x336, 0x4, 0x332, x3, 1536, x4)
+
+inst_407:
+// rs1_val==4 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x669, 0x4, 0x665, x3, 1540, x4)
+
+inst_408:
+// rs1_val==4 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x30, 0x4, 0x2c, x3, 1544, x4)
+
+inst_409:
+// rs1_val==4 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x55a, 0x4, 0x556, x3, 1548, x4)
+
+inst_410:
+// rs1_val==4 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xfffffaaf, 0x4, -0x555, x3, 1552, x4)
+
+inst_411:
+// rs1_val==4 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xa, 0x4, 0x6, x3, 1556, x4)
+
+inst_412:
+// rs1_val==4 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x338, 0x4, 0x334, x3, 1560, x4)
+
+inst_413:
+// rs1_val==4 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x66b, 0x4, 0x667, x3, 1564, x4)
+
+inst_414:
+// rs1_val==4 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffd8, 0x4, -0x2c, x3, 1568, x4)
+
+inst_415:
+// rs1_val==4 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x32, 0x4, 0x2e, x3, 1572, x4)
+
+inst_416:
+// rs1_val==858993458 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x33333335, 0x33333332, 0x3, x3, 1576, x4)
+
+inst_417:
+// rs1_val==858993458 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x33333887, 0x33333332, 0x555, x3, 1580, x4)
+
+inst_418:
+// rs1_val==858993458 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x33332ddc, 0x33333332, -0x556, x3, 1584, x4)
+
+inst_419:
+// rs1_val==858993458 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x33333337, 0x33333332, 0x5, x3, 1588, x4)
+
+inst_420:
+// rs1_val==858993458 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x33333665, 0x33333332, 0x333, x3, 1592, x4)
+
+inst_421:
+// rs1_val==858993458 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x33333998, 0x33333332, 0x666, x3, 1596, x4)
+
+inst_422:
+// rs1_val==858993458 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x33333305, 0x33333332, -0x2d, x3, 1600, x4)
+
+inst_423:
+// rs1_val==858993458 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x3333335f, 0x33333332, 0x2d, x3, 1604, x4)
+
+inst_424:
+// rs1_val==858993458 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x33333334, 0x33333332, 0x2, x3, 1608, x4)
+
+inst_425:
+// rs1_val==858993458 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x33333886, 0x33333332, 0x554, x3, 1612, x4)
+
+inst_426:
+// rs1_val==858993458 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x33333332, 0x33333332, 0x0, x3, 1616, x4)
+
+inst_427:
+// rs1_val==858993458 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x33333336, 0x33333332, 0x4, x3, 1620, x4)
+
+inst_428:
+// rs1_val==858993458 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x33333664, 0x33333332, 0x332, x3, 1624, x4)
+
+inst_429:
+// rs1_val==858993458 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x33333997, 0x33333332, 0x665, x3, 1628, x4)
+
+inst_430:
+// rs1_val==858993458 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x3333335e, 0x33333332, 0x2c, x3, 1632, x4)
+
+inst_431:
+// rs1_val==858993458 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x33333888, 0x33333332, 0x556, x3, 1636, x4)
+
+inst_432:
+// rs1_val==858993458 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x33332ddd, 0x33333332, -0x555, x3, 1640, x4)
+
+inst_433:
+// rs1_val==858993458 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x33333338, 0x33333332, 0x6, x3, 1644, x4)
+
+inst_434:
+// rs1_val==858993458 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x33333666, 0x33333332, 0x334, x3, 1648, x4)
+
+inst_435:
+// rs1_val==858993458 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x33333999, 0x33333332, 0x667, x3, 1652, x4)
+
+inst_436:
+// rs1_val==858993458 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x33333306, 0x33333332, -0x2c, x3, 1656, x4)
+
+inst_437:
+// rs1_val==858993458 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x33333360, 0x33333332, 0x2e, x3, 1660, x4)
+
+inst_438:
+// rs1_val==1717986917 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x66666668, 0x66666665, 0x3, x3, 1664, x4)
+
+inst_439:
+// rs1_val==1717986917 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x66666bba, 0x66666665, 0x555, x3, 1668, x4)
+
+inst_440:
+// rs1_val==1717986917 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x6666610f, 0x66666665, -0x556, x3, 1672, x4)
+
+inst_441:
+// rs1_val==1717986917 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x6666666a, 0x66666665, 0x5, x3, 1676, x4)
+
+inst_442:
+// rs1_val==1717986917 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x66666998, 0x66666665, 0x333, x3, 1680, x4)
+
+inst_443:
+// rs1_val==1717986917 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x66666ccb, 0x66666665, 0x666, x3, 1684, x4)
+
+inst_444:
+// rs1_val==1717986917 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x66666638, 0x66666665, -0x2d, x3, 1688, x4)
+
+inst_445:
+// rs1_val==1717986917 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x66666692, 0x66666665, 0x2d, x3, 1692, x4)
+
+inst_446:
+// rs1_val==1717986917 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x66666667, 0x66666665, 0x2, x3, 1696, x4)
+
+inst_447:
+// rs1_val==1717986917 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x66666bb9, 0x66666665, 0x554, x3, 1700, x4)
+
+inst_448:
+// rs1_val==1717986917 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x66666665, 0x66666665, 0x0, x3, 1704, x4)
+
+inst_449:
+// rs1_val==1717986917 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x66666669, 0x66666665, 0x4, x3, 1708, x4)
+
+inst_450:
+// rs1_val==1717986917 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x66666997, 0x66666665, 0x332, x3, 1712, x4)
+
+inst_451:
+// rs1_val==1717986917 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x66666cca, 0x66666665, 0x665, x3, 1716, x4)
+
+inst_452:
+// rs1_val==1717986917 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x66666691, 0x66666665, 0x2c, x3, 1720, x4)
+
+inst_453:
+// rs1_val==1717986917 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x66666bbb, 0x66666665, 0x556, x3, 1724, x4)
+
+inst_454:
+// rs1_val==1717986917 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x66666110, 0x66666665, -0x555, x3, 1728, x4)
+
+inst_455:
+// rs1_val==1717986917 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x6666666b, 0x66666665, 0x6, x3, 1732, x4)
+
+inst_456:
+// rs1_val==1717986917 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x66666999, 0x66666665, 0x334, x3, 1736, x4)
+
+inst_457:
+// rs1_val==1717986917 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x66666ccc, 0x66666665, 0x667, x3, 1740, x4)
+
+inst_458:
+// rs1_val==1717986917 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x66666639, 0x66666665, -0x2c, x3, 1744, x4)
+
+inst_459:
+// rs1_val==1717986917 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x66666693, 0x66666665, 0x2e, x3, 1748, x4)
+
+inst_460:
+// rs1_val==46339 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xb506, 0xb503, 0x3, x3, 1752, x4)
+
+inst_461:
+// rs1_val==46339 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xba58, 0xb503, 0x555, x3, 1756, x4)
+
+inst_462:
+// rs1_val==46339 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xafad, 0xb503, -0x556, x3, 1760, x4)
+
+inst_463:
+// rs1_val==46339 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xb508, 0xb503, 0x5, x3, 1764, x4)
+
+inst_464:
+// rs1_val==46339 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xb836, 0xb503, 0x333, x3, 1768, x4)
+
+inst_465:
+// rs1_val==46339 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xbb69, 0xb503, 0x666, x3, 1772, x4)
+
+inst_466:
+// rs1_val==46339 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xb4d6, 0xb503, -0x2d, x3, 1776, x4)
+
+inst_467:
+// rs1_val==46339 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xb530, 0xb503, 0x2d, x3, 1780, x4)
+
+inst_468:
+// rs1_val==46339 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xb505, 0xb503, 0x2, x3, 1784, x4)
+
+inst_469:
+// rs1_val==46339 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xba57, 0xb503, 0x554, x3, 1788, x4)
+
+inst_470:
+// rs1_val==46339 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xb503, 0xb503, 0x0, x3, 1792, x4)
+
+inst_471:
+// rs1_val==46339 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xb507, 0xb503, 0x4, x3, 1796, x4)
+
+inst_472:
+// rs1_val==46339 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xb835, 0xb503, 0x332, x3, 1800, x4)
+
+inst_473:
+// rs1_val==46339 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xbb68, 0xb503, 0x665, x3, 1804, x4)
+
+inst_474:
+// rs1_val==46339 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xb52f, 0xb503, 0x2c, x3, 1808, x4)
+
+inst_475:
+// rs1_val==46339 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xba59, 0xb503, 0x556, x3, 1812, x4)
+
+inst_476:
+// rs1_val==46339 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xafae, 0xb503, -0x555, x3, 1816, x4)
+
+inst_477:
+// rs1_val==46339 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xb509, 0xb503, 0x6, x3, 1820, x4)
+
+inst_478:
+// rs1_val==46339 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xb837, 0xb503, 0x334, x3, 1824, x4)
+
+inst_479:
+// rs1_val==46339 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xbb6a, 0xb503, 0x667, x3, 1828, x4)
+
+inst_480:
+// rs1_val==46339 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xb4d7, 0xb503, -0x2c, x3, 1832, x4)
+
+inst_481:
+// rs1_val==46339 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb503; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xb531, 0xb503, 0x2e, x3, 1836, x4)
+
+inst_482:
+// rs1_val==1431655766 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x55555559, 0x55555556, 0x3, x3, 1840, x4)
+
+inst_483:
+// rs1_val==1431655766 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x55555aab, 0x55555556, 0x555, x3, 1844, x4)
+
+inst_484:
+// rs1_val==1431655766 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x55555000, 0x55555556, -0x556, x3, 1848, x4)
+
+inst_485:
+// rs1_val==1431655766 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x5555555b, 0x55555556, 0x5, x3, 1852, x4)
+
+inst_486:
+// rs1_val==1431655766 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x55555889, 0x55555556, 0x333, x3, 1856, x4)
+
+inst_487:
+// rs1_val==1431655766 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x55555bbc, 0x55555556, 0x666, x3, 1860, x4)
+
+inst_488:
+// rs1_val==1431655766 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x55555529, 0x55555556, -0x2d, x3, 1864, x4)
+
+inst_489:
+// rs1_val==1431655766 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x55555583, 0x55555556, 0x2d, x3, 1868, x4)
+
+inst_490:
+// rs1_val==1431655766 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x55555558, 0x55555556, 0x2, x3, 1872, x4)
+
+inst_491:
+// rs1_val==1431655766 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x55555aaa, 0x55555556, 0x554, x3, 1876, x4)
+
+inst_492:
+// rs1_val==1431655766 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x55555556, 0x55555556, 0x0, x3, 1880, x4)
+
+inst_493:
+// rs1_val==1431655766 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x5555555a, 0x55555556, 0x4, x3, 1884, x4)
+
+inst_494:
+// rs1_val==1431655766 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x55555888, 0x55555556, 0x332, x3, 1888, x4)
+
+inst_495:
+// rs1_val==1431655766 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x55555bbb, 0x55555556, 0x665, x3, 1892, x4)
+
+inst_496:
+// rs1_val==1431655766 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x55555582, 0x55555556, 0x2c, x3, 1896, x4)
+
+inst_497:
+// rs1_val==1431655766 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x55555aac, 0x55555556, 0x556, x3, 1900, x4)
+
+inst_498:
+// rs1_val==1431655766 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x55555001, 0x55555556, -0x555, x3, 1904, x4)
+
+inst_499:
+// rs1_val==1431655766 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x5555555c, 0x55555556, 0x6, x3, 1908, x4)
+
+inst_500:
+// rs1_val==1431655766 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x5555588a, 0x55555556, 0x334, x3, 1912, x4)
+
+inst_501:
+// rs1_val==1431655766 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x55555bbd, 0x55555556, 0x667, x3, 1916, x4)
+
+inst_502:
+// rs1_val==1431655766 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x5555552a, 0x55555556, -0x2c, x3, 1920, x4)
+
+inst_503:
+// rs1_val==1431655766 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x55555584, 0x55555556, 0x2e, x3, 1924, x4)
+
+inst_504:
+// rs1_val==-1431655765 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaae, -0x55555555, 0x3, x3, 1928, x4)
+
+inst_505:
+// rs1_val==-1431655765 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xaaaab000, -0x55555555, 0x555, x3, 1932, x4)
+
+inst_506:
+// rs1_val==-1431655765 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xaaaaa555, -0x55555555, -0x556, x3, 1936, x4)
+
+inst_507:
+// rs1_val==-1431655765 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaab0, -0x55555555, 0x5, x3, 1940, x4)
+
+inst_508:
+// rs1_val==-1431655765 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xaaaaadde, -0x55555555, 0x333, x3, 1944, x4)
+
+inst_509:
+// rs1_val==-1431655765 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xaaaab111, -0x55555555, 0x666, x3, 1948, x4)
+
+inst_510:
+// rs1_val==-1431655765 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaa7e, -0x55555555, -0x2d, x3, 1952, x4)
+
+inst_511:
+// rs1_val==-1431655765 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaad8, -0x55555555, 0x2d, x3, 1956, x4)
+
+inst_512:
+// rs1_val==-1431655765 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaad, -0x55555555, 0x2, x3, 1960, x4)
+
+inst_513:
+// rs1_val==-1431655765 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xaaaaafff, -0x55555555, 0x554, x3, 1964, x4)
+
+inst_514:
+// rs1_val==-1431655765 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaab, -0x55555555, 0x0, x3, 1968, x4)
+
+inst_515:
+// rs1_val==-1431655765 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaf, -0x55555555, 0x4, x3, 1972, x4)
+
+inst_516:
+// rs1_val==-1431655765 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaddd, -0x55555555, 0x332, x3, 1976, x4)
+
+inst_517:
+// rs1_val==-1431655765 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xaaaab110, -0x55555555, 0x665, x3, 1980, x4)
+
+inst_518:
+// rs1_val==-1431655765 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaad7, -0x55555555, 0x2c, x3, 1984, x4)
+
+inst_519:
+// rs1_val==-1431655765 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xaaaab001, -0x55555555, 0x556, x3, 1988, x4)
+
+inst_520:
+// rs1_val==-1431655765 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xaaaaa556, -0x55555555, -0x555, x3, 1992, x4)
+
+inst_521:
+// rs1_val==-1431655765 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaab1, -0x55555555, 0x6, x3, 1996, x4)
+
+inst_522:
+// rs1_val==-1431655765 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaddf, -0x55555555, 0x334, x3, 2000, x4)
+
+inst_523:
+// rs1_val==-1431655765 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xaaaab112, -0x55555555, 0x667, x3, 2004, x4)
+
+inst_524:
+// rs1_val==-1431655765 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaa7f, -0x55555555, -0x2c, x3, 2008, x4)
+
+inst_525:
+// rs1_val==-1431655765 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaad9, -0x55555555, 0x2e, x3, 2012, x4)
+
+inst_526:
+// rs1_val==6 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x9, 0x6, 0x3, x3, 2016, x4)
+
+inst_527:
+// rs1_val==6 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x55b, 0x6, 0x555, x3, 2020, x4)
+
+inst_528:
+// rs1_val==6 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffab0, 0x6, -0x556, x3, 2024, x4)
+
+inst_529:
+// rs1_val==6 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xb, 0x6, 0x5, x3, 2028, x4)
+
+inst_530:
+// rs1_val==6 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x339, 0x6, 0x333, x3, 2032, x4)
+
+inst_531:
+// rs1_val==6 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x66c, 0x6, 0x666, x3, 2036, x4)
+
+inst_532:
+// rs1_val==6 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffd9, 0x6, -0x2d, x3, 2040, x4)
+
+inst_533:
+// rs1_val==6 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x33, 0x6, 0x2d, x3, 2044, x4)
+RVTEST_SIGBASE( x3,signature_x3_1)
+
+inst_534:
+// rs1_val==6 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x8, 0x6, 0x2, x3, 0, x4)
+
+inst_535:
+// rs1_val==6 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x55a, 0x6, 0x554, x3, 4, x4)
+
+inst_536:
+// rs1_val==6 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x6, 0x6, 0x0, x3, 8, x4)
+
+inst_537:
+// rs1_val==6 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xa, 0x6, 0x4, x3, 12, x4)
+
+inst_538:
+// rs1_val==6 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x338, 0x6, 0x332, x3, 16, x4)
+
+inst_539:
+// rs1_val==6 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x66b, 0x6, 0x665, x3, 20, x4)
+
+inst_540:
+// rs1_val==6 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x32, 0x6, 0x2c, x3, 24, x4)
+
+inst_541:
+// rs1_val==6 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x55c, 0x6, 0x556, x3, 28, x4)
+
+inst_542:
+// rs1_val==6 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xfffffab1, 0x6, -0x555, x3, 32, x4)
+
+inst_543:
+// rs1_val==6 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xc, 0x6, 0x6, x3, 36, x4)
+
+inst_544:
+// rs1_val==6 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x33a, 0x6, 0x334, x3, 40, x4)
+
+inst_545:
+// rs1_val==6 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x66d, 0x6, 0x667, x3, 44, x4)
+
+inst_546:
+// rs1_val==6 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffda, 0x6, -0x2c, x3, 48, x4)
+
+inst_547:
+// rs1_val==6 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x34, 0x6, 0x2e, x3, 52, x4)
+
+inst_548:
+// rs1_val==858993460 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x33333337, 0x33333334, 0x3, x3, 56, x4)
+
+inst_549:
+// rs1_val==858993460 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x33333889, 0x33333334, 0x555, x3, 60, x4)
+
+inst_550:
+// rs1_val==858993460 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x33332dde, 0x33333334, -0x556, x3, 64, x4)
+
+inst_551:
+// rs1_val==858993460 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x33333339, 0x33333334, 0x5, x3, 68, x4)
+
+inst_552:
+// rs1_val==858993460 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x33333667, 0x33333334, 0x333, x3, 72, x4)
+
+inst_553:
+// rs1_val==858993460 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x3333399a, 0x33333334, 0x666, x3, 76, x4)
+
+inst_554:
+// rs1_val==858993460 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x33333307, 0x33333334, -0x2d, x3, 80, x4)
+
+inst_555:
+// rs1_val==858993460 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x33333361, 0x33333334, 0x2d, x3, 84, x4)
+
+inst_556:
+// rs1_val==858993460 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x33333336, 0x33333334, 0x2, x3, 88, x4)
+
+inst_557:
+// rs1_val==858993460 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x33333888, 0x33333334, 0x554, x3, 92, x4)
+
+inst_558:
+// rs1_val==858993460 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x33333334, 0x33333334, 0x0, x3, 96, x4)
+
+inst_559:
+// rs1_val==858993460 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x33333338, 0x33333334, 0x4, x3, 100, x4)
+
+inst_560:
+// imm_val == 64, rs1_val == -2097153
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x200001; immval:0x40
+TEST_IMM_OP( addi, x11, x10, 0xffe0003f, -0x200001, 0x40, x3, 104, x4)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x14_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x14_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_1:
+ .fill 27*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/and-01.S b/riscof/suite/rv32i_m/I/and-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..d397cb7ebd9abbd56bc1bd4c3e74576f870dccf5
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/and-01.S
@@ -0,0 +1,2999 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the and instruction of the RISC-V I extension for the and covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",and)
+
+RVTEST_SIGBASE( x6,signature_x6_1)
+
+inst_0:
+// rs2 == rd != rs1, rs1==x24, rs2==x25, rd==x25, rs1_val > 0 and rs2_val > 0, rs1_val == 16384, rs1_val != rs2_val
+// opcode: and ; op1:x24; op2:x25; dest:x25; op1val:0x4000; op2val:0x7
+TEST_RR_OP(and, x25, x24, x25, 0x0, 0x4000, 0x7, x6, 0, x8)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x3, rs2==x3, rd==x18, rs1_val > 0 and rs2_val < 0, rs1_val == 2048, rs2_val == -1048577
+// opcode: and ; op1:x3; op2:x3; dest:x18; op1val:0x800; op2val:0x800
+TEST_RR_OP(and, x18, x3, x3, 0x800, 0x800, 0x800, x6, 4, x8)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x19, rs2==x19, rd==x19, rs1_val < 0 and rs2_val < 0, rs1_val == -3
+// opcode: and ; op1:x19; op2:x19; dest:x19; op1val:-0x3; op2val:-0x3
+TEST_RR_OP(and, x19, x19, x19, 0xfffffffd, -0x3, -0x3, x6, 8, x8)
+
+inst_3:
+// rs1 == rd != rs2, rs1==x5, rs2==x14, rd==x5, rs1_val < 0 and rs2_val > 0, rs2_val == (2**(xlen-1)-1), rs2_val == 2147483647
+// opcode: and ; op1:x5; op2:x14; dest:x5; op1val:-0x1; op2val:0x7fffffff
+TEST_RR_OP(and, x5, x5, x14, 0x7fffffff, -0x1, 0x7fffffff, x6, 12, x8)
+
+inst_4:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x23, rs2==x16, rd==x20, rs1_val == rs2_val, rs1_val==5 and rs2_val==5
+// opcode: and ; op1:x23; op2:x16; dest:x20; op1val:0x5; op2val:0x5
+TEST_RR_OP(and, x20, x23, x16, 0x5, 0x5, 0x5, x6, 16, x8)
+
+inst_5:
+// rs1==x20, rs2==x2, rd==x30, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648, rs1_val == 2
+// opcode: and ; op1:x20; op2:x2; dest:x30; op1val:0x2; op2val:-0x80000000
+TEST_RR_OP(and, x30, x20, x2, 0x0, 0x2, -0x80000000, x6, 20, x8)
+
+inst_6:
+// rs1==x7, rs2==x24, rd==x13, rs2_val == 0, rs1_val==858993459 and rs2_val==0
+// opcode: and ; op1:x7; op2:x24; dest:x13; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(and, x13, x7, x24, 0x0, 0x33333333, 0x0, x6, 24, x8)
+
+inst_7:
+// rs1==x30, rs2==x27, rd==x10, rs2_val == 1, rs1_val == -1073741825
+// opcode: and ; op1:x30; op2:x27; dest:x10; op1val:-0x40000001; op2val:0x1
+TEST_RR_OP(and, x10, x30, x27, 0x1, -0x40000001, 0x1, x6, 28, x8)
+
+inst_8:
+// rs1==x28, rs2==x18, rd==x22, rs1_val == (-2**(xlen-1)), rs2_val == 2048, rs1_val == -2147483648
+// opcode: and ; op1:x28; op2:x18; dest:x22; op1val:-0x80000000; op2val:0x800
+TEST_RR_OP(and, x22, x28, x18, 0x0, -0x80000000, 0x800, x6, 32, x8)
+
+inst_9:
+// rs1==x2, rs2==x15, rd==x0, rs1_val == 0, rs2_val == 512
+// opcode: and ; op1:x2; op2:x15; dest:x0; op1val:0x0; op2val:0x200
+TEST_RR_OP(and, x0, x2, x15, 0, 0x0, 0x200, x6, 36, x8)
+
+inst_10:
+// rs1==x25, rs2==x26, rd==x12, rs1_val == (2**(xlen-1)-1), rs2_val == 1431655765, rs1_val == 2147483647
+// opcode: and ; op1:x25; op2:x26; dest:x12; op1val:0x7fffffff; op2val:0x55555555
+TEST_RR_OP(and, x12, x25, x26, 0x55555555, 0x7fffffff, 0x55555555, x6, 40, x8)
+
+inst_11:
+// rs1==x1, rs2==x31, rd==x2, rs1_val == 1,
+// opcode: and ; op1:x1; op2:x31; dest:x2; op1val:0x1; op2val:0x55555554
+TEST_RR_OP(and, x2, x1, x31, 0x0, 0x1, 0x55555554, x6, 44, x8)
+
+inst_12:
+// rs1==x27, rs2==x11, rd==x14, rs2_val == 2, rs1_val == 262144
+// opcode: and ; op1:x27; op2:x11; dest:x14; op1val:0x40000; op2val:0x2
+TEST_RR_OP(and, x14, x27, x11, 0x0, 0x40000, 0x2, x6, 48, x8)
+
+inst_13:
+// rs1==x31, rs2==x23, rd==x4, rs2_val == 4, rs1_val == -131073
+// opcode: and ; op1:x31; op2:x23; dest:x4; op1val:-0x20001; op2val:0x4
+TEST_RR_OP(and, x4, x31, x23, 0x4, -0x20001, 0x4, x6, 52, x8)
+
+inst_14:
+// rs1==x21, rs2==x9, rd==x27, rs2_val == 8,
+// opcode: and ; op1:x21; op2:x9; dest:x27; op1val:-0x55555555; op2val:0x8
+TEST_RR_OP(and, x27, x21, x9, 0x8, -0x55555555, 0x8, x6, 56, x8)
+
+inst_15:
+// rs1==x26, rs2==x7, rd==x23, rs2_val == 16, rs1_val == 1024
+// opcode: and ; op1:x26; op2:x7; dest:x23; op1val:0x400; op2val:0x10
+TEST_RR_OP(and, x23, x26, x7, 0x0, 0x400, 0x10, x6, 60, x19)
+
+inst_16:
+// rs1==x9, rs2==x20, rd==x24, rs2_val == 32,
+// opcode: and ; op1:x9; op2:x20; dest:x24; op1val:-0x8; op2val:0x20
+TEST_RR_OP(and, x24, x9, x20, 0x20, -0x8, 0x20, x6, 64, x19)
+
+inst_17:
+// rs1==x15, rs2==x13, rd==x26, rs2_val == 64, rs1_val == -257
+// opcode: and ; op1:x15; op2:x13; dest:x26; op1val:-0x101; op2val:0x40
+TEST_RR_OP(and, x26, x15, x13, 0x40, -0x101, 0x40, x6, 68, x19)
+
+inst_18:
+// rs1==x12, rs2==x4, rd==x17, rs2_val == 128, rs1_val == -33554433
+// opcode: and ; op1:x12; op2:x4; dest:x17; op1val:-0x2000001; op2val:0x80
+TEST_RR_OP(and, x17, x12, x4, 0x80, -0x2000001, 0x80, x6, 72, x19)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_19:
+// rs1==x4, rs2==x17, rd==x8, rs2_val == 256,
+// opcode: and ; op1:x4; op2:x17; dest:x8; op1val:0x66666665; op2val:0x100
+TEST_RR_OP(and, x8, x4, x17, 0x0, 0x66666665, 0x100, x2, 0, x19)
+
+inst_20:
+// rs1==x13, rs2==x22, rd==x1, rs2_val == 1024, rs1_val == -129
+// opcode: and ; op1:x13; op2:x22; dest:x1; op1val:-0x81; op2val:0x400
+TEST_RR_OP(and, x1, x13, x22, 0x400, -0x81, 0x400, x2, 4, x19)
+
+inst_21:
+// rs1==x8, rs2==x12, rd==x7, rs2_val == 4096, rs1_val == 4
+// opcode: and ; op1:x8; op2:x12; dest:x7; op1val:0x4; op2val:0x1000
+TEST_RR_OP(and, x7, x8, x12, 0x0, 0x4, 0x1000, x2, 8, x19)
+
+inst_22:
+// rs1==x11, rs2==x5, rd==x21, rs2_val == 8192, rs1_val == -32769
+// opcode: and ; op1:x11; op2:x5; dest:x21; op1val:-0x8001; op2val:0x2000
+TEST_RR_OP(and, x21, x11, x5, 0x2000, -0x8001, 0x2000, x2, 12, x19)
+
+inst_23:
+// rs1==x14, rs2==x21, rd==x29, rs2_val == 16384, rs1_val == 64
+// opcode: and ; op1:x14; op2:x21; dest:x29; op1val:0x40; op2val:0x4000
+TEST_RR_OP(and, x29, x14, x21, 0x0, 0x40, 0x4000, x2, 16, x19)
+
+inst_24:
+// rs1==x17, rs2==x10, rd==x11, rs2_val == 32768,
+// opcode: and ; op1:x17; op2:x10; dest:x11; op1val:0x5; op2val:0x8000
+TEST_RR_OP(and, x11, x17, x10, 0x0, 0x5, 0x8000, x2, 20, x19)
+
+inst_25:
+// rs1==x22, rs2==x6, rd==x3, rs2_val == 65536, rs1_val == 8388608
+// opcode: and ; op1:x22; op2:x6; dest:x3; op1val:0x800000; op2val:0x10000
+TEST_RR_OP(and, x3, x22, x6, 0x0, 0x800000, 0x10000, x2, 24, x19)
+
+inst_26:
+// rs1==x0, rs2==x29, rd==x9, rs2_val == 131072,
+// opcode: and ; op1:x0; op2:x29; dest:x9; op1val:0x0; op2val:0x20000
+TEST_RR_OP(and, x9, x0, x29, 0x0, 0x0, 0x20000, x2, 28, x19)
+
+inst_27:
+// rs1==x29, rs2==x30, rd==x28, rs2_val == 262144,
+// opcode: and ; op1:x29; op2:x30; dest:x28; op1val:0x5; op2val:0x40000
+TEST_RR_OP(and, x28, x29, x30, 0x0, 0x5, 0x40000, x2, 32, x19)
+
+inst_28:
+// rs1==x18, rs2==x1, rd==x6, rs2_val == 524288, rs1_val == 65536
+// opcode: and ; op1:x18; op2:x1; dest:x6; op1val:0x10000; op2val:0x80000
+TEST_RR_OP(and, x6, x18, x1, 0x0, 0x10000, 0x80000, x2, 36, x19)
+
+inst_29:
+// rs1==x6, rs2==x0, rd==x31, rs2_val == 1048576, rs1_val == 134217728
+// opcode: and ; op1:x6; op2:x0; dest:x31; op1val:0x8000000; op2val:0x0
+TEST_RR_OP(and, x31, x6, x0, 0x0, 0x8000000, 0x0, x2, 40, x19)
+
+inst_30:
+// rs1==x16, rs2==x8, rd==x15, rs2_val == 2097152,
+// opcode: and ; op1:x16; op2:x8; dest:x15; op1val:-0x3; op2val:0x200000
+TEST_RR_OP(and, x15, x16, x8, 0x200000, -0x3, 0x200000, x2, 44, x19)
+
+inst_31:
+// rs1==x10, rs2==x28, rd==x16, rs2_val == 4194304,
+// opcode: and ; op1:x10; op2:x28; dest:x16; op1val:0x800; op2val:0x400000
+TEST_RR_OP(and, x16, x10, x28, 0x0, 0x800, 0x400000, x2, 48, x1)
+
+inst_32:
+// rs2_val == 8388608,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x800000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x66666666, 0x800000, x2, 52, x1)
+
+inst_33:
+// rs2_val == 16777216,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x1000000
+TEST_RR_OP(and, x12, x10, x11, 0x1000000, 0x33333333, 0x1000000, x2, 56, x1)
+
+inst_34:
+// rs2_val == 33554432, rs1_val == 1431655765
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x55555555, 0x2000000, x2, 60, x1)
+
+inst_35:
+// rs2_val == 67108864, rs1_val == 131072
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0x4000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x20000, 0x4000000, x2, 64, x1)
+
+inst_36:
+// rs2_val == 134217728,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x8000000
+TEST_RR_OP(and, x12, x10, x11, 0x8000000, -0x8001, 0x8000000, x2, 68, x1)
+
+inst_37:
+// rs2_val == 268435456,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x10000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x66666666, 0x10000000, x2, 72, x1)
+
+inst_38:
+// rs2_val == 536870912, rs1_val == -65537
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x20000000
+TEST_RR_OP(and, x12, x10, x11, 0x20000000, -0x10001, 0x20000000, x2, 76, x1)
+
+inst_39:
+// rs2_val == 1073741824,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x40000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x8000000, 0x40000000, x2, 80, x1)
+
+inst_40:
+// rs2_val == -2, rs1_val == -513
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:-0x2
+TEST_RR_OP(and, x12, x10, x11, 0xfffffdfe, -0x201, -0x2, x2, 84, x1)
+
+inst_41:
+// rs2_val == -3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:-0x3
+TEST_RR_OP(and, x12, x10, x11, 0xbffffffd, -0x40000001, -0x3, x2, 88, x1)
+
+inst_42:
+// rs2_val == -5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:-0x5
+TEST_RR_OP(and, x12, x10, x11, 0x800000, 0x800000, -0x5, x2, 92, x1)
+
+inst_43:
+// rs2_val == -9,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:-0x9
+TEST_RR_OP(and, x12, x10, x11, 0xfffffdf7, -0x201, -0x9, x2, 96, x1)
+
+inst_44:
+// rs2_val == -17, rs1_val == -134217729
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x11
+TEST_RR_OP(and, x12, x10, x11, 0xf7ffffef, -0x8000001, -0x11, x2, 100, x1)
+
+inst_45:
+// rs2_val == -33,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x21
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x3, -0x21, x2, 104, x1)
+
+inst_46:
+// rs2_val == -65, rs1_val == 128
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:-0x41
+TEST_RR_OP(and, x12, x10, x11, 0x80, 0x80, -0x41, x2, 108, x1)
+
+inst_47:
+// rs2_val == -129,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x7; op2val:-0x81
+TEST_RR_OP(and, x12, x10, x11, 0xffffff79, -0x7, -0x81, x2, 112, x1)
+
+inst_48:
+// rs2_val == -257, rs1_val == -9
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:-0x101
+TEST_RR_OP(and, x12, x10, x11, 0xfffffef7, -0x9, -0x101, x2, 116, x1)
+
+inst_49:
+// rs2_val == -513, rs1_val == -1431655766
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x201
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaa8aa, -0x55555556, -0x201, x2, 120, x1)
+
+inst_50:
+// rs2_val == -1025, rs1_val == -8388609
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:-0x401
+TEST_RR_OP(and, x12, x10, x11, 0xff7ffbff, -0x800001, -0x401, x2, 124, x1)
+
+inst_51:
+// rs2_val == -2049, rs1_val == -1048577
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:-0x801
+TEST_RR_OP(and, x12, x10, x11, 0xffeff7ff, -0x100001, -0x801, x2, 128, x1)
+
+inst_52:
+// rs2_val == -4097,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:-0x1001
+TEST_RR_OP(and, x12, x10, x11, 0x400, 0x400, -0x1001, x2, 132, x1)
+
+inst_53:
+// rs2_val == -8193,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x2001
+TEST_RR_OP(and, x12, x10, x11, 0x66664666, 0x66666666, -0x2001, x2, 136, x1)
+
+inst_54:
+// rs2_val == -16385,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:-0x4001
+TEST_RR_OP(and, x12, x10, x11, 0x7, 0x7, -0x4001, x2, 140, x1)
+
+inst_55:
+// rs2_val == -32769, rs1_val == 33554432
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:-0x8001
+TEST_RR_OP(and, x12, x10, x11, 0x2000000, 0x2000000, -0x8001, x2, 144, x1)
+
+inst_56:
+// rs2_val == -65537, rs1_val == 1073741824
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:-0x10001
+TEST_RR_OP(and, x12, x10, x11, 0x40000000, 0x40000000, -0x10001, x2, 148, x1)
+
+inst_57:
+// rs2_val == -131073, rs1_val == -5
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:-0x20001
+TEST_RR_OP(and, x12, x10, x11, 0xfffdfffb, -0x5, -0x20001, x2, 152, x1)
+
+inst_58:
+// rs2_val == -262145,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:-0x40001
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x40000, -0x40001, x2, 156, x1)
+
+inst_59:
+// rs2_val == -524289, rs1_val == 16
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:-0x80001
+TEST_RR_OP(and, x12, x10, x11, 0x10, 0x10, -0x80001, x2, 160, x1)
+
+inst_60:
+// rs2_val == -2097153,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:-0x200001
+TEST_RR_OP(and, x12, x10, x11, 0x400, 0x400, -0x200001, x2, 164, x1)
+
+inst_61:
+// rs2_val == -4194305,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x1; op2val:-0x400001
+TEST_RR_OP(and, x12, x10, x11, 0xffbfffff, -0x1, -0x400001, x2, 168, x1)
+
+inst_62:
+// rs2_val == -8388609,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x800001
+TEST_RR_OP(and, x12, x10, x11, 0x20000, 0x20000, -0x800001, x2, 172, x1)
+
+inst_63:
+// rs2_val == -16777217, rs1_val == -262145
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:-0x1000001
+TEST_RR_OP(and, x12, x10, x11, 0xfefbffff, -0x40001, -0x1000001, x2, 176, x1)
+
+inst_64:
+// rs2_val == -33554433,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x2000001
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x6, -0x2000001, x2, 180, x1)
+
+inst_65:
+// rs2_val == -67108865,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x4000001
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaab, -0x55555555, -0x4000001, x2, 184, x1)
+
+inst_66:
+// rs2_val == -134217729, rs1_val == -17
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:-0x8000001
+TEST_RR_OP(and, x12, x10, x11, 0xf7ffffef, -0x11, -0x8000001, x2, 188, x1)
+
+inst_67:
+// rs2_val == -268435457, rs1_val == -536870913
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:-0x10000001
+TEST_RR_OP(and, x12, x10, x11, 0xcfffffff, -0x20000001, -0x10000001, x2, 192, x1)
+
+inst_68:
+// rs2_val == -536870913,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x20000001
+TEST_RR_OP(and, x12, x10, x11, 0xdfff4afd, -0xb503, -0x20000001, x2, 196, x1)
+
+inst_69:
+// rs2_val == -1073741825,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000; op2val:-0x40000001
+TEST_RR_OP(and, x12, x10, x11, 0x80000000, -0x80000000, -0x40000001, x2, 200, x1)
+
+inst_70:
+// rs2_val == -1431655766, rs1_val==-46340 and rs2_val==-1431655766
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0xaaaa0aa8, -0xb504, -0x55555556, x2, 204, x1)
+
+inst_71:
+// rs1_val == 8,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x8, 0x55555554, x2, 208, x1)
+
+inst_72:
+// rs1_val == 32,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x20, 0x4, x2, 212, x1)
+
+inst_73:
+// rs1_val == 256,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x101
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x100, -0x101, x2, 216, x1)
+
+inst_74:
+// rs1_val == 512,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x200, 0x0, x2, 220, x1)
+
+inst_75:
+// rs1_val == 4096,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x8
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x1000, 0x8, x2, 224, x1)
+
+inst_76:
+// rs1_val == 8192,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0x40000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2000, 0x40000, x2, 228, x1)
+
+inst_77:
+// rs1_val == 32768,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x4
+TEST_RR_OP(and, x12, x10, x11, 0x8000, 0x8000, -0x4, x2, 232, x1)
+
+inst_78:
+// rs1_val == 524288,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0x3fffffff
+TEST_RR_OP(and, x12, x10, x11, 0x80000, 0x80000, 0x3fffffff, x2, 236, x1)
+
+inst_79:
+// rs1_val == 1048576,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:-0x2001
+TEST_RR_OP(and, x12, x10, x11, 0x100000, 0x100000, -0x2001, x2, 240, x1)
+
+inst_80:
+// rs1_val == 2097152,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0x8000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x200000, 0x8000, x2, 244, x1)
+
+inst_81:
+// rs1_val == 4194304,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:-0x11
+TEST_RR_OP(and, x12, x10, x11, 0x400000, 0x400000, -0x11, x2, 248, x1)
+
+inst_82:
+// rs1_val == 16777216,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x1000000, 0x3, x2, 252, x1)
+
+inst_83:
+// rs1_val == 67108864,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x20000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4000000, 0x20000, x2, 256, x1)
+
+inst_84:
+// rs1_val == 268435456,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x10000000, 0x4, x2, 260, x1)
+
+inst_85:
+// rs1_val == 536870912,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x20000000, 0x4, x2, 264, x1)
+
+inst_86:
+// rs1_val == -2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0x10000001
+TEST_RR_OP(and, x12, x10, x11, 0xeffffffe, -0x2, -0x10000001, x2, 268, x1)
+
+inst_87:
+// rs1_val == -33,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x33333312, -0x21, 0x33333332, x2, 272, x1)
+
+inst_88:
+// rs1_val == -65,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:-0x400001
+TEST_RR_OP(and, x12, x10, x11, 0xffbfffbf, -0x41, -0x400001, x2, 276, x1)
+
+inst_89:
+// rs1_val == -1025,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:-0x4001
+TEST_RR_OP(and, x12, x10, x11, 0xffffbbff, -0x401, -0x4001, x2, 280, x1)
+
+inst_90:
+// rs1_val == -2049,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:-0x7
+TEST_RR_OP(and, x12, x10, x11, 0xfffff7f9, -0x801, -0x7, x2, 284, x1)
+
+inst_91:
+// rs1_val == -4097,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:-0x81
+TEST_RR_OP(and, x12, x10, x11, 0xffffef7f, -0x1001, -0x81, x2, 288, x1)
+
+inst_92:
+// rs1_val == -8193,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:-0x5
+TEST_RR_OP(and, x12, x10, x11, 0xffffdffb, -0x2001, -0x5, x2, 292, x1)
+
+inst_93:
+// rs1_val == -16385,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0x4001, 0x4, x2, 296, x1)
+
+inst_94:
+// rs1_val == -524289,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:-0x200001
+TEST_RR_OP(and, x12, x10, x11, 0xffd7ffff, -0x80001, -0x200001, x2, 300, x1)
+
+inst_95:
+// rs1_val == -2097153,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0x200001, 0x4, x2, 304, x1)
+
+inst_96:
+// rs1_val == -4194305,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x33333334, -0x400001, 0x33333334, x2, 308, x1)
+
+inst_97:
+// rs1_val == -16777217,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0x7fffffff
+TEST_RR_OP(and, x12, x10, x11, 0x7effffff, -0x1000001, 0x7fffffff, x2, 312, x1)
+
+inst_98:
+// rs1_val == -67108865,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x62666665, -0x4000001, 0x66666665, x2, 316, x1)
+
+inst_99:
+// rs1_val == -268435457,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0xefff4afd, -0x10000001, -0xb503, x2, 320, x1)
+
+inst_100:
+// rs1_val==3 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x3, 0x3, x2, 324, x1)
+
+inst_101:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x3, 0x55555555, x2, 328, x1)
+
+inst_102:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, -0x55555556, x2, 332, x1)
+
+inst_103:
+// rs1_val==3 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x3, 0x5, x2, 336, x1)
+
+inst_104:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x3, 0x33333333, x2, 340, x1)
+
+inst_105:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, 0x66666666, x2, 344, x1)
+
+inst_106:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3, -0xb504, x2, 348, x1)
+
+inst_107:
+// rs1_val==3 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3, 0xb504, x2, 352, x1)
+
+inst_108:
+// rs1_val==3 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, 0x2, x2, 356, x1)
+
+inst_109:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3, 0x55555554, x2, 360, x1)
+
+inst_110:
+// rs1_val==3 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3, 0x0, x2, 364, x1)
+
+inst_111:
+// rs1_val==3 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3, 0x4, x2, 368, x1)
+
+inst_112:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, 0x33333332, x2, 372, x1)
+
+inst_113:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x3, 0x66666665, x2, 376, x1)
+
+inst_114:
+// rs1_val==3 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x3, 0xb503, x2, 380, x1)
+
+inst_115:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, 0x55555556, x2, 384, x1)
+
+inst_116:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x3, -0x55555555, x2, 388, x1)
+
+inst_117:
+// rs1_val==3 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, 0x6, x2, 392, x1)
+
+inst_118:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3, 0x33333334, x2, 396, x1)
+
+inst_119:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x3, 0x66666667, x2, 400, x1)
+
+inst_120:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x3, -0xb503, x2, 404, x1)
+
+inst_121:
+// rs1_val==3 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x3, 0xb505, x2, 408, x1)
+
+inst_122:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x55555555, 0x3, x2, 412, x1)
+
+inst_123:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x55555555, 0x55555555, 0x55555555, x2, 416, x1)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x55555555, -0x55555556, x2, 420, x1)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x55555555, 0x5, x2, 424, x1)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x11111111, 0x55555555, 0x33333333, x2, 428, x1)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x44444444, 0x55555555, 0x66666666, x2, 432, x1)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x55554054, 0x55555555, -0xb504, x2, 436, x1)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x1504, 0x55555555, 0xb504, x2, 440, x1)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x55555555, 0x2, x2, 444, x1)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x55555554, 0x55555555, 0x55555554, x2, 448, x1)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x55555555, 0x0, x2, 452, x1)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x55555555, 0x4, x2, 456, x1)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x11111110, 0x55555555, 0x33333332, x2, 460, x1)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x44444445, 0x55555555, 0x66666665, x2, 464, x1)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x1501, 0x55555555, 0xb503, x2, 468, x1)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x55555554, 0x55555555, 0x55555556, x2, 472, x1)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x55555555, -0x55555555, x2, 476, x1)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x55555555, 0x6, x2, 480, x1)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x11111114, 0x55555555, 0x33333334, x2, 484, x1)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x44444445, 0x55555555, 0x66666667, x2, 488, x1)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x55554055, 0x55555555, -0xb503, x2, 492, x1)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x1505, 0x55555555, 0xb505, x2, 496, x1)
+
+inst_144:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x55555556, 0x3, x2, 500, x1)
+
+inst_145:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x55555556, 0x55555555, x2, 504, x1)
+
+inst_146:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaa, -0x55555556, -0x55555556, x2, 508, x1)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x55555556, 0x5, x2, 512, x1)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, -0x55555556, 0x33333333, x2, 516, x1)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, -0x55555556, 0x66666666, x2, 520, x1)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0xaaaa0aa8, -0x55555556, -0xb504, x2, 524, x1)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0xa000, -0x55555556, 0xb504, x2, 528, x1)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x55555556, 0x2, x2, 532, x1)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x55555556, 0x55555554, x2, 536, x1)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x55555556, 0x0, x2, 540, x1)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x55555556, 0x4, x2, 544, x1)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, -0x55555556, 0x33333332, x2, 548, x1)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x22222220, -0x55555556, 0x66666665, x2, 552, x1)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0xa002, -0x55555556, 0xb503, x2, 556, x1)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x55555556, 0x55555556, x2, 560, x1)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaa, -0x55555556, -0x55555555, x2, 564, x1)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x55555556, 0x6, x2, 568, x1)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x22222220, -0x55555556, 0x33333334, x2, 572, x1)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, -0x55555556, 0x66666667, x2, 576, x1)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0xaaaa0aa8, -0x55555556, -0xb503, x2, 580, x1)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0xa000, -0x55555556, 0xb505, x2, 584, x1)
+
+inst_166:
+// rs1_val==5 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x5, 0x3, x2, 588, x1)
+
+inst_167:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x5, 0x55555555, x2, 592, x1)
+
+inst_168:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5, -0x55555556, x2, 596, x1)
+
+inst_169:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x5, 0x33333333, x2, 600, x1)
+
+inst_170:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0x66666666, x2, 604, x1)
+
+inst_171:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, -0xb504, x2, 608, x1)
+
+inst_172:
+// rs1_val==5 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0xb504, x2, 612, x1)
+
+inst_173:
+// rs1_val==5 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5, 0x2, x2, 616, x1)
+
+inst_174:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0x55555554, x2, 620, x1)
+
+inst_175:
+// rs1_val==5 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5, 0x0, x2, 624, x1)
+
+inst_176:
+// rs1_val==5 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0x4, x2, 628, x1)
+
+inst_177:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5, 0x33333332, x2, 632, x1)
+
+inst_178:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x5, 0x66666665, x2, 636, x1)
+
+inst_179:
+// rs1_val==5 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x5, 0xb503, x2, 640, x1)
+
+inst_180:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0x55555556, x2, 644, x1)
+
+inst_181:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x5, -0x55555555, x2, 648, x1)
+
+inst_182:
+// rs1_val==5 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0x6, x2, 652, x1)
+
+inst_183:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0x33333334, x2, 656, x1)
+
+inst_184:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x5, 0x66666667, x2, 660, x1)
+
+inst_185:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x5, -0xb503, x2, 664, x1)
+
+inst_186:
+// rs1_val==5 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x5, 0xb505, x2, 668, x1)
+
+inst_187:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x33333333, 0x3, x2, 672, x1)
+
+inst_188:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x11111111, 0x33333333, 0x55555555, x2, 676, x1)
+
+inst_189:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, 0x33333333, -0x55555556, x2, 680, x1)
+
+inst_190:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x33333333, 0x5, x2, 684, x1)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x33333333, 0x33333333, 0x33333333, x2, 688, x1)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, 0x33333333, 0x66666666, x2, 692, x1)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x33330230, 0x33333333, -0xb504, x2, 696, x1)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x3100, 0x33333333, 0xb504, x2, 700, x1)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x33333333, 0x2, x2, 704, x1)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x11111110, 0x33333333, 0x55555554, x2, 708, x1)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x33333333, 0x4, x2, 712, x1)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x33333332, 0x33333333, 0x33333332, x2, 716, x1)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x22222221, 0x33333333, 0x66666665, x2, 720, x1)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x3103, 0x33333333, 0xb503, x2, 724, x1)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x11111112, 0x33333333, 0x55555556, x2, 728, x1)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x22222223, 0x33333333, -0x55555555, x2, 732, x1)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x33333333, 0x6, x2, 736, x1)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x33333330, 0x33333333, 0x33333334, x2, 740, x1)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x22222223, 0x33333333, 0x66666667, x2, 744, x1)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x33330231, 0x33333333, -0xb503, x2, 748, x1)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x3101, 0x33333333, 0xb505, x2, 752, x1)
+
+inst_208:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x66666666, 0x3, x2, 756, x1)
+
+inst_209:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x44444444, 0x66666666, 0x55555555, x2, 760, x1)
+
+inst_210:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, 0x66666666, -0x55555556, x2, 764, x1)
+
+inst_211:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x66666666, 0x5, x2, 768, x1)
+
+inst_212:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, 0x66666666, 0x33333333, x2, 772, x1)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x66666666, 0x66666666, 0x66666666, x2, 776, x1)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x66664264, 0x66666666, -0xb504, x2, 780, x1)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x2404, 0x66666666, 0xb504, x2, 784, x1)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x66666666, 0x2, x2, 788, x1)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x44444444, 0x66666666, 0x55555554, x2, 792, x1)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x66666666, 0x0, x2, 796, x1)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x66666666, 0x4, x2, 800, x1)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, 0x66666666, 0x33333332, x2, 804, x1)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x66666664, 0x66666666, 0x66666665, x2, 808, x1)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x2402, 0x66666666, 0xb503, x2, 812, x1)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x44444446, 0x66666666, 0x55555556, x2, 816, x1)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, 0x66666666, -0x55555555, x2, 820, x1)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x66666666, 0x6, x2, 824, x1)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x22222224, 0x66666666, 0x33333334, x2, 828, x1)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x66666666, 0x66666666, 0x66666667, x2, 832, x1)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x66664264, 0x66666666, -0xb503, x2, 836, x1)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x2404, 0x66666666, 0xb505, x2, 840, x1)
+
+inst_230:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0xb504, 0x3, x2, 844, x1)
+
+inst_231:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x55554054, -0xb504, 0x55555555, x2, 848, x1)
+
+inst_232:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb504, 0x5, x2, 852, x1)
+
+inst_233:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x33330230, -0xb504, 0x33333333, x2, 856, x1)
+
+inst_234:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x66664264, -0xb504, 0x66666666, x2, 860, x1)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0xffff4afc, -0xb504, -0xb504, x2, 864, x1)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb504, 0xb504, x2, 868, x1)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0xb504, 0x2, x2, 872, x1)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x55554054, -0xb504, 0x55555554, x2, 876, x1)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0xb504, 0x0, x2, 880, x1)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb504, 0x4, x2, 884, x1)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x33330230, -0xb504, 0x33333332, x2, 888, x1)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x66664264, -0xb504, 0x66666665, x2, 892, x1)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0xb504, 0xb503, x2, 896, x1)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x55554054, -0xb504, 0x55555556, x2, 900, x1)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0xaaaa0aa8, -0xb504, -0x55555555, x2, 904, x1)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb504, 0x6, x2, 908, x1)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x33330234, -0xb504, 0x33333334, x2, 912, x1)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x66664264, -0xb504, 0x66666667, x2, 916, x1)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0xffff4afc, -0xb504, -0xb503, x2, 920, x1)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb504, 0xb505, x2, 924, x1)
+
+inst_251:
+// rs1_val==46340 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb504, 0x3, x2, 928, x1)
+
+inst_252:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x1504, 0xb504, 0x55555555, x2, 932, x1)
+
+inst_253:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0xa000, 0xb504, -0x55555556, x2, 936, x1)
+
+inst_254:
+// rs1_val==46340 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0xb504, 0x5, x2, 940, x1)
+
+inst_255:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x3100, 0xb504, 0x33333333, x2, 944, x1)
+
+inst_256:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x2404, 0xb504, 0x66666666, x2, 948, x1)
+
+inst_257:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0xb504, -0xb504, x2, 952, x1)
+
+inst_258:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0xb504, 0xb504, 0xb504, x2, 956, x1)
+
+inst_259:
+// rs1_val==46340 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb504, 0x2, x2, 960, x1)
+
+inst_260:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x1504, 0xb504, 0x55555554, x2, 964, x1)
+
+inst_261:
+// rs1_val==46340 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb504, 0x0, x2, 968, x1)
+
+inst_262:
+// rs1_val==46340 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0xb504, 0x4, x2, 972, x1)
+
+inst_263:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x3100, 0xb504, 0x33333332, x2, 976, x1)
+
+inst_264:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x2404, 0xb504, 0x66666665, x2, 980, x1)
+
+inst_265:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0xb500, 0xb504, 0xb503, x2, 984, x1)
+
+inst_266:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x1504, 0xb504, 0x55555556, x2, 988, x1)
+
+inst_267:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0xa000, 0xb504, -0x55555555, x2, 992, x1)
+
+inst_268:
+// rs1_val==46340 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0xb504, 0x6, x2, 996, x1)
+
+inst_269:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x3104, 0xb504, 0x33333334, x2, 1000, x1)
+
+inst_270:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x2404, 0xb504, 0x66666667, x2, 1004, x1)
+
+inst_271:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0xb504, -0xb503, x2, 1008, x1)
+
+inst_272:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0xb504, 0xb504, 0xb505, x2, 1012, x1)
+
+inst_273:
+// rs1_val==2 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x3, x2, 1016, x1)
+
+inst_274:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x55555555, x2, 1020, x1)
+
+inst_275:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, -0x55555556, x2, 1024, x1)
+
+inst_276:
+// rs1_val==2 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x5, x2, 1028, x1)
+
+inst_277:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x33333333, x2, 1032, x1)
+
+inst_278:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x66666666, x2, 1036, x1)
+
+inst_279:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, -0xb504, x2, 1040, x1)
+
+inst_280:
+// rs1_val==2 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0xb504, x2, 1044, x1)
+
+inst_281:
+// rs1_val==2 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x2, x2, 1048, x1)
+
+inst_282:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x55555554, x2, 1052, x1)
+
+inst_283:
+// rs1_val==2 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x0, x2, 1056, x1)
+
+inst_284:
+// rs1_val==2 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x4, x2, 1060, x1)
+
+inst_285:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x33333332, x2, 1064, x1)
+
+inst_286:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x66666665, x2, 1068, x1)
+
+inst_287:
+// rs1_val==2 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0xb503, x2, 1072, x1)
+
+inst_288:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x55555556, x2, 1076, x1)
+
+inst_289:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, -0x55555555, x2, 1080, x1)
+
+inst_290:
+// rs1_val==2 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x6, x2, 1084, x1)
+
+inst_291:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x33333334, x2, 1088, x1)
+
+inst_292:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x66666667, x2, 1092, x1)
+
+inst_293:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, -0xb503, x2, 1096, x1)
+
+inst_294:
+// rs1_val==2 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0xb505, x2, 1100, x1)
+
+inst_295:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x55555554, 0x3, x2, 1104, x1)
+
+inst_296:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x55555554, 0x55555554, 0x55555555, x2, 1108, x1)
+
+inst_297:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x55555554, -0x55555556, x2, 1112, x1)
+
+inst_298:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x55555554, 0x5, x2, 1116, x1)
+
+inst_299:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x11111110, 0x55555554, 0x33333333, x2, 1120, x1)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x44444444, 0x55555554, 0x66666666, x2, 1124, x1)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x55554054, 0x55555554, -0xb504, x2, 1128, x1)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x1504, 0x55555554, 0xb504, x2, 1132, x1)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x55555554, 0x2, x2, 1136, x1)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x55555554, 0x55555554, 0x55555554, x2, 1140, x1)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x55555554, 0x0, x2, 1144, x1)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x55555554, 0x4, x2, 1148, x1)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x11111110, 0x55555554, 0x33333332, x2, 1152, x1)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x44444444, 0x55555554, 0x66666665, x2, 1156, x1)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x1500, 0x55555554, 0xb503, x2, 1160, x1)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x55555554, 0x55555554, 0x55555556, x2, 1164, x1)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x55555554, -0x55555555, x2, 1168, x1)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x55555554, 0x6, x2, 1172, x1)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x11111114, 0x55555554, 0x33333334, x2, 1176, x1)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x44444444, 0x55555554, 0x66666667, x2, 1180, x1)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x55554054, 0x55555554, -0xb503, x2, 1184, x1)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x1504, 0x55555554, 0xb505, x2, 1188, x1)
+
+inst_317:
+// rs1_val==0 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x3, x2, 1192, x1)
+
+inst_318:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x55555555, x2, 1196, x1)
+
+inst_319:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, -0x55555556, x2, 1200, x1)
+
+inst_320:
+// rs1_val==0 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x5, x2, 1204, x1)
+
+inst_321:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x33333333, x2, 1208, x1)
+
+inst_322:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x66666666, x2, 1212, x1)
+
+inst_323:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, -0xb504, x2, 1216, x1)
+
+inst_324:
+// rs1_val==0 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0xb504, x2, 1220, x1)
+
+inst_325:
+// rs1_val==0 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x2, x2, 1224, x1)
+
+inst_326:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaab, -0x55555555, -0x55555555, x2, 1228, x1)
+
+inst_327:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x55555555, 0x6, x2, 1232, x1)
+
+inst_328:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x22222220, -0x55555555, 0x33333334, x2, 1236, x1)
+
+inst_329:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x22222223, -0x55555555, 0x66666667, x2, 1240, x1)
+
+inst_330:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0xaaaa0aa9, -0x55555555, -0xb503, x2, 1244, x1)
+
+inst_331:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0xa001, -0x55555555, 0xb505, x2, 1248, x1)
+
+inst_332:
+// rs1_val==6 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, 0x3, x2, 1252, x1)
+
+inst_333:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0x55555555, x2, 1256, x1)
+
+inst_334:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, -0x55555556, x2, 1260, x1)
+
+inst_335:
+// rs1_val==6 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0x5, x2, 1264, x1)
+
+inst_336:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, 0x33333333, x2, 1268, x1)
+
+inst_337:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x6, 0x66666666, x2, 1272, x1)
+
+inst_338:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, -0xb504, x2, 1276, x1)
+
+inst_339:
+// rs1_val==6 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0xb504, x2, 1280, x1)
+
+inst_340:
+// rs1_val==6 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, 0x2, x2, 1284, x1)
+
+inst_341:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0x55555554, x2, 1288, x1)
+
+inst_342:
+// rs1_val==6 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x6, 0x0, x2, 1292, x1)
+
+inst_343:
+// rs1_val==6 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0x4, x2, 1296, x1)
+
+inst_344:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, 0x33333332, x2, 1300, x1)
+
+inst_345:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0x66666665, x2, 1304, x1)
+
+inst_346:
+// rs1_val==6 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, 0xb503, x2, 1308, x1)
+
+inst_347:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x6, 0x55555556, x2, 1312, x1)
+
+inst_348:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, -0x55555555, x2, 1316, x1)
+
+inst_349:
+// rs1_val==6 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x6, 0x6, x2, 1320, x1)
+
+inst_350:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0x33333334, x2, 1324, x1)
+
+inst_351:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x6, 0x66666667, x2, 1328, x1)
+
+inst_352:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, -0xb503, x2, 1332, x1)
+
+inst_353:
+// rs1_val==6 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0xb505, x2, 1336, x1)
+
+inst_354:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x33333334, 0x3, x2, 1340, x1)
+
+inst_355:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x11111114, 0x33333334, 0x55555555, x2, 1344, x1)
+
+inst_356:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x22222220, 0x33333334, -0x55555556, x2, 1348, x1)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x33333334, 0x5, x2, 1352, x1)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x33333330, 0x33333334, 0x33333333, x2, 1356, x1)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x22222224, 0x33333334, 0x66666666, x2, 1360, x1)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x33330234, 0x33333334, -0xb504, x2, 1364, x1)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x3104, 0x33333334, 0xb504, x2, 1368, x1)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x33333334, 0x2, x2, 1372, x1)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x11111114, 0x33333334, 0x55555554, x2, 1376, x1)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x33333334, 0x0, x2, 1380, x1)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x33333334, 0x4, x2, 1384, x1)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x33333330, 0x33333334, 0x33333332, x2, 1388, x1)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x22222224, 0x33333334, 0x66666665, x2, 1392, x1)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x3100, 0x33333334, 0xb503, x2, 1396, x1)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x11111114, 0x33333334, 0x55555556, x2, 1400, x1)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x22222220, 0x33333334, -0x55555555, x2, 1404, x1)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x33333334, 0x6, x2, 1408, x1)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x33333334, 0x33333334, 0x33333334, x2, 1412, x1)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x22222224, 0x33333334, 0x66666667, x2, 1416, x1)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x33330234, 0x33333334, -0xb503, x2, 1420, x1)
+
+inst_375:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x3104, 0x33333334, 0xb505, x2, 1424, x1)
+
+inst_376:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x66666667, 0x3, x2, 1428, x1)
+
+inst_377:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x44444445, 0x66666667, 0x55555555, x2, 1432, x1)
+
+inst_378:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, 0x66666667, -0x55555556, x2, 1436, x1)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x66666667, 0x5, x2, 1440, x1)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x22222223, 0x66666667, 0x33333333, x2, 1444, x1)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x66666666, 0x66666667, 0x66666666, x2, 1448, x1)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x66664264, 0x66666667, -0xb504, x2, 1452, x1)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x2404, 0x66666667, 0xb504, x2, 1456, x1)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x66666667, 0x2, x2, 1460, x1)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x44444444, 0x66666667, 0x55555554, x2, 1464, x1)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x66666667, 0x0, x2, 1468, x1)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x66666667, 0x4, x2, 1472, x1)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, 0x66666667, 0x33333332, x2, 1476, x1)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x66666665, 0x66666667, 0x66666665, x2, 1480, x1)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x2403, 0x66666667, 0xb503, x2, 1484, x1)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x44444446, 0x66666667, 0x55555556, x2, 1488, x1)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x22222223, 0x66666667, -0x55555555, x2, 1492, x1)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x66666667, 0x6, x2, 1496, x1)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x22222224, 0x66666667, 0x33333334, x2, 1500, x1)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x66666667, 0x66666667, 0x66666667, x2, 1504, x1)
+
+inst_396:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x66664265, 0x66666667, -0xb503, x2, 1508, x1)
+
+inst_397:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x2405, 0x66666667, 0xb505, x2, 1512, x1)
+
+inst_398:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x1, -0xb503, 0x3, x2, 1516, x1)
+
+inst_399:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x55554055, -0xb503, 0x55555555, x2, 1520, x1)
+
+inst_400:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0xaaaa0aa8, -0xb503, -0x55555556, x2, 1524, x1)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x5, -0xb503, 0x5, x2, 1528, x1)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x33330231, -0xb503, 0x33333333, x2, 1532, x1)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x66664264, -0xb503, 0x66666666, x2, 1536, x1)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0xffff4afc, -0xb503, -0xb504, x2, 1540, x1)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb503, 0xb504, x2, 1544, x1)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0xb503, 0x2, x2, 1548, x1)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x55554054, -0xb503, 0x55555554, x2, 1552, x1)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0xb503, 0x0, x2, 1556, x1)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb503, 0x4, x2, 1560, x1)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x33330230, -0xb503, 0x33333332, x2, 1564, x1)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x66664265, -0xb503, 0x66666665, x2, 1568, x1)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x1, -0xb503, 0xb503, x2, 1572, x1)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x55554054, -0xb503, 0x55555556, x2, 1576, x1)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0xaaaa0aa9, -0xb503, -0x55555555, x2, 1580, x1)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb503, 0x6, x2, 1584, x1)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x33330234, -0xb503, 0x33333334, x2, 1588, x1)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x66664265, -0xb503, 0x66666667, x2, 1592, x1)
+
+inst_418:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0xffff4afd, -0xb503, -0xb503, x2, 1596, x1)
+
+inst_419:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x5, -0xb503, 0xb505, x2, 1600, x1)
+
+inst_420:
+// rs1_val==46341 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0xb505, 0x3, x2, 1604, x1)
+
+inst_421:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x1505, 0xb505, 0x55555555, x2, 1608, x1)
+
+inst_422:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0xa000, 0xb505, -0x55555556, x2, 1612, x1)
+
+inst_423:
+// rs1_val==46341 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0xb505, 0x5, x2, 1616, x1)
+
+inst_424:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x3101, 0xb505, 0x33333333, x2, 1620, x1)
+
+inst_425:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x2404, 0xb505, 0x66666666, x2, 1624, x1)
+
+inst_426:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0xb505, -0xb504, x2, 1628, x1)
+
+inst_427:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0xb504, 0xb505, 0xb504, x2, 1632, x1)
+
+inst_428:
+// rs1_val==46341 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb505, 0x2, x2, 1636, x1)
+
+inst_429:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x1504, 0xb505, 0x55555554, x2, 1640, x1)
+
+inst_430:
+// rs1_val==46341 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb505, 0x0, x2, 1644, x1)
+
+inst_431:
+// rs1_val==46341 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0xb505, 0x4, x2, 1648, x1)
+
+inst_432:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x3100, 0xb505, 0x33333332, x2, 1652, x1)
+
+inst_433:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x2405, 0xb505, 0x66666665, x2, 1656, x1)
+
+inst_434:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0xb501, 0xb505, 0xb503, x2, 1660, x1)
+
+inst_435:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x1504, 0xb505, 0x55555556, x2, 1664, x1)
+
+inst_436:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0xa001, 0xb505, -0x55555555, x2, 1668, x1)
+
+inst_437:
+// rs1_val==46341 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0xb505, 0x6, x2, 1672, x1)
+
+inst_438:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x3104, 0xb505, 0x33333334, x2, 1676, x1)
+
+inst_439:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x2405, 0xb505, 0x66666667, x2, 1680, x1)
+
+inst_440:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0xb505, -0xb503, x2, 1684, x1)
+
+inst_441:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0xb505, 0xb505, 0xb505, x2, 1688, x1)
+
+inst_442:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x55555554, x2, 1692, x1)
+
+inst_443:
+// rs1_val==0 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x0, x2, 1696, x1)
+
+inst_444:
+// rs1_val==0 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x4, x2, 1700, x1)
+
+inst_445:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x33333332, x2, 1704, x1)
+
+inst_446:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x66666665, x2, 1708, x1)
+
+inst_447:
+// rs1_val==0 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0xb503, x2, 1712, x1)
+
+inst_448:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x55555556, x2, 1716, x1)
+
+inst_449:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, -0x55555555, x2, 1720, x1)
+
+inst_450:
+// rs1_val==0 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x6, x2, 1724, x1)
+
+inst_451:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x33333334, x2, 1728, x1)
+
+inst_452:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x66666667, x2, 1732, x1)
+
+inst_453:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, -0xb503, x2, 1736, x1)
+
+inst_454:
+// rs1_val==0 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0xb505, x2, 1740, x1)
+
+inst_455:
+// rs1_val==4 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0x3, x2, 1744, x1)
+
+inst_456:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x55555555, x2, 1748, x1)
+
+inst_457:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, -0x55555556, x2, 1752, x1)
+
+inst_458:
+// rs1_val==4 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x5, x2, 1756, x1)
+
+inst_459:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0x33333333, x2, 1760, x1)
+
+inst_460:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x66666666, x2, 1764, x1)
+
+inst_461:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, -0xb504, x2, 1768, x1)
+
+inst_462:
+// rs1_val==4 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0xb504, x2, 1772, x1)
+
+inst_463:
+// rs1_val==4 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0x2, x2, 1776, x1)
+
+inst_464:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x55555554, x2, 1780, x1)
+
+inst_465:
+// rs1_val==4 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0x0, x2, 1784, x1)
+
+inst_466:
+// rs1_val==4 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x4, x2, 1788, x1)
+
+inst_467:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0x33333332, x2, 1792, x1)
+
+inst_468:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x66666665, x2, 1796, x1)
+
+inst_469:
+// rs1_val==4 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0xb503, x2, 1800, x1)
+
+inst_470:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x55555556, x2, 1804, x1)
+
+inst_471:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, -0x55555555, x2, 1808, x1)
+
+inst_472:
+// rs1_val==4 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x6, x2, 1812, x1)
+
+inst_473:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x33333334, x2, 1816, x1)
+
+inst_474:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x66666667, x2, 1820, x1)
+
+inst_475:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, -0xb503, x2, 1824, x1)
+
+inst_476:
+// rs1_val==4 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0xb505, x2, 1828, x1)
+
+inst_477:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x33333332, 0x3, x2, 1832, x1)
+
+inst_478:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x11111110, 0x33333332, 0x55555555, x2, 1836, x1)
+
+inst_479:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, 0x33333332, -0x55555556, x2, 1840, x1)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x33333332, 0x5, x2, 1844, x1)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x33333332, 0x33333332, 0x33333333, x2, 1848, x1)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, 0x33333332, 0x66666666, x2, 1852, x1)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x33330230, 0x33333332, -0xb504, x2, 1856, x1)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x3100, 0x33333332, 0xb504, x2, 1860, x1)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x33333332, 0x2, x2, 1864, x1)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x11111110, 0x33333332, 0x55555554, x2, 1868, x1)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x33333332, 0x0, x2, 1872, x1)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x33333332, 0x4, x2, 1876, x1)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x33333332, 0x33333332, 0x33333332, x2, 1880, x1)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x22222220, 0x33333332, 0x66666665, x2, 1884, x1)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x3102, 0x33333332, 0xb503, x2, 1888, x1)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x11111112, 0x33333332, 0x55555556, x2, 1892, x1)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, 0x33333332, -0x55555555, x2, 1896, x1)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x33333332, 0x6, x2, 1900, x1)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x33333330, 0x33333332, 0x33333334, x2, 1904, x1)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, 0x33333332, 0x66666667, x2, 1908, x1)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x33330230, 0x33333332, -0xb503, x2, 1912, x1)
+
+inst_498:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x3100, 0x33333332, 0xb505, x2, 1916, x1)
+
+inst_499:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x66666665, 0x3, x2, 1920, x1)
+
+inst_500:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x44444445, 0x66666665, 0x55555555, x2, 1924, x1)
+
+inst_501:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x22222220, 0x66666665, -0x55555556, x2, 1928, x1)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x66666665, 0x5, x2, 1932, x1)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x22222221, 0x66666665, 0x33333333, x2, 1936, x1)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x66666664, 0x66666665, 0x66666666, x2, 1940, x1)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x66664264, 0x66666665, -0xb504, x2, 1944, x1)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x2404, 0x66666665, 0xb504, x2, 1948, x1)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x66666665, 0x2, x2, 1952, x1)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x44444444, 0x66666665, 0x55555554, x2, 1956, x1)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x66666665, 0x0, x2, 1960, x1)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x66666665, 0x4, x2, 1964, x1)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x22222220, 0x66666665, 0x33333332, x2, 1968, x1)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x66666665, 0x66666665, 0x66666665, x2, 1972, x1)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x2401, 0x66666665, 0xb503, x2, 1976, x1)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x44444444, 0x66666665, 0x55555556, x2, 1980, x1)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x22222221, 0x66666665, -0x55555555, x2, 1984, x1)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x66666665, 0x6, x2, 1988, x1)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x22222224, 0x66666665, 0x33333334, x2, 1992, x1)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x66666665, 0x66666665, 0x66666667, x2, 1996, x1)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x66664265, 0x66666665, -0xb503, x2, 2000, x1)
+
+inst_520:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x2405, 0x66666665, 0xb505, x2, 2004, x1)
+
+inst_521:
+// rs1_val==46339 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0xb503, 0x3, x2, 2008, x1)
+
+inst_522:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x1501, 0xb503, 0x55555555, x2, 2012, x1)
+
+inst_523:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0xa002, 0xb503, -0x55555556, x2, 2016, x1)
+
+inst_524:
+// rs1_val==46339 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0xb503, 0x5, x2, 2020, x1)
+
+inst_525:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x3103, 0xb503, 0x33333333, x2, 2024, x1)
+
+inst_526:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x2402, 0xb503, 0x66666666, x2, 2028, x1)
+
+inst_527:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb503, -0xb504, x2, 2032, x1)
+
+inst_528:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0xb500, 0xb503, 0xb504, x2, 2036, x1)
+
+inst_529:
+// rs1_val==46339 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0xb503, 0x2, x2, 2040, x1)
+
+inst_530:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x1500, 0xb503, 0x55555554, x2, 2044, x1)
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_531:
+// rs1_val==46339 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb503, 0x0, x2, 0, x1)
+
+inst_532:
+// rs1_val==46339 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb503, 0x4, x2, 4, x1)
+
+inst_533:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x3102, 0xb503, 0x33333332, x2, 8, x1)
+
+inst_534:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x2401, 0xb503, 0x66666665, x2, 12, x1)
+
+inst_535:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0xb503, 0xb503, 0xb503, x2, 16, x1)
+
+inst_536:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x1502, 0xb503, 0x55555556, x2, 20, x1)
+
+inst_537:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0xa003, 0xb503, -0x55555555, x2, 24, x1)
+
+inst_538:
+// rs1_val==46339 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0xb503, 0x6, x2, 28, x1)
+
+inst_539:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x3100, 0xb503, 0x33333334, x2, 32, x1)
+
+inst_540:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x2403, 0xb503, 0x66666667, x2, 36, x1)
+
+inst_541:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0xb503, -0xb503, x2, 40, x1)
+
+inst_542:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0xb501, 0xb503, 0xb505, x2, 44, x1)
+
+inst_543:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x55555556, 0x3, x2, 48, x1)
+
+inst_544:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x55555554, 0x55555556, 0x55555555, x2, 52, x1)
+
+inst_545:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x55555556, -0x55555556, x2, 56, x1)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x55555556, 0x5, x2, 60, x1)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x11111112, 0x55555556, 0x33333333, x2, 64, x1)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x44444446, 0x55555556, 0x66666666, x2, 68, x1)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x55554054, 0x55555556, -0xb504, x2, 72, x1)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0x1504, 0x55555556, 0xb504, x2, 76, x1)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x55555556, 0x2, x2, 80, x1)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x55555554, 0x55555556, 0x55555554, x2, 84, x1)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x55555556, 0x0, x2, 88, x1)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x55555556, 0x4, x2, 92, x1)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x11111112, 0x55555556, 0x33333332, x2, 96, x1)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x44444444, 0x55555556, 0x66666665, x2, 100, x1)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x1502, 0x55555556, 0xb503, x2, 104, x1)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x55555556, 0x55555556, 0x55555556, x2, 108, x1)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x55555556, -0x55555555, x2, 112, x1)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x55555556, 0x6, x2, 116, x1)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(and, x12, x10, x11, 0x11111114, 0x55555556, 0x33333334, x2, 120, x1)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(and, x12, x10, x11, 0x44444446, 0x55555556, 0x66666667, x2, 124, x1)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb503
+TEST_RR_OP(and, x12, x10, x11, 0x55554054, 0x55555556, -0xb503, x2, 128, x1)
+
+inst_564:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(and, x12, x10, x11, 0x1504, 0x55555556, 0xb505, x2, 132, x1)
+
+inst_565:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x3, -0x55555555, 0x3, x2, 136, x1)
+
+inst_566:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555555
+TEST_RR_OP(and, x12, x10, x11, 0x1, -0x55555555, 0x55555555, x2, 140, x1)
+
+inst_567:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaa, -0x55555555, -0x55555556, x2, 144, x1)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x1, -0x55555555, 0x5, x2, 148, x1)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333333
+TEST_RR_OP(and, x12, x10, x11, 0x22222223, -0x55555555, 0x33333333, x2, 152, x1)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666666
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, -0x55555555, 0x66666666, x2, 156, x1)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb504
+TEST_RR_OP(and, x12, x10, x11, 0xaaaa0aa8, -0x55555555, -0xb504, x2, 160, x1)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb504
+TEST_RR_OP(and, x12, x10, x11, 0xa000, -0x55555555, 0xb504, x2, 164, x1)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x55555555, 0x2, x2, 168, x1)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555554
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x55555555, 0x55555554, x2, 172, x1)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x55555555, 0x0, x2, 176, x1)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x55555555, 0x4, x2, 180, x1)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333332
+TEST_RR_OP(and, x12, x10, x11, 0x22222222, -0x55555555, 0x33333332, x2, 184, x1)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666665
+TEST_RR_OP(and, x12, x10, x11, 0x22222221, -0x55555555, 0x66666665, x2, 188, x1)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb503
+TEST_RR_OP(and, x12, x10, x11, 0xa003, -0x55555555, 0xb503, x2, 192, x1)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x55555555, 0x55555556, x2, 196, x1)
+
+inst_581:
+// rs1_val > 0 and rs2_val < 0, rs1_val == 2048, rs2_val == -1048577
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x100001
+TEST_RR_OP(and, x12, x10, x11, 0x800, 0x800, -0x100001, x2, 200, x1)
+
+inst_582:
+// rs1_val == 0, rs2_val == 512
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x200
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x200, x2, 204, x1)
+
+inst_583:
+// rs2_val == 1048576, rs1_val == 134217728
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x100000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x8000000, 0x100000, x2, 208, x1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x6_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x6_1:
+ .fill 19*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 53*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/andi-01.S b/riscof/suite/rv32i_m/I/andi-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..af7a39b11acae2e5a605655040230edf4b1e746d
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/andi-01.S
@@ -0,0 +1,2889 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the andi instruction of the RISC-V I extension for the andi covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",andi)
+
+RVTEST_SIGBASE( x18,signature_x18_1)
+
+inst_0:
+// rs1 != rd, rs1==x22, rd==x10, imm_val == (-2**(12-1)), imm_val == -2048, rs1_val != imm_val, rs1_val < 0 and imm_val < 0, rs1_val == -2
+// opcode: andi ; op1:x22; dest:x10; op1val:-0x2; immval:-0x800
+TEST_IMM_OP( andi, x10, x22, 0xfffff800, -0x2, -0x800, x18, 0, x24)
+
+inst_1:
+// rs1 == rd, rs1==x25, rd==x25, imm_val == 0, rs1_val == -4097
+// opcode: andi ; op1:x25; dest:x25; op1val:-0x1001; immval:0x0
+TEST_IMM_OP( andi, x25, x25, 0x0, -0x1001, 0x0, x18, 4, x24)
+
+inst_2:
+// rs1==x16, rd==x17, imm_val == (2**(12-1)-1), rs1_val < 0 and imm_val > 0, imm_val == 2047, rs1_val == -33554433
+// opcode: andi ; op1:x16; dest:x17; op1val:-0x2000001; immval:0x7ff
+TEST_IMM_OP( andi, x17, x16, 0x7ff, -0x2000001, 0x7ff, x18, 8, x24)
+
+inst_3:
+// rs1==x2, rd==x8, imm_val == 1, rs1_val == -131073
+// opcode: andi ; op1:x2; dest:x8; op1val:-0x20001; immval:0x1
+TEST_IMM_OP( andi, x8, x2, 0x1, -0x20001, 0x1, x18, 12, x24)
+
+inst_4:
+// rs1==x28, rd==x30, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648, imm_val == 4
+// opcode: andi ; op1:x28; dest:x30; op1val:-0x80000000; immval:0x4
+TEST_IMM_OP( andi, x30, x28, 0x0, -0x80000000, 0x4, x18, 16, x24)
+
+inst_5:
+// rs1==x4, rd==x19, rs1_val == 0,
+// opcode: andi ; op1:x4; dest:x19; op1val:0x0; immval:-0x800
+TEST_IMM_OP( andi, x19, x4, 0x0, 0x0, -0x800, x18, 20, x24)
+
+inst_6:
+// rs1==x10, rd==x2, rs1_val == (2**(xlen-1)-1), rs1_val > 0 and imm_val > 0, rs1_val == 2147483647
+// opcode: andi ; op1:x10; dest:x2; op1val:0x7fffffff; immval:0x6
+TEST_IMM_OP( andi, x2, x10, 0x6, 0x7fffffff, 0x6, x18, 24, x24)
+
+inst_7:
+// rs1==x7, rd==x13, rs1_val == 1,
+// opcode: andi ; op1:x7; dest:x13; op1val:0x1; immval:0x554
+TEST_IMM_OP( andi, x13, x7, 0x0, 0x1, 0x554, x18, 28, x24)
+
+inst_8:
+// rs1==x27, rd==x9, rs1_val == imm_val, imm_val == 128, rs1_val == 128
+// opcode: andi ; op1:x27; dest:x9; op1val:0x80; immval:0x80
+TEST_IMM_OP( andi, x9, x27, 0x80, 0x80, 0x80, x18, 32, x24)
+
+inst_9:
+// rs1==x17, rd==x3, rs1_val > 0 and imm_val < 0,
+// opcode: andi ; op1:x17; dest:x3; op1val:0x7fffffff; immval:-0x2c
+TEST_IMM_OP( andi, x3, x17, 0x7fffffd4, 0x7fffffff, -0x2c, x18, 36, x24)
+
+inst_10:
+// rs1==x0, rd==x26, imm_val == 2, rs1_val == 16777216
+// opcode: andi ; op1:x0; dest:x26; op1val:0x0; immval:0x2
+TEST_IMM_OP( andi, x26, x0, 0x0, 0x0, 0x2, x18, 40, x24)
+
+inst_11:
+// rs1==x23, rd==x21, imm_val == 8,
+// opcode: andi ; op1:x23; dest:x21; op1val:0x66666666; immval:0x8
+TEST_IMM_OP( andi, x21, x23, 0x0, 0x66666666, 0x8, x18, 44, x24)
+
+inst_12:
+// rs1==x6, rd==x14, imm_val == 16,
+// opcode: andi ; op1:x6; dest:x14; op1val:0x0; immval:0x10
+TEST_IMM_OP( andi, x14, x6, 0x0, 0x0, 0x10, x18, 48, x24)
+
+inst_13:
+// rs1==x5, rd==x22, imm_val == 32, rs1_val == 256
+// opcode: andi ; op1:x5; dest:x22; op1val:0x100; immval:0x20
+TEST_IMM_OP( andi, x22, x5, 0x0, 0x100, 0x20, x18, 52, x24)
+
+inst_14:
+// rs1==x8, rd==x29, imm_val == 64, rs1_val == -5
+// opcode: andi ; op1:x8; dest:x29; op1val:-0x5; immval:0x40
+TEST_IMM_OP( andi, x29, x8, 0x40, -0x5, 0x40, x18, 56, x24)
+
+inst_15:
+// rs1==x12, rd==x23, imm_val == 256,
+// opcode: andi ; op1:x12; dest:x23; op1val:0x1; immval:0x100
+TEST_IMM_OP( andi, x23, x12, 0x0, 0x1, 0x100, x18, 60, x24)
+
+inst_16:
+// rs1==x15, rd==x6, imm_val == 512,
+// opcode: andi ; op1:x15; dest:x6; op1val:-0x55555555; immval:0x200
+TEST_IMM_OP( andi, x6, x15, 0x200, -0x55555555, 0x200, x18, 64, x24)
+
+inst_17:
+// rs1==x29, rd==x11, imm_val == 1024,
+// opcode: andi ; op1:x29; dest:x11; op1val:0x0; immval:0x400
+TEST_IMM_OP( andi, x11, x29, 0x0, 0x0, 0x400, x18, 68, x24)
+
+inst_18:
+// rs1==x20, rd==x1, imm_val == -2,
+// opcode: andi ; op1:x20; dest:x1; op1val:0x66666667; immval:-0x2
+TEST_IMM_OP( andi, x1, x20, 0x66666666, 0x66666667, -0x2, x18, 72, x24)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_19:
+// rs1==x31, rd==x5, imm_val == -3, rs1_val == -1048577
+// opcode: andi ; op1:x31; dest:x5; op1val:-0x100001; immval:-0x3
+TEST_IMM_OP( andi, x5, x31, 0xffeffffd, -0x100001, -0x3, x2, 0, x6)
+
+inst_20:
+// rs1==x3, rd==x20, imm_val == -5, rs1_val == 512
+// opcode: andi ; op1:x3; dest:x20; op1val:0x200; immval:-0x5
+TEST_IMM_OP( andi, x20, x3, 0x200, 0x200, -0x5, x2, 4, x6)
+
+inst_21:
+// rs1==x9, rd==x7, imm_val == -9, rs1_val == 16384
+// opcode: andi ; op1:x9; dest:x7; op1val:0x4000; immval:-0x9
+TEST_IMM_OP( andi, x7, x9, 0x4000, 0x4000, -0x9, x2, 8, x6)
+
+inst_22:
+// rs1==x13, rd==x16, imm_val == -17, rs1_val == 2097152
+// opcode: andi ; op1:x13; dest:x16; op1val:0x200000; immval:-0x11
+TEST_IMM_OP( andi, x16, x13, 0x200000, 0x200000, -0x11, x2, 12, x6)
+
+inst_23:
+// rs1==x18, rd==x24, imm_val == -33, rs1_val == -3
+// opcode: andi ; op1:x18; dest:x24; op1val:-0x3; immval:-0x21
+TEST_IMM_OP( andi, x24, x18, 0xffffffdd, -0x3, -0x21, x2, 16, x6)
+
+inst_24:
+// rs1==x26, rd==x4, imm_val == -65,
+// opcode: andi ; op1:x26; dest:x4; op1val:-0x6; immval:-0x41
+TEST_IMM_OP( andi, x4, x26, 0xffffffba, -0x6, -0x41, x2, 20, x6)
+
+inst_25:
+// rs1==x30, rd==x28, imm_val == -129, rs1_val == 64
+// opcode: andi ; op1:x30; dest:x28; op1val:0x40; immval:-0x81
+TEST_IMM_OP( andi, x28, x30, 0x40, 0x40, -0x81, x2, 24, x6)
+
+inst_26:
+// rs1==x19, rd==x0, imm_val == -257,
+// opcode: andi ; op1:x19; dest:x0; op1val:-0xb504; immval:-0x101
+TEST_IMM_OP( andi, x0, x19, 0, -0xb504, -0x101, x2, 28, x6)
+
+inst_27:
+// rs1==x21, rd==x18, imm_val == -513, rs1_val == -32769
+// opcode: andi ; op1:x21; dest:x18; op1val:-0x8001; immval:-0x201
+TEST_IMM_OP( andi, x18, x21, 0xffff7dff, -0x8001, -0x201, x2, 32, x6)
+
+inst_28:
+// rs1==x1, rd==x12, imm_val == -1025,
+// opcode: andi ; op1:x1; dest:x12; op1val:0x40; immval:-0x401
+TEST_IMM_OP( andi, x12, x1, 0x40, 0x40, -0x401, x2, 36, x6)
+
+inst_29:
+// rs1==x24, rd==x27, imm_val == 1365, rs1_val == -16385
+// opcode: andi ; op1:x24; dest:x27; op1val:-0x4001; immval:0x555
+TEST_IMM_OP( andi, x27, x24, 0x555, -0x4001, 0x555, x2, 40, x6)
+
+inst_30:
+// rs1==x11, rd==x31, imm_val == -1366, rs1_val == 1073741824
+// opcode: andi ; op1:x11; dest:x31; op1val:0x40000000; immval:-0x556
+TEST_IMM_OP( andi, x31, x11, 0x40000000, 0x40000000, -0x556, x2, 44, x6)
+
+inst_31:
+// rs1==x14, rd==x15, rs1_val == 2,
+// opcode: andi ; op1:x14; dest:x15; op1val:0x2; immval:0x8
+TEST_IMM_OP( andi, x15, x14, 0x0, 0x2, 0x8, x2, 48, x6)
+
+inst_32:
+// rs1_val == 4, rs1_val==4 and imm_val==1639
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x667, x2, 52, x6)
+
+inst_33:
+// rs1_val == 8,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x8; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x8, 0x334, x2, 56, x6)
+
+inst_34:
+// rs1_val == 16,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x10; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x10, 0x2e, x2, 60, x6)
+
+inst_35:
+// rs1_val == 32,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x20; immval:0x10
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x20, 0x10, x2, 64, x6)
+
+inst_36:
+// rs1_val == 1024,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x400; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x400, 0x400, -0x2c, x2, 68, x6)
+
+inst_37:
+// rs1_val == 2048,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x800; immval:-0x41
+TEST_IMM_OP( andi, x11, x10, 0x800, 0x800, -0x41, x2, 72, x6)
+
+inst_38:
+// rs1_val == 4096,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x1000; immval:0x40
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x1000, 0x40, x2, 76, x6)
+
+inst_39:
+// rs1_val == 8192,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2000; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x2000, 0x2000, -0x2d, x2, 80, x6)
+
+inst_40:
+// rs1_val == 32768,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x8000; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x8000, 0x8000, -0x556, x2, 84, x6)
+
+inst_41:
+// rs1_val == 65536,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x10000; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x10000, 0x333, x2, 88, x6)
+
+inst_42:
+// rs1_val == 131072,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x20000; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x20000, 0x332, x2, 92, x6)
+
+inst_43:
+// rs1_val == 262144,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x40000; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x40000, 0x556, x2, 96, x6)
+
+inst_44:
+// rs1_val == 524288,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x80000; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x80000, 0x4, x2, 100, x6)
+
+inst_45:
+// rs1_val == 1048576,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x100000; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x100000, 0x5, x2, 104, x6)
+
+inst_46:
+// rs1_val == 4194304,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x400000; immval:-0x1
+TEST_IMM_OP( andi, x11, x10, 0x400000, 0x400000, -0x1, x2, 108, x6)
+
+inst_47:
+// rs1_val == 8388608,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x800000; immval:-0x6
+TEST_IMM_OP( andi, x11, x10, 0x800000, 0x800000, -0x6, x2, 112, x6)
+
+inst_48:
+// rs1_val == 33554432,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2000000; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x2000000, 0x2000000, -0x2c, x2, 116, x6)
+
+inst_49:
+// rs1_val == 67108864,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4000000; immval:-0x81
+TEST_IMM_OP( andi, x11, x10, 0x4000000, 0x4000000, -0x81, x2, 120, x6)
+
+inst_50:
+// rs1_val == 134217728,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x8000000; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x8000000, 0x0, x2, 124, x6)
+
+inst_51:
+// rs1_val == 268435456,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x10000000; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x10000000, 0x0, x2, 128, x6)
+
+inst_52:
+// rs1_val == 536870912,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x20000000; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x20000000, 0x4, x2, 132, x6)
+
+inst_53:
+// rs1_val == -9,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x9; immval:-0x3
+TEST_IMM_OP( andi, x11, x10, 0xfffffff5, -0x9, -0x3, x2, 136, x6)
+
+inst_54:
+// rs1_val == -17,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x11; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x546, -0x11, 0x556, x2, 140, x6)
+
+inst_55:
+// rs1_val == -33,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x21; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, -0x21, 0x4, x2, 144, x6)
+
+inst_56:
+// rs1_val == -65,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x41; immval:0x9
+TEST_IMM_OP( andi, x11, x10, 0x9, -0x41, 0x9, x2, 148, x6)
+
+inst_57:
+// rs1_val == -129,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x81; immval:-0x3
+TEST_IMM_OP( andi, x11, x10, 0xffffff7d, -0x81, -0x3, x2, 152, x6)
+
+inst_58:
+// rs1_val == -257,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x101; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x234, -0x101, 0x334, x2, 156, x6)
+
+inst_59:
+// rs1_val == -513,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x201; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x201, 0x0, x2, 160, x6)
+
+inst_60:
+// rs1_val == -1025,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x401; immval:0x40
+TEST_IMM_OP( andi, x11, x10, 0x40, -0x401, 0x40, x2, 164, x6)
+
+inst_61:
+// rs1_val == -2049,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x801; immval:0x9
+TEST_IMM_OP( andi, x11, x10, 0x9, -0x801, 0x9, x2, 168, x6)
+
+inst_62:
+// rs1_val == -8193,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x2001; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x667, -0x2001, 0x667, x2, 172, x6)
+
+inst_63:
+// rs1_val == -65537,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x10001; immval:0x7ff
+TEST_IMM_OP( andi, x11, x10, 0x7ff, -0x10001, 0x7ff, x2, 176, x6)
+
+inst_64:
+// rs1_val == -262145,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x40001; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xfffbffd3, -0x40001, -0x2d, x2, 180, x6)
+
+inst_65:
+// rs1_val == -524289,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x80001; immval:0x200
+TEST_IMM_OP( andi, x11, x10, 0x200, -0x80001, 0x200, x2, 184, x6)
+
+inst_66:
+// rs1_val == -2097153,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x200001; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xffdfffd4, -0x200001, -0x2c, x2, 188, x6)
+
+inst_67:
+// rs1_val == -4194305,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x400001; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, -0x400001, 0x5, x2, 192, x6)
+
+inst_68:
+// rs1_val == -8388609,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x800001; immval:0x7
+TEST_IMM_OP( andi, x11, x10, 0x7, -0x800001, 0x7, x2, 196, x6)
+
+inst_69:
+// rs1_val == -16777217,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x1000001; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x6, -0x1000001, 0x6, x2, 200, x6)
+
+inst_70:
+// rs1_val == -67108865,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x4000001; immval:0x8
+TEST_IMM_OP( andi, x11, x10, 0x8, -0x4000001, 0x8, x2, 204, x6)
+
+inst_71:
+// rs1_val == -134217729,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x8000001; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x2e, -0x8000001, 0x2e, x2, 208, x6)
+
+inst_72:
+// rs1_val == -268435457,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x10000001; immval:0x1
+TEST_IMM_OP( andi, x11, x10, 0x1, -0x10000001, 0x1, x2, 212, x6)
+
+inst_73:
+// rs1_val == -536870913,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x20000001; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xdfffffd4, -0x20000001, -0x2c, x2, 216, x6)
+
+inst_74:
+// rs1_val == -1073741825,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x40000001; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x556, -0x40000001, 0x556, x2, 220, x6)
+
+inst_75:
+// rs1_val == 1431655765,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x5
+TEST_IMM_OP( andi, x11, x10, 0x55555551, 0x55555555, -0x5, x2, 224, x6)
+
+inst_76:
+// rs1_val == -1431655766,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x80
+TEST_IMM_OP( andi, x11, x10, 0x80, -0x55555556, 0x80, x2, 228, x6)
+
+inst_77:
+// rs1_val==3 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x3, 0x3, x2, 232, x6)
+
+inst_78:
+// rs1_val==3 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x3, 0x555, x2, 236, x6)
+
+inst_79:
+// rs1_val==3 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, -0x556, x2, 240, x6)
+
+inst_80:
+// rs1_val==3 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x3, 0x5, x2, 244, x6)
+
+inst_81:
+// rs1_val==3 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x3, 0x333, x2, 248, x6)
+
+inst_82:
+// rs1_val==3 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, 0x666, x2, 252, x6)
+
+inst_83:
+// rs1_val==3 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x3, -0x2d, x2, 256, x6)
+
+inst_84:
+// rs1_val==3 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x3, 0x2d, x2, 260, x6)
+
+inst_85:
+// rs1_val==3 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, 0x2, x2, 264, x6)
+
+inst_86:
+// rs1_val==3 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3, 0x554, x2, 268, x6)
+
+inst_87:
+// rs1_val==3 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3, 0x0, x2, 272, x6)
+
+inst_88:
+// rs1_val==3 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3, 0x4, x2, 276, x6)
+
+inst_89:
+// rs1_val==3 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, 0x332, x2, 280, x6)
+
+inst_90:
+// rs1_val==3 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x3, 0x665, x2, 284, x6)
+
+inst_91:
+// rs1_val==3 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3, 0x2c, x2, 288, x6)
+
+inst_92:
+// rs1_val==3 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, 0x556, x2, 292, x6)
+
+inst_93:
+// rs1_val==3 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x3, -0x555, x2, 296, x6)
+
+inst_94:
+// rs1_val==3 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, 0x6, x2, 300, x6)
+
+inst_95:
+// rs1_val==3 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3, 0x334, x2, 304, x6)
+
+inst_96:
+// rs1_val==3 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x3, 0x667, x2, 308, x6)
+
+inst_97:
+// rs1_val==3 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3, -0x2c, x2, 312, x6)
+
+inst_98:
+// rs1_val==3 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, 0x2e, x2, 316, x6)
+
+inst_99:
+// rs1_val==1431655765 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x55555555, 0x3, x2, 320, x6)
+
+inst_100:
+// rs1_val==1431655765 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x555, 0x55555555, 0x555, x2, 324, x6)
+
+inst_101:
+// rs1_val==1431655765 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x55555000, 0x55555555, -0x556, x2, 328, x6)
+
+inst_102:
+// rs1_val==1431655765 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x55555555, 0x5, x2, 332, x6)
+
+inst_103:
+// rs1_val==1431655765 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x111, 0x55555555, 0x333, x2, 336, x6)
+
+inst_104:
+// rs1_val==1431655765 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x55555555, 0x666, x2, 340, x6)
+
+inst_105:
+// rs1_val==1431655765 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x55555551, 0x55555555, -0x2d, x2, 344, x6)
+
+inst_106:
+// rs1_val==1431655765 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x55555555, 0x2d, x2, 348, x6)
+
+inst_107:
+// rs1_val==1431655765 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x55555555, 0x2, x2, 352, x6)
+
+inst_108:
+// rs1_val==1431655765 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x55555555, 0x554, x2, 356, x6)
+
+inst_109:
+// rs1_val==1431655765 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x55555555, 0x0, x2, 360, x6)
+
+inst_110:
+// rs1_val==1431655765 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555555, 0x4, x2, 364, x6)
+
+inst_111:
+// rs1_val==1431655765 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x110, 0x55555555, 0x332, x2, 368, x6)
+
+inst_112:
+// rs1_val==1431655765 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x445, 0x55555555, 0x665, x2, 372, x6)
+
+inst_113:
+// rs1_val==1431655765 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555555, 0x2c, x2, 376, x6)
+
+inst_114:
+// rs1_val==1431655765 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x55555555, 0x556, x2, 380, x6)
+
+inst_115:
+// rs1_val==1431655765 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x55555001, 0x55555555, -0x555, x2, 384, x6)
+
+inst_116:
+// rs1_val==1431655765 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555555, 0x6, x2, 388, x6)
+
+inst_117:
+// rs1_val==1431655765 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x114, 0x55555555, 0x334, x2, 392, x6)
+
+inst_118:
+// rs1_val==1431655765 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x445, 0x55555555, 0x667, x2, 396, x6)
+
+inst_119:
+// rs1_val==1431655765 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x55555554, 0x55555555, -0x2c, x2, 400, x6)
+
+inst_120:
+// rs1_val==1431655765 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555555, 0x2e, x2, 404, x6)
+
+inst_121:
+// rs1_val==-1431655766 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x55555556, 0x3, x2, 408, x6)
+
+inst_122:
+// rs1_val==-1431655766 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x55555556, 0x555, x2, 412, x6)
+
+inst_123:
+// rs1_val==-1431655766 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaaaa, -0x55555556, -0x556, x2, 416, x6)
+
+inst_124:
+// rs1_val==-1431655766 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x55555556, 0x5, x2, 420, x6)
+
+inst_125:
+// rs1_val==-1431655766 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x222, -0x55555556, 0x333, x2, 424, x6)
+
+inst_126:
+// rs1_val==-1431655766 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x222, -0x55555556, 0x666, x2, 428, x6)
+
+inst_127:
+// rs1_val==-1431655766 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaa82, -0x55555556, -0x2d, x2, 432, x6)
+
+inst_128:
+// rs1_val==-1431655766 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x28, -0x55555556, 0x2d, x2, 436, x6)
+
+inst_129:
+// rs1_val==-1431655766 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x55555556, 0x2, x2, 440, x6)
+
+inst_130:
+// rs1_val==-1431655766 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x55555556, 0x554, x2, 444, x6)
+
+inst_131:
+// rs1_val==-1431655766 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x55555556, 0x0, x2, 448, x6)
+
+inst_132:
+// rs1_val==-1431655766 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x55555556, 0x4, x2, 452, x6)
+
+inst_133:
+// rs1_val==-1431655766 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x222, -0x55555556, 0x332, x2, 456, x6)
+
+inst_134:
+// rs1_val==-1431655766 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x220, -0x55555556, 0x665, x2, 460, x6)
+
+inst_135:
+// rs1_val==-1431655766 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x28, -0x55555556, 0x2c, x2, 464, x6)
+
+inst_136:
+// rs1_val==-1431655766 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x55555556, 0x556, x2, 468, x6)
+
+inst_137:
+// rs1_val==-1431655766 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaaaa, -0x55555556, -0x555, x2, 472, x6)
+
+inst_138:
+// rs1_val==-1431655766 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x55555556, 0x6, x2, 476, x6)
+
+inst_139:
+// rs1_val==-1431655766 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x220, -0x55555556, 0x334, x2, 480, x6)
+
+inst_140:
+// rs1_val==-1431655766 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x222, -0x55555556, 0x667, x2, 484, x6)
+
+inst_141:
+// rs1_val==-1431655766 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaa80, -0x55555556, -0x2c, x2, 488, x6)
+
+inst_142:
+// rs1_val==-1431655766 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x2a, -0x55555556, 0x2e, x2, 492, x6)
+
+inst_143:
+// rs1_val==5 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x5, 0x3, x2, 496, x6)
+
+inst_144:
+// rs1_val==5 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x5, 0x555, x2, 500, x6)
+
+inst_145:
+// rs1_val==5 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5, -0x556, x2, 504, x6)
+
+inst_146:
+// rs1_val==5 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x5, 0x5, x2, 508, x6)
+
+inst_147:
+// rs1_val==5 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x5, 0x333, x2, 512, x6)
+
+inst_148:
+// rs1_val==5 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x666, x2, 516, x6)
+
+inst_149:
+// rs1_val==5 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x5, -0x2d, x2, 520, x6)
+
+inst_150:
+// rs1_val==5 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x5, 0x2d, x2, 524, x6)
+
+inst_151:
+// rs1_val==5 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5, 0x2, x2, 528, x6)
+
+inst_152:
+// rs1_val==5 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x554, x2, 532, x6)
+
+inst_153:
+// rs1_val==5 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5, 0x0, x2, 536, x6)
+
+inst_154:
+// rs1_val==5 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x4, x2, 540, x6)
+
+inst_155:
+// rs1_val==5 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5, 0x332, x2, 544, x6)
+
+inst_156:
+// rs1_val==5 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x5, 0x665, x2, 548, x6)
+
+inst_157:
+// rs1_val==5 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x2c, x2, 552, x6)
+
+inst_158:
+// rs1_val==5 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x556, x2, 556, x6)
+
+inst_159:
+// rs1_val==5 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x5, -0x555, x2, 560, x6)
+
+inst_160:
+// rs1_val==5 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x6, x2, 564, x6)
+
+inst_161:
+// rs1_val==5 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x334, x2, 568, x6)
+
+inst_162:
+// rs1_val==5 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x5, 0x667, x2, 572, x6)
+
+inst_163:
+// rs1_val==5 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, -0x2c, x2, 576, x6)
+
+inst_164:
+// rs1_val==5 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x2e, x2, 580, x6)
+
+inst_165:
+// rs1_val==858993459 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x33333333, 0x3, x2, 584, x6)
+
+inst_166:
+// rs1_val==858993459 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x111, 0x33333333, 0x555, x2, 588, x6)
+
+inst_167:
+// rs1_val==858993459 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x33333222, 0x33333333, -0x556, x2, 592, x6)
+
+inst_168:
+// rs1_val==858993459 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x33333333, 0x5, x2, 596, x6)
+
+inst_169:
+// rs1_val==858993459 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x333, 0x33333333, 0x333, x2, 600, x6)
+
+inst_170:
+// rs1_val==858993459 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x222, 0x33333333, 0x666, x2, 604, x6)
+
+inst_171:
+// rs1_val==858993459 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x33333313, 0x33333333, -0x2d, x2, 608, x6)
+
+inst_172:
+// rs1_val==858993459 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x21, 0x33333333, 0x2d, x2, 612, x6)
+
+inst_173:
+// rs1_val==858993459 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x33333333, 0x2, x2, 616, x6)
+
+inst_174:
+// rs1_val==858993459 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x110, 0x33333333, 0x554, x2, 620, x6)
+
+inst_175:
+// rs1_val==858993459 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x33333333, 0x0, x2, 624, x6)
+
+inst_176:
+// rs1_val==858993459 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x33333333, 0x4, x2, 628, x6)
+
+inst_177:
+// rs1_val==858993459 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x332, 0x33333333, 0x332, x2, 632, x6)
+
+inst_178:
+// rs1_val==858993459 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x221, 0x33333333, 0x665, x2, 636, x6)
+
+inst_179:
+// rs1_val==858993459 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x20, 0x33333333, 0x2c, x2, 640, x6)
+
+inst_180:
+// rs1_val==858993459 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x112, 0x33333333, 0x556, x2, 644, x6)
+
+inst_181:
+// rs1_val==858993459 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x33333223, 0x33333333, -0x555, x2, 648, x6)
+
+inst_182:
+// rs1_val==858993459 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x33333333, 0x6, x2, 652, x6)
+
+inst_183:
+// rs1_val==858993459 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x330, 0x33333333, 0x334, x2, 656, x6)
+
+inst_184:
+// rs1_val==858993459 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x223, 0x33333333, 0x667, x2, 660, x6)
+
+inst_185:
+// rs1_val==858993459 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x33333310, 0x33333333, -0x2c, x2, 664, x6)
+
+inst_186:
+// rs1_val==858993459 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x22, 0x33333333, 0x2e, x2, 668, x6)
+
+inst_187:
+// rs1_val==1717986918 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x66666666, 0x3, x2, 672, x6)
+
+inst_188:
+// rs1_val==1717986918 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x66666666, 0x555, x2, 676, x6)
+
+inst_189:
+// rs1_val==1717986918 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x66666222, 0x66666666, -0x556, x2, 680, x6)
+
+inst_190:
+// rs1_val==1717986918 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x66666666, 0x5, x2, 684, x6)
+
+inst_191:
+// rs1_val==1717986918 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x222, 0x66666666, 0x333, x2, 688, x6)
+
+inst_192:
+// rs1_val==1717986918 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x666, 0x66666666, 0x666, x2, 692, x6)
+
+inst_193:
+// rs1_val==1717986918 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x66666642, 0x66666666, -0x2d, x2, 696, x6)
+
+inst_194:
+// rs1_val==1717986918 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x66666666, 0x2d, x2, 700, x6)
+
+inst_195:
+// rs1_val==1717986918 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x66666666, 0x2, x2, 704, x6)
+
+inst_196:
+// rs1_val==1717986918 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x66666666, 0x554, x2, 708, x6)
+
+inst_197:
+// rs1_val==1717986918 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x66666666, 0x0, x2, 712, x6)
+
+inst_198:
+// rs1_val==1717986918 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x66666666, 0x4, x2, 716, x6)
+
+inst_199:
+// rs1_val==1717986918 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x222, 0x66666666, 0x332, x2, 720, x6)
+
+inst_200:
+// rs1_val==1717986918 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x664, 0x66666666, 0x665, x2, 724, x6)
+
+inst_201:
+// rs1_val==1717986918 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x66666666, 0x2c, x2, 728, x6)
+
+inst_202:
+// rs1_val==1717986918 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x446, 0x66666666, 0x556, x2, 732, x6)
+
+inst_203:
+// rs1_val==1717986918 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x66666222, 0x66666666, -0x555, x2, 736, x6)
+
+inst_204:
+// rs1_val==1717986918 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x66666666, 0x6, x2, 740, x6)
+
+inst_205:
+// rs1_val==1717986918 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x224, 0x66666666, 0x334, x2, 744, x6)
+
+inst_206:
+// rs1_val==1717986918 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x666, 0x66666666, 0x667, x2, 748, x6)
+
+inst_207:
+// rs1_val==1717986918 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x66666644, 0x66666666, -0x2c, x2, 752, x6)
+
+inst_208:
+// rs1_val==1717986918 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x26, 0x66666666, 0x2e, x2, 756, x6)
+
+inst_209:
+// rs1_val==-46340 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x0, -0xb504, 0x3, x2, 760, x6)
+
+inst_210:
+// rs1_val==-46340 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x54, -0xb504, 0x555, x2, 764, x6)
+
+inst_211:
+// rs1_val==-46340 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xffff4aa8, -0xb504, -0x556, x2, 768, x6)
+
+inst_212:
+// rs1_val==-46340 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, -0xb504, 0x5, x2, 772, x6)
+
+inst_213:
+// rs1_val==-46340 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x230, -0xb504, 0x333, x2, 776, x6)
+
+inst_214:
+// rs1_val==-46340 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x264, -0xb504, 0x666, x2, 780, x6)
+
+inst_215:
+// rs1_val==-46340 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xffff4ad0, -0xb504, -0x2d, x2, 784, x6)
+
+inst_216:
+// rs1_val==-46340 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x2c, -0xb504, 0x2d, x2, 788, x6)
+
+inst_217:
+// rs1_val==-46340 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, -0xb504, 0x2, x2, 792, x6)
+
+inst_218:
+// rs1_val==-46340 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x54, -0xb504, 0x554, x2, 796, x6)
+
+inst_219:
+// rs1_val==-46340 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0xb504, 0x0, x2, 800, x6)
+
+inst_220:
+// rs1_val==-46340 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, -0xb504, 0x4, x2, 804, x6)
+
+inst_221:
+// rs1_val==-46340 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x230, -0xb504, 0x332, x2, 808, x6)
+
+inst_222:
+// rs1_val==-46340 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x264, -0xb504, 0x665, x2, 812, x6)
+
+inst_223:
+// rs1_val==-46340 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x2c, -0xb504, 0x2c, x2, 816, x6)
+
+inst_224:
+// rs1_val==-46340 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x54, -0xb504, 0x556, x2, 820, x6)
+
+inst_225:
+// rs1_val==-46340 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xffff4aa8, -0xb504, -0x555, x2, 824, x6)
+
+inst_226:
+// rs1_val==-46340 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, -0xb504, 0x6, x2, 828, x6)
+
+inst_227:
+// rs1_val==-46340 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x234, -0xb504, 0x334, x2, 832, x6)
+
+inst_228:
+// rs1_val==-46340 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x264, -0xb504, 0x667, x2, 836, x6)
+
+inst_229:
+// rs1_val==-46340 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xffff4ad4, -0xb504, -0x2c, x2, 840, x6)
+
+inst_230:
+// rs1_val==-46340 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x2c, -0xb504, 0x2e, x2, 844, x6)
+
+inst_231:
+// rs1_val==46340 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb504, 0x3, x2, 848, x6)
+
+inst_232:
+// rs1_val==46340 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x504, 0xb504, 0x555, x2, 852, x6)
+
+inst_233:
+// rs1_val==46340 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xb000, 0xb504, -0x556, x2, 856, x6)
+
+inst_234:
+// rs1_val==46340 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0xb504, 0x5, x2, 860, x6)
+
+inst_235:
+// rs1_val==46340 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x100, 0xb504, 0x333, x2, 864, x6)
+
+inst_236:
+// rs1_val==46340 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x404, 0xb504, 0x666, x2, 868, x6)
+
+inst_237:
+// rs1_val==46340 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xb500, 0xb504, -0x2d, x2, 872, x6)
+
+inst_238:
+// rs1_val==46340 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x4, 0xb504, 0x2d, x2, 876, x6)
+
+inst_239:
+// rs1_val==46340 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb504, 0x2, x2, 880, x6)
+
+inst_240:
+// rs1_val==46340 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x504, 0xb504, 0x554, x2, 884, x6)
+
+inst_241:
+// rs1_val==46340 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb504, 0x0, x2, 888, x6)
+
+inst_242:
+// rs1_val==46340 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0xb504, 0x4, x2, 892, x6)
+
+inst_243:
+// rs1_val==46340 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x100, 0xb504, 0x332, x2, 896, x6)
+
+inst_244:
+// rs1_val==46340 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x404, 0xb504, 0x665, x2, 900, x6)
+
+inst_245:
+// rs1_val==46340 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0xb504, 0x2c, x2, 904, x6)
+
+inst_246:
+// rs1_val==46340 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x504, 0xb504, 0x556, x2, 908, x6)
+
+inst_247:
+// rs1_val==46340 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xb000, 0xb504, -0x555, x2, 912, x6)
+
+inst_248:
+// rs1_val==46340 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0xb504, 0x6, x2, 916, x6)
+
+inst_249:
+// rs1_val==46340 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x104, 0xb504, 0x334, x2, 920, x6)
+
+inst_250:
+// rs1_val==46340 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x404, 0xb504, 0x667, x2, 924, x6)
+
+inst_251:
+// rs1_val==46340 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xb504, 0xb504, -0x2c, x2, 928, x6)
+
+inst_252:
+// rs1_val==46340 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x4, 0xb504, 0x2e, x2, 932, x6)
+
+inst_253:
+// rs1_val==2 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x3, x2, 936, x6)
+
+inst_254:
+// rs1_val==2 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x555, x2, 940, x6)
+
+inst_255:
+// rs1_val==2 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, -0x556, x2, 944, x6)
+
+inst_256:
+// rs1_val==2 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x5, x2, 948, x6)
+
+inst_257:
+// rs1_val==2 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x333, x2, 952, x6)
+
+inst_258:
+// rs1_val==2 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x666, x2, 956, x6)
+
+inst_259:
+// rs1_val==2 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, -0x2d, x2, 960, x6)
+
+inst_260:
+// rs1_val==2 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x2d, x2, 964, x6)
+
+inst_261:
+// rs1_val==2 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x2, x2, 968, x6)
+
+inst_262:
+// rs1_val==2 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x554, x2, 972, x6)
+
+inst_263:
+// rs1_val==2 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x0, x2, 976, x6)
+
+inst_264:
+// rs1_val==2 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x4, x2, 980, x6)
+
+inst_265:
+// rs1_val==2 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x332, x2, 984, x6)
+
+inst_266:
+// rs1_val==2 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x665, x2, 988, x6)
+
+inst_267:
+// rs1_val==2 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x2c, x2, 992, x6)
+
+inst_268:
+// rs1_val==2 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x556, x2, 996, x6)
+
+inst_269:
+// rs1_val==2 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, -0x555, x2, 1000, x6)
+
+inst_270:
+// rs1_val==2 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x6, x2, 1004, x6)
+
+inst_271:
+// rs1_val==2 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x334, x2, 1008, x6)
+
+inst_272:
+// rs1_val==2 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x667, x2, 1012, x6)
+
+inst_273:
+// rs1_val==2 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, -0x2c, x2, 1016, x6)
+
+inst_274:
+// rs1_val==2 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x2e, x2, 1020, x6)
+
+inst_275:
+// rs1_val==1431655764 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x55555554, 0x3, x2, 1024, x6)
+
+inst_276:
+// rs1_val==1431655764 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x55555554, 0x555, x2, 1028, x6)
+
+inst_277:
+// rs1_val==1431655764 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x55555000, 0x55555554, -0x556, x2, 1032, x6)
+
+inst_278:
+// rs1_val==1431655764 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555554, 0x5, x2, 1036, x6)
+
+inst_279:
+// rs1_val==1431655764 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x110, 0x55555554, 0x333, x2, 1040, x6)
+
+inst_280:
+// rs1_val==1431655764 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x55555554, 0x666, x2, 1044, x6)
+
+inst_281:
+// rs1_val==1431655764 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x55555550, 0x55555554, -0x2d, x2, 1048, x6)
+
+inst_282:
+// rs1_val==1431655764 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555554, 0x2d, x2, 1052, x6)
+
+inst_283:
+// rs1_val==1431655764 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x55555554, 0x2, x2, 1056, x6)
+
+inst_284:
+// rs1_val==1431655764 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x55555554, 0x554, x2, 1060, x6)
+
+inst_285:
+// rs1_val==1431655764 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x55555554, 0x0, x2, 1064, x6)
+
+inst_286:
+// rs1_val==1431655764 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555554, 0x4, x2, 1068, x6)
+
+inst_287:
+// rs1_val==1431655764 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x110, 0x55555554, 0x332, x2, 1072, x6)
+
+inst_288:
+// rs1_val==1431655764 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x55555554, 0x665, x2, 1076, x6)
+
+inst_289:
+// rs1_val==1431655764 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555554, 0x2c, x2, 1080, x6)
+
+inst_290:
+// rs1_val==1431655764 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x55555554, 0x556, x2, 1084, x6)
+
+inst_291:
+// rs1_val==1431655764 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x55555000, 0x55555554, -0x555, x2, 1088, x6)
+
+inst_292:
+// rs1_val==1431655764 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555554, 0x6, x2, 1092, x6)
+
+inst_293:
+// rs1_val==1431655764 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x114, 0x55555554, 0x334, x2, 1096, x6)
+
+inst_294:
+// rs1_val==1431655764 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x55555554, 0x667, x2, 1100, x6)
+
+inst_295:
+// rs1_val==1431655764 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x55555554, 0x55555554, -0x2c, x2, 1104, x6)
+
+inst_296:
+// rs1_val==1431655764 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555554, 0x2e, x2, 1108, x6)
+
+inst_297:
+// rs1_val==0 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x3, x2, 1112, x6)
+
+inst_298:
+// rs1_val==0 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x555, x2, 1116, x6)
+
+inst_299:
+// rs1_val==0 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, -0x556, x2, 1120, x6)
+
+inst_300:
+// rs1_val==0 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x5, x2, 1124, x6)
+
+inst_301:
+// rs1_val==0 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x333, x2, 1128, x6)
+
+inst_302:
+// rs1_val==0 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x666, x2, 1132, x6)
+
+inst_303:
+// rs1_val==0 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, -0x2d, x2, 1136, x6)
+
+inst_304:
+// rs1_val==0 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x2d, x2, 1140, x6)
+
+inst_305:
+// rs1_val==858993460 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x330, 0x33333334, 0x332, x2, 1144, x6)
+
+inst_306:
+// rs1_val==858993460 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x224, 0x33333334, 0x665, x2, 1148, x6)
+
+inst_307:
+// rs1_val==858993460 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x33333334, 0x2c, x2, 1152, x6)
+
+inst_308:
+// rs1_val==858993460 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x114, 0x33333334, 0x556, x2, 1156, x6)
+
+inst_309:
+// rs1_val==858993460 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x33333220, 0x33333334, -0x555, x2, 1160, x6)
+
+inst_310:
+// rs1_val==858993460 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x33333334, 0x6, x2, 1164, x6)
+
+inst_311:
+// rs1_val==858993460 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x334, 0x33333334, 0x334, x2, 1168, x6)
+
+inst_312:
+// rs1_val==858993460 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x224, 0x33333334, 0x667, x2, 1172, x6)
+
+inst_313:
+// rs1_val==858993460 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x33333314, 0x33333334, -0x2c, x2, 1176, x6)
+
+inst_314:
+// rs1_val==858993460 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x33333334, 0x2e, x2, 1180, x6)
+
+inst_315:
+// rs1_val==1717986919 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x66666667, 0x3, x2, 1184, x6)
+
+inst_316:
+// rs1_val==1717986919 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x445, 0x66666667, 0x555, x2, 1188, x6)
+
+inst_317:
+// rs1_val==1717986919 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x66666222, 0x66666667, -0x556, x2, 1192, x6)
+
+inst_318:
+// rs1_val==1717986919 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x66666667, 0x5, x2, 1196, x6)
+
+inst_319:
+// rs1_val==1717986919 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x223, 0x66666667, 0x333, x2, 1200, x6)
+
+inst_320:
+// rs1_val==1717986919 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x666, 0x66666667, 0x666, x2, 1204, x6)
+
+inst_321:
+// rs1_val==1717986919 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x66666643, 0x66666667, -0x2d, x2, 1208, x6)
+
+inst_322:
+// rs1_val==1717986919 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x25, 0x66666667, 0x2d, x2, 1212, x6)
+
+inst_323:
+// rs1_val==1717986919 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x66666667, 0x2, x2, 1216, x6)
+
+inst_324:
+// rs1_val==1717986919 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x66666667, 0x554, x2, 1220, x6)
+
+inst_325:
+// rs1_val==1717986919 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x66666667, 0x0, x2, 1224, x6)
+
+inst_326:
+// rs1_val==1717986919 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x66666667, 0x4, x2, 1228, x6)
+
+inst_327:
+// rs1_val==1717986919 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x222, 0x66666667, 0x332, x2, 1232, x6)
+
+inst_328:
+// rs1_val==1717986919 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x665, 0x66666667, 0x665, x2, 1236, x6)
+
+inst_329:
+// rs1_val==1717986919 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x66666667, 0x2c, x2, 1240, x6)
+
+inst_330:
+// rs1_val==1717986919 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x446, 0x66666667, 0x556, x2, 1244, x6)
+
+inst_331:
+// rs1_val==1717986919 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x66666223, 0x66666667, -0x555, x2, 1248, x6)
+
+inst_332:
+// rs1_val==1717986919 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x66666667, 0x6, x2, 1252, x6)
+
+inst_333:
+// rs1_val==1717986919 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x224, 0x66666667, 0x334, x2, 1256, x6)
+
+inst_334:
+// rs1_val==1717986919 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x667, 0x66666667, 0x667, x2, 1260, x6)
+
+inst_335:
+// rs1_val==1717986919 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x66666644, 0x66666667, -0x2c, x2, 1264, x6)
+
+inst_336:
+// rs1_val==1717986919 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x26, 0x66666667, 0x2e, x2, 1268, x6)
+
+inst_337:
+// rs1_val==-46339 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x1, -0xb503, 0x3, x2, 1272, x6)
+
+inst_338:
+// rs1_val==-46339 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x55, -0xb503, 0x555, x2, 1276, x6)
+
+inst_339:
+// rs1_val==-46339 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xffff4aa8, -0xb503, -0x556, x2, 1280, x6)
+
+inst_340:
+// rs1_val==-46339 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, -0xb503, 0x5, x2, 1284, x6)
+
+inst_341:
+// rs1_val==-46339 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x231, -0xb503, 0x333, x2, 1288, x6)
+
+inst_342:
+// rs1_val==-46339 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x264, -0xb503, 0x666, x2, 1292, x6)
+
+inst_343:
+// rs1_val==-46339 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xffff4ad1, -0xb503, -0x2d, x2, 1296, x6)
+
+inst_344:
+// rs1_val==-46339 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x2d, -0xb503, 0x2d, x2, 1300, x6)
+
+inst_345:
+// rs1_val==-46339 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, -0xb503, 0x2, x2, 1304, x6)
+
+inst_346:
+// rs1_val==-46339 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x54, -0xb503, 0x554, x2, 1308, x6)
+
+inst_347:
+// rs1_val==-46339 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0xb503, 0x0, x2, 1312, x6)
+
+inst_348:
+// rs1_val==-46339 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, -0xb503, 0x4, x2, 1316, x6)
+
+inst_349:
+// rs1_val==-46339 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x230, -0xb503, 0x332, x2, 1320, x6)
+
+inst_350:
+// rs1_val==-46339 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x265, -0xb503, 0x665, x2, 1324, x6)
+
+inst_351:
+// rs1_val==-46339 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x2c, -0xb503, 0x2c, x2, 1328, x6)
+
+inst_352:
+// rs1_val==-46339 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x54, -0xb503, 0x556, x2, 1332, x6)
+
+inst_353:
+// rs1_val==-46339 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xffff4aa9, -0xb503, -0x555, x2, 1336, x6)
+
+inst_354:
+// rs1_val==-46339 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, -0xb503, 0x6, x2, 1340, x6)
+
+inst_355:
+// rs1_val==-46339 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x234, -0xb503, 0x334, x2, 1344, x6)
+
+inst_356:
+// rs1_val==-46339 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x265, -0xb503, 0x667, x2, 1348, x6)
+
+inst_357:
+// rs1_val==-46339 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xffff4ad4, -0xb503, -0x2c, x2, 1352, x6)
+
+inst_358:
+// rs1_val==-46339 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x2c, -0xb503, 0x2e, x2, 1356, x6)
+
+inst_359:
+// rs1_val==46341 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x1, 0xb505, 0x3, x2, 1360, x6)
+
+inst_360:
+// rs1_val==46341 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x505, 0xb505, 0x555, x2, 1364, x6)
+
+inst_361:
+// rs1_val==46341 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xb000, 0xb505, -0x556, x2, 1368, x6)
+
+inst_362:
+// rs1_val==46341 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, 0xb505, 0x5, x2, 1372, x6)
+
+inst_363:
+// rs1_val==46341 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x101, 0xb505, 0x333, x2, 1376, x6)
+
+inst_364:
+// rs1_val==46341 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x404, 0xb505, 0x666, x2, 1380, x6)
+
+inst_365:
+// rs1_val==46341 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xb501, 0xb505, -0x2d, x2, 1384, x6)
+
+inst_366:
+// rs1_val==46341 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x5, 0xb505, 0x2d, x2, 1388, x6)
+
+inst_367:
+// rs1_val==46341 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb505, 0x2, x2, 1392, x6)
+
+inst_368:
+// rs1_val==46341 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x504, 0xb505, 0x554, x2, 1396, x6)
+
+inst_369:
+// rs1_val==46341 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb505, 0x0, x2, 1400, x6)
+
+inst_370:
+// rs1_val==46341 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0xb505, 0x4, x2, 1404, x6)
+
+inst_371:
+// rs1_val==46341 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x100, 0xb505, 0x332, x2, 1408, x6)
+
+inst_372:
+// rs1_val==46341 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x405, 0xb505, 0x665, x2, 1412, x6)
+
+inst_373:
+// rs1_val==46341 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0xb505, 0x2c, x2, 1416, x6)
+
+inst_374:
+// rs1_val==46341 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x504, 0xb505, 0x556, x2, 1420, x6)
+
+inst_375:
+// rs1_val==46341 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xb001, 0xb505, -0x555, x2, 1424, x6)
+
+inst_376:
+// rs1_val==46341 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0xb505, 0x6, x2, 1428, x6)
+
+inst_377:
+// rs1_val==46341 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x104, 0xb505, 0x334, x2, 1432, x6)
+
+inst_378:
+// rs1_val==46341 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x405, 0xb505, 0x667, x2, 1436, x6)
+
+inst_379:
+// rs1_val==46341 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xb504, 0xb505, -0x2c, x2, 1440, x6)
+
+inst_380:
+// rs1_val==46341 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb505; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x4, 0xb505, 0x2e, x2, 1444, x6)
+
+inst_381:
+// rs1_val==0 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x2, x2, 1448, x6)
+
+inst_382:
+// rs1_val==0 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x554, x2, 1452, x6)
+
+inst_383:
+// rs1_val==0 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x0, x2, 1456, x6)
+
+inst_384:
+// rs1_val==0 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x4, x2, 1460, x6)
+
+inst_385:
+// rs1_val==0 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x332, x2, 1464, x6)
+
+inst_386:
+// rs1_val==0 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x665, x2, 1468, x6)
+
+inst_387:
+// rs1_val==0 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x2c, x2, 1472, x6)
+
+inst_388:
+// rs1_val==0 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x556, x2, 1476, x6)
+
+inst_389:
+// rs1_val==0 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, -0x555, x2, 1480, x6)
+
+inst_390:
+// rs1_val==0 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x6, x2, 1484, x6)
+
+inst_391:
+// rs1_val==0 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x334, x2, 1488, x6)
+
+inst_392:
+// rs1_val==0 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x667, x2, 1492, x6)
+
+inst_393:
+// rs1_val==0 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, -0x2c, x2, 1496, x6)
+
+inst_394:
+// rs1_val==0 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x2e, x2, 1500, x6)
+
+inst_395:
+// rs1_val==4 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, 0x3, x2, 1504, x6)
+
+inst_396:
+// rs1_val==4 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x555, x2, 1508, x6)
+
+inst_397:
+// rs1_val==4 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, -0x556, x2, 1512, x6)
+
+inst_398:
+// rs1_val==4 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x5, x2, 1516, x6)
+
+inst_399:
+// rs1_val==4 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, 0x333, x2, 1520, x6)
+
+inst_400:
+// rs1_val==4 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x666, x2, 1524, x6)
+
+inst_401:
+// rs1_val==4 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, -0x2d, x2, 1528, x6)
+
+inst_402:
+// rs1_val==4 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x2d, x2, 1532, x6)
+
+inst_403:
+// rs1_val==4 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, 0x2, x2, 1536, x6)
+
+inst_404:
+// rs1_val==4 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x554, x2, 1540, x6)
+
+inst_405:
+// rs1_val==4 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, 0x0, x2, 1544, x6)
+
+inst_406:
+// rs1_val==4 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x4, x2, 1548, x6)
+
+inst_407:
+// rs1_val==4 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, 0x332, x2, 1552, x6)
+
+inst_408:
+// rs1_val==4 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x665, x2, 1556, x6)
+
+inst_409:
+// rs1_val==4 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x2c, x2, 1560, x6)
+
+inst_410:
+// rs1_val==4 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x556, x2, 1564, x6)
+
+inst_411:
+// rs1_val==4 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, -0x555, x2, 1568, x6)
+
+inst_412:
+// rs1_val==4 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x6, x2, 1572, x6)
+
+inst_413:
+// rs1_val==4 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x334, x2, 1576, x6)
+
+inst_414:
+// rs1_val==4 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, -0x2c, x2, 1580, x6)
+
+inst_415:
+// rs1_val==4 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x2e, x2, 1584, x6)
+
+inst_416:
+// rs1_val==858993458 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x33333332, 0x3, x2, 1588, x6)
+
+inst_417:
+// rs1_val==858993458 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x110, 0x33333332, 0x555, x2, 1592, x6)
+
+inst_418:
+// rs1_val==858993458 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x33333222, 0x33333332, -0x556, x2, 1596, x6)
+
+inst_419:
+// rs1_val==858993458 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x33333332, 0x5, x2, 1600, x6)
+
+inst_420:
+// rs1_val==858993458 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x332, 0x33333332, 0x333, x2, 1604, x6)
+
+inst_421:
+// rs1_val==858993458 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x222, 0x33333332, 0x666, x2, 1608, x6)
+
+inst_422:
+// rs1_val==858993458 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x33333312, 0x33333332, -0x2d, x2, 1612, x6)
+
+inst_423:
+// rs1_val==858993458 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x20, 0x33333332, 0x2d, x2, 1616, x6)
+
+inst_424:
+// rs1_val==858993458 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x33333332, 0x2, x2, 1620, x6)
+
+inst_425:
+// rs1_val==858993458 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x110, 0x33333332, 0x554, x2, 1624, x6)
+
+inst_426:
+// rs1_val==858993458 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x33333332, 0x0, x2, 1628, x6)
+
+inst_427:
+// rs1_val==858993458 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x33333332, 0x4, x2, 1632, x6)
+
+inst_428:
+// rs1_val==858993458 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x332, 0x33333332, 0x332, x2, 1636, x6)
+
+inst_429:
+// rs1_val==858993458 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x220, 0x33333332, 0x665, x2, 1640, x6)
+
+inst_430:
+// rs1_val==858993458 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x20, 0x33333332, 0x2c, x2, 1644, x6)
+
+inst_431:
+// rs1_val==858993458 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x112, 0x33333332, 0x556, x2, 1648, x6)
+
+inst_432:
+// rs1_val==858993458 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x33333222, 0x33333332, -0x555, x2, 1652, x6)
+
+inst_433:
+// rs1_val==858993458 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x33333332, 0x6, x2, 1656, x6)
+
+inst_434:
+// rs1_val==858993458 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x330, 0x33333332, 0x334, x2, 1660, x6)
+
+inst_435:
+// rs1_val==858993458 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x222, 0x33333332, 0x667, x2, 1664, x6)
+
+inst_436:
+// rs1_val==858993458 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x33333310, 0x33333332, -0x2c, x2, 1668, x6)
+
+inst_437:
+// rs1_val==858993458 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x22, 0x33333332, 0x2e, x2, 1672, x6)
+
+inst_438:
+// rs1_val==1717986917 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x66666665, 0x3, x2, 1676, x6)
+
+inst_439:
+// rs1_val==1717986917 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x445, 0x66666665, 0x555, x2, 1680, x6)
+
+inst_440:
+// rs1_val==1717986917 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x66666220, 0x66666665, -0x556, x2, 1684, x6)
+
+inst_441:
+// rs1_val==1717986917 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x66666665, 0x5, x2, 1688, x6)
+
+inst_442:
+// rs1_val==1717986917 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x221, 0x66666665, 0x333, x2, 1692, x6)
+
+inst_443:
+// rs1_val==1717986917 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x664, 0x66666665, 0x666, x2, 1696, x6)
+
+inst_444:
+// rs1_val==1717986917 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x66666641, 0x66666665, -0x2d, x2, 1700, x6)
+
+inst_445:
+// rs1_val==1717986917 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x25, 0x66666665, 0x2d, x2, 1704, x6)
+
+inst_446:
+// rs1_val==1717986917 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x66666665, 0x2, x2, 1708, x6)
+
+inst_447:
+// rs1_val==1717986917 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x66666665, 0x554, x2, 1712, x6)
+
+inst_448:
+// rs1_val==1717986917 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x66666665, 0x0, x2, 1716, x6)
+
+inst_449:
+// rs1_val==1717986917 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x66666665, 0x4, x2, 1720, x6)
+
+inst_450:
+// rs1_val==1717986917 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x220, 0x66666665, 0x332, x2, 1724, x6)
+
+inst_451:
+// rs1_val==1717986917 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x665, 0x66666665, 0x665, x2, 1728, x6)
+
+inst_452:
+// rs1_val==1717986917 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x66666665, 0x2c, x2, 1732, x6)
+
+inst_453:
+// rs1_val==1717986917 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x66666665, 0x556, x2, 1736, x6)
+
+inst_454:
+// rs1_val==1717986917 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x66666221, 0x66666665, -0x555, x2, 1740, x6)
+
+inst_455:
+// rs1_val==1717986917 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x66666665, 0x6, x2, 1744, x6)
+
+inst_456:
+// rs1_val==1717986917 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x224, 0x66666665, 0x334, x2, 1748, x6)
+
+inst_457:
+// rs1_val==1717986917 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x665, 0x66666665, 0x667, x2, 1752, x6)
+
+inst_458:
+// rs1_val==1717986917 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x66666644, 0x66666665, -0x2c, x2, 1756, x6)
+
+inst_459:
+// rs1_val==1717986917 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x66666665, 0x2e, x2, 1760, x6)
+
+inst_460:
+// rs1_val==46339 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x3, 0xb503, 0x3, x2, 1764, x6)
+
+inst_461:
+// rs1_val==46339 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x501, 0xb503, 0x555, x2, 1768, x6)
+
+inst_462:
+// rs1_val==46339 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xb002, 0xb503, -0x556, x2, 1772, x6)
+
+inst_463:
+// rs1_val==46339 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x1, 0xb503, 0x5, x2, 1776, x6)
+
+inst_464:
+// rs1_val==46339 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x103, 0xb503, 0x333, x2, 1780, x6)
+
+inst_465:
+// rs1_val==46339 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x402, 0xb503, 0x666, x2, 1784, x6)
+
+inst_466:
+// rs1_val==46339 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xb503, 0xb503, -0x2d, x2, 1788, x6)
+
+inst_467:
+// rs1_val==46339 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x1, 0xb503, 0x2d, x2, 1792, x6)
+
+inst_468:
+// rs1_val==46339 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0xb503, 0x2, x2, 1796, x6)
+
+inst_469:
+// rs1_val==46339 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x500, 0xb503, 0x554, x2, 1800, x6)
+
+inst_470:
+// rs1_val==46339 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb503, 0x0, x2, 1804, x6)
+
+inst_471:
+// rs1_val==46339 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb503, 0x4, x2, 1808, x6)
+
+inst_472:
+// rs1_val==46339 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x102, 0xb503, 0x332, x2, 1812, x6)
+
+inst_473:
+// rs1_val==46339 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x401, 0xb503, 0x665, x2, 1816, x6)
+
+inst_474:
+// rs1_val==46339 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb503, 0x2c, x2, 1820, x6)
+
+inst_475:
+// rs1_val==46339 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x502, 0xb503, 0x556, x2, 1824, x6)
+
+inst_476:
+// rs1_val==46339 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xb003, 0xb503, -0x555, x2, 1828, x6)
+
+inst_477:
+// rs1_val==46339 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, 0xb503, 0x6, x2, 1832, x6)
+
+inst_478:
+// rs1_val==46339 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x100, 0xb503, 0x334, x2, 1836, x6)
+
+inst_479:
+// rs1_val==46339 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x403, 0xb503, 0x667, x2, 1840, x6)
+
+inst_480:
+// rs1_val==46339 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xb500, 0xb503, -0x2c, x2, 1844, x6)
+
+inst_481:
+// rs1_val==46339 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb503; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x2, 0xb503, 0x2e, x2, 1848, x6)
+
+inst_482:
+// rs1_val==1431655766 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x55555556, 0x3, x2, 1852, x6)
+
+inst_483:
+// rs1_val==1431655766 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x55555556, 0x555, x2, 1856, x6)
+
+inst_484:
+// rs1_val==1431655766 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x55555002, 0x55555556, -0x556, x2, 1860, x6)
+
+inst_485:
+// rs1_val==1431655766 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555556, 0x5, x2, 1864, x6)
+
+inst_486:
+// rs1_val==1431655766 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x112, 0x55555556, 0x333, x2, 1868, x6)
+
+inst_487:
+// rs1_val==1431655766 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x446, 0x55555556, 0x666, x2, 1872, x6)
+
+inst_488:
+// rs1_val==1431655766 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x55555552, 0x55555556, -0x2d, x2, 1876, x6)
+
+inst_489:
+// rs1_val==1431655766 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555556, 0x2d, x2, 1880, x6)
+
+inst_490:
+// rs1_val==1431655766 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x55555556, 0x2, x2, 1884, x6)
+
+inst_491:
+// rs1_val==1431655766 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x55555556, 0x554, x2, 1888, x6)
+
+inst_492:
+// rs1_val==1431655766 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x55555556, 0x0, x2, 1892, x6)
+
+inst_493:
+// rs1_val==1431655766 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555556, 0x4, x2, 1896, x6)
+
+inst_494:
+// rs1_val==1431655766 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x112, 0x55555556, 0x332, x2, 1900, x6)
+
+inst_495:
+// rs1_val==1431655766 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x55555556, 0x665, x2, 1904, x6)
+
+inst_496:
+// rs1_val==1431655766 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x55555556, 0x2c, x2, 1908, x6)
+
+inst_497:
+// rs1_val==1431655766 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x556, 0x55555556, 0x556, x2, 1912, x6)
+
+inst_498:
+// rs1_val==1431655766 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x55555002, 0x55555556, -0x555, x2, 1916, x6)
+
+inst_499:
+// rs1_val==1431655766 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x55555556, 0x6, x2, 1920, x6)
+
+inst_500:
+// rs1_val==1431655766 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x114, 0x55555556, 0x334, x2, 1924, x6)
+
+inst_501:
+// rs1_val==1431655766 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x446, 0x55555556, 0x667, x2, 1928, x6)
+
+inst_502:
+// rs1_val==1431655766 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x55555554, 0x55555556, -0x2c, x2, 1932, x6)
+
+inst_503:
+// rs1_val==1431655766 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x55555556, 0x2e, x2, 1936, x6)
+
+inst_504:
+// rs1_val==-1431655765 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x3, -0x55555555, 0x3, x2, 1940, x6)
+
+inst_505:
+// rs1_val==-1431655765 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x1, -0x55555555, 0x555, x2, 1944, x6)
+
+inst_506:
+// rs1_val==-1431655765 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaaaa, -0x55555555, -0x556, x2, 1948, x6)
+
+inst_507:
+// rs1_val==-1431655765 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x1, -0x55555555, 0x5, x2, 1952, x6)
+
+inst_508:
+// rs1_val==-1431655765 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x223, -0x55555555, 0x333, x2, 1956, x6)
+
+inst_509:
+// rs1_val==-1431655765 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x222, -0x55555555, 0x666, x2, 1960, x6)
+
+inst_510:
+// rs1_val==-1431655765 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaa83, -0x55555555, -0x2d, x2, 1964, x6)
+
+inst_511:
+// rs1_val==-1431655765 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x29, -0x55555555, 0x2d, x2, 1968, x6)
+
+inst_512:
+// rs1_val==-1431655765 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x55555555, 0x2, x2, 1972, x6)
+
+inst_513:
+// rs1_val==-1431655765 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x55555555, 0x554, x2, 1976, x6)
+
+inst_514:
+// rs1_val==-1431655765 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x55555555, 0x0, x2, 1980, x6)
+
+inst_515:
+// rs1_val==-1431655765 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x55555555, 0x4, x2, 1984, x6)
+
+inst_516:
+// rs1_val==-1431655765 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x222, -0x55555555, 0x332, x2, 1988, x6)
+
+inst_517:
+// rs1_val==-1431655765 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x221, -0x55555555, 0x665, x2, 1992, x6)
+
+inst_518:
+// rs1_val==-1431655765 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x28, -0x55555555, 0x2c, x2, 1996, x6)
+
+inst_519:
+// rs1_val==-1431655765 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x55555555, 0x556, x2, 2000, x6)
+
+inst_520:
+// rs1_val==-1431655765 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaaab, -0x55555555, -0x555, x2, 2004, x6)
+
+inst_521:
+// rs1_val==-1431655765 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x55555555, 0x6, x2, 2008, x6)
+
+inst_522:
+// rs1_val==-1431655765 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x220, -0x55555555, 0x334, x2, 2012, x6)
+
+inst_523:
+// rs1_val==-1431655765 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x223, -0x55555555, 0x667, x2, 2016, x6)
+
+inst_524:
+// rs1_val==-1431655765 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaa80, -0x55555555, -0x2c, x2, 2020, x6)
+
+inst_525:
+// rs1_val==-1431655765 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x2a, -0x55555555, 0x2e, x2, 2024, x6)
+
+inst_526:
+// rs1_val==6 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, 0x3, x2, 2028, x6)
+
+inst_527:
+// rs1_val==6 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x555, x2, 2032, x6)
+
+inst_528:
+// rs1_val==6 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, -0x556, x2, 2036, x6)
+
+inst_529:
+// rs1_val==6 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x5, x2, 2040, x6)
+
+inst_530:
+// rs1_val==6 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, 0x333, x2, 2044, x6)
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_531:
+// rs1_val==6 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x6, 0x666, x2, 0, x6)
+
+inst_532:
+// rs1_val==6 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, -0x2d, x2, 4, x6)
+
+inst_533:
+// rs1_val==6 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x2d, x2, 8, x6)
+
+inst_534:
+// rs1_val==6 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, 0x2, x2, 12, x6)
+
+inst_535:
+// rs1_val==6 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x554, x2, 16, x6)
+
+inst_536:
+// rs1_val==6 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x6, 0x0, x2, 20, x6)
+
+inst_537:
+// rs1_val==6 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x4, x2, 24, x6)
+
+inst_538:
+// rs1_val==6 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, 0x332, x2, 28, x6)
+
+inst_539:
+// rs1_val==6 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x665, x2, 32, x6)
+
+inst_540:
+// rs1_val==6 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x2c, x2, 36, x6)
+
+inst_541:
+// rs1_val==6 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x6, 0x556, x2, 40, x6)
+
+inst_542:
+// rs1_val==6 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, -0x555, x2, 44, x6)
+
+inst_543:
+// rs1_val==6 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x6, 0x6, x2, 48, x6)
+
+inst_544:
+// rs1_val==6 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x334, x2, 52, x6)
+
+inst_545:
+// rs1_val==6 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x6, 0x667, x2, 56, x6)
+
+inst_546:
+// rs1_val==6 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, -0x2c, x2, 60, x6)
+
+inst_547:
+// rs1_val==6 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x6, 0x2e, x2, 64, x6)
+
+inst_548:
+// rs1_val==858993460 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x33333334, 0x3, x2, 68, x6)
+
+inst_549:
+// rs1_val==858993460 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x114, 0x33333334, 0x555, x2, 72, x6)
+
+inst_550:
+// rs1_val==858993460 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x33333220, 0x33333334, -0x556, x2, 76, x6)
+
+inst_551:
+// rs1_val==858993460 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x33333334, 0x5, x2, 80, x6)
+
+inst_552:
+// rs1_val==858993460 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x330, 0x33333334, 0x333, x2, 84, x6)
+
+inst_553:
+// rs1_val==858993460 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x224, 0x33333334, 0x666, x2, 88, x6)
+
+inst_554:
+// rs1_val==858993460 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x33333310, 0x33333334, -0x2d, x2, 92, x6)
+
+inst_555:
+// rs1_val==858993460 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x33333334, 0x2d, x2, 96, x6)
+
+inst_556:
+// rs1_val==858993460 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x33333334, 0x2, x2, 100, x6)
+
+inst_557:
+// rs1_val==858993460 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x114, 0x33333334, 0x554, x2, 104, x6)
+
+inst_558:
+// rs1_val==858993460 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x33333334, 0x0, x2, 108, x6)
+
+inst_559:
+// rs1_val==858993460 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x33333334; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x33333334, 0x4, x2, 112, x6)
+
+inst_560:
+// imm_val == 2, rs1_val == 16777216
+// opcode: andi ; op1:x10; dest:x11; op1val:0x1000000; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x1000000, 0x2, x2, 116, x6)
+
+inst_561:
+// imm_val == -257,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x101
+TEST_IMM_OP( andi, x11, x10, 0xffff4afc, -0xb504, -0x101, x2, 120, x6)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x18_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x18_1:
+ .fill 19*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 31*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/auipc-01.S b/riscof/suite/rv32i_m/I/auipc-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..8dc19df108262ff6394d211abef31f57f2de8e37
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/auipc-01.S
@@ -0,0 +1,394 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the auipc instruction of the RISC-V I extension for the auipc covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",auipc)
+
+RVTEST_SIGBASE( x11,signature_x11_1)
+
+inst_0:
+// rd==x20, imm_val == 0, imm_val==0
+// opcode: auipc ; dest:x20; immval:0x0
+TEST_AUIPC(auipc, x20, 0x0, 0x0, x11, 0, x12)
+
+inst_1:
+// rd==x17, imm_val > 0,
+// opcode: auipc ; dest:x17; immval:0xe
+TEST_AUIPC(auipc, x17, 0xe000, 0xe, x11, 4, x12)
+
+inst_2:
+// rd==x4, imm_val == ((2**20)-1),
+// opcode: auipc ; dest:x4; immval:0xfffff
+TEST_AUIPC(auipc, x4, -0x1000, 0xfffff, x11, 8, x12)
+
+inst_3:
+// rd==x24, imm_val==3,
+// opcode: auipc ; dest:x24; immval:0x3
+TEST_AUIPC(auipc, x24, 0x3000, 0x3, x11, 12, x12)
+
+inst_4:
+// rd==x21, imm_val==349525, imm_val == 349525
+// opcode: auipc ; dest:x21; immval:0x55555
+TEST_AUIPC(auipc, x21, 0x55555000, 0x55555, x11, 16, x12)
+
+inst_5:
+// rd==x8, imm_val==699050, imm_val == 699050
+// opcode: auipc ; dest:x8; immval:0xaaaaa
+TEST_AUIPC(auipc, x8, -0x55556000, 0xaaaaa, x11, 20, x12)
+
+inst_6:
+// rd==x14, imm_val==5,
+// opcode: auipc ; dest:x14; immval:0x5
+TEST_AUIPC(auipc, x14, 0x5000, 0x5, x11, 24, x12)
+
+inst_7:
+// rd==x26, imm_val==209715,
+// opcode: auipc ; dest:x26; immval:0x33333
+TEST_AUIPC(auipc, x26, 0x33333000, 0x33333, x11, 28, x12)
+
+inst_8:
+// rd==x9, imm_val==419430,
+// opcode: auipc ; dest:x9; immval:0x66666
+TEST_AUIPC(auipc, x9, 0x66666000, 0x66666, x11, 32, x12)
+
+inst_9:
+// rd==x15, imm_val==724,
+// opcode: auipc ; dest:x15; immval:0x2d4
+TEST_AUIPC(auipc, x15, 0x2d4000, 0x2d4, x11, 36, x12)
+
+inst_10:
+// rd==x18, imm_val==1023,
+// opcode: auipc ; dest:x18; immval:0x3ff
+TEST_AUIPC(auipc, x18, 0x3ff000, 0x3ff, x11, 40, x12)
+
+inst_11:
+// rd==x10, imm_val==2, imm_val == 2
+// opcode: auipc ; dest:x10; immval:0x2
+TEST_AUIPC(auipc, x10, 0x2000, 0x2, x11, 44, x12)
+
+inst_12:
+// rd==x7, imm_val==349524,
+// opcode: auipc ; dest:x7; immval:0x55554
+TEST_AUIPC(auipc, x7, 0x55554000, 0x55554, x11, 48, x12)
+
+inst_13:
+// rd==x1, imm_val==699049,
+// opcode: auipc ; dest:x1; immval:0xaaaa9
+TEST_AUIPC(auipc, x1, -0x55557000, 0xaaaa9, x11, 52, x12)
+
+inst_14:
+// rd==x25, imm_val==4, imm_val == 4
+// opcode: auipc ; dest:x25; immval:0x4
+TEST_AUIPC(auipc, x25, 0x4000, 0x4, x11, 56, x12)
+
+inst_15:
+// rd==x23, imm_val==209714,
+// opcode: auipc ; dest:x23; immval:0x33332
+TEST_AUIPC(auipc, x23, 0x33332000, 0x33332, x11, 60, x12)
+
+inst_16:
+// rd==x31, imm_val==419429,
+// opcode: auipc ; dest:x31; immval:0x66665
+TEST_AUIPC(auipc, x31, 0x66665000, 0x66665, x11, 64, x12)
+
+inst_17:
+// rd==x5, imm_val==723,
+// opcode: auipc ; dest:x5; immval:0x2d3
+TEST_AUIPC(auipc, x5, 0x2d3000, 0x2d3, x11, 68, x12)
+
+inst_18:
+// rd==x22, imm_val==1022,
+// opcode: auipc ; dest:x22; immval:0x3fe
+TEST_AUIPC(auipc, x22, 0x3fe000, 0x3fe, x11, 72, x12)
+
+inst_19:
+// rd==x3, imm_val==349526,
+// opcode: auipc ; dest:x3; immval:0x55556
+TEST_AUIPC(auipc, x3, 0x55556000, 0x55556, x11, 76, x12)
+
+inst_20:
+// rd==x30, imm_val==699051,
+// opcode: auipc ; dest:x30; immval:0xaaaab
+TEST_AUIPC(auipc, x30, -0x55555000, 0xaaaab, x11, 80, x12)
+
+inst_21:
+// rd==x0, imm_val==6,
+// opcode: auipc ; dest:x0; immval:0x6
+TEST_AUIPC(auipc, x0, 0, 0x6, x11, 84, x12)
+
+inst_22:
+// rd==x16, imm_val==209716,
+// opcode: auipc ; dest:x16; immval:0x33334
+TEST_AUIPC(auipc, x16, 0x33334000, 0x33334, x11, 88, x12)
+
+inst_23:
+// rd==x19, imm_val==419431,
+// opcode: auipc ; dest:x19; immval:0x66667
+TEST_AUIPC(auipc, x19, 0x66667000, 0x66667, x11, 92, x12)
+
+inst_24:
+// rd==x29, imm_val==725,
+// opcode: auipc ; dest:x29; immval:0x2d5
+TEST_AUIPC(auipc, x29, 0x2d5000, 0x2d5, x11, 96, x12)
+
+inst_25:
+// rd==x6, imm_val==1, imm_val == 1
+// opcode: auipc ; dest:x6; immval:0x1
+TEST_AUIPC(auipc, x6, 0x1000, 0x1, x11, 100, x12)
+
+inst_26:
+// rd==x28, imm_val==1024, imm_val == 1024
+// opcode: auipc ; dest:x28; immval:0x400
+TEST_AUIPC(auipc, x28, 0x400000, 0x400, x11, 104, x12)
+
+inst_27:
+// rd==x2, imm_val == 8,
+// opcode: auipc ; dest:x2; immval:0x8
+TEST_AUIPC(auipc, x2, 0x8000, 0x8, x11, 108, x12)
+
+inst_28:
+// rd==x27, imm_val == 16,
+// opcode: auipc ; dest:x27; immval:0x10
+TEST_AUIPC(auipc, x27, 0x10000, 0x10, x11, 112, x2)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_29:
+// rd==x13, imm_val == 32,
+// opcode: auipc ; dest:x13; immval:0x20
+TEST_AUIPC(auipc, x13, 0x20000, 0x20, x1, 0, x2)
+
+inst_30:
+// rd==x11, imm_val == 64,
+// opcode: auipc ; dest:x11; immval:0x40
+TEST_AUIPC(auipc, x11, 0x40000, 0x40, x1, 4, x2)
+
+inst_31:
+// rd==x12, imm_val == 128,
+// opcode: auipc ; dest:x12; immval:0x80
+TEST_AUIPC(auipc, x12, 0x80000, 0x80, x1, 8, x2)
+
+inst_32:
+// imm_val == 983039,
+// opcode: auipc ; dest:x10; immval:0xeffff
+TEST_AUIPC(auipc, x10, -0x10001000, 0xeffff, x1, 12, x2)
+
+inst_33:
+// imm_val == 917503,
+// opcode: auipc ; dest:x10; immval:0xdffff
+TEST_AUIPC(auipc, x10, -0x20001000, 0xdffff, x1, 16, x2)
+
+inst_34:
+// imm_val == 786431,
+// opcode: auipc ; dest:x10; immval:0xbffff
+TEST_AUIPC(auipc, x10, -0x40001000, 0xbffff, x1, 20, x2)
+
+inst_35:
+// imm_val == 524287,
+// opcode: auipc ; dest:x10; immval:0x7ffff
+TEST_AUIPC(auipc, x10, 0x7ffff000, 0x7ffff, x1, 24, x2)
+
+inst_36:
+// imm_val == 256,
+// opcode: auipc ; dest:x10; immval:0x100
+TEST_AUIPC(auipc, x10, 0x100000, 0x100, x1, 28, x2)
+
+inst_37:
+// imm_val == 512,
+// opcode: auipc ; dest:x10; immval:0x200
+TEST_AUIPC(auipc, x10, 0x200000, 0x200, x1, 32, x2)
+
+inst_38:
+// imm_val == 2048,
+// opcode: auipc ; dest:x10; immval:0x800
+TEST_AUIPC(auipc, x10, 0x800000, 0x800, x1, 36, x2)
+
+inst_39:
+// imm_val == 4096,
+// opcode: auipc ; dest:x10; immval:0x1000
+TEST_AUIPC(auipc, x10, 0x1000000, 0x1000, x1, 40, x2)
+
+inst_40:
+// imm_val == 8192,
+// opcode: auipc ; dest:x10; immval:0x2000
+TEST_AUIPC(auipc, x10, 0x2000000, 0x2000, x1, 44, x2)
+
+inst_41:
+// imm_val == 16384,
+// opcode: auipc ; dest:x10; immval:0x4000
+TEST_AUIPC(auipc, x10, 0x4000000, 0x4000, x1, 48, x2)
+
+inst_42:
+// imm_val == 32768,
+// opcode: auipc ; dest:x10; immval:0x8000
+TEST_AUIPC(auipc, x10, 0x8000000, 0x8000, x1, 52, x2)
+
+inst_43:
+// imm_val == 65536,
+// opcode: auipc ; dest:x10; immval:0x10000
+TEST_AUIPC(auipc, x10, 0x10000000, 0x10000, x1, 56, x2)
+
+inst_44:
+// imm_val == 131072,
+// opcode: auipc ; dest:x10; immval:0x20000
+TEST_AUIPC(auipc, x10, 0x20000000, 0x20000, x1, 60, x2)
+
+inst_45:
+// imm_val == 262144,
+// opcode: auipc ; dest:x10; immval:0x40000
+TEST_AUIPC(auipc, x10, 0x40000000, 0x40000, x1, 64, x2)
+
+inst_46:
+// imm_val == 524288,
+// opcode: auipc ; dest:x10; immval:0x80000
+TEST_AUIPC(auipc, x10, -0x80000000, 0x80000, x1, 68, x2)
+
+inst_47:
+// imm_val == 1048574,
+// opcode: auipc ; dest:x10; immval:0xffffe
+TEST_AUIPC(auipc, x10, -0x2000, 0xffffe, x1, 72, x2)
+
+inst_48:
+// imm_val == 1048573,
+// opcode: auipc ; dest:x10; immval:0xffffd
+TEST_AUIPC(auipc, x10, -0x3000, 0xffffd, x1, 76, x2)
+
+inst_49:
+// imm_val == 1048571,
+// opcode: auipc ; dest:x10; immval:0xffffb
+TEST_AUIPC(auipc, x10, -0x5000, 0xffffb, x1, 80, x2)
+
+inst_50:
+// imm_val == 1048567,
+// opcode: auipc ; dest:x10; immval:0xffff7
+TEST_AUIPC(auipc, x10, -0x9000, 0xffff7, x1, 84, x2)
+
+inst_51:
+// imm_val == 1048559,
+// opcode: auipc ; dest:x10; immval:0xfffef
+TEST_AUIPC(auipc, x10, -0x11000, 0xfffef, x1, 88, x2)
+
+inst_52:
+// imm_val == 1048543,
+// opcode: auipc ; dest:x10; immval:0xfffdf
+TEST_AUIPC(auipc, x10, -0x21000, 0xfffdf, x1, 92, x2)
+
+inst_53:
+// imm_val == 1048511,
+// opcode: auipc ; dest:x10; immval:0xfffbf
+TEST_AUIPC(auipc, x10, -0x41000, 0xfffbf, x1, 96, x2)
+
+inst_54:
+// imm_val == 1048447,
+// opcode: auipc ; dest:x10; immval:0xfff7f
+TEST_AUIPC(auipc, x10, -0x81000, 0xfff7f, x1, 100, x2)
+
+inst_55:
+// imm_val == 1048319,
+// opcode: auipc ; dest:x10; immval:0xffeff
+TEST_AUIPC(auipc, x10, -0x101000, 0xffeff, x1, 104, x2)
+
+inst_56:
+// imm_val == 1048063,
+// opcode: auipc ; dest:x10; immval:0xffdff
+TEST_AUIPC(auipc, x10, -0x201000, 0xffdff, x1, 108, x2)
+
+inst_57:
+// imm_val == 1047551,
+// opcode: auipc ; dest:x10; immval:0xffbff
+TEST_AUIPC(auipc, x10, -0x401000, 0xffbff, x1, 112, x2)
+
+inst_58:
+// imm_val == 1046527,
+// opcode: auipc ; dest:x10; immval:0xff7ff
+TEST_AUIPC(auipc, x10, -0x801000, 0xff7ff, x1, 116, x2)
+
+inst_59:
+// imm_val == 1044479,
+// opcode: auipc ; dest:x10; immval:0xfefff
+TEST_AUIPC(auipc, x10, -0x1001000, 0xfefff, x1, 120, x2)
+
+inst_60:
+// imm_val == 1040383,
+// opcode: auipc ; dest:x10; immval:0xfdfff
+TEST_AUIPC(auipc, x10, -0x2001000, 0xfdfff, x1, 124, x2)
+
+inst_61:
+// imm_val == 1032191,
+// opcode: auipc ; dest:x10; immval:0xfbfff
+TEST_AUIPC(auipc, x10, -0x4001000, 0xfbfff, x1, 128, x2)
+
+inst_62:
+// imm_val == 1015807,
+// opcode: auipc ; dest:x10; immval:0xf7fff
+TEST_AUIPC(auipc, x10, -0x8001000, 0xf7fff, x1, 132, x2)
+
+inst_63:
+// imm_val==6,
+// opcode: auipc ; dest:x10; immval:0x6
+TEST_AUIPC(auipc, x10, 0x6000, 0x6, x1, 136, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x11_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x11_1:
+ .fill 29*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 35*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/beq-01.S b/riscof/suite/rv32i_m/I/beq-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..64a98028a7f5bf06ca26029e66c188613bdb434c
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/beq-01.S
@@ -0,0 +1,2994 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the beq instruction of the RISC-V I extension for the beq covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",beq)
+
+RVTEST_SIGBASE( x5,signature_x5_1)
+
+inst_0:
+// rs1 == rs2, rs1==x19, rs2==x19, rs1_val > 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val == 1431655765, rs2_val == 262144, rs1_val > rs2_val and imm_val < 0 and imm_val & 0x03 == 0
+// opcode: beq, op1:x19; op2:x19; op1val:0x55555555; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x11, x19, x19, 0x55555555, 0x55555555, 0x400, 1b, x5, 0,0)
+
+inst_1:
+// rs1 != rs2, rs1==x0, rs2==x14, rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs1_val == 536870912, rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0
+// opcode: beq, op1:x0; op2:x14; op1val:0x0; op2val:-0xb504; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x11, x0, x14, 0x0, -0xb504, 0x20, 3f, x5, 4,0)
+
+inst_2:
+// rs1==x24, rs2==x2, rs1_val < 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs2_val == -1025, rs1_val == -131073
+// opcode: beq, op1:x24; op2:x2; op1val:-0x20001; op2val:-0x401; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x11, x24, x2, -0x20001, -0x401, 0x0, 3f, x5, 8,0)
+
+inst_3:
+// rs1==x8, rs2==x4, rs1_val < 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val < rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == 131072, rs1_val == -4097
+// opcode: beq, op1:x8; op2:x4; op1val:-0x1001; op2val:0x20000; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x11, x8, x4, -0x1001, 0x20000, 0x8, 3f, x5, 12,0)
+
+inst_4:
+// rs1==x2, rs2==x30, rs1_val == rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == -513, rs1_val == -513
+// opcode: beq, op1:x2; op2:x30; op1val:-0x201; op2val:-0x201; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x11, x2, x30, -0x201, -0x201, 0x100, 3f, x5, 16,0)
+
+inst_5:
+// rs1==x20, rs2==x25, rs1_val == rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs2_val == 128, rs1_val == 128
+// opcode: beq, op1:x20; op2:x25; op1val:0x80; op2val:0x80; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x11, x20, x25, 0x80, 0x80, 0x8, 1b, x5, 20,0)
+
+inst_6:
+// rs1==x26, rs2==x15, rs1_val < rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs1_val == -4194305, rs2_val == 8192
+// opcode: beq, op1:x26; op2:x15; op1val:-0x400001; op2val:0x2000; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x11, x26, x15, -0x400001, 0x2000, 0x8, 1b, x5, 24,0)
+
+inst_7:
+// rs1==x22, rs2==x9, rs2_val == 1,
+// opcode: beq, op1:x22; op2:x9; op1val:0x5; op2val:0x1; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x11, x22, x9, 0x5, 0x1, 0x4, 1b, x5, 28,0)
+
+inst_8:
+// rs1==x21, rs2==x10, rs2_val == 2, rs1_val==858993459 and rs2_val==2
+// opcode: beq, op1:x21; op2:x10; op1val:0x33333333; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x11, x21, x10, 0x33333333, 0x2, 0x40, 3f, x5, 32,0)
+
+inst_9:
+// rs1==x30, rs2==x23, rs2_val == 4, rs1_val==6 and rs2_val==4
+// opcode: beq, op1:x30; op2:x23; op1val:0x6; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x11, x30, x23, 0x6, 0x4, 0x40, 3f, x5, 36,0)
+
+inst_10:
+// rs1==x3, rs2==x17, rs2_val == 8,
+// opcode: beq, op1:x3; op2:x17; op1val:-0x1001; op2val:0x8; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x11, x3, x17, -0x1001, 0x8, 0x4, 1b, x5, 40,0)
+
+inst_11:
+// rs1==x29, rs2==x28, rs2_val == 16,
+// opcode: beq, op1:x29; op2:x28; op1val:0x6; op2val:0x10; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x11, x29, x28, 0x6, 0x10, 0x2, 3f, x5, 44,0)
+
+inst_12:
+// rs1==x16, rs2==x18, rs2_val == 32, rs1_val == -8193
+// opcode: beq, op1:x16; op2:x18; op1val:-0x2001; op2val:0x20; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x11, x16, x18, -0x2001, 0x20, 0x400, 1b, x5, 48,0)
+
+inst_13:
+// rs1==x15, rs2==x24, rs2_val == 64, rs1_val == 512
+// opcode: beq, op1:x15; op2:x24; op1val:0x200; op2val:0x40; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x11, x15, x24, 0x200, 0x40, 0x100, 3f, x5, 52,0)
+
+inst_14:
+// rs1==x17, rs2==x6, rs2_val == 256,
+// opcode: beq, op1:x17; op2:x6; op1val:0x0; op2val:0x100; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x11, x17, x6, 0x0, 0x100, 0x10, 3f, x5, 56,0)
+
+inst_15:
+// rs1==x7, rs2==x12, rs2_val == 512, rs1_val == 8192
+// opcode: beq, op1:x7; op2:x12; op1val:0x2000; op2val:0x200; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x11, x7, x12, 0x2000, 0x200, 0xa, 1b, x5, 60,0)
+
+inst_16:
+// rs1==x25, rs2==x16, rs2_val == 1024,
+// opcode: beq, op1:x25; op2:x16; op1val:0x6; op2val:0x400; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x11, x25, x16, 0x6, 0x400, 0x80, 3f, x5, 64,0)
+
+inst_17:
+// rs1==x28, rs2==x1, rs2_val == 2048, rs1_val == 4
+// opcode: beq, op1:x28; op2:x1; op1val:0x4; op2val:0x800; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x11, x28, x1, 0x4, 0x800, 0x6, 1b, x5, 68,0)
+
+inst_18:
+// rs1==x1, rs2==x31, rs2_val == 4096, rs1_val == -134217729
+// opcode: beq, op1:x1; op2:x31; op1val:-0x8000001; op2val:0x1000; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x11, x1, x31, -0x8000001, 0x1000, 0x2, 1b, x5, 72,0)
+
+inst_19:
+// rs1==x4, rs2==x22, rs2_val == 16384,
+// opcode: beq, op1:x4; op2:x22; op1val:-0x201; op2val:0x4000; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x4, x22, -0x201, 0x4000, 0x2, 1b, x5, 76,0)
+
+inst_20:
+// rs1==x13, rs2==x0, rs2_val == 32768, rs1_val == 1048576
+// opcode: beq, op1:x13; op2:x0; op1val:0x100000; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x13, x0, 0x100000, 0x0, 0x100, 3f, x5, 80,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_21:
+// rs1==x31, rs2==x26, rs2_val == 65536,
+// opcode: beq, op1:x31; op2:x26; op1val:-0x1; op2val:0x10000; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x31, x26, -0x1, 0x10000, 0xa, 1b, x1, 0,0)
+
+inst_22:
+// rs1==x5, rs2==x27, rs2_val == 524288, rs1_val == 67108864
+// opcode: beq, op1:x5; op2:x27; op1val:0x4000000; op2val:0x80000; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x5, x27, 0x4000000, 0x80000, 0x2, 1b, x1, 4,0)
+
+inst_23:
+// rs1==x23, rs2==x29, rs2_val == 1048576, rs1_val == -16385
+// opcode: beq, op1:x23; op2:x29; op1val:-0x4001; op2val:0x100000; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x23, x29, -0x4001, 0x100000, 0x8, 3f, x1, 8,0)
+
+inst_24:
+// rs1==x14, rs2==x11, rs2_val == 2097152, rs1_val == -16777217
+// opcode: beq, op1:x14; op2:x11; op1val:-0x1000001; op2val:0x200000; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x14, x11, -0x1000001, 0x200000, 0x6, 1b, x1, 12,0)
+
+inst_25:
+// rs1==x27, rs2==x7, rs2_val == 4194304, rs1_val == -2049
+// opcode: beq, op1:x27; op2:x7; op1val:-0x801; op2val:0x400000; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x27, x7, -0x801, 0x400000, 0x8, 1b, x1, 16,0)
+
+inst_26:
+// rs1==x10, rs2==x8, rs2_val == 8388608,
+// opcode: beq, op1:x10; op2:x8; op1val:0x33333333; op2val:0x800000; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x8, 0x33333333, 0x800000, 0x80, 3f, x1, 20,0)
+
+inst_27:
+// rs1==x12, rs2==x21, rs2_val == 16777216, rs1_val == -2097153
+// opcode: beq, op1:x12; op2:x21; op1val:-0x200001; op2val:0x1000000; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x12, x21, -0x200001, 0x1000000, 0x6, 3f, x1, 24,0)
+
+inst_28:
+// rs1==x18, rs2==x13, rs2_val == 33554432,
+// opcode: beq, op1:x18; op2:x13; op1val:-0x20001; op2val:0x2000000; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x18, x13, -0x20001, 0x2000000, 0x2, 1b, x1, 28,0)
+
+inst_29:
+// rs1==x9, rs2==x5, rs2_val == 67108864, rs1_val == 32768
+// opcode: beq, op1:x9; op2:x5; op1val:0x8000; op2val:0x4000000; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x9, x5, 0x8000, 0x4000000, 0x20, 3f, x1, 32,0)
+
+inst_30:
+// rs1==x6, rs2==x3, rs2_val == 134217728, rs1_val == 16777216
+// opcode: beq, op1:x6; op2:x3; op1val:0x1000000; op2val:0x8000000; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x6, x3, 0x1000000, 0x8000000, 0x10, 3f, x1, 36,0)
+
+inst_31:
+// rs1==x11, rs2==x20, rs2_val == 268435456,
+// opcode: beq, op1:x11; op2:x20; op1val:0x33333333; op2val:0x10000000; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x11, x20, 0x33333333, 0x10000000, 0x4, 3f, x1, 40,0)
+
+inst_32:
+// rs2_val == 536870912, rs1_val == 8
+// opcode: beq, op1:x10; op2:x11; op1val:0x8; op2val:0x20000000; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x8, 0x20000000, 0x6, 3f, x1, 44,0)
+
+inst_33:
+// rs2_val == 1073741824,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x8; op2val:0x40000000; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x8, 0x40000000, 0x200, 3f, x1, 48,0)
+
+inst_34:
+// rs2_val == -2147483648,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3fffffff; op2val:-0x80000000; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3fffffff, -0x80000000, 0x80, 3f, x1, 52,0)
+
+inst_35:
+// rs2_val == -2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:-0x2; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, -0x2, 0x6, 3f, x1, 56,0)
+
+inst_36:
+// rs2_val == -3, rs1_val == 2097152
+// opcode: beq, op1:x10; op2:x11; op1val:0x200000; op2val:-0x3; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x200000, -0x3, 0x2, 1b, x1, 60,0)
+
+inst_37:
+// rs2_val == -5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:-0x5; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, -0x5, 0x8, 3f, x1, 64,0)
+
+inst_38:
+// rs2_val == -9,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x1001; op2val:-0x9; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x1001, -0x9, 0x2, 3f, x1, 68,0)
+
+inst_39:
+// rs2_val == -17, rs1_val == 524288
+// opcode: beq, op1:x10; op2:x11; op1val:0x80000; op2val:-0x11; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x80000, -0x11, 0x0, 3f, x1, 72,0)
+
+inst_40:
+// rs2_val == -33,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x20001; op2val:-0x21; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x20001, -0x21, 0x6, 1b, x1, 76,0)
+
+inst_41:
+// rs2_val == -65, rs1_val == -1431655766
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x41; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, -0x41, 0x8, 1b, x1, 80,0)
+
+inst_42:
+// rs2_val == -129, rs1_val == 4194304
+// opcode: beq, op1:x10; op2:x11; op1val:0x400000; op2val:-0x81; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x400000, -0x81, 0x6, 1b, x1, 84,0)
+
+inst_43:
+// rs2_val == -257,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:-0x101; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, -0x101, 0x8, 3f, x1, 88,0)
+
+inst_44:
+// rs2_val == -2049, rs1_val == -257
+// opcode: beq, op1:x10; op2:x11; op1val:-0x101; op2val:-0x801; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x101, -0x801, 0x400, 1b, x1, 92,0)
+
+inst_45:
+// rs2_val == -4097,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:-0x1001; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, -0x1001, 0xa, 1b, x1, 96,0)
+
+inst_46:
+// rs2_val == -8193,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xa; op2val:-0x2001; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xa, -0x2001, 0x556, 1b, x1, 100,0)
+
+inst_47:
+// rs2_val == -16385, rs1_val == 2048
+// opcode: beq, op1:x10; op2:x11; op1val:0x800; op2val:-0x4001; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x800, -0x4001, 0xa, 1b, x1, 104,0)
+
+inst_48:
+// rs2_val == -32769, rs1_val == -2147483648
+// opcode: beq, op1:x10; op2:x11; op1val:-0x80000000; op2val:-0x8001; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x80000000, -0x8001, 0x10, 3f, x1, 108,0)
+
+inst_49:
+// rs2_val == -65537,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x1001; op2val:-0x10001; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x1001, -0x10001, 0x8, 1b, x1, 112,0)
+
+inst_50:
+// rs2_val == -131073,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:-0x20001; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, -0x20001, 0x40, 3f, x1, 116,0)
+
+inst_51:
+// rs2_val == -262145, rs1_val == -17
+// opcode: beq, op1:x10; op2:x11; op1val:-0x11; op2val:-0x40001; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x11, -0x40001, 0x80, 3f, x1, 120,0)
+
+inst_52:
+// rs2_val == -524289,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x201; op2val:-0x80001; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x201, -0x80001, 0xa, 1b, x1, 124,0)
+
+inst_53:
+// rs2_val == -1048577,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x801; op2val:-0x100001; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x801, -0x100001, 0x556, 1b, x1, 128,0)
+
+inst_54:
+// rs2_val == -2097153,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:-0x200001; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, -0x200001, 0x4, 3f, x1, 132,0)
+
+inst_55:
+// rs2_val == -4194305,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:-0x400001; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, -0x400001, 0x10, 3f, x1, 136,0)
+
+inst_56:
+// rs2_val == -8388609, rs1_val == -2
+// opcode: beq, op1:x10; op2:x11; op1val:-0x2; op2val:-0x800001; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x2, -0x800001, 0x80, 3f, x1, 140,0)
+
+inst_57:
+// rs2_val == -16777217,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x1000001; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, -0x1000001, 0x400, 1b, x1, 144,0)
+
+inst_58:
+// rs2_val == -33554433,
+// opcode: beq, op1:x10; op2:x11; op1val:0x9; op2val:-0x2000001; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x9, -0x2000001, 0x0, 1b, x1, 148,0)
+
+inst_59:
+// rs2_val == -67108865, rs1_val == 1024
+// opcode: beq, op1:x10; op2:x11; op1val:0x400; op2val:-0x4000001; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x400, -0x4000001, 0x2, 3f, x1, 152,0)
+
+inst_60:
+// rs2_val == -134217729, rs1_val == -3
+// opcode: beq, op1:x10; op2:x11; op1val:-0x3; op2val:-0x8000001; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x3, -0x8000001, 0x400, 1b, x1, 156,0)
+
+inst_61:
+// rs2_val == -268435457,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x1; op2val:-0x10000001; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x1, -0x10000001, 0xa, 1b, x1, 160,0)
+
+inst_62:
+// rs2_val == -536870913,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2000; op2val:-0x20000001; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2000, -0x20000001, 0x80, 3f, x1, 164,0)
+
+inst_63:
+// rs2_val == -1073741825,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:-0x40000001; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, -0x40000001, 0x4, 3f, x1, 168,0)
+
+inst_64:
+// rs2_val == 2147483647, rs1_val == -33554433
+// opcode: beq, op1:x10; op2:x11; op1val:-0x2000001; op2val:0x7fffffff; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x2000001, 0x7fffffff, 0x0, 3f, x1, 172,0)
+
+inst_65:
+// rs2_val == 1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x80000; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x80000, 0x55555555, 0x400, 3f, x1, 176,0)
+
+inst_66:
+// rs2_val == -1431655766, rs1_val==46340 and rs2_val==-1431655766
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, -0x55555556, 0x6, 1b, x1, 180,0)
+
+inst_67:
+// rs1_val == 1,
+// opcode: beq, op1:x10; op2:x11; op1val:0x1; op2val:0x80000; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x1, 0x80000, 0x100, 3f, x1, 184,0)
+
+inst_68:
+// rs1_val == 2, rs1_val==2 and rs2_val==4
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x4, 0x4, 3f, x1, 188,0)
+
+inst_69:
+// rs1_val == 16,
+// opcode: beq, op1:x10; op2:x11; op1val:0x10; op2val:0x80; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x10, 0x80, 0x80, 3f, x1, 192,0)
+
+inst_70:
+// rs1_val == 32,
+// opcode: beq, op1:x10; op2:x11; op1val:0x20; op2val:0x3fffffff; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x20, 0x3fffffff, 0x6, 3f, x1, 196,0)
+
+inst_71:
+// rs1_val == 64,
+// opcode: beq, op1:x10; op2:x11; op1val:0x40; op2val:0x1; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x40, 0x1, 0xa, 1b, x1, 200,0)
+
+inst_72:
+// rs1_val == 256,
+// opcode: beq, op1:x10; op2:x11; op1val:0x100; op2val:0x33333332; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x100, 0x33333332, 0x8, 3f, x1, 204,0)
+
+inst_73:
+// rs1_val == 4096,
+// opcode: beq, op1:x10; op2:x11; op1val:0x1000; op2val:0x100; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x1000, 0x100, 0x556, 1b, x1, 208,0)
+
+inst_74:
+// rs1_val == 16384,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4000; op2val:-0xa; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4000, -0xa, 0x4, 3f, x1, 212,0)
+
+inst_75:
+// rs1_val == 65536,
+// opcode: beq, op1:x10; op2:x11; op1val:0x10000; op2val:-0x8; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x10000, -0x8, 0x0, 3f, x1, 216,0)
+
+inst_76:
+// rs1_val == 131072,
+// opcode: beq, op1:x10; op2:x11; op1val:0x20000; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x20000, 0x55555555, 0x400, 1b, x1, 220,0)
+
+inst_77:
+// rs1_val == 262144,
+// opcode: beq, op1:x10; op2:x11; op1val:0x40000; op2val:-0x1001; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x40000, -0x1001, 0x20, 3f, x1, 224,0)
+
+inst_78:
+// rs1_val == 8388608,
+// opcode: beq, op1:x10; op2:x11; op1val:0x800000; op2val:-0x400001; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x800000, -0x400001, 0x400, 3f, x1, 228,0)
+
+inst_79:
+// rs1_val == 33554432,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2000000; op2val:-0x41; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2000000, -0x41, 0x400, 3f, x1, 232,0)
+
+inst_80:
+// rs1_val == 134217728,
+// opcode: beq, op1:x10; op2:x11; op1val:0x8000000; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x8000000, 0x3, 0x0, 3f, x1, 236,0)
+
+inst_81:
+// rs1_val == 268435456,
+// opcode: beq, op1:x10; op2:x11; op1val:0x10000000; op2val:0x8; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x10000000, 0x8, 0xa, 1b, x1, 240,0)
+
+inst_82:
+// rs1_val == 1073741824,
+// opcode: beq, op1:x10; op2:x11; op1val:0x40000000; op2val:0x33333333; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x40000000, 0x33333333, 0x0, 1b, x1, 244,0)
+
+inst_83:
+// rs1_val == -5,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5; op2val:-0xa; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x5, -0xa, 0x400, 1b, x1, 248,0)
+
+inst_84:
+// rs1_val == -9,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x9; op2val:-0x401; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x9, -0x401, 0x6, 3f, x1, 252,0)
+
+inst_85:
+// rs1_val == -33,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x21; op2val:-0x801; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x21, -0x801, 0x0, 3f, x1, 256,0)
+
+inst_86:
+// rs1_val == -65,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x41; op2val:0x400; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x41, 0x400, 0x6, 1b, x1, 260,0)
+
+inst_87:
+// rs1_val == -129,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x81; op2val:0x55555555; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x81, 0x55555555, 0x100, 3f, x1, 264,0)
+
+inst_88:
+// rs1_val == -1025,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x401; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x401, 0x0, 0x0, 1b, x1, 268,0)
+
+inst_89:
+// rs1_val == -32769,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x8001; op2val:-0x4; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x8001, -0x4, 0x8, 1b, x1, 272,0)
+
+inst_90:
+// rs1_val == -65537,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x10001; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x10001, 0x2, 0xa, 1b, x1, 276,0)
+
+inst_91:
+// rs1_val == -262145,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x40001; op2val:0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x40001, 0x55555555, 0x8, 3f, x1, 280,0)
+
+inst_92:
+// rs1_val == -524289,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x80001; op2val:-0x41; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x80001, -0x41, 0x200, 3f, x1, 284,0)
+
+inst_93:
+// rs1_val == -1048577,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x100001; op2val:0x2000000; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x100001, 0x2000000, 0x80, 3f, x1, 288,0)
+
+inst_94:
+// rs1_val == -8388609,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x800001; op2val:0x20000; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x800001, 0x20000, 0x40, 3f, x1, 292,0)
+
+inst_95:
+// rs1_val == -67108865,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x4000001; op2val:-0x801; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x4000001, -0x801, 0x8, 1b, x1, 296,0)
+
+inst_96:
+// rs1_val == -268435457,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x10000001; op2val:-0x1001; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x10000001, -0x1001, 0x0, 1b, x1, 300,0)
+
+inst_97:
+// rs1_val == -536870913,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x20000001; op2val:-0x21; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x20000001, -0x21, 0x6, 1b, x1, 304,0)
+
+inst_98:
+// rs1_val == -1073741825,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x40000001; op2val:-0xa; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x40000001, -0xa, 0x0, 3f, x1, 308,0)
+
+inst_99:
+// rs1_val == 2147483647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x7fffffff; op2val:-0x40000000; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x7fffffff, -0x40000000, 0x8, 1b, x1, 312,0)
+
+inst_100:
+// rs1_val==3 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x3, 0x20, 3f, x1, 316,0)
+
+inst_101:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x55555555, 0x2, 1b, x1, 320,0)
+
+inst_102:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:-0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, -0x55555556, 0x6, 1b, x1, 324,0)
+
+inst_103:
+// rs1_val==3 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x5, 0x10, 3f, x1, 328,0)
+
+inst_104:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x33333333; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x33333333, 0x40, 3f, x1, 332,0)
+
+inst_105:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x66666666; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x66666666, 0xa, 1b, x1, 336,0)
+
+inst_106:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, -0xb504, 0x8, 1b, x1, 340,0)
+
+inst_107:
+// rs1_val==3 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0xb504, 0x0, 3f, x1, 344,0)
+
+inst_108:
+// rs1_val==3 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x2, 0x40, 3f, x1, 348,0)
+
+inst_109:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x55555554; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x55555554, 0x80, 3f, x1, 352,0)
+
+inst_110:
+// rs1_val==3 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x0, 0x2, 1b, x1, 356,0)
+
+inst_111:
+// rs1_val==3 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x4, 0x8, 1b, x1, 360,0)
+
+inst_112:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x33333332; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x33333332, 0xa, 1b, x1, 364,0)
+
+inst_113:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x66666665; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x66666665, 0x4, 1b, x1, 368,0)
+
+inst_114:
+// rs1_val==3 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0xb503, 0x0, 1b, x1, 372,0)
+
+inst_115:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x55555556, 0x4, 3f, x1, 376,0)
+
+inst_116:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:-0x55555555; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, -0x55555555, 0xa, 1b, x1, 380,0)
+
+inst_117:
+// rs1_val==3 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x6, 0x10, 3f, x1, 384,0)
+
+inst_118:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x33333334; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x33333334, 0x40, 3f, x1, 388,0)
+
+inst_119:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x66666667; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0x66666667, 0x400, 3f, x1, 392,0)
+
+inst_120:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, -0xb503, 0x6, 3f, x1, 396,0)
+
+inst_121:
+// rs1_val==3 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x3, 0xb505, 0x6, 3f, x1, 400,0)
+
+inst_122:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x3, 0x2, 3f, x1, 404,0)
+
+inst_123:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x55555555, 0x400, 3f, x1, 408,0)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, -0x55555556, 0x200, 3f, x1, 412,0)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x5, 0x8, 1b, x1, 416,0)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333333; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x33333333, 0x100, 3f, x1, 420,0)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666666; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x66666666, 0x20, 3f, x1, 424,0)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, -0xb504, 0x8, 1b, x1, 428,0)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0xb504, 0x0, 1b, x1, 432,0)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x2, 0xa, 1b, x1, 436,0)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555554; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x55555554, 0x100, 3f, x1, 440,0)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x0, 0x6, 3f, x1, 444,0)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x4, 0xa, 1b, x1, 448,0)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333332; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x33333332, 0x556, 1b, x1, 452,0)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666665; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x66666665, 0x556, 1b, x1, 456,0)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0xb503, 0x4, 1b, x1, 460,0)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555556; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x55555556, 0x100, 3f, x1, 464,0)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, -0x55555555, 0x20, 3f, x1, 468,0)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x6, 0x6, 3f, x1, 472,0)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333334; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x33333334, 0x10, 3f, x1, 476,0)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666667; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x66666667, 0x20, 3f, x1, 480,0)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, -0xb503, 0x4, 3f, x1, 484,0)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0xb505, 0x6, 1b, x1, 488,0)
+
+inst_144:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x3, 0x4, 1b, x1, 492,0)
+
+inst_145:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555555; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x55555555, 0x556, 1b, x1, 496,0)
+
+inst_146:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555556; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, -0x55555556, 0x100, 3f, x1, 500,0)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x5, 0x6, 3f, x1, 504,0)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x33333333, 0x400, 3f, x1, 508,0)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666666; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x66666666, 0x80, 3f, x1, 512,0)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, -0xb504, 0x4, 1b, x1, 516,0)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0xb504, 0x4, 1b, x1, 520,0)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x2, 0x4, 1b, x1, 524,0)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555554; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x55555554, 0x6, 3f, x1, 528,0)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x0, 0x6, 1b, x1, 532,0)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x4, 0x6, 3f, x1, 536,0)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333332; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x33333332, 0x200, 3f, x1, 540,0)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666665; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x66666665, 0x6, 3f, x1, 544,0)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0xb503, 0x20, 3f, x1, 548,0)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555556; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x55555556, 0xa, 1b, x1, 552,0)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, -0x55555555, 0x2, 1b, x1, 556,0)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x6, 0x4, 3f, x1, 560,0)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x33333334, 0x2, 1b, x1, 564,0)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666667; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0x66666667, 0x40, 3f, x1, 568,0)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb503; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, -0xb503, 0x100, 3f, x1, 572,0)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555556, 0xb505, 0x8, 3f, x1, 576,0)
+
+inst_166:
+// rs1_val==5 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x3, 0x4, 3f, x1, 580,0)
+
+inst_167:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x55555555, 0x6, 1b, x1, 584,0)
+
+inst_168:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:-0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, -0x55555556, 0x8, 1b, x1, 588,0)
+
+inst_169:
+// rs1_val==5 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x5, 0x556, 1b, x1, 592,0)
+
+inst_170:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x33333333; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x33333333, 0x80, 3f, x1, 596,0)
+
+inst_171:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x66666666, 0x6, 1b, x1, 600,0)
+
+inst_172:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, -0xb504, 0x8, 3f, x1, 604,0)
+
+inst_173:
+// rs1_val==5 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0xb504, 0x8, 1b, x1, 608,0)
+
+inst_174:
+// rs1_val==5 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x2, 0x0, 3f, x1, 612,0)
+
+inst_175:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x55555554, 0x4, 3f, x1, 616,0)
+
+inst_176:
+// rs1_val==5 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x0, 0x80, 3f, x1, 620,0)
+
+inst_177:
+// rs1_val==5 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x4, 0x8, 1b, x1, 624,0)
+
+inst_178:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x33333332, 0x400, 3f, x1, 628,0)
+
+inst_179:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x66666665; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x66666665, 0x0, 1b, x1, 632,0)
+
+inst_180:
+// rs1_val==5 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0xb503; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0xb503, 0xa, 1b, x1, 636,0)
+
+inst_181:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x55555556; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x55555556, 0x10, 3f, x1, 640,0)
+
+inst_182:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:-0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, -0x55555555, 0x10, 3f, x1, 644,0)
+
+inst_183:
+// rs1_val==5 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x6, 0x8, 1b, x1, 648,0)
+
+inst_184:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x33333334; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x33333334, 0x6, 3f, x1, 652,0)
+
+inst_185:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x66666667; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x66666667, 0x10, 3f, x1, 656,0)
+
+inst_186:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:-0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, -0xb503, 0x400, 3f, x1, 660,0)
+
+inst_187:
+// rs1_val==5 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0xb505, 0x200, 3f, x1, 664,0)
+
+inst_188:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x3, 0x400, 1b, x1, 668,0)
+
+inst_189:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x55555555, 0x10, 3f, x1, 672,0)
+
+inst_190:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, -0x55555556, 0x0, 1b, x1, 676,0)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x5, 0x4, 1b, x1, 680,0)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333333; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x33333333, 0x10, 3f, x1, 684,0)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x66666666, 0x2, 3f, x1, 688,0)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, -0xb504, 0xa, 1b, x1, 692,0)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0xb504, 0x200, 3f, x1, 696,0)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555554; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x55555554, 0x556, 1b, x1, 700,0)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x0, 0x40, 3f, x1, 704,0)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x4, 0x2, 3f, x1, 708,0)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333332; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x33333332, 0x8, 3f, x1, 712,0)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666665; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x66666665, 0xa, 1b, x1, 716,0)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0xb503, 0x400, 3f, x1, 720,0)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x55555556, 0x400, 1b, x1, 724,0)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555555; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, -0x55555555, 0x100, 3f, x1, 728,0)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x6, 0x200, 3f, x1, 732,0)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333334; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x33333334, 0x200, 3f, x1, 736,0)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666667; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0x66666667, 0x400, 3f, x1, 740,0)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, -0xb503, 0x8, 1b, x1, 744,0)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333333, 0xb505, 0x8, 1b, x1, 748,0)
+
+inst_209:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x3, 0x0, 1b, x1, 752,0)
+
+inst_210:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x55555555, 0x4, 1b, x1, 756,0)
+
+inst_211:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, -0x55555556, 0x0, 1b, x1, 760,0)
+
+inst_212:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x5, 0x400, 1b, x1, 764,0)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333333; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x33333333, 0x2, 3f, x1, 768,0)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666666; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x66666666, 0xa, 1b, x1, 772,0)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, -0xb504, 0x6, 3f, x1, 776,0)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0xb504, 0x0, 1b, x1, 780,0)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x2, 0x6, 1b, x1, 784,0)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x55555554, 0x0, 1b, x1, 788,0)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x0, 0x6, 3f, x1, 792,0)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x4, 0x20, 3f, x1, 796,0)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333332; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x33333332, 0x200, 3f, x1, 800,0)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x66666665, 0x2, 3f, x1, 804,0)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0xb503, 0x8, 3f, x1, 808,0)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x55555556, 0x556, 1b, x1, 812,0)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, -0x55555555, 0x8, 3f, x1, 816,0)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x6, 0x8, 1b, x1, 820,0)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333334; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x33333334, 0x400, 3f, x1, 824,0)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666667; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0x66666667, 0x100, 3f, x1, 828,0)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, -0xb503, 0x20, 3f, x1, 832,0)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666666, 0xb505, 0x400, 3f, x1, 836,0)
+
+inst_231:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x3, 0x8, 3f, x1, 840,0)
+
+inst_232:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555555; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x55555555, 0x556, 1b, x1, 844,0)
+
+inst_233:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, -0x55555556, 0x200, 3f, x1, 848,0)
+
+inst_234:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x5, 0x6, 1b, x1, 852,0)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333333; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x33333333, 0xa, 1b, x1, 856,0)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666666; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x66666666, 0x0, 3f, x1, 860,0)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, -0xb504, 0x4, 3f, x1, 864,0)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0xb504, 0x2, 1b, x1, 868,0)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x2, 0x40, 3f, x1, 872,0)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555554; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x55555554, 0x80, 3f, x1, 876,0)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x0, 0x400, 1b, x1, 880,0)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x4, 0x8, 1b, x1, 884,0)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x33333332, 0x0, 1b, x1, 888,0)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666665; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x66666665, 0x100, 3f, x1, 892,0)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0xb503, 0x8, 3f, x1, 896,0)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x55555556, 0x6, 3f, x1, 900,0)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, -0x55555555, 0x0, 1b, x1, 904,0)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x6, 0x10, 3f, x1, 908,0)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x33333334, 0x4, 3f, x1, 912,0)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0x66666667, 0x4, 3f, x1, 916,0)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb503; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, -0xb503, 0xa, 1b, x1, 920,0)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb504, 0xb505, 0x400, 3f, x1, 924,0)
+
+inst_253:
+// rs1_val==46340 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x3, 0x200, 3f, x1, 928,0)
+
+inst_254:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x55555555, 0x20, 3f, x1, 932,0)
+
+inst_255:
+// rs1_val==46340 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x5, 0x6, 3f, x1, 936,0)
+
+inst_256:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333333; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x33333333, 0xa, 1b, x1, 940,0)
+
+inst_257:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666666; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x66666666, 0x100, 3f, x1, 944,0)
+
+inst_258:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:-0xb504; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, -0xb504, 0x556, 1b, x1, 948,0)
+
+inst_259:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0xb504, 0x6, 3f, x1, 952,0)
+
+inst_260:
+// rs1_val==46340 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x2, 0x0, 3f, x1, 956,0)
+
+inst_261:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x55555554, 0x2, 1b, x1, 960,0)
+
+inst_262:
+// rs1_val==46340 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x0, 0x4, 1b, x1, 964,0)
+
+inst_263:
+// rs1_val==46340 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x4, 0x6, 3f, x1, 968,0)
+
+inst_264:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x33333332, 0x6, 1b, x1, 972,0)
+
+inst_265:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666665; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x66666665, 0x10, 3f, x1, 976,0)
+
+inst_266:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0xb503, 0x8, 1b, x1, 980,0)
+
+inst_267:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x55555556, 0x0, 3f, x1, 984,0)
+
+inst_268:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, -0x55555555, 0x20, 3f, x1, 988,0)
+
+inst_269:
+// rs1_val==46340 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x6, 0x400, 3f, x1, 992,0)
+
+inst_270:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333334; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x33333334, 0x100, 3f, x1, 996,0)
+
+inst_271:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666667; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0x66666667, 0x10, 3f, x1, 1000,0)
+
+inst_272:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, -0xb503, 0x6, 3f, x1, 1004,0)
+
+inst_273:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb504, 0xb505, 0x8, 3f, x1, 1008,0)
+
+inst_274:
+// rs1_val==2 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x3, 0x80, 3f, x1, 1012,0)
+
+inst_275:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x55555555, 0x40, 3f, x1, 1016,0)
+
+inst_276:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:-0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, -0x55555556, 0x400, 1b, x1, 1020,0)
+
+inst_277:
+// rs1_val==2 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x5, 0x400, 1b, x1, 1024,0)
+
+inst_278:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x33333333; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x33333333, 0xa, 1b, x1, 1028,0)
+
+inst_279:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x66666666, 0x400, 1b, x1, 1032,0)
+
+inst_280:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:-0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, -0xb504, 0x6, 3f, x1, 1036,0)
+
+inst_281:
+// rs1_val==2 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0xb504; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0xb504, 0x556, 1b, x1, 1040,0)
+
+inst_282:
+// rs1_val==2 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x2, 0x8, 3f, x1, 1044,0)
+
+inst_283:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x55555554, 0x0, 3f, x1, 1048,0)
+
+inst_284:
+// rs1_val==2 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x0, 0x100, 3f, x1, 1052,0)
+
+inst_285:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x33333332; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x33333332, 0x4, 3f, x1, 1056,0)
+
+inst_286:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x66666665; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x66666665, 0x8, 1b, x1, 1060,0)
+
+inst_287:
+// rs1_val==2 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0xb503, 0x20, 3f, x1, 1064,0)
+
+inst_288:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x55555556; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x55555556, 0x40, 3f, x1, 1068,0)
+
+inst_289:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:-0x55555555; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, -0x55555555, 0x200, 3f, x1, 1072,0)
+
+inst_290:
+// rs1_val==2 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x6; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x6, 0x40, 3f, x1, 1076,0)
+
+inst_291:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x33333334; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x33333334, 0x400, 1b, x1, 1080,0)
+
+inst_292:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0x66666667, 0x4, 1b, x1, 1084,0)
+
+inst_293:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:-0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, -0xb503, 0x8, 3f, x1, 1088,0)
+
+inst_294:
+// rs1_val==2 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x2, 0xb505, 0x8, 3f, x1, 1092,0)
+
+inst_295:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x3, 0x4, 1b, x1, 1096,0)
+
+inst_296:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x55555555, 0x2, 1b, x1, 1100,0)
+
+inst_297:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, -0x55555556, 0x0, 3f, x1, 1104,0)
+
+inst_298:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x5, 0x6, 3f, x1, 1108,0)
+
+inst_299:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333333; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x33333333, 0x2, 1b, x1, 1112,0)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x66666666, 0x2, 1b, x1, 1116,0)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, -0xb504, 0x400, 1b, x1, 1120,0)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb504; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0xb504, 0x100, 3f, x1, 1124,0)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x2; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x2, 0x80, 3f, x1, 1128,0)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555554; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x55555554, 0x80, 3f, x1, 1132,0)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x0, 0x2, 3f, x1, 1136,0)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x4, 0x8, 1b, x1, 1140,0)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x33333332, 0x6, 3f, x1, 1144,0)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666665; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x66666665, 0x20, 3f, x1, 1148,0)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0xb503, 0x2, 1b, x1, 1152,0)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x55555556, 0x4, 1b, x1, 1156,0)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555555; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, -0x55555555, 0x100, 3f, x1, 1160,0)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x6, 0x200, 3f, x1, 1164,0)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333334; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x33333334, 0x400, 3f, x1, 1168,0)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666667; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0x66666667, 0x0, 1b, x1, 1172,0)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, -0xb503, 0x0, 1b, x1, 1176,0)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb505; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555554, 0xb505, 0x40, 3f, x1, 1180,0)
+
+inst_317:
+// rs1_val==0 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x3, 0x4, 3f, x1, 1184,0)
+
+inst_318:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x55555555, 0x6, 3f, x1, 1188,0)
+
+inst_319:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:-0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, -0x55555556, 0x400, 3f, x1, 1192,0)
+
+inst_320:
+// rs1_val==0 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x5, 0x40, 3f, x1, 1196,0)
+
+inst_321:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x33333333; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x33333333, 0x40, 3f, x1, 1200,0)
+
+inst_322:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x66666666, 0x2, 1b, x1, 1204,0)
+
+inst_323:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:-0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, -0xb504, 0x0, 3f, x1, 1208,0)
+
+inst_324:
+// rs1_val==0 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0xb504, 0x6, 1b, x1, 1212,0)
+
+inst_325:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333334; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x33333334, 0x556, 1b, x1, 1216,0)
+
+inst_326:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666667; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x66666667, 0x2, 3f, x1, 1220,0)
+
+inst_327:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb503; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, -0xb503, 0x200, 3f, x1, 1224,0)
+
+inst_328:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0xb505, 0x200, 3f, x1, 1228,0)
+
+inst_329:
+// rs1_val==6 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x3, 0x400, 3f, x1, 1232,0)
+
+inst_330:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x55555555; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x55555555, 0x556, 1b, x1, 1236,0)
+
+inst_331:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:-0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, -0x55555556, 0x6, 1b, x1, 1240,0)
+
+inst_332:
+// rs1_val==6 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x5, 0x400, 1b, x1, 1244,0)
+
+inst_333:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x33333333, 0x4, 3f, x1, 1248,0)
+
+inst_334:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x66666666, 0x400, 1b, x1, 1252,0)
+
+inst_335:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:-0xb504; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, -0xb504, 0x80, 3f, x1, 1256,0)
+
+inst_336:
+// rs1_val==6 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0xb504; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0xb504, 0x40, 3f, x1, 1260,0)
+
+inst_337:
+// rs1_val==6 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x2, 0x8, 3f, x1, 1264,0)
+
+inst_338:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x55555554; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x55555554, 0x200, 3f, x1, 1268,0)
+
+inst_339:
+// rs1_val==6 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x0, 0x6, 1b, x1, 1272,0)
+
+inst_340:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x33333332; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x33333332, 0xa, 1b, x1, 1276,0)
+
+inst_341:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x66666665; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x66666665, 0x4, 3f, x1, 1280,0)
+
+inst_342:
+// rs1_val==6 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0xb503; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0xb503, 0x200, 3f, x1, 1284,0)
+
+inst_343:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x55555556, 0x6, 1b, x1, 1288,0)
+
+inst_344:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, -0x55555555, 0x8, 3f, x1, 1292,0)
+
+inst_345:
+// rs1_val==6 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x6, 0x10, 3f, x1, 1296,0)
+
+inst_346:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x33333334; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x33333334, 0x20, 3f, x1, 1300,0)
+
+inst_347:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x66666667; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0x66666667, 0x40, 3f, x1, 1304,0)
+
+inst_348:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:-0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, -0xb503, 0x0, 1b, x1, 1308,0)
+
+inst_349:
+// rs1_val==6 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x6, 0xb505, 0x6, 3f, x1, 1312,0)
+
+inst_350:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x3, 0x2, 3f, x1, 1316,0)
+
+inst_351:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x55555555, 0x400, 1b, x1, 1320,0)
+
+inst_352:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, -0x55555556, 0x4, 1b, x1, 1324,0)
+
+inst_353:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x5, 0x2, 1b, x1, 1328,0)
+
+inst_354:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333333; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x33333333, 0x20, 3f, x1, 1332,0)
+
+inst_355:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666666; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x66666666, 0x200, 3f, x1, 1336,0)
+
+inst_356:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, -0xb504, 0x8, 1b, x1, 1340,0)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0xb504, 0x2, 1b, x1, 1344,0)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x2, 0x2, 1b, x1, 1348,0)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x55555554, 0x4, 1b, x1, 1352,0)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x0; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x0, 0x20, 3f, x1, 1356,0)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x4, 0x8, 3f, x1, 1360,0)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x33333332, 0x0, 3f, x1, 1364,0)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x66666665, 0x2, 1b, x1, 1368,0)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0xb503, 0x4, 1b, x1, 1372,0)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x55555556, 0x0, 3f, x1, 1376,0)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, -0x55555555, 0x8, 3f, x1, 1380,0)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x6, 0x2, 1b, x1, 1384,0)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x33333334, 0x4, 3f, x1, 1388,0)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0x66666667, 0x8, 1b, x1, 1392,0)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, -0xb503, 0x400, 3f, x1, 1396,0)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333334, 0xb505, 0x400, 1b, x1, 1400,0)
+
+inst_372:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x3, 0x200, 3f, x1, 1404,0)
+
+inst_373:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x55555555, 0x4, 1b, x1, 1408,0)
+
+inst_374:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, -0x55555556, 0x2, 1b, x1, 1412,0)
+
+inst_375:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x5, 0x6, 3f, x1, 1416,0)
+
+inst_376:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333333; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x33333333, 0x6, 1b, x1, 1420,0)
+
+inst_377:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x66666666, 0x6, 1b, x1, 1424,0)
+
+inst_378:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, -0xb504, 0x0, 3f, x1, 1428,0)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb504; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0xb504, 0x100, 3f, x1, 1432,0)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x2; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x2, 0x80, 3f, x1, 1436,0)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x55555554, 0x4, 3f, x1, 1440,0)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x0; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x0, 0x20, 3f, x1, 1444,0)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x4, 0x400, 1b, x1, 1448,0)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x33333332, 0x0, 1b, x1, 1452,0)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x66666665, 0x400, 3f, x1, 1456,0)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0xb503, 0x2, 1b, x1, 1460,0)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555556; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x55555556, 0x100, 3f, x1, 1464,0)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555555; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, -0x55555555, 0x200, 3f, x1, 1468,0)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x6, 0x4, 3f, x1, 1472,0)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333334; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x33333334, 0x20, 3f, x1, 1476,0)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666667; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0x66666667, 0x2, 1b, x1, 1480,0)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, -0xb503, 0x8, 1b, x1, 1484,0)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb505; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666667, 0xb505, 0x2, 3f, x1, 1488,0)
+
+inst_394:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x3, 0x8, 3f, x1, 1492,0)
+
+inst_395:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x55555555, 0x20, 3f, x1, 1496,0)
+
+inst_396:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, -0x55555556, 0x2, 3f, x1, 1500,0)
+
+inst_397:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x5, 0x6, 1b, x1, 1504,0)
+
+inst_398:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333333; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x33333333, 0x40, 3f, x1, 1508,0)
+
+inst_399:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x66666666, 0x6, 1b, x1, 1512,0)
+
+inst_400:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, -0xb504, 0x2, 3f, x1, 1516,0)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0xb504, 0x4, 1b, x1, 1520,0)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x2, 0x40, 3f, x1, 1524,0)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x55555554, 0x4, 3f, x1, 1528,0)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x0, 0x6, 3f, x1, 1532,0)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x4, 0x40, 3f, x1, 1536,0)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x33333332, 0x400, 3f, x1, 1540,0)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x66666665, 0x400, 3f, x1, 1544,0)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0xb503, 0x0, 3f, x1, 1548,0)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x55555556, 0x2, 1b, x1, 1552,0)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, -0x55555555, 0x8, 3f, x1, 1556,0)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x6, 0x6, 1b, x1, 1560,0)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333334; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x33333334, 0x80, 3f, x1, 1564,0)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666667; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0x66666667, 0x80, 3f, x1, 1568,0)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb503; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, -0xb503, 0xa, 1b, x1, 1572,0)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb503; op2val:0xb505; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0xb503, 0xb505, 0x100, 3f, x1, 1576,0)
+
+inst_416:
+// rs1_val==46341 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x3, 0x8, 1b, x1, 1580,0)
+
+inst_417:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x55555555, 0x0, 1b, x1, 1584,0)
+
+inst_418:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, -0x55555556, 0x556, 1b, x1, 1588,0)
+
+inst_419:
+// rs1_val==46341 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x5, 0x80, 3f, x1, 1592,0)
+
+inst_420:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x33333333, 0x4, 1b, x1, 1596,0)
+
+inst_421:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x66666666, 0x400, 3f, x1, 1600,0)
+
+inst_422:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:-0xb504; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, -0xb504, 0x10, 3f, x1, 1604,0)
+
+inst_423:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0xb504, 0xa, 1b, x1, 1608,0)
+
+inst_424:
+// rs1_val==46341 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x2, 0x2, 1b, x1, 1612,0)
+
+inst_425:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555554; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x55555554, 0x8, 3f, x1, 1616,0)
+
+inst_426:
+// rs1_val==46341 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x0, 0x4, 3f, x1, 1620,0)
+
+inst_427:
+// rs1_val==46341 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x4, 0x4, 3f, x1, 1624,0)
+
+inst_428:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333332; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x33333332, 0x8, 1b, x1, 1628,0)
+
+inst_429:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666665; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x66666665, 0x556, 1b, x1, 1632,0)
+
+inst_430:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0xb503, 0x0, 3f, x1, 1636,0)
+
+inst_431:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x55555556, 0x200, 3f, x1, 1640,0)
+
+inst_432:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, -0x55555555, 0x10, 3f, x1, 1644,0)
+
+inst_433:
+// rs1_val==46341 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x6, 0x4, 3f, x1, 1648,0)
+
+inst_434:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x33333334, 0x8, 3f, x1, 1652,0)
+
+inst_435:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666667; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0x66666667, 0x6, 3f, x1, 1656,0)
+
+inst_436:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:-0xb503; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, -0xb503, 0x100, 3f, x1, 1660,0)
+
+inst_437:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb505; op2val:0xb505; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb505, 0xb505, 0x4, 3f, x1, 1664,0)
+
+inst_438:
+// rs1_val==0 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x2, 0x400, 3f, x1, 1668,0)
+
+inst_439:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x55555554, 0x2, 3f, x1, 1672,0)
+
+inst_440:
+// rs1_val==0 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x0, 0x400, 3f, x1, 1676,0)
+
+inst_441:
+// rs1_val==0 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x4, 0x556, 1b, x1, 1680,0)
+
+inst_442:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x33333332, 0x2, 1b, x1, 1684,0)
+
+inst_443:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x66666665; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x66666665, 0x10, 3f, x1, 1688,0)
+
+inst_444:
+// rs1_val==0 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0xb503, 0x2, 3f, x1, 1692,0)
+
+inst_445:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x55555556, 0x400, 3f, x1, 1696,0)
+
+inst_446:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:-0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, -0x55555555, 0x0, 1b, x1, 1700,0)
+
+inst_447:
+// rs1_val==0 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x6, 0x10, 3f, x1, 1704,0)
+
+inst_448:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x33333334; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x33333334, 0x400, 1b, x1, 1708,0)
+
+inst_449:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0x66666667, 0x8, 1b, x1, 1712,0)
+
+inst_450:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:-0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, -0xb503, 0x400, 3f, x1, 1716,0)
+
+inst_451:
+// rs1_val==0 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0xb505; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x0, 0xb505, 0x0, 1b, x1, 1720,0)
+
+inst_452:
+// rs1_val==4 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x3, 0x8, 1b, x1, 1724,0)
+
+inst_453:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x55555555, 0x400, 1b, x1, 1728,0)
+
+inst_454:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:-0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, -0x55555556, 0x80, 3f, x1, 1732,0)
+
+inst_455:
+// rs1_val==4 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x5, 0x40, 3f, x1, 1736,0)
+
+inst_456:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x33333333; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x33333333, 0x200, 3f, x1, 1740,0)
+
+inst_457:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x66666666, 0x2, 3f, x1, 1744,0)
+
+inst_458:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:-0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, -0xb504, 0x200, 3f, x1, 1748,0)
+
+inst_459:
+// rs1_val==4 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0xb504, 0xa, 1b, x1, 1752,0)
+
+inst_460:
+// rs1_val==4 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x2, 0x8, 1b, x1, 1756,0)
+
+inst_461:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x55555554, 0x0, 1b, x1, 1760,0)
+
+inst_462:
+// rs1_val==4 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x0, 0x40, 3f, x1, 1764,0)
+
+inst_463:
+// rs1_val==4 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x4, 0x400, 1b, x1, 1768,0)
+
+inst_464:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x33333332, 0x400, 1b, x1, 1772,0)
+
+inst_465:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x66666665, 0x400, 1b, x1, 1776,0)
+
+inst_466:
+// rs1_val==4 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0xb503, 0x2, 1b, x1, 1780,0)
+
+inst_467:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x55555556, 0x0, 3f, x1, 1784,0)
+
+inst_468:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:-0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, -0x55555555, 0x6, 1b, x1, 1788,0)
+
+inst_469:
+// rs1_val==4 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x6, 0x10, 3f, x1, 1792,0)
+
+inst_470:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x33333334; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x33333334, 0x556, 1b, x1, 1796,0)
+
+inst_471:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x66666667; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0x66666667, 0x2, 1b, x1, 1800,0)
+
+inst_472:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:-0xb503; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, -0xb503, 0x10, 3f, x1, 1804,0)
+
+inst_473:
+// rs1_val==4 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x4, 0xb505, 0x200, 3f, x1, 1808,0)
+
+inst_474:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x3, 0x200, 3f, x1, 1812,0)
+
+inst_475:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x55555555, 0x0, 3f, x1, 1816,0)
+
+inst_476:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, -0x55555556, 0x556, 1b, x1, 1820,0)
+
+inst_477:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x5, 0x8, 1b, x1, 1824,0)
+
+inst_478:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333333; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x33333333, 0x40, 3f, x1, 1828,0)
+
+inst_479:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666666; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x66666666, 0x4, 3f, x1, 1832,0)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, -0xb504, 0x200, 3f, x1, 1836,0)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb504; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0xb504, 0x40, 3f, x1, 1840,0)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x2, 0x10, 3f, x1, 1844,0)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555554; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x55555554, 0x556, 1b, x1, 1848,0)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x0, 0x8, 1b, x1, 1852,0)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x4, 0x556, 1b, x1, 1856,0)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333332; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x33333332, 0x8, 3f, x1, 1860,0)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666665; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x66666665, 0x200, 3f, x1, 1864,0)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0xb503, 0x0, 1b, x1, 1868,0)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555556; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x55555556, 0x10, 3f, x1, 1872,0)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, -0x55555555, 0x6, 3f, x1, 1876,0)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x6, 0x100, 3f, x1, 1880,0)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333334; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x33333334, 0x200, 3f, x1, 1884,0)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666667; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0x66666667, 0x10, 3f, x1, 1888,0)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, -0xb503, 0x8, 1b, x1, 1892,0)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x33333332, 0xb505, 0x8, 1b, x1, 1896,0)
+
+inst_496:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x3, 0x0, 3f, x1, 1900,0)
+
+inst_497:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x55555555, 0x0, 3f, x1, 1904,0)
+
+inst_498:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, -0x55555556, 0x80, 3f, x1, 1908,0)
+
+inst_499:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x5, 0x0, 1b, x1, 1912,0)
+
+inst_500:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333333; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x33333333, 0x0, 1b, x1, 1916,0)
+
+inst_501:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666666; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x66666666, 0xa, 1b, x1, 1920,0)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb504; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, -0xb504, 0x80, 3f, x1, 1924,0)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0xb504, 0x400, 1b, x1, 1928,0)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x2, 0x100, 3f, x1, 1932,0)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555554; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x55555554, 0x400, 1b, x1, 1936,0)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x0, 0x40, 3f, x1, 1940,0)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x4, 0x8, 1b, x1, 1944,0)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333332; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x33333332, 0x20, 3f, x1, 1948,0)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x66666665, 0x400, 1b, x1, 1952,0)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0xb503, 0x8, 3f, x1, 1956,0)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x55555556, 0x80, 3f, x1, 1960,0)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, -0x55555555, 0x0, 3f, x1, 1964,0)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x6, 0x0, 1b, x1, 1968,0)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x33333334, 0x8, 3f, x1, 1972,0)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666667; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0x66666667, 0x400, 1b, x1, 1976,0)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, -0xb503, 0x0, 1b, x1, 1980,0)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x66666665, 0xb505, 0x200, 3f, x1, 1984,0)
+
+inst_518:
+// rs1_val==46339 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x3, 0xa, 1b, x1, 1988,0)
+
+inst_519:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x55555555, 0x6, 1b, x1, 1992,0)
+
+inst_520:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, -0x55555556, 0x4, 1b, x1, 1996,0)
+
+inst_521:
+// rs1_val==46339 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x5, 0x40, 3f, x1, 2000,0)
+
+inst_522:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333333; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x33333333, 0x100, 3f, x1, 2004,0)
+
+inst_523:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x66666666, 0x2, 1b, x1, 2008,0)
+
+inst_524:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:-0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, -0xb504, 0x4, 3f, x1, 2012,0)
+
+inst_525:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0xb504, 0x400, 1b, x1, 2016,0)
+
+inst_526:
+// rs1_val==46339 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x2, 0x4, 3f, x1, 2020,0)
+
+inst_527:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555554; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x55555554, 0x8, 3f, x1, 2024,0)
+
+inst_528:
+// rs1_val==46339 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x0, 0xa, 1b, x1, 2028,0)
+
+inst_529:
+// rs1_val==46339 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x4; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x4, 0x100, 3f, x1, 2032,0)
+
+inst_530:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x33333332, 0x2, 1b, x1, 2036,0)
+
+inst_531:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666665; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x66666665, 0x6, 3f, x1, 2040,0)
+
+inst_532:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0xb503, 0x0, 1b, x1, 2044,0)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_533:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x55555556, 0x2, 1b, x1, 0,0)
+
+inst_534:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, -0x55555555, 0x8, 3f, x1, 4,0)
+
+inst_535:
+// rs1_val==46339 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x6, 0x8, 1b, x1, 8,0)
+
+inst_536:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333334; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x33333334, 0x40, 3f, x1, 12,0)
+
+inst_537:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666667; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0x66666667, 0x0, 3f, x1, 16,0)
+
+inst_538:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:-0xb503; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, -0xb503, 0x100, 3f, x1, 20,0)
+
+inst_539:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb503; op2val:0xb505; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0xb503, 0xb505, 0x0, 1b, x1, 24,0)
+
+inst_540:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x3, 0x2, 1b, x1, 28,0)
+
+inst_541:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x55555555, 0x6, 3f, x1, 32,0)
+
+inst_542:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, -0x55555556, 0x2, 1b, x1, 36,0)
+
+inst_543:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x5, 0x6, 1b, x1, 40,0)
+
+inst_544:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333333; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x33333333, 0x556, 1b, x1, 44,0)
+
+inst_545:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x66666666, 0x400, 1b, x1, 48,0)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, -0xb504, 0x0, 3f, x1, 52,0)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb504; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0xb504, 0x100, 3f, x1, 56,0)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x2, 0x4, 3f, x1, 60,0)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x55555554, 0x4, 3f, x1, 64,0)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x0, 0xa, 1b, x1, 68,0)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x4, 0x6, 1b, x1, 72,0)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333332; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x33333332, 0x8, 1b, x1, 76,0)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666665; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x66666665, 0x4, 3f, x1, 80,0)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0xb503, 0x6, 1b, x1, 84,0)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x55555556, 0x556, 1b, x1, 88,0)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, -0x55555555, 0x0, 1b, x1, 92,0)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x6, 0x400, 3f, x1, 96,0)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333334; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x33333334, 0x400, 1b, x1, 100,0)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666667; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0x66666667, 0x556, 1b, x1, 104,0)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb503; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, -0xb503, 0x200, 3f, x1, 108,0)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb505; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555556, 0xb505, 0x20, 3f, x1, 112,0)
+
+inst_562:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x3, 0x4, 3f, x1, 116,0)
+
+inst_563:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555555; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x55555555, 0xa, 1b, x1, 120,0)
+
+inst_564:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555556; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, -0x55555556, 0x20, 3f, x1, 124,0)
+
+inst_565:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x5; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x5, 0x200, 3f, x1, 128,0)
+
+inst_566:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333333; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x33333333, 0x40, 3f, x1, 132,0)
+
+inst_567:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x66666666, 0x6, 3f, x1, 136,0)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, -0xb504, 0x2, 3f, x1, 140,0)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb504; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0xb504, 0x100, 3f, x1, 144,0)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x2, 0x0, 1b, x1, 148,0)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555554; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x55555554, 0x200, 3f, x1, 152,0)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x0, 0x4, 1b, x1, 156,0)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x4, 0x6, 3f, x1, 160,0)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x33333332, 0x400, 3f, x1, 164,0)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666665; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x66666665, 0x40, 3f, x1, 168,0)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb503; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0xb503, 0x10, 3f, x1, 172,0)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x55555556, 0x400, 1b, x1, 176,0)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, -0x55555555, 0x40, 3f, x1, 180,0)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x6; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, -0x55555555, 0x6, 0x40, 3f, x1, 184,0)
+
+inst_580:
+// rs1_val > 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val == 1431655765, rs2_val == 262144, rs1_val > rs2_val and imm_val < 0 and imm_val & 0x03 == 0
+// opcode: beq, op1:x10; op2:x11; op1val:0x55555555; op2val:0x40000; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x55555555, 0x40000, 0x400, 1b, x1, 188,0)
+
+inst_581:
+// rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs1_val == 536870912, rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0
+// opcode: beq, op1:x10; op2:x11; op1val:0x20000000; op2val:-0xb504; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x20000000, -0xb504, 0x20, 3f, x1, 192,0)
+
+inst_582:
+// rs2_val == 32768, rs1_val == 1048576
+// opcode: beq, op1:x10; op2:x11; op1val:0x100000; op2val:0x8000; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x100000, 0x8000, 0x100, 3f, x1, 196,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x5_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_1:
+ .fill 21*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 50*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/bge-01.S b/riscof/suite/rv32i_m/I/bge-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..37fff978939358fed007a7885469b79435d03454
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/bge-01.S
@@ -0,0 +1,3029 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the bge instruction of the RISC-V I extension for the bge covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",bge)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 == rs2, rs1==x27, rs2==x27, rs1_val > 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs2_val == 4, rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs1_val == 65536
+// opcode: bge, op1:x27; op2:x27; op1val:0x10000; op2val:0x10000; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x3, x27, x27, 0x10000, 0x10000, 0x200, 3f, x1, 0,0)
+
+inst_1:
+// rs1 != rs2, rs1==x13, rs2==x5, rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs2_val == -8388609, rs1_val == 2
+// opcode: bge, op1:x13; op2:x5; op1val:0x2; op2val:-0x800001; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x3, x13, x5, 0x2, -0x800001, 0x80, 3f, x1, 4,0)
+
+inst_2:
+// rs1==x7, rs2==x20, rs1_val < 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs1_val == -2
+// opcode: bge, op1:x7; op2:x20; op1val:-0x2; op2val:-0xa; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x3, x7, x20, -0x2, -0xa, 0x8, 3f, x1, 8,0)
+
+inst_3:
+// rs1==x23, rs2==x14, rs1_val < 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val < rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == 2, rs1_val == -134217729
+// opcode: bge, op1:x23; op2:x14; op1val:-0x8000001; op2val:0x2; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x3, x23, x14, -0x8000001, 0x2, 0x20, 3f, x1, 12,0)
+
+inst_4:
+// rs1==x22, rs2==x15, rs1_val == rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == -5, rs1_val == -5
+// opcode: bge, op1:x22; op2:x15; op1val:-0x5; op2val:-0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x3, x22, x15, -0x5, -0x5, 0x8, 3f, x1, 16,0)
+
+inst_5:
+// rs1==x15, rs2==x26, rs1_val == rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs1_val==1717986919 and rs2_val==1717986919
+// opcode: bge, op1:x15; op2:x26; op1val:0x66666667; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x3, x15, x26, 0x66666667, 0x66666667, 0x8, 1b, x1, 20,0)
+
+inst_6:
+// rs1==x14, rs2==x24, rs1_val > rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs2_val == -33554433
+// opcode: bge, op1:x14; op2:x24; op1val:-0x8; op2val:-0x2000001; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x3, x14, x24, -0x8, -0x2000001, 0x400, 1b, x1, 24,0)
+
+inst_7:
+// rs1==x29, rs2==x17, rs1_val < rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs2_val == 65536
+// opcode: bge, op1:x29; op2:x17; op1val:-0xb504; op2val:0x10000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x3, x29, x17, -0xb504, 0x10000, 0x400, 1b, x1, 28,0)
+
+inst_8:
+// rs1==x11, rs2==x19, rs2_val == 1, rs1_val == 128
+// opcode: bge, op1:x11; op2:x19; op1val:0x80; op2val:0x1; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x3, x11, x19, 0x80, 0x1, 0x6, 3f, x1, 32,0)
+
+inst_9:
+// rs1==x6, rs2==x18, rs2_val == 8, rs1_val == 4194304
+// opcode: bge, op1:x6; op2:x18; op1val:0x400000; op2val:0x8; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x3, x6, x18, 0x400000, 0x8, 0x4, 3f, x1, 36,0)
+
+inst_10:
+// rs1==x28, rs2==x8, rs2_val == 16,
+// opcode: bge, op1:x28; op2:x8; op1val:-0x1; op2val:0x10; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x3, x28, x8, -0x1, 0x10, 0x400, 3f, x1, 40,0)
+
+inst_11:
+// rs1==x20, rs2==x29, rs2_val == 32, rs1_val == 64
+// opcode: bge, op1:x20; op2:x29; op1val:0x40; op2val:0x20; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x3, x20, x29, 0x40, 0x20, 0x10, 3f, x1, 44,0)
+
+inst_12:
+// rs1==x24, rs2==x4, rs2_val == 64, rs1_val == -1048577
+// opcode: bge, op1:x24; op2:x4; op1val:-0x100001; op2val:0x40; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x3, x24, x4, -0x100001, 0x40, 0x0, 3f, x1, 48,0)
+
+inst_13:
+// rs1==x12, rs2==x10, rs2_val == 128,
+// opcode: bge, op1:x12; op2:x10; op1val:0x33333333; op2val:0x80; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x3, x12, x10, 0x33333333, 0x80, 0x2, 1b, x1, 52,0)
+
+inst_14:
+// rs1==x4, rs2==x12, rs2_val == 256,
+// opcode: bge, op1:x4; op2:x12; op1val:0x80; op2val:0x100; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x3, x4, x12, 0x80, 0x100, 0x556, 1b, x1, 56,0)
+
+inst_15:
+// rs1==x2, rs2==x0, rs2_val == 512,
+// opcode: bge, op1:x2; op2:x0; op1val:0x0; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x3, x2, x0, 0x0, 0x0, 0xa, 1b, x1, 60,0)
+
+inst_16:
+// rs1==x9, rs2==x22, rs2_val == 1024, rs1_val == 8
+// opcode: bge, op1:x9; op2:x22; op1val:0x8; op2val:0x400; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x3, x9, x22, 0x8, 0x400, 0x6, 1b, x1, 64,0)
+
+inst_17:
+// rs1==x17, rs2==x31, rs2_val == 2048,
+// opcode: bge, op1:x17; op2:x31; op1val:0x0; op2val:0x800; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x3, x17, x31, 0x0, 0x800, 0x2, 1b, x1, 68,0)
+
+inst_18:
+// rs1==x10, rs2==x30, rs2_val == 4096, rs1_val == -1431655766
+// opcode: bge, op1:x10; op2:x30; op1val:-0x55555556; op2val:0x1000; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x3, x10, x30, -0x55555556, 0x1000, 0x20, 3f, x1, 72,0)
+
+inst_19:
+// rs1==x25, rs2==x11, rs2_val == 8192,
+// opcode: bge, op1:x25; op2:x11; op1val:0x66666665; op2val:0x2000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x3, x25, x11, 0x66666665, 0x2000, 0x4, 3f, x1, 76,0)
+
+inst_20:
+// rs1==x21, rs2==x13, rs2_val == 16384,
+// opcode: bge, op1:x21; op2:x13; op1val:0x5; op2val:0x4000; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x21, x13, 0x5, 0x4000, 0x100, 3f, x1, 80,0)
+RVTEST_SIGBASE( x4,signature_x4_0)
+
+inst_21:
+// rs1==x8, rs2==x16, rs2_val == 32768, rs1_val == 524288
+// opcode: bge, op1:x8; op2:x16; op1val:0x80000; op2val:0x8000; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x8, x16, 0x80000, 0x8000, 0x200, 3f, x4, 0,0)
+
+inst_22:
+// rs1==x18, rs2==x1, rs2_val == 131072,
+// opcode: bge, op1:x18; op2:x1; op1val:0x0; op2val:0x20000; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x18, x1, 0x0, 0x20000, 0x0, 3f, x4, 4,0)
+
+inst_23:
+// rs1==x16, rs2==x9, rs2_val == 262144,
+// opcode: bge, op1:x16; op2:x9; op1val:0x8; op2val:0x40000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x16, x9, 0x8, 0x40000, 0x400, 1b, x4, 8,0)
+
+inst_24:
+// rs1==x5, rs2==x2, rs2_val == 524288,
+// opcode: bge, op1:x5; op2:x2; op1val:-0x8000001; op2val:0x80000; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x5, x2, -0x8000001, 0x80000, 0x0, 1b, x4, 12,0)
+
+inst_25:
+// rs1==x26, rs2==x21, rs2_val == 1048576, rs1_val == -262145
+// opcode: bge, op1:x26; op2:x21; op1val:-0x40001; op2val:0x100000; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x26, x21, -0x40001, 0x100000, 0x20, 3f, x4, 16,0)
+
+inst_26:
+// rs1==x30, rs2==x7, rs2_val == 2097152,
+// opcode: bge, op1:x30; op2:x7; op1val:-0x1; op2val:0x200000; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x30, x7, -0x1, 0x200000, 0x100, 3f, x4, 20,0)
+
+inst_27:
+// rs1==x0, rs2==x6, rs2_val == 4194304, rs1_val == -4194305
+// opcode: bge, op1:x0; op2:x6; op1val:0x0; op2val:0x400000; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x0, x6, 0x0, 0x400000, 0x40, 3f, x4, 24,0)
+
+inst_28:
+// rs1==x3, rs2==x23, rs2_val == 8388608, rs1_val == -8193
+// opcode: bge, op1:x3; op2:x23; op1val:-0x2001; op2val:0x800000; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x3, x23, -0x2001, 0x800000, 0xa, 1b, x4, 28,0)
+
+inst_29:
+// rs1==x1, rs2==x25, rs2_val == 16777216,
+// opcode: bge, op1:x1; op2:x25; op1val:0xb505; op2val:0x1000000; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x1, x25, 0xb505, 0x1000000, 0x20, 3f, x4, 32,0)
+
+inst_30:
+// rs1==x19, rs2==x28, rs2_val == 33554432,
+// opcode: bge, op1:x19; op2:x28; op1val:-0x8; op2val:0x2000000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x19, x28, -0x8, 0x2000000, 0x400, 3f, x4, 36,0)
+
+inst_31:
+// rs1==x31, rs2==x3, rs2_val == 67108864,
+// opcode: bge, op1:x31; op2:x3; op1val:0x0; op2val:0x4000000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x31, x3, 0x0, 0x4000000, 0x400, 3f, x4, 40,0)
+
+inst_32:
+// rs2_val == 134217728,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x8000000; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x8000000, 0x2, 1b, x4, 44,0)
+
+inst_33:
+// rs2_val == 268435456, rs1_val == -524289
+// opcode: bge, op1:x10; op2:x11; op1val:-0x80001; op2val:0x10000000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x80001, 0x10000000, 0x400, 3f, x4, 48,0)
+
+inst_34:
+// rs2_val == 536870912, rs1_val == -4097
+// opcode: bge, op1:x10; op2:x11; op1val:-0x1001; op2val:0x20000000; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x1001, 0x20000000, 0xa, 1b, x4, 52,0)
+
+inst_35:
+// rs2_val == 1073741824,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x40000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x40000000, 0x4, 1b, x4, 56,0)
+
+inst_36:
+// rs2_val == -2147483648,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x6; op2val:-0x80000000; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x6, -0x80000000, 0x100, 3f, x4, 60,0)
+
+inst_37:
+// rs2_val == -2, rs1_val == 262144
+// opcode: bge, op1:x10; op2:x11; op1val:0x40000; op2val:-0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x40000, -0x2, 0x4, 1b, x4, 64,0)
+
+inst_38:
+// rs2_val == -3, rs1_val == 268435456
+// opcode: bge, op1:x10; op2:x11; op1val:0x10000000; op2val:-0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x10000000, -0x3, 0x8, 1b, x4, 68,0)
+
+inst_39:
+// rs2_val == -9,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x2; op2val:-0x9; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x2, -0x9, 0x0, 1b, x4, 72,0)
+
+inst_40:
+// rs2_val == -17, rs1_val == -2147483648
+// opcode: bge, op1:x10; op2:x11; op1val:-0x80000000; op2val:-0x11; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x80000000, -0x11, 0x40, 3f, x4, 76,0)
+
+inst_41:
+// rs2_val == -33,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:-0x21; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, -0x21, 0x4, 3f, x4, 80,0)
+
+inst_42:
+// rs2_val == -65,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xa; op2val:-0x41; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xa, -0x41, 0x6, 3f, x4, 84,0)
+
+inst_43:
+// rs2_val == -129,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x8000001; op2val:-0x81; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x8000001, -0x81, 0x400, 1b, x4, 88,0)
+
+inst_44:
+// rs2_val == -257,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3fffffff; op2val:-0x101; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3fffffff, -0x101, 0x8, 1b, x4, 92,0)
+
+inst_45:
+// rs2_val == -513,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x4; op2val:-0x201; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x4, -0x201, 0x20, 3f, x4, 96,0)
+
+inst_46:
+// rs2_val == -1025,
+// opcode: bge, op1:x10; op2:x11; op1val:0x40000; op2val:-0x401; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x40000, -0x401, 0x8, 3f, x4, 100,0)
+
+inst_47:
+// rs2_val == -2049,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x2; op2val:-0x801; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x2, -0x801, 0x556, 1b, x4, 104,0)
+
+inst_48:
+// rs2_val == -4097,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x4; op2val:-0x1001; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x4, -0x1001, 0x2, 3f, x4, 108,0)
+
+inst_49:
+// rs2_val == -8193, rs1_val == -67108865
+// opcode: bge, op1:x10; op2:x11; op1val:-0x4000001; op2val:-0x2001; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x4000001, -0x2001, 0x8, 3f, x4, 112,0)
+
+inst_50:
+// rs2_val == -16385,
+// opcode: bge, op1:x10; op2:x11; op1val:0x40; op2val:-0x4001; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x40, -0x4001, 0x6, 1b, x4, 116,0)
+
+inst_51:
+// rs2_val == -32769,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:-0x8001; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, -0x8001, 0x2, 3f, x4, 120,0)
+
+inst_52:
+// rs2_val == -65537, rs1_val == 16384
+// opcode: bge, op1:x10; op2:x11; op1val:0x4000; op2val:-0x10001; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4000, -0x10001, 0x80, 3f, x4, 124,0)
+
+inst_53:
+// rs2_val == -131073,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x80000000; op2val:-0x20001; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x80000000, -0x20001, 0x400, 3f, x4, 128,0)
+
+inst_54:
+// rs2_val == -262145,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:-0x40001; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, -0x40001, 0x400, 1b, x4, 132,0)
+
+inst_55:
+// rs2_val == -524289, rs1_val == 134217728
+// opcode: bge, op1:x10; op2:x11; op1val:0x8000000; op2val:-0x80001; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x8000000, -0x80001, 0x10, 3f, x4, 136,0)
+
+inst_56:
+// rs2_val == -1048577,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:-0x100001; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, -0x100001, 0x8, 3f, x4, 140,0)
+
+inst_57:
+// rs2_val == -2097153,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x7; op2val:-0x200001; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x7, -0x200001, 0xa, 1b, x4, 144,0)
+
+inst_58:
+// rs2_val == -4194305,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x7; op2val:-0x400001; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x7, -0x400001, 0x2, 3f, x4, 148,0)
+
+inst_59:
+// rs2_val == -16777217, rs1_val == -33
+// opcode: bge, op1:x10; op2:x11; op1val:-0x21; op2val:-0x1000001; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x21, -0x1000001, 0x10, 3f, x4, 152,0)
+
+inst_60:
+// rs2_val == -67108865,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4000; op2val:-0x4000001; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4000, -0x4000001, 0x6, 3f, x4, 156,0)
+
+inst_61:
+// rs2_val == -134217729, rs1_val == -3
+// opcode: bge, op1:x10; op2:x11; op1val:-0x3; op2val:-0x8000001; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x3, -0x8000001, 0x10, 3f, x4, 160,0)
+
+inst_62:
+// rs2_val == -268435457, rs1_val == 32
+// opcode: bge, op1:x10; op2:x11; op1val:0x20; op2val:-0x10000001; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x20, -0x10000001, 0x40, 3f, x4, 164,0)
+
+inst_63:
+// rs2_val == -536870913,
+// opcode: bge, op1:x10; op2:x11; op1val:0x10000000; op2val:-0x20000001; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x10000000, -0x20000001, 0x20, 3f, x4, 168,0)
+
+inst_64:
+// rs2_val == -1073741825, rs1_val == 16
+// opcode: bge, op1:x10; op2:x11; op1val:0x10; op2val:-0x40000001; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x10, -0x40000001, 0x0, 1b, x4, 172,0)
+
+inst_65:
+// rs2_val == 2147483647, rs1_val == -2097153
+// opcode: bge, op1:x10; op2:x11; op1val:-0x200001; op2val:0x7fffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x200001, 0x7fffffff, 0x0, 1b, x4, 176,0)
+
+inst_66:
+// rs2_val == 1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x9; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x9, 0x55555555, 0x2, 3f, x4, 180,0)
+
+inst_67:
+// rs2_val == -1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x10000; op2val:-0x55555556; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x10000, -0x55555556, 0x10, 3f, x4, 184,0)
+
+inst_68:
+// rs1_val == 1,
+// opcode: bge, op1:x10; op2:x11; op1val:0x1; op2val:-0x20001; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x1, -0x20001, 0x8, 1b, x4, 188,0)
+
+inst_69:
+// rs1_val == 4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:-0x40001; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, -0x40001, 0x400, 3f, x4, 192,0)
+
+inst_70:
+// rs1_val == 256,
+// opcode: bge, op1:x10; op2:x11; op1val:0x100; op2val:0x1000000; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x100, 0x1000000, 0x40, 3f, x4, 196,0)
+
+inst_71:
+// rs1_val == 512,
+// opcode: bge, op1:x10; op2:x11; op1val:0x200; op2val:-0x21; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x200, -0x21, 0x40, 3f, x4, 200,0)
+
+inst_72:
+// rs1_val == 1024,
+// opcode: bge, op1:x10; op2:x11; op1val:0x400; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x400, 0x0, 0x6, 1b, x4, 204,0)
+
+inst_73:
+// rs1_val == 2048,
+// opcode: bge, op1:x10; op2:x11; op1val:0x800; op2val:0x8000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x800, 0x8000, 0x4, 1b, x4, 208,0)
+
+inst_74:
+// rs1_val == 4096,
+// opcode: bge, op1:x10; op2:x11; op1val:0x1000; op2val:0x40000000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x1000, 0x40000000, 0x400, 3f, x4, 212,0)
+
+inst_75:
+// rs1_val == 8192,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2000; op2val:-0x10000001; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2000, -0x10000001, 0x556, 1b, x4, 216,0)
+
+inst_76:
+// rs1_val == 32768,
+// opcode: bge, op1:x10; op2:x11; op1val:0x8000; op2val:0x4; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x8000, 0x4, 0x100, 3f, x4, 220,0)
+
+inst_77:
+// rs1_val == 131072,
+// opcode: bge, op1:x10; op2:x11; op1val:0x20000; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x20000, 0x2, 0x4, 1b, x4, 224,0)
+
+inst_78:
+// rs1_val == 1048576,
+// opcode: bge, op1:x10; op2:x11; op1val:0x100000; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x100000, -0xb504, 0x8, 3f, x4, 228,0)
+
+inst_79:
+// rs1_val == 2097152,
+// opcode: bge, op1:x10; op2:x11; op1val:0x200000; op2val:-0xb504; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x200000, -0xb504, 0x40, 3f, x4, 232,0)
+
+inst_80:
+// rs1_val == 8388608,
+// opcode: bge, op1:x10; op2:x11; op1val:0x800000; op2val:0x8; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x800000, 0x8, 0x400, 3f, x4, 236,0)
+
+inst_81:
+// rs1_val == 16777216,
+// opcode: bge, op1:x10; op2:x11; op1val:0x1000000; op2val:-0x40000001; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x1000000, -0x40000001, 0x8, 3f, x4, 240,0)
+
+inst_82:
+// rs1_val == 33554432,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2000000; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2000000, 0x6, 0x4, 3f, x4, 244,0)
+
+inst_83:
+// rs1_val == 67108864,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4000000; op2val:0x7fffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4000000, 0x7fffffff, 0x6, 1b, x4, 248,0)
+
+inst_84:
+// rs1_val == 536870912,
+// opcode: bge, op1:x10; op2:x11; op1val:0x20000000; op2val:0x2000; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x20000000, 0x2000, 0x80, 3f, x4, 252,0)
+
+inst_85:
+// rs1_val == 1073741824,
+// opcode: bge, op1:x10; op2:x11; op1val:0x40000000; op2val:0x20000000; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x40000000, 0x20000000, 0x20, 3f, x4, 256,0)
+
+inst_86:
+// rs1_val == -9,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x9; op2val:-0x7; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x9, -0x7, 0x6, 1b, x4, 260,0)
+
+inst_87:
+// rs1_val == -17,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x11; op2val:-0x9; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x11, -0x9, 0x2, 1b, x4, 264,0)
+
+inst_88:
+// rs1_val == -65,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x41; op2val:0x40000; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x41, 0x40000, 0x0, 1b, x4, 268,0)
+
+inst_89:
+// rs1_val == -129,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x81; op2val:0x80; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x81, 0x80, 0x200, 3f, x4, 272,0)
+
+inst_90:
+// rs1_val == -257,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x101; op2val:-0x40000000; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x101, -0x40000000, 0x10, 3f, x4, 276,0)
+
+inst_91:
+// rs1_val == -513,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x201; op2val:-0x40000001; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x201, -0x40000001, 0x0, 3f, x4, 280,0)
+
+inst_92:
+// rs1_val == -1025,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x401; op2val:-0x6; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x401, -0x6, 0xa, 1b, x4, 284,0)
+
+inst_93:
+// rs1_val == -2049,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x801; op2val:0x40000; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x801, 0x40000, 0x80, 3f, x4, 288,0)
+
+inst_94:
+// rs1_val == -16385,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x4001; op2val:-0x8001; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x4001, -0x8001, 0x100, 3f, x4, 292,0)
+
+inst_95:
+// rs1_val == -32769,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x8001; op2val:0x800000; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x8001, 0x800000, 0x200, 3f, x4, 296,0)
+
+inst_96:
+// rs1_val == -65537,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x10001; op2val:0x8000000; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x10001, 0x8000000, 0x2, 3f, x4, 300,0)
+
+inst_97:
+// rs1_val == -131073,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x20001; op2val:0x7; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x20001, 0x7, 0x8, 3f, x4, 304,0)
+
+inst_98:
+// rs1_val == -8388609,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x800001; op2val:0x2000; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x800001, 0x2000, 0x8, 3f, x4, 308,0)
+
+inst_99:
+// rs1_val == -16777217,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x1000001; op2val:0x20; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x1000001, 0x20, 0x0, 3f, x4, 312,0)
+
+inst_100:
+// rs1_val == -33554433,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x2000001; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x2000001, 0x4, 0x8, 3f, x4, 316,0)
+
+inst_101:
+// rs1_val == -268435457,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x10000001; op2val:0x80; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x10000001, 0x80, 0x80, 3f, x4, 320,0)
+
+inst_102:
+// rs1_val == -536870913,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x20000001; op2val:0x66666666; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x20000001, 0x66666666, 0x4, 3f, x4, 324,0)
+
+inst_103:
+// rs1_val == -1073741825,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x40000001; op2val:0x40000000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x40000001, 0x40000000, 0x400, 3f, x4, 328,0)
+
+inst_104:
+// rs1_val == 2147483647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x7fffffff; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x7fffffff, 0x5, 0x8, 1b, x4, 332,0)
+
+inst_105:
+// rs1_val == 1431655765, rs1_val==1431655765 and rs2_val==-1431655766
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, -0x55555556, 0x200, 3f, x4, 336,0)
+
+inst_106:
+// rs1_val==3 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x3, 0x2, 3f, x4, 340,0)
+
+inst_107:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x55555555; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x55555555, 0xa, 1b, x4, 344,0)
+
+inst_108:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:-0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, -0x55555556, 0x200, 3f, x4, 348,0)
+
+inst_109:
+// rs1_val==3 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x5; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x5, 0x20, 3f, x4, 352,0)
+
+inst_110:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x33333333; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x33333333, 0x0, 1b, x4, 356,0)
+
+inst_111:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x66666666; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x66666666, 0x40, 3f, x4, 360,0)
+
+inst_112:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:-0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, -0xb504, 0x6, 1b, x4, 364,0)
+
+inst_113:
+// rs1_val==3 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0xb504, 0x400, 1b, x4, 368,0)
+
+inst_114:
+// rs1_val==3 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x2, 0x2, 3f, x4, 372,0)
+
+inst_115:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x55555554, 0x4, 3f, x4, 376,0)
+
+inst_116:
+// rs1_val==3 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x0, 0x100, 3f, x4, 380,0)
+
+inst_117:
+// rs1_val==3 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x4, 0x6, 3f, x4, 384,0)
+
+inst_118:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x33333332, 0x2, 1b, x4, 388,0)
+
+inst_119:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x66666665, 0x400, 3f, x4, 392,0)
+
+inst_120:
+// rs1_val==3 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0xb503; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0xb503, 0x100, 3f, x4, 396,0)
+
+inst_121:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x55555556, 0x4, 1b, x4, 400,0)
+
+inst_122:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, -0x55555555, 0x8, 1b, x4, 404,0)
+
+inst_123:
+// rs1_val==3 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x6, 0x8, 3f, x4, 408,0)
+
+inst_124:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x33333334, 0x4, 3f, x4, 412,0)
+
+inst_125:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x66666667; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0x66666667, 0x6, 3f, x4, 416,0)
+
+inst_126:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:-0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, -0xb503, 0x400, 3f, x4, 420,0)
+
+inst_127:
+// rs1_val==3 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0xb505; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x3, 0xb505, 0x40, 3f, x4, 424,0)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x3, 0x8, 1b, x4, 428,0)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x55555555, 0x20, 3f, x4, 432,0)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x5, 0x80, 3f, x4, 436,0)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x33333333, 0x4, 3f, x4, 440,0)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x66666666, 0x400, 1b, x4, 444,0)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, -0xb504, 0x2, 3f, x4, 448,0)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0xb504, 0x400, 3f, x4, 452,0)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x2, 0x6, 1b, x4, 456,0)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x55555554, 0x2, 3f, x4, 460,0)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x0, 0x2, 1b, x4, 464,0)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x4, 0x400, 1b, x4, 468,0)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333332; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x33333332, 0x10, 3f, x4, 472,0)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x66666665, 0x2, 3f, x4, 476,0)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb503; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0xb503, 0x10, 3f, x4, 480,0)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x55555556, 0x400, 1b, x4, 484,0)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, -0x55555555, 0x8, 1b, x4, 488,0)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x6, 0x20, 3f, x4, 492,0)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333334; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x33333334, 0xa, 1b, x4, 496,0)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0x66666667, 0x8, 1b, x4, 500,0)
+
+inst_147:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb503; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, -0xb503, 0x556, 1b, x4, 504,0)
+
+inst_148:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555555, 0xb505, 0x200, 3f, x4, 508,0)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x3, 0x0, 1b, x4, 512,0)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x55555555, 0x4, 3f, x4, 516,0)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, -0x55555556, 0x200, 3f, x4, 520,0)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x5, 0x100, 3f, x4, 524,0)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333333; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x33333333, 0x8, 1b, x4, 528,0)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666666; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x66666666, 0x20, 3f, x4, 532,0)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, -0xb504, 0xa, 1b, x4, 536,0)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0xb504, 0x2, 1b, x4, 540,0)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x2, 0x100, 3f, x4, 544,0)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555554; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x55555554, 0xa, 1b, x4, 548,0)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x0, 0x2, 1b, x4, 552,0)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x4, 0x20, 3f, x4, 556,0)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333332; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x33333332, 0x80, 3f, x4, 560,0)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x66666665, 0x2, 3f, x4, 564,0)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0xb503, 0x6, 3f, x4, 568,0)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x55555556, 0x0, 3f, x4, 572,0)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, -0x55555555, 0x40, 3f, x4, 576,0)
+
+inst_166:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x6, 0x2, 3f, x4, 580,0)
+
+inst_167:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333334; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x33333334, 0x40, 3f, x4, 584,0)
+
+inst_168:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666667; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0x66666667, 0x6, 1b, x4, 588,0)
+
+inst_169:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, -0xb503, 0x400, 3f, x4, 592,0)
+
+inst_170:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb505; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555556, 0xb505, 0x40, 3f, x4, 596,0)
+
+inst_171:
+// rs1_val==5 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x3, 0xa, 1b, x4, 600,0)
+
+inst_172:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x55555555, 0x2, 1b, x4, 604,0)
+
+inst_173:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:-0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, -0x55555556, 0x400, 1b, x4, 608,0)
+
+inst_174:
+// rs1_val==5 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x5, 0x2, 1b, x4, 612,0)
+
+inst_175:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x33333333; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x33333333, 0x80, 3f, x4, 616,0)
+
+inst_176:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x66666666, 0x400, 1b, x4, 620,0)
+
+inst_177:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:-0xb504; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, -0xb504, 0x10, 3f, x4, 624,0)
+
+inst_178:
+// rs1_val==5 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0xb504, 0xa, 1b, x4, 628,0)
+
+inst_179:
+// rs1_val==5 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x2; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x2, 0x20, 3f, x4, 632,0)
+
+inst_180:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x55555554, 0x2, 3f, x4, 636,0)
+
+inst_181:
+// rs1_val==5 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x0, 0x0, 3f, x4, 640,0)
+
+inst_182:
+// rs1_val==5 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x4, 0x2, 1b, x4, 644,0)
+
+inst_183:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x33333332; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x33333332, 0x100, 3f, x4, 648,0)
+
+inst_184:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x66666665; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x66666665, 0xa, 1b, x4, 652,0)
+
+inst_185:
+// rs1_val==5 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0xb503, 0x20, 3f, x4, 656,0)
+
+inst_186:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x55555556, 0x400, 3f, x4, 660,0)
+
+inst_187:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:-0x55555555; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, -0x55555555, 0xa, 1b, x4, 664,0)
+
+inst_188:
+// rs1_val==5 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x6, 0x2, 1b, x4, 668,0)
+
+inst_189:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x33333334; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x33333334, 0x0, 3f, x4, 672,0)
+
+inst_190:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x66666667; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0x66666667, 0x80, 3f, x4, 676,0)
+
+inst_191:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:-0xb503; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, -0xb503, 0x556, 1b, x4, 680,0)
+
+inst_192:
+// rs1_val==5 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x5, 0xb505, 0x200, 3f, x4, 684,0)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x3, 0x400, 1b, x4, 688,0)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x55555555, 0x40, 3f, x4, 692,0)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, -0x55555556, 0x6, 1b, x4, 696,0)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x5, 0x400, 1b, x4, 700,0)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333333; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x33333333, 0x556, 1b, x4, 704,0)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x66666666, 0x2, 1b, x4, 708,0)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, -0xb504, 0x0, 3f, x4, 712,0)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0xb504, 0x400, 1b, x4, 716,0)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x2, 0x2, 1b, x4, 720,0)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555554; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x55555554, 0x8, 3f, x4, 724,0)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x0, 0x10, 3f, x4, 728,0)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x4, 0x80, 3f, x4, 732,0)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x33333332, 0x6, 1b, x4, 736,0)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x66666665, 0x400, 3f, x4, 740,0)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0xb503, 0x40, 3f, x4, 744,0)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x55555556, 0x200, 3f, x4, 748,0)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, -0x55555555, 0x10, 3f, x4, 752,0)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x6; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x6, 0x40, 3f, x4, 756,0)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333334; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x33333334, 0x40, 3f, x4, 760,0)
+
+inst_212:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666667; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0x66666667, 0x400, 1b, x4, 764,0)
+
+inst_213:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, -0xb503, 0x400, 1b, x4, 768,0)
+
+inst_214:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb505; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333333, 0xb505, 0x0, 1b, x4, 772,0)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x3, 0x2, 3f, x4, 776,0)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x55555555, 0x40, 3f, x4, 780,0)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555556; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, -0x55555556, 0x100, 3f, x4, 784,0)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x5, 0x80, 3f, x4, 788,0)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333333; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x33333333, 0x556, 1b, x4, 792,0)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666666; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x66666666, 0x200, 3f, x4, 796,0)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, -0xb504, 0x2, 1b, x4, 800,0)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb504; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0xb504, 0x20, 3f, x4, 804,0)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x2, 0x400, 1b, x4, 808,0)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x55555554, 0x4, 3f, x4, 812,0)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x0, 0x100, 3f, x4, 816,0)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x4, 0x2, 1b, x4, 820,0)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x33333332, 0x0, 1b, x4, 824,0)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666665; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x66666665, 0x8, 3f, x4, 828,0)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0xb503, 0x20, 3f, x4, 832,0)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x55555556, 0x4, 1b, x4, 836,0)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, -0x55555555, 0x2, 1b, x4, 840,0)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x6, 0x400, 1b, x4, 844,0)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333334; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x33333334, 0x400, 1b, x4, 848,0)
+
+inst_234:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666667; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0x66666667, 0x80, 3f, x4, 852,0)
+
+inst_235:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb503; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, -0xb503, 0x100, 3f, x4, 856,0)
+
+inst_236:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb505; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666666, 0xb505, 0x40, 3f, x4, 860,0)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x3, 0x20, 3f, x4, 864,0)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x55555555, 0x4, 3f, x4, 868,0)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, -0x55555556, 0x556, 1b, x4, 872,0)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x5; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x5, 0xa, 1b, x4, 876,0)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x33333333, 0x400, 1b, x4, 880,0)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666666; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x66666666, 0x10, 3f, x4, 884,0)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, -0xb504, 0x400, 1b, x4, 888,0)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0xb504, 0x400, 1b, x4, 892,0)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x2, 0x2, 3f, x4, 896,0)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555554; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x55555554, 0x10, 3f, x4, 900,0)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x0; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x0, 0x20, 3f, x4, 904,0)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x4, 0xa, 1b, x4, 908,0)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x33333332, 0x400, 1b, x4, 912,0)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666665; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x66666665, 0x80, 3f, x4, 916,0)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0xb503, 0x8, 3f, x4, 920,0)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x55555556, 0x8, 1b, x4, 924,0)
+
+inst_253:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, -0x55555555, 0x40, 3f, x4, 928,0)
+
+inst_254:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x6, 0x400, 3f, x4, 932,0)
+
+inst_255:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333334; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x33333334, 0x6, 3f, x4, 936,0)
+
+inst_256:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0x66666667, 0x4, 3f, x4, 940,0)
+
+inst_257:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, -0xb503, 0x2, 3f, x4, 944,0)
+
+inst_258:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504; op2val:0xb505; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb504, 0xb505, 0x4, 1b, x4, 948,0)
+
+inst_259:
+// rs1_val==46340 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x3, 0x2, 3f, x4, 952,0)
+
+inst_260:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555555; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x55555555, 0x200, 3f, x4, 956,0)
+
+inst_261:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, -0x55555556, 0x6, 3f, x4, 960,0)
+
+inst_262:
+// rs1_val==46340 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x5, 0x10, 3f, x4, 964,0)
+
+inst_263:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333333; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x33333333, 0x6, 1b, x4, 968,0)
+
+inst_264:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x66666666, 0x2, 3f, x4, 972,0)
+
+inst_265:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:-0xb504; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, -0xb504, 0x80, 3f, x4, 976,0)
+
+inst_266:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0xb504, 0x2, 1b, x4, 980,0)
+
+inst_267:
+// rs1_val==46340 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x2, 0x6, 1b, x4, 984,0)
+
+inst_268:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555554; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x55555554, 0x8, 1b, x4, 988,0)
+
+inst_269:
+// rs1_val==46340 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x0, 0x0, 1b, x4, 992,0)
+
+inst_270:
+// rs1_val==46340 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x4, 0x4, 1b, x4, 996,0)
+
+inst_271:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x33333332, 0x2, 1b, x4, 1000,0)
+
+inst_272:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666665; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x66666665, 0x10, 3f, x4, 1004,0)
+
+inst_273:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0xb503, 0x2, 3f, x4, 1008,0)
+
+inst_274:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555556; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x55555556, 0x10, 3f, x4, 1012,0)
+
+inst_275:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, -0x55555555, 0x2, 1b, x4, 1016,0)
+
+inst_276:
+// rs1_val==46340 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x6, 0x2, 1b, x4, 1020,0)
+
+inst_277:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x33333334, 0x8, 3f, x4, 1024,0)
+
+inst_278:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666667; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0x66666667, 0x100, 3f, x4, 1028,0)
+
+inst_279:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:-0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, -0xb503, 0x20, 3f, x4, 1032,0)
+
+inst_280:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504; op2val:0xb505; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb504, 0xb505, 0x2, 3f, x4, 1036,0)
+
+inst_281:
+// rs1_val==2 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x3; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x3, 0x100, 3f, x4, 1040,0)
+
+inst_282:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x55555555, 0x6, 3f, x4, 1044,0)
+
+inst_283:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:-0x55555556; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, -0x55555556, 0x100, 3f, x4, 1048,0)
+
+inst_284:
+// rs1_val==2 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x5, 0x400, 3f, x4, 1052,0)
+
+inst_285:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x33333333; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x33333333, 0x2, 1b, x4, 1056,0)
+
+inst_286:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x66666666; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x66666666, 0x0, 1b, x4, 1060,0)
+
+inst_287:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:-0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, -0xb504, 0x4, 1b, x4, 1064,0)
+
+inst_288:
+// rs1_val==2 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0xb504, 0x4, 1b, x4, 1068,0)
+
+inst_289:
+// rs1_val==2 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x2, 0x8, 3f, x4, 1072,0)
+
+inst_290:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x55555554; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x55555554, 0x6, 1b, x4, 1076,0)
+
+inst_291:
+// rs1_val==2 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x0, 0x10, 3f, x4, 1080,0)
+
+inst_292:
+// rs1_val==2 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x4, 0x6, 1b, x4, 1084,0)
+
+inst_293:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x33333332, 0x6, 3f, x4, 1088,0)
+
+inst_294:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x66666665, 0x400, 3f, x4, 1092,0)
+
+inst_295:
+// rs1_val==2 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0xb503, 0x4, 3f, x4, 1096,0)
+
+inst_296:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x55555556, 0x8, 3f, x4, 1100,0)
+
+inst_297:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:-0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, -0x55555555, 0x0, 3f, x4, 1104,0)
+
+inst_298:
+// rs1_val==2 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x6, 0x4, 3f, x4, 1108,0)
+
+inst_299:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x33333334; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x33333334, 0x40, 3f, x4, 1112,0)
+
+inst_300:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0x66666667, 0x4, 3f, x4, 1116,0)
+
+inst_301:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:-0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, -0xb503, 0x40, 3f, x4, 1120,0)
+
+inst_302:
+// rs1_val==2 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0xb505; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x2, 0xb505, 0x556, 1b, x4, 1124,0)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x3, 0x4, 1b, x4, 1128,0)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555555; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x55555555, 0x80, 3f, x4, 1132,0)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, -0x55555556, 0x556, 1b, x4, 1136,0)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x5, 0x10, 3f, x4, 1140,0)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x33333333, 0x4, 3f, x4, 1144,0)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x66666666, 0x6, 1b, x4, 1148,0)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, -0xb504, 0x2, 3f, x4, 1152,0)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb504; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0xb504, 0x20, 3f, x4, 1156,0)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x2, 0x8, 1b, x4, 1160,0)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555554; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x55555554, 0x8, 1b, x4, 1164,0)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x0, 0xa, 1b, x4, 1168,0)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x4, 0x400, 1b, x4, 1172,0)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x33333332, 0x2, 1b, x4, 1176,0)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666665; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x66666665, 0x80, 3f, x4, 1180,0)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0xb503, 0x400, 3f, x4, 1184,0)
+
+inst_318:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x55555556, 0x8, 3f, x4, 1188,0)
+
+inst_319:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, -0x55555555, 0x6, 3f, x4, 1192,0)
+
+inst_320:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x6, 0x6, 1b, x4, 1196,0)
+
+inst_321:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x33333334, 0x8, 3f, x4, 1200,0)
+
+inst_322:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666667; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0x66666667, 0x20, 3f, x4, 1204,0)
+
+inst_323:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, -0xb503, 0x400, 1b, x4, 1208,0)
+
+inst_324:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb505; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555554, 0xb505, 0x0, 1b, x4, 1212,0)
+
+inst_325:
+// rs1_val==0 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x3; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x3, 0x100, 3f, x4, 1216,0)
+
+inst_326:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x55555555, 0x400, 1b, x4, 1220,0)
+
+inst_327:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:-0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, -0x55555556, 0x556, 1b, x4, 1224,0)
+
+inst_328:
+// rs1_val==0 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x5, 0x4, 3f, x4, 1228,0)
+
+inst_329:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x33333333; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x33333333, 0x40, 3f, x4, 1232,0)
+
+inst_330:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x66666666; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x66666666, 0x556, 1b, x4, 1236,0)
+
+inst_331:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:-0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, -0xb504, 0x400, 3f, x4, 1240,0)
+
+inst_332:
+// rs1_val==0 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0xb504, 0x400, 3f, x4, 1244,0)
+
+inst_333:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333334; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x33333334, 0x6, 1b, x4, 1248,0)
+
+inst_334:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666667; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x66666667, 0x200, 3f, x4, 1252,0)
+
+inst_335:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, -0xb503, 0x8, 1b, x4, 1256,0)
+
+inst_336:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0xb505, 0x6, 3f, x4, 1260,0)
+
+inst_337:
+// rs1_val==6 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x3, 0x80, 3f, x4, 1264,0)
+
+inst_338:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x55555555, 0x6, 1b, x4, 1268,0)
+
+inst_339:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:-0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, -0x55555556, 0x556, 1b, x4, 1272,0)
+
+inst_340:
+// rs1_val==6 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x5; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x5, 0x200, 3f, x4, 1276,0)
+
+inst_341:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x33333333, 0x400, 3f, x4, 1280,0)
+
+inst_342:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x66666666, 0x2, 1b, x4, 1284,0)
+
+inst_343:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:-0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, -0xb504, 0x400, 3f, x4, 1288,0)
+
+inst_344:
+// rs1_val==6 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0xb504, 0x2, 1b, x4, 1292,0)
+
+inst_345:
+// rs1_val==6 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x2, 0x40, 3f, x4, 1296,0)
+
+inst_346:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x55555554, 0x0, 3f, x4, 1300,0)
+
+inst_347:
+// rs1_val==6 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x0, 0x2, 1b, x4, 1304,0)
+
+inst_348:
+// rs1_val==6 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x4, 0x0, 3f, x4, 1308,0)
+
+inst_349:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x33333332, 0x6, 3f, x4, 1312,0)
+
+inst_350:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x66666665; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x66666665, 0x0, 1b, x4, 1316,0)
+
+inst_351:
+// rs1_val==6 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0xb503, 0x8, 3f, x4, 1320,0)
+
+inst_352:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x55555556, 0x0, 3f, x4, 1324,0)
+
+inst_353:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:-0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, -0x55555555, 0x4, 1b, x4, 1328,0)
+
+inst_354:
+// rs1_val==6 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x6, 0x400, 3f, x4, 1332,0)
+
+inst_355:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x33333334; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x33333334, 0xa, 1b, x4, 1336,0)
+
+inst_356:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x66666667; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0x66666667, 0x556, 1b, x4, 1340,0)
+
+inst_357:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:-0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, -0xb503, 0x0, 1b, x4, 1344,0)
+
+inst_358:
+// rs1_val==6 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0xb505; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x6, 0xb505, 0x80, 3f, x4, 1348,0)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x3; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x3, 0x100, 3f, x4, 1352,0)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x55555555, 0x6, 3f, x4, 1356,0)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, -0x55555556, 0x2, 1b, x4, 1360,0)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x5; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x5, 0x200, 3f, x4, 1364,0)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333333; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x33333333, 0x6, 3f, x4, 1368,0)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666666; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x66666666, 0x80, 3f, x4, 1372,0)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, -0xb504, 0x400, 3f, x4, 1376,0)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0xb504, 0x2, 1b, x4, 1380,0)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x2, 0x400, 3f, x4, 1384,0)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555554; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x55555554, 0x20, 3f, x4, 1388,0)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x0, 0x100, 3f, x4, 1392,0)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x4, 0x4, 3f, x4, 1396,0)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333332; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x33333332, 0x10, 3f, x4, 1400,0)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666665; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x66666665, 0x40, 3f, x4, 1404,0)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0xb503, 0x40, 3f, x4, 1408,0)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x55555556, 0x2, 3f, x4, 1412,0)
+
+inst_375:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, -0x55555555, 0x400, 1b, x4, 1416,0)
+
+inst_376:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x6, 0x400, 1b, x4, 1420,0)
+
+inst_377:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333334; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x33333334, 0x400, 1b, x4, 1424,0)
+
+inst_378:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666667; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0x66666667, 0x2, 1b, x4, 1428,0)
+
+inst_379:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, -0xb503, 0x400, 1b, x4, 1432,0)
+
+inst_380:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333334, 0xb505, 0x400, 3f, x4, 1436,0)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x3, 0x400, 1b, x4, 1440,0)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555555; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x55555555, 0x556, 1b, x4, 1444,0)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555556; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, -0x55555556, 0x20, 3f, x4, 1448,0)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x5; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x5, 0xa, 1b, x4, 1452,0)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333333; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x33333333, 0x2, 1b, x4, 1456,0)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666666; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x66666666, 0x100, 3f, x4, 1460,0)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, -0xb504, 0x400, 1b, x4, 1464,0)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0xb504, 0x400, 3f, x4, 1468,0)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x2, 0x2, 1b, x4, 1472,0)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x55555554, 0x0, 3f, x4, 1476,0)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x0, 0x0, 1b, x4, 1480,0)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x4, 0x0, 3f, x4, 1484,0)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333332; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x33333332, 0xa, 1b, x4, 1488,0)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666665; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x66666665, 0x6, 3f, x4, 1492,0)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0xb503, 0x2, 1b, x4, 1496,0)
+
+inst_396:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x55555556, 0x0, 3f, x4, 1500,0)
+
+inst_397:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, -0x55555555, 0x400, 1b, x4, 1504,0)
+
+inst_398:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x6, 0x0, 1b, x4, 1508,0)
+
+inst_399:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333334; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0x33333334, 0x400, 3f, x4, 1512,0)
+
+inst_400:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, -0xb503, 0x0, 1b, x4, 1516,0)
+
+inst_401:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666667, 0xb505, 0x8, 1b, x4, 1520,0)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x3, 0x8, 3f, x4, 1524,0)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x55555555, 0x8, 3f, x4, 1528,0)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, -0x55555556, 0x2, 3f, x4, 1532,0)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x5, 0x8, 1b, x4, 1536,0)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333333; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x33333333, 0xa, 1b, x4, 1540,0)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666666; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x66666666, 0x80, 3f, x4, 1544,0)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, -0xb504, 0x2, 3f, x4, 1548,0)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0xb504, 0x400, 3f, x4, 1552,0)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x2; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x2, 0x20, 3f, x4, 1556,0)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555554; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x55555554, 0x8, 1b, x4, 1560,0)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x0; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x0, 0x20, 3f, x4, 1564,0)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x4, 0x40, 3f, x4, 1568,0)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x33333332, 0x2, 1b, x4, 1572,0)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666665; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x66666665, 0x6, 3f, x4, 1576,0)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0xb503; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0xb503, 0xa, 1b, x4, 1580,0)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x55555556, 0x6, 3f, x4, 1584,0)
+
+inst_418:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, -0x55555555, 0x2, 1b, x4, 1588,0)
+
+inst_419:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x6, 0xa, 1b, x4, 1592,0)
+
+inst_420:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333334; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x33333334, 0x10, 3f, x4, 1596,0)
+
+inst_421:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0x66666667, 0x8, 3f, x4, 1600,0)
+
+inst_422:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, -0xb503, 0x4, 3f, x4, 1604,0)
+
+inst_423:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb503; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0xb503, 0xb505, 0x400, 1b, x4, 1608,0)
+
+inst_424:
+// rs1_val==46341 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x3, 0x6, 3f, x4, 1612,0)
+
+inst_425:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x55555555, 0x20, 3f, x4, 1616,0)
+
+inst_426:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, -0x55555556, 0x80, 3f, x4, 1620,0)
+
+inst_427:
+// rs1_val==46341 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x5, 0x6, 3f, x4, 1624,0)
+
+inst_428:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333333; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x33333333, 0xa, 1b, x4, 1628,0)
+
+inst_429:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666666; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x66666666, 0x4, 1b, x4, 1632,0)
+
+inst_430:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:-0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, -0xb504, 0x2, 1b, x4, 1636,0)
+
+inst_431:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0xb504; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0xb504, 0x10, 3f, x4, 1640,0)
+
+inst_432:
+// rs1_val==46341 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x2, 0xa, 1b, x4, 1644,0)
+
+inst_433:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555554; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x55555554, 0x6, 3f, x4, 1648,0)
+
+inst_434:
+// rs1_val==46341 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x0, 0x2, 3f, x4, 1652,0)
+
+inst_435:
+// rs1_val==46341 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x4, 0xa, 1b, x4, 1656,0)
+
+inst_436:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333332; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x33333332, 0x4, 1b, x4, 1660,0)
+
+inst_437:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666665; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x66666665, 0x200, 3f, x4, 1664,0)
+
+inst_438:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0xb503, 0x2, 1b, x4, 1668,0)
+
+inst_439:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x55555556, 0x400, 1b, x4, 1672,0)
+
+inst_440:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, -0x55555555, 0x10, 3f, x4, 1676,0)
+
+inst_441:
+// rs1_val==46341 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x6; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x6, 0x556, 1b, x4, 1680,0)
+
+inst_442:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333334; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x33333334, 0x20, 3f, x4, 1684,0)
+
+inst_443:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666667; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0x66666667, 0x2, 3f, x4, 1688,0)
+
+inst_444:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:-0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, -0xb503, 0x4, 3f, x4, 1692,0)
+
+inst_445:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb505; op2val:0xb505; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb505, 0xb505, 0x10, 3f, x4, 1696,0)
+
+inst_446:
+// rs1_val==0 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x2, 0x10, 3f, x4, 1700,0)
+
+inst_447:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x55555554, 0x4, 3f, x4, 1704,0)
+
+inst_448:
+// rs1_val==0 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x0; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x0, 0x20, 3f, x4, 1708,0)
+
+inst_449:
+// rs1_val==0 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x4, 0x0, 3f, x4, 1712,0)
+
+inst_450:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x33333332, 0x0, 1b, x4, 1716,0)
+
+inst_451:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x66666665; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x66666665, 0x40, 3f, x4, 1720,0)
+
+inst_452:
+// rs1_val==0 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0xb503, 0x4, 3f, x4, 1724,0)
+
+inst_453:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x55555556; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x55555556, 0x100, 3f, x4, 1728,0)
+
+inst_454:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, -0x55555555, 0x8, 1b, x4, 1732,0)
+
+inst_455:
+// rs1_val==0 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x6, 0x4, 1b, x4, 1736,0)
+
+inst_456:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x33333334, 0x4, 3f, x4, 1740,0)
+
+inst_457:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x66666667, 0x4, 1b, x4, 1744,0)
+
+inst_458:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, -0xb503, 0x6, 1b, x4, 1748,0)
+
+inst_459:
+// rs1_val==0 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0xb505; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0xb505, 0x20, 3f, x4, 1752,0)
+
+inst_460:
+// rs1_val==4 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x3, 0x0, 3f, x4, 1756,0)
+
+inst_461:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x55555555, 0x6, 3f, x4, 1760,0)
+
+inst_462:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:-0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, -0x55555556, 0x200, 3f, x4, 1764,0)
+
+inst_463:
+// rs1_val==4 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x5, 0x4, 3f, x4, 1768,0)
+
+inst_464:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x33333333, 0x4, 3f, x4, 1772,0)
+
+inst_465:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x66666666, 0x400, 1b, x4, 1776,0)
+
+inst_466:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:-0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, -0xb504, 0x0, 1b, x4, 1780,0)
+
+inst_467:
+// rs1_val==4 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0xb504, 0x8, 1b, x4, 1784,0)
+
+inst_468:
+// rs1_val==4 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x2, 0x100, 3f, x4, 1788,0)
+
+inst_469:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x55555554, 0x4, 1b, x4, 1792,0)
+
+inst_470:
+// rs1_val==4 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x0, 0x556, 1b, x4, 1796,0)
+
+inst_471:
+// rs1_val==4 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x4, 0x6, 3f, x4, 1800,0)
+
+inst_472:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x33333332; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x33333332, 0x80, 3f, x4, 1804,0)
+
+inst_473:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x66666665; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x66666665, 0x6, 1b, x4, 1808,0)
+
+inst_474:
+// rs1_val==4 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0xb503; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0xb503, 0x10, 3f, x4, 1812,0)
+
+inst_475:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x55555556, 0x80, 3f, x4, 1816,0)
+
+inst_476:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, -0x55555555, 0x8, 3f, x4, 1820,0)
+
+inst_477:
+// rs1_val==4 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x6, 0x8, 1b, x4, 1824,0)
+
+inst_478:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x33333334; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x33333334, 0x400, 3f, x4, 1828,0)
+
+inst_479:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x66666667; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0x66666667, 0x400, 3f, x4, 1832,0)
+
+inst_480:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:-0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, -0xb503, 0x8, 1b, x4, 1836,0)
+
+inst_481:
+// rs1_val==4 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0xb505; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x4, 0xb505, 0x20, 3f, x4, 1840,0)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x3, 0x6, 3f, x4, 1844,0)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x55555555, 0x8, 1b, x4, 1848,0)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555556; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, -0x55555556, 0xa, 1b, x4, 1852,0)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x5, 0x0, 1b, x4, 1856,0)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333333; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x33333333, 0x6, 1b, x4, 1860,0)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x66666666, 0x400, 1b, x4, 1864,0)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, -0xb504, 0xa, 1b, x4, 1868,0)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0xb504, 0x8, 1b, x4, 1872,0)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x2, 0x4, 3f, x4, 1876,0)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555554; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x55555554, 0x80, 3f, x4, 1880,0)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x0, 0xa, 1b, x4, 1884,0)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x4, 0x400, 3f, x4, 1888,0)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x33333332, 0x0, 3f, x4, 1892,0)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x66666665, 0x2, 3f, x4, 1896,0)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0xb503, 0x0, 1b, x4, 1900,0)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x55555556, 0x400, 3f, x4, 1904,0)
+
+inst_498:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555555; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, -0x55555555, 0xa, 1b, x4, 1908,0)
+
+inst_499:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x6, 0x0, 3f, x4, 1912,0)
+
+inst_500:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333334; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x33333334, 0xa, 1b, x4, 1916,0)
+
+inst_501:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666667; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0x66666667, 0x2, 1b, x4, 1920,0)
+
+inst_502:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb503; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, -0xb503, 0x10, 3f, x4, 1924,0)
+
+inst_503:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb505; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x33333332, 0xb505, 0x4, 1b, x4, 1928,0)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x3, 0x8, 3f, x4, 1932,0)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x55555555, 0x8, 3f, x4, 1936,0)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, -0x55555556, 0x200, 3f, x4, 1940,0)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x5, 0x6, 1b, x4, 1944,0)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x33333333, 0x4, 1b, x4, 1948,0)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666666; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x66666666, 0x80, 3f, x4, 1952,0)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, -0xb504, 0x200, 3f, x4, 1956,0)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0xb504, 0x6, 3f, x4, 1960,0)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x2; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x2, 0x80, 3f, x4, 1964,0)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555554; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x55555554, 0x20, 3f, x4, 1968,0)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x0, 0x2, 3f, x4, 1972,0)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x4, 0x40, 3f, x4, 1976,0)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333332; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x33333332, 0x4, 3f, x4, 1980,0)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666665; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x66666665, 0x6, 1b, x4, 1984,0)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0xb503, 0x4, 1b, x4, 1988,0)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x55555556, 0x400, 1b, x4, 1992,0)
+
+inst_520:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, -0x55555555, 0x20, 3f, x4, 1996,0)
+
+inst_521:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x6, 0x2, 1b, x4, 2000,0)
+
+inst_522:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x33333334, 0x2, 3f, x4, 2004,0)
+
+inst_523:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666667; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0x66666667, 0x2, 3f, x4, 2008,0)
+
+inst_524:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, -0xb503, 0x6, 3f, x4, 2012,0)
+
+inst_525:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb505; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x66666665, 0xb505, 0x4, 1b, x4, 2016,0)
+
+inst_526:
+// rs1_val==46339 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x3, 0x6, 1b, x4, 2020,0)
+
+inst_527:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x55555555, 0x0, 1b, x4, 2024,0)
+
+inst_528:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, -0x55555556, 0x8, 3f, x4, 2028,0)
+
+inst_529:
+// rs1_val==46339 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x5, 0x10, 3f, x4, 2032,0)
+
+inst_530:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333333; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x33333333, 0x40, 3f, x4, 2036,0)
+
+inst_531:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666666; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x66666666, 0x40, 3f, x4, 2040,0)
+
+inst_532:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:-0xb504; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, -0xb504, 0x100, 3f, x4, 2044,0)
+RVTEST_SIGBASE( x4,signature_x4_1)
+
+inst_533:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0xb504; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0xb504, 0x40, 3f, x4, 0,0)
+
+inst_534:
+// rs1_val==46339 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x2, 0x2, 1b, x4, 4,0)
+
+inst_535:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x55555554, 0x0, 1b, x4, 8,0)
+
+inst_536:
+// rs1_val==46339 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x0, 0x400, 3f, x4, 12,0)
+
+inst_537:
+// rs1_val==46339 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x4, 0x4, 1b, x4, 16,0)
+
+inst_538:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x33333332, 0x400, 3f, x4, 20,0)
+
+inst_539:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x66666665, 0x400, 1b, x4, 24,0)
+
+inst_540:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0xb503, 0x400, 3f, x4, 28,0)
+
+inst_541:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x55555556, 0x6, 3f, x4, 32,0)
+
+inst_542:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, -0x55555555, 0x0, 1b, x4, 36,0)
+
+inst_543:
+// rs1_val==46339 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x6, 0x6, 3f, x4, 40,0)
+
+inst_544:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x33333334, 0x8, 1b, x4, 44,0)
+
+inst_545:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666667; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0x66666667, 0x80, 3f, x4, 48,0)
+
+inst_546:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, -0xb503, 0x6, 1b, x4, 52,0)
+
+inst_547:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb503; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0xb503, 0xb505, 0x8, 3f, x4, 56,0)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x3; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x3, 0x556, 1b, x4, 60,0)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555555; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x55555555, 0x100, 3f, x4, 64,0)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, -0x55555556, 0x80, 3f, x4, 68,0)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x5, 0x0, 3f, x4, 72,0)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333333; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x33333333, 0xa, 1b, x4, 76,0)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666666; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x66666666, 0x80, 3f, x4, 80,0)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, -0xb504, 0x8, 1b, x4, 84,0)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0xb504, 0x4, 3f, x4, 88,0)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x2, 0x2, 1b, x4, 92,0)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x55555554, 0x0, 3f, x4, 96,0)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x0, 0x6, 3f, x4, 100,0)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x4, 0x556, 1b, x4, 104,0)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333332; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x33333332, 0x80, 3f, x4, 108,0)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x66666665, 0x2, 3f, x4, 112,0)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0xb503, 0x0, 1b, x4, 116,0)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x55555556, 0x4, 3f, x4, 120,0)
+
+inst_564:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555555; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, -0x55555555, 0x556, 1b, x4, 124,0)
+
+inst_565:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x6, 0x2, 1b, x4, 128,0)
+
+inst_566:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333334; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x33333334, 0x556, 1b, x4, 132,0)
+
+inst_567:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666667; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0x66666667, 0x0, 3f, x4, 136,0)
+
+inst_568:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, -0xb503, 0x40, 3f, x4, 140,0)
+
+inst_569:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: bge, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb505; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x55555556, 0xb505, 0x4, 1b, x4, 144,0)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x3, 0x6, 1b, x4, 148,0)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555555; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x55555555, 0xa, 1b, x4, 152,0)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, -0x55555556, 0x200, 3f, x4, 156,0)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x5; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x5, 0x200, 3f, x4, 160,0)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333333; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x33333333, 0x80, 3f, x4, 164,0)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666666; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x66666666, 0x4, 1b, x4, 168,0)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, -0xb504, 0x6, 3f, x4, 172,0)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb504; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0xb504, 0x556, 1b, x4, 176,0)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x2, 0x8, 1b, x4, 180,0)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x55555554, 0x2, 1b, x4, 184,0)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x0, 0x100, 3f, x4, 188,0)
+
+inst_581:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x4, 0x40, 3f, x4, 192,0)
+
+inst_582:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x33333332, 0x6, 3f, x4, 196,0)
+
+inst_583:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x66666665, 0x2, 3f, x4, 200,0)
+
+inst_584:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb503; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0xb503, 0x80, 3f, x4, 204,0)
+
+inst_585:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x55555556, 0x6, 3f, x4, 208,0)
+
+inst_586:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555555; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, -0x55555555, 0xa, 1b, x4, 212,0)
+
+inst_587:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x55555555, 0x6, 0x400, 3f, x4, 216,0)
+
+inst_588:
+// rs2_val == 512,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x200; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, 0x0, 0x200, 0xa, 1b, x4, 220,0)
+
+inst_589:
+// rs2_val == 4194304, rs1_val == -4194305
+// opcode: bge, op1:x10; op2:x11; op1val:-0x400001; op2val:0x400000; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x12, x10, x11, -0x400001, 0x400000, 0x40, 3f, x4, 224,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 21*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_1:
+ .fill 57*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/bgeu-01.S b/riscof/suite/rv32i_m/I/bgeu-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..cf51d0ca8b0c1a3ad37905ecb6798045c6e75c41
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/bgeu-01.S
@@ -0,0 +1,3709 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the bgeu instruction of the RISC-V I extension for the bgeu covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",bgeu)
+
+RVTEST_SIGBASE( x9,signature_x9_1)
+
+inst_0:
+// rs1 == rs2, rs1==x2, rs2==x2, rs1_val > 0 and rs2_val > 0, rs2_val == 4294966271, rs1_val == 8, rs1_val > 0 and rs2_val > 0 and rs1_val < rs2_val and imm_val < 0
+// opcode: bgeu, op1:x2; op2:x2; op1val:0x8; op2val:0x8; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x5, x2, x2, 0x8, 0x8, 0x0, 1b, x9, 0,0)
+
+inst_1:
+// rs1 != rs2, rs1==x31, rs2==x3, rs1_val > 0 and rs2_val > 0 and rs1_val == rs2_val and imm_val > 0, rs2_val == 4294967231, rs1_val == 4294967231
+// opcode: bgeu, op1:x31; op2:x3; op1val:0xffffffbf; op2val:0xffffffbf; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x5, x31, x3, 0xffffffbf, 0xffffffbf, 0x200, 3f, x9, 4,0)
+
+inst_2:
+// rs1==x21, rs2==x25, rs1_val > 0 and rs2_val > 0 and rs1_val == rs2_val and imm_val < 0, rs1_val==65535 and rs2_val==65535
+// opcode: bgeu, op1:x21; op2:x25; op1val:0xffff; op2val:0xffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x5, x21, x25, 0xffff, 0xffff, 0x0, 1b, x9, 8,0)
+
+inst_3:
+// rs1==x27, rs2==x13, rs1_val > 0 and rs2_val > 0 and rs1_val > rs2_val and imm_val > 0 , rs1_val == 4294705151, rs2_val == 4293918719
+// opcode: bgeu, op1:x27; op2:x13; op1val:0xfffbffff; op2val:0xffefffff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x5, x27, x13, 0xfffbffff, 0xffefffff, 0x8, 3f, x9, 12,0)
+
+inst_4:
+// rs1==x14, rs2==x29, rs1_val > 0 and rs2_val > 0 and rs1_val > rs2_val and imm_val < 0 , rs1_val==2863311531 and rs2_val==4, rs2_val == 4
+// opcode: bgeu, op1:x14; op2:x29; op1val:0xaaaaaaab; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x5, x14, x29, 0xaaaaaaab, 0x4, 0x6, 1b, x9, 16,0)
+
+inst_5:
+// rs1==x7, rs2==x16, rs1_val > 0 and rs2_val > 0 and rs1_val < rs2_val and imm_val > 0 ,
+// opcode: bgeu, op1:x7; op2:x16; op1val:0x7; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x5, x7, x16, 0x7, 0xb504, 0x400, 3f, x9, 20,0)
+
+inst_6:
+// rs1==x11, rs2==x19, rs2_val == 1, rs1_val==2863311529 and rs2_val==1
+// opcode: bgeu, op1:x11; op2:x19; op1val:0xaaaaaaa9; op2val:0x1; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x5, x11, x19, 0xaaaaaaa9, 0x1, 0x40, 3f, x9, 24,0)
+
+inst_7:
+// rs1==x10, rs2==x21, rs2_val == 2, rs1_val == 2863311530, rs1_val==2863311530 and rs2_val==2
+// opcode: bgeu, op1:x10; op2:x21; op1val:0xaaaaaaaa; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x5, x10, x21, 0xaaaaaaaa, 0x2, 0x40, 3f, x9, 28,0)
+
+inst_8:
+// rs1==x0, rs2==x20, rs2_val == 8, rs1_val == 4294967294
+// opcode: bgeu, op1:x0; op2:x20; op1val:0x0; op2val:0x8; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x5, x0, x20, 0x0, 0x8, 0x400, 1b, x9, 32,0)
+
+inst_9:
+// rs1==x3, rs2==x27, rs2_val == 16,
+// opcode: bgeu, op1:x3; op2:x27; op1val:0xffff; op2val:0x10; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x5, x3, x27, 0xffff, 0x10, 0x2, 1b, x9, 36,0)
+
+inst_10:
+// rs1==x25, rs2==x28, rs2_val == 32,
+// opcode: bgeu, op1:x25; op2:x28; op1val:0x6; op2val:0x20; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x5, x25, x28, 0x6, 0x20, 0x8, 1b, x9, 40,0)
+
+inst_11:
+// rs1==x30, rs2==x0, rs2_val == 64, rs1_val == 4294965247
+// opcode: bgeu, op1:x30; op2:x0; op1val:0xfffff7ff; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x5, x30, x0, 0xfffff7ff, 0x0, 0x8, 1b, x9, 44,0)
+
+inst_12:
+// rs1==x29, rs2==x23, rs2_val == 128,
+// opcode: bgeu, op1:x29; op2:x23; op1val:0xd; op2val:0x80; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x5, x29, x23, 0xd, 0x80, 0x200, 3f, x9, 48,0)
+
+inst_13:
+// rs1==x12, rs2==x8, rs2_val == 256, rs1_val == 4294967167
+// opcode: bgeu, op1:x12; op2:x8; op1val:0xffffff7f; op2val:0x100; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x5, x12, x8, 0xffffff7f, 0x100, 0x200, 3f, x9, 52,0)
+
+inst_14:
+// rs1==x22, rs2==x7, rs2_val == 512,
+// opcode: bgeu, op1:x22; op2:x7; op1val:0xb504; op2val:0x200; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x5, x22, x7, 0xb504, 0x200, 0x4, 3f, x9, 56,0)
+
+inst_15:
+// rs1==x24, rs2==x26, rs2_val == 1024, rs1_val == 16384
+// opcode: bgeu, op1:x24; op2:x26; op1val:0x4000; op2val:0x400; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x5, x24, x26, 0x4000, 0x400, 0x40, 3f, x9, 60,0)
+
+inst_16:
+// rs1==x6, rs2==x22, rs2_val == 2048, rs1_val == 524288
+// opcode: bgeu, op1:x6; op2:x22; op1val:0x80000; op2val:0x800; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x5, x6, x22, 0x80000, 0x800, 0x40, 3f, x9, 64,0)
+
+inst_17:
+// rs1==x4, rs2==x18, rs2_val == 4096,
+// opcode: bgeu, op1:x4; op2:x18; op1val:0x8; op2val:0x1000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x5, x4, x18, 0x8, 0x1000, 0x0, 1b, x9, 68,0)
+
+inst_18:
+// rs1==x1, rs2==x30, rs2_val == 8192,
+// opcode: bgeu, op1:x1; op2:x30; op1val:0xb505; op2val:0x2000; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x5, x1, x30, 0xb505, 0x2000, 0x2, 1b, x9, 72,0)
+
+inst_19:
+// rs1==x5, rs2==x12, rs2_val == 16384,
+// opcode: bgeu, op1:x5; op2:x12; op1val:0xaaaaaaaa; op2val:0x4000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x5, x12, 0xaaaaaaaa, 0x4000, 0x6, 1b, x9, 76,0)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_20:
+// rs1==x16, rs2==x1, rs2_val == 32768, rs1_val == 33554432
+// opcode: bgeu, op1:x16; op2:x1; op1val:0x2000000; op2val:0x8000; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x16, x1, 0x2000000, 0x8000, 0x2, 1b, x2, 0,0)
+
+inst_21:
+// rs1==x26, rs2==x31, rs2_val == 65536,
+// opcode: bgeu, op1:x26; op2:x31; op1val:0xfffff7ff; op2val:0x10000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x26, x31, 0xfffff7ff, 0x10000, 0x6, 3f, x2, 4,0)
+
+inst_22:
+// rs1==x28, rs2==x10, rs2_val == 131072, rs1_val == 3221225471
+// opcode: bgeu, op1:x28; op2:x10; op1val:0xbfffffff; op2val:0x20000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x28, x10, 0xbfffffff, 0x20000, 0x6, 1b, x2, 8,0)
+
+inst_23:
+// rs1==x9, rs2==x24, rs2_val == 262144, rs1_val == 4261412863
+// opcode: bgeu, op1:x9; op2:x24; op1val:0xfdffffff; op2val:0x40000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x9, x24, 0xfdffffff, 0x40000, 0x200, 3f, x2, 12,0)
+
+inst_24:
+// rs1==x15, rs2==x5, rs2_val == 524288,
+// opcode: bgeu, op1:x15; op2:x5; op1val:0x0; op2val:0x80000; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x15, x5, 0x0, 0x80000, 0x400, 1b, x2, 16,0)
+
+inst_25:
+// rs1==x18, rs2==x14, rs2_val == 1048576,
+// opcode: bgeu, op1:x18; op2:x14; op1val:0x55555556; op2val:0x100000; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x18, x14, 0x55555556, 0x100000, 0x20, 3f, x2, 20,0)
+
+inst_26:
+// rs1==x17, rs2==x15, rs2_val == 2097152, rs1_val == 1
+// opcode: bgeu, op1:x17; op2:x15; op1val:0x1; op2val:0x200000; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x17, x15, 0x1, 0x200000, 0x40, 3f, x2, 24,0)
+
+inst_27:
+// rs1==x20, rs2==x17, rs2_val == 4194304,
+// opcode: bgeu, op1:x20; op2:x17; op1val:0xfffff7ff; op2val:0x400000; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x20, x17, 0xfffff7ff, 0x400000, 0x400, 1b, x2, 28,0)
+
+inst_28:
+// rs1==x23, rs2==x11, rs2_val == 8388608,
+// opcode: bgeu, op1:x23; op2:x11; op1val:0x4000; op2val:0x800000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x23, x11, 0x4000, 0x800000, 0x200, 3f, x2, 32,0)
+
+inst_29:
+// rs1==x13, rs2==x4, rs2_val == 16777216, rs1_val == 4294966271
+// opcode: bgeu, op1:x13; op2:x4; op1val:0xfffffbff; op2val:0x1000000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x13, x4, 0xfffffbff, 0x1000000, 0x6, 3f, x2, 36,0)
+
+inst_30:
+// rs1==x19, rs2==x6, rs2_val == 33554432, rs1_val == 128
+// opcode: bgeu, op1:x19; op2:x6; op1val:0x80; op2val:0x2000000; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x19, x6, 0x80, 0x2000000, 0x400, 1b, x2, 40,0)
+
+inst_31:
+// rs1==x8, rs2==x9, rs2_val == 67108864,
+// opcode: bgeu, op1:x8; op2:x9; op1val:0x3; op2val:0x4000000; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x8, x9, 0x3, 0x4000000, 0x2, 1b, x2, 44,0)
+
+inst_32:
+// rs2_val == 134217728, rs1_val == 4294934527
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff7fff; op2val:0x8000000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff7fff, 0x8000000, 0x0, 1b, x2, 48,0)
+
+inst_33:
+// rs2_val == 268435456,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x10000000; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x10000000, 0x40, 3f, x2, 52,0)
+
+inst_34:
+// rs2_val == 536870912, rs1_val == 3758096383
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xdfffffff; op2val:0x20000000; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xdfffffff, 0x20000000, 0x4, 1b, x2, 56,0)
+
+inst_35:
+// rs2_val == 1073741824,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x40000000; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x40000000, 0x2, 1b, x2, 60,0)
+
+inst_36:
+// rs2_val == 2147483648,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x80000000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x80000000, 0x200, 3f, x2, 64,0)
+
+inst_37:
+// rs2_val == 4294967294, rs1_val == 8388608
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x800000; op2val:0xfffffffe; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x800000, 0xfffffffe, 0x4, 3f, x2, 68,0)
+
+inst_38:
+// rs2_val == 4294967293,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffff7ff; op2val:0xfffffffd; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffff7ff, 0xfffffffd, 0x6, 3f, x2, 72,0)
+
+inst_39:
+// rs2_val == 4294967291,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xfffffffb; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0xfffffffb, 0x2, 1b, x2, 76,0)
+
+inst_40:
+// rs2_val == 4294967287, rs1_val == 134217728
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x8000000; op2val:0xfffffff7; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x8000000, 0xfffffff7, 0x2, 3f, x2, 80,0)
+
+inst_41:
+// rs2_val == 4294967279,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xffffffef; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0xffffffef, 0x40, 3f, x2, 84,0)
+
+inst_42:
+// rs2_val == 4294967263,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xffffffdf; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0xffffffdf, 0x8, 3f, x2, 88,0)
+
+inst_43:
+// rs2_val == 4294967167,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x12; op2val:0xffffff7f; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x12, 0xffffff7f, 0x100, 3f, x2, 92,0)
+
+inst_44:
+// rs2_val == 4294967039,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xfffffeff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0xfffffeff, 0x6, 1b, x2, 96,0)
+
+inst_45:
+// rs2_val == 4294966783, rs1_val == 67108864
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4000000; op2val:0xfffffdff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4000000, 0xfffffdff, 0x0, 1b, x2, 100,0)
+
+inst_46:
+// rs2_val == 4294965247,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xfffff7ff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0xfffff7ff, 0x8, 3f, x2, 104,0)
+
+inst_47:
+// rs2_val == 4294963199,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xbfffffff; op2val:0xffffefff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xbfffffff, 0xffffefff, 0x8, 3f, x2, 108,0)
+
+inst_48:
+// rs2_val == 4294959103, rs1_val == 4294966783
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffdff; op2val:0xffffdfff; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffffdff, 0xffffdfff, 0x200, 3f, x2, 112,0)
+
+inst_49:
+// rs2_val == 4294950911,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x8; op2val:0xffffbfff; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x8, 0xffffbfff, 0x10, 3f, x2, 116,0)
+
+inst_50:
+// rs2_val == 4294934527, rs1_val == 4294967039
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffeff; op2val:0xffff7fff; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffffeff, 0xffff7fff, 0x20, 3f, x2, 120,0)
+
+inst_51:
+// rs2_val == 4294901759, rs1_val == 2
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xfffeffff; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0xfffeffff, 0x400, 3f, x2, 124,0)
+
+inst_52:
+// rs2_val == 4294836223, rs1_val == 4294959103
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffdfff; op2val:0xfffdffff; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffffdfff, 0xfffdffff, 0x556, 1b, x2, 128,0)
+
+inst_53:
+// rs2_val == 4294705151,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2000000; op2val:0xfffbffff; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2000000, 0xfffbffff, 0x556, 1b, x2, 132,0)
+
+inst_54:
+// rs2_val == 4294443007,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffbffff; op2val:0xfff7ffff; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffbffff, 0xfff7ffff, 0x556, 1b, x2, 136,0)
+
+inst_55:
+// rs2_val == 4292870143,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4000000; op2val:0xffdfffff; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4000000, 0xffdfffff, 0x80, 3f, x2, 140,0)
+
+inst_56:
+// rs2_val == 4290772991,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffdfff; op2val:0xffbfffff; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffffdfff, 0xffbfffff, 0xa, 1b, x2, 144,0)
+
+inst_57:
+// rs2_val == 4286578687, rs1_val == 16777216
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1000000; op2val:0xff7fffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1000000, 0xff7fffff, 0x0, 1b, x2, 148,0)
+
+inst_58:
+// rs2_val == 4278190079, rs1_val == 4294963199
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffefff; op2val:0xfeffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffffefff, 0xfeffffff, 0x8, 1b, x2, 152,0)
+
+inst_59:
+// rs2_val == 4261412863,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0xfdffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0xfdffffff, 0x4, 3f, x2, 156,0)
+
+inst_60:
+// rs2_val == 4227858431, rs1_val == 1431655765
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xfbffffff; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0xfbffffff, 0x200, 3f, x2, 160,0)
+
+inst_61:
+// rs2_val == 4160749567, rs1_val == 4294950911
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffbfff; op2val:0xf7ffffff; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffffbfff, 0xf7ffffff, 0x100, 3f, x2, 164,0)
+
+inst_62:
+// rs2_val == 4026531839,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4000; op2val:0xefffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4000, 0xefffffff, 0x0, 3f, x2, 168,0)
+
+inst_63:
+// rs2_val == 3758096383, rs1_val == 4
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xdfffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0xdfffffff, 0x4, 1b, x2, 172,0)
+
+inst_64:
+// rs2_val == 3221225471,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xbfffffff; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0xbfffffff, 0x40, 3f, x2, 176,0)
+
+inst_65:
+// rs2_val == 2147483647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x8000000; op2val:0x7fffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x8000000, 0x7fffffff, 0x2, 1b, x2, 180,0)
+
+inst_66:
+// rs2_val == 1431655765, rs1_val == 2097152
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x200000; op2val:0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x200000, 0x55555555, 0x4, 3f, x2, 184,0)
+
+inst_67:
+// rs2_val == 2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffbff; op2val:0xaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffffbff, 0xaaaaaaaa, 0x0, 3f, x2, 188,0)
+
+inst_68:
+// rs1_val == 16,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10; op2val:0x20; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10, 0x20, 0x40, 3f, x2, 192,0)
+
+inst_69:
+// rs1_val == 32,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x20; op2val:0xfffffeff; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x20, 0xfffffeff, 0x556, 1b, x2, 196,0)
+
+inst_70:
+// rs1_val == 64,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x40; op2val:0xf7ffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x40, 0xf7ffffff, 0x0, 3f, x2, 200,0)
+
+inst_71:
+// rs1_val == 256,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100; op2val:0xfffffff7; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x100, 0xfffffff7, 0x400, 3f, x2, 204,0)
+
+inst_72:
+// rs1_val == 512,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x200; op2val:0x400000; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x200, 0x400000, 0x100, 3f, x2, 208,0)
+
+inst_73:
+// rs1_val == 1024,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x400; op2val:0xffffbfff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x400, 0xffffbfff, 0x2, 1b, x2, 212,0)
+
+inst_74:
+// rs1_val == 2048,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x800; op2val:0xaaaaaaaa; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x800, 0xaaaaaaaa, 0x400, 3f, x2, 216,0)
+
+inst_75:
+// rs1_val == 4096,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1000; op2val:0x1000; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1000, 0x1000, 0x4, 3f, x2, 220,0)
+
+inst_76:
+// rs1_val == 8192,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2000; op2val:0x1; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2000, 0x1, 0x556, 1b, x2, 224,0)
+
+inst_77:
+// rs1_val == 32768,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x8000; op2val:0xfffff7ff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x8000, 0xfffff7ff, 0x6, 1b, x2, 228,0)
+
+inst_78:
+// rs1_val == 65536, rs1_val==65536 and rs2_val==1431655765
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x55555555, 0x2, 3f, x2, 232,0)
+
+inst_79:
+// rs1_val == 131072,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x20000; op2val:0x20000; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x20000, 0x20000, 0x2, 3f, x2, 236,0)
+
+inst_80:
+// rs1_val == 262144,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x40000; op2val:0x8000000; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x40000, 0x8000000, 0x10, 3f, x2, 240,0)
+
+inst_81:
+// rs1_val == 1048576,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000; op2val:0x9; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x100000, 0x9, 0x10, 3f, x2, 244,0)
+
+inst_82:
+// rs1_val == 4194304,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x400000; op2val:0x8000; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x400000, 0x8000, 0x100, 3f, x2, 248,0)
+
+inst_83:
+// rs1_val == 268435456,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000000; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000000, 0x55555555, 0x0, 1b, x2, 252,0)
+
+inst_84:
+// rs1_val == 536870912,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x20000000; op2val:0x80; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x20000000, 0x80, 0x556, 1b, x2, 256,0)
+
+inst_85:
+// rs1_val == 1073741824,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x40000000; op2val:0xffffffbf; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x40000000, 0xffffffbf, 0xa, 1b, x2, 260,0)
+
+inst_86:
+// rs1_val == 2147483648,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x80000000; op2val:0x4000000; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x80000000, 0x4000000, 0x100, 3f, x2, 264,0)
+
+inst_87:
+// rs1_val == 4294967293,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffd; op2val:0xfffffffd; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffffffd, 0xfffffffd, 0x40, 3f, x2, 268,0)
+
+inst_88:
+// rs1_val == 4294967291,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffb; op2val:0x40; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffffffb, 0x40, 0x40, 3f, x2, 272,0)
+
+inst_89:
+// rs1_val == 4294967287,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffff7; op2val:0xaaaaaaaa; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffffff7, 0xaaaaaaaa, 0x6, 1b, x2, 276,0)
+
+inst_90:
+// rs1_val == 4294967279,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffef; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffffffef, 0x0, 0x200, 3f, x2, 280,0)
+
+inst_91:
+// rs1_val == 4294967263,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffdf; op2val:0x1; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffffffdf, 0x1, 0x6, 1b, x2, 284,0)
+
+inst_92:
+// rs1_val == 4294901759,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffeffff; op2val:0xffffbfff; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffeffff, 0xffffbfff, 0x10, 3f, x2, 288,0)
+
+inst_93:
+// rs1_val == 4294836223,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffdffff; op2val:0xfffe; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffdffff, 0xfffe, 0x100, 3f, x2, 292,0)
+
+inst_94:
+// rs1_val == 4294443007,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfff7ffff; op2val:0xfffbffff; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfff7ffff, 0xfffbffff, 0x556, 1b, x2, 296,0)
+
+inst_95:
+// rs1_val == 4293918719,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffefffff; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffefffff, 0x2, 0x6, 3f, x2, 300,0)
+
+inst_96:
+// rs1_val == 4292870143,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffdfffff; op2val:0xfffdffff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffdfffff, 0xfffdffff, 0x8, 3f, x2, 304,0)
+
+inst_97:
+// rs1_val == 4290772991,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffbfffff; op2val:0xa; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffbfffff, 0xa, 0x200, 3f, x2, 308,0)
+
+inst_98:
+// rs1_val == 4286578687,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xff7fffff; op2val:0xffffffef; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xff7fffff, 0xffffffef, 0xa, 1b, x2, 312,0)
+
+inst_99:
+// rs1_val == 4278190079,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfeffffff; op2val:0x100; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfeffffff, 0x100, 0x0, 3f, x2, 316,0)
+
+inst_100:
+// rs1_val == 4227858431,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfbffffff; op2val:0xffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfbffffff, 0xffff, 0x2, 3f, x2, 320,0)
+
+inst_101:
+// rs1_val == 4160749567,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xf7ffffff; op2val:0xaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xf7ffffff, 0xaaaaaaaa, 0x4, 1b, x2, 324,0)
+
+inst_102:
+// rs1_val == 4026531839,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xefffffff; op2val:0x12; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xefffffff, 0x12, 0xa, 1b, x2, 328,0)
+
+inst_103:
+// rs1_val == 2147483647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x7fffffff; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x7fffffff, 0x6, 0x100, 3f, x2, 332,0)
+
+inst_104:
+// rs1_val==3 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x3, 0x4, 1b, x2, 336,0)
+
+inst_105:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x55555555; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x55555555, 0xa, 1b, x2, 340,0)
+
+inst_106:
+// rs1_val==3 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xaaaaaaaa; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0xaaaaaaaa, 0x556, 1b, x2, 344,0)
+
+inst_107:
+// rs1_val==3 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x5, 0x4, 1b, x2, 348,0)
+
+inst_108:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x33333333; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x33333333, 0x2, 1b, x2, 352,0)
+
+inst_109:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x66666666, 0x6, 3f, x2, 356,0)
+
+inst_110:
+// rs1_val==3 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0xb504, 0x200, 3f, x2, 360,0)
+
+inst_111:
+// rs1_val==3 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x0, 0x4, 3f, x2, 364,0)
+
+inst_112:
+// rs1_val==3 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0xffff, 0x0, 3f, x2, 368,0)
+
+inst_113:
+// rs1_val==3 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x2, 0x40, 3f, x2, 372,0)
+
+inst_114:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x55555554; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x55555554, 0x100, 3f, x2, 376,0)
+
+inst_115:
+// rs1_val==3 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xaaaaaaa9; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0xaaaaaaa9, 0x10, 3f, x2, 380,0)
+
+inst_116:
+// rs1_val==3 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x4, 0x10, 3f, x2, 384,0)
+
+inst_117:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x33333332, 0x2, 3f, x2, 388,0)
+
+inst_118:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x66666665; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x66666665, 0x100, 3f, x2, 392,0)
+
+inst_119:
+// rs1_val==3 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xb503; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0xb503, 0xa, 1b, x2, 396,0)
+
+inst_120:
+// rs1_val==3 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xfffe; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0xfffe, 0x4, 1b, x2, 400,0)
+
+inst_121:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x55555556, 0x6, 1b, x2, 404,0)
+
+inst_122:
+// rs1_val==3 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0xaaaaaaab, 0x4, 3f, x2, 408,0)
+
+inst_123:
+// rs1_val==3 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x6, 0x400, 1b, x2, 412,0)
+
+inst_124:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x33333334; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x33333334, 0xa, 1b, x2, 416,0)
+
+inst_125:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x66666667; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x66666667, 0x40, 3f, x2, 420,0)
+
+inst_126:
+// rs1_val==3 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0xb505, 0x400, 3f, x2, 424,0)
+
+inst_127:
+// rs1_val==3 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x1; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x1, 0x6, 1b, x2, 428,0)
+
+inst_128:
+// rs1_val==3 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x10000; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x3, 0x10000, 0x8, 1b, x2, 432,0)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x3; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x3, 0x10, 3f, x2, 436,0)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x55555555, 0x2, 3f, x2, 440,0)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xaaaaaaaa; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0xaaaaaaaa, 0x400, 1b, x2, 444,0)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x5, 0x8, 1b, x2, 448,0)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333333; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x33333333, 0x0, 1b, x2, 452,0)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666666; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x66666666, 0x20, 3f, x2, 456,0)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0xb504, 0x4, 1b, x2, 460,0)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x0, 0x4, 1b, x2, 464,0)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xffff; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0xffff, 0x40, 3f, x2, 468,0)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x2, 0x8, 3f, x2, 472,0)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x55555554, 0x0, 1b, x2, 476,0)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xaaaaaaa9; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0xaaaaaaa9, 0x8, 3f, x2, 480,0)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x4, 0x20, 3f, x2, 484,0)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333332; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x33333332, 0x10, 3f, x2, 488,0)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666665; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x66666665, 0x10, 3f, x2, 492,0)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0xb503, 0x4, 3f, x2, 496,0)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xfffe; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0xfffe, 0x2, 3f, x2, 500,0)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x55555556, 0x2, 3f, x2, 504,0)
+
+inst_147:
+// rs1_val==1431655765 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xaaaaaaab; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0xaaaaaaab, 0x400, 1b, x2, 508,0)
+
+inst_148:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x6, 0x400, 3f, x2, 512,0)
+
+inst_149:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333334; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x33333334, 0x40, 3f, x2, 516,0)
+
+inst_150:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666667; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x66666667, 0x20, 3f, x2, 520,0)
+
+inst_151:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb505; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0xb505, 0x556, 1b, x2, 524,0)
+
+inst_152:
+// rs1_val==1431655765 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x1; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x1, 0x200, 3f, x2, 528,0)
+
+inst_153:
+// rs1_val==1431655765 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x10000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555555, 0x10000, 0x6, 1b, x2, 532,0)
+
+inst_154:
+// rs1_val==2863311530 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x3, 0x8, 1b, x2, 536,0)
+
+inst_155:
+// rs1_val==2863311530 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x55555555, 0x2, 1b, x2, 540,0)
+
+inst_156:
+// rs1_val==2863311530 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0xaaaaaaaa, 0x2, 3f, x2, 544,0)
+
+inst_157:
+// rs1_val==2863311530 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x5, 0x556, 1b, x2, 548,0)
+
+inst_158:
+// rs1_val==2863311530 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x33333333; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x33333333, 0x200, 3f, x2, 552,0)
+
+inst_159:
+// rs1_val==2863311530 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x66666666, 0x400, 3f, x2, 556,0)
+
+inst_160:
+// rs1_val==2863311530 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0xb504, 0x200, 3f, x2, 560,0)
+
+inst_161:
+// rs1_val==2863311530 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x0, 0x100, 3f, x2, 564,0)
+
+inst_162:
+// rs1_val==2863311530 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xffff; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0xffff, 0x10, 3f, x2, 568,0)
+
+inst_163:
+// rs1_val==2863311530 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x55555554, 0x2, 1b, x2, 572,0)
+
+inst_164:
+// rs1_val==2863311530 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xaaaaaaa9; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0xaaaaaaa9, 0x400, 1b, x2, 576,0)
+
+inst_165:
+// rs1_val==2863311530 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x4, 0x0, 3f, x2, 580,0)
+
+inst_166:
+// rs1_val==2863311530 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x33333332; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x33333332, 0x556, 1b, x2, 584,0)
+
+inst_167:
+// rs1_val==2863311530 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x66666665; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x66666665, 0x20, 3f, x2, 588,0)
+
+inst_168:
+// rs1_val==2863311530 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xb503; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0xb503, 0x556, 1b, x2, 592,0)
+
+inst_169:
+// rs1_val==2863311530 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xfffe; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0xfffe, 0x40, 3f, x2, 596,0)
+
+inst_170:
+// rs1_val==2863311530 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x55555556, 0x556, 1b, x2, 600,0)
+
+inst_171:
+// rs1_val==2863311530 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xaaaaaaab; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0xaaaaaaab, 0x200, 3f, x2, 604,0)
+
+inst_172:
+// rs1_val==2863311530 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x6, 0x80, 3f, x2, 608,0)
+
+inst_173:
+// rs1_val==2863311530 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x33333334; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x33333334, 0xa, 1b, x2, 612,0)
+
+inst_174:
+// rs1_val==2863311530 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x66666667, 0x8, 3f, x2, 616,0)
+
+inst_175:
+// rs1_val==2863311530 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0xb505, 0x200, 3f, x2, 620,0)
+
+inst_176:
+// rs1_val==2863311530 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x1; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x1, 0x2, 3f, x2, 624,0)
+
+inst_177:
+// rs1_val==2863311530 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x10000; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaaa, 0x10000, 0x20, 3f, x2, 628,0)
+
+inst_178:
+// rs1_val==5 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x3, 0x8, 3f, x2, 632,0)
+
+inst_179:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x55555555; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x55555555, 0x100, 3f, x2, 636,0)
+
+inst_180:
+// rs1_val==5 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0xaaaaaaaa, 0x0, 3f, x2, 640,0)
+
+inst_181:
+// rs1_val==5 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x5, 0x6, 3f, x2, 644,0)
+
+inst_182:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x33333333; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x33333333, 0x100, 3f, x2, 648,0)
+
+inst_183:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x66666666; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x66666666, 0x8, 1b, x2, 652,0)
+
+inst_184:
+// rs1_val==5 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xb504; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0xb504, 0x10, 3f, x2, 656,0)
+
+inst_185:
+// rs1_val==5 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x0, 0x0, 1b, x2, 660,0)
+
+inst_186:
+// rs1_val==5 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xffff; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0xffff, 0x556, 1b, x2, 664,0)
+
+inst_187:
+// rs1_val==5 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x2; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x2, 0x80, 3f, x2, 668,0)
+
+inst_188:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x55555554; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x55555554, 0x556, 1b, x2, 672,0)
+
+inst_189:
+// rs1_val==5 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xaaaaaaa9; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0xaaaaaaa9, 0x6, 1b, x2, 676,0)
+
+inst_190:
+// rs1_val==5 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x4, 0x0, 1b, x2, 680,0)
+
+inst_191:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x33333332, 0x6, 3f, x2, 684,0)
+
+inst_192:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x66666665, 0x400, 3f, x2, 688,0)
+
+inst_193:
+// rs1_val==5 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xb503; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0xb503, 0x80, 3f, x2, 692,0)
+
+inst_194:
+// rs1_val==5 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xfffe; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0xfffe, 0x2, 1b, x2, 696,0)
+
+inst_195:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x55555556, 0x400, 3f, x2, 700,0)
+
+inst_196:
+// rs1_val==5 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0xaaaaaaab, 0x4, 3f, x2, 704,0)
+
+inst_197:
+// rs1_val==5 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x6, 0x4, 3f, x2, 708,0)
+
+inst_198:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x33333334, 0x8, 3f, x2, 712,0)
+
+inst_199:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x66666667; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x66666667, 0x40, 3f, x2, 716,0)
+
+inst_200:
+// rs1_val==5 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xb505; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0xb505, 0x20, 3f, x2, 720,0)
+
+inst_201:
+// rs1_val==5 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x1; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x1, 0x100, 3f, x2, 724,0)
+
+inst_202:
+// rs1_val==5 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x10000; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x5, 0x10000, 0x80, 3f, x2, 728,0)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x3, 0x400, 1b, x2, 732,0)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555555; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x55555555, 0x100, 3f, x2, 736,0)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xaaaaaaaa; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0xaaaaaaaa, 0x6, 3f, x2, 740,0)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x5, 0x100, 3f, x2, 744,0)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333333; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x33333333, 0x2, 3f, x2, 748,0)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666666; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x66666666, 0x20, 3f, x2, 752,0)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb504; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0xb504, 0x100, 3f, x2, 756,0)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x0, 0x400, 3f, x2, 760,0)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xffff; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0xffff, 0x400, 1b, x2, 764,0)
+
+inst_212:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x2, 0x10, 3f, x2, 768,0)
+
+inst_213:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x55555554, 0x2, 3f, x2, 772,0)
+
+inst_214:
+// rs1_val==858993459 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xaaaaaaa9; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0xaaaaaaa9, 0x400, 3f, x2, 776,0)
+
+inst_215:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x4, 0x2, 1b, x2, 780,0)
+
+inst_216:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333332; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x33333332, 0x8, 3f, x2, 784,0)
+
+inst_217:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666665; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x66666665, 0x556, 1b, x2, 788,0)
+
+inst_218:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0xb503, 0x0, 3f, x2, 792,0)
+
+inst_219:
+// rs1_val==858993459 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xfffe; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0xfffe, 0x8, 3f, x2, 796,0)
+
+inst_220:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555556; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x55555556, 0x20, 3f, x2, 800,0)
+
+inst_221:
+// rs1_val==858993459 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xaaaaaaab; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0xaaaaaaab, 0x400, 1b, x2, 804,0)
+
+inst_222:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x6, 0x8, 3f, x2, 808,0)
+
+inst_223:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333334; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x33333334, 0x10, 3f, x2, 812,0)
+
+inst_224:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666667; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x66666667, 0x40, 3f, x2, 816,0)
+
+inst_225:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb505; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0xb505, 0x40, 3f, x2, 820,0)
+
+inst_226:
+// rs1_val==858993459 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x1; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x1, 0x10, 3f, x2, 824,0)
+
+inst_227:
+// rs1_val==858993459 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x10000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333333, 0x10000, 0x6, 1b, x2, 828,0)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x3, 0x6, 1b, x2, 832,0)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x55555555, 0x4, 3f, x2, 836,0)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0xaaaaaaaa, 0x0, 3f, x2, 840,0)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x5, 0x10, 3f, x2, 844,0)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333333; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x33333333, 0x40, 3f, x2, 848,0)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666666; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x66666666, 0x8, 1b, x2, 852,0)
+
+inst_234:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb504; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0xb504, 0x556, 1b, x2, 856,0)
+
+inst_235:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x0, 0x4, 3f, x2, 860,0)
+
+inst_236:
+// rs1_val==1717986918 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xffff; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0xffff, 0x4, 3f, x2, 864,0)
+
+inst_237:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x2, 0x8, 1b, x2, 868,0)
+
+inst_238:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x55555554, 0x4, 1b, x2, 872,0)
+
+inst_239:
+// rs1_val==1717986918 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xaaaaaaa9; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0xaaaaaaa9, 0x400, 3f, x2, 876,0)
+
+inst_240:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x4, 0x8, 1b, x2, 880,0)
+
+inst_241:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333332; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x33333332, 0x8, 3f, x2, 884,0)
+
+inst_242:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x66666665, 0x2, 3f, x2, 888,0)
+
+inst_243:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb503; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0xb503, 0x200, 3f, x2, 892,0)
+
+inst_244:
+// rs1_val==1717986918 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xfffe; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0xfffe, 0x4, 3f, x2, 896,0)
+
+inst_245:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x55555556, 0x400, 1b, x2, 900,0)
+
+inst_246:
+// rs1_val==1717986918 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0xaaaaaaab, 0x4, 3f, x2, 904,0)
+
+inst_247:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x6, 0x200, 3f, x2, 908,0)
+
+inst_248:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x33333334, 0x4, 1b, x2, 912,0)
+
+inst_249:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666667; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x66666667, 0x10, 3f, x2, 916,0)
+
+inst_250:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb505; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0xb505, 0xa, 1b, x2, 920,0)
+
+inst_251:
+// rs1_val==1717986918 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x1, 0x8, 1b, x2, 924,0)
+
+inst_252:
+// rs1_val==1717986918 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x10000; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666666, 0x10000, 0x100, 3f, x2, 928,0)
+
+inst_253:
+// rs1_val==46340 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x3, 0x2, 3f, x2, 932,0)
+
+inst_254:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x55555555, 0x40, 3f, x2, 936,0)
+
+inst_255:
+// rs1_val==46340 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0xaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0xaaaaaaaa, 0x2, 3f, x2, 940,0)
+
+inst_256:
+// rs1_val==46340 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x5; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x5, 0x20, 3f, x2, 944,0)
+
+inst_257:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333333; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x33333333, 0x200, 3f, x2, 948,0)
+
+inst_258:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x66666666, 0x6, 3f, x2, 952,0)
+
+inst_259:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0xb504, 0x0, 3f, x2, 956,0)
+
+inst_260:
+// rs1_val==46340 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x0, 0x0, 1b, x2, 960,0)
+
+inst_261:
+// rs1_val==46340 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0xffff; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0xffff, 0x20, 3f, x2, 964,0)
+
+inst_262:
+// rs1_val==46340 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x2, 0x4, 3f, x2, 968,0)
+
+inst_263:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555554; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x55555554, 0x400, 3f, x2, 972,0)
+
+inst_264:
+// rs1_val==46340 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0xaaaaaaa9; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0xaaaaaaa9, 0x400, 3f, x2, 976,0)
+
+inst_265:
+// rs1_val==46340 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x4, 0x0, 1b, x2, 980,0)
+
+inst_266:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333332; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x33333332, 0x556, 1b, x2, 984,0)
+
+inst_267:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666665; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x66666665, 0x6, 1b, x2, 988,0)
+
+inst_268:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0xb503, 0x2, 1b, x2, 992,0)
+
+inst_269:
+// rs1_val==46340 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0xfffe; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0xfffe, 0x6, 3f, x2, 996,0)
+
+inst_270:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x55555556, 0x80, 3f, x2, 1000,0)
+
+inst_271:
+// rs1_val==46340 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0xaaaaaaab; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0xaaaaaaab, 0x6, 1b, x2, 1004,0)
+
+inst_272:
+// rs1_val==46340 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x6, 0x8, 1b, x2, 1008,0)
+
+inst_273:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333334; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x33333334, 0x0, 1b, x2, 1012,0)
+
+inst_274:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x66666667, 0x4, 1b, x2, 1016,0)
+
+inst_275:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0xb505, 0x6, 3f, x2, 1020,0)
+
+inst_276:
+// rs1_val==46340 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x1; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x1, 0x10, 3f, x2, 1024,0)
+
+inst_277:
+// rs1_val==46340 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504; op2val:0x10000; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb504, 0x10000, 0x2, 1b, x2, 1028,0)
+
+inst_278:
+// rs1_val==0 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x3, 0x2, 1b, x2, 1032,0)
+
+inst_279:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x55555555; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x55555555, 0xa, 1b, x2, 1036,0)
+
+inst_280:
+// rs1_val==0 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0xaaaaaaaa, 0x4, 3f, x2, 1040,0)
+
+inst_281:
+// rs1_val==0 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x5, 0x4, 3f, x2, 1044,0)
+
+inst_282:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x33333333; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x33333333, 0xa, 1b, x2, 1048,0)
+
+inst_283:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x66666666; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x66666666, 0x556, 1b, x2, 1052,0)
+
+inst_284:
+// rs1_val==0 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0xb504, 0x8, 3f, x2, 1056,0)
+
+inst_285:
+// rs1_val==0 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x0, 0x80, 3f, x2, 1060,0)
+
+inst_286:
+// rs1_val==0 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0xffff, 0x2, 1b, x2, 1064,0)
+
+inst_287:
+// rs1_val==0 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x2, 0x8, 1b, x2, 1068,0)
+
+inst_288:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x55555554; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x55555554, 0x100, 3f, x2, 1072,0)
+
+inst_289:
+// rs1_val==0 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xaaaaaaa9; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0xaaaaaaa9, 0x2, 3f, x2, 1076,0)
+
+inst_290:
+// rs1_val==0 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x4, 0x20, 3f, x2, 1080,0)
+
+inst_291:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x33333332, 0x400, 1b, x2, 1084,0)
+
+inst_292:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x66666665; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x66666665, 0x80, 3f, x2, 1088,0)
+
+inst_293:
+// rs1_val==0 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xb503; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0xb503, 0x10, 3f, x2, 1092,0)
+
+inst_294:
+// rs1_val==0 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xfffe; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0xfffe, 0xa, 1b, x2, 1096,0)
+
+inst_295:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x55555556, 0x80, 3f, x2, 1100,0)
+
+inst_296:
+// rs1_val==0 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0xaaaaaaab, 0x4, 1b, x2, 1104,0)
+
+inst_297:
+// rs1_val==0 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x6, 0x2, 3f, x2, 1108,0)
+
+inst_298:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x33333334; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x33333334, 0x556, 1b, x2, 1112,0)
+
+inst_299:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x66666667; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x66666667, 0x0, 1b, x2, 1116,0)
+
+inst_300:
+// rs1_val==0 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0xb505, 0x6, 1b, x2, 1120,0)
+
+inst_301:
+// rs1_val==0 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x1; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x1, 0x400, 1b, x2, 1124,0)
+
+inst_302:
+// rs1_val==0 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x10000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x0, 0x10000, 0x6, 3f, x2, 1128,0)
+
+inst_303:
+// rs1_val==65535 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x3, 0x2, 3f, x2, 1132,0)
+
+inst_304:
+// rs1_val==65535 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x55555555, 0x40, 3f, x2, 1136,0)
+
+inst_305:
+// rs1_val==65535 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0xaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0xaaaaaaaa, 0x2, 1b, x2, 1140,0)
+
+inst_306:
+// rs1_val==65535 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x5, 0x6, 1b, x2, 1144,0)
+
+inst_307:
+// rs1_val==65535 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x33333333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x33333333, 0x6, 1b, x2, 1148,0)
+
+inst_308:
+// rs1_val==65535 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x66666666; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x66666666, 0x40, 3f, x2, 1152,0)
+
+inst_309:
+// rs1_val==65535 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0xb504, 0x400, 3f, x2, 1156,0)
+
+inst_310:
+// rs1_val==65535 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x0, 0x556, 1b, x2, 1160,0)
+
+inst_311:
+// rs1_val==65535 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x2, 0x400, 3f, x2, 1164,0)
+
+inst_312:
+// rs1_val==65535 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x55555554, 0x4, 1b, x2, 1168,0)
+
+inst_313:
+// rs1_val==65535 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0xaaaaaaa9; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0xaaaaaaa9, 0x100, 3f, x2, 1172,0)
+
+inst_314:
+// rs1_val==65535 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x4, 0x400, 1b, x2, 1176,0)
+
+inst_315:
+// rs1_val==65535 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x33333332; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x33333332, 0x556, 1b, x2, 1180,0)
+
+inst_316:
+// rs1_val==65535 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x66666665, 0x2, 1b, x2, 1184,0)
+
+inst_317:
+// rs1_val==65535 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0xb503; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0xb503, 0x556, 1b, x2, 1188,0)
+
+inst_318:
+// rs1_val==65535 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0xfffe; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0xfffe, 0x80, 3f, x2, 1192,0)
+
+inst_319:
+// rs1_val==65535 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x55555556, 0x200, 3f, x2, 1196,0)
+
+inst_320:
+// rs1_val==65535 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0xaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0xaaaaaaab, 0x2, 1b, x2, 1200,0)
+
+inst_321:
+// rs1_val==65535 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x6, 0x200, 3f, x2, 1204,0)
+
+inst_322:
+// rs1_val==65535 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x33333334, 0x8, 3f, x2, 1208,0)
+
+inst_323:
+// rs1_val==65535 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x66666667; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x66666667, 0x6, 3f, x2, 1212,0)
+
+inst_324:
+// rs1_val==65535 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0xb505, 0x8, 1b, x2, 1216,0)
+
+inst_325:
+// rs1_val==65535 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x1, 0x8, 1b, x2, 1220,0)
+
+inst_326:
+// rs1_val==65535 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff; op2val:0x10000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xffff, 0x10000, 0x0, 3f, x2, 1224,0)
+
+inst_327:
+// rs1_val==2 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x3, 0x8, 3f, x2, 1228,0)
+
+inst_328:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x55555555, 0x8, 1b, x2, 1232,0)
+
+inst_329:
+// rs1_val==2 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xaaaaaaaa; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0xaaaaaaaa, 0x400, 1b, x2, 1236,0)
+
+inst_330:
+// rs1_val==2 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x5, 0x10, 3f, x2, 1240,0)
+
+inst_331:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x33333333; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x33333333, 0x556, 1b, x2, 1244,0)
+
+inst_332:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x66666666; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x66666666, 0x8, 1b, x2, 1248,0)
+
+inst_333:
+// rs1_val==2 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0xb504, 0x400, 1b, x2, 1252,0)
+
+inst_334:
+// rs1_val==2 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x0, 0x6, 3f, x2, 1256,0)
+
+inst_335:
+// rs1_val==2 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0xffff, 0x2, 3f, x2, 1260,0)
+
+inst_336:
+// rs1_val==2 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x2, 0x400, 1b, x2, 1264,0)
+
+inst_337:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x55555554; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x55555554, 0x80, 3f, x2, 1268,0)
+
+inst_338:
+// rs1_val==2 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xaaaaaaa9; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0xaaaaaaa9, 0x200, 3f, x2, 1272,0)
+
+inst_339:
+// rs1_val==2 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x4, 0x40, 3f, x2, 1276,0)
+
+inst_340:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x33333332, 0x0, 3f, x2, 1280,0)
+
+inst_341:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x66666665; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x66666665, 0x40, 3f, x2, 1284,0)
+
+inst_342:
+// rs1_val==2 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0xb503, 0x8, 3f, x2, 1288,0)
+
+inst_343:
+// rs1_val==2 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xfffe; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0xfffe, 0x80, 3f, x2, 1292,0)
+
+inst_344:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x55555556, 0x400, 1b, x2, 1296,0)
+
+inst_345:
+// rs1_val==2 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0xaaaaaaab, 0x2, 1b, x2, 1300,0)
+
+inst_346:
+// rs1_val==2 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x6, 0x0, 1b, x2, 1304,0)
+
+inst_347:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x33333334; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x33333334, 0x0, 3f, x2, 1308,0)
+
+inst_348:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x66666667, 0x8, 1b, x2, 1312,0)
+
+inst_349:
+// rs1_val==2 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0xb505, 0x8, 1b, x2, 1316,0)
+
+inst_350:
+// rs1_val==2 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x1; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x1, 0x10, 3f, x2, 1320,0)
+
+inst_351:
+// rs1_val==2 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x10000; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x2, 0x10000, 0x100, 3f, x2, 1324,0)
+
+inst_352:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x3; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x3, 0x10, 3f, x2, 1328,0)
+
+inst_353:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x55555555, 0x20, 3f, x2, 1332,0)
+
+inst_354:
+// rs1_val==1431655764 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0xaaaaaaaa, 0x2, 3f, x2, 1336,0)
+
+inst_355:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x5; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x5, 0xa, 1b, x2, 1340,0)
+
+inst_356:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x33333333, 0x6, 3f, x2, 1344,0)
+
+inst_357:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666666; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x66666666, 0x100, 3f, x2, 1348,0)
+
+inst_358:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb504; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0xb504, 0x20, 3f, x2, 1352,0)
+
+inst_359:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x0, 0x400, 3f, x2, 1356,0)
+
+inst_360:
+// rs1_val==1431655764 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xffff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0xffff, 0x8, 3f, x2, 1360,0)
+
+inst_361:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x2; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x2, 0x20, 3f, x2, 1364,0)
+
+inst_362:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555554; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x55555554, 0x6, 3f, x2, 1368,0)
+
+inst_363:
+// rs1_val==1431655764 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xaaaaaaa9; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0xaaaaaaa9, 0x8, 1b, x2, 1372,0)
+
+inst_364:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x4, 0x400, 3f, x2, 1376,0)
+
+inst_365:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x33333332, 0x400, 1b, x2, 1380,0)
+
+inst_366:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x66666665, 0x2, 1b, x2, 1384,0)
+
+inst_367:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0xb503, 0x20, 3f, x2, 1388,0)
+
+inst_368:
+// rs1_val==1431655764 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xfffe; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0xfffe, 0x40, 3f, x2, 1392,0)
+
+inst_369:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x55555556, 0x400, 3f, x2, 1396,0)
+
+inst_370:
+// rs1_val==1431655764 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xaaaaaaab; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0xaaaaaaab, 0x200, 3f, x2, 1400,0)
+
+inst_371:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x6, 0x8, 1b, x2, 1404,0)
+
+inst_372:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x33333334, 0x4, 3f, x2, 1408,0)
+
+inst_373:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666667; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x66666667, 0x2, 3f, x2, 1412,0)
+
+inst_374:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb505; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0xb505, 0x80, 3f, x2, 1416,0)
+
+inst_375:
+// rs1_val==1431655764 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x1; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x1, 0x0, 3f, x2, 1420,0)
+
+inst_376:
+// rs1_val==1431655764 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x10000; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555554, 0x10000, 0x8, 1b, x2, 1424,0)
+
+inst_377:
+// rs1_val==2863311529 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x3, 0xa, 1b, x2, 1428,0)
+
+inst_378:
+// rs1_val==2863311529 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x55555555, 0x10, 3f, x2, 1432,0)
+
+inst_379:
+// rs1_val==2863311529 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xaaaaaaaa; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0xaaaaaaaa, 0x8, 1b, x2, 1436,0)
+
+inst_380:
+// rs1_val==2863311529 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x5, 0x0, 1b, x2, 1440,0)
+
+inst_381:
+// rs1_val==2863311529 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x33333333; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x33333333, 0x200, 3f, x2, 1444,0)
+
+inst_382:
+// rs1_val==2863311529 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x66666666, 0x6, 3f, x2, 1448,0)
+
+inst_383:
+// rs1_val==2863311529 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0xb504, 0x400, 3f, x2, 1452,0)
+
+inst_384:
+// rs1_val==2863311529 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x0, 0x6, 1b, x2, 1456,0)
+
+inst_385:
+// rs1_val==2863311529 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0xffff, 0x2, 3f, x2, 1460,0)
+
+inst_386:
+// rs1_val==2863311529 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x2, 0x556, 1b, x2, 1464,0)
+
+inst_387:
+// rs1_val==2863311529 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x55555554, 0x0, 3f, x2, 1468,0)
+
+inst_388:
+// rs1_val==2863311529 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xaaaaaaa9; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0xaaaaaaa9, 0x4, 1b, x2, 1472,0)
+
+inst_389:
+// rs1_val==2863311529 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x4; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x4, 0x200, 3f, x2, 1476,0)
+
+inst_390:
+// rs1_val==2863311529 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x33333332; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x33333332, 0x40, 3f, x2, 1480,0)
+
+inst_391:
+// rs1_val==2863311529 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x66666665; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x66666665, 0x556, 1b, x2, 1484,0)
+
+inst_392:
+// rs1_val==2863311529 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xb503; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0xb503, 0x80, 3f, x2, 1488,0)
+
+inst_393:
+// rs1_val==2863311529 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xfffe; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0xfffe, 0x20, 3f, x2, 1492,0)
+
+inst_394:
+// rs1_val==2863311529 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x55555556; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x55555556, 0x20, 3f, x2, 1496,0)
+
+inst_395:
+// rs1_val==2863311529 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xaaaaaaab; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0xaaaaaaab, 0x10, 3f, x2, 1500,0)
+
+inst_396:
+// rs1_val==2863311529 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x6, 0x6, 1b, x2, 1504,0)
+
+inst_397:
+// rs1_val==2863311529 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x33333334; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x33333334, 0x20, 3f, x2, 1508,0)
+
+inst_398:
+// rs1_val==2863311529 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x66666667; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x66666667, 0x400, 3f, x2, 1512,0)
+
+inst_399:
+// rs1_val==2863311529 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0xb505, 0x400, 3f, x2, 1516,0)
+
+inst_400:
+// rs1_val==2863311529 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x10000; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaa9, 0x10000, 0x556, 1b, x2, 1520,0)
+
+inst_401:
+// rs1_val==4 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x3, 0x0, 1b, x2, 1524,0)
+
+inst_402:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x55555555, 0x2, 3f, x2, 1528,0)
+
+inst_403:
+// rs1_val==4 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xaaaaaaaa; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0xaaaaaaaa, 0x80, 3f, x2, 1532,0)
+
+inst_404:
+// rs1_val==4 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x5, 0x400, 1b, x2, 1536,0)
+
+inst_405:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x33333333; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x33333333, 0x100, 3f, x2, 1540,0)
+
+inst_406:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x66666666; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x66666666, 0x200, 3f, x2, 1544,0)
+
+inst_407:
+// rs1_val==4 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0xb504, 0x0, 1b, x2, 1548,0)
+
+inst_408:
+// rs1_val==4 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x0, 0x200, 3f, x2, 1552,0)
+
+inst_409:
+// rs1_val==4 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xffff; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0xffff, 0x20, 3f, x2, 1556,0)
+
+inst_410:
+// rs1_val==4 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x2, 0x4, 3f, x2, 1560,0)
+
+inst_411:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x55555554; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x55555554, 0x6, 3f, x2, 1564,0)
+
+inst_412:
+// rs1_val==4 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xaaaaaaa9; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0xaaaaaaa9, 0x80, 3f, x2, 1568,0)
+
+inst_413:
+// rs1_val==4 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x4, 0x556, 1b, x2, 1572,0)
+
+inst_414:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x33333332, 0x6, 3f, x2, 1576,0)
+
+inst_415:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x66666665; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x66666665, 0x0, 3f, x2, 1580,0)
+
+inst_416:
+// rs1_val==4 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xb503; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0xb503, 0xa, 1b, x2, 1584,0)
+
+inst_417:
+// rs1_val==4 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xfffe; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0xfffe, 0x200, 3f, x2, 1588,0)
+
+inst_418:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x55555556, 0x4, 1b, x2, 1592,0)
+
+inst_419:
+// rs1_val==4 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xaaaaaaab; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0xaaaaaaab, 0x10, 3f, x2, 1596,0)
+
+inst_420:
+// rs1_val==4 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x6, 0x6, 3f, x2, 1600,0)
+
+inst_421:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x33333334; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x33333334, 0x6, 1b, x2, 1604,0)
+
+inst_422:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x66666667; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x66666667, 0x200, 3f, x2, 1608,0)
+
+inst_423:
+// rs1_val==4 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xb505; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0xb505, 0x0, 3f, x2, 1612,0)
+
+inst_424:
+// rs1_val==4 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x1; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x1, 0x6, 1b, x2, 1616,0)
+
+inst_425:
+// rs1_val==4 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x10000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x4, 0x10000, 0x200, 3f, x2, 1620,0)
+
+inst_426:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x3, 0x4, 1b, x2, 1624,0)
+
+inst_427:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x55555555, 0x6, 1b, x2, 1628,0)
+
+inst_428:
+// rs1_val==858993458 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xaaaaaaaa; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0xaaaaaaaa, 0x8, 3f, x2, 1632,0)
+
+inst_429:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x5, 0x8, 1b, x2, 1636,0)
+
+inst_430:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x33333333, 0x6, 1b, x2, 1640,0)
+
+inst_431:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666666; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x66666666, 0x4, 3f, x2, 1644,0)
+
+inst_432:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb504; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0xb504, 0x40, 3f, x2, 1648,0)
+
+inst_433:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x0, 0x4, 1b, x2, 1652,0)
+
+inst_434:
+// rs1_val==858993458 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0xffff, 0x2, 3f, x2, 1656,0)
+
+inst_435:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x2, 0x400, 1b, x2, 1660,0)
+
+inst_436:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x55555554, 0x4, 1b, x2, 1664,0)
+
+inst_437:
+// rs1_val==858993458 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xaaaaaaa9; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0xaaaaaaa9, 0x0, 1b, x2, 1668,0)
+
+inst_438:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x4, 0x0, 1b, x2, 1672,0)
+
+inst_439:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333332; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x33333332, 0x8, 3f, x2, 1676,0)
+
+inst_440:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666665; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x66666665, 0x0, 1b, x2, 1680,0)
+
+inst_441:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0xb503, 0x400, 3f, x2, 1684,0)
+
+inst_442:
+// rs1_val==858993458 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xfffe; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0xfffe, 0x40, 3f, x2, 1688,0)
+
+inst_443:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x55555556, 0x400, 1b, x2, 1692,0)
+
+inst_444:
+// rs1_val==858993458 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0xaaaaaaab, 0x4, 3f, x2, 1696,0)
+
+inst_445:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x6, 0x4, 1b, x2, 1700,0)
+
+inst_446:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333334; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x33333334, 0x20, 3f, x2, 1704,0)
+
+inst_447:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666667; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x66666667, 0x6, 3f, x2, 1708,0)
+
+inst_448:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb505; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0xb505, 0x20, 3f, x2, 1712,0)
+
+inst_449:
+// rs1_val==858993458 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x1; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x1, 0x100, 3f, x2, 1716,0)
+
+inst_450:
+// rs1_val==858993458 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x10000; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333332, 0x10000, 0x556, 1b, x2, 1720,0)
+
+inst_451:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x3, 0x400, 3f, x2, 1724,0)
+
+inst_452:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x55555555, 0x2, 1b, x2, 1728,0)
+
+inst_453:
+// rs1_val==1717986917 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xaaaaaaaa; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0xaaaaaaaa, 0x556, 1b, x2, 1732,0)
+
+inst_454:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x5, 0x6, 1b, x2, 1736,0)
+
+inst_455:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333333; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x33333333, 0x200, 3f, x2, 1740,0)
+
+inst_456:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666666; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x66666666, 0x556, 1b, x2, 1744,0)
+
+inst_457:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0xb504, 0x0, 1b, x2, 1748,0)
+
+inst_458:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x0, 0x400, 1b, x2, 1752,0)
+
+inst_459:
+// rs1_val==1717986917 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xffff; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0xffff, 0x556, 1b, x2, 1756,0)
+
+inst_460:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x2, 0x556, 1b, x2, 1760,0)
+
+inst_461:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x55555554, 0x2, 1b, x2, 1764,0)
+
+inst_462:
+// rs1_val==1717986917 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xaaaaaaa9; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0xaaaaaaa9, 0x0, 1b, x2, 1768,0)
+
+inst_463:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x4, 0x6, 3f, x2, 1772,0)
+
+inst_464:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333332; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x33333332, 0x200, 3f, x2, 1776,0)
+
+inst_465:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666665; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x66666665, 0x0, 3f, x2, 1780,0)
+
+inst_466:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0xb503, 0x6, 3f, x2, 1784,0)
+
+inst_467:
+// rs1_val==1717986917 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xfffe; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0xfffe, 0x400, 3f, x2, 1788,0)
+
+inst_468:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x55555556, 0x400, 1b, x2, 1792,0)
+
+inst_469:
+// rs1_val==1717986917 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x1; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x1, 0x6, 3f, x2, 1796,0)
+
+inst_470:
+// rs1_val==1717986917 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x10000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x10000, 0x0, 3f, x2, 1800,0)
+
+inst_471:
+// rs1_val==46339 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x3, 0x200, 3f, x2, 1804,0)
+
+inst_472:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555555; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x55555555, 0x80, 3f, x2, 1808,0)
+
+inst_473:
+// rs1_val==46339 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0xaaaaaaaa; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0xaaaaaaaa, 0x10, 3f, x2, 1812,0)
+
+inst_474:
+// rs1_val==46339 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x5, 0x0, 3f, x2, 1816,0)
+
+inst_475:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333333; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x33333333, 0x556, 1b, x2, 1820,0)
+
+inst_476:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666666; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x66666666, 0x200, 3f, x2, 1824,0)
+
+inst_477:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0xb504, 0x6, 3f, x2, 1828,0)
+
+inst_478:
+// rs1_val==46339 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x0, 0x2, 1b, x2, 1832,0)
+
+inst_479:
+// rs1_val==46339 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0xffff; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0xffff, 0x80, 3f, x2, 1836,0)
+
+inst_480:
+// rs1_val==46339 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x2, 0x8, 3f, x2, 1840,0)
+
+inst_481:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555554; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x55555554, 0x100, 3f, x2, 1844,0)
+
+inst_482:
+// rs1_val==46339 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0xaaaaaaa9; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0xaaaaaaa9, 0x400, 3f, x2, 1848,0)
+
+inst_483:
+// rs1_val==46339 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x4; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x4, 0x100, 3f, x2, 1852,0)
+
+inst_484:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333332; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x33333332, 0x40, 3f, x2, 1856,0)
+
+inst_485:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666665; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x66666665, 0x0, 1b, x2, 1860,0)
+
+inst_486:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0xb503, 0x2, 3f, x2, 1864,0)
+
+inst_487:
+// rs1_val==46339 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0xfffe; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0xfffe, 0x4, 1b, x2, 1868,0)
+
+inst_488:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x55555556, 0x6, 3f, x2, 1872,0)
+
+inst_489:
+// rs1_val==46339 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0xaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0xaaaaaaab, 0x2, 3f, x2, 1876,0)
+
+inst_490:
+// rs1_val==46339 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x6, 0x4, 1b, x2, 1880,0)
+
+inst_491:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333334; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x33333334, 0x40, 3f, x2, 1884,0)
+
+inst_492:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666667; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x66666667, 0x80, 3f, x2, 1888,0)
+
+inst_493:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0xb505, 0x6, 3f, x2, 1892,0)
+
+inst_494:
+// rs1_val==46339 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x1, 0x8, 1b, x2, 1896,0)
+
+inst_495:
+// rs1_val==46339 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb503; op2val:0x10000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb503, 0x10000, 0x0, 1b, x2, 1900,0)
+
+inst_496:
+// rs1_val==65534 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x3, 0x4, 1b, x2, 1904,0)
+
+inst_497:
+// rs1_val==65534 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x55555555, 0x10, 3f, x2, 1908,0)
+
+inst_498:
+// rs1_val==65534 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xaaaaaaaa; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0xaaaaaaaa, 0x10, 3f, x2, 1912,0)
+
+inst_499:
+// rs1_val==65534 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x5, 0x0, 3f, x2, 1916,0)
+
+inst_500:
+// rs1_val==65534 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x33333333, 0x4, 1b, x2, 1920,0)
+
+inst_501:
+// rs1_val==65534 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x66666666; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x66666666, 0x4, 1b, x2, 1924,0)
+
+inst_502:
+// rs1_val==65534 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xb504; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0xb504, 0x100, 3f, x2, 1928,0)
+
+inst_503:
+// rs1_val==65534 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x0, 0x100, 3f, x2, 1932,0)
+
+inst_504:
+// rs1_val==65534 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0xffff, 0x6, 3f, x2, 1936,0)
+
+inst_505:
+// rs1_val==65534 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x2, 0xa, 1b, x2, 1940,0)
+
+inst_506:
+// rs1_val==65534 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x55555554, 0x2, 1b, x2, 1944,0)
+
+inst_507:
+// rs1_val==65534 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xaaaaaaa9; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0xaaaaaaa9, 0x80, 3f, x2, 1948,0)
+
+inst_508:
+// rs1_val==65534 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x4, 0x80, 3f, x2, 1952,0)
+
+inst_509:
+// rs1_val==65534 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x33333332; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x33333332, 0x4, 1b, x2, 1956,0)
+
+inst_510:
+// rs1_val==65534 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x66666665; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x66666665, 0x8, 1b, x2, 1960,0)
+
+inst_511:
+// rs1_val==65534 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0xb503, 0x20, 3f, x2, 1964,0)
+
+inst_512:
+// rs1_val==65534 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xfffe; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0xfffe, 0x400, 3f, x2, 1968,0)
+
+inst_513:
+// rs1_val==65534 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x55555556, 0x0, 1b, x2, 1972,0)
+
+inst_514:
+// rs1_val==65534 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xaaaaaaab; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0xaaaaaaab, 0x80, 3f, x2, 1976,0)
+
+inst_515:
+// rs1_val==65534 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x6, 0x2, 1b, x2, 1980,0)
+
+inst_516:
+// rs1_val==65534 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x33333334; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x33333334, 0x100, 3f, x2, 1984,0)
+
+inst_517:
+// rs1_val==65534 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x66666667; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x66666667, 0x2, 1b, x2, 1988,0)
+
+inst_518:
+// rs1_val==65534 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xb505; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0xb505, 0x0, 1b, x2, 1992,0)
+
+inst_519:
+// rs1_val==65534 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x1; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x1, 0x40, 3f, x2, 1996,0)
+
+inst_520:
+// rs1_val==65534 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x10000; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffe, 0x10000, 0x20, 3f, x2, 2000,0)
+
+inst_521:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x3, 0x8, 3f, x2, 2004,0)
+
+inst_522:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555555; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x55555555, 0x100, 3f, x2, 2008,0)
+
+inst_523:
+// rs1_val==1431655766 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xaaaaaaaa; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0xaaaaaaaa, 0x6, 3f, x2, 2012,0)
+
+inst_524:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x5, 0x2, 1b, x2, 2016,0)
+
+inst_525:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333333; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x33333333, 0x20, 3f, x2, 2020,0)
+
+inst_526:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x66666666, 0x2, 3f, x2, 2024,0)
+
+inst_527:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0xb504, 0x6, 1b, x2, 2028,0)
+
+inst_528:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x0, 0x200, 3f, x2, 2032,0)
+
+inst_529:
+// rs1_val==1431655766 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xffff; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0xffff, 0xa, 1b, x2, 2036,0)
+
+inst_530:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x2, 0x40, 3f, x2, 2040,0)
+
+inst_531:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555554; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x55555554, 0x20, 3f, x2, 2044,0)
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_532:
+// rs1_val==1431655766 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xaaaaaaa9; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0xaaaaaaa9, 0x40, 3f, x2, 0,0)
+
+inst_533:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x4, 0xa, 1b, x2, 4,0)
+
+inst_534:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333332; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x33333332, 0x80, 3f, x2, 8,0)
+
+inst_535:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666665; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x66666665, 0x200, 3f, x2, 12,0)
+
+inst_536:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0xb503, 0x8, 1b, x2, 16,0)
+
+inst_537:
+// rs1_val==1431655766 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xfffe; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0xfffe, 0x10, 3f, x2, 20,0)
+
+inst_538:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x55555556, 0x0, 3f, x2, 24,0)
+
+inst_539:
+// rs1_val==1431655766 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xaaaaaaab; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0xaaaaaaab, 0x556, 1b, x2, 28,0)
+
+inst_540:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x6, 0x6, 1b, x2, 32,0)
+
+inst_541:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333334; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x33333334, 0x200, 3f, x2, 36,0)
+
+inst_542:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666667; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x66666667, 0x2, 3f, x2, 40,0)
+
+inst_543:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb505; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0xb505, 0x0, 1b, x2, 44,0)
+
+inst_544:
+// rs1_val==1431655766 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x1; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x1, 0x0, 1b, x2, 48,0)
+
+inst_545:
+// rs1_val==1431655766 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x10000; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x55555556, 0x10000, 0x20, 3f, x2, 52,0)
+
+inst_546:
+// rs1_val==2863311531 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x3, 0x80, 3f, x2, 56,0)
+
+inst_547:
+// rs1_val==2863311531 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x55555555; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x55555555, 0x100, 3f, x2, 60,0)
+
+inst_548:
+// rs1_val==2863311531 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0xaaaaaaaa, 0x4, 3f, x2, 64,0)
+
+inst_549:
+// rs1_val==2863311531 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x5, 0x40, 3f, x2, 68,0)
+
+inst_550:
+// rs1_val==2863311531 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x33333333; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x33333333, 0x40, 3f, x2, 72,0)
+
+inst_551:
+// rs1_val==2863311531 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x66666666; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x66666666, 0x0, 3f, x2, 76,0)
+
+inst_552:
+// rs1_val==2863311531 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0xb504, 0x200, 3f, x2, 80,0)
+
+inst_553:
+// rs1_val==2863311531 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x0, 0x400, 1b, x2, 84,0)
+
+inst_554:
+// rs1_val==2863311531 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0xffff, 0x2, 1b, x2, 88,0)
+
+inst_555:
+// rs1_val==2863311531 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x2, 0x400, 3f, x2, 92,0)
+
+inst_556:
+// rs1_val==2863311531 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x55555554, 0x2, 1b, x2, 96,0)
+
+inst_557:
+// rs1_val==2863311531 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xaaaaaaa9; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0xaaaaaaa9, 0x80, 3f, x2, 100,0)
+
+inst_558:
+// rs1_val==2863311531 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x33333332, 0x6, 3f, x2, 104,0)
+
+inst_559:
+// rs1_val==2863311531 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x66666665; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x66666665, 0x80, 3f, x2, 108,0)
+
+inst_560:
+// rs1_val==2863311531 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0xb503, 0x6, 1b, x2, 112,0)
+
+inst_561:
+// rs1_val==2863311531 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xfffe; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0xfffe, 0x0, 1b, x2, 116,0)
+
+inst_562:
+// rs1_val==2863311531 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x55555556; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x55555556, 0xa, 1b, x2, 120,0)
+
+inst_563:
+// rs1_val==2863311531 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xaaaaaaab; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0xaaaaaaab, 0x100, 3f, x2, 124,0)
+
+inst_564:
+// rs1_val==2863311531 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x6, 0xa, 1b, x2, 128,0)
+
+inst_565:
+// rs1_val==2863311531 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x33333334; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x33333334, 0x400, 3f, x2, 132,0)
+
+inst_566:
+// rs1_val==2863311531 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x66666667; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x66666667, 0x40, 3f, x2, 136,0)
+
+inst_567:
+// rs1_val==2863311531 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xb505; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0xb505, 0xa, 1b, x2, 140,0)
+
+inst_568:
+// rs1_val==2863311531 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x1; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x1, 0x100, 3f, x2, 144,0)
+
+inst_569:
+// rs1_val==2863311531 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x10000; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xaaaaaaab, 0x10000, 0x4, 3f, x2, 148,0)
+
+inst_570:
+// rs1_val==6 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x3, 0x8, 3f, x2, 152,0)
+
+inst_571:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x55555555; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x55555555, 0x200, 3f, x2, 156,0)
+
+inst_572:
+// rs1_val==6 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0xaaaaaaaa, 0x4, 1b, x2, 160,0)
+
+inst_573:
+// rs1_val==6 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x5, 0x6, 3f, x2, 164,0)
+
+inst_574:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x33333333; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x33333333, 0x8, 3f, x2, 168,0)
+
+inst_575:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x66666666; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x66666666, 0x100, 3f, x2, 172,0)
+
+inst_576:
+// rs1_val==6 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0xb504, 0x6, 3f, x2, 176,0)
+
+inst_577:
+// rs1_val==6 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x0, 0x556, 1b, x2, 180,0)
+
+inst_578:
+// rs1_val==6 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0xffff, 0x6, 3f, x2, 184,0)
+
+inst_579:
+// rs1_val==6 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x2, 0x6, 3f, x2, 188,0)
+
+inst_580:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x55555554; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x55555554, 0x200, 3f, x2, 192,0)
+
+inst_581:
+// rs1_val==6 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xaaaaaaa9; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0xaaaaaaa9, 0x4, 1b, x2, 196,0)
+
+inst_582:
+// rs1_val==6 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x4, 0xa, 1b, x2, 200,0)
+
+inst_583:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x33333332; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x33333332, 0xa, 1b, x2, 204,0)
+
+inst_584:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x66666665; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x66666665, 0x4, 1b, x2, 208,0)
+
+inst_585:
+// rs1_val==6 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xb503; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0xb503, 0xa, 1b, x2, 212,0)
+
+inst_586:
+// rs1_val==6 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xfffe; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0xfffe, 0x4, 1b, x2, 216,0)
+
+inst_587:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x55555556, 0x4, 3f, x2, 220,0)
+
+inst_588:
+// rs1_val==6 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xaaaaaaab; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0xaaaaaaab, 0x6, 3f, x2, 224,0)
+
+inst_589:
+// rs1_val==6 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x6, 0x4, 1b, x2, 228,0)
+
+inst_590:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x33333334, 0x8, 3f, x2, 232,0)
+
+inst_591:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x66666667; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x66666667, 0x0, 1b, x2, 236,0)
+
+inst_592:
+// rs1_val==6 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0xb505, 0x6, 1b, x2, 240,0)
+
+inst_593:
+// rs1_val==6 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x1; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x1, 0x100, 3f, x2, 244,0)
+
+inst_594:
+// rs1_val==6 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x10000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x6, 0x10000, 0x6, 1b, x2, 248,0)
+
+inst_595:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x3, 0x20, 3f, x2, 252,0)
+
+inst_596:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x55555555, 0x2, 3f, x2, 256,0)
+
+inst_597:
+// rs1_val==1717986917 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0xaaaaaaab, 0x2, 3f, x2, 260,0)
+
+inst_598:
+// rs1_val==858993460 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0xaaaaaaaa, 0x2, 1b, x2, 264,0)
+
+inst_599:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x5, 0x400, 1b, x2, 268,0)
+
+inst_600:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x33333333, 0x6, 1b, x2, 272,0)
+
+inst_601:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666666; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x66666666, 0x40, 3f, x2, 276,0)
+
+inst_602:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0xb504, 0x400, 1b, x2, 280,0)
+
+inst_603:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x0, 0x200, 3f, x2, 284,0)
+
+inst_604:
+// rs1_val==858993460 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xffff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0xffff, 0x8, 3f, x2, 288,0)
+
+inst_605:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x2, 0x6, 1b, x2, 292,0)
+
+inst_606:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555554; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x55555554, 0x400, 3f, x2, 296,0)
+
+inst_607:
+// rs1_val==858993460 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xaaaaaaa9; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0xaaaaaaa9, 0x400, 1b, x2, 300,0)
+
+inst_608:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x4, 0x400, 3f, x2, 304,0)
+
+inst_609:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x33333332, 0x2, 1b, x2, 308,0)
+
+inst_610:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666665; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x66666665, 0x20, 3f, x2, 312,0)
+
+inst_611:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb503; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0xb503, 0x200, 3f, x2, 316,0)
+
+inst_612:
+// rs1_val==858993460 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xfffe; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0xfffe, 0xa, 1b, x2, 320,0)
+
+inst_613:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x55555556, 0x400, 3f, x2, 324,0)
+
+inst_614:
+// rs1_val==858993460 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xaaaaaaab; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0xaaaaaaab, 0x80, 3f, x2, 328,0)
+
+inst_615:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x6, 0xa, 1b, x2, 332,0)
+
+inst_616:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x33333334, 0x4, 3f, x2, 336,0)
+
+inst_617:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666667; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x66666667, 0x0, 1b, x2, 340,0)
+
+inst_618:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb505; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0xb505, 0x0, 1b, x2, 344,0)
+
+inst_619:
+// rs1_val==858993460 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x1; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x1, 0x2, 3f, x2, 348,0)
+
+inst_620:
+// rs1_val==858993460 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x10000; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x33333334, 0x10000, 0xa, 1b, x2, 352,0)
+
+inst_621:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x3, 0x2, 3f, x2, 356,0)
+
+inst_622:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x55555555, 0x8, 3f, x2, 360,0)
+
+inst_623:
+// rs1_val==1717986919 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xaaaaaaaa; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0xaaaaaaaa, 0xa, 1b, x2, 364,0)
+
+inst_624:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x5, 0x6, 3f, x2, 368,0)
+
+inst_625:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x33333333, 0x400, 1b, x2, 372,0)
+
+inst_626:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666666; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x66666666, 0x40, 3f, x2, 376,0)
+
+inst_627:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0xb504, 0x200, 3f, x2, 380,0)
+
+inst_628:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x0, 0x4, 3f, x2, 384,0)
+
+inst_629:
+// rs1_val==1717986919 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xffff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0xffff, 0x8, 3f, x2, 388,0)
+
+inst_630:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x2, 0x40, 3f, x2, 392,0)
+
+inst_631:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x55555554, 0x2, 3f, x2, 396,0)
+
+inst_632:
+// rs1_val==1717986919 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xaaaaaaa9; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0xaaaaaaa9, 0x40, 3f, x2, 400,0)
+
+inst_633:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x4; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x4, 0x200, 3f, x2, 404,0)
+
+inst_634:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x33333332, 0x400, 1b, x2, 408,0)
+
+inst_635:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666665; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x66666665, 0x10, 3f, x2, 412,0)
+
+inst_636:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0xb503, 0x0, 3f, x2, 416,0)
+
+inst_637:
+// rs1_val==1717986919 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xfffe; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0xfffe, 0x400, 3f, x2, 420,0)
+
+inst_638:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x55555556, 0x556, 1b, x2, 424,0)
+
+inst_639:
+// rs1_val==1717986919 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xaaaaaaab; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0xaaaaaaab, 0x8, 3f, x2, 428,0)
+
+inst_640:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x6, 0x80, 3f, x2, 432,0)
+
+inst_641:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x33333334, 0x8, 1b, x2, 436,0)
+
+inst_642:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x66666667, 0x4, 1b, x2, 440,0)
+
+inst_643:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb505; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0xb505, 0x40, 3f, x2, 444,0)
+
+inst_644:
+// rs1_val==1717986919 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x1; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x1, 0x2, 3f, x2, 448,0)
+
+inst_645:
+// rs1_val==1717986919 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x10000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666667, 0x10000, 0x0, 1b, x2, 452,0)
+
+inst_646:
+// rs1_val==46341 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x3, 0x8, 3f, x2, 456,0)
+
+inst_647:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x55555555, 0x0, 1b, x2, 460,0)
+
+inst_648:
+// rs1_val==46341 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0xaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0xaaaaaaaa, 0x0, 1b, x2, 464,0)
+
+inst_649:
+// rs1_val==46341 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x5, 0x80, 3f, x2, 468,0)
+
+inst_650:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333333; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x33333333, 0x2, 3f, x2, 472,0)
+
+inst_651:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666666; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x66666666, 0x8, 1b, x2, 476,0)
+
+inst_652:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0xb504, 0x8, 3f, x2, 480,0)
+
+inst_653:
+// rs1_val==46341 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x0, 0x8, 3f, x2, 484,0)
+
+inst_654:
+// rs1_val==46341 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0xffff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0xffff, 0x8, 1b, x2, 488,0)
+
+inst_655:
+// rs1_val==46341 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x2, 0x0, 1b, x2, 492,0)
+
+inst_656:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555554; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x55555554, 0x40, 3f, x2, 496,0)
+
+inst_657:
+// rs1_val==46341 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0xaaaaaaa9; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0xaaaaaaa9, 0x2, 3f, x2, 500,0)
+
+inst_658:
+// rs1_val==46341 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x4, 0x10, 3f, x2, 504,0)
+
+inst_659:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x33333332, 0x2, 1b, x2, 508,0)
+
+inst_660:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x66666665, 0x400, 1b, x2, 512,0)
+
+inst_661:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0xb503, 0x400, 1b, x2, 516,0)
+
+inst_662:
+// rs1_val==46341 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0xfffe; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0xfffe, 0x20, 3f, x2, 520,0)
+
+inst_663:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555556; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x55555556, 0x20, 3f, x2, 524,0)
+
+inst_664:
+// rs1_val==46341 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0xaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0xaaaaaaab, 0x4, 1b, x2, 528,0)
+
+inst_665:
+// rs1_val==46341 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x6, 0x0, 1b, x2, 532,0)
+
+inst_666:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x33333334, 0x4, 3f, x2, 536,0)
+
+inst_667:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666667; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x66666667, 0x40, 3f, x2, 540,0)
+
+inst_668:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0xb505; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0xb505, 0x80, 3f, x2, 544,0)
+
+inst_669:
+// rs1_val==46341 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x1; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x1, 0x2, 3f, x2, 548,0)
+
+inst_670:
+// rs1_val==46341 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb505; op2val:0x10000; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xb505, 0x10000, 0x8, 1b, x2, 552,0)
+
+inst_671:
+// rs1_val==1 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x3, 0x0, 1b, x2, 556,0)
+
+inst_672:
+// rs1_val==1 and rs2_val==1431655765,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x55555555; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x55555555, 0xa, 1b, x2, 560,0)
+
+inst_673:
+// rs1_val==1 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xaaaaaaaa; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0xaaaaaaaa, 0x20, 3f, x2, 564,0)
+
+inst_674:
+// rs1_val==1 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x5, 0x40, 3f, x2, 568,0)
+
+inst_675:
+// rs1_val==1 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x33333333; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x33333333, 0x2, 3f, x2, 572,0)
+
+inst_676:
+// rs1_val==1 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x66666666; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x66666666, 0x0, 1b, x2, 576,0)
+
+inst_677:
+// rs1_val==1 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xb504; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0xb504, 0x100, 3f, x2, 580,0)
+
+inst_678:
+// rs1_val==1 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x0, 0x556, 1b, x2, 584,0)
+
+inst_679:
+// rs1_val==1 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xffff; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0xffff, 0x4, 3f, x2, 588,0)
+
+inst_680:
+// rs1_val==1 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x2, 0x100, 3f, x2, 592,0)
+
+inst_681:
+// rs1_val==1 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x55555554, 0x4, 3f, x2, 596,0)
+
+inst_682:
+// rs1_val==1 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xaaaaaaa9; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0xaaaaaaa9, 0x400, 1b, x2, 600,0)
+
+inst_683:
+// rs1_val==1 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x4, 0x80, 3f, x2, 604,0)
+
+inst_684:
+// rs1_val==1 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x33333332, 0x400, 3f, x2, 608,0)
+
+inst_685:
+// rs1_val==1 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x66666665; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x66666665, 0x100, 3f, x2, 612,0)
+
+inst_686:
+// rs1_val==1 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xb503; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0xb503, 0x200, 3f, x2, 616,0)
+
+inst_687:
+// rs1_val==1 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xfffe; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0xfffe, 0x8, 1b, x2, 620,0)
+
+inst_688:
+// rs1_val==1 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x55555556, 0x80, 3f, x2, 624,0)
+
+inst_689:
+// rs1_val==1 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xaaaaaaab; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0xaaaaaaab, 0x8, 3f, x2, 628,0)
+
+inst_690:
+// rs1_val==1 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x6, 0x20, 3f, x2, 632,0)
+
+inst_691:
+// rs1_val==1 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x33333334, 0x2, 3f, x2, 636,0)
+
+inst_692:
+// rs1_val==1 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x66666667; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x66666667, 0x6, 3f, x2, 640,0)
+
+inst_693:
+// rs1_val==1 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xb505; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0xb505, 0x4, 3f, x2, 644,0)
+
+inst_694:
+// rs1_val==1 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x1; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x1, 0x2, 3f, x2, 648,0)
+
+inst_695:
+// rs1_val==1 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x10000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x1, 0x10000, 0x0, 1b, x2, 652,0)
+
+inst_696:
+// rs1_val==65536 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x3, 0x20, 3f, x2, 656,0)
+
+inst_697:
+// rs1_val==65536 and rs2_val==2863311530,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0xaaaaaaaa; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0xaaaaaaaa, 0x100, 3f, x2, 660,0)
+
+inst_698:
+// rs1_val==65536 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x5, 0x400, 3f, x2, 664,0)
+
+inst_699:
+// rs1_val==65536 and rs2_val==858993459,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x33333333; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x33333333, 0x10, 3f, x2, 668,0)
+
+inst_700:
+// rs1_val==65536 and rs2_val==1717986918,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x66666666; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x66666666, 0x556, 1b, x2, 672,0)
+
+inst_701:
+// rs1_val==65536 and rs2_val==46340,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0xb504; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0xb504, 0x40, 3f, x2, 676,0)
+
+inst_702:
+// rs1_val==65536 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x0, 0x0, 3f, x2, 680,0)
+
+inst_703:
+// rs1_val==65536 and rs2_val==65535,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0xffff; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0xffff, 0x10, 3f, x2, 684,0)
+
+inst_704:
+// rs1_val==65536 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x2; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x2, 0x20, 3f, x2, 688,0)
+
+inst_705:
+// rs1_val==65536 and rs2_val==1431655764,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x55555554; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x55555554, 0x10, 3f, x2, 692,0)
+
+inst_706:
+// rs1_val==65536 and rs2_val==2863311529,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0xaaaaaaa9; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0xaaaaaaa9, 0x6, 3f, x2, 696,0)
+
+inst_707:
+// rs1_val==65536 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x4, 0x2, 1b, x2, 700,0)
+
+inst_708:
+// rs1_val==65536 and rs2_val==858993458,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x33333332, 0x0, 1b, x2, 704,0)
+
+inst_709:
+// rs1_val==65536 and rs2_val==1717986917,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x66666665; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x66666665, 0x80, 3f, x2, 708,0)
+
+inst_710:
+// rs1_val==65536 and rs2_val==46339,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0xb503, 0x4, 1b, x2, 712,0)
+
+inst_711:
+// rs1_val==65536 and rs2_val==65534,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0xfffe; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0xfffe, 0x100, 3f, x2, 716,0)
+
+inst_712:
+// rs1_val==65536 and rs2_val==1431655766,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x55555556, 0x556, 1b, x2, 720,0)
+
+inst_713:
+// rs1_val==65536 and rs2_val==2863311531,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0xaaaaaaab; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0xaaaaaaab, 0x0, 1b, x2, 724,0)
+
+inst_714:
+// rs1_val==65536 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x6, 0x10, 3f, x2, 728,0)
+
+inst_715:
+// rs1_val==65536 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x33333334; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x33333334, 0x0, 1b, x2, 732,0)
+
+inst_716:
+// rs1_val==65536 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x66666667, 0x8, 3f, x2, 736,0)
+
+inst_717:
+// rs1_val==65536 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0xb505, 0x6, 1b, x2, 740,0)
+
+inst_718:
+// rs1_val==65536 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x1; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x1, 0x400, 1b, x2, 744,0)
+
+inst_719:
+// rs1_val==65536 and rs2_val==65536,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0x10000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x10000, 0x10000, 0x0, 3f, x2, 748,0)
+
+inst_720:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x6, 0x400, 3f, x2, 752,0)
+
+inst_721:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333334; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x33333334, 0x6, 3f, x2, 756,0)
+
+inst_722:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666667; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0x66666667, 0xa, 1b, x2, 760,0)
+
+inst_723:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x66666665, 0xb505, 0x8, 3f, x2, 764,0)
+
+inst_724:
+// rs1_val > 0 and rs2_val > 0, rs2_val == 4294966271, rs1_val == 8, rs1_val > 0 and rs2_val > 0 and rs1_val < rs2_val and imm_val < 0
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x8; op2val:0xfffffbff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0x8, 0xfffffbff, 0x0, 1b, x2, 768,0)
+
+inst_725:
+// rs2_val == 8, rs1_val == 4294967294
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffe; op2val:0x8; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x3, x10, x11, 0xfffffffe, 0x8, 0x400, 1b, x2, 772,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x9_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x9_1:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 194*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/blt-01.S b/riscof/suite/rv32i_m/I/blt-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..e9639b29b21e1e10c8d9932baa38bbabfaf39470
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/blt-01.S
@@ -0,0 +1,2979 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the blt instruction of the RISC-V I extension for the blt covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",blt)
+
+RVTEST_SIGBASE( x5,signature_x5_1)
+
+inst_0:
+// rs1 == rs2, rs1==x1, rs2==x1, rs1_val > 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val==4 and rs2_val==2, rs1_val == 4, rs2_val == 2, rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0
+// opcode: blt, op1:x1; op2:x1; op1val:0x4; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x12, x1, x1, 0x4, 0x4, 0x80, 3f, x5, 0,0)
+
+inst_1:
+// rs1 != rs2, rs1==x14, rs2==x11, rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs2_val == -536870913
+// opcode: blt, op1:x14; op2:x11; op1val:0x4; op2val:-0x20000001; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x12, x14, x11, 0x4, -0x20000001, 0x8, 3f, x5, 4,0)
+
+inst_2:
+// rs1==x4, rs2==x22, rs1_val < 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs1_val == -536870913, rs1_val > rs2_val and imm_val < 0 and imm_val & 0x03 == 0
+// opcode: blt, op1:x4; op2:x22; op1val:-0x20000001; op2val:-0x40000000; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x12, x4, x22, -0x20000001, -0x40000000, 0x8, 1b, x5, 8,0)
+
+inst_3:
+// rs1==x20, rs2==x25, rs1_val < 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val < rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == 1, rs1_val == -1048577
+// opcode: blt, op1:x20; op2:x25; op1val:-0x100001; op2val:0x1; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x12, x20, x25, -0x100001, 0x1, 0x20, 3f, x5, 12,0)
+
+inst_4:
+// rs1==x13, rs2==x29, rs1_val == rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == -2147483648, rs1_val == -2147483648
+// opcode: blt, op1:x13; op2:x29; op1val:-0x80000000; op2val:-0x80000000; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x12, x13, x29, -0x80000000, -0x80000000, 0x8, 3f, x5, 16,0)
+
+inst_5:
+// rs1==x24, rs2==x3, rs1_val == rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs2_val == 16777216, rs1_val == 16777216
+// opcode: blt, op1:x24; op2:x3; op1val:0x1000000; op2val:0x1000000; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x12, x24, x3, 0x1000000, 0x1000000, 0x400, 1b, x5, 20,0)
+
+inst_6:
+// rs1==x17, rs2==x8, rs1_val < rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs1_val == -17, rs2_val == 8192
+// opcode: blt, op1:x17; op2:x8; op1val:-0x11; op2val:0x2000; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x12, x17, x8, -0x11, 0x2000, 0x0, 1b, x5, 24,0)
+
+inst_7:
+// rs1==x2, rs2==x0, rs2_val == 4, rs1_val == 2097152
+// opcode: blt, op1:x2; op2:x0; op1val:0x200000; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x12, x2, x0, 0x200000, 0x0, 0x8, 1b, x5, 28,0)
+
+inst_8:
+// rs1==x31, rs2==x21, rs2_val == 8,
+// opcode: blt, op1:x31; op2:x21; op1val:0x5; op2val:0x8; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x12, x31, x21, 0x5, 0x8, 0x4, 1b, x5, 32,0)
+
+inst_9:
+// rs1==x28, rs2==x6, rs2_val == 16, rs1_val == -32769
+// opcode: blt, op1:x28; op2:x6; op1val:-0x8001; op2val:0x10; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x12, x28, x6, -0x8001, 0x10, 0x400, 1b, x5, 36,0)
+
+inst_10:
+// rs1==x30, rs2==x2, rs2_val == 32, rs1_val == 4096
+// opcode: blt, op1:x30; op2:x2; op1val:0x1000; op2val:0x20; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x12, x30, x2, 0x1000, 0x20, 0x2, 3f, x5, 40,0)
+
+inst_11:
+// rs1==x19, rs2==x18, rs2_val == 64,
+// opcode: blt, op1:x19; op2:x18; op1val:0xb505; op2val:0x40; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x12, x19, x18, 0xb505, 0x40, 0x556, 1b, x5, 44,0)
+
+inst_12:
+// rs1==x25, rs2==x24, rs2_val == 128,
+// opcode: blt, op1:x25; op2:x24; op1val:0x4; op2val:0x80; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x12, x25, x24, 0x4, 0x80, 0x6, 3f, x5, 48,0)
+
+inst_13:
+// rs1==x7, rs2==x15, rs2_val == 256,
+// opcode: blt, op1:x7; op2:x15; op1val:0x66666667; op2val:0x100; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x12, x7, x15, 0x66666667, 0x100, 0x400, 3f, x5, 52,0)
+
+inst_14:
+// rs1==x0, rs2==x9, rs2_val == 512, rs1_val == 2147483647
+// opcode: blt, op1:x0; op2:x9; op1val:0x0; op2val:0x200; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x12, x0, x9, 0x0, 0x200, 0x200, 3f, x5, 56,0)
+
+inst_15:
+// rs1==x10, rs2==x17, rs2_val == 1024, rs1_val == 4194304
+// opcode: blt, op1:x10; op2:x17; op1val:0x400000; op2val:0x400; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x12, x10, x17, 0x400000, 0x400, 0x2, 3f, x5, 60,0)
+
+inst_16:
+// rs1==x16, rs2==x28, rs2_val == 2048, rs1_val == -67108865
+// opcode: blt, op1:x16; op2:x28; op1val:-0x4000001; op2val:0x800; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x12, x16, x28, -0x4000001, 0x800, 0x4, 3f, x5, 64,0)
+
+inst_17:
+// rs1==x8, rs2==x27, rs2_val == 4096, rs1_val == 8
+// opcode: blt, op1:x8; op2:x27; op1val:0x8; op2val:0x1000; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x12, x8, x27, 0x8, 0x1000, 0xa, 1b, x5, 68,0)
+
+inst_18:
+// rs1==x6, rs2==x20, rs2_val == 16384,
+// opcode: blt, op1:x6; op2:x20; op1val:0x3; op2val:0x4000; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x6, x20, 0x3, 0x4000, 0x8, 1b, x5, 72,0)
+
+inst_19:
+// rs1==x11, rs2==x14, rs2_val == 32768, rs1_val == -4097
+// opcode: blt, op1:x11; op2:x14; op1val:-0x1001; op2val:0x8000; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x11, x14, -0x1001, 0x8000, 0x6, 1b, x5, 76,0)
+
+inst_20:
+// rs1==x15, rs2==x23, rs2_val == 65536, rs1_val == -134217729
+// opcode: blt, op1:x15; op2:x23; op1val:-0x8000001; op2val:0x10000; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x15, x23, -0x8000001, 0x10000, 0x400, 1b, x5, 80,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_21:
+// rs1==x18, rs2==x31, rs2_val == 131072, rs1_val == 16384
+// opcode: blt, op1:x18; op2:x31; op1val:0x4000; op2val:0x20000; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x18, x31, 0x4000, 0x20000, 0x40, 3f, x1, 0,0)
+
+inst_22:
+// rs1==x21, rs2==x26, rs2_val == 262144,
+// opcode: blt, op1:x21; op2:x26; op1val:0x1000; op2val:0x40000; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x21, x26, 0x1000, 0x40000, 0x0, 1b, x1, 4,0)
+
+inst_23:
+// rs1==x26, rs2==x4, rs2_val == 524288, rs1_val == 268435456
+// opcode: blt, op1:x26; op2:x4; op1val:0x10000000; op2val:0x80000; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x26, x4, 0x10000000, 0x80000, 0x4, 1b, x1, 8,0)
+
+inst_24:
+// rs1==x29, rs2==x19, rs2_val == 1048576,
+// opcode: blt, op1:x29; op2:x19; op1val:0x33333334; op2val:0x100000; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x29, x19, 0x33333334, 0x100000, 0x100, 3f, x1, 12,0)
+
+inst_25:
+// rs1==x5, rs2==x12, rs2_val == 2097152, rs1_val == -9
+// opcode: blt, op1:x5; op2:x12; op1val:-0x9; op2val:0x200000; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x5, x12, -0x9, 0x200000, 0x80, 3f, x1, 16,0)
+
+inst_26:
+// rs1==x3, rs2==x5, rs2_val == 4194304, rs1_val == 2
+// opcode: blt, op1:x3; op2:x5; op1val:0x2; op2val:0x400000; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x3, x5, 0x2, 0x400000, 0x10, 3f, x1, 20,0)
+
+inst_27:
+// rs1==x27, rs2==x10, rs2_val == 8388608, rs1_val == 8388608
+// opcode: blt, op1:x27; op2:x10; op1val:0x800000; op2val:0x800000; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x27, x10, 0x800000, 0x800000, 0x10, 3f, x1, 24,0)
+
+inst_28:
+// rs1==x23, rs2==x30, rs2_val == 33554432, rs1_val == -8388609
+// opcode: blt, op1:x23; op2:x30; op1val:-0x800001; op2val:0x2000000; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x23, x30, -0x800001, 0x2000000, 0x10, 3f, x1, 28,0)
+
+inst_29:
+// rs1==x12, rs2==x16, rs2_val == 67108864,
+// opcode: blt, op1:x12; op2:x16; op1val:0x2; op2val:0x4000000; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x12, x16, 0x2, 0x4000000, 0x4, 1b, x1, 32,0)
+
+inst_30:
+// rs1==x22, rs2==x7, rs2_val == 134217728, rs1_val == 512
+// opcode: blt, op1:x22; op2:x7; op1val:0x200; op2val:0x8000000; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x22, x7, 0x200, 0x8000000, 0x80, 3f, x1, 36,0)
+
+inst_31:
+// rs1==x9, rs2==x13, rs2_val == 268435456, rs1_val == -4194305
+// opcode: blt, op1:x9; op2:x13; op1val:-0x400001; op2val:0x10000000; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x9, x13, -0x400001, 0x10000000, 0x100, 3f, x1, 40,0)
+
+inst_32:
+// rs2_val == 536870912,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x20000000; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x20000000, 0x4, 3f, x1, 44,0)
+
+inst_33:
+// rs2_val == 1073741824, rs1_val == 8192
+// opcode: blt, op1:x10; op2:x11; op1val:0x2000; op2val:0x40000000; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2000, 0x40000000, 0x6, 1b, x1, 48,0)
+
+inst_34:
+// rs2_val == -2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:-0x2; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, -0x2, 0x556, 1b, x1, 52,0)
+
+inst_35:
+// rs2_val == -3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:-0x3; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, -0x3, 0x4, 1b, x1, 56,0)
+
+inst_36:
+// rs2_val == -5, rs1_val == -513
+// opcode: blt, op1:x10; op2:x11; op1val:-0x201; op2val:-0x5; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x201, -0x5, 0x400, 3f, x1, 60,0)
+
+inst_37:
+// rs2_val == -9, rs1_val == -524289
+// opcode: blt, op1:x10; op2:x11; op1val:-0x80001; op2val:-0x9; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x80001, -0x9, 0x4, 3f, x1, 64,0)
+
+inst_38:
+// rs2_val == -17,
+// opcode: blt, op1:x10; op2:x11; op1val:0x9; op2val:-0x11; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x9, -0x11, 0x8, 3f, x1, 68,0)
+
+inst_39:
+// rs2_val == -33,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x8; op2val:-0x21; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x8, -0x21, 0x40, 3f, x1, 72,0)
+
+inst_40:
+// rs2_val == -65,
+// opcode: blt, op1:x10; op2:x11; op1val:0x7; op2val:-0x41; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x7, -0x41, 0x2, 3f, x1, 76,0)
+
+inst_41:
+// rs2_val == -129, rs1_val == 1
+// opcode: blt, op1:x10; op2:x11; op1val:0x1; op2val:-0x81; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x1, -0x81, 0x10, 3f, x1, 80,0)
+
+inst_42:
+// rs2_val == -257, rs1_val == -257
+// opcode: blt, op1:x10; op2:x11; op1val:-0x101; op2val:-0x101; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x101, -0x101, 0x8, 3f, x1, 84,0)
+
+inst_43:
+// rs2_val == -513,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x8001; op2val:-0x201; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x8001, -0x201, 0x2, 3f, x1, 88,0)
+
+inst_44:
+// rs2_val == -1025, rs1_val == 32
+// opcode: blt, op1:x10; op2:x11; op1val:0x20; op2val:-0x401; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x20, -0x401, 0x400, 3f, x1, 92,0)
+
+inst_45:
+// rs2_val == -2049, rs1_val == 128
+// opcode: blt, op1:x10; op2:x11; op1val:0x80; op2val:-0x801; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x80, -0x801, 0x20, 3f, x1, 96,0)
+
+inst_46:
+// rs2_val == -4097, rs1_val == -1431655766
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x1001; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, -0x1001, 0x400, 3f, x1, 100,0)
+
+inst_47:
+// rs2_val == -8193, rs1_val == 262144
+// opcode: blt, op1:x10; op2:x11; op1val:0x40000; op2val:-0x2001; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x40000, -0x2001, 0x8, 1b, x1, 104,0)
+
+inst_48:
+// rs2_val == -16385, rs1_val == 1048576
+// opcode: blt, op1:x10; op2:x11; op1val:0x100000; op2val:-0x4001; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x100000, -0x4001, 0x8, 1b, x1, 108,0)
+
+inst_49:
+// rs2_val == -32769, rs1_val == -2097153
+// opcode: blt, op1:x10; op2:x11; op1val:-0x200001; op2val:-0x8001; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x200001, -0x8001, 0x2, 1b, x1, 112,0)
+
+inst_50:
+// rs2_val == -65537, rs1_val == 256
+// opcode: blt, op1:x10; op2:x11; op1val:0x100; op2val:-0x10001; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x100, -0x10001, 0x100, 3f, x1, 116,0)
+
+inst_51:
+// rs2_val == -131073,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:-0x20001; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, -0x20001, 0x80, 3f, x1, 120,0)
+
+inst_52:
+// rs2_val == -262145, rs1_val == 524288
+// opcode: blt, op1:x10; op2:x11; op1val:0x80000; op2val:-0x40001; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x80000, -0x40001, 0xa, 1b, x1, 124,0)
+
+inst_53:
+// rs2_val == -524289,
+// opcode: blt, op1:x10; op2:x11; op1val:0x1000; op2val:-0x80001; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x1000, -0x80001, 0x8, 3f, x1, 128,0)
+
+inst_54:
+// rs2_val == -1048577,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:-0x100001; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, -0x100001, 0x2, 3f, x1, 132,0)
+
+inst_55:
+// rs2_val == -2097153,
+// opcode: blt, op1:x10; op2:x11; op1val:0x9; op2val:-0x200001; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x9, -0x200001, 0x0, 3f, x1, 136,0)
+
+inst_56:
+// rs2_val == -4194305,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:-0x400001; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, -0x400001, 0x6, 1b, x1, 140,0)
+
+inst_57:
+// rs2_val == -8388609, rs1_val == -65537
+// opcode: blt, op1:x10; op2:x11; op1val:-0x10001; op2val:-0x800001; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x10001, -0x800001, 0x0, 3f, x1, 144,0)
+
+inst_58:
+// rs2_val == -16777217,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:-0x1000001; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, -0x1000001, 0x200, 3f, x1, 148,0)
+
+inst_59:
+// rs2_val == -33554433,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:-0x2000001; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, -0x2000001, 0x6, 1b, x1, 152,0)
+
+inst_60:
+// rs2_val == -67108865,
+// opcode: blt, op1:x10; op2:x11; op1val:0x100000; op2val:-0x4000001; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x100000, -0x4000001, 0x2, 3f, x1, 156,0)
+
+inst_61:
+// rs2_val == -134217729,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x10001; op2val:-0x8000001; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x10001, -0x8000001, 0xa, 1b, x1, 160,0)
+
+inst_62:
+// rs2_val == -268435457, rs1_val == -131073
+// opcode: blt, op1:x10; op2:x11; op1val:-0x20001; op2val:-0x10000001; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x20001, -0x10000001, 0x4, 3f, x1, 164,0)
+
+inst_63:
+// rs2_val == -1073741825,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:-0x40000001; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, -0x40000001, 0xa, 1b, x1, 168,0)
+
+inst_64:
+// rs2_val == 2147483647,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x7fffffff; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x7fffffff, 0x556, 1b, x1, 172,0)
+
+inst_65:
+// rs2_val == 1431655765, rs1_val == -3
+// opcode: blt, op1:x10; op2:x11; op1val:-0x3; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x3, 0x55555555, 0x400, 1b, x1, 176,0)
+
+inst_66:
+// rs2_val == -1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x800000; op2val:-0x55555556; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x800000, -0x55555556, 0x100, 3f, x1, 180,0)
+
+inst_67:
+// rs1_val == 16,
+// opcode: blt, op1:x10; op2:x11; op1val:0x10; op2val:0x1000000; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x10, 0x1000000, 0xa, 1b, x1, 184,0)
+
+inst_68:
+// rs1_val == 64,
+// opcode: blt, op1:x10; op2:x11; op1val:0x40; op2val:0x20000; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x40, 0x20000, 0xa, 1b, x1, 188,0)
+
+inst_69:
+// rs1_val == 1024,
+// opcode: blt, op1:x10; op2:x11; op1val:0x400; op2val:-0x8000001; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x400, -0x8000001, 0x200, 3f, x1, 192,0)
+
+inst_70:
+// rs1_val == 2048,
+// opcode: blt, op1:x10; op2:x11; op1val:0x800; op2val:0x400; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x800, 0x400, 0x0, 1b, x1, 196,0)
+
+inst_71:
+// rs1_val == 32768,
+// opcode: blt, op1:x10; op2:x11; op1val:0x8000; op2val:0x100000; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x8000, 0x100000, 0x4, 1b, x1, 200,0)
+
+inst_72:
+// rs1_val == 65536,
+// opcode: blt, op1:x10; op2:x11; op1val:0x10000; op2val:-0x401; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x10000, -0x401, 0x400, 3f, x1, 204,0)
+
+inst_73:
+// rs1_val == 131072,
+// opcode: blt, op1:x10; op2:x11; op1val:0x20000; op2val:-0x4001; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x20000, -0x4001, 0x100, 3f, x1, 208,0)
+
+inst_74:
+// rs1_val == 33554432,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2000000; op2val:0x800000; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2000000, 0x800000, 0x0, 1b, x1, 212,0)
+
+inst_75:
+// rs1_val == 67108864,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4000000; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4000000, 0x5, 0x10, 3f, x1, 216,0)
+
+inst_76:
+// rs1_val == 134217728,
+// opcode: blt, op1:x10; op2:x11; op1val:0x8000000; op2val:0x8; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x8000000, 0x8, 0x40, 3f, x1, 220,0)
+
+inst_77:
+// rs1_val == 536870912,
+// opcode: blt, op1:x10; op2:x11; op1val:0x20000000; op2val:-0x200001; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x20000000, -0x200001, 0x6, 3f, x1, 224,0)
+
+inst_78:
+// rs1_val == 1073741824,
+// opcode: blt, op1:x10; op2:x11; op1val:0x40000000; op2val:-0x801; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x40000000, -0x801, 0x400, 3f, x1, 228,0)
+
+inst_79:
+// rs1_val == -2,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x2; op2val:0x40000; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x2, 0x40000, 0x80, 3f, x1, 232,0)
+
+inst_80:
+// rs1_val == -5,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5; op2val:-0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5, -0x55555555, 0x2, 3f, x1, 236,0)
+
+inst_81:
+// rs1_val == -33,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x21; op2val:0x10000; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x21, 0x10000, 0x2, 1b, x1, 240,0)
+
+inst_82:
+// rs1_val == -65,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x41; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x41, 0xb504, 0x0, 3f, x1, 244,0)
+
+inst_83:
+// rs1_val == -129,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x81; op2val:-0x10001; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x81, -0x10001, 0x400, 3f, x1, 248,0)
+
+inst_84:
+// rs1_val == -1025,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x401; op2val:0x40; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x401, 0x40, 0x2, 3f, x1, 252,0)
+
+inst_85:
+// rs1_val == -2049,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x801; op2val:0x9; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x801, 0x9, 0x0, 1b, x1, 256,0)
+
+inst_86:
+// rs1_val == -8193,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x2001; op2val:0x8; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x2001, 0x8, 0x2, 1b, x1, 260,0)
+
+inst_87:
+// rs1_val == -16385,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x4001; op2val:0x8000; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x4001, 0x8000, 0x8, 3f, x1, 264,0)
+
+inst_88:
+// rs1_val == -262145,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x40001; op2val:0x400000; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x40001, 0x400000, 0x4, 3f, x1, 268,0)
+
+inst_89:
+// rs1_val == -16777217,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x1000001; op2val:0x400000; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x1000001, 0x400000, 0x100, 3f, x1, 272,0)
+
+inst_90:
+// rs1_val == -33554433,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x2000001; op2val:-0x1001; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x2000001, -0x1001, 0x556, 1b, x1, 276,0)
+
+inst_91:
+// rs1_val == -268435457,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x10000001; op2val:-0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x10000001, -0xb504, 0x4, 1b, x1, 280,0)
+
+inst_92:
+// rs1_val == -1073741825,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x40000001; op2val:-0x8; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x40000001, -0x8, 0x4, 1b, x1, 284,0)
+
+inst_93:
+// rs1_val == 1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x2000; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x2000, 0x6, 1b, x1, 288,0)
+
+inst_94:
+// rs1_val==3 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x3, 0x2, 3f, x1, 292,0)
+
+inst_95:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x55555555; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x55555555, 0x100, 3f, x1, 296,0)
+
+inst_96:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:-0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, -0x55555556, 0x80, 3f, x1, 300,0)
+
+inst_97:
+// rs1_val==3 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x5, 0x400, 3f, x1, 304,0)
+
+inst_98:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x33333333; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x33333333, 0x0, 3f, x1, 308,0)
+
+inst_99:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x66666666; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x66666666, 0x20, 3f, x1, 312,0)
+
+inst_100:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:-0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, -0xb504, 0x400, 3f, x1, 316,0)
+
+inst_101:
+// rs1_val==3 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0xb504, 0x200, 3f, x1, 320,0)
+
+inst_102:
+// rs1_val==3 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x2, 0x556, 1b, x1, 324,0)
+
+inst_103:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x55555554; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x55555554, 0x556, 1b, x1, 328,0)
+
+inst_104:
+// rs1_val==3 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x0, 0x0, 3f, x1, 332,0)
+
+inst_105:
+// rs1_val==3 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x4, 0x556, 1b, x1, 336,0)
+
+inst_106:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x33333332; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x33333332, 0x200, 3f, x1, 340,0)
+
+inst_107:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x66666665; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x66666665, 0x8, 1b, x1, 344,0)
+
+inst_108:
+// rs1_val==3 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0xb503; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0xb503, 0x200, 3f, x1, 348,0)
+
+inst_109:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x55555556, 0x400, 3f, x1, 352,0)
+
+inst_110:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:-0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, -0x55555555, 0x10, 3f, x1, 356,0)
+
+inst_111:
+// rs1_val==3 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x6, 0x8, 1b, x1, 360,0)
+
+inst_112:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x33333334, 0x4, 1b, x1, 364,0)
+
+inst_113:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x66666667; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x66666667, 0x0, 3f, x1, 368,0)
+
+inst_114:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, -0xb503, 0x6, 1b, x1, 372,0)
+
+inst_115:
+// rs1_val==3 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0xb505; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0xb505, 0x100, 3f, x1, 376,0)
+
+inst_116:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x3, 0x0, 1b, x1, 380,0)
+
+inst_117:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x55555555, 0x10, 3f, x1, 384,0)
+
+inst_118:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, -0x55555556, 0x200, 3f, x1, 388,0)
+
+inst_119:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x5, 0x100, 3f, x1, 392,0)
+
+inst_120:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x33333333, 0x4, 3f, x1, 396,0)
+
+inst_121:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666666; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x66666666, 0x8, 3f, x1, 400,0)
+
+inst_122:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, -0xb504, 0x8, 1b, x1, 404,0)
+
+inst_123:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0xb504, 0x400, 1b, x1, 408,0)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x2, 0x0, 1b, x1, 412,0)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x55555554, 0x4, 3f, x1, 416,0)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x0, 0x400, 1b, x1, 420,0)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x4, 0x6, 1b, x1, 424,0)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333332; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x33333332, 0xa, 1b, x1, 428,0)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666665; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x66666665, 0x4, 3f, x1, 432,0)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0xb503, 0x40, 3f, x1, 436,0)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x55555556, 0x8, 1b, x1, 440,0)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, -0x55555555, 0x400, 3f, x1, 444,0)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x6, 0x20, 3f, x1, 448,0)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x33333334, 0x2, 1b, x1, 452,0)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0x66666667, 0x4, 1b, x1, 456,0)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, -0xb503, 0x6, 1b, x1, 460,0)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555555, 0xb505, 0x200, 3f, x1, 464,0)
+
+inst_138:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x3, 0x4, 1b, x1, 468,0)
+
+inst_139:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x55555555, 0x400, 1b, x1, 472,0)
+
+inst_140:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, -0x55555556, 0x8, 1b, x1, 476,0)
+
+inst_141:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x5, 0x10, 3f, x1, 480,0)
+
+inst_142:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x33333333, 0x4, 1b, x1, 484,0)
+
+inst_143:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x66666666, 0x6, 1b, x1, 488,0)
+
+inst_144:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb504; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, -0xb504, 0x80, 3f, x1, 492,0)
+
+inst_145:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb504; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0xb504, 0x20, 3f, x1, 496,0)
+
+inst_146:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x2, 0x6, 1b, x1, 500,0)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555554; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x55555554, 0x20, 3f, x1, 504,0)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x0, 0x4, 3f, x1, 508,0)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x4, 0x2, 1b, x1, 512,0)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x33333332, 0x6, 3f, x1, 516,0)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666665; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x66666665, 0x40, 3f, x1, 520,0)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb503; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0xb503, 0x556, 1b, x1, 524,0)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x55555556, 0x2, 1b, x1, 528,0)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, -0x55555555, 0x8, 3f, x1, 532,0)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x6, 0x2, 1b, x1, 536,0)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x33333334, 0x2, 3f, x1, 540,0)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666667; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0x66666667, 0xa, 1b, x1, 544,0)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, -0xb503, 0x8, 1b, x1, 548,0)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555556, 0xb505, 0x6, 3f, x1, 552,0)
+
+inst_160:
+// rs1_val==5 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x3, 0x8, 1b, x1, 556,0)
+
+inst_161:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x55555555, 0x20, 3f, x1, 560,0)
+
+inst_162:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:-0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, -0x55555556, 0x2, 1b, x1, 564,0)
+
+inst_163:
+// rs1_val==5 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x5, 0x2, 3f, x1, 568,0)
+
+inst_164:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x33333333, 0x4, 1b, x1, 572,0)
+
+inst_165:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x66666666, 0x6, 3f, x1, 576,0)
+
+inst_166:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:-0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, -0xb504, 0x4, 1b, x1, 580,0)
+
+inst_167:
+// rs1_val==5 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0xb504, 0x0, 3f, x1, 584,0)
+
+inst_168:
+// rs1_val==5 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x2, 0x6, 1b, x1, 588,0)
+
+inst_169:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x55555554; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x55555554, 0x8, 1b, x1, 592,0)
+
+inst_170:
+// rs1_val==5 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x0, 0x8, 1b, x1, 596,0)
+
+inst_171:
+// rs1_val==5 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x4, 0x2, 3f, x1, 600,0)
+
+inst_172:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x33333332; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x33333332, 0x20, 3f, x1, 604,0)
+
+inst_173:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x66666665; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x66666665, 0x4, 3f, x1, 608,0)
+
+inst_174:
+// rs1_val==5 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0xb503, 0x40, 3f, x1, 612,0)
+
+inst_175:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x55555556, 0x400, 1b, x1, 616,0)
+
+inst_176:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:-0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, -0x55555555, 0x4, 1b, x1, 620,0)
+
+inst_177:
+// rs1_val==5 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x6, 0x10, 3f, x1, 624,0)
+
+inst_178:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x33333334, 0x2, 1b, x1, 628,0)
+
+inst_179:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x66666667; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x66666667, 0x20, 3f, x1, 632,0)
+
+inst_180:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:-0xb503; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, -0xb503, 0x100, 3f, x1, 636,0)
+
+inst_181:
+// rs1_val==5 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0xb505; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0xb505, 0x4, 3f, x1, 640,0)
+
+inst_182:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x3, 0x400, 3f, x1, 644,0)
+
+inst_183:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555555; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x55555555, 0x100, 3f, x1, 648,0)
+
+inst_184:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, -0x55555556, 0x80, 3f, x1, 652,0)
+
+inst_185:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x5, 0x0, 1b, x1, 656,0)
+
+inst_186:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333333; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x33333333, 0x200, 3f, x1, 660,0)
+
+inst_187:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666666; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x66666666, 0x8, 3f, x1, 664,0)
+
+inst_188:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, -0xb504, 0x6, 1b, x1, 668,0)
+
+inst_189:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0xb504, 0x0, 1b, x1, 672,0)
+
+inst_190:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x2, 0x10, 3f, x1, 676,0)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555554; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x55555554, 0x80, 3f, x1, 680,0)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x0, 0x100, 3f, x1, 684,0)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x4, 0x0, 1b, x1, 688,0)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x33333332, 0x6, 1b, x1, 692,0)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x66666665, 0x2, 1b, x1, 696,0)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0xb503, 0x40, 3f, x1, 700,0)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555556; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x55555556, 0x10, 3f, x1, 704,0)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, -0x55555555, 0x0, 3f, x1, 708,0)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x6, 0xa, 1b, x1, 712,0)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x33333334, 0x2, 1b, x1, 716,0)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0x66666667, 0x4, 1b, x1, 720,0)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, -0xb503, 0x2, 1b, x1, 724,0)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb505; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333333, 0xb505, 0x2, 1b, x1, 728,0)
+
+inst_204:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x3, 0x6, 3f, x1, 732,0)
+
+inst_205:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x55555555, 0x0, 1b, x1, 736,0)
+
+inst_206:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, -0x55555556, 0x556, 1b, x1, 740,0)
+
+inst_207:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x5, 0x40, 3f, x1, 744,0)
+
+inst_208:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333333; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x33333333, 0x556, 1b, x1, 748,0)
+
+inst_209:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666666; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x66666666, 0x8, 3f, x1, 752,0)
+
+inst_210:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, -0xb504, 0x4, 3f, x1, 756,0)
+
+inst_211:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0xb504, 0x0, 3f, x1, 760,0)
+
+inst_212:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x2, 0x8, 1b, x1, 764,0)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x55555554, 0x0, 3f, x1, 768,0)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x0, 0x6, 1b, x1, 772,0)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x4, 0x40, 3f, x1, 776,0)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333332; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x33333332, 0xa, 1b, x1, 780,0)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666665; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x66666665, 0x20, 3f, x1, 784,0)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0xb503, 0x0, 1b, x1, 788,0)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x55555556, 0x200, 3f, x1, 792,0)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, -0x55555555, 0x400, 1b, x1, 796,0)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x6, 0x2, 3f, x1, 800,0)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x33333334, 0x4, 3f, x1, 804,0)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666667; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0x66666667, 0x10, 3f, x1, 808,0)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, -0xb503, 0x0, 1b, x1, 812,0)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666666, 0xb505, 0x400, 3f, x1, 816,0)
+
+inst_226:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x3, 0x8, 1b, x1, 820,0)
+
+inst_227:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x55555555, 0x0, 3f, x1, 824,0)
+
+inst_228:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, -0x55555556, 0x8, 1b, x1, 828,0)
+
+inst_229:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x5, 0x6, 3f, x1, 832,0)
+
+inst_230:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x33333333, 0x400, 3f, x1, 836,0)
+
+inst_231:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666666; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x66666666, 0x80, 3f, x1, 840,0)
+
+inst_232:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb504; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, -0xb504, 0x20, 3f, x1, 844,0)
+
+inst_233:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0xb504, 0x2, 1b, x1, 848,0)
+
+inst_234:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x2, 0x6, 3f, x1, 852,0)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555554; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x55555554, 0x80, 3f, x1, 856,0)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x0, 0x100, 3f, x1, 860,0)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x4, 0x400, 1b, x1, 864,0)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333332; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x33333332, 0x80, 3f, x1, 868,0)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666665; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x66666665, 0x0, 1b, x1, 872,0)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0xb503; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0xb503, 0xa, 1b, x1, 876,0)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x55555556, 0x0, 1b, x1, 880,0)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, -0x55555555, 0x400, 1b, x1, 884,0)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x6, 0x80, 3f, x1, 888,0)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333334; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x33333334, 0xa, 1b, x1, 892,0)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666667; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0x66666667, 0x0, 1b, x1, 896,0)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, -0xb503, 0x40, 3f, x1, 900,0)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504, 0xb505, 0x400, 3f, x1, 904,0)
+
+inst_248:
+// rs1_val==46340 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x3, 0x0, 1b, x1, 908,0)
+
+inst_249:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x55555555, 0x2, 3f, x1, 912,0)
+
+inst_250:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, -0x55555556, 0x4, 3f, x1, 916,0)
+
+inst_251:
+// rs1_val==46340 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x5, 0x80, 3f, x1, 920,0)
+
+inst_252:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333333; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x33333333, 0x0, 1b, x1, 924,0)
+
+inst_253:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x66666666, 0x6, 3f, x1, 928,0)
+
+inst_254:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:-0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, -0xb504, 0x200, 3f, x1, 932,0)
+
+inst_255:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0xb504, 0x200, 3f, x1, 936,0)
+
+inst_256:
+// rs1_val==46340 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x2; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x2, 0x200, 3f, x1, 940,0)
+
+inst_257:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555554; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x55555554, 0x20, 3f, x1, 944,0)
+
+inst_258:
+// rs1_val==46340 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x0, 0x556, 1b, x1, 948,0)
+
+inst_259:
+// rs1_val==46340 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x4, 0x2, 3f, x1, 952,0)
+
+inst_260:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333332; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x33333332, 0xa, 1b, x1, 956,0)
+
+inst_261:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x66666665, 0x2, 1b, x1, 960,0)
+
+inst_262:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0xb503, 0x20, 3f, x1, 964,0)
+
+inst_263:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x55555556, 0x400, 1b, x1, 968,0)
+
+inst_264:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555555; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, -0x55555555, 0x200, 3f, x1, 972,0)
+
+inst_265:
+// rs1_val==46340 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x6; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x6, 0x40, 3f, x1, 976,0)
+
+inst_266:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333334; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x33333334, 0x10, 3f, x1, 980,0)
+
+inst_267:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666667; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0x66666667, 0x10, 3f, x1, 984,0)
+
+inst_268:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, -0xb503, 0x6, 1b, x1, 988,0)
+
+inst_269:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504; op2val:0xb505; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504, 0xb505, 0xa, 1b, x1, 992,0)
+
+inst_270:
+// rs1_val==2 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x3, 0x8, 1b, x1, 996,0)
+
+inst_271:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x55555555; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x55555555, 0x100, 3f, x1, 1000,0)
+
+inst_272:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:-0x55555556; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, -0x55555556, 0x10, 3f, x1, 1004,0)
+
+inst_273:
+// rs1_val==2 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x5, 0x40, 3f, x1, 1008,0)
+
+inst_274:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x33333333, 0x4, 1b, x1, 1012,0)
+
+inst_275:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x66666666, 0x2, 1b, x1, 1016,0)
+
+inst_276:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:-0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, -0xb504, 0x4, 3f, x1, 1020,0)
+
+inst_277:
+// rs1_val==2 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0xb504, 0x0, 1b, x1, 1024,0)
+
+inst_278:
+// rs1_val==2 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x2, 0xa, 1b, x1, 1028,0)
+
+inst_279:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x55555554, 0x2, 3f, x1, 1032,0)
+
+inst_280:
+// rs1_val==2 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x0, 0x8, 3f, x1, 1036,0)
+
+inst_281:
+// rs1_val==2 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x4, 0x2, 1b, x1, 1040,0)
+
+inst_282:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x33333332, 0x6, 3f, x1, 1044,0)
+
+inst_283:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x66666665; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x66666665, 0x556, 1b, x1, 1048,0)
+
+inst_284:
+// rs1_val==2 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0xb503, 0x2, 3f, x1, 1052,0)
+
+inst_285:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x55555556; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x55555556, 0x10, 3f, x1, 1056,0)
+
+inst_286:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:-0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, -0x55555555, 0x40, 3f, x1, 1060,0)
+
+inst_287:
+// rs1_val==2 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x6, 0x80, 3f, x1, 1064,0)
+
+inst_288:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x33333334, 0x8, 3f, x1, 1068,0)
+
+inst_289:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x66666667; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x66666667, 0xa, 1b, x1, 1072,0)
+
+inst_290:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:-0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, -0xb503, 0x20, 3f, x1, 1076,0)
+
+inst_291:
+// rs1_val==2 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0xb505, 0x200, 3f, x1, 1080,0)
+
+inst_292:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x3, 0x200, 3f, x1, 1084,0)
+
+inst_293:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x55555555, 0x8, 1b, x1, 1088,0)
+
+inst_294:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555556; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, -0x55555556, 0x40, 3f, x1, 1092,0)
+
+inst_295:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x5, 0x80, 3f, x1, 1096,0)
+
+inst_296:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333333; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x33333333, 0x556, 1b, x1, 1100,0)
+
+inst_297:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666666; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x66666666, 0x10, 3f, x1, 1104,0)
+
+inst_298:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb504; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, -0xb504, 0x20, 3f, x1, 1108,0)
+
+inst_299:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0xb504, 0x0, 1b, x1, 1112,0)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x2, 0x100, 3f, x1, 1116,0)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x55555554, 0x4, 3f, x1, 1120,0)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x0, 0x400, 1b, x1, 1124,0)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x4; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x4, 0x100, 3f, x1, 1128,0)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333332; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x33333332, 0xa, 1b, x1, 1132,0)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x66666665, 0x2, 3f, x1, 1136,0)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0xb503, 0x8, 1b, x1, 1140,0)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x55555556, 0x556, 1b, x1, 1144,0)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, -0x55555555, 0x8, 3f, x1, 1148,0)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x6, 0x2, 1b, x1, 1152,0)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333334; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x33333334, 0x10, 3f, x1, 1156,0)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666667; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0x66666667, 0x6, 1b, x1, 1160,0)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, -0xb503, 0x40, 3f, x1, 1164,0)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb505; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555554, 0xb505, 0x2, 3f, x1, 1168,0)
+
+inst_314:
+// rs1_val==0 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x3; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x3, 0x556, 1b, x1, 1172,0)
+
+inst_315:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x55555555, 0x2, 1b, x1, 1176,0)
+
+inst_316:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:-0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, -0x55555556, 0x8, 3f, x1, 1180,0)
+
+inst_317:
+// rs1_val==0 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x5, 0x6, 3f, x1, 1184,0)
+
+inst_318:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x33333333; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x33333333, 0xa, 1b, x1, 1188,0)
+
+inst_319:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x66666666, 0x6, 1b, x1, 1192,0)
+
+inst_320:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:-0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, -0xb504, 0xa, 1b, x1, 1196,0)
+
+inst_321:
+// rs1_val==0 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0xb504, 0x400, 1b, x1, 1200,0)
+
+inst_322:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333334; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x33333334, 0x0, 1b, x1, 1204,0)
+
+inst_323:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666667; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x66666667, 0x10, 3f, x1, 1208,0)
+
+inst_324:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, -0xb503, 0x6, 1b, x1, 1212,0)
+
+inst_325:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb505; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0xb505, 0x2, 3f, x1, 1216,0)
+
+inst_326:
+// rs1_val==6 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x3, 0x80, 3f, x1, 1220,0)
+
+inst_327:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x55555555, 0x4, 3f, x1, 1224,0)
+
+inst_328:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:-0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, -0x55555556, 0x6, 3f, x1, 1228,0)
+
+inst_329:
+// rs1_val==6 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x5, 0x100, 3f, x1, 1232,0)
+
+inst_330:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x33333333; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x33333333, 0x6, 1b, x1, 1236,0)
+
+inst_331:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x66666666; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x66666666, 0x556, 1b, x1, 1240,0)
+
+inst_332:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, -0xb504, 0x8, 3f, x1, 1244,0)
+
+inst_333:
+// rs1_val==6 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0xb504, 0x8, 1b, x1, 1248,0)
+
+inst_334:
+// rs1_val==6 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x2, 0x6, 1b, x1, 1252,0)
+
+inst_335:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x55555554; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x55555554, 0x40, 3f, x1, 1256,0)
+
+inst_336:
+// rs1_val==6 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x0, 0x8, 1b, x1, 1260,0)
+
+inst_337:
+// rs1_val==6 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x4, 0x556, 1b, x1, 1264,0)
+
+inst_338:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x33333332, 0x0, 1b, x1, 1268,0)
+
+inst_339:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x66666665, 0x400, 3f, x1, 1272,0)
+
+inst_340:
+// rs1_val==6 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0xb503, 0x400, 3f, x1, 1276,0)
+
+inst_341:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x55555556, 0x8, 1b, x1, 1280,0)
+
+inst_342:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:-0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, -0x55555555, 0x400, 1b, x1, 1284,0)
+
+inst_343:
+// rs1_val==6 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x6, 0x8, 3f, x1, 1288,0)
+
+inst_344:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x33333334; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x33333334, 0x6, 1b, x1, 1292,0)
+
+inst_345:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x66666667; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x66666667, 0x200, 3f, x1, 1296,0)
+
+inst_346:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:-0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, -0xb503, 0x0, 3f, x1, 1300,0)
+
+inst_347:
+// rs1_val==6 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0xb505; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0xb505, 0xa, 1b, x1, 1304,0)
+
+inst_348:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x3, 0x6, 1b, x1, 1308,0)
+
+inst_349:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x55555555, 0x8, 1b, x1, 1312,0)
+
+inst_350:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, -0x55555556, 0x8, 3f, x1, 1316,0)
+
+inst_351:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x5, 0x400, 3f, x1, 1320,0)
+
+inst_352:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x33333333, 0x4, 3f, x1, 1324,0)
+
+inst_353:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666666; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x66666666, 0x10, 3f, x1, 1328,0)
+
+inst_354:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb504; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, -0xb504, 0x80, 3f, x1, 1332,0)
+
+inst_355:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb504; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0xb504, 0x556, 1b, x1, 1336,0)
+
+inst_356:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x2; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x2, 0x20, 3f, x1, 1340,0)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x55555554, 0x0, 1b, x1, 1344,0)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x0, 0x100, 3f, x1, 1348,0)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x4, 0x400, 1b, x1, 1352,0)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x33333332, 0x0, 1b, x1, 1356,0)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666665; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x66666665, 0x80, 3f, x1, 1360,0)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0xb503, 0x40, 3f, x1, 1364,0)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x55555556, 0x6, 1b, x1, 1368,0)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, -0x55555555, 0x2, 3f, x1, 1372,0)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x6, 0x10, 3f, x1, 1376,0)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x33333334, 0x2, 1b, x1, 1380,0)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666667; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0x66666667, 0x6, 1b, x1, 1384,0)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, -0xb503, 0x4, 3f, x1, 1388,0)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333334, 0xb505, 0x200, 3f, x1, 1392,0)
+
+inst_370:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x3, 0x6, 3f, x1, 1396,0)
+
+inst_371:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x55555555, 0x400, 3f, x1, 1400,0)
+
+inst_372:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, -0x55555556, 0x0, 1b, x1, 1404,0)
+
+inst_373:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x5, 0x10, 3f, x1, 1408,0)
+
+inst_374:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333333; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x33333333, 0x20, 3f, x1, 1412,0)
+
+inst_375:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666666; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x66666666, 0x80, 3f, x1, 1416,0)
+
+inst_376:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, -0xb504, 0x8, 3f, x1, 1420,0)
+
+inst_377:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0xb504, 0x6, 1b, x1, 1424,0)
+
+inst_378:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x2, 0x556, 1b, x1, 1428,0)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555554; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x55555554, 0x40, 3f, x1, 1432,0)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x0, 0x0, 1b, x1, 1436,0)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x4, 0x6, 3f, x1, 1440,0)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333332; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x33333332, 0x4, 3f, x1, 1444,0)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666665; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x66666665, 0x0, 3f, x1, 1448,0)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb503; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0xb503, 0x100, 3f, x1, 1452,0)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x55555556, 0x200, 3f, x1, 1456,0)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, -0x55555555, 0x0, 1b, x1, 1460,0)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x6, 0x2, 3f, x1, 1464,0)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333334; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x33333334, 0x6, 1b, x1, 1468,0)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666667; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0x66666667, 0x556, 1b, x1, 1472,0)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb503; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, -0xb503, 0x80, 3f, x1, 1476,0)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666667, 0xb505, 0x8, 3f, x1, 1480,0)
+
+inst_392:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x3, 0x20, 3f, x1, 1484,0)
+
+inst_393:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555555; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x55555555, 0x80, 3f, x1, 1488,0)
+
+inst_394:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, -0x55555556, 0x556, 1b, x1, 1492,0)
+
+inst_395:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x5, 0x6, 1b, x1, 1496,0)
+
+inst_396:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333333; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x33333333, 0x100, 3f, x1, 1500,0)
+
+inst_397:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x66666666, 0x6, 1b, x1, 1504,0)
+
+inst_398:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb504; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, -0xb504, 0x556, 1b, x1, 1508,0)
+
+inst_399:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0xb504, 0x0, 3f, x1, 1512,0)
+
+inst_400:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x2, 0x40, 3f, x1, 1516,0)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x55555554, 0x4, 1b, x1, 1520,0)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x0, 0x0, 1b, x1, 1524,0)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x4, 0x556, 1b, x1, 1528,0)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333332; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x33333332, 0x8, 3f, x1, 1532,0)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x66666665, 0x2, 3f, x1, 1536,0)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0xb503, 0x4, 1b, x1, 1540,0)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x55555556, 0x4, 3f, x1, 1544,0)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555555; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, -0x55555555, 0x556, 1b, x1, 1548,0)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x6, 0x200, 3f, x1, 1552,0)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x33333334, 0x2, 3f, x1, 1556,0)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666667; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0x66666667, 0x10, 3f, x1, 1560,0)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, -0xb503, 0x2, 3f, x1, 1564,0)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb503; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb503, 0xb505, 0x400, 1b, x1, 1568,0)
+
+inst_414:
+// rs1_val==46341 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x3, 0x4, 3f, x1, 1572,0)
+
+inst_415:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x55555555, 0x10, 3f, x1, 1576,0)
+
+inst_416:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, -0x55555556, 0x6, 1b, x1, 1580,0)
+
+inst_417:
+// rs1_val==46341 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x5, 0x80, 3f, x1, 1584,0)
+
+inst_418:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333333; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x33333333, 0x8, 1b, x1, 1588,0)
+
+inst_419:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666666; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x66666666, 0x200, 3f, x1, 1592,0)
+
+inst_420:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:-0xb504; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, -0xb504, 0x40, 3f, x1, 1596,0)
+
+inst_421:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0xb504, 0x4, 3f, x1, 1600,0)
+
+inst_422:
+// rs1_val==46341 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x2, 0x8, 3f, x1, 1604,0)
+
+inst_423:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555554; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x55555554, 0x40, 3f, x1, 1608,0)
+
+inst_424:
+// rs1_val==46341 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x0, 0x8, 3f, x1, 1612,0)
+
+inst_425:
+// rs1_val==46341 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x4, 0x6, 1b, x1, 1616,0)
+
+inst_426:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x33333332, 0x6, 1b, x1, 1620,0)
+
+inst_427:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666665; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x66666665, 0x556, 1b, x1, 1624,0)
+
+inst_428:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0xb503, 0x400, 1b, x1, 1628,0)
+
+inst_429:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x55555556, 0x4, 3f, x1, 1632,0)
+
+inst_430:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, -0x55555555, 0x20, 3f, x1, 1636,0)
+
+inst_431:
+// rs1_val==46341 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x6, 0x4, 1b, x1, 1640,0)
+
+inst_432:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x33333334, 0x2, 1b, x1, 1644,0)
+
+inst_433:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0x66666667, 0x4, 3f, x1, 1648,0)
+
+inst_434:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:-0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, -0xb503, 0x8, 1b, x1, 1652,0)
+
+inst_435:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb505; op2val:0xb505; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb505, 0xb505, 0x0, 1b, x1, 1656,0)
+
+inst_436:
+// rs1_val==0 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x2, 0x0, 3f, x1, 1660,0)
+
+inst_437:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x55555554, 0x2, 1b, x1, 1664,0)
+
+inst_438:
+// rs1_val==0 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x0, 0x556, 1b, x1, 1668,0)
+
+inst_439:
+// rs1_val==0 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x4; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x4, 0x100, 3f, x1, 1672,0)
+
+inst_440:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x33333332, 0x0, 1b, x1, 1676,0)
+
+inst_441:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x66666665, 0x2, 1b, x1, 1680,0)
+
+inst_442:
+// rs1_val==0 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0xb503, 0x6, 3f, x1, 1684,0)
+
+inst_443:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x55555556, 0x400, 3f, x1, 1688,0)
+
+inst_444:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:-0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, -0x55555555, 0x2, 3f, x1, 1692,0)
+
+inst_445:
+// rs1_val==0 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x6, 0x100, 3f, x1, 1696,0)
+
+inst_446:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x33333334; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x33333334, 0x0, 3f, x1, 1700,0)
+
+inst_447:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x66666667; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x66666667, 0x20, 3f, x1, 1704,0)
+
+inst_448:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, -0xb503, 0x6, 1b, x1, 1708,0)
+
+inst_449:
+// rs1_val==0 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0xb505, 0x6, 3f, x1, 1712,0)
+
+inst_450:
+// rs1_val==4 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x3; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x3, 0x10, 3f, x1, 1716,0)
+
+inst_451:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x55555555, 0x400, 1b, x1, 1720,0)
+
+inst_452:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:-0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, -0x55555556, 0x2, 1b, x1, 1724,0)
+
+inst_453:
+// rs1_val==4 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x5, 0x40, 3f, x1, 1728,0)
+
+inst_454:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x33333333; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x33333333, 0x6, 3f, x1, 1732,0)
+
+inst_455:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x66666666; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x66666666, 0x100, 3f, x1, 1736,0)
+
+inst_456:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, -0xb504, 0x8, 3f, x1, 1740,0)
+
+inst_457:
+// rs1_val==4 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0xb504; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0xb504, 0x20, 3f, x1, 1744,0)
+
+inst_458:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x55555554, 0x2, 1b, x1, 1748,0)
+
+inst_459:
+// rs1_val==4 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x0, 0x4, 1b, x1, 1752,0)
+
+inst_460:
+// rs1_val==4 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x4, 0x4, 1b, x1, 1756,0)
+
+inst_461:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x33333332; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x33333332, 0x556, 1b, x1, 1760,0)
+
+inst_462:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x66666665; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x66666665, 0x8, 3f, x1, 1764,0)
+
+inst_463:
+// rs1_val==4 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0xb503, 0x40, 3f, x1, 1768,0)
+
+inst_464:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x55555556, 0x80, 3f, x1, 1772,0)
+
+inst_465:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:-0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, -0x55555555, 0x10, 3f, x1, 1776,0)
+
+inst_466:
+// rs1_val==4 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x6; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x6, 0x40, 3f, x1, 1780,0)
+
+inst_467:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x33333334; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x33333334, 0x200, 3f, x1, 1784,0)
+
+inst_468:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x66666667, 0x8, 1b, x1, 1788,0)
+
+inst_469:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:-0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, -0xb503, 0x2, 1b, x1, 1792,0)
+
+inst_470:
+// rs1_val==4 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0xb505, 0x8, 3f, x1, 1796,0)
+
+inst_471:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x3, 0x2, 3f, x1, 1800,0)
+
+inst_472:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x55555555, 0x10, 3f, x1, 1804,0)
+
+inst_473:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555556; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, -0x55555556, 0x20, 3f, x1, 1808,0)
+
+inst_474:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x5, 0x6, 1b, x1, 1812,0)
+
+inst_475:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333333; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x33333333, 0x2, 1b, x1, 1816,0)
+
+inst_476:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666666; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x66666666, 0x4, 3f, x1, 1820,0)
+
+inst_477:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, -0xb504, 0x0, 1b, x1, 1824,0)
+
+inst_478:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0xb504, 0x2, 1b, x1, 1828,0)
+
+inst_479:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x2; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x2, 0x200, 3f, x1, 1832,0)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555554; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x55555554, 0x100, 3f, x1, 1836,0)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x0, 0x2, 3f, x1, 1840,0)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x4, 0x6, 3f, x1, 1844,0)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x33333332, 0x400, 1b, x1, 1848,0)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x66666665, 0x400, 3f, x1, 1852,0)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0xb503, 0x8, 3f, x1, 1856,0)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555556; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x55555556, 0x100, 3f, x1, 1860,0)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555555; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, -0x55555555, 0x100, 3f, x1, 1864,0)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x6, 0x0, 1b, x1, 1868,0)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x33333334, 0x4, 3f, x1, 1872,0)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0x66666667, 0x8, 3f, x1, 1876,0)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, -0xb503, 0x400, 3f, x1, 1880,0)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x33333332, 0xb505, 0x400, 1b, x1, 1884,0)
+
+inst_493:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x3, 0x4, 3f, x1, 1888,0)
+
+inst_494:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x55555555, 0x40, 3f, x1, 1892,0)
+
+inst_495:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555556; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, -0x55555556, 0xa, 1b, x1, 1896,0)
+
+inst_496:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x5, 0x4, 1b, x1, 1900,0)
+
+inst_497:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333333; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x33333333, 0x200, 3f, x1, 1904,0)
+
+inst_498:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x66666666, 0x400, 3f, x1, 1908,0)
+
+inst_499:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, -0xb504, 0x4, 1b, x1, 1912,0)
+
+inst_500:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0xb504, 0x6, 1b, x1, 1916,0)
+
+inst_501:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x2, 0x6, 1b, x1, 1920,0)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555554; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x55555554, 0x8, 3f, x1, 1924,0)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x0, 0x6, 3f, x1, 1928,0)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x4; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x4, 0x200, 3f, x1, 1932,0)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333332; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x33333332, 0x100, 3f, x1, 1936,0)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x66666665, 0x400, 3f, x1, 1940,0)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0xb503, 0x2, 1b, x1, 1944,0)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x55555556, 0x556, 1b, x1, 1948,0)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555555; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, -0x55555555, 0xa, 1b, x1, 1952,0)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x6, 0x400, 3f, x1, 1956,0)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333334; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x33333334, 0x6, 1b, x1, 1960,0)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666667; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0x66666667, 0x0, 1b, x1, 1964,0)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, -0xb503, 0x20, 3f, x1, 1968,0)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb505; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x66666665, 0xb505, 0x40, 3f, x1, 1972,0)
+
+inst_515:
+// rs1_val==46339 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x3, 0xa, 1b, x1, 1976,0)
+
+inst_516:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x55555555, 0x4, 1b, x1, 1980,0)
+
+inst_517:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, -0x55555556, 0x556, 1b, x1, 1984,0)
+
+inst_518:
+// rs1_val==46339 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x5, 0x8, 3f, x1, 1988,0)
+
+inst_519:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333333; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x33333333, 0x8, 3f, x1, 1992,0)
+
+inst_520:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x66666666, 0x2, 3f, x1, 1996,0)
+
+inst_521:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, -0xb504, 0x8, 1b, x1, 2000,0)
+
+inst_522:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0xb504; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0xb504, 0x556, 1b, x1, 2004,0)
+
+inst_523:
+// rs1_val==46339 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x2, 0x6, 1b, x1, 2008,0)
+
+inst_524:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555554; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x55555554, 0x8, 3f, x1, 2012,0)
+
+inst_525:
+// rs1_val==46339 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x0, 0x0, 3f, x1, 2016,0)
+
+inst_526:
+// rs1_val==46339 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x4, 0x6, 3f, x1, 2020,0)
+
+inst_527:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333332; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x33333332, 0x80, 3f, x1, 2024,0)
+
+inst_528:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x66666665, 0x400, 3f, x1, 2028,0)
+
+inst_529:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0xb503, 0x4, 1b, x1, 2032,0)
+
+inst_530:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x55555556, 0x4, 1b, x1, 2036,0)
+
+inst_531:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, -0x55555555, 0x0, 3f, x1, 2040,0)
+
+inst_532:
+// rs1_val==46339 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x6, 0x0, 3f, x1, 2044,0)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_533:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x33333334, 0x4, 3f, x1, 0,0)
+
+inst_534:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666667; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0x66666667, 0x200, 3f, x1, 4,0)
+
+inst_535:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:-0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, -0xb503, 0x8, 3f, x1, 8,0)
+
+inst_536:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb503; op2val:0xb505; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb503, 0xb505, 0x4, 1b, x1, 12,0)
+
+inst_537:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x3; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x3, 0x10, 3f, x1, 16,0)
+
+inst_538:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x55555555, 0x6, 1b, x1, 20,0)
+
+inst_539:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, -0x55555556, 0x0, 1b, x1, 24,0)
+
+inst_540:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x5, 0x100, 3f, x1, 28,0)
+
+inst_541:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x33333333, 0x400, 3f, x1, 32,0)
+
+inst_542:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666666; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x66666666, 0x40, 3f, x1, 36,0)
+
+inst_543:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, -0xb504, 0x400, 3f, x1, 40,0)
+
+inst_544:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0xb504, 0x400, 1b, x1, 44,0)
+
+inst_545:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x2, 0x400, 3f, x1, 48,0)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x55555554, 0x4, 1b, x1, 52,0)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x0, 0x2, 1b, x1, 56,0)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x4, 0x10, 3f, x1, 60,0)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x33333332, 0x6, 1b, x1, 64,0)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666665; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x66666665, 0x200, 3f, x1, 68,0)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb503; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0xb503, 0xa, 1b, x1, 72,0)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555556; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x55555556, 0x100, 3f, x1, 76,0)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555555; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, -0x55555555, 0xa, 1b, x1, 80,0)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x6, 0x8, 1b, x1, 84,0)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333334; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x33333334, 0x200, 3f, x1, 88,0)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666667; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0x66666667, 0x400, 3f, x1, 92,0)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb503; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, -0xb503, 0x10, 3f, x1, 96,0)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: blt, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb505; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x55555556, 0xb505, 0xa, 1b, x1, 100,0)
+
+inst_559:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x3, 0xa, 1b, x1, 104,0)
+
+inst_560:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555555; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x55555555, 0x200, 3f, x1, 108,0)
+
+inst_561:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, -0x55555556, 0x4, 1b, x1, 112,0)
+
+inst_562:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x5, 0x556, 1b, x1, 116,0)
+
+inst_563:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333333; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x33333333, 0x2, 1b, x1, 120,0)
+
+inst_564:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666666; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x66666666, 0x4, 3f, x1, 124,0)
+
+inst_565:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, -0xb504, 0x200, 3f, x1, 128,0)
+
+inst_566:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb504; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0xb504, 0x100, 3f, x1, 132,0)
+
+inst_567:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x2, 0x556, 1b, x1, 136,0)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555554; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x55555554, 0xa, 1b, x1, 140,0)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x0, 0x6, 3f, x1, 144,0)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x4, 0x400, 1b, x1, 148,0)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x33333332, 0x6, 1b, x1, 152,0)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666665; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x66666665, 0x80, 3f, x1, 156,0)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0xb503, 0x20, 3f, x1, 160,0)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x55555556, 0x0, 3f, x1, 164,0)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, -0x55555555, 0x40, 3f, x1, 168,0)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x55555555, 0x6, 0x200, 3f, x1, 172,0)
+
+inst_577:
+// rs1_val > 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val==4 and rs2_val==2, rs1_val == 4, rs2_val == 2, rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x2; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x2, 0x80, 3f, x1, 176,0)
+
+inst_578:
+// rs2_val == 4, rs1_val == 2097152
+// opcode: blt, op1:x10; op2:x11; op1val:0x200000; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x200000, 0x4, 0x8, 1b, x1, 180,0)
+
+inst_579:
+// rs2_val == 512, rs1_val == 2147483647
+// opcode: blt, op1:x10; op2:x11; op1val:0x7fffffff; op2val:0x200; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x7fffffff, 0x200, 0x200, 3f, x1, 184,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x5_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_1:
+ .fill 21*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 47*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/bltu-01.S b/riscof/suite/rv32i_m/I/bltu-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..230240b9a9a0ba5d4e10e2c992446604cff5e2cd
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/bltu-01.S
@@ -0,0 +1,3709 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the bltu instruction of the RISC-V I extension for the bltu covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",bltu)
+
+RVTEST_SIGBASE( x11,signature_x11_1)
+
+inst_0:
+// rs1 == rs2, rs1==x17, rs2==x17, rs1_val > 0 and rs2_val > 0, rs1_val == 536870912, rs1_val > 0 and rs2_val > 0 and rs1_val > rs2_val and imm_val < 0 , rs2_val == 32768
+// opcode: bltu, op1:x17; op2:x17; op1val:0x20000000; op2val:0x20000000; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x2, x17, x17, 0x20000000, 0x20000000, 0x556, 1b, x11, 0,0)
+
+inst_1:
+// rs1 != rs2, rs1==x8, rs2==x20, rs1_val > 0 and rs2_val > 0 and rs1_val == rs2_val and imm_val > 0, rs1_val == 4286578687, rs2_val == 4286578687
+// opcode: bltu, op1:x8; op2:x20; op1val:0xff7fffff; op2val:0xff7fffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x2, x8, x20, 0xff7fffff, 0xff7fffff, 0x4, 3f, x11, 4,0)
+
+inst_2:
+// rs1==x21, rs2==x7, rs1_val > 0 and rs2_val > 0 and rs1_val == rs2_val and imm_val < 0, rs1_val == 2147483647, rs2_val == 2147483647
+// opcode: bltu, op1:x21; op2:x7; op1val:0x7fffffff; op2val:0x7fffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x2, x21, x7, 0x7fffffff, 0x7fffffff, 0x8, 1b, x11, 8,0)
+
+inst_3:
+// rs1==x20, rs2==x21, rs1_val > 0 and rs2_val > 0 and rs1_val > rs2_val and imm_val > 0 , rs1_val == 4261412863
+// opcode: bltu, op1:x20; op2:x21; op1val:0xfdffffff; op2val:0xaaaaaaab; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x2, x20, x21, 0xfdffffff, 0xaaaaaaab, 0x100, 3f, x11, 12,0)
+
+inst_4:
+// rs1==x26, rs2==x19, rs1_val > 0 and rs2_val > 0 and rs1_val < rs2_val and imm_val > 0 , rs1_val == 4294967294
+// opcode: bltu, op1:x26; op2:x19; op1val:0xfffffffe; op2val:0xffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x2, x26, x19, 0xfffffffe, 0xffffffff, 0x400, 3f, x11, 16,0)
+
+inst_5:
+// rs1==x25, rs2==x0, rs1_val > 0 and rs2_val > 0 and rs1_val < rs2_val and imm_val < 0 , rs2_val == 4227858431, rs1_val == 1073741824
+// opcode: bltu, op1:x25; op2:x0; op1val:0x40000000; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x2, x25, x0, 0x40000000, 0x0, 0x2, 1b, x11, 20,0)
+
+inst_6:
+// rs1==x29, rs2==x18, rs2_val == 1, rs1_val == 262144
+// opcode: bltu, op1:x29; op2:x18; op1val:0x40000; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x2, x29, x18, 0x40000, 0x1, 0x8, 1b, x11, 24,0)
+
+inst_7:
+// rs1==x0, rs2==x13, rs2_val == 2, rs1_val==858993459 and rs2_val==2
+// opcode: bltu, op1:x0; op2:x13; op1val:0x0; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x2, x0, x13, 0x0, 0x2, 0x0, 3f, x11, 28,0)
+
+inst_8:
+// rs1==x30, rs2==x1, rs2_val == 4, rs1_val==2863311531 and rs2_val==4
+// opcode: bltu, op1:x30; op2:x1; op1val:0xaaaaaaab; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x2, x30, x1, 0xaaaaaaab, 0x4, 0x0, 1b, x11, 32,0)
+
+inst_9:
+// rs1==x16, rs2==x8, rs2_val == 8, rs1_val == 128
+// opcode: bltu, op1:x16; op2:x8; op1val:0x80; op2val:0x8; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x2, x16, x8, 0x80, 0x8, 0x40, 3f, x11, 36,0)
+
+inst_10:
+// rs1==x7, rs2==x30, rs2_val == 16,
+// opcode: bltu, op1:x7; op2:x30; op1val:0x40000; op2val:0x10; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x2, x7, x30, 0x40000, 0x10, 0x80, 3f, x11, 40,0)
+
+inst_11:
+// rs1==x9, rs2==x3, rs2_val == 32,
+// opcode: bltu, op1:x9; op2:x3; op1val:0x0; op2val:0x20; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x2, x9, x3, 0x0, 0x20, 0x6, 3f, x11, 44,0)
+
+inst_12:
+// rs1==x14, rs2==x9, rs2_val == 64,
+// opcode: bltu, op1:x14; op2:x9; op1val:0x11; op2val:0x40; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x2, x14, x9, 0x11, 0x40, 0x80, 3f, x11, 48,0)
+
+inst_13:
+// rs1==x6, rs2==x29, rs2_val == 128, rs1_val == 3221225471
+// opcode: bltu, op1:x6; op2:x29; op1val:0xbfffffff; op2val:0x80; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x2, x6, x29, 0xbfffffff, 0x80, 0x4, 1b, x11, 52,0)
+
+inst_14:
+// rs1==x1, rs2==x5, rs2_val == 256,
+// opcode: bltu, op1:x1; op2:x5; op1val:0x7; op2val:0x100; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x2, x1, x5, 0x7, 0x100, 0x20, 3f, x11, 56,0)
+
+inst_15:
+// rs1==x31, rs2==x28, rs2_val == 512,
+// opcode: bltu, op1:x31; op2:x28; op1val:0xf; op2val:0x200; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x2, x31, x28, 0xf, 0x200, 0x200, 3f, x11, 60,0)
+
+inst_16:
+// rs1==x18, rs2==x22, rs2_val == 1024, rs1_val == 67108864
+// opcode: bltu, op1:x18; op2:x22; op1val:0x4000000; op2val:0x400; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x2, x18, x22, 0x4000000, 0x400, 0x6, 3f, x11, 64,0)
+
+inst_17:
+// rs1==x10, rs2==x4, rs2_val == 2048,
+// opcode: bltu, op1:x10; op2:x4; op1val:0x66666665; op2val:0x800; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x2, x10, x4, 0x66666665, 0x800, 0x6, 1b, x11, 68,0)
+
+inst_18:
+// rs1==x4, rs2==x31, rs2_val == 4096, rs1_val == 4026531839
+// opcode: bltu, op1:x4; op2:x31; op1val:0xefffffff; op2val:0x1000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x2, x4, x31, 0xefffffff, 0x1000, 0x2, 3f, x11, 72,0)
+
+inst_19:
+// rs1==x15, rs2==x25, rs2_val == 8192, rs1_val == 4294967279
+// opcode: bltu, op1:x15; op2:x25; op1val:0xffffffef; op2val:0x2000; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x2, x15, x25, 0xffffffef, 0x2000, 0x20, 3f, x11, 76,0)
+
+inst_20:
+// rs1==x5, rs2==x16, rs2_val == 16384,
+// opcode: bltu, op1:x5; op2:x16; op1val:0x0; op2val:0x4000; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x2, x5, x16, 0x0, 0x4000, 0x10, 3f, x11, 80,0)
+
+inst_21:
+// rs1==x12, rs2==x26, rs2_val == 65536, rs1_val==0 and rs2_val==65536
+// opcode: bltu, op1:x12; op2:x26; op1val:0x0; op2val:0x10000; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x2, x12, x26, 0x0, 0x10000, 0x4, 3f, x11, 84,0)
+
+inst_22:
+// rs1==x22, rs2==x24, rs2_val == 131072, rs1_val == 32
+// opcode: bltu, op1:x22; op2:x24; op1val:0x20; op2val:0x20000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x2, x22, x24, 0x20, 0x20000, 0x6, 1b, x11, 88,0)
+
+inst_23:
+// rs1==x2, rs2==x27, rs2_val == 262144,
+// opcode: bltu, op1:x2; op2:x27; op1val:0x7; op2val:0x40000; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x2, x27, 0x7, 0x40000, 0x0, 1b, x11, 92,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_24:
+// rs1==x27, rs2==x15, rs2_val == 524288,
+// opcode: bltu, op1:x27; op2:x15; op1val:0xe; op2val:0x80000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x27, x15, 0xe, 0x80000, 0x2, 1b, x1, 0,0)
+
+inst_25:
+// rs1==x11, rs2==x10, rs2_val == 1048576, rs1_val == 8388608
+// opcode: bltu, op1:x11; op2:x10; op1val:0x800000; op2val:0x100000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x11, x10, 0x800000, 0x100000, 0x2, 1b, x1, 4,0)
+
+inst_26:
+// rs1==x23, rs2==x2, rs2_val == 2097152, rs1_val == 64
+// opcode: bltu, op1:x23; op2:x2; op1val:0x40; op2val:0x200000; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x23, x2, 0x40, 0x200000, 0x200, 3f, x1, 8,0)
+
+inst_27:
+// rs1==x19, rs2==x12, rs2_val == 4194304, rs1_val == 256
+// opcode: bltu, op1:x19; op2:x12; op1val:0x100; op2val:0x400000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x19, x12, 0x100, 0x400000, 0x400, 3f, x1, 12,0)
+
+inst_28:
+// rs1==x24, rs2==x11, rs2_val == 8388608, rs1_val == 4294967293
+// opcode: bltu, op1:x24; op2:x11; op1val:0xfffffffd; op2val:0x800000; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x24, x11, 0xfffffffd, 0x800000, 0x0, 1b, x1, 16,0)
+
+inst_29:
+// rs1==x3, rs2==x14, rs2_val == 16777216,
+// opcode: bltu, op1:x3; op2:x14; op1val:0x40000000; op2val:0x1000000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x3, x14, 0x40000000, 0x1000000, 0x2, 1b, x1, 20,0)
+
+inst_30:
+// rs1==x28, rs2==x6, rs2_val == 33554432, rs1_val == 4292870143
+// opcode: bltu, op1:x28; op2:x6; op1val:0xffdfffff; op2val:0x2000000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x28, x6, 0xffdfffff, 0x2000000, 0x2, 1b, x1, 24,0)
+
+inst_31:
+// rs1==x13, rs2==x23, rs2_val == 67108864,
+// opcode: bltu, op1:x13; op2:x23; op1val:0x66666665; op2val:0x4000000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x13, x23, 0x66666665, 0x4000000, 0x400, 3f, x1, 28,0)
+
+inst_32:
+// rs2_val == 134217728,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xbfffffff; op2val:0x8000000; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xbfffffff, 0x8000000, 0x100, 3f, x1, 32,0)
+
+inst_33:
+// rs2_val == 268435456,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xefffffff; op2val:0x10000000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xefffffff, 0x10000000, 0x400, 1b, x1, 36,0)
+
+inst_34:
+// rs2_val == 536870912, rs1_val == 16384
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4000; op2val:0x20000000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4000, 0x20000000, 0x2, 1b, x1, 40,0)
+
+inst_35:
+// rs2_val == 1073741824, rs1_val == 4294901759
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffeffff; op2val:0x40000000; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffeffff, 0x40000000, 0x8, 3f, x1, 44,0)
+
+inst_36:
+// rs2_val == 2147483648, rs1_val == 4294836223
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffdffff; op2val:0x80000000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffdffff, 0x80000000, 0x2, 1b, x1, 48,0)
+
+inst_37:
+// rs2_val == 4294967294, rs1_val == 65536
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0xfffffffe; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0xfffffffe, 0x200, 3f, x1, 52,0)
+
+inst_38:
+// rs2_val == 4294967293,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xc; op2val:0xfffffffd; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xc, 0xfffffffd, 0x6, 1b, x1, 56,0)
+
+inst_39:
+// rs2_val == 4294967291, rs1_val == 4
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xfffffffb; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0xfffffffb, 0x100, 3f, x1, 60,0)
+
+inst_40:
+// rs2_val == 4294967287, rs1_val == 2863311530
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xfffffff7; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0xfffffff7, 0xa, 1b, x1, 64,0)
+
+inst_41:
+// rs2_val == 4294967279,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xffffffef; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0xffffffef, 0x400, 1b, x1, 68,0)
+
+inst_42:
+// rs2_val == 4294967263,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffef; op2val:0xffffffdf; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffffffef, 0xffffffdf, 0x6, 3f, x1, 72,0)
+
+inst_43:
+// rs2_val == 4294967231,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffdfffff; op2val:0xffffffbf; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffdfffff, 0xffffffbf, 0x10, 3f, x1, 76,0)
+
+inst_44:
+// rs2_val == 4294967167,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xf; op2val:0xffffff7f; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xf, 0xffffff7f, 0x8, 3f, x1, 80,0)
+
+inst_45:
+// rs2_val == 4294967039,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xf; op2val:0xfffffeff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xf, 0xfffffeff, 0x4, 3f, x1, 84,0)
+
+inst_46:
+// rs2_val == 4294966783,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x800000; op2val:0xfffffdff; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x800000, 0xfffffdff, 0x6, 1b, x1, 88,0)
+
+inst_47:
+// rs2_val == 4294966271,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb; op2val:0xfffffbff; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb, 0xfffffbff, 0x200, 3f, x1, 92,0)
+
+inst_48:
+// rs2_val == 4294965247, rs1_val == 1048576
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000; op2val:0xfffff7ff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x100000, 0xfffff7ff, 0x0, 1b, x1, 96,0)
+
+inst_49:
+// rs2_val == 4294963199,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xffffefff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0xffffefff, 0x0, 3f, x1, 100,0)
+
+inst_50:
+// rs2_val == 4294959103,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xffffdfff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0xffffdfff, 0x400, 3f, x1, 104,0)
+
+inst_51:
+// rs2_val == 4294950911, rs1_val == 3758096383
+// opcode: bltu, op1:x10; op2:x11; op1val:0xdfffffff; op2val:0xffffbfff; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xdfffffff, 0xffffbfff, 0x80, 3f, x1, 108,0)
+
+inst_52:
+// rs2_val == 4294934527, rs1_val == 1
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xffff7fff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0xffff7fff, 0x0, 3f, x1, 112,0)
+
+inst_53:
+// rs2_val == 4294901759, rs1_val == 8192
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2000; op2val:0xfffeffff; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2000, 0xfffeffff, 0x6, 1b, x1, 116,0)
+
+inst_54:
+// rs2_val == 4294836223,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4000; op2val:0xfffdffff; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4000, 0xfffdffff, 0x40, 3f, x1, 120,0)
+
+inst_55:
+// rs2_val == 4294705151,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xfffbffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0xfffbffff, 0x2, 3f, x1, 124,0)
+
+inst_56:
+// rs2_val == 4294443007,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xfff7ffff; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0xfff7ffff, 0x8, 1b, x1, 128,0)
+
+inst_57:
+// rs2_val == 4293918719,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0xffefffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0xffefffff, 0x0, 3f, x1, 132,0)
+
+inst_58:
+// rs2_val == 4292870143,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xffdfffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0xffdfffff, 0x2, 1b, x1, 136,0)
+
+inst_59:
+// rs2_val == 4290772991, rs1_val == 4294967167
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffff7f; op2val:0xffbfffff; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffffff7f, 0xffbfffff, 0x200, 3f, x1, 140,0)
+
+inst_60:
+// rs2_val == 4278190079,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x40000; op2val:0xfeffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x40000, 0xfeffffff, 0x0, 3f, x1, 144,0)
+
+inst_61:
+// rs2_val == 4261412863, rs1_val == 2
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xfdffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0xfdffffff, 0x0, 1b, x1, 148,0)
+
+inst_62:
+// rs2_val == 4160749567,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x40000000; op2val:0xf7ffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x40000000, 0xf7ffffff, 0x400, 1b, x1, 152,0)
+
+inst_63:
+// rs2_val == 4026531839, rs1_val == 4294967287
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffff7; op2val:0xefffffff; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffffff7, 0xefffffff, 0x20, 3f, x1, 156,0)
+
+inst_64:
+// rs2_val == 3758096383,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffef; op2val:0xdfffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffffffef, 0xdfffffff, 0x2, 1b, x1, 160,0)
+
+inst_65:
+// rs2_val == 3221225471,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xbfffffff; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0xbfffffff, 0x556, 1b, x1, 164,0)
+
+inst_66:
+// rs2_val == 1431655765, rs1_val==858993460 and rs2_val==1431655765
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555555; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x55555555, 0x80, 3f, x1, 168,0)
+
+inst_67:
+// rs2_val == 2863311530, rs1_val == 16
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10; op2val:0xaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10, 0xaaaaaaaa, 0x0, 1b, x1, 172,0)
+
+inst_68:
+// rs1_val == 8,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x8; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x8, 0x3, 0xa, 1b, x1, 176,0)
+
+inst_69:
+// rs1_val == 512,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x200; op2val:0xd; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x200, 0xd, 0x40, 3f, x1, 180,0)
+
+inst_70:
+// rs1_val == 1024,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x400; op2val:0xffbfffff; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x400, 0xffbfffff, 0xa, 1b, x1, 184,0)
+
+inst_71:
+// rs1_val == 2048,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x800; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x800, 0x5, 0x556, 1b, x1, 188,0)
+
+inst_72:
+// rs1_val == 4096,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1000; op2val:0x40000000; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1000, 0x40000000, 0x100, 3f, x1, 192,0)
+
+inst_73:
+// rs1_val == 32768,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x8000; op2val:0xfffbffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x8000, 0xfffbffff, 0x4, 3f, x1, 196,0)
+
+inst_74:
+// rs1_val == 131072,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x20000; op2val:0x800000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x20000, 0x800000, 0x2, 1b, x1, 200,0)
+
+inst_75:
+// rs1_val == 524288,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x80000; op2val:0xffffefff; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x80000, 0xffffefff, 0xa, 1b, x1, 204,0)
+
+inst_76:
+// rs1_val == 2097152,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x200000; op2val:0x4000000; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x200000, 0x4000000, 0x40, 3f, x1, 208,0)
+
+inst_77:
+// rs1_val == 4194304,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x400000; op2val:0x40000; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x400000, 0x40000, 0x556, 1b, x1, 212,0)
+
+inst_78:
+// rs1_val == 16777216,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1000000; op2val:0xdfffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1000000, 0xdfffffff, 0x4, 3f, x1, 216,0)
+
+inst_79:
+// rs1_val == 33554432,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2000000; op2val:0x4000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2000000, 0x4000, 0x400, 3f, x1, 220,0)
+
+inst_80:
+// rs1_val == 134217728,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x8000000; op2val:0x20000; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x8000000, 0x20000, 0x8, 1b, x1, 224,0)
+
+inst_81:
+// rs1_val == 268435456,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000000; op2val:0xfffffbff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000000, 0xfffffbff, 0x400, 3f, x1, 228,0)
+
+inst_82:
+// rs1_val == 2147483648,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x80000000; op2val:0xfdffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x80000000, 0xfdffffff, 0x0, 1b, x1, 232,0)
+
+inst_83:
+// rs1_val == 4294967291,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffb; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffffffb, 0x55555554, 0x4, 1b, x1, 236,0)
+
+inst_84:
+// rs1_val == 4294967263,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffdf; op2val:0xffff7fff; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffffffdf, 0xffff7fff, 0xa, 1b, x1, 240,0)
+
+inst_85:
+// rs1_val == 4294967231,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffbf; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffffffbf, 0x2, 0x400, 3f, x1, 244,0)
+
+inst_86:
+// rs1_val == 4294967039,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffeff; op2val:0xaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffffeff, 0xaaaaaaaa, 0x0, 1b, x1, 248,0)
+
+inst_87:
+// rs1_val == 4294966783,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffdff; op2val:0x400; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffffdff, 0x400, 0x2, 1b, x1, 252,0)
+
+inst_88:
+// rs1_val == 4294966271,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffbff; op2val:0x100000; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffffbff, 0x100000, 0x8, 1b, x1, 256,0)
+
+inst_89:
+// rs1_val == 4294965247,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffff7ff; op2val:0x1000; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffff7ff, 0x1000, 0x200, 3f, x1, 260,0)
+
+inst_90:
+// rs1_val == 4294963199,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffefff; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffffefff, 0x3, 0x6, 1b, x1, 264,0)
+
+inst_91:
+// rs1_val == 4294959103,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffdfff; op2val:0xff7fffff; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffffdfff, 0xff7fffff, 0x6, 3f, x1, 268,0)
+
+inst_92:
+// rs1_val == 4294950911,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffbfff; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffffbfff, 0x3, 0x400, 3f, x1, 272,0)
+
+inst_93:
+// rs1_val == 4294934527,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff7fff; op2val:0x9; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff7fff, 0x9, 0x200, 3f, x1, 276,0)
+
+inst_94:
+// rs1_val == 4294705151,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffbffff; op2val:0x800; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffbffff, 0x800, 0x40, 3f, x1, 280,0)
+
+inst_95:
+// rs1_val == 4294443007,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfff7ffff; op2val:0xffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfff7ffff, 0xffffffff, 0x0, 3f, x1, 284,0)
+
+inst_96:
+// rs1_val == 4293918719,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffefffff; op2val:0x10000; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffefffff, 0x10000, 0x0, 3f, x1, 288,0)
+
+inst_97:
+// rs1_val == 4290772991,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffbfffff; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffbfffff, 0x0, 0x4, 3f, x1, 292,0)
+
+inst_98:
+// rs1_val == 4278190079,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfeffffff; op2val:0x80; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfeffffff, 0x80, 0x6, 3f, x1, 296,0)
+
+inst_99:
+// rs1_val == 4227858431,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfbffffff; op2val:0x3; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfbffffff, 0x3, 0x556, 1b, x1, 300,0)
+
+inst_100:
+// rs1_val == 4160749567,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xf7ffffff; op2val:0xffffbfff; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xf7ffffff, 0xffffbfff, 0x40, 3f, x1, 304,0)
+
+inst_101:
+// rs1_val == 1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xdfffffff; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0xdfffffff, 0x80, 3f, x1, 308,0)
+
+inst_102:
+// rs1_val==3 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x3, 0xa, 1b, x1, 312,0)
+
+inst_103:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x55555555, 0x8, 3f, x1, 316,0)
+
+inst_104:
+// rs1_val==3 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xaaaaaaaa; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0xaaaaaaaa, 0x80, 3f, x1, 320,0)
+
+inst_105:
+// rs1_val==3 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x5, 0x100, 3f, x1, 324,0)
+
+inst_106:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x33333333; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x33333333, 0x8, 3f, x1, 328,0)
+
+inst_107:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x66666666; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x66666666, 0x40, 3f, x1, 332,0)
+
+inst_108:
+// rs1_val==3 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0xb504, 0x0, 3f, x1, 336,0)
+
+inst_109:
+// rs1_val==3 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x0, 0x8, 3f, x1, 340,0)
+
+inst_110:
+// rs1_val==3 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0xffff, 0x4, 3f, x1, 344,0)
+
+inst_111:
+// rs1_val==3 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x2, 0x100, 3f, x1, 348,0)
+
+inst_112:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x55555554; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x55555554, 0x20, 3f, x1, 352,0)
+
+inst_113:
+// rs1_val==3 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xaaaaaaa9; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0xaaaaaaa9, 0x40, 3f, x1, 356,0)
+
+inst_114:
+// rs1_val==3 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x4, 0x556, 1b, x1, 360,0)
+
+inst_115:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x33333332, 0x2, 3f, x1, 364,0)
+
+inst_116:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x66666665; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x66666665, 0x4, 3f, x1, 368,0)
+
+inst_117:
+// rs1_val==3 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0xb503, 0x6, 1b, x1, 372,0)
+
+inst_118:
+// rs1_val==3 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xfffe; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0xfffe, 0x400, 1b, x1, 376,0)
+
+inst_119:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x55555556, 0x0, 3f, x1, 380,0)
+
+inst_120:
+// rs1_val==3 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0xaaaaaaab, 0x2, 1b, x1, 384,0)
+
+inst_121:
+// rs1_val==3 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x6, 0x100, 3f, x1, 388,0)
+
+inst_122:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x33333334, 0x2, 1b, x1, 392,0)
+
+inst_123:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x66666667; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x66666667, 0x80, 3f, x1, 396,0)
+
+inst_124:
+// rs1_val==3 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xb505; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0xb505, 0x10, 3f, x1, 400,0)
+
+inst_125:
+// rs1_val==3 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x1, 0x8, 1b, x1, 404,0)
+
+inst_126:
+// rs1_val==3 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x10000; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x3, 0x10000, 0x100, 3f, x1, 408,0)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x3, 0x80, 3f, x1, 412,0)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x55555555, 0x0, 1b, x1, 416,0)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xaaaaaaaa; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0xaaaaaaaa, 0x400, 1b, x1, 420,0)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x5; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x5, 0x20, 3f, x1, 424,0)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333333; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x33333333, 0x20, 3f, x1, 428,0)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666666; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x66666666, 0x200, 3f, x1, 432,0)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0xb504, 0x2, 3f, x1, 436,0)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x0, 0x400, 1b, x1, 440,0)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xffff; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0xffff, 0x40, 3f, x1, 444,0)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x2, 0x8, 3f, x1, 448,0)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x55555554, 0x4, 3f, x1, 452,0)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xaaaaaaa9; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0xaaaaaaa9, 0x8, 1b, x1, 456,0)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x4, 0x10, 3f, x1, 460,0)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333332; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x33333332, 0xa, 1b, x1, 464,0)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666665; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x66666665, 0x6, 3f, x1, 468,0)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb503; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0xb503, 0x100, 3f, x1, 472,0)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xfffe; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0xfffe, 0x8, 1b, x1, 476,0)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x55555556, 0x2, 3f, x1, 480,0)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xaaaaaaab; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0xaaaaaaab, 0x6, 1b, x1, 484,0)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x6, 0xa, 1b, x1, 488,0)
+
+inst_147:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333334; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x33333334, 0x20, 3f, x1, 492,0)
+
+inst_148:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666667; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x66666667, 0x400, 1b, x1, 496,0)
+
+inst_149:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb505; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0xb505, 0x0, 1b, x1, 500,0)
+
+inst_150:
+// rs1_val==1431655765 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x1; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x1, 0x0, 3f, x1, 504,0)
+
+inst_151:
+// rs1_val==1431655765 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x10000; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555555, 0x10000, 0x80, 3f, x1, 508,0)
+
+inst_152:
+// rs1_val==2863311530 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x3, 0x6, 3f, x1, 512,0)
+
+inst_153:
+// rs1_val==2863311530 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x55555555, 0x20, 3f, x1, 516,0)
+
+inst_154:
+// rs1_val==2863311530 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xaaaaaaaa; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0xaaaaaaaa, 0xa, 1b, x1, 520,0)
+
+inst_155:
+// rs1_val==2863311530 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x5, 0x400, 1b, x1, 524,0)
+
+inst_156:
+// rs1_val==2863311530 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x33333333; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x33333333, 0x40, 3f, x1, 528,0)
+
+inst_157:
+// rs1_val==2863311530 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x66666666; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x66666666, 0x8, 3f, x1, 532,0)
+
+inst_158:
+// rs1_val==2863311530 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xb504; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0xb504, 0x80, 3f, x1, 536,0)
+
+inst_159:
+// rs1_val==2863311530 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x0, 0x10, 3f, x1, 540,0)
+
+inst_160:
+// rs1_val==2863311530 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xffff; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0xffff, 0x80, 3f, x1, 544,0)
+
+inst_161:
+// rs1_val==2863311530 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x2, 0x0, 1b, x1, 548,0)
+
+inst_162:
+// rs1_val==2863311530 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x55555554, 0x2, 1b, x1, 552,0)
+
+inst_163:
+// rs1_val==2863311530 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xaaaaaaa9; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0xaaaaaaa9, 0x4, 3f, x1, 556,0)
+
+inst_164:
+// rs1_val==2863311530 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x4, 0x40, 3f, x1, 560,0)
+
+inst_165:
+// rs1_val==2863311530 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x33333332; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x33333332, 0xa, 1b, x1, 564,0)
+
+inst_166:
+// rs1_val==2863311530 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x66666665; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x66666665, 0x6, 1b, x1, 568,0)
+
+inst_167:
+// rs1_val==2863311530 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xb503; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0xb503, 0x80, 3f, x1, 572,0)
+
+inst_168:
+// rs1_val==2863311530 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xfffe; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0xfffe, 0x400, 1b, x1, 576,0)
+
+inst_169:
+// rs1_val==2863311530 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x55555556; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x55555556, 0x10, 3f, x1, 580,0)
+
+inst_170:
+// rs1_val==2863311530 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0xaaaaaaab, 0x4, 3f, x1, 584,0)
+
+inst_171:
+// rs1_val==2863311530 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x6, 0xa, 1b, x1, 588,0)
+
+inst_172:
+// rs1_val==2863311530 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x33333334; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x33333334, 0x0, 1b, x1, 592,0)
+
+inst_173:
+// rs1_val==2863311530 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x66666667, 0x8, 3f, x1, 596,0)
+
+inst_174:
+// rs1_val==2863311530 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0xb505, 0x200, 3f, x1, 600,0)
+
+inst_175:
+// rs1_val==2863311530 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x1; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x1, 0x6, 1b, x1, 604,0)
+
+inst_176:
+// rs1_val==2863311530 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaa; op2val:0x10000; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaaa, 0x10000, 0x8, 1b, x1, 608,0)
+
+inst_177:
+// rs1_val==5 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x3, 0x20, 3f, x1, 612,0)
+
+inst_178:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x55555555, 0x2, 3f, x1, 616,0)
+
+inst_179:
+// rs1_val==5 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xaaaaaaaa; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0xaaaaaaaa, 0x10, 3f, x1, 620,0)
+
+inst_180:
+// rs1_val==5 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x5, 0x8, 1b, x1, 624,0)
+
+inst_181:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x33333333, 0x4, 3f, x1, 628,0)
+
+inst_182:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x66666666; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x66666666, 0x0, 3f, x1, 632,0)
+
+inst_183:
+// rs1_val==5 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0xb504, 0x0, 3f, x1, 636,0)
+
+inst_184:
+// rs1_val==5 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x0, 0x40, 3f, x1, 640,0)
+
+inst_185:
+// rs1_val==5 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xffff; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0xffff, 0xa, 1b, x1, 644,0)
+
+inst_186:
+// rs1_val==5 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x2, 0x400, 3f, x1, 648,0)
+
+inst_187:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x55555554, 0x4, 3f, x1, 652,0)
+
+inst_188:
+// rs1_val==5 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xaaaaaaa9; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0xaaaaaaa9, 0x4, 1b, x1, 656,0)
+
+inst_189:
+// rs1_val==5 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x4, 0x6, 3f, x1, 660,0)
+
+inst_190:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x33333332, 0x0, 1b, x1, 664,0)
+
+inst_191:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x66666665; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x66666665, 0x80, 3f, x1, 668,0)
+
+inst_192:
+// rs1_val==5 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xb503; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0xb503, 0x10, 3f, x1, 672,0)
+
+inst_193:
+// rs1_val==5 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xfffe; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0xfffe, 0x0, 1b, x1, 676,0)
+
+inst_194:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x55555556, 0x4, 3f, x1, 680,0)
+
+inst_195:
+// rs1_val==5 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xaaaaaaab; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0xaaaaaaab, 0x8, 1b, x1, 684,0)
+
+inst_196:
+// rs1_val==5 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x6, 0x6, 1b, x1, 688,0)
+
+inst_197:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x33333334; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x33333334, 0x0, 3f, x1, 692,0)
+
+inst_198:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x66666667; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x66666667, 0x100, 3f, x1, 696,0)
+
+inst_199:
+// rs1_val==5 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xb505; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0xb505, 0x20, 3f, x1, 700,0)
+
+inst_200:
+// rs1_val==5 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x1; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x1, 0x4, 1b, x1, 704,0)
+
+inst_201:
+// rs1_val==5 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x10000; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x5, 0x10000, 0xa, 1b, x1, 708,0)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x3, 0x4, 3f, x1, 712,0)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555555; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x55555555, 0x556, 1b, x1, 716,0)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xaaaaaaaa; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0xaaaaaaaa, 0x400, 1b, x1, 720,0)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x5; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x5, 0xa, 1b, x1, 724,0)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333333; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x33333333, 0x20, 3f, x1, 728,0)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x66666666, 0x6, 1b, x1, 732,0)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb504; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0xb504, 0x100, 3f, x1, 736,0)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x0, 0x400, 3f, x1, 740,0)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0xffff, 0x4, 3f, x1, 744,0)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x55555554, 0x0, 1b, x1, 748,0)
+
+inst_212:
+// rs1_val==858993459 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xaaaaaaa9; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0xaaaaaaa9, 0x0, 1b, x1, 752,0)
+
+inst_213:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x4; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x4, 0x100, 3f, x1, 756,0)
+
+inst_214:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x33333332, 0x0, 1b, x1, 760,0)
+
+inst_215:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666665; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x66666665, 0x4, 3f, x1, 764,0)
+
+inst_216:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb503; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0xb503, 0x80, 3f, x1, 768,0)
+
+inst_217:
+// rs1_val==858993459 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xfffe; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0xfffe, 0x6, 3f, x1, 772,0)
+
+inst_218:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555556; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x55555556, 0x20, 3f, x1, 776,0)
+
+inst_219:
+// rs1_val==858993459 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0xaaaaaaab, 0x4, 1b, x1, 780,0)
+
+inst_220:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x6, 0x0, 3f, x1, 784,0)
+
+inst_221:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x33333334, 0x8, 3f, x1, 788,0)
+
+inst_222:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666667; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x66666667, 0x2, 3f, x1, 792,0)
+
+inst_223:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0xb505, 0x8, 1b, x1, 796,0)
+
+inst_224:
+// rs1_val==858993459 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x1; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x1, 0x4, 1b, x1, 800,0)
+
+inst_225:
+// rs1_val==858993459 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x10000; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x10000, 0x8, 1b, x1, 804,0)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x3, 0x0, 1b, x1, 808,0)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x55555555, 0x6, 1b, x1, 812,0)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xaaaaaaaa; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0xaaaaaaaa, 0x8, 1b, x1, 816,0)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x5, 0x4, 1b, x1, 820,0)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333333; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x33333333, 0x80, 3f, x1, 824,0)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666666; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x66666666, 0x40, 3f, x1, 828,0)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb504; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0xb504, 0x40, 3f, x1, 832,0)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x0, 0x0, 3f, x1, 836,0)
+
+inst_234:
+// rs1_val==1717986918 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0xffff, 0x0, 1b, x1, 840,0)
+
+inst_235:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x2, 0x2, 3f, x1, 844,0)
+
+inst_236:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x55555554, 0x4, 3f, x1, 848,0)
+
+inst_237:
+// rs1_val==1717986918 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xaaaaaaa9; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0xaaaaaaa9, 0x6, 1b, x1, 852,0)
+
+inst_238:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x4, 0x8, 3f, x1, 856,0)
+
+inst_239:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x33333332, 0x400, 3f, x1, 860,0)
+
+inst_240:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x66666665, 0x400, 1b, x1, 864,0)
+
+inst_241:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0xb503, 0x6, 3f, x1, 868,0)
+
+inst_242:
+// rs1_val==1717986918 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xfffe; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0xfffe, 0x6, 1b, x1, 872,0)
+
+inst_243:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x55555556, 0x80, 3f, x1, 876,0)
+
+inst_244:
+// rs1_val==1717986918 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xaaaaaaab; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0xaaaaaaab, 0x200, 3f, x1, 880,0)
+
+inst_245:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x6; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x6, 0x40, 3f, x1, 884,0)
+
+inst_246:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x33333334, 0x8, 1b, x1, 888,0)
+
+inst_247:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x66666667, 0x8, 1b, x1, 892,0)
+
+inst_248:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb505; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0xb505, 0x4, 1b, x1, 896,0)
+
+inst_249:
+// rs1_val==1717986918 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x1; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x1, 0x0, 3f, x1, 900,0)
+
+inst_250:
+// rs1_val==1717986918 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666666; op2val:0x10000; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666666, 0x10000, 0x556, 1b, x1, 904,0)
+
+inst_251:
+// rs1_val==46340 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x3, 0x8, 3f, x1, 908,0)
+
+inst_252:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x55555555, 0x400, 3f, x1, 912,0)
+
+inst_253:
+// rs1_val==46340 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0xaaaaaaaa; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0xaaaaaaaa, 0x6, 1b, x1, 916,0)
+
+inst_254:
+// rs1_val==46340 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x5; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x5, 0x20, 3f, x1, 920,0)
+
+inst_255:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333333; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x33333333, 0x8, 1b, x1, 924,0)
+
+inst_256:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666666; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x66666666, 0x10, 3f, x1, 928,0)
+
+inst_257:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0xb504; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0xb504, 0x80, 3f, x1, 932,0)
+
+inst_258:
+// rs1_val==46340 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x0, 0x2, 3f, x1, 936,0)
+
+inst_259:
+// rs1_val==46340 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0xffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0xffff, 0x4, 1b, x1, 940,0)
+
+inst_260:
+// rs1_val==46340 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x2, 0x400, 1b, x1, 944,0)
+
+inst_261:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555554; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x55555554, 0x556, 1b, x1, 948,0)
+
+inst_262:
+// rs1_val==46340 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0xaaaaaaa9; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0xaaaaaaa9, 0x10, 3f, x1, 952,0)
+
+inst_263:
+// rs1_val==46340 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x4, 0xa, 1b, x1, 956,0)
+
+inst_264:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x33333332, 0x0, 3f, x1, 960,0)
+
+inst_265:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666665; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x66666665, 0x100, 3f, x1, 964,0)
+
+inst_266:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0xb503; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0xb503, 0x556, 1b, x1, 968,0)
+
+inst_267:
+// rs1_val==46340 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0xfffe; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0xfffe, 0x400, 1b, x1, 972,0)
+
+inst_268:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555556; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x55555556, 0x100, 3f, x1, 976,0)
+
+inst_269:
+// rs1_val==46340 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0xaaaaaaab; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0xaaaaaaab, 0x80, 3f, x1, 980,0)
+
+inst_270:
+// rs1_val==46340 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x6, 0x400, 1b, x1, 984,0)
+
+inst_271:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333334; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x33333334, 0x0, 1b, x1, 988,0)
+
+inst_272:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666667; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x66666667, 0x6, 1b, x1, 992,0)
+
+inst_273:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0xb505; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0xb505, 0x2, 1b, x1, 996,0)
+
+inst_274:
+// rs1_val==46340 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x1; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x1, 0x400, 3f, x1, 1000,0)
+
+inst_275:
+// rs1_val==46340 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504; op2val:0x10000; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb504, 0x10000, 0x40, 3f, x1, 1004,0)
+
+inst_276:
+// rs1_val==0 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x3, 0x6, 1b, x1, 1008,0)
+
+inst_277:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x55555555, 0x2, 1b, x1, 1012,0)
+
+inst_278:
+// rs1_val==0 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0xaaaaaaaa, 0x4, 3f, x1, 1016,0)
+
+inst_279:
+// rs1_val==0 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x5, 0x40, 3f, x1, 1020,0)
+
+inst_280:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x33333333, 0x400, 1b, x1, 1024,0)
+
+inst_281:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x66666666; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x66666666, 0x0, 1b, x1, 1028,0)
+
+inst_282:
+// rs1_val==0 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xb504; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0xb504, 0x10, 3f, x1, 1032,0)
+
+inst_283:
+// rs1_val==0 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x0, 0x200, 3f, x1, 1036,0)
+
+inst_284:
+// rs1_val==0 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xffff; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0xffff, 0x556, 1b, x1, 1040,0)
+
+inst_285:
+// rs1_val==0 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x2, 0x4, 1b, x1, 1044,0)
+
+inst_286:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x55555554; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x55555554, 0x20, 3f, x1, 1048,0)
+
+inst_287:
+// rs1_val==0 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xaaaaaaa9; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0xaaaaaaa9, 0x556, 1b, x1, 1052,0)
+
+inst_288:
+// rs1_val==0 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x4, 0x2, 3f, x1, 1056,0)
+
+inst_289:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x33333332, 0x400, 1b, x1, 1060,0)
+
+inst_290:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x66666665; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x66666665, 0x10, 3f, x1, 1064,0)
+
+inst_291:
+// rs1_val==0 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xb503; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0xb503, 0xa, 1b, x1, 1068,0)
+
+inst_292:
+// rs1_val==0 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xfffe; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0xfffe, 0x2, 3f, x1, 1072,0)
+
+inst_293:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x55555556, 0x6, 1b, x1, 1076,0)
+
+inst_294:
+// rs1_val==0 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xaaaaaaab; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0xaaaaaaab, 0x0, 3f, x1, 1080,0)
+
+inst_295:
+// rs1_val==0 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x6, 0x4, 3f, x1, 1084,0)
+
+inst_296:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x33333334, 0x8, 1b, x1, 1088,0)
+
+inst_297:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x66666667, 0x4, 3f, x1, 1092,0)
+
+inst_298:
+// rs1_val==0 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xb505; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0xb505, 0x10, 3f, x1, 1096,0)
+
+inst_299:
+// rs1_val==0 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x1; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x0, 0x1, 0x556, 1b, x1, 1100,0)
+
+inst_300:
+// rs1_val==65535 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x3; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x3, 0x100, 3f, x1, 1104,0)
+
+inst_301:
+// rs1_val==65535 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x55555555; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x55555555, 0x200, 3f, x1, 1108,0)
+
+inst_302:
+// rs1_val==65535 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0xaaaaaaaa; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0xaaaaaaaa, 0x556, 1b, x1, 1112,0)
+
+inst_303:
+// rs1_val==65535 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x5, 0x0, 1b, x1, 1116,0)
+
+inst_304:
+// rs1_val==65535 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x33333333; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x33333333, 0x0, 3f, x1, 1120,0)
+
+inst_305:
+// rs1_val==65535 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x66666666; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x66666666, 0x4, 1b, x1, 1124,0)
+
+inst_306:
+// rs1_val==65535 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0xb504, 0x4, 1b, x1, 1128,0)
+
+inst_307:
+// rs1_val==65535 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x0, 0x80, 3f, x1, 1132,0)
+
+inst_308:
+// rs1_val==65535 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0xffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0xffff, 0x400, 1b, x1, 1136,0)
+
+inst_309:
+// rs1_val==65535 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x2, 0x2, 3f, x1, 1140,0)
+
+inst_310:
+// rs1_val==65535 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x55555554, 0x2, 1b, x1, 1144,0)
+
+inst_311:
+// rs1_val==65535 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0xaaaaaaa9; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0xaaaaaaa9, 0x556, 1b, x1, 1148,0)
+
+inst_312:
+// rs1_val==65535 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x4, 0x400, 3f, x1, 1152,0)
+
+inst_313:
+// rs1_val==65535 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x33333332, 0x6, 3f, x1, 1156,0)
+
+inst_314:
+// rs1_val==65535 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x66666665; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x66666665, 0x0, 3f, x1, 1160,0)
+
+inst_315:
+// rs1_val==65535 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0xb503, 0x400, 3f, x1, 1164,0)
+
+inst_316:
+// rs1_val==65535 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0xfffe; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0xfffe, 0x4, 1b, x1, 1168,0)
+
+inst_317:
+// rs1_val==65535 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x55555556; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x55555556, 0x80, 3f, x1, 1172,0)
+
+inst_318:
+// rs1_val==65535 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0xaaaaaaab; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0xaaaaaaab, 0xa, 1b, x1, 1176,0)
+
+inst_319:
+// rs1_val==65535 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x6, 0x200, 3f, x1, 1180,0)
+
+inst_320:
+// rs1_val==65535 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x33333334, 0x4, 3f, x1, 1184,0)
+
+inst_321:
+// rs1_val==65535 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x66666667; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x66666667, 0x0, 3f, x1, 1188,0)
+
+inst_322:
+// rs1_val==65535 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0xb505, 0x200, 3f, x1, 1192,0)
+
+inst_323:
+// rs1_val==65535 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x1; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x1, 0xa, 1b, x1, 1196,0)
+
+inst_324:
+// rs1_val==65535 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff; op2val:0x10000; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xffff, 0x10000, 0x556, 1b, x1, 1200,0)
+
+inst_325:
+// rs1_val==2 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x3, 0x6, 3f, x1, 1204,0)
+
+inst_326:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x55555555, 0x4, 1b, x1, 1208,0)
+
+inst_327:
+// rs1_val==2 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0xaaaaaaaa, 0x0, 1b, x1, 1212,0)
+
+inst_328:
+// rs1_val==2 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x5, 0x6, 1b, x1, 1216,0)
+
+inst_329:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x33333333; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x33333333, 0x40, 3f, x1, 1220,0)
+
+inst_330:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x66666666; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x66666666, 0x8, 1b, x1, 1224,0)
+
+inst_331:
+// rs1_val==2 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xb504; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0xb504, 0x80, 3f, x1, 1228,0)
+
+inst_332:
+// rs1_val==2 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x0, 0x4, 3f, x1, 1232,0)
+
+inst_333:
+// rs1_val==2 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0xffff, 0x0, 1b, x1, 1236,0)
+
+inst_334:
+// rs1_val==2 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x2, 0xa, 1b, x1, 1240,0)
+
+inst_335:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x55555554; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x55555554, 0x6, 1b, x1, 1244,0)
+
+inst_336:
+// rs1_val==2 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xaaaaaaa9; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0xaaaaaaa9, 0x0, 1b, x1, 1248,0)
+
+inst_337:
+// rs1_val==2 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x4, 0x400, 3f, x1, 1252,0)
+
+inst_338:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x33333332, 0x400, 3f, x1, 1256,0)
+
+inst_339:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x66666665, 0x400, 3f, x1, 1260,0)
+
+inst_340:
+// rs1_val==2 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0xb503, 0x40, 3f, x1, 1264,0)
+
+inst_341:
+// rs1_val==2 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xfffe; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0xfffe, 0x6, 1b, x1, 1268,0)
+
+inst_342:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x55555556, 0x400, 3f, x1, 1272,0)
+
+inst_343:
+// rs1_val==2 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xaaaaaaab; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0xaaaaaaab, 0x8, 3f, x1, 1276,0)
+
+inst_344:
+// rs1_val==2 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x6, 0x2, 1b, x1, 1280,0)
+
+inst_345:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x33333334; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x33333334, 0x200, 3f, x1, 1284,0)
+
+inst_346:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x66666667; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x66666667, 0x0, 1b, x1, 1288,0)
+
+inst_347:
+// rs1_val==2 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xb505; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0xb505, 0xa, 1b, x1, 1292,0)
+
+inst_348:
+// rs1_val==2 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x1, 0x8, 1b, x1, 1296,0)
+
+inst_349:
+// rs1_val==2 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x10000; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x2, 0x10000, 0xa, 1b, x1, 1300,0)
+
+inst_350:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x3; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x3, 0x556, 1b, x1, 1304,0)
+
+inst_351:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555555; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x55555555, 0x556, 1b, x1, 1308,0)
+
+inst_352:
+// rs1_val==1431655764 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xaaaaaaaa; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0xaaaaaaaa, 0xa, 1b, x1, 1312,0)
+
+inst_353:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x5; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x5, 0xa, 1b, x1, 1316,0)
+
+inst_354:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x33333333, 0x4, 1b, x1, 1320,0)
+
+inst_355:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x66666666, 0x6, 3f, x1, 1324,0)
+
+inst_356:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0xb504, 0xa, 1b, x1, 1328,0)
+
+inst_357:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x0, 0x10, 3f, x1, 1332,0)
+
+inst_358:
+// rs1_val==1431655764 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xffff; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0xffff, 0x8, 1b, x1, 1336,0)
+
+inst_359:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x2, 0x0, 1b, x1, 1340,0)
+
+inst_360:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x55555554, 0x0, 3f, x1, 1344,0)
+
+inst_361:
+// rs1_val==1431655764 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xaaaaaaa9; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0xaaaaaaa9, 0x80, 3f, x1, 1348,0)
+
+inst_362:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x4, 0x400, 1b, x1, 1352,0)
+
+inst_363:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333332; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x33333332, 0x20, 3f, x1, 1356,0)
+
+inst_364:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666665; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x66666665, 0x0, 3f, x1, 1360,0)
+
+inst_365:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0xb503, 0x400, 3f, x1, 1364,0)
+
+inst_366:
+// rs1_val==1431655764 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xfffe; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0xfffe, 0x6, 3f, x1, 1368,0)
+
+inst_367:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x55555556, 0x2, 1b, x1, 1372,0)
+
+inst_368:
+// rs1_val==1431655764 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0xaaaaaaab, 0x2, 1b, x1, 1376,0)
+
+inst_369:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x6, 0x6, 3f, x1, 1380,0)
+
+inst_370:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333334; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x33333334, 0x6, 1b, x1, 1384,0)
+
+inst_371:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666667; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x66666667, 0x2, 1b, x1, 1388,0)
+
+inst_372:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0xb505, 0x6, 3f, x1, 1392,0)
+
+inst_373:
+// rs1_val==1431655764 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x1; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x1, 0x6, 3f, x1, 1396,0)
+
+inst_374:
+// rs1_val==1431655764 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555554; op2val:0x10000; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555554, 0x10000, 0xa, 1b, x1, 1400,0)
+
+inst_375:
+// rs1_val==2863311529 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x3, 0x400, 3f, x1, 1404,0)
+
+inst_376:
+// rs1_val==2863311529 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x55555555, 0x400, 1b, x1, 1408,0)
+
+inst_377:
+// rs1_val==2863311529 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xaaaaaaaa; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0xaaaaaaaa, 0x40, 3f, x1, 1412,0)
+
+inst_378:
+// rs1_val==2863311529 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x5, 0x8, 1b, x1, 1416,0)
+
+inst_379:
+// rs1_val==2863311529 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x33333333; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x33333333, 0x8, 1b, x1, 1420,0)
+
+inst_380:
+// rs1_val==2863311529 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x66666666, 0x2, 3f, x1, 1424,0)
+
+inst_381:
+// rs1_val==2863311529 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0xb504, 0x4, 3f, x1, 1428,0)
+
+inst_382:
+// rs1_val==2863311529 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x0, 0x6, 3f, x1, 1432,0)
+
+inst_383:
+// rs1_val==2863311529 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0xffff, 0x400, 1b, x1, 1436,0)
+
+inst_384:
+// rs1_val==2863311529 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x2, 0x4, 1b, x1, 1440,0)
+
+inst_385:
+// rs1_val==2863311529 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x55555554; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x55555554, 0xa, 1b, x1, 1444,0)
+
+inst_386:
+// rs1_val==2863311529 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xaaaaaaa9; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0xaaaaaaa9, 0x4, 3f, x1, 1448,0)
+
+inst_387:
+// rs1_val==2863311529 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x4, 0x556, 1b, x1, 1452,0)
+
+inst_388:
+// rs1_val==2863311529 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x33333332, 0x400, 1b, x1, 1456,0)
+
+inst_389:
+// rs1_val==2863311529 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x66666665; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x66666665, 0x556, 1b, x1, 1460,0)
+
+inst_390:
+// rs1_val==2863311529 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xb503; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0xb503, 0x10, 3f, x1, 1464,0)
+
+inst_391:
+// rs1_val==2863311529 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xfffe; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0xfffe, 0x0, 3f, x1, 1468,0)
+
+inst_392:
+// rs1_val==2863311529 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x55555556, 0x400, 3f, x1, 1472,0)
+
+inst_393:
+// rs1_val==2863311529 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xaaaaaaab; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0xaaaaaaab, 0x200, 3f, x1, 1476,0)
+
+inst_394:
+// rs1_val==2863311529 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x6, 0x6, 3f, x1, 1480,0)
+
+inst_395:
+// rs1_val==2863311529 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x33333334; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x33333334, 0x0, 1b, x1, 1484,0)
+
+inst_396:
+// rs1_val==2863311529 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x66666667; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x66666667, 0x200, 3f, x1, 1488,0)
+
+inst_397:
+// rs1_val==2863311529 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0xb505, 0x8, 3f, x1, 1492,0)
+
+inst_398:
+// rs1_val==2863311529 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x1; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x1, 0x4, 3f, x1, 1496,0)
+
+inst_399:
+// rs1_val==2863311529 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaa9; op2val:0x10000; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaa9, 0x10000, 0x8, 1b, x1, 1500,0)
+
+inst_400:
+// rs1_val==4 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x3; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x3, 0x556, 1b, x1, 1504,0)
+
+inst_401:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x55555555, 0x400, 3f, x1, 1508,0)
+
+inst_402:
+// rs1_val==4 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0xaaaaaaaa, 0x0, 3f, x1, 1512,0)
+
+inst_403:
+// rs1_val==4 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x5, 0x40, 3f, x1, 1516,0)
+
+inst_404:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x33333333, 0x4, 1b, x1, 1520,0)
+
+inst_405:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x66666666, 0x400, 1b, x1, 1524,0)
+
+inst_406:
+// rs1_val==4 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0xb504, 0x0, 3f, x1, 1528,0)
+
+inst_407:
+// rs1_val==4 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x0, 0x8, 1b, x1, 1532,0)
+
+inst_408:
+// rs1_val==4 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xffff; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0xffff, 0x10, 3f, x1, 1536,0)
+
+inst_409:
+// rs1_val==4 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x2, 0x0, 1b, x1, 1540,0)
+
+inst_410:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x55555554; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x55555554, 0x10, 3f, x1, 1544,0)
+
+inst_411:
+// rs1_val==4 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xaaaaaaa9; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0xaaaaaaa9, 0x100, 3f, x1, 1548,0)
+
+inst_412:
+// rs1_val==4 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x4, 0x8, 3f, x1, 1552,0)
+
+inst_413:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x33333332, 0x400, 3f, x1, 1556,0)
+
+inst_414:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x66666665; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x66666665, 0x10, 3f, x1, 1560,0)
+
+inst_415:
+// rs1_val==4 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0xb503, 0x8, 3f, x1, 1564,0)
+
+inst_416:
+// rs1_val==4 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xfffe; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0xfffe, 0x100, 3f, x1, 1568,0)
+
+inst_417:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x55555556, 0x0, 1b, x1, 1572,0)
+
+inst_418:
+// rs1_val==4 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xaaaaaaab; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0xaaaaaaab, 0x400, 1b, x1, 1576,0)
+
+inst_419:
+// rs1_val==4 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x6, 0x400, 3f, x1, 1580,0)
+
+inst_420:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x33333334; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x33333334, 0x80, 3f, x1, 1584,0)
+
+inst_421:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x66666667; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x66666667, 0x556, 1b, x1, 1588,0)
+
+inst_422:
+// rs1_val==4 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xb505; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0xb505, 0x4, 3f, x1, 1592,0)
+
+inst_423:
+// rs1_val==4 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x1; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x1, 0x4, 3f, x1, 1596,0)
+
+inst_424:
+// rs1_val==4 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x10000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x4, 0x10000, 0x2, 3f, x1, 1600,0)
+
+inst_425:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x3, 0x80, 3f, x1, 1604,0)
+
+inst_426:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555555; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x55555555, 0xa, 1b, x1, 1608,0)
+
+inst_427:
+// rs1_val==858993458 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0xaaaaaaaa, 0x2, 3f, x1, 1612,0)
+
+inst_428:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x5, 0x4, 3f, x1, 1616,0)
+
+inst_429:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333333; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x33333333, 0x10, 3f, x1, 1620,0)
+
+inst_430:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666666; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x66666666, 0x80, 3f, x1, 1624,0)
+
+inst_431:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0xb504, 0xa, 1b, x1, 1628,0)
+
+inst_432:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x0, 0xa, 1b, x1, 1632,0)
+
+inst_433:
+// rs1_val==858993458 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0xffff, 0x400, 3f, x1, 1636,0)
+
+inst_434:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x2, 0x0, 1b, x1, 1640,0)
+
+inst_435:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x55555554, 0x4, 3f, x1, 1644,0)
+
+inst_436:
+// rs1_val==858993458 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xaaaaaaa9; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0xaaaaaaa9, 0x6, 1b, x1, 1648,0)
+
+inst_437:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x4, 0x80, 3f, x1, 1652,0)
+
+inst_438:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333332; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x33333332, 0x4, 3f, x1, 1656,0)
+
+inst_439:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666665; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x66666665, 0xa, 1b, x1, 1660,0)
+
+inst_440:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0xb503, 0x2, 3f, x1, 1664,0)
+
+inst_441:
+// rs1_val==858993458 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xfffe; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0xfffe, 0x4, 1b, x1, 1668,0)
+
+inst_442:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x55555556, 0x4, 1b, x1, 1672,0)
+
+inst_443:
+// rs1_val==858993458 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xaaaaaaab; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0xaaaaaaab, 0x40, 3f, x1, 1676,0)
+
+inst_444:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x6, 0x80, 3f, x1, 1680,0)
+
+inst_445:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333334; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x33333334, 0x6, 1b, x1, 1684,0)
+
+inst_446:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x66666667, 0x8, 1b, x1, 1688,0)
+
+inst_447:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb505; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0xb505, 0x2, 3f, x1, 1692,0)
+
+inst_448:
+// rs1_val==858993458 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x1; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x1, 0x80, 3f, x1, 1696,0)
+
+inst_449:
+// rs1_val==858993458 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333332; op2val:0x10000; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333332, 0x10000, 0x100, 3f, x1, 1700,0)
+
+inst_450:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x3, 0xa, 1b, x1, 1704,0)
+
+inst_451:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x55555555, 0x10, 3f, x1, 1708,0)
+
+inst_452:
+// rs1_val==1717986917 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xaaaaaaaa; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0xaaaaaaaa, 0x20, 3f, x1, 1712,0)
+
+inst_453:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x5, 0x400, 3f, x1, 1716,0)
+
+inst_454:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333333; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x33333333, 0x6, 1b, x1, 1720,0)
+
+inst_455:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666666; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x66666666, 0x556, 1b, x1, 1724,0)
+
+inst_456:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0xb504, 0xa, 1b, x1, 1728,0)
+
+inst_457:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x0, 0x6, 1b, x1, 1732,0)
+
+inst_458:
+// rs1_val==1717986917 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xffff; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0xffff, 0x40, 3f, x1, 1736,0)
+
+inst_459:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x2, 0x6, 3f, x1, 1740,0)
+
+inst_460:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555554; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x55555554, 0x556, 1b, x1, 1744,0)
+
+inst_461:
+// rs1_val==1717986917 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xaaaaaaa9; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0xaaaaaaa9, 0x6, 3f, x1, 1748,0)
+
+inst_462:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x4, 0x20, 3f, x1, 1752,0)
+
+inst_463:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333332; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x33333332, 0x20, 3f, x1, 1756,0)
+
+inst_464:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666665; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x66666665, 0xa, 1b, x1, 1760,0)
+
+inst_465:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0xb503, 0x4, 1b, x1, 1764,0)
+
+inst_466:
+// rs1_val==1717986917 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xfffe; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0xfffe, 0x2, 1b, x1, 1768,0)
+
+inst_467:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x55555556, 0x6, 3f, x1, 1772,0)
+
+inst_468:
+// rs1_val==1717986917 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x1; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x1, 0x0, 3f, x1, 1776,0)
+
+inst_469:
+// rs1_val==1717986917 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x10000; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x10000, 0x0, 1b, x1, 1780,0)
+
+inst_470:
+// rs1_val==46339 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x3, 0x8, 3f, x1, 1784,0)
+
+inst_471:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555555; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x55555555, 0x80, 3f, x1, 1788,0)
+
+inst_472:
+// rs1_val==46339 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0xaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0xaaaaaaaa, 0x2, 3f, x1, 1792,0)
+
+inst_473:
+// rs1_val==46339 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x5, 0x556, 1b, x1, 1796,0)
+
+inst_474:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333333; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x33333333, 0x8, 3f, x1, 1800,0)
+
+inst_475:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666666; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x66666666, 0x80, 3f, x1, 1804,0)
+
+inst_476:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0xb504, 0x400, 1b, x1, 1808,0)
+
+inst_477:
+// rs1_val==46339 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x0, 0x40, 3f, x1, 1812,0)
+
+inst_478:
+// rs1_val==46339 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0xffff; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0xffff, 0x8, 3f, x1, 1816,0)
+
+inst_479:
+// rs1_val==46339 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x2, 0x2, 1b, x1, 1820,0)
+
+inst_480:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555554; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x55555554, 0x100, 3f, x1, 1824,0)
+
+inst_481:
+// rs1_val==46339 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0xaaaaaaa9; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0xaaaaaaa9, 0x20, 3f, x1, 1828,0)
+
+inst_482:
+// rs1_val==46339 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x4, 0x0, 3f, x1, 1832,0)
+
+inst_483:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333332; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x33333332, 0x100, 3f, x1, 1836,0)
+
+inst_484:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666665; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x66666665, 0x8, 3f, x1, 1840,0)
+
+inst_485:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0xb503; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0xb503, 0x556, 1b, x1, 1844,0)
+
+inst_486:
+// rs1_val==46339 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0xfffe; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0xfffe, 0x6, 1b, x1, 1848,0)
+
+inst_487:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x55555556, 0x0, 3f, x1, 1852,0)
+
+inst_488:
+// rs1_val==46339 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0xaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0xaaaaaaab, 0x2, 1b, x1, 1856,0)
+
+inst_489:
+// rs1_val==46339 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x6, 0x400, 3f, x1, 1860,0)
+
+inst_490:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x33333334, 0x4, 1b, x1, 1864,0)
+
+inst_491:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x66666667, 0x4, 3f, x1, 1868,0)
+
+inst_492:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0xb505, 0x400, 3f, x1, 1872,0)
+
+inst_493:
+// rs1_val==46339 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x1, 0x8, 1b, x1, 1876,0)
+
+inst_494:
+// rs1_val==46339 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb503; op2val:0x10000; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb503, 0x10000, 0x8, 1b, x1, 1880,0)
+
+inst_495:
+// rs1_val==65534 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x3; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x3, 0x10, 3f, x1, 1884,0)
+
+inst_496:
+// rs1_val==65534 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x55555555, 0x6, 1b, x1, 1888,0)
+
+inst_497:
+// rs1_val==65534 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xaaaaaaaa; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0xaaaaaaaa, 0x20, 3f, x1, 1892,0)
+
+inst_498:
+// rs1_val==65534 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x5, 0x2, 1b, x1, 1896,0)
+
+inst_499:
+// rs1_val==65534 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x33333333, 0x4, 1b, x1, 1900,0)
+
+inst_500:
+// rs1_val==65534 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x66666666; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x66666666, 0x0, 1b, x1, 1904,0)
+
+inst_501:
+// rs1_val==65534 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0xb504, 0x6, 3f, x1, 1908,0)
+
+inst_502:
+// rs1_val==65534 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x0, 0x4, 3f, x1, 1912,0)
+
+inst_503:
+// rs1_val==65534 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xffff; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0xffff, 0x556, 1b, x1, 1916,0)
+
+inst_504:
+// rs1_val==65534 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x2, 0x2, 3f, x1, 1920,0)
+
+inst_505:
+// rs1_val==65534 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x55555554; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x55555554, 0x6, 3f, x1, 1924,0)
+
+inst_506:
+// rs1_val==65534 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xaaaaaaa9; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0xaaaaaaa9, 0x2, 3f, x1, 1928,0)
+
+inst_507:
+// rs1_val==65534 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x4, 0x400, 3f, x1, 1932,0)
+
+inst_508:
+// rs1_val==65534 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x33333332; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x33333332, 0x8, 1b, x1, 1936,0)
+
+inst_509:
+// rs1_val==65534 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x66666665; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x66666665, 0x10, 3f, x1, 1940,0)
+
+inst_510:
+// rs1_val==65534 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0xb503, 0x8, 1b, x1, 1944,0)
+
+inst_511:
+// rs1_val==65534 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xfffe; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0xfffe, 0xa, 1b, x1, 1948,0)
+
+inst_512:
+// rs1_val==65534 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x55555556; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x55555556, 0xa, 1b, x1, 1952,0)
+
+inst_513:
+// rs1_val==65534 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0xaaaaaaab, 0x2, 1b, x1, 1956,0)
+
+inst_514:
+// rs1_val==65534 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x6; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x6, 0x556, 1b, x1, 1960,0)
+
+inst_515:
+// rs1_val==65534 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x33333334, 0x2, 1b, x1, 1964,0)
+
+inst_516:
+// rs1_val==65534 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x66666667; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x66666667, 0x6, 1b, x1, 1968,0)
+
+inst_517:
+// rs1_val==65534 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0xb505; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0xb505, 0x100, 3f, x1, 1972,0)
+
+inst_518:
+// rs1_val==65534 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x1; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x1, 0x40, 3f, x1, 1976,0)
+
+inst_519:
+// rs1_val==65534 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffe; op2val:0x10000; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xfffe, 0x10000, 0x0, 3f, x1, 1980,0)
+
+inst_520:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x3, 0x8, 3f, x1, 1984,0)
+
+inst_521:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x55555555, 0x0, 1b, x1, 1988,0)
+
+inst_522:
+// rs1_val==1431655766 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0xaaaaaaaa, 0x2, 1b, x1, 1992,0)
+
+inst_523:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x5, 0x8, 1b, x1, 1996,0)
+
+inst_524:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x33333333, 0x4, 3f, x1, 2000,0)
+
+inst_525:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666666; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x66666666, 0x20, 3f, x1, 2004,0)
+
+inst_526:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb504; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0xb504, 0x10, 3f, x1, 2008,0)
+
+inst_527:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x0; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x0, 0x20, 3f, x1, 2012,0)
+
+inst_528:
+// rs1_val==1431655766 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0xffff, 0x2, 1b, x1, 2016,0)
+
+inst_529:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x2, 0x0, 3f, x1, 2020,0)
+
+inst_530:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x55555554, 0x2, 1b, x1, 2024,0)
+
+inst_531:
+// rs1_val==1431655766 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xaaaaaaa9; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0xaaaaaaa9, 0x6, 1b, x1, 2028,0)
+
+inst_532:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x4, 0x400, 3f, x1, 2032,0)
+
+inst_533:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333332; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x33333332, 0x4, 3f, x1, 2036,0)
+
+inst_534:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666665; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x66666665, 0x20, 3f, x1, 2040,0)
+
+inst_535:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb503; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0xb503, 0x200, 3f, x1, 2044,0)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_536:
+// rs1_val==1431655766 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xfffe; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0xfffe, 0x20, 3f, x1, 0,0)
+
+inst_537:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x55555556, 0x4, 3f, x1, 4,0)
+
+inst_538:
+// rs1_val==1431655766 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xaaaaaaab; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0xaaaaaaab, 0x8, 1b, x1, 8,0)
+
+inst_539:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x6; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x6, 0x40, 3f, x1, 12,0)
+
+inst_540:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333334; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x33333334, 0x400, 3f, x1, 16,0)
+
+inst_541:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666667; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x66666667, 0x6, 3f, x1, 20,0)
+
+inst_542:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb505; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0xb505, 0x0, 3f, x1, 24,0)
+
+inst_543:
+// rs1_val==1431655766 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x1; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x1, 0x6, 1b, x1, 28,0)
+
+inst_544:
+// rs1_val==1431655766 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x55555556; op2val:0x10000; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x55555556, 0x10000, 0x20, 3f, x1, 32,0)
+
+inst_545:
+// rs1_val==2863311531 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x3, 0x6, 1b, x1, 36,0)
+
+inst_546:
+// rs1_val==2863311531 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x55555555, 0x0, 1b, x1, 40,0)
+
+inst_547:
+// rs1_val==2863311531 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xaaaaaaaa; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0xaaaaaaaa, 0x200, 3f, x1, 44,0)
+
+inst_548:
+// rs1_val==2863311531 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x5, 0x2, 1b, x1, 48,0)
+
+inst_549:
+// rs1_val==2863311531 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x33333333; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x33333333, 0x20, 3f, x1, 52,0)
+
+inst_550:
+// rs1_val==2863311531 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x66666666; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x66666666, 0x100, 3f, x1, 56,0)
+
+inst_551:
+// rs1_val==2863311531 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xb504; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0xb504, 0x556, 1b, x1, 60,0)
+
+inst_552:
+// rs1_val==2863311531 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x0, 0x0, 3f, x1, 64,0)
+
+inst_553:
+// rs1_val==2863311531 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xffff; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0xffff, 0xa, 1b, x1, 68,0)
+
+inst_554:
+// rs1_val==2863311531 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x2, 0x40, 3f, x1, 72,0)
+
+inst_555:
+// rs1_val==2863311531 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x55555554; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x55555554, 0x8, 3f, x1, 76,0)
+
+inst_556:
+// rs1_val==2863311531 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xaaaaaaa9; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0xaaaaaaa9, 0x6, 1b, x1, 80,0)
+
+inst_557:
+// rs1_val==2863311531 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x33333332, 0x0, 3f, x1, 84,0)
+
+inst_558:
+// rs1_val==2863311531 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x66666665; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x66666665, 0x20, 3f, x1, 88,0)
+
+inst_559:
+// rs1_val==2863311531 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xb503; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0xb503, 0x100, 3f, x1, 92,0)
+
+inst_560:
+// rs1_val==2863311531 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xfffe; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0xfffe, 0x556, 1b, x1, 96,0)
+
+inst_561:
+// rs1_val==2863311531 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x55555556, 0x556, 1b, x1, 100,0)
+
+inst_562:
+// rs1_val==2863311531 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xaaaaaaab; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0xaaaaaaab, 0x556, 1b, x1, 104,0)
+
+inst_563:
+// rs1_val==2863311531 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x6, 0x20, 3f, x1, 108,0)
+
+inst_564:
+// rs1_val==2863311531 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x33333334; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x33333334, 0x556, 1b, x1, 112,0)
+
+inst_565:
+// rs1_val==2863311531 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x66666667; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x66666667, 0x556, 1b, x1, 116,0)
+
+inst_566:
+// rs1_val==2863311531 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0xb505, 0x200, 3f, x1, 120,0)
+
+inst_567:
+// rs1_val==2863311531 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x1; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x1, 0x0, 1b, x1, 124,0)
+
+inst_568:
+// rs1_val==2863311531 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaab; op2val:0x10000; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xaaaaaaab, 0x10000, 0x4, 3f, x1, 128,0)
+
+inst_569:
+// rs1_val==6 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x3; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x3, 0x10, 3f, x1, 132,0)
+
+inst_570:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x55555555, 0x20, 3f, x1, 136,0)
+
+inst_571:
+// rs1_val==6 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xaaaaaaaa; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0xaaaaaaaa, 0x100, 3f, x1, 140,0)
+
+inst_572:
+// rs1_val==6 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x5, 0x0, 1b, x1, 144,0)
+
+inst_573:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x33333333; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x33333333, 0x0, 1b, x1, 148,0)
+
+inst_574:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x66666666; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x66666666, 0x556, 1b, x1, 152,0)
+
+inst_575:
+// rs1_val==6 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0xb504, 0xa, 1b, x1, 156,0)
+
+inst_576:
+// rs1_val==6 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x0, 0x8, 1b, x1, 160,0)
+
+inst_577:
+// rs1_val==6 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0xffff, 0x400, 1b, x1, 164,0)
+
+inst_578:
+// rs1_val==6 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x2, 0x4, 3f, x1, 168,0)
+
+inst_579:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x55555554; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x55555554, 0x400, 3f, x1, 172,0)
+
+inst_580:
+// rs1_val==6 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xaaaaaaa9; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0xaaaaaaa9, 0x10, 3f, x1, 176,0)
+
+inst_581:
+// rs1_val==6 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x4, 0x2, 1b, x1, 180,0)
+
+inst_582:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x33333332, 0x400, 1b, x1, 184,0)
+
+inst_583:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x66666665; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x66666665, 0x4, 3f, x1, 188,0)
+
+inst_584:
+// rs1_val==6 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xb503; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0xb503, 0x80, 3f, x1, 192,0)
+
+inst_585:
+// rs1_val==6 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xfffe; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0xfffe, 0x200, 3f, x1, 196,0)
+
+inst_586:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x55555556, 0x400, 1b, x1, 200,0)
+
+inst_587:
+// rs1_val==6 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xaaaaaaab; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0xaaaaaaab, 0x6, 1b, x1, 204,0)
+
+inst_588:
+// rs1_val==6 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x6, 0xa, 1b, x1, 208,0)
+
+inst_589:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x33333334, 0x8, 1b, x1, 212,0)
+
+inst_590:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x66666667; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x66666667, 0x80, 3f, x1, 216,0)
+
+inst_591:
+// rs1_val==6 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xb505; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0xb505, 0x2, 1b, x1, 220,0)
+
+inst_592:
+// rs1_val==6 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x1; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x1, 0x6, 3f, x1, 224,0)
+
+inst_593:
+// rs1_val==6 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x10000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x6, 0x10000, 0x2, 1b, x1, 228,0)
+
+inst_594:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x3, 0x0, 1b, x1, 232,0)
+
+inst_595:
+// rs1_val==858993460 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xaaaaaaaa; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0xaaaaaaaa, 0x400, 1b, x1, 236,0)
+
+inst_596:
+// rs1_val==1717986917 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0xaaaaaaab, 0x2, 1b, x1, 240,0)
+
+inst_597:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x5, 0x8, 3f, x1, 244,0)
+
+inst_598:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333333; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x33333333, 0x6, 3f, x1, 248,0)
+
+inst_599:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666666; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x66666666, 0x0, 1b, x1, 252,0)
+
+inst_600:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0xb504, 0x2, 3f, x1, 256,0)
+
+inst_601:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x0, 0x4, 3f, x1, 260,0)
+
+inst_602:
+// rs1_val==858993460 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0xffff, 0x2, 1b, x1, 264,0)
+
+inst_603:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x2; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x2, 0x200, 3f, x1, 268,0)
+
+inst_604:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555554; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x55555554, 0x200, 3f, x1, 272,0)
+
+inst_605:
+// rs1_val==858993460 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xaaaaaaa9; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0xaaaaaaa9, 0x100, 3f, x1, 276,0)
+
+inst_606:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x4, 0x4, 3f, x1, 280,0)
+
+inst_607:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333332; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x33333332, 0x4, 1b, x1, 284,0)
+
+inst_608:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666665; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x66666665, 0x200, 3f, x1, 288,0)
+
+inst_609:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0xb503, 0x2, 1b, x1, 292,0)
+
+inst_610:
+// rs1_val==858993460 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xfffe; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0xfffe, 0x0, 1b, x1, 296,0)
+
+inst_611:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x55555556, 0x4, 3f, x1, 300,0)
+
+inst_612:
+// rs1_val==858993460 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xaaaaaaab; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0xaaaaaaab, 0x400, 1b, x1, 304,0)
+
+inst_613:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x6; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x6, 0x556, 1b, x1, 308,0)
+
+inst_614:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333334; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x33333334, 0x20, 3f, x1, 312,0)
+
+inst_615:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x66666667, 0x4, 1b, x1, 316,0)
+
+inst_616:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0xb505, 0x6, 3f, x1, 320,0)
+
+inst_617:
+// rs1_val==858993460 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x1; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x1, 0x20, 3f, x1, 324,0)
+
+inst_618:
+// rs1_val==858993460 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333334; op2val:0x10000; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333334, 0x10000, 0x10, 3f, x1, 328,0)
+
+inst_619:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x3, 0x4, 1b, x1, 332,0)
+
+inst_620:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x55555555, 0x40, 3f, x1, 336,0)
+
+inst_621:
+// rs1_val==1717986919 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xaaaaaaaa; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0xaaaaaaaa, 0x100, 3f, x1, 340,0)
+
+inst_622:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x5, 0x400, 1b, x1, 344,0)
+
+inst_623:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333333; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x33333333, 0x8, 3f, x1, 348,0)
+
+inst_624:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666666; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x66666666, 0x4, 3f, x1, 352,0)
+
+inst_625:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb504; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0xb504, 0x80, 3f, x1, 356,0)
+
+inst_626:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x0, 0x400, 1b, x1, 360,0)
+
+inst_627:
+// rs1_val==1717986919 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xffff; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0xffff, 0x10, 3f, x1, 364,0)
+
+inst_628:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x2, 0x0, 3f, x1, 368,0)
+
+inst_629:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555554; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x55555554, 0x6, 3f, x1, 372,0)
+
+inst_630:
+// rs1_val==1717986919 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xaaaaaaa9; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0xaaaaaaa9, 0x40, 3f, x1, 376,0)
+
+inst_631:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x4, 0x556, 1b, x1, 380,0)
+
+inst_632:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x33333332, 0x2, 3f, x1, 384,0)
+
+inst_633:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666665; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x66666665, 0x6, 1b, x1, 388,0)
+
+inst_634:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb503; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0xb503, 0x100, 3f, x1, 392,0)
+
+inst_635:
+// rs1_val==1717986919 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xfffe; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0xfffe, 0x10, 3f, x1, 396,0)
+
+inst_636:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x55555556, 0x6, 3f, x1, 400,0)
+
+inst_637:
+// rs1_val==1717986919 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xaaaaaaab; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0xaaaaaaab, 0x200, 3f, x1, 404,0)
+
+inst_638:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x6, 0x0, 1b, x1, 408,0)
+
+inst_639:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333334; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x33333334, 0x40, 3f, x1, 412,0)
+
+inst_640:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666667; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x66666667, 0x10, 3f, x1, 416,0)
+
+inst_641:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb505; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0xb505, 0x2, 1b, x1, 420,0)
+
+inst_642:
+// rs1_val==1717986919 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x1; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x1, 0x2, 3f, x1, 424,0)
+
+inst_643:
+// rs1_val==1717986919 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666667; op2val:0x10000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666667, 0x10000, 0x400, 1b, x1, 428,0)
+
+inst_644:
+// rs1_val==46341 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x3, 0xa, 1b, x1, 432,0)
+
+inst_645:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x55555555, 0x4, 3f, x1, 436,0)
+
+inst_646:
+// rs1_val==46341 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0xaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0xaaaaaaaa, 0x0, 1b, x1, 440,0)
+
+inst_647:
+// rs1_val==46341 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x5, 0x556, 1b, x1, 444,0)
+
+inst_648:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x33333333, 0x400, 1b, x1, 448,0)
+
+inst_649:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666666; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x66666666, 0xa, 1b, x1, 452,0)
+
+inst_650:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0xb504, 0x6, 1b, x1, 456,0)
+
+inst_651:
+// rs1_val==46341 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x0, 0x0, 3f, x1, 460,0)
+
+inst_652:
+// rs1_val==46341 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0xffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0xffff, 0x400, 1b, x1, 464,0)
+
+inst_653:
+// rs1_val==46341 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x2, 0x4, 1b, x1, 468,0)
+
+inst_654:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x55555554, 0x0, 1b, x1, 472,0)
+
+inst_655:
+// rs1_val==46341 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0xaaaaaaa9; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0xaaaaaaa9, 0x556, 1b, x1, 476,0)
+
+inst_656:
+// rs1_val==46341 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x4, 0x6, 1b, x1, 480,0)
+
+inst_657:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x33333332, 0x400, 3f, x1, 484,0)
+
+inst_658:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666665; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x66666665, 0x8, 1b, x1, 488,0)
+
+inst_659:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0xb503; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0xb503, 0x200, 3f, x1, 492,0)
+
+inst_660:
+// rs1_val==46341 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0xfffe; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0xfffe, 0x6, 1b, x1, 496,0)
+
+inst_661:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x55555556, 0x556, 1b, x1, 500,0)
+
+inst_662:
+// rs1_val==46341 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0xaaaaaaab; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0xaaaaaaab, 0x20, 3f, x1, 504,0)
+
+inst_663:
+// rs1_val==46341 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x6, 0x8, 3f, x1, 508,0)
+
+inst_664:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333334; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x33333334, 0x556, 1b, x1, 512,0)
+
+inst_665:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x66666667, 0x8, 3f, x1, 516,0)
+
+inst_666:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0xb505, 0x8, 1b, x1, 520,0)
+
+inst_667:
+// rs1_val==46341 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x1; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x1, 0xa, 1b, x1, 524,0)
+
+inst_668:
+// rs1_val==46341 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb505; op2val:0x10000; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0xb505, 0x10000, 0x4, 3f, x1, 528,0)
+
+inst_669:
+// rs1_val==1 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x3; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x3, 0x100, 3f, x1, 532,0)
+
+inst_670:
+// rs1_val==1 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x55555555, 0x0, 1b, x1, 536,0)
+
+inst_671:
+// rs1_val==1 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xaaaaaaaa; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0xaaaaaaaa, 0x8, 3f, x1, 540,0)
+
+inst_672:
+// rs1_val==1 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x5, 0x400, 1b, x1, 544,0)
+
+inst_673:
+// rs1_val==1 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x33333333; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x33333333, 0x10, 3f, x1, 548,0)
+
+inst_674:
+// rs1_val==1 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x66666666; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x66666666, 0x20, 3f, x1, 552,0)
+
+inst_675:
+// rs1_val==1 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0xb504, 0x8, 1b, x1, 556,0)
+
+inst_676:
+// rs1_val==1 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x0, 0x100, 3f, x1, 560,0)
+
+inst_677:
+// rs1_val==1 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0xffff, 0x4, 1b, x1, 564,0)
+
+inst_678:
+// rs1_val==1 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x2, 0xa, 1b, x1, 568,0)
+
+inst_679:
+// rs1_val==1 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x55555554; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x55555554, 0x40, 3f, x1, 572,0)
+
+inst_680:
+// rs1_val==1 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xaaaaaaa9; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0xaaaaaaa9, 0x200, 3f, x1, 576,0)
+
+inst_681:
+// rs1_val==1 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x4, 0xa, 1b, x1, 580,0)
+
+inst_682:
+// rs1_val==1 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x33333332; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x33333332, 0x10, 3f, x1, 584,0)
+
+inst_683:
+// rs1_val==1 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x66666665; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x66666665, 0x200, 3f, x1, 588,0)
+
+inst_684:
+// rs1_val==1 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xb503; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0xb503, 0x80, 3f, x1, 592,0)
+
+inst_685:
+// rs1_val==1 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xfffe; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0xfffe, 0x100, 3f, x1, 596,0)
+
+inst_686:
+// rs1_val==1 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x55555556, 0x6, 1b, x1, 600,0)
+
+inst_687:
+// rs1_val==1 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xaaaaaaab; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0xaaaaaaab, 0x8, 1b, x1, 604,0)
+
+inst_688:
+// rs1_val==1 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x6, 0x10, 3f, x1, 608,0)
+
+inst_689:
+// rs1_val==1 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x33333334, 0x2, 3f, x1, 612,0)
+
+inst_690:
+// rs1_val==1 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x66666667; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x66666667, 0x2, 3f, x1, 616,0)
+
+inst_691:
+// rs1_val==1 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xb505; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0xb505, 0x2, 3f, x1, 620,0)
+
+inst_692:
+// rs1_val==1 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x1; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x1, 0x20, 3f, x1, 624,0)
+
+inst_693:
+// rs1_val==1 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x10000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x1, 0x10000, 0x400, 3f, x1, 628,0)
+
+inst_694:
+// rs1_val==65536 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x3, 0x200, 3f, x1, 632,0)
+
+inst_695:
+// rs1_val==65536 and rs2_val==1431655765,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x55555555, 0x20, 3f, x1, 636,0)
+
+inst_696:
+// rs1_val==65536 and rs2_val==2863311530,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0xaaaaaaaa; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0xaaaaaaaa, 0x8, 1b, x1, 640,0)
+
+inst_697:
+// rs1_val==65536 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x5, 0x40, 3f, x1, 644,0)
+
+inst_698:
+// rs1_val==65536 and rs2_val==858993459,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x33333333, 0x400, 1b, x1, 648,0)
+
+inst_699:
+// rs1_val==65536 and rs2_val==1717986918,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x66666666, 0x400, 3f, x1, 652,0)
+
+inst_700:
+// rs1_val==65536 and rs2_val==46340,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0xb504, 0x400, 3f, x1, 656,0)
+
+inst_701:
+// rs1_val==65536 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x0, 0x80, 3f, x1, 660,0)
+
+inst_702:
+// rs1_val==65536 and rs2_val==65535,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0xffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0xffff, 0x2, 1b, x1, 664,0)
+
+inst_703:
+// rs1_val==65536 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x2, 0x6, 3f, x1, 668,0)
+
+inst_704:
+// rs1_val==65536 and rs2_val==1431655764,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x55555554, 0x2, 3f, x1, 672,0)
+
+inst_705:
+// rs1_val==65536 and rs2_val==2863311529,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0xaaaaaaa9; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0xaaaaaaa9, 0x0, 3f, x1, 676,0)
+
+inst_706:
+// rs1_val==65536 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x4, 0x400, 1b, x1, 680,0)
+
+inst_707:
+// rs1_val==65536 and rs2_val==858993458,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x33333332, 0x6, 3f, x1, 684,0)
+
+inst_708:
+// rs1_val==65536 and rs2_val==1717986917,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x66666665; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x66666665, 0x200, 3f, x1, 688,0)
+
+inst_709:
+// rs1_val==65536 and rs2_val==46339,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0xb503, 0x400, 3f, x1, 692,0)
+
+inst_710:
+// rs1_val==65536 and rs2_val==65534,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0xfffe; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0xfffe, 0x20, 3f, x1, 696,0)
+
+inst_711:
+// rs1_val==65536 and rs2_val==1431655766,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x55555556; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x55555556, 0x20, 3f, x1, 700,0)
+
+inst_712:
+// rs1_val==65536 and rs2_val==2863311531,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0xaaaaaaab; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0xaaaaaaab, 0x6, 3f, x1, 704,0)
+
+inst_713:
+// rs1_val==65536 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x6, 0x100, 3f, x1, 708,0)
+
+inst_714:
+// rs1_val==65536 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x33333334; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x33333334, 0xa, 1b, x1, 712,0)
+
+inst_715:
+// rs1_val==65536 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x66666667; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x66666667, 0x20, 3f, x1, 716,0)
+
+inst_716:
+// rs1_val==65536 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0xb505; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0xb505, 0x40, 3f, x1, 720,0)
+
+inst_717:
+// rs1_val==65536 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x1; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x1, 0x200, 3f, x1, 724,0)
+
+inst_718:
+// rs1_val==65536 and rs2_val==65536,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x10000; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x10000, 0x10000, 0x200, 3f, x1, 728,0)
+
+inst_719:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x6, 0x0, 3f, x1, 732,0)
+
+inst_720:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333334; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x33333334, 0x400, 1b, x1, 736,0)
+
+inst_721:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0x66666667, 0x4, 3f, x1, 740,0)
+
+inst_722:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb505; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x66666665, 0xb505, 0x10, 3f, x1, 744,0)
+
+inst_723:
+// rs1_val > 0 and rs2_val > 0, rs1_val == 536870912, rs1_val > 0 and rs2_val > 0 and rs1_val > rs2_val and imm_val < 0 , rs2_val == 32768
+// opcode: bltu, op1:x10; op2:x11; op1val:0x20000000; op2val:0x8000; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x20000000, 0x8000, 0x556, 1b, x1, 748,0)
+
+inst_724:
+// rs1_val > 0 and rs2_val > 0 and rs1_val < rs2_val and imm_val < 0 , rs2_val == 4227858431, rs1_val == 1073741824
+// opcode: bltu, op1:x10; op2:x11; op1val:0x40000000; op2val:0xfbffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x40000000, 0xfbffffff, 0x2, 1b, x1, 752,0)
+
+inst_725:
+// rs2_val == 2, rs1_val==858993459 and rs2_val==2
+// opcode: bltu, op1:x10; op2:x11; op1val:0x33333333; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x4, x10, x11, 0x33333333, 0x2, 0x0, 3f, x1, 756,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x11_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x11_1:
+ .fill 24*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 190*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/bne-01.S b/riscof/suite/rv32i_m/I/bne-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..3ff068ecb6f1c8db2b197dc4480bfe1dc1f7044b
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/bne-01.S
@@ -0,0 +1,2999 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the bne instruction of the RISC-V I extension for the bne covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",bne)
+
+RVTEST_SIGBASE( x5,signature_x5_1)
+
+inst_0:
+// rs1 == rs2, rs1==x16, rs2==x16, rs1_val > 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == 1048576
+// opcode: bne, op1:x16; op2:x16; op1val:0x55555554; op2val:0x55555554; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x21, x16, x16, 0x55555554, 0x55555554, 0x200, 3f, x5, 0,0)
+
+inst_1:
+// rs1 != rs2, rs1==x7, rs2==x0, rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs2_val == -1073741825, rs1_val == 67108864
+// opcode: bne, op1:x7; op2:x0; op1val:0x4000000; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x21, x7, x0, 0x4000000, 0x0, 0x200, 3f, x5, 4,0)
+
+inst_2:
+// rs1==x14, rs2==x26, rs1_val < 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs1_val < rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == -17, rs1_val == -2049
+// opcode: bne, op1:x14; op2:x26; op1val:-0x801; op2val:-0x11; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x21, x14, x26, -0x801, -0x11, 0x100, 3f, x5, 8,0)
+
+inst_3:
+// rs1==x9, rs2==x25, rs1_val < 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val == -65, rs2_val == 33554432
+// opcode: bne, op1:x9; op2:x25; op1val:-0x41; op2val:0x2000000; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x21, x9, x25, -0x41, 0x2000000, 0x20, 3f, x5, 12,0)
+
+inst_4:
+// rs1==x23, rs2==x22, rs1_val == rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs1_val == -4097, rs2_val == -4097
+// opcode: bne, op1:x23; op2:x22; op1val:-0x1001; op2val:-0x1001; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x21, x23, x22, -0x1001, -0x1001, 0x80, 3f, x5, 16,0)
+
+inst_5:
+// rs1==x19, rs2==x27, rs1_val == rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs1_val==-46340 and rs2_val==-46340
+// opcode: bne, op1:x19; op2:x27; op1val:-0xb504; op2val:-0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x21, x19, x27, -0xb504, -0xb504, 0x0, 1b, x5, 20,0)
+
+inst_6:
+// rs1==x13, rs2==x4, rs1_val > rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs1_val == 1073741824
+// opcode: bne, op1:x13; op2:x4; op1val:0x40000000; op2val:0x9; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x21, x13, x4, 0x40000000, 0x9, 0x4, 1b, x5, 24,0)
+
+inst_7:
+// rs1==x12, rs2==x8, rs1_val < rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs2_val == -268435457
+// opcode: bne, op1:x12; op2:x8; op1val:-0x40000000; op2val:-0x10000001; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x21, x12, x8, -0x40000000, -0x10000001, 0x8, 1b, x5, 28,0)
+
+inst_8:
+// rs1==x24, rs2==x1, rs2_val == 1,
+// opcode: bne, op1:x24; op2:x1; op1val:-0x1; op2val:0x1; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x21, x24, x1, -0x1, 0x1, 0x40, 3f, x5, 32,0)
+
+inst_9:
+// rs1==x1, rs2==x10, rs2_val == 2, rs1_val == -1048577
+// opcode: bne, op1:x1; op2:x10; op1val:-0x100001; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x21, x1, x10, -0x100001, 0x2, 0x100, 3f, x5, 36,0)
+
+inst_10:
+// rs1==x4, rs2==x9, rs2_val == 4, rs1_val==1717986918 and rs2_val==4
+// opcode: bne, op1:x4; op2:x9; op1val:0x66666666; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x21, x4, x9, 0x66666666, 0x4, 0x556, 1b, x5, 40,0)
+
+inst_11:
+// rs1==x8, rs2==x11, rs2_val == 8, rs1_val == 1431655765
+// opcode: bne, op1:x8; op2:x11; op1val:0x55555555; op2val:0x8; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x21, x8, x11, 0x55555555, 0x8, 0x8, 3f, x5, 44,0)
+
+inst_12:
+// rs1==x28, rs2==x14, rs2_val == 16, rs1_val == -65537
+// opcode: bne, op1:x28; op2:x14; op1val:-0x10001; op2val:0x10; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x21, x28, x14, -0x10001, 0x10, 0xa, 1b, x5, 48,0)
+
+inst_13:
+// rs1==x20, rs2==x29, rs2_val == 32, rs1_val == 1
+// opcode: bne, op1:x20; op2:x29; op1val:0x1; op2val:0x20; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x21, x20, x29, 0x1, 0x20, 0xa, 1b, x5, 52,0)
+
+inst_14:
+// rs1==x25, rs2==x13, rs2_val == 64,
+// opcode: bne, op1:x25; op2:x13; op1val:-0x801; op2val:0x40; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x21, x25, x13, -0x801, 0x40, 0x556, 1b, x5, 56,0)
+
+inst_15:
+// rs1==x6, rs2==x17, rs2_val == 128, rs1_val == 16777216
+// opcode: bne, op1:x6; op2:x17; op1val:0x1000000; op2val:0x80; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x21, x6, x17, 0x1000000, 0x80, 0x200, 3f, x5, 60,0)
+
+inst_16:
+// rs1==x10, rs2==x7, rs2_val == 256,
+// opcode: bne, op1:x10; op2:x7; op1val:0x0; op2val:0x100; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x21, x10, x7, 0x0, 0x100, 0x4, 3f, x5, 64,0)
+
+inst_17:
+// rs1==x3, rs2==x24, rs2_val == 512, rs1_val == -4194305
+// opcode: bne, op1:x3; op2:x24; op1val:-0x400001; op2val:0x200; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x21, x3, x24, -0x400001, 0x200, 0x400, 3f, x5, 68,0)
+
+inst_18:
+// rs1==x0, rs2==x15, rs2_val == 1024,
+// opcode: bne, op1:x0; op2:x15; op1val:0x0; op2val:0x400; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x21, x0, x15, 0x0, 0x400, 0x2, 1b, x5, 72,0)
+
+inst_19:
+// rs1==x2, rs2==x18, rs2_val == 2048,
+// opcode: bne, op1:x2; op2:x18; op1val:0x66666667; op2val:0x800; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x21, x2, x18, 0x66666667, 0x800, 0x400, 3f, x5, 76,0)
+
+inst_20:
+// rs1==x22, rs2==x31, rs2_val == 4096,
+// opcode: bne, op1:x22; op2:x31; op1val:-0xa; op2val:0x1000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x22, x31, -0xa, 0x1000, 0x4, 3f, x5, 80,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_21:
+// rs1==x26, rs2==x30, rs2_val == 8192, rs1_val == 16384
+// opcode: bne, op1:x26; op2:x30; op1val:0x4000; op2val:0x2000; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x26, x30, 0x4000, 0x2000, 0x6, 3f, x1, 0,0)
+
+inst_22:
+// rs1==x27, rs2==x20, rs2_val == 16384, rs1_val == -17
+// opcode: bne, op1:x27; op2:x20; op1val:-0x11; op2val:0x4000; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x27, x20, -0x11, 0x4000, 0x10, 3f, x1, 4,0)
+
+inst_23:
+// rs1==x11, rs2==x12, rs2_val == 32768,
+// opcode: bne, op1:x11; op2:x12; op1val:0x4000000; op2val:0x8000; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x11, x12, 0x4000000, 0x8000, 0x400, 3f, x1, 8,0)
+
+inst_24:
+// rs1==x21, rs2==x6, rs2_val == 65536, rs1_val == 134217728
+// opcode: bne, op1:x21; op2:x6; op1val:0x8000000; op2val:0x10000; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x21, x6, 0x8000000, 0x10000, 0x100, 3f, x1, 12,0)
+
+inst_25:
+// rs1==x30, rs2==x28, rs2_val == 131072, rs1_val == -2097153
+// opcode: bne, op1:x30; op2:x28; op1val:-0x200001; op2val:0x20000; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x30, x28, -0x200001, 0x20000, 0x2, 1b, x1, 16,0)
+
+inst_26:
+// rs1==x15, rs2==x21, rs2_val == 262144, rs1_val == 268435456
+// opcode: bne, op1:x15; op2:x21; op1val:0x10000000; op2val:0x40000; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x15, x21, 0x10000000, 0x40000, 0x8, 3f, x1, 20,0)
+
+inst_27:
+// rs1==x29, rs2==x23, rs2_val == 524288,
+// opcode: bne, op1:x29; op2:x23; op1val:0xb503; op2val:0x80000; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x29, x23, 0xb503, 0x80000, 0x6, 3f, x1, 24,0)
+
+inst_28:
+// rs1==x17, rs2==x19, rs2_val == 2097152, rs1_val == -1431655766
+// opcode: bne, op1:x17; op2:x19; op1val:-0x55555556; op2val:0x200000; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x17, x19, -0x55555556, 0x200000, 0x8, 3f, x1, 28,0)
+
+inst_29:
+// rs1==x18, rs2==x5, rs2_val == 4194304, rs1_val == -1025
+// opcode: bne, op1:x18; op2:x5; op1val:-0x401; op2val:0x400000; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x18, x5, -0x401, 0x400000, 0x6, 1b, x1, 32,0)
+
+inst_30:
+// rs1==x31, rs2==x3, rs2_val == 8388608, rs1_val == 32
+// opcode: bne, op1:x31; op2:x3; op1val:0x20; op2val:0x800000; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x31, x3, 0x20, 0x800000, 0x2, 1b, x1, 36,0)
+
+inst_31:
+// rs1==x5, rs2==x2, rs2_val == 16777216, rs1_val == -268435457
+// opcode: bne, op1:x5; op2:x2; op1val:-0x10000001; op2val:0x1000000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x5, x2, -0x10000001, 0x1000000, 0x4, 1b, x1, 40,0)
+
+inst_32:
+// rs2_val == 67108864,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x7; op2val:0x4000000; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x7, 0x4000000, 0x6, 1b, x1, 44,0)
+
+inst_33:
+// rs2_val == 134217728, rs1_val == 1024
+// opcode: bne, op1:x10; op2:x11; op1val:0x400; op2val:0x8000000; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x400, 0x8000000, 0x8, 1b, x1, 48,0)
+
+inst_34:
+// rs2_val == 268435456, rs1_val == 2
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x10000000; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x10000000, 0x556, 1b, x1, 52,0)
+
+inst_35:
+// rs2_val == 536870912,
+// opcode: bne, op1:x10; op2:x11; op1val:0x1000000; op2val:0x20000000; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x1000000, 0x20000000, 0x8, 1b, x1, 56,0)
+
+inst_36:
+// rs2_val == 1073741824, rs1_val == -5
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5; op2val:0x40000000; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x5, 0x40000000, 0xa, 1b, x1, 60,0)
+
+inst_37:
+// rs2_val == -2147483648,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0x80000000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, -0x80000000, 0x4, 3f, x1, 64,0)
+
+inst_38:
+// rs2_val == -2, rs1_val == -67108865
+// opcode: bne, op1:x10; op2:x11; op1val:-0x4000001; op2val:-0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x4000001, -0x2, 0x400, 1b, x1, 68,0)
+
+inst_39:
+// rs2_val == -3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:-0x3; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, -0x3, 0x100, 3f, x1, 72,0)
+
+inst_40:
+// rs2_val == -5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:-0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, -0x5, 0x2, 1b, x1, 76,0)
+
+inst_41:
+// rs2_val == -9,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x4000001; op2val:-0x9; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x4000001, -0x9, 0x8, 1b, x1, 80,0)
+
+inst_42:
+// rs2_val == -33, rs1_val == 131072
+// opcode: bne, op1:x10; op2:x11; op1val:0x20000; op2val:-0x21; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x20000, -0x21, 0x4, 3f, x1, 84,0)
+
+inst_43:
+// rs2_val == -65,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:-0x41; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, -0x41, 0x556, 1b, x1, 88,0)
+
+inst_44:
+// rs2_val == -129, rs1_val == 16
+// opcode: bne, op1:x10; op2:x11; op1val:0x10; op2val:-0x81; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x10, -0x81, 0x100, 3f, x1, 92,0)
+
+inst_45:
+// rs2_val == -257, rs1_val == -262145
+// opcode: bne, op1:x10; op2:x11; op1val:-0x40001; op2val:-0x101; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x40001, -0x101, 0x0, 3f, x1, 96,0)
+
+inst_46:
+// rs2_val == -513,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x400001; op2val:-0x201; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x400001, -0x201, 0x556, 1b, x1, 100,0)
+
+inst_47:
+// rs2_val == -1025,
+// opcode: bne, op1:x10; op2:x11; op1val:0x40000000; op2val:-0x401; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x40000000, -0x401, 0x10, 3f, x1, 104,0)
+
+inst_48:
+// rs2_val == -2049, rs1_val == -524289
+// opcode: bne, op1:x10; op2:x11; op1val:-0x80001; op2val:-0x801; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x80001, -0x801, 0x0, 3f, x1, 108,0)
+
+inst_49:
+// rs2_val == -8193,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:-0x2001; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, -0x2001, 0x6, 1b, x1, 112,0)
+
+inst_50:
+// rs2_val == -16385,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x4; op2val:-0x4001; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x4, -0x4001, 0x4, 1b, x1, 116,0)
+
+inst_51:
+// rs2_val == -32769, rs1_val == -131073
+// opcode: bne, op1:x10; op2:x11; op1val:-0x20001; op2val:-0x8001; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x20001, -0x8001, 0x400, 3f, x1, 120,0)
+
+inst_52:
+// rs2_val == -65537,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0x10001; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, -0x10001, 0x8, 3f, x1, 124,0)
+
+inst_53:
+// rs2_val == -131073,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x40000000; op2val:-0x20001; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x40000000, -0x20001, 0x6, 3f, x1, 128,0)
+
+inst_54:
+// rs2_val == -262145, rs1_val == 128
+// opcode: bne, op1:x10; op2:x11; op1val:0x80; op2val:-0x40001; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x80, -0x40001, 0x8, 3f, x1, 132,0)
+
+inst_55:
+// rs2_val == -524289,
+// opcode: bne, op1:x10; op2:x11; op1val:0x400; op2val:-0x80001; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x400, -0x80001, 0x100, 3f, x1, 136,0)
+
+inst_56:
+// rs2_val == -1048577,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0x100001; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, -0x100001, 0x100, 3f, x1, 140,0)
+
+inst_57:
+// rs2_val == -2097153,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:-0x200001; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, -0x200001, 0x200, 3f, x1, 144,0)
+
+inst_58:
+// rs2_val == -4194305, rs1_val == -2147483648
+// opcode: bne, op1:x10; op2:x11; op1val:-0x80000000; op2val:-0x400001; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x80000000, -0x400001, 0x8, 3f, x1, 148,0)
+
+inst_59:
+// rs2_val == -8388609,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:-0x800001; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, -0x800001, 0x10, 3f, x1, 152,0)
+
+inst_60:
+// rs2_val == -16777217, rs1_val == 4
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:-0x1000001; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, -0x1000001, 0x80, 3f, x1, 156,0)
+
+inst_61:
+// rs2_val == -33554433,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x1; op2val:-0x2000001; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x1, -0x2000001, 0x40, 3f, x1, 160,0)
+
+inst_62:
+// rs2_val == -67108865,
+// opcode: bne, op1:x10; op2:x11; op1val:0x7; op2val:-0x4000001; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x7, -0x4000001, 0x400, 1b, x1, 164,0)
+
+inst_63:
+// rs2_val == -134217729,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:-0x8000001; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, -0x8000001, 0x0, 1b, x1, 168,0)
+
+inst_64:
+// rs2_val == -536870913, rs1_val == -33554433
+// opcode: bne, op1:x10; op2:x11; op1val:-0x2000001; op2val:-0x20000001; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x2000001, -0x20000001, 0x400, 3f, x1, 172,0)
+
+inst_65:
+// rs2_val == 2147483647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3fffffff; op2val:0x7fffffff; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3fffffff, 0x7fffffff, 0x200, 3f, x1, 176,0)
+
+inst_66:
+// rs2_val == 1431655765, rs1_val==6 and rs2_val==1431655765
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x55555555, 0x8, 3f, x1, 180,0)
+
+inst_67:
+// rs2_val == -1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x11; op2val:-0x55555556; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x11, -0x55555556, 0x100, 3f, x1, 184,0)
+
+inst_68:
+// rs1_val == 8,
+// opcode: bne, op1:x10; op2:x11; op1val:0x8; op2val:0x33333334; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x8, 0x33333334, 0x400, 3f, x1, 188,0)
+
+inst_69:
+// rs1_val == 64,
+// opcode: bne, op1:x10; op2:x11; op1val:0x40; op2val:-0x21; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x40, -0x21, 0x20, 3f, x1, 192,0)
+
+inst_70:
+// rs1_val == 256,
+// opcode: bne, op1:x10; op2:x11; op1val:0x100; op2val:-0x101; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x100, -0x101, 0x8, 3f, x1, 196,0)
+
+inst_71:
+// rs1_val == 512,
+// opcode: bne, op1:x10; op2:x11; op1val:0x200; op2val:-0x2000001; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x200, -0x2000001, 0xa, 1b, x1, 200,0)
+
+inst_72:
+// rs1_val == 2048,
+// opcode: bne, op1:x10; op2:x11; op1val:0x800; op2val:0x66666666; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x800, 0x66666666, 0x0, 3f, x1, 204,0)
+
+inst_73:
+// rs1_val == 4096,
+// opcode: bne, op1:x10; op2:x11; op1val:0x1000; op2val:0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x1000, 0xb503, 0x4, 3f, x1, 208,0)
+
+inst_74:
+// rs1_val == 8192,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2000; op2val:0x20000000; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2000, 0x20000000, 0x8, 3f, x1, 212,0)
+
+inst_75:
+// rs1_val == 32768,
+// opcode: bne, op1:x10; op2:x11; op1val:0x8000; op2val:0x66666666; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x8000, 0x66666666, 0x80, 3f, x1, 216,0)
+
+inst_76:
+// rs1_val == 65536,
+// opcode: bne, op1:x10; op2:x11; op1val:0x10000; op2val:0x6; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x10000, 0x6, 0x40, 3f, x1, 220,0)
+
+inst_77:
+// rs1_val == 262144,
+// opcode: bne, op1:x10; op2:x11; op1val:0x40000; op2val:-0x10000001; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x40000, -0x10000001, 0x20, 3f, x1, 224,0)
+
+inst_78:
+// rs1_val == 524288,
+// opcode: bne, op1:x10; op2:x11; op1val:0x80000; op2val:-0x40000000; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x80000, -0x40000000, 0x8, 1b, x1, 228,0)
+
+inst_79:
+// rs1_val == 1048576,
+// opcode: bne, op1:x10; op2:x11; op1val:0x100000; op2val:0x80; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x100000, 0x80, 0x400, 3f, x1, 232,0)
+
+inst_80:
+// rs1_val == 2097152,
+// opcode: bne, op1:x10; op2:x11; op1val:0x200000; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x200000, 0x3, 0x6, 3f, x1, 236,0)
+
+inst_81:
+// rs1_val == 4194304,
+// opcode: bne, op1:x10; op2:x11; op1val:0x400000; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x400000, 0x0, 0x8, 3f, x1, 240,0)
+
+inst_82:
+// rs1_val == 8388608,
+// opcode: bne, op1:x10; op2:x11; op1val:0x800000; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x800000, 0x4, 0x8, 3f, x1, 244,0)
+
+inst_83:
+// rs1_val == 33554432,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2000000; op2val:-0x81; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2000000, -0x81, 0x8, 1b, x1, 248,0)
+
+inst_84:
+// rs1_val == 536870912,
+// opcode: bne, op1:x10; op2:x11; op1val:0x20000000; op2val:0x100; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x20000000, 0x100, 0x0, 1b, x1, 252,0)
+
+inst_85:
+// rs1_val == -2,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x2; op2val:0x200000; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x2, 0x200000, 0x8, 3f, x1, 256,0)
+
+inst_86:
+// rs1_val == -3,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x3; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x3, 0x0, 0x400, 3f, x1, 260,0)
+
+inst_87:
+// rs1_val == -9,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x9; op2val:-0x1000001; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x9, -0x1000001, 0x400, 3f, x1, 264,0)
+
+inst_88:
+// rs1_val == -33,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x21; op2val:0x33333334; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x21, 0x33333334, 0x100, 3f, x1, 268,0)
+
+inst_89:
+// rs1_val == -129,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x81; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x81, 0x5, 0x100, 3f, x1, 272,0)
+
+inst_90:
+// rs1_val == -257,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x101; op2val:-0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x101, -0x3, 0x6, 3f, x1, 276,0)
+
+inst_91:
+// rs1_val == -513,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x201; op2val:0x20000000; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x201, 0x20000000, 0x10, 3f, x1, 280,0)
+
+inst_92:
+// rs1_val == -8193,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x2001; op2val:-0x1000001; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x2001, -0x1000001, 0x4, 1b, x1, 284,0)
+
+inst_93:
+// rs1_val == -16385,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x4001; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x4001, 0x6, 0x8, 1b, x1, 288,0)
+
+inst_94:
+// rs1_val == -32769,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x8001; op2val:-0x40001; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x8001, -0x40001, 0x6, 3f, x1, 292,0)
+
+inst_95:
+// rs1_val == -8388609,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x800001; op2val:-0x2000001; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x800001, -0x2000001, 0x20, 3f, x1, 296,0)
+
+inst_96:
+// rs1_val == -16777217,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x1000001; op2val:0x400; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x1000001, 0x400, 0x8, 3f, x1, 300,0)
+
+inst_97:
+// rs1_val == -134217729,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x8000001; op2val:-0x7; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x8000001, -0x7, 0x200, 3f, x1, 304,0)
+
+inst_98:
+// rs1_val == -536870913,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x20000001; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x20000001, 0x2, 0x556, 1b, x1, 308,0)
+
+inst_99:
+// rs1_val == -1073741825,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x40000001; op2val:0x400000; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x40000001, 0x400000, 0x200, 3f, x1, 312,0)
+
+inst_100:
+// rs1_val == 2147483647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x7fffffff; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x7fffffff, 0x0, 0x10, 3f, x1, 316,0)
+
+inst_101:
+// rs1_val==3 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x3, 0x8, 3f, x1, 320,0)
+
+inst_102:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x55555555; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x55555555, 0x200, 3f, x1, 324,0)
+
+inst_103:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:-0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, -0x55555556, 0x400, 3f, x1, 328,0)
+
+inst_104:
+// rs1_val==3 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x5; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x5, 0x200, 3f, x1, 332,0)
+
+inst_105:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x33333333; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x33333333, 0x100, 3f, x1, 336,0)
+
+inst_106:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x66666666, 0x400, 3f, x1, 340,0)
+
+inst_107:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:-0xb504; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, -0xb504, 0x10, 3f, x1, 344,0)
+
+inst_108:
+// rs1_val==3 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0xb504, 0x0, 3f, x1, 348,0)
+
+inst_109:
+// rs1_val==3 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x2, 0xa, 1b, x1, 352,0)
+
+inst_110:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x55555554; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x55555554, 0x40, 3f, x1, 356,0)
+
+inst_111:
+// rs1_val==3 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x0, 0x2, 1b, x1, 360,0)
+
+inst_112:
+// rs1_val==3 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x4, 0x40, 3f, x1, 364,0)
+
+inst_113:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x33333332, 0x0, 1b, x1, 368,0)
+
+inst_114:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x66666665, 0x400, 3f, x1, 372,0)
+
+inst_115:
+// rs1_val==3 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0xb503, 0x20, 3f, x1, 376,0)
+
+inst_116:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x55555556, 0x556, 1b, x1, 380,0)
+
+inst_117:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:-0x55555555; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, -0x55555555, 0x80, 3f, x1, 384,0)
+
+inst_118:
+// rs1_val==3 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x6, 0x4, 1b, x1, 388,0)
+
+inst_119:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x33333334, 0x2, 1b, x1, 392,0)
+
+inst_120:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x66666667; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0x66666667, 0x10, 3f, x1, 396,0)
+
+inst_121:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:-0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, -0xb503, 0x8, 1b, x1, 400,0)
+
+inst_122:
+// rs1_val==3 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x3, 0xb505, 0x6, 1b, x1, 404,0)
+
+inst_123:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x3; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x3, 0x40, 3f, x1, 408,0)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555555; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x55555555, 0x200, 3f, x1, 412,0)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, -0x55555556, 0x4, 3f, x1, 416,0)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x5, 0x6, 3f, x1, 420,0)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333333; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x33333333, 0x20, 3f, x1, 424,0)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666666; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x66666666, 0x556, 1b, x1, 428,0)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb504; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, -0xb504, 0x40, 3f, x1, 432,0)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb504; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0xb504, 0x100, 3f, x1, 436,0)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x2, 0x8, 1b, x1, 440,0)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x55555554, 0x0, 3f, x1, 444,0)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x0, 0x4, 1b, x1, 448,0)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x4, 0x40, 3f, x1, 452,0)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333332; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x33333332, 0xa, 1b, x1, 456,0)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666665; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x66666665, 0x6, 1b, x1, 460,0)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0xb503, 0x400, 3f, x1, 464,0)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x55555556; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x55555556, 0x40, 3f, x1, 468,0)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:-0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, -0x55555555, 0x4, 3f, x1, 472,0)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x6, 0x6, 3f, x1, 476,0)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x33333334, 0x8, 3f, x1, 480,0)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0x66666667; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0x66666667, 0x400, 1b, x1, 484,0)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:-0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, -0xb503, 0x0, 1b, x1, 488,0)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555555; op2val:0xb505; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555555, 0xb505, 0x20, 3f, x1, 492,0)
+
+inst_145:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x3, 0xa, 1b, x1, 496,0)
+
+inst_146:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x55555555, 0x2, 3f, x1, 500,0)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555556; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, -0x55555556, 0x10, 3f, x1, 504,0)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x5, 0x400, 3f, x1, 508,0)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333333; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x33333333, 0x10, 3f, x1, 512,0)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666666; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x66666666, 0x0, 1b, x1, 516,0)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, -0xb504, 0x0, 3f, x1, 520,0)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb504; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0xb504, 0x20, 3f, x1, 524,0)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x2, 0xa, 1b, x1, 528,0)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555554; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x55555554, 0x40, 3f, x1, 532,0)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x0, 0x0, 1b, x1, 536,0)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x4; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x4, 0x200, 3f, x1, 540,0)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x33333332, 0x2, 3f, x1, 544,0)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x66666665, 0x2, 3f, x1, 548,0)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0xb503, 0x400, 1b, x1, 552,0)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x55555556; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x55555556, 0x10, 3f, x1, 556,0)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, -0x55555555, 0x8, 3f, x1, 560,0)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x6, 0x6, 3f, x1, 564,0)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x33333334; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x33333334, 0x80, 3f, x1, 568,0)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0x66666667; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0x66666667, 0x400, 1b, x1, 572,0)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:-0xb503; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, -0xb503, 0x80, 3f, x1, 576,0)
+
+inst_166:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555556; op2val:0xb505; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555556, 0xb505, 0x100, 3f, x1, 580,0)
+
+inst_167:
+// rs1_val==5 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x3, 0x8, 3f, x1, 584,0)
+
+inst_168:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x55555555, 0x10, 3f, x1, 588,0)
+
+inst_169:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:-0x55555556; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, -0x55555556, 0x20, 3f, x1, 592,0)
+
+inst_170:
+// rs1_val==5 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x5, 0x400, 3f, x1, 596,0)
+
+inst_171:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x33333333, 0x400, 3f, x1, 600,0)
+
+inst_172:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x66666666; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x66666666, 0x400, 3f, x1, 604,0)
+
+inst_173:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:-0xb504; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, -0xb504, 0x80, 3f, x1, 608,0)
+
+inst_174:
+// rs1_val==5 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0xb504, 0x6, 3f, x1, 612,0)
+
+inst_175:
+// rs1_val==5 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x2, 0x0, 1b, x1, 616,0)
+
+inst_176:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x55555554, 0x2, 1b, x1, 620,0)
+
+inst_177:
+// rs1_val==5 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x0, 0xa, 1b, x1, 624,0)
+
+inst_178:
+// rs1_val==5 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x4, 0x2, 3f, x1, 628,0)
+
+inst_179:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x33333332; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x33333332, 0x200, 3f, x1, 632,0)
+
+inst_180:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x66666665, 0x2, 3f, x1, 636,0)
+
+inst_181:
+// rs1_val==5 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0xb503, 0x6, 3f, x1, 640,0)
+
+inst_182:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x55555556, 0x6, 3f, x1, 644,0)
+
+inst_183:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:-0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, -0x55555555, 0x20, 3f, x1, 648,0)
+
+inst_184:
+// rs1_val==5 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x6, 0x80, 3f, x1, 652,0)
+
+inst_185:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x33333334; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x33333334, 0x200, 3f, x1, 656,0)
+
+inst_186:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x66666667; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0x66666667, 0x100, 3f, x1, 660,0)
+
+inst_187:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:-0xb503; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, -0xb503, 0x100, 3f, x1, 664,0)
+
+inst_188:
+// rs1_val==5 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0xb505; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x5, 0xb505, 0x2, 1b, x1, 668,0)
+
+inst_189:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x3, 0x400, 3f, x1, 672,0)
+
+inst_190:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555555; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x55555555, 0x100, 3f, x1, 676,0)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555556; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, -0x55555556, 0x40, 3f, x1, 680,0)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x5, 0x6, 3f, x1, 684,0)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333333; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x33333333, 0x80, 3f, x1, 688,0)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666666; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x66666666, 0x100, 3f, x1, 692,0)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, -0xb504, 0xa, 1b, x1, 696,0)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0xb504, 0x2, 3f, x1, 700,0)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x2, 0x400, 1b, x1, 704,0)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555554; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x55555554, 0x8, 3f, x1, 708,0)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x0, 0x10, 3f, x1, 712,0)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x4, 0x20, 3f, x1, 716,0)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x33333332, 0x2, 3f, x1, 720,0)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666665; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x66666665, 0x10, 3f, x1, 724,0)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0xb503, 0x0, 3f, x1, 728,0)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x55555556, 0x0, 1b, x1, 732,0)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, -0x55555555, 0x8, 3f, x1, 736,0)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x6, 0x400, 1b, x1, 740,0)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x33333334; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x33333334, 0x20, 3f, x1, 744,0)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0x66666667; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0x66666667, 0x20, 3f, x1, 748,0)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, -0xb503, 0x6, 1b, x1, 752,0)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333333; op2val:0xb505; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333333, 0xb505, 0x20, 3f, x1, 756,0)
+
+inst_211:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x3, 0x400, 1b, x1, 760,0)
+
+inst_212:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x55555555, 0x2, 1b, x1, 764,0)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, -0x55555556, 0x400, 3f, x1, 768,0)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x5, 0x8, 3f, x1, 772,0)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333333; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x33333333, 0x8, 1b, x1, 776,0)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x66666666, 0x2, 1b, x1, 780,0)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, -0xb504, 0x400, 1b, x1, 784,0)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0xb504, 0xa, 1b, x1, 788,0)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x2, 0x556, 1b, x1, 792,0)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x55555554, 0x0, 3f, x1, 796,0)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x0, 0x8, 3f, x1, 800,0)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x33333332, 0x0, 1b, x1, 804,0)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666665; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x66666665, 0x6, 3f, x1, 808,0)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb503; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0xb503, 0x80, 3f, x1, 812,0)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x55555556; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x55555556, 0x20, 3f, x1, 816,0)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:-0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, -0x55555555, 0x400, 1b, x1, 820,0)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x6, 0x8, 3f, x1, 824,0)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x33333334, 0x8, 1b, x1, 828,0)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0x66666667; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0x66666667, 0x400, 3f, x1, 832,0)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:-0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, -0xb503, 0x40, 3f, x1, 836,0)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666666; op2val:0xb505; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666666, 0xb505, 0x80, 3f, x1, 840,0)
+
+inst_232:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x3, 0x400, 3f, x1, 844,0)
+
+inst_233:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x55555555, 0x8, 3f, x1, 848,0)
+
+inst_234:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555556; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, -0x55555556, 0x100, 3f, x1, 852,0)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x5, 0x4, 3f, x1, 856,0)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x33333333, 0x4, 1b, x1, 860,0)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666666; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x66666666, 0x40, 3f, x1, 864,0)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0xb504; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0xb504, 0x556, 1b, x1, 868,0)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x2, 0x6, 1b, x1, 872,0)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555554; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x55555554, 0x20, 3f, x1, 876,0)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x0, 0x80, 3f, x1, 880,0)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x4, 0x6, 3f, x1, 884,0)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x33333332, 0x6, 3f, x1, 888,0)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666665; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x66666665, 0x0, 1b, x1, 892,0)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0xb503, 0x400, 3f, x1, 896,0)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x55555556, 0x4, 3f, x1, 900,0)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:-0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, -0x55555555, 0x400, 3f, x1, 904,0)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x6, 0x80, 3f, x1, 908,0)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x33333334, 0x4, 3f, x1, 912,0)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0x66666667; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0x66666667, 0x20, 3f, x1, 916,0)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, -0xb503, 0x6, 1b, x1, 920,0)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504; op2val:0xb505; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb504, 0xb505, 0x20, 3f, x1, 924,0)
+
+inst_253:
+// rs1_val==46340 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x3, 0x400, 3f, x1, 928,0)
+
+inst_254:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x55555555, 0x40, 3f, x1, 932,0)
+
+inst_255:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, -0x55555556, 0x4, 1b, x1, 936,0)
+
+inst_256:
+// rs1_val==46340 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x5, 0x400, 1b, x1, 940,0)
+
+inst_257:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x33333333, 0x400, 1b, x1, 944,0)
+
+inst_258:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666666; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x66666666, 0x10, 3f, x1, 948,0)
+
+inst_259:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:-0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, -0xb504, 0x400, 1b, x1, 952,0)
+
+inst_260:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0xb504, 0xa, 1b, x1, 956,0)
+
+inst_261:
+// rs1_val==46340 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x2, 0x400, 3f, x1, 960,0)
+
+inst_262:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555554; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x55555554, 0x40, 3f, x1, 964,0)
+
+inst_263:
+// rs1_val==46340 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x0, 0x400, 3f, x1, 968,0)
+
+inst_264:
+// rs1_val==46340 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x4, 0x80, 3f, x1, 972,0)
+
+inst_265:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x33333332, 0x8, 3f, x1, 976,0)
+
+inst_266:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666665; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x66666665, 0x8, 3f, x1, 980,0)
+
+inst_267:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0xb503, 0x8, 3f, x1, 984,0)
+
+inst_268:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x55555556, 0x6, 3f, x1, 988,0)
+
+inst_269:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:-0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, -0x55555555, 0x0, 1b, x1, 992,0)
+
+inst_270:
+// rs1_val==46340 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x6, 0xa, 1b, x1, 996,0)
+
+inst_271:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x33333334; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x33333334, 0x6, 3f, x1, 1000,0)
+
+inst_272:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0x66666667; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0x66666667, 0x556, 1b, x1, 1004,0)
+
+inst_273:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:-0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, -0xb503, 0x8, 3f, x1, 1008,0)
+
+inst_274:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb504, 0xb505, 0x6, 3f, x1, 1012,0)
+
+inst_275:
+// rs1_val==2 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x3; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x3, 0x40, 3f, x1, 1016,0)
+
+inst_276:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x55555555; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x55555555, 0x40, 3f, x1, 1020,0)
+
+inst_277:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:-0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, -0x55555556, 0x8, 1b, x1, 1024,0)
+
+inst_278:
+// rs1_val==2 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x5, 0x10, 3f, x1, 1028,0)
+
+inst_279:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x33333333, 0x400, 3f, x1, 1032,0)
+
+inst_280:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x66666666; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x66666666, 0x100, 3f, x1, 1036,0)
+
+inst_281:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:-0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, -0xb504, 0xa, 1b, x1, 1040,0)
+
+inst_282:
+// rs1_val==2 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0xb504; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0xb504, 0x80, 3f, x1, 1044,0)
+
+inst_283:
+// rs1_val==2 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x2, 0x10, 3f, x1, 1048,0)
+
+inst_284:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x55555554; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x55555554, 0x6, 3f, x1, 1052,0)
+
+inst_285:
+// rs1_val==2 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x0; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x0, 0x20, 3f, x1, 1056,0)
+
+inst_286:
+// rs1_val==2 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x4, 0x6, 3f, x1, 1060,0)
+
+inst_287:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x33333332; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x33333332, 0x20, 3f, x1, 1064,0)
+
+inst_288:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x66666665; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x66666665, 0xa, 1b, x1, 1068,0)
+
+inst_289:
+// rs1_val==2 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0xb503; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0xb503, 0x10, 3f, x1, 1072,0)
+
+inst_290:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x55555556, 0x400, 1b, x1, 1076,0)
+
+inst_291:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:-0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, -0x55555555, 0x400, 1b, x1, 1080,0)
+
+inst_292:
+// rs1_val==2 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x6, 0xa, 1b, x1, 1084,0)
+
+inst_293:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x33333334, 0x2, 3f, x1, 1088,0)
+
+inst_294:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x66666667; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0x66666667, 0x6, 1b, x1, 1092,0)
+
+inst_295:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:-0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, -0xb503, 0x8, 1b, x1, 1096,0)
+
+inst_296:
+// rs1_val==2 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x2, 0xb505, 0x400, 3f, x1, 1100,0)
+
+inst_297:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x3, 0x2, 1b, x1, 1104,0)
+
+inst_298:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x55555555, 0x0, 1b, x1, 1108,0)
+
+inst_299:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, -0x55555556, 0x200, 3f, x1, 1112,0)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x5, 0x4, 3f, x1, 1116,0)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333333; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x33333333, 0x40, 3f, x1, 1120,0)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666666; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x66666666, 0x556, 1b, x1, 1124,0)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb504; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, -0xb504, 0x40, 3f, x1, 1128,0)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0xb504, 0x8, 3f, x1, 1132,0)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x2, 0x400, 1b, x1, 1136,0)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555554; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x55555554, 0x40, 3f, x1, 1140,0)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x0, 0x8, 1b, x1, 1144,0)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x4, 0x6, 1b, x1, 1148,0)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x33333332, 0x6, 3f, x1, 1152,0)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666665; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x66666665, 0x100, 3f, x1, 1156,0)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0xb503, 0x400, 1b, x1, 1160,0)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x55555556, 0x8, 1b, x1, 1164,0)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:-0x55555555; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, -0x55555555, 0x556, 1b, x1, 1168,0)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x6; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x6, 0x40, 3f, x1, 1172,0)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x33333334; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x33333334, 0x200, 3f, x1, 1176,0)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x66666667; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x66666667, 0x100, 3f, x1, 1180,0)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:-0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, -0xb503, 0x0, 3f, x1, 1184,0)
+
+inst_318:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0xb505; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0xb505, 0x0, 1b, x1, 1188,0)
+
+inst_319:
+// rs1_val==0 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x3, 0x2, 3f, x1, 1192,0)
+
+inst_320:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x55555555, 0x8, 3f, x1, 1196,0)
+
+inst_321:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, -0x55555556, 0x400, 3f, x1, 1200,0)
+
+inst_322:
+// rs1_val==0 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x5, 0x6, 3f, x1, 1204,0)
+
+inst_323:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x33333333; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x33333333, 0x200, 3f, x1, 1208,0)
+
+inst_324:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x66666666, 0x6, 1b, x1, 1212,0)
+
+inst_325:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0xb504; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, -0xb504, 0x100, 3f, x1, 1216,0)
+
+inst_326:
+// rs1_val==0 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0xb504; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0xb504, 0x0, 1b, x1, 1220,0)
+
+inst_327:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333334; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x33333334, 0x4, 1b, x1, 1224,0)
+
+inst_328:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666667; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x66666667, 0x200, 3f, x1, 1228,0)
+
+inst_329:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, -0xb503, 0x20, 3f, x1, 1232,0)
+
+inst_330:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb505; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0xb505, 0x200, 3f, x1, 1236,0)
+
+inst_331:
+// rs1_val==6 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x3, 0x8, 1b, x1, 1240,0)
+
+inst_332:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:-0x55555556; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, -0x55555556, 0x40, 3f, x1, 1244,0)
+
+inst_333:
+// rs1_val==6 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x5, 0x100, 3f, x1, 1248,0)
+
+inst_334:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x33333333; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x33333333, 0x8, 1b, x1, 1252,0)
+
+inst_335:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x66666666; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x66666666, 0x40, 3f, x1, 1256,0)
+
+inst_336:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:-0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, -0xb504, 0x400, 3f, x1, 1260,0)
+
+inst_337:
+// rs1_val==6 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0xb504; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0xb504, 0x2, 1b, x1, 1264,0)
+
+inst_338:
+// rs1_val==6 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x2, 0x0, 3f, x1, 1268,0)
+
+inst_339:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x55555554; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x55555554, 0x8, 1b, x1, 1272,0)
+
+inst_340:
+// rs1_val==6 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x0, 0x80, 3f, x1, 1276,0)
+
+inst_341:
+// rs1_val==6 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x4, 0x80, 3f, x1, 1280,0)
+
+inst_342:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x33333332; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x33333332, 0x400, 1b, x1, 1284,0)
+
+inst_343:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x66666665; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x66666665, 0x10, 3f, x1, 1288,0)
+
+inst_344:
+// rs1_val==6 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0xb503; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0xb503, 0x200, 3f, x1, 1292,0)
+
+inst_345:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x55555556, 0x8, 1b, x1, 1296,0)
+
+inst_346:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:-0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, -0x55555555, 0x4, 1b, x1, 1300,0)
+
+inst_347:
+// rs1_val==6 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x6, 0x100, 3f, x1, 1304,0)
+
+inst_348:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x33333334, 0x2, 3f, x1, 1308,0)
+
+inst_349:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x66666667; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0x66666667, 0x4, 1b, x1, 1312,0)
+
+inst_350:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:-0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, -0xb503, 0x0, 3f, x1, 1316,0)
+
+inst_351:
+// rs1_val==6 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0xb505; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x6, 0xb505, 0x8, 1b, x1, 1320,0)
+
+inst_352:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x3, 0x4, 3f, x1, 1324,0)
+
+inst_353:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x55555555, 0x0, 1b, x1, 1328,0)
+
+inst_354:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, -0x55555556, 0x400, 1b, x1, 1332,0)
+
+inst_355:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x5, 0x6, 3f, x1, 1336,0)
+
+inst_356:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333333; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x33333333, 0x0, 3f, x1, 1340,0)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666666; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x66666666, 0xa, 1b, x1, 1344,0)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, -0xb504, 0x6, 1b, x1, 1348,0)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb504; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0xb504, 0x556, 1b, x1, 1352,0)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x2, 0x400, 1b, x1, 1356,0)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555554; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x55555554, 0x20, 3f, x1, 1360,0)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x0, 0x4, 3f, x1, 1364,0)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x4, 0xa, 1b, x1, 1368,0)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333332; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x33333332, 0xa, 1b, x1, 1372,0)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666665; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x66666665, 0x4, 3f, x1, 1376,0)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0xb503, 0x2, 1b, x1, 1380,0)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x55555556, 0x2, 3f, x1, 1384,0)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:-0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, -0x55555555, 0x6, 1b, x1, 1388,0)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x6, 0x20, 3f, x1, 1392,0)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x33333334; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x33333334, 0x2, 3f, x1, 1396,0)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0x66666667, 0x8, 3f, x1, 1400,0)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:-0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, -0xb503, 0x0, 3f, x1, 1404,0)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333334; op2val:0xb505; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333334, 0xb505, 0x20, 3f, x1, 1408,0)
+
+inst_374:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x3, 0x8, 3f, x1, 1412,0)
+
+inst_375:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x55555555, 0x2, 1b, x1, 1416,0)
+
+inst_376:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, -0x55555556, 0x200, 3f, x1, 1420,0)
+
+inst_377:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x5, 0x8, 1b, x1, 1424,0)
+
+inst_378:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333333; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x33333333, 0x0, 3f, x1, 1428,0)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666666; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x66666666, 0x6, 1b, x1, 1432,0)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, -0xb504, 0x8, 1b, x1, 1436,0)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0xb504, 0x8, 3f, x1, 1440,0)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x2, 0x10, 3f, x1, 1444,0)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x55555554, 0x2, 1b, x1, 1448,0)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x0, 0x2, 3f, x1, 1452,0)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x4, 0x80, 3f, x1, 1456,0)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333332; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x33333332, 0x20, 3f, x1, 1460,0)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666665; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x66666665, 0x6, 1b, x1, 1464,0)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0xb503, 0x0, 3f, x1, 1468,0)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x55555556; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x55555556, 0x0, 3f, x1, 1472,0)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:-0x55555555; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, -0x55555555, 0x2, 3f, x1, 1476,0)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x6, 0x6, 1b, x1, 1480,0)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x33333334; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x33333334, 0x40, 3f, x1, 1484,0)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0x66666667; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0x66666667, 0x400, 1b, x1, 1488,0)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:-0xb503; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, -0xb503, 0x2, 1b, x1, 1492,0)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666667; op2val:0xb505; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666667, 0xb505, 0x80, 3f, x1, 1496,0)
+
+inst_396:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x3, 0x4, 3f, x1, 1500,0)
+
+inst_397:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x55555555, 0x20, 3f, x1, 1504,0)
+
+inst_398:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, -0x55555556, 0x6, 1b, x1, 1508,0)
+
+inst_399:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x5, 0x4, 3f, x1, 1512,0)
+
+inst_400:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333333; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x33333333, 0x2, 3f, x1, 1516,0)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x66666666, 0x2, 3f, x1, 1520,0)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, -0xb504, 0x8, 1b, x1, 1524,0)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0xb504, 0x400, 3f, x1, 1528,0)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x2; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x2, 0x200, 3f, x1, 1532,0)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555554; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x55555554, 0x20, 3f, x1, 1536,0)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x0, 0x10, 3f, x1, 1540,0)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x4, 0x0, 1b, x1, 1544,0)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x33333332, 0x2, 1b, x1, 1548,0)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666665; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x66666665, 0x0, 1b, x1, 1552,0)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0xb503, 0x0, 3f, x1, 1556,0)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x55555556, 0x6, 3f, x1, 1560,0)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:-0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, -0x55555555, 0x400, 3f, x1, 1564,0)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x6; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x6, 0x40, 3f, x1, 1568,0)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x33333334, 0x8, 3f, x1, 1572,0)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0x66666667; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0x66666667, 0x8, 1b, x1, 1576,0)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:-0xb503; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, -0xb503, 0x80, 3f, x1, 1580,0)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb503; op2val:0xb505; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0xb503, 0xb505, 0x2, 1b, x1, 1584,0)
+
+inst_418:
+// rs1_val==46341 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x3, 0x6, 1b, x1, 1588,0)
+
+inst_419:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x55555555, 0x10, 3f, x1, 1592,0)
+
+inst_420:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, -0x55555556, 0x400, 3f, x1, 1596,0)
+
+inst_421:
+// rs1_val==46341 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x5, 0x8, 1b, x1, 1600,0)
+
+inst_422:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x33333333, 0x400, 3f, x1, 1604,0)
+
+inst_423:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666666; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x66666666, 0x0, 3f, x1, 1608,0)
+
+inst_424:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:-0xb504; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, -0xb504, 0x20, 3f, x1, 1612,0)
+
+inst_425:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0xb504, 0x200, 3f, x1, 1616,0)
+
+inst_426:
+// rs1_val==46341 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x2; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x2, 0x200, 3f, x1, 1620,0)
+
+inst_427:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555554; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x55555554, 0x10, 3f, x1, 1624,0)
+
+inst_428:
+// rs1_val==46341 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x0, 0xa, 1b, x1, 1628,0)
+
+inst_429:
+// rs1_val==46341 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x4, 0x80, 3f, x1, 1632,0)
+
+inst_430:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333332; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x33333332, 0x0, 1b, x1, 1636,0)
+
+inst_431:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x66666665, 0x400, 3f, x1, 1640,0)
+
+inst_432:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0xb503, 0x40, 3f, x1, 1644,0)
+
+inst_433:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x55555556, 0x400, 3f, x1, 1648,0)
+
+inst_434:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, -0x55555555, 0x8, 3f, x1, 1652,0)
+
+inst_435:
+// rs1_val==46341 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x6, 0x4, 3f, x1, 1656,0)
+
+inst_436:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x33333334; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x33333334, 0x6, 1b, x1, 1660,0)
+
+inst_437:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0x66666667; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0x66666667, 0x0, 3f, x1, 1664,0)
+
+inst_438:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, -0xb503, 0x6, 1b, x1, 1668,0)
+
+inst_439:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb505; op2val:0xb505; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb505, 0xb505, 0x100, 3f, x1, 1672,0)
+
+inst_440:
+// rs1_val==0 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x2, 0x4, 3f, x1, 1676,0)
+
+inst_441:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x55555554; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x55555554, 0x20, 3f, x1, 1680,0)
+
+inst_442:
+// rs1_val==0 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x0, 0x100, 3f, x1, 1684,0)
+
+inst_443:
+// rs1_val==0 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x4, 0x4, 1b, x1, 1688,0)
+
+inst_444:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x33333332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x33333332, 0x8, 3f, x1, 1692,0)
+
+inst_445:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x66666665; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x66666665, 0x0, 1b, x1, 1696,0)
+
+inst_446:
+// rs1_val==0 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0xb503, 0x4, 1b, x1, 1700,0)
+
+inst_447:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x55555556, 0x4, 1b, x1, 1704,0)
+
+inst_448:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, -0x55555555, 0x4, 1b, x1, 1708,0)
+
+inst_449:
+// rs1_val==0 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x6, 0x4, 3f, x1, 1712,0)
+
+inst_450:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x33333334; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x33333334, 0x0, 1b, x1, 1716,0)
+
+inst_451:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x66666667; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0x66666667, 0x556, 1b, x1, 1720,0)
+
+inst_452:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, -0xb503, 0x20, 3f, x1, 1724,0)
+
+inst_453:
+// rs1_val==0 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x0, 0xb505, 0x400, 1b, x1, 1728,0)
+
+inst_454:
+// rs1_val==4 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x3; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x3, 0x40, 3f, x1, 1732,0)
+
+inst_455:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x55555555; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x55555555, 0x200, 3f, x1, 1736,0)
+
+inst_456:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:-0x55555556; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, -0x55555556, 0x200, 3f, x1, 1740,0)
+
+inst_457:
+// rs1_val==4 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x5; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x5, 0x20, 3f, x1, 1744,0)
+
+inst_458:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x33333333, 0x4, 1b, x1, 1748,0)
+
+inst_459:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x66666666; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x66666666, 0x4, 3f, x1, 1752,0)
+
+inst_460:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:-0xb504; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, -0xb504, 0xa, 1b, x1, 1756,0)
+
+inst_461:
+// rs1_val==4 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0xb504; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0xb504, 0x20, 3f, x1, 1760,0)
+
+inst_462:
+// rs1_val==4 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x2, 0x556, 1b, x1, 1764,0)
+
+inst_463:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x55555554; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x55555554, 0x4, 3f, x1, 1768,0)
+
+inst_464:
+// rs1_val==4 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x0, 0x0, 1b, x1, 1772,0)
+
+inst_465:
+// rs1_val==4 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x4, 0x8, 1b, x1, 1776,0)
+
+inst_466:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x33333332, 0x6, 1b, x1, 1780,0)
+
+inst_467:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x66666665; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x66666665, 0x4, 1b, x1, 1784,0)
+
+inst_468:
+// rs1_val==4 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0xb503; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0xb503, 0x40, 3f, x1, 1788,0)
+
+inst_469:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x55555556, 0x2, 1b, x1, 1792,0)
+
+inst_470:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:-0x55555555; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, -0x55555555, 0x6, 1b, x1, 1796,0)
+
+inst_471:
+// rs1_val==4 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x6, 0x6, 3f, x1, 1800,0)
+
+inst_472:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x33333334, 0x8, 3f, x1, 1804,0)
+
+inst_473:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x66666667; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0x66666667, 0x80, 3f, x1, 1808,0)
+
+inst_474:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:-0xb503; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, -0xb503, 0x400, 1b, x1, 1812,0)
+
+inst_475:
+// rs1_val==4 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0xb505; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4, 0xb505, 0x6, 1b, x1, 1816,0)
+
+inst_476:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x3, 0x0, 3f, x1, 1820,0)
+
+inst_477:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555555; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x55555555, 0x400, 1b, x1, 1824,0)
+
+inst_478:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, -0x55555556, 0x8, 3f, x1, 1828,0)
+
+inst_479:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x5, 0x8, 1b, x1, 1832,0)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333333; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x33333333, 0x400, 3f, x1, 1836,0)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666666; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x66666666, 0x2, 3f, x1, 1840,0)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, -0xb504, 0x8, 1b, x1, 1844,0)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb504; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0xb504, 0x556, 1b, x1, 1848,0)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x2, 0x556, 1b, x1, 1852,0)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555554; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x55555554, 0x6, 3f, x1, 1856,0)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x0, 0x200, 3f, x1, 1860,0)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x4, 0x40, 3f, x1, 1864,0)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333332; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x33333332, 0x6, 3f, x1, 1868,0)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666665; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x66666665, 0x556, 1b, x1, 1872,0)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb503; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0xb503, 0x0, 3f, x1, 1876,0)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x55555556, 0x400, 3f, x1, 1880,0)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:-0x55555555; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, -0x55555555, 0x556, 1b, x1, 1884,0)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x6, 0x10, 3f, x1, 1888,0)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x33333334; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x33333334, 0x8, 3f, x1, 1892,0)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0x66666667; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0x66666667, 0x200, 3f, x1, 1896,0)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:-0xb503; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, -0xb503, 0x8, 3f, x1, 1900,0)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x33333332; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x33333332, 0xb505, 0x400, 3f, x1, 1904,0)
+
+inst_498:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x3, 0x400, 3f, x1, 1908,0)
+
+inst_499:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555555; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x55555555, 0x10, 3f, x1, 1912,0)
+
+inst_500:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, -0x55555556, 0x6, 3f, x1, 1916,0)
+
+inst_501:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x5, 0x2, 3f, x1, 1920,0)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333333; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x33333333, 0x2, 3f, x1, 1924,0)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666666; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x66666666, 0x100, 3f, x1, 1928,0)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, -0xb504, 0x400, 3f, x1, 1932,0)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0xb504, 0x4, 3f, x1, 1936,0)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x2, 0x400, 1b, x1, 1940,0)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555554; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x55555554, 0x556, 1b, x1, 1944,0)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x0, 0x0, 3f, x1, 1948,0)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x4, 0x2, 1b, x1, 1952,0)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333332; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x33333332, 0x556, 1b, x1, 1956,0)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666665; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x66666665, 0x400, 3f, x1, 1960,0)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0xb503, 0x6, 1b, x1, 1964,0)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x55555556; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x55555556, 0x556, 1b, x1, 1968,0)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:-0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, -0x55555555, 0x20, 3f, x1, 1972,0)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x6, 0x100, 3f, x1, 1976,0)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x33333334; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x33333334, 0x200, 3f, x1, 1980,0)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0x66666667; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0x66666667, 0x40, 3f, x1, 1984,0)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:-0xb503; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, -0xb503, 0xa, 1b, x1, 1988,0)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x66666665; op2val:0xb505; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x66666665, 0xb505, 0x400, 3f, x1, 1992,0)
+
+inst_520:
+// rs1_val==46339 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x3, 0x8, 1b, x1, 1996,0)
+
+inst_521:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555555; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x55555555, 0x20, 3f, x1, 2000,0)
+
+inst_522:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555556; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, -0x55555556, 0x4, 1b, x1, 2004,0)
+
+inst_523:
+// rs1_val==46339 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x5, 0x4, 1b, x1, 2008,0)
+
+inst_524:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x33333333, 0x4, 1b, x1, 2012,0)
+
+inst_525:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666666; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x66666666, 0x80, 3f, x1, 2016,0)
+
+inst_526:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:-0xb504; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, -0xb504, 0x4, 1b, x1, 2020,0)
+
+inst_527:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0xb504; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0xb504, 0x6, 1b, x1, 2024,0)
+
+inst_528:
+// rs1_val==46339 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x2, 0x2, 1b, x1, 2028,0)
+
+inst_529:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555554; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x55555554, 0x2, 1b, x1, 2032,0)
+
+inst_530:
+// rs1_val==46339 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x0, 0x556, 1b, x1, 2036,0)
+
+inst_531:
+// rs1_val==46339 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x4, 0xa, 1b, x1, 2040,0)
+
+inst_532:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333332; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x33333332, 0x20, 3f, x1, 2044,0)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_533:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666665; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x66666665, 0x2, 3f, x1, 0,0)
+
+inst_534:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0xb503, 0x6, 1b, x1, 4,0)
+
+inst_535:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x55555556; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x55555556, 0x400, 3f, x1, 8,0)
+
+inst_536:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:-0x55555555; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, -0x55555555, 0x200, 3f, x1, 12,0)
+
+inst_537:
+// rs1_val==46339 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x6, 0x100, 3f, x1, 16,0)
+
+inst_538:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x33333334; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x33333334, 0x100, 3f, x1, 20,0)
+
+inst_539:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0x66666667; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0x66666667, 0x20, 3f, x1, 24,0)
+
+inst_540:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:-0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, -0xb503, 0x4, 3f, x1, 28,0)
+
+inst_541:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb503; op2val:0xb505; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0xb503, 0xb505, 0x0, 3f, x1, 32,0)
+
+inst_542:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x3, 0x0, 3f, x1, 36,0)
+
+inst_543:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555555; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x55555555, 0x200, 3f, x1, 40,0)
+
+inst_544:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, -0x55555556, 0x8, 3f, x1, 44,0)
+
+inst_545:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x5, 0x100, 3f, x1, 48,0)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333333; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x33333333, 0x20, 3f, x1, 52,0)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666666; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x66666666, 0x20, 3f, x1, 56,0)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb504; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, -0xb504, 0x8, 3f, x1, 60,0)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb504; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0xb504, 0x40, 3f, x1, 64,0)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x2, 0x2, 1b, x1, 68,0)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x55555554, 0x0, 3f, x1, 72,0)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x0, 0x4, 3f, x1, 76,0)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x4; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x4, 0x100, 3f, x1, 80,0)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333332; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x33333332, 0x4, 1b, x1, 84,0)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666665; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x66666665, 0x20, 3f, x1, 88,0)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb503; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0xb503, 0x20, 3f, x1, 92,0)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x55555556; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x55555556, 0x8, 3f, x1, 96,0)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:-0x55555555; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, -0x55555555, 0x8, 3f, x1, 100,0)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x6, 0x200, 3f, x1, 104,0)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x33333334; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x33333334, 0x6, 1b, x1, 108,0)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0x66666667; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0x66666667, 0x200, 3f, x1, 112,0)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:-0xb503; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, -0xb503, 0x6, 1b, x1, 116,0)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555556; op2val:0xb505; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555556, 0xb505, 0x10, 3f, x1, 120,0)
+
+inst_564:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x3; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x3, 0x40, 3f, x1, 124,0)
+
+inst_565:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555555; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x55555555, 0x0, 1b, x1, 128,0)
+
+inst_566:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555556; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, -0x55555556, 0x6, 3f, x1, 132,0)
+
+inst_567:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x5, 0x80, 3f, x1, 136,0)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333333; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x33333333, 0x200, 3f, x1, 140,0)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666666; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x66666666, 0x556, 1b, x1, 144,0)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0xb504; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, -0xb504, 0x400, 3f, x1, 148,0)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb504; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0xb504, 0x200, 3f, x1, 152,0)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x2, 0xa, 1b, x1, 156,0)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555554; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x55555554, 0x0, 1b, x1, 160,0)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x0, 0x0, 3f, x1, 164,0)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x4, 0x20, 3f, x1, 168,0)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x33333332; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x33333332, 0x2, 1b, x1, 172,0)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x66666665; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x66666665, 0x10, 3f, x1, 176,0)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0xb503; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0xb503, 0x4, 1b, x1, 180,0)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x55555556; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x55555556, 0x2, 3f, x1, 184,0)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:-0x55555555; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, -0x55555555, 0x4, 1b, x1, 188,0)
+
+inst_581:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x55555555; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, -0x55555555, 0x6, 0x2, 3f, x1, 192,0)
+
+inst_582:
+// rs1_val > 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == 1048576
+// opcode: bne, op1:x10; op2:x11; op1val:0x55555554; op2val:0x100000; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x55555554, 0x100000, 0x200, 3f, x1, 196,0)
+
+inst_583:
+// rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs2_val == -1073741825, rs1_val == 67108864
+// opcode: bne, op1:x10; op2:x11; op1val:0x4000000; op2val:-0x40000001; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x4, x10, x11, 0x4000000, -0x40000001, 0x200, 3f, x1, 200,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x5_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_1:
+ .fill 21*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 51*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/fence-01.S b/riscof/suite/rv32i_m/I/fence-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..45349b8407f830729d0d9c82c82a651042b3bae3
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/fence-01.S
@@ -0,0 +1,59 @@
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the fence instruction of the RISC-V I extension.
+//
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",fence)
+
+la x9,rvtest_data_store
+li x8, 0xffffffff
+
+sw x8, 0(x9)
+
+fence
+
+lw x3, 0(x9)
+
+la x9, signature_x9_1
+
+sw x3, 0(x9)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+.align 4
+rvtest_data_store:
+.word 0xbabecafe
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+signature_x9_1:
+ .fill 1,4,0xdeadbeef
+
+#ifdef rvtest_gpr_save
+gpr_save:
+ .fill 32*(XLEN/32), 4, 0xdeadbeef
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/jal-01.S b/riscof/suite/rv32i_m/I/jal-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..e2ab8f821977d2168c6eaf4f0be4c7ac8818f9bd
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/jal-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.0
+// timestamp : Fri Dec 4 15:11:13 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the jal instruction of the RISC-V I extension for the jal covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",jal)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rd==x21, imm_val < 0,
+// opcode: jal; dest:x21; immval:0x55556; align:0
+TEST_JAL_OP(x13, x21, 0x55556, 1b, x2, 0,0)
+
+inst_1:
+// rd==x3, imm_val > 0,
+// opcode: jal; dest:x3; immval:0x6; align:0
+TEST_JAL_OP(x13, x3, 0x6, 3f, x2, 4,0)
+
+inst_2:
+// rd==x29, imm_val == (-(2**(18))),
+// opcode: jal; dest:x29; immval:0x40000; align:0
+TEST_JAL_OP(x13, x29, 0x40000, 1b, x2, 8,0)
+
+inst_3:
+// rd==x27, imm_val == ((2**(18))),
+// opcode: jal; dest:x27; immval:0x40000; align:0
+TEST_JAL_OP(x13, x27, 0x40000, 3f, x2, 12,0)
+
+inst_4:
+// rd==x0,
+// opcode: jal; dest:x0; immval:0x0; align:0
+TEST_JAL_OP(x13, x0, 0x0, 3f, x2, 16,0)
+
+inst_5:
+// rd==x4,
+// opcode: jal; dest:x4; immval:0x0; align:0
+TEST_JAL_OP(x13, x4, 0x0, 3f, x2, 20,0)
+
+inst_6:
+// rd==x22,
+// opcode: jal; dest:x22; immval:0x0; align:0
+TEST_JAL_OP(x13, x22, 0x0, 3f, x2, 24,0)
+
+inst_7:
+// rd==x16,
+// opcode: jal; dest:x16; immval:0x0; align:0
+TEST_JAL_OP(x13, x16, 0x0, 3f, x2, 28,0)
+
+inst_8:
+// rd==x12,
+// opcode: jal; dest:x12; immval:0x0; align:0
+TEST_JAL_OP(x13, x12, 0x0, 3f, x2, 32,0)
+
+inst_9:
+// rd==x28,
+// opcode: jal; dest:x28; immval:0x0; align:0
+TEST_JAL_OP(x13, x28, 0x0, 3f, x2, 36,0)
+
+inst_10:
+// rd==x11,
+// opcode: jal; dest:x11; immval:0x0; align:0
+TEST_JAL_OP(x13, x11, 0x0, 3f, x2, 40,0)
+
+inst_11:
+// rd==x30,
+// opcode: jal; dest:x30; immval:0x0; align:0
+TEST_JAL_OP(x13, x30, 0x0, 3f, x2, 44,0)
+
+inst_12:
+// rd==x10,
+// opcode: jal; dest:x10; immval:0x0; align:0
+TEST_JAL_OP(x13, x10, 0x0, 3f, x2, 48,0)
+
+inst_13:
+// rd==x1,
+// opcode: jal; dest:x1; immval:0x0; align:0
+TEST_JAL_OP(x13, x1, 0x0, 3f, x2, 52,0)
+
+inst_14:
+// rd==x20,
+// opcode: jal; dest:x20; immval:0x0; align:0
+TEST_JAL_OP(x13, x20, 0x0, 3f, x2, 56,0)
+
+inst_15:
+// rd==x19,
+// opcode: jal; dest:x19; immval:0x0; align:0
+TEST_JAL_OP(x13, x19, 0x0, 3f, x2, 60,0)
+
+inst_16:
+// rd==x24,
+// opcode: jal; dest:x24; immval:0x0; align:0
+TEST_JAL_OP(x13, x24, 0x0, 3f, x2, 64,0)
+
+inst_17:
+// rd==x7,
+// opcode: jal; dest:x7; immval:0x0; align:0
+TEST_JAL_OP(x13, x7, 0x0, 3f, x2, 68,0)
+
+inst_18:
+// rd==x6,
+// opcode: jal; dest:x6; immval:0x0; align:0
+TEST_JAL_OP(x13, x6, 0x0, 3f, x2, 72,0)
+
+inst_19:
+// rd==x8,
+// opcode: jal; dest:x8; immval:0x0; align:0
+TEST_JAL_OP(x13, x8, 0x0, 3f, x2, 76,0)
+
+inst_20:
+// rd==x31,
+// opcode: jal; dest:x31; immval:0x0; align:0
+TEST_JAL_OP(x13, x31, 0x0, 3f, x2, 80,0)
+
+inst_21:
+// rd==x26,
+// opcode: jal; dest:x26; immval:0x0; align:0
+TEST_JAL_OP(x13, x26, 0x0, 3f, x2, 84,0)
+
+inst_22:
+// rd==x5,
+// opcode: jal; dest:x5; immval:0x0; align:0
+TEST_JAL_OP(x13, x5, 0x0, 3f, x2, 88,0)
+
+inst_23:
+// rd==x15,
+// opcode: jal; dest:x15; immval:0x0; align:0
+TEST_JAL_OP(x13, x15, 0x0, 3f, x2, 92,0)
+
+inst_24:
+// rd==x23,
+// opcode: jal; dest:x23; immval:0x0; align:0
+TEST_JAL_OP(x13, x23, 0x0, 3f, x2, 96,0)
+
+inst_25:
+// rd==x25,
+// opcode: jal; dest:x25; immval:0x0; align:0
+TEST_JAL_OP(x13, x25, 0x0, 3f, x2, 100,0)
+
+inst_26:
+// rd==x18,
+// opcode: jal; dest:x18; immval:0x0; align:0
+TEST_JAL_OP(x13, x18, 0x0, 3f, x2, 104,0)
+
+inst_27:
+// rd==x9,
+// opcode: jal; dest:x9; immval:0x0; align:0
+TEST_JAL_OP(x13, x9, 0x0, 3f, x2, 108,0)
+
+inst_28:
+// rd==x13,
+// opcode: jal; dest:x13; immval:0x0; align:0
+TEST_JAL_OP(x3, x13, 0x0, 3f, x2, 112,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_29:
+// rd==x14,
+// opcode: jal; dest:x14; immval:0x0; align:0
+TEST_JAL_OP(x3, x14, 0x0, 3f, x1, 0,0)
+
+inst_30:
+// rd==x17,
+// opcode: jal; dest:x17; immval:0x0; align:0
+TEST_JAL_OP(x3, x17, 0x0, 3f, x1, 4,0)
+
+inst_31:
+// rd==x2,
+// opcode: jal; dest:x2; immval:0x0; align:0
+TEST_JAL_OP(x3, x2, 0x0, 3f, x1, 8,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 29*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 3*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/jalr-01.S b/riscof/suite/rv32i_m/I/jalr-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..cb41239ac302ba383318d410009ad233e6eb857e
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/jalr-01.S
@@ -0,0 +1,239 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the jalr instruction of the RISC-V I extension for the jalr covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",jalr)
+
+RVTEST_SIGBASE( x10,signature_x10_1)
+
+inst_0:
+// rs1 != rd, rs1==x4, rd==x25, imm_val > 0, imm_val == 64
+// opcode: jalr; op1:x4; dest:x25; immval:0x40; align:0
+TEST_JALR_OP(x15, x25, x4, 0x40, x10, 0,0)
+
+inst_1:
+// rs1 == rd, rs1==x17, rd==x17, imm_val < 0, imm_val == -257
+// opcode: jalr; op1:x17; dest:x17; immval:-0x101; align:0
+TEST_JALR_OP(x15, x17, x17, -0x101, x10, 4,0)
+
+inst_2:
+// rs1==x3, rd==x16, imm_val == 1,
+// opcode: jalr; op1:x3; dest:x16; immval:0x1; align:0
+TEST_JALR_OP(x15, x16, x3, 0x1, x10, 8,0)
+
+inst_3:
+// rs1==x23, rd==x12, imm_val == 2,
+// opcode: jalr; op1:x23; dest:x12; immval:0x2; align:0
+TEST_JALR_OP(x15, x12, x23, 0x2, x10, 12,0)
+
+inst_4:
+// rs1==x27, rd==x13, imm_val == 4,
+// opcode: jalr; op1:x27; dest:x13; immval:0x4; align:0
+TEST_JALR_OP(x15, x13, x27, 0x4, x10, 16,0)
+
+inst_5:
+// rs1==x6, rd==x8, imm_val == 8,
+// opcode: jalr; op1:x6; dest:x8; immval:0x8; align:0
+TEST_JALR_OP(x15, x8, x6, 0x8, x10, 20,0)
+
+inst_6:
+// rs1==x12, rd==x30, imm_val == 16,
+// opcode: jalr; op1:x12; dest:x30; immval:0x10; align:0
+TEST_JALR_OP(x15, x30, x12, 0x10, x10, 24,0)
+
+inst_7:
+// rs1==x31, rd==x0, imm_val == 32,
+// opcode: jalr; op1:x31; dest:x0; immval:0x20; align:0
+TEST_JALR_OP(x15, x0, x31, 0x20, x10, 28,0)
+
+inst_8:
+// rs1==x20, rd==x3, imm_val == 128,
+// opcode: jalr; op1:x20; dest:x3; immval:0x80; align:0
+TEST_JALR_OP(x15, x3, x20, 0x80, x10, 32,0)
+
+inst_9:
+// rs1==x13, rd==x19, imm_val == 256,
+// opcode: jalr; op1:x13; dest:x19; immval:0x100; align:0
+TEST_JALR_OP(x15, x19, x13, 0x100, x10, 36,0)
+
+inst_10:
+// rs1==x8, rd==x29, imm_val == 512,
+// opcode: jalr; op1:x8; dest:x29; immval:0x200; align:0
+TEST_JALR_OP(x15, x29, x8, 0x200, x10, 40,0)
+
+inst_11:
+// rs1==x30, rd==x22, imm_val == 1024,
+// opcode: jalr; op1:x30; dest:x22; immval:0x400; align:0
+TEST_JALR_OP(x15, x22, x30, 0x400, x10, 44,0)
+
+inst_12:
+// rs1==x29, rd==x21, imm_val == -2048,
+// opcode: jalr; op1:x29; dest:x21; immval:-0x800; align:0
+TEST_JALR_OP(x15, x21, x29, -0x800, x10, 48,0)
+
+inst_13:
+// rs1==x18, rd==x11, imm_val == -2,
+// opcode: jalr; op1:x18; dest:x11; immval:-0x2; align:0
+TEST_JALR_OP(x15, x11, x18, -0x2, x10, 52,0)
+
+inst_14:
+// rs1==x21, rd==x28, imm_val == -3,
+// opcode: jalr; op1:x21; dest:x28; immval:-0x3; align:0
+TEST_JALR_OP(x15, x28, x21, -0x3, x10, 56,0)
+
+inst_15:
+// rs1==x24, rd==x14, imm_val == -5,
+// opcode: jalr; op1:x24; dest:x14; immval:-0x5; align:0
+TEST_JALR_OP(x15, x14, x24, -0x5, x10, 60,0)
+
+inst_16:
+// rs1==x2, rd==x6, imm_val == -9,
+// opcode: jalr; op1:x2; dest:x6; immval:-0x9; align:0
+TEST_JALR_OP(x15, x6, x2, -0x9, x10, 64,0)
+
+inst_17:
+// rs1==x1, rd==x5, imm_val == -17,
+// opcode: jalr; op1:x1; dest:x5; immval:-0x11; align:0
+TEST_JALR_OP(x15, x5, x1, -0x11, x10, 68,0)
+
+inst_18:
+// rs1==x5, rd==x18, imm_val == -33,
+// opcode: jalr; op1:x5; dest:x18; immval:-0x21; align:0
+TEST_JALR_OP(x15, x18, x5, -0x21, x10, 72,0)
+
+inst_19:
+// rs1==x9, rd==x7, imm_val == -65,
+// opcode: jalr; op1:x9; dest:x7; immval:-0x41; align:0
+TEST_JALR_OP(x15, x7, x9, -0x41, x10, 76,0)
+RVTEST_SIGBASE( x3,signature_x3_0)
+
+inst_20:
+// rs1==x25, rd==x10, imm_val == -129,
+// opcode: jalr; op1:x25; dest:x10; immval:-0x81; align:0
+TEST_JALR_OP(x5, x10, x25, -0x81, x3, 0,0)
+
+inst_21:
+// rs1==x11, rd==x15, imm_val == -513,
+// opcode: jalr; op1:x11; dest:x15; immval:-0x201; align:0
+TEST_JALR_OP(x5, x15, x11, -0x201, x3, 4,0)
+
+inst_22:
+// rs1==x19, rd==x9, imm_val == -1025,
+// opcode: jalr; op1:x19; dest:x9; immval:-0x401; align:0
+TEST_JALR_OP(x5, x9, x19, -0x401, x3, 8,0)
+
+inst_23:
+// rs1==x7, rd==x20, imm_val == 2047,
+// opcode: jalr; op1:x7; dest:x20; immval:0x7ff; align:0
+TEST_JALR_OP(x5, x20, x7, 0x7ff, x3, 12,0)
+
+inst_24:
+// rs1==x14, rd==x26, imm_val == 1365,
+// opcode: jalr; op1:x14; dest:x26; immval:0x555; align:0
+TEST_JALR_OP(x5, x26, x14, 0x555, x3, 16,0)
+
+inst_25:
+// rs1==x15, rd==x4, imm_val == -1366,
+// opcode: jalr; op1:x15; dest:x4; immval:-0x556; align:0
+TEST_JALR_OP(x5, x4, x15, -0x556, x3, 20,0)
+
+inst_26:
+// rs1==x22, rd==x24,
+// opcode: jalr; op1:x22; dest:x24; immval:-0x800; align:0
+TEST_JALR_OP(x5, x24, x22, -0x800, x3, 24,0)
+
+inst_27:
+// rs1==x26, rd==x23,
+// opcode: jalr; op1:x26; dest:x23; immval:-0x800; align:0
+TEST_JALR_OP(x5, x23, x26, -0x800, x3, 28,0)
+
+inst_28:
+// rs1==x28, rd==x2,
+// opcode: jalr; op1:x28; dest:x2; immval:-0x800; align:0
+TEST_JALR_OP(x5, x2, x28, -0x800, x3, 32,0)
+
+inst_29:
+// rs1==x10, rd==x1,
+// opcode: jalr; op1:x10; dest:x1; immval:-0x800; align:0
+TEST_JALR_OP(x5, x1, x10, -0x800, x3, 36,0)
+
+inst_30:
+// rs1==x16, rd==x31,
+// opcode: jalr; op1:x16; dest:x31; immval:-0x800; align:0
+TEST_JALR_OP(x5, x31, x16, -0x800, x3, 40,0)
+
+inst_31:
+// rd==x27,
+// opcode: jalr; op1:x16; dest:x27; immval:-0x800; align:0
+TEST_JALR_OP(x5, x27, x16, -0x800, x3, 44,0)
+
+inst_32:
+// imm_val == 32,
+// opcode: jalr; op1:x10; dest:x11; immval:0x20; align:0
+TEST_JALR_OP(x5, x11, x10, 0x20, x3, 48,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x10_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x10_1:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_0:
+ .fill 13*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/lb-align-01.S b/riscof/suite/rv32i_m/I/lb-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..32969ca467256fcf7aa5d7d533784bbccbb95128
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/lb-align-01.S
@@ -0,0 +1,239 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the lb instruction of the RISC-V I extension for the lb-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",lb-align)
+
+RVTEST_SIGBASE( x10,signature_x10_1)
+
+inst_0:
+// rs1 != rd, rs1==x12, rd==x20, ea_align == 0 and (imm_val % 4) == 0, imm_val < 0
+// opcode:lb op1:x12; dest:x20; immval:-0x8; align:0
+TEST_LOAD(x10,x11,0,x12,x20,-0x8,0,lb,0)
+
+inst_1:
+// rs1 == rd, rs1==x2, rd==x2, ea_align == 0 and (imm_val % 4) == 1, imm_val > 0
+// opcode:lb op1:x2; dest:x2; immval:0x555; align:0
+TEST_LOAD(x10,x11,0,x2,x2,0x555,4,lb,0)
+
+inst_2:
+// rs1==x18, rd==x16, ea_align == 0 and (imm_val % 4) == 2,
+// opcode:lb op1:x18; dest:x16; immval:0x6; align:0
+TEST_LOAD(x10,x11,0,x18,x16,0x6,8,lb,0)
+
+inst_3:
+// rs1==x23, rd==x29, ea_align == 0 and (imm_val % 4) == 3,
+// opcode:lb op1:x23; dest:x29; immval:-0x21; align:0
+TEST_LOAD(x10,x11,0,x23,x29,-0x21,12,lb,0)
+
+inst_4:
+// rs1==x1, rd==x15, ea_align == 2 and (imm_val % 4) == 0,
+// opcode:lb op1:x1; dest:x15; immval:-0x400; align:2
+TEST_LOAD(x10,x11,0,x1,x15,-0x400,16,lb,2)
+
+inst_5:
+// rs1==x8, rd==x26, ea_align == 2 and (imm_val % 4) == 1,
+// opcode:lb op1:x8; dest:x26; immval:-0x7; align:2
+TEST_LOAD(x10,x11,0,x8,x26,-0x7,20,lb,2)
+
+inst_6:
+// rs1==x3, rd==x21, ea_align == 2 and (imm_val % 4) == 2,
+// opcode:lb op1:x3; dest:x21; immval:-0xa; align:2
+TEST_LOAD(x10,x11,0,x3,x21,-0xa,24,lb,2)
+
+inst_7:
+// rs1==x9, rd==x17, ea_align == 2 and (imm_val % 4) == 3,
+// opcode:lb op1:x9; dest:x17; immval:0x7; align:2
+TEST_LOAD(x10,x11,0,x9,x17,0x7,28,lb,2)
+
+inst_8:
+// rs1==x29, rd==x0, ea_align == 1 and (imm_val % 4) == 0,
+// opcode:lb op1:x29; dest:x0; immval:-0x8; align:1
+TEST_LOAD(x10,x11,0,x29,x0,-0x8,32,lb,1)
+
+inst_9:
+// rs1==x25, rd==x30, ea_align == 1 and (imm_val % 4) == 1,
+// opcode:lb op1:x25; dest:x30; immval:0x5; align:1
+TEST_LOAD(x10,x11,0,x25,x30,0x5,36,lb,1)
+
+inst_10:
+// rs1==x21, rd==x27, imm_val == 0,
+// opcode:lb op1:x21; dest:x27; immval:0x0; align:0
+TEST_LOAD(x10,x11,0,x21,x27,0x0,40,lb,0)
+
+inst_11:
+// rs1==x6, rd==x23, ea_align == 1 and (imm_val % 4) == 2,
+// opcode:lb op1:x6; dest:x23; immval:-0x2; align:1
+TEST_LOAD(x10,x11,0,x6,x23,-0x2,44,lb,1)
+
+inst_12:
+// rs1==x4, rd==x12, ea_align == 1 and (imm_val % 4) == 3,
+// opcode:lb op1:x4; dest:x12; immval:-0x21; align:1
+TEST_LOAD(x10,x11,0,x4,x12,-0x21,48,lb,1)
+
+inst_13:
+// rs1==x22, rd==x28, ea_align == 3 and (imm_val % 4) == 0,
+// opcode:lb op1:x22; dest:x28; immval:0x0; align:3
+TEST_LOAD(x10,x11,0,x22,x28,0x0,52,lb,3)
+
+inst_14:
+// rs1==x24, rd==x31, ea_align == 3 and (imm_val % 4) == 1,
+// opcode:lb op1:x24; dest:x31; immval:0x1; align:3
+TEST_LOAD(x10,x11,0,x24,x31,0x1,56,lb,3)
+
+inst_15:
+// rs1==x28, rd==x7, ea_align == 3 and (imm_val % 4) == 2,
+// opcode:lb op1:x28; dest:x7; immval:-0x6; align:3
+TEST_LOAD(x10,x11,0,x28,x7,-0x6,60,lb,3)
+
+inst_16:
+// rs1==x16, rd==x13, ea_align == 3 and (imm_val % 4) == 3,
+// opcode:lb op1:x16; dest:x13; immval:-0x21; align:3
+TEST_LOAD(x10,x11,0,x16,x13,-0x21,64,lb,3)
+
+inst_17:
+// rs1==x5, rd==x18,
+// opcode:lb op1:x5; dest:x18; immval:-0x800; align:0
+TEST_LOAD(x10,x11,0,x5,x18,-0x800,68,lb,0)
+
+inst_18:
+// rs1==x26, rd==x14,
+// opcode:lb op1:x26; dest:x14; immval:-0x800; align:0
+TEST_LOAD(x10,x12,0,x26,x14,-0x800,72,lb,0)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_19:
+// rs1==x7, rd==x24,
+// opcode:lb op1:x7; dest:x24; immval:-0x800; align:0
+TEST_LOAD(x2,x12,0,x7,x24,-0x800,0,lb,0)
+
+inst_20:
+// rs1==x11, rd==x1,
+// opcode:lb op1:x11; dest:x1; immval:-0x800; align:0
+TEST_LOAD(x2,x12,0,x11,x1,-0x800,4,lb,0)
+
+inst_21:
+// rs1==x15, rd==x10,
+// opcode:lb op1:x15; dest:x10; immval:-0x800; align:0
+TEST_LOAD(x2,x12,0,x15,x10,-0x800,8,lb,0)
+
+inst_22:
+// rs1==x20, rd==x22,
+// opcode:lb op1:x20; dest:x22; immval:-0x800; align:0
+TEST_LOAD(x2,x12,0,x20,x22,-0x800,12,lb,0)
+
+inst_23:
+// rs1==x17, rd==x8,
+// opcode:lb op1:x17; dest:x8; immval:-0x800; align:0
+TEST_LOAD(x2,x12,0,x17,x8,-0x800,16,lb,0)
+
+inst_24:
+// rs1==x27, rd==x9,
+// opcode:lb op1:x27; dest:x9; immval:-0x800; align:0
+TEST_LOAD(x2,x12,0,x27,x9,-0x800,20,lb,0)
+
+inst_25:
+// rs1==x13, rd==x11,
+// opcode:lb op1:x13; dest:x11; immval:-0x800; align:0
+TEST_LOAD(x2,x12,0,x13,x11,-0x800,24,lb,0)
+
+inst_26:
+// rs1==x19, rd==x4,
+// opcode:lb op1:x19; dest:x4; immval:-0x800; align:0
+TEST_LOAD(x2,x12,0,x19,x4,-0x800,28,lb,0)
+
+inst_27:
+// rs1==x30, rd==x19,
+// opcode:lb op1:x30; dest:x19; immval:-0x800; align:0
+TEST_LOAD(x2,x12,0,x30,x19,-0x800,32,lb,0)
+
+inst_28:
+// rs1==x10, rd==x5,
+// opcode:lb op1:x10; dest:x5; immval:-0x800; align:0
+TEST_LOAD(x2,x12,0,x10,x5,-0x800,36,lb,0)
+
+inst_29:
+// rs1==x14, rd==x6,
+// opcode:lb op1:x14; dest:x6; immval:-0x800; align:0
+TEST_LOAD(x2,x12,0,x14,x6,-0x800,40,lb,0)
+
+inst_30:
+// rs1==x31, rd==x25,
+// opcode:lb op1:x31; dest:x25; immval:-0x800; align:0
+TEST_LOAD(x2,x12,0,x31,x25,-0x800,44,lb,0)
+
+inst_31:
+// rd==x3,
+// opcode:lb op1:x29; dest:x3; immval:-0x800; align:0
+TEST_LOAD(x2,x12,0,x29,x3,-0x800,48,lb,0)
+
+inst_32:
+// ea_align == 1 and (imm_val % 4) == 0,
+// opcode:lb op1:x10; dest:x11; immval:-0x8; align:1
+TEST_LOAD(x2,x12,0,x10,x11,-0x8,52,lb,1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x10_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x10_1:
+ .fill 19*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 14*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/lbu-align-01.S b/riscof/suite/rv32i_m/I/lbu-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..4b0514fb15c67c58896a10fe1410a0cc3db59794
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/lbu-align-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the lbu instruction of the RISC-V I extension for the lbu-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",lbu-align)
+
+RVTEST_SIGBASE( x9,signature_x9_1)
+
+inst_0:
+// rs1 != rd, rs1==x20, rd==x31, ea_align == 0 and (imm_val % 4) == 0, imm_val > 0
+// opcode:lbu op1:x20; dest:x31; immval:0x20; align:0
+TEST_LOAD(x9,x15,0,x20,x31,0x20,0,lbu,0)
+
+inst_1:
+// rs1 == rd, rs1==x22, rd==x22, ea_align == 0 and (imm_val % 4) == 1,
+// opcode:lbu op1:x22; dest:x22; immval:0x9; align:0
+TEST_LOAD(x9,x15,0,x22,x22,0x9,4,lbu,0)
+
+inst_2:
+// rs1==x7, rd==x13, ea_align == 0 and (imm_val % 4) == 2, imm_val < 0
+// opcode:lbu op1:x7; dest:x13; immval:-0xa; align:0
+TEST_LOAD(x9,x15,0,x7,x13,-0xa,8,lbu,0)
+
+inst_3:
+// rs1==x17, rd==x14, ea_align == 0 and (imm_val % 4) == 3,
+// opcode:lbu op1:x17; dest:x14; immval:-0x201; align:0
+TEST_LOAD(x9,x15,0,x17,x14,-0x201,12,lbu,0)
+
+inst_4:
+// rs1==x2, rd==x4, ea_align == 2 and (imm_val % 4) == 0,
+// opcode:lbu op1:x2; dest:x4; immval:0x400; align:2
+TEST_LOAD(x9,x15,0,x2,x4,0x400,16,lbu,2)
+
+inst_5:
+// rs1==x13, rd==x28, ea_align == 2 and (imm_val % 4) == 1,
+// opcode:lbu op1:x13; dest:x28; immval:0x9; align:2
+TEST_LOAD(x9,x15,0,x13,x28,0x9,20,lbu,2)
+
+inst_6:
+// rs1==x26, rd==x10, ea_align == 2 and (imm_val % 4) == 2,
+// opcode:lbu op1:x26; dest:x10; immval:-0x6; align:2
+TEST_LOAD(x9,x15,0,x26,x10,-0x6,24,lbu,2)
+
+inst_7:
+// rs1==x18, rd==x27, ea_align == 2 and (imm_val % 4) == 3,
+// opcode:lbu op1:x18; dest:x27; immval:0x7ff; align:2
+TEST_LOAD(x9,x15,0,x18,x27,0x7ff,28,lbu,2)
+
+inst_8:
+// rs1==x14, rd==x7, ea_align == 1 and (imm_val % 4) == 0,
+// opcode:lbu op1:x14; dest:x7; immval:0x40; align:1
+TEST_LOAD(x9,x15,0,x14,x7,0x40,32,lbu,1)
+
+inst_9:
+// rs1==x1, rd==x23, ea_align == 1 and (imm_val % 4) == 1,
+// opcode:lbu op1:x1; dest:x23; immval:0x555; align:1
+TEST_LOAD(x9,x15,0,x1,x23,0x555,36,lbu,1)
+
+inst_10:
+// rs1==x8, rd==x24, imm_val == 0,
+// opcode:lbu op1:x8; dest:x24; immval:0x0; align:0
+TEST_LOAD(x9,x15,0,x8,x24,0x0,40,lbu,0)
+
+inst_11:
+// rs1==x10, rd==x2, ea_align == 1 and (imm_val % 4) == 2,
+// opcode:lbu op1:x10; dest:x2; immval:-0x6; align:1
+TEST_LOAD(x9,x15,0,x10,x2,-0x6,44,lbu,1)
+
+inst_12:
+// rs1==x24, rd==x30, ea_align == 1 and (imm_val % 4) == 3,
+// opcode:lbu op1:x24; dest:x30; immval:-0x41; align:1
+TEST_LOAD(x9,x15,0,x24,x30,-0x41,48,lbu,1)
+
+inst_13:
+// rs1==x11, rd==x6, ea_align == 3 and (imm_val % 4) == 0,
+// opcode:lbu op1:x11; dest:x6; immval:0x8; align:3
+TEST_LOAD(x9,x15,0,x11,x6,0x8,52,lbu,3)
+
+inst_14:
+// rs1==x12, rd==x1, ea_align == 3 and (imm_val % 4) == 1,
+// opcode:lbu op1:x12; dest:x1; immval:0x555; align:3
+TEST_LOAD(x9,x15,0,x12,x1,0x555,56,lbu,3)
+
+inst_15:
+// rs1==x19, rd==x25, ea_align == 3 and (imm_val % 4) == 2,
+// opcode:lbu op1:x19; dest:x25; immval:0x2; align:3
+TEST_LOAD(x9,x15,0,x19,x25,0x2,60,lbu,3)
+
+inst_16:
+// rs1==x21, rd==x5, ea_align == 3 and (imm_val % 4) == 3,
+// opcode:lbu op1:x21; dest:x5; immval:-0x101; align:3
+TEST_LOAD(x9,x15,0,x21,x5,-0x101,64,lbu,3)
+
+inst_17:
+// rs1==x28, rd==x20,
+// opcode:lbu op1:x28; dest:x20; immval:-0x800; align:0
+TEST_LOAD(x9,x15,0,x28,x20,-0x800,68,lbu,0)
+
+inst_18:
+// rs1==x3, rd==x12,
+// opcode:lbu op1:x3; dest:x12; immval:-0x800; align:0
+TEST_LOAD(x9,x15,0,x3,x12,-0x800,72,lbu,0)
+
+inst_19:
+// rs1==x6, rd==x16,
+// opcode:lbu op1:x6; dest:x16; immval:-0x800; align:0
+TEST_LOAD(x9,x2,0,x6,x16,-0x800,76,lbu,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_20:
+// rs1==x15, rd==x21,
+// opcode:lbu op1:x15; dest:x21; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x15,x21,-0x800,0,lbu,0)
+
+inst_21:
+// rs1==x29, rd==x19,
+// opcode:lbu op1:x29; dest:x19; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x29,x19,-0x800,4,lbu,0)
+
+inst_22:
+// rs1==x25, rd==x11,
+// opcode:lbu op1:x25; dest:x11; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x25,x11,-0x800,8,lbu,0)
+
+inst_23:
+// rs1==x30, rd==x17,
+// opcode:lbu op1:x30; dest:x17; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x30,x17,-0x800,12,lbu,0)
+
+inst_24:
+// rs1==x4, rd==x18,
+// opcode:lbu op1:x4; dest:x18; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x4,x18,-0x800,16,lbu,0)
+
+inst_25:
+// rs1==x5, rd==x9,
+// opcode:lbu op1:x5; dest:x9; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x5,x9,-0x800,20,lbu,0)
+
+inst_26:
+// rs1==x31, rd==x15,
+// opcode:lbu op1:x31; dest:x15; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x31,x15,-0x800,24,lbu,0)
+
+inst_27:
+// rs1==x16, rd==x26,
+// opcode:lbu op1:x16; dest:x26; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x16,x26,-0x800,28,lbu,0)
+
+inst_28:
+// rs1==x27, rd==x8,
+// opcode:lbu op1:x27; dest:x8; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x27,x8,-0x800,32,lbu,0)
+
+inst_29:
+// rs1==x9, rd==x0,
+// opcode:lbu op1:x9; dest:x0; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x9,x0,-0x800,36,lbu,0)
+
+inst_30:
+// rs1==x23, rd==x3,
+// opcode:lbu op1:x23; dest:x3; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x23,x3,-0x800,40,lbu,0)
+
+inst_31:
+// rd==x29,
+// opcode:lbu op1:x12; dest:x29; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x12,x29,-0x800,44,lbu,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x9_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x9_1:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 12*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/lh-align-01.S b/riscof/suite/rv32i_m/I/lh-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..08c4f19bd12c9885110b8de170a25ebc52a2250f
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/lh-align-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the lh instruction of the RISC-V I extension for the lh-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",lh-align)
+
+RVTEST_SIGBASE( x3,signature_x3_1)
+
+inst_0:
+// rs1 != rd, rs1==x21, rd==x11, ea_align == 0 and (imm_val % 4) == 0, imm_val > 0
+// opcode:lh op1:x21; dest:x11; immval:0x100; align:0
+TEST_LOAD(x3,x10,0,x21,x11,0x100,0,lh,0)
+
+inst_1:
+// rs1 == rd, rs1==x31, rd==x31, ea_align == 0 and (imm_val % 4) == 1,
+// opcode:lh op1:x31; dest:x31; immval:0x5; align:0
+TEST_LOAD(x3,x10,0,x31,x31,0x5,4,lh,0)
+
+inst_2:
+// rs1==x14, rd==x1, ea_align == 0 and (imm_val % 4) == 2, imm_val < 0
+// opcode:lh op1:x14; dest:x1; immval:-0x556; align:0
+TEST_LOAD(x3,x10,0,x14,x1,-0x556,8,lh,0)
+
+inst_3:
+// rs1==x6, rd==x30, ea_align == 0 and (imm_val % 4) == 3,
+// opcode:lh op1:x6; dest:x30; immval:0x3ff; align:0
+TEST_LOAD(x3,x10,0,x6,x30,0x3ff,12,lh,0)
+
+inst_4:
+// rs1==x20, rd==x13, ea_align == 2 and (imm_val % 4) == 0,
+// opcode:lh op1:x20; dest:x13; immval:0x20; align:2
+TEST_LOAD(x3,x10,0,x20,x13,0x20,16,lh,2)
+
+inst_5:
+// rs1==x9, rd==x17, imm_val == 0,
+// opcode:lh op1:x9; dest:x17; immval:0x0; align:0
+TEST_LOAD(x3,x10,0,x9,x17,0x0,20,lh,0)
+
+inst_6:
+// rs1==x22, rd==x19, ea_align == 2 and (imm_val % 4) == 1,
+// opcode:lh op1:x22; dest:x19; immval:0x1; align:2
+TEST_LOAD(x3,x10,0,x22,x19,0x1,24,lh,2)
+
+inst_7:
+// rs1==x18, rd==x23, ea_align == 2 and (imm_val % 4) == 2,
+// opcode:lh op1:x18; dest:x23; immval:-0x2; align:2
+TEST_LOAD(x3,x10,0,x18,x23,-0x2,28,lh,2)
+
+inst_8:
+// rs1==x27, rd==x29, ea_align == 2 and (imm_val % 4) == 3,
+// opcode:lh op1:x27; dest:x29; immval:-0x1; align:2
+TEST_LOAD(x3,x10,0,x27,x29,-0x1,32,lh,2)
+
+inst_9:
+// rs1==x7, rd==x16,
+// opcode:lh op1:x7; dest:x16; immval:-0x800; align:0
+TEST_LOAD(x3,x10,0,x7,x16,-0x800,36,lh,0)
+
+inst_10:
+// rs1==x12, rd==x4,
+// opcode:lh op1:x12; dest:x4; immval:-0x800; align:0
+TEST_LOAD(x3,x10,0,x12,x4,-0x800,40,lh,0)
+
+inst_11:
+// rs1==x24, rd==x8,
+// opcode:lh op1:x24; dest:x8; immval:-0x800; align:0
+TEST_LOAD(x3,x10,0,x24,x8,-0x800,44,lh,0)
+
+inst_12:
+// rs1==x29, rd==x7,
+// opcode:lh op1:x29; dest:x7; immval:-0x800; align:0
+TEST_LOAD(x3,x10,0,x29,x7,-0x800,48,lh,0)
+
+inst_13:
+// rs1==x5, rd==x14,
+// opcode:lh op1:x5; dest:x14; immval:-0x800; align:0
+TEST_LOAD(x3,x10,0,x5,x14,-0x800,52,lh,0)
+
+inst_14:
+// rs1==x8, rd==x20,
+// opcode:lh op1:x8; dest:x20; immval:-0x800; align:0
+TEST_LOAD(x3,x10,0,x8,x20,-0x800,56,lh,0)
+
+inst_15:
+// rs1==x1, rd==x27,
+// opcode:lh op1:x1; dest:x27; immval:-0x800; align:0
+TEST_LOAD(x3,x10,0,x1,x27,-0x800,60,lh,0)
+
+inst_16:
+// rs1==x13, rd==x28,
+// opcode:lh op1:x13; dest:x28; immval:-0x800; align:0
+TEST_LOAD(x3,x10,0,x13,x28,-0x800,64,lh,0)
+
+inst_17:
+// rs1==x26, rd==x6,
+// opcode:lh op1:x26; dest:x6; immval:-0x800; align:0
+TEST_LOAD(x3,x10,0,x26,x6,-0x800,68,lh,0)
+
+inst_18:
+// rs1==x4, rd==x2,
+// opcode:lh op1:x4; dest:x2; immval:-0x800; align:0
+TEST_LOAD(x3,x10,0,x4,x2,-0x800,72,lh,0)
+
+inst_19:
+// rs1==x23, rd==x21,
+// opcode:lh op1:x23; dest:x21; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x23,x21,-0x800,76,lh,0)
+
+inst_20:
+// rs1==x2, rd==x26,
+// opcode:lh op1:x2; dest:x26; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x2,x26,-0x800,80,lh,0)
+
+inst_21:
+// rs1==x25, rd==x9,
+// opcode:lh op1:x25; dest:x9; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x25,x9,-0x800,84,lh,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_22:
+// rs1==x30, rd==x18,
+// opcode:lh op1:x30; dest:x18; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x30,x18,-0x800,0,lh,0)
+
+inst_23:
+// rs1==x10, rd==x22,
+// opcode:lh op1:x10; dest:x22; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x10,x22,-0x800,4,lh,0)
+
+inst_24:
+// rs1==x17, rd==x15,
+// opcode:lh op1:x17; dest:x15; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x17,x15,-0x800,8,lh,0)
+
+inst_25:
+// rs1==x15, rd==x24,
+// opcode:lh op1:x15; dest:x24; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x15,x24,-0x800,12,lh,0)
+
+inst_26:
+// rs1==x19, rd==x12,
+// opcode:lh op1:x19; dest:x12; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x19,x12,-0x800,16,lh,0)
+
+inst_27:
+// rs1==x28, rd==x10,
+// opcode:lh op1:x28; dest:x10; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x28,x10,-0x800,20,lh,0)
+
+inst_28:
+// rs1==x11, rd==x3,
+// opcode:lh op1:x11; dest:x3; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x11,x3,-0x800,24,lh,0)
+
+inst_29:
+// rs1==x16, rd==x25,
+// opcode:lh op1:x16; dest:x25; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x16,x25,-0x800,28,lh,0)
+
+inst_30:
+// rs1==x3, rd==x5,
+// opcode:lh op1:x3; dest:x5; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x3,x5,-0x800,32,lh,0)
+
+inst_31:
+// rd==x0,
+// opcode:lh op1:x17; dest:x0; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x17,x0,-0x800,36,lh,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x3_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 10*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/lhu-align-01.S b/riscof/suite/rv32i_m/I/lhu-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..26e519db1e851deb614dc1886ea665b102012f82
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/lhu-align-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the lhu instruction of the RISC-V I extension for the lhu-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",lhu-align)
+
+RVTEST_SIGBASE( x14,signature_x14_1)
+
+inst_0:
+// rs1 != rd, rs1==x30, rd==x0, ea_align == 0 and (imm_val % 4) == 0, imm_val > 0
+// opcode:lhu op1:x30; dest:x0; immval:0x100; align:0
+TEST_LOAD(x14,x19,0,x30,x0,0x100,0,lhu,0)
+
+inst_1:
+// rs1 == rd, rs1==x31, rd==x31, ea_align == 0 and (imm_val % 4) == 1, imm_val < 0
+// opcode:lhu op1:x31; dest:x31; immval:-0x3; align:0
+TEST_LOAD(x14,x19,0,x31,x31,-0x3,4,lhu,0)
+
+inst_2:
+// rs1==x24, rd==x2, ea_align == 0 and (imm_val % 4) == 2,
+// opcode:lhu op1:x24; dest:x2; immval:-0x2; align:0
+TEST_LOAD(x14,x19,0,x24,x2,-0x2,8,lhu,0)
+
+inst_3:
+// rs1==x26, rd==x24, ea_align == 0 and (imm_val % 4) == 3,
+// opcode:lhu op1:x26; dest:x24; immval:-0x101; align:0
+TEST_LOAD(x14,x19,0,x26,x24,-0x101,12,lhu,0)
+
+inst_4:
+// rs1==x7, rd==x3, ea_align == 2 and (imm_val % 4) == 0,
+// opcode:lhu op1:x7; dest:x3; immval:0x80; align:2
+TEST_LOAD(x14,x19,0,x7,x3,0x80,16,lhu,2)
+
+inst_5:
+// rs1==x4, rd==x25, imm_val == 0,
+// opcode:lhu op1:x4; dest:x25; immval:0x0; align:0
+TEST_LOAD(x14,x19,0,x4,x25,0x0,20,lhu,0)
+
+inst_6:
+// rs1==x18, rd==x5, ea_align == 2 and (imm_val % 4) == 1,
+// opcode:lhu op1:x18; dest:x5; immval:0x9; align:2
+TEST_LOAD(x14,x19,0,x18,x5,0x9,24,lhu,2)
+
+inst_7:
+// rs1==x3, rd==x21, ea_align == 2 and (imm_val % 4) == 2,
+// opcode:lhu op1:x3; dest:x21; immval:-0x556; align:2
+TEST_LOAD(x14,x19,0,x3,x21,-0x556,28,lhu,2)
+
+inst_8:
+// rs1==x29, rd==x4, ea_align == 2 and (imm_val % 4) == 3,
+// opcode:lhu op1:x29; dest:x4; immval:-0x21; align:2
+TEST_LOAD(x14,x19,0,x29,x4,-0x21,32,lhu,2)
+
+inst_9:
+// rs1==x11, rd==x13,
+// opcode:lhu op1:x11; dest:x13; immval:-0x800; align:0
+TEST_LOAD(x14,x19,0,x11,x13,-0x800,36,lhu,0)
+
+inst_10:
+// rs1==x21, rd==x12,
+// opcode:lhu op1:x21; dest:x12; immval:-0x800; align:0
+TEST_LOAD(x14,x19,0,x21,x12,-0x800,40,lhu,0)
+
+inst_11:
+// rs1==x6, rd==x9,
+// opcode:lhu op1:x6; dest:x9; immval:-0x800; align:0
+TEST_LOAD(x14,x19,0,x6,x9,-0x800,44,lhu,0)
+
+inst_12:
+// rs1==x1, rd==x7,
+// opcode:lhu op1:x1; dest:x7; immval:-0x800; align:0
+TEST_LOAD(x14,x19,0,x1,x7,-0x800,48,lhu,0)
+
+inst_13:
+// rs1==x10, rd==x15,
+// opcode:lhu op1:x10; dest:x15; immval:-0x800; align:0
+TEST_LOAD(x14,x19,0,x10,x15,-0x800,52,lhu,0)
+
+inst_14:
+// rs1==x15, rd==x1,
+// opcode:lhu op1:x15; dest:x1; immval:-0x800; align:0
+TEST_LOAD(x14,x19,0,x15,x1,-0x800,56,lhu,0)
+
+inst_15:
+// rs1==x28, rd==x6,
+// opcode:lhu op1:x28; dest:x6; immval:-0x800; align:0
+TEST_LOAD(x14,x19,0,x28,x6,-0x800,60,lhu,0)
+
+inst_16:
+// rs1==x16, rd==x29,
+// opcode:lhu op1:x16; dest:x29; immval:-0x800; align:0
+TEST_LOAD(x14,x19,0,x16,x29,-0x800,64,lhu,0)
+
+inst_17:
+// rs1==x13, rd==x18,
+// opcode:lhu op1:x13; dest:x18; immval:-0x800; align:0
+TEST_LOAD(x14,x19,0,x13,x18,-0x800,68,lhu,0)
+
+inst_18:
+// rs1==x8, rd==x20,
+// opcode:lhu op1:x8; dest:x20; immval:-0x800; align:0
+TEST_LOAD(x14,x19,0,x8,x20,-0x800,72,lhu,0)
+
+inst_19:
+// rs1==x22, rd==x17,
+// opcode:lhu op1:x22; dest:x17; immval:-0x800; align:0
+TEST_LOAD(x14,x19,0,x22,x17,-0x800,76,lhu,0)
+
+inst_20:
+// rs1==x9, rd==x28,
+// opcode:lhu op1:x9; dest:x28; immval:-0x800; align:0
+TEST_LOAD(x14,x3,0,x9,x28,-0x800,80,lhu,0)
+
+inst_21:
+// rs1==x25, rd==x19,
+// opcode:lhu op1:x25; dest:x19; immval:-0x800; align:0
+TEST_LOAD(x14,x3,0,x25,x19,-0x800,84,lhu,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_22:
+// rs1==x27, rd==x22,
+// opcode:lhu op1:x27; dest:x22; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x27,x22,-0x800,0,lhu,0)
+
+inst_23:
+// rs1==x2, rd==x23,
+// opcode:lhu op1:x2; dest:x23; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x2,x23,-0x800,4,lhu,0)
+
+inst_24:
+// rs1==x20, rd==x30,
+// opcode:lhu op1:x20; dest:x30; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x20,x30,-0x800,8,lhu,0)
+
+inst_25:
+// rs1==x5, rd==x26,
+// opcode:lhu op1:x5; dest:x26; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x5,x26,-0x800,12,lhu,0)
+
+inst_26:
+// rs1==x14, rd==x27,
+// opcode:lhu op1:x14; dest:x27; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x14,x27,-0x800,16,lhu,0)
+
+inst_27:
+// rs1==x23, rd==x10,
+// opcode:lhu op1:x23; dest:x10; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x23,x10,-0x800,20,lhu,0)
+
+inst_28:
+// rs1==x12, rd==x14,
+// opcode:lhu op1:x12; dest:x14; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x12,x14,-0x800,24,lhu,0)
+
+inst_29:
+// rs1==x19, rd==x8,
+// opcode:lhu op1:x19; dest:x8; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x19,x8,-0x800,28,lhu,0)
+
+inst_30:
+// rs1==x17, rd==x11,
+// opcode:lhu op1:x17; dest:x11; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x17,x11,-0x800,32,lhu,0)
+
+inst_31:
+// rd==x16,
+// opcode:lhu op1:x5; dest:x16; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x5,x16,-0x800,36,lhu,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x14_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x14_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 10*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/lui-01.S b/riscof/suite/rv32i_m/I/lui-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..9434b49457a4ed193675b9d9734d0f0d4068d44a
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/lui-01.S
@@ -0,0 +1,389 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the lui instruction of the RISC-V I extension for the lui covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",lui)
+
+RVTEST_SIGBASE( x9,signature_x9_1)
+
+inst_0:
+// rd==x8, imm_val == 0, imm_val==0
+// opcode: lui ; dest:x8; immval:0x0
+TEST_CASE(x7, x8, 0x0, x9, 0, lui x8,0x0)
+
+inst_1:
+// rd==x5, imm_val > 0, imm_val==5
+// opcode: lui ; dest:x5; immval:0x5
+TEST_CASE(x7, x5, 0x5000, x9, 4, lui x5,0x5)
+
+inst_2:
+// rd==x19, imm_val == ((2**20)-1),
+// opcode: lui ; dest:x19; immval:0xfffff
+TEST_CASE(x7, x19, -0x1000, x9, 8, lui x19,0xfffff)
+
+inst_3:
+// rd==x13, imm_val==3,
+// opcode: lui ; dest:x13; immval:0x3
+TEST_CASE(x7, x13, 0x3000, x9, 12, lui x13,0x3)
+
+inst_4:
+// rd==x0, imm_val==349525, imm_val == 349525
+// opcode: lui ; dest:x0; immval:0x55555
+TEST_CASE(x7, x0, 0, x9, 16, lui x0,0x55555)
+
+inst_5:
+// rd==x4, imm_val==699050, imm_val == 699050
+// opcode: lui ; dest:x4; immval:0xaaaaa
+TEST_CASE(x7, x4, -0x55556000, x9, 20, lui x4,0xaaaaa)
+
+inst_6:
+// rd==x22, imm_val==209715,
+// opcode: lui ; dest:x22; immval:0x33333
+TEST_CASE(x7, x22, 0x33333000, x9, 24, lui x22,0x33333)
+
+inst_7:
+// rd==x26, imm_val==419430,
+// opcode: lui ; dest:x26; immval:0x66666
+TEST_CASE(x7, x26, 0x66666000, x9, 28, lui x26,0x66666)
+
+inst_8:
+// rd==x29, imm_val==724,
+// opcode: lui ; dest:x29; immval:0x2d4
+TEST_CASE(x7, x29, 0x2d4000, x9, 32, lui x29,0x2d4)
+
+inst_9:
+// rd==x3, imm_val==1023,
+// opcode: lui ; dest:x3; immval:0x3ff
+TEST_CASE(x7, x3, 0x3ff000, x9, 36, lui x3,0x3ff)
+
+inst_10:
+// rd==x30, imm_val==2, imm_val == 2
+// opcode: lui ; dest:x30; immval:0x2
+TEST_CASE(x7, x30, 0x2000, x9, 40, lui x30,0x2)
+
+inst_11:
+// rd==x16, imm_val==349524,
+// opcode: lui ; dest:x16; immval:0x55554
+TEST_CASE(x7, x16, 0x55554000, x9, 44, lui x16,0x55554)
+
+inst_12:
+// rd==x2, imm_val==699049,
+// opcode: lui ; dest:x2; immval:0xaaaa9
+TEST_CASE(x7, x2, -0x55557000, x9, 48, lui x2,0xaaaa9)
+
+inst_13:
+// rd==x24, imm_val==4, imm_val == 4
+// opcode: lui ; dest:x24; immval:0x4
+TEST_CASE(x7, x24, 0x4000, x9, 52, lui x24,0x4)
+
+inst_14:
+// rd==x27, imm_val==209714,
+// opcode: lui ; dest:x27; immval:0x33332
+TEST_CASE(x7, x27, 0x33332000, x9, 56, lui x27,0x33332)
+
+inst_15:
+// rd==x20, imm_val==419429,
+// opcode: lui ; dest:x20; immval:0x66665
+TEST_CASE(x7, x20, 0x66665000, x9, 60, lui x20,0x66665)
+
+inst_16:
+// rd==x28, imm_val==723,
+// opcode: lui ; dest:x28; immval:0x2d3
+TEST_CASE(x7, x28, 0x2d3000, x9, 64, lui x28,0x2d3)
+
+inst_17:
+// rd==x6, imm_val==1022,
+// opcode: lui ; dest:x6; immval:0x3fe
+TEST_CASE(x7, x6, 0x3fe000, x9, 68, lui x6,0x3fe)
+
+inst_18:
+// rd==x10, imm_val==349526,
+// opcode: lui ; dest:x10; immval:0x55556
+TEST_CASE(x7, x10, 0x55556000, x9, 72, lui x10,0x55556)
+
+inst_19:
+// rd==x12, imm_val==699051,
+// opcode: lui ; dest:x12; immval:0xaaaab
+TEST_CASE(x7, x12, -0x55555000, x9, 76, lui x12,0xaaaab)
+
+inst_20:
+// rd==x15, imm_val==6,
+// opcode: lui ; dest:x15; immval:0x6
+TEST_CASE(x7, x15, 0x6000, x9, 80, lui x15,0x6)
+
+inst_21:
+// rd==x23, imm_val==209716,
+// opcode: lui ; dest:x23; immval:0x33334
+TEST_CASE(x7, x23, 0x33334000, x9, 84, lui x23,0x33334)
+
+inst_22:
+// rd==x1, imm_val==419431,
+// opcode: lui ; dest:x1; immval:0x66667
+TEST_CASE(x7, x1, 0x66667000, x9, 88, lui x1,0x66667)
+
+inst_23:
+// rd==x18, imm_val==725,
+// opcode: lui ; dest:x18; immval:0x2d5
+TEST_CASE(x7, x18, 0x2d5000, x9, 92, lui x18,0x2d5)
+
+inst_24:
+// rd==x11, imm_val==1, imm_val == 1
+// opcode: lui ; dest:x11; immval:0x1
+TEST_CASE(x7, x11, 0x1000, x9, 96, lui x11,0x1)
+
+inst_25:
+// rd==x21, imm_val==1024, imm_val == 1024
+// opcode: lui ; dest:x21; immval:0x400
+TEST_CASE(x7, x21, 0x400000, x9, 100, lui x21,0x400)
+
+inst_26:
+// rd==x17, imm_val == 8,
+// opcode: lui ; dest:x17; immval:0x8
+TEST_CASE(x7, x17, 0x8000, x9, 104, lui x17,0x8)
+
+inst_27:
+// rd==x25, imm_val == 16,
+// opcode: lui ; dest:x25; immval:0x10
+TEST_CASE(x7, x25, 0x10000, x9, 108, lui x25,0x10)
+
+inst_28:
+// rd==x7, imm_val == 32,
+// opcode: lui ; dest:x7; immval:0x20
+TEST_CASE(x2, x7, 0x20000, x9, 112, lui x7,0x20)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_29:
+// rd==x14, imm_val == 64,
+// opcode: lui ; dest:x14; immval:0x40
+TEST_CASE(x2, x14, 0x40000, x1, 0, lui x14,0x40)
+
+inst_30:
+// rd==x9, imm_val == 128,
+// opcode: lui ; dest:x9; immval:0x80
+TEST_CASE(x2, x9, 0x80000, x1, 4, lui x9,0x80)
+
+inst_31:
+// rd==x31, imm_val == 983039,
+// opcode: lui ; dest:x31; immval:0xeffff
+TEST_CASE(x2, x31, -0x10001000, x1, 8, lui x31,0xeffff)
+
+inst_32:
+// imm_val == 917503,
+// opcode: lui ; dest:x10; immval:0xdffff
+TEST_CASE(x2, x10, -0x20001000, x1, 12, lui x10,0xdffff)
+
+inst_33:
+// imm_val == 786431,
+// opcode: lui ; dest:x10; immval:0xbffff
+TEST_CASE(x2, x10, -0x40001000, x1, 16, lui x10,0xbffff)
+
+inst_34:
+// imm_val == 524287,
+// opcode: lui ; dest:x10; immval:0x7ffff
+TEST_CASE(x2, x10, 0x7ffff000, x1, 20, lui x10,0x7ffff)
+
+inst_35:
+// imm_val == 256,
+// opcode: lui ; dest:x10; immval:0x100
+TEST_CASE(x2, x10, 0x100000, x1, 24, lui x10,0x100)
+
+inst_36:
+// imm_val == 512,
+// opcode: lui ; dest:x10; immval:0x200
+TEST_CASE(x2, x10, 0x200000, x1, 28, lui x10,0x200)
+
+inst_37:
+// imm_val == 2048,
+// opcode: lui ; dest:x10; immval:0x800
+TEST_CASE(x2, x10, 0x800000, x1, 32, lui x10,0x800)
+
+inst_38:
+// imm_val == 4096,
+// opcode: lui ; dest:x10; immval:0x1000
+TEST_CASE(x2, x10, 0x1000000, x1, 36, lui x10,0x1000)
+
+inst_39:
+// imm_val == 8192,
+// opcode: lui ; dest:x10; immval:0x2000
+TEST_CASE(x2, x10, 0x2000000, x1, 40, lui x10,0x2000)
+
+inst_40:
+// imm_val == 16384,
+// opcode: lui ; dest:x10; immval:0x4000
+TEST_CASE(x2, x10, 0x4000000, x1, 44, lui x10,0x4000)
+
+inst_41:
+// imm_val == 32768,
+// opcode: lui ; dest:x10; immval:0x8000
+TEST_CASE(x2, x10, 0x8000000, x1, 48, lui x10,0x8000)
+
+inst_42:
+// imm_val == 65536,
+// opcode: lui ; dest:x10; immval:0x10000
+TEST_CASE(x2, x10, 0x10000000, x1, 52, lui x10,0x10000)
+
+inst_43:
+// imm_val == 131072,
+// opcode: lui ; dest:x10; immval:0x20000
+TEST_CASE(x2, x10, 0x20000000, x1, 56, lui x10,0x20000)
+
+inst_44:
+// imm_val == 262144,
+// opcode: lui ; dest:x10; immval:0x40000
+TEST_CASE(x2, x10, 0x40000000, x1, 60, lui x10,0x40000)
+
+inst_45:
+// imm_val == 524288,
+// opcode: lui ; dest:x10; immval:0x80000
+TEST_CASE(x2, x10, -0x80000000, x1, 64, lui x10,0x80000)
+
+inst_46:
+// imm_val == 1048574,
+// opcode: lui ; dest:x10; immval:0xffffe
+TEST_CASE(x2, x10, -0x2000, x1, 68, lui x10,0xffffe)
+
+inst_47:
+// imm_val == 1048573,
+// opcode: lui ; dest:x10; immval:0xffffd
+TEST_CASE(x2, x10, -0x3000, x1, 72, lui x10,0xffffd)
+
+inst_48:
+// imm_val == 1048571,
+// opcode: lui ; dest:x10; immval:0xffffb
+TEST_CASE(x2, x10, -0x5000, x1, 76, lui x10,0xffffb)
+
+inst_49:
+// imm_val == 1048567,
+// opcode: lui ; dest:x10; immval:0xffff7
+TEST_CASE(x2, x10, -0x9000, x1, 80, lui x10,0xffff7)
+
+inst_50:
+// imm_val == 1048559,
+// opcode: lui ; dest:x10; immval:0xfffef
+TEST_CASE(x2, x10, -0x11000, x1, 84, lui x10,0xfffef)
+
+inst_51:
+// imm_val == 1048543,
+// opcode: lui ; dest:x10; immval:0xfffdf
+TEST_CASE(x2, x10, -0x21000, x1, 88, lui x10,0xfffdf)
+
+inst_52:
+// imm_val == 1048511,
+// opcode: lui ; dest:x10; immval:0xfffbf
+TEST_CASE(x2, x10, -0x41000, x1, 92, lui x10,0xfffbf)
+
+inst_53:
+// imm_val == 1048447,
+// opcode: lui ; dest:x10; immval:0xfff7f
+TEST_CASE(x2, x10, -0x81000, x1, 96, lui x10,0xfff7f)
+
+inst_54:
+// imm_val == 1048319,
+// opcode: lui ; dest:x10; immval:0xffeff
+TEST_CASE(x2, x10, -0x101000, x1, 100, lui x10,0xffeff)
+
+inst_55:
+// imm_val == 1048063,
+// opcode: lui ; dest:x10; immval:0xffdff
+TEST_CASE(x2, x10, -0x201000, x1, 104, lui x10,0xffdff)
+
+inst_56:
+// imm_val == 1047551,
+// opcode: lui ; dest:x10; immval:0xffbff
+TEST_CASE(x2, x10, -0x401000, x1, 108, lui x10,0xffbff)
+
+inst_57:
+// imm_val == 1046527,
+// opcode: lui ; dest:x10; immval:0xff7ff
+TEST_CASE(x2, x10, -0x801000, x1, 112, lui x10,0xff7ff)
+
+inst_58:
+// imm_val == 1044479,
+// opcode: lui ; dest:x10; immval:0xfefff
+TEST_CASE(x2, x10, -0x1001000, x1, 116, lui x10,0xfefff)
+
+inst_59:
+// imm_val == 1040383,
+// opcode: lui ; dest:x10; immval:0xfdfff
+TEST_CASE(x2, x10, -0x2001000, x1, 120, lui x10,0xfdfff)
+
+inst_60:
+// imm_val == 1032191,
+// opcode: lui ; dest:x10; immval:0xfbfff
+TEST_CASE(x2, x10, -0x4001000, x1, 124, lui x10,0xfbfff)
+
+inst_61:
+// imm_val == 1015807,
+// opcode: lui ; dest:x10; immval:0xf7fff
+TEST_CASE(x2, x10, -0x8001000, x1, 128, lui x10,0xf7fff)
+
+inst_62:
+// imm_val==349525, imm_val == 349525
+// opcode: lui ; dest:x10; immval:0x55555
+TEST_CASE(x2, x10, 0x55555000, x1, 132, lui x10,0x55555)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x9_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x9_1:
+ .fill 29*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 34*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/lw-align-01.S b/riscof/suite/rv32i_m/I/lw-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..99a255f4f42c13b3639a6b71aa5910e86089c211
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/lw-align-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the lw instruction of the RISC-V I extension for the lw-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",lw-align)
+
+RVTEST_SIGBASE( x12,signature_x12_1)
+
+inst_0:
+// rs1 != rd, rs1==x6, rd==x24, ea_align == 0 and (imm_val % 4) == 0, imm_val < 0
+// opcode:lw op1:x6; dest:x24; immval:-0x4; align:0
+TEST_LOAD(x12,x17,0,x6,x24,-0x4,0,lw,0)
+
+inst_1:
+// rs1 == rd, rs1==x4, rd==x4, ea_align == 0 and (imm_val % 4) == 1,
+// opcode:lw op1:x4; dest:x4; immval:-0x3; align:0
+TEST_LOAD(x12,x17,0,x4,x4,-0x3,4,lw,0)
+
+inst_2:
+// rs1==x21, rd==x15, ea_align == 0 and (imm_val % 4) == 2,
+// opcode:lw op1:x21; dest:x15; immval:-0xa; align:0
+TEST_LOAD(x12,x17,0,x21,x15,-0xa,8,lw,0)
+
+inst_3:
+// rs1==x26, rd==x8, ea_align == 0 and (imm_val % 4) == 3, imm_val > 0
+// opcode:lw op1:x26; dest:x8; immval:0x7; align:0
+TEST_LOAD(x12,x17,0,x26,x8,0x7,12,lw,0)
+
+inst_4:
+// rs1==x27, rd==x26, imm_val == 0,
+// opcode:lw op1:x27; dest:x26; immval:0x0; align:0
+TEST_LOAD(x12,x17,0,x27,x26,0x0,16,lw,0)
+
+inst_5:
+// rs1==x20, rd==x18,
+// opcode:lw op1:x20; dest:x18; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x20,x18,-0x800,20,lw,0)
+
+inst_6:
+// rs1==x30, rd==x9,
+// opcode:lw op1:x30; dest:x9; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x30,x9,-0x800,24,lw,0)
+
+inst_7:
+// rs1==x18, rd==x11,
+// opcode:lw op1:x18; dest:x11; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x18,x11,-0x800,28,lw,0)
+
+inst_8:
+// rs1==x13, rd==x6,
+// opcode:lw op1:x13; dest:x6; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x13,x6,-0x800,32,lw,0)
+
+inst_9:
+// rs1==x14, rd==x10,
+// opcode:lw op1:x14; dest:x10; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x14,x10,-0x800,36,lw,0)
+
+inst_10:
+// rs1==x9, rd==x3,
+// opcode:lw op1:x9; dest:x3; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x9,x3,-0x800,40,lw,0)
+
+inst_11:
+// rs1==x2, rd==x31,
+// opcode:lw op1:x2; dest:x31; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x2,x31,-0x800,44,lw,0)
+
+inst_12:
+// rs1==x23, rd==x0,
+// opcode:lw op1:x23; dest:x0; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x23,x0,-0x800,48,lw,0)
+
+inst_13:
+// rs1==x3, rd==x19,
+// opcode:lw op1:x3; dest:x19; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x3,x19,-0x800,52,lw,0)
+
+inst_14:
+// rs1==x7, rd==x13,
+// opcode:lw op1:x7; dest:x13; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x7,x13,-0x800,56,lw,0)
+
+inst_15:
+// rs1==x1, rd==x7,
+// opcode:lw op1:x1; dest:x7; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x1,x7,-0x800,60,lw,0)
+
+inst_16:
+// rs1==x19, rd==x14,
+// opcode:lw op1:x19; dest:x14; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x19,x14,-0x800,64,lw,0)
+
+inst_17:
+// rs1==x8, rd==x29,
+// opcode:lw op1:x8; dest:x29; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x8,x29,-0x800,68,lw,0)
+
+inst_18:
+// rs1==x24, rd==x5,
+// opcode:lw op1:x24; dest:x5; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x24,x5,-0x800,72,lw,0)
+
+inst_19:
+// rs1==x31, rd==x16,
+// opcode:lw op1:x31; dest:x16; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x31,x16,-0x800,76,lw,0)
+
+inst_20:
+// rs1==x10, rd==x25,
+// opcode:lw op1:x10; dest:x25; immval:-0x800; align:0
+TEST_LOAD(x12,x17,0,x10,x25,-0x800,80,lw,0)
+
+inst_21:
+// rs1==x5, rd==x1,
+// opcode:lw op1:x5; dest:x1; immval:-0x800; align:0
+TEST_LOAD(x12,x3,0,x5,x1,-0x800,84,lw,0)
+
+inst_22:
+// rs1==x15, rd==x22,
+// opcode:lw op1:x15; dest:x22; immval:-0x800; align:0
+TEST_LOAD(x12,x3,0,x15,x22,-0x800,88,lw,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_23:
+// rs1==x17, rd==x27,
+// opcode:lw op1:x17; dest:x27; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x17,x27,-0x800,0,lw,0)
+
+inst_24:
+// rs1==x12, rd==x20,
+// opcode:lw op1:x12; dest:x20; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x12,x20,-0x800,4,lw,0)
+
+inst_25:
+// rs1==x28, rd==x30,
+// opcode:lw op1:x28; dest:x30; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x28,x30,-0x800,8,lw,0)
+
+inst_26:
+// rs1==x25, rd==x28,
+// opcode:lw op1:x25; dest:x28; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x25,x28,-0x800,12,lw,0)
+
+inst_27:
+// rs1==x22, rd==x12,
+// opcode:lw op1:x22; dest:x12; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x22,x12,-0x800,16,lw,0)
+
+inst_28:
+// rs1==x16, rd==x2,
+// opcode:lw op1:x16; dest:x2; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x16,x2,-0x800,20,lw,0)
+
+inst_29:
+// rs1==x29, rd==x21,
+// opcode:lw op1:x29; dest:x21; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x29,x21,-0x800,24,lw,0)
+
+inst_30:
+// rs1==x11, rd==x17,
+// opcode:lw op1:x11; dest:x17; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x11,x17,-0x800,28,lw,0)
+
+inst_31:
+// rd==x23,
+// opcode:lw op1:x12; dest:x23; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x12,x23,-0x800,32,lw,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x12_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x12_1:
+ .fill 23*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 9*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/or-01.S b/riscof/suite/rv32i_m/I/or-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..a29d8424f5f0b6ce951a139482084d4a3e020765
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/or-01.S
@@ -0,0 +1,3014 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the or instruction of the RISC-V I extension for the or covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",or)
+
+RVTEST_SIGBASE( x3,signature_x3_1)
+
+inst_0:
+// rs2 == rd != rs1, rs1==x8, rs2==x26, rd==x26, rs1_val > 0 and rs2_val > 0, rs2_val == 16, rs1_val == 1048576, rs1_val != rs2_val
+// opcode: or ; op1:x8; op2:x26; dest:x26; op1val:0x100000; op2val:0x10
+TEST_RR_OP(or, x26, x8, x26, 0x100010, 0x100000, 0x10, x3, 0, x5)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x6, rs2==x6, rd==x17, rs1_val > 0 and rs2_val < 0, rs2_val == -2049, rs1_val == 2
+// opcode: or ; op1:x6; op2:x6; dest:x17; op1val:0x2; op2val:0x2
+TEST_RR_OP(or, x17, x6, x6, 0x2, 0x2, 0x2, x3, 4, x5)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x31, rs2==x31, rd==x31, rs1_val < 0 and rs2_val < 0, rs1_val == -268435457, rs2_val == -1025
+// opcode: or ; op1:x31; op2:x31; dest:x31; op1val:-0x10000001; op2val:-0x10000001
+TEST_RR_OP(or, x31, x31, x31, 0xefffffff, -0x10000001, -0x10000001, x3, 8, x5)
+
+inst_3:
+// rs1 == rd != rs2, rs1==x27, rs2==x29, rd==x27, rs1_val < 0 and rs2_val > 0, rs1_val == -2049, rs2_val == 4194304
+// opcode: or ; op1:x27; op2:x29; dest:x27; op1val:-0x801; op2val:0x400000
+TEST_RR_OP(or, x27, x27, x29, 0xfffff7ff, -0x801, 0x400000, x3, 12, x5)
+
+inst_4:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x30, rs2==x19, rd==x18, rs1_val == rs2_val, rs2_val == -1048577, rs1_val == -1048577
+// opcode: or ; op1:x30; op2:x19; dest:x18; op1val:-0x100001; op2val:-0x100001
+TEST_RR_OP(or, x18, x30, x19, 0xffefffff, -0x100001, -0x100001, x3, 16, x5)
+
+inst_5:
+// rs1==x21, rs2==x14, rd==x9, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648, rs1_val == 131072
+// opcode: or ; op1:x21; op2:x14; dest:x9; op1val:0x20000; op2val:-0x80000000
+TEST_RR_OP(or, x9, x21, x14, 0x80020000, 0x20000, -0x80000000, x3, 20, x5)
+
+inst_6:
+// rs1==x26, rs2==x24, rd==x4, rs2_val == 0, rs1_val == -8193
+// opcode: or ; op1:x26; op2:x24; dest:x4; op1val:-0x2001; op2val:0x0
+TEST_RR_OP(or, x4, x26, x24, 0xffffdfff, -0x2001, 0x0, x3, 24, x5)
+
+inst_7:
+// rs1==x9, rs2==x8, rd==x30, rs2_val == (2**(xlen-1)-1), rs1_val == 0, rs2_val == 2147483647
+// opcode: or ; op1:x9; op2:x8; dest:x30; op1val:0x0; op2val:0x7fffffff
+TEST_RR_OP(or, x30, x9, x8, 0x7fffffff, 0x0, 0x7fffffff, x3, 28, x5)
+
+inst_8:
+// rs1==x23, rs2==x7, rd==x8, rs2_val == 1, rs1_val == -8388609
+// opcode: or ; op1:x23; op2:x7; dest:x8; op1val:-0x800001; op2val:0x1
+TEST_RR_OP(or, x8, x23, x7, 0xff7fffff, -0x800001, 0x1, x3, 32, x5)
+
+inst_9:
+// rs1==x12, rs2==x0, rd==x22, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648
+// opcode: or ; op1:x12; op2:x0; dest:x22; op1val:-0x80000000; op2val:0x0
+TEST_RR_OP(or, x22, x12, x0, 0x80000000, -0x80000000, 0x0, x3, 36, x5)
+
+inst_10:
+// rs1==x10, rs2==x30, rd==x28, rs1_val == (2**(xlen-1)-1), rs2_val == 64, rs1_val == 2147483647
+// opcode: or ; op1:x10; op2:x30; dest:x28; op1val:0x7fffffff; op2val:0x40
+TEST_RR_OP(or, x28, x10, x30, 0x7fffffff, 0x7fffffff, 0x40, x3, 40, x5)
+
+inst_11:
+// rs1==x18, rs2==x21, rd==x16, rs1_val == 1,
+// opcode: or ; op1:x18; op2:x21; dest:x16; op1val:0x1; op2val:0x55555554
+TEST_RR_OP(or, x16, x18, x21, 0x55555555, 0x1, 0x55555554, x3, 44, x5)
+
+inst_12:
+// rs1==x14, rs2==x17, rd==x12, rs2_val == 2, rs1_val == 4096
+// opcode: or ; op1:x14; op2:x17; dest:x12; op1val:0x1000; op2val:0x2
+TEST_RR_OP(or, x12, x14, x17, 0x1002, 0x1000, 0x2, x3, 48, x5)
+
+inst_13:
+// rs1==x19, rs2==x16, rd==x15, rs2_val == 4,
+// opcode: or ; op1:x19; op2:x16; dest:x15; op1val:-0x800001; op2val:0x4
+TEST_RR_OP(or, x15, x19, x16, 0xff7fffff, -0x800001, 0x4, x3, 52, x5)
+
+inst_14:
+// rs1==x4, rs2==x2, rd==x7, rs2_val == 8, rs1_val == -1025
+// opcode: or ; op1:x4; op2:x2; dest:x7; op1val:-0x401; op2val:0x8
+TEST_RR_OP(or, x7, x4, x2, 0xfffffbff, -0x401, 0x8, x3, 56, x5)
+
+inst_15:
+// rs1==x2, rs2==x22, rd==x11, rs2_val == 32,
+// opcode: or ; op1:x2; op2:x22; dest:x11; op1val:0x7fffffff; op2val:0x20
+TEST_RR_OP(or, x11, x2, x22, 0x7fffffff, 0x7fffffff, 0x20, x3, 60, x5)
+
+inst_16:
+// rs1==x28, rs2==x15, rd==x25, rs2_val == 128, rs1_val == -513
+// opcode: or ; op1:x28; op2:x15; dest:x25; op1val:-0x201; op2val:0x80
+TEST_RR_OP(or, x25, x28, x15, 0xfffffdff, -0x201, 0x80, x3, 64, x5)
+
+inst_17:
+// rs1==x25, rs2==x1, rd==x6, rs2_val == 256,
+// opcode: or ; op1:x25; op2:x1; dest:x6; op1val:0xb504; op2val:0x100
+TEST_RR_OP(or, x6, x25, x1, 0xb504, 0xb504, 0x100, x3, 68, x5)
+
+inst_18:
+// rs1==x17, rs2==x10, rd==x20, rs2_val == 512, rs1_val == 4
+// opcode: or ; op1:x17; op2:x10; dest:x20; op1val:0x4; op2val:0x200
+TEST_RR_OP(or, x20, x17, x10, 0x204, 0x4, 0x200, x3, 72, x8)
+RVTEST_SIGBASE( x6,signature_x6_0)
+
+inst_19:
+// rs1==x20, rs2==x23, rd==x5, rs2_val == 1024,
+// opcode: or ; op1:x20; op2:x23; dest:x5; op1val:-0x100001; op2val:0x400
+TEST_RR_OP(or, x5, x20, x23, 0xffefffff, -0x100001, 0x400, x6, 0, x8)
+
+inst_20:
+// rs1==x11, rs2==x12, rd==x2, rs2_val == 2048,
+// opcode: or ; op1:x11; op2:x12; dest:x2; op1val:0x0; op2val:0x800
+TEST_RR_OP(or, x2, x11, x12, 0x800, 0x0, 0x800, x6, 4, x8)
+
+inst_21:
+// rs1==x13, rs2==x20, rd==x1, rs2_val == 4096, rs1_val == -67108865
+// opcode: or ; op1:x13; op2:x20; dest:x1; op1val:-0x4000001; op2val:0x1000
+TEST_RR_OP(or, x1, x13, x20, 0xfbffffff, -0x4000001, 0x1000, x6, 8, x8)
+
+inst_22:
+// rs1==x15, rs2==x27, rd==x3, rs2_val == 8192,
+// opcode: or ; op1:x15; op2:x27; dest:x3; op1val:0x4; op2val:0x2000
+TEST_RR_OP(or, x3, x15, x27, 0x2004, 0x4, 0x2000, x6, 12, x8)
+
+inst_23:
+// rs1==x22, rs2==x4, rd==x21, rs2_val == 16384, rs1_val == -65537
+// opcode: or ; op1:x22; op2:x4; dest:x21; op1val:-0x10001; op2val:0x4000
+TEST_RR_OP(or, x21, x22, x4, 0xfffeffff, -0x10001, 0x4000, x6, 16, x8)
+
+inst_24:
+// rs1==x7, rs2==x13, rd==x19, rs2_val == 32768, rs1_val == 524288
+// opcode: or ; op1:x7; op2:x13; dest:x19; op1val:0x80000; op2val:0x8000
+TEST_RR_OP(or, x19, x7, x13, 0x88000, 0x80000, 0x8000, x6, 20, x8)
+
+inst_25:
+// rs1==x24, rs2==x5, rd==x14, rs2_val == 65536,
+// opcode: or ; op1:x24; op2:x5; dest:x14; op1val:-0x4; op2val:0x10000
+TEST_RR_OP(or, x14, x24, x5, 0xfffffffc, -0x4, 0x10000, x6, 24, x8)
+
+inst_26:
+// rs1==x16, rs2==x18, rd==x10, rs2_val == 131072, rs1_val == 1431655765
+// opcode: or ; op1:x16; op2:x18; dest:x10; op1val:0x55555555; op2val:0x20000
+TEST_RR_OP(or, x10, x16, x18, 0x55575555, 0x55555555, 0x20000, x6, 28, x8)
+
+inst_27:
+// rs1==x1, rs2==x9, rd==x23, rs2_val == 262144,
+// opcode: or ; op1:x1; op2:x9; dest:x23; op1val:-0xb504; op2val:0x40000
+TEST_RR_OP(or, x23, x1, x9, 0xffff4afc, -0xb504, 0x40000, x6, 32, x8)
+
+inst_28:
+// rs1==x3, rs2==x11, rd==x29, rs2_val == 524288,
+// opcode: or ; op1:x3; op2:x11; dest:x29; op1val:0x4; op2val:0x80000
+TEST_RR_OP(or, x29, x3, x11, 0x80004, 0x4, 0x80000, x6, 36, x8)
+
+inst_29:
+// rs1==x29, rs2==x28, rd==x13, rs2_val == 1048576, rs1_val == -4097
+// opcode: or ; op1:x29; op2:x28; dest:x13; op1val:-0x1001; op2val:0x100000
+TEST_RR_OP(or, x13, x29, x28, 0xffffefff, -0x1001, 0x100000, x6, 40, x8)
+
+inst_30:
+// rs1==x5, rs2==x3, rd==x0, rs2_val == 2097152,
+// opcode: or ; op1:x5; op2:x3; dest:x0; op1val:0x33333332; op2val:0x200000
+TEST_RR_OP(or, x0, x5, x3, 0, 0x33333332, 0x200000, x6, 44, x8)
+
+inst_31:
+// rs1==x0, rs2==x25, rd==x24, rs2_val == 8388608,
+// opcode: or ; op1:x0; op2:x25; dest:x24; op1val:0x0; op2val:0x800000
+TEST_RR_OP(or, x24, x0, x25, 0x800000, 0x0, 0x800000, x6, 48, x8)
+
+inst_32:
+// rs2_val == 16777216, rs1_val == 64
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0x1000000
+TEST_RR_OP(or, x12, x10, x11, 0x1000040, 0x40, 0x1000000, x6, 52, x8)
+
+inst_33:
+// rs2_val == 33554432, rs1_val == -9
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x2000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffff7, -0x9, 0x2000000, x6, 56, x8)
+
+inst_34:
+// rs2_val == 67108864,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4000000
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x55555556, 0x4000000, x6, 60, x8)
+
+inst_35:
+// rs2_val == 134217728, rs1_val == 16777216
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0x8000000
+TEST_RR_OP(or, x12, x10, x11, 0x9000000, 0x1000000, 0x8000000, x6, 64, x8)
+
+inst_36:
+// rs2_val == 268435456,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x6; op2val:0x10000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffa, -0x6, 0x10000000, x6, 68, x8)
+
+inst_37:
+// rs2_val == 536870912, rs1_val == -1431655766
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x20000000
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaa, -0x55555556, 0x20000000, x6, 72, x8)
+
+inst_38:
+// rs2_val == 1073741824, rs1_val == 8388608
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x40000000
+TEST_RR_OP(or, x12, x10, x11, 0x40800000, 0x800000, 0x40000000, x6, 76, x8)
+
+inst_39:
+// rs2_val == -2, rs1_val == 32
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x2
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffe, 0x20, -0x2, x6, 80, x8)
+
+inst_40:
+// rs2_val == -3, rs1_val == 268435456
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:-0x3
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffd, 0x10000000, -0x3, x6, 84, x8)
+
+inst_41:
+// rs2_val == -5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:-0x5
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffb, 0x1, -0x5, x6, 88, x8)
+
+inst_42:
+// rs2_val == -9,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:-0x9
+TEST_RR_OP(or, x12, x10, x11, 0xfffffff7, 0x80000, -0x9, x6, 92, x8)
+
+inst_43:
+// rs2_val == -17, rs1_val == 8
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:-0x11
+TEST_RR_OP(or, x12, x10, x11, 0xffffffef, 0x8, -0x11, x6, 96, x8)
+
+inst_44:
+// rs2_val == -33,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x21
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0xb504, -0x21, x6, 100, x8)
+
+inst_45:
+// rs2_val == -65,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x41
+TEST_RR_OP(or, x12, x10, x11, 0xffffffbf, 0x20000, -0x41, x6, 104, x8)
+
+inst_46:
+// rs2_val == -129, rs1_val == -2097153
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:-0x81
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x200001, -0x81, x6, 108, x8)
+
+inst_47:
+// rs2_val == -257,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x101
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, 0x33333334, -0x101, x6, 112, x8)
+
+inst_48:
+// rs2_val == -513,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffff; op2val:-0x201
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, 0x7fffffff, -0x201, x6, 116, x8)
+
+inst_49:
+// rs2_val == -4097,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x1001
+TEST_RR_OP(or, x12, x10, x11, 0xffffefff, 0x3, -0x1001, x6, 120, x8)
+
+inst_50:
+// rs2_val == -8193,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000; op2val:-0x2001
+TEST_RR_OP(or, x12, x10, x11, 0xffffdfff, -0x80000000, -0x2001, x6, 124, x8)
+
+inst_51:
+// rs2_val == -16385,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x4001
+TEST_RR_OP(or, x12, x10, x11, 0xffffbfff, 0x5, -0x4001, x6, 128, x8)
+
+inst_52:
+// rs2_val == -32769,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:-0x8001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x800001, -0x8001, x6, 132, x8)
+
+inst_53:
+// rs2_val == -65537,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:-0x10001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x9, -0x10001, x6, 136, x8)
+
+inst_54:
+// rs2_val == -131073,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x20001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0xb503, -0x20001, x6, 140, x8)
+
+inst_55:
+// rs2_val == -262145, rs1_val == -33
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x40001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x21, -0x40001, x6, 144, x8)
+
+inst_56:
+// rs2_val == -524289,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x80001
+TEST_RR_OP(or, x12, x10, x11, 0xfff7ffff, 0xb503, -0x80001, x6, 148, x8)
+
+inst_57:
+// rs2_val == -2097153,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x200001
+TEST_RR_OP(or, x12, x10, x11, 0xffdfffff, 0x55555555, -0x200001, x6, 152, x8)
+
+inst_58:
+// rs2_val == -4194305,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x400001
+TEST_RR_OP(or, x12, x10, x11, 0xffbfffff, 0x3, -0x400001, x6, 156, x8)
+
+inst_59:
+// rs2_val == -8388609, rs1_val == -257
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:-0x800001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x101, -0x800001, x6, 160, x8)
+
+inst_60:
+// rs2_val == -16777217,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x1000001
+TEST_RR_OP(or, x12, x10, x11, 0xfeffffff, 0x66666666, -0x1000001, x6, 164, x8)
+
+inst_61:
+// rs2_val == -33554433, rs1_val == -32769
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:-0x2000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x8001, -0x2000001, x6, 168, x8)
+
+inst_62:
+// rs2_val == -67108865, rs1_val == 65536
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:-0x4000001
+TEST_RR_OP(or, x12, x10, x11, 0xfbffffff, 0x10000, -0x4000001, x6, 172, x8)
+
+inst_63:
+// rs2_val == -134217729,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x8000001
+TEST_RR_OP(or, x12, x10, x11, 0xf7ffffff, 0x66666665, -0x8000001, x6, 176, x8)
+
+inst_64:
+// rs2_val == -268435457,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000; op2val:-0x10000001
+TEST_RR_OP(or, x12, x10, x11, 0xefffffff, -0x40000000, -0x10000001, x6, 180, x8)
+
+inst_65:
+// rs2_val == -536870913, rs1_val == 512
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:-0x20000001
+TEST_RR_OP(or, x12, x10, x11, 0xdfffffff, 0x200, -0x20000001, x6, 184, x8)
+
+inst_66:
+// rs2_val == -1073741825,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x40000001
+TEST_RR_OP(or, x12, x10, x11, 0xbfffffff, -0x55555555, -0x40000001, x6, 188, x8)
+
+inst_67:
+// rs2_val == 1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x4; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffd, -0x4, 0x55555555, x6, 192, x8)
+
+inst_68:
+// rs2_val == -1431655766, rs1_val == -536870913
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x20000001, -0x55555556, x6, 196, x8)
+
+inst_69:
+// rs1_val == 16,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:-0x7
+TEST_RR_OP(or, x12, x10, x11, 0xfffffff9, 0x10, -0x7, x6, 200, x8)
+
+inst_70:
+// rs1_val == 128,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:-0x7
+TEST_RR_OP(or, x12, x10, x11, 0xfffffff9, 0x80, -0x7, x6, 204, x8)
+
+inst_71:
+// rs1_val == 256,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x4000001
+TEST_RR_OP(or, x12, x10, x11, 0xfbffffff, 0x100, -0x4000001, x6, 208, x8)
+
+inst_72:
+// rs1_val == 1024,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaeaa, 0x400, -0x55555556, x6, 212, x8)
+
+inst_73:
+// rs1_val == 2048,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x200001
+TEST_RR_OP(or, x12, x10, x11, 0xffdfffff, 0x800, -0x200001, x6, 216, x8)
+
+inst_74:
+// rs1_val == 8192,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xb503, 0x2000, 0xb503, x6, 220, x8)
+
+inst_75:
+// rs1_val == 16384,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:-0x6
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffa, 0x4000, -0x6, x6, 224, x8)
+
+inst_76:
+// rs1_val == 32768,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:0x800
+TEST_RR_OP(or, x12, x10, x11, 0x8800, 0x8000, 0x800, x6, 228, x8)
+
+inst_77:
+// rs1_val == 262144,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:-0x1000001
+TEST_RR_OP(or, x12, x10, x11, 0xfeffffff, 0x40000, -0x1000001, x6, 232, x8)
+
+inst_78:
+// rs1_val == 2097152,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x200000, 0x200000, 0x0, x6, 236, x8)
+
+inst_79:
+// rs1_val == 4194304,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afd, 0x400000, -0xb503, x6, 240, x8)
+
+inst_80:
+// rs1_val == 33554432,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x3fffffff
+TEST_RR_OP(or, x12, x10, x11, 0x3fffffff, 0x2000000, 0x3fffffff, x6, 244, x8)
+
+inst_81:
+// rs1_val == 67108864,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:-0x80001
+TEST_RR_OP(or, x12, x10, x11, 0xfff7ffff, 0x4000000, -0x80001, x6, 248, x8)
+
+inst_82:
+// rs1_val == 134217728,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x20
+TEST_RR_OP(or, x12, x10, x11, 0x8000020, 0x8000000, 0x20, x6, 252, x8)
+
+inst_83:
+// rs1_val == 536870912,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:-0x2001
+TEST_RR_OP(or, x12, x10, x11, 0xffffdfff, 0x20000000, -0x2001, x6, 256, x8)
+
+inst_84:
+// rs1_val == 1073741824,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x8
+TEST_RR_OP(or, x12, x10, x11, 0x40000008, 0x40000000, 0x8, x6, 260, x8)
+
+inst_85:
+// rs1_val == -2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffe, -0x2, 0x4, x6, 264, x8)
+
+inst_86:
+// rs1_val == -3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0x8
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffd, -0x3, -0x8, x6, 268, x8)
+
+inst_87:
+// rs1_val == -5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x5, -0xb503, x6, 272, x8)
+
+inst_88:
+// rs1_val == -17,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:-0x400001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x11, -0x400001, x6, 276, x8)
+
+inst_89:
+// rs1_val == -65,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xffffffbf, -0x41, 0x5, x6, 280, x8)
+
+inst_90:
+// rs1_val == -129,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x800000
+TEST_RR_OP(or, x12, x10, x11, 0xffffff7f, -0x81, 0x800000, x6, 284, x8)
+
+inst_91:
+// rs1_val == -16385,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffffbfff, -0x4001, 0xb503, x6, 288, x8)
+
+inst_92:
+// rs1_val == -131073,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:-0x4001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x20001, -0x4001, x6, 292, x8)
+
+inst_93:
+// rs1_val == -262145,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xfffbffff, -0x40001, -0x55555556, x6, 296, x8)
+
+inst_94:
+// rs1_val == -524289,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:-0x41
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x80001, -0x41, x6, 300, x8)
+
+inst_95:
+// rs1_val == -4194305,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:-0x101
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x400001, -0x101, x6, 304, x8)
+
+inst_96:
+// rs1_val == -16777217,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xfeffffff, -0x1000001, 0x0, x6, 308, x8)
+
+inst_97:
+// rs1_val == -33554433,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xfdffffff, -0x2000001, 0x4, x6, 312, x8)
+
+inst_98:
+// rs1_val == -134217729,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x5
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x8000001, -0x5, x6, 316, x8)
+
+inst_99:
+// rs1_val == -1073741825,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:-0x40000001
+TEST_RR_OP(or, x12, x10, x11, 0xbfffffff, -0x40000001, -0x40000001, x6, 320, x8)
+
+inst_100:
+// rs1_val==3 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x3, 0x3, 0x3, x6, 324, x8)
+
+inst_101:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x3, 0x55555555, x6, 328, x8)
+
+inst_102:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaab, 0x3, -0x55555556, x6, 332, x8)
+
+inst_103:
+// rs1_val==3 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x3, 0x5, x6, 336, x8)
+
+inst_104:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x33333333, 0x3, 0x33333333, x6, 340, x8)
+
+inst_105:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x3, 0x66666666, x6, 344, x8)
+
+inst_106:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff4aff, 0x3, -0xb504, x6, 348, x8)
+
+inst_107:
+// rs1_val==3 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0x3, 0xb504, x6, 352, x8)
+
+inst_108:
+// rs1_val==3 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x3, 0x3, 0x2, x6, 356, x8)
+
+inst_109:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x3, 0x55555554, x6, 360, x8)
+
+inst_110:
+// rs1_val==3 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x3, 0x3, 0x0, x6, 364, x8)
+
+inst_111:
+// rs1_val==3 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x3, 0x4, x6, 368, x8)
+
+inst_112:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x33333333, 0x3, 0x33333332, x6, 372, x8)
+
+inst_113:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x3, 0x66666665, x6, 376, x8)
+
+inst_114:
+// rs1_val==3 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xb503, 0x3, 0xb503, x6, 380, x8)
+
+inst_115:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x3, 0x55555556, x6, 384, x8)
+
+inst_116:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaab, 0x3, -0x55555555, x6, 388, x8)
+
+inst_117:
+// rs1_val==3 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x3, 0x6, x6, 392, x8)
+
+inst_118:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x33333337, 0x3, 0x33333334, x6, 396, x8)
+
+inst_119:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x3, 0x66666667, x6, 400, x8)
+
+inst_120:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff4aff, 0x3, -0xb503, x6, 404, x8)
+
+inst_121:
+// rs1_val==3 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0x3, 0xb505, x6, 408, x8)
+
+inst_122:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x55555555, 0x3, x6, 412, x8)
+
+inst_123:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x55555555, 0x55555555, 0x55555555, x6, 416, x8)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, 0x55555555, -0x55555556, x6, 420, x8)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x55555555, 0x55555555, 0x5, x6, 424, x8)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x55555555, 0x33333333, x6, 428, x8)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x55555555, 0x66666666, x6, 432, x8)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff5ffd, 0x55555555, -0xb504, x6, 436, x8)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0x5555f555, 0x55555555, 0xb504, x6, 440, x8)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x55555555, 0x2, x6, 444, x8)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x55555555, 0x55555555, 0x55555554, x6, 448, x8)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x55555555, 0x55555555, 0x0, x6, 452, x8)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x55555555, 0x55555555, 0x4, x6, 456, x8)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x55555555, 0x33333332, x6, 460, x8)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x77777775, 0x55555555, 0x66666665, x6, 464, x8)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0x5555f557, 0x55555555, 0xb503, x6, 468, x8)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x55555555, 0x55555556, x6, 472, x8)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, 0x55555555, -0x55555555, x6, 476, x8)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x55555555, 0x6, x6, 480, x8)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x77777775, 0x55555555, 0x33333334, x6, 484, x8)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x55555555, 0x66666667, x6, 488, x8)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff5ffd, 0x55555555, -0xb503, x6, 492, x8)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0x5555f555, 0x55555555, 0xb505, x6, 496, x8)
+
+inst_144:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaab, -0x55555556, 0x3, x6, 500, x8)
+
+inst_145:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x55555556, 0x55555555, x6, 504, x8)
+
+inst_146:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaa, -0x55555556, -0x55555556, x6, 508, x8)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaf, -0x55555556, 0x5, x6, 512, x8)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbb, -0x55555556, 0x33333333, x6, 516, x8)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeee, -0x55555556, 0x66666666, x6, 520, x8)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffffeafe, -0x55555556, -0xb504, x6, 524, x8)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xaaaabfae, -0x55555556, 0xb504, x6, 528, x8)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaa, -0x55555556, 0x2, x6, 532, x8)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffe, -0x55555556, 0x55555554, x6, 536, x8)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaa, -0x55555556, 0x0, x6, 540, x8)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaae, -0x55555556, 0x4, x6, 544, x8)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbba, -0x55555556, 0x33333332, x6, 548, x8)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeef, -0x55555556, 0x66666665, x6, 552, x8)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xaaaabfab, -0x55555556, 0xb503, x6, 556, x8)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffe, -0x55555556, 0x55555556, x6, 560, x8)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaab, -0x55555556, -0x55555555, x6, 564, x8)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaae, -0x55555556, 0x6, x6, 568, x8)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbe, -0x55555556, 0x33333334, x6, 572, x8)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeef, -0x55555556, 0x66666667, x6, 576, x8)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffffeaff, -0x55555556, -0xb503, x6, 580, x8)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0xaaaabfaf, -0x55555556, 0xb505, x6, 584, x8)
+
+inst_166:
+// rs1_val==5 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x5, 0x3, x6, 588, x8)
+
+inst_167:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x55555555, 0x5, 0x55555555, x6, 592, x8)
+
+inst_168:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaf, 0x5, -0x55555556, x6, 596, x8)
+
+inst_169:
+// rs1_val==5 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x5, 0x5, 0x5, x6, 600, x8)
+
+inst_170:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x33333337, 0x5, 0x33333333, x6, 604, x8)
+
+inst_171:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x5, 0x66666666, x6, 608, x8)
+
+inst_172:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afd, 0x5, -0xb504, x6, 612, x8)
+
+inst_173:
+// rs1_val==5 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xb505, 0x5, 0xb504, x6, 616, x8)
+
+inst_174:
+// rs1_val==5 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x5, 0x2, x6, 620, x8)
+
+inst_175:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x55555555, 0x5, 0x55555554, x6, 624, x8)
+
+inst_176:
+// rs1_val==5 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x5, 0x5, 0x0, x6, 628, x8)
+
+inst_177:
+// rs1_val==5 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x5, 0x5, 0x4, x6, 632, x8)
+
+inst_178:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x33333337, 0x5, 0x33333332, x6, 636, x8)
+
+inst_179:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x66666665, 0x5, 0x66666665, x6, 640, x8)
+
+inst_180:
+// rs1_val==5 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0x5, 0xb503, x6, 644, x8)
+
+inst_181:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x5, 0x55555556, x6, 648, x8)
+
+inst_182:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaf, 0x5, -0x55555555, x6, 652, x8)
+
+inst_183:
+// rs1_val==5 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x5, 0x6, x6, 656, x8)
+
+inst_184:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x33333335, 0x5, 0x33333334, x6, 660, x8)
+
+inst_185:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x5, 0x66666667, x6, 664, x8)
+
+inst_186:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afd, 0x5, -0xb503, x6, 668, x8)
+
+inst_187:
+// rs1_val==5 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0xb505, 0x5, 0xb505, x6, 672, x8)
+
+inst_188:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x33333333, 0x33333333, 0x3, x6, 676, x8)
+
+inst_189:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x33333333, 0x55555555, x6, 680, x8)
+
+inst_190:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbb, 0x33333333, -0x55555556, x6, 684, x8)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x33333337, 0x33333333, 0x5, x6, 688, x8)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x33333333, 0x33333333, 0x33333333, x6, 692, x8)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x33333333, 0x66666666, x6, 696, x8)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff7bff, 0x33333333, -0xb504, x6, 700, x8)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0x3333b737, 0x33333333, 0xb504, x6, 704, x8)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x33333333, 0x33333333, 0x2, x6, 708, x8)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x33333333, 0x55555554, x6, 712, x8)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x33333333, 0x33333333, 0x0, x6, 716, x8)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x33333337, 0x33333333, 0x4, x6, 720, x8)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x33333333, 0x33333333, 0x33333332, x6, 724, x8)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x33333333, 0x66666665, x6, 728, x8)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0x3333b733, 0x33333333, 0xb503, x6, 732, x8)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x33333333, 0x55555556, x6, 736, x8)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbb, 0x33333333, -0x55555555, x6, 740, x8)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x33333337, 0x33333333, 0x6, x6, 744, x8)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x33333337, 0x33333333, 0x33333334, x6, 748, x8)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x33333333, 0x66666667, x6, 752, x8)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff7bff, 0x33333333, -0xb503, x6, 756, x8)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0x3333b737, 0x33333333, 0xb505, x6, 760, x8)
+
+inst_210:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666666, 0x3, x6, 764, x8)
+
+inst_211:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x66666666, 0x55555555, x6, 768, x8)
+
+inst_212:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeee, 0x66666666, -0x55555556, x6, 772, x8)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666666, 0x5, x6, 776, x8)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x66666666, 0x33333333, x6, 780, x8)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x66666666, 0x66666666, 0x66666666, x6, 784, x8)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff6efe, 0x66666666, -0xb504, x6, 788, x8)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0x6666f766, 0x66666666, 0xb504, x6, 792, x8)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x66666666, 0x66666666, 0x2, x6, 796, x8)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x66666666, 0x55555554, x6, 800, x8)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x66666666, 0x66666666, 0x0, x6, 804, x8)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x66666666, 0x66666666, 0x4, x6, 808, x8)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x66666666, 0x33333332, x6, 812, x8)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666666, 0x66666665, x6, 816, x8)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0x6666f767, 0x66666666, 0xb503, x6, 820, x8)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x66666666, 0x55555556, x6, 824, x8)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeef, 0x66666666, -0x55555555, x6, 828, x8)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x66666666, 0x66666666, 0x6, x6, 832, x8)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x66666666, 0x33333334, x6, 836, x8)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666666, 0x66666667, x6, 840, x8)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff6eff, 0x66666666, -0xb503, x6, 844, x8)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0x6666f767, 0x66666666, 0xb505, x6, 848, x8)
+
+inst_232:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xffff4aff, -0xb504, 0x3, x6, 852, x8)
+
+inst_233:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xffff5ffd, -0xb504, 0x55555555, x6, 856, x8)
+
+inst_234:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xffffeafe, -0xb504, -0x55555556, x6, 860, x8)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afd, -0xb504, 0x5, x6, 864, x8)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0xffff7bff, -0xb504, 0x33333333, x6, 868, x8)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0xffff6efe, -0xb504, 0x66666666, x6, 872, x8)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afc, -0xb504, -0xb504, x6, 876, x8)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffc, -0xb504, 0xb504, x6, 880, x8)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afe, -0xb504, 0x2, x6, 884, x8)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0xffff5ffc, -0xb504, 0x55555554, x6, 888, x8)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afc, -0xb504, 0x0, x6, 892, x8)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afc, -0xb504, 0x4, x6, 896, x8)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0xffff7bfe, -0xb504, 0x33333332, x6, 900, x8)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0xffff6efd, -0xb504, 0x66666665, x6, 904, x8)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0xb504, 0xb503, x6, 908, x8)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xffff5ffe, -0xb504, 0x55555556, x6, 912, x8)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffeaff, -0xb504, -0x55555555, x6, 916, x8)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afe, -0xb504, 0x6, x6, 920, x8)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0xffff7bfc, -0xb504, 0x33333334, x6, 924, x8)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0xffff6eff, -0xb504, 0x66666667, x6, 928, x8)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afd, -0xb504, -0xb503, x6, 932, x8)
+
+inst_253:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffd, -0xb504, 0xb505, x6, 936, x8)
+
+inst_254:
+// rs1_val==46340 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0xb504, 0x3, x6, 940, x8)
+
+inst_255:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x5555f555, 0xb504, 0x55555555, x6, 944, x8)
+
+inst_256:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaabfae, 0xb504, -0x55555556, x6, 948, x8)
+
+inst_257:
+// rs1_val==46340 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xb505, 0xb504, 0x5, x6, 952, x8)
+
+inst_258:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x3333b737, 0xb504, 0x33333333, x6, 956, x8)
+
+inst_259:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x6666f766, 0xb504, 0x66666666, x6, 960, x8)
+
+inst_260:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffc, 0xb504, -0xb504, x6, 964, x8)
+
+inst_261:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xb504, 0xb504, 0xb504, x6, 968, x8)
+
+inst_262:
+// rs1_val==46340 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0xb506, 0xb504, 0x2, x6, 972, x8)
+
+inst_263:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x5555f554, 0xb504, 0x55555554, x6, 976, x8)
+
+inst_264:
+// rs1_val==46340 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xb504, 0xb504, 0x0, x6, 980, x8)
+
+inst_265:
+// rs1_val==46340 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xb504, 0xb504, 0x4, x6, 984, x8)
+
+inst_266:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x3333b736, 0xb504, 0x33333332, x6, 988, x8)
+
+inst_267:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x6666f765, 0xb504, 0x66666665, x6, 992, x8)
+
+inst_268:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0xb504, 0xb503, x6, 996, x8)
+
+inst_269:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x5555f556, 0xb504, 0x55555556, x6, 1000, x8)
+
+inst_270:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaabfaf, 0xb504, -0x55555555, x6, 1004, x8)
+
+inst_271:
+// rs1_val==46340 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xb506, 0xb504, 0x6, x6, 1008, x8)
+
+inst_272:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x3333b734, 0xb504, 0x33333334, x6, 1012, x8)
+
+inst_273:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x6666f767, 0xb504, 0x66666667, x6, 1016, x8)
+
+inst_274:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffd, 0xb504, -0xb503, x6, 1020, x8)
+
+inst_275:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0xb505, 0xb504, 0xb505, x6, 1024, x8)
+
+inst_276:
+// rs1_val==2 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x3, 0x2, 0x3, x6, 1028, x8)
+
+inst_277:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x2, 0x55555555, x6, 1032, x8)
+
+inst_278:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaa, 0x2, -0x55555556, x6, 1036, x8)
+
+inst_279:
+// rs1_val==2 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x2, 0x5, x6, 1040, x8)
+
+inst_280:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x33333333, 0x2, 0x33333333, x6, 1044, x8)
+
+inst_281:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x66666666, 0x2, 0x66666666, x6, 1048, x8)
+
+inst_282:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afe, 0x2, -0xb504, x6, 1052, x8)
+
+inst_283:
+// rs1_val==2 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xb506, 0x2, 0xb504, x6, 1056, x8)
+
+inst_284:
+// rs1_val==2 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x2, 0x2, 0x2, x6, 1060, x8)
+
+inst_285:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x2, 0x55555554, x6, 1064, x8)
+
+inst_286:
+// rs1_val==2 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x2, 0x2, 0x0, x6, 1068, x8)
+
+inst_287:
+// rs1_val==2 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x2, 0x4, x6, 1072, x8)
+
+inst_288:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x33333332, 0x2, 0x33333332, x6, 1076, x8)
+
+inst_289:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x2, 0x66666665, x6, 1080, x8)
+
+inst_290:
+// rs1_val==2 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xb503, 0x2, 0xb503, x6, 1084, x8)
+
+inst_291:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x2, 0x55555556, x6, 1088, x8)
+
+inst_292:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaab, 0x2, -0x55555555, x6, 1092, x8)
+
+inst_293:
+// rs1_val==2 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x2, 0x6, x6, 1096, x8)
+
+inst_294:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x33333336, 0x2, 0x33333334, x6, 1100, x8)
+
+inst_295:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x2, 0x66666667, x6, 1104, x8)
+
+inst_296:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff4aff, 0x2, -0xb503, x6, 1108, x8)
+
+inst_297:
+// rs1_val==2 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0x2, 0xb505, x6, 1112, x8)
+
+inst_298:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x55555554, 0x3, x6, 1116, x8)
+
+inst_299:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x55555555, 0x55555554, 0x55555555, x6, 1120, x8)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffe, 0x55555554, -0x55555556, x6, 1124, x8)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x55555555, 0x55555554, 0x5, x6, 1128, x8)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x55555554, 0x33333333, x6, 1132, x8)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x55555554, 0x66666666, x6, 1136, x8)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff5ffc, 0x55555554, -0xb504, x6, 1140, x8)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0x5555f554, 0x55555554, 0xb504, x6, 1144, x8)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x55555554, 0x2, x6, 1148, x8)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x55555554, 0x55555554, 0x55555554, x6, 1152, x8)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x55555554, 0x55555554, 0x0, x6, 1156, x8)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x55555554, 0x55555554, 0x4, x6, 1160, x8)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x55555554, 0x33333332, x6, 1164, x8)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x77777775, 0x55555554, 0x66666665, x6, 1168, x8)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0x5555f557, 0x55555554, 0xb503, x6, 1172, x8)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x55555554, 0x55555556, x6, 1176, x8)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, 0x55555554, -0x55555555, x6, 1180, x8)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x55555554, 0x6, x6, 1184, x8)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x77777774, 0x55555554, 0x33333334, x6, 1188, x8)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x55555554, 0x66666667, x6, 1192, x8)
+
+inst_318:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff5ffd, 0x55555554, -0xb503, x6, 1196, x8)
+
+inst_319:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0x5555f555, 0x55555554, 0xb505, x6, 1200, x8)
+
+inst_320:
+// rs1_val==0 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x3, 0x0, 0x3, x6, 1204, x8)
+
+inst_321:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x55555555, 0x0, 0x55555555, x6, 1208, x8)
+
+inst_322:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaa, 0x0, -0x55555556, x6, 1212, x8)
+
+inst_323:
+// rs1_val==0 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x5, 0x0, 0x5, x6, 1216, x8)
+
+inst_324:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x33333333, 0x0, 0x33333333, x6, 1220, x8)
+
+inst_325:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x66666666, 0x0, 0x66666666, x6, 1224, x8)
+
+inst_326:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afc, 0x0, -0xb504, x6, 1228, x8)
+
+inst_327:
+// rs1_val==0 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xb504, 0x0, 0xb504, x6, 1232, x8)
+
+inst_328:
+// rs1_val==0 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x2, 0x0, 0x2, x6, 1236, x8)
+
+inst_329:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaab, -0x55555555, -0x55555555, x6, 1240, x8)
+
+inst_330:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaf, -0x55555555, 0x6, x6, 1244, x8)
+
+inst_331:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbf, -0x55555555, 0x33333334, x6, 1248, x8)
+
+inst_332:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeef, -0x55555555, 0x66666667, x6, 1252, x8)
+
+inst_333:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffffeaff, -0x55555555, -0xb503, x6, 1256, x8)
+
+inst_334:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0xaaaabfaf, -0x55555555, 0xb505, x6, 1260, x8)
+
+inst_335:
+// rs1_val==6 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x6, 0x3, x6, 1264, x8)
+
+inst_336:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x6, 0x55555555, x6, 1268, x8)
+
+inst_337:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaae, 0x6, -0x55555556, x6, 1272, x8)
+
+inst_338:
+// rs1_val==6 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x6, 0x5, x6, 1276, x8)
+
+inst_339:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x33333337, 0x6, 0x33333333, x6, 1280, x8)
+
+inst_340:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x66666666, 0x6, 0x66666666, x6, 1284, x8)
+
+inst_341:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afe, 0x6, -0xb504, x6, 1288, x8)
+
+inst_342:
+// rs1_val==6 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xb506, 0x6, 0xb504, x6, 1292, x8)
+
+inst_343:
+// rs1_val==6 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x6, 0x2, x6, 1296, x8)
+
+inst_344:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x6, 0x55555554, x6, 1300, x8)
+
+inst_345:
+// rs1_val==6 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x6, 0x0, x6, 1304, x8)
+
+inst_346:
+// rs1_val==6 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x6, 0x4, x6, 1308, x8)
+
+inst_347:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x33333336, 0x6, 0x33333332, x6, 1312, x8)
+
+inst_348:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x6, 0x66666665, x6, 1316, x8)
+
+inst_349:
+// rs1_val==6 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0x6, 0xb503, x6, 1320, x8)
+
+inst_350:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x6, 0x55555556, x6, 1324, x8)
+
+inst_351:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaf, 0x6, -0x55555555, x6, 1328, x8)
+
+inst_352:
+// rs1_val==6 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x6, 0x6, x6, 1332, x8)
+
+inst_353:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x33333336, 0x6, 0x33333334, x6, 1336, x8)
+
+inst_354:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x6, 0x66666667, x6, 1340, x8)
+
+inst_355:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff4aff, 0x6, -0xb503, x6, 1344, x8)
+
+inst_356:
+// rs1_val==6 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0x6, 0xb505, x6, 1348, x8)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x33333337, 0x33333334, 0x3, x6, 1352, x8)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x77777775, 0x33333334, 0x55555555, x6, 1356, x8)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbe, 0x33333334, -0x55555556, x6, 1360, x8)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x33333335, 0x33333334, 0x5, x6, 1364, x8)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x33333337, 0x33333334, 0x33333333, x6, 1368, x8)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x33333334, 0x66666666, x6, 1372, x8)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff7bfc, 0x33333334, -0xb504, x6, 1376, x8)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0x3333b734, 0x33333334, 0xb504, x6, 1380, x8)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x33333336, 0x33333334, 0x2, x6, 1384, x8)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x77777774, 0x33333334, 0x55555554, x6, 1388, x8)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x33333334, 0x33333334, 0x0, x6, 1392, x8)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x33333334, 0x33333334, 0x4, x6, 1396, x8)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x33333336, 0x33333334, 0x33333332, x6, 1400, x8)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x77777775, 0x33333334, 0x66666665, x6, 1404, x8)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0x3333b737, 0x33333334, 0xb503, x6, 1408, x8)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x33333334, 0x55555556, x6, 1412, x8)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbf, 0x33333334, -0x55555555, x6, 1416, x8)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x33333336, 0x33333334, 0x6, x6, 1420, x8)
+
+inst_375:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x33333334, 0x33333334, 0x33333334, x6, 1424, x8)
+
+inst_376:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x33333334, 0x66666667, x6, 1428, x8)
+
+inst_377:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff7bfd, 0x33333334, -0xb503, x6, 1432, x8)
+
+inst_378:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0x3333b735, 0x33333334, 0xb505, x6, 1436, x8)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666667, 0x3, x6, 1440, x8)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x66666667, 0x55555555, x6, 1444, x8)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeef, 0x66666667, -0x55555556, x6, 1448, x8)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666667, 0x5, x6, 1452, x8)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x66666667, 0x33333333, x6, 1456, x8)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666667, 0x66666666, x6, 1460, x8)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff6eff, 0x66666667, -0xb504, x6, 1464, x8)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0x6666f767, 0x66666667, 0xb504, x6, 1468, x8)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666667, 0x2, x6, 1472, x8)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x66666667, 0x55555554, x6, 1476, x8)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666667, 0x0, x6, 1480, x8)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666667, 0x4, x6, 1484, x8)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x66666667, 0x33333332, x6, 1488, x8)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666667, 0x66666665, x6, 1492, x8)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0x6666f767, 0x66666667, 0xb503, x6, 1496, x8)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x66666667, 0x55555556, x6, 1500, x8)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeef, 0x66666667, -0x55555555, x6, 1504, x8)
+
+inst_396:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666667, 0x6, x6, 1508, x8)
+
+inst_397:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x66666667, 0x33333334, x6, 1512, x8)
+
+inst_398:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666667, 0x66666667, x6, 1516, x8)
+
+inst_399:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff6eff, 0x66666667, -0xb503, x6, 1520, x8)
+
+inst_400:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0x6666f767, 0x66666667, 0xb505, x6, 1524, x8)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xffff4aff, -0xb503, 0x3, x6, 1528, x8)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xffff5ffd, -0xb503, 0x55555555, x6, 1532, x8)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xffffeaff, -0xb503, -0x55555556, x6, 1536, x8)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afd, -0xb503, 0x5, x6, 1540, x8)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0xffff7bff, -0xb503, 0x33333333, x6, 1544, x8)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0xffff6eff, -0xb503, 0x66666666, x6, 1548, x8)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afd, -0xb503, -0xb504, x6, 1552, x8)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffd, -0xb503, 0xb504, x6, 1556, x8)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0xffff4aff, -0xb503, 0x2, x6, 1560, x8)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0xffff5ffd, -0xb503, 0x55555554, x6, 1564, x8)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afd, -0xb503, 0x0, x6, 1568, x8)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afd, -0xb503, 0x4, x6, 1572, x8)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0xffff7bff, -0xb503, 0x33333332, x6, 1576, x8)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0xffff6efd, -0xb503, 0x66666665, x6, 1580, x8)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0xb503, 0xb503, x6, 1584, x8)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xffff5fff, -0xb503, 0x55555556, x6, 1588, x8)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffeaff, -0xb503, -0x55555555, x6, 1592, x8)
+
+inst_418:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xffff4aff, -0xb503, 0x6, x6, 1596, x8)
+
+inst_419:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0xffff7bfd, -0xb503, 0x33333334, x6, 1600, x8)
+
+inst_420:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0xffff6eff, -0xb503, 0x66666667, x6, 1604, x8)
+
+inst_421:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afd, -0xb503, -0xb503, x6, 1608, x8)
+
+inst_422:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffd, -0xb503, 0xb505, x6, 1612, x8)
+
+inst_423:
+// rs1_val==46341 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0xb505, 0x3, x6, 1616, x8)
+
+inst_424:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x5555f555, 0xb505, 0x55555555, x6, 1620, x8)
+
+inst_425:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaabfaf, 0xb505, -0x55555556, x6, 1624, x8)
+
+inst_426:
+// rs1_val==46341 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xb505, 0xb505, 0x5, x6, 1628, x8)
+
+inst_427:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x3333b737, 0xb505, 0x33333333, x6, 1632, x8)
+
+inst_428:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x6666f767, 0xb505, 0x66666666, x6, 1636, x8)
+
+inst_429:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffd, 0xb505, -0xb504, x6, 1640, x8)
+
+inst_430:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xb505, 0xb505, 0xb504, x6, 1644, x8)
+
+inst_431:
+// rs1_val==46341 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0xb505, 0x2, x6, 1648, x8)
+
+inst_432:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x5555f555, 0xb505, 0x55555554, x6, 1652, x8)
+
+inst_433:
+// rs1_val==46341 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xb505, 0xb505, 0x0, x6, 1656, x8)
+
+inst_434:
+// rs1_val==46341 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xb505, 0xb505, 0x4, x6, 1660, x8)
+
+inst_435:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x3333b737, 0xb505, 0x33333332, x6, 1664, x8)
+
+inst_436:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x6666f765, 0xb505, 0x66666665, x6, 1668, x8)
+
+inst_437:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0xb505, 0xb503, x6, 1672, x8)
+
+inst_438:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x5555f557, 0xb505, 0x55555556, x6, 1676, x8)
+
+inst_439:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaabfaf, 0xb505, -0x55555555, x6, 1680, x8)
+
+inst_440:
+// rs1_val==46341 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0xb505, 0x6, x6, 1684, x8)
+
+inst_441:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x3333b735, 0xb505, 0x33333334, x6, 1688, x8)
+
+inst_442:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x6666f767, 0xb505, 0x66666667, x6, 1692, x8)
+
+inst_443:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffd, 0xb505, -0xb503, x6, 1696, x8)
+
+inst_444:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0xb505, 0xb505, 0xb505, x6, 1700, x8)
+
+inst_445:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x55555554, 0x0, 0x55555554, x6, 1704, x8)
+
+inst_446:
+// rs1_val==0 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x0, 0x0, 0x0, x6, 1708, x8)
+
+inst_447:
+// rs1_val==0 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x4, 0x0, 0x4, x6, 1712, x8)
+
+inst_448:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x33333332, 0x0, 0x33333332, x6, 1716, x8)
+
+inst_449:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x66666665, 0x0, 0x66666665, x6, 1720, x8)
+
+inst_450:
+// rs1_val==0 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xb503, 0x0, 0xb503, x6, 1724, x8)
+
+inst_451:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x0, 0x55555556, x6, 1728, x8)
+
+inst_452:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaab, 0x0, -0x55555555, x6, 1732, x8)
+
+inst_453:
+// rs1_val==0 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x0, 0x6, x6, 1736, x8)
+
+inst_454:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x33333334, 0x0, 0x33333334, x6, 1740, x8)
+
+inst_455:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x0, 0x66666667, x6, 1744, x8)
+
+inst_456:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afd, 0x0, -0xb503, x6, 1748, x8)
+
+inst_457:
+// rs1_val==0 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0xb505, 0x0, 0xb505, x6, 1752, x8)
+
+inst_458:
+// rs1_val==4 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x4, 0x3, x6, 1756, x8)
+
+inst_459:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x55555555, 0x4, 0x55555555, x6, 1760, x8)
+
+inst_460:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaae, 0x4, -0x55555556, x6, 1764, x8)
+
+inst_461:
+// rs1_val==4 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x5, 0x4, 0x5, x6, 1768, x8)
+
+inst_462:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x33333337, 0x4, 0x33333333, x6, 1772, x8)
+
+inst_463:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x66666666, 0x4, 0x66666666, x6, 1776, x8)
+
+inst_464:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afc, 0x4, -0xb504, x6, 1780, x8)
+
+inst_465:
+// rs1_val==4 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xb504, 0x4, 0xb504, x6, 1784, x8)
+
+inst_466:
+// rs1_val==4 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x4, 0x2, x6, 1788, x8)
+
+inst_467:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x55555554, 0x4, 0x55555554, x6, 1792, x8)
+
+inst_468:
+// rs1_val==4 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x4, 0x4, 0x0, x6, 1796, x8)
+
+inst_469:
+// rs1_val==4 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x4, 0x4, 0x4, x6, 1800, x8)
+
+inst_470:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x33333336, 0x4, 0x33333332, x6, 1804, x8)
+
+inst_471:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x66666665, 0x4, 0x66666665, x6, 1808, x8)
+
+inst_472:
+// rs1_val==4 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0x4, 0xb503, x6, 1812, x8)
+
+inst_473:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x4, 0x55555556, x6, 1816, x8)
+
+inst_474:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaf, 0x4, -0x55555555, x6, 1820, x8)
+
+inst_475:
+// rs1_val==4 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x4, 0x6, x6, 1824, x8)
+
+inst_476:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x33333334, 0x4, 0x33333334, x6, 1828, x8)
+
+inst_477:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x4, 0x66666667, x6, 1832, x8)
+
+inst_478:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff4afd, 0x4, -0xb503, x6, 1836, x8)
+
+inst_479:
+// rs1_val==4 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0xb505, 0x4, 0xb505, x6, 1840, x8)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x33333333, 0x33333332, 0x3, x6, 1844, x8)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x33333332, 0x55555555, x6, 1848, x8)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbba, 0x33333332, -0x55555556, x6, 1852, x8)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x33333337, 0x33333332, 0x5, x6, 1856, x8)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x33333333, 0x33333332, 0x33333333, x6, 1860, x8)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x33333332, 0x66666666, x6, 1864, x8)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff7bfe, 0x33333332, -0xb504, x6, 1868, x8)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0x3333b736, 0x33333332, 0xb504, x6, 1872, x8)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x33333332, 0x33333332, 0x2, x6, 1876, x8)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x33333332, 0x55555554, x6, 1880, x8)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x33333332, 0x33333332, 0x0, x6, 1884, x8)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x33333336, 0x33333332, 0x4, x6, 1888, x8)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x33333332, 0x33333332, 0x33333332, x6, 1892, x8)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x33333332, 0x66666665, x6, 1896, x8)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0x3333b733, 0x33333332, 0xb503, x6, 1900, x8)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x33333332, 0x55555556, x6, 1904, x8)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbb, 0x33333332, -0x55555555, x6, 1908, x8)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x33333336, 0x33333332, 0x6, x6, 1912, x8)
+
+inst_498:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x33333336, 0x33333332, 0x33333334, x6, 1916, x8)
+
+inst_499:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x33333332, 0x66666667, x6, 1920, x8)
+
+inst_500:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff7bff, 0x33333332, -0xb503, x6, 1924, x8)
+
+inst_501:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0x3333b737, 0x33333332, 0xb505, x6, 1928, x8)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666665, 0x3, x6, 1932, x8)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x77777775, 0x66666665, 0x55555555, x6, 1936, x8)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeef, 0x66666665, -0x55555556, x6, 1940, x8)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x66666665, 0x66666665, 0x5, x6, 1944, x8)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x66666665, 0x33333333, x6, 1948, x8)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666665, 0x66666666, x6, 1952, x8)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff6efd, 0x66666665, -0xb504, x6, 1956, x8)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0x6666f765, 0x66666665, 0xb504, x6, 1960, x8)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666665, 0x2, x6, 1964, x8)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x77777775, 0x66666665, 0x55555554, x6, 1968, x8)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x66666665, 0x66666665, 0x0, x6, 1972, x8)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x66666665, 0x66666665, 0x4, x6, 1976, x8)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x66666665, 0x33333332, x6, 1980, x8)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x66666665, 0x66666665, 0x66666665, x6, 1984, x8)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0x6666f767, 0x66666665, 0xb503, x6, 1988, x8)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x66666665, 0x55555556, x6, 1992, x8)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeef, 0x66666665, -0x55555555, x6, 1996, x8)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666665, 0x6, x6, 2000, x8)
+
+inst_520:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x77777775, 0x66666665, 0x33333334, x6, 2004, x8)
+
+inst_521:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x66666667, 0x66666665, 0x66666667, x6, 2008, x8)
+
+inst_522:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff6efd, 0x66666665, -0xb503, x6, 2012, x8)
+
+inst_523:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0x6666f765, 0x66666665, 0xb505, x6, 2016, x8)
+
+inst_524:
+// rs1_val==46339 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xb503, 0xb503, 0x3, x6, 2020, x8)
+
+inst_525:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x5555f557, 0xb503, 0x55555555, x6, 2024, x8)
+
+inst_526:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaabfab, 0xb503, -0x55555556, x6, 2028, x8)
+
+inst_527:
+// rs1_val==46339 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0xb503, 0x5, x6, 2032, x8)
+
+inst_528:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x3333b733, 0xb503, 0x33333333, x6, 2036, x8)
+
+inst_529:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x6666f767, 0xb503, 0x66666666, x6, 2040, x8)
+
+inst_530:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, 0xb503, -0xb504, x6, 2044, x8)
+RVTEST_SIGBASE( x6,signature_x6_1)
+
+inst_531:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0xb503, 0xb504, x6, 0, x8)
+
+inst_532:
+// rs1_val==46339 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0xb503, 0xb503, 0x2, x6, 4, x8)
+
+inst_533:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x5555f557, 0xb503, 0x55555554, x6, 8, x8)
+
+inst_534:
+// rs1_val==46339 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xb503, 0xb503, 0x0, x6, 12, x8)
+
+inst_535:
+// rs1_val==46339 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0xb503, 0x4, x6, 16, x8)
+
+inst_536:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x3333b733, 0xb503, 0x33333332, x6, 20, x8)
+
+inst_537:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x6666f767, 0xb503, 0x66666665, x6, 24, x8)
+
+inst_538:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xb503, 0xb503, 0xb503, x6, 28, x8)
+
+inst_539:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x5555f557, 0xb503, 0x55555556, x6, 32, x8)
+
+inst_540:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaabfab, 0xb503, -0x55555555, x6, 36, x8)
+
+inst_541:
+// rs1_val==46339 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0xb503, 0x6, x6, 40, x8)
+
+inst_542:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x3333b737, 0xb503, 0x33333334, x6, 44, x8)
+
+inst_543:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x6666f767, 0xb503, 0x66666667, x6, 48, x8)
+
+inst_544:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, 0xb503, -0xb503, x6, 52, x8)
+
+inst_545:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0xb507, 0xb503, 0xb505, x6, 56, x8)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x55555556, 0x3, x6, 60, x8)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x55555556, 0x55555555, x6, 64, x8)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffe, 0x55555556, -0x55555556, x6, 68, x8)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x55555557, 0x55555556, 0x5, x6, 72, x8)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x55555556, 0x33333333, x6, 76, x8)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x55555556, 0x66666666, x6, 80, x8)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffff5ffe, 0x55555556, -0xb504, x6, 84, x8)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0x5555f556, 0x55555556, 0xb504, x6, 88, x8)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x55555556, 0x2, x6, 92, x8)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x55555556, 0x55555554, x6, 96, x8)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x55555556, 0x0, x6, 100, x8)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x55555556, 0x4, x6, 104, x8)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x55555556, 0x33333332, x6, 108, x8)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x55555556, 0x66666665, x6, 112, x8)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0x5555f557, 0x55555556, 0xb503, x6, 116, x8)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x55555556, 0x55555556, x6, 120, x8)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, 0x55555556, -0x55555555, x6, 124, x8)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x55555556, 0x55555556, 0x6, x6, 128, x8)
+
+inst_564:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(or, x12, x10, x11, 0x77777776, 0x55555556, 0x33333334, x6, 132, x8)
+
+inst_565:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(or, x12, x10, x11, 0x77777777, 0x55555556, 0x66666667, x6, 136, x8)
+
+inst_566:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xffff5fff, 0x55555556, -0xb503, x6, 140, x8)
+
+inst_567:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(or, x12, x10, x11, 0x5555f557, 0x55555556, 0xb505, x6, 144, x8)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaab, -0x55555555, 0x3, x6, 148, x8)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x55555555, 0x55555555, x6, 152, x8)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaab, -0x55555555, -0x55555556, x6, 156, x8)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaf, -0x55555555, 0x5, x6, 160, x8)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333333
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbb, -0x55555555, 0x33333333, x6, 164, x8)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666666
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeef, -0x55555555, 0x66666666, x6, 168, x8)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xffffeaff, -0x55555555, -0xb504, x6, 172, x8)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb504
+TEST_RR_OP(or, x12, x10, x11, 0xaaaabfaf, -0x55555555, 0xb504, x6, 176, x8)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaab, -0x55555555, 0x2, x6, 180, x8)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555554
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x55555555, 0x55555554, x6, 184, x8)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaab, -0x55555555, 0x0, x6, 188, x8)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaf, -0x55555555, 0x4, x6, 192, x8)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333332
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbb, -0x55555555, 0x33333332, x6, 196, x8)
+
+inst_581:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666665
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeef, -0x55555555, 0x66666665, x6, 200, x8)
+
+inst_582:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb503
+TEST_RR_OP(or, x12, x10, x11, 0xaaaabfab, -0x55555555, 0xb503, x6, 204, x8)
+
+inst_583:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555556
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x55555555, 0x55555556, x6, 208, x8)
+
+inst_584:
+// rs1_val > 0 and rs2_val < 0, rs2_val == -2049, rs1_val == 2
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x801
+TEST_RR_OP(or, x12, x10, x11, 0xfffff7ff, 0x2, -0x801, x6, 212, x8)
+
+inst_585:
+// rs1_val < 0 and rs2_val < 0, rs1_val == -268435457, rs2_val == -1025
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:-0x401
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff, -0x10000001, -0x401, x6, 216, x8)
+
+inst_586:
+// rs2_val == 2097152,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x200000
+TEST_RR_OP(or, x12, x10, x11, 0x33333332, 0x33333332, 0x200000, x6, 220, x8)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x3_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_1:
+ .fill 19*(XLEN/32),4,0xdeadbeef
+
+
+signature_x6_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x6_1:
+ .fill 56*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/ori-01.S b/riscof/suite/rv32i_m/I/ori-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..2a18ff617e78756cdf5755094e00d505b7138b87
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/ori-01.S
@@ -0,0 +1,2879 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the ori instruction of the RISC-V I extension for the ori covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",ori)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rs1 != rd, rs1==x5, rd==x22, imm_val == (-2**(12-1)), imm_val == -2048, rs1_val != imm_val, rs1_val < 0 and imm_val < 0, rs1_val == -513
+// opcode: ori ; op1:x5; dest:x22; op1val:-0x201; immval:-0x800
+TEST_IMM_OP( ori, x22, x5, 0xfffffdff, -0x201, -0x800, x2, 0, x9)
+
+inst_1:
+// rs1 == rd, rs1==x27, rd==x27, imm_val == 0, rs1_val == imm_val, rs1_val == 0, rs1_val==0 and imm_val==0
+// opcode: ori ; op1:x27; dest:x27; op1val:0x0; immval:0x0
+TEST_IMM_OP( ori, x27, x27, 0x0, 0x0, 0x0, x2, 4, x9)
+
+inst_2:
+// rs1==x17, rd==x8, imm_val == (2**(12-1)-1), rs1_val > 0 and imm_val > 0, imm_val == 2047
+// opcode: ori ; op1:x17; dest:x8; op1val:0x33333334; immval:0x7ff
+TEST_IMM_OP( ori, x8, x17, 0x333337ff, 0x33333334, 0x7ff, x2, 8, x9)
+
+inst_3:
+// rs1==x20, rd==x1, imm_val == 1, rs1_val < 0 and imm_val > 0
+// opcode: ori ; op1:x20; dest:x1; op1val:-0xb504; immval:0x1
+TEST_IMM_OP( ori, x1, x20, 0xffff4afd, -0xb504, 0x1, x2, 12, x9)
+
+inst_4:
+// rs1==x12, rd==x19, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648
+// opcode: ori ; op1:x12; dest:x19; op1val:-0x80000000; immval:0x2d
+TEST_IMM_OP( ori, x19, x12, 0x8000002d, -0x80000000, 0x2d, x2, 16, x9)
+
+inst_5:
+// rs1==x8, rd==x3, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647, imm_val == 1365
+// opcode: ori ; op1:x8; dest:x3; op1val:0x7fffffff; immval:0x555
+TEST_IMM_OP( ori, x3, x8, 0x7fffffff, 0x7fffffff, 0x555, x2, 20, x9)
+
+inst_6:
+// rs1==x28, rd==x26, rs1_val == 1,
+// opcode: ori ; op1:x28; dest:x26; op1val:0x1; immval:0x667
+TEST_IMM_OP( ori, x26, x28, 0x667, 0x1, 0x667, x2, 24, x9)
+
+inst_7:
+// rs1==x16, rd==x23, rs1_val > 0 and imm_val < 0,
+// opcode: ori ; op1:x16; dest:x23; op1val:0x7; immval:-0x7
+TEST_IMM_OP( ori, x23, x16, 0xffffffff, 0x7, -0x7, x2, 28, x9)
+
+inst_8:
+// rs1==x25, rd==x31, imm_val == 2, rs1_val == 262144
+// opcode: ori ; op1:x25; dest:x31; op1val:0x40000; immval:0x2
+TEST_IMM_OP( ori, x31, x25, 0x40002, 0x40000, 0x2, x2, 32, x9)
+
+inst_9:
+// rs1==x23, rd==x11, imm_val == 4, rs1_val == 536870912
+// opcode: ori ; op1:x23; dest:x11; op1val:0x20000000; immval:0x4
+TEST_IMM_OP( ori, x11, x23, 0x20000004, 0x20000000, 0x4, x2, 36, x9)
+
+inst_10:
+// rs1==x14, rd==x17, imm_val == 8,
+// opcode: ori ; op1:x14; dest:x17; op1val:-0x201; immval:0x8
+TEST_IMM_OP( ori, x17, x14, 0xfffffdff, -0x201, 0x8, x2, 40, x9)
+
+inst_11:
+// rs1==x31, rd==x7, imm_val == 16, rs1_val == 2
+// opcode: ori ; op1:x31; dest:x7; op1val:0x2; immval:0x10
+TEST_IMM_OP( ori, x7, x31, 0x12, 0x2, 0x10, x2, 44, x9)
+
+inst_12:
+// rs1==x21, rd==x4, imm_val == 32, rs1_val == 32768
+// opcode: ori ; op1:x21; dest:x4; op1val:0x8000; immval:0x20
+TEST_IMM_OP( ori, x4, x21, 0x8020, 0x8000, 0x20, x2, 48, x9)
+
+inst_13:
+// rs1==x15, rd==x5, imm_val == 64, rs1_val == 2048
+// opcode: ori ; op1:x15; dest:x5; op1val:0x800; immval:0x40
+TEST_IMM_OP( ori, x5, x15, 0x840, 0x800, 0x40, x2, 52, x9)
+
+inst_14:
+// rs1==x30, rd==x25, imm_val == 128, rs1_val == -262145
+// opcode: ori ; op1:x30; dest:x25; op1val:-0x40001; immval:0x80
+TEST_IMM_OP( ori, x25, x30, 0xfffbffff, -0x40001, 0x80, x2, 56, x9)
+
+inst_15:
+// rs1==x11, rd==x30, imm_val == 256, rs1_val == -5
+// opcode: ori ; op1:x11; dest:x30; op1val:-0x5; immval:0x100
+TEST_IMM_OP( ori, x30, x11, 0xfffffffb, -0x5, 0x100, x2, 60, x9)
+
+inst_16:
+// rs1==x4, rd==x10, imm_val == 512, rs1_val == -524289
+// opcode: ori ; op1:x4; dest:x10; op1val:-0x80001; immval:0x200
+TEST_IMM_OP( ori, x10, x4, 0xfff7ffff, -0x80001, 0x200, x2, 64, x9)
+
+inst_17:
+// rs1==x13, rd==x0, imm_val == 1024, rs1_val == -1073741825
+// opcode: ori ; op1:x13; dest:x0; op1val:-0x40000001; immval:0x400
+TEST_IMM_OP( ori, x0, x13, 0, -0x40000001, 0x400, x2, 68, x9)
+
+inst_18:
+// rs1==x26, rd==x6, imm_val == -2, rs1_val == -33
+// opcode: ori ; op1:x26; dest:x6; op1val:-0x21; immval:-0x2
+TEST_IMM_OP( ori, x6, x26, 0xffffffff, -0x21, -0x2, x2, 72, x9)
+
+inst_19:
+// rs1==x19, rd==x18, imm_val == -3,
+// opcode: ori ; op1:x19; dest:x18; op1val:0xb503; immval:-0x3
+TEST_IMM_OP( ori, x18, x19, 0xffffffff, 0xb503, -0x3, x2, 76, x9)
+
+inst_20:
+// rs1==x7, rd==x21, imm_val == -5, rs1_val == 268435456
+// opcode: ori ; op1:x7; dest:x21; op1val:0x10000000; immval:-0x5
+TEST_IMM_OP( ori, x21, x7, 0xfffffffb, 0x10000000, -0x5, x2, 80, x5)
+
+inst_21:
+// rs1==x24, rd==x16, imm_val == -9,
+// opcode: ori ; op1:x24; dest:x16; op1val:-0x80001; immval:-0x9
+TEST_IMM_OP( ori, x16, x24, 0xffffffff, -0x80001, -0x9, x2, 84, x5)
+RVTEST_SIGBASE( x4,signature_x4_0)
+
+inst_22:
+// rs1==x0, rd==x9, imm_val == -17, rs1_val == -16385
+// opcode: ori ; op1:x0; dest:x9; op1val:0x0; immval:-0x11
+TEST_IMM_OP( ori, x9, x0, 0xffffffef, 0x0, -0x11, x4, 0, x5)
+
+inst_23:
+// rs1==x3, rd==x28, imm_val == -33, rs1_val == 8192
+// opcode: ori ; op1:x3; dest:x28; op1val:0x2000; immval:-0x21
+TEST_IMM_OP( ori, x28, x3, 0xffffffdf, 0x2000, -0x21, x4, 4, x5)
+
+inst_24:
+// rs1==x1, rd==x15, imm_val == -65,
+// opcode: ori ; op1:x1; dest:x15; op1val:0x55555556; immval:-0x41
+TEST_IMM_OP( ori, x15, x1, 0xffffffff, 0x55555556, -0x41, x4, 8, x5)
+
+inst_25:
+// rs1==x18, rd==x2, imm_val == -129,
+// opcode: ori ; op1:x18; dest:x2; op1val:-0xb504; immval:-0x81
+TEST_IMM_OP( ori, x2, x18, 0xffffffff, -0xb504, -0x81, x4, 12, x5)
+
+inst_26:
+// rs1==x22, rd==x20, imm_val == -257, rs1_val == -1431655766
+// opcode: ori ; op1:x22; dest:x20; op1val:-0x55555556; immval:-0x101
+TEST_IMM_OP( ori, x20, x22, 0xfffffeff, -0x55555556, -0x101, x4, 16, x5)
+
+inst_27:
+// rs1==x6, rd==x13, imm_val == -513, rs1_val == 16777216
+// opcode: ori ; op1:x6; dest:x13; op1val:0x1000000; immval:-0x201
+TEST_IMM_OP( ori, x13, x6, 0xfffffdff, 0x1000000, -0x201, x4, 20, x5)
+
+inst_28:
+// rs1==x29, rd==x14, imm_val == -1025,
+// opcode: ori ; op1:x29; dest:x14; op1val:0x20000000; immval:-0x401
+TEST_IMM_OP( ori, x14, x29, 0xfffffbff, 0x20000000, -0x401, x4, 24, x5)
+
+inst_29:
+// rs1==x2, rd==x12, imm_val == -1366, rs1_val==-46340 and imm_val==-1366
+// opcode: ori ; op1:x2; dest:x12; op1val:-0xb504; immval:-0x556
+TEST_IMM_OP( ori, x12, x2, 0xfffffafe, -0xb504, -0x556, x4, 28, x5)
+
+inst_30:
+// rs1==x9, rd==x24, rs1_val == 4, rs1_val==4 and imm_val==5
+// opcode: ori ; op1:x9; dest:x24; op1val:0x4; immval:0x5
+TEST_IMM_OP( ori, x24, x9, 0x5, 0x4, 0x5, x4, 32, x5)
+
+inst_31:
+// rs1==x10, rd==x29, rs1_val == 8,
+// opcode: ori ; op1:x10; dest:x29; op1val:0x8; immval:0x6
+TEST_IMM_OP( ori, x29, x10, 0xe, 0x8, 0x6, x4, 36, x5)
+
+inst_32:
+// rs1_val == 16,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x10; immval:0x200
+TEST_IMM_OP( ori, x11, x10, 0x210, 0x10, 0x200, x4, 40, x5)
+
+inst_33:
+// rs1_val == 32,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x20; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x2c, 0x20, 0x2c, x4, 44, x5)
+
+inst_34:
+// rs1_val == 64,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x40; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x43, 0x40, 0x3, x4, 48, x5)
+
+inst_35:
+// rs1_val == 128,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x80; immval:0x20
+TEST_IMM_OP( ori, x11, x10, 0xa0, 0x80, 0x20, x4, 52, x5)
+
+inst_36:
+// rs1_val == 256,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x100; immval:-0x41
+TEST_IMM_OP( ori, x11, x10, 0xffffffbf, 0x100, -0x41, x4, 56, x5)
+
+inst_37:
+// rs1_val == 512,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x200; immval:-0x6
+TEST_IMM_OP( ori, x11, x10, 0xfffffffa, 0x200, -0x6, x4, 60, x5)
+
+inst_38:
+// rs1_val == 1024,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x400; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffd3, 0x400, -0x2d, x4, 64, x5)
+
+inst_39:
+// rs1_val == 4096,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x1000; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x1005, 0x1000, 0x5, x4, 68, x5)
+
+inst_40:
+// rs1_val == 16384,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4000; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x4665, 0x4000, 0x665, x4, 72, x5)
+
+inst_41:
+// rs1_val == 65536,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x10000; immval:0x9
+TEST_IMM_OP( ori, x11, x10, 0x10009, 0x10000, 0x9, x4, 76, x5)
+
+inst_42:
+// rs1_val == 131072,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x20000; immval:0x200
+TEST_IMM_OP( ori, x11, x10, 0x20200, 0x20000, 0x200, x4, 80, x5)
+
+inst_43:
+// rs1_val == 524288,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x80000; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x80000, 0x80000, 0x0, x4, 84, x5)
+
+inst_44:
+// rs1_val == 1048576,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x100000; immval:0x200
+TEST_IMM_OP( ori, x11, x10, 0x100200, 0x100000, 0x200, x4, 88, x5)
+
+inst_45:
+// rs1_val == 2097152,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x200000; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffd4, 0x200000, -0x2c, x4, 92, x5)
+
+inst_46:
+// rs1_val == 4194304,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x400000; immval:-0x201
+TEST_IMM_OP( ori, x11, x10, 0xfffffdff, 0x400000, -0x201, x4, 96, x5)
+
+inst_47:
+// rs1_val == 8388608,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x800000; immval:0x80
+TEST_IMM_OP( ori, x11, x10, 0x800080, 0x800000, 0x80, x4, 100, x5)
+
+inst_48:
+// rs1_val == 33554432,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2000000; immval:-0x21
+TEST_IMM_OP( ori, x11, x10, 0xffffffdf, 0x2000000, -0x21, x4, 104, x5)
+
+inst_49:
+// rs1_val == 67108864,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4000000; immval:0x10
+TEST_IMM_OP( ori, x11, x10, 0x4000010, 0x4000000, 0x10, x4, 108, x5)
+
+inst_50:
+// rs1_val == 134217728,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x8000000; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x8000554, 0x8000000, 0x554, x4, 112, x5)
+
+inst_51:
+// rs1_val == 1073741824,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x40000000; immval:-0x6
+TEST_IMM_OP( ori, x11, x10, 0xfffffffa, 0x40000000, -0x6, x4, 116, x5)
+
+inst_52:
+// rs1_val == -2,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x2; immval:-0x41
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x2, -0x41, x4, 120, x5)
+
+inst_53:
+// rs1_val == -3,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x3; immval:-0x9
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x3, -0x9, x4, 124, x5)
+
+inst_54:
+// rs1_val == -9,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x9; immval:-0x800
+TEST_IMM_OP( ori, x11, x10, 0xfffffff7, -0x9, -0x800, x4, 128, x5)
+
+inst_55:
+// rs1_val == -17,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x11; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x11, -0x2d, x4, 132, x5)
+
+inst_56:
+// rs1_val == -65,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x41; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xffffffbf, -0x41, -0x556, x4, 136, x5)
+
+inst_57:
+// rs1_val == -129,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x81; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xffffff7f, -0x81, 0x665, x4, 140, x5)
+
+inst_58:
+// rs1_val == -257,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x101; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xfffffeff, -0x101, 0x666, x4, 144, x5)
+
+inst_59:
+// rs1_val == -1025,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x401; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x401, 0x666, x4, 148, x5)
+
+inst_60:
+// rs1_val == -2049,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x801; immval:0x7ff
+TEST_IMM_OP( ori, x11, x10, 0xfffff7ff, -0x801, 0x7ff, x4, 152, x5)
+
+inst_61:
+// rs1_val == -4097,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x1001; immval:0x7
+TEST_IMM_OP( ori, x11, x10, 0xffffefff, -0x1001, 0x7, x4, 156, x5)
+
+inst_62:
+// rs1_val == -8193,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x2001; immval:-0x21
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x2001, -0x21, x4, 160, x5)
+
+inst_63:
+// rs1_val == -32769,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x8001; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffff7fff, -0x8001, 0x2d, x4, 164, x5)
+
+inst_64:
+// rs1_val == -65537,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x10001; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xfffeffff, -0x10001, 0x332, x4, 168, x5)
+
+inst_65:
+// rs1_val == -131073,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x20001; immval:-0xa
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x20001, -0xa, x4, 172, x5)
+
+inst_66:
+// rs1_val == -1048577,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x100001; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xffefffff, -0x100001, 0x6, x4, 176, x5)
+
+inst_67:
+// rs1_val == -2097153,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x200001; immval:-0x400
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x200001, -0x400, x4, 180, x5)
+
+inst_68:
+// rs1_val == -4194305,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x400001; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x400001, -0x2c, x4, 184, x5)
+
+inst_69:
+// rs1_val == -8388609,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x800001; immval:-0xa
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x800001, -0xa, x4, 188, x5)
+
+inst_70:
+// rs1_val == -16777217,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x1000001; immval:0x3ff
+TEST_IMM_OP( ori, x11, x10, 0xfeffffff, -0x1000001, 0x3ff, x4, 192, x5)
+
+inst_71:
+// rs1_val == -33554433,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x2000001; immval:-0x8
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x2000001, -0x8, x4, 196, x5)
+
+inst_72:
+// rs1_val == -67108865,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x4000001; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xfbffffff, -0x4000001, 0x4, x4, 200, x5)
+
+inst_73:
+// rs1_val == -134217729,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x8000001; immval:-0x6
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x8000001, -0x6, x4, 204, x5)
+
+inst_74:
+// rs1_val == -268435457,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x10000001; immval:-0x7
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x10000001, -0x7, x4, 208, x5)
+
+inst_75:
+// rs1_val == -536870913,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x20000001; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xdfffffff, -0x20000001, 0x554, x4, 212, x5)
+
+inst_76:
+// rs1_val == 1431655765,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x101
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, 0x55555555, -0x101, x4, 216, x5)
+
+inst_77:
+// rs1_val==3 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x3, 0x3, 0x3, x4, 220, x5)
+
+inst_78:
+// rs1_val==3 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x557, 0x3, 0x555, x4, 224, x5)
+
+inst_79:
+// rs1_val==3 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffaab, 0x3, -0x556, x4, 228, x5)
+
+inst_80:
+// rs1_val==3 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x3, 0x5, x4, 232, x5)
+
+inst_81:
+// rs1_val==3 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x333, 0x3, 0x333, x4, 236, x5)
+
+inst_82:
+// rs1_val==3 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x3, 0x666, x4, 240, x5)
+
+inst_83:
+// rs1_val==3 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffd3, 0x3, -0x2d, x4, 244, x5)
+
+inst_84:
+// rs1_val==3 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x2f, 0x3, 0x2d, x4, 248, x5)
+
+inst_85:
+// rs1_val==3 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x3, 0x3, 0x2, x4, 252, x5)
+
+inst_86:
+// rs1_val==3 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x557, 0x3, 0x554, x4, 256, x5)
+
+inst_87:
+// rs1_val==3 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x3, 0x3, 0x0, x4, 260, x5)
+
+inst_88:
+// rs1_val==3 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x3, 0x4, x4, 264, x5)
+
+inst_89:
+// rs1_val==3 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x333, 0x3, 0x332, x4, 268, x5)
+
+inst_90:
+// rs1_val==3 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x3, 0x665, x4, 272, x5)
+
+inst_91:
+// rs1_val==3 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x2f, 0x3, 0x2c, x4, 276, x5)
+
+inst_92:
+// rs1_val==3 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x557, 0x3, 0x556, x4, 280, x5)
+
+inst_93:
+// rs1_val==3 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffaab, 0x3, -0x555, x4, 284, x5)
+
+inst_94:
+// rs1_val==3 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x3, 0x6, x4, 288, x5)
+
+inst_95:
+// rs1_val==3 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x337, 0x3, 0x334, x4, 292, x5)
+
+inst_96:
+// rs1_val==3 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x3, 0x667, x4, 296, x5)
+
+inst_97:
+// rs1_val==3 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffd7, 0x3, -0x2c, x4, 300, x5)
+
+inst_98:
+// rs1_val==3 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x2f, 0x3, 0x2e, x4, 304, x5)
+
+inst_99:
+// rs1_val==1431655765 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x55555557, 0x55555555, 0x3, x4, 308, x5)
+
+inst_100:
+// rs1_val==1431655765 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x55555555, 0x55555555, 0x555, x4, 312, x5)
+
+inst_101:
+// rs1_val==1431655765 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, 0x55555555, -0x556, x4, 316, x5)
+
+inst_102:
+// rs1_val==1431655765 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x55555555, 0x55555555, 0x5, x4, 320, x5)
+
+inst_103:
+// rs1_val==1431655765 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x55555777, 0x55555555, 0x333, x4, 324, x5)
+
+inst_104:
+// rs1_val==1431655765 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x55555777, 0x55555555, 0x666, x4, 328, x5)
+
+inst_105:
+// rs1_val==1431655765 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffd7, 0x55555555, -0x2d, x4, 332, x5)
+
+inst_106:
+// rs1_val==1431655765 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x5555557d, 0x55555555, 0x2d, x4, 336, x5)
+
+inst_107:
+// rs1_val==1431655765 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x55555557, 0x55555555, 0x2, x4, 340, x5)
+
+inst_108:
+// rs1_val==1431655765 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x55555555, 0x55555555, 0x554, x4, 344, x5)
+
+inst_109:
+// rs1_val==1431655765 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x55555555, 0x55555555, 0x0, x4, 348, x5)
+
+inst_110:
+// rs1_val==1431655765 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x55555555, 0x55555555, 0x4, x4, 352, x5)
+
+inst_111:
+// rs1_val==1431655765 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x55555777, 0x55555555, 0x332, x4, 356, x5)
+
+inst_112:
+// rs1_val==1431655765 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x55555775, 0x55555555, 0x665, x4, 360, x5)
+
+inst_113:
+// rs1_val==1431655765 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x5555557d, 0x55555555, 0x2c, x4, 364, x5)
+
+inst_114:
+// rs1_val==1431655765 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x55555557, 0x55555555, 0x556, x4, 368, x5)
+
+inst_115:
+// rs1_val==1431655765 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, 0x55555555, -0x555, x4, 372, x5)
+
+inst_116:
+// rs1_val==1431655765 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x55555557, 0x55555555, 0x6, x4, 376, x5)
+
+inst_117:
+// rs1_val==1431655765 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x55555775, 0x55555555, 0x334, x4, 380, x5)
+
+inst_118:
+// rs1_val==1431655765 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x55555777, 0x55555555, 0x667, x4, 384, x5)
+
+inst_119:
+// rs1_val==1431655765 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffd5, 0x55555555, -0x2c, x4, 388, x5)
+
+inst_120:
+// rs1_val==1431655765 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x5555557f, 0x55555555, 0x2e, x4, 392, x5)
+
+inst_121:
+// rs1_val==-1431655766 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaab, -0x55555556, 0x3, x4, 396, x5)
+
+inst_122:
+// rs1_val==-1431655766 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xaaaaafff, -0x55555556, 0x555, x4, 400, x5)
+
+inst_123:
+// rs1_val==-1431655766 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffaaa, -0x55555556, -0x556, x4, 404, x5)
+
+inst_124:
+// rs1_val==-1431655766 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaf, -0x55555556, 0x5, x4, 408, x5)
+
+inst_125:
+// rs1_val==-1431655766 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xaaaaabbb, -0x55555556, 0x333, x4, 412, x5)
+
+inst_126:
+// rs1_val==-1431655766 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaeee, -0x55555556, 0x666, x4, 416, x5)
+
+inst_127:
+// rs1_val==-1431655766 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffb, -0x55555556, -0x2d, x4, 420, x5)
+
+inst_128:
+// rs1_val==-1431655766 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaf, -0x55555556, 0x2d, x4, 424, x5)
+
+inst_129:
+// rs1_val==-1431655766 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaa, -0x55555556, 0x2, x4, 428, x5)
+
+inst_130:
+// rs1_val==-1431655766 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaffe, -0x55555556, 0x554, x4, 432, x5)
+
+inst_131:
+// rs1_val==-1431655766 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaa, -0x55555556, 0x0, x4, 436, x5)
+
+inst_132:
+// rs1_val==-1431655766 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaae, -0x55555556, 0x4, x4, 440, x5)
+
+inst_133:
+// rs1_val==-1431655766 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xaaaaabba, -0x55555556, 0x332, x4, 444, x5)
+
+inst_134:
+// rs1_val==-1431655766 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaeef, -0x55555556, 0x665, x4, 448, x5)
+
+inst_135:
+// rs1_val==-1431655766 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaae, -0x55555556, 0x2c, x4, 452, x5)
+
+inst_136:
+// rs1_val==-1431655766 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaffe, -0x55555556, 0x556, x4, 456, x5)
+
+inst_137:
+// rs1_val==-1431655766 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffaab, -0x55555556, -0x555, x4, 460, x5)
+
+inst_138:
+// rs1_val==-1431655766 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaae, -0x55555556, 0x6, x4, 464, x5)
+
+inst_139:
+// rs1_val==-1431655766 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xaaaaabbe, -0x55555556, 0x334, x4, 468, x5)
+
+inst_140:
+// rs1_val==-1431655766 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaeef, -0x55555556, 0x667, x4, 472, x5)
+
+inst_141:
+// rs1_val==-1431655766 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffffe, -0x55555556, -0x2c, x4, 476, x5)
+
+inst_142:
+// rs1_val==-1431655766 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaae, -0x55555556, 0x2e, x4, 480, x5)
+
+inst_143:
+// rs1_val==5 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x5, 0x3, x4, 484, x5)
+
+inst_144:
+// rs1_val==5 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x555, 0x5, 0x555, x4, 488, x5)
+
+inst_145:
+// rs1_val==5 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffaaf, 0x5, -0x556, x4, 492, x5)
+
+inst_146:
+// rs1_val==5 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x5, 0x5, 0x5, x4, 496, x5)
+
+inst_147:
+// rs1_val==5 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x337, 0x5, 0x333, x4, 500, x5)
+
+inst_148:
+// rs1_val==5 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x5, 0x666, x4, 504, x5)
+
+inst_149:
+// rs1_val==5 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffd7, 0x5, -0x2d, x4, 508, x5)
+
+inst_150:
+// rs1_val==5 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x2d, 0x5, 0x2d, x4, 512, x5)
+
+inst_151:
+// rs1_val==5 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x5, 0x2, x4, 516, x5)
+
+inst_152:
+// rs1_val==5 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x555, 0x5, 0x554, x4, 520, x5)
+
+inst_153:
+// rs1_val==5 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x5, 0x5, 0x0, x4, 524, x5)
+
+inst_154:
+// rs1_val==5 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x5, 0x5, 0x4, x4, 528, x5)
+
+inst_155:
+// rs1_val==5 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x337, 0x5, 0x332, x4, 532, x5)
+
+inst_156:
+// rs1_val==5 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x665, 0x5, 0x665, x4, 536, x5)
+
+inst_157:
+// rs1_val==5 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x2d, 0x5, 0x2c, x4, 540, x5)
+
+inst_158:
+// rs1_val==5 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x557, 0x5, 0x556, x4, 544, x5)
+
+inst_159:
+// rs1_val==5 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffaaf, 0x5, -0x555, x4, 548, x5)
+
+inst_160:
+// rs1_val==5 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x5, 0x6, x4, 552, x5)
+
+inst_161:
+// rs1_val==5 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x335, 0x5, 0x334, x4, 556, x5)
+
+inst_162:
+// rs1_val==5 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x5, 0x667, x4, 560, x5)
+
+inst_163:
+// rs1_val==5 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffd5, 0x5, -0x2c, x4, 564, x5)
+
+inst_164:
+// rs1_val==5 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x2f, 0x5, 0x2e, x4, 568, x5)
+
+inst_165:
+// rs1_val==858993459 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x33333333, 0x33333333, 0x3, x4, 572, x5)
+
+inst_166:
+// rs1_val==858993459 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x33333777, 0x33333333, 0x555, x4, 576, x5)
+
+inst_167:
+// rs1_val==858993459 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffbbb, 0x33333333, -0x556, x4, 580, x5)
+
+inst_168:
+// rs1_val==858993459 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x33333337, 0x33333333, 0x5, x4, 584, x5)
+
+inst_169:
+// rs1_val==858993459 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x33333333, 0x33333333, 0x333, x4, 588, x5)
+
+inst_170:
+// rs1_val==858993459 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x33333777, 0x33333333, 0x666, x4, 592, x5)
+
+inst_171:
+// rs1_val==858993459 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffff3, 0x33333333, -0x2d, x4, 596, x5)
+
+inst_172:
+// rs1_val==858993459 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x3333333f, 0x33333333, 0x2d, x4, 600, x5)
+
+inst_173:
+// rs1_val==858993459 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x33333333, 0x33333333, 0x2, x4, 604, x5)
+
+inst_174:
+// rs1_val==858993459 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x33333777, 0x33333333, 0x554, x4, 608, x5)
+
+inst_175:
+// rs1_val==858993459 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x33333333, 0x33333333, 0x0, x4, 612, x5)
+
+inst_176:
+// rs1_val==858993459 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x33333337, 0x33333333, 0x4, x4, 616, x5)
+
+inst_177:
+// rs1_val==858993459 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x33333333, 0x33333333, 0x332, x4, 620, x5)
+
+inst_178:
+// rs1_val==858993459 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x33333777, 0x33333333, 0x665, x4, 624, x5)
+
+inst_179:
+// rs1_val==858993459 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x3333333f, 0x33333333, 0x2c, x4, 628, x5)
+
+inst_180:
+// rs1_val==858993459 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x33333777, 0x33333333, 0x556, x4, 632, x5)
+
+inst_181:
+// rs1_val==858993459 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffbbb, 0x33333333, -0x555, x4, 636, x5)
+
+inst_182:
+// rs1_val==858993459 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x33333337, 0x33333333, 0x6, x4, 640, x5)
+
+inst_183:
+// rs1_val==858993459 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x33333337, 0x33333333, 0x334, x4, 644, x5)
+
+inst_184:
+// rs1_val==858993459 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x33333777, 0x33333333, 0x667, x4, 648, x5)
+
+inst_185:
+// rs1_val==858993459 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffff7, 0x33333333, -0x2c, x4, 652, x5)
+
+inst_186:
+// rs1_val==858993459 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x3333333f, 0x33333333, 0x2e, x4, 656, x5)
+
+inst_187:
+// rs1_val==1717986918 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666666, 0x3, x4, 660, x5)
+
+inst_188:
+// rs1_val==1717986918 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x66666777, 0x66666666, 0x555, x4, 664, x5)
+
+inst_189:
+// rs1_val==1717986918 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffeee, 0x66666666, -0x556, x4, 668, x5)
+
+inst_190:
+// rs1_val==1717986918 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666666, 0x5, x4, 672, x5)
+
+inst_191:
+// rs1_val==1717986918 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x66666777, 0x66666666, 0x333, x4, 676, x5)
+
+inst_192:
+// rs1_val==1717986918 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x66666666, 0x66666666, 0x666, x4, 680, x5)
+
+inst_193:
+// rs1_val==1717986918 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffff7, 0x66666666, -0x2d, x4, 684, x5)
+
+inst_194:
+// rs1_val==1717986918 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x6666666f, 0x66666666, 0x2d, x4, 688, x5)
+
+inst_195:
+// rs1_val==1717986918 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x66666666, 0x66666666, 0x2, x4, 692, x5)
+
+inst_196:
+// rs1_val==1717986918 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x66666776, 0x66666666, 0x554, x4, 696, x5)
+
+inst_197:
+// rs1_val==1717986918 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x66666666, 0x66666666, 0x0, x4, 700, x5)
+
+inst_198:
+// rs1_val==1717986918 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x66666666, 0x66666666, 0x4, x4, 704, x5)
+
+inst_199:
+// rs1_val==1717986918 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x66666776, 0x66666666, 0x332, x4, 708, x5)
+
+inst_200:
+// rs1_val==1717986918 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666666, 0x665, x4, 712, x5)
+
+inst_201:
+// rs1_val==1717986918 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x6666666e, 0x66666666, 0x2c, x4, 716, x5)
+
+inst_202:
+// rs1_val==1717986918 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x66666776, 0x66666666, 0x556, x4, 720, x5)
+
+inst_203:
+// rs1_val==1717986918 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffeef, 0x66666666, -0x555, x4, 724, x5)
+
+inst_204:
+// rs1_val==1717986918 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x66666666, 0x66666666, 0x6, x4, 728, x5)
+
+inst_205:
+// rs1_val==1717986918 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x66666776, 0x66666666, 0x334, x4, 732, x5)
+
+inst_206:
+// rs1_val==1717986918 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666666, 0x667, x4, 736, x5)
+
+inst_207:
+// rs1_val==1717986918 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffff6, 0x66666666, -0x2c, x4, 740, x5)
+
+inst_208:
+// rs1_val==1717986918 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x6666666e, 0x66666666, 0x2e, x4, 744, x5)
+
+inst_209:
+// rs1_val==-46340 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xffff4aff, -0xb504, 0x3, x4, 748, x5)
+
+inst_210:
+// rs1_val==-46340 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xffff4ffd, -0xb504, 0x555, x4, 752, x5)
+
+inst_211:
+// rs1_val==-46340 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xffff4afd, -0xb504, 0x5, x4, 756, x5)
+
+inst_212:
+// rs1_val==-46340 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xffff4bff, -0xb504, 0x333, x4, 760, x5)
+
+inst_213:
+// rs1_val==-46340 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xffff4efe, -0xb504, 0x666, x4, 764, x5)
+
+inst_214:
+// rs1_val==-46340 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0xb504, -0x2d, x4, 768, x5)
+
+inst_215:
+// rs1_val==-46340 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffff4afd, -0xb504, 0x2d, x4, 772, x5)
+
+inst_216:
+// rs1_val==-46340 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xffff4afe, -0xb504, 0x2, x4, 776, x5)
+
+inst_217:
+// rs1_val==-46340 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xffff4ffc, -0xb504, 0x554, x4, 780, x5)
+
+inst_218:
+// rs1_val==-46340 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xffff4afc, -0xb504, 0x0, x4, 784, x5)
+
+inst_219:
+// rs1_val==-46340 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xffff4afc, -0xb504, 0x4, x4, 788, x5)
+
+inst_220:
+// rs1_val==-46340 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xffff4bfe, -0xb504, 0x332, x4, 792, x5)
+
+inst_221:
+// rs1_val==-46340 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xffff4efd, -0xb504, 0x665, x4, 796, x5)
+
+inst_222:
+// rs1_val==-46340 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffff4afc, -0xb504, 0x2c, x4, 800, x5)
+
+inst_223:
+// rs1_val==-46340 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xffff4ffe, -0xb504, 0x556, x4, 804, x5)
+
+inst_224:
+// rs1_val==-46340 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffaff, -0xb504, -0x555, x4, 808, x5)
+
+inst_225:
+// rs1_val==-46340 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xffff4afe, -0xb504, 0x6, x4, 812, x5)
+
+inst_226:
+// rs1_val==-46340 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xffff4bfc, -0xb504, 0x334, x4, 816, x5)
+
+inst_227:
+// rs1_val==-46340 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xffff4eff, -0xb504, 0x667, x4, 820, x5)
+
+inst_228:
+// rs1_val==-46340 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffffc, -0xb504, -0x2c, x4, 824, x5)
+
+inst_229:
+// rs1_val==-46340 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xffff4afe, -0xb504, 0x2e, x4, 828, x5)
+
+inst_230:
+// rs1_val==46340 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xb507, 0xb504, 0x3, x4, 832, x5)
+
+inst_231:
+// rs1_val==46340 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xb555, 0xb504, 0x555, x4, 836, x5)
+
+inst_232:
+// rs1_val==46340 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xffffffae, 0xb504, -0x556, x4, 840, x5)
+
+inst_233:
+// rs1_val==46340 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xb505, 0xb504, 0x5, x4, 844, x5)
+
+inst_234:
+// rs1_val==46340 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xb737, 0xb504, 0x333, x4, 848, x5)
+
+inst_235:
+// rs1_val==46340 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xb766, 0xb504, 0x666, x4, 852, x5)
+
+inst_236:
+// rs1_val==46340 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffd7, 0xb504, -0x2d, x4, 856, x5)
+
+inst_237:
+// rs1_val==46340 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xb52d, 0xb504, 0x2d, x4, 860, x5)
+
+inst_238:
+// rs1_val==46340 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xb506, 0xb504, 0x2, x4, 864, x5)
+
+inst_239:
+// rs1_val==46340 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xb554, 0xb504, 0x554, x4, 868, x5)
+
+inst_240:
+// rs1_val==46340 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xb504, 0xb504, 0x0, x4, 872, x5)
+
+inst_241:
+// rs1_val==46340 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xb504, 0xb504, 0x4, x4, 876, x5)
+
+inst_242:
+// rs1_val==46340 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xb736, 0xb504, 0x332, x4, 880, x5)
+
+inst_243:
+// rs1_val==46340 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xb765, 0xb504, 0x665, x4, 884, x5)
+
+inst_244:
+// rs1_val==46340 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xb52c, 0xb504, 0x2c, x4, 888, x5)
+
+inst_245:
+// rs1_val==46340 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xb556, 0xb504, 0x556, x4, 892, x5)
+
+inst_246:
+// rs1_val==46340 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xffffffaf, 0xb504, -0x555, x4, 896, x5)
+
+inst_247:
+// rs1_val==46340 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xb506, 0xb504, 0x6, x4, 900, x5)
+
+inst_248:
+// rs1_val==46340 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xb734, 0xb504, 0x334, x4, 904, x5)
+
+inst_249:
+// rs1_val==46340 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xb767, 0xb504, 0x667, x4, 908, x5)
+
+inst_250:
+// rs1_val==46340 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffd4, 0xb504, -0x2c, x4, 912, x5)
+
+inst_251:
+// rs1_val==46340 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xb52e, 0xb504, 0x2e, x4, 916, x5)
+
+inst_252:
+// rs1_val==2 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x3, 0x2, 0x3, x4, 920, x5)
+
+inst_253:
+// rs1_val==2 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x557, 0x2, 0x555, x4, 924, x5)
+
+inst_254:
+// rs1_val==2 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffaaa, 0x2, -0x556, x4, 928, x5)
+
+inst_255:
+// rs1_val==2 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x2, 0x5, x4, 932, x5)
+
+inst_256:
+// rs1_val==2 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x333, 0x2, 0x333, x4, 936, x5)
+
+inst_257:
+// rs1_val==2 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x666, 0x2, 0x666, x4, 940, x5)
+
+inst_258:
+// rs1_val==2 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffd3, 0x2, -0x2d, x4, 944, x5)
+
+inst_259:
+// rs1_val==2 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x2f, 0x2, 0x2d, x4, 948, x5)
+
+inst_260:
+// rs1_val==2 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x2, 0x2, 0x2, x4, 952, x5)
+
+inst_261:
+// rs1_val==2 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x556, 0x2, 0x554, x4, 956, x5)
+
+inst_262:
+// rs1_val==2 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x2, 0x2, 0x0, x4, 960, x5)
+
+inst_263:
+// rs1_val==2 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x2, 0x4, x4, 964, x5)
+
+inst_264:
+// rs1_val==2 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x332, 0x2, 0x332, x4, 968, x5)
+
+inst_265:
+// rs1_val==2 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x2, 0x665, x4, 972, x5)
+
+inst_266:
+// rs1_val==2 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x2e, 0x2, 0x2c, x4, 976, x5)
+
+inst_267:
+// rs1_val==2 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x556, 0x2, 0x556, x4, 980, x5)
+
+inst_268:
+// rs1_val==2 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffaab, 0x2, -0x555, x4, 984, x5)
+
+inst_269:
+// rs1_val==2 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x2, 0x6, x4, 988, x5)
+
+inst_270:
+// rs1_val==2 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x336, 0x2, 0x334, x4, 992, x5)
+
+inst_271:
+// rs1_val==2 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x2, 0x667, x4, 996, x5)
+
+inst_272:
+// rs1_val==2 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffd6, 0x2, -0x2c, x4, 1000, x5)
+
+inst_273:
+// rs1_val==2 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x2e, 0x2, 0x2e, x4, 1004, x5)
+
+inst_274:
+// rs1_val==1431655764 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x55555557, 0x55555554, 0x3, x4, 1008, x5)
+
+inst_275:
+// rs1_val==1431655764 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x55555555, 0x55555554, 0x555, x4, 1012, x5)
+
+inst_276:
+// rs1_val==1431655764 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffe, 0x55555554, -0x556, x4, 1016, x5)
+
+inst_277:
+// rs1_val==1431655764 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x55555555, 0x55555554, 0x5, x4, 1020, x5)
+
+inst_278:
+// rs1_val==1431655764 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x55555777, 0x55555554, 0x333, x4, 1024, x5)
+
+inst_279:
+// rs1_val==1431655764 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x55555776, 0x55555554, 0x666, x4, 1028, x5)
+
+inst_280:
+// rs1_val==1431655764 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffd7, 0x55555554, -0x2d, x4, 1032, x5)
+
+inst_281:
+// rs1_val==1431655764 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x5555557d, 0x55555554, 0x2d, x4, 1036, x5)
+
+inst_282:
+// rs1_val==1431655764 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x55555556, 0x55555554, 0x2, x4, 1040, x5)
+
+inst_283:
+// rs1_val==1431655764 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x55555554, 0x55555554, 0x554, x4, 1044, x5)
+
+inst_284:
+// rs1_val==1431655764 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x55555554, 0x55555554, 0x0, x4, 1048, x5)
+
+inst_285:
+// rs1_val==1431655764 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x55555554, 0x55555554, 0x4, x4, 1052, x5)
+
+inst_286:
+// rs1_val==1431655764 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x55555776, 0x55555554, 0x332, x4, 1056, x5)
+
+inst_287:
+// rs1_val==1431655764 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x55555775, 0x55555554, 0x665, x4, 1060, x5)
+
+inst_288:
+// rs1_val==1431655764 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x5555557c, 0x55555554, 0x2c, x4, 1064, x5)
+
+inst_289:
+// rs1_val==1431655764 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x55555556, 0x55555554, 0x556, x4, 1068, x5)
+
+inst_290:
+// rs1_val==1431655764 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, 0x55555554, -0x555, x4, 1072, x5)
+
+inst_291:
+// rs1_val==1431655764 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x55555556, 0x55555554, 0x6, x4, 1076, x5)
+
+inst_292:
+// rs1_val==1431655764 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x55555774, 0x55555554, 0x334, x4, 1080, x5)
+
+inst_293:
+// rs1_val==1431655764 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x55555777, 0x55555554, 0x667, x4, 1084, x5)
+
+inst_294:
+// rs1_val==1431655764 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffd4, 0x55555554, -0x2c, x4, 1088, x5)
+
+inst_295:
+// rs1_val==1431655764 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x5555557e, 0x55555554, 0x2e, x4, 1092, x5)
+
+inst_296:
+// rs1_val==0 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x3, 0x0, 0x3, x4, 1096, x5)
+
+inst_297:
+// rs1_val==0 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x555, 0x0, 0x555, x4, 1100, x5)
+
+inst_298:
+// rs1_val==0 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffaaa, 0x0, -0x556, x4, 1104, x5)
+
+inst_299:
+// rs1_val==0 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x5, 0x0, 0x5, x4, 1108, x5)
+
+inst_300:
+// rs1_val==0 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x333, 0x0, 0x333, x4, 1112, x5)
+
+inst_301:
+// rs1_val==0 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x666, 0x0, 0x666, x4, 1116, x5)
+
+inst_302:
+// rs1_val==0 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffd3, 0x0, -0x2d, x4, 1120, x5)
+
+inst_303:
+// rs1_val==858993460 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x33333336, 0x33333334, 0x332, x4, 1124, x5)
+
+inst_304:
+// rs1_val==858993460 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x33333775, 0x33333334, 0x665, x4, 1128, x5)
+
+inst_305:
+// rs1_val==858993460 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x3333333c, 0x33333334, 0x2c, x4, 1132, x5)
+
+inst_306:
+// rs1_val==858993460 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x33333776, 0x33333334, 0x556, x4, 1136, x5)
+
+inst_307:
+// rs1_val==858993460 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffbbf, 0x33333334, -0x555, x4, 1140, x5)
+
+inst_308:
+// rs1_val==858993460 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x33333336, 0x33333334, 0x6, x4, 1144, x5)
+
+inst_309:
+// rs1_val==858993460 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x33333334, 0x33333334, 0x334, x4, 1148, x5)
+
+inst_310:
+// rs1_val==858993460 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x33333777, 0x33333334, 0x667, x4, 1152, x5)
+
+inst_311:
+// rs1_val==858993460 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffff4, 0x33333334, -0x2c, x4, 1156, x5)
+
+inst_312:
+// rs1_val==858993460 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x3333333e, 0x33333334, 0x2e, x4, 1160, x5)
+
+inst_313:
+// rs1_val==1717986919 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666667, 0x3, x4, 1164, x5)
+
+inst_314:
+// rs1_val==1717986919 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x66666777, 0x66666667, 0x555, x4, 1168, x5)
+
+inst_315:
+// rs1_val==1717986919 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffeef, 0x66666667, -0x556, x4, 1172, x5)
+
+inst_316:
+// rs1_val==1717986919 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666667, 0x5, x4, 1176, x5)
+
+inst_317:
+// rs1_val==1717986919 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x66666777, 0x66666667, 0x333, x4, 1180, x5)
+
+inst_318:
+// rs1_val==1717986919 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666667, 0x666, x4, 1184, x5)
+
+inst_319:
+// rs1_val==1717986919 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffff7, 0x66666667, -0x2d, x4, 1188, x5)
+
+inst_320:
+// rs1_val==1717986919 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x6666666f, 0x66666667, 0x2d, x4, 1192, x5)
+
+inst_321:
+// rs1_val==1717986919 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666667, 0x2, x4, 1196, x5)
+
+inst_322:
+// rs1_val==1717986919 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x66666777, 0x66666667, 0x554, x4, 1200, x5)
+
+inst_323:
+// rs1_val==1717986919 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666667, 0x0, x4, 1204, x5)
+
+inst_324:
+// rs1_val==1717986919 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666667, 0x4, x4, 1208, x5)
+
+inst_325:
+// rs1_val==1717986919 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x66666777, 0x66666667, 0x332, x4, 1212, x5)
+
+inst_326:
+// rs1_val==1717986919 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666667, 0x665, x4, 1216, x5)
+
+inst_327:
+// rs1_val==1717986919 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x6666666f, 0x66666667, 0x2c, x4, 1220, x5)
+
+inst_328:
+// rs1_val==1717986919 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x66666777, 0x66666667, 0x556, x4, 1224, x5)
+
+inst_329:
+// rs1_val==1717986919 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffeef, 0x66666667, -0x555, x4, 1228, x5)
+
+inst_330:
+// rs1_val==1717986919 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666667, 0x6, x4, 1232, x5)
+
+inst_331:
+// rs1_val==1717986919 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x66666777, 0x66666667, 0x334, x4, 1236, x5)
+
+inst_332:
+// rs1_val==1717986919 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666667, 0x667, x4, 1240, x5)
+
+inst_333:
+// rs1_val==1717986919 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffff7, 0x66666667, -0x2c, x4, 1244, x5)
+
+inst_334:
+// rs1_val==1717986919 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x6666666f, 0x66666667, 0x2e, x4, 1248, x5)
+
+inst_335:
+// rs1_val==-46339 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xffff4aff, -0xb503, 0x3, x4, 1252, x5)
+
+inst_336:
+// rs1_val==-46339 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xffff4ffd, -0xb503, 0x555, x4, 1256, x5)
+
+inst_337:
+// rs1_val==-46339 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffaff, -0xb503, -0x556, x4, 1260, x5)
+
+inst_338:
+// rs1_val==-46339 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xffff4afd, -0xb503, 0x5, x4, 1264, x5)
+
+inst_339:
+// rs1_val==-46339 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xffff4bff, -0xb503, 0x333, x4, 1268, x5)
+
+inst_340:
+// rs1_val==-46339 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xffff4eff, -0xb503, 0x666, x4, 1272, x5)
+
+inst_341:
+// rs1_val==-46339 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0xb503, -0x2d, x4, 1276, x5)
+
+inst_342:
+// rs1_val==-46339 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffff4afd, -0xb503, 0x2d, x4, 1280, x5)
+
+inst_343:
+// rs1_val==-46339 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xffff4aff, -0xb503, 0x2, x4, 1284, x5)
+
+inst_344:
+// rs1_val==-46339 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xffff4ffd, -0xb503, 0x554, x4, 1288, x5)
+
+inst_345:
+// rs1_val==-46339 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xffff4afd, -0xb503, 0x0, x4, 1292, x5)
+
+inst_346:
+// rs1_val==-46339 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xffff4afd, -0xb503, 0x4, x4, 1296, x5)
+
+inst_347:
+// rs1_val==-46339 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xffff4bff, -0xb503, 0x332, x4, 1300, x5)
+
+inst_348:
+// rs1_val==-46339 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xffff4efd, -0xb503, 0x665, x4, 1304, x5)
+
+inst_349:
+// rs1_val==-46339 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffff4afd, -0xb503, 0x2c, x4, 1308, x5)
+
+inst_350:
+// rs1_val==-46339 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xffff4fff, -0xb503, 0x556, x4, 1312, x5)
+
+inst_351:
+// rs1_val==-46339 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffaff, -0xb503, -0x555, x4, 1316, x5)
+
+inst_352:
+// rs1_val==-46339 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xffff4aff, -0xb503, 0x6, x4, 1320, x5)
+
+inst_353:
+// rs1_val==-46339 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xffff4bfd, -0xb503, 0x334, x4, 1324, x5)
+
+inst_354:
+// rs1_val==-46339 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xffff4eff, -0xb503, 0x667, x4, 1328, x5)
+
+inst_355:
+// rs1_val==-46339 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffffd, -0xb503, -0x2c, x4, 1332, x5)
+
+inst_356:
+// rs1_val==-46339 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xffff4aff, -0xb503, 0x2e, x4, 1336, x5)
+
+inst_357:
+// rs1_val==46341 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xb507, 0xb505, 0x3, x4, 1340, x5)
+
+inst_358:
+// rs1_val==46341 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xb555, 0xb505, 0x555, x4, 1344, x5)
+
+inst_359:
+// rs1_val==46341 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xffffffaf, 0xb505, -0x556, x4, 1348, x5)
+
+inst_360:
+// rs1_val==46341 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xb505, 0xb505, 0x5, x4, 1352, x5)
+
+inst_361:
+// rs1_val==46341 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xb737, 0xb505, 0x333, x4, 1356, x5)
+
+inst_362:
+// rs1_val==46341 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xb767, 0xb505, 0x666, x4, 1360, x5)
+
+inst_363:
+// rs1_val==46341 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffd7, 0xb505, -0x2d, x4, 1364, x5)
+
+inst_364:
+// rs1_val==46341 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xb52d, 0xb505, 0x2d, x4, 1368, x5)
+
+inst_365:
+// rs1_val==46341 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xb507, 0xb505, 0x2, x4, 1372, x5)
+
+inst_366:
+// rs1_val==46341 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xb555, 0xb505, 0x554, x4, 1376, x5)
+
+inst_367:
+// rs1_val==46341 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xb505, 0xb505, 0x0, x4, 1380, x5)
+
+inst_368:
+// rs1_val==46341 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xb505, 0xb505, 0x4, x4, 1384, x5)
+
+inst_369:
+// rs1_val==46341 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xb737, 0xb505, 0x332, x4, 1388, x5)
+
+inst_370:
+// rs1_val==46341 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xb765, 0xb505, 0x665, x4, 1392, x5)
+
+inst_371:
+// rs1_val==46341 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xb52d, 0xb505, 0x2c, x4, 1396, x5)
+
+inst_372:
+// rs1_val==46341 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xb557, 0xb505, 0x556, x4, 1400, x5)
+
+inst_373:
+// rs1_val==46341 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xffffffaf, 0xb505, -0x555, x4, 1404, x5)
+
+inst_374:
+// rs1_val==46341 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xb507, 0xb505, 0x6, x4, 1408, x5)
+
+inst_375:
+// rs1_val==46341 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xb735, 0xb505, 0x334, x4, 1412, x5)
+
+inst_376:
+// rs1_val==46341 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xb767, 0xb505, 0x667, x4, 1416, x5)
+
+inst_377:
+// rs1_val==46341 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffd5, 0xb505, -0x2c, x4, 1420, x5)
+
+inst_378:
+// rs1_val==46341 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb505; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xb52f, 0xb505, 0x2e, x4, 1424, x5)
+
+inst_379:
+// rs1_val==0 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x2d, 0x0, 0x2d, x4, 1428, x5)
+
+inst_380:
+// rs1_val==0 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x2, 0x0, 0x2, x4, 1432, x5)
+
+inst_381:
+// rs1_val==0 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x554, 0x0, 0x554, x4, 1436, x5)
+
+inst_382:
+// rs1_val==0 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x4, 0x0, 0x4, x4, 1440, x5)
+
+inst_383:
+// rs1_val==0 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x332, 0x0, 0x332, x4, 1444, x5)
+
+inst_384:
+// rs1_val==0 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x665, 0x0, 0x665, x4, 1448, x5)
+
+inst_385:
+// rs1_val==0 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x2c, 0x0, 0x2c, x4, 1452, x5)
+
+inst_386:
+// rs1_val==0 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x556, 0x0, 0x556, x4, 1456, x5)
+
+inst_387:
+// rs1_val==0 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffaab, 0x0, -0x555, x4, 1460, x5)
+
+inst_388:
+// rs1_val==0 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x0, 0x6, x4, 1464, x5)
+
+inst_389:
+// rs1_val==0 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x334, 0x0, 0x334, x4, 1468, x5)
+
+inst_390:
+// rs1_val==0 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x0, 0x667, x4, 1472, x5)
+
+inst_391:
+// rs1_val==0 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffd4, 0x0, -0x2c, x4, 1476, x5)
+
+inst_392:
+// rs1_val==0 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x2e, 0x0, 0x2e, x4, 1480, x5)
+
+inst_393:
+// rs1_val==4 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x4, 0x3, x4, 1484, x5)
+
+inst_394:
+// rs1_val==4 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x555, 0x4, 0x555, x4, 1488, x5)
+
+inst_395:
+// rs1_val==4 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffaae, 0x4, -0x556, x4, 1492, x5)
+
+inst_396:
+// rs1_val==4 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x337, 0x4, 0x333, x4, 1496, x5)
+
+inst_397:
+// rs1_val==4 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x666, 0x4, 0x666, x4, 1500, x5)
+
+inst_398:
+// rs1_val==4 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffd7, 0x4, -0x2d, x4, 1504, x5)
+
+inst_399:
+// rs1_val==4 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x2d, 0x4, 0x2d, x4, 1508, x5)
+
+inst_400:
+// rs1_val==4 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x4, 0x2, x4, 1512, x5)
+
+inst_401:
+// rs1_val==4 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x554, 0x4, 0x554, x4, 1516, x5)
+
+inst_402:
+// rs1_val==4 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x4, 0x4, 0x0, x4, 1520, x5)
+
+inst_403:
+// rs1_val==4 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x4, 0x4, 0x4, x4, 1524, x5)
+
+inst_404:
+// rs1_val==4 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x336, 0x4, 0x332, x4, 1528, x5)
+
+inst_405:
+// rs1_val==4 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x665, 0x4, 0x665, x4, 1532, x5)
+
+inst_406:
+// rs1_val==4 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x2c, 0x4, 0x2c, x4, 1536, x5)
+
+inst_407:
+// rs1_val==4 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x556, 0x4, 0x556, x4, 1540, x5)
+
+inst_408:
+// rs1_val==4 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffaaf, 0x4, -0x555, x4, 1544, x5)
+
+inst_409:
+// rs1_val==4 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x4, 0x6, x4, 1548, x5)
+
+inst_410:
+// rs1_val==4 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x334, 0x4, 0x334, x4, 1552, x5)
+
+inst_411:
+// rs1_val==4 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x4, 0x667, x4, 1556, x5)
+
+inst_412:
+// rs1_val==4 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffd4, 0x4, -0x2c, x4, 1560, x5)
+
+inst_413:
+// rs1_val==4 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x2e, 0x4, 0x2e, x4, 1564, x5)
+
+inst_414:
+// rs1_val==858993458 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x33333333, 0x33333332, 0x3, x4, 1568, x5)
+
+inst_415:
+// rs1_val==858993458 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x33333777, 0x33333332, 0x555, x4, 1572, x5)
+
+inst_416:
+// rs1_val==858993458 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffbba, 0x33333332, -0x556, x4, 1576, x5)
+
+inst_417:
+// rs1_val==858993458 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x33333337, 0x33333332, 0x5, x4, 1580, x5)
+
+inst_418:
+// rs1_val==858993458 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x33333333, 0x33333332, 0x333, x4, 1584, x5)
+
+inst_419:
+// rs1_val==858993458 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x33333776, 0x33333332, 0x666, x4, 1588, x5)
+
+inst_420:
+// rs1_val==858993458 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffff3, 0x33333332, -0x2d, x4, 1592, x5)
+
+inst_421:
+// rs1_val==858993458 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x3333333f, 0x33333332, 0x2d, x4, 1596, x5)
+
+inst_422:
+// rs1_val==858993458 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x33333332, 0x33333332, 0x2, x4, 1600, x5)
+
+inst_423:
+// rs1_val==858993458 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x33333776, 0x33333332, 0x554, x4, 1604, x5)
+
+inst_424:
+// rs1_val==858993458 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x33333332, 0x33333332, 0x0, x4, 1608, x5)
+
+inst_425:
+// rs1_val==858993458 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x33333336, 0x33333332, 0x4, x4, 1612, x5)
+
+inst_426:
+// rs1_val==858993458 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x33333332, 0x33333332, 0x332, x4, 1616, x5)
+
+inst_427:
+// rs1_val==858993458 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x33333777, 0x33333332, 0x665, x4, 1620, x5)
+
+inst_428:
+// rs1_val==858993458 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x3333333e, 0x33333332, 0x2c, x4, 1624, x5)
+
+inst_429:
+// rs1_val==858993458 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x33333776, 0x33333332, 0x556, x4, 1628, x5)
+
+inst_430:
+// rs1_val==858993458 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffbbb, 0x33333332, -0x555, x4, 1632, x5)
+
+inst_431:
+// rs1_val==858993458 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x33333336, 0x33333332, 0x6, x4, 1636, x5)
+
+inst_432:
+// rs1_val==858993458 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x33333336, 0x33333332, 0x334, x4, 1640, x5)
+
+inst_433:
+// rs1_val==858993458 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x33333777, 0x33333332, 0x667, x4, 1644, x5)
+
+inst_434:
+// rs1_val==858993458 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffff6, 0x33333332, -0x2c, x4, 1648, x5)
+
+inst_435:
+// rs1_val==858993458 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x3333333e, 0x33333332, 0x2e, x4, 1652, x5)
+
+inst_436:
+// rs1_val==1717986917 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666665, 0x3, x4, 1656, x5)
+
+inst_437:
+// rs1_val==1717986917 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x66666775, 0x66666665, 0x555, x4, 1660, x5)
+
+inst_438:
+// rs1_val==1717986917 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffeef, 0x66666665, -0x556, x4, 1664, x5)
+
+inst_439:
+// rs1_val==1717986917 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x66666665, 0x66666665, 0x5, x4, 1668, x5)
+
+inst_440:
+// rs1_val==1717986917 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x66666777, 0x66666665, 0x333, x4, 1672, x5)
+
+inst_441:
+// rs1_val==1717986917 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666665, 0x666, x4, 1676, x5)
+
+inst_442:
+// rs1_val==1717986917 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffff7, 0x66666665, -0x2d, x4, 1680, x5)
+
+inst_443:
+// rs1_val==1717986917 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x6666666d, 0x66666665, 0x2d, x4, 1684, x5)
+
+inst_444:
+// rs1_val==1717986917 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666665, 0x2, x4, 1688, x5)
+
+inst_445:
+// rs1_val==1717986917 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x66666775, 0x66666665, 0x554, x4, 1692, x5)
+
+inst_446:
+// rs1_val==1717986917 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x66666665, 0x66666665, 0x0, x4, 1696, x5)
+
+inst_447:
+// rs1_val==1717986917 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x66666665, 0x66666665, 0x4, x4, 1700, x5)
+
+inst_448:
+// rs1_val==1717986917 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x66666777, 0x66666665, 0x332, x4, 1704, x5)
+
+inst_449:
+// rs1_val==1717986917 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x66666665, 0x66666665, 0x665, x4, 1708, x5)
+
+inst_450:
+// rs1_val==1717986917 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x6666666d, 0x66666665, 0x2c, x4, 1712, x5)
+
+inst_451:
+// rs1_val==1717986917 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x66666777, 0x66666665, 0x556, x4, 1716, x5)
+
+inst_452:
+// rs1_val==1717986917 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffeef, 0x66666665, -0x555, x4, 1720, x5)
+
+inst_453:
+// rs1_val==1717986917 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666665, 0x6, x4, 1724, x5)
+
+inst_454:
+// rs1_val==1717986917 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x66666775, 0x66666665, 0x334, x4, 1728, x5)
+
+inst_455:
+// rs1_val==1717986917 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x66666667, 0x66666665, 0x667, x4, 1732, x5)
+
+inst_456:
+// rs1_val==1717986917 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffff5, 0x66666665, -0x2c, x4, 1736, x5)
+
+inst_457:
+// rs1_val==1717986917 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x6666666f, 0x66666665, 0x2e, x4, 1740, x5)
+
+inst_458:
+// rs1_val==46339 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xb503, 0xb503, 0x3, x4, 1744, x5)
+
+inst_459:
+// rs1_val==46339 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xb557, 0xb503, 0x555, x4, 1748, x5)
+
+inst_460:
+// rs1_val==46339 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xffffffab, 0xb503, -0x556, x4, 1752, x5)
+
+inst_461:
+// rs1_val==46339 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xb507, 0xb503, 0x5, x4, 1756, x5)
+
+inst_462:
+// rs1_val==46339 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xb733, 0xb503, 0x333, x4, 1760, x5)
+
+inst_463:
+// rs1_val==46339 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xb767, 0xb503, 0x666, x4, 1764, x5)
+
+inst_464:
+// rs1_val==46339 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffd3, 0xb503, -0x2d, x4, 1768, x5)
+
+inst_465:
+// rs1_val==46339 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xb52f, 0xb503, 0x2d, x4, 1772, x5)
+
+inst_466:
+// rs1_val==46339 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xb503, 0xb503, 0x2, x4, 1776, x5)
+
+inst_467:
+// rs1_val==46339 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xb557, 0xb503, 0x554, x4, 1780, x5)
+
+inst_468:
+// rs1_val==46339 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xb503, 0xb503, 0x0, x4, 1784, x5)
+
+inst_469:
+// rs1_val==46339 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xb507, 0xb503, 0x4, x4, 1788, x5)
+
+inst_470:
+// rs1_val==46339 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xb733, 0xb503, 0x332, x4, 1792, x5)
+
+inst_471:
+// rs1_val==46339 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xb767, 0xb503, 0x665, x4, 1796, x5)
+
+inst_472:
+// rs1_val==46339 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xb52f, 0xb503, 0x2c, x4, 1800, x5)
+
+inst_473:
+// rs1_val==46339 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xb557, 0xb503, 0x556, x4, 1804, x5)
+
+inst_474:
+// rs1_val==46339 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xffffffab, 0xb503, -0x555, x4, 1808, x5)
+
+inst_475:
+// rs1_val==46339 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xb507, 0xb503, 0x6, x4, 1812, x5)
+
+inst_476:
+// rs1_val==46339 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xb737, 0xb503, 0x334, x4, 1816, x5)
+
+inst_477:
+// rs1_val==46339 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xb767, 0xb503, 0x667, x4, 1820, x5)
+
+inst_478:
+// rs1_val==46339 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffd7, 0xb503, -0x2c, x4, 1824, x5)
+
+inst_479:
+// rs1_val==46339 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb503; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xb52f, 0xb503, 0x2e, x4, 1828, x5)
+
+inst_480:
+// rs1_val==1431655766 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x55555557, 0x55555556, 0x3, x4, 1832, x5)
+
+inst_481:
+// rs1_val==1431655766 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x55555557, 0x55555556, 0x555, x4, 1836, x5)
+
+inst_482:
+// rs1_val==1431655766 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffe, 0x55555556, -0x556, x4, 1840, x5)
+
+inst_483:
+// rs1_val==1431655766 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x55555557, 0x55555556, 0x5, x4, 1844, x5)
+
+inst_484:
+// rs1_val==1431655766 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x55555777, 0x55555556, 0x333, x4, 1848, x5)
+
+inst_485:
+// rs1_val==1431655766 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x55555776, 0x55555556, 0x666, x4, 1852, x5)
+
+inst_486:
+// rs1_val==1431655766 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffd7, 0x55555556, -0x2d, x4, 1856, x5)
+
+inst_487:
+// rs1_val==1431655766 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x5555557f, 0x55555556, 0x2d, x4, 1860, x5)
+
+inst_488:
+// rs1_val==1431655766 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x55555556, 0x55555556, 0x2, x4, 1864, x5)
+
+inst_489:
+// rs1_val==1431655766 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x55555556, 0x55555556, 0x554, x4, 1868, x5)
+
+inst_490:
+// rs1_val==1431655766 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x55555556, 0x55555556, 0x0, x4, 1872, x5)
+
+inst_491:
+// rs1_val==1431655766 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x55555556, 0x55555556, 0x4, x4, 1876, x5)
+
+inst_492:
+// rs1_val==1431655766 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x55555776, 0x55555556, 0x332, x4, 1880, x5)
+
+inst_493:
+// rs1_val==1431655766 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x55555777, 0x55555556, 0x665, x4, 1884, x5)
+
+inst_494:
+// rs1_val==1431655766 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x5555557e, 0x55555556, 0x2c, x4, 1888, x5)
+
+inst_495:
+// rs1_val==1431655766 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x55555556, 0x55555556, 0x556, x4, 1892, x5)
+
+inst_496:
+// rs1_val==1431655766 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, 0x55555556, -0x555, x4, 1896, x5)
+
+inst_497:
+// rs1_val==1431655766 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x55555556, 0x55555556, 0x6, x4, 1900, x5)
+
+inst_498:
+// rs1_val==1431655766 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x55555776, 0x55555556, 0x334, x4, 1904, x5)
+
+inst_499:
+// rs1_val==1431655766 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x55555777, 0x55555556, 0x667, x4, 1908, x5)
+
+inst_500:
+// rs1_val==1431655766 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffd6, 0x55555556, -0x2c, x4, 1912, x5)
+
+inst_501:
+// rs1_val==1431655766 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x5555557e, 0x55555556, 0x2e, x4, 1916, x5)
+
+inst_502:
+// rs1_val==-1431655765 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaab, -0x55555555, 0x3, x4, 1920, x5)
+
+inst_503:
+// rs1_val==-1431655765 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xaaaaafff, -0x55555555, 0x555, x4, 1924, x5)
+
+inst_504:
+// rs1_val==-1431655765 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffaab, -0x55555555, -0x556, x4, 1928, x5)
+
+inst_505:
+// rs1_val==-1431655765 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaf, -0x55555555, 0x5, x4, 1932, x5)
+
+inst_506:
+// rs1_val==-1431655765 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xaaaaabbb, -0x55555555, 0x333, x4, 1936, x5)
+
+inst_507:
+// rs1_val==-1431655765 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaeef, -0x55555555, 0x666, x4, 1940, x5)
+
+inst_508:
+// rs1_val==-1431655765 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffb, -0x55555555, -0x2d, x4, 1944, x5)
+
+inst_509:
+// rs1_val==-1431655765 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaf, -0x55555555, 0x2d, x4, 1948, x5)
+
+inst_510:
+// rs1_val==-1431655765 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaab, -0x55555555, 0x2, x4, 1952, x5)
+
+inst_511:
+// rs1_val==-1431655765 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xaaaaafff, -0x55555555, 0x554, x4, 1956, x5)
+
+inst_512:
+// rs1_val==-1431655765 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaab, -0x55555555, 0x0, x4, 1960, x5)
+
+inst_513:
+// rs1_val==-1431655765 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaf, -0x55555555, 0x4, x4, 1964, x5)
+
+inst_514:
+// rs1_val==-1431655765 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xaaaaabbb, -0x55555555, 0x332, x4, 1968, x5)
+
+inst_515:
+// rs1_val==-1431655765 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaeef, -0x55555555, 0x665, x4, 1972, x5)
+
+inst_516:
+// rs1_val==-1431655765 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaf, -0x55555555, 0x2c, x4, 1976, x5)
+
+inst_517:
+// rs1_val==-1431655765 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xaaaaafff, -0x55555555, 0x556, x4, 1980, x5)
+
+inst_518:
+// rs1_val==-1431655765 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffaab, -0x55555555, -0x555, x4, 1984, x5)
+
+inst_519:
+// rs1_val==-1431655765 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaf, -0x55555555, 0x6, x4, 1988, x5)
+
+inst_520:
+// rs1_val==-1431655765 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xaaaaabbf, -0x55555555, 0x334, x4, 1992, x5)
+
+inst_521:
+// rs1_val==-1431655765 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaeef, -0x55555555, 0x667, x4, 1996, x5)
+
+inst_522:
+// rs1_val==-1431655765 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x55555555, -0x2c, x4, 2000, x5)
+
+inst_523:
+// rs1_val==-1431655765 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaf, -0x55555555, 0x2e, x4, 2004, x5)
+
+inst_524:
+// rs1_val==6 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x6, 0x3, x4, 2008, x5)
+
+inst_525:
+// rs1_val==6 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x557, 0x6, 0x555, x4, 2012, x5)
+
+inst_526:
+// rs1_val==6 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffaae, 0x6, -0x556, x4, 2016, x5)
+
+inst_527:
+// rs1_val==6 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x6, 0x5, x4, 2020, x5)
+
+inst_528:
+// rs1_val==6 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x337, 0x6, 0x333, x4, 2024, x5)
+
+inst_529:
+// rs1_val==6 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x666, 0x6, 0x666, x4, 2028, x5)
+
+inst_530:
+// rs1_val==6 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffd7, 0x6, -0x2d, x4, 2032, x5)
+
+inst_531:
+// rs1_val==6 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x2f, 0x6, 0x2d, x4, 2036, x5)
+
+inst_532:
+// rs1_val==6 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x6, 0x2, x4, 2040, x5)
+
+inst_533:
+// rs1_val==6 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x556, 0x6, 0x554, x4, 2044, x5)
+RVTEST_SIGBASE( x4,signature_x4_1)
+
+inst_534:
+// rs1_val==6 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x6, 0x0, x4, 0, x5)
+
+inst_535:
+// rs1_val==6 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x6, 0x4, x4, 4, x5)
+
+inst_536:
+// rs1_val==6 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x336, 0x6, 0x332, x4, 8, x5)
+
+inst_537:
+// rs1_val==6 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x6, 0x665, x4, 12, x5)
+
+inst_538:
+// rs1_val==6 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x2e, 0x6, 0x2c, x4, 16, x5)
+
+inst_539:
+// rs1_val==6 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x556, 0x6, 0x556, x4, 20, x5)
+
+inst_540:
+// rs1_val==6 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffaaf, 0x6, -0x555, x4, 24, x5)
+
+inst_541:
+// rs1_val==6 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x6, 0x6, x4, 28, x5)
+
+inst_542:
+// rs1_val==6 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x336, 0x6, 0x334, x4, 32, x5)
+
+inst_543:
+// rs1_val==6 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x6, 0x667, x4, 36, x5)
+
+inst_544:
+// rs1_val==6 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffd6, 0x6, -0x2c, x4, 40, x5)
+
+inst_545:
+// rs1_val==6 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x2e, 0x6, 0x2e, x4, 44, x5)
+
+inst_546:
+// rs1_val==858993460 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x33333337, 0x33333334, 0x3, x4, 48, x5)
+
+inst_547:
+// rs1_val==858993460 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x33333775, 0x33333334, 0x555, x4, 52, x5)
+
+inst_548:
+// rs1_val==858993460 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffbbe, 0x33333334, -0x556, x4, 56, x5)
+
+inst_549:
+// rs1_val==858993460 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x33333335, 0x33333334, 0x5, x4, 60, x5)
+
+inst_550:
+// rs1_val==858993460 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x33333337, 0x33333334, 0x333, x4, 64, x5)
+
+inst_551:
+// rs1_val==858993460 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x33333776, 0x33333334, 0x666, x4, 68, x5)
+
+inst_552:
+// rs1_val==858993460 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffff7, 0x33333334, -0x2d, x4, 72, x5)
+
+inst_553:
+// rs1_val==858993460 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x3333333d, 0x33333334, 0x2d, x4, 76, x5)
+
+inst_554:
+// rs1_val==858993460 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x33333336, 0x33333334, 0x2, x4, 80, x5)
+
+inst_555:
+// rs1_val==858993460 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x33333774, 0x33333334, 0x554, x4, 84, x5)
+
+inst_556:
+// rs1_val==858993460 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x33333334, 0x33333334, 0x0, x4, 88, x5)
+
+inst_557:
+// rs1_val==858993460 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x33333334, 0x33333334, 0x4, x4, 92, x5)
+
+inst_558:
+// imm_val == 1024, rs1_val == -1073741825
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x40000001; immval:0x400
+TEST_IMM_OP( ori, x11, x10, 0xbfffffff, -0x40000001, 0x400, x4, 96, x5)
+
+inst_559:
+// imm_val == -17, rs1_val == -16385
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x4001; immval:-0x11
+TEST_IMM_OP( ori, x11, x10, 0xffffffff, -0x4001, -0x11, x4, 100, x5)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_1:
+ .fill 26*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/sb-align-01.S b/riscof/suite/rv32i_m/I/sb-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..024f4715404a7dbcb4570021db134b24c9c9c813
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/sb-align-01.S
@@ -0,0 +1,424 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sb instruction of the RISC-V I extension for the sb-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sb-align)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x2, rs2==x25, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648, imm_val < 0, ea_align == 0 and (imm_val % 4) == 3
+// opcode: sb; op1:x2; op2:x25; op2val:-0x80000000; immval:-0x201; align:0
+TEST_STORE(x1,x12,0,x2,x25,-0x80000000,-0x201,0,sb,0)
+
+inst_1:
+// rs1==x22, rs2==x27, rs2_val == 0, imm_val > 0, ea_align == 0 and (imm_val % 4) == 2
+// opcode: sb; op1:x22; op2:x27; op2val:0x0; immval:0x2; align:0
+TEST_STORE(x1,x12,0,x22,x27,0x0,0x2,4,sb,0)
+
+inst_2:
+// rs1==x29, rs2==x11, rs2_val == (2**(xlen-1)-1), ea_align == 0 and (imm_val % 4) == 0, rs2_val == 2147483647
+// opcode: sb; op1:x29; op2:x11; op2val:0x7fffffff; immval:0x200; align:0
+TEST_STORE(x1,x12,0,x29,x11,0x7fffffff,0x200,8,sb,0)
+
+inst_3:
+// rs1==x31, rs2==x30, rs2_val == 1,
+// opcode: sb; op1:x31; op2:x30; op2val:0x1; immval:0x200; align:0
+TEST_STORE(x1,x12,0,x31,x30,0x1,0x200,12,sb,0)
+
+inst_4:
+// rs1==x30, rs2==x28, ea_align == 0 and (imm_val % 4) == 1, rs2_val == -262145
+// opcode: sb; op1:x30; op2:x28; op2val:-0x40001; immval:0x5; align:0
+TEST_STORE(x1,x12,0,x30,x28,-0x40001,0x5,16,sb,0)
+
+inst_5:
+// rs1==x26, rs2==x21, ea_align == 2 and (imm_val % 4) == 0, rs2_val == 4194304
+// opcode: sb; op1:x26; op2:x21; op2val:0x400000; immval:-0x400; align:2
+TEST_STORE(x1,x12,0,x26,x21,0x400000,-0x400,20,sb,2)
+
+inst_6:
+// rs1==x14, rs2==x29, ea_align == 2 and (imm_val % 4) == 1, rs2_val == -8388609
+// opcode: sb; op1:x14; op2:x29; op2val:-0x800001; immval:0x1; align:2
+TEST_STORE(x1,x12,0,x14,x29,-0x800001,0x1,24,sb,2)
+
+inst_7:
+// rs1==x23, rs2==x24, ea_align == 2 and (imm_val % 4) == 2, rs2_val == 4
+// opcode: sb; op1:x23; op2:x24; op2val:0x4; immval:-0x2; align:2
+TEST_STORE(x1,x12,0,x23,x24,0x4,-0x2,28,sb,2)
+
+inst_8:
+// rs1==x9, rs2==x4, ea_align == 2 and (imm_val % 4) == 3, rs2_val == -1431655766
+// opcode: sb; op1:x9; op2:x4; op2val:-0x55555556; immval:-0x81; align:2
+TEST_STORE(x1,x12,0,x9,x4,-0x55555556,-0x81,32,sb,2)
+
+inst_9:
+// rs1==x5, rs2==x7, ea_align == 1 and (imm_val % 4) == 0,
+// opcode: sb; op1:x5; op2:x7; op2val:-0x7; immval:0x100; align:1
+TEST_STORE(x1,x12,0,x5,x7,-0x7,0x100,36,sb,1)
+
+inst_10:
+// rs1==x28, rs2==x0, ea_align == 1 and (imm_val % 4) == 1, rs2_val == -33
+// opcode: sb; op1:x28; op2:x0; op2val:0x0; immval:0x5; align:1
+TEST_STORE(x1,x12,0,x28,x0,0x0,0x5,40,sb,1)
+
+inst_11:
+// rs1==x3, rs2==x23, ea_align == 1 and (imm_val % 4) == 2, rs2_val == -33554433
+// opcode: sb; op1:x3; op2:x23; op2val:-0x2000001; immval:-0xa; align:1
+TEST_STORE(x1,x12,0,x3,x23,-0x2000001,-0xa,44,sb,1)
+
+inst_12:
+// rs1==x21, rs2==x10, ea_align == 1 and (imm_val % 4) == 3, rs2_val == -65537
+// opcode: sb; op1:x21; op2:x10; op2val:-0x10001; immval:-0x5; align:1
+TEST_STORE(x1,x12,0,x21,x10,-0x10001,-0x5,48,sb,1)
+
+inst_13:
+// rs1==x27, rs2==x18, ea_align == 3 and (imm_val % 4) == 0, rs2_val == 8388608
+// opcode: sb; op1:x27; op2:x18; op2val:0x800000; immval:-0x4; align:3
+TEST_STORE(x1,x12,0,x27,x18,0x800000,-0x4,52,sb,3)
+
+inst_14:
+// rs1==x6, rs2==x15, ea_align == 3 and (imm_val % 4) == 1, rs2_val == -16777217
+// opcode: sb; op1:x6; op2:x15; op2val:-0x1000001; immval:0x9; align:3
+TEST_STORE(x1,x12,0,x6,x15,-0x1000001,0x9,56,sb,3)
+
+inst_15:
+// rs1==x17, rs2==x2, ea_align == 3 and (imm_val % 4) == 2,
+// opcode: sb; op1:x17; op2:x2; op2val:-0x2000001; immval:-0xa; align:3
+TEST_STORE(x1,x12,0,x17,x2,-0x2000001,-0xa,60,sb,3)
+
+inst_16:
+// rs1==x24, rs2==x5, ea_align == 3 and (imm_val % 4) == 3, rs2_val == 536870912
+// opcode: sb; op1:x24; op2:x5; op2val:0x20000000; immval:-0x81; align:3
+TEST_STORE(x1,x12,0,x24,x5,0x20000000,-0x81,64,sb,3)
+
+inst_17:
+// rs1==x11, rs2==x13, imm_val == 0, rs2_val == -32769
+// opcode: sb; op1:x11; op2:x13; op2val:-0x8001; immval:0x0; align:0
+TEST_STORE(x1,x12,0,x11,x13,-0x8001,0x0,68,sb,0)
+
+inst_18:
+// rs1==x8, rs2==x16, rs2_val == 2,
+// opcode: sb; op1:x8; op2:x16; op2val:0x2; immval:-0x1; align:0
+TEST_STORE(x1,x12,0,x8,x16,0x2,-0x1,72,sb,0)
+
+inst_19:
+// rs1==x15, rs2==x12, rs2_val == 8,
+// opcode: sb; op1:x15; op2:x12; op2val:0x8; immval:-0x7; align:0
+TEST_STORE(x1,x5,0,x15,x12,0x8,-0x7,76,sb,0)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_20:
+// rs1==x4, rs2==x20, rs2_val == 16,
+// opcode: sb; op1:x4; op2:x20; op2val:0x10; immval:-0x4; align:0
+TEST_STORE(x2,x5,0,x4,x20,0x10,-0x4,0,sb,0)
+
+inst_21:
+// rs1==x10, rs2==x1, rs2_val == 32,
+// opcode: sb; op1:x10; op2:x1; op2val:0x20; immval:-0x1; align:0
+TEST_STORE(x2,x5,0,x10,x1,0x20,-0x1,4,sb,0)
+
+inst_22:
+// rs1==x13, rs2==x3, rs2_val == 64,
+// opcode: sb; op1:x13; op2:x3; op2val:0x40; immval:0x5; align:0
+TEST_STORE(x2,x5,0,x13,x3,0x40,0x5,8,sb,0)
+
+inst_23:
+// rs1==x19, rs2==x17, rs2_val == 128,
+// opcode: sb; op1:x19; op2:x17; op2val:0x80; immval:-0x400; align:0
+TEST_STORE(x2,x5,0,x19,x17,0x80,-0x400,12,sb,0)
+
+inst_24:
+// rs1==x20, rs2==x9, rs2_val == 256,
+// opcode: sb; op1:x20; op2:x9; op2val:0x100; immval:0x3; align:0
+TEST_STORE(x2,x5,0,x20,x9,0x100,0x3,16,sb,0)
+
+inst_25:
+// rs1==x25, rs2==x26, rs2_val == 512,
+// opcode: sb; op1:x25; op2:x26; op2val:0x200; immval:-0x41; align:0
+TEST_STORE(x2,x5,0,x25,x26,0x200,-0x41,20,sb,0)
+
+inst_26:
+// rs1==x18, rs2==x22, rs2_val == 1024,
+// opcode: sb; op1:x18; op2:x22; op2val:0x400; immval:0x3ff; align:0
+TEST_STORE(x2,x5,0,x18,x22,0x400,0x3ff,24,sb,0)
+
+inst_27:
+// rs1==x7, rs2==x31, rs2_val == 2048,
+// opcode: sb; op1:x7; op2:x31; op2val:0x800; immval:0x200; align:0
+TEST_STORE(x2,x5,0,x7,x31,0x800,0x200,28,sb,0)
+
+inst_28:
+// rs1==x16, rs2==x14, rs2_val == 4096,
+// opcode: sb; op1:x16; op2:x14; op2val:0x1000; immval:-0x400; align:0
+TEST_STORE(x2,x5,0,x16,x14,0x1000,-0x400,32,sb,0)
+
+inst_29:
+// rs1==x1, rs2==x6, rs2_val == 8192,
+// opcode: sb; op1:x1; op2:x6; op2val:0x2000; immval:0x9; align:0
+TEST_STORE(x2,x5,0,x1,x6,0x2000,0x9,36,sb,0)
+
+inst_30:
+// rs1==x12, rs2==x19, rs2_val == 16384,
+// opcode: sb; op1:x12; op2:x19; op2val:0x4000; immval:0x6; align:0
+TEST_STORE(x2,x5,0,x12,x19,0x4000,0x6,40,sb,0)
+
+inst_31:
+// rs2==x8, rs2_val == 32768,
+// opcode: sb; op1:x26; op2:x8; op2val:0x8000; immval:0x7; align:0
+TEST_STORE(x2,x5,0,x26,x8,0x8000,0x7,44,sb,0)
+
+inst_32:
+// rs2_val == 65536,
+// opcode: sb; op1:x10; op2:x11; op2val:0x10000; immval:0x9; align:0
+TEST_STORE(x2,x5,0,x10,x11,0x10000,0x9,48,sb,0)
+
+inst_33:
+// rs2_val == 131072,
+// opcode: sb; op1:x10; op2:x11; op2val:0x20000; immval:-0x7; align:0
+TEST_STORE(x2,x5,0,x10,x11,0x20000,-0x7,52,sb,0)
+
+inst_34:
+// rs2_val == 262144,
+// opcode: sb; op1:x10; op2:x11; op2val:0x40000; immval:0x3; align:0
+TEST_STORE(x2,x5,0,x10,x11,0x40000,0x3,56,sb,0)
+
+inst_35:
+// rs2_val == 524288,
+// opcode: sb; op1:x10; op2:x11; op2val:0x80000; immval:-0x4; align:0
+TEST_STORE(x2,x5,0,x10,x11,0x80000,-0x4,60,sb,0)
+
+inst_36:
+// rs2_val == 1048576,
+// opcode: sb; op1:x10; op2:x11; op2val:0x100000; immval:0x7ff; align:0
+TEST_STORE(x2,x5,0,x10,x11,0x100000,0x7ff,64,sb,0)
+
+inst_37:
+// rs2_val == 2097152,
+// opcode: sb; op1:x10; op2:x11; op2val:0x200000; immval:-0x5; align:0
+TEST_STORE(x2,x5,0,x10,x11,0x200000,-0x5,68,sb,0)
+
+inst_38:
+// rs2_val == -1025,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x401; immval:0x7ff; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x401,0x7ff,72,sb,0)
+
+inst_39:
+// rs2_val == -2049,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x801; immval:-0x41; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x801,-0x41,76,sb,0)
+
+inst_40:
+// rs2_val == -4097,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x1001; immval:-0x101; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x1001,-0x101,80,sb,0)
+
+inst_41:
+// rs2_val == -8193,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x2001; immval:0x555; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x2001,0x555,84,sb,0)
+
+inst_42:
+// rs2_val == -16385,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x4001; immval:0x7ff; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x4001,0x7ff,88,sb,0)
+
+inst_43:
+// rs2_val == -131073,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x20001; immval:0x3ff; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x20001,0x3ff,92,sb,0)
+
+inst_44:
+// rs2_val == -524289,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x80001; immval:0x400; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x80001,0x400,96,sb,0)
+
+inst_45:
+// rs2_val == -1048577,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x100001; immval:0x3; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x100001,0x3,100,sb,0)
+
+inst_46:
+// rs2_val == -2097153,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x200001; immval:0x10; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x200001,0x10,104,sb,0)
+
+inst_47:
+// rs2_val == -4194305,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x400001; immval:0x0; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x400001,0x0,108,sb,0)
+
+inst_48:
+// rs2_val == -67108865,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x4000001; immval:-0x101; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x4000001,-0x101,112,sb,0)
+
+inst_49:
+// rs2_val == -134217729,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x8000001; immval:-0x401; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x8000001,-0x401,116,sb,0)
+
+inst_50:
+// rs2_val == -268435457,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x10000001; immval:-0x81; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x10000001,-0x81,120,sb,0)
+
+inst_51:
+// rs2_val == -536870913,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x20000001; immval:-0x7; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x20000001,-0x7,124,sb,0)
+
+inst_52:
+// rs2_val == -1073741825,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x40000001; immval:-0x1; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x40000001,-0x1,128,sb,0)
+
+inst_53:
+// rs2_val == 1431655765,
+// opcode: sb; op1:x10; op2:x11; op2val:0x55555555; immval:-0x81; align:0
+TEST_STORE(x2,x5,0,x10,x11,0x55555555,-0x81,132,sb,0)
+
+inst_54:
+// rs2_val == 16777216,
+// opcode: sb; op1:x10; op2:x11; op2val:0x1000000; immval:0x20; align:0
+TEST_STORE(x2,x5,0,x10,x11,0x1000000,0x20,136,sb,0)
+
+inst_55:
+// rs2_val == 33554432,
+// opcode: sb; op1:x10; op2:x11; op2val:0x2000000; immval:0x100; align:0
+TEST_STORE(x2,x5,0,x10,x11,0x2000000,0x100,140,sb,0)
+
+inst_56:
+// rs2_val == 67108864,
+// opcode: sb; op1:x10; op2:x11; op2val:0x4000000; immval:0x80; align:0
+TEST_STORE(x2,x5,0,x10,x11,0x4000000,0x80,144,sb,0)
+
+inst_57:
+// rs2_val == 134217728,
+// opcode: sb; op1:x10; op2:x11; op2val:0x8000000; immval:0x100; align:0
+TEST_STORE(x2,x5,0,x10,x11,0x8000000,0x100,148,sb,0)
+
+inst_58:
+// rs2_val == 268435456,
+// opcode: sb; op1:x10; op2:x11; op2val:0x10000000; immval:0x8; align:0
+TEST_STORE(x2,x5,0,x10,x11,0x10000000,0x8,152,sb,0)
+
+inst_59:
+// rs2_val == 1073741824,
+// opcode: sb; op1:x10; op2:x11; op2val:0x40000000; immval:-0x6; align:0
+TEST_STORE(x2,x5,0,x10,x11,0x40000000,-0x6,156,sb,0)
+
+inst_60:
+// rs2_val == -2,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x2; immval:0x3; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x2,0x3,160,sb,0)
+
+inst_61:
+// rs2_val == -3,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x3; immval:-0x1; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x3,-0x1,164,sb,0)
+
+inst_62:
+// rs2_val == -5,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x5; immval:0x10; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x5,0x10,168,sb,0)
+
+inst_63:
+// rs2_val == -9,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x9; immval:-0x3; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x9,-0x3,172,sb,0)
+
+inst_64:
+// rs2_val == -17,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x11; immval:0x400; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x11,0x400,176,sb,0)
+
+inst_65:
+// rs2_val == -65,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x41; immval:0x5; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x41,0x5,180,sb,0)
+
+inst_66:
+// rs2_val == -129,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x81; immval:0x7ff; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x81,0x7ff,184,sb,0)
+
+inst_67:
+// rs2_val == -257,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x101; immval:0x5; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x101,0x5,188,sb,0)
+
+inst_68:
+// rs2_val == -513,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x201; immval:-0x8; align:0
+TEST_STORE(x2,x5,0,x10,x11,-0x201,-0x8,192,sb,0)
+
+inst_69:
+// ea_align == 1 and (imm_val % 4) == 1, rs2_val == -33
+// opcode: sb; op1:x10; op2:x11; op2val:-0x21; immval:0x5; align:1
+TEST_STORE(x2,x5,0,x10,x11,-0x21,0x5,196,sb,1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 50*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/sh-align-01.S b/riscof/suite/rv32i_m/I/sh-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..300b87550984f12eee008a464953ea5eddb2d046
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/sh-align-01.S
@@ -0,0 +1,429 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sh instruction of the RISC-V I extension for the sh-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sh-align)
+
+RVTEST_SIGBASE( x4,signature_x4_1)
+
+inst_0:
+// rs1 != rs2, rs1==x15, rs2==x26, rs2_val == (-2**(xlen-1)), imm_val > 0, rs2_val == -2147483648, ea_align == 0 and (imm_val % 4) == 3
+// opcode: sh; op1:x15; op2:x26; op2val:-0x80000000; immval:0x7; align:0
+TEST_STORE(x4,x16,0,x15,x26,-0x80000000,0x7,0,sh,0)
+
+inst_1:
+// rs1==x10, rs2==x7, rs2_val == 0, imm_val < 0
+// opcode: sh; op1:x10; op2:x7; op2val:0x0; immval:-0x5; align:0
+TEST_STORE(x4,x16,0,x10,x7,0x0,-0x5,4,sh,0)
+
+inst_2:
+// rs1==x1, rs2==x8, rs2_val == (2**(xlen-1)-1), ea_align == 0 and (imm_val % 4) == 0, rs2_val == 2147483647
+// opcode: sh; op1:x1; op2:x8; op2val:0x7fffffff; immval:0x10; align:0
+TEST_STORE(x4,x16,0,x1,x8,0x7fffffff,0x10,8,sh,0)
+
+inst_3:
+// rs1==x22, rs2==x27, rs2_val == 1,
+// opcode: sh; op1:x22; op2:x27; op2val:0x1; immval:-0x21; align:0
+TEST_STORE(x4,x16,0,x22,x27,0x1,-0x21,12,sh,0)
+
+inst_4:
+// rs1==x14, rs2==x18, ea_align == 0 and (imm_val % 4) == 1,
+// opcode: sh; op1:x14; op2:x18; op2val:-0x40000000; immval:-0x7; align:0
+TEST_STORE(x4,x16,0,x14,x18,-0x40000000,-0x7,16,sh,0)
+
+inst_5:
+// rs1==x19, rs2==x2, ea_align == 0 and (imm_val % 4) == 2, rs2_val == -262145
+// opcode: sh; op1:x19; op2:x2; op2val:-0x40001; immval:-0xa; align:0
+TEST_STORE(x4,x16,0,x19,x2,-0x40001,-0xa,20,sh,0)
+
+inst_6:
+// rs1==x24, rs2==x9, ea_align == 2 and (imm_val % 4) == 0, rs2_val == -9
+// opcode: sh; op1:x24; op2:x9; op2val:-0x9; immval:0x8; align:2
+TEST_STORE(x4,x16,0,x24,x9,-0x9,0x8,24,sh,2)
+
+inst_7:
+// rs1==x3, rs2==x25, ea_align == 2 and (imm_val % 4) == 1, rs2_val == 1024
+// opcode: sh; op1:x3; op2:x25; op2val:0x400; immval:-0x3; align:2
+TEST_STORE(x4,x16,0,x3,x25,0x400,-0x3,28,sh,2)
+
+inst_8:
+// rs1==x11, rs2==x30, ea_align == 2 and (imm_val % 4) == 2,
+// opcode: sh; op1:x11; op2:x30; op2val:-0x40001; immval:0x2; align:2
+TEST_STORE(x4,x16,0,x11,x30,-0x40001,0x2,32,sh,2)
+
+inst_9:
+// rs1==x26, rs2==x13, ea_align == 2 and (imm_val % 4) == 3, rs2_val == 512
+// opcode: sh; op1:x26; op2:x13; op2val:0x200; immval:-0x9; align:2
+TEST_STORE(x4,x16,0,x26,x13,0x200,-0x9,36,sh,2)
+
+inst_10:
+// rs1==x6, rs2==x11, imm_val == 0,
+// opcode: sh; op1:x6; op2:x11; op2val:-0x40000000; immval:0x0; align:0
+TEST_STORE(x4,x16,0,x6,x11,-0x40000000,0x0,40,sh,0)
+
+inst_11:
+// rs1==x12, rs2==x20, rs2_val == 2,
+// opcode: sh; op1:x12; op2:x20; op2val:0x2; immval:0x0; align:0
+TEST_STORE(x4,x16,0,x12,x20,0x2,0x0,44,sh,0)
+
+inst_12:
+// rs1==x7, rs2==x14, rs2_val == 4,
+// opcode: sh; op1:x7; op2:x14; op2val:0x4; immval:0x40; align:0
+TEST_STORE(x4,x16,0,x7,x14,0x4,0x40,48,sh,0)
+
+inst_13:
+// rs1==x13, rs2==x1, rs2_val == 8,
+// opcode: sh; op1:x13; op2:x1; op2val:0x8; immval:-0x1; align:0
+TEST_STORE(x4,x16,0,x13,x1,0x8,-0x1,52,sh,0)
+
+inst_14:
+// rs1==x27, rs2==x6, rs2_val == 16,
+// opcode: sh; op1:x27; op2:x6; op2val:0x10; immval:-0x8; align:0
+TEST_STORE(x4,x16,0,x27,x6,0x10,-0x8,56,sh,0)
+
+inst_15:
+// rs1==x31, rs2==x22, rs2_val == 32,
+// opcode: sh; op1:x31; op2:x22; op2val:0x20; immval:0x40; align:0
+TEST_STORE(x4,x16,0,x31,x22,0x20,0x40,60,sh,0)
+
+inst_16:
+// rs1==x8, rs2==x21, rs2_val == 64,
+// opcode: sh; op1:x8; op2:x21; op2val:0x40; immval:-0x2; align:0
+TEST_STORE(x4,x16,0,x8,x21,0x40,-0x2,64,sh,0)
+
+inst_17:
+// rs1==x5, rs2==x28, rs2_val == 128,
+// opcode: sh; op1:x5; op2:x28; op2val:0x80; immval:-0x800; align:0
+TEST_STORE(x4,x16,0,x5,x28,0x80,-0x800,68,sh,0)
+
+inst_18:
+// rs1==x18, rs2==x15, rs2_val == 256,
+// opcode: sh; op1:x18; op2:x15; op2val:0x100; immval:0x7; align:0
+TEST_STORE(x4,x16,0,x18,x15,0x100,0x7,72,sh,0)
+
+inst_19:
+// rs1==x29, rs2==x17, rs2_val == 2048,
+// opcode: sh; op1:x29; op2:x17; op2val:0x800; immval:-0x2; align:0
+TEST_STORE(x4,x16,0,x29,x17,0x800,-0x2,76,sh,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_20:
+// rs1==x23, rs2==x3, rs2_val == 4096,
+// opcode: sh; op1:x23; op2:x3; op2val:0x1000; immval:0x7ff; align:0
+TEST_STORE(x1,x6,0,x23,x3,0x1000,0x7ff,0,sh,0)
+
+inst_21:
+// rs1==x20, rs2==x12, rs2_val == 8192,
+// opcode: sh; op1:x20; op2:x12; op2val:0x2000; immval:-0x2; align:0
+TEST_STORE(x1,x6,0,x20,x12,0x2000,-0x2,4,sh,0)
+
+inst_22:
+// rs1==x16, rs2==x29, rs2_val == 16384,
+// opcode: sh; op1:x16; op2:x29; op2val:0x4000; immval:0x3; align:0
+TEST_STORE(x1,x6,0,x16,x29,0x4000,0x3,8,sh,0)
+
+inst_23:
+// rs1==x25, rs2==x0, rs2_val == 32768,
+// opcode: sh; op1:x25; op2:x0; op2val:0x0; immval:-0x201; align:0
+TEST_STORE(x1,x6,0,x25,x0,0x0,-0x201,12,sh,0)
+
+inst_24:
+// rs1==x4, rs2==x5, rs2_val == 65536,
+// opcode: sh; op1:x4; op2:x5; op2val:0x10000; immval:0x20; align:0
+TEST_STORE(x1,x6,0,x4,x5,0x10000,0x20,16,sh,0)
+
+inst_25:
+// rs1==x30, rs2==x23, rs2_val == 131072,
+// opcode: sh; op1:x30; op2:x23; op2val:0x20000; immval:0x10; align:0
+TEST_STORE(x1,x6,0,x30,x23,0x20000,0x10,20,sh,0)
+
+inst_26:
+// rs1==x28, rs2==x24, rs2_val == 262144,
+// opcode: sh; op1:x28; op2:x24; op2val:0x40000; immval:0x0; align:0
+TEST_STORE(x1,x6,0,x28,x24,0x40000,0x0,24,sh,0)
+
+inst_27:
+// rs1==x21, rs2==x10, rs2_val == 524288,
+// opcode: sh; op1:x21; op2:x10; op2val:0x80000; immval:0x7ff; align:0
+TEST_STORE(x1,x6,0,x21,x10,0x80000,0x7ff,28,sh,0)
+
+inst_28:
+// rs1==x17, rs2==x16, rs2_val == 1048576,
+// opcode: sh; op1:x17; op2:x16; op2val:0x100000; immval:-0x401; align:0
+TEST_STORE(x1,x6,0,x17,x16,0x100000,-0x401,32,sh,0)
+
+inst_29:
+// rs1==x9, rs2==x19, rs2_val == 2097152,
+// opcode: sh; op1:x9; op2:x19; op2val:0x200000; immval:-0x556; align:0
+TEST_STORE(x1,x6,0,x9,x19,0x200000,-0x556,36,sh,0)
+
+inst_30:
+// rs1==x2, rs2==x4, rs2_val == 4194304,
+// opcode: sh; op1:x2; op2:x4; op2val:0x400000; immval:0x80; align:0
+TEST_STORE(x1,x6,0,x2,x4,0x400000,0x80,40,sh,0)
+
+inst_31:
+// rs2==x31, rs2_val == 8388608,
+// opcode: sh; op1:x29; op2:x31; op2val:0x800000; immval:0x0; align:0
+TEST_STORE(x1,x6,0,x29,x31,0x800000,0x0,44,sh,0)
+
+inst_32:
+// rs2_val == 16777216,
+// opcode: sh; op1:x10; op2:x11; op2val:0x1000000; immval:0x3ff; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x1000000,0x3ff,48,sh,0)
+
+inst_33:
+// rs2_val == 33554432,
+// opcode: sh; op1:x10; op2:x11; op2val:0x2000000; immval:0x7ff; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x2000000,0x7ff,52,sh,0)
+
+inst_34:
+// rs2_val == 67108864,
+// opcode: sh; op1:x10; op2:x11; op2val:0x4000000; immval:0x555; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x4000000,0x555,56,sh,0)
+
+inst_35:
+// rs2_val == 134217728,
+// opcode: sh; op1:x10; op2:x11; op2val:0x8000000; immval:-0x8; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x8000000,-0x8,60,sh,0)
+
+inst_36:
+// rs2_val == 268435456,
+// opcode: sh; op1:x10; op2:x11; op2val:0x10000000; immval:0x6; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x10000000,0x6,64,sh,0)
+
+inst_37:
+// rs2_val == 536870912,
+// opcode: sh; op1:x10; op2:x11; op2val:0x20000000; immval:-0x5; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x20000000,-0x5,68,sh,0)
+
+inst_38:
+// rs2_val == 1073741824,
+// opcode: sh; op1:x10; op2:x11; op2val:0x40000000; immval:-0x800; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x40000000,-0x800,72,sh,0)
+
+inst_39:
+// rs2_val == -524289,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x80001; immval:-0x101; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x80001,-0x101,76,sh,0)
+
+inst_40:
+// rs2_val == -1048577,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x100001; immval:0x40; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x100001,0x40,80,sh,0)
+
+inst_41:
+// rs2_val == -2097153,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x200001; immval:0x6; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x200001,0x6,84,sh,0)
+
+inst_42:
+// rs2_val == -4194305,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x400001; immval:0x555; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x400001,0x555,88,sh,0)
+
+inst_43:
+// rs2_val == -8388609,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x800001; immval:0x6; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x800001,0x6,92,sh,0)
+
+inst_44:
+// rs2_val == -16777217,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x1000001; immval:0x4; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x1000001,0x4,96,sh,0)
+
+inst_45:
+// rs2_val == -33554433,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x2000001; immval:-0x401; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x2000001,-0x401,100,sh,0)
+
+inst_46:
+// rs2_val == -67108865,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x4000001; immval:0x3; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x4000001,0x3,104,sh,0)
+
+inst_47:
+// rs2_val == -134217729,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x8000001; immval:0x5; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x8000001,0x5,108,sh,0)
+
+inst_48:
+// rs2_val == -268435457,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x10000001; immval:0x80; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x10000001,0x80,112,sh,0)
+
+inst_49:
+// rs2_val == -536870913,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x20000001; immval:0x10; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x20000001,0x10,116,sh,0)
+
+inst_50:
+// rs2_val == -1073741825,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x40000001; immval:-0x201; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x40000001,-0x201,120,sh,0)
+
+inst_51:
+// rs2_val == 1431655765,
+// opcode: sh; op1:x10; op2:x11; op2val:0x55555555; immval:0x40; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x55555555,0x40,124,sh,0)
+
+inst_52:
+// rs2_val == -1431655766,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x55555556; immval:-0x4; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x55555556,-0x4,128,sh,0)
+
+inst_53:
+// rs2_val == -2,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x2; immval:-0x41; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x2,-0x41,132,sh,0)
+
+inst_54:
+// rs2_val == -3,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x3; immval:-0x11; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x3,-0x11,136,sh,0)
+
+inst_55:
+// rs2_val == -5,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x5; immval:0x10; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x5,0x10,140,sh,0)
+
+inst_56:
+// rs2_val == -17,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x11; immval:0x20; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x11,0x20,144,sh,0)
+
+inst_57:
+// rs2_val == -33,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x21; immval:0x40; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x21,0x40,148,sh,0)
+
+inst_58:
+// rs2_val == -65,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x41; immval:-0x2; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x41,-0x2,152,sh,0)
+
+inst_59:
+// rs2_val == -129,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x81; immval:-0x9; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x81,-0x9,156,sh,0)
+
+inst_60:
+// rs2_val == -257,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x101; immval:-0x401; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x101,-0x401,160,sh,0)
+
+inst_61:
+// rs2_val == -513,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x201; immval:-0x3; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x201,-0x3,164,sh,0)
+
+inst_62:
+// rs2_val == -1025,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x401; immval:0x3; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x401,0x3,168,sh,0)
+
+inst_63:
+// rs2_val == -2049,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x801; immval:-0x21; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x801,-0x21,172,sh,0)
+
+inst_64:
+// rs2_val == -4097,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x1001; immval:-0x6; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x1001,-0x6,176,sh,0)
+
+inst_65:
+// rs2_val == -8193,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x2001; immval:0x10; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x2001,0x10,180,sh,0)
+
+inst_66:
+// rs2_val == -16385,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x4001; immval:-0xa; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x4001,-0xa,184,sh,0)
+
+inst_67:
+// rs2_val == -32769,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x8001; immval:0x200; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x8001,0x200,188,sh,0)
+
+inst_68:
+// rs2_val == -65537,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x10001; immval:-0x556; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x10001,-0x556,192,sh,0)
+
+inst_69:
+// rs2_val == -131073,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x20001; immval:-0x1; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x20001,-0x1,196,sh,0)
+
+inst_70:
+// rs2_val == 32768,
+// opcode: sh; op1:x10; op2:x11; op2val:0x8000; immval:-0x201; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x8000,-0x201,200,sh,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x4_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_1:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 51*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/sll-01.S b/riscof/suite/rv32i_m/I/sll-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..9b0ed636dee95e3e5162e3a491239569c9ae468f
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/sll-01.S
@@ -0,0 +1,519 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sll instruction of the RISC-V i extension for the sll covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32i")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sll)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rs2 == rd != rs1, rs1==x16, rs2==x28, rd==x28, rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == -129, rs2_val == 10
+// opcode: sll ; op1:x16; op2:x28; dest:x28; op1val:-0x81; op2val:0xa
+TEST_RR_OP(sll, x28, x16, x28, 0xfffdfc00, -0x81, 0xa, x2, 0, x9)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x21, rs2==x21, rd==x0, rs1_val > 0 and rs2_val > 0 and rs2_val < xlen, rs1_val==5
+// opcode: sll ; op1:x21; op2:x21; dest:x0; op1val:0x5; op2val:0x5
+TEST_RR_OP(sll, x0, x21, x21, 0, 0x5, 0x5, x2, 4, x9)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x18, rs2==x18, rd==x18, rs1_val < 0 and rs2_val == 0, rs1_val == -32769
+// opcode: sll ; op1:x18; op2:x18; dest:x18; op1val:-0x8001; op2val:-0x8001
+TEST_RR_OP(sll, x18, x18, x18, 0x80000000, -0x8001, -0x8001, x2, 8, x9)
+
+inst_3:
+// rs1 == rd != rs2, rs1==x5, rs2==x13, rd==x5, rs1_val > 0 and rs2_val == 0,
+// opcode: sll ; op1:x5; op2:x13; dest:x5; op1val:0x7; op2val:0x0
+TEST_RR_OP(sll, x5, x5, x13, 0x7, 0x7, 0x0, x2, 12, x9)
+
+inst_4:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x22, rs2==x12, rd==x23, rs1_val == rs2_val and rs2_val > 0 and rs2_val < xlen, rs1_val==6
+// opcode: sll ; op1:x22; op2:x12; dest:x23; op1val:0x6; op2val:0x6
+TEST_RR_OP(sll, x23, x22, x12, 0x180, 0x6, 0x6, x2, 16, x9)
+
+inst_5:
+// rs1==x19, rs2==x0, rd==x6, rs1_val == (-2**(xlen-1)) and rs2_val >= 0 and rs2_val < xlen, rs1_val == -2147483648, rs2_val == 16
+// opcode: sll ; op1:x19; op2:x0; dest:x6; op1val:-0x80000000; op2val:0x0
+TEST_RR_OP(sll, x6, x19, x0, 0x80000000, -0x80000000, 0x0, x2, 20, x9)
+
+inst_6:
+// rs1==x25, rs2==x24, rd==x13, rs1_val == 0 and rs2_val >= 0 and rs2_val < xlen, rs2_val == 4, rs1_val==0
+// opcode: sll ; op1:x25; op2:x24; dest:x13; op1val:0x0; op2val:0x4
+TEST_RR_OP(sll, x13, x25, x24, 0x0, 0x0, 0x4, x2, 24, x9)
+
+inst_7:
+// rs1==x12, rs2==x26, rd==x16, rs1_val == (2**(xlen-1)-1) and rs2_val >= 0 and rs2_val < xlen, rs1_val == 2147483647, rs2_val == 21
+// opcode: sll ; op1:x12; op2:x26; dest:x16; op1val:0x7fffffff; op2val:0x15
+TEST_RR_OP(sll, x16, x12, x26, 0xffe00000, 0x7fffffff, 0x15, x2, 28, x9)
+
+inst_8:
+// rs1==x6, rs2==x14, rd==x20, rs1_val == 1 and rs2_val >= 0 and rs2_val < xlen, rs1_val == 1
+// opcode: sll ; op1:x6; op2:x14; dest:x20; op1val:0x1; op2val:0x4
+TEST_RR_OP(sll, x20, x6, x14, 0x10, 0x1, 0x4, x2, 32, x9)
+
+inst_9:
+// rs1==x14, rs2==x1, rd==x22, rs1_val == 2, rs1_val==2
+// opcode: sll ; op1:x14; op2:x1; dest:x22; op1val:0x2; op2val:0x1f
+TEST_RR_OP(sll, x22, x14, x1, 0x0, 0x2, 0x1f, x2, 36, x9)
+
+inst_10:
+// rs1==x29, rs2==x7, rd==x21, rs1_val == 4, rs2_val == 2, rs1_val==4
+// opcode: sll ; op1:x29; op2:x7; dest:x21; op1val:0x4; op2val:0x2
+TEST_RR_OP(sll, x21, x29, x7, 0x10, 0x4, 0x2, x2, 40, x9)
+
+inst_11:
+// rs1==x31, rs2==x10, rd==x4, rs1_val == 8,
+// opcode: sll ; op1:x31; op2:x10; dest:x4; op1val:0x8; op2val:0x1f
+TEST_RR_OP(sll, x4, x31, x10, 0x0, 0x8, 0x1f, x2, 44, x9)
+
+inst_12:
+// rs1==x17, rs2==x20, rd==x7, rs1_val == 16,
+// opcode: sll ; op1:x17; op2:x20; dest:x7; op1val:0x10; op2val:0x1f
+TEST_RR_OP(sll, x7, x17, x20, 0x0, 0x10, 0x1f, x2, 48, x9)
+
+inst_13:
+// rs1==x20, rs2==x11, rd==x12, rs1_val == 32, rs2_val == 23
+// opcode: sll ; op1:x20; op2:x11; dest:x12; op1val:0x20; op2val:0x17
+TEST_RR_OP(sll, x12, x20, x11, 0x10000000, 0x20, 0x17, x2, 52, x9)
+
+inst_14:
+// rs1==x11, rs2==x22, rd==x3, rs1_val == 64,
+// opcode: sll ; op1:x11; op2:x22; dest:x3; op1val:0x40; op2val:0x11
+TEST_RR_OP(sll, x3, x11, x22, 0x800000, 0x40, 0x11, x2, 56, x9)
+
+inst_15:
+// rs1==x0, rs2==x30, rd==x24, rs1_val == 128,
+// opcode: sll ; op1:x0; op2:x30; dest:x24; op1val:0x0; op2val:0x10
+TEST_RR_OP(sll, x24, x0, x30, 0x0, 0x0, 0x10, x2, 60, x9)
+
+inst_16:
+// rs1==x3, rs2==x31, rd==x8, rs1_val == 256, rs2_val == 27
+// opcode: sll ; op1:x3; op2:x31; dest:x8; op1val:0x100; op2val:0x1b
+TEST_RR_OP(sll, x8, x3, x31, 0x0, 0x100, 0x1b, x2, 64, x9)
+
+inst_17:
+// rs1==x27, rs2==x17, rd==x10, rs1_val == 512,
+// opcode: sll ; op1:x27; op2:x17; dest:x10; op1val:0x200; op2val:0x0
+TEST_RR_OP(sll, x10, x27, x17, 0x200, 0x200, 0x0, x2, 68, x20)
+RVTEST_SIGBASE( x18,signature_x18_0)
+
+inst_18:
+// rs1==x10, rs2==x19, rd==x11, rs1_val == 1024,
+// opcode: sll ; op1:x10; op2:x19; dest:x11; op1val:0x400; op2val:0x1b
+TEST_RR_OP(sll, x11, x10, x19, 0x0, 0x400, 0x1b, x18, 0, x20)
+
+inst_19:
+// rs1==x8, rs2==x27, rd==x1, rs1_val == 2048,
+// opcode: sll ; op1:x8; op2:x27; dest:x1; op1val:0x800; op2val:0x6
+TEST_RR_OP(sll, x1, x8, x27, 0x20000, 0x800, 0x6, x18, 4, x20)
+
+inst_20:
+// rs1==x28, rs2==x9, rd==x25, rs1_val == 4096,
+// opcode: sll ; op1:x28; op2:x9; dest:x25; op1val:0x1000; op2val:0x10
+TEST_RR_OP(sll, x25, x28, x9, 0x10000000, 0x1000, 0x10, x18, 8, x20)
+
+inst_21:
+// rs1==x2, rs2==x15, rd==x27, rs1_val == 8192,
+// opcode: sll ; op1:x2; op2:x15; dest:x27; op1val:0x2000; op2val:0xd
+TEST_RR_OP(sll, x27, x2, x15, 0x4000000, 0x2000, 0xd, x18, 12, x20)
+
+inst_22:
+// rs1==x24, rs2==x29, rd==x26, rs1_val == 16384,
+// opcode: sll ; op1:x24; op2:x29; dest:x26; op1val:0x4000; op2val:0x12
+TEST_RR_OP(sll, x26, x24, x29, 0x0, 0x4000, 0x12, x18, 16, x20)
+
+inst_23:
+// rs1==x1, rs2==x23, rd==x9, rs1_val == 32768,
+// opcode: sll ; op1:x1; op2:x23; dest:x9; op1val:0x8000; op2val:0x11
+TEST_RR_OP(sll, x9, x1, x23, 0x0, 0x8000, 0x11, x18, 20, x20)
+
+inst_24:
+// rs1==x23, rs2==x16, rd==x14, rs1_val == 65536,
+// opcode: sll ; op1:x23; op2:x16; dest:x14; op1val:0x10000; op2val:0x1f
+TEST_RR_OP(sll, x14, x23, x16, 0x0, 0x10000, 0x1f, x18, 24, x20)
+
+inst_25:
+// rs1==x4, rs2==x3, rd==x17, rs1_val == 131072,
+// opcode: sll ; op1:x4; op2:x3; dest:x17; op1val:0x20000; op2val:0x13
+TEST_RR_OP(sll, x17, x4, x3, 0x0, 0x20000, 0x13, x18, 28, x20)
+
+inst_26:
+// rs1==x7, rs2==x4, rd==x15, rs1_val == 262144,
+// opcode: sll ; op1:x7; op2:x4; dest:x15; op1val:0x40000; op2val:0x17
+TEST_RR_OP(sll, x15, x7, x4, 0x0, 0x40000, 0x17, x18, 32, x20)
+
+inst_27:
+// rs1==x9, rs2==x2, rd==x29, rs1_val == 524288,
+// opcode: sll ; op1:x9; op2:x2; dest:x29; op1val:0x80000; op2val:0x13
+TEST_RR_OP(sll, x29, x9, x2, 0x0, 0x80000, 0x13, x18, 36, x20)
+
+inst_28:
+// rs1==x15, rs2==x8, rd==x31, rs1_val == 1048576,
+// opcode: sll ; op1:x15; op2:x8; dest:x31; op1val:0x100000; op2val:0xb
+TEST_RR_OP(sll, x31, x15, x8, 0x80000000, 0x100000, 0xb, x18, 40, x20)
+
+inst_29:
+// rs1==x26, rs2==x6, rd==x30, rs1_val == 2097152,
+// opcode: sll ; op1:x26; op2:x6; dest:x30; op1val:0x200000; op2val:0x1f
+TEST_RR_OP(sll, x30, x26, x6, 0x0, 0x200000, 0x1f, x18, 44, x20)
+
+inst_30:
+// rs1==x30, rs2==x5, rd==x19, rs1_val == 4194304,
+// opcode: sll ; op1:x30; op2:x5; dest:x19; op1val:0x400000; op2val:0x9
+TEST_RR_OP(sll, x19, x30, x5, 0x80000000, 0x400000, 0x9, x18, 48, x20)
+
+inst_31:
+// rs1==x13, rs2==x25, rd==x2, rs1_val == 8388608,
+// opcode: sll ; op1:x13; op2:x25; dest:x2; op1val:0x800000; op2val:0x4
+TEST_RR_OP(sll, x2, x13, x25, 0x8000000, 0x800000, 0x4, x18, 52, x20)
+
+inst_32:
+// rs1_val == 16777216,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0x2
+TEST_RR_OP(sll, x12, x10, x11, 0x4000000, 0x1000000, 0x2, x18, 56, x20)
+
+inst_33:
+// rs1_val == 33554432,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x4
+TEST_RR_OP(sll, x12, x10, x11, 0x20000000, 0x2000000, 0x4, x18, 60, x1)
+
+inst_34:
+// rs1_val == 67108864, rs2_val == 8
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x8
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x4000000, 0x8, x18, 64, x1)
+
+inst_35:
+// rs1_val == 134217728, rs2_val == 29
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x1d
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x8000000, 0x1d, x18, 68, x1)
+
+inst_36:
+// rs1_val == 268435456,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x12
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x10000000, 0x12, x18, 72, x1)
+
+inst_37:
+// rs1_val == 536870912,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0xd
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x20000000, 0xd, x18, 76, x1)
+
+inst_38:
+// rs1_val == 1073741824, rs2_val == 15
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0xf
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x40000000, 0xf, x18, 80, x1)
+
+inst_39:
+// rs1_val == -2,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x1d
+TEST_RR_OP(sll, x12, x10, x11, 0xc0000000, -0x2, 0x1d, x18, 84, x1)
+
+inst_40:
+// rs1_val == -3, rs2_val == 30
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0x1e
+TEST_RR_OP(sll, x12, x10, x11, 0x40000000, -0x3, 0x1e, x18, 88, x1)
+
+inst_41:
+// rs1_val == -5,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0x15
+TEST_RR_OP(sll, x12, x10, x11, 0xff600000, -0x5, 0x15, x18, 92, x1)
+
+inst_42:
+// rs1_val == -9,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x13
+TEST_RR_OP(sll, x12, x10, x11, 0xffb80000, -0x9, 0x13, x18, 96, x1)
+
+inst_43:
+// rs1_val == -17,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:0xa
+TEST_RR_OP(sll, x12, x10, x11, 0xffffbc00, -0x11, 0xa, x18, 100, x1)
+
+inst_44:
+// rs1_val == -33,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x8
+TEST_RR_OP(sll, x12, x10, x11, 0xffffdf00, -0x21, 0x8, x18, 104, x1)
+
+inst_45:
+// rs1_val == -65,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x6
+TEST_RR_OP(sll, x12, x10, x11, 0xffffefc0, -0x41, 0x6, x18, 108, x1)
+
+inst_46:
+// rs1_val == -257,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x3
+TEST_RR_OP(sll, x12, x10, x11, 0xfffff7f8, -0x101, 0x3, x18, 112, x1)
+
+inst_47:
+// rs1_val == -513,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x8
+TEST_RR_OP(sll, x12, x10, x11, 0xfffdff00, -0x201, 0x8, x18, 116, x1)
+
+inst_48:
+// rs1_val == -1025, rs2_val == 1
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x1
+TEST_RR_OP(sll, x12, x10, x11, 0xfffff7fe, -0x401, 0x1, x18, 120, x1)
+
+inst_49:
+// rs1_val == -2049,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x1e
+TEST_RR_OP(sll, x12, x10, x11, 0xc0000000, -0x801, 0x1e, x18, 124, x1)
+
+inst_50:
+// rs1_val == -4097,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0xa
+TEST_RR_OP(sll, x12, x10, x11, 0xffbffc00, -0x1001, 0xa, x18, 128, x1)
+
+inst_51:
+// rs1_val == -8193,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0xf
+TEST_RR_OP(sll, x12, x10, x11, 0xefff8000, -0x2001, 0xf, x18, 132, x1)
+
+inst_52:
+// rs1_val == -16385,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x15
+TEST_RR_OP(sll, x12, x10, x11, 0xffe00000, -0x4001, 0x15, x18, 136, x1)
+
+inst_53:
+// rs1_val == -65537,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x4
+TEST_RR_OP(sll, x12, x10, x11, 0xffeffff0, -0x10001, 0x4, x18, 140, x1)
+
+inst_54:
+// rs1_val == -131073,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x11
+TEST_RR_OP(sll, x12, x10, x11, 0xfffe0000, -0x20001, 0x11, x18, 144, x1)
+
+inst_55:
+// rs1_val == -262145,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0x0
+TEST_RR_OP(sll, x12, x10, x11, 0xfffbffff, -0x40001, 0x0, x18, 148, x1)
+
+inst_56:
+// rs1_val == -8388609,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x3
+TEST_RR_OP(sll, x12, x10, x11, 0xfbfffff8, -0x800001, 0x3, x18, 152, x1)
+
+inst_57:
+// rs1_val == -16777217,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0x0
+TEST_RR_OP(sll, x12, x10, x11, 0xfeffffff, -0x1000001, 0x0, x18, 156, x1)
+
+inst_58:
+// rs1_val == -33554433,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x1
+TEST_RR_OP(sll, x12, x10, x11, 0xfbfffffe, -0x2000001, 0x1, x18, 160, x1)
+
+inst_59:
+// rs1_val == -67108865,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x13
+TEST_RR_OP(sll, x12, x10, x11, 0xfff80000, -0x4000001, 0x13, x18, 164, x1)
+
+inst_60:
+// rs1_val == -134217729,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x1e
+TEST_RR_OP(sll, x12, x10, x11, 0xc0000000, -0x8000001, 0x1e, x18, 168, x1)
+
+inst_61:
+// rs1_val == -268435457,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x13
+TEST_RR_OP(sll, x12, x10, x11, 0xfff80000, -0x10000001, 0x13, x18, 172, x1)
+
+inst_62:
+// rs1_val == -536870913,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x12
+TEST_RR_OP(sll, x12, x10, x11, 0xfffc0000, -0x20000001, 0x12, x18, 176, x1)
+
+inst_63:
+// rs1_val == -1073741825,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x5
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffe0, -0x40000001, 0x5, x18, 180, x1)
+
+inst_64:
+// rs1_val == 1431655765, rs1_val==1431655765
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xc
+TEST_RR_OP(sll, x12, x10, x11, 0x55555000, 0x55555555, 0xc, x18, 184, x1)
+
+inst_65:
+// rs1_val == -1431655766, rs1_val==-1431655766
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x4
+TEST_RR_OP(sll, x12, x10, x11, 0xaaaaaaa0, -0x55555556, 0x4, x18, 188, x1)
+
+inst_66:
+// rs1_val==3,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x1b
+TEST_RR_OP(sll, x12, x10, x11, 0x18000000, 0x3, 0x1b, x18, 192, x1)
+
+inst_67:
+// rs1_val==858993459,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(sll, x12, x10, x11, 0x33333333, 0x33333333, 0x0, x18, 196, x1)
+
+inst_68:
+// rs1_val==1717986918,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb
+TEST_RR_OP(sll, x12, x10, x11, 0x33333000, 0x66666666, 0xb, x18, 200, x1)
+
+inst_69:
+// rs1_val==-46340,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x5
+TEST_RR_OP(sll, x12, x10, x11, 0xffe95f80, -0xb504, 0x5, x18, 204, x1)
+
+inst_70:
+// rs1_val==46341,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x1b
+TEST_RR_OP(sll, x12, x10, x11, 0x28000000, 0xb505, 0x1b, x18, 208, x1)
+
+inst_71:
+// rs1_val==-46339,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x1b
+TEST_RR_OP(sll, x12, x10, x11, 0xe8000000, -0xb503, 0x1b, x18, 212, x1)
+
+inst_72:
+// rs1_val==46340,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x10
+TEST_RR_OP(sll, x12, x10, x11, 0xb5040000, 0xb504, 0x10, x18, 216, x1)
+
+inst_73:
+// rs1_val==1431655764,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x1
+TEST_RR_OP(sll, x12, x10, x11, 0xaaaaaaa8, 0x55555554, 0x1, x18, 220, x1)
+
+inst_74:
+// rs1_val == -1048577,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x3
+TEST_RR_OP(sll, x12, x10, x11, 0xff7ffff8, -0x100001, 0x3, x18, 224, x1)
+
+inst_75:
+// rs1_val==1717986919,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x1d
+TEST_RR_OP(sll, x12, x10, x11, 0xe0000000, 0x66666667, 0x1d, x18, 228, x1)
+
+inst_76:
+// rs1_val==858993458,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(sll, x12, x10, x11, 0xccccccc8, 0x33333332, 0x2, x18, 232, x1)
+
+inst_77:
+// rs1_val==1717986917,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(sll, x12, x10, x11, 0x99999994, 0x66666665, 0x2, x18, 236, x1)
+
+inst_78:
+// rs1_val==46339,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb
+TEST_RR_OP(sll, x12, x10, x11, 0x5a81800, 0xb503, 0xb, x18, 240, x1)
+
+inst_79:
+// rs1_val==1431655766,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x1
+TEST_RR_OP(sll, x12, x10, x11, 0xaaaaaaac, 0x55555556, 0x1, x18, 244, x1)
+
+inst_80:
+// rs1_val==-1431655765,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb
+TEST_RR_OP(sll, x12, x10, x11, 0x55555800, -0x55555555, 0xb, x18, 248, x1)
+
+inst_81:
+// rs1_val == -524289,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x11
+TEST_RR_OP(sll, x12, x10, x11, 0xfffe0000, -0x80001, 0x11, x18, 252, x1)
+
+inst_82:
+// rs1_val==858993460,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(sll, x12, x10, x11, 0x33333340, 0x33333334, 0x4, x18, 256, x1)
+
+inst_83:
+// rs1_val == -2097153,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0x3
+TEST_RR_OP(sll, x12, x10, x11, 0xfefffff8, -0x200001, 0x3, x18, 260, x1)
+
+inst_84:
+// rs1_val == -4194305,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0x15
+TEST_RR_OP(sll, x12, x10, x11, 0xffe00000, -0x400001, 0x15, x18, 264, x1)
+
+inst_85:
+// rs1_val > 0 and rs2_val > 0 and rs2_val < xlen, rs1_val==5
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xd
+TEST_RR_OP(sll, x12, x10, x11, 0xa000, 0x5, 0xd, x18, 268, x1)
+
+inst_86:
+// rs1_val < 0 and rs2_val == 0, rs1_val == -32769
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x0
+TEST_RR_OP(sll, x12, x10, x11, 0xffff7fff, -0x8001, 0x0, x18, 272, x1)
+
+inst_87:
+// rs1_val == (-2**(xlen-1)) and rs2_val >= 0 and rs2_val < xlen, rs1_val == -2147483648, rs2_val == 16
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000; op2val:0x10
+TEST_RR_OP(sll, x12, x10, x11, 0x0, -0x80000000, 0x10, x18, 276, x1)
+
+inst_88:
+// rs1_val == 128,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0x10
+TEST_RR_OP(sll, x12, x10, x11, 0x800000, 0x80, 0x10, x18, 280, x1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 18*(XLEN/32),4,0xdeadbeef
+
+
+signature_x18_0:
+ .fill 71*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/slli-01.S b/riscof/suite/rv32i_m/I/slli-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..07af2e4cbbc43777f37bbeabbc5d6186a1ae9f81
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/slli-01.S
@@ -0,0 +1,514 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the slli instruction of the RISC-V I extension for the slli covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",slli)
+
+RVTEST_SIGBASE( x3,signature_x3_1)
+
+inst_0:
+// rs1 != rd, rs1==x17, rd==x27, rs1_val < 0 and imm_val > 0 and imm_val < xlen, rs1_val == -1073741825, imm_val == 29
+// opcode: slli ; op1:x17; dest:x27; op1val:-0x40000001; immval:0x1d
+TEST_IMM_OP( slli, x27, x17, 0xe0000000, -0x40000001, 0x1d, x3, 0, x7)
+
+inst_1:
+// rs1 == rd, rs1==x26, rd==x26, rs1_val > 0 and imm_val > 0 and imm_val < xlen, rs1_val==1717986918, imm_val == 15
+// opcode: slli ; op1:x26; dest:x26; op1val:0x66666666; immval:0xf
+TEST_IMM_OP( slli, x26, x26, 0x33330000, 0x66666666, 0xf, x3, 4, x7)
+
+inst_2:
+// rs1==x22, rd==x11, rs1_val < 0 and imm_val == 0, rs1_val == -65537
+// opcode: slli ; op1:x22; dest:x11; op1val:-0x10001; immval:0x0
+TEST_IMM_OP( slli, x11, x22, 0xfffeffff, -0x10001, 0x0, x3, 8, x7)
+
+inst_3:
+// rs1==x15, rd==x6, rs1_val > 0 and imm_val == 0, rs1_val==4, rs1_val == 4
+// opcode: slli ; op1:x15; dest:x6; op1val:0x4; immval:0x0
+TEST_IMM_OP( slli, x6, x15, 0x4, 0x4, 0x0, x3, 12, x7)
+
+inst_4:
+// rs1==x9, rd==x16, rs1_val < 0 and imm_val == (xlen-1), rs1_val == -4194305
+// opcode: slli ; op1:x9; dest:x16; op1val:-0x400001; immval:0x1f
+TEST_IMM_OP( slli, x16, x9, 0x80000000, -0x400001, 0x1f, x3, 16, x7)
+
+inst_5:
+// rs1==x11, rd==x20, rs1_val > 0 and imm_val == (xlen-1),
+// opcode: slli ; op1:x11; dest:x20; op1val:0x4; immval:0x1f
+TEST_IMM_OP( slli, x20, x11, 0x0, 0x4, 0x1f, x3, 20, x7)
+
+inst_6:
+// rs1==x1, rd==x19, rs1_val == imm_val and imm_val > 0 and imm_val < xlen, imm_val == 8, rs1_val == 8
+// opcode: slli ; op1:x1; dest:x19; op1val:0x8; immval:0x8
+TEST_IMM_OP( slli, x19, x1, 0x800, 0x8, 0x8, x3, 24, x7)
+
+inst_7:
+// rs1==x19, rd==x25, rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < xlen, rs1_val == -2147483648, imm_val == 16
+// opcode: slli ; op1:x19; dest:x25; op1val:-0x80000000; immval:0x10
+TEST_IMM_OP( slli, x25, x19, 0x0, -0x80000000, 0x10, x3, 28, x7)
+
+inst_8:
+// rs1==x8, rd==x12, rs1_val == 0 and imm_val >= 0 and imm_val < xlen, rs1_val==0
+// opcode: slli ; op1:x8; dest:x12; op1val:0x0; immval:0xc
+TEST_IMM_OP( slli, x12, x8, 0x0, 0x0, 0xc, x3, 32, x7)
+
+inst_9:
+// rs1==x27, rd==x30, rs1_val == (2**(xlen-1)-1) and imm_val >= 0 and imm_val < xlen, rs1_val == 2147483647
+// opcode: slli ; op1:x27; dest:x30; op1val:0x7fffffff; immval:0x8
+TEST_IMM_OP( slli, x30, x27, 0xffffff00, 0x7fffffff, 0x8, x3, 36, x7)
+
+inst_10:
+// rs1==x2, rd==x4, rs1_val == 1 and imm_val >= 0 and imm_val < xlen, imm_val == 1, rs1_val == 1
+// opcode: slli ; op1:x2; dest:x4; op1val:0x1; immval:0x1
+TEST_IMM_OP( slli, x4, x2, 0x2, 0x1, 0x1, x3, 40, x7)
+
+inst_11:
+// rs1==x31, rd==x14, rs1_val == 2, rs1_val==2
+// opcode: slli ; op1:x31; dest:x14; op1val:0x2; immval:0x6
+TEST_IMM_OP( slli, x14, x31, 0x80, 0x2, 0x6, x3, 44, x7)
+
+inst_12:
+// rs1==x24, rd==x17, rs1_val == 16,
+// opcode: slli ; op1:x24; dest:x17; op1val:0x10; immval:0xe
+TEST_IMM_OP( slli, x17, x24, 0x40000, 0x10, 0xe, x3, 48, x7)
+
+inst_13:
+// rs1==x4, rd==x10, rs1_val == 32,
+// opcode: slli ; op1:x4; dest:x10; op1val:0x20; immval:0x3
+TEST_IMM_OP( slli, x10, x4, 0x100, 0x20, 0x3, x3, 52, x7)
+
+inst_14:
+// rs1==x18, rd==x2, rs1_val == 64, imm_val == 21
+// opcode: slli ; op1:x18; dest:x2; op1val:0x40; immval:0x15
+TEST_IMM_OP( slli, x2, x18, 0x8000000, 0x40, 0x15, x3, 56, x7)
+
+inst_15:
+// rs1==x5, rd==x23, rs1_val == 128,
+// opcode: slli ; op1:x5; dest:x23; op1val:0x80; immval:0x15
+TEST_IMM_OP( slli, x23, x5, 0x10000000, 0x80, 0x15, x3, 60, x7)
+
+inst_16:
+// rs1==x13, rd==x8, rs1_val == 256,
+// opcode: slli ; op1:x13; dest:x8; op1val:0x100; immval:0x1
+TEST_IMM_OP( slli, x8, x13, 0x200, 0x100, 0x1, x3, 64, x7)
+
+inst_17:
+// rs1==x20, rd==x0, rs1_val == 512,
+// opcode: slli ; op1:x20; dest:x0; op1val:0x200; immval:0x0
+TEST_IMM_OP( slli, x0, x20, 0, 0x200, 0x0, x3, 68, x7)
+
+inst_18:
+// rs1==x16, rd==x9, rs1_val == 1024, imm_val == 2
+// opcode: slli ; op1:x16; dest:x9; op1val:0x400; immval:0x2
+TEST_IMM_OP( slli, x9, x16, 0x1000, 0x400, 0x2, x3, 72, x7)
+
+inst_19:
+// rs1==x21, rd==x5, rs1_val == 2048,
+// opcode: slli ; op1:x21; dest:x5; op1val:0x800; immval:0x13
+TEST_IMM_OP( slli, x5, x21, 0x40000000, 0x800, 0x13, x3, 76, x7)
+
+inst_20:
+// rs1==x23, rd==x1, rs1_val == 4096,
+// opcode: slli ; op1:x23; dest:x1; op1val:0x1000; immval:0x7
+TEST_IMM_OP( slli, x1, x23, 0x80000, 0x1000, 0x7, x3, 80, x2)
+
+inst_21:
+// rs1==x12, rd==x18, rs1_val == 8192,
+// opcode: slli ; op1:x12; dest:x18; op1val:0x2000; immval:0x10
+TEST_IMM_OP( slli, x18, x12, 0x20000000, 0x2000, 0x10, x3, 84, x2)
+
+inst_22:
+// rs1==x29, rd==x15, rs1_val == 16384,
+// opcode: slli ; op1:x29; dest:x15; op1val:0x4000; immval:0xb
+TEST_IMM_OP( slli, x15, x29, 0x2000000, 0x4000, 0xb, x3, 88, x2)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_23:
+// rs1==x3, rd==x21, rs1_val == 32768, imm_val == 23
+// opcode: slli ; op1:x3; dest:x21; op1val:0x8000; immval:0x17
+TEST_IMM_OP( slli, x21, x3, 0x0, 0x8000, 0x17, x1, 0, x2)
+
+inst_24:
+// rs1==x0, rd==x31, rs1_val == 65536,
+// opcode: slli ; op1:x0; dest:x31; op1val:0x0; immval:0x1
+TEST_IMM_OP( slli, x31, x0, 0x0, 0x0, 0x1, x1, 4, x2)
+
+inst_25:
+// rs1==x14, rd==x3, rs1_val == 131072, imm_val == 27
+// opcode: slli ; op1:x14; dest:x3; op1val:0x20000; immval:0x1b
+TEST_IMM_OP( slli, x3, x14, 0x0, 0x20000, 0x1b, x1, 8, x2)
+
+inst_26:
+// rs1==x25, rd==x24, rs1_val == 262144,
+// opcode: slli ; op1:x25; dest:x24; op1val:0x40000; immval:0x1f
+TEST_IMM_OP( slli, x24, x25, 0x0, 0x40000, 0x1f, x1, 12, x2)
+
+inst_27:
+// rs1==x30, rd==x29, rs1_val == 524288,
+// opcode: slli ; op1:x30; dest:x29; op1val:0x80000; immval:0xf
+TEST_IMM_OP( slli, x29, x30, 0x0, 0x80000, 0xf, x1, 16, x2)
+
+inst_28:
+// rs1==x28, rd==x13, rs1_val == 1048576,
+// opcode: slli ; op1:x28; dest:x13; op1val:0x100000; immval:0x17
+TEST_IMM_OP( slli, x13, x28, 0x0, 0x100000, 0x17, x1, 20, x2)
+
+inst_29:
+// rs1==x10, rd==x7, rs1_val == 2097152,
+// opcode: slli ; op1:x10; dest:x7; op1val:0x200000; immval:0x7
+TEST_IMM_OP( slli, x7, x10, 0x10000000, 0x200000, 0x7, x1, 24, x2)
+
+inst_30:
+// rs1==x7, rd==x22, rs1_val == 4194304,
+// opcode: slli ; op1:x7; dest:x22; op1val:0x400000; immval:0x1d
+TEST_IMM_OP( slli, x22, x7, 0x0, 0x400000, 0x1d, x1, 28, x2)
+
+inst_31:
+// rs1==x6, rd==x28, rs1_val == 8388608,
+// opcode: slli ; op1:x6; dest:x28; op1val:0x800000; immval:0x2
+TEST_IMM_OP( slli, x28, x6, 0x2000000, 0x800000, 0x2, x1, 32, x2)
+
+inst_32:
+// rs1_val == 16777216,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x1000000; immval:0x6
+TEST_IMM_OP( slli, x11, x10, 0x40000000, 0x1000000, 0x6, x1, 36, x2)
+
+inst_33:
+// rs1_val == 33554432,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x2000000; immval:0x5
+TEST_IMM_OP( slli, x11, x10, 0x40000000, 0x2000000, 0x5, x1, 40, x2)
+
+inst_34:
+// rs1_val == 67108864,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x4000000; immval:0x11
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x4000000, 0x11, x1, 44, x2)
+
+inst_35:
+// rs1_val == 134217728,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x8000000; immval:0x0
+TEST_IMM_OP( slli, x11, x10, 0x8000000, 0x8000000, 0x0, x1, 48, x2)
+
+inst_36:
+// rs1_val == 268435456,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x10000000; immval:0x3
+TEST_IMM_OP( slli, x11, x10, 0x80000000, 0x10000000, 0x3, x1, 52, x2)
+
+inst_37:
+// rs1_val == 536870912,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x20000000; immval:0xc
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x20000000, 0xc, x1, 56, x2)
+
+inst_38:
+// rs1_val == 1073741824,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x40000000; immval:0xb
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x40000000, 0xb, x1, 60, x2)
+
+inst_39:
+// rs1_val == -2,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x2; immval:0xe
+TEST_IMM_OP( slli, x11, x10, 0xffff8000, -0x2, 0xe, x1, 64, x2)
+
+inst_40:
+// rs1_val == -3,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x3; immval:0x1
+TEST_IMM_OP( slli, x11, x10, 0xfffffffa, -0x3, 0x1, x1, 68, x2)
+
+inst_41:
+// rs1_val == -5,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x5; immval:0x7
+TEST_IMM_OP( slli, x11, x10, 0xfffffd80, -0x5, 0x7, x1, 72, x2)
+
+inst_42:
+// rs1_val == -9, imm_val == 10
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x9; immval:0xa
+TEST_IMM_OP( slli, x11, x10, 0xffffdc00, -0x9, 0xa, x1, 76, x2)
+
+inst_43:
+// rs1_val == -17,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x11; immval:0x11
+TEST_IMM_OP( slli, x11, x10, 0xffde0000, -0x11, 0x11, x1, 80, x2)
+
+inst_44:
+// rs1_val == -33,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x21; immval:0xe
+TEST_IMM_OP( slli, x11, x10, 0xfff7c000, -0x21, 0xe, x1, 84, x2)
+
+inst_45:
+// rs1_val == -65,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x41; immval:0x13
+TEST_IMM_OP( slli, x11, x10, 0xfdf80000, -0x41, 0x13, x1, 88, x2)
+
+inst_46:
+// rs1_val == -129,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x81; immval:0x10
+TEST_IMM_OP( slli, x11, x10, 0xff7f0000, -0x81, 0x10, x1, 92, x2)
+
+inst_47:
+// rs1_val == -257,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x101; immval:0xb
+TEST_IMM_OP( slli, x11, x10, 0xfff7f800, -0x101, 0xb, x1, 96, x2)
+
+inst_48:
+// rs1_val == -513,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x201; immval:0x11
+TEST_IMM_OP( slli, x11, x10, 0xfbfe0000, -0x201, 0x11, x1, 100, x2)
+
+inst_49:
+// rs1_val == -1025,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x401; immval:0x7
+TEST_IMM_OP( slli, x11, x10, 0xfffdff80, -0x401, 0x7, x1, 104, x2)
+
+inst_50:
+// rs1_val == -2049,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x801; immval:0xf
+TEST_IMM_OP( slli, x11, x10, 0xfbff8000, -0x801, 0xf, x1, 108, x2)
+
+inst_51:
+// rs1_val == -4097,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x1001; immval:0xa
+TEST_IMM_OP( slli, x11, x10, 0xffbffc00, -0x1001, 0xa, x1, 112, x2)
+
+inst_52:
+// rs1_val == -8193,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x2001; immval:0x6
+TEST_IMM_OP( slli, x11, x10, 0xfff7ffc0, -0x2001, 0x6, x1, 116, x2)
+
+inst_53:
+// rs1_val == -16385,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x4001; immval:0x2
+TEST_IMM_OP( slli, x11, x10, 0xfffefffc, -0x4001, 0x2, x1, 120, x2)
+
+inst_54:
+// rs1_val == -32769,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x8001; immval:0x3
+TEST_IMM_OP( slli, x11, x10, 0xfffbfff8, -0x8001, 0x3, x1, 124, x2)
+
+inst_55:
+// rs1_val == -131073,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x20001; immval:0x1d
+TEST_IMM_OP( slli, x11, x10, 0xe0000000, -0x20001, 0x1d, x1, 128, x2)
+
+inst_56:
+// rs1_val == -262145,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x40001; immval:0x1d
+TEST_IMM_OP( slli, x11, x10, 0xe0000000, -0x40001, 0x1d, x1, 132, x2)
+
+inst_57:
+// rs1_val == -524289,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x80001; immval:0xc
+TEST_IMM_OP( slli, x11, x10, 0x7ffff000, -0x80001, 0xc, x1, 136, x2)
+
+inst_58:
+// rs1_val == -2097153,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x200001; immval:0x6
+TEST_IMM_OP( slli, x11, x10, 0xf7ffffc0, -0x200001, 0x6, x1, 140, x2)
+
+inst_59:
+// rs1_val == -8388609,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x800001; immval:0x13
+TEST_IMM_OP( slli, x11, x10, 0xfff80000, -0x800001, 0x13, x1, 144, x2)
+
+inst_60:
+// rs1_val == -16777217,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x1000001; immval:0x11
+TEST_IMM_OP( slli, x11, x10, 0xfffe0000, -0x1000001, 0x11, x1, 148, x2)
+
+inst_61:
+// rs1_val == -33554433,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x2000001; immval:0xf
+TEST_IMM_OP( slli, x11, x10, 0xffff8000, -0x2000001, 0xf, x1, 152, x2)
+
+inst_62:
+// rs1_val == -67108865,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x4000001; immval:0xd
+TEST_IMM_OP( slli, x11, x10, 0xffffe000, -0x4000001, 0xd, x1, 156, x2)
+
+inst_63:
+// rs1_val == -134217729,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x8000001; immval:0xe
+TEST_IMM_OP( slli, x11, x10, 0xffffc000, -0x8000001, 0xe, x1, 160, x2)
+
+inst_64:
+// rs1_val == -268435457,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x10000001; immval:0x7
+TEST_IMM_OP( slli, x11, x10, 0xffffff80, -0x10000001, 0x7, x1, 164, x2)
+
+inst_65:
+// rs1_val == -536870913,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x20000001; immval:0xb
+TEST_IMM_OP( slli, x11, x10, 0xfffff800, -0x20000001, 0xb, x1, 168, x2)
+
+inst_66:
+// rs1_val == 1431655765, rs1_val==1431655765
+// opcode: slli ; op1:x10; dest:x11; op1val:0x55555555; immval:0x11
+TEST_IMM_OP( slli, x11, x10, 0xaaaa0000, 0x55555555, 0x11, x1, 172, x2)
+
+inst_67:
+// rs1_val == -1431655766, rs1_val==-1431655766
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x17
+TEST_IMM_OP( slli, x11, x10, 0x55000000, -0x55555556, 0x17, x1, 176, x2)
+
+inst_68:
+// rs1_val==3,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x3; immval:0x13
+TEST_IMM_OP( slli, x11, x10, 0x180000, 0x3, 0x13, x1, 180, x2)
+
+inst_69:
+// rs1_val==5,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x5; immval:0x1
+TEST_IMM_OP( slli, x11, x10, 0xa, 0x5, 0x1, x1, 184, x2)
+
+inst_70:
+// rs1_val==858993459,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x33333333; immval:0x3
+TEST_IMM_OP( slli, x11, x10, 0x99999998, 0x33333333, 0x3, x1, 188, x2)
+
+inst_71:
+// rs1_val==-46340,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0xb504; immval:0x6
+TEST_IMM_OP( slli, x11, x10, 0xffd2bf00, -0xb504, 0x6, x1, 192, x2)
+
+inst_72:
+// rs1_val==1717986919,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x66666667; immval:0x17
+TEST_IMM_OP( slli, x11, x10, 0x33800000, 0x66666667, 0x17, x1, 196, x2)
+
+inst_73:
+// rs1_val==-46339,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0xb503; immval:0x6
+TEST_IMM_OP( slli, x11, x10, 0xffd2bf40, -0xb503, 0x6, x1, 200, x2)
+
+inst_74:
+// rs1_val==46341,
+// opcode: slli ; op1:x10; dest:x11; op1val:0xb505; immval:0x1f
+TEST_IMM_OP( slli, x11, x10, 0x80000000, 0xb505, 0x1f, x1, 204, x2)
+
+inst_75:
+// imm_val == 4, rs1_val==858993458
+// opcode: slli ; op1:x10; dest:x11; op1val:0x33333332; immval:0x4
+TEST_IMM_OP( slli, x11, x10, 0x33333320, 0x33333332, 0x4, x1, 208, x2)
+
+inst_76:
+// imm_val == 30,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x6; immval:0x1e
+TEST_IMM_OP( slli, x11, x10, 0x80000000, -0x6, 0x1e, x1, 212, x2)
+
+inst_77:
+// rs1_val==46340,
+// opcode: slli ; op1:x10; dest:x11; op1val:0xb504; immval:0x7
+TEST_IMM_OP( slli, x11, x10, 0x5a8200, 0xb504, 0x7, x1, 216, x2)
+
+inst_78:
+// rs1_val == -1048577,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x100001; immval:0x8
+TEST_IMM_OP( slli, x11, x10, 0xefffff00, -0x100001, 0x8, x1, 220, x2)
+
+inst_79:
+// rs1_val==1431655764,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x55555554; immval:0x3
+TEST_IMM_OP( slli, x11, x10, 0xaaaaaaa0, 0x55555554, 0x3, x1, 224, x2)
+
+inst_80:
+// rs1_val==1717986917,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x66666665; immval:0x10
+TEST_IMM_OP( slli, x11, x10, 0x66650000, 0x66666665, 0x10, x1, 228, x2)
+
+inst_81:
+// rs1_val==46339,
+// opcode: slli ; op1:x10; dest:x11; op1val:0xb503; immval:0x10
+TEST_IMM_OP( slli, x11, x10, 0xb5030000, 0xb503, 0x10, x1, 232, x2)
+
+inst_82:
+// rs1_val==1431655766,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x55555556; immval:0x17
+TEST_IMM_OP( slli, x11, x10, 0xab000000, 0x55555556, 0x17, x1, 236, x2)
+
+inst_83:
+// rs1_val==-1431655765,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x55555555; immval:0xe
+TEST_IMM_OP( slli, x11, x10, 0xaaaac000, -0x55555555, 0xe, x1, 240, x2)
+
+inst_84:
+// rs1_val==6,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x6; immval:0x1e
+TEST_IMM_OP( slli, x11, x10, 0x80000000, 0x6, 0x1e, x1, 244, x2)
+
+inst_85:
+// rs1_val==858993460,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x33333334; immval:0x1d
+TEST_IMM_OP( slli, x11, x10, 0x80000000, 0x33333334, 0x1d, x1, 248, x2)
+
+inst_86:
+// rs1_val == 512,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x200; immval:0x0
+TEST_IMM_OP( slli, x11, x10, 0x200, 0x200, 0x0, x1, 252, x2)
+
+inst_87:
+// rs1_val == 65536,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x10000; immval:0x1
+TEST_IMM_OP( slli, x11, x10, 0x20000, 0x10000, 0x1, x1, 256, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x3_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_1:
+ .fill 23*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 65*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/slt-01.S b/riscof/suite/rv32i_m/I/slt-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..46a65c502e73c4827d657c9980700efbb0be59ad
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/slt-01.S
@@ -0,0 +1,3004 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the slt instruction of the RISC-V I extension for the slt covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",slt)
+
+RVTEST_SIGBASE( x12,signature_x12_1)
+
+inst_0:
+// rs2 == rd != rs1, rs1==x18, rs2==x26, rd==x26, rs1_val > 0 and rs2_val > 0, rs1_val == rs2_val, rs1_val==1717986919 and rs2_val==1717986919
+// opcode: slt ; op1:x18; op2:x26; dest:x26; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(slt, x26, x18, x26, 0x0, 0x66666667, 0x66666667, x12, 0, x6)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x20, rs2==x20, rd==x1, rs1_val > 0 and rs2_val < 0, rs1_val != rs2_val
+// opcode: slt ; op1:x20; op2:x20; dest:x1; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(slt, x1, x20, x20, 0x0, 0x33333334, 0x33333334, x12, 4, x6)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x21, rs2==x21, rd==x21, rs1_val < 0 and rs2_val < 0, rs2_val == -9, rs1_val == -16385
+// opcode: slt ; op1:x21; op2:x21; dest:x21; op1val:-0x4001; op2val:-0x4001
+TEST_RR_OP(slt, x21, x21, x21, 0x0, -0x4001, -0x4001, x12, 8, x6)
+
+inst_3:
+// rs1 == rd != rs2, rs1==x15, rs2==x27, rd==x15, rs1_val < 0 and rs2_val > 0, rs1_val == -513
+// opcode: slt ; op1:x15; op2:x27; dest:x15; op1val:-0x201; op2val:0x5
+TEST_RR_OP(slt, x15, x15, x27, 0x1, -0x201, 0x5, x12, 12, x6)
+
+inst_4:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x5, rs2==x18, rd==x7, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648
+// opcode: slt ; op1:x5; op2:x18; dest:x7; op1val:0x33333334; op2val:-0x80000000
+TEST_RR_OP(slt, x7, x5, x18, 0x0, 0x33333334, -0x80000000, x12, 16, x6)
+
+inst_5:
+// rs1==x25, rs2==x19, rd==x17, rs2_val == 0, rs1_val == 134217728
+// opcode: slt ; op1:x25; op2:x19; dest:x17; op1val:0x8000000; op2val:0x0
+TEST_RR_OP(slt, x17, x25, x19, 0x0, 0x8000000, 0x0, x12, 20, x6)
+
+inst_6:
+// rs1==x9, rs2==x31, rd==x23, rs2_val == (2**(xlen-1)-1), rs2_val == 2147483647, rs1_val == 131072
+// opcode: slt ; op1:x9; op2:x31; dest:x23; op1val:0x20000; op2val:0x7fffffff
+TEST_RR_OP(slt, x23, x9, x31, 0x1, 0x20000, 0x7fffffff, x12, 24, x6)
+
+inst_7:
+// rs1==x2, rs2==x15, rd==x11, rs2_val == 1, rs1_val == -131073
+// opcode: slt ; op1:x2; op2:x15; dest:x11; op1val:-0x20001; op2val:0x1
+TEST_RR_OP(slt, x11, x2, x15, 0x1, -0x20001, 0x1, x12, 28, x6)
+
+inst_8:
+// rs1==x28, rs2==x13, rd==x22, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648, rs2_val == 1024
+// opcode: slt ; op1:x28; op2:x13; dest:x22; op1val:-0x80000000; op2val:0x400
+TEST_RR_OP(slt, x22, x28, x13, 0x1, -0x80000000, 0x400, x12, 32, x6)
+
+inst_9:
+// rs1==x10, rs2==x7, rd==x30, rs1_val == 0, rs2_val == 8
+// opcode: slt ; op1:x10; op2:x7; dest:x30; op1val:0x0; op2val:0x8
+TEST_RR_OP(slt, x30, x10, x7, 0x1, 0x0, 0x8, x12, 36, x6)
+
+inst_10:
+// rs1==x24, rs2==x22, rd==x5, rs1_val == (2**(xlen-1)-1), rs2_val == -257, rs1_val == 2147483647
+// opcode: slt ; op1:x24; op2:x22; dest:x5; op1val:0x7fffffff; op2val:-0x101
+TEST_RR_OP(slt, x5, x24, x22, 0x0, 0x7fffffff, -0x101, x12, 40, x6)
+
+inst_11:
+// rs1==x8, rs2==x3, rd==x24, rs1_val == 1, rs2_val == -513
+// opcode: slt ; op1:x8; op2:x3; dest:x24; op1val:0x1; op2val:-0x201
+TEST_RR_OP(slt, x24, x8, x3, 0x0, 0x1, -0x201, x12, 44, x6)
+
+inst_12:
+// rs1==x26, rs2==x9, rd==x2, rs2_val == 2, rs1_val == 268435456
+// opcode: slt ; op1:x26; op2:x9; dest:x2; op1val:0x10000000; op2val:0x2
+TEST_RR_OP(slt, x2, x26, x9, 0x0, 0x10000000, 0x2, x12, 48, x6)
+
+inst_13:
+// rs1==x4, rs2==x14, rd==x8, rs2_val == 4, rs1_val == 32768
+// opcode: slt ; op1:x4; op2:x14; dest:x8; op1val:0x8000; op2val:0x4
+TEST_RR_OP(slt, x8, x4, x14, 0x0, 0x8000, 0x4, x12, 52, x6)
+
+inst_14:
+// rs1==x6, rs2==x4, rd==x25, rs2_val == 16, rs1_val == -4097
+// opcode: slt ; op1:x6; op2:x4; dest:x25; op1val:-0x1001; op2val:0x10
+TEST_RR_OP(slt, x25, x6, x4, 0x1, -0x1001, 0x10, x12, 56, x18)
+RVTEST_SIGBASE( x15,signature_x15_0)
+
+inst_15:
+// rs1==x31, rs2==x25, rd==x14, rs2_val == 32, rs1_val == 16777216
+// opcode: slt ; op1:x31; op2:x25; dest:x14; op1val:0x1000000; op2val:0x20
+TEST_RR_OP(slt, x14, x31, x25, 0x0, 0x1000000, 0x20, x15, 0, x18)
+
+inst_16:
+// rs1==x14, rs2==x8, rd==x20, rs2_val == 64,
+// opcode: slt ; op1:x14; op2:x8; dest:x20; op1val:0x5; op2val:0x40
+TEST_RR_OP(slt, x20, x14, x8, 0x1, 0x5, 0x40, x15, 4, x18)
+
+inst_17:
+// rs1==x7, rs2==x11, rd==x19, rs2_val == 128,
+// opcode: slt ; op1:x7; op2:x11; dest:x19; op1val:0x0; op2val:0x80
+TEST_RR_OP(slt, x19, x7, x11, 0x1, 0x0, 0x80, x15, 8, x18)
+
+inst_18:
+// rs1==x19, rs2==x29, rd==x9, rs2_val == 256,
+// opcode: slt ; op1:x19; op2:x29; dest:x9; op1val:0x5; op2val:0x100
+TEST_RR_OP(slt, x9, x19, x29, 0x1, 0x5, 0x100, x15, 12, x18)
+
+inst_19:
+// rs1==x3, rs2==x23, rd==x6, rs2_val == 512, rs1_val == 4194304
+// opcode: slt ; op1:x3; op2:x23; dest:x6; op1val:0x400000; op2val:0x200
+TEST_RR_OP(slt, x6, x3, x23, 0x0, 0x400000, 0x200, x15, 16, x18)
+
+inst_20:
+// rs1==x11, rs2==x1, rd==x31, rs2_val == 2048, rs1_val == -17
+// opcode: slt ; op1:x11; op2:x1; dest:x31; op1val:-0x11; op2val:0x800
+TEST_RR_OP(slt, x31, x11, x1, 0x1, -0x11, 0x800, x15, 20, x18)
+
+inst_21:
+// rs1==x30, rs2==x16, rd==x12, rs2_val == 4096, rs1_val == -16777217
+// opcode: slt ; op1:x30; op2:x16; dest:x12; op1val:-0x1000001; op2val:0x1000
+TEST_RR_OP(slt, x12, x30, x16, 0x1, -0x1000001, 0x1000, x15, 24, x18)
+
+inst_22:
+// rs1==x13, rs2==x2, rd==x16, rs2_val == 8192,
+// opcode: slt ; op1:x13; op2:x2; dest:x16; op1val:0x0; op2val:0x2000
+TEST_RR_OP(slt, x16, x13, x2, 0x1, 0x0, 0x2000, x15, 28, x18)
+
+inst_23:
+// rs1==x22, rs2==x12, rd==x10, rs2_val == 16384, rs1_val == 32
+// opcode: slt ; op1:x22; op2:x12; dest:x10; op1val:0x20; op2val:0x4000
+TEST_RR_OP(slt, x10, x22, x12, 0x1, 0x20, 0x4000, x15, 32, x18)
+
+inst_24:
+// rs1==x29, rs2==x24, rd==x27, rs2_val == 32768, rs1_val == -2
+// opcode: slt ; op1:x29; op2:x24; dest:x27; op1val:-0x2; op2val:0x8000
+TEST_RR_OP(slt, x27, x29, x24, 0x1, -0x2, 0x8000, x15, 36, x18)
+
+inst_25:
+// rs1==x16, rs2==x30, rd==x4, rs2_val == 65536, rs1_val == -67108865
+// opcode: slt ; op1:x16; op2:x30; dest:x4; op1val:-0x4000001; op2val:0x10000
+TEST_RR_OP(slt, x4, x16, x30, 0x1, -0x4000001, 0x10000, x15, 40, x18)
+
+inst_26:
+// rs1==x17, rs2==x28, rd==x3, rs2_val == 131072, rs1_val == 4096
+// opcode: slt ; op1:x17; op2:x28; dest:x3; op1val:0x1000; op2val:0x20000
+TEST_RR_OP(slt, x3, x17, x28, 0x1, 0x1000, 0x20000, x15, 44, x18)
+
+inst_27:
+// rs1==x1, rs2==x5, rd==x13, rs2_val == 262144, rs1_val == 33554432
+// opcode: slt ; op1:x1; op2:x5; dest:x13; op1val:0x2000000; op2val:0x40000
+TEST_RR_OP(slt, x13, x1, x5, 0x0, 0x2000000, 0x40000, x15, 48, x18)
+
+inst_28:
+// rs1==x27, rs2==x10, rd==x18, rs2_val == 524288, rs1_val == -2097153
+// opcode: slt ; op1:x27; op2:x10; dest:x18; op1val:-0x200001; op2val:0x80000
+TEST_RR_OP(slt, x18, x27, x10, 0x1, -0x200001, 0x80000, x15, 52, x2)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_29:
+// rs1==x0, rs2==x17, rd==x28, rs2_val == 1048576,
+// opcode: slt ; op1:x0; op2:x17; dest:x28; op1val:0x0; op2val:0x100000
+TEST_RR_OP(slt, x28, x0, x17, 0x1, 0x0, 0x100000, x1, 0, x2)
+
+inst_30:
+// rs1==x12, rs2==x0, rd==x29, rs2_val == 2097152, rs1_val == 4
+// opcode: slt ; op1:x12; op2:x0; dest:x29; op1val:0x4; op2val:0x0
+TEST_RR_OP(slt, x29, x12, x0, 0x0, 0x4, 0x0, x1, 4, x2)
+
+inst_31:
+// rs1==x23, rs2==x6, rd==x0, rs2_val == 4194304,
+// opcode: slt ; op1:x23; op2:x6; dest:x0; op1val:0x9; op2val:0x400000
+TEST_RR_OP(slt, x0, x23, x6, 0, 0x9, 0x400000, x1, 8, x2)
+
+inst_32:
+// rs2_val == 8388608,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000; op2val:0x800000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x80000000, 0x800000, x1, 12, x2)
+
+inst_33:
+// rs2_val == 16777216, rs1_val == -129
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x1000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x81, 0x1000000, x1, 16, x2)
+
+inst_34:
+// rs2_val == 33554432, rs1_val == 262144
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0x2000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x40000, 0x2000000, x1, 20, x2)
+
+inst_35:
+// rs2_val == 67108864, rs1_val == -1431655766
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x4000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x4000000, x1, 24, x2)
+
+inst_36:
+// rs2_val == 134217728, rs1_val == -257
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x8000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x101, 0x8000000, x1, 28, x2)
+
+inst_37:
+// rs2_val == 268435456,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x10000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2000000, 0x10000000, x1, 32, x2)
+
+inst_38:
+// rs2_val == 536870912, rs1_val == -32769
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x20000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x8001, 0x20000000, x1, 36, x2)
+
+inst_39:
+// rs2_val == 1073741824,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x40000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2000000, 0x40000000, x1, 40, x2)
+
+inst_40:
+// rs2_val == -2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, -0x2, x1, 44, x2)
+
+inst_41:
+// rs2_val == -3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:-0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x7, -0x3, x1, 48, x2)
+
+inst_42:
+// rs2_val == -5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:-0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x11, -0x5, x1, 52, x2)
+
+inst_43:
+// rs2_val == -17,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x11
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x8000, -0x11, x1, 56, x2)
+
+inst_44:
+// rs2_val == -33, rs1_val == -1025
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:-0x21
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x401, -0x21, x1, 60, x2)
+
+inst_45:
+// rs2_val == -65,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:-0x41
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x11, -0x41, x1, 64, x2)
+
+inst_46:
+// rs2_val == -129,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:-0x81
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x4001, -0x81, x1, 68, x2)
+
+inst_47:
+// rs2_val == -1025, rs1_val == 524288
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:-0x401
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x80000, -0x401, x1, 72, x2)
+
+inst_48:
+// rs2_val == -2049, rs1_val == 1073741824
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:-0x801
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x40000000, -0x801, x1, 76, x2)
+
+inst_49:
+// rs2_val == -4097, rs1_val == -8388609
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:-0x1001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x800001, -0x1001, x1, 80, x2)
+
+inst_50:
+// rs2_val == -8193,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x2001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x20000, -0x2001, x1, 84, x2)
+
+inst_51:
+// rs2_val == -16385,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x9; op2val:-0x4001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x9, -0x4001, x1, 88, x2)
+
+inst_52:
+// rs2_val == -32769,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x8001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, -0x8001, x1, 92, x2)
+
+inst_53:
+// rs2_val == -65537, rs1_val == -268435457
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:-0x10001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x10000001, -0x10001, x1, 96, x2)
+
+inst_54:
+// rs2_val == -131073,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x20001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, -0x20001, x1, 100, x2)
+
+inst_55:
+// rs2_val == -262145, rs1_val == 1024
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:-0x40001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x400, -0x40001, x1, 104, x2)
+
+inst_56:
+// rs2_val == -524289,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x80001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb503, -0x80001, x1, 108, x2)
+
+inst_57:
+// rs2_val == -1048577,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x100001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, -0x100001, x1, 112, x2)
+
+inst_58:
+// rs2_val == -2097153,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:-0x200001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x1000, -0x200001, x1, 116, x2)
+
+inst_59:
+// rs2_val == -4194305,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:-0x400001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x20001, -0x400001, x1, 120, x2)
+
+inst_60:
+// rs2_val == -8388609,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:-0x800001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x401, -0x800001, x1, 124, x2)
+
+inst_61:
+// rs2_val == -16777217,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x1000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x20, -0x1000001, x1, 128, x2)
+
+inst_62:
+// rs2_val == -33554433, rs1_val == 2097152
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:-0x2000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x200000, -0x2000001, x1, 132, x2)
+
+inst_63:
+// rs2_val == -67108865, rs1_val == 1431655765
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x4000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, -0x4000001, x1, 136, x2)
+
+inst_64:
+// rs2_val == -134217729,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x6; op2val:-0x8000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x6, -0x8000001, x1, 140, x2)
+
+inst_65:
+// rs2_val == -268435457,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x10000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, -0x10000001, x1, 144, x2)
+
+inst_66:
+// rs2_val == -536870913, rs1_val == -8193
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:-0x20000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x2001, -0x20000001, x1, 148, x2)
+
+inst_67:
+// rs2_val == -1073741825,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x40000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, -0x40000001, x1, 152, x2)
+
+inst_68:
+// rs2_val == 1431655765, rs1_val==2 and rs2_val==1431655765, rs1_val == 2
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x55555555, x1, 156, x2)
+
+inst_69:
+// rs2_val == -1431655766, rs1_val==3 and rs2_val==-1431655766
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, -0x55555556, x1, 160, x2)
+
+inst_70:
+// rs1_val == 8,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0x100
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x8, 0x100, x1, 164, x2)
+
+inst_71:
+// rs1_val == 16,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x10, 0x55555556, x1, 168, x2)
+
+inst_72:
+// rs1_val == 64,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x40, -0xb504, x1, 172, x2)
+
+inst_73:
+// rs1_val == 128,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:-0x2001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x80, -0x2001, x1, 176, x2)
+
+inst_74:
+// rs1_val == 256,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x40000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x100, -0x40000001, x1, 180, x2)
+
+inst_75:
+// rs1_val == 512,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:-0x41
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x200, -0x41, x1, 184, x2)
+
+inst_76:
+// rs1_val == 2048,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:0x40000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x800, 0x40000, x1, 188, x2)
+
+inst_77:
+// rs1_val == 8192,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2000, -0x55555555, x1, 192, x2)
+
+inst_78:
+// rs1_val == 16384,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:-0x11
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4000, -0x11, x1, 196, x2)
+
+inst_79:
+// rs1_val == 65536,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x10000, 0x5, x1, 200, x2)
+
+inst_80:
+// rs1_val == 1048576,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:-0x1000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x100000, -0x1000001, x1, 204, x2)
+
+inst_81:
+// rs1_val == 8388608,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x800000, 0x33333334, x1, 208, x2)
+
+inst_82:
+// rs1_val == 67108864,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x4000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4000000, 0x4000, x1, 212, x2)
+
+inst_83:
+// rs1_val == 536870912,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:-0x2000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x20000000, -0x2000001, x1, 216, x2)
+
+inst_84:
+// rs1_val == -3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x3, -0xb504, x1, 220, x2)
+
+inst_85:
+// rs1_val == -5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0x400
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5, 0x400, x1, 224, x2)
+
+inst_86:
+// rs1_val == -9,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x9, 0x66666667, x1, 228, x2)
+
+inst_87:
+// rs1_val == -33,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x40001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x21, -0x40001, x1, 232, x2)
+
+inst_88:
+// rs1_val == -65,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x40000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x41, 0x40000000, x1, 236, x2)
+
+inst_89:
+// rs1_val == -2049,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x8
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x801, 0x8, x1, 240, x2)
+
+inst_90:
+// rs1_val == -65537,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x40001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x10001, -0x40001, x1, 244, x2)
+
+inst_91:
+// rs1_val == -262145,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:-0x20000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x40001, -0x20000001, x1, 248, x2)
+
+inst_92:
+// rs1_val == -524289,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:-0x11
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x80001, -0x11, x1, 252, x2)
+
+inst_93:
+// rs1_val == -1048577,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x100001, 0xb504, x1, 256, x2)
+
+inst_94:
+// rs1_val == -4194305,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x400001, 0x2, x1, 260, x2)
+
+inst_95:
+// rs1_val == -33554433,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x1000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x2000001, 0x1000, x1, 264, x2)
+
+inst_96:
+// rs1_val == -134217729,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x800
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x8000001, 0x800, x1, 268, x2)
+
+inst_97:
+// rs1_val == -536870913,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x20000001, 0x66666666, x1, 272, x2)
+
+inst_98:
+// rs1_val == -1073741825,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x40000001, -0xb504, x1, 276, x2)
+
+inst_99:
+// rs1_val==3 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, 0x3, x1, 280, x2)
+
+inst_100:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x55555555, x1, 284, x2)
+
+inst_101:
+// rs1_val==3 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x5, x1, 288, x2)
+
+inst_102:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x33333333, x1, 292, x2)
+
+inst_103:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x66666666, x1, 296, x2)
+
+inst_104:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, -0xb504, x1, 300, x2)
+
+inst_105:
+// rs1_val==3 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0xb504, x1, 304, x2)
+
+inst_106:
+// rs1_val==3 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, 0x2, x1, 308, x2)
+
+inst_107:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x55555554, x1, 312, x2)
+
+inst_108:
+// rs1_val==3 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, 0x0, x1, 316, x2)
+
+inst_109:
+// rs1_val==3 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x4, x1, 320, x2)
+
+inst_110:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x33333332, x1, 324, x2)
+
+inst_111:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x66666665, x1, 328, x2)
+
+inst_112:
+// rs1_val==3 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0xb503, x1, 332, x2)
+
+inst_113:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x55555556, x1, 336, x2)
+
+inst_114:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, -0x55555555, x1, 340, x2)
+
+inst_115:
+// rs1_val==3 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x6, x1, 344, x2)
+
+inst_116:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x33333334, x1, 348, x2)
+
+inst_117:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x66666667, x1, 352, x2)
+
+inst_118:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, -0xb503, x1, 356, x2)
+
+inst_119:
+// rs1_val==3 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0xb505, x1, 360, x2)
+
+inst_120:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0x3, x1, 364, x2)
+
+inst_121:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0x55555555, x1, 368, x2)
+
+inst_122:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, -0x55555556, x1, 372, x2)
+
+inst_123:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0x5, x1, 376, x2)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0x33333333, x1, 380, x2)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x55555555, 0x66666666, x1, 384, x2)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, -0xb504, x1, 388, x2)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0xb504, x1, 392, x2)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0x2, x1, 396, x2)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0x55555554, x1, 400, x2)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0x0, x1, 404, x2)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0x4, x1, 408, x2)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0x33333332, x1, 412, x2)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x55555555, 0x66666665, x1, 416, x2)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0xb503, x1, 420, x2)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x55555555, 0x55555556, x1, 424, x2)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, -0x55555555, x1, 428, x2)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0x6, x1, 432, x2)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0x33333334, x1, 436, x2)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x55555555, 0x66666667, x1, 440, x2)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, -0xb503, x1, 444, x2)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555555, 0xb505, x1, 448, x2)
+
+inst_142:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x3, x1, 452, x2)
+
+inst_143:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x55555555, x1, 456, x2)
+
+inst_144:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x55555556, -0x55555556, x1, 460, x2)
+
+inst_145:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x5, x1, 464, x2)
+
+inst_146:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x33333333, x1, 468, x2)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x66666666, x1, 472, x2)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, -0xb504, x1, 476, x2)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0xb504, x1, 480, x2)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x2, x1, 484, x2)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x55555554, x1, 488, x2)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x0, x1, 492, x2)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x4, x1, 496, x2)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x33333332, x1, 500, x2)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x66666665, x1, 504, x2)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0xb503, x1, 508, x2)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x55555556, x1, 512, x2)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, -0x55555555, x1, 516, x2)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x6, x1, 520, x2)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x33333334, x1, 524, x2)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0x66666667, x1, 528, x2)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, -0xb503, x1, 532, x2)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555556, 0xb505, x1, 536, x2)
+
+inst_164:
+// rs1_val==5 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, 0x3, x1, 540, x2)
+
+inst_165:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x55555555, x1, 544, x2)
+
+inst_166:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, -0x55555556, x1, 548, x2)
+
+inst_167:
+// rs1_val==5 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, 0x5, x1, 552, x2)
+
+inst_168:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x33333333, x1, 556, x2)
+
+inst_169:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x66666666, x1, 560, x2)
+
+inst_170:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, -0xb504, x1, 564, x2)
+
+inst_171:
+// rs1_val==5 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0xb504, x1, 568, x2)
+
+inst_172:
+// rs1_val==5 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, 0x2, x1, 572, x2)
+
+inst_173:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x55555554, x1, 576, x2)
+
+inst_174:
+// rs1_val==5 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, 0x0, x1, 580, x2)
+
+inst_175:
+// rs1_val==5 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, 0x4, x1, 584, x2)
+
+inst_176:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x33333332, x1, 588, x2)
+
+inst_177:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x66666665, x1, 592, x2)
+
+inst_178:
+// rs1_val==5 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0xb503, x1, 596, x2)
+
+inst_179:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x55555556, x1, 600, x2)
+
+inst_180:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, -0x55555555, x1, 604, x2)
+
+inst_181:
+// rs1_val==5 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x6, x1, 608, x2)
+
+inst_182:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x33333334, x1, 612, x2)
+
+inst_183:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x66666667, x1, 616, x2)
+
+inst_184:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, -0xb503, x1, 620, x2)
+
+inst_185:
+// rs1_val==5 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0xb505, x1, 624, x2)
+
+inst_186:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, 0x3, x1, 628, x2)
+
+inst_187:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333333, 0x55555555, x1, 632, x2)
+
+inst_188:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, -0x55555556, x1, 636, x2)
+
+inst_189:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, 0x5, x1, 640, x2)
+
+inst_190:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, 0x33333333, x1, 644, x2)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333333, 0x66666666, x1, 648, x2)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, -0xb504, x1, 652, x2)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, 0xb504, x1, 656, x2)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, 0x2, x1, 660, x2)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333333, 0x55555554, x1, 664, x2)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, 0x0, x1, 668, x2)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, 0x4, x1, 672, x2)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, 0x33333332, x1, 676, x2)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333333, 0x66666665, x1, 680, x2)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, 0xb503, x1, 684, x2)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333333, 0x55555556, x1, 688, x2)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, -0x55555555, x1, 692, x2)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, 0x6, x1, 696, x2)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333333, 0x33333334, x1, 700, x2)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333333, 0x66666667, x1, 704, x2)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, -0xb503, x1, 708, x2)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333333, 0xb505, x1, 712, x2)
+
+inst_208:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x3, x1, 716, x2)
+
+inst_209:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x55555555, x1, 720, x2)
+
+inst_210:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, -0x55555556, x1, 724, x2)
+
+inst_211:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x5, x1, 728, x2)
+
+inst_212:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x33333333, x1, 732, x2)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x66666666, x1, 736, x2)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, -0xb504, x1, 740, x2)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0xb504, x1, 744, x2)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x2, x1, 748, x2)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x55555554, x1, 752, x2)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x0, x1, 756, x2)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x4, x1, 760, x2)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x33333332, x1, 764, x2)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x66666665, x1, 768, x2)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0xb503, x1, 772, x2)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x55555556, x1, 776, x2)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, -0x55555555, x1, 780, x2)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x6, x1, 784, x2)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0x33333334, x1, 788, x2)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x66666666, 0x66666667, x1, 792, x2)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, -0xb503, x1, 796, x2)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666666, 0xb505, x1, 800, x2)
+
+inst_230:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x3, x1, 804, x2)
+
+inst_231:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x55555555, x1, 808, x2)
+
+inst_232:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb504, -0x55555556, x1, 812, x2)
+
+inst_233:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x5, x1, 816, x2)
+
+inst_234:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x33333333, x1, 820, x2)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x66666666, x1, 824, x2)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb504, -0xb504, x1, 828, x2)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0xb504, x1, 832, x2)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x2, x1, 836, x2)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x55555554, x1, 840, x2)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x0, x1, 844, x2)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x4, x1, 848, x2)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x33333332, x1, 852, x2)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x66666665, x1, 856, x2)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0xb503, x1, 860, x2)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x55555556, x1, 864, x2)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb504, -0x55555555, x1, 868, x2)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x6, x1, 872, x2)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x33333334, x1, 876, x2)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0x66666667, x1, 880, x2)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, -0xb503, x1, 884, x2)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504, 0xb505, x1, 888, x2)
+
+inst_252:
+// rs1_val==46340 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504, 0x3, x1, 892, x2)
+
+inst_253:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504, 0x55555555, x1, 896, x2)
+
+inst_254:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504, -0x55555556, x1, 900, x2)
+
+inst_255:
+// rs1_val==46340 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504, 0x5, x1, 904, x2)
+
+inst_256:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504, 0x33333333, x1, 908, x2)
+
+inst_257:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504, 0x66666666, x1, 912, x2)
+
+inst_258:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504, -0xb504, x1, 916, x2)
+
+inst_259:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504, 0xb504, x1, 920, x2)
+
+inst_260:
+// rs1_val==46340 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504, 0x2, x1, 924, x2)
+
+inst_261:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504, 0x55555554, x1, 928, x2)
+
+inst_262:
+// rs1_val==46340 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504, 0x0, x1, 932, x2)
+
+inst_263:
+// rs1_val==46340 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504, 0x4, x1, 936, x2)
+
+inst_264:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504, 0x33333332, x1, 940, x2)
+
+inst_265:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504, 0x66666665, x1, 944, x2)
+
+inst_266:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504, 0xb503, x1, 948, x2)
+
+inst_267:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504, 0x55555556, x1, 952, x2)
+
+inst_268:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504, -0x55555555, x1, 956, x2)
+
+inst_269:
+// rs1_val==46340 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504, 0x6, x1, 960, x2)
+
+inst_270:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504, 0x33333334, x1, 964, x2)
+
+inst_271:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504, 0x66666667, x1, 968, x2)
+
+inst_272:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504, -0xb503, x1, 972, x2)
+
+inst_273:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504, 0xb505, x1, 976, x2)
+
+inst_274:
+// rs1_val==2 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x3, x1, 980, x2)
+
+inst_275:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2, -0x55555556, x1, 984, x2)
+
+inst_276:
+// rs1_val==2 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x5, x1, 988, x2)
+
+inst_277:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x33333333, x1, 992, x2)
+
+inst_278:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x66666666, x1, 996, x2)
+
+inst_279:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2, -0xb504, x1, 1000, x2)
+
+inst_280:
+// rs1_val==2 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0xb504, x1, 1004, x2)
+
+inst_281:
+// rs1_val==2 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2, 0x2, x1, 1008, x2)
+
+inst_282:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x55555554, x1, 1012, x2)
+
+inst_283:
+// rs1_val==2 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2, 0x0, x1, 1016, x2)
+
+inst_284:
+// rs1_val==2 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x4, x1, 1020, x2)
+
+inst_285:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x33333332, x1, 1024, x2)
+
+inst_286:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x66666665, x1, 1028, x2)
+
+inst_287:
+// rs1_val==2 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0xb503, x1, 1032, x2)
+
+inst_288:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x55555556, x1, 1036, x2)
+
+inst_289:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2, -0x55555555, x1, 1040, x2)
+
+inst_290:
+// rs1_val==2 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x6, x1, 1044, x2)
+
+inst_291:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x33333334, x1, 1048, x2)
+
+inst_292:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x66666667, x1, 1052, x2)
+
+inst_293:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2, -0xb503, x1, 1056, x2)
+
+inst_294:
+// rs1_val==2 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0xb505, x1, 1060, x2)
+
+inst_295:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, 0x3, x1, 1064, x2)
+
+inst_296:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x55555554, 0x55555555, x1, 1068, x2)
+
+inst_297:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, -0x55555556, x1, 1072, x2)
+
+inst_298:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, 0x5, x1, 1076, x2)
+
+inst_299:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, 0x33333333, x1, 1080, x2)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x55555554, 0x66666666, x1, 1084, x2)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, -0xb504, x1, 1088, x2)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, 0xb504, x1, 1092, x2)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, 0x2, x1, 1096, x2)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, 0x55555554, x1, 1100, x2)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, 0x0, x1, 1104, x2)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, 0x4, x1, 1108, x2)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, 0x33333332, x1, 1112, x2)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x55555554, 0x66666665, x1, 1116, x2)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, 0xb503, x1, 1120, x2)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x55555554, 0x55555556, x1, 1124, x2)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, -0x55555555, x1, 1128, x2)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, 0x6, x1, 1132, x2)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, 0x33333334, x1, 1136, x2)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x55555554, 0x66666667, x1, 1140, x2)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, -0xb503, x1, 1144, x2)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555554, 0xb505, x1, 1148, x2)
+
+inst_317:
+// rs1_val==0 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x3, x1, 1152, x2)
+
+inst_318:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x55555555, x1, 1156, x2)
+
+inst_319:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x0, -0x55555556, x1, 1160, x2)
+
+inst_320:
+// rs1_val==0 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x5, x1, 1164, x2)
+
+inst_321:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x33333333, x1, 1168, x2)
+
+inst_322:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x66666666, x1, 1172, x2)
+
+inst_323:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x0, -0xb504, x1, 1176, x2)
+
+inst_324:
+// rs1_val==0 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0xb504, x1, 1180, x2)
+
+inst_325:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x55555555, -0x55555555, x1, 1184, x2)
+
+inst_326:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x6, x1, 1188, x2)
+
+inst_327:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x33333334, x1, 1192, x2)
+
+inst_328:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x66666667, x1, 1196, x2)
+
+inst_329:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, -0xb503, x1, 1200, x2)
+
+inst_330:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0xb505, x1, 1204, x2)
+
+inst_331:
+// rs1_val==6 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, 0x3, x1, 1208, x2)
+
+inst_332:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x55555555, x1, 1212, x2)
+
+inst_333:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, -0x55555556, x1, 1216, x2)
+
+inst_334:
+// rs1_val==6 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, 0x5, x1, 1220, x2)
+
+inst_335:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x33333333, x1, 1224, x2)
+
+inst_336:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x66666666, x1, 1228, x2)
+
+inst_337:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, -0xb504, x1, 1232, x2)
+
+inst_338:
+// rs1_val==6 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0xb504, x1, 1236, x2)
+
+inst_339:
+// rs1_val==6 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, 0x2, x1, 1240, x2)
+
+inst_340:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x55555554, x1, 1244, x2)
+
+inst_341:
+// rs1_val==6 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, 0x0, x1, 1248, x2)
+
+inst_342:
+// rs1_val==6 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, 0x4, x1, 1252, x2)
+
+inst_343:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x33333332, x1, 1256, x2)
+
+inst_344:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x66666665, x1, 1260, x2)
+
+inst_345:
+// rs1_val==6 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0xb503, x1, 1264, x2)
+
+inst_346:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x55555556, x1, 1268, x2)
+
+inst_347:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, -0x55555555, x1, 1272, x2)
+
+inst_348:
+// rs1_val==6 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, 0x6, x1, 1276, x2)
+
+inst_349:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x33333334, x1, 1280, x2)
+
+inst_350:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x66666667, x1, 1284, x2)
+
+inst_351:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, -0xb503, x1, 1288, x2)
+
+inst_352:
+// rs1_val==6 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0xb505, x1, 1292, x2)
+
+inst_353:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, 0x3, x1, 1296, x2)
+
+inst_354:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333334, 0x55555555, x1, 1300, x2)
+
+inst_355:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, -0x55555556, x1, 1304, x2)
+
+inst_356:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, 0x5, x1, 1308, x2)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, 0x33333333, x1, 1312, x2)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333334, 0x66666666, x1, 1316, x2)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, -0xb504, x1, 1320, x2)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, 0xb504, x1, 1324, x2)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, 0x2, x1, 1328, x2)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333334, 0x55555554, x1, 1332, x2)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, 0x0, x1, 1336, x2)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, 0x4, x1, 1340, x2)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, 0x33333332, x1, 1344, x2)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333334, 0x66666665, x1, 1348, x2)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, 0xb503, x1, 1352, x2)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333334, 0x55555556, x1, 1356, x2)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, -0x55555555, x1, 1360, x2)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, 0x6, x1, 1364, x2)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, 0x33333334, x1, 1368, x2)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333334, 0x66666667, x1, 1372, x2)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, -0xb503, x1, 1376, x2)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333334, 0xb505, x1, 1380, x2)
+
+inst_375:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x3, x1, 1384, x2)
+
+inst_376:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x55555555, x1, 1388, x2)
+
+inst_377:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, -0x55555556, x1, 1392, x2)
+
+inst_378:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x5, x1, 1396, x2)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x33333333, x1, 1400, x2)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x66666666, x1, 1404, x2)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, -0xb504, x1, 1408, x2)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0xb504, x1, 1412, x2)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x2, x1, 1416, x2)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x55555554, x1, 1420, x2)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x0, x1, 1424, x2)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x4, x1, 1428, x2)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x33333332, x1, 1432, x2)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x66666665, x1, 1436, x2)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0xb503, x1, 1440, x2)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x55555556, x1, 1444, x2)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, -0x55555555, x1, 1448, x2)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x6, x1, 1452, x2)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0x33333334, x1, 1456, x2)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, -0xb503, x1, 1460, x2)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666667, 0xb505, x1, 1464, x2)
+
+inst_396:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x3, x1, 1468, x2)
+
+inst_397:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x55555555, x1, 1472, x2)
+
+inst_398:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb503, -0x55555556, x1, 1476, x2)
+
+inst_399:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x5, x1, 1480, x2)
+
+inst_400:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x33333333, x1, 1484, x2)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x66666666, x1, 1488, x2)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb503, -0xb504, x1, 1492, x2)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0xb504, x1, 1496, x2)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x2, x1, 1500, x2)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x55555554, x1, 1504, x2)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x0, x1, 1508, x2)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x4, x1, 1512, x2)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x33333332, x1, 1516, x2)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x66666665, x1, 1520, x2)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0xb503, x1, 1524, x2)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x55555556, x1, 1528, x2)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb503, -0x55555555, x1, 1532, x2)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x6, x1, 1536, x2)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x33333334, x1, 1540, x2)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0x66666667, x1, 1544, x2)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb503, -0xb503, x1, 1548, x2)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb503, 0xb505, x1, 1552, x2)
+
+inst_418:
+// rs1_val==46341 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, 0x3, x1, 1556, x2)
+
+inst_419:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb505, 0x55555555, x1, 1560, x2)
+
+inst_420:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, -0x55555556, x1, 1564, x2)
+
+inst_421:
+// rs1_val==46341 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, 0x5, x1, 1568, x2)
+
+inst_422:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb505, 0x33333333, x1, 1572, x2)
+
+inst_423:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb505, 0x66666666, x1, 1576, x2)
+
+inst_424:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, -0xb504, x1, 1580, x2)
+
+inst_425:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, 0xb504, x1, 1584, x2)
+
+inst_426:
+// rs1_val==46341 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, 0x2, x1, 1588, x2)
+
+inst_427:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb505, 0x55555554, x1, 1592, x2)
+
+inst_428:
+// rs1_val==46341 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, 0x0, x1, 1596, x2)
+
+inst_429:
+// rs1_val==46341 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, 0x4, x1, 1600, x2)
+
+inst_430:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb505, 0x33333332, x1, 1604, x2)
+
+inst_431:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb505, 0x66666665, x1, 1608, x2)
+
+inst_432:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, 0xb503, x1, 1612, x2)
+
+inst_433:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb505, 0x55555556, x1, 1616, x2)
+
+inst_434:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, -0x55555555, x1, 1620, x2)
+
+inst_435:
+// rs1_val==46341 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, 0x6, x1, 1624, x2)
+
+inst_436:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb505, 0x33333334, x1, 1628, x2)
+
+inst_437:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb505, 0x66666667, x1, 1632, x2)
+
+inst_438:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, -0xb503, x1, 1636, x2)
+
+inst_439:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb505, 0xb505, x1, 1640, x2)
+
+inst_440:
+// rs1_val==0 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x2, x1, 1644, x2)
+
+inst_441:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x55555554, x1, 1648, x2)
+
+inst_442:
+// rs1_val==0 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x0, 0x0, x1, 1652, x2)
+
+inst_443:
+// rs1_val==0 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x4, x1, 1656, x2)
+
+inst_444:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x33333332, x1, 1660, x2)
+
+inst_445:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x66666665, x1, 1664, x2)
+
+inst_446:
+// rs1_val==0 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0xb503, x1, 1668, x2)
+
+inst_447:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x55555556, x1, 1672, x2)
+
+inst_448:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x0, -0x55555555, x1, 1676, x2)
+
+inst_449:
+// rs1_val==0 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x6, x1, 1680, x2)
+
+inst_450:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x33333334, x1, 1684, x2)
+
+inst_451:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x66666667, x1, 1688, x2)
+
+inst_452:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x0, -0xb503, x1, 1692, x2)
+
+inst_453:
+// rs1_val==0 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0xb505, x1, 1696, x2)
+
+inst_454:
+// rs1_val==4 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, 0x3, x1, 1700, x2)
+
+inst_455:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x55555555, x1, 1704, x2)
+
+inst_456:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, -0x55555556, x1, 1708, x2)
+
+inst_457:
+// rs1_val==4 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x5, x1, 1712, x2)
+
+inst_458:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x33333333, x1, 1716, x2)
+
+inst_459:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x66666666, x1, 1720, x2)
+
+inst_460:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, -0xb504, x1, 1724, x2)
+
+inst_461:
+// rs1_val==4 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0xb504, x1, 1728, x2)
+
+inst_462:
+// rs1_val==4 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, 0x2, x1, 1732, x2)
+
+inst_463:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x55555554, x1, 1736, x2)
+
+inst_464:
+// rs1_val==4 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, 0x0, x1, 1740, x2)
+
+inst_465:
+// rs1_val==4 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, 0x4, x1, 1744, x2)
+
+inst_466:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x33333332, x1, 1748, x2)
+
+inst_467:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x66666665, x1, 1752, x2)
+
+inst_468:
+// rs1_val==4 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0xb503, x1, 1756, x2)
+
+inst_469:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x55555556, x1, 1760, x2)
+
+inst_470:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, -0x55555555, x1, 1764, x2)
+
+inst_471:
+// rs1_val==4 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x6, x1, 1768, x2)
+
+inst_472:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x33333334, x1, 1772, x2)
+
+inst_473:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x66666667, x1, 1776, x2)
+
+inst_474:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, -0xb503, x1, 1780, x2)
+
+inst_475:
+// rs1_val==4 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0xb505, x1, 1784, x2)
+
+inst_476:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, 0x3, x1, 1788, x2)
+
+inst_477:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333332, 0x55555555, x1, 1792, x2)
+
+inst_478:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, -0x55555556, x1, 1796, x2)
+
+inst_479:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, 0x5, x1, 1800, x2)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333332, 0x33333333, x1, 1804, x2)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333332, 0x66666666, x1, 1808, x2)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, -0xb504, x1, 1812, x2)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, 0xb504, x1, 1816, x2)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, 0x2, x1, 1820, x2)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333332, 0x55555554, x1, 1824, x2)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, 0x0, x1, 1828, x2)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, 0x4, x1, 1832, x2)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, 0x33333332, x1, 1836, x2)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333332, 0x66666665, x1, 1840, x2)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, 0xb503, x1, 1844, x2)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333332, 0x55555556, x1, 1848, x2)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, -0x55555555, x1, 1852, x2)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, 0x6, x1, 1856, x2)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333332, 0x33333334, x1, 1860, x2)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x33333332, 0x66666667, x1, 1864, x2)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, -0xb503, x1, 1868, x2)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x33333332, 0xb505, x1, 1872, x2)
+
+inst_498:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0x3, x1, 1876, x2)
+
+inst_499:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0x55555555, x1, 1880, x2)
+
+inst_500:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, -0x55555556, x1, 1884, x2)
+
+inst_501:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0x5, x1, 1888, x2)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0x33333333, x1, 1892, x2)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x66666665, 0x66666666, x1, 1896, x2)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, -0xb504, x1, 1900, x2)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0xb504, x1, 1904, x2)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0x2, x1, 1908, x2)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0x55555554, x1, 1912, x2)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0x0, x1, 1916, x2)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0x4, x1, 1920, x2)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0x33333332, x1, 1924, x2)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0x66666665, x1, 1928, x2)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0xb503, x1, 1932, x2)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0x55555556, x1, 1936, x2)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, -0x55555555, x1, 1940, x2)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0x6, x1, 1944, x2)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0x33333334, x1, 1948, x2)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x66666665, 0x66666667, x1, 1952, x2)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, -0xb503, x1, 1956, x2)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x66666665, 0xb505, x1, 1960, x2)
+
+inst_520:
+// rs1_val==46339 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb503, 0x3, x1, 1964, x2)
+
+inst_521:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb503, 0x55555555, x1, 1968, x2)
+
+inst_522:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb503, -0x55555556, x1, 1972, x2)
+
+inst_523:
+// rs1_val==46339 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb503, 0x5, x1, 1976, x2)
+
+inst_524:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb503, 0x33333333, x1, 1980, x2)
+
+inst_525:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb503, 0x66666666, x1, 1984, x2)
+
+inst_526:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb503, -0xb504, x1, 1988, x2)
+
+inst_527:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb503, 0xb504, x1, 1992, x2)
+
+inst_528:
+// rs1_val==46339 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb503, 0x2, x1, 1996, x2)
+
+inst_529:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb503, 0x55555554, x1, 2000, x2)
+
+inst_530:
+// rs1_val==46339 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb503, 0x0, x1, 2004, x2)
+
+inst_531:
+// rs1_val==46339 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb503, 0x4, x1, 2008, x2)
+
+inst_532:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb503, 0x33333332, x1, 2012, x2)
+
+inst_533:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb503, 0x66666665, x1, 2016, x2)
+
+inst_534:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb503, 0xb503, x1, 2020, x2)
+
+inst_535:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb503, 0x55555556, x1, 2024, x2)
+
+inst_536:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb503, -0x55555555, x1, 2028, x2)
+
+inst_537:
+// rs1_val==46339 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb503, 0x6, x1, 2032, x2)
+
+inst_538:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb503, 0x33333334, x1, 2036, x2)
+
+inst_539:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb503, 0x66666667, x1, 2040, x2)
+
+inst_540:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb503, -0xb503, x1, 2044, x2)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_541:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb503, 0xb505, x1, 0, x2)
+
+inst_542:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0x3, x1, 4, x2)
+
+inst_543:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0x55555555, x1, 8, x2)
+
+inst_544:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, -0x55555556, x1, 12, x2)
+
+inst_545:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0x5, x1, 16, x2)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0x33333333, x1, 20, x2)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x55555556, 0x66666666, x1, 24, x2)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, -0xb504, x1, 28, x2)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0xb504, x1, 32, x2)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0x2, x1, 36, x2)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0x55555554, x1, 40, x2)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0x0, x1, 44, x2)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0x4, x1, 48, x2)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0x33333332, x1, 52, x2)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x55555556, 0x66666665, x1, 56, x2)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0xb503, x1, 60, x2)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0x55555556, x1, 64, x2)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, -0x55555555, x1, 68, x2)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0x6, x1, 72, x2)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0x33333334, x1, 76, x2)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x55555556, 0x66666667, x1, 80, x2)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, -0xb503, x1, 84, x2)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x55555556, 0xb505, x1, 88, x2)
+
+inst_564:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x3, x1, 92, x2)
+
+inst_565:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x55555555, x1, 96, x2)
+
+inst_566:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x55555555, -0x55555556, x1, 100, x2)
+
+inst_567:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x5, x1, 104, x2)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x33333333, x1, 108, x2)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x66666666, x1, 112, x2)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, -0xb504, x1, 116, x2)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb504
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0xb504, x1, 120, x2)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x2, x1, 124, x2)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x55555554, x1, 128, x2)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x0, x1, 132, x2)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x4, x1, 136, x2)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x33333332, x1, 140, x2)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x66666665, x1, 144, x2)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb503
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0xb503, x1, 148, x2)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x55555555, 0x55555556, x1, 152, x2)
+
+inst_580:
+// rs1_val < 0 and rs2_val < 0, rs2_val == -9, rs1_val == -16385
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:-0x9
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x4001, -0x9, x1, 156, x2)
+
+inst_581:
+// rs2_val == 1048576,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x100000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x4001, 0x100000, x1, 160, x2)
+
+inst_582:
+// rs2_val == 2097152, rs1_val == 4
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x200000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x200000, x1, 164, x2)
+
+inst_583:
+// rs2_val == 4194304,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x9; op2val:0x400000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x9, 0x400000, x1, 168, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x12_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x12_1:
+ .fill 15*(XLEN/32),4,0xdeadbeef
+
+
+signature_x15_0:
+ .fill 14*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 43*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/slti-01.S b/riscof/suite/rv32i_m/I/slti-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..0b58bd711e356d6b3220ae57b1229a2ccf1622ef
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/slti-01.S
@@ -0,0 +1,2879 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the slti instruction of the RISC-V I extension for the slti covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",slti)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rs1 != rd, rs1==x25, rd==x12, imm_val == (-2**(12-1)), imm_val == -2048, rs1_val != imm_val, rs1_val == -129, rs1_val < 0 and imm_val < 0
+// opcode: slti ; op1:x25; dest:x12; op1val:-0x81; immval:-0x800
+TEST_IMM_OP( slti, x12, x25, 0x0, -0x81, -0x800, x2, 0, x19)
+
+inst_1:
+// rs1 == rd, rs1==x5, rd==x5, imm_val == 0, rs1_val == -4097
+// opcode: slti ; op1:x5; dest:x5; op1val:-0x1001; immval:0x0
+TEST_IMM_OP( slti, x5, x5, 0x1, -0x1001, 0x0, x2, 4, x19)
+
+inst_2:
+// rs1==x4, rd==x28, imm_val == (2**(12-1)-1), rs1_val < 0 and imm_val > 0, imm_val == 2047
+// opcode: slti ; op1:x4; dest:x28; op1val:-0x40000000; immval:0x7ff
+TEST_IMM_OP( slti, x28, x4, 0x1, -0x40000000, 0x7ff, x2, 8, x19)
+
+inst_3:
+// rs1==x31, rd==x15, imm_val == 1, rs1_val == -17
+// opcode: slti ; op1:x31; dest:x15; op1val:-0x11; immval:0x1
+TEST_IMM_OP( slti, x15, x31, 0x1, -0x11, 0x1, x2, 12, x19)
+
+inst_4:
+// rs1==x1, rd==x13, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648
+// opcode: slti ; op1:x1; dest:x13; op1val:-0x80000000; immval:0x3
+TEST_IMM_OP( slti, x13, x1, 0x1, -0x80000000, 0x3, x2, 16, x19)
+
+inst_5:
+// rs1==x15, rd==x1, rs1_val == 0, rs1_val==0 and imm_val==2, imm_val == 2
+// opcode: slti ; op1:x15; dest:x1; op1val:0x0; immval:0x2
+TEST_IMM_OP( slti, x1, x15, 0x1, 0x0, 0x2, x2, 20, x19)
+
+inst_6:
+// rs1==x16, rd==x9, rs1_val == (2**(xlen-1)-1), rs1_val > 0 and imm_val < 0, rs1_val == 2147483647
+// opcode: slti ; op1:x16; dest:x9; op1val:0x7fffffff; immval:-0x8
+TEST_IMM_OP( slti, x9, x16, 0x0, 0x7fffffff, -0x8, x2, 24, x19)
+
+inst_7:
+// rs1==x11, rd==x31, rs1_val == 1,
+// opcode: slti ; op1:x11; dest:x31; op1val:0x1; immval:-0x400
+TEST_IMM_OP( slti, x31, x11, 0x0, 0x1, -0x400, x2, 28, x19)
+
+inst_8:
+// rs1==x14, rd==x27, rs1_val == imm_val, imm_val == 16, rs1_val > 0 and imm_val > 0, rs1_val == 16
+// opcode: slti ; op1:x14; dest:x27; op1val:0x10; immval:0x10
+TEST_IMM_OP( slti, x27, x14, 0x0, 0x10, 0x10, x2, 32, x19)
+
+inst_9:
+// rs1==x12, rd==x26, imm_val == 4, rs1_val==858993460 and imm_val==4
+// opcode: slti ; op1:x12; dest:x26; op1val:0x33333334; immval:0x4
+TEST_IMM_OP( slti, x26, x12, 0x0, 0x33333334, 0x4, x2, 36, x19)
+
+inst_10:
+// rs1==x17, rd==x4, imm_val == 8,
+// opcode: slti ; op1:x17; dest:x4; op1val:0x3fffffff; immval:0x8
+TEST_IMM_OP( slti, x4, x17, 0x0, 0x3fffffff, 0x8, x2, 40, x19)
+
+inst_11:
+// rs1==x18, rd==x10, imm_val == 32, rs1_val == -8193
+// opcode: slti ; op1:x18; dest:x10; op1val:-0x2001; immval:0x20
+TEST_IMM_OP( slti, x10, x18, 0x1, -0x2001, 0x20, x2, 44, x19)
+
+inst_12:
+// rs1==x27, rd==x21, imm_val == 64,
+// opcode: slti ; op1:x27; dest:x21; op1val:0x3; immval:0x40
+TEST_IMM_OP( slti, x21, x27, 0x1, 0x3, 0x40, x2, 48, x19)
+
+inst_13:
+// rs1==x3, rd==x8, imm_val == 128,
+// opcode: slti ; op1:x3; dest:x8; op1val:0x55555554; immval:0x80
+TEST_IMM_OP( slti, x8, x3, 0x0, 0x55555554, 0x80, x2, 52, x19)
+
+inst_14:
+// rs1==x7, rd==x0, imm_val == 256,
+// opcode: slti ; op1:x7; dest:x0; op1val:0x55555554; immval:0x100
+TEST_IMM_OP( slti, x0, x7, 0, 0x55555554, 0x100, x2, 56, x19)
+
+inst_15:
+// rs1==x22, rd==x24, imm_val == 512, rs1_val == -1431655766
+// opcode: slti ; op1:x22; dest:x24; op1val:-0x55555556; immval:0x200
+TEST_IMM_OP( slti, x24, x22, 0x1, -0x55555556, 0x200, x2, 60, x19)
+
+inst_16:
+// rs1==x24, rd==x18, imm_val == 1024, rs1_val == 16384
+// opcode: slti ; op1:x24; dest:x18; op1val:0x4000; immval:0x400
+TEST_IMM_OP( slti, x18, x24, 0x0, 0x4000, 0x400, x2, 64, x19)
+
+inst_17:
+// rs1==x6, rd==x25, imm_val == -2, rs1_val == -1025
+// opcode: slti ; op1:x6; dest:x25; op1val:-0x401; immval:-0x2
+TEST_IMM_OP( slti, x25, x6, 0x1, -0x401, -0x2, x2, 68, x19)
+
+inst_18:
+// rs1==x21, rd==x23, imm_val == -3,
+// opcode: slti ; op1:x21; dest:x23; op1val:0x66666667; immval:-0x3
+TEST_IMM_OP( slti, x23, x21, 0x0, 0x66666667, -0x3, x2, 72, x19)
+
+inst_19:
+// rs1==x0, rd==x7, imm_val == -5, rs1_val == -1048577
+// opcode: slti ; op1:x0; dest:x7; op1val:0x0; immval:-0x5
+TEST_IMM_OP( slti, x7, x0, 0x0, 0x0, -0x5, x2, 76, x19)
+
+inst_20:
+// rs1==x10, rd==x20, imm_val == -9,
+// opcode: slti ; op1:x10; dest:x20; op1val:-0xb504; immval:-0x9
+TEST_IMM_OP( slti, x20, x10, 0x1, -0xb504, -0x9, x2, 80, x19)
+
+inst_21:
+// rs1==x26, rd==x16, imm_val == -17,
+// opcode: slti ; op1:x26; dest:x16; op1val:0x3fffffff; immval:-0x11
+TEST_IMM_OP( slti, x16, x26, 0x0, 0x3fffffff, -0x11, x2, 84, x4)
+
+inst_22:
+// rs1==x20, rd==x29, imm_val == -33, rs1_val == -524289
+// opcode: slti ; op1:x20; dest:x29; op1val:-0x80001; immval:-0x21
+TEST_IMM_OP( slti, x29, x20, 0x1, -0x80001, -0x21, x2, 88, x4)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_23:
+// rs1==x13, rd==x3, imm_val == -65, rs1_val == -268435457
+// opcode: slti ; op1:x13; dest:x3; op1val:-0x10000001; immval:-0x41
+TEST_IMM_OP( slti, x3, x13, 0x1, -0x10000001, -0x41, x1, 0, x4)
+
+inst_24:
+// rs1==x29, rd==x14, imm_val == -129, rs1_val == 8388608
+// opcode: slti ; op1:x29; dest:x14; op1val:0x800000; immval:-0x81
+TEST_IMM_OP( slti, x14, x29, 0x0, 0x800000, -0x81, x1, 4, x4)
+
+inst_25:
+// rs1==x23, rd==x2, imm_val == -257,
+// opcode: slti ; op1:x23; dest:x2; op1val:-0x10000001; immval:-0x101
+TEST_IMM_OP( slti, x2, x23, 0x1, -0x10000001, -0x101, x1, 8, x4)
+
+inst_26:
+// rs1==x2, rd==x22, imm_val == -513,
+// opcode: slti ; op1:x2; dest:x22; op1val:0x0; immval:-0x201
+TEST_IMM_OP( slti, x22, x2, 0x0, 0x0, -0x201, x1, 12, x4)
+
+inst_27:
+// rs1==x30, rd==x19, imm_val == -1025, rs1_val == -262145
+// opcode: slti ; op1:x30; dest:x19; op1val:-0x40001; immval:-0x401
+TEST_IMM_OP( slti, x19, x30, 0x1, -0x40001, -0x401, x1, 16, x4)
+
+inst_28:
+// rs1==x19, rd==x11, imm_val == 1365, rs1_val == 4, rs1_val==4 and imm_val==1365
+// opcode: slti ; op1:x19; dest:x11; op1val:0x4; immval:0x555
+TEST_IMM_OP( slti, x11, x19, 0x1, 0x4, 0x555, x1, 20, x4)
+
+inst_29:
+// rs1==x8, rd==x30, imm_val == -1366,
+// opcode: slti ; op1:x8; dest:x30; op1val:-0x40000000; immval:-0x556
+TEST_IMM_OP( slti, x30, x8, 0x1, -0x40000000, -0x556, x1, 24, x4)
+
+inst_30:
+// rs1==x9, rd==x17, rs1_val == 2,
+// opcode: slti ; op1:x9; dest:x17; op1val:0x2; immval:0x7ff
+TEST_IMM_OP( slti, x17, x9, 0x1, 0x2, 0x7ff, x1, 28, x4)
+
+inst_31:
+// rs1==x28, rd==x6, rs1_val == 8,
+// opcode: slti ; op1:x28; dest:x6; op1val:0x8; immval:-0x555
+TEST_IMM_OP( slti, x6, x28, 0x0, 0x8, -0x555, x1, 32, x4)
+
+inst_32:
+// rs1_val == 32,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x20; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x20, 0x555, x1, 36, x4)
+
+inst_33:
+// rs1_val == 64,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x40; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x40, 0x555, x1, 40, x4)
+
+inst_34:
+// rs1_val == 128,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x80; immval:0x200
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x80, 0x200, x1, 44, x4)
+
+inst_35:
+// rs1_val == 256,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x100; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x100, 0x2e, x1, 48, x4)
+
+inst_36:
+// rs1_val == 512,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x200; immval:-0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x200, -0x3, x1, 52, x4)
+
+inst_37:
+// rs1_val == 1024,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x400; immval:-0x101
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x400, -0x101, x1, 56, x4)
+
+inst_38:
+// rs1_val == 2048,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x800; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x800, 0x2d, x1, 60, x4)
+
+inst_39:
+// rs1_val == 4096,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x1000; immval:-0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x1000, -0x5, x1, 64, x4)
+
+inst_40:
+// rs1_val == 8192,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2000; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2000, 0x0, x1, 68, x4)
+
+inst_41:
+// rs1_val == 32768,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x8000; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x8000, -0x556, x1, 72, x4)
+
+inst_42:
+// rs1_val == 65536,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x10000; immval:-0x1
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x10000, -0x1, x1, 76, x4)
+
+inst_43:
+// rs1_val == 131072,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x20000; immval:-0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x20000, -0x2, x1, 80, x4)
+
+inst_44:
+// rs1_val == 262144,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x40000; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x40000, 0x6, x1, 84, x4)
+
+inst_45:
+// rs1_val == 524288,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x80000; immval:-0x41
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x80000, -0x41, x1, 88, x4)
+
+inst_46:
+// rs1_val == 1048576,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x100000; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x100000, -0x556, x1, 92, x4)
+
+inst_47:
+// rs1_val == 2097152,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x200000; immval:-0x11
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x200000, -0x11, x1, 96, x4)
+
+inst_48:
+// rs1_val == 4194304,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x400000; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x400000, 0x2e, x1, 100, x4)
+
+inst_49:
+// rs1_val == 16777216,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x1000000; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x1000000, -0x2c, x1, 104, x4)
+
+inst_50:
+// rs1_val == 33554432,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2000000; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2000000, 0x555, x1, 108, x4)
+
+inst_51:
+// rs1_val == 67108864,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4000000; immval:-0x41
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4000000, -0x41, x1, 112, x4)
+
+inst_52:
+// rs1_val == 134217728,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x8000000; immval:0x7ff
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x8000000, 0x7ff, x1, 116, x4)
+
+inst_53:
+// rs1_val == 268435456,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x10000000; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x10000000, 0x2d, x1, 120, x4)
+
+inst_54:
+// rs1_val == 536870912,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x20000000; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x20000000, 0x0, x1, 124, x4)
+
+inst_55:
+// rs1_val == 1073741824,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x40000000; immval:-0x11
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x40000000, -0x11, x1, 128, x4)
+
+inst_56:
+// rs1_val == -2,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x2; immval:0x1
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x2, 0x1, x1, 132, x4)
+
+inst_57:
+// rs1_val == -3,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x3; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, -0x3, -0x555, x1, 136, x4)
+
+inst_58:
+// rs1_val == -5,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5; immval:0x100
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5, 0x100, x1, 140, x4)
+
+inst_59:
+// rs1_val == -9,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x9; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x9, 0x2, x1, 144, x4)
+
+inst_60:
+// rs1_val == -33,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x21; immval:0x1
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x21, 0x1, x1, 148, x4)
+
+inst_61:
+// rs1_val == -65,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x41; immval:-0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x41, -0x4, x1, 152, x4)
+
+inst_62:
+// rs1_val == -257,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x101; immval:-0x800
+TEST_IMM_OP( slti, x11, x10, 0x0, -0x101, -0x800, x1, 156, x4)
+
+inst_63:
+// rs1_val == -513,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x201; immval:0x9
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x201, 0x9, x1, 160, x4)
+
+inst_64:
+// rs1_val == -2049,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x801; immval:-0x8
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x801, -0x8, x1, 164, x4)
+
+inst_65:
+// rs1_val == -16385,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x4001; immval:0x400
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x4001, 0x400, x1, 168, x4)
+
+inst_66:
+// rs1_val == -32769,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x8001; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x8001, 0x333, x1, 172, x4)
+
+inst_67:
+// rs1_val == -65537,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x10001; immval:-0x101
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x10001, -0x101, x1, 176, x4)
+
+inst_68:
+// rs1_val == -131073,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x20001; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x20001, 0x3, x1, 180, x4)
+
+inst_69:
+// rs1_val == -2097153,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x200001; immval:-0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x200001, -0x6, x1, 184, x4)
+
+inst_70:
+// rs1_val == -4194305,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x400001; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x400001, 0x555, x1, 188, x4)
+
+inst_71:
+// rs1_val == -8388609,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x800001; immval:0x7
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x800001, 0x7, x1, 192, x4)
+
+inst_72:
+// rs1_val == -16777217,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x1000001; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x1000001, -0x2d, x1, 196, x4)
+
+inst_73:
+// rs1_val == -33554433,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x2000001; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x2000001, 0x334, x1, 200, x4)
+
+inst_74:
+// rs1_val == -67108865,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x4000001; immval:-0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x4000001, -0x4, x1, 204, x4)
+
+inst_75:
+// rs1_val == -134217729,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x8000001; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x8000001, 0x2d, x1, 208, x4)
+
+inst_76:
+// rs1_val == -536870913,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x20000001; immval:0x10
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x20000001, 0x10, x1, 212, x4)
+
+inst_77:
+// rs1_val == -1073741825,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x40000001; immval:-0x101
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x40000001, -0x101, x1, 216, x4)
+
+inst_78:
+// rs1_val == 1431655765, rs1_val==1431655765 and imm_val==0
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x0, x1, 220, x4)
+
+inst_79:
+// rs1_val==3 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, 0x3, x1, 224, x4)
+
+inst_80:
+// rs1_val==3 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x555, x1, 228, x4)
+
+inst_81:
+// rs1_val==3 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, -0x556, x1, 232, x4)
+
+inst_82:
+// rs1_val==3 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x5, x1, 236, x4)
+
+inst_83:
+// rs1_val==3 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x333, x1, 240, x4)
+
+inst_84:
+// rs1_val==3 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x666, x1, 244, x4)
+
+inst_85:
+// rs1_val==3 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, -0x2d, x1, 248, x4)
+
+inst_86:
+// rs1_val==3 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x2d, x1, 252, x4)
+
+inst_87:
+// rs1_val==3 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, 0x2, x1, 256, x4)
+
+inst_88:
+// rs1_val==3 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x554, x1, 260, x4)
+
+inst_89:
+// rs1_val==3 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, 0x0, x1, 264, x4)
+
+inst_90:
+// rs1_val==3 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x4, x1, 268, x4)
+
+inst_91:
+// rs1_val==3 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x332, x1, 272, x4)
+
+inst_92:
+// rs1_val==3 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x665, x1, 276, x4)
+
+inst_93:
+// rs1_val==3 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x2c, x1, 280, x4)
+
+inst_94:
+// rs1_val==3 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x556, x1, 284, x4)
+
+inst_95:
+// rs1_val==3 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, -0x555, x1, 288, x4)
+
+inst_96:
+// rs1_val==3 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x6, x1, 292, x4)
+
+inst_97:
+// rs1_val==3 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x334, x1, 296, x4)
+
+inst_98:
+// rs1_val==3 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x667, x1, 300, x4)
+
+inst_99:
+// rs1_val==3 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, -0x2c, x1, 304, x4)
+
+inst_100:
+// rs1_val==3 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x2e, x1, 308, x4)
+
+inst_101:
+// rs1_val==1431655765 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x3, x1, 312, x4)
+
+inst_102:
+// rs1_val==1431655765 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x555, x1, 316, x4)
+
+inst_103:
+// rs1_val==1431655765 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, -0x556, x1, 320, x4)
+
+inst_104:
+// rs1_val==1431655765 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x5, x1, 324, x4)
+
+inst_105:
+// rs1_val==1431655765 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x333, x1, 328, x4)
+
+inst_106:
+// rs1_val==1431655765 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x666, x1, 332, x4)
+
+inst_107:
+// rs1_val==1431655765 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, -0x2d, x1, 336, x4)
+
+inst_108:
+// rs1_val==1431655765 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x2d, x1, 340, x4)
+
+inst_109:
+// rs1_val==1431655765 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x2, x1, 344, x4)
+
+inst_110:
+// rs1_val==1431655765 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x554, x1, 348, x4)
+
+inst_111:
+// rs1_val==1431655765 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x4, x1, 352, x4)
+
+inst_112:
+// rs1_val==1431655765 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x332, x1, 356, x4)
+
+inst_113:
+// rs1_val==1431655765 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x665, x1, 360, x4)
+
+inst_114:
+// rs1_val==1431655765 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x2c, x1, 364, x4)
+
+inst_115:
+// rs1_val==1431655765 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x556, x1, 368, x4)
+
+inst_116:
+// rs1_val==1431655765 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, -0x555, x1, 372, x4)
+
+inst_117:
+// rs1_val==1431655765 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x6, x1, 376, x4)
+
+inst_118:
+// rs1_val==1431655765 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x334, x1, 380, x4)
+
+inst_119:
+// rs1_val==1431655765 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x667, x1, 384, x4)
+
+inst_120:
+// rs1_val==1431655765 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, -0x2c, x1, 388, x4)
+
+inst_121:
+// rs1_val==1431655765 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555555, 0x2e, x1, 392, x4)
+
+inst_122:
+// rs1_val==-1431655766 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x3, x1, 396, x4)
+
+inst_123:
+// rs1_val==-1431655766 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x555, x1, 400, x4)
+
+inst_124:
+// rs1_val==-1431655766 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, -0x556, x1, 404, x4)
+
+inst_125:
+// rs1_val==-1431655766 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x5, x1, 408, x4)
+
+inst_126:
+// rs1_val==-1431655766 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x333, x1, 412, x4)
+
+inst_127:
+// rs1_val==-1431655766 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x666, x1, 416, x4)
+
+inst_128:
+// rs1_val==-1431655766 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, -0x2d, x1, 420, x4)
+
+inst_129:
+// rs1_val==-1431655766 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x2d, x1, 424, x4)
+
+inst_130:
+// rs1_val==-1431655766 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x2, x1, 428, x4)
+
+inst_131:
+// rs1_val==-1431655766 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x554, x1, 432, x4)
+
+inst_132:
+// rs1_val==-1431655766 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x0, x1, 436, x4)
+
+inst_133:
+// rs1_val==-1431655766 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x4, x1, 440, x4)
+
+inst_134:
+// rs1_val==-1431655766 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x332, x1, 444, x4)
+
+inst_135:
+// rs1_val==-1431655766 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x665, x1, 448, x4)
+
+inst_136:
+// rs1_val==-1431655766 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x2c, x1, 452, x4)
+
+inst_137:
+// rs1_val==-1431655766 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x556, x1, 456, x4)
+
+inst_138:
+// rs1_val==-1431655766 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, -0x555, x1, 460, x4)
+
+inst_139:
+// rs1_val==-1431655766 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x6, x1, 464, x4)
+
+inst_140:
+// rs1_val==-1431655766 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x334, x1, 468, x4)
+
+inst_141:
+// rs1_val==-1431655766 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x667, x1, 472, x4)
+
+inst_142:
+// rs1_val==-1431655766 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, -0x2c, x1, 476, x4)
+
+inst_143:
+// rs1_val==-1431655766 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555556, 0x2e, x1, 480, x4)
+
+inst_144:
+// rs1_val==5 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, 0x3, x1, 484, x4)
+
+inst_145:
+// rs1_val==5 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x555, x1, 488, x4)
+
+inst_146:
+// rs1_val==5 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, -0x556, x1, 492, x4)
+
+inst_147:
+// rs1_val==5 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, 0x5, x1, 496, x4)
+
+inst_148:
+// rs1_val==5 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x333, x1, 500, x4)
+
+inst_149:
+// rs1_val==5 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x666, x1, 504, x4)
+
+inst_150:
+// rs1_val==5 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, -0x2d, x1, 508, x4)
+
+inst_151:
+// rs1_val==5 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x2d, x1, 512, x4)
+
+inst_152:
+// rs1_val==5 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, 0x2, x1, 516, x4)
+
+inst_153:
+// rs1_val==5 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x554, x1, 520, x4)
+
+inst_154:
+// rs1_val==5 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, 0x0, x1, 524, x4)
+
+inst_155:
+// rs1_val==5 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, 0x4, x1, 528, x4)
+
+inst_156:
+// rs1_val==5 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x332, x1, 532, x4)
+
+inst_157:
+// rs1_val==5 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x665, x1, 536, x4)
+
+inst_158:
+// rs1_val==5 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x2c, x1, 540, x4)
+
+inst_159:
+// rs1_val==5 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x556, x1, 544, x4)
+
+inst_160:
+// rs1_val==5 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, -0x555, x1, 548, x4)
+
+inst_161:
+// rs1_val==5 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x6, x1, 552, x4)
+
+inst_162:
+// rs1_val==5 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x334, x1, 556, x4)
+
+inst_163:
+// rs1_val==5 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x667, x1, 560, x4)
+
+inst_164:
+// rs1_val==5 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, -0x2c, x1, 564, x4)
+
+inst_165:
+// rs1_val==5 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x2e, x1, 568, x4)
+
+inst_166:
+// rs1_val==858993459 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x3, x1, 572, x4)
+
+inst_167:
+// rs1_val==858993459 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x555, x1, 576, x4)
+
+inst_168:
+// rs1_val==858993459 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, -0x556, x1, 580, x4)
+
+inst_169:
+// rs1_val==858993459 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x5, x1, 584, x4)
+
+inst_170:
+// rs1_val==858993459 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x333, x1, 588, x4)
+
+inst_171:
+// rs1_val==858993459 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x666, x1, 592, x4)
+
+inst_172:
+// rs1_val==858993459 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, -0x2d, x1, 596, x4)
+
+inst_173:
+// rs1_val==858993459 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x2d, x1, 600, x4)
+
+inst_174:
+// rs1_val==858993459 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x2, x1, 604, x4)
+
+inst_175:
+// rs1_val==858993459 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x554, x1, 608, x4)
+
+inst_176:
+// rs1_val==858993459 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x0, x1, 612, x4)
+
+inst_177:
+// rs1_val==858993459 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x4, x1, 616, x4)
+
+inst_178:
+// rs1_val==858993459 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x332, x1, 620, x4)
+
+inst_179:
+// rs1_val==858993459 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x665, x1, 624, x4)
+
+inst_180:
+// rs1_val==858993459 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x2c, x1, 628, x4)
+
+inst_181:
+// rs1_val==858993459 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x556, x1, 632, x4)
+
+inst_182:
+// rs1_val==858993459 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, -0x555, x1, 636, x4)
+
+inst_183:
+// rs1_val==858993459 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x6, x1, 640, x4)
+
+inst_184:
+// rs1_val==858993459 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x334, x1, 644, x4)
+
+inst_185:
+// rs1_val==858993459 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x667, x1, 648, x4)
+
+inst_186:
+// rs1_val==858993459 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, -0x2c, x1, 652, x4)
+
+inst_187:
+// rs1_val==858993459 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333333, 0x2e, x1, 656, x4)
+
+inst_188:
+// rs1_val==1717986918 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x3, x1, 660, x4)
+
+inst_189:
+// rs1_val==1717986918 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x555, x1, 664, x4)
+
+inst_190:
+// rs1_val==1717986918 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, -0x556, x1, 668, x4)
+
+inst_191:
+// rs1_val==1717986918 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x5, x1, 672, x4)
+
+inst_192:
+// rs1_val==1717986918 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x333, x1, 676, x4)
+
+inst_193:
+// rs1_val==1717986918 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x666, x1, 680, x4)
+
+inst_194:
+// rs1_val==1717986918 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, -0x2d, x1, 684, x4)
+
+inst_195:
+// rs1_val==1717986918 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x2d, x1, 688, x4)
+
+inst_196:
+// rs1_val==1717986918 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x2, x1, 692, x4)
+
+inst_197:
+// rs1_val==1717986918 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x554, x1, 696, x4)
+
+inst_198:
+// rs1_val==1717986918 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x0, x1, 700, x4)
+
+inst_199:
+// rs1_val==1717986918 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x4, x1, 704, x4)
+
+inst_200:
+// rs1_val==1717986918 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x332, x1, 708, x4)
+
+inst_201:
+// rs1_val==1717986918 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x665, x1, 712, x4)
+
+inst_202:
+// rs1_val==1717986918 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x2c, x1, 716, x4)
+
+inst_203:
+// rs1_val==1717986918 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x556, x1, 720, x4)
+
+inst_204:
+// rs1_val==1717986918 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, -0x555, x1, 724, x4)
+
+inst_205:
+// rs1_val==1717986918 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x6, x1, 728, x4)
+
+inst_206:
+// rs1_val==1717986918 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x334, x1, 732, x4)
+
+inst_207:
+// rs1_val==1717986918 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x667, x1, 736, x4)
+
+inst_208:
+// rs1_val==1717986918 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, -0x2c, x1, 740, x4)
+
+inst_209:
+// rs1_val==1717986918 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666666, 0x2e, x1, 744, x4)
+
+inst_210:
+// rs1_val==-46340 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x3, x1, 748, x4)
+
+inst_211:
+// rs1_val==-46340 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x555, x1, 752, x4)
+
+inst_212:
+// rs1_val==-46340 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, -0x556, x1, 756, x4)
+
+inst_213:
+// rs1_val==-46340 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x5, x1, 760, x4)
+
+inst_214:
+// rs1_val==-46340 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x333, x1, 764, x4)
+
+inst_215:
+// rs1_val==-46340 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x666, x1, 768, x4)
+
+inst_216:
+// rs1_val==-46340 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, -0x2d, x1, 772, x4)
+
+inst_217:
+// rs1_val==-46340 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x2d, x1, 776, x4)
+
+inst_218:
+// rs1_val==-46340 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x2, x1, 780, x4)
+
+inst_219:
+// rs1_val==-46340 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x554, x1, 784, x4)
+
+inst_220:
+// rs1_val==-46340 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x0, x1, 788, x4)
+
+inst_221:
+// rs1_val==-46340 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x4, x1, 792, x4)
+
+inst_222:
+// rs1_val==-46340 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x332, x1, 796, x4)
+
+inst_223:
+// rs1_val==-46340 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x665, x1, 800, x4)
+
+inst_224:
+// rs1_val==-46340 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x2c, x1, 804, x4)
+
+inst_225:
+// rs1_val==-46340 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x556, x1, 808, x4)
+
+inst_226:
+// rs1_val==-46340 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, -0x555, x1, 812, x4)
+
+inst_227:
+// rs1_val==-46340 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x6, x1, 816, x4)
+
+inst_228:
+// rs1_val==-46340 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x334, x1, 820, x4)
+
+inst_229:
+// rs1_val==-46340 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x667, x1, 824, x4)
+
+inst_230:
+// rs1_val==-46340 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, -0x2c, x1, 828, x4)
+
+inst_231:
+// rs1_val==-46340 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504, 0x2e, x1, 832, x4)
+
+inst_232:
+// rs1_val==46340 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x3, x1, 836, x4)
+
+inst_233:
+// rs1_val==46340 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x555, x1, 840, x4)
+
+inst_234:
+// rs1_val==46340 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, -0x556, x1, 844, x4)
+
+inst_235:
+// rs1_val==46340 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x5, x1, 848, x4)
+
+inst_236:
+// rs1_val==46340 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x333, x1, 852, x4)
+
+inst_237:
+// rs1_val==46340 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x666, x1, 856, x4)
+
+inst_238:
+// rs1_val==46340 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, -0x2d, x1, 860, x4)
+
+inst_239:
+// rs1_val==46340 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x2d, x1, 864, x4)
+
+inst_240:
+// rs1_val==46340 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x2, x1, 868, x4)
+
+inst_241:
+// rs1_val==46340 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x554, x1, 872, x4)
+
+inst_242:
+// rs1_val==46340 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x0, x1, 876, x4)
+
+inst_243:
+// rs1_val==46340 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x4, x1, 880, x4)
+
+inst_244:
+// rs1_val==46340 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x332, x1, 884, x4)
+
+inst_245:
+// rs1_val==46340 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x665, x1, 888, x4)
+
+inst_246:
+// rs1_val==46340 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x2c, x1, 892, x4)
+
+inst_247:
+// rs1_val==46340 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x556, x1, 896, x4)
+
+inst_248:
+// rs1_val==46340 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, -0x555, x1, 900, x4)
+
+inst_249:
+// rs1_val==46340 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x6, x1, 904, x4)
+
+inst_250:
+// rs1_val==46340 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x334, x1, 908, x4)
+
+inst_251:
+// rs1_val==46340 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x667, x1, 912, x4)
+
+inst_252:
+// rs1_val==46340 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, -0x2c, x1, 916, x4)
+
+inst_253:
+// rs1_val==46340 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504, 0x2e, x1, 920, x4)
+
+inst_254:
+// rs1_val==2 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x3, x1, 924, x4)
+
+inst_255:
+// rs1_val==2 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x555, x1, 928, x4)
+
+inst_256:
+// rs1_val==2 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2, -0x556, x1, 932, x4)
+
+inst_257:
+// rs1_val==2 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x5, x1, 936, x4)
+
+inst_258:
+// rs1_val==2 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x333, x1, 940, x4)
+
+inst_259:
+// rs1_val==2 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x666, x1, 944, x4)
+
+inst_260:
+// rs1_val==2 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2, -0x2d, x1, 948, x4)
+
+inst_261:
+// rs1_val==2 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x2d, x1, 952, x4)
+
+inst_262:
+// rs1_val==2 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2, 0x2, x1, 956, x4)
+
+inst_263:
+// rs1_val==2 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x554, x1, 960, x4)
+
+inst_264:
+// rs1_val==2 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2, 0x0, x1, 964, x4)
+
+inst_265:
+// rs1_val==2 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x4, x1, 968, x4)
+
+inst_266:
+// rs1_val==2 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x332, x1, 972, x4)
+
+inst_267:
+// rs1_val==2 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x665, x1, 976, x4)
+
+inst_268:
+// rs1_val==2 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x2c, x1, 980, x4)
+
+inst_269:
+// rs1_val==2 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x556, x1, 984, x4)
+
+inst_270:
+// rs1_val==2 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2, -0x555, x1, 988, x4)
+
+inst_271:
+// rs1_val==2 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x6, x1, 992, x4)
+
+inst_272:
+// rs1_val==2 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x334, x1, 996, x4)
+
+inst_273:
+// rs1_val==2 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x667, x1, 1000, x4)
+
+inst_274:
+// rs1_val==2 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2, -0x2c, x1, 1004, x4)
+
+inst_275:
+// rs1_val==2 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x2e, x1, 1008, x4)
+
+inst_276:
+// rs1_val==1431655764 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x3, x1, 1012, x4)
+
+inst_277:
+// rs1_val==1431655764 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x555, x1, 1016, x4)
+
+inst_278:
+// rs1_val==1431655764 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, -0x556, x1, 1020, x4)
+
+inst_279:
+// rs1_val==1431655764 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x5, x1, 1024, x4)
+
+inst_280:
+// rs1_val==1431655764 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x333, x1, 1028, x4)
+
+inst_281:
+// rs1_val==1431655764 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x666, x1, 1032, x4)
+
+inst_282:
+// rs1_val==1431655764 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, -0x2d, x1, 1036, x4)
+
+inst_283:
+// rs1_val==1431655764 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x2d, x1, 1040, x4)
+
+inst_284:
+// rs1_val==1431655764 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x2, x1, 1044, x4)
+
+inst_285:
+// rs1_val==1431655764 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x554, x1, 1048, x4)
+
+inst_286:
+// rs1_val==1431655764 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x0, x1, 1052, x4)
+
+inst_287:
+// rs1_val==1431655764 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x4, x1, 1056, x4)
+
+inst_288:
+// rs1_val==1431655764 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x332, x1, 1060, x4)
+
+inst_289:
+// rs1_val==1431655764 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x665, x1, 1064, x4)
+
+inst_290:
+// rs1_val==1431655764 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x2c, x1, 1068, x4)
+
+inst_291:
+// rs1_val==1431655764 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x556, x1, 1072, x4)
+
+inst_292:
+// rs1_val==1431655764 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, -0x555, x1, 1076, x4)
+
+inst_293:
+// rs1_val==1431655764 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x6, x1, 1080, x4)
+
+inst_294:
+// rs1_val==1431655764 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x334, x1, 1084, x4)
+
+inst_295:
+// rs1_val==1431655764 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x667, x1, 1088, x4)
+
+inst_296:
+// rs1_val==1431655764 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, -0x2c, x1, 1092, x4)
+
+inst_297:
+// rs1_val==1431655764 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555554, 0x2e, x1, 1096, x4)
+
+inst_298:
+// rs1_val==0 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x3, x1, 1100, x4)
+
+inst_299:
+// rs1_val==0 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x555, x1, 1104, x4)
+
+inst_300:
+// rs1_val==0 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x0, -0x556, x1, 1108, x4)
+
+inst_301:
+// rs1_val==0 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x5, x1, 1112, x4)
+
+inst_302:
+// rs1_val==0 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x333, x1, 1116, x4)
+
+inst_303:
+// rs1_val==0 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x666, x1, 1120, x4)
+
+inst_304:
+// rs1_val==858993460 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x332, x1, 1124, x4)
+
+inst_305:
+// rs1_val==858993460 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x665, x1, 1128, x4)
+
+inst_306:
+// rs1_val==858993460 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x2c, x1, 1132, x4)
+
+inst_307:
+// rs1_val==858993460 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x556, x1, 1136, x4)
+
+inst_308:
+// rs1_val==858993460 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, -0x555, x1, 1140, x4)
+
+inst_309:
+// rs1_val==858993460 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x6, x1, 1144, x4)
+
+inst_310:
+// rs1_val==858993460 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x334, x1, 1148, x4)
+
+inst_311:
+// rs1_val==858993460 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x667, x1, 1152, x4)
+
+inst_312:
+// rs1_val==858993460 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, -0x2c, x1, 1156, x4)
+
+inst_313:
+// rs1_val==858993460 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x2e, x1, 1160, x4)
+
+inst_314:
+// rs1_val==1717986919 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x3, x1, 1164, x4)
+
+inst_315:
+// rs1_val==1717986919 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x555, x1, 1168, x4)
+
+inst_316:
+// rs1_val==1717986919 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, -0x556, x1, 1172, x4)
+
+inst_317:
+// rs1_val==1717986919 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x5, x1, 1176, x4)
+
+inst_318:
+// rs1_val==1717986919 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x333, x1, 1180, x4)
+
+inst_319:
+// rs1_val==1717986919 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x666, x1, 1184, x4)
+
+inst_320:
+// rs1_val==1717986919 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, -0x2d, x1, 1188, x4)
+
+inst_321:
+// rs1_val==1717986919 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x2d, x1, 1192, x4)
+
+inst_322:
+// rs1_val==1717986919 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x2, x1, 1196, x4)
+
+inst_323:
+// rs1_val==1717986919 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x554, x1, 1200, x4)
+
+inst_324:
+// rs1_val==1717986919 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x0, x1, 1204, x4)
+
+inst_325:
+// rs1_val==1717986919 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x4, x1, 1208, x4)
+
+inst_326:
+// rs1_val==1717986919 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x332, x1, 1212, x4)
+
+inst_327:
+// rs1_val==1717986919 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x665, x1, 1216, x4)
+
+inst_328:
+// rs1_val==1717986919 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x2c, x1, 1220, x4)
+
+inst_329:
+// rs1_val==1717986919 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x556, x1, 1224, x4)
+
+inst_330:
+// rs1_val==1717986919 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, -0x555, x1, 1228, x4)
+
+inst_331:
+// rs1_val==1717986919 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x6, x1, 1232, x4)
+
+inst_332:
+// rs1_val==1717986919 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x334, x1, 1236, x4)
+
+inst_333:
+// rs1_val==1717986919 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x667, x1, 1240, x4)
+
+inst_334:
+// rs1_val==1717986919 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, -0x2c, x1, 1244, x4)
+
+inst_335:
+// rs1_val==1717986919 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666667, 0x2e, x1, 1248, x4)
+
+inst_336:
+// rs1_val==-46339 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x3, x1, 1252, x4)
+
+inst_337:
+// rs1_val==-46339 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x555, x1, 1256, x4)
+
+inst_338:
+// rs1_val==-46339 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, -0x556, x1, 1260, x4)
+
+inst_339:
+// rs1_val==-46339 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x5, x1, 1264, x4)
+
+inst_340:
+// rs1_val==-46339 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x333, x1, 1268, x4)
+
+inst_341:
+// rs1_val==-46339 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x666, x1, 1272, x4)
+
+inst_342:
+// rs1_val==-46339 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, -0x2d, x1, 1276, x4)
+
+inst_343:
+// rs1_val==-46339 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x2d, x1, 1280, x4)
+
+inst_344:
+// rs1_val==-46339 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x2, x1, 1284, x4)
+
+inst_345:
+// rs1_val==-46339 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x554, x1, 1288, x4)
+
+inst_346:
+// rs1_val==-46339 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x0, x1, 1292, x4)
+
+inst_347:
+// rs1_val==-46339 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x4, x1, 1296, x4)
+
+inst_348:
+// rs1_val==-46339 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x332, x1, 1300, x4)
+
+inst_349:
+// rs1_val==-46339 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x665, x1, 1304, x4)
+
+inst_350:
+// rs1_val==-46339 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x2c, x1, 1308, x4)
+
+inst_351:
+// rs1_val==-46339 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x556, x1, 1312, x4)
+
+inst_352:
+// rs1_val==-46339 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, -0x555, x1, 1316, x4)
+
+inst_353:
+// rs1_val==-46339 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x6, x1, 1320, x4)
+
+inst_354:
+// rs1_val==-46339 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x334, x1, 1324, x4)
+
+inst_355:
+// rs1_val==-46339 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x667, x1, 1328, x4)
+
+inst_356:
+// rs1_val==-46339 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, -0x2c, x1, 1332, x4)
+
+inst_357:
+// rs1_val==-46339 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb503, 0x2e, x1, 1336, x4)
+
+inst_358:
+// rs1_val==46341 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x3, x1, 1340, x4)
+
+inst_359:
+// rs1_val==46341 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x555, x1, 1344, x4)
+
+inst_360:
+// rs1_val==46341 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, -0x556, x1, 1348, x4)
+
+inst_361:
+// rs1_val==46341 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x5, x1, 1352, x4)
+
+inst_362:
+// rs1_val==46341 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x333, x1, 1356, x4)
+
+inst_363:
+// rs1_val==46341 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x666, x1, 1360, x4)
+
+inst_364:
+// rs1_val==46341 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, -0x2d, x1, 1364, x4)
+
+inst_365:
+// rs1_val==46341 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x2d, x1, 1368, x4)
+
+inst_366:
+// rs1_val==46341 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x2, x1, 1372, x4)
+
+inst_367:
+// rs1_val==46341 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x554, x1, 1376, x4)
+
+inst_368:
+// rs1_val==46341 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x0, x1, 1380, x4)
+
+inst_369:
+// rs1_val==46341 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x4, x1, 1384, x4)
+
+inst_370:
+// rs1_val==46341 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x332, x1, 1388, x4)
+
+inst_371:
+// rs1_val==46341 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x665, x1, 1392, x4)
+
+inst_372:
+// rs1_val==46341 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x2c, x1, 1396, x4)
+
+inst_373:
+// rs1_val==46341 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x556, x1, 1400, x4)
+
+inst_374:
+// rs1_val==46341 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, -0x555, x1, 1404, x4)
+
+inst_375:
+// rs1_val==46341 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x6, x1, 1408, x4)
+
+inst_376:
+// rs1_val==46341 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x334, x1, 1412, x4)
+
+inst_377:
+// rs1_val==46341 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x667, x1, 1416, x4)
+
+inst_378:
+// rs1_val==46341 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, -0x2c, x1, 1420, x4)
+
+inst_379:
+// rs1_val==46341 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb505; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb505, 0x2e, x1, 1424, x4)
+
+inst_380:
+// rs1_val==0 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x0, -0x2d, x1, 1428, x4)
+
+inst_381:
+// rs1_val==0 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x2d, x1, 1432, x4)
+
+inst_382:
+// rs1_val==0 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x554, x1, 1436, x4)
+
+inst_383:
+// rs1_val==0 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x0, 0x0, x1, 1440, x4)
+
+inst_384:
+// rs1_val==0 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x4, x1, 1444, x4)
+
+inst_385:
+// rs1_val==0 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x332, x1, 1448, x4)
+
+inst_386:
+// rs1_val==0 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x665, x1, 1452, x4)
+
+inst_387:
+// rs1_val==0 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x2c, x1, 1456, x4)
+
+inst_388:
+// rs1_val==0 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x556, x1, 1460, x4)
+
+inst_389:
+// rs1_val==0 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x0, -0x555, x1, 1464, x4)
+
+inst_390:
+// rs1_val==0 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x6, x1, 1468, x4)
+
+inst_391:
+// rs1_val==0 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x334, x1, 1472, x4)
+
+inst_392:
+// rs1_val==0 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x667, x1, 1476, x4)
+
+inst_393:
+// rs1_val==0 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x0, -0x2c, x1, 1480, x4)
+
+inst_394:
+// rs1_val==0 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x2e, x1, 1484, x4)
+
+inst_395:
+// rs1_val==4 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, 0x3, x1, 1488, x4)
+
+inst_396:
+// rs1_val==4 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, -0x556, x1, 1492, x4)
+
+inst_397:
+// rs1_val==4 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x5, x1, 1496, x4)
+
+inst_398:
+// rs1_val==4 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x333, x1, 1500, x4)
+
+inst_399:
+// rs1_val==4 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x666, x1, 1504, x4)
+
+inst_400:
+// rs1_val==4 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, -0x2d, x1, 1508, x4)
+
+inst_401:
+// rs1_val==4 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x2d, x1, 1512, x4)
+
+inst_402:
+// rs1_val==4 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, 0x2, x1, 1516, x4)
+
+inst_403:
+// rs1_val==4 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x554, x1, 1520, x4)
+
+inst_404:
+// rs1_val==4 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, 0x0, x1, 1524, x4)
+
+inst_405:
+// rs1_val==4 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, 0x4, x1, 1528, x4)
+
+inst_406:
+// rs1_val==4 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x332, x1, 1532, x4)
+
+inst_407:
+// rs1_val==4 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x665, x1, 1536, x4)
+
+inst_408:
+// rs1_val==4 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x2c, x1, 1540, x4)
+
+inst_409:
+// rs1_val==4 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x556, x1, 1544, x4)
+
+inst_410:
+// rs1_val==4 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, -0x555, x1, 1548, x4)
+
+inst_411:
+// rs1_val==4 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x6, x1, 1552, x4)
+
+inst_412:
+// rs1_val==4 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x334, x1, 1556, x4)
+
+inst_413:
+// rs1_val==4 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x667, x1, 1560, x4)
+
+inst_414:
+// rs1_val==4 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, -0x2c, x1, 1564, x4)
+
+inst_415:
+// rs1_val==4 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x2e, x1, 1568, x4)
+
+inst_416:
+// rs1_val==858993458 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x3, x1, 1572, x4)
+
+inst_417:
+// rs1_val==858993458 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x555, x1, 1576, x4)
+
+inst_418:
+// rs1_val==858993458 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, -0x556, x1, 1580, x4)
+
+inst_419:
+// rs1_val==858993458 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x5, x1, 1584, x4)
+
+inst_420:
+// rs1_val==858993458 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x333, x1, 1588, x4)
+
+inst_421:
+// rs1_val==858993458 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x666, x1, 1592, x4)
+
+inst_422:
+// rs1_val==858993458 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, -0x2d, x1, 1596, x4)
+
+inst_423:
+// rs1_val==858993458 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x2d, x1, 1600, x4)
+
+inst_424:
+// rs1_val==858993458 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x2, x1, 1604, x4)
+
+inst_425:
+// rs1_val==858993458 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x554, x1, 1608, x4)
+
+inst_426:
+// rs1_val==858993458 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x0, x1, 1612, x4)
+
+inst_427:
+// rs1_val==858993458 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x4, x1, 1616, x4)
+
+inst_428:
+// rs1_val==858993458 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x332, x1, 1620, x4)
+
+inst_429:
+// rs1_val==858993458 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x665, x1, 1624, x4)
+
+inst_430:
+// rs1_val==858993458 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x2c, x1, 1628, x4)
+
+inst_431:
+// rs1_val==858993458 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x556, x1, 1632, x4)
+
+inst_432:
+// rs1_val==858993458 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, -0x555, x1, 1636, x4)
+
+inst_433:
+// rs1_val==858993458 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x6, x1, 1640, x4)
+
+inst_434:
+// rs1_val==858993458 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x334, x1, 1644, x4)
+
+inst_435:
+// rs1_val==858993458 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x667, x1, 1648, x4)
+
+inst_436:
+// rs1_val==858993458 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, -0x2c, x1, 1652, x4)
+
+inst_437:
+// rs1_val==858993458 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333332, 0x2e, x1, 1656, x4)
+
+inst_438:
+// rs1_val==1717986917 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x3, x1, 1660, x4)
+
+inst_439:
+// rs1_val==1717986917 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x555, x1, 1664, x4)
+
+inst_440:
+// rs1_val==1717986917 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, -0x556, x1, 1668, x4)
+
+inst_441:
+// rs1_val==1717986917 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x5, x1, 1672, x4)
+
+inst_442:
+// rs1_val==1717986917 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x333, x1, 1676, x4)
+
+inst_443:
+// rs1_val==1717986917 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x666, x1, 1680, x4)
+
+inst_444:
+// rs1_val==1717986917 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, -0x2d, x1, 1684, x4)
+
+inst_445:
+// rs1_val==1717986917 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x2d, x1, 1688, x4)
+
+inst_446:
+// rs1_val==1717986917 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x2, x1, 1692, x4)
+
+inst_447:
+// rs1_val==1717986917 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x554, x1, 1696, x4)
+
+inst_448:
+// rs1_val==1717986917 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x0, x1, 1700, x4)
+
+inst_449:
+// rs1_val==1717986917 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x4, x1, 1704, x4)
+
+inst_450:
+// rs1_val==1717986917 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x332, x1, 1708, x4)
+
+inst_451:
+// rs1_val==1717986917 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x665, x1, 1712, x4)
+
+inst_452:
+// rs1_val==1717986917 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x2c, x1, 1716, x4)
+
+inst_453:
+// rs1_val==1717986917 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x556, x1, 1720, x4)
+
+inst_454:
+// rs1_val==1717986917 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, -0x555, x1, 1724, x4)
+
+inst_455:
+// rs1_val==1717986917 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x6, x1, 1728, x4)
+
+inst_456:
+// rs1_val==1717986917 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x334, x1, 1732, x4)
+
+inst_457:
+// rs1_val==1717986917 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x667, x1, 1736, x4)
+
+inst_458:
+// rs1_val==1717986917 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, -0x2c, x1, 1740, x4)
+
+inst_459:
+// rs1_val==1717986917 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x66666665, 0x2e, x1, 1744, x4)
+
+inst_460:
+// rs1_val==46339 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x3, x1, 1748, x4)
+
+inst_461:
+// rs1_val==46339 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x555, x1, 1752, x4)
+
+inst_462:
+// rs1_val==46339 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, -0x556, x1, 1756, x4)
+
+inst_463:
+// rs1_val==46339 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x5, x1, 1760, x4)
+
+inst_464:
+// rs1_val==46339 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x333, x1, 1764, x4)
+
+inst_465:
+// rs1_val==46339 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x666, x1, 1768, x4)
+
+inst_466:
+// rs1_val==46339 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, -0x2d, x1, 1772, x4)
+
+inst_467:
+// rs1_val==46339 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x2d, x1, 1776, x4)
+
+inst_468:
+// rs1_val==46339 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x2, x1, 1780, x4)
+
+inst_469:
+// rs1_val==46339 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x554, x1, 1784, x4)
+
+inst_470:
+// rs1_val==46339 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x0, x1, 1788, x4)
+
+inst_471:
+// rs1_val==46339 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x4, x1, 1792, x4)
+
+inst_472:
+// rs1_val==46339 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x332, x1, 1796, x4)
+
+inst_473:
+// rs1_val==46339 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x665, x1, 1800, x4)
+
+inst_474:
+// rs1_val==46339 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x2c, x1, 1804, x4)
+
+inst_475:
+// rs1_val==46339 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x556, x1, 1808, x4)
+
+inst_476:
+// rs1_val==46339 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, -0x555, x1, 1812, x4)
+
+inst_477:
+// rs1_val==46339 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x6, x1, 1816, x4)
+
+inst_478:
+// rs1_val==46339 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x334, x1, 1820, x4)
+
+inst_479:
+// rs1_val==46339 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x667, x1, 1824, x4)
+
+inst_480:
+// rs1_val==46339 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, -0x2c, x1, 1828, x4)
+
+inst_481:
+// rs1_val==46339 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb503; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb503, 0x2e, x1, 1832, x4)
+
+inst_482:
+// rs1_val==1431655766 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x3, x1, 1836, x4)
+
+inst_483:
+// rs1_val==1431655766 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x555, x1, 1840, x4)
+
+inst_484:
+// rs1_val==1431655766 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, -0x556, x1, 1844, x4)
+
+inst_485:
+// rs1_val==1431655766 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x5, x1, 1848, x4)
+
+inst_486:
+// rs1_val==1431655766 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x333, x1, 1852, x4)
+
+inst_487:
+// rs1_val==1431655766 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x666, x1, 1856, x4)
+
+inst_488:
+// rs1_val==1431655766 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, -0x2d, x1, 1860, x4)
+
+inst_489:
+// rs1_val==1431655766 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x2d, x1, 1864, x4)
+
+inst_490:
+// rs1_val==1431655766 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x2, x1, 1868, x4)
+
+inst_491:
+// rs1_val==1431655766 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x554, x1, 1872, x4)
+
+inst_492:
+// rs1_val==1431655766 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x0, x1, 1876, x4)
+
+inst_493:
+// rs1_val==1431655766 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x4, x1, 1880, x4)
+
+inst_494:
+// rs1_val==1431655766 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x332, x1, 1884, x4)
+
+inst_495:
+// rs1_val==1431655766 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x665, x1, 1888, x4)
+
+inst_496:
+// rs1_val==1431655766 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x2c, x1, 1892, x4)
+
+inst_497:
+// rs1_val==1431655766 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x556, x1, 1896, x4)
+
+inst_498:
+// rs1_val==1431655766 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, -0x555, x1, 1900, x4)
+
+inst_499:
+// rs1_val==1431655766 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x6, x1, 1904, x4)
+
+inst_500:
+// rs1_val==1431655766 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x334, x1, 1908, x4)
+
+inst_501:
+// rs1_val==1431655766 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x667, x1, 1912, x4)
+
+inst_502:
+// rs1_val==1431655766 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, -0x2c, x1, 1916, x4)
+
+inst_503:
+// rs1_val==1431655766 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x55555556, 0x2e, x1, 1920, x4)
+
+inst_504:
+// rs1_val==-1431655765 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x3, x1, 1924, x4)
+
+inst_505:
+// rs1_val==-1431655765 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x555, x1, 1928, x4)
+
+inst_506:
+// rs1_val==-1431655765 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, -0x556, x1, 1932, x4)
+
+inst_507:
+// rs1_val==-1431655765 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x5, x1, 1936, x4)
+
+inst_508:
+// rs1_val==-1431655765 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x333, x1, 1940, x4)
+
+inst_509:
+// rs1_val==-1431655765 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x666, x1, 1944, x4)
+
+inst_510:
+// rs1_val==-1431655765 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, -0x2d, x1, 1948, x4)
+
+inst_511:
+// rs1_val==-1431655765 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x2d, x1, 1952, x4)
+
+inst_512:
+// rs1_val==-1431655765 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x2, x1, 1956, x4)
+
+inst_513:
+// rs1_val==-1431655765 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x554, x1, 1960, x4)
+
+inst_514:
+// rs1_val==-1431655765 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x0, x1, 1964, x4)
+
+inst_515:
+// rs1_val==-1431655765 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x4, x1, 1968, x4)
+
+inst_516:
+// rs1_val==-1431655765 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x332, x1, 1972, x4)
+
+inst_517:
+// rs1_val==-1431655765 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x665, x1, 1976, x4)
+
+inst_518:
+// rs1_val==-1431655765 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x2c, x1, 1980, x4)
+
+inst_519:
+// rs1_val==-1431655765 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x556, x1, 1984, x4)
+
+inst_520:
+// rs1_val==-1431655765 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, -0x555, x1, 1988, x4)
+
+inst_521:
+// rs1_val==-1431655765 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x6, x1, 1992, x4)
+
+inst_522:
+// rs1_val==-1431655765 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x334, x1, 1996, x4)
+
+inst_523:
+// rs1_val==-1431655765 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x667, x1, 2000, x4)
+
+inst_524:
+// rs1_val==-1431655765 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, -0x2c, x1, 2004, x4)
+
+inst_525:
+// rs1_val==-1431655765 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x55555555, 0x2e, x1, 2008, x4)
+
+inst_526:
+// rs1_val==6 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, 0x3, x1, 2012, x4)
+
+inst_527:
+// rs1_val==6 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x555, x1, 2016, x4)
+
+inst_528:
+// rs1_val==6 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, -0x556, x1, 2020, x4)
+
+inst_529:
+// rs1_val==6 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, 0x5, x1, 2024, x4)
+
+inst_530:
+// rs1_val==6 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x333, x1, 2028, x4)
+
+inst_531:
+// rs1_val==6 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x666, x1, 2032, x4)
+
+inst_532:
+// rs1_val==6 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, -0x2d, x1, 2036, x4)
+
+inst_533:
+// rs1_val==6 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x2d, x1, 2040, x4)
+
+inst_534:
+// rs1_val==6 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, 0x2, x1, 2044, x4)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_535:
+// rs1_val==6 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x554, x1, 0, x4)
+
+inst_536:
+// rs1_val==6 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, 0x0, x1, 4, x4)
+
+inst_537:
+// rs1_val==6 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, 0x4, x1, 8, x4)
+
+inst_538:
+// rs1_val==6 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x332, x1, 12, x4)
+
+inst_539:
+// rs1_val==6 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x665, x1, 16, x4)
+
+inst_540:
+// rs1_val==6 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x2c, x1, 20, x4)
+
+inst_541:
+// rs1_val==6 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x556, x1, 24, x4)
+
+inst_542:
+// rs1_val==6 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, -0x555, x1, 28, x4)
+
+inst_543:
+// rs1_val==6 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, 0x6, x1, 32, x4)
+
+inst_544:
+// rs1_val==6 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x334, x1, 36, x4)
+
+inst_545:
+// rs1_val==6 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x667, x1, 40, x4)
+
+inst_546:
+// rs1_val==6 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, -0x2c, x1, 44, x4)
+
+inst_547:
+// rs1_val==6 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x2e, x1, 48, x4)
+
+inst_548:
+// rs1_val==858993460 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x3, x1, 52, x4)
+
+inst_549:
+// rs1_val==858993460 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x555, x1, 56, x4)
+
+inst_550:
+// rs1_val==858993460 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, -0x556, x1, 60, x4)
+
+inst_551:
+// rs1_val==858993460 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x5, x1, 64, x4)
+
+inst_552:
+// rs1_val==858993460 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x333, x1, 68, x4)
+
+inst_553:
+// rs1_val==858993460 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x666, x1, 72, x4)
+
+inst_554:
+// rs1_val==858993460 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, -0x2d, x1, 76, x4)
+
+inst_555:
+// rs1_val==858993460 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x2d, x1, 80, x4)
+
+inst_556:
+// rs1_val==858993460 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x2, x1, 84, x4)
+
+inst_557:
+// rs1_val==858993460 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x554, x1, 88, x4)
+
+inst_558:
+// rs1_val==858993460 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x33333334; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x33333334, 0x0, x1, 92, x4)
+
+inst_559:
+// imm_val == -5, rs1_val == -1048577
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x100001; immval:-0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x100001, -0x5, x1, 96, x4)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 23*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 25*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/sltiu-01.S b/riscof/suite/rv32i_m/I/sltiu-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..0b5490b6fbf8070345cb96ab96b6e1b21700fe7d
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/sltiu-01.S
@@ -0,0 +1,3574 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sltiu instruction of the RISC-V I extension for the sltiu covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sltiu)
+
+RVTEST_SIGBASE( x7,signature_x7_1)
+
+inst_0:
+// rs1 != rd, rs1==x23, rd==x28, imm_val == 0, rs1_val == 1024
+// opcode: sltiu ; op1:x23; dest:x28; op1val:0x400; immval:0x0
+TEST_IMM_OP( sltiu, x28, x23, 0x0, 0x400, 0x0, x7, 0, x18)
+
+inst_1:
+// rs1 == rd, rs1==x2, rd==x2, imm_val == (2**(12)-1), rs1_val == 2048, rs1_val != imm_val and rs1_val > 0 and imm_val > 0
+// opcode: sltiu ; op1:x2; dest:x2; op1val:0x800; immval:0xfff
+TEST_IMM_OP( sltiu, x2, x2, 0x1, 0x800, 0xfff, x7, 4, x18)
+
+inst_2:
+// rs1==x3, rd==x25, imm_val == 1, rs1_val == 4, rs1_val==4 and imm_val==1
+// opcode: sltiu ; op1:x3; dest:x25; op1val:0x4; immval:0x1
+TEST_IMM_OP( sltiu, x25, x3, 0x0, 0x4, 0x1, x7, 8, x18)
+
+inst_3:
+// rs1==x19, rd==x11, rs1_val == 0, rs1_val==0 and imm_val==6
+// opcode: sltiu ; op1:x19; dest:x11; op1val:0x0; immval:0x6
+TEST_IMM_OP( sltiu, x11, x19, 0x1, 0x0, 0x6, x7, 12, x18)
+
+inst_4:
+// rs1==x14, rd==x15, rs1_val == (2**(xlen)-1),
+// opcode: sltiu ; op1:x14; dest:x15; op1val:0xffffffff; immval:0x2c
+TEST_IMM_OP( sltiu, x15, x14, 0x0, 0xffffffff, 0x2c, x7, 16, x18)
+
+inst_5:
+// rs1==x13, rd==x4, rs1_val == 1, rs1_val==1 and imm_val==0
+// opcode: sltiu ; op1:x13; dest:x4; op1val:0x1; immval:0x0
+TEST_IMM_OP( sltiu, x4, x13, 0x0, 0x1, 0x0, x7, 20, x18)
+
+inst_6:
+// rs1==x26, rd==x3, rs1_val == imm_val and rs1_val > 0 and imm_val > 0,
+// opcode: sltiu ; op1:x26; dest:x3; op1val:0xd; immval:0xd
+TEST_IMM_OP( sltiu, x3, x26, 0x0, 0xd, 0xd, x7, 24, x18)
+
+inst_7:
+// rs1==x20, rd==x29, imm_val == 2, rs1_val == 2863311530, rs1_val==2863311530 and imm_val==2
+// opcode: sltiu ; op1:x20; dest:x29; op1val:0xaaaaaaaa; immval:0x2
+TEST_IMM_OP( sltiu, x29, x20, 0x0, 0xaaaaaaaa, 0x2, x7, 28, x18)
+
+inst_8:
+// rs1==x27, rd==x16, imm_val == 4, rs1_val == 2147483647
+// opcode: sltiu ; op1:x27; dest:x16; op1val:0x7fffffff; immval:0x4
+TEST_IMM_OP( sltiu, x16, x27, 0x0, 0x7fffffff, 0x4, x7, 32, x18)
+
+inst_9:
+// rs1==x17, rd==x20, imm_val == 8, rs1_val == 4278190079
+// opcode: sltiu ; op1:x17; dest:x20; op1val:0xfeffffff; immval:0x8
+TEST_IMM_OP( sltiu, x20, x17, 0x0, 0xfeffffff, 0x8, x7, 36, x18)
+
+inst_10:
+// rs1==x31, rd==x8, imm_val == 16,
+// opcode: sltiu ; op1:x31; dest:x8; op1val:0x800; immval:0x10
+TEST_IMM_OP( sltiu, x8, x31, 0x0, 0x800, 0x10, x7, 40, x18)
+
+inst_11:
+// rs1==x24, rd==x23, imm_val == 32,
+// opcode: sltiu ; op1:x24; dest:x23; op1val:0xc; immval:0x20
+TEST_IMM_OP( sltiu, x23, x24, 0x1, 0xc, 0x20, x7, 44, x18)
+
+inst_12:
+// rs1==x25, rd==x26, imm_val == 64, rs1_val == 1431655765, rs1_val==1431655765 and imm_val==64
+// opcode: sltiu ; op1:x25; dest:x26; op1val:0x55555555; immval:0x40
+TEST_IMM_OP( sltiu, x26, x25, 0x0, 0x55555555, 0x40, x7, 48, x18)
+
+inst_13:
+// rs1==x22, rd==x6, imm_val == 128, rs1_val == 524288
+// opcode: sltiu ; op1:x22; dest:x6; op1val:0x80000; immval:0x80
+TEST_IMM_OP( sltiu, x6, x22, 0x0, 0x80000, 0x80, x7, 52, x18)
+
+inst_14:
+// rs1==x12, rd==x5, imm_val == 256, rs1_val == 4294967287
+// opcode: sltiu ; op1:x12; dest:x5; op1val:0xfffffff7; immval:0x100
+TEST_IMM_OP( sltiu, x5, x12, 0x0, 0xfffffff7, 0x100, x7, 56, x18)
+
+inst_15:
+// rs1==x9, rd==x1, imm_val == 512, rs1_val == 2147483648
+// opcode: sltiu ; op1:x9; dest:x1; op1val:0x80000000; immval:0x200
+TEST_IMM_OP( sltiu, x1, x9, 0x0, 0x80000000, 0x200, x7, 60, x18)
+
+inst_16:
+// rs1==x28, rd==x10, imm_val == 1024, rs1_val == 4294705151
+// opcode: sltiu ; op1:x28; dest:x10; op1val:0xfffbffff; immval:0x400
+TEST_IMM_OP( sltiu, x10, x28, 0x0, 0xfffbffff, 0x400, x7, 64, x18)
+
+inst_17:
+// rs1==x21, rd==x31, imm_val == 2048,
+// opcode: sltiu ; op1:x21; dest:x31; op1val:0x0; immval:0x800
+TEST_IMM_OP( sltiu, x31, x21, 0x1, 0x0, 0x800, x7, 68, x3)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_18:
+// rs1==x0, rd==x21, imm_val == 4094, rs1_val == 16
+// opcode: sltiu ; op1:x0; dest:x21; op1val:0x0; immval:0xffe
+TEST_IMM_OP( sltiu, x21, x0, 0x1, 0x0, 0xffe, x2, 0, x3)
+
+inst_19:
+// rs1==x11, rd==x14, imm_val == 4093,
+// opcode: sltiu ; op1:x11; dest:x14; op1val:0x12; immval:0xffd
+TEST_IMM_OP( sltiu, x14, x11, 0x1, 0x12, 0xffd, x2, 4, x3)
+
+inst_20:
+// rs1==x30, rd==x13, imm_val == 4091,
+// opcode: sltiu ; op1:x30; dest:x13; op1val:0x6; immval:0xffb
+TEST_IMM_OP( sltiu, x13, x30, 0x1, 0x6, 0xffb, x2, 8, x3)
+
+inst_21:
+// rs1==x29, rd==x17, imm_val == 4087, rs1_val == 1073741824
+// opcode: sltiu ; op1:x29; dest:x17; op1val:0x40000000; immval:0xff7
+TEST_IMM_OP( sltiu, x17, x29, 0x1, 0x40000000, 0xff7, x2, 12, x3)
+
+inst_22:
+// rs1==x8, rd==x24, imm_val == 4079, rs1_val == 4294967231
+// opcode: sltiu ; op1:x8; dest:x24; op1val:0xffffffbf; immval:0xfef
+TEST_IMM_OP( sltiu, x24, x8, 0x1, 0xffffffbf, 0xfef, x2, 16, x3)
+
+inst_23:
+// rs1==x1, rd==x27, imm_val == 4063,
+// opcode: sltiu ; op1:x1; dest:x27; op1val:0x5; immval:0xfdf
+TEST_IMM_OP( sltiu, x27, x1, 0x1, 0x5, 0xfdf, x2, 20, x3)
+
+inst_24:
+// rs1==x7, rd==x30, imm_val == 4031,
+// opcode: sltiu ; op1:x7; dest:x30; op1val:0x3; immval:0xfbf
+TEST_IMM_OP( sltiu, x30, x7, 0x1, 0x3, 0xfbf, x2, 24, x3)
+
+inst_25:
+// rs1==x5, rd==x22, imm_val == 3967, rs1_val == 262144
+// opcode: sltiu ; op1:x5; dest:x22; op1val:0x40000; immval:0xf7f
+TEST_IMM_OP( sltiu, x22, x5, 0x1, 0x40000, 0xf7f, x2, 28, x3)
+
+inst_26:
+// rs1==x15, rd==x0, imm_val == 3839,
+// opcode: sltiu ; op1:x15; dest:x0; op1val:0xe; immval:0xeff
+TEST_IMM_OP( sltiu, x0, x15, 0, 0xe, 0xeff, x2, 32, x3)
+
+inst_27:
+// rs1==x6, rd==x7, imm_val == 3583,
+// opcode: sltiu ; op1:x6; dest:x7; op1val:0x3; immval:0xdff
+TEST_IMM_OP( sltiu, x7, x6, 0x1, 0x3, 0xdff, x2, 36, x3)
+
+inst_28:
+// rs1==x18, rd==x12, imm_val == 3071,
+// opcode: sltiu ; op1:x18; dest:x12; op1val:0x7fffffff; immval:0xbff
+TEST_IMM_OP( sltiu, x12, x18, 0x1, 0x7fffffff, 0xbff, x2, 40, x3)
+
+inst_29:
+// rs1==x16, rd==x18, imm_val == 2047, rs1_val == 16777216
+// opcode: sltiu ; op1:x16; dest:x18; op1val:0x1000000; immval:0x7ff
+TEST_IMM_OP( sltiu, x18, x16, 0x0, 0x1000000, 0x7ff, x2, 44, x3)
+
+inst_30:
+// rs1==x4, rd==x9, imm_val == 1365, rs1_val == 4227858431
+// opcode: sltiu ; op1:x4; dest:x9; op1val:0xfbffffff; immval:0x555
+TEST_IMM_OP( sltiu, x9, x4, 0x0, 0xfbffffff, 0x555, x2, 48, x3)
+
+inst_31:
+// rs1==x10, rd==x19, imm_val == 2730, rs1_val == 4294965247
+// opcode: sltiu ; op1:x10; dest:x19; op1val:0xfffff7ff; immval:0xaaa
+TEST_IMM_OP( sltiu, x19, x10, 0x1, 0xfffff7ff, 0xaaa, x2, 52, x3)
+
+inst_32:
+// rs1_val == 2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x20
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x20, x2, 56, x3)
+
+inst_33:
+// rs1_val == 8,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x8; immval:0x80
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x8, 0x80, x2, 60, x3)
+
+inst_34:
+// rs1_val == 32,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x20; immval:0x800
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x20, 0x800, x2, 64, x3)
+
+inst_35:
+// rs1_val == 64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x40; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x40, 0x2, x2, 68, x3)
+
+inst_36:
+// rs1_val == 128,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x80; immval:0xff7
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x80, 0xff7, x2, 72, x3)
+
+inst_37:
+// rs1_val == 256,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100; immval:0xfdf
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x100, 0xfdf, x2, 76, x3)
+
+inst_38:
+// rs1_val == 512,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x200; immval:0xff7
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x200, 0xff7, x2, 80, x3)
+
+inst_39:
+// rs1_val == 4096,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1000; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x1000, 0x2e, x2, 84, x3)
+
+inst_40:
+// rs1_val == 8192,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2000; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x2000, 0x2e, x2, 88, x3)
+
+inst_41:
+// rs1_val == 16384,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4000; immval:0x7
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x4000, 0x7, x2, 92, x3)
+
+inst_42:
+// rs1_val == 32768,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x8000; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x8000, 0x2, x2, 96, x3)
+
+inst_43:
+// rs1_val == 65536, rs1_val==65536 and imm_val==5
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x5, x2, 100, x3)
+
+inst_44:
+// rs1_val == 131072,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x20000; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x20000, 0x2e, x2, 104, x3)
+
+inst_45:
+// rs1_val == 1048576,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000; immval:0x10
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000, 0x10, x2, 108, x3)
+
+inst_46:
+// rs1_val == 2097152,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x200000; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x200000, 0x5, x2, 112, x3)
+
+inst_47:
+// rs1_val == 4194304,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x400000; immval:0xfdf
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x400000, 0xfdf, x2, 116, x3)
+
+inst_48:
+// rs1_val == 8388608,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x800000; immval:0x800
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x800000, 0x800, x2, 120, x3)
+
+inst_49:
+// rs1_val == 33554432,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2000000; immval:0x8
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x2000000, 0x8, x2, 124, x3)
+
+inst_50:
+// rs1_val == 67108864,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4000000; immval:0x800
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4000000, 0x800, x2, 128, x3)
+
+inst_51:
+// rs1_val == 134217728,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x8000000; immval:0xc
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x8000000, 0xc, x2, 132, x3)
+
+inst_52:
+// rs1_val == 268435456,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000000; immval:0xfbf
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x10000000, 0xfbf, x2, 136, x3)
+
+inst_53:
+// rs1_val == 536870912,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x20000000; immval:0x10
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x20000000, 0x10, x2, 140, x3)
+
+inst_54:
+// rs1_val == 4294967294,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffe; immval:0xfef
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffffe, 0xfef, x2, 144, x3)
+
+inst_55:
+// rs1_val == 4294967293,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffd; immval:0xfff
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xfffffffd, 0xfff, x2, 148, x3)
+
+inst_56:
+// rs1_val == 4294967291,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffb; immval:0x20
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffffb, 0x20, x2, 152, x3)
+
+inst_57:
+// rs1_val == 4294967279,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffef; immval:0xfff
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xffffffef, 0xfff, x2, 156, x3)
+
+inst_58:
+// rs1_val == 4294967263,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffdf; immval:0xeff
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffdf, 0xeff, x2, 160, x3)
+
+inst_59:
+// rs1_val == 4294967167,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffff7f; immval:0x10
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffff7f, 0x10, x2, 164, x3)
+
+inst_60:
+// rs1_val == 4294967039,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffeff; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffeff, 0x4, x2, 168, x3)
+
+inst_61:
+// rs1_val == 4294966783,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffdff; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffdff, 0x2d, x2, 172, x3)
+
+inst_62:
+// rs1_val == 4294966271,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffbff; immval:0xf
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffbff, 0xf, x2, 176, x3)
+
+inst_63:
+// rs1_val == 4294963199,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffefff; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffefff, 0x2e, x2, 180, x3)
+
+inst_64:
+// rs1_val == 4294959103,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffdfff; immval:0xd
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffdfff, 0xd, x2, 184, x3)
+
+inst_65:
+// rs1_val == 4294950911,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffbfff; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffbfff, 0x333, x2, 188, x3)
+
+inst_66:
+// rs1_val == 4294934527,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff7fff; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff7fff, 0x1, x2, 192, x3)
+
+inst_67:
+// rs1_val == 4294901759,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffeffff; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffeffff, 0x40, x2, 196, x3)
+
+inst_68:
+// rs1_val == 4294836223,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffdffff; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffdffff, 0x5, x2, 200, x3)
+
+inst_69:
+// rs1_val == 4294443007,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfff7ffff; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfff7ffff, 0x4, x2, 204, x3)
+
+inst_70:
+// rs1_val == 4293918719,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffefffff; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffefffff, 0x555, x2, 208, x3)
+
+inst_71:
+// rs1_val == 4292870143,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffdfffff; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffdfffff, 0x2, x2, 212, x3)
+
+inst_72:
+// rs1_val == 4290772991,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffbfffff; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffbfffff, 0x556, x2, 216, x3)
+
+inst_73:
+// rs1_val == 4286578687,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xff7fffff; immval:0xffe
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xff7fffff, 0xffe, x2, 220, x3)
+
+inst_74:
+// rs1_val == 4261412863,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfdffffff; immval:0xd
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfdffffff, 0xd, x2, 224, x3)
+
+inst_75:
+// rs1_val == 4160749567,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xf7ffffff; immval:0x800
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xf7ffffff, 0x800, x2, 228, x3)
+
+inst_76:
+// rs1_val == 4026531839,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xefffffff; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xefffffff, 0x6, x2, 232, x3)
+
+inst_77:
+// rs1_val == 3758096383,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xdfffffff; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xdfffffff, 0x40, x2, 236, x3)
+
+inst_78:
+// rs1_val == 3221225471,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xbfffffff; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xbfffffff, 0x6, x2, 240, x3)
+
+inst_79:
+// rs1_val==3 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3, 0x3, x2, 244, x3)
+
+inst_80:
+// rs1_val==3 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x555, x2, 248, x3)
+
+inst_81:
+// rs1_val==3 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0xaaa, x2, 252, x3)
+
+inst_82:
+// rs1_val==3 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x5, x2, 256, x3)
+
+inst_83:
+// rs1_val==3 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x333, x2, 260, x3)
+
+inst_84:
+// rs1_val==3 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x666, x2, 264, x3)
+
+inst_85:
+// rs1_val==3 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x2d, x2, 268, x3)
+
+inst_86:
+// rs1_val==3 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3, 0x0, x2, 272, x3)
+
+inst_87:
+// rs1_val==3 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x3f, x2, 276, x3)
+
+inst_88:
+// rs1_val==3 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3, 0x2, x2, 280, x3)
+
+inst_89:
+// rs1_val==3 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x554, x2, 284, x3)
+
+inst_90:
+// rs1_val==3 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0xaa9, x2, 288, x3)
+
+inst_91:
+// rs1_val==3 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x4, x2, 292, x3)
+
+inst_92:
+// rs1_val==3 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x332, x2, 296, x3)
+
+inst_93:
+// rs1_val==3 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x665, x2, 300, x3)
+
+inst_94:
+// rs1_val==3 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x2c, x2, 304, x3)
+
+inst_95:
+// rs1_val==3 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x3e, x2, 308, x3)
+
+inst_96:
+// rs1_val==3 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x556, x2, 312, x3)
+
+inst_97:
+// rs1_val==3 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0xaab, x2, 316, x3)
+
+inst_98:
+// rs1_val==3 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x6, x2, 320, x3)
+
+inst_99:
+// rs1_val==3 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x334, x2, 324, x3)
+
+inst_100:
+// rs1_val==3 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x667, x2, 328, x3)
+
+inst_101:
+// rs1_val==3 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x2e, x2, 332, x3)
+
+inst_102:
+// rs1_val==3 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3, 0x1, x2, 336, x3)
+
+inst_103:
+// rs1_val==3 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x40, x2, 340, x3)
+
+inst_104:
+// rs1_val==1431655765 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x3, x2, 344, x3)
+
+inst_105:
+// rs1_val==1431655765 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x555, x2, 348, x3)
+
+inst_106:
+// rs1_val==1431655765 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x55555555, 0xaaa, x2, 352, x3)
+
+inst_107:
+// rs1_val==1431655765 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x5, x2, 356, x3)
+
+inst_108:
+// rs1_val==1431655765 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x333, x2, 360, x3)
+
+inst_109:
+// rs1_val==1431655765 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x666, x2, 364, x3)
+
+inst_110:
+// rs1_val==1431655765 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x2d, x2, 368, x3)
+
+inst_111:
+// rs1_val==1431655765 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x0, x2, 372, x3)
+
+inst_112:
+// rs1_val==1431655765 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x3f, x2, 376, x3)
+
+inst_113:
+// rs1_val==1431655765 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x2, x2, 380, x3)
+
+inst_114:
+// rs1_val==1431655765 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x554, x2, 384, x3)
+
+inst_115:
+// rs1_val==1431655765 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x55555555, 0xaa9, x2, 388, x3)
+
+inst_116:
+// rs1_val==1431655765 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x4, x2, 392, x3)
+
+inst_117:
+// rs1_val==1431655765 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x332, x2, 396, x3)
+
+inst_118:
+// rs1_val==1431655765 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x665, x2, 400, x3)
+
+inst_119:
+// rs1_val==1431655765 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x2c, x2, 404, x3)
+
+inst_120:
+// rs1_val==1431655765 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x3e, x2, 408, x3)
+
+inst_121:
+// rs1_val==1431655765 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x556, x2, 412, x3)
+
+inst_122:
+// rs1_val==1431655765 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x55555555, 0xaab, x2, 416, x3)
+
+inst_123:
+// rs1_val==1431655765 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x6, x2, 420, x3)
+
+inst_124:
+// rs1_val==1431655765 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x334, x2, 424, x3)
+
+inst_125:
+// rs1_val==1431655765 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x667, x2, 428, x3)
+
+inst_126:
+// rs1_val==1431655765 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x2e, x2, 432, x3)
+
+inst_127:
+// rs1_val==1431655765 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555555; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555555, 0x1, x2, 436, x3)
+
+inst_128:
+// rs1_val==2863311530 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x3, x2, 440, x3)
+
+inst_129:
+// rs1_val==2863311530 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x555, x2, 444, x3)
+
+inst_130:
+// rs1_val==2863311530 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaaa, 0xaaa, x2, 448, x3)
+
+inst_131:
+// rs1_val==2863311530 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x5, x2, 452, x3)
+
+inst_132:
+// rs1_val==2863311530 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x333, x2, 456, x3)
+
+inst_133:
+// rs1_val==2863311530 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x666, x2, 460, x3)
+
+inst_134:
+// rs1_val==2863311530 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x2d, x2, 464, x3)
+
+inst_135:
+// rs1_val==2863311530 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x0, x2, 468, x3)
+
+inst_136:
+// rs1_val==2863311530 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x3f, x2, 472, x3)
+
+inst_137:
+// rs1_val==2863311530 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x554, x2, 476, x3)
+
+inst_138:
+// rs1_val==2863311530 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaaa, 0xaa9, x2, 480, x3)
+
+inst_139:
+// rs1_val==2863311530 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x4, x2, 484, x3)
+
+inst_140:
+// rs1_val==2863311530 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x332, x2, 488, x3)
+
+inst_141:
+// rs1_val==2863311530 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x665, x2, 492, x3)
+
+inst_142:
+// rs1_val==2863311530 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x2c, x2, 496, x3)
+
+inst_143:
+// rs1_val==2863311530 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x3e, x2, 500, x3)
+
+inst_144:
+// rs1_val==2863311530 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x556, x2, 504, x3)
+
+inst_145:
+// rs1_val==2863311530 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaaa, 0xaab, x2, 508, x3)
+
+inst_146:
+// rs1_val==2863311530 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x6, x2, 512, x3)
+
+inst_147:
+// rs1_val==2863311530 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x334, x2, 516, x3)
+
+inst_148:
+// rs1_val==2863311530 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x667, x2, 520, x3)
+
+inst_149:
+// rs1_val==2863311530 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x2e, x2, 524, x3)
+
+inst_150:
+// rs1_val==2863311530 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x1, x2, 528, x3)
+
+inst_151:
+// rs1_val==2863311530 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaa; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaa, 0x40, x2, 532, x3)
+
+inst_152:
+// rs1_val==5 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5, 0x3, x2, 536, x3)
+
+inst_153:
+// rs1_val==5 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x555, x2, 540, x3)
+
+inst_154:
+// rs1_val==5 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0xaaa, x2, 544, x3)
+
+inst_155:
+// rs1_val==5 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5, 0x5, x2, 548, x3)
+
+inst_156:
+// rs1_val==5 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x333, x2, 552, x3)
+
+inst_157:
+// rs1_val==5 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x666, x2, 556, x3)
+
+inst_158:
+// rs1_val==5 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x2d, x2, 560, x3)
+
+inst_159:
+// rs1_val==5 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5, 0x0, x2, 564, x3)
+
+inst_160:
+// rs1_val==5 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x3f, x2, 568, x3)
+
+inst_161:
+// rs1_val==5 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5, 0x2, x2, 572, x3)
+
+inst_162:
+// rs1_val==5 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x554, x2, 576, x3)
+
+inst_163:
+// rs1_val==5 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0xaa9, x2, 580, x3)
+
+inst_164:
+// rs1_val==5 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5, 0x4, x2, 584, x3)
+
+inst_165:
+// rs1_val==5 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x332, x2, 588, x3)
+
+inst_166:
+// rs1_val==5 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x665, x2, 592, x3)
+
+inst_167:
+// rs1_val==5 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x2c, x2, 596, x3)
+
+inst_168:
+// rs1_val==5 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x3e, x2, 600, x3)
+
+inst_169:
+// rs1_val==5 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x556, x2, 604, x3)
+
+inst_170:
+// rs1_val==5 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0xaab, x2, 608, x3)
+
+inst_171:
+// rs1_val==5 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x6, x2, 612, x3)
+
+inst_172:
+// rs1_val==5 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x334, x2, 616, x3)
+
+inst_173:
+// rs1_val==5 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x667, x2, 620, x3)
+
+inst_174:
+// rs1_val==5 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x2e, x2, 624, x3)
+
+inst_175:
+// rs1_val==5 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5, 0x1, x2, 628, x3)
+
+inst_176:
+// rs1_val==5 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x40, x2, 632, x3)
+
+inst_177:
+// rs1_val==858993459 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x3, x2, 636, x3)
+
+inst_178:
+// rs1_val==858993459 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x555, x2, 640, x3)
+
+inst_179:
+// rs1_val==858993459 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x33333333, 0xaaa, x2, 644, x3)
+
+inst_180:
+// rs1_val==858993459 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x5, x2, 648, x3)
+
+inst_181:
+// rs1_val==858993459 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x333, x2, 652, x3)
+
+inst_182:
+// rs1_val==858993459 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x666, x2, 656, x3)
+
+inst_183:
+// rs1_val==858993459 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x2d, x2, 660, x3)
+
+inst_184:
+// rs1_val==858993459 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x0, x2, 664, x3)
+
+inst_185:
+// rs1_val==858993459 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x3f, x2, 668, x3)
+
+inst_186:
+// rs1_val==858993459 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x2, x2, 672, x3)
+
+inst_187:
+// rs1_val==858993459 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x554, x2, 676, x3)
+
+inst_188:
+// rs1_val==858993459 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x33333333, 0xaa9, x2, 680, x3)
+
+inst_189:
+// rs1_val==858993459 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x4, x2, 684, x3)
+
+inst_190:
+// rs1_val==858993459 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x332, x2, 688, x3)
+
+inst_191:
+// rs1_val==858993459 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x665, x2, 692, x3)
+
+inst_192:
+// rs1_val==858993459 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x2c, x2, 696, x3)
+
+inst_193:
+// rs1_val==858993459 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x3e, x2, 700, x3)
+
+inst_194:
+// rs1_val==858993459 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x556, x2, 704, x3)
+
+inst_195:
+// rs1_val==858993459 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x33333333, 0xaab, x2, 708, x3)
+
+inst_196:
+// rs1_val==858993459 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x6, x2, 712, x3)
+
+inst_197:
+// rs1_val==858993459 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x334, x2, 716, x3)
+
+inst_198:
+// rs1_val==858993459 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x667, x2, 720, x3)
+
+inst_199:
+// rs1_val==858993459 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x2e, x2, 724, x3)
+
+inst_200:
+// rs1_val==858993459 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x1, x2, 728, x3)
+
+inst_201:
+// rs1_val==858993459 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333333; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333333, 0x40, x2, 732, x3)
+
+inst_202:
+// rs1_val==1717986918 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x3, x2, 736, x3)
+
+inst_203:
+// rs1_val==1717986918 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x555, x2, 740, x3)
+
+inst_204:
+// rs1_val==1717986918 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x66666666, 0xaaa, x2, 744, x3)
+
+inst_205:
+// rs1_val==1717986918 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x5, x2, 748, x3)
+
+inst_206:
+// rs1_val==1717986918 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x333, x2, 752, x3)
+
+inst_207:
+// rs1_val==1717986918 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x666, x2, 756, x3)
+
+inst_208:
+// rs1_val==1717986918 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x2d, x2, 760, x3)
+
+inst_209:
+// rs1_val==1717986918 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x0, x2, 764, x3)
+
+inst_210:
+// rs1_val==1717986918 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x3f, x2, 768, x3)
+
+inst_211:
+// rs1_val==1717986918 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x2, x2, 772, x3)
+
+inst_212:
+// rs1_val==1717986918 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x554, x2, 776, x3)
+
+inst_213:
+// rs1_val==1717986918 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x66666666, 0xaa9, x2, 780, x3)
+
+inst_214:
+// rs1_val==1717986918 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x4, x2, 784, x3)
+
+inst_215:
+// rs1_val==1717986918 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x332, x2, 788, x3)
+
+inst_216:
+// rs1_val==1717986918 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x665, x2, 792, x3)
+
+inst_217:
+// rs1_val==1717986918 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x2c, x2, 796, x3)
+
+inst_218:
+// rs1_val==1717986918 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x3e, x2, 800, x3)
+
+inst_219:
+// rs1_val==1717986918 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x556, x2, 804, x3)
+
+inst_220:
+// rs1_val==1717986918 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x66666666, 0xaab, x2, 808, x3)
+
+inst_221:
+// rs1_val==1717986918 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x6, x2, 812, x3)
+
+inst_222:
+// rs1_val==1717986918 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x334, x2, 816, x3)
+
+inst_223:
+// rs1_val==1717986918 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x667, x2, 820, x3)
+
+inst_224:
+// rs1_val==1717986918 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x2e, x2, 824, x3)
+
+inst_225:
+// rs1_val==1717986918 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x1, x2, 828, x3)
+
+inst_226:
+// rs1_val==1717986918 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666666; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666666, 0x40, x2, 832, x3)
+
+inst_227:
+// rs1_val==46340 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x3, x2, 836, x3)
+
+inst_228:
+// rs1_val==46340 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x555, x2, 840, x3)
+
+inst_229:
+// rs1_val==46340 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb504, 0xaaa, x2, 844, x3)
+
+inst_230:
+// rs1_val==46340 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x5, x2, 848, x3)
+
+inst_231:
+// rs1_val==46340 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x333, x2, 852, x3)
+
+inst_232:
+// rs1_val==46340 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x666, x2, 856, x3)
+
+inst_233:
+// rs1_val==46340 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x2d, x2, 860, x3)
+
+inst_234:
+// rs1_val==46340 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x0, x2, 864, x3)
+
+inst_235:
+// rs1_val==46340 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x3f, x2, 868, x3)
+
+inst_236:
+// rs1_val==46340 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x2, x2, 872, x3)
+
+inst_237:
+// rs1_val==46340 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x554, x2, 876, x3)
+
+inst_238:
+// rs1_val==46340 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb504, 0xaa9, x2, 880, x3)
+
+inst_239:
+// rs1_val==46340 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x4, x2, 884, x3)
+
+inst_240:
+// rs1_val==46340 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x332, x2, 888, x3)
+
+inst_241:
+// rs1_val==46340 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x665, x2, 892, x3)
+
+inst_242:
+// rs1_val==46340 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x2c, x2, 896, x3)
+
+inst_243:
+// rs1_val==46340 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x3e, x2, 900, x3)
+
+inst_244:
+// rs1_val==46340 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x556, x2, 904, x3)
+
+inst_245:
+// rs1_val==46340 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb504, 0xaab, x2, 908, x3)
+
+inst_246:
+// rs1_val==46340 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x6, x2, 912, x3)
+
+inst_247:
+// rs1_val==46340 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x334, x2, 916, x3)
+
+inst_248:
+// rs1_val==46340 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x667, x2, 920, x3)
+
+inst_249:
+// rs1_val==46340 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x2e, x2, 924, x3)
+
+inst_250:
+// rs1_val==46340 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x1, x2, 928, x3)
+
+inst_251:
+// rs1_val==46340 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504, 0x40, x2, 932, x3)
+
+inst_252:
+// rs1_val==0 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x3, x2, 936, x3)
+
+inst_253:
+// rs1_val==0 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x555, x2, 940, x3)
+
+inst_254:
+// rs1_val==0 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0xaaa, x2, 944, x3)
+
+inst_255:
+// rs1_val==0 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x5, x2, 948, x3)
+
+inst_256:
+// rs1_val==0 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x333, x2, 952, x3)
+
+inst_257:
+// rs1_val==0 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x666, x2, 956, x3)
+
+inst_258:
+// rs1_val==0 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x2d, x2, 960, x3)
+
+inst_259:
+// rs1_val==0 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x0, 0x0, x2, 964, x3)
+
+inst_260:
+// rs1_val==0 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x3f, x2, 968, x3)
+
+inst_261:
+// rs1_val==0 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x2, x2, 972, x3)
+
+inst_262:
+// rs1_val==0 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x554, x2, 976, x3)
+
+inst_263:
+// rs1_val==0 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0xaa9, x2, 980, x3)
+
+inst_264:
+// rs1_val==0 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x4, x2, 984, x3)
+
+inst_265:
+// rs1_val==0 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x332, x2, 988, x3)
+
+inst_266:
+// rs1_val==0 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x665, x2, 992, x3)
+
+inst_267:
+// rs1_val==0 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x2c, x2, 996, x3)
+
+inst_268:
+// rs1_val==0 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x3e, x2, 1000, x3)
+
+inst_269:
+// rs1_val==0 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x556, x2, 1004, x3)
+
+inst_270:
+// rs1_val==0 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0xaab, x2, 1008, x3)
+
+inst_271:
+// rs1_val==0 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x334, x2, 1012, x3)
+
+inst_272:
+// rs1_val==0 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x667, x2, 1016, x3)
+
+inst_273:
+// rs1_val==0 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x2e, x2, 1020, x3)
+
+inst_274:
+// rs1_val==0 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x1, x2, 1024, x3)
+
+inst_275:
+// rs1_val==0 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x40, x2, 1028, x3)
+
+inst_276:
+// rs1_val==65535 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x3, x2, 1032, x3)
+
+inst_277:
+// rs1_val==65535 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x555, x2, 1036, x3)
+
+inst_278:
+// rs1_val==65535 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xffff, 0xaaa, x2, 1040, x3)
+
+inst_279:
+// rs1_val==65535 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x5, x2, 1044, x3)
+
+inst_280:
+// rs1_val==65535 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x333, x2, 1048, x3)
+
+inst_281:
+// rs1_val==65535 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x666, x2, 1052, x3)
+
+inst_282:
+// rs1_val==65535 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x2d, x2, 1056, x3)
+
+inst_283:
+// rs1_val==65535 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x0, x2, 1060, x3)
+
+inst_284:
+// rs1_val==65535 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x3f, x2, 1064, x3)
+
+inst_285:
+// rs1_val==65535 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x2, x2, 1068, x3)
+
+inst_286:
+// rs1_val==65535 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x554, x2, 1072, x3)
+
+inst_287:
+// rs1_val==65535 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xffff, 0xaa9, x2, 1076, x3)
+
+inst_288:
+// rs1_val==65535 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x4, x2, 1080, x3)
+
+inst_289:
+// rs1_val==65535 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x332, x2, 1084, x3)
+
+inst_290:
+// rs1_val==65535 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x665, x2, 1088, x3)
+
+inst_291:
+// rs1_val==65535 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x2c, x2, 1092, x3)
+
+inst_292:
+// rs1_val==65535 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x3e, x2, 1096, x3)
+
+inst_293:
+// rs1_val==65535 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x556, x2, 1100, x3)
+
+inst_294:
+// rs1_val==65535 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xffff, 0xaab, x2, 1104, x3)
+
+inst_295:
+// rs1_val==65535 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x6, x2, 1108, x3)
+
+inst_296:
+// rs1_val==65535 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x334, x2, 1112, x3)
+
+inst_297:
+// rs1_val==65535 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x667, x2, 1116, x3)
+
+inst_298:
+// rs1_val==65535 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x2e, x2, 1120, x3)
+
+inst_299:
+// rs1_val==65535 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x1, x2, 1124, x3)
+
+inst_300:
+// rs1_val==65535 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffff, 0x40, x2, 1128, x3)
+
+inst_301:
+// rs1_val==2 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x3, x2, 1132, x3)
+
+inst_302:
+// rs1_val==2 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x555, x2, 1136, x3)
+
+inst_303:
+// rs1_val==2 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0xaaa, x2, 1140, x3)
+
+inst_304:
+// rs1_val==2 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x5, x2, 1144, x3)
+
+inst_305:
+// rs1_val==2 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x333, x2, 1148, x3)
+
+inst_306:
+// rs1_val==2 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x666, x2, 1152, x3)
+
+inst_307:
+// rs1_val==2 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x2d, x2, 1156, x3)
+
+inst_308:
+// rs1_val==2 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x2, 0x0, x2, 1160, x3)
+
+inst_309:
+// rs1_val==2 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x3f, x2, 1164, x3)
+
+inst_310:
+// rs1_val==2 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x2, 0x2, x2, 1168, x3)
+
+inst_311:
+// rs1_val==2 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x554, x2, 1172, x3)
+
+inst_312:
+// rs1_val==2 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0xaa9, x2, 1176, x3)
+
+inst_313:
+// rs1_val==2 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x4, x2, 1180, x3)
+
+inst_314:
+// rs1_val==2 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x332, x2, 1184, x3)
+
+inst_315:
+// rs1_val==2 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x665, x2, 1188, x3)
+
+inst_316:
+// rs1_val==2 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x2c, x2, 1192, x3)
+
+inst_317:
+// rs1_val==2 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x3e, x2, 1196, x3)
+
+inst_318:
+// rs1_val==2 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x556, x2, 1200, x3)
+
+inst_319:
+// rs1_val==2 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0xaab, x2, 1204, x3)
+
+inst_320:
+// rs1_val==2 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x6, x2, 1208, x3)
+
+inst_321:
+// rs1_val==2 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x334, x2, 1212, x3)
+
+inst_322:
+// rs1_val==2 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x667, x2, 1216, x3)
+
+inst_323:
+// rs1_val==2 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x2e, x2, 1220, x3)
+
+inst_324:
+// rs1_val==2 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x2, 0x1, x2, 1224, x3)
+
+inst_325:
+// rs1_val==2 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x40, x2, 1228, x3)
+
+inst_326:
+// rs1_val==1431655764 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x3, x2, 1232, x3)
+
+inst_327:
+// rs1_val==1431655764 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x555, x2, 1236, x3)
+
+inst_328:
+// rs1_val==1431655764 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x55555554, 0xaaa, x2, 1240, x3)
+
+inst_329:
+// rs1_val==1431655764 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x5, x2, 1244, x3)
+
+inst_330:
+// rs1_val==1431655764 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x333, x2, 1248, x3)
+
+inst_331:
+// rs1_val==1431655764 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x666, x2, 1252, x3)
+
+inst_332:
+// rs1_val==1431655764 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x2d, x2, 1256, x3)
+
+inst_333:
+// rs1_val==1431655764 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x0, x2, 1260, x3)
+
+inst_334:
+// rs1_val==1431655764 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x3f, x2, 1264, x3)
+
+inst_335:
+// rs1_val==1431655764 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x2, x2, 1268, x3)
+
+inst_336:
+// rs1_val==1431655764 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x554, x2, 1272, x3)
+
+inst_337:
+// rs1_val==1431655764 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x55555554, 0xaa9, x2, 1276, x3)
+
+inst_338:
+// rs1_val==1431655764 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x4, x2, 1280, x3)
+
+inst_339:
+// rs1_val==1431655764 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x332, x2, 1284, x3)
+
+inst_340:
+// rs1_val==1431655764 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x665, x2, 1288, x3)
+
+inst_341:
+// rs1_val==1431655764 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x2c, x2, 1292, x3)
+
+inst_342:
+// rs1_val==1431655764 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x3e, x2, 1296, x3)
+
+inst_343:
+// rs1_val==1431655764 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x556, x2, 1300, x3)
+
+inst_344:
+// rs1_val==1431655764 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x55555554, 0xaab, x2, 1304, x3)
+
+inst_345:
+// rs1_val==1431655764 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x6, x2, 1308, x3)
+
+inst_346:
+// rs1_val==1431655764 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x334, x2, 1312, x3)
+
+inst_347:
+// rs1_val==1431655764 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x667, x2, 1316, x3)
+
+inst_348:
+// rs1_val==1431655764 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x2e, x2, 1320, x3)
+
+inst_349:
+// rs1_val==1431655764 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x1, x2, 1324, x3)
+
+inst_350:
+// rs1_val==1431655764 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555554; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555554, 0x40, x2, 1328, x3)
+
+inst_351:
+// rs1_val==2863311529 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x3, x2, 1332, x3)
+
+inst_352:
+// rs1_val==2863311529 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x555, x2, 1336, x3)
+
+inst_353:
+// rs1_val==2863311529 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaa9, 0xaaa, x2, 1340, x3)
+
+inst_354:
+// rs1_val==2863311529 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x5, x2, 1344, x3)
+
+inst_355:
+// rs1_val==2863311529 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x333, x2, 1348, x3)
+
+inst_356:
+// rs1_val==2863311529 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x666, x2, 1352, x3)
+
+inst_357:
+// rs1_val==2863311529 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x2d, x2, 1356, x3)
+
+inst_358:
+// rs1_val==2863311529 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x0, x2, 1360, x3)
+
+inst_359:
+// rs1_val==2863311529 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x3f, x2, 1364, x3)
+
+inst_360:
+// rs1_val==2863311529 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x2, x2, 1368, x3)
+
+inst_361:
+// rs1_val==2863311529 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x554, x2, 1372, x3)
+
+inst_362:
+// rs1_val==2863311529 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaa9, 0xaa9, x2, 1376, x3)
+
+inst_363:
+// rs1_val==2863311529 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x4, x2, 1380, x3)
+
+inst_364:
+// rs1_val==2863311529 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x332, x2, 1384, x3)
+
+inst_365:
+// rs1_val==2863311529 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x665, x2, 1388, x3)
+
+inst_366:
+// rs1_val==2863311529 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x2c, x2, 1392, x3)
+
+inst_367:
+// rs1_val==2863311529 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x3e, x2, 1396, x3)
+
+inst_368:
+// rs1_val==2863311529 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x556, x2, 1400, x3)
+
+inst_369:
+// rs1_val==2863311529 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaa9, 0xaab, x2, 1404, x3)
+
+inst_370:
+// rs1_val==2863311529 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x6, x2, 1408, x3)
+
+inst_371:
+// rs1_val==2863311529 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x334, x2, 1412, x3)
+
+inst_372:
+// rs1_val==2863311529 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x667, x2, 1416, x3)
+
+inst_373:
+// rs1_val==2863311529 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x2e, x2, 1420, x3)
+
+inst_374:
+// rs1_val==2863311529 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x1, x2, 1424, x3)
+
+inst_375:
+// rs1_val==2863311529 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaa9; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaa9, 0x40, x2, 1428, x3)
+
+inst_376:
+// rs1_val==4 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x4, 0x3, x2, 1432, x3)
+
+inst_377:
+// rs1_val==4 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x555, x2, 1436, x3)
+
+inst_378:
+// rs1_val==4 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0xaaa, x2, 1440, x3)
+
+inst_379:
+// rs1_val==4 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x5, x2, 1444, x3)
+
+inst_380:
+// rs1_val==4 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x333, x2, 1448, x3)
+
+inst_381:
+// rs1_val==4 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x666, x2, 1452, x3)
+
+inst_382:
+// rs1_val==4 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x2d, x2, 1456, x3)
+
+inst_383:
+// rs1_val==4 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x4, 0x0, x2, 1460, x3)
+
+inst_384:
+// rs1_val==4 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x3f, x2, 1464, x3)
+
+inst_385:
+// rs1_val==4 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x4, 0x2, x2, 1468, x3)
+
+inst_386:
+// rs1_val==4 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x554, x2, 1472, x3)
+
+inst_387:
+// rs1_val==4 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0xaa9, x2, 1476, x3)
+
+inst_388:
+// rs1_val==4 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x4, 0x4, x2, 1480, x3)
+
+inst_389:
+// rs1_val==4 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x332, x2, 1484, x3)
+
+inst_390:
+// rs1_val==4 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x665, x2, 1488, x3)
+
+inst_391:
+// rs1_val==4 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x2c, x2, 1492, x3)
+
+inst_392:
+// rs1_val==4 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x3e, x2, 1496, x3)
+
+inst_393:
+// rs1_val==4 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x556, x2, 1500, x3)
+
+inst_394:
+// rs1_val==4 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0xaab, x2, 1504, x3)
+
+inst_395:
+// rs1_val==4 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x6, x2, 1508, x3)
+
+inst_396:
+// rs1_val==4 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x334, x2, 1512, x3)
+
+inst_397:
+// rs1_val==4 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x667, x2, 1516, x3)
+
+inst_398:
+// rs1_val==4 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x2e, x2, 1520, x3)
+
+inst_399:
+// rs1_val==4 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x40, x2, 1524, x3)
+
+inst_400:
+// rs1_val==858993458 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x3, x2, 1528, x3)
+
+inst_401:
+// rs1_val==858993458 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x555, x2, 1532, x3)
+
+inst_402:
+// rs1_val==858993458 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x33333332, 0xaaa, x2, 1536, x3)
+
+inst_403:
+// rs1_val==858993458 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x5, x2, 1540, x3)
+
+inst_404:
+// rs1_val==858993458 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x333, x2, 1544, x3)
+
+inst_405:
+// rs1_val==858993458 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x666, x2, 1548, x3)
+
+inst_406:
+// rs1_val==858993458 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x2d, x2, 1552, x3)
+
+inst_407:
+// rs1_val==858993458 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x0, x2, 1556, x3)
+
+inst_408:
+// rs1_val==858993458 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x3f, x2, 1560, x3)
+
+inst_409:
+// rs1_val==858993458 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x2, x2, 1564, x3)
+
+inst_410:
+// rs1_val==858993458 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x554, x2, 1568, x3)
+
+inst_411:
+// rs1_val==858993458 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x33333332, 0xaa9, x2, 1572, x3)
+
+inst_412:
+// rs1_val==858993458 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x4, x2, 1576, x3)
+
+inst_413:
+// rs1_val==858993458 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x332, x2, 1580, x3)
+
+inst_414:
+// rs1_val==858993458 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x665, x2, 1584, x3)
+
+inst_415:
+// rs1_val==858993458 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x2c, x2, 1588, x3)
+
+inst_416:
+// rs1_val==858993458 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x3e, x2, 1592, x3)
+
+inst_417:
+// rs1_val==858993458 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x556, x2, 1596, x3)
+
+inst_418:
+// rs1_val==858993458 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x33333332, 0xaab, x2, 1600, x3)
+
+inst_419:
+// rs1_val==858993458 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x6, x2, 1604, x3)
+
+inst_420:
+// rs1_val==858993458 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x334, x2, 1608, x3)
+
+inst_421:
+// rs1_val==858993458 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x667, x2, 1612, x3)
+
+inst_422:
+// rs1_val==858993458 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x2e, x2, 1616, x3)
+
+inst_423:
+// rs1_val==858993458 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x1, x2, 1620, x3)
+
+inst_424:
+// rs1_val==858993458 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333332; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333332, 0x40, x2, 1624, x3)
+
+inst_425:
+// rs1_val==1717986917 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x3, x2, 1628, x3)
+
+inst_426:
+// rs1_val==1717986917 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x555, x2, 1632, x3)
+
+inst_427:
+// rs1_val==1717986917 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x66666665, 0xaaa, x2, 1636, x3)
+
+inst_428:
+// rs1_val==1717986917 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x5, x2, 1640, x3)
+
+inst_429:
+// rs1_val==1717986917 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x333, x2, 1644, x3)
+
+inst_430:
+// rs1_val==1717986917 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x666, x2, 1648, x3)
+
+inst_431:
+// rs1_val==1717986917 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x2d, x2, 1652, x3)
+
+inst_432:
+// rs1_val==1717986917 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x0, x2, 1656, x3)
+
+inst_433:
+// rs1_val==1717986917 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x3f, x2, 1660, x3)
+
+inst_434:
+// rs1_val==1717986917 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x2, x2, 1664, x3)
+
+inst_435:
+// rs1_val==1717986917 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x554, x2, 1668, x3)
+
+inst_436:
+// rs1_val==1717986917 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x66666665, 0xaa9, x2, 1672, x3)
+
+inst_437:
+// rs1_val==1717986917 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x4, x2, 1676, x3)
+
+inst_438:
+// rs1_val==1717986917 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x332, x2, 1680, x3)
+
+inst_439:
+// rs1_val==1717986917 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x665, x2, 1684, x3)
+
+inst_440:
+// rs1_val==1717986917 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x2c, x2, 1688, x3)
+
+inst_441:
+// rs1_val==1717986917 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x3e, x2, 1692, x3)
+
+inst_442:
+// rs1_val==1717986917 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x556, x2, 1696, x3)
+
+inst_443:
+// rs1_val==65534 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x665, x2, 1700, x3)
+
+inst_444:
+// rs1_val==65534 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x2c, x2, 1704, x3)
+
+inst_445:
+// rs1_val==65534 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x3e, x2, 1708, x3)
+
+inst_446:
+// rs1_val==65534 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x556, x2, 1712, x3)
+
+inst_447:
+// rs1_val==65534 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xfffe, 0xaab, x2, 1716, x3)
+
+inst_448:
+// rs1_val==65534 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x6, x2, 1720, x3)
+
+inst_449:
+// rs1_val==65534 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x334, x2, 1724, x3)
+
+inst_450:
+// rs1_val==65534 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x667, x2, 1728, x3)
+
+inst_451:
+// rs1_val==65534 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x2e, x2, 1732, x3)
+
+inst_452:
+// rs1_val==65534 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x1, x2, 1736, x3)
+
+inst_453:
+// rs1_val==65534 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x40, x2, 1740, x3)
+
+inst_454:
+// rs1_val==1431655766 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x3, x2, 1744, x3)
+
+inst_455:
+// rs1_val==1431655766 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x555, x2, 1748, x3)
+
+inst_456:
+// rs1_val==1431655766 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x55555556, 0xaaa, x2, 1752, x3)
+
+inst_457:
+// rs1_val==1431655766 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x5, x2, 1756, x3)
+
+inst_458:
+// rs1_val==1431655766 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x333, x2, 1760, x3)
+
+inst_459:
+// rs1_val==1431655766 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x666, x2, 1764, x3)
+
+inst_460:
+// rs1_val==1431655766 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x2d, x2, 1768, x3)
+
+inst_461:
+// rs1_val==1431655766 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x0, x2, 1772, x3)
+
+inst_462:
+// rs1_val==1431655766 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x3f, x2, 1776, x3)
+
+inst_463:
+// rs1_val==1431655766 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x2, x2, 1780, x3)
+
+inst_464:
+// rs1_val==1431655766 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x554, x2, 1784, x3)
+
+inst_465:
+// rs1_val==1431655766 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x55555556, 0xaa9, x2, 1788, x3)
+
+inst_466:
+// rs1_val==1431655766 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x4, x2, 1792, x3)
+
+inst_467:
+// rs1_val==1431655766 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x332, x2, 1796, x3)
+
+inst_468:
+// rs1_val==1431655766 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x665, x2, 1800, x3)
+
+inst_469:
+// rs1_val==1431655766 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x2c, x2, 1804, x3)
+
+inst_470:
+// rs1_val==1431655766 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x3e, x2, 1808, x3)
+
+inst_471:
+// rs1_val==1431655766 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x556, x2, 1812, x3)
+
+inst_472:
+// rs1_val==1431655766 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x55555556, 0xaab, x2, 1816, x3)
+
+inst_473:
+// rs1_val==1431655766 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x6, x2, 1820, x3)
+
+inst_474:
+// rs1_val==1431655766 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x334, x2, 1824, x3)
+
+inst_475:
+// rs1_val==1431655766 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x667, x2, 1828, x3)
+
+inst_476:
+// rs1_val==1431655766 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x2e, x2, 1832, x3)
+
+inst_477:
+// rs1_val==1431655766 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x1, x2, 1836, x3)
+
+inst_478:
+// rs1_val==1431655766 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x55555556; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x55555556, 0x40, x2, 1840, x3)
+
+inst_479:
+// rs1_val==2863311531 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x3, x2, 1844, x3)
+
+inst_480:
+// rs1_val==2863311531 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x555, x2, 1848, x3)
+
+inst_481:
+// rs1_val==2863311531 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaab, 0xaaa, x2, 1852, x3)
+
+inst_482:
+// rs1_val==2863311531 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x5, x2, 1856, x3)
+
+inst_483:
+// rs1_val==2863311531 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x333, x2, 1860, x3)
+
+inst_484:
+// rs1_val==2863311531 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x666, x2, 1864, x3)
+
+inst_485:
+// rs1_val==2863311531 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x2d, x2, 1868, x3)
+
+inst_486:
+// rs1_val==2863311531 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x0, x2, 1872, x3)
+
+inst_487:
+// rs1_val==2863311531 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x3f, x2, 1876, x3)
+
+inst_488:
+// rs1_val==2863311531 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x2, x2, 1880, x3)
+
+inst_489:
+// rs1_val==2863311531 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x554, x2, 1884, x3)
+
+inst_490:
+// rs1_val==2863311531 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaab, 0xaa9, x2, 1888, x3)
+
+inst_491:
+// rs1_val==2863311531 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x4, x2, 1892, x3)
+
+inst_492:
+// rs1_val==2863311531 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x332, x2, 1896, x3)
+
+inst_493:
+// rs1_val==2863311531 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x665, x2, 1900, x3)
+
+inst_494:
+// rs1_val==2863311531 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x2c, x2, 1904, x3)
+
+inst_495:
+// rs1_val==2863311531 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x3e, x2, 1908, x3)
+
+inst_496:
+// rs1_val==2863311531 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x556, x2, 1912, x3)
+
+inst_497:
+// rs1_val==2863311531 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaab, 0xaab, x2, 1916, x3)
+
+inst_498:
+// rs1_val==2863311531 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x6, x2, 1920, x3)
+
+inst_499:
+// rs1_val==2863311531 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x334, x2, 1924, x3)
+
+inst_500:
+// rs1_val==2863311531 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x667, x2, 1928, x3)
+
+inst_501:
+// rs1_val==2863311531 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x2e, x2, 1932, x3)
+
+inst_502:
+// rs1_val==2863311531 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x1, x2, 1936, x3)
+
+inst_503:
+// rs1_val==2863311531 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaab; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaab, 0x40, x2, 1940, x3)
+
+inst_504:
+// rs1_val==6 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x3, x2, 1944, x3)
+
+inst_505:
+// rs1_val==6 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x555, x2, 1948, x3)
+
+inst_506:
+// rs1_val==6 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0xaaa, x2, 1952, x3)
+
+inst_507:
+// rs1_val==6 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x5, x2, 1956, x3)
+
+inst_508:
+// rs1_val==6 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x333, x2, 1960, x3)
+
+inst_509:
+// rs1_val==6 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x666, x2, 1964, x3)
+
+inst_510:
+// rs1_val==6 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x2d, x2, 1968, x3)
+
+inst_511:
+// rs1_val==6 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x0, x2, 1972, x3)
+
+inst_512:
+// rs1_val==6 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x3f, x2, 1976, x3)
+
+inst_513:
+// rs1_val==6 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x2, x2, 1980, x3)
+
+inst_514:
+// rs1_val==6 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x554, x2, 1984, x3)
+
+inst_515:
+// rs1_val==6 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0xaa9, x2, 1988, x3)
+
+inst_516:
+// rs1_val==6 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x4, x2, 1992, x3)
+
+inst_517:
+// rs1_val==6 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x332, x2, 1996, x3)
+
+inst_518:
+// rs1_val==6 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x665, x2, 2000, x3)
+
+inst_519:
+// rs1_val==6 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x2c, x2, 2004, x3)
+
+inst_520:
+// rs1_val==6 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x3e, x2, 2008, x3)
+
+inst_521:
+// rs1_val==6 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x556, x2, 2012, x3)
+
+inst_522:
+// rs1_val==6 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0xaab, x2, 2016, x3)
+
+inst_523:
+// rs1_val==6 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x6, x2, 2020, x3)
+
+inst_524:
+// rs1_val==6 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x334, x2, 2024, x3)
+
+inst_525:
+// rs1_val==6 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x667, x2, 2028, x3)
+
+inst_526:
+// rs1_val==6 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x2e, x2, 2032, x3)
+
+inst_527:
+// rs1_val==6 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x1, x2, 2036, x3)
+
+inst_528:
+// rs1_val==6 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x40, x2, 2040, x3)
+
+inst_529:
+// rs1_val==858993460 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x3, x2, 2044, x3)
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_530:
+// rs1_val==858993460 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x555, x2, 0, x3)
+
+inst_531:
+// rs1_val==858993460 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x33333334, 0xaaa, x2, 4, x3)
+
+inst_532:
+// rs1_val==858993460 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x5, x2, 8, x3)
+
+inst_533:
+// rs1_val==858993460 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x333, x2, 12, x3)
+
+inst_534:
+// rs1_val==858993460 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x666, x2, 16, x3)
+
+inst_535:
+// rs1_val==858993460 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x2d, x2, 20, x3)
+
+inst_536:
+// rs1_val==858993460 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x0, x2, 24, x3)
+
+inst_537:
+// rs1_val==858993460 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x3f, x2, 28, x3)
+
+inst_538:
+// rs1_val==858993460 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x2, x2, 32, x3)
+
+inst_539:
+// rs1_val==858993460 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x554, x2, 36, x3)
+
+inst_540:
+// rs1_val==858993460 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x33333334, 0xaa9, x2, 40, x3)
+
+inst_541:
+// rs1_val==858993460 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x4, x2, 44, x3)
+
+inst_542:
+// rs1_val==858993460 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x332, x2, 48, x3)
+
+inst_543:
+// rs1_val==858993460 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x665, x2, 52, x3)
+
+inst_544:
+// rs1_val==858993460 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x2c, x2, 56, x3)
+
+inst_545:
+// rs1_val==858993460 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x3e, x2, 60, x3)
+
+inst_546:
+// rs1_val==858993460 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x556, x2, 64, x3)
+
+inst_547:
+// rs1_val==858993460 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x33333334, 0xaab, x2, 68, x3)
+
+inst_548:
+// rs1_val==858993460 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x6, x2, 72, x3)
+
+inst_549:
+// rs1_val==858993460 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x334, x2, 76, x3)
+
+inst_550:
+// rs1_val==858993460 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x667, x2, 80, x3)
+
+inst_551:
+// rs1_val==858993460 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x2e, x2, 84, x3)
+
+inst_552:
+// rs1_val==858993460 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x1, x2, 88, x3)
+
+inst_553:
+// rs1_val==858993460 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x33333334; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x33333334, 0x40, x2, 92, x3)
+
+inst_554:
+// rs1_val==1717986919 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x3, x2, 96, x3)
+
+inst_555:
+// rs1_val==1717986919 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x555, x2, 100, x3)
+
+inst_556:
+// rs1_val==1717986919 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x66666667, 0xaaa, x2, 104, x3)
+
+inst_557:
+// rs1_val==1717986919 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x5, x2, 108, x3)
+
+inst_558:
+// rs1_val==1717986919 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x333, x2, 112, x3)
+
+inst_559:
+// rs1_val==1717986919 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x666, x2, 116, x3)
+
+inst_560:
+// rs1_val==1717986919 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x2d, x2, 120, x3)
+
+inst_561:
+// rs1_val==1717986919 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x0, x2, 124, x3)
+
+inst_562:
+// rs1_val==1717986919 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x3f, x2, 128, x3)
+
+inst_563:
+// rs1_val==1717986919 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x2, x2, 132, x3)
+
+inst_564:
+// rs1_val==1717986919 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x554, x2, 136, x3)
+
+inst_565:
+// rs1_val==1717986919 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x66666667, 0xaa9, x2, 140, x3)
+
+inst_566:
+// rs1_val==1717986919 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x4, x2, 144, x3)
+
+inst_567:
+// rs1_val==1717986919 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x332, x2, 148, x3)
+
+inst_568:
+// rs1_val==1717986919 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x665, x2, 152, x3)
+
+inst_569:
+// rs1_val==1717986919 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x2c, x2, 156, x3)
+
+inst_570:
+// rs1_val==1717986919 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x3e, x2, 160, x3)
+
+inst_571:
+// rs1_val==65534 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x666, x2, 164, x3)
+
+inst_572:
+// rs1_val==1717986919 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x556, x2, 168, x3)
+
+inst_573:
+// rs1_val==1717986919 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x66666667, 0xaab, x2, 172, x3)
+
+inst_574:
+// rs1_val==1717986919 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x6, x2, 176, x3)
+
+inst_575:
+// rs1_val==1717986919 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x334, x2, 180, x3)
+
+inst_576:
+// rs1_val==1717986919 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x667, x2, 184, x3)
+
+inst_577:
+// rs1_val==1717986919 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x2e, x2, 188, x3)
+
+inst_578:
+// rs1_val==1717986919 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x1, x2, 192, x3)
+
+inst_579:
+// rs1_val==1717986919 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666667; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666667, 0x40, x2, 196, x3)
+
+inst_580:
+// rs1_val==46341 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x3, x2, 200, x3)
+
+inst_581:
+// rs1_val==46341 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x555, x2, 204, x3)
+
+inst_582:
+// rs1_val==46341 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb505, 0xaaa, x2, 208, x3)
+
+inst_583:
+// rs1_val==46341 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x5, x2, 212, x3)
+
+inst_584:
+// rs1_val==46341 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x333, x2, 216, x3)
+
+inst_585:
+// rs1_val==46341 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x666, x2, 220, x3)
+
+inst_586:
+// rs1_val==46341 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x2d, x2, 224, x3)
+
+inst_587:
+// rs1_val==46341 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x0, x2, 228, x3)
+
+inst_588:
+// rs1_val==46341 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x3f, x2, 232, x3)
+
+inst_589:
+// rs1_val==46341 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x2, x2, 236, x3)
+
+inst_590:
+// rs1_val==46341 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x554, x2, 240, x3)
+
+inst_591:
+// rs1_val==46341 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb505, 0xaa9, x2, 244, x3)
+
+inst_592:
+// rs1_val==46341 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x4, x2, 248, x3)
+
+inst_593:
+// rs1_val==46341 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x332, x2, 252, x3)
+
+inst_594:
+// rs1_val==46341 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x665, x2, 256, x3)
+
+inst_595:
+// rs1_val==46341 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x2c, x2, 260, x3)
+
+inst_596:
+// rs1_val==46341 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x3e, x2, 264, x3)
+
+inst_597:
+// rs1_val==46341 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x556, x2, 268, x3)
+
+inst_598:
+// rs1_val==46341 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb505, 0xaab, x2, 272, x3)
+
+inst_599:
+// rs1_val==46341 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x6, x2, 276, x3)
+
+inst_600:
+// rs1_val==46341 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x334, x2, 280, x3)
+
+inst_601:
+// rs1_val==46341 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x667, x2, 284, x3)
+
+inst_602:
+// rs1_val==46341 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x2e, x2, 288, x3)
+
+inst_603:
+// rs1_val==46341 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x1, x2, 292, x3)
+
+inst_604:
+// rs1_val==46341 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb505; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb505, 0x40, x2, 296, x3)
+
+inst_605:
+// rs1_val==1 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x3, x2, 300, x3)
+
+inst_606:
+// rs1_val==1 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x555, x2, 304, x3)
+
+inst_607:
+// rs1_val==1 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0xaaa, x2, 308, x3)
+
+inst_608:
+// rs1_val==1 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x5, x2, 312, x3)
+
+inst_609:
+// rs1_val==1 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x333, x2, 316, x3)
+
+inst_610:
+// rs1_val==1 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x666, x2, 320, x3)
+
+inst_611:
+// rs1_val==1 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x2d, x2, 324, x3)
+
+inst_612:
+// rs1_val==1 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x3f, x2, 328, x3)
+
+inst_613:
+// rs1_val==1 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x2, x2, 332, x3)
+
+inst_614:
+// rs1_val==1 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x554, x2, 336, x3)
+
+inst_615:
+// rs1_val==1 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0xaa9, x2, 340, x3)
+
+inst_616:
+// rs1_val==1 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x4, x2, 344, x3)
+
+inst_617:
+// rs1_val==1 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x332, x2, 348, x3)
+
+inst_618:
+// rs1_val==1 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x665, x2, 352, x3)
+
+inst_619:
+// rs1_val==1 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x2c, x2, 356, x3)
+
+inst_620:
+// rs1_val==1 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x3e, x2, 360, x3)
+
+inst_621:
+// rs1_val==1 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x556, x2, 364, x3)
+
+inst_622:
+// rs1_val==1 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0xaab, x2, 368, x3)
+
+inst_623:
+// rs1_val==1 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x6, x2, 372, x3)
+
+inst_624:
+// rs1_val==1 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x334, x2, 376, x3)
+
+inst_625:
+// rs1_val==1 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x667, x2, 380, x3)
+
+inst_626:
+// rs1_val==1 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x2e, x2, 384, x3)
+
+inst_627:
+// rs1_val==1 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x1, 0x1, x2, 388, x3)
+
+inst_628:
+// rs1_val==1 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x40, x2, 392, x3)
+
+inst_629:
+// rs1_val==65536 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x3, x2, 396, x3)
+
+inst_630:
+// rs1_val==65536 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x555, x2, 400, x3)
+
+inst_631:
+// rs1_val==65536 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x10000, 0xaaa, x2, 404, x3)
+
+inst_632:
+// rs1_val==65536 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x333, x2, 408, x3)
+
+inst_633:
+// rs1_val==65536 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x666, x2, 412, x3)
+
+inst_634:
+// rs1_val==65536 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x2d, x2, 416, x3)
+
+inst_635:
+// rs1_val==65536 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x0, x2, 420, x3)
+
+inst_636:
+// rs1_val==65536 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x3f, x2, 424, x3)
+
+inst_637:
+// rs1_val==65536 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x2, x2, 428, x3)
+
+inst_638:
+// rs1_val==65536 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x554, x2, 432, x3)
+
+inst_639:
+// rs1_val==65536 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x10000, 0xaa9, x2, 436, x3)
+
+inst_640:
+// rs1_val==65536 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x4, x2, 440, x3)
+
+inst_641:
+// rs1_val==65536 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x332, x2, 444, x3)
+
+inst_642:
+// rs1_val==65536 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x665, x2, 448, x3)
+
+inst_643:
+// rs1_val==65536 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x2c, x2, 452, x3)
+
+inst_644:
+// rs1_val==65536 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x3e, x2, 456, x3)
+
+inst_645:
+// rs1_val==65536 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x556, x2, 460, x3)
+
+inst_646:
+// rs1_val==65536 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x10000, 0xaab, x2, 464, x3)
+
+inst_647:
+// rs1_val==65536 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x6, x2, 468, x3)
+
+inst_648:
+// rs1_val==65536 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x334, x2, 472, x3)
+
+inst_649:
+// rs1_val==65536 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x667, x2, 476, x3)
+
+inst_650:
+// rs1_val==65536 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x2e, x2, 480, x3)
+
+inst_651:
+// rs1_val==65536 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x1, x2, 484, x3)
+
+inst_652:
+// rs1_val==65536 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x40, x2, 488, x3)
+
+inst_653:
+// rs1_val==1717986917 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x66666665, 0xaab, x2, 492, x3)
+
+inst_654:
+// rs1_val==1717986917 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x6, x2, 496, x3)
+
+inst_655:
+// rs1_val==1717986917 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x334, x2, 500, x3)
+
+inst_656:
+// rs1_val==1717986917 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x667, x2, 504, x3)
+
+inst_657:
+// rs1_val==1717986917 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x2e, x2, 508, x3)
+
+inst_658:
+// rs1_val==1717986917 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x1, x2, 512, x3)
+
+inst_659:
+// rs1_val==1717986917 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x66666665; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x66666665, 0x40, x2, 516, x3)
+
+inst_660:
+// rs1_val==46339 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x3, x2, 520, x3)
+
+inst_661:
+// rs1_val==46339 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x555, x2, 524, x3)
+
+inst_662:
+// rs1_val==46339 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb503, 0xaaa, x2, 528, x3)
+
+inst_663:
+// rs1_val==46339 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x5, x2, 532, x3)
+
+inst_664:
+// rs1_val==46339 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x333, x2, 536, x3)
+
+inst_665:
+// rs1_val==46339 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x666, x2, 540, x3)
+
+inst_666:
+// rs1_val==46339 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x2d, x2, 544, x3)
+
+inst_667:
+// rs1_val==46339 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x0, x2, 548, x3)
+
+inst_668:
+// rs1_val==46339 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x3f, x2, 552, x3)
+
+inst_669:
+// rs1_val==46339 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x2, x2, 556, x3)
+
+inst_670:
+// rs1_val==46339 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x554, x2, 560, x3)
+
+inst_671:
+// rs1_val==46339 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb503, 0xaa9, x2, 564, x3)
+
+inst_672:
+// rs1_val==46339 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x4, x2, 568, x3)
+
+inst_673:
+// rs1_val==46339 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x332, x2, 572, x3)
+
+inst_674:
+// rs1_val==46339 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x665, x2, 576, x3)
+
+inst_675:
+// rs1_val==46339 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x2c, x2, 580, x3)
+
+inst_676:
+// rs1_val==46339 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x3e, x2, 584, x3)
+
+inst_677:
+// rs1_val==46339 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x556, x2, 588, x3)
+
+inst_678:
+// rs1_val==46339 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb503, 0xaab, x2, 592, x3)
+
+inst_679:
+// rs1_val==46339 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x6, x2, 596, x3)
+
+inst_680:
+// rs1_val==46339 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x334, x2, 600, x3)
+
+inst_681:
+// rs1_val==46339 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x667, x2, 604, x3)
+
+inst_682:
+// rs1_val==46339 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x2e, x2, 608, x3)
+
+inst_683:
+// rs1_val==46339 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x1, x2, 612, x3)
+
+inst_684:
+// rs1_val==46339 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb503; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb503, 0x40, x2, 616, x3)
+
+inst_685:
+// rs1_val==65534 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x3, x2, 620, x3)
+
+inst_686:
+// rs1_val==65534 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x555, x2, 624, x3)
+
+inst_687:
+// rs1_val==65534 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xfffe, 0xaaa, x2, 628, x3)
+
+inst_688:
+// rs1_val==65534 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x5, x2, 632, x3)
+
+inst_689:
+// rs1_val==65534 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x333, x2, 636, x3)
+
+inst_690:
+// rs1_val==65534 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x2d, x2, 640, x3)
+
+inst_691:
+// rs1_val==65534 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x0, x2, 644, x3)
+
+inst_692:
+// rs1_val==65534 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x3f, x2, 648, x3)
+
+inst_693:
+// rs1_val==65534 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x2, x2, 652, x3)
+
+inst_694:
+// rs1_val==65534 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x554, x2, 656, x3)
+
+inst_695:
+// rs1_val==65534 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xfffe, 0xaa9, x2, 660, x3)
+
+inst_696:
+// rs1_val==65534 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x4, x2, 664, x3)
+
+inst_697:
+// rs1_val==65534 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffe; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffe, 0x332, x2, 668, x3)
+
+inst_698:
+// imm_val == 4094, rs1_val == 16
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10; immval:0xffe
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x10, 0xffe, x2, 672, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x7_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_1:
+ .fill 18*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 169*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/sltu-01.S b/riscof/suite/rv32i_m/I/sltu-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..fcb31c46c04bfd530a267f44efa1bebc69f102be
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/sltu-01.S
@@ -0,0 +1,3689 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sltu instruction of the RISC-V I extension for the sltu covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sltu)
+
+RVTEST_SIGBASE( x9,signature_x9_1)
+
+inst_0:
+// rs2 == rd != rs1, rs1==x0, rs2==x31, rd==x31, rs1_val > 0 and rs2_val > 0, rs2_val == 4294967294, rs1_val != rs2_val and rs1_val > 0 and rs2_val > 0, rs1_val == 2048
+// opcode: sltu ; op1:x0; op2:x31; dest:x31; op1val:0x0; op2val:0xfffffffe
+TEST_RR_OP(sltu, x31, x0, x31, 0x1, 0x0, 0xfffffffe, x9, 0, x7)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x19, rs2==x19, rd==x5, rs1_val == rs2_val and rs1_val > 0 and rs2_val > 0, rs2_val == 1048576, rs1_val == 1048576
+// opcode: sltu ; op1:x19; op2:x19; dest:x5; op1val:0x100000; op2val:0x100000
+TEST_RR_OP(sltu, x5, x19, x19, 0x0, 0x100000, 0x100000, x9, 4, x7)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x25, rs2==x25, rd==x25, rs2_val == 0, rs1_val == 1073741824
+// opcode: sltu ; op1:x25; op2:x25; dest:x25; op1val:0x40000000; op2val:0x40000000
+TEST_RR_OP(sltu, x25, x25, x25, 0x0, 0x40000000, 0x40000000, x9, 8, x7)
+
+inst_3:
+// rs1 == rd != rs2, rs1==x14, rs2==x24, rd==x14, rs2_val == (2**(xlen)-1), rs1_val == 4294967294
+// opcode: sltu ; op1:x14; op2:x24; dest:x14; op1val:0xfffffffe; op2val:0xffffffff
+TEST_RR_OP(sltu, x14, x14, x24, 0x1, 0xfffffffe, 0xffffffff, x9, 12, x7)
+
+inst_4:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x17, rs2==x13, rd==x12, rs2_val == 1, rs1_val == 1, rs1_val==1 and rs2_val==1
+// opcode: sltu ; op1:x17; op2:x13; dest:x12; op1val:0x1; op2val:0x1
+TEST_RR_OP(sltu, x12, x17, x13, 0x0, 0x1, 0x1, x9, 16, x7)
+
+inst_5:
+// rs1==x26, rs2==x18, rd==x24, rs1_val == 0,
+// opcode: sltu ; op1:x26; op2:x18; dest:x24; op1val:0x0; op2val:0xb
+TEST_RR_OP(sltu, x24, x26, x18, 0x1, 0x0, 0xb, x9, 20, x7)
+
+inst_6:
+// rs1==x5, rs2==x14, rd==x19, rs1_val == (2**(xlen)-1),
+// opcode: sltu ; op1:x5; op2:x14; dest:x19; op1val:0xffffffff; op2val:0x0
+TEST_RR_OP(sltu, x19, x5, x14, 0x0, 0xffffffff, 0x0, x9, 24, x7)
+
+inst_7:
+// rs1==x3, rs2==x22, rd==x0, rs2_val == 2, rs1_val==4 and rs2_val==2, rs1_val == 4
+// opcode: sltu ; op1:x3; op2:x22; dest:x0; op1val:0x4; op2val:0x2
+TEST_RR_OP(sltu, x0, x3, x22, 0, 0x4, 0x2, x9, 28, x7)
+
+inst_8:
+// rs1==x23, rs2==x29, rd==x20, rs2_val == 4, rs1_val == 4160749567
+// opcode: sltu ; op1:x23; op2:x29; dest:x20; op1val:0xf7ffffff; op2val:0x4
+TEST_RR_OP(sltu, x20, x23, x29, 0x0, 0xf7ffffff, 0x4, x9, 32, x7)
+
+inst_9:
+// rs1==x4, rs2==x6, rd==x10, rs2_val == 8,
+// opcode: sltu ; op1:x4; op2:x6; dest:x10; op1val:0x11; op2val:0x8
+TEST_RR_OP(sltu, x10, x4, x6, 0x0, 0x11, 0x8, x9, 36, x7)
+
+inst_10:
+// rs1==x12, rs2==x17, rd==x1, rs2_val == 16, rs1_val == 2147483647
+// opcode: sltu ; op1:x12; op2:x17; dest:x1; op1val:0x7fffffff; op2val:0x10
+TEST_RR_OP(sltu, x1, x12, x17, 0x0, 0x7fffffff, 0x10, x9, 40, x7)
+
+inst_11:
+// rs1==x30, rs2==x8, rd==x6, rs2_val == 32, rs1_val == 33554432
+// opcode: sltu ; op1:x30; op2:x8; dest:x6; op1val:0x2000000; op2val:0x20
+TEST_RR_OP(sltu, x6, x30, x8, 0x0, 0x2000000, 0x20, x9, 44, x7)
+
+inst_12:
+// rs1==x21, rs2==x16, rd==x3, rs2_val == 64, rs1_val == 4294965247
+// opcode: sltu ; op1:x21; op2:x16; dest:x3; op1val:0xfffff7ff; op2val:0x40
+TEST_RR_OP(sltu, x3, x21, x16, 0x0, 0xfffff7ff, 0x40, x9, 48, x7)
+
+inst_13:
+// rs1==x29, rs2==x26, rd==x17, rs2_val == 128, rs1_val == 1024
+// opcode: sltu ; op1:x29; op2:x26; dest:x17; op1val:0x400; op2val:0x80
+TEST_RR_OP(sltu, x17, x29, x26, 0x0, 0x400, 0x80, x9, 52, x7)
+
+inst_14:
+// rs1==x18, rs2==x10, rd==x28, rs2_val == 256,
+// opcode: sltu ; op1:x18; op2:x10; dest:x28; op1val:0xd; op2val:0x100
+TEST_RR_OP(sltu, x28, x18, x10, 0x1, 0xd, 0x100, x9, 56, x7)
+
+inst_15:
+// rs1==x2, rs2==x28, rd==x11, rs2_val == 512,
+// opcode: sltu ; op1:x2; op2:x28; dest:x11; op1val:0x4; op2val:0x200
+TEST_RR_OP(sltu, x11, x2, x28, 0x1, 0x4, 0x200, x9, 60, x7)
+
+inst_16:
+// rs1==x8, rs2==x30, rd==x29, rs2_val == 1024, rs1_val == 4294967231
+// opcode: sltu ; op1:x8; op2:x30; dest:x29; op1val:0xffffffbf; op2val:0x400
+TEST_RR_OP(sltu, x29, x8, x30, 0x0, 0xffffffbf, 0x400, x9, 64, x17)
+
+inst_17:
+// rs1==x22, rs2==x11, rd==x7, rs2_val == 2048, rs1_val == 128
+// opcode: sltu ; op1:x22; op2:x11; dest:x7; op1val:0x80; op2val:0x800
+TEST_RR_OP(sltu, x7, x22, x11, 0x1, 0x80, 0x800, x9, 68, x17)
+RVTEST_SIGBASE( x14,signature_x14_0)
+
+inst_18:
+// rs1==x15, rs2==x4, rd==x9, rs2_val == 4096, rs1_val == 2097152
+// opcode: sltu ; op1:x15; op2:x4; dest:x9; op1val:0x200000; op2val:0x1000
+TEST_RR_OP(sltu, x9, x15, x4, 0x0, 0x200000, 0x1000, x14, 0, x17)
+
+inst_19:
+// rs1==x28, rs2==x12, rd==x13, rs2_val == 8192,
+// opcode: sltu ; op1:x28; op2:x12; dest:x13; op1val:0x80; op2val:0x2000
+TEST_RR_OP(sltu, x13, x28, x12, 0x1, 0x80, 0x2000, x14, 4, x17)
+
+inst_20:
+// rs1==x31, rs2==x20, rd==x26, rs2_val == 16384, rs1_val == 8388608
+// opcode: sltu ; op1:x31; op2:x20; dest:x26; op1val:0x800000; op2val:0x4000
+TEST_RR_OP(sltu, x26, x31, x20, 0x0, 0x800000, 0x4000, x14, 8, x17)
+
+inst_21:
+// rs1==x27, rs2==x5, rd==x16, rs2_val == 32768, rs1_val == 32768
+// opcode: sltu ; op1:x27; op2:x5; dest:x16; op1val:0x8000; op2val:0x8000
+TEST_RR_OP(sltu, x16, x27, x5, 0x0, 0x8000, 0x8000, x14, 12, x17)
+
+inst_22:
+// rs1==x16, rs2==x0, rd==x2, rs2_val == 65536, rs1_val == 3758096383
+// opcode: sltu ; op1:x16; op2:x0; dest:x2; op1val:0xdfffffff; op2val:0x0
+TEST_RR_OP(sltu, x2, x16, x0, 0x0, 0xdfffffff, 0x0, x14, 16, x17)
+
+inst_23:
+// rs1==x11, rs2==x9, rd==x23, rs2_val == 131072,
+// opcode: sltu ; op1:x11; op2:x9; dest:x23; op1val:0x3; op2val:0x20000
+TEST_RR_OP(sltu, x23, x11, x9, 0x1, 0x3, 0x20000, x14, 20, x17)
+
+inst_24:
+// rs1==x20, rs2==x21, rd==x4, rs2_val == 262144, rs1_val == 2147483648
+// opcode: sltu ; op1:x20; op2:x21; dest:x4; op1val:0x80000000; op2val:0x40000
+TEST_RR_OP(sltu, x4, x20, x21, 0x0, 0x80000000, 0x40000, x14, 24, x17)
+
+inst_25:
+// rs1==x13, rs2==x7, rd==x27, rs2_val == 524288, rs1_val == 536870912
+// opcode: sltu ; op1:x13; op2:x7; dest:x27; op1val:0x20000000; op2val:0x80000
+TEST_RR_OP(sltu, x27, x13, x7, 0x0, 0x20000000, 0x80000, x14, 28, x17)
+
+inst_26:
+// rs1==x7, rs2==x1, rd==x18, rs2_val == 2097152, rs1_val == 8
+// opcode: sltu ; op1:x7; op2:x1; dest:x18; op1val:0x8; op2val:0x200000
+TEST_RR_OP(sltu, x18, x7, x1, 0x1, 0x8, 0x200000, x14, 32, x17)
+
+inst_27:
+// rs1==x1, rs2==x27, rd==x22, rs2_val == 4194304, rs1_val == 4293918719
+// opcode: sltu ; op1:x1; op2:x27; dest:x22; op1val:0xffefffff; op2val:0x400000
+TEST_RR_OP(sltu, x22, x1, x27, 0x0, 0xffefffff, 0x400000, x14, 36, x17)
+
+inst_28:
+// rs1==x9, rs2==x23, rd==x21, rs2_val == 8388608, rs1_val == 2863311530
+// opcode: sltu ; op1:x9; op2:x23; dest:x21; op1val:0xaaaaaaaa; op2val:0x800000
+TEST_RR_OP(sltu, x21, x9, x23, 0x0, 0xaaaaaaaa, 0x800000, x14, 40, x17)
+
+inst_29:
+// rs1==x6, rs2==x2, rd==x30, rs2_val == 16777216,
+// opcode: sltu ; op1:x6; op2:x2; dest:x30; op1val:0x66666667; op2val:0x1000000
+TEST_RR_OP(sltu, x30, x6, x2, 0x0, 0x66666667, 0x1000000, x14, 44, x17)
+
+inst_30:
+// rs1==x10, rs2==x3, rd==x15, rs2_val == 33554432, rs1_val == 4227858431
+// opcode: sltu ; op1:x10; op2:x3; dest:x15; op1val:0xfbffffff; op2val:0x2000000
+TEST_RR_OP(sltu, x15, x10, x3, 0x0, 0xfbffffff, 0x2000000, x14, 48, x17)
+
+inst_31:
+// rs1==x24, rs2==x15, rd==x8, rs2_val == 67108864, rs1_val == 256
+// opcode: sltu ; op1:x24; op2:x15; dest:x8; op1val:0x100; op2val:0x4000000
+TEST_RR_OP(sltu, x8, x24, x15, 0x1, 0x100, 0x4000000, x14, 52, x17)
+
+inst_32:
+// rs2_val == 134217728, rs1_val == 4294959103
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffdfff; op2val:0x8000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffdfff, 0x8000000, x14, 56, x1)
+
+inst_33:
+// rs2_val == 268435456,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x10000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x40000000, 0x10000000, x14, 60, x1)
+
+inst_34:
+// rs2_val == 536870912, rs1_val == 4278190079
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfeffffff; op2val:0x20000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfeffffff, 0x20000000, x14, 64, x1)
+
+inst_35:
+// rs2_val == 1073741824, rs1_val == 268435456
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x40000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000000, 0x40000000, x14, 68, x1)
+
+inst_36:
+// rs2_val == 2147483648,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x80000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x40000000, 0x80000000, x14, 72, x1)
+
+inst_37:
+// rs2_val == 4294967293,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xfffffffd
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333333, 0xfffffffd, x14, 76, x1)
+
+inst_38:
+// rs2_val == 4294967291, rs1_val == 262144
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0xfffffffb
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x40000, 0xfffffffb, x14, 80, x1)
+
+inst_39:
+// rs2_val == 4294967287,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xfffffff7
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x66666666, 0xfffffff7, x14, 84, x1)
+
+inst_40:
+// rs2_val == 4294967279,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xffffffef
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xffffffef, x14, 88, x1)
+
+inst_41:
+// rs2_val == 4294967263,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb; op2val:0xffffffdf
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb, 0xffffffdf, x14, 92, x1)
+
+inst_42:
+// rs2_val == 4294967231,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xa; op2val:0xffffffbf
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xa, 0xffffffbf, x14, 96, x1)
+
+inst_43:
+// rs2_val == 4294967167,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0xffffff7f
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x80, 0xffffff7f, x14, 100, x1)
+
+inst_44:
+// rs2_val == 4294967039, rs1_val == 4294967287
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffff7; op2val:0xfffffeff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffff7, 0xfffffeff, x14, 104, x1)
+
+inst_45:
+// rs2_val == 4294966783, rs1_val == 16777216
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0xfffffdff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1000000, 0xfffffdff, x14, 108, x1)
+
+inst_46:
+// rs2_val == 4294966271,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffff7; op2val:0xfffffbff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffff7, 0xfffffbff, x14, 112, x1)
+
+inst_47:
+// rs2_val == 4294965247, rs1_val == 8192
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0xfffff7ff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2000, 0xfffff7ff, x14, 116, x1)
+
+inst_48:
+// rs2_val == 4294963199, rs1_val == 4294443007
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfff7ffff; op2val:0xffffefff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfff7ffff, 0xffffefff, x14, 120, x1)
+
+inst_49:
+// rs2_val == 4294959103,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xffffdfff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xffffdfff, x14, 124, x1)
+
+inst_50:
+// rs2_val == 4294950911,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xffffbfff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0xffffbfff, x14, 128, x1)
+
+inst_51:
+// rs2_val == 4294934527, rs1_val == 4294836223
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffdffff; op2val:0xffff7fff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffdffff, 0xffff7fff, x14, 132, x1)
+
+inst_52:
+// rs2_val == 4294901759,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xa; op2val:0xfffeffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xa, 0xfffeffff, x14, 136, x1)
+
+inst_53:
+// rs2_val == 4294836223,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfff7ffff; op2val:0xfffdffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfff7ffff, 0xfffdffff, x14, 140, x1)
+
+inst_54:
+// rs2_val == 4294705151,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:0xfffbffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x8000, 0xfffbffff, x14, 144, x1)
+
+inst_55:
+// rs2_val == 4294443007, rs1_val == 64
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0xfff7ffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x40, 0xfff7ffff, x14, 148, x1)
+
+inst_56:
+// rs2_val == 4293918719, rs1_val == 16
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0xffefffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10, 0xffefffff, x14, 152, x1)
+
+inst_57:
+// rs2_val == 4292870143,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xffdfffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xffdfffff, x14, 156, x1)
+
+inst_58:
+// rs2_val == 4290772991,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xffbfffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xffbfffff, x14, 160, x1)
+
+inst_59:
+// rs2_val == 4286578687,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xff7fffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0xff7fffff, x14, 164, x1)
+
+inst_60:
+// rs2_val == 4278190079,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xfeffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xfeffffff, x14, 168, x1)
+
+inst_61:
+// rs2_val == 4261412863,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0xfdffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x800000, 0xfdffffff, x14, 172, x1)
+
+inst_62:
+// rs2_val == 4227858431,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xfbffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0xfbffffff, x14, 176, x1)
+
+inst_63:
+// rs2_val == 4160749567, rs1_val == 1431655765
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xf7ffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555555, 0xf7ffffff, x14, 180, x1)
+
+inst_64:
+// rs2_val == 4026531839, rs1_val == 4292870143
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffdfffff; op2val:0xefffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffdfffff, 0xefffffff, x14, 184, x1)
+
+inst_65:
+// rs2_val == 3758096383,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xdfffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xdfffffff, x14, 188, x1)
+
+inst_66:
+// rs2_val == 3221225471,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:0xbfffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x800, 0xbfffffff, x14, 192, x1)
+
+inst_67:
+// rs2_val == 2147483647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x7fffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x800000, 0x7fffffff, x14, 196, x1)
+
+inst_68:
+// rs2_val == 1431655765, rs1_val == 4290772991
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffbfffff; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffbfffff, 0x55555555, x14, 200, x1)
+
+inst_69:
+// rs2_val == 2863311530, rs1_val==1431655764 and rs2_val==2863311530
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555554, 0xaaaaaaaa, x14, 204, x1)
+
+inst_70:
+// rs1_val == 2, rs1_val==2 and rs2_val==1717986917
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x66666665, x14, 208, x1)
+
+inst_71:
+// rs1_val == 32,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x20, 0xb504, x14, 212, x1)
+
+inst_72:
+// rs1_val == 512,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x200, 0x3, x14, 216, x1)
+
+inst_73:
+// rs1_val == 4096,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x1000, 0x3, x14, 220, x1)
+
+inst_74:
+// rs1_val == 16384,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x4000, 0x0, x14, 224, x1)
+
+inst_75:
+// rs1_val == 65536, rs1_val==65536 and rs2_val==5
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000, 0x5, x14, 228, x1)
+
+inst_76:
+// rs1_val == 131072,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0x20000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x20000, 0x20000, x14, 232, x1)
+
+inst_77:
+// rs1_val == 524288,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x80000, 0x55555554, x14, 236, x1)
+
+inst_78:
+// rs1_val == 4194304,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x200000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x400000, 0x200000, x14, 240, x1)
+
+inst_79:
+// rs1_val == 67108864,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4000000, 0x55555555, x14, 244, x1)
+
+inst_80:
+// rs1_val == 134217728,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0xfffdffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x8000000, 0xfffdffff, x14, 248, x1)
+
+inst_81:
+// rs1_val == 4294967293,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffd; op2val:0x11
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffd, 0x11, x14, 252, x1)
+
+inst_82:
+// rs1_val == 4294967291,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffb; op2val:0xffffff7f
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffb, 0xffffff7f, x14, 256, x1)
+
+inst_83:
+// rs1_val == 4294967279,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffef; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffef, 0x33333334, x14, 260, x1)
+
+inst_84:
+// rs1_val == 4294967263,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffdf; op2val:0xfffbffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffdf, 0xfffbffff, x14, 264, x1)
+
+inst_85:
+// rs1_val == 4294967167,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffff7f; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffff7f, 0x1, x14, 268, x1)
+
+inst_86:
+// rs1_val == 4294967039,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffeff; op2val:0x40000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffeff, 0x40000000, x14, 272, x1)
+
+inst_87:
+// rs1_val == 4294966783,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffdff; op2val:0xa
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffdff, 0xa, x14, 276, x1)
+
+inst_88:
+// rs1_val == 4294966271,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffbff; op2val:0xf7ffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffbff, 0xf7ffffff, x14, 280, x1)
+
+inst_89:
+// rs1_val == 4294963199,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffefff; op2val:0x100000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffefff, 0x100000, x14, 284, x1)
+
+inst_90:
+// rs1_val == 4294950911,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffbfff; op2val:0x8000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffbfff, 0x8000, x14, 288, x1)
+
+inst_91:
+// rs1_val == 4294934527,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff7fff; op2val:0xfffeffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff7fff, 0xfffeffff, x14, 292, x1)
+
+inst_92:
+// rs1_val == 4294901759,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffeffff; op2val:0xfffff7ff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffeffff, 0xfffff7ff, x14, 296, x1)
+
+inst_93:
+// rs1_val == 4294705151,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffbffff; op2val:0xfff7ffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffbffff, 0xfff7ffff, x14, 300, x1)
+
+inst_94:
+// rs1_val == 4286578687,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xff7fffff; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xff7fffff, 0x2, x14, 304, x1)
+
+inst_95:
+// rs1_val == 4261412863,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfdffffff; op2val:0xbfffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfdffffff, 0xbfffffff, x14, 308, x1)
+
+inst_96:
+// rs1_val == 4026531839,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xefffffff; op2val:0x800
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xefffffff, 0x800, x14, 312, x1)
+
+inst_97:
+// rs1_val == 3221225471,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xbfffffff; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xbfffffff, 0x4, x14, 316, x1)
+
+inst_98:
+// rs1_val==3 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3, 0x3, x14, 320, x1)
+
+inst_99:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x55555555, x14, 324, x1)
+
+inst_100:
+// rs1_val==3 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xaaaaaaaa, x14, 328, x1)
+
+inst_101:
+// rs1_val==3 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x5, x14, 332, x1)
+
+inst_102:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x33333333, x14, 336, x1)
+
+inst_103:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x66666666, x14, 340, x1)
+
+inst_104:
+// rs1_val==3 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xb504, x14, 344, x1)
+
+inst_105:
+// rs1_val==3 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3, 0x0, x14, 348, x1)
+
+inst_106:
+// rs1_val==3 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xffff, x14, 352, x1)
+
+inst_107:
+// rs1_val==3 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3, 0x2, x14, 356, x1)
+
+inst_108:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x55555554, x14, 360, x1)
+
+inst_109:
+// rs1_val==3 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xaaaaaaa9, x14, 364, x1)
+
+inst_110:
+// rs1_val==3 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x4, x14, 368, x1)
+
+inst_111:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x33333332, x14, 372, x1)
+
+inst_112:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x66666665, x14, 376, x1)
+
+inst_113:
+// rs1_val==3 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xb503, x14, 380, x1)
+
+inst_114:
+// rs1_val==3 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xfffe, x14, 384, x1)
+
+inst_115:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x55555556, x14, 388, x1)
+
+inst_116:
+// rs1_val==3 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xaaaaaaab, x14, 392, x1)
+
+inst_117:
+// rs1_val==3 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x6, x14, 396, x1)
+
+inst_118:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x33333334, x14, 400, x1)
+
+inst_119:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x66666667, x14, 404, x1)
+
+inst_120:
+// rs1_val==3 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xb505, x14, 408, x1)
+
+inst_121:
+// rs1_val==3 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3, 0x1, x14, 412, x1)
+
+inst_122:
+// rs1_val==3 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x10000, x14, 416, x1)
+
+inst_123:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0x3, x14, 420, x1)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0x55555555, x14, 424, x1)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555555, 0xaaaaaaaa, x14, 428, x1)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0x5, x14, 432, x1)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0x33333333, x14, 436, x1)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555555, 0x66666666, x14, 440, x1)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0xb504, x14, 444, x1)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0x0, x14, 448, x1)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0xffff, x14, 452, x1)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0x2, x14, 456, x1)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0x55555554, x14, 460, x1)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555555, 0xaaaaaaa9, x14, 464, x1)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0x4, x14, 468, x1)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0x33333332, x14, 472, x1)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555555, 0x66666665, x14, 476, x1)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0xb503, x14, 480, x1)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0xfffe, x14, 484, x1)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555555, 0x55555556, x14, 488, x1)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555555, 0xaaaaaaab, x14, 492, x1)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0x6, x14, 496, x1)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0x33333334, x14, 500, x1)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555555, 0x66666667, x14, 504, x1)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0xb505, x14, 508, x1)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0x1, x14, 512, x1)
+
+inst_147:
+// rs1_val==1431655765 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555555, 0x10000, x14, 516, x1)
+
+inst_148:
+// rs1_val==2863311530 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x3, x14, 520, x1)
+
+inst_149:
+// rs1_val==2863311530 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x55555555, x14, 524, x1)
+
+inst_150:
+// rs1_val==2863311530 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0xaaaaaaaa, x14, 528, x1)
+
+inst_151:
+// rs1_val==2863311530 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x5, x14, 532, x1)
+
+inst_152:
+// rs1_val==2863311530 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x33333333, x14, 536, x1)
+
+inst_153:
+// rs1_val==2863311530 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x66666666, x14, 540, x1)
+
+inst_154:
+// rs1_val==2863311530 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0xb504, x14, 544, x1)
+
+inst_155:
+// rs1_val==2863311530 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x0, x14, 548, x1)
+
+inst_156:
+// rs1_val==2863311530 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0xffff, x14, 552, x1)
+
+inst_157:
+// rs1_val==2863311530 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x2, x14, 556, x1)
+
+inst_158:
+// rs1_val==2863311530 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x55555554, x14, 560, x1)
+
+inst_159:
+// rs1_val==2863311530 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0xaaaaaaa9, x14, 564, x1)
+
+inst_160:
+// rs1_val==2863311530 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x4, x14, 568, x1)
+
+inst_161:
+// rs1_val==2863311530 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x33333332, x14, 572, x1)
+
+inst_162:
+// rs1_val==2863311530 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x66666665, x14, 576, x1)
+
+inst_163:
+// rs1_val==2863311530 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0xb503, x14, 580, x1)
+
+inst_164:
+// rs1_val==2863311530 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0xfffe, x14, 584, x1)
+
+inst_165:
+// rs1_val==2863311530 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x55555556, x14, 588, x1)
+
+inst_166:
+// rs1_val==2863311530 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xaaaaaaaa, 0xaaaaaaab, x14, 592, x1)
+
+inst_167:
+// rs1_val==2863311530 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x6, x14, 596, x1)
+
+inst_168:
+// rs1_val==2863311530 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x33333334, x14, 600, x1)
+
+inst_169:
+// rs1_val==2863311530 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x66666667, x14, 604, x1)
+
+inst_170:
+// rs1_val==2863311530 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0xb505, x14, 608, x1)
+
+inst_171:
+// rs1_val==2863311530 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x1, x14, 612, x1)
+
+inst_172:
+// rs1_val==2863311530 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x10000, x14, 616, x1)
+
+inst_173:
+// rs1_val==5 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5, 0x3, x14, 620, x1)
+
+inst_174:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x55555555, x14, 624, x1)
+
+inst_175:
+// rs1_val==5 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xaaaaaaaa, x14, 628, x1)
+
+inst_176:
+// rs1_val==5 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5, 0x5, x14, 632, x1)
+
+inst_177:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x33333333, x14, 636, x1)
+
+inst_178:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x66666666, x14, 640, x1)
+
+inst_179:
+// rs1_val==5 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xb504, x14, 644, x1)
+
+inst_180:
+// rs1_val==5 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5, 0x0, x14, 648, x1)
+
+inst_181:
+// rs1_val==5 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xffff, x14, 652, x1)
+
+inst_182:
+// rs1_val==5 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5, 0x2, x14, 656, x1)
+
+inst_183:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x55555554, x14, 660, x1)
+
+inst_184:
+// rs1_val==5 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xaaaaaaa9, x14, 664, x1)
+
+inst_185:
+// rs1_val==5 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5, 0x4, x14, 668, x1)
+
+inst_186:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x33333332, x14, 672, x1)
+
+inst_187:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x66666665, x14, 676, x1)
+
+inst_188:
+// rs1_val==5 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xb503, x14, 680, x1)
+
+inst_189:
+// rs1_val==5 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xfffe, x14, 684, x1)
+
+inst_190:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x55555556, x14, 688, x1)
+
+inst_191:
+// rs1_val==5 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xaaaaaaab, x14, 692, x1)
+
+inst_192:
+// rs1_val==5 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x6, x14, 696, x1)
+
+inst_193:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x33333334, x14, 700, x1)
+
+inst_194:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x66666667, x14, 704, x1)
+
+inst_195:
+// rs1_val==5 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xb505, x14, 708, x1)
+
+inst_196:
+// rs1_val==5 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5, 0x1, x14, 712, x1)
+
+inst_197:
+// rs1_val==5 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x10000, x14, 716, x1)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0x3, x14, 720, x1)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333333, 0x55555555, x14, 724, x1)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333333, 0xaaaaaaaa, x14, 728, x1)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0x5, x14, 732, x1)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0x33333333, x14, 736, x1)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333333, 0x66666666, x14, 740, x1)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0xb504, x14, 744, x1)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0x0, x14, 748, x1)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0xffff, x14, 752, x1)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0x2, x14, 756, x1)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333333, 0x55555554, x14, 760, x1)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333333, 0xaaaaaaa9, x14, 764, x1)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0x4, x14, 768, x1)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0x33333332, x14, 772, x1)
+
+inst_212:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333333, 0x66666665, x14, 776, x1)
+
+inst_213:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0xb503, x14, 780, x1)
+
+inst_214:
+// rs1_val==858993459 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0xfffe, x14, 784, x1)
+
+inst_215:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333333, 0x55555556, x14, 788, x1)
+
+inst_216:
+// rs1_val==858993459 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333333, 0xaaaaaaab, x14, 792, x1)
+
+inst_217:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0x6, x14, 796, x1)
+
+inst_218:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333333, 0x33333334, x14, 800, x1)
+
+inst_219:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333333, 0x66666667, x14, 804, x1)
+
+inst_220:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0xb505, x14, 808, x1)
+
+inst_221:
+// rs1_val==858993459 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0x1, x14, 812, x1)
+
+inst_222:
+// rs1_val==858993459 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333333, 0x10000, x14, 816, x1)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x3, x14, 820, x1)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x55555555, x14, 824, x1)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x66666666, 0xaaaaaaaa, x14, 828, x1)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x5, x14, 832, x1)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x33333333, x14, 836, x1)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x66666666, x14, 840, x1)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0xb504, x14, 844, x1)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x0, x14, 848, x1)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0xffff, x14, 852, x1)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x2, x14, 856, x1)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x55555554, x14, 860, x1)
+
+inst_234:
+// rs1_val==1717986918 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x66666666, 0xaaaaaaa9, x14, 864, x1)
+
+inst_235:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x4, x14, 868, x1)
+
+inst_236:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x33333332, x14, 872, x1)
+
+inst_237:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x66666665, x14, 876, x1)
+
+inst_238:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0xb503, x14, 880, x1)
+
+inst_239:
+// rs1_val==1717986918 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0xfffe, x14, 884, x1)
+
+inst_240:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x55555556, x14, 888, x1)
+
+inst_241:
+// rs1_val==1717986918 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x66666666, 0xaaaaaaab, x14, 892, x1)
+
+inst_242:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x6, x14, 896, x1)
+
+inst_243:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x33333334, x14, 900, x1)
+
+inst_244:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x66666666, 0x66666667, x14, 904, x1)
+
+inst_245:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0xb505, x14, 908, x1)
+
+inst_246:
+// rs1_val==1717986918 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x1, x14, 912, x1)
+
+inst_247:
+// rs1_val==1717986918 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666666, 0x10000, x14, 916, x1)
+
+inst_248:
+// rs1_val==46340 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504, 0x3, x14, 920, x1)
+
+inst_249:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0x55555555, x14, 924, x1)
+
+inst_250:
+// rs1_val==46340 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0xaaaaaaaa, x14, 928, x1)
+
+inst_251:
+// rs1_val==46340 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504, 0x5, x14, 932, x1)
+
+inst_252:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0x33333333, x14, 936, x1)
+
+inst_253:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0x66666666, x14, 940, x1)
+
+inst_254:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504, 0xb504, x14, 944, x1)
+
+inst_255:
+// rs1_val==46340 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504, 0x0, x14, 948, x1)
+
+inst_256:
+// rs1_val==46340 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0xffff, x14, 952, x1)
+
+inst_257:
+// rs1_val==46340 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504, 0x2, x14, 956, x1)
+
+inst_258:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0x55555554, x14, 960, x1)
+
+inst_259:
+// rs1_val==46340 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0xaaaaaaa9, x14, 964, x1)
+
+inst_260:
+// rs1_val==46340 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504, 0x4, x14, 968, x1)
+
+inst_261:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0x33333332, x14, 972, x1)
+
+inst_262:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0x66666665, x14, 976, x1)
+
+inst_263:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504, 0xb503, x14, 980, x1)
+
+inst_264:
+// rs1_val==46340 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0xfffe, x14, 984, x1)
+
+inst_265:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0x55555556, x14, 988, x1)
+
+inst_266:
+// rs1_val==46340 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0xaaaaaaab, x14, 992, x1)
+
+inst_267:
+// rs1_val==46340 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504, 0x6, x14, 996, x1)
+
+inst_268:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0x33333334, x14, 1000, x1)
+
+inst_269:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0x66666667, x14, 1004, x1)
+
+inst_270:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0xb505, x14, 1008, x1)
+
+inst_271:
+// rs1_val==46340 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504, 0x1, x14, 1012, x1)
+
+inst_272:
+// rs1_val==46340 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504, 0x10000, x14, 1016, x1)
+
+inst_273:
+// rs1_val==0 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x3, x14, 1020, x1)
+
+inst_274:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x55555555, x14, 1024, x1)
+
+inst_275:
+// rs1_val==0 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xaaaaaaaa, x14, 1028, x1)
+
+inst_276:
+// rs1_val==0 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x5, x14, 1032, x1)
+
+inst_277:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x33333333, x14, 1036, x1)
+
+inst_278:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x66666666, x14, 1040, x1)
+
+inst_279:
+// rs1_val==0 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xb504, x14, 1044, x1)
+
+inst_280:
+// rs1_val==0 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x0, 0x0, x14, 1048, x1)
+
+inst_281:
+// rs1_val==0 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xffff, x14, 1052, x1)
+
+inst_282:
+// rs1_val==0 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x2, x14, 1056, x1)
+
+inst_283:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x55555554, x14, 1060, x1)
+
+inst_284:
+// rs1_val==0 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xaaaaaaa9, x14, 1064, x1)
+
+inst_285:
+// rs1_val==0 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x4, x14, 1068, x1)
+
+inst_286:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x33333332, x14, 1072, x1)
+
+inst_287:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x66666665, x14, 1076, x1)
+
+inst_288:
+// rs1_val==0 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xb503, x14, 1080, x1)
+
+inst_289:
+// rs1_val==0 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xfffe, x14, 1084, x1)
+
+inst_290:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x55555556, x14, 1088, x1)
+
+inst_291:
+// rs1_val==0 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xaaaaaaab, x14, 1092, x1)
+
+inst_292:
+// rs1_val==0 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x6, x14, 1096, x1)
+
+inst_293:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x33333334, x14, 1100, x1)
+
+inst_294:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x66666667, x14, 1104, x1)
+
+inst_295:
+// rs1_val==0 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xb505, x14, 1108, x1)
+
+inst_296:
+// rs1_val==0 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x1, x14, 1112, x1)
+
+inst_297:
+// rs1_val==0 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x10000, x14, 1116, x1)
+
+inst_298:
+// rs1_val==65535 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff, 0x3, x14, 1120, x1)
+
+inst_299:
+// rs1_val==65535 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffff, 0x55555555, x14, 1124, x1)
+
+inst_300:
+// rs1_val==65535 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffff, 0xaaaaaaaa, x14, 1128, x1)
+
+inst_301:
+// rs1_val==65535 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff, 0x5, x14, 1132, x1)
+
+inst_302:
+// rs1_val==65535 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffff, 0x33333333, x14, 1136, x1)
+
+inst_303:
+// rs1_val==65535 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffff, 0x66666666, x14, 1140, x1)
+
+inst_304:
+// rs1_val==65535 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff, 0xb504, x14, 1144, x1)
+
+inst_305:
+// rs1_val==65535 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff, 0x0, x14, 1148, x1)
+
+inst_306:
+// rs1_val==65535 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff, 0xffff, x14, 1152, x1)
+
+inst_307:
+// rs1_val==65535 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff, 0x2, x14, 1156, x1)
+
+inst_308:
+// rs1_val==65535 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffff, 0x55555554, x14, 1160, x1)
+
+inst_309:
+// rs1_val==65535 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffff, 0xaaaaaaa9, x14, 1164, x1)
+
+inst_310:
+// rs1_val==65535 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff, 0x4, x14, 1168, x1)
+
+inst_311:
+// rs1_val==65535 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffff, 0x33333332, x14, 1172, x1)
+
+inst_312:
+// rs1_val==65535 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffff, 0x66666665, x14, 1176, x1)
+
+inst_313:
+// rs1_val==65535 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff, 0xb503, x14, 1180, x1)
+
+inst_314:
+// rs1_val==65535 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff, 0xfffe, x14, 1184, x1)
+
+inst_315:
+// rs1_val==65535 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffff, 0x55555556, x14, 1188, x1)
+
+inst_316:
+// rs1_val==65535 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffff, 0xaaaaaaab, x14, 1192, x1)
+
+inst_317:
+// rs1_val==65535 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff, 0x6, x14, 1196, x1)
+
+inst_318:
+// rs1_val==65535 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffff, 0x33333334, x14, 1200, x1)
+
+inst_319:
+// rs1_val==65535 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffff, 0x66666667, x14, 1204, x1)
+
+inst_320:
+// rs1_val==65535 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff, 0xb505, x14, 1208, x1)
+
+inst_321:
+// rs1_val==65535 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff, 0x1, x14, 1212, x1)
+
+inst_322:
+// rs1_val==65535 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffff, 0x10000, x14, 1216, x1)
+
+inst_323:
+// rs1_val==2 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x3, x14, 1220, x1)
+
+inst_324:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x55555555, x14, 1224, x1)
+
+inst_325:
+// rs1_val==2 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xaaaaaaaa, x14, 1228, x1)
+
+inst_326:
+// rs1_val==2 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x5, x14, 1232, x1)
+
+inst_327:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x33333333, x14, 1236, x1)
+
+inst_328:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x66666666, x14, 1240, x1)
+
+inst_329:
+// rs1_val==2 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xb504, x14, 1244, x1)
+
+inst_330:
+// rs1_val==2 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x2, 0x0, x14, 1248, x1)
+
+inst_331:
+// rs1_val==2 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xffff, x14, 1252, x1)
+
+inst_332:
+// rs1_val==2 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x2, 0x2, x14, 1256, x1)
+
+inst_333:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x55555554, x14, 1260, x1)
+
+inst_334:
+// rs1_val==2 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xaaaaaaa9, x14, 1264, x1)
+
+inst_335:
+// rs1_val==2 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x4, x14, 1268, x1)
+
+inst_336:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x33333332, x14, 1272, x1)
+
+inst_337:
+// rs1_val==2 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xb503, x14, 1276, x1)
+
+inst_338:
+// rs1_val==2 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xfffe, x14, 1280, x1)
+
+inst_339:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x55555556, x14, 1284, x1)
+
+inst_340:
+// rs1_val==2 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xaaaaaaab, x14, 1288, x1)
+
+inst_341:
+// rs1_val==2 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x6, x14, 1292, x1)
+
+inst_342:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x33333334, x14, 1296, x1)
+
+inst_343:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x66666667, x14, 1300, x1)
+
+inst_344:
+// rs1_val==2 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xb505, x14, 1304, x1)
+
+inst_345:
+// rs1_val==2 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x2, 0x1, x14, 1308, x1)
+
+inst_346:
+// rs1_val==2 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x10000, x14, 1312, x1)
+
+inst_347:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0x3, x14, 1316, x1)
+
+inst_348:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555554, 0x55555555, x14, 1320, x1)
+
+inst_349:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0x5, x14, 1324, x1)
+
+inst_350:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0x33333333, x14, 1328, x1)
+
+inst_351:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555554, 0x66666666, x14, 1332, x1)
+
+inst_352:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0xb504, x14, 1336, x1)
+
+inst_353:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0x0, x14, 1340, x1)
+
+inst_354:
+// rs1_val==1431655764 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0xffff, x14, 1344, x1)
+
+inst_355:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0x2, x14, 1348, x1)
+
+inst_356:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0x55555554, x14, 1352, x1)
+
+inst_357:
+// rs1_val==1431655764 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555554, 0xaaaaaaa9, x14, 1356, x1)
+
+inst_358:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0x4, x14, 1360, x1)
+
+inst_359:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0x33333332, x14, 1364, x1)
+
+inst_360:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555554, 0x66666665, x14, 1368, x1)
+
+inst_361:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0xb503, x14, 1372, x1)
+
+inst_362:
+// rs1_val==1431655764 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0xfffe, x14, 1376, x1)
+
+inst_363:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555554, 0x55555556, x14, 1380, x1)
+
+inst_364:
+// rs1_val==1431655764 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555554, 0xaaaaaaab, x14, 1384, x1)
+
+inst_365:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0x6, x14, 1388, x1)
+
+inst_366:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0x33333334, x14, 1392, x1)
+
+inst_367:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555554, 0x66666667, x14, 1396, x1)
+
+inst_368:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0xb505, x14, 1400, x1)
+
+inst_369:
+// rs1_val==1431655764 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0x1, x14, 1404, x1)
+
+inst_370:
+// rs1_val==1431655764 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555554, 0x10000, x14, 1408, x1)
+
+inst_371:
+// rs1_val==2863311529 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x3, x14, 1412, x1)
+
+inst_372:
+// rs1_val==2863311529 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x55555555, x14, 1416, x1)
+
+inst_373:
+// rs1_val==2863311529 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0xaaaaaaaa, x14, 1420, x1)
+
+inst_374:
+// rs1_val==2863311529 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x5, x14, 1424, x1)
+
+inst_375:
+// rs1_val==2863311529 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x33333333, x14, 1428, x1)
+
+inst_376:
+// rs1_val==2863311529 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x66666666, x14, 1432, x1)
+
+inst_377:
+// rs1_val==2863311529 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0xb504, x14, 1436, x1)
+
+inst_378:
+// rs1_val==2863311529 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x0, x14, 1440, x1)
+
+inst_379:
+// rs1_val==2863311529 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0xffff, x14, 1444, x1)
+
+inst_380:
+// rs1_val==2863311529 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x2, x14, 1448, x1)
+
+inst_381:
+// rs1_val==2863311529 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x55555554, x14, 1452, x1)
+
+inst_382:
+// rs1_val==2863311529 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0xaaaaaaa9, x14, 1456, x1)
+
+inst_383:
+// rs1_val==2863311529 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x4, x14, 1460, x1)
+
+inst_384:
+// rs1_val==2863311529 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x33333332, x14, 1464, x1)
+
+inst_385:
+// rs1_val==2863311529 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x66666665, x14, 1468, x1)
+
+inst_386:
+// rs1_val==2863311529 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0xb503, x14, 1472, x1)
+
+inst_387:
+// rs1_val==2863311529 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0xfffe, x14, 1476, x1)
+
+inst_388:
+// rs1_val==2863311529 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x55555556, x14, 1480, x1)
+
+inst_389:
+// rs1_val==2863311529 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0xaaaaaaab, x14, 1484, x1)
+
+inst_390:
+// rs1_val==2863311529 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x6, x14, 1488, x1)
+
+inst_391:
+// rs1_val==2863311529 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x33333334, x14, 1492, x1)
+
+inst_392:
+// rs1_val==2863311529 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x66666667, x14, 1496, x1)
+
+inst_393:
+// rs1_val==2863311529 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0xb505, x14, 1500, x1)
+
+inst_394:
+// rs1_val==2863311529 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x1, x14, 1504, x1)
+
+inst_395:
+// rs1_val==2863311529 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x10000, x14, 1508, x1)
+
+inst_396:
+// rs1_val==4 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x4, 0x3, x14, 1512, x1)
+
+inst_397:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x55555555, x14, 1516, x1)
+
+inst_398:
+// rs1_val==4 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xaaaaaaaa, x14, 1520, x1)
+
+inst_399:
+// rs1_val==4 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x5, x14, 1524, x1)
+
+inst_400:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x33333333, x14, 1528, x1)
+
+inst_401:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x66666666, x14, 1532, x1)
+
+inst_402:
+// rs1_val==4 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xb504, x14, 1536, x1)
+
+inst_403:
+// rs1_val==4 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x4, 0x0, x14, 1540, x1)
+
+inst_404:
+// rs1_val==4 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xffff, x14, 1544, x1)
+
+inst_405:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x55555554, x14, 1548, x1)
+
+inst_406:
+// rs1_val==4 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xaaaaaaa9, x14, 1552, x1)
+
+inst_407:
+// rs1_val==4 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x4, 0x4, x14, 1556, x1)
+
+inst_408:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x33333332, x14, 1560, x1)
+
+inst_409:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x66666665, x14, 1564, x1)
+
+inst_410:
+// rs1_val==4 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xb503, x14, 1568, x1)
+
+inst_411:
+// rs1_val==4 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xfffe, x14, 1572, x1)
+
+inst_412:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x55555556, x14, 1576, x1)
+
+inst_413:
+// rs1_val==4 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xaaaaaaab, x14, 1580, x1)
+
+inst_414:
+// rs1_val==4 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x6, x14, 1584, x1)
+
+inst_415:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x33333334, x14, 1588, x1)
+
+inst_416:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x66666667, x14, 1592, x1)
+
+inst_417:
+// rs1_val==4 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xb505, x14, 1596, x1)
+
+inst_418:
+// rs1_val==4 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x4, 0x1, x14, 1600, x1)
+
+inst_419:
+// rs1_val==4 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x10000, x14, 1604, x1)
+
+inst_420:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0x3, x14, 1608, x1)
+
+inst_421:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333332, 0x55555555, x14, 1612, x1)
+
+inst_422:
+// rs1_val==858993458 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333332, 0xaaaaaaaa, x14, 1616, x1)
+
+inst_423:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0x5, x14, 1620, x1)
+
+inst_424:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333332, 0x33333333, x14, 1624, x1)
+
+inst_425:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333332, 0x66666666, x14, 1628, x1)
+
+inst_426:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0xb504, x14, 1632, x1)
+
+inst_427:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0x0, x14, 1636, x1)
+
+inst_428:
+// rs1_val==858993458 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0xffff, x14, 1640, x1)
+
+inst_429:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0x2, x14, 1644, x1)
+
+inst_430:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333332, 0x55555554, x14, 1648, x1)
+
+inst_431:
+// rs1_val==858993458 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333332, 0xaaaaaaa9, x14, 1652, x1)
+
+inst_432:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0x4, x14, 1656, x1)
+
+inst_433:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0x33333332, x14, 1660, x1)
+
+inst_434:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333332, 0x66666665, x14, 1664, x1)
+
+inst_435:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0xb503, x14, 1668, x1)
+
+inst_436:
+// rs1_val==858993458 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0xfffe, x14, 1672, x1)
+
+inst_437:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333332, 0x55555556, x14, 1676, x1)
+
+inst_438:
+// rs1_val==858993458 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333332, 0xaaaaaaab, x14, 1680, x1)
+
+inst_439:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0x6, x14, 1684, x1)
+
+inst_440:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333332, 0x33333334, x14, 1688, x1)
+
+inst_441:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333332, 0x66666667, x14, 1692, x1)
+
+inst_442:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0xb505, x14, 1696, x1)
+
+inst_443:
+// rs1_val==858993458 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0x1, x14, 1700, x1)
+
+inst_444:
+// rs1_val==858993458 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333332, 0x10000, x14, 1704, x1)
+
+inst_445:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x3, x14, 1708, x1)
+
+inst_446:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x55555555, x14, 1712, x1)
+
+inst_447:
+// rs1_val==1717986917 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x66666665, 0xaaaaaaaa, x14, 1716, x1)
+
+inst_448:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x5, x14, 1720, x1)
+
+inst_449:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x33333333, x14, 1724, x1)
+
+inst_450:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x66666665, 0x66666666, x14, 1728, x1)
+
+inst_451:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0xb504, x14, 1732, x1)
+
+inst_452:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x0, x14, 1736, x1)
+
+inst_453:
+// rs1_val==1717986917 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0xffff, x14, 1740, x1)
+
+inst_454:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x2, x14, 1744, x1)
+
+inst_455:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x55555554, x14, 1748, x1)
+
+inst_456:
+// rs1_val==1717986917 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x66666665, 0xaaaaaaa9, x14, 1752, x1)
+
+inst_457:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x4, x14, 1756, x1)
+
+inst_458:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x33333332, x14, 1760, x1)
+
+inst_459:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x66666665, x14, 1764, x1)
+
+inst_460:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0xb503, x14, 1768, x1)
+
+inst_461:
+// rs1_val==1717986917 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0xfffe, x14, 1772, x1)
+
+inst_462:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x55555556, x14, 1776, x1)
+
+inst_463:
+// rs1_val==1717986917 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x1, x14, 1780, x1)
+
+inst_464:
+// rs1_val==1717986917 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x10000, x14, 1784, x1)
+
+inst_465:
+// rs1_val==46339 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb503, 0x3, x14, 1788, x1)
+
+inst_466:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0x55555555, x14, 1792, x1)
+
+inst_467:
+// rs1_val==46339 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0xaaaaaaaa, x14, 1796, x1)
+
+inst_468:
+// rs1_val==46339 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb503, 0x5, x14, 1800, x1)
+
+inst_469:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0x33333333, x14, 1804, x1)
+
+inst_470:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0x66666666, x14, 1808, x1)
+
+inst_471:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0xb504, x14, 1812, x1)
+
+inst_472:
+// rs1_val==46339 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb503, 0x0, x14, 1816, x1)
+
+inst_473:
+// rs1_val==46339 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0xffff, x14, 1820, x1)
+
+inst_474:
+// rs1_val==46339 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb503, 0x2, x14, 1824, x1)
+
+inst_475:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0x55555554, x14, 1828, x1)
+
+inst_476:
+// rs1_val==46339 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0xaaaaaaa9, x14, 1832, x1)
+
+inst_477:
+// rs1_val==46339 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb503, 0x4, x14, 1836, x1)
+
+inst_478:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0x33333332, x14, 1840, x1)
+
+inst_479:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0x66666665, x14, 1844, x1)
+
+inst_480:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb503, 0xb503, x14, 1848, x1)
+
+inst_481:
+// rs1_val==46339 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0xfffe, x14, 1852, x1)
+
+inst_482:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0x55555556, x14, 1856, x1)
+
+inst_483:
+// rs1_val==46339 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0xaaaaaaab, x14, 1860, x1)
+
+inst_484:
+// rs1_val==46339 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb503, 0x6, x14, 1864, x1)
+
+inst_485:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0x33333334, x14, 1868, x1)
+
+inst_486:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0x66666667, x14, 1872, x1)
+
+inst_487:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0xb505, x14, 1876, x1)
+
+inst_488:
+// rs1_val==46339 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb503, 0x1, x14, 1880, x1)
+
+inst_489:
+// rs1_val==46339 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb503, 0x10000, x14, 1884, x1)
+
+inst_490:
+// rs1_val==65534 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffe, 0x3, x14, 1888, x1)
+
+inst_491:
+// rs1_val==65534 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0x55555555, x14, 1892, x1)
+
+inst_492:
+// rs1_val==65534 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0xaaaaaaaa, x14, 1896, x1)
+
+inst_493:
+// rs1_val==65534 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffe, 0x5, x14, 1900, x1)
+
+inst_494:
+// rs1_val==65534 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0x33333333, x14, 1904, x1)
+
+inst_495:
+// rs1_val==65534 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0x66666666, x14, 1908, x1)
+
+inst_496:
+// rs1_val==65534 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffe, 0xb504, x14, 1912, x1)
+
+inst_497:
+// rs1_val==65534 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffe, 0x0, x14, 1916, x1)
+
+inst_498:
+// rs1_val==65534 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0xffff, x14, 1920, x1)
+
+inst_499:
+// rs1_val==65534 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffe, 0x2, x14, 1924, x1)
+
+inst_500:
+// rs1_val==65534 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0x55555554, x14, 1928, x1)
+
+inst_501:
+// rs1_val==65534 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0xaaaaaaa9, x14, 1932, x1)
+
+inst_502:
+// rs1_val==65534 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffe, 0x4, x14, 1936, x1)
+
+inst_503:
+// rs1_val==65534 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0x33333332, x14, 1940, x1)
+
+inst_504:
+// rs1_val==65534 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0x66666665, x14, 1944, x1)
+
+inst_505:
+// rs1_val==65534 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffe, 0xb503, x14, 1948, x1)
+
+inst_506:
+// rs1_val==65534 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffe, 0xfffe, x14, 1952, x1)
+
+inst_507:
+// rs1_val==65534 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0x55555556, x14, 1956, x1)
+
+inst_508:
+// rs1_val==65534 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0xaaaaaaab, x14, 1960, x1)
+
+inst_509:
+// rs1_val==65534 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffe, 0x6, x14, 1964, x1)
+
+inst_510:
+// rs1_val==65534 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0x33333334, x14, 1968, x1)
+
+inst_511:
+// rs1_val==65534 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0x66666667, x14, 1972, x1)
+
+inst_512:
+// rs1_val==65534 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffe, 0xb505, x14, 1976, x1)
+
+inst_513:
+// rs1_val==65534 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffe, 0x1, x14, 1980, x1)
+
+inst_514:
+// rs1_val==65534 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffe, 0x10000, x14, 1984, x1)
+
+inst_515:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x3, x14, 1988, x1)
+
+inst_516:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x55555555, x14, 1992, x1)
+
+inst_517:
+// rs1_val==1431655766 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555556, 0xaaaaaaaa, x14, 1996, x1)
+
+inst_518:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x5, x14, 2000, x1)
+
+inst_519:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x33333333, x14, 2004, x1)
+
+inst_520:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555556, 0x66666666, x14, 2008, x1)
+
+inst_521:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0xb504, x14, 2012, x1)
+
+inst_522:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x0, x14, 2016, x1)
+
+inst_523:
+// rs1_val==1431655766 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0xffff, x14, 2020, x1)
+
+inst_524:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x2, x14, 2024, x1)
+
+inst_525:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x55555554, x14, 2028, x1)
+
+inst_526:
+// rs1_val==1431655766 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555556, 0xaaaaaaa9, x14, 2032, x1)
+
+inst_527:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x4, x14, 2036, x1)
+
+inst_528:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x33333332, x14, 2040, x1)
+
+inst_529:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555556, 0x66666665, x14, 2044, x1)
+RVTEST_SIGBASE( x14,signature_x14_1)
+
+inst_530:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0xb503, x14, 0, x1)
+
+inst_531:
+// rs1_val==1431655766 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0xfffe, x14, 4, x1)
+
+inst_532:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x55555556, x14, 8, x1)
+
+inst_533:
+// rs1_val==1431655766 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555556, 0xaaaaaaab, x14, 12, x1)
+
+inst_534:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x6, x14, 16, x1)
+
+inst_535:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x33333334, x14, 20, x1)
+
+inst_536:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x55555556, 0x66666667, x14, 24, x1)
+
+inst_537:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0xb505, x14, 28, x1)
+
+inst_538:
+// rs1_val==1431655766 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x1, x14, 32, x1)
+
+inst_539:
+// rs1_val==1431655766 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x55555556, 0x10000, x14, 36, x1)
+
+inst_540:
+// rs1_val==2863311531 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x3, x14, 40, x1)
+
+inst_541:
+// rs1_val==2863311531 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x55555555, x14, 44, x1)
+
+inst_542:
+// rs1_val==2863311531 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0xaaaaaaaa, x14, 48, x1)
+
+inst_543:
+// rs1_val==2863311531 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x5, x14, 52, x1)
+
+inst_544:
+// rs1_val==2863311531 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x33333333, x14, 56, x1)
+
+inst_545:
+// rs1_val==2863311531 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x66666666, x14, 60, x1)
+
+inst_546:
+// rs1_val==2863311531 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0xb504, x14, 64, x1)
+
+inst_547:
+// rs1_val==2863311531 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x0, x14, 68, x1)
+
+inst_548:
+// rs1_val==2863311531 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0xffff, x14, 72, x1)
+
+inst_549:
+// rs1_val==2863311531 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x2, x14, 76, x1)
+
+inst_550:
+// rs1_val==2863311531 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x55555554, x14, 80, x1)
+
+inst_551:
+// rs1_val==2863311531 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0xaaaaaaa9, x14, 84, x1)
+
+inst_552:
+// rs1_val==2863311531 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x4, x14, 88, x1)
+
+inst_553:
+// rs1_val==2863311531 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x33333332, x14, 92, x1)
+
+inst_554:
+// rs1_val==2863311531 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x66666665, x14, 96, x1)
+
+inst_555:
+// rs1_val==2863311531 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0xb503, x14, 100, x1)
+
+inst_556:
+// rs1_val==2863311531 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0xfffe, x14, 104, x1)
+
+inst_557:
+// rs1_val==2863311531 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x55555556, x14, 108, x1)
+
+inst_558:
+// rs1_val==2863311531 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0xaaaaaaab, x14, 112, x1)
+
+inst_559:
+// rs1_val==2863311531 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x6, x14, 116, x1)
+
+inst_560:
+// rs1_val==2863311531 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x33333334, x14, 120, x1)
+
+inst_561:
+// rs1_val==2863311531 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x66666667, x14, 124, x1)
+
+inst_562:
+// rs1_val==2863311531 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0xb505, x14, 128, x1)
+
+inst_563:
+// rs1_val==2863311531 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x1, x14, 132, x1)
+
+inst_564:
+// rs1_val==2863311531 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x10000, x14, 136, x1)
+
+inst_565:
+// rs1_val==6 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x3, x14, 140, x1)
+
+inst_566:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x55555555, x14, 144, x1)
+
+inst_567:
+// rs1_val==6 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xaaaaaaaa, x14, 148, x1)
+
+inst_568:
+// rs1_val==6 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x5, x14, 152, x1)
+
+inst_569:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x33333333, x14, 156, x1)
+
+inst_570:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x66666666, x14, 160, x1)
+
+inst_571:
+// rs1_val==6 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xb504, x14, 164, x1)
+
+inst_572:
+// rs1_val==6 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x0, x14, 168, x1)
+
+inst_573:
+// rs1_val==6 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xffff, x14, 172, x1)
+
+inst_574:
+// rs1_val==6 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x2, x14, 176, x1)
+
+inst_575:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x55555554, x14, 180, x1)
+
+inst_576:
+// rs1_val==6 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xaaaaaaa9, x14, 184, x1)
+
+inst_577:
+// rs1_val==6 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x4, x14, 188, x1)
+
+inst_578:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x33333332, x14, 192, x1)
+
+inst_579:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x66666665, x14, 196, x1)
+
+inst_580:
+// rs1_val==6 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xb503, x14, 200, x1)
+
+inst_581:
+// rs1_val==6 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xfffe, x14, 204, x1)
+
+inst_582:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x55555556, x14, 208, x1)
+
+inst_583:
+// rs1_val==6 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xaaaaaaab, x14, 212, x1)
+
+inst_584:
+// rs1_val==6 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x6, x14, 216, x1)
+
+inst_585:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x33333334, x14, 220, x1)
+
+inst_586:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x66666667, x14, 224, x1)
+
+inst_587:
+// rs1_val==6 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xb505, x14, 228, x1)
+
+inst_588:
+// rs1_val==6 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x1, x14, 232, x1)
+
+inst_589:
+// rs1_val==6 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x10000, x14, 236, x1)
+
+inst_590:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0x3, x14, 240, x1)
+
+inst_591:
+// rs1_val==1717986917 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x66666665, 0xaaaaaaab, x14, 244, x1)
+
+inst_592:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333334, 0x55555555, x14, 248, x1)
+
+inst_593:
+// rs1_val==858993460 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333334, 0xaaaaaaaa, x14, 252, x1)
+
+inst_594:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0x5, x14, 256, x1)
+
+inst_595:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0x33333333, x14, 260, x1)
+
+inst_596:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333334, 0x66666666, x14, 264, x1)
+
+inst_597:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0xb504, x14, 268, x1)
+
+inst_598:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0x0, x14, 272, x1)
+
+inst_599:
+// rs1_val==858993460 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0xffff, x14, 276, x1)
+
+inst_600:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0x2, x14, 280, x1)
+
+inst_601:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333334, 0x55555554, x14, 284, x1)
+
+inst_602:
+// rs1_val==858993460 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333334, 0xaaaaaaa9, x14, 288, x1)
+
+inst_603:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0x4, x14, 292, x1)
+
+inst_604:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0x33333332, x14, 296, x1)
+
+inst_605:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333334, 0x66666665, x14, 300, x1)
+
+inst_606:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0xb503, x14, 304, x1)
+
+inst_607:
+// rs1_val==858993460 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0xfffe, x14, 308, x1)
+
+inst_608:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333334, 0x55555556, x14, 312, x1)
+
+inst_609:
+// rs1_val==858993460 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333334, 0xaaaaaaab, x14, 316, x1)
+
+inst_610:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0x6, x14, 320, x1)
+
+inst_611:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0x33333334, x14, 324, x1)
+
+inst_612:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x33333334, 0x66666667, x14, 328, x1)
+
+inst_613:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0xb505, x14, 332, x1)
+
+inst_614:
+// rs1_val==858993460 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0x1, x14, 336, x1)
+
+inst_615:
+// rs1_val==858993460 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x33333334, 0x10000, x14, 340, x1)
+
+inst_616:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x3, x14, 344, x1)
+
+inst_617:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x55555555, x14, 348, x1)
+
+inst_618:
+// rs1_val==1717986919 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x66666667, 0xaaaaaaaa, x14, 352, x1)
+
+inst_619:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x5, x14, 356, x1)
+
+inst_620:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x33333333, x14, 360, x1)
+
+inst_621:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x66666666, x14, 364, x1)
+
+inst_622:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0xb504, x14, 368, x1)
+
+inst_623:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x0, x14, 372, x1)
+
+inst_624:
+// rs1_val==1717986919 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0xffff, x14, 376, x1)
+
+inst_625:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x2, x14, 380, x1)
+
+inst_626:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x55555554, x14, 384, x1)
+
+inst_627:
+// rs1_val==1717986919 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x66666667, 0xaaaaaaa9, x14, 388, x1)
+
+inst_628:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x4, x14, 392, x1)
+
+inst_629:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x33333332, x14, 396, x1)
+
+inst_630:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x66666665, x14, 400, x1)
+
+inst_631:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0xb503, x14, 404, x1)
+
+inst_632:
+// rs1_val==1717986919 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0xfffe, x14, 408, x1)
+
+inst_633:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x55555556, x14, 412, x1)
+
+inst_634:
+// rs1_val==1717986919 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x66666667, 0xaaaaaaab, x14, 416, x1)
+
+inst_635:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x6, x14, 420, x1)
+
+inst_636:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x33333334, x14, 424, x1)
+
+inst_637:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x66666667, x14, 428, x1)
+
+inst_638:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0xb505, x14, 432, x1)
+
+inst_639:
+// rs1_val==1717986919 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x1, x14, 436, x1)
+
+inst_640:
+// rs1_val==1717986919 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666667, 0x10000, x14, 440, x1)
+
+inst_641:
+// rs1_val==46341 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb505, 0x3, x14, 444, x1)
+
+inst_642:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0x55555555, x14, 448, x1)
+
+inst_643:
+// rs1_val==46341 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0xaaaaaaaa, x14, 452, x1)
+
+inst_644:
+// rs1_val==46341 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb505, 0x5, x14, 456, x1)
+
+inst_645:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0x33333333, x14, 460, x1)
+
+inst_646:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0x66666666, x14, 464, x1)
+
+inst_647:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb505, 0xb504, x14, 468, x1)
+
+inst_648:
+// rs1_val==46341 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb505, 0x0, x14, 472, x1)
+
+inst_649:
+// rs1_val==46341 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0xffff, x14, 476, x1)
+
+inst_650:
+// rs1_val==46341 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb505, 0x2, x14, 480, x1)
+
+inst_651:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0x55555554, x14, 484, x1)
+
+inst_652:
+// rs1_val==46341 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0xaaaaaaa9, x14, 488, x1)
+
+inst_653:
+// rs1_val==46341 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb505, 0x4, x14, 492, x1)
+
+inst_654:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0x33333332, x14, 496, x1)
+
+inst_655:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0x66666665, x14, 500, x1)
+
+inst_656:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb505, 0xb503, x14, 504, x1)
+
+inst_657:
+// rs1_val==46341 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0xfffe, x14, 508, x1)
+
+inst_658:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0x55555556, x14, 512, x1)
+
+inst_659:
+// rs1_val==46341 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0xaaaaaaab, x14, 516, x1)
+
+inst_660:
+// rs1_val==46341 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb505, 0x6, x14, 520, x1)
+
+inst_661:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0x33333334, x14, 524, x1)
+
+inst_662:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0x66666667, x14, 528, x1)
+
+inst_663:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb505, 0xb505, x14, 532, x1)
+
+inst_664:
+// rs1_val==46341 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb505, 0x1, x14, 536, x1)
+
+inst_665:
+// rs1_val==46341 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb505, 0x10000, x14, 540, x1)
+
+inst_666:
+// rs1_val==1 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x3, x14, 544, x1)
+
+inst_667:
+// rs1_val==1 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x55555555, x14, 548, x1)
+
+inst_668:
+// rs1_val==1 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xaaaaaaaa, x14, 552, x1)
+
+inst_669:
+// rs1_val==1 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x5, x14, 556, x1)
+
+inst_670:
+// rs1_val==1 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x33333333, x14, 560, x1)
+
+inst_671:
+// rs1_val==1 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x66666666, x14, 564, x1)
+
+inst_672:
+// rs1_val==1 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xb504, x14, 568, x1)
+
+inst_673:
+// rs1_val==1 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x1, 0x0, x14, 572, x1)
+
+inst_674:
+// rs1_val==1 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xffff, x14, 576, x1)
+
+inst_675:
+// rs1_val==1 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x2, x14, 580, x1)
+
+inst_676:
+// rs1_val==1 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x55555554, x14, 584, x1)
+
+inst_677:
+// rs1_val==1 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xaaaaaaa9, x14, 588, x1)
+
+inst_678:
+// rs1_val==1 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x4, x14, 592, x1)
+
+inst_679:
+// rs1_val==1 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x33333332, x14, 596, x1)
+
+inst_680:
+// rs1_val==1 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x66666665, x14, 600, x1)
+
+inst_681:
+// rs1_val==1 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xb503, x14, 604, x1)
+
+inst_682:
+// rs1_val==1 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xfffe, x14, 608, x1)
+
+inst_683:
+// rs1_val==1 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x55555556, x14, 612, x1)
+
+inst_684:
+// rs1_val==1 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xaaaaaaab, x14, 616, x1)
+
+inst_685:
+// rs1_val==1 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x6, x14, 620, x1)
+
+inst_686:
+// rs1_val==1 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x33333334, x14, 624, x1)
+
+inst_687:
+// rs1_val==1 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x66666667, x14, 628, x1)
+
+inst_688:
+// rs1_val==1 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xb505, x14, 632, x1)
+
+inst_689:
+// rs1_val==1 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x10000, x14, 636, x1)
+
+inst_690:
+// rs1_val==65536 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000, 0x3, x14, 640, x1)
+
+inst_691:
+// rs1_val==65536 and rs2_val==1431655765,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x55555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000, 0x55555555, x14, 644, x1)
+
+inst_692:
+// rs1_val==65536 and rs2_val==2863311530,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000, 0xaaaaaaaa, x14, 648, x1)
+
+inst_693:
+// rs1_val==65536 and rs2_val==858993459,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x33333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000, 0x33333333, x14, 652, x1)
+
+inst_694:
+// rs1_val==65536 and rs2_val==1717986918,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x66666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000, 0x66666666, x14, 656, x1)
+
+inst_695:
+// rs1_val==65536 and rs2_val==46340,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xb504
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000, 0xb504, x14, 660, x1)
+
+inst_696:
+// rs1_val==65536 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000, 0x0, x14, 664, x1)
+
+inst_697:
+// rs1_val==65536 and rs2_val==65535,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000, 0xffff, x14, 668, x1)
+
+inst_698:
+// rs1_val==65536 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000, 0x2, x14, 672, x1)
+
+inst_699:
+// rs1_val==65536 and rs2_val==1431655764,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x55555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000, 0x55555554, x14, 676, x1)
+
+inst_700:
+// rs1_val==65536 and rs2_val==2863311529,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000, 0xaaaaaaa9, x14, 680, x1)
+
+inst_701:
+// rs1_val==65536 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000, 0x4, x14, 684, x1)
+
+inst_702:
+// rs1_val==65536 and rs2_val==858993458,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x33333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000, 0x33333332, x14, 688, x1)
+
+inst_703:
+// rs1_val==65536 and rs2_val==1717986917,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x66666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000, 0x66666665, x14, 692, x1)
+
+inst_704:
+// rs1_val==65536 and rs2_val==46339,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xb503
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000, 0xb503, x14, 696, x1)
+
+inst_705:
+// rs1_val==65536 and rs2_val==65534,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xfffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000, 0xfffe, x14, 700, x1)
+
+inst_706:
+// rs1_val==65536 and rs2_val==1431655766,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x55555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000, 0x55555556, x14, 704, x1)
+
+inst_707:
+// rs1_val==65536 and rs2_val==2863311531,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000, 0xaaaaaaab, x14, 708, x1)
+
+inst_708:
+// rs1_val==65536 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000, 0x6, x14, 712, x1)
+
+inst_709:
+// rs1_val==65536 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000, 0x33333334, x14, 716, x1)
+
+inst_710:
+// rs1_val==65536 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000, 0x66666667, x14, 720, x1)
+
+inst_711:
+// rs1_val==65536 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000, 0xb505, x14, 724, x1)
+
+inst_712:
+// rs1_val==65536 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000, 0x1, x14, 728, x1)
+
+inst_713:
+// rs1_val==65536 and rs2_val==65536,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000, 0x10000, x14, 732, x1)
+
+inst_714:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x6, x14, 736, x1)
+
+inst_715:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0x33333334, x14, 740, x1)
+
+inst_716:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x66666665, 0x66666667, x14, 744, x1)
+
+inst_717:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x66666665, 0xb505, x14, 748, x1)
+
+inst_718:
+// rs1_val > 0 and rs2_val > 0, rs2_val == 4294967294, rs1_val != rs2_val and rs1_val > 0 and rs2_val > 0, rs1_val == 2048
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:0xfffffffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x800, 0xfffffffe, x14, 752, x1)
+
+inst_719:
+// rs1_val == rs2_val and rs1_val > 0 and rs2_val > 0, rs2_val == 1048576, rs1_val == 1048576
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0x100000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000, 0x100000, x14, 756, x1)
+
+inst_720:
+// rs2_val == 2, rs1_val==4 and rs2_val==2, rs1_val == 4
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x4, 0x2, x14, 760, x1)
+
+inst_721:
+// rs2_val == 65536, rs1_val == 3758096383
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xdfffffff; op2val:0x10000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xdfffffff, 0x10000, x14, 764, x1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x9_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x9_1:
+ .fill 18*(XLEN/32),4,0xdeadbeef
+
+
+signature_x14_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x14_1:
+ .fill 192*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/sra-01.S b/riscof/suite/rv32i_m/I/sra-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..4f34c43a7f9a8d9fc8b74b3983ccde7cb2a03174
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/sra-01.S
@@ -0,0 +1,524 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sra instruction of the RISC-V i extension for the sra covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32i")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sra)
+
+RVTEST_SIGBASE( x20,signature_x20_1)
+
+inst_0:
+// rs2 == rd != rs1, rs1==x16, rs2==x27, rd==x27, rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == -2147483648, rs2_val == 8, rs1_val == (-2**(xlen-1)) and rs2_val >= 0 and rs2_val < xlen
+// opcode: sra ; op1:x16; op2:x27; dest:x27; op1val:-0x80000000; op2val:0x8
+TEST_RR_OP(sra, x27, x16, x27, -0x800000, -0x80000000, 0x8, x20, 0, x9)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x12, rs2==x12, rd==x16, rs1_val > 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == 33554432
+// opcode: sra ; op1:x12; op2:x12; dest:x16; op1val:0x2000000; op2val:0x2000000
+TEST_RR_OP(sra, x16, x12, x12, 0x2000000, 0x2000000, 0x2000000, x20, 4, x9)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x1, rs2==x1, rd==x1, rs1_val < 0 and rs2_val == 0, rs1_val == -2049
+// opcode: sra ; op1:x1; op2:x1; dest:x1; op1val:-0x801; op2val:-0x801
+TEST_RR_OP(sra, x1, x1, x1, -0x1, -0x801, -0x801, x20, 8, x9)
+
+inst_3:
+// rs1 == rd != rs2, rs1==x13, rs2==x19, rd==x13, rs1_val > 0 and rs2_val == 0, rs1_val==858993459
+// opcode: sra ; op1:x13; op2:x19; dest:x13; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(sra, x13, x13, x19, 0x33333333, 0x33333333, 0x0, x20, 12, x9)
+
+inst_4:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x28, rs2==x2, rd==x8, rs1_val == rs2_val and rs2_val > 0 and rs2_val < xlen, rs1_val==6
+// opcode: sra ; op1:x28; op2:x2; dest:x8; op1val:0x6; op2val:0x6
+TEST_RR_OP(sra, x8, x28, x2, 0x0, 0x6, 0x6, x20, 16, x9)
+
+inst_5:
+// rs1==x26, rs2==x31, rd==x19, rs1_val == 0 and rs2_val >= 0 and rs2_val < xlen, rs1_val==0
+// opcode: sra ; op1:x26; op2:x31; dest:x19; op1val:0x0; op2val:0x3
+TEST_RR_OP(sra, x19, x26, x31, 0x0, 0x0, 0x3, x20, 20, x9)
+
+inst_6:
+// rs1==x14, rs2==x28, rd==x29, rs1_val == (2**(xlen-1)-1) and rs2_val >= 0 and rs2_val < xlen, rs1_val == 2147483647
+// opcode: sra ; op1:x14; op2:x28; dest:x29; op1val:0x7fffffff; op2val:0x12
+TEST_RR_OP(sra, x29, x14, x28, 0x1fff, 0x7fffffff, 0x12, x20, 24, x9)
+
+inst_7:
+// rs1==x10, rs2==x26, rd==x12, rs1_val == 1 and rs2_val >= 0 and rs2_val < xlen, rs1_val == 1, rs2_val == 2
+// opcode: sra ; op1:x10; op2:x26; dest:x12; op1val:0x1; op2val:0x2
+TEST_RR_OP(sra, x12, x10, x26, 0x0, 0x1, 0x2, x20, 28, x9)
+
+inst_8:
+// rs1==x30, rs2==x16, rd==x15, rs1_val == 2, rs2_val == 4, rs1_val==2
+// opcode: sra ; op1:x30; op2:x16; dest:x15; op1val:0x2; op2val:0x4
+TEST_RR_OP(sra, x15, x30, x16, 0x0, 0x2, 0x4, x20, 32, x9)
+
+inst_9:
+// rs1==x24, rs2==x0, rd==x6, rs1_val == 4, rs1_val==4
+// opcode: sra ; op1:x24; op2:x0; dest:x6; op1val:0x4; op2val:0x0
+TEST_RR_OP(sra, x6, x24, x0, 0x4, 0x4, 0x0, x20, 36, x9)
+
+inst_10:
+// rs1==x21, rs2==x15, rd==x3, rs1_val == 8, rs2_val == 10
+// opcode: sra ; op1:x21; op2:x15; dest:x3; op1val:0x8; op2val:0xa
+TEST_RR_OP(sra, x3, x21, x15, 0x0, 0x8, 0xa, x20, 40, x9)
+
+inst_11:
+// rs1==x15, rs2==x30, rd==x10, rs1_val == 16,
+// opcode: sra ; op1:x15; op2:x30; dest:x10; op1val:0x10; op2val:0x0
+TEST_RR_OP(sra, x10, x15, x30, 0x10, 0x10, 0x0, x20, 44, x9)
+
+inst_12:
+// rs1==x18, rs2==x4, rd==x22, rs1_val == 32,
+// opcode: sra ; op1:x18; op2:x4; dest:x22; op1val:0x20; op2val:0x3
+TEST_RR_OP(sra, x22, x18, x4, 0x4, 0x20, 0x3, x20, 48, x9)
+
+inst_13:
+// rs1==x19, rs2==x17, rd==x11, rs1_val == 64, rs2_val == 23
+// opcode: sra ; op1:x19; op2:x17; dest:x11; op1val:0x40; op2val:0x17
+TEST_RR_OP(sra, x11, x19, x17, 0x0, 0x40, 0x17, x20, 52, x9)
+
+inst_14:
+// rs1==x5, rs2==x14, rd==x0, rs1_val == 128,
+// opcode: sra ; op1:x5; op2:x14; dest:x0; op1val:0x80; op2val:0x8
+TEST_RR_OP(sra, x0, x5, x14, 0, 0x80, 0x8, x20, 56, x9)
+
+inst_15:
+// rs1==x6, rs2==x24, rd==x5, rs1_val == 256,
+// opcode: sra ; op1:x6; op2:x24; dest:x5; op1val:0x100; op2val:0x4
+TEST_RR_OP(sra, x5, x6, x24, 0x10, 0x100, 0x4, x20, 60, x9)
+
+inst_16:
+// rs1==x7, rs2==x18, rd==x31, rs1_val == 512,
+// opcode: sra ; op1:x7; op2:x18; dest:x31; op1val:0x200; op2val:0x1f
+TEST_RR_OP(sra, x31, x7, x18, 0x0, 0x200, 0x1f, x20, 64, x9)
+
+inst_17:
+// rs1==x31, rs2==x21, rd==x30, rs1_val == 1024, rs2_val == 16
+// opcode: sra ; op1:x31; op2:x21; dest:x30; op1val:0x400; op2val:0x10
+TEST_RR_OP(sra, x30, x31, x21, 0x0, 0x400, 0x10, x20, 68, x15)
+
+inst_18:
+// rs1==x4, rs2==x11, rd==x2, rs1_val == 2048,
+// opcode: sra ; op1:x4; op2:x11; dest:x2; op1val:0x800; op2val:0x13
+TEST_RR_OP(sra, x2, x4, x11, 0x0, 0x800, 0x13, x20, 72, x15)
+
+inst_19:
+// rs1==x22, rs2==x25, rd==x9, rs1_val == 4096,
+// opcode: sra ; op1:x22; op2:x25; dest:x9; op1val:0x1000; op2val:0x2
+TEST_RR_OP(sra, x9, x22, x25, 0x400, 0x1000, 0x2, x20, 76, x15)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_20:
+// rs1==x23, rs2==x13, rd==x14, rs1_val == 8192,
+// opcode: sra ; op1:x23; op2:x13; dest:x14; op1val:0x2000; op2val:0x1f
+TEST_RR_OP(sra, x14, x23, x13, 0x0, 0x2000, 0x1f, x1, 0, x15)
+
+inst_21:
+// rs1==x8, rs2==x29, rd==x28, rs1_val == 16384,
+// opcode: sra ; op1:x8; op2:x29; dest:x28; op1val:0x4000; op2val:0xa
+TEST_RR_OP(sra, x28, x8, x29, 0x10, 0x4000, 0xa, x1, 4, x15)
+
+inst_22:
+// rs1==x17, rs2==x8, rd==x26, rs1_val == 32768,
+// opcode: sra ; op1:x17; op2:x8; dest:x26; op1val:0x8000; op2val:0x13
+TEST_RR_OP(sra, x26, x17, x8, 0x0, 0x8000, 0x13, x1, 8, x15)
+
+inst_23:
+// rs1==x29, rs2==x3, rd==x23, rs1_val == 65536,
+// opcode: sra ; op1:x29; op2:x3; dest:x23; op1val:0x10000; op2val:0x10
+TEST_RR_OP(sra, x23, x29, x3, 0x1, 0x10000, 0x10, x1, 12, x15)
+
+inst_24:
+// rs1==x9, rs2==x5, rd==x7, rs1_val == 131072,
+// opcode: sra ; op1:x9; op2:x5; dest:x7; op1val:0x20000; op2val:0x0
+TEST_RR_OP(sra, x7, x9, x5, 0x20000, 0x20000, 0x0, x1, 16, x15)
+
+inst_25:
+// rs1==x20, rs2==x7, rd==x24, rs1_val == 262144,
+// opcode: sra ; op1:x20; op2:x7; dest:x24; op1val:0x40000; op2val:0x8
+TEST_RR_OP(sra, x24, x20, x7, 0x400, 0x40000, 0x8, x1, 20, x15)
+
+inst_26:
+// rs1==x25, rs2==x10, rd==x17, rs1_val == 524288,
+// opcode: sra ; op1:x25; op2:x10; dest:x17; op1val:0x80000; op2val:0x8
+TEST_RR_OP(sra, x17, x25, x10, 0x800, 0x80000, 0x8, x1, 24, x15)
+
+inst_27:
+// rs1==x27, rs2==x22, rd==x20, rs1_val == 1048576, rs2_val == 27
+// opcode: sra ; op1:x27; op2:x22; dest:x20; op1val:0x100000; op2val:0x1b
+TEST_RR_OP(sra, x20, x27, x22, 0x0, 0x100000, 0x1b, x1, 28, x15)
+
+inst_28:
+// rs1==x3, rs2==x6, rd==x25, rs1_val == 2097152,
+// opcode: sra ; op1:x3; op2:x6; dest:x25; op1val:0x200000; op2val:0xb
+TEST_RR_OP(sra, x25, x3, x6, 0x400, 0x200000, 0xb, x1, 32, x15)
+
+inst_29:
+// rs1==x0, rs2==x23, rd==x4, rs1_val == 4194304,
+// opcode: sra ; op1:x0; op2:x23; dest:x4; op1val:0x0; op2val:0x8
+TEST_RR_OP(sra, x4, x0, x23, 0x0, 0x0, 0x8, x1, 36, x15)
+
+inst_30:
+// rs1==x2, rs2==x20, rd==x18, rs1_val == 8388608,
+// opcode: sra ; op1:x2; op2:x20; dest:x18; op1val:0x800000; op2val:0x1b
+TEST_RR_OP(sra, x18, x2, x20, 0x0, 0x800000, 0x1b, x1, 40, x15)
+
+inst_31:
+// rs1==x11, rs2==x9, rd==x21, rs1_val == 16777216,
+// opcode: sra ; op1:x11; op2:x9; dest:x21; op1val:0x1000000; op2val:0xb
+TEST_RR_OP(sra, x21, x11, x9, 0x2000, 0x1000000, 0xb, x1, 44, x15)
+
+inst_32:
+// rs1_val == 67108864,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, 0x4000, 0x4000000, 0xc, x1, 48, x15)
+
+inst_33:
+// rs1_val == 134217728,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x4
+TEST_RR_OP(sra, x12, x10, x11, 0x800000, 0x8000000, 0x4, x1, 52, x2)
+
+inst_34:
+// rs1_val == 268435456,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0xb
+TEST_RR_OP(sra, x12, x10, x11, 0x20000, 0x10000000, 0xb, x1, 56, x2)
+
+inst_35:
+// rs1_val == 536870912,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0xa
+TEST_RR_OP(sra, x12, x10, x11, 0x80000, 0x20000000, 0xa, x1, 60, x2)
+
+inst_36:
+// rs1_val == 1073741824, rs2_val == 15
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0xf
+TEST_RR_OP(sra, x12, x10, x11, 0x8000, 0x40000000, 0xf, x1, 64, x2)
+
+inst_37:
+// rs1_val == -2,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x7
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x2, 0x7, x1, 68, x2)
+
+inst_38:
+// rs1_val == -3,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0x12
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x3, 0x12, x1, 72, x2)
+
+inst_39:
+// rs1_val == -5,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0x4
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x5, 0x4, x1, 76, x2)
+
+inst_40:
+// rs1_val == -9,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x5
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x9, 0x5, x1, 80, x2)
+
+inst_41:
+// rs1_val == -17, rs2_val == 29
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:0x1d
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x11, 0x1d, x1, 84, x2)
+
+inst_42:
+// rs1_val == -33,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0xd
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x21, 0xd, x1, 88, x2)
+
+inst_43:
+// rs1_val == -65,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x17
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x41, 0x17, x1, 92, x2)
+
+inst_44:
+// rs1_val == -129,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0xd
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x81, 0xd, x1, 96, x2)
+
+inst_45:
+// rs1_val == -257,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x13
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x101, 0x13, x1, 100, x2)
+
+inst_46:
+// rs1_val == -513, rs2_val == 1
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x1
+TEST_RR_OP(sra, x12, x10, x11, -0x101, -0x201, 0x1, x1, 104, x2)
+
+inst_47:
+// rs1_val == -1025, rs2_val == 21
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x15
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x401, 0x15, x1, 108, x2)
+
+inst_48:
+// rs1_val == -4097,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0xe
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x1001, 0xe, x1, 112, x2)
+
+inst_49:
+// rs1_val == -8193,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x8
+TEST_RR_OP(sra, x12, x10, x11, -0x21, -0x2001, 0x8, x1, 116, x2)
+
+inst_50:
+// rs1_val == -16385,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0xe
+TEST_RR_OP(sra, x12, x10, x11, -0x2, -0x4001, 0xe, x1, 120, x2)
+
+inst_51:
+// rs1_val == -32769,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, -0x9, -0x8001, 0xc, x1, 124, x2)
+
+inst_52:
+// rs1_val == -65537,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x17
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x10001, 0x17, x1, 128, x2)
+
+inst_53:
+// rs1_val == -131073,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0xa
+TEST_RR_OP(sra, x12, x10, x11, -0x81, -0x20001, 0xa, x1, 132, x2)
+
+inst_54:
+// rs1_val == -262145,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0xb
+TEST_RR_OP(sra, x12, x10, x11, -0x81, -0x40001, 0xb, x1, 136, x2)
+
+inst_55:
+// rs1_val == -524289,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x0
+TEST_RR_OP(sra, x12, x10, x11, -0x80001, -0x80001, 0x0, x1, 140, x2)
+
+inst_56:
+// rs1_val == -8388609,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x13
+TEST_RR_OP(sra, x12, x10, x11, -0x11, -0x800001, 0x13, x1, 144, x2)
+
+inst_57:
+// rs1_val == -16777217,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, -0x1001, -0x1000001, 0xc, x1, 148, x2)
+
+inst_58:
+// rs1_val == -33554433,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x1f
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x2000001, 0x1f, x1, 152, x2)
+
+inst_59:
+// rs1_val == -67108865,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0xb
+TEST_RR_OP(sra, x12, x10, x11, -0x8001, -0x4000001, 0xb, x1, 156, x2)
+
+inst_60:
+// rs1_val == -134217729,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0xa
+TEST_RR_OP(sra, x12, x10, x11, -0x20001, -0x8000001, 0xa, x1, 160, x2)
+
+inst_61:
+// rs1_val == -268435457,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x4
+TEST_RR_OP(sra, x12, x10, x11, -0x1000001, -0x10000001, 0x4, x1, 164, x2)
+
+inst_62:
+// rs1_val == -536870913,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x7
+TEST_RR_OP(sra, x12, x10, x11, -0x400001, -0x20000001, 0x7, x1, 168, x2)
+
+inst_63:
+// rs1_val == -1073741825,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x5
+TEST_RR_OP(sra, x12, x10, x11, -0x2000001, -0x40000001, 0x5, x1, 172, x2)
+
+inst_64:
+// rs1_val == 1431655765, rs1_val==1431655765
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb
+TEST_RR_OP(sra, x12, x10, x11, 0xaaaaa, 0x55555555, 0xb, x1, 176, x2)
+
+inst_65:
+// rs1_val == -1431655766, rs1_val==-1431655766
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x13
+TEST_RR_OP(sra, x12, x10, x11, -0xaab, -0x55555556, 0x13, x1, 180, x2)
+
+inst_66:
+// rs1_val==3,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x17
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x3, 0x17, x1, 184, x2)
+
+inst_67:
+// rs1_val==5,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xe
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x5, 0xe, x1, 188, x2)
+
+inst_68:
+// rs1_val==1717986918,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x13
+TEST_RR_OP(sra, x12, x10, x11, 0xccc, 0x66666666, 0x13, x1, 192, x2)
+
+inst_69:
+// rs1_val==-46340,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x1
+TEST_RR_OP(sra, x12, x10, x11, -0x5a82, -0xb504, 0x1, x1, 196, x2)
+
+inst_70:
+// rs1_val==46341,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x8
+TEST_RR_OP(sra, x12, x10, x11, 0xb5, 0xb505, 0x8, x1, 200, x2)
+
+inst_71:
+// rs2_val == 30,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x1e
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x0, 0x1e, x1, 204, x2)
+
+inst_72:
+// rs1_val==46340,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xe
+TEST_RR_OP(sra, x12, x10, x11, 0x2, 0xb504, 0xe, x1, 208, x2)
+
+inst_73:
+// rs1_val==1431655764,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, 0x55555, 0x55555554, 0xc, x1, 212, x2)
+
+inst_74:
+// rs1_val == -4194305,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0x13
+TEST_RR_OP(sra, x12, x10, x11, -0x9, -0x400001, 0x13, x1, 216, x2)
+
+inst_75:
+// rs1_val==858993460,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x7
+TEST_RR_OP(sra, x12, x10, x11, 0x666666, 0x33333334, 0x7, x1, 220, x2)
+
+inst_76:
+// rs1_val == -2097153,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0x2
+TEST_RR_OP(sra, x12, x10, x11, -0x80001, -0x200001, 0x2, x1, 224, x2)
+
+inst_77:
+// rs1_val==858993458,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(sra, x12, x10, x11, 0x33333332, 0x33333332, 0x0, x1, 228, x2)
+
+inst_78:
+// rs1_val==1717986917,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x17
+TEST_RR_OP(sra, x12, x10, x11, 0xcc, 0x66666665, 0x17, x1, 232, x2)
+
+inst_79:
+// rs1_val==46339,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x1f
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0xb503, 0x1f, x1, 236, x2)
+
+inst_80:
+// rs1_val==1431655766,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(sra, x12, x10, x11, 0x2aaaaaa, 0x55555556, 0x5, x1, 240, x2)
+
+inst_81:
+// rs1_val==-1431655765,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x1
+TEST_RR_OP(sra, x12, x10, x11, -0x2aaaaaab, -0x55555555, 0x1, x1, 244, x2)
+
+inst_82:
+// rs1_val == -1048577,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x10
+TEST_RR_OP(sra, x12, x10, x11, -0x11, -0x100001, 0x10, x1, 248, x2)
+
+inst_83:
+// rs1_val==1717986919,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(sra, x12, x10, x11, 0x66666667, 0x66666667, 0x0, x1, 252, x2)
+
+inst_84:
+// rs1_val==-46339,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xd
+TEST_RR_OP(sra, x12, x10, x11, -0x6, -0xb503, 0xd, x1, 256, x2)
+
+inst_85:
+// rs1_val > 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == 33554432
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x12
+TEST_RR_OP(sra, x12, x10, x11, 0x80, 0x2000000, 0x12, x1, 260, x2)
+
+inst_86:
+// rs1_val < 0 and rs2_val == 0, rs1_val == -2049
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x0
+TEST_RR_OP(sra, x12, x10, x11, -0x801, -0x801, 0x0, x1, 264, x2)
+
+inst_87:
+// rs1_val == 4, rs1_val==4
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x4, 0x3, x1, 268, x2)
+
+inst_88:
+// rs1_val == 128,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0x8
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x80, 0x8, x1, 272, x2)
+
+inst_89:
+// rs1_val == 4194304,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x8
+TEST_RR_OP(sra, x12, x10, x11, 0x4000, 0x400000, 0x8, x1, 276, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x20_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x20_1:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 70*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/srai-01.S b/riscof/suite/rv32i_m/I/srai-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..1951da8258807c68ed98a40cec34e0eb379f7bc2
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/srai-01.S
@@ -0,0 +1,509 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the srai instruction of the RISC-V I extension for the srai covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",srai)
+
+RVTEST_SIGBASE( x4,signature_x4_1)
+
+inst_0:
+// rs1 != rd, rs1==x31, rd==x25, rs1_val < 0 and imm_val > 0 and imm_val < xlen, rs1_val == -9
+// opcode: srai ; op1:x31; dest:x25; op1val:-0x9; immval:0x9
+TEST_IMM_OP( srai, x25, x31, -0x1, -0x9, 0x9, x4, 0, x6)
+
+inst_1:
+// rs1 == rd, rs1==x10, rd==x10, rs1_val > 0 and imm_val > 0 and imm_val < xlen, rs1_val==5, imm_val == 1
+// opcode: srai ; op1:x10; dest:x10; op1val:0x5; immval:0x1
+TEST_IMM_OP( srai, x10, x10, 0x2, 0x5, 0x1, x4, 4, x6)
+
+inst_2:
+// rs1==x8, rd==x28, rs1_val < 0 and imm_val == 0, rs1_val == -16777217
+// opcode: srai ; op1:x8; dest:x28; op1val:-0x1000001; immval:0x0
+TEST_IMM_OP( srai, x28, x8, -0x1000001, -0x1000001, 0x0, x4, 8, x6)
+
+inst_3:
+// rs1==x17, rd==x5, rs1_val > 0 and imm_val == 0, rs1_val == 1048576
+// opcode: srai ; op1:x17; dest:x5; op1val:0x100000; immval:0x0
+TEST_IMM_OP( srai, x5, x17, 0x100000, 0x100000, 0x0, x4, 12, x6)
+
+inst_4:
+// rs1==x23, rd==x27, rs1_val < 0 and imm_val == (xlen-1), rs1_val == -131073
+// opcode: srai ; op1:x23; dest:x27; op1val:-0x20001; immval:0x1f
+TEST_IMM_OP( srai, x27, x23, -0x1, -0x20001, 0x1f, x4, 16, x6)
+
+inst_5:
+// rs1==x13, rd==x20, rs1_val > 0 and imm_val == (xlen-1), rs1_val == 1 and imm_val >= 0 and imm_val < xlen, rs1_val == 1
+// opcode: srai ; op1:x13; dest:x20; op1val:0x1; immval:0x1f
+TEST_IMM_OP( srai, x20, x13, 0x0, 0x1, 0x1f, x4, 20, x6)
+
+inst_6:
+// rs1==x22, rd==x11, rs1_val == imm_val and imm_val > 0 and imm_val < xlen, rs1_val==4, imm_val == 4, rs1_val == 4
+// opcode: srai ; op1:x22; dest:x11; op1val:0x4; immval:0x4
+TEST_IMM_OP( srai, x11, x22, 0x0, 0x4, 0x4, x4, 24, x6)
+
+inst_7:
+// rs1==x7, rd==x30, rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < xlen, rs1_val == -2147483648
+// opcode: srai ; op1:x7; dest:x30; op1val:-0x80000000; immval:0x0
+TEST_IMM_OP( srai, x30, x7, -0x80000000, -0x80000000, 0x0, x4, 28, x6)
+
+inst_8:
+// rs1==x18, rd==x14, rs1_val == 0 and imm_val >= 0 and imm_val < xlen, rs1_val==0
+// opcode: srai ; op1:x18; dest:x14; op1val:0x0; immval:0xe
+TEST_IMM_OP( srai, x14, x18, 0x0, 0x0, 0xe, x4, 32, x6)
+
+inst_9:
+// rs1==x3, rd==x19, rs1_val == (2**(xlen-1)-1) and imm_val >= 0 and imm_val < xlen, rs1_val == 2147483647
+// opcode: srai ; op1:x3; dest:x19; op1val:0x7fffffff; immval:0x1f
+TEST_IMM_OP( srai, x19, x3, 0x0, 0x7fffffff, 0x1f, x4, 36, x6)
+
+inst_10:
+// rs1==x25, rd==x29, rs1_val == 2, rs1_val==2
+// opcode: srai ; op1:x25; dest:x29; op1val:0x2; immval:0x11
+TEST_IMM_OP( srai, x29, x25, 0x0, 0x2, 0x11, x4, 40, x6)
+
+inst_11:
+// rs1==x30, rd==x3, rs1_val == 8,
+// opcode: srai ; op1:x30; dest:x3; op1val:0x8; immval:0x11
+TEST_IMM_OP( srai, x3, x30, 0x0, 0x8, 0x11, x4, 44, x6)
+
+inst_12:
+// rs1==x2, rd==x22, rs1_val == 16,
+// opcode: srai ; op1:x2; dest:x22; op1val:0x10; immval:0x12
+TEST_IMM_OP( srai, x22, x2, 0x0, 0x10, 0x12, x4, 48, x6)
+
+inst_13:
+// rs1==x12, rd==x2, rs1_val == 32,
+// opcode: srai ; op1:x12; dest:x2; op1val:0x20; immval:0xd
+TEST_IMM_OP( srai, x2, x12, 0x0, 0x20, 0xd, x4, 52, x6)
+
+inst_14:
+// rs1==x1, rd==x12, rs1_val == 64, imm_val == 23
+// opcode: srai ; op1:x1; dest:x12; op1val:0x40; immval:0x17
+TEST_IMM_OP( srai, x12, x1, 0x0, 0x40, 0x17, x4, 56, x6)
+
+inst_15:
+// rs1==x20, rd==x24, rs1_val == 128,
+// opcode: srai ; op1:x20; dest:x24; op1val:0x80; immval:0x9
+TEST_IMM_OP( srai, x24, x20, 0x0, 0x80, 0x9, x4, 60, x6)
+
+inst_16:
+// rs1==x11, rd==x0, rs1_val == 256, imm_val == 16
+// opcode: srai ; op1:x11; dest:x0; op1val:0x100; immval:0x10
+TEST_IMM_OP( srai, x0, x11, 0, 0x100, 0x10, x4, 64, x6)
+
+inst_17:
+// rs1==x26, rd==x8, rs1_val == 512,
+// opcode: srai ; op1:x26; dest:x8; op1val:0x200; immval:0x9
+TEST_IMM_OP( srai, x8, x26, 0x1, 0x200, 0x9, x4, 68, x6)
+
+inst_18:
+// rs1==x9, rd==x17, rs1_val == 1024,
+// opcode: srai ; op1:x9; dest:x17; op1val:0x400; immval:0x11
+TEST_IMM_OP( srai, x17, x9, 0x0, 0x400, 0x11, x4, 72, x6)
+
+inst_19:
+// rs1==x16, rd==x23, rs1_val == 2048, imm_val == 27
+// opcode: srai ; op1:x16; dest:x23; op1val:0x800; immval:0x1b
+TEST_IMM_OP( srai, x23, x16, 0x0, 0x800, 0x1b, x4, 76, x6)
+
+inst_20:
+// rs1==x14, rd==x13, rs1_val == 4096,
+// opcode: srai ; op1:x14; dest:x13; op1val:0x1000; immval:0x5
+TEST_IMM_OP( srai, x13, x14, 0x80, 0x1000, 0x5, x4, 80, x3)
+
+inst_21:
+// rs1==x21, rd==x7, rs1_val == 8192,
+// opcode: srai ; op1:x21; dest:x7; op1val:0x2000; immval:0x1
+TEST_IMM_OP( srai, x7, x21, 0x1000, 0x2000, 0x1, x4, 84, x3)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_22:
+// rs1==x5, rd==x18, rs1_val == 16384,
+// opcode: srai ; op1:x5; dest:x18; op1val:0x4000; immval:0x5
+TEST_IMM_OP( srai, x18, x5, 0x200, 0x4000, 0x5, x2, 0, x3)
+
+inst_23:
+// rs1==x0, rd==x26, rs1_val == 32768,
+// opcode: srai ; op1:x0; dest:x26; op1val:0x0; immval:0x11
+TEST_IMM_OP( srai, x26, x0, 0x0, 0x0, 0x11, x2, 4, x3)
+
+inst_24:
+// rs1==x24, rd==x4, rs1_val == 65536,
+// opcode: srai ; op1:x24; dest:x4; op1val:0x10000; immval:0xd
+TEST_IMM_OP( srai, x4, x24, 0x8, 0x10000, 0xd, x2, 8, x3)
+
+inst_25:
+// rs1==x15, rd==x9, rs1_val == 131072,
+// opcode: srai ; op1:x15; dest:x9; op1val:0x20000; immval:0x12
+TEST_IMM_OP( srai, x9, x15, 0x0, 0x20000, 0x12, x2, 12, x3)
+
+inst_26:
+// rs1==x19, rd==x6, rs1_val == 262144,
+// opcode: srai ; op1:x19; dest:x6; op1val:0x40000; immval:0x1f
+TEST_IMM_OP( srai, x6, x19, 0x0, 0x40000, 0x1f, x2, 16, x3)
+
+inst_27:
+// rs1==x28, rd==x21, rs1_val == 524288, imm_val == 21
+// opcode: srai ; op1:x28; dest:x21; op1val:0x80000; immval:0x15
+TEST_IMM_OP( srai, x21, x28, 0x0, 0x80000, 0x15, x2, 20, x3)
+
+inst_28:
+// rs1==x27, rd==x31, rs1_val == 2097152,
+// opcode: srai ; op1:x27; dest:x31; op1val:0x200000; immval:0x17
+TEST_IMM_OP( srai, x31, x27, 0x0, 0x200000, 0x17, x2, 24, x3)
+
+inst_29:
+// rs1==x6, rd==x1, rs1_val == 4194304,
+// opcode: srai ; op1:x6; dest:x1; op1val:0x400000; immval:0x12
+TEST_IMM_OP( srai, x1, x6, 0x10, 0x400000, 0x12, x2, 28, x3)
+
+inst_30:
+// rs1==x4, rd==x15, rs1_val == 8388608,
+// opcode: srai ; op1:x4; dest:x15; op1val:0x800000; immval:0xb
+TEST_IMM_OP( srai, x15, x4, 0x1000, 0x800000, 0xb, x2, 32, x3)
+
+inst_31:
+// rs1==x29, rd==x16, rs1_val == 16777216,
+// opcode: srai ; op1:x29; dest:x16; op1val:0x1000000; immval:0x1f
+TEST_IMM_OP( srai, x16, x29, 0x0, 0x1000000, 0x1f, x2, 36, x3)
+
+inst_32:
+// rs1_val == 33554432,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x2000000; immval:0x0
+TEST_IMM_OP( srai, x11, x10, 0x2000000, 0x2000000, 0x0, x2, 40, x3)
+
+inst_33:
+// rs1_val == 67108864,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x4000000; immval:0x6
+TEST_IMM_OP( srai, x11, x10, 0x100000, 0x4000000, 0x6, x2, 44, x3)
+
+inst_34:
+// rs1_val == 134217728,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x8000000; immval:0x7
+TEST_IMM_OP( srai, x11, x10, 0x100000, 0x8000000, 0x7, x2, 48, x3)
+
+inst_35:
+// rs1_val == 268435456,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x10000000; immval:0x0
+TEST_IMM_OP( srai, x11, x10, 0x10000000, 0x10000000, 0x0, x2, 52, x3)
+
+inst_36:
+// rs1_val == 536870912,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x20000000; immval:0xc
+TEST_IMM_OP( srai, x11, x10, 0x20000, 0x20000000, 0xc, x2, 56, x3)
+
+inst_37:
+// rs1_val == 1073741824, imm_val == 8
+// opcode: srai ; op1:x10; dest:x11; op1val:0x40000000; immval:0x8
+TEST_IMM_OP( srai, x11, x10, 0x400000, 0x40000000, 0x8, x2, 60, x3)
+
+inst_38:
+// rs1_val == -2,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x2; immval:0x1
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x2, 0x1, x2, 64, x3)
+
+inst_39:
+// rs1_val == -3,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x3; immval:0x10
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x3, 0x10, x2, 68, x3)
+
+inst_40:
+// rs1_val == -5,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x5; immval:0x12
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x5, 0x12, x2, 72, x3)
+
+inst_41:
+// rs1_val == -17,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x11; immval:0x0
+TEST_IMM_OP( srai, x11, x10, -0x11, -0x11, 0x0, x2, 76, x3)
+
+inst_42:
+// rs1_val == -33,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x21; immval:0x8
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x21, 0x8, x2, 80, x3)
+
+inst_43:
+// rs1_val == -65,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x41; immval:0x4
+TEST_IMM_OP( srai, x11, x10, -0x5, -0x41, 0x4, x2, 84, x3)
+
+inst_44:
+// rs1_val == -129, imm_val == 15
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x81; immval:0xf
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x81, 0xf, x2, 88, x3)
+
+inst_45:
+// rs1_val == -257,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x101; immval:0xb
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x101, 0xb, x2, 92, x3)
+
+inst_46:
+// rs1_val == -513,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x201; immval:0xd
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x201, 0xd, x2, 96, x3)
+
+inst_47:
+// rs1_val == -1025, imm_val == 30
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x401; immval:0x1e
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x401, 0x1e, x2, 100, x3)
+
+inst_48:
+// rs1_val == -2049,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x801; immval:0xd
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x801, 0xd, x2, 104, x3)
+
+inst_49:
+// rs1_val == -4097,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x1001; immval:0xf
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x1001, 0xf, x2, 108, x3)
+
+inst_50:
+// rs1_val == -8193, imm_val == 29
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x2001; immval:0x1d
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x2001, 0x1d, x2, 112, x3)
+
+inst_51:
+// rs1_val == -16385,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x4001; immval:0x3
+TEST_IMM_OP( srai, x11, x10, -0x801, -0x4001, 0x3, x2, 116, x3)
+
+inst_52:
+// rs1_val == -32769,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x8001; immval:0x0
+TEST_IMM_OP( srai, x11, x10, -0x8001, -0x8001, 0x0, x2, 120, x3)
+
+inst_53:
+// rs1_val == -65537,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x10001; immval:0xd
+TEST_IMM_OP( srai, x11, x10, -0x9, -0x10001, 0xd, x2, 124, x3)
+
+inst_54:
+// rs1_val == -262145,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x40001; immval:0x11
+TEST_IMM_OP( srai, x11, x10, -0x3, -0x40001, 0x11, x2, 128, x3)
+
+inst_55:
+// rs1_val == -524289,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x80001; immval:0x9
+TEST_IMM_OP( srai, x11, x10, -0x401, -0x80001, 0x9, x2, 132, x3)
+
+inst_56:
+// rs1_val == -1048577,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x100001; immval:0x1
+TEST_IMM_OP( srai, x11, x10, -0x80001, -0x100001, 0x1, x2, 136, x3)
+
+inst_57:
+// rs1_val == -2097153,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x200001; immval:0x11
+TEST_IMM_OP( srai, x11, x10, -0x11, -0x200001, 0x11, x2, 140, x3)
+
+inst_58:
+// rs1_val == -4194305,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x400001; immval:0x11
+TEST_IMM_OP( srai, x11, x10, -0x21, -0x400001, 0x11, x2, 144, x3)
+
+inst_59:
+// rs1_val == -8388609,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x800001; immval:0xe
+TEST_IMM_OP( srai, x11, x10, -0x201, -0x800001, 0xe, x2, 148, x3)
+
+inst_60:
+// rs1_val == -33554433,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x2000001; immval:0x4
+TEST_IMM_OP( srai, x11, x10, -0x200001, -0x2000001, 0x4, x2, 152, x3)
+
+inst_61:
+// rs1_val == -67108865,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x4000001; immval:0x12
+TEST_IMM_OP( srai, x11, x10, -0x101, -0x4000001, 0x12, x2, 156, x3)
+
+inst_62:
+// rs1_val == -134217729,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x8000001; immval:0xd
+TEST_IMM_OP( srai, x11, x10, -0x4001, -0x8000001, 0xd, x2, 160, x3)
+
+inst_63:
+// rs1_val == -268435457,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x10000001; immval:0x3
+TEST_IMM_OP( srai, x11, x10, -0x2000001, -0x10000001, 0x3, x2, 164, x3)
+
+inst_64:
+// rs1_val == -536870913,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x20000001; immval:0x7
+TEST_IMM_OP( srai, x11, x10, -0x400001, -0x20000001, 0x7, x2, 168, x3)
+
+inst_65:
+// rs1_val == -1073741825,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x40000001; immval:0x13
+TEST_IMM_OP( srai, x11, x10, -0x801, -0x40000001, 0x13, x2, 172, x3)
+
+inst_66:
+// rs1_val == 1431655765, rs1_val==1431655765
+// opcode: srai ; op1:x10; dest:x11; op1val:0x55555555; immval:0x15
+TEST_IMM_OP( srai, x11, x10, 0x2aa, 0x55555555, 0x15, x2, 176, x3)
+
+inst_67:
+// rs1_val == -1431655766, rs1_val==-1431655766
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x55555556; immval:0xf
+TEST_IMM_OP( srai, x11, x10, -0xaaab, -0x55555556, 0xf, x2, 180, x3)
+
+inst_68:
+// rs1_val==3, imm_val == 10
+// opcode: srai ; op1:x10; dest:x11; op1val:0x3; immval:0xa
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x3, 0xa, x2, 184, x3)
+
+inst_69:
+// rs1_val==858993459,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x33333333; immval:0x0
+TEST_IMM_OP( srai, x11, x10, 0x33333333, 0x33333333, 0x0, x2, 188, x3)
+
+inst_70:
+// rs1_val==1717986919,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x66666667; immval:0xa
+TEST_IMM_OP( srai, x11, x10, 0x199999, 0x66666667, 0xa, x2, 192, x3)
+
+inst_71:
+// rs1_val==-46339,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0xb503; immval:0x1
+TEST_IMM_OP( srai, x11, x10, -0x5a82, -0xb503, 0x1, x2, 196, x3)
+
+inst_72:
+// rs1_val==46341,
+// opcode: srai ; op1:x10; dest:x11; op1val:0xb505; immval:0x0
+TEST_IMM_OP( srai, x11, x10, 0xb505, 0xb505, 0x0, x2, 200, x3)
+
+inst_73:
+// imm_val == 2,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2
+TEST_IMM_OP( srai, x11, x10, 0x15555555, 0x55555555, 0x2, x2, 204, x3)
+
+inst_74:
+// rs1_val==1717986918,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x66666666; immval:0x1b
+TEST_IMM_OP( srai, x11, x10, 0xc, 0x66666666, 0x1b, x2, 208, x3)
+
+inst_75:
+// rs1_val==-46340,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0xb504; immval:0xc
+TEST_IMM_OP( srai, x11, x10, -0xc, -0xb504, 0xc, x2, 212, x3)
+
+inst_76:
+// rs1_val==46340,
+// opcode: srai ; op1:x10; dest:x11; op1val:0xb504; immval:0x0
+TEST_IMM_OP( srai, x11, x10, 0xb504, 0xb504, 0x0, x2, 216, x3)
+
+inst_77:
+// rs1_val==1431655764,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x55555554; immval:0x6
+TEST_IMM_OP( srai, x11, x10, 0x1555555, 0x55555554, 0x6, x2, 220, x3)
+
+inst_78:
+// rs1_val==858993458,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x33333332; immval:0x1e
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x33333332, 0x1e, x2, 224, x3)
+
+inst_79:
+// rs1_val==1717986917,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x66666665; immval:0x1f
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x66666665, 0x1f, x2, 228, x3)
+
+inst_80:
+// rs1_val==46339,
+// opcode: srai ; op1:x10; dest:x11; op1val:0xb503; immval:0x17
+TEST_IMM_OP( srai, x11, x10, 0x0, 0xb503, 0x17, x2, 232, x3)
+
+inst_81:
+// rs1_val==1431655766,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x55555556; immval:0x1b
+TEST_IMM_OP( srai, x11, x10, 0xa, 0x55555556, 0x1b, x2, 236, x3)
+
+inst_82:
+// rs1_val==-1431655765,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x55555555; immval:0xa
+TEST_IMM_OP( srai, x11, x10, -0x155556, -0x55555555, 0xa, x2, 240, x3)
+
+inst_83:
+// rs1_val==6,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x6, 0x6, x2, 244, x3)
+
+inst_84:
+// rs1_val==858993460,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x33333334; immval:0xc
+TEST_IMM_OP( srai, x11, x10, 0x33333, 0x33333334, 0xc, x2, 248, x3)
+
+inst_85:
+// rs1_val == 256, imm_val == 16
+// opcode: srai ; op1:x10; dest:x11; op1val:0x100; immval:0x10
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x100, 0x10, x2, 252, x3)
+
+inst_86:
+// rs1_val == 32768,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x8000; immval:0x11
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x8000, 0x11, x2, 256, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x4_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 65*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/srl-01.S b/riscof/suite/rv32i_m/I/srl-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..0e98972a9a973628572ec19cf6bacdb79a360cc2
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/srl-01.S
@@ -0,0 +1,539 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the srl instruction of the RISC-V i extension for the srl covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32i")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",srl)
+
+RVTEST_SIGBASE( x19,signature_x19_1)
+
+inst_0:
+// rs2 == rd != rs1, rs1==x26, rs2==x11, rd==x11, rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs2_val == 15, rs1_val == -4194305
+// opcode: srl ; op1:x26; op2:x11; dest:x11; op1val:-0x400001; op2val:0xf
+TEST_RR_OP(srl, x11, x26, x11, 0x1ff7f, -0x400001, 0xf, x19, 0, x24)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x31, rs2==x31, rd==x12, rs1_val > 0 and rs2_val > 0 and rs2_val < xlen, rs1_val==1431655766, rs2_val == 8
+// opcode: srl ; op1:x31; op2:x31; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(srl, x12, x31, x31, 0x155, 0x55555556, 0x55555556, x19, 4, x24)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x7, rs2==x7, rd==x7, rs1_val < 0 and rs2_val == 0,
+// opcode: srl ; op1:x7; op2:x7; dest:x7; op1val:-0x1; op2val:-0x1
+TEST_RR_OP(srl, x7, x7, x7, 0x1, -0x1, -0x1, x19, 8, x24)
+
+inst_3:
+// rs1 == rd != rs2, rs1==x18, rs2==x12, rd==x18, rs1_val > 0 and rs2_val == 0, rs1_val == 256
+// opcode: srl ; op1:x18; op2:x12; dest:x18; op1val:0x100; op2val:0x0
+TEST_RR_OP(srl, x18, x18, x12, 0x100, 0x100, 0x0, x19, 12, x24)
+
+inst_4:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x14, rs2==x3, rd==x8, rs1_val == rs2_val and rs2_val > 0 and rs2_val < xlen,
+// opcode: srl ; op1:x14; op2:x3; dest:x8; op1val:0x9; op2val:0x9
+TEST_RR_OP(srl, x8, x14, x3, 0x0, 0x9, 0x9, x19, 16, x24)
+
+inst_5:
+// rs1==x21, rs2==x22, rd==x20, rs1_val == (-2**(xlen-1)) and rs2_val >= 0 and rs2_val < xlen, rs1_val == -2147483648
+// opcode: srl ; op1:x21; op2:x22; dest:x20; op1val:-0x80000000; op2val:0xc
+TEST_RR_OP(srl, x20, x21, x22, 0x80000, -0x80000000, 0xc, x19, 20, x24)
+
+inst_6:
+// rs1==x4, rs2==x17, rd==x30, rs1_val == 0 and rs2_val >= 0 and rs2_val < xlen, rs1_val==0
+// opcode: srl ; op1:x4; op2:x17; dest:x30; op1val:0x0; op2val:0xf
+TEST_RR_OP(srl, x30, x4, x17, 0x0, 0x0, 0xf, x19, 24, x24)
+
+inst_7:
+// rs1==x1, rs2==x4, rd==x6, rs1_val == (2**(xlen-1)-1) and rs2_val >= 0 and rs2_val < xlen, rs1_val == 2147483647, rs2_val == 30
+// opcode: srl ; op1:x1; op2:x4; dest:x6; op1val:0x7fffffff; op2val:0x1e
+TEST_RR_OP(srl, x6, x1, x4, 0x1, 0x7fffffff, 0x1e, x19, 28, x24)
+
+inst_8:
+// rs1==x0, rs2==x21, rd==x15, rs1_val == 1 and rs2_val >= 0 and rs2_val < xlen, rs1_val == 1, rs2_val == 29
+// opcode: srl ; op1:x0; op2:x21; dest:x15; op1val:0x0; op2val:0x1d
+TEST_RR_OP(srl, x15, x0, x21, 0x0, 0x0, 0x1d, x19, 32, x24)
+
+inst_9:
+// rs1==x28, rs2==x23, rd==x5, rs1_val == 2, rs1_val==2
+// opcode: srl ; op1:x28; op2:x23; dest:x5; op1val:0x2; op2val:0x6
+TEST_RR_OP(srl, x5, x28, x23, 0x0, 0x2, 0x6, x19, 36, x24)
+
+inst_10:
+// rs1==x9, rs2==x30, rd==x4, rs1_val == 4, rs2_val == 10, rs1_val==4
+// opcode: srl ; op1:x9; op2:x30; dest:x4; op1val:0x4; op2val:0xa
+TEST_RR_OP(srl, x4, x9, x30, 0x0, 0x4, 0xa, x19, 40, x24)
+
+inst_11:
+// rs1==x13, rs2==x29, rd==x10, rs1_val == 8, rs2_val == 2
+// opcode: srl ; op1:x13; op2:x29; dest:x10; op1val:0x8; op2val:0x2
+TEST_RR_OP(srl, x10, x13, x29, 0x2, 0x8, 0x2, x19, 44, x24)
+
+inst_12:
+// rs1==x2, rs2==x16, rd==x25, rs1_val == 16,
+// opcode: srl ; op1:x2; op2:x16; dest:x25; op1val:0x10; op2val:0x7
+TEST_RR_OP(srl, x25, x2, x16, 0x0, 0x10, 0x7, x19, 48, x24)
+RVTEST_SIGBASE( x4,signature_x4_0)
+
+inst_13:
+// rs1==x11, rs2==x28, rd==x19, rs1_val == 32,
+// opcode: srl ; op1:x11; op2:x28; dest:x19; op1val:0x20; op2val:0x8
+TEST_RR_OP(srl, x19, x11, x28, 0x0, 0x20, 0x8, x4, 0, x7)
+
+inst_14:
+// rs1==x10, rs2==x6, rd==x23, rs1_val == 64,
+// opcode: srl ; op1:x10; op2:x6; dest:x23; op1val:0x40; op2val:0xb
+TEST_RR_OP(srl, x23, x10, x6, 0x0, 0x40, 0xb, x4, 4, x7)
+
+inst_15:
+// rs1==x3, rs2==x1, rd==x0, rs1_val == 128,
+// opcode: srl ; op1:x3; op2:x1; dest:x0; op1val:0x80; op2val:0x6
+TEST_RR_OP(srl, x0, x3, x1, 0, 0x80, 0x6, x4, 8, x7)
+
+inst_16:
+// rs1==x6, rs2==x8, rd==x14, rs1_val == 512,
+// opcode: srl ; op1:x6; op2:x8; dest:x14; op1val:0x200; op2val:0xe
+TEST_RR_OP(srl, x14, x6, x8, 0x0, 0x200, 0xe, x4, 12, x7)
+
+inst_17:
+// rs1==x20, rs2==x27, rd==x9, rs1_val == 1024,
+// opcode: srl ; op1:x20; op2:x27; dest:x9; op1val:0x400; op2val:0x1d
+TEST_RR_OP(srl, x9, x20, x27, 0x0, 0x400, 0x1d, x4, 16, x7)
+
+inst_18:
+// rs1==x30, rs2==x18, rd==x16, rs1_val == 2048,
+// opcode: srl ; op1:x30; op2:x18; dest:x16; op1val:0x800; op2val:0xd
+TEST_RR_OP(srl, x16, x30, x18, 0x0, 0x800, 0xd, x4, 20, x7)
+
+inst_19:
+// rs1==x22, rs2==x10, rd==x24, rs1_val == 4096,
+// opcode: srl ; op1:x22; op2:x10; dest:x24; op1val:0x1000; op2val:0x8
+TEST_RR_OP(srl, x24, x22, x10, 0x10, 0x1000, 0x8, x4, 24, x7)
+
+inst_20:
+// rs1==x15, rs2==x24, rd==x2, rs1_val == 8192,
+// opcode: srl ; op1:x15; op2:x24; dest:x2; op1val:0x2000; op2val:0xc
+TEST_RR_OP(srl, x2, x15, x24, 0x2, 0x2000, 0xc, x4, 28, x7)
+
+inst_21:
+// rs1==x17, rs2==x9, rd==x21, rs1_val == 16384,
+// opcode: srl ; op1:x17; op2:x9; dest:x21; op1val:0x4000; op2val:0x7
+TEST_RR_OP(srl, x21, x17, x9, 0x80, 0x4000, 0x7, x4, 32, x7)
+
+inst_22:
+// rs1==x12, rs2==x20, rd==x27, rs1_val == 32768,
+// opcode: srl ; op1:x12; op2:x20; dest:x27; op1val:0x8000; op2val:0x1f
+TEST_RR_OP(srl, x27, x12, x20, 0x0, 0x8000, 0x1f, x4, 36, x7)
+
+inst_23:
+// rs1==x27, rs2==x5, rd==x26, rs1_val == 65536,
+// opcode: srl ; op1:x27; op2:x5; dest:x26; op1val:0x10000; op2val:0x3
+TEST_RR_OP(srl, x26, x27, x5, 0x2000, 0x10000, 0x3, x4, 40, x7)
+
+inst_24:
+// rs1==x16, rs2==x13, rd==x17, rs1_val == 131072,
+// opcode: srl ; op1:x16; op2:x13; dest:x17; op1val:0x20000; op2val:0x8
+TEST_RR_OP(srl, x17, x16, x13, 0x200, 0x20000, 0x8, x4, 44, x7)
+
+inst_25:
+// rs1==x23, rs2==x15, rd==x28, rs1_val == 262144, rs2_val == 16
+// opcode: srl ; op1:x23; op2:x15; dest:x28; op1val:0x40000; op2val:0x10
+TEST_RR_OP(srl, x28, x23, x15, 0x4, 0x40000, 0x10, x4, 48, x7)
+
+inst_26:
+// rs1==x8, rs2==x26, rd==x1, rs1_val == 524288,
+// opcode: srl ; op1:x8; op2:x26; dest:x1; op1val:0x80000; op2val:0x5
+TEST_RR_OP(srl, x1, x8, x26, 0x4000, 0x80000, 0x5, x4, 52, x7)
+
+inst_27:
+// rs1==x24, rs2==x2, rd==x29, rs1_val == 1048576, rs2_val == 23
+// opcode: srl ; op1:x24; op2:x2; dest:x29; op1val:0x100000; op2val:0x17
+TEST_RR_OP(srl, x29, x24, x2, 0x0, 0x100000, 0x17, x4, 56, x7)
+
+inst_28:
+// rs1==x29, rs2==x14, rd==x31, rs1_val == 2097152,
+// opcode: srl ; op1:x29; op2:x14; dest:x31; op1val:0x200000; op2val:0x10
+TEST_RR_OP(srl, x31, x29, x14, 0x20, 0x200000, 0x10, x4, 60, x2)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_29:
+// rs1==x5, rs2==x19, rd==x22, rs1_val == 4194304,
+// opcode: srl ; op1:x5; op2:x19; dest:x22; op1val:0x400000; op2val:0x6
+TEST_RR_OP(srl, x22, x5, x19, 0x10000, 0x400000, 0x6, x1, 0, x2)
+
+inst_30:
+// rs1==x19, rs2==x0, rd==x3, rs1_val == 8388608, rs2_val == 1
+// opcode: srl ; op1:x19; op2:x0; dest:x3; op1val:0x800000; op2val:0x0
+TEST_RR_OP(srl, x3, x19, x0, 0x800000, 0x800000, 0x0, x1, 4, x2)
+
+inst_31:
+// rs1==x25, rs1_val == 16777216,
+// opcode: srl ; op1:x25; op2:x4; dest:x8; op1val:0x1000000; op2val:0x1e
+TEST_RR_OP(srl, x8, x25, x4, 0x0, 0x1000000, 0x1e, x1, 8, x2)
+
+inst_32:
+// rs2==x25, rs1_val == 33554432,
+// opcode: srl ; op1:x6; op2:x25; dest:x30; op1val:0x2000000; op2val:0x1d
+TEST_RR_OP(srl, x30, x6, x25, 0x0, 0x2000000, 0x1d, x1, 12, x2)
+
+inst_33:
+// rd==x13, rs1_val == 67108864,
+// opcode: srl ; op1:x12; op2:x9; dest:x13; op1val:0x4000000; op2val:0x1e
+TEST_RR_OP(srl, x13, x12, x9, 0x0, 0x4000000, 0x1e, x1, 16, x2)
+
+inst_34:
+// rs1_val == 134217728,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x8
+TEST_RR_OP(srl, x12, x10, x11, 0x80000, 0x8000000, 0x8, x1, 20, x2)
+
+inst_35:
+// rs1_val == 268435456,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0xc
+TEST_RR_OP(srl, x12, x10, x11, 0x10000, 0x10000000, 0xc, x1, 24, x2)
+
+inst_36:
+// rs1_val == 536870912, rs2_val == 27
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x1b
+TEST_RR_OP(srl, x12, x10, x11, 0x4, 0x20000000, 0x1b, x1, 28, x2)
+
+inst_37:
+// rs1_val == 1073741824,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x6
+TEST_RR_OP(srl, x12, x10, x11, 0x1000000, 0x40000000, 0x6, x1, 32, x2)
+
+inst_38:
+// rs1_val == -2,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0xb
+TEST_RR_OP(srl, x12, x10, x11, 0x1fffff, -0x2, 0xb, x1, 36, x2)
+
+inst_39:
+// rs1_val == -3,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0x13
+TEST_RR_OP(srl, x12, x10, x11, 0x1fff, -0x3, 0x13, x1, 40, x2)
+
+inst_40:
+// rs1_val == -5,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0x2
+TEST_RR_OP(srl, x12, x10, x11, 0x3ffffffe, -0x5, 0x2, x1, 44, x2)
+
+inst_41:
+// rs1_val == -9,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x13
+TEST_RR_OP(srl, x12, x10, x11, 0x1fff, -0x9, 0x13, x1, 48, x2)
+
+inst_42:
+// rs1_val == -17,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:0x17
+TEST_RR_OP(srl, x12, x10, x11, 0x1ff, -0x11, 0x17, x1, 52, x2)
+
+inst_43:
+// rs1_val == -33,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0xf
+TEST_RR_OP(srl, x12, x10, x11, 0x1ffff, -0x21, 0xf, x1, 56, x2)
+
+inst_44:
+// rs1_val == -65,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0xe
+TEST_RR_OP(srl, x12, x10, x11, 0x3ffff, -0x41, 0xe, x1, 60, x2)
+
+inst_45:
+// rs1_val == -129,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x6
+TEST_RR_OP(srl, x12, x10, x11, 0x3fffffd, -0x81, 0x6, x1, 64, x2)
+
+inst_46:
+// rs1_val == -257,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0xe
+TEST_RR_OP(srl, x12, x10, x11, 0x3ffff, -0x101, 0xe, x1, 68, x2)
+
+inst_47:
+// rs1_val == -513,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0xd
+TEST_RR_OP(srl, x12, x10, x11, 0x7ffff, -0x201, 0xd, x1, 72, x2)
+
+inst_48:
+// rs1_val == -1025,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x1b
+TEST_RR_OP(srl, x12, x10, x11, 0x1f, -0x401, 0x1b, x1, 76, x2)
+
+inst_49:
+// rs1_val == -2049,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x1b
+TEST_RR_OP(srl, x12, x10, x11, 0x1f, -0x801, 0x1b, x1, 80, x2)
+
+inst_50:
+// rs1_val == -4097,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0xd
+TEST_RR_OP(srl, x12, x10, x11, 0x7ffff, -0x1001, 0xd, x1, 84, x2)
+
+inst_51:
+// rs1_val == -8193,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0xc
+TEST_RR_OP(srl, x12, x10, x11, 0xffffd, -0x2001, 0xc, x1, 88, x2)
+
+inst_52:
+// rs1_val == -16385,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x10
+TEST_RR_OP(srl, x12, x10, x11, 0xffff, -0x4001, 0x10, x1, 92, x2)
+
+inst_53:
+// rs1_val == -32769,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x1e
+TEST_RR_OP(srl, x12, x10, x11, 0x3, -0x8001, 0x1e, x1, 96, x2)
+
+inst_54:
+// rs1_val == -65537,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x12
+TEST_RR_OP(srl, x12, x10, x11, 0x3fff, -0x10001, 0x12, x1, 100, x2)
+
+inst_55:
+// rs1_val == -131073,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x1f
+TEST_RR_OP(srl, x12, x10, x11, 0x1, -0x20001, 0x1f, x1, 104, x2)
+
+inst_56:
+// rs1_val == -262145,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0xf
+TEST_RR_OP(srl, x12, x10, x11, 0x1fff7, -0x40001, 0xf, x1, 108, x2)
+
+inst_57:
+// rs1_val == -524289,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x1b
+TEST_RR_OP(srl, x12, x10, x11, 0x1f, -0x80001, 0x1b, x1, 112, x2)
+
+inst_58:
+// rs1_val == -1048577,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x6
+TEST_RR_OP(srl, x12, x10, x11, 0x3ffbfff, -0x100001, 0x6, x1, 116, x2)
+
+inst_59:
+// rs1_val == -8388609,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x12
+TEST_RR_OP(srl, x12, x10, x11, 0x3fdf, -0x800001, 0x12, x1, 120, x2)
+
+inst_60:
+// rs1_val == -16777217,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0x11
+TEST_RR_OP(srl, x12, x10, x11, 0x7f7f, -0x1000001, 0x11, x1, 124, x2)
+
+inst_61:
+// rs1_val == -33554433,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0xc
+TEST_RR_OP(srl, x12, x10, x11, 0xfdfff, -0x2000001, 0xc, x1, 128, x2)
+
+inst_62:
+// rs1_val == -67108865,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x17
+TEST_RR_OP(srl, x12, x10, x11, 0x1f7, -0x4000001, 0x17, x1, 132, x2)
+
+inst_63:
+// rs1_val == -134217729,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x1
+TEST_RR_OP(srl, x12, x10, x11, 0x7bffffff, -0x8000001, 0x1, x1, 136, x2)
+
+inst_64:
+// rs1_val == -268435457,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x9
+TEST_RR_OP(srl, x12, x10, x11, 0x77ffff, -0x10000001, 0x9, x1, 140, x2)
+
+inst_65:
+// rs1_val == -536870913,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0xd
+TEST_RR_OP(srl, x12, x10, x11, 0x6ffff, -0x20000001, 0xd, x1, 144, x2)
+
+inst_66:
+// rs1_val == -1073741825,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x8
+TEST_RR_OP(srl, x12, x10, x11, 0xbfffff, -0x40000001, 0x8, x1, 148, x2)
+
+inst_67:
+// rs1_val == 1431655765, rs1_val==1431655765
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb
+TEST_RR_OP(srl, x12, x10, x11, 0xaaaaa, 0x55555555, 0xb, x1, 152, x2)
+
+inst_68:
+// rs1_val == -1431655766, rs1_val==-1431655766
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x1d
+TEST_RR_OP(srl, x12, x10, x11, 0x5, -0x55555556, 0x1d, x1, 156, x2)
+
+inst_69:
+// rs1_val==3,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x3, 0x3, x1, 160, x2)
+
+inst_70:
+// rs1_val==5,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xf
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x5, 0xf, x1, 164, x2)
+
+inst_71:
+// rs1_val==858993459,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xa
+TEST_RR_OP(srl, x12, x10, x11, 0xccccc, 0x33333333, 0xa, x1, 168, x2)
+
+inst_72:
+// rs1_val==1717986918,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x13
+TEST_RR_OP(srl, x12, x10, x11, 0xccc, 0x66666666, 0x13, x1, 172, x2)
+
+inst_73:
+// rs1_val==46341,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x1f
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0xb505, 0x1f, x1, 176, x2)
+
+inst_74:
+// rs2_val == 4, rs1_val==6
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x6, 0x4, x1, 180, x2)
+
+inst_75:
+// rs2_val == 21,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x15
+TEST_RR_OP(srl, x12, x10, x11, 0x7ef, -0x2000001, 0x15, x1, 184, x2)
+
+inst_76:
+// rs1_val==-46340,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xc
+TEST_RR_OP(srl, x12, x10, x11, 0xffff4, -0xb504, 0xc, x1, 188, x2)
+
+inst_77:
+// rs1_val==46340,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x1d
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0xb504, 0x1d, x1, 192, x2)
+
+inst_78:
+// rs1_val==1431655764,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x15
+TEST_RR_OP(srl, x12, x10, x11, 0x2aa, 0x55555554, 0x15, x1, 196, x2)
+
+inst_79:
+// rs1_val == -2097153,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0xe
+TEST_RR_OP(srl, x12, x10, x11, 0x3ff7f, -0x200001, 0xe, x1, 200, x2)
+
+inst_80:
+// rs1_val==858993458,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(srl, x12, x10, x11, 0x33333332, 0x33333332, 0x0, x1, 204, x2)
+
+inst_81:
+// rs1_val==1717986917,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(srl, x12, x10, x11, 0xccccccc, 0x66666665, 0x3, x1, 208, x2)
+
+inst_82:
+// rs1_val==46339,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x1
+TEST_RR_OP(srl, x12, x10, x11, 0x5a81, 0xb503, 0x1, x1, 212, x2)
+
+inst_83:
+// rs1_val==-1431655765,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb
+TEST_RR_OP(srl, x12, x10, x11, 0x155555, -0x55555555, 0xb, x1, 216, x2)
+
+inst_84:
+// rs1_val==858993460,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x1b
+TEST_RR_OP(srl, x12, x10, x11, 0x6, 0x33333334, 0x1b, x1, 220, x2)
+
+inst_85:
+// rs1_val==1717986919,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(srl, x12, x10, x11, 0x1999999, 0x66666667, 0x6, x1, 224, x2)
+
+inst_86:
+// rs1_val==-46339,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x6
+TEST_RR_OP(srl, x12, x10, x11, 0x3fffd2b, -0xb503, 0x6, x1, 228, x2)
+
+inst_87:
+// rs1_val > 0 and rs2_val > 0 and rs2_val < xlen, rs1_val==1431655766, rs2_val == 8
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x8
+TEST_RR_OP(srl, x12, x10, x11, 0x555555, 0x55555556, 0x8, x1, 232, x2)
+
+inst_88:
+// rs1_val < 0 and rs2_val == 0,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x1; op2val:0x0
+TEST_RR_OP(srl, x12, x10, x11, 0xffffffff, -0x1, 0x0, x1, 236, x2)
+
+inst_89:
+// rs1_val == 1 and rs2_val >= 0 and rs2_val < xlen, rs1_val == 1, rs2_val == 29
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x1d
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x1, 0x1d, x1, 240, x2)
+
+inst_90:
+// rs1_val == 128,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0x6
+TEST_RR_OP(srl, x12, x10, x11, 0x2, 0x80, 0x6, x1, 244, x2)
+
+inst_91:
+// rs1_val == 8388608, rs2_val == 1
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x1
+TEST_RR_OP(srl, x12, x10, x11, 0x400000, 0x800000, 0x1, x1, 248, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x19_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x19_1:
+ .fill 13*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_0:
+ .fill 16*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 63*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/srli-01.S b/riscof/suite/rv32i_m/I/srli-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..0c2e462179b3a16bbd4be2b2c00199e344c4be8b
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/srli-01.S
@@ -0,0 +1,524 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the srli instruction of the RISC-V I extension for the srli covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",srli)
+
+RVTEST_SIGBASE( x5,signature_x5_1)
+
+inst_0:
+// rs1 != rd, rs1==x30, rd==x8, rs1_val < 0 and imm_val > 0 and imm_val < xlen, rs1_val==-46340, imm_val == 2
+// opcode: srli ; op1:x30; dest:x8; op1val:-0xb504; immval:0x2
+TEST_IMM_OP( srli, x8, x30, 0x3fffd2bf, -0xb504, 0x2, x5, 0, x6)
+
+inst_1:
+// rs1 == rd, rs1==x17, rd==x17, rs1_val > 0 and imm_val > 0 and imm_val < xlen,
+// opcode: srli ; op1:x17; dest:x17; op1val:0x7; immval:0x13
+TEST_IMM_OP( srli, x17, x17, 0x0, 0x7, 0x13, x5, 4, x6)
+
+inst_2:
+// rs1==x27, rd==x19, rs1_val < 0 and imm_val == 0,
+// opcode: srli ; op1:x27; dest:x19; op1val:-0xb504; immval:0x0
+TEST_IMM_OP( srli, x19, x27, 0xffff4afc, -0xb504, 0x0, x5, 8, x6)
+
+inst_3:
+// rs1==x29, rd==x9, rs1_val > 0 and imm_val == 0,
+// opcode: srli ; op1:x29; dest:x9; op1val:0x3fffffff; immval:0x0
+TEST_IMM_OP( srli, x9, x29, 0x3fffffff, 0x3fffffff, 0x0, x5, 12, x6)
+
+inst_4:
+// rs1==x25, rd==x22, rs1_val < 0 and imm_val == (xlen-1),
+// opcode: srli ; op1:x25; dest:x22; op1val:-0xa; immval:0x1f
+TEST_IMM_OP( srli, x22, x25, 0x1, -0xa, 0x1f, x5, 16, x6)
+
+inst_5:
+// rs1==x1, rd==x13, rs1_val > 0 and imm_val == (xlen-1), rs1_val == 512
+// opcode: srli ; op1:x1; dest:x13; op1val:0x200; immval:0x1f
+TEST_IMM_OP( srli, x13, x1, 0x0, 0x200, 0x1f, x5, 20, x6)
+
+inst_6:
+// rs1==x21, rd==x0, rs1_val == imm_val and imm_val > 0 and imm_val < xlen, rs1_val==3
+// opcode: srli ; op1:x21; dest:x0; op1val:0x3; immval:0x3
+TEST_IMM_OP( srli, x0, x21, 0, 0x3, 0x3, x5, 24, x6)
+
+inst_7:
+// rs1==x0, rd==x29, rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < xlen, rs1_val == -2147483648
+// opcode: srli ; op1:x0; dest:x29; op1val:0x0; immval:0x9
+TEST_IMM_OP( srli, x29, x0, 0x0, 0x0, 0x9, x5, 28, x6)
+
+inst_8:
+// rs1==x16, rd==x18, rs1_val == 0 and imm_val >= 0 and imm_val < xlen, imm_val == 1, rs1_val==0
+// opcode: srli ; op1:x16; dest:x18; op1val:0x0; immval:0x1
+TEST_IMM_OP( srli, x18, x16, 0x0, 0x0, 0x1, x5, 32, x6)
+
+inst_9:
+// rs1==x20, rd==x27, rs1_val == (2**(xlen-1)-1) and imm_val >= 0 and imm_val < xlen, rs1_val == 2147483647
+// opcode: srli ; op1:x20; dest:x27; op1val:0x7fffffff; immval:0x11
+TEST_IMM_OP( srli, x27, x20, 0x3fff, 0x7fffffff, 0x11, x5, 36, x6)
+
+inst_10:
+// rs1==x31, rd==x2, rs1_val == 1 and imm_val >= 0 and imm_val < xlen, rs1_val == 1
+// opcode: srli ; op1:x31; dest:x2; op1val:0x1; immval:0x12
+TEST_IMM_OP( srli, x2, x31, 0x0, 0x1, 0x12, x5, 40, x6)
+
+inst_11:
+// rs1==x7, rd==x31, rs1_val == 2, imm_val == 29, rs1_val==2
+// opcode: srli ; op1:x7; dest:x31; op1val:0x2; immval:0x1d
+TEST_IMM_OP( srli, x31, x7, 0x0, 0x2, 0x1d, x5, 44, x6)
+
+inst_12:
+// rs1==x14, rd==x16, rs1_val == 4, rs1_val==4, imm_val == 15
+// opcode: srli ; op1:x14; dest:x16; op1val:0x4; immval:0xf
+TEST_IMM_OP( srli, x16, x14, 0x0, 0x4, 0xf, x5, 48, x6)
+
+inst_13:
+// rs1==x12, rd==x25, rs1_val == 8, imm_val == 27
+// opcode: srli ; op1:x12; dest:x25; op1val:0x8; immval:0x1b
+TEST_IMM_OP( srli, x25, x12, 0x0, 0x8, 0x1b, x5, 52, x6)
+
+inst_14:
+// rs1==x4, rd==x11, rs1_val == 16,
+// opcode: srli ; op1:x4; dest:x11; op1val:0x10; immval:0xf
+TEST_IMM_OP( srli, x11, x4, 0x0, 0x10, 0xf, x5, 56, x6)
+
+inst_15:
+// rs1==x24, rd==x23, rs1_val == 32, imm_val == 23
+// opcode: srli ; op1:x24; dest:x23; op1val:0x20; immval:0x17
+TEST_IMM_OP( srli, x23, x24, 0x0, 0x20, 0x17, x5, 60, x6)
+
+inst_16:
+// rs1==x8, rd==x28, rs1_val == 64,
+// opcode: srli ; op1:x8; dest:x28; op1val:0x40; immval:0xd
+TEST_IMM_OP( srli, x28, x8, 0x0, 0x40, 0xd, x5, 64, x6)
+
+inst_17:
+// rs1==x15, rd==x30, rs1_val == 128, imm_val == 30
+// opcode: srli ; op1:x15; dest:x30; op1val:0x80; immval:0x1e
+TEST_IMM_OP( srli, x30, x15, 0x0, 0x80, 0x1e, x5, 68, x6)
+
+inst_18:
+// rs1==x18, rd==x20, rs1_val == 256,
+// opcode: srli ; op1:x18; dest:x20; op1val:0x100; immval:0x1f
+TEST_IMM_OP( srli, x20, x18, 0x0, 0x100, 0x1f, x5, 72, x6)
+
+inst_19:
+// rs1==x13, rd==x14, rs1_val == 1024,
+// opcode: srli ; op1:x13; dest:x14; op1val:0x400; immval:0x12
+TEST_IMM_OP( srli, x14, x13, 0x0, 0x400, 0x12, x5, 76, x6)
+
+inst_20:
+// rs1==x11, rd==x3, rs1_val == 2048,
+// opcode: srli ; op1:x11; dest:x3; op1val:0x800; immval:0xf
+TEST_IMM_OP( srli, x3, x11, 0x0, 0x800, 0xf, x5, 80, x6)
+
+inst_21:
+// rs1==x23, rd==x26, rs1_val == 4096,
+// opcode: srli ; op1:x23; dest:x26; op1val:0x1000; immval:0xf
+TEST_IMM_OP( srli, x26, x23, 0x0, 0x1000, 0xf, x5, 84, x13)
+RVTEST_SIGBASE( x8,signature_x8_0)
+
+inst_22:
+// rs1==x19, rd==x10, rs1_val == 8192,
+// opcode: srli ; op1:x19; dest:x10; op1val:0x2000; immval:0x2
+TEST_IMM_OP( srli, x10, x19, 0x800, 0x2000, 0x2, x8, 0, x13)
+
+inst_23:
+// rs1==x10, rd==x21, rs1_val == 16384,
+// opcode: srli ; op1:x10; dest:x21; op1val:0x4000; immval:0xe
+TEST_IMM_OP( srli, x21, x10, 0x1, 0x4000, 0xe, x8, 4, x13)
+
+inst_24:
+// rs1==x5, rd==x7, rs1_val == 32768,
+// opcode: srli ; op1:x5; dest:x7; op1val:0x8000; immval:0x3
+TEST_IMM_OP( srli, x7, x5, 0x1000, 0x8000, 0x3, x8, 8, x13)
+
+inst_25:
+// rs1==x2, rd==x5, rs1_val == 65536,
+// opcode: srli ; op1:x2; dest:x5; op1val:0x10000; immval:0x17
+TEST_IMM_OP( srli, x5, x2, 0x0, 0x10000, 0x17, x8, 12, x13)
+
+inst_26:
+// rs1==x28, rd==x6, rs1_val == 131072,
+// opcode: srli ; op1:x28; dest:x6; op1val:0x20000; immval:0x11
+TEST_IMM_OP( srli, x6, x28, 0x1, 0x20000, 0x11, x8, 16, x13)
+
+inst_27:
+// rs1==x3, rd==x12, rs1_val == 262144,
+// opcode: srli ; op1:x3; dest:x12; op1val:0x40000; immval:0x7
+TEST_IMM_OP( srli, x12, x3, 0x800, 0x40000, 0x7, x8, 20, x13)
+
+inst_28:
+// rs1==x26, rd==x4, rs1_val == 524288,
+// opcode: srli ; op1:x26; dest:x4; op1val:0x80000; immval:0x1d
+TEST_IMM_OP( srli, x4, x26, 0x0, 0x80000, 0x1d, x8, 24, x13)
+
+inst_29:
+// rs1==x9, rd==x24, rs1_val == 1048576,
+// opcode: srli ; op1:x9; dest:x24; op1val:0x100000; immval:0x2
+TEST_IMM_OP( srli, x24, x9, 0x40000, 0x100000, 0x2, x8, 28, x13)
+
+inst_30:
+// rs1==x6, rd==x15, rs1_val == 2097152,
+// opcode: srli ; op1:x6; dest:x15; op1val:0x200000; immval:0x5
+TEST_IMM_OP( srli, x15, x6, 0x10000, 0x200000, 0x5, x8, 32, x13)
+
+inst_31:
+// rs1==x22, rd==x1, rs1_val == 4194304,
+// opcode: srli ; op1:x22; dest:x1; op1val:0x400000; immval:0xc
+TEST_IMM_OP( srli, x1, x22, 0x400, 0x400000, 0xc, x8, 36, x13)
+
+inst_32:
+// rs1_val == 8388608,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x800000; immval:0x9
+TEST_IMM_OP( srli, x11, x10, 0x4000, 0x800000, 0x9, x8, 40, x13)
+
+inst_33:
+// rs1_val == 16777216,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x1000000; immval:0xe
+TEST_IMM_OP( srli, x11, x10, 0x400, 0x1000000, 0xe, x8, 44, x13)
+
+inst_34:
+// rs1_val == 33554432,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x2000000; immval:0x3
+TEST_IMM_OP( srli, x11, x10, 0x400000, 0x2000000, 0x3, x8, 48, x13)
+
+inst_35:
+// rs1_val == 67108864, imm_val == 4
+// opcode: srli ; op1:x10; dest:x11; op1val:0x4000000; immval:0x4
+TEST_IMM_OP( srli, x11, x10, 0x400000, 0x4000000, 0x4, x8, 52, x13)
+
+inst_36:
+// rs1_val == 134217728,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x8000000; immval:0x7
+TEST_IMM_OP( srli, x11, x10, 0x100000, 0x8000000, 0x7, x8, 56, x13)
+
+inst_37:
+// rs1_val == 268435456,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x10000000; immval:0x7
+TEST_IMM_OP( srli, x11, x10, 0x200000, 0x10000000, 0x7, x8, 60, x13)
+
+inst_38:
+// rs1_val == 536870912,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x20000000; immval:0x0
+TEST_IMM_OP( srli, x11, x10, 0x20000000, 0x20000000, 0x0, x8, 64, x13)
+
+inst_39:
+// rs1_val == 1073741824,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x40000000; immval:0x1e
+TEST_IMM_OP( srli, x11, x10, 0x1, 0x40000000, 0x1e, x8, 68, x13)
+
+inst_40:
+// rs1_val == -2,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x2; immval:0x1d
+TEST_IMM_OP( srli, x11, x10, 0x7, -0x2, 0x1d, x8, 72, x13)
+
+inst_41:
+// rs1_val == -3,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x3; immval:0xb
+TEST_IMM_OP( srli, x11, x10, 0x1fffff, -0x3, 0xb, x8, 76, x13)
+
+inst_42:
+// rs1_val == -5,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x5; immval:0x5
+TEST_IMM_OP( srli, x11, x10, 0x7ffffff, -0x5, 0x5, x8, 80, x13)
+
+inst_43:
+// rs1_val == -9,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x9; immval:0x1
+TEST_IMM_OP( srli, x11, x10, 0x7ffffffb, -0x9, 0x1, x8, 84, x13)
+
+inst_44:
+// rs1_val == -17,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x11; immval:0x1d
+TEST_IMM_OP( srli, x11, x10, 0x7, -0x11, 0x1d, x8, 88, x13)
+
+inst_45:
+// rs1_val == -33, imm_val == 16
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x21; immval:0x10
+TEST_IMM_OP( srli, x11, x10, 0xffff, -0x21, 0x10, x8, 92, x13)
+
+inst_46:
+// rs1_val == -65, imm_val == 8
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x41; immval:0x8
+TEST_IMM_OP( srli, x11, x10, 0xffffff, -0x41, 0x8, x8, 96, x13)
+
+inst_47:
+// rs1_val == -129,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x81; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x3fff, -0x81, 0x12, x8, 100, x13)
+
+inst_48:
+// rs1_val == -257,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x101; immval:0x3
+TEST_IMM_OP( srli, x11, x10, 0x1fffffdf, -0x101, 0x3, x8, 104, x13)
+
+inst_49:
+// rs1_val == -513,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x201; immval:0x13
+TEST_IMM_OP( srli, x11, x10, 0x1fff, -0x201, 0x13, x8, 108, x13)
+
+inst_50:
+// rs1_val == -1025,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x401; immval:0x9
+TEST_IMM_OP( srli, x11, x10, 0x7ffffd, -0x401, 0x9, x8, 112, x13)
+
+inst_51:
+// rs1_val == -2049,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x801; immval:0x7
+TEST_IMM_OP( srli, x11, x10, 0x1ffffef, -0x801, 0x7, x8, 116, x13)
+
+inst_52:
+// rs1_val == -4097,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x1001; immval:0x0
+TEST_IMM_OP( srli, x11, x10, 0xffffefff, -0x1001, 0x0, x8, 120, x13)
+
+inst_53:
+// rs1_val == -8193,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x2001; immval:0xe
+TEST_IMM_OP( srli, x11, x10, 0x3ffff, -0x2001, 0xe, x8, 124, x13)
+
+inst_54:
+// rs1_val == -16385,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x4001; immval:0x1
+TEST_IMM_OP( srli, x11, x10, 0x7fffdfff, -0x4001, 0x1, x8, 128, x13)
+
+inst_55:
+// rs1_val == -32769,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x8001; immval:0x1d
+TEST_IMM_OP( srli, x11, x10, 0x7, -0x8001, 0x1d, x8, 132, x13)
+
+inst_56:
+// rs1_val == -65537,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x10001; immval:0x9
+TEST_IMM_OP( srli, x11, x10, 0x7fff7f, -0x10001, 0x9, x8, 136, x13)
+
+inst_57:
+// rs1_val == -131073,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x20001; immval:0x7
+TEST_IMM_OP( srli, x11, x10, 0x1fffbff, -0x20001, 0x7, x8, 140, x13)
+
+inst_58:
+// rs1_val == -262145,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x40001; immval:0x13
+TEST_IMM_OP( srli, x11, x10, 0x1fff, -0x40001, 0x13, x8, 144, x13)
+
+inst_59:
+// rs1_val == -524289,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x80001; immval:0xf
+TEST_IMM_OP( srli, x11, x10, 0x1ffef, -0x80001, 0xf, x8, 148, x13)
+
+inst_60:
+// rs1_val == -1048577,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x100001; immval:0x10
+TEST_IMM_OP( srli, x11, x10, 0xffef, -0x100001, 0x10, x8, 152, x13)
+
+inst_61:
+// rs1_val == -2097153,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x200001; immval:0x6
+TEST_IMM_OP( srli, x11, x10, 0x3ff7fff, -0x200001, 0x6, x8, 156, x13)
+
+inst_62:
+// rs1_val == -4194305,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x400001; immval:0x8
+TEST_IMM_OP( srli, x11, x10, 0xffbfff, -0x400001, 0x8, x8, 160, x13)
+
+inst_63:
+// rs1_val == -8388609, imm_val == 10
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x800001; immval:0xa
+TEST_IMM_OP( srli, x11, x10, 0x3fdfff, -0x800001, 0xa, x8, 164, x13)
+
+inst_64:
+// rs1_val == -16777217,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x1000001; immval:0xb
+TEST_IMM_OP( srli, x11, x10, 0x1fdfff, -0x1000001, 0xb, x8, 168, x13)
+
+inst_65:
+// rs1_val == -33554433,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x2000001; immval:0x1
+TEST_IMM_OP( srli, x11, x10, 0x7effffff, -0x2000001, 0x1, x8, 172, x13)
+
+inst_66:
+// rs1_val == -67108865, imm_val == 21
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x4000001; immval:0x15
+TEST_IMM_OP( srli, x11, x10, 0x7df, -0x4000001, 0x15, x8, 176, x13)
+
+inst_67:
+// rs1_val == -134217729,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x8000001; immval:0x15
+TEST_IMM_OP( srli, x11, x10, 0x7bf, -0x8000001, 0x15, x8, 180, x13)
+
+inst_68:
+// rs1_val == -268435457,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x10000001; immval:0xe
+TEST_IMM_OP( srli, x11, x10, 0x3bfff, -0x10000001, 0xe, x8, 184, x13)
+
+inst_69:
+// rs1_val == -536870913,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x20000001; immval:0x2
+TEST_IMM_OP( srli, x11, x10, 0x37ffffff, -0x20000001, 0x2, x8, 188, x13)
+
+inst_70:
+// rs1_val == -1073741825,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x40000001; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x2fff, -0x40000001, 0x12, x8, 192, x13)
+
+inst_71:
+// rs1_val == 1431655765, rs1_val==1431655765
+// opcode: srli ; op1:x10; dest:x11; op1val:0x55555555; immval:0x13
+TEST_IMM_OP( srli, x11, x10, 0xaaa, 0x55555555, 0x13, x8, 196, x13)
+
+inst_72:
+// rs1_val == -1431655766, rs1_val==-1431655766
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x55555556; immval:0xc
+TEST_IMM_OP( srli, x11, x10, 0xaaaaa, -0x55555556, 0xc, x8, 200, x13)
+
+inst_73:
+// rs1_val==5,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( srli, x11, x10, 0x0, 0x5, 0x3, x8, 204, x13)
+
+inst_74:
+// rs1_val==1717986919,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x66666667; immval:0x17
+TEST_IMM_OP( srli, x11, x10, 0xcc, 0x66666667, 0x17, x8, 208, x13)
+
+inst_75:
+// rs1_val==-46339,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0xb503; immval:0xa
+TEST_IMM_OP( srli, x11, x10, 0x3fffd2, -0xb503, 0xa, x8, 212, x13)
+
+inst_76:
+// rs1_val==46341,
+// opcode: srli ; op1:x10; dest:x11; op1val:0xb505; immval:0xd
+TEST_IMM_OP( srli, x11, x10, 0x5, 0xb505, 0xd, x8, 216, x13)
+
+inst_77:
+// rs1_val==858993459,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x33333333; immval:0xc
+TEST_IMM_OP( srli, x11, x10, 0x33333, 0x33333333, 0xc, x8, 220, x13)
+
+inst_78:
+// rs1_val==1717986918,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x66666666; immval:0x15
+TEST_IMM_OP( srli, x11, x10, 0x333, 0x66666666, 0x15, x8, 224, x13)
+
+inst_79:
+// rs1_val==46340,
+// opcode: srli ; op1:x10; dest:x11; op1val:0xb504; immval:0xf
+TEST_IMM_OP( srli, x11, x10, 0x1, 0xb504, 0xf, x8, 228, x13)
+
+inst_80:
+// rs1_val==1431655764,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x55555554; immval:0x1d
+TEST_IMM_OP( srli, x11, x10, 0x2, 0x55555554, 0x1d, x8, 232, x13)
+
+inst_81:
+// rs1_val==858993458,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x33333332; immval:0x1b
+TEST_IMM_OP( srli, x11, x10, 0x6, 0x33333332, 0x1b, x8, 236, x13)
+
+inst_82:
+// rs1_val==1717986917,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x66666665; immval:0x9
+TEST_IMM_OP( srli, x11, x10, 0x333333, 0x66666665, 0x9, x8, 240, x13)
+
+inst_83:
+// rs1_val==46339,
+// opcode: srli ; op1:x10; dest:x11; op1val:0xb503; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x0, 0xb503, 0x12, x8, 244, x13)
+
+inst_84:
+// rs1_val==1431655766,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x55555556; immval:0xf
+TEST_IMM_OP( srli, x11, x10, 0xaaaa, 0x55555556, 0xf, x8, 248, x13)
+
+inst_85:
+// rs1_val==-1431655765,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x1d
+TEST_IMM_OP( srli, x11, x10, 0x5, -0x55555555, 0x1d, x8, 252, x13)
+
+inst_86:
+// rs1_val==6,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x6; immval:0x1f
+TEST_IMM_OP( srli, x11, x10, 0x0, 0x6, 0x1f, x8, 256, x13)
+
+inst_87:
+// rs1_val==858993460,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x33333334; immval:0x6
+TEST_IMM_OP( srli, x11, x10, 0xcccccc, 0x33333334, 0x6, x8, 260, x13)
+
+inst_88:
+// rs1_val == imm_val and imm_val > 0 and imm_val < xlen, rs1_val==3
+// opcode: srli ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( srli, x11, x10, 0x0, 0x3, 0x3, x8, 264, x13)
+
+inst_89:
+// rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < xlen, rs1_val == -2147483648
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x80000000; immval:0x9
+TEST_IMM_OP( srli, x11, x10, 0x400000, -0x80000000, 0x9, x8, 268, x13)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x5_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x8_0:
+ .fill 68*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/sub-01.S b/riscof/suite/rv32i_m/I/sub-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..16fb4320de3bdcfbb2238c6419db272b1230f675
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/sub-01.S
@@ -0,0 +1,3039 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sub instruction of the RISC-V I extension for the sub covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sub)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs2 == rd != rs1, rs1==x24, rs2==x26, rd==x26, rs1_val > 0 and rs2_val > 0, rs1_val != rs2_val, rs1_val==1431655764 and rs2_val==6
+// opcode: sub ; op1:x24; op2:x26; dest:x26; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(sub, x26, x24, x26, 0x5555554e, 0x55555554, 0x6, x1, 0, x2)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x17, rs2==x17, rd==x23, rs1_val > 0 and rs2_val < 0, rs1_val == 33554432
+// opcode: sub ; op1:x17; op2:x17; dest:x23; op1val:0x2000000; op2val:0x2000000
+TEST_RR_OP(sub, x23, x17, x17, 0x0, 0x2000000, 0x2000000, x1, 4, x2)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x16, rs2==x16, rd==x16, rs1_val < 0 and rs2_val < 0, rs2_val == -129
+// opcode: sub ; op1:x16; op2:x16; dest:x16; op1val:-0x7; op2val:-0x7
+TEST_RR_OP(sub, x16, x16, x16, 0x0, -0x7, -0x7, x1, 8, x2)
+
+inst_3:
+// rs1 == rd != rs2, rs1==x31, rs2==x19, rd==x31, rs1_val < 0 and rs2_val > 0, rs1_val == -3
+// opcode: sub ; op1:x31; op2:x19; dest:x31; op1val:-0x3; op2val:0x66666665
+TEST_RR_OP(sub, x31, x31, x19, 0x99999998, -0x3, 0x66666665, x1, 12, x2)
+
+inst_4:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x23, rs2==x14, rd==x8, rs1_val == rs2_val, rs2_val == 524288, rs1_val == 524288
+// opcode: sub ; op1:x23; op2:x14; dest:x8; op1val:0x80000; op2val:0x80000
+TEST_RR_OP(sub, x8, x23, x14, 0x0, 0x80000, 0x80000, x1, 16, x2)
+
+inst_5:
+// rs1==x13, rs2==x24, rd==x18, rs2_val == (-2**(xlen-1)), rs1_val == -67108865, rs2_val == -2147483648
+// opcode: sub ; op1:x13; op2:x24; dest:x18; op1val:-0x4000001; op2val:-0x80000000
+TEST_RR_OP(sub, x18, x13, x24, 0x7bffffff, -0x4000001, -0x80000000, x1, 20, x2)
+
+inst_6:
+// rs1==x12, rs2==x4, rd==x0, rs2_val == 0, rs1_val == 32
+// opcode: sub ; op1:x12; op2:x4; dest:x0; op1val:0x20; op2val:0x0
+TEST_RR_OP(sub, x0, x12, x4, 0, 0x20, 0x0, x1, 24, x2)
+
+inst_7:
+// rs1==x22, rs2==x9, rd==x10, rs2_val == (2**(xlen-1)-1), rs1_val == -536870913, rs2_val == 2147483647
+// opcode: sub ; op1:x22; op2:x9; dest:x10; op1val:-0x20000001; op2val:0x7fffffff
+TEST_RR_OP(sub, x10, x22, x9, 0x60000000, -0x20000001, 0x7fffffff, x1, 28, x2)
+
+inst_8:
+// rs1==x10, rs2==x27, rd==x25, rs2_val == 1, rs1_val == 65536
+// opcode: sub ; op1:x10; op2:x27; dest:x25; op1val:0x10000; op2val:0x1
+TEST_RR_OP(sub, x25, x10, x27, 0xffff, 0x10000, 0x1, x1, 32, x2)
+
+inst_9:
+// rs1==x8, rs2==x3, rd==x14, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648
+// opcode: sub ; op1:x8; op2:x3; dest:x14; op1val:-0x80000000; op2val:-0x40000000
+TEST_RR_OP(sub, x14, x8, x3, 0xc0000000, -0x80000000, -0x40000000, x1, 36, x2)
+
+inst_10:
+// rs1==x25, rs2==x30, rd==x29, rs1_val == 0, rs2_val == 2097152
+// opcode: sub ; op1:x25; op2:x30; dest:x29; op1val:0x0; op2val:0x200000
+TEST_RR_OP(sub, x29, x25, x30, 0xffe00000, 0x0, 0x200000, x1, 40, x2)
+
+inst_11:
+// rs1==x18, rs2==x8, rd==x15, rs1_val == (2**(xlen-1)-1), rs2_val == 8192, rs1_val == 2147483647
+// opcode: sub ; op1:x18; op2:x8; dest:x15; op1val:0x7fffffff; op2val:0x2000
+TEST_RR_OP(sub, x15, x18, x8, 0x7fffdfff, 0x7fffffff, 0x2000, x1, 44, x2)
+
+inst_12:
+// rs1==x14, rs2==x15, rd==x3, rs1_val == 1, rs2_val == 16
+// opcode: sub ; op1:x14; op2:x15; dest:x3; op1val:0x1; op2val:0x10
+TEST_RR_OP(sub, x3, x14, x15, 0xfffffff1, 0x1, 0x10, x1, 48, x2)
+
+inst_13:
+// rs1==x26, rs2==x29, rd==x13, rs2_val == 2,
+// opcode: sub ; op1:x26; op2:x29; dest:x13; op1val:-0x7; op2val:0x2
+TEST_RR_OP(sub, x13, x26, x29, 0xfffffff7, -0x7, 0x2, x1, 52, x2)
+
+inst_14:
+// rs1==x21, rs2==x31, rd==x19, rs2_val == 4, rs1_val==2 and rs2_val==4, rs1_val == 2
+// opcode: sub ; op1:x21; op2:x31; dest:x19; op1val:0x2; op2val:0x4
+TEST_RR_OP(sub, x19, x21, x31, 0xfffffffe, 0x2, 0x4, x1, 56, x2)
+
+inst_15:
+// rs1==x30, rs2==x5, rd==x11, rs2_val == 8, rs1_val == -16777217
+// opcode: sub ; op1:x30; op2:x5; dest:x11; op1val:-0x1000001; op2val:0x8
+TEST_RR_OP(sub, x11, x30, x5, 0xfefffff7, -0x1000001, 0x8, x1, 60, x2)
+
+inst_16:
+// rs1==x28, rs2==x7, rd==x30, rs2_val == 32, rs1_val == -1431655766
+// opcode: sub ; op1:x28; op2:x7; dest:x30; op1val:-0x55555556; op2val:0x20
+TEST_RR_OP(sub, x30, x28, x7, 0xaaaaaa8a, -0x55555556, 0x20, x1, 64, x2)
+
+inst_17:
+// rs1==x9, rs2==x10, rd==x7, rs2_val == 64, rs1_val == -65
+// opcode: sub ; op1:x9; op2:x10; dest:x7; op1val:-0x41; op2val:0x40
+TEST_RR_OP(sub, x7, x9, x10, 0xffffff7f, -0x41, 0x40, x1, 68, x14)
+
+inst_18:
+// rs1==x0, rs2==x18, rd==x17, rs2_val == 128,
+// opcode: sub ; op1:x0; op2:x18; dest:x17; op1val:0x0; op2val:0x80
+TEST_RR_OP(sub, x17, x0, x18, 0xffffff80, 0x0, 0x80, x1, 72, x14)
+
+inst_19:
+// rs1==x2, rs2==x12, rd==x27, rs2_val == 256,
+// opcode: sub ; op1:x2; op2:x12; dest:x27; op1val:-0x40000000; op2val:0x100
+TEST_RR_OP(sub, x27, x2, x12, 0xbfffff00, -0x40000000, 0x100, x1, 76, x14)
+RVTEST_SIGBASE( x8,signature_x8_0)
+
+inst_20:
+// rs1==x4, rs2==x28, rd==x20, rs2_val == 512,
+// opcode: sub ; op1:x4; op2:x28; dest:x20; op1val:-0xb503; op2val:0x200
+TEST_RR_OP(sub, x20, x4, x28, 0xffff48fd, -0xb503, 0x200, x8, 0, x14)
+
+inst_21:
+// rs1==x15, rs2==x1, rd==x6, rs2_val == 1024,
+// opcode: sub ; op1:x15; op2:x1; dest:x6; op1val:0x0; op2val:0x400
+TEST_RR_OP(sub, x6, x15, x1, 0xfffffc00, 0x0, 0x400, x8, 4, x14)
+
+inst_22:
+// rs1==x5, rs2==x0, rd==x9, rs2_val == 2048,
+// opcode: sub ; op1:x5; op2:x0; dest:x9; op1val:-0x80000000; op2val:0x0
+TEST_RR_OP(sub, x9, x5, x0, 0x80000000, -0x80000000, 0x0, x8, 8, x14)
+
+inst_23:
+// rs1==x7, rs2==x11, rd==x4, rs2_val == 4096, rs1_val == 131072
+// opcode: sub ; op1:x7; op2:x11; dest:x4; op1val:0x20000; op2val:0x1000
+TEST_RR_OP(sub, x4, x7, x11, 0x1f000, 0x20000, 0x1000, x8, 12, x14)
+
+inst_24:
+// rs1==x19, rs2==x6, rd==x1, rs2_val == 16384, rs1_val == -268435457
+// opcode: sub ; op1:x19; op2:x6; dest:x1; op1val:-0x10000001; op2val:0x4000
+TEST_RR_OP(sub, x1, x19, x6, 0xefffbfff, -0x10000001, 0x4000, x8, 16, x14)
+
+inst_25:
+// rs1==x6, rs2==x20, rd==x5, rs2_val == 32768,
+// opcode: sub ; op1:x6; op2:x20; dest:x5; op1val:0x7fffffff; op2val:0x8000
+TEST_RR_OP(sub, x5, x6, x20, 0x7fff7fff, 0x7fffffff, 0x8000, x8, 20, x14)
+
+inst_26:
+// rs1==x29, rs2==x22, rd==x2, rs2_val == 65536,
+// opcode: sub ; op1:x29; op2:x22; dest:x2; op1val:-0xb503; op2val:0x10000
+TEST_RR_OP(sub, x2, x29, x22, 0xfffe4afd, -0xb503, 0x10000, x8, 24, x14)
+
+inst_27:
+// rs1==x3, rs2==x13, rd==x21, rs2_val == 131072, rs1_val == -8388609
+// opcode: sub ; op1:x3; op2:x13; dest:x21; op1val:-0x800001; op2val:0x20000
+TEST_RR_OP(sub, x21, x3, x13, 0xff7dffff, -0x800001, 0x20000, x8, 28, x14)
+
+inst_28:
+// rs1==x1, rs2==x21, rd==x28, rs2_val == 262144, rs1_val == 256
+// opcode: sub ; op1:x1; op2:x21; dest:x28; op1val:0x100; op2val:0x40000
+TEST_RR_OP(sub, x28, x1, x21, 0xfffc0100, 0x100, 0x40000, x8, 32, x14)
+
+inst_29:
+// rs1==x20, rs2==x23, rd==x12, rs2_val == 1048576,
+// opcode: sub ; op1:x20; op2:x23; dest:x12; op1val:0x100; op2val:0x100000
+TEST_RR_OP(sub, x12, x20, x23, 0xfff00100, 0x100, 0x100000, x8, 36, x14)
+
+inst_30:
+// rs1==x27, rs2==x25, rd==x22, rs2_val == 4194304,
+// opcode: sub ; op1:x27; op2:x25; dest:x22; op1val:-0x4; op2val:0x400000
+TEST_RR_OP(sub, x22, x27, x25, 0xffbffffc, -0x4, 0x400000, x8, 40, x14)
+
+inst_31:
+// rs1==x11, rs2==x2, rd==x24, rs2_val == 8388608,
+// opcode: sub ; op1:x11; op2:x2; dest:x24; op1val:0x66666665; op2val:0x800000
+TEST_RR_OP(sub, x24, x11, x2, 0x65e66665, 0x66666665, 0x800000, x8, 44, x14)
+
+inst_32:
+// rs2_val == 16777216,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3fffffff; op2val:0x1000000
+TEST_RR_OP(sub, x12, x10, x11, 0x3effffff, 0x3fffffff, 0x1000000, x8, 48, x14)
+
+inst_33:
+// rs2_val == 33554432,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x2000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfdff4afc, -0xb504, 0x2000000, x8, 52, x14)
+
+inst_34:
+// rs2_val == 67108864, rs1_val == -32769
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x4000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfbff7fff, -0x8001, 0x4000000, x8, 56, x14)
+
+inst_35:
+// rs2_val == 134217728, rs1_val == 4
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x8000000
+TEST_RR_OP(sub, x12, x10, x11, 0xf8000004, 0x4, 0x8000000, x8, 60, x14)
+
+inst_36:
+// rs2_val == 268435456, rs1_val == -4097
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x10000000
+TEST_RR_OP(sub, x12, x10, x11, 0xefffefff, -0x1001, 0x10000000, x8, 64, x14)
+
+inst_37:
+// rs2_val == 536870912,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x20000000
+TEST_RR_OP(sub, x12, x10, x11, 0xdfffefff, -0x1001, 0x20000000, x8, 68, x14)
+
+inst_38:
+// rs2_val == 1073741824,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0x40000000
+TEST_RR_OP(sub, x12, x10, x11, 0xc0080000, 0x80000, 0x40000000, x8, 72, x14)
+
+inst_39:
+// rs2_val == -2, rs1_val == 1431655765
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x55555557, 0x55555555, -0x2, x8, 76, x14)
+
+inst_40:
+// rs2_val == -3, rs1_val == -65537
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xffff0002, -0x10001, -0x3, x8, 80, x14)
+
+inst_41:
+// rs2_val == -5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x105, 0x100, -0x5, x8, 84, x14)
+
+inst_42:
+// rs2_val == -9,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:-0x9
+TEST_RR_OP(sub, x12, x10, x11, 0x2000009, 0x2000000, -0x9, x8, 88, x14)
+
+inst_43:
+// rs2_val == -17, rs1_val == 268435456
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:-0x11
+TEST_RR_OP(sub, x12, x10, x11, 0x10000011, 0x10000000, -0x11, x8, 92, x14)
+
+inst_44:
+// rs2_val == -33,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x21
+TEST_RR_OP(sub, x12, x10, x11, 0x23, 0x2, -0x21, x8, 96, x14)
+
+inst_45:
+// rs2_val == -65,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x41
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaeb, -0x55555556, -0x41, x8, 100, x14)
+
+inst_46:
+// rs2_val == -257,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x101
+TEST_RR_OP(sub, x12, x10, x11, 0xb606, 0xb505, -0x101, x8, 104, x14)
+
+inst_47:
+// rs2_val == -513,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x201
+TEST_RR_OP(sub, x12, x10, x11, 0xb706, 0xb505, -0x201, x8, 108, x14)
+
+inst_48:
+// rs2_val == -1025,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3fffffff; op2val:-0x401
+TEST_RR_OP(sub, x12, x10, x11, 0x40000400, 0x3fffffff, -0x401, x8, 112, x14)
+
+inst_49:
+// rs2_val == -2049,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x801
+TEST_RR_OP(sub, x12, x10, x11, 0xffff52fd, -0xb504, -0x801, x8, 116, x14)
+
+inst_50:
+// rs2_val == -4097, rs1_val == -33
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x1001
+TEST_RR_OP(sub, x12, x10, x11, 0xfe0, -0x21, -0x1001, x8, 120, x14)
+
+inst_51:
+// rs2_val == -8193, rs1_val == -1025
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:-0x2001
+TEST_RR_OP(sub, x12, x10, x11, 0x1c00, -0x401, -0x2001, x8, 124, x14)
+
+inst_52:
+// rs2_val == -16385,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x4001
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4000, -0x10001, -0x4001, x8, 128, x14)
+
+inst_53:
+// rs2_val == -32769,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x8001
+TEST_RR_OP(sub, x12, x10, x11, 0x8003, 0x2, -0x8001, x8, 132, x14)
+
+inst_54:
+// rs2_val == -65537, rs1_val == -2049
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:-0x10001
+TEST_RR_OP(sub, x12, x10, x11, 0xf800, -0x801, -0x10001, x8, 136, x14)
+
+inst_55:
+// rs2_val == -131073,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:-0x20001
+TEST_RR_OP(sub, x12, x10, x11, 0xff820000, -0x800001, -0x20001, x8, 140, x14)
+
+inst_56:
+// rs2_val == -262145, rs1_val == -257
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:-0x40001
+TEST_RR_OP(sub, x12, x10, x11, 0x3ff00, -0x101, -0x40001, x8, 144, x14)
+
+inst_57:
+// rs2_val == -524289, rs1_val == -134217729
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x80001
+TEST_RR_OP(sub, x12, x10, x11, 0xf8080000, -0x8000001, -0x80001, x8, 148, x14)
+
+inst_58:
+// rs2_val == -1048577, rs1_val == -4194305
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:-0x100001
+TEST_RR_OP(sub, x12, x10, x11, 0xffd00000, -0x400001, -0x100001, x8, 152, x14)
+
+inst_59:
+// rs2_val == -2097153,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0x200001
+TEST_RR_OP(sub, x12, x10, x11, 0x1ffffe, -0x3, -0x200001, x8, 156, x14)
+
+inst_60:
+// rs2_val == -4194305,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x400001
+TEST_RR_OP(sub, x12, x10, x11, 0xf8400000, -0x8000001, -0x400001, x8, 160, x14)
+
+inst_61:
+// rs2_val == -8388609,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x800001
+TEST_RR_OP(sub, x12, x10, x11, 0xf8800000, -0x8000001, -0x800001, x8, 164, x14)
+
+inst_62:
+// rs2_val == -16777217,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x1000001
+TEST_RR_OP(sub, x12, x10, x11, 0x34333335, 0x33333334, -0x1000001, x8, 168, x14)
+
+inst_63:
+// rs2_val == -33554433,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x2000001
+TEST_RR_OP(sub, x12, x10, x11, 0x57555556, 0x55555555, -0x2000001, x8, 172, x14)
+
+inst_64:
+// rs2_val == -67108865,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x4000001
+TEST_RR_OP(sub, x12, x10, x11, 0x4000004, 0x3, -0x4000001, x8, 176, x14)
+
+inst_65:
+// rs2_val == -134217729,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x8000001
+TEST_RR_OP(sub, x12, x10, x11, 0x3b333335, 0x33333334, -0x8000001, x8, 180, x14)
+
+inst_66:
+// rs2_val == -268435457,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x10000001
+TEST_RR_OP(sub, x12, x10, x11, 0x1000b504, 0xb503, -0x10000001, x8, 184, x14)
+
+inst_67:
+// rs2_val == -536870913,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x20000001
+TEST_RR_OP(sub, x12, x10, x11, 0x20000005, 0x4, -0x20000001, x8, 188, x14)
+
+inst_68:
+// rs2_val == -1073741825,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x40000001
+TEST_RR_OP(sub, x12, x10, x11, 0x40000001, 0x0, -0x40000001, x8, 192, x14)
+
+inst_69:
+// rs2_val == 1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaabab, 0x100, 0x55555555, x8, 196, x14)
+
+inst_70:
+// rs2_val == -1431655766, rs1_val == 262144
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x55595556, 0x40000, -0x55555556, x8, 200, x14)
+
+inst_71:
+// rs1_val == 8,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:-0x1001
+TEST_RR_OP(sub, x12, x10, x11, 0x1009, 0x8, -0x1001, x8, 204, x14)
+
+inst_72:
+// rs1_val == 16,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:-0x40001
+TEST_RR_OP(sub, x12, x10, x11, 0x40011, 0x10, -0x40001, x8, 208, x14)
+
+inst_73:
+// rs1_val == 64,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x55555596, 0x40, -0x55555556, x8, 212, x14)
+
+inst_74:
+// rs1_val == 128,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:-0x2001
+TEST_RR_OP(sub, x12, x10, x11, 0x2081, 0x80, -0x2001, x8, 216, x14)
+
+inst_75:
+// rs1_val == 512,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:-0x8001
+TEST_RR_OP(sub, x12, x10, x11, 0x8201, 0x200, -0x8001, x8, 220, x14)
+
+inst_76:
+// rs1_val == 1024,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x3fd, 0x400, 0x3, x8, 224, x14)
+
+inst_77:
+// rs1_val == 2048,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x200001
+TEST_RR_OP(sub, x12, x10, x11, 0x200801, 0x800, -0x200001, x8, 228, x14)
+
+inst_78:
+// rs1_val == 4096,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x10
+TEST_RR_OP(sub, x12, x10, x11, 0xff0, 0x1000, 0x10, x8, 232, x14)
+
+inst_79:
+// rs1_val == 8192,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0x800000
+TEST_RR_OP(sub, x12, x10, x11, 0xff802000, 0x2000, 0x800000, x8, 236, x14)
+
+inst_80:
+// rs1_val == 16384,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:0x20000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffe4000, 0x4000, 0x20000, x8, 240, x14)
+
+inst_81:
+// rs1_val == 32768,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x1
+TEST_RR_OP(sub, x12, x10, x11, 0x8001, 0x8000, -0x1, x8, 244, x14)
+
+inst_82:
+// rs1_val == 1048576,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0x8
+TEST_RR_OP(sub, x12, x10, x11, 0xffff8, 0x100000, 0x8, x8, 248, x14)
+
+inst_83:
+// rs1_val == 2097152,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:-0x11
+TEST_RR_OP(sub, x12, x10, x11, 0x200011, 0x200000, -0x11, x8, 252, x14)
+
+inst_84:
+// rs1_val == 4194304,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaeaaaab, 0x400000, 0x55555555, x8, 256, x14)
+
+inst_85:
+// rs1_val == 8388608,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:-0x21
+TEST_RR_OP(sub, x12, x10, x11, 0x800021, 0x800000, -0x21, x8, 260, x14)
+
+inst_86:
+// rs1_val == 16777216,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:-0x20001
+TEST_RR_OP(sub, x12, x10, x11, 0x1020001, 0x1000000, -0x20001, x8, 264, x14)
+
+inst_87:
+// rs1_val == 67108864,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x3fffffa, 0x4000000, 0x6, x8, 268, x14)
+
+inst_88:
+// rs1_val == 134217728,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x8
+TEST_RR_OP(sub, x12, x10, x11, 0x7fffff8, 0x8000000, 0x8, x8, 272, x14)
+
+inst_89:
+// rs1_val == 536870912,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:-0x1000001
+TEST_RR_OP(sub, x12, x10, x11, 0x21000001, 0x20000000, -0x1000001, x8, 276, x14)
+
+inst_90:
+// rs1_val == 1073741824,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x3ffffffd, 0x40000000, 0x3, x8, 280, x14)
+
+inst_91:
+// rs1_val == -2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccb, -0x2, 0x33333333, x8, 284, x14)
+
+inst_92:
+// rs1_val == -5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffff6, -0x5, 0x5, x8, 288, x14)
+
+inst_93:
+// rs1_val == -9,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffff7, -0x9, 0x0, x8, 292, x14)
+
+inst_94:
+// rs1_val == -17,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:-0x20001
+TEST_RR_OP(sub, x12, x10, x11, 0x1fff0, -0x11, -0x20001, x8, 296, x14)
+
+inst_95:
+// rs1_val == -129,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x400
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffb7f, -0x81, 0x400, x8, 300, x14)
+
+inst_96:
+// rs1_val == -513,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x800000
+TEST_RR_OP(sub, x12, x10, x11, 0xff7ffdff, -0x201, 0x800000, x8, 304, x14)
+
+inst_97:
+// rs1_val == -8193,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:-0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xffffe001, -0x2001, -0x2, x8, 308, x14)
+
+inst_98:
+// rs1_val == -16385,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x7503, -0x4001, -0xb504, x8, 312, x14)
+
+inst_99:
+// rs1_val == -131073,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:-0x80001
+TEST_RR_OP(sub, x12, x10, x11, 0x60000, -0x20001, -0x80001, x8, 316, x14)
+
+inst_100:
+// rs1_val == -262145,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0x10
+TEST_RR_OP(sub, x12, x10, x11, 0xfffbffef, -0x40001, 0x10, x8, 320, x14)
+
+inst_101:
+// rs1_val == -524289,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xfff8b503, -0x80001, -0xb504, x8, 324, x14)
+
+inst_102:
+// rs1_val == -1048577,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x10
+TEST_RR_OP(sub, x12, x10, x11, 0xffefffef, -0x100001, 0x10, x8, 328, x14)
+
+inst_103:
+// rs1_val == -2097153,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:-0x7
+TEST_RR_OP(sub, x12, x10, x11, 0xffe00006, -0x200001, -0x7, x8, 332, x14)
+
+inst_104:
+// rs1_val == -33554433,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0xcacccccd, -0x2000001, 0x33333332, x8, 336, x14)
+
+inst_105:
+// rs1_val == -1073741825,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0x8ccccccc, -0x40000001, 0x33333333, x8, 340, x14)
+
+inst_106:
+// rs1_val==3 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x3, 0x3, x8, 344, x14)
+
+inst_107:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaae, 0x3, 0x55555555, x8, 348, x14)
+
+inst_108:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x55555559, 0x3, -0x55555556, x8, 352, x14)
+
+inst_109:
+// rs1_val==3 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe, 0x3, 0x5, x8, 356, x14)
+
+inst_110:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccd0, 0x3, 0x33333333, x8, 360, x14)
+
+inst_111:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999d, 0x3, 0x66666666, x8, 364, x14)
+
+inst_112:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xb507, 0x3, -0xb504, x8, 368, x14)
+
+inst_113:
+// rs1_val==3 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4aff, 0x3, 0xb504, x8, 372, x14)
+
+inst_114:
+// rs1_val==3 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x3, 0x2, x8, 376, x14)
+
+inst_115:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaf, 0x3, 0x55555554, x8, 380, x14)
+
+inst_116:
+// rs1_val==3 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x3, 0x3, 0x0, x8, 384, x14)
+
+inst_117:
+// rs1_val==3 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, 0x3, 0x4, x8, 388, x14)
+
+inst_118:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccd1, 0x3, 0x33333332, x8, 392, x14)
+
+inst_119:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999e, 0x3, 0x66666665, x8, 396, x14)
+
+inst_120:
+// rs1_val==3 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4b00, 0x3, 0xb503, x8, 400, x14)
+
+inst_121:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaad, 0x3, 0x55555556, x8, 404, x14)
+
+inst_122:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x55555558, 0x3, -0x55555555, x8, 408, x14)
+
+inst_123:
+// rs1_val==3 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffd, 0x3, 0x6, x8, 412, x14)
+
+inst_124:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccf, 0x3, 0x33333334, x8, 416, x14)
+
+inst_125:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999c, 0x3, 0x66666667, x8, 420, x14)
+
+inst_126:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xb506, 0x3, -0xb503, x8, 424, x14)
+
+inst_127:
+// rs1_val==3 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4afe, 0x3, 0xb505, x8, 428, x14)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x55555552, 0x55555555, 0x3, x8, 432, x14)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x55555555, 0x55555555, x8, 436, x14)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab, 0x55555555, -0x55555556, x8, 440, x14)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x55555550, 0x55555555, 0x5, x8, 444, x14)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0x22222222, 0x55555555, 0x33333333, x8, 448, x14)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeef, 0x55555555, 0x66666666, x8, 452, x14)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x55560a59, 0x55555555, -0xb504, x8, 456, x14)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x5554a051, 0x55555555, 0xb504, x8, 460, x14)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x55555553, 0x55555555, 0x2, x8, 464, x14)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x55555555, 0x55555554, x8, 468, x14)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x55555555, 0x55555555, 0x0, x8, 472, x14)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x55555551, 0x55555555, 0x4, x8, 476, x14)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0x22222223, 0x55555555, 0x33333332, x8, 480, x14)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeef0, 0x55555555, 0x66666665, x8, 484, x14)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x5554a052, 0x55555555, 0xb503, x8, 488, x14)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, 0x55555555, 0x55555556, x8, 492, x14)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaa, 0x55555555, -0x55555555, x8, 496, x14)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x5555554f, 0x55555555, 0x6, x8, 500, x14)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0x22222221, 0x55555555, 0x33333334, x8, 504, x14)
+
+inst_147:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeee, 0x55555555, 0x66666667, x8, 508, x14)
+
+inst_148:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x55560a58, 0x55555555, -0xb503, x8, 512, x14)
+
+inst_149:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0x5554a050, 0x55555555, 0xb505, x8, 516, x14)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa7, -0x55555556, 0x3, x8, 520, x14)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x55555555, -0x55555556, 0x55555555, x8, 524, x14)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x0, -0x55555556, -0x55555556, x8, 528, x14)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa5, -0x55555556, 0x5, x8, 532, x14)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0x77777777, -0x55555556, 0x33333333, x8, 536, x14)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x44444444, -0x55555556, 0x66666666, x8, 540, x14)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xaaab5fae, -0x55555556, -0xb504, x8, 544, x14)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xaaa9f5a6, -0x55555556, 0xb504, x8, 548, x14)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa8, -0x55555556, 0x2, x8, 552, x14)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0x55555556, -0x55555556, 0x55555554, x8, 556, x14)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaa, -0x55555556, 0x0, x8, 560, x14)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa6, -0x55555556, 0x4, x8, 564, x14)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0x77777778, -0x55555556, 0x33333332, x8, 568, x14)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x44444445, -0x55555556, 0x66666665, x8, 572, x14)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xaaa9f5a7, -0x55555556, 0xb503, x8, 576, x14)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554, -0x55555556, 0x55555556, x8, 580, x14)
+
+inst_166:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, -0x55555556, -0x55555555, x8, 584, x14)
+
+inst_167:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa4, -0x55555556, 0x6, x8, 588, x14)
+
+inst_168:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0x77777776, -0x55555556, 0x33333334, x8, 592, x14)
+
+inst_169:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x44444443, -0x55555556, 0x66666667, x8, 596, x14)
+
+inst_170:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xaaab5fad, -0x55555556, -0xb503, x8, 600, x14)
+
+inst_171:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0xaaa9f5a5, -0x55555556, 0xb505, x8, 604, x14)
+
+inst_172:
+// rs1_val==5 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x5, 0x3, x8, 608, x14)
+
+inst_173:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaab0, 0x5, 0x55555555, x8, 612, x14)
+
+inst_174:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555b, 0x5, -0x55555556, x8, 616, x14)
+
+inst_175:
+// rs1_val==5 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x5, 0x5, x8, 620, x14)
+
+inst_176:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccd2, 0x5, 0x33333333, x8, 624, x14)
+
+inst_177:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999f, 0x5, 0x66666666, x8, 628, x14)
+
+inst_178:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xb509, 0x5, -0xb504, x8, 632, x14)
+
+inst_179:
+// rs1_val==5 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4b01, 0x5, 0xb504, x8, 636, x14)
+
+inst_180:
+// rs1_val==5 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x3, 0x5, 0x2, x8, 640, x14)
+
+inst_181:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaab1, 0x5, 0x55555554, x8, 644, x14)
+
+inst_182:
+// rs1_val==5 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x5, 0x5, 0x0, x8, 648, x14)
+
+inst_183:
+// rs1_val==5 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x5, 0x4, x8, 652, x14)
+
+inst_184:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccd3, 0x5, 0x33333332, x8, 656, x14)
+
+inst_185:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x999999a0, 0x5, 0x66666665, x8, 660, x14)
+
+inst_186:
+// rs1_val==5 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4b02, 0x5, 0xb503, x8, 664, x14)
+
+inst_187:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaf, 0x5, 0x55555556, x8, 668, x14)
+
+inst_188:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555a, 0x5, -0x55555555, x8, 672, x14)
+
+inst_189:
+// rs1_val==5 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, 0x5, 0x6, x8, 676, x14)
+
+inst_190:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccd1, 0x5, 0x33333334, x8, 680, x14)
+
+inst_191:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999e, 0x5, 0x66666667, x8, 684, x14)
+
+inst_192:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xb508, 0x5, -0xb503, x8, 688, x14)
+
+inst_193:
+// rs1_val==5 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4b00, 0x5, 0xb505, x8, 692, x14)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x33333330, 0x33333333, 0x3, x8, 696, x14)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xddddddde, 0x33333333, 0x55555555, x8, 700, x14)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x88888889, 0x33333333, -0x55555556, x8, 704, x14)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x3333332e, 0x33333333, 0x5, x8, 708, x14)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x33333333, 0x33333333, x8, 712, x14)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccd, 0x33333333, 0x66666666, x8, 716, x14)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x3333e837, 0x33333333, -0xb504, x8, 720, x14)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x33327e2f, 0x33333333, 0xb504, x8, 724, x14)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x33333331, 0x33333333, 0x2, x8, 728, x14)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xdddddddf, 0x33333333, 0x55555554, x8, 732, x14)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x33333333, 0x33333333, 0x0, x8, 736, x14)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x3333332f, 0x33333333, 0x4, x8, 740, x14)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x33333333, 0x33333332, x8, 744, x14)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccce, 0x33333333, 0x66666665, x8, 748, x14)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x33327e30, 0x33333333, 0xb503, x8, 752, x14)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xdddddddd, 0x33333333, 0x55555556, x8, 756, x14)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x88888888, 0x33333333, -0x55555555, x8, 760, x14)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x3333332d, 0x33333333, 0x6, x8, 764, x14)
+
+inst_212:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, 0x33333333, 0x33333334, x8, 768, x14)
+
+inst_213:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccc, 0x33333333, 0x66666667, x8, 772, x14)
+
+inst_214:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x3333e836, 0x33333333, -0xb503, x8, 776, x14)
+
+inst_215:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0x33327e2e, 0x33333333, 0xb505, x8, 780, x14)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x66666663, 0x66666666, 0x3, x8, 784, x14)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x11111111, 0x66666666, 0x55555555, x8, 788, x14)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xbbbbbbbc, 0x66666666, -0x55555556, x8, 792, x14)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x66666661, 0x66666666, 0x5, x8, 796, x14)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0x33333333, 0x66666666, 0x33333333, x8, 800, x14)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x66666666, 0x66666666, x8, 804, x14)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x66671b6a, 0x66666666, -0xb504, x8, 808, x14)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x6665b162, 0x66666666, 0xb504, x8, 812, x14)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x66666664, 0x66666666, 0x2, x8, 816, x14)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0x11111112, 0x66666666, 0x55555554, x8, 820, x14)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x66666666, 0x66666666, 0x0, x8, 824, x14)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x66666662, 0x66666666, 0x4, x8, 828, x14)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0x33333334, 0x66666666, 0x33333332, x8, 832, x14)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x66666666, 0x66666665, x8, 836, x14)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x6665b163, 0x66666666, 0xb503, x8, 840, x14)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x11111110, 0x66666666, 0x55555556, x8, 844, x14)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xbbbbbbbb, 0x66666666, -0x55555555, x8, 848, x14)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x66666660, 0x66666666, 0x6, x8, 852, x14)
+
+inst_234:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0x33333332, 0x66666666, 0x33333334, x8, 856, x14)
+
+inst_235:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, 0x66666666, 0x66666667, x8, 860, x14)
+
+inst_236:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x66671b69, 0x66666666, -0xb503, x8, 864, x14)
+
+inst_237:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0x6665b161, 0x66666666, 0xb505, x8, 868, x14)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4af9, -0xb504, 0x3, x8, 872, x14)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaa9f5a7, -0xb504, 0x55555555, x8, 876, x14)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x5554a052, -0xb504, -0x55555556, x8, 880, x14)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4af7, -0xb504, 0x5, x8, 884, x14)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccc17c9, -0xb504, 0x33333333, x8, 888, x14)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x9998e496, -0xb504, 0x66666666, x8, 892, x14)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x0, -0xb504, -0xb504, x8, 896, x14)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xfffe95f8, -0xb504, 0xb504, x8, 900, x14)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4afa, -0xb504, 0x2, x8, 904, x14)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaa9f5a8, -0xb504, 0x55555554, x8, 908, x14)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4afc, -0xb504, 0x0, x8, 912, x14)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4af8, -0xb504, 0x4, x8, 916, x14)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0xcccc17ca, -0xb504, 0x33333332, x8, 920, x14)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x9998e497, -0xb504, 0x66666665, x8, 924, x14)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xfffe95f9, -0xb504, 0xb503, x8, 928, x14)
+
+inst_253:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaa9f5a6, -0xb504, 0x55555556, x8, 932, x14)
+
+inst_254:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x5554a051, -0xb504, -0x55555555, x8, 936, x14)
+
+inst_255:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4af6, -0xb504, 0x6, x8, 940, x14)
+
+inst_256:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccc17c8, -0xb504, 0x33333334, x8, 944, x14)
+
+inst_257:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x9998e495, -0xb504, 0x66666667, x8, 948, x14)
+
+inst_258:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, -0xb504, -0xb503, x8, 952, x14)
+
+inst_259:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0xfffe95f7, -0xb504, 0xb505, x8, 956, x14)
+
+inst_260:
+// rs1_val==46340 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xb501, 0xb504, 0x3, x8, 960, x14)
+
+inst_261:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaab5faf, 0xb504, 0x55555555, x8, 964, x14)
+
+inst_262:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x55560a5a, 0xb504, -0x55555556, x8, 968, x14)
+
+inst_263:
+// rs1_val==46340 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xb4ff, 0xb504, 0x5, x8, 972, x14)
+
+inst_264:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccd81d1, 0xb504, 0x33333333, x8, 976, x14)
+
+inst_265:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x999a4e9e, 0xb504, 0x66666666, x8, 980, x14)
+
+inst_266:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x16a08, 0xb504, -0xb504, x8, 984, x14)
+
+inst_267:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0xb504, 0xb504, x8, 988, x14)
+
+inst_268:
+// rs1_val==46340 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xb502, 0xb504, 0x2, x8, 992, x14)
+
+inst_269:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaab5fb0, 0xb504, 0x55555554, x8, 996, x14)
+
+inst_270:
+// rs1_val==46340 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xb504, 0xb504, 0x0, x8, 1000, x14)
+
+inst_271:
+// rs1_val==46340 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xb500, 0xb504, 0x4, x8, 1004, x14)
+
+inst_272:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0xcccd81d2, 0xb504, 0x33333332, x8, 1008, x14)
+
+inst_273:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x999a4e9f, 0xb504, 0x66666665, x8, 1012, x14)
+
+inst_274:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0xb504, 0xb503, x8, 1016, x14)
+
+inst_275:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaab5fae, 0xb504, 0x55555556, x8, 1020, x14)
+
+inst_276:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x55560a59, 0xb504, -0x55555555, x8, 1024, x14)
+
+inst_277:
+// rs1_val==46340 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xb4fe, 0xb504, 0x6, x8, 1028, x14)
+
+inst_278:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccd81d0, 0xb504, 0x33333334, x8, 1032, x14)
+
+inst_279:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x999a4e9d, 0xb504, 0x66666667, x8, 1036, x14)
+
+inst_280:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x16a07, 0xb504, -0xb503, x8, 1040, x14)
+
+inst_281:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, 0xb504, 0xb505, x8, 1044, x14)
+
+inst_282:
+// rs1_val==2 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, 0x2, 0x3, x8, 1048, x14)
+
+inst_283:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaad, 0x2, 0x55555555, x8, 1052, x14)
+
+inst_284:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x55555558, 0x2, -0x55555556, x8, 1056, x14)
+
+inst_285:
+// rs1_val==2 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffd, 0x2, 0x5, x8, 1060, x14)
+
+inst_286:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccf, 0x2, 0x33333333, x8, 1064, x14)
+
+inst_287:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999c, 0x2, 0x66666666, x8, 1068, x14)
+
+inst_288:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xb506, 0x2, -0xb504, x8, 1072, x14)
+
+inst_289:
+// rs1_val==2 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4afe, 0x2, 0xb504, x8, 1076, x14)
+
+inst_290:
+// rs1_val==2 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x2, 0x2, x8, 1080, x14)
+
+inst_291:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaae, 0x2, 0x55555554, x8, 1084, x14)
+
+inst_292:
+// rs1_val==2 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x2, 0x0, x8, 1088, x14)
+
+inst_293:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccd0, 0x2, 0x33333332, x8, 1092, x14)
+
+inst_294:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999d, 0x2, 0x66666665, x8, 1096, x14)
+
+inst_295:
+// rs1_val==2 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4aff, 0x2, 0xb503, x8, 1100, x14)
+
+inst_296:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaac, 0x2, 0x55555556, x8, 1104, x14)
+
+inst_297:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x55555557, 0x2, -0x55555555, x8, 1108, x14)
+
+inst_298:
+// rs1_val==2 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffc, 0x2, 0x6, x8, 1112, x14)
+
+inst_299:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccce, 0x2, 0x33333334, x8, 1116, x14)
+
+inst_300:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999b, 0x2, 0x66666667, x8, 1120, x14)
+
+inst_301:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xb505, 0x2, -0xb503, x8, 1124, x14)
+
+inst_302:
+// rs1_val==2 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4afd, 0x2, 0xb505, x8, 1128, x14)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x55555551, 0x55555554, 0x3, x8, 1132, x14)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, 0x55555554, 0x55555555, x8, 1136, x14)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaa, 0x55555554, -0x55555556, x8, 1140, x14)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x5555554f, 0x55555554, 0x5, x8, 1144, x14)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0x22222221, 0x55555554, 0x33333333, x8, 1148, x14)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeee, 0x55555554, 0x66666666, x8, 1152, x14)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x55560a58, 0x55555554, -0xb504, x8, 1156, x14)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x5554a050, 0x55555554, 0xb504, x8, 1160, x14)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x55555552, 0x55555554, 0x2, x8, 1164, x14)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x55555554, 0x55555554, x8, 1168, x14)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554, 0x55555554, 0x0, x8, 1172, x14)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x55555550, 0x55555554, 0x4, x8, 1176, x14)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0x22222222, 0x55555554, 0x33333332, x8, 1180, x14)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeef, 0x55555554, 0x66666665, x8, 1184, x14)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x5554a051, 0x55555554, 0xb503, x8, 1188, x14)
+
+inst_318:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe, 0x55555554, 0x55555556, x8, 1192, x14)
+
+inst_319:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9, 0x55555554, -0x55555555, x8, 1196, x14)
+
+inst_320:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0x22222220, 0x55555554, 0x33333334, x8, 1200, x14)
+
+inst_321:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeed, 0x55555554, 0x66666667, x8, 1204, x14)
+
+inst_322:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x55560a57, 0x55555554, -0xb503, x8, 1208, x14)
+
+inst_323:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0x5554a04f, 0x55555554, 0xb505, x8, 1212, x14)
+
+inst_324:
+// rs1_val==0 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffd, 0x0, 0x3, x8, 1216, x14)
+
+inst_325:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab, 0x0, 0x55555555, x8, 1220, x14)
+
+inst_326:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x55555556, 0x0, -0x55555556, x8, 1224, x14)
+
+inst_327:
+// rs1_val==0 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffb, 0x0, 0x5, x8, 1228, x14)
+
+inst_328:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccd, 0x0, 0x33333333, x8, 1232, x14)
+
+inst_329:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999a, 0x0, 0x66666666, x8, 1236, x14)
+
+inst_330:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xb504, 0x0, -0xb504, x8, 1240, x14)
+
+inst_331:
+// rs1_val==0 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4afc, 0x0, 0xb504, x8, 1244, x14)
+
+inst_332:
+// rs1_val==0 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe, 0x0, 0x2, x8, 1248, x14)
+
+inst_333:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x0, -0x55555555, -0x55555555, x8, 1252, x14)
+
+inst_334:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa5, -0x55555555, 0x6, x8, 1256, x14)
+
+inst_335:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0x77777777, -0x55555555, 0x33333334, x8, 1260, x14)
+
+inst_336:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x44444444, -0x55555555, 0x66666667, x8, 1264, x14)
+
+inst_337:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xaaab5fae, -0x55555555, -0xb503, x8, 1268, x14)
+
+inst_338:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0xaaa9f5a6, -0x55555555, 0xb505, x8, 1272, x14)
+
+inst_339:
+// rs1_val==6 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x3, 0x6, 0x3, x8, 1276, x14)
+
+inst_340:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaab1, 0x6, 0x55555555, x8, 1280, x14)
+
+inst_341:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555c, 0x6, -0x55555556, x8, 1284, x14)
+
+inst_342:
+// rs1_val==6 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x6, 0x5, x8, 1288, x14)
+
+inst_343:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccd3, 0x6, 0x33333333, x8, 1292, x14)
+
+inst_344:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x999999a0, 0x6, 0x66666666, x8, 1296, x14)
+
+inst_345:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xb50a, 0x6, -0xb504, x8, 1300, x14)
+
+inst_346:
+// rs1_val==6 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4b02, 0x6, 0xb504, x8, 1304, x14)
+
+inst_347:
+// rs1_val==6 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x4, 0x6, 0x2, x8, 1308, x14)
+
+inst_348:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaab2, 0x6, 0x55555554, x8, 1312, x14)
+
+inst_349:
+// rs1_val==6 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x6, 0x6, 0x0, x8, 1316, x14)
+
+inst_350:
+// rs1_val==6 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x6, 0x4, x8, 1320, x14)
+
+inst_351:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccd4, 0x6, 0x33333332, x8, 1324, x14)
+
+inst_352:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x999999a1, 0x6, 0x66666665, x8, 1328, x14)
+
+inst_353:
+// rs1_val==6 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4b03, 0x6, 0xb503, x8, 1332, x14)
+
+inst_354:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaab0, 0x6, 0x55555556, x8, 1336, x14)
+
+inst_355:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555b, 0x6, -0x55555555, x8, 1340, x14)
+
+inst_356:
+// rs1_val==6 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x6, 0x6, x8, 1344, x14)
+
+inst_357:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccd2, 0x6, 0x33333334, x8, 1348, x14)
+
+inst_358:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999f, 0x6, 0x66666667, x8, 1352, x14)
+
+inst_359:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xb509, 0x6, -0xb503, x8, 1356, x14)
+
+inst_360:
+// rs1_val==6 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4b01, 0x6, 0xb505, x8, 1360, x14)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x33333331, 0x33333334, 0x3, x8, 1364, x14)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xdddddddf, 0x33333334, 0x55555555, x8, 1368, x14)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x8888888a, 0x33333334, -0x55555556, x8, 1372, x14)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x3333332f, 0x33333334, 0x5, x8, 1376, x14)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x33333334, 0x33333333, x8, 1380, x14)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccce, 0x33333334, 0x66666666, x8, 1384, x14)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x3333e838, 0x33333334, -0xb504, x8, 1388, x14)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x33327e30, 0x33333334, 0xb504, x8, 1392, x14)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x33333332, 0x33333334, 0x2, x8, 1396, x14)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xdddddde0, 0x33333334, 0x55555554, x8, 1400, x14)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x33333334, 0x33333334, 0x0, x8, 1404, x14)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x33333330, 0x33333334, 0x4, x8, 1408, x14)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x33333334, 0x33333332, x8, 1412, x14)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccf, 0x33333334, 0x66666665, x8, 1416, x14)
+
+inst_375:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x33327e31, 0x33333334, 0xb503, x8, 1420, x14)
+
+inst_376:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xddddddde, 0x33333334, 0x55555556, x8, 1424, x14)
+
+inst_377:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x88888889, 0x33333334, -0x55555555, x8, 1428, x14)
+
+inst_378:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x3333332e, 0x33333334, 0x6, x8, 1432, x14)
+
+inst_379:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x33333334, 0x33333334, x8, 1436, x14)
+
+inst_380:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccd, 0x33333334, 0x66666667, x8, 1440, x14)
+
+inst_381:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x3333e837, 0x33333334, -0xb503, x8, 1444, x14)
+
+inst_382:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0x33327e2f, 0x33333334, 0xb505, x8, 1448, x14)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x66666664, 0x66666667, 0x3, x8, 1452, x14)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x11111112, 0x66666667, 0x55555555, x8, 1456, x14)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xbbbbbbbd, 0x66666667, -0x55555556, x8, 1460, x14)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x66666662, 0x66666667, 0x5, x8, 1464, x14)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0x33333334, 0x66666667, 0x33333333, x8, 1468, x14)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x66666667, 0x66666666, x8, 1472, x14)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x66671b6b, 0x66666667, -0xb504, x8, 1476, x14)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x6665b163, 0x66666667, 0xb504, x8, 1480, x14)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x66666665, 0x66666667, 0x2, x8, 1484, x14)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0x11111113, 0x66666667, 0x55555554, x8, 1488, x14)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x66666667, 0x66666667, 0x0, x8, 1492, x14)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x66666663, 0x66666667, 0x4, x8, 1496, x14)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0x33333335, 0x66666667, 0x33333332, x8, 1500, x14)
+
+inst_396:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x66666667, 0x66666665, x8, 1504, x14)
+
+inst_397:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x6665b164, 0x66666667, 0xb503, x8, 1508, x14)
+
+inst_398:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x11111111, 0x66666667, 0x55555556, x8, 1512, x14)
+
+inst_399:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xbbbbbbbc, 0x66666667, -0x55555555, x8, 1516, x14)
+
+inst_400:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x66666661, 0x66666667, 0x6, x8, 1520, x14)
+
+inst_401:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0x33333333, 0x66666667, 0x33333334, x8, 1524, x14)
+
+inst_402:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x66666667, 0x66666667, x8, 1528, x14)
+
+inst_403:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x66671b6a, 0x66666667, -0xb503, x8, 1532, x14)
+
+inst_404:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0x6665b162, 0x66666667, 0xb505, x8, 1536, x14)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4afa, -0xb503, 0x3, x8, 1540, x14)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaa9f5a8, -0xb503, 0x55555555, x8, 1544, x14)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x5554a053, -0xb503, -0x55555556, x8, 1548, x14)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4af8, -0xb503, 0x5, x8, 1552, x14)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccc17ca, -0xb503, 0x33333333, x8, 1556, x14)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x9998e497, -0xb503, 0x66666666, x8, 1560, x14)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x1, -0xb503, -0xb504, x8, 1564, x14)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xfffe95f9, -0xb503, 0xb504, x8, 1568, x14)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4afb, -0xb503, 0x2, x8, 1572, x14)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaa9f5a9, -0xb503, 0x55555554, x8, 1576, x14)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4afd, -0xb503, 0x0, x8, 1580, x14)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4af9, -0xb503, 0x4, x8, 1584, x14)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0xcccc17cb, -0xb503, 0x33333332, x8, 1588, x14)
+
+inst_418:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x9998e498, -0xb503, 0x66666665, x8, 1592, x14)
+
+inst_419:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xfffe95fa, -0xb503, 0xb503, x8, 1596, x14)
+
+inst_420:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaa9f5a7, -0xb503, 0x55555556, x8, 1600, x14)
+
+inst_421:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x5554a052, -0xb503, -0x55555555, x8, 1604, x14)
+
+inst_422:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4af7, -0xb503, 0x6, x8, 1608, x14)
+
+inst_423:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccc17c9, -0xb503, 0x33333334, x8, 1612, x14)
+
+inst_424:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x9998e496, -0xb503, 0x66666667, x8, 1616, x14)
+
+inst_425:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x0, -0xb503, -0xb503, x8, 1620, x14)
+
+inst_426:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0xfffe95f8, -0xb503, 0xb505, x8, 1624, x14)
+
+inst_427:
+// rs1_val==46341 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xb502, 0xb505, 0x3, x8, 1628, x14)
+
+inst_428:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaab5fb0, 0xb505, 0x55555555, x8, 1632, x14)
+
+inst_429:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x55560a5b, 0xb505, -0x55555556, x8, 1636, x14)
+
+inst_430:
+// rs1_val==46341 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xb500, 0xb505, 0x5, x8, 1640, x14)
+
+inst_431:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccd81d2, 0xb505, 0x33333333, x8, 1644, x14)
+
+inst_432:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x999a4e9f, 0xb505, 0x66666666, x8, 1648, x14)
+
+inst_433:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x16a09, 0xb505, -0xb504, x8, 1652, x14)
+
+inst_434:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0xb505, 0xb504, x8, 1656, x14)
+
+inst_435:
+// rs1_val==46341 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xb503, 0xb505, 0x2, x8, 1660, x14)
+
+inst_436:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaab5fb1, 0xb505, 0x55555554, x8, 1664, x14)
+
+inst_437:
+// rs1_val==46341 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xb505, 0xb505, 0x0, x8, 1668, x14)
+
+inst_438:
+// rs1_val==46341 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xb501, 0xb505, 0x4, x8, 1672, x14)
+
+inst_439:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0xcccd81d3, 0xb505, 0x33333332, x8, 1676, x14)
+
+inst_440:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x999a4ea0, 0xb505, 0x66666665, x8, 1680, x14)
+
+inst_441:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0xb505, 0xb503, x8, 1684, x14)
+
+inst_442:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaab5faf, 0xb505, 0x55555556, x8, 1688, x14)
+
+inst_443:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x55560a5a, 0xb505, -0x55555555, x8, 1692, x14)
+
+inst_444:
+// rs1_val==46341 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xb4ff, 0xb505, 0x6, x8, 1696, x14)
+
+inst_445:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccd81d1, 0xb505, 0x33333334, x8, 1700, x14)
+
+inst_446:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x999a4e9e, 0xb505, 0x66666667, x8, 1704, x14)
+
+inst_447:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x16a08, 0xb505, -0xb503, x8, 1708, x14)
+
+inst_448:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0xb505, 0xb505, x8, 1712, x14)
+
+inst_449:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaac, 0x0, 0x55555554, x8, 1716, x14)
+
+inst_450:
+// rs1_val==0 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x0, 0x0, x8, 1720, x14)
+
+inst_451:
+// rs1_val==0 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffc, 0x0, 0x4, x8, 1724, x14)
+
+inst_452:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccce, 0x0, 0x33333332, x8, 1728, x14)
+
+inst_453:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999b, 0x0, 0x66666665, x8, 1732, x14)
+
+inst_454:
+// rs1_val==0 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4afd, 0x0, 0xb503, x8, 1736, x14)
+
+inst_455:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaa, 0x0, 0x55555556, x8, 1740, x14)
+
+inst_456:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x55555555, 0x0, -0x55555555, x8, 1744, x14)
+
+inst_457:
+// rs1_val==0 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffa, 0x0, 0x6, x8, 1748, x14)
+
+inst_458:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccc, 0x0, 0x33333334, x8, 1752, x14)
+
+inst_459:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x99999999, 0x0, 0x66666667, x8, 1756, x14)
+
+inst_460:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xb503, 0x0, -0xb503, x8, 1760, x14)
+
+inst_461:
+// rs1_val==0 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4afb, 0x0, 0xb505, x8, 1764, x14)
+
+inst_462:
+// rs1_val==4 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x4, 0x3, x8, 1768, x14)
+
+inst_463:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaf, 0x4, 0x55555555, x8, 1772, x14)
+
+inst_464:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555a, 0x4, -0x55555556, x8, 1776, x14)
+
+inst_465:
+// rs1_val==4 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, 0x4, 0x5, x8, 1780, x14)
+
+inst_466:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccd1, 0x4, 0x33333333, x8, 1784, x14)
+
+inst_467:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999e, 0x4, 0x66666666, x8, 1788, x14)
+
+inst_468:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xb508, 0x4, -0xb504, x8, 1792, x14)
+
+inst_469:
+// rs1_val==4 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4b00, 0x4, 0xb504, x8, 1796, x14)
+
+inst_470:
+// rs1_val==4 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x4, 0x2, x8, 1800, x14)
+
+inst_471:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaab0, 0x4, 0x55555554, x8, 1804, x14)
+
+inst_472:
+// rs1_val==4 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x4, 0x4, 0x0, x8, 1808, x14)
+
+inst_473:
+// rs1_val==4 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x4, 0x4, x8, 1812, x14)
+
+inst_474:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccd2, 0x4, 0x33333332, x8, 1816, x14)
+
+inst_475:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999f, 0x4, 0x66666665, x8, 1820, x14)
+
+inst_476:
+// rs1_val==4 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4b01, 0x4, 0xb503, x8, 1824, x14)
+
+inst_477:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaae, 0x4, 0x55555556, x8, 1828, x14)
+
+inst_478:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x55555559, 0x4, -0x55555555, x8, 1832, x14)
+
+inst_479:
+// rs1_val==4 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe, 0x4, 0x6, x8, 1836, x14)
+
+inst_480:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccd0, 0x4, 0x33333334, x8, 1840, x14)
+
+inst_481:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999d, 0x4, 0x66666667, x8, 1844, x14)
+
+inst_482:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xb507, 0x4, -0xb503, x8, 1848, x14)
+
+inst_483:
+// rs1_val==4 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0xffff4aff, 0x4, 0xb505, x8, 1852, x14)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x3333332f, 0x33333332, 0x3, x8, 1856, x14)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xdddddddd, 0x33333332, 0x55555555, x8, 1860, x14)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x88888888, 0x33333332, -0x55555556, x8, 1864, x14)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x3333332d, 0x33333332, 0x5, x8, 1868, x14)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, 0x33333332, 0x33333333, x8, 1872, x14)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccc, 0x33333332, 0x66666666, x8, 1876, x14)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x3333e836, 0x33333332, -0xb504, x8, 1880, x14)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x33327e2e, 0x33333332, 0xb504, x8, 1884, x14)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x33333330, 0x33333332, 0x2, x8, 1888, x14)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xddddddde, 0x33333332, 0x55555554, x8, 1892, x14)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x33333332, 0x33333332, 0x0, x8, 1896, x14)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x3333332e, 0x33333332, 0x4, x8, 1900, x14)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x33333332, 0x33333332, x8, 1904, x14)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccd, 0x33333332, 0x66666665, x8, 1908, x14)
+
+inst_498:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x33327e2f, 0x33333332, 0xb503, x8, 1912, x14)
+
+inst_499:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xdddddddc, 0x33333332, 0x55555556, x8, 1916, x14)
+
+inst_500:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x88888887, 0x33333332, -0x55555555, x8, 1920, x14)
+
+inst_501:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x3333332c, 0x33333332, 0x6, x8, 1924, x14)
+
+inst_502:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe, 0x33333332, 0x33333334, x8, 1928, x14)
+
+inst_503:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccb, 0x33333332, 0x66666667, x8, 1932, x14)
+
+inst_504:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x3333e835, 0x33333332, -0xb503, x8, 1936, x14)
+
+inst_505:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0x33327e2d, 0x33333332, 0xb505, x8, 1940, x14)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x66666662, 0x66666665, 0x3, x8, 1944, x14)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x11111110, 0x66666665, 0x55555555, x8, 1948, x14)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xbbbbbbbb, 0x66666665, -0x55555556, x8, 1952, x14)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x66666660, 0x66666665, 0x5, x8, 1956, x14)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0x33333332, 0x66666665, 0x33333333, x8, 1960, x14)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, 0x66666665, 0x66666666, x8, 1964, x14)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x66671b69, 0x66666665, -0xb504, x8, 1968, x14)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x6665b161, 0x66666665, 0xb504, x8, 1972, x14)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x66666663, 0x66666665, 0x2, x8, 1976, x14)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0x11111111, 0x66666665, 0x55555554, x8, 1980, x14)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x66666665, 0x66666665, 0x0, x8, 1984, x14)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x66666661, 0x66666665, 0x4, x8, 1988, x14)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0x33333333, 0x66666665, 0x33333332, x8, 1992, x14)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x66666665, 0x66666665, x8, 1996, x14)
+
+inst_520:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x6665b162, 0x66666665, 0xb503, x8, 2000, x14)
+
+inst_521:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x1111110f, 0x66666665, 0x55555556, x8, 2004, x14)
+
+inst_522:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xbbbbbbba, 0x66666665, -0x55555555, x8, 2008, x14)
+
+inst_523:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x6666665f, 0x66666665, 0x6, x8, 2012, x14)
+
+inst_524:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0x33333331, 0x66666665, 0x33333334, x8, 2016, x14)
+
+inst_525:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe, 0x66666665, 0x66666667, x8, 2020, x14)
+
+inst_526:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x66671b68, 0x66666665, -0xb503, x8, 2024, x14)
+
+inst_527:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0x6665b160, 0x66666665, 0xb505, x8, 2028, x14)
+
+inst_528:
+// rs1_val==46339 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xb500, 0xb503, 0x3, x8, 2032, x14)
+
+inst_529:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaab5fae, 0xb503, 0x55555555, x8, 2036, x14)
+
+inst_530:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x55560a59, 0xb503, -0x55555556, x8, 2040, x14)
+
+inst_531:
+// rs1_val==46339 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xb4fe, 0xb503, 0x5, x8, 2044, x14)
+RVTEST_SIGBASE( x8,signature_x8_1)
+
+inst_532:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccd81d0, 0xb503, 0x33333333, x8, 0, x14)
+
+inst_533:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x999a4e9d, 0xb503, 0x66666666, x8, 4, x14)
+
+inst_534:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x16a07, 0xb503, -0xb504, x8, 8, x14)
+
+inst_535:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff, 0xb503, 0xb504, x8, 12, x14)
+
+inst_536:
+// rs1_val==46339 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xb501, 0xb503, 0x2, x8, 16, x14)
+
+inst_537:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaab5faf, 0xb503, 0x55555554, x8, 20, x14)
+
+inst_538:
+// rs1_val==46339 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xb503, 0xb503, 0x0, x8, 24, x14)
+
+inst_539:
+// rs1_val==46339 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xb4ff, 0xb503, 0x4, x8, 28, x14)
+
+inst_540:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0xcccd81d1, 0xb503, 0x33333332, x8, 32, x14)
+
+inst_541:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x999a4e9e, 0xb503, 0x66666665, x8, 36, x14)
+
+inst_542:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0xb503, 0xb503, x8, 40, x14)
+
+inst_543:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaab5fad, 0xb503, 0x55555556, x8, 44, x14)
+
+inst_544:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x55560a58, 0xb503, -0x55555555, x8, 48, x14)
+
+inst_545:
+// rs1_val==46339 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xb4fd, 0xb503, 0x6, x8, 52, x14)
+
+inst_546:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccd81cf, 0xb503, 0x33333334, x8, 56, x14)
+
+inst_547:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0x999a4e9c, 0xb503, 0x66666667, x8, 60, x14)
+
+inst_548:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x16a06, 0xb503, -0xb503, x8, 64, x14)
+
+inst_549:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe, 0xb503, 0xb505, x8, 68, x14)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x55555553, 0x55555556, 0x3, x8, 72, x14)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x55555556, 0x55555555, x8, 76, x14)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaac, 0x55555556, -0x55555556, x8, 80, x14)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x55555551, 0x55555556, 0x5, x8, 84, x14)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0x22222223, 0x55555556, 0x33333333, x8, 88, x14)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeef0, 0x55555556, 0x66666666, x8, 92, x14)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x55560a5a, 0x55555556, -0xb504, x8, 96, x14)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0x5554a052, 0x55555556, 0xb504, x8, 100, x14)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554, 0x55555556, 0x2, x8, 104, x14)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x55555556, 0x55555554, x8, 108, x14)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x55555556, 0x55555556, 0x0, x8, 112, x14)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x55555552, 0x55555556, 0x4, x8, 116, x14)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0x22222224, 0x55555556, 0x33333332, x8, 120, x14)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeef1, 0x55555556, 0x66666665, x8, 124, x14)
+
+inst_564:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x5554a053, 0x55555556, 0xb503, x8, 128, x14)
+
+inst_565:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x55555556, 0x55555556, x8, 132, x14)
+
+inst_566:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab, 0x55555556, -0x55555555, x8, 136, x14)
+
+inst_567:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x55555550, 0x55555556, 0x6, x8, 140, x14)
+
+inst_568:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(sub, x12, x10, x11, 0x22222222, 0x55555556, 0x33333334, x8, 144, x14)
+
+inst_569:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeef, 0x55555556, 0x66666667, x8, 148, x14)
+
+inst_570:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0x55560a59, 0x55555556, -0xb503, x8, 152, x14)
+
+inst_571:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(sub, x12, x10, x11, 0x5554a051, 0x55555556, 0xb505, x8, 156, x14)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa8, -0x55555555, 0x3, x8, 160, x14)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555555
+TEST_RR_OP(sub, x12, x10, x11, 0x55555556, -0x55555555, 0x55555555, x8, 164, x14)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x1, -0x55555555, -0x55555556, x8, 168, x14)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa6, -0x55555555, 0x5, x8, 172, x14)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333333
+TEST_RR_OP(sub, x12, x10, x11, 0x77777778, -0x55555555, 0x33333333, x8, 176, x14)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666666
+TEST_RR_OP(sub, x12, x10, x11, 0x44444445, -0x55555555, 0x66666666, x8, 180, x14)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xaaab5faf, -0x55555555, -0xb504, x8, 184, x14)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb504
+TEST_RR_OP(sub, x12, x10, x11, 0xaaa9f5a7, -0x55555555, 0xb504, x8, 188, x14)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9, -0x55555555, 0x2, x8, 192, x14)
+
+inst_581:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555554
+TEST_RR_OP(sub, x12, x10, x11, 0x55555557, -0x55555555, 0x55555554, x8, 196, x14)
+
+inst_582:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab, -0x55555555, 0x0, x8, 200, x14)
+
+inst_583:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa7, -0x55555555, 0x4, x8, 204, x14)
+
+inst_584:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333332
+TEST_RR_OP(sub, x12, x10, x11, 0x77777779, -0x55555555, 0x33333332, x8, 208, x14)
+
+inst_585:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666665
+TEST_RR_OP(sub, x12, x10, x11, 0x44444446, -0x55555555, 0x66666665, x8, 212, x14)
+
+inst_586:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb503
+TEST_RR_OP(sub, x12, x10, x11, 0xaaa9f5a8, -0x55555555, 0xb503, x8, 216, x14)
+
+inst_587:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555556
+TEST_RR_OP(sub, x12, x10, x11, 0x55555555, -0x55555555, 0x55555556, x8, 220, x14)
+
+inst_588:
+// rs1_val < 0 and rs2_val < 0, rs2_val == -129
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x7; op2val:-0x81
+TEST_RR_OP(sub, x12, x10, x11, 0x7a, -0x7, -0x81, x8, 224, x14)
+
+inst_589:
+// rs2_val == 0, rs1_val == 32
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x20, 0x20, 0x0, x8, 228, x14)
+
+inst_590:
+// rs2_val == 128,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x9; op2val:0x80
+TEST_RR_OP(sub, x12, x10, x11, 0xffffff89, 0x9, 0x80, x8, 232, x14)
+
+inst_591:
+// rs2_val == 2048,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000; op2val:0x800
+TEST_RR_OP(sub, x12, x10, x11, 0x7ffff800, -0x80000000, 0x800, x8, 236, x14)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+
+signature_x8_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x8_1:
+ .fill 60*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/sw-align-01.S b/riscof/suite/rv32i_m/I/sw-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..c853a95308cdec3524da160710b8cc5cd5dd0391
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/sw-align-01.S
@@ -0,0 +1,414 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sw instruction of the RISC-V I extension for the sw-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sw-align)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rs1 != rs2, rs1==x15, rs2==x30, rs2_val == (-2**(xlen-1)), imm_val > 0, rs2_val == -2147483648, ea_align == 0 and (imm_val % 4) == 0
+// opcode: sw; op1:x15; op2:x30; op2val:-0x80000000; immval:0x80; align:0
+TEST_STORE(x2,x5,0,x15,x30,-0x80000000,0x80,0,sw,0)
+
+inst_1:
+// rs1==x12, rs2==x19, rs2_val == 0, imm_val < 0, ea_align == 0 and (imm_val % 4) == 3
+// opcode: sw; op1:x12; op2:x19; op2val:0x0; immval:-0x81; align:0
+TEST_STORE(x2,x5,0,x12,x19,0x0,-0x81,4,sw,0)
+
+inst_2:
+// rs1==x29, rs2==x26, rs2_val == (2**(xlen-1)-1), rs2_val == 2147483647
+// opcode: sw; op1:x29; op2:x26; op2val:0x7fffffff; immval:0x3ff; align:0
+TEST_STORE(x2,x5,0,x29,x26,0x7fffffff,0x3ff,8,sw,0)
+
+inst_3:
+// rs1==x1, rs2==x0, rs2_val == 1, ea_align == 0 and (imm_val % 4) == 1
+// opcode: sw; op1:x1; op2:x0; op2val:0x0; immval:0x555; align:0
+TEST_STORE(x2,x5,0,x1,x0,0x0,0x555,12,sw,0)
+
+inst_4:
+// rs1==x28, rs2==x22, ea_align == 0 and (imm_val % 4) == 2, rs2_val == 32768
+// opcode: sw; op1:x28; op2:x22; op2val:0x8000; immval:-0x2; align:0
+TEST_STORE(x2,x5,0,x28,x22,0x8000,-0x2,16,sw,0)
+
+inst_5:
+// rs1==x18, rs2==x16, imm_val == 0, rs2_val == -17
+// opcode: sw; op1:x18; op2:x16; op2val:-0x11; immval:0x0; align:0
+TEST_STORE(x2,x5,0,x18,x16,-0x11,0x0,20,sw,0)
+
+inst_6:
+// rs1==x27, rs2==x20, rs2_val == 2,
+// opcode: sw; op1:x27; op2:x20; op2val:0x2; immval:0x9; align:0
+TEST_STORE(x2,x5,0,x27,x20,0x2,0x9,24,sw,0)
+
+inst_7:
+// rs1==x23, rs2==x18, rs2_val == 4,
+// opcode: sw; op1:x23; op2:x18; op2val:0x4; immval:-0x401; align:0
+TEST_STORE(x2,x5,0,x23,x18,0x4,-0x401,28,sw,0)
+
+inst_8:
+// rs1==x16, rs2==x31, rs2_val == 8,
+// opcode: sw; op1:x16; op2:x31; op2val:0x8; immval:0x4; align:0
+TEST_STORE(x2,x5,0,x16,x31,0x8,0x4,32,sw,0)
+
+inst_9:
+// rs1==x3, rs2==x21, rs2_val == 16,
+// opcode: sw; op1:x3; op2:x21; op2val:0x10; immval:0x7; align:0
+TEST_STORE(x2,x5,0,x3,x21,0x10,0x7,36,sw,0)
+
+inst_10:
+// rs1==x9, rs2==x23, rs2_val == 32,
+// opcode: sw; op1:x9; op2:x23; op2val:0x20; immval:0x5; align:0
+TEST_STORE(x2,x5,0,x9,x23,0x20,0x5,40,sw,0)
+
+inst_11:
+// rs1==x8, rs2==x29, rs2_val == 64,
+// opcode: sw; op1:x8; op2:x29; op2val:0x40; immval:-0x81; align:0
+TEST_STORE(x2,x5,0,x8,x29,0x40,-0x81,44,sw,0)
+
+inst_12:
+// rs1==x4, rs2==x13, rs2_val == 128,
+// opcode: sw; op1:x4; op2:x13; op2val:0x80; immval:-0x9; align:0
+TEST_STORE(x2,x5,0,x4,x13,0x80,-0x9,48,sw,0)
+
+inst_13:
+// rs1==x31, rs2==x15, rs2_val == 256,
+// opcode: sw; op1:x31; op2:x15; op2val:0x100; immval:-0x2; align:0
+TEST_STORE(x2,x5,0,x31,x15,0x100,-0x2,52,sw,0)
+
+inst_14:
+// rs1==x17, rs2==x12, rs2_val == 512,
+// opcode: sw; op1:x17; op2:x12; op2val:0x200; immval:-0x201; align:0
+TEST_STORE(x2,x5,0,x17,x12,0x200,-0x201,56,sw,0)
+
+inst_15:
+// rs1==x7, rs2==x10, rs2_val == 1024,
+// opcode: sw; op1:x7; op2:x10; op2val:0x400; immval:0x80; align:0
+TEST_STORE(x2,x5,0,x7,x10,0x400,0x80,60,sw,0)
+
+inst_16:
+// rs1==x14, rs2==x25, rs2_val == 2048,
+// opcode: sw; op1:x14; op2:x25; op2val:0x800; immval:-0x2; align:0
+TEST_STORE(x2,x5,0,x14,x25,0x800,-0x2,64,sw,0)
+
+inst_17:
+// rs1==x22, rs2==x24, rs2_val == 4096,
+// opcode: sw; op1:x22; op2:x24; op2val:0x1000; immval:-0x3; align:0
+TEST_STORE(x2,x5,0,x22,x24,0x1000,-0x3,68,sw,0)
+
+inst_18:
+// rs1==x24, rs2==x5, rs2_val == 8192,
+// opcode: sw; op1:x24; op2:x5; op2val:0x2000; immval:0x400; align:0
+TEST_STORE(x2,x15,0,x24,x5,0x2000,0x400,72,sw,0)
+RVTEST_SIGBASE( x12,signature_x12_0)
+
+inst_19:
+// rs1==x13, rs2==x1, rs2_val == 16384,
+// opcode: sw; op1:x13; op2:x1; op2val:0x4000; immval:-0x201; align:0
+TEST_STORE(x12,x15,0,x13,x1,0x4000,-0x201,0,sw,0)
+
+inst_20:
+// rs1==x11, rs2==x9, rs2_val == 65536,
+// opcode: sw; op1:x11; op2:x9; op2val:0x10000; immval:-0x5; align:0
+TEST_STORE(x12,x15,0,x11,x9,0x10000,-0x5,4,sw,0)
+
+inst_21:
+// rs1==x21, rs2==x2, rs2_val == 131072,
+// opcode: sw; op1:x21; op2:x2; op2val:0x20000; immval:0x7; align:0
+TEST_STORE(x12,x15,0,x21,x2,0x20000,0x7,8,sw,0)
+
+inst_22:
+// rs1==x19, rs2==x28, rs2_val == 262144,
+// opcode: sw; op1:x19; op2:x28; op2val:0x40000; immval:-0x9; align:0
+TEST_STORE(x12,x15,0,x19,x28,0x40000,-0x9,12,sw,0)
+
+inst_23:
+// rs1==x6, rs2==x8, rs2_val == 524288,
+// opcode: sw; op1:x6; op2:x8; op2val:0x80000; immval:0x2; align:0
+TEST_STORE(x12,x15,0,x6,x8,0x80000,0x2,16,sw,0)
+
+inst_24:
+// rs1==x25, rs2==x7, rs2_val == 1048576,
+// opcode: sw; op1:x25; op2:x7; op2val:0x100000; immval:-0x101; align:0
+TEST_STORE(x12,x15,0,x25,x7,0x100000,-0x101,20,sw,0)
+
+inst_25:
+// rs1==x10, rs2==x6, rs2_val == 2097152,
+// opcode: sw; op1:x10; op2:x6; op2val:0x200000; immval:0x4; align:0
+TEST_STORE(x12,x15,0,x10,x6,0x200000,0x4,24,sw,0)
+
+inst_26:
+// rs1==x30, rs2==x14, rs2_val == 4194304,
+// opcode: sw; op1:x30; op2:x14; op2val:0x400000; immval:-0x3; align:0
+TEST_STORE(x12,x15,0,x30,x14,0x400000,-0x3,28,sw,0)
+
+inst_27:
+// rs1==x26, rs2==x4, rs2_val == 8388608,
+// opcode: sw; op1:x26; op2:x4; op2val:0x800000; immval:0x1; align:0
+TEST_STORE(x12,x15,0,x26,x4,0x800000,0x1,32,sw,0)
+
+inst_28:
+// rs1==x2, rs2==x17, rs2_val == 16777216,
+// opcode: sw; op1:x2; op2:x17; op2val:0x1000000; immval:0x20; align:0
+TEST_STORE(x12,x15,0,x2,x17,0x1000000,0x20,36,sw,0)
+
+inst_29:
+// rs1==x20, rs2==x11, rs2_val == 33554432,
+// opcode: sw; op1:x20; op2:x11; op2val:0x2000000; immval:-0x7; align:0
+TEST_STORE(x12,x15,0,x20,x11,0x2000000,-0x7,40,sw,0)
+
+inst_30:
+// rs1==x5, rs2==x27, rs2_val == 67108864,
+// opcode: sw; op1:x5; op2:x27; op2val:0x4000000; immval:-0x556; align:0
+TEST_STORE(x12,x15,0,x5,x27,0x4000000,-0x556,44,sw,0)
+
+inst_31:
+// rs2==x3, rs2_val == 134217728,
+// opcode: sw; op1:x28; op2:x3; op2val:0x8000000; immval:0x5; align:0
+TEST_STORE(x12,x15,0,x28,x3,0x8000000,0x5,48,sw,0)
+
+inst_32:
+// rs2_val == 268435456,
+// opcode: sw; op1:x10; op2:x11; op2val:0x10000000; immval:-0x11; align:0
+TEST_STORE(x12,x15,0,x10,x11,0x10000000,-0x11,52,sw,0)
+
+inst_33:
+// rs2_val == 536870912,
+// opcode: sw; op1:x10; op2:x11; op2val:0x20000000; immval:0x3ff; align:0
+TEST_STORE(x12,x15,0,x10,x11,0x20000000,0x3ff,56,sw,0)
+
+inst_34:
+// rs2_val == 1073741824,
+// opcode: sw; op1:x10; op2:x11; op2val:0x40000000; immval:-0x8; align:0
+TEST_STORE(x12,x15,0,x10,x11,0x40000000,-0x8,60,sw,0)
+
+inst_35:
+// rs2_val == -2,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x2; immval:0x6; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x2,0x6,64,sw,0)
+
+inst_36:
+// rs2_val == -4194305,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x400001; immval:0x200; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x400001,0x200,68,sw,0)
+
+inst_37:
+// rs2_val == -8388609,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x800001; immval:-0x11; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x800001,-0x11,72,sw,0)
+
+inst_38:
+// rs2_val == -16777217,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x1000001; immval:0x4; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x1000001,0x4,76,sw,0)
+
+inst_39:
+// rs2_val == -33554433,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x2000001; immval:0x10; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x2000001,0x10,80,sw,0)
+
+inst_40:
+// rs2_val == -67108865,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x4000001; immval:-0x4; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x4000001,-0x4,84,sw,0)
+
+inst_41:
+// rs2_val == -134217729,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x8000001; immval:0x80; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x8000001,0x80,88,sw,0)
+
+inst_42:
+// rs2_val == -268435457,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x10000001; immval:-0x9; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x10000001,-0x9,92,sw,0)
+
+inst_43:
+// rs2_val == -536870913,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x20000001; immval:0x3; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x20000001,0x3,96,sw,0)
+
+inst_44:
+// rs2_val == -1073741825,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x40000001; immval:0x400; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x40000001,0x400,100,sw,0)
+
+inst_45:
+// rs2_val == 1431655765,
+// opcode: sw; op1:x10; op2:x11; op2val:0x55555555; immval:0x7; align:0
+TEST_STORE(x12,x15,0,x10,x11,0x55555555,0x7,104,sw,0)
+
+inst_46:
+// rs2_val == -1431655766,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x55555556; immval:0x7; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x55555556,0x7,108,sw,0)
+
+inst_47:
+// rs2_val == -3,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x3; immval:0x40; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x3,0x40,112,sw,0)
+
+inst_48:
+// rs2_val == -5,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x5; immval:0x7ff; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x5,0x7ff,116,sw,0)
+
+inst_49:
+// rs2_val == -9,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x9; immval:0x200; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x9,0x200,120,sw,0)
+
+inst_50:
+// rs2_val == -33,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x21; immval:-0x800; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x21,-0x800,124,sw,0)
+
+inst_51:
+// rs2_val == -65,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x41; immval:-0x2; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x41,-0x2,128,sw,0)
+
+inst_52:
+// rs2_val == -129,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x81; immval:-0x8; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x81,-0x8,132,sw,0)
+
+inst_53:
+// rs2_val == -257,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x101; immval:-0x101; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x101,-0x101,136,sw,0)
+
+inst_54:
+// rs2_val == -513,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x201; immval:-0x556; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x201,-0x556,140,sw,0)
+
+inst_55:
+// rs2_val == -1025,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x401; immval:-0x556; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x401,-0x556,144,sw,0)
+
+inst_56:
+// rs2_val == -2049,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x801; immval:0x5; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x801,0x5,148,sw,0)
+
+inst_57:
+// rs2_val == -4097,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x1001; immval:-0x3; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x1001,-0x3,152,sw,0)
+
+inst_58:
+// rs2_val == -8193,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x2001; immval:-0x11; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x2001,-0x11,156,sw,0)
+
+inst_59:
+// rs2_val == -16385,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x4001; immval:0x6; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x4001,0x6,160,sw,0)
+
+inst_60:
+// rs2_val == -32769,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x8001; immval:-0x41; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x8001,-0x41,164,sw,0)
+
+inst_61:
+// rs2_val == -65537,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x10001; immval:-0x9; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x10001,-0x9,168,sw,0)
+
+inst_62:
+// rs2_val == -131073,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x20001; immval:-0x1; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x20001,-0x1,172,sw,0)
+
+inst_63:
+// rs2_val == -262145,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x40001; immval:0x400; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x40001,0x400,176,sw,0)
+
+inst_64:
+// rs2_val == -524289,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x80001; immval:0x9; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x80001,0x9,180,sw,0)
+
+inst_65:
+// rs2_val == -1048577,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x100001; immval:0x1; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x100001,0x1,184,sw,0)
+
+inst_66:
+// rs2_val == -2097153,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x200001; immval:0x20; align:0
+TEST_STORE(x12,x15,0,x10,x11,-0x200001,0x20,188,sw,0)
+
+inst_67:
+// rs2_val == 1, ea_align == 0 and (imm_val % 4) == 1
+// opcode: sw; op1:x10; op2:x11; op2val:0x1; immval:0x555; align:0
+TEST_STORE(x12,x15,0,x10,x11,0x1,0x555,192,sw,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 19*(XLEN/32),4,0xdeadbeef
+
+
+signature_x12_0:
+ .fill 49*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/xor-01.S b/riscof/suite/rv32i_m/I/xor-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..4bf6cae066efe37093e4d2e60e797ed8d1d78aa4
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/xor-01.S
@@ -0,0 +1,3019 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the xor instruction of the RISC-V I extension for the xor covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",xor)
+
+RVTEST_SIGBASE( x7,signature_x7_1)
+
+inst_0:
+// rs2 == rd != rs1, rs1==x27, rs2==x24, rd==x24, rs1_val > 0 and rs2_val > 0, rs1_val != rs2_val, rs1_val==1717986917 and rs2_val==3
+// opcode: xor ; op1:x27; op2:x24; dest:x24; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(xor, x24, x27, x24, 0x66666666, 0x66666665, 0x3, x7, 0, x20)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x13, rs2==x13, rd==x10, rs1_val > 0 and rs2_val < 0,
+// opcode: xor ; op1:x13; op2:x13; dest:x10; op1val:0x5; op2val:0x5
+TEST_RR_OP(xor, x10, x13, x13, 0x0, 0x5, 0x5, x7, 4, x20)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x23, rs2==x23, rd==x23, rs1_val < 0 and rs2_val < 0, rs1_val == -16385, rs2_val == -65537
+// opcode: xor ; op1:x23; op2:x23; dest:x23; op1val:-0x4001; op2val:-0x4001
+TEST_RR_OP(xor, x23, x23, x23, 0x0, -0x4001, -0x4001, x7, 8, x20)
+
+inst_3:
+// rs1 == rd != rs2, rs1==x28, rs2==x14, rd==x28, rs1_val < 0 and rs2_val > 0, rs2_val == 8, rs1_val == -65
+// opcode: xor ; op1:x28; op2:x14; dest:x28; op1val:-0x41; op2val:0x8
+TEST_RR_OP(xor, x28, x28, x14, 0xffffffb7, -0x41, 0x8, x7, 12, x20)
+
+inst_4:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x1, rs2==x2, rd==x18, rs1_val == rs2_val,
+// opcode: xor ; op1:x1; op2:x2; dest:x18; op1val:-0x1; op2val:-0x1
+TEST_RR_OP(xor, x18, x1, x2, 0x0, -0x1, -0x1, x7, 16, x20)
+
+inst_5:
+// rs1==x5, rs2==x22, rd==x19, rs2_val == (-2**(xlen-1)), rs1_val == 4194304, rs2_val == -2147483648
+// opcode: xor ; op1:x5; op2:x22; dest:x19; op1val:0x400000; op2val:-0x80000000
+TEST_RR_OP(xor, x19, x5, x22, 0x80400000, 0x400000, -0x80000000, x7, 20, x20)
+
+inst_6:
+// rs1==x26, rs2==x12, rd==x13, rs2_val == 0, rs1_val == -17
+// opcode: xor ; op1:x26; op2:x12; dest:x13; op1val:-0x11; op2val:0x0
+TEST_RR_OP(xor, x13, x26, x12, 0xffffffef, -0x11, 0x0, x7, 24, x20)
+
+inst_7:
+// rs1==x12, rs2==x11, rd==x4, rs2_val == (2**(xlen-1)-1), rs2_val == 2147483647, rs1_val == -1431655766
+// opcode: xor ; op1:x12; op2:x11; dest:x4; op1val:-0x55555556; op2val:0x7fffffff
+TEST_RR_OP(xor, x4, x12, x11, 0xd5555555, -0x55555556, 0x7fffffff, x7, 28, x20)
+
+inst_8:
+// rs1==x19, rs2==x30, rd==x17, rs2_val == 1, rs1_val == 1
+// opcode: xor ; op1:x19; op2:x30; dest:x17; op1val:0x1; op2val:0x1
+TEST_RR_OP(xor, x17, x19, x30, 0x0, 0x1, 0x1, x7, 32, x20)
+
+inst_9:
+// rs1==x11, rs2==x1, rd==x3, rs1_val == (-2**(xlen-1)), rs2_val == -268435457, rs1_val == -2147483648
+// opcode: xor ; op1:x11; op2:x1; dest:x3; op1val:-0x80000000; op2val:-0x10000001
+TEST_RR_OP(xor, x3, x11, x1, 0x6fffffff, -0x80000000, -0x10000001, x7, 36, x20)
+
+inst_10:
+// rs1==x24, rs2==x29, rd==x8, rs1_val == 0, rs1_val==0 and rs2_val==-46340
+// opcode: xor ; op1:x24; op2:x29; dest:x8; op1val:0x0; op2val:-0xb504
+TEST_RR_OP(xor, x8, x24, x29, 0xffff4afc, 0x0, -0xb504, x7, 40, x20)
+
+inst_11:
+// rs1==x0, rs2==x18, rd==x9, rs1_val == (2**(xlen-1)-1), rs2_val == 4096, rs1_val == 2147483647
+// opcode: xor ; op1:x0; op2:x18; dest:x9; op1val:0x0; op2val:0x1000
+TEST_RR_OP(xor, x9, x0, x18, 0x1000, 0x0, 0x1000, x7, 44, x20)
+
+inst_12:
+// rs1==x10, rs2==x6, rd==x26, rs2_val == 2, rs1_val == 524288
+// opcode: xor ; op1:x10; op2:x6; dest:x26; op1val:0x80000; op2val:0x2
+TEST_RR_OP(xor, x26, x10, x6, 0x80002, 0x80000, 0x2, x7, 48, x20)
+
+inst_13:
+// rs1==x22, rs2==x31, rd==x30, rs2_val == 4, rs1_val == -33
+// opcode: xor ; op1:x22; op2:x31; dest:x30; op1val:-0x21; op2val:0x4
+TEST_RR_OP(xor, x30, x22, x31, 0xffffffdb, -0x21, 0x4, x7, 52, x20)
+
+inst_14:
+// rs1==x8, rs2==x0, rd==x16, rs2_val == 16,
+// opcode: xor ; op1:x8; op2:x0; dest:x16; op1val:0x6; op2val:0x0
+TEST_RR_OP(xor, x16, x8, x0, 0x6, 0x6, 0x0, x7, 56, x20)
+
+inst_15:
+// rs1==x16, rs2==x27, rd==x15, rs2_val == 32,
+// opcode: xor ; op1:x16; op2:x27; dest:x15; op1val:0x5; op2val:0x20
+TEST_RR_OP(xor, x15, x16, x27, 0x25, 0x5, 0x20, x7, 60, x20)
+
+inst_16:
+// rs1==x3, rs2==x26, rd==x31, rs2_val == 64, rs1_val == -2097153
+// opcode: xor ; op1:x3; op2:x26; dest:x31; op1val:-0x200001; op2val:0x40
+TEST_RR_OP(xor, x31, x3, x26, 0xffdfffbf, -0x200001, 0x40, x7, 64, x19)
+
+inst_17:
+// rs1==x9, rs2==x25, rd==x14, rs2_val == 128, rs1_val == -32769
+// opcode: xor ; op1:x9; op2:x25; dest:x14; op1val:-0x8001; op2val:0x80
+TEST_RR_OP(xor, x14, x9, x25, 0xffff7f7f, -0x8001, 0x80, x7, 68, x19)
+RVTEST_SIGBASE( x13,signature_x13_0)
+
+inst_18:
+// rs1==x30, rs2==x10, rd==x6, rs2_val == 256,
+// opcode: xor ; op1:x30; op2:x10; dest:x6; op1val:0x55555556; op2val:0x100
+TEST_RR_OP(xor, x6, x30, x10, 0x55555456, 0x55555556, 0x100, x13, 0, x19)
+
+inst_19:
+// rs1==x2, rs2==x9, rd==x7, rs2_val == 512,
+// opcode: xor ; op1:x2; op2:x9; dest:x7; op1val:-0x4001; op2val:0x200
+TEST_RR_OP(xor, x7, x2, x9, 0xffffbdff, -0x4001, 0x200, x13, 4, x19)
+
+inst_20:
+// rs1==x6, rs2==x17, rd==x0, rs2_val == 1024, rs1_val == 128
+// opcode: xor ; op1:x6; op2:x17; dest:x0; op1val:0x80; op2val:0x400
+TEST_RR_OP(xor, x0, x6, x17, 0, 0x80, 0x400, x13, 8, x19)
+
+inst_21:
+// rs1==x15, rs2==x5, rd==x2, rs2_val == 2048,
+// opcode: xor ; op1:x15; op2:x5; dest:x2; op1val:-0x8001; op2val:0x800
+TEST_RR_OP(xor, x2, x15, x5, 0xffff77ff, -0x8001, 0x800, x13, 12, x19)
+
+inst_22:
+// rs1==x7, rs2==x15, rd==x22, rs2_val == 8192,
+// opcode: xor ; op1:x7; op2:x15; dest:x22; op1val:0x6; op2val:0x2000
+TEST_RR_OP(xor, x22, x7, x15, 0x2006, 0x6, 0x2000, x13, 16, x19)
+
+inst_23:
+// rs1==x14, rs2==x16, rd==x20, rs2_val == 16384, rs1_val == -9
+// opcode: xor ; op1:x14; op2:x16; dest:x20; op1val:-0x9; op2val:0x4000
+TEST_RR_OP(xor, x20, x14, x16, 0xffffbff7, -0x9, 0x4000, x13, 20, x19)
+
+inst_24:
+// rs1==x29, rs2==x20, rd==x1, rs2_val == 32768, rs1_val == 32768
+// opcode: xor ; op1:x29; op2:x20; dest:x1; op1val:0x8000; op2val:0x8000
+TEST_RR_OP(xor, x1, x29, x20, 0x0, 0x8000, 0x8000, x13, 24, x19)
+
+inst_25:
+// rs1==x18, rs2==x8, rd==x12, rs2_val == 65536, rs1_val == 4
+// opcode: xor ; op1:x18; op2:x8; dest:x12; op1val:0x4; op2val:0x10000
+TEST_RR_OP(xor, x12, x18, x8, 0x10004, 0x4, 0x10000, x13, 28, x19)
+
+inst_26:
+// rs1==x21, rs2==x28, rd==x5, rs2_val == 131072,
+// opcode: xor ; op1:x21; op2:x28; dest:x5; op1val:0x33333332; op2val:0x20000
+TEST_RR_OP(xor, x5, x21, x28, 0x33313332, 0x33333332, 0x20000, x13, 32, x19)
+
+inst_27:
+// rs1==x17, rs2==x4, rd==x11, rs2_val == 262144, rs1_val == -67108865
+// opcode: xor ; op1:x17; op2:x4; dest:x11; op1val:-0x4000001; op2val:0x40000
+TEST_RR_OP(xor, x11, x17, x4, 0xfbfbffff, -0x4000001, 0x40000, x13, 36, x19)
+
+inst_28:
+// rs1==x4, rs2==x21, rd==x27, rs2_val == 524288,
+// opcode: xor ; op1:x4; op2:x21; dest:x27; op1val:0x7; op2val:0x80000
+TEST_RR_OP(xor, x27, x4, x21, 0x80007, 0x7, 0x80000, x13, 40, x19)
+
+inst_29:
+// rs1==x31, rs2==x3, rd==x29, rs2_val == 1048576,
+// opcode: xor ; op1:x31; op2:x3; dest:x29; op1val:-0x1; op2val:0x100000
+TEST_RR_OP(xor, x29, x31, x3, 0xffefffff, -0x1, 0x100000, x13, 44, x1)
+
+inst_30:
+// rs1==x25, rs2==x7, rd==x21, rs2_val == 2097152,
+// opcode: xor ; op1:x25; op2:x7; dest:x21; op1val:0xb505; op2val:0x200000
+TEST_RR_OP(xor, x21, x25, x7, 0x20b505, 0xb505, 0x200000, x13, 48, x1)
+
+inst_31:
+// rs1==x20, rs2==x19, rd==x25, rs2_val == 4194304,
+// opcode: xor ; op1:x20; op2:x19; dest:x25; op1val:0xb505; op2val:0x400000
+TEST_RR_OP(xor, x25, x20, x19, 0x40b505, 0xb505, 0x400000, x13, 52, x1)
+
+inst_32:
+// rs2_val == 8388608,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x800000
+TEST_RR_OP(xor, x12, x10, x11, 0x800001, 0x1, 0x800000, x13, 56, x1)
+
+inst_33:
+// rs2_val == 16777216, rs1_val == -268435457
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x1000000
+TEST_RR_OP(xor, x12, x10, x11, 0xeeffffff, -0x10000001, 0x1000000, x13, 60, x1)
+
+inst_34:
+// rs2_val == 33554432,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2000000
+TEST_RR_OP(xor, x12, x10, x11, 0x200b505, 0xb505, 0x2000000, x13, 64, x1)
+
+inst_35:
+// rs2_val == 67108864, rs1_val == -8388609
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x4000000
+TEST_RR_OP(xor, x12, x10, x11, 0xfb7fffff, -0x800001, 0x4000000, x13, 68, x1)
+
+inst_36:
+// rs2_val == 134217728, rs1_val == 4096
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x8000000
+TEST_RR_OP(xor, x12, x10, x11, 0x8001000, 0x1000, 0x8000000, x13, 72, x1)
+
+inst_37:
+// rs2_val == 268435456,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x10000000
+TEST_RR_OP(xor, x12, x10, x11, 0xeffffff7, -0x9, 0x10000000, x13, 76, x1)
+
+inst_38:
+// rs2_val == 536870912, rs1_val == -33554433
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x20000000
+TEST_RR_OP(xor, x12, x10, x11, 0xddffffff, -0x2000001, 0x20000000, x13, 80, x1)
+
+inst_39:
+// rs2_val == 1073741824, rs1_val == -131073
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x40000000
+TEST_RR_OP(xor, x12, x10, x11, 0xbffdffff, -0x20001, 0x40000000, x13, 84, x1)
+
+inst_40:
+// rs2_val == -2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:-0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x2000001, -0x2000001, -0x2, x13, 88, x1)
+
+inst_41:
+// rs2_val == -3, rs1_val == 1073741824
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:-0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xbffffffd, 0x40000000, -0x3, x13, 92, x1)
+
+inst_42:
+// rs2_val == -5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x9999999d, 0x66666666, -0x5, x13, 96, x1)
+
+inst_43:
+// rs2_val == -9, rs1_val == 33554432
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:-0x9
+TEST_RR_OP(xor, x12, x10, x11, 0xfdfffff7, 0x2000000, -0x9, x13, 100, x1)
+
+inst_44:
+// rs2_val == -17,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x11
+TEST_RR_OP(xor, x12, x10, x11, 0x30, -0x21, -0x11, x13, 104, x1)
+
+inst_45:
+// rs2_val == -33,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x21
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffdb, 0x4, -0x21, x13, 108, x1)
+
+inst_46:
+// rs2_val == -65,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x41
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffbc, 0x3, -0x41, x13, 112, x1)
+
+inst_47:
+// rs2_val == -129, rs1_val == 131072
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x81
+TEST_RR_OP(xor, x12, x10, x11, 0xfffdff7f, 0x20000, -0x81, x13, 116, x1)
+
+inst_48:
+// rs2_val == -257,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:-0x101
+TEST_RR_OP(xor, x12, x10, x11, 0x10000100, -0x10000001, -0x101, x13, 120, x1)
+
+inst_49:
+// rs2_val == -513, rs1_val == -5
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:-0x201
+TEST_RR_OP(xor, x12, x10, x11, 0x204, -0x5, -0x201, x13, 124, x1)
+
+inst_50:
+// rs2_val == -1025,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:-0x401
+TEST_RR_OP(xor, x12, x10, x11, 0x410, -0x11, -0x401, x13, 128, x1)
+
+inst_51:
+// rs2_val == -2049,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x801
+TEST_RR_OP(xor, x12, x10, x11, 0xbd03, -0xb504, -0x801, x13, 132, x1)
+
+inst_52:
+// rs2_val == -4097, rs1_val == 2
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x1001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffeffd, 0x2, -0x1001, x13, 136, x1)
+
+inst_53:
+// rs2_val == -8193,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x7; op2val:-0x2001
+TEST_RR_OP(xor, x12, x10, x11, 0x2006, -0x7, -0x2001, x13, 140, x1)
+
+inst_54:
+// rs2_val == -16385, rs1_val == -16777217
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:-0x4001
+TEST_RR_OP(xor, x12, x10, x11, 0x1004000, -0x1000001, -0x4001, x13, 144, x1)
+
+inst_55:
+// rs2_val == -32769,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x8001
+TEST_RR_OP(xor, x12, x10, x11, 0xffff7ffc, 0x3, -0x8001, x13, 148, x1)
+
+inst_56:
+// rs2_val == -131073, rs1_val == 16384
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:-0x20001
+TEST_RR_OP(xor, x12, x10, x11, 0xfffdbfff, 0x4000, -0x20001, x13, 152, x1)
+
+inst_57:
+// rs2_val == -262145, rs1_val == 262144
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:-0x40001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff, 0x40000, -0x40001, x13, 156, x1)
+
+inst_58:
+// rs2_val == -524289, rs1_val == 268435456
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:-0x80001
+TEST_RR_OP(xor, x12, x10, x11, 0xeff7ffff, 0x10000000, -0x80001, x13, 160, x1)
+
+inst_59:
+// rs2_val == -1048577,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000; op2val:-0x100001
+TEST_RR_OP(xor, x12, x10, x11, 0x7fefffff, -0x80000000, -0x100001, x13, 164, x1)
+
+inst_60:
+// rs2_val == -2097153,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x200001
+TEST_RR_OP(xor, x12, x10, x11, 0xffdf7fff, 0x8000, -0x200001, x13, 168, x1)
+
+inst_61:
+// rs2_val == -4194305,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000; op2val:-0x400001
+TEST_RR_OP(xor, x12, x10, x11, 0x7fbfffff, -0x80000000, -0x400001, x13, 172, x1)
+
+inst_62:
+// rs2_val == -8388609,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x800001
+TEST_RR_OP(xor, x12, x10, x11, 0xcc4ccccb, 0x33333334, -0x800001, x13, 176, x1)
+
+inst_63:
+// rs2_val == -16777217,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000; op2val:-0x1000001
+TEST_RR_OP(xor, x12, x10, x11, 0x3effffff, -0x40000000, -0x1000001, x13, 180, x1)
+
+inst_64:
+// rs2_val == -33554433,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:-0x2000001
+TEST_RR_OP(xor, x12, x10, x11, 0x0, -0x2000001, -0x2000001, x13, 184, x1)
+
+inst_65:
+// rs2_val == -67108865,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:-0x4000001
+TEST_RR_OP(xor, x12, x10, x11, 0xfbfffffe, 0x1, -0x4000001, x13, 188, x1)
+
+inst_66:
+// rs2_val == -134217729,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x8000001
+TEST_RR_OP(xor, x12, x10, x11, 0x91999999, 0x66666666, -0x8000001, x13, 192, x1)
+
+inst_67:
+// rs2_val == -536870913, rs1_val == -524289
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:-0x20000001
+TEST_RR_OP(xor, x12, x10, x11, 0x20080000, -0x80001, -0x20000001, x13, 196, x1)
+
+inst_68:
+// rs2_val == -1073741825,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x40000001
+TEST_RR_OP(xor, x12, x10, x11, 0x4000b503, -0xb504, -0x40000001, x13, 200, x1)
+
+inst_69:
+// rs2_val == 1431655765, rs1_val==1431655764 and rs2_val==1431655765
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x55555554, 0x55555555, x13, 204, x1)
+
+inst_70:
+// rs2_val == -1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xa8aaaaaa, 0x2000000, -0x55555556, x13, 208, x1)
+
+inst_71:
+// rs1_val == 8,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:-0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffff4, 0x8, -0x4, x13, 212, x1)
+
+inst_72:
+// rs1_val == 16,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x10
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x10, 0x10, x13, 216, x1)
+
+inst_73:
+// rs1_val == 32,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:0x40
+TEST_RR_OP(xor, x12, x10, x11, 0x60, 0x20, 0x40, x13, 220, x1)
+
+inst_74:
+// rs1_val == 64,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:-0x21
+TEST_RR_OP(xor, x12, x10, x11, 0xffffff9f, 0x40, -0x21, x13, 224, x1)
+
+inst_75:
+// rs1_val == 256,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x400001
+TEST_RR_OP(xor, x12, x10, x11, 0xffbffeff, 0x100, -0x400001, x13, 228, x1)
+
+inst_76:
+// rs1_val == 512,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaa8aa, 0x200, -0x55555556, x13, 232, x1)
+
+inst_77:
+// rs1_val == 1024,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaeaa, 0x400, -0x55555556, x13, 236, x1)
+
+inst_78:
+// rs1_val == 2048,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x66666e65, 0x800, 0x66666665, x13, 240, x1)
+
+inst_79:
+// rs1_val == 8192,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:-0x100001
+TEST_RR_OP(xor, x12, x10, x11, 0xffefdfff, 0x2000, -0x100001, x13, 244, x1)
+
+inst_80:
+// rs1_val == 65536,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xfffe4afd, 0x10000, -0xb503, x13, 248, x1)
+
+inst_81:
+// rs1_val == 1048576,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:-0x9
+TEST_RR_OP(xor, x12, x10, x11, 0xffeffff7, 0x100000, -0x9, x13, 252, x1)
+
+inst_82:
+// rs1_val == 2097152,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:-0x4001
+TEST_RR_OP(xor, x12, x10, x11, 0xffdfbfff, 0x200000, -0x4001, x13, 256, x1)
+
+inst_83:
+// rs1_val == 8388608,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x66e66665, 0x800000, 0x66666665, x13, 260, x1)
+
+inst_84:
+// rs1_val == 16777216,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xabaaaaab, 0x1000000, -0x55555555, x13, 264, x1)
+
+inst_85:
+// rs1_val == 67108864,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x400000
+TEST_RR_OP(xor, x12, x10, x11, 0x4400000, 0x4000000, 0x400000, x13, 268, x1)
+
+inst_86:
+// rs1_val == 134217728,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x5d555554, 0x8000000, 0x55555554, x13, 272, x1)
+
+inst_87:
+// rs1_val == 536870912,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x400
+TEST_RR_OP(xor, x12, x10, x11, 0x20000400, 0x20000000, 0x400, x13, 276, x1)
+
+inst_88:
+// rs1_val == -2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xb502, -0x2, -0xb504, x13, 280, x1)
+
+inst_89:
+// rs1_val == -3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffff9, -0x3, 0x4, x13, 284, x1)
+
+inst_90:
+// rs1_val == -129,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4a7c, -0x81, 0xb503, x13, 288, x1)
+
+inst_91:
+// rs1_val == -257,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x1000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffeeff, -0x101, 0x1000, x13, 292, x1)
+
+inst_92:
+// rs1_val == -513,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffdff, -0x201, 0x0, x13, 296, x1)
+
+inst_93:
+// rs1_val == -1025,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:-0x10000001
+TEST_RR_OP(xor, x12, x10, x11, 0x10000400, -0x401, -0x10000001, x13, 300, x1)
+
+inst_94:
+// rs1_val == -2049,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x2000000
+TEST_RR_OP(xor, x12, x10, x11, 0xfdfff7ff, -0x801, 0x2000000, x13, 304, x1)
+
+inst_95:
+// rs1_val == -4097,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:-0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x1001, -0x1001, -0x2, x13, 308, x1)
+
+inst_96:
+// rs1_val == -8193,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xffffdffb, -0x2001, 0x4, x13, 312, x1)
+
+inst_97:
+// rs1_val == -65537,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xfffefffd, -0x10001, 0x2, x13, 316, x1)
+
+inst_98:
+// rs1_val == -262145,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:-0x80001
+TEST_RR_OP(xor, x12, x10, x11, 0xc0000, -0x40001, -0x80001, x13, 320, x1)
+
+inst_99:
+// rs1_val == -1048577,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x20
+TEST_RR_OP(xor, x12, x10, x11, 0xffefffdf, -0x100001, 0x20, x13, 324, x1)
+
+inst_100:
+// rs1_val == -4194305,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:-0xa
+TEST_RR_OP(xor, x12, x10, x11, 0x400009, -0x400001, -0xa, x13, 328, x1)
+
+inst_101:
+// rs1_val == -134217729,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0xc4cccccc, -0x8000001, 0x33333333, x13, 332, x1)
+
+inst_102:
+// rs1_val == -536870913,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x1000000
+TEST_RR_OP(xor, x12, x10, x11, 0xdeffffff, -0x20000001, 0x1000000, x13, 336, x1)
+
+inst_103:
+// rs1_val == -1073741825,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:-0x10000001
+TEST_RR_OP(xor, x12, x10, x11, 0x50000000, -0x40000001, -0x10000001, x13, 340, x1)
+
+inst_104:
+// rs1_val == 1431655765, rs1_val==1431655765 and rs2_val==858993460
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x66666661, 0x55555555, 0x33333334, x13, 344, x1)
+
+inst_105:
+// rs1_val==3 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x3, 0x3, x13, 348, x1)
+
+inst_106:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x55555556, 0x3, 0x55555555, x13, 352, x1)
+
+inst_107:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaa9, 0x3, -0x55555556, x13, 356, x1)
+
+inst_108:
+// rs1_val==3 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x3, 0x5, x13, 360, x1)
+
+inst_109:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x33333330, 0x3, 0x33333333, x13, 364, x1)
+
+inst_110:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x66666665, 0x3, 0x66666666, x13, 368, x1)
+
+inst_111:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4aff, 0x3, -0xb504, x13, 372, x1)
+
+inst_112:
+// rs1_val==3 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xb507, 0x3, 0xb504, x13, 376, x1)
+
+inst_113:
+// rs1_val==3 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x3, 0x2, x13, 380, x1)
+
+inst_114:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x55555557, 0x3, 0x55555554, x13, 384, x1)
+
+inst_115:
+// rs1_val==3 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x3, 0x0, x13, 388, x1)
+
+inst_116:
+// rs1_val==3 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0x3, 0x4, x13, 392, x1)
+
+inst_117:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x33333331, 0x3, 0x33333332, x13, 396, x1)
+
+inst_118:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666, 0x3, 0x66666665, x13, 400, x1)
+
+inst_119:
+// rs1_val==3 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xb500, 0x3, 0xb503, x13, 404, x1)
+
+inst_120:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555, 0x3, 0x55555556, x13, 408, x1)
+
+inst_121:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaa8, 0x3, -0x55555555, x13, 412, x1)
+
+inst_122:
+// rs1_val==3 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x5, 0x3, 0x6, x13, 416, x1)
+
+inst_123:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x33333337, 0x3, 0x33333334, x13, 420, x1)
+
+inst_124:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x66666664, 0x3, 0x66666667, x13, 424, x1)
+
+inst_125:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4afe, 0x3, -0xb503, x13, 428, x1)
+
+inst_126:
+// rs1_val==3 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0xb506, 0x3, 0xb505, x13, 432, x1)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x55555556, 0x55555555, 0x3, x13, 436, x1)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x55555555, 0x55555555, x13, 440, x1)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff, 0x55555555, -0x55555556, x13, 444, x1)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x55555550, 0x55555555, 0x5, x13, 448, x1)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666, 0x55555555, 0x33333333, x13, 452, x1)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x33333333, 0x55555555, 0x66666666, x13, 456, x1)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fa9, 0x55555555, -0xb504, x13, 460, x1)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e051, 0x55555555, 0xb504, x13, 464, x1)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x55555557, 0x55555555, 0x2, x13, 468, x1)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x55555555, 0x55555554, x13, 472, x1)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555, 0x55555555, 0x0, x13, 476, x1)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x55555551, 0x55555555, 0x4, x13, 480, x1)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x66666667, 0x55555555, 0x33333332, x13, 484, x1)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x33333330, 0x55555555, 0x66666665, x13, 488, x1)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e056, 0x55555555, 0xb503, x13, 492, x1)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x55555555, 0x55555556, x13, 496, x1)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffe, 0x55555555, -0x55555555, x13, 500, x1)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x55555553, 0x55555555, 0x6, x13, 504, x1)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x33333332, 0x55555555, 0x66666667, x13, 508, x1)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fa8, 0x55555555, -0xb503, x13, 512, x1)
+
+inst_147:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e050, 0x55555555, 0xb505, x13, 516, x1)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaa9, -0x55555556, 0x3, x13, 520, x1)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff, -0x55555556, 0x55555555, x13, 524, x1)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x0, -0x55555556, -0x55555556, x13, 528, x1)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaf, -0x55555556, 0x5, x13, 532, x1)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x99999999, -0x55555556, 0x33333333, x13, 536, x1)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc, -0x55555556, 0x66666666, x13, 540, x1)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e056, -0x55555556, -0xb504, x13, 544, x1)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fae, -0x55555556, 0xb504, x13, 548, x1)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaa8, -0x55555556, 0x2, x13, 552, x1)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffe, -0x55555556, 0x55555554, x13, 556, x1)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa, -0x55555556, 0x0, x13, 560, x1)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaae, -0x55555556, 0x4, x13, 564, x1)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x99999998, -0x55555556, 0x33333332, x13, 568, x1)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccf, -0x55555556, 0x66666665, x13, 572, x1)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fa9, -0x55555556, 0xb503, x13, 576, x1)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffc, -0x55555556, 0x55555556, x13, 580, x1)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x1, -0x55555556, -0x55555555, x13, 584, x1)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaac, -0x55555556, 0x6, x13, 588, x1)
+
+inst_166:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x9999999e, -0x55555556, 0x33333334, x13, 592, x1)
+
+inst_167:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccd, -0x55555556, 0x66666667, x13, 596, x1)
+
+inst_168:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e057, -0x55555556, -0xb503, x13, 600, x1)
+
+inst_169:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1faf, -0x55555556, 0xb505, x13, 604, x1)
+
+inst_170:
+// rs1_val==5 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x5, 0x3, x13, 608, x1)
+
+inst_171:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x55555550, 0x5, 0x55555555, x13, 612, x1)
+
+inst_172:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaf, 0x5, -0x55555556, x13, 616, x1)
+
+inst_173:
+// rs1_val==5 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x5, 0x5, x13, 620, x1)
+
+inst_174:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x33333336, 0x5, 0x33333333, x13, 624, x1)
+
+inst_175:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x66666663, 0x5, 0x66666666, x13, 628, x1)
+
+inst_176:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4af9, 0x5, -0xb504, x13, 632, x1)
+
+inst_177:
+// rs1_val==5 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xb501, 0x5, 0xb504, x13, 636, x1)
+
+inst_178:
+// rs1_val==5 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0x5, 0x2, x13, 640, x1)
+
+inst_179:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x55555551, 0x5, 0x55555554, x13, 644, x1)
+
+inst_180:
+// rs1_val==5 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x5, 0x5, 0x0, x13, 648, x1)
+
+inst_181:
+// rs1_val==5 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x5, 0x4, x13, 652, x1)
+
+inst_182:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x33333337, 0x5, 0x33333332, x13, 656, x1)
+
+inst_183:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x66666660, 0x5, 0x66666665, x13, 660, x1)
+
+inst_184:
+// rs1_val==5 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xb506, 0x5, 0xb503, x13, 664, x1)
+
+inst_185:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x55555553, 0x5, 0x55555556, x13, 668, x1)
+
+inst_186:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaae, 0x5, -0x55555555, x13, 672, x1)
+
+inst_187:
+// rs1_val==5 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x5, 0x6, x13, 676, x1)
+
+inst_188:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x33333331, 0x5, 0x33333334, x13, 680, x1)
+
+inst_189:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x66666662, 0x5, 0x66666667, x13, 684, x1)
+
+inst_190:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4af8, 0x5, -0xb503, x13, 688, x1)
+
+inst_191:
+// rs1_val==5 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0xb500, 0x5, 0xb505, x13, 692, x1)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x33333330, 0x33333333, 0x3, x13, 696, x1)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666, 0x33333333, 0x55555555, x13, 700, x1)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x99999999, 0x33333333, -0x55555556, x13, 704, x1)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x33333336, 0x33333333, 0x5, x13, 708, x1)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x33333333, 0x33333333, x13, 712, x1)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555, 0x33333333, 0x66666666, x13, 716, x1)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xcccc79cf, 0x33333333, -0xb504, x13, 720, x1)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x33338637, 0x33333333, 0xb504, x13, 724, x1)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x33333331, 0x33333333, 0x2, x13, 728, x1)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x66666667, 0x33333333, 0x55555554, x13, 732, x1)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x33333333, 0x33333333, 0x0, x13, 736, x1)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x33333337, 0x33333333, 0x4, x13, 740, x1)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x33333333, 0x33333332, x13, 744, x1)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x55555556, 0x33333333, 0x66666665, x13, 748, x1)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x33338630, 0x33333333, 0xb503, x13, 752, x1)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x66666665, 0x33333333, 0x55555556, x13, 756, x1)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x99999998, 0x33333333, -0x55555555, x13, 760, x1)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x33333335, 0x33333333, 0x6, x13, 764, x1)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0x33333333, 0x33333334, x13, 768, x1)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x55555554, 0x33333333, 0x66666667, x13, 772, x1)
+
+inst_212:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xcccc79ce, 0x33333333, -0xb503, x13, 776, x1)
+
+inst_213:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0x33338636, 0x33333333, 0xb505, x13, 780, x1)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x66666665, 0x66666666, 0x3, x13, 784, x1)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x33333333, 0x66666666, 0x55555555, x13, 788, x1)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc, 0x66666666, -0x55555556, x13, 792, x1)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x66666663, 0x66666666, 0x5, x13, 796, x1)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555, 0x66666666, 0x33333333, x13, 800, x1)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x66666666, 0x66666666, x13, 804, x1)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x99992c9a, 0x66666666, -0xb504, x13, 808, x1)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d362, 0x66666666, 0xb504, x13, 812, x1)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x66666664, 0x66666666, 0x2, x13, 816, x1)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x33333332, 0x66666666, 0x55555554, x13, 820, x1)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666, 0x66666666, 0x0, x13, 824, x1)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x66666662, 0x66666666, 0x4, x13, 828, x1)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x55555554, 0x66666666, 0x33333332, x13, 832, x1)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x66666666, 0x66666665, x13, 836, x1)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d365, 0x66666666, 0xb503, x13, 840, x1)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x33333330, 0x66666666, 0x55555556, x13, 844, x1)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccd, 0x66666666, -0x55555555, x13, 848, x1)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x66666660, 0x66666666, 0x6, x13, 852, x1)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x55555552, 0x66666666, 0x33333334, x13, 856, x1)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x66666666, 0x66666667, x13, 860, x1)
+
+inst_234:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x99992c9b, 0x66666666, -0xb503, x13, 864, x1)
+
+inst_235:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d363, 0x66666666, 0xb505, x13, 868, x1)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4aff, -0xb504, 0x3, x13, 872, x1)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fa9, -0xb504, 0x55555555, x13, 876, x1)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e056, -0xb504, -0x55555556, x13, 880, x1)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4af9, -0xb504, 0x5, x13, 884, x1)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0xcccc79cf, -0xb504, 0x33333333, x13, 888, x1)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x99992c9a, -0xb504, 0x66666666, x13, 892, x1)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x0, -0xb504, -0xb504, x13, 896, x1)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffff8, -0xb504, 0xb504, x13, 900, x1)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4afe, -0xb504, 0x2, x13, 904, x1)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fa8, -0xb504, 0x55555554, x13, 908, x1)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4afc, -0xb504, 0x0, x13, 912, x1)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4af8, -0xb504, 0x4, x13, 916, x1)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0xcccc79ce, -0xb504, 0x33333332, x13, 920, x1)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x99992c99, -0xb504, 0x66666665, x13, 924, x1)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff, -0xb504, 0xb503, x13, 928, x1)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1faa, -0xb504, 0x55555556, x13, 932, x1)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e057, -0xb504, -0x55555555, x13, 936, x1)
+
+inst_253:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4afa, -0xb504, 0x6, x13, 940, x1)
+
+inst_254:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0xcccc79c8, -0xb504, 0x33333334, x13, 944, x1)
+
+inst_255:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x99992c9b, -0xb504, 0x66666667, x13, 948, x1)
+
+inst_256:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x1, -0xb504, -0xb503, x13, 952, x1)
+
+inst_257:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffff9, -0xb504, 0xb505, x13, 956, x1)
+
+inst_258:
+// rs1_val==46340 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xb507, 0xb504, 0x3, x13, 960, x1)
+
+inst_259:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e051, 0xb504, 0x55555555, x13, 964, x1)
+
+inst_260:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fae, 0xb504, -0x55555556, x13, 968, x1)
+
+inst_261:
+// rs1_val==46340 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xb501, 0xb504, 0x5, x13, 972, x1)
+
+inst_262:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x33338637, 0xb504, 0x33333333, x13, 976, x1)
+
+inst_263:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d362, 0xb504, 0x66666666, x13, 980, x1)
+
+inst_264:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffff8, 0xb504, -0xb504, x13, 984, x1)
+
+inst_265:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0xb504, 0xb504, x13, 988, x1)
+
+inst_266:
+// rs1_val==46340 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xb506, 0xb504, 0x2, x13, 992, x1)
+
+inst_267:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e050, 0xb504, 0x55555554, x13, 996, x1)
+
+inst_268:
+// rs1_val==46340 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xb504, 0xb504, 0x0, x13, 1000, x1)
+
+inst_269:
+// rs1_val==46340 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xb500, 0xb504, 0x4, x13, 1004, x1)
+
+inst_270:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x33338636, 0xb504, 0x33333332, x13, 1008, x1)
+
+inst_271:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d361, 0xb504, 0x66666665, x13, 1012, x1)
+
+inst_272:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0xb504, 0xb503, x13, 1016, x1)
+
+inst_273:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e052, 0xb504, 0x55555556, x13, 1020, x1)
+
+inst_274:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1faf, 0xb504, -0x55555555, x13, 1024, x1)
+
+inst_275:
+// rs1_val==46340 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xb502, 0xb504, 0x6, x13, 1028, x1)
+
+inst_276:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x33338630, 0xb504, 0x33333334, x13, 1032, x1)
+
+inst_277:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d363, 0xb504, 0x66666667, x13, 1036, x1)
+
+inst_278:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffff9, 0xb504, -0xb503, x13, 1040, x1)
+
+inst_279:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0xb504, 0xb505, x13, 1044, x1)
+
+inst_280:
+// rs1_val==2 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x2, 0x3, x13, 1048, x1)
+
+inst_281:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x55555557, 0x2, 0x55555555, x13, 1052, x1)
+
+inst_282:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaa8, 0x2, -0x55555556, x13, 1056, x1)
+
+inst_283:
+// rs1_val==2 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0x2, 0x5, x13, 1060, x1)
+
+inst_284:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x33333331, 0x2, 0x33333333, x13, 1064, x1)
+
+inst_285:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x66666664, 0x2, 0x66666666, x13, 1068, x1)
+
+inst_286:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4afe, 0x2, -0xb504, x13, 1072, x1)
+
+inst_287:
+// rs1_val==2 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xb506, 0x2, 0xb504, x13, 1076, x1)
+
+inst_288:
+// rs1_val==2 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x2, 0x2, x13, 1080, x1)
+
+inst_289:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x55555556, 0x2, 0x55555554, x13, 1084, x1)
+
+inst_290:
+// rs1_val==2 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x2, 0x0, x13, 1088, x1)
+
+inst_291:
+// rs1_val==2 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x2, 0x4, x13, 1092, x1)
+
+inst_292:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x33333330, 0x2, 0x33333332, x13, 1096, x1)
+
+inst_293:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x66666667, 0x2, 0x66666665, x13, 1100, x1)
+
+inst_294:
+// rs1_val==2 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xb501, 0x2, 0xb503, x13, 1104, x1)
+
+inst_295:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x55555554, 0x2, 0x55555556, x13, 1108, x1)
+
+inst_296:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaa9, 0x2, -0x55555555, x13, 1112, x1)
+
+inst_297:
+// rs1_val==2 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x4, 0x2, 0x6, x13, 1116, x1)
+
+inst_298:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x33333336, 0x2, 0x33333334, x13, 1120, x1)
+
+inst_299:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x66666665, 0x2, 0x66666667, x13, 1124, x1)
+
+inst_300:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4aff, 0x2, -0xb503, x13, 1128, x1)
+
+inst_301:
+// rs1_val==2 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0xb507, 0x2, 0xb505, x13, 1132, x1)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x55555557, 0x55555554, 0x3, x13, 1136, x1)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffe, 0x55555554, -0x55555556, x13, 1140, x1)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x55555551, 0x55555554, 0x5, x13, 1144, x1)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x66666667, 0x55555554, 0x33333333, x13, 1148, x1)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x33333332, 0x55555554, 0x66666666, x13, 1152, x1)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fa8, 0x55555554, -0xb504, x13, 1156, x1)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e050, 0x55555554, 0xb504, x13, 1160, x1)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x55555556, 0x55555554, 0x2, x13, 1164, x1)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x55555554, 0x55555554, x13, 1168, x1)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x55555554, 0x55555554, 0x0, x13, 1172, x1)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x55555550, 0x55555554, 0x4, x13, 1176, x1)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666, 0x55555554, 0x33333332, x13, 1180, x1)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x33333331, 0x55555554, 0x66666665, x13, 1184, x1)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e057, 0x55555554, 0xb503, x13, 1188, x1)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x55555554, 0x55555556, x13, 1192, x1)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff, 0x55555554, -0x55555555, x13, 1196, x1)
+
+inst_318:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x55555552, 0x55555554, 0x6, x13, 1200, x1)
+
+inst_319:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x66666660, 0x55555554, 0x33333334, x13, 1204, x1)
+
+inst_320:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x33333333, 0x55555554, 0x66666667, x13, 1208, x1)
+
+inst_321:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fa9, 0x55555554, -0xb503, x13, 1212, x1)
+
+inst_322:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e051, 0x55555554, 0xb505, x13, 1216, x1)
+
+inst_323:
+// rs1_val==0 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x0, 0x3, x13, 1220, x1)
+
+inst_324:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555, 0x0, 0x55555555, x13, 1224, x1)
+
+inst_325:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa, 0x0, -0x55555556, x13, 1228, x1)
+
+inst_326:
+// rs1_val==0 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x5, 0x0, 0x5, x13, 1232, x1)
+
+inst_327:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x33333333, 0x0, 0x33333333, x13, 1236, x1)
+
+inst_328:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666, 0x0, 0x66666666, x13, 1240, x1)
+
+inst_329:
+// rs1_val==0 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xb504, 0x0, 0xb504, x13, 1244, x1)
+
+inst_330:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x0, -0x55555555, -0x55555555, x13, 1248, x1)
+
+inst_331:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaad, -0x55555555, 0x6, x13, 1252, x1)
+
+inst_332:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x9999999f, -0x55555555, 0x33333334, x13, 1256, x1)
+
+inst_333:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc, -0x55555555, 0x66666667, x13, 1260, x1)
+
+inst_334:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e056, -0x55555555, -0xb503, x13, 1264, x1)
+
+inst_335:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fae, -0x55555555, 0xb505, x13, 1268, x1)
+
+inst_336:
+// rs1_val==6 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x5, 0x6, 0x3, x13, 1272, x1)
+
+inst_337:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x55555553, 0x6, 0x55555555, x13, 1276, x1)
+
+inst_338:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaac, 0x6, -0x55555556, x13, 1280, x1)
+
+inst_339:
+// rs1_val==6 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x6, 0x5, x13, 1284, x1)
+
+inst_340:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x33333335, 0x6, 0x33333333, x13, 1288, x1)
+
+inst_341:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x66666660, 0x6, 0x66666666, x13, 1292, x1)
+
+inst_342:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4afa, 0x6, -0xb504, x13, 1296, x1)
+
+inst_343:
+// rs1_val==6 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xb502, 0x6, 0xb504, x13, 1300, x1)
+
+inst_344:
+// rs1_val==6 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x4, 0x6, 0x2, x13, 1304, x1)
+
+inst_345:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x55555552, 0x6, 0x55555554, x13, 1308, x1)
+
+inst_346:
+// rs1_val==6 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x6, 0x0, x13, 1312, x1)
+
+inst_347:
+// rs1_val==6 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x6, 0x4, x13, 1316, x1)
+
+inst_348:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x33333334, 0x6, 0x33333332, x13, 1320, x1)
+
+inst_349:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x66666663, 0x6, 0x66666665, x13, 1324, x1)
+
+inst_350:
+// rs1_val==6 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xb505, 0x6, 0xb503, x13, 1328, x1)
+
+inst_351:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x55555550, 0x6, 0x55555556, x13, 1332, x1)
+
+inst_352:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaad, 0x6, -0x55555555, x13, 1336, x1)
+
+inst_353:
+// rs1_val==6 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x6, 0x6, x13, 1340, x1)
+
+inst_354:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x33333332, 0x6, 0x33333334, x13, 1344, x1)
+
+inst_355:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x66666661, 0x6, 0x66666667, x13, 1348, x1)
+
+inst_356:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4afb, 0x6, -0xb503, x13, 1352, x1)
+
+inst_357:
+// rs1_val==6 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0xb503, 0x6, 0xb505, x13, 1356, x1)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x33333337, 0x33333334, 0x3, x13, 1360, x1)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x66666661, 0x33333334, 0x55555555, x13, 1364, x1)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x9999999e, 0x33333334, -0x55555556, x13, 1368, x1)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x33333331, 0x33333334, 0x5, x13, 1372, x1)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0x33333334, 0x33333333, x13, 1376, x1)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x55555552, 0x33333334, 0x66666666, x13, 1380, x1)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xcccc79c8, 0x33333334, -0xb504, x13, 1384, x1)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x33338630, 0x33333334, 0xb504, x13, 1388, x1)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x33333336, 0x33333334, 0x2, x13, 1392, x1)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x66666660, 0x33333334, 0x55555554, x13, 1396, x1)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x33333334, 0x33333334, 0x0, x13, 1400, x1)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x33333330, 0x33333334, 0x4, x13, 1404, x1)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x33333334, 0x33333332, x13, 1408, x1)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x55555551, 0x33333334, 0x66666665, x13, 1412, x1)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x33338637, 0x33333334, 0xb503, x13, 1416, x1)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x66666662, 0x33333334, 0x55555556, x13, 1420, x1)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x9999999f, 0x33333334, -0x55555555, x13, 1424, x1)
+
+inst_375:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x33333332, 0x33333334, 0x6, x13, 1428, x1)
+
+inst_376:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x33333334, 0x33333334, x13, 1432, x1)
+
+inst_377:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x55555553, 0x33333334, 0x66666667, x13, 1436, x1)
+
+inst_378:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xcccc79c9, 0x33333334, -0xb503, x13, 1440, x1)
+
+inst_379:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0x33338631, 0x33333334, 0xb505, x13, 1444, x1)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x66666664, 0x66666667, 0x3, x13, 1448, x1)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x33333332, 0x66666667, 0x55555555, x13, 1452, x1)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccd, 0x66666667, -0x55555556, x13, 1456, x1)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x66666662, 0x66666667, 0x5, x13, 1460, x1)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x55555554, 0x66666667, 0x33333333, x13, 1464, x1)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x66666667, 0x66666666, x13, 1468, x1)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x99992c9b, 0x66666667, -0xb504, x13, 1472, x1)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d363, 0x66666667, 0xb504, x13, 1476, x1)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x66666665, 0x66666667, 0x2, x13, 1480, x1)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x33333333, 0x66666667, 0x55555554, x13, 1484, x1)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x66666667, 0x66666667, 0x0, x13, 1488, x1)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x66666663, 0x66666667, 0x4, x13, 1492, x1)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555, 0x66666667, 0x33333332, x13, 1496, x1)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x66666667, 0x66666665, x13, 1500, x1)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d364, 0x66666667, 0xb503, x13, 1504, x1)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x33333331, 0x66666667, 0x55555556, x13, 1508, x1)
+
+inst_396:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc, 0x66666667, -0x55555555, x13, 1512, x1)
+
+inst_397:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x66666661, 0x66666667, 0x6, x13, 1516, x1)
+
+inst_398:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x55555553, 0x66666667, 0x33333334, x13, 1520, x1)
+
+inst_399:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x66666667, 0x66666667, x13, 1524, x1)
+
+inst_400:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x99992c9a, 0x66666667, -0xb503, x13, 1528, x1)
+
+inst_401:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d362, 0x66666667, 0xb505, x13, 1532, x1)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4afe, -0xb503, 0x3, x13, 1536, x1)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fa8, -0xb503, 0x55555555, x13, 1540, x1)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e057, -0xb503, -0x55555556, x13, 1544, x1)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4af8, -0xb503, 0x5, x13, 1548, x1)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0xcccc79ce, -0xb503, 0x33333333, x13, 1552, x1)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x99992c9b, -0xb503, 0x66666666, x13, 1556, x1)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x1, -0xb503, -0xb504, x13, 1560, x1)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffff9, -0xb503, 0xb504, x13, 1564, x1)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4aff, -0xb503, 0x2, x13, 1568, x1)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fa9, -0xb503, 0x55555554, x13, 1572, x1)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4afd, -0xb503, 0x0, x13, 1576, x1)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4af9, -0xb503, 0x4, x13, 1580, x1)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0xcccc79cf, -0xb503, 0x33333332, x13, 1584, x1)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x99992c98, -0xb503, 0x66666665, x13, 1588, x1)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffe, -0xb503, 0xb503, x13, 1592, x1)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fab, -0xb503, 0x55555556, x13, 1596, x1)
+
+inst_418:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e056, -0xb503, -0x55555555, x13, 1600, x1)
+
+inst_419:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4afb, -0xb503, 0x6, x13, 1604, x1)
+
+inst_420:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0xcccc79c9, -0xb503, 0x33333334, x13, 1608, x1)
+
+inst_421:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x99992c9a, -0xb503, 0x66666667, x13, 1612, x1)
+
+inst_422:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x0, -0xb503, -0xb503, x13, 1616, x1)
+
+inst_423:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffff8, -0xb503, 0xb505, x13, 1620, x1)
+
+inst_424:
+// rs1_val==46341 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xb506, 0xb505, 0x3, x13, 1624, x1)
+
+inst_425:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e050, 0xb505, 0x55555555, x13, 1628, x1)
+
+inst_426:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1faf, 0xb505, -0x55555556, x13, 1632, x1)
+
+inst_427:
+// rs1_val==46341 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xb500, 0xb505, 0x5, x13, 1636, x1)
+
+inst_428:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x33338636, 0xb505, 0x33333333, x13, 1640, x1)
+
+inst_429:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d363, 0xb505, 0x66666666, x13, 1644, x1)
+
+inst_430:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffff9, 0xb505, -0xb504, x13, 1648, x1)
+
+inst_431:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0xb505, 0xb504, x13, 1652, x1)
+
+inst_432:
+// rs1_val==46341 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xb507, 0xb505, 0x2, x13, 1656, x1)
+
+inst_433:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e051, 0xb505, 0x55555554, x13, 1660, x1)
+
+inst_434:
+// rs1_val==46341 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xb505, 0xb505, 0x0, x13, 1664, x1)
+
+inst_435:
+// rs1_val==46341 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xb501, 0xb505, 0x4, x13, 1668, x1)
+
+inst_436:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x33338637, 0xb505, 0x33333332, x13, 1672, x1)
+
+inst_437:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d360, 0xb505, 0x66666665, x13, 1676, x1)
+
+inst_438:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0xb505, 0xb503, x13, 1680, x1)
+
+inst_439:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e053, 0xb505, 0x55555556, x13, 1684, x1)
+
+inst_440:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fae, 0xb505, -0x55555555, x13, 1688, x1)
+
+inst_441:
+// rs1_val==46341 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xb503, 0xb505, 0x6, x13, 1692, x1)
+
+inst_442:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x33338631, 0xb505, 0x33333334, x13, 1696, x1)
+
+inst_443:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d362, 0xb505, 0x66666667, x13, 1700, x1)
+
+inst_444:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffff8, 0xb505, -0xb503, x13, 1704, x1)
+
+inst_445:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0xb505, 0xb505, x13, 1708, x1)
+
+inst_446:
+// rs1_val==0 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x0, 0x2, x13, 1712, x1)
+
+inst_447:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x55555554, 0x0, 0x55555554, x13, 1716, x1)
+
+inst_448:
+// rs1_val==0 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x0, 0x0, x13, 1720, x1)
+
+inst_449:
+// rs1_val==0 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x4, 0x0, 0x4, x13, 1724, x1)
+
+inst_450:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x33333332, 0x0, 0x33333332, x13, 1728, x1)
+
+inst_451:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x66666665, 0x0, 0x66666665, x13, 1732, x1)
+
+inst_452:
+// rs1_val==0 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xb503, 0x0, 0xb503, x13, 1736, x1)
+
+inst_453:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x55555556, 0x0, 0x55555556, x13, 1740, x1)
+
+inst_454:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaab, 0x0, -0x55555555, x13, 1744, x1)
+
+inst_455:
+// rs1_val==0 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x0, 0x6, x13, 1748, x1)
+
+inst_456:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x33333334, 0x0, 0x33333334, x13, 1752, x1)
+
+inst_457:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x66666667, 0x0, 0x66666667, x13, 1756, x1)
+
+inst_458:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4afd, 0x0, -0xb503, x13, 1760, x1)
+
+inst_459:
+// rs1_val==0 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0xb505, 0x0, 0xb505, x13, 1764, x1)
+
+inst_460:
+// rs1_val==4 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0x4, 0x3, x13, 1768, x1)
+
+inst_461:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x55555551, 0x4, 0x55555555, x13, 1772, x1)
+
+inst_462:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaae, 0x4, -0x55555556, x13, 1776, x1)
+
+inst_463:
+// rs1_val==4 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x4, 0x5, x13, 1780, x1)
+
+inst_464:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x33333337, 0x4, 0x33333333, x13, 1784, x1)
+
+inst_465:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x66666662, 0x4, 0x66666666, x13, 1788, x1)
+
+inst_466:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4af8, 0x4, -0xb504, x13, 1792, x1)
+
+inst_467:
+// rs1_val==4 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xb500, 0x4, 0xb504, x13, 1796, x1)
+
+inst_468:
+// rs1_val==4 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x4, 0x2, x13, 1800, x1)
+
+inst_469:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x55555550, 0x4, 0x55555554, x13, 1804, x1)
+
+inst_470:
+// rs1_val==4 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x4, 0x4, 0x0, x13, 1808, x1)
+
+inst_471:
+// rs1_val==4 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x4, 0x4, x13, 1812, x1)
+
+inst_472:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x33333336, 0x4, 0x33333332, x13, 1816, x1)
+
+inst_473:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x66666661, 0x4, 0x66666665, x13, 1820, x1)
+
+inst_474:
+// rs1_val==4 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xb507, 0x4, 0xb503, x13, 1824, x1)
+
+inst_475:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x55555552, 0x4, 0x55555556, x13, 1828, x1)
+
+inst_476:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaf, 0x4, -0x55555555, x13, 1832, x1)
+
+inst_477:
+// rs1_val==4 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x4, 0x6, x13, 1836, x1)
+
+inst_478:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x33333330, 0x4, 0x33333334, x13, 1840, x1)
+
+inst_479:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x66666663, 0x4, 0x66666667, x13, 1844, x1)
+
+inst_480:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xffff4af9, 0x4, -0xb503, x13, 1848, x1)
+
+inst_481:
+// rs1_val==4 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0xb501, 0x4, 0xb505, x13, 1852, x1)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x33333331, 0x33333332, 0x3, x13, 1856, x1)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x66666667, 0x33333332, 0x55555555, x13, 1860, x1)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x99999998, 0x33333332, -0x55555556, x13, 1864, x1)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x33333337, 0x33333332, 0x5, x13, 1868, x1)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x33333332, 0x33333333, x13, 1872, x1)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x55555554, 0x33333332, 0x66666666, x13, 1876, x1)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xcccc79ce, 0x33333332, -0xb504, x13, 1880, x1)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x33338636, 0x33333332, 0xb504, x13, 1884, x1)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x33333330, 0x33333332, 0x2, x13, 1888, x1)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666, 0x33333332, 0x55555554, x13, 1892, x1)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x33333332, 0x33333332, 0x0, x13, 1896, x1)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x33333336, 0x33333332, 0x4, x13, 1900, x1)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x33333332, 0x33333332, x13, 1904, x1)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x55555557, 0x33333332, 0x66666665, x13, 1908, x1)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x33338631, 0x33333332, 0xb503, x13, 1912, x1)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x66666664, 0x33333332, 0x55555556, x13, 1916, x1)
+
+inst_498:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x99999999, 0x33333332, -0x55555555, x13, 1920, x1)
+
+inst_499:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x33333334, 0x33333332, 0x6, x13, 1924, x1)
+
+inst_500:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x33333332, 0x33333334, x13, 1928, x1)
+
+inst_501:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555, 0x33333332, 0x66666667, x13, 1932, x1)
+
+inst_502:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xcccc79cf, 0x33333332, -0xb503, x13, 1936, x1)
+
+inst_503:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0x33338637, 0x33333332, 0xb505, x13, 1940, x1)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x33333330, 0x66666665, 0x55555555, x13, 1944, x1)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccf, 0x66666665, -0x55555556, x13, 1948, x1)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x66666660, 0x66666665, 0x5, x13, 1952, x1)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x55555556, 0x66666665, 0x33333333, x13, 1956, x1)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x66666665, 0x66666666, x13, 1960, x1)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x99992c99, 0x66666665, -0xb504, x13, 1964, x1)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d361, 0x66666665, 0xb504, x13, 1968, x1)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x66666667, 0x66666665, 0x2, x13, 1972, x1)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x33333331, 0x66666665, 0x55555554, x13, 1976, x1)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x66666665, 0x66666665, 0x0, x13, 1980, x1)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x66666661, 0x66666665, 0x4, x13, 1984, x1)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x55555557, 0x66666665, 0x33333332, x13, 1988, x1)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x66666665, 0x66666665, x13, 1992, x1)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d366, 0x66666665, 0xb503, x13, 1996, x1)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x33333333, 0x66666665, 0x55555556, x13, 2000, x1)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xccccccce, 0x66666665, -0x55555555, x13, 2004, x1)
+
+inst_520:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x66666663, 0x66666665, 0x6, x13, 2008, x1)
+
+inst_521:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x55555551, 0x66666665, 0x33333334, x13, 2012, x1)
+
+inst_522:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x66666665, 0x66666667, x13, 2016, x1)
+
+inst_523:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x99992c98, 0x66666665, -0xb503, x13, 2020, x1)
+
+inst_524:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d360, 0x66666665, 0xb505, x13, 2024, x1)
+
+inst_525:
+// rs1_val==46339 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xb500, 0xb503, 0x3, x13, 2028, x1)
+
+inst_526:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e056, 0xb503, 0x55555555, x13, 2032, x1)
+
+inst_527:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fa9, 0xb503, -0x55555556, x13, 2036, x1)
+
+inst_528:
+// rs1_val==46339 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xb506, 0xb503, 0x5, x13, 2040, x1)
+
+inst_529:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x33338630, 0xb503, 0x33333333, x13, 2044, x1)
+RVTEST_SIGBASE( x13,signature_x13_1)
+
+inst_530:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d365, 0xb503, 0x66666666, x13, 0, x1)
+
+inst_531:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff, 0xb503, -0xb504, x13, 4, x1)
+
+inst_532:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0xb503, 0xb504, x13, 8, x1)
+
+inst_533:
+// rs1_val==46339 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xb501, 0xb503, 0x2, x13, 12, x1)
+
+inst_534:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e057, 0xb503, 0x55555554, x13, 16, x1)
+
+inst_535:
+// rs1_val==46339 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xb503, 0xb503, 0x0, x13, 20, x1)
+
+inst_536:
+// rs1_val==46339 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xb507, 0xb503, 0x4, x13, 24, x1)
+
+inst_537:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x33338631, 0xb503, 0x33333332, x13, 28, x1)
+
+inst_538:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d366, 0xb503, 0x66666665, x13, 32, x1)
+
+inst_539:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0xb503, 0xb503, x13, 36, x1)
+
+inst_540:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e055, 0xb503, 0x55555556, x13, 40, x1)
+
+inst_541:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fa8, 0xb503, -0x55555555, x13, 44, x1)
+
+inst_542:
+// rs1_val==46339 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xb505, 0xb503, 0x6, x13, 48, x1)
+
+inst_543:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x33338637, 0xb503, 0x33333334, x13, 52, x1)
+
+inst_544:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x6666d364, 0xb503, 0x66666667, x13, 56, x1)
+
+inst_545:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffe, 0xb503, -0xb503, x13, 60, x1)
+
+inst_546:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0xb503, 0xb505, x13, 64, x1)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555, 0x55555556, 0x3, x13, 68, x1)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x55555556, 0x55555555, x13, 72, x1)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffc, 0x55555556, -0x55555556, x13, 76, x1)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x55555553, 0x55555556, 0x5, x13, 80, x1)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x66666665, 0x55555556, 0x33333333, x13, 84, x1)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0x33333330, 0x55555556, 0x66666666, x13, 88, x1)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1faa, 0x55555556, -0xb504, x13, 92, x1)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e052, 0x55555556, 0xb504, x13, 96, x1)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x55555554, 0x55555556, 0x2, x13, 100, x1)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x55555556, 0x55555554, x13, 104, x1)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x55555556, 0x55555556, 0x0, x13, 108, x1)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x55555552, 0x55555556, 0x4, x13, 112, x1)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x66666664, 0x55555556, 0x33333332, x13, 116, x1)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0x33333333, 0x55555556, 0x66666665, x13, 120, x1)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e055, 0x55555556, 0xb503, x13, 124, x1)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x55555556, 0x55555556, x13, 128, x1)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffd, 0x55555556, -0x55555555, x13, 132, x1)
+
+inst_564:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x55555550, 0x55555556, 0x6, x13, 136, x1)
+
+inst_565:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(xor, x12, x10, x11, 0x66666662, 0x55555556, 0x33333334, x13, 140, x1)
+
+inst_566:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(xor, x12, x10, x11, 0x33333331, 0x55555556, 0x66666667, x13, 144, x1)
+
+inst_567:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fab, 0x55555556, -0xb503, x13, 148, x1)
+
+inst_568:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e053, 0x55555556, 0xb505, x13, 152, x1)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaa8, -0x55555555, 0x3, x13, 156, x1)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555555
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffe, -0x55555555, 0x55555555, x13, 160, x1)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0x1, -0x55555555, -0x55555556, x13, 164, x1)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaae, -0x55555555, 0x5, x13, 168, x1)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333333
+TEST_RR_OP(xor, x12, x10, x11, 0x99999998, -0x55555555, 0x33333333, x13, 172, x1)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666666
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccd, -0x55555555, 0x66666666, x13, 176, x1)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0x5555e057, -0x55555555, -0xb504, x13, 180, x1)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb504
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1faf, -0x55555555, 0xb504, x13, 184, x1)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaa9, -0x55555555, 0x2, x13, 188, x1)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555554
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff, -0x55555555, 0x55555554, x13, 192, x1)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaab, -0x55555555, 0x0, x13, 196, x1)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaf, -0x55555555, 0x4, x13, 200, x1)
+
+inst_581:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333332
+TEST_RR_OP(xor, x12, x10, x11, 0x99999999, -0x55555555, 0x33333332, x13, 204, x1)
+
+inst_582:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666665
+TEST_RR_OP(xor, x12, x10, x11, 0xccccccce, -0x55555555, 0x66666665, x13, 208, x1)
+
+inst_583:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb503
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaa1fa8, -0x55555555, 0xb503, x13, 212, x1)
+
+inst_584:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555556
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffd, -0x55555555, 0x55555556, x13, 216, x1)
+
+inst_585:
+// rs1_val < 0 and rs2_val < 0, rs1_val == -16385, rs2_val == -65537
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:-0x10001
+TEST_RR_OP(xor, x12, x10, x11, 0x14000, -0x4001, -0x10001, x13, 220, x1)
+
+inst_586:
+// rs1_val == (2**(xlen-1)-1), rs2_val == 4096, rs1_val == 2147483647
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffff; op2val:0x1000
+TEST_RR_OP(xor, x12, x10, x11, 0x7fffefff, 0x7fffffff, 0x1000, x13, 224, x1)
+
+inst_587:
+// rs2_val == 1024, rs1_val == 128
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0x400
+TEST_RR_OP(xor, x12, x10, x11, 0x480, 0x80, 0x400, x13, 228, x1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x7_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_1:
+ .fill 18*(XLEN/32),4,0xdeadbeef
+
+
+signature_x13_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x13_1:
+ .fill 58*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/I/xori-01.S b/riscof/suite/rv32i_m/I/xori-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..91024be87e1adfc929b66f248d28ec0108cccfae
--- /dev/null
+++ b/riscof/suite/rv32i_m/I/xori-01.S
@@ -0,0 +1,2909 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:36:11 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the xori instruction of the RISC-V I extension for the xori covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",xori)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rs1 != rd, rs1==x24, rd==x10, imm_val == (-2**(12-1)), imm_val == -2048, rs1_val != imm_val, rs1_val > 0 and imm_val < 0
+// opcode: xori ; op1:x24; dest:x10; op1val:0x33333334; immval:-0x800
+TEST_IMM_OP( xori, x10, x24, 0xcccccb34, 0x33333334, -0x800, x2, 0, x13)
+
+inst_1:
+// rs1 == rd, rs1==x18, rd==x18, imm_val == 0, rs1_val == 4, rs1_val==4 and imm_val==0
+// opcode: xori ; op1:x18; dest:x18; op1val:0x4; immval:0x0
+TEST_IMM_OP( xori, x18, x18, 0x4, 0x4, 0x0, x2, 4, x13)
+
+inst_2:
+// rs1==x15, rd==x24, imm_val == (2**(12-1)-1), rs1_val < 0 and imm_val > 0, imm_val == 2047
+// opcode: xori ; op1:x15; dest:x24; op1val:-0x4; immval:0x7ff
+TEST_IMM_OP( xori, x24, x15, 0xfffff803, -0x4, 0x7ff, x2, 8, x13)
+
+inst_3:
+// rs1==x11, rd==x20, imm_val == 1, rs1_val > 0 and imm_val > 0, rs1_val == 2
+// opcode: xori ; op1:x11; dest:x20; op1val:0x2; immval:0x1
+TEST_IMM_OP( xori, x20, x11, 0x3, 0x2, 0x1, x2, 12, x13)
+
+inst_4:
+// rs1==x7, rd==x21, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648
+// opcode: xori ; op1:x7; dest:x21; op1val:-0x80000000; immval:0x554
+TEST_IMM_OP( xori, x21, x7, 0x80000554, -0x80000000, 0x554, x2, 16, x13)
+
+inst_5:
+// rs1==x17, rd==x27, rs1_val == 0, imm_val == -1025
+// opcode: xori ; op1:x17; dest:x27; op1val:0x0; immval:-0x401
+TEST_IMM_OP( xori, x27, x17, 0xfffffbff, 0x0, -0x401, x2, 20, x13)
+
+inst_6:
+// rs1==x22, rd==x1, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647
+// opcode: xori ; op1:x22; dest:x1; op1val:0x7fffffff; immval:-0xa
+TEST_IMM_OP( xori, x1, x22, 0x80000009, 0x7fffffff, -0xa, x2, 24, x13)
+
+inst_7:
+// rs1==x20, rd==x22, rs1_val == 1, imm_val == 4
+// opcode: xori ; op1:x20; dest:x22; op1val:0x1; immval:0x4
+TEST_IMM_OP( xori, x22, x20, 0x5, 0x1, 0x4, x2, 28, x13)
+
+inst_8:
+// rs1==x19, rd==x31, rs1_val == imm_val, imm_val == -513, rs1_val < 0 and imm_val < 0, rs1_val == -513
+// opcode: xori ; op1:x19; dest:x31; op1val:-0x201; immval:-0x201
+TEST_IMM_OP( xori, x31, x19, 0x0, -0x201, -0x201, x2, 32, x13)
+
+inst_9:
+// rs1==x9, rd==x5, imm_val == 2, rs1_val == -33
+// opcode: xori ; op1:x9; dest:x5; op1val:-0x21; immval:0x2
+TEST_IMM_OP( xori, x5, x9, 0xffffffdd, -0x21, 0x2, x2, 36, x13)
+
+inst_10:
+// rs1==x28, rd==x29, imm_val == 8,
+// opcode: xori ; op1:x28; dest:x29; op1val:-0x80000000; immval:0x8
+TEST_IMM_OP( xori, x29, x28, 0x80000008, -0x80000000, 0x8, x2, 40, x13)
+
+inst_11:
+// rs1==x30, rd==x4, imm_val == 16, rs1_val == -1073741825
+// opcode: xori ; op1:x30; dest:x4; op1val:-0x40000001; immval:0x10
+TEST_IMM_OP( xori, x4, x30, 0xbfffffef, -0x40000001, 0x10, x2, 44, x13)
+
+inst_12:
+// rs1==x27, rd==x8, imm_val == 32,
+// opcode: xori ; op1:x27; dest:x8; op1val:0x7fffffff; immval:0x20
+TEST_IMM_OP( xori, x8, x27, 0x7fffffdf, 0x7fffffff, 0x20, x2, 48, x13)
+
+inst_13:
+// rs1==x3, rd==x25, imm_val == 64,
+// opcode: xori ; op1:x3; dest:x25; op1val:0x66666666; immval:0x40
+TEST_IMM_OP( xori, x25, x3, 0x66666626, 0x66666666, 0x40, x2, 52, x13)
+
+inst_14:
+// rs1==x31, rd==x17, imm_val == 128, rs1_val == -524289
+// opcode: xori ; op1:x31; dest:x17; op1val:-0x80001; immval:0x80
+TEST_IMM_OP( xori, x17, x31, 0xfff7ff7f, -0x80001, 0x80, x2, 56, x13)
+
+inst_15:
+// rs1==x29, rd==x16, imm_val == 256,
+// opcode: xori ; op1:x29; dest:x16; op1val:-0xb504; immval:0x100
+TEST_IMM_OP( xori, x16, x29, 0xffff4bfc, -0xb504, 0x100, x2, 60, x13)
+
+inst_16:
+// rs1==x4, rd==x6, imm_val == 512,
+// opcode: xori ; op1:x4; dest:x6; op1val:0x0; immval:0x200
+TEST_IMM_OP( xori, x6, x4, 0x200, 0x0, 0x200, x2, 64, x13)
+
+inst_17:
+// rs1==x14, rd==x3, imm_val == 1024, rs1_val == -1048577
+// opcode: xori ; op1:x14; dest:x3; op1val:-0x100001; immval:0x400
+TEST_IMM_OP( xori, x3, x14, 0xffeffbff, -0x100001, 0x400, x2, 68, x13)
+
+inst_18:
+// rs1==x12, rd==x15, imm_val == -2,
+// opcode: xori ; op1:x12; dest:x15; op1val:-0x7; immval:-0x2
+TEST_IMM_OP( xori, x15, x12, 0x7, -0x7, -0x2, x2, 72, x13)
+
+inst_19:
+// rs1==x21, rd==x9, imm_val == -3,
+// opcode: xori ; op1:x21; dest:x9; op1val:0x5; immval:-0x3
+TEST_IMM_OP( xori, x9, x21, 0xfffffff8, 0x5, -0x3, x2, 76, x4)
+
+inst_20:
+// rs1==x10, rd==x19, imm_val == -5,
+// opcode: xori ; op1:x10; dest:x19; op1val:-0xb504; immval:-0x5
+TEST_IMM_OP( xori, x19, x10, 0xb507, -0xb504, -0x5, x2, 80, x4)
+
+inst_21:
+// rs1==x16, rd==x26, imm_val == -9,
+// opcode: xori ; op1:x16; dest:x26; op1val:0x1; immval:-0x9
+TEST_IMM_OP( xori, x26, x16, 0xfffffff6, 0x1, -0x9, x2, 84, x4)
+RVTEST_SIGBASE( x3,signature_x3_0)
+
+inst_22:
+// rs1==x26, rd==x30, imm_val == -17,
+// opcode: xori ; op1:x26; dest:x30; op1val:0x66666667; immval:-0x11
+TEST_IMM_OP( xori, x30, x26, 0x99999988, 0x66666667, -0x11, x3, 0, x4)
+
+inst_23:
+// rs1==x1, rd==x23, imm_val == -33, rs1_val == -65
+// opcode: xori ; op1:x1; dest:x23; op1val:-0x41; immval:-0x21
+TEST_IMM_OP( xori, x23, x1, 0x60, -0x41, -0x21, x3, 4, x4)
+
+inst_24:
+// rs1==x6, rd==x0, imm_val == -65,
+// opcode: xori ; op1:x6; dest:x0; op1val:-0x1; immval:-0x41
+TEST_IMM_OP( xori, x0, x6, 0, -0x1, -0x41, x3, 8, x4)
+
+inst_25:
+// rs1==x2, rd==x7, imm_val == -129, rs1_val == 1431655765
+// opcode: xori ; op1:x2; dest:x7; op1val:0x55555555; immval:-0x81
+TEST_IMM_OP( xori, x7, x2, 0xaaaaaa2a, 0x55555555, -0x81, x3, 12, x4)
+
+inst_26:
+// rs1==x0, rd==x14, imm_val == -257,
+// opcode: xori ; op1:x0; dest:x14; op1val:0x0; immval:-0x101
+TEST_IMM_OP( xori, x14, x0, 0xfffffeff, 0x0, -0x101, x3, 16, x4)
+
+inst_27:
+// rs1==x8, rd==x13, imm_val == 1365,
+// opcode: xori ; op1:x8; dest:x13; op1val:0x3fffffff; immval:0x555
+TEST_IMM_OP( xori, x13, x8, 0x3ffffaaa, 0x3fffffff, 0x555, x3, 20, x4)
+
+inst_28:
+// rs1==x25, rd==x12, imm_val == -1366,
+// opcode: xori ; op1:x25; dest:x12; op1val:-0x7; immval:-0x556
+TEST_IMM_OP( xori, x12, x25, 0x553, -0x7, -0x556, x3, 24, x4)
+
+inst_29:
+// rs1==x13, rd==x11, rs1_val == 8,
+// opcode: xori ; op1:x13; dest:x11; op1val:0x8; immval:0x0
+TEST_IMM_OP( xori, x11, x13, 0x8, 0x8, 0x0, x3, 28, x4)
+
+inst_30:
+// rs1==x23, rd==x2, rs1_val == 16,
+// opcode: xori ; op1:x23; dest:x2; op1val:0x10; immval:0x1
+TEST_IMM_OP( xori, x2, x23, 0x11, 0x10, 0x1, x3, 32, x4)
+
+inst_31:
+// rs1==x5, rd==x28, rs1_val == 32,
+// opcode: xori ; op1:x5; dest:x28; op1val:0x20; immval:0x555
+TEST_IMM_OP( xori, x28, x5, 0x575, 0x20, 0x555, x3, 36, x4)
+
+inst_32:
+// rs1_val == 64,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x40; immval:0x100
+TEST_IMM_OP( xori, x11, x10, 0x140, 0x40, 0x100, x3, 40, x4)
+
+inst_33:
+// rs1_val == 128,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x80; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x85, 0x80, 0x5, x3, 44, x4)
+
+inst_34:
+// rs1_val == 256,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x100; immval:-0x41
+TEST_IMM_OP( xori, x11, x10, 0xfffffebf, 0x100, -0x41, x3, 48, x4)
+
+inst_35:
+// rs1_val == 512,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x200; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x202, 0x200, 0x2, x3, 52, x4)
+
+inst_36:
+// rs1_val == 1024,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x400; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xfffffeab, 0x400, -0x555, x3, 56, x4)
+
+inst_37:
+// rs1_val == 2048,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x800; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x804, 0x800, 0x4, x3, 60, x4)
+
+inst_38:
+// rs1_val == 4096,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x1000; immval:0x8
+TEST_IMM_OP( xori, x11, x10, 0x1008, 0x1000, 0x8, x3, 64, x4)
+
+inst_39:
+// rs1_val == 8192,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2000; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x2554, 0x2000, 0x554, x3, 68, x4)
+
+inst_40:
+// rs1_val == 16384,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4000; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x4004, 0x4000, 0x4, x3, 72, x4)
+
+inst_41:
+// rs1_val == 32768,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x8000; immval:0x7ff
+TEST_IMM_OP( xori, x11, x10, 0x87ff, 0x8000, 0x7ff, x3, 76, x4)
+
+inst_42:
+// rs1_val == 65536,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x10000; immval:0x40
+TEST_IMM_OP( xori, x11, x10, 0x10040, 0x10000, 0x40, x3, 80, x4)
+
+inst_43:
+// rs1_val == 131072,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x20000; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x2002c, 0x20000, 0x2c, x3, 84, x4)
+
+inst_44:
+// rs1_val == 262144,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x40000; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffbfaaa, 0x40000, -0x556, x3, 88, x4)
+
+inst_45:
+// rs1_val == 524288,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x80000; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x80333, 0x80000, 0x333, x3, 92, x4)
+
+inst_46:
+// rs1_val == 1048576,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x100000; immval:-0x6
+TEST_IMM_OP( xori, x11, x10, 0xffeffffa, 0x100000, -0x6, x3, 96, x4)
+
+inst_47:
+// rs1_val == 2097152,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x200000; immval:-0x3
+TEST_IMM_OP( xori, x11, x10, 0xffdffffd, 0x200000, -0x3, x3, 100, x4)
+
+inst_48:
+// rs1_val == 4194304,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x400000; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x400555, 0x400000, 0x555, x3, 104, x4)
+
+inst_49:
+// rs1_val == 8388608,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x800000; immval:-0x9
+TEST_IMM_OP( xori, x11, x10, 0xff7ffff7, 0x800000, -0x9, x3, 108, x4)
+
+inst_50:
+// rs1_val == 16777216,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x1000000; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x1000005, 0x1000000, 0x5, x3, 112, x4)
+
+inst_51:
+// rs1_val == 33554432,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2000000; immval:-0x201
+TEST_IMM_OP( xori, x11, x10, 0xfdfffdff, 0x2000000, -0x201, x3, 116, x4)
+
+inst_52:
+// rs1_val == 67108864,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4000000; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x4000000, 0x4000000, 0x0, x3, 120, x4)
+
+inst_53:
+// rs1_val == 134217728,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x8000000; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x8000334, 0x8000000, 0x334, x3, 124, x4)
+
+inst_54:
+// rs1_val == 268435456,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x10000000; immval:-0x41
+TEST_IMM_OP( xori, x11, x10, 0xefffffbf, 0x10000000, -0x41, x3, 128, x4)
+
+inst_55:
+// rs1_val == 536870912,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x20000000; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x20000555, 0x20000000, 0x555, x3, 132, x4)
+
+inst_56:
+// rs1_val == 1073741824,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x40000000; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xbffffaaa, 0x40000000, -0x556, x3, 136, x4)
+
+inst_57:
+// rs1_val == -2,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x2; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xfffffffa, -0x2, 0x4, x3, 140, x4)
+
+inst_58:
+// rs1_val == -3,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x3; immval:-0x3
+TEST_IMM_OP( xori, x11, x10, 0x0, -0x3, -0x3, x3, 144, x4)
+
+inst_59:
+// rs1_val == -5,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5; immval:-0x400
+TEST_IMM_OP( xori, x11, x10, 0x3fb, -0x5, -0x400, x3, 148, x4)
+
+inst_60:
+// rs1_val == -9,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x9; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0x55c, -0x9, -0x555, x3, 152, x4)
+
+inst_61:
+// rs1_val == -17,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x11; immval:0x80
+TEST_IMM_OP( xori, x11, x10, 0xffffff6f, -0x11, 0x80, x3, 156, x4)
+
+inst_62:
+// rs1_val == -129,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x81; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xfffff919, -0x81, 0x666, x3, 160, x4)
+
+inst_63:
+// rs1_val == -257,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x101; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xfffffef9, -0x101, 0x6, x3, 164, x4)
+
+inst_64:
+// rs1_val == -1025,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x401; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xfffffbf9, -0x401, 0x6, x3, 168, x4)
+
+inst_65:
+// rs1_val == -2049,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x801; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xfffff7fd, -0x801, 0x2, x3, 172, x4)
+
+inst_66:
+// rs1_val == -4097,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x1001; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xffffefff, -0x1001, 0x0, x3, 176, x4)
+
+inst_67:
+// rs1_val == -8193,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x2001; immval:0x7ff
+TEST_IMM_OP( xori, x11, x10, 0xffffd800, -0x2001, 0x7ff, x3, 180, x4)
+
+inst_68:
+// rs1_val == -16385,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x4001; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x402b, -0x4001, -0x2c, x3, 184, x4)
+
+inst_69:
+// rs1_val == -32769,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x8001; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xffff799a, -0x8001, 0x665, x3, 188, x4)
+
+inst_70:
+// rs1_val == -65537,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x10001; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xfffefccd, -0x10001, 0x332, x3, 192, x4)
+
+inst_71:
+// rs1_val == -131073,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x20001; immval:-0x101
+TEST_IMM_OP( xori, x11, x10, 0x20100, -0x20001, -0x101, x3, 196, x4)
+
+inst_72:
+// rs1_val == -262145,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x40001; immval:-0x800
+TEST_IMM_OP( xori, x11, x10, 0x407ff, -0x40001, -0x800, x3, 200, x4)
+
+inst_73:
+// rs1_val == -2097153,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x200001; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xffdfffff, -0x200001, 0x0, x3, 204, x4)
+
+inst_74:
+// rs1_val == -4194305,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x400001; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xffbff99a, -0x400001, 0x665, x3, 208, x4)
+
+inst_75:
+// rs1_val == -8388609,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x800001; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xff7ff998, -0x800001, 0x667, x3, 212, x4)
+
+inst_76:
+// rs1_val == -16777217,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x1000001; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0x1000555, -0x1000001, -0x556, x3, 216, x4)
+
+inst_77:
+// rs1_val == -33554433,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x2000001; immval:-0x8
+TEST_IMM_OP( xori, x11, x10, 0x2000007, -0x2000001, -0x8, x3, 220, x4)
+
+inst_78:
+// rs1_val == -67108865,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x4000001; immval:-0x2
+TEST_IMM_OP( xori, x11, x10, 0x4000001, -0x4000001, -0x2, x3, 224, x4)
+
+inst_79:
+// rs1_val == -134217729,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x8000001; immval:-0x400
+TEST_IMM_OP( xori, x11, x10, 0x80003ff, -0x8000001, -0x400, x3, 228, x4)
+
+inst_80:
+// rs1_val == -268435457,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x10000001; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x1000002b, -0x10000001, -0x2c, x3, 232, x4)
+
+inst_81:
+// rs1_val == -536870913,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x20000001; immval:-0x101
+TEST_IMM_OP( xori, x11, x10, 0x20000100, -0x20000001, -0x101, x3, 236, x4)
+
+inst_82:
+// rs1_val == -1431655766,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x200
+TEST_IMM_OP( xori, x11, x10, 0xaaaaa8aa, -0x55555556, 0x200, x3, 240, x4)
+
+inst_83:
+// rs1_val==3 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x0, 0x3, 0x3, x3, 244, x4)
+
+inst_84:
+// rs1_val==3 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x556, 0x3, 0x555, x3, 248, x4)
+
+inst_85:
+// rs1_val==3 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffffaa9, 0x3, -0x556, x3, 252, x4)
+
+inst_86:
+// rs1_val==3 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x6, 0x3, 0x5, x3, 256, x4)
+
+inst_87:
+// rs1_val==3 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x330, 0x3, 0x333, x3, 260, x4)
+
+inst_88:
+// rs1_val==3 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x665, 0x3, 0x666, x3, 264, x4)
+
+inst_89:
+// rs1_val==3 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffd0, 0x3, -0x2d, x3, 268, x4)
+
+inst_90:
+// rs1_val==3 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x2e, 0x3, 0x2d, x3, 272, x4)
+
+inst_91:
+// rs1_val==3 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x1, 0x3, 0x2, x3, 276, x4)
+
+inst_92:
+// rs1_val==3 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x557, 0x3, 0x554, x3, 280, x4)
+
+inst_93:
+// rs1_val==3 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x3, 0x3, 0x0, x3, 284, x4)
+
+inst_94:
+// rs1_val==3 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x7, 0x3, 0x4, x3, 288, x4)
+
+inst_95:
+// rs1_val==3 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x331, 0x3, 0x332, x3, 292, x4)
+
+inst_96:
+// rs1_val==3 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x666, 0x3, 0x665, x3, 296, x4)
+
+inst_97:
+// rs1_val==3 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x2f, 0x3, 0x2c, x3, 300, x4)
+
+inst_98:
+// rs1_val==3 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x555, 0x3, 0x556, x3, 304, x4)
+
+inst_99:
+// rs1_val==3 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xfffffaa8, 0x3, -0x555, x3, 308, x4)
+
+inst_100:
+// rs1_val==3 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x5, 0x3, 0x6, x3, 312, x4)
+
+inst_101:
+// rs1_val==3 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x337, 0x3, 0x334, x3, 316, x4)
+
+inst_102:
+// rs1_val==3 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x664, 0x3, 0x667, x3, 320, x4)
+
+inst_103:
+// rs1_val==3 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffd7, 0x3, -0x2c, x3, 324, x4)
+
+inst_104:
+// rs1_val==3 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x2d, 0x3, 0x2e, x3, 328, x4)
+
+inst_105:
+// rs1_val==1431655765 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x55555556, 0x55555555, 0x3, x3, 332, x4)
+
+inst_106:
+// rs1_val==1431655765 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x55555000, 0x55555555, 0x555, x3, 336, x4)
+
+inst_107:
+// rs1_val==1431655765 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xaaaaafff, 0x55555555, -0x556, x3, 340, x4)
+
+inst_108:
+// rs1_val==1431655765 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x55555550, 0x55555555, 0x5, x3, 344, x4)
+
+inst_109:
+// rs1_val==1431655765 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x55555666, 0x55555555, 0x333, x3, 348, x4)
+
+inst_110:
+// rs1_val==1431655765 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x55555333, 0x55555555, 0x666, x3, 352, x4)
+
+inst_111:
+// rs1_val==1431655765 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaa86, 0x55555555, -0x2d, x3, 356, x4)
+
+inst_112:
+// rs1_val==1431655765 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x55555578, 0x55555555, 0x2d, x3, 360, x4)
+
+inst_113:
+// rs1_val==1431655765 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x55555557, 0x55555555, 0x2, x3, 364, x4)
+
+inst_114:
+// rs1_val==1431655765 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x55555001, 0x55555555, 0x554, x3, 368, x4)
+
+inst_115:
+// rs1_val==1431655765 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x55555555, 0x55555555, 0x0, x3, 372, x4)
+
+inst_116:
+// rs1_val==1431655765 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x55555551, 0x55555555, 0x4, x3, 376, x4)
+
+inst_117:
+// rs1_val==1431655765 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x55555667, 0x55555555, 0x332, x3, 380, x4)
+
+inst_118:
+// rs1_val==1431655765 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x55555330, 0x55555555, 0x665, x3, 384, x4)
+
+inst_119:
+// rs1_val==1431655765 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x55555579, 0x55555555, 0x2c, x3, 388, x4)
+
+inst_120:
+// rs1_val==1431655765 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x55555003, 0x55555555, 0x556, x3, 392, x4)
+
+inst_121:
+// rs1_val==1431655765 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaffe, 0x55555555, -0x555, x3, 396, x4)
+
+inst_122:
+// rs1_val==1431655765 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x55555553, 0x55555555, 0x6, x3, 400, x4)
+
+inst_123:
+// rs1_val==1431655765 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x55555661, 0x55555555, 0x334, x3, 404, x4)
+
+inst_124:
+// rs1_val==1431655765 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x55555332, 0x55555555, 0x667, x3, 408, x4)
+
+inst_125:
+// rs1_val==1431655765 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaa81, 0x55555555, -0x2c, x3, 412, x4)
+
+inst_126:
+// rs1_val==1431655765 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555555; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x5555557b, 0x55555555, 0x2e, x3, 416, x4)
+
+inst_127:
+// rs1_val==-1431655766 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaa9, -0x55555556, 0x3, x3, 420, x4)
+
+inst_128:
+// rs1_val==-1431655766 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xaaaaafff, -0x55555556, 0x555, x3, 424, x4)
+
+inst_129:
+// rs1_val==-1431655766 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0x55555000, -0x55555556, -0x556, x3, 428, x4)
+
+inst_130:
+// rs1_val==-1431655766 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaf, -0x55555556, 0x5, x3, 432, x4)
+
+inst_131:
+// rs1_val==-1431655766 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xaaaaa999, -0x55555556, 0x333, x3, 436, x4)
+
+inst_132:
+// rs1_val==-1431655766 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaccc, -0x55555556, 0x666, x3, 440, x4)
+
+inst_133:
+// rs1_val==-1431655766 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0x55555579, -0x55555556, -0x2d, x3, 444, x4)
+
+inst_134:
+// rs1_val==-1431655766 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaa87, -0x55555556, 0x2d, x3, 448, x4)
+
+inst_135:
+// rs1_val==-1431655766 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaa8, -0x55555556, 0x2, x3, 452, x4)
+
+inst_136:
+// rs1_val==-1431655766 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaffe, -0x55555556, 0x554, x3, 456, x4)
+
+inst_137:
+// rs1_val==-1431655766 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaa, -0x55555556, 0x0, x3, 460, x4)
+
+inst_138:
+// rs1_val==-1431655766 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaae, -0x55555556, 0x4, x3, 464, x4)
+
+inst_139:
+// rs1_val==-1431655766 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xaaaaa998, -0x55555556, 0x332, x3, 468, x4)
+
+inst_140:
+// rs1_val==-1431655766 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaccf, -0x55555556, 0x665, x3, 472, x4)
+
+inst_141:
+// rs1_val==-1431655766 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaa86, -0x55555556, 0x2c, x3, 476, x4)
+
+inst_142:
+// rs1_val==-1431655766 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaffc, -0x55555556, 0x556, x3, 480, x4)
+
+inst_143:
+// rs1_val==-1431655766 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0x55555001, -0x55555556, -0x555, x3, 484, x4)
+
+inst_144:
+// rs1_val==-1431655766 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaac, -0x55555556, 0x6, x3, 488, x4)
+
+inst_145:
+// rs1_val==-1431655766 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xaaaaa99e, -0x55555556, 0x334, x3, 492, x4)
+
+inst_146:
+// rs1_val==-1431655766 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaccd, -0x55555556, 0x667, x3, 496, x4)
+
+inst_147:
+// rs1_val==-1431655766 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x5555557e, -0x55555556, -0x2c, x3, 500, x4)
+
+inst_148:
+// rs1_val==-1431655766 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaa84, -0x55555556, 0x2e, x3, 504, x4)
+
+inst_149:
+// rs1_val==5 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x6, 0x5, 0x3, x3, 508, x4)
+
+inst_150:
+// rs1_val==5 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x550, 0x5, 0x555, x3, 512, x4)
+
+inst_151:
+// rs1_val==5 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffffaaf, 0x5, -0x556, x3, 516, x4)
+
+inst_152:
+// rs1_val==5 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x0, 0x5, 0x5, x3, 520, x4)
+
+inst_153:
+// rs1_val==5 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x336, 0x5, 0x333, x3, 524, x4)
+
+inst_154:
+// rs1_val==5 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x663, 0x5, 0x666, x3, 528, x4)
+
+inst_155:
+// rs1_val==5 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffd6, 0x5, -0x2d, x3, 532, x4)
+
+inst_156:
+// rs1_val==5 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x28, 0x5, 0x2d, x3, 536, x4)
+
+inst_157:
+// rs1_val==5 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x7, 0x5, 0x2, x3, 540, x4)
+
+inst_158:
+// rs1_val==5 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x551, 0x5, 0x554, x3, 544, x4)
+
+inst_159:
+// rs1_val==5 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x5, 0x5, 0x0, x3, 548, x4)
+
+inst_160:
+// rs1_val==5 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x1, 0x5, 0x4, x3, 552, x4)
+
+inst_161:
+// rs1_val==5 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x337, 0x5, 0x332, x3, 556, x4)
+
+inst_162:
+// rs1_val==5 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x660, 0x5, 0x665, x3, 560, x4)
+
+inst_163:
+// rs1_val==5 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x29, 0x5, 0x2c, x3, 564, x4)
+
+inst_164:
+// rs1_val==5 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x553, 0x5, 0x556, x3, 568, x4)
+
+inst_165:
+// rs1_val==5 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xfffffaae, 0x5, -0x555, x3, 572, x4)
+
+inst_166:
+// rs1_val==5 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x3, 0x5, 0x6, x3, 576, x4)
+
+inst_167:
+// rs1_val==5 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x331, 0x5, 0x334, x3, 580, x4)
+
+inst_168:
+// rs1_val==5 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x662, 0x5, 0x667, x3, 584, x4)
+
+inst_169:
+// rs1_val==5 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffd1, 0x5, -0x2c, x3, 588, x4)
+
+inst_170:
+// rs1_val==5 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x2b, 0x5, 0x2e, x3, 592, x4)
+
+inst_171:
+// rs1_val==858993459 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x33333330, 0x33333333, 0x3, x3, 596, x4)
+
+inst_172:
+// rs1_val==858993459 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x33333666, 0x33333333, 0x555, x3, 600, x4)
+
+inst_173:
+// rs1_val==858993459 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xccccc999, 0x33333333, -0x556, x3, 604, x4)
+
+inst_174:
+// rs1_val==858993459 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x33333336, 0x33333333, 0x5, x3, 608, x4)
+
+inst_175:
+// rs1_val==858993459 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x33333000, 0x33333333, 0x333, x3, 612, x4)
+
+inst_176:
+// rs1_val==858993459 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x33333555, 0x33333333, 0x666, x3, 616, x4)
+
+inst_177:
+// rs1_val==858993459 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xcccccce0, 0x33333333, -0x2d, x3, 620, x4)
+
+inst_178:
+// rs1_val==858993459 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x3333331e, 0x33333333, 0x2d, x3, 624, x4)
+
+inst_179:
+// rs1_val==858993459 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x33333331, 0x33333333, 0x2, x3, 628, x4)
+
+inst_180:
+// rs1_val==858993459 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x33333667, 0x33333333, 0x554, x3, 632, x4)
+
+inst_181:
+// rs1_val==858993459 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x33333333, 0x33333333, 0x0, x3, 636, x4)
+
+inst_182:
+// rs1_val==858993459 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x33333337, 0x33333333, 0x4, x3, 640, x4)
+
+inst_183:
+// rs1_val==858993459 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x33333001, 0x33333333, 0x332, x3, 644, x4)
+
+inst_184:
+// rs1_val==858993459 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x33333556, 0x33333333, 0x665, x3, 648, x4)
+
+inst_185:
+// rs1_val==858993459 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x3333331f, 0x33333333, 0x2c, x3, 652, x4)
+
+inst_186:
+// rs1_val==858993459 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x33333665, 0x33333333, 0x556, x3, 656, x4)
+
+inst_187:
+// rs1_val==858993459 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xccccc998, 0x33333333, -0x555, x3, 660, x4)
+
+inst_188:
+// rs1_val==858993459 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x33333335, 0x33333333, 0x6, x3, 664, x4)
+
+inst_189:
+// rs1_val==858993459 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x33333007, 0x33333333, 0x334, x3, 668, x4)
+
+inst_190:
+// rs1_val==858993459 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x33333554, 0x33333333, 0x667, x3, 672, x4)
+
+inst_191:
+// rs1_val==858993459 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xcccccce7, 0x33333333, -0x2c, x3, 676, x4)
+
+inst_192:
+// rs1_val==858993459 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333333; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x3333331d, 0x33333333, 0x2e, x3, 680, x4)
+
+inst_193:
+// rs1_val==1717986918 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x66666665, 0x66666666, 0x3, x3, 684, x4)
+
+inst_194:
+// rs1_val==1717986918 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x66666333, 0x66666666, 0x555, x3, 688, x4)
+
+inst_195:
+// rs1_val==1717986918 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0x99999ccc, 0x66666666, -0x556, x3, 692, x4)
+
+inst_196:
+// rs1_val==1717986918 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x66666663, 0x66666666, 0x5, x3, 696, x4)
+
+inst_197:
+// rs1_val==1717986918 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x66666555, 0x66666666, 0x333, x3, 700, x4)
+
+inst_198:
+// rs1_val==1717986918 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x66666000, 0x66666666, 0x666, x3, 704, x4)
+
+inst_199:
+// rs1_val==1717986918 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0x999999b5, 0x66666666, -0x2d, x3, 708, x4)
+
+inst_200:
+// rs1_val==1717986918 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x6666664b, 0x66666666, 0x2d, x3, 712, x4)
+
+inst_201:
+// rs1_val==1717986918 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x66666664, 0x66666666, 0x2, x3, 716, x4)
+
+inst_202:
+// rs1_val==1717986918 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x66666332, 0x66666666, 0x554, x3, 720, x4)
+
+inst_203:
+// rs1_val==1717986918 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x66666666, 0x66666666, 0x0, x3, 724, x4)
+
+inst_204:
+// rs1_val==1717986918 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x66666662, 0x66666666, 0x4, x3, 728, x4)
+
+inst_205:
+// rs1_val==1717986918 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x66666554, 0x66666666, 0x332, x3, 732, x4)
+
+inst_206:
+// rs1_val==1717986918 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x66666003, 0x66666666, 0x665, x3, 736, x4)
+
+inst_207:
+// rs1_val==1717986918 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x6666664a, 0x66666666, 0x2c, x3, 740, x4)
+
+inst_208:
+// rs1_val==1717986918 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x66666330, 0x66666666, 0x556, x3, 744, x4)
+
+inst_209:
+// rs1_val==1717986918 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0x99999ccd, 0x66666666, -0x555, x3, 748, x4)
+
+inst_210:
+// rs1_val==1717986918 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x66666660, 0x66666666, 0x6, x3, 752, x4)
+
+inst_211:
+// rs1_val==1717986918 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x66666552, 0x66666666, 0x334, x3, 756, x4)
+
+inst_212:
+// rs1_val==1717986918 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x66666001, 0x66666666, 0x667, x3, 760, x4)
+
+inst_213:
+// rs1_val==1717986918 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x999999b2, 0x66666666, -0x2c, x3, 764, x4)
+
+inst_214:
+// rs1_val==1717986918 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666666; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x66666648, 0x66666666, 0x2e, x3, 768, x4)
+
+inst_215:
+// rs1_val==-46340 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xffff4aff, -0xb504, 0x3, x3, 772, x4)
+
+inst_216:
+// rs1_val==-46340 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xffff4fa9, -0xb504, 0x555, x3, 776, x4)
+
+inst_217:
+// rs1_val==-46340 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xb056, -0xb504, -0x556, x3, 780, x4)
+
+inst_218:
+// rs1_val==-46340 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xffff4af9, -0xb504, 0x5, x3, 784, x4)
+
+inst_219:
+// rs1_val==-46340 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xffff49cf, -0xb504, 0x333, x3, 788, x4)
+
+inst_220:
+// rs1_val==-46340 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xffff4c9a, -0xb504, 0x666, x3, 792, x4)
+
+inst_221:
+// rs1_val==-46340 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xb52f, -0xb504, -0x2d, x3, 796, x4)
+
+inst_222:
+// rs1_val==-46340 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffff4ad1, -0xb504, 0x2d, x3, 800, x4)
+
+inst_223:
+// rs1_val==-46340 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xffff4afe, -0xb504, 0x2, x3, 804, x4)
+
+inst_224:
+// rs1_val==-46340 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xffff4fa8, -0xb504, 0x554, x3, 808, x4)
+
+inst_225:
+// rs1_val==-46340 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xffff4afc, -0xb504, 0x0, x3, 812, x4)
+
+inst_226:
+// rs1_val==-46340 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xffff4af8, -0xb504, 0x4, x3, 816, x4)
+
+inst_227:
+// rs1_val==-46340 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xffff49ce, -0xb504, 0x332, x3, 820, x4)
+
+inst_228:
+// rs1_val==-46340 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xffff4c99, -0xb504, 0x665, x3, 824, x4)
+
+inst_229:
+// rs1_val==-46340 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffff4ad0, -0xb504, 0x2c, x3, 828, x4)
+
+inst_230:
+// rs1_val==-46340 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xffff4faa, -0xb504, 0x556, x3, 832, x4)
+
+inst_231:
+// rs1_val==-46340 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xb057, -0xb504, -0x555, x3, 836, x4)
+
+inst_232:
+// rs1_val==-46340 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xffff4afa, -0xb504, 0x6, x3, 840, x4)
+
+inst_233:
+// rs1_val==-46340 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xffff49c8, -0xb504, 0x334, x3, 844, x4)
+
+inst_234:
+// rs1_val==-46340 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xffff4c9b, -0xb504, 0x667, x3, 848, x4)
+
+inst_235:
+// rs1_val==-46340 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xb528, -0xb504, -0x2c, x3, 852, x4)
+
+inst_236:
+// rs1_val==-46340 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xffff4ad2, -0xb504, 0x2e, x3, 856, x4)
+
+inst_237:
+// rs1_val==46340 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xb507, 0xb504, 0x3, x3, 860, x4)
+
+inst_238:
+// rs1_val==46340 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xb051, 0xb504, 0x555, x3, 864, x4)
+
+inst_239:
+// rs1_val==46340 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xffff4fae, 0xb504, -0x556, x3, 868, x4)
+
+inst_240:
+// rs1_val==46340 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xb501, 0xb504, 0x5, x3, 872, x4)
+
+inst_241:
+// rs1_val==46340 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xb637, 0xb504, 0x333, x3, 876, x4)
+
+inst_242:
+// rs1_val==46340 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xb362, 0xb504, 0x666, x3, 880, x4)
+
+inst_243:
+// rs1_val==46340 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffff4ad7, 0xb504, -0x2d, x3, 884, x4)
+
+inst_244:
+// rs1_val==46340 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xb529, 0xb504, 0x2d, x3, 888, x4)
+
+inst_245:
+// rs1_val==46340 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xb506, 0xb504, 0x2, x3, 892, x4)
+
+inst_246:
+// rs1_val==46340 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xb050, 0xb504, 0x554, x3, 896, x4)
+
+inst_247:
+// rs1_val==46340 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xb504, 0xb504, 0x0, x3, 900, x4)
+
+inst_248:
+// rs1_val==46340 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xb500, 0xb504, 0x4, x3, 904, x4)
+
+inst_249:
+// rs1_val==46340 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xb636, 0xb504, 0x332, x3, 908, x4)
+
+inst_250:
+// rs1_val==46340 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xb361, 0xb504, 0x665, x3, 912, x4)
+
+inst_251:
+// rs1_val==46340 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xb528, 0xb504, 0x2c, x3, 916, x4)
+
+inst_252:
+// rs1_val==46340 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xb052, 0xb504, 0x556, x3, 920, x4)
+
+inst_253:
+// rs1_val==46340 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xffff4faf, 0xb504, -0x555, x3, 924, x4)
+
+inst_254:
+// rs1_val==46340 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xb502, 0xb504, 0x6, x3, 928, x4)
+
+inst_255:
+// rs1_val==46340 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xb630, 0xb504, 0x334, x3, 932, x4)
+
+inst_256:
+// rs1_val==46340 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xb363, 0xb504, 0x667, x3, 936, x4)
+
+inst_257:
+// rs1_val==46340 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffff4ad0, 0xb504, -0x2c, x3, 940, x4)
+
+inst_258:
+// rs1_val==46340 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xb52a, 0xb504, 0x2e, x3, 944, x4)
+
+inst_259:
+// rs1_val==2 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x1, 0x2, 0x3, x3, 948, x4)
+
+inst_260:
+// rs1_val==2 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x557, 0x2, 0x555, x3, 952, x4)
+
+inst_261:
+// rs1_val==2 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffffaa8, 0x2, -0x556, x3, 956, x4)
+
+inst_262:
+// rs1_val==2 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x7, 0x2, 0x5, x3, 960, x4)
+
+inst_263:
+// rs1_val==2 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x331, 0x2, 0x333, x3, 964, x4)
+
+inst_264:
+// rs1_val==2 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x664, 0x2, 0x666, x3, 968, x4)
+
+inst_265:
+// rs1_val==2 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffd1, 0x2, -0x2d, x3, 972, x4)
+
+inst_266:
+// rs1_val==2 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x2f, 0x2, 0x2d, x3, 976, x4)
+
+inst_267:
+// rs1_val==2 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x0, 0x2, 0x2, x3, 980, x4)
+
+inst_268:
+// rs1_val==2 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x556, 0x2, 0x554, x3, 984, x4)
+
+inst_269:
+// rs1_val==2 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x2, 0x2, 0x0, x3, 988, x4)
+
+inst_270:
+// rs1_val==2 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x6, 0x2, 0x4, x3, 992, x4)
+
+inst_271:
+// rs1_val==2 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x330, 0x2, 0x332, x3, 996, x4)
+
+inst_272:
+// rs1_val==2 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x667, 0x2, 0x665, x3, 1000, x4)
+
+inst_273:
+// rs1_val==2 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x2e, 0x2, 0x2c, x3, 1004, x4)
+
+inst_274:
+// rs1_val==2 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x554, 0x2, 0x556, x3, 1008, x4)
+
+inst_275:
+// rs1_val==2 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xfffffaa9, 0x2, -0x555, x3, 1012, x4)
+
+inst_276:
+// rs1_val==2 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x4, 0x2, 0x6, x3, 1016, x4)
+
+inst_277:
+// rs1_val==2 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x336, 0x2, 0x334, x3, 1020, x4)
+
+inst_278:
+// rs1_val==2 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x665, 0x2, 0x667, x3, 1024, x4)
+
+inst_279:
+// rs1_val==2 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffd6, 0x2, -0x2c, x3, 1028, x4)
+
+inst_280:
+// rs1_val==2 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x2c, 0x2, 0x2e, x3, 1032, x4)
+
+inst_281:
+// rs1_val==1431655764 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x55555557, 0x55555554, 0x3, x3, 1036, x4)
+
+inst_282:
+// rs1_val==1431655764 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x55555001, 0x55555554, 0x555, x3, 1040, x4)
+
+inst_283:
+// rs1_val==1431655764 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaffe, 0x55555554, -0x556, x3, 1044, x4)
+
+inst_284:
+// rs1_val==1431655764 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x55555551, 0x55555554, 0x5, x3, 1048, x4)
+
+inst_285:
+// rs1_val==1431655764 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x55555667, 0x55555554, 0x333, x3, 1052, x4)
+
+inst_286:
+// rs1_val==1431655764 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x55555332, 0x55555554, 0x666, x3, 1056, x4)
+
+inst_287:
+// rs1_val==1431655764 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaa87, 0x55555554, -0x2d, x3, 1060, x4)
+
+inst_288:
+// rs1_val==1431655764 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x55555579, 0x55555554, 0x2d, x3, 1064, x4)
+
+inst_289:
+// rs1_val==1431655764 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x55555556, 0x55555554, 0x2, x3, 1068, x4)
+
+inst_290:
+// rs1_val==1431655764 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x55555000, 0x55555554, 0x554, x3, 1072, x4)
+
+inst_291:
+// rs1_val==1431655764 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x55555554, 0x55555554, 0x0, x3, 1076, x4)
+
+inst_292:
+// rs1_val==1431655764 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x55555550, 0x55555554, 0x4, x3, 1080, x4)
+
+inst_293:
+// rs1_val==1431655764 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x55555666, 0x55555554, 0x332, x3, 1084, x4)
+
+inst_294:
+// rs1_val==1431655764 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x55555331, 0x55555554, 0x665, x3, 1088, x4)
+
+inst_295:
+// rs1_val==1431655764 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x55555578, 0x55555554, 0x2c, x3, 1092, x4)
+
+inst_296:
+// rs1_val==1431655764 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x55555002, 0x55555554, 0x556, x3, 1096, x4)
+
+inst_297:
+// rs1_val==1431655764 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xaaaaafff, 0x55555554, -0x555, x3, 1100, x4)
+
+inst_298:
+// rs1_val==1431655764 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x55555552, 0x55555554, 0x6, x3, 1104, x4)
+
+inst_299:
+// rs1_val==1431655764 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x55555660, 0x55555554, 0x334, x3, 1108, x4)
+
+inst_300:
+// rs1_val==1431655764 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x55555333, 0x55555554, 0x667, x3, 1112, x4)
+
+inst_301:
+// rs1_val==1431655764 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaa80, 0x55555554, -0x2c, x3, 1116, x4)
+
+inst_302:
+// rs1_val==1431655764 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555554; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x5555557a, 0x55555554, 0x2e, x3, 1120, x4)
+
+inst_303:
+// rs1_val==0 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x3, 0x0, 0x3, x3, 1124, x4)
+
+inst_304:
+// rs1_val==0 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x555, 0x0, 0x555, x3, 1128, x4)
+
+inst_305:
+// rs1_val==0 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffffaaa, 0x0, -0x556, x3, 1132, x4)
+
+inst_306:
+// rs1_val==0 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x5, 0x0, 0x5, x3, 1136, x4)
+
+inst_307:
+// rs1_val==0 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x333, 0x0, 0x333, x3, 1140, x4)
+
+inst_308:
+// rs1_val==0 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x666, 0x0, 0x666, x3, 1144, x4)
+
+inst_309:
+// rs1_val==0 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffd3, 0x0, -0x2d, x3, 1148, x4)
+
+inst_310:
+// rs1_val==0 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x2d, 0x0, 0x2d, x3, 1152, x4)
+
+inst_311:
+// rs1_val==858993460 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x33333006, 0x33333334, 0x332, x3, 1156, x4)
+
+inst_312:
+// rs1_val==858993460 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x33333551, 0x33333334, 0x665, x3, 1160, x4)
+
+inst_313:
+// rs1_val==858993460 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x33333318, 0x33333334, 0x2c, x3, 1164, x4)
+
+inst_314:
+// rs1_val==858993460 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x33333662, 0x33333334, 0x556, x3, 1168, x4)
+
+inst_315:
+// rs1_val==858993460 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xccccc99f, 0x33333334, -0x555, x3, 1172, x4)
+
+inst_316:
+// rs1_val==858993460 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x33333332, 0x33333334, 0x6, x3, 1176, x4)
+
+inst_317:
+// rs1_val==858993460 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x33333000, 0x33333334, 0x334, x3, 1180, x4)
+
+inst_318:
+// rs1_val==858993460 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x33333553, 0x33333334, 0x667, x3, 1184, x4)
+
+inst_319:
+// rs1_val==858993460 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xcccccce0, 0x33333334, -0x2c, x3, 1188, x4)
+
+inst_320:
+// rs1_val==858993460 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x3333331a, 0x33333334, 0x2e, x3, 1192, x4)
+
+inst_321:
+// rs1_val==1717986919 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x66666664, 0x66666667, 0x3, x3, 1196, x4)
+
+inst_322:
+// rs1_val==1717986919 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x66666332, 0x66666667, 0x555, x3, 1200, x4)
+
+inst_323:
+// rs1_val==1717986919 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0x99999ccd, 0x66666667, -0x556, x3, 1204, x4)
+
+inst_324:
+// rs1_val==1717986919 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x66666662, 0x66666667, 0x5, x3, 1208, x4)
+
+inst_325:
+// rs1_val==1717986919 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x66666554, 0x66666667, 0x333, x3, 1212, x4)
+
+inst_326:
+// rs1_val==1717986919 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x66666001, 0x66666667, 0x666, x3, 1216, x4)
+
+inst_327:
+// rs1_val==1717986919 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0x999999b4, 0x66666667, -0x2d, x3, 1220, x4)
+
+inst_328:
+// rs1_val==1717986919 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x6666664a, 0x66666667, 0x2d, x3, 1224, x4)
+
+inst_329:
+// rs1_val==1717986919 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x66666665, 0x66666667, 0x2, x3, 1228, x4)
+
+inst_330:
+// rs1_val==1717986919 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x66666333, 0x66666667, 0x554, x3, 1232, x4)
+
+inst_331:
+// rs1_val==1717986919 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x66666667, 0x66666667, 0x0, x3, 1236, x4)
+
+inst_332:
+// rs1_val==1717986919 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x66666663, 0x66666667, 0x4, x3, 1240, x4)
+
+inst_333:
+// rs1_val==1717986919 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x66666555, 0x66666667, 0x332, x3, 1244, x4)
+
+inst_334:
+// rs1_val==1717986919 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x66666002, 0x66666667, 0x665, x3, 1248, x4)
+
+inst_335:
+// rs1_val==1717986919 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x6666664b, 0x66666667, 0x2c, x3, 1252, x4)
+
+inst_336:
+// rs1_val==1717986919 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x66666331, 0x66666667, 0x556, x3, 1256, x4)
+
+inst_337:
+// rs1_val==1717986919 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0x99999ccc, 0x66666667, -0x555, x3, 1260, x4)
+
+inst_338:
+// rs1_val==1717986919 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x66666661, 0x66666667, 0x6, x3, 1264, x4)
+
+inst_339:
+// rs1_val==1717986919 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x66666553, 0x66666667, 0x334, x3, 1268, x4)
+
+inst_340:
+// rs1_val==1717986919 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x66666000, 0x66666667, 0x667, x3, 1272, x4)
+
+inst_341:
+// rs1_val==1717986919 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x999999b3, 0x66666667, -0x2c, x3, 1276, x4)
+
+inst_342:
+// rs1_val==1717986919 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666667; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x66666649, 0x66666667, 0x2e, x3, 1280, x4)
+
+inst_343:
+// rs1_val==-46339 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xffff4afe, -0xb503, 0x3, x3, 1284, x4)
+
+inst_344:
+// rs1_val==-46339 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xffff4fa8, -0xb503, 0x555, x3, 1288, x4)
+
+inst_345:
+// rs1_val==-46339 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xb057, -0xb503, -0x556, x3, 1292, x4)
+
+inst_346:
+// rs1_val==-46339 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xffff4af8, -0xb503, 0x5, x3, 1296, x4)
+
+inst_347:
+// rs1_val==-46339 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xffff49ce, -0xb503, 0x333, x3, 1300, x4)
+
+inst_348:
+// rs1_val==-46339 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xffff4c9b, -0xb503, 0x666, x3, 1304, x4)
+
+inst_349:
+// rs1_val==-46339 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xb52e, -0xb503, -0x2d, x3, 1308, x4)
+
+inst_350:
+// rs1_val==-46339 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffff4ad0, -0xb503, 0x2d, x3, 1312, x4)
+
+inst_351:
+// rs1_val==-46339 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xffff4aff, -0xb503, 0x2, x3, 1316, x4)
+
+inst_352:
+// rs1_val==-46339 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xffff4fa9, -0xb503, 0x554, x3, 1320, x4)
+
+inst_353:
+// rs1_val==-46339 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xffff4afd, -0xb503, 0x0, x3, 1324, x4)
+
+inst_354:
+// rs1_val==-46339 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xffff4af9, -0xb503, 0x4, x3, 1328, x4)
+
+inst_355:
+// rs1_val==-46339 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xffff49cf, -0xb503, 0x332, x3, 1332, x4)
+
+inst_356:
+// rs1_val==-46339 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xffff4c98, -0xb503, 0x665, x3, 1336, x4)
+
+inst_357:
+// rs1_val==-46339 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffff4ad1, -0xb503, 0x2c, x3, 1340, x4)
+
+inst_358:
+// rs1_val==-46339 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xffff4fab, -0xb503, 0x556, x3, 1344, x4)
+
+inst_359:
+// rs1_val==-46339 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xb056, -0xb503, -0x555, x3, 1348, x4)
+
+inst_360:
+// rs1_val==-46339 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xffff4afb, -0xb503, 0x6, x3, 1352, x4)
+
+inst_361:
+// rs1_val==-46339 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xffff49c9, -0xb503, 0x334, x3, 1356, x4)
+
+inst_362:
+// rs1_val==-46339 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xffff4c9a, -0xb503, 0x667, x3, 1360, x4)
+
+inst_363:
+// rs1_val==-46339 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xb529, -0xb503, -0x2c, x3, 1364, x4)
+
+inst_364:
+// rs1_val==-46339 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb503; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xffff4ad3, -0xb503, 0x2e, x3, 1368, x4)
+
+inst_365:
+// rs1_val==46341 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xb506, 0xb505, 0x3, x3, 1372, x4)
+
+inst_366:
+// rs1_val==46341 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xb050, 0xb505, 0x555, x3, 1376, x4)
+
+inst_367:
+// rs1_val==46341 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xffff4faf, 0xb505, -0x556, x3, 1380, x4)
+
+inst_368:
+// rs1_val==46341 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xb500, 0xb505, 0x5, x3, 1384, x4)
+
+inst_369:
+// rs1_val==46341 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xb636, 0xb505, 0x333, x3, 1388, x4)
+
+inst_370:
+// rs1_val==46341 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xb363, 0xb505, 0x666, x3, 1392, x4)
+
+inst_371:
+// rs1_val==46341 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffff4ad6, 0xb505, -0x2d, x3, 1396, x4)
+
+inst_372:
+// rs1_val==46341 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xb528, 0xb505, 0x2d, x3, 1400, x4)
+
+inst_373:
+// rs1_val==46341 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xb507, 0xb505, 0x2, x3, 1404, x4)
+
+inst_374:
+// rs1_val==46341 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xb051, 0xb505, 0x554, x3, 1408, x4)
+
+inst_375:
+// rs1_val==46341 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xb505, 0xb505, 0x0, x3, 1412, x4)
+
+inst_376:
+// rs1_val==46341 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xb501, 0xb505, 0x4, x3, 1416, x4)
+
+inst_377:
+// rs1_val==46341 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xb637, 0xb505, 0x332, x3, 1420, x4)
+
+inst_378:
+// rs1_val==46341 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xb360, 0xb505, 0x665, x3, 1424, x4)
+
+inst_379:
+// rs1_val==46341 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xb529, 0xb505, 0x2c, x3, 1428, x4)
+
+inst_380:
+// rs1_val==46341 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xb053, 0xb505, 0x556, x3, 1432, x4)
+
+inst_381:
+// rs1_val==46341 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xffff4fae, 0xb505, -0x555, x3, 1436, x4)
+
+inst_382:
+// rs1_val==46341 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xb503, 0xb505, 0x6, x3, 1440, x4)
+
+inst_383:
+// rs1_val==46341 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xb631, 0xb505, 0x334, x3, 1444, x4)
+
+inst_384:
+// rs1_val==46341 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xb362, 0xb505, 0x667, x3, 1448, x4)
+
+inst_385:
+// rs1_val==46341 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffff4ad1, 0xb505, -0x2c, x3, 1452, x4)
+
+inst_386:
+// rs1_val==46341 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb505; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xb52b, 0xb505, 0x2e, x3, 1456, x4)
+
+inst_387:
+// rs1_val==0 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x2, 0x0, 0x2, x3, 1460, x4)
+
+inst_388:
+// rs1_val==0 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x554, 0x0, 0x554, x3, 1464, x4)
+
+inst_389:
+// rs1_val==0 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x0, 0x0, 0x0, x3, 1468, x4)
+
+inst_390:
+// rs1_val==0 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x4, 0x0, 0x4, x3, 1472, x4)
+
+inst_391:
+// rs1_val==0 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x332, 0x0, 0x332, x3, 1476, x4)
+
+inst_392:
+// rs1_val==0 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x665, 0x0, 0x665, x3, 1480, x4)
+
+inst_393:
+// rs1_val==0 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x2c, 0x0, 0x2c, x3, 1484, x4)
+
+inst_394:
+// rs1_val==0 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x556, 0x0, 0x556, x3, 1488, x4)
+
+inst_395:
+// rs1_val==0 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xfffffaab, 0x0, -0x555, x3, 1492, x4)
+
+inst_396:
+// rs1_val==0 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x6, 0x0, 0x6, x3, 1496, x4)
+
+inst_397:
+// rs1_val==0 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x334, 0x0, 0x334, x3, 1500, x4)
+
+inst_398:
+// rs1_val==0 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x667, 0x0, 0x667, x3, 1504, x4)
+
+inst_399:
+// rs1_val==0 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffd4, 0x0, -0x2c, x3, 1508, x4)
+
+inst_400:
+// rs1_val==0 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x2e, 0x0, 0x2e, x3, 1512, x4)
+
+inst_401:
+// rs1_val==4 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x7, 0x4, 0x3, x3, 1516, x4)
+
+inst_402:
+// rs1_val==4 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x551, 0x4, 0x555, x3, 1520, x4)
+
+inst_403:
+// rs1_val==4 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffffaae, 0x4, -0x556, x3, 1524, x4)
+
+inst_404:
+// rs1_val==4 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x1, 0x4, 0x5, x3, 1528, x4)
+
+inst_405:
+// rs1_val==4 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x337, 0x4, 0x333, x3, 1532, x4)
+
+inst_406:
+// rs1_val==4 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x662, 0x4, 0x666, x3, 1536, x4)
+
+inst_407:
+// rs1_val==4 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffd7, 0x4, -0x2d, x3, 1540, x4)
+
+inst_408:
+// rs1_val==4 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x29, 0x4, 0x2d, x3, 1544, x4)
+
+inst_409:
+// rs1_val==4 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x6, 0x4, 0x2, x3, 1548, x4)
+
+inst_410:
+// rs1_val==4 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x550, 0x4, 0x554, x3, 1552, x4)
+
+inst_411:
+// rs1_val==4 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x0, 0x4, 0x4, x3, 1556, x4)
+
+inst_412:
+// rs1_val==4 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x336, 0x4, 0x332, x3, 1560, x4)
+
+inst_413:
+// rs1_val==4 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x661, 0x4, 0x665, x3, 1564, x4)
+
+inst_414:
+// rs1_val==4 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x28, 0x4, 0x2c, x3, 1568, x4)
+
+inst_415:
+// rs1_val==4 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x552, 0x4, 0x556, x3, 1572, x4)
+
+inst_416:
+// rs1_val==4 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xfffffaaf, 0x4, -0x555, x3, 1576, x4)
+
+inst_417:
+// rs1_val==4 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x2, 0x4, 0x6, x3, 1580, x4)
+
+inst_418:
+// rs1_val==4 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x330, 0x4, 0x334, x3, 1584, x4)
+
+inst_419:
+// rs1_val==4 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x663, 0x4, 0x667, x3, 1588, x4)
+
+inst_420:
+// rs1_val==4 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffd0, 0x4, -0x2c, x3, 1592, x4)
+
+inst_421:
+// rs1_val==4 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x2a, 0x4, 0x2e, x3, 1596, x4)
+
+inst_422:
+// rs1_val==858993458 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x33333331, 0x33333332, 0x3, x3, 1600, x4)
+
+inst_423:
+// rs1_val==858993458 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x33333667, 0x33333332, 0x555, x3, 1604, x4)
+
+inst_424:
+// rs1_val==858993458 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xccccc998, 0x33333332, -0x556, x3, 1608, x4)
+
+inst_425:
+// rs1_val==858993458 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x33333337, 0x33333332, 0x5, x3, 1612, x4)
+
+inst_426:
+// rs1_val==858993458 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x33333001, 0x33333332, 0x333, x3, 1616, x4)
+
+inst_427:
+// rs1_val==858993458 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x33333554, 0x33333332, 0x666, x3, 1620, x4)
+
+inst_428:
+// rs1_val==858993458 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xcccccce1, 0x33333332, -0x2d, x3, 1624, x4)
+
+inst_429:
+// rs1_val==858993458 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x3333331f, 0x33333332, 0x2d, x3, 1628, x4)
+
+inst_430:
+// rs1_val==858993458 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x33333330, 0x33333332, 0x2, x3, 1632, x4)
+
+inst_431:
+// rs1_val==858993458 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x33333666, 0x33333332, 0x554, x3, 1636, x4)
+
+inst_432:
+// rs1_val==858993458 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x33333332, 0x33333332, 0x0, x3, 1640, x4)
+
+inst_433:
+// rs1_val==858993458 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x33333336, 0x33333332, 0x4, x3, 1644, x4)
+
+inst_434:
+// rs1_val==858993458 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x33333000, 0x33333332, 0x332, x3, 1648, x4)
+
+inst_435:
+// rs1_val==858993458 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x33333557, 0x33333332, 0x665, x3, 1652, x4)
+
+inst_436:
+// rs1_val==858993458 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x3333331e, 0x33333332, 0x2c, x3, 1656, x4)
+
+inst_437:
+// rs1_val==858993458 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x33333664, 0x33333332, 0x556, x3, 1660, x4)
+
+inst_438:
+// rs1_val==858993458 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xccccc999, 0x33333332, -0x555, x3, 1664, x4)
+
+inst_439:
+// rs1_val==858993458 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x33333334, 0x33333332, 0x6, x3, 1668, x4)
+
+inst_440:
+// rs1_val==858993458 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x33333006, 0x33333332, 0x334, x3, 1672, x4)
+
+inst_441:
+// rs1_val==858993458 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x33333555, 0x33333332, 0x667, x3, 1676, x4)
+
+inst_442:
+// rs1_val==858993458 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xcccccce6, 0x33333332, -0x2c, x3, 1680, x4)
+
+inst_443:
+// rs1_val==858993458 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333332; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x3333331c, 0x33333332, 0x2e, x3, 1684, x4)
+
+inst_444:
+// rs1_val==1717986917 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x66666666, 0x66666665, 0x3, x3, 1688, x4)
+
+inst_445:
+// rs1_val==1717986917 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x66666330, 0x66666665, 0x555, x3, 1692, x4)
+
+inst_446:
+// rs1_val==1717986917 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0x99999ccf, 0x66666665, -0x556, x3, 1696, x4)
+
+inst_447:
+// rs1_val==1717986917 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x66666660, 0x66666665, 0x5, x3, 1700, x4)
+
+inst_448:
+// rs1_val==1717986917 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x66666556, 0x66666665, 0x333, x3, 1704, x4)
+
+inst_449:
+// rs1_val==1717986917 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x66666003, 0x66666665, 0x666, x3, 1708, x4)
+
+inst_450:
+// rs1_val==1717986917 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0x999999b6, 0x66666665, -0x2d, x3, 1712, x4)
+
+inst_451:
+// rs1_val==1717986917 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x66666648, 0x66666665, 0x2d, x3, 1716, x4)
+
+inst_452:
+// rs1_val==1717986917 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x66666667, 0x66666665, 0x2, x3, 1720, x4)
+
+inst_453:
+// rs1_val==1717986917 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x66666331, 0x66666665, 0x554, x3, 1724, x4)
+
+inst_454:
+// rs1_val==1717986917 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x66666665, 0x66666665, 0x0, x3, 1728, x4)
+
+inst_455:
+// rs1_val==1717986917 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x66666661, 0x66666665, 0x4, x3, 1732, x4)
+
+inst_456:
+// rs1_val==1717986917 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x66666557, 0x66666665, 0x332, x3, 1736, x4)
+
+inst_457:
+// rs1_val==1717986917 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x66666000, 0x66666665, 0x665, x3, 1740, x4)
+
+inst_458:
+// rs1_val==1717986917 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x66666649, 0x66666665, 0x2c, x3, 1744, x4)
+
+inst_459:
+// rs1_val==1717986917 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x66666333, 0x66666665, 0x556, x3, 1748, x4)
+
+inst_460:
+// rs1_val==1717986917 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0x99999cce, 0x66666665, -0x555, x3, 1752, x4)
+
+inst_461:
+// rs1_val==1717986917 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x66666663, 0x66666665, 0x6, x3, 1756, x4)
+
+inst_462:
+// rs1_val==1717986917 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x66666551, 0x66666665, 0x334, x3, 1760, x4)
+
+inst_463:
+// rs1_val==1717986917 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x66666002, 0x66666665, 0x667, x3, 1764, x4)
+
+inst_464:
+// rs1_val==1717986917 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x999999b1, 0x66666665, -0x2c, x3, 1768, x4)
+
+inst_465:
+// rs1_val==1717986917 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x66666665; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x6666664b, 0x66666665, 0x2e, x3, 1772, x4)
+
+inst_466:
+// rs1_val==46339 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xb500, 0xb503, 0x3, x3, 1776, x4)
+
+inst_467:
+// rs1_val==46339 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xb056, 0xb503, 0x555, x3, 1780, x4)
+
+inst_468:
+// rs1_val==46339 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xffff4fa9, 0xb503, -0x556, x3, 1784, x4)
+
+inst_469:
+// rs1_val==46339 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xb506, 0xb503, 0x5, x3, 1788, x4)
+
+inst_470:
+// rs1_val==46339 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xb630, 0xb503, 0x333, x3, 1792, x4)
+
+inst_471:
+// rs1_val==46339 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xb365, 0xb503, 0x666, x3, 1796, x4)
+
+inst_472:
+// rs1_val==46339 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffff4ad0, 0xb503, -0x2d, x3, 1800, x4)
+
+inst_473:
+// rs1_val==46339 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xb52e, 0xb503, 0x2d, x3, 1804, x4)
+
+inst_474:
+// rs1_val==46339 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xb501, 0xb503, 0x2, x3, 1808, x4)
+
+inst_475:
+// rs1_val==46339 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xb057, 0xb503, 0x554, x3, 1812, x4)
+
+inst_476:
+// rs1_val==46339 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xb503, 0xb503, 0x0, x3, 1816, x4)
+
+inst_477:
+// rs1_val==46339 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xb507, 0xb503, 0x4, x3, 1820, x4)
+
+inst_478:
+// rs1_val==46339 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xb631, 0xb503, 0x332, x3, 1824, x4)
+
+inst_479:
+// rs1_val==46339 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xb366, 0xb503, 0x665, x3, 1828, x4)
+
+inst_480:
+// rs1_val==46339 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xb52f, 0xb503, 0x2c, x3, 1832, x4)
+
+inst_481:
+// rs1_val==46339 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xb055, 0xb503, 0x556, x3, 1836, x4)
+
+inst_482:
+// rs1_val==46339 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xffff4fa8, 0xb503, -0x555, x3, 1840, x4)
+
+inst_483:
+// rs1_val==46339 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xb505, 0xb503, 0x6, x3, 1844, x4)
+
+inst_484:
+// rs1_val==46339 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xb637, 0xb503, 0x334, x3, 1848, x4)
+
+inst_485:
+// rs1_val==46339 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xb364, 0xb503, 0x667, x3, 1852, x4)
+
+inst_486:
+// rs1_val==46339 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffff4ad7, 0xb503, -0x2c, x3, 1856, x4)
+
+inst_487:
+// rs1_val==46339 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb503; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xb52d, 0xb503, 0x2e, x3, 1860, x4)
+
+inst_488:
+// rs1_val==1431655766 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x55555555, 0x55555556, 0x3, x3, 1864, x4)
+
+inst_489:
+// rs1_val==1431655766 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x55555003, 0x55555556, 0x555, x3, 1868, x4)
+
+inst_490:
+// rs1_val==1431655766 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaffc, 0x55555556, -0x556, x3, 1872, x4)
+
+inst_491:
+// rs1_val==1431655766 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x55555553, 0x55555556, 0x5, x3, 1876, x4)
+
+inst_492:
+// rs1_val==1431655766 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x55555665, 0x55555556, 0x333, x3, 1880, x4)
+
+inst_493:
+// rs1_val==1431655766 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x55555330, 0x55555556, 0x666, x3, 1884, x4)
+
+inst_494:
+// rs1_val==1431655766 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaa85, 0x55555556, -0x2d, x3, 1888, x4)
+
+inst_495:
+// rs1_val==1431655766 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x5555557b, 0x55555556, 0x2d, x3, 1892, x4)
+
+inst_496:
+// rs1_val==1431655766 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x55555554, 0x55555556, 0x2, x3, 1896, x4)
+
+inst_497:
+// rs1_val==1431655766 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x55555002, 0x55555556, 0x554, x3, 1900, x4)
+
+inst_498:
+// rs1_val==1431655766 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x55555556, 0x55555556, 0x0, x3, 1904, x4)
+
+inst_499:
+// rs1_val==1431655766 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x55555552, 0x55555556, 0x4, x3, 1908, x4)
+
+inst_500:
+// rs1_val==1431655766 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x55555664, 0x55555556, 0x332, x3, 1912, x4)
+
+inst_501:
+// rs1_val==1431655766 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x55555333, 0x55555556, 0x665, x3, 1916, x4)
+
+inst_502:
+// rs1_val==1431655766 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x5555557a, 0x55555556, 0x2c, x3, 1920, x4)
+
+inst_503:
+// rs1_val==1431655766 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x55555000, 0x55555556, 0x556, x3, 1924, x4)
+
+inst_504:
+// rs1_val==1431655766 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaffd, 0x55555556, -0x555, x3, 1928, x4)
+
+inst_505:
+// rs1_val==1431655766 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x55555550, 0x55555556, 0x6, x3, 1932, x4)
+
+inst_506:
+// rs1_val==1431655766 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x55555662, 0x55555556, 0x334, x3, 1936, x4)
+
+inst_507:
+// rs1_val==1431655766 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x55555331, 0x55555556, 0x667, x3, 1940, x4)
+
+inst_508:
+// rs1_val==1431655766 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaa82, 0x55555556, -0x2c, x3, 1944, x4)
+
+inst_509:
+// rs1_val==1431655766 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x55555556; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x55555578, 0x55555556, 0x2e, x3, 1948, x4)
+
+inst_510:
+// rs1_val==-1431655765 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaa8, -0x55555555, 0x3, x3, 1952, x4)
+
+inst_511:
+// rs1_val==-1431655765 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaffe, -0x55555555, 0x555, x3, 1956, x4)
+
+inst_512:
+// rs1_val==-1431655765 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0x55555001, -0x55555555, -0x556, x3, 1960, x4)
+
+inst_513:
+// rs1_val==-1431655765 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaae, -0x55555555, 0x5, x3, 1964, x4)
+
+inst_514:
+// rs1_val==-1431655765 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xaaaaa998, -0x55555555, 0x333, x3, 1968, x4)
+
+inst_515:
+// rs1_val==-1431655765 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaccd, -0x55555555, 0x666, x3, 1972, x4)
+
+inst_516:
+// rs1_val==-1431655765 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0x55555578, -0x55555555, -0x2d, x3, 1976, x4)
+
+inst_517:
+// rs1_val==-1431655765 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaa86, -0x55555555, 0x2d, x3, 1980, x4)
+
+inst_518:
+// rs1_val==-1431655765 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaa9, -0x55555555, 0x2, x3, 1984, x4)
+
+inst_519:
+// rs1_val==-1431655765 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xaaaaafff, -0x55555555, 0x554, x3, 1988, x4)
+
+inst_520:
+// rs1_val==-1431655765 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaab, -0x55555555, 0x0, x3, 1992, x4)
+
+inst_521:
+// rs1_val==-1431655765 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaf, -0x55555555, 0x4, x3, 1996, x4)
+
+inst_522:
+// rs1_val==-1431655765 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xaaaaa999, -0x55555555, 0x332, x3, 2000, x4)
+
+inst_523:
+// rs1_val==-1431655765 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xaaaaacce, -0x55555555, 0x665, x3, 2004, x4)
+
+inst_524:
+// rs1_val==-1431655765 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaa87, -0x55555555, 0x2c, x3, 2008, x4)
+
+inst_525:
+// rs1_val==-1431655765 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaffd, -0x55555555, 0x556, x3, 2012, x4)
+
+inst_526:
+// rs1_val==-1431655765 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0x55555000, -0x55555555, -0x555, x3, 2016, x4)
+
+inst_527:
+// rs1_val==-1431655765 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaad, -0x55555555, 0x6, x3, 2020, x4)
+
+inst_528:
+// rs1_val==-1431655765 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xaaaaa99f, -0x55555555, 0x334, x3, 2024, x4)
+
+inst_529:
+// rs1_val==-1431655765 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaccc, -0x55555555, 0x667, x3, 2028, x4)
+
+inst_530:
+// rs1_val==-1431655765 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x5555557f, -0x55555555, -0x2c, x3, 2032, x4)
+
+inst_531:
+// rs1_val==-1431655765 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaa85, -0x55555555, 0x2e, x3, 2036, x4)
+
+inst_532:
+// rs1_val==6 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x5, 0x6, 0x3, x3, 2040, x4)
+
+inst_533:
+// rs1_val==6 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x553, 0x6, 0x555, x3, 2044, x4)
+RVTEST_SIGBASE( x3,signature_x3_1)
+
+inst_534:
+// rs1_val==6 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffffaac, 0x6, -0x556, x3, 0, x4)
+
+inst_535:
+// rs1_val==6 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x3, 0x6, 0x5, x3, 4, x4)
+
+inst_536:
+// rs1_val==6 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x335, 0x6, 0x333, x3, 8, x4)
+
+inst_537:
+// rs1_val==6 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x660, 0x6, 0x666, x3, 12, x4)
+
+inst_538:
+// rs1_val==6 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffd5, 0x6, -0x2d, x3, 16, x4)
+
+inst_539:
+// rs1_val==6 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x2b, 0x6, 0x2d, x3, 20, x4)
+
+inst_540:
+// rs1_val==6 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x4, 0x6, 0x2, x3, 24, x4)
+
+inst_541:
+// rs1_val==6 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x552, 0x6, 0x554, x3, 28, x4)
+
+inst_542:
+// rs1_val==6 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x6, 0x6, 0x0, x3, 32, x4)
+
+inst_543:
+// rs1_val==6 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x2, 0x6, 0x4, x3, 36, x4)
+
+inst_544:
+// rs1_val==6 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x334, 0x6, 0x332, x3, 40, x4)
+
+inst_545:
+// rs1_val==6 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x663, 0x6, 0x665, x3, 44, x4)
+
+inst_546:
+// rs1_val==6 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x2a, 0x6, 0x2c, x3, 48, x4)
+
+inst_547:
+// rs1_val==6 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x550, 0x6, 0x556, x3, 52, x4)
+
+inst_548:
+// rs1_val==6 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xfffffaad, 0x6, -0x555, x3, 56, x4)
+
+inst_549:
+// rs1_val==6 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x0, 0x6, 0x6, x3, 60, x4)
+
+inst_550:
+// rs1_val==6 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x332, 0x6, 0x334, x3, 64, x4)
+
+inst_551:
+// rs1_val==6 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x661, 0x6, 0x667, x3, 68, x4)
+
+inst_552:
+// rs1_val==6 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffd2, 0x6, -0x2c, x3, 72, x4)
+
+inst_553:
+// rs1_val==6 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x28, 0x6, 0x2e, x3, 76, x4)
+
+inst_554:
+// rs1_val==858993460 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x33333337, 0x33333334, 0x3, x3, 80, x4)
+
+inst_555:
+// rs1_val==858993460 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x33333661, 0x33333334, 0x555, x3, 84, x4)
+
+inst_556:
+// rs1_val==858993460 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xccccc99e, 0x33333334, -0x556, x3, 88, x4)
+
+inst_557:
+// rs1_val==858993460 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x33333331, 0x33333334, 0x5, x3, 92, x4)
+
+inst_558:
+// rs1_val==858993460 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x33333007, 0x33333334, 0x333, x3, 96, x4)
+
+inst_559:
+// rs1_val==858993460 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x33333552, 0x33333334, 0x666, x3, 100, x4)
+
+inst_560:
+// rs1_val==858993460 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xcccccce7, 0x33333334, -0x2d, x3, 104, x4)
+
+inst_561:
+// rs1_val==858993460 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x33333319, 0x33333334, 0x2d, x3, 108, x4)
+
+inst_562:
+// rs1_val==858993460 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x33333336, 0x33333334, 0x2, x3, 112, x4)
+
+inst_563:
+// rs1_val==858993460 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x33333660, 0x33333334, 0x554, x3, 116, x4)
+
+inst_564:
+// rs1_val==858993460 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x33333334, 0x33333334, 0x0, x3, 120, x4)
+
+inst_565:
+// rs1_val==858993460 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x33333334; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x33333330, 0x33333334, 0x4, x3, 124, x4)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_1:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/K_unratified/AES32DSI-01.S b/riscof/suite/rv32i_m/K_unratified/AES32DSI-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..ca970ec87aefdc631766a31dfff2f5a236da733b
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/AES32DSI-01.S
@@ -0,0 +1,1053 @@
+// RISC-V Architectural Validation Test AES32DSI-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes32dsi'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes32dsi)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes32dsi)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x94ea5195), rs1=>rd:x1(0xadea5195), rs2:x16(0x121bcc23), imm:0x3
+ TEST_RI_OP(aes32dsi, x1, x16, 0x3, 0x94ea5195, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xcfffbec1), rs1=>rd:x2(0xd2ffbec1), rs2:x15(0xa47d105b), imm:0x3
+ TEST_RI_OP(aes32dsi, x2, x15, 0x3, 0xcfffbec1, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xa8e1a8a4), rs1=>rd:x3(0xa8e1a8bb), rs2:x14(0x707af2c0), imm:0x0
+ TEST_RI_OP(aes32dsi, x3, x14, 0x0, 0xa8e1a8a4, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xa8c99fcb), rs1=>rd:x4(0x48c99fcb), rs2:x13(0xe19bfbc3), imm:0x3
+ TEST_RI_OP(aes32dsi, x4, x13, 0x3, 0xa8c99fcb, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x0e1d524f), rs1=>rd:x5(0x461d524f), rs2:x12(0x528a10af), imm:0x3
+ TEST_RI_OP(aes32dsi, x5, x12, 0x3, 0x0e1d524f, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xca8a10af), rs1=>rd:x6(0x528a10af), rs2:x11(0x461d524f), imm:0x3
+ TEST_RI_OP(aes32dsi, x6, x11, 0x3, 0xca8a10af, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x359bfbc3), rs1=>rd:x7(0xe19bfbc3), rs2:x10(0x48c99fcb), imm:0x3
+ TEST_RI_OP(aes32dsi, x7, x10, 0x3, 0x359bfbc3, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x1f7af2c0), rs1=>rd:x8(0x707af2c0), rs2:x9(0xa8e1a8bb), imm:0x3
+ TEST_RI_OP(aes32dsi, x8, x9, 0x3, 0x1f7af2c0, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xa47d4a5b), rs1=>rd:x9(0xa47d105b), rs2:x8(0xd2ffbec1), imm:0x1
+ TEST_RI_OP(aes32dsi, x9, x8, 0x1, 0xa47d4a5b, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x121bbc23), rs1=>rd:x10(0x121bcc23), rs2:x7(0xadea5195), imm:0x1
+ TEST_RI_OP(aes32dsi, x10, x7, 0x1, 0x121bbc23, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x7d000001), rs1=>rd:x11(0x00000001), rs2:x6(0xffffffff), imm:0x3
+ TEST_RI_OP(aes32dsi, x11, x6, 0x3, 0x7d000001, 0x00000001, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00007d02), rs1=>rd:x12(0x00000002), rs2:x5(0x7fffffff), imm:0x1
+ TEST_RI_OP(aes32dsi, x12, x5, 0x1, 0x00007d02, 0x00000002, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x007d0004), rs1=>rd:x13(0x00000004), rs2:x4(0xbfffffff), imm:0x2
+ TEST_RI_OP(aes32dsi, x13, x4, 0x2, 0x007d0004, 0x00000004, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00000075), rs1=>rd:x14(0x00000008), rs2:x3(0xdfffffff), imm:0x0
+ TEST_RI_OP(aes32dsi, x14, x3, 0x0, 0x00000075, 0x00000008, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x007d0010), rs1=>rd:x15(0x00000010), rs2:x2(0xefffffff), imm:0x2
+ TEST_RI_OP(aes32dsi, x15, x2, 0x2, 0x007d0010, 0x00000010, 0xefffffff, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x00007d20), rs1=>rd:x16(0x00000020), rs2:x1(0xf7ffffff), imm:0x1
+ TEST_RI_OP(aes32dsi, x16, x1, 0x1, 0x00007d20, 0x00000020, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x63000040), rs1=>rd:x17(0x00000040), rs2:x31(0xfbffffff), imm:0x3
+ TEST_RI_OP(aes32dsi, x17, x31, 0x3, 0x63000040, 0x00000040, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x21000080), rs1=>rd:x18(0x00000080), rs2:x30(0xfdffffff), imm:0x3
+ TEST_RI_OP(aes32dsi, x18, x30, 0x3, 0x21000080, 0x00000080, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000017d), rs1=>rd:x19(0x00000100), rs2:x29(0xfeffffff), imm:0x0
+ TEST_RI_OP(aes32dsi, x19, x29, 0x0, 0x0000017d, 0x00000100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x7d000200), rs1=>rd:x20(0x00000200), rs2:x28(0xff7fffff), imm:0x3
+ TEST_RI_OP(aes32dsi, x20, x28, 0x3, 0x7d000200, 0x00000200, 0xff7fffff, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x7d000400), rs1=>rd:x21(0x00000400), rs2:x27(0xffbfffff), imm:0x3
+ TEST_RI_OP(aes32dsi, x21, x27, 0x3, 0x7d000400, 0x00000400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x7d000800), rs1=>rd:x22(0x00000800), rs2:x26(0xffdfffff), imm:0x3
+ TEST_RI_OP(aes32dsi, x22, x26, 0x3, 0x7d000800, 0x00000800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x7d001000), rs1=>rd:x23(0x00001000), rs2:x25(0xffefffff), imm:0x3
+ TEST_RI_OP(aes32dsi, x23, x25, 0x3, 0x7d001000, 0x00001000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x82f7ffff), rs1=>rd:x24(0x00002000), rs2:x24(0xfff7ffff), imm:0x3
+ TEST_RI_OP(aes32dsi, x24, x24, 0x3, 0x82f7ffff, 0x00002000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00003d00), rs1=>rd:x25(0x00004000), rs2:x23(0xfffbffff), imm:0x1
+ TEST_RI_OP(aes32dsi, x25, x23, 0x1, 0x00003d00, 0x00004000, 0xfffbffff, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000fd00), rs1=>rd:x26(0x00008000), rs2:x22(0xfffdffff), imm:0x1
+ TEST_RI_OP(aes32dsi, x26, x22, 0x1, 0x0000fd00, 0x00008000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x7d010000), rs1=>rd:x27(0x00010000), rs2:x21(0xfffeffff), imm:0x3
+ TEST_RI_OP(aes32dsi, x27, x21, 0x3, 0x7d010000, 0x00010000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00026b00), rs1=>rd:x28(0x00020000), rs2:x20(0xffff7fff), imm:0x1
+ TEST_RI_OP(aes32dsi, x28, x20, 0x1, 0x00026b00, 0x00020000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00790000), rs1=>rd:x29(0x00040000), rs2:x19(0xffffbfff), imm:0x2
+ TEST_RI_OP(aes32dsi, x29, x19, 0x2, 0x00790000, 0x00040000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0008007d), rs1=>rd:x30(0x00080000), rs2:x18(0xffffdfff), imm:0x0
+ TEST_RI_OP(aes32dsi, x30, x18, 0x0, 0x0008007d, 0x00080000, 0xffffdfff, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x006d0000), rs1=>rd:x31(0x00100000), rs2:x17(0xffffefff), imm:0x2
+ TEST_RI_OP(aes32dsi, x31, x17, 0x2, 0x006d0000, 0x00100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00202600), rs1=>rd:x1(0x00200000), rs2:x16(0xfffff7ff), imm:0x1
+ TEST_RI_OP(aes32dsi, x1, x16, 0x1, 0x00202600, 0x00200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x7d400000), rs1=>rd:x2(0x00400000), rs2:x15(0xfffffbff), imm:0x3
+ TEST_RI_OP(aes32dsi, x2, x15, 0x3, 0x7d400000, 0x00400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x7d800000), rs1=>rd:x3(0x00800000), rs2:x14(0xfffffdff), imm:0x3
+ TEST_RI_OP(aes32dsi, x3, x14, 0x3, 0x7d800000, 0x00800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0100007d), rs1=>rd:x4(0x01000000), rs2:x13(0xfffffeff), imm:0x0
+ TEST_RI_OP(aes32dsi, x4, x13, 0x0, 0x0100007d, 0x01000000, 0xfffffeff, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x7f000000), rs1=>rd:x5(0x02000000), rs2:x12(0xffffff7f), imm:0x3
+ TEST_RI_OP(aes32dsi, x5, x12, 0x3, 0x7f000000, 0x02000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x79000000), rs1=>rd:x6(0x04000000), rs2:x11(0xffffffbf), imm:0x3
+ TEST_RI_OP(aes32dsi, x6, x11, 0x3, 0x79000000, 0x04000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x75000000), rs1=>rd:x7(0x08000000), rs2:x10(0xffffffdf), imm:0x3
+ TEST_RI_OP(aes32dsi, x7, x10, 0x3, 0x75000000, 0x08000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x6d000000), rs1=>rd:x8(0x10000000), rs2:x9(0xffffffef), imm:0x3
+ TEST_RI_OP(aes32dsi, x8, x9, 0x3, 0x6d000000, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x5d000000), rs1=>rd:x9(0x20000000), rs2:x8(0xfffffff7), imm:0x3
+ TEST_RI_OP(aes32dsi, x9, x8, 0x3, 0x5d000000, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x40007d00), rs1=>rd:x10(0x40000000), rs2:x7(0xfffffffb), imm:0x1
+ TEST_RI_OP(aes32dsi, x10, x7, 0x1, 0x40007d00, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x80007d00), rs1=>rd:x11(0x80000000), rs2:x6(0xfffffffd), imm:0x1
+ TEST_RI_OP(aes32dsi, x11, x6, 0x1, 0x80007d00, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x7d000000), rs1=>rd:x12(0x00000000), rs2:x5(0xfffffffe), imm:0x3
+ TEST_RI_OP(aes32dsi, x12, x5, 0x3, 0x7d000000, 0x00000000, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xffffadfe), rs1=>rd:x13(0xfffffffe), rs2:x4(0x00000000), imm:0x1
+ TEST_RI_OP(aes32dsi, x13, x4, 0x1, 0xffffadfe, 0xfffffffe, 0x00000000, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xffadfffd), rs1=>rd:x14(0xfffffffd), rs2:x3(0x80000000), imm:0x2
+ TEST_RI_OP(aes32dsi, x14, x3, 0x2, 0xffadfffd, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xffffffa9), rs1=>rd:x15(0xfffffffb), rs2:x2(0x40000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x15, x2, 0x0, 0xffffffa9, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xffadfff7), rs1=>rd:x16(0xfffffff7), rs2:x1(0x20000000), imm:0x2
+ TEST_RI_OP(aes32dsi, x16, x1, 0x2, 0xffadfff7, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xffffadef), rs1=>rd:x17(0xffffffef), rs2:x31(0x10000000), imm:0x1
+ TEST_RI_OP(aes32dsi, x17, x31, 0x1, 0xffffadef, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x40ffffdf), rs1=>rd:x18(0xffffffdf), rs2:x30(0x08000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x18, x30, 0x3, 0x40ffffdf, 0xffffffdf, 0x08000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xcfffffbf), rs1=>rd:x19(0xffffffbf), rs2:x29(0x04000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x19, x29, 0x3, 0xcfffffbf, 0xffffffbf, 0x04000000, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xffffff2d), rs1=>rd:x20(0xffffff7f), rs2:x28(0x02000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x20, x28, 0x0, 0xffffff2d, 0xffffff7f, 0x02000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xf6fffeff), rs1=>rd:x21(0xfffffeff), rs2:x27(0x01000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x21, x27, 0x3, 0xf6fffeff, 0xfffffeff, 0x01000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xadfffdff), rs1=>rd:x22(0xfffffdff), rs2:x26(0x00800000), imm:0x3
+ TEST_RI_OP(aes32dsi, x22, x26, 0x3, 0xadfffdff, 0xfffffdff, 0x00800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xadfffbff), rs1=>rd:x23(0xfffffbff), rs2:x25(0x00400000), imm:0x3
+ TEST_RI_OP(aes32dsi, x23, x25, 0x3, 0xadfffbff, 0xfffffbff, 0x00400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x52200000), rs1=>rd:x24(0xfffff7ff), rs2:x24(0x00200000), imm:0x3
+ TEST_RI_OP(aes32dsi, x24, x24, 0x3, 0x52200000, 0xfffff7ff, 0x00200000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xadffefff), rs1=>rd:x25(0xffffefff), rs2:x23(0x00100000), imm:0x3
+ TEST_RI_OP(aes32dsi, x25, x23, 0x3, 0xadffefff, 0xffffefff, 0x00100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xffff8dff), rs1=>rd:x26(0xffffdfff), rs2:x22(0x00080000), imm:0x1
+ TEST_RI_OP(aes32dsi, x26, x22, 0x1, 0xffff8dff, 0xffffdfff, 0x00080000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xffffedff), rs1=>rd:x27(0xffffbfff), rs2:x21(0x00040000), imm:0x1
+ TEST_RI_OP(aes32dsi, x27, x21, 0x1, 0xffffedff, 0xffffbfff, 0x00040000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xadff7fff), rs1=>rd:x28(0xffff7fff), rs2:x20(0x00020000), imm:0x3
+ TEST_RI_OP(aes32dsi, x28, x20, 0x3, 0xadff7fff, 0xffff7fff, 0x00020000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xfffeadff), rs1=>rd:x29(0xfffeffff), rs2:x19(0x00010000), imm:0x1
+ TEST_RI_OP(aes32dsi, x29, x19, 0x1, 0xfffeadff, 0xfffeffff, 0x00010000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xffafffff), rs1=>rd:x30(0xfffdffff), rs2:x18(0x00008000), imm:0x2
+ TEST_RI_OP(aes32dsi, x30, x18, 0x2, 0xffafffff, 0xfffdffff, 0x00008000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xfffbffad), rs1=>rd:x31(0xfffbffff), rs2:x17(0x00004000), imm:0x0
+ TEST_RI_OP(aes32dsi, x31, x17, 0x0, 0xfffbffad, 0xfffbffff, 0x00004000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xffa5ffff), rs1=>rd:x1(0xfff7ffff), rs2:x16(0x00002000), imm:0x2
+ TEST_RI_OP(aes32dsi, x1, x16, 0x2, 0xffa5ffff, 0xfff7ffff, 0x00002000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xffef83ff), rs1=>rd:x2(0xffefffff), rs2:x15(0x00001000), imm:0x1
+ TEST_RI_OP(aes32dsi, x2, x15, 0x1, 0xffef83ff, 0xffefffff, 0x00001000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xaddfffff), rs1=>rd:x3(0xffdfffff), rs2:x14(0x00000800), imm:0x3
+ TEST_RI_OP(aes32dsi, x3, x14, 0x3, 0xaddfffff, 0xffdfffff, 0x00000800, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xadbfffff), rs1=>rd:x4(0xffbfffff), rs2:x13(0x00000400), imm:0x3
+ TEST_RI_OP(aes32dsi, x4, x13, 0x3, 0xadbfffff, 0xffbfffff, 0x00000400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xff7fffad), rs1=>rd:x5(0xff7fffff), rs2:x12(0x00000200), imm:0x0
+ TEST_RI_OP(aes32dsi, x5, x12, 0x0, 0xff7fffad, 0xff7fffff, 0x00000200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xfeffffad), rs1=>rd:x6(0xfeffffff), rs2:x11(0x00000100), imm:0x0
+ TEST_RI_OP(aes32dsi, x6, x11, 0x0, 0xfeffffad, 0xfeffffff, 0x00000100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfdffffc5), rs1=>rd:x7(0xfdffffff), rs2:x10(0x00000080), imm:0x0
+ TEST_RI_OP(aes32dsi, x7, x10, 0x0, 0xfdffffc5, 0xfdffffff, 0x00000080, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xfbffff8d), rs1=>rd:x8(0xfbffffff), rs2:x9(0x00000040), imm:0x0
+ TEST_RI_OP(aes32dsi, x8, x9, 0x0, 0xfbffff8d, 0xfbffffff, 0x00000040, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xf7ffffab), rs1=>rd:x9(0xf7ffffff), rs2:x8(0x00000020), imm:0x0
+ TEST_RI_OP(aes32dsi, x9, x8, 0x0, 0xf7ffffab, 0xf7ffffff, 0x00000020, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xefffff83), rs1=>rd:x10(0xefffffff), rs2:x7(0x00000010), imm:0x0
+ TEST_RI_OP(aes32dsi, x10, x7, 0x0, 0xefffff83, 0xefffffff, 0x00000010, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xdfffff40), rs1=>rd:x11(0xdfffffff), rs2:x6(0x00000008), imm:0x0
+ TEST_RI_OP(aes32dsi, x11, x6, 0x0, 0xdfffff40, 0xdfffffff, 0x00000008, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xbfffffcf), rs1=>rd:x12(0xbfffffff), rs2:x5(0x00000004), imm:0x0
+ TEST_RI_OP(aes32dsi, x12, x5, 0x0, 0xbfffffcf, 0xbfffffff, 0x00000004, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x7fffff95), rs1=>rd:x13(0x7fffffff), rs2:x4(0x00000002), imm:0x0
+ TEST_RI_OP(aes32dsi, x13, x4, 0x0, 0x7fffff95, 0x7fffffff, 0x00000002, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfffffff6), rs1=>rd:x14(0xffffffff), rs2:x3(0x00000001), imm:0x0
+ TEST_RI_OP(aes32dsi, x14, x3, 0x0, 0xfffffff6, 0xffffffff, 0x00000001, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000053), rs1=>rd:x15(0x00000001), rs2:x2(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x15, x2, 0x0, 0x00000053, 0x00000001, 0x00000000, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000050), rs1=>rd:x16(0x00000002), rs2:x1(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x16, x1, 0x0, 0x00000050, 0x00000002, 0x00000000, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000056), rs1=>rd:x17(0x00000004), rs2:x31(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x17, x31, 0x0, 0x00000056, 0x00000004, 0x00000000, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x0000005a), rs1=>rd:x18(0x00000008), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x18, x30, 0x0, 0x0000005a, 0x00000008, 0x00000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000042), rs1=>rd:x19(0x00000010), rs2:x29(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x19, x29, 0x0, 0x00000042, 0x00000010, 0x00000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000072), rs1=>rd:x20(0x00000020), rs2:x28(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x20, x28, 0x0, 0x00000072, 0x00000020, 0x00000000, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000012), rs1=>rd:x21(0x00000040), rs2:x27(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x21, x27, 0x0, 0x00000012, 0x00000040, 0x00000000, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x000000d2), rs1=>rd:x22(0x00000080), rs2:x26(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x22, x26, 0x0, 0x000000d2, 0x00000080, 0x00000000, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000152), rs1=>rd:x23(0x00000100), rs2:x25(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x23, x25, 0x0, 0x00000152, 0x00000100, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000052), rs1=>rd:x24(0x00000200), rs2:x24(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x24, x24, 0x0, 0x00000052, 0x00000200, 0x00000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000452), rs1=>rd:x25(0x00000400), rs2:x23(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x25, x23, 0x0, 0x00000452, 0x00000400, 0x00000000, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000852), rs1=>rd:x26(0x00000800), rs2:x22(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x26, x22, 0x0, 0x00000852, 0x00000800, 0x00000000, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00001052), rs1=>rd:x27(0x00001000), rs2:x21(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x27, x21, 0x0, 0x00001052, 0x00001000, 0x00000000, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00002052), rs1=>rd:x28(0x00002000), rs2:x20(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x28, x20, 0x0, 0x00002052, 0x00002000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00004052), rs1=>rd:x29(0x00004000), rs2:x19(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x29, x19, 0x0, 0x00004052, 0x00004000, 0x00000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00008052), rs1=>rd:x30(0x00008000), rs2:x18(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x30, x18, 0x0, 0x00008052, 0x00008000, 0x00000000, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00010052), rs1=>rd:x31(0x00010000), rs2:x17(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x31, x17, 0x0, 0x00010052, 0x00010000, 0x00000000, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00020052), rs1=>rd:x1(0x00020000), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x1, x16, 0x0, 0x00020052, 0x00020000, 0x00000000, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00040052), rs1=>rd:x2(0x00040000), rs2:x15(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x2, x15, 0x0, 0x00040052, 0x00040000, 0x00000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00080052), rs1=>rd:x3(0x00080000), rs2:x14(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x3, x14, 0x0, 0x00080052, 0x00080000, 0x00000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00100052), rs1=>rd:x4(0x00100000), rs2:x13(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x4, x13, 0x0, 0x00100052, 0x00100000, 0x00000000, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00200052), rs1=>rd:x5(0x00200000), rs2:x12(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x5, x12, 0x0, 0x00200052, 0x00200000, 0x00000000, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00400052), rs1=>rd:x6(0x00400000), rs2:x11(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x6, x11, 0x0, 0x00400052, 0x00400000, 0x00000000, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00800052), rs1=>rd:x7(0x00800000), rs2:x10(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x7, x10, 0x0, 0x00800052, 0x00800000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x01000052), rs1=>rd:x8(0x01000000), rs2:x9(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x8, x9, 0x0, 0x01000052, 0x01000000, 0x00000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x02000052), rs1=>rd:x9(0x02000000), rs2:x8(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x9, x8, 0x0, 0x02000052, 0x02000000, 0x00000000, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x04000052), rs1=>rd:x10(0x04000000), rs2:x7(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x10, x7, 0x0, 0x04000052, 0x04000000, 0x00000000, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x08000052), rs1=>rd:x11(0x08000000), rs2:x6(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x11, x6, 0x0, 0x08000052, 0x08000000, 0x00000000, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x10000052), rs1=>rd:x12(0x10000000), rs2:x5(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x12, x5, 0x0, 0x10000052, 0x10000000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x20000052), rs1=>rd:x13(0x20000000), rs2:x4(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x13, x4, 0x0, 0x20000052, 0x20000000, 0x00000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x40000052), rs1=>rd:x14(0x40000000), rs2:x3(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x14, x3, 0x0, 0x40000052, 0x40000000, 0x00000000, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x80000052), rs1=>rd:x15(0x80000000), rs2:x2(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x15, x2, 0x0, 0x80000052, 0x80000000, 0x00000000, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000052), rs1=>rd:x16(0x00000000), rs2:x1(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x16, x1, 0x0, 0x00000052, 0x00000000, 0x00000000, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xffffffac), rs1=>rd:x17(0xfffffffe), rs2:x31(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x17, x31, 0x0, 0xffffffac, 0xfffffffe, 0x00000000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xffffffaf), rs1=>rd:x18(0xfffffffd), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x18, x30, 0x0, 0xffffffaf, 0xfffffffd, 0x00000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffa9), rs1=>rd:x19(0xfffffffb), rs2:x29(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x19, x29, 0x0, 0xffffffa9, 0xfffffffb, 0x00000000, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffa5), rs1=>rd:x20(0xfffffff7), rs2:x28(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x20, x28, 0x0, 0xffffffa5, 0xfffffff7, 0x00000000, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffbd), rs1=>rd:x21(0xffffffef), rs2:x27(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x21, x27, 0x0, 0xffffffbd, 0xffffffef, 0x00000000, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffff8d), rs1=>rd:x22(0xffffffdf), rs2:x26(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x22, x26, 0x0, 0xffffff8d, 0xffffffdf, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffed), rs1=>rd:x23(0xffffffbf), rs2:x25(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x23, x25, 0x0, 0xffffffed, 0xffffffbf, 0x00000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000052), rs1=>rd:x24(0xffffff7f), rs2:x24(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x24, x24, 0x0, 0x00000052, 0xffffff7f, 0x00000000, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfffffead), rs1=>rd:x25(0xfffffeff), rs2:x23(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x25, x23, 0x0, 0xfffffead, 0xfffffeff, 0x00000000, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfffffdad), rs1=>rd:x26(0xfffffdff), rs2:x22(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x26, x22, 0x0, 0xfffffdad, 0xfffffdff, 0x00000000, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xfffffbad), rs1=>rd:x27(0xfffffbff), rs2:x21(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x27, x21, 0x0, 0xfffffbad, 0xfffffbff, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfffff7ad), rs1=>rd:x28(0xfffff7ff), rs2:x20(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x28, x20, 0x0, 0xfffff7ad, 0xfffff7ff, 0x00000000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffefad), rs1=>rd:x29(0xffffefff), rs2:x19(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x29, x19, 0x0, 0xffffefad, 0xffffefff, 0x00000000, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffdfad), rs1=>rd:x30(0xffffdfff), rs2:x18(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x30, x18, 0x0, 0xffffdfad, 0xffffdfff, 0x00000000, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffbfad), rs1=>rd:x31(0xffffbfff), rs2:x17(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x31, x17, 0x0, 0xffffbfad, 0xffffbfff, 0x00000000, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffff7fad), rs1=>rd:x1(0xffff7fff), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x1, x16, 0x0, 0xffff7fad, 0xffff7fff, 0x00000000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffeffad), rs1=>rd:x2(0xfffeffff), rs2:x15(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x2, x15, 0x0, 0xfffeffad, 0xfffeffff, 0x00000000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfffdffad), rs1=>rd:x3(0xfffdffff), rs2:x14(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x3, x14, 0x0, 0xfffdffad, 0xfffdffff, 0x00000000, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfffbffad), rs1=>rd:x4(0xfffbffff), rs2:x13(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x4, x13, 0x0, 0xfffbffad, 0xfffbffff, 0x00000000, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfff7ffad), rs1=>rd:x5(0xfff7ffff), rs2:x12(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x5, x12, 0x0, 0xfff7ffad, 0xfff7ffff, 0x00000000, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffefffad), rs1=>rd:x6(0xffefffff), rs2:x11(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x6, x11, 0x0, 0xffefffad, 0xffefffff, 0x00000000, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffdfffad), rs1=>rd:x7(0xffdfffff), rs2:x10(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x7, x10, 0x0, 0xffdfffad, 0xffdfffff, 0x00000000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffbfffad), rs1=>rd:x8(0xffbfffff), rs2:x9(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x8, x9, 0x0, 0xffbfffad, 0xffbfffff, 0x00000000, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xad7fffff), rs1=>rd:x9(0xff7fffff), rs2:x8(0x00000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x9, x8, 0x3, 0xad7fffff, 0xff7fffff, 0x00000000, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xacffffff), rs1=>rd:x10(0xfeffffff), rs2:x7(0x00000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x10, x7, 0x3, 0xacffffff, 0xfeffffff, 0x00000000, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xafffffff), rs1=>rd:x11(0xfdffffff), rs2:x6(0x00000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x11, x6, 0x3, 0xafffffff, 0xfdffffff, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xa9ffffff), rs1=>rd:x12(0xfbffffff), rs2:x5(0x00000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x12, x5, 0x3, 0xa9ffffff, 0xfbffffff, 0x00000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xf7ffadff), rs1=>rd:x13(0xf7ffffff), rs2:x4(0x00000000), imm:0x1
+ TEST_RI_OP(aes32dsi, x13, x4, 0x1, 0xf7ffadff, 0xf7ffffff, 0x00000000, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xefffadff), rs1=>rd:x14(0xefffffff), rs2:x3(0x00000000), imm:0x1
+ TEST_RI_OP(aes32dsi, x14, x3, 0x1, 0xefffadff, 0xefffffff, 0x00000000, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x8dffffff), rs1=>rd:x15(0xdfffffff), rs2:x2(0x00000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x15, x2, 0x3, 0x8dffffff, 0xdfffffff, 0x00000000, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xbfffadff), rs1=>rd:x16(0xbfffffff), rs2:x1(0x00000000), imm:0x1
+ TEST_RI_OP(aes32dsi, x16, x1, 0x1, 0xbfffadff, 0xbfffffff, 0x00000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x7fadffff), rs1=>rd:x17(0x7fffffff), rs2:x31(0x00000000), imm:0x2
+ TEST_RI_OP(aes32dsi, x17, x31, 0x2, 0x7fadffff, 0x7fffffff, 0x00000000, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffad), rs1=>rd:x18(0xffffffff), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x18, x30, 0x0, 0xffffffad, 0xffffffff, 0x00000000, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0xadae5195), rs1=>rd:x19(0xadea5195), rs2:x29(0x121bcc23), imm:0x2
+ TEST_RI_OP(aes32dsi, x19, x29, 0x2, 0xadae5195, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1=>rd:x0(0xd2ffbec1), rs2:x28(0xa47d105b), imm:0x1
+ TEST_RI_OP(aes32dsi, x0, x28, 0x1, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xfae1a8bb), rs1=>rd:x21(0xa8e1a8bb), rs2:x0(0x707af2c0), imm:0x3
+ TEST_RI_OP(aes32dsi, x21, x0, 0x3, 0xfae1a8bb, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with random values
+ // result rd:x22(0xa8c99fcb), rs1=>rd:x22(0x48c99fcb), rs2:x26(0xe19bfbc3), imm:0x3
+ TEST_RI_OP(aes32dsi, x22, x26, 0x3, 0xa8c99fcb, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/AES32DSI-02.S b/riscof/suite/rv32i_m/K_unratified/AES32DSI-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..c70989d19e39458c26cc93e67564832c6f9a516a
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/AES32DSI-02.S
@@ -0,0 +1,1780 @@
+// RISC-V Architectural Validation Test AES32DSI-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes32dsi'.
+// Using dataset: sbox32
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes32dsi)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes32dsi)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox32
+ // result rd:x1(0xadea51c7), rs1=>rd:x1(0xadea5195), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsi, x1, x16, 0x0, 0xadea51c7, 0xadea5195, 0x00000000, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox32
+ // result rd:x2(0xd2ffb7c1), rs1=>rd:x2(0xd2ffbec1), rs2:x15(0x00000100), imm:0x1
+ TEST_RI_OP(aes32dsi, x2, x15, 0x1, 0xd2ffb7c1, 0xd2ffbec1, 0x00000100, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox32
+ // result rd:x3(0xa88ba8bb), rs1=>rd:x3(0xa8e1a8bb), rs2:x14(0x00020000), imm:0x2
+ TEST_RI_OP(aes32dsi, x3, x14, 0x2, 0xa88ba8bb, 0xa8e1a8bb, 0x00020000, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox32
+ // result rd:x4(0x9dc99fcb), rs1=>rd:x4(0x48c99fcb), rs2:x13(0x03000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x4, x13, 0x3, 0x9dc99fcb, 0x48c99fcb, 0x03000000, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox32
+ // result rd:x5(0x461d527f), rs1=>rd:x5(0x461d524f), rs2:x12(0x00000004), imm:0x0
+ TEST_RI_OP(aes32dsi, x5, x12, 0x0, 0x461d527f, 0x461d524f, 0x00000004, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox32
+ // result rd:x6(0x528a26af), rs1=>rd:x6(0x528a10af), rs2:x11(0x00000500), imm:0x1
+ TEST_RI_OP(aes32dsi, x6, x11, 0x1, 0x528a26af, 0x528a10af, 0x00000500, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox32
+ // result rd:x7(0xe13efbc3), rs1=>rd:x7(0xe19bfbc3), rs2:x10(0x00060000), imm:0x2
+ TEST_RI_OP(aes32dsi, x7, x10, 0x2, 0xe13efbc3, 0xe19bfbc3, 0x00060000, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox32
+ // result rd:x8(0x487af2c0), rs1=>rd:x8(0x707af2c0), rs2:x9(0x07000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x8, x9, 0x3, 0x487af2c0, 0x707af2c0, 0x07000000, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox32
+ // result rd:x9(0xa47d10e4), rs1=>rd:x9(0xa47d105b), rs2:x8(0x00000008), imm:0x0
+ TEST_RI_OP(aes32dsi, x9, x8, 0x0, 0xa47d10e4, 0xa47d105b, 0x00000008, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox32
+ // result rd:x10(0x121b8c23), rs1=>rd:x10(0x121bcc23), rs2:x7(0x00000900), imm:0x1
+ TEST_RI_OP(aes32dsi, x10, x7, 0x1, 0x121b8c23, 0x121bcc23, 0x00000900, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox32
+ // result rd:x11(0xad495195), rs1=>rd:x11(0xadea5195), rs2:x6(0x000a0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x11, x6, 0x2, 0xad495195, 0xadea5195, 0x000a0000, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox32
+ // result rd:x12(0x4cffbec1), rs1=>rd:x12(0xd2ffbec1), rs2:x5(0x0b000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x12, x5, 0x3, 0x4cffbec1, 0xd2ffbec1, 0x0b000000, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox32
+ // result rd:x13(0xa8e1a83a), rs1=>rd:x13(0xa8e1a8bb), rs2:x4(0x0000000c), imm:0x0
+ TEST_RI_OP(aes32dsi, x13, x4, 0x0, 0xa8e1a83a, 0xa8e1a8bb, 0x0000000c, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox32
+ // result rd:x14(0x48c96ccb), rs1=>rd:x14(0x48c99fcb), rs2:x3(0x00000d00), imm:0x1
+ TEST_RI_OP(aes32dsi, x14, x3, 0x1, 0x48c96ccb, 0x48c99fcb, 0x00000d00, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox32
+ // result rd:x15(0x46ca524f), rs1=>rd:x15(0x461d524f), rs2:x2(0x000e0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x15, x2, 0x2, 0x46ca524f, 0x461d524f, 0x000e0000, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox32
+ // result rd:x16(0xa98a10af), rs1=>rd:x16(0x528a10af), rs2:x1(0x0f000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x16, x1, 0x3, 0xa98a10af, 0x528a10af, 0x0f000000, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox32
+ // result rd:x17(0xe19bfbbf), rs1=>rd:x17(0xe19bfbc3), rs2:x31(0x00000010), imm:0x0
+ TEST_RI_OP(aes32dsi, x17, x31, 0x0, 0xe19bfbbf, 0xe19bfbc3, 0x00000010, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox32
+ // result rd:x18(0x707a11c0), rs1=>rd:x18(0x707af2c0), rs2:x30(0x00001100), imm:0x1
+ TEST_RI_OP(aes32dsi, x18, x30, 0x1, 0x707a11c0, 0x707af2c0, 0x00001100, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox32
+ // result rd:x19(0xa444105b), rs1=>rd:x19(0xa47d105b), rs2:x29(0x00120000), imm:0x2
+ TEST_RI_OP(aes32dsi, x19, x29, 0x2, 0xa444105b, 0xa47d105b, 0x00120000, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox32
+ // result rd:x20(0x901bcc23), rs1=>rd:x20(0x121bcc23), rs2:x28(0x13000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x20, x28, 0x3, 0x901bcc23, 0x121bcc23, 0x13000000, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox32
+ // result rd:x21(0xadea510e), rs1=>rd:x21(0xadea5195), rs2:x27(0x00000014), imm:0x0
+ TEST_RI_OP(aes32dsi, x21, x27, 0x0, 0xadea510e, 0xadea5195, 0x00000014, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox32
+ // result rd:x22(0xd2ff91c1), rs1=>rd:x22(0xd2ffbec1), rs2:x26(0x00001500), imm:0x1
+ TEST_RI_OP(aes32dsi, x22, x26, 0x1, 0xd2ff91c1, 0xd2ffbec1, 0x00001500, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox32
+ // result rd:x23(0xa81ea8bb), rs1=>rd:x23(0xa8e1a8bb), rs2:x25(0x00160000), imm:0x2
+ TEST_RI_OP(aes32dsi, x23, x25, 0x2, 0xa81ea8bb, 0xa8e1a8bb, 0x00160000, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox32
+ // result rd:x24(0x90000000), rs1=>rd:x24(0x48c99fcb), rs2:x24(0x17000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x24, x24, 0x3, 0x90000000, 0x48c99fcb, 0x17000000, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox32
+ // result rd:x25(0x461d527b), rs1=>rd:x25(0x461d524f), rs2:x23(0x00000018), imm:0x0
+ TEST_RI_OP(aes32dsi, x25, x23, 0x0, 0x461d527b, 0x461d524f, 0x00000018, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox32
+ // result rd:x26(0x528a9eaf), rs1=>rd:x26(0x528a10af), rs2:x22(0x00001900), imm:0x1
+ TEST_RI_OP(aes32dsi, x26, x22, 0x1, 0x528a9eaf, 0x528a10af, 0x00001900, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox32
+ // result rd:x27(0xe1d8fbc3), rs1=>rd:x27(0xe19bfbc3), rs2:x21(0x001a0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x27, x21, 0x2, 0xe1d8fbc3, 0xe19bfbc3, 0x001a0000, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox32
+ // result rd:x28(0x347af2c0), rs1=>rd:x28(0x707af2c0), rs2:x20(0x1b000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x28, x20, 0x3, 0x347af2c0, 0x707af2c0, 0x1b000000, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox32
+ // result rd:x29(0xa47d109f), rs1=>rd:x29(0xa47d105b), rs2:x19(0x0000001c), imm:0x0
+ TEST_RI_OP(aes32dsi, x29, x19, 0x0, 0xa47d109f, 0xa47d105b, 0x0000001c, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox32
+ // result rd:x30(0x121b1223), rs1=>rd:x30(0x121bcc23), rs2:x18(0x00001d00), imm:0x1
+ TEST_RI_OP(aes32dsi, x30, x18, 0x1, 0x121b1223, 0x121bcc23, 0x00001d00, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox32
+ // result rd:x31(0xad035195), rs1=>rd:x31(0xadea5195), rs2:x17(0x001e0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x31, x17, 0x2, 0xad035195, 0xadea5195, 0x001e0000, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox32
+ // result rd:x1(0x19ffbec1), rs1=>rd:x1(0xd2ffbec1), rs2:x16(0x1f000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x1, x16, 0x3, 0x19ffbec1, 0xd2ffbec1, 0x1f000000, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox32
+ // result rd:x2(0xa8e1a8ef), rs1=>rd:x2(0xa8e1a8bb), rs2:x15(0x00000020), imm:0x0
+ TEST_RI_OP(aes32dsi, x2, x15, 0x0, 0xa8e1a8ef, 0xa8e1a8bb, 0x00000020, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox32
+ // result rd:x3(0x48c9e4cb), rs1=>rd:x3(0x48c99fcb), rs2:x14(0x00002100), imm:0x1
+ TEST_RI_OP(aes32dsi, x3, x14, 0x1, 0x48c9e4cb, 0x48c99fcb, 0x00002100, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox32
+ // result rd:x4(0x4689524f), rs1=>rd:x4(0x461d524f), rs2:x13(0x00220000), imm:0x2
+ TEST_RI_OP(aes32dsi, x4, x13, 0x2, 0x4689524f, 0x461d524f, 0x00220000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox32
+ // result rd:x5(0x608a10af), rs1=>rd:x5(0x528a10af), rs2:x12(0x23000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x5, x12, 0x3, 0x608a10af, 0x528a10af, 0x23000000, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox32
+ // result rd:x6(0xe19bfb65), rs1=>rd:x6(0xe19bfbc3), rs2:x11(0x00000024), imm:0x0
+ TEST_RI_OP(aes32dsi, x6, x11, 0x0, 0xe19bfb65, 0xe19bfbc3, 0x00000024, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox32
+ // result rd:x7(0x707a30c0), rs1=>rd:x7(0x707af2c0), rs2:x10(0x00002500), imm:0x1
+ TEST_RI_OP(aes32dsi, x7, x10, 0x1, 0x707a30c0, 0x707af2c0, 0x00002500, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox32
+ // result rd:x8(0xa45e105b), rs1=>rd:x8(0xa47d105b), rs2:x9(0x00260000), imm:0x2
+ TEST_RI_OP(aes32dsi, x8, x9, 0x2, 0xa45e105b, 0xa47d105b, 0x00260000, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox32
+ // result rd:x9(0x2f1bcc23), rs1=>rd:x9(0x121bcc23), rs2:x8(0x27000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x9, x8, 0x3, 0x2f1bcc23, 0x121bcc23, 0x27000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox32
+ // result rd:x10(0xadea517b), rs1=>rd:x10(0xadea5195), rs2:x7(0x00000028), imm:0x0
+ TEST_RI_OP(aes32dsi, x10, x7, 0x0, 0xadea517b, 0xadea5195, 0x00000028, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox32
+ // result rd:x11(0xd2fff2c1), rs1=>rd:x11(0xd2ffbec1), rs2:x6(0x00002900), imm:0x1
+ TEST_RI_OP(aes32dsi, x11, x6, 0x1, 0xd2fff2c1, 0xd2ffbec1, 0x00002900, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox32
+ // result rd:x12(0xa874a8bb), rs1=>rd:x12(0xa8e1a8bb), rs2:x5(0x002a0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x12, x5, 0x2, 0xa874a8bb, 0xa8e1a8bb, 0x002a0000, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox32
+ // result rd:x13(0x43c99fcb), rs1=>rd:x13(0x48c99fcb), rs2:x4(0x2b000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x13, x4, 0x3, 0x43c99fcb, 0x48c99fcb, 0x2b000000, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox32
+ // result rd:x14(0x461d520d), rs1=>rd:x14(0x461d524f), rs2:x3(0x0000002c), imm:0x0
+ TEST_RI_OP(aes32dsi, x14, x3, 0x0, 0x461d520d, 0x461d524f, 0x0000002c, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox32
+ // result rd:x15(0x528aeaaf), rs1=>rd:x15(0x528a10af), rs2:x2(0x00002d00), imm:0x1
+ TEST_RI_OP(aes32dsi, x15, x2, 0x1, 0x528aeaaf, 0x528a10af, 0x00002d00, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox32
+ // result rd:x16(0xe158fbc3), rs1=>rd:x16(0xe19bfbc3), rs2:x1(0x002e0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x16, x1, 0x2, 0xe158fbc3, 0xe19bfbc3, 0x002e0000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox32
+ // result rd:x17(0x3e7af2c0), rs1=>rd:x17(0x707af2c0), rs2:x31(0x2f000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x17, x31, 0x3, 0x3e7af2c0, 0x707af2c0, 0x2f000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox32
+ // result rd:x18(0xa47d1053), rs1=>rd:x18(0xa47d105b), rs2:x30(0x00000030), imm:0x0
+ TEST_RI_OP(aes32dsi, x18, x30, 0x0, 0xa47d1053, 0xa47d105b, 0x00000030, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox32
+ // result rd:x19(0x121be223), rs1=>rd:x19(0x121bcc23), rs2:x29(0x00003100), imm:0x1
+ TEST_RI_OP(aes32dsi, x19, x29, 0x1, 0x121be223, 0x121bcc23, 0x00003100, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox32
+ // result rd:x20(0xad4b5195), rs1=>rd:x20(0xadea5195), rs2:x28(0x00320000), imm:0x2
+ TEST_RI_OP(aes32dsi, x20, x28, 0x2, 0xad4b5195, 0xadea5195, 0x00320000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox32
+ // result rd:x21(0xb4ffbec1), rs1=>rd:x21(0xd2ffbec1), rs2:x27(0x33000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x21, x27, 0x3, 0xb4ffbec1, 0xd2ffbec1, 0x33000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox32
+ // result rd:x22(0xa8e1a893), rs1=>rd:x22(0xa8e1a8bb), rs2:x26(0x00000034), imm:0x0
+ TEST_RI_OP(aes32dsi, x22, x26, 0x0, 0xa8e1a893, 0xa8e1a8bb, 0x00000034, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox32
+ // result rd:x23(0x48c946cb), rs1=>rd:x23(0x48c99fcb), rs2:x25(0x00003500), imm:0x1
+ TEST_RI_OP(aes32dsi, x23, x25, 0x1, 0x48c946cb, 0x48c99fcb, 0x00003500, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox32
+ // result rd:x24(0x00120000), rs1=>rd:x24(0x461d524f), rs2:x24(0x00360000), imm:0x2
+ TEST_RI_OP(aes32dsi, x24, x24, 0x2, 0x00120000, 0x461d524f, 0x00360000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox32
+ // result rd:x25(0xe08a10af), rs1=>rd:x25(0x528a10af), rs2:x23(0x37000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x25, x23, 0x3, 0xe08a10af, 0x528a10af, 0x37000000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox32
+ // result rd:x26(0xe19bfbb5), rs1=>rd:x26(0xe19bfbc3), rs2:x22(0x00000038), imm:0x0
+ TEST_RI_OP(aes32dsi, x26, x22, 0x0, 0xe19bfbb5, 0xe19bfbc3, 0x00000038, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox32
+ // result rd:x27(0x707aa9c0), rs1=>rd:x27(0x707af2c0), rs2:x21(0x00003900), imm:0x1
+ TEST_RI_OP(aes32dsi, x27, x21, 0x1, 0x707aa9c0, 0x707af2c0, 0x00003900, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox32
+ // result rd:x28(0xa4df105b), rs1=>rd:x28(0xa47d105b), rs2:x20(0x003a0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x28, x20, 0x2, 0xa4df105b, 0xa47d105b, 0x003a0000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox32
+ // result rd:x29(0x5b1bcc23), rs1=>rd:x29(0x121bcc23), rs2:x19(0x3b000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x29, x19, 0x3, 0x5b1bcc23, 0x121bcc23, 0x3b000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox32
+ // result rd:x30(0xadea51f8), rs1=>rd:x30(0xadea5195), rs2:x18(0x0000003c), imm:0x0
+ TEST_RI_OP(aes32dsi, x30, x18, 0x0, 0xadea51f8, 0xadea5195, 0x0000003c, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox32
+ // result rd:x31(0xd2ff35c1), rs1=>rd:x31(0xd2ffbec1), rs2:x17(0x00003d00), imm:0x1
+ TEST_RI_OP(aes32dsi, x31, x17, 0x1, 0xd2ff35c1, 0xd2ffbec1, 0x00003d00, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox32
+ // result rd:x1(0xa830a8bb), rs1=>rd:x1(0xa8e1a8bb), rs2:x16(0x003e0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x1, x16, 0x2, 0xa830a8bb, 0xa8e1a8bb, 0x003e0000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox32
+ // result rd:x2(0x6dc99fcb), rs1=>rd:x2(0x48c99fcb), rs2:x15(0x3f000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x2, x15, 0x3, 0x6dc99fcb, 0x48c99fcb, 0x3f000000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox32
+ // result rd:x3(0x461d523d), rs1=>rd:x3(0x461d524f), rs2:x14(0x00000040), imm:0x0
+ TEST_RI_OP(aes32dsi, x3, x14, 0x0, 0x461d523d, 0x461d524f, 0x00000040, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox32
+ // result rd:x4(0x528ae8af), rs1=>rd:x4(0x528a10af), rs2:x13(0x00004100), imm:0x1
+ TEST_RI_OP(aes32dsi, x4, x13, 0x1, 0x528ae8af, 0x528a10af, 0x00004100, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox32
+ // result rd:x5(0xe16dfbc3), rs1=>rd:x5(0xe19bfbc3), rs2:x12(0x00420000), imm:0x2
+ TEST_RI_OP(aes32dsi, x5, x12, 0x2, 0xe16dfbc3, 0xe19bfbc3, 0x00420000, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox32
+ // result rd:x6(0x147af2c0), rs1=>rd:x6(0x707af2c0), rs2:x11(0x43000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x6, x11, 0x3, 0x147af2c0, 0x707af2c0, 0x43000000, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox32
+ // result rd:x7(0xa47d10dd), rs1=>rd:x7(0xa47d105b), rs2:x10(0x00000044), imm:0x0
+ TEST_RI_OP(aes32dsi, x7, x10, 0x0, 0xa47d10dd, 0xa47d105b, 0x00000044, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox32
+ // result rd:x8(0x121ba423), rs1=>rd:x8(0x121bcc23), rs2:x9(0x00004500), imm:0x1
+ TEST_RI_OP(aes32dsi, x8, x9, 0x1, 0x121ba423, 0x121bcc23, 0x00004500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox32
+ // result rd:x9(0xad725195), rs1=>rd:x9(0xadea5195), rs2:x8(0x00460000), imm:0x2
+ TEST_RI_OP(aes32dsi, x9, x8, 0x2, 0xad725195, 0xadea5195, 0x00460000, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox32
+ // result rd:x10(0xc4ffbec1), rs1=>rd:x10(0xd2ffbec1), rs2:x7(0x47000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x10, x7, 0x3, 0xc4ffbec1, 0xd2ffbec1, 0x47000000, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox32
+ // result rd:x11(0xa8e1a86f), rs1=>rd:x11(0xa8e1a8bb), rs2:x6(0x00000048), imm:0x0
+ TEST_RI_OP(aes32dsi, x11, x6, 0x0, 0xa8e1a86f, 0xa8e1a8bb, 0x00000048, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox32
+ // result rd:x12(0x48c93bcb), rs1=>rd:x12(0x48c99fcb), rs2:x5(0x00004900), imm:0x1
+ TEST_RI_OP(aes32dsi, x12, x5, 0x1, 0x48c93bcb, 0x48c99fcb, 0x00004900, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox32
+ // result rd:x13(0x4641524f), rs1=>rd:x13(0x461d524f), rs2:x4(0x004a0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x13, x4, 0x2, 0x4641524f, 0x461d524f, 0x004a0000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox32
+ // result rd:x14(0x9e8a10af), rs1=>rd:x14(0x528a10af), rs2:x3(0x4b000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x14, x3, 0x3, 0x9e8a10af, 0x528a10af, 0x4b000000, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox32
+ // result rd:x15(0xe19bfb9e), rs1=>rd:x15(0xe19bfbc3), rs2:x2(0x0000004c), imm:0x0
+ TEST_RI_OP(aes32dsi, x15, x2, 0x0, 0xe19bfb9e, 0xe19bfbc3, 0x0000004c, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox32
+ // result rd:x16(0x707a97c0), rs1=>rd:x16(0x707af2c0), rs2:x1(0x00004d00), imm:0x1
+ TEST_RI_OP(aes32dsi, x16, x1, 0x1, 0x707a97c0, 0x707af2c0, 0x00004d00, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox32
+ // result rd:x17(0xa4cb105b), rs1=>rd:x17(0xa47d105b), rs2:x31(0x004e0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x17, x31, 0x2, 0xa4cb105b, 0xa47d105b, 0x004e0000, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox32
+ // result rd:x18(0x801bcc23), rs1=>rd:x18(0x121bcc23), rs2:x30(0x4f000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x18, x30, 0x3, 0x801bcc23, 0x121bcc23, 0x4f000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox32
+ // result rd:x19(0xadea51f9), rs1=>rd:x19(0xadea5195), rs2:x29(0x00000050), imm:0x0
+ TEST_RI_OP(aes32dsi, x19, x29, 0x0, 0xadea51f9, 0xadea5195, 0x00000050, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox32
+ // result rd:x20(0xd2ffcec1), rs1=>rd:x20(0xd2ffbec1), rs2:x28(0x00005100), imm:0x1
+ TEST_RI_OP(aes32dsi, x20, x28, 0x1, 0xd2ffcec1, 0xd2ffbec1, 0x00005100, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox32
+ // result rd:x21(0xa8a9a8bb), rs1=>rd:x21(0xa8e1a8bb), rs2:x27(0x00520000), imm:0x2
+ TEST_RI_OP(aes32dsi, x21, x27, 0x2, 0xa8a9a8bb, 0xa8e1a8bb, 0x00520000, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox32
+ // result rd:x22(0x18c99fcb), rs1=>rd:x22(0x48c99fcb), rs2:x26(0x53000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x22, x26, 0x3, 0x18c99fcb, 0x48c99fcb, 0x53000000, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox32
+ // result rd:x23(0x461d52b2), rs1=>rd:x23(0x461d524f), rs2:x25(0x00000054), imm:0x0
+ TEST_RI_OP(aes32dsi, x23, x25, 0x0, 0x461d52b2, 0x461d524f, 0x00000054, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox32
+ // result rd:x24(0x0000b800), rs1=>rd:x24(0x528a10af), rs2:x24(0x00005500), imm:0x1
+ TEST_RI_OP(aes32dsi, x24, x24, 0x1, 0x0000b800, 0x528a10af, 0x00005500, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox32
+ // result rd:x25(0xe122fbc3), rs1=>rd:x25(0xe19bfbc3), rs2:x23(0x00560000), imm:0x2
+ TEST_RI_OP(aes32dsi, x25, x23, 0x2, 0xe122fbc3, 0xe19bfbc3, 0x00560000, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox32
+ // result rd:x26(0xaa7af2c0), rs1=>rd:x26(0x707af2c0), rs2:x22(0x57000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x26, x22, 0x3, 0xaa7af2c0, 0x707af2c0, 0x57000000, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox32
+ // result rd:x27(0xa47d1005), rs1=>rd:x27(0xa47d105b), rs2:x21(0x00000058), imm:0x0
+ TEST_RI_OP(aes32dsi, x27, x21, 0x0, 0xa47d1005, 0xa47d105b, 0x00000058, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox32
+ // result rd:x28(0x121bd923), rs1=>rd:x28(0x121bcc23), rs2:x20(0x00005900), imm:0x1
+ TEST_RI_OP(aes32dsi, x28, x20, 0x1, 0x121bd923, 0x121bcc23, 0x00005900, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox32
+ // result rd:x29(0xadac5195), rs1=>rd:x29(0xadea5195), rs2:x19(0x005a0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x29, x19, 0x2, 0xadac5195, 0xadea5195, 0x005a0000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox32
+ // result rd:x30(0x85ffbec1), rs1=>rd:x30(0xd2ffbec1), rs2:x18(0x5b000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x30, x18, 0x3, 0x85ffbec1, 0xd2ffbec1, 0x5b000000, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox32
+ // result rd:x31(0xa8e1a81c), rs1=>rd:x31(0xa8e1a8bb), rs2:x17(0x0000005c), imm:0x0
+ TEST_RI_OP(aes32dsi, x31, x17, 0x0, 0xa8e1a81c, 0xa8e1a8bb, 0x0000005c, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox32
+ // result rd:x1(0x48c912cb), rs1=>rd:x1(0x48c99fcb), rs2:x16(0x00005d00), imm:0x1
+ TEST_RI_OP(aes32dsi, x1, x16, 0x1, 0x48c912cb, 0x48c99fcb, 0x00005d00, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox32
+ // result rd:x2(0x4680524f), rs1=>rd:x2(0x461d524f), rs2:x15(0x005e0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x2, x15, 0x2, 0x4680524f, 0x461d524f, 0x005e0000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox32
+ // result rd:x3(0xd68a10af), rs1=>rd:x3(0x528a10af), rs2:x14(0x5f000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x3, x14, 0x3, 0xd68a10af, 0x528a10af, 0x5f000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox32
+ // result rd:x4(0xe19bfb53), rs1=>rd:x4(0xe19bfbc3), rs2:x13(0x00000060), imm:0x0
+ TEST_RI_OP(aes32dsi, x4, x13, 0x0, 0xe19bfb53, 0xe19bfbc3, 0x00000060, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox32
+ // result rd:x5(0x707a2ac0), rs1=>rd:x5(0x707af2c0), rs2:x12(0x00006100), imm:0x1
+ TEST_RI_OP(aes32dsi, x5, x12, 0x1, 0x707a2ac0, 0x707af2c0, 0x00006100, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox32
+ // result rd:x6(0xa4d6105b), rs1=>rd:x6(0xa47d105b), rs2:x11(0x00620000), imm:0x2
+ TEST_RI_OP(aes32dsi, x6, x11, 0x2, 0xa4d6105b, 0xa47d105b, 0x00620000, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox32
+ // result rd:x7(0x121bcc23), rs1=>rd:x7(0x121bcc23), rs2:x10(0x63000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x7, x10, 0x3, 0x121bcc23, 0x121bcc23, 0x63000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox32
+ // result rd:x8(0xadea5119), rs1=>rd:x8(0xadea5195), rs2:x9(0x00000064), imm:0x0
+ TEST_RI_OP(aes32dsi, x8, x9, 0x0, 0xadea5119, 0xadea5195, 0x00000064, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox32
+ // result rd:x9(0xd2ff02c1), rs1=>rd:x9(0xd2ffbec1), rs2:x8(0x00006500), imm:0x1
+ TEST_RI_OP(aes32dsi, x9, x8, 0x1, 0xd2ff02c1, 0xd2ffbec1, 0x00006500, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox32
+ // result rd:x10(0xa832a8bb), rs1=>rd:x10(0xa8e1a8bb), rs2:x7(0x00660000), imm:0x2
+ TEST_RI_OP(aes32dsi, x10, x7, 0x2, 0xa832a8bb, 0xa8e1a8bb, 0x00660000, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox32
+ // result rd:x11(0x42c99fcb), rs1=>rd:x11(0x48c99fcb), rs2:x6(0x67000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x11, x6, 0x3, 0x42c99fcb, 0x48c99fcb, 0x67000000, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox32
+ // result rd:x12(0x461d52b8), rs1=>rd:x12(0x461d524f), rs2:x5(0x00000068), imm:0x0
+ TEST_RI_OP(aes32dsi, x12, x5, 0x0, 0x461d52b8, 0x461d524f, 0x00000068, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox32
+ // result rd:x13(0x528af4af), rs1=>rd:x13(0x528a10af), rs2:x4(0x00006900), imm:0x1
+ TEST_RI_OP(aes32dsi, x13, x4, 0x1, 0x528af4af, 0x528a10af, 0x00006900, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox32
+ // result rd:x14(0xe1c3fbc3), rs1=>rd:x14(0xe19bfbc3), rs2:x3(0x006a0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x14, x3, 0x2, 0xe1c3fbc3, 0xe19bfbc3, 0x006a0000, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox32
+ // result rd:x15(0x757af2c0), rs1=>rd:x15(0x707af2c0), rs2:x2(0x6b000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x15, x2, 0x3, 0x757af2c0, 0x707af2c0, 0x6b000000, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox32
+ // result rd:x16(0xa47d10e3), rs1=>rd:x16(0xa47d105b), rs2:x1(0x0000006c), imm:0x0
+ TEST_RI_OP(aes32dsi, x16, x1, 0x0, 0xa47d10e3, 0xa47d105b, 0x0000006c, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox32
+ // result rd:x17(0x121b7f23), rs1=>rd:x17(0x121bcc23), rs2:x31(0x00006d00), imm:0x1
+ TEST_RI_OP(aes32dsi, x17, x31, 0x1, 0x121b7f23, 0x121bcc23, 0x00006d00, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox32
+ // result rd:x18(0xadaf5195), rs1=>rd:x18(0xadea5195), rs2:x30(0x006e0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x18, x30, 0x2, 0xadaf5195, 0xadea5195, 0x006e0000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox32
+ // result rd:x19(0xd4ffbec1), rs1=>rd:x19(0xd2ffbec1), rs2:x29(0x6f000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x19, x29, 0x3, 0xd4ffbec1, 0xd2ffbec1, 0x6f000000, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox32
+ // result rd:x20(0xa8e1a86b), rs1=>rd:x20(0xa8e1a8bb), rs2:x28(0x00000070), imm:0x0
+ TEST_RI_OP(aes32dsi, x20, x28, 0x0, 0xa8e1a86b, 0xa8e1a8bb, 0x00000070, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox32
+ // result rd:x21(0x48c9b3cb), rs1=>rd:x21(0x48c99fcb), rs2:x27(0x00007100), imm:0x1
+ TEST_RI_OP(aes32dsi, x21, x27, 0x1, 0x48c9b3cb, 0x48c99fcb, 0x00007100, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox32
+ // result rd:x22(0x4603524f), rs1=>rd:x22(0x461d524f), rs2:x26(0x00720000), imm:0x2
+ TEST_RI_OP(aes32dsi, x22, x26, 0x2, 0x4603524f, 0x461d524f, 0x00720000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox32
+ // result rd:x23(0xdd8a10af), rs1=>rd:x23(0x528a10af), rs2:x25(0x73000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x23, x25, 0x3, 0xdd8a10af, 0x528a10af, 0x73000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox32
+ // result rd:x24(0x000000be), rs1=>rd:x24(0xe19bfbc3), rs2:x24(0x00000074), imm:0x0
+ TEST_RI_OP(aes32dsi, x24, x24, 0x0, 0x000000be, 0xe19bfbc3, 0x00000074, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox32
+ // result rd:x25(0x707acdc0), rs1=>rd:x25(0x707af2c0), rs2:x23(0x00007500), imm:0x1
+ TEST_RI_OP(aes32dsi, x25, x23, 0x1, 0x707acdc0, 0x707af2c0, 0x00007500, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox32
+ // result rd:x26(0xa472105b), rs1=>rd:x26(0xa47d105b), rs2:x22(0x00760000), imm:0x2
+ TEST_RI_OP(aes32dsi, x26, x22, 0x2, 0xa472105b, 0xa47d105b, 0x00760000, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox32
+ // result rd:x27(0x101bcc23), rs1=>rd:x27(0x121bcc23), rs2:x21(0x77000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x27, x21, 0x3, 0x101bcc23, 0x121bcc23, 0x77000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox32
+ // result rd:x28(0xadea5154), rs1=>rd:x28(0xadea5195), rs2:x20(0x00000078), imm:0x0
+ TEST_RI_OP(aes32dsi, x28, x20, 0x0, 0xadea5154, 0xadea5195, 0x00000078, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox32
+ // result rd:x29(0xd2ff11c1), rs1=>rd:x29(0xd2ffbec1), rs2:x19(0x00007900), imm:0x1
+ TEST_RI_OP(aes32dsi, x29, x19, 0x1, 0xd2ff11c1, 0xd2ffbec1, 0x00007900, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox32
+ // result rd:x30(0xa85ca8bb), rs1=>rd:x30(0xa8e1a8bb), rs2:x18(0x007a0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x30, x18, 0x2, 0xa85ca8bb, 0xa8e1a8bb, 0x007a0000, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox32
+ // result rd:x31(0x4bc99fcb), rs1=>rd:x31(0x48c99fcb), rs2:x17(0x7b000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x31, x17, 0x3, 0x4bc99fcb, 0x48c99fcb, 0x7b000000, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox32
+ // result rd:x1(0x461d524e), rs1=>rd:x1(0x461d524f), rs2:x16(0x0000007c), imm:0x0
+ TEST_RI_OP(aes32dsi, x1, x16, 0x0, 0x461d524e, 0x461d524f, 0x0000007c, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox32
+ // result rd:x2(0x528a03af), rs1=>rd:x2(0x528a10af), rs2:x15(0x00007d00), imm:0x1
+ TEST_RI_OP(aes32dsi, x2, x15, 0x1, 0x528a03af, 0x528a10af, 0x00007d00, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox32
+ // result rd:x3(0xe111fbc3), rs1=>rd:x3(0xe19bfbc3), rs2:x14(0x007e0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x3, x14, 0x2, 0xe111fbc3, 0xe19bfbc3, 0x007e0000, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox32
+ // result rd:x4(0x1b7af2c0), rs1=>rd:x4(0x707af2c0), rs2:x13(0x7f000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x4, x13, 0x3, 0x1b7af2c0, 0x707af2c0, 0x7f000000, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox32
+ // result rd:x5(0xa47d1061), rs1=>rd:x5(0xa47d105b), rs2:x12(0x00000080), imm:0x0
+ TEST_RI_OP(aes32dsi, x5, x12, 0x0, 0xa47d1061, 0xa47d105b, 0x00000080, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox32
+ // result rd:x6(0x121b5d23), rs1=>rd:x6(0x121bcc23), rs2:x11(0x00008100), imm:0x1
+ TEST_RI_OP(aes32dsi, x6, x11, 0x1, 0x121b5d23, 0x121bcc23, 0x00008100, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox32
+ // result rd:x7(0xadfb5195), rs1=>rd:x7(0xadea5195), rs2:x10(0x00820000), imm:0x2
+ TEST_RI_OP(aes32dsi, x7, x10, 0x2, 0xadfb5195, 0xadea5195, 0x00820000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox32
+ // result rd:x8(0x93ffbec1), rs1=>rd:x8(0xd2ffbec1), rs2:x9(0x83000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x8, x9, 0x3, 0x93ffbec1, 0xd2ffbec1, 0x83000000, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox32
+ // result rd:x9(0xa8e1a8f4), rs1=>rd:x9(0xa8e1a8bb), rs2:x8(0x00000084), imm:0x0
+ TEST_RI_OP(aes32dsi, x9, x8, 0x0, 0xa8e1a8f4, 0xa8e1a8bb, 0x00000084, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox32
+ // result rd:x10(0x48c9f8cb), rs1=>rd:x10(0x48c99fcb), rs2:x7(0x00008500), imm:0x1
+ TEST_RI_OP(aes32dsi, x10, x7, 0x1, 0x48c9f8cb, 0x48c99fcb, 0x00008500, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox32
+ // result rd:x11(0x46c1524f), rs1=>rd:x11(0x461d524f), rs2:x6(0x00860000), imm:0x2
+ TEST_RI_OP(aes32dsi, x11, x6, 0x2, 0x46c1524f, 0x461d524f, 0x00860000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox32
+ // result rd:x12(0xb88a10af), rs1=>rd:x12(0x528a10af), rs2:x5(0x87000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x12, x5, 0x3, 0xb88a10af, 0x528a10af, 0x87000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox32
+ // result rd:x13(0xe19bfb54), rs1=>rd:x13(0xe19bfbc3), rs2:x4(0x00000088), imm:0x0
+ TEST_RI_OP(aes32dsi, x13, x4, 0x0, 0xe19bfb54, 0xe19bfbc3, 0x00000088, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox32
+ // result rd:x14(0x707a00c0), rs1=>rd:x14(0x707af2c0), rs2:x3(0x00008900), imm:0x1
+ TEST_RI_OP(aes32dsi, x14, x3, 0x1, 0x707a00c0, 0x707af2c0, 0x00008900, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox32
+ // result rd:x15(0xa4b2105b), rs1=>rd:x15(0xa47d105b), rs2:x2(0x008a0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x15, x2, 0x2, 0xa4b2105b, 0xa47d105b, 0x008a0000, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox32
+ // result rd:x16(0xdc1bcc23), rs1=>rd:x16(0x121bcc23), rs2:x1(0x8b000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x16, x1, 0x3, 0xdc1bcc23, 0x121bcc23, 0x8b000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox32
+ // result rd:x17(0xadea5165), rs1=>rd:x17(0xadea5195), rs2:x31(0x0000008c), imm:0x0
+ TEST_RI_OP(aes32dsi, x17, x31, 0x0, 0xadea5165, 0xadea5195, 0x0000008c, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox32
+ // result rd:x18(0xd2ff0ac1), rs1=>rd:x18(0xd2ffbec1), rs2:x30(0x00008d00), imm:0x1
+ TEST_RI_OP(aes32dsi, x18, x30, 0x1, 0xd2ff0ac1, 0xd2ffbec1, 0x00008d00, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox32
+ // result rd:x19(0xa807a8bb), rs1=>rd:x19(0xa8e1a8bb), rs2:x29(0x008e0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x19, x29, 0x2, 0xa807a8bb, 0xa8e1a8bb, 0x008e0000, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox32
+ // result rd:x20(0x3bc99fcb), rs1=>rd:x20(0x48c99fcb), rs2:x28(0x8f000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x20, x28, 0x3, 0x3bc99fcb, 0x48c99fcb, 0x8f000000, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox32
+ // result rd:x21(0x461d52d9), rs1=>rd:x21(0x461d524f), rs2:x27(0x00000090), imm:0x0
+ TEST_RI_OP(aes32dsi, x21, x27, 0x0, 0x461d52d9, 0x461d524f, 0x00000090, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox32
+ // result rd:x22(0x528abcaf), rs1=>rd:x22(0x528a10af), rs2:x26(0x00009100), imm:0x1
+ TEST_RI_OP(aes32dsi, x22, x26, 0x1, 0x528abcaf, 0x528a10af, 0x00009100, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox32
+ // result rd:x23(0xe1effbc3), rs1=>rd:x23(0xe19bfbc3), rs2:x25(0x00920000), imm:0x2
+ TEST_RI_OP(aes32dsi, x23, x25, 0x2, 0xe1effbc3, 0xe19bfbc3, 0x00920000, x1, 4, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox32
+ // result rd:x24(0xb1000000), rs1=>rd:x24(0x707af2c0), rs2:x24(0x93000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x24, x24, 0x3, 0xb1000000, 0x707af2c0, 0x93000000, x1, 8, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox32
+ // result rd:x25(0xa47d10bc), rs1=>rd:x25(0xa47d105b), rs2:x23(0x00000094), imm:0x0
+ TEST_RI_OP(aes32dsi, x25, x23, 0x0, 0xa47d10bc, 0xa47d105b, 0x00000094, x1, 12, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox32
+ // result rd:x26(0x121b6123), rs1=>rd:x26(0x121bcc23), rs2:x22(0x00009500), imm:0x1
+ TEST_RI_OP(aes32dsi, x26, x22, 0x1, 0x121b6123, 0x121bcc23, 0x00009500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox32
+ // result rd:x27(0xaddf5195), rs1=>rd:x27(0xadea5195), rs2:x21(0x00960000), imm:0x2
+ TEST_RI_OP(aes32dsi, x27, x21, 0x2, 0xaddf5195, 0xadea5195, 0x00960000, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox32
+ // result rd:x28(0x57ffbec1), rs1=>rd:x28(0xd2ffbec1), rs2:x20(0x97000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x28, x20, 0x3, 0x57ffbec1, 0xd2ffbec1, 0x97000000, x6, 4, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox32
+ // result rd:x29(0xa8e1a859), rs1=>rd:x29(0xa8e1a8bb), rs2:x19(0x00000098), imm:0x0
+ TEST_RI_OP(aes32dsi, x29, x19, 0x0, 0xa8e1a859, 0xa8e1a8bb, 0x00000098, x6, 8, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox32
+ // result rd:x30(0x48c966cb), rs1=>rd:x30(0x48c99fcb), rs2:x18(0x00009900), imm:0x1
+ TEST_RI_OP(aes32dsi, x30, x18, 0x1, 0x48c966cb, 0x48c99fcb, 0x00009900, x6, 12, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox32
+ // result rd:x31(0x462a524f), rs1=>rd:x31(0x461d524f), rs2:x17(0x009a0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x31, x17, 0x2, 0x462a524f, 0x461d524f, 0x009a0000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox32
+ // result rd:x1(0xba8a10af), rs1=>rd:x1(0x528a10af), rs2:x16(0x9b000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x1, x16, 0x3, 0xba8a10af, 0x528a10af, 0x9b000000, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox32
+ // result rd:x2(0xe19bfbdf), rs1=>rd:x2(0xe19bfbc3), rs2:x15(0x0000009c), imm:0x0
+ TEST_RI_OP(aes32dsi, x2, x15, 0x0, 0xe19bfbdf, 0xe19bfbc3, 0x0000009c, x6, 4, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox32
+ // result rd:x3(0x707a87c0), rs1=>rd:x3(0x707af2c0), rs2:x14(0x00009d00), imm:0x1
+ TEST_RI_OP(aes32dsi, x3, x14, 0x1, 0x707a87c0, 0x707af2c0, 0x00009d00, x6, 8, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox32
+ // result rd:x4(0xa4a2105b), rs1=>rd:x4(0xa47d105b), rs2:x13(0x009e0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x4, x13, 0x2, 0xa4a2105b, 0xa47d105b, 0x009e0000, x6, 12, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox32
+ // result rd:x5(0x7c1bcc23), rs1=>rd:x5(0x121bcc23), rs2:x12(0x9f000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x5, x12, 0x3, 0x7c1bcc23, 0x121bcc23, 0x9f000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox32
+ // result rd:x6(0xadea51d2), rs1=>rd:x6(0xadea5195), rs2:x11(0x000000a0), imm:0x0
+ TEST_RI_OP(aes32dsi, x6, x11, 0x0, 0xadea51d2, 0xadea5195, 0x000000a0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox32
+ // result rd:x7(0xd2ff4fc1), rs1=>rd:x7(0xd2ffbec1), rs2:x10(0x0000a100), imm:0x1
+ TEST_RI_OP(aes32dsi, x7, x10, 0x1, 0xd2ff4fc1, 0xd2ffbec1, 0x0000a100, x1, 4, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox32
+ // result rd:x8(0xa8fba8bb), rs1=>rd:x8(0xa8e1a8bb), rs2:x9(0x00a20000), imm:0x2
+ TEST_RI_OP(aes32dsi, x8, x9, 0x2, 0xa8fba8bb, 0xa8e1a8bb, 0x00a20000, x1, 8, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox32
+ // result rd:x9(0x39c99fcb), rs1=>rd:x9(0x48c99fcb), rs2:x8(0xa3000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x9, x8, 0x3, 0x39c99fcb, 0x48c99fcb, 0xa3000000, x1, 12, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox32
+ // result rd:x10(0x461d5252), rs1=>rd:x10(0x461d524f), rs2:x7(0x000000a4), imm:0x0
+ TEST_RI_OP(aes32dsi, x10, x7, 0x0, 0x461d5252, 0x461d524f, 0x000000a4, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox32
+ // result rd:x11(0x528a39af), rs1=>rd:x11(0x528a10af), rs2:x6(0x0000a500), imm:0x1
+ TEST_RI_OP(aes32dsi, x11, x6, 0x1, 0x528a39af, 0x528a10af, 0x0000a500, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox32
+ // result rd:x12(0xe15efbc3), rs1=>rd:x12(0xe19bfbc3), rs2:x5(0x00a60000), imm:0x2
+ TEST_RI_OP(aes32dsi, x12, x5, 0x2, 0xe15efbc3, 0xe19bfbc3, 0x00a60000, x1, 4, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox32
+ // result rd:x13(0xf97af2c0), rs1=>rd:x13(0x707af2c0), rs2:x4(0xa7000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x13, x4, 0x3, 0xf97af2c0, 0x707af2c0, 0xa7000000, x1, 8, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox32
+ // result rd:x14(0xa47d1034), rs1=>rd:x14(0xa47d105b), rs2:x3(0x000000a8), imm:0x0
+ TEST_RI_OP(aes32dsi, x14, x3, 0x0, 0xa47d1034, 0xa47d105b, 0x000000a8, x1, 12, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox32
+ // result rd:x15(0x121b7b23), rs1=>rd:x15(0x121bcc23), rs2:x2(0x0000a900), imm:0x1
+ TEST_RI_OP(aes32dsi, x15, x2, 0x1, 0x121b7b23, 0x121bcc23, 0x0000a900, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox32
+ // result rd:x16(0xad885195), rs1=>rd:x16(0xadea5195), rs2:x1(0x00aa0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x16, x1, 0x2, 0xad885195, 0xadea5195, 0x00aa0000, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox32
+ // result rd:x17(0xdcffbec1), rs1=>rd:x17(0xd2ffbec1), rs2:x31(0xab000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x17, x31, 0x3, 0xdcffbec1, 0xd2ffbec1, 0xab000000, x2, 4, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox32
+ // result rd:x18(0xa8e1a811), rs1=>rd:x18(0xa8e1a8bb), rs2:x30(0x000000ac), imm:0x0
+ TEST_RI_OP(aes32dsi, x18, x30, 0x0, 0xa8e1a811, 0xa8e1a8bb, 0x000000ac, x2, 8, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox32
+ // result rd:x19(0x48c987cb), rs1=>rd:x19(0x48c99fcb), rs2:x29(0x0000ad00), imm:0x1
+ TEST_RI_OP(aes32dsi, x19, x29, 0x1, 0x48c987cb, 0x48c99fcb, 0x0000ad00, x2, 12, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox32
+ // result rd:x20(0x46a3524f), rs1=>rd:x20(0x461d524f), rs2:x28(0x00ae0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x20, x28, 0x2, 0x46a3524f, 0x461d524f, 0x00ae0000, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox32
+ // result rd:x21(0x498a10af), rs1=>rd:x21(0x528a10af), rs2:x27(0xaf000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x21, x27, 0x3, 0x498a10af, 0x528a10af, 0xaf000000, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox32
+ // result rd:x22(0xe19bfb3f), rs1=>rd:x22(0xe19bfbc3), rs2:x26(0x000000b0), imm:0x0
+ TEST_RI_OP(aes32dsi, x22, x26, 0x0, 0xe19bfb3f, 0xe19bfbc3, 0x000000b0, x1, 4, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox32
+ // result rd:x23(0x707aa4c0), rs1=>rd:x23(0x707af2c0), rs2:x25(0x0000b100), imm:0x1
+ TEST_RI_OP(aes32dsi, x23, x25, 0x1, 0x707aa4c0, 0x707af2c0, 0x0000b100, x1, 8, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox32
+ // result rd:x24(0x008c0000), rs1=>rd:x24(0xa47d105b), rs2:x24(0x00b20000), imm:0x2
+ TEST_RI_OP(aes32dsi, x24, x24, 0x2, 0x008c0000, 0xa47d105b, 0x00b20000, x1, 12, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox32
+ // result rd:x25(0x591bcc23), rs1=>rd:x25(0x121bcc23), rs2:x23(0xb3000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x25, x23, 0x3, 0x591bcc23, 0x121bcc23, 0xb3000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox32
+ // result rd:x26(0xadea5153), rs1=>rd:x26(0xadea5195), rs2:x22(0x000000b4), imm:0x0
+ TEST_RI_OP(aes32dsi, x26, x22, 0x0, 0xadea5153, 0xadea5195, 0x000000b4, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox32
+ // result rd:x27(0xd2ff6cc1), rs1=>rd:x27(0xd2ffbec1), rs2:x21(0x0000b500), imm:0x1
+ TEST_RI_OP(aes32dsi, x27, x21, 0x1, 0xd2ff6cc1, 0xd2ffbec1, 0x0000b500, x1, 4, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox32
+ // result rd:x28(0xa898a8bb), rs1=>rd:x28(0xa8e1a8bb), rs2:x20(0x00b60000), imm:0x2
+ TEST_RI_OP(aes32dsi, x28, x20, 0x2, 0xa898a8bb, 0xa8e1a8bb, 0x00b60000, x1, 8, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox32
+ // result rd:x29(0x68c99fcb), rs1=>rd:x29(0x48c99fcb), rs2:x19(0xb7000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x29, x19, 0x3, 0x68c99fcb, 0x48c99fcb, 0xb7000000, x1, 12, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox32
+ // result rd:x30(0x461d52d5), rs1=>rd:x30(0x461d524f), rs2:x18(0x000000b8), imm:0x0
+ TEST_RI_OP(aes32dsi, x30, x18, 0x0, 0x461d52d5, 0x461d524f, 0x000000b8, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox32
+ // result rd:x31(0x528acbaf), rs1=>rd:x31(0x528a10af), rs2:x17(0x0000b900), imm:0x1
+ TEST_RI_OP(aes32dsi, x31, x17, 0x1, 0x528acbaf, 0x528a10af, 0x0000b900, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox32
+ // result rd:x1(0xe15bfbc3), rs1=>rd:x1(0xe19bfbc3), rs2:x16(0x00ba0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x1, x16, 0x2, 0xe15bfbc3, 0xe19bfbc3, 0x00ba0000, x5, 4, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox32
+ // result rd:x2(0x8e7af2c0), rs1=>rd:x2(0x707af2c0), rs2:x15(0xbb000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x2, x15, 0x3, 0x8e7af2c0, 0x707af2c0, 0xbb000000, x5, 8, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox32
+ // result rd:x3(0xa47d1023), rs1=>rd:x3(0xa47d105b), rs2:x14(0x000000bc), imm:0x0
+ TEST_RI_OP(aes32dsi, x3, x14, 0x0, 0xa47d1023, 0xa47d105b, 0x000000bc, x5, 12, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox32
+ // result rd:x4(0x121b0123), rs1=>rd:x4(0x121bcc23), rs2:x13(0x0000bd00), imm:0x1
+ TEST_RI_OP(aes32dsi, x4, x13, 0x1, 0x121b0123, 0x121bcc23, 0x0000bd00, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox32
+ // result rd:x5(0xadb05195), rs1=>rd:x5(0xadea5195), rs2:x12(0x00be0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x5, x12, 0x2, 0xadb05195, 0xadea5195, 0x00be0000, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox32
+ // result rd:x6(0x26ffbec1), rs1=>rd:x6(0xd2ffbec1), rs2:x11(0xbf000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x6, x11, 0x3, 0x26ffbec1, 0xd2ffbec1, 0xbf000000, x1, 4, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox32
+ // result rd:x7(0xa8e1a8a4), rs1=>rd:x7(0xa8e1a8bb), rs2:x10(0x000000c0), imm:0x0
+ TEST_RI_OP(aes32dsi, x7, x10, 0x0, 0xa8e1a8a4, 0xa8e1a8bb, 0x000000c0, x1, 8, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox32
+ // result rd:x8(0x48c942cb), rs1=>rd:x8(0x48c99fcb), rs2:x9(0x0000c100), imm:0x1
+ TEST_RI_OP(aes32dsi, x8, x9, 0x1, 0x48c942cb, 0x48c99fcb, 0x0000c100, x1, 12, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox32
+ // result rd:x9(0x46b5524f), rs1=>rd:x9(0x461d524f), rs2:x8(0x00c20000), imm:0x2
+ TEST_RI_OP(aes32dsi, x9, x8, 0x2, 0x46b5524f, 0x461d524f, 0x00c20000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox32
+ // result rd:x10(0x618a10af), rs1=>rd:x10(0x528a10af), rs2:x7(0xc3000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x10, x7, 0x3, 0x618a10af, 0x528a10af, 0xc3000000, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox32
+ // result rd:x11(0xe19bfb4b), rs1=>rd:x11(0xe19bfbc3), rs2:x6(0x000000c4), imm:0x0
+ TEST_RI_OP(aes32dsi, x11, x6, 0x0, 0xe19bfb4b, 0xe19bfbc3, 0x000000c4, x1, 4, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox32
+ // result rd:x12(0x707af5c0), rs1=>rd:x12(0x707af2c0), rs2:x5(0x0000c500), imm:0x1
+ TEST_RI_OP(aes32dsi, x12, x5, 0x1, 0x707af5c0, 0x707af2c0, 0x0000c500, x1, 8, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox32
+ // result rd:x13(0xa4ba105b), rs1=>rd:x13(0xa47d105b), rs2:x4(0x00c60000), imm:0x2
+ TEST_RI_OP(aes32dsi, x13, x4, 0x2, 0xa4ba105b, 0xa47d105b, 0x00c60000, x1, 12, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox32
+ // result rd:x14(0x231bcc23), rs1=>rd:x14(0x121bcc23), rs2:x3(0xc7000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x14, x3, 0x3, 0x231bcc23, 0x121bcc23, 0xc7000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox32
+ // result rd:x15(0xadea5124), rs1=>rd:x15(0xadea5195), rs2:x2(0x000000c8), imm:0x0
+ TEST_RI_OP(aes32dsi, x15, x2, 0x0, 0xadea5124, 0xadea5195, 0x000000c8, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox32
+ // result rd:x16(0xd2ffacc1), rs1=>rd:x16(0xd2ffbec1), rs2:x1(0x0000c900), imm:0x1
+ TEST_RI_OP(aes32dsi, x16, x1, 0x1, 0xd2ffacc1, 0xd2ffbec1, 0x0000c900, x3, 4, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox32
+ // result rd:x17(0xa8f1a8bb), rs1=>rd:x17(0xa8e1a8bb), rs2:x31(0x00ca0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x17, x31, 0x2, 0xa8f1a8bb, 0xa8e1a8bb, 0x00ca0000, x3, 8, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox32
+ // result rd:x18(0x11c99fcb), rs1=>rd:x18(0x48c99fcb), rs2:x30(0xcb000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x18, x30, 0x3, 0x11c99fcb, 0x48c99fcb, 0xcb000000, x3, 12, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox32
+ // result rd:x19(0x461d5268), rs1=>rd:x19(0x461d524f), rs2:x29(0x000000cc), imm:0x0
+ TEST_RI_OP(aes32dsi, x19, x29, 0x0, 0x461d5268, 0x461d524f, 0x000000cc, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox32
+ // result rd:x20(0x528a90af), rs1=>rd:x20(0x528a10af), rs2:x28(0x0000cd00), imm:0x1
+ TEST_RI_OP(aes32dsi, x20, x28, 0x1, 0x528a90af, 0x528a10af, 0x0000cd00, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox32
+ // result rd:x21(0xe177fbc3), rs1=>rd:x21(0xe19bfbc3), rs2:x27(0x00ce0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x21, x27, 0x2, 0xe177fbc3, 0xe19bfbc3, 0x00ce0000, x1, 4, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox32
+ // result rd:x22(0x2f7af2c0), rs1=>rd:x22(0x707af2c0), rs2:x26(0xcf000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x22, x26, 0x3, 0x2f7af2c0, 0x707af2c0, 0xcf000000, x1, 8, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox32
+ // result rd:x23(0xa47d103b), rs1=>rd:x23(0xa47d105b), rs2:x25(0x000000d0), imm:0x0
+ TEST_RI_OP(aes32dsi, x23, x25, 0x0, 0xa47d103b, 0xa47d105b, 0x000000d0, x1, 12, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox32
+ // result rd:x24(0x00008000), rs1=>rd:x24(0x121bcc23), rs2:x24(0x0000d100), imm:0x1
+ TEST_RI_OP(aes32dsi, x24, x24, 0x1, 0x00008000, 0x121bcc23, 0x0000d100, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox32
+ // result rd:x25(0xad955195), rs1=>rd:x25(0xadea5195), rs2:x23(0x00d20000), imm:0x2
+ TEST_RI_OP(aes32dsi, x25, x23, 0x2, 0xad955195, 0xadea5195, 0x00d20000, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox32
+ // result rd:x26(0x7bffbec1), rs1=>rd:x26(0xd2ffbec1), rs2:x22(0xd3000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x26, x22, 0x3, 0x7bffbec1, 0xd2ffbec1, 0xd3000000, x1, 4, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox32
+ // result rd:x27(0xa8e1a8a2), rs1=>rd:x27(0xa8e1a8bb), rs2:x21(0x000000d4), imm:0x0
+ TEST_RI_OP(aes32dsi, x27, x21, 0x0, 0xa8e1a8a2, 0xa8e1a8bb, 0x000000d4, x1, 8, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox32
+ // result rd:x28(0x48c92acb), rs1=>rd:x28(0x48c99fcb), rs2:x20(0x0000d500), imm:0x1
+ TEST_RI_OP(aes32dsi, x28, x20, 0x1, 0x48c92acb, 0x48c99fcb, 0x0000d500, x1, 12, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox32
+ // result rd:x29(0x4657524f), rs1=>rd:x29(0x461d524f), rs2:x19(0x00d60000), imm:0x2
+ TEST_RI_OP(aes32dsi, x29, x19, 0x2, 0x4657524f, 0x461d524f, 0x00d60000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox32
+ // result rd:x30(0x5f8a10af), rs1=>rd:x30(0x528a10af), rs2:x18(0xd7000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x30, x18, 0x3, 0x5f8a10af, 0x528a10af, 0xd7000000, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox32
+ // result rd:x31(0xe19bfbee), rs1=>rd:x31(0xe19bfbc3), rs2:x17(0x000000d8), imm:0x0
+ TEST_RI_OP(aes32dsi, x31, x17, 0x0, 0xe19bfbee, 0xe19bfbc3, 0x000000d8, x4, 4, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox32
+ // result rd:x1(0x707a17c0), rs1=>rd:x1(0x707af2c0), rs2:x16(0x0000d900), imm:0x1
+ TEST_RI_OP(aes32dsi, x1, x16, 0x1, 0x707a17c0, 0x707af2c0, 0x0000d900, x4, 8, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox32
+ // result rd:x2(0xa407105b), rs1=>rd:x2(0xa47d105b), rs2:x15(0x00da0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x2, x15, 0x2, 0xa407105b, 0xa47d105b, 0x00da0000, x4, 12, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox32
+ // result rd:x3(0x8d1bcc23), rs1=>rd:x3(0x121bcc23), rs2:x14(0xdb000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x3, x14, 0x3, 0x8d1bcc23, 0x121bcc23, 0xdb000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox32
+ // result rd:x4(0xadea5106), rs1=>rd:x4(0xadea5195), rs2:x13(0x000000dc), imm:0x0
+ TEST_RI_OP(aes32dsi, x4, x13, 0x0, 0xadea5106, 0xadea5195, 0x000000dc, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox32
+ // result rd:x5(0xd2ff77c1), rs1=>rd:x5(0xd2ffbec1), rs2:x12(0x0000dd00), imm:0x1
+ TEST_RI_OP(aes32dsi, x5, x12, 0x1, 0xd2ff77c1, 0xd2ffbec1, 0x0000dd00, x1, 4, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox32
+ // result rd:x6(0xa87da8bb), rs1=>rd:x6(0xa8e1a8bb), rs2:x11(0x00de0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x6, x11, 0x2, 0xa87da8bb, 0xa8e1a8bb, 0x00de0000, x1, 8, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox32
+ // result rd:x7(0xa7c99fcb), rs1=>rd:x7(0x48c99fcb), rs2:x10(0xdf000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x7, x10, 0x3, 0xa7c99fcb, 0x48c99fcb, 0xdf000000, x1, 12, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox32
+ // result rd:x8(0x461d52ef), rs1=>rd:x8(0x461d524f), rs2:x9(0x000000e0), imm:0x0
+ TEST_RI_OP(aes32dsi, x8, x9, 0x0, 0x461d52ef, 0x461d524f, 0x000000e0, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox32
+ // result rd:x9(0x528af0af), rs1=>rd:x9(0x528a10af), rs2:x8(0x0000e100), imm:0x1
+ TEST_RI_OP(aes32dsi, x9, x8, 0x1, 0x528af0af, 0x528a10af, 0x0000e100, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox32
+ // result rd:x10(0xe1a0fbc3), rs1=>rd:x10(0xe19bfbc3), rs2:x7(0x00e20000), imm:0x2
+ TEST_RI_OP(aes32dsi, x10, x7, 0x2, 0xe1a0fbc3, 0xe19bfbc3, 0x00e20000, x1, 4, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox32
+ // result rd:x11(0x3d7af2c0), rs1=>rd:x11(0x707af2c0), rs2:x6(0xe3000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x11, x6, 0x3, 0x3d7af2c0, 0x707af2c0, 0xe3000000, x1, 8, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox32
+ // result rd:x12(0xa47d10f5), rs1=>rd:x12(0xa47d105b), rs2:x5(0x000000e4), imm:0x0
+ TEST_RI_OP(aes32dsi, x12, x5, 0x0, 0xa47d10f5, 0xa47d105b, 0x000000e4, x1, 12, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox32
+ // result rd:x13(0x121be623), rs1=>rd:x13(0x121bcc23), rs2:x4(0x0000e500), imm:0x1
+ TEST_RI_OP(aes32dsi, x13, x4, 0x1, 0x121be623, 0x121bcc23, 0x0000e500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox32
+ // result rd:x14(0xad1f5195), rs1=>rd:x14(0xadea5195), rs2:x3(0x00e60000), imm:0x2
+ TEST_RI_OP(aes32dsi, x14, x3, 0x2, 0xad1f5195, 0xadea5195, 0x00e60000, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox32
+ // result rd:x15(0x62ffbec1), rs1=>rd:x15(0xd2ffbec1), rs2:x2(0xe7000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x15, x2, 0x3, 0x62ffbec1, 0xd2ffbec1, 0xe7000000, x4, 4, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox32
+ // result rd:x16(0xa8e1a873), rs1=>rd:x16(0xa8e1a8bb), rs2:x1(0x000000e8), imm:0x0
+ TEST_RI_OP(aes32dsi, x16, x1, 0x0, 0xa8e1a873, 0xa8e1a8bb, 0x000000e8, x4, 8, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox32
+ // result rd:x17(0x48c974cb), rs1=>rd:x17(0x48c99fcb), rs2:x31(0x0000e900), imm:0x1
+ TEST_RI_OP(aes32dsi, x17, x31, 0x1, 0x48c974cb, 0x48c99fcb, 0x0000e900, x4, 12, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox32
+ // result rd:x18(0x46a6524f), rs1=>rd:x18(0x461d524f), rs2:x30(0x00ea0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x18, x30, 0x2, 0x46a6524f, 0x461d524f, 0x00ea0000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox32
+ // result rd:x19(0x6e8a10af), rs1=>rd:x19(0x528a10af), rs2:x29(0xeb000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x19, x29, 0x3, 0x6e8a10af, 0x528a10af, 0xeb000000, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox32
+ // result rd:x20(0xe19bfb40), rs1=>rd:x20(0xe19bfbc3), rs2:x28(0x000000ec), imm:0x0
+ TEST_RI_OP(aes32dsi, x20, x28, 0x0, 0xe19bfb40, 0xe19bfbc3, 0x000000ec, x1, 4, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox32
+ // result rd:x21(0x707aa1c0), rs1=>rd:x21(0x707af2c0), rs2:x27(0x0000ed00), imm:0x1
+ TEST_RI_OP(aes32dsi, x21, x27, 0x1, 0x707aa1c0, 0x707af2c0, 0x0000ed00, x1, 8, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox32
+ // result rd:x22(0xa4e4105b), rs1=>rd:x22(0xa47d105b), rs2:x26(0x00ee0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x22, x26, 0x2, 0xa4e4105b, 0xa47d105b, 0x00ee0000, x1, 12, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox32
+ // result rd:x23(0x731bcc23), rs1=>rd:x23(0x121bcc23), rs2:x25(0xef000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x23, x25, 0x3, 0x731bcc23, 0x121bcc23, 0xef000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox32
+ // result rd:x24(0x000000e7), rs1=>rd:x24(0xadea5195), rs2:x24(0x000000f0), imm:0x0
+ TEST_RI_OP(aes32dsi, x24, x24, 0x0, 0x000000e7, 0xadea5195, 0x000000f0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox32
+ // result rd:x25(0xd2ff95c1), rs1=>rd:x25(0xd2ffbec1), rs2:x23(0x0000f100), imm:0x1
+ TEST_RI_OP(aes32dsi, x25, x23, 0x1, 0xd2ff95c1, 0xd2ffbec1, 0x0000f100, x1, 4, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox32
+ // result rd:x26(0xa8e5a8bb), rs1=>rd:x26(0xa8e1a8bb), rs2:x22(0x00f20000), imm:0x2
+ TEST_RI_OP(aes32dsi, x26, x22, 0x2, 0xa8e5a8bb, 0xa8e1a8bb, 0x00f20000, x1, 8, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox32
+ // result rd:x27(0x36c99fcb), rs1=>rd:x27(0x48c99fcb), rs2:x21(0xf3000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x27, x21, 0x3, 0x36c99fcb, 0x48c99fcb, 0xf3000000, x1, 12, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox32
+ // result rd:x28(0x461d52f5), rs1=>rd:x28(0x461d524f), rs2:x20(0x000000f4), imm:0x0
+ TEST_RI_OP(aes32dsi, x28, x20, 0x0, 0x461d52f5, 0x461d524f, 0x000000f4, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox32
+ // result rd:x29(0x528a67af), rs1=>rd:x29(0x528a10af), rs2:x19(0x0000f500), imm:0x1
+ TEST_RI_OP(aes32dsi, x29, x19, 0x1, 0x528a67af, 0x528a10af, 0x0000f500, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox32
+ // result rd:x30(0xe14dfbc3), rs1=>rd:x30(0xe19bfbc3), rs2:x18(0x00f60000), imm:0x2
+ TEST_RI_OP(aes32dsi, x30, x18, 0x2, 0xe14dfbc3, 0xe19bfbc3, 0x00f60000, x4, 4, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox32
+ // result rd:x31(0x567af2c0), rs1=>rd:x31(0x707af2c0), rs2:x17(0xf7000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x31, x17, 0x3, 0x567af2c0, 0x707af2c0, 0xf7000000, x4, 8, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox32
+ // result rd:x1(0xa47d10ba), rs1=>rd:x1(0xa47d105b), rs2:x16(0x000000f8), imm:0x0
+ TEST_RI_OP(aes32dsi, x1, x16, 0x0, 0xa47d10ba, 0xa47d105b, 0x000000f8, x4, 12, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox32
+ // result rd:x2(0x121ba523), rs1=>rd:x2(0x121bcc23), rs2:x15(0x0000f900), imm:0x1
+ TEST_RI_OP(aes32dsi, x2, x15, 0x1, 0x121ba523, 0x121bcc23, 0x0000f900, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox32
+ // result rd:x3(0xadfe5195), rs1=>rd:x3(0xadea5195), rs2:x14(0x00fa0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x3, x14, 0x2, 0xadfe5195, 0xadea5195, 0x00fa0000, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox32
+ // result rd:x4(0xb1ffbec1), rs1=>rd:x4(0xd2ffbec1), rs2:x13(0xfb000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x4, x13, 0x3, 0xb1ffbec1, 0xd2ffbec1, 0xfb000000, x1, 4, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox32
+ // result rd:x5(0xa8e1a8ee), rs1=>rd:x5(0xa8e1a8bb), rs2:x12(0x000000fc), imm:0x0
+ TEST_RI_OP(aes32dsi, x5, x12, 0x0, 0xa8e1a8ee, 0xa8e1a8bb, 0x000000fc, x1, 8, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox32
+ // result rd:x6(0x48c9becb), rs1=>rd:x6(0x48c99fcb), rs2:x11(0x0000fd00), imm:0x1
+ TEST_RI_OP(aes32dsi, x6, x11, 0x1, 0x48c9becb, 0x48c99fcb, 0x0000fd00, x1, 12, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox32
+ // result rd:x7(0x4611524f), rs1=>rd:x7(0x461d524f), rs2:x10(0x00fe0000), imm:0x2
+ TEST_RI_OP(aes32dsi, x7, x10, 0x2, 0x4611524f, 0x461d524f, 0x00fe0000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox32
+ // result rd:x8(0x2f8a10af), rs1=>rd:x8(0x528a10af), rs2:x9(0xff000000), imm:0x3
+ TEST_RI_OP(aes32dsi, x8, x9, 0x3, 0x2f8a10af, 0x528a10af, 0xff000000, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+signature_31_0:
+ .fill 5, 4, 0xdeadbeef
+signature_32_0:
+ .fill 5, 4, 0xdeadbeef
+signature_33_0:
+ .fill 5, 4, 0xdeadbeef
+signature_34_0:
+ .fill 5, 4, 0xdeadbeef
+signature_35_0:
+ .fill 5, 4, 0xdeadbeef
+signature_36_0:
+ .fill 5, 4, 0xdeadbeef
+signature_37_0:
+ .fill 5, 4, 0xdeadbeef
+signature_38_0:
+ .fill 5, 4, 0xdeadbeef
+signature_39_0:
+ .fill 5, 4, 0xdeadbeef
+signature_40_0:
+ .fill 5, 4, 0xdeadbeef
+signature_41_0:
+ .fill 5, 4, 0xdeadbeef
+signature_42_0:
+ .fill 5, 4, 0xdeadbeef
+signature_43_0:
+ .fill 5, 4, 0xdeadbeef
+signature_44_0:
+ .fill 5, 4, 0xdeadbeef
+signature_45_0:
+ .fill 5, 4, 0xdeadbeef
+signature_46_0:
+ .fill 5, 4, 0xdeadbeef
+signature_47_0:
+ .fill 5, 4, 0xdeadbeef
+signature_48_0:
+ .fill 5, 4, 0xdeadbeef
+signature_49_0:
+ .fill 5, 4, 0xdeadbeef
+signature_50_0:
+ .fill 5, 4, 0xdeadbeef
+signature_51_0:
+ .fill 5, 4, 0xdeadbeef
+signature_52_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/AES32DSMI-01.S b/riscof/suite/rv32i_m/K_unratified/AES32DSMI-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..d41bfb2f9b4ccaf3154b489bc0941a612bd47356
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/AES32DSMI-01.S
@@ -0,0 +1,1053 @@
+// RISC-V Architectural Validation Test AES32DSMI-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes32dsmi'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes32dsmi)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes32dsmi)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xe8725f7f), rs1=>rd:x1(0xadea5195), rs2:x16(0x121bcc23), imm:0x3
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x3, 0xe8725f7f, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x74303f34), rs1=>rd:x2(0xd2ffbec1), rs2:x15(0xa47d105b), imm:0x3
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x3, 0x74303f34, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x717a4f01), rs1=>rd:x3(0xa8e1a8bb), rs2:x14(0x707af2c0), imm:0x0
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x0, 0x717a4f01, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x7fb3936a), rs1=>rd:x4(0x48c99fcb), rs2:x13(0xe19bfbc3), imm:0x3
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x3, 0x7fb3936a, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x9bb35771), rs1=>rd:x5(0x461d524f), rs2:x12(0x528a10af), imm:0x3
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x3, 0x9bb35771, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x8395729b), rs1=>rd:x6(0x528a10af), rs2:x11(0x461d524f), imm:0x3
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x3, 0x8395729b, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xd506a8ed), rs1=>rd:x7(0xe19bfbc3), rs2:x10(0x48c99fcb), imm:0x3
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x3, 0xd506a8ed, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x5c9e6ffa), rs1=>rd:x8(0x707af2c0), rs2:x9(0xa8e1a8bb), imm:0x3
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x3, 0x5c9e6ffa, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x6bc13153), rs1=>rd:x9(0xa47d105b), rs2:x8(0xd2ffbec1), imm:0x1
+ TEST_RI_OP(aes32dsmi, x9, x8, 0x1, 0x6bc13153, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x14c65a1e), rs1=>rd:x10(0x121bcc23), rs2:x7(0xadea5195), imm:0x1
+ TEST_RI_OP(aes32dsmi, x10, x7, 0x1, 0x14c65a1e, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0xd04257b9), rs1=>rd:x11(0x00000001), rs2:x6(0xffffffff), imm:0x3
+ TEST_RI_OP(aes32dsmi, x11, x6, 0x3, 0xd04257b9, 0x00000001, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x57b8d040), rs1=>rd:x12(0x00000002), rs2:x5(0x7fffffff), imm:0x1
+ TEST_RI_OP(aes32dsmi, x12, x5, 0x1, 0x57b8d040, 0x00000002, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0xb8d04253), rs1=>rd:x13(0x00000004), rs2:x4(0xbfffffff), imm:0x2
+ TEST_RI_OP(aes32dsmi, x13, x4, 0x2, 0xb8d04253, 0x00000004, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x4257b8d8), rs1=>rd:x14(0x00000008), rs2:x3(0xdfffffff), imm:0x0
+ TEST_RI_OP(aes32dsmi, x14, x3, 0x0, 0x4257b8d8, 0x00000008, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0xb8d04247), rs1=>rd:x15(0x00000010), rs2:x2(0xefffffff), imm:0x2
+ TEST_RI_OP(aes32dsmi, x15, x2, 0x2, 0xb8d04247, 0x00000010, 0xefffffff, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x57b8d062), rs1=>rd:x16(0x00000020), rs2:x1(0xf7ffffff), imm:0x1
+ TEST_RI_OP(aes32dsmi, x16, x1, 0x1, 0x57b8d062, 0x00000020, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x6490c116), rs1=>rd:x17(0x00000040), rs2:x31(0xfbffffff), imm:0x3
+ TEST_RI_OP(aes32dsmi, x17, x31, 0x3, 0x6490c116, 0x00000040, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xd570b6b2), rs1=>rd:x18(0x00000080), rs2:x30(0xfdffffff), imm:0x3
+ TEST_RI_OP(aes32dsmi, x18, x30, 0x3, 0xd570b6b2, 0x00000080, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x4257b9d0), rs1=>rd:x19(0x00000100), rs2:x29(0xfeffffff), imm:0x0
+ TEST_RI_OP(aes32dsmi, x19, x29, 0x0, 0x4257b9d0, 0x00000100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0xd04255b8), rs1=>rd:x20(0x00000200), rs2:x28(0xff7fffff), imm:0x3
+ TEST_RI_OP(aes32dsmi, x20, x28, 0x3, 0xd04255b8, 0x00000200, 0xff7fffff, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0xd04253b8), rs1=>rd:x21(0x00000400), rs2:x27(0xffbfffff), imm:0x3
+ TEST_RI_OP(aes32dsmi, x21, x27, 0x3, 0xd04253b8, 0x00000400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0xd0425fb8), rs1=>rd:x22(0x00000800), rs2:x26(0xffdfffff), imm:0x3
+ TEST_RI_OP(aes32dsmi, x22, x26, 0x3, 0xd0425fb8, 0x00000800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0xd04247b8), rs1=>rd:x23(0x00001000), rs2:x25(0xffefffff), imm:0x3
+ TEST_RI_OP(aes32dsmi, x23, x25, 0x3, 0xd04247b8, 0x00001000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x2fb5a847), rs1=>rd:x24(0x00002000), rs2:x24(0xfff7ffff), imm:0x3
+ TEST_RI_OP(aes32dsmi, x24, x24, 0x3, 0x2fb5a847, 0x00002000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x57b89042), rs1=>rd:x25(0x00004000), rs2:x23(0xfffbffff), imm:0x1
+ TEST_RI_OP(aes32dsmi, x25, x23, 0x1, 0x57b89042, 0x00004000, 0xfffbffff, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x57b85042), rs1=>rd:x26(0x00008000), rs2:x22(0xfffdffff), imm:0x1
+ TEST_RI_OP(aes32dsmi, x26, x22, 0x1, 0x57b85042, 0x00008000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0xd04357b8), rs1=>rd:x27(0x00010000), rs2:x21(0xfffeffff), imm:0x3
+ TEST_RI_OP(aes32dsmi, x27, x21, 0x3, 0xd04357b8, 0x00010000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0xa91c14c8), rs1=>rd:x28(0x00020000), rs2:x20(0xffff7fff), imm:0x1
+ TEST_RI_OP(aes32dsmi, x28, x20, 0x1, 0xa91c14c8, 0x00020000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0xb8d44257), rs1=>rd:x29(0x00040000), rs2:x19(0xffffbfff), imm:0x2
+ TEST_RI_OP(aes32dsmi, x29, x19, 0x2, 0xb8d44257, 0x00040000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x425fb8d0), rs1=>rd:x30(0x00080000), rs2:x18(0xffffdfff), imm:0x0
+ TEST_RI_OP(aes32dsmi, x30, x18, 0x0, 0x425fb8d0, 0x00080000, 0xffffdfff, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0xb8c04257), rs1=>rd:x31(0x00100000), rs2:x17(0xffffefff), imm:0x2
+ TEST_RI_OP(aes32dsmi, x31, x17, 0x2, 0xb8c04257, 0x00100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x952dff41), rs1=>rd:x1(0x00200000), rs2:x16(0xfffff7ff), imm:0x1
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x1, 0x952dff41, 0x00200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0xd00257b8), rs1=>rd:x2(0x00400000), rs2:x15(0xfffffbff), imm:0x3
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x3, 0xd00257b8, 0x00400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0xd0c257b8), rs1=>rd:x3(0x00800000), rs2:x14(0xfffffdff), imm:0x3
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x3, 0xd0c257b8, 0x00800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x4357b8d0), rs1=>rd:x4(0x01000000), rs2:x13(0xfffffeff), imm:0x0
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x0, 0x4357b8d0, 0x01000000, 0xfffffeff, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0xd24257b8), rs1=>rd:x5(0x02000000), rs2:x12(0xffffff7f), imm:0x3
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x3, 0xd24257b8, 0x02000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0xd44257b8), rs1=>rd:x6(0x04000000), rs2:x11(0xffffffbf), imm:0x3
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x3, 0xd44257b8, 0x04000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xd84257b8), rs1=>rd:x7(0x08000000), rs2:x10(0xffffffdf), imm:0x3
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x3, 0xd84257b8, 0x08000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0xc04257b8), rs1=>rd:x8(0x10000000), rs2:x9(0xffffffef), imm:0x3
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x3, 0xc04257b8, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0xf04257b8), rs1=>rd:x9(0x20000000), rs2:x8(0xfffffff7), imm:0x3
+ TEST_RI_OP(aes32dsmi, x9, x8, 0x3, 0xf04257b8, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x17b8d042), rs1=>rd:x10(0x40000000), rs2:x7(0xfffffffb), imm:0x1
+ TEST_RI_OP(aes32dsmi, x10, x7, 0x1, 0x17b8d042, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0xd7b8d042), rs1=>rd:x11(0x80000000), rs2:x6(0xfffffffd), imm:0x1
+ TEST_RI_OP(aes32dsmi, x11, x6, 0x1, 0xd7b8d042, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0xd04257b8), rs1=>rd:x12(0x00000000), rs2:x5(0xfffffffe), imm:0x3
+ TEST_RI_OP(aes32dsmi, x12, x5, 0x3, 0xd04257b8, 0x00000000, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x580baeae), rs1=>rd:x13(0xfffffffe), rs2:x4(0x00000000), imm:0x1
+ TEST_RI_OP(aes32dsmi, x13, x4, 0x1, 0x580baeae, 0xfffffffe, 0x00000000, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0baeaf5a), rs1=>rd:x14(0xfffffffd), rs2:x3(0x80000000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x14, x3, 0x2, 0x0baeaf5a, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xaf580baa), rs1=>rd:x15(0xfffffffb), rs2:x2(0x40000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x15, x2, 0x0, 0xaf580baa, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0baeaf50), rs1=>rd:x16(0xfffffff7), rs2:x1(0x20000000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x16, x1, 0x2, 0x0baeaf50, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x580baebf), rs1=>rd:x17(0xffffffef), rs2:x31(0x10000000), imm:0x1
+ TEST_RI_OP(aes32dsmi, x17, x31, 0x1, 0x580baebf, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xdfaa05ef), rs1=>rd:x18(0xffffffdf), rs2:x30(0x08000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x18, x30, 0x3, 0xdfaa05ef, 0xffffffdf, 0x08000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xc4349414), rs1=>rd:x19(0xffffffbf), rs2:x29(0x04000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x19, x29, 0x3, 0xc4349414, 0xffffffbf, 0x04000000, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xaf580b2e), rs1=>rd:x20(0xffffff7f), rs2:x28(0x02000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x20, x28, 0x0, 0xaf580b2e, 0xffffff7f, 0x02000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x81ac9bbe), rs1=>rd:x21(0xfffffeff), rs2:x27(0x01000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x21, x27, 0x3, 0x81ac9bbe, 0xfffffeff, 0x01000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xaeaf5a0b), rs1=>rd:x22(0xfffffdff), rs2:x26(0x00800000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x22, x26, 0x3, 0xaeaf5a0b, 0xfffffdff, 0x00800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xaeaf5c0b), rs1=>rd:x23(0xfffffbff), rs2:x25(0x00400000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x23, x25, 0x3, 0xaeaf5c0b, 0xfffffbff, 0x00400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x5170a7f4), rs1=>rd:x24(0xfffff7ff), rs2:x24(0x00200000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x24, x24, 0x3, 0x5170a7f4, 0xfffff7ff, 0x00200000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xaeaf480b), rs1=>rd:x25(0xffffefff), rs2:x23(0x00100000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x25, x23, 0x3, 0xaeaf480b, 0xffffefff, 0x00100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x580b8eaf), rs1=>rd:x26(0xffffdfff), rs2:x22(0x00080000), imm:0x1
+ TEST_RI_OP(aes32dsmi, x26, x22, 0x1, 0x580b8eaf, 0xffffdfff, 0x00080000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x580beeaf), rs1=>rd:x27(0xffffbfff), rs2:x21(0x00040000), imm:0x1
+ TEST_RI_OP(aes32dsmi, x27, x21, 0x1, 0x580beeaf, 0xffffbfff, 0x00040000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xaeafd80b), rs1=>rd:x28(0xffff7fff), rs2:x20(0x00020000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x28, x20, 0x3, 0xaeafd80b, 0xffff7fff, 0x00020000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x580aaeaf), rs1=>rd:x29(0xfffeffff), rs2:x19(0x00010000), imm:0x1
+ TEST_RI_OP(aes32dsmi, x29, x19, 0x1, 0x580aaeaf, 0xfffeffff, 0x00010000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0bacaf58), rs1=>rd:x30(0xfffdffff), rs2:x18(0x00008000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x30, x18, 0x2, 0x0bacaf58, 0xfffdffff, 0x00008000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xaf5c0bae), rs1=>rd:x31(0xfffbffff), rs2:x17(0x00004000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x31, x17, 0x0, 0xaf5c0bae, 0xfffbffff, 0x00004000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0ba6af58), rs1=>rd:x1(0xfff7ffff), rs2:x16(0x00002000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x2, 0x0ba6af58, 0xfff7ffff, 0x00002000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xa55e21b6), rs1=>rd:x2(0xffefffff), rs2:x15(0x00001000), imm:0x1
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x1, 0xa55e21b6, 0xffefffff, 0x00001000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xae8f580b), rs1=>rd:x3(0xffdfffff), rs2:x14(0x00000800), imm:0x3
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x3, 0xae8f580b, 0xffdfffff, 0x00000800, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xaeef580b), rs1=>rd:x4(0xffbfffff), rs2:x13(0x00000400), imm:0x3
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x3, 0xaeef580b, 0xffbfffff, 0x00000400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xafd80bae), rs1=>rd:x5(0xff7fffff), rs2:x12(0x00000200), imm:0x0
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x0, 0xafd80bae, 0xff7fffff, 0x00000200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xae580bae), rs1=>rd:x6(0xfeffffff), rs2:x11(0x00000100), imm:0x0
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x0, 0xae580bae, 0xfeffffff, 0x00000100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x78e60ea8), rs1=>rd:x7(0xfdffffff), rs2:x10(0x00000080), imm:0x0
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x0, 0x78e60ea8, 0xfdffffff, 0x00000080, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xd0e33075), rs1=>rd:x8(0xfbffffff), rs2:x9(0x00000040), imm:0x0
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x0, 0xd0e33075, 0xfbffffff, 0x00000040, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x9d763d8a), rs1=>rd:x9(0xf7ffffff), rs2:x8(0x00000020), imm:0x0
+ TEST_RI_OP(aes32dsmi, x9, x8, 0x0, 0x9d763d8a, 0xf7ffffff, 0x00000020, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xa6a54e21), rs1=>rd:x10(0xefffffff), rs2:x7(0x00000010), imm:0x0
+ TEST_RI_OP(aes32dsmi, x10, x7, 0x0, 0xa6a54e21, 0xefffffff, 0x00000010, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x8a05cfdf), rs1=>rd:x11(0xdfffffff), rs2:x6(0x00000008), imm:0x0
+ TEST_RI_OP(aes32dsmi, x11, x6, 0x0, 0x8a05cfdf, 0xdfffffff, 0x00000008, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x749454c4), rs1=>rd:x12(0xbfffffff), rs2:x5(0x00000004), imm:0x0
+ TEST_RI_OP(aes32dsmi, x12, x5, 0x0, 0x749454c4, 0xbfffffff, 0x00000004, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xbc5be8e5), rs1=>rd:x13(0x7fffffff), rs2:x4(0x00000002), imm:0x0
+ TEST_RI_OP(aes32dsmi, x13, x4, 0x0, 0xbc5be8e5, 0x7fffffff, 0x00000002, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xac9abe81), rs1=>rd:x14(0xffffffff), rs2:x3(0x00000001), imm:0x0
+ TEST_RI_OP(aes32dsmi, x14, x3, 0x0, 0xac9abe81, 0xffffffff, 0x00000001, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x50a7f450), rs1=>rd:x15(0x00000001), rs2:x2(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x15, x2, 0x0, 0x50a7f450, 0x00000001, 0x00000000, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x50a7f453), rs1=>rd:x16(0x00000002), rs2:x1(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x16, x1, 0x0, 0x50a7f453, 0x00000002, 0x00000000, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x50a7f455), rs1=>rd:x17(0x00000004), rs2:x31(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x17, x31, 0x0, 0x50a7f455, 0x00000004, 0x00000000, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x50a7f459), rs1=>rd:x18(0x00000008), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x18, x30, 0x0, 0x50a7f459, 0x00000008, 0x00000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x50a7f441), rs1=>rd:x19(0x00000010), rs2:x29(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x19, x29, 0x0, 0x50a7f441, 0x00000010, 0x00000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x50a7f471), rs1=>rd:x20(0x00000020), rs2:x28(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x20, x28, 0x0, 0x50a7f471, 0x00000020, 0x00000000, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x50a7f411), rs1=>rd:x21(0x00000040), rs2:x27(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x21, x27, 0x0, 0x50a7f411, 0x00000040, 0x00000000, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x50a7f4d1), rs1=>rd:x22(0x00000080), rs2:x26(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x22, x26, 0x0, 0x50a7f4d1, 0x00000080, 0x00000000, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x50a7f551), rs1=>rd:x23(0x00000100), rs2:x25(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x23, x25, 0x0, 0x50a7f551, 0x00000100, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x50a7f451), rs1=>rd:x24(0x00000200), rs2:x24(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x24, x24, 0x0, 0x50a7f451, 0x00000200, 0x00000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x50a7f051), rs1=>rd:x25(0x00000400), rs2:x23(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x25, x23, 0x0, 0x50a7f051, 0x00000400, 0x00000000, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x50a7fc51), rs1=>rd:x26(0x00000800), rs2:x22(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x26, x22, 0x0, 0x50a7fc51, 0x00000800, 0x00000000, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x50a7e451), rs1=>rd:x27(0x00001000), rs2:x21(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x27, x21, 0x0, 0x50a7e451, 0x00001000, 0x00000000, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x50a7d451), rs1=>rd:x28(0x00002000), rs2:x20(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x28, x20, 0x0, 0x50a7d451, 0x00002000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x50a7b451), rs1=>rd:x29(0x00004000), rs2:x19(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x29, x19, 0x0, 0x50a7b451, 0x00004000, 0x00000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x50a77451), rs1=>rd:x30(0x00008000), rs2:x18(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x30, x18, 0x0, 0x50a77451, 0x00008000, 0x00000000, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x50a6f451), rs1=>rd:x31(0x00010000), rs2:x17(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x31, x17, 0x0, 0x50a6f451, 0x00010000, 0x00000000, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x50a5f451), rs1=>rd:x1(0x00020000), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x0, 0x50a5f451, 0x00020000, 0x00000000, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x50a3f451), rs1=>rd:x2(0x00040000), rs2:x15(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x0, 0x50a3f451, 0x00040000, 0x00000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x50aff451), rs1=>rd:x3(0x00080000), rs2:x14(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x0, 0x50aff451, 0x00080000, 0x00000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x50b7f451), rs1=>rd:x4(0x00100000), rs2:x13(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x0, 0x50b7f451, 0x00100000, 0x00000000, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x5087f451), rs1=>rd:x5(0x00200000), rs2:x12(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x0, 0x5087f451, 0x00200000, 0x00000000, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x50e7f451), rs1=>rd:x6(0x00400000), rs2:x11(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x0, 0x50e7f451, 0x00400000, 0x00000000, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x5027f451), rs1=>rd:x7(0x00800000), rs2:x10(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x0, 0x5027f451, 0x00800000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x51a7f451), rs1=>rd:x8(0x01000000), rs2:x9(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x0, 0x51a7f451, 0x01000000, 0x00000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x52a7f451), rs1=>rd:x9(0x02000000), rs2:x8(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x9, x8, 0x0, 0x52a7f451, 0x02000000, 0x00000000, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x54a7f451), rs1=>rd:x10(0x04000000), rs2:x7(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x10, x7, 0x0, 0x54a7f451, 0x04000000, 0x00000000, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x58a7f451), rs1=>rd:x11(0x08000000), rs2:x6(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x11, x6, 0x0, 0x58a7f451, 0x08000000, 0x00000000, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x40a7f451), rs1=>rd:x12(0x10000000), rs2:x5(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x12, x5, 0x0, 0x40a7f451, 0x10000000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x70a7f451), rs1=>rd:x13(0x20000000), rs2:x4(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x13, x4, 0x0, 0x70a7f451, 0x20000000, 0x00000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x10a7f451), rs1=>rd:x14(0x40000000), rs2:x3(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x14, x3, 0x0, 0x10a7f451, 0x40000000, 0x00000000, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xd0a7f451), rs1=>rd:x15(0x80000000), rs2:x2(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x15, x2, 0x0, 0xd0a7f451, 0x80000000, 0x00000000, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x50a7f451), rs1=>rd:x16(0x00000000), rs2:x1(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x16, x1, 0x0, 0x50a7f451, 0x00000000, 0x00000000, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xaf580baf), rs1=>rd:x17(0xfffffffe), rs2:x31(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x17, x31, 0x0, 0xaf580baf, 0xfffffffe, 0x00000000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xaf580bac), rs1=>rd:x18(0xfffffffd), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x18, x30, 0x0, 0xaf580bac, 0xfffffffd, 0x00000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xaf580baa), rs1=>rd:x19(0xfffffffb), rs2:x29(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x19, x29, 0x0, 0xaf580baa, 0xfffffffb, 0x00000000, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xaf580ba6), rs1=>rd:x20(0xfffffff7), rs2:x28(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x20, x28, 0x0, 0xaf580ba6, 0xfffffff7, 0x00000000, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xaf580bbe), rs1=>rd:x21(0xffffffef), rs2:x27(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x21, x27, 0x0, 0xaf580bbe, 0xffffffef, 0x00000000, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xaf580b8e), rs1=>rd:x22(0xffffffdf), rs2:x26(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x22, x26, 0x0, 0xaf580b8e, 0xffffffdf, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xaf580bee), rs1=>rd:x23(0xffffffbf), rs2:x25(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x23, x25, 0x0, 0xaf580bee, 0xffffffbf, 0x00000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x50a7f451), rs1=>rd:x24(0xffffff7f), rs2:x24(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x24, x24, 0x0, 0x50a7f451, 0xffffff7f, 0x00000000, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xaf580aae), rs1=>rd:x25(0xfffffeff), rs2:x23(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x25, x23, 0x0, 0xaf580aae, 0xfffffeff, 0x00000000, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xaf5809ae), rs1=>rd:x26(0xfffffdff), rs2:x22(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x26, x22, 0x0, 0xaf5809ae, 0xfffffdff, 0x00000000, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xaf580fae), rs1=>rd:x27(0xfffffbff), rs2:x21(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x27, x21, 0x0, 0xaf580fae, 0xfffffbff, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xaf5803ae), rs1=>rd:x28(0xfffff7ff), rs2:x20(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x28, x20, 0x0, 0xaf5803ae, 0xfffff7ff, 0x00000000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xaf581bae), rs1=>rd:x29(0xffffefff), rs2:x19(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x29, x19, 0x0, 0xaf581bae, 0xffffefff, 0x00000000, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xaf582bae), rs1=>rd:x30(0xffffdfff), rs2:x18(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x30, x18, 0x0, 0xaf582bae, 0xffffdfff, 0x00000000, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xaf584bae), rs1=>rd:x31(0xffffbfff), rs2:x17(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x31, x17, 0x0, 0xaf584bae, 0xffffbfff, 0x00000000, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xaf588bae), rs1=>rd:x1(0xffff7fff), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x0, 0xaf588bae, 0xffff7fff, 0x00000000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xaf590bae), rs1=>rd:x2(0xfffeffff), rs2:x15(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x0, 0xaf590bae, 0xfffeffff, 0x00000000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xaf5a0bae), rs1=>rd:x3(0xfffdffff), rs2:x14(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x0, 0xaf5a0bae, 0xfffdffff, 0x00000000, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xaf5c0bae), rs1=>rd:x4(0xfffbffff), rs2:x13(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x0, 0xaf5c0bae, 0xfffbffff, 0x00000000, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xaf500bae), rs1=>rd:x5(0xfff7ffff), rs2:x12(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x0, 0xaf500bae, 0xfff7ffff, 0x00000000, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xaf480bae), rs1=>rd:x6(0xffefffff), rs2:x11(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x0, 0xaf480bae, 0xffefffff, 0x00000000, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xaf780bae), rs1=>rd:x7(0xffdfffff), rs2:x10(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x0, 0xaf780bae, 0xffdfffff, 0x00000000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xaf180bae), rs1=>rd:x8(0xffbfffff), rs2:x9(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x0, 0xaf180bae, 0xffbfffff, 0x00000000, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xae2f580b), rs1=>rd:x9(0xff7fffff), rs2:x8(0x00000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x9, x8, 0x3, 0xae2f580b, 0xff7fffff, 0x00000000, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xafaf580b), rs1=>rd:x10(0xfeffffff), rs2:x7(0x00000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x10, x7, 0x3, 0xafaf580b, 0xfeffffff, 0x00000000, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xacaf580b), rs1=>rd:x11(0xfdffffff), rs2:x6(0x00000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x11, x6, 0x3, 0xacaf580b, 0xfdffffff, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xaaaf580b), rs1=>rd:x12(0xfbffffff), rs2:x5(0x00000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x12, x5, 0x3, 0xaaaf580b, 0xfbffffff, 0x00000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x500baeaf), rs1=>rd:x13(0xf7ffffff), rs2:x4(0x00000000), imm:0x1
+ TEST_RI_OP(aes32dsmi, x13, x4, 0x1, 0x500baeaf, 0xf7ffffff, 0x00000000, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x480baeaf), rs1=>rd:x14(0xefffffff), rs2:x3(0x00000000), imm:0x1
+ TEST_RI_OP(aes32dsmi, x14, x3, 0x1, 0x480baeaf, 0xefffffff, 0x00000000, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x8eaf580b), rs1=>rd:x15(0xdfffffff), rs2:x2(0x00000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x15, x2, 0x3, 0x8eaf580b, 0xdfffffff, 0x00000000, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x180baeaf), rs1=>rd:x16(0xbfffffff), rs2:x1(0x00000000), imm:0x1
+ TEST_RI_OP(aes32dsmi, x16, x1, 0x1, 0x180baeaf, 0xbfffffff, 0x00000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x8baeaf58), rs1=>rd:x17(0x7fffffff), rs2:x31(0x00000000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x17, x31, 0x2, 0x8baeaf58, 0x7fffffff, 0x00000000, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xaf580bae), rs1=>rd:x18(0xffffffff), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x18, x30, 0x0, 0xaf580bae, 0xffffffff, 0x00000000, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0xff7f8bcc), rs1=>rd:x19(0xadea5195), rs2:x29(0x121bcc23), imm:0x2
+ TEST_RI_OP(aes32dsmi, x19, x29, 0x2, 0xff7f8bcc, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1=>rd:x0(0xd2ffbec1), rs2:x28(0xa47d105b), imm:0x1
+ TEST_RI_OP(aes32dsmi, x0, x28, 0x1, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xf9b10f4f), rs1=>rd:x21(0xa8e1a8bb), rs2:x0(0x707af2c0), imm:0x3
+ TEST_RI_OP(aes32dsmi, x21, x0, 0x3, 0xf9b10f4f, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with random values
+ // result rd:x22(0x7fb3936a), rs1=>rd:x22(0x48c99fcb), rs2:x26(0xe19bfbc3), imm:0x3
+ TEST_RI_OP(aes32dsmi, x22, x26, 0x3, 0x7fb3936a, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/AES32DSMI-02.S b/riscof/suite/rv32i_m/K_unratified/AES32DSMI-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..807c501375c5f1889e1a1c9e4e21a94717ae5c09
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/AES32DSMI-02.S
@@ -0,0 +1,1780 @@
+// RISC-V Architectural Validation Test AES32DSMI-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes32dsmi'.
+// Using dataset: sbox32
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes32dsmi)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes32dsmi)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox32
+ // result rd:x1(0xfd4da5c4), rs1=>rd:x1(0xadea5195), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x0, 0xfd4da5c4, 0xadea5195, 0x00000000, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox32
+ // result rd:x2(0xb7bec092), rs1=>rd:x2(0xd2ffbec1), rs2:x15(0x00000100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x1, 0xb7bec092, 0xd2ffbec1, 0x00000100, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox32
+ // result rd:x3(0xbffb6b1f), rs1=>rd:x3(0xa8e1a8bb), rs2:x14(0x00020000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x2, 0xbffb6b1f, 0xa8e1a8bb, 0x00020000, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox32
+ // result rd:x4(0x725fc1ec), rs1=>rd:x4(0x48c99fcb), rs2:x13(0x03000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x3, 0x725fc1ec, 0x48c99fcb, 0x03000000, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox32
+ // result rd:x5(0x8d76f974), rs1=>rd:x5(0x461d524f), rs2:x12(0x00000004), imm:0x0
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x0, 0x8d76f974, 0x461d524f, 0x00000004, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox32
+ // result rd:x6(0x17170f5e), rs1=>rd:x6(0x528a10af), rs2:x11(0x00000500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x1, 0x17170f5e, 0x528a10af, 0x00000500, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox32
+ // result rd:x7(0x1b37509b), rs1=>rd:x7(0xe19bfbc3), rs2:x10(0x00060000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x2, 0x1b37509b, 0xe19bfbc3, 0x00060000, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox32
+ // result rd:x8(0x3be9f123), rs1=>rd:x8(0x707af2c0), rs2:x9(0x07000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x3, 0x3be9f123, 0x707af2c0, 0x07000000, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox32
+ // result rd:x9(0xf187207b), rs1=>rd:x9(0xa47d105b), rs2:x8(0x00000008), imm:0x0
+ TEST_RI_OP(aes32dsmi, x9, x8, 0x0, 0xf187207b, 0xa47d105b, 0x00000008, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox32
+ // result rd:x10(0x7f6d61d5), rs1=>rd:x10(0x121bcc23), rs2:x7(0x00000900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x10, x7, 0x1, 0x7f6d61d5, 0x121bcc23, 0x00000900, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox32
+ // result rd:x11(0x6162c0e3), rs1=>rd:x11(0xadea5195), rs2:x6(0x000a0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x11, x6, 0x2, 0x6162c0e3, 0xadea5195, 0x000a0000, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox32
+ // result rd:x12(0x27daf2c3), rs1=>rd:x12(0xd2ffbec1), rs2:x5(0x0b000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x12, x5, 0x3, 0x27daf2c3, 0xd2ffbec1, 0x0b000000, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox32
+ // result rd:x13(0x54364df4), rs1=>rd:x13(0xa8e1a8bb), rs2:x4(0x0000000c), imm:0x0
+ TEST_RI_OP(aes32dsmi, x13, x4, 0x0, 0x54364df4, 0xa8e1a8bb, 0x0000000c, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox32
+ // result rd:x14(0x83e35a1c), rs1=>rd:x14(0x48c99fcb), rs2:x3(0x00000d00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x14, x3, 0x1, 0x83e35a1c, 0x48c99fcb, 0x00000d00, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox32
+ // result rd:x15(0x733bd20b), rs1=>rd:x15(0x461d524f), rs2:x2(0x000e0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x15, x2, 0x2, 0x733bd20b, 0x461d524f, 0x000e0000, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox32
+ // result rd:x16(0xe705b3cd), rs1=>rd:x16(0x528a10af), rs2:x1(0x0f000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x16, x1, 0x3, 0xe705b3cd, 0x528a10af, 0x0f000000, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox32
+ // result rd:x17(0xa8c14a1d), rs1=>rd:x17(0xe19bfbc3), rs2:x31(0x00000010), imm:0x0
+ TEST_RI_OP(aes32dsmi, x17, x31, 0x0, 0xa8c14a1d, 0xe19bfbc3, 0x00000010, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox32
+ // result rd:x18(0x6bc0d7a7), rs1=>rd:x18(0x707af2c0), rs2:x30(0x00001100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x18, x30, 0x1, 0x6bc0d7a7, 0x707af2c0, 0x00001100, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox32
+ // result rd:x19(0x4e388855), rs1=>rd:x19(0xa47d105b), rs2:x29(0x00120000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x19, x29, 0x2, 0x4e388855, 0xa47d105b, 0x00120000, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox32
+ // result rd:x20(0x4ffa0cdd), rs1=>rd:x20(0x121bcc23), rs2:x28(0x13000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x20, x28, 0x3, 0x4ffa0cdd, 0x121bcc23, 0x13000000, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox32
+ // result rd:x21(0xaf9f7e56), rs1=>rd:x21(0xadea5195), rs2:x27(0x00000014), imm:0x0
+ TEST_RI_OP(aes32dsmi, x21, x27, 0x0, 0xaf9f7e56, 0xadea5195, 0x00000014, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox32
+ // result rd:x22(0x22b33fd3), rs1=>rd:x22(0xd2ffbec1), rs2:x26(0x00001500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x22, x26, 0x1, 0x22b33fd3, 0xd2ffbec1, 0x00001500, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox32
+ // result rd:x23(0xee6c0b2c), rs1=>rd:x23(0xa8e1a8bb), rs2:x25(0x00160000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x23, x25, 0x2, 0xee6c0b2c, 0xa8e1a8bb, 0x00160000, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox32
+ // result rd:x24(0x7cc6f9d3), rs1=>rd:x24(0x48c99fcb), rs2:x24(0x17000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x24, x24, 0x3, 0x7cc6f9d3, 0x48c99fcb, 0x17000000, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox32
+ // result rd:x25(0xa142dd4c), rs1=>rd:x25(0x461d524f), rs2:x23(0x00000018), imm:0x0
+ TEST_RI_OP(aes32dsmi, x25, x23, 0x0, 0xa142dd4c, 0x461d524f, 0x00000018, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox32
+ // result rd:x26(0xce18053a), rs1=>rd:x26(0x528a10af), rs2:x22(0x00001900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x26, x22, 0x1, 0xce18053a, 0x528a10af, 0x00001900, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox32
+ // result rd:x27(0x8c2410b9), rs1=>rd:x27(0xe19bfbc3), rs2:x21(0x001a0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x27, x21, 0x2, 0x8c2410b9, 0xe19bfbc3, 0x001a0000, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox32
+ // result rd:x28(0xe5a0ab92), rs1=>rd:x28(0x707af2c0), rs2:x20(0x1b000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x28, x20, 0x3, 0xe5a0ab92, 0x707af2c0, 0x1b000000, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox32
+ // result rd:x29(0x89feae8f), rs1=>rd:x29(0xa47d105b), rs2:x19(0x0000001c), imm:0x0
+ TEST_RI_OP(aes32dsmi, x29, x19, 0x0, 0x89feae8f, 0xa47d105b, 0x0000001c, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox32
+ // result rd:x30(0x336f94f0), rs1=>rd:x30(0x121bcc23), rs2:x18(0x00001d00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x30, x18, 0x1, 0x336f94f0, 0x121bcc23, 0x00001d00, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox32
+ // result rd:x31(0x4da378fc), rs1=>rd:x31(0xadea5195), rs2:x17(0x001e0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x31, x17, 0x2, 0x4da378fc, 0xadea5195, 0x001e0000, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox32
+ // result rd:x1(0x5cbb7608), rs1=>rd:x1(0xd2ffbec1), rs2:x16(0x1f000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x3, 0x5cbb7608, 0xd2ffbec1, 0x1f000000, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox32
+ // result rd:x2(0xc2686ace), rs1=>rd:x2(0xa8e1a8bb), rs2:x15(0x00000020), imm:0x0
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x0, 0xc2686ace, 0xa8e1a8bb, 0x00000020, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox32
+ // result rd:x3(0x31476bb3), rs1=>rd:x3(0x48c99fcb), rs2:x14(0x00002100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x1, 0x31476bb3, 0x48c99fcb, 0x00002100, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox32
+ // result rd:x4(0x1e843971), rs1=>rd:x4(0x461d524f), rs2:x13(0x00220000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x2, 0x1e843971, 0x461d524f, 0x00220000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox32
+ // result rd:x5(0x75576116), rs1=>rd:x5(0x528a10af), rs2:x12(0x23000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x3, 0x75576116, 0x528a10af, 0x23000000, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox32
+ // result rd:x6(0x57d41a7d), rs1=>rd:x6(0xe19bfbc3), rs2:x11(0x00000024), imm:0x0
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x0, 0x57d41a7d, 0xe19bfbc3, 0x00000024, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox32
+ // result rd:x7(0xddf202d7), rs1=>rd:x7(0x707af2c0), rs2:x10(0x00002500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x1, 0xddf202d7, 0x707af2c0, 0x00002500, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox32
+ // result rd:x8(0x84b476f7), rs1=>rd:x8(0xa47d105b), rs2:x9(0x00260000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x2, 0x84b476f7, 0xa47d105b, 0x00260000, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox32
+ // result rd:x9(0x6faff6ed), rs1=>rd:x9(0x121bcc23), rs2:x8(0x27000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x9, x8, 0x3, 0x6faff6ed, 0x121bcc23, 0x27000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox32
+ // result rd:x10(0xb5a08ef6), rs1=>rd:x10(0xadea5195), rs2:x7(0x00000028), imm:0x0
+ TEST_RI_OP(aes32dsmi, x10, x7, 0x0, 0xb5a08ef6, 0xadea5195, 0x00000028, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox32
+ // result rd:x11(0xe3e55b43), rs1=>rd:x11(0xd2ffbec1), rs2:x6(0x00002900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x11, x6, 0x1, 0xe3e55b43, 0xd2ffbec1, 0x00002900, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox32
+ // result rd:x12(0xf976c888), rs1=>rd:x12(0xa8e1a8bb), rs2:x5(0x002a0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x12, x5, 0x2, 0xf976c888, 0xa8e1a8bb, 0x002a0000, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox32
+ // result rd:x13(0x2a8ce098), rs1=>rd:x13(0x48c99fcb), rs2:x4(0x2b000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x13, x4, 0x3, 0x2a8ce098, 0x48c99fcb, 0x2b000000, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox32
+ // result rd:x14(0xa66a36fe), rs1=>rd:x14(0x461d524f), rs2:x3(0x0000002c), imm:0x0
+ TEST_RI_OP(aes32dsmi, x14, x3, 0x0, 0xa66a36fe, 0x461d524f, 0x0000002c, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox32
+ // result rd:x15(0xfce1ab2b), rs1=>rd:x15(0x528a10af), rs2:x2(0x00002d00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x15, x2, 0x1, 0xfce1ab2b, 0x528a10af, 0x00002d00, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox32
+ // result rd:x16(0x6065e763), rs1=>rd:x16(0xe19bfbc3), rs2:x1(0x002e0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x16, x1, 0x2, 0x6065e763, 0xe19bfbc3, 0x002e0000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox32
+ // result rd:x17(0x89eed9c8), rs1=>rd:x17(0x707af2c0), rs2:x31(0x2f000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x17, x31, 0x3, 0x89eed9c8, 0x707af2c0, 0x2f000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox32
+ // result rd:x18(0xfc15582b), rs1=>rd:x18(0xa47d105b), rs2:x30(0x00000030), imm:0x0
+ TEST_RI_OP(aes32dsmi, x18, x30, 0x0, 0xfc15582b, 0xa47d105b, 0x00000030, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox32
+ // result rd:x19(0xef5e433a), rs1=>rd:x19(0x121bcc23), rs2:x29(0x00003100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x19, x29, 0x1, 0xef5e433a, 0x121bcc23, 0x00003100, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox32
+ // result rd:x20(0x737ed6f9), rs1=>rd:x20(0xadea5195), rs2:x28(0x00320000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x20, x28, 0x2, 0x737ed6f9, 0xadea5195, 0x00320000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox32
+ // result rd:x21(0x804846ba), rs1=>rd:x21(0xd2ffbec1), rs2:x27(0x33000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x21, x27, 0x3, 0x804846ba, 0xd2ffbec1, 0x33000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox32
+ // result rd:x22(0x8b32db10), rs1=>rd:x22(0xa8e1a8bb), rs2:x26(0x00000034), imm:0x0
+ TEST_RI_OP(aes32dsmi, x22, x26, 0x0, 0x8b32db10, 0xa8e1a8bb, 0x00000034, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox32
+ // result rd:x23(0x4a82ed29), rs1=>rd:x23(0x48c99fcb), rs2:x25(0x00003500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x23, x25, 0x1, 0x4a82ed29, 0x48c99fcb, 0x00003500, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox32
+ // result rd:x24(0x1fd5578f), rs1=>rd:x24(0x461d524f), rs2:x24(0x00360000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x24, x24, 0x2, 0x1fd5578f, 0x461d524f, 0x00360000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox32
+ // result rd:x25(0x34a0bbfa), rs1=>rd:x25(0x528a10af), rs2:x23(0x37000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x25, x23, 0x3, 0x34a0bbfa, 0x528a10af, 0x37000000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox32
+ // result rd:x26(0xe6b31071), rs1=>rd:x26(0xe19bfbc3), rs2:x22(0x00000038), imm:0x0
+ TEST_RI_OP(aes32dsmi, x26, x22, 0x0, 0xe6b31071, 0xe19bfbc3, 0x00000038, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox32
+ // result rd:x27(0xb2cfddc3), rs1=>rd:x27(0x707af2c0), rs2:x21(0x00003900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x27, x21, 0x1, 0xb2cfddc3, 0x707af2c0, 0x00003900, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox32
+ // result rd:x28(0x61fb8a20), rs1=>rd:x28(0xa47d105b), rs2:x20(0x003a0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x28, x20, 0x2, 0x61fb8a20, 0xa47d105b, 0x003a0000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox32
+ // result rd:x29(0xc1bec414), rs1=>rd:x29(0x121bcc23), rs2:x19(0x3b000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x29, x19, 0x3, 0xc1bec414, 0x121bcc23, 0x3b000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox32
+ // result rd:x30(0x5f6d79a5), rs1=>rd:x30(0xadea5195), rs2:x18(0x0000003c), imm:0x0
+ TEST_RI_OP(aes32dsmi, x30, x18, 0x0, 0x5f6d79a5, 0xadea5195, 0x0000003c, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox32
+ // result rd:x31(0x77409d73), rs1=>rd:x31(0xd2ffbec1), rs2:x17(0x00003d00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x31, x17, 0x1, 0x77409d73, 0xd2ffbec1, 0x00003d00, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox32
+ // result rd:x1(0xabe312d1), rs1=>rd:x1(0xa8e1a8bb), rs2:x16(0x003e0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x2, 0xabe312d1, 0xa8e1a8bb, 0x003e0000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox32
+ // result rd:x2(0xa5951ddd), rs1=>rd:x2(0x48c99fcb), rs2:x15(0x3f000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x3, 0xa5951ddd, 0x48c99fcb, 0x3f000000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox32
+ // result rd:x3(0x6d019dc5), rs1=>rd:x3(0x461d524f), rs2:x14(0x00000040), imm:0x0
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x0, 0x6d019dc5, 0x461d524f, 0x00000040, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox32
+ // result rd:x4(0xe6f3b73d), rs1=>rd:x4(0x528a10af), rs2:x13(0x00004100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x1, 0xe6f3b73d, 0x528a10af, 0x00004100, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox32
+ // result rd:x5(0xe6680b31), rs1=>rd:x5(0xe19bfbc3), rs2:x12(0x00420000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x2, 0xe6680b31, 0xe19bfbc3, 0x00420000, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox32
+ // result rd:x6(0x3edb10a9), rs1=>rd:x6(0x707af2c0), rs2:x11(0x43000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x3, 0x3edb10a9, 0x707af2c0, 0x43000000, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox32
+ // result rd:x7(0x6989ca3e), rs1=>rd:x7(0xa47d105b), rs2:x10(0x00000044), imm:0x0
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x0, 0x6989ca3e, 0xa47d105b, 0x00000044, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox32
+ // result rd:x8(0xac1ecaf6), rs1=>rd:x8(0x121bcc23), rs2:x9(0x00004500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x1, 0xac1ecaf6, 0x121bcc23, 0x00004500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox32
+ // result rd:x9(0x993b4ef7), rs1=>rd:x9(0xadea5195), rs2:x8(0x00460000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x9, x8, 0x2, 0x993b4ef7, 0xadea5195, 0x00460000, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox32
+ // result rd:x10(0x16754067), rs1=>rd:x10(0xd2ffbec1), rs2:x7(0x47000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x10, x7, 0x3, 0x16754067, 0xd2ffbec1, 0x47000000, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox32
+ // result rd:x11(0x35b2868f), rs1=>rd:x11(0xa8e1a8bb), rs2:x6(0x00000048), imm:0x0
+ TEST_RI_OP(aes32dsmi, x11, x6, 0x0, 0x35b2868f, 0xa8e1a8bb, 0x00000048, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox32
+ // result rd:x12(0x1d3a3d6b), rs1=>rd:x12(0x48c99fcb), rs2:x5(0x00004900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x12, x5, 0x1, 0x1d3a3d6b, 0x48c99fcb, 0x00004900, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox32
+ // result rd:x13(0xcc1860ae), rs1=>rd:x13(0x461d524f), rs2:x4(0x004a0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x13, x4, 0x2, 0xcc1860ae, 0x461d524f, 0x004a0000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox32
+ // result rd:x14(0xf6fffb59), rs1=>rd:x14(0x528a10af), rs2:x3(0x4b000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x14, x3, 0x3, 0xf6fffb59, 0x528a10af, 0x4b000000, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox32
+ // result rd:x15(0xd87778c8), rs1=>rd:x15(0xe19bfbc3), rs2:x2(0x0000004c), imm:0x0
+ TEST_RI_OP(aes32dsmi, x15, x2, 0x0, 0xd87778c8, 0xe19bfbc3, 0x0000004c, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox32
+ // result rd:x16(0x9f1ab26a), rs1=>rd:x16(0x707af2c0), rs2:x1(0x00004d00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x16, x1, 0x1, 0x9f1ab26a, 0x707af2c0, 0x00004d00, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox32
+ // result rd:x17(0xd52316c4), rs1=>rd:x17(0xa47d105b), rs2:x31(0x004e0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x17, x31, 0x2, 0xd52316c4, 0xa47d105b, 0x004e0000, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox32
+ // result rd:x18(0xaf4adc4d), rs1=>rd:x18(0x121bcc23), rs2:x30(0x4f000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x18, x30, 0x3, 0xaf4adc4d, 0x121bcc23, 0x4f000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox32
+ // result rd:x19(0x546070ab), rs1=>rd:x19(0xadea5195), rs2:x29(0x00000050), imm:0x0
+ TEST_RI_OP(aes32dsmi, x19, x29, 0x0, 0x546070ab, 0xadea5195, 0x00000050, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox32
+ // result rd:x20(0xd42228fc), rs1=>rd:x20(0xd2ffbec1), rs2:x28(0x00005100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x20, x28, 0x1, 0xd42228fc, 0xd2ffbec1, 0x00005100, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox32
+ // result rd:x21(0x963c06be), rs1=>rd:x21(0xa8e1a8bb), rs2:x27(0x00520000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x21, x27, 0x2, 0x963c06be, 0xa8e1a8bb, 0x00520000, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox32
+ // result rd:x22(0x058f222d), rs1=>rd:x22(0x48c99fcb), rs2:x26(0x53000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x22, x26, 0x3, 0x058f222d, 0x48c99fcb, 0x53000000, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox32
+ // result rd:x23(0xf39006de), rs1=>rd:x23(0x461d524f), rs2:x25(0x00000054), imm:0x0
+ TEST_RI_OP(aes32dsmi, x23, x25, 0x0, 0xf39006de, 0x461d524f, 0x00000054, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox32
+ // result rd:x24(0x5dc42405), rs1=>rd:x24(0x528a10af), rs2:x24(0x00005500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x24, x24, 0x1, 0x5dc42405, 0x528a10af, 0x00005500, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox32
+ // result rd:x25(0xe79f9417), rs1=>rd:x25(0xe19bfbc3), rs2:x23(0x00560000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x25, x23, 0x2, 0xe79f9417, 0xe19bfbc3, 0x00560000, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox32
+ // result rd:x26(0x1085e790), rs1=>rd:x26(0x707af2c0), rs2:x22(0x57000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x26, x22, 0x3, 0x1085e790, 0x707af2c0, 0x57000000, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox32
+ // result rd:x27(0x80868842), rs1=>rd:x27(0xa47d105b), rs2:x21(0x00000058), imm:0x0
+ TEST_RI_OP(aes32dsmi, x27, x21, 0x0, 0x80868842, 0xa47d105b, 0x00000058, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox32
+ // result rd:x28(0xfba61ab4), rs1=>rd:x28(0x121bcc23), rs2:x20(0x00005900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x28, x20, 0x1, 0xfba61ab4, 0x121bcc23, 0x00005900, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox32
+ // result rd:x29(0xed639dd6), rs1=>rd:x29(0xadea5195), rs2:x19(0x005a0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x29, x19, 0x2, 0xed639dd6, 0xadea5195, 0x005a0000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox32
+ // result rd:x30(0xb5882018), rs1=>rd:x30(0xd2ffbec1), rs2:x18(0x5b000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x30, x18, 0x3, 0xb5882018, 0xd2ffbec1, 0x5b000000, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox32
+ // result rd:x31(0x15a3400b), rs1=>rd:x31(0xa8e1a8bb), rs2:x17(0x0000005c), imm:0x0
+ TEST_RI_OP(aes32dsmi, x31, x17, 0x0, 0x15a3400b, 0xa8e1a8bb, 0x0000005c, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox32
+ // result rd:x1(0xc3409843), rs1=>rd:x1(0x48c99fcb), rs2:x16(0x00005d00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x1, 0xc3409843, 0x48c99fcb, 0x00005d00, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox32
+ // result rd:x2(0x5ffa6a14), rs1=>rd:x2(0x461d524f), rs2:x15(0x005e0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x2, 0x5ffa6a14, 0x461d524f, 0x005e0000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox32
+ // result rd:x3(0x2b51fe67), rs1=>rd:x3(0x528a10af), rs2:x14(0x5f000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x3, 0x2b51fe67, 0x528a10af, 0x5f000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox32
+ // result rd:x4(0xa6918762), rs1=>rd:x4(0xe19bfbc3), rs2:x13(0x00000060), imm:0x0
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x0, 0xa6918762, 0xe19bfbc3, 0x00000060, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox32
+ // result rd:x5(0x7f388e29), rs1=>rd:x5(0x707af2c0), rs2:x12(0x00006100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x1, 0x7f388e29, 0x707af2c0, 0x00006100, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox32
+ // result rd:x6(0x2085d945), rs1=>rd:x6(0xa47d105b), rs2:x11(0x00620000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x2, 0x2085d945, 0xa47d105b, 0x00620000, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox32
+ // result rd:x7(0x121bcc23), rs1=>rd:x7(0x121bcc23), rs2:x10(0x63000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x3, 0x121bcc23, 0x121bcc23, 0x63000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox32
+ // result rd:x8(0x2e6cd19c), rs1=>rd:x8(0xadea5195), rs2:x9(0x00000064), imm:0x0
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x0, 0x2e6cd19c, 0xadea5195, 0x00000064, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox32
+ // result rd:x9(0x3fd48c89), rs1=>rd:x9(0xd2ffbec1), rs2:x8(0x00006500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x9, x8, 0x1, 0x3fd48c89, 0xd2ffbec1, 0x00006500, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox32
+ // result rd:x10(0xb9ff04cb), rs1=>rd:x10(0xa8e1a8bb), rs2:x7(0x00660000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x10, x7, 0x2, 0xb9ff04cb, 0xa8e1a8bb, 0x00660000, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox32
+ // result rd:x11(0x2487ed91), rs1=>rd:x11(0x48c99fcb), rs2:x6(0x67000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x11, x6, 0x3, 0x2487ed91, 0x48c99fcb, 0x67000000, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox32
+ // result rd:x12(0xbde25cb2), rs1=>rd:x12(0x461d524f), rs2:x5(0x00000068), imm:0x0
+ TEST_RI_OP(aes32dsmi, x12, x5, 0x0, 0xbde25cb2, 0x461d524f, 0x00000068, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox32
+ // result rd:x13(0x6a0f1ff9), rs1=>rd:x13(0x528a10af), rs2:x4(0x00006900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x13, x4, 0x1, 0x6a0f1ff9, 0x528a10af, 0x00006900, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox32
+ // result rd:x14(0x4fa6e516), rs1=>rd:x14(0xe19bfbc3), rs2:x3(0x006a0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x14, x3, 0x2, 0x4fa6e516, 0xe19bfbc3, 0x006a0000, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox32
+ // result rd:x15(0x465dcbed), rs1=>rd:x15(0x707af2c0), rs2:x2(0x6b000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x15, x2, 0x3, 0x465dcbed, 0x707af2c0, 0x6b000000, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox32
+ // result rd:x16(0xc0a41f51), rs1=>rd:x16(0xa47d105b), rs2:x1(0x0000006c), imm:0x0
+ TEST_RI_OP(aes32dsmi, x16, x1, 0x0, 0xc0a41f51, 0xa47d105b, 0x0000006c, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox32
+ // result rd:x17(0xb447a402), rs1=>rd:x17(0x121bcc23), rs2:x31(0x00006d00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x17, x31, 0x1, 0xb447a402, 0x121bcc23, 0x00006d00, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox32
+ // result rd:x18(0xf67180c1), rs1=>rd:x18(0xadea5195), rs2:x30(0x006e0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x18, x30, 0x2, 0xf67180c1, 0xadea5195, 0x006e0000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox32
+ // result rd:x19(0xf6c590f7), rs1=>rd:x19(0xd2ffbec1), rs2:x29(0x6f000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x19, x29, 0x3, 0xf6c590f7, 0xd2ffbec1, 0x6f000000, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox32
+ // result rd:x20(0x1986a2b7), rs1=>rd:x20(0xa8e1a8bb), rs2:x28(0x00000070), imm:0x0
+ TEST_RI_OP(aes32dsmi, x20, x28, 0x0, 0x1986a2b7, 0xa8e1a8bb, 0x00000070, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox32
+ // result rd:x21(0xaf9e0cc4), rs1=>rd:x21(0x48c99fcb), rs2:x27(0x00007100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x21, x27, 0x1, 0xaf9e0cc4, 0x48c99fcb, 0x00007100, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox32
+ // result rd:x22(0xa8a980d9), rs1=>rd:x22(0x461d524f), rs2:x26(0x00720000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x22, x26, 0x2, 0xa8a980d9, 0x461d524f, 0x00720000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox32
+ // result rd:x23(0x49148134), rs1=>rd:x23(0x528a10af), rs2:x25(0x73000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x23, x25, 0x3, 0x49148134, 0x528a10af, 0x73000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox32
+ // result rd:x24(0x4fc5c0f4), rs1=>rd:x24(0xe19bfbc3), rs2:x24(0x00000074), imm:0x0
+ TEST_RI_OP(aes32dsmi, x24, x24, 0x0, 0x4fc5c0f4, 0xe19bfbc3, 0x00000074, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox32
+ // result rd:x25(0x50a69362), rs1=>rd:x25(0x707af2c0), rs2:x23(0x00007500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x25, x23, 0x1, 0x50a69362, 0x707af2c0, 0x00007500, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox32
+ // result rd:x26(0xd3277910), rs1=>rd:x26(0xa47d105b), rs2:x22(0x00760000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x26, x22, 0x2, 0xd3277910, 0xa47d105b, 0x00760000, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox32
+ // result rd:x27(0x0e0dd631), rs1=>rd:x27(0x121bcc23), rs2:x21(0x77000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x27, x21, 0x3, 0x0e0dd631, 0x121bcc23, 0x77000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox32
+ // result rd:x28(0xa750c277), rs1=>rd:x28(0xadea5195), rs2:x20(0x00000078), imm:0x0
+ TEST_RI_OP(aes32dsmi, x28, x20, 0x0, 0xa750c277, 0xadea5195, 0x00000078, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox32
+ // result rd:x29(0xf85f7e24), rs1=>rd:x29(0xd2ffbec1), rs2:x19(0x00007900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x29, x19, 0x1, 0xf85f7e24, 0xd2ffbec1, 0x00007900, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox32
+ // result rd:x30(0x8addeb5b), rs1=>rd:x30(0xa8e1a8bb), rs2:x18(0x007a0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x30, x18, 0x2, 0x8addeb5b, 0xa8e1a8bb, 0x007a0000, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox32
+ // result rd:x31(0x5ad488d0), rs1=>rd:x31(0x48c99fcb), rs2:x17(0x7b000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x31, x17, 0x3, 0x5ad488d0, 0x48c99fcb, 0x7b000000, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox32
+ // result rd:x1(0x4d105b41), rs1=>rd:x1(0x461d524f), rs2:x16(0x0000007c), imm:0x0
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x0, 0x4d105b41, 0x461d524f, 0x0000007c, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox32
+ // result rd:x2(0x9501e202), rs1=>rd:x2(0x528a10af), rs2:x15(0x00007d00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x1, 0x9501e202, 0x528a10af, 0x00007d00, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox32
+ // result rd:x3(0x57b6426b), rs1=>rd:x3(0xe19bfbc3), rs2:x14(0x007e0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x2, 0x57b6426b, 0xe19bfbc3, 0x007e0000, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox32
+ // result rd:x4(0x64b25bde), rs1=>rd:x4(0x707af2c0), rs2:x13(0x7f000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x3, 0x64b25bde, 0x707af2c0, 0x7f000000, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox32
+ // result rd:x5(0x2164e10c), rs1=>rd:x5(0xa47d105b), rs2:x12(0x00000080), imm:0x0
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x0, 0x2164e10c, 0xa47d105b, 0x00000080, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox32
+ // result rd:x6(0x156e636f), rs1=>rd:x6(0x121bcc23), rs2:x11(0x00008100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x1, 0x156e636f, 0x121bcc23, 0x00008100, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox32
+ // result rd:x7(0x3404ea48), rs1=>rd:x7(0xadea5195), rs2:x10(0x00820000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x2, 0x3404ea48, 0xadea5195, 0x00820000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox32
+ // result rd:x8(0x7102debe), rs1=>rd:x8(0xd2ffbec1), rs2:x9(0x83000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x3, 0x7102debe, 0xd2ffbec1, 0x83000000, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox32
+ // result rd:x9(0x37c7a94c), rs1=>rd:x9(0xa8e1a8bb), rs2:x8(0x00000084), imm:0x0
+ TEST_RI_OP(aes32dsmi, x9, x8, 0x0, 0x37c7a94c, 0xa8e1a8bb, 0x00000084, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox32
+ // result rd:x10(0xbdbbc377), rs1=>rd:x10(0x48c99fcb), rs2:x7(0x00008500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x10, x7, 0x1, 0xbdbbc377, 0x48c99fcb, 0x00008500, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox32
+ // result rd:x11(0x20599774), rs1=>rd:x11(0x461d524f), rs2:x6(0x00860000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x11, x6, 0x2, 0x20599774, 0x461d524f, 0x00860000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox32
+ // result rd:x12(0x09be6e54), rs1=>rd:x12(0x528a10af), rs2:x5(0x87000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x12, x5, 0x3, 0x09be6e54, 0x528a10af, 0x87000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox32
+ // result rd:x13(0x97b2b848), rs1=>rd:x13(0xe19bfbc3), rs2:x4(0x00000088), imm:0x0
+ TEST_RI_OP(aes32dsmi, x13, x4, 0x0, 0x97b2b848, 0xe19bfbc3, 0x00000088, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox32
+ // result rd:x14(0xb659391c), rs1=>rd:x14(0x707af2c0), rs2:x3(0x00008900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x14, x3, 0x1, 0xb659391c, 0x707af2c0, 0x00008900, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox32
+ // result rd:x15(0x49cb78a7), rs1=>rd:x15(0xa47d105b), rs2:x2(0x008a0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x15, x2, 0x2, 0x49cb78a7, 0xa47d105b, 0x008a0000, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox32
+ // result rd:x16(0xaa783dc7), rs1=>rd:x16(0x121bcc23), rs2:x1(0x8b000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x16, x1, 0x3, 0xaa783dc7, 0x121bcc23, 0x8b000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox32
+ // result rd:x17(0x67366042), rs1=>rd:x17(0xadea5195), rs2:x31(0x0000008c), imm:0x0
+ TEST_RI_OP(aes32dsmi, x17, x31, 0x0, 0x67366042, 0xadea5195, 0x0000008c, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox32
+ // result rd:x18(0x579cfcd1), rs1=>rd:x18(0xd2ffbec1), rs2:x30(0x00008d00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x18, x30, 0x1, 0x579cfcd1, 0xd2ffbec1, 0x00008d00, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox32
+ // result rd:x19(0x3ff2e899), rs1=>rd:x19(0xa8e1a8bb), rs2:x29(0x008e0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x19, x29, 0x2, 0x3ff2e899, 0xa8e1a8bb, 0x008e0000, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox32
+ // result rd:x20(0xcce98e0d), rs1=>rd:x20(0x48c99fcb), rs2:x28(0x8f000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x20, x28, 0x3, 0xcce98e0d, 0x48c99fcb, 0x8f000000, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox32
+ // result rd:x21(0x3b3918ca), rs1=>rd:x21(0x461d524f), rs2:x27(0x00000090), imm:0x0
+ TEST_RI_OP(aes32dsmi, x21, x27, 0x0, 0x3b3918ca, 0x461d524f, 0x00000090, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox32
+ // result rd:x22(0x6f31c257), rs1=>rd:x22(0x528a10af), rs2:x26(0x00009100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x22, x26, 0x1, 0x6f31c257, 0x528a10af, 0x00009100, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox32
+ // result rd:x23(0x1835eaf1), rs1=>rd:x23(0xe19bfbc3), rs2:x25(0x00920000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x23, x25, 0x2, 0x1835eaf1, 0xe19bfbc3, 0x00920000, x1, 4, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox32
+ // result rd:x24(0x546da129), rs1=>rd:x24(0x707af2c0), rs2:x24(0x93000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x24, x24, 0x3, 0x546da129, 0x707af2c0, 0x93000000, x1, 8, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox32
+ // result rd:x25(0xef528e46), rs1=>rd:x25(0xa47d105b), rs2:x23(0x00000094), imm:0x0
+ TEST_RI_OP(aes32dsmi, x25, x23, 0x0, 0xef528e46, 0xa47d105b, 0x00000094, x1, 12, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox32
+ // result rd:x26(0x22a910d0), rs1=>rd:x26(0x121bcc23), rs2:x22(0x00009500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x26, x22, 0x1, 0x22a910d0, 0x121bcc23, 0x00009500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox32
+ // result rd:x27(0x2be7bdc7), rs1=>rd:x27(0xadea5195), rs2:x21(0x00960000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x27, x21, 0x2, 0x2be7bdc7, 0xadea5195, 0x00960000, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox32
+ // result rd:x28(0xa52f5d00), rs1=>rd:x28(0xd2ffbec1), rs2:x20(0x97000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x28, x20, 0x3, 0xa52f5d00, 0xd2ffbec1, 0x97000000, x6, 4, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox32
+ // result rd:x29(0xc4f71b90), rs1=>rd:x29(0xa8e1a8bb), rs2:x19(0x00000098), imm:0x0
+ TEST_RI_OP(aes32dsmi, x29, x19, 0x0, 0xc4f71b90, 0xa8e1a8bb, 0x00000098, x6, 8, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox32
+ // result rd:x30(0xf1b93652), rs1=>rd:x30(0x48c99fcb), rs2:x18(0x00009900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x30, x18, 0x1, 0xf1b93652, 0x48c99fcb, 0x00009900, x6, 12, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox32
+ // result rd:x31(0xd20ca807), rs1=>rd:x31(0x461d524f), rs2:x17(0x009a0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x31, x17, 0x2, 0xd20ca807, 0x461d524f, 0x009a0000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox32
+ // result rd:x1(0x15a87446), rs1=>rd:x1(0x528a10af), rs2:x16(0x9b000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x3, 0x15a87446, 0x528a10af, 0x9b000000, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox32
+ // result rd:x2(0x2517076b), rs1=>rd:x2(0xe19bfbc3), rs2:x15(0x0000009c), imm:0x0
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x0, 0x2517076b, 0xe19bfbc3, 0x0000009c, x6, 4, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox32
+ // result rd:x3(0x4f8a52da), rs1=>rd:x3(0x707af2c0), rs2:x14(0x00009d00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x1, 0x4f8a52da, 0x707af2c0, 0x00009d00, x6, 8, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox32
+ // result rd:x4(0xd92bc877), rs1=>rd:x4(0xa47d105b), rs2:x13(0x009e0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x2, 0xd92bc877, 0xa47d105b, 0x009e0000, x6, 12, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox32
+ // result rd:x5(0x30f45c10), rs1=>rd:x5(0x121bcc23), rs2:x12(0x9f000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x3, 0x30f45c10, 0x121bcc23, 0x9f000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox32
+ // result rd:x6(0x6aa41812), rs1=>rd:x6(0xadea5195), rs2:x11(0x000000a0), imm:0x0
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x0, 0x6aa41812, 0xadea5195, 0x000000a0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox32
+ // result rd:x7(0x03c76700), rs1=>rd:x7(0xd2ffbec1), rs2:x10(0x0000a100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x1, 0x03c76700, 0xd2ffbec1, 0x0000a100, x1, 4, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox32
+ // result rd:x8(0x626d5619), rs1=>rd:x8(0xa8e1a8bb), rs2:x9(0x00a20000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x2, 0x626d5619, 0xa8e1a8bb, 0x00a20000, x1, 8, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox32
+ // result rd:x9(0xd0ff941f), rs1=>rd:x9(0x48c99fcb), rs2:x8(0xa3000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x9, x8, 0x3, 0xd0ff941f, 0x48c99fcb, 0xa3000000, x1, 12, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox32
+ // result rd:x10(0x899ca7e9), rs1=>rd:x10(0x461d524f), rs2:x7(0x000000a4), imm:0x0
+ TEST_RI_OP(aes32dsmi, x10, x7, 0x0, 0x899ca7e9, 0x461d524f, 0x000000a4, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox32
+ // result rd:x11(0x8cf0b587), rs1=>rd:x11(0x528a10af), rs2:x6(0x0000a500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x11, x6, 0x1, 0x8cf0b587, 0x528a10af, 0x0000a500, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox32
+ // result rd:x12(0x5641dd4d), rs1=>rd:x12(0xe19bfbc3), rs2:x5(0x00a60000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x12, x5, 0x2, 0x5641dd4d, 0xe19bfbc3, 0x00a60000, x1, 4, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox32
+ // result rd:x13(0x4fde4d6d), rs1=>rd:x13(0x707af2c0), rs2:x4(0xa7000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x13, x4, 0x3, 0x4fde4d6d, 0x707af2c0, 0xa7000000, x1, 8, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox32
+ // result rd:x14(0x40e02a77), rs1=>rd:x14(0xa47d105b), rs2:x3(0x000000a8), imm:0x0
+ TEST_RI_OP(aes32dsmi, x14, x3, 0x0, 0x40e02a77, 0xa47d105b, 0x000000a8, x1, 12, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox32
+ // result rd:x15(0x80639c2e), rs1=>rd:x15(0x121bcc23), rs2:x2(0x0000a900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x15, x2, 0x1, 0x80639c2e, 0x121bcc23, 0x0000a900, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox32
+ // result rd:x16(0xf280ca59), rs1=>rd:x16(0xadea5195), rs2:x1(0x00aa0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x16, x1, 0x2, 0xf280ca59, 0xadea5195, 0x00aa0000, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox32
+ // result rd:x17(0x869df8bf), rs1=>rd:x17(0xd2ffbec1), rs2:x31(0xab000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x17, x31, 0x3, 0x869df8bf, 0xd2ffbec1, 0xab000000, x2, 4, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox32
+ // result rd:x18(0x6af2254d), rs1=>rd:x18(0xa8e1a8bb), rs2:x30(0x000000ac), imm:0x0
+ TEST_RI_OP(aes32dsmi, x18, x30, 0x0, 0x6af2254d, 0xa8e1a8bb, 0x000000ac, x2, 8, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox32
+ // result rd:x19(0xf0110f23), rs1=>rd:x19(0x48c99fcb), rs2:x29(0x0000ad00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x19, x29, 0x1, 0xf0110f23, 0x48c99fcb, 0x0000ad00, x2, 12, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox32
+ // result rd:x20(0x7f330cb8), rs1=>rd:x20(0x461d524f), rs2:x28(0x00ae0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x20, x28, 0x2, 0x7f330cb8, 0x461d524f, 0x00ae0000, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox32
+ // result rd:x21(0xd07fbf6c), rs1=>rd:x21(0x528a10af), rs2:x27(0xaf000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x21, x27, 0x3, 0xd07fbf6c, 0x528a10af, 0xaf000000, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox32
+ // result rd:x22(0x5f1ba65c), rs1=>rd:x22(0xe19bfbc3), rs2:x26(0x000000b0), imm:0x0
+ TEST_RI_OP(aes32dsmi, x22, x26, 0x0, 0x5f1ba65c, 0xe19bfbc3, 0x000000b0, x1, 4, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox32
+ // result rd:x23(0xe3aa9bbc), rs1=>rd:x23(0x707af2c0), rs2:x25(0x0000b100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x23, x25, 0x1, 0xe3aa9bbc, 0x707af2c0, 0x0000b100, x1, 8, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox32
+ // result rd:x24(0xd5dda92d), rs1=>rd:x24(0xa47d105b), rs2:x24(0x00b20000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x24, x24, 0x2, 0xd5dda92d, 0xa47d105b, 0x00b20000, x1, 12, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox32
+ // result rd:x25(0xdda8de06), rs1=>rd:x25(0x121bcc23), rs2:x23(0xb3000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x25, x23, 0x3, 0xdda8de06, 0x121bcc23, 0xb3000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox32
+ // result rd:x26(0x9673fd5d), rs1=>rd:x26(0xadea5195), rs2:x22(0x000000b4), imm:0x0
+ TEST_RI_OP(aes32dsmi, x26, x22, 0x0, 0x9673fd5d, 0xadea5195, 0x000000b4, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox32
+ // result rd:x27(0xafe7ae66), rs1=>rd:x27(0xd2ffbec1), rs2:x21(0x0000b500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x27, x21, 0x1, 0xafe7ae66, 0xd2ffbec1, 0x0000b500, x1, 4, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox32
+ // result rd:x28(0x3409c6d8), rs1=>rd:x28(0xa8e1a8bb), rs2:x20(0x00b60000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x28, x20, 0x2, 0x3409c6d8, 0xa8e1a8bb, 0x00b60000, x1, 8, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox32
+ // result rd:x29(0x93b224f0), rs1=>rd:x29(0x48c99fcb), rs2:x19(0xb7000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x29, x19, 0x3, 0x93b224f0, 0x48c99fcb, 0xb7000000, x1, 12, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox32
+ // result rd:x30(0x4f657482), rs1=>rd:x30(0x461d524f), rs2:x18(0x000000b8), imm:0x0
+ TEST_RI_OP(aes32dsmi, x30, x18, 0x0, 0x4f657482, 0x461d524f, 0x000000b8, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox32
+ // result rd:x31(0x4ad37e5b), rs1=>rd:x31(0x528a10af), rs2:x17(0x0000b900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x31, x17, 0x1, 0x4ad37e5b, 0x528a10af, 0x0000b900, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox32
+ // result rd:x1(0x7b77fa74), rs1=>rd:x1(0xe19bfbc3), rs2:x16(0x00ba0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x2, 0x7b77fa74, 0xe19bfbc3, 0x00ba0000, x5, 4, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox32
+ // result rd:x2(0xf3d2688f), rs1=>rd:x2(0x707af2c0), rs2:x15(0xbb000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x3, 0xf3d2688f, 0x707af2c0, 0xbb000000, x5, 8, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox32
+ // result rd:x3(0xc11385bd), rs1=>rd:x3(0xa47d105b), rs2:x14(0x000000bc), imm:0x0
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x0, 0xc11385bd, 0xa47d105b, 0x000000bc, x5, 12, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox32
+ // result rd:x4(0xf4e4665d), rs1=>rd:x4(0x121bcc23), rs2:x13(0x0000bd00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x1, 0xf4e4665d, 0x121bcc23, 0x0000bd00, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox32
+ // result rd:x5(0x11cb595a), rs1=>rd:x5(0xadea5195), rs2:x12(0x00be0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x2, 0x11cb595a, 0xadea5195, 0x00be0000, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox32
+ // result rd:x6(0x3d1956d4), rs1=>rd:x6(0xd2ffbec1), rs2:x11(0xbf000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x3, 0x3d1956d4, 0xd2ffbec1, 0xbf000000, x1, 4, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox32
+ // result rd:x7(0x717a4f01), rs1=>rd:x7(0xa8e1a8bb), rs2:x10(0x000000c0), imm:0x0
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x0, 0x717a4f01, 0xa8e1a8bb, 0x000000c0, x1, 8, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox32
+ // result rd:x8(0x7ea6d505), rs1=>rd:x8(0x48c99fcb), rs2:x9(0x0000c100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x1, 0x7ea6d505, 0x48c99fcb, 0x0000c100, x1, 12, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox32
+ // result rd:x9(0xd9f78646), rs1=>rd:x9(0x461d524f), rs2:x8(0x00c20000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x9, x8, 0x2, 0xd9f78646, 0x461d524f, 0x00c20000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox32
+ // result rd:x10(0x7b5c6c1f), rs1=>rd:x10(0x528a10af), rs2:x7(0xc3000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x10, x7, 0x3, 0x7b5c6c1f, 0x528a10af, 0xc3000000, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox32
+ // result rd:x11(0x4e295ff2), rs1=>rd:x11(0xe19bfbc3), rs2:x6(0x000000c4), imm:0x0
+ TEST_RI_OP(aes32dsmi, x11, x6, 0x0, 0x4e295ff2, 0xe19bfbc3, 0x000000c4, x1, 4, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox32
+ // result rd:x12(0x5345d8f1), rs1=>rd:x12(0x707af2c0), rs2:x5(0x0000c500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x12, x5, 0x1, 0x5345d8f1, 0x707af2c0, 0x0000c500, x1, 8, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox32
+ // result rd:x13(0x01bb20cf), rs1=>rd:x13(0xa47d105b), rs2:x4(0x00c60000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x13, x4, 0x2, 0x01bb20cf, 0xa47d105b, 0x00c60000, x1, 12, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox32
+ // result rd:x14(0x27dbaa81), rs1=>rd:x14(0x121bcc23), rs2:x3(0xc7000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x14, x3, 0x3, 0x27dbaa81, 0x121bcc23, 0xc7000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox32
+ // result rd:x15(0x9a561fe1), rs1=>rd:x15(0xadea5195), rs2:x2(0x000000c8), imm:0x0
+ TEST_RI_OP(aes32dsmi, x15, x2, 0x0, 0x9a561fe1, 0xadea5195, 0x000000c8, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox32
+ // result rd:x16(0x187d4267), rs1=>rd:x16(0xd2ffbec1), rs2:x1(0x0000c900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x16, x1, 0x1, 0x187d4267, 0xd2ffbec1, 0x0000c900, x3, 4, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox32
+ // result rd:x17(0x3801186b), rs1=>rd:x17(0xa8e1a8bb), rs2:x31(0x00ca0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x17, x31, 0x2, 0x3801186b, 0xa8e1a8bb, 0x00ca0000, x3, 8, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox32
+ // result rd:x18(0x7bdc476c), rs1=>rd:x18(0x48c99fcb), rs2:x30(0xcb000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x18, x30, 0x3, 0x7bdc476c, 0x48c99fcb, 0xcb000000, x3, 12, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox32
+ // result rd:x19(0x0c8556be), rs1=>rd:x19(0x461d524f), rs2:x29(0x000000cc), imm:0x0
+ TEST_RI_OP(aes32dsmi, x19, x29, 0x0, 0x0c8556be, 0x461d524f, 0x000000cc, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox32
+ // result rd:x20(0x88665158), rs1=>rd:x20(0x528a10af), rs2:x28(0x0000cd00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x20, x28, 0x1, 0x88665158, 0x528a10af, 0x0000cd00, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox32
+ // result rd:x21(0x2ce4f593), rs1=>rd:x21(0xe19bfbc3), rs2:x27(0x00ce0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x21, x27, 0x2, 0x2ce4f593, 0xe19bfbc3, 0x00ce0000, x1, 4, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox32
+ // result rd:x22(0x67550451), rs1=>rd:x22(0x707af2c0), rs2:x26(0xcf000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x22, x26, 0x3, 0x67550451, 0x707af2c0, 0xcf000000, x1, 8, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox32
+ // result rd:x23(0x29ab5d2d), rs1=>rd:x23(0xa47d105b), rs2:x25(0x000000d0), imm:0x0
+ TEST_RI_OP(aes32dsmi, x23, x25, 0x0, 0x29ab5d2d, 0xa47d105b, 0x000000d0, x1, 12, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox32
+ // result rd:x24(0xb0ef924d), rs1=>rd:x24(0x121bcc23), rs2:x24(0x0000d100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x24, x24, 0x1, 0xb0ef924d, 0x121bcc23, 0x0000d100, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox32
+ // result rd:x25(0x072605d8), rs1=>rd:x25(0xadea5195), rs2:x23(0x00d20000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x25, x23, 0x2, 0x072605d8, 0xadea5195, 0x00d20000, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox32
+ // result rd:x26(0x3620ba57), rs1=>rd:x26(0xd2ffbec1), rs2:x22(0xd3000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x26, x22, 0x3, 0x3620ba57, 0xd2ffbec1, 0xd3000000, x1, 4, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox32
+ // result rd:x27(0x4b547925), rs1=>rd:x27(0xa8e1a8bb), rs2:x21(0x000000d4), imm:0x0
+ TEST_RI_OP(aes32dsmi, x27, x21, 0x0, 0x4b547925, 0xa8e1a8bb, 0x000000d4, x1, 8, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox32
+ // result rd:x28(0xc0a3d3d0), rs1=>rd:x28(0x48c99fcb), rs2:x20(0x0000d500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x28, x20, 0x1, 0xc0a3d3d0, 0x48c99fcb, 0x0000d500, x1, 12, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox32
+ // result rd:x29(0x6adcea50), rs1=>rd:x29(0x461d524f), rs2:x19(0x00d60000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x29, x19, 0x2, 0x6adcea50, 0x461d524f, 0x00d60000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox32
+ // result rd:x30(0x14f541ca), rs1=>rd:x30(0x528a10af), rs2:x18(0xd7000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x30, x18, 0x3, 0x14f541ca, 0x528a10af, 0xd7000000, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox32
+ // result rd:x31(0xe571a55e), rs1=>rd:x31(0xe19bfbc3), rs2:x17(0x000000d8), imm:0x0
+ TEST_RI_OP(aes32dsmi, x31, x17, 0x0, 0xe571a55e, 0xe19bfbc3, 0x000000d8, x4, 4, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox32
+ // result rd:x1(0x45f6f39d), rs1=>rd:x1(0x707af2c0), rs2:x16(0x0000d900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x1, 0x45f6f39d, 0x707af2c0, 0x0000d900, x4, 8, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox32
+ // result rd:x2(0x2387632f), rs1=>rd:x2(0xa47d105b), rs2:x15(0x00da0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x2, 0x2387632f, 0xa47d105b, 0x00da0000, x4, 12, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox32
+ // result rd:x3(0xe9358d28), rs1=>rd:x3(0x121bcc23), rs2:x14(0xdb000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x3, 0xe9358d28, 0x121bcc23, 0xdb000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox32
+ // result rd:x4(0xf7f73626), rs1=>rd:x4(0xadea5195), rs2:x13(0x000000dc), imm:0x0
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x0, 0xf7f73626, 0xadea5195, 0x000000dc, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox32
+ // result rd:x5(0x00242c93), rs1=>rd:x5(0xd2ffbec1), rs2:x12(0x0000dd00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x1, 0x00242c93, 0xd2ffbec1, 0x0000dd00, x1, 4, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox32
+ // result rd:x6(0xb8089bed), rs1=>rd:x6(0xa8e1a8bb), rs2:x11(0x00de0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x2, 0xb8089bed, 0xa8e1a8bb, 0x00de0000, x1, 8, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox32
+ // result rd:x7(0x25dad81d), rs1=>rd:x7(0x48c99fcb), rs2:x10(0xdf000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x3, 0x25dad81d, 0x48c99fcb, 0xdf000000, x1, 12, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox32
+ // result rd:x8(0xca7c85d5), rs1=>rd:x8(0x461d524f), rs2:x9(0x000000e0), imm:0x0
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x0, 0xca7c85d5, 0x461d524f, 0x000000e0, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox32
+ // result rd:x9(0x5e2b27d5), rs1=>rd:x9(0x528a10af), rs2:x8(0x0000e100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x9, x8, 0x1, 0x5e2b27d5, 0x528a10af, 0x0000e100, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox32
+ // result rd:x10(0x19c275d7), rs1=>rd:x10(0xe19bfbc3), rs2:x7(0x00e20000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x10, x7, 0x2, 0x19c275d7, 0xe19bfbc3, 0x00e20000, x1, 4, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox32
+ // result rd:x11(0x9bf3ced3), rs1=>rd:x11(0x707af2c0), rs2:x6(0xe3000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x11, x6, 0x3, 0x9bf3ced3, 0x707af2c0, 0xe3000000, x1, 8, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox32
+ // result rd:x12(0x4a5ab995), rs1=>rd:x12(0xa47d105b), rs2:x5(0x000000e4), imm:0x0
+ TEST_RI_OP(aes32dsmi, x12, x5, 0x0, 0x4a5ab995, 0xa47d105b, 0x000000e4, x1, 12, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox32
+ // result rd:x13(0xdb7a7b16), rs1=>rd:x13(0x121bcc23), rs2:x4(0x0000e500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x13, x4, 0x1, 0xdb7a7b16, 0x121bcc23, 0x0000e500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox32
+ // result rd:x14(0xb10bbc70), rs1=>rd:x14(0xadea5195), rs2:x3(0x00e60000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x14, x3, 0x2, 0xb10bbc70, 0xadea5195, 0x00e60000, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox32
+ // result rd:x15(0xa8c30f86), rs1=>rd:x15(0xd2ffbec1), rs2:x2(0xe7000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x15, x2, 0x3, 0xa8c30f86, 0xd2ffbec1, 0xe7000000, x4, 4, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox32
+ // result rd:x16(0xf13e7a27), rs1=>rd:x16(0xa8e1a8bb), rs2:x1(0x000000e8), imm:0x0
+ TEST_RI_OP(aes32dsmi, x16, x1, 0x0, 0xf13e7a27, 0xa8e1a8bb, 0x000000e8, x4, 8, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox32
+ // result rd:x17(0x3b3bcaf4), rs1=>rd:x17(0x48c99fcb), rs2:x31(0x0000e900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x17, x31, 0x1, 0x3b3bcaf4, 0x48c99fcb, 0x0000e900, x4, 12, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox32
+ // result rd:x18(0x52052b81), rs1=>rd:x18(0x461d524f), rs2:x30(0x00ea0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x18, x30, 0x2, 0x52052b81, 0x461d524f, 0x00ea0000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox32
+ // result rd:x19(0x21352768), rs1=>rd:x19(0x528a10af), rs2:x29(0xeb000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x19, x29, 0x3, 0x21352768, 0x528a10af, 0xeb000000, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox32
+ // result rd:x20(0x0b560c90), rs1=>rd:x20(0xe19bfbc3), rs2:x28(0x000000ec), imm:0x0
+ TEST_RI_OP(aes32dsmi, x20, x28, 0x0, 0x0b560c90, 0xe19bfbc3, 0x000000ec, x1, 4, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox32
+ // result rd:x21(0xda87ad9b), rs1=>rd:x21(0x707af2c0), rs2:x27(0x0000ed00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x21, x27, 0x1, 0xda87ad9b, 0x707af2c0, 0x0000ed00, x1, 8, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox32
+ // result rd:x22(0x99a20434), rs1=>rd:x22(0xa47d105b), rs2:x26(0x00ee0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x22, x26, 0x2, 0x99a20434, 0xa47d105b, 0x00ee0000, x1, 12, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox32
+ // result rd:x23(0x6a9d1767), rs1=>rd:x23(0x121bcc23), rs2:x25(0xef000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x23, x25, 0x3, 0x6a9d1767, 0x121bcc23, 0xef000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox32
+ // result rd:x24(0x81f3af3a), rs1=>rd:x24(0xadea5195), rs2:x24(0x000000f0), imm:0x0
+ TEST_RI_OP(aes32dsmi, x24, x24, 0x0, 0x81f3af3a, 0xadea5195, 0x000000f0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox32
+ // result rd:x25(0x169707ff), rs1=>rd:x25(0xd2ffbec1), rs2:x23(0x0000f100), imm:0x1
+ TEST_RI_OP(aes32dsmi, x25, x23, 0x1, 0x169707ff, 0xd2ffbec1, 0x0000f100, x1, 4, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox32
+ // result rd:x26(0x8cd9848f), rs1=>rd:x26(0xa8e1a8bb), rs2:x22(0x00f20000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x26, x22, 0x2, 0x8cd9848f, 0xa8e1a8bb, 0x00f20000, x1, 8, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox32
+ // result rd:x27(0x8a96df68), rs1=>rd:x27(0x48c99fcb), rs2:x21(0xf3000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x27, x21, 0x3, 0x8a96df68, 0x48c99fcb, 0xf3000000, x1, 12, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox32
+ // result rd:x28(0x34de4f59), rs1=>rd:x28(0x461d524f), rs2:x20(0x000000f4), imm:0x0
+ TEST_RI_OP(aes32dsmi, x28, x20, 0x0, 0x34de4f59, 0x461d524f, 0x000000f4, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox32
+ // result rd:x29(0x7768aca3), rs1=>rd:x29(0x528a10af), rs2:x19(0x0000f500), imm:0x1
+ TEST_RI_OP(aes32dsmi, x29, x19, 0x1, 0x7768aca3, 0x528a10af, 0x0000f500, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox32
+ // result rd:x30(0xddb3708a), rs1=>rd:x30(0xe19bfbc3), rs2:x18(0x00f60000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x30, x18, 0x2, 0xddb3708a, 0xe19bfbc3, 0x00f60000, x4, 4, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox32
+ // result rd:x31(0x8f3b67cd), rs1=>rd:x31(0x707af2c0), rs2:x17(0xf7000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x31, x17, 0x3, 0x8f3b67cd, 0x707af2c0, 0xf7000000, x4, 8, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox32
+ // result rd:x1(0xd57cb862), rs1=>rd:x1(0xa47d105b), rs2:x16(0x000000f8), imm:0x0
+ TEST_RI_OP(aes32dsmi, x1, x16, 0x0, 0xd57cb862, 0xa47d105b, 0x000000f8, x4, 12, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox32
+ // result rd:x2(0xa117c4fd), rs1=>rd:x2(0x121bcc23), rs2:x15(0x0000f900), imm:0x1
+ TEST_RI_OP(aes32dsmi, x2, x15, 0x1, 0xa117c4fd, 0x121bcc23, 0x0000f900, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox32
+ // result rd:x3(0x1932cd71), rs1=>rd:x3(0xadea5195), rs2:x14(0x00fa0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x3, x14, 0x2, 0x1932cd71, 0xadea5195, 0x00fa0000, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox32
+ // result rd:x4(0xb66f7f97), rs1=>rd:x4(0xd2ffbec1), rs2:x13(0xfb000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x4, x13, 0x3, 0xb66f7f97, 0xd2ffbec1, 0xfb000000, x1, 4, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox32
+ // result rd:x5(0xc96563c0), rs1=>rd:x5(0xa8e1a8bb), rs2:x12(0x000000fc), imm:0x0
+ TEST_RI_OP(aes32dsmi, x5, x12, 0x0, 0xc96563c0, 0xa8e1a8bb, 0x000000fc, x1, 8, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox32
+ // result rd:x6(0xfefb4abb), rs1=>rd:x6(0x48c99fcb), rs2:x11(0x0000fd00), imm:0x1
+ TEST_RI_OP(aes32dsmi, x6, x11, 0x1, 0xfefb4abb, 0x48c99fcb, 0x0000fd00, x1, 12, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox32
+ // result rd:x7(0x2a552613), rs1=>rd:x7(0x461d524f), rs2:x10(0x00fe0000), imm:0x2
+ TEST_RI_OP(aes32dsmi, x7, x10, 0x2, 0x2a552613, 0x461d524f, 0x00fe0000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox32
+ // result rd:x8(0x82c84717), rs1=>rd:x8(0x528a10af), rs2:x9(0xff000000), imm:0x3
+ TEST_RI_OP(aes32dsmi, x8, x9, 0x3, 0x82c84717, 0x528a10af, 0xff000000, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+signature_31_0:
+ .fill 5, 4, 0xdeadbeef
+signature_32_0:
+ .fill 5, 4, 0xdeadbeef
+signature_33_0:
+ .fill 5, 4, 0xdeadbeef
+signature_34_0:
+ .fill 5, 4, 0xdeadbeef
+signature_35_0:
+ .fill 5, 4, 0xdeadbeef
+signature_36_0:
+ .fill 5, 4, 0xdeadbeef
+signature_37_0:
+ .fill 5, 4, 0xdeadbeef
+signature_38_0:
+ .fill 5, 4, 0xdeadbeef
+signature_39_0:
+ .fill 5, 4, 0xdeadbeef
+signature_40_0:
+ .fill 5, 4, 0xdeadbeef
+signature_41_0:
+ .fill 5, 4, 0xdeadbeef
+signature_42_0:
+ .fill 5, 4, 0xdeadbeef
+signature_43_0:
+ .fill 5, 4, 0xdeadbeef
+signature_44_0:
+ .fill 5, 4, 0xdeadbeef
+signature_45_0:
+ .fill 5, 4, 0xdeadbeef
+signature_46_0:
+ .fill 5, 4, 0xdeadbeef
+signature_47_0:
+ .fill 5, 4, 0xdeadbeef
+signature_48_0:
+ .fill 5, 4, 0xdeadbeef
+signature_49_0:
+ .fill 5, 4, 0xdeadbeef
+signature_50_0:
+ .fill 5, 4, 0xdeadbeef
+signature_51_0:
+ .fill 5, 4, 0xdeadbeef
+signature_52_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/AES32ESI-01.S b/riscof/suite/rv32i_m/K_unratified/AES32ESI-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..8591b2a9b012700d5850dd97d25966f55f736f53
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/AES32ESI-01.S
@@ -0,0 +1,1053 @@
+// RISC-V Architectural Validation Test AES32ESI-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes32esi'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes32esi)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes32esi)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x64ea5195), rs1=>rd:x1(0xadea5195), rs2:x16(0x121bcc23), imm:0x3
+ TEST_RI_OP(aes32esi, x1, x16, 0x3, 0x64ea5195, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x9bffbec1), rs1=>rd:x2(0xd2ffbec1), rs2:x15(0xa47d105b), imm:0x3
+ TEST_RI_OP(aes32esi, x2, x15, 0x3, 0x9bffbec1, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xa8e1a801), rs1=>rd:x3(0xa8e1a8bb), rs2:x14(0x707af2c0), imm:0x0
+ TEST_RI_OP(aes32esi, x3, x14, 0x0, 0xa8e1a801, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xb0c99fcb), rs1=>rd:x4(0x48c99fcb), rs2:x13(0xe19bfbc3), imm:0x3
+ TEST_RI_OP(aes32esi, x4, x13, 0x3, 0xb0c99fcb, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x461d524f), rs1=>rd:x5(0x461d524f), rs2:x12(0x528a10af), imm:0x3
+ TEST_RI_OP(aes32esi, x5, x12, 0x3, 0x461d524f, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x088a10af), rs1=>rd:x6(0x528a10af), rs2:x11(0x461d524f), imm:0x3
+ TEST_RI_OP(aes32esi, x6, x11, 0x3, 0x088a10af, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xb39bfbc3), rs1=>rd:x7(0xe19bfbc3), rs2:x10(0x48c99fcb), imm:0x3
+ TEST_RI_OP(aes32esi, x7, x10, 0x3, 0xb39bfbc3, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xb27af2c0), rs1=>rd:x8(0x707af2c0), rs2:x9(0xa8e1a8bb), imm:0x3
+ TEST_RI_OP(aes32esi, x8, x9, 0x3, 0xb27af2c0, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xa47dbe5b), rs1=>rd:x9(0xa47d105b), rs2:x8(0xd2ffbec1), imm:0x1
+ TEST_RI_OP(aes32esi, x9, x8, 0x1, 0xa47dbe5b, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x121b1d23), rs1=>rd:x10(0x121bcc23), rs2:x7(0xadea5195), imm:0x1
+ TEST_RI_OP(aes32esi, x10, x7, 0x1, 0x121b1d23, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x16000001), rs1=>rd:x11(0x00000001), rs2:x6(0xffffffff), imm:0x3
+ TEST_RI_OP(aes32esi, x11, x6, 0x3, 0x16000001, 0x00000001, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00001602), rs1=>rd:x12(0x00000002), rs2:x5(0x7fffffff), imm:0x1
+ TEST_RI_OP(aes32esi, x12, x5, 0x1, 0x00001602, 0x00000002, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00160004), rs1=>rd:x13(0x00000004), rs2:x4(0xbfffffff), imm:0x2
+ TEST_RI_OP(aes32esi, x13, x4, 0x2, 0x00160004, 0x00000004, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000001e), rs1=>rd:x14(0x00000008), rs2:x3(0xdfffffff), imm:0x0
+ TEST_RI_OP(aes32esi, x14, x3, 0x0, 0x0000001e, 0x00000008, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00160010), rs1=>rd:x15(0x00000010), rs2:x2(0xefffffff), imm:0x2
+ TEST_RI_OP(aes32esi, x15, x2, 0x2, 0x00160010, 0x00000010, 0xefffffff, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x00001620), rs1=>rd:x16(0x00000020), rs2:x1(0xf7ffffff), imm:0x1
+ TEST_RI_OP(aes32esi, x16, x1, 0x1, 0x00001620, 0x00000020, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0f000040), rs1=>rd:x17(0x00000040), rs2:x31(0xfbffffff), imm:0x3
+ TEST_RI_OP(aes32esi, x17, x31, 0x3, 0x0f000040, 0x00000040, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x54000080), rs1=>rd:x18(0x00000080), rs2:x30(0xfdffffff), imm:0x3
+ TEST_RI_OP(aes32esi, x18, x30, 0x3, 0x54000080, 0x00000080, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00000116), rs1=>rd:x19(0x00000100), rs2:x29(0xfeffffff), imm:0x0
+ TEST_RI_OP(aes32esi, x19, x29, 0x0, 0x00000116, 0x00000100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x16000200), rs1=>rd:x20(0x00000200), rs2:x28(0xff7fffff), imm:0x3
+ TEST_RI_OP(aes32esi, x20, x28, 0x3, 0x16000200, 0x00000200, 0xff7fffff, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x16000400), rs1=>rd:x21(0x00000400), rs2:x27(0xffbfffff), imm:0x3
+ TEST_RI_OP(aes32esi, x21, x27, 0x3, 0x16000400, 0x00000400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x16000800), rs1=>rd:x22(0x00000800), rs2:x26(0xffdfffff), imm:0x3
+ TEST_RI_OP(aes32esi, x22, x26, 0x3, 0x16000800, 0x00000800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x16001000), rs1=>rd:x23(0x00001000), rs2:x25(0xffefffff), imm:0x3
+ TEST_RI_OP(aes32esi, x23, x25, 0x3, 0x16001000, 0x00001000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0xe9f7ffff), rs1=>rd:x24(0x00002000), rs2:x24(0xfff7ffff), imm:0x3
+ TEST_RI_OP(aes32esi, x24, x24, 0x3, 0xe9f7ffff, 0x00002000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00005600), rs1=>rd:x25(0x00004000), rs2:x23(0xfffbffff), imm:0x1
+ TEST_RI_OP(aes32esi, x25, x23, 0x1, 0x00005600, 0x00004000, 0xfffbffff, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00009600), rs1=>rd:x26(0x00008000), rs2:x22(0xfffdffff), imm:0x1
+ TEST_RI_OP(aes32esi, x26, x22, 0x1, 0x00009600, 0x00008000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x16010000), rs1=>rd:x27(0x00010000), rs2:x21(0xfffeffff), imm:0x3
+ TEST_RI_OP(aes32esi, x27, x21, 0x3, 0x16010000, 0x00010000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0002d200), rs1=>rd:x28(0x00020000), rs2:x20(0xffff7fff), imm:0x1
+ TEST_RI_OP(aes32esi, x28, x20, 0x1, 0x0002d200, 0x00020000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00120000), rs1=>rd:x29(0x00040000), rs2:x19(0xffffbfff), imm:0x2
+ TEST_RI_OP(aes32esi, x29, x19, 0x2, 0x00120000, 0x00040000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00080016), rs1=>rd:x30(0x00080000), rs2:x18(0xffffdfff), imm:0x0
+ TEST_RI_OP(aes32esi, x30, x18, 0x0, 0x00080016, 0x00080000, 0xffffdfff, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00060000), rs1=>rd:x31(0x00100000), rs2:x17(0xffffefff), imm:0x2
+ TEST_RI_OP(aes32esi, x31, x17, 0x2, 0x00060000, 0x00100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00206800), rs1=>rd:x1(0x00200000), rs2:x16(0xfffff7ff), imm:0x1
+ TEST_RI_OP(aes32esi, x1, x16, 0x1, 0x00206800, 0x00200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x16400000), rs1=>rd:x2(0x00400000), rs2:x15(0xfffffbff), imm:0x3
+ TEST_RI_OP(aes32esi, x2, x15, 0x3, 0x16400000, 0x00400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x16800000), rs1=>rd:x3(0x00800000), rs2:x14(0xfffffdff), imm:0x3
+ TEST_RI_OP(aes32esi, x3, x14, 0x3, 0x16800000, 0x00800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x01000016), rs1=>rd:x4(0x01000000), rs2:x13(0xfffffeff), imm:0x0
+ TEST_RI_OP(aes32esi, x4, x13, 0x0, 0x01000016, 0x01000000, 0xfffffeff, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x14000000), rs1=>rd:x5(0x02000000), rs2:x12(0xffffff7f), imm:0x3
+ TEST_RI_OP(aes32esi, x5, x12, 0x3, 0x14000000, 0x02000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x12000000), rs1=>rd:x6(0x04000000), rs2:x11(0xffffffbf), imm:0x3
+ TEST_RI_OP(aes32esi, x6, x11, 0x3, 0x12000000, 0x04000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x1e000000), rs1=>rd:x7(0x08000000), rs2:x10(0xffffffdf), imm:0x3
+ TEST_RI_OP(aes32esi, x7, x10, 0x3, 0x1e000000, 0x08000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x06000000), rs1=>rd:x8(0x10000000), rs2:x9(0xffffffef), imm:0x3
+ TEST_RI_OP(aes32esi, x8, x9, 0x3, 0x06000000, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x36000000), rs1=>rd:x9(0x20000000), rs2:x8(0xfffffff7), imm:0x3
+ TEST_RI_OP(aes32esi, x9, x8, 0x3, 0x36000000, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x40001600), rs1=>rd:x10(0x40000000), rs2:x7(0xfffffffb), imm:0x1
+ TEST_RI_OP(aes32esi, x10, x7, 0x1, 0x40001600, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x80001600), rs1=>rd:x11(0x80000000), rs2:x6(0xfffffffd), imm:0x1
+ TEST_RI_OP(aes32esi, x11, x6, 0x1, 0x80001600, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x16000000), rs1=>rd:x12(0x00000000), rs2:x5(0xfffffffe), imm:0x3
+ TEST_RI_OP(aes32esi, x12, x5, 0x3, 0x16000000, 0x00000000, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xffff9cfe), rs1=>rd:x13(0xfffffffe), rs2:x4(0x00000000), imm:0x1
+ TEST_RI_OP(aes32esi, x13, x4, 0x1, 0xffff9cfe, 0xfffffffe, 0x00000000, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xff9cfffd), rs1=>rd:x14(0xfffffffd), rs2:x3(0x80000000), imm:0x2
+ TEST_RI_OP(aes32esi, x14, x3, 0x2, 0xff9cfffd, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xffffff98), rs1=>rd:x15(0xfffffffb), rs2:x2(0x40000000), imm:0x0
+ TEST_RI_OP(aes32esi, x15, x2, 0x0, 0xffffff98, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xff9cfff7), rs1=>rd:x16(0xfffffff7), rs2:x1(0x20000000), imm:0x2
+ TEST_RI_OP(aes32esi, x16, x1, 0x2, 0xff9cfff7, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xffff9cef), rs1=>rd:x17(0xffffffef), rs2:x31(0x10000000), imm:0x1
+ TEST_RI_OP(aes32esi, x17, x31, 0x1, 0xffff9cef, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xcfffffdf), rs1=>rd:x18(0xffffffdf), rs2:x30(0x08000000), imm:0x3
+ TEST_RI_OP(aes32esi, x18, x30, 0x3, 0xcfffffdf, 0xffffffdf, 0x08000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0dffffbf), rs1=>rd:x19(0xffffffbf), rs2:x29(0x04000000), imm:0x3
+ TEST_RI_OP(aes32esi, x19, x29, 0x3, 0x0dffffbf, 0xffffffbf, 0x04000000, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xffffff1c), rs1=>rd:x20(0xffffff7f), rs2:x28(0x02000000), imm:0x0
+ TEST_RI_OP(aes32esi, x20, x28, 0x0, 0xffffff1c, 0xffffff7f, 0x02000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x83fffeff), rs1=>rd:x21(0xfffffeff), rs2:x27(0x01000000), imm:0x3
+ TEST_RI_OP(aes32esi, x21, x27, 0x3, 0x83fffeff, 0xfffffeff, 0x01000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x9cfffdff), rs1=>rd:x22(0xfffffdff), rs2:x26(0x00800000), imm:0x3
+ TEST_RI_OP(aes32esi, x22, x26, 0x3, 0x9cfffdff, 0xfffffdff, 0x00800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x9cfffbff), rs1=>rd:x23(0xfffffbff), rs2:x25(0x00400000), imm:0x3
+ TEST_RI_OP(aes32esi, x23, x25, 0x3, 0x9cfffbff, 0xfffffbff, 0x00400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x63200000), rs1=>rd:x24(0xfffff7ff), rs2:x24(0x00200000), imm:0x3
+ TEST_RI_OP(aes32esi, x24, x24, 0x3, 0x63200000, 0xfffff7ff, 0x00200000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x9cffefff), rs1=>rd:x25(0xffffefff), rs2:x23(0x00100000), imm:0x3
+ TEST_RI_OP(aes32esi, x25, x23, 0x3, 0x9cffefff, 0xffffefff, 0x00100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xffffbcff), rs1=>rd:x26(0xffffdfff), rs2:x22(0x00080000), imm:0x1
+ TEST_RI_OP(aes32esi, x26, x22, 0x1, 0xffffbcff, 0xffffdfff, 0x00080000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xffffdcff), rs1=>rd:x27(0xffffbfff), rs2:x21(0x00040000), imm:0x1
+ TEST_RI_OP(aes32esi, x27, x21, 0x1, 0xffffdcff, 0xffffbfff, 0x00040000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x9cff7fff), rs1=>rd:x28(0xffff7fff), rs2:x20(0x00020000), imm:0x3
+ TEST_RI_OP(aes32esi, x28, x20, 0x3, 0x9cff7fff, 0xffff7fff, 0x00020000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xfffe9cff), rs1=>rd:x29(0xfffeffff), rs2:x19(0x00010000), imm:0x1
+ TEST_RI_OP(aes32esi, x29, x19, 0x1, 0xfffe9cff, 0xfffeffff, 0x00010000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xff9effff), rs1=>rd:x30(0xfffdffff), rs2:x18(0x00008000), imm:0x2
+ TEST_RI_OP(aes32esi, x30, x18, 0x2, 0xff9effff, 0xfffdffff, 0x00008000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xfffbff9c), rs1=>rd:x31(0xfffbffff), rs2:x17(0x00004000), imm:0x0
+ TEST_RI_OP(aes32esi, x31, x17, 0x0, 0xfffbff9c, 0xfffbffff, 0x00004000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xff94ffff), rs1=>rd:x1(0xfff7ffff), rs2:x16(0x00002000), imm:0x2
+ TEST_RI_OP(aes32esi, x1, x16, 0x2, 0xff94ffff, 0xfff7ffff, 0x00002000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xffef35ff), rs1=>rd:x2(0xffefffff), rs2:x15(0x00001000), imm:0x1
+ TEST_RI_OP(aes32esi, x2, x15, 0x1, 0xffef35ff, 0xffefffff, 0x00001000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x9cdfffff), rs1=>rd:x3(0xffdfffff), rs2:x14(0x00000800), imm:0x3
+ TEST_RI_OP(aes32esi, x3, x14, 0x3, 0x9cdfffff, 0xffdfffff, 0x00000800, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x9cbfffff), rs1=>rd:x4(0xffbfffff), rs2:x13(0x00000400), imm:0x3
+ TEST_RI_OP(aes32esi, x4, x13, 0x3, 0x9cbfffff, 0xffbfffff, 0x00000400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xff7fff9c), rs1=>rd:x5(0xff7fffff), rs2:x12(0x00000200), imm:0x0
+ TEST_RI_OP(aes32esi, x5, x12, 0x0, 0xff7fff9c, 0xff7fffff, 0x00000200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xfeffff9c), rs1=>rd:x6(0xfeffffff), rs2:x11(0x00000100), imm:0x0
+ TEST_RI_OP(aes32esi, x6, x11, 0x0, 0xfeffff9c, 0xfeffffff, 0x00000100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfdffff32), rs1=>rd:x7(0xfdffffff), rs2:x10(0x00000080), imm:0x0
+ TEST_RI_OP(aes32esi, x7, x10, 0x0, 0xfdffff32, 0xfdffffff, 0x00000080, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xfbfffff6), rs1=>rd:x8(0xfbffffff), rs2:x9(0x00000040), imm:0x0
+ TEST_RI_OP(aes32esi, x8, x9, 0x0, 0xfbfffff6, 0xfbffffff, 0x00000040, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xf7ffff48), rs1=>rd:x9(0xf7ffffff), rs2:x8(0x00000020), imm:0x0
+ TEST_RI_OP(aes32esi, x9, x8, 0x0, 0xf7ffff48, 0xf7ffffff, 0x00000020, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xefffff35), rs1=>rd:x10(0xefffffff), rs2:x7(0x00000010), imm:0x0
+ TEST_RI_OP(aes32esi, x10, x7, 0x0, 0xefffff35, 0xefffffff, 0x00000010, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xdfffffcf), rs1=>rd:x11(0xdfffffff), rs2:x6(0x00000008), imm:0x0
+ TEST_RI_OP(aes32esi, x11, x6, 0x0, 0xdfffffcf, 0xdfffffff, 0x00000008, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xbfffff0d), rs1=>rd:x12(0xbfffffff), rs2:x5(0x00000004), imm:0x0
+ TEST_RI_OP(aes32esi, x12, x5, 0x0, 0xbfffff0d, 0xbfffffff, 0x00000004, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x7fffff88), rs1=>rd:x13(0x7fffffff), rs2:x4(0x00000002), imm:0x0
+ TEST_RI_OP(aes32esi, x13, x4, 0x0, 0x7fffff88, 0x7fffffff, 0x00000002, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffff83), rs1=>rd:x14(0xffffffff), rs2:x3(0x00000001), imm:0x0
+ TEST_RI_OP(aes32esi, x14, x3, 0x0, 0xffffff83, 0xffffffff, 0x00000001, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000062), rs1=>rd:x15(0x00000001), rs2:x2(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x15, x2, 0x0, 0x00000062, 0x00000001, 0x00000000, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000061), rs1=>rd:x16(0x00000002), rs2:x1(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x16, x1, 0x0, 0x00000061, 0x00000002, 0x00000000, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000067), rs1=>rd:x17(0x00000004), rs2:x31(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x17, x31, 0x0, 0x00000067, 0x00000004, 0x00000000, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x0000006b), rs1=>rd:x18(0x00000008), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x18, x30, 0x0, 0x0000006b, 0x00000008, 0x00000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000073), rs1=>rd:x19(0x00000010), rs2:x29(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x19, x29, 0x0, 0x00000073, 0x00000010, 0x00000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000043), rs1=>rd:x20(0x00000020), rs2:x28(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x20, x28, 0x0, 0x00000043, 0x00000020, 0x00000000, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000023), rs1=>rd:x21(0x00000040), rs2:x27(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x21, x27, 0x0, 0x00000023, 0x00000040, 0x00000000, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x000000e3), rs1=>rd:x22(0x00000080), rs2:x26(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x22, x26, 0x0, 0x000000e3, 0x00000080, 0x00000000, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000163), rs1=>rd:x23(0x00000100), rs2:x25(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x23, x25, 0x0, 0x00000163, 0x00000100, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000063), rs1=>rd:x24(0x00000200), rs2:x24(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x24, x24, 0x0, 0x00000063, 0x00000200, 0x00000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000463), rs1=>rd:x25(0x00000400), rs2:x23(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x25, x23, 0x0, 0x00000463, 0x00000400, 0x00000000, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000863), rs1=>rd:x26(0x00000800), rs2:x22(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x26, x22, 0x0, 0x00000863, 0x00000800, 0x00000000, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00001063), rs1=>rd:x27(0x00001000), rs2:x21(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x27, x21, 0x0, 0x00001063, 0x00001000, 0x00000000, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00002063), rs1=>rd:x28(0x00002000), rs2:x20(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x28, x20, 0x0, 0x00002063, 0x00002000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00004063), rs1=>rd:x29(0x00004000), rs2:x19(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x29, x19, 0x0, 0x00004063, 0x00004000, 0x00000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00008063), rs1=>rd:x30(0x00008000), rs2:x18(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x30, x18, 0x0, 0x00008063, 0x00008000, 0x00000000, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00010063), rs1=>rd:x31(0x00010000), rs2:x17(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x31, x17, 0x0, 0x00010063, 0x00010000, 0x00000000, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00020063), rs1=>rd:x1(0x00020000), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x1, x16, 0x0, 0x00020063, 0x00020000, 0x00000000, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00040063), rs1=>rd:x2(0x00040000), rs2:x15(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x2, x15, 0x0, 0x00040063, 0x00040000, 0x00000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00080063), rs1=>rd:x3(0x00080000), rs2:x14(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x3, x14, 0x0, 0x00080063, 0x00080000, 0x00000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00100063), rs1=>rd:x4(0x00100000), rs2:x13(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x4, x13, 0x0, 0x00100063, 0x00100000, 0x00000000, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00200063), rs1=>rd:x5(0x00200000), rs2:x12(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x5, x12, 0x0, 0x00200063, 0x00200000, 0x00000000, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00400063), rs1=>rd:x6(0x00400000), rs2:x11(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x6, x11, 0x0, 0x00400063, 0x00400000, 0x00000000, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00800063), rs1=>rd:x7(0x00800000), rs2:x10(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x7, x10, 0x0, 0x00800063, 0x00800000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x01000063), rs1=>rd:x8(0x01000000), rs2:x9(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x8, x9, 0x0, 0x01000063, 0x01000000, 0x00000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x02000063), rs1=>rd:x9(0x02000000), rs2:x8(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x9, x8, 0x0, 0x02000063, 0x02000000, 0x00000000, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x04000063), rs1=>rd:x10(0x04000000), rs2:x7(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x10, x7, 0x0, 0x04000063, 0x04000000, 0x00000000, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x08000063), rs1=>rd:x11(0x08000000), rs2:x6(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x11, x6, 0x0, 0x08000063, 0x08000000, 0x00000000, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x10000063), rs1=>rd:x12(0x10000000), rs2:x5(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x12, x5, 0x0, 0x10000063, 0x10000000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x20000063), rs1=>rd:x13(0x20000000), rs2:x4(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x13, x4, 0x0, 0x20000063, 0x20000000, 0x00000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x40000063), rs1=>rd:x14(0x40000000), rs2:x3(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x14, x3, 0x0, 0x40000063, 0x40000000, 0x00000000, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x80000063), rs1=>rd:x15(0x80000000), rs2:x2(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x15, x2, 0x0, 0x80000063, 0x80000000, 0x00000000, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000063), rs1=>rd:x16(0x00000000), rs2:x1(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x16, x1, 0x0, 0x00000063, 0x00000000, 0x00000000, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xffffff9d), rs1=>rd:x17(0xfffffffe), rs2:x31(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x17, x31, 0x0, 0xffffff9d, 0xfffffffe, 0x00000000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xffffff9e), rs1=>rd:x18(0xfffffffd), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x18, x30, 0x0, 0xffffff9e, 0xfffffffd, 0x00000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffff98), rs1=>rd:x19(0xfffffffb), rs2:x29(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x19, x29, 0x0, 0xffffff98, 0xfffffffb, 0x00000000, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffff94), rs1=>rd:x20(0xfffffff7), rs2:x28(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x20, x28, 0x0, 0xffffff94, 0xfffffff7, 0x00000000, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffff8c), rs1=>rd:x21(0xffffffef), rs2:x27(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x21, x27, 0x0, 0xffffff8c, 0xffffffef, 0x00000000, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffbc), rs1=>rd:x22(0xffffffdf), rs2:x26(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x22, x26, 0x0, 0xffffffbc, 0xffffffdf, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffdc), rs1=>rd:x23(0xffffffbf), rs2:x25(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x23, x25, 0x0, 0xffffffdc, 0xffffffbf, 0x00000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000063), rs1=>rd:x24(0xffffff7f), rs2:x24(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x24, x24, 0x0, 0x00000063, 0xffffff7f, 0x00000000, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfffffe9c), rs1=>rd:x25(0xfffffeff), rs2:x23(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x25, x23, 0x0, 0xfffffe9c, 0xfffffeff, 0x00000000, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfffffd9c), rs1=>rd:x26(0xfffffdff), rs2:x22(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x26, x22, 0x0, 0xfffffd9c, 0xfffffdff, 0x00000000, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xfffffb9c), rs1=>rd:x27(0xfffffbff), rs2:x21(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x27, x21, 0x0, 0xfffffb9c, 0xfffffbff, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfffff79c), rs1=>rd:x28(0xfffff7ff), rs2:x20(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x28, x20, 0x0, 0xfffff79c, 0xfffff7ff, 0x00000000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffef9c), rs1=>rd:x29(0xffffefff), rs2:x19(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x29, x19, 0x0, 0xffffef9c, 0xffffefff, 0x00000000, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffdf9c), rs1=>rd:x30(0xffffdfff), rs2:x18(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x30, x18, 0x0, 0xffffdf9c, 0xffffdfff, 0x00000000, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffbf9c), rs1=>rd:x31(0xffffbfff), rs2:x17(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x31, x17, 0x0, 0xffffbf9c, 0xffffbfff, 0x00000000, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffff7f9c), rs1=>rd:x1(0xffff7fff), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x1, x16, 0x0, 0xffff7f9c, 0xffff7fff, 0x00000000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffeff9c), rs1=>rd:x2(0xfffeffff), rs2:x15(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x2, x15, 0x0, 0xfffeff9c, 0xfffeffff, 0x00000000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfffdff9c), rs1=>rd:x3(0xfffdffff), rs2:x14(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x3, x14, 0x0, 0xfffdff9c, 0xfffdffff, 0x00000000, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfffbff9c), rs1=>rd:x4(0xfffbffff), rs2:x13(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x4, x13, 0x0, 0xfffbff9c, 0xfffbffff, 0x00000000, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfff7ff9c), rs1=>rd:x5(0xfff7ffff), rs2:x12(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x5, x12, 0x0, 0xfff7ff9c, 0xfff7ffff, 0x00000000, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffefff9c), rs1=>rd:x6(0xffefffff), rs2:x11(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x6, x11, 0x0, 0xffefff9c, 0xffefffff, 0x00000000, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffdfff9c), rs1=>rd:x7(0xffdfffff), rs2:x10(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x7, x10, 0x0, 0xffdfff9c, 0xffdfffff, 0x00000000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffbfff9c), rs1=>rd:x8(0xffbfffff), rs2:x9(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x8, x9, 0x0, 0xffbfff9c, 0xffbfffff, 0x00000000, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x9c7fffff), rs1=>rd:x9(0xff7fffff), rs2:x8(0x00000000), imm:0x3
+ TEST_RI_OP(aes32esi, x9, x8, 0x3, 0x9c7fffff, 0xff7fffff, 0x00000000, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x9dffffff), rs1=>rd:x10(0xfeffffff), rs2:x7(0x00000000), imm:0x3
+ TEST_RI_OP(aes32esi, x10, x7, 0x3, 0x9dffffff, 0xfeffffff, 0x00000000, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x9effffff), rs1=>rd:x11(0xfdffffff), rs2:x6(0x00000000), imm:0x3
+ TEST_RI_OP(aes32esi, x11, x6, 0x3, 0x9effffff, 0xfdffffff, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x98ffffff), rs1=>rd:x12(0xfbffffff), rs2:x5(0x00000000), imm:0x3
+ TEST_RI_OP(aes32esi, x12, x5, 0x3, 0x98ffffff, 0xfbffffff, 0x00000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xf7ff9cff), rs1=>rd:x13(0xf7ffffff), rs2:x4(0x00000000), imm:0x1
+ TEST_RI_OP(aes32esi, x13, x4, 0x1, 0xf7ff9cff, 0xf7ffffff, 0x00000000, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xefff9cff), rs1=>rd:x14(0xefffffff), rs2:x3(0x00000000), imm:0x1
+ TEST_RI_OP(aes32esi, x14, x3, 0x1, 0xefff9cff, 0xefffffff, 0x00000000, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xbcffffff), rs1=>rd:x15(0xdfffffff), rs2:x2(0x00000000), imm:0x3
+ TEST_RI_OP(aes32esi, x15, x2, 0x3, 0xbcffffff, 0xdfffffff, 0x00000000, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xbfff9cff), rs1=>rd:x16(0xbfffffff), rs2:x1(0x00000000), imm:0x1
+ TEST_RI_OP(aes32esi, x16, x1, 0x1, 0xbfff9cff, 0xbfffffff, 0x00000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x7f9cffff), rs1=>rd:x17(0x7fffffff), rs2:x31(0x00000000), imm:0x2
+ TEST_RI_OP(aes32esi, x17, x31, 0x2, 0x7f9cffff, 0x7fffffff, 0x00000000, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffff9c), rs1=>rd:x18(0xffffffff), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x18, x30, 0x0, 0xffffff9c, 0xffffffff, 0x00000000, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0xad455195), rs1=>rd:x19(0xadea5195), rs2:x29(0x121bcc23), imm:0x2
+ TEST_RI_OP(aes32esi, x19, x29, 0x2, 0xad455195, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1=>rd:x0(0xd2ffbec1), rs2:x28(0xa47d105b), imm:0x1
+ TEST_RI_OP(aes32esi, x0, x28, 0x1, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xcbe1a8bb), rs1=>rd:x21(0xa8e1a8bb), rs2:x0(0x707af2c0), imm:0x3
+ TEST_RI_OP(aes32esi, x21, x0, 0x3, 0xcbe1a8bb, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with random values
+ // result rd:x22(0xb0c99fcb), rs1=>rd:x22(0x48c99fcb), rs2:x26(0xe19bfbc3), imm:0x3
+ TEST_RI_OP(aes32esi, x22, x26, 0x3, 0xb0c99fcb, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/AES32ESI-02.S b/riscof/suite/rv32i_m/K_unratified/AES32ESI-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..e459caee7b0d7eaa6e15db9f79b3b3f7adbdb601
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/AES32ESI-02.S
@@ -0,0 +1,1780 @@
+// RISC-V Architectural Validation Test AES32ESI-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes32esi'.
+// Using dataset: sbox32
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes32esi)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes32esi)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox32
+ // result rd:x1(0xadea51f6), rs1=>rd:x1(0xadea5195), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esi, x1, x16, 0x0, 0xadea51f6, 0xadea5195, 0x00000000, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox32
+ // result rd:x2(0xd2ffc2c1), rs1=>rd:x2(0xd2ffbec1), rs2:x15(0x00000100), imm:0x1
+ TEST_RI_OP(aes32esi, x2, x15, 0x1, 0xd2ffc2c1, 0xd2ffbec1, 0x00000100, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox32
+ // result rd:x3(0xa896a8bb), rs1=>rd:x3(0xa8e1a8bb), rs2:x14(0x00020000), imm:0x2
+ TEST_RI_OP(aes32esi, x3, x14, 0x2, 0xa896a8bb, 0xa8e1a8bb, 0x00020000, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox32
+ // result rd:x4(0x33c99fcb), rs1=>rd:x4(0x48c99fcb), rs2:x13(0x03000000), imm:0x3
+ TEST_RI_OP(aes32esi, x4, x13, 0x3, 0x33c99fcb, 0x48c99fcb, 0x03000000, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox32
+ // result rd:x5(0x461d52bd), rs1=>rd:x5(0x461d524f), rs2:x12(0x00000004), imm:0x0
+ TEST_RI_OP(aes32esi, x5, x12, 0x0, 0x461d52bd, 0x461d524f, 0x00000004, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox32
+ // result rd:x6(0x528a7baf), rs1=>rd:x6(0x528a10af), rs2:x11(0x00000500), imm:0x1
+ TEST_RI_OP(aes32esi, x6, x11, 0x1, 0x528a7baf, 0x528a10af, 0x00000500, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox32
+ // result rd:x7(0xe1f4fbc3), rs1=>rd:x7(0xe19bfbc3), rs2:x10(0x00060000), imm:0x2
+ TEST_RI_OP(aes32esi, x7, x10, 0x2, 0xe1f4fbc3, 0xe19bfbc3, 0x00060000, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox32
+ // result rd:x8(0xb57af2c0), rs1=>rd:x8(0x707af2c0), rs2:x9(0x07000000), imm:0x3
+ TEST_RI_OP(aes32esi, x8, x9, 0x3, 0xb57af2c0, 0x707af2c0, 0x07000000, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox32
+ // result rd:x9(0xa47d106b), rs1=>rd:x9(0xa47d105b), rs2:x8(0x00000008), imm:0x0
+ TEST_RI_OP(aes32esi, x9, x8, 0x0, 0xa47d106b, 0xa47d105b, 0x00000008, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox32
+ // result rd:x10(0x121bcd23), rs1=>rd:x10(0x121bcc23), rs2:x7(0x00000900), imm:0x1
+ TEST_RI_OP(aes32esi, x10, x7, 0x1, 0x121bcd23, 0x121bcc23, 0x00000900, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox32
+ // result rd:x11(0xad8d5195), rs1=>rd:x11(0xadea5195), rs2:x6(0x000a0000), imm:0x2
+ TEST_RI_OP(aes32esi, x11, x6, 0x2, 0xad8d5195, 0xadea5195, 0x000a0000, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox32
+ // result rd:x12(0xf9ffbec1), rs1=>rd:x12(0xd2ffbec1), rs2:x5(0x0b000000), imm:0x3
+ TEST_RI_OP(aes32esi, x12, x5, 0x3, 0xf9ffbec1, 0xd2ffbec1, 0x0b000000, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox32
+ // result rd:x13(0xa8e1a845), rs1=>rd:x13(0xa8e1a8bb), rs2:x4(0x0000000c), imm:0x0
+ TEST_RI_OP(aes32esi, x13, x4, 0x0, 0xa8e1a845, 0xa8e1a8bb, 0x0000000c, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox32
+ // result rd:x14(0x48c948cb), rs1=>rd:x14(0x48c99fcb), rs2:x3(0x00000d00), imm:0x1
+ TEST_RI_OP(aes32esi, x14, x3, 0x1, 0x48c948cb, 0x48c99fcb, 0x00000d00, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox32
+ // result rd:x15(0x46b6524f), rs1=>rd:x15(0x461d524f), rs2:x2(0x000e0000), imm:0x2
+ TEST_RI_OP(aes32esi, x15, x2, 0x2, 0x46b6524f, 0x461d524f, 0x000e0000, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox32
+ // result rd:x16(0x248a10af), rs1=>rd:x16(0x528a10af), rs2:x1(0x0f000000), imm:0x3
+ TEST_RI_OP(aes32esi, x16, x1, 0x3, 0x248a10af, 0x528a10af, 0x0f000000, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox32
+ // result rd:x17(0xe19bfb09), rs1=>rd:x17(0xe19bfbc3), rs2:x31(0x00000010), imm:0x0
+ TEST_RI_OP(aes32esi, x17, x31, 0x0, 0xe19bfb09, 0xe19bfbc3, 0x00000010, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox32
+ // result rd:x18(0x707a70c0), rs1=>rd:x18(0x707af2c0), rs2:x30(0x00001100), imm:0x1
+ TEST_RI_OP(aes32esi, x18, x30, 0x1, 0x707a70c0, 0x707af2c0, 0x00001100, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox32
+ // result rd:x19(0xa4b4105b), rs1=>rd:x19(0xa47d105b), rs2:x29(0x00120000), imm:0x2
+ TEST_RI_OP(aes32esi, x19, x29, 0x2, 0xa4b4105b, 0xa47d105b, 0x00120000, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox32
+ // result rd:x20(0x6f1bcc23), rs1=>rd:x20(0x121bcc23), rs2:x28(0x13000000), imm:0x3
+ TEST_RI_OP(aes32esi, x20, x28, 0x3, 0x6f1bcc23, 0x121bcc23, 0x13000000, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox32
+ // result rd:x21(0xadea516f), rs1=>rd:x21(0xadea5195), rs2:x27(0x00000014), imm:0x0
+ TEST_RI_OP(aes32esi, x21, x27, 0x0, 0xadea516f, 0xadea5195, 0x00000014, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox32
+ // result rd:x22(0xd2ffe7c1), rs1=>rd:x22(0xd2ffbec1), rs2:x26(0x00001500), imm:0x1
+ TEST_RI_OP(aes32esi, x22, x26, 0x1, 0xd2ffe7c1, 0xd2ffbec1, 0x00001500, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox32
+ // result rd:x23(0xa8a6a8bb), rs1=>rd:x23(0xa8e1a8bb), rs2:x25(0x00160000), imm:0x2
+ TEST_RI_OP(aes32esi, x23, x25, 0x2, 0xa8a6a8bb, 0xa8e1a8bb, 0x00160000, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox32
+ // result rd:x24(0xe7000000), rs1=>rd:x24(0x48c99fcb), rs2:x24(0x17000000), imm:0x3
+ TEST_RI_OP(aes32esi, x24, x24, 0x3, 0xe7000000, 0x48c99fcb, 0x17000000, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox32
+ // result rd:x25(0x461d52e2), rs1=>rd:x25(0x461d524f), rs2:x23(0x00000018), imm:0x0
+ TEST_RI_OP(aes32esi, x25, x23, 0x0, 0x461d52e2, 0x461d524f, 0x00000018, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox32
+ // result rd:x26(0x528ac4af), rs1=>rd:x26(0x528a10af), rs2:x22(0x00001900), imm:0x1
+ TEST_RI_OP(aes32esi, x26, x22, 0x1, 0x528ac4af, 0x528a10af, 0x00001900, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox32
+ // result rd:x27(0xe139fbc3), rs1=>rd:x27(0xe19bfbc3), rs2:x21(0x001a0000), imm:0x2
+ TEST_RI_OP(aes32esi, x27, x21, 0x2, 0xe139fbc3, 0xe19bfbc3, 0x001a0000, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox32
+ // result rd:x28(0xdf7af2c0), rs1=>rd:x28(0x707af2c0), rs2:x20(0x1b000000), imm:0x3
+ TEST_RI_OP(aes32esi, x28, x20, 0x3, 0xdf7af2c0, 0x707af2c0, 0x1b000000, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox32
+ // result rd:x29(0xa47d10c7), rs1=>rd:x29(0xa47d105b), rs2:x19(0x0000001c), imm:0x0
+ TEST_RI_OP(aes32esi, x29, x19, 0x0, 0xa47d10c7, 0xa47d105b, 0x0000001c, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox32
+ // result rd:x30(0x121b6823), rs1=>rd:x30(0x121bcc23), rs2:x18(0x00001d00), imm:0x1
+ TEST_RI_OP(aes32esi, x30, x18, 0x1, 0x121b6823, 0x121bcc23, 0x00001d00, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox32
+ // result rd:x31(0xad985195), rs1=>rd:x31(0xadea5195), rs2:x17(0x001e0000), imm:0x2
+ TEST_RI_OP(aes32esi, x31, x17, 0x2, 0xad985195, 0xadea5195, 0x001e0000, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox32
+ // result rd:x1(0x12ffbec1), rs1=>rd:x1(0xd2ffbec1), rs2:x16(0x1f000000), imm:0x3
+ TEST_RI_OP(aes32esi, x1, x16, 0x3, 0x12ffbec1, 0xd2ffbec1, 0x1f000000, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox32
+ // result rd:x2(0xa8e1a80c), rs1=>rd:x2(0xa8e1a8bb), rs2:x15(0x00000020), imm:0x0
+ TEST_RI_OP(aes32esi, x2, x15, 0x0, 0xa8e1a80c, 0xa8e1a8bb, 0x00000020, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox32
+ // result rd:x3(0x48c962cb), rs1=>rd:x3(0x48c99fcb), rs2:x14(0x00002100), imm:0x1
+ TEST_RI_OP(aes32esi, x3, x14, 0x1, 0x48c962cb, 0x48c99fcb, 0x00002100, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox32
+ // result rd:x4(0x468e524f), rs1=>rd:x4(0x461d524f), rs2:x13(0x00220000), imm:0x2
+ TEST_RI_OP(aes32esi, x4, x13, 0x2, 0x468e524f, 0x461d524f, 0x00220000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox32
+ // result rd:x5(0x748a10af), rs1=>rd:x5(0x528a10af), rs2:x12(0x23000000), imm:0x3
+ TEST_RI_OP(aes32esi, x5, x12, 0x3, 0x748a10af, 0x528a10af, 0x23000000, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox32
+ // result rd:x6(0xe19bfbf5), rs1=>rd:x6(0xe19bfbc3), rs2:x11(0x00000024), imm:0x0
+ TEST_RI_OP(aes32esi, x6, x11, 0x0, 0xe19bfbf5, 0xe19bfbc3, 0x00000024, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox32
+ // result rd:x7(0x707acdc0), rs1=>rd:x7(0x707af2c0), rs2:x10(0x00002500), imm:0x1
+ TEST_RI_OP(aes32esi, x7, x10, 0x1, 0x707acdc0, 0x707af2c0, 0x00002500, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox32
+ // result rd:x8(0xa48a105b), rs1=>rd:x8(0xa47d105b), rs2:x9(0x00260000), imm:0x2
+ TEST_RI_OP(aes32esi, x8, x9, 0x2, 0xa48a105b, 0xa47d105b, 0x00260000, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox32
+ // result rd:x9(0xde1bcc23), rs1=>rd:x9(0x121bcc23), rs2:x8(0x27000000), imm:0x3
+ TEST_RI_OP(aes32esi, x9, x8, 0x3, 0xde1bcc23, 0x121bcc23, 0x27000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox32
+ // result rd:x10(0xadea51a1), rs1=>rd:x10(0xadea5195), rs2:x7(0x00000028), imm:0x0
+ TEST_RI_OP(aes32esi, x10, x7, 0x0, 0xadea51a1, 0xadea5195, 0x00000028, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox32
+ // result rd:x11(0xd2ff1bc1), rs1=>rd:x11(0xd2ffbec1), rs2:x6(0x00002900), imm:0x1
+ TEST_RI_OP(aes32esi, x11, x6, 0x1, 0xd2ff1bc1, 0xd2ffbec1, 0x00002900, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox32
+ // result rd:x12(0xa804a8bb), rs1=>rd:x12(0xa8e1a8bb), rs2:x5(0x002a0000), imm:0x2
+ TEST_RI_OP(aes32esi, x12, x5, 0x2, 0xa804a8bb, 0xa8e1a8bb, 0x002a0000, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox32
+ // result rd:x13(0xb9c99fcb), rs1=>rd:x13(0x48c99fcb), rs2:x4(0x2b000000), imm:0x3
+ TEST_RI_OP(aes32esi, x13, x4, 0x3, 0xb9c99fcb, 0x48c99fcb, 0x2b000000, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox32
+ // result rd:x14(0x461d523e), rs1=>rd:x14(0x461d524f), rs2:x3(0x0000002c), imm:0x0
+ TEST_RI_OP(aes32esi, x14, x3, 0x0, 0x461d523e, 0x461d524f, 0x0000002c, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox32
+ // result rd:x15(0x528ac8af), rs1=>rd:x15(0x528a10af), rs2:x2(0x00002d00), imm:0x1
+ TEST_RI_OP(aes32esi, x15, x2, 0x1, 0x528ac8af, 0x528a10af, 0x00002d00, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox32
+ // result rd:x16(0xe1aafbc3), rs1=>rd:x16(0xe19bfbc3), rs2:x1(0x002e0000), imm:0x2
+ TEST_RI_OP(aes32esi, x16, x1, 0x2, 0xe1aafbc3, 0xe19bfbc3, 0x002e0000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox32
+ // result rd:x17(0x657af2c0), rs1=>rd:x17(0x707af2c0), rs2:x31(0x2f000000), imm:0x3
+ TEST_RI_OP(aes32esi, x17, x31, 0x3, 0x657af2c0, 0x707af2c0, 0x2f000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox32
+ // result rd:x18(0xa47d105f), rs1=>rd:x18(0xa47d105b), rs2:x30(0x00000030), imm:0x0
+ TEST_RI_OP(aes32esi, x18, x30, 0x0, 0xa47d105f, 0xa47d105b, 0x00000030, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox32
+ // result rd:x19(0x121b0b23), rs1=>rd:x19(0x121bcc23), rs2:x29(0x00003100), imm:0x1
+ TEST_RI_OP(aes32esi, x19, x29, 0x1, 0x121b0b23, 0x121bcc23, 0x00003100, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox32
+ // result rd:x20(0xadc95195), rs1=>rd:x20(0xadea5195), rs2:x28(0x00320000), imm:0x2
+ TEST_RI_OP(aes32esi, x20, x28, 0x2, 0xadc95195, 0xadea5195, 0x00320000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox32
+ // result rd:x21(0x11ffbec1), rs1=>rd:x21(0xd2ffbec1), rs2:x27(0x33000000), imm:0x3
+ TEST_RI_OP(aes32esi, x21, x27, 0x3, 0x11ffbec1, 0xd2ffbec1, 0x33000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox32
+ // result rd:x22(0xa8e1a8a3), rs1=>rd:x22(0xa8e1a8bb), rs2:x26(0x00000034), imm:0x0
+ TEST_RI_OP(aes32esi, x22, x26, 0x0, 0xa8e1a8a3, 0xa8e1a8bb, 0x00000034, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox32
+ // result rd:x23(0x48c909cb), rs1=>rd:x23(0x48c99fcb), rs2:x25(0x00003500), imm:0x1
+ TEST_RI_OP(aes32esi, x23, x25, 0x1, 0x48c909cb, 0x48c99fcb, 0x00003500, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox32
+ // result rd:x24(0x00330000), rs1=>rd:x24(0x461d524f), rs2:x24(0x00360000), imm:0x2
+ TEST_RI_OP(aes32esi, x24, x24, 0x2, 0x00330000, 0x461d524f, 0x00360000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox32
+ // result rd:x25(0xc88a10af), rs1=>rd:x25(0x528a10af), rs2:x23(0x37000000), imm:0x3
+ TEST_RI_OP(aes32esi, x25, x23, 0x3, 0xc88a10af, 0x528a10af, 0x37000000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox32
+ // result rd:x26(0xe19bfbc4), rs1=>rd:x26(0xe19bfbc3), rs2:x22(0x00000038), imm:0x0
+ TEST_RI_OP(aes32esi, x26, x22, 0x0, 0xe19bfbc4, 0xe19bfbc3, 0x00000038, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox32
+ // result rd:x27(0x707ae0c0), rs1=>rd:x27(0x707af2c0), rs2:x21(0x00003900), imm:0x1
+ TEST_RI_OP(aes32esi, x27, x21, 0x1, 0x707ae0c0, 0x707af2c0, 0x00003900, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox32
+ // result rd:x28(0xa4fd105b), rs1=>rd:x28(0xa47d105b), rs2:x20(0x003a0000), imm:0x2
+ TEST_RI_OP(aes32esi, x28, x20, 0x2, 0xa4fd105b, 0xa47d105b, 0x003a0000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox32
+ // result rd:x29(0xf01bcc23), rs1=>rd:x29(0x121bcc23), rs2:x19(0x3b000000), imm:0x3
+ TEST_RI_OP(aes32esi, x29, x19, 0x3, 0xf01bcc23, 0x121bcc23, 0x3b000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox32
+ // result rd:x30(0xadea517e), rs1=>rd:x30(0xadea5195), rs2:x18(0x0000003c), imm:0x0
+ TEST_RI_OP(aes32esi, x30, x18, 0x0, 0xadea517e, 0xadea5195, 0x0000003c, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox32
+ // result rd:x31(0xd2ff99c1), rs1=>rd:x31(0xd2ffbec1), rs2:x17(0x00003d00), imm:0x1
+ TEST_RI_OP(aes32esi, x31, x17, 0x1, 0xd2ff99c1, 0xd2ffbec1, 0x00003d00, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox32
+ // result rd:x1(0xa853a8bb), rs1=>rd:x1(0xa8e1a8bb), rs2:x16(0x003e0000), imm:0x2
+ TEST_RI_OP(aes32esi, x1, x16, 0x2, 0xa853a8bb, 0xa8e1a8bb, 0x003e0000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox32
+ // result rd:x2(0x3dc99fcb), rs1=>rd:x2(0x48c99fcb), rs2:x15(0x3f000000), imm:0x3
+ TEST_RI_OP(aes32esi, x2, x15, 0x3, 0x3dc99fcb, 0x48c99fcb, 0x3f000000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox32
+ // result rd:x3(0x461d5246), rs1=>rd:x3(0x461d524f), rs2:x14(0x00000040), imm:0x0
+ TEST_RI_OP(aes32esi, x3, x14, 0x0, 0x461d5246, 0x461d524f, 0x00000040, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox32
+ // result rd:x4(0x528a93af), rs1=>rd:x4(0x528a10af), rs2:x13(0x00004100), imm:0x1
+ TEST_RI_OP(aes32esi, x4, x13, 0x1, 0x528a93af, 0x528a10af, 0x00004100, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox32
+ // result rd:x5(0xe1b7fbc3), rs1=>rd:x5(0xe19bfbc3), rs2:x12(0x00420000), imm:0x2
+ TEST_RI_OP(aes32esi, x5, x12, 0x2, 0xe1b7fbc3, 0xe19bfbc3, 0x00420000, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox32
+ // result rd:x6(0x6a7af2c0), rs1=>rd:x6(0x707af2c0), rs2:x11(0x43000000), imm:0x3
+ TEST_RI_OP(aes32esi, x6, x11, 0x3, 0x6a7af2c0, 0x707af2c0, 0x43000000, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox32
+ // result rd:x7(0xa47d1040), rs1=>rd:x7(0xa47d105b), rs2:x10(0x00000044), imm:0x0
+ TEST_RI_OP(aes32esi, x7, x10, 0x0, 0xa47d1040, 0xa47d105b, 0x00000044, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox32
+ // result rd:x8(0x121ba223), rs1=>rd:x8(0x121bcc23), rs2:x9(0x00004500), imm:0x1
+ TEST_RI_OP(aes32esi, x8, x9, 0x1, 0x121ba223, 0x121bcc23, 0x00004500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox32
+ // result rd:x9(0xadb05195), rs1=>rd:x9(0xadea5195), rs2:x8(0x00460000), imm:0x2
+ TEST_RI_OP(aes32esi, x9, x8, 0x2, 0xadb05195, 0xadea5195, 0x00460000, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox32
+ // result rd:x10(0x72ffbec1), rs1=>rd:x10(0xd2ffbec1), rs2:x7(0x47000000), imm:0x3
+ TEST_RI_OP(aes32esi, x10, x7, 0x3, 0x72ffbec1, 0xd2ffbec1, 0x47000000, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox32
+ // result rd:x11(0xa8e1a8e9), rs1=>rd:x11(0xa8e1a8bb), rs2:x6(0x00000048), imm:0x0
+ TEST_RI_OP(aes32esi, x11, x6, 0x0, 0xa8e1a8e9, 0xa8e1a8bb, 0x00000048, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox32
+ // result rd:x12(0x48c9a4cb), rs1=>rd:x12(0x48c99fcb), rs2:x5(0x00004900), imm:0x1
+ TEST_RI_OP(aes32esi, x12, x5, 0x1, 0x48c9a4cb, 0x48c99fcb, 0x00004900, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox32
+ // result rd:x13(0x46cb524f), rs1=>rd:x13(0x461d524f), rs2:x4(0x004a0000), imm:0x2
+ TEST_RI_OP(aes32esi, x13, x4, 0x2, 0x46cb524f, 0x461d524f, 0x004a0000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox32
+ // result rd:x14(0xe18a10af), rs1=>rd:x14(0x528a10af), rs2:x3(0x4b000000), imm:0x3
+ TEST_RI_OP(aes32esi, x14, x3, 0x3, 0xe18a10af, 0x528a10af, 0x4b000000, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox32
+ // result rd:x15(0xe19bfbea), rs1=>rd:x15(0xe19bfbc3), rs2:x2(0x0000004c), imm:0x0
+ TEST_RI_OP(aes32esi, x15, x2, 0x0, 0xe19bfbea, 0xe19bfbc3, 0x0000004c, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox32
+ // result rd:x16(0x707a11c0), rs1=>rd:x16(0x707af2c0), rs2:x1(0x00004d00), imm:0x1
+ TEST_RI_OP(aes32esi, x16, x1, 0x1, 0x707a11c0, 0x707af2c0, 0x00004d00, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox32
+ // result rd:x17(0xa452105b), rs1=>rd:x17(0xa47d105b), rs2:x31(0x004e0000), imm:0x2
+ TEST_RI_OP(aes32esi, x17, x31, 0x2, 0xa452105b, 0xa47d105b, 0x004e0000, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox32
+ // result rd:x18(0x961bcc23), rs1=>rd:x18(0x121bcc23), rs2:x30(0x4f000000), imm:0x3
+ TEST_RI_OP(aes32esi, x18, x30, 0x3, 0x961bcc23, 0x121bcc23, 0x4f000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox32
+ // result rd:x19(0xadea51c6), rs1=>rd:x19(0xadea5195), rs2:x29(0x00000050), imm:0x0
+ TEST_RI_OP(aes32esi, x19, x29, 0x0, 0xadea51c6, 0xadea5195, 0x00000050, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox32
+ // result rd:x20(0xd2ff6fc1), rs1=>rd:x20(0xd2ffbec1), rs2:x28(0x00005100), imm:0x1
+ TEST_RI_OP(aes32esi, x20, x28, 0x1, 0xd2ff6fc1, 0xd2ffbec1, 0x00005100, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox32
+ // result rd:x21(0xa8e1a8bb), rs1=>rd:x21(0xa8e1a8bb), rs2:x27(0x00520000), imm:0x2
+ TEST_RI_OP(aes32esi, x21, x27, 0x2, 0xa8e1a8bb, 0xa8e1a8bb, 0x00520000, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox32
+ // result rd:x22(0xa5c99fcb), rs1=>rd:x22(0x48c99fcb), rs2:x26(0x53000000), imm:0x3
+ TEST_RI_OP(aes32esi, x22, x26, 0x3, 0xa5c99fcb, 0x48c99fcb, 0x53000000, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox32
+ // result rd:x23(0x461d526f), rs1=>rd:x23(0x461d524f), rs2:x25(0x00000054), imm:0x0
+ TEST_RI_OP(aes32esi, x23, x25, 0x0, 0x461d526f, 0x461d524f, 0x00000054, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox32
+ // result rd:x24(0x0000a900), rs1=>rd:x24(0x528a10af), rs2:x24(0x00005500), imm:0x1
+ TEST_RI_OP(aes32esi, x24, x24, 0x1, 0x0000a900, 0x528a10af, 0x00005500, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox32
+ // result rd:x25(0xe12afbc3), rs1=>rd:x25(0xe19bfbc3), rs2:x23(0x00560000), imm:0x2
+ TEST_RI_OP(aes32esi, x25, x23, 0x2, 0xe12afbc3, 0xe19bfbc3, 0x00560000, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox32
+ // result rd:x26(0x2b7af2c0), rs1=>rd:x26(0x707af2c0), rs2:x22(0x57000000), imm:0x3
+ TEST_RI_OP(aes32esi, x26, x22, 0x3, 0x2b7af2c0, 0x707af2c0, 0x57000000, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox32
+ // result rd:x27(0xa47d1031), rs1=>rd:x27(0xa47d105b), rs2:x21(0x00000058), imm:0x0
+ TEST_RI_OP(aes32esi, x27, x21, 0x0, 0xa47d1031, 0xa47d105b, 0x00000058, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox32
+ // result rd:x28(0x121b0723), rs1=>rd:x28(0x121bcc23), rs2:x20(0x00005900), imm:0x1
+ TEST_RI_OP(aes32esi, x28, x20, 0x1, 0x121b0723, 0x121bcc23, 0x00005900, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox32
+ // result rd:x29(0xad545195), rs1=>rd:x29(0xadea5195), rs2:x19(0x005a0000), imm:0x2
+ TEST_RI_OP(aes32esi, x29, x19, 0x2, 0xad545195, 0xadea5195, 0x005a0000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox32
+ // result rd:x30(0xebffbec1), rs1=>rd:x30(0xd2ffbec1), rs2:x18(0x5b000000), imm:0x3
+ TEST_RI_OP(aes32esi, x30, x18, 0x3, 0xebffbec1, 0xd2ffbec1, 0x5b000000, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox32
+ // result rd:x31(0xa8e1a8f1), rs1=>rd:x31(0xa8e1a8bb), rs2:x17(0x0000005c), imm:0x0
+ TEST_RI_OP(aes32esi, x31, x17, 0x0, 0xa8e1a8f1, 0xa8e1a8bb, 0x0000005c, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox32
+ // result rd:x1(0x48c9d3cb), rs1=>rd:x1(0x48c99fcb), rs2:x16(0x00005d00), imm:0x1
+ TEST_RI_OP(aes32esi, x1, x16, 0x1, 0x48c9d3cb, 0x48c99fcb, 0x00005d00, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox32
+ // result rd:x2(0x4645524f), rs1=>rd:x2(0x461d524f), rs2:x15(0x005e0000), imm:0x2
+ TEST_RI_OP(aes32esi, x2, x15, 0x2, 0x4645524f, 0x461d524f, 0x005e0000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox32
+ // result rd:x3(0x9d8a10af), rs1=>rd:x3(0x528a10af), rs2:x14(0x5f000000), imm:0x3
+ TEST_RI_OP(aes32esi, x3, x14, 0x3, 0x9d8a10af, 0x528a10af, 0x5f000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox32
+ // result rd:x4(0xe19bfb13), rs1=>rd:x4(0xe19bfbc3), rs2:x13(0x00000060), imm:0x0
+ TEST_RI_OP(aes32esi, x4, x13, 0x0, 0xe19bfb13, 0xe19bfbc3, 0x00000060, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox32
+ // result rd:x5(0x707a1dc0), rs1=>rd:x5(0x707af2c0), rs2:x12(0x00006100), imm:0x1
+ TEST_RI_OP(aes32esi, x5, x12, 0x1, 0x707a1dc0, 0x707af2c0, 0x00006100, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox32
+ // result rd:x6(0xa4d7105b), rs1=>rd:x6(0xa47d105b), rs2:x11(0x00620000), imm:0x2
+ TEST_RI_OP(aes32esi, x6, x11, 0x2, 0xa4d7105b, 0xa47d105b, 0x00620000, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox32
+ // result rd:x7(0xe91bcc23), rs1=>rd:x7(0x121bcc23), rs2:x10(0x63000000), imm:0x3
+ TEST_RI_OP(aes32esi, x7, x10, 0x3, 0xe91bcc23, 0x121bcc23, 0x63000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox32
+ // result rd:x8(0xadea51d6), rs1=>rd:x8(0xadea5195), rs2:x9(0x00000064), imm:0x0
+ TEST_RI_OP(aes32esi, x8, x9, 0x0, 0xadea51d6, 0xadea5195, 0x00000064, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox32
+ // result rd:x9(0xd2fff3c1), rs1=>rd:x9(0xd2ffbec1), rs2:x8(0x00006500), imm:0x1
+ TEST_RI_OP(aes32esi, x9, x8, 0x1, 0xd2fff3c1, 0xd2ffbec1, 0x00006500, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox32
+ // result rd:x10(0xa8d2a8bb), rs1=>rd:x10(0xa8e1a8bb), rs2:x7(0x00660000), imm:0x2
+ TEST_RI_OP(aes32esi, x10, x7, 0x2, 0xa8d2a8bb, 0xa8e1a8bb, 0x00660000, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox32
+ // result rd:x11(0xcdc99fcb), rs1=>rd:x11(0x48c99fcb), rs2:x6(0x67000000), imm:0x3
+ TEST_RI_OP(aes32esi, x11, x6, 0x3, 0xcdc99fcb, 0x48c99fcb, 0x67000000, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox32
+ // result rd:x12(0x461d520a), rs1=>rd:x12(0x461d524f), rs2:x5(0x00000068), imm:0x0
+ TEST_RI_OP(aes32esi, x12, x5, 0x0, 0x461d520a, 0x461d524f, 0x00000068, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox32
+ // result rd:x13(0x528ae9af), rs1=>rd:x13(0x528a10af), rs2:x4(0x00006900), imm:0x1
+ TEST_RI_OP(aes32esi, x13, x4, 0x1, 0x528ae9af, 0x528a10af, 0x00006900, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox32
+ // result rd:x14(0xe199fbc3), rs1=>rd:x14(0xe19bfbc3), rs2:x3(0x006a0000), imm:0x2
+ TEST_RI_OP(aes32esi, x14, x3, 0x2, 0xe199fbc3, 0xe19bfbc3, 0x006a0000, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox32
+ // result rd:x15(0x0f7af2c0), rs1=>rd:x15(0x707af2c0), rs2:x2(0x6b000000), imm:0x3
+ TEST_RI_OP(aes32esi, x15, x2, 0x3, 0x0f7af2c0, 0x707af2c0, 0x6b000000, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox32
+ // result rd:x16(0xa47d100b), rs1=>rd:x16(0xa47d105b), rs2:x1(0x0000006c), imm:0x0
+ TEST_RI_OP(aes32esi, x16, x1, 0x0, 0xa47d100b, 0xa47d105b, 0x0000006c, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox32
+ // result rd:x17(0x121bf023), rs1=>rd:x17(0x121bcc23), rs2:x31(0x00006d00), imm:0x1
+ TEST_RI_OP(aes32esi, x17, x31, 0x1, 0x121bf023, 0x121bcc23, 0x00006d00, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox32
+ // result rd:x18(0xad755195), rs1=>rd:x18(0xadea5195), rs2:x30(0x006e0000), imm:0x2
+ TEST_RI_OP(aes32esi, x18, x30, 0x2, 0xad755195, 0xadea5195, 0x006e0000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox32
+ // result rd:x19(0x7affbec1), rs1=>rd:x19(0xd2ffbec1), rs2:x29(0x6f000000), imm:0x3
+ TEST_RI_OP(aes32esi, x19, x29, 0x3, 0x7affbec1, 0xd2ffbec1, 0x6f000000, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox32
+ // result rd:x20(0xa8e1a8ea), rs1=>rd:x20(0xa8e1a8bb), rs2:x28(0x00000070), imm:0x0
+ TEST_RI_OP(aes32esi, x20, x28, 0x0, 0xa8e1a8ea, 0xa8e1a8bb, 0x00000070, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox32
+ // result rd:x21(0x48c93ccb), rs1=>rd:x21(0x48c99fcb), rs2:x27(0x00007100), imm:0x1
+ TEST_RI_OP(aes32esi, x21, x27, 0x1, 0x48c93ccb, 0x48c99fcb, 0x00007100, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox32
+ // result rd:x22(0x465d524f), rs1=>rd:x22(0x461d524f), rs2:x26(0x00720000), imm:0x2
+ TEST_RI_OP(aes32esi, x22, x26, 0x2, 0x465d524f, 0x461d524f, 0x00720000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox32
+ // result rd:x23(0xdd8a10af), rs1=>rd:x23(0x528a10af), rs2:x25(0x73000000), imm:0x3
+ TEST_RI_OP(aes32esi, x23, x25, 0x3, 0xdd8a10af, 0x528a10af, 0x73000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox32
+ // result rd:x24(0x000000e6), rs1=>rd:x24(0xe19bfbc3), rs2:x24(0x00000074), imm:0x0
+ TEST_RI_OP(aes32esi, x24, x24, 0x0, 0x000000e6, 0xe19bfbc3, 0x00000074, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox32
+ // result rd:x25(0x707a6fc0), rs1=>rd:x25(0x707af2c0), rs2:x23(0x00007500), imm:0x1
+ TEST_RI_OP(aes32esi, x25, x23, 0x1, 0x707a6fc0, 0x707af2c0, 0x00007500, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox32
+ // result rd:x26(0xa445105b), rs1=>rd:x26(0xa47d105b), rs2:x22(0x00760000), imm:0x2
+ TEST_RI_OP(aes32esi, x26, x22, 0x2, 0xa445105b, 0xa47d105b, 0x00760000, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox32
+ // result rd:x27(0xe71bcc23), rs1=>rd:x27(0x121bcc23), rs2:x21(0x77000000), imm:0x3
+ TEST_RI_OP(aes32esi, x27, x21, 0x3, 0xe71bcc23, 0x121bcc23, 0x77000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox32
+ // result rd:x28(0xadea5129), rs1=>rd:x28(0xadea5195), rs2:x20(0x00000078), imm:0x0
+ TEST_RI_OP(aes32esi, x28, x20, 0x0, 0xadea5129, 0xadea5195, 0x00000078, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox32
+ // result rd:x29(0xd2ff08c1), rs1=>rd:x29(0xd2ffbec1), rs2:x19(0x00007900), imm:0x1
+ TEST_RI_OP(aes32esi, x29, x19, 0x1, 0xd2ff08c1, 0xd2ffbec1, 0x00007900, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox32
+ // result rd:x30(0xa83ba8bb), rs1=>rd:x30(0xa8e1a8bb), rs2:x18(0x007a0000), imm:0x2
+ TEST_RI_OP(aes32esi, x30, x18, 0x2, 0xa83ba8bb, 0xa8e1a8bb, 0x007a0000, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox32
+ // result rd:x31(0x69c99fcb), rs1=>rd:x31(0x48c99fcb), rs2:x17(0x7b000000), imm:0x3
+ TEST_RI_OP(aes32esi, x31, x17, 0x3, 0x69c99fcb, 0x48c99fcb, 0x7b000000, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox32
+ // result rd:x1(0x461d525f), rs1=>rd:x1(0x461d524f), rs2:x16(0x0000007c), imm:0x0
+ TEST_RI_OP(aes32esi, x1, x16, 0x0, 0x461d525f, 0x461d524f, 0x0000007c, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox32
+ // result rd:x2(0x528aefaf), rs1=>rd:x2(0x528a10af), rs2:x15(0x00007d00), imm:0x1
+ TEST_RI_OP(aes32esi, x2, x15, 0x1, 0x528aefaf, 0x528a10af, 0x00007d00, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox32
+ // result rd:x3(0xe168fbc3), rs1=>rd:x3(0xe19bfbc3), rs2:x14(0x007e0000), imm:0x2
+ TEST_RI_OP(aes32esi, x3, x14, 0x2, 0xe168fbc3, 0xe19bfbc3, 0x007e0000, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox32
+ // result rd:x4(0xa27af2c0), rs1=>rd:x4(0x707af2c0), rs2:x13(0x7f000000), imm:0x3
+ TEST_RI_OP(aes32esi, x4, x13, 0x3, 0xa27af2c0, 0x707af2c0, 0x7f000000, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox32
+ // result rd:x5(0xa47d1096), rs1=>rd:x5(0xa47d105b), rs2:x12(0x00000080), imm:0x0
+ TEST_RI_OP(aes32esi, x5, x12, 0x0, 0xa47d1096, 0xa47d105b, 0x00000080, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox32
+ // result rd:x6(0x121bc023), rs1=>rd:x6(0x121bcc23), rs2:x11(0x00008100), imm:0x1
+ TEST_RI_OP(aes32esi, x6, x11, 0x1, 0x121bc023, 0x121bcc23, 0x00008100, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox32
+ // result rd:x7(0xadf95195), rs1=>rd:x7(0xadea5195), rs2:x10(0x00820000), imm:0x2
+ TEST_RI_OP(aes32esi, x7, x10, 0x2, 0xadf95195, 0xadea5195, 0x00820000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox32
+ // result rd:x8(0x3effbec1), rs1=>rd:x8(0xd2ffbec1), rs2:x9(0x83000000), imm:0x3
+ TEST_RI_OP(aes32esi, x8, x9, 0x3, 0x3effbec1, 0xd2ffbec1, 0x83000000, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox32
+ // result rd:x9(0xa8e1a8e4), rs1=>rd:x9(0xa8e1a8bb), rs2:x8(0x00000084), imm:0x0
+ TEST_RI_OP(aes32esi, x9, x8, 0x0, 0xa8e1a8e4, 0xa8e1a8bb, 0x00000084, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox32
+ // result rd:x10(0x48c908cb), rs1=>rd:x10(0x48c99fcb), rs2:x7(0x00008500), imm:0x1
+ TEST_RI_OP(aes32esi, x10, x7, 0x1, 0x48c908cb, 0x48c99fcb, 0x00008500, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox32
+ // result rd:x11(0x4659524f), rs1=>rd:x11(0x461d524f), rs2:x6(0x00860000), imm:0x2
+ TEST_RI_OP(aes32esi, x11, x6, 0x2, 0x4659524f, 0x461d524f, 0x00860000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox32
+ // result rd:x12(0x458a10af), rs1=>rd:x12(0x528a10af), rs2:x5(0x87000000), imm:0x3
+ TEST_RI_OP(aes32esi, x12, x5, 0x3, 0x458a10af, 0x528a10af, 0x87000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox32
+ // result rd:x13(0xe19bfb07), rs1=>rd:x13(0xe19bfbc3), rs2:x4(0x00000088), imm:0x0
+ TEST_RI_OP(aes32esi, x13, x4, 0x0, 0xe19bfb07, 0xe19bfbc3, 0x00000088, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox32
+ // result rd:x14(0x707a55c0), rs1=>rd:x14(0x707af2c0), rs2:x3(0x00008900), imm:0x1
+ TEST_RI_OP(aes32esi, x14, x3, 0x1, 0x707a55c0, 0x707af2c0, 0x00008900, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox32
+ // result rd:x15(0xa403105b), rs1=>rd:x15(0xa47d105b), rs2:x2(0x008a0000), imm:0x2
+ TEST_RI_OP(aes32esi, x15, x2, 0x2, 0xa403105b, 0xa47d105b, 0x008a0000, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox32
+ // result rd:x16(0x2f1bcc23), rs1=>rd:x16(0x121bcc23), rs2:x1(0x8b000000), imm:0x3
+ TEST_RI_OP(aes32esi, x16, x1, 0x3, 0x2f1bcc23, 0x121bcc23, 0x8b000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox32
+ // result rd:x17(0xadea51f1), rs1=>rd:x17(0xadea5195), rs2:x31(0x0000008c), imm:0x0
+ TEST_RI_OP(aes32esi, x17, x31, 0x0, 0xadea51f1, 0xadea5195, 0x0000008c, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox32
+ // result rd:x18(0xd2ffe3c1), rs1=>rd:x18(0xd2ffbec1), rs2:x30(0x00008d00), imm:0x1
+ TEST_RI_OP(aes32esi, x18, x30, 0x1, 0xd2ffe3c1, 0xd2ffbec1, 0x00008d00, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox32
+ // result rd:x19(0xa8f8a8bb), rs1=>rd:x19(0xa8e1a8bb), rs2:x29(0x008e0000), imm:0x2
+ TEST_RI_OP(aes32esi, x19, x29, 0x2, 0xa8f8a8bb, 0xa8e1a8bb, 0x008e0000, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox32
+ // result rd:x20(0x3bc99fcb), rs1=>rd:x20(0x48c99fcb), rs2:x28(0x8f000000), imm:0x3
+ TEST_RI_OP(aes32esi, x20, x28, 0x3, 0x3bc99fcb, 0x48c99fcb, 0x8f000000, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox32
+ // result rd:x21(0x461d522f), rs1=>rd:x21(0x461d524f), rs2:x27(0x00000090), imm:0x0
+ TEST_RI_OP(aes32esi, x21, x27, 0x0, 0x461d522f, 0x461d524f, 0x00000090, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox32
+ // result rd:x22(0x528a91af), rs1=>rd:x22(0x528a10af), rs2:x26(0x00009100), imm:0x1
+ TEST_RI_OP(aes32esi, x22, x26, 0x1, 0x528a91af, 0x528a10af, 0x00009100, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox32
+ // result rd:x23(0xe1d4fbc3), rs1=>rd:x23(0xe19bfbc3), rs2:x25(0x00920000), imm:0x2
+ TEST_RI_OP(aes32esi, x23, x25, 0x2, 0xe1d4fbc3, 0xe19bfbc3, 0x00920000, x1, 4, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox32
+ // result rd:x24(0x4f000000), rs1=>rd:x24(0x707af2c0), rs2:x24(0x93000000), imm:0x3
+ TEST_RI_OP(aes32esi, x24, x24, 0x3, 0x4f000000, 0x707af2c0, 0x93000000, x1, 8, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox32
+ // result rd:x25(0xa47d1079), rs1=>rd:x25(0xa47d105b), rs2:x23(0x00000094), imm:0x0
+ TEST_RI_OP(aes32esi, x25, x23, 0x0, 0xa47d1079, 0xa47d105b, 0x00000094, x1, 12, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox32
+ // result rd:x26(0x121be623), rs1=>rd:x26(0x121bcc23), rs2:x22(0x00009500), imm:0x1
+ TEST_RI_OP(aes32esi, x26, x22, 0x1, 0x121be623, 0x121bcc23, 0x00009500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox32
+ // result rd:x27(0xad7a5195), rs1=>rd:x27(0xadea5195), rs2:x21(0x00960000), imm:0x2
+ TEST_RI_OP(aes32esi, x27, x21, 0x2, 0xad7a5195, 0xadea5195, 0x00960000, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox32
+ // result rd:x28(0x5affbec1), rs1=>rd:x28(0xd2ffbec1), rs2:x20(0x97000000), imm:0x3
+ TEST_RI_OP(aes32esi, x28, x20, 0x3, 0x5affbec1, 0xd2ffbec1, 0x97000000, x6, 4, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox32
+ // result rd:x29(0xa8e1a8fd), rs1=>rd:x29(0xa8e1a8bb), rs2:x19(0x00000098), imm:0x0
+ TEST_RI_OP(aes32esi, x29, x19, 0x0, 0xa8e1a8fd, 0xa8e1a8bb, 0x00000098, x6, 8, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox32
+ // result rd:x30(0x48c971cb), rs1=>rd:x30(0x48c99fcb), rs2:x18(0x00009900), imm:0x1
+ TEST_RI_OP(aes32esi, x30, x18, 0x1, 0x48c971cb, 0x48c99fcb, 0x00009900, x6, 12, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox32
+ // result rd:x31(0x46a5524f), rs1=>rd:x31(0x461d524f), rs2:x17(0x009a0000), imm:0x2
+ TEST_RI_OP(aes32esi, x31, x17, 0x2, 0x46a5524f, 0x461d524f, 0x009a0000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox32
+ // result rd:x1(0x468a10af), rs1=>rd:x1(0x528a10af), rs2:x16(0x9b000000), imm:0x3
+ TEST_RI_OP(aes32esi, x1, x16, 0x3, 0x468a10af, 0x528a10af, 0x9b000000, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox32
+ // result rd:x2(0xe19bfb1d), rs1=>rd:x2(0xe19bfbc3), rs2:x15(0x0000009c), imm:0x0
+ TEST_RI_OP(aes32esi, x2, x15, 0x0, 0xe19bfb1d, 0xe19bfbc3, 0x0000009c, x6, 4, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox32
+ // result rd:x3(0x707aacc0), rs1=>rd:x3(0x707af2c0), rs2:x14(0x00009d00), imm:0x1
+ TEST_RI_OP(aes32esi, x3, x14, 0x1, 0x707aacc0, 0x707af2c0, 0x00009d00, x6, 8, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox32
+ // result rd:x4(0xa476105b), rs1=>rd:x4(0xa47d105b), rs2:x13(0x009e0000), imm:0x2
+ TEST_RI_OP(aes32esi, x4, x13, 0x2, 0xa476105b, 0xa47d105b, 0x009e0000, x6, 12, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox32
+ // result rd:x5(0xc91bcc23), rs1=>rd:x5(0x121bcc23), rs2:x12(0x9f000000), imm:0x3
+ TEST_RI_OP(aes32esi, x5, x12, 0x3, 0xc91bcc23, 0x121bcc23, 0x9f000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox32
+ // result rd:x6(0xadea5175), rs1=>rd:x6(0xadea5195), rs2:x11(0x000000a0), imm:0x0
+ TEST_RI_OP(aes32esi, x6, x11, 0x0, 0xadea5175, 0xadea5195, 0x000000a0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox32
+ // result rd:x7(0xd2ff8cc1), rs1=>rd:x7(0xd2ffbec1), rs2:x10(0x0000a100), imm:0x1
+ TEST_RI_OP(aes32esi, x7, x10, 0x1, 0xd2ff8cc1, 0xd2ffbec1, 0x0000a100, x1, 4, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox32
+ // result rd:x8(0xa8dba8bb), rs1=>rd:x8(0xa8e1a8bb), rs2:x9(0x00a20000), imm:0x2
+ TEST_RI_OP(aes32esi, x8, x9, 0x2, 0xa8dba8bb, 0xa8e1a8bb, 0x00a20000, x1, 8, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox32
+ // result rd:x9(0x42c99fcb), rs1=>rd:x9(0x48c99fcb), rs2:x8(0xa3000000), imm:0x3
+ TEST_RI_OP(aes32esi, x9, x8, 0x3, 0x42c99fcb, 0x48c99fcb, 0xa3000000, x1, 12, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox32
+ // result rd:x10(0x461d5206), rs1=>rd:x10(0x461d524f), rs2:x7(0x000000a4), imm:0x0
+ TEST_RI_OP(aes32esi, x10, x7, 0x0, 0x461d5206, 0x461d524f, 0x000000a4, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox32
+ // result rd:x11(0x528a16af), rs1=>rd:x11(0x528a10af), rs2:x6(0x0000a500), imm:0x1
+ TEST_RI_OP(aes32esi, x11, x6, 0x1, 0x528a16af, 0x528a10af, 0x0000a500, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox32
+ // result rd:x12(0xe1bffbc3), rs1=>rd:x12(0xe19bfbc3), rs2:x5(0x00a60000), imm:0x2
+ TEST_RI_OP(aes32esi, x12, x5, 0x2, 0xe1bffbc3, 0xe19bfbc3, 0x00a60000, x1, 4, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox32
+ // result rd:x13(0x2c7af2c0), rs1=>rd:x13(0x707af2c0), rs2:x4(0xa7000000), imm:0x3
+ TEST_RI_OP(aes32esi, x13, x4, 0x3, 0x2c7af2c0, 0x707af2c0, 0xa7000000, x1, 8, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox32
+ // result rd:x14(0xa47d1099), rs1=>rd:x14(0xa47d105b), rs2:x3(0x000000a8), imm:0x0
+ TEST_RI_OP(aes32esi, x14, x3, 0x0, 0xa47d1099, 0xa47d105b, 0x000000a8, x1, 12, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox32
+ // result rd:x15(0x121b1f23), rs1=>rd:x15(0x121bcc23), rs2:x2(0x0000a900), imm:0x1
+ TEST_RI_OP(aes32esi, x15, x2, 0x1, 0x121b1f23, 0x121bcc23, 0x0000a900, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox32
+ // result rd:x16(0xad465195), rs1=>rd:x16(0xadea5195), rs2:x1(0x00aa0000), imm:0x2
+ TEST_RI_OP(aes32esi, x16, x1, 0x2, 0xad465195, 0xadea5195, 0x00aa0000, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox32
+ // result rd:x17(0xb0ffbec1), rs1=>rd:x17(0xd2ffbec1), rs2:x31(0xab000000), imm:0x3
+ TEST_RI_OP(aes32esi, x17, x31, 0x3, 0xb0ffbec1, 0xd2ffbec1, 0xab000000, x2, 4, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox32
+ // result rd:x18(0xa8e1a82a), rs1=>rd:x18(0xa8e1a8bb), rs2:x30(0x000000ac), imm:0x0
+ TEST_RI_OP(aes32esi, x18, x30, 0x0, 0xa8e1a82a, 0xa8e1a8bb, 0x000000ac, x2, 8, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox32
+ // result rd:x19(0x48c90acb), rs1=>rd:x19(0x48c99fcb), rs2:x29(0x0000ad00), imm:0x1
+ TEST_RI_OP(aes32esi, x19, x29, 0x1, 0x48c90acb, 0x48c99fcb, 0x0000ad00, x2, 12, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox32
+ // result rd:x20(0x46f9524f), rs1=>rd:x20(0x461d524f), rs2:x28(0x00ae0000), imm:0x2
+ TEST_RI_OP(aes32esi, x20, x28, 0x2, 0x46f9524f, 0x461d524f, 0x00ae0000, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox32
+ // result rd:x21(0x2b8a10af), rs1=>rd:x21(0x528a10af), rs2:x27(0xaf000000), imm:0x3
+ TEST_RI_OP(aes32esi, x21, x27, 0x3, 0x2b8a10af, 0x528a10af, 0xaf000000, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox32
+ // result rd:x22(0xe19bfb24), rs1=>rd:x22(0xe19bfbc3), rs2:x26(0x000000b0), imm:0x0
+ TEST_RI_OP(aes32esi, x22, x26, 0x0, 0xe19bfb24, 0xe19bfbc3, 0x000000b0, x1, 4, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox32
+ // result rd:x23(0x707a3ac0), rs1=>rd:x23(0x707af2c0), rs2:x25(0x0000b100), imm:0x1
+ TEST_RI_OP(aes32esi, x23, x25, 0x1, 0x707a3ac0, 0x707af2c0, 0x0000b100, x1, 8, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox32
+ // result rd:x24(0x00850000), rs1=>rd:x24(0xa47d105b), rs2:x24(0x00b20000), imm:0x2
+ TEST_RI_OP(aes32esi, x24, x24, 0x2, 0x00850000, 0xa47d105b, 0x00b20000, x1, 12, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox32
+ // result rd:x25(0x7f1bcc23), rs1=>rd:x25(0x121bcc23), rs2:x23(0xb3000000), imm:0x3
+ TEST_RI_OP(aes32esi, x25, x23, 0x3, 0x7f1bcc23, 0x121bcc23, 0xb3000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox32
+ // result rd:x26(0xadea5118), rs1=>rd:x26(0xadea5195), rs2:x22(0x000000b4), imm:0x0
+ TEST_RI_OP(aes32esi, x26, x22, 0x0, 0xadea5118, 0xadea5195, 0x000000b4, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox32
+ // result rd:x27(0xd2ff6bc1), rs1=>rd:x27(0xd2ffbec1), rs2:x21(0x0000b500), imm:0x1
+ TEST_RI_OP(aes32esi, x27, x21, 0x1, 0xd2ff6bc1, 0xd2ffbec1, 0x0000b500, x1, 4, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox32
+ // result rd:x28(0xa8afa8bb), rs1=>rd:x28(0xa8e1a8bb), rs2:x20(0x00b60000), imm:0x2
+ TEST_RI_OP(aes32esi, x28, x20, 0x2, 0xa8afa8bb, 0xa8e1a8bb, 0x00b60000, x1, 8, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox32
+ // result rd:x29(0xe1c99fcb), rs1=>rd:x29(0x48c99fcb), rs2:x19(0xb7000000), imm:0x3
+ TEST_RI_OP(aes32esi, x29, x19, 0x3, 0xe1c99fcb, 0x48c99fcb, 0xb7000000, x1, 12, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox32
+ // result rd:x30(0x461d5223), rs1=>rd:x30(0x461d524f), rs2:x18(0x000000b8), imm:0x0
+ TEST_RI_OP(aes32esi, x30, x18, 0x0, 0x461d5223, 0x461d524f, 0x000000b8, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox32
+ // result rd:x31(0x528a46af), rs1=>rd:x31(0x528a10af), rs2:x17(0x0000b900), imm:0x1
+ TEST_RI_OP(aes32esi, x31, x17, 0x1, 0x528a46af, 0x528a10af, 0x0000b900, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox32
+ // result rd:x1(0xe16ffbc3), rs1=>rd:x1(0xe19bfbc3), rs2:x16(0x00ba0000), imm:0x2
+ TEST_RI_OP(aes32esi, x1, x16, 0x2, 0xe16ffbc3, 0xe19bfbc3, 0x00ba0000, x5, 4, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox32
+ // result rd:x2(0x9a7af2c0), rs1=>rd:x2(0x707af2c0), rs2:x15(0xbb000000), imm:0x3
+ TEST_RI_OP(aes32esi, x2, x15, 0x3, 0x9a7af2c0, 0x707af2c0, 0xbb000000, x5, 8, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox32
+ // result rd:x3(0xa47d103e), rs1=>rd:x3(0xa47d105b), rs2:x14(0x000000bc), imm:0x0
+ TEST_RI_OP(aes32esi, x3, x14, 0x0, 0xa47d103e, 0xa47d105b, 0x000000bc, x5, 12, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox32
+ // result rd:x4(0x121bb623), rs1=>rd:x4(0x121bcc23), rs2:x13(0x0000bd00), imm:0x1
+ TEST_RI_OP(aes32esi, x4, x13, 0x1, 0x121bb623, 0x121bcc23, 0x0000bd00, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox32
+ // result rd:x5(0xad445195), rs1=>rd:x5(0xadea5195), rs2:x12(0x00be0000), imm:0x2
+ TEST_RI_OP(aes32esi, x5, x12, 0x2, 0xad445195, 0xadea5195, 0x00be0000, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox32
+ // result rd:x6(0xdaffbec1), rs1=>rd:x6(0xd2ffbec1), rs2:x11(0xbf000000), imm:0x3
+ TEST_RI_OP(aes32esi, x6, x11, 0x3, 0xdaffbec1, 0xd2ffbec1, 0xbf000000, x1, 4, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox32
+ // result rd:x7(0xa8e1a801), rs1=>rd:x7(0xa8e1a8bb), rs2:x10(0x000000c0), imm:0x0
+ TEST_RI_OP(aes32esi, x7, x10, 0x0, 0xa8e1a801, 0xa8e1a8bb, 0x000000c0, x1, 8, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox32
+ // result rd:x8(0x48c9e7cb), rs1=>rd:x8(0x48c99fcb), rs2:x9(0x0000c100), imm:0x1
+ TEST_RI_OP(aes32esi, x8, x9, 0x1, 0x48c9e7cb, 0x48c99fcb, 0x0000c100, x1, 12, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox32
+ // result rd:x9(0x4638524f), rs1=>rd:x9(0x461d524f), rs2:x8(0x00c20000), imm:0x2
+ TEST_RI_OP(aes32esi, x9, x8, 0x2, 0x4638524f, 0x461d524f, 0x00c20000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox32
+ // result rd:x10(0x7c8a10af), rs1=>rd:x10(0x528a10af), rs2:x7(0xc3000000), imm:0x3
+ TEST_RI_OP(aes32esi, x10, x7, 0x3, 0x7c8a10af, 0x528a10af, 0xc3000000, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox32
+ // result rd:x11(0xe19bfbdf), rs1=>rd:x11(0xe19bfbc3), rs2:x6(0x000000c4), imm:0x0
+ TEST_RI_OP(aes32esi, x11, x6, 0x0, 0xe19bfbdf, 0xe19bfbc3, 0x000000c4, x1, 4, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox32
+ // result rd:x12(0x707a54c0), rs1=>rd:x12(0x707af2c0), rs2:x5(0x0000c500), imm:0x1
+ TEST_RI_OP(aes32esi, x12, x5, 0x1, 0x707a54c0, 0x707af2c0, 0x0000c500, x1, 8, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox32
+ // result rd:x13(0xa4c9105b), rs1=>rd:x13(0xa47d105b), rs2:x4(0x00c60000), imm:0x2
+ TEST_RI_OP(aes32esi, x13, x4, 0x2, 0xa4c9105b, 0xa47d105b, 0x00c60000, x1, 12, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox32
+ // result rd:x14(0xd41bcc23), rs1=>rd:x14(0x121bcc23), rs2:x3(0xc7000000), imm:0x3
+ TEST_RI_OP(aes32esi, x14, x3, 0x3, 0xd41bcc23, 0x121bcc23, 0xc7000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox32
+ // result rd:x15(0xadea517d), rs1=>rd:x15(0xadea5195), rs2:x2(0x000000c8), imm:0x0
+ TEST_RI_OP(aes32esi, x15, x2, 0x0, 0xadea517d, 0xadea5195, 0x000000c8, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox32
+ // result rd:x16(0xd2ff63c1), rs1=>rd:x16(0xd2ffbec1), rs2:x1(0x0000c900), imm:0x1
+ TEST_RI_OP(aes32esi, x16, x1, 0x1, 0xd2ff63c1, 0xd2ffbec1, 0x0000c900, x3, 4, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox32
+ // result rd:x17(0xa895a8bb), rs1=>rd:x17(0xa8e1a8bb), rs2:x31(0x00ca0000), imm:0x2
+ TEST_RI_OP(aes32esi, x17, x31, 0x2, 0xa895a8bb, 0xa8e1a8bb, 0x00ca0000, x3, 8, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox32
+ // result rd:x18(0x57c99fcb), rs1=>rd:x18(0x48c99fcb), rs2:x30(0xcb000000), imm:0x3
+ TEST_RI_OP(aes32esi, x18, x30, 0x3, 0x57c99fcb, 0x48c99fcb, 0xcb000000, x3, 12, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox32
+ // result rd:x19(0x461d5204), rs1=>rd:x19(0x461d524f), rs2:x29(0x000000cc), imm:0x0
+ TEST_RI_OP(aes32esi, x19, x29, 0x0, 0x461d5204, 0x461d524f, 0x000000cc, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox32
+ // result rd:x20(0x528aadaf), rs1=>rd:x20(0x528a10af), rs2:x28(0x0000cd00), imm:0x1
+ TEST_RI_OP(aes32esi, x20, x28, 0x1, 0x528aadaf, 0x528a10af, 0x0000cd00, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox32
+ // result rd:x21(0xe110fbc3), rs1=>rd:x21(0xe19bfbc3), rs2:x27(0x00ce0000), imm:0x2
+ TEST_RI_OP(aes32esi, x21, x27, 0x2, 0xe110fbc3, 0xe19bfbc3, 0x00ce0000, x1, 4, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox32
+ // result rd:x22(0xfa7af2c0), rs1=>rd:x22(0x707af2c0), rs2:x26(0xcf000000), imm:0x3
+ TEST_RI_OP(aes32esi, x22, x26, 0x3, 0xfa7af2c0, 0x707af2c0, 0xcf000000, x1, 8, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox32
+ // result rd:x23(0xa47d102b), rs1=>rd:x23(0xa47d105b), rs2:x25(0x000000d0), imm:0x0
+ TEST_RI_OP(aes32esi, x23, x25, 0x0, 0xa47d102b, 0xa47d105b, 0x000000d0, x1, 12, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox32
+ // result rd:x24(0x0000ef00), rs1=>rd:x24(0x121bcc23), rs2:x24(0x0000d100), imm:0x1
+ TEST_RI_OP(aes32esi, x24, x24, 0x1, 0x0000ef00, 0x121bcc23, 0x0000d100, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox32
+ // result rd:x25(0xad5f5195), rs1=>rd:x25(0xadea5195), rs2:x23(0x00d20000), imm:0x2
+ TEST_RI_OP(aes32esi, x25, x23, 0x2, 0xad5f5195, 0xadea5195, 0x00d20000, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox32
+ // result rd:x26(0xb4ffbec1), rs1=>rd:x26(0xd2ffbec1), rs2:x22(0xd3000000), imm:0x3
+ TEST_RI_OP(aes32esi, x26, x22, 0x3, 0xb4ffbec1, 0xd2ffbec1, 0xd3000000, x1, 4, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox32
+ // result rd:x27(0xa8e1a8f3), rs1=>rd:x27(0xa8e1a8bb), rs2:x21(0x000000d4), imm:0x0
+ TEST_RI_OP(aes32esi, x27, x21, 0x0, 0xa8e1a8f3, 0xa8e1a8bb, 0x000000d4, x1, 8, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox32
+ // result rd:x28(0x48c99ccb), rs1=>rd:x28(0x48c99fcb), rs2:x20(0x0000d500), imm:0x1
+ TEST_RI_OP(aes32esi, x28, x20, 0x1, 0x48c99ccb, 0x48c99fcb, 0x0000d500, x1, 12, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox32
+ // result rd:x29(0x46eb524f), rs1=>rd:x29(0x461d524f), rs2:x19(0x00d60000), imm:0x2
+ TEST_RI_OP(aes32esi, x29, x19, 0x2, 0x46eb524f, 0x461d524f, 0x00d60000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox32
+ // result rd:x30(0x5c8a10af), rs1=>rd:x30(0x528a10af), rs2:x18(0xd7000000), imm:0x3
+ TEST_RI_OP(aes32esi, x30, x18, 0x3, 0x5c8a10af, 0x528a10af, 0xd7000000, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox32
+ // result rd:x31(0xe19bfba2), rs1=>rd:x31(0xe19bfbc3), rs2:x17(0x000000d8), imm:0x0
+ TEST_RI_OP(aes32esi, x31, x17, 0x0, 0xe19bfba2, 0xe19bfbc3, 0x000000d8, x4, 4, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox32
+ // result rd:x1(0x707ac7c0), rs1=>rd:x1(0x707af2c0), rs2:x16(0x0000d900), imm:0x1
+ TEST_RI_OP(aes32esi, x1, x16, 0x1, 0x707ac7c0, 0x707af2c0, 0x0000d900, x4, 8, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox32
+ // result rd:x2(0xa42a105b), rs1=>rd:x2(0xa47d105b), rs2:x15(0x00da0000), imm:0x2
+ TEST_RI_OP(aes32esi, x2, x15, 0x2, 0xa42a105b, 0xa47d105b, 0x00da0000, x4, 12, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox32
+ // result rd:x3(0xab1bcc23), rs1=>rd:x3(0x121bcc23), rs2:x14(0xdb000000), imm:0x3
+ TEST_RI_OP(aes32esi, x3, x14, 0x3, 0xab1bcc23, 0x121bcc23, 0xdb000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox32
+ // result rd:x4(0xadea5113), rs1=>rd:x4(0xadea5195), rs2:x13(0x000000dc), imm:0x0
+ TEST_RI_OP(aes32esi, x4, x13, 0x0, 0xadea5113, 0xadea5195, 0x000000dc, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox32
+ // result rd:x5(0xd2ff7fc1), rs1=>rd:x5(0xd2ffbec1), rs2:x12(0x0000dd00), imm:0x1
+ TEST_RI_OP(aes32esi, x5, x12, 0x1, 0xd2ff7fc1, 0xd2ffbec1, 0x0000dd00, x1, 4, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox32
+ // result rd:x6(0xa8fca8bb), rs1=>rd:x6(0xa8e1a8bb), rs2:x11(0x00de0000), imm:0x2
+ TEST_RI_OP(aes32esi, x6, x11, 0x2, 0xa8fca8bb, 0xa8e1a8bb, 0x00de0000, x1, 8, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox32
+ // result rd:x7(0xd6c99fcb), rs1=>rd:x7(0x48c99fcb), rs2:x10(0xdf000000), imm:0x3
+ TEST_RI_OP(aes32esi, x7, x10, 0x3, 0xd6c99fcb, 0x48c99fcb, 0xdf000000, x1, 12, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox32
+ // result rd:x8(0x461d52ae), rs1=>rd:x8(0x461d524f), rs2:x9(0x000000e0), imm:0x0
+ TEST_RI_OP(aes32esi, x8, x9, 0x0, 0x461d52ae, 0x461d524f, 0x000000e0, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox32
+ // result rd:x9(0x528ae8af), rs1=>rd:x9(0x528a10af), rs2:x8(0x0000e100), imm:0x1
+ TEST_RI_OP(aes32esi, x9, x8, 0x1, 0x528ae8af, 0x528a10af, 0x0000e100, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox32
+ // result rd:x10(0xe103fbc3), rs1=>rd:x10(0xe19bfbc3), rs2:x7(0x00e20000), imm:0x2
+ TEST_RI_OP(aes32esi, x10, x7, 0x2, 0xe103fbc3, 0xe19bfbc3, 0x00e20000, x1, 4, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox32
+ // result rd:x11(0x617af2c0), rs1=>rd:x11(0x707af2c0), rs2:x6(0xe3000000), imm:0x3
+ TEST_RI_OP(aes32esi, x11, x6, 0x3, 0x617af2c0, 0x707af2c0, 0xe3000000, x1, 8, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox32
+ // result rd:x12(0xa47d1032), rs1=>rd:x12(0xa47d105b), rs2:x5(0x000000e4), imm:0x0
+ TEST_RI_OP(aes32esi, x12, x5, 0x0, 0xa47d1032, 0xa47d105b, 0x000000e4, x1, 12, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox32
+ // result rd:x13(0x121b1523), rs1=>rd:x13(0x121bcc23), rs2:x4(0x0000e500), imm:0x1
+ TEST_RI_OP(aes32esi, x13, x4, 0x1, 0x121b1523, 0x121bcc23, 0x0000e500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox32
+ // result rd:x14(0xad645195), rs1=>rd:x14(0xadea5195), rs2:x3(0x00e60000), imm:0x2
+ TEST_RI_OP(aes32esi, x14, x3, 0x2, 0xad645195, 0xadea5195, 0x00e60000, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox32
+ // result rd:x15(0x46ffbec1), rs1=>rd:x15(0xd2ffbec1), rs2:x2(0xe7000000), imm:0x3
+ TEST_RI_OP(aes32esi, x15, x2, 0x3, 0x46ffbec1, 0xd2ffbec1, 0xe7000000, x4, 4, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox32
+ // result rd:x16(0xa8e1a820), rs1=>rd:x16(0xa8e1a8bb), rs2:x1(0x000000e8), imm:0x0
+ TEST_RI_OP(aes32esi, x16, x1, 0x0, 0xa8e1a820, 0xa8e1a8bb, 0x000000e8, x4, 8, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox32
+ // result rd:x17(0x48c981cb), rs1=>rd:x17(0x48c99fcb), rs2:x31(0x0000e900), imm:0x1
+ TEST_RI_OP(aes32esi, x17, x31, 0x1, 0x48c981cb, 0x48c99fcb, 0x0000e900, x4, 12, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox32
+ // result rd:x18(0x469a524f), rs1=>rd:x18(0x461d524f), rs2:x30(0x00ea0000), imm:0x2
+ TEST_RI_OP(aes32esi, x18, x30, 0x2, 0x469a524f, 0x461d524f, 0x00ea0000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox32
+ // result rd:x19(0xbb8a10af), rs1=>rd:x19(0x528a10af), rs2:x29(0xeb000000), imm:0x3
+ TEST_RI_OP(aes32esi, x19, x29, 0x3, 0xbb8a10af, 0x528a10af, 0xeb000000, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox32
+ // result rd:x20(0xe19bfb0d), rs1=>rd:x20(0xe19bfbc3), rs2:x28(0x000000ec), imm:0x0
+ TEST_RI_OP(aes32esi, x20, x28, 0x0, 0xe19bfb0d, 0xe19bfbc3, 0x000000ec, x1, 4, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox32
+ // result rd:x21(0x707aa7c0), rs1=>rd:x21(0x707af2c0), rs2:x27(0x0000ed00), imm:0x1
+ TEST_RI_OP(aes32esi, x21, x27, 0x1, 0x707aa7c0, 0x707af2c0, 0x0000ed00, x1, 8, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox32
+ // result rd:x22(0xa455105b), rs1=>rd:x22(0xa47d105b), rs2:x26(0x00ee0000), imm:0x2
+ TEST_RI_OP(aes32esi, x22, x26, 0x2, 0xa455105b, 0xa47d105b, 0x00ee0000, x1, 12, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox32
+ // result rd:x23(0xcd1bcc23), rs1=>rd:x23(0x121bcc23), rs2:x25(0xef000000), imm:0x3
+ TEST_RI_OP(aes32esi, x23, x25, 0x3, 0xcd1bcc23, 0x121bcc23, 0xef000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox32
+ // result rd:x24(0x0000007c), rs1=>rd:x24(0xadea5195), rs2:x24(0x000000f0), imm:0x0
+ TEST_RI_OP(aes32esi, x24, x24, 0x0, 0x0000007c, 0xadea5195, 0x000000f0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox32
+ // result rd:x25(0xd2ff1fc1), rs1=>rd:x25(0xd2ffbec1), rs2:x23(0x0000f100), imm:0x1
+ TEST_RI_OP(aes32esi, x25, x23, 0x1, 0xd2ff1fc1, 0xd2ffbec1, 0x0000f100, x1, 4, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox32
+ // result rd:x26(0xa868a8bb), rs1=>rd:x26(0xa8e1a8bb), rs2:x22(0x00f20000), imm:0x2
+ TEST_RI_OP(aes32esi, x26, x22, 0x2, 0xa868a8bb, 0xa8e1a8bb, 0x00f20000, x1, 8, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox32
+ // result rd:x27(0x45c99fcb), rs1=>rd:x27(0x48c99fcb), rs2:x21(0xf3000000), imm:0x3
+ TEST_RI_OP(aes32esi, x27, x21, 0x3, 0x45c99fcb, 0x48c99fcb, 0xf3000000, x1, 12, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox32
+ // result rd:x28(0x461d52f0), rs1=>rd:x28(0x461d524f), rs2:x20(0x000000f4), imm:0x0
+ TEST_RI_OP(aes32esi, x28, x20, 0x0, 0x461d52f0, 0x461d524f, 0x000000f4, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox32
+ // result rd:x29(0x528af6af), rs1=>rd:x29(0x528a10af), rs2:x19(0x0000f500), imm:0x1
+ TEST_RI_OP(aes32esi, x29, x19, 0x1, 0x528af6af, 0x528a10af, 0x0000f500, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox32
+ // result rd:x30(0xe1d9fbc3), rs1=>rd:x30(0xe19bfbc3), rs2:x18(0x00f60000), imm:0x2
+ TEST_RI_OP(aes32esi, x30, x18, 0x2, 0xe1d9fbc3, 0xe19bfbc3, 0x00f60000, x4, 4, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox32
+ // result rd:x31(0x187af2c0), rs1=>rd:x31(0x707af2c0), rs2:x17(0xf7000000), imm:0x3
+ TEST_RI_OP(aes32esi, x31, x17, 0x3, 0x187af2c0, 0x707af2c0, 0xf7000000, x4, 8, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox32
+ // result rd:x1(0xa47d101a), rs1=>rd:x1(0xa47d105b), rs2:x16(0x000000f8), imm:0x0
+ TEST_RI_OP(aes32esi, x1, x16, 0x0, 0xa47d101a, 0xa47d105b, 0x000000f8, x4, 12, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox32
+ // result rd:x2(0x121b5523), rs1=>rd:x2(0x121bcc23), rs2:x15(0x0000f900), imm:0x1
+ TEST_RI_OP(aes32esi, x2, x15, 0x1, 0x121b5523, 0x121bcc23, 0x0000f900, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox32
+ // result rd:x3(0xadc75195), rs1=>rd:x3(0xadea5195), rs2:x14(0x00fa0000), imm:0x2
+ TEST_RI_OP(aes32esi, x3, x14, 0x2, 0xadc75195, 0xadea5195, 0x00fa0000, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox32
+ // result rd:x4(0xddffbec1), rs1=>rd:x4(0xd2ffbec1), rs2:x13(0xfb000000), imm:0x3
+ TEST_RI_OP(aes32esi, x4, x13, 0x3, 0xddffbec1, 0xd2ffbec1, 0xfb000000, x1, 4, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox32
+ // result rd:x5(0xa8e1a80b), rs1=>rd:x5(0xa8e1a8bb), rs2:x12(0x000000fc), imm:0x0
+ TEST_RI_OP(aes32esi, x5, x12, 0x0, 0xa8e1a80b, 0xa8e1a8bb, 0x000000fc, x1, 8, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox32
+ // result rd:x6(0x48c9cbcb), rs1=>rd:x6(0x48c99fcb), rs2:x11(0x0000fd00), imm:0x1
+ TEST_RI_OP(aes32esi, x6, x11, 0x1, 0x48c9cbcb, 0x48c99fcb, 0x0000fd00, x1, 12, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox32
+ // result rd:x7(0x46a6524f), rs1=>rd:x7(0x461d524f), rs2:x10(0x00fe0000), imm:0x2
+ TEST_RI_OP(aes32esi, x7, x10, 0x2, 0x46a6524f, 0x461d524f, 0x00fe0000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox32
+ // result rd:x8(0x448a10af), rs1=>rd:x8(0x528a10af), rs2:x9(0xff000000), imm:0x3
+ TEST_RI_OP(aes32esi, x8, x9, 0x3, 0x448a10af, 0x528a10af, 0xff000000, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+signature_31_0:
+ .fill 5, 4, 0xdeadbeef
+signature_32_0:
+ .fill 5, 4, 0xdeadbeef
+signature_33_0:
+ .fill 5, 4, 0xdeadbeef
+signature_34_0:
+ .fill 5, 4, 0xdeadbeef
+signature_35_0:
+ .fill 5, 4, 0xdeadbeef
+signature_36_0:
+ .fill 5, 4, 0xdeadbeef
+signature_37_0:
+ .fill 5, 4, 0xdeadbeef
+signature_38_0:
+ .fill 5, 4, 0xdeadbeef
+signature_39_0:
+ .fill 5, 4, 0xdeadbeef
+signature_40_0:
+ .fill 5, 4, 0xdeadbeef
+signature_41_0:
+ .fill 5, 4, 0xdeadbeef
+signature_42_0:
+ .fill 5, 4, 0xdeadbeef
+signature_43_0:
+ .fill 5, 4, 0xdeadbeef
+signature_44_0:
+ .fill 5, 4, 0xdeadbeef
+signature_45_0:
+ .fill 5, 4, 0xdeadbeef
+signature_46_0:
+ .fill 5, 4, 0xdeadbeef
+signature_47_0:
+ .fill 5, 4, 0xdeadbeef
+signature_48_0:
+ .fill 5, 4, 0xdeadbeef
+signature_49_0:
+ .fill 5, 4, 0xdeadbeef
+signature_50_0:
+ .fill 5, 4, 0xdeadbeef
+signature_51_0:
+ .fill 5, 4, 0xdeadbeef
+signature_52_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/AES32ESMI-01.S b/riscof/suite/rv32i_m/K_unratified/AES32ESMI-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..9cfbee4328a63b4ae5b512523f1ad08aaf41a10d
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/AES32ESMI-01.S
@@ -0,0 +1,1053 @@
+// RISC-V Architectural Validation Test AES32ESMI-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes32esmi'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes32esmi)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes32esmi)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x24aa985c), rs1=>rd:x1(0xadea5195), rs2:x16(0x121bcc23), imm:0x3
+ TEST_RI_OP(aes32esmi, x1, x16, 0x3, 0x24aa985c, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x4024f788), rs1=>rd:x2(0xd2ffbec1), rs2:x15(0xa47d105b), imm:0x3
+ TEST_RI_OP(aes32esmi, x2, x15, 0x3, 0x4024f788, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x7d5b12d4), rs1=>rd:x3(0xa8e1a8bb), rs2:x14(0x707af2c0), imm:0x0
+ TEST_RI_OP(aes32esmi, x3, x14, 0x0, 0x7d5b12d4, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xa3da6733), rs1=>rd:x4(0x48c99fcb), rs2:x13(0xe19bfbc3), imm:0x3
+ TEST_RI_OP(aes32esmi, x4, x13, 0x3, 0xa3da6733, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x461d524f), rs1=>rd:x5(0x461d524f), rs2:x12(0x528a10af), imm:0x3
+ TEST_RI_OP(aes32esmi, x5, x12, 0x3, 0x461d524f, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xe6644af5), rs1=>rd:x6(0x528a10af), rs2:x11(0x461d524f), imm:0x3
+ TEST_RI_OP(aes32esmi, x6, x11, 0x3, 0xe6644af5, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x456da991), rs1=>rd:x7(0xe19bfbc3), rs2:x10(0x48c99fcb), imm:0x3
+ TEST_RI_OP(aes32esmi, x7, x10, 0x3, 0x456da991, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xef273002), rs1=>rd:x8(0x707af2c0), rs2:x9(0xa8e1a8bb), imm:0x3
+ TEST_RI_OP(aes32esmi, x8, x9, 0x3, 0xef273002, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x0ad357b2), rs1=>rd:x9(0xa47d105b), rs2:x8(0xd2ffbec1), imm:0x1
+ TEST_RI_OP(aes32esmi, x9, x8, 0x1, 0x0ad357b2, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xc3ca754b), rs1=>rd:x10(0x121bcc23), rs2:x7(0xadea5195), imm:0x1
+ TEST_RI_OP(aes32esmi, x10, x7, 0x1, 0xc3ca754b, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x2c3a1617), rs1=>rd:x11(0x00000001), rs2:x6(0xffffffff), imm:0x3
+ TEST_RI_OP(aes32esmi, x11, x6, 0x3, 0x2c3a1617, 0x00000001, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x16162c38), rs1=>rd:x12(0x00000002), rs2:x5(0x7fffffff), imm:0x1
+ TEST_RI_OP(aes32esmi, x12, x5, 0x1, 0x16162c38, 0x00000002, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x162c3a12), rs1=>rd:x13(0x00000004), rs2:x4(0xbfffffff), imm:0x2
+ TEST_RI_OP(aes32esmi, x13, x4, 0x2, 0x162c3a12, 0x00000004, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x3a161624), rs1=>rd:x14(0x00000008), rs2:x3(0xdfffffff), imm:0x0
+ TEST_RI_OP(aes32esmi, x14, x3, 0x0, 0x3a161624, 0x00000008, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x162c3a06), rs1=>rd:x15(0x00000010), rs2:x2(0xefffffff), imm:0x2
+ TEST_RI_OP(aes32esmi, x15, x2, 0x2, 0x162c3a06, 0x00000010, 0xefffffff, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x16162c1a), rs1=>rd:x16(0x00000020), rs2:x1(0xf7ffffff), imm:0x1
+ TEST_RI_OP(aes32esmi, x16, x1, 0x1, 0x16162c1a, 0x00000020, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x1e110f4f), rs1=>rd:x17(0x00000040), rs2:x31(0xfbffffff), imm:0x3
+ TEST_RI_OP(aes32esmi, x17, x31, 0x3, 0x1e110f4f, 0x00000040, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xa8fc54d4), rs1=>rd:x18(0x00000080), rs2:x30(0xfdffffff), imm:0x3
+ TEST_RI_OP(aes32esmi, x18, x30, 0x3, 0xa8fc54d4, 0x00000080, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x3a16172c), rs1=>rd:x19(0x00000100), rs2:x29(0xfeffffff), imm:0x0
+ TEST_RI_OP(aes32esmi, x19, x29, 0x0, 0x3a16172c, 0x00000100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x2c3a1416), rs1=>rd:x20(0x00000200), rs2:x28(0xff7fffff), imm:0x3
+ TEST_RI_OP(aes32esmi, x20, x28, 0x3, 0x2c3a1416, 0x00000200, 0xff7fffff, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x2c3a1216), rs1=>rd:x21(0x00000400), rs2:x27(0xffbfffff), imm:0x3
+ TEST_RI_OP(aes32esmi, x21, x27, 0x3, 0x2c3a1216, 0x00000400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x2c3a1e16), rs1=>rd:x22(0x00000800), rs2:x26(0xffdfffff), imm:0x3
+ TEST_RI_OP(aes32esmi, x22, x26, 0x3, 0x2c3a1e16, 0x00000800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x2c3a0616), rs1=>rd:x23(0x00001000), rs2:x25(0xffefffff), imm:0x3
+ TEST_RI_OP(aes32esmi, x23, x25, 0x3, 0x2c3a0616, 0x00001000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0xd3cde9e9), rs1=>rd:x24(0x00002000), rs2:x24(0xfff7ffff), imm:0x3
+ TEST_RI_OP(aes32esmi, x24, x24, 0x3, 0xd3cde9e9, 0x00002000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x16166c3a), rs1=>rd:x25(0x00004000), rs2:x23(0xfffbffff), imm:0x1
+ TEST_RI_OP(aes32esmi, x25, x23, 0x1, 0x16166c3a, 0x00004000, 0xfffbffff, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x1616ac3a), rs1=>rd:x26(0x00008000), rs2:x22(0xfffdffff), imm:0x1
+ TEST_RI_OP(aes32esmi, x26, x22, 0x1, 0x1616ac3a, 0x00008000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x2c3b1616), rs1=>rd:x27(0x00010000), rs2:x21(0xfffeffff), imm:0x3
+ TEST_RI_OP(aes32esmi, x27, x21, 0x3, 0x2c3b1616, 0x00010000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0xd2d0bf6d), rs1=>rd:x28(0x00020000), rs2:x20(0xffff7fff), imm:0x1
+ TEST_RI_OP(aes32esmi, x28, x20, 0x1, 0xd2d0bf6d, 0x00020000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x16283a16), rs1=>rd:x29(0x00040000), rs2:x19(0xffffbfff), imm:0x2
+ TEST_RI_OP(aes32esmi, x29, x19, 0x2, 0x16283a16, 0x00040000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x3a1e162c), rs1=>rd:x30(0x00080000), rs2:x18(0xffffdfff), imm:0x0
+ TEST_RI_OP(aes32esmi, x30, x18, 0x0, 0x3a1e162c, 0x00080000, 0xffffdfff, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x163c3a16), rs1=>rd:x31(0x00100000), rs2:x17(0xffffefff), imm:0x2
+ TEST_RI_OP(aes32esmi, x31, x17, 0x2, 0x163c3a16, 0x00100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x6848d0b8), rs1=>rd:x1(0x00200000), rs2:x16(0xfffff7ff), imm:0x1
+ TEST_RI_OP(aes32esmi, x1, x16, 0x1, 0x6848d0b8, 0x00200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x2c7a1616), rs1=>rd:x2(0x00400000), rs2:x15(0xfffffbff), imm:0x3
+ TEST_RI_OP(aes32esmi, x2, x15, 0x3, 0x2c7a1616, 0x00400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x2cba1616), rs1=>rd:x3(0x00800000), rs2:x14(0xfffffdff), imm:0x3
+ TEST_RI_OP(aes32esmi, x3, x14, 0x3, 0x2cba1616, 0x00800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x3b16162c), rs1=>rd:x4(0x01000000), rs2:x13(0xfffffeff), imm:0x0
+ TEST_RI_OP(aes32esmi, x4, x13, 0x0, 0x3b16162c, 0x01000000, 0xfffffeff, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x2e3a1616), rs1=>rd:x5(0x02000000), rs2:x12(0xffffff7f), imm:0x3
+ TEST_RI_OP(aes32esmi, x5, x12, 0x3, 0x2e3a1616, 0x02000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x283a1616), rs1=>rd:x6(0x04000000), rs2:x11(0xffffffbf), imm:0x3
+ TEST_RI_OP(aes32esmi, x6, x11, 0x3, 0x283a1616, 0x04000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x243a1616), rs1=>rd:x7(0x08000000), rs2:x10(0xffffffdf), imm:0x3
+ TEST_RI_OP(aes32esmi, x7, x10, 0x3, 0x243a1616, 0x08000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x3c3a1616), rs1=>rd:x8(0x10000000), rs2:x9(0xffffffef), imm:0x3
+ TEST_RI_OP(aes32esmi, x8, x9, 0x3, 0x3c3a1616, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0c3a1616), rs1=>rd:x9(0x20000000), rs2:x8(0xfffffff7), imm:0x3
+ TEST_RI_OP(aes32esmi, x9, x8, 0x3, 0x0c3a1616, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x56162c3a), rs1=>rd:x10(0x40000000), rs2:x7(0xfffffffb), imm:0x1
+ TEST_RI_OP(aes32esmi, x10, x7, 0x1, 0x56162c3a, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x96162c3a), rs1=>rd:x11(0x80000000), rs2:x6(0xfffffffd), imm:0x1
+ TEST_RI_OP(aes32esmi, x11, x6, 0x1, 0x96162c3a, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x2c3a1616), rs1=>rd:x12(0x00000000), rs2:x5(0xfffffffe), imm:0x3
+ TEST_RI_OP(aes32esmi, x12, x5, 0x3, 0x2c3a1616, 0x00000000, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x9c9c395b), rs1=>rd:x13(0xfffffffe), rs2:x4(0x00000000), imm:0x1
+ TEST_RI_OP(aes32esmi, x13, x4, 0x1, 0x9c9c395b, 0xfffffffe, 0x00000000, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x9c395a9e), rs1=>rd:x14(0xfffffffd), rs2:x3(0x80000000), imm:0x2
+ TEST_RI_OP(aes32esmi, x14, x3, 0x2, 0x9c395a9e, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x5a9c9c3d), rs1=>rd:x15(0xfffffffb), rs2:x2(0x40000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x15, x2, 0x0, 0x5a9c9c3d, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x9c395a94), rs1=>rd:x16(0xfffffff7), rs2:x1(0x20000000), imm:0x2
+ TEST_RI_OP(aes32esmi, x16, x1, 0x2, 0x9c395a94, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x9c9c394a), rs1=>rd:x17(0xffffffef), rs2:x31(0x10000000), imm:0x1
+ TEST_RI_OP(aes32esmi, x17, x31, 0x1, 0x9c9c394a, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x9fafcfef), rs1=>rd:x18(0xffffffdf), rs2:x30(0x08000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x18, x30, 0x3, 0x9fafcfef, 0xffffffdf, 0x08000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x00f20d4d), rs1=>rd:x19(0xffffffbf), rs2:x29(0x04000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x19, x29, 0x3, 0x00f20d4d, 0xffffffbf, 0x04000000, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x5a9c9cb9), rs1=>rd:x20(0xffffff7f), rs2:x28(0x02000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x20, x28, 0x0, 0x5a9c9cb9, 0xffffff7f, 0x02000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x077b8283), rs1=>rd:x21(0xfffffeff), rs2:x27(0x01000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x21, x27, 0x3, 0x077b8283, 0xfffffeff, 0x01000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x395a9e9c), rs1=>rd:x22(0xfffffdff), rs2:x26(0x00800000), imm:0x3
+ TEST_RI_OP(aes32esmi, x22, x26, 0x3, 0x395a9e9c, 0xfffffdff, 0x00800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x395a989c), rs1=>rd:x23(0xfffffbff), rs2:x25(0x00400000), imm:0x3
+ TEST_RI_OP(aes32esmi, x23, x25, 0x3, 0x395a989c, 0xfffffbff, 0x00400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xc6856363), rs1=>rd:x24(0xfffff7ff), rs2:x24(0x00200000), imm:0x3
+ TEST_RI_OP(aes32esmi, x24, x24, 0x3, 0xc6856363, 0xfffff7ff, 0x00200000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x395a8c9c), rs1=>rd:x25(0xffffefff), rs2:x23(0x00100000), imm:0x3
+ TEST_RI_OP(aes32esmi, x25, x23, 0x3, 0x395a8c9c, 0xffffefff, 0x00100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x9c9c195a), rs1=>rd:x26(0xffffdfff), rs2:x22(0x00080000), imm:0x1
+ TEST_RI_OP(aes32esmi, x26, x22, 0x1, 0x9c9c195a, 0xffffdfff, 0x00080000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x9c9c795a), rs1=>rd:x27(0xffffbfff), rs2:x21(0x00040000), imm:0x1
+ TEST_RI_OP(aes32esmi, x27, x21, 0x1, 0x9c9c795a, 0xffffbfff, 0x00040000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x395a1c9c), rs1=>rd:x28(0xffff7fff), rs2:x20(0x00020000), imm:0x3
+ TEST_RI_OP(aes32esmi, x28, x20, 0x3, 0x395a1c9c, 0xffff7fff, 0x00020000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x9c9d395a), rs1=>rd:x29(0xfffeffff), rs2:x19(0x00010000), imm:0x1
+ TEST_RI_OP(aes32esmi, x29, x19, 0x1, 0x9c9d395a, 0xfffeffff, 0x00010000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x9c3b5a9c), rs1=>rd:x30(0xfffdffff), rs2:x18(0x00008000), imm:0x2
+ TEST_RI_OP(aes32esmi, x30, x18, 0x2, 0x9c3b5a9c, 0xfffdffff, 0x00008000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x5a989c39), rs1=>rd:x31(0xfffbffff), rs2:x17(0x00004000), imm:0x0
+ TEST_RI_OP(aes32esmi, x31, x17, 0x0, 0x5a989c39, 0xfffbffff, 0x00004000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x9c315a9c), rs1=>rd:x1(0xfff7ffff), rs2:x16(0x00002000), imm:0x2
+ TEST_RI_OP(aes32esmi, x1, x16, 0x2, 0x9c315a9c, 0xfff7ffff, 0x00002000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x352570ba), rs1=>rd:x2(0xffefffff), rs2:x15(0x00001000), imm:0x1
+ TEST_RI_OP(aes32esmi, x2, x15, 0x1, 0x352570ba, 0xffefffff, 0x00001000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x397a9c9c), rs1=>rd:x3(0xffdfffff), rs2:x14(0x00000800), imm:0x3
+ TEST_RI_OP(aes32esmi, x3, x14, 0x3, 0x397a9c9c, 0xffdfffff, 0x00000800, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x391a9c9c), rs1=>rd:x4(0xffbfffff), rs2:x13(0x00000400), imm:0x3
+ TEST_RI_OP(aes32esmi, x4, x13, 0x3, 0x391a9c9c, 0xffbfffff, 0x00000400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x5a1c9c39), rs1=>rd:x5(0xff7fffff), rs2:x12(0x00000200), imm:0x0
+ TEST_RI_OP(aes32esmi, x5, x12, 0x0, 0x5a1c9c39, 0xff7fffff, 0x00000200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x5b9c9c39), rs1=>rd:x6(0xfeffffff), rs2:x11(0x00000100), imm:0x0
+ TEST_RI_OP(aes32esmi, x6, x11, 0x0, 0x5b9c9c39, 0xfeffffff, 0x00000100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xb132327e), rs1=>rd:x7(0xfdffffff), rs2:x10(0x00000080), imm:0x0
+ TEST_RI_OP(aes32esmi, x7, x10, 0x0, 0xb132327e, 0xfdffffff, 0x00000080, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xe0f6f6ed), rs1=>rd:x8(0xfbffffff), rs2:x9(0x00000040), imm:0x0
+ TEST_RI_OP(aes32esmi, x8, x9, 0x0, 0xe0f6f6ed, 0xfbffffff, 0x00000040, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x3548488a), rs1=>rd:x9(0xf7ffffff), rs2:x8(0x00000020), imm:0x0
+ TEST_RI_OP(aes32esmi, x9, x8, 0x0, 0x3548488a, 0xf7ffffff, 0x00000020, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xaa353570), rs1=>rd:x10(0xefffffff), rs2:x7(0x00000010), imm:0x0
+ TEST_RI_OP(aes32esmi, x10, x7, 0x0, 0xaa353570, 0xefffffff, 0x00000010, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x8fcfcf9f), rs1=>rd:x11(0xdfffffff), rs2:x6(0x00000008), imm:0x0
+ TEST_RI_OP(aes32esmi, x11, x6, 0x0, 0x8fcfcf9f, 0xdfffffff, 0x00000008, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xb20d0d00), rs1=>rd:x12(0xbfffffff), rs2:x5(0x00000004), imm:0x0
+ TEST_RI_OP(aes32esmi, x12, x5, 0x0, 0xb20d0d00, 0xbfffffff, 0x00000004, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xe6888811), rs1=>rd:x13(0x7fffffff), rs2:x4(0x00000002), imm:0x0
+ TEST_RI_OP(aes32esmi, x13, x4, 0x0, 0xe6888811, 0x7fffffff, 0x00000002, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x7b838307), rs1=>rd:x14(0xffffffff), rs2:x3(0x00000001), imm:0x0
+ TEST_RI_OP(aes32esmi, x14, x3, 0x0, 0x7b838307, 0xffffffff, 0x00000001, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xa56363c7), rs1=>rd:x15(0x00000001), rs2:x2(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x15, x2, 0x0, 0xa56363c7, 0x00000001, 0x00000000, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xa56363c4), rs1=>rd:x16(0x00000002), rs2:x1(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x16, x1, 0x0, 0xa56363c4, 0x00000002, 0x00000000, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xa56363c2), rs1=>rd:x17(0x00000004), rs2:x31(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x17, x31, 0x0, 0xa56363c2, 0x00000004, 0x00000000, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xa56363ce), rs1=>rd:x18(0x00000008), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x18, x30, 0x0, 0xa56363ce, 0x00000008, 0x00000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xa56363d6), rs1=>rd:x19(0x00000010), rs2:x29(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x19, x29, 0x0, 0xa56363d6, 0x00000010, 0x00000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xa56363e6), rs1=>rd:x20(0x00000020), rs2:x28(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x20, x28, 0x0, 0xa56363e6, 0x00000020, 0x00000000, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xa5636386), rs1=>rd:x21(0x00000040), rs2:x27(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x21, x27, 0x0, 0xa5636386, 0x00000040, 0x00000000, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xa5636346), rs1=>rd:x22(0x00000080), rs2:x26(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x22, x26, 0x0, 0xa5636346, 0x00000080, 0x00000000, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xa56362c6), rs1=>rd:x23(0x00000100), rs2:x25(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x23, x25, 0x0, 0xa56362c6, 0x00000100, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xa56363c6), rs1=>rd:x24(0x00000200), rs2:x24(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x24, x24, 0x0, 0xa56363c6, 0x00000200, 0x00000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xa56367c6), rs1=>rd:x25(0x00000400), rs2:x23(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x25, x23, 0x0, 0xa56367c6, 0x00000400, 0x00000000, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xa5636bc6), rs1=>rd:x26(0x00000800), rs2:x22(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x26, x22, 0x0, 0xa5636bc6, 0x00000800, 0x00000000, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xa56373c6), rs1=>rd:x27(0x00001000), rs2:x21(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x27, x21, 0x0, 0xa56373c6, 0x00001000, 0x00000000, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xa56343c6), rs1=>rd:x28(0x00002000), rs2:x20(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x28, x20, 0x0, 0xa56343c6, 0x00002000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xa56323c6), rs1=>rd:x29(0x00004000), rs2:x19(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x29, x19, 0x0, 0xa56323c6, 0x00004000, 0x00000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xa563e3c6), rs1=>rd:x30(0x00008000), rs2:x18(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x30, x18, 0x0, 0xa563e3c6, 0x00008000, 0x00000000, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xa56263c6), rs1=>rd:x31(0x00010000), rs2:x17(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x31, x17, 0x0, 0xa56263c6, 0x00010000, 0x00000000, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xa56163c6), rs1=>rd:x1(0x00020000), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x1, x16, 0x0, 0xa56163c6, 0x00020000, 0x00000000, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xa56763c6), rs1=>rd:x2(0x00040000), rs2:x15(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x2, x15, 0x0, 0xa56763c6, 0x00040000, 0x00000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xa56b63c6), rs1=>rd:x3(0x00080000), rs2:x14(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x3, x14, 0x0, 0xa56b63c6, 0x00080000, 0x00000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xa57363c6), rs1=>rd:x4(0x00100000), rs2:x13(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x4, x13, 0x0, 0xa57363c6, 0x00100000, 0x00000000, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xa54363c6), rs1=>rd:x5(0x00200000), rs2:x12(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x5, x12, 0x0, 0xa54363c6, 0x00200000, 0x00000000, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xa52363c6), rs1=>rd:x6(0x00400000), rs2:x11(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x6, x11, 0x0, 0xa52363c6, 0x00400000, 0x00000000, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xa5e363c6), rs1=>rd:x7(0x00800000), rs2:x10(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x7, x10, 0x0, 0xa5e363c6, 0x00800000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xa46363c6), rs1=>rd:x8(0x01000000), rs2:x9(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x8, x9, 0x0, 0xa46363c6, 0x01000000, 0x00000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xa76363c6), rs1=>rd:x9(0x02000000), rs2:x8(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x9, x8, 0x0, 0xa76363c6, 0x02000000, 0x00000000, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xa16363c6), rs1=>rd:x10(0x04000000), rs2:x7(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x10, x7, 0x0, 0xa16363c6, 0x04000000, 0x00000000, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xad6363c6), rs1=>rd:x11(0x08000000), rs2:x6(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x11, x6, 0x0, 0xad6363c6, 0x08000000, 0x00000000, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xb56363c6), rs1=>rd:x12(0x10000000), rs2:x5(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x12, x5, 0x0, 0xb56363c6, 0x10000000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x856363c6), rs1=>rd:x13(0x20000000), rs2:x4(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x13, x4, 0x0, 0x856363c6, 0x20000000, 0x00000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xe56363c6), rs1=>rd:x14(0x40000000), rs2:x3(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x14, x3, 0x0, 0xe56363c6, 0x40000000, 0x00000000, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x256363c6), rs1=>rd:x15(0x80000000), rs2:x2(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x15, x2, 0x0, 0x256363c6, 0x80000000, 0x00000000, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xa56363c6), rs1=>rd:x16(0x00000000), rs2:x1(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x16, x1, 0x0, 0xa56363c6, 0x00000000, 0x00000000, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x5a9c9c38), rs1=>rd:x17(0xfffffffe), rs2:x31(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x17, x31, 0x0, 0x5a9c9c38, 0xfffffffe, 0x00000000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x5a9c9c3b), rs1=>rd:x18(0xfffffffd), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x18, x30, 0x0, 0x5a9c9c3b, 0xfffffffd, 0x00000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x5a9c9c3d), rs1=>rd:x19(0xfffffffb), rs2:x29(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x19, x29, 0x0, 0x5a9c9c3d, 0xfffffffb, 0x00000000, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x5a9c9c31), rs1=>rd:x20(0xfffffff7), rs2:x28(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x20, x28, 0x0, 0x5a9c9c31, 0xfffffff7, 0x00000000, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x5a9c9c29), rs1=>rd:x21(0xffffffef), rs2:x27(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x21, x27, 0x0, 0x5a9c9c29, 0xffffffef, 0x00000000, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x5a9c9c19), rs1=>rd:x22(0xffffffdf), rs2:x26(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x22, x26, 0x0, 0x5a9c9c19, 0xffffffdf, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x5a9c9c79), rs1=>rd:x23(0xffffffbf), rs2:x25(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x23, x25, 0x0, 0x5a9c9c79, 0xffffffbf, 0x00000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xa56363c6), rs1=>rd:x24(0xffffff7f), rs2:x24(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x24, x24, 0x0, 0xa56363c6, 0xffffff7f, 0x00000000, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x5a9c9d39), rs1=>rd:x25(0xfffffeff), rs2:x23(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x25, x23, 0x0, 0x5a9c9d39, 0xfffffeff, 0x00000000, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x5a9c9e39), rs1=>rd:x26(0xfffffdff), rs2:x22(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x26, x22, 0x0, 0x5a9c9e39, 0xfffffdff, 0x00000000, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x5a9c9839), rs1=>rd:x27(0xfffffbff), rs2:x21(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x27, x21, 0x0, 0x5a9c9839, 0xfffffbff, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x5a9c9439), rs1=>rd:x28(0xfffff7ff), rs2:x20(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x28, x20, 0x0, 0x5a9c9439, 0xfffff7ff, 0x00000000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x5a9c8c39), rs1=>rd:x29(0xffffefff), rs2:x19(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x29, x19, 0x0, 0x5a9c8c39, 0xffffefff, 0x00000000, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x5a9cbc39), rs1=>rd:x30(0xffffdfff), rs2:x18(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x30, x18, 0x0, 0x5a9cbc39, 0xffffdfff, 0x00000000, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x5a9cdc39), rs1=>rd:x31(0xffffbfff), rs2:x17(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x31, x17, 0x0, 0x5a9cdc39, 0xffffbfff, 0x00000000, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x5a9c1c39), rs1=>rd:x1(0xffff7fff), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x1, x16, 0x0, 0x5a9c1c39, 0xffff7fff, 0x00000000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x5a9d9c39), rs1=>rd:x2(0xfffeffff), rs2:x15(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x2, x15, 0x0, 0x5a9d9c39, 0xfffeffff, 0x00000000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x5a9e9c39), rs1=>rd:x3(0xfffdffff), rs2:x14(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x3, x14, 0x0, 0x5a9e9c39, 0xfffdffff, 0x00000000, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x5a989c39), rs1=>rd:x4(0xfffbffff), rs2:x13(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x4, x13, 0x0, 0x5a989c39, 0xfffbffff, 0x00000000, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x5a949c39), rs1=>rd:x5(0xfff7ffff), rs2:x12(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x5, x12, 0x0, 0x5a949c39, 0xfff7ffff, 0x00000000, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x5a8c9c39), rs1=>rd:x6(0xffefffff), rs2:x11(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x6, x11, 0x0, 0x5a8c9c39, 0xffefffff, 0x00000000, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x5abc9c39), rs1=>rd:x7(0xffdfffff), rs2:x10(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x7, x10, 0x0, 0x5abc9c39, 0xffdfffff, 0x00000000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x5adc9c39), rs1=>rd:x8(0xffbfffff), rs2:x9(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x8, x9, 0x0, 0x5adc9c39, 0xffbfffff, 0x00000000, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x39da9c9c), rs1=>rd:x9(0xff7fffff), rs2:x8(0x00000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x9, x8, 0x3, 0x39da9c9c, 0xff7fffff, 0x00000000, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x385a9c9c), rs1=>rd:x10(0xfeffffff), rs2:x7(0x00000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x10, x7, 0x3, 0x385a9c9c, 0xfeffffff, 0x00000000, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x3b5a9c9c), rs1=>rd:x11(0xfdffffff), rs2:x6(0x00000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x11, x6, 0x3, 0x3b5a9c9c, 0xfdffffff, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x3d5a9c9c), rs1=>rd:x12(0xfbffffff), rs2:x5(0x00000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x12, x5, 0x3, 0x3d5a9c9c, 0xfbffffff, 0x00000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x949c395a), rs1=>rd:x13(0xf7ffffff), rs2:x4(0x00000000), imm:0x1
+ TEST_RI_OP(aes32esmi, x13, x4, 0x1, 0x949c395a, 0xf7ffffff, 0x00000000, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x8c9c395a), rs1=>rd:x14(0xefffffff), rs2:x3(0x00000000), imm:0x1
+ TEST_RI_OP(aes32esmi, x14, x3, 0x1, 0x8c9c395a, 0xefffffff, 0x00000000, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x195a9c9c), rs1=>rd:x15(0xdfffffff), rs2:x2(0x00000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x15, x2, 0x3, 0x195a9c9c, 0xdfffffff, 0x00000000, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xdc9c395a), rs1=>rd:x16(0xbfffffff), rs2:x1(0x00000000), imm:0x1
+ TEST_RI_OP(aes32esmi, x16, x1, 0x1, 0xdc9c395a, 0xbfffffff, 0x00000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x1c395a9c), rs1=>rd:x17(0x7fffffff), rs2:x31(0x00000000), imm:0x2
+ TEST_RI_OP(aes32esmi, x17, x31, 0x2, 0x1c395a9c, 0x7fffffff, 0x00000000, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x5a9c9c39), rs1=>rd:x18(0xffffffff), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x18, x30, 0x0, 0x5a9c9c39, 0xffffffff, 0x00000000, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0x02afbb3a), rs1=>rd:x19(0xadea5195), rs2:x29(0x121bcc23), imm:0x2
+ TEST_RI_OP(aes32esmi, x19, x29, 0x2, 0x02afbb3a, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1=>rd:x0(0xd2ffbec1), rs2:x28(0xa47d105b), imm:0x1
+ TEST_RI_OP(aes32esmi, x0, x28, 0x1, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x6e44cbd8), rs1=>rd:x21(0xa8e1a8bb), rs2:x0(0x707af2c0), imm:0x3
+ TEST_RI_OP(aes32esmi, x21, x0, 0x3, 0x6e44cbd8, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with random values
+ // result rd:x22(0xa3da6733), rs1=>rd:x22(0x48c99fcb), rs2:x26(0xe19bfbc3), imm:0x3
+ TEST_RI_OP(aes32esmi, x22, x26, 0x3, 0xa3da6733, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/AES32ESMI-02.S b/riscof/suite/rv32i_m/K_unratified/AES32ESMI-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..56fda70d6b6c3bfa0884240f7c7139adc3a44373
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/AES32ESMI-02.S
@@ -0,0 +1,1780 @@
+// RISC-V Architectural Validation Test AES32ESMI-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes32esmi'.
+// Using dataset: sbox32
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes32esmi)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes32esmi)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox32
+ // result rd:x1(0x08893253), rs1=>rd:x1(0xadea5195), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(aes32esmi, x1, x16, 0x0, 0x08893253, 0xadea5195, 0x00000000, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox32
+ // result rd:x2(0xae834645), rs1=>rd:x2(0xd2ffbec1), rs2:x15(0x00000100), imm:0x1
+ TEST_RI_OP(aes32esmi, x2, x15, 0x1, 0xae834645, 0xd2ffbec1, 0x00000100, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox32
+ // result rd:x3(0xdf0f31cc), rs1=>rd:x3(0xa8e1a8bb), rs2:x14(0x00020000), imm:0x2
+ TEST_RI_OP(aes32esmi, x3, x14, 0x2, 0xdf0f31cc, 0xa8e1a8bb, 0x00020000, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox32
+ // result rd:x4(0xbe44e4b0), rs1=>rd:x4(0x48c99fcb), rs2:x13(0x03000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x4, x13, 0x3, 0xbe44e4b0, 0x48c99fcb, 0x03000000, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox32
+ // result rd:x5(0x4befa0b0), rs1=>rd:x5(0x461d524f), rs2:x12(0x00000004), imm:0x0
+ TEST_RI_OP(aes32esmi, x5, x12, 0x0, 0x4befa0b0, 0x461d524f, 0x00000004, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox32
+ // result rd:x6(0x39e1c612), rs1=>rd:x6(0x528a10af), rs2:x11(0x00000500), imm:0x1
+ TEST_RI_OP(aes32esmi, x6, x11, 0x1, 0x39e1c612, 0x528a10af, 0x00000500, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox32
+ // result rd:x7(0x8e454aac), rs1=>rd:x7(0xe19bfbc3), rs2:x10(0x00060000), imm:0x2
+ TEST_RI_OP(aes32esmi, x7, x10, 0x2, 0x8e454aac, 0xe19bfbc3, 0x00060000, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox32
+ // result rd:x8(0xe12e3705), rs1=>rd:x8(0x707af2c0), rs2:x9(0x07000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x8, x9, 0x3, 0xe12e3705, 0x707af2c0, 0x07000000, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox32
+ // result rd:x9(0xf44d203b), rs1=>rd:x9(0xa47d105b), rs2:x8(0x00000008), imm:0x0
+ TEST_RI_OP(aes32esmi, x9, x8, 0x0, 0xf44d203b, 0xa47d105b, 0x00000008, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox32
+ // result rd:x10(0x131ace20), rs1=>rd:x10(0x121bcc23), rs2:x7(0x00000900), imm:0x1
+ TEST_RI_OP(aes32esmi, x10, x7, 0x1, 0x131ace20, 0x121bcc23, 0x00000900, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox32
+ // result rd:x11(0xca24f8f2), rs1=>rd:x11(0xadea5195), rs2:x6(0x000a0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x11, x6, 0x2, 0xca24f8f2, 0xadea5195, 0x000a0000, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox32
+ // result rd:x12(0x848295ea), rs1=>rd:x12(0xd2ffbec1), rs2:x5(0x0b000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x12, x5, 0x3, 0x848295ea, 0xd2ffbec1, 0x0b000000, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox32
+ // result rd:x13(0xb11f565c), rs1=>rd:x13(0xa8e1a8bb), rs2:x4(0x0000000c), imm:0x0
+ TEST_RI_OP(aes32esmi, x13, x4, 0x0, 0xb11f565c, 0xa8e1a8bb, 0x0000000c, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox32
+ // result rd:x14(0x9f1e2aa9), rs1=>rd:x14(0x48c99fcb), rs2:x3(0x00000d00), imm:0x1
+ TEST_RI_OP(aes32esmi, x14, x3, 0x1, 0x9f1e2aa9, 0x48c99fcb, 0x00000d00, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox32
+ // result rd:x15(0xed50b4e4), rs1=>rd:x15(0x461d524f), rs2:x2(0x000e0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x15, x2, 0x2, 0xed50b4e4, 0x461d524f, 0x000e0000, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox32
+ // result rd:x16(0xbe1066d9), rs1=>rd:x16(0x528a10af), rs2:x1(0x0f000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x16, x1, 0x3, 0xbe1066d9, 0x528a10af, 0x0f000000, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox32
+ // result rd:x17(0xa451314c), rs1=>rd:x17(0xe19bfbc3), rs2:x31(0x00000010), imm:0x0
+ TEST_RI_OP(aes32esmi, x17, x31, 0x0, 0xa451314c, 0xe19bfbc3, 0x00000010, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox32
+ // result rd:x18(0xf2f8ed5d), rs1=>rd:x18(0x707af2c0), rs2:x30(0x00001100), imm:0x1
+ TEST_RI_OP(aes32esmi, x18, x30, 0x1, 0xf2f8ed5d, 0x707af2c0, 0x00001100, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox32
+ // result rd:x19(0x6df45092), rs1=>rd:x19(0xa47d105b), rs2:x29(0x00120000), imm:0x2
+ TEST_RI_OP(aes32esmi, x19, x29, 0x2, 0x6df45092, 0xa47d105b, 0x00120000, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox32
+ // result rd:x20(0xe89cb15e), rs1=>rd:x20(0x121bcc23), rs2:x28(0x13000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x20, x28, 0x3, 0xe89cb15e, 0x121bcc23, 0x13000000, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox32
+ // result rd:x21(0xb810ab7a), rs1=>rd:x21(0xadea5195), rs2:x27(0x00000014), imm:0x0
+ TEST_RI_OP(aes32esmi, x21, x27, 0x0, 0xb810ab7a, 0xadea5195, 0x00000014, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox32
+ // result rd:x22(0x8ba60c2a), rs1=>rd:x22(0xd2ffbec1), rs2:x26(0x00001500), imm:0x1
+ TEST_RI_OP(aes32esmi, x22, x26, 0x1, 0x8ba60c2a, 0xd2ffbec1, 0x00001500, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox32
+ // result rd:x23(0xef6f61fc), rs1=>rd:x23(0xa8e1a8bb), rs2:x25(0x00160000), imm:0x2
+ TEST_RI_OP(aes32esmi, x23, x25, 0x2, 0xef6f61fc, 0xa8e1a8bb, 0x00160000, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox32
+ // result rd:x24(0xec0bf0f0), rs1=>rd:x24(0x48c99fcb), rs2:x24(0x17000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x24, x24, 0x3, 0xec0bf0f0, 0x48c99fcb, 0x17000000, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox32
+ // result rd:x25(0xaab0ff0e), rs1=>rd:x25(0x461d524f), rs2:x23(0x00000018), imm:0x0
+ TEST_RI_OP(aes32esmi, x25, x23, 0x0, 0xaab0ff0e, 0x461d524f, 0x00000018, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox32
+ // result rd:x26(0x865ea3c8), rs1=>rd:x26(0x528a10af), rs2:x22(0x00001900), imm:0x1
+ TEST_RI_OP(aes32esmi, x26, x22, 0x1, 0x865ea3c8, 0x528a10af, 0x00001900, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox32
+ // result rd:x27(0x43c40661), rs1=>rd:x27(0xe19bfbc3), rs2:x21(0x001a0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x27, x21, 0x2, 0x43c40661, 0xe19bfbc3, 0x001a0000, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox32
+ // result rd:x28(0x35905d6f), rs1=>rd:x28(0x707af2c0), rs2:x20(0x1b000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x28, x20, 0x3, 0x35905d6f, 0x707af2c0, 0x1b000000, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox32
+ // result rd:x29(0x1be18c78), rs1=>rd:x29(0xa47d105b), rs2:x19(0x0000001c), imm:0x0
+ TEST_RI_OP(aes32esmi, x29, x19, 0x0, 0x1be18c78, 0xa47d105b, 0x0000001c, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox32
+ // result rd:x30(0xb6bf9fd4), rs1=>rd:x30(0x121bcc23), rs2:x18(0x00001d00), imm:0x1
+ TEST_RI_OP(aes32esmi, x30, x18, 0x1, 0xb6bf9fd4, 0x121bcc23, 0x00001d00, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox32
+ // result rd:x31(0xdf0ec7e7), rs1=>rd:x31(0xadea5195), rs2:x17(0x001e0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x31, x17, 0x2, 0xdf0ec7e7, 0xadea5195, 0x001e0000, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox32
+ // result rd:x1(0x49a47e01), rs1=>rd:x1(0xd2ffbec1), rs2:x16(0x1f000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x1, x16, 0x3, 0x49a47e01, 0xd2ffbec1, 0x1f000000, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox32
+ // result rd:x2(0x6a561fce), rs1=>rd:x2(0xa8e1a8bb), rs2:x15(0x00000020), imm:0x0
+ TEST_RI_OP(aes32esmi, x2, x15, 0x0, 0x6a561fce, 0xa8e1a8bb, 0x00000020, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox32
+ // result rd:x3(0xb5347ed7), rs1=>rd:x3(0x48c99fcb), rs2:x14(0x00002100), imm:0x1
+ TEST_RI_OP(aes32esmi, x3, x14, 0x1, 0xb5347ed7, 0x48c99fcb, 0x00002100, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox32
+ // result rd:x4(0xd520fcdc), rs1=>rd:x4(0x461d524f), rs2:x13(0x00220000), imm:0x2
+ TEST_RI_OP(aes32esmi, x4, x13, 0x2, 0xd520fcdc, 0x461d524f, 0x00220000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox32
+ // result rd:x5(0x1ee03689), rs1=>rd:x5(0x528a10af), rs2:x12(0x23000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x5, x12, 0x3, 0x1ee03689, 0x528a10af, 0x23000000, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox32
+ // result rd:x6(0xbbadcdaf), rs1=>rd:x6(0xe19bfbc3), rs2:x11(0x00000024), imm:0x0
+ TEST_RI_OP(aes32esmi, x6, x11, 0x0, 0xbbadcdaf, 0xe19bfbc3, 0x00000024, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox32
+ // result rd:x7(0x4f458c81), rs1=>rd:x7(0x707af2c0), rs2:x10(0x00002500), imm:0x1
+ TEST_RI_OP(aes32esmi, x7, x10, 0x1, 0x4f458c81, 0x707af2c0, 0x00002500, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox32
+ // result rd:x8(0x538812ac), rs1=>rd:x8(0xa47d105b), rs2:x9(0x00260000), imm:0x2
+ TEST_RI_OP(aes32esmi, x8, x9, 0x2, 0x538812ac, 0xa47d105b, 0x00260000, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox32
+ // result rd:x9(0x915400ef), rs1=>rd:x9(0x121bcc23), rs2:x8(0x27000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x9, x8, 0x3, 0x915400ef, 0x121bcc23, 0x27000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox32
+ // result rd:x10(0xf1de65fd), rs1=>rd:x10(0xadea5195), rs2:x7(0x00000028), imm:0x0
+ TEST_RI_OP(aes32esmi, x10, x7, 0x0, 0xf1de65fd, 0xadea5195, 0x00000028, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox32
+ // result rd:x11(0x775aef35), rs1=>rd:x11(0xd2ffbec1), rs2:x6(0x00002900), imm:0x1
+ TEST_RI_OP(aes32esmi, x11, x6, 0x1, 0x775aef35, 0xd2ffbec1, 0x00002900, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox32
+ // result rd:x12(0x4d309c5e), rs1=>rd:x12(0xa8e1a8bb), rs2:x5(0x002a0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x12, x5, 0x2, 0x4d309c5e, 0xa8e1a8bb, 0x002a0000, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox32
+ // result rd:x13(0xb1c16e3a), rs1=>rd:x13(0x48c99fcb), rs2:x4(0x2b000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x13, x4, 0x3, 0xb1c16e3a, 0x48c99fcb, 0x2b000000, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox32
+ // result rd:x14(0xd56c23ad), rs1=>rd:x14(0x461d524f), rs2:x3(0x0000002c), imm:0x0
+ TEST_RI_OP(aes32esmi, x14, x3, 0x0, 0xd56c23ad, 0x461d524f, 0x0000002c, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox32
+ // result rd:x15(0x8a52bbdc), rs1=>rd:x15(0x528a10af), rs2:x2(0x00002d00), imm:0x1
+ TEST_RI_OP(aes32esmi, x15, x2, 0x1, 0x8a52bbdc, 0x528a10af, 0x00002d00, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox32
+ // result rd:x16(0xd0f9a8f2), rs1=>rd:x16(0xe19bfbc3), rs2:x1(0x002e0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x16, x1, 0x2, 0xd0f9a8f2, 0xe19bfbc3, 0x002e0000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox32
+ // result rd:x17(0x5a45e7d5), rs1=>rd:x17(0x707af2c0), rs2:x31(0x2f000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x17, x31, 0x3, 0x5a45e7d5, 0x707af2c0, 0x2f000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox32
+ // result rd:x18(0xa8791453), rs1=>rd:x18(0xa47d105b), rs2:x30(0x00000030), imm:0x0
+ TEST_RI_OP(aes32esmi, x18, x30, 0x0, 0xa8791453, 0xa47d105b, 0x00000030, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox32
+ // result rd:x19(0xd5dc5971), rs1=>rd:x19(0x121bcc23), rs2:x29(0x00003100), imm:0x1
+ TEST_RI_OP(aes32esmi, x19, x29, 0x1, 0xd5dc5971, 0x121bcc23, 0x00003100, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox32
+ // result rd:x20(0x8eac34b6), rs1=>rd:x20(0xadea5195), rs2:x28(0x00320000), imm:0x2
+ TEST_RI_OP(aes32esmi, x20, x28, 0x2, 0x8eac34b6, 0xadea5195, 0x00320000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox32
+ // result rd:x21(0x4fa17d02), rs1=>rd:x21(0xd2ffbec1), rs2:x27(0x33000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x21, x27, 0x3, 0x4fa17d02, 0xd2ffbec1, 0x33000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox32
+ // result rd:x22(0x80f9b08b), rs1=>rd:x22(0xa8e1a8bb), rs2:x26(0x00000034), imm:0x0
+ TEST_RI_OP(aes32esmi, x22, x26, 0x0, 0x80f9b08b, 0xa8e1a8bb, 0x00000034, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox32
+ // result rd:x23(0xde5fa86a), rs1=>rd:x23(0x48c99fcb), rs2:x25(0x00003500), imm:0x1
+ TEST_RI_OP(aes32esmi, x23, x25, 0x1, 0xde5fa86a, 0x48c99fcb, 0x00003500, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox32
+ // result rd:x24(0x053c0f05), rs1=>rd:x24(0x461d524f), rs2:x24(0x00360000), imm:0x2
+ TEST_RI_OP(aes32esmi, x24, x24, 0x2, 0x053c0f05, 0x461d524f, 0x00360000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox32
+ // result rd:x25(0x7d3f8a35), rs1=>rd:x25(0x528a10af), rs2:x23(0x37000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x25, x23, 0x3, 0x7d3f8a35, 0x528a10af, 0x37000000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox32
+ // result rd:x26(0xe89cfccd), rs1=>rd:x26(0xe19bfbc3), rs2:x22(0x00000038), imm:0x0
+ TEST_RI_OP(aes32esmi, x26, x22, 0x0, 0xe89cfccd, 0xe19bfbc3, 0x00000038, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox32
+ // result rd:x27(0x6268d6f6), rs1=>rd:x27(0x707af2c0), rs2:x21(0x00003900), imm:0x1
+ TEST_RI_OP(aes32esmi, x27, x21, 0x1, 0x6268d6f6, 0x707af2c0, 0x00003900, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox32
+ // result rd:x28(0x24668bdb), rs1=>rd:x28(0xa47d105b), rs2:x20(0x003a0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x28, x20, 0x2, 0x24668bdb, 0xa47d105b, 0x003a0000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox32
+ // result rd:x29(0xcd262ec1), rs1=>rd:x29(0x121bcc23), rs2:x19(0x3b000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x29, x19, 0x3, 0xcd262ec1, 0x121bcc23, 0x3b000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox32
+ // result rd:x30(0x8b01ba58), rs1=>rd:x30(0xadea5195), rs2:x18(0x0000003c), imm:0x0
+ TEST_RI_OP(aes32esmi, x30, x18, 0x0, 0x8b01ba58, 0xadea5195, 0x0000003c, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox32
+ // result rd:x31(0xf5d8f0a8), rs1=>rd:x31(0xd2ffbec1), rs2:x17(0x00003d00), imm:0x1
+ TEST_RI_OP(aes32esmi, x31, x17, 0x1, 0xf5d8f0a8, 0xd2ffbec1, 0x00003d00, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox32
+ // result rd:x1(0x1a9e6509), rs1=>rd:x1(0xa8e1a8bb), rs2:x16(0x003e0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x1, x16, 0x2, 0x1a9e6509, 0xa8e1a8bb, 0x003e0000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox32
+ // result rd:x2(0xa256eabe), rs1=>rd:x2(0x48c99fcb), rs2:x15(0x3f000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x2, x15, 0x3, 0xa256eabe, 0x48c99fcb, 0x3f000000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox32
+ // result rd:x3(0x5d145b5d), rs1=>rd:x3(0x461d524f), rs2:x14(0x00000040), imm:0x0
+ TEST_RI_OP(aes32esmi, x3, x14, 0x0, 0x5d145b5d, 0x461d524f, 0x00000040, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox32
+ // result rd:x4(0xd1090d31), rs1=>rd:x4(0x528a10af), rs2:x13(0x00004100), imm:0x1
+ TEST_RI_OP(aes32esmi, x4, x13, 0x1, 0xd1090d31, 0x528a10af, 0x00004100, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox32
+ // result rd:x5(0xcdc38fef), rs1=>rd:x5(0xe19bfbc3), rs2:x12(0x00420000), imm:0x2
+ TEST_RI_OP(aes32esmi, x5, x12, 0x2, 0xcdc38fef, 0xe19bfbc3, 0x00420000, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox32
+ // result rd:x6(0x4454e8da), rs1=>rd:x6(0x707af2c0), rs2:x11(0x43000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x6, x11, 0x3, 0x4454e8da, 0x707af2c0, 0x43000000, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox32
+ // result rd:x7(0x89660b6d), rs1=>rd:x7(0xa47d105b), rs2:x10(0x00000044), imm:0x0
+ TEST_RI_OP(aes32esmi, x7, x10, 0x0, 0x89660b6d, 0xa47d105b, 0x00000044, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox32
+ // result rd:x8(0x7c751091), rs1=>rd:x8(0x121bcc23), rs2:x9(0x00004500), imm:0x1
+ TEST_RI_OP(aes32esmi, x8, x9, 0x1, 0x7c751091, 0x121bcc23, 0x00004500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox32
+ // result rd:x9(0xf75ebfcf), rs1=>rd:x9(0xadea5195), rs2:x8(0x00460000), imm:0x2
+ TEST_RI_OP(aes32esmi, x9, x8, 0x2, 0xf75ebfcf, 0xadea5195, 0x00460000, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox32
+ // result rd:x10(0x89041e61), rs1=>rd:x10(0xd2ffbec1), rs2:x7(0x47000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x10, x7, 0x3, 0x89041e61, 0xd2ffbec1, 0x47000000, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox32
+ // result rd:x11(0x5eb3fa1f), rs1=>rd:x11(0xa8e1a8bb), rs2:x6(0x00000048), imm:0x0
+ TEST_RI_OP(aes32esmi, x11, x6, 0x0, 0x5eb3fa1f, 0xa8e1a8bb, 0x00000048, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox32
+ // result rd:x12(0x73f2e986), rs1=>rd:x12(0x48c99fcb), rs2:x5(0x00004900), imm:0x1
+ TEST_RI_OP(aes32esmi, x12, x5, 0x1, 0x73f2e986, 0x48c99fcb, 0x00004900, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox32
+ // result rd:x13(0x90aa3399), rs1=>rd:x13(0x461d524f), rs2:x4(0x004a0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x13, x4, 0x2, 0x90aa3399, 0x461d524f, 0x004a0000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox32
+ // result rd:x14(0x2f44a31c), rs1=>rd:x14(0x528a10af), rs2:x3(0x4b000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x14, x3, 0x3, 0x2f44a31c, 0x528a10af, 0x4b000000, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox32
+ // result rd:x15(0x9ab2d291), rs1=>rd:x15(0xe19bfbc3), rs2:x2(0x0000004c), imm:0x0
+ TEST_RI_OP(aes32esmi, x15, x2, 0x0, 0x9ab2d291, 0xe19bfbc3, 0x0000004c, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox32
+ // result rd:x16(0x93992ffe), rs1=>rd:x16(0x707af2c0), rs2:x1(0x00004d00), imm:0x1
+ TEST_RI_OP(aes32esmi, x16, x1, 0x1, 0x93992ffe, 0x707af2c0, 0x00004d00, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox32
+ // result rd:x17(0x8b236174), rs1=>rd:x17(0xa47d105b), rs2:x31(0x004e0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x17, x31, 0x2, 0x8b236174, 0xa47d105b, 0x004e0000, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox32
+ // result rd:x18(0x018c48a7), rs1=>rd:x18(0x121bcc23), rs2:x30(0x4f000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x18, x30, 0x3, 0x018c48a7, 0x121bcc23, 0x4f000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox32
+ // result rd:x19(0x58b90233), rs1=>rd:x19(0xadea5195), rs2:x29(0x00000050), imm:0x0
+ TEST_RI_OP(aes32esmi, x19, x29, 0x0, 0x58b90233, 0xadea5195, 0x00000050, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox32
+ // result rd:x20(0x032e07a9), rs1=>rd:x20(0xd2ffbec1), rs2:x28(0x00005100), imm:0x1
+ TEST_RI_OP(aes32esmi, x20, x28, 0x1, 0x032e07a9, 0xd2ffbec1, 0x00005100, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox32
+ // result rd:x21(0xa8e1a8bb), rs1=>rd:x21(0xa8e1a8bb), rs2:x27(0x00520000), imm:0x2
+ TEST_RI_OP(aes32esmi, x21, x27, 0x2, 0xa8e1a8bb, 0xa8e1a8bb, 0x00520000, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox32
+ // result rd:x22(0x89e57226), rs1=>rd:x22(0x48c99fcb), rs2:x26(0x53000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x22, x26, 0x3, 0x89e57226, 0x48c99fcb, 0x53000000, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox32
+ // result rd:x23(0x263d720f), rs1=>rd:x23(0x461d524f), rs2:x25(0x00000054), imm:0x0
+ TEST_RI_OP(aes32esmi, x23, x25, 0x0, 0x263d720f, 0x461d524f, 0x00000054, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox32
+ // result rd:x24(0xfcfcb61f), rs1=>rd:x24(0x528a10af), rs2:x24(0x00005500), imm:0x1
+ TEST_RI_OP(aes32esmi, x24, x24, 0x1, 0xfcfcb61f, 0x528a10af, 0x00005500, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox32
+ // result rd:x25(0x50e23372), rs1=>rd:x25(0xe19bfbc3), rs2:x23(0x00560000), imm:0x2
+ TEST_RI_OP(aes32esmi, x25, x23, 0x2, 0x50e23372, 0xe19bfbc3, 0x00560000, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox32
+ // result rd:x26(0xc697a99b), rs1=>rd:x26(0x707af2c0), rs2:x22(0x57000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x26, x22, 0x3, 0xc697a99b, 0x707af2c0, 0x57000000, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox32
+ // result rd:x27(0x1a177a8f), rs1=>rd:x27(0xa47d105b), rs2:x21(0x00000058), imm:0x0
+ TEST_RI_OP(aes32esmi, x27, x21, 0x0, 0x1a177a8f, 0xa47d105b, 0x00000058, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox32
+ // result rd:x28(0xd9d04165), rs1=>rd:x28(0x121bcc23), rs2:x20(0x00005900), imm:0x1
+ TEST_RI_OP(aes32esmi, x28, x20, 0x1, 0xd9d04165, 0x121bcc23, 0x00005900, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox32
+ // result rd:x29(0x138d882b), rs1=>rd:x29(0xadea5195), rs2:x19(0x005a0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x29, x19, 0x2, 0x138d882b, 0xadea5195, 0x005a0000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox32
+ // result rd:x30(0xa0b487f8), rs1=>rd:x30(0xd2ffbec1), rs2:x18(0x5b000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x30, x18, 0x3, 0xa0b487f8, 0xd2ffbec1, 0x5b000000, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox32
+ // result rd:x31(0x76abe22f), rs1=>rd:x31(0xa8e1a8bb), rs2:x17(0x0000005c), imm:0x0
+ TEST_RI_OP(aes32esmi, x31, x17, 0x0, 0x76abe22f, 0xa8e1a8bb, 0x0000005c, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox32
+ // result rd:x1(0x0485071f), rs1=>rd:x1(0x48c99fcb), rs2:x16(0x00005d00), imm:0x1
+ TEST_RI_OP(aes32esmi, x1, x16, 0x1, 0x0485071f, 0x48c99fcb, 0x00005d00, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox32
+ // result rd:x2(0x1eadba17), rs1=>rd:x2(0x461d524f), rs2:x15(0x005e0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x2, x15, 0x2, 0x1eadba17, 0x461d524f, 0x005e0000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox32
+ // result rd:x3(0xd7c0df60), rs1=>rd:x3(0x528a10af), rs2:x14(0x5f000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x3, x14, 0x3, 0xd7c0df60, 0x528a10af, 0x5f000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox32
+ // result rd:x4(0x8a4b2b78), rs1=>rd:x4(0xe19bfbc3), rs2:x13(0x00000060), imm:0x0
+ TEST_RI_OP(aes32esmi, x4, x13, 0x0, 0x8a4b2b78, 0xe19bfbc3, 0x00000060, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox32
+ // result rd:x5(0x9f9537ea), rs1=>rd:x5(0x707af2c0), rs2:x12(0x00006100), imm:0x1
+ TEST_RI_OP(aes32esmi, x5, x12, 0x1, 0x9f9537ea, 0x707af2c0, 0x00006100, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox32
+ // result rd:x6(0x0e32f5f1), rs1=>rd:x6(0xa47d105b), rs2:x11(0x00620000), imm:0x2
+ TEST_RI_OP(aes32esmi, x6, x11, 0x2, 0x0e32f5f1, 0xa47d105b, 0x00620000, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox32
+ // result rd:x7(0xff0d37d8), rs1=>rd:x7(0x121bcc23), rs2:x10(0x63000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x7, x10, 0x3, 0xff0d37d8, 0x121bcc23, 0x63000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox32
+ // result rd:x8(0x68a91213), rs1=>rd:x8(0xadea5195), rs2:x9(0x00000064), imm:0x0
+ TEST_RI_OP(aes32esmi, x8, x9, 0x0, 0x68a91213, 0xadea5195, 0x00000064, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox32
+ // result rd:x9(0x9fb22416), rs1=>rd:x9(0xd2ffbec1), rs2:x8(0x00006500), imm:0x1
+ TEST_RI_OP(aes32esmi, x9, x8, 0x1, 0x9fb22416, 0xd2ffbec1, 0x00006500, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox32
+ // result rd:x10(0x9b87fd88), rs1=>rd:x10(0xa8e1a8bb), rs2:x7(0x00660000), imm:0x2
+ TEST_RI_OP(aes32esmi, x10, x7, 0x2, 0x9b87fd88, 0xa8e1a8bb, 0x00660000, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox32
+ // result rd:x11(0x595d1a4e), rs1=>rd:x11(0x48c99fcb), rs2:x6(0x67000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x11, x6, 0x3, 0x595d1a4e, 0x48c99fcb, 0x67000000, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox32
+ // result rd:x12(0x895817c5), rs1=>rd:x12(0x461d524f), rs2:x5(0x00000068), imm:0x0
+ TEST_RI_OP(aes32esmi, x12, x5, 0x0, 0x895817c5, 0x461d524f, 0x00000068, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox32
+ // result rd:x13(0xab73f9bf), rs1=>rd:x13(0x528a10af), rs2:x4(0x00006900), imm:0x1
+ TEST_RI_OP(aes32esmi, x13, x4, 0x1, 0xab73f9bf, 0x528a10af, 0x00006900, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox32
+ // result rd:x14(0xe39ffdc1), rs1=>rd:x14(0xe19bfbc3), rs2:x3(0x006a0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x14, x3, 0x2, 0xe39ffdc1, 0xe19bfbc3, 0x006a0000, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox32
+ // result rd:x15(0x8efb8dbf), rs1=>rd:x15(0x707af2c0), rs2:x2(0x6b000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x15, x2, 0x3, 0x8efb8dbf, 0x707af2c0, 0x6b000000, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox32
+ // result rd:x16(0x542d40fb), rs1=>rd:x16(0xa47d105b), rs2:x1(0x0000006c), imm:0x0
+ TEST_RI_OP(aes32esmi, x16, x1, 0x0, 0x542d40fb, 0xa47d105b, 0x0000006c, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox32
+ // result rd:x17(0x2e27b467), rs1=>rd:x17(0x121bcc23), rs2:x31(0x00006d00), imm:0x1
+ TEST_RI_OP(aes32esmi, x17, x31, 0x1, 0x2e27b467, 0x121bcc23, 0x00006d00, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox32
+ // result rd:x18(0x32cfeb0a), rs1=>rd:x18(0xadea5195), rs2:x30(0x006e0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x18, x30, 0x2, 0x32cfeb0a, 0xadea5195, 0x006e0000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox32
+ // result rd:x19(0x991c1669), rs1=>rd:x19(0xd2ffbec1), rs2:x29(0x6f000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x19, x29, 0x3, 0x991c1669, 0xd2ffbec1, 0x6f000000, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox32
+ // result rd:x20(0x5bb0f919), rs1=>rd:x20(0xa8e1a8bb), rs2:x28(0x00000070), imm:0x0
+ TEST_RI_OP(aes32esmi, x20, x28, 0x0, 0x5bb0f919, 0xa8e1a8bb, 0x00000070, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox32
+ // result rd:x21(0xeb6ac235), rs1=>rd:x21(0x48c99fcb), rs2:x27(0x00007100), imm:0x1
+ TEST_RI_OP(aes32esmi, x21, x27, 0x1, 0xeb6ac235, 0x48c99fcb, 0x00007100, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox32
+ // result rd:x22(0x069d920f), rs1=>rd:x22(0x461d524f), rs2:x26(0x00720000), imm:0x2
+ TEST_RI_OP(aes32esmi, x22, x26, 0x2, 0x069d920f, 0x461d524f, 0x00720000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox32
+ // result rd:x23(0x57009f20), rs1=>rd:x23(0x528a10af), rs2:x25(0x73000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x23, x25, 0x3, 0x57009f20, 0x528a10af, 0x73000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox32
+ // result rd:x24(0xad92924b), rs1=>rd:x24(0xe19bfbc3), rs2:x24(0x00000074), imm:0x0
+ TEST_RI_OP(aes32esmi, x24, x24, 0x0, 0xad92924b, 0xe19bfbc3, 0x00000074, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox32
+ // result rd:x25(0xede7d37c), rs1=>rd:x25(0x707af2c0), rs2:x23(0x00007500), imm:0x1
+ TEST_RI_OP(aes32esmi, x25, x23, 0x1, 0xede7d37c, 0x707af2c0, 0x00007500, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox32
+ // result rd:x26(0x9c0d5863), rs1=>rd:x26(0xa47d105b), rs2:x22(0x00760000), imm:0x2
+ TEST_RI_OP(aes32esmi, x26, x22, 0x2, 0x9c0d5863, 0xa47d105b, 0x00760000, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox32
+ // result rd:x27(0xe31f39d6), rs1=>rd:x27(0x121bcc23), rs2:x21(0x77000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x27, x21, 0x3, 0xe31f39d6, 0x121bcc23, 0x77000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox32
+ // result rd:x28(0x7256edf6), rs1=>rd:x28(0xadea5195), rs2:x20(0x00000078), imm:0x0
+ TEST_RI_OP(aes32esmi, x28, x20, 0x0, 0x7256edf6, 0xadea5195, 0x00000078, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox32
+ // result rd:x29(0x6449c900), rs1=>rd:x29(0xd2ffbec1), rs2:x19(0x00007900), imm:0x1
+ TEST_RI_OP(aes32esmi, x29, x19, 0x1, 0x6449c900, 0xd2ffbec1, 0x00007900, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox32
+ // result rd:x30(0x724edd61), rs1=>rd:x30(0xa8e1a8bb), rs2:x18(0x007a0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x30, x18, 0x2, 0x724edd61, 0xa8e1a8bb, 0x007a0000, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox32
+ // result rd:x31(0x0aaabeea), rs1=>rd:x31(0x48c99fcb), rs2:x17(0x7b000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x31, x17, 0x3, 0x0aaabeea, 0x48c99fcb, 0x7b000000, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox32
+ // result rd:x1(0x760d426f), rs1=>rd:x1(0x461d524f), rs2:x16(0x0000007c), imm:0x0
+ TEST_RI_OP(aes32esmi, x1, x16, 0x0, 0x760d426f, 0x461d524f, 0x0000007c, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox32
+ // result rd:x2(0xad75f5b5), rs1=>rd:x2(0x528a10af), rs2:x15(0x00007d00), imm:0x1
+ TEST_RI_OP(aes32esmi, x2, x15, 0x1, 0xad75f5b5, 0x528a10af, 0x00007d00, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox32
+ // result rd:x3(0x1266f530), rs1=>rd:x3(0xe19bfbc3), rs2:x14(0x007e0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x3, x14, 0x2, 0x1266f530, 0xe19bfbc3, 0x007e0000, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox32
+ // result rd:x4(0xcf172012), rs1=>rd:x4(0x707af2c0), rs2:x13(0x7f000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x4, x13, 0x3, 0xcf172012, 0x707af2c0, 0x7f000000, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox32
+ // result rd:x5(0xe8b0ddda), rs1=>rd:x5(0xa47d105b), rs2:x12(0x00000080), imm:0x0
+ TEST_RI_OP(aes32esmi, x5, x12, 0x0, 0xe8b0ddda, 0xa47d105b, 0x00000080, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox32
+ // result rd:x6(0x1e17d437), rs1=>rd:x6(0x121bcc23), rs2:x11(0x00008100), imm:0x1
+ TEST_RI_OP(aes32esmi, x6, x11, 0x1, 0x1e17d437, 0x121bcc23, 0x00008100, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox32
+ // result rd:x7(0xbecc6486), rs1=>rd:x7(0xadea5195), rs2:x10(0x00820000), imm:0x2
+ TEST_RI_OP(aes32esmi, x7, x10, 0x2, 0xbecc6486, 0xadea5195, 0x00820000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox32
+ // result rd:x8(0x11d0522d), rs1=>rd:x8(0xd2ffbec1), rs2:x9(0x83000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x8, x9, 0x3, 0x11d0522d, 0xd2ffbec1, 0x83000000, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox32
+ // result rd:x9(0x49bef705), rs1=>rd:x9(0xa8e1a8bb), rs2:x8(0x00000084), imm:0x0
+ TEST_RI_OP(aes32esmi, x9, x8, 0x0, 0x49bef705, 0xa8e1a8bb, 0x00000084, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox32
+ // result rd:x10(0xdf5eaa69), rs1=>rd:x10(0x48c99fcb), rs2:x7(0x00008500), imm:0x1
+ TEST_RI_OP(aes32esmi, x10, x7, 0x1, 0xdf5eaa69, 0x48c99fcb, 0x00008500, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox32
+ // result rd:x11(0x02959e0b), rs1=>rd:x11(0x461d524f), rs2:x6(0x00860000), imm:0x2
+ TEST_RI_OP(aes32esmi, x11, x6, 0x2, 0x02959e0b, 0x461d524f, 0x00860000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox32
+ // result rd:x12(0x7cb307b8), rs1=>rd:x12(0x528a10af), rs2:x5(0x87000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x12, x5, 0x3, 0x7cb307b8, 0x528a10af, 0x87000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox32
+ // result rd:x13(0xb65f3f50), rs1=>rd:x13(0xe19bfbc3), rs2:x4(0x00000088), imm:0x0
+ TEST_RI_OP(aes32esmi, x13, x4, 0x0, 0xb65f3f50, 0xe19bfbc3, 0x00000088, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox32
+ // result rd:x14(0xd7dda732), rs1=>rd:x14(0x707af2c0), rs2:x3(0x00008900), imm:0x1
+ TEST_RI_OP(aes32esmi, x14, x3, 0x1, 0xd7dda732, 0x707af2c0, 0x00008900, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox32
+ // result rd:x15(0xda819225), rs1=>rd:x15(0xa47d105b), rs2:x2(0x008a0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x15, x2, 0x2, 0xda819225, 0xa47d105b, 0x008a0000, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox32
+ // result rd:x16(0x685cf11e), rs1=>rd:x16(0x121bcc23), rs2:x1(0x8b000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x16, x1, 0x3, 0x685cf11e, 0x121bcc23, 0x8b000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox32
+ // result rd:x17(0x018e355d), rs1=>rd:x17(0xadea5195), rs2:x31(0x0000008c), imm:0x0
+ TEST_RI_OP(aes32esmi, x17, x31, 0x0, 0x018e355d, 0xadea5195, 0x0000008c, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox32
+ // result rd:x18(0x8fa20426), rs1=>rd:x18(0xd2ffbec1), rs2:x30(0x00008d00), imm:0x1
+ TEST_RI_OP(aes32esmi, x18, x30, 0x1, 0x8fa20426, 0xd2ffbec1, 0x00008d00, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox32
+ // result rd:x19(0xb1d383a2), rs1=>rd:x19(0xa8e1a8bb), rs2:x29(0x008e0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x19, x29, 0x2, 0xb1d383a2, 0xa8e1a8bb, 0x008e0000, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox32
+ // result rd:x20(0xae5cecb8), rs1=>rd:x20(0x48c99fcb), rs2:x28(0x8f000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x20, x28, 0x3, 0xae5cecb8, 0x48c99fcb, 0x8f000000, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox32
+ // result rd:x21(0xe67d328f), rs1=>rd:x21(0x461d524f), rs2:x27(0x00000090), imm:0x0
+ TEST_RI_OP(aes32esmi, x21, x27, 0x0, 0xe67d328f, 0x461d524f, 0x00000090, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox32
+ // result rd:x22(0xd30b0937), rs1=>rd:x22(0x528a10af), rs2:x26(0x00009100), imm:0x1
+ TEST_RI_OP(aes32esmi, x22, x26, 0x1, 0xd30b0937, 0x528a10af, 0x00009100, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox32
+ // result rd:x23(0xae052a8c), rs1=>rd:x23(0xe19bfbc3), rs2:x25(0x00920000), imm:0x2
+ TEST_RI_OP(aes32esmi, x23, x25, 0x2, 0xae052a8c, 0xe19bfbc3, 0x00920000, x1, 4, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox32
+ // result rd:x24(0x307fdcdc), rs1=>rd:x24(0x707af2c0), rs2:x24(0x93000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x24, x24, 0x3, 0x307fdcdc, 0x707af2c0, 0x93000000, x1, 8, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox32
+ // result rd:x25(0xc25f321f), rs1=>rd:x25(0xa47d105b), rs2:x23(0x00000094), imm:0x0
+ TEST_RI_OP(aes32esmi, x25, x23, 0x0, 0xc25f321f, 0xa47d105b, 0x00000094, x1, 12, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox32
+ // result rd:x26(0x3831985d), rs1=>rd:x26(0x121bcc23), rs2:x22(0x00009500), imm:0x1
+ TEST_RI_OP(aes32esmi, x26, x22, 0x1, 0x3831985d, 0x121bcc23, 0x00009500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox32
+ // result rd:x27(0x3dd1fa05), rs1=>rd:x27(0xadea5195), rs2:x21(0x00960000), imm:0x2
+ TEST_RI_OP(aes32esmi, x27, x21, 0x2, 0x3dd1fa05, 0xadea5195, 0x00960000, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox32
+ // result rd:x28(0xd97c3649), rs1=>rd:x28(0xd2ffbec1), rs2:x20(0x97000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x28, x20, 0x3, 0xd97c3649, 0xd2ffbec1, 0x97000000, x6, 4, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox32
+ // result rd:x29(0x62a7ee37), rs1=>rd:x29(0xa8e1a8bb), rs2:x19(0x00000098), imm:0x0
+ TEST_RI_OP(aes32esmi, x29, x19, 0x0, 0x62a7ee37, 0xa8e1a8bb, 0x00000098, x6, 8, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox32
+ // result rd:x30(0xa62758e2), rs1=>rd:x30(0x48c99fcb), rs2:x18(0x00009900), imm:0x1
+ TEST_RI_OP(aes32esmi, x30, x18, 0x1, 0xa62758e2, 0x48c99fcb, 0x00009900, x6, 12, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox32
+ // result rd:x31(0xfe7681f7), rs1=>rd:x31(0x461d524f), rs2:x17(0x009a0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x31, x17, 0x2, 0xfe7681f7, 0x461d524f, 0x009a0000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox32
+ // result rd:x1(0x7ab604bb), rs1=>rd:x1(0x528a10af), rs2:x16(0x9b000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x1, x16, 0x3, 0x7ab604bb, 0x528a10af, 0x9b000000, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox32
+ // result rd:x2(0x98452564), rs1=>rd:x2(0xe19bfbc3), rs2:x15(0x0000009c), imm:0x0
+ TEST_RI_OP(aes32esmi, x2, x15, 0x0, 0x98452564, 0xe19bfbc3, 0x0000009c, x6, 4, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox32
+ // result rd:x3(0x2e244e22), rs1=>rd:x3(0x707af2c0), rs2:x14(0x00009d00), imm:0x1
+ TEST_RI_OP(aes32esmi, x3, x14, 0x1, 0x2e244e22, 0x707af2c0, 0x00009d00, x6, 8, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox32
+ // result rd:x4(0xaf6b0d50), rs1=>rd:x4(0xa47d105b), rs2:x13(0x009e0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x4, x13, 0x2, 0xaf6b0d50, 0xa47d105b, 0x009e0000, x6, 12, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox32
+ // result rd:x5(0xbf6d17f8), rs1=>rd:x5(0x121bcc23), rs2:x12(0x9f000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x5, x12, 0x3, 0xbf6d17f8, 0x121bcc23, 0x9f000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox32
+ // result rd:x6(0x960ab14e), rs1=>rd:x6(0xadea5195), rs2:x11(0x000000a0), imm:0x0
+ TEST_RI_OP(aes32esmi, x6, x11, 0x0, 0x960ab14e, 0xadea5195, 0x000000a0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox32
+ // result rd:x7(0xe0cdda97), rs1=>rd:x7(0xd2ffbec1), rs2:x10(0x0000a100), imm:0x1
+ TEST_RI_OP(aes32esmi, x7, x10, 0x1, 0xe0cdda97, 0xd2ffbec1, 0x0000a100, x1, 4, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox32
+ // result rd:x8(0x9295e681), rs1=>rd:x8(0xa8e1a8bb), rs2:x9(0x00a20000), imm:0x2
+ TEST_RI_OP(aes32esmi, x8, x9, 0x2, 0x9295e681, 0xa8e1a8bb, 0x00a20000, x1, 8, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox32
+ // result rd:x9(0x5cd795c1), rs1=>rd:x9(0x48c99fcb), rs2:x8(0xa3000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x9, x8, 0x3, 0x5cd795c1, 0x48c99fcb, 0xa3000000, x1, 12, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox32
+ // result rd:x10(0x9d541bdd), rs1=>rd:x10(0x461d524f), rs2:x7(0x000000a4), imm:0x0
+ TEST_RI_OP(aes32esmi, x10, x7, 0x0, 0x9d541bdd, 0x461d524f, 0x000000a4, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox32
+ // result rd:x11(0x548c1ca5), rs1=>rd:x11(0x528a10af), rs2:x6(0x0000a500), imm:0x1
+ TEST_RI_OP(aes32esmi, x11, x6, 0x1, 0x548c1ca5, 0x528a10af, 0x0000a500, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox32
+ // result rd:x12(0xc5d397e7), rs1=>rd:x12(0xe19bfbc3), rs2:x5(0x00a60000), imm:0x2
+ TEST_RI_OP(aes32esmi, x12, x5, 0x2, 0xc5d397e7, 0xe19bfbc3, 0x00a60000, x1, 4, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox32
+ // result rd:x13(0xc89eae9c), rs1=>rd:x13(0x707af2c0), rs2:x4(0xa7000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x13, x4, 0x3, 0xc89eae9c, 0x707af2c0, 0xa7000000, x1, 8, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox32
+ // result rd:x14(0xf9bfd2c4), rs1=>rd:x14(0xa47d105b), rs2:x3(0x000000a8), imm:0x0
+ TEST_RI_OP(aes32esmi, x14, x3, 0x0, 0xf9bfd2c4, 0xa47d105b, 0x000000a8, x1, 12, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox32
+ // result rd:x15(0xc1c8714d), rs1=>rd:x15(0x121bcc23), rs2:x2(0x0000a900), imm:0x1
+ TEST_RI_OP(aes32esmi, x15, x2, 0x1, 0xc1c8714d, 0x121bcc23, 0x0000a900, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox32
+ // result rd:x16(0x01a9be39), rs1=>rd:x16(0xadea5195), rs2:x1(0x00aa0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x16, x1, 0x2, 0x01a9be39, 0xadea5195, 0x00aa0000, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox32
+ // result rd:x17(0x1659dca3), rs1=>rd:x17(0xd2ffbec1), rs2:x31(0xab000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x17, x31, 0x3, 0x1659dca3, 0xd2ffbec1, 0xab000000, x2, 4, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox32
+ // result rd:x18(0x00703982), rs1=>rd:x18(0xa8e1a8bb), rs2:x30(0x000000ac), imm:0x0
+ TEST_RI_OP(aes32esmi, x18, x30, 0x0, 0x00703982, 0xa8e1a8bb, 0x000000ac, x2, 8, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox32
+ // result rd:x19(0xdd5cae6f), rs1=>rd:x19(0x48c99fcb), rs2:x29(0x0000ad00), imm:0x1
+ TEST_RI_OP(aes32esmi, x19, x29, 0x1, 0xdd5cae6f, 0x48c99fcb, 0x0000ad00, x2, 12, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox32
+ // result rd:x20(0xa2ce65ab), rs1=>rd:x20(0x461d524f), rs2:x28(0x00ae0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x20, x28, 0x2, 0xa2ce65ab, 0x461d524f, 0x00ae0000, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox32
+ // result rd:x21(0xa00169d6), rs1=>rd:x21(0x528a10af), rs2:x27(0xaf000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x21, x27, 0x3, 0xa00169d6, 0x528a10af, 0xaf000000, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox32
+ // result rd:x22(0xd37c1c16), rs1=>rd:x22(0xe19bfbc3), rs2:x26(0x000000b0), imm:0x0
+ TEST_RI_OP(aes32esmi, x22, x26, 0x0, 0xd37c1c16, 0xe19bfbc3, 0x000000b0, x1, 4, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox32
+ // result rd:x23(0xb8b27983), rs1=>rd:x23(0x707af2c0), rs2:x25(0x0000b100), imm:0x1
+ TEST_RI_OP(aes32esmi, x23, x25, 0x1, 0xb8b27983, 0x707af2c0, 0x0000b100, x1, 8, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox32
+ // result rd:x24(0x37dc5937), rs1=>rd:x24(0xa47d105b), rs2:x24(0x00b20000), imm:0x2
+ TEST_RI_OP(aes32esmi, x24, x24, 0x2, 0x37dc5937, 0xa47d105b, 0x00b20000, x1, 12, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox32
+ // result rd:x25(0xc8aca14e), rs1=>rd:x25(0x121bcc23), rs2:x23(0xb3000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x25, x23, 0x3, 0xc8aca14e, 0x121bcc23, 0xb3000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox32
+ // result rd:x26(0x2167dc94), rs1=>rd:x26(0xadea5195), rs2:x22(0x000000b4), imm:0x0
+ TEST_RI_OP(aes32esmi, x26, x22, 0x0, 0x2167dc94, 0xadea5195, 0x000000b4, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox32
+ // result rd:x27(0x072a0fa5), rs1=>rd:x27(0xd2ffbec1), rs2:x21(0x0000b500), imm:0x1
+ TEST_RI_OP(aes32esmi, x27, x21, 0x1, 0x072a0fa5, 0xd2ffbec1, 0x0000b500, x1, 4, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox32
+ // result rd:x28(0xe67d7af5), rs1=>rd:x28(0xa8e1a8bb), rs2:x20(0x00b60000), imm:0x2
+ TEST_RI_OP(aes32esmi, x28, x20, 0x2, 0xe67d7af5, 0xa8e1a8bb, 0x00b60000, x1, 8, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox32
+ // result rd:x29(0x01293662), rs1=>rd:x29(0x48c99fcb), rs2:x19(0xb7000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x29, x19, 0x3, 0x01293662, 0x48c99fcb, 0xb7000000, x1, 12, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox32
+ // result rd:x30(0xf2713e97), rs1=>rd:x30(0x461d524f), rs2:x18(0x000000b8), imm:0x0
+ TEST_RI_OP(aes32esmi, x30, x18, 0x0, 0xf2713e97, 0x461d524f, 0x000000b8, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox32
+ // result rd:x31(0x04dcbc55), rs1=>rd:x31(0x528a10af), rs2:x17(0x0000b900), imm:0x1
+ TEST_RI_OP(aes32esmi, x31, x17, 0x1, 0x04dcbc55, 0x528a10af, 0x0000b900, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox32
+ // result rd:x1(0x1568fc37), rs1=>rd:x1(0xe19bfbc3), rs2:x16(0x00ba0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x1, x16, 0x2, 0x1568fc37, 0xe19bfbc3, 0x00ba0000, x5, 4, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox32
+ // result rd:x2(0xbf5f182a), rs1=>rd:x2(0x707af2c0), rs2:x15(0xbb000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x2, x15, 0x3, 0xbf5f182a, 0x707af2c0, 0xbb000000, x5, 8, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox32
+ // result rd:x3(0x0b187591), rs1=>rd:x3(0xa47d105b), rs2:x14(0x000000bc), imm:0x0
+ TEST_RI_OP(aes32esmi, x3, x14, 0x0, 0x0b187591, 0xa47d105b, 0x000000bc, x5, 12, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox32
+ // result rd:x4(0x686138ad), rs1=>rd:x4(0x121bcc23), rs2:x13(0x0000bd00), imm:0x1
+ TEST_RI_OP(aes32esmi, x4, x13, 0x1, 0x686138ad, 0x121bcc23, 0x0000bd00, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox32
+ // result rd:x5(0x03adb83b), rs1=>rd:x5(0xadea5195), rs2:x12(0x00be0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x5, x12, 0x2, 0x03adb83b, 0xadea5195, 0x00be0000, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox32
+ // result rd:x6(0xc2e7b6c9), rs1=>rd:x6(0xd2ffbec1), rs2:x11(0xbf000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x6, x11, 0x3, 0xc2e7b6c9, 0xd2ffbec1, 0xbf000000, x1, 4, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox32
+ // result rd:x7(0x7d5b12d4), rs1=>rd:x7(0xa8e1a8bb), rs2:x10(0x000000c0), imm:0x0
+ TEST_RI_OP(aes32esmi, x7, x10, 0x0, 0x7d5b12d4, 0xa8e1a8bb, 0x000000c0, x1, 8, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox32
+ // result rd:x8(0x30b16f43), rs1=>rd:x8(0x48c99fcb), rs2:x9(0x0000c100), imm:0x1
+ TEST_RI_OP(aes32esmi, x8, x9, 0x1, 0x30b16f43, 0x48c99fcb, 0x0000c100, x1, 12, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox32
+ // result rd:x9(0x63573d6a), rs1=>rd:x9(0x461d524f), rs2:x8(0x00c20000), imm:0x2
+ TEST_RI_OP(aes32esmi, x9, x8, 0x2, 0x63573d6a, 0x461d524f, 0x00c20000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox32
+ // result rd:x10(0x0ef83e81), rs1=>rd:x10(0x528a10af), rs2:x7(0xc3000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x10, x7, 0x3, 0x0ef83e81, 0x528a10af, 0xc3000000, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox32
+ // result rd:x11(0xc587e7fb), rs1=>rd:x11(0xe19bfbc3), rs2:x6(0x000000c4), imm:0x0
+ TEST_RI_OP(aes32esmi, x11, x6, 0x0, 0xc587e7fb, 0xe19bfbc3, 0x000000c4, x1, 4, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox32
+ // result rd:x12(0xd6dca531), rs1=>rd:x12(0x707af2c0), rs2:x5(0x0000c500), imm:0x1
+ TEST_RI_OP(aes32esmi, x12, x5, 0x1, 0xd6dca531, 0x707af2c0, 0x0000c500, x1, 8, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox32
+ // result rd:x13(0x100ed7ef), rs1=>rd:x13(0xa47d105b), rs2:x4(0x00c60000), imm:0x2
+ TEST_RI_OP(aes32esmi, x13, x4, 0x2, 0x100ed7ef, 0xa47d105b, 0x00c60000, x1, 12, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox32
+ // result rd:x14(0x854a0ae5), rs1=>rd:x14(0x121bcc23), rs2:x3(0xc7000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x14, x3, 0x3, 0x854a0ae5, 0x121bcc23, 0xc7000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox32
+ // result rd:x15(0x8e02b95e), rs1=>rd:x15(0xadea5195), rs2:x2(0x000000c8), imm:0x0
+ TEST_RI_OP(aes32esmi, x15, x2, 0x0, 0x8e02b95e, 0xadea5195, 0x000000c8, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox32
+ // result rd:x16(0x0f221fbd), rs1=>rd:x16(0xd2ffbec1), rs2:x1(0x0000c900), imm:0x1
+ TEST_RI_OP(aes32esmi, x16, x1, 0x1, 0x0f221fbd, 0xd2ffbec1, 0x0000c900, x3, 4, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox32
+ // result rd:x17(0xdc0934cf), rs1=>rd:x17(0xa8e1a8bb), rs2:x31(0x00ca0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x17, x31, 0x2, 0xdc0934cf, 0xa8e1a8bb, 0x00ca0000, x3, 8, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox32
+ // result rd:x18(0x76e880d4), rs1=>rd:x18(0x48c99fcb), rs2:x30(0xcb000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x18, x30, 0x3, 0x76e880d4, 0x48c99fcb, 0xcb000000, x3, 12, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox32
+ // result rd:x19(0x9b5619d9), rs1=>rd:x19(0x461d524f), rs2:x29(0x000000cc), imm:0x0
+ TEST_RI_OP(aes32esmi, x19, x29, 0x0, 0x9b5619d9, 0x461d524f, 0x000000cc, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox32
+ // result rd:x20(0xef377173), rs1=>rd:x20(0x528a10af), rs2:x28(0x0000cd00), imm:0x1
+ TEST_RI_OP(aes32esmi, x20, x28, 0x1, 0xef377173, 0x528a10af, 0x0000cd00, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox32
+ // result rd:x21(0x6a967d48), rs1=>rd:x21(0xe19bfbc3), rs2:x27(0x00ce0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x21, x27, 0x2, 0x6a967d48, 0xe19bfbc3, 0x00ce0000, x1, 4, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox32
+ // result rd:x22(0x7fff784a), rs1=>rd:x22(0x707af2c0), rs2:x26(0xcf000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x22, x26, 0x3, 0x7fff784a, 0x707af2c0, 0xcf000000, x1, 8, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox32
+ // result rd:x23(0x340d60bb), rs1=>rd:x23(0xa47d105b), rs2:x25(0x000000d0), imm:0x0
+ TEST_RI_OP(aes32esmi, x23, x25, 0x0, 0x340d60bb, 0xa47d105b, 0x000000d0, x1, 12, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox32
+ // result rd:x24(0x3e3ead42), rs1=>rd:x24(0x121bcc23), rs2:x24(0x0000d100), imm:0x1
+ TEST_RI_OP(aes32esmi, x24, x24, 0x1, 0x3e3ead42, 0x121bcc23, 0x0000d100, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox32
+ // result rd:x25(0x189b9520), rs1=>rd:x25(0xadea5195), rs2:x23(0x00d20000), imm:0x2
+ TEST_RI_OP(aes32esmi, x25, x23, 0x2, 0x189b9520, 0xadea5195, 0x00d20000, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox32
+ // result rd:x26(0x1e55d8a7), rs1=>rd:x26(0xd2ffbec1), rs2:x22(0xd3000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x26, x22, 0x3, 0x1e55d8a7, 0xd2ffbec1, 0xd3000000, x1, 4, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox32
+ // result rd:x27(0x70a9e02b), rs1=>rd:x27(0xa8e1a8bb), rs2:x21(0x000000d4), imm:0x0
+ TEST_RI_OP(aes32esmi, x27, x21, 0x0, 0x70a9e02b, 0xa8e1a8bb, 0x000000d4, x1, 8, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox32
+ // result rd:x28(0x4bca99ce), rs1=>rd:x28(0x48c99fcb), rs2:x20(0x0000d500), imm:0x1
+ TEST_RI_OP(aes32esmi, x28, x20, 0x1, 0x4bca99ce, 0x48c99fcb, 0x0000d500, x1, 12, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox32
+ // result rd:x29(0xb0ea53b9), rs1=>rd:x29(0x461d524f), rs2:x19(0x00d60000), imm:0x2
+ TEST_RI_OP(aes32esmi, x29, x19, 0x2, 0xb0ea53b9, 0x461d524f, 0x00d60000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox32
+ // result rd:x30(0x4e981ea1), rs1=>rd:x30(0x528a10af), rs2:x18(0xd7000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x30, x18, 0x3, 0x4e981ea1, 0x528a10af, 0xd7000000, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox32
+ // result rd:x31(0x42fa9a01), rs1=>rd:x31(0xe19bfbc3), rs2:x17(0x000000d8), imm:0x0
+ TEST_RI_OP(aes32esmi, x31, x17, 0x0, 0x42fa9a01, 0xe19bfbc3, 0x000000d8, x4, 4, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox32
+ // result rd:x1(0x454f989f), rs1=>rd:x1(0x707af2c0), rs2:x16(0x0000d900), imm:0x1
+ TEST_RI_OP(aes32esmi, x1, x16, 0x1, 0x454f989f, 0x707af2c0, 0x0000d900, x4, 8, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox32
+ // result rd:x2(0xf3d3e90c), rs1=>rd:x2(0xa47d105b), rs2:x15(0x00da0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x2, x15, 0x2, 0xf3d3e90c, 0xa47d105b, 0x00da0000, x4, 12, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox32
+ // result rd:x3(0x7bcb759a), rs1=>rd:x3(0x121bcc23), rs2:x14(0xdb000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x3, x14, 0x3, 0x7bcb759a, 0x121bcc23, 0xdb000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox32
+ // result rd:x4(0x3c6cd782), rs1=>rd:x4(0xadea5195), rs2:x13(0x000000dc), imm:0x0
+ TEST_RI_OP(aes32esmi, x4, x13, 0x0, 0x3c6cd782, 0xadea5195, 0x000000dc, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox32
+ // result rd:x5(0x133e2799), rs1=>rd:x5(0xd2ffbec1), rs2:x12(0x0000dd00), imm:0x1
+ TEST_RI_OP(aes32esmi, x5, x12, 0x1, 0x133e2799, 0xd2ffbec1, 0x0000dd00, x1, 4, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox32
+ // result rd:x6(0xb5db8fa6), rs1=>rd:x6(0xa8e1a8bb), rs2:x11(0x00de0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x6, x11, 0x2, 0xb5db8fa6, 0xa8e1a8bb, 0x00de0000, x1, 8, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox32
+ // result rd:x7(0x6f700155), rs1=>rd:x7(0x48c99fcb), rs2:x10(0xdf000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x7, x10, 0x3, 0x6f700155, 0x48c99fcb, 0xdf000000, x1, 12, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox32
+ // result rd:x8(0x7efcb396), rs1=>rd:x8(0x461d524f), rs2:x9(0x000000e0), imm:0x0
+ TEST_RI_OP(aes32esmi, x8, x9, 0x0, 0x7efcb396, 0x461d524f, 0x000000e0, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox32
+ // result rd:x9(0xaa72fbbc), rs1=>rd:x9(0x528a10af), rs2:x8(0x0000e100), imm:0x1
+ TEST_RI_OP(aes32esmi, x9, x8, 0x1, 0xaa72fbbc, 0x528a10af, 0x0000e100, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox32
+ // result rd:x10(0x79b0485b), rs1=>rd:x10(0xe19bfbc3), rs2:x7(0x00e20000), imm:0x2
+ TEST_RI_OP(aes32esmi, x10, x7, 0x2, 0x79b0485b, 0xe19bfbc3, 0x00e20000, x1, 4, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox32
+ // result rd:x11(0x5249e3d1), rs1=>rd:x11(0x707af2c0), rs2:x6(0xe3000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x11, x6, 0x3, 0x5249e3d1, 0x707af2c0, 0xe3000000, x1, 8, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox32
+ // result rd:x12(0x1f147989), rs1=>rd:x12(0xa47d105b), rs2:x5(0x000000e4), imm:0x0
+ TEST_RI_OP(aes32esmi, x12, x5, 0x0, 0x1f147989, 0xa47d105b, 0x000000e4, x1, 12, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox32
+ // result rd:x13(0xcbc26553), rs1=>rd:x13(0x121bcc23), rs2:x4(0x0000e500), imm:0x1
+ TEST_RI_OP(aes32esmi, x13, x4, 0x1, 0xcbc26553, 0x121bcc23, 0x0000e500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox32
+ // result rd:x14(0x23edd81b), rs1=>rd:x14(0xadea5195), rs2:x3(0x00e60000), imm:0x2
+ TEST_RI_OP(aes32esmi, x14, x3, 0x2, 0x23edd81b, 0xadea5195, 0x00e60000, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox32
+ // result rd:x15(0xe1582a55), rs1=>rd:x15(0xd2ffbec1), rs2:x2(0xe7000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x15, x2, 0x3, 0xe1582a55, 0xd2ffbec1, 0xe7000000, x4, 4, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox32
+ // result rd:x16(0x1e7a3396), rs1=>rd:x16(0xa8e1a8bb), rs2:x1(0x000000e8), imm:0x0
+ TEST_RI_OP(aes32esmi, x16, x1, 0x0, 0x1e7a3396, 0xa8e1a8bb, 0x000000e8, x4, 8, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox32
+ // result rd:x17(0x56d7a3e9), rs1=>rd:x17(0x48c99fcb), rs2:x31(0x0000e900), imm:0x1
+ TEST_RI_OP(aes32esmi, x17, x31, 0x1, 0x56d7a3e9, 0x48c99fcb, 0x0000e900, x4, 12, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox32
+ // result rd:x18(0xc108c0c8), rs1=>rd:x18(0x461d524f), rs2:x30(0x00ea0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x18, x30, 0x2, 0xc108c0c8, 0x461d524f, 0x00ea0000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox32
+ // result rd:x19(0x9baaf946), rs1=>rd:x19(0x528a10af), rs2:x29(0xeb000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x19, x29, 0x3, 0x9baaf946, 0x528a10af, 0xeb000000, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox32
+ // result rd:x20(0xa8553544), rs1=>rd:x20(0xe19bfbc3), rs2:x28(0x000000ec), imm:0x0
+ TEST_RI_OP(aes32esmi, x20, x28, 0x0, 0xa8553544, 0xe19bfbc3, 0x000000ec, x1, 4, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox32
+ // result rd:x21(0x252f583f), rs1=>rd:x21(0x707af2c0), rs2:x27(0x0000ed00), imm:0x1
+ TEST_RI_OP(aes32esmi, x21, x27, 0x1, 0x252f583f, 0x707af2c0, 0x0000ed00, x1, 8, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox32
+ // result rd:x22(0x8c2d6873), rs1=>rd:x22(0xa47d105b), rs2:x26(0x00ee0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x22, x26, 0x2, 0x8c2d6873, 0xa47d105b, 0x00ee0000, x1, 12, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox32
+ // result rd:x23(0xb76113fc), rs1=>rd:x23(0x121bcc23), rs2:x25(0xef000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x23, x25, 0x3, 0xb76113fc, 0x121bcc23, 0xef000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox32
+ // result rd:x24(0x8f8c8cf3), rs1=>rd:x24(0xadea5195), rs2:x24(0x000000f0), imm:0x0
+ TEST_RI_OP(aes32esmi, x24, x24, 0x0, 0x8f8c8cf3, 0xadea5195, 0x000000f0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox32
+ // result rd:x25(0x735ee739), rs1=>rd:x25(0xd2ffbec1), rs2:x23(0x0000f100), imm:0x1
+ TEST_RI_OP(aes32esmi, x25, x23, 0x1, 0x735ee739, 0xd2ffbec1, 0x0000f100, x1, 4, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox32
+ // result rd:x26(0x21e82832), rs1=>rd:x26(0xa8e1a8bb), rs2:x22(0x00f20000), imm:0x2
+ TEST_RI_OP(aes32esmi, x26, x22, 0x2, 0x21e82832, 0xa8e1a8bb, 0x00f20000, x1, 8, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox32
+ // result rd:x27(0x52de92c6), rs1=>rd:x27(0x48c99fcb), rs2:x21(0xf3000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x27, x21, 0x3, 0x52de92c6, 0x48c99fcb, 0xf3000000, x1, 12, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox32
+ // result rd:x28(0x9ca2ed2a), rs1=>rd:x28(0x461d524f), rs2:x20(0x000000f4), imm:0x0
+ TEST_RI_OP(aes32esmi, x28, x20, 0x0, 0x9ca2ed2a, 0x461d524f, 0x000000f4, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox32
+ // result rd:x29(0xb46cc79e), rs1=>rd:x29(0x528a10af), rs2:x19(0x0000f500), imm:0x1
+ TEST_RI_OP(aes32esmi, x29, x19, 0x1, 0xb46cc79e, 0x528a10af, 0x0000f500, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox32
+ // result rd:x30(0xa31f3d81), rs1=>rd:x30(0xe19bfbc3), rs2:x18(0x00f60000), imm:0x2
+ TEST_RI_OP(aes32esmi, x30, x18, 0x2, 0xa31f3d81, 0xe19bfbc3, 0x00f60000, x4, 4, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox32
+ // result rd:x31(0xa0c29aa8), rs1=>rd:x31(0x707af2c0), rs2:x17(0xf7000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x31, x17, 0x3, 0xa0c29aa8, 0x707af2c0, 0xf7000000, x4, 8, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox32
+ // result rd:x1(0x673c51d9), rs1=>rd:x1(0xa47d105b), rs2:x16(0x000000f8), imm:0x0
+ TEST_RI_OP(aes32esmi, x1, x16, 0x0, 0x673c51d9, 0xa47d105b, 0x000000f8, x4, 12, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox32
+ // result rd:x2(0x8b82e593), rs1=>rd:x2(0x121bcc23), rs2:x15(0x0000f900), imm:0x1
+ TEST_RI_OP(aes32esmi, x2, x15, 0x1, 0x8b82e593, 0x121bcc23, 0x0000f900, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox32
+ // result rd:x3(0x80b026b8), rs1=>rd:x3(0xadea5195), rs2:x14(0x00fa0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x3, x14, 0x2, 0x80b026b8, 0xadea5195, 0x00fa0000, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox32
+ // result rd:x4(0xcceeb1ce), rs1=>rd:x4(0xd2ffbec1), rs2:x13(0xfb000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x4, x13, 0x3, 0xcceeb1ce, 0xd2ffbec1, 0xfb000000, x1, 4, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox32
+ // result rd:x5(0x635118c0), rs1=>rd:x5(0xa8e1a8bb), rs2:x12(0x000000fc), imm:0x0
+ TEST_RI_OP(aes32esmi, x5, x12, 0x0, 0x635118c0, 0xa8e1a8bb, 0x000000fc, x1, 8, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox32
+ // result rd:x6(0x1c9d3737), rs1=>rd:x6(0x48c99fcb), rs2:x11(0x0000fd00), imm:0x1
+ TEST_RI_OP(aes32esmi, x6, x11, 0x1, 0x1c9d3737, 0x48c99fcb, 0x0000fd00, x1, 12, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox32
+ // result rd:x7(0xfd7084f4), rs1=>rd:x7(0x461d524f), rs2:x10(0x00fe0000), imm:0x2
+ TEST_RI_OP(aes32esmi, x7, x10, 0x2, 0xfd7084f4, 0x461d524f, 0x00fe0000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox32
+ // result rd:x8(0x7eb006b9), rs1=>rd:x8(0x528a10af), rs2:x9(0xff000000), imm:0x3
+ TEST_RI_OP(aes32esmi, x8, x9, 0x3, 0x7eb006b9, 0x528a10af, 0xff000000, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+signature_31_0:
+ .fill 5, 4, 0xdeadbeef
+signature_32_0:
+ .fill 5, 4, 0xdeadbeef
+signature_33_0:
+ .fill 5, 4, 0xdeadbeef
+signature_34_0:
+ .fill 5, 4, 0xdeadbeef
+signature_35_0:
+ .fill 5, 4, 0xdeadbeef
+signature_36_0:
+ .fill 5, 4, 0xdeadbeef
+signature_37_0:
+ .fill 5, 4, 0xdeadbeef
+signature_38_0:
+ .fill 5, 4, 0xdeadbeef
+signature_39_0:
+ .fill 5, 4, 0xdeadbeef
+signature_40_0:
+ .fill 5, 4, 0xdeadbeef
+signature_41_0:
+ .fill 5, 4, 0xdeadbeef
+signature_42_0:
+ .fill 5, 4, 0xdeadbeef
+signature_43_0:
+ .fill 5, 4, 0xdeadbeef
+signature_44_0:
+ .fill 5, 4, 0xdeadbeef
+signature_45_0:
+ .fill 5, 4, 0xdeadbeef
+signature_46_0:
+ .fill 5, 4, 0xdeadbeef
+signature_47_0:
+ .fill 5, 4, 0xdeadbeef
+signature_48_0:
+ .fill 5, 4, 0xdeadbeef
+signature_49_0:
+ .fill 5, 4, 0xdeadbeef
+signature_50_0:
+ .fill 5, 4, 0xdeadbeef
+signature_51_0:
+ .fill 5, 4, 0xdeadbeef
+signature_52_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/ANDN-01.S b/riscof/suite/rv32i_m/K_unratified/ANDN-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..18d4ed708916ac34d997d4f251e8740d70be262c
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/ANDN-01.S
@@ -0,0 +1,1024 @@
+// RISC-V Architectural Validation Test ANDN-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'andn'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",andn)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",andn)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",andn)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xade01194), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(andn, x1, x31, x16, 0xade01194, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x5282ae80), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(andn, x2, x30, x15, 0x5282ae80, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x8881083b), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(andn, x3, x29, x14, 0x8881083b, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x08400408), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(andn, x4, x28, x13, 0x08400408, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x04154240), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(andn, x5, x27, x12, 0x04154240, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x108200a0), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(andn, x6, x26, x11, 0x108200a0, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xa1126000), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(andn, x7, x25, x10, 0xa1126000, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x501a5240), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(andn, x8, x24, x9, 0x501a5240, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x2400001a), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(andn, x9, x23, x8, 0x2400001a, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x12118c22), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(andn, x10, x22, x7, 0x12118c22, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(andn, x11, x21, x6, 0x00000000, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(andn, x12, x20, x5, 0x00000000, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(andn, x13, x19, x4, 0x00000000, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00000000), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(andn, x14, x18, x3, 0x00000000, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(andn, x15, x17, x2, 0x00000000, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(andn, x16, x16, x1, 0x00000000, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x00000000), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(andn, x17, x15, x31, 0x00000000, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00000000), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(andn, x18, x14, x30, 0x00000000, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00000000), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(andn, x19, x13, x29, 0x00000000, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00000000), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(andn, x20, x12, x28, 0x00000000, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00000000), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(andn, x21, x11, x27, 0x00000000, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00000000), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(andn, x22, x10, x26, 0x00000000, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00000000), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(andn, x23, x9, x25, 0x00000000, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00000000), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(andn, x24, x8, x24, 0x00000000, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00000000), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(andn, x25, x7, x23, 0x00000000, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00000000), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(andn, x26, x6, x22, 0x00000000, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00010000), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(andn, x27, x5, x21, 0x00010000, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00000000), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(andn, x28, x4, x20, 0x00000000, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00000000), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(andn, x29, x3, x19, 0x00000000, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00000000), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(andn, x30, x2, x18, 0x00000000, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00000000), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(andn, x31, x1, x17, 0x00000000, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00000000), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(andn, x1, x31, x16, 0x00000000, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00000000), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(andn, x2, x30, x15, 0x00000000, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00000000), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(andn, x3, x29, x14, 0x00000000, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x00000000), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(andn, x4, x28, x13, 0x00000000, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x00000000), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(andn, x5, x27, x12, 0x00000000, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x00000000), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(andn, x6, x26, x11, 0x00000000, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x00000000), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(andn, x7, x25, x10, 0x00000000, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x00000000), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(andn, x8, x24, x9, 0x00000000, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x00000000), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(andn, x9, x23, x8, 0x00000000, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x00000000), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(andn, x10, x22, x7, 0x00000000, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(andn, x11, x21, x6, 0x00000000, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(andn, x12, x20, x5, 0x00000000, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xfffffffe), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(andn, x13, x19, x4, 0xfffffffe, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x7ffffffd), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(andn, x14, x18, x3, 0x7ffffffd, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xbffffffb), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(andn, x15, x17, x2, 0xbffffffb, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xdffffff7), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(andn, x16, x16, x1, 0xdffffff7, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xefffffef), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(andn, x17, x15, x31, 0xefffffef, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xf7ffffdf), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(andn, x18, x14, x30, 0xf7ffffdf, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xfbffffbf), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(andn, x19, x13, x29, 0xfbffffbf, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xfdffff7f), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(andn, x20, x12, x28, 0xfdffff7f, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xfefffeff), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(andn, x21, x11, x27, 0xfefffeff, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xff7ffdff), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(andn, x22, x10, x26, 0xff7ffdff, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xffbffbff), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(andn, x23, x9, x25, 0xffbffbff, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xffdff7ff), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(andn, x24, x8, x24, 0xffdff7ff, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xffefefff), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(andn, x25, x7, x23, 0xffefefff, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xfff7dfff), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(andn, x26, x6, x22, 0xfff7dfff, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xfffbbfff), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(andn, x27, x5, x21, 0xfffbbfff, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xfffd7fff), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(andn, x28, x4, x20, 0xfffd7fff, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xfffeffff), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(andn, x29, x3, x19, 0xfffeffff, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xfffd7fff), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(andn, x30, x2, x18, 0xfffd7fff, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xfffbbfff), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(andn, x31, x1, x17, 0xfffbbfff, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xfff7dfff), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(andn, x1, x31, x16, 0xfff7dfff, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xffefefff), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(andn, x2, x30, x15, 0xffefefff, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xffdff7ff), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(andn, x3, x29, x14, 0xffdff7ff, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xffbffbff), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(andn, x4, x28, x13, 0xffbffbff, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xff7ffdff), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(andn, x5, x27, x12, 0xff7ffdff, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xfefffeff), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(andn, x6, x26, x11, 0xfefffeff, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfdffff7f), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(andn, x7, x25, x10, 0xfdffff7f, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xfbffffbf), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(andn, x8, x24, x9, 0xfbffffbf, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xf7ffffdf), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(andn, x9, x23, x8, 0xf7ffffdf, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xefffffef), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(andn, x10, x22, x7, 0xefffffef, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xdffffff7), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(andn, x11, x21, x6, 0xdffffff7, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xbffffffb), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(andn, x12, x20, x5, 0xbffffffb, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x7ffffffd), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(andn, x13, x19, x4, 0x7ffffffd, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfffffffe), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(andn, x14, x18, x3, 0xfffffffe, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000001), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(andn, x15, x17, x2, 0x00000001, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000002), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(andn, x16, x16, x1, 0x00000002, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000004), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(andn, x17, x15, x31, 0x00000004, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000008), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(andn, x18, x14, x30, 0x00000008, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000010), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(andn, x19, x13, x29, 0x00000010, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000020), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(andn, x20, x12, x28, 0x00000020, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000040), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(andn, x21, x11, x27, 0x00000040, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000080), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(andn, x22, x10, x26, 0x00000080, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000100), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(andn, x23, x9, x25, 0x00000100, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000200), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(andn, x24, x8, x24, 0x00000200, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000400), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(andn, x25, x7, x23, 0x00000400, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000800), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(andn, x26, x6, x22, 0x00000800, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00001000), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(andn, x27, x5, x21, 0x00001000, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00002000), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(andn, x28, x4, x20, 0x00002000, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00004000), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(andn, x29, x3, x19, 0x00004000, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00008000), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(andn, x30, x2, x18, 0x00008000, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00010000), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(andn, x31, x1, x17, 0x00010000, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00020000), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(andn, x1, x31, x16, 0x00020000, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00040000), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(andn, x2, x30, x15, 0x00040000, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00080000), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(andn, x3, x29, x14, 0x00080000, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00100000), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(andn, x4, x28, x13, 0x00100000, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00200000), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(andn, x5, x27, x12, 0x00200000, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00400000), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(andn, x6, x26, x11, 0x00400000, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00800000), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(andn, x7, x25, x10, 0x00800000, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x01000000), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(andn, x8, x24, x9, 0x01000000, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x02000000), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(andn, x9, x23, x8, 0x02000000, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x04000000), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(andn, x10, x22, x7, 0x04000000, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x08000000), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(andn, x11, x21, x6, 0x08000000, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x10000000), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(andn, x12, x20, x5, 0x10000000, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x20000000), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(andn, x13, x19, x4, 0x20000000, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x40000000), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(andn, x14, x18, x3, 0x40000000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x80000000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(andn, x15, x17, x2, 0x80000000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(andn, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfffffffe), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(andn, x17, x15, x31, 0xfffffffe, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfffffffd), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(andn, x18, x14, x30, 0xfffffffd, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfffffffb), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(andn, x19, x13, x29, 0xfffffffb, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xfffffff7), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(andn, x20, x12, x28, 0xfffffff7, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffef), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(andn, x21, x11, x27, 0xffffffef, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffdf), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(andn, x22, x10, x26, 0xffffffdf, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffbf), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(andn, x23, x9, x25, 0xffffffbf, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffff7f), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(andn, x24, x8, x24, 0xffffff7f, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfffffeff), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(andn, x25, x7, x23, 0xfffffeff, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfffffdff), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(andn, x26, x6, x22, 0xfffffdff, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xfffffbff), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(andn, x27, x5, x21, 0xfffffbff, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfffff7ff), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(andn, x28, x4, x20, 0xfffff7ff, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffefff), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(andn, x29, x3, x19, 0xffffefff, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffdfff), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(andn, x30, x2, x18, 0xffffdfff, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffbfff), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(andn, x31, x1, x17, 0xffffbfff, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffff7fff), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(andn, x1, x31, x16, 0xffff7fff, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffeffff), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(andn, x2, x30, x15, 0xfffeffff, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfffdffff), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(andn, x3, x29, x14, 0xfffdffff, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfffbffff), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(andn, x4, x28, x13, 0xfffbffff, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfff7ffff), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(andn, x5, x27, x12, 0xfff7ffff, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffefffff), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(andn, x6, x26, x11, 0xffefffff, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffdfffff), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(andn, x7, x25, x10, 0xffdfffff, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffbfffff), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(andn, x8, x24, x9, 0xffbfffff, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xff7fffff), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(andn, x9, x23, x8, 0xff7fffff, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfeffffff), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(andn, x10, x22, x7, 0xfeffffff, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xfdffffff), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(andn, x11, x21, x6, 0xfdffffff, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xfbffffff), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(andn, x12, x20, x5, 0xfbffffff, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xf7ffffff), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(andn, x13, x19, x4, 0xf7ffffff, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xefffffff), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(andn, x14, x18, x3, 0xefffffff, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xdfffffff), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(andn, x15, x17, x2, 0xdfffffff, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xbfffffff), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(andn, x16, x16, x1, 0xbfffffff, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x7fffffff), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(andn, x17, x15, x31, 0x7fffffff, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(andn, x18, x14, x30, 0xffffffff, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0x00000000), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(andn, x19, x29, x29, 0x00000000, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(andn, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xa8e1a8bb), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(andn, x21, x11, x0, 0xa8e1a8bb, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(andn, x22, x0, x26, 0x00000000, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/CLMUL-01.S b/riscof/suite/rv32i_m/K_unratified/CLMUL-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..3c7e44a428a1750507b4e25ad70283d76a66fa8b
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/CLMUL-01.S
@@ -0,0 +1,1024 @@
+// RISC-V Architectural Validation Test CLMUL-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'clmul'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",clmul)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",clmul)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",clmul)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x1156fc1f), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(clmul, x1, x31, x16, 0x1156fc1f, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x18b8791b), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(clmul, x2, x30, x15, 0x18b8791b, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xacbe9540), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(clmul, x3, x29, x14, 0xacbe9540, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x378b221d), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(clmul, x4, x28, x13, 0x378b221d, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x45f9b3f5), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(clmul, x5, x27, x12, 0x45f9b3f5, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x45f9b3f5), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(clmul, x6, x26, x11, 0x45f9b3f5, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x378b221d), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(clmul, x7, x25, x10, 0x378b221d, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xacbe9540), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(clmul, x8, x24, x9, 0xacbe9540, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x18b8791b), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(clmul, x9, x23, x8, 0x18b8791b, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x1156fc1f), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(clmul, x10, x22, x7, 0x1156fc1f, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0xffffffff), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(clmul, x11, x21, x6, 0xffffffff, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0xfffffffe), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(clmul, x12, x20, x5, 0xfffffffe, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0xfffffffc), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(clmul, x13, x19, x4, 0xfffffffc, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0xfffffff8), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(clmul, x14, x18, x3, 0xfffffff8, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0xfffffff0), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(clmul, x15, x17, x2, 0xfffffff0, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0xffffffe0), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(clmul, x16, x16, x1, 0xffffffe0, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0xffffffc0), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(clmul, x17, x15, x31, 0xffffffc0, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xffffff80), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(clmul, x18, x14, x30, 0xffffff80, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0xffffff00), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(clmul, x19, x13, x29, 0xffffff00, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0xfffffe00), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(clmul, x20, x12, x28, 0xfffffe00, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0xfffffc00), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(clmul, x21, x11, x27, 0xfffffc00, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0xfffff800), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(clmul, x22, x10, x26, 0xfffff800, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0xfffff000), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(clmul, x23, x9, x25, 0xfffff000, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0xffffe000), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(clmul, x24, x8, x24, 0xffffe000, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0xffffc000), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(clmul, x25, x7, x23, 0xffffc000, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0xffff8000), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(clmul, x26, x6, x22, 0xffff8000, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0xffff0000), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(clmul, x27, x5, x21, 0xffff0000, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0xfffe0000), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(clmul, x28, x4, x20, 0xfffe0000, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0xfffc0000), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(clmul, x29, x3, x19, 0xfffc0000, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0xfff80000), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(clmul, x30, x2, x18, 0xfff80000, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0xfff00000), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(clmul, x31, x1, x17, 0xfff00000, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0xffe00000), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(clmul, x1, x31, x16, 0xffe00000, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0xffc00000), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(clmul, x2, x30, x15, 0xffc00000, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0xff800000), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(clmul, x3, x29, x14, 0xff800000, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0xff000000), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(clmul, x4, x28, x13, 0xff000000, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0xfe000000), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(clmul, x5, x27, x12, 0xfe000000, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0xfc000000), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(clmul, x6, x26, x11, 0xfc000000, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xf8000000), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(clmul, x7, x25, x10, 0xf8000000, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0xf0000000), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(clmul, x8, x24, x9, 0xf0000000, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0xe0000000), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(clmul, x9, x23, x8, 0xe0000000, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0xc0000000), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(clmul, x10, x22, x7, 0xc0000000, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x80000000), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(clmul, x11, x21, x6, 0x80000000, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(clmul, x12, x20, x5, 0x00000000, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(clmul, x13, x19, x4, 0x00000000, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x80000000), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(clmul, x14, x18, x3, 0x80000000, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xc0000000), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(clmul, x15, x17, x2, 0xc0000000, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xe0000000), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(clmul, x16, x16, x1, 0xe0000000, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xf0000000), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(clmul, x17, x15, x31, 0xf0000000, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xf8000000), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(clmul, x18, x14, x30, 0xf8000000, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xfc000000), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(clmul, x19, x13, x29, 0xfc000000, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xfe000000), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(clmul, x20, x12, x28, 0xfe000000, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xff000000), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(clmul, x21, x11, x27, 0xff000000, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xff800000), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(clmul, x22, x10, x26, 0xff800000, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xffc00000), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(clmul, x23, x9, x25, 0xffc00000, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xffe00000), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(clmul, x24, x8, x24, 0xffe00000, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xfff00000), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(clmul, x25, x7, x23, 0xfff00000, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xfff80000), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(clmul, x26, x6, x22, 0xfff80000, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xfffc0000), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(clmul, x27, x5, x21, 0xfffc0000, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xfffe0000), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(clmul, x28, x4, x20, 0xfffe0000, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xffff0000), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(clmul, x29, x3, x19, 0xffff0000, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xffff8000), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(clmul, x30, x2, x18, 0xffff8000, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xffffc000), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(clmul, x31, x1, x17, 0xffffc000, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xffffe000), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(clmul, x1, x31, x16, 0xffffe000, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xfffff000), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(clmul, x2, x30, x15, 0xfffff000, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xfffff800), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(clmul, x3, x29, x14, 0xfffff800, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xfffffc00), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(clmul, x4, x28, x13, 0xfffffc00, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xfffffe00), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(clmul, x5, x27, x12, 0xfffffe00, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xffffff00), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(clmul, x6, x26, x11, 0xffffff00, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xffffff80), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(clmul, x7, x25, x10, 0xffffff80, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xffffffc0), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(clmul, x8, x24, x9, 0xffffffc0, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xffffffe0), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(clmul, x9, x23, x8, 0xffffffe0, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xfffffff0), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(clmul, x10, x22, x7, 0xfffffff0, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xfffffff8), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(clmul, x11, x21, x6, 0xfffffff8, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xfffffffc), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(clmul, x12, x20, x5, 0xfffffffc, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xfffffffe), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(clmul, x13, x19, x4, 0xfffffffe, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(clmul, x14, x18, x3, 0xffffffff, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(clmul, x15, x17, x2, 0x00000000, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(clmul, x16, x16, x1, 0x00000000, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000000), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(clmul, x17, x15, x31, 0x00000000, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000000), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(clmul, x18, x14, x30, 0x00000000, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000000), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(clmul, x19, x13, x29, 0x00000000, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000000), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(clmul, x20, x12, x28, 0x00000000, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000000), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(clmul, x21, x11, x27, 0x00000000, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000000), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(clmul, x22, x10, x26, 0x00000000, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(clmul, x23, x9, x25, 0x00000000, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(clmul, x24, x8, x24, 0x00000000, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(clmul, x25, x7, x23, 0x00000000, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(clmul, x26, x6, x22, 0x00000000, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(clmul, x27, x5, x21, 0x00000000, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(clmul, x28, x4, x20, 0x00000000, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(clmul, x29, x3, x19, 0x00000000, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(clmul, x30, x2, x18, 0x00000000, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(clmul, x31, x1, x17, 0x00000000, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(clmul, x1, x31, x16, 0x00000000, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(clmul, x2, x30, x15, 0x00000000, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(clmul, x3, x29, x14, 0x00000000, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(clmul, x4, x28, x13, 0x00000000, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(clmul, x5, x27, x12, 0x00000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(clmul, x6, x26, x11, 0x00000000, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(clmul, x7, x25, x10, 0x00000000, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(clmul, x8, x24, x9, 0x00000000, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(clmul, x9, x23, x8, 0x00000000, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(clmul, x10, x22, x7, 0x00000000, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(clmul, x11, x21, x6, 0x00000000, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(clmul, x12, x20, x5, 0x00000000, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(clmul, x13, x19, x4, 0x00000000, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000000), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(clmul, x14, x18, x3, 0x00000000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(clmul, x15, x17, x2, 0x00000000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(clmul, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x00000000), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(clmul, x17, x15, x31, 0x00000000, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x00000000), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(clmul, x18, x14, x30, 0x00000000, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x00000000), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(clmul, x19, x13, x29, 0x00000000, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x00000000), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(clmul, x20, x12, x28, 0x00000000, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x00000000), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(clmul, x21, x11, x27, 0x00000000, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x00000000), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(clmul, x22, x10, x26, 0x00000000, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x00000000), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(clmul, x23, x9, x25, 0x00000000, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000000), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(clmul, x24, x8, x24, 0x00000000, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x00000000), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(clmul, x25, x7, x23, 0x00000000, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x00000000), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(clmul, x26, x6, x22, 0x00000000, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x00000000), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(clmul, x27, x5, x21, 0x00000000, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x00000000), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(clmul, x28, x4, x20, 0x00000000, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x00000000), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(clmul, x29, x3, x19, 0x00000000, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x00000000), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(clmul, x30, x2, x18, 0x00000000, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x00000000), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(clmul, x31, x1, x17, 0x00000000, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x00000000), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(clmul, x1, x31, x16, 0x00000000, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x00000000), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(clmul, x2, x30, x15, 0x00000000, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x00000000), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(clmul, x3, x29, x14, 0x00000000, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x00000000), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(clmul, x4, x28, x13, 0x00000000, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x00000000), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(clmul, x5, x27, x12, 0x00000000, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x00000000), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(clmul, x6, x26, x11, 0x00000000, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x00000000), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(clmul, x7, x25, x10, 0x00000000, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x00000000), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(clmul, x8, x24, x9, 0x00000000, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00000000), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(clmul, x9, x23, x8, 0x00000000, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x00000000), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(clmul, x10, x22, x7, 0x00000000, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(clmul, x11, x21, x6, 0x00000000, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(clmul, x12, x20, x5, 0x00000000, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(clmul, x13, x19, x4, 0x00000000, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x00000000), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(clmul, x14, x18, x3, 0x00000000, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(clmul, x15, x17, x2, 0x00000000, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(clmul, x16, x16, x1, 0x00000000, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x00000000), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(clmul, x17, x15, x31, 0x00000000, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x00000000), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(clmul, x18, x14, x30, 0x00000000, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0x50500405), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(clmul, x19, x29, x29, 0x50500405, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(clmul, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x00000000), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(clmul, x21, x11, x0, 0x00000000, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(clmul, x22, x0, x26, 0x00000000, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/CLMULH-01.S b/riscof/suite/rv32i_m/K_unratified/CLMULH-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..7ea60a7cc9c49d3a5443919f8ec1cf6cf3e2119c
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/CLMULH-01.S
@@ -0,0 +1,1024 @@
+// RISC-V Architectural Validation Test CLMULH-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'clmulh'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",clmulh)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",clmulh)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",clmulh)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x0b8b4c30), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x0b8b4c30, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x704d1a4d), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x704d1a4d, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x359b99cc), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x359b99cc, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x3f251c5b), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x3f251c5b, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x154b0d23), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x154b0d23, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x154b0d23), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x154b0d23, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x3f251c5b), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x3f251c5b, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x359b99cc), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x359b99cc, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x704d1a4d), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x704d1a4d, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x0b8b4c30), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x0b8b4c30, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x00000000, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x00000000, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00000002), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x00000002, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00000006), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x00000006, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000e), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x0000000e, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000001e), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x0000001e, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000003e), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x0000003e, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000007e), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x0000007e, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x000000fe), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(clmulh, x19, x13, x29, 0x000000fe, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x000001fe), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(clmulh, x20, x12, x28, 0x000001fe, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x000003fe), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(clmulh, x21, x11, x27, 0x000003fe, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x000007fe), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(clmulh, x22, x10, x26, 0x000007fe, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00000ffe), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(clmulh, x23, x9, x25, 0x00000ffe, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00001ffe), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(clmulh, x24, x8, x24, 0x00001ffe, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00003ffe), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(clmulh, x25, x7, x23, 0x00003ffe, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00007ffe), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(clmulh, x26, x6, x22, 0x00007ffe, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000fffe), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(clmulh, x27, x5, x21, 0x0000fffe, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0001fffe), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(clmulh, x28, x4, x20, 0x0001fffe, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0003fffe), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(clmulh, x29, x3, x19, 0x0003fffe, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0007fffe), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(clmulh, x30, x2, x18, 0x0007fffe, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x000ffffe), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(clmulh, x31, x1, x17, 0x000ffffe, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x001ffffe), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x001ffffe, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x003ffffe), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x003ffffe, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x007ffffe), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x007ffffe, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x00fffffe), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x00fffffe, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x01fffffe), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x01fffffe, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x03fffffe), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x03fffffe, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x07fffffe), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x07fffffe, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0ffffffe), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x0ffffffe, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x1ffffffe), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x1ffffffe, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x3ffffffe), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x3ffffffe, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x7ffffffe), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x7ffffffe, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x00000000, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x00000000, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x7ffffffe), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x7ffffffe, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x3ffffffe), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x3ffffffe, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x1ffffffe), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x1ffffffe, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0ffffffe), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x0ffffffe, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x07fffffe), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x07fffffe, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x03fffffe), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(clmulh, x19, x13, x29, 0x03fffffe, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x01fffffe), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(clmulh, x20, x12, x28, 0x01fffffe, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x00fffffe), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(clmulh, x21, x11, x27, 0x00fffffe, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x007ffffe), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(clmulh, x22, x10, x26, 0x007ffffe, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x003ffffe), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(clmulh, x23, x9, x25, 0x003ffffe, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x001ffffe), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(clmulh, x24, x8, x24, 0x001ffffe, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x000ffffe), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(clmulh, x25, x7, x23, 0x000ffffe, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0007fffe), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(clmulh, x26, x6, x22, 0x0007fffe, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0003fffe), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(clmulh, x27, x5, x21, 0x0003fffe, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0001fffe), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(clmulh, x28, x4, x20, 0x0001fffe, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000fffe), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(clmulh, x29, x3, x19, 0x0000fffe, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x00007ffe), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(clmulh, x30, x2, x18, 0x00007ffe, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x00003ffe), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(clmulh, x31, x1, x17, 0x00003ffe, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x00001ffe), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x00001ffe, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x00000ffe), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x00000ffe, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x000007fe), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x000007fe, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x000003fe), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x000003fe, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x000001fe), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x000001fe, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x000000fe), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x000000fe, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000007e), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x0000007e, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000003e), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x0000003e, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000001e), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x0000001e, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000e), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x0000000e, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x00000006), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x00000006, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x00000002), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x00000002, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x00000000, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x00000000), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x00000000, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x00000000, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x00000000, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000000), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x00000000, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000000), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x00000000, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000000), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(clmulh, x19, x13, x29, 0x00000000, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000000), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(clmulh, x20, x12, x28, 0x00000000, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000000), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(clmulh, x21, x11, x27, 0x00000000, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000000), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(clmulh, x22, x10, x26, 0x00000000, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(clmulh, x23, x9, x25, 0x00000000, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(clmulh, x24, x8, x24, 0x00000000, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(clmulh, x25, x7, x23, 0x00000000, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(clmulh, x26, x6, x22, 0x00000000, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(clmulh, x27, x5, x21, 0x00000000, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(clmulh, x28, x4, x20, 0x00000000, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(clmulh, x29, x3, x19, 0x00000000, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(clmulh, x30, x2, x18, 0x00000000, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(clmulh, x31, x1, x17, 0x00000000, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x00000000, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x00000000, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x00000000, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x00000000, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x00000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x00000000, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x00000000, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x00000000, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x00000000, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x00000000, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x00000000, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x00000000, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x00000000, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000000), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x00000000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x00000000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x00000000), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x00000000, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x00000000), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x00000000, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x00000000), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(clmulh, x19, x13, x29, 0x00000000, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x00000000), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(clmulh, x20, x12, x28, 0x00000000, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x00000000), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(clmulh, x21, x11, x27, 0x00000000, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x00000000), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(clmulh, x22, x10, x26, 0x00000000, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x00000000), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(clmulh, x23, x9, x25, 0x00000000, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000000), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(clmulh, x24, x8, x24, 0x00000000, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x00000000), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(clmulh, x25, x7, x23, 0x00000000, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x00000000), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(clmulh, x26, x6, x22, 0x00000000, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x00000000), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(clmulh, x27, x5, x21, 0x00000000, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x00000000), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(clmulh, x28, x4, x20, 0x00000000, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x00000000), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(clmulh, x29, x3, x19, 0x00000000, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x00000000), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(clmulh, x30, x2, x18, 0x00000000, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x00000000), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(clmulh, x31, x1, x17, 0x00000000, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x00000000), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x00000000, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x00000000), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x00000000, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x00000000), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x00000000, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x00000000), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x00000000, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x00000000), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x00000000, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x00000000), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x00000000, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x00000000), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x00000000, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x00000000), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x00000000, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00000000), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x00000000, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x00000000), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x00000000, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x00000000, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x00000000, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x00000000, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x00000000), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x00000000, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x00000000, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x00000000, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x00000000), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x00000000, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x00000000), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x00000000, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0x01040145), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(clmulh, x19, x29, x29, 0x01040145, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(clmulh, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x00000000), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(clmulh, x21, x11, x0, 0x00000000, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(clmulh, x22, x0, x26, 0x00000000, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/ORN-01.S b/riscof/suite/rv32i_m/K_unratified/ORN-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..b9f5178963f6c8d53adf3dc3e7b07e8ba29ab5d1
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/ORN-01.S
@@ -0,0 +1,1024 @@
+// RISC-V Architectural Validation Test ORN-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'orn'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",orn)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",orn)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",orn)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xedee73dd), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(orn, x1, x31, x16, 0xedee73dd, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xdbffffe5), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(orn, x2, x30, x15, 0xdbffffe5, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xafe5adbf), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(orn, x3, x29, x14, 0xafe5adbf, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x5eed9fff), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(orn, x4, x28, x13, 0x5eed9fff, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xef7dff5f), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(orn, x5, x27, x12, 0xef7dff5f, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xfbeabdbf), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(orn, x6, x26, x11, 0xfbeabdbf, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xf7bffbf7), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(orn, x7, x25, x10, 0xf7bffbf7, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x777ef7c4), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(orn, x8, x24, x9, 0x777ef7c4, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xad7d517f), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(orn, x9, x23, x8, 0xad7d517f, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x521fee6b), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(orn, x10, x22, x7, 0x521fee6b, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00000001), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(orn, x11, x21, x6, 0x00000001, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x80000002), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(orn, x12, x20, x5, 0x80000002, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x40000004), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(orn, x13, x19, x4, 0x40000004, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x20000008), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(orn, x14, x18, x3, 0x20000008, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x10000010), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(orn, x15, x17, x2, 0x10000010, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x08000020), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(orn, x16, x16, x1, 0x08000020, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x04000040), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(orn, x17, x15, x31, 0x04000040, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x02000080), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(orn, x18, x14, x30, 0x02000080, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x01000100), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(orn, x19, x13, x29, 0x01000100, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00800200), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(orn, x20, x12, x28, 0x00800200, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00400400), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(orn, x21, x11, x27, 0x00400400, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00200800), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(orn, x22, x10, x26, 0x00200800, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00101000), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(orn, x23, x9, x25, 0x00101000, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00082000), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(orn, x24, x8, x24, 0x00082000, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00044000), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(orn, x25, x7, x23, 0x00044000, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00028000), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(orn, x26, x6, x22, 0x00028000, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00010000), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(orn, x27, x5, x21, 0x00010000, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00028000), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(orn, x28, x4, x20, 0x00028000, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00044000), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(orn, x29, x3, x19, 0x00044000, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00082000), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(orn, x30, x2, x18, 0x00082000, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00101000), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(orn, x31, x1, x17, 0x00101000, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00200800), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(orn, x1, x31, x16, 0x00200800, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00400400), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(orn, x2, x30, x15, 0x00400400, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00800200), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(orn, x3, x29, x14, 0x00800200, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x01000100), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(orn, x4, x28, x13, 0x01000100, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x02000080), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(orn, x5, x27, x12, 0x02000080, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x04000040), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(orn, x6, x26, x11, 0x04000040, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x08000020), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(orn, x7, x25, x10, 0x08000020, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x10000010), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(orn, x8, x24, x9, 0x10000010, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x20000008), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(orn, x9, x23, x8, 0x20000008, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x40000004), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(orn, x10, x22, x7, 0x40000004, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x80000002), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(orn, x11, x21, x6, 0x80000002, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000001), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(orn, x12, x20, x5, 0x00000001, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xffffffff), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(orn, x13, x19, x4, 0xffffffff, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(orn, x14, x18, x3, 0xffffffff, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xffffffff), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(orn, x15, x17, x2, 0xffffffff, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xffffffff), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(orn, x16, x16, x1, 0xffffffff, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xffffffff), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(orn, x17, x15, x31, 0xffffffff, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(orn, x18, x14, x30, 0xffffffff, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xffffffff), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(orn, x19, x13, x29, 0xffffffff, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xffffffff), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(orn, x20, x12, x28, 0xffffffff, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xffffffff), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(orn, x21, x11, x27, 0xffffffff, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xffffffff), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(orn, x22, x10, x26, 0xffffffff, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xffffffff), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(orn, x23, x9, x25, 0xffffffff, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xffffffff), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(orn, x24, x8, x24, 0xffffffff, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xffffffff), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(orn, x25, x7, x23, 0xffffffff, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xffffffff), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(orn, x26, x6, x22, 0xffffffff, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xffffffff), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(orn, x27, x5, x21, 0xffffffff, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xffffffff), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(orn, x28, x4, x20, 0xffffffff, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xfffeffff), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(orn, x29, x3, x19, 0xfffeffff, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xffffffff), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(orn, x30, x2, x18, 0xffffffff, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xffffffff), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(orn, x31, x1, x17, 0xffffffff, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xffffffff), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(orn, x1, x31, x16, 0xffffffff, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xffffffff), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(orn, x2, x30, x15, 0xffffffff, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xffffffff), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(orn, x3, x29, x14, 0xffffffff, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xffffffff), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(orn, x4, x28, x13, 0xffffffff, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xffffffff), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(orn, x5, x27, x12, 0xffffffff, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xffffffff), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(orn, x6, x26, x11, 0xffffffff, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xffffffff), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(orn, x7, x25, x10, 0xffffffff, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xffffffff), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(orn, x8, x24, x9, 0xffffffff, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xffffffff), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(orn, x9, x23, x8, 0xffffffff, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xffffffff), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(orn, x10, x22, x7, 0xffffffff, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xffffffff), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(orn, x11, x21, x6, 0xffffffff, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xffffffff), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(orn, x12, x20, x5, 0xffffffff, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xffffffff), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(orn, x13, x19, x4, 0xffffffff, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(orn, x14, x18, x3, 0xffffffff, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xffffffff), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(orn, x15, x17, x2, 0xffffffff, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xffffffff), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(orn, x16, x16, x1, 0xffffffff, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xffffffff), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(orn, x17, x15, x31, 0xffffffff, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(orn, x18, x14, x30, 0xffffffff, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xffffffff), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(orn, x19, x13, x29, 0xffffffff, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xffffffff), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(orn, x20, x12, x28, 0xffffffff, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xffffffff), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(orn, x21, x11, x27, 0xffffffff, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xffffffff), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(orn, x22, x10, x26, 0xffffffff, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xffffffff), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(orn, x23, x9, x25, 0xffffffff, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xffffffff), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(orn, x24, x8, x24, 0xffffffff, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xffffffff), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(orn, x25, x7, x23, 0xffffffff, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xffffffff), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(orn, x26, x6, x22, 0xffffffff, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xffffffff), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(orn, x27, x5, x21, 0xffffffff, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xffffffff), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(orn, x28, x4, x20, 0xffffffff, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xffffffff), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(orn, x29, x3, x19, 0xffffffff, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xffffffff), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(orn, x30, x2, x18, 0xffffffff, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xffffffff), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(orn, x31, x1, x17, 0xffffffff, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xffffffff), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(orn, x1, x31, x16, 0xffffffff, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xffffffff), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(orn, x2, x30, x15, 0xffffffff, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xffffffff), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(orn, x3, x29, x14, 0xffffffff, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffffffff), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(orn, x4, x28, x13, 0xffffffff, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xffffffff), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(orn, x5, x27, x12, 0xffffffff, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xffffffff), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(orn, x6, x26, x11, 0xffffffff, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xffffffff), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(orn, x7, x25, x10, 0xffffffff, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xffffffff), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(orn, x8, x24, x9, 0xffffffff, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xffffffff), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(orn, x9, x23, x8, 0xffffffff, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xffffffff), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(orn, x10, x22, x7, 0xffffffff, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffffff), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(orn, x11, x21, x6, 0xffffffff, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffffffff), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(orn, x12, x20, x5, 0xffffffff, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffffffff), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(orn, x13, x19, x4, 0xffffffff, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(orn, x14, x18, x3, 0xffffffff, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xffffffff), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(orn, x15, x17, x2, 0xffffffff, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xffffffff), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(orn, x16, x16, x1, 0xffffffff, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xffffffff), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(orn, x17, x15, x31, 0xffffffff, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(orn, x18, x14, x30, 0xffffffff, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffff), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(orn, x19, x13, x29, 0xffffffff, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffff), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(orn, x20, x12, x28, 0xffffffff, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffff), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(orn, x21, x11, x27, 0xffffffff, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffff), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(orn, x22, x10, x26, 0xffffffff, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffff), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(orn, x23, x9, x25, 0xffffffff, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffffff), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(orn, x24, x8, x24, 0xffffffff, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffff), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(orn, x25, x7, x23, 0xffffffff, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffffff), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(orn, x26, x6, x22, 0xffffffff, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffffff), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(orn, x27, x5, x21, 0xffffffff, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffffff), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(orn, x28, x4, x20, 0xffffffff, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffffff), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(orn, x29, x3, x19, 0xffffffff, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffffff), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(orn, x30, x2, x18, 0xffffffff, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffffff), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(orn, x31, x1, x17, 0xffffffff, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffffffff), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(orn, x1, x31, x16, 0xffffffff, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffffffff), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(orn, x2, x30, x15, 0xffffffff, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffffffff), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(orn, x3, x29, x14, 0xffffffff, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffffff), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(orn, x4, x28, x13, 0xffffffff, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffffff), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(orn, x5, x27, x12, 0xffffffff, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffffffff), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(orn, x6, x26, x11, 0xffffffff, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffffffff), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(orn, x7, x25, x10, 0xffffffff, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffffffff), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(orn, x8, x24, x9, 0xffffffff, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffffffff), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(orn, x9, x23, x8, 0xffffffff, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffffffff), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(orn, x10, x22, x7, 0xffffffff, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xffffffff), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(orn, x11, x21, x6, 0xffffffff, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffffff), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(orn, x12, x20, x5, 0xffffffff, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffffffff), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(orn, x13, x19, x4, 0xffffffff, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(orn, x14, x18, x3, 0xffffffff, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xffffffff), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(orn, x15, x17, x2, 0xffffffff, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffff), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(orn, x16, x16, x1, 0xffffffff, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xffffffff), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(orn, x17, x15, x31, 0xffffffff, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(orn, x18, x14, x30, 0xffffffff, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0xffffffff), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(orn, x19, x29, x29, 0xffffffff, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(orn, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xffffffff), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(orn, x21, x11, x0, 0xffffffff, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x1e64043c), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(orn, x22, x0, x26, 0x1e64043c, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/PACK-01.S b/riscof/suite/rv32i_m/K_unratified/PACK-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..4336c10a08df436e06601c8058b8eb8ebcea491c
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/PACK-01.S
@@ -0,0 +1,1024 @@
+// RISC-V Architectural Validation Test PACK-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'pack'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",pack)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",pack)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",pack)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xcc235195), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(pack, x1, x31, x16, 0xcc235195, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x105bbec1), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(pack, x2, x30, x15, 0x105bbec1, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xf2c0a8bb), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(pack, x3, x29, x14, 0xf2c0a8bb, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xfbc39fcb), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(pack, x4, x28, x13, 0xfbc39fcb, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x10af524f), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(pack, x5, x27, x12, 0x10af524f, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x524f10af), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(pack, x6, x26, x11, 0x524f10af, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x9fcbfbc3), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(pack, x7, x25, x10, 0x9fcbfbc3, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xa8bbf2c0), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(pack, x8, x24, x9, 0xa8bbf2c0, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xbec1105b), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(pack, x9, x23, x8, 0xbec1105b, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x5195cc23), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(pack, x10, x22, x7, 0x5195cc23, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0xffff0001), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(pack, x11, x21, x6, 0xffff0001, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0xffff0002), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(pack, x12, x20, x5, 0xffff0002, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0xffff0004), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(pack, x13, x19, x4, 0xffff0004, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0xffff0008), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(pack, x14, x18, x3, 0xffff0008, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0xffff0010), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(pack, x15, x17, x2, 0xffff0010, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0xffff0020), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(pack, x16, x16, x1, 0xffff0020, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0xffff0040), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(pack, x17, x15, x31, 0xffff0040, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xffff0080), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(pack, x18, x14, x30, 0xffff0080, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0xffff0100), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(pack, x19, x13, x29, 0xffff0100, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0xffff0200), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(pack, x20, x12, x28, 0xffff0200, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0xffff0400), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(pack, x21, x11, x27, 0xffff0400, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0xffff0800), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(pack, x22, x10, x26, 0xffff0800, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0xffff1000), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(pack, x23, x9, x25, 0xffff1000, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0xffff2000), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(pack, x24, x8, x24, 0xffff2000, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0xffff4000), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(pack, x25, x7, x23, 0xffff4000, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0xffff8000), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(pack, x26, x6, x22, 0xffff8000, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0xffff0000), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(pack, x27, x5, x21, 0xffff0000, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x7fff0000), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(pack, x28, x4, x20, 0x7fff0000, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0xbfff0000), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(pack, x29, x3, x19, 0xbfff0000, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0xdfff0000), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(pack, x30, x2, x18, 0xdfff0000, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0xefff0000), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(pack, x31, x1, x17, 0xefff0000, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0xf7ff0000), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(pack, x1, x31, x16, 0xf7ff0000, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0xfbff0000), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(pack, x2, x30, x15, 0xfbff0000, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0xfdff0000), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(pack, x3, x29, x14, 0xfdff0000, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0xfeff0000), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(pack, x4, x28, x13, 0xfeff0000, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0xff7f0000), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(pack, x5, x27, x12, 0xff7f0000, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0xffbf0000), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(pack, x6, x26, x11, 0xffbf0000, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xffdf0000), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(pack, x7, x25, x10, 0xffdf0000, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0xffef0000), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(pack, x8, x24, x9, 0xffef0000, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0xfff70000), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(pack, x9, x23, x8, 0xfff70000, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0xfffb0000), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(pack, x10, x22, x7, 0xfffb0000, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0xfffd0000), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(pack, x11, x21, x6, 0xfffd0000, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0xfffe0000), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(pack, x12, x20, x5, 0xfffe0000, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000fffe), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(pack, x13, x19, x4, 0x0000fffe, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000fffd), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(pack, x14, x18, x3, 0x0000fffd, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000fffb), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(pack, x15, x17, x2, 0x0000fffb, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000fff7), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(pack, x16, x16, x1, 0x0000fff7, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000ffef), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(pack, x17, x15, x31, 0x0000ffef, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000ffdf), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(pack, x18, x14, x30, 0x0000ffdf, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000ffbf), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(pack, x19, x13, x29, 0x0000ffbf, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000ff7f), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(pack, x20, x12, x28, 0x0000ff7f, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000feff), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(pack, x21, x11, x27, 0x0000feff, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000fdff), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(pack, x22, x10, x26, 0x0000fdff, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000fbff), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(pack, x23, x9, x25, 0x0000fbff, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000f7ff), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(pack, x24, x8, x24, 0x0000f7ff, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000efff), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(pack, x25, x7, x23, 0x0000efff, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000dfff), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(pack, x26, x6, x22, 0x0000dfff, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000bfff), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(pack, x27, x5, x21, 0x0000bfff, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x00007fff), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(pack, x28, x4, x20, 0x00007fff, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000ffff), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(pack, x29, x3, x19, 0x0000ffff, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x8000ffff), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(pack, x30, x2, x18, 0x8000ffff, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x4000ffff), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(pack, x31, x1, x17, 0x4000ffff, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x2000ffff), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(pack, x1, x31, x16, 0x2000ffff, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x1000ffff), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(pack, x2, x30, x15, 0x1000ffff, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0800ffff), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(pack, x3, x29, x14, 0x0800ffff, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0400ffff), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(pack, x4, x28, x13, 0x0400ffff, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0200ffff), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(pack, x5, x27, x12, 0x0200ffff, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0100ffff), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(pack, x6, x26, x11, 0x0100ffff, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0080ffff), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(pack, x7, x25, x10, 0x0080ffff, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0040ffff), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(pack, x8, x24, x9, 0x0040ffff, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0020ffff), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(pack, x9, x23, x8, 0x0020ffff, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0010ffff), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(pack, x10, x22, x7, 0x0010ffff, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0008ffff), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(pack, x11, x21, x6, 0x0008ffff, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0004ffff), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(pack, x12, x20, x5, 0x0004ffff, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0002ffff), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(pack, x13, x19, x4, 0x0002ffff, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x0001ffff), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(pack, x14, x18, x3, 0x0001ffff, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000001), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(pack, x15, x17, x2, 0x00000001, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000002), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(pack, x16, x16, x1, 0x00000002, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000004), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(pack, x17, x15, x31, 0x00000004, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000008), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(pack, x18, x14, x30, 0x00000008, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000010), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(pack, x19, x13, x29, 0x00000010, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000020), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(pack, x20, x12, x28, 0x00000020, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000040), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(pack, x21, x11, x27, 0x00000040, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000080), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(pack, x22, x10, x26, 0x00000080, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000100), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(pack, x23, x9, x25, 0x00000100, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000200), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(pack, x24, x8, x24, 0x00000200, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000400), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(pack, x25, x7, x23, 0x00000400, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000800), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(pack, x26, x6, x22, 0x00000800, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00001000), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(pack, x27, x5, x21, 0x00001000, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00002000), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(pack, x28, x4, x20, 0x00002000, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00004000), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(pack, x29, x3, x19, 0x00004000, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00008000), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(pack, x30, x2, x18, 0x00008000, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(pack, x31, x1, x17, 0x00000000, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(pack, x1, x31, x16, 0x00000000, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(pack, x2, x30, x15, 0x00000000, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(pack, x3, x29, x14, 0x00000000, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(pack, x4, x28, x13, 0x00000000, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(pack, x5, x27, x12, 0x00000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(pack, x6, x26, x11, 0x00000000, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(pack, x7, x25, x10, 0x00000000, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(pack, x8, x24, x9, 0x00000000, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(pack, x9, x23, x8, 0x00000000, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(pack, x10, x22, x7, 0x00000000, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(pack, x11, x21, x6, 0x00000000, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(pack, x12, x20, x5, 0x00000000, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(pack, x13, x19, x4, 0x00000000, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000000), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(pack, x14, x18, x3, 0x00000000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(pack, x15, x17, x2, 0x00000000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(pack, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x0000fffe), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(pack, x17, x15, x31, 0x0000fffe, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x0000fffd), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(pack, x18, x14, x30, 0x0000fffd, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x0000fffb), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(pack, x19, x13, x29, 0x0000fffb, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x0000fff7), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(pack, x20, x12, x28, 0x0000fff7, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x0000ffef), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(pack, x21, x11, x27, 0x0000ffef, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x0000ffdf), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(pack, x22, x10, x26, 0x0000ffdf, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x0000ffbf), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(pack, x23, x9, x25, 0x0000ffbf, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x0000ff7f), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(pack, x24, x8, x24, 0x0000ff7f, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x0000feff), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(pack, x25, x7, x23, 0x0000feff, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x0000fdff), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(pack, x26, x6, x22, 0x0000fdff, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x0000fbff), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(pack, x27, x5, x21, 0x0000fbff, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x0000f7ff), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(pack, x28, x4, x20, 0x0000f7ff, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x0000efff), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(pack, x29, x3, x19, 0x0000efff, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x0000dfff), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(pack, x30, x2, x18, 0x0000dfff, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x0000bfff), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(pack, x31, x1, x17, 0x0000bfff, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x00007fff), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(pack, x1, x31, x16, 0x00007fff, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x0000ffff), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(pack, x2, x30, x15, 0x0000ffff, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x0000ffff), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(pack, x3, x29, x14, 0x0000ffff, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x0000ffff), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(pack, x4, x28, x13, 0x0000ffff, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x0000ffff), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(pack, x5, x27, x12, 0x0000ffff, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x0000ffff), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(pack, x6, x26, x11, 0x0000ffff, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x0000ffff), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(pack, x7, x25, x10, 0x0000ffff, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x0000ffff), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(pack, x8, x24, x9, 0x0000ffff, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x0000ffff), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(pack, x9, x23, x8, 0x0000ffff, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x0000ffff), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(pack, x10, x22, x7, 0x0000ffff, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x0000ffff), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(pack, x11, x21, x6, 0x0000ffff, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x0000ffff), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(pack, x12, x20, x5, 0x0000ffff, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x0000ffff), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(pack, x13, x19, x4, 0x0000ffff, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x0000ffff), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(pack, x14, x18, x3, 0x0000ffff, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x0000ffff), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(pack, x15, x17, x2, 0x0000ffff, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x0000ffff), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(pack, x16, x16, x1, 0x0000ffff, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000ffff), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(pack, x17, x15, x31, 0x0000ffff, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000ffff), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(pack, x18, x14, x30, 0x0000ffff, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0xcc23cc23), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(pack, x19, x29, x29, 0xcc23cc23, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(pack, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x0000a8bb), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(pack, x21, x11, x0, 0x0000a8bb, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0xfbc30000), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(pack, x22, x0, x26, 0xfbc30000, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/PACKH-01.S b/riscof/suite/rv32i_m/K_unratified/PACKH-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..0d63155fa52b08e8435417cf7256fdda4e51863c
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/PACKH-01.S
@@ -0,0 +1,1024 @@
+// RISC-V Architectural Validation Test PACKH-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'packh'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",packh)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",packh)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",packh)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x00002395), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(packh, x1, x31, x16, 0x00002395, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x00005bc1), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(packh, x2, x30, x15, 0x00005bc1, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x0000c0bb), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(packh, x3, x29, x14, 0x0000c0bb, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x0000c3cb), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(packh, x4, x28, x13, 0x0000c3cb, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x0000af4f), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(packh, x5, x27, x12, 0x0000af4f, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x00004faf), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(packh, x6, x26, x11, 0x00004faf, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x0000cbc3), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(packh, x7, x25, x10, 0x0000cbc3, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x0000bbc0), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(packh, x8, x24, x9, 0x0000bbc0, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x0000c15b), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(packh, x9, x23, x8, 0x0000c15b, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x00009523), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(packh, x10, x22, x7, 0x00009523, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000ff01), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(packh, x11, x21, x6, 0x0000ff01, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000ff02), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(packh, x12, x20, x5, 0x0000ff02, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000ff04), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(packh, x13, x19, x4, 0x0000ff04, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000ff08), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(packh, x14, x18, x3, 0x0000ff08, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000ff10), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(packh, x15, x17, x2, 0x0000ff10, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000ff20), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(packh, x16, x16, x1, 0x0000ff20, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000ff40), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(packh, x17, x15, x31, 0x0000ff40, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000ff80), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(packh, x18, x14, x30, 0x0000ff80, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000ff00), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(packh, x19, x13, x29, 0x0000ff00, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000ff00), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(packh, x20, x12, x28, 0x0000ff00, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000ff00), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(packh, x21, x11, x27, 0x0000ff00, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000ff00), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(packh, x22, x10, x26, 0x0000ff00, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000ff00), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(packh, x23, x9, x25, 0x0000ff00, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000ff00), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(packh, x24, x8, x24, 0x0000ff00, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000ff00), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(packh, x25, x7, x23, 0x0000ff00, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000ff00), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(packh, x26, x6, x22, 0x0000ff00, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000ff00), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(packh, x27, x5, x21, 0x0000ff00, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000ff00), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(packh, x28, x4, x20, 0x0000ff00, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000ff00), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(packh, x29, x3, x19, 0x0000ff00, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000ff00), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(packh, x30, x2, x18, 0x0000ff00, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000ff00), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(packh, x31, x1, x17, 0x0000ff00, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000ff00), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(packh, x1, x31, x16, 0x0000ff00, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000ff00), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(packh, x2, x30, x15, 0x0000ff00, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000ff00), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(packh, x3, x29, x14, 0x0000ff00, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000ff00), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(packh, x4, x28, x13, 0x0000ff00, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x00007f00), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(packh, x5, x27, x12, 0x00007f00, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000bf00), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(packh, x6, x26, x11, 0x0000bf00, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000df00), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(packh, x7, x25, x10, 0x0000df00, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000ef00), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(packh, x8, x24, x9, 0x0000ef00, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000f700), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(packh, x9, x23, x8, 0x0000f700, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000fb00), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(packh, x10, x22, x7, 0x0000fb00, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000fd00), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(packh, x11, x21, x6, 0x0000fd00, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000fe00), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(packh, x12, x20, x5, 0x0000fe00, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x000000fe), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(packh, x13, x19, x4, 0x000000fe, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x000000fd), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(packh, x14, x18, x3, 0x000000fd, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x000000fb), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(packh, x15, x17, x2, 0x000000fb, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x000000f7), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(packh, x16, x16, x1, 0x000000f7, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x000000ef), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(packh, x17, x15, x31, 0x000000ef, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x000000df), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(packh, x18, x14, x30, 0x000000df, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x000000bf), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(packh, x19, x13, x29, 0x000000bf, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000007f), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(packh, x20, x12, x28, 0x0000007f, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x000000ff), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(packh, x21, x11, x27, 0x000000ff, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x000000ff), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(packh, x22, x10, x26, 0x000000ff, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x000000ff), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(packh, x23, x9, x25, 0x000000ff, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x000000ff), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(packh, x24, x8, x24, 0x000000ff, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x000000ff), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(packh, x25, x7, x23, 0x000000ff, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x000000ff), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(packh, x26, x6, x22, 0x000000ff, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x000000ff), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(packh, x27, x5, x21, 0x000000ff, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x000000ff), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(packh, x28, x4, x20, 0x000000ff, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x000000ff), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(packh, x29, x3, x19, 0x000000ff, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x000000ff), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(packh, x30, x2, x18, 0x000000ff, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x000000ff), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(packh, x31, x1, x17, 0x000000ff, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x000000ff), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(packh, x1, x31, x16, 0x000000ff, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x000000ff), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(packh, x2, x30, x15, 0x000000ff, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x000000ff), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(packh, x3, x29, x14, 0x000000ff, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x000000ff), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(packh, x4, x28, x13, 0x000000ff, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x000000ff), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(packh, x5, x27, x12, 0x000000ff, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x000000ff), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(packh, x6, x26, x11, 0x000000ff, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x000080ff), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(packh, x7, x25, x10, 0x000080ff, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x000040ff), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(packh, x8, x24, x9, 0x000040ff, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x000020ff), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(packh, x9, x23, x8, 0x000020ff, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x000010ff), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(packh, x10, x22, x7, 0x000010ff, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x000008ff), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(packh, x11, x21, x6, 0x000008ff, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x000004ff), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(packh, x12, x20, x5, 0x000004ff, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x000002ff), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(packh, x13, x19, x4, 0x000002ff, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x000001ff), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(packh, x14, x18, x3, 0x000001ff, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000001), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(packh, x15, x17, x2, 0x00000001, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000002), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(packh, x16, x16, x1, 0x00000002, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000004), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(packh, x17, x15, x31, 0x00000004, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000008), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(packh, x18, x14, x30, 0x00000008, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000010), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(packh, x19, x13, x29, 0x00000010, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000020), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(packh, x20, x12, x28, 0x00000020, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000040), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(packh, x21, x11, x27, 0x00000040, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000080), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(packh, x22, x10, x26, 0x00000080, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(packh, x23, x9, x25, 0x00000000, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(packh, x24, x8, x24, 0x00000000, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(packh, x25, x7, x23, 0x00000000, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(packh, x26, x6, x22, 0x00000000, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(packh, x27, x5, x21, 0x00000000, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(packh, x28, x4, x20, 0x00000000, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(packh, x29, x3, x19, 0x00000000, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(packh, x30, x2, x18, 0x00000000, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(packh, x31, x1, x17, 0x00000000, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(packh, x1, x31, x16, 0x00000000, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(packh, x2, x30, x15, 0x00000000, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(packh, x3, x29, x14, 0x00000000, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(packh, x4, x28, x13, 0x00000000, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(packh, x5, x27, x12, 0x00000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(packh, x6, x26, x11, 0x00000000, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(packh, x7, x25, x10, 0x00000000, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(packh, x8, x24, x9, 0x00000000, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(packh, x9, x23, x8, 0x00000000, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(packh, x10, x22, x7, 0x00000000, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(packh, x11, x21, x6, 0x00000000, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(packh, x12, x20, x5, 0x00000000, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(packh, x13, x19, x4, 0x00000000, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000000), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(packh, x14, x18, x3, 0x00000000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(packh, x15, x17, x2, 0x00000000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(packh, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x000000fe), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(packh, x17, x15, x31, 0x000000fe, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x000000fd), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(packh, x18, x14, x30, 0x000000fd, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x000000fb), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(packh, x19, x13, x29, 0x000000fb, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x000000f7), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(packh, x20, x12, x28, 0x000000f7, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x000000ef), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(packh, x21, x11, x27, 0x000000ef, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x000000df), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(packh, x22, x10, x26, 0x000000df, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x000000bf), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(packh, x23, x9, x25, 0x000000bf, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x0000007f), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(packh, x24, x8, x24, 0x0000007f, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x000000ff), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(packh, x25, x7, x23, 0x000000ff, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x000000ff), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(packh, x26, x6, x22, 0x000000ff, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x000000ff), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(packh, x27, x5, x21, 0x000000ff, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x000000ff), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(packh, x28, x4, x20, 0x000000ff, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x000000ff), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(packh, x29, x3, x19, 0x000000ff, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x000000ff), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(packh, x30, x2, x18, 0x000000ff, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x000000ff), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(packh, x31, x1, x17, 0x000000ff, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x000000ff), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(packh, x1, x31, x16, 0x000000ff, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x000000ff), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(packh, x2, x30, x15, 0x000000ff, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x000000ff), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(packh, x3, x29, x14, 0x000000ff, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x000000ff), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(packh, x4, x28, x13, 0x000000ff, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x000000ff), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(packh, x5, x27, x12, 0x000000ff, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x000000ff), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(packh, x6, x26, x11, 0x000000ff, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x000000ff), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(packh, x7, x25, x10, 0x000000ff, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x000000ff), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(packh, x8, x24, x9, 0x000000ff, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x000000ff), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(packh, x9, x23, x8, 0x000000ff, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x000000ff), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(packh, x10, x22, x7, 0x000000ff, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x000000ff), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(packh, x11, x21, x6, 0x000000ff, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x000000ff), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(packh, x12, x20, x5, 0x000000ff, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x000000ff), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(packh, x13, x19, x4, 0x000000ff, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x000000ff), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(packh, x14, x18, x3, 0x000000ff, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x000000ff), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(packh, x15, x17, x2, 0x000000ff, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x000000ff), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(packh, x16, x16, x1, 0x000000ff, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x000000ff), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(packh, x17, x15, x31, 0x000000ff, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x000000ff), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(packh, x18, x14, x30, 0x000000ff, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0x00002323), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(packh, x19, x29, x29, 0x00002323, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(packh, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x000000bb), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(packh, x21, x11, x0, 0x000000bb, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x0000c300), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(packh, x22, x0, x26, 0x0000c300, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/PACKU-01.S b/riscof/suite/rv32i_m/K_unratified/PACKU-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..95ee34050f4ed9e9c84c36a292205a46d5873f60
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/PACKU-01.S
@@ -0,0 +1,1024 @@
+// RISC-V Architectural Validation Test PACKU-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'packu'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",packu)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",packu)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",packu)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x121badea), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(packu, x1, x31, x16, 0x121badea, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xa47dd2ff), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(packu, x2, x30, x15, 0xa47dd2ff, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x707aa8e1), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(packu, x3, x29, x14, 0x707aa8e1, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xe19b48c9), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(packu, x4, x28, x13, 0xe19b48c9, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x528a461d), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(packu, x5, x27, x12, 0x528a461d, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x461d528a), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(packu, x6, x26, x11, 0x461d528a, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x48c9e19b), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(packu, x7, x25, x10, 0x48c9e19b, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xa8e1707a), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(packu, x8, x24, x9, 0xa8e1707a, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xd2ffa47d), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(packu, x9, x23, x8, 0xd2ffa47d, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xadea121b), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(packu, x10, x22, x7, 0xadea121b, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0xffff0000), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(packu, x11, x21, x6, 0xffff0000, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x7fff0000), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(packu, x12, x20, x5, 0x7fff0000, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0xbfff0000), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(packu, x13, x19, x4, 0xbfff0000, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0xdfff0000), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(packu, x14, x18, x3, 0xdfff0000, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0xefff0000), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(packu, x15, x17, x2, 0xefff0000, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0xf7ff0000), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(packu, x16, x16, x1, 0xf7ff0000, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0xfbff0000), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(packu, x17, x15, x31, 0xfbff0000, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xfdff0000), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(packu, x18, x14, x30, 0xfdff0000, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0xfeff0000), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(packu, x19, x13, x29, 0xfeff0000, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0xff7f0000), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(packu, x20, x12, x28, 0xff7f0000, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0xffbf0000), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(packu, x21, x11, x27, 0xffbf0000, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0xffdf0000), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(packu, x22, x10, x26, 0xffdf0000, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0xffef0000), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(packu, x23, x9, x25, 0xffef0000, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0xfff70000), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(packu, x24, x8, x24, 0xfff70000, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0xfffb0000), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(packu, x25, x7, x23, 0xfffb0000, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0xfffd0000), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(packu, x26, x6, x22, 0xfffd0000, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0xfffe0001), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(packu, x27, x5, x21, 0xfffe0001, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0xffff0002), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(packu, x28, x4, x20, 0xffff0002, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0xffff0004), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(packu, x29, x3, x19, 0xffff0004, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0xffff0008), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(packu, x30, x2, x18, 0xffff0008, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0xffff0010), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(packu, x31, x1, x17, 0xffff0010, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0xffff0020), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(packu, x1, x31, x16, 0xffff0020, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0xffff0040), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(packu, x2, x30, x15, 0xffff0040, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0xffff0080), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(packu, x3, x29, x14, 0xffff0080, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0xffff0100), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(packu, x4, x28, x13, 0xffff0100, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0xffff0200), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(packu, x5, x27, x12, 0xffff0200, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0xffff0400), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(packu, x6, x26, x11, 0xffff0400, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xffff0800), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(packu, x7, x25, x10, 0xffff0800, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0xffff1000), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(packu, x8, x24, x9, 0xffff1000, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0xffff2000), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(packu, x9, x23, x8, 0xffff2000, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0xffff4000), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(packu, x10, x22, x7, 0xffff4000, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0xffff8000), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(packu, x11, x21, x6, 0xffff8000, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0xffff0000), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(packu, x12, x20, x5, 0xffff0000, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000ffff), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(packu, x13, x19, x4, 0x0000ffff, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x8000ffff), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(packu, x14, x18, x3, 0x8000ffff, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x4000ffff), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(packu, x15, x17, x2, 0x4000ffff, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x2000ffff), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(packu, x16, x16, x1, 0x2000ffff, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x1000ffff), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(packu, x17, x15, x31, 0x1000ffff, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0800ffff), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(packu, x18, x14, x30, 0x0800ffff, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0400ffff), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(packu, x19, x13, x29, 0x0400ffff, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0200ffff), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(packu, x20, x12, x28, 0x0200ffff, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0100ffff), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(packu, x21, x11, x27, 0x0100ffff, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0080ffff), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(packu, x22, x10, x26, 0x0080ffff, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0040ffff), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(packu, x23, x9, x25, 0x0040ffff, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0020ffff), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(packu, x24, x8, x24, 0x0020ffff, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0010ffff), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(packu, x25, x7, x23, 0x0010ffff, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0008ffff), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(packu, x26, x6, x22, 0x0008ffff, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0004ffff), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(packu, x27, x5, x21, 0x0004ffff, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0002ffff), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(packu, x28, x4, x20, 0x0002ffff, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0001fffe), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(packu, x29, x3, x19, 0x0001fffe, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000fffd), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(packu, x30, x2, x18, 0x0000fffd, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000fffb), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(packu, x31, x1, x17, 0x0000fffb, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000fff7), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(packu, x1, x31, x16, 0x0000fff7, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000ffef), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(packu, x2, x30, x15, 0x0000ffef, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000ffdf), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(packu, x3, x29, x14, 0x0000ffdf, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000ffbf), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(packu, x4, x28, x13, 0x0000ffbf, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000ff7f), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(packu, x5, x27, x12, 0x0000ff7f, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000feff), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(packu, x6, x26, x11, 0x0000feff, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000fdff), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(packu, x7, x25, x10, 0x0000fdff, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000fbff), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(packu, x8, x24, x9, 0x0000fbff, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000f7ff), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(packu, x9, x23, x8, 0x0000f7ff, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000efff), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(packu, x10, x22, x7, 0x0000efff, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000dfff), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(packu, x11, x21, x6, 0x0000dfff, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000bfff), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(packu, x12, x20, x5, 0x0000bfff, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x00007fff), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(packu, x13, x19, x4, 0x00007fff, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x0000ffff), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(packu, x14, x18, x3, 0x0000ffff, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(packu, x15, x17, x2, 0x00000000, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(packu, x16, x16, x1, 0x00000000, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000000), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(packu, x17, x15, x31, 0x00000000, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000000), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(packu, x18, x14, x30, 0x00000000, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000000), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(packu, x19, x13, x29, 0x00000000, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000000), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(packu, x20, x12, x28, 0x00000000, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000000), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(packu, x21, x11, x27, 0x00000000, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000000), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(packu, x22, x10, x26, 0x00000000, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(packu, x23, x9, x25, 0x00000000, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(packu, x24, x8, x24, 0x00000000, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(packu, x25, x7, x23, 0x00000000, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(packu, x26, x6, x22, 0x00000000, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(packu, x27, x5, x21, 0x00000000, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(packu, x28, x4, x20, 0x00000000, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(packu, x29, x3, x19, 0x00000000, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(packu, x30, x2, x18, 0x00000000, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000001), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(packu, x31, x1, x17, 0x00000001, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000002), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(packu, x1, x31, x16, 0x00000002, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000004), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(packu, x2, x30, x15, 0x00000004, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000008), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(packu, x3, x29, x14, 0x00000008, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000010), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(packu, x4, x28, x13, 0x00000010, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000020), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(packu, x5, x27, x12, 0x00000020, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000040), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(packu, x6, x26, x11, 0x00000040, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000080), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(packu, x7, x25, x10, 0x00000080, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000100), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(packu, x8, x24, x9, 0x00000100, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000200), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(packu, x9, x23, x8, 0x00000200, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000400), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(packu, x10, x22, x7, 0x00000400, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000800), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(packu, x11, x21, x6, 0x00000800, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00001000), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(packu, x12, x20, x5, 0x00001000, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00002000), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(packu, x13, x19, x4, 0x00002000, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00004000), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(packu, x14, x18, x3, 0x00004000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00008000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(packu, x15, x17, x2, 0x00008000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(packu, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x0000ffff), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(packu, x17, x15, x31, 0x0000ffff, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x0000ffff), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(packu, x18, x14, x30, 0x0000ffff, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x0000ffff), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(packu, x19, x13, x29, 0x0000ffff, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x0000ffff), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(packu, x20, x12, x28, 0x0000ffff, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x0000ffff), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(packu, x21, x11, x27, 0x0000ffff, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x0000ffff), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(packu, x22, x10, x26, 0x0000ffff, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x0000ffff), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(packu, x23, x9, x25, 0x0000ffff, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x0000ffff), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(packu, x24, x8, x24, 0x0000ffff, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x0000ffff), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(packu, x25, x7, x23, 0x0000ffff, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x0000ffff), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(packu, x26, x6, x22, 0x0000ffff, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x0000ffff), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(packu, x27, x5, x21, 0x0000ffff, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x0000ffff), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(packu, x28, x4, x20, 0x0000ffff, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x0000ffff), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(packu, x29, x3, x19, 0x0000ffff, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x0000ffff), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(packu, x30, x2, x18, 0x0000ffff, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x0000ffff), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(packu, x31, x1, x17, 0x0000ffff, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x0000ffff), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(packu, x1, x31, x16, 0x0000ffff, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x0000fffe), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(packu, x2, x30, x15, 0x0000fffe, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x0000fffd), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(packu, x3, x29, x14, 0x0000fffd, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x0000fffb), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(packu, x4, x28, x13, 0x0000fffb, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x0000fff7), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(packu, x5, x27, x12, 0x0000fff7, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x0000ffef), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(packu, x6, x26, x11, 0x0000ffef, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x0000ffdf), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(packu, x7, x25, x10, 0x0000ffdf, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x0000ffbf), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(packu, x8, x24, x9, 0x0000ffbf, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x0000ff7f), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(packu, x9, x23, x8, 0x0000ff7f, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x0000feff), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(packu, x10, x22, x7, 0x0000feff, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x0000fdff), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(packu, x11, x21, x6, 0x0000fdff, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x0000fbff), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(packu, x12, x20, x5, 0x0000fbff, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x0000f7ff), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(packu, x13, x19, x4, 0x0000f7ff, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x0000efff), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(packu, x14, x18, x3, 0x0000efff, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x0000dfff), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(packu, x15, x17, x2, 0x0000dfff, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x0000bfff), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(packu, x16, x16, x1, 0x0000bfff, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x00007fff), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(packu, x17, x15, x31, 0x00007fff, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000ffff), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(packu, x18, x14, x30, 0x0000ffff, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0x121b121b), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(packu, x19, x29, x29, 0x121b121b, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(packu, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x0000a8e1), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(packu, x21, x11, x0, 0x0000a8e1, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0xe19b0000), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(packu, x22, x0, x26, 0xe19b0000, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/REV-B-01.S b/riscof/suite/rv32i_m/K_unratified/REV-B-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..28b8c8eb5fb75f55bec3fd7e4c8e88fce1631758
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/REV-B-01.S
@@ -0,0 +1,1492 @@
+// RISC-V Architectural Validation Test REV-B-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'rev.b'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",rev.b)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",rev.b)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",rev.b)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xb5578aa9), rs1:x31(0xadea5195)
+ li x31, 0xadea5195
+ rev.b x1, x31
+ sw x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0xb5578aa9)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x4bff7d83), rs1:x30(0xd2ffbec1)
+ li x30, 0xd2ffbec1
+ rev.b x2, x30
+ sw x2, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x4bff7d83)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x158715dd), rs1:x29(0xa8e1a8bb)
+ li x29, 0xa8e1a8bb
+ rev.b x3, x29
+ sw x3, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x158715dd)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x1293f9d3), rs1:x28(0x48c99fcb)
+ li x28, 0x48c99fcb
+ rev.b x4, x28
+ sw x4, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x1293f9d3)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x62b84af2), rs1:x27(0x461d524f)
+ li x27, 0x461d524f
+ rev.b x5, x27
+ sw x5, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x62b84af2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x4a5108f5), rs1:x26(0x528a10af)
+ li x26, 0x528a10af
+ rev.b x6, x26
+ sw x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x4a5108f5)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x87d9dfc3), rs1:x25(0xe19bfbc3)
+ li x25, 0xe19bfbc3
+ rev.b x7, x25
+ sw x7, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x87d9dfc3)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x0e5e4f03), rs1:x24(0x707af2c0)
+ li x24, 0x707af2c0
+ rev.b x8, x24
+ sw x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0e5e4f03)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x25be08da), rs1:x23(0xa47d105b)
+ li x23, 0xa47d105b
+ rev.b x9, x23
+ sw x9, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x25be08da)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x48d833c4), rs1:x22(0x121bcc23)
+ li x22, 0x121bcc23
+ rev.b x10, x22
+ sw x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x48d833c4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00000080), rs1:x21(0x00000001)
+ li x21, 0x1
+ rev.b x11, x21
+ sw x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x00000080)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00000040), rs1:x20(0x00000002)
+ li x20, 0x2
+ rev.b x12, x20
+ sw x12, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x00000040)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00000020), rs1:x19(0x00000004)
+ li x19, 0x4
+ rev.b x13, x19
+ sw x13, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x00000020)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00000010), rs1:x18(0x00000008)
+ li x18, 0x8
+ rev.b x14, x18
+ sw x14, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x00000010)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00000008), rs1:x17(0x00000010)
+ li x17, 0x10
+ rev.b x15, x17
+ sw x15, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x00000008)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x00000004), rs1:x16(0x00000020)
+ li x16, 0x20
+ rev.b x16, x16
+ sw x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x00000004)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x00000002), rs1:x15(0x00000040)
+ li x15, 0x40
+ rev.b x17, x15
+ sw x17, 4(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x00000002)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00000001), rs1:x14(0x00000080)
+ li x14, 0x80
+ rev.b x18, x14
+ sw x18, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x00000001)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00008000), rs1:x13(0x00000100)
+ li x13, 0x100
+ rev.b x19, x13
+ sw x19, 12(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x00008000)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00004000), rs1:x12(0x00000200)
+ li x12, 0x200
+ rev.b x20, x12
+ sw x20, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x00004000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00002000), rs1:x11(0x00000400)
+ li x11, 0x400
+ rev.b x21, x11
+ sw x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00002000)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00001000), rs1:x10(0x00000800)
+ li x10, 0x800
+ rev.b x22, x10
+ sw x22, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00001000)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00000800), rs1:x9(0x00001000)
+ li x9, 0x1000
+ rev.b x23, x9
+ sw x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000800)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00000400), rs1:x8(0x00002000)
+ li x8, 0x2000
+ rev.b x24, x8
+ sw x24, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000400)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00000200), rs1:x7(0x00004000)
+ li x7, 0x4000
+ rev.b x25, x7
+ sw x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000200)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00000100), rs1:x6(0x00008000)
+ li x6, 0x8000
+ rev.b x26, x6
+ sw x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x00000100)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00800000), rs1:x5(0x00010000)
+ li x5, 0x10000
+ rev.b x27, x5
+ sw x27, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x00800000)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00400000), rs1:x4(0x00020000)
+ li x4, 0x20000
+ rev.b x28, x4
+ sw x28, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x00400000)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00200000), rs1:x3(0x00040000)
+ li x3, 0x40000
+ rev.b x29, x3
+ sw x29, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x00200000)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00100000), rs1:x2(0x00080000)
+ li x2, 0x80000
+ rev.b x30, x2
+ sw x30, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x00100000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00080000), rs1:x1(0x00100000)
+ li x1, 0x100000
+ rev.b x31, x1
+ sw x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x00080000)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00040000), rs1:x31(0x00200000)
+ li x31, 0x200000
+ rev.b x1, x31
+ sw x1, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x00040000)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00020000), rs1:x30(0x00400000)
+ li x30, 0x400000
+ rev.b x2, x30
+ sw x2, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x00020000)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00010000), rs1:x29(0x00800000)
+ li x29, 0x800000
+ rev.b x3, x29
+ sw x3, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x00010000)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x80000000), rs1:x28(0x01000000)
+ li x28, 0x1000000
+ rev.b x4, x28
+ sw x4, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x80000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x40000000), rs1:x27(0x02000000)
+ li x27, 0x2000000
+ rev.b x5, x27
+ sw x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x40000000)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x20000000), rs1:x26(0x04000000)
+ li x26, 0x4000000
+ rev.b x6, x26
+ sw x6, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x20000000)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x10000000), rs1:x25(0x08000000)
+ li x25, 0x8000000
+ rev.b x7, x25
+ sw x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x10000000)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x08000000), rs1:x24(0x10000000)
+ li x24, 0x10000000
+ rev.b x8, x24
+ sw x8, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x08000000)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x04000000), rs1:x23(0x20000000)
+ li x23, 0x20000000
+ rev.b x9, x23
+ sw x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x04000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x02000000), rs1:x22(0x40000000)
+ li x22, 0x40000000
+ rev.b x10, x22
+ sw x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x02000000)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x01000000), rs1:x21(0x80000000)
+ li x21, 0x80000000
+ rev.b x11, x21
+ sw x11, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x01000000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000)
+ li x20, 0x0
+ rev.b x12, x20
+ sw x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xffffff7f), rs1:x19(0xfffffffe)
+ li x19, 0xfffffffe
+ rev.b x13, x19
+ sw x13, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xffffff7f)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xffffffbf), rs1:x18(0xfffffffd)
+ li x18, 0xfffffffd
+ rev.b x14, x18
+ sw x14, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0xffffffbf)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xffffffdf), rs1:x17(0xfffffffb)
+ li x17, 0xfffffffb
+ rev.b x15, x17
+ sw x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0xffffffdf)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xffffffef), rs1:x16(0xfffffff7)
+ li x16, 0xfffffff7
+ rev.b x16, x16
+ sw x16, 4(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0xffffffef)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xfffffff7), rs1:x15(0xffffffef)
+ li x15, 0xffffffef
+ rev.b x17, x15
+ sw x17, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0xfffffff7)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xfffffffb), rs1:x14(0xffffffdf)
+ li x14, 0xffffffdf
+ rev.b x18, x14
+ sw x18, 12(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0xfffffffb)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xfffffffd), rs1:x13(0xffffffbf)
+ li x13, 0xffffffbf
+ rev.b x19, x13
+ sw x19, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0xfffffffd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xfffffffe), rs1:x12(0xffffff7f)
+ li x12, 0xffffff7f
+ rev.b x20, x12
+ sw x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfffffffe)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xffff7fff), rs1:x11(0xfffffeff)
+ li x11, 0xfffffeff
+ rev.b x21, x11
+ sw x21, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xffff7fff)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xffffbfff), rs1:x10(0xfffffdff)
+ li x10, 0xfffffdff
+ rev.b x22, x10
+ sw x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffbfff)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xffffdfff), rs1:x9(0xfffffbff)
+ li x9, 0xfffffbff
+ rev.b x23, x9
+ sw x23, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffffdfff)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xffffefff), rs1:x8(0xfffff7ff)
+ li x8, 0xfffff7ff
+ rev.b x24, x8
+ sw x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xffffefff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xfffff7ff), rs1:x7(0xffffefff)
+ li x7, 0xffffefff
+ rev.b x25, x7
+ sw x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xfffff7ff)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xfffffbff), rs1:x6(0xffffdfff)
+ li x6, 0xffffdfff
+ rev.b x26, x6
+ sw x26, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfffffbff)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xfffffdff), rs1:x5(0xffffbfff)
+ li x5, 0xffffbfff
+ rev.b x27, x5
+ sw x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xfffffdff)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xfffffeff), rs1:x4(0xffff7fff)
+ li x4, 0xffff7fff
+ rev.b x28, x4
+ sw x28, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xfffffeff)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xff7fffff), rs1:x3(0xfffeffff)
+ li x3, 0xfffeffff
+ rev.b x29, x3
+ sw x29, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xff7fffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xffbfffff), rs1:x2(0xfffdffff)
+ li x2, 0xfffdffff
+ rev.b x30, x2
+ sw x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xffbfffff)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xffdfffff), rs1:x1(0xfffbffff)
+ li x1, 0xfffbffff
+ rev.b x31, x1
+ sw x31, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xffdfffff)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xffefffff), rs1:x31(0xfff7ffff)
+ li x31, 0xfff7ffff
+ rev.b x1, x31
+ sw x1, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xffefffff)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xfff7ffff), rs1:x30(0xffefffff)
+ li x30, 0xffefffff
+ rev.b x2, x30
+ sw x2, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xfff7ffff)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xfffbffff), rs1:x29(0xffdfffff)
+ li x29, 0xffdfffff
+ rev.b x3, x29
+ sw x3, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xfffbffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xfffdffff), rs1:x28(0xffbfffff)
+ li x28, 0xffbfffff
+ rev.b x4, x28
+ sw x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xfffdffff)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xfffeffff), rs1:x27(0xff7fffff)
+ li x27, 0xff7fffff
+ rev.b x5, x27
+ sw x5, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xfffeffff)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x7fffffff), rs1:x26(0xfeffffff)
+ li x26, 0xfeffffff
+ rev.b x6, x26
+ sw x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x7fffffff)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xbfffffff), rs1:x25(0xfdffffff)
+ li x25, 0xfdffffff
+ rev.b x7, x25
+ sw x7, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xbfffffff)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xdfffffff), rs1:x24(0xfbffffff)
+ li x24, 0xfbffffff
+ rev.b x8, x24
+ sw x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xdfffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xefffffff), rs1:x23(0xf7ffffff)
+ li x23, 0xf7ffffff
+ rev.b x9, x23
+ sw x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xefffffff)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xf7ffffff), rs1:x22(0xefffffff)
+ li x22, 0xefffffff
+ rev.b x10, x22
+ sw x10, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xf7ffffff)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xfbffffff), rs1:x21(0xdfffffff)
+ li x21, 0xdfffffff
+ rev.b x11, x21
+ sw x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfbffffff)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xfdffffff), rs1:x20(0xbfffffff)
+ li x20, 0xbfffffff
+ rev.b x12, x20
+ sw x12, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xfdffffff)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xfeffffff), rs1:x19(0x7fffffff)
+ li x19, 0x7fffffff
+ rev.b x13, x19
+ sw x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xfeffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff)
+ li x18, 0xffffffff
+ rev.b x14, x18
+ sw x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xffffffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000080), rs1:x17(0x00000001)
+ li x17, 0x1
+ rev.b x15, x17
+ sw x15, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00000080)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000040), rs1:x16(0x00000002)
+ li x16, 0x2
+ rev.b x16, x16
+ sw x16, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00000040)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000020), rs1:x15(0x00000004)
+ li x15, 0x4
+ rev.b x17, x15
+ sw x17, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00000020)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000010), rs1:x14(0x00000008)
+ li x14, 0x8
+ rev.b x18, x14
+ sw x18, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00000010)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000008), rs1:x13(0x00000010)
+ li x13, 0x10
+ rev.b x19, x13
+ sw x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000008)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000004), rs1:x12(0x00000020)
+ li x12, 0x20
+ rev.b x20, x12
+ sw x20, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000004)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000002), rs1:x11(0x00000040)
+ li x11, 0x40
+ rev.b x21, x11
+ sw x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000002)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000001), rs1:x10(0x00000080)
+ li x10, 0x80
+ rev.b x22, x10
+ sw x22, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000001)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00008000), rs1:x9(0x00000100)
+ li x9, 0x100
+ rev.b x23, x9
+ sw x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00008000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00004000), rs1:x8(0x00000200)
+ li x8, 0x200
+ rev.b x24, x8
+ sw x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00004000)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00002000), rs1:x7(0x00000400)
+ li x7, 0x400
+ rev.b x25, x7
+ sw x25, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00002000)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00001000), rs1:x6(0x00000800)
+ li x6, 0x800
+ rev.b x26, x6
+ sw x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00001000)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000800), rs1:x5(0x00001000)
+ li x5, 0x1000
+ rev.b x27, x5
+ sw x27, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000800)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000400), rs1:x4(0x00002000)
+ li x4, 0x2000
+ rev.b x28, x4
+ sw x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000400)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000200), rs1:x3(0x00004000)
+ li x3, 0x4000
+ rev.b x29, x3
+ sw x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00000200)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000100), rs1:x2(0x00008000)
+ li x2, 0x8000
+ rev.b x30, x2
+ sw x30, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00000100)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00800000), rs1:x1(0x00010000)
+ li x1, 0x10000
+ rev.b x31, x1
+ sw x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00800000)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00400000), rs1:x31(0x00020000)
+ li x31, 0x20000
+ rev.b x1, x31
+ sw x1, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00400000)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00200000), rs1:x30(0x00040000)
+ li x30, 0x40000
+ rev.b x2, x30
+ sw x2, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00200000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00100000), rs1:x29(0x00080000)
+ li x29, 0x80000
+ rev.b x3, x29
+ sw x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00100000)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00080000), rs1:x28(0x00100000)
+ li x28, 0x100000
+ rev.b x4, x28
+ sw x4, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00080000)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00040000), rs1:x27(0x00200000)
+ li x27, 0x200000
+ rev.b x5, x27
+ sw x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00040000)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00020000), rs1:x26(0x00400000)
+ li x26, 0x400000
+ rev.b x6, x26
+ sw x6, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00020000)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00010000), rs1:x25(0x00800000)
+ li x25, 0x800000
+ rev.b x7, x25
+ sw x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00010000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x80000000), rs1:x24(0x01000000)
+ li x24, 0x1000000
+ rev.b x8, x24
+ sw x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x80000000)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x40000000), rs1:x23(0x02000000)
+ li x23, 0x2000000
+ rev.b x9, x23
+ sw x9, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x40000000)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x20000000), rs1:x22(0x04000000)
+ li x22, 0x4000000
+ rev.b x10, x22
+ sw x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x20000000)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x10000000), rs1:x21(0x08000000)
+ li x21, 0x8000000
+ rev.b x11, x21
+ sw x11, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x10000000)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x08000000), rs1:x20(0x10000000)
+ li x20, 0x10000000
+ rev.b x12, x20
+ sw x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x08000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x04000000), rs1:x19(0x20000000)
+ li x19, 0x20000000
+ rev.b x13, x19
+ sw x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x04000000)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x02000000), rs1:x18(0x40000000)
+ li x18, 0x40000000
+ rev.b x14, x18
+ sw x14, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x02000000)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x01000000), rs1:x17(0x80000000)
+ li x17, 0x80000000
+ rev.b x15, x17
+ sw x15, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x01000000)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000)
+ li x16, 0x0
+ rev.b x16, x16
+ sw x16, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xffffff7f), rs1:x15(0xfffffffe)
+ li x15, 0xfffffffe
+ rev.b x17, x15
+ sw x17, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xffffff7f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xffffffbf), rs1:x14(0xfffffffd)
+ li x14, 0xfffffffd
+ rev.b x18, x14
+ sw x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xffffffbf)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffdf), rs1:x13(0xfffffffb)
+ li x13, 0xfffffffb
+ rev.b x19, x13
+ sw x19, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xffffffdf)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffef), rs1:x12(0xfffffff7)
+ li x12, 0xfffffff7
+ rev.b x20, x12
+ sw x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffffffef)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xfffffff7), rs1:x11(0xffffffef)
+ li x11, 0xffffffef
+ rev.b x21, x11
+ sw x21, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfffffff7)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xfffffffb), rs1:x10(0xffffffdf)
+ li x10, 0xffffffdf
+ rev.b x22, x10
+ sw x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfffffffb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xfffffffd), rs1:x9(0xffffffbf)
+ li x9, 0xffffffbf
+ rev.b x23, x9
+ sw x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfffffffd)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xfffffffe), rs1:x8(0xffffff7f)
+ li x8, 0xffffff7f
+ rev.b x24, x8
+ sw x24, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfffffffe)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffff7fff), rs1:x7(0xfffffeff)
+ li x7, 0xfffffeff
+ rev.b x25, x7
+ sw x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xffff7fff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffbfff), rs1:x6(0xfffffdff)
+ li x6, 0xfffffdff
+ rev.b x26, x6
+ sw x26, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffffbfff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffdfff), rs1:x5(0xfffffbff)
+ li x5, 0xfffffbff
+ rev.b x27, x5
+ sw x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffffdfff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffefff), rs1:x4(0xfffff7ff)
+ li x4, 0xfffff7ff
+ rev.b x28, x4
+ sw x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0xffffefff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xfffff7ff), rs1:x3(0xffffefff)
+ li x3, 0xffffefff
+ rev.b x29, x3
+ sw x29, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0xfffff7ff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xfffffbff), rs1:x2(0xffffdfff)
+ li x2, 0xffffdfff
+ rev.b x30, x2
+ sw x30, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0xfffffbff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xfffffdff), rs1:x1(0xffffbfff)
+ li x1, 0xffffbfff
+ rev.b x31, x1
+ sw x31, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xfffffdff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xfffffeff), rs1:x31(0xffff7fff)
+ li x31, 0xffff7fff
+ rev.b x1, x31
+ sw x1, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xfffffeff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xff7fffff), rs1:x30(0xfffeffff)
+ li x30, 0xfffeffff
+ rev.b x2, x30
+ sw x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xff7fffff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffbfffff), rs1:x29(0xfffdffff)
+ li x29, 0xfffdffff
+ rev.b x3, x29
+ sw x3, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xffbfffff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffdfffff), rs1:x28(0xfffbffff)
+ li x28, 0xfffbffff
+ rev.b x4, x28
+ sw x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xffdfffff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffefffff), rs1:x27(0xfff7ffff)
+ li x27, 0xfff7ffff
+ rev.b x5, x27
+ sw x5, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xffefffff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xfff7ffff), rs1:x26(0xffefffff)
+ li x26, 0xffefffff
+ rev.b x6, x26
+ sw x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0xfff7ffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xfffbffff), rs1:x25(0xffdfffff)
+ li x25, 0xffdfffff
+ rev.b x7, x25
+ sw x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffbffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xfffdffff), rs1:x24(0xffbfffff)
+ li x24, 0xffbfffff
+ rev.b x8, x24
+ sw x8, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffdffff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xfffeffff), rs1:x23(0xff7fffff)
+ li x23, 0xff7fffff
+ rev.b x9, x23
+ sw x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfffeffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x7fffffff), rs1:x22(0xfeffffff)
+ li x22, 0xfeffffff
+ rev.b x10, x22
+ sw x10, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x7fffffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xbfffffff), rs1:x21(0xfdffffff)
+ li x21, 0xfdffffff
+ rev.b x11, x21
+ sw x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xbfffffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xdfffffff), rs1:x20(0xfbffffff)
+ li x20, 0xfbffffff
+ rev.b x12, x20
+ sw x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xdfffffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xefffffff), rs1:x19(0xf7ffffff)
+ li x19, 0xf7ffffff
+ rev.b x13, x19
+ sw x13, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xefffffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xf7ffffff), rs1:x18(0xefffffff)
+ li x18, 0xefffffff
+ rev.b x14, x18
+ sw x14, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xf7ffffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xfbffffff), rs1:x17(0xdfffffff)
+ li x17, 0xdfffffff
+ rev.b x15, x17
+ sw x15, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xfbffffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xfdffffff), rs1:x16(0xbfffffff)
+ li x16, 0xbfffffff
+ rev.b x16, x16
+ sw x16, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xfdffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xfeffffff), rs1:x15(0x7fffffff)
+ li x15, 0x7fffffff
+ rev.b x17, x15
+ sw x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0xfeffffff)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff)
+ li x14, 0xffffffff
+ rev.b x18, x14
+ sw x18, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xffffffff)
+
+ inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0xb5578aa9), rs1:x13(0xadea5195)
+ li x13, 0xadea5195
+ rev.b x19, x13
+ sw x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xb5578aa9)
+
+ inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1)
+ li x12, 0xd2ffbec1
+ rev.b x0, x12
+ sw x0, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
+
+ inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x158715dd), rs1:x11(0xa8e1a8bb)
+ li x11, 0xa8e1a8bb
+ rev.b x21, x11
+ sw x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x158715dd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb)
+ li x0, 0x48c99fcb
+ rev.b x22, x0
+ sw x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/REV8-01.S b/riscof/suite/rv32i_m/K_unratified/REV8-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..1d85b80b1bfa88727ead328aca63807415808207
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/REV8-01.S
@@ -0,0 +1,1492 @@
+// RISC-V Architectural Validation Test REV8-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'rev8'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",rev8)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",rev8)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",rev8)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x9551eaad), rs1:x31(0xadea5195)
+ li x31, 0xadea5195
+ rev8 x1, x31
+ sw x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x9551eaad)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xc1beffd2), rs1:x30(0xd2ffbec1)
+ li x30, 0xd2ffbec1
+ rev8 x2, x30
+ sw x2, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xc1beffd2)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xbba8e1a8), rs1:x29(0xa8e1a8bb)
+ li x29, 0xa8e1a8bb
+ rev8 x3, x29
+ sw x3, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xbba8e1a8)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xcb9fc948), rs1:x28(0x48c99fcb)
+ li x28, 0x48c99fcb
+ rev8 x4, x28
+ sw x4, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xcb9fc948)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x4f521d46), rs1:x27(0x461d524f)
+ li x27, 0x461d524f
+ rev8 x5, x27
+ sw x5, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x4f521d46)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xaf108a52), rs1:x26(0x528a10af)
+ li x26, 0x528a10af
+ rev8 x6, x26
+ sw x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xaf108a52)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xc3fb9be1), rs1:x25(0xe19bfbc3)
+ li x25, 0xe19bfbc3
+ rev8 x7, x25
+ sw x7, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xc3fb9be1)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xc0f27a70), rs1:x24(0x707af2c0)
+ li x24, 0x707af2c0
+ rev8 x8, x24
+ sw x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xc0f27a70)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x5b107da4), rs1:x23(0xa47d105b)
+ li x23, 0xa47d105b
+ rev8 x9, x23
+ sw x9, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x5b107da4)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x23cc1b12), rs1:x22(0x121bcc23)
+ li x22, 0x121bcc23
+ rev8 x10, x22
+ sw x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x23cc1b12)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x01000000), rs1:x21(0x00000001)
+ li x21, 0x1
+ rev8 x11, x21
+ sw x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x01000000)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x02000000), rs1:x20(0x00000002)
+ li x20, 0x2
+ rev8 x12, x20
+ sw x12, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x02000000)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x04000000), rs1:x19(0x00000004)
+ li x19, 0x4
+ rev8 x13, x19
+ sw x13, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x04000000)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x08000000), rs1:x18(0x00000008)
+ li x18, 0x8
+ rev8 x14, x18
+ sw x14, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x08000000)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x10000000), rs1:x17(0x00000010)
+ li x17, 0x10
+ rev8 x15, x17
+ sw x15, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x10000000)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x20000000), rs1:x16(0x00000020)
+ li x16, 0x20
+ rev8 x16, x16
+ sw x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x20000000)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x40000000), rs1:x15(0x00000040)
+ li x15, 0x40
+ rev8 x17, x15
+ sw x17, 4(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x40000000)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x80000000), rs1:x14(0x00000080)
+ li x14, 0x80
+ rev8 x18, x14
+ sw x18, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x80000000)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00010000), rs1:x13(0x00000100)
+ li x13, 0x100
+ rev8 x19, x13
+ sw x19, 12(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x00010000)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00020000), rs1:x12(0x00000200)
+ li x12, 0x200
+ rev8 x20, x12
+ sw x20, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x00020000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00040000), rs1:x11(0x00000400)
+ li x11, 0x400
+ rev8 x21, x11
+ sw x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00040000)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00080000), rs1:x10(0x00000800)
+ li x10, 0x800
+ rev8 x22, x10
+ sw x22, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00080000)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00100000), rs1:x9(0x00001000)
+ li x9, 0x1000
+ rev8 x23, x9
+ sw x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00100000)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00200000), rs1:x8(0x00002000)
+ li x8, 0x2000
+ rev8 x24, x8
+ sw x24, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00200000)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00400000), rs1:x7(0x00004000)
+ li x7, 0x4000
+ rev8 x25, x7
+ sw x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00400000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00800000), rs1:x6(0x00008000)
+ li x6, 0x8000
+ rev8 x26, x6
+ sw x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x00800000)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00000100), rs1:x5(0x00010000)
+ li x5, 0x10000
+ rev8 x27, x5
+ sw x27, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x00000100)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00000200), rs1:x4(0x00020000)
+ li x4, 0x20000
+ rev8 x28, x4
+ sw x28, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x00000200)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00000400), rs1:x3(0x00040000)
+ li x3, 0x40000
+ rev8 x29, x3
+ sw x29, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x00000400)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00000800), rs1:x2(0x00080000)
+ li x2, 0x80000
+ rev8 x30, x2
+ sw x30, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x00000800)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00001000), rs1:x1(0x00100000)
+ li x1, 0x100000
+ rev8 x31, x1
+ sw x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x00001000)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00002000), rs1:x31(0x00200000)
+ li x31, 0x200000
+ rev8 x1, x31
+ sw x1, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x00002000)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00004000), rs1:x30(0x00400000)
+ li x30, 0x400000
+ rev8 x2, x30
+ sw x2, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x00004000)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00008000), rs1:x29(0x00800000)
+ li x29, 0x800000
+ rev8 x3, x29
+ sw x3, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x00008000)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x00000001), rs1:x28(0x01000000)
+ li x28, 0x1000000
+ rev8 x4, x28
+ sw x4, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x00000001)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x00000002), rs1:x27(0x02000000)
+ li x27, 0x2000000
+ rev8 x5, x27
+ sw x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000002)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x00000004), rs1:x26(0x04000000)
+ li x26, 0x4000000
+ rev8 x6, x26
+ sw x6, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000004)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x00000008), rs1:x25(0x08000000)
+ li x25, 0x8000000
+ rev8 x7, x25
+ sw x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000008)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x00000010), rs1:x24(0x10000000)
+ li x24, 0x10000000
+ rev8 x8, x24
+ sw x8, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000010)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x00000020), rs1:x23(0x20000000)
+ li x23, 0x20000000
+ rev8 x9, x23
+ sw x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000020)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x00000040), rs1:x22(0x40000000)
+ li x22, 0x40000000
+ rev8 x10, x22
+ sw x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000040)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x00000080), rs1:x21(0x80000000)
+ li x21, 0x80000000
+ rev8 x11, x21
+ sw x11, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000080)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000)
+ li x20, 0x0
+ rev8 x12, x20
+ sw x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xfeffffff), rs1:x19(0xfffffffe)
+ li x19, 0xfffffffe
+ rev8 x13, x19
+ sw x13, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xfeffffff)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xfdffffff), rs1:x18(0xfffffffd)
+ li x18, 0xfffffffd
+ rev8 x14, x18
+ sw x14, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0xfdffffff)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xfbffffff), rs1:x17(0xfffffffb)
+ li x17, 0xfffffffb
+ rev8 x15, x17
+ sw x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0xfbffffff)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xf7ffffff), rs1:x16(0xfffffff7)
+ li x16, 0xfffffff7
+ rev8 x16, x16
+ sw x16, 4(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0xf7ffffff)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xefffffff), rs1:x15(0xffffffef)
+ li x15, 0xffffffef
+ rev8 x17, x15
+ sw x17, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0xefffffff)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xdfffffff), rs1:x14(0xffffffdf)
+ li x14, 0xffffffdf
+ rev8 x18, x14
+ sw x18, 12(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0xdfffffff)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xbfffffff), rs1:x13(0xffffffbf)
+ li x13, 0xffffffbf
+ rev8 x19, x13
+ sw x19, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0xbfffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x7fffffff), rs1:x12(0xffffff7f)
+ li x12, 0xffffff7f
+ rev8 x20, x12
+ sw x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x7fffffff)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xfffeffff), rs1:x11(0xfffffeff)
+ li x11, 0xfffffeff
+ rev8 x21, x11
+ sw x21, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfffeffff)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xfffdffff), rs1:x10(0xfffffdff)
+ li x10, 0xfffffdff
+ rev8 x22, x10
+ sw x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfffdffff)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xfffbffff), rs1:x9(0xfffffbff)
+ li x9, 0xfffffbff
+ rev8 x23, x9
+ sw x23, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfffbffff)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xfff7ffff), rs1:x8(0xfffff7ff)
+ li x8, 0xfffff7ff
+ rev8 x24, x8
+ sw x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfff7ffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xffefffff), rs1:x7(0xffffefff)
+ li x7, 0xffffefff
+ rev8 x25, x7
+ sw x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xffefffff)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xffdfffff), rs1:x6(0xffffdfff)
+ li x6, 0xffffdfff
+ rev8 x26, x6
+ sw x26, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffdfffff)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xffbfffff), rs1:x5(0xffffbfff)
+ li x5, 0xffffbfff
+ rev8 x27, x5
+ sw x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffbfffff)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xff7fffff), rs1:x4(0xffff7fff)
+ li x4, 0xffff7fff
+ rev8 x28, x4
+ sw x28, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xff7fffff)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xfffffeff), rs1:x3(0xfffeffff)
+ li x3, 0xfffeffff
+ rev8 x29, x3
+ sw x29, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xfffffeff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xfffffdff), rs1:x2(0xfffdffff)
+ li x2, 0xfffdffff
+ rev8 x30, x2
+ sw x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfffffdff)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xfffffbff), rs1:x1(0xfffbffff)
+ li x1, 0xfffbffff
+ rev8 x31, x1
+ sw x31, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xfffffbff)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xfffff7ff), rs1:x31(0xfff7ffff)
+ li x31, 0xfff7ffff
+ rev8 x1, x31
+ sw x1, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xfffff7ff)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xffffefff), rs1:x30(0xffefffff)
+ li x30, 0xffefffff
+ rev8 x2, x30
+ sw x2, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xffffefff)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xffffdfff), rs1:x29(0xffdfffff)
+ li x29, 0xffdfffff
+ rev8 x3, x29
+ sw x3, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xffffdfff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xffffbfff), rs1:x28(0xffbfffff)
+ li x28, 0xffbfffff
+ rev8 x4, x28
+ sw x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xffffbfff)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xffff7fff), rs1:x27(0xff7fffff)
+ li x27, 0xff7fffff
+ rev8 x5, x27
+ sw x5, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xffff7fff)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xfffffffe), rs1:x26(0xfeffffff)
+ li x26, 0xfeffffff
+ rev8 x6, x26
+ sw x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xfffffffe)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfffffffd), rs1:x25(0xfdffffff)
+ li x25, 0xfdffffff
+ rev8 x7, x25
+ sw x7, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffffffd)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xfffffffb), rs1:x24(0xfbffffff)
+ li x24, 0xfbffffff
+ rev8 x8, x24
+ sw x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffffffb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xfffffff7), rs1:x23(0xf7ffffff)
+ li x23, 0xf7ffffff
+ rev8 x9, x23
+ sw x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfffffff7)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xffffffef), rs1:x22(0xefffffff)
+ li x22, 0xefffffff
+ rev8 x10, x22
+ sw x10, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffffef)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xffffffdf), rs1:x21(0xdfffffff)
+ li x21, 0xdfffffff
+ rev8 x11, x21
+ sw x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xffffffdf)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xffffffbf), rs1:x20(0xbfffffff)
+ li x20, 0xbfffffff
+ rev8 x12, x20
+ sw x12, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xffffffbf)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xffffff7f), rs1:x19(0x7fffffff)
+ li x19, 0x7fffffff
+ rev8 x13, x19
+ sw x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xffffff7f)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff)
+ li x18, 0xffffffff
+ rev8 x14, x18
+ sw x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xffffffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x01000000), rs1:x17(0x00000001)
+ li x17, 0x1
+ rev8 x15, x17
+ sw x15, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x01000000)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x02000000), rs1:x16(0x00000002)
+ li x16, 0x2
+ rev8 x16, x16
+ sw x16, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x02000000)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x04000000), rs1:x15(0x00000004)
+ li x15, 0x4
+ rev8 x17, x15
+ sw x17, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x04000000)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x08000000), rs1:x14(0x00000008)
+ li x14, 0x8
+ rev8 x18, x14
+ sw x18, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x08000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x10000000), rs1:x13(0x00000010)
+ li x13, 0x10
+ rev8 x19, x13
+ sw x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x10000000)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x20000000), rs1:x12(0x00000020)
+ li x12, 0x20
+ rev8 x20, x12
+ sw x20, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x20000000)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x40000000), rs1:x11(0x00000040)
+ li x11, 0x40
+ rev8 x21, x11
+ sw x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x40000000)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x80000000), rs1:x10(0x00000080)
+ li x10, 0x80
+ rev8 x22, x10
+ sw x22, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x80000000)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00010000), rs1:x9(0x00000100)
+ li x9, 0x100
+ rev8 x23, x9
+ sw x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00010000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00020000), rs1:x8(0x00000200)
+ li x8, 0x200
+ rev8 x24, x8
+ sw x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00020000)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00040000), rs1:x7(0x00000400)
+ li x7, 0x400
+ rev8 x25, x7
+ sw x25, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00040000)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00080000), rs1:x6(0x00000800)
+ li x6, 0x800
+ rev8 x26, x6
+ sw x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00080000)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00100000), rs1:x5(0x00001000)
+ li x5, 0x1000
+ rev8 x27, x5
+ sw x27, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00100000)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00200000), rs1:x4(0x00002000)
+ li x4, 0x2000
+ rev8 x28, x4
+ sw x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00200000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00400000), rs1:x3(0x00004000)
+ li x3, 0x4000
+ rev8 x29, x3
+ sw x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00400000)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00800000), rs1:x2(0x00008000)
+ li x2, 0x8000
+ rev8 x30, x2
+ sw x30, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00800000)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000100), rs1:x1(0x00010000)
+ li x1, 0x10000
+ rev8 x31, x1
+ sw x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000100)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000200), rs1:x31(0x00020000)
+ li x31, 0x20000
+ rev8 x1, x31
+ sw x1, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000200)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000400), rs1:x30(0x00040000)
+ li x30, 0x40000
+ rev8 x2, x30
+ sw x2, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000400)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000800), rs1:x29(0x00080000)
+ li x29, 0x80000
+ rev8 x3, x29
+ sw x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000800)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00001000), rs1:x28(0x00100000)
+ li x28, 0x100000
+ rev8 x4, x28
+ sw x4, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00001000)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00002000), rs1:x27(0x00200000)
+ li x27, 0x200000
+ rev8 x5, x27
+ sw x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00002000)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00004000), rs1:x26(0x00400000)
+ li x26, 0x400000
+ rev8 x6, x26
+ sw x6, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00004000)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00008000), rs1:x25(0x00800000)
+ li x25, 0x800000
+ rev8 x7, x25
+ sw x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00008000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000001), rs1:x24(0x01000000)
+ li x24, 0x1000000
+ rev8 x8, x24
+ sw x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000001)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000002), rs1:x23(0x02000000)
+ li x23, 0x2000000
+ rev8 x9, x23
+ sw x9, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000002)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000004), rs1:x22(0x04000000)
+ li x22, 0x4000000
+ rev8 x10, x22
+ sw x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000004)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000008), rs1:x21(0x08000000)
+ li x21, 0x8000000
+ rev8 x11, x21
+ sw x11, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000008)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000010), rs1:x20(0x10000000)
+ li x20, 0x10000000
+ rev8 x12, x20
+ sw x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000010)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000020), rs1:x19(0x20000000)
+ li x19, 0x20000000
+ rev8 x13, x19
+ sw x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00000020)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000040), rs1:x18(0x40000000)
+ li x18, 0x40000000
+ rev8 x14, x18
+ sw x14, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x00000040)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000080), rs1:x17(0x80000000)
+ li x17, 0x80000000
+ rev8 x15, x17
+ sw x15, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x00000080)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000)
+ li x16, 0x0
+ rev8 x16, x16
+ sw x16, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfeffffff), rs1:x15(0xfffffffe)
+ li x15, 0xfffffffe
+ rev8 x17, x15
+ sw x17, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xfeffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfdffffff), rs1:x14(0xfffffffd)
+ li x14, 0xfffffffd
+ rev8 x18, x14
+ sw x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xfdffffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfbffffff), rs1:x13(0xfffffffb)
+ li x13, 0xfffffffb
+ rev8 x19, x13
+ sw x19, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xfbffffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xf7ffffff), rs1:x12(0xfffffff7)
+ li x12, 0xfffffff7
+ rev8 x20, x12
+ sw x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xf7ffffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xefffffff), rs1:x11(0xffffffef)
+ li x11, 0xffffffef
+ rev8 x21, x11
+ sw x21, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xefffffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xdfffffff), rs1:x10(0xffffffdf)
+ li x10, 0xffffffdf
+ rev8 x22, x10
+ sw x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xdfffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xbfffffff), rs1:x9(0xffffffbf)
+ li x9, 0xffffffbf
+ rev8 x23, x9
+ sw x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xbfffffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x7fffffff), rs1:x8(0xffffff7f)
+ li x8, 0xffffff7f
+ rev8 x24, x8
+ sw x24, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x7fffffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfffeffff), rs1:x7(0xfffffeff)
+ li x7, 0xfffffeff
+ rev8 x25, x7
+ sw x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xfffeffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfffdffff), rs1:x6(0xfffffdff)
+ li x6, 0xfffffdff
+ rev8 x26, x6
+ sw x26, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfffdffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xfffbffff), rs1:x5(0xfffffbff)
+ li x5, 0xfffffbff
+ rev8 x27, x5
+ sw x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xfffbffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfff7ffff), rs1:x4(0xfffff7ff)
+ li x4, 0xfffff7ff
+ rev8 x28, x4
+ sw x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0xfff7ffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffefffff), rs1:x3(0xffffefff)
+ li x3, 0xffffefff
+ rev8 x29, x3
+ sw x29, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0xffefffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffdfffff), rs1:x2(0xffffdfff)
+ li x2, 0xffffdfff
+ rev8 x30, x2
+ sw x30, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0xffdfffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffbfffff), rs1:x1(0xffffbfff)
+ li x1, 0xffffbfff
+ rev8 x31, x1
+ sw x31, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xffbfffff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xff7fffff), rs1:x31(0xffff7fff)
+ li x31, 0xffff7fff
+ rev8 x1, x31
+ sw x1, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xff7fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffffeff), rs1:x30(0xfffeffff)
+ li x30, 0xfffeffff
+ rev8 x2, x30
+ sw x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xfffffeff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfffffdff), rs1:x29(0xfffdffff)
+ li x29, 0xfffdffff
+ rev8 x3, x29
+ sw x3, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xfffffdff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfffffbff), rs1:x28(0xfffbffff)
+ li x28, 0xfffbffff
+ rev8 x4, x28
+ sw x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xfffffbff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfffff7ff), rs1:x27(0xfff7ffff)
+ li x27, 0xfff7ffff
+ rev8 x5, x27
+ sw x5, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xfffff7ff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffffefff), rs1:x26(0xffefffff)
+ li x26, 0xffefffff
+ rev8 x6, x26
+ sw x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0xffffefff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffffdfff), rs1:x25(0xffdfffff)
+ li x25, 0xffdfffff
+ rev8 x7, x25
+ sw x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffffdfff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffffbfff), rs1:x24(0xffbfffff)
+ li x24, 0xffbfffff
+ rev8 x8, x24
+ sw x8, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffffbfff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffff7fff), rs1:x23(0xff7fffff)
+ li x23, 0xff7fffff
+ rev8 x9, x23
+ sw x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xffff7fff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfffffffe), rs1:x22(0xfeffffff)
+ li x22, 0xfeffffff
+ rev8 x10, x22
+ sw x10, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfffffffe)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xfffffffd), rs1:x21(0xfdffffff)
+ li x21, 0xfdffffff
+ rev8 x11, x21
+ sw x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfffffffd)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xfffffffb), rs1:x20(0xfbffffff)
+ li x20, 0xfbffffff
+ rev8 x12, x20
+ sw x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xfffffffb)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xfffffff7), rs1:x19(0xf7ffffff)
+ li x19, 0xf7ffffff
+ rev8 x13, x19
+ sw x13, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xfffffff7)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffffef), rs1:x18(0xefffffff)
+ li x18, 0xefffffff
+ rev8 x14, x18
+ sw x14, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xffffffef)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xffffffdf), rs1:x17(0xdfffffff)
+ li x17, 0xdfffffff
+ rev8 x15, x17
+ sw x15, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xffffffdf)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffbf), rs1:x16(0xbfffffff)
+ li x16, 0xbfffffff
+ rev8 x16, x16
+ sw x16, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xffffffbf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xffffff7f), rs1:x15(0x7fffffff)
+ li x15, 0x7fffffff
+ rev8 x17, x15
+ sw x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0xffffff7f)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff)
+ li x14, 0xffffffff
+ rev8 x18, x14
+ sw x18, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xffffffff)
+
+ inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0x9551eaad), rs1:x13(0xadea5195)
+ li x13, 0xadea5195
+ rev8 x19, x13
+ sw x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x9551eaad)
+
+ inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1)
+ li x12, 0xd2ffbec1
+ rev8 x0, x12
+ sw x0, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
+
+ inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xbba8e1a8), rs1:x11(0xa8e1a8bb)
+ li x11, 0xa8e1a8bb
+ rev8 x21, x11
+ sw x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xbba8e1a8)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb)
+ li x0, 0x48c99fcb
+ rev8 x22, x0
+ sw x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/ROL-01.S b/riscof/suite/rv32i_m/K_unratified/ROL-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..26354fcd39cad9da858aeddabbcaea493ece3273
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/ROL-01.S
@@ -0,0 +1,1024 @@
+// RISC-V Architectural Validation Test ROL-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'rol'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",rol)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",rol)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",rol)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x6f528cad), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(rol, x1, x31, x16, 0x6f528cad, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x0e97fdf6), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(rol, x2, x30, x15, 0x0e97fdf6, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xa8e1a8bb), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(rol, x3, x29, x14, 0xa8e1a8bb, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x464cfe5a), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(rol, x4, x28, x13, 0x464cfe5a, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xa927a30e), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(rol, x5, x27, x12, 0xa927a30e, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x0857a945), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(rol, x6, x26, x11, 0x0857a945, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xdfde1f0c), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(rol, x7, x25, x10, 0xdfde1f0c, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x0383d796), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(rol, x8, x24, x9, 0x0383d796, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x48fa20b7), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(rol, x9, x23, x8, 0x48fa20b7, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x84624379), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(rol, x10, x22, x7, 0x84624379, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x80000000), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(rol, x11, x21, x6, 0x80000000, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00000001), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(rol, x12, x20, x5, 0x00000001, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00000002), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(rol, x13, x19, x4, 0x00000002, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00000004), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(rol, x14, x18, x3, 0x00000004, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00000008), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(rol, x15, x17, x2, 0x00000008, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x00000010), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(rol, x16, x16, x1, 0x00000010, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x00000020), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(rol, x17, x15, x31, 0x00000020, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00000040), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(rol, x18, x14, x30, 0x00000040, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00000080), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(rol, x19, x13, x29, 0x00000080, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00000100), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(rol, x20, x12, x28, 0x00000100, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00000200), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(rol, x21, x11, x27, 0x00000200, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00000400), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(rol, x22, x10, x26, 0x00000400, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00000800), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(rol, x23, x9, x25, 0x00000800, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00001000), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(rol, x24, x8, x24, 0x00001000, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00002000), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(rol, x25, x7, x23, 0x00002000, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00004000), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(rol, x26, x6, x22, 0x00004000, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00008000), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(rol, x27, x5, x21, 0x00008000, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00010000), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(rol, x28, x4, x20, 0x00010000, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00020000), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(rol, x29, x3, x19, 0x00020000, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00040000), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(rol, x30, x2, x18, 0x00040000, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00080000), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(rol, x31, x1, x17, 0x00080000, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00100000), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(rol, x1, x31, x16, 0x00100000, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00200000), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(rol, x2, x30, x15, 0x00200000, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00400000), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(rol, x3, x29, x14, 0x00400000, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x00800000), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(rol, x4, x28, x13, 0x00800000, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x01000000), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(rol, x5, x27, x12, 0x01000000, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x02000000), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(rol, x6, x26, x11, 0x02000000, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x04000000), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(rol, x7, x25, x10, 0x04000000, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x00000800), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(rol, x8, x24, x9, 0x00000800, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x00100000), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(rol, x9, x23, x8, 0x00100000, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x02000000), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(rol, x10, x22, x7, 0x02000000, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x10000000), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(rol, x11, x21, x6, 0x10000000, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(rol, x12, x20, x5, 0x00000000, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xfffffffe), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(rol, x13, x19, x4, 0xfffffffe, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xfffffffd), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(rol, x14, x18, x3, 0xfffffffd, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xfffffffb), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(rol, x15, x17, x2, 0xfffffffb, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xfffffff7), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(rol, x16, x16, x1, 0xfffffff7, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xffffffef), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(rol, x17, x15, x31, 0xffffffef, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xffffffdf), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(rol, x18, x14, x30, 0xffffffdf, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xffffffbf), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(rol, x19, x13, x29, 0xffffffbf, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xffffff7f), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(rol, x20, x12, x28, 0xffffff7f, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xfffffeff), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(rol, x21, x11, x27, 0xfffffeff, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xfffffdff), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(rol, x22, x10, x26, 0xfffffdff, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xfffffbff), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(rol, x23, x9, x25, 0xfffffbff, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xfffff7ff), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(rol, x24, x8, x24, 0xfffff7ff, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xffffefff), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(rol, x25, x7, x23, 0xffffefff, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xffffdfff), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(rol, x26, x6, x22, 0xffffdfff, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xffffbfff), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(rol, x27, x5, x21, 0xffffbfff, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xffff7fff), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(rol, x28, x4, x20, 0xffff7fff, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xfffeffff), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(rol, x29, x3, x19, 0xfffeffff, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xfffdffff), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(rol, x30, x2, x18, 0xfffdffff, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xfffbffff), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(rol, x31, x1, x17, 0xfffbffff, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xfff7ffff), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(rol, x1, x31, x16, 0xfff7ffff, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xffefffff), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(rol, x2, x30, x15, 0xffefffff, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xffdfffff), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(rol, x3, x29, x14, 0xffdfffff, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xffbfffff), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(rol, x4, x28, x13, 0xffbfffff, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xff7fffff), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(rol, x5, x27, x12, 0xff7fffff, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xfeffffff), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(rol, x6, x26, x11, 0xfeffffff, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfdffffff), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(rol, x7, x25, x10, 0xfdffffff, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xfbffffff), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(rol, x8, x24, x9, 0xfbffffff, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xf7ffffff), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(rol, x9, x23, x8, 0xf7ffffff, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xffffefff), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(rol, x10, x22, x7, 0xffffefff, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xffffffdf), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(rol, x11, x21, x6, 0xffffffdf, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xfffffffb), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(rol, x12, x20, x5, 0xfffffffb, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xfffffffd), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(rol, x13, x19, x4, 0xfffffffd, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(rol, x14, x18, x3, 0xffffffff, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000001), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(rol, x15, x17, x2, 0x00000001, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000002), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(rol, x16, x16, x1, 0x00000002, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000004), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(rol, x17, x15, x31, 0x00000004, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000008), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(rol, x18, x14, x30, 0x00000008, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000010), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(rol, x19, x13, x29, 0x00000010, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000020), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(rol, x20, x12, x28, 0x00000020, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000040), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(rol, x21, x11, x27, 0x00000040, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000080), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(rol, x22, x10, x26, 0x00000080, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000100), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(rol, x23, x9, x25, 0x00000100, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000200), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(rol, x24, x8, x24, 0x00000200, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000400), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(rol, x25, x7, x23, 0x00000400, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000800), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(rol, x26, x6, x22, 0x00000800, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00001000), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(rol, x27, x5, x21, 0x00001000, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00002000), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(rol, x28, x4, x20, 0x00002000, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00004000), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(rol, x29, x3, x19, 0x00004000, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00008000), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(rol, x30, x2, x18, 0x00008000, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00010000), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(rol, x31, x1, x17, 0x00010000, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00020000), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(rol, x1, x31, x16, 0x00020000, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00040000), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(rol, x2, x30, x15, 0x00040000, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00080000), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(rol, x3, x29, x14, 0x00080000, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00100000), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(rol, x4, x28, x13, 0x00100000, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00200000), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(rol, x5, x27, x12, 0x00200000, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00400000), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(rol, x6, x26, x11, 0x00400000, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00800000), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(rol, x7, x25, x10, 0x00800000, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x01000000), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(rol, x8, x24, x9, 0x01000000, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x02000000), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(rol, x9, x23, x8, 0x02000000, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x04000000), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(rol, x10, x22, x7, 0x04000000, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x08000000), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(rol, x11, x21, x6, 0x08000000, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x10000000), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(rol, x12, x20, x5, 0x10000000, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x20000000), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(rol, x13, x19, x4, 0x20000000, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x40000000), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(rol, x14, x18, x3, 0x40000000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x80000000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(rol, x15, x17, x2, 0x80000000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(rol, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfffffffe), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(rol, x17, x15, x31, 0xfffffffe, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfffffffd), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(rol, x18, x14, x30, 0xfffffffd, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfffffffb), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(rol, x19, x13, x29, 0xfffffffb, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xfffffff7), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(rol, x20, x12, x28, 0xfffffff7, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffef), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(rol, x21, x11, x27, 0xffffffef, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffdf), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(rol, x22, x10, x26, 0xffffffdf, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffbf), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(rol, x23, x9, x25, 0xffffffbf, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffff7f), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(rol, x24, x8, x24, 0xffffff7f, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfffffeff), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(rol, x25, x7, x23, 0xfffffeff, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfffffdff), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(rol, x26, x6, x22, 0xfffffdff, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xfffffbff), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(rol, x27, x5, x21, 0xfffffbff, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfffff7ff), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(rol, x28, x4, x20, 0xfffff7ff, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffefff), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(rol, x29, x3, x19, 0xffffefff, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffdfff), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(rol, x30, x2, x18, 0xffffdfff, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffbfff), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(rol, x31, x1, x17, 0xffffbfff, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffff7fff), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(rol, x1, x31, x16, 0xffff7fff, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffeffff), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(rol, x2, x30, x15, 0xfffeffff, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfffdffff), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(rol, x3, x29, x14, 0xfffdffff, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfffbffff), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(rol, x4, x28, x13, 0xfffbffff, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfff7ffff), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(rol, x5, x27, x12, 0xfff7ffff, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffefffff), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(rol, x6, x26, x11, 0xffefffff, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffdfffff), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(rol, x7, x25, x10, 0xffdfffff, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffbfffff), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(rol, x8, x24, x9, 0xffbfffff, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xff7fffff), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(rol, x9, x23, x8, 0xff7fffff, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfeffffff), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(rol, x10, x22, x7, 0xfeffffff, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xfdffffff), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(rol, x11, x21, x6, 0xfdffffff, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xfbffffff), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(rol, x12, x20, x5, 0xfbffffff, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xf7ffffff), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(rol, x13, x19, x4, 0xf7ffffff, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xefffffff), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(rol, x14, x18, x3, 0xefffffff, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xdfffffff), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(rol, x15, x17, x2, 0xdfffffff, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xbfffffff), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(rol, x16, x16, x1, 0xbfffffff, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x7fffffff), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(rol, x17, x15, x31, 0x7fffffff, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(rol, x18, x14, x30, 0xffffffff, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0x90de6118), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(rol, x19, x29, x29, 0x90de6118, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(rol, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xa8e1a8bb), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(rol, x21, x11, x0, 0xa8e1a8bb, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(rol, x22, x0, x26, 0x00000000, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/ROR-01.S b/riscof/suite/rv32i_m/K_unratified/ROR-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..d87db9aecec2e1ecf3e47f6f64c4911186c6897c
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/ROR-01.S
@@ -0,0 +1,1024 @@
+// RISC-V Architectural Validation Test ROR-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'ror'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",ror)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",ror)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",ror)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xb5bd4a32), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(ror, x1, x31, x16, 0xb5bd4a32, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x5ff7d83a), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(ror, x2, x30, x15, 0x5ff7d83a, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xa8e1a8bb), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(ror, x3, x29, x14, 0xa8e1a8bb, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x691933f9), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(ror, x4, x28, x13, 0x691933f9, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xa49e8c3a), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(ror, x5, x27, x12, 0xa49e8c3a, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x215ea514), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(ror, x6, x26, x11, 0x215ea514, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x787c337f), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(ror, x7, x25, x10, 0x787c337f, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x0f5e580e), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(ror, x8, x24, x9, 0x0f5e580e, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xd23e882d), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(ror, x9, x23, x8, 0xd23e882d, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xde611890), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(ror, x10, x22, x7, 0xde611890, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00000002), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(ror, x11, x21, x6, 0x00000002, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00000004), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(ror, x12, x20, x5, 0x00000004, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00000008), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(ror, x13, x19, x4, 0x00000008, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00000010), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(ror, x14, x18, x3, 0x00000010, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00000020), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(ror, x15, x17, x2, 0x00000020, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x00000040), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(ror, x16, x16, x1, 0x00000040, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x00000080), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(ror, x17, x15, x31, 0x00000080, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00000100), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(ror, x18, x14, x30, 0x00000100, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00000200), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(ror, x19, x13, x29, 0x00000200, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00000400), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(ror, x20, x12, x28, 0x00000400, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00000800), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(ror, x21, x11, x27, 0x00000800, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00001000), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(ror, x22, x10, x26, 0x00001000, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00002000), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(ror, x23, x9, x25, 0x00002000, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00004000), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(ror, x24, x8, x24, 0x00004000, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00008000), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(ror, x25, x7, x23, 0x00008000, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00010000), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(ror, x26, x6, x22, 0x00010000, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00020000), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(ror, x27, x5, x21, 0x00020000, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00040000), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(ror, x28, x4, x20, 0x00040000, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00080000), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(ror, x29, x3, x19, 0x00080000, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00100000), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(ror, x30, x2, x18, 0x00100000, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00200000), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(ror, x31, x1, x17, 0x00200000, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00400000), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(ror, x1, x31, x16, 0x00400000, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00800000), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(ror, x2, x30, x15, 0x00800000, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x01000000), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(ror, x3, x29, x14, 0x01000000, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x02000000), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(ror, x4, x28, x13, 0x02000000, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x04000000), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(ror, x5, x27, x12, 0x04000000, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x08000000), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(ror, x6, x26, x11, 0x08000000, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x10000000), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(ror, x7, x25, x10, 0x10000000, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x00002000), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(ror, x8, x24, x9, 0x00002000, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x00000040), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(ror, x9, x23, x8, 0x00000040, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x00000008), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(ror, x10, x22, x7, 0x00000008, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x00000004), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(ror, x11, x21, x6, 0x00000004, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(ror, x12, x20, x5, 0x00000000, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xfffffffe), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(ror, x13, x19, x4, 0xfffffffe, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xfffffffd), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(ror, x14, x18, x3, 0xfffffffd, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xfffffffb), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(ror, x15, x17, x2, 0xfffffffb, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xfffffff7), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(ror, x16, x16, x1, 0xfffffff7, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xffffffef), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(ror, x17, x15, x31, 0xffffffef, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xffffffdf), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(ror, x18, x14, x30, 0xffffffdf, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xffffffbf), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(ror, x19, x13, x29, 0xffffffbf, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xffffff7f), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(ror, x20, x12, x28, 0xffffff7f, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xfffffeff), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(ror, x21, x11, x27, 0xfffffeff, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xfffffdff), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(ror, x22, x10, x26, 0xfffffdff, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xfffffbff), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(ror, x23, x9, x25, 0xfffffbff, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xfffff7ff), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(ror, x24, x8, x24, 0xfffff7ff, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xffffefff), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(ror, x25, x7, x23, 0xffffefff, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xffffdfff), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(ror, x26, x6, x22, 0xffffdfff, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xffffbfff), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(ror, x27, x5, x21, 0xffffbfff, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xffff7fff), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(ror, x28, x4, x20, 0xffff7fff, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xfffeffff), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(ror, x29, x3, x19, 0xfffeffff, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xfffdffff), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(ror, x30, x2, x18, 0xfffdffff, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xfffbffff), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(ror, x31, x1, x17, 0xfffbffff, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xfff7ffff), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(ror, x1, x31, x16, 0xfff7ffff, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xffefffff), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(ror, x2, x30, x15, 0xffefffff, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xffdfffff), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(ror, x3, x29, x14, 0xffdfffff, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xffbfffff), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(ror, x4, x28, x13, 0xffbfffff, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xff7fffff), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(ror, x5, x27, x12, 0xff7fffff, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xfeffffff), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(ror, x6, x26, x11, 0xfeffffff, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfdffffff), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(ror, x7, x25, x10, 0xfdffffff, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xfbffffff), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(ror, x8, x24, x9, 0xfbffffff, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xf7ffffff), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(ror, x9, x23, x8, 0xf7ffffff, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xffffefff), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(ror, x10, x22, x7, 0xffffefff, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xffdfffff), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(ror, x11, x21, x6, 0xffdfffff, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xfbffffff), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(ror, x12, x20, x5, 0xfbffffff, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xdfffffff), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(ror, x13, x19, x4, 0xdfffffff, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(ror, x14, x18, x3, 0xffffffff, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000001), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(ror, x15, x17, x2, 0x00000001, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000002), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(ror, x16, x16, x1, 0x00000002, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000004), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(ror, x17, x15, x31, 0x00000004, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000008), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(ror, x18, x14, x30, 0x00000008, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000010), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(ror, x19, x13, x29, 0x00000010, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000020), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(ror, x20, x12, x28, 0x00000020, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000040), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(ror, x21, x11, x27, 0x00000040, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000080), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(ror, x22, x10, x26, 0x00000080, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000100), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(ror, x23, x9, x25, 0x00000100, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000200), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(ror, x24, x8, x24, 0x00000200, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000400), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(ror, x25, x7, x23, 0x00000400, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000800), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(ror, x26, x6, x22, 0x00000800, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00001000), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(ror, x27, x5, x21, 0x00001000, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00002000), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(ror, x28, x4, x20, 0x00002000, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00004000), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(ror, x29, x3, x19, 0x00004000, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00008000), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(ror, x30, x2, x18, 0x00008000, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00010000), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(ror, x31, x1, x17, 0x00010000, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00020000), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(ror, x1, x31, x16, 0x00020000, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00040000), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(ror, x2, x30, x15, 0x00040000, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00080000), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(ror, x3, x29, x14, 0x00080000, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00100000), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(ror, x4, x28, x13, 0x00100000, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00200000), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(ror, x5, x27, x12, 0x00200000, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00400000), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(ror, x6, x26, x11, 0x00400000, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00800000), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(ror, x7, x25, x10, 0x00800000, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x01000000), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(ror, x8, x24, x9, 0x01000000, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x02000000), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(ror, x9, x23, x8, 0x02000000, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x04000000), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(ror, x10, x22, x7, 0x04000000, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x08000000), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(ror, x11, x21, x6, 0x08000000, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x10000000), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(ror, x12, x20, x5, 0x10000000, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x20000000), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(ror, x13, x19, x4, 0x20000000, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x40000000), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(ror, x14, x18, x3, 0x40000000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x80000000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(ror, x15, x17, x2, 0x80000000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(ror, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfffffffe), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(ror, x17, x15, x31, 0xfffffffe, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfffffffd), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(ror, x18, x14, x30, 0xfffffffd, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfffffffb), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(ror, x19, x13, x29, 0xfffffffb, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xfffffff7), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(ror, x20, x12, x28, 0xfffffff7, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffef), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(ror, x21, x11, x27, 0xffffffef, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffdf), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(ror, x22, x10, x26, 0xffffffdf, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffbf), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(ror, x23, x9, x25, 0xffffffbf, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffff7f), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(ror, x24, x8, x24, 0xffffff7f, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfffffeff), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(ror, x25, x7, x23, 0xfffffeff, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfffffdff), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(ror, x26, x6, x22, 0xfffffdff, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xfffffbff), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(ror, x27, x5, x21, 0xfffffbff, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfffff7ff), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(ror, x28, x4, x20, 0xfffff7ff, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffefff), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(ror, x29, x3, x19, 0xffffefff, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffdfff), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(ror, x30, x2, x18, 0xffffdfff, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffbfff), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(ror, x31, x1, x17, 0xffffbfff, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffff7fff), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(ror, x1, x31, x16, 0xffff7fff, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffeffff), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(ror, x2, x30, x15, 0xfffeffff, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfffdffff), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(ror, x3, x29, x14, 0xfffdffff, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfffbffff), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(ror, x4, x28, x13, 0xfffbffff, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfff7ffff), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(ror, x5, x27, x12, 0xfff7ffff, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffefffff), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(ror, x6, x26, x11, 0xffefffff, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffdfffff), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(ror, x7, x25, x10, 0xffdfffff, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffbfffff), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(ror, x8, x24, x9, 0xffbfffff, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xff7fffff), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(ror, x9, x23, x8, 0xff7fffff, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfeffffff), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(ror, x10, x22, x7, 0xfeffffff, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xfdffffff), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(ror, x11, x21, x6, 0xfdffffff, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xfbffffff), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(ror, x12, x20, x5, 0xfbffffff, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xf7ffffff), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(ror, x13, x19, x4, 0xf7ffffff, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xefffffff), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(ror, x14, x18, x3, 0xefffffff, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xdfffffff), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(ror, x15, x17, x2, 0xdfffffff, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xbfffffff), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(ror, x16, x16, x1, 0xbfffffff, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x7fffffff), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(ror, x17, x15, x31, 0x7fffffff, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(ror, x18, x14, x30, 0xffffffff, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0x62437984), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(ror, x19, x29, x29, 0x62437984, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(ror, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xa8e1a8bb), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(ror, x21, x11, x0, 0xa8e1a8bb, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(ror, x22, x0, x26, 0x00000000, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/RORI-01.S b/riscof/suite/rv32i_m/K_unratified/RORI-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..fd24db10760a12ecfa548912d83f5fd2eea5de95
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/RORI-01.S
@@ -0,0 +1,1024 @@
+// RISC-V Architectural Validation Test RORI-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'rori'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",rori)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",rori)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",rori)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xb5bd4a32), rs1:x31(0xadea5195), imm:0x3
+ TEST_IMM_OP(rori, x1, x31, 0xb5bd4a32, 0xadea5195, 0x3, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x5ff7d83a), rs1:x30(0xd2ffbec1), imm:0x1b
+ TEST_IMM_OP(rori, x2, x30, 0x5ff7d83a, 0xd2ffbec1, 0x1b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xa8e1a8bb), rs1:x29(0xa8e1a8bb), imm:0x0
+ TEST_IMM_OP(rori, x3, x29, 0xa8e1a8bb, 0xa8e1a8bb, 0x0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x691933f9), rs1:x28(0x48c99fcb), imm:0x3
+ TEST_IMM_OP(rori, x4, x28, 0x691933f9, 0x48c99fcb, 0x3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xa49e8c3a), rs1:x27(0x461d524f), imm:0xf
+ TEST_IMM_OP(rori, x5, x27, 0xa49e8c3a, 0x461d524f, 0xf, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x215ea514), rs1:x26(0x528a10af), imm:0xf
+ TEST_IMM_OP(rori, x6, x26, 0x215ea514, 0x528a10af, 0xf, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x787c337f), rs1:x25(0xe19bfbc3), imm:0xb
+ TEST_IMM_OP(rori, x7, x25, 0x787c337f, 0xe19bfbc3, 0xb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x0f5e580e), rs1:x24(0x707af2c0), imm:0x1b
+ TEST_IMM_OP(rori, x8, x24, 0x0f5e580e, 0x707af2c0, 0x1b, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xd23e882d), rs1:x23(0xa47d105b), imm:0x1
+ TEST_IMM_OP(rori, x9, x23, 0xd23e882d, 0xa47d105b, 0x1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xde611890), rs1:x22(0x121bcc23), imm:0x15
+ TEST_IMM_OP(rori, x10, x22, 0xde611890, 0x121bcc23, 0x15, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00000002), rs1:x21(0x00000001), imm:0x1f
+ TEST_IMM_OP(rori, x11, x21, 0x00000002, 0x1, 0x1f, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00040000), rs1:x20(0x00000002), imm:0xf
+ TEST_IMM_OP(rori, x12, x20, 0x00040000, 0x2, 0xf, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00000800), rs1:x19(0x00000004), imm:0x17
+ TEST_IMM_OP(rori, x13, x19, 0x00000800, 0x4, 0x17, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00000100), rs1:x18(0x00000008), imm:0x1b
+ TEST_IMM_OP(rori, x14, x18, 0x00000100, 0x8, 0x1b, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00000080), rs1:x17(0x00000010), imm:0x1d
+ TEST_IMM_OP(rori, x15, x17, 0x00000080, 0x10, 0x1d, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x00000080), rs1:x16(0x00000020), imm:0x1e
+ TEST_IMM_OP(rori, x16, x16, 0x00000080, 0x20, 0x1e, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x00000040), rs1:x15(0x00000040), imm:0x0
+ TEST_IMM_OP(rori, x17, x15, 0x00000040, 0x40, 0x0, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00800000), rs1:x14(0x00000080), imm:0x10
+ TEST_IMM_OP(rori, x18, x14, 0x00800000, 0x80, 0x10, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00000001), rs1:x13(0x00000100), imm:0x8
+ TEST_IMM_OP(rori, x19, x13, 0x00000001, 0x100, 0x8, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00000020), rs1:x12(0x00000200), imm:0x4
+ TEST_IMM_OP(rori, x20, x12, 0x00000020, 0x200, 0x4, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00000100), rs1:x11(0x00000400), imm:0x2
+ TEST_IMM_OP(rori, x21, x11, 0x00000100, 0x400, 0x2, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00000400), rs1:x10(0x00000800), imm:0x1
+ TEST_IMM_OP(rori, x22, x10, 0x00000400, 0x800, 0x1, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00000200), rs1:x9(0x00001000), imm:0x3
+ TEST_IMM_OP(rori, x23, x9, 0x00000200, 0x1000, 0x3, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00040000), rs1:x8(0x00002000), imm:0x1b
+ TEST_IMM_OP(rori, x24, x8, 0x00040000, 0x2000, 0x1b, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00004000), rs1:x7(0x00004000), imm:0x0
+ TEST_IMM_OP(rori, x25, x7, 0x00004000, 0x4000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00001000), rs1:x6(0x00008000), imm:0x3
+ TEST_IMM_OP(rori, x26, x6, 0x00001000, 0x8000, 0x3, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00000002), rs1:x5(0x00010000), imm:0xf
+ TEST_IMM_OP(rori, x27, x5, 0x00000002, 0x10000, 0xf, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00000004), rs1:x4(0x00020000), imm:0xf
+ TEST_IMM_OP(rori, x28, x4, 0x00000004, 0x20000, 0xf, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00000080), rs1:x3(0x00040000), imm:0xb
+ TEST_IMM_OP(rori, x29, x3, 0x00000080, 0x40000, 0xb, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x01000000), rs1:x2(0x00080000), imm:0x1b
+ TEST_IMM_OP(rori, x30, x2, 0x01000000, 0x80000, 0x1b, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00080000), rs1:x1(0x00100000), imm:0x1
+ TEST_IMM_OP(rori, x31, x1, 0x00080000, 0x100000, 0x1, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00000001), rs1:x31(0x00200000), imm:0x15
+ TEST_IMM_OP(rori, x1, x31, 0x00000001, 0x200000, 0x15, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00800000), rs1:x30(0x00400000), imm:0x1f
+ TEST_IMM_OP(rori, x2, x30, 0x00800000, 0x400000, 0x1f, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00000100), rs1:x29(0x00800000), imm:0xf
+ TEST_IMM_OP(rori, x3, x29, 0x00000100, 0x800000, 0xf, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x00000002), rs1:x28(0x01000000), imm:0x17
+ TEST_IMM_OP(rori, x4, x28, 0x00000002, 0x1000000, 0x17, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x40000000), rs1:x27(0x02000000), imm:0x1b
+ TEST_IMM_OP(rori, x5, x27, 0x40000000, 0x2000000, 0x1b, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x20000000), rs1:x26(0x04000000), imm:0x1d
+ TEST_IMM_OP(rori, x6, x26, 0x20000000, 0x4000000, 0x1d, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x20000000), rs1:x25(0x08000000), imm:0x1e
+ TEST_IMM_OP(rori, x7, x25, 0x20000000, 0x8000000, 0x1e, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x10000000), rs1:x24(0x10000000), imm:0x0
+ TEST_IMM_OP(rori, x8, x24, 0x10000000, 0x10000000, 0x0, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x00002000), rs1:x23(0x20000000), imm:0x10
+ TEST_IMM_OP(rori, x9, x23, 0x00002000, 0x20000000, 0x10, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x00400000), rs1:x22(0x40000000), imm:0x8
+ TEST_IMM_OP(rori, x10, x22, 0x00400000, 0x40000000, 0x8, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x08000000), rs1:x21(0x80000000), imm:0x4
+ TEST_IMM_OP(rori, x11, x21, 0x08000000, 0x80000000, 0x4, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000), imm:0x2
+ TEST_IMM_OP(rori, x12, x20, 0x00000000, 0x0, 0x2, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x7fffffff), rs1:x19(0xfffffffe), imm:0x1
+ TEST_IMM_OP(rori, x13, x19, 0x7fffffff, 0xfffffffe, 0x1, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xbfffffff), rs1:x18(0xfffffffd), imm:0x3
+ TEST_IMM_OP(rori, x14, x18, 0xbfffffff, 0xfffffffd, 0x3, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xffffff7f), rs1:x17(0xfffffffb), imm:0x1b
+ TEST_IMM_OP(rori, x15, x17, 0xffffff7f, 0xfffffffb, 0x1b, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xfffffff7), rs1:x16(0xfffffff7), imm:0x0
+ TEST_IMM_OP(rori, x16, x16, 0xfffffff7, 0xfffffff7, 0x0, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xfffffffd), rs1:x15(0xffffffef), imm:0x3
+ TEST_IMM_OP(rori, x17, x15, 0xfffffffd, 0xffffffef, 0x3, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xffbfffff), rs1:x14(0xffffffdf), imm:0xf
+ TEST_IMM_OP(rori, x18, x14, 0xffbfffff, 0xffffffdf, 0xf, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xff7fffff), rs1:x13(0xffffffbf), imm:0xf
+ TEST_IMM_OP(rori, x19, x13, 0xff7fffff, 0xffffffbf, 0xf, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xefffffff), rs1:x12(0xffffff7f), imm:0xb
+ TEST_IMM_OP(rori, x20, x12, 0xefffffff, 0xffffff7f, 0xb, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xffffdfff), rs1:x11(0xfffffeff), imm:0x1b
+ TEST_IMM_OP(rori, x21, x11, 0xffffdfff, 0xfffffeff, 0x1b, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xfffffeff), rs1:x10(0xfffffdff), imm:0x1
+ TEST_IMM_OP(rori, x22, x10, 0xfffffeff, 0xfffffdff, 0x1, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xffdfffff), rs1:x9(0xfffffbff), imm:0x15
+ TEST_IMM_OP(rori, x23, x9, 0xffdfffff, 0xfffffbff, 0x15, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xffffefff), rs1:x8(0xfffff7ff), imm:0x1f
+ TEST_IMM_OP(rori, x24, x8, 0xffffefff, 0xfffff7ff, 0x1f, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xdfffffff), rs1:x7(0xffffefff), imm:0xf
+ TEST_IMM_OP(rori, x25, x7, 0xdfffffff, 0xffffefff, 0xf, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xffbfffff), rs1:x6(0xffffdfff), imm:0x17
+ TEST_IMM_OP(rori, x26, x6, 0xffbfffff, 0xffffdfff, 0x17, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xfff7ffff), rs1:x5(0xffffbfff), imm:0x1b
+ TEST_IMM_OP(rori, x27, x5, 0xfff7ffff, 0xffffbfff, 0x1b, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xfffbffff), rs1:x4(0xffff7fff), imm:0x1d
+ TEST_IMM_OP(rori, x28, x4, 0xfffbffff, 0xffff7fff, 0x1d, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xfffbffff), rs1:x3(0xfffeffff), imm:0x1e
+ TEST_IMM_OP(rori, x29, x3, 0xfffbffff, 0xfffeffff, 0x1e, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xfffdffff), rs1:x2(0xfffdffff), imm:0x0
+ TEST_IMM_OP(rori, x30, x2, 0xfffdffff, 0xfffdffff, 0x0, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xfffffffb), rs1:x1(0xfffbffff), imm:0x10
+ TEST_IMM_OP(rori, x31, x1, 0xfffffffb, 0xfffbffff, 0x10, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xfffff7ff), rs1:x31(0xfff7ffff), imm:0x8
+ TEST_IMM_OP(rori, x1, x31, 0xfffff7ff, 0xfff7ffff, 0x8, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xfffeffff), rs1:x30(0xffefffff), imm:0x4
+ TEST_IMM_OP(rori, x2, x30, 0xfffeffff, 0xffefffff, 0x4, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xfff7ffff), rs1:x29(0xffdfffff), imm:0x2
+ TEST_IMM_OP(rori, x3, x29, 0xfff7ffff, 0xffdfffff, 0x2, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xffdfffff), rs1:x28(0xffbfffff), imm:0x1
+ TEST_IMM_OP(rori, x4, x28, 0xffdfffff, 0xffbfffff, 0x1, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xff7fffff), rs1:x27(0xff7fffff), imm:0x0
+ TEST_IMM_OP(rori, x5, x27, 0xff7fffff, 0xff7fffff, 0x0, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xfeffffff), rs1:x26(0xfeffffff), imm:0x0
+ TEST_IMM_OP(rori, x6, x26, 0xfeffffff, 0xfeffffff, 0x0, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfdffffff), rs1:x25(0xfdffffff), imm:0x0
+ TEST_IMM_OP(rori, x7, x25, 0xfdffffff, 0xfdffffff, 0x0, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xfbffffff), rs1:x24(0xfbffffff), imm:0x0
+ TEST_IMM_OP(rori, x8, x24, 0xfbffffff, 0xfbffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xf7ffffff), rs1:x23(0xf7ffffff), imm:0x0
+ TEST_IMM_OP(rori, x9, x23, 0xf7ffffff, 0xf7ffffff, 0x0, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xefffffff), rs1:x22(0xefffffff), imm:0x0
+ TEST_IMM_OP(rori, x10, x22, 0xefffffff, 0xefffffff, 0x0, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xdfffffff), rs1:x21(0xdfffffff), imm:0x0
+ TEST_IMM_OP(rori, x11, x21, 0xdfffffff, 0xdfffffff, 0x0, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xbfffffff), rs1:x20(0xbfffffff), imm:0x0
+ TEST_IMM_OP(rori, x12, x20, 0xbfffffff, 0xbfffffff, 0x0, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x7fffffff), rs1:x19(0x7fffffff), imm:0x0
+ TEST_IMM_OP(rori, x13, x19, 0x7fffffff, 0x7fffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff), imm:0x0
+ TEST_IMM_OP(rori, x14, x18, 0xffffffff, 0xffffffff, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000001), rs1:x17(0x00000001), imm:0x0
+ TEST_IMM_OP(rori, x15, x17, 0x00000001, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000002), rs1:x16(0x00000002), imm:0x0
+ TEST_IMM_OP(rori, x16, x16, 0x00000002, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000004), rs1:x15(0x00000004), imm:0x0
+ TEST_IMM_OP(rori, x17, x15, 0x00000004, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000008), rs1:x14(0x00000008), imm:0x0
+ TEST_IMM_OP(rori, x18, x14, 0x00000008, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000010), rs1:x13(0x00000010), imm:0x0
+ TEST_IMM_OP(rori, x19, x13, 0x00000010, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000020), rs1:x12(0x00000020), imm:0x0
+ TEST_IMM_OP(rori, x20, x12, 0x00000020, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000040), rs1:x11(0x00000040), imm:0x0
+ TEST_IMM_OP(rori, x21, x11, 0x00000040, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000080), rs1:x10(0x00000080), imm:0x0
+ TEST_IMM_OP(rori, x22, x10, 0x00000080, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000100), rs1:x9(0x00000100), imm:0x0
+ TEST_IMM_OP(rori, x23, x9, 0x00000100, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000200), rs1:x8(0x00000200), imm:0x0
+ TEST_IMM_OP(rori, x24, x8, 0x00000200, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000400), rs1:x7(0x00000400), imm:0x0
+ TEST_IMM_OP(rori, x25, x7, 0x00000400, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000800), rs1:x6(0x00000800), imm:0x0
+ TEST_IMM_OP(rori, x26, x6, 0x00000800, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00001000), rs1:x5(0x00001000), imm:0x0
+ TEST_IMM_OP(rori, x27, x5, 0x00001000, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00002000), rs1:x4(0x00002000), imm:0x0
+ TEST_IMM_OP(rori, x28, x4, 0x00002000, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00004000), rs1:x3(0x00004000), imm:0x0
+ TEST_IMM_OP(rori, x29, x3, 0x00004000, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00008000), rs1:x2(0x00008000), imm:0x0
+ TEST_IMM_OP(rori, x30, x2, 0x00008000, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00010000), rs1:x1(0x00010000), imm:0x0
+ TEST_IMM_OP(rori, x31, x1, 0x00010000, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00020000), rs1:x31(0x00020000), imm:0x0
+ TEST_IMM_OP(rori, x1, x31, 0x00020000, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00040000), rs1:x30(0x00040000), imm:0x0
+ TEST_IMM_OP(rori, x2, x30, 0x00040000, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00080000), rs1:x29(0x00080000), imm:0x0
+ TEST_IMM_OP(rori, x3, x29, 0x00080000, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00100000), rs1:x28(0x00100000), imm:0x0
+ TEST_IMM_OP(rori, x4, x28, 0x00100000, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00200000), rs1:x27(0x00200000), imm:0x0
+ TEST_IMM_OP(rori, x5, x27, 0x00200000, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00400000), rs1:x26(0x00400000), imm:0x0
+ TEST_IMM_OP(rori, x6, x26, 0x00400000, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00800000), rs1:x25(0x00800000), imm:0x0
+ TEST_IMM_OP(rori, x7, x25, 0x00800000, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x01000000), rs1:x24(0x01000000), imm:0x0
+ TEST_IMM_OP(rori, x8, x24, 0x01000000, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x02000000), rs1:x23(0x02000000), imm:0x0
+ TEST_IMM_OP(rori, x9, x23, 0x02000000, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x04000000), rs1:x22(0x04000000), imm:0x0
+ TEST_IMM_OP(rori, x10, x22, 0x04000000, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x08000000), rs1:x21(0x08000000), imm:0x0
+ TEST_IMM_OP(rori, x11, x21, 0x08000000, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x10000000), rs1:x20(0x10000000), imm:0x0
+ TEST_IMM_OP(rori, x12, x20, 0x10000000, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x20000000), rs1:x19(0x20000000), imm:0x0
+ TEST_IMM_OP(rori, x13, x19, 0x20000000, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x40000000), rs1:x18(0x40000000), imm:0x0
+ TEST_IMM_OP(rori, x14, x18, 0x40000000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x80000000), rs1:x17(0x80000000), imm:0x0
+ TEST_IMM_OP(rori, x15, x17, 0x80000000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), imm:0x0
+ TEST_IMM_OP(rori, x16, x16, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfffffffe), rs1:x15(0xfffffffe), imm:0x0
+ TEST_IMM_OP(rori, x17, x15, 0xfffffffe, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfffffffd), rs1:x14(0xfffffffd), imm:0x0
+ TEST_IMM_OP(rori, x18, x14, 0xfffffffd, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfffffffb), rs1:x13(0xfffffffb), imm:0x0
+ TEST_IMM_OP(rori, x19, x13, 0xfffffffb, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xfffffff7), rs1:x12(0xfffffff7), imm:0x0
+ TEST_IMM_OP(rori, x20, x12, 0xfffffff7, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffef), rs1:x11(0xffffffef), imm:0x0
+ TEST_IMM_OP(rori, x21, x11, 0xffffffef, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffdf), rs1:x10(0xffffffdf), imm:0x0
+ TEST_IMM_OP(rori, x22, x10, 0xffffffdf, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffbf), rs1:x9(0xffffffbf), imm:0x0
+ TEST_IMM_OP(rori, x23, x9, 0xffffffbf, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffff7f), rs1:x8(0xffffff7f), imm:0x0
+ TEST_IMM_OP(rori, x24, x8, 0xffffff7f, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfffffeff), rs1:x7(0xfffffeff), imm:0x0
+ TEST_IMM_OP(rori, x25, x7, 0xfffffeff, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfffffdff), rs1:x6(0xfffffdff), imm:0x0
+ TEST_IMM_OP(rori, x26, x6, 0xfffffdff, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xfffffbff), rs1:x5(0xfffffbff), imm:0x0
+ TEST_IMM_OP(rori, x27, x5, 0xfffffbff, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfffff7ff), rs1:x4(0xfffff7ff), imm:0x0
+ TEST_IMM_OP(rori, x28, x4, 0xfffff7ff, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffefff), rs1:x3(0xffffefff), imm:0x0
+ TEST_IMM_OP(rori, x29, x3, 0xffffefff, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffdfff), rs1:x2(0xffffdfff), imm:0x0
+ TEST_IMM_OP(rori, x30, x2, 0xffffdfff, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffbfff), rs1:x1(0xffffbfff), imm:0x0
+ TEST_IMM_OP(rori, x31, x1, 0xffffbfff, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffff7fff), rs1:x31(0xffff7fff), imm:0x0
+ TEST_IMM_OP(rori, x1, x31, 0xffff7fff, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffeffff), rs1:x30(0xfffeffff), imm:0x0
+ TEST_IMM_OP(rori, x2, x30, 0xfffeffff, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfffdffff), rs1:x29(0xfffdffff), imm:0x0
+ TEST_IMM_OP(rori, x3, x29, 0xfffdffff, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfffbffff), rs1:x28(0xfffbffff), imm:0x0
+ TEST_IMM_OP(rori, x4, x28, 0xfffbffff, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfff7ffff), rs1:x27(0xfff7ffff), imm:0x0
+ TEST_IMM_OP(rori, x5, x27, 0xfff7ffff, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffefffff), rs1:x26(0xffefffff), imm:0x0
+ TEST_IMM_OP(rori, x6, x26, 0xffefffff, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffdfffff), rs1:x25(0xffdfffff), imm:0x0
+ TEST_IMM_OP(rori, x7, x25, 0xffdfffff, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffbfffff), rs1:x24(0xffbfffff), imm:0x0
+ TEST_IMM_OP(rori, x8, x24, 0xffbfffff, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffefffff), rs1:x23(0xff7fffff), imm:0x3
+ TEST_IMM_OP(rori, x9, x23, 0xffefffff, 0xff7fffff, 0x3, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xdfffffff), rs1:x22(0xfeffffff), imm:0x1b
+ TEST_IMM_OP(rori, x10, x22, 0xdfffffff, 0xfeffffff, 0x1b, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xfdffffff), rs1:x21(0xfdffffff), imm:0x0
+ TEST_IMM_OP(rori, x11, x21, 0xfdffffff, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xff7fffff), rs1:x20(0xfbffffff), imm:0x3
+ TEST_IMM_OP(rori, x12, x20, 0xff7fffff, 0xfbffffff, 0x3, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffffefff), rs1:x19(0xf7ffffff), imm:0xf
+ TEST_IMM_OP(rori, x13, x19, 0xffffefff, 0xf7ffffff, 0xf, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffdfff), rs1:x18(0xefffffff), imm:0xf
+ TEST_IMM_OP(rori, x14, x18, 0xffffdfff, 0xefffffff, 0xf, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xfffbffff), rs1:x17(0xdfffffff), imm:0xb
+ TEST_IMM_OP(rori, x15, x17, 0xfffbffff, 0xdfffffff, 0xb, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xfffffff7), rs1:x16(0xbfffffff), imm:0x1b
+ TEST_IMM_OP(rori, x16, x16, 0xfffffff7, 0xbfffffff, 0x1b, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xbfffffff), rs1:x15(0x7fffffff), imm:0x1
+ TEST_IMM_OP(rori, x17, x15, 0xbfffffff, 0x7fffffff, 0x1, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff), imm:0x15
+ TEST_IMM_OP(rori, x18, x14, 0xffffffff, 0xffffffff, 0x15, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0x5bd4a32b), rs1:x13(0xadea5195), imm:0x1f
+ TEST_IMM_OP(rori, x19, x13, 0x5bd4a32b, 0xadea5195, 0x1f, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), imm:0xf
+ TEST_IMM_OP(rori, x0, x12, 0x00000000, 0xd2ffbec1, 0xf, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xc3517751), rs1:x11(0xa8e1a8bb), imm:0x17
+ TEST_IMM_OP(rori, x21, x11, 0xc3517751, 0xa8e1a8bb, 0x17, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb), imm:0x1b
+ TEST_IMM_OP(rori, x22, x0, 0x00000000, 0x48c99fcb, 0x1b, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SHA256SIG0-01.S b/riscof/suite/rv32i_m/K_unratified/SHA256SIG0-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..1d8e7d5a6fbda11a646ff6f0712fa320d4650bbf
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SHA256SIG0-01.S
@@ -0,0 +1,1491 @@
+// RISC-V Architectural Validation Test SHA256SIG0-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha256sig0'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha256sig0)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha256sig0)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xaa83f5eb), rs1:x31(0xadea5195)
+ li x31, 0xadea5195
+ sha256sig0 x1, x31
+ sw x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0xaa83f5eb)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x764a7c1a), rs1:x30(0xd2ffbec1)
+ li x30, 0xd2ffbec1
+ sha256sig0 x2, x30
+ sw x2, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x764a7c1a)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x08631c7e), rs1:x29(0xa8e1a8bb)
+ li x29, 0xa8e1a8bb
+ sha256sig0 x3, x29
+ sw x3, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x08631c7e)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xf87a72f4), rs1:x28(0x48c99fcb)
+ li x28, 0x48c99fcb
+ sha256sig0 x4, x28
+ sw x4, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xf87a72f4)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xc2dc416a), rs1:x27(0x461d524f)
+ li x27, 0x461d524f
+ sha256sig0 x5, x27
+ sw x5, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xc2dc416a)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xd0df8296), rs1:x26(0x528a10af)
+ li x26, 0x528a10af
+ sha256sig0 x6, x26
+ sw x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xd0df8296)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x6500b0e9), rs1:x25(0xe19bfbc3)
+ li x25, 0xe19bfbc3
+ sha256sig0 x7, x25
+ sw x7, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x6500b0e9)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x325fb7a3), rs1:x24(0x707af2c0)
+ li x24, 0x707af2c0
+ sha256sig0 x8, x24
+ sw x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x325fb7a3)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xe7d1b134), rs1:x23(0xa47d105b)
+ li x23, 0xa47d105b
+ sha256sig0 x9, x23
+ sw x9, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xe7d1b134)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xb76f8a9a), rs1:x22(0x121bcc23)
+ li x22, 0x121bcc23
+ sha256sig0 x10, x22
+ sw x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xb76f8a9a)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x02004000), rs1:x21(0x00000001)
+ li x21, 0x1
+ sha256sig0 x11, x21
+ sw x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x02004000)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x04008000), rs1:x20(0x00000002)
+ li x20, 0x2
+ sha256sig0 x12, x20
+ sw x12, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x04008000)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x08010000), rs1:x19(0x00000004)
+ li x19, 0x4
+ sha256sig0 x13, x19
+ sw x13, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x08010000)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x10020001), rs1:x18(0x00000008)
+ li x18, 0x8
+ sha256sig0 x14, x18
+ sw x14, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x10020001)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x20040002), rs1:x17(0x00000010)
+ li x17, 0x10
+ sha256sig0 x15, x17
+ sw x15, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x20040002)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x40080004), rs1:x16(0x00000020)
+ li x16, 0x20
+ sha256sig0 x16, x16
+ sw x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x40080004)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x80100008), rs1:x15(0x00000040)
+ li x15, 0x40
+ sha256sig0 x17, x15
+ sw x17, 4(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x80100008)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00200011), rs1:x14(0x00000080)
+ li x14, 0x80
+ sha256sig0 x18, x14
+ sw x18, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x00200011)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00400022), rs1:x13(0x00000100)
+ li x13, 0x100
+ sha256sig0 x19, x13
+ sw x19, 12(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x00400022)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00800044), rs1:x12(0x00000200)
+ li x12, 0x200
+ sha256sig0 x20, x12
+ sw x20, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x00800044)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x01000088), rs1:x11(0x00000400)
+ li x11, 0x400
+ sha256sig0 x21, x11
+ sw x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x01000088)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x02000110), rs1:x10(0x00000800)
+ li x10, 0x800
+ sha256sig0 x22, x10
+ sw x22, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x02000110)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x04000220), rs1:x9(0x00001000)
+ li x9, 0x1000
+ sha256sig0 x23, x9
+ sw x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x04000220)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x08000440), rs1:x8(0x00002000)
+ li x8, 0x2000
+ sha256sig0 x24, x8
+ sw x24, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x08000440)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x10000880), rs1:x7(0x00004000)
+ li x7, 0x4000
+ sha256sig0 x25, x7
+ sw x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x10000880)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x20001100), rs1:x6(0x00008000)
+ li x6, 0x8000
+ sha256sig0 x26, x6
+ sw x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x20001100)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x40002200), rs1:x5(0x00010000)
+ li x5, 0x10000
+ sha256sig0 x27, x5
+ sw x27, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x40002200)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x80004400), rs1:x4(0x00020000)
+ li x4, 0x20000
+ sha256sig0 x28, x4
+ sw x28, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x80004400)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00008801), rs1:x3(0x00040000)
+ li x3, 0x40000
+ sha256sig0 x29, x3
+ sw x29, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x00008801)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00011002), rs1:x2(0x00080000)
+ li x2, 0x80000
+ sha256sig0 x30, x2
+ sw x30, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x00011002)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00022004), rs1:x1(0x00100000)
+ li x1, 0x100000
+ sha256sig0 x31, x1
+ sw x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x00022004)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00044008), rs1:x31(0x00200000)
+ li x31, 0x200000
+ sha256sig0 x1, x31
+ sw x1, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x00044008)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00088010), rs1:x30(0x00400000)
+ li x30, 0x400000
+ sha256sig0 x2, x30
+ sw x2, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x00088010)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00110020), rs1:x29(0x00800000)
+ li x29, 0x800000
+ sha256sig0 x3, x29
+ sw x3, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x00110020)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x00220040), rs1:x28(0x01000000)
+ li x28, 0x1000000
+ sha256sig0 x4, x28
+ sw x4, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x00220040)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x00440080), rs1:x27(0x02000000)
+ li x27, 0x2000000
+ sha256sig0 x5, x27
+ sw x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00440080)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x00880100), rs1:x26(0x04000000)
+ li x26, 0x4000000
+ sha256sig0 x6, x26
+ sw x6, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00880100)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x01100200), rs1:x25(0x08000000)
+ li x25, 0x8000000
+ sha256sig0 x7, x25
+ sw x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x01100200)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x02200400), rs1:x24(0x10000000)
+ li x24, 0x10000000
+ sha256sig0 x8, x24
+ sw x8, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x02200400)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x04400800), rs1:x23(0x20000000)
+ li x23, 0x20000000
+ sha256sig0 x9, x23
+ sw x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x04400800)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x08801000), rs1:x22(0x40000000)
+ li x22, 0x40000000
+ sha256sig0 x10, x22
+ sw x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x08801000)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x11002000), rs1:x21(0x80000000)
+ li x21, 0x80000000
+ sha256sig0 x11, x21
+ sw x11, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x11002000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000)
+ li x20, 0x0
+ sha256sig0 x12, x20
+ sw x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x1dffbfff), rs1:x19(0xfffffffe)
+ li x19, 0xfffffffe
+ sha256sig0 x13, x19
+ sw x13, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x1dffbfff)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x1bff7fff), rs1:x18(0xfffffffd)
+ li x18, 0xfffffffd
+ sha256sig0 x14, x18
+ sw x14, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x1bff7fff)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x17feffff), rs1:x17(0xfffffffb)
+ li x17, 0xfffffffb
+ sha256sig0 x15, x17
+ sw x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x17feffff)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0ffdfffe), rs1:x16(0xfffffff7)
+ li x16, 0xfffffff7
+ sha256sig0 x16, x16
+ sw x16, 4(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0ffdfffe)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x3ffbfffd), rs1:x15(0xffffffef)
+ li x15, 0xffffffef
+ sha256sig0 x17, x15
+ sw x17, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x3ffbfffd)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x5ff7fffb), rs1:x14(0xffffffdf)
+ li x14, 0xffffffdf
+ sha256sig0 x18, x14
+ sw x18, 12(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x5ff7fffb)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x9feffff7), rs1:x13(0xffffffbf)
+ li x13, 0xffffffbf
+ sha256sig0 x19, x13
+ sw x19, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x9feffff7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x1fdfffee), rs1:x12(0xffffff7f)
+ li x12, 0xffffff7f
+ sha256sig0 x20, x12
+ sw x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x1fdfffee)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x1fbfffdd), rs1:x11(0xfffffeff)
+ li x11, 0xfffffeff
+ sha256sig0 x21, x11
+ sw x21, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x1fbfffdd)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x1f7fffbb), rs1:x10(0xfffffdff)
+ li x10, 0xfffffdff
+ sha256sig0 x22, x10
+ sw x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x1f7fffbb)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x1effff77), rs1:x9(0xfffffbff)
+ li x9, 0xfffffbff
+ sha256sig0 x23, x9
+ sw x23, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x1effff77)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x1dfffeef), rs1:x8(0xfffff7ff)
+ li x8, 0xfffff7ff
+ sha256sig0 x24, x8
+ sw x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x1dfffeef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x1bfffddf), rs1:x7(0xffffefff)
+ li x7, 0xffffefff
+ sha256sig0 x25, x7
+ sw x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x1bfffddf)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x17fffbbf), rs1:x6(0xffffdfff)
+ li x6, 0xffffdfff
+ sha256sig0 x26, x6
+ sw x26, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x17fffbbf)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0ffff77f), rs1:x5(0xffffbfff)
+ li x5, 0xffffbfff
+ sha256sig0 x27, x5
+ sw x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0ffff77f)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x3fffeeff), rs1:x4(0xffff7fff)
+ li x4, 0xffff7fff
+ sha256sig0 x28, x4
+ sw x28, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x3fffeeff)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x5fffddff), rs1:x3(0xfffeffff)
+ li x3, 0xfffeffff
+ sha256sig0 x29, x3
+ sw x29, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x5fffddff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x9fffbbff), rs1:x2(0xfffdffff)
+ li x2, 0xfffdffff
+ sha256sig0 x30, x2
+ sw x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x9fffbbff)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x1fff77fe), rs1:x1(0xfffbffff)
+ li x1, 0xfffbffff
+ sha256sig0 x31, x1
+ sw x31, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x1fff77fe)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x1ffeeffd), rs1:x31(0xfff7ffff)
+ li x31, 0xfff7ffff
+ sha256sig0 x1, x31
+ sw x1, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x1ffeeffd)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x1ffddffb), rs1:x30(0xffefffff)
+ li x30, 0xffefffff
+ sha256sig0 x2, x30
+ sw x2, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x1ffddffb)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x1ffbbff7), rs1:x29(0xffdfffff)
+ li x29, 0xffdfffff
+ sha256sig0 x3, x29
+ sw x3, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x1ffbbff7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x1ff77fef), rs1:x28(0xffbfffff)
+ li x28, 0xffbfffff
+ sha256sig0 x4, x28
+ sw x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x1ff77fef)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x1feeffdf), rs1:x27(0xff7fffff)
+ li x27, 0xff7fffff
+ sha256sig0 x5, x27
+ sw x5, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x1feeffdf)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x1fddffbf), rs1:x26(0xfeffffff)
+ li x26, 0xfeffffff
+ sha256sig0 x6, x26
+ sw x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x1fddffbf)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x1fbbff7f), rs1:x25(0xfdffffff)
+ li x25, 0xfdffffff
+ sha256sig0 x7, x25
+ sw x7, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x1fbbff7f)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x1f77feff), rs1:x24(0xfbffffff)
+ li x24, 0xfbffffff
+ sha256sig0 x8, x24
+ sw x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x1f77feff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x1eeffdff), rs1:x23(0xf7ffffff)
+ li x23, 0xf7ffffff
+ sha256sig0 x9, x23
+ sw x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x1eeffdff)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x1ddffbff), rs1:x22(0xefffffff)
+ li x22, 0xefffffff
+ sha256sig0 x10, x22
+ sw x10, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x1ddffbff)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x1bbff7ff), rs1:x21(0xdfffffff)
+ li x21, 0xdfffffff
+ sha256sig0 x11, x21
+ sw x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x1bbff7ff)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x177fefff), rs1:x20(0xbfffffff)
+ li x20, 0xbfffffff
+ sha256sig0 x12, x20
+ sw x12, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x177fefff)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0effdfff), rs1:x19(0x7fffffff)
+ li x19, 0x7fffffff
+ sha256sig0 x13, x19
+ sw x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0effdfff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x1fffffff), rs1:x18(0xffffffff)
+ li x18, 0xffffffff
+ sha256sig0 x14, x18
+ sw x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x1fffffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x02004000), rs1:x17(0x00000001)
+ li x17, 0x1
+ sha256sig0 x15, x17
+ sw x15, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x02004000)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x04008000), rs1:x16(0x00000002)
+ li x16, 0x2
+ sha256sig0 x16, x16
+ sw x16, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x04008000)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x08010000), rs1:x15(0x00000004)
+ li x15, 0x4
+ sha256sig0 x17, x15
+ sw x17, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x08010000)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x10020001), rs1:x14(0x00000008)
+ li x14, 0x8
+ sha256sig0 x18, x14
+ sw x18, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x10020001)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x20040002), rs1:x13(0x00000010)
+ li x13, 0x10
+ sha256sig0 x19, x13
+ sw x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x20040002)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x40080004), rs1:x12(0x00000020)
+ li x12, 0x20
+ sha256sig0 x20, x12
+ sw x20, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x40080004)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x80100008), rs1:x11(0x00000040)
+ li x11, 0x40
+ sha256sig0 x21, x11
+ sw x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x80100008)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00200011), rs1:x10(0x00000080)
+ li x10, 0x80
+ sha256sig0 x22, x10
+ sw x22, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00200011)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00400022), rs1:x9(0x00000100)
+ li x9, 0x100
+ sha256sig0 x23, x9
+ sw x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00400022)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00800044), rs1:x8(0x00000200)
+ li x8, 0x200
+ sha256sig0 x24, x8
+ sw x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00800044)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x01000088), rs1:x7(0x00000400)
+ li x7, 0x400
+ sha256sig0 x25, x7
+ sw x25, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x01000088)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x02000110), rs1:x6(0x00000800)
+ li x6, 0x800
+ sha256sig0 x26, x6
+ sw x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x02000110)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x04000220), rs1:x5(0x00001000)
+ li x5, 0x1000
+ sha256sig0 x27, x5
+ sw x27, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x04000220)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x08000440), rs1:x4(0x00002000)
+ li x4, 0x2000
+ sha256sig0 x28, x4
+ sw x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x08000440)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x10000880), rs1:x3(0x00004000)
+ li x3, 0x4000
+ sha256sig0 x29, x3
+ sw x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x10000880)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x20001100), rs1:x2(0x00008000)
+ li x2, 0x8000
+ sha256sig0 x30, x2
+ sw x30, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x20001100)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x40002200), rs1:x1(0x00010000)
+ li x1, 0x10000
+ sha256sig0 x31, x1
+ sw x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x40002200)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x80004400), rs1:x31(0x00020000)
+ li x31, 0x20000
+ sha256sig0 x1, x31
+ sw x1, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x80004400)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00008801), rs1:x30(0x00040000)
+ li x30, 0x40000
+ sha256sig0 x2, x30
+ sw x2, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00008801)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00011002), rs1:x29(0x00080000)
+ li x29, 0x80000
+ sha256sig0 x3, x29
+ sw x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00011002)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00022004), rs1:x28(0x00100000)
+ li x28, 0x100000
+ sha256sig0 x4, x28
+ sw x4, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00022004)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00044008), rs1:x27(0x00200000)
+ li x27, 0x200000
+ sha256sig0 x5, x27
+ sw x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00044008)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00088010), rs1:x26(0x00400000)
+ li x26, 0x400000
+ sha256sig0 x6, x26
+ sw x6, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00088010)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00110020), rs1:x25(0x00800000)
+ li x25, 0x800000
+ sha256sig0 x7, x25
+ sw x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00110020)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00220040), rs1:x24(0x01000000)
+ li x24, 0x1000000
+ sha256sig0 x8, x24
+ sw x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00220040)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00440080), rs1:x23(0x02000000)
+ li x23, 0x2000000
+ sha256sig0 x9, x23
+ sw x9, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00440080)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00880100), rs1:x22(0x04000000)
+ li x22, 0x4000000
+ sha256sig0 x10, x22
+ sw x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00880100)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x01100200), rs1:x21(0x08000000)
+ li x21, 0x8000000
+ sha256sig0 x11, x21
+ sw x11, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x01100200)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x02200400), rs1:x20(0x10000000)
+ li x20, 0x10000000
+ sha256sig0 x12, x20
+ sw x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x02200400)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x04400800), rs1:x19(0x20000000)
+ li x19, 0x20000000
+ sha256sig0 x13, x19
+ sw x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x04400800)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x08801000), rs1:x18(0x40000000)
+ li x18, 0x40000000
+ sha256sig0 x14, x18
+ sw x14, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x08801000)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x11002000), rs1:x17(0x80000000)
+ li x17, 0x80000000
+ sha256sig0 x15, x17
+ sw x15, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x11002000)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000)
+ li x16, 0x0
+ sha256sig0 x16, x16
+ sw x16, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x1dffbfff), rs1:x15(0xfffffffe)
+ li x15, 0xfffffffe
+ sha256sig0 x17, x15
+ sw x17, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x1dffbfff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x1bff7fff), rs1:x14(0xfffffffd)
+ li x14, 0xfffffffd
+ sha256sig0 x18, x14
+ sw x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x1bff7fff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x17feffff), rs1:x13(0xfffffffb)
+ li x13, 0xfffffffb
+ sha256sig0 x19, x13
+ sw x19, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x17feffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x0ffdfffe), rs1:x12(0xfffffff7)
+ li x12, 0xfffffff7
+ sha256sig0 x20, x12
+ sw x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0ffdfffe)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x3ffbfffd), rs1:x11(0xffffffef)
+ li x11, 0xffffffef
+ sha256sig0 x21, x11
+ sw x21, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x3ffbfffd)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x5ff7fffb), rs1:x10(0xffffffdf)
+ li x10, 0xffffffdf
+ sha256sig0 x22, x10
+ sw x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x5ff7fffb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x9feffff7), rs1:x9(0xffffffbf)
+ li x9, 0xffffffbf
+ sha256sig0 x23, x9
+ sw x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x9feffff7)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x1fdfffee), rs1:x8(0xffffff7f)
+ li x8, 0xffffff7f
+ sha256sig0 x24, x8
+ sw x24, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x1fdfffee)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x1fbfffdd), rs1:x7(0xfffffeff)
+ li x7, 0xfffffeff
+ sha256sig0 x25, x7
+ sw x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x1fbfffdd)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x1f7fffbb), rs1:x6(0xfffffdff)
+ li x6, 0xfffffdff
+ sha256sig0 x26, x6
+ sw x26, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x1f7fffbb)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x1effff77), rs1:x5(0xfffffbff)
+ li x5, 0xfffffbff
+ sha256sig0 x27, x5
+ sw x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x1effff77)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x1dfffeef), rs1:x4(0xfffff7ff)
+ li x4, 0xfffff7ff
+ sha256sig0 x28, x4
+ sw x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0x1dfffeef)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x1bfffddf), rs1:x3(0xffffefff)
+ li x3, 0xffffefff
+ sha256sig0 x29, x3
+ sw x29, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0x1bfffddf)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x17fffbbf), rs1:x2(0xffffdfff)
+ li x2, 0xffffdfff
+ sha256sig0 x30, x2
+ sw x30, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0x17fffbbf)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x0ffff77f), rs1:x1(0xffffbfff)
+ li x1, 0xffffbfff
+ sha256sig0 x31, x1
+ sw x31, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0ffff77f)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x3fffeeff), rs1:x31(0xffff7fff)
+ li x31, 0xffff7fff
+ sha256sig0 x1, x31
+ sw x1, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x3fffeeff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x5fffddff), rs1:x30(0xfffeffff)
+ li x30, 0xfffeffff
+ sha256sig0 x2, x30
+ sw x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x5fffddff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x9fffbbff), rs1:x29(0xfffdffff)
+ li x29, 0xfffdffff
+ sha256sig0 x3, x29
+ sw x3, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x9fffbbff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x1fff77fe), rs1:x28(0xfffbffff)
+ li x28, 0xfffbffff
+ sha256sig0 x4, x28
+ sw x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x1fff77fe)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x1ffeeffd), rs1:x27(0xfff7ffff)
+ li x27, 0xfff7ffff
+ sha256sig0 x5, x27
+ sw x5, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x1ffeeffd)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x1ffddffb), rs1:x26(0xffefffff)
+ li x26, 0xffefffff
+ sha256sig0 x6, x26
+ sw x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x1ffddffb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x1ffbbff7), rs1:x25(0xffdfffff)
+ li x25, 0xffdfffff
+ sha256sig0 x7, x25
+ sw x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x1ffbbff7)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x1ff77fef), rs1:x24(0xffbfffff)
+ li x24, 0xffbfffff
+ sha256sig0 x8, x24
+ sw x8, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x1ff77fef)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x1feeffdf), rs1:x23(0xff7fffff)
+ li x23, 0xff7fffff
+ sha256sig0 x9, x23
+ sw x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x1feeffdf)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x1fddffbf), rs1:x22(0xfeffffff)
+ li x22, 0xfeffffff
+ sha256sig0 x10, x22
+ sw x10, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x1fddffbf)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x1fbbff7f), rs1:x21(0xfdffffff)
+ li x21, 0xfdffffff
+ sha256sig0 x11, x21
+ sw x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x1fbbff7f)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x1f77feff), rs1:x20(0xfbffffff)
+ li x20, 0xfbffffff
+ sha256sig0 x12, x20
+ sw x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x1f77feff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x1eeffdff), rs1:x19(0xf7ffffff)
+ li x19, 0xf7ffffff
+ sha256sig0 x13, x19
+ sw x13, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x1eeffdff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x1ddffbff), rs1:x18(0xefffffff)
+ li x18, 0xefffffff
+ sha256sig0 x14, x18
+ sw x14, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x1ddffbff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x1bbff7ff), rs1:x17(0xdfffffff)
+ li x17, 0xdfffffff
+ sha256sig0 x15, x17
+ sw x15, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x1bbff7ff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x177fefff), rs1:x16(0xbfffffff)
+ li x16, 0xbfffffff
+ sha256sig0 x16, x16
+ sw x16, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0x177fefff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0effdfff), rs1:x15(0x7fffffff)
+ li x15, 0x7fffffff
+ sha256sig0 x17, x15
+ sw x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x0effdfff)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x1fffffff), rs1:x14(0xffffffff)
+ li x14, 0xffffffff
+ sha256sig0 x18, x14
+ sw x18, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x1fffffff)
+
+ inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0xaa83f5eb), rs1:x13(0xadea5195)
+ li x13, 0xadea5195
+ sha256sig0 x19, x13
+ sw x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xaa83f5eb)
+
+ inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1)
+ li x12, 0xd2ffbec1
+ sha256sig0 x0, x12
+ sw x0, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
+
+ inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x08631c7e), rs1:x11(0xa8e1a8bb)
+ li x11, 0xa8e1a8bb
+ sha256sig0 x21, x11
+ sw x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x08631c7e)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb)
+ li x0, 0x48c99fcb
+ sha256sig0 x22, x0
+ sw x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SHA256SIG1-01.S b/riscof/suite/rv32i_m/K_unratified/SHA256SIG1-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..a431df96b618a2acc21dbef2f8a140a514cecc5c
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SHA256SIG1-01.S
@@ -0,0 +1,1491 @@
+// RISC-V Architectural Validation Test SHA256SIG1-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha256sig1'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha256sig1)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha256sig1)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x62d319dc), rs1:x31(0xadea5195)
+ li x31, 0xadea5195
+ sha256sig1 x1, x31
+ sw x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x62d319dc)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x288c6ccf), rs1:x30(0xd2ffbec1)
+ li x30, 0xd2ffbec1
+ sha256sig1 x2, x30
+ sw x2, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x288c6ccf)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xe1609906), rs1:x29(0xa8e1a8bb)
+ li x29, 0xa8e1a8bb
+ sha256sig1 x3, x29
+ sw x3, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xe1609906)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xfc0eff1a), rs1:x28(0x48c99fcb)
+ li x28, 0x48c99fcb
+ sha256sig1 x4, x28
+ sw x4, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xfc0eff1a)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x037fcc99), rs1:x27(0x461d524f)
+ li x27, 0x461d524f
+ sha256sig1 x5, x27
+ sw x5, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x037fcc99)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x4a56e190), rs1:x26(0x528a10af)
+ li x26, 0x528a10af
+ sha256sig1 x6, x26
+ sw x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x4a56e190)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x82a1ea00), rs1:x25(0xe19bfbc3)
+ li x25, 0xe19bfbc3
+ sha256sig1 x7, x25
+ sw x7, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x82a1ea00)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x2724288e), rs1:x24(0x707af2c0)
+ li x24, 0x707af2c0
+ sha256sig1 x8, x24
+ sw x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x2724288e)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x2a0fb9f5), rs1:x23(0xa47d105b)
+ li x23, 0xa47d105b
+ sha256sig1 x9, x23
+ sw x9, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x2a0fb9f5)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x9f916dbd), rs1:x22(0x121bcc23)
+ li x22, 0x121bcc23
+ sha256sig1 x10, x22
+ sw x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x9f916dbd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000a000), rs1:x21(0x00000001)
+ li x21, 0x1
+ sha256sig1 x11, x21
+ sw x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000a000)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00014000), rs1:x20(0x00000002)
+ li x20, 0x2
+ sha256sig1 x12, x20
+ sw x12, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x00014000)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00028000), rs1:x19(0x00000004)
+ li x19, 0x4
+ sha256sig1 x13, x19
+ sw x13, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x00028000)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00050000), rs1:x18(0x00000008)
+ li x18, 0x8
+ sha256sig1 x14, x18
+ sw x14, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x00050000)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x000a0000), rs1:x17(0x00000010)
+ li x17, 0x10
+ sha256sig1 x15, x17
+ sw x15, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x000a0000)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x00140000), rs1:x16(0x00000020)
+ li x16, 0x20
+ sha256sig1 x16, x16
+ sw x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x00140000)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x00280000), rs1:x15(0x00000040)
+ li x15, 0x40
+ sha256sig1 x17, x15
+ sw x17, 4(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x00280000)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00500000), rs1:x14(0x00000080)
+ li x14, 0x80
+ sha256sig1 x18, x14
+ sw x18, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x00500000)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00a00000), rs1:x13(0x00000100)
+ li x13, 0x100
+ sha256sig1 x19, x13
+ sw x19, 12(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x00a00000)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x01400000), rs1:x12(0x00000200)
+ li x12, 0x200
+ sha256sig1 x20, x12
+ sw x20, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x01400000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x02800001), rs1:x11(0x00000400)
+ li x11, 0x400
+ sha256sig1 x21, x11
+ sw x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x02800001)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x05000002), rs1:x10(0x00000800)
+ li x10, 0x800
+ sha256sig1 x22, x10
+ sw x22, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x05000002)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0a000004), rs1:x9(0x00001000)
+ li x9, 0x1000
+ sha256sig1 x23, x9
+ sw x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0a000004)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x14000008), rs1:x8(0x00002000)
+ li x8, 0x2000
+ sha256sig1 x24, x8
+ sw x24, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x14000008)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x28000010), rs1:x7(0x00004000)
+ li x7, 0x4000
+ sha256sig1 x25, x7
+ sw x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x28000010)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x50000020), rs1:x6(0x00008000)
+ li x6, 0x8000
+ sha256sig1 x26, x6
+ sw x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x50000020)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0xa0000040), rs1:x5(0x00010000)
+ li x5, 0x10000
+ sha256sig1 x27, x5
+ sw x27, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0xa0000040)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x40000081), rs1:x4(0x00020000)
+ li x4, 0x20000
+ sha256sig1 x28, x4
+ sw x28, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x40000081)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x80000102), rs1:x3(0x00040000)
+ li x3, 0x40000
+ sha256sig1 x29, x3
+ sw x29, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x80000102)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00000205), rs1:x2(0x00080000)
+ li x2, 0x80000
+ sha256sig1 x30, x2
+ sw x30, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x00000205)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000040a), rs1:x1(0x00100000)
+ li x1, 0x100000
+ sha256sig1 x31, x1
+ sw x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000040a)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00000814), rs1:x31(0x00200000)
+ li x31, 0x200000
+ sha256sig1 x1, x31
+ sw x1, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x00000814)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00001028), rs1:x30(0x00400000)
+ li x30, 0x400000
+ sha256sig1 x2, x30
+ sw x2, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x00001028)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00002050), rs1:x29(0x00800000)
+ li x29, 0x800000
+ sha256sig1 x3, x29
+ sw x3, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x00002050)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x000040a0), rs1:x28(0x01000000)
+ li x28, 0x1000000
+ sha256sig1 x4, x28
+ sw x4, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x000040a0)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x00008140), rs1:x27(0x02000000)
+ li x27, 0x2000000
+ sha256sig1 x5, x27
+ sw x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00008140)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x00010280), rs1:x26(0x04000000)
+ li x26, 0x4000000
+ sha256sig1 x6, x26
+ sw x6, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00010280)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x00020500), rs1:x25(0x08000000)
+ li x25, 0x8000000
+ sha256sig1 x7, x25
+ sw x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00020500)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x00040a00), rs1:x24(0x10000000)
+ li x24, 0x10000000
+ sha256sig1 x8, x24
+ sw x8, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00040a00)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x00081400), rs1:x23(0x20000000)
+ li x23, 0x20000000
+ sha256sig1 x9, x23
+ sw x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00081400)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x00102800), rs1:x22(0x40000000)
+ li x22, 0x40000000
+ sha256sig1 x10, x22
+ sw x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00102800)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x00205000), rs1:x21(0x80000000)
+ li x21, 0x80000000
+ sha256sig1 x11, x21
+ sw x11, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00205000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000)
+ li x20, 0x0
+ sha256sig1 x12, x20
+ sw x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x003f5fff), rs1:x19(0xfffffffe)
+ li x19, 0xfffffffe
+ sha256sig1 x13, x19
+ sw x13, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x003f5fff)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x003ebfff), rs1:x18(0xfffffffd)
+ li x18, 0xfffffffd
+ sha256sig1 x14, x18
+ sw x14, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x003ebfff)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x003d7fff), rs1:x17(0xfffffffb)
+ li x17, 0xfffffffb
+ sha256sig1 x15, x17
+ sw x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x003d7fff)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x003affff), rs1:x16(0xfffffff7)
+ li x16, 0xfffffff7
+ sha256sig1 x16, x16
+ sw x16, 4(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x003affff)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0035ffff), rs1:x15(0xffffffef)
+ li x15, 0xffffffef
+ sha256sig1 x17, x15
+ sw x17, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0035ffff)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x002bffff), rs1:x14(0xffffffdf)
+ li x14, 0xffffffdf
+ sha256sig1 x18, x14
+ sw x18, 12(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x002bffff)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0017ffff), rs1:x13(0xffffffbf)
+ li x13, 0xffffffbf
+ sha256sig1 x19, x13
+ sw x19, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0017ffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x006fffff), rs1:x12(0xffffff7f)
+ li x12, 0xffffff7f
+ sha256sig1 x20, x12
+ sw x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x006fffff)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x009fffff), rs1:x11(0xfffffeff)
+ li x11, 0xfffffeff
+ sha256sig1 x21, x11
+ sw x21, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x009fffff)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x017fffff), rs1:x10(0xfffffdff)
+ li x10, 0xfffffdff
+ sha256sig1 x22, x10
+ sw x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x017fffff)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x02bffffe), rs1:x9(0xfffffbff)
+ li x9, 0xfffffbff
+ sha256sig1 x23, x9
+ sw x23, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x02bffffe)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x053ffffd), rs1:x8(0xfffff7ff)
+ li x8, 0xfffff7ff
+ sha256sig1 x24, x8
+ sw x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x053ffffd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0a3ffffb), rs1:x7(0xffffefff)
+ li x7, 0xffffefff
+ sha256sig1 x25, x7
+ sw x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0a3ffffb)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x143ffff7), rs1:x6(0xffffdfff)
+ li x6, 0xffffdfff
+ sha256sig1 x26, x6
+ sw x26, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x143ffff7)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x283fffef), rs1:x5(0xffffbfff)
+ li x5, 0xffffbfff
+ sha256sig1 x27, x5
+ sw x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x283fffef)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x503fffdf), rs1:x4(0xffff7fff)
+ li x4, 0xffff7fff
+ sha256sig1 x28, x4
+ sw x28, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x503fffdf)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xa03fffbf), rs1:x3(0xfffeffff)
+ li x3, 0xfffeffff
+ sha256sig1 x29, x3
+ sw x29, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xa03fffbf)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x403fff7e), rs1:x2(0xfffdffff)
+ li x2, 0xfffdffff
+ sha256sig1 x30, x2
+ sw x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x403fff7e)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x803ffefd), rs1:x1(0xfffbffff)
+ li x1, 0xfffbffff
+ sha256sig1 x31, x1
+ sw x31, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x803ffefd)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x003ffdfa), rs1:x31(0xfff7ffff)
+ li x31, 0xfff7ffff
+ sha256sig1 x1, x31
+ sw x1, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x003ffdfa)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x003ffbf5), rs1:x30(0xffefffff)
+ li x30, 0xffefffff
+ sha256sig1 x2, x30
+ sw x2, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x003ffbf5)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x003ff7eb), rs1:x29(0xffdfffff)
+ li x29, 0xffdfffff
+ sha256sig1 x3, x29
+ sw x3, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x003ff7eb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x003fefd7), rs1:x28(0xffbfffff)
+ li x28, 0xffbfffff
+ sha256sig1 x4, x28
+ sw x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x003fefd7)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x003fdfaf), rs1:x27(0xff7fffff)
+ li x27, 0xff7fffff
+ sha256sig1 x5, x27
+ sw x5, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x003fdfaf)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x003fbf5f), rs1:x26(0xfeffffff)
+ li x26, 0xfeffffff
+ sha256sig1 x6, x26
+ sw x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x003fbf5f)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x003f7ebf), rs1:x25(0xfdffffff)
+ li x25, 0xfdffffff
+ sha256sig1 x7, x25
+ sw x7, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x003f7ebf)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x003efd7f), rs1:x24(0xfbffffff)
+ li x24, 0xfbffffff
+ sha256sig1 x8, x24
+ sw x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x003efd7f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x003dfaff), rs1:x23(0xf7ffffff)
+ li x23, 0xf7ffffff
+ sha256sig1 x9, x23
+ sw x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x003dfaff)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x003bf5ff), rs1:x22(0xefffffff)
+ li x22, 0xefffffff
+ sha256sig1 x10, x22
+ sw x10, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x003bf5ff)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0037ebff), rs1:x21(0xdfffffff)
+ li x21, 0xdfffffff
+ sha256sig1 x11, x21
+ sw x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0037ebff)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x002fd7ff), rs1:x20(0xbfffffff)
+ li x20, 0xbfffffff
+ sha256sig1 x12, x20
+ sw x12, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x002fd7ff)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x001fafff), rs1:x19(0x7fffffff)
+ li x19, 0x7fffffff
+ sha256sig1 x13, x19
+ sw x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x001fafff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x003fffff), rs1:x18(0xffffffff)
+ li x18, 0xffffffff
+ sha256sig1 x14, x18
+ sw x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x003fffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x0000a000), rs1:x17(0x00000001)
+ li x17, 0x1
+ sha256sig1 x15, x17
+ sw x15, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x0000a000)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00014000), rs1:x16(0x00000002)
+ li x16, 0x2
+ sha256sig1 x16, x16
+ sw x16, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00014000)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00028000), rs1:x15(0x00000004)
+ li x15, 0x4
+ sha256sig1 x17, x15
+ sw x17, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00028000)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00050000), rs1:x14(0x00000008)
+ li x14, 0x8
+ sha256sig1 x18, x14
+ sw x18, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00050000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x000a0000), rs1:x13(0x00000010)
+ li x13, 0x10
+ sha256sig1 x19, x13
+ sw x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x000a0000)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00140000), rs1:x12(0x00000020)
+ li x12, 0x20
+ sha256sig1 x20, x12
+ sw x20, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00140000)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00280000), rs1:x11(0x00000040)
+ li x11, 0x40
+ sha256sig1 x21, x11
+ sw x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00280000)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00500000), rs1:x10(0x00000080)
+ li x10, 0x80
+ sha256sig1 x22, x10
+ sw x22, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00500000)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00a00000), rs1:x9(0x00000100)
+ li x9, 0x100
+ sha256sig1 x23, x9
+ sw x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00a00000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x01400000), rs1:x8(0x00000200)
+ li x8, 0x200
+ sha256sig1 x24, x8
+ sw x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x01400000)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x02800001), rs1:x7(0x00000400)
+ li x7, 0x400
+ sha256sig1 x25, x7
+ sw x25, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x02800001)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x05000002), rs1:x6(0x00000800)
+ li x6, 0x800
+ sha256sig1 x26, x6
+ sw x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x05000002)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x0a000004), rs1:x5(0x00001000)
+ li x5, 0x1000
+ sha256sig1 x27, x5
+ sw x27, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0a000004)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x14000008), rs1:x4(0x00002000)
+ li x4, 0x2000
+ sha256sig1 x28, x4
+ sw x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x14000008)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x28000010), rs1:x3(0x00004000)
+ li x3, 0x4000
+ sha256sig1 x29, x3
+ sw x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x28000010)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x50000020), rs1:x2(0x00008000)
+ li x2, 0x8000
+ sha256sig1 x30, x2
+ sw x30, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x50000020)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xa0000040), rs1:x1(0x00010000)
+ li x1, 0x10000
+ sha256sig1 x31, x1
+ sw x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xa0000040)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x40000081), rs1:x31(0x00020000)
+ li x31, 0x20000
+ sha256sig1 x1, x31
+ sw x1, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x40000081)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x80000102), rs1:x30(0x00040000)
+ li x30, 0x40000
+ sha256sig1 x2, x30
+ sw x2, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x80000102)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000205), rs1:x29(0x00080000)
+ li x29, 0x80000
+ sha256sig1 x3, x29
+ sw x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000205)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x0000040a), rs1:x28(0x00100000)
+ li x28, 0x100000
+ sha256sig1 x4, x28
+ sw x4, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0000040a)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000814), rs1:x27(0x00200000)
+ li x27, 0x200000
+ sha256sig1 x5, x27
+ sw x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000814)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00001028), rs1:x26(0x00400000)
+ li x26, 0x400000
+ sha256sig1 x6, x26
+ sw x6, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00001028)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00002050), rs1:x25(0x00800000)
+ li x25, 0x800000
+ sha256sig1 x7, x25
+ sw x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00002050)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x000040a0), rs1:x24(0x01000000)
+ li x24, 0x1000000
+ sha256sig1 x8, x24
+ sw x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x000040a0)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00008140), rs1:x23(0x02000000)
+ li x23, 0x2000000
+ sha256sig1 x9, x23
+ sw x9, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00008140)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00010280), rs1:x22(0x04000000)
+ li x22, 0x4000000
+ sha256sig1 x10, x22
+ sw x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00010280)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00020500), rs1:x21(0x08000000)
+ li x21, 0x8000000
+ sha256sig1 x11, x21
+ sw x11, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00020500)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00040a00), rs1:x20(0x10000000)
+ li x20, 0x10000000
+ sha256sig1 x12, x20
+ sw x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00040a00)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00081400), rs1:x19(0x20000000)
+ li x19, 0x20000000
+ sha256sig1 x13, x19
+ sw x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00081400)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00102800), rs1:x18(0x40000000)
+ li x18, 0x40000000
+ sha256sig1 x14, x18
+ sw x14, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x00102800)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00205000), rs1:x17(0x80000000)
+ li x17, 0x80000000
+ sha256sig1 x15, x17
+ sw x15, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x00205000)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000)
+ li x16, 0x0
+ sha256sig1 x16, x16
+ sw x16, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x003f5fff), rs1:x15(0xfffffffe)
+ li x15, 0xfffffffe
+ sha256sig1 x17, x15
+ sw x17, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x003f5fff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x003ebfff), rs1:x14(0xfffffffd)
+ li x14, 0xfffffffd
+ sha256sig1 x18, x14
+ sw x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x003ebfff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x003d7fff), rs1:x13(0xfffffffb)
+ li x13, 0xfffffffb
+ sha256sig1 x19, x13
+ sw x19, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x003d7fff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x003affff), rs1:x12(0xfffffff7)
+ li x12, 0xfffffff7
+ sha256sig1 x20, x12
+ sw x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x003affff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x0035ffff), rs1:x11(0xffffffef)
+ li x11, 0xffffffef
+ sha256sig1 x21, x11
+ sw x21, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0035ffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x002bffff), rs1:x10(0xffffffdf)
+ li x10, 0xffffffdf
+ sha256sig1 x22, x10
+ sw x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x002bffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x0017ffff), rs1:x9(0xffffffbf)
+ li x9, 0xffffffbf
+ sha256sig1 x23, x9
+ sw x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0017ffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x006fffff), rs1:x8(0xffffff7f)
+ li x8, 0xffffff7f
+ sha256sig1 x24, x8
+ sw x24, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x006fffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x009fffff), rs1:x7(0xfffffeff)
+ li x7, 0xfffffeff
+ sha256sig1 x25, x7
+ sw x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x009fffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x017fffff), rs1:x6(0xfffffdff)
+ li x6, 0xfffffdff
+ sha256sig1 x26, x6
+ sw x26, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x017fffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x02bffffe), rs1:x5(0xfffffbff)
+ li x5, 0xfffffbff
+ sha256sig1 x27, x5
+ sw x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x02bffffe)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x053ffffd), rs1:x4(0xfffff7ff)
+ li x4, 0xfffff7ff
+ sha256sig1 x28, x4
+ sw x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0x053ffffd)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x0a3ffffb), rs1:x3(0xffffefff)
+ li x3, 0xffffefff
+ sha256sig1 x29, x3
+ sw x29, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0x0a3ffffb)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x143ffff7), rs1:x2(0xffffdfff)
+ li x2, 0xffffdfff
+ sha256sig1 x30, x2
+ sw x30, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0x143ffff7)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x283fffef), rs1:x1(0xffffbfff)
+ li x1, 0xffffbfff
+ sha256sig1 x31, x1
+ sw x31, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x283fffef)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x503fffdf), rs1:x31(0xffff7fff)
+ li x31, 0xffff7fff
+ sha256sig1 x1, x31
+ sw x1, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x503fffdf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xa03fffbf), rs1:x30(0xfffeffff)
+ li x30, 0xfffeffff
+ sha256sig1 x2, x30
+ sw x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xa03fffbf)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x403fff7e), rs1:x29(0xfffdffff)
+ li x29, 0xfffdffff
+ sha256sig1 x3, x29
+ sw x3, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x403fff7e)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x803ffefd), rs1:x28(0xfffbffff)
+ li x28, 0xfffbffff
+ sha256sig1 x4, x28
+ sw x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x803ffefd)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x003ffdfa), rs1:x27(0xfff7ffff)
+ li x27, 0xfff7ffff
+ sha256sig1 x5, x27
+ sw x5, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x003ffdfa)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x003ffbf5), rs1:x26(0xffefffff)
+ li x26, 0xffefffff
+ sha256sig1 x6, x26
+ sw x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x003ffbf5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x003ff7eb), rs1:x25(0xffdfffff)
+ li x25, 0xffdfffff
+ sha256sig1 x7, x25
+ sw x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x003ff7eb)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x003fefd7), rs1:x24(0xffbfffff)
+ li x24, 0xffbfffff
+ sha256sig1 x8, x24
+ sw x8, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x003fefd7)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x003fdfaf), rs1:x23(0xff7fffff)
+ li x23, 0xff7fffff
+ sha256sig1 x9, x23
+ sw x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x003fdfaf)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x003fbf5f), rs1:x22(0xfeffffff)
+ li x22, 0xfeffffff
+ sha256sig1 x10, x22
+ sw x10, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x003fbf5f)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x003f7ebf), rs1:x21(0xfdffffff)
+ li x21, 0xfdffffff
+ sha256sig1 x11, x21
+ sw x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x003f7ebf)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x003efd7f), rs1:x20(0xfbffffff)
+ li x20, 0xfbffffff
+ sha256sig1 x12, x20
+ sw x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x003efd7f)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x003dfaff), rs1:x19(0xf7ffffff)
+ li x19, 0xf7ffffff
+ sha256sig1 x13, x19
+ sw x13, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x003dfaff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x003bf5ff), rs1:x18(0xefffffff)
+ li x18, 0xefffffff
+ sha256sig1 x14, x18
+ sw x14, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x003bf5ff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x0037ebff), rs1:x17(0xdfffffff)
+ li x17, 0xdfffffff
+ sha256sig1 x15, x17
+ sw x15, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0037ebff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x002fd7ff), rs1:x16(0xbfffffff)
+ li x16, 0xbfffffff
+ sha256sig1 x16, x16
+ sw x16, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0x002fd7ff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x001fafff), rs1:x15(0x7fffffff)
+ li x15, 0x7fffffff
+ sha256sig1 x17, x15
+ sw x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x001fafff)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x003fffff), rs1:x14(0xffffffff)
+ li x14, 0xffffffff
+ sha256sig1 x18, x14
+ sw x18, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x003fffff)
+
+ inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0x62d319dc), rs1:x13(0xadea5195)
+ li x13, 0xadea5195
+ sha256sig1 x19, x13
+ sw x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x62d319dc)
+
+ inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1)
+ li x12, 0xd2ffbec1
+ sha256sig1 x0, x12
+ sw x0, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
+
+ inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xe1609906), rs1:x11(0xa8e1a8bb)
+ li x11, 0xa8e1a8bb
+ sha256sig1 x21, x11
+ sw x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xe1609906)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb)
+ li x0, 0x48c99fcb
+ sha256sig1 x22, x0
+ sw x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SHA256SUM0-01.S b/riscof/suite/rv32i_m/K_unratified/SHA256SUM0-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..a734224f1d3c621a93f7f81f3d348738b22881fb
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SHA256SUM0-01.S
@@ -0,0 +1,1491 @@
+// RISC-V Architectural Validation Test SHA256SUM0-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha256sum0'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha256sum0)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha256sum0)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x4e91ad80), rs1:x31(0xadea5195)
+ li x31, 0xadea5195
+ sha256sum0 x1, x31
+ sw x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x4e91ad80)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x7c4a7f06), rs1:x30(0xd2ffbec1)
+ li x30, 0xd2ffbec1
+ sha256sum0 x2, x30
+ sw x2, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x7c4a7f06)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x2947c380), rs1:x29(0xa8e1a8bb)
+ li x29, 0xa8e1a8bb
+ sha256sum0 x3, x29
+ sw x3, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x2947c380)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x0a170c9d), rs1:x28(0x48c99fcb)
+ li x28, 0x48c99fcb
+ sha256sum0 x4, x28
+ sw x4, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0a170c9d)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x36b45961), rs1:x27(0x461d524f)
+ li x27, 0x461d524f
+ sha256sum0 x5, x27
+ sw x5, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x36b45961)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x799aad31), rs1:x26(0x528a10af)
+ li x26, 0x528a10af
+ sha256sum0 x6, x26
+ sw x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x799aad31)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x4996fda9), rs1:x25(0xe19bfbc3)
+ li x25, 0xe19bfbc3
+ sha256sum0 x7, x25
+ sw x7, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x4996fda9)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x61d63ea6), rs1:x24(0x707af2c0)
+ li x24, 0x707af2c0
+ sha256sum0 x8, x24
+ sw x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x61d63ea6)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x9f83096f), rs1:x23(0xa47d105b)
+ li x23, 0xa47d105b
+ sha256sum0 x9, x23
+ sw x9, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x9f83096f)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xcaaeef9e), rs1:x22(0x121bcc23)
+ li x22, 0x121bcc23
+ sha256sum0 x10, x22
+ sw x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xcaaeef9e)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x40080400), rs1:x21(0x00000001)
+ li x21, 0x1
+ sha256sum0 x11, x21
+ sw x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x40080400)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x80100800), rs1:x20(0x00000002)
+ li x20, 0x2
+ sha256sum0 x12, x20
+ sw x12, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x80100800)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00201001), rs1:x19(0x00000004)
+ li x19, 0x4
+ sha256sum0 x13, x19
+ sw x13, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x00201001)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00402002), rs1:x18(0x00000008)
+ li x18, 0x8
+ sha256sum0 x14, x18
+ sw x14, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x00402002)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00804004), rs1:x17(0x00000010)
+ li x17, 0x10
+ sha256sum0 x15, x17
+ sw x15, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x00804004)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x01008008), rs1:x16(0x00000020)
+ li x16, 0x20
+ sha256sum0 x16, x16
+ sw x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x01008008)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x02010010), rs1:x15(0x00000040)
+ li x15, 0x40
+ sha256sum0 x17, x15
+ sw x17, 4(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x02010010)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x04020020), rs1:x14(0x00000080)
+ li x14, 0x80
+ sha256sum0 x18, x14
+ sw x18, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x04020020)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x08040040), rs1:x13(0x00000100)
+ li x13, 0x100
+ sha256sum0 x19, x13
+ sw x19, 12(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x08040040)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x10080080), rs1:x12(0x00000200)
+ li x12, 0x200
+ sha256sum0 x20, x12
+ sw x20, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x10080080)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x20100100), rs1:x11(0x00000400)
+ li x11, 0x400
+ sha256sum0 x21, x11
+ sw x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x20100100)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x40200200), rs1:x10(0x00000800)
+ li x10, 0x800
+ sha256sum0 x22, x10
+ sw x22, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x40200200)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x80400400), rs1:x9(0x00001000)
+ li x9, 0x1000
+ sha256sum0 x23, x9
+ sw x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x80400400)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00800801), rs1:x8(0x00002000)
+ li x8, 0x2000
+ sha256sum0 x24, x8
+ sw x24, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00800801)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x01001002), rs1:x7(0x00004000)
+ li x7, 0x4000
+ sha256sum0 x25, x7
+ sw x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x01001002)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x02002004), rs1:x6(0x00008000)
+ li x6, 0x8000
+ sha256sum0 x26, x6
+ sw x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x02002004)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x04004008), rs1:x5(0x00010000)
+ li x5, 0x10000
+ sha256sum0 x27, x5
+ sw x27, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x04004008)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x08008010), rs1:x4(0x00020000)
+ li x4, 0x20000
+ sha256sum0 x28, x4
+ sw x28, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x08008010)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x10010020), rs1:x3(0x00040000)
+ li x3, 0x40000
+ sha256sum0 x29, x3
+ sw x29, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x10010020)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x20020040), rs1:x2(0x00080000)
+ li x2, 0x80000
+ sha256sum0 x30, x2
+ sw x30, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x20020040)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x40040080), rs1:x1(0x00100000)
+ li x1, 0x100000
+ sha256sum0 x31, x1
+ sw x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x40040080)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x80080100), rs1:x31(0x00200000)
+ li x31, 0x200000
+ sha256sum0 x1, x31
+ sw x1, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x80080100)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00100201), rs1:x30(0x00400000)
+ li x30, 0x400000
+ sha256sum0 x2, x30
+ sw x2, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x00100201)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00200402), rs1:x29(0x00800000)
+ li x29, 0x800000
+ sha256sum0 x3, x29
+ sw x3, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x00200402)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x00400804), rs1:x28(0x01000000)
+ li x28, 0x1000000
+ sha256sum0 x4, x28
+ sw x4, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x00400804)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x00801008), rs1:x27(0x02000000)
+ li x27, 0x2000000
+ sha256sum0 x5, x27
+ sw x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00801008)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x01002010), rs1:x26(0x04000000)
+ li x26, 0x4000000
+ sha256sum0 x6, x26
+ sw x6, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x01002010)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x02004020), rs1:x25(0x08000000)
+ li x25, 0x8000000
+ sha256sum0 x7, x25
+ sw x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x02004020)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x04008040), rs1:x24(0x10000000)
+ li x24, 0x10000000
+ sha256sum0 x8, x24
+ sw x8, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x04008040)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x08010080), rs1:x23(0x20000000)
+ li x23, 0x20000000
+ sha256sum0 x9, x23
+ sw x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x08010080)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x10020100), rs1:x22(0x40000000)
+ li x22, 0x40000000
+ sha256sum0 x10, x22
+ sw x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x10020100)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x20040200), rs1:x21(0x80000000)
+ li x21, 0x80000000
+ sha256sum0 x11, x21
+ sw x11, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x20040200)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000)
+ li x20, 0x0
+ sha256sum0 x12, x20
+ sw x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xbff7fbff), rs1:x19(0xfffffffe)
+ li x19, 0xfffffffe
+ sha256sum0 x13, x19
+ sw x13, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xbff7fbff)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x7feff7ff), rs1:x18(0xfffffffd)
+ li x18, 0xfffffffd
+ sha256sum0 x14, x18
+ sw x14, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x7feff7ff)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xffdfeffe), rs1:x17(0xfffffffb)
+ li x17, 0xfffffffb
+ sha256sum0 x15, x17
+ sw x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0xffdfeffe)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xffbfdffd), rs1:x16(0xfffffff7)
+ li x16, 0xfffffff7
+ sha256sum0 x16, x16
+ sw x16, 4(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0xffbfdffd)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xff7fbffb), rs1:x15(0xffffffef)
+ li x15, 0xffffffef
+ sha256sum0 x17, x15
+ sw x17, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0xff7fbffb)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xfeff7ff7), rs1:x14(0xffffffdf)
+ li x14, 0xffffffdf
+ sha256sum0 x18, x14
+ sw x18, 12(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0xfeff7ff7)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xfdfeffef), rs1:x13(0xffffffbf)
+ li x13, 0xffffffbf
+ sha256sum0 x19, x13
+ sw x19, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0xfdfeffef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xfbfdffdf), rs1:x12(0xffffff7f)
+ li x12, 0xffffff7f
+ sha256sum0 x20, x12
+ sw x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfbfdffdf)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xf7fbffbf), rs1:x11(0xfffffeff)
+ li x11, 0xfffffeff
+ sha256sum0 x21, x11
+ sw x21, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xf7fbffbf)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xeff7ff7f), rs1:x10(0xfffffdff)
+ li x10, 0xfffffdff
+ sha256sum0 x22, x10
+ sw x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xeff7ff7f)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xdfeffeff), rs1:x9(0xfffffbff)
+ li x9, 0xfffffbff
+ sha256sum0 x23, x9
+ sw x23, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xdfeffeff)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xbfdffdff), rs1:x8(0xfffff7ff)
+ li x8, 0xfffff7ff
+ sha256sum0 x24, x8
+ sw x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xbfdffdff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x7fbffbff), rs1:x7(0xffffefff)
+ li x7, 0xffffefff
+ sha256sum0 x25, x7
+ sw x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x7fbffbff)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xff7ff7fe), rs1:x6(0xffffdfff)
+ li x6, 0xffffdfff
+ sha256sum0 x26, x6
+ sw x26, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xff7ff7fe)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xfeffeffd), rs1:x5(0xffffbfff)
+ li x5, 0xffffbfff
+ sha256sum0 x27, x5
+ sw x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xfeffeffd)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xfdffdffb), rs1:x4(0xffff7fff)
+ li x4, 0xffff7fff
+ sha256sum0 x28, x4
+ sw x28, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xfdffdffb)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xfbffbff7), rs1:x3(0xfffeffff)
+ li x3, 0xfffeffff
+ sha256sum0 x29, x3
+ sw x29, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xfbffbff7)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xf7ff7fef), rs1:x2(0xfffdffff)
+ li x2, 0xfffdffff
+ sha256sum0 x30, x2
+ sw x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xf7ff7fef)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xeffeffdf), rs1:x1(0xfffbffff)
+ li x1, 0xfffbffff
+ sha256sum0 x31, x1
+ sw x31, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xeffeffdf)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xdffdffbf), rs1:x31(0xfff7ffff)
+ li x31, 0xfff7ffff
+ sha256sum0 x1, x31
+ sw x1, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xdffdffbf)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xbffbff7f), rs1:x30(0xffefffff)
+ li x30, 0xffefffff
+ sha256sum0 x2, x30
+ sw x2, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xbffbff7f)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x7ff7feff), rs1:x29(0xffdfffff)
+ li x29, 0xffdfffff
+ sha256sum0 x3, x29
+ sw x3, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x7ff7feff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xffeffdfe), rs1:x28(0xffbfffff)
+ li x28, 0xffbfffff
+ sha256sum0 x4, x28
+ sw x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xffeffdfe)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xffdffbfd), rs1:x27(0xff7fffff)
+ li x27, 0xff7fffff
+ sha256sum0 x5, x27
+ sw x5, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xffdffbfd)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xffbff7fb), rs1:x26(0xfeffffff)
+ li x26, 0xfeffffff
+ sha256sum0 x6, x26
+ sw x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xffbff7fb)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xff7feff7), rs1:x25(0xfdffffff)
+ li x25, 0xfdffffff
+ sha256sum0 x7, x25
+ sw x7, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xff7feff7)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xfeffdfef), rs1:x24(0xfbffffff)
+ li x24, 0xfbffffff
+ sha256sum0 x8, x24
+ sw x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfeffdfef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xfdffbfdf), rs1:x23(0xf7ffffff)
+ li x23, 0xf7ffffff
+ sha256sum0 x9, x23
+ sw x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfdffbfdf)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xfbff7fbf), rs1:x22(0xefffffff)
+ li x22, 0xefffffff
+ sha256sum0 x10, x22
+ sw x10, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfbff7fbf)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xf7feff7f), rs1:x21(0xdfffffff)
+ li x21, 0xdfffffff
+ sha256sum0 x11, x21
+ sw x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xf7feff7f)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xeffdfeff), rs1:x20(0xbfffffff)
+ li x20, 0xbfffffff
+ sha256sum0 x12, x20
+ sw x12, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xeffdfeff)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xdffbfdff), rs1:x19(0x7fffffff)
+ li x19, 0x7fffffff
+ sha256sum0 x13, x19
+ sw x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xdffbfdff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff)
+ li x18, 0xffffffff
+ sha256sum0 x14, x18
+ sw x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xffffffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x40080400), rs1:x17(0x00000001)
+ li x17, 0x1
+ sha256sum0 x15, x17
+ sw x15, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x40080400)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x80100800), rs1:x16(0x00000002)
+ li x16, 0x2
+ sha256sum0 x16, x16
+ sw x16, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x80100800)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00201001), rs1:x15(0x00000004)
+ li x15, 0x4
+ sha256sum0 x17, x15
+ sw x17, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00201001)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00402002), rs1:x14(0x00000008)
+ li x14, 0x8
+ sha256sum0 x18, x14
+ sw x18, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00402002)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00804004), rs1:x13(0x00000010)
+ li x13, 0x10
+ sha256sum0 x19, x13
+ sw x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00804004)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x01008008), rs1:x12(0x00000020)
+ li x12, 0x20
+ sha256sum0 x20, x12
+ sw x20, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x01008008)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x02010010), rs1:x11(0x00000040)
+ li x11, 0x40
+ sha256sum0 x21, x11
+ sw x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x02010010)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x04020020), rs1:x10(0x00000080)
+ li x10, 0x80
+ sha256sum0 x22, x10
+ sw x22, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x04020020)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x08040040), rs1:x9(0x00000100)
+ li x9, 0x100
+ sha256sum0 x23, x9
+ sw x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x08040040)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x10080080), rs1:x8(0x00000200)
+ li x8, 0x200
+ sha256sum0 x24, x8
+ sw x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x10080080)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x20100100), rs1:x7(0x00000400)
+ li x7, 0x400
+ sha256sum0 x25, x7
+ sw x25, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x20100100)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x40200200), rs1:x6(0x00000800)
+ li x6, 0x800
+ sha256sum0 x26, x6
+ sw x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x40200200)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x80400400), rs1:x5(0x00001000)
+ li x5, 0x1000
+ sha256sum0 x27, x5
+ sw x27, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x80400400)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00800801), rs1:x4(0x00002000)
+ li x4, 0x2000
+ sha256sum0 x28, x4
+ sw x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00800801)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x01001002), rs1:x3(0x00004000)
+ li x3, 0x4000
+ sha256sum0 x29, x3
+ sw x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x01001002)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x02002004), rs1:x2(0x00008000)
+ li x2, 0x8000
+ sha256sum0 x30, x2
+ sw x30, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x02002004)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x04004008), rs1:x1(0x00010000)
+ li x1, 0x10000
+ sha256sum0 x31, x1
+ sw x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x04004008)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x08008010), rs1:x31(0x00020000)
+ li x31, 0x20000
+ sha256sum0 x1, x31
+ sw x1, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x08008010)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x10010020), rs1:x30(0x00040000)
+ li x30, 0x40000
+ sha256sum0 x2, x30
+ sw x2, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x10010020)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x20020040), rs1:x29(0x00080000)
+ li x29, 0x80000
+ sha256sum0 x3, x29
+ sw x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x20020040)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x40040080), rs1:x28(0x00100000)
+ li x28, 0x100000
+ sha256sum0 x4, x28
+ sw x4, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x40040080)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x80080100), rs1:x27(0x00200000)
+ li x27, 0x200000
+ sha256sum0 x5, x27
+ sw x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x80080100)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00100201), rs1:x26(0x00400000)
+ li x26, 0x400000
+ sha256sum0 x6, x26
+ sw x6, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00100201)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00200402), rs1:x25(0x00800000)
+ li x25, 0x800000
+ sha256sum0 x7, x25
+ sw x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00200402)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00400804), rs1:x24(0x01000000)
+ li x24, 0x1000000
+ sha256sum0 x8, x24
+ sw x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00400804)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00801008), rs1:x23(0x02000000)
+ li x23, 0x2000000
+ sha256sum0 x9, x23
+ sw x9, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00801008)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x01002010), rs1:x22(0x04000000)
+ li x22, 0x4000000
+ sha256sum0 x10, x22
+ sw x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x01002010)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x02004020), rs1:x21(0x08000000)
+ li x21, 0x8000000
+ sha256sum0 x11, x21
+ sw x11, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x02004020)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x04008040), rs1:x20(0x10000000)
+ li x20, 0x10000000
+ sha256sum0 x12, x20
+ sw x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x04008040)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x08010080), rs1:x19(0x20000000)
+ li x19, 0x20000000
+ sha256sum0 x13, x19
+ sw x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x08010080)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x10020100), rs1:x18(0x40000000)
+ li x18, 0x40000000
+ sha256sum0 x14, x18
+ sw x14, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x10020100)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x20040200), rs1:x17(0x80000000)
+ li x17, 0x80000000
+ sha256sum0 x15, x17
+ sw x15, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x20040200)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000)
+ li x16, 0x0
+ sha256sum0 x16, x16
+ sw x16, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xbff7fbff), rs1:x15(0xfffffffe)
+ li x15, 0xfffffffe
+ sha256sum0 x17, x15
+ sw x17, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xbff7fbff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x7feff7ff), rs1:x14(0xfffffffd)
+ li x14, 0xfffffffd
+ sha256sum0 x18, x14
+ sw x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x7feff7ff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffdfeffe), rs1:x13(0xfffffffb)
+ li x13, 0xfffffffb
+ sha256sum0 x19, x13
+ sw x19, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xffdfeffe)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffbfdffd), rs1:x12(0xfffffff7)
+ li x12, 0xfffffff7
+ sha256sum0 x20, x12
+ sw x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffbfdffd)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xff7fbffb), rs1:x11(0xffffffef)
+ li x11, 0xffffffef
+ sha256sum0 x21, x11
+ sw x21, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xff7fbffb)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xfeff7ff7), rs1:x10(0xffffffdf)
+ li x10, 0xffffffdf
+ sha256sum0 x22, x10
+ sw x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfeff7ff7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xfdfeffef), rs1:x9(0xffffffbf)
+ li x9, 0xffffffbf
+ sha256sum0 x23, x9
+ sw x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfdfeffef)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xfbfdffdf), rs1:x8(0xffffff7f)
+ li x8, 0xffffff7f
+ sha256sum0 x24, x8
+ sw x24, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfbfdffdf)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xf7fbffbf), rs1:x7(0xfffffeff)
+ li x7, 0xfffffeff
+ sha256sum0 x25, x7
+ sw x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xf7fbffbf)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xeff7ff7f), rs1:x6(0xfffffdff)
+ li x6, 0xfffffdff
+ sha256sum0 x26, x6
+ sw x26, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xeff7ff7f)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xdfeffeff), rs1:x5(0xfffffbff)
+ li x5, 0xfffffbff
+ sha256sum0 x27, x5
+ sw x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xdfeffeff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xbfdffdff), rs1:x4(0xfffff7ff)
+ li x4, 0xfffff7ff
+ sha256sum0 x28, x4
+ sw x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0xbfdffdff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x7fbffbff), rs1:x3(0xffffefff)
+ li x3, 0xffffefff
+ sha256sum0 x29, x3
+ sw x29, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0x7fbffbff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xff7ff7fe), rs1:x2(0xffffdfff)
+ li x2, 0xffffdfff
+ sha256sum0 x30, x2
+ sw x30, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0xff7ff7fe)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xfeffeffd), rs1:x1(0xffffbfff)
+ li x1, 0xffffbfff
+ sha256sum0 x31, x1
+ sw x31, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xfeffeffd)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xfdffdffb), rs1:x31(0xffff7fff)
+ li x31, 0xffff7fff
+ sha256sum0 x1, x31
+ sw x1, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xfdffdffb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfbffbff7), rs1:x30(0xfffeffff)
+ li x30, 0xfffeffff
+ sha256sum0 x2, x30
+ sw x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xfbffbff7)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xf7ff7fef), rs1:x29(0xfffdffff)
+ li x29, 0xfffdffff
+ sha256sum0 x3, x29
+ sw x3, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xf7ff7fef)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xeffeffdf), rs1:x28(0xfffbffff)
+ li x28, 0xfffbffff
+ sha256sum0 x4, x28
+ sw x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xeffeffdf)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xdffdffbf), rs1:x27(0xfff7ffff)
+ li x27, 0xfff7ffff
+ sha256sum0 x5, x27
+ sw x5, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xdffdffbf)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xbffbff7f), rs1:x26(0xffefffff)
+ li x26, 0xffefffff
+ sha256sum0 x6, x26
+ sw x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0xbffbff7f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x7ff7feff), rs1:x25(0xffdfffff)
+ li x25, 0xffdfffff
+ sha256sum0 x7, x25
+ sw x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x7ff7feff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffeffdfe), rs1:x24(0xffbfffff)
+ li x24, 0xffbfffff
+ sha256sum0 x8, x24
+ sw x8, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffeffdfe)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffdffbfd), rs1:x23(0xff7fffff)
+ li x23, 0xff7fffff
+ sha256sum0 x9, x23
+ sw x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xffdffbfd)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffbff7fb), rs1:x22(0xfeffffff)
+ li x22, 0xfeffffff
+ sha256sum0 x10, x22
+ sw x10, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffbff7fb)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xff7feff7), rs1:x21(0xfdffffff)
+ li x21, 0xfdffffff
+ sha256sum0 x11, x21
+ sw x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xff7feff7)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xfeffdfef), rs1:x20(0xfbffffff)
+ li x20, 0xfbffffff
+ sha256sum0 x12, x20
+ sw x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xfeffdfef)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xfdffbfdf), rs1:x19(0xf7ffffff)
+ li x19, 0xf7ffffff
+ sha256sum0 x13, x19
+ sw x13, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xfdffbfdf)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xfbff7fbf), rs1:x18(0xefffffff)
+ li x18, 0xefffffff
+ sha256sum0 x14, x18
+ sw x14, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xfbff7fbf)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xf7feff7f), rs1:x17(0xdfffffff)
+ li x17, 0xdfffffff
+ sha256sum0 x15, x17
+ sw x15, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xf7feff7f)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xeffdfeff), rs1:x16(0xbfffffff)
+ li x16, 0xbfffffff
+ sha256sum0 x16, x16
+ sw x16, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xeffdfeff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xdffbfdff), rs1:x15(0x7fffffff)
+ li x15, 0x7fffffff
+ sha256sum0 x17, x15
+ sw x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0xdffbfdff)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff)
+ li x14, 0xffffffff
+ sha256sum0 x18, x14
+ sw x18, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xffffffff)
+
+ inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0x4e91ad80), rs1:x13(0xadea5195)
+ li x13, 0xadea5195
+ sha256sum0 x19, x13
+ sw x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x4e91ad80)
+
+ inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1)
+ li x12, 0xd2ffbec1
+ sha256sum0 x0, x12
+ sw x0, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
+
+ inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x2947c380), rs1:x11(0xa8e1a8bb)
+ li x11, 0xa8e1a8bb
+ sha256sum0 x21, x11
+ sw x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x2947c380)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb)
+ li x0, 0x48c99fcb
+ sha256sum0 x22, x0
+ sw x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SHA256SUM1-01.S b/riscof/suite/rv32i_m/K_unratified/SHA256SUM1-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..ecafba36e6594074b4f7d238e21fa1c3ab40ef09
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SHA256SUM1-01.S
@@ -0,0 +1,1491 @@
+// RISC-V Architectural Validation Test SHA256SUM1-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha256sum1'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha256sum1)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha256sum1)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x912adeda), rs1:x31(0xadea5195)
+ li x31, 0xadea5195
+ sha256sum1 x1, x31
+ sw x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x912adeda)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xa0aec1e5), rs1:x30(0xd2ffbec1)
+ li x30, 0xd2ffbec1
+ sha256sum1 x2, x30
+ sw x2, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xa0aec1e5)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x8902c743), rs1:x29(0xa8e1a8bb)
+ li x29, 0xa8e1a8bb
+ sha256sum1 x3, x29
+ sw x3, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x8902c743)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xb085dae8), rs1:x28(0x48c99fcb)
+ li x28, 0x48c99fcb
+ sha256sum1 x4, x28
+ sw x4, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xb085dae8)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x7a599140), rs1:x27(0x461d524f)
+ li x27, 0x461d524f
+ sha256sum1 x5, x27
+ sw x5, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x7a599140)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xeda82ea9), rs1:x26(0x528a10af)
+ li x26, 0x528a10af
+ sha256sum1 x6, x26
+ sw x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xeda82ea9)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xba07bd60), rs1:x25(0xe19bfbc3)
+ li x25, 0xe19bfbc3
+ sha256sum1 x7, x25
+ sw x7, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xba07bd60)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x64b684ad), rs1:x24(0x707af2c0)
+ li x24, 0x707af2c0
+ sha256sum1 x8, x24
+ sw x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x64b684ad)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x5b6d5631), rs1:x23(0xa47d105b)
+ li x23, 0xa47d105b
+ sha256sum1 x9, x23
+ sw x9, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x5b6d5631)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x05cc3dc0), rs1:x22(0x121bcc23)
+ li x22, 0x121bcc23
+ sha256sum1 x10, x22
+ sw x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x05cc3dc0)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x04200080), rs1:x21(0x00000001)
+ li x21, 0x1
+ sha256sum1 x11, x21
+ sw x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x04200080)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x08400100), rs1:x20(0x00000002)
+ li x20, 0x2
+ sha256sum1 x12, x20
+ sw x12, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x08400100)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x10800200), rs1:x19(0x00000004)
+ li x19, 0x4
+ sha256sum1 x13, x19
+ sw x13, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x10800200)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x21000400), rs1:x18(0x00000008)
+ li x18, 0x8
+ sha256sum1 x14, x18
+ sw x14, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x21000400)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x42000800), rs1:x17(0x00000010)
+ li x17, 0x10
+ sha256sum1 x15, x17
+ sw x15, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x42000800)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x84001000), rs1:x16(0x00000020)
+ li x16, 0x20
+ sha256sum1 x16, x16
+ sw x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x84001000)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x08002001), rs1:x15(0x00000040)
+ li x15, 0x40
+ sha256sum1 x17, x15
+ sw x17, 4(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x08002001)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x10004002), rs1:x14(0x00000080)
+ li x14, 0x80
+ sha256sum1 x18, x14
+ sw x18, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x10004002)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x20008004), rs1:x13(0x00000100)
+ li x13, 0x100
+ sha256sum1 x19, x13
+ sw x19, 12(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x20008004)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x40010008), rs1:x12(0x00000200)
+ li x12, 0x200
+ sha256sum1 x20, x12
+ sw x20, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x40010008)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x80020010), rs1:x11(0x00000400)
+ li x11, 0x400
+ sha256sum1 x21, x11
+ sw x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x80020010)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00040021), rs1:x10(0x00000800)
+ li x10, 0x800
+ sha256sum1 x22, x10
+ sw x22, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00040021)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00080042), rs1:x9(0x00001000)
+ li x9, 0x1000
+ sha256sum1 x23, x9
+ sw x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00080042)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00100084), rs1:x8(0x00002000)
+ li x8, 0x2000
+ sha256sum1 x24, x8
+ sw x24, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00100084)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00200108), rs1:x7(0x00004000)
+ li x7, 0x4000
+ sha256sum1 x25, x7
+ sw x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00200108)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00400210), rs1:x6(0x00008000)
+ li x6, 0x8000
+ sha256sum1 x26, x6
+ sw x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x00400210)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00800420), rs1:x5(0x00010000)
+ li x5, 0x10000
+ sha256sum1 x27, x5
+ sw x27, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x00800420)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x01000840), rs1:x4(0x00020000)
+ li x4, 0x20000
+ sha256sum1 x28, x4
+ sw x28, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x01000840)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x02001080), rs1:x3(0x00040000)
+ li x3, 0x40000
+ sha256sum1 x29, x3
+ sw x29, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x02001080)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x04002100), rs1:x2(0x00080000)
+ li x2, 0x80000
+ sha256sum1 x30, x2
+ sw x30, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x04002100)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x08004200), rs1:x1(0x00100000)
+ li x1, 0x100000
+ sha256sum1 x31, x1
+ sw x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x08004200)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x10008400), rs1:x31(0x00200000)
+ li x31, 0x200000
+ sha256sum1 x1, x31
+ sw x1, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x10008400)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x20010800), rs1:x30(0x00400000)
+ li x30, 0x400000
+ sha256sum1 x2, x30
+ sw x2, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x20010800)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x40021000), rs1:x29(0x00800000)
+ li x29, 0x800000
+ sha256sum1 x3, x29
+ sw x3, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x40021000)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x80042000), rs1:x28(0x01000000)
+ li x28, 0x1000000
+ sha256sum1 x4, x28
+ sw x4, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x80042000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x00084001), rs1:x27(0x02000000)
+ li x27, 0x2000000
+ sha256sum1 x5, x27
+ sw x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00084001)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x00108002), rs1:x26(0x04000000)
+ li x26, 0x4000000
+ sha256sum1 x6, x26
+ sw x6, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00108002)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x00210004), rs1:x25(0x08000000)
+ li x25, 0x8000000
+ sha256sum1 x7, x25
+ sw x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00210004)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x00420008), rs1:x24(0x10000000)
+ li x24, 0x10000000
+ sha256sum1 x8, x24
+ sw x8, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00420008)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x00840010), rs1:x23(0x20000000)
+ li x23, 0x20000000
+ sha256sum1 x9, x23
+ sw x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00840010)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x01080020), rs1:x22(0x40000000)
+ li x22, 0x40000000
+ sha256sum1 x10, x22
+ sw x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x01080020)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x02100040), rs1:x21(0x80000000)
+ li x21, 0x80000000
+ sha256sum1 x11, x21
+ sw x11, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x02100040)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000)
+ li x20, 0x0
+ sha256sum1 x12, x20
+ sw x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xfbdfff7f), rs1:x19(0xfffffffe)
+ li x19, 0xfffffffe
+ sha256sum1 x13, x19
+ sw x13, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xfbdfff7f)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xf7bffeff), rs1:x18(0xfffffffd)
+ li x18, 0xfffffffd
+ sha256sum1 x14, x18
+ sw x14, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0xf7bffeff)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xef7ffdff), rs1:x17(0xfffffffb)
+ li x17, 0xfffffffb
+ sha256sum1 x15, x17
+ sw x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0xef7ffdff)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xdefffbff), rs1:x16(0xfffffff7)
+ li x16, 0xfffffff7
+ sha256sum1 x16, x16
+ sw x16, 4(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0xdefffbff)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xbdfff7ff), rs1:x15(0xffffffef)
+ li x15, 0xffffffef
+ sha256sum1 x17, x15
+ sw x17, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0xbdfff7ff)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x7bffefff), rs1:x14(0xffffffdf)
+ li x14, 0xffffffdf
+ sha256sum1 x18, x14
+ sw x18, 12(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x7bffefff)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xf7ffdffe), rs1:x13(0xffffffbf)
+ li x13, 0xffffffbf
+ sha256sum1 x19, x13
+ sw x19, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0xf7ffdffe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xefffbffd), rs1:x12(0xffffff7f)
+ li x12, 0xffffff7f
+ sha256sum1 x20, x12
+ sw x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xefffbffd)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xdfff7ffb), rs1:x11(0xfffffeff)
+ li x11, 0xfffffeff
+ sha256sum1 x21, x11
+ sw x21, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xdfff7ffb)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xbffefff7), rs1:x10(0xfffffdff)
+ li x10, 0xfffffdff
+ sha256sum1 x22, x10
+ sw x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xbffefff7)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x7ffdffef), rs1:x9(0xfffffbff)
+ li x9, 0xfffffbff
+ sha256sum1 x23, x9
+ sw x23, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x7ffdffef)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xfffbffde), rs1:x8(0xfffff7ff)
+ li x8, 0xfffff7ff
+ sha256sum1 x24, x8
+ sw x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfffbffde)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xfff7ffbd), rs1:x7(0xffffefff)
+ li x7, 0xffffefff
+ sha256sum1 x25, x7
+ sw x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xfff7ffbd)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xffefff7b), rs1:x6(0xffffdfff)
+ li x6, 0xffffdfff
+ sha256sum1 x26, x6
+ sw x26, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffefff7b)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xffdffef7), rs1:x5(0xffffbfff)
+ li x5, 0xffffbfff
+ sha256sum1 x27, x5
+ sw x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffdffef7)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xffbffdef), rs1:x4(0xffff7fff)
+ li x4, 0xffff7fff
+ sha256sum1 x28, x4
+ sw x28, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xffbffdef)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xff7ffbdf), rs1:x3(0xfffeffff)
+ li x3, 0xfffeffff
+ sha256sum1 x29, x3
+ sw x29, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xff7ffbdf)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xfefff7bf), rs1:x2(0xfffdffff)
+ li x2, 0xfffdffff
+ sha256sum1 x30, x2
+ sw x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfefff7bf)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xfdffef7f), rs1:x1(0xfffbffff)
+ li x1, 0xfffbffff
+ sha256sum1 x31, x1
+ sw x31, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xfdffef7f)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xfbffdeff), rs1:x31(0xfff7ffff)
+ li x31, 0xfff7ffff
+ sha256sum1 x1, x31
+ sw x1, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xfbffdeff)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xf7ffbdff), rs1:x30(0xffefffff)
+ li x30, 0xffefffff
+ sha256sum1 x2, x30
+ sw x2, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xf7ffbdff)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xefff7bff), rs1:x29(0xffdfffff)
+ li x29, 0xffdfffff
+ sha256sum1 x3, x29
+ sw x3, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xefff7bff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xdffef7ff), rs1:x28(0xffbfffff)
+ li x28, 0xffbfffff
+ sha256sum1 x4, x28
+ sw x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xdffef7ff)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xbffdefff), rs1:x27(0xff7fffff)
+ li x27, 0xff7fffff
+ sha256sum1 x5, x27
+ sw x5, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xbffdefff)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x7ffbdfff), rs1:x26(0xfeffffff)
+ li x26, 0xfeffffff
+ sha256sum1 x6, x26
+ sw x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x7ffbdfff)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfff7bffe), rs1:x25(0xfdffffff)
+ li x25, 0xfdffffff
+ sha256sum1 x7, x25
+ sw x7, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfff7bffe)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xffef7ffd), rs1:x24(0xfbffffff)
+ li x24, 0xfbffffff
+ sha256sum1 x8, x24
+ sw x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffef7ffd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xffdefffb), rs1:x23(0xf7ffffff)
+ li x23, 0xf7ffffff
+ sha256sum1 x9, x23
+ sw x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xffdefffb)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xffbdfff7), rs1:x22(0xefffffff)
+ li x22, 0xefffffff
+ sha256sum1 x10, x22
+ sw x10, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffbdfff7)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xff7bffef), rs1:x21(0xdfffffff)
+ li x21, 0xdfffffff
+ sha256sum1 x11, x21
+ sw x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xff7bffef)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xfef7ffdf), rs1:x20(0xbfffffff)
+ li x20, 0xbfffffff
+ sha256sum1 x12, x20
+ sw x12, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xfef7ffdf)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xfdefffbf), rs1:x19(0x7fffffff)
+ li x19, 0x7fffffff
+ sha256sum1 x13, x19
+ sw x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xfdefffbf)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff)
+ li x18, 0xffffffff
+ sha256sum1 x14, x18
+ sw x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xffffffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x04200080), rs1:x17(0x00000001)
+ li x17, 0x1
+ sha256sum1 x15, x17
+ sw x15, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x04200080)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x08400100), rs1:x16(0x00000002)
+ li x16, 0x2
+ sha256sum1 x16, x16
+ sw x16, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x08400100)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x10800200), rs1:x15(0x00000004)
+ li x15, 0x4
+ sha256sum1 x17, x15
+ sw x17, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x10800200)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x21000400), rs1:x14(0x00000008)
+ li x14, 0x8
+ sha256sum1 x18, x14
+ sw x18, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x21000400)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x42000800), rs1:x13(0x00000010)
+ li x13, 0x10
+ sha256sum1 x19, x13
+ sw x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x42000800)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x84001000), rs1:x12(0x00000020)
+ li x12, 0x20
+ sha256sum1 x20, x12
+ sw x20, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x84001000)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x08002001), rs1:x11(0x00000040)
+ li x11, 0x40
+ sha256sum1 x21, x11
+ sw x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x08002001)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x10004002), rs1:x10(0x00000080)
+ li x10, 0x80
+ sha256sum1 x22, x10
+ sw x22, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x10004002)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x20008004), rs1:x9(0x00000100)
+ li x9, 0x100
+ sha256sum1 x23, x9
+ sw x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x20008004)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x40010008), rs1:x8(0x00000200)
+ li x8, 0x200
+ sha256sum1 x24, x8
+ sw x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x40010008)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x80020010), rs1:x7(0x00000400)
+ li x7, 0x400
+ sha256sum1 x25, x7
+ sw x25, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x80020010)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00040021), rs1:x6(0x00000800)
+ li x6, 0x800
+ sha256sum1 x26, x6
+ sw x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00040021)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00080042), rs1:x5(0x00001000)
+ li x5, 0x1000
+ sha256sum1 x27, x5
+ sw x27, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00080042)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00100084), rs1:x4(0x00002000)
+ li x4, 0x2000
+ sha256sum1 x28, x4
+ sw x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00100084)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00200108), rs1:x3(0x00004000)
+ li x3, 0x4000
+ sha256sum1 x29, x3
+ sw x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00200108)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00400210), rs1:x2(0x00008000)
+ li x2, 0x8000
+ sha256sum1 x30, x2
+ sw x30, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00400210)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00800420), rs1:x1(0x00010000)
+ li x1, 0x10000
+ sha256sum1 x31, x1
+ sw x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00800420)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x01000840), rs1:x31(0x00020000)
+ li x31, 0x20000
+ sha256sum1 x1, x31
+ sw x1, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x01000840)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x02001080), rs1:x30(0x00040000)
+ li x30, 0x40000
+ sha256sum1 x2, x30
+ sw x2, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x02001080)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x04002100), rs1:x29(0x00080000)
+ li x29, 0x80000
+ sha256sum1 x3, x29
+ sw x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x04002100)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x08004200), rs1:x28(0x00100000)
+ li x28, 0x100000
+ sha256sum1 x4, x28
+ sw x4, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x08004200)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x10008400), rs1:x27(0x00200000)
+ li x27, 0x200000
+ sha256sum1 x5, x27
+ sw x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x10008400)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x20010800), rs1:x26(0x00400000)
+ li x26, 0x400000
+ sha256sum1 x6, x26
+ sw x6, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x20010800)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x40021000), rs1:x25(0x00800000)
+ li x25, 0x800000
+ sha256sum1 x7, x25
+ sw x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x40021000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x80042000), rs1:x24(0x01000000)
+ li x24, 0x1000000
+ sha256sum1 x8, x24
+ sw x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x80042000)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00084001), rs1:x23(0x02000000)
+ li x23, 0x2000000
+ sha256sum1 x9, x23
+ sw x9, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00084001)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00108002), rs1:x22(0x04000000)
+ li x22, 0x4000000
+ sha256sum1 x10, x22
+ sw x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00108002)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00210004), rs1:x21(0x08000000)
+ li x21, 0x8000000
+ sha256sum1 x11, x21
+ sw x11, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00210004)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00420008), rs1:x20(0x10000000)
+ li x20, 0x10000000
+ sha256sum1 x12, x20
+ sw x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00420008)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00840010), rs1:x19(0x20000000)
+ li x19, 0x20000000
+ sha256sum1 x13, x19
+ sw x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00840010)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x01080020), rs1:x18(0x40000000)
+ li x18, 0x40000000
+ sha256sum1 x14, x18
+ sw x14, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x01080020)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x02100040), rs1:x17(0x80000000)
+ li x17, 0x80000000
+ sha256sum1 x15, x17
+ sw x15, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x02100040)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000)
+ li x16, 0x0
+ sha256sum1 x16, x16
+ sw x16, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfbdfff7f), rs1:x15(0xfffffffe)
+ li x15, 0xfffffffe
+ sha256sum1 x17, x15
+ sw x17, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xfbdfff7f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xf7bffeff), rs1:x14(0xfffffffd)
+ li x14, 0xfffffffd
+ sha256sum1 x18, x14
+ sw x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xf7bffeff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xef7ffdff), rs1:x13(0xfffffffb)
+ li x13, 0xfffffffb
+ sha256sum1 x19, x13
+ sw x19, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xef7ffdff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xdefffbff), rs1:x12(0xfffffff7)
+ li x12, 0xfffffff7
+ sha256sum1 x20, x12
+ sw x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xdefffbff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xbdfff7ff), rs1:x11(0xffffffef)
+ li x11, 0xffffffef
+ sha256sum1 x21, x11
+ sw x21, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xbdfff7ff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x7bffefff), rs1:x10(0xffffffdf)
+ li x10, 0xffffffdf
+ sha256sum1 x22, x10
+ sw x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x7bffefff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xf7ffdffe), rs1:x9(0xffffffbf)
+ li x9, 0xffffffbf
+ sha256sum1 x23, x9
+ sw x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xf7ffdffe)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xefffbffd), rs1:x8(0xffffff7f)
+ li x8, 0xffffff7f
+ sha256sum1 x24, x8
+ sw x24, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xefffbffd)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xdfff7ffb), rs1:x7(0xfffffeff)
+ li x7, 0xfffffeff
+ sha256sum1 x25, x7
+ sw x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xdfff7ffb)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xbffefff7), rs1:x6(0xfffffdff)
+ li x6, 0xfffffdff
+ sha256sum1 x26, x6
+ sw x26, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xbffefff7)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x7ffdffef), rs1:x5(0xfffffbff)
+ li x5, 0xfffffbff
+ sha256sum1 x27, x5
+ sw x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x7ffdffef)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfffbffde), rs1:x4(0xfffff7ff)
+ li x4, 0xfffff7ff
+ sha256sum1 x28, x4
+ sw x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0xfffbffde)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xfff7ffbd), rs1:x3(0xffffefff)
+ li x3, 0xffffefff
+ sha256sum1 x29, x3
+ sw x29, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0xfff7ffbd)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffefff7b), rs1:x2(0xffffdfff)
+ li x2, 0xffffdfff
+ sha256sum1 x30, x2
+ sw x30, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0xffefff7b)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffdffef7), rs1:x1(0xffffbfff)
+ li x1, 0xffffbfff
+ sha256sum1 x31, x1
+ sw x31, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xffdffef7)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffbffdef), rs1:x31(0xffff7fff)
+ li x31, 0xffff7fff
+ sha256sum1 x1, x31
+ sw x1, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xffbffdef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xff7ffbdf), rs1:x30(0xfffeffff)
+ li x30, 0xfffeffff
+ sha256sum1 x2, x30
+ sw x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xff7ffbdf)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfefff7bf), rs1:x29(0xfffdffff)
+ li x29, 0xfffdffff
+ sha256sum1 x3, x29
+ sw x3, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xfefff7bf)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfdffef7f), rs1:x28(0xfffbffff)
+ li x28, 0xfffbffff
+ sha256sum1 x4, x28
+ sw x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xfdffef7f)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfbffdeff), rs1:x27(0xfff7ffff)
+ li x27, 0xfff7ffff
+ sha256sum1 x5, x27
+ sw x5, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xfbffdeff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xf7ffbdff), rs1:x26(0xffefffff)
+ li x26, 0xffefffff
+ sha256sum1 x6, x26
+ sw x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0xf7ffbdff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xefff7bff), rs1:x25(0xffdfffff)
+ li x25, 0xffdfffff
+ sha256sum1 x7, x25
+ sw x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xefff7bff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xdffef7ff), rs1:x24(0xffbfffff)
+ li x24, 0xffbfffff
+ sha256sum1 x8, x24
+ sw x8, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xdffef7ff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xbffdefff), rs1:x23(0xff7fffff)
+ li x23, 0xff7fffff
+ sha256sum1 x9, x23
+ sw x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xbffdefff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x7ffbdfff), rs1:x22(0xfeffffff)
+ li x22, 0xfeffffff
+ sha256sum1 x10, x22
+ sw x10, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x7ffbdfff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xfff7bffe), rs1:x21(0xfdffffff)
+ li x21, 0xfdffffff
+ sha256sum1 x11, x21
+ sw x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfff7bffe)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffef7ffd), rs1:x20(0xfbffffff)
+ li x20, 0xfbffffff
+ sha256sum1 x12, x20
+ sw x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xffef7ffd)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffdefffb), rs1:x19(0xf7ffffff)
+ li x19, 0xf7ffffff
+ sha256sum1 x13, x19
+ sw x13, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xffdefffb)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffbdfff7), rs1:x18(0xefffffff)
+ li x18, 0xefffffff
+ sha256sum1 x14, x18
+ sw x14, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xffbdfff7)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xff7bffef), rs1:x17(0xdfffffff)
+ li x17, 0xdfffffff
+ sha256sum1 x15, x17
+ sw x15, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xff7bffef)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xfef7ffdf), rs1:x16(0xbfffffff)
+ li x16, 0xbfffffff
+ sha256sum1 x16, x16
+ sw x16, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xfef7ffdf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xfdefffbf), rs1:x15(0x7fffffff)
+ li x15, 0x7fffffff
+ sha256sum1 x17, x15
+ sw x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0xfdefffbf)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff)
+ li x14, 0xffffffff
+ sha256sum1 x18, x14
+ sw x18, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xffffffff)
+
+ inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0x912adeda), rs1:x13(0xadea5195)
+ li x13, 0xadea5195
+ sha256sum1 x19, x13
+ sw x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x912adeda)
+
+ inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1)
+ li x12, 0xd2ffbec1
+ sha256sum1 x0, x12
+ sw x0, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
+
+ inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x8902c743), rs1:x11(0xa8e1a8bb)
+ li x11, 0xa8e1a8bb
+ sha256sum1 x21, x11
+ sw x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x8902c743)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb)
+ li x0, 0x48c99fcb
+ sha256sum1 x22, x0
+ sw x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SHA512SIG0H-01.S b/riscof/suite/rv32i_m/K_unratified/SHA512SIG0H-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..5a33ca54e10c86f067c438139e0b988b49e5e699
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SHA512SIG0H-01.S
@@ -0,0 +1,1023 @@
+// RISC-V Architectural Validation Test SHA512SIG0H-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha512sig0h'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha512sig0h)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha512sig0h)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xf4031638), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(sha512sig0h, x1, x31, x16, 0xf4031638, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xb308dfa3), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(sha512sig0h, x2, x30, x15, 0xb308dfa3, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x9589f6a4), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(sha512sig0h, x3, x29, x14, 0x9589f6a4, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x67bd9545), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(sha512sig0h, x4, x28, x13, 0x67bd9545, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x0cc48ed1), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(sha512sig0h, x5, x27, x12, 0x0cc48ed1, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xe6b29666), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(sha512sig0h, x6, x26, x11, 0xe6b29666, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x3aef51ed), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(sha512sig0h, x7, x25, x10, 0x3aef51ed, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x03adf677), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(sha512sig0h, x8, x24, x9, 0x03adf677, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x12d20f1d), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(sha512sig0h, x9, x23, x8, 0x12d20f1d, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x1c3bca45), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(sha512sig0h, x10, x22, x7, 0x1c3bca45, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x7f000000), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(sha512sig0h, x11, x21, x6, 0x7f000000, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x7f000001), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(sha512sig0h, x12, x20, x5, 0x7f000001, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x7f000002), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(sha512sig0h, x13, x19, x4, 0x7f000002, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x7f000004), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(sha512sig0h, x14, x18, x3, 0x7f000004, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x7f000008), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(sha512sig0h, x15, x17, x2, 0x7f000008, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x7f000010), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(sha512sig0h, x16, x16, x1, 0x7f000010, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x7f000020), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(sha512sig0h, x17, x15, x31, 0x7f000020, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x7f000041), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(sha512sig0h, x18, x14, x30, 0x7f000041, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x7f000083), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(sha512sig0h, x19, x13, x29, 0x7f000083, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x7f000106), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(sha512sig0h, x20, x12, x28, 0x7f000106, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x7f00020c), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(sha512sig0h, x21, x11, x27, 0x7f00020c, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x7f000418), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(sha512sig0h, x22, x10, x26, 0x7f000418, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x7f000830), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(sha512sig0h, x23, x9, x25, 0x7f000830, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x7f001060), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(sha512sig0h, x24, x8, x24, 0x7f001060, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x7f0020c0), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(sha512sig0h, x25, x7, x23, 0x7f0020c0, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x7f004180), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(sha512sig0h, x26, x6, x22, 0x7f004180, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x7f008300), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(sha512sig0h, x27, x5, x21, 0x7f008300, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x7f010600), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(sha512sig0h, x28, x4, x20, 0x7f010600, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x7f020c00), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(sha512sig0h, x29, x3, x19, 0x7f020c00, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x7f041800), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(sha512sig0h, x30, x2, x18, 0x7f041800, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x7f083000), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(sha512sig0h, x31, x1, x17, 0x7f083000, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x7f106000), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(sha512sig0h, x1, x31, x16, 0x7f106000, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x7f20c000), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(sha512sig0h, x2, x30, x15, 0x7f20c000, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x7f418000), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(sha512sig0h, x3, x29, x14, 0x7f418000, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x7f830000), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(sha512sig0h, x4, x28, x13, 0x7f830000, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0xfe060000), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(sha512sig0h, x5, x27, x12, 0xfe060000, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x3d0c0000), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(sha512sig0h, x6, x26, x11, 0x3d0c0000, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x5b180000), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(sha512sig0h, x7, x25, x10, 0x5b180000, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x67300000), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(sha512sig0h, x8, x24, x9, 0x67300000, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x67600000), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(sha512sig0h, x9, x23, x8, 0x67600000, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x5bc00000), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(sha512sig0h, x10, x22, x7, 0x5bc00000, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x3c800000), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(sha512sig0h, x11, x21, x6, 0x3c800000, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0xfe000000), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(sha512sig0h, x12, x20, x5, 0xfe000000, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x7effffff), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sig0h, x13, x19, x4, 0x7effffff, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x7efffffe), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(sha512sig0h, x14, x18, x3, 0x7efffffe, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x7efffffd), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(sha512sig0h, x15, x17, x2, 0x7efffffd, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x7efffffb), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(sha512sig0h, x16, x16, x1, 0x7efffffb, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x7efffff7), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(sha512sig0h, x17, x15, x31, 0x7efffff7, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x7effffef), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(sha512sig0h, x18, x14, x30, 0x7effffef, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x7effffdf), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(sha512sig0h, x19, x13, x29, 0x7effffdf, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x7effffbe), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(sha512sig0h, x20, x12, x28, 0x7effffbe, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x7effff7c), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(sha512sig0h, x21, x11, x27, 0x7effff7c, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x7efffef9), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(sha512sig0h, x22, x10, x26, 0x7efffef9, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x7efffdf3), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(sha512sig0h, x23, x9, x25, 0x7efffdf3, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x7efffbe7), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(sha512sig0h, x24, x8, x24, 0x7efffbe7, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x7efff7cf), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(sha512sig0h, x25, x7, x23, 0x7efff7cf, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x7effef9f), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(sha512sig0h, x26, x6, x22, 0x7effef9f, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x7effdf3f), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(sha512sig0h, x27, x5, x21, 0x7effdf3f, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x7effbe7f), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(sha512sig0h, x28, x4, x20, 0x7effbe7f, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x7eff7cff), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(sha512sig0h, x29, x3, x19, 0x7eff7cff, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x7efef9ff), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(sha512sig0h, x30, x2, x18, 0x7efef9ff, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x7efdf3ff), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(sha512sig0h, x31, x1, x17, 0x7efdf3ff, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x7efbe7ff), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(sha512sig0h, x1, x31, x16, 0x7efbe7ff, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x7ef7cfff), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(sha512sig0h, x2, x30, x15, 0x7ef7cfff, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x7eef9fff), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(sha512sig0h, x3, x29, x14, 0x7eef9fff, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x7edf3fff), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(sha512sig0h, x4, x28, x13, 0x7edf3fff, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x7ebe7fff), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(sha512sig0h, x5, x27, x12, 0x7ebe7fff, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x7e7cffff), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(sha512sig0h, x6, x26, x11, 0x7e7cffff, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfff9ffff), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(sha512sig0h, x7, x25, x10, 0xfff9ffff, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x3cf3ffff), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(sha512sig0h, x8, x24, x9, 0x3cf3ffff, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x5ae7ffff), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(sha512sig0h, x9, x23, x8, 0x5ae7ffff, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x66cfffff), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(sha512sig0h, x10, x22, x7, 0x66cfffff, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x669fffff), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(sha512sig0h, x11, x21, x6, 0x669fffff, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x5a3fffff), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(sha512sig0h, x12, x20, x5, 0x5a3fffff, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x3d7fffff), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(sha512sig0h, x13, x19, x4, 0x3d7fffff, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(sha512sig0h, x14, x18, x3, 0xffffffff, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sig0h, x15, x17, x2, 0x00000000, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000001), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sig0h, x16, x16, x1, 0x00000001, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000002), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sig0h, x17, x15, x31, 0x00000002, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000004), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sig0h, x18, x14, x30, 0x00000004, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000008), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(sha512sig0h, x19, x13, x29, 0x00000008, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000010), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(sha512sig0h, x20, x12, x28, 0x00000010, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000020), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(sha512sig0h, x21, x11, x27, 0x00000020, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000041), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(sha512sig0h, x22, x10, x26, 0x00000041, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000083), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(sha512sig0h, x23, x9, x25, 0x00000083, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000106), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(sha512sig0h, x24, x8, x24, 0x00000106, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x0000020c), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(sha512sig0h, x25, x7, x23, 0x0000020c, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000418), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(sha512sig0h, x26, x6, x22, 0x00000418, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000830), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(sha512sig0h, x27, x5, x21, 0x00000830, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00001060), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(sha512sig0h, x28, x4, x20, 0x00001060, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x000020c0), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(sha512sig0h, x29, x3, x19, 0x000020c0, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00004180), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(sha512sig0h, x30, x2, x18, 0x00004180, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00008300), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(sha512sig0h, x31, x1, x17, 0x00008300, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00010600), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(sha512sig0h, x1, x31, x16, 0x00010600, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00020c00), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(sha512sig0h, x2, x30, x15, 0x00020c00, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00041800), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(sha512sig0h, x3, x29, x14, 0x00041800, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00083000), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(sha512sig0h, x4, x28, x13, 0x00083000, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00106000), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(sha512sig0h, x5, x27, x12, 0x00106000, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x0020c000), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(sha512sig0h, x6, x26, x11, 0x0020c000, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00418000), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(sha512sig0h, x7, x25, x10, 0x00418000, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00830000), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(sha512sig0h, x8, x24, x9, 0x00830000, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x01060000), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(sha512sig0h, x9, x23, x8, 0x01060000, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x020c0000), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(sha512sig0h, x10, x22, x7, 0x020c0000, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x04180000), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(sha512sig0h, x11, x21, x6, 0x04180000, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x08300000), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(sha512sig0h, x12, x20, x5, 0x08300000, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x10600000), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sig0h, x13, x19, x4, 0x10600000, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x20c00000), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(sha512sig0h, x14, x18, x3, 0x20c00000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x41800000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sig0h, x15, x17, x2, 0x41800000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sig0h, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x7effffff), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sig0h, x17, x15, x31, 0x7effffff, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x7efffffe), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sig0h, x18, x14, x30, 0x7efffffe, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x7efffffd), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(sha512sig0h, x19, x13, x29, 0x7efffffd, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x7efffffb), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(sha512sig0h, x20, x12, x28, 0x7efffffb, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x7efffff7), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(sha512sig0h, x21, x11, x27, 0x7efffff7, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x7effffef), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(sha512sig0h, x22, x10, x26, 0x7effffef, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x7effffdf), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(sha512sig0h, x23, x9, x25, 0x7effffdf, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x7effffbe), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(sha512sig0h, x24, x8, x24, 0x7effffbe, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x7effff7c), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(sha512sig0h, x25, x7, x23, 0x7effff7c, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x7efffef9), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(sha512sig0h, x26, x6, x22, 0x7efffef9, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x7efffdf3), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(sha512sig0h, x27, x5, x21, 0x7efffdf3, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x7efffbe7), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(sha512sig0h, x28, x4, x20, 0x7efffbe7, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x7efff7cf), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(sha512sig0h, x29, x3, x19, 0x7efff7cf, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x7effef9f), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(sha512sig0h, x30, x2, x18, 0x7effef9f, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x7effdf3f), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(sha512sig0h, x31, x1, x17, 0x7effdf3f, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x7effbe7f), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(sha512sig0h, x1, x31, x16, 0x7effbe7f, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x7eff7cff), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(sha512sig0h, x2, x30, x15, 0x7eff7cff, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x7efef9ff), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(sha512sig0h, x3, x29, x14, 0x7efef9ff, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x7efdf3ff), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(sha512sig0h, x4, x28, x13, 0x7efdf3ff, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x7efbe7ff), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(sha512sig0h, x5, x27, x12, 0x7efbe7ff, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x7ef7cfff), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(sha512sig0h, x6, x26, x11, 0x7ef7cfff, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x7eef9fff), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(sha512sig0h, x7, x25, x10, 0x7eef9fff, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x7edf3fff), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(sha512sig0h, x8, x24, x9, 0x7edf3fff, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x7ebe7fff), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(sha512sig0h, x9, x23, x8, 0x7ebe7fff, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x7e7cffff), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(sha512sig0h, x10, x22, x7, 0x7e7cffff, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x7ff9ffff), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(sha512sig0h, x11, x21, x6, 0x7ff9ffff, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x7cf3ffff), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(sha512sig0h, x12, x20, x5, 0x7cf3ffff, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x7ae7ffff), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sig0h, x13, x19, x4, 0x7ae7ffff, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x76cfffff), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(sha512sig0h, x14, x18, x3, 0x76cfffff, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x6e9fffff), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sig0h, x15, x17, x2, 0x6e9fffff, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x5e3fffff), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sig0h, x16, x16, x1, 0x5e3fffff, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x3f7fffff), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sig0h, x17, x15, x31, 0x3f7fffff, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x7effffff), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sig0h, x18, x14, x30, 0x7effffff, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0xaa3bca45), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(sha512sig0h, x19, x29, x29, 0xaa3bca45, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(sha512sig0h, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x5589f6a4), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(sha512sig0h, x21, x11, x0, 0x5589f6a4, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x43000000), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(sha512sig0h, x22, x0, x26, 0x43000000, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SHA512SIG0L-01.S b/riscof/suite/rv32i_m/K_unratified/SHA512SIG0L-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..674467422597879ead534e9256464a723f051e21
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SHA512SIG0L-01.S
@@ -0,0 +1,1023 @@
+// RISC-V Architectural Validation Test SHA512SIG0L-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha512sig0l'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha512sig0l)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha512sig0l)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xb2031638), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(sha512sig0l, x1, x31, x16, 0xb2031638, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x0508dfa3), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(sha512sig0l, x2, x30, x15, 0x0508dfa3, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x1589f6a4), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(sha512sig0l, x3, x29, x14, 0x1589f6a4, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xe1bd9545), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(sha512sig0l, x4, x28, x13, 0xe1bd9545, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x52c48ed1), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(sha512sig0l, x5, x27, x12, 0x52c48ed1, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x78b29666), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(sha512sig0l, x6, x26, x11, 0x78b29666, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xacef51ed), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(sha512sig0l, x7, x25, x10, 0xacef51ed, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x75adf677), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(sha512sig0l, x8, x24, x9, 0x75adf677, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x90d20f1d), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(sha512sig0l, x9, x23, x8, 0x90d20f1d, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x363bca45), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(sha512sig0l, x10, x22, x7, 0x363bca45, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x81000000), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(sha512sig0l, x11, x21, x6, 0x81000000, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x81000001), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(sha512sig0l, x12, x20, x5, 0x81000001, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x81000002), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(sha512sig0l, x13, x19, x4, 0x81000002, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x81000004), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(sha512sig0l, x14, x18, x3, 0x81000004, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x81000008), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(sha512sig0l, x15, x17, x2, 0x81000008, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x81000010), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(sha512sig0l, x16, x16, x1, 0x81000010, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x81000020), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(sha512sig0l, x17, x15, x31, 0x81000020, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x81000041), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(sha512sig0l, x18, x14, x30, 0x81000041, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x81000083), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(sha512sig0l, x19, x13, x29, 0x81000083, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x81000106), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(sha512sig0l, x20, x12, x28, 0x81000106, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x8100020c), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(sha512sig0l, x21, x11, x27, 0x8100020c, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x81000418), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(sha512sig0l, x22, x10, x26, 0x81000418, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x81000830), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(sha512sig0l, x23, x9, x25, 0x81000830, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x81001060), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(sha512sig0l, x24, x8, x24, 0x81001060, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x810020c0), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(sha512sig0l, x25, x7, x23, 0x810020c0, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x81004180), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(sha512sig0l, x26, x6, x22, 0x81004180, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x81008300), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(sha512sig0l, x27, x5, x21, 0x81008300, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x81010600), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(sha512sig0l, x28, x4, x20, 0x81010600, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x81020c00), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(sha512sig0l, x29, x3, x19, 0x81020c00, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x81041800), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(sha512sig0l, x30, x2, x18, 0x81041800, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x81083000), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(sha512sig0l, x31, x1, x17, 0x81083000, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x81106000), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(sha512sig0l, x1, x31, x16, 0x81106000, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x8120c000), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(sha512sig0l, x2, x30, x15, 0x8120c000, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x81418000), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(sha512sig0l, x3, x29, x14, 0x81418000, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x81830000), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(sha512sig0l, x4, x28, x13, 0x81830000, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x00060000), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(sha512sig0l, x5, x27, x12, 0x00060000, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x430c0000), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(sha512sig0l, x6, x26, x11, 0x430c0000, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xe5180000), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(sha512sig0l, x7, x25, x10, 0xe5180000, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0xb9300000), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(sha512sig0l, x8, x24, x9, 0xb9300000, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x89600000), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(sha512sig0l, x9, x23, x8, 0x89600000, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0xadc00000), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(sha512sig0l, x10, x22, x7, 0xadc00000, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0xc6800000), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(sha512sig0l, x11, x21, x6, 0xc6800000, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x02000000), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(sha512sig0l, x12, x20, x5, 0x02000000, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x7effffff), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sig0l, x13, x19, x4, 0x7effffff, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x7efffffe), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(sha512sig0l, x14, x18, x3, 0x7efffffe, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x7efffffd), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(sha512sig0l, x15, x17, x2, 0x7efffffd, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x7efffffb), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(sha512sig0l, x16, x16, x1, 0x7efffffb, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x7efffff7), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(sha512sig0l, x17, x15, x31, 0x7efffff7, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x7effffef), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(sha512sig0l, x18, x14, x30, 0x7effffef, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x7effffdf), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(sha512sig0l, x19, x13, x29, 0x7effffdf, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x7effffbe), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(sha512sig0l, x20, x12, x28, 0x7effffbe, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x7effff7c), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(sha512sig0l, x21, x11, x27, 0x7effff7c, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x7efffef9), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(sha512sig0l, x22, x10, x26, 0x7efffef9, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x7efffdf3), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(sha512sig0l, x23, x9, x25, 0x7efffdf3, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x7efffbe7), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(sha512sig0l, x24, x8, x24, 0x7efffbe7, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x7efff7cf), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(sha512sig0l, x25, x7, x23, 0x7efff7cf, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x7effef9f), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(sha512sig0l, x26, x6, x22, 0x7effef9f, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x7effdf3f), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(sha512sig0l, x27, x5, x21, 0x7effdf3f, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x7effbe7f), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(sha512sig0l, x28, x4, x20, 0x7effbe7f, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x7eff7cff), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(sha512sig0l, x29, x3, x19, 0x7eff7cff, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x7efef9ff), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(sha512sig0l, x30, x2, x18, 0x7efef9ff, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x7efdf3ff), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(sha512sig0l, x31, x1, x17, 0x7efdf3ff, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x7efbe7ff), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(sha512sig0l, x1, x31, x16, 0x7efbe7ff, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x7ef7cfff), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(sha512sig0l, x2, x30, x15, 0x7ef7cfff, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x7eef9fff), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(sha512sig0l, x3, x29, x14, 0x7eef9fff, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x7edf3fff), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(sha512sig0l, x4, x28, x13, 0x7edf3fff, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x7ebe7fff), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(sha512sig0l, x5, x27, x12, 0x7ebe7fff, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x7e7cffff), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(sha512sig0l, x6, x26, x11, 0x7e7cffff, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfff9ffff), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(sha512sig0l, x7, x25, x10, 0xfff9ffff, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xbcf3ffff), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(sha512sig0l, x8, x24, x9, 0xbcf3ffff, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x1ae7ffff), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(sha512sig0l, x9, x23, x8, 0x1ae7ffff, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x46cfffff), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(sha512sig0l, x10, x22, x7, 0x46cfffff, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x769fffff), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(sha512sig0l, x11, x21, x6, 0x769fffff, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x523fffff), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(sha512sig0l, x12, x20, x5, 0x523fffff, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x397fffff), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(sha512sig0l, x13, x19, x4, 0x397fffff, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfdffffff), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(sha512sig0l, x14, x18, x3, 0xfdffffff, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sig0l, x15, x17, x2, 0x00000000, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000001), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sig0l, x16, x16, x1, 0x00000001, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000002), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sig0l, x17, x15, x31, 0x00000002, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000004), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sig0l, x18, x14, x30, 0x00000004, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000008), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(sha512sig0l, x19, x13, x29, 0x00000008, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000010), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(sha512sig0l, x20, x12, x28, 0x00000010, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000020), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(sha512sig0l, x21, x11, x27, 0x00000020, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000041), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(sha512sig0l, x22, x10, x26, 0x00000041, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000083), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(sha512sig0l, x23, x9, x25, 0x00000083, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000106), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(sha512sig0l, x24, x8, x24, 0x00000106, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x0000020c), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(sha512sig0l, x25, x7, x23, 0x0000020c, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000418), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(sha512sig0l, x26, x6, x22, 0x00000418, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000830), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(sha512sig0l, x27, x5, x21, 0x00000830, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00001060), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(sha512sig0l, x28, x4, x20, 0x00001060, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x000020c0), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(sha512sig0l, x29, x3, x19, 0x000020c0, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00004180), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(sha512sig0l, x30, x2, x18, 0x00004180, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00008300), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(sha512sig0l, x31, x1, x17, 0x00008300, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00010600), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(sha512sig0l, x1, x31, x16, 0x00010600, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00020c00), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(sha512sig0l, x2, x30, x15, 0x00020c00, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00041800), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(sha512sig0l, x3, x29, x14, 0x00041800, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00083000), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(sha512sig0l, x4, x28, x13, 0x00083000, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00106000), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(sha512sig0l, x5, x27, x12, 0x00106000, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x0020c000), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(sha512sig0l, x6, x26, x11, 0x0020c000, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00418000), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(sha512sig0l, x7, x25, x10, 0x00418000, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00830000), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(sha512sig0l, x8, x24, x9, 0x00830000, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x01060000), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(sha512sig0l, x9, x23, x8, 0x01060000, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x020c0000), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(sha512sig0l, x10, x22, x7, 0x020c0000, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x04180000), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(sha512sig0l, x11, x21, x6, 0x04180000, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x08300000), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(sha512sig0l, x12, x20, x5, 0x08300000, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x10600000), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sig0l, x13, x19, x4, 0x10600000, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x20c00000), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(sha512sig0l, x14, x18, x3, 0x20c00000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x41800000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sig0l, x15, x17, x2, 0x41800000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sig0l, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x7effffff), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sig0l, x17, x15, x31, 0x7effffff, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x7efffffe), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sig0l, x18, x14, x30, 0x7efffffe, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x7efffffd), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(sha512sig0l, x19, x13, x29, 0x7efffffd, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x7efffffb), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(sha512sig0l, x20, x12, x28, 0x7efffffb, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x7efffff7), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(sha512sig0l, x21, x11, x27, 0x7efffff7, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x7effffef), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(sha512sig0l, x22, x10, x26, 0x7effffef, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x7effffdf), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(sha512sig0l, x23, x9, x25, 0x7effffdf, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x7effffbe), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(sha512sig0l, x24, x8, x24, 0x7effffbe, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x7effff7c), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(sha512sig0l, x25, x7, x23, 0x7effff7c, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x7efffef9), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(sha512sig0l, x26, x6, x22, 0x7efffef9, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x7efffdf3), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(sha512sig0l, x27, x5, x21, 0x7efffdf3, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x7efffbe7), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(sha512sig0l, x28, x4, x20, 0x7efffbe7, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x7efff7cf), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(sha512sig0l, x29, x3, x19, 0x7efff7cf, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x7effef9f), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(sha512sig0l, x30, x2, x18, 0x7effef9f, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x7effdf3f), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(sha512sig0l, x31, x1, x17, 0x7effdf3f, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x7effbe7f), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(sha512sig0l, x1, x31, x16, 0x7effbe7f, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x7eff7cff), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(sha512sig0l, x2, x30, x15, 0x7eff7cff, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x7efef9ff), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(sha512sig0l, x3, x29, x14, 0x7efef9ff, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x7efdf3ff), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(sha512sig0l, x4, x28, x13, 0x7efdf3ff, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x7efbe7ff), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(sha512sig0l, x5, x27, x12, 0x7efbe7ff, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x7ef7cfff), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(sha512sig0l, x6, x26, x11, 0x7ef7cfff, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x7eef9fff), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(sha512sig0l, x7, x25, x10, 0x7eef9fff, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x7edf3fff), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(sha512sig0l, x8, x24, x9, 0x7edf3fff, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x7ebe7fff), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(sha512sig0l, x9, x23, x8, 0x7ebe7fff, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x7e7cffff), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(sha512sig0l, x10, x22, x7, 0x7e7cffff, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x7ff9ffff), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(sha512sig0l, x11, x21, x6, 0x7ff9ffff, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x7cf3ffff), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(sha512sig0l, x12, x20, x5, 0x7cf3ffff, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x7ae7ffff), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sig0l, x13, x19, x4, 0x7ae7ffff, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x76cfffff), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(sha512sig0l, x14, x18, x3, 0x76cfffff, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x6e9fffff), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sig0l, x15, x17, x2, 0x6e9fffff, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x5e3fffff), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sig0l, x16, x16, x1, 0x5e3fffff, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x3f7fffff), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sig0l, x17, x15, x31, 0x3f7fffff, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x7effffff), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sig0l, x18, x14, x30, 0x7effffff, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0xec3bca45), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(sha512sig0l, x19, x29, x29, 0xec3bca45, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(sha512sig0l, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x5589f6a4), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(sha512sig0l, x21, x11, x0, 0x5589f6a4, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0xc5000000), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(sha512sig0l, x22, x0, x26, 0xc5000000, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SHA512SIG1H-01.S b/riscof/suite/rv32i_m/K_unratified/SHA512SIG1H-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..c5ec229dc34788bf1ca0019c0858e0bf31ca5c9e
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SHA512SIG1H-01.S
@@ -0,0 +1,1023 @@
+// RISC-V Architectural Validation Test SHA512SIG1H-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha512sig1h'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha512sig1h)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha512sig1h)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x14615053), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(sha512sig1h, x1, x31, x16, 0x14615053, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x36bd72a9), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(sha512sig1h, x2, x30, x15, 0x36bd72a9, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x1bf6d665), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(sha512sig1h, x3, x29, x14, 0x1bf6d665, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x3817b139), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(sha512sig1h, x4, x28, x13, 0x3817b139, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x73e70ff0), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(sha512sig1h, x5, x27, x12, 0x73e70ff0, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x3f534769), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(sha512sig1h, x6, x26, x11, 0x3f534769, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x3ca0cdc6), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(sha512sig1h, x7, x25, x10, 0x3ca0cdc6, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xb70113c1), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(sha512sig1h, x8, x24, x9, 0xb70113c1, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xd6a14210), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(sha512sig1h, x9, x23, x8, 0xd6a14210, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xdaa4ac6e), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(sha512sig1h, x10, x22, x7, 0xdaa4ac6e, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0xffffe00f), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(sha512sig1h, x11, x21, x6, 0xffffe00f, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0xffffe013), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(sha512sig1h, x12, x20, x5, 0xffffe013, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0xffffe025), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(sha512sig1h, x13, x19, x4, 0xffffe025, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0xffffe046), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(sha512sig1h, x14, x18, x3, 0xffffe046, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0xffffe087), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(sha512sig1h, x15, x17, x2, 0xffffe087, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0xffffe107), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(sha512sig1h, x16, x16, x1, 0xffffe107, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0xffffe206), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(sha512sig1h, x17, x15, x31, 0xffffe206, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xffffe405), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(sha512sig1h, x18, x14, x30, 0xffffe405, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0xffffe803), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(sha512sig1h, x19, x13, x29, 0xffffe803, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0xfffff00f), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(sha512sig1h, x20, x12, x28, 0xfffff00f, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0xffffc017), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(sha512sig1h, x21, x11, x27, 0xffffc017, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0xffffa027), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(sha512sig1h, x22, x10, x26, 0xffffa027, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0xffff6047), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(sha512sig1h, x23, x9, x25, 0xffff6047, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0xfffee087), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(sha512sig1h, x24, x8, x24, 0xfffee087, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x7ffde107), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(sha512sig1h, x25, x7, x23, 0x7ffde107, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0xbffbe207), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(sha512sig1h, x26, x6, x22, 0xbffbe207, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0xdff7e407), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(sha512sig1h, x27, x5, x21, 0xdff7e407, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0xefefe807), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(sha512sig1h, x28, x4, x20, 0xefefe807, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0xf7dff007), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(sha512sig1h, x29, x3, x19, 0xf7dff007, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0xfbbfc006), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(sha512sig1h, x30, x2, x18, 0xfbbfc006, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0xfd7fa005), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(sha512sig1h, x31, x1, x17, 0xfd7fa005, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0xffff6003), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(sha512sig1h, x1, x31, x16, 0xffff6003, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0xfd7ee00f), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(sha512sig1h, x2, x30, x15, 0xfd7ee00f, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0xfbbde017), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(sha512sig1h, x3, x29, x14, 0xfbbde017, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0xf7dbe027), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(sha512sig1h, x4, x28, x13, 0xf7dbe027, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0xefe7e047), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(sha512sig1h, x5, x27, x12, 0xefe7e047, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0xdfe7e087), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(sha512sig1h, x6, x26, x11, 0xdfe7e087, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xbfdbe107), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(sha512sig1h, x7, x25, x10, 0xbfdbe107, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x7fbde207), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(sha512sig1h, x8, x24, x9, 0x7fbde207, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0xff7ee407), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(sha512sig1h, x9, x23, x8, 0xff7ee407, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0xfeff6807), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(sha512sig1h, x10, x22, x7, 0xfeff6807, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0xfdffb007), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(sha512sig1h, x11, x21, x6, 0xfdffb007, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0xffffc007), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(sha512sig1h, x12, x20, x5, 0xffffc007, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xfc001ff0), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sig1h, x13, x19, x4, 0xfc001ff0, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xfc001fec), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(sha512sig1h, x14, x18, x3, 0xfc001fec, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xfc001fda), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(sha512sig1h, x15, x17, x2, 0xfc001fda, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xfc001fb9), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(sha512sig1h, x16, x16, x1, 0xfc001fb9, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xfc001f78), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(sha512sig1h, x17, x15, x31, 0xfc001f78, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xfc001ef8), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(sha512sig1h, x18, x14, x30, 0xfc001ef8, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xfc001df9), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(sha512sig1h, x19, x13, x29, 0xfc001df9, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xfc001bfa), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(sha512sig1h, x20, x12, x28, 0xfc001bfa, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xfc0017fc), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(sha512sig1h, x21, x11, x27, 0xfc0017fc, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xfc000ff0), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(sha512sig1h, x22, x10, x26, 0xfc000ff0, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xfc003fe8), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(sha512sig1h, x23, x9, x25, 0xfc003fe8, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xfc005fd8), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(sha512sig1h, x24, x8, x24, 0xfc005fd8, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xfc009fb8), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(sha512sig1h, x25, x7, x23, 0xfc009fb8, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xfc011f78), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(sha512sig1h, x26, x6, x22, 0xfc011f78, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x7c021ef8), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(sha512sig1h, x27, x5, x21, 0x7c021ef8, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xbc041df8), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(sha512sig1h, x28, x4, x20, 0xbc041df8, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xdc081bf8), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(sha512sig1h, x29, x3, x19, 0xdc081bf8, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xec1017f8), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(sha512sig1h, x30, x2, x18, 0xec1017f8, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xf4200ff8), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(sha512sig1h, x31, x1, x17, 0xf4200ff8, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xf8403ff9), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(sha512sig1h, x1, x31, x16, 0xf8403ff9, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xfe805ffa), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(sha512sig1h, x2, x30, x15, 0xfe805ffa, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xfc009ffc), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(sha512sig1h, x3, x29, x14, 0xfc009ffc, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xfe811ff0), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(sha512sig1h, x4, x28, x13, 0xfe811ff0, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xf8421fe8), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(sha512sig1h, x5, x27, x12, 0xf8421fe8, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xf4241fd8), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(sha512sig1h, x6, x26, x11, 0xf4241fd8, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xec181fb8), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(sha512sig1h, x7, x25, x10, 0xec181fb8, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xdc181f78), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(sha512sig1h, x8, x24, x9, 0xdc181f78, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xbc241ef8), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(sha512sig1h, x9, x23, x8, 0xbc241ef8, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x7c421df8), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(sha512sig1h, x10, x22, x7, 0x7c421df8, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xfc811bf8), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(sha512sig1h, x11, x21, x6, 0xfc811bf8, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xfd0097f8), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(sha512sig1h, x12, x20, x5, 0xfd0097f8, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xfe004ff8), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(sha512sig1h, x13, x19, x4, 0xfe004ff8, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfc003ff8), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(sha512sig1h, x14, x18, x3, 0xfc003ff8, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000008), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sig1h, x15, x17, x2, 0x00000008, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000010), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sig1h, x16, x16, x1, 0x00000010, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000020), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sig1h, x17, x15, x31, 0x00000020, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000040), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sig1h, x18, x14, x30, 0x00000040, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000080), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(sha512sig1h, x19, x13, x29, 0x00000080, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000100), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(sha512sig1h, x20, x12, x28, 0x00000100, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000201), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(sha512sig1h, x21, x11, x27, 0x00000201, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000402), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(sha512sig1h, x22, x10, x26, 0x00000402, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000804), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(sha512sig1h, x23, x9, x25, 0x00000804, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00001008), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(sha512sig1h, x24, x8, x24, 0x00001008, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00002010), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(sha512sig1h, x25, x7, x23, 0x00002010, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00004020), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(sha512sig1h, x26, x6, x22, 0x00004020, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00008040), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(sha512sig1h, x27, x5, x21, 0x00008040, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00010080), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(sha512sig1h, x28, x4, x20, 0x00010080, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00020100), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(sha512sig1h, x29, x3, x19, 0x00020100, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00040200), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(sha512sig1h, x30, x2, x18, 0x00040200, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00080400), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(sha512sig1h, x31, x1, x17, 0x00080400, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00100800), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(sha512sig1h, x1, x31, x16, 0x00100800, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00201000), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(sha512sig1h, x2, x30, x15, 0x00201000, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00402001), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(sha512sig1h, x3, x29, x14, 0x00402001, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00804002), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(sha512sig1h, x4, x28, x13, 0x00804002, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x01008004), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(sha512sig1h, x5, x27, x12, 0x01008004, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x02010008), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(sha512sig1h, x6, x26, x11, 0x02010008, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x04020010), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(sha512sig1h, x7, x25, x10, 0x04020010, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x08040020), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(sha512sig1h, x8, x24, x9, 0x08040020, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x10080040), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(sha512sig1h, x9, x23, x8, 0x10080040, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x20100080), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(sha512sig1h, x10, x22, x7, 0x20100080, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x40200100), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(sha512sig1h, x11, x21, x6, 0x40200100, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x80400200), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(sha512sig1h, x12, x20, x5, 0x80400200, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00800400), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sig1h, x13, x19, x4, 0x00800400, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x01000800), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(sha512sig1h, x14, x18, x3, 0x01000800, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x02001000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sig1h, x15, x17, x2, 0x02001000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sig1h, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfc001ff0), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sig1h, x17, x15, x31, 0xfc001ff0, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfc001fe8), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sig1h, x18, x14, x30, 0xfc001fe8, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfc001fd8), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(sha512sig1h, x19, x13, x29, 0xfc001fd8, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xfc001fb8), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(sha512sig1h, x20, x12, x28, 0xfc001fb8, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xfc001f78), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(sha512sig1h, x21, x11, x27, 0xfc001f78, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xfc001ef8), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(sha512sig1h, x22, x10, x26, 0xfc001ef8, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xfc001df9), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(sha512sig1h, x23, x9, x25, 0xfc001df9, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xfc001bfa), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(sha512sig1h, x24, x8, x24, 0xfc001bfa, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfc0017fc), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(sha512sig1h, x25, x7, x23, 0xfc0017fc, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfc000ff0), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(sha512sig1h, x26, x6, x22, 0xfc000ff0, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xfc003fe8), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(sha512sig1h, x27, x5, x21, 0xfc003fe8, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfc005fd8), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(sha512sig1h, x28, x4, x20, 0xfc005fd8, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xfc009fb8), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(sha512sig1h, x29, x3, x19, 0xfc009fb8, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xfc011f78), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(sha512sig1h, x30, x2, x18, 0xfc011f78, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xfc021ef8), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(sha512sig1h, x31, x1, x17, 0xfc021ef8, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xfc041df8), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(sha512sig1h, x1, x31, x16, 0xfc041df8, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfc081bf8), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(sha512sig1h, x2, x30, x15, 0xfc081bf8, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfc1017f8), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(sha512sig1h, x3, x29, x14, 0xfc1017f8, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfc200ff8), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(sha512sig1h, x4, x28, x13, 0xfc200ff8, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfc403ff9), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(sha512sig1h, x5, x27, x12, 0xfc403ff9, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xfc805ffa), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(sha512sig1h, x6, x26, x11, 0xfc805ffa, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xfd009ffc), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(sha512sig1h, x7, x25, x10, 0xfd009ffc, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xfe011ff0), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(sha512sig1h, x8, x24, x9, 0xfe011ff0, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xf8021fe8), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(sha512sig1h, x9, x23, x8, 0xf8021fe8, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xf4041fd8), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(sha512sig1h, x10, x22, x7, 0xf4041fd8, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xec081fb8), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(sha512sig1h, x11, x21, x6, 0xec081fb8, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xdc101f78), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(sha512sig1h, x12, x20, x5, 0xdc101f78, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xbc201ef8), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sig1h, x13, x19, x4, 0xbc201ef8, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x7c401df8), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(sha512sig1h, x14, x18, x3, 0x7c401df8, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xfc801bf8), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sig1h, x15, x17, x2, 0xfc801bf8, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xfd0017f8), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sig1h, x16, x16, x1, 0xfd0017f8, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xfe000ff8), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sig1h, x17, x15, x31, 0xfe000ff8, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xfc001ff8), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sig1h, x18, x14, x30, 0xfc001ff8, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0xe9126c6b), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(sha512sig1h, x19, x29, x29, 0xe9126c6b, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(sha512sig1h, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x45aed666), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(sha512sig1h, x21, x11, x0, 0x45aed666, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x7f786007), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(sha512sig1h, x22, x0, x26, 0x7f786007, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SHA512SIG1L-01.S b/riscof/suite/rv32i_m/K_unratified/SHA512SIG1L-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..bf851f03e590a27bd56a7cc5b6ba33e502dfa5f2
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SHA512SIG1L-01.S
@@ -0,0 +1,1023 @@
+// RISC-V Architectural Validation Test SHA512SIG1L-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha512sig1l'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha512sig1l)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha512sig1l)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x98615053), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(sha512sig1l, x1, x31, x16, 0x98615053, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x5abd72a9), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(sha512sig1l, x2, x30, x15, 0x5abd72a9, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x1bf6d665), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(sha512sig1l, x3, x29, x14, 0x1bf6d665, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x3417b139), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(sha512sig1l, x4, x28, x13, 0x3417b139, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xcfe70ff0), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(sha512sig1l, x5, x27, x12, 0xcfe70ff0, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x03534769), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(sha512sig1l, x6, x26, x11, 0x03534769, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x10a0cdc6), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(sha512sig1l, x7, x25, x10, 0x10a0cdc6, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x5b0113c1), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(sha512sig1l, x8, x24, x9, 0x5b0113c1, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xd2a14210), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(sha512sig1l, x9, x23, x8, 0xd2a14210, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x8ea4ac6e), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(sha512sig1l, x10, x22, x7, 0x8ea4ac6e, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x03ffe00f), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(sha512sig1l, x11, x21, x6, 0x03ffe00f, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x03ffe013), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(sha512sig1l, x12, x20, x5, 0x03ffe013, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x03ffe025), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(sha512sig1l, x13, x19, x4, 0x03ffe025, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x03ffe046), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(sha512sig1l, x14, x18, x3, 0x03ffe046, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x03ffe087), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(sha512sig1l, x15, x17, x2, 0x03ffe087, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x03ffe107), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(sha512sig1l, x16, x16, x1, 0x03ffe107, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x03ffe206), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(sha512sig1l, x17, x15, x31, 0x03ffe206, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x03ffe405), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(sha512sig1l, x18, x14, x30, 0x03ffe405, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x03ffe803), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(sha512sig1l, x19, x13, x29, 0x03ffe803, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x03fff00f), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(sha512sig1l, x20, x12, x28, 0x03fff00f, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x03ffc017), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(sha512sig1l, x21, x11, x27, 0x03ffc017, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x03ffa027), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(sha512sig1l, x22, x10, x26, 0x03ffa027, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x03ff6047), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(sha512sig1l, x23, x9, x25, 0x03ff6047, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x03fee087), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(sha512sig1l, x24, x8, x24, 0x03fee087, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x83fde107), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(sha512sig1l, x25, x7, x23, 0x83fde107, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x43fbe207), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(sha512sig1l, x26, x6, x22, 0x43fbe207, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x23f7e407), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(sha512sig1l, x27, x5, x21, 0x23f7e407, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x13efe807), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(sha512sig1l, x28, x4, x20, 0x13efe807, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0bdff007), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(sha512sig1l, x29, x3, x19, 0x0bdff007, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x07bfc006), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(sha512sig1l, x30, x2, x18, 0x07bfc006, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x017fa005), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(sha512sig1l, x31, x1, x17, 0x017fa005, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x03ff6003), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(sha512sig1l, x1, x31, x16, 0x03ff6003, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x017ee00f), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(sha512sig1l, x2, x30, x15, 0x017ee00f, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x07bde017), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(sha512sig1l, x3, x29, x14, 0x07bde017, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0bdbe027), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(sha512sig1l, x4, x28, x13, 0x0bdbe027, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x13e7e047), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(sha512sig1l, x5, x27, x12, 0x13e7e047, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x23e7e087), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(sha512sig1l, x6, x26, x11, 0x23e7e087, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xc3dbe107), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(sha512sig1l, x7, x25, x10, 0xc3dbe107, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0xc3bde207), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(sha512sig1l, x8, x24, x9, 0xc3bde207, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x237ee407), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(sha512sig1l, x9, x23, x8, 0x237ee407, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x12ff6807), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(sha512sig1l, x10, x22, x7, 0x12ff6807, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x09ffb007), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(sha512sig1l, x11, x21, x6, 0x09ffb007, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x07ffc007), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(sha512sig1l, x12, x20, x5, 0x07ffc007, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xfc001ff0), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sig1l, x13, x19, x4, 0xfc001ff0, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xfc001fec), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(sha512sig1l, x14, x18, x3, 0xfc001fec, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xfc001fda), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(sha512sig1l, x15, x17, x2, 0xfc001fda, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xfc001fb9), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(sha512sig1l, x16, x16, x1, 0xfc001fb9, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xfc001f78), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(sha512sig1l, x17, x15, x31, 0xfc001f78, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xfc001ef8), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(sha512sig1l, x18, x14, x30, 0xfc001ef8, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xfc001df9), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(sha512sig1l, x19, x13, x29, 0xfc001df9, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xfc001bfa), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(sha512sig1l, x20, x12, x28, 0xfc001bfa, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xfc0017fc), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(sha512sig1l, x21, x11, x27, 0xfc0017fc, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xfc000ff0), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(sha512sig1l, x22, x10, x26, 0xfc000ff0, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xfc003fe8), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(sha512sig1l, x23, x9, x25, 0xfc003fe8, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xfc005fd8), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(sha512sig1l, x24, x8, x24, 0xfc005fd8, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xfc009fb8), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(sha512sig1l, x25, x7, x23, 0xfc009fb8, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xfc011f78), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(sha512sig1l, x26, x6, x22, 0xfc011f78, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x7c021ef8), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(sha512sig1l, x27, x5, x21, 0x7c021ef8, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xbc041df8), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(sha512sig1l, x28, x4, x20, 0xbc041df8, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xdc081bf8), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(sha512sig1l, x29, x3, x19, 0xdc081bf8, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xec1017f8), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(sha512sig1l, x30, x2, x18, 0xec1017f8, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xf4200ff8), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(sha512sig1l, x31, x1, x17, 0xf4200ff8, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xf8403ff9), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(sha512sig1l, x1, x31, x16, 0xf8403ff9, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xfe805ffa), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(sha512sig1l, x2, x30, x15, 0xfe805ffa, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xfc009ffc), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(sha512sig1l, x3, x29, x14, 0xfc009ffc, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xfe811ff0), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(sha512sig1l, x4, x28, x13, 0xfe811ff0, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xf8421fe8), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(sha512sig1l, x5, x27, x12, 0xf8421fe8, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xf4241fd8), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(sha512sig1l, x6, x26, x11, 0xf4241fd8, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xec181fb8), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(sha512sig1l, x7, x25, x10, 0xec181fb8, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xdc181f78), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(sha512sig1l, x8, x24, x9, 0xdc181f78, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x3c241ef8), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(sha512sig1l, x9, x23, x8, 0x3c241ef8, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x3c421df8), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(sha512sig1l, x10, x22, x7, 0x3c421df8, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xdc811bf8), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(sha512sig1l, x11, x21, x6, 0xdc811bf8, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xed0097f8), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(sha512sig1l, x12, x20, x5, 0xed0097f8, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xf6004ff8), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(sha512sig1l, x13, x19, x4, 0xf6004ff8, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xf8003ff8), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(sha512sig1l, x14, x18, x3, 0xf8003ff8, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000008), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sig1l, x15, x17, x2, 0x00000008, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000010), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sig1l, x16, x16, x1, 0x00000010, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000020), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sig1l, x17, x15, x31, 0x00000020, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000040), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sig1l, x18, x14, x30, 0x00000040, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000080), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(sha512sig1l, x19, x13, x29, 0x00000080, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000100), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(sha512sig1l, x20, x12, x28, 0x00000100, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000201), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(sha512sig1l, x21, x11, x27, 0x00000201, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000402), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(sha512sig1l, x22, x10, x26, 0x00000402, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000804), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(sha512sig1l, x23, x9, x25, 0x00000804, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00001008), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(sha512sig1l, x24, x8, x24, 0x00001008, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00002010), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(sha512sig1l, x25, x7, x23, 0x00002010, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00004020), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(sha512sig1l, x26, x6, x22, 0x00004020, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00008040), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(sha512sig1l, x27, x5, x21, 0x00008040, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00010080), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(sha512sig1l, x28, x4, x20, 0x00010080, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00020100), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(sha512sig1l, x29, x3, x19, 0x00020100, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00040200), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(sha512sig1l, x30, x2, x18, 0x00040200, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00080400), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(sha512sig1l, x31, x1, x17, 0x00080400, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00100800), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(sha512sig1l, x1, x31, x16, 0x00100800, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00201000), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(sha512sig1l, x2, x30, x15, 0x00201000, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00402001), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(sha512sig1l, x3, x29, x14, 0x00402001, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00804002), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(sha512sig1l, x4, x28, x13, 0x00804002, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x01008004), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(sha512sig1l, x5, x27, x12, 0x01008004, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x02010008), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(sha512sig1l, x6, x26, x11, 0x02010008, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x04020010), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(sha512sig1l, x7, x25, x10, 0x04020010, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x08040020), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(sha512sig1l, x8, x24, x9, 0x08040020, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x10080040), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(sha512sig1l, x9, x23, x8, 0x10080040, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x20100080), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(sha512sig1l, x10, x22, x7, 0x20100080, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x40200100), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(sha512sig1l, x11, x21, x6, 0x40200100, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x80400200), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(sha512sig1l, x12, x20, x5, 0x80400200, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00800400), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sig1l, x13, x19, x4, 0x00800400, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x01000800), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(sha512sig1l, x14, x18, x3, 0x01000800, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x02001000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sig1l, x15, x17, x2, 0x02001000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sig1l, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfc001ff0), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sig1l, x17, x15, x31, 0xfc001ff0, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfc001fe8), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sig1l, x18, x14, x30, 0xfc001fe8, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfc001fd8), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(sha512sig1l, x19, x13, x29, 0xfc001fd8, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xfc001fb8), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(sha512sig1l, x20, x12, x28, 0xfc001fb8, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xfc001f78), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(sha512sig1l, x21, x11, x27, 0xfc001f78, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xfc001ef8), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(sha512sig1l, x22, x10, x26, 0xfc001ef8, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xfc001df9), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(sha512sig1l, x23, x9, x25, 0xfc001df9, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xfc001bfa), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(sha512sig1l, x24, x8, x24, 0xfc001bfa, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfc0017fc), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(sha512sig1l, x25, x7, x23, 0xfc0017fc, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfc000ff0), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(sha512sig1l, x26, x6, x22, 0xfc000ff0, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xfc003fe8), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(sha512sig1l, x27, x5, x21, 0xfc003fe8, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfc005fd8), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(sha512sig1l, x28, x4, x20, 0xfc005fd8, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xfc009fb8), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(sha512sig1l, x29, x3, x19, 0xfc009fb8, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xfc011f78), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(sha512sig1l, x30, x2, x18, 0xfc011f78, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xfc021ef8), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(sha512sig1l, x31, x1, x17, 0xfc021ef8, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xfc041df8), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(sha512sig1l, x1, x31, x16, 0xfc041df8, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfc081bf8), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(sha512sig1l, x2, x30, x15, 0xfc081bf8, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfc1017f8), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(sha512sig1l, x3, x29, x14, 0xfc1017f8, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfc200ff8), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(sha512sig1l, x4, x28, x13, 0xfc200ff8, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfc403ff9), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(sha512sig1l, x5, x27, x12, 0xfc403ff9, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xfc805ffa), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(sha512sig1l, x6, x26, x11, 0xfc805ffa, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xfd009ffc), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(sha512sig1l, x7, x25, x10, 0xfd009ffc, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xfe011ff0), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(sha512sig1l, x8, x24, x9, 0xfe011ff0, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xf8021fe8), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(sha512sig1l, x9, x23, x8, 0xf8021fe8, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xf4041fd8), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(sha512sig1l, x10, x22, x7, 0xf4041fd8, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xec081fb8), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(sha512sig1l, x11, x21, x6, 0xec081fb8, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xdc101f78), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(sha512sig1l, x12, x20, x5, 0xdc101f78, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xbc201ef8), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sig1l, x13, x19, x4, 0xbc201ef8, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x7c401df8), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(sha512sig1l, x14, x18, x3, 0x7c401df8, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xfc801bf8), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sig1l, x15, x17, x2, 0xfc801bf8, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xfd0017f8), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sig1l, x16, x16, x1, 0xfd0017f8, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xfe000ff8), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sig1l, x17, x15, x31, 0xfe000ff8, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xfc001ff8), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sig1l, x18, x14, x30, 0xfc001ff8, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0x65126c6b), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(sha512sig1l, x19, x29, x29, 0x65126c6b, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(sha512sig1l, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x45aed666), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(sha512sig1l, x21, x11, x0, 0x45aed666, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x73786007), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(sha512sig1l, x22, x0, x26, 0x73786007, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SHA512SUM0R-01.S b/riscof/suite/rv32i_m/K_unratified/SHA512SUM0R-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..6df928d92255079379bcdf07b3658419817e0d1f
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SHA512SUM0R-01.S
@@ -0,0 +1,1023 @@
+// RISC-V Architectural Validation Test SHA512SUM0R-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha512sum0r'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha512sum0r)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha512sum0r)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x4f1e06aa), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(sha512sum0r, x1, x31, x16, 0x4f1e06aa, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xad86bb8b), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(sha512sum0r, x2, x30, x15, 0xad86bb8b, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xad51655f), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(sha512sum0r, x3, x29, x14, 0xad51655f, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x761a7533), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(sha512sum0r, x4, x28, x13, 0x761a7533, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x62a69afe), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(sha512sum0r, x5, x27, x12, 0x62a69afe, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xeede4ac2), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(sha512sum0r, x6, x26, x11, 0xeede4ac2, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xd83a0873), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(sha512sum0r, x7, x25, x10, 0xd83a0873, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x257322c8), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(sha512sum0r, x8, x24, x9, 0x257322c8, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x6ce1fcd7), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(sha512sum0r, x9, x23, x8, 0x6ce1fcd7, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x72845997), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(sha512sum0r, x10, x22, x7, 0x72845997, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x83fffff0), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(sha512sum0r, x11, x21, x6, 0x83fffff0, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x64fffff0), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(sha512sum0r, x12, x20, x5, 0x64fffff0, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0xd97ffff0), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(sha512sum0r, x13, x19, x4, 0xd97ffff0, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0xd9bffff0), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(sha512sum0r, x14, x18, x3, 0xd9bffff0, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0xe5dffff0), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(sha512sum0r, x15, x17, x2, 0xe5dffff0, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x03effff0), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(sha512sum0r, x16, x16, x1, 0x03effff0, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x00f7fff0), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(sha512sum0r, x17, x15, x31, 0x00f7fff0, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xe17bfff0), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(sha512sum0r, x18, x14, x30, 0xe17bfff0, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0xd1bdfff0), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(sha512sum0r, x19, x13, x29, 0xd1bdfff0, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0xc9defff0), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(sha512sum0r, x20, x12, x28, 0xc9defff0, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0xc5ef7ff0), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(sha512sum0r, x21, x11, x27, 0xc5ef7ff0, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0xc3f7bff0), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(sha512sum0r, x22, x10, x26, 0xc3f7bff0, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0xc0fbdff0), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(sha512sum0r, x23, x9, x25, 0xc0fbdff0, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0xc17deff0), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(sha512sum0r, x24, x8, x24, 0xc17deff0, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0xc1bef7f0), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(sha512sum0r, x25, x7, x23, 0xc1bef7f0, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0xc1df7bf0), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(sha512sum0r, x26, x6, x22, 0xc1df7bf0, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0xc1efbdf0), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(sha512sum0r, x27, x5, x21, 0xc1efbdf0, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0xc1f7def0), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(sha512sum0r, x28, x4, x20, 0xc1f7def0, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0xc1fbef70), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(sha512sum0r, x29, x3, x19, 0xc1fbef70, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0xc1fdf7b0), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(sha512sum0r, x30, x2, x18, 0xc1fdf7b0, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0xc1fefbd0), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(sha512sum0r, x31, x1, x17, 0xc1fefbd0, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0xc1ff7de0), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(sha512sum0r, x1, x31, x16, 0xc1ff7de0, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0xc1ffbef8), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(sha512sum0r, x2, x30, x15, 0xc1ffbef8, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0xc1ffdf74), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(sha512sum0r, x3, x29, x14, 0xc1ffdf74, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0xc1ffefb2), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(sha512sum0r, x4, x28, x13, 0xc1ffefb2, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0xc1fff7d1), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(sha512sum0r, x5, x27, x12, 0xc1fff7d1, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0xc1fffbe0), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(sha512sum0r, x6, x26, x11, 0xc1fffbe0, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xc1fffdf8), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(sha512sum0r, x7, x25, x10, 0xc1fffdf8, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0xc1fffef5), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(sha512sum0r, x8, x24, x9, 0xc1fffef5, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0xc1ffff70), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(sha512sum0r, x9, x23, x8, 0xc1ffff70, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0xc1ffffb5), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(sha512sum0r, x10, x22, x7, 0xc1ffffb5, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0xc1ffffd8), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(sha512sum0r, x11, x21, x6, 0xc1ffffd8, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0xc1ffffe0), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(sha512sum0r, x12, x20, x5, 0xc1ffffe0, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x7c00000f), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sum0r, x13, x19, x4, 0x7c00000f, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x9b00000f), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(sha512sum0r, x14, x18, x3, 0x9b00000f, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x2680000f), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(sha512sum0r, x15, x17, x2, 0x2680000f, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x2640000f), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(sha512sum0r, x16, x16, x1, 0x2640000f, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x1a20000f), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(sha512sum0r, x17, x15, x31, 0x1a20000f, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xfc10000f), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(sha512sum0r, x18, x14, x30, 0xfc10000f, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xff08000f), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(sha512sum0r, x19, x13, x29, 0xff08000f, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x1e84000f), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(sha512sum0r, x20, x12, x28, 0x1e84000f, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x2e42000f), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(sha512sum0r, x21, x11, x27, 0x2e42000f, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x3621000f), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(sha512sum0r, x22, x10, x26, 0x3621000f, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x3a10800f), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(sha512sum0r, x23, x9, x25, 0x3a10800f, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x3c08400f), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(sha512sum0r, x24, x8, x24, 0x3c08400f, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x3f04200f), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(sha512sum0r, x25, x7, x23, 0x3f04200f, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x3e82100f), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(sha512sum0r, x26, x6, x22, 0x3e82100f, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x3e41080f), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(sha512sum0r, x27, x5, x21, 0x3e41080f, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x3e20840f), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(sha512sum0r, x28, x4, x20, 0x3e20840f, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x3e10420f), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(sha512sum0r, x29, x3, x19, 0x3e10420f, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x3e08210f), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(sha512sum0r, x30, x2, x18, 0x3e08210f, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x3e04108f), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(sha512sum0r, x31, x1, x17, 0x3e04108f, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x3e02084f), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(sha512sum0r, x1, x31, x16, 0x3e02084f, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x3e01042f), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(sha512sum0r, x2, x30, x15, 0x3e01042f, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x3e00821f), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(sha512sum0r, x3, x29, x14, 0x3e00821f, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x3e004107), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(sha512sum0r, x4, x28, x13, 0x3e004107, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x3e00208b), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(sha512sum0r, x5, x27, x12, 0x3e00208b, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x3e00104d), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(sha512sum0r, x6, x26, x11, 0x3e00104d, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x3e00082e), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(sha512sum0r, x7, x25, x10, 0x3e00082e, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x3e00041f), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(sha512sum0r, x8, x24, x9, 0x3e00041f, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x3e000207), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(sha512sum0r, x9, x23, x8, 0x3e000207, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x3e00010a), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(sha512sum0r, x10, x22, x7, 0x3e00010a, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x3e00008f), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(sha512sum0r, x11, x21, x6, 0x3e00008f, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x3e00004a), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(sha512sum0r, x12, x20, x5, 0x3e00004a, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x3e000027), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(sha512sum0r, x13, x19, x4, 0x3e000027, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x3e00001f), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(sha512sum0r, x14, x18, x3, 0x3e00001f, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x42000000), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sum0r, x15, x17, x2, 0x42000000, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x84000000), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sum0r, x16, x16, x1, 0x84000000, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x08000000), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sum0r, x17, x15, x31, 0x08000000, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x10000000), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sum0r, x18, x14, x30, 0x10000000, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x20000000), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(sha512sum0r, x19, x13, x29, 0x20000000, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x40000000), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(sha512sum0r, x20, x12, x28, 0x40000000, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x80000000), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(sha512sum0r, x21, x11, x27, 0x80000000, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000000), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(sha512sum0r, x22, x10, x26, 0x00000000, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(sha512sum0r, x23, x9, x25, 0x00000000, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(sha512sum0r, x24, x8, x24, 0x00000000, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(sha512sum0r, x25, x7, x23, 0x00000000, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(sha512sum0r, x26, x6, x22, 0x00000000, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(sha512sum0r, x27, x5, x21, 0x00000000, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(sha512sum0r, x28, x4, x20, 0x00000000, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(sha512sum0r, x29, x3, x19, 0x00000000, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(sha512sum0r, x30, x2, x18, 0x00000000, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(sha512sum0r, x31, x1, x17, 0x00000000, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(sha512sum0r, x1, x31, x16, 0x00000000, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(sha512sum0r, x2, x30, x15, 0x00000000, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(sha512sum0r, x3, x29, x14, 0x00000000, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(sha512sum0r, x4, x28, x13, 0x00000000, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(sha512sum0r, x5, x27, x12, 0x00000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(sha512sum0r, x6, x26, x11, 0x00000000, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(sha512sum0r, x7, x25, x10, 0x00000000, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(sha512sum0r, x8, x24, x9, 0x00000000, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(sha512sum0r, x9, x23, x8, 0x00000000, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(sha512sum0r, x10, x22, x7, 0x00000000, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(sha512sum0r, x11, x21, x6, 0x00000000, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000001), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(sha512sum0r, x12, x20, x5, 0x00000001, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000002), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sum0r, x13, x19, x4, 0x00000002, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000004), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(sha512sum0r, x14, x18, x3, 0x00000004, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000008), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sum0r, x15, x17, x2, 0x00000008, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sum0r, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x7c00000f), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sum0r, x17, x15, x31, 0x7c00000f, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xba00000f), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sum0r, x18, x14, x30, 0xba00000f, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x3600000f), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(sha512sum0r, x19, x13, x29, 0x3600000f, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x2e00000f), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(sha512sum0r, x20, x12, x28, 0x2e00000f, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x1e00000f), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(sha512sum0r, x21, x11, x27, 0x1e00000f, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x7e00000f), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(sha512sum0r, x22, x10, x26, 0x7e00000f, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xbe00000f), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(sha512sum0r, x23, x9, x25, 0xbe00000f, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x3e00000f), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(sha512sum0r, x24, x8, x24, 0x3e00000f, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x3e00000f), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(sha512sum0r, x25, x7, x23, 0x3e00000f, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x3e00000f), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(sha512sum0r, x26, x6, x22, 0x3e00000f, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x3e00000f), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(sha512sum0r, x27, x5, x21, 0x3e00000f, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x3e00000f), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(sha512sum0r, x28, x4, x20, 0x3e00000f, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x3e00000f), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(sha512sum0r, x29, x3, x19, 0x3e00000f, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x3e00000f), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(sha512sum0r, x30, x2, x18, 0x3e00000f, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x3e00000f), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(sha512sum0r, x31, x1, x17, 0x3e00000f, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x3e00000f), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(sha512sum0r, x1, x31, x16, 0x3e00000f, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x3e00000f), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(sha512sum0r, x2, x30, x15, 0x3e00000f, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x3e00000f), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(sha512sum0r, x3, x29, x14, 0x3e00000f, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x3e00000f), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(sha512sum0r, x4, x28, x13, 0x3e00000f, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x3e00000f), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(sha512sum0r, x5, x27, x12, 0x3e00000f, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x3e00000f), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(sha512sum0r, x6, x26, x11, 0x3e00000f, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x3e00000f), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(sha512sum0r, x7, x25, x10, 0x3e00000f, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x3e00000f), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(sha512sum0r, x8, x24, x9, 0x3e00000f, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x3e00000f), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(sha512sum0r, x9, x23, x8, 0x3e00000f, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x3e00000f), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(sha512sum0r, x10, x22, x7, 0x3e00000f, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x3e00000f), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(sha512sum0r, x11, x21, x6, 0x3e00000f, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x3e00000f), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(sha512sum0r, x12, x20, x5, 0x3e00000f, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x3e00000f), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sum0r, x13, x19, x4, 0x3e00000f, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x3e00000e), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(sha512sum0r, x14, x18, x3, 0x3e00000e, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x3e00000d), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sum0r, x15, x17, x2, 0x3e00000d, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x3e00000b), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sum0r, x16, x16, x1, 0x3e00000b, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x3e000007), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sum0r, x17, x15, x31, 0x3e000007, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x3e00000f), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sum0r, x18, x14, x30, 0x3e00000f, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0xa31e06a1), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(sha512sum0r, x19, x29, x29, 0xa31e06a1, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(sha512sum0r, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xb600000a), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(sha512sum0r, x21, x11, x0, 0xb600000a, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x201a7537), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(sha512sum0r, x22, x0, x26, 0x201a7537, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SHA512SUM1R-01.S b/riscof/suite/rv32i_m/K_unratified/SHA512SUM1R-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..1f5ccb45f8bc5a00328f828f4d0bb7c529bab552
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SHA512SUM1R-01.S
@@ -0,0 +1,1023 @@
+// RISC-V Architectural Validation Test SHA512SUM1R-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha512sum1r'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha512sum1r)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha512sum1r)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x090f5135), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(sha512sum1r, x1, x31, x16, 0x090f5135, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x65ab81c9), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(sha512sum1r, x2, x30, x15, 0x65ab81c9, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x2a0ab4c7), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(sha512sum1r, x3, x29, x14, 0x2a0ab4c7, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xf40d3ce9), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(sha512sum1r, x4, x28, x13, 0xf40d3ce9, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xe13f8cfa), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(sha512sum1r, x5, x27, x12, 0xe13f8cfa, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x4a0d9023), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(sha512sum1r, x6, x26, x11, 0x4a0d9023, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xf9791ac6), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(sha512sum1r, x7, x25, x10, 0xf9791ac6, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xa8976d21), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(sha512sum1r, x8, x24, x9, 0xa8976d21, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x395f8734), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(sha512sum1r, x9, x23, x8, 0x395f8734, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xc3e7f9c1), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(sha512sum1r, x10, x22, x7, 0xc3e7f9c1, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00fc3fff), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(sha512sum1r, x11, x21, x6, 0x00fc3fff, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x013c3fff), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(sha512sum1r, x12, x20, x5, 0x013c3fff, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x025c3fff), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(sha512sum1r, x13, x19, x4, 0x025c3fff, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x046c3fff), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(sha512sum1r, x14, x18, x3, 0x046c3fff, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x08743fff), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(sha512sum1r, x15, x17, x2, 0x08743fff, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x10783fff), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(sha512sum1r, x16, x16, x1, 0x10783fff, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x207e3fff), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(sha512sum1r, x17, x15, x31, 0x207e3fff, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x407d3fff), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(sha512sum1r, x18, x14, x30, 0x407d3fff, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x807cbfff), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(sha512sum1r, x19, x13, x29, 0x807cbfff, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x007c7fff), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(sha512sum1r, x20, x12, x28, 0x007c7fff, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x007c1fff), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(sha512sum1r, x21, x11, x27, 0x007c1fff, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x007c2fff), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(sha512sum1r, x22, x10, x26, 0x007c2fff, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x007c37ff), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(sha512sum1r, x23, x9, x25, 0x007c37ff, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x007c3bff), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(sha512sum1r, x24, x8, x24, 0x007c3bff, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x007c3dfe), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(sha512sum1r, x25, x7, x23, 0x007c3dfe, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x807c3efd), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(sha512sum1r, x26, x6, x22, 0x807c3efd, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x407c3f7b), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(sha512sum1r, x27, x5, x21, 0x407c3f7b, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x207c3fb7), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(sha512sum1r, x28, x4, x20, 0x207c3fb7, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x107c3fce), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(sha512sum1r, x29, x3, x19, 0x107c3fce, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x887c3fcd), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(sha512sum1r, x30, x2, x18, 0x887c3fcd, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x447c3fb3), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(sha512sum1r, x31, x1, x17, 0x447c3fb3, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x227c3f73), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(sha512sum1r, x1, x31, x16, 0x227c3f73, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x117c3eed), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(sha512sum1r, x2, x30, x15, 0x117c3eed, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x08fc3dde), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(sha512sum1r, x3, x29, x14, 0x08fc3dde, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x043c3bbf), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(sha512sum1r, x4, x28, x13, 0x043c3bbf, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x025c377f), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(sha512sum1r, x5, x27, x12, 0x025c377f, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x016c2eff), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(sha512sum1r, x6, x26, x11, 0x016c2eff, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x00f41dff), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(sha512sum1r, x7, x25, x10, 0x00f41dff, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x00387bff), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(sha512sum1r, x8, x24, x9, 0x00387bff, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x005eb7ff), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(sha512sum1r, x9, x23, x8, 0x005eb7ff, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x006c2fff), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(sha512sum1r, x10, x22, x7, 0x006c2fff, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x00769fff), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(sha512sum1r, x11, x21, x6, 0x00769fff, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00787fff), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(sha512sum1r, x12, x20, x5, 0x00787fff, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xff03c000), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sum1r, x13, x19, x4, 0xff03c000, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xfec3c000), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(sha512sum1r, x14, x18, x3, 0xfec3c000, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xfda3c000), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(sha512sum1r, x15, x17, x2, 0xfda3c000, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xfb93c000), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(sha512sum1r, x16, x16, x1, 0xfb93c000, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xf78bc000), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(sha512sum1r, x17, x15, x31, 0xf78bc000, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xef87c000), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(sha512sum1r, x18, x14, x30, 0xef87c000, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xdf81c000), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(sha512sum1r, x19, x13, x29, 0xdf81c000, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xbf82c000), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(sha512sum1r, x20, x12, x28, 0xbf82c000, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x7f834000), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(sha512sum1r, x21, x11, x27, 0x7f834000, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xff838000), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(sha512sum1r, x22, x10, x26, 0xff838000, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xff83e000), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(sha512sum1r, x23, x9, x25, 0xff83e000, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xff83d000), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(sha512sum1r, x24, x8, x24, 0xff83d000, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xff83c800), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(sha512sum1r, x25, x7, x23, 0xff83c800, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xff83c400), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(sha512sum1r, x26, x6, x22, 0xff83c400, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xff83c201), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(sha512sum1r, x27, x5, x21, 0xff83c201, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x7f83c102), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(sha512sum1r, x28, x4, x20, 0x7f83c102, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xbf83c084), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(sha512sum1r, x29, x3, x19, 0xbf83c084, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xdf83c048), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(sha512sum1r, x30, x2, x18, 0xdf83c048, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xef83c031), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(sha512sum1r, x31, x1, x17, 0xef83c031, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x7783c032), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(sha512sum1r, x1, x31, x16, 0x7783c032, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xbb83c04c), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(sha512sum1r, x2, x30, x15, 0xbb83c04c, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xdd83c08c), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(sha512sum1r, x3, x29, x14, 0xdd83c08c, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xee83c112), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(sha512sum1r, x4, x28, x13, 0xee83c112, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xf703c221), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(sha512sum1r, x5, x27, x12, 0xf703c221, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xfbc3c440), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(sha512sum1r, x6, x26, x11, 0xfbc3c440, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfda3c880), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(sha512sum1r, x7, x25, x10, 0xfda3c880, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xfe93d100), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(sha512sum1r, x8, x24, x9, 0xfe93d100, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xff0be200), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(sha512sum1r, x9, x23, x8, 0xff0be200, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xffc78400), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(sha512sum1r, x10, x22, x7, 0xffc78400, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xffa14800), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(sha512sum1r, x11, x21, x6, 0xffa14800, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xff93d000), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(sha512sum1r, x12, x20, x5, 0xff93d000, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xff896000), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(sha512sum1r, x13, x19, x4, 0xff896000, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xff878000), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(sha512sum1r, x14, x18, x3, 0xff878000, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00800000), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sum1r, x15, x17, x2, 0x00800000, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x01000000), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sum1r, x16, x16, x1, 0x01000000, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x02000000), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sum1r, x17, x15, x31, 0x02000000, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x04000000), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sum1r, x18, x14, x30, 0x04000000, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x08000000), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(sha512sum1r, x19, x13, x29, 0x08000000, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x10000000), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(sha512sum1r, x20, x12, x28, 0x10000000, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x20000000), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(sha512sum1r, x21, x11, x27, 0x20000000, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x40000000), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(sha512sum1r, x22, x10, x26, 0x40000000, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x80000000), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(sha512sum1r, x23, x9, x25, 0x80000000, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(sha512sum1r, x24, x8, x24, 0x00000000, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(sha512sum1r, x25, x7, x23, 0x00000000, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(sha512sum1r, x26, x6, x22, 0x00000000, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(sha512sum1r, x27, x5, x21, 0x00000000, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(sha512sum1r, x28, x4, x20, 0x00000000, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000001), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(sha512sum1r, x29, x3, x19, 0x00000001, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000002), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(sha512sum1r, x30, x2, x18, 0x00000002, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000004), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(sha512sum1r, x31, x1, x17, 0x00000004, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000008), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(sha512sum1r, x1, x31, x16, 0x00000008, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000011), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(sha512sum1r, x2, x30, x15, 0x00000011, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000022), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(sha512sum1r, x3, x29, x14, 0x00000022, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000044), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(sha512sum1r, x4, x28, x13, 0x00000044, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000088), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(sha512sum1r, x5, x27, x12, 0x00000088, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000110), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(sha512sum1r, x6, x26, x11, 0x00000110, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000220), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(sha512sum1r, x7, x25, x10, 0x00000220, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000440), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(sha512sum1r, x8, x24, x9, 0x00000440, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000880), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(sha512sum1r, x9, x23, x8, 0x00000880, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00001100), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(sha512sum1r, x10, x22, x7, 0x00001100, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00002200), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(sha512sum1r, x11, x21, x6, 0x00002200, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00004400), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(sha512sum1r, x12, x20, x5, 0x00004400, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00008800), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sum1r, x13, x19, x4, 0x00008800, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00011000), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(sha512sum1r, x14, x18, x3, 0x00011000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00022000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sum1r, x15, x17, x2, 0x00022000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sum1r, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xff03c000), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sum1r, x17, x15, x31, 0xff03c000, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfe83c000), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sum1r, x18, x14, x30, 0xfe83c000, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfd83c000), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(sha512sum1r, x19, x13, x29, 0xfd83c000, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xfb83c000), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(sha512sum1r, x20, x12, x28, 0xfb83c000, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xf783c000), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(sha512sum1r, x21, x11, x27, 0xf783c000, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xef83c000), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(sha512sum1r, x22, x10, x26, 0xef83c000, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xdf83c000), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(sha512sum1r, x23, x9, x25, 0xdf83c000, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xbf83c000), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(sha512sum1r, x24, x8, x24, 0xbf83c000, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x7f83c000), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(sha512sum1r, x25, x7, x23, 0x7f83c000, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xff83c000), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(sha512sum1r, x26, x6, x22, 0xff83c000, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xff83c000), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(sha512sum1r, x27, x5, x21, 0xff83c000, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xff83c000), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(sha512sum1r, x28, x4, x20, 0xff83c000, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xff83c000), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(sha512sum1r, x29, x3, x19, 0xff83c000, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xff83c000), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(sha512sum1r, x30, x2, x18, 0xff83c000, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xff83c001), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(sha512sum1r, x31, x1, x17, 0xff83c001, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xff83c002), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(sha512sum1r, x1, x31, x16, 0xff83c002, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xff83c004), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(sha512sum1r, x2, x30, x15, 0xff83c004, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xff83c008), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(sha512sum1r, x3, x29, x14, 0xff83c008, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xff83c011), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(sha512sum1r, x4, x28, x13, 0xff83c011, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xff83c022), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(sha512sum1r, x5, x27, x12, 0xff83c022, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xff83c044), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(sha512sum1r, x6, x26, x11, 0xff83c044, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xff83c088), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(sha512sum1r, x7, x25, x10, 0xff83c088, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xff83c110), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(sha512sum1r, x8, x24, x9, 0xff83c110, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xff83c220), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(sha512sum1r, x9, x23, x8, 0xff83c220, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xff83c440), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(sha512sum1r, x10, x22, x7, 0xff83c440, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xff83c880), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(sha512sum1r, x11, x21, x6, 0xff83c880, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xff83d100), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(sha512sum1r, x12, x20, x5, 0xff83d100, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xff83e200), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(sha512sum1r, x13, x19, x4, 0xff83e200, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xff838400), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(sha512sum1r, x14, x18, x3, 0xff838400, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xff834800), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(sha512sum1r, x15, x17, x2, 0xff834800, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xff82d000), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(sha512sum1r, x16, x16, x1, 0xff82d000, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xff81e000), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(sha512sum1r, x17, x15, x31, 0xff81e000, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xff83c000), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(sha512sum1r, x18, x14, x30, 0xff83c000, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0xd20d810f), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(sha512sum1r, x19, x29, x29, 0xd20d810f, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(sha512sum1r, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x5d8289be), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(sha512sum1r, x21, x11, x0, 0x5d8289be, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x118c0dfd), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(sha512sum1r, x22, x0, x26, 0x118c0dfd, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SM3P0-01.S b/riscof/suite/rv32i_m/K_unratified/SM3P0-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..70f3631125d8f520bb8f1263276a14e26d59871e
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SM3P0-01.S
@@ -0,0 +1,1490 @@
+// RISC-V Architectural Validation Test SM3P0-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sm3p0'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",sm3p0)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xda62211a), rs1:x31(0xadea5195)
+ li x31, 0xadea5195
+ sm3p0 x1, x31
+ sw x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0xda62211a)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x5001989b), rs1:x30(0xd2ffbec1)
+ li x30, 0xd2ffbec1
+ sm3p0 x2, x30
+ sw x2, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x5001989b)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x3ac78e29), rs1:x29(0xa8e1a8bb)
+ li x29, 0xa8e1a8bb
+ sm3p0 x3, x29
+ sw x3, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x3ac78e29)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xe46098c9), rs1:x28(0x48c99fcb)
+ li x28, 0x48c99fcb
+ sm3p0 x4, x28
+ sw x4, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xe46098c9)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xd82740f9), rs1:x27(0x461d524f)
+ li x27, 0x461d524f
+ sm3p0 x5, x27
+ sw x5, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xd82740f9)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x67f5eb1e), rs1:x26(0x528a10af)
+ li x26, 0x528a10af
+ sm3p0 x6, x26
+ sw x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x67f5eb1e)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x21ebbf37), rs1:x25(0xe19bfbc3)
+ li x25, 0xe19bfbc3
+ sm3p0 x7, x25
+ sw x7, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x21ebbf37)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x601f92d5), rs1:x24(0x707af2c0)
+ li x24, 0x707af2c0
+ sm3p0 x8, x24
+ sw x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x601f92d5)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x7eeaefe9), rs1:x23(0xa47d105b)
+ li x23, 0xa47d105b
+ sm3p0 x9, x23
+ sw x9, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x7eeaefe9)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xbdc5ae30), rs1:x22(0x121bcc23)
+ li x22, 0x121bcc23
+ sm3p0 x10, x22
+ sw x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xbdc5ae30)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00020201), rs1:x21(0x00000001)
+ li x21, 0x1
+ sm3p0 x11, x21
+ sw x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x00020201)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00040402), rs1:x20(0x00000002)
+ li x20, 0x2
+ sm3p0 x12, x20
+ sw x12, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x00040402)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00080804), rs1:x19(0x00000004)
+ li x19, 0x4
+ sm3p0 x13, x19
+ sw x13, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x00080804)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00101008), rs1:x18(0x00000008)
+ li x18, 0x8
+ sm3p0 x14, x18
+ sw x14, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x00101008)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00202010), rs1:x17(0x00000010)
+ li x17, 0x10
+ sm3p0 x15, x17
+ sw x15, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x00202010)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x00404020), rs1:x16(0x00000020)
+ li x16, 0x20
+ sm3p0 x16, x16
+ sw x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x00404020)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x00808040), rs1:x15(0x00000040)
+ li x15, 0x40
+ sm3p0 x17, x15
+ sw x17, 4(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x00808040)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x01010080), rs1:x14(0x00000080)
+ li x14, 0x80
+ sm3p0 x18, x14
+ sw x18, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x01010080)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x02020100), rs1:x13(0x00000100)
+ li x13, 0x100
+ sm3p0 x19, x13
+ sw x19, 12(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x02020100)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x04040200), rs1:x12(0x00000200)
+ li x12, 0x200
+ sm3p0 x20, x12
+ sw x20, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x04040200)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x08080400), rs1:x11(0x00000400)
+ li x11, 0x400
+ sm3p0 x21, x11
+ sw x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x08080400)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x10100800), rs1:x10(0x00000800)
+ li x10, 0x800
+ sm3p0 x22, x10
+ sw x22, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x10100800)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x20201000), rs1:x9(0x00001000)
+ li x9, 0x1000
+ sm3p0 x23, x9
+ sw x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x20201000)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x40402000), rs1:x8(0x00002000)
+ li x8, 0x2000
+ sm3p0 x24, x8
+ sw x24, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x40402000)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x80804000), rs1:x7(0x00004000)
+ li x7, 0x4000
+ sm3p0 x25, x7
+ sw x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x80804000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x01008001), rs1:x6(0x00008000)
+ li x6, 0x8000
+ sm3p0 x26, x6
+ sw x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x01008001)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x02010002), rs1:x5(0x00010000)
+ li x5, 0x10000
+ sm3p0 x27, x5
+ sw x27, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x02010002)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x04020004), rs1:x4(0x00020000)
+ li x4, 0x20000
+ sm3p0 x28, x4
+ sw x28, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x04020004)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x08040008), rs1:x3(0x00040000)
+ li x3, 0x40000
+ sm3p0 x29, x3
+ sw x29, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x08040008)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x10080010), rs1:x2(0x00080000)
+ li x2, 0x80000
+ sm3p0 x30, x2
+ sw x30, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x10080010)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x20100020), rs1:x1(0x00100000)
+ li x1, 0x100000
+ sm3p0 x31, x1
+ sw x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x20100020)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x40200040), rs1:x31(0x00200000)
+ li x31, 0x200000
+ sm3p0 x1, x31
+ sw x1, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x40200040)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x80400080), rs1:x30(0x00400000)
+ li x30, 0x400000
+ sm3p0 x2, x30
+ sw x2, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x80400080)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00800101), rs1:x29(0x00800000)
+ li x29, 0x800000
+ sm3p0 x3, x29
+ sw x3, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x00800101)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x01000202), rs1:x28(0x01000000)
+ li x28, 0x1000000
+ sm3p0 x4, x28
+ sw x4, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x01000202)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x02000404), rs1:x27(0x02000000)
+ li x27, 0x2000000
+ sm3p0 x5, x27
+ sw x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x02000404)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x04000808), rs1:x26(0x04000000)
+ li x26, 0x4000000
+ sm3p0 x6, x26
+ sw x6, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x04000808)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x08001010), rs1:x25(0x08000000)
+ li x25, 0x8000000
+ sm3p0 x7, x25
+ sw x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x08001010)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x10002020), rs1:x24(0x10000000)
+ li x24, 0x10000000
+ sm3p0 x8, x24
+ sw x8, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x10002020)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x20004040), rs1:x23(0x20000000)
+ li x23, 0x20000000
+ sm3p0 x9, x23
+ sw x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x20004040)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x40008080), rs1:x22(0x40000000)
+ li x22, 0x40000000
+ sm3p0 x10, x22
+ sw x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x40008080)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x80010100), rs1:x21(0x80000000)
+ li x21, 0x80000000
+ sm3p0 x11, x21
+ sw x11, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x80010100)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000)
+ li x20, 0x0
+ sm3p0 x12, x20
+ sw x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xfffdfdfe), rs1:x19(0xfffffffe)
+ li x19, 0xfffffffe
+ sm3p0 x13, x19
+ sw x13, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xfffdfdfe)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xfffbfbfd), rs1:x18(0xfffffffd)
+ li x18, 0xfffffffd
+ sm3p0 x14, x18
+ sw x14, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0xfffbfbfd)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xfff7f7fb), rs1:x17(0xfffffffb)
+ li x17, 0xfffffffb
+ sm3p0 x15, x17
+ sw x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0xfff7f7fb)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xffefeff7), rs1:x16(0xfffffff7)
+ li x16, 0xfffffff7
+ sm3p0 x16, x16
+ sw x16, 4(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0xffefeff7)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xffdfdfef), rs1:x15(0xffffffef)
+ li x15, 0xffffffef
+ sm3p0 x17, x15
+ sw x17, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0xffdfdfef)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xffbfbfdf), rs1:x14(0xffffffdf)
+ li x14, 0xffffffdf
+ sm3p0 x18, x14
+ sw x18, 12(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0xffbfbfdf)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xff7f7fbf), rs1:x13(0xffffffbf)
+ li x13, 0xffffffbf
+ sm3p0 x19, x13
+ sw x19, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0xff7f7fbf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xfefeff7f), rs1:x12(0xffffff7f)
+ li x12, 0xffffff7f
+ sm3p0 x20, x12
+ sw x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfefeff7f)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xfdfdfeff), rs1:x11(0xfffffeff)
+ li x11, 0xfffffeff
+ sm3p0 x21, x11
+ sw x21, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfdfdfeff)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xfbfbfdff), rs1:x10(0xfffffdff)
+ li x10, 0xfffffdff
+ sm3p0 x22, x10
+ sw x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfbfbfdff)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xf7f7fbff), rs1:x9(0xfffffbff)
+ li x9, 0xfffffbff
+ sm3p0 x23, x9
+ sw x23, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xf7f7fbff)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xefeff7ff), rs1:x8(0xfffff7ff)
+ li x8, 0xfffff7ff
+ sm3p0 x24, x8
+ sw x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xefeff7ff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xdfdfefff), rs1:x7(0xffffefff)
+ li x7, 0xffffefff
+ sm3p0 x25, x7
+ sw x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xdfdfefff)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xbfbfdfff), rs1:x6(0xffffdfff)
+ li x6, 0xffffdfff
+ sm3p0 x26, x6
+ sw x26, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xbfbfdfff)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x7f7fbfff), rs1:x5(0xffffbfff)
+ li x5, 0xffffbfff
+ sm3p0 x27, x5
+ sw x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x7f7fbfff)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xfeff7ffe), rs1:x4(0xffff7fff)
+ li x4, 0xffff7fff
+ sm3p0 x28, x4
+ sw x28, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xfeff7ffe)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xfdfefffd), rs1:x3(0xfffeffff)
+ li x3, 0xfffeffff
+ sm3p0 x29, x3
+ sw x29, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xfdfefffd)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xfbfdfffb), rs1:x2(0xfffdffff)
+ li x2, 0xfffdffff
+ sm3p0 x30, x2
+ sw x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfbfdfffb)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xf7fbfff7), rs1:x1(0xfffbffff)
+ li x1, 0xfffbffff
+ sm3p0 x31, x1
+ sw x31, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xf7fbfff7)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xeff7ffef), rs1:x31(0xfff7ffff)
+ li x31, 0xfff7ffff
+ sm3p0 x1, x31
+ sw x1, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xeff7ffef)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xdfefffdf), rs1:x30(0xffefffff)
+ li x30, 0xffefffff
+ sm3p0 x2, x30
+ sw x2, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xdfefffdf)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xbfdfffbf), rs1:x29(0xffdfffff)
+ li x29, 0xffdfffff
+ sm3p0 x3, x29
+ sw x3, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xbfdfffbf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x7fbfff7f), rs1:x28(0xffbfffff)
+ li x28, 0xffbfffff
+ sm3p0 x4, x28
+ sw x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x7fbfff7f)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xff7ffefe), rs1:x27(0xff7fffff)
+ li x27, 0xff7fffff
+ sm3p0 x5, x27
+ sw x5, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xff7ffefe)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xfefffdfd), rs1:x26(0xfeffffff)
+ li x26, 0xfeffffff
+ sm3p0 x6, x26
+ sw x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xfefffdfd)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfdfffbfb), rs1:x25(0xfdffffff)
+ li x25, 0xfdffffff
+ sm3p0 x7, x25
+ sw x7, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfdfffbfb)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xfbfff7f7), rs1:x24(0xfbffffff)
+ li x24, 0xfbffffff
+ sm3p0 x8, x24
+ sw x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfbfff7f7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xf7ffefef), rs1:x23(0xf7ffffff)
+ li x23, 0xf7ffffff
+ sm3p0 x9, x23
+ sw x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xf7ffefef)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xefffdfdf), rs1:x22(0xefffffff)
+ li x22, 0xefffffff
+ sm3p0 x10, x22
+ sw x10, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xefffdfdf)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xdfffbfbf), rs1:x21(0xdfffffff)
+ li x21, 0xdfffffff
+ sm3p0 x11, x21
+ sw x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xdfffbfbf)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xbfff7f7f), rs1:x20(0xbfffffff)
+ li x20, 0xbfffffff
+ sm3p0 x12, x20
+ sw x12, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xbfff7f7f)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x7ffefeff), rs1:x19(0x7fffffff)
+ li x19, 0x7fffffff
+ sm3p0 x13, x19
+ sw x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x7ffefeff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff)
+ li x18, 0xffffffff
+ sm3p0 x14, x18
+ sw x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xffffffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00020201), rs1:x17(0x00000001)
+ li x17, 0x1
+ sm3p0 x15, x17
+ sw x15, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00020201)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00040402), rs1:x16(0x00000002)
+ li x16, 0x2
+ sm3p0 x16, x16
+ sw x16, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00040402)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00080804), rs1:x15(0x00000004)
+ li x15, 0x4
+ sm3p0 x17, x15
+ sw x17, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00080804)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00101008), rs1:x14(0x00000008)
+ li x14, 0x8
+ sm3p0 x18, x14
+ sw x18, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00101008)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00202010), rs1:x13(0x00000010)
+ li x13, 0x10
+ sm3p0 x19, x13
+ sw x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00202010)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00404020), rs1:x12(0x00000020)
+ li x12, 0x20
+ sm3p0 x20, x12
+ sw x20, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00404020)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00808040), rs1:x11(0x00000040)
+ li x11, 0x40
+ sm3p0 x21, x11
+ sw x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00808040)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x01010080), rs1:x10(0x00000080)
+ li x10, 0x80
+ sm3p0 x22, x10
+ sw x22, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x01010080)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x02020100), rs1:x9(0x00000100)
+ li x9, 0x100
+ sm3p0 x23, x9
+ sw x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x02020100)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x04040200), rs1:x8(0x00000200)
+ li x8, 0x200
+ sm3p0 x24, x8
+ sw x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x04040200)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x08080400), rs1:x7(0x00000400)
+ li x7, 0x400
+ sm3p0 x25, x7
+ sw x25, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x08080400)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x10100800), rs1:x6(0x00000800)
+ li x6, 0x800
+ sm3p0 x26, x6
+ sw x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x10100800)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x20201000), rs1:x5(0x00001000)
+ li x5, 0x1000
+ sm3p0 x27, x5
+ sw x27, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x20201000)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x40402000), rs1:x4(0x00002000)
+ li x4, 0x2000
+ sm3p0 x28, x4
+ sw x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x40402000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x80804000), rs1:x3(0x00004000)
+ li x3, 0x4000
+ sm3p0 x29, x3
+ sw x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x80804000)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x01008001), rs1:x2(0x00008000)
+ li x2, 0x8000
+ sm3p0 x30, x2
+ sw x30, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x01008001)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x02010002), rs1:x1(0x00010000)
+ li x1, 0x10000
+ sm3p0 x31, x1
+ sw x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x02010002)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x04020004), rs1:x31(0x00020000)
+ li x31, 0x20000
+ sm3p0 x1, x31
+ sw x1, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x04020004)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x08040008), rs1:x30(0x00040000)
+ li x30, 0x40000
+ sm3p0 x2, x30
+ sw x2, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x08040008)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x10080010), rs1:x29(0x00080000)
+ li x29, 0x80000
+ sm3p0 x3, x29
+ sw x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x10080010)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x20100020), rs1:x28(0x00100000)
+ li x28, 0x100000
+ sm3p0 x4, x28
+ sw x4, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x20100020)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x40200040), rs1:x27(0x00200000)
+ li x27, 0x200000
+ sm3p0 x5, x27
+ sw x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x40200040)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x80400080), rs1:x26(0x00400000)
+ li x26, 0x400000
+ sm3p0 x6, x26
+ sw x6, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x80400080)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00800101), rs1:x25(0x00800000)
+ li x25, 0x800000
+ sm3p0 x7, x25
+ sw x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00800101)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x01000202), rs1:x24(0x01000000)
+ li x24, 0x1000000
+ sm3p0 x8, x24
+ sw x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x01000202)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x02000404), rs1:x23(0x02000000)
+ li x23, 0x2000000
+ sm3p0 x9, x23
+ sw x9, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x02000404)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x04000808), rs1:x22(0x04000000)
+ li x22, 0x4000000
+ sm3p0 x10, x22
+ sw x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x04000808)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x08001010), rs1:x21(0x08000000)
+ li x21, 0x8000000
+ sm3p0 x11, x21
+ sw x11, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x08001010)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x10002020), rs1:x20(0x10000000)
+ li x20, 0x10000000
+ sm3p0 x12, x20
+ sw x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x10002020)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x20004040), rs1:x19(0x20000000)
+ li x19, 0x20000000
+ sm3p0 x13, x19
+ sw x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x20004040)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x40008080), rs1:x18(0x40000000)
+ li x18, 0x40000000
+ sm3p0 x14, x18
+ sw x14, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x40008080)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x80010100), rs1:x17(0x80000000)
+ li x17, 0x80000000
+ sm3p0 x15, x17
+ sw x15, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x80010100)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000)
+ li x16, 0x0
+ sm3p0 x16, x16
+ sw x16, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfffdfdfe), rs1:x15(0xfffffffe)
+ li x15, 0xfffffffe
+ sm3p0 x17, x15
+ sw x17, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xfffdfdfe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfffbfbfd), rs1:x14(0xfffffffd)
+ li x14, 0xfffffffd
+ sm3p0 x18, x14
+ sw x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xfffbfbfd)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfff7f7fb), rs1:x13(0xfffffffb)
+ li x13, 0xfffffffb
+ sm3p0 x19, x13
+ sw x19, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xfff7f7fb)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffefeff7), rs1:x12(0xfffffff7)
+ li x12, 0xfffffff7
+ sm3p0 x20, x12
+ sw x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffefeff7)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffdfdfef), rs1:x11(0xffffffef)
+ li x11, 0xffffffef
+ sm3p0 x21, x11
+ sw x21, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xffdfdfef)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffbfbfdf), rs1:x10(0xffffffdf)
+ li x10, 0xffffffdf
+ sm3p0 x22, x10
+ sw x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffbfbfdf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xff7f7fbf), rs1:x9(0xffffffbf)
+ li x9, 0xffffffbf
+ sm3p0 x23, x9
+ sw x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xff7f7fbf)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xfefeff7f), rs1:x8(0xffffff7f)
+ li x8, 0xffffff7f
+ sm3p0 x24, x8
+ sw x24, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfefeff7f)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfdfdfeff), rs1:x7(0xfffffeff)
+ li x7, 0xfffffeff
+ sm3p0 x25, x7
+ sw x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xfdfdfeff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfbfbfdff), rs1:x6(0xfffffdff)
+ li x6, 0xfffffdff
+ sm3p0 x26, x6
+ sw x26, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfbfbfdff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xf7f7fbff), rs1:x5(0xfffffbff)
+ li x5, 0xfffffbff
+ sm3p0 x27, x5
+ sw x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xf7f7fbff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xefeff7ff), rs1:x4(0xfffff7ff)
+ li x4, 0xfffff7ff
+ sm3p0 x28, x4
+ sw x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0xefeff7ff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xdfdfefff), rs1:x3(0xffffefff)
+ li x3, 0xffffefff
+ sm3p0 x29, x3
+ sw x29, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0xdfdfefff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xbfbfdfff), rs1:x2(0xffffdfff)
+ li x2, 0xffffdfff
+ sm3p0 x30, x2
+ sw x30, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0xbfbfdfff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x7f7fbfff), rs1:x1(0xffffbfff)
+ li x1, 0xffffbfff
+ sm3p0 x31, x1
+ sw x31, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x7f7fbfff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xfeff7ffe), rs1:x31(0xffff7fff)
+ li x31, 0xffff7fff
+ sm3p0 x1, x31
+ sw x1, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xfeff7ffe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfdfefffd), rs1:x30(0xfffeffff)
+ li x30, 0xfffeffff
+ sm3p0 x2, x30
+ sw x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xfdfefffd)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfbfdfffb), rs1:x29(0xfffdffff)
+ li x29, 0xfffdffff
+ sm3p0 x3, x29
+ sw x3, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xfbfdfffb)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xf7fbfff7), rs1:x28(0xfffbffff)
+ li x28, 0xfffbffff
+ sm3p0 x4, x28
+ sw x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xf7fbfff7)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xeff7ffef), rs1:x27(0xfff7ffff)
+ li x27, 0xfff7ffff
+ sm3p0 x5, x27
+ sw x5, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xeff7ffef)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xdfefffdf), rs1:x26(0xffefffff)
+ li x26, 0xffefffff
+ sm3p0 x6, x26
+ sw x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0xdfefffdf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xbfdfffbf), rs1:x25(0xffdfffff)
+ li x25, 0xffdfffff
+ sm3p0 x7, x25
+ sw x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xbfdfffbf)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x7fbfff7f), rs1:x24(0xffbfffff)
+ li x24, 0xffbfffff
+ sm3p0 x8, x24
+ sw x8, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x7fbfff7f)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xff7ffefe), rs1:x23(0xff7fffff)
+ li x23, 0xff7fffff
+ sm3p0 x9, x23
+ sw x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xff7ffefe)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfefffdfd), rs1:x22(0xfeffffff)
+ li x22, 0xfeffffff
+ sm3p0 x10, x22
+ sw x10, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfefffdfd)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xfdfffbfb), rs1:x21(0xfdffffff)
+ li x21, 0xfdffffff
+ sm3p0 x11, x21
+ sw x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfdfffbfb)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xfbfff7f7), rs1:x20(0xfbffffff)
+ li x20, 0xfbffffff
+ sm3p0 x12, x20
+ sw x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xfbfff7f7)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xf7ffefef), rs1:x19(0xf7ffffff)
+ li x19, 0xf7ffffff
+ sm3p0 x13, x19
+ sw x13, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xf7ffefef)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xefffdfdf), rs1:x18(0xefffffff)
+ li x18, 0xefffffff
+ sm3p0 x14, x18
+ sw x14, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xefffdfdf)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xdfffbfbf), rs1:x17(0xdfffffff)
+ li x17, 0xdfffffff
+ sm3p0 x15, x17
+ sw x15, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xdfffbfbf)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xbfff7f7f), rs1:x16(0xbfffffff)
+ li x16, 0xbfffffff
+ sm3p0 x16, x16
+ sw x16, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xbfff7f7f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x7ffefeff), rs1:x15(0x7fffffff)
+ li x15, 0x7fffffff
+ sm3p0 x17, x15
+ sw x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x7ffefeff)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff)
+ li x14, 0xffffffff
+ sm3p0 x18, x14
+ sw x18, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xffffffff)
+
+ inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0xda62211a), rs1:x13(0xadea5195)
+ li x13, 0xadea5195
+ sm3p0 x19, x13
+ sw x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xda62211a)
+
+ inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1)
+ li x12, 0xd2ffbec1
+ sm3p0 x0, x12
+ sw x0, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
+
+ inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x3ac78e29), rs1:x11(0xa8e1a8bb)
+ li x11, 0xa8e1a8bb
+ sm3p0 x21, x11
+ sw x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x3ac78e29)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb)
+ li x0, 0x48c99fcb
+ sm3p0 x22, x0
+ sw x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SM3P1-01.S b/riscof/suite/rv32i_m/K_unratified/SM3P1-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..8fca7df5ac710397b31a2ab3612e660728bbc9c8
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SM3P1-01.S
@@ -0,0 +1,1490 @@
+// RISC-V Architectural Validation Test SM3P1-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sm3p1'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",sm3p1)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x4ff67248), rs1:x31(0xadea5195)
+ li x31, 0xadea5195
+ sm3p1 x1, x31
+ sw x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x4ff67248)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x6d762861), rs1:x30(0xd2ffbec1)
+ li x30, 0xd2ffbec1
+ sm3p1 x2, x30
+ sw x2, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x6d762861)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x21680c1f), rs1:x29(0xa8e1a8bb)
+ li x29, 0xa8e1a8bb
+ sm3p1 x3, x29
+ sw x3, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x21680c1f)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x62885f60), rs1:x28(0x48c99fcb)
+ li x28, 0x48c99fcb
+ sm3p1 x4, x28
+ sw x4, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x62885f60)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xc899ffe8), rs1:x27(0x461d524f)
+ li x27, 0x461d524f
+ sm3p1 x5, x27
+ sw x5, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xc899ffe8)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x0d74fce2), rs1:x26(0x528a10af)
+ li x26, 0x528a10af
+ sm3p1 x6, x26
+ sw x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0d74fce2)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xfd8ac6f3), rs1:x25(0xe19bfbc3)
+ li x25, 0xe19bfbc3
+ sm3p1 x7, x25
+ sw x7, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfd8ac6f3)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x6922f784), rs1:x24(0x707af2c0)
+ li x24, 0x707af2c0
+ sm3p1 x8, x24
+ sw x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x6922f784)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x0182fced), rs1:x23(0xa47d105b)
+ li x23, 0xa47d105b
+ sm3p1 x9, x23
+ sw x9, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0182fced)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xe58348c8), rs1:x22(0x121bcc23)
+ li x22, 0x121bcc23
+ sm3p1 x10, x22
+ sw x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xe58348c8)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00808001), rs1:x21(0x00000001)
+ li x21, 0x1
+ sm3p1 x11, x21
+ sw x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x00808001)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x01010002), rs1:x20(0x00000002)
+ li x20, 0x2
+ sm3p1 x12, x20
+ sw x12, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x01010002)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x02020004), rs1:x19(0x00000004)
+ li x19, 0x4
+ sm3p1 x13, x19
+ sw x13, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x02020004)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x04040008), rs1:x18(0x00000008)
+ li x18, 0x8
+ sm3p1 x14, x18
+ sw x14, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x04040008)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x08080010), rs1:x17(0x00000010)
+ li x17, 0x10
+ sm3p1 x15, x17
+ sw x15, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x08080010)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x10100020), rs1:x16(0x00000020)
+ li x16, 0x20
+ sm3p1 x16, x16
+ sw x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x10100020)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x20200040), rs1:x15(0x00000040)
+ li x15, 0x40
+ sm3p1 x17, x15
+ sw x17, 4(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x20200040)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x40400080), rs1:x14(0x00000080)
+ li x14, 0x80
+ sm3p1 x18, x14
+ sw x18, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x40400080)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x80800100), rs1:x13(0x00000100)
+ li x13, 0x100
+ sm3p1 x19, x13
+ sw x19, 12(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x80800100)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x01000201), rs1:x12(0x00000200)
+ li x12, 0x200
+ sm3p1 x20, x12
+ sw x20, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x01000201)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x02000402), rs1:x11(0x00000400)
+ li x11, 0x400
+ sm3p1 x21, x11
+ sw x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x02000402)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x04000804), rs1:x10(0x00000800)
+ li x10, 0x800
+ sm3p1 x22, x10
+ sw x22, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x04000804)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x08001008), rs1:x9(0x00001000)
+ li x9, 0x1000
+ sm3p1 x23, x9
+ sw x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x08001008)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x10002010), rs1:x8(0x00002000)
+ li x8, 0x2000
+ sm3p1 x24, x8
+ sw x24, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x10002010)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x20004020), rs1:x7(0x00004000)
+ li x7, 0x4000
+ sm3p1 x25, x7
+ sw x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x20004020)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x40008040), rs1:x6(0x00008000)
+ li x6, 0x8000
+ sm3p1 x26, x6
+ sw x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x40008040)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x80010080), rs1:x5(0x00010000)
+ li x5, 0x10000
+ sm3p1 x27, x5
+ sw x27, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x80010080)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00020101), rs1:x4(0x00020000)
+ li x4, 0x20000
+ sm3p1 x28, x4
+ sw x28, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x00020101)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00040202), rs1:x3(0x00040000)
+ li x3, 0x40000
+ sm3p1 x29, x3
+ sw x29, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x00040202)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00080404), rs1:x2(0x00080000)
+ li x2, 0x80000
+ sm3p1 x30, x2
+ sw x30, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x00080404)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00100808), rs1:x1(0x00100000)
+ li x1, 0x100000
+ sm3p1 x31, x1
+ sw x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x00100808)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00201010), rs1:x31(0x00200000)
+ li x31, 0x200000
+ sm3p1 x1, x31
+ sw x1, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x00201010)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00402020), rs1:x30(0x00400000)
+ li x30, 0x400000
+ sm3p1 x2, x30
+ sw x2, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x00402020)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00804040), rs1:x29(0x00800000)
+ li x29, 0x800000
+ sm3p1 x3, x29
+ sw x3, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x00804040)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x01008080), rs1:x28(0x01000000)
+ li x28, 0x1000000
+ sm3p1 x4, x28
+ sw x4, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x01008080)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x02010100), rs1:x27(0x02000000)
+ li x27, 0x2000000
+ sm3p1 x5, x27
+ sw x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x02010100)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x04020200), rs1:x26(0x04000000)
+ li x26, 0x4000000
+ sm3p1 x6, x26
+ sw x6, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x04020200)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x08040400), rs1:x25(0x08000000)
+ li x25, 0x8000000
+ sm3p1 x7, x25
+ sw x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x08040400)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x10080800), rs1:x24(0x10000000)
+ li x24, 0x10000000
+ sm3p1 x8, x24
+ sw x8, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x10080800)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x20101000), rs1:x23(0x20000000)
+ li x23, 0x20000000
+ sm3p1 x9, x23
+ sw x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x20101000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x40202000), rs1:x22(0x40000000)
+ li x22, 0x40000000
+ sm3p1 x10, x22
+ sw x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x40202000)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x80404000), rs1:x21(0x80000000)
+ li x21, 0x80000000
+ sm3p1 x11, x21
+ sw x11, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x80404000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000)
+ li x20, 0x0
+ sm3p1 x12, x20
+ sw x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xff7f7ffe), rs1:x19(0xfffffffe)
+ li x19, 0xfffffffe
+ sm3p1 x13, x19
+ sw x13, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xff7f7ffe)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xfefefffd), rs1:x18(0xfffffffd)
+ li x18, 0xfffffffd
+ sm3p1 x14, x18
+ sw x14, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0xfefefffd)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xfdfdfffb), rs1:x17(0xfffffffb)
+ li x17, 0xfffffffb
+ sm3p1 x15, x17
+ sw x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0xfdfdfffb)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xfbfbfff7), rs1:x16(0xfffffff7)
+ li x16, 0xfffffff7
+ sm3p1 x16, x16
+ sw x16, 4(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0xfbfbfff7)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xf7f7ffef), rs1:x15(0xffffffef)
+ li x15, 0xffffffef
+ sm3p1 x17, x15
+ sw x17, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0xf7f7ffef)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xefefffdf), rs1:x14(0xffffffdf)
+ li x14, 0xffffffdf
+ sm3p1 x18, x14
+ sw x18, 12(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0xefefffdf)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xdfdfffbf), rs1:x13(0xffffffbf)
+ li x13, 0xffffffbf
+ sm3p1 x19, x13
+ sw x19, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0xdfdfffbf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xbfbfff7f), rs1:x12(0xffffff7f)
+ li x12, 0xffffff7f
+ sm3p1 x20, x12
+ sw x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xbfbfff7f)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x7f7ffeff), rs1:x11(0xfffffeff)
+ li x11, 0xfffffeff
+ sm3p1 x21, x11
+ sw x21, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x7f7ffeff)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xfefffdfe), rs1:x10(0xfffffdff)
+ li x10, 0xfffffdff
+ sm3p1 x22, x10
+ sw x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfefffdfe)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xfdfffbfd), rs1:x9(0xfffffbff)
+ li x9, 0xfffffbff
+ sm3p1 x23, x9
+ sw x23, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfdfffbfd)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xfbfff7fb), rs1:x8(0xfffff7ff)
+ li x8, 0xfffff7ff
+ sm3p1 x24, x8
+ sw x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfbfff7fb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xf7ffeff7), rs1:x7(0xffffefff)
+ li x7, 0xffffefff
+ sm3p1 x25, x7
+ sw x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xf7ffeff7)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xefffdfef), rs1:x6(0xffffdfff)
+ li x6, 0xffffdfff
+ sm3p1 x26, x6
+ sw x26, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xefffdfef)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xdfffbfdf), rs1:x5(0xffffbfff)
+ li x5, 0xffffbfff
+ sm3p1 x27, x5
+ sw x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xdfffbfdf)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xbfff7fbf), rs1:x4(0xffff7fff)
+ li x4, 0xffff7fff
+ sm3p1 x28, x4
+ sw x28, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xbfff7fbf)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x7ffeff7f), rs1:x3(0xfffeffff)
+ li x3, 0xfffeffff
+ sm3p1 x29, x3
+ sw x29, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x7ffeff7f)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xfffdfefe), rs1:x2(0xfffdffff)
+ li x2, 0xfffdffff
+ sm3p1 x30, x2
+ sw x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfffdfefe)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xfffbfdfd), rs1:x1(0xfffbffff)
+ li x1, 0xfffbffff
+ sm3p1 x31, x1
+ sw x31, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xfffbfdfd)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xfff7fbfb), rs1:x31(0xfff7ffff)
+ li x31, 0xfff7ffff
+ sm3p1 x1, x31
+ sw x1, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xfff7fbfb)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xffeff7f7), rs1:x30(0xffefffff)
+ li x30, 0xffefffff
+ sm3p1 x2, x30
+ sw x2, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xffeff7f7)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xffdfefef), rs1:x29(0xffdfffff)
+ li x29, 0xffdfffff
+ sm3p1 x3, x29
+ sw x3, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xffdfefef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xffbfdfdf), rs1:x28(0xffbfffff)
+ li x28, 0xffbfffff
+ sm3p1 x4, x28
+ sw x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xffbfdfdf)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xff7fbfbf), rs1:x27(0xff7fffff)
+ li x27, 0xff7fffff
+ sm3p1 x5, x27
+ sw x5, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xff7fbfbf)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xfeff7f7f), rs1:x26(0xfeffffff)
+ li x26, 0xfeffffff
+ sm3p1 x6, x26
+ sw x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xfeff7f7f)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfdfefeff), rs1:x25(0xfdffffff)
+ li x25, 0xfdffffff
+ sm3p1 x7, x25
+ sw x7, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfdfefeff)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xfbfdfdff), rs1:x24(0xfbffffff)
+ li x24, 0xfbffffff
+ sm3p1 x8, x24
+ sw x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfbfdfdff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xf7fbfbff), rs1:x23(0xf7ffffff)
+ li x23, 0xf7ffffff
+ sm3p1 x9, x23
+ sw x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xf7fbfbff)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xeff7f7ff), rs1:x22(0xefffffff)
+ li x22, 0xefffffff
+ sm3p1 x10, x22
+ sw x10, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xeff7f7ff)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xdfefefff), rs1:x21(0xdfffffff)
+ li x21, 0xdfffffff
+ sm3p1 x11, x21
+ sw x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xdfefefff)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xbfdfdfff), rs1:x20(0xbfffffff)
+ li x20, 0xbfffffff
+ sm3p1 x12, x20
+ sw x12, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xbfdfdfff)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x7fbfbfff), rs1:x19(0x7fffffff)
+ li x19, 0x7fffffff
+ sm3p1 x13, x19
+ sw x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x7fbfbfff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff)
+ li x18, 0xffffffff
+ sm3p1 x14, x18
+ sw x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xffffffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00808001), rs1:x17(0x00000001)
+ li x17, 0x1
+ sm3p1 x15, x17
+ sw x15, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00808001)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x01010002), rs1:x16(0x00000002)
+ li x16, 0x2
+ sm3p1 x16, x16
+ sw x16, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x01010002)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x02020004), rs1:x15(0x00000004)
+ li x15, 0x4
+ sm3p1 x17, x15
+ sw x17, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x02020004)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x04040008), rs1:x14(0x00000008)
+ li x14, 0x8
+ sm3p1 x18, x14
+ sw x18, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x04040008)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x08080010), rs1:x13(0x00000010)
+ li x13, 0x10
+ sm3p1 x19, x13
+ sw x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x08080010)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x10100020), rs1:x12(0x00000020)
+ li x12, 0x20
+ sm3p1 x20, x12
+ sw x20, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x10100020)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x20200040), rs1:x11(0x00000040)
+ li x11, 0x40
+ sm3p1 x21, x11
+ sw x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x20200040)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x40400080), rs1:x10(0x00000080)
+ li x10, 0x80
+ sm3p1 x22, x10
+ sw x22, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x40400080)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x80800100), rs1:x9(0x00000100)
+ li x9, 0x100
+ sm3p1 x23, x9
+ sw x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x80800100)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x01000201), rs1:x8(0x00000200)
+ li x8, 0x200
+ sm3p1 x24, x8
+ sw x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x01000201)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x02000402), rs1:x7(0x00000400)
+ li x7, 0x400
+ sm3p1 x25, x7
+ sw x25, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x02000402)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x04000804), rs1:x6(0x00000800)
+ li x6, 0x800
+ sm3p1 x26, x6
+ sw x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x04000804)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x08001008), rs1:x5(0x00001000)
+ li x5, 0x1000
+ sm3p1 x27, x5
+ sw x27, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x08001008)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x10002010), rs1:x4(0x00002000)
+ li x4, 0x2000
+ sm3p1 x28, x4
+ sw x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x10002010)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x20004020), rs1:x3(0x00004000)
+ li x3, 0x4000
+ sm3p1 x29, x3
+ sw x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x20004020)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x40008040), rs1:x2(0x00008000)
+ li x2, 0x8000
+ sm3p1 x30, x2
+ sw x30, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x40008040)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x80010080), rs1:x1(0x00010000)
+ li x1, 0x10000
+ sm3p1 x31, x1
+ sw x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x80010080)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00020101), rs1:x31(0x00020000)
+ li x31, 0x20000
+ sm3p1 x1, x31
+ sw x1, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00020101)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00040202), rs1:x30(0x00040000)
+ li x30, 0x40000
+ sm3p1 x2, x30
+ sw x2, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00040202)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00080404), rs1:x29(0x00080000)
+ li x29, 0x80000
+ sm3p1 x3, x29
+ sw x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00080404)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00100808), rs1:x28(0x00100000)
+ li x28, 0x100000
+ sm3p1 x4, x28
+ sw x4, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00100808)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00201010), rs1:x27(0x00200000)
+ li x27, 0x200000
+ sm3p1 x5, x27
+ sw x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00201010)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00402020), rs1:x26(0x00400000)
+ li x26, 0x400000
+ sm3p1 x6, x26
+ sw x6, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00402020)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00804040), rs1:x25(0x00800000)
+ li x25, 0x800000
+ sm3p1 x7, x25
+ sw x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00804040)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x01008080), rs1:x24(0x01000000)
+ li x24, 0x1000000
+ sm3p1 x8, x24
+ sw x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x01008080)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x02010100), rs1:x23(0x02000000)
+ li x23, 0x2000000
+ sm3p1 x9, x23
+ sw x9, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x02010100)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x04020200), rs1:x22(0x04000000)
+ li x22, 0x4000000
+ sm3p1 x10, x22
+ sw x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x04020200)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x08040400), rs1:x21(0x08000000)
+ li x21, 0x8000000
+ sm3p1 x11, x21
+ sw x11, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x08040400)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x10080800), rs1:x20(0x10000000)
+ li x20, 0x10000000
+ sm3p1 x12, x20
+ sw x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x10080800)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x20101000), rs1:x19(0x20000000)
+ li x19, 0x20000000
+ sm3p1 x13, x19
+ sw x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x20101000)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x40202000), rs1:x18(0x40000000)
+ li x18, 0x40000000
+ sm3p1 x14, x18
+ sw x14, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x40202000)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x80404000), rs1:x17(0x80000000)
+ li x17, 0x80000000
+ sm3p1 x15, x17
+ sw x15, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x80404000)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000)
+ li x16, 0x0
+ sm3p1 x16, x16
+ sw x16, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xff7f7ffe), rs1:x15(0xfffffffe)
+ li x15, 0xfffffffe
+ sm3p1 x17, x15
+ sw x17, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xff7f7ffe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfefefffd), rs1:x14(0xfffffffd)
+ li x14, 0xfffffffd
+ sm3p1 x18, x14
+ sw x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xfefefffd)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfdfdfffb), rs1:x13(0xfffffffb)
+ li x13, 0xfffffffb
+ sm3p1 x19, x13
+ sw x19, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xfdfdfffb)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xfbfbfff7), rs1:x12(0xfffffff7)
+ li x12, 0xfffffff7
+ sm3p1 x20, x12
+ sw x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfbfbfff7)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xf7f7ffef), rs1:x11(0xffffffef)
+ li x11, 0xffffffef
+ sm3p1 x21, x11
+ sw x21, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xf7f7ffef)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xefefffdf), rs1:x10(0xffffffdf)
+ li x10, 0xffffffdf
+ sm3p1 x22, x10
+ sw x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xefefffdf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xdfdfffbf), rs1:x9(0xffffffbf)
+ li x9, 0xffffffbf
+ sm3p1 x23, x9
+ sw x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xdfdfffbf)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xbfbfff7f), rs1:x8(0xffffff7f)
+ li x8, 0xffffff7f
+ sm3p1 x24, x8
+ sw x24, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xbfbfff7f)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x7f7ffeff), rs1:x7(0xfffffeff)
+ li x7, 0xfffffeff
+ sm3p1 x25, x7
+ sw x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x7f7ffeff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfefffdfe), rs1:x6(0xfffffdff)
+ li x6, 0xfffffdff
+ sm3p1 x26, x6
+ sw x26, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfefffdfe)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xfdfffbfd), rs1:x5(0xfffffbff)
+ li x5, 0xfffffbff
+ sm3p1 x27, x5
+ sw x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xfdfffbfd)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfbfff7fb), rs1:x4(0xfffff7ff)
+ li x4, 0xfffff7ff
+ sm3p1 x28, x4
+ sw x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0xfbfff7fb)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xf7ffeff7), rs1:x3(0xffffefff)
+ li x3, 0xffffefff
+ sm3p1 x29, x3
+ sw x29, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0xf7ffeff7)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xefffdfef), rs1:x2(0xffffdfff)
+ li x2, 0xffffdfff
+ sm3p1 x30, x2
+ sw x30, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0xefffdfef)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xdfffbfdf), rs1:x1(0xffffbfff)
+ li x1, 0xffffbfff
+ sm3p1 x31, x1
+ sw x31, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xdfffbfdf)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xbfff7fbf), rs1:x31(0xffff7fff)
+ li x31, 0xffff7fff
+ sm3p1 x1, x31
+ sw x1, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xbfff7fbf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x7ffeff7f), rs1:x30(0xfffeffff)
+ li x30, 0xfffeffff
+ sm3p1 x2, x30
+ sw x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x7ffeff7f)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfffdfefe), rs1:x29(0xfffdffff)
+ li x29, 0xfffdffff
+ sm3p1 x3, x29
+ sw x3, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xfffdfefe)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfffbfdfd), rs1:x28(0xfffbffff)
+ li x28, 0xfffbffff
+ sm3p1 x4, x28
+ sw x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xfffbfdfd)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfff7fbfb), rs1:x27(0xfff7ffff)
+ li x27, 0xfff7ffff
+ sm3p1 x5, x27
+ sw x5, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xfff7fbfb)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffeff7f7), rs1:x26(0xffefffff)
+ li x26, 0xffefffff
+ sm3p1 x6, x26
+ sw x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0xffeff7f7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffdfefef), rs1:x25(0xffdfffff)
+ li x25, 0xffdfffff
+ sm3p1 x7, x25
+ sw x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffdfefef)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffbfdfdf), rs1:x24(0xffbfffff)
+ li x24, 0xffbfffff
+ sm3p1 x8, x24
+ sw x8, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffbfdfdf)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xff7fbfbf), rs1:x23(0xff7fffff)
+ li x23, 0xff7fffff
+ sm3p1 x9, x23
+ sw x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xff7fbfbf)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfeff7f7f), rs1:x22(0xfeffffff)
+ li x22, 0xfeffffff
+ sm3p1 x10, x22
+ sw x10, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfeff7f7f)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xfdfefeff), rs1:x21(0xfdffffff)
+ li x21, 0xfdffffff
+ sm3p1 x11, x21
+ sw x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfdfefeff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xfbfdfdff), rs1:x20(0xfbffffff)
+ li x20, 0xfbffffff
+ sm3p1 x12, x20
+ sw x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xfbfdfdff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xf7fbfbff), rs1:x19(0xf7ffffff)
+ li x19, 0xf7ffffff
+ sm3p1 x13, x19
+ sw x13, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xf7fbfbff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xeff7f7ff), rs1:x18(0xefffffff)
+ li x18, 0xefffffff
+ sm3p1 x14, x18
+ sw x14, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xeff7f7ff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xdfefefff), rs1:x17(0xdfffffff)
+ li x17, 0xdfffffff
+ sm3p1 x15, x17
+ sw x15, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xdfefefff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xbfdfdfff), rs1:x16(0xbfffffff)
+ li x16, 0xbfffffff
+ sm3p1 x16, x16
+ sw x16, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xbfdfdfff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x7fbfbfff), rs1:x15(0x7fffffff)
+ li x15, 0x7fffffff
+ sm3p1 x17, x15
+ sw x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x7fbfbfff)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff)
+ li x14, 0xffffffff
+ sm3p1 x18, x14
+ sw x18, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xffffffff)
+
+ inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0x4ff67248), rs1:x13(0xadea5195)
+ li x13, 0xadea5195
+ sm3p1 x19, x13
+ sw x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x4ff67248)
+
+ inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1)
+ li x12, 0xd2ffbec1
+ sm3p1 x0, x12
+ sw x0, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
+
+ inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x21680c1f), rs1:x11(0xa8e1a8bb)
+ li x11, 0xa8e1a8bb
+ sm3p1 x21, x11
+ sw x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x21680c1f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb)
+ li x0, 0x48c99fcb
+ sm3p1 x22, x0
+ sw x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SM4ED-01.S b/riscof/suite/rv32i_m/K_unratified/SM4ED-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..20b3632716404cd875d658014ddc56d6373ef267
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SM4ED-01.S
@@ -0,0 +1,1052 @@
+// RISC-V Architectural Validation Test SM4ED-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sm4ed'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",sm4ed)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x5f803b0d), rs1=>rd:x1(0xadea5195), rs2:x16(0x121bcc23), imm:0x3
+ TEST_RI_OP(sm4ed, x1, x16, 0x3, 0x5f803b0d, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x58f5b441), rs1=>rd:x2(0xd2ffbec1), rs2:x15(0xa47d105b), imm:0x3
+ TEST_RI_OP(sm4ed, x2, x15, 0x3, 0x58f5b441, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x9ed72702), rs1=>rd:x3(0xa8e1a8bb), rs2:x14(0x707af2c0), imm:0x0
+ TEST_RI_OP(sm4ed, x3, x14, 0x0, 0x9ed72702, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x856c3aa3), rs1=>rd:x4(0x48c99fcb), rs2:x13(0xe19bfbc3), imm:0x3
+ TEST_RI_OP(sm4ed, x4, x13, 0x3, 0x856c3aa3, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xc31b54cc), rs1=>rd:x5(0x461d524f), rs2:x12(0x528a10af), imm:0x3
+ TEST_RI_OP(sm4ed, x5, x12, 0x3, 0xc31b54cc, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x19d64cb8), rs1=>rd:x6(0x528a10af), rs2:x11(0x461d524f), imm:0x3
+ TEST_RI_OP(sm4ed, x6, x11, 0x3, 0x19d64cb8, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x6e95f542), rs1=>rd:x7(0xe19bfbc3), rs2:x10(0x48c99fcb), imm:0x3
+ TEST_RI_OP(sm4ed, x7, x10, 0x3, 0x6e95f542, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xb079f103), rs1=>rd:x8(0x707af2c0), rs2:x9(0xa8e1a8bb), imm:0x3
+ TEST_RI_OP(sm4ed, x8, x9, 0x3, 0xb079f103, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xc9272736), rs1=>rd:x9(0xa47d105b), rs2:x8(0xd2ffbec1), imm:0x1
+ TEST_RI_OP(sm4ed, x9, x8, 0x1, 0xc9272736, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xbf710b8e), rs1=>rd:x10(0x121bcc23), rs2:x7(0xadea5195), imm:0x1
+ TEST_RI_OP(sm4ed, x10, x7, 0x1, 0xbf710b8e, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x68212148), rs1=>rd:x11(0x00000001), rs2:x6(0xffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x11, x6, 0x3, 0x68212148, 0x00000001, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x21496823), rs1=>rd:x12(0x00000002), rs2:x5(0x7fffffff), imm:0x1
+ TEST_RI_OP(sm4ed, x12, x5, 0x1, 0x21496823, 0x00000002, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x49682125), rs1=>rd:x13(0x00000004), rs2:x4(0xbfffffff), imm:0x2
+ TEST_RI_OP(sm4ed, x13, x4, 0x2, 0x49682125, 0x00000004, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x21214960), rs1=>rd:x14(0x00000008), rs2:x3(0xdfffffff), imm:0x0
+ TEST_RI_OP(sm4ed, x14, x3, 0x0, 0x21214960, 0x00000008, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x49682131), rs1=>rd:x15(0x00000010), rs2:x2(0xefffffff), imm:0x2
+ TEST_RI_OP(sm4ed, x15, x2, 0x2, 0x49682131, 0x00000010, 0xefffffff, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x21496801), rs1=>rd:x16(0x00000020), rs2:x1(0xf7ffffff), imm:0x1
+ TEST_RI_OP(sm4ed, x16, x1, 0x1, 0x21496801, 0x00000020, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0xc6f8f87e), rs1=>rd:x17(0x00000040), rs2:x31(0xfbffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x17, x31, 0x3, 0xc6f8f87e, 0x00000040, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xe72f2f48), rs1=>rd:x18(0x00000080), rs2:x30(0xfdffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x18, x30, 0x3, 0xe72f2f48, 0x00000080, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x21214868), rs1=>rd:x19(0x00000100), rs2:x29(0xfeffffff), imm:0x0
+ TEST_RI_OP(sm4ed, x19, x29, 0x0, 0x21214868, 0x00000100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x68212349), rs1=>rd:x20(0x00000200), rs2:x28(0xff7fffff), imm:0x3
+ TEST_RI_OP(sm4ed, x20, x28, 0x3, 0x68212349, 0x00000200, 0xff7fffff, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x68212549), rs1=>rd:x21(0x00000400), rs2:x27(0xffbfffff), imm:0x3
+ TEST_RI_OP(sm4ed, x21, x27, 0x3, 0x68212549, 0x00000400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x68212949), rs1=>rd:x22(0x00000800), rs2:x26(0xffdfffff), imm:0x3
+ TEST_RI_OP(sm4ed, x22, x26, 0x3, 0x68212949, 0x00000800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x68213149), rs1=>rd:x23(0x00001000), rs2:x25(0xffefffff), imm:0x3
+ TEST_RI_OP(sm4ed, x23, x25, 0x3, 0x68213149, 0x00001000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x97d6deb6), rs1=>rd:x24(0x00002000), rs2:x24(0xfff7ffff), imm:0x3
+ TEST_RI_OP(sm4ed, x24, x24, 0x3, 0x97d6deb6, 0x00002000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x21492821), rs1=>rd:x25(0x00004000), rs2:x23(0xfffbffff), imm:0x1
+ TEST_RI_OP(sm4ed, x25, x23, 0x1, 0x21492821, 0x00004000, 0xfffbffff, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x2149e821), rs1=>rd:x26(0x00008000), rs2:x22(0xfffdffff), imm:0x1
+ TEST_RI_OP(sm4ed, x26, x22, 0x1, 0x2149e821, 0x00008000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x68202149), rs1=>rd:x27(0x00010000), rs2:x21(0xfffeffff), imm:0x3
+ TEST_RI_OP(sm4ed, x27, x21, 0x3, 0x68202149, 0x00010000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x7a9ee67a), rs1=>rd:x28(0x00020000), rs2:x20(0xffff7fff), imm:0x1
+ TEST_RI_OP(sm4ed, x28, x20, 0x1, 0x7a9ee67a, 0x00020000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x496c2121), rs1=>rd:x29(0x00040000), rs2:x19(0xffffbfff), imm:0x2
+ TEST_RI_OP(sm4ed, x29, x19, 0x2, 0x496c2121, 0x00040000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x21294968), rs1=>rd:x30(0x00080000), rs2:x18(0xffffdfff), imm:0x0
+ TEST_RI_OP(sm4ed, x30, x18, 0x0, 0x21294968, 0x00080000, 0xffffdfff, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x49782121), rs1=>rd:x31(0x00100000), rs2:x17(0xffffefff), imm:0x2
+ TEST_RI_OP(sm4ed, x31, x17, 0x2, 0x49782121, 0x00100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x8000a080), rs1=>rd:x1(0x00200000), rs2:x16(0xfffff7ff), imm:0x1
+ TEST_RI_OP(sm4ed, x1, x16, 0x1, 0x8000a080, 0x00200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x68612149), rs1=>rd:x2(0x00400000), rs2:x15(0xfffffbff), imm:0x3
+ TEST_RI_OP(sm4ed, x2, x15, 0x3, 0x68612149, 0x00400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x68a12149), rs1=>rd:x3(0x00800000), rs2:x14(0xfffffdff), imm:0x3
+ TEST_RI_OP(sm4ed, x3, x14, 0x3, 0x68a12149, 0x00800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x20214968), rs1=>rd:x4(0x01000000), rs2:x13(0xfffffeff), imm:0x0
+ TEST_RI_OP(sm4ed, x4, x13, 0x0, 0x20214968, 0x01000000, 0xfffffeff, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x6a212149), rs1=>rd:x5(0x02000000), rs2:x12(0xffffff7f), imm:0x3
+ TEST_RI_OP(sm4ed, x5, x12, 0x3, 0x6a212149, 0x02000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x6c212149), rs1=>rd:x6(0x04000000), rs2:x11(0xffffffbf), imm:0x3
+ TEST_RI_OP(sm4ed, x6, x11, 0x3, 0x6c212149, 0x04000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x60212149), rs1=>rd:x7(0x08000000), rs2:x10(0xffffffdf), imm:0x3
+ TEST_RI_OP(sm4ed, x7, x10, 0x3, 0x60212149, 0x08000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x78212149), rs1=>rd:x8(0x10000000), rs2:x9(0xffffffef), imm:0x3
+ TEST_RI_OP(sm4ed, x8, x9, 0x3, 0x78212149, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x48212149), rs1=>rd:x9(0x20000000), rs2:x8(0xfffffff7), imm:0x3
+ TEST_RI_OP(sm4ed, x9, x8, 0x3, 0x48212149, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x61496821), rs1=>rd:x10(0x40000000), rs2:x7(0xfffffffb), imm:0x1
+ TEST_RI_OP(sm4ed, x10, x7, 0x1, 0x61496821, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0xa1496821), rs1=>rd:x11(0x80000000), rs2:x6(0xfffffffd), imm:0x1
+ TEST_RI_OP(sm4ed, x11, x6, 0x1, 0xa1496821, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x68212149), rs1=>rd:x12(0x00000000), rs2:x5(0xfffffffe), imm:0x3
+ TEST_RI_OP(sm4ed, x12, x5, 0x3, 0x68212149, 0x00000000, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xa42a71a5), rs1=>rd:x13(0xfffffffe), rs2:x4(0x00000000), imm:0x1
+ TEST_RI_OP(sm4ed, x13, x4, 0x1, 0xa42a71a5, 0xfffffffe, 0x00000000, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x2a71a4a6), rs1=>rd:x14(0xfffffffd), rs2:x3(0x80000000), imm:0x2
+ TEST_RI_OP(sm4ed, x14, x3, 0x2, 0x2a71a4a6, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xa4a42a75), rs1=>rd:x15(0xfffffffb), rs2:x2(0x40000000), imm:0x0
+ TEST_RI_OP(sm4ed, x15, x2, 0x0, 0xa4a42a75, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x2a71a4ac), rs1=>rd:x16(0xfffffff7), rs2:x1(0x20000000), imm:0x2
+ TEST_RI_OP(sm4ed, x16, x1, 0x2, 0x2a71a4ac, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xa42a71b4), rs1=>rd:x17(0xffffffef), rs2:x31(0x10000000), imm:0x1
+ TEST_RI_OP(sm4ed, x17, x31, 0x1, 0xa42a71b4, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xb1a7a7c9), rs1=>rd:x18(0xffffffdf), rs2:x30(0x08000000), imm:0x3
+ TEST_RI_OP(sm4ed, x18, x30, 0x3, 0xb1a7a7c9, 0xffffffdf, 0x08000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x03cccc70), rs1=>rd:x19(0xffffffbf), rs2:x29(0x04000000), imm:0x3
+ TEST_RI_OP(sm4ed, x19, x29, 0x3, 0x03cccc70, 0xffffffbf, 0x04000000, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xa4a42af1), rs1=>rd:x20(0xffffff7f), rs2:x28(0x02000000), imm:0x0
+ TEST_RI_OP(sm4ed, x20, x28, 0x0, 0xa4a42af1, 0xffffff7f, 0x02000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x2fbdbc6d), rs1=>rd:x21(0xfffffeff), rs2:x27(0x01000000), imm:0x3
+ TEST_RI_OP(sm4ed, x21, x27, 0x3, 0x2fbdbc6d, 0xfffffeff, 0x01000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x71a4a62a), rs1=>rd:x22(0xfffffdff), rs2:x26(0x00800000), imm:0x3
+ TEST_RI_OP(sm4ed, x22, x26, 0x3, 0x71a4a62a, 0xfffffdff, 0x00800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x71a4a02a), rs1=>rd:x23(0xfffffbff), rs2:x25(0x00400000), imm:0x3
+ TEST_RI_OP(sm4ed, x23, x25, 0x3, 0x71a4a02a, 0xfffffbff, 0x00400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x8e7b5bd5), rs1=>rd:x24(0xfffff7ff), rs2:x24(0x00200000), imm:0x3
+ TEST_RI_OP(sm4ed, x24, x24, 0x3, 0x8e7b5bd5, 0xfffff7ff, 0x00200000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x71a4b42a), rs1=>rd:x25(0xffffefff), rs2:x23(0x00100000), imm:0x3
+ TEST_RI_OP(sm4ed, x25, x23, 0x3, 0x71a4b42a, 0xffffefff, 0x00100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xa42a51a4), rs1=>rd:x26(0xffffdfff), rs2:x22(0x00080000), imm:0x1
+ TEST_RI_OP(sm4ed, x26, x22, 0x1, 0xa42a51a4, 0xffffdfff, 0x00080000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xa42a31a4), rs1=>rd:x27(0xffffbfff), rs2:x21(0x00040000), imm:0x1
+ TEST_RI_OP(sm4ed, x27, x21, 0x1, 0xa42a31a4, 0xffffbfff, 0x00040000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x71a4242a), rs1=>rd:x28(0xffff7fff), rs2:x20(0x00020000), imm:0x3
+ TEST_RI_OP(sm4ed, x28, x20, 0x3, 0x71a4242a, 0xffff7fff, 0x00020000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xa42b71a4), rs1=>rd:x29(0xfffeffff), rs2:x19(0x00010000), imm:0x1
+ TEST_RI_OP(sm4ed, x29, x19, 0x1, 0xa42b71a4, 0xfffeffff, 0x00010000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x2a73a4a4), rs1=>rd:x30(0xfffdffff), rs2:x18(0x00008000), imm:0x2
+ TEST_RI_OP(sm4ed, x30, x18, 0x2, 0x2a73a4a4, 0xfffdffff, 0x00008000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xa4a02a71), rs1=>rd:x31(0xfffbffff), rs2:x17(0x00004000), imm:0x0
+ TEST_RI_OP(sm4ed, x31, x17, 0x0, 0xa4a02a71, 0xfffbffff, 0x00004000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x2a79a4a4), rs1=>rd:x1(0xfff7ffff), rs2:x16(0x00002000), imm:0x2
+ TEST_RI_OP(sm4ed, x1, x16, 0x2, 0x2a79a4a4, 0xfff7ffff, 0x00002000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x53c47853), rs1=>rd:x2(0xffefffff), rs2:x15(0x00001000), imm:0x1
+ TEST_RI_OP(sm4ed, x2, x15, 0x1, 0x53c47853, 0xffefffff, 0x00001000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x7184a42a), rs1=>rd:x3(0xffdfffff), rs2:x14(0x00000800), imm:0x3
+ TEST_RI_OP(sm4ed, x3, x14, 0x3, 0x7184a42a, 0xffdfffff, 0x00000800, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x71e4a42a), rs1=>rd:x4(0xffbfffff), rs2:x13(0x00000400), imm:0x3
+ TEST_RI_OP(sm4ed, x4, x13, 0x3, 0x71e4a42a, 0xffbfffff, 0x00000400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xa4242a71), rs1=>rd:x5(0xff7fffff), rs2:x12(0x00000200), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0xa4242a71, 0xff7fffff, 0x00000200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xa5a42a71), rs1=>rd:x6(0xfeffffff), rs2:x11(0x00000100), imm:0x0
+ TEST_RI_OP(sm4ed, x6, x11, 0x0, 0xa5a42a71, 0xfeffffff, 0x00000100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x565416bd), rs1=>rd:x7(0xfdffffff), rs2:x10(0x00000080), imm:0x0
+ TEST_RI_OP(sm4ed, x7, x10, 0x0, 0x565416bd, 0xfdffffff, 0x00000080, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xe6e2b9a4), rs1=>rd:x8(0xfbffffff), rs2:x9(0x00000040), imm:0x0
+ TEST_RI_OP(sm4ed, x8, x9, 0x0, 0xe6e2b9a4, 0xfbffffff, 0x00000040, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x858d6113), rs1=>rd:x9(0xf7ffffff), rs2:x8(0x00000020), imm:0x0
+ TEST_RI_OP(sm4ed, x9, x8, 0x0, 0x858d6113, 0xf7ffffff, 0x00000020, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x4353d478), rs1=>rd:x10(0xefffffff), rs2:x7(0x00000010), imm:0x0
+ TEST_RI_OP(sm4ed, x10, x7, 0x0, 0x4353d478, 0xefffffff, 0x00000010, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x87a7e9b1), rs1=>rd:x11(0xdfffffff), rs2:x6(0x00000008), imm:0x0
+ TEST_RI_OP(sm4ed, x11, x6, 0x0, 0x87a7e9b1, 0xdfffffff, 0x00000008, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x8ccc3003), rs1=>rd:x12(0xbfffffff), rs2:x5(0x00000004), imm:0x0
+ TEST_RI_OP(sm4ed, x12, x5, 0x0, 0x8ccc3003, 0xbfffffff, 0x00000004, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xd85815b2), rs1=>rd:x13(0x7fffffff), rs2:x4(0x00000002), imm:0x0
+ TEST_RI_OP(sm4ed, x13, x4, 0x0, 0xd85815b2, 0x7fffffff, 0x00000002, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xbdbd6d2f), rs1=>rd:x14(0xffffffff), rs2:x3(0x00000001), imm:0x0
+ TEST_RI_OP(sm4ed, x14, x3, 0x0, 0xbdbd6d2f, 0xffffffff, 0x00000001, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x5b5bd58f), rs1=>rd:x15(0x00000001), rs2:x2(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x15, x2, 0x0, 0x5b5bd58f, 0x00000001, 0x00000000, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x5b5bd58c), rs1=>rd:x16(0x00000002), rs2:x1(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x16, x1, 0x0, 0x5b5bd58c, 0x00000002, 0x00000000, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x5b5bd58a), rs1=>rd:x17(0x00000004), rs2:x31(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x17, x31, 0x0, 0x5b5bd58a, 0x00000004, 0x00000000, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x5b5bd586), rs1=>rd:x18(0x00000008), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x18, x30, 0x0, 0x5b5bd586, 0x00000008, 0x00000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x5b5bd59e), rs1=>rd:x19(0x00000010), rs2:x29(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x19, x29, 0x0, 0x5b5bd59e, 0x00000010, 0x00000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x5b5bd5ae), rs1=>rd:x20(0x00000020), rs2:x28(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x20, x28, 0x0, 0x5b5bd5ae, 0x00000020, 0x00000000, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x5b5bd5ce), rs1=>rd:x21(0x00000040), rs2:x27(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x21, x27, 0x0, 0x5b5bd5ce, 0x00000040, 0x00000000, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x5b5bd50e), rs1=>rd:x22(0x00000080), rs2:x26(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x22, x26, 0x0, 0x5b5bd50e, 0x00000080, 0x00000000, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x5b5bd48e), rs1=>rd:x23(0x00000100), rs2:x25(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x23, x25, 0x0, 0x5b5bd48e, 0x00000100, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x5b5bd58e), rs1=>rd:x24(0x00000200), rs2:x24(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x24, x24, 0x0, 0x5b5bd58e, 0x00000200, 0x00000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x5b5bd18e), rs1=>rd:x25(0x00000400), rs2:x23(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x25, x23, 0x0, 0x5b5bd18e, 0x00000400, 0x00000000, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x5b5bdd8e), rs1=>rd:x26(0x00000800), rs2:x22(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x26, x22, 0x0, 0x5b5bdd8e, 0x00000800, 0x00000000, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x5b5bc58e), rs1=>rd:x27(0x00001000), rs2:x21(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x27, x21, 0x0, 0x5b5bc58e, 0x00001000, 0x00000000, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x5b5bf58e), rs1=>rd:x28(0x00002000), rs2:x20(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x28, x20, 0x0, 0x5b5bf58e, 0x00002000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x5b5b958e), rs1=>rd:x29(0x00004000), rs2:x19(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x29, x19, 0x0, 0x5b5b958e, 0x00004000, 0x00000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x5b5b558e), rs1=>rd:x30(0x00008000), rs2:x18(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x30, x18, 0x0, 0x5b5b558e, 0x00008000, 0x00000000, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x5b5ad58e), rs1=>rd:x31(0x00010000), rs2:x17(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x31, x17, 0x0, 0x5b5ad58e, 0x00010000, 0x00000000, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x5b59d58e), rs1=>rd:x1(0x00020000), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x1, x16, 0x0, 0x5b59d58e, 0x00020000, 0x00000000, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x5b5fd58e), rs1=>rd:x2(0x00040000), rs2:x15(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x2, x15, 0x0, 0x5b5fd58e, 0x00040000, 0x00000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x5b53d58e), rs1=>rd:x3(0x00080000), rs2:x14(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x3, x14, 0x0, 0x5b53d58e, 0x00080000, 0x00000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x5b4bd58e), rs1=>rd:x4(0x00100000), rs2:x13(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x4, x13, 0x0, 0x5b4bd58e, 0x00100000, 0x00000000, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x5b7bd58e), rs1=>rd:x5(0x00200000), rs2:x12(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0x5b7bd58e, 0x00200000, 0x00000000, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x5b1bd58e), rs1=>rd:x6(0x00400000), rs2:x11(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x6, x11, 0x0, 0x5b1bd58e, 0x00400000, 0x00000000, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x5bdbd58e), rs1=>rd:x7(0x00800000), rs2:x10(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x7, x10, 0x0, 0x5bdbd58e, 0x00800000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x5a5bd58e), rs1=>rd:x8(0x01000000), rs2:x9(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x8, x9, 0x0, 0x5a5bd58e, 0x01000000, 0x00000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x595bd58e), rs1=>rd:x9(0x02000000), rs2:x8(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x9, x8, 0x0, 0x595bd58e, 0x02000000, 0x00000000, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x5f5bd58e), rs1=>rd:x10(0x04000000), rs2:x7(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x10, x7, 0x0, 0x5f5bd58e, 0x04000000, 0x00000000, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x535bd58e), rs1=>rd:x11(0x08000000), rs2:x6(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x11, x6, 0x0, 0x535bd58e, 0x08000000, 0x00000000, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x4b5bd58e), rs1=>rd:x12(0x10000000), rs2:x5(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x12, x5, 0x0, 0x4b5bd58e, 0x10000000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x7b5bd58e), rs1=>rd:x13(0x20000000), rs2:x4(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x13, x4, 0x0, 0x7b5bd58e, 0x20000000, 0x00000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x1b5bd58e), rs1=>rd:x14(0x40000000), rs2:x3(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x14, x3, 0x0, 0x1b5bd58e, 0x40000000, 0x00000000, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xdb5bd58e), rs1=>rd:x15(0x80000000), rs2:x2(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x15, x2, 0x0, 0xdb5bd58e, 0x80000000, 0x00000000, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x5b5bd58e), rs1=>rd:x16(0x00000000), rs2:x1(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x16, x1, 0x0, 0x5b5bd58e, 0x00000000, 0x00000000, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xa4a42a70), rs1=>rd:x17(0xfffffffe), rs2:x31(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x17, x31, 0x0, 0xa4a42a70, 0xfffffffe, 0x00000000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xa4a42a73), rs1=>rd:x18(0xfffffffd), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x18, x30, 0x0, 0xa4a42a73, 0xfffffffd, 0x00000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xa4a42a75), rs1=>rd:x19(0xfffffffb), rs2:x29(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x19, x29, 0x0, 0xa4a42a75, 0xfffffffb, 0x00000000, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xa4a42a79), rs1=>rd:x20(0xfffffff7), rs2:x28(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x20, x28, 0x0, 0xa4a42a79, 0xfffffff7, 0x00000000, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xa4a42a61), rs1=>rd:x21(0xffffffef), rs2:x27(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x21, x27, 0x0, 0xa4a42a61, 0xffffffef, 0x00000000, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xa4a42a51), rs1=>rd:x22(0xffffffdf), rs2:x26(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x22, x26, 0x0, 0xa4a42a51, 0xffffffdf, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xa4a42a31), rs1=>rd:x23(0xffffffbf), rs2:x25(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x23, x25, 0x0, 0xa4a42a31, 0xffffffbf, 0x00000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x5b5bd58e), rs1=>rd:x24(0xffffff7f), rs2:x24(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x24, x24, 0x0, 0x5b5bd58e, 0xffffff7f, 0x00000000, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xa4a42b71), rs1=>rd:x25(0xfffffeff), rs2:x23(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x25, x23, 0x0, 0xa4a42b71, 0xfffffeff, 0x00000000, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xa4a42871), rs1=>rd:x26(0xfffffdff), rs2:x22(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x26, x22, 0x0, 0xa4a42871, 0xfffffdff, 0x00000000, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xa4a42e71), rs1=>rd:x27(0xfffffbff), rs2:x21(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x27, x21, 0x0, 0xa4a42e71, 0xfffffbff, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xa4a42271), rs1=>rd:x28(0xfffff7ff), rs2:x20(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x28, x20, 0x0, 0xa4a42271, 0xfffff7ff, 0x00000000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xa4a43a71), rs1=>rd:x29(0xffffefff), rs2:x19(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x29, x19, 0x0, 0xa4a43a71, 0xffffefff, 0x00000000, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xa4a40a71), rs1=>rd:x30(0xffffdfff), rs2:x18(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x30, x18, 0x0, 0xa4a40a71, 0xffffdfff, 0x00000000, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xa4a46a71), rs1=>rd:x31(0xffffbfff), rs2:x17(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x31, x17, 0x0, 0xa4a46a71, 0xffffbfff, 0x00000000, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xa4a4aa71), rs1=>rd:x1(0xffff7fff), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x1, x16, 0x0, 0xa4a4aa71, 0xffff7fff, 0x00000000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xa4a52a71), rs1=>rd:x2(0xfffeffff), rs2:x15(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x2, x15, 0x0, 0xa4a52a71, 0xfffeffff, 0x00000000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xa4a62a71), rs1=>rd:x3(0xfffdffff), rs2:x14(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x3, x14, 0x0, 0xa4a62a71, 0xfffdffff, 0x00000000, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xa4a02a71), rs1=>rd:x4(0xfffbffff), rs2:x13(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x4, x13, 0x0, 0xa4a02a71, 0xfffbffff, 0x00000000, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xa4ac2a71), rs1=>rd:x5(0xfff7ffff), rs2:x12(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0xa4ac2a71, 0xfff7ffff, 0x00000000, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xa4b42a71), rs1=>rd:x6(0xffefffff), rs2:x11(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x6, x11, 0x0, 0xa4b42a71, 0xffefffff, 0x00000000, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xa4842a71), rs1=>rd:x7(0xffdfffff), rs2:x10(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x7, x10, 0x0, 0xa4842a71, 0xffdfffff, 0x00000000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xa4e42a71), rs1=>rd:x8(0xffbfffff), rs2:x9(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x8, x9, 0x0, 0xa4e42a71, 0xffbfffff, 0x00000000, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x7124a42a), rs1=>rd:x9(0xff7fffff), rs2:x8(0x00000000), imm:0x3
+ TEST_RI_OP(sm4ed, x9, x8, 0x3, 0x7124a42a, 0xff7fffff, 0x00000000, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x70a4a42a), rs1=>rd:x10(0xfeffffff), rs2:x7(0x00000000), imm:0x3
+ TEST_RI_OP(sm4ed, x10, x7, 0x3, 0x70a4a42a, 0xfeffffff, 0x00000000, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x73a4a42a), rs1=>rd:x11(0xfdffffff), rs2:x6(0x00000000), imm:0x3
+ TEST_RI_OP(sm4ed, x11, x6, 0x3, 0x73a4a42a, 0xfdffffff, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x75a4a42a), rs1=>rd:x12(0xfbffffff), rs2:x5(0x00000000), imm:0x3
+ TEST_RI_OP(sm4ed, x12, x5, 0x3, 0x75a4a42a, 0xfbffffff, 0x00000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xac2a71a4), rs1=>rd:x13(0xf7ffffff), rs2:x4(0x00000000), imm:0x1
+ TEST_RI_OP(sm4ed, x13, x4, 0x1, 0xac2a71a4, 0xf7ffffff, 0x00000000, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xb42a71a4), rs1=>rd:x14(0xefffffff), rs2:x3(0x00000000), imm:0x1
+ TEST_RI_OP(sm4ed, x14, x3, 0x1, 0xb42a71a4, 0xefffffff, 0x00000000, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x51a4a42a), rs1=>rd:x15(0xdfffffff), rs2:x2(0x00000000), imm:0x3
+ TEST_RI_OP(sm4ed, x15, x2, 0x3, 0x51a4a42a, 0xdfffffff, 0x00000000, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xe42a71a4), rs1=>rd:x16(0xbfffffff), rs2:x1(0x00000000), imm:0x1
+ TEST_RI_OP(sm4ed, x16, x1, 0x1, 0xe42a71a4, 0xbfffffff, 0x00000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xaa71a4a4), rs1=>rd:x17(0x7fffffff), rs2:x31(0x00000000), imm:0x2
+ TEST_RI_OP(sm4ed, x17, x31, 0x2, 0xaa71a4a4, 0x7fffffff, 0x00000000, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xa4a42a71), rs1=>rd:x18(0xffffffff), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x18, x30, 0x0, 0xa4a42a71, 0xffffffff, 0x00000000, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0x8b54c90d), rs1=>rd:x19(0xadea5195), rs2:x29(0x121bcc23), imm:0x2
+ TEST_RI_OP(sm4ed, x19, x29, 0x2, 0x8b54c90d, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1=>rd:x0(0xd2ffbec1), rs2:x28(0xa47d105b), imm:0x1
+ TEST_RI_OP(sm4ed, x0, x28, 0x1, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x26baf36e), rs1=>rd:x21(0xa8e1a8bb), rs2:x0(0x707af2c0), imm:0x3
+ TEST_RI_OP(sm4ed, x21, x0, 0x3, 0x26baf36e, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with random values
+ // result rd:x22(0x856c3aa3), rs1=>rd:x22(0x48c99fcb), rs2:x26(0xe19bfbc3), imm:0x3
+ TEST_RI_OP(sm4ed, x22, x26, 0x3, 0x856c3aa3, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SM4ED-02.S b/riscof/suite/rv32i_m/K_unratified/SM4ED-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..e5c58645bc081d18b28876ae7b85bc0c398059a8
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SM4ED-02.S
@@ -0,0 +1,1779 @@
+// RISC-V Architectural Validation Test SM4ED-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sm4ed'.
+// Using dataset: sbox32
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",sm4ed)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox32
+ // result rd:x1(0xf6b1841b), rs1=>rd:x1(0xadea5195), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ed, x1, x16, 0x0, 0xf6b1841b, 0xadea5195, 0x00000000, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox32
+ // result rd:x2(0x906d6e83), rs1=>rd:x2(0xd2ffbec1), rs2:x15(0x00000100), imm:0x1
+ TEST_RI_OP(sm4ed, x2, x15, 0x1, 0x906d6e83, 0xd2ffbec1, 0x00000100, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox32
+ // result rd:x3(0x42ac0f1c), rs1=>rd:x3(0xa8e1a8bb), rs2:x14(0x00020000), imm:0x2
+ TEST_RI_OP(sm4ed, x3, x14, 0x2, 0x42ac0f1c, 0xa8e1a8bb, 0x00020000, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox32
+ // result rd:x4(0x4e326436), rs1=>rd:x4(0x48c99fcb), rs2:x13(0x03000000), imm:0x3
+ TEST_RI_OP(sm4ed, x4, x13, 0x3, 0x4e326436, 0x48c99fcb, 0x03000000, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox32
+ // result rd:x5(0x752e9db3), rs1=>rd:x5(0x461d524f), rs2:x12(0x00000004), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0x752e9db3, 0x461d524f, 0x00000004, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox32
+ // result rd:x6(0xd5687528), rs1=>rd:x6(0x528a10af), rs2:x11(0x00000500), imm:0x1
+ TEST_RI_OP(sm4ed, x6, x11, 0x1, 0xd5687528, 0x528a10af, 0x00000500, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox32
+ // result rd:x7(0xdc520f37), rs1=>rd:x7(0xe19bfbc3), rs2:x10(0x00060000), imm:0x2
+ TEST_RI_OP(sm4ed, x7, x10, 0x2, 0xdc520f37, 0xe19bfbc3, 0x00060000, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox32
+ // result rd:x8(0x1ba42c75), rs1=>rd:x8(0x707af2c0), rs2:x9(0x07000000), imm:0x3
+ TEST_RI_OP(sm4ed, x8, x9, 0x3, 0x1ba42c75, 0x707af2c0, 0x07000000, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox32
+ // result rd:x9(0xfc250615), rs1=>rd:x9(0xa47d105b), rs2:x8(0x00000008), imm:0x0
+ TEST_RI_OP(sm4ed, x9, x8, 0x0, 0xfc250615, 0xa47d105b, 0x00000008, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox32
+ // result rd:x10(0xc8afa2f9), rs1=>rd:x10(0x121bcc23), rs2:x7(0x00000900), imm:0x1
+ TEST_RI_OP(sm4ed, x10, x7, 0x1, 0xc8afa2f9, 0x121bcc23, 0x00000900, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox32
+ // result rd:x11(0xb9ae01c5), rs1=>rd:x11(0xadea5195), rs2:x6(0x000a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x11, x6, 0x2, 0xb9ae01c5, 0xadea5195, 0x000a0000, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox32
+ // result rd:x12(0x18f4b500), rs1=>rd:x12(0xd2ffbec1), rs2:x5(0x0b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x12, x5, 0x3, 0x18f4b500, 0xd2ffbec1, 0x0b000000, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox32
+ // result rd:x13(0x08418033), rs1=>rd:x13(0xa8e1a8bb), rs2:x4(0x0000000c), imm:0x0
+ TEST_RI_OP(sm4ed, x13, x4, 0x0, 0x08418033, 0xa8e1a8bb, 0x0000000c, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox32
+ // result rd:x14(0xa7318824), rs1=>rd:x14(0x48c99fcb), rs2:x3(0x00000d00), imm:0x1
+ TEST_RI_OP(sm4ed, x14, x3, 0x1, 0xa7318824, 0x48c99fcb, 0x00000d00, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox32
+ // result rd:x15(0x6a81e2ff), rs1=>rd:x15(0x461d524f), rs2:x2(0x000e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x15, x2, 0x2, 0x6a81e2ff, 0x461d524f, 0x000e0000, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox32
+ // result rd:x16(0x439e04aa), rs1=>rd:x16(0x528a10af), rs2:x1(0x0f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x16, x1, 0x3, 0x439e04aa, 0x528a10af, 0x0f000000, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox32
+ // result rd:x17(0x4d37d044), rs1=>rd:x17(0xe19bfbc3), rs2:x31(0x00000010), imm:0x0
+ TEST_RI_OP(sm4ed, x17, x31, 0x0, 0x4d37d044, 0xe19bfbc3, 0x00000010, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox32
+ // result rd:x18(0xed1c095d), rs1=>rd:x18(0x707af2c0), rs2:x30(0x00001100), imm:0x1
+ TEST_RI_OP(sm4ed, x18, x30, 0x1, 0xed1c095d, 0x707af2c0, 0x00001100, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox32
+ // result rd:x19(0x3c8f7a31), rs1=>rd:x19(0xa47d105b), rs2:x29(0x00120000), imm:0x2
+ TEST_RI_OP(sm4ed, x19, x29, 0x2, 0x3c8f7a31, 0xa47d105b, 0x00120000, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox32
+ // result rd:x20(0xbcc21554), rs1=>rd:x20(0x121bcc23), rs2:x28(0x13000000), imm:0x3
+ TEST_RI_OP(sm4ed, x20, x28, 0x3, 0xbcc21554, 0x121bcc23, 0x13000000, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox32
+ // result rd:x21(0x05427b17), rs1=>rd:x21(0xadea5195), rs2:x27(0x00000014), imm:0x0
+ TEST_RI_OP(sm4ed, x21, x27, 0x0, 0x05427b17, 0xadea5195, 0x00000014, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox32
+ // result rd:x22(0x2843f83b), rs1=>rd:x22(0xd2ffbec1), rs2:x26(0x00001500), imm:0x1
+ TEST_RI_OP(sm4ed, x22, x26, 0x1, 0x2843f83b, 0xd2ffbec1, 0x00001500, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox32
+ // result rd:x23(0xacf5b8ab), rs1=>rd:x23(0xa8e1a8bb), rs2:x25(0x00160000), imm:0x2
+ TEST_RI_OP(sm4ed, x23, x25, 0x2, 0xacf5b8ab, 0xa8e1a8bb, 0x00160000, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox32
+ // result rd:x24(0xd80f0fc0), rs1=>rd:x24(0x48c99fcb), rs2:x24(0x17000000), imm:0x3
+ TEST_RI_OP(sm4ed, x24, x24, 0x3, 0xd80f0fc0, 0x48c99fcb, 0x17000000, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox32
+ // result rd:x25(0xecb7fa4d), rs1=>rd:x25(0x461d524f), rs2:x23(0x00000018), imm:0x0
+ TEST_RI_OP(sm4ed, x25, x23, 0x0, 0xecb7fa4d, 0x461d524f, 0x00000018, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox32
+ // result rd:x26(0x43cf44be), rs1=>rd:x26(0x528a10af), rs2:x22(0x00001900), imm:0x1
+ TEST_RI_OP(sm4ed, x26, x22, 0x1, 0x43cf44be, 0x528a10af, 0x00001900, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox32
+ // result rd:x27(0xf2c4b78f), rs1=>rd:x27(0xe19bfbc3), rs2:x21(0x001a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x27, x21, 0x2, 0xf2c4b78f, 0xe19bfbc3, 0x001a0000, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox32
+ // result rd:x28(0xcee26ae6), rs1=>rd:x28(0x707af2c0), rs2:x20(0x1b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x28, x20, 0x3, 0xcee26ae6, 0x707af2c0, 0x1b000000, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox32
+ // result rd:x29(0x81585836), rs1=>rd:x29(0xa47d105b), rs2:x19(0x0000001c), imm:0x0
+ TEST_RI_OP(sm4ed, x29, x19, 0x0, 0x81585836, 0xa47d105b, 0x0000001c, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox32
+ // result rd:x30(0x089f5239), rs1=>rd:x30(0x121bcc23), rs2:x18(0x00001d00), imm:0x1
+ TEST_RI_OP(sm4ed, x30, x18, 0x1, 0x089f5239, 0x121bcc23, 0x00001d00, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox32
+ // result rd:x31(0xabf4498d), rs1=>rd:x31(0xadea5195), rs2:x17(0x001e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x31, x17, 0x2, 0xabf4498d, 0xadea5195, 0x001e0000, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox32
+ // result rd:x1(0x2f99d85a), rs1=>rd:x1(0xd2ffbec1), rs2:x16(0x1f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x1, x16, 0x3, 0x2f99d85a, 0xd2ffbec1, 0x1f000000, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox32
+ // result rd:x2(0xda933657), rs1=>rd:x2(0xa8e1a8bb), rs2:x15(0x00000020), imm:0x0
+ TEST_RI_OP(sm4ed, x2, x15, 0x0, 0xda933657, 0xa8e1a8bb, 0x00000020, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox32
+ // result rd:x3(0x418ad5c2), rs1=>rd:x3(0x48c99fcb), rs2:x14(0x00002100), imm:0x1
+ TEST_RI_OP(sm4ed, x3, x14, 0x1, 0x418ad5c2, 0x48c99fcb, 0x00002100, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox32
+ // result rd:x4(0x170d130e), rs1=>rd:x4(0x461d524f), rs2:x13(0x00220000), imm:0x2
+ TEST_RI_OP(sm4ed, x4, x13, 0x2, 0x170d130e, 0x461d524f, 0x00220000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox32
+ // result rd:x5(0x7659c358), rs1=>rd:x5(0x528a10af), rs2:x12(0x23000000), imm:0x3
+ TEST_RI_OP(sm4ed, x5, x12, 0x3, 0x7659c358, 0x528a10af, 0x23000000, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox32
+ // result rd:x6(0xa7dd6816), rs1=>rd:x6(0xe19bfbc3), rs2:x11(0x00000024), imm:0x0
+ TEST_RI_OP(sm4ed, x6, x11, 0x0, 0xa7dd6816, 0xe19bfbc3, 0x00000024, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox32
+ // result rd:x7(0xcf96a17f), rs1=>rd:x7(0x707af2c0), rs2:x10(0x00002500), imm:0x1
+ TEST_RI_OP(sm4ed, x7, x10, 0x1, 0xcf96a17f, 0x707af2c0, 0x00002500, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox32
+ // result rd:x8(0x3e857239), rs1=>rd:x8(0xa47d105b), rs2:x9(0x00260000), imm:0x2
+ TEST_RI_OP(sm4ed, x8, x9, 0x2, 0x3e857239, 0xa47d105b, 0x00260000, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox32
+ // result rd:x9(0x80f22558), rs1=>rd:x9(0x121bcc23), rs2:x8(0x27000000), imm:0x3
+ TEST_RI_OP(sm4ed, x9, x8, 0x3, 0x80f22558, 0x121bcc23, 0x27000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox32
+ // result rd:x10(0x6126626a), rs1=>rd:x10(0xadea5195), rs2:x7(0x00000028), imm:0x0
+ TEST_RI_OP(sm4ed, x10, x7, 0x0, 0x6126626a, 0xadea5195, 0x00000028, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox32
+ // result rd:x11(0x83aaba90), rs1=>rd:x11(0xd2ffbec1), rs2:x6(0x00002900), imm:0x1
+ TEST_RI_OP(sm4ed, x11, x6, 0x1, 0x83aaba90, 0xd2ffbec1, 0x00002900, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox32
+ // result rd:x12(0xa3c68497), rs1=>rd:x12(0xa8e1a8bb), rs2:x5(0x002a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x12, x5, 0x2, 0xa3c68497, 0xa8e1a8bb, 0x002a0000, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox32
+ // result rd:x13(0x07c49289), rs1=>rd:x13(0x48c99fcb), rs2:x4(0x2b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x13, x4, 0x3, 0x07c49289, 0x48c99fcb, 0x2b000000, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox32
+ // result rd:x14(0xf1aabc16), rs1=>rd:x14(0x461d524f), rs2:x3(0x0000002c), imm:0x0
+ TEST_RI_OP(sm4ed, x14, x3, 0x0, 0xf1aabc16, 0x461d524f, 0x0000002c, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox32
+ // result rd:x15(0x6d46e390), rs1=>rd:x15(0x528a10af), rs2:x2(0x00002d00), imm:0x1
+ TEST_RI_OP(sm4ed, x15, x2, 0x1, 0x6d46e390, 0x528a10af, 0x00002d00, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox32
+ // result rd:x16(0x4f874971), rs1=>rd:x16(0xe19bfbc3), rs2:x1(0x002e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x16, x1, 0x2, 0x4f874971, 0xe19bfbc3, 0x002e0000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox32
+ // result rd:x17(0x9af37ba3), rs1=>rd:x17(0x707af2c0), rs2:x31(0x2f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x17, x31, 0x3, 0x9af37ba3, 0x707af2c0, 0x2f000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox32
+ // result rd:x18(0x37eef72f), rs1=>rd:x18(0xa47d105b), rs2:x30(0x00000030), imm:0x0
+ TEST_RI_OP(sm4ed, x18, x30, 0x0, 0x37eef72f, 0xa47d105b, 0x00000030, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox32
+ // result rd:x19(0xdcaab3ed), rs1=>rd:x19(0x121bcc23), rs2:x29(0x00003100), imm:0x1
+ TEST_RI_OP(sm4ed, x19, x29, 0x1, 0xdcaab3ed, 0x121bcc23, 0x00003100, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox32
+ // result rd:x20(0xb18621e5), rs1=>rd:x20(0xadea5195), rs2:x28(0x00320000), imm:0x2
+ TEST_RI_OP(sm4ed, x20, x28, 0x2, 0xb18621e5, 0xadea5195, 0x00320000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox32
+ // result rd:x21(0xdf59186a), rs1=>rd:x21(0xd2ffbec1), rs2:x27(0x33000000), imm:0x3
+ TEST_RI_OP(sm4ed, x21, x27, 0x3, 0xdf59186a, 0xd2ffbec1, 0x33000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox32
+ // result rd:x22(0x8fc66256), rs1=>rd:x22(0xa8e1a8bb), rs2:x26(0x00000034), imm:0x0
+ TEST_RI_OP(sm4ed, x22, x26, 0x0, 0x8fc66256, 0xa8e1a8bb, 0x00000034, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox32
+ // result rd:x23(0x68c1b7eb), rs1=>rd:x23(0x48c99fcb), rs2:x25(0x00003500), imm:0x1
+ TEST_RI_OP(sm4ed, x23, x25, 0x1, 0x68c1b7eb, 0x48c99fcb, 0x00003500, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox32
+ // result rd:x24(0xeb7ea3a3), rs1=>rd:x24(0x461d524f), rs2:x24(0x00360000), imm:0x2
+ TEST_RI_OP(sm4ed, x24, x24, 0x2, 0xeb7ea3a3, 0x461d524f, 0x00360000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox32
+ // result rd:x25(0x93dc4638), rs1=>rd:x25(0x528a10af), rs2:x23(0x37000000), imm:0x3
+ TEST_RI_OP(sm4ed, x25, x23, 0x3, 0x93dc4638, 0x528a10af, 0x37000000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox32
+ // result rd:x26(0xe3997943), rs1=>rd:x26(0xe19bfbc3), rs2:x22(0x00000038), imm:0x0
+ TEST_RI_OP(sm4ed, x26, x22, 0x0, 0xe3997943, 0xe19bfbc3, 0x00000038, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox32
+ // result rd:x27(0x0fa651bf), rs1=>rd:x27(0x707af2c0), rs2:x21(0x00003900), imm:0x1
+ TEST_RI_OP(sm4ed, x27, x21, 0x1, 0x0fa651bf, 0x707af2c0, 0x00003900, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox32
+ // result rd:x28(0x32b94209), rs1=>rd:x28(0xa47d105b), rs2:x20(0x003a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x28, x20, 0x2, 0x32b94209, 0xa47d105b, 0x003a0000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox32
+ // result rd:x29(0x00f027da), rs1=>rd:x29(0x121bcc23), rs2:x19(0x3b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x29, x19, 0x3, 0x00f027da, 0x121bcc23, 0x3b000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox32
+ // result rd:x30(0x783f2534), rs1=>rd:x30(0xadea5195), rs2:x18(0x0000003c), imm:0x0
+ TEST_RI_OP(sm4ed, x30, x18, 0x0, 0x783f2534, 0xadea5195, 0x0000003c, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox32
+ // result rd:x31(0xec720dff), rs1=>rd:x31(0xd2ffbec1), rs2:x17(0x00003d00), imm:0x1
+ TEST_RI_OP(sm4ed, x31, x17, 0x1, 0xec720dff, 0xd2ffbec1, 0x00003d00, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox32
+ // result rd:x1(0x97225447), rs1=>rd:x1(0xa8e1a8bb), rs2:x16(0x003e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x1, x16, 0x2, 0x97225447, 0xa8e1a8bb, 0x003e0000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox32
+ // result rd:x2(0x7653056f), rs1=>rd:x2(0x48c99fcb), rs2:x15(0x3f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x2, x15, 0x3, 0x7653056f, 0x48c99fcb, 0x3f000000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox32
+ // result rd:x3(0x5b001414), rs1=>rd:x3(0x461d524f), rs2:x14(0x00000040), imm:0x0
+ TEST_RI_OP(sm4ed, x3, x14, 0x0, 0x5b001414, 0x461d524f, 0x00000040, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox32
+ // result rd:x4(0x4e8d0bb3), rs1=>rd:x4(0x528a10af), rs2:x13(0x00004100), imm:0x1
+ TEST_RI_OP(sm4ed, x4, x13, 0x1, 0x4e8d0bb3, 0x528a10af, 0x00004100, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox32
+ // result rd:x5(0x44a0655d), rs1=>rd:x5(0xe19bfbc3), rs2:x12(0x00420000), imm:0x2
+ TEST_RI_OP(sm4ed, x5, x12, 0x2, 0x44a0655d, 0xe19bfbc3, 0x00420000, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox32
+ // result rd:x6(0x7c89013f), rs1=>rd:x6(0x707af2c0), rs2:x11(0x43000000), imm:0x3
+ TEST_RI_OP(sm4ed, x6, x11, 0x3, 0x7c89013f, 0x707af2c0, 0x43000000, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox32
+ // result rd:x7(0x6bb2e064), rs1=>rd:x7(0xa47d105b), rs2:x10(0x00000044), imm:0x0
+ TEST_RI_OP(sm4ed, x7, x10, 0x0, 0x6bb2e064, 0xa47d105b, 0x00000044, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox32
+ // result rd:x8(0xdf6973ee), rs1=>rd:x8(0x121bcc23), rs2:x9(0x00004500), imm:0x1
+ TEST_RI_OP(sm4ed, x8, x9, 0x1, 0xdf6973ee, 0x121bcc23, 0x00004500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox32
+ // result rd:x9(0xbaa10dc9), rs1=>rd:x9(0xadea5195), rs2:x8(0x00460000), imm:0x2
+ TEST_RI_OP(sm4ed, x9, x8, 0x2, 0xbaa10dc9, 0xadea5195, 0x00460000, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox32
+ // result rd:x10(0x80155479), rs1=>rd:x10(0xd2ffbec1), rs2:x7(0x47000000), imm:0x3
+ TEST_RI_OP(sm4ed, x10, x7, 0x3, 0x80155479, 0xd2ffbec1, 0x47000000, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox32
+ // result rd:x11(0xa6ef2934), rs1=>rd:x11(0xa8e1a8bb), rs2:x6(0x00000048), imm:0x0
+ TEST_RI_OP(sm4ed, x11, x6, 0x0, 0xa6ef2934, 0xa8e1a8bb, 0x00000048, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox32
+ // result rd:x12(0x2d91a2ae), rs1=>rd:x12(0x48c99fcb), rs2:x5(0x00004900), imm:0x1
+ TEST_RI_OP(sm4ed, x12, x5, 0x1, 0x2d91a2ae, 0x48c99fcb, 0x00004900, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox32
+ // result rd:x13(0x7ad1a2bf), rs1=>rd:x13(0x461d524f), rs2:x4(0x004a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x13, x4, 0x2, 0x7ad1a2bf, 0x461d524f, 0x004a0000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox32
+ // result rd:x14(0x2fee74b6), rs1=>rd:x14(0x528a10af), rs2:x3(0x4b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x14, x3, 0x3, 0x2fee74b6, 0x528a10af, 0x4b000000, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox32
+ // result rd:x15(0x7a001ebd), rs1=>rd:x15(0xe19bfbc3), rs2:x2(0x0000004c), imm:0x0
+ TEST_RI_OP(sm4ed, x15, x2, 0x0, 0x7a001ebd, 0xe19bfbc3, 0x0000004c, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox32
+ // result rd:x16(0x66fd63d6), rs1=>rd:x16(0x707af2c0), rs2:x1(0x00004d00), imm:0x1
+ TEST_RI_OP(sm4ed, x16, x1, 0x1, 0x66fd63d6, 0x707af2c0, 0x00004d00, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox32
+ // result rd:x17(0xea0e2d66), rs1=>rd:x17(0xa47d105b), rs2:x31(0x004e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x17, x31, 0x2, 0xea0e2d66, 0xa47d105b, 0x004e0000, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox32
+ // result rd:x18(0x1ab96e89), rs1=>rd:x18(0x121bcc23), rs2:x30(0x4f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x18, x30, 0x3, 0x1ab96e89, 0x121bcc23, 0x4f000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox32
+ // result rd:x19(0x0c4b385d), rs1=>rd:x19(0xadea5195), rs2:x29(0x00000050), imm:0x0
+ TEST_RI_OP(sm4ed, x19, x29, 0x0, 0x0c4b385d, 0xadea5195, 0x00000050, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox32
+ // result rd:x20(0x7f95796c), rs1=>rd:x20(0xd2ffbec1), rs2:x28(0x00005100), imm:0x1
+ TEST_RI_OP(sm4ed, x20, x28, 0x1, 0x7f95796c, 0xd2ffbec1, 0x00005100, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox32
+ // result rd:x21(0x2b64aebd), rs1=>rd:x21(0xa8e1a8bb), rs2:x27(0x00520000), imm:0x2
+ TEST_RI_OP(sm4ed, x21, x27, 0x2, 0x2b64aebd, 0xa8e1a8bb, 0x00520000, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox32
+ // result rd:x22(0x3203557b), rs1=>rd:x22(0x48c99fcb), rs2:x26(0x53000000), imm:0x3
+ TEST_RI_OP(sm4ed, x22, x26, 0x3, 0x3203557b, 0x48c99fcb, 0x53000000, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox32
+ // result rd:x23(0x83d822fa), rs1=>rd:x23(0x461d524f), rs2:x25(0x00000054), imm:0x0
+ TEST_RI_OP(sm4ed, x23, x25, 0x0, 0x83d822fa, 0x461d524f, 0x00000054, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox32
+ // result rd:x24(0x9165a191), rs1=>rd:x24(0x528a10af), rs2:x24(0x00005500), imm:0x1
+ TEST_RI_OP(sm4ed, x24, x24, 0x1, 0x9165a191, 0x528a10af, 0x00005500, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox32
+ // result rd:x25(0x382990a8), rs1=>rd:x25(0xe19bfbc3), rs2:x23(0x00560000), imm:0x2
+ TEST_RI_OP(sm4ed, x25, x23, 0x2, 0x382990a8, 0xe19bfbc3, 0x00560000, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox32
+ // result rd:x26(0xd754dc49), rs1=>rd:x26(0x707af2c0), rs2:x22(0x57000000), imm:0x3
+ TEST_RI_OP(sm4ed, x26, x22, 0x3, 0xd754dc49, 0x707af2c0, 0x57000000, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox32
+ // result rd:x27(0x479eeb43), rs1=>rd:x27(0xa47d105b), rs2:x21(0x00000058), imm:0x0
+ TEST_RI_OP(sm4ed, x27, x21, 0x0, 0x479eeb43, 0xa47d105b, 0x00000058, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox32
+ // result rd:x28(0xbdf38b8c), rs1=>rd:x28(0x121bcc23), rs2:x20(0x00005900), imm:0x1
+ TEST_RI_OP(sm4ed, x28, x20, 0x1, 0xbdf38b8c, 0x121bcc23, 0x00005900, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox32
+ // result rd:x29(0xa2d96da9), rs1=>rd:x29(0xadea5195), rs2:x19(0x005a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x29, x19, 0x2, 0xa2d96da9, 0xadea5195, 0x005a0000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox32
+ // result rd:x30(0xb5d2938b), rs1=>rd:x30(0xd2ffbec1), rs2:x18(0x5b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x30, x18, 0x3, 0xb5d2938b, 0xd2ffbec1, 0x5b000000, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox32
+ // result rd:x31(0x6920d90b), rs1=>rd:x31(0xa8e1a8bb), rs2:x17(0x0000005c), imm:0x0
+ TEST_RI_OP(sm4ed, x31, x17, 0x0, 0x6920d90b, 0xa8e1a8bb, 0x0000005c, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox32
+ // result rd:x1(0x119e9192), rs1=>rd:x1(0x48c99fcb), rs2:x16(0x00005d00), imm:0x1
+ TEST_RI_OP(sm4ed, x1, x16, 0x1, 0x119e9192, 0x48c99fcb, 0x00005d00, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox32
+ // result rd:x2(0xd9f42439), rs1=>rd:x2(0x461d524f), rs2:x15(0x005e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x2, x15, 0x2, 0xd9f42439, 0x461d524f, 0x005e0000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox32
+ // result rd:x3(0xb35ec49a), rs1=>rd:x3(0x528a10af), rs2:x14(0x5f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x3, x14, 0x3, 0xb35ec49a, 0x528a10af, 0x5f000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox32
+ // result rd:x4(0x99e3e5a5), rs1=>rd:x4(0xe19bfbc3), rs2:x13(0x00000060), imm:0x0
+ TEST_RI_OP(sm4ed, x4, x13, 0x0, 0x99e3e5a5, 0xe19bfbc3, 0x00000060, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox32
+ // result rd:x5(0xe05e4650), rs1=>rd:x5(0x707af2c0), rs2:x12(0x00006100), imm:0x1
+ TEST_RI_OP(sm4ed, x5, x12, 0x1, 0xe05e4650, 0x707af2c0, 0x00006100, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox32
+ // result rd:x6(0xaa4b2863), rs1=>rd:x6(0xa47d105b), rs2:x11(0x00620000), imm:0x2
+ TEST_RI_OP(sm4ed, x6, x11, 0x2, 0xaa4b2863, 0xa47d105b, 0x00620000, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox32
+ // result rd:x7(0x3462b57c), rs1=>rd:x7(0x121bcc23), rs2:x10(0x63000000), imm:0x3
+ TEST_RI_OP(sm4ed, x7, x10, 0x3, 0x3462b57c, 0x121bcc23, 0x63000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox32
+ // result rd:x8(0x2067337a), rs1=>rd:x8(0xadea5195), rs2:x9(0x00000064), imm:0x0
+ TEST_RI_OP(sm4ed, x8, x9, 0x0, 0x2067337a, 0xadea5195, 0x00000064, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox32
+ // result rd:x9(0xb3a686a0), rs1=>rd:x9(0xd2ffbec1), rs2:x8(0x00006500), imm:0x1
+ TEST_RI_OP(sm4ed, x9, x8, 0x1, 0xb3a686a0, 0xd2ffbec1, 0x00006500, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox32
+ // result rd:x10(0x7a74effc), rs1=>rd:x10(0xa8e1a8bb), rs2:x7(0x00660000), imm:0x2
+ TEST_RI_OP(sm4ed, x10, x7, 0x2, 0x7a74effc, 0xa8e1a8bb, 0x00660000, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox32
+ // result rd:x11(0x6243156b), rs1=>rd:x11(0x48c99fcb), rs2:x6(0x67000000), imm:0x3
+ TEST_RI_OP(sm4ed, x11, x6, 0x3, 0x6243156b, 0x48c99fcb, 0x67000000, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox32
+ // result rd:x12(0xd28977fe), rs1=>rd:x12(0x461d524f), rs2:x5(0x00000068), imm:0x0
+ TEST_RI_OP(sm4ed, x12, x5, 0x0, 0xd28977fe, 0x461d524f, 0x00000068, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox32
+ // result rd:x13(0xdaa8ba27), rs1=>rd:x13(0x528a10af), rs2:x4(0x00006900), imm:0x1
+ TEST_RI_OP(sm4ed, x13, x4, 0x1, 0xdaa8ba27, 0x528a10af, 0x00006900, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox32
+ // result rd:x14(0x9c170a32), rs1=>rd:x14(0xe19bfbc3), rs2:x3(0x006a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x14, x3, 0x2, 0x9c170a32, 0xe19bfbc3, 0x006a0000, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox32
+ // result rd:x15(0xa7961efb), rs1=>rd:x15(0x707af2c0), rs2:x2(0x6b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x15, x2, 0x3, 0xa7961efb, 0x707af2c0, 0x6b000000, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox32
+ // result rd:x16(0xa079115e), rs1=>rd:x16(0xa47d105b), rs2:x1(0x0000006c), imm:0x0
+ TEST_RI_OP(sm4ed, x16, x1, 0x0, 0xa079115e, 0xa47d105b, 0x0000006c, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox32
+ // result rd:x17(0x963a69a7), rs1=>rd:x17(0x121bcc23), rs2:x31(0x00006d00), imm:0x1
+ TEST_RI_OP(sm4ed, x17, x31, 0x1, 0x963a69a7, 0x121bcc23, 0x00006d00, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox32
+ // result rd:x18(0xd472b074), rs1=>rd:x18(0xadea5195), rs2:x30(0x006e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x18, x30, 0x2, 0xd472b074, 0xadea5195, 0x006e0000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox32
+ // result rd:x19(0x49e1a044), rs1=>rd:x19(0xd2ffbec1), rs2:x29(0x6f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x19, x29, 0x3, 0x49e1a044, 0xd2ffbec1, 0x6f000000, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox32
+ // result rd:x20(0xfbb27f3f), rs1=>rd:x20(0xa8e1a8bb), rs2:x28(0x00000070), imm:0x0
+ TEST_RI_OP(sm4ed, x20, x28, 0x0, 0xfbb27f3f, 0xa8e1a8bb, 0x00000070, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox32
+ // result rd:x21(0x48c99fcb), rs1=>rd:x21(0x48c99fcb), rs2:x27(0x00007100), imm:0x1
+ TEST_RI_OP(sm4ed, x21, x27, 0x1, 0x48c99fcb, 0x48c99fcb, 0x00007100, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox32
+ // result rd:x22(0x01434b56), rs1=>rd:x22(0x461d524f), rs2:x26(0x00720000), imm:0x2
+ TEST_RI_OP(sm4ed, x22, x26, 0x2, 0x01434b56, 0x461d524f, 0x00720000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox32
+ // result rd:x23(0x59d74df9), rs1=>rd:x23(0x528a10af), rs2:x25(0x73000000), imm:0x3
+ TEST_RI_OP(sm4ed, x23, x25, 0x3, 0x59d74df9, 0x528a10af, 0x73000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox32
+ // result rd:x24(0x7e7e9d97), rs1=>rd:x24(0xe19bfbc3), rs2:x24(0x00000074), imm:0x0
+ TEST_RI_OP(sm4ed, x24, x24, 0x0, 0x7e7e9d97, 0xe19bfbc3, 0x00000074, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox32
+ // result rd:x25(0x3faa6d8f), rs1=>rd:x25(0x707af2c0), rs2:x23(0x00007500), imm:0x1
+ TEST_RI_OP(sm4ed, x25, x23, 0x1, 0x3faa6d8f, 0x707af2c0, 0x00007500, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox32
+ // result rd:x26(0x83c68cc7), rs1=>rd:x26(0xa47d105b), rs2:x22(0x00760000), imm:0x2
+ TEST_RI_OP(sm4ed, x26, x22, 0x2, 0x83c68cc7, 0xa47d105b, 0x00760000, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox32
+ // result rd:x27(0x08528570), rs1=>rd:x27(0x121bcc23), rs2:x21(0x77000000), imm:0x3
+ TEST_RI_OP(sm4ed, x27, x21, 0x3, 0x08528570, 0x121bcc23, 0x77000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox32
+ // result rd:x28(0x9cdb1ce9), rs1=>rd:x28(0xadea5195), rs2:x20(0x00000078), imm:0x0
+ TEST_RI_OP(sm4ed, x28, x20, 0x0, 0x9cdb1ce9, 0xadea5195, 0x00000078, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox32
+ // result rd:x29(0x0ac95019), rs1=>rd:x29(0xd2ffbec1), rs2:x19(0x00007900), imm:0x1
+ TEST_RI_OP(sm4ed, x29, x19, 0x1, 0x0ac95019, 0xd2ffbec1, 0x00007900, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox32
+ // result rd:x30(0xaaeba0b3), rs1=>rd:x30(0xa8e1a8bb), rs2:x18(0x007a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x30, x18, 0x2, 0xaaeba0b3, 0xa8e1a8bb, 0x007a0000, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox32
+ // result rd:x31(0x3356002f), rs1=>rd:x31(0x48c99fcb), rs2:x17(0x7b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x31, x17, 0x3, 0x3356002f, 0x48c99fcb, 0x7b000000, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox32
+ // result rd:x1(0xc49ff06f), rs1=>rd:x1(0x461d524f), rs2:x16(0x0000007c), imm:0x0
+ TEST_RI_OP(sm4ed, x1, x16, 0x0, 0xc49ff06f, 0x461d524f, 0x0000007c, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox32
+ // result rd:x2(0x414dc4bc), rs1=>rd:x2(0x528a10af), rs2:x15(0x00007d00), imm:0x1
+ TEST_RI_OP(sm4ed, x2, x15, 0x1, 0x414dc4bc, 0x528a10af, 0x00007d00, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox32
+ // result rd:x3(0x2a73d8e0), rs1=>rd:x3(0xe19bfbc3), rs2:x14(0x007e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x3, x14, 0x2, 0x2a73d8e0, 0xe19bfbc3, 0x007e0000, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox32
+ // result rd:x4(0x9600885c), rs1=>rd:x4(0x707af2c0), rs2:x13(0x7f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x4, x13, 0x3, 0x9600885c, 0x707af2c0, 0x7f000000, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox32
+ // result rd:x5(0x0fd6f919), rs1=>rd:x5(0xa47d105b), rs2:x12(0x00000080), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0x0fd6f919, 0xa47d105b, 0x00000080, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox32
+ // result rd:x6(0xeca68fdd), rs1=>rd:x6(0x121bcc23), rs2:x11(0x00008100), imm:0x1
+ TEST_RI_OP(sm4ed, x6, x11, 0x1, 0xeca68fdd, 0x121bcc23, 0x00008100, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox32
+ // result rd:x7(0x25487bbf), rs1=>rd:x7(0xadea5195), rs2:x10(0x00820000), imm:0x2
+ TEST_RI_OP(sm4ed, x7, x10, 0x2, 0x25487bbf, 0xadea5195, 0x00820000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox32
+ // result rd:x8(0x48b4f510), rs1=>rd:x8(0xd2ffbec1), rs2:x9(0x83000000), imm:0x3
+ TEST_RI_OP(sm4ed, x8, x9, 0x3, 0x48b4f510, 0xd2ffbec1, 0x83000000, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox32
+ // result rd:x9(0xa9e0e9fb), rs1=>rd:x9(0xa8e1a8bb), rs2:x8(0x00000084), imm:0x0
+ TEST_RI_OP(sm4ed, x9, x8, 0x0, 0xa9e0e9fb, 0xa8e1a8bb, 0x00000084, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox32
+ // result rd:x10(0x570d44d4), rs1=>rd:x10(0x48c99fcb), rs2:x7(0x00008500), imm:0x1
+ TEST_RI_OP(sm4ed, x10, x7, 0x1, 0x570d44d4, 0x48c99fcb, 0x00008500, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox32
+ // result rd:x11(0x7ec5b2af), rs1=>rd:x11(0x461d524f), rs2:x6(0x00860000), imm:0x2
+ TEST_RI_OP(sm4ed, x11, x6, 0x2, 0x7ec5b2af, 0x461d524f, 0x00860000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox32
+ // result rd:x12(0x335cc618), rs1=>rd:x12(0x528a10af), rs2:x5(0x87000000), imm:0x3
+ TEST_RI_OP(sm4ed, x12, x5, 0x3, 0x335cc618, 0x528a10af, 0x87000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox32
+ // result rd:x13(0x6f155aec), rs1=>rd:x13(0xe19bfbc3), rs2:x4(0x00000088), imm:0x0
+ TEST_RI_OP(sm4ed, x13, x4, 0x0, 0x6f155aec, 0xe19bfbc3, 0x00000088, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox32
+ // result rd:x14(0xaf8ed91f), rs1=>rd:x14(0x707af2c0), rs2:x3(0x00008900), imm:0x1
+ TEST_RI_OP(sm4ed, x14, x3, 0x1, 0xaf8ed91f, 0x707af2c0, 0x00008900, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox32
+ // result rd:x15(0x5547db90), rs1=>rd:x15(0xa47d105b), rs2:x2(0x008a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x15, x2, 0x2, 0x5547db90, 0xa47d105b, 0x008a0000, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox32
+ // result rd:x16(0xe420f7ee), rs1=>rd:x16(0x121bcc23), rs2:x1(0x8b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x16, x1, 0x3, 0xe420f7ee, 0x121bcc23, 0x8b000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox32
+ // result rd:x17(0x4a0dab88), rs1=>rd:x17(0xadea5195), rs2:x31(0x0000008c), imm:0x0
+ TEST_RI_OP(sm4ed, x17, x31, 0x0, 0x4a0dab88, 0xadea5195, 0x0000008c, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox32
+ // result rd:x18(0x579f5b44), rs1=>rd:x18(0xd2ffbec1), rs2:x30(0x00008d00), imm:0x1
+ TEST_RI_OP(sm4ed, x18, x30, 0x1, 0x579f5b44, 0xd2ffbec1, 0x00008d00, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox32
+ // result rd:x19(0xbda0fcef), rs1=>rd:x19(0xa8e1a8bb), rs2:x29(0x008e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x19, x29, 0x2, 0xbda0fcef, 0xa8e1a8bb, 0x008e0000, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox32
+ // result rd:x20(0x6d4f1968), rs1=>rd:x20(0x48c99fcb), rs2:x28(0x8f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x20, x28, 0x3, 0x6d4f1968, 0x48c99fcb, 0x8f000000, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox32
+ // result rd:x21(0xc59eb12f), rs1=>rd:x21(0x461d524f), rs2:x27(0x00000090), imm:0x0
+ TEST_RI_OP(sm4ed, x21, x27, 0x0, 0xc59eb12f, 0x461d524f, 0x00000090, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox32
+ // result rd:x22(0xe8260615), rs1=>rd:x22(0x528a10af), rs2:x26(0x00009100), imm:0x1
+ TEST_RI_OP(sm4ed, x22, x26, 0x1, 0xe8260615, 0x528a10af, 0x00009100, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox32
+ // result rd:x23(0xbdb28eb6), rs1=>rd:x23(0xe19bfbc3), rs2:x25(0x00920000), imm:0x2
+ TEST_RI_OP(sm4ed, x23, x25, 0x2, 0xbdb28eb6, 0xe19bfbc3, 0x00920000, x1, 4, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox32
+ // result rd:x24(0xa79292a6), rs1=>rd:x24(0x707af2c0), rs2:x24(0x93000000), imm:0x3
+ TEST_RI_OP(sm4ed, x24, x24, 0x3, 0xa79292a6, 0x707af2c0, 0x93000000, x1, 8, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox32
+ // result rd:x25(0xca1389ac), rs1=>rd:x25(0xa47d105b), rs2:x23(0x00000094), imm:0x0
+ TEST_RI_OP(sm4ed, x25, x23, 0x0, 0xca1389ac, 0xa47d105b, 0x00000094, x1, 12, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox32
+ // result rd:x26(0xc22f28f3), rs1=>rd:x26(0x121bcc23), rs2:x22(0x00009500), imm:0x1
+ TEST_RI_OP(sm4ed, x26, x22, 0x1, 0xc22f28f3, 0x121bcc23, 0x00009500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox32
+ // result rd:x27(0xb79839fd), rs1=>rd:x27(0xadea5195), rs2:x21(0x00960000), imm:0x2
+ TEST_RI_OP(sm4ed, x27, x21, 0x2, 0xb79839fd, 0xadea5195, 0x00960000, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox32
+ // result rd:x28(0xd3aaeb95), rs1=>rd:x28(0xd2ffbec1), rs2:x20(0x97000000), imm:0x3
+ TEST_RI_OP(sm4ed, x28, x20, 0x3, 0xd3aaeb95, 0xd2ffbec1, 0x97000000, x6, 4, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox32
+ // result rd:x29(0x1e5707a2), rs1=>rd:x29(0xa8e1a8bb), rs2:x19(0x00000098), imm:0x0
+ TEST_RI_OP(sm4ed, x29, x19, 0x0, 0x1e5707a2, 0xa8e1a8bb, 0x00000098, x6, 8, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox32
+ // result rd:x30(0x06584085), rs1=>rd:x30(0x48c99fcb), rs2:x18(0x00009900), imm:0x1
+ TEST_RI_OP(sm4ed, x30, x18, 0x1, 0x06584085, 0x48c99fcb, 0x00009900, x6, 12, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox32
+ // result rd:x31(0x74e79a87), rs1=>rd:x31(0x461d524f), rs2:x17(0x009a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x31, x17, 0x2, 0x74e79a87, 0x461d524f, 0x009a0000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox32
+ // result rd:x1(0xa24ad09f), rs1=>rd:x1(0x528a10af), rs2:x16(0x9b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x1, x16, 0x3, 0xa24ad09f, 0x528a10af, 0x9b000000, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox32
+ // result rd:x2(0x364c0de2), rs1=>rd:x2(0xe19bfbc3), rs2:x15(0x0000009c), imm:0x0
+ TEST_RI_OP(sm4ed, x2, x15, 0x0, 0x364c0de2, 0xe19bfbc3, 0x0000009c, x6, 4, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox32
+ // result rd:x3(0x42f44ef2), rs1=>rd:x3(0x707af2c0), rs2:x14(0x00009d00), imm:0x1
+ TEST_RI_OP(sm4ed, x3, x14, 0x1, 0x42f44ef2, 0x707af2c0, 0x00009d00, x6, 8, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox32
+ // result rd:x4(0x1708d69d), rs1=>rd:x4(0xa47d105b), rs2:x13(0x009e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x4, x13, 0x2, 0x1708d69d, 0xa47d105b, 0x009e0000, x6, 12, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox32
+ // result rd:x5(0x7d9443c3), rs1=>rd:x5(0x121bcc23), rs2:x12(0x9f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x5, x12, 0x3, 0x7d9443c3, 0x121bcc23, 0x9f000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox32
+ // result rd:x6(0xd99e4cfc), rs1=>rd:x6(0xadea5195), rs2:x11(0x000000a0), imm:0x0
+ TEST_RI_OP(sm4ed, x6, x11, 0x0, 0xd99e4cfc, 0xadea5195, 0x000000a0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox32
+ // result rd:x7(0x090a901a), rs1=>rd:x7(0xd2ffbec1), rs2:x10(0x0000a100), imm:0x1
+ TEST_RI_OP(sm4ed, x7, x10, 0x1, 0x090a901a, 0xd2ffbec1, 0x0000a100, x1, 4, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox32
+ // result rd:x8(0x498b2330), rs1=>rd:x8(0xa8e1a8bb), rs2:x9(0x00a20000), imm:0x2
+ TEST_RI_OP(sm4ed, x8, x9, 0x2, 0x498b2330, 0xa8e1a8bb, 0x00a20000, x1, 8, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox32
+ // result rd:x9(0xde7127e5), rs1=>rd:x9(0x48c99fcb), rs2:x8(0xa3000000), imm:0x3
+ TEST_RI_OP(sm4ed, x9, x8, 0x3, 0xde7127e5, 0x48c99fcb, 0xa3000000, x1, 12, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox32
+ // result rd:x10(0x4c17d2c5), rs1=>rd:x10(0x461d524f), rs2:x7(0x000000a4), imm:0x0
+ TEST_RI_OP(sm4ed, x10, x7, 0x0, 0x4c17d2c5, 0x461d524f, 0x000000a4, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox32
+ // result rd:x11(0xcbedee36), rs1=>rd:x11(0x528a10af), rs2:x6(0x0000a500), imm:0x1
+ TEST_RI_OP(sm4ed, x11, x6, 0x1, 0xcbedee36, 0x528a10af, 0x0000a500, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox32
+ // result rd:x12(0x2879d0e8), rs1=>rd:x12(0xe19bfbc3), rs2:x5(0x00a60000), imm:0x2
+ TEST_RI_OP(sm4ed, x12, x5, 0x2, 0x2879d0e8, 0xe19bfbc3, 0x00a60000, x1, 4, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox32
+ // result rd:x13(0x90fb73a1), rs1=>rd:x13(0x707af2c0), rs2:x4(0xa7000000), imm:0x3
+ TEST_RI_OP(sm4ed, x13, x4, 0x3, 0x90fb73a1, 0x707af2c0, 0xa7000000, x1, 8, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox32
+ // result rd:x14(0xa77ed39b), rs1=>rd:x14(0xa47d105b), rs2:x3(0x000000a8), imm:0x0
+ TEST_RI_OP(sm4ed, x14, x3, 0x0, 0xa77ed39b, 0xa47d105b, 0x000000a8, x1, 12, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox32
+ // result rd:x15(0xb6324187), rs1=>rd:x15(0x121bcc23), rs2:x2(0x0000a900), imm:0x1
+ TEST_RI_OP(sm4ed, x15, x2, 0x1, 0xb6324187, 0x121bcc23, 0x0000a900, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox32
+ // result rd:x16(0x8e45dd19), rs1=>rd:x16(0xadea5195), rs2:x1(0x00aa0000), imm:0x2
+ TEST_RI_OP(sm4ed, x16, x1, 0x2, 0x8e45dd19, 0xadea5195, 0x00aa0000, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox32
+ // result rd:x17(0xd5511068), rs1=>rd:x17(0xd2ffbec1), rs2:x31(0xab000000), imm:0x3
+ TEST_RI_OP(sm4ed, x17, x31, 0x3, 0xd5511068, 0xd2ffbec1, 0xab000000, x2, 4, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox32
+ // result rd:x18(0x9cd5a582), rs1=>rd:x18(0xa8e1a8bb), rs2:x30(0x000000ac), imm:0x0
+ TEST_RI_OP(sm4ed, x18, x30, 0x0, 0x9cd5a582, 0xa8e1a8bb, 0x000000ac, x2, 8, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox32
+ // result rd:x19(0x059b8086), rs1=>rd:x19(0x48c99fcb), rs2:x29(0x0000ad00), imm:0x1
+ TEST_RI_OP(sm4ed, x19, x29, 0x1, 0x059b8086, 0x48c99fcb, 0x0000ad00, x2, 12, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox32
+ // result rd:x20(0x096b6b76), rs1=>rd:x20(0x461d524f), rs2:x28(0x00ae0000), imm:0x2
+ TEST_RI_OP(sm4ed, x20, x28, 0x2, 0x096b6b76, 0x461d524f, 0x00ae0000, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox32
+ // result rd:x21(0x8137adc1), rs1=>rd:x21(0x528a10af), rs2:x27(0xaf000000), imm:0x3
+ TEST_RI_OP(sm4ed, x21, x27, 0x3, 0x8137adc1, 0x528a10af, 0xaf000000, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox32
+ // result rd:x22(0xb6cc2d42), rs1=>rd:x22(0xe19bfbc3), rs2:x26(0x000000b0), imm:0x0
+ TEST_RI_OP(sm4ed, x22, x26, 0x0, 0xb6cc2d42, 0xe19bfbc3, 0x000000b0, x1, 4, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox32
+ // result rd:x23(0x1fa245af), rs1=>rd:x23(0x707af2c0), rs2:x25(0x0000b100), imm:0x1
+ TEST_RI_OP(sm4ed, x23, x25, 0x1, 0x1fa245af, 0x707af2c0, 0x0000b100, x1, 8, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox32
+ // result rd:x24(0x3759dcdc), rs1=>rd:x24(0xa47d105b), rs2:x24(0x00b20000), imm:0x2
+ TEST_RI_OP(sm4ed, x24, x24, 0x2, 0x3759dcdc, 0xa47d105b, 0x00b20000, x1, 12, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox32
+ // result rd:x25(0x430ed967), rs1=>rd:x25(0x121bcc23), rs2:x23(0xb3000000), imm:0x3
+ TEST_RI_OP(sm4ed, x25, x23, 0x3, 0x430ed967, 0x121bcc23, 0xb3000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox32
+ // result rd:x26(0xd6918c33), rs1=>rd:x26(0xadea5195), rs2:x22(0x000000b4), imm:0x0
+ TEST_RI_OP(sm4ed, x26, x22, 0x0, 0xd6918c33, 0xadea5195, 0x000000b4, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox32
+ // result rd:x27(0x2501b736), rs1=>rd:x27(0xd2ffbec1), rs2:x21(0x0000b500), imm:0x1
+ TEST_RI_OP(sm4ed, x27, x21, 0x1, 0x2501b736, 0xd2ffbec1, 0x0000b500, x1, 4, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox32
+ // result rd:x28(0x24579281), rs1=>rd:x28(0xa8e1a8bb), rs2:x20(0x00b60000), imm:0x2
+ TEST_RI_OP(sm4ed, x28, x20, 0x2, 0x24579281, 0xa8e1a8bb, 0x00b60000, x1, 8, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox32
+ // result rd:x29(0xdb7523e4), rs1=>rd:x29(0x48c99fcb), rs2:x19(0xb7000000), imm:0x3
+ TEST_RI_OP(sm4ed, x29, x19, 0x3, 0xdb7523e4, 0x48c99fcb, 0xb7000000, x1, 12, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox32
+ // result rd:x30(0x4a115140), rs1=>rd:x30(0x461d524f), rs2:x18(0x000000b8), imm:0x0
+ TEST_RI_OP(sm4ed, x30, x18, 0x0, 0x4a115140, 0x461d524f, 0x000000b8, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox32
+ // result rd:x31(0xad761350), rs1=>rd:x31(0x528a10af), rs2:x17(0x0000b900), imm:0x1
+ TEST_RI_OP(sm4ed, x31, x17, 0x1, 0xad761350, 0x528a10af, 0x0000b900, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox32
+ // result rd:x1(0x8a59526a), rs1=>rd:x1(0xe19bfbc3), rs2:x16(0x00ba0000), imm:0x2
+ TEST_RI_OP(sm4ed, x1, x16, 0x2, 0x8a59526a, 0xe19bfbc3, 0x00ba0000, x5, 4, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox32
+ // result rd:x2(0xcab33bb3), rs1=>rd:x2(0x707af2c0), rs2:x15(0xbb000000), imm:0x3
+ TEST_RI_OP(sm4ed, x2, x15, 0x3, 0xcab33bb3, 0x707af2c0, 0xbb000000, x5, 8, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox32
+ // result rd:x3(0x11c87c82), rs1=>rd:x3(0xa47d105b), rs2:x14(0x000000bc), imm:0x0
+ TEST_RI_OP(sm4ed, x3, x14, 0x0, 0x11c87c82, 0xa47d105b, 0x000000bc, x5, 12, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox32
+ // result rd:x4(0xa3761092), rs1=>rd:x4(0x121bcc23), rs2:x13(0x0000bd00), imm:0x1
+ TEST_RI_OP(sm4ed, x4, x13, 0x1, 0xa3761092, 0x121bcc23, 0x0000bd00, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox32
+ // result rd:x5(0xf7dd3cf8), rs1=>rd:x5(0xadea5195), rs2:x12(0x00be0000), imm:0x2
+ TEST_RI_OP(sm4ed, x5, x12, 0x2, 0xf7dd3cf8, 0xadea5195, 0x00be0000, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox32
+ // result rd:x6(0xc7bafb91), rs1=>rd:x6(0xd2ffbec1), rs2:x11(0xbf000000), imm:0x3
+ TEST_RI_OP(sm4ed, x6, x11, 0x3, 0xc7bafb91, 0xd2ffbec1, 0xbf000000, x1, 4, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox32
+ // result rd:x7(0x9ed72702), rs1=>rd:x7(0xa8e1a8bb), rs2:x10(0x000000c0), imm:0x0
+ TEST_RI_OP(sm4ed, x7, x10, 0x0, 0x9ed72702, 0xa8e1a8bb, 0x000000c0, x1, 8, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox32
+ // result rd:x8(0x24d2e8a7), rs1=>rd:x8(0x48c99fcb), rs2:x9(0x0000c100), imm:0x1
+ TEST_RI_OP(sm4ed, x8, x9, 0x1, 0x24d2e8a7, 0x48c99fcb, 0x0000c100, x1, 12, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox32
+ // result rd:x9(0xeb0eecf1), rs1=>rd:x9(0x461d524f), rs2:x8(0x00c20000), imm:0x2
+ TEST_RI_OP(sm4ed, x9, x8, 0x2, 0xeb0eecf1, 0x461d524f, 0x00c20000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox32
+ // result rd:x10(0x88c05a3f), rs1=>rd:x10(0x528a10af), rs2:x7(0xc3000000), imm:0x3
+ TEST_RI_OP(sm4ed, x10, x7, 0x3, 0x88c05a3f, 0x528a10af, 0xc3000000, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox32
+ // result rd:x11(0x0f754294), rs1=>rd:x11(0xe19bfbc3), rs2:x6(0x000000c4), imm:0x0
+ TEST_RI_OP(sm4ed, x11, x6, 0x0, 0x0f754294, 0xe19bfbc3, 0x000000c4, x1, 4, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox32
+ // result rd:x12(0x07a45bb7), rs1=>rd:x12(0x707af2c0), rs2:x5(0x0000c500), imm:0x1
+ TEST_RI_OP(sm4ed, x12, x5, 0x1, 0x07a45bb7, 0x707af2c0, 0x0000c500, x1, 8, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox32
+ // result rd:x13(0x1a31e2a9), rs1=>rd:x13(0xa47d105b), rs2:x4(0x00c60000), imm:0x2
+ TEST_RI_OP(sm4ed, x13, x4, 0x2, 0x1a31e2a9, 0xa47d105b, 0x00c60000, x1, 12, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox32
+ // result rd:x14(0x91e6315d), rs1=>rd:x14(0x121bcc23), rs2:x3(0xc7000000), imm:0x3
+ TEST_RI_OP(sm4ed, x14, x3, 0x3, 0x91e6315d, 0x121bcc23, 0xc7000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox32
+ // result rd:x15(0xe9ae40c0), rs1=>rd:x15(0xadea5195), rs2:x2(0x000000c8), imm:0x0
+ TEST_RI_OP(sm4ed, x15, x2, 0x0, 0xe9ae40c0, 0xadea5195, 0x000000c8, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox32
+ // result rd:x16(0xb52503a6), rs1=>rd:x16(0xd2ffbec1), rs2:x1(0x0000c900), imm:0x1
+ TEST_RI_OP(sm4ed, x16, x1, 0x1, 0xb52503a6, 0xd2ffbec1, 0x0000c900, x3, 4, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox32
+ // result rd:x17(0xf5cdd9ca), rs1=>rd:x17(0xa8e1a8bb), rs2:x31(0x00ca0000), imm:0x2
+ TEST_RI_OP(sm4ed, x17, x31, 0x2, 0xf5cdd9ca, 0xa8e1a8bb, 0x00ca0000, x3, 8, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox32
+ // result rd:x18(0x0dcc9a8b), rs1=>rd:x18(0x48c99fcb), rs2:x30(0xcb000000), imm:0x3
+ TEST_RI_OP(sm4ed, x18, x30, 0x3, 0x0dcc9a8b, 0x48c99fcb, 0xcb000000, x3, 12, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox32
+ // result rd:x19(0x3a614d2c), rs1=>rd:x19(0x461d524f), rs2:x29(0x000000cc), imm:0x0
+ TEST_RI_OP(sm4ed, x19, x29, 0x0, 0x3a614d2c, 0x461d524f, 0x000000cc, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox32
+ // result rd:x20(0x129a40ef), rs1=>rd:x20(0x528a10af), rs2:x28(0x0000cd00), imm:0x1
+ TEST_RI_OP(sm4ed, x20, x28, 0x1, 0x129a40ef, 0x528a10af, 0x0000cd00, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox32
+ // result rd:x21(0xbaa992aa), rs1=>rd:x21(0xe19bfbc3), rs2:x27(0x00ce0000), imm:0x2
+ TEST_RI_OP(sm4ed, x21, x27, 0x2, 0xbaa992aa, 0xe19bfbc3, 0x00ce0000, x1, 4, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox32
+ // result rd:x22(0xc819911b), rs1=>rd:x22(0x707af2c0), rs2:x26(0xcf000000), imm:0x3
+ TEST_RI_OP(sm4ed, x22, x26, 0x3, 0xc819911b, 0x707af2c0, 0xcf000000, x1, 8, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox32
+ // result rd:x23(0x8c551a79), rs1=>rd:x23(0xa47d105b), rs2:x25(0x000000d0), imm:0x0
+ TEST_RI_OP(sm4ed, x23, x25, 0x0, 0x8c551a79, 0xa47d105b, 0x000000d0, x1, 12, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox32
+ // result rd:x24(0x07c21407), rs1=>rd:x24(0x121bcc23), rs2:x24(0x0000d100), imm:0x1
+ TEST_RI_OP(sm4ed, x24, x24, 0x1, 0x07c21407, 0x121bcc23, 0x0000d100, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox32
+ // result rd:x25(0x9c1f9551), rs1=>rd:x25(0xadea5195), rs2:x23(0x00d20000), imm:0x2
+ TEST_RI_OP(sm4ed, x25, x23, 0x2, 0x9c1f9551, 0xadea5195, 0x00d20000, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox32
+ // result rd:x26(0x7add9c4b), rs1=>rd:x26(0xd2ffbec1), rs2:x22(0xd3000000), imm:0x3
+ TEST_RI_OP(sm4ed, x26, x22, 0x3, 0x7add9c4b, 0xd2ffbec1, 0xd3000000, x1, 4, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox32
+ // result rd:x27(0x3e770f8a), rs1=>rd:x27(0xa8e1a8bb), rs2:x21(0x000000d4), imm:0x0
+ TEST_RI_OP(sm4ed, x27, x21, 0x0, 0x3e770f8a, 0xa8e1a8bb, 0x000000d4, x1, 8, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox32
+ // result rd:x28(0x7f0766fc), rs1=>rd:x28(0x48c99fcb), rs2:x20(0x0000d500), imm:0x1
+ TEST_RI_OP(sm4ed, x28, x20, 0x1, 0x7f0766fc, 0x48c99fcb, 0x0000d500, x1, 12, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox32
+ // result rd:x29(0x3c8abfa2), rs1=>rd:x29(0x461d524f), rs2:x19(0x00d60000), imm:0x2
+ TEST_RI_OP(sm4ed, x29, x19, 0x2, 0x3c8abfa2, 0x461d524f, 0x00d60000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox32
+ // result rd:x30(0x1b7ce610), rs1=>rd:x30(0x528a10af), rs2:x18(0xd7000000), imm:0x3
+ TEST_RI_OP(sm4ed, x30, x18, 0x3, 0x1b7ce610, 0x528a10af, 0xd7000000, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox32
+ // result rd:x31(0x552fd65a), rs1=>rd:x31(0xe19bfbc3), rs2:x17(0x000000d8), imm:0x0
+ TEST_RI_OP(sm4ed, x31, x17, 0x0, 0x552fd65a, 0xe19bfbc3, 0x000000d8, x4, 4, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox32
+ // result rd:x1(0xa10f5611), rs1=>rd:x1(0x707af2c0), rs2:x16(0x0000d900), imm:0x1
+ TEST_RI_OP(sm4ed, x1, x16, 0x1, 0xa10f5611, 0x707af2c0, 0x0000d900, x4, 8, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox32
+ // result rd:x2(0x77ed5318), rs1=>rd:x2(0xa47d105b), rs2:x15(0x00da0000), imm:0x2
+ TEST_RI_OP(sm4ed, x2, x15, 0x2, 0x77ed5318, 0xa47d105b, 0x00da0000, x4, 12, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox32
+ // result rd:x3(0x48538431), rs1=>rd:x3(0x121bcc23), rs2:x14(0xdb000000), imm:0x3
+ TEST_RI_OP(sm4ed, x3, x14, 0x3, 0x48538431, 0x121bcc23, 0xdb000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox32
+ // result rd:x4(0x4f08ebcd), rs1=>rd:x4(0xadea5195), rs2:x13(0x000000dc), imm:0x0
+ TEST_RI_OP(sm4ed, x4, x13, 0x0, 0x4f08ebcd, 0xadea5195, 0x000000dc, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox32
+ // result rd:x5(0x4519cf56), rs1=>rd:x5(0xd2ffbec1), rs2:x12(0x0000dd00), imm:0x1
+ TEST_RI_OP(sm4ed, x5, x12, 0x1, 0x4519cf56, 0xd2ffbec1, 0x0000dd00, x1, 4, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox32
+ // result rd:x6(0x1e857a69), rs1=>rd:x6(0xa8e1a8bb), rs2:x11(0x00de0000), imm:0x2
+ TEST_RI_OP(sm4ed, x6, x11, 0x2, 0x1e857a69, 0xa8e1a8bb, 0x00de0000, x1, 8, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox32
+ // result rd:x7(0x380b5d79), rs1=>rd:x7(0x48c99fcb), rs2:x10(0xdf000000), imm:0x3
+ TEST_RI_OP(sm4ed, x7, x10, 0x3, 0x380b5d79, 0x48c99fcb, 0xdf000000, x1, 12, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox32
+ // result rd:x8(0x603bd9e2), rs1=>rd:x8(0x461d524f), rs2:x9(0x000000e0), imm:0x0
+ TEST_RI_OP(sm4ed, x8, x9, 0x0, 0x603bd9e2, 0x461d524f, 0x000000e0, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox32
+ // result rd:x9(0xf7e2dd0a), rs1=>rd:x9(0x528a10af), rs2:x8(0x0000e100), imm:0x1
+ TEST_RI_OP(sm4ed, x9, x8, 0x1, 0xf7e2dd0a, 0x528a10af, 0x0000e100, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox32
+ // result rd:x10(0x7450a59d), rs1=>rd:x10(0xe19bfbc3), rs2:x7(0x00e20000), imm:0x2
+ TEST_RI_OP(sm4ed, x10, x7, 0x2, 0x7450a59d, 0xe19bfbc3, 0x00e20000, x1, 4, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox32
+ // result rd:x11(0x1253db8b), rs1=>rd:x11(0x707af2c0), rs2:x6(0xe3000000), imm:0x3
+ TEST_RI_OP(sm4ed, x11, x6, 0x3, 0x1253db8b, 0x707af2c0, 0xe3000000, x1, 8, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox32
+ // result rd:x12(0x944d1c67), rs1=>rd:x12(0xa47d105b), rs2:x5(0x000000e4), imm:0x0
+ TEST_RI_OP(sm4ed, x12, x5, 0x0, 0x944d1c67, 0xa47d105b, 0x000000e4, x1, 12, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox32
+ // result rd:x13(0x488f0279), rs1=>rd:x13(0x121bcc23), rs2:x4(0x0000e500), imm:0x1
+ TEST_RI_OP(sm4ed, x13, x4, 0x1, 0x488f0279, 0x121bcc23, 0x0000e500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox32
+ // result rd:x14(0xdb418c48), rs1=>rd:x14(0xadea5195), rs2:x3(0x00e60000), imm:0x2
+ TEST_RI_OP(sm4ed, x14, x3, 0x2, 0xdb418c48, 0xadea5195, 0x00e60000, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox32
+ // result rd:x15(0x540647be), rs1=>rd:x15(0xd2ffbec1), rs2:x2(0xe7000000), imm:0x3
+ TEST_RI_OP(sm4ed, x15, x2, 0x3, 0x540647be, 0xd2ffbec1, 0xe7000000, x4, 4, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox32
+ // result rd:x16(0x3d74cc4a), rs1=>rd:x16(0xa8e1a8bb), rs2:x1(0x000000e8), imm:0x0
+ TEST_RI_OP(sm4ed, x16, x1, 0x0, 0x3d74cc4a, 0xa8e1a8bb, 0x000000e8, x4, 8, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox32
+ // result rd:x17(0xae72c22d), rs1=>rd:x17(0x48c99fcb), rs2:x31(0x0000e900), imm:0x1
+ TEST_RI_OP(sm4ed, x17, x31, 0x1, 0xae72c22d, 0x48c99fcb, 0x0000e900, x4, 12, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox32
+ // result rd:x18(0xb4289588), rs1=>rd:x18(0x461d524f), rs2:x30(0x00ea0000), imm:0x2
+ TEST_RI_OP(sm4ed, x18, x30, 0x2, 0xb4289588, 0x461d524f, 0x00ea0000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox32
+ // result rd:x19(0x7fae34a6), rs1=>rd:x19(0x528a10af), rs2:x29(0xeb000000), imm:0x3
+ TEST_RI_OP(sm4ed, x19, x29, 0x3, 0x7fae34a6, 0x528a10af, 0xeb000000, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox32
+ // result rd:x20(0xf68c3d12), rs1=>rd:x20(0xe19bfbc3), rs2:x28(0x000000ec), imm:0x0
+ TEST_RI_OP(sm4ed, x20, x28, 0x0, 0xf68c3d12, 0xe19bfbc3, 0x000000ec, x1, 4, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox32
+ // result rd:x21(0xc9152479), rs1=>rd:x21(0x707af2c0), rs2:x27(0x0000ed00), imm:0x1
+ TEST_RI_OP(sm4ed, x21, x27, 0x1, 0xc9152479, 0x707af2c0, 0x0000ed00, x1, 8, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox32
+ // result rd:x22(0x61a30b40), rs1=>rd:x22(0xa47d105b), rs2:x26(0x00ee0000), imm:0x2
+ TEST_RI_OP(sm4ed, x22, x26, 0x2, 0x61a30b40, 0xa47d105b, 0x00ee0000, x1, 12, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox32
+ // result rd:x23(0x8609dea5), rs1=>rd:x23(0x121bcc23), rs2:x25(0xef000000), imm:0x3
+ TEST_RI_OP(sm4ed, x23, x25, 0x3, 0x8609dea5, 0x121bcc23, 0xef000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox32
+ // result rd:x24(0x60601888), rs1=>rd:x24(0xadea5195), rs2:x24(0x000000f0), imm:0x0
+ TEST_RI_OP(sm4ed, x24, x24, 0x0, 0x60601888, 0xadea5195, 0x000000f0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox32
+ // result rd:x25(0x110c8e02), rs1=>rd:x25(0xd2ffbec1), rs2:x23(0x0000f100), imm:0x1
+ TEST_RI_OP(sm4ed, x25, x23, 0x1, 0x110c8e02, 0xd2ffbec1, 0x0000f100, x1, 4, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox32
+ // result rd:x26(0xd4685d4e), rs1=>rd:x26(0xa8e1a8bb), rs2:x22(0x00f20000), imm:0x2
+ TEST_RI_OP(sm4ed, x26, x22, 0x2, 0xd4685d4e, 0xa8e1a8bb, 0x00f20000, x1, 8, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox32
+ // result rd:x27(0x147a2c24), rs1=>rd:x27(0x48c99fcb), rs2:x21(0xf3000000), imm:0x3
+ TEST_RI_OP(sm4ed, x27, x21, 0x3, 0x147a2c24, 0x48c99fcb, 0xf3000000, x1, 12, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox32
+ // result rd:x28(0xaef5689d), rs1=>rd:x28(0x461d524f), rs2:x20(0x000000f4), imm:0x0
+ TEST_RI_OP(sm4ed, x28, x20, 0x0, 0xaef5689d, 0x461d524f, 0x000000f4, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox32
+ // result rd:x29(0x2155bcdc), rs1=>rd:x29(0x528a10af), rs2:x19(0x0000f500), imm:0x1
+ TEST_RI_OP(sm4ed, x29, x19, 0x1, 0x2155bcdc, 0x528a10af, 0x0000f500, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox32
+ // result rd:x30(0xade2cef6), rs1=>rd:x30(0xe19bfbc3), rs2:x18(0x00f60000), imm:0x2
+ TEST_RI_OP(sm4ed, x30, x18, 0x2, 0xade2cef6, 0xe19bfbc3, 0x00f60000, x4, 4, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox32
+ // result rd:x31(0xd0fa72e0), rs1=>rd:x31(0x707af2c0), rs2:x17(0xf7000000), imm:0x3
+ TEST_RI_OP(sm4ed, x31, x17, 0x3, 0xd0fa72e0, 0x707af2c0, 0xf7000000, x4, 8, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox32
+ // result rd:x1(0x419868c6), rs1=>rd:x1(0xa47d105b), rs2:x16(0x000000f8), imm:0x0
+ TEST_RI_OP(sm4ed, x1, x16, 0x0, 0x419868c6, 0xa47d105b, 0x000000f8, x4, 12, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox32
+ // result rd:x2(0xa9f69a98), rs1=>rd:x2(0x121bcc23), rs2:x15(0x0000f900), imm:0x1
+ TEST_RI_OP(sm4ed, x2, x15, 0x1, 0xa9f69a98, 0x121bcc23, 0x0000f900, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox32
+ // result rd:x3(0xf3c92ce8), rs1=>rd:x3(0xadea5195), rs2:x14(0x00fa0000), imm:0x2
+ TEST_RI_OP(sm4ed, x3, x14, 0x2, 0xf3c92ce8, 0xadea5195, 0x00fa0000, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox32
+ // result rd:x4(0x140746ff), rs1=>rd:x4(0xd2ffbec1), rs2:x13(0xfb000000), imm:0x3
+ TEST_RI_OP(sm4ed, x4, x13, 0x3, 0x140746ff, 0xd2ffbec1, 0xfb000000, x1, 4, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox32
+ // result rd:x5(0xf7be7c30), rs1=>rd:x5(0xa8e1a8bb), rs2:x12(0x000000fc), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0xf7be7c30, 0xa8e1a8bb, 0x000000fc, x1, 8, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox32
+ // result rd:x6(0x670178e4), rs1=>rd:x6(0x48c99fcb), rs2:x11(0x0000fd00), imm:0x1
+ TEST_RI_OP(sm4ed, x6, x11, 0x1, 0x670178e4, 0x48c99fcb, 0x0000fd00, x1, 12, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox32
+ // result rd:x7(0x7fc0b6ab), rs1=>rd:x7(0x461d524f), rs2:x10(0x00fe0000), imm:0x2
+ TEST_RI_OP(sm4ed, x7, x10, 0x2, 0x7fc0b6ab, 0x461d524f, 0x00fe0000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox32
+ // result rd:x8(0x3aab31e6), rs1=>rd:x8(0x528a10af), rs2:x9(0xff000000), imm:0x3
+ TEST_RI_OP(sm4ed, x8, x9, 0x3, 0x3aab31e6, 0x528a10af, 0xff000000, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+signature_31_0:
+ .fill 5, 4, 0xdeadbeef
+signature_32_0:
+ .fill 5, 4, 0xdeadbeef
+signature_33_0:
+ .fill 5, 4, 0xdeadbeef
+signature_34_0:
+ .fill 5, 4, 0xdeadbeef
+signature_35_0:
+ .fill 5, 4, 0xdeadbeef
+signature_36_0:
+ .fill 5, 4, 0xdeadbeef
+signature_37_0:
+ .fill 5, 4, 0xdeadbeef
+signature_38_0:
+ .fill 5, 4, 0xdeadbeef
+signature_39_0:
+ .fill 5, 4, 0xdeadbeef
+signature_40_0:
+ .fill 5, 4, 0xdeadbeef
+signature_41_0:
+ .fill 5, 4, 0xdeadbeef
+signature_42_0:
+ .fill 5, 4, 0xdeadbeef
+signature_43_0:
+ .fill 5, 4, 0xdeadbeef
+signature_44_0:
+ .fill 5, 4, 0xdeadbeef
+signature_45_0:
+ .fill 5, 4, 0xdeadbeef
+signature_46_0:
+ .fill 5, 4, 0xdeadbeef
+signature_47_0:
+ .fill 5, 4, 0xdeadbeef
+signature_48_0:
+ .fill 5, 4, 0xdeadbeef
+signature_49_0:
+ .fill 5, 4, 0xdeadbeef
+signature_50_0:
+ .fill 5, 4, 0xdeadbeef
+signature_51_0:
+ .fill 5, 4, 0xdeadbeef
+signature_52_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SM4KS-01.S b/riscof/suite/rv32i_m/K_unratified/SM4KS-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..1ad56cd216a9fd1a22a0a996f998f5feb0f9fb76
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/SM4KS-01.S
@@ -0,0 +1,1052 @@
+// RISC-V Architectural Validation Test SM4KS-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sm4ks'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",sm4ks)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x37aa42d8), rs1=>rd:x1(0xadea5195), rs2:x16(0x121bcc23), imm:0x3
+ TEST_RI_OP(sm4ks, x1, x16, 0x3, 0x37aa42d8, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x50bfae80), rs1=>rd:x2(0xd2ffbec1), rs2:x15(0xa47d105b), imm:0x3
+ TEST_RI_OP(sm4ks, x2, x15, 0x3, 0x50bfae80, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x0870ee36), rs1=>rd:x3(0xa8e1a8bb), rs2:x14(0x707af2c0), imm:0x0
+ TEST_RI_OP(sm4ks, x3, x14, 0x0, 0x0870ee36, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x21e912ff), rs1=>rd:x4(0x48c99fcb), rs2:x13(0xe19bfbc3), imm:0x3
+ TEST_RI_OP(sm4ks, x4, x13, 0x3, 0x21e912ff, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xc73dc20f), rs1=>rd:x5(0x461d524f), rs2:x12(0x528a10af), imm:0x3
+ TEST_RI_OP(sm4ks, x5, x12, 0x3, 0xc73dc20f, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x456a92a4), rs1=>rd:x6(0x528a10af), rs2:x11(0x461d524f), imm:0x3
+ TEST_RI_OP(sm4ks, x6, x11, 0x3, 0x456a92a4, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x62fb6b82), rs1=>rd:x7(0xe19bfbc3), rs2:x10(0x48c99fcb), imm:0x3
+ TEST_RI_OP(sm4ks, x7, x10, 0x3, 0x62fb6b82, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xb07aeaa0), rs1=>rd:x8(0x707af2c0), rs2:x9(0xa8e1a8bb), imm:0x3
+ TEST_RI_OP(sm4ks, x8, x9, 0x3, 0xb07aeaa0, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x2f504b3b), rs1=>rd:x9(0xa47d105b), rs2:x8(0xd2ffbec1), imm:0x1
+ TEST_RI_OP(sm4ks, x9, x8, 0x1, 0x2f504b3b, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x9f2ea743), rs1=>rd:x10(0x121bcc23), rs2:x7(0xadea5195), imm:0x1
+ TEST_RI_OP(sm4ks, x10, x7, 0x1, 0x9f2ea743, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x48000925), rs1=>rd:x11(0x00000001), rs2:x6(0xffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x11, x6, 0x3, 0x48000925, 0x00000001, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x09244802), rs1=>rd:x12(0x00000002), rs2:x5(0x7fffffff), imm:0x1
+ TEST_RI_OP(sm4ks, x12, x5, 0x1, 0x09244802, 0x00000002, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x2448000d), rs1=>rd:x13(0x00000004), rs2:x4(0xbfffffff), imm:0x2
+ TEST_RI_OP(sm4ks, x13, x4, 0x2, 0x2448000d, 0x00000004, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00092440), rs1=>rd:x14(0x00000008), rs2:x3(0xdfffffff), imm:0x0
+ TEST_RI_OP(sm4ks, x14, x3, 0x0, 0x00092440, 0x00000008, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x24480019), rs1=>rd:x15(0x00000010), rs2:x2(0xefffffff), imm:0x2
+ TEST_RI_OP(sm4ks, x15, x2, 0x2, 0x24480019, 0x00000010, 0xefffffff, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x09244820), rs1=>rd:x16(0x00000020), rs2:x1(0xf7ffffff), imm:0x1
+ TEST_RI_OP(sm4ks, x16, x1, 0x1, 0x09244820, 0x00000020, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x3ec0075f), rs1=>rd:x17(0x00000040), rs2:x31(0xfbffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x17, x31, 0x3, 0x3ec0075f, 0x00000040, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xcb6099e5), rs1=>rd:x18(0x00000080), rs2:x30(0xfdffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x18, x30, 0x3, 0xcb6099e5, 0x00000080, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00092548), rs1=>rd:x19(0x00000100), rs2:x29(0xfeffffff), imm:0x0
+ TEST_RI_OP(sm4ks, x19, x29, 0x0, 0x00092548, 0x00000100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x48000b24), rs1=>rd:x20(0x00000200), rs2:x28(0xff7fffff), imm:0x3
+ TEST_RI_OP(sm4ks, x20, x28, 0x3, 0x48000b24, 0x00000200, 0xff7fffff, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x48000d24), rs1=>rd:x21(0x00000400), rs2:x27(0xffbfffff), imm:0x3
+ TEST_RI_OP(sm4ks, x21, x27, 0x3, 0x48000d24, 0x00000400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x48000124), rs1=>rd:x22(0x00000800), rs2:x26(0xffdfffff), imm:0x3
+ TEST_RI_OP(sm4ks, x22, x26, 0x3, 0x48000124, 0x00000800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x48001924), rs1=>rd:x23(0x00001000), rs2:x25(0xffefffff), imm:0x3
+ TEST_RI_OP(sm4ks, x23, x25, 0x3, 0x48001924, 0x00001000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0xb7f7f6db), rs1=>rd:x24(0x00002000), rs2:x24(0xfff7ffff), imm:0x3
+ TEST_RI_OP(sm4ks, x24, x24, 0x3, 0xb7f7f6db, 0x00002000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x09240800), rs1=>rd:x25(0x00004000), rs2:x23(0xfffbffff), imm:0x1
+ TEST_RI_OP(sm4ks, x25, x23, 0x1, 0x09240800, 0x00004000, 0xfffbffff, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0924c800), rs1=>rd:x26(0x00008000), rs2:x22(0xfffdffff), imm:0x1
+ TEST_RI_OP(sm4ks, x26, x22, 0x1, 0x0924c800, 0x00008000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x48010924), rs1=>rd:x27(0x00010000), rs2:x21(0xfffeffff), imm:0x3
+ TEST_RI_OP(sm4ks, x27, x21, 0x3, 0x48010924, 0x00010000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x134d9ec0), rs1=>rd:x28(0x00020000), rs2:x20(0xffff7fff), imm:0x1
+ TEST_RI_OP(sm4ks, x28, x20, 0x1, 0x134d9ec0, 0x00020000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x244c0009), rs1=>rd:x29(0x00040000), rs2:x19(0xffffbfff), imm:0x2
+ TEST_RI_OP(sm4ks, x29, x19, 0x2, 0x244c0009, 0x00040000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00012448), rs1=>rd:x30(0x00080000), rs2:x18(0xffffdfff), imm:0x0
+ TEST_RI_OP(sm4ks, x30, x18, 0x0, 0x00012448, 0x00080000, 0xffffdfff, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x24580009), rs1=>rd:x31(0x00100000), rs2:x17(0xffffefff), imm:0x2
+ TEST_RI_OP(sm4ks, x31, x17, 0x2, 0x24580009, 0x00100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x04302000), rs1=>rd:x1(0x00200000), rs2:x16(0xfffff7ff), imm:0x1
+ TEST_RI_OP(sm4ks, x1, x16, 0x1, 0x04302000, 0x00200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x48400924), rs1=>rd:x2(0x00400000), rs2:x15(0xfffffbff), imm:0x3
+ TEST_RI_OP(sm4ks, x2, x15, 0x3, 0x48400924, 0x00400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x48800924), rs1=>rd:x3(0x00800000), rs2:x14(0xfffffdff), imm:0x3
+ TEST_RI_OP(sm4ks, x3, x14, 0x3, 0x48800924, 0x00800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x01092448), rs1=>rd:x4(0x01000000), rs2:x13(0xfffffeff), imm:0x0
+ TEST_RI_OP(sm4ks, x4, x13, 0x0, 0x01092448, 0x01000000, 0xfffffeff, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x4a000924), rs1=>rd:x5(0x02000000), rs2:x12(0xffffff7f), imm:0x3
+ TEST_RI_OP(sm4ks, x5, x12, 0x3, 0x4a000924, 0x02000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x4c000924), rs1=>rd:x6(0x04000000), rs2:x11(0xffffffbf), imm:0x3
+ TEST_RI_OP(sm4ks, x6, x11, 0x3, 0x4c000924, 0x04000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x40000924), rs1=>rd:x7(0x08000000), rs2:x10(0xffffffdf), imm:0x3
+ TEST_RI_OP(sm4ks, x7, x10, 0x3, 0x40000924, 0x08000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x58000924), rs1=>rd:x8(0x10000000), rs2:x9(0xffffffef), imm:0x3
+ TEST_RI_OP(sm4ks, x8, x9, 0x3, 0x58000924, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x68000924), rs1=>rd:x9(0x20000000), rs2:x8(0xfffffff7), imm:0x3
+ TEST_RI_OP(sm4ks, x9, x8, 0x3, 0x68000924, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x49244800), rs1=>rd:x10(0x40000000), rs2:x7(0xfffffffb), imm:0x1
+ TEST_RI_OP(sm4ks, x10, x7, 0x1, 0x49244800, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x89244800), rs1=>rd:x11(0x80000000), rs2:x6(0xfffffffd), imm:0x1
+ TEST_RI_OP(sm4ks, x11, x6, 0x1, 0x89244800, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x48000924), rs1=>rd:x12(0x00000000), rs2:x5(0xfffffffe), imm:0x3
+ TEST_RI_OP(sm4ks, x12, x5, 0x3, 0x48000924, 0x00000000, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xe594293e), rs1=>rd:x13(0xfffffffe), rs2:x4(0x00000000), imm:0x1
+ TEST_RI_OP(sm4ks, x13, x4, 0x1, 0xe594293e, 0xfffffffe, 0x00000000, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x94293fe7), rs1=>rd:x14(0xfffffffd), rs2:x3(0x80000000), imm:0x2
+ TEST_RI_OP(sm4ks, x14, x3, 0x2, 0x94293fe7, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x3fe5942d), rs1=>rd:x15(0xfffffffb), rs2:x2(0x40000000), imm:0x0
+ TEST_RI_OP(sm4ks, x15, x2, 0x0, 0x3fe5942d, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x94293fed), rs1=>rd:x16(0xfffffff7), rs2:x1(0x20000000), imm:0x2
+ TEST_RI_OP(sm4ks, x16, x1, 0x2, 0x94293fed, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xe594292f), rs1=>rd:x17(0xffffffef), rs2:x31(0x10000000), imm:0x1
+ TEST_RI_OP(sm4ks, x17, x31, 0x1, 0xe594292f, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xe93ffdd4), rs1=>rd:x18(0xffffffdf), rs2:x30(0x08000000), imm:0x3
+ TEST_RI_OP(sm4ks, x18, x30, 0x3, 0xe93ffdd4, 0xffffffdf, 0x08000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x337fe6d9), rs1=>rd:x19(0xffffffbf), rs2:x29(0x04000000), imm:0x3
+ TEST_RI_OP(sm4ks, x19, x29, 0x3, 0x337fe6d9, 0xffffffbf, 0x04000000, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x3fe594a9), rs1=>rd:x20(0xffffff7f), rs2:x28(0x02000000), imm:0x0
+ TEST_RI_OP(sm4ks, x20, x28, 0x0, 0x3fe594a9, 0xffffff7f, 0x02000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x6fffecb7), rs1=>rd:x21(0xfffffeff), rs2:x27(0x01000000), imm:0x3
+ TEST_RI_OP(sm4ks, x21, x27, 0x3, 0x6fffecb7, 0xfffffeff, 0x01000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x293fe794), rs1=>rd:x22(0xfffffdff), rs2:x26(0x00800000), imm:0x3
+ TEST_RI_OP(sm4ks, x22, x26, 0x3, 0x293fe794, 0xfffffdff, 0x00800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x293fe194), rs1=>rd:x23(0xfffffbff), rs2:x25(0x00400000), imm:0x3
+ TEST_RI_OP(sm4ks, x23, x25, 0x3, 0x293fe194, 0xfffffbff, 0x00400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xd6e01a6b), rs1=>rd:x24(0xfffff7ff), rs2:x24(0x00200000), imm:0x3
+ TEST_RI_OP(sm4ks, x24, x24, 0x3, 0xd6e01a6b, 0xfffff7ff, 0x00200000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x293ff594), rs1=>rd:x25(0xffffefff), rs2:x23(0x00100000), imm:0x3
+ TEST_RI_OP(sm4ks, x25, x23, 0x3, 0x293ff594, 0xffffefff, 0x00100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xe594093f), rs1=>rd:x26(0xffffdfff), rs2:x22(0x00080000), imm:0x1
+ TEST_RI_OP(sm4ks, x26, x22, 0x1, 0xe594093f, 0xffffdfff, 0x00080000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xe594693f), rs1=>rd:x27(0xffffbfff), rs2:x21(0x00040000), imm:0x1
+ TEST_RI_OP(sm4ks, x27, x21, 0x1, 0xe594693f, 0xffffbfff, 0x00040000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x293f6594), rs1=>rd:x28(0xffff7fff), rs2:x20(0x00020000), imm:0x3
+ TEST_RI_OP(sm4ks, x28, x20, 0x3, 0x293f6594, 0xffff7fff, 0x00020000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xe595293f), rs1=>rd:x29(0xfffeffff), rs2:x19(0x00010000), imm:0x1
+ TEST_RI_OP(sm4ks, x29, x19, 0x1, 0xe595293f, 0xfffeffff, 0x00010000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x942b3fe5), rs1=>rd:x30(0xfffdffff), rs2:x18(0x00008000), imm:0x2
+ TEST_RI_OP(sm4ks, x30, x18, 0x2, 0x942b3fe5, 0xfffdffff, 0x00008000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x3fe19429), rs1=>rd:x31(0xfffbffff), rs2:x17(0x00004000), imm:0x0
+ TEST_RI_OP(sm4ks, x31, x17, 0x0, 0x3fe19429, 0xfffbffff, 0x00004000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x94213fe5), rs1=>rd:x1(0xfff7ffff), rs2:x16(0x00002000), imm:0x2
+ TEST_RI_OP(sm4ks, x1, x16, 0x2, 0x94213fe5, 0xfff7ffff, 0x00002000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x7afad49f), rs1=>rd:x2(0xffefffff), rs2:x15(0x00001000), imm:0x1
+ TEST_RI_OP(sm4ks, x2, x15, 0x1, 0x7afad49f, 0xffefffff, 0x00001000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x291fe594), rs1=>rd:x3(0xffdfffff), rs2:x14(0x00000800), imm:0x3
+ TEST_RI_OP(sm4ks, x3, x14, 0x3, 0x291fe594, 0xffdfffff, 0x00000800, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x297fe594), rs1=>rd:x4(0xffbfffff), rs2:x13(0x00000400), imm:0x3
+ TEST_RI_OP(sm4ks, x4, x13, 0x3, 0x297fe594, 0xffbfffff, 0x00000400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x3f659429), rs1=>rd:x5(0xff7fffff), rs2:x12(0x00000200), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0x3f659429, 0xff7fffff, 0x00000200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x3ee59429), rs1=>rd:x6(0xfeffffff), rs2:x11(0x00000100), imm:0x0
+ TEST_RI_OP(sm4ks, x6, x11, 0x0, 0x3ee59429, 0xfeffffff, 0x00000100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xbde28a15), rs1=>rd:x7(0xfdffffff), rs2:x10(0x00000080), imm:0x0
+ TEST_RI_OP(sm4ks, x7, x10, 0x0, 0xbde28a15, 0xfdffffff, 0x00000080, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x1b77dcb8), rs1=>rd:x8(0xfbffffff), rs2:x9(0x00000040), imm:0x0
+ TEST_RI_OP(sm4ks, x8, x9, 0x0, 0x1b77dcb8, 0xfbffffff, 0x00000040, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x77ecb163), rs1=>rd:x9(0xf7ffffff), rs2:x8(0x00000020), imm:0x0
+ TEST_RI_OP(sm4ks, x9, x8, 0x0, 0x77ecb163, 0xf7ffffff, 0x00000020, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x8f7aead4), rs1=>rd:x10(0xefffffff), rs2:x7(0x00000010), imm:0x0
+ TEST_RI_OP(sm4ks, x10, x7, 0x0, 0x8f7aead4, 0xefffffff, 0x00000010, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x1ffdf4e9), rs1=>rd:x11(0xdfffffff), rs2:x6(0x00000008), imm:0x0
+ TEST_RI_OP(sm4ks, x11, x6, 0x0, 0x1ffdf4e9, 0xdfffffff, 0x00000008, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x3fe69933), rs1=>rd:x12(0xbfffffff), rs2:x5(0x00000004), imm:0x0
+ TEST_RI_OP(sm4ks, x12, x5, 0x0, 0x3fe69933, 0xbfffffff, 0x00000004, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x5f628b16), rs1=>rd:x13(0x7fffffff), rs2:x4(0x00000002), imm:0x0
+ TEST_RI_OP(sm4ks, x13, x4, 0x0, 0x5f628b16, 0x7fffffff, 0x00000002, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffedb76f), rs1=>rd:x14(0xffffffff), rs2:x3(0x00000001), imm:0x0
+ TEST_RI_OP(sm4ks, x14, x3, 0x0, 0xffedb76f, 0xffffffff, 0x00000001, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xc01a6bd7), rs1=>rd:x15(0x00000001), rs2:x2(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x15, x2, 0x0, 0xc01a6bd7, 0x00000001, 0x00000000, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xc01a6bd4), rs1=>rd:x16(0x00000002), rs2:x1(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x16, x1, 0x0, 0xc01a6bd4, 0x00000002, 0x00000000, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xc01a6bd2), rs1=>rd:x17(0x00000004), rs2:x31(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x17, x31, 0x0, 0xc01a6bd2, 0x00000004, 0x00000000, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xc01a6bde), rs1=>rd:x18(0x00000008), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x18, x30, 0x0, 0xc01a6bde, 0x00000008, 0x00000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xc01a6bc6), rs1=>rd:x19(0x00000010), rs2:x29(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x19, x29, 0x0, 0xc01a6bc6, 0x00000010, 0x00000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xc01a6bf6), rs1=>rd:x20(0x00000020), rs2:x28(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x20, x28, 0x0, 0xc01a6bf6, 0x00000020, 0x00000000, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xc01a6b96), rs1=>rd:x21(0x00000040), rs2:x27(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x21, x27, 0x0, 0xc01a6b96, 0x00000040, 0x00000000, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xc01a6b56), rs1=>rd:x22(0x00000080), rs2:x26(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x22, x26, 0x0, 0xc01a6b56, 0x00000080, 0x00000000, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xc01a6ad6), rs1=>rd:x23(0x00000100), rs2:x25(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x23, x25, 0x0, 0xc01a6ad6, 0x00000100, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xc01a6bd6), rs1=>rd:x24(0x00000200), rs2:x24(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x24, x24, 0x0, 0xc01a6bd6, 0x00000200, 0x00000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xc01a6fd6), rs1=>rd:x25(0x00000400), rs2:x23(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x25, x23, 0x0, 0xc01a6fd6, 0x00000400, 0x00000000, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xc01a63d6), rs1=>rd:x26(0x00000800), rs2:x22(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x26, x22, 0x0, 0xc01a63d6, 0x00000800, 0x00000000, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xc01a7bd6), rs1=>rd:x27(0x00001000), rs2:x21(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x27, x21, 0x0, 0xc01a7bd6, 0x00001000, 0x00000000, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xc01a4bd6), rs1=>rd:x28(0x00002000), rs2:x20(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x28, x20, 0x0, 0xc01a4bd6, 0x00002000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xc01a2bd6), rs1=>rd:x29(0x00004000), rs2:x19(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x29, x19, 0x0, 0xc01a2bd6, 0x00004000, 0x00000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xc01aebd6), rs1=>rd:x30(0x00008000), rs2:x18(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x30, x18, 0x0, 0xc01aebd6, 0x00008000, 0x00000000, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xc01b6bd6), rs1=>rd:x31(0x00010000), rs2:x17(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x31, x17, 0x0, 0xc01b6bd6, 0x00010000, 0x00000000, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xc0186bd6), rs1=>rd:x1(0x00020000), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x1, x16, 0x0, 0xc0186bd6, 0x00020000, 0x00000000, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xc01e6bd6), rs1=>rd:x2(0x00040000), rs2:x15(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x2, x15, 0x0, 0xc01e6bd6, 0x00040000, 0x00000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xc0126bd6), rs1=>rd:x3(0x00080000), rs2:x14(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x3, x14, 0x0, 0xc0126bd6, 0x00080000, 0x00000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xc00a6bd6), rs1=>rd:x4(0x00100000), rs2:x13(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x4, x13, 0x0, 0xc00a6bd6, 0x00100000, 0x00000000, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xc03a6bd6), rs1=>rd:x5(0x00200000), rs2:x12(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0xc03a6bd6, 0x00200000, 0x00000000, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xc05a6bd6), rs1=>rd:x6(0x00400000), rs2:x11(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x6, x11, 0x0, 0xc05a6bd6, 0x00400000, 0x00000000, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xc09a6bd6), rs1=>rd:x7(0x00800000), rs2:x10(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x7, x10, 0x0, 0xc09a6bd6, 0x00800000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xc11a6bd6), rs1=>rd:x8(0x01000000), rs2:x9(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x8, x9, 0x0, 0xc11a6bd6, 0x01000000, 0x00000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xc21a6bd6), rs1=>rd:x9(0x02000000), rs2:x8(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x9, x8, 0x0, 0xc21a6bd6, 0x02000000, 0x00000000, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xc41a6bd6), rs1=>rd:x10(0x04000000), rs2:x7(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x10, x7, 0x0, 0xc41a6bd6, 0x04000000, 0x00000000, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xc81a6bd6), rs1=>rd:x11(0x08000000), rs2:x6(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x11, x6, 0x0, 0xc81a6bd6, 0x08000000, 0x00000000, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xd01a6bd6), rs1=>rd:x12(0x10000000), rs2:x5(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x12, x5, 0x0, 0xd01a6bd6, 0x10000000, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xe01a6bd6), rs1=>rd:x13(0x20000000), rs2:x4(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x13, x4, 0x0, 0xe01a6bd6, 0x20000000, 0x00000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x801a6bd6), rs1=>rd:x14(0x40000000), rs2:x3(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x14, x3, 0x0, 0x801a6bd6, 0x40000000, 0x00000000, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x401a6bd6), rs1=>rd:x15(0x80000000), rs2:x2(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x15, x2, 0x0, 0x401a6bd6, 0x80000000, 0x00000000, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xc01a6bd6), rs1=>rd:x16(0x00000000), rs2:x1(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x16, x1, 0x0, 0xc01a6bd6, 0x00000000, 0x00000000, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x3fe59428), rs1=>rd:x17(0xfffffffe), rs2:x31(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x17, x31, 0x0, 0x3fe59428, 0xfffffffe, 0x00000000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x3fe5942b), rs1=>rd:x18(0xfffffffd), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x18, x30, 0x0, 0x3fe5942b, 0xfffffffd, 0x00000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x3fe5942d), rs1=>rd:x19(0xfffffffb), rs2:x29(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x19, x29, 0x0, 0x3fe5942d, 0xfffffffb, 0x00000000, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x3fe59421), rs1=>rd:x20(0xfffffff7), rs2:x28(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x20, x28, 0x0, 0x3fe59421, 0xfffffff7, 0x00000000, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x3fe59439), rs1=>rd:x21(0xffffffef), rs2:x27(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x21, x27, 0x0, 0x3fe59439, 0xffffffef, 0x00000000, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x3fe59409), rs1=>rd:x22(0xffffffdf), rs2:x26(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x22, x26, 0x0, 0x3fe59409, 0xffffffdf, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x3fe59469), rs1=>rd:x23(0xffffffbf), rs2:x25(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x23, x25, 0x0, 0x3fe59469, 0xffffffbf, 0x00000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xc01a6bd6), rs1=>rd:x24(0xffffff7f), rs2:x24(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x24, x24, 0x0, 0xc01a6bd6, 0xffffff7f, 0x00000000, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x3fe59529), rs1=>rd:x25(0xfffffeff), rs2:x23(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x25, x23, 0x0, 0x3fe59529, 0xfffffeff, 0x00000000, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x3fe59629), rs1=>rd:x26(0xfffffdff), rs2:x22(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x26, x22, 0x0, 0x3fe59629, 0xfffffdff, 0x00000000, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x3fe59029), rs1=>rd:x27(0xfffffbff), rs2:x21(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x27, x21, 0x0, 0x3fe59029, 0xfffffbff, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x3fe59c29), rs1=>rd:x28(0xfffff7ff), rs2:x20(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x28, x20, 0x0, 0x3fe59c29, 0xfffff7ff, 0x00000000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x3fe58429), rs1=>rd:x29(0xffffefff), rs2:x19(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x29, x19, 0x0, 0x3fe58429, 0xffffefff, 0x00000000, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x3fe5b429), rs1=>rd:x30(0xffffdfff), rs2:x18(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x30, x18, 0x0, 0x3fe5b429, 0xffffdfff, 0x00000000, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x3fe5d429), rs1=>rd:x31(0xffffbfff), rs2:x17(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x31, x17, 0x0, 0x3fe5d429, 0xffffbfff, 0x00000000, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x3fe51429), rs1=>rd:x1(0xffff7fff), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x1, x16, 0x0, 0x3fe51429, 0xffff7fff, 0x00000000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x3fe49429), rs1=>rd:x2(0xfffeffff), rs2:x15(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x2, x15, 0x0, 0x3fe49429, 0xfffeffff, 0x00000000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x3fe79429), rs1=>rd:x3(0xfffdffff), rs2:x14(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x3, x14, 0x0, 0x3fe79429, 0xfffdffff, 0x00000000, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x3fe19429), rs1=>rd:x4(0xfffbffff), rs2:x13(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x4, x13, 0x0, 0x3fe19429, 0xfffbffff, 0x00000000, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x3fed9429), rs1=>rd:x5(0xfff7ffff), rs2:x12(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0x3fed9429, 0xfff7ffff, 0x00000000, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x3ff59429), rs1=>rd:x6(0xffefffff), rs2:x11(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x6, x11, 0x0, 0x3ff59429, 0xffefffff, 0x00000000, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x3fc59429), rs1=>rd:x7(0xffdfffff), rs2:x10(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x7, x10, 0x0, 0x3fc59429, 0xffdfffff, 0x00000000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x3fa59429), rs1=>rd:x8(0xffbfffff), rs2:x9(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x8, x9, 0x0, 0x3fa59429, 0xffbfffff, 0x00000000, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x29bfe594), rs1=>rd:x9(0xff7fffff), rs2:x8(0x00000000), imm:0x3
+ TEST_RI_OP(sm4ks, x9, x8, 0x3, 0x29bfe594, 0xff7fffff, 0x00000000, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x283fe594), rs1=>rd:x10(0xfeffffff), rs2:x7(0x00000000), imm:0x3
+ TEST_RI_OP(sm4ks, x10, x7, 0x3, 0x283fe594, 0xfeffffff, 0x00000000, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x2b3fe594), rs1=>rd:x11(0xfdffffff), rs2:x6(0x00000000), imm:0x3
+ TEST_RI_OP(sm4ks, x11, x6, 0x3, 0x2b3fe594, 0xfdffffff, 0x00000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x2d3fe594), rs1=>rd:x12(0xfbffffff), rs2:x5(0x00000000), imm:0x3
+ TEST_RI_OP(sm4ks, x12, x5, 0x3, 0x2d3fe594, 0xfbffffff, 0x00000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xed94293f), rs1=>rd:x13(0xf7ffffff), rs2:x4(0x00000000), imm:0x1
+ TEST_RI_OP(sm4ks, x13, x4, 0x1, 0xed94293f, 0xf7ffffff, 0x00000000, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xf594293f), rs1=>rd:x14(0xefffffff), rs2:x3(0x00000000), imm:0x1
+ TEST_RI_OP(sm4ks, x14, x3, 0x1, 0xf594293f, 0xefffffff, 0x00000000, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x093fe594), rs1=>rd:x15(0xdfffffff), rs2:x2(0x00000000), imm:0x3
+ TEST_RI_OP(sm4ks, x15, x2, 0x3, 0x093fe594, 0xdfffffff, 0x00000000, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xa594293f), rs1=>rd:x16(0xbfffffff), rs2:x1(0x00000000), imm:0x1
+ TEST_RI_OP(sm4ks, x16, x1, 0x1, 0xa594293f, 0xbfffffff, 0x00000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x14293fe5), rs1=>rd:x17(0x7fffffff), rs2:x31(0x00000000), imm:0x2
+ TEST_RI_OP(sm4ks, x17, x31, 0x2, 0x14293fe5, 0x7fffffff, 0x00000000, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x3fe59429), rs1=>rd:x18(0xffffffff), rs2:x30(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x18, x30, 0x0, 0x3fe59429, 0xffffffff, 0x00000000, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0xbecc9191), rs1=>rd:x19(0xadea5195), rs2:x29(0x121bcc23), imm:0x2
+ TEST_RI_OP(sm4ks, x19, x29, 0x2, 0xbecc9191, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1=>rd:x0(0xd2ffbec1), rs2:x28(0xa47d105b), imm:0x1
+ TEST_RI_OP(sm4ks, x0, x28, 0x1, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x7e21b2d0), rs1=>rd:x21(0xa8e1a8bb), rs2:x0(0x707af2c0), imm:0x3
+ TEST_RI_OP(sm4ks, x21, x0, 0x3, 0x7e21b2d0, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with random values
+ // result rd:x22(0x21e912ff), rs1=>rd:x22(0x48c99fcb), rs2:x26(0xe19bfbc3), imm:0x3
+ TEST_RI_OP(sm4ks, x22, x26, 0x3, 0x21e912ff, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/SM4KS-02.S b/riscof/suite/rv32i_m/K_unratified/SM4KS-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..761a61eea789daa1ae3bb4b3b2991c660276f092
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+++ b/riscof/suite/rv32i_m/K_unratified/SM4KS-02.S
@@ -0,0 +1,1779 @@
+// RISC-V Architectural Validation Test SM4KS-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sm4ks'.
+// Using dataset: sbox32
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",sm4ks)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox32
+ // result rd:x1(0x6df03a43), rs1=>rd:x1(0xadea5195), rs2:x16(0x00000000), imm:0x0
+ TEST_RI_OP(sm4ks, x1, x16, 0x0, 0x6df03a43, 0xadea5195, 0x00000000, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox32
+ // result rd:x2(0xc0b72ec1), rs1=>rd:x2(0xd2ffbec1), rs2:x15(0x00000100), imm:0x1
+ TEST_RI_OP(sm4ks, x2, x15, 0x1, 0xc0b72ec1, 0xd2ffbec1, 0x00000100, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox32
+ // result rd:x3(0xdc088826), rs1=>rd:x3(0xa8e1a8bb), rs2:x14(0x00020000), imm:0x2
+ TEST_RI_OP(sm4ks, x3, x14, 0x2, 0xdc088826, 0xa8e1a8bb, 0x00020000, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox32
+ // result rd:x4(0xb60980b4), rs1=>rd:x4(0x48c99fcb), rs2:x13(0x03000000), imm:0x3
+ TEST_RI_OP(sm4ks, x4, x13, 0x3, 0xb60980b4, 0x48c99fcb, 0x03000000, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox32
+ // result rd:x5(0xc6043483), rs1=>rd:x5(0x461d524f), rs2:x12(0x00000004), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0xc6043483, 0x461d524f, 0x00000004, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox32
+ // result rd:x6(0xcefaf18f), rs1=>rd:x6(0x528a10af), rs2:x11(0x00000500), imm:0x1
+ TEST_RI_OP(sm4ks, x6, x11, 0x1, 0xcefaf18f, 0x528a10af, 0x00000500, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox32
+ // result rd:x7(0xffa65b44), rs1=>rd:x7(0xe19bfbc3), rs2:x10(0x00060000), imm:0x2
+ TEST_RI_OP(sm4ks, x7, x10, 0x2, 0xffa65b44, 0xe19bfbc3, 0x00060000, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox32
+ // result rd:x8(0xc79a649b), rs1=>rd:x8(0x707af2c0), rs2:x9(0x07000000), imm:0x3
+ TEST_RI_OP(sm4ks, x8, x9, 0x3, 0xc79a649b, 0x707af2c0, 0x07000000, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox32
+ // result rd:x9(0x647f1b4d), rs1=>rd:x9(0xa47d105b), rs2:x8(0x00000008), imm:0x0
+ TEST_RI_OP(sm4ks, x9, x8, 0x0, 0x647f1b4d, 0xa47d105b, 0x00000008, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox32
+ // result rd:x10(0x04407ae3), rs1=>rd:x10(0x121bcc23), rs2:x7(0x00000900), imm:0x1
+ TEST_RI_OP(sm4ks, x10, x7, 0x1, 0x04407ae3, 0x121bcc23, 0x00000900, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox32
+ // result rd:x11(0xa7fed197), rs1=>rd:x11(0xadea5195), rs2:x6(0x000a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x11, x6, 0x2, 0xa7fed197, 0xadea5195, 0x000a0000, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox32
+ // result rd:x12(0x10bfa6a0), rs1=>rd:x12(0xd2ffbec1), rs2:x5(0x0b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x12, x5, 0x3, 0x10bfa6a0, 0xd2ffbec1, 0x0b000000, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox32
+ // result rd:x13(0xa8e4bc93), rs1=>rd:x13(0xa8e1a8bb), rs2:x4(0x0000000c), imm:0x0
+ TEST_RI_OP(sm4ks, x13, x4, 0x0, 0xa8e4bc93, 0xa8e1a8bb, 0x0000000c, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox32
+ // result rd:x14(0xd7b464ab), rs1=>rd:x14(0x48c99fcb), rs2:x3(0x00000d00), imm:0x1
+ TEST_RI_OP(sm4ks, x14, x3, 0x1, 0xd7b464ab, 0x48c99fcb, 0x00000d00, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox32
+ // result rd:x15(0x5031d24a), rs1=>rd:x15(0x461d524f), rs2:x2(0x000e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x15, x2, 0x2, 0x5031d24a, 0x461d524f, 0x000e0000, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox32
+ // result rd:x16(0x572a90ad), rs1=>rd:x16(0x528a10af), rs2:x1(0x0f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x16, x1, 0x3, 0x572a90ad, 0x528a10af, 0x0f000000, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox32
+ // result rd:x17(0x811eeee8), rs1=>rd:x17(0xe19bfbc3), rs2:x31(0x00000010), imm:0x0
+ TEST_RI_OP(sm4ks, x17, x31, 0x0, 0x811eeee8, 0xe19bfbc3, 0x00000010, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox32
+ // result rd:x18(0xfc499520), rs1=>rd:x18(0x707af2c0), rs2:x30(0x00001100), imm:0x1
+ TEST_RI_OP(sm4ks, x18, x30, 0x1, 0xfc499520, 0x707af2c0, 0x00001100, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox32
+ // result rd:x19(0xe9e75048), rs1=>rd:x19(0xa47d105b), rs2:x29(0x00120000), imm:0x2
+ TEST_RI_OP(sm4ks, x19, x29, 0x2, 0xe9e75048, 0xa47d105b, 0x00120000, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox32
+ // result rd:x20(0x64dbc218), rs1=>rd:x20(0x121bcc23), rs2:x28(0x13000000), imm:0x3
+ TEST_RI_OP(sm4ks, x20, x28, 0x3, 0x64dbc218, 0x121bcc23, 0x13000000, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox32
+ // result rd:x21(0xedef44bf), rs1=>rd:x21(0xadea5195), rs2:x27(0x00000014), imm:0x0
+ TEST_RI_OP(sm4ks, x21, x27, 0x0, 0xedef44bf, 0xadea5195, 0x00000014, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox32
+ // result rd:x22(0xc5a00001), rs1=>rd:x22(0xd2ffbec1), rs2:x26(0x00001500), imm:0x1
+ TEST_RI_OP(sm4ks, x22, x26, 0x1, 0xc5a00001, 0xd2ffbec1, 0x00001500, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox32
+ // result rd:x23(0xaae528bb), rs1=>rd:x23(0xa8e1a8bb), rs2:x25(0x00160000), imm:0x2
+ TEST_RI_OP(sm4ks, x23, x25, 0x2, 0xaae528bb, 0xa8e1a8bb, 0x00160000, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox32
+ // result rd:x24(0xd4609861), rs1=>rd:x24(0x48c99fcb), rs2:x24(0x17000000), imm:0x3
+ TEST_RI_OP(sm4ks, x24, x24, 0x3, 0xd4609861, 0x48c99fcb, 0x17000000, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox32
+ // result rd:x25(0x060807e5), rs1=>rd:x25(0x461d524f), rs2:x23(0x00000018), imm:0x0
+ TEST_RI_OP(sm4ks, x25, x23, 0x0, 0x060807e5, 0x461d524f, 0x00000018, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox32
+ // result rd:x26(0x5aa8542f), rs1=>rd:x26(0x528a10af), rs2:x22(0x00001900), imm:0x1
+ TEST_RI_OP(sm4ks, x26, x22, 0x1, 0x5aa8542f, 0x528a10af, 0x00001900, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox32
+ // result rd:x27(0xe8889b41), rs1=>rd:x27(0xe19bfbc3), rs2:x21(0x001a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x27, x21, 0x2, 0xe8889b41, 0xe19bfbc3, 0x001a0000, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox32
+ // result rd:x28(0x56baf6d3), rs1=>rd:x28(0x707af2c0), rs2:x20(0x1b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x28, x20, 0x3, 0x56baf6d3, 0x707af2c0, 0x1b000000, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox32
+ // result rd:x29(0x84f43412), rs1=>rd:x29(0xa47d105b), rs2:x19(0x0000001c), imm:0x0
+ TEST_RI_OP(sm4ks, x29, x19, 0x0, 0x84f43412, 0xa47d105b, 0x0000001c, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox32
+ // result rd:x30(0x02584ae3), rs1=>rd:x30(0x121bcc23), rs2:x18(0x00001d00), imm:0x1
+ TEST_RI_OP(sm4ks, x30, x18, 0x1, 0x02584ae3, 0x121bcc23, 0x00001d00, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox32
+ // result rd:x31(0xaeec9195), rs1=>rd:x31(0xadea5195), rs2:x17(0x001e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x31, x17, 0x2, 0xaeec9195, 0xadea5195, 0x001e0000, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox32
+ // result rd:x1(0x4bdf2d8d), rs1=>rd:x1(0xd2ffbec1), rs2:x16(0x1f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x1, x16, 0x3, 0x4bdf2d8d, 0xd2ffbec1, 0x1f000000, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox32
+ // result rd:x2(0x28f2e627), rs1=>rd:x2(0xa8e1a8bb), rs2:x15(0x00000020), imm:0x0
+ TEST_RI_OP(sm4ks, x2, x15, 0x0, 0x28f2e627, 0xa8e1a8bb, 0x00000020, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox32
+ // result rd:x3(0x40e8dd8b), rs1=>rd:x3(0x48c99fcb), rs2:x14(0x00002100), imm:0x1
+ TEST_RI_OP(sm4ks, x3, x14, 0x1, 0x40e8dd8b, 0x48c99fcb, 0x00002100, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox32
+ // result rd:x4(0x6e4d5245), rs1=>rd:x4(0x461d524f), rs2:x13(0x00220000), imm:0x2
+ TEST_RI_OP(sm4ks, x4, x13, 0x2, 0x6e4d5245, 0x461d524f, 0x00220000, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox32
+ // result rd:x5(0xa60a0ed5), rs1=>rd:x5(0x528a10af), rs2:x12(0x23000000), imm:0x3
+ TEST_RI_OP(sm4ks, x5, x12, 0x3, 0xa60a0ed5, 0x528a10af, 0x23000000, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox32
+ // result rd:x6(0xc109b352), rs1=>rd:x6(0xe19bfbc3), rs2:x11(0x00000024), imm:0x0
+ TEST_RI_OP(sm4ks, x6, x11, 0x0, 0xc109b352, 0xe19bfbc3, 0x00000024, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox32
+ // result rd:x7(0xed0d1d20), rs1=>rd:x7(0x707af2c0), rs2:x10(0x00002500), imm:0x1
+ TEST_RI_OP(sm4ks, x7, x10, 0x1, 0xed0d1d20, 0x707af2c0, 0x00002500, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox32
+ // result rd:x8(0xe8e51048), rs1=>rd:x8(0xa47d105b), rs2:x9(0x00260000), imm:0x2
+ TEST_RI_OP(sm4ks, x8, x9, 0x2, 0xe8e51048, 0xa47d105b, 0x00260000, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox32
+ // result rd:x9(0x685bc31e), rs1=>rd:x9(0x121bcc23), rs2:x8(0x27000000), imm:0x3
+ TEST_RI_OP(sm4ks, x9, x8, 0x3, 0x685bc31e, 0x121bcc23, 0x27000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox32
+ // result rd:x10(0xcd6c48a6), rs1=>rd:x10(0xadea5195), rs2:x7(0x00000028), imm:0x0
+ TEST_RI_OP(sm4ks, x10, x7, 0x0, 0xcd6c48a6, 0xadea5195, 0x00000028, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox32
+ // result rd:x11(0xd8d5ea41), rs1=>rd:x11(0xd2ffbec1), rs2:x6(0x00002900), imm:0x1
+ TEST_RI_OP(sm4ks, x11, x6, 0x1, 0xd8d5ea41, 0xd2ffbec1, 0x00002900, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox32
+ // result rd:x12(0xadeac83a), rs1=>rd:x12(0xa8e1a8bb), rs2:x5(0x002a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x12, x5, 0x2, 0xadeac83a, 0xa8e1a8bb, 0x002a0000, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox32
+ // result rd:x13(0x0ba917ea), rs1=>rd:x13(0x48c99fcb), rs2:x4(0x2b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x13, x4, 0x3, 0x0ba917ea, 0x48c99fcb, 0x2b000000, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox32
+ // result rd:x14(0xe68024a2), rs1=>rd:x14(0x461d524f), rs2:x3(0x0000002c), imm:0x0
+ TEST_RI_OP(sm4ks, x14, x3, 0x0, 0xe68024a2, 0x461d524f, 0x0000002c, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox32
+ // result rd:x15(0xcbeddf4f), rs1=>rd:x15(0x528a10af), rs2:x2(0x00002d00), imm:0x1
+ TEST_RI_OP(sm4ks, x15, x2, 0x1, 0xcbeddf4f, 0x528a10af, 0x00002d00, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox32
+ // result rd:x16(0xb7377bd6), rs1=>rd:x16(0xe19bfbc3), rs2:x1(0x002e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x16, x1, 0x2, 0xb7377bd6, 0xe19bfbc3, 0x002e0000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox32
+ // result rd:x17(0x123afef1), rs1=>rd:x17(0x707af2c0), rs2:x31(0x2f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x17, x31, 0x3, 0x123afef1, 0x707af2c0, 0x2f000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox32
+ // result rd:x18(0x246162bf), rs1=>rd:x18(0xa47d105b), rs2:x30(0x00000030), imm:0x0
+ TEST_RI_OP(sm4ks, x18, x30, 0x0, 0x246162bf, 0xa47d105b, 0x00000030, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox32
+ // result rd:x19(0x84427f43), rs1=>rd:x19(0x121bcc23), rs2:x29(0x00003100), imm:0x1
+ TEST_RI_OP(sm4ks, x19, x29, 0x1, 0x84427f43, 0x121bcc23, 0x00003100, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox32
+ // result rd:x20(0xa3f6d196), rs1=>rd:x20(0xadea5195), rs2:x28(0x00320000), imm:0x2
+ TEST_RI_OP(sm4ks, x20, x28, 0x2, 0xa3f6d196, 0xadea5195, 0x00320000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox32
+ // result rd:x21(0x7bdf2b95), rs1=>rd:x21(0xd2ffbec1), rs2:x27(0x33000000), imm:0x3
+ TEST_RI_OP(sm4ks, x21, x27, 0x3, 0x7bdf2b95, 0xd2ffbec1, 0x33000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox32
+ // result rd:x22(0x8878cc72), rs1=>rd:x22(0xa8e1a8bb), rs2:x26(0x00000034), imm:0x0
+ TEST_RI_OP(sm4ks, x22, x26, 0x0, 0x8878cc72, 0xa8e1a8bb, 0x00000034, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox32
+ // result rd:x23(0x49cd97cb), rs1=>rd:x23(0x48c99fcb), rs2:x25(0x00003500), imm:0x1
+ TEST_RI_OP(sm4ks, x23, x25, 0x1, 0x49cd97cb, 0x48c99fcb, 0x00003500, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox32
+ // result rd:x24(0x74de001d), rs1=>rd:x24(0x461d524f), rs2:x24(0x00360000), imm:0x2
+ TEST_RI_OP(sm4ks, x24, x24, 0x2, 0x74de001d, 0x461d524f, 0x00360000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox32
+ // result rd:x25(0xc72a82e5), rs1=>rd:x25(0x528a10af), rs2:x23(0x37000000), imm:0x3
+ TEST_RI_OP(sm4ks, x25, x23, 0x3, 0xc72a82e5, 0x528a10af, 0x37000000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox32
+ // result rd:x26(0xe18bbb43), rs1=>rd:x26(0xe19bfbc3), rs2:x22(0x00000038), imm:0x0
+ TEST_RI_OP(sm4ks, x26, x22, 0x0, 0xe18bbb43, 0xe19bfbc3, 0x00000038, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox32
+ // result rd:x27(0xeb152d20), rs1=>rd:x27(0x707af2c0), rs2:x21(0x00003900), imm:0x1
+ TEST_RI_OP(sm4ks, x27, x21, 0x1, 0xeb152d20, 0x707af2c0, 0x00003900, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox32
+ // result rd:x28(0xeee99049), rs1=>rd:x28(0xa47d105b), rs2:x20(0x003a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x28, x20, 0x2, 0xeee99049, 0xa47d105b, 0x003a0000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox32
+ // result rd:x29(0xe85bd35e), rs1=>rd:x29(0x121bcc23), rs2:x19(0x3b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x29, x19, 0x3, 0xe85bd35e, 0x121bcc23, 0x3b000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox32
+ // result rd:x30(0x0d646be0), rs1=>rd:x30(0xadea5195), rs2:x18(0x0000003c), imm:0x0
+ TEST_RI_OP(sm4ks, x30, x18, 0x0, 0x0d646be0, 0xadea5195, 0x0000003c, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox32
+ // result rd:x31(0x43b83121), rs1=>rd:x31(0xd2ffbec1), rs2:x17(0x00003d00), imm:0x1
+ TEST_RI_OP(sm4ks, x31, x17, 0x1, 0x43b83121, 0xd2ffbec1, 0x00003d00, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox32
+ // result rd:x1(0xb7de483c), rs1=>rd:x1(0xa8e1a8bb), rs2:x16(0x003e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x1, x16, 0x2, 0xb7de483c, 0xa8e1a8bb, 0x003e0000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox32
+ // result rd:x2(0xee098b98), rs1=>rd:x2(0x48c99fcb), rs2:x15(0x3f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x2, x15, 0x3, 0xee098b98, 0x48c99fcb, 0x3f000000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox32
+ // result rd:x3(0xa6957108), rs1=>rd:x3(0x461d524f), rs2:x14(0x00000040), imm:0x0
+ TEST_RI_OP(sm4ks, x3, x14, 0x0, 0xa6957108, 0x461d524f, 0x00000040, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox32
+ // result rd:x4(0xd289174f), rs1=>rd:x4(0x528a10af), rs2:x13(0x00004100), imm:0x1
+ TEST_RI_OP(sm4ks, x4, x13, 0x1, 0xd289174f, 0x528a10af, 0x00004100, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox32
+ // result rd:x5(0xb23c1b57), rs1=>rd:x5(0xe19bfbc3), rs2:x12(0x00420000), imm:0x2
+ TEST_RI_OP(sm4ks, x5, x12, 0x2, 0xb23c1b57, 0xe19bfbc3, 0x00420000, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox32
+ // result rd:x6(0x8cfaedbe), rs1=>rd:x6(0x707af2c0), rs2:x11(0x43000000), imm:0x3
+ TEST_RI_OP(sm4ks, x6, x11, 0x3, 0x8cfaedbe, 0x707af2c0, 0x43000000, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox32
+ // result rd:x7(0xc4e369a8), rs1=>rd:x7(0xa47d105b), rs2:x10(0x00000044), imm:0x0
+ TEST_RI_OP(sm4ks, x7, x10, 0x0, 0xc4e369a8, 0xa47d105b, 0x00000044, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox32
+ // result rd:x8(0x9c22bf43), rs1=>rd:x8(0x121bcc23), rs2:x9(0x00004500), imm:0x1
+ TEST_RI_OP(sm4ks, x8, x9, 0x1, 0x9c22bf43, 0x121bcc23, 0x00004500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox32
+ // result rd:x9(0xa6fdb117), rs1=>rd:x9(0xadea5195), rs2:x8(0x00460000), imm:0x2
+ TEST_RI_OP(sm4ks, x9, x8, 0x2, 0xa6fdb117, 0xadea5195, 0x00460000, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox32
+ // result rd:x10(0x68bfa99c), rs1=>rd:x10(0xd2ffbec1), rs2:x7(0x47000000), imm:0x3
+ TEST_RI_OP(sm4ks, x10, x7, 0x3, 0x68bfa99c, 0xd2ffbec1, 0x47000000, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox32
+ // result rd:x11(0xc871e938), rs1=>rd:x11(0xa8e1a8bb), rs2:x6(0x00000048), imm:0x0
+ TEST_RI_OP(sm4ks, x11, x6, 0x0, 0xc871e938, 0xa8e1a8bb, 0x00000048, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox32
+ // result rd:x12(0xc3e5c6eb), rs1=>rd:x12(0x48c99fcb), rs2:x5(0x00004900), imm:0x1
+ TEST_RI_OP(sm4ks, x12, x5, 0x1, 0xc3e5c6eb, 0x48c99fcb, 0x00004900, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox32
+ // result rd:x13(0x5821d248), rs1=>rd:x13(0x461d524f), rs2:x4(0x004a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x13, x4, 0x2, 0x5821d248, 0x461d524f, 0x004a0000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox32
+ // result rd:x14(0x4baa93a3), rs1=>rd:x14(0x528a10af), rs2:x3(0x4b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x14, x3, 0x3, 0x4baa93a3, 0x528a10af, 0x4b000000, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox32
+ // result rd:x15(0x21878825), rs1=>rd:x15(0xe19bfbc3), rs2:x2(0x0000004c), imm:0x0
+ TEST_RI_OP(sm4ks, x15, x2, 0x0, 0x21878825, 0xe19bfbc3, 0x0000004c, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox32
+ // result rd:x16(0xe0387760), rs1=>rd:x16(0x707af2c0), rs2:x1(0x00004d00), imm:0x1
+ TEST_RI_OP(sm4ks, x16, x1, 0x1, 0xe0387760, 0x707af2c0, 0x00004d00, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox32
+ // result rd:x17(0x8332f0d2), rs1=>rd:x17(0xa47d105b), rs2:x31(0x004e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x17, x31, 0x2, 0x8332f0d2, 0xa47d105b, 0x004e0000, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox32
+ // result rd:x18(0xba1bd977), rs1=>rd:x18(0x121bcc23), rs2:x30(0x4f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x18, x30, 0x3, 0xba1bd977, 0x121bcc23, 0x4f000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox32
+ // result rd:x19(0xade765fd), rs1=>rd:x19(0xadea5195), rs2:x29(0x00000050), imm:0x0
+ TEST_RI_OP(sm4ks, x19, x29, 0x0, 0xade765fd, 0xadea5195, 0x00000050, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox32
+ // result rd:x20(0x5fcad5a1), rs1=>rd:x20(0xd2ffbec1), rs2:x28(0x00005100), imm:0x1
+ TEST_RI_OP(sm4ks, x20, x28, 0x1, 0x5fcad5a1, 0xd2ffbec1, 0x00005100, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox32
+ // result rd:x21(0xe860882b), rs1=>rd:x21(0xa8e1a8bb), rs2:x27(0x00520000), imm:0x2
+ TEST_RI_OP(sm4ks, x21, x27, 0x2, 0xe860882b, 0xa8e1a8bb, 0x00520000, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox32
+ // result rd:x22(0xfa898992), rs1=>rd:x22(0x48c99fcb), rs2:x26(0x53000000), imm:0x3
+ TEST_RI_OP(sm4ks, x22, x26, 0x3, 0xfa898992, 0x48c99fcb, 0x53000000, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox32
+ // result rd:x23(0x66936a3e), rs1=>rd:x23(0x461d524f), rs2:x25(0x00000054), imm:0x0
+ TEST_RI_OP(sm4ks, x23, x25, 0x0, 0x66936a3e, 0x461d524f, 0x00000054, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox32
+ // result rd:x24(0x0c323180), rs1=>rd:x24(0x528a10af), rs2:x24(0x00005500), imm:0x1
+ TEST_RI_OP(sm4ks, x24, x24, 0x1, 0x0c323180, 0x528a10af, 0x00005500, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox32
+ // result rd:x25(0x8c41bbd8), rs1=>rd:x25(0xe19bfbc3), rs2:x23(0x00560000), imm:0x2
+ TEST_RI_OP(sm4ks, x25, x23, 0x2, 0x8c41bbd8, 0xe19bfbc3, 0x00560000, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox32
+ // result rd:x26(0xfb1a6385), rs1=>rd:x26(0x707af2c0), rs2:x22(0x57000000), imm:0x3
+ TEST_RI_OP(sm4ks, x26, x22, 0x3, 0xfb1a6385, 0x707af2c0, 0x57000000, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox32
+ // result rd:x27(0xa4626ca3), rs1=>rd:x27(0xa47d105b), rs2:x21(0x00000058), imm:0x0
+ TEST_RI_OP(sm4ks, x27, x21, 0x0, 0xa4626ca3, 0xa47d105b, 0x00000058, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox32
+ // result rd:x28(0x8f6e2743), rs1=>rd:x28(0x121bcc23), rs2:x20(0x00005900), imm:0x1
+ TEST_RI_OP(sm4ks, x28, x20, 0x1, 0x8f6e2743, 0x121bcc23, 0x00005900, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox32
+ // result rd:x29(0xaae5b114), rs1=>rd:x29(0xadea5195), rs2:x19(0x005a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x29, x19, 0x2, 0xaae5b114, 0xadea5195, 0x005a0000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox32
+ // result rd:x30(0x999f37e4), rs1=>rd:x30(0xd2ffbec1), rs2:x18(0x5b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x30, x18, 0x3, 0x999f37e4, 0xd2ffbec1, 0x5b000000, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox32
+ // result rd:x31(0xa8ef90cb), rs1=>rd:x31(0xa8e1a8bb), rs2:x17(0x0000005c), imm:0x0
+ TEST_RI_OP(sm4ks, x31, x17, 0x0, 0xa8ef90cb, 0xa8e1a8bb, 0x0000005c, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox32
+ // result rd:x1(0x42e2c90b), rs1=>rd:x1(0x48c99fcb), rs2:x16(0x00005d00), imm:0x1
+ TEST_RI_OP(sm4ks, x1, x16, 0x1, 0x42e2c90b, 0x48c99fcb, 0x00005d00, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox32
+ // result rd:x2(0x0880f2dc), rs1=>rd:x2(0x461d524f), rs2:x15(0x005e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x2, x15, 0x2, 0x0880f2dc, 0x461d524f, 0x005e0000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox32
+ // result rd:x3(0x672a96b5), rs1=>rd:x3(0x528a10af), rs2:x14(0x5f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x3, x14, 0x3, 0x672a96b5, 0x528a10af, 0x5f000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox32
+ // result rd:x4(0x2198f4dd), rs1=>rd:x4(0xe19bfbc3), rs2:x13(0x00000060), imm:0x0
+ TEST_RI_OP(sm4ks, x4, x13, 0x0, 0x2198f4dd, 0xe19bfbc3, 0x00000060, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox32
+ // result rd:x5(0x7468d640), rs1=>rd:x5(0x707af2c0), rs2:x12(0x00006100), imm:0x1
+ TEST_RI_OP(sm4ks, x5, x12, 0x1, 0x7468d640, 0x707af2c0, 0x00006100, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox32
+ // result rd:x6(0xa373d05a), rs1=>rd:x6(0xa47d105b), rs2:x11(0x00620000), imm:0x2
+ TEST_RI_OP(sm4ks, x6, x11, 0x2, 0xa373d05a, 0xa47d105b, 0x00620000, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox32
+ // result rd:x7(0x4cdbc70c), rs1=>rd:x7(0x121bcc23), rs2:x10(0x63000000), imm:0x3
+ TEST_RI_OP(sm4ks, x7, x10, 0x3, 0x4cdbc70c, 0x121bcc23, 0x63000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox32
+ // result rd:x8(0xcd6660f6), rs1=>rd:x8(0xadea5195), rs2:x9(0x00000064), imm:0x0
+ TEST_RI_OP(sm4ks, x8, x9, 0x0, 0xcd6660f6, 0xadea5195, 0x00000064, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox32
+ // result rd:x9(0xd9d3e6c1), rs1=>rd:x9(0xd2ffbec1), rs2:x8(0x00006500), imm:0x1
+ TEST_RI_OP(sm4ks, x9, x8, 0x1, 0xd9d3e6c1, 0xd2ffbec1, 0x00006500, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox32
+ // result rd:x10(0xc0308821), rs1=>rd:x10(0xa8e1a8bb), rs2:x7(0x00660000), imm:0x2
+ TEST_RI_OP(sm4ks, x10, x7, 0x2, 0xc0308821, 0xa8e1a8bb, 0x00660000, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox32
+ // result rd:x11(0xea898b9a), rs1=>rd:x11(0x48c99fcb), rs2:x6(0x67000000), imm:0x3
+ TEST_RI_OP(sm4ks, x11, x6, 0x3, 0xea898b9a, 0x48c99fcb, 0x67000000, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox32
+ // result rd:x12(0xe699406a), rs1=>rd:x12(0x461d524f), rs2:x5(0x00000068), imm:0x0
+ TEST_RI_OP(sm4ks, x12, x5, 0x0, 0xe699406a, 0x461d524f, 0x00000068, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox32
+ // result rd:x13(0x569b32ef), rs1=>rd:x13(0x528a10af), rs2:x4(0x00006900), imm:0x1
+ TEST_RI_OP(sm4ks, x13, x4, 0x1, 0x569b32ef, 0x528a10af, 0x00006900, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox32
+ // result rd:x14(0xdfe77bcc), rs1=>rd:x14(0xe19bfbc3), rs2:x3(0x006a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x14, x3, 0x2, 0xdfe77bcc, 0xe19bfbc3, 0x006a0000, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox32
+ // result rd:x15(0x4b1a75dd), rs1=>rd:x15(0x707af2c0), rs2:x2(0x6b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x15, x2, 0x3, 0x4b1a75dd, 0x707af2c0, 0x6b000000, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox32
+ // result rd:x16(0x84fd105a), rs1=>rd:x16(0xa47d105b), rs2:x1(0x0000006c), imm:0x0
+ TEST_RI_OP(sm4ks, x16, x1, 0x0, 0x84fd105a, 0xa47d105b, 0x0000006c, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox32
+ // result rd:x17(0x960bed03), rs1=>rd:x17(0x121bcc23), rs2:x31(0x00006d00), imm:0x1
+ TEST_RI_OP(sm4ks, x17, x31, 0x1, 0x960bed03, 0x121bcc23, 0x00006d00, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox32
+ // result rd:x18(0x9192519a), rs1=>rd:x18(0xadea5195), rs2:x30(0x006e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x18, x30, 0x2, 0x9192519a, 0xadea5195, 0x006e0000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox32
+ // result rd:x19(0x551f2e82), rs1=>rd:x19(0xd2ffbec1), rs2:x29(0x6f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x19, x29, 0x3, 0x551f2e82, 0xd2ffbec1, 0x6f000000, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox32
+ // result rd:x20(0x28fbc26f), rs1=>rd:x20(0xa8e1a8bb), rs2:x28(0x00000070), imm:0x0
+ TEST_RI_OP(sm4ks, x20, x28, 0x0, 0x28fbc26f, 0xa8e1a8bb, 0x00000070, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox32
+ // result rd:x21(0x48c99fcb), rs1=>rd:x21(0x48c99fcb), rs2:x27(0x00007100), imm:0x1
+ TEST_RI_OP(sm4ks, x21, x27, 0x1, 0x48c99fcb, 0x48c99fcb, 0x00007100, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox32
+ // result rd:x22(0x655b9247), rs1=>rd:x22(0x461d524f), rs2:x26(0x00720000), imm:0x2
+ TEST_RI_OP(sm4ks, x22, x26, 0x2, 0x655b9247, 0x461d524f, 0x00720000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox32
+ // result rd:x23(0x056a9a84), rs1=>rd:x23(0x528a10af), rs2:x25(0x73000000), imm:0x3
+ TEST_RI_OP(sm4ks, x23, x25, 0x3, 0x056a9a84, 0x528a10af, 0x73000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox32
+ // result rd:x24(0xe0934feb), rs1=>rd:x24(0xe19bfbc3), rs2:x24(0x00000074), imm:0x0
+ TEST_RI_OP(sm4ks, x24, x24, 0x0, 0xe0934feb, 0xe19bfbc3, 0x00000074, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox32
+ // result rd:x25(0xea1321a0), rs1=>rd:x25(0x707af2c0), rs2:x23(0x00007500), imm:0x1
+ TEST_RI_OP(sm4ks, x25, x23, 0x1, 0xea1321a0, 0x707af2c0, 0x00007500, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox32
+ // result rd:x26(0xb75af0df), rs1=>rd:x26(0xa47d105b), rs2:x22(0x00760000), imm:0x2
+ TEST_RI_OP(sm4ks, x26, x22, 0x2, 0xb75af0df, 0xa47d105b, 0x00760000, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox32
+ // result rd:x27(0x405bc60a), rs1=>rd:x27(0x121bcc23), rs2:x21(0x77000000), imm:0x3
+ TEST_RI_OP(sm4ks, x27, x21, 0x3, 0x405bc60a, 0x121bcc23, 0x77000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox32
+ // result rd:x28(0x2de377d9), rs1=>rd:x28(0xadea5195), rs2:x20(0x00000078), imm:0x0
+ TEST_RI_OP(sm4ks, x28, x20, 0x0, 0x2de377d9, 0xadea5195, 0x00000078, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox32
+ // result rd:x29(0xd4e48801), rs1=>rd:x29(0xd2ffbec1), rs2:x19(0x00007900), imm:0x1
+ TEST_RI_OP(sm4ks, x29, x19, 0x1, 0xd4e48801, 0xd2ffbec1, 0x00007900, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox32
+ // result rd:x30(0xa9e3e8bb), rs1=>rd:x30(0xa8e1a8bb), rs2:x18(0x007a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x30, x18, 0x2, 0xa9e3e8bb, 0xa8e1a8bb, 0x007a0000, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox32
+ // result rd:x31(0xaf2903b8), rs1=>rd:x31(0x48c99fcb), rs2:x17(0x7b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x31, x17, 0x3, 0xaf2903b8, 0x48c99fcb, 0x7b000000, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox32
+ // result rd:x1(0x460902ef), rs1=>rd:x1(0x461d524f), rs2:x16(0x0000007c), imm:0x0
+ TEST_RI_OP(sm4ks, x1, x16, 0x0, 0x460902ef, 0x461d524f, 0x0000007c, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox32
+ // result rd:x2(0x4ae8d42f), rs1=>rd:x2(0x528a10af), rs2:x15(0x00007d00), imm:0x1
+ TEST_RI_OP(sm4ks, x2, x15, 0x1, 0x4ae8d42f, 0x528a10af, 0x00007d00, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox32
+ // result rd:x3(0x8553fbda), rs1=>rd:x3(0xe19bfbc3), rs2:x14(0x007e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x3, x14, 0x2, 0x8553fbda, 0xe19bfbc3, 0x007e0000, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox32
+ // result rd:x4(0xeebae18f), rs1=>rd:x4(0x707af2c0), rs2:x13(0x7f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x4, x13, 0x3, 0xeebae18f, 0x707af2c0, 0x7f000000, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox32
+ // result rd:x5(0xe46065b1), rs1=>rd:x5(0xa47d105b), rs2:x12(0x00000080), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0xe46065b1, 0xa47d105b, 0x00000080, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox32
+ // result rd:x6(0x854473c3), rs1=>rd:x6(0x121bcc23), rs2:x11(0x00008100), imm:0x1
+ TEST_RI_OP(sm4ks, x6, x11, 0x1, 0x854473c3, 0x121bcc23, 0x00008100, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox32
+ // result rd:x7(0xe8601184), rs1=>rd:x7(0xadea5195), rs2:x10(0x00820000), imm:0x2
+ TEST_RI_OP(sm4ks, x7, x10, 0x2, 0xe8601184, 0xadea5195, 0x00820000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox32
+ // result rd:x8(0x00bfa4a8), rs1=>rd:x8(0xd2ffbec1), rs2:x9(0x83000000), imm:0x3
+ TEST_RI_OP(sm4ks, x8, x9, 0x3, 0x00bfa4a8, 0xd2ffbec1, 0x83000000, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox32
+ // result rd:x9(0xa8e988fb), rs1=>rd:x9(0xa8e1a8bb), rs2:x8(0x00000084), imm:0x0
+ TEST_RI_OP(sm4ks, x9, x8, 0x0, 0xa8e988fb, 0xa8e1a8bb, 0x00000084, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox32
+ // result rd:x10(0xd0aa582b), rs1=>rd:x10(0x48c99fcb), rs2:x7(0x00008500), imm:0x1
+ TEST_RI_OP(sm4ks, x10, x7, 0x1, 0xd0aa582b, 0x48c99fcb, 0x00008500, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox32
+ // result rd:x11(0x5a255248), rs1=>rd:x11(0x461d524f), rs2:x6(0x00860000), imm:0x2
+ TEST_RI_OP(sm4ks, x11, x6, 0x2, 0x5a255248, 0x461d524f, 0x00860000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox32
+ // result rd:x12(0xe72a86f5), rs1=>rd:x12(0x528a10af), rs2:x5(0x87000000), imm:0x3
+ TEST_RI_OP(sm4ks, x12, x5, 0x3, 0xe72a86f5, 0x528a10af, 0x87000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox32
+ // result rd:x13(0x810faa60), rs1=>rd:x13(0xe19bfbc3), rs2:x4(0x00000088), imm:0x0
+ TEST_RI_OP(sm4ks, x13, x4, 0x0, 0x810faa60, 0xe19bfbc3, 0x00000088, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox32
+ // result rd:x14(0xee010520), rs1=>rd:x14(0x707af2c0), rs2:x3(0x00008900), imm:0x1
+ TEST_RI_OP(sm4ks, x14, x3, 0x1, 0xee010520, 0x707af2c0, 0x00008900, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox32
+ // result rd:x15(0xdd8f5045), rs1=>rd:x15(0xa47d105b), rs2:x2(0x008a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x15, x2, 0x2, 0xdd8f5045, 0xa47d105b, 0x008a0000, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox32
+ // result rd:x16(0xdcdbd544), rs1=>rd:x16(0x121bcc23), rs2:x1(0x8b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x16, x1, 0x3, 0xdcdbd544, 0x121bcc23, 0x8b000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox32
+ // result rd:x17(0x8d752d6c), rs1=>rd:x17(0xadea5195), rs2:x31(0x0000008c), imm:0x0
+ TEST_RI_OP(sm4ks, x17, x31, 0x0, 0x8d752d6c, 0xadea5195, 0x0000008c, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox32
+ // result rd:x18(0x5ecfdfe1), rs1=>rd:x18(0xd2ffbec1), rs2:x30(0x00008d00), imm:0x1
+ TEST_RI_OP(sm4ks, x18, x30, 0x1, 0x5ecfdfe1, 0xd2ffbec1, 0x00008d00, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox32
+ // result rd:x19(0xa2f40839), rs1=>rd:x19(0xa8e1a8bb), rs2:x29(0x008e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x19, x29, 0x2, 0xa2f40839, 0xa8e1a8bb, 0x008e0000, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox32
+ // result rd:x20(0xe9e90b9b), rs1=>rd:x20(0x48c99fcb), rs2:x28(0x8f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x20, x28, 0x3, 0xe9e90b9b, 0x48c99fcb, 0x8f000000, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox32
+ // result rd:x21(0x460122af), rs1=>rd:x21(0x461d524f), rs2:x27(0x00000090), imm:0x0
+ TEST_RI_OP(sm4ks, x21, x27, 0x0, 0x460122af, 0x461d524f, 0x00000090, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox32
+ // result rd:x22(0x47ddbe6f), rs1=>rd:x22(0x528a10af), rs2:x26(0x00009100), imm:0x1
+ TEST_RI_OP(sm4ks, x22, x26, 0x1, 0x47ddbe6f, 0x528a10af, 0x00009100, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox32
+ // result rd:x23(0xcfc65b48), rs1=>rd:x23(0xe19bfbc3), rs2:x25(0x00920000), imm:0x2
+ TEST_RI_OP(sm4ks, x23, x25, 0x2, 0xcfc65b48, 0xe19bfbc3, 0x00920000, x1, 4, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox32
+ // result rd:x24(0x37801452), rs1=>rd:x24(0x707af2c0), rs2:x24(0x93000000), imm:0x3
+ TEST_RI_OP(sm4ks, x24, x24, 0x3, 0x37801452, 0x707af2c0, 0x93000000, x1, 8, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox32
+ // result rd:x25(0xc4ee5dc0), rs1=>rd:x25(0xa47d105b), rs2:x23(0x00000094), imm:0x0
+ TEST_RI_OP(sm4ks, x25, x23, 0x0, 0xc4ee5dc0, 0xa47d105b, 0x00000094, x1, 12, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox32
+ // result rd:x26(0x1401f8a3), rs1=>rd:x26(0x121bcc23), rs2:x22(0x00009500), imm:0x1
+ TEST_RI_OP(sm4ks, x26, x22, 0x1, 0x1401f8a3, 0x121bcc23, 0x00009500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox32
+ // result rd:x27(0xa0f01196), rs1=>rd:x27(0xadea5195), rs2:x21(0x00960000), imm:0x2
+ TEST_RI_OP(sm4ks, x27, x21, 0x2, 0xa0f01196, 0xadea5195, 0x00960000, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox32
+ // result rd:x28(0x875f34eb), rs1=>rd:x28(0xd2ffbec1), rs2:x20(0x97000000), imm:0x3
+ TEST_RI_OP(sm4ks, x28, x20, 0x3, 0x875f34eb, 0xd2ffbec1, 0x97000000, x6, 4, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox32
+ // result rd:x29(0x0874fe16), rs1=>rd:x29(0xa8e1a8bb), rs2:x19(0x00000098), imm:0x0
+ TEST_RI_OP(sm4ks, x29, x19, 0x0, 0x0874fe16, 0xa8e1a8bb, 0x00000098, x6, 8, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox32
+ // result rd:x30(0xda800cab), rs1=>rd:x30(0x48c99fcb), rs2:x18(0x00009900), imm:0x1
+ TEST_RI_OP(sm4ks, x30, x18, 0x1, 0xda800cab, 0x48c99fcb, 0x00009900, x6, 12, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox32
+ // result rd:x31(0x5f2f1249), rs1=>rd:x31(0x461d524f), rs2:x17(0x009a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x31, x17, 0x2, 0x5f2f1249, 0x461d524f, 0x009a0000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox32
+ // result rd:x1(0x628a16b7), rs1=>rd:x1(0x528a10af), rs2:x16(0x9b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x1, x16, 0x3, 0x628a16b7, 0x528a10af, 0x9b000000, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox32
+ // result rd:x2(0x41058136), rs1=>rd:x2(0xe19bfbc3), rs2:x15(0x0000009c), imm:0x0
+ TEST_RI_OP(sm4ks, x2, x15, 0x0, 0x41058136, 0xe19bfbc3, 0x0000009c, x6, 4, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox32
+ // result rd:x3(0x613c7e40), rs1=>rd:x3(0x707af2c0), rs2:x14(0x00009d00), imm:0x1
+ TEST_RI_OP(sm4ks, x3, x14, 0x1, 0x613c7e40, 0x707af2c0, 0x00009d00, x6, 8, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox32
+ // result rd:x4(0xfccc30cd), rs1=>rd:x4(0xa47d105b), rs2:x13(0x009e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x4, x13, 0x2, 0xfccc30cd, 0xa47d105b, 0x009e0000, x6, 12, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox32
+ // result rd:x5(0xf17b5052), rs1=>rd:x5(0x121bcc23), rs2:x12(0x9f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x5, x12, 0x3, 0xf17b5052, 0x121bcc23, 0x9f000000, x6, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox32
+ // result rd:x6(0x0d695f88), rs1=>rd:x6(0xadea5195), rs2:x11(0x000000a0), imm:0x0
+ TEST_RI_OP(sm4ks, x6, x11, 0x0, 0x0d695f88, 0xadea5195, 0x000000a0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox32
+ // result rd:x7(0xcc844801), rs1=>rd:x7(0xd2ffbec1), rs2:x10(0x0000a100), imm:0x1
+ TEST_RI_OP(sm4ks, x7, x10, 0x1, 0xcc844801, 0xd2ffbec1, 0x0000a100, x1, 4, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox32
+ // result rd:x8(0xd903e8a7), rs1=>rd:x8(0xa8e1a8bb), rs2:x9(0x00a20000), imm:0x2
+ TEST_RI_OP(sm4ks, x8, x9, 0x2, 0xd903e8a7, 0xa8e1a8bb, 0x00a20000, x1, 8, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox32
+ // result rd:x9(0x66099adc), rs1=>rd:x9(0x48c99fcb), rs2:x8(0xa3000000), imm:0x3
+ TEST_RI_OP(sm4ks, x9, x8, 0x3, 0x66099adc, 0x48c99fcb, 0xa3000000, x1, 12, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox32
+ // result rd:x10(0x060d13cd), rs1=>rd:x10(0x461d524f), rs2:x7(0x000000a4), imm:0x0
+ TEST_RI_OP(sm4ks, x10, x7, 0x0, 0x060d13cd, 0x461d524f, 0x000000a4, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox32
+ // result rd:x11(0x5eb9766f), rs1=>rd:x11(0x528a10af), rs2:x6(0x0000a500), imm:0x1
+ TEST_RI_OP(sm4ks, x11, x6, 0x1, 0x5eb9766f, 0x528a10af, 0x0000a500, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox32
+ // result rd:x12(0x8451bbda), rs1=>rd:x12(0xe19bfbc3), rs2:x5(0x00a60000), imm:0x2
+ TEST_RI_OP(sm4ks, x12, x5, 0x2, 0x8451bbda, 0xe19bfbc3, 0x00a60000, x1, 4, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox32
+ // result rd:x13(0x107afef0), rs1=>rd:x13(0x707af2c0), rs2:x4(0xa7000000), imm:0x3
+ TEST_RI_OP(sm4ks, x13, x4, 0x3, 0x107afef0, 0x707af2c0, 0xa7000000, x1, 8, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox32
+ // result rd:x14(0xa465709b), rs1=>rd:x14(0xa47d105b), rs2:x3(0x000000a8), imm:0x0
+ TEST_RI_OP(sm4ks, x14, x3, 0x0, 0xa465709b, 0xa47d105b, 0x000000a8, x1, 12, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox32
+ // result rd:x15(0x970fe503), rs1=>rd:x15(0x121bcc23), rs2:x2(0x0000a900), imm:0x1
+ TEST_RI_OP(sm4ks, x15, x2, 0x1, 0x970fe503, 0x121bcc23, 0x0000a900, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox32
+ // result rd:x16(0xbcc93111), rs1=>rd:x16(0xadea5195), rs2:x1(0x00aa0000), imm:0x2
+ TEST_RI_OP(sm4ks, x16, x1, 0x2, 0xbcc93111, 0xadea5195, 0x00aa0000, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox32
+ // result rd:x17(0x799f2b94), rs1=>rd:x17(0xd2ffbec1), rs2:x31(0xab000000), imm:0x3
+ TEST_RI_OP(sm4ks, x17, x31, 0x3, 0x799f2b94, 0xd2ffbec1, 0xab000000, x2, 4, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox32
+ // result rd:x18(0x0860aeb6), rs1=>rd:x18(0xa8e1a8bb), rs2:x30(0x000000ac), imm:0x0
+ TEST_RI_OP(sm4ks, x18, x30, 0x0, 0x0860aeb6, 0xa8e1a8bb, 0x000000ac, x2, 8, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox32
+ // result rd:x19(0xc2e0ccab), rs1=>rd:x19(0x48c99fcb), rs2:x29(0x0000ad00), imm:0x1
+ TEST_RI_OP(sm4ks, x19, x29, 0x1, 0xc2e0ccab, 0x48c99fcb, 0x0000ad00, x2, 12, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox32
+ // result rd:x20(0x61539246), rs1=>rd:x20(0x461d524f), rs2:x28(0x00ae0000), imm:0x2
+ TEST_RI_OP(sm4ks, x20, x28, 0x2, 0x61539246, 0x461d524f, 0x00ae0000, x2, 16, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox32
+ // result rd:x21(0x3d6a9d98), rs1=>rd:x21(0x528a10af), rs2:x27(0xaf000000), imm:0x3
+ TEST_RI_OP(sm4ks, x21, x27, 0x3, 0x3d6a9d98, 0x528a10af, 0xaf000000, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox32
+ // result rd:x22(0x41019116), rs1=>rd:x22(0xe19bfbc3), rs2:x26(0x000000b0), imm:0x0
+ TEST_RI_OP(sm4ks, x22, x26, 0x0, 0x41019116, 0xe19bfbc3, 0x000000b0, x1, 4, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox32
+ // result rd:x23(0xeb1729a0), rs1=>rd:x23(0x707af2c0), rs2:x25(0x0000b100), imm:0x1
+ TEST_RI_OP(sm4ks, x23, x25, 0x1, 0xeb1729a0, 0x707af2c0, 0x0000b100, x1, 8, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox32
+ // result rd:x24(0x1b85e086), rs1=>rd:x24(0xa47d105b), rs2:x24(0x00b20000), imm:0x2
+ TEST_RI_OP(sm4ks, x24, x24, 0x2, 0x1b85e086, 0xa47d105b, 0x00b20000, x1, 12, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox32
+ // result rd:x25(0x57bb4401), rs1=>rd:x25(0x121bcc23), rs2:x23(0xb3000000), imm:0x3
+ TEST_RI_OP(sm4ks, x25, x23, 0x3, 0x57bb4401, 0x121bcc23, 0xb3000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox32
+ // result rd:x26(0x6df13e4b), rs1=>rd:x26(0xadea5195), rs2:x22(0x000000b4), imm:0x0
+ TEST_RI_OP(sm4ks, x26, x22, 0x0, 0x6df13e4b, 0xadea5195, 0x000000b4, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox32
+ // result rd:x27(0x4d814361), rs1=>rd:x27(0xd2ffbec1), rs2:x21(0x0000b500), imm:0x1
+ TEST_RI_OP(sm4ks, x27, x21, 0x1, 0x4d814361, 0xd2ffbec1, 0x0000b500, x1, 4, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox32
+ // result rd:x28(0xef6f68aa), rs1=>rd:x28(0xa8e1a8bb), rs2:x20(0x00b60000), imm:0x2
+ TEST_RI_OP(sm4ks, x28, x20, 0x2, 0xef6f68aa, 0xa8e1a8bb, 0x00b60000, x1, 8, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox32
+ // result rd:x29(0x67291adc), rs1=>rd:x29(0x48c99fcb), rs2:x19(0xb7000000), imm:0x3
+ TEST_RI_OP(sm4ks, x29, x19, 0x3, 0x67291adc, 0x48c99fcb, 0xb7000000, x1, 12, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox32
+ // result rd:x30(0x269d534c), rs1=>rd:x30(0x461d524f), rs2:x18(0x000000b8), imm:0x0
+ TEST_RI_OP(sm4ks, x30, x18, 0x0, 0x269d534c, 0x461d524f, 0x000000b8, x1, 16, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox32
+ // result rd:x31(0xcdf5ef4f), rs1=>rd:x31(0x528a10af), rs2:x17(0x0000b900), imm:0x1
+ TEST_RI_OP(sm4ks, x31, x17, 0x1, 0xcdf5ef4f, 0x528a10af, 0x0000b900, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox32
+ // result rd:x1(0xd4f1bbce), rs1=>rd:x1(0xe19bfbc3), rs2:x16(0x00ba0000), imm:0x2
+ TEST_RI_OP(sm4ks, x1, x16, 0x2, 0xd4f1bbce, 0xe19bfbc3, 0x00ba0000, x5, 4, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox32
+ // result rd:x2(0x023afcf9), rs1=>rd:x2(0x707af2c0), rs2:x15(0xbb000000), imm:0x3
+ TEST_RI_OP(sm4ks, x2, x15, 0x3, 0x023afcf9, 0x707af2c0, 0xbb000000, x5, 8, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox32
+ // result rd:x3(0x04f02636), rs1=>rd:x3(0xa47d105b), rs2:x14(0x000000bc), imm:0x0
+ TEST_RI_OP(sm4ks, x3, x14, 0x0, 0x04f02636, 0xa47d105b, 0x000000bc, x5, 12, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox32
+ // result rd:x4(0x1f2da0a3), rs1=>rd:x4(0x121bcc23), rs2:x13(0x0000bd00), imm:0x1
+ TEST_RI_OP(sm4ks, x4, x13, 0x1, 0x1f2da0a3, 0x121bcc23, 0x0000bd00, x5, 16, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox32
+ // result rd:x5(0x80b1311e), rs1=>rd:x5(0xadea5195), rs2:x12(0x00be0000), imm:0x2
+ TEST_RI_OP(sm4ks, x5, x12, 0x2, 0x80b1311e, 0xadea5195, 0x00be0000, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox32
+ // result rd:x6(0x83df34e9), rs1=>rd:x6(0xd2ffbec1), rs2:x11(0xbf000000), imm:0x3
+ TEST_RI_OP(sm4ks, x6, x11, 0x3, 0x83df34e9, 0xd2ffbec1, 0xbf000000, x1, 4, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox32
+ // result rd:x7(0x0870ee36), rs1=>rd:x7(0xa8e1a8bb), rs2:x10(0x000000c0), imm:0x0
+ TEST_RI_OP(sm4ks, x7, x10, 0x0, 0x0870ee36, 0xa8e1a8bb, 0x000000c0, x1, 8, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox32
+ // result rd:x8(0xcbc484ab), rs1=>rd:x8(0x48c99fcb), rs2:x9(0x0000c100), imm:0x1
+ TEST_RI_OP(sm4ks, x8, x9, 0x1, 0xcbc484ab, 0x48c99fcb, 0x0000c100, x1, 12, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox32
+ // result rd:x9(0x11b2b2da), rs1=>rd:x9(0x461d524f), rs2:x8(0x00c20000), imm:0x2
+ TEST_RI_OP(sm4ks, x9, x8, 0x2, 0x11b2b2da, 0x461d524f, 0x00c20000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox32
+ // result rd:x10(0xc0ca02e6), rs1=>rd:x10(0x528a10af), rs2:x7(0xc3000000), imm:0x3
+ TEST_RI_OP(sm4ks, x10, x7, 0x3, 0xc0ca02e6, 0x528a10af, 0xc3000000, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox32
+ // result rd:x11(0x810ca678), rs1=>rd:x11(0xe19bfbc3), rs2:x6(0x000000c4), imm:0x0
+ TEST_RI_OP(sm4ks, x11, x6, 0x0, 0x810ca678, 0xe19bfbc3, 0x000000c4, x1, 4, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox32
+ // result rd:x12(0xeb142f60), rs1=>rd:x12(0x707af2c0), rs2:x5(0x0000c500), imm:0x1
+ TEST_RI_OP(sm4ks, x12, x5, 0x1, 0xeb142f60, 0x707af2c0, 0x0000c500, x1, 8, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox32
+ // result rd:x13(0xfac1904c), rs1=>rd:x13(0xa47d105b), rs2:x4(0x00c60000), imm:0x2
+ TEST_RI_OP(sm4ks, x13, x4, 0x2, 0xfac1904c, 0xa47d105b, 0x00c60000, x1, 12, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox32
+ // result rd:x14(0x6dfb431c), rs1=>rd:x14(0x121bcc23), rs2:x3(0xc7000000), imm:0x3
+ TEST_RI_OP(sm4ks, x14, x3, 0x3, 0x6dfb431c, 0x121bcc23, 0xc7000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox32
+ // result rd:x15(0x8d685984), rs1=>rd:x15(0xadea5195), rs2:x2(0x000000c8), imm:0x0
+ TEST_RI_OP(sm4ks, x15, x2, 0x0, 0x8d685984, 0xadea5195, 0x000000c8, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox32
+ // result rd:x16(0x499367e1), rs1=>rd:x16(0xd2ffbec1), rs2:x1(0x0000c900), imm:0x1
+ TEST_RI_OP(sm4ks, x16, x1, 0x1, 0x499367e1, 0xd2ffbec1, 0x0000c900, x3, 4, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox32
+ // result rd:x17(0x86bd28b0), rs1=>rd:x17(0xa8e1a8bb), rs2:x31(0x00ca0000), imm:0x2
+ TEST_RI_OP(sm4ks, x17, x31, 0x2, 0x86bd28b0, 0xa8e1a8bb, 0x00ca0000, x3, 8, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox32
+ // result rd:x18(0x09e917eb), rs1=>rd:x18(0x48c99fcb), rs2:x30(0xcb000000), imm:0x3
+ TEST_RI_OP(sm4ks, x18, x30, 0x3, 0x09e917eb, 0x48c99fcb, 0xcb000000, x3, 12, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox32
+ // result rd:x19(0xa69e5d50), rs1=>rd:x19(0x461d524f), rs2:x29(0x000000cc), imm:0x0
+ TEST_RI_OP(sm4ks, x19, x29, 0x0, 0xa69e5d50, 0x461d524f, 0x000000cc, x3, 16, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox32
+ // result rd:x20(0x508200af), rs1=>rd:x20(0x528a10af), rs2:x28(0x0000cd00), imm:0x1
+ TEST_RI_OP(sm4ks, x20, x28, 0x1, 0x508200af, 0x528a10af, 0x0000cd00, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox32
+ // result rd:x21(0xccc1bbc8), rs1=>rd:x21(0xe19bfbc3), rs2:x27(0x00ce0000), imm:0x2
+ TEST_RI_OP(sm4ks, x21, x27, 0x2, 0xccc1bbc8, 0xe19bfbc3, 0x00ce0000, x1, 4, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox32
+ // result rd:x22(0xa87ae9ac), rs1=>rd:x22(0x707af2c0), rs2:x26(0xcf000000), imm:0x3
+ TEST_RI_OP(sm4ks, x22, x26, 0x3, 0xa87ae9ac, 0x707af2c0, 0xcf000000, x1, 8, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox32
+ // result rd:x23(0xe47c1551), rs1=>rd:x23(0xa47d105b), rs2:x25(0x000000d0), imm:0x0
+ TEST_RI_OP(sm4ks, x23, x25, 0x0, 0xe47c1551, 0xa47d105b, 0x000000d0, x1, 12, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox32
+ // result rd:x24(0x98601020), rs1=>rd:x24(0x121bcc23), rs2:x24(0x0000d100), imm:0x1
+ TEST_RI_OP(sm4ks, x24, x24, 0x1, 0x98601020, 0x121bcc23, 0x0000d100, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox32
+ // result rd:x25(0xb5db7113), rs1=>rd:x25(0xadea5195), rs2:x23(0x00d20000), imm:0x2
+ TEST_RI_OP(sm4ks, x25, x23, 0x2, 0xb5db7113, 0xadea5195, 0x00d20000, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox32
+ // result rd:x26(0x5affaf85), rs1=>rd:x26(0xd2ffbec1), rs2:x22(0xd3000000), imm:0x3
+ TEST_RI_OP(sm4ks, x26, x22, 0x3, 0x5affaf85, 0xd2ffbec1, 0xd3000000, x1, 4, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox32
+ // result rd:x27(0x0875fa1e), rs1=>rd:x27(0xa8e1a8bb), rs2:x21(0x000000d4), imm:0x0
+ TEST_RI_OP(sm4ks, x27, x21, 0x0, 0x0875fa1e, 0xa8e1a8bb, 0x000000d4, x1, 8, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox32
+ // result rd:x28(0xd1af526b), rs1=>rd:x28(0x48c99fcb), rs2:x20(0x0000d500), imm:0x1
+ TEST_RI_OP(sm4ks, x28, x20, 0x1, 0xd1af526b, 0x48c99fcb, 0x0000d500, x1, 12, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox32
+ // result rd:x29(0x7b6632c0), rs1=>rd:x29(0x461d524f), rs2:x19(0x00d60000), imm:0x2
+ TEST_RI_OP(sm4ks, x29, x19, 0x2, 0x7b6632c0, 0x461d524f, 0x00d60000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox32
+ // result rd:x30(0xef2a87f1), rs1=>rd:x30(0x528a10af), rs2:x18(0xd7000000), imm:0x3
+ TEST_RI_OP(sm4ks, x30, x18, 0x3, 0xef2a87f1, 0x528a10af, 0xd7000000, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox32
+ // result rd:x31(0x411eedee), rs1=>rd:x31(0xe19bfbc3), rs2:x17(0x000000d8), imm:0x0
+ TEST_RI_OP(sm4ks, x31, x17, 0x0, 0x411eedee, 0xe19bfbc3, 0x000000d8, x4, 4, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox32
+ // result rd:x1(0x7e408640), rs1=>rd:x1(0x707af2c0), rs2:x16(0x0000d900), imm:0x1
+ TEST_RI_OP(sm4ks, x1, x16, 0x1, 0x7e408640, 0x707af2c0, 0x0000d900, x4, 8, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox32
+ // result rd:x2(0xccad1041), rs1=>rd:x2(0xa47d105b), rs2:x15(0x00da0000), imm:0x2
+ TEST_RI_OP(sm4ks, x2, x15, 0x2, 0xccad1041, 0xa47d105b, 0x00da0000, x4, 12, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox32
+ // result rd:x3(0x005bce2a), rs1=>rd:x3(0x121bcc23), rs2:x14(0xdb000000), imm:0x3
+ TEST_RI_OP(sm4ks, x3, x14, 0x3, 0x005bce2a, 0x121bcc23, 0xdb000000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox32
+ // result rd:x4(0xadfd0d2d), rs1=>rd:x4(0xadea5195), rs2:x13(0x000000dc), imm:0x0
+ TEST_RI_OP(sm4ks, x4, x13, 0x0, 0xadfd0d2d, 0xadea5195, 0x000000dc, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox32
+ // result rd:x5(0x4e8d5b61), rs1=>rd:x5(0xd2ffbec1), rs2:x12(0x0000dd00), imm:0x1
+ TEST_RI_OP(sm4ks, x5, x12, 0x1, 0x4e8d5b61, 0xd2ffbec1, 0x0000dd00, x1, 4, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox32
+ // result rd:x6(0xf25528ad), rs1=>rd:x6(0xa8e1a8bb), rs2:x11(0x00de0000), imm:0x2
+ TEST_RI_OP(sm4ks, x6, x11, 0x2, 0xf25528ad, 0xa8e1a8bb, 0x00de0000, x1, 8, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox32
+ // result rd:x7(0xf8c98993), rs1=>rd:x7(0x48c99fcb), rs2:x10(0xdf000000), imm:0x3
+ TEST_RI_OP(sm4ks, x7, x10, 0x3, 0xf8c98993, 0x48c99fcb, 0xdf000000, x1, 12, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox32
+ // result rd:x8(0x668c16c6), rs1=>rd:x8(0x461d524f), rs2:x9(0x000000e0), imm:0x0
+ TEST_RI_OP(sm4ks, x8, x9, 0x0, 0x668c16c6, 0x461d524f, 0x000000e0, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox32
+ // result rd:x9(0xdfbe798f), rs1=>rd:x9(0x528a10af), rs2:x8(0x0000e100), imm:0x1
+ TEST_RI_OP(sm4ks, x9, x8, 0x1, 0xdfbe798f, 0x528a10af, 0x0000e100, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox32
+ // result rd:x10(0xaa0c1b51), rs1=>rd:x10(0xe19bfbc3), rs2:x7(0x00e20000), imm:0x2
+ TEST_RI_OP(sm4ks, x10, x7, 0x2, 0xaa0c1b51, 0xe19bfbc3, 0x00e20000, x1, 4, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox32
+ // result rd:x11(0x3a3afbe5), rs1=>rd:x11(0x707af2c0), rs2:x6(0xe3000000), imm:0x3
+ TEST_RI_OP(sm4ks, x11, x6, 0x3, 0x3a3afbe5, 0x707af2c0, 0xe3000000, x1, 8, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox32
+ // result rd:x12(0x247c1657), rs1=>rd:x12(0xa47d105b), rs2:x5(0x000000e4), imm:0x0
+ TEST_RI_OP(sm4ks, x12, x5, 0x0, 0x247c1657, 0xa47d105b, 0x000000e4, x1, 12, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox32
+ // result rd:x13(0x00505ae3), rs1=>rd:x13(0x121bcc23), rs2:x4(0x0000e500), imm:0x1
+ TEST_RI_OP(sm4ks, x13, x4, 0x1, 0x00505ae3, 0x121bcc23, 0x0000e500, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox32
+ // result rd:x14(0x969db11b), rs1=>rd:x14(0xadea5195), rs2:x3(0x00e60000), imm:0x2
+ TEST_RI_OP(sm4ks, x14, x3, 0x2, 0x969db11b, 0xadea5195, 0x00e60000, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox32
+ // result rd:x15(0xac3fb1fe), rs1=>rd:x15(0xd2ffbec1), rs2:x2(0xe7000000), imm:0x3
+ TEST_RI_OP(sm4ks, x15, x2, 0x3, 0xac3fb1fe, 0xd2ffbec1, 0xe7000000, x4, 4, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox32
+ // result rd:x16(0x086d9ade), rs1=>rd:x16(0xa8e1a8bb), rs2:x1(0x000000e8), imm:0x0
+ TEST_RI_OP(sm4ks, x16, x1, 0x0, 0x086d9ade, 0xa8e1a8bb, 0x000000e8, x4, 8, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox32
+ // result rd:x17(0xdf9526eb), rs1=>rd:x17(0x48c99fcb), rs2:x31(0x0000e900), imm:0x1
+ TEST_RI_OP(sm4ks, x17, x31, 0x1, 0xdf9526eb, 0x48c99fcb, 0x0000e900, x4, 12, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox32
+ // result rd:x18(0x3eec72d1), rs1=>rd:x18(0x461d524f), rs2:x30(0x00ea0000), imm:0x2
+ TEST_RI_OP(sm4ks, x18, x30, 0x2, 0x3eec72d1, 0x461d524f, 0x00ea0000, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox32
+ // result rd:x19(0x5baa91ab), rs1=>rd:x19(0x528a10af), rs2:x29(0xeb000000), imm:0x3
+ TEST_RI_OP(sm4ks, x19, x29, 0x3, 0x5baa91ab, 0x528a10af, 0xeb000000, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox32
+ // result rd:x20(0x41039906), rs1=>rd:x20(0xe19bfbc3), rs2:x28(0x000000ec), imm:0x0
+ TEST_RI_OP(sm4ks, x20, x28, 0x0, 0x41039906, 0xe19bfbc3, 0x000000ec, x1, 4, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox32
+ // result rd:x21(0x7d4d9c00), rs1=>rd:x21(0x707af2c0), rs2:x27(0x0000ed00), imm:0x1
+ TEST_RI_OP(sm4ks, x21, x27, 0x1, 0x7d4d9c00, 0x707af2c0, 0x0000ed00, x1, 8, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox32
+ // result rd:x22(0xc7bbd043), rs1=>rd:x22(0xa47d105b), rs2:x26(0x00ee0000), imm:0x2
+ TEST_RI_OP(sm4ks, x22, x26, 0x2, 0xc7bbd043, 0xa47d105b, 0x00ee0000, x1, 12, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox32
+ // result rd:x23(0x969bdc61), rs1=>rd:x23(0x121bcc23), rs2:x25(0xef000000), imm:0x3
+ TEST_RI_OP(sm4ks, x23, x25, 0x3, 0x969bdc61, 0x121bcc23, 0xef000000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox32
+ // result rd:x24(0x00030ce8), rs1=>rd:x24(0xadea5195), rs2:x24(0x000000f0), imm:0x0
+ TEST_RI_OP(sm4ks, x24, x24, 0x0, 0x00030ce8, 0xadea5195, 0x000000f0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox32
+ // result rd:x25(0xcc874ec1), rs1=>rd:x25(0xd2ffbec1), rs2:x23(0x0000f100), imm:0x1
+ TEST_RI_OP(sm4ks, x25, x23, 0x1, 0xcc874ec1, 0xd2ffbec1, 0x0000f100, x1, 4, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox32
+ // result rd:x26(0x969c0834), rs1=>rd:x26(0xa8e1a8bb), rs2:x22(0x00f20000), imm:0x2
+ TEST_RI_OP(sm4ks, x26, x22, 0x2, 0x969c0834, 0xa8e1a8bb, 0x00f20000, x1, 8, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox32
+ // result rd:x27(0xa44982bd), rs1=>rd:x27(0x48c99fcb), rs2:x21(0xf3000000), imm:0x3
+ TEST_RI_OP(sm4ks, x27, x21, 0x3, 0xa44982bd, 0x48c99fcb, 0xf3000000, x1, 12, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox32
+ // result rd:x28(0x061a4f75), rs1=>rd:x28(0x461d524f), rs2:x20(0x000000f4), imm:0x0
+ TEST_RI_OP(sm4ks, x28, x20, 0x0, 0x061a4f75, 0x461d524f, 0x000000f4, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox32
+ // result rd:x29(0x49e4cc2f), rs1=>rd:x29(0x528a10af), rs2:x19(0x0000f500), imm:0x1
+ TEST_RI_OP(sm4ks, x29, x19, 0x1, 0x49e4cc2f, 0x528a10af, 0x0000f500, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox32
+ // result rd:x30(0xc7d65b4a), rs1=>rd:x30(0xe19bfbc3), rs2:x18(0x00f60000), imm:0x2
+ TEST_RI_OP(sm4ks, x30, x18, 0x2, 0xc7d65b4a, 0xe19bfbc3, 0x00f60000, x4, 4, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox32
+ // result rd:x31(0x507af6d0), rs1=>rd:x31(0x707af2c0), rs2:x17(0xf7000000), imm:0x3
+ TEST_RI_OP(sm4ks, x31, x17, 0x3, 0x507af6d0, 0x707af2c0, 0xf7000000, x4, 8, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox32
+ // result rd:x1(0x84f22c22), rs1=>rd:x1(0xa47d105b), rs2:x16(0x000000f8), imm:0x0
+ TEST_RI_OP(sm4ks, x1, x16, 0x0, 0x84f22c22, 0xa47d105b, 0x000000f8, x4, 12, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox32
+ // result rd:x2(0x0f6c22e3), rs1=>rd:x2(0x121bcc23), rs2:x15(0x0000f900), imm:0x1
+ TEST_RI_OP(sm4ks, x2, x15, 0x1, 0x0f6c22e3, 0x121bcc23, 0x0000f900, x4, 16, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox32
+ // result rd:x3(0x82b5b11e), rs1=>rd:x3(0xadea5195), rs2:x14(0x00fa0000), imm:0x2
+ TEST_RI_OP(sm4ks, x3, x14, 0x2, 0x82b5b11e, 0xadea5195, 0x00fa0000, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox32
+ // result rd:x4(0xec3fb9de), rs1=>rd:x4(0xd2ffbec1), rs2:x13(0xfb000000), imm:0x3
+ TEST_RI_OP(sm4ks, x4, x13, 0x3, 0xec3fb9de, 0xd2ffbec1, 0xfb000000, x1, 4, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox32
+ // result rd:x5(0x487bc36c), rs1=>rd:x5(0xa8e1a8bb), rs2:x12(0x000000fc), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0x487bc36c, 0xa8e1a8bb, 0x000000fc, x1, 8, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox32
+ // result rd:x6(0xd1ac54ab), rs1=>rd:x6(0x48c99fcb), rs2:x11(0x0000fd00), imm:0x1
+ TEST_RI_OP(sm4ks, x6, x11, 0x1, 0xd1ac54ab, 0x48c99fcb, 0x0000fd00, x1, 12, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox32
+ // result rd:x7(0x5a2472c8), rs1=>rd:x7(0x461d524f), rs2:x10(0x00fe0000), imm:0x2
+ TEST_RI_OP(sm4ks, x7, x10, 0x2, 0x5a2472c8, 0x461d524f, 0x00fe0000, x1, 16, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox32
+ // result rd:x8(0x1a8a198b), rs1=>rd:x8(0x528a10af), rs2:x9(0xff000000), imm:0x3
+ TEST_RI_OP(sm4ks, x8, x9, 0x3, 0x1a8a198b, 0x528a10af, 0xff000000, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+signature_31_0:
+ .fill 5, 4, 0xdeadbeef
+signature_32_0:
+ .fill 5, 4, 0xdeadbeef
+signature_33_0:
+ .fill 5, 4, 0xdeadbeef
+signature_34_0:
+ .fill 5, 4, 0xdeadbeef
+signature_35_0:
+ .fill 5, 4, 0xdeadbeef
+signature_36_0:
+ .fill 5, 4, 0xdeadbeef
+signature_37_0:
+ .fill 5, 4, 0xdeadbeef
+signature_38_0:
+ .fill 5, 4, 0xdeadbeef
+signature_39_0:
+ .fill 5, 4, 0xdeadbeef
+signature_40_0:
+ .fill 5, 4, 0xdeadbeef
+signature_41_0:
+ .fill 5, 4, 0xdeadbeef
+signature_42_0:
+ .fill 5, 4, 0xdeadbeef
+signature_43_0:
+ .fill 5, 4, 0xdeadbeef
+signature_44_0:
+ .fill 5, 4, 0xdeadbeef
+signature_45_0:
+ .fill 5, 4, 0xdeadbeef
+signature_46_0:
+ .fill 5, 4, 0xdeadbeef
+signature_47_0:
+ .fill 5, 4, 0xdeadbeef
+signature_48_0:
+ .fill 5, 4, 0xdeadbeef
+signature_49_0:
+ .fill 5, 4, 0xdeadbeef
+signature_50_0:
+ .fill 5, 4, 0xdeadbeef
+signature_51_0:
+ .fill 5, 4, 0xdeadbeef
+signature_52_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/UNZIP-01.S b/riscof/suite/rv32i_m/K_unratified/UNZIP-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..4584db9d93338f8188fdef4a66c35aacf2d9dcd1
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/UNZIP-01.S
@@ -0,0 +1,1492 @@
+// RISC-V Architectural Validation Test UNZIP-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'unzip'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",unzip)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",unzip)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",unzip)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xef0838d7), rs1:x31(0xadea5195)
+ li x31, 0xadea5195
+ unzip x1, x31
+ sw x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0xef0838d7)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x9ff8cf69), rs1:x30(0xd2ffbec1)
+ li x30, 0xd2ffbec1
+ unzip x2, x30
+ sw x2, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x9ff8cf69)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xecef0905), rs1:x29(0xa8e1a8bb)
+ li x29, 0xa8e1a8bb
+ unzip x3, x29
+ sw x3, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xecef0905)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x2abb8979), rs1:x28(0x48c99fcb)
+ li x28, 0x48c99fcb
+ unzip x4, x28
+ sw x4, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x2abb8979)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x1213a7cb), rs1:x27(0x461d524f)
+ li x27, 0x461d524f
+ unzip x5, x27
+ sw x5, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x1213a7cb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x1b0fc043), rs1:x26(0x528a10af)
+ li x26, 0x528a10af
+ unzip x6, x26
+ sw x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x1b0fc043)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xcbf995d9), rs1:x25(0xe19bfbc3)
+ li x25, 0xe19bfbc3
+ unzip x7, x25
+ sw x7, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xcbf995d9)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x47d8ccc8), rs1:x24(0x707af2c0)
+ li x24, 0x707af2c0
+ unzip x8, x24
+ sw x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x47d8ccc8)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xc6032f4d), rs1:x23(0xa47d105b)
+ li x23, 0xa47d105b
+ unzip x9, x23
+ sw x9, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xc6032f4d)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x13a545a1), rs1:x22(0x121bcc23)
+ li x22, 0x121bcc23
+ unzip x10, x22
+ sw x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x13a545a1)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00000001), rs1:x21(0x00000001)
+ li x21, 0x1
+ unzip x11, x21
+ sw x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x00000001)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00010000), rs1:x20(0x00000002)
+ li x20, 0x2
+ unzip x12, x20
+ sw x12, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x00010000)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00000002), rs1:x19(0x00000004)
+ li x19, 0x4
+ unzip x13, x19
+ sw x13, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x00000002)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00020000), rs1:x18(0x00000008)
+ li x18, 0x8
+ unzip x14, x18
+ sw x14, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x00020000)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00000004), rs1:x17(0x00000010)
+ li x17, 0x10
+ unzip x15, x17
+ sw x15, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x00000004)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x00040000), rs1:x16(0x00000020)
+ li x16, 0x20
+ unzip x16, x16
+ sw x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x00040000)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x00000008), rs1:x15(0x00000040)
+ li x15, 0x40
+ unzip x17, x15
+ sw x17, 4(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x00000008)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00080000), rs1:x14(0x00000080)
+ li x14, 0x80
+ unzip x18, x14
+ sw x18, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x00080000)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00000010), rs1:x13(0x00000100)
+ li x13, 0x100
+ unzip x19, x13
+ sw x19, 12(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x00000010)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00100000), rs1:x12(0x00000200)
+ li x12, 0x200
+ unzip x20, x12
+ sw x20, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x00100000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00000020), rs1:x11(0x00000400)
+ li x11, 0x400
+ unzip x21, x11
+ sw x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000020)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00200000), rs1:x10(0x00000800)
+ li x10, 0x800
+ unzip x22, x10
+ sw x22, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00200000)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00000040), rs1:x9(0x00001000)
+ li x9, 0x1000
+ unzip x23, x9
+ sw x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000040)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00400000), rs1:x8(0x00002000)
+ li x8, 0x2000
+ unzip x24, x8
+ sw x24, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00400000)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00000080), rs1:x7(0x00004000)
+ li x7, 0x4000
+ unzip x25, x7
+ sw x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000080)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00800000), rs1:x6(0x00008000)
+ li x6, 0x8000
+ unzip x26, x6
+ sw x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x00800000)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00000100), rs1:x5(0x00010000)
+ li x5, 0x10000
+ unzip x27, x5
+ sw x27, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x00000100)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x01000000), rs1:x4(0x00020000)
+ li x4, 0x20000
+ unzip x28, x4
+ sw x28, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x01000000)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00000200), rs1:x3(0x00040000)
+ li x3, 0x40000
+ unzip x29, x3
+ sw x29, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x00000200)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x02000000), rs1:x2(0x00080000)
+ li x2, 0x80000
+ unzip x30, x2
+ sw x30, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x02000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00000400), rs1:x1(0x00100000)
+ li x1, 0x100000
+ unzip x31, x1
+ sw x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x00000400)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x04000000), rs1:x31(0x00200000)
+ li x31, 0x200000
+ unzip x1, x31
+ sw x1, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x04000000)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00000800), rs1:x30(0x00400000)
+ li x30, 0x400000
+ unzip x2, x30
+ sw x2, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x00000800)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x08000000), rs1:x29(0x00800000)
+ li x29, 0x800000
+ unzip x3, x29
+ sw x3, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x08000000)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x00001000), rs1:x28(0x01000000)
+ li x28, 0x1000000
+ unzip x4, x28
+ sw x4, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x00001000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x10000000), rs1:x27(0x02000000)
+ li x27, 0x2000000
+ unzip x5, x27
+ sw x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x10000000)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x00002000), rs1:x26(0x04000000)
+ li x26, 0x4000000
+ unzip x6, x26
+ sw x6, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00002000)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x20000000), rs1:x25(0x08000000)
+ li x25, 0x8000000
+ unzip x7, x25
+ sw x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x20000000)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x00004000), rs1:x24(0x10000000)
+ li x24, 0x10000000
+ unzip x8, x24
+ sw x8, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00004000)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x40000000), rs1:x23(0x20000000)
+ li x23, 0x20000000
+ unzip x9, x23
+ sw x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x40000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x00008000), rs1:x22(0x40000000)
+ li x22, 0x40000000
+ unzip x10, x22
+ sw x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00008000)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x80000000), rs1:x21(0x80000000)
+ li x21, 0x80000000
+ unzip x11, x21
+ sw x11, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x80000000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000)
+ li x20, 0x0
+ unzip x12, x20
+ sw x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xfffffffe), rs1:x19(0xfffffffe)
+ li x19, 0xfffffffe
+ unzip x13, x19
+ sw x13, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xfffffffe)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xfffeffff), rs1:x18(0xfffffffd)
+ li x18, 0xfffffffd
+ unzip x14, x18
+ sw x14, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0xfffeffff)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xfffffffd), rs1:x17(0xfffffffb)
+ li x17, 0xfffffffb
+ unzip x15, x17
+ sw x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0xfffffffd)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xfffdffff), rs1:x16(0xfffffff7)
+ li x16, 0xfffffff7
+ unzip x16, x16
+ sw x16, 4(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0xfffdffff)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xfffffffb), rs1:x15(0xffffffef)
+ li x15, 0xffffffef
+ unzip x17, x15
+ sw x17, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0xfffffffb)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xfffbffff), rs1:x14(0xffffffdf)
+ li x14, 0xffffffdf
+ unzip x18, x14
+ sw x18, 12(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0xfffbffff)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xfffffff7), rs1:x13(0xffffffbf)
+ li x13, 0xffffffbf
+ unzip x19, x13
+ sw x19, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0xfffffff7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xfff7ffff), rs1:x12(0xffffff7f)
+ li x12, 0xffffff7f
+ unzip x20, x12
+ sw x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfff7ffff)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xffffffef), rs1:x11(0xfffffeff)
+ li x11, 0xfffffeff
+ unzip x21, x11
+ sw x21, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xffffffef)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xffefffff), rs1:x10(0xfffffdff)
+ li x10, 0xfffffdff
+ unzip x22, x10
+ sw x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffefffff)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xffffffdf), rs1:x9(0xfffffbff)
+ li x9, 0xfffffbff
+ unzip x23, x9
+ sw x23, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffffffdf)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xffdfffff), rs1:x8(0xfffff7ff)
+ li x8, 0xfffff7ff
+ unzip x24, x8
+ sw x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xffdfffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xffffffbf), rs1:x7(0xffffefff)
+ li x7, 0xffffefff
+ unzip x25, x7
+ sw x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xffffffbf)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xffbfffff), rs1:x6(0xffffdfff)
+ li x6, 0xffffdfff
+ unzip x26, x6
+ sw x26, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffbfffff)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xffffff7f), rs1:x5(0xffffbfff)
+ li x5, 0xffffbfff
+ unzip x27, x5
+ sw x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffffff7f)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xff7fffff), rs1:x4(0xffff7fff)
+ li x4, 0xffff7fff
+ unzip x28, x4
+ sw x28, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xff7fffff)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xfffffeff), rs1:x3(0xfffeffff)
+ li x3, 0xfffeffff
+ unzip x29, x3
+ sw x29, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xfffffeff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xfeffffff), rs1:x2(0xfffdffff)
+ li x2, 0xfffdffff
+ unzip x30, x2
+ sw x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfeffffff)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xfffffdff), rs1:x1(0xfffbffff)
+ li x1, 0xfffbffff
+ unzip x31, x1
+ sw x31, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xfffffdff)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xfdffffff), rs1:x31(0xfff7ffff)
+ li x31, 0xfff7ffff
+ unzip x1, x31
+ sw x1, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xfdffffff)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xfffffbff), rs1:x30(0xffefffff)
+ li x30, 0xffefffff
+ unzip x2, x30
+ sw x2, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xfffffbff)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xfbffffff), rs1:x29(0xffdfffff)
+ li x29, 0xffdfffff
+ unzip x3, x29
+ sw x3, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xfbffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xfffff7ff), rs1:x28(0xffbfffff)
+ li x28, 0xffbfffff
+ unzip x4, x28
+ sw x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xfffff7ff)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xf7ffffff), rs1:x27(0xff7fffff)
+ li x27, 0xff7fffff
+ unzip x5, x27
+ sw x5, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xf7ffffff)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xffffefff), rs1:x26(0xfeffffff)
+ li x26, 0xfeffffff
+ unzip x6, x26
+ sw x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xffffefff)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xefffffff), rs1:x25(0xfdffffff)
+ li x25, 0xfdffffff
+ unzip x7, x25
+ sw x7, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xefffffff)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xffffdfff), rs1:x24(0xfbffffff)
+ li x24, 0xfbffffff
+ unzip x8, x24
+ sw x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffffdfff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xdfffffff), rs1:x23(0xf7ffffff)
+ li x23, 0xf7ffffff
+ unzip x9, x23
+ sw x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xdfffffff)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xffffbfff), rs1:x22(0xefffffff)
+ li x22, 0xefffffff
+ unzip x10, x22
+ sw x10, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffbfff)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xbfffffff), rs1:x21(0xdfffffff)
+ li x21, 0xdfffffff
+ unzip x11, x21
+ sw x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xbfffffff)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xffff7fff), rs1:x20(0xbfffffff)
+ li x20, 0xbfffffff
+ unzip x12, x20
+ sw x12, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xffff7fff)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x7fffffff), rs1:x19(0x7fffffff)
+ li x19, 0x7fffffff
+ unzip x13, x19
+ sw x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x7fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff)
+ li x18, 0xffffffff
+ unzip x14, x18
+ sw x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xffffffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000001), rs1:x17(0x00000001)
+ li x17, 0x1
+ unzip x15, x17
+ sw x15, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00000001)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00010000), rs1:x16(0x00000002)
+ li x16, 0x2
+ unzip x16, x16
+ sw x16, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00010000)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000002), rs1:x15(0x00000004)
+ li x15, 0x4
+ unzip x17, x15
+ sw x17, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00000002)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00020000), rs1:x14(0x00000008)
+ li x14, 0x8
+ unzip x18, x14
+ sw x18, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00020000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000004), rs1:x13(0x00000010)
+ li x13, 0x10
+ unzip x19, x13
+ sw x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000004)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00040000), rs1:x12(0x00000020)
+ li x12, 0x20
+ unzip x20, x12
+ sw x20, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00040000)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000008), rs1:x11(0x00000040)
+ li x11, 0x40
+ unzip x21, x11
+ sw x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000008)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00080000), rs1:x10(0x00000080)
+ li x10, 0x80
+ unzip x22, x10
+ sw x22, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00080000)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000010), rs1:x9(0x00000100)
+ li x9, 0x100
+ unzip x23, x9
+ sw x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000010)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00100000), rs1:x8(0x00000200)
+ li x8, 0x200
+ unzip x24, x8
+ sw x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00100000)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000020), rs1:x7(0x00000400)
+ li x7, 0x400
+ unzip x25, x7
+ sw x25, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000020)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00200000), rs1:x6(0x00000800)
+ li x6, 0x800
+ unzip x26, x6
+ sw x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00200000)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000040), rs1:x5(0x00001000)
+ li x5, 0x1000
+ unzip x27, x5
+ sw x27, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000040)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00400000), rs1:x4(0x00002000)
+ li x4, 0x2000
+ unzip x28, x4
+ sw x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00400000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000080), rs1:x3(0x00004000)
+ li x3, 0x4000
+ unzip x29, x3
+ sw x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00000080)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00800000), rs1:x2(0x00008000)
+ li x2, 0x8000
+ unzip x30, x2
+ sw x30, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00800000)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000100), rs1:x1(0x00010000)
+ li x1, 0x10000
+ unzip x31, x1
+ sw x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000100)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x01000000), rs1:x31(0x00020000)
+ li x31, 0x20000
+ unzip x1, x31
+ sw x1, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x01000000)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000200), rs1:x30(0x00040000)
+ li x30, 0x40000
+ unzip x2, x30
+ sw x2, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000200)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x02000000), rs1:x29(0x00080000)
+ li x29, 0x80000
+ unzip x3, x29
+ sw x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x02000000)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000400), rs1:x28(0x00100000)
+ li x28, 0x100000
+ unzip x4, x28
+ sw x4, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000400)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x04000000), rs1:x27(0x00200000)
+ li x27, 0x200000
+ unzip x5, x27
+ sw x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x04000000)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000800), rs1:x26(0x00400000)
+ li x26, 0x400000
+ unzip x6, x26
+ sw x6, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000800)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x08000000), rs1:x25(0x00800000)
+ li x25, 0x800000
+ unzip x7, x25
+ sw x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x08000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00001000), rs1:x24(0x01000000)
+ li x24, 0x1000000
+ unzip x8, x24
+ sw x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00001000)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x10000000), rs1:x23(0x02000000)
+ li x23, 0x2000000
+ unzip x9, x23
+ sw x9, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x10000000)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00002000), rs1:x22(0x04000000)
+ li x22, 0x4000000
+ unzip x10, x22
+ sw x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00002000)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x20000000), rs1:x21(0x08000000)
+ li x21, 0x8000000
+ unzip x11, x21
+ sw x11, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x20000000)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00004000), rs1:x20(0x10000000)
+ li x20, 0x10000000
+ unzip x12, x20
+ sw x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00004000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x40000000), rs1:x19(0x20000000)
+ li x19, 0x20000000
+ unzip x13, x19
+ sw x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x40000000)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00008000), rs1:x18(0x40000000)
+ li x18, 0x40000000
+ unzip x14, x18
+ sw x14, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x00008000)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x80000000), rs1:x17(0x80000000)
+ li x17, 0x80000000
+ unzip x15, x17
+ sw x15, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x80000000)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000)
+ li x16, 0x0
+ unzip x16, x16
+ sw x16, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfffffffe), rs1:x15(0xfffffffe)
+ li x15, 0xfffffffe
+ unzip x17, x15
+ sw x17, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xfffffffe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfffeffff), rs1:x14(0xfffffffd)
+ li x14, 0xfffffffd
+ unzip x18, x14
+ sw x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xfffeffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfffffffd), rs1:x13(0xfffffffb)
+ li x13, 0xfffffffb
+ unzip x19, x13
+ sw x19, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xfffffffd)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xfffdffff), rs1:x12(0xfffffff7)
+ li x12, 0xfffffff7
+ unzip x20, x12
+ sw x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfffdffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xfffffffb), rs1:x11(0xffffffef)
+ li x11, 0xffffffef
+ unzip x21, x11
+ sw x21, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfffffffb)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xfffbffff), rs1:x10(0xffffffdf)
+ li x10, 0xffffffdf
+ unzip x22, x10
+ sw x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfffbffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xfffffff7), rs1:x9(0xffffffbf)
+ li x9, 0xffffffbf
+ unzip x23, x9
+ sw x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfffffff7)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xfff7ffff), rs1:x8(0xffffff7f)
+ li x8, 0xffffff7f
+ unzip x24, x8
+ sw x24, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfff7ffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffef), rs1:x7(0xfffffeff)
+ li x7, 0xfffffeff
+ unzip x25, x7
+ sw x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xffffffef)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffefffff), rs1:x6(0xfffffdff)
+ li x6, 0xfffffdff
+ unzip x26, x6
+ sw x26, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffefffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffffdf), rs1:x5(0xfffffbff)
+ li x5, 0xfffffbff
+ unzip x27, x5
+ sw x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffffffdf)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffdfffff), rs1:x4(0xfffff7ff)
+ li x4, 0xfffff7ff
+ unzip x28, x4
+ sw x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0xffdfffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffffbf), rs1:x3(0xffffefff)
+ li x3, 0xffffefff
+ unzip x29, x3
+ sw x29, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0xffffffbf)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffbfffff), rs1:x2(0xffffdfff)
+ li x2, 0xffffdfff
+ unzip x30, x2
+ sw x30, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0xffbfffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffff7f), rs1:x1(0xffffbfff)
+ li x1, 0xffffbfff
+ unzip x31, x1
+ sw x31, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xffffff7f)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xff7fffff), rs1:x31(0xffff7fff)
+ li x31, 0xffff7fff
+ unzip x1, x31
+ sw x1, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xff7fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffffeff), rs1:x30(0xfffeffff)
+ li x30, 0xfffeffff
+ unzip x2, x30
+ sw x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xfffffeff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfeffffff), rs1:x29(0xfffdffff)
+ li x29, 0xfffdffff
+ unzip x3, x29
+ sw x3, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xfeffffff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfffffdff), rs1:x28(0xfffbffff)
+ li x28, 0xfffbffff
+ unzip x4, x28
+ sw x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xfffffdff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfdffffff), rs1:x27(0xfff7ffff)
+ li x27, 0xfff7ffff
+ unzip x5, x27
+ sw x5, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xfdffffff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xfffffbff), rs1:x26(0xffefffff)
+ li x26, 0xffefffff
+ unzip x6, x26
+ sw x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0xfffffbff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xfbffffff), rs1:x25(0xffdfffff)
+ li x25, 0xffdfffff
+ unzip x7, x25
+ sw x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfbffffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xfffff7ff), rs1:x24(0xffbfffff)
+ li x24, 0xffbfffff
+ unzip x8, x24
+ sw x8, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffff7ff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xf7ffffff), rs1:x23(0xff7fffff)
+ li x23, 0xff7fffff
+ unzip x9, x23
+ sw x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xf7ffffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffffefff), rs1:x22(0xfeffffff)
+ li x22, 0xfeffffff
+ unzip x10, x22
+ sw x10, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffefff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xefffffff), rs1:x21(0xfdffffff)
+ li x21, 0xfdffffff
+ unzip x11, x21
+ sw x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xefffffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffdfff), rs1:x20(0xfbffffff)
+ li x20, 0xfbffffff
+ unzip x12, x20
+ sw x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xffffdfff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xdfffffff), rs1:x19(0xf7ffffff)
+ li x19, 0xf7ffffff
+ unzip x13, x19
+ sw x13, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xdfffffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffbfff), rs1:x18(0xefffffff)
+ li x18, 0xefffffff
+ unzip x14, x18
+ sw x14, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xffffbfff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xbfffffff), rs1:x17(0xdfffffff)
+ li x17, 0xdfffffff
+ unzip x15, x17
+ sw x15, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xbfffffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffff7fff), rs1:x16(0xbfffffff)
+ li x16, 0xbfffffff
+ unzip x16, x16
+ sw x16, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xffff7fff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x7fffffff), rs1:x15(0x7fffffff)
+ li x15, 0x7fffffff
+ unzip x17, x15
+ sw x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x7fffffff)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff)
+ li x14, 0xffffffff
+ unzip x18, x14
+ sw x18, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xffffffff)
+
+ inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0xef0838d7), rs1:x13(0xadea5195)
+ li x13, 0xadea5195
+ unzip x19, x13
+ sw x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xef0838d7)
+
+ inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1)
+ li x12, 0xd2ffbec1
+ unzip x0, x12
+ sw x0, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
+
+ inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xecef0905), rs1:x11(0xa8e1a8bb)
+ li x11, 0xa8e1a8bb
+ unzip x21, x11
+ sw x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xecef0905)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb)
+ li x0, 0x48c99fcb
+ unzip x22, x0
+ sw x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/XNOR-01.S b/riscof/suite/rv32i_m/K_unratified/XNOR-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..18dfe5fa783ddc0f601af3eb850213b257835d8f
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/XNOR-01.S
@@ -0,0 +1,1024 @@
+// RISC-V Architectural Validation Test XNOR-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'xnor'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",xnor)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",xnor)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",xnor)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x400e6249), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(xnor, x1, x31, x16, 0x400e6249, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x897d5165), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(xnor, x2, x30, x15, 0x897d5165, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x2764a584), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(xnor, x3, x29, x14, 0x2764a584, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x56ad9bf7), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(xnor, x4, x28, x13, 0x56ad9bf7, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xeb68bd1f), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(xnor, x5, x27, x12, 0xeb68bd1f, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xeb68bd1f), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(xnor, x6, x26, x11, 0xeb68bd1f, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x56ad9bf7), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(xnor, x7, x25, x10, 0x56ad9bf7, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x2764a584), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(xnor, x8, x24, x9, 0x2764a584, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x897d5165), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(xnor, x9, x23, x8, 0x897d5165, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x400e6249), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(xnor, x10, x22, x7, 0x400e6249, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00000001), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(xnor, x11, x21, x6, 0x00000001, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x80000002), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(xnor, x12, x20, x5, 0x80000002, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x40000004), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(xnor, x13, x19, x4, 0x40000004, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x20000008), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(xnor, x14, x18, x3, 0x20000008, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x10000010), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(xnor, x15, x17, x2, 0x10000010, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x08000020), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(xnor, x16, x16, x1, 0x08000020, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x04000040), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(xnor, x17, x15, x31, 0x04000040, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x02000080), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(xnor, x18, x14, x30, 0x02000080, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x01000100), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(xnor, x19, x13, x29, 0x01000100, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00800200), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(xnor, x20, x12, x28, 0x00800200, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00400400), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(xnor, x21, x11, x27, 0x00400400, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00200800), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(xnor, x22, x10, x26, 0x00200800, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00101000), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(xnor, x23, x9, x25, 0x00101000, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00082000), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(xnor, x24, x8, x24, 0x00082000, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00044000), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(xnor, x25, x7, x23, 0x00044000, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00028000), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(xnor, x26, x6, x22, 0x00028000, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00000000), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(xnor, x27, x5, x21, 0x00000000, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00028000), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(xnor, x28, x4, x20, 0x00028000, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00044000), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(xnor, x29, x3, x19, 0x00044000, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00082000), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(xnor, x30, x2, x18, 0x00082000, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00101000), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(xnor, x31, x1, x17, 0x00101000, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00200800), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(xnor, x1, x31, x16, 0x00200800, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00400400), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(xnor, x2, x30, x15, 0x00400400, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00800200), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(xnor, x3, x29, x14, 0x00800200, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x01000100), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(xnor, x4, x28, x13, 0x01000100, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x02000080), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(xnor, x5, x27, x12, 0x02000080, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x04000040), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(xnor, x6, x26, x11, 0x04000040, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x08000020), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(xnor, x7, x25, x10, 0x08000020, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x10000010), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(xnor, x8, x24, x9, 0x10000010, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x20000008), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(xnor, x9, x23, x8, 0x20000008, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x40000004), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(xnor, x10, x22, x7, 0x40000004, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x80000002), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(xnor, x11, x21, x6, 0x80000002, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000001), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(xnor, x12, x20, x5, 0x00000001, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x00000001), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(xnor, x13, x19, x4, 0x00000001, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x80000002), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(xnor, x14, x18, x3, 0x80000002, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x40000004), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(xnor, x15, x17, x2, 0x40000004, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x20000008), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(xnor, x16, x16, x1, 0x20000008, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x10000010), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(xnor, x17, x15, x31, 0x10000010, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x08000020), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(xnor, x18, x14, x30, 0x08000020, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x04000040), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(xnor, x19, x13, x29, 0x04000040, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x02000080), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(xnor, x20, x12, x28, 0x02000080, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x01000100), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(xnor, x21, x11, x27, 0x01000100, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x00800200), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(xnor, x22, x10, x26, 0x00800200, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x00400400), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(xnor, x23, x9, x25, 0x00400400, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x00200800), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(xnor, x24, x8, x24, 0x00200800, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x00101000), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(xnor, x25, x7, x23, 0x00101000, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x00082000), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(xnor, x26, x6, x22, 0x00082000, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x00044000), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(xnor, x27, x5, x21, 0x00044000, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x00028000), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(xnor, x28, x4, x20, 0x00028000, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x00000000), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(xnor, x29, x3, x19, 0x00000000, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x00028000), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(xnor, x30, x2, x18, 0x00028000, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x00044000), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(xnor, x31, x1, x17, 0x00044000, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x00082000), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(xnor, x1, x31, x16, 0x00082000, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x00101000), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(xnor, x2, x30, x15, 0x00101000, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x00200800), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(xnor, x3, x29, x14, 0x00200800, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x00400400), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(xnor, x4, x28, x13, 0x00400400, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x00800200), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(xnor, x5, x27, x12, 0x00800200, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x01000100), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(xnor, x6, x26, x11, 0x01000100, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x02000080), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(xnor, x7, x25, x10, 0x02000080, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x04000040), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(xnor, x8, x24, x9, 0x04000040, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x08000020), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(xnor, x9, x23, x8, 0x08000020, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x10000010), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(xnor, x10, x22, x7, 0x10000010, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x20000008), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(xnor, x11, x21, x6, 0x20000008, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x40000004), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(xnor, x12, x20, x5, 0x40000004, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x80000002), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(xnor, x13, x19, x4, 0x80000002, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x00000001), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(xnor, x14, x18, x3, 0x00000001, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xfffffffe), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(xnor, x15, x17, x2, 0xfffffffe, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xfffffffd), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(xnor, x16, x16, x1, 0xfffffffd, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xfffffffb), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(xnor, x17, x15, x31, 0xfffffffb, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xfffffff7), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(xnor, x18, x14, x30, 0xfffffff7, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xffffffef), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(xnor, x19, x13, x29, 0xffffffef, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xffffffdf), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(xnor, x20, x12, x28, 0xffffffdf, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xffffffbf), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(xnor, x21, x11, x27, 0xffffffbf, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xffffff7f), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(xnor, x22, x10, x26, 0xffffff7f, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xfffffeff), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(xnor, x23, x9, x25, 0xfffffeff, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xfffffdff), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(xnor, x24, x8, x24, 0xfffffdff, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xfffffbff), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(xnor, x25, x7, x23, 0xfffffbff, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xfffff7ff), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(xnor, x26, x6, x22, 0xfffff7ff, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xffffefff), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(xnor, x27, x5, x21, 0xffffefff, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xffffdfff), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(xnor, x28, x4, x20, 0xffffdfff, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xffffbfff), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(xnor, x29, x3, x19, 0xffffbfff, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xffff7fff), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(xnor, x30, x2, x18, 0xffff7fff, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xfffeffff), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(xnor, x31, x1, x17, 0xfffeffff, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xfffdffff), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(xnor, x1, x31, x16, 0xfffdffff, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xfffbffff), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(xnor, x2, x30, x15, 0xfffbffff, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xfff7ffff), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(xnor, x3, x29, x14, 0xfff7ffff, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffefffff), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(xnor, x4, x28, x13, 0xffefffff, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xffdfffff), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(xnor, x5, x27, x12, 0xffdfffff, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xffbfffff), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(xnor, x6, x26, x11, 0xffbfffff, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xff7fffff), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(xnor, x7, x25, x10, 0xff7fffff, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xfeffffff), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(xnor, x8, x24, x9, 0xfeffffff, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xfdffffff), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(xnor, x9, x23, x8, 0xfdffffff, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xfbffffff), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(xnor, x10, x22, x7, 0xfbffffff, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xf7ffffff), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(xnor, x11, x21, x6, 0xf7ffffff, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xefffffff), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(xnor, x12, x20, x5, 0xefffffff, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xdfffffff), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(xnor, x13, x19, x4, 0xdfffffff, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xbfffffff), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(xnor, x14, x18, x3, 0xbfffffff, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x7fffffff), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(xnor, x15, x17, x2, 0x7fffffff, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xffffffff), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(xnor, x16, x16, x1, 0xffffffff, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x00000001), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(xnor, x17, x15, x31, 0x00000001, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x00000002), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(xnor, x18, x14, x30, 0x00000002, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x00000004), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(xnor, x19, x13, x29, 0x00000004, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x00000008), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(xnor, x20, x12, x28, 0x00000008, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x00000010), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(xnor, x21, x11, x27, 0x00000010, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x00000020), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(xnor, x22, x10, x26, 0x00000020, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x00000040), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(xnor, x23, x9, x25, 0x00000040, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000080), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(xnor, x24, x8, x24, 0x00000080, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x00000100), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(xnor, x25, x7, x23, 0x00000100, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x00000200), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(xnor, x26, x6, x22, 0x00000200, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x00000400), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(xnor, x27, x5, x21, 0x00000400, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x00000800), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(xnor, x28, x4, x20, 0x00000800, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x00001000), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(xnor, x29, x3, x19, 0x00001000, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x00002000), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(xnor, x30, x2, x18, 0x00002000, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x00004000), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(xnor, x31, x1, x17, 0x00004000, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x00008000), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(xnor, x1, x31, x16, 0x00008000, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x00010000), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(xnor, x2, x30, x15, 0x00010000, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x00020000), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(xnor, x3, x29, x14, 0x00020000, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x00040000), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(xnor, x4, x28, x13, 0x00040000, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x00080000), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(xnor, x5, x27, x12, 0x00080000, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x00100000), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(xnor, x6, x26, x11, 0x00100000, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x00200000), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(xnor, x7, x25, x10, 0x00200000, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x00400000), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(xnor, x8, x24, x9, 0x00400000, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00800000), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(xnor, x9, x23, x8, 0x00800000, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x01000000), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(xnor, x10, x22, x7, 0x01000000, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x02000000), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(xnor, x11, x21, x6, 0x02000000, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x04000000), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(xnor, x12, x20, x5, 0x04000000, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x08000000), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(xnor, x13, x19, x4, 0x08000000, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x10000000), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(xnor, x14, x18, x3, 0x10000000, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x20000000), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(xnor, x15, x17, x2, 0x20000000, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x40000000), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(xnor, x16, x16, x1, 0x40000000, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x80000000), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(xnor, x17, x15, x31, 0x80000000, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x00000000), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(xnor, x18, x14, x30, 0x00000000, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0xffffffff), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(xnor, x19, x29, x29, 0xffffffff, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(xnor, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0x571e5744), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(xnor, x21, x11, x0, 0x571e5744, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x1e64043c), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(xnor, x22, x0, x26, 0x1e64043c, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/XPERM-B-01.S b/riscof/suite/rv32i_m/K_unratified/XPERM-B-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..ff19436912faad63fbfdb930e8ca983ca0957044
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/XPERM-B-01.S
@@ -0,0 +1,1024 @@
+// RISC-V Architectural Validation Test XPERM-B-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'xperm.b'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",xperm.b)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",xperm.b)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",xperm.b)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x00000000), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0x00000000, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x00000000), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0x00000000, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x00000000), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0x00000000, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x00000000), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0x00000000, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x00000000), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0x00000000, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x00000000), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0x00000000, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x00000000), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0x00000000, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x00000000), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0x00000000, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x00000000), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0x00000000, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x00000000), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0x00000000, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0x00000000, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0x00000000, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0x00000000, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00000000), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0x00000000, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0x00000000, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0x00000000, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x00000000), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0x00000000, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00000000), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0x00000000, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00000000), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(xperm.b, x19, x13, x29, 0x00000000, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00000000), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(xperm.b, x20, x12, x28, 0x00000000, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00000000), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(xperm.b, x21, x11, x27, 0x00000000, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00000000), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(xperm.b, x22, x10, x26, 0x00000000, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00000000), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(xperm.b, x23, x9, x25, 0x00000000, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00000000), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(xperm.b, x24, x8, x24, 0x00000000, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00000000), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(xperm.b, x25, x7, x23, 0x00000000, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00000000), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(xperm.b, x26, x6, x22, 0x00000000, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00000000), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(xperm.b, x27, x5, x21, 0x00000000, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00000000), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(xperm.b, x28, x4, x20, 0x00000000, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00000000), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(xperm.b, x29, x3, x19, 0x00000000, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00000000), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(xperm.b, x30, x2, x18, 0x00000000, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00000000), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(xperm.b, x31, x1, x17, 0x00000000, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00000000), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0x00000000, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00000000), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0x00000000, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00000000), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0x00000000, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x00000000), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0x00000000, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x00000000), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0x00000000, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x00000000), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0x00000000, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x00000000), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0x00000000, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x00000000), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0x00000000, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x00000000), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0x00000000, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x00000000), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0x00000000, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0x00000000, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0x00000000, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xfefefefe), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0xfefefefe, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x00fdfdfd), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0x00fdfdfd, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x00fbfbfb), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0x00fbfbfb, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x00f7f7f7), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0x00f7f7f7, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x00efefef), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0x00efefef, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x00dfdfdf), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0x00dfdfdf, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x00bfbfbf), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(xperm.b, x19, x13, x29, 0x00bfbfbf, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xff7f7f7f), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(xperm.b, x20, x12, x28, 0xff7f7f7f, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xfeffffff), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(xperm.b, x21, x11, x27, 0xfeffffff, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xff00ffff), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(xperm.b, x22, x10, x26, 0xff00ffff, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xff00ffff), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(xperm.b, x23, x9, x25, 0xff00ffff, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xff00ffff), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(xperm.b, x24, x8, x24, 0xff00ffff, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xff00ffff), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(xperm.b, x25, x7, x23, 0xff00ffff, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xff00ffff), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(xperm.b, x26, x6, x22, 0xff00ffff, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xff00ffff), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(xperm.b, x27, x5, x21, 0xff00ffff, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xffffffff), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(xperm.b, x28, x4, x20, 0xffffffff, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xffffffff), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(xperm.b, x29, x3, x19, 0xffffffff, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xffff00ff), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(xperm.b, x30, x2, x18, 0xffff00ff, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xffff00ff), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(xperm.b, x31, x1, x17, 0xffff00ff, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xffff00ff), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0xffff00ff, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xffff00ff), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0xffff00ff, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xffff00ff), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0xffff00ff, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xffff00ff), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0xffff00ff, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xffff7fff), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0xffff7fff, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xffffffff), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0xffffffff, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xffffff00), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0xffffff00, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xffffff00), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0xffffff00, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xffffff00), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0xffffff00, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xffffff00), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0xffffff00, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xffffff00), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0xffffff00, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xffffff00), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0xffffff00, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xffffffff), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0xffffffff, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0xffffffff, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x01010101), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0x01010101, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x02020202), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0x02020202, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x04040404), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0x04040404, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x08080808), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0x08080808, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x10101010), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(xperm.b, x19, x13, x29, 0x10101010, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x20202020), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(xperm.b, x20, x12, x28, 0x20202020, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x40404040), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(xperm.b, x21, x11, x27, 0x40404040, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x80808080), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(xperm.b, x22, x10, x26, 0x80808080, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(xperm.b, x23, x9, x25, 0x00000000, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(xperm.b, x24, x8, x24, 0x00000000, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(xperm.b, x25, x7, x23, 0x00000000, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(xperm.b, x26, x6, x22, 0x00000000, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(xperm.b, x27, x5, x21, 0x00000000, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(xperm.b, x28, x4, x20, 0x00000000, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(xperm.b, x29, x3, x19, 0x00000000, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(xperm.b, x30, x2, x18, 0x00000000, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(xperm.b, x31, x1, x17, 0x00000000, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0x00000000, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0x00000000, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0x00000000, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0x00000000, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0x00000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0x00000000, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0x00000000, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0x00000000, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0x00000000, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0x00000000, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0x00000000, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0x00000000, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0x00000000, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000000), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0x00000000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0x00000000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfefefefe), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0xfefefefe, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfdfdfdfd), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0xfdfdfdfd, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfbfbfbfb), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(xperm.b, x19, x13, x29, 0xfbfbfbfb, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xf7f7f7f7), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(xperm.b, x20, x12, x28, 0xf7f7f7f7, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xefefefef), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(xperm.b, x21, x11, x27, 0xefefefef, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xdfdfdfdf), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(xperm.b, x22, x10, x26, 0xdfdfdfdf, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xbfbfbfbf), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(xperm.b, x23, x9, x25, 0xbfbfbfbf, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x7f7f7f7f), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(xperm.b, x24, x8, x24, 0x7f7f7f7f, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffff), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(xperm.b, x25, x7, x23, 0xffffffff, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffffff), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(xperm.b, x26, x6, x22, 0xffffffff, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffffff), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(xperm.b, x27, x5, x21, 0xffffffff, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffffff), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(xperm.b, x28, x4, x20, 0xffffffff, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffffff), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(xperm.b, x29, x3, x19, 0xffffffff, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffffff), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(xperm.b, x30, x2, x18, 0xffffffff, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffffff), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(xperm.b, x31, x1, x17, 0xffffffff, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffffffff), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0xffffffff, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffffffff), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0xffffffff, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffffffff), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0xffffffff, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffffff), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0xffffffff, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffffff), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0xffffffff, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffffffff), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0xffffffff, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffffffff), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0xffffffff, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffffffff), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0xffffffff, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffffffff), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0xffffffff, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffffffff), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0xffffffff, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xffffffff), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0xffffffff, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffffff), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0xffffffff, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffffffff), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0xffffffff, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0xffffffff, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xffffffff), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0xffffffff, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffff), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0xffffffff, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xffffffff), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0xffffffff, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0xffffffff, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0x00000000), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(xperm.b, x19, x29, x29, 0x00000000, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(xperm.b, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xbbbbbbbb), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(xperm.b, x21, x11, x0, 0xbbbbbbbb, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(xperm.b, x22, x0, x26, 0x00000000, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/XPERM-N-01.S b/riscof/suite/rv32i_m/K_unratified/XPERM-N-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..f79c3de399da81982f1b93ccaf614fd38c7bc87c
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/XPERM-N-01.S
@@ -0,0 +1,1024 @@
+// RISC-V Architectural Validation Test XPERM-N-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'xperm.n'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",xperm.n)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",xperm.n)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",xperm.n)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x91900015), rs1:x31(0xadea5195), rs2:x16(0x121bcc23)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0x91900015, 0xadea5195, 0x121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x0fd0c1f0), rs1:x30(0xd2ffbec1), rs2:x15(0xa47d105b)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0x0fd0c1f0, 0xd2ffbec1, 0xa47d105b, x6, 4, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xaba0080b), rs1:x29(0xa8e1a8bb), rs2:x14(0x707af2c0)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0xaba0080b, 0xa8e1a8bb, 0x707af2c0, x6, 8, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x0c000009), rs1:x28(0x48c99fcb), rs2:x13(0xe19bfbc3)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0x0c000009, 0x48c99fcb, 0xe19bfbc3, x6, 12, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x12004f00), rs1:x27(0x461d524f), rs2:x12(0x528a10af)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0x12004f00, 0x461d524f, 0x528a10af, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xa2a080a0), rs1:x26(0x528a10af), rs2:x11(0x461d524f)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0xa2a080a0, 0x528a10af, 0x461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xb0000000), rs1:x25(0xe19bfbc3), rs2:x10(0x48c99fcb)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0xb0000000, 0xe19bfbc3, 0x48c99fcb, x1, 4, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x000c0000), rs1:x24(0x707af2c0), rs2:x9(0xa8e1a8bb)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0x000c0000, 0x707af2c0, 0xa8e1a8bb, x1, 8, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x00000005), rs1:x23(0xa47d105b), rs2:x8(0xd2ffbec1)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0x00000005, 0xa47d105b, 0xd2ffbec1, x1, 12, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x00001201), rs1:x22(0x121bcc23), rs2:x7(0xadea5195)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0x00001201, 0x121bcc23, 0xadea5195, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x00000001), rs2:x6(0xffffffff)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0x00000000, 0x1, 0xffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000002), rs2:x5(0x7fffffff)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0x00000000, 0x2, 0x7fffffff, x1, 4, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0x00000004), rs2:x4(0xbfffffff)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0x00000000, 0x4, 0xbfffffff, x1, 8, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00000000), rs1:x18(0x00000008), rs2:x3(0xdfffffff)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0x00000000, 0x8, 0xdfffffff, x1, 12, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x00000010), rs2:x2(0xefffffff)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0x00000000, 0x10, 0xefffffff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000020), rs2:x1(0xf7ffffff)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0x00000000, 0x20, 0xf7ffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x00000000), rs1:x15(0x00000040), rs2:x31(0xfbffffff)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0x00000000, 0x40, 0xfbffffff, x2, 4, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00000000), rs1:x14(0x00000080), rs2:x30(0xfdffffff)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0x00000000, 0x80, 0xfdffffff, x2, 8, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00000000), rs1:x13(0x00000100), rs2:x29(0xfeffffff)
+ TEST_RR_OP(xperm.n, x19, x13, x29, 0x00000000, 0x100, 0xfeffffff, x2, 12, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00000000), rs1:x12(0x00000200), rs2:x28(0xff7fffff)
+ TEST_RR_OP(xperm.n, x20, x12, x28, 0x00000000, 0x200, 0xff7fffff, x2, 16, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00000000), rs1:x11(0x00000400), rs2:x27(0xffbfffff)
+ TEST_RR_OP(xperm.n, x21, x11, x27, 0x00000000, 0x400, 0xffbfffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00000000), rs1:x10(0x00000800), rs2:x26(0xffdfffff)
+ TEST_RR_OP(xperm.n, x22, x10, x26, 0x00000000, 0x800, 0xffdfffff, x1, 4, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00000000), rs1:x9(0x00001000), rs2:x25(0xffefffff)
+ TEST_RR_OP(xperm.n, x23, x9, x25, 0x00000000, 0x1000, 0xffefffff, x1, 8, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00000000), rs1:x8(0x00002000), rs2:x24(0xfff7ffff)
+ TEST_RR_OP(xperm.n, x24, x8, x24, 0x00000000, 0x2000, 0xfff7ffff, x1, 12, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00000000), rs1:x7(0x00004000), rs2:x23(0xfffbffff)
+ TEST_RR_OP(xperm.n, x25, x7, x23, 0x00000000, 0x4000, 0xfffbffff, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00000000), rs1:x6(0x00008000), rs2:x22(0xfffdffff)
+ TEST_RR_OP(xperm.n, x26, x6, x22, 0x00000000, 0x8000, 0xfffdffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00000000), rs1:x5(0x00010000), rs2:x21(0xfffeffff)
+ TEST_RR_OP(xperm.n, x27, x5, x21, 0x00000000, 0x10000, 0xfffeffff, x1, 4, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00000000), rs1:x4(0x00020000), rs2:x20(0xffff7fff)
+ TEST_RR_OP(xperm.n, x28, x4, x20, 0x00000000, 0x20000, 0xffff7fff, x1, 8, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00000000), rs1:x3(0x00040000), rs2:x19(0xffffbfff)
+ TEST_RR_OP(xperm.n, x29, x3, x19, 0x00000000, 0x40000, 0xffffbfff, x1, 12, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00000000), rs1:x2(0x00080000), rs2:x18(0xffffdfff)
+ TEST_RR_OP(xperm.n, x30, x2, x18, 0x00000000, 0x80000, 0xffffdfff, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00000000), rs1:x1(0x00100000), rs2:x17(0xffffefff)
+ TEST_RR_OP(xperm.n, x31, x1, x17, 0x00000000, 0x100000, 0xffffefff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00000000), rs1:x31(0x00200000), rs2:x16(0xfffff7ff)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0x00000000, 0x200000, 0xfffff7ff, x5, 4, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00000000), rs1:x30(0x00400000), rs2:x15(0xfffffbff)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0x00000000, 0x400000, 0xfffffbff, x5, 8, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00000000), rs1:x29(0x00800000), rs2:x14(0xfffffdff)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0x00000000, 0x800000, 0xfffffdff, x5, 12, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x00000000), rs1:x28(0x01000000), rs2:x13(0xfffffeff)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0x00000000, 0x1000000, 0xfffffeff, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x00000000), rs1:x27(0x02000000), rs2:x12(0xffffff7f)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0x00000000, 0x2000000, 0xffffff7f, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x00000000), rs1:x26(0x04000000), rs2:x11(0xffffffbf)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0x00000000, 0x4000000, 0xffffffbf, x1, 4, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x00000000), rs1:x25(0x08000000), rs2:x10(0xffffffdf)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0x00000000, 0x8000000, 0xffffffdf, x1, 8, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x00000000), rs1:x24(0x10000000), rs2:x9(0xffffffef)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0x00000000, 0x10000000, 0xffffffef, x1, 12, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x00000002), rs1:x23(0x20000000), rs2:x8(0xfffffff7)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0x00000002, 0x20000000, 0xfffffff7, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x00000000), rs1:x22(0x40000000), rs2:x7(0xfffffffb)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0x00000000, 0x40000000, 0xfffffffb, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x80000000), rs2:x6(0xfffffffd)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0x00000000, 0x80000000, 0xfffffffd, x1, 4, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000), rs2:x5(0xfffffffe)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0x00000000, 0x0, 0xfffffffe, x1, 8, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xeeeeeeee), rs1:x19(0xfffffffe), rs2:x4(0x00000000)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0xeeeeeeee, 0xfffffffe, 0x0, x1, 12, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0ddddddd), rs1:x18(0xfffffffd), rs2:x3(0x80000000)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0x0ddddddd, 0xfffffffd, 0x80000000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xfbbbbbbb), rs1:x17(0xfffffffb), rs2:x2(0x40000000)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0xfbbbbbbb, 0xfffffffb, 0x40000000, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xf7777777), rs1:x16(0xfffffff7), rs2:x1(0x20000000)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0xf7777777, 0xfffffff7, 0x20000000, x3, 4, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xefffffff), rs1:x15(0xffffffef), rs2:x31(0x10000000)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0xefffffff, 0xffffffef, 0x10000000, x3, 8, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xf0ffffff), rs1:x14(0xffffffdf), rs2:x30(0x08000000)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0xf0ffffff, 0xffffffdf, 0x8000000, x3, 12, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xffffffff), rs1:x13(0xffffffbf), rs2:x29(0x04000000)
+ TEST_RR_OP(xperm.n, x19, x13, x29, 0xffffffff, 0xffffffbf, 0x4000000, x3, 16, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xffffffff), rs1:x12(0xffffff7f), rs2:x28(0x02000000)
+ TEST_RR_OP(xperm.n, x20, x12, x28, 0xffffffff, 0xffffff7f, 0x2000000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xffffffff), rs1:x11(0xfffffeff), rs2:x27(0x01000000)
+ TEST_RR_OP(xperm.n, x21, x11, x27, 0xffffffff, 0xfffffeff, 0x1000000, x1, 4, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xff0fffff), rs1:x10(0xfffffdff), rs2:x26(0x00800000)
+ TEST_RR_OP(xperm.n, x22, x10, x26, 0xff0fffff, 0xfffffdff, 0x800000, x1, 8, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xffffffff), rs1:x9(0xfffffbff), rs2:x25(0x00400000)
+ TEST_RR_OP(xperm.n, x23, x9, x25, 0xffffffff, 0xfffffbff, 0x400000, x1, 12, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xff7fffff), rs1:x8(0xfffff7ff), rs2:x24(0x00200000)
+ TEST_RR_OP(xperm.n, x24, x8, x24, 0xff7fffff, 0xfffff7ff, 0x200000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xffffffff), rs1:x7(0xffffefff), rs2:x23(0x00100000)
+ TEST_RR_OP(xperm.n, x25, x7, x23, 0xffffffff, 0xffffefff, 0x100000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xfff0ffff), rs1:x6(0xffffdfff), rs2:x22(0x00080000)
+ TEST_RR_OP(xperm.n, x26, x6, x22, 0xfff0ffff, 0xffffdfff, 0x80000, x1, 4, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xffffffff), rs1:x5(0xffffbfff), rs2:x21(0x00040000)
+ TEST_RR_OP(xperm.n, x27, x5, x21, 0xffffffff, 0xffffbfff, 0x40000, x1, 8, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xffffffff), rs1:x4(0xffff7fff), rs2:x20(0x00020000)
+ TEST_RR_OP(xperm.n, x28, x4, x20, 0xffffffff, 0xffff7fff, 0x20000, x1, 12, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xffffffff), rs1:x3(0xfffeffff), rs2:x19(0x00010000)
+ TEST_RR_OP(xperm.n, x29, x3, x19, 0xffffffff, 0xfffeffff, 0x10000, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xffff0fff), rs1:x2(0xfffdffff), rs2:x18(0x00008000)
+ TEST_RR_OP(xperm.n, x30, x2, x18, 0xffff0fff, 0xfffdffff, 0x8000, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xffffbfff), rs1:x1(0xfffbffff), rs2:x17(0x00004000)
+ TEST_RR_OP(xperm.n, x31, x1, x17, 0xffffbfff, 0xfffbffff, 0x4000, x4, 4, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xffffffff), rs1:x31(0xfff7ffff), rs2:x16(0x00002000)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0xffffffff, 0xfff7ffff, 0x2000, x4, 8, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xffffffff), rs1:x30(0xffefffff), rs2:x15(0x00001000)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0xffffffff, 0xffefffff, 0x1000, x4, 12, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xfffff0ff), rs1:x29(0xffdfffff), rs2:x14(0x00000800)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0xfffff0ff, 0xffdfffff, 0x800, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xffffffff), rs1:x28(0xffbfffff), rs2:x13(0x00000400)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0xffffffff, 0xffbfffff, 0x400, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xffffffff), rs1:x27(0xff7fffff), rs2:x12(0x00000200)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0xffffffff, 0xff7fffff, 0x200, x1, 4, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xffffffff), rs1:x26(0xfeffffff), rs2:x11(0x00000100)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0xffffffff, 0xfeffffff, 0x100, x1, 8, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xffffff0f), rs1:x25(0xfdffffff), rs2:x10(0x00000080)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0xffffff0f, 0xfdffffff, 0x80, x1, 12, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xffffffff), rs1:x24(0xfbffffff), rs2:x9(0x00000040)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0xffffffff, 0xfbffffff, 0x40, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xffffffff), rs1:x23(0xf7ffffff), rs2:x8(0x00000020)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0xffffffff, 0xf7ffffff, 0x20, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xffffffff), rs1:x22(0xefffffff), rs2:x7(0x00000010)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0xffffffff, 0xefffffff, 0x10, x1, 4, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xfffffff0), rs1:x21(0xdfffffff), rs2:x6(0x00000008)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0xfffffff0, 0xdfffffff, 0x8, x1, 8, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xffffffff), rs1:x20(0xbfffffff), rs2:x5(0x00000004)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0xffffffff, 0xbfffffff, 0x4, x1, 12, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xffffffff), rs1:x19(0x7fffffff), rs2:x4(0x00000002)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0xffffffff, 0x7fffffff, 0x2, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff), rs2:x3(0x00000001)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0xffffffff, 0xffffffff, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x11111111), rs1:x17(0x00000001), rs2:x2(0x00000000)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0x11111111, 0x1, 0x0, x4, 4, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x22222222), rs1:x16(0x00000002), rs2:x1(0x00000000)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0x22222222, 0x2, 0x0, x4, 8, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x44444444), rs1:x15(0x00000004), rs2:x31(0x00000000)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0x44444444, 0x4, 0x0, x4, 12, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x88888888), rs1:x14(0x00000008), rs2:x30(0x00000000)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0x88888888, 0x8, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000000), rs1:x13(0x00000010), rs2:x29(0x00000000)
+ TEST_RR_OP(xperm.n, x19, x13, x29, 0x00000000, 0x10, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000000), rs1:x12(0x00000020), rs2:x28(0x00000000)
+ TEST_RR_OP(xperm.n, x20, x12, x28, 0x00000000, 0x20, 0x0, x1, 4, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000000), rs1:x11(0x00000040), rs2:x27(0x00000000)
+ TEST_RR_OP(xperm.n, x21, x11, x27, 0x00000000, 0x40, 0x0, x1, 8, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000000), rs1:x10(0x00000080), rs2:x26(0x00000000)
+ TEST_RR_OP(xperm.n, x22, x10, x26, 0x00000000, 0x80, 0x0, x1, 12, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000), rs1:x9(0x00000100), rs2:x25(0x00000000)
+ TEST_RR_OP(xperm.n, x23, x9, x25, 0x00000000, 0x100, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000), rs1:x8(0x00000200), rs2:x24(0x00000000)
+ TEST_RR_OP(xperm.n, x24, x8, x24, 0x00000000, 0x200, 0x0, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000), rs1:x7(0x00000400), rs2:x23(0x00000000)
+ TEST_RR_OP(xperm.n, x25, x7, x23, 0x00000000, 0x400, 0x0, x1, 4, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000), rs1:x6(0x00000800), rs2:x22(0x00000000)
+ TEST_RR_OP(xperm.n, x26, x6, x22, 0x00000000, 0x800, 0x0, x1, 8, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000), rs1:x5(0x00001000), rs2:x21(0x00000000)
+ TEST_RR_OP(xperm.n, x27, x5, x21, 0x00000000, 0x1000, 0x0, x1, 12, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000), rs1:x4(0x00002000), rs2:x20(0x00000000)
+ TEST_RR_OP(xperm.n, x28, x4, x20, 0x00000000, 0x2000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000), rs1:x3(0x00004000), rs2:x19(0x00000000)
+ TEST_RR_OP(xperm.n, x29, x3, x19, 0x00000000, 0x4000, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000), rs1:x2(0x00008000), rs2:x18(0x00000000)
+ TEST_RR_OP(xperm.n, x30, x2, x18, 0x00000000, 0x8000, 0x0, x4, 4, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000), rs1:x1(0x00010000), rs2:x17(0x00000000)
+ TEST_RR_OP(xperm.n, x31, x1, x17, 0x00000000, 0x10000, 0x0, x4, 8, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000), rs1:x31(0x00020000), rs2:x16(0x00000000)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0x00000000, 0x20000, 0x0, x4, 12, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000), rs1:x30(0x00040000), rs2:x15(0x00000000)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0x00000000, 0x40000, 0x0, x4, 16, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000), rs1:x29(0x00080000), rs2:x14(0x00000000)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0x00000000, 0x80000, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000), rs1:x28(0x00100000), rs2:x13(0x00000000)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0x00000000, 0x100000, 0x0, x1, 4, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000), rs1:x27(0x00200000), rs2:x12(0x00000000)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0x00000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000), rs1:x26(0x00400000), rs2:x11(0x00000000)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0x00000000, 0x400000, 0x0, x1, 12, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000), rs1:x25(0x00800000), rs2:x10(0x00000000)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0x00000000, 0x800000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000), rs1:x24(0x01000000), rs2:x9(0x00000000)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0x00000000, 0x1000000, 0x0, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000), rs1:x23(0x02000000), rs2:x8(0x00000000)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0x00000000, 0x2000000, 0x0, x1, 4, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000), rs1:x22(0x04000000), rs2:x7(0x00000000)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0x00000000, 0x4000000, 0x0, x1, 8, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000), rs1:x21(0x08000000), rs2:x6(0x00000000)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0x00000000, 0x8000000, 0x0, x1, 12, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x10000000), rs2:x5(0x00000000)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0x00000000, 0x10000000, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000), rs1:x19(0x20000000), rs2:x4(0x00000000)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0x00000000, 0x20000000, 0x0, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000000), rs1:x18(0x40000000), rs2:x3(0x00000000)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0x00000000, 0x40000000, 0x0, x5, 4, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000), rs1:x17(0x80000000), rs2:x2(0x00000000)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0x00000000, 0x80000000, 0x0, x5, 8, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000), rs2:x1(0x00000000)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0x00000000, 0x0, 0x0, x5, 12, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xeeeeeeee), rs1:x15(0xfffffffe), rs2:x31(0x00000000)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0xeeeeeeee, 0xfffffffe, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xdddddddd), rs1:x14(0xfffffffd), rs2:x30(0x00000000)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0xdddddddd, 0xfffffffd, 0x0, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xbbbbbbbb), rs1:x13(0xfffffffb), rs2:x29(0x00000000)
+ TEST_RR_OP(xperm.n, x19, x13, x29, 0xbbbbbbbb, 0xfffffffb, 0x0, x1, 4, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x77777777), rs1:x12(0xfffffff7), rs2:x28(0x00000000)
+ TEST_RR_OP(xperm.n, x20, x12, x28, 0x77777777, 0xfffffff7, 0x0, x1, 8, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffff), rs1:x11(0xffffffef), rs2:x27(0x00000000)
+ TEST_RR_OP(xperm.n, x21, x11, x27, 0xffffffff, 0xffffffef, 0x0, x1, 12, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffff), rs1:x10(0xffffffdf), rs2:x26(0x00000000)
+ TEST_RR_OP(xperm.n, x22, x10, x26, 0xffffffff, 0xffffffdf, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffff), rs1:x9(0xffffffbf), rs2:x25(0x00000000)
+ TEST_RR_OP(xperm.n, x23, x9, x25, 0xffffffff, 0xffffffbf, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffffff), rs1:x8(0xffffff7f), rs2:x24(0x00000000)
+ TEST_RR_OP(xperm.n, x24, x8, x24, 0xffffffff, 0xffffff7f, 0x0, x1, 4, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffff), rs1:x7(0xfffffeff), rs2:x23(0x00000000)
+ TEST_RR_OP(xperm.n, x25, x7, x23, 0xffffffff, 0xfffffeff, 0x0, x1, 8, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffffff), rs1:x6(0xfffffdff), rs2:x22(0x00000000)
+ TEST_RR_OP(xperm.n, x26, x6, x22, 0xffffffff, 0xfffffdff, 0x0, x1, 12, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffffff), rs1:x5(0xfffffbff), rs2:x21(0x00000000)
+ TEST_RR_OP(xperm.n, x27, x5, x21, 0xffffffff, 0xfffffbff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffffff), rs1:x4(0xfffff7ff), rs2:x20(0x00000000)
+ TEST_RR_OP(xperm.n, x28, x4, x20, 0xffffffff, 0xfffff7ff, 0x0, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffffff), rs1:x3(0xffffefff), rs2:x19(0x00000000)
+ TEST_RR_OP(xperm.n, x29, x3, x19, 0xffffffff, 0xffffefff, 0x0, x5, 4, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffffff), rs1:x2(0xffffdfff), rs2:x18(0x00000000)
+ TEST_RR_OP(xperm.n, x30, x2, x18, 0xffffffff, 0xffffdfff, 0x0, x5, 8, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffffff), rs1:x1(0xffffbfff), rs2:x17(0x00000000)
+ TEST_RR_OP(xperm.n, x31, x1, x17, 0xffffffff, 0xffffbfff, 0x0, x5, 12, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffffffff), rs1:x31(0xffff7fff), rs2:x16(0x00000000)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0xffffffff, 0xffff7fff, 0x0, x5, 16, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffffffff), rs1:x30(0xfffeffff), rs2:x15(0x00000000)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0xffffffff, 0xfffeffff, 0x0, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffffffff), rs1:x29(0xfffdffff), rs2:x14(0x00000000)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0xffffffff, 0xfffdffff, 0x0, x1, 4, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffffff), rs1:x28(0xfffbffff), rs2:x13(0x00000000)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0xffffffff, 0xfffbffff, 0x0, x1, 8, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffffff), rs1:x27(0xfff7ffff), rs2:x12(0x00000000)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0xffffffff, 0xfff7ffff, 0x0, x1, 12, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffffffff), rs1:x26(0xffefffff), rs2:x11(0x00000000)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0xffffffff, 0xffefffff, 0x0, x1, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffffffff), rs1:x25(0xffdfffff), rs2:x10(0x00000000)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0xffffffff, 0xffdfffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffffffff), rs1:x24(0xffbfffff), rs2:x9(0x00000000)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0xffffffff, 0xffbfffff, 0x0, x1, 4, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffffffff), rs1:x23(0xff7fffff), rs2:x8(0x00000000)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0xffffffff, 0xff7fffff, 0x0, x1, 8, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffffffff), rs1:x22(0xfeffffff), rs2:x7(0x00000000)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0xffffffff, 0xfeffffff, 0x0, x1, 12, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xffffffff), rs1:x21(0xfdffffff), rs2:x6(0x00000000)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0xffffffff, 0xfdffffff, 0x0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffffff), rs1:x20(0xfbffffff), rs2:x5(0x00000000)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0xffffffff, 0xfbffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffffffff), rs1:x19(0xf7ffffff), rs2:x4(0x00000000)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0xffffffff, 0xf7ffffff, 0x0, x6, 4, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xefffffff), rs2:x3(0x00000000)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0xffffffff, 0xefffffff, 0x0, x6, 8, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xffffffff), rs1:x17(0xdfffffff), rs2:x2(0x00000000)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0xffffffff, 0xdfffffff, 0x0, x6, 12, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffff), rs1:x16(0xbfffffff), rs2:x1(0x00000000)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0xffffffff, 0xbfffffff, 0x0, x6, 16, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xffffffff), rs1:x15(0x7fffffff), rs2:x31(0x00000000)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0xffffffff, 0x7fffffff, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff), rs2:x30(0x00000000)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0xffffffff, 0xffffffff, 0x0, x1, 4, x2)
+
+inst_142:
+ // Test 142: Test with rs1 == rs2
+ // result rd:x19(0x2c2000cc), rs1:x29(0xadea5195), rs2:x29(0x121bcc23)
+ TEST_RR_OP(xperm.n, x19, x29, x29, 0x2c2000cc, 0xadea5195, 0x121bcc23, x1, 8, x2)
+
+inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1), rs2:x28(0xa47d105b)
+ TEST_RR_OP(xperm.n, x0, x12, x28, 0x00000000, 0xd2ffbec1, 0xa47d105b, x1, 12, x2)
+
+inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xbbbbbbbb), rs1:x11(0xa8e1a8bb), rs2:x0(0x707af2c0)
+ TEST_RR_OP(xperm.n, x21, x11, x0, 0xbbbbbbbb, 0xa8e1a8bb, 0x707af2c0, x1, 16, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb), rs2:x26(0xe19bfbc3)
+ TEST_RR_OP(xperm.n, x22, x0, x26, 0x00000000, 0x48c99fcb, 0xe19bfbc3, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/K_unratified/ZIP-01.S b/riscof/suite/rv32i_m/K_unratified/ZIP-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..680cc57e95cb7aebce672372a238c336b59a4cf8
--- /dev/null
+++ b/riscof/suite/rv32i_m/K_unratified/ZIP-01.S
@@ -0,0 +1,1492 @@
+// RISC-V Architectural Validation Test ZIP-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'zip'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",zip)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",zip)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",zip)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x99a3e999), rs1:x31(0xadea5195)
+ li x31, 0xadea5195
+ zip x1, x31
+ sw x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x99a3e999)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xe75cfaab), rs1:x30(0xd2ffbec1)
+ li x30, 0xd2ffbec1
+ zip x2, x30
+ sw x2, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xe75cfaab)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xccc0ed47), rs1:x29(0xa8e1a8bb)
+ li x29, 0xa8e1a8bb
+ zip x3, x29
+ sw x3, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xccc0ed47)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x61d5f0c7), rs1:x28(0x48c99fcb)
+ li x28, 0x48c99fcb
+ zip x4, x28
+ sw x4, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x61d5f0c7)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x312c12f7), rs1:x27(0x461d524f)
+ li x27, 0x461d524f
+ zip x5, x27
+ sw x5, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x312c12f7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x2308c4dd), rs1:x26(0x528a10af)
+ li x26, 0x528a10af
+ zip x6, x26
+ sw x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x2308c4dd)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xfd47d28f), rs1:x25(0xe19bfbc3)
+ li x25, 0xe19bfbc3
+ zip x7, x25
+ sw x7, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfd47d28f)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x7f047a88), rs1:x24(0x707af2c0)
+ li x24, 0x707af2c0
+ zip x8, x24
+ sw x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x7f047a88)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x89203be7), rs1:x23(0xa47d105b)
+ li x23, 0xa47d105b
+ zip x9, x23
+ sw x9, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x89203be7)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x5258068f), rs1:x22(0x121bcc23)
+ li x22, 0x121bcc23
+ zip x10, x22
+ sw x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x5258068f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00000001), rs1:x21(0x00000001)
+ li x21, 0x1
+ zip x11, x21
+ sw x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x00000001)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00000004), rs1:x20(0x00000002)
+ li x20, 0x2
+ zip x12, x20
+ sw x12, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x00000004)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x00000010), rs1:x19(0x00000004)
+ li x19, 0x4
+ zip x13, x19
+ sw x13, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x00000010)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x00000040), rs1:x18(0x00000008)
+ li x18, 0x8
+ zip x14, x18
+ sw x14, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x00000040)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00000100), rs1:x17(0x00000010)
+ li x17, 0x10
+ zip x15, x17
+ sw x15, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x00000100)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x00000400), rs1:x16(0x00000020)
+ li x16, 0x20
+ zip x16, x16
+ sw x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x00000400)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x00001000), rs1:x15(0x00000040)
+ li x15, 0x40
+ zip x17, x15
+ sw x17, 4(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x00001000)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00004000), rs1:x14(0x00000080)
+ li x14, 0x80
+ zip x18, x14
+ sw x18, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x00004000)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00010000), rs1:x13(0x00000100)
+ li x13, 0x100
+ zip x19, x13
+ sw x19, 12(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x00010000)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00040000), rs1:x12(0x00000200)
+ li x12, 0x200
+ zip x20, x12
+ sw x20, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x00040000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00100000), rs1:x11(0x00000400)
+ li x11, 0x400
+ zip x21, x11
+ sw x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00100000)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00400000), rs1:x10(0x00000800)
+ li x10, 0x800
+ zip x22, x10
+ sw x22, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00400000)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x01000000), rs1:x9(0x00001000)
+ li x9, 0x1000
+ zip x23, x9
+ sw x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x01000000)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x04000000), rs1:x8(0x00002000)
+ li x8, 0x2000
+ zip x24, x8
+ sw x24, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x04000000)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x10000000), rs1:x7(0x00004000)
+ li x7, 0x4000
+ zip x25, x7
+ sw x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x10000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x40000000), rs1:x6(0x00008000)
+ li x6, 0x8000
+ zip x26, x6
+ sw x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x40000000)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00000002), rs1:x5(0x00010000)
+ li x5, 0x10000
+ zip x27, x5
+ sw x27, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x00000002)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00000008), rs1:x4(0x00020000)
+ li x4, 0x20000
+ zip x28, x4
+ sw x28, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x00000008)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00000020), rs1:x3(0x00040000)
+ li x3, 0x40000
+ zip x29, x3
+ sw x29, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x00000020)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00000080), rs1:x2(0x00080000)
+ li x2, 0x80000
+ zip x30, x2
+ sw x30, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x00000080)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00000200), rs1:x1(0x00100000)
+ li x1, 0x100000
+ zip x31, x1
+ sw x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x00000200)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00000800), rs1:x31(0x00200000)
+ li x31, 0x200000
+ zip x1, x31
+ sw x1, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x00000800)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00002000), rs1:x30(0x00400000)
+ li x30, 0x400000
+ zip x2, x30
+ sw x2, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x00002000)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00008000), rs1:x29(0x00800000)
+ li x29, 0x800000
+ zip x3, x29
+ sw x3, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x00008000)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x00020000), rs1:x28(0x01000000)
+ li x28, 0x1000000
+ zip x4, x28
+ sw x4, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x00020000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x00080000), rs1:x27(0x02000000)
+ li x27, 0x2000000
+ zip x5, x27
+ sw x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00080000)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x00200000), rs1:x26(0x04000000)
+ li x26, 0x4000000
+ zip x6, x26
+ sw x6, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00200000)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x00800000), rs1:x25(0x08000000)
+ li x25, 0x8000000
+ zip x7, x25
+ sw x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00800000)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x02000000), rs1:x24(0x10000000)
+ li x24, 0x10000000
+ zip x8, x24
+ sw x8, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x02000000)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x08000000), rs1:x23(0x20000000)
+ li x23, 0x20000000
+ zip x9, x23
+ sw x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x08000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x20000000), rs1:x22(0x40000000)
+ li x22, 0x40000000
+ zip x10, x22
+ sw x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x20000000)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x80000000), rs1:x21(0x80000000)
+ li x21, 0x80000000
+ zip x11, x21
+ sw x11, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x80000000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000), rs1:x20(0x00000000)
+ li x20, 0x0
+ zip x12, x20
+ sw x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xfffffffe), rs1:x19(0xfffffffe)
+ li x19, 0xfffffffe
+ zip x13, x19
+ sw x13, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xfffffffe)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xfffffffb), rs1:x18(0xfffffffd)
+ li x18, 0xfffffffd
+ zip x14, x18
+ sw x14, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0xfffffffb)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xffffffef), rs1:x17(0xfffffffb)
+ li x17, 0xfffffffb
+ zip x15, x17
+ sw x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0xffffffef)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xffffffbf), rs1:x16(0xfffffff7)
+ li x16, 0xfffffff7
+ zip x16, x16
+ sw x16, 4(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0xffffffbf)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xfffffeff), rs1:x15(0xffffffef)
+ li x15, 0xffffffef
+ zip x17, x15
+ sw x17, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0xfffffeff)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xfffffbff), rs1:x14(0xffffffdf)
+ li x14, 0xffffffdf
+ zip x18, x14
+ sw x18, 12(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0xfffffbff)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xffffefff), rs1:x13(0xffffffbf)
+ li x13, 0xffffffbf
+ zip x19, x13
+ sw x19, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0xffffefff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xffffbfff), rs1:x12(0xffffff7f)
+ li x12, 0xffffff7f
+ zip x20, x12
+ sw x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffffbfff)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xfffeffff), rs1:x11(0xfffffeff)
+ li x11, 0xfffffeff
+ zip x21, x11
+ sw x21, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfffeffff)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xfffbffff), rs1:x10(0xfffffdff)
+ li x10, 0xfffffdff
+ zip x22, x10
+ sw x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfffbffff)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xffefffff), rs1:x9(0xfffffbff)
+ li x9, 0xfffffbff
+ zip x23, x9
+ sw x23, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffefffff)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xffbfffff), rs1:x8(0xfffff7ff)
+ li x8, 0xfffff7ff
+ zip x24, x8
+ sw x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xffbfffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xfeffffff), rs1:x7(0xffffefff)
+ li x7, 0xffffefff
+ zip x25, x7
+ sw x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xfeffffff)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xfbffffff), rs1:x6(0xffffdfff)
+ li x6, 0xffffdfff
+ zip x26, x6
+ sw x26, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfbffffff)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xefffffff), rs1:x5(0xffffbfff)
+ li x5, 0xffffbfff
+ zip x27, x5
+ sw x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xefffffff)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xbfffffff), rs1:x4(0xffff7fff)
+ li x4, 0xffff7fff
+ zip x28, x4
+ sw x28, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xbfffffff)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xfffffffd), rs1:x3(0xfffeffff)
+ li x3, 0xfffeffff
+ zip x29, x3
+ sw x29, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xfffffffd)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xfffffff7), rs1:x2(0xfffdffff)
+ li x2, 0xfffdffff
+ zip x30, x2
+ sw x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfffffff7)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xffffffdf), rs1:x1(0xfffbffff)
+ li x1, 0xfffbffff
+ zip x31, x1
+ sw x31, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xffffffdf)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xffffff7f), rs1:x31(0xfff7ffff)
+ li x31, 0xfff7ffff
+ zip x1, x31
+ sw x1, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xffffff7f)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xfffffdff), rs1:x30(0xffefffff)
+ li x30, 0xffefffff
+ zip x2, x30
+ sw x2, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xfffffdff)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xfffff7ff), rs1:x29(0xffdfffff)
+ li x29, 0xffdfffff
+ zip x3, x29
+ sw x3, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xfffff7ff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xffffdfff), rs1:x28(0xffbfffff)
+ li x28, 0xffbfffff
+ zip x4, x28
+ sw x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xffffdfff)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xffff7fff), rs1:x27(0xff7fffff)
+ li x27, 0xff7fffff
+ zip x5, x27
+ sw x5, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xffff7fff)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xfffdffff), rs1:x26(0xfeffffff)
+ li x26, 0xfeffffff
+ zip x6, x26
+ sw x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xfffdffff)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfff7ffff), rs1:x25(0xfdffffff)
+ li x25, 0xfdffffff
+ zip x7, x25
+ sw x7, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfff7ffff)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xffdfffff), rs1:x24(0xfbffffff)
+ li x24, 0xfbffffff
+ zip x8, x24
+ sw x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffdfffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xff7fffff), rs1:x23(0xf7ffffff)
+ li x23, 0xf7ffffff
+ zip x9, x23
+ sw x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xff7fffff)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xfdffffff), rs1:x22(0xefffffff)
+ li x22, 0xefffffff
+ zip x10, x22
+ sw x10, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfdffffff)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xf7ffffff), rs1:x21(0xdfffffff)
+ li x21, 0xdfffffff
+ zip x11, x21
+ sw x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xf7ffffff)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xdfffffff), rs1:x20(0xbfffffff)
+ li x20, 0xbfffffff
+ zip x12, x20
+ sw x12, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xdfffffff)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x7fffffff), rs1:x19(0x7fffffff)
+ li x19, 0x7fffffff
+ zip x13, x19
+ sw x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x7fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffff), rs1:x18(0xffffffff)
+ li x18, 0xffffffff
+ zip x14, x18
+ sw x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xffffffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000001), rs1:x17(0x00000001)
+ li x17, 0x1
+ zip x15, x17
+ sw x15, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00000001)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000004), rs1:x16(0x00000002)
+ li x16, 0x2
+ zip x16, x16
+ sw x16, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00000004)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000010), rs1:x15(0x00000004)
+ li x15, 0x4
+ zip x17, x15
+ sw x17, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00000010)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000040), rs1:x14(0x00000008)
+ li x14, 0x8
+ zip x18, x14
+ sw x18, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00000040)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000100), rs1:x13(0x00000010)
+ li x13, 0x10
+ zip x19, x13
+ sw x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000100)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000400), rs1:x12(0x00000020)
+ li x12, 0x20
+ zip x20, x12
+ sw x20, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000400)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00001000), rs1:x11(0x00000040)
+ li x11, 0x40
+ zip x21, x11
+ sw x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00001000)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00004000), rs1:x10(0x00000080)
+ li x10, 0x80
+ zip x22, x10
+ sw x22, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00004000)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00010000), rs1:x9(0x00000100)
+ li x9, 0x100
+ zip x23, x9
+ sw x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00010000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00040000), rs1:x8(0x00000200)
+ li x8, 0x200
+ zip x24, x8
+ sw x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00040000)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00100000), rs1:x7(0x00000400)
+ li x7, 0x400
+ zip x25, x7
+ sw x25, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00100000)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00400000), rs1:x6(0x00000800)
+ li x6, 0x800
+ zip x26, x6
+ sw x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00400000)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x01000000), rs1:x5(0x00001000)
+ li x5, 0x1000
+ zip x27, x5
+ sw x27, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x01000000)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x04000000), rs1:x4(0x00002000)
+ li x4, 0x2000
+ zip x28, x4
+ sw x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x04000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x10000000), rs1:x3(0x00004000)
+ li x3, 0x4000
+ zip x29, x3
+ sw x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x10000000)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x40000000), rs1:x2(0x00008000)
+ li x2, 0x8000
+ zip x30, x2
+ sw x30, 4(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x40000000)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000002), rs1:x1(0x00010000)
+ li x1, 0x10000
+ zip x31, x1
+ sw x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000002)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000008), rs1:x31(0x00020000)
+ li x31, 0x20000
+ zip x1, x31
+ sw x1, 12(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000008)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000020), rs1:x30(0x00040000)
+ li x30, 0x40000
+ zip x2, x30
+ sw x2, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000020)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000080), rs1:x29(0x00080000)
+ li x29, 0x80000
+ zip x3, x29
+ sw x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000080)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000200), rs1:x28(0x00100000)
+ li x28, 0x100000
+ zip x4, x28
+ sw x4, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000200)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000800), rs1:x27(0x00200000)
+ li x27, 0x200000
+ zip x5, x27
+ sw x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000800)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00002000), rs1:x26(0x00400000)
+ li x26, 0x400000
+ zip x6, x26
+ sw x6, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00002000)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00008000), rs1:x25(0x00800000)
+ li x25, 0x800000
+ zip x7, x25
+ sw x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00008000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00020000), rs1:x24(0x01000000)
+ li x24, 0x1000000
+ zip x8, x24
+ sw x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00020000)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00080000), rs1:x23(0x02000000)
+ li x23, 0x2000000
+ zip x9, x23
+ sw x9, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00080000)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00200000), rs1:x22(0x04000000)
+ li x22, 0x4000000
+ zip x10, x22
+ sw x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00200000)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00800000), rs1:x21(0x08000000)
+ li x21, 0x8000000
+ zip x11, x21
+ sw x11, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00800000)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x02000000), rs1:x20(0x10000000)
+ li x20, 0x10000000
+ zip x12, x20
+ sw x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x02000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x08000000), rs1:x19(0x20000000)
+ li x19, 0x20000000
+ zip x13, x19
+ sw x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x08000000)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x20000000), rs1:x18(0x40000000)
+ li x18, 0x40000000
+ zip x14, x18
+ sw x14, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x20000000)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x80000000), rs1:x17(0x80000000)
+ li x17, 0x80000000
+ zip x15, x17
+ sw x15, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x80000000)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000), rs1:x16(0x00000000)
+ li x16, 0x0
+ zip x16, x16
+ sw x16, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfffffffe), rs1:x15(0xfffffffe)
+ li x15, 0xfffffffe
+ zip x17, x15
+ sw x17, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xfffffffe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfffffffb), rs1:x14(0xfffffffd)
+ li x14, 0xfffffffd
+ zip x18, x14
+ sw x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xfffffffb)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffef), rs1:x13(0xfffffffb)
+ li x13, 0xfffffffb
+ zip x19, x13
+ sw x19, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xffffffef)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffbf), rs1:x12(0xfffffff7)
+ li x12, 0xfffffff7
+ zip x20, x12
+ sw x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffffffbf)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xfffffeff), rs1:x11(0xffffffef)
+ li x11, 0xffffffef
+ zip x21, x11
+ sw x21, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfffffeff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xfffffbff), rs1:x10(0xffffffdf)
+ li x10, 0xffffffdf
+ zip x22, x10
+ sw x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfffffbff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffefff), rs1:x9(0xffffffbf)
+ li x9, 0xffffffbf
+ zip x23, x9
+ sw x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffffefff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffbfff), rs1:x8(0xffffff7f)
+ li x8, 0xffffff7f
+ zip x24, x8
+ sw x24, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xffffbfff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfffeffff), rs1:x7(0xfffffeff)
+ li x7, 0xfffffeff
+ zip x25, x7
+ sw x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xfffeffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfffbffff), rs1:x6(0xfffffdff)
+ li x6, 0xfffffdff
+ zip x26, x6
+ sw x26, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfffbffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffefffff), rs1:x5(0xfffffbff)
+ li x5, 0xfffffbff
+ zip x27, x5
+ sw x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffefffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffbfffff), rs1:x4(0xfffff7ff)
+ li x4, 0xfffff7ff
+ zip x28, x4
+ sw x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0xffbfffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xfeffffff), rs1:x3(0xffffefff)
+ li x3, 0xffffefff
+ zip x29, x3
+ sw x29, 4(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0xfeffffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xfbffffff), rs1:x2(0xffffdfff)
+ li x2, 0xffffdfff
+ zip x30, x2
+ sw x30, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0xfbffffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xefffffff), rs1:x1(0xffffbfff)
+ li x1, 0xffffbfff
+ zip x31, x1
+ sw x31, 12(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xefffffff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xbfffffff), rs1:x31(0xffff7fff)
+ li x31, 0xffff7fff
+ zip x1, x31
+ sw x1, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xbfffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffffffd), rs1:x30(0xfffeffff)
+ li x30, 0xfffeffff
+ zip x2, x30
+ sw x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xfffffffd)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfffffff7), rs1:x29(0xfffdffff)
+ li x29, 0xfffdffff
+ zip x3, x29
+ sw x3, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xfffffff7)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffffdf), rs1:x28(0xfffbffff)
+ li x28, 0xfffbffff
+ zip x4, x28
+ sw x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xffffffdf)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffff7f), rs1:x27(0xfff7ffff)
+ li x27, 0xfff7ffff
+ zip x5, x27
+ sw x5, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xffffff7f)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xfffffdff), rs1:x26(0xffefffff)
+ li x26, 0xffefffff
+ zip x6, x26
+ sw x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0xfffffdff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xfffff7ff), rs1:x25(0xffdfffff)
+ li x25, 0xffdfffff
+ zip x7, x25
+ sw x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffff7ff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffffdfff), rs1:x24(0xffbfffff)
+ li x24, 0xffbfffff
+ zip x8, x24
+ sw x8, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffffdfff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffff7fff), rs1:x23(0xff7fffff)
+ li x23, 0xff7fffff
+ zip x9, x23
+ sw x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xffff7fff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfffdffff), rs1:x22(0xfeffffff)
+ li x22, 0xfeffffff
+ zip x10, x22
+ sw x10, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfffdffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xfff7ffff), rs1:x21(0xfdffffff)
+ li x21, 0xfdffffff
+ zip x11, x21
+ sw x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfff7ffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffdfffff), rs1:x20(0xfbffffff)
+ li x20, 0xfbffffff
+ zip x12, x20
+ sw x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xffdfffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xff7fffff), rs1:x19(0xf7ffffff)
+ li x19, 0xf7ffffff
+ zip x13, x19
+ sw x13, 4(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xff7fffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xfdffffff), rs1:x18(0xefffffff)
+ li x18, 0xefffffff
+ zip x14, x18
+ sw x14, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xfdffffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xf7ffffff), rs1:x17(0xdfffffff)
+ li x17, 0xdfffffff
+ zip x15, x17
+ sw x15, 12(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xf7ffffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xdfffffff), rs1:x16(0xbfffffff)
+ li x16, 0xbfffffff
+ zip x16, x16
+ sw x16, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xdfffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x7fffffff), rs1:x15(0x7fffffff)
+ li x15, 0x7fffffff
+ zip x17, x15
+ sw x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x7fffffff)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffff), rs1:x14(0xffffffff)
+ li x14, 0xffffffff
+ zip x18, x14
+ sw x18, 4(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xffffffff)
+
+ inst_142:
+ // Test 142: Test with random values
+ // result rd:x19(0x99a3e999), rs1:x13(0xadea5195)
+ li x13, 0xadea5195
+ zip x19, x13
+ sw x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x99a3e999)
+
+ inst_143:
+ // Test 143: Test with rd == x0
+ // result rd:x0(0x00000000), rs1:x12(0xd2ffbec1)
+ li x12, 0xd2ffbec1
+ zip x0, x12
+ sw x0, 12(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
+
+ inst_144:
+ // Test 144: Test with rs2 == x0
+ // result rd:x21(0xccc0ed47), rs1:x11(0xa8e1a8bb)
+ li x11, 0xa8e1a8bb
+ zip x21, x11
+ sw x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xccc0ed47)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with rs1 == x0
+ // result rd:x22(0x00000000), rs1:x0(0x48c99fcb)
+ li x0, 0x48c99fcb
+ zip x22, x0
+ sw x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 4, 0xdeadbeef
+signature_2_0:
+ .fill 5, 4, 0xdeadbeef
+signature_3_0:
+ .fill 5, 4, 0xdeadbeef
+signature_4_0:
+ .fill 5, 4, 0xdeadbeef
+signature_5_0:
+ .fill 5, 4, 0xdeadbeef
+signature_6_0:
+ .fill 5, 4, 0xdeadbeef
+signature_7_0:
+ .fill 5, 4, 0xdeadbeef
+signature_8_0:
+ .fill 5, 4, 0xdeadbeef
+signature_9_0:
+ .fill 5, 4, 0xdeadbeef
+signature_10_0:
+ .fill 5, 4, 0xdeadbeef
+signature_11_0:
+ .fill 5, 4, 0xdeadbeef
+signature_12_0:
+ .fill 5, 4, 0xdeadbeef
+signature_13_0:
+ .fill 5, 4, 0xdeadbeef
+signature_14_0:
+ .fill 5, 4, 0xdeadbeef
+signature_15_0:
+ .fill 5, 4, 0xdeadbeef
+signature_16_0:
+ .fill 5, 4, 0xdeadbeef
+signature_17_0:
+ .fill 5, 4, 0xdeadbeef
+signature_18_0:
+ .fill 5, 4, 0xdeadbeef
+signature_19_0:
+ .fill 5, 4, 0xdeadbeef
+signature_20_0:
+ .fill 5, 4, 0xdeadbeef
+signature_21_0:
+ .fill 5, 4, 0xdeadbeef
+signature_22_0:
+ .fill 5, 4, 0xdeadbeef
+signature_23_0:
+ .fill 5, 4, 0xdeadbeef
+signature_24_0:
+ .fill 5, 4, 0xdeadbeef
+signature_25_0:
+ .fill 5, 4, 0xdeadbeef
+signature_26_0:
+ .fill 5, 4, 0xdeadbeef
+signature_27_0:
+ .fill 5, 4, 0xdeadbeef
+signature_28_0:
+ .fill 5, 4, 0xdeadbeef
+signature_29_0:
+ .fill 5, 4, 0xdeadbeef
+signature_30_0:
+ .fill 5, 4, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv32i_m/M/DIV.S b/riscof/suite/rv32i_m/M/DIV.S
deleted file mode 100644
index d360c7cda6765f6bb250b5c676b133665d721891..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/M/DIV.S
+++ /dev/null
@@ -1,146 +0,0 @@
-# RISC-V Compliance Test RV32IM-DIV-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IM Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction DIV.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IM")
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*M.*); def TEST_CASE_1=True",div)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_RR_SRC2(div, x17, x18, 0xffffffff, 0x0, 0x0, x2, 0, x31)
- TEST_RR_SRC2(div, x19, x20, 0, 0x0, 0x1, x2, 4, x31)
- TEST_RR_SRC2(div, x21, x22, 0, 0x0, -0x1, x2, 8, x31)
- TEST_RR_SRC2(div, x23, x24, 0, 0x0, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(div, x25, x26, 0, 0x0, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_RR_SRC2(div, x27, x28, 0xffffffff, 0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(div, x29, x30, 0x1, 0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(div, x21, x3, 0xffffffff, 0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(div, x4, x8, 0, 0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(div, x9, x11, 0, 0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_RR_SRC2(div, x12, x13, 0xffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(div, x14, x15, 0xffffffff, -0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(div, x16, x17, 0x1, -0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(div, x18, x19, 0, -0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(div, x20, x21, 0, -0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_SRC2(div, x22, x23, 0xffffffff, 0x7fffffff, 0x0, x2, 0, x31)
- TEST_RR_SRC2(div, x24, x25, 0x7fffffff, 0x7fffffff, 0x1, x2, 4, x31)
- TEST_RR_SRC2(div, x26, x27, 0x80000001, 0x7fffffff, -0x1, x2, 8, x31)
- TEST_RR_SRC2(div, x28, x29, 0x1, 0x7fffffff, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(div, x30, x21, 0, 0x7fffffff, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_RR_SRC2(div, x3, x4, 0xffffffff, 0x80000000, 0x0, x2, 0, x31)
- TEST_RR_SRC2(div, x8, x9, 0x80000000, 0x80000000, 0x1, x2, 4, x31)
- TEST_RR_SRC2(div, x11, x12, 0x80000000, 0x80000000, -0x1, x2, 8, x31)
- TEST_RR_SRC2(div, x13, x14, 0xffffffff, 0x80000000, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(div, x15, x16, 0x1, 0x80000000, 0x80000000, x2, 16, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-test_8_res:
- .fill 5, 4, -1
-test_9_res:
- .fill 5, 4, -1
-test_10_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/DIVU.S b/riscof/suite/rv32i_m/M/DIVU.S
deleted file mode 100644
index da3a07e61d60d2c219232d5f3b7b53ad631a18dd..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/M/DIVU.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV32IM-DIVU-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IM Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction DIVU.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IM")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*M.*); def TEST_CASE_1=True", divu)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_RR_SRC2(divu, x17, x18, 0xffffffff, 0x0, 0x0, x2, 0, x31)
- TEST_RR_SRC2(divu, x19, x20, 0, 0x0, 0x1, x2, 4, x31)
- TEST_RR_SRC2(divu, x21, x22, 0, 0x0, -0x1, x2, 8, x31)
- TEST_RR_SRC2(divu, x23, x24, 0, 0x0, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(divu, x25, x26, 0, 0x0, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_RR_SRC2(divu, x27, x28, 0xffffffff, 0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(divu, x29, x30, 0x1, 0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(divu, x21, x3, 0, 0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(divu, x4, x8, 0, 0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(divu, x9, x11, 0, 0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_RR_SRC2(divu, x12, x13, 0xffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(divu, x14, x15, 0xffffffff, -0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(divu, x16, x17, 0x1, -0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(divu, x18, x19, 0x2, -0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(divu, x20, x21, 0x1, -0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_SRC2(divu, x22, x23, 0xffffffff, 0x7fffffff, 0x0, x2, 0, x31)
- TEST_RR_SRC2(divu, x24, x25, 0x7fffffff, 0x7fffffff, 0x1, x2, 4, x31)
- TEST_RR_SRC2(divu, x26, x27, 0, 0x7fffffff, -0x1, x2, 8, x31)
- TEST_RR_SRC2(divu, x28, x29, 0x1, 0x7fffffff, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(divu, x30, x21, 0, 0x7fffffff, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_RR_SRC2(divu, x3, x4, 0xffffffff, 0x80000000, 0x0, x2, 0, x31)
- TEST_RR_SRC2(divu, x8, x9, 0x80000000, 0x80000000, 0x1, x2, 4, x31)
- TEST_RR_SRC2(divu, x11, x12, 0, 0x80000000, -0x1, x2, 8, x31)
- TEST_RR_SRC2(divu, x13, x14, 0x1, 0x80000000, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(divu, x15, x16, 0x1, 0x80000000, 0x80000000, x2, 16, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-test_8_res:
- .fill 5, 4, -1
-test_9_res:
- .fill 5, 4, -1
-test_10_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/MUL.S b/riscof/suite/rv32i_m/M/MUL.S
deleted file mode 100644
index d447beb74c180ee940c6da3a1d5c5dca95889840..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/M/MUL.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV32IM-MUL-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IM Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction MUL.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IM")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*M.*); def TEST_CASE_1=True", mul)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_RR_SRC2(mul, x17, x18, 0, 0x0, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mul, x19, x20, 0, 0x0, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mul, x21, x22, 0, 0x0, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mul, x23, x24, 0, 0x0, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mul, x25, x26, 0, 0x0, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_RR_SRC2(mul, x27, x28, 0, 0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mul, x29, x30, 0x1, 0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mul, x21, x3, 0xffffffff, 0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mul, x4, x8, 0x7fffffff, 0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mul, x9, x11, 0x80000000, 0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_RR_SRC2(mul, x12, x13, 0, -0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mul, x14, x15, 0xffffffff, -0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mul, x16, x17, 0x1, -0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mul, x18, x19, 0x80000001, -0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mul, x20, x21, 0x80000000, -0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_SRC2(mul, x22, x23, 0, 0x7fffffff, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mul, x24, x25, 0x7fffffff, 0x7fffffff, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mul, x26, x27, 0x80000001, 0x7fffffff, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mul, x28, x29, 0x1, 0x7fffffff, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mul, x30, x21, 0x80000000, 0x7fffffff, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_RR_SRC2(mul, x3, x4, 0, 0x80000000, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mul, x8, x9, 0x80000000, 0x80000000, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mul, x11, x12, 0x80000000, 0x80000000, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mul, x13, x14, 0x80000000, 0x80000000, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mul, x15, x16, 0, 0x80000000, 0x80000000, x2, 16, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-test_8_res:
- .fill 5, 4, -1
-test_9_res:
- .fill 5, 4, -1
-test_10_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/MULH.S b/riscof/suite/rv32i_m/M/MULH.S
deleted file mode 100644
index 3827dec0b282d5c417b60644cc416c782f421eed..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/M/MULH.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV32IM-MULH-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IM Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction MULH.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IM")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*M.*); def TEST_CASE_1=True", mulh)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_RR_SRC2(mulh, x17, x18, 0, 0x0, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulh, x19, x20, 0, 0x0, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulh, x21, x22, 0, 0x0, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulh, x23, x24, 0, 0x0, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulh, x25, x26, 0, 0x0, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_RR_SRC2(mulh, x27, x28, 0, 0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulh, x29, x30, 0, 0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulh, x21, x3, 0xffffffff, 0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulh, x4, x8, 0, 0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulh, x9, x11, 0xffffffff, 0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_RR_SRC2(mulh, x12, x13, 0, -0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulh, x14, x15, 0xffffffff, -0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulh, x16, x17, 0, -0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulh, x18, x19, 0xffffffff, -0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulh, x20, x21, 0, -0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_SRC2(mulh, x22, x23, 0, 0x7fffffff, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulh, x24, x25, 0, 0x7fffffff, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulh, x26, x27, 0xffffffff, 0x7fffffff, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulh, x28, x29, 0x3fffffff, 0x7fffffff, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulh, x30, x21, 0xc0000000, 0x7fffffff, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_RR_SRC2(mulh, x3, x4, 0, 0x80000000, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulh, x8, x9, 0xffffffff, 0x80000000, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulh, x11, x12, 0, 0x80000000, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulh, x13, x14, 0xc0000000, 0x80000000, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulh, x15, x16, 0x40000000, 0x80000000, 0x80000000, x2, 16, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-test_8_res:
- .fill 5, 4, -1
-test_9_res:
- .fill 5, 4, -1
-test_10_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/MULHSU.S b/riscof/suite/rv32i_m/M/MULHSU.S
deleted file mode 100644
index 4157dab9b399ac81d4e858529bfe7aa61ed8c1d4..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/M/MULHSU.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV32IM-MULHSU-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IM Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction MULHSU.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IM")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*M.*); def TEST_CASE_1=True", mulhsu)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_RR_SRC2(mulhsu, x17, x18, 0, 0x0, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulhsu, x19, x20, 0, 0x0, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulhsu, x21, x22, 0, 0x0, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulhsu, x23, x24, 0, 0x0, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulhsu, x25, x26, 0, 0x0, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_RR_SRC2(mulhsu, x27, x28, 0, 0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulhsu, x29, x30, 0, 0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulhsu, x21, x3, 0, 0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulhsu, x4, x8, 0, 0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulhsu, x9, x11, 0, 0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_RR_SRC2(mulhsu, x12, x13, 0, -0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulhsu, x14, x15, 0xffffffff, -0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulhsu, x16, x17, 0xffffffff, -0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulhsu, x18, x19, 0xffffffff, -0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulhsu, x20, x21, 0xffffffff, -0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_SRC2(mulhsu, x22, x23, 0, 0x7fffffff, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulhsu, x24, x25, 0, 0x7fffffff, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulhsu, x26, x27, 0x7ffffffe, 0x7fffffff, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulhsu, x28, x29, 0x3fffffff, 0x7fffffff, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulhsu, x30, x21, 0x3fffffff, 0x7fffffff, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_RR_SRC2(mulhsu, x3, x4, 0, 0x80000000, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulhsu, x8, x9, 0xffffffff, 0x80000000, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulhsu, x11, x12, 0x80000000, 0x80000000, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulhsu, x13, x14, 0xc0000000, 0x80000000, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulhsu, x15, x16, 0xc0000000, 0x80000000, 0x80000000, x2, 16, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-test_8_res:
- .fill 5, 4, -1
-test_9_res:
- .fill 5, 4, -1
-test_10_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/MULHU.S b/riscof/suite/rv32i_m/M/MULHU.S
deleted file mode 100644
index 50248d8fa19692264cdbae9f882d8c88386aaa2d..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/M/MULHU.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV32IM-MULHU-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IM Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction MULHU.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IM")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*M.*); def TEST_CASE_1=True", mulhu)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_RR_SRC2(mulhu, x17, x18, 0, 0x0, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulhu, x19, x20, 0, 0x0, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulhu, x21, x22, 0, 0x0, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulhu, x23, x24, 0, 0x0, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulhu, x25, x26, 0, 0x0, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_RR_SRC2(mulhu, x27, x28, 0, 0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulhu, x29, x30, 0, 0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulhu, x21, x3, 0, 0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulhu, x4, x8, 0, 0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulhu, x9, x11, 0, 0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_RR_SRC2(mulhu, x12, x13, 0, -0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulhu, x14, x15, 0, -0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulhu, x16, x17, 0xfffffffe, -0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulhu, x18, x19, 0x7ffffffe, -0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulhu, x20, x21, 0x7fffffff, -0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_SRC2(mulhu, x22, x23, 0, 0x7fffffff, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulhu, x24, x25, 0, 0x7fffffff, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulhu, x26, x27, 0x7ffffffe, 0x7fffffff, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulhu, x28, x29, 0x3fffffff, 0x7fffffff, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulhu, x30, x21, 0x3fffffff, 0x7fffffff, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_RR_SRC2(mulhu, x3, x4, 0, 0x80000000, 0x0, x2, 0, x31)
- TEST_RR_SRC2(mulhu, x8, x9, 0, 0x80000000, 0x1, x2, 4, x31)
- TEST_RR_SRC2(mulhu, x11, x12, 0x7fffffff, 0x80000000, -0x1, x2, 8, x31)
- TEST_RR_SRC2(mulhu, x13, x14, 0x3fffffff, 0x80000000, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(mulhu, x15, x16, 0x40000000, 0x80000000, 0x80000000, x2, 16, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-test_8_res:
- .fill 5, 4, -1
-test_9_res:
- .fill 5, 4, -1
-test_10_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/REM.S b/riscof/suite/rv32i_m/M/REM.S
deleted file mode 100644
index 8caa48ae76fbdbdee27734f3508cc13d4ee4959c..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/M/REM.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV32IM-REM-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IM Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction REM.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IM")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*M.*); def TEST_CASE_1=True", rem)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_RR_SRC2(rem, x17, x18, 0, 0x0, 0x0, x2, 0, x31)
- TEST_RR_SRC2(rem, x19, x20, 0, 0x0, 0x1, x2, 4, x31)
- TEST_RR_SRC2(rem, x21, x22, 0, 0x0, -0x1, x2, 8, x31)
- TEST_RR_SRC2(rem, x23, x24, 0, 0x0, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(rem, x25, x26, 0, 0x0, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_RR_SRC2(rem, x27, x28, 0x1, 0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(rem, x29, x30, 0, 0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(rem, x21, x3, 0, 0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(rem, x4, x8, 0x1, 0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(rem, x9, x11, 0x1, 0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_RR_SRC2(rem, x12, x13, 0xffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(rem, x14, x15, 0, -0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(rem, x16, x17, 0, -0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(rem, x18, x19, 0xffffffff, -0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(rem, x20, x21, 0xffffffff, -0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_SRC2(rem, x22, x23, 0x7fffffff, 0x7fffffff, 0x0, x2, 0, x31)
- TEST_RR_SRC2(rem, x24, x25, 0, 0x7fffffff, 0x1, x2, 4, x31)
- TEST_RR_SRC2(rem, x26, x27, 0, 0x7fffffff, -0x1, x2, 8, x31)
- TEST_RR_SRC2(rem, x28, x29, 0, 0x7fffffff, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(rem, x30, x21, 0x7fffffff, 0x7fffffff, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_RR_SRC2(rem, x3, x4, 0x80000000, 0x80000000, 0x0, x2, 0, x31)
- TEST_RR_SRC2(rem, x8, x9, 0, 0x80000000, 0x1, x2, 4, x31)
- TEST_RR_SRC2(rem, x11, x12, 0, 0x80000000, -0x1, x2, 8, x31)
- TEST_RR_SRC2(rem, x13, x14, 0xffffffff, 0x80000000, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(rem, x15, x16, 0, 0x80000000, 0x80000000, x2, 16, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-test_8_res:
- .fill 5, 4, -1
-test_9_res:
- .fill 5, 4, -1
-test_10_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/REMU.S b/riscof/suite/rv32i_m/M/REMU.S
deleted file mode 100644
index a808dc3bc799ffd199487d5b811dc022f5134dde..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/M/REMU.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV32IM-REMU-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32IM Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction REMU.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV32IM")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*M.*); def TEST_CASE_1=True", remu)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_RR_SRC2(remu, x17, x18, 0, 0x0, 0x0, x2, 0, x31)
- TEST_RR_SRC2(remu, x19, x20, 0, 0x0, 0x1, x2, 4, x31)
- TEST_RR_SRC2(remu, x21, x22, 0, 0x0, -0x1, x2, 8, x31)
- TEST_RR_SRC2(remu, x23, x24, 0, 0x0, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(remu, x25, x26, 0, 0x0, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_RR_SRC2(remu, x27, x28, 0x1, 0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(remu, x29, x30, 0, 0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(remu, x21, x3, 0x1, 0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(remu, x4, x8, 0x1, 0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(remu, x9, x11, 0x1, 0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_RR_SRC2(remu, x12, x13, 0xffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(remu, x14, x15, 0, -0x1, 0x1, x2, 4, x31)
- TEST_RR_SRC2(remu, x16, x17, 0, -0x1, -0x1, x2, 8, x31)
- TEST_RR_SRC2(remu, x18, x19, 0x1, -0x1, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(remu, x20, x21, 0x7fffffff, -0x1, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_SRC2(remu, x22, x23, 0x7fffffff, 0x7fffffff, 0x0, x2, 0, x31)
- TEST_RR_SRC2(remu, x24, x25, 0, 0x7fffffff, 0x1, x2, 4, x31)
- TEST_RR_SRC2(remu, x26, x27, 0x7fffffff, 0x7fffffff, -0x1, x2, 8, x31)
- TEST_RR_SRC2(remu, x28, x29, 0, 0x7fffffff, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(remu, x30, x21, 0x7fffffff, 0x7fffffff, 0x80000000, x2, 16, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_RR_SRC2(remu, x3, x4, 0x80000000, 0x80000000, 0x0, x2, 0, x31)
- TEST_RR_SRC2(remu, x8, x9, 0, 0x80000000, 0x1, x2, 4, x31)
- TEST_RR_SRC2(remu, x11, x12, 0x80000000, 0x80000000, -0x1, x2, 8, x31)
- TEST_RR_SRC2(remu, x13, x14, 0x1, 0x80000000, 0x7fffffff, x2, 12, x31)
- TEST_RR_SRC2(remu, x15, x16, 0, 0x80000000, 0x80000000, x2, 16, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 4, -1
-test_2_res:
- .fill 5, 4, -1
-test_3_res:
- .fill 5, 4, -1
-test_4_res:
- .fill 5, 4, -1
-test_5_res:
- .fill 5, 4, -1
-test_6_res:
- .fill 5, 4, -1
-test_7_res:
- .fill 5, 4, -1
-test_8_res:
- .fill 5, 4, -1
-test_9_res:
- .fill 5, 4, -1
-test_10_res:
- .fill 5, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/div-01.S b/riscof/suite/rv32i_m/M/div-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..e23ac9f64dca3c95f0503bb723c48a2b9a61b39b
--- /dev/null
+++ b/riscof/suite/rv32i_m/M/div-01.S
@@ -0,0 +1,3034 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:41:59 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32im.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the div instruction of the RISC-V M extension for the div covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IM")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*M.*);def TEST_CASE_1=True;",div)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rs1 == rd != rs2, rs1==x0, rs2==x26, rd==x0, rs1_val > 0 and rs2_val > 0, rs1_val != rs2_val, rs2_val == 262144
+// opcode: div ; op1:x0; op2:x26; dest:x0; op1val:0x0; op2val:0x40000
+TEST_RR_OP(div, x0, x0, x26, 0, 0x0, 0x40000, x2, 0, x8)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x17, rs2==x17, rd==x19, rs1_val > 0 and rs2_val < 0, rs1_val == 256, rs2_val == -3
+// opcode: div ; op1:x17; op2:x17; dest:x19; op1val:0x100; op2val:0x100
+TEST_RR_OP(div, x19, x17, x17, 0x1, 0x100, 0x100, x2, 4, x8)
+
+inst_2:
+// rs2 == rd != rs1, rs1==x26, rs2==x11, rd==x11, rs1_val < 0 and rs2_val < 0, rs1_val == -8193
+// opcode: div ; op1:x26; op2:x11; dest:x11; op1val:-0x2001; op2val:-0x1
+TEST_RR_OP(div, x11, x26, x11, 0x2001, -0x2001, -0x1, x2, 8, x8)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x30, rs2==x5, rd==x18, rs1_val < 0 and rs2_val > 0, rs1_val == -17, rs2_val == 65536
+// opcode: div ; op1:x30; op2:x5; dest:x18; op1val:-0x11; op2val:0x10000
+TEST_RR_OP(div, x18, x30, x5, 0x0, -0x11, 0x10000, x2, 12, x8)
+
+inst_4:
+// rs1 == rs2 == rd, rs1==x10, rs2==x10, rd==x10, rs1_val == rs2_val, rs2_val == 524288, rs1_val == 524288
+// opcode: div ; op1:x10; op2:x10; dest:x10; op1val:0x80000; op2val:0x80000
+TEST_RR_OP(div, x10, x10, x10, 0x1, 0x80000, 0x80000, x2, 16, x8)
+
+inst_5:
+// rs1==x29, rs2==x25, rd==x16, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648, rs1_val == -257
+// opcode: div ; op1:x29; op2:x25; dest:x16; op1val:-0x101; op2val:-0x80000000
+TEST_RR_OP(div, x16, x29, x25, 0x0, -0x101, -0x80000000, x2, 20, x8)
+
+inst_6:
+// rs1==x4, rs2==x0, rd==x17, rs2_val == 0, rs1_val == 128
+// opcode: div ; op1:x4; op2:x0; dest:x17; op1val:0x80; op2val:0x0
+TEST_RR_OP(div, x17, x4, x0, 0xFFFFFFFF, 0x80, 0x0, x2, 24, x8)
+
+inst_7:
+// rs1==x31, rs2==x20, rd==x12, rs2_val == (2**(xlen-1)-1), rs2_val == 2147483647, rs1_val == 1431655765
+// opcode: div ; op1:x31; op2:x20; dest:x12; op1val:0x55555555; op2val:0x7fffffff
+TEST_RR_OP(div, x12, x31, x20, 0x0, 0x55555555, 0x7fffffff, x2, 28, x8)
+
+inst_8:
+// rs1==x13, rs2==x29, rd==x21, rs2_val == 1,
+// opcode: div ; op1:x13; op2:x29; dest:x21; op1val:-0xb503; op2val:0x1
+TEST_RR_OP(div, x21, x13, x29, 0xffff4afd, -0xb503, 0x1, x2, 32, x8)
+
+inst_9:
+// rs1==x20, rs2==x30, rd==x31, rs1_val == (-2**(xlen-1)), rs2_val == -1048577, rs1_val == -2147483648
+// opcode: div ; op1:x20; op2:x30; dest:x31; op1val:-0x80000000; op2val:-0x100001
+TEST_RR_OP(div, x31, x20, x30, 0x7ff, -0x80000000, -0x100001, x2, 36, x8)
+
+inst_10:
+// rs1==x7, rs2==x13, rd==x20, rs1_val == 0, rs2_val == -9
+// opcode: div ; op1:x7; op2:x13; dest:x20; op1val:0x0; op2val:-0x9
+TEST_RR_OP(div, x20, x7, x13, 0x0, 0x0, -0x9, x2, 40, x8)
+
+inst_11:
+// rs1==x5, rs2==x14, rd==x4, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647
+// opcode: div ; op1:x5; op2:x14; dest:x4; op1val:0x7fffffff; op2val:0x7fffffff
+TEST_RR_OP(div, x4, x5, x14, 0x1, 0x7fffffff, 0x7fffffff, x2, 44, x8)
+
+inst_12:
+// rs1==x6, rs2==x23, rd==x1, rs1_val == 1,
+// opcode: div ; op1:x6; op2:x23; dest:x1; op1val:0x1; op2val:0x5
+TEST_RR_OP(div, x1, x6, x23, 0x0, 0x1, 0x5, x2, 48, x8)
+
+inst_13:
+// rs1==x22, rs2==x6, rd==x24, rs2_val == 2, rs1_val == -5
+// opcode: div ; op1:x22; op2:x6; dest:x24; op1val:-0x5; op2val:0x2
+TEST_RR_OP(div, x24, x22, x6, 0xfffffffe, -0x5, 0x2, x2, 52, x8)
+
+inst_14:
+// rs1==x27, rs2==x24, rd==x7, rs2_val == 4,
+// opcode: div ; op1:x27; op2:x24; dest:x7; op1val:-0x8; op2val:0x4
+TEST_RR_OP(div, x7, x27, x24, 0xfffffffe, -0x8, 0x4, x2, 56, x8)
+
+inst_15:
+// rs1==x25, rs2==x9, rd==x29, rs2_val == 8,
+// opcode: div ; op1:x25; op2:x9; dest:x29; op1val:0x0; op2val:0x8
+TEST_RR_OP(div, x29, x25, x9, 0x0, 0x0, 0x8, x2, 60, x8)
+
+inst_16:
+// rs1==x28, rs2==x3, rd==x9, rs2_val == 16, rs1_val == 16384
+// opcode: div ; op1:x28; op2:x3; dest:x9; op1val:0x4000; op2val:0x10
+TEST_RR_OP(div, x9, x28, x3, 0x400, 0x4000, 0x10, x2, 64, x8)
+RVTEST_SIGBASE( x17,signature_x17_0)
+
+inst_17:
+// rs1==x21, rs2==x31, rd==x27, rs2_val == 32,
+// opcode: div ; op1:x21; op2:x31; dest:x27; op1val:0x33333332; op2val:0x20
+TEST_RR_OP(div, x27, x21, x31, 0x1999999, 0x33333332, 0x20, x17, 0, x10)
+
+inst_18:
+// rs1==x9, rs2==x1, rd==x14, rs2_val == 64,
+// opcode: div ; op1:x9; op2:x1; dest:x14; op1val:0x66666666; op2val:0x40
+TEST_RR_OP(div, x14, x9, x1, 0x1999999, 0x66666666, 0x40, x17, 4, x10)
+
+inst_19:
+// rs1==x8, rs2==x28, rd==x13, rs2_val == 128, rs1_val == 16
+// opcode: div ; op1:x8; op2:x28; dest:x13; op1val:0x10; op2val:0x80
+TEST_RR_OP(div, x13, x8, x28, 0x0, 0x10, 0x80, x17, 8, x10)
+
+inst_20:
+// rs1==x2, rs2==x15, rd==x6, rs2_val == 256,
+// opcode: div ; op1:x2; op2:x15; dest:x6; op1val:0xb505; op2val:0x100
+TEST_RR_OP(div, x6, x2, x15, 0xb5, 0xb505, 0x100, x17, 12, x10)
+
+inst_21:
+// rs1==x11, rs2==x2, rd==x5, rs2_val == 512, rs1_val == -513
+// opcode: div ; op1:x11; op2:x2; dest:x5; op1val:-0x201; op2val:0x200
+TEST_RR_OP(div, x5, x11, x2, 0xffffffff, -0x201, 0x200, x17, 16, x10)
+
+inst_22:
+// rs1==x24, rs2==x4, rd==x28, rs2_val == 1024, rs1_val == 4194304
+// opcode: div ; op1:x24; op2:x4; dest:x28; op1val:0x400000; op2val:0x400
+TEST_RR_OP(div, x28, x24, x4, 0x1000, 0x400000, 0x400, x17, 20, x10)
+
+inst_23:
+// rs1==x12, rs2==x16, rd==x22, rs2_val == 2048,
+// opcode: div ; op1:x12; op2:x16; dest:x22; op1val:-0x55555555; op2val:0x800
+TEST_RR_OP(div, x22, x12, x16, 0xfff55556, -0x55555555, 0x800, x17, 24, x10)
+
+inst_24:
+// rs1==x3, rs2==x19, rd==x15, rs2_val == 4096,
+// opcode: div ; op1:x3; op2:x19; dest:x15; op1val:0x55555556; op2val:0x1000
+TEST_RR_OP(div, x15, x3, x19, 0x55555, 0x55555556, 0x1000, x17, 28, x10)
+
+inst_25:
+// rs1==x23, rs2==x27, rd==x30, rs2_val == 8192,
+// opcode: div ; op1:x23; op2:x27; dest:x30; op1val:-0x55555555; op2val:0x2000
+TEST_RR_OP(div, x30, x23, x27, 0xfffd5556, -0x55555555, 0x2000, x17, 32, x10)
+
+inst_26:
+// rs1==x16, rs2==x12, rd==x3, rs2_val == 16384, rs1_val == 1073741824
+// opcode: div ; op1:x16; op2:x12; dest:x3; op1val:0x40000000; op2val:0x4000
+TEST_RR_OP(div, x3, x16, x12, 0x10000, 0x40000000, 0x4000, x17, 36, x10)
+
+inst_27:
+// rs1==x14, rs2==x21, rd==x2, rs2_val == 32768, rs1_val == 131072
+// opcode: div ; op1:x14; op2:x21; dest:x2; op1val:0x20000; op2val:0x8000
+TEST_RR_OP(div, x2, x14, x21, 0x4, 0x20000, 0x8000, x17, 40, x10)
+
+inst_28:
+// rs1==x15, rs2==x18, rd==x8, rs2_val == 131072,
+// opcode: div ; op1:x15; op2:x18; dest:x8; op1val:0x1; op2val:0x20000
+TEST_RR_OP(div, x8, x15, x18, 0x0, 0x1, 0x20000, x17, 44, x10)
+
+inst_29:
+// rs1==x18, rs2==x8, rd==x26, rs2_val == 1048576, rs1_val == 4
+// opcode: div ; op1:x18; op2:x8; dest:x26; op1val:0x4; op2val:0x100000
+TEST_RR_OP(div, x26, x18, x8, 0x0, 0x4, 0x100000, x17, 48, x10)
+
+inst_30:
+// rs1==x19, rs2==x7, rd==x25, rs2_val == 2097152, rs1_val == -1073741825
+// opcode: div ; op1:x19; op2:x7; dest:x25; op1val:-0x40000001; op2val:0x200000
+TEST_RR_OP(div, x25, x19, x7, 0xfffffe00, -0x40000001, 0x200000, x17, 52, x10)
+
+inst_31:
+// rs1==x1, rs2==x22, rd==x23, rs2_val == 4194304,
+// opcode: div ; op1:x1; op2:x22; dest:x23; op1val:-0xa; op2val:0x400000
+TEST_RR_OP(div, x23, x1, x22, 0x0, -0xa, 0x400000, x17, 56, x2)
+
+inst_32:
+// rs2_val == 8388608,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x800000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, 0x800000, x17, 60, x2)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_33:
+// rs2_val == 16777216,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x6; op2val:0x1000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x6, 0x1000000, x1, 0, x2)
+
+inst_34:
+// rs2_val == 33554432, rs1_val == 4096
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x2000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x1000, 0x2000000, x1, 4, x2)
+
+inst_35:
+// rs2_val == 67108864,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4000000
+TEST_RR_OP(div, x12, x10, x11, 0xc, 0x33333332, 0x4000000, x1, 8, x2)
+
+inst_36:
+// rs2_val == 134217728,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0x8000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x5, 0x8000000, x1, 12, x2)
+
+inst_37:
+// rs2_val == 268435456,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x10000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb505, 0x10000000, x1, 16, x2)
+
+inst_38:
+// rs2_val == 536870912,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x20000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x20000000, x1, 20, x2)
+
+inst_39:
+// rs2_val == 1073741824,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x40000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x40000000, x1, 24, x2)
+
+inst_40:
+// rs2_val == -2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x2
+TEST_RR_OP(div, x12, x10, x11, 0xffff0000, 0x20000, -0x2, x1, 28, x2)
+
+inst_41:
+// rs2_val == -5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:-0x5
+TEST_RR_OP(div, x12, x10, x11, 0xfffffccd, 0x1000, -0x5, x1, 32, x2)
+
+inst_42:
+// rs2_val == -17,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x11
+TEST_RR_OP(div, x12, x10, x11, 0xfcfcfcfd, 0x33333334, -0x11, x1, 36, x2)
+
+inst_43:
+// rs2_val == -33, rs1_val == -262145
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:-0x21
+TEST_RR_OP(div, x12, x10, x11, 0x1f07, -0x40001, -0x21, x1, 40, x2)
+
+inst_44:
+// rs2_val == -65, rs1_val == 268435456
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:-0x41
+TEST_RR_OP(div, x12, x10, x11, 0xffc0fc10, 0x10000000, -0x41, x1, 44, x2)
+
+inst_45:
+// rs2_val == -129, rs1_val == 32768
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x81
+TEST_RR_OP(div, x12, x10, x11, 0xffffff02, 0x8000, -0x81, x1, 48, x2)
+
+inst_46:
+// rs2_val == -257,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:-0x101
+TEST_RR_OP(div, x12, x10, x11, 0x3fc, -0x40001, -0x101, x1, 52, x2)
+
+inst_47:
+// rs2_val == -513, rs1_val == 8388608
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:-0x201
+TEST_RR_OP(div, x12, x10, x11, 0xffffc020, 0x800000, -0x201, x1, 56, x2)
+
+inst_48:
+// rs2_val == -1025,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x401
+TEST_RR_OP(div, x12, x10, x11, 0xffeaafff, 0x55555555, -0x401, x1, 60, x2)
+
+inst_49:
+// rs2_val == -2049,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x801
+TEST_RR_OP(div, x12, x10, x11, 0xffffffea, 0xb504, -0x801, x1, 64, x2)
+
+inst_50:
+// rs2_val == -4097,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000; op2val:-0x1001
+TEST_RR_OP(div, x12, x10, x11, 0x3ffc0, -0x40000000, -0x1001, x1, 68, x2)
+
+inst_51:
+// rs2_val == -8193, rs1_val == -4194305
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:-0x2001
+TEST_RR_OP(div, x12, x10, x11, 0x1ff, -0x400001, -0x2001, x1, 72, x2)
+
+inst_52:
+// rs2_val == -16385, rs1_val == 2
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x4001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, -0x4001, x1, 76, x2)
+
+inst_53:
+// rs2_val == -32769,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3fffffff; op2val:-0x8001
+TEST_RR_OP(div, x12, x10, x11, 0xffff8001, 0x3fffffff, -0x8001, x1, 80, x2)
+
+inst_54:
+// rs2_val == -65537,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000; op2val:-0x10001
+TEST_RR_OP(div, x12, x10, x11, 0x7fff, -0x80000000, -0x10001, x1, 84, x2)
+
+inst_55:
+// rs2_val == -131073, rs1_val == -2
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0x20001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x2, -0x20001, x1, 88, x2)
+
+inst_56:
+// rs2_val == -262145, rs1_val == -33554433
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:-0x40001
+TEST_RR_OP(div, x12, x10, x11, 0x7f, -0x2000001, -0x40001, x1, 92, x2)
+
+inst_57:
+// rs2_val == -524289,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x80001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, -0x80001, x1, 96, x2)
+
+inst_58:
+// rs2_val == -2097153,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000; op2val:-0x200001
+TEST_RR_OP(div, x12, x10, x11, 0x1ff, -0x40000000, -0x200001, x1, 100, x2)
+
+inst_59:
+// rs2_val == -4194305, rs1_val == -1025
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:-0x400001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x401, -0x400001, x1, 104, x2)
+
+inst_60:
+// rs2_val == -8388609, rs1_val == 32
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x800001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x20, -0x800001, x1, 108, x2)
+
+inst_61:
+// rs2_val == -16777217,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x1000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, -0x1000001, x1, 112, x2)
+
+inst_62:
+// rs2_val == -33554433,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x2000001
+TEST_RR_OP(div, x12, x10, x11, 0xffffffd6, 0x55555555, -0x2000001, x1, 116, x2)
+
+inst_63:
+// rs2_val == -67108865,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x4000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, -0x4000001, x1, 120, x2)
+
+inst_64:
+// rs2_val == -134217729, rs1_val == -16777217
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:-0x8000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x1000001, -0x8000001, x1, 124, x2)
+
+inst_65:
+// rs2_val == -268435457,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:-0x10000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x80, -0x10000001, x1, 128, x2)
+
+inst_66:
+// rs2_val == -536870913,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x1; op2val:-0x20000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x1, -0x20000001, x1, 132, x2)
+
+inst_67:
+// rs2_val == -1073741825,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xa; op2val:-0x40000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xa, -0x40000001, x1, 136, x2)
+
+inst_68:
+// rs2_val == 1431655765, rs1_val==3 and rs2_val==1431655765
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x55555555, x1, 140, x2)
+
+inst_69:
+// rs2_val == -1431655766, rs1_val == -33
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x21, -0x55555556, x1, 144, x2)
+
+inst_70:
+// rs1_val == 8,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:-0x4
+TEST_RR_OP(div, x12, x10, x11, 0xfffffffe, 0x8, -0x4, x1, 148, x2)
+
+inst_71:
+// rs1_val == 64,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0x100
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x40, 0x100, x1, 152, x2)
+
+inst_72:
+// rs1_val == 512,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:-0x11
+TEST_RR_OP(div, x12, x10, x11, 0xffffffe2, 0x200, -0x11, x1, 156, x2)
+
+inst_73:
+// rs1_val == 1024,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:0x80000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x400, 0x80000, x1, 160, x2)
+
+inst_74:
+// rs1_val == 2048,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x800, -0xb504, x1, 164, x2)
+
+inst_75:
+// rs1_val == 8192,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0x400000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2000, 0x400000, x1, 168, x2)
+
+inst_76:
+// rs1_val == 65536,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:-0x100001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x10000, -0x100001, x1, 172, x2)
+
+inst_77:
+// rs1_val == 262144,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x20000, 0x40000, 0x2, x1, 176, x2)
+
+inst_78:
+// rs1_val == 1048576,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:-0x80000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x100000, -0x80000000, x1, 180, x2)
+
+inst_79:
+// rs1_val == 2097152,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0x400
+TEST_RR_OP(div, x12, x10, x11, 0x800, 0x200000, 0x400, x1, 184, x2)
+
+inst_80:
+// rs1_val == 16777216,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x1000000, -0x55555555, x1, 188, x2)
+
+inst_81:
+// rs1_val == 33554432,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:-0x21
+TEST_RR_OP(div, x12, x10, x11, 0xfff07c20, 0x2000000, -0x21, x1, 192, x2)
+
+inst_82:
+// rs1_val == 67108864,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x4000000
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x4000000, 0x4000000, x1, 196, x2)
+
+inst_83:
+// rs1_val == 134217728,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xb50, 0x8000000, 0xb503, x1, 200, x2)
+
+inst_84:
+// rs1_val == 536870912,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x800
+TEST_RR_OP(div, x12, x10, x11, 0x40000, 0x20000000, 0x800, x1, 204, x2)
+
+inst_85:
+// rs1_val == -3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0x10000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x3, 0x10000000, x1, 208, x2)
+
+inst_86:
+// rs1_val == -9,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x200000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x9, 0x200000, x1, 212, x2)
+
+inst_87:
+// rs1_val == -65,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x40000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x41, 0x40000000, x1, 216, x2)
+
+inst_88:
+// rs1_val == -129,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x8000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x81, 0x8000000, x1, 220, x2)
+
+inst_89:
+// rs1_val == -2049,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x80000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x801, 0x80000, x1, 224, x2)
+
+inst_90:
+// rs1_val == -4097,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0xfffffd56, -0x1001, 0x6, x1, 228, x2)
+
+inst_91:
+// rs1_val == -16385,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x100
+TEST_RR_OP(div, x12, x10, x11, 0xffffffc0, -0x4001, 0x100, x1, 232, x2)
+
+inst_92:
+// rs1_val == -32769,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:-0x3
+TEST_RR_OP(div, x12, x10, x11, 0x2aab, -0x8001, -0x3, x1, 236, x2)
+
+inst_93:
+// rs1_val == -65537,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x4
+TEST_RR_OP(div, x12, x10, x11, 0x4000, -0x10001, -0x4, x1, 240, x2)
+
+inst_94:
+// rs1_val == -131073,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0xffff8000, -0x20001, 0x4, x1, 244, x2)
+
+inst_95:
+// rs1_val == -524289,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:-0x4000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x80001, -0x4000001, x1, 248, x2)
+
+inst_96:
+// rs1_val == -1048577,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:-0x21
+TEST_RR_OP(div, x12, x10, x11, 0x7c1f, -0x100001, -0x21, x1, 252, x2)
+
+inst_97:
+// rs1_val == -2097153,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:-0x8001
+TEST_RR_OP(div, x12, x10, x11, 0x3f, -0x200001, -0x8001, x1, 256, x2)
+
+inst_98:
+// rs1_val == -8388609,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:-0x8000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x800001, -0x8000001, x1, 260, x2)
+
+inst_99:
+// rs1_val == -67108865,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:-0x21
+TEST_RR_OP(div, x12, x10, x11, 0x1f07c1, -0x4000001, -0x21, x1, 264, x2)
+
+inst_100:
+// rs1_val == -134217729,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x20000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x8000001, 0x20000000, x1, 268, x2)
+
+inst_101:
+// rs1_val == -268435457,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:-0x201
+TEST_RR_OP(div, x12, x10, x11, 0x7fc01, -0x10000001, -0x201, x1, 272, x2)
+
+inst_102:
+// rs1_val == -536870913,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x800000
+TEST_RR_OP(div, x12, x10, x11, 0xffffffc0, -0x20000001, 0x800000, x1, 276, x2)
+
+inst_103:
+// rs1_val == -1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1c71c71c, -0x55555556, -0x3, x1, 280, x2)
+
+inst_104:
+// rs1_val==3 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x3, 0x3, x1, 284, x2)
+
+inst_105:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, -0x55555556, x1, 288, x2)
+
+inst_106:
+// rs1_val==3 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x5, x1, 292, x2)
+
+inst_107:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x33333333, x1, 296, x2)
+
+inst_108:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x66666666, x1, 300, x2)
+
+inst_109:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, -0xb504, x1, 304, x2)
+
+inst_110:
+// rs1_val==3 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0xb504, x1, 308, x2)
+
+inst_111:
+// rs1_val==3 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x3, 0x2, x1, 312, x2)
+
+inst_112:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x55555554, x1, 316, x2)
+
+inst_113:
+// rs1_val==3 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x3, 0x0, x1, 320, x2)
+
+inst_114:
+// rs1_val==3 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x4, x1, 324, x2)
+
+inst_115:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x33333332, x1, 328, x2)
+
+inst_116:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x66666665, x1, 332, x2)
+
+inst_117:
+// rs1_val==3 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0xb503, x1, 336, x2)
+
+inst_118:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x55555556, x1, 340, x2)
+
+inst_119:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, -0x55555555, x1, 344, x2)
+
+inst_120:
+// rs1_val==3 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x6, x1, 348, x2)
+
+inst_121:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x33333334, x1, 352, x2)
+
+inst_122:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x66666667, x1, 356, x2)
+
+inst_123:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, -0xb503, x1, 360, x2)
+
+inst_124:
+// rs1_val==3 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0xb505, x1, 364, x2)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1c71c71c, 0x55555555, 0x3, x1, 368, x2)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555555, 0x55555555, x1, 372, x2)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555555, -0x55555556, x1, 376, x2)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x11111111, 0x55555555, 0x5, x1, 380, x2)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555555, 0x33333333, x1, 384, x2)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555555, 0x66666666, x1, 388, x2)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffff8752, 0x55555555, -0xb504, x1, 392, x2)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x78ae, 0x55555555, 0xb504, x1, 396, x2)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x2aaaaaaa, 0x55555555, 0x2, x1, 400, x2)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555555, 0x55555554, x1, 404, x2)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x55555555, 0x0, x1, 408, x2)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x15555555, 0x55555555, 0x4, x1, 412, x2)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555555, 0x33333332, x1, 416, x2)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555555, 0x66666665, x1, 420, x2)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x78af, 0x55555555, 0xb503, x1, 424, x2)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555555, 0x55555556, x1, 428, x2)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0x55555555, -0x55555555, x1, 432, x2)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0xe38e38e, 0x55555555, 0x6, x1, 436, x2)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555555, 0x33333334, x1, 440, x2)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555555, 0x66666667, x1, 444, x2)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffff8751, 0x55555555, -0xb503, x1, 448, x2)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x78ad, 0x55555555, 0xb505, x1, 452, x2)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0xe38e38e4, -0x55555556, 0x3, x1, 456, x2)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0x55555556, 0x55555555, x1, 460, x2)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0x55555556, -0x55555556, x1, 464, x2)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0xeeeeeeef, -0x55555556, 0x5, x1, 468, x2)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0x55555556, 0x33333333, x1, 472, x2)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x55555556, 0x66666666, x1, 476, x2)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x78ae, -0x55555556, -0xb504, x1, 480, x2)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffff8752, -0x55555556, 0xb504, x1, 484, x2)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0xd5555555, -0x55555556, 0x2, x1, 488, x2)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0x55555556, 0x55555554, x1, 492, x2)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, -0x55555556, 0x0, x1, 496, x2)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0xeaaaaaab, -0x55555556, 0x4, x1, 500, x2)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0x55555556, 0x33333332, x1, 504, x2)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x55555556, 0x66666665, x1, 508, x2)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffff8751, -0x55555556, 0xb503, x1, 512, x2)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0x55555556, 0x55555556, x1, 516, x2)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0x55555556, -0x55555555, x1, 520, x2)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0xf1c71c72, -0x55555556, 0x6, x1, 524, x2)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0x55555556, 0x33333334, x1, 528, x2)
+
+inst_166:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x55555556, 0x66666667, x1, 532, x2)
+
+inst_167:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x78af, -0x55555556, -0xb503, x1, 536, x2)
+
+inst_168:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0xffff8753, -0x55555556, 0xb505, x1, 540, x2)
+
+inst_169:
+// rs1_val==5 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5, 0x3, x1, 544, x2)
+
+inst_170:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x55555555, x1, 548, x2)
+
+inst_171:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, -0x55555556, x1, 552, x2)
+
+inst_172:
+// rs1_val==5 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5, 0x5, x1, 556, x2)
+
+inst_173:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x33333333, x1, 560, x2)
+
+inst_174:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x66666666, x1, 564, x2)
+
+inst_175:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, -0xb504, x1, 568, x2)
+
+inst_176:
+// rs1_val==5 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0xb504, x1, 572, x2)
+
+inst_177:
+// rs1_val==5 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x5, 0x2, x1, 576, x2)
+
+inst_178:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x55555554, x1, 580, x2)
+
+inst_179:
+// rs1_val==5 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x5, 0x0, x1, 584, x2)
+
+inst_180:
+// rs1_val==5 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5, 0x4, x1, 588, x2)
+
+inst_181:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x33333332, x1, 592, x2)
+
+inst_182:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x66666665, x1, 596, x2)
+
+inst_183:
+// rs1_val==5 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0xb503, x1, 600, x2)
+
+inst_184:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x55555556, x1, 604, x2)
+
+inst_185:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, -0x55555555, x1, 608, x2)
+
+inst_186:
+// rs1_val==5 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x6, x1, 612, x2)
+
+inst_187:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x33333334, x1, 616, x2)
+
+inst_188:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x66666667, x1, 620, x2)
+
+inst_189:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, -0xb503, x1, 624, x2)
+
+inst_190:
+// rs1_val==5 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0xb505, x1, 628, x2)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x11111111, 0x33333333, 0x3, x1, 632, x2)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333333, 0x55555555, x1, 636, x2)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333333, -0x55555556, x1, 640, x2)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0xa3d70a3, 0x33333333, 0x5, x1, 644, x2)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x33333333, 0x33333333, x1, 648, x2)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333333, 0x66666666, x1, 652, x2)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffffb798, 0x33333333, -0xb504, x1, 656, x2)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x4868, 0x33333333, 0xb504, x1, 660, x2)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x19999999, 0x33333333, 0x2, x1, 664, x2)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333333, 0x55555554, x1, 668, x2)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x33333333, 0x0, x1, 672, x2)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0xccccccc, 0x33333333, 0x4, x1, 676, x2)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x33333333, 0x33333332, x1, 680, x2)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333333, 0x66666665, x1, 684, x2)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x4869, 0x33333333, 0xb503, x1, 688, x2)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333333, 0x55555556, x1, 692, x2)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333333, -0x55555555, x1, 696, x2)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x8888888, 0x33333333, 0x6, x1, 700, x2)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333333, 0x33333334, x1, 704, x2)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333333, 0x66666667, x1, 708, x2)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffffb797, 0x33333333, -0xb503, x1, 712, x2)
+
+inst_212:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x4868, 0x33333333, 0xb505, x1, 716, x2)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x22222222, 0x66666666, 0x3, x1, 720, x2)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666666, 0x55555555, x1, 724, x2)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0x66666666, -0x55555556, x1, 728, x2)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x147ae147, 0x66666666, 0x5, x1, 732, x2)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x66666666, 0x33333333, x1, 736, x2)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666666, 0x66666666, x1, 740, x2)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffff6f2f, 0x66666666, -0xb504, x1, 744, x2)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x90d1, 0x66666666, 0xb504, x1, 748, x2)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x33333333, 0x66666666, 0x2, x1, 752, x2)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666666, 0x55555554, x1, 756, x2)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x66666666, 0x0, x1, 760, x2)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x19999999, 0x66666666, 0x4, x1, 764, x2)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x66666666, 0x33333332, x1, 768, x2)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666666, 0x66666665, x1, 772, x2)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x90d2, 0x66666666, 0xb503, x1, 776, x2)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666666, 0x55555556, x1, 780, x2)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0x66666666, -0x55555555, x1, 784, x2)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x11111111, 0x66666666, 0x6, x1, 788, x2)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666666, 0x33333334, x1, 792, x2)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x66666666, 0x66666667, x1, 796, x2)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffff6f2e, 0x66666666, -0xb503, x1, 800, x2)
+
+inst_234:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x90d0, 0x66666666, 0xb505, x1, 804, x2)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0xffffc3aa, -0xb504, 0x3, x1, 808, x2)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504, 0x55555555, x1, 812, x2)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504, -0x55555556, x1, 816, x2)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0xffffdbcc, -0xb504, 0x5, x1, 820, x2)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504, 0x33333333, x1, 824, x2)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504, 0x66666666, x1, 828, x2)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0xb504, -0xb504, x1, 832, x2)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0xb504, 0xb504, x1, 836, x2)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0xffffa57e, -0xb504, 0x2, x1, 840, x2)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504, 0x55555554, x1, 844, x2)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, -0xb504, 0x0, x1, 848, x2)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0xffffd2bf, -0xb504, 0x4, x1, 852, x2)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504, 0x33333332, x1, 856, x2)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504, 0x66666665, x1, 860, x2)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0xb504, 0xb503, x1, 864, x2)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504, 0x55555556, x1, 868, x2)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504, -0x55555555, x1, 872, x2)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0xffffe1d5, -0xb504, 0x6, x1, 876, x2)
+
+inst_253:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504, 0x33333334, x1, 880, x2)
+
+inst_254:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504, 0x66666667, x1, 884, x2)
+
+inst_255:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0xb504, -0xb503, x1, 888, x2)
+
+inst_256:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504, 0xb505, x1, 892, x2)
+
+inst_257:
+// rs1_val==46340 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x3c56, 0xb504, 0x3, x1, 896, x2)
+
+inst_258:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504, 0x55555555, x1, 900, x2)
+
+inst_259:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504, -0x55555556, x1, 904, x2)
+
+inst_260:
+// rs1_val==46340 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x2434, 0xb504, 0x5, x1, 908, x2)
+
+inst_261:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504, 0x33333333, x1, 912, x2)
+
+inst_262:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504, 0x66666666, x1, 916, x2)
+
+inst_263:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0xb504, -0xb504, x1, 920, x2)
+
+inst_264:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0xb504, 0xb504, x1, 924, x2)
+
+inst_265:
+// rs1_val==46340 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x5a82, 0xb504, 0x2, x1, 928, x2)
+
+inst_266:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504, 0x55555554, x1, 932, x2)
+
+inst_267:
+// rs1_val==46340 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0xb504, 0x0, x1, 936, x2)
+
+inst_268:
+// rs1_val==46340 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x2d41, 0xb504, 0x4, x1, 940, x2)
+
+inst_269:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504, 0x33333332, x1, 944, x2)
+
+inst_270:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504, 0x66666665, x1, 948, x2)
+
+inst_271:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0xb504, 0xb503, x1, 952, x2)
+
+inst_272:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504, 0x55555556, x1, 956, x2)
+
+inst_273:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504, -0x55555555, x1, 960, x2)
+
+inst_274:
+// rs1_val==46340 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x1e2b, 0xb504, 0x6, x1, 964, x2)
+
+inst_275:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504, 0x33333334, x1, 968, x2)
+
+inst_276:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504, 0x66666667, x1, 972, x2)
+
+inst_277:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0xb504, -0xb503, x1, 976, x2)
+
+inst_278:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504, 0xb505, x1, 980, x2)
+
+inst_279:
+// rs1_val==2 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x3, x1, 984, x2)
+
+inst_280:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x55555555, x1, 988, x2)
+
+inst_281:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, -0x55555556, x1, 992, x2)
+
+inst_282:
+// rs1_val==2 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x5, x1, 996, x2)
+
+inst_283:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x33333333, x1, 1000, x2)
+
+inst_284:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x66666666, x1, 1004, x2)
+
+inst_285:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, -0xb504, x1, 1008, x2)
+
+inst_286:
+// rs1_val==2 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0xb504, x1, 1012, x2)
+
+inst_287:
+// rs1_val==2 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x2, 0x2, x1, 1016, x2)
+
+inst_288:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x55555554, x1, 1020, x2)
+
+inst_289:
+// rs1_val==2 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x2, 0x0, x1, 1024, x2)
+
+inst_290:
+// rs1_val==2 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x4, x1, 1028, x2)
+
+inst_291:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x33333332, x1, 1032, x2)
+
+inst_292:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x66666665, x1, 1036, x2)
+
+inst_293:
+// rs1_val==2 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0xb503, x1, 1040, x2)
+
+inst_294:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x55555556, x1, 1044, x2)
+
+inst_295:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, -0x55555555, x1, 1048, x2)
+
+inst_296:
+// rs1_val==2 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x6, x1, 1052, x2)
+
+inst_297:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x33333334, x1, 1056, x2)
+
+inst_298:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x66666667, x1, 1060, x2)
+
+inst_299:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, -0xb503, x1, 1064, x2)
+
+inst_300:
+// rs1_val==2 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0xb505, x1, 1068, x2)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1c71c71c, 0x55555554, 0x3, x1, 1072, x2)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555554, 0x55555555, x1, 1076, x2)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555554, -0x55555556, x1, 1080, x2)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x11111110, 0x55555554, 0x5, x1, 1084, x2)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555554, 0x33333333, x1, 1088, x2)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555554, 0x66666666, x1, 1092, x2)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffff8752, 0x55555554, -0xb504, x1, 1096, x2)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x78ae, 0x55555554, 0xb504, x1, 1100, x2)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x2aaaaaaa, 0x55555554, 0x2, x1, 1104, x2)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555554, 0x55555554, x1, 1108, x2)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x55555554, 0x0, x1, 1112, x2)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x15555555, 0x55555554, 0x4, x1, 1116, x2)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555554, 0x33333332, x1, 1120, x2)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555554, 0x66666665, x1, 1124, x2)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x78af, 0x55555554, 0xb503, x1, 1128, x2)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555554, 0x55555556, x1, 1132, x2)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555554, -0x55555555, x1, 1136, x2)
+
+inst_318:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0xe38e38e, 0x55555554, 0x6, x1, 1140, x2)
+
+inst_319:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555554, 0x33333334, x1, 1144, x2)
+
+inst_320:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555554, 0x66666667, x1, 1148, x2)
+
+inst_321:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffff8751, 0x55555554, -0xb503, x1, 1152, x2)
+
+inst_322:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x78ad, 0x55555554, 0xb505, x1, 1156, x2)
+
+inst_323:
+// rs1_val==0 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x3, x1, 1160, x2)
+
+inst_324:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x55555555, x1, 1164, x2)
+
+inst_325:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, -0x55555556, x1, 1168, x2)
+
+inst_326:
+// rs1_val==0 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x5, x1, 1172, x2)
+
+inst_327:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x33333333, x1, 1176, x2)
+
+inst_328:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x66666666, x1, 1180, x2)
+
+inst_329:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, -0xb504, x1, 1184, x2)
+
+inst_330:
+// rs1_val==0 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0xb504, x1, 1188, x2)
+
+inst_331:
+// rs1_val==0 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x2, x1, 1192, x2)
+
+inst_332:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0x55555555, -0x55555555, x1, 1196, x2)
+
+inst_333:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0xf1c71c72, -0x55555555, 0x6, x1, 1200, x2)
+
+inst_334:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0x55555555, 0x33333334, x1, 1204, x2)
+
+inst_335:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x55555555, 0x66666667, x1, 1208, x2)
+
+inst_336:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x78af, -0x55555555, -0xb503, x1, 1212, x2)
+
+inst_337:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0xffff8753, -0x55555555, 0xb505, x1, 1216, x2)
+
+inst_338:
+// rs1_val==6 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x6, 0x3, x1, 1220, x2)
+
+inst_339:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x55555555, x1, 1224, x2)
+
+inst_340:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, -0x55555556, x1, 1228, x2)
+
+inst_341:
+// rs1_val==6 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6, 0x5, x1, 1232, x2)
+
+inst_342:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x33333333, x1, 1236, x2)
+
+inst_343:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x66666666, x1, 1240, x2)
+
+inst_344:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, -0xb504, x1, 1244, x2)
+
+inst_345:
+// rs1_val==6 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0xb504, x1, 1248, x2)
+
+inst_346:
+// rs1_val==6 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x3, 0x6, 0x2, x1, 1252, x2)
+
+inst_347:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x55555554, x1, 1256, x2)
+
+inst_348:
+// rs1_val==6 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x6, 0x0, x1, 1260, x2)
+
+inst_349:
+// rs1_val==6 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6, 0x4, x1, 1264, x2)
+
+inst_350:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x33333332, x1, 1268, x2)
+
+inst_351:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x66666665, x1, 1272, x2)
+
+inst_352:
+// rs1_val==6 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0xb503, x1, 1276, x2)
+
+inst_353:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x55555556, x1, 1280, x2)
+
+inst_354:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, -0x55555555, x1, 1284, x2)
+
+inst_355:
+// rs1_val==6 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6, 0x6, x1, 1288, x2)
+
+inst_356:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x33333334, x1, 1292, x2)
+
+inst_357:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x66666667, x1, 1296, x2)
+
+inst_358:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, -0xb503, x1, 1300, x2)
+
+inst_359:
+// rs1_val==6 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0xb505, x1, 1304, x2)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x11111111, 0x33333334, 0x3, x1, 1308, x2)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333334, 0x55555555, x1, 1312, x2)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333334, -0x55555556, x1, 1316, x2)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0xa3d70a4, 0x33333334, 0x5, x1, 1320, x2)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x33333334, 0x33333333, x1, 1324, x2)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333334, 0x66666666, x1, 1328, x2)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffffb798, 0x33333334, -0xb504, x1, 1332, x2)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x4868, 0x33333334, 0xb504, x1, 1336, x2)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x1999999a, 0x33333334, 0x2, x1, 1340, x2)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333334, 0x55555554, x1, 1344, x2)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x33333334, 0x0, x1, 1348, x2)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0xccccccd, 0x33333334, 0x4, x1, 1352, x2)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x33333334, 0x33333332, x1, 1356, x2)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333334, 0x66666665, x1, 1360, x2)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x4869, 0x33333334, 0xb503, x1, 1364, x2)
+
+inst_375:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333334, 0x55555556, x1, 1368, x2)
+
+inst_376:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333334, -0x55555555, x1, 1372, x2)
+
+inst_377:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x8888888, 0x33333334, 0x6, x1, 1376, x2)
+
+inst_378:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x33333334, 0x33333334, x1, 1380, x2)
+
+inst_379:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333334, 0x66666667, x1, 1384, x2)
+
+inst_380:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffffb797, 0x33333334, -0xb503, x1, 1388, x2)
+
+inst_381:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x4868, 0x33333334, 0xb505, x1, 1392, x2)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x22222222, 0x66666667, 0x3, x1, 1396, x2)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666667, 0x55555555, x1, 1400, x2)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0x66666667, -0x55555556, x1, 1404, x2)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x147ae147, 0x66666667, 0x5, x1, 1408, x2)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x66666667, 0x33333333, x1, 1412, x2)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666667, 0x66666666, x1, 1416, x2)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffff6f2f, 0x66666667, -0xb504, x1, 1420, x2)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x90d1, 0x66666667, 0xb504, x1, 1424, x2)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x33333333, 0x66666667, 0x2, x1, 1428, x2)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666667, 0x55555554, x1, 1432, x2)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x66666667, 0x0, x1, 1436, x2)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x19999999, 0x66666667, 0x4, x1, 1440, x2)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x66666667, 0x33333332, x1, 1444, x2)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666667, 0x66666665, x1, 1448, x2)
+
+inst_396:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x90d2, 0x66666667, 0xb503, x1, 1452, x2)
+
+inst_397:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666667, 0x55555556, x1, 1456, x2)
+
+inst_398:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0x66666667, -0x55555555, x1, 1460, x2)
+
+inst_399:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x11111111, 0x66666667, 0x6, x1, 1464, x2)
+
+inst_400:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666667, 0x33333334, x1, 1468, x2)
+
+inst_401:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666667, 0x66666667, x1, 1472, x2)
+
+inst_402:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffff6f2e, 0x66666667, -0xb503, x1, 1476, x2)
+
+inst_403:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x90d0, 0x66666667, 0xb505, x1, 1480, x2)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0xffffc3aa, -0xb503, 0x3, x1, 1484, x2)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, 0x55555555, x1, 1488, x2)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, -0x55555556, x1, 1492, x2)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0xffffdbcd, -0xb503, 0x5, x1, 1496, x2)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, 0x33333333, x1, 1500, x2)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, 0x66666666, x1, 1504, x2)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, -0xb504, x1, 1508, x2)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, 0xb504, x1, 1512, x2)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0xffffa57f, -0xb503, 0x2, x1, 1516, x2)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, 0x55555554, x1, 1520, x2)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, -0xb503, 0x0, x1, 1524, x2)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0xffffd2c0, -0xb503, 0x4, x1, 1528, x2)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, 0x33333332, x1, 1532, x2)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, 0x66666665, x1, 1536, x2)
+
+inst_418:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0xb503, 0xb503, x1, 1540, x2)
+
+inst_419:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, 0x55555556, x1, 1544, x2)
+
+inst_420:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, -0x55555555, x1, 1548, x2)
+
+inst_421:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0xffffe1d5, -0xb503, 0x6, x1, 1552, x2)
+
+inst_422:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, 0x33333334, x1, 1556, x2)
+
+inst_423:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, 0x66666667, x1, 1560, x2)
+
+inst_424:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0xb503, -0xb503, x1, 1564, x2)
+
+inst_425:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb503, 0xb505, x1, 1568, x2)
+
+inst_426:
+// rs1_val==46341 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x3c57, 0xb505, 0x3, x1, 1572, x2)
+
+inst_427:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb505, 0x55555555, x1, 1576, x2)
+
+inst_428:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb505, -0x55555556, x1, 1580, x2)
+
+inst_429:
+// rs1_val==46341 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x2434, 0xb505, 0x5, x1, 1584, x2)
+
+inst_430:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb505, 0x33333333, x1, 1588, x2)
+
+inst_431:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb505, 0x66666666, x1, 1592, x2)
+
+inst_432:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0xb505, -0xb504, x1, 1596, x2)
+
+inst_433:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0xb505, 0xb504, x1, 1600, x2)
+
+inst_434:
+// rs1_val==46341 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x5a82, 0xb505, 0x2, x1, 1604, x2)
+
+inst_435:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb505, 0x55555554, x1, 1608, x2)
+
+inst_436:
+// rs1_val==46341 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0xb505, 0x0, x1, 1612, x2)
+
+inst_437:
+// rs1_val==46341 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x2d41, 0xb505, 0x4, x1, 1616, x2)
+
+inst_438:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb505, 0x33333332, x1, 1620, x2)
+
+inst_439:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb505, 0x66666665, x1, 1624, x2)
+
+inst_440:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0xb505, 0xb503, x1, 1628, x2)
+
+inst_441:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb505, 0x55555556, x1, 1632, x2)
+
+inst_442:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb505, -0x55555555, x1, 1636, x2)
+
+inst_443:
+// rs1_val==46341 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x1e2b, 0xb505, 0x6, x1, 1640, x2)
+
+inst_444:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb505, 0x33333334, x1, 1644, x2)
+
+inst_445:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb505, 0x66666667, x1, 1648, x2)
+
+inst_446:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0xb505, -0xb503, x1, 1652, x2)
+
+inst_447:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0xb505, 0xb505, x1, 1656, x2)
+
+inst_448:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x55555554, x1, 1660, x2)
+
+inst_449:
+// rs1_val==0 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x0, 0x0, x1, 1664, x2)
+
+inst_450:
+// rs1_val==0 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x4, x1, 1668, x2)
+
+inst_451:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x33333332, x1, 1672, x2)
+
+inst_452:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x66666665, x1, 1676, x2)
+
+inst_453:
+// rs1_val==0 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0xb503, x1, 1680, x2)
+
+inst_454:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x55555556, x1, 1684, x2)
+
+inst_455:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, -0x55555555, x1, 1688, x2)
+
+inst_456:
+// rs1_val==0 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x6, x1, 1692, x2)
+
+inst_457:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x33333334, x1, 1696, x2)
+
+inst_458:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x66666667, x1, 1700, x2)
+
+inst_459:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, -0xb503, x1, 1704, x2)
+
+inst_460:
+// rs1_val==0 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0xb505, x1, 1708, x2)
+
+inst_461:
+// rs1_val==4 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x4, 0x3, x1, 1712, x2)
+
+inst_462:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x55555555, x1, 1716, x2)
+
+inst_463:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, -0x55555556, x1, 1720, x2)
+
+inst_464:
+// rs1_val==4 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x5, x1, 1724, x2)
+
+inst_465:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x33333333, x1, 1728, x2)
+
+inst_466:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x66666666, x1, 1732, x2)
+
+inst_467:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, -0xb504, x1, 1736, x2)
+
+inst_468:
+// rs1_val==4 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0xb504, x1, 1740, x2)
+
+inst_469:
+// rs1_val==4 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x4, 0x2, x1, 1744, x2)
+
+inst_470:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x55555554, x1, 1748, x2)
+
+inst_471:
+// rs1_val==4 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x4, 0x0, x1, 1752, x2)
+
+inst_472:
+// rs1_val==4 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x4, 0x4, x1, 1756, x2)
+
+inst_473:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x33333332, x1, 1760, x2)
+
+inst_474:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x66666665, x1, 1764, x2)
+
+inst_475:
+// rs1_val==4 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0xb503, x1, 1768, x2)
+
+inst_476:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x55555556, x1, 1772, x2)
+
+inst_477:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, -0x55555555, x1, 1776, x2)
+
+inst_478:
+// rs1_val==4 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x6, x1, 1780, x2)
+
+inst_479:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x33333334, x1, 1784, x2)
+
+inst_480:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x66666667, x1, 1788, x2)
+
+inst_481:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, -0xb503, x1, 1792, x2)
+
+inst_482:
+// rs1_val==4 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0xb505, x1, 1796, x2)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x11111110, 0x33333332, 0x3, x1, 1800, x2)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333332, 0x55555555, x1, 1804, x2)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333332, -0x55555556, x1, 1808, x2)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0xa3d70a3, 0x33333332, 0x5, x1, 1812, x2)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333332, 0x33333333, x1, 1816, x2)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333332, 0x66666666, x1, 1820, x2)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffffb798, 0x33333332, -0xb504, x1, 1824, x2)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x4868, 0x33333332, 0xb504, x1, 1828, x2)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x19999999, 0x33333332, 0x2, x1, 1832, x2)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333332, 0x55555554, x1, 1836, x2)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x33333332, 0x0, x1, 1840, x2)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0xccccccc, 0x33333332, 0x4, x1, 1844, x2)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x33333332, 0x33333332, x1, 1848, x2)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333332, 0x66666665, x1, 1852, x2)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x4869, 0x33333332, 0xb503, x1, 1856, x2)
+
+inst_498:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333332, 0x55555556, x1, 1860, x2)
+
+inst_499:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333332, -0x55555555, x1, 1864, x2)
+
+inst_500:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x8888888, 0x33333332, 0x6, x1, 1868, x2)
+
+inst_501:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333332, 0x33333334, x1, 1872, x2)
+
+inst_502:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x33333332, 0x66666667, x1, 1876, x2)
+
+inst_503:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffffb797, 0x33333332, -0xb503, x1, 1880, x2)
+
+inst_504:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x4868, 0x33333332, 0xb505, x1, 1884, x2)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x22222221, 0x66666665, 0x3, x1, 1888, x2)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666665, 0x55555555, x1, 1892, x2)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0x66666665, -0x55555556, x1, 1896, x2)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x147ae147, 0x66666665, 0x5, x1, 1900, x2)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666665, 0x33333333, x1, 1904, x2)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x66666665, 0x66666666, x1, 1908, x2)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffff6f2f, 0x66666665, -0xb504, x1, 1912, x2)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x90d1, 0x66666665, 0xb504, x1, 1916, x2)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x33333332, 0x66666665, 0x2, x1, 1920, x2)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666665, 0x55555554, x1, 1924, x2)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x66666665, 0x0, x1, 1928, x2)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x19999999, 0x66666665, 0x4, x1, 1932, x2)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x66666665, 0x33333332, x1, 1936, x2)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666665, 0x66666665, x1, 1940, x2)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x90d2, 0x66666665, 0xb503, x1, 1944, x2)
+
+inst_520:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666665, 0x55555556, x1, 1948, x2)
+
+inst_521:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0x66666665, -0x55555555, x1, 1952, x2)
+
+inst_522:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x11111110, 0x66666665, 0x6, x1, 1956, x2)
+
+inst_523:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x66666665, 0x33333334, x1, 1960, x2)
+
+inst_524:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x66666665, 0x66666667, x1, 1964, x2)
+
+inst_525:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffff6f2e, 0x66666665, -0xb503, x1, 1968, x2)
+
+inst_526:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x90d0, 0x66666665, 0xb505, x1, 1972, x2)
+
+inst_527:
+// rs1_val==46339 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x3c56, 0xb503, 0x3, x1, 1976, x2)
+
+inst_528:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, 0x55555555, x1, 1980, x2)
+
+inst_529:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, -0x55555556, x1, 1984, x2)
+
+inst_530:
+// rs1_val==46339 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x2433, 0xb503, 0x5, x1, 1988, x2)
+
+inst_531:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, 0x33333333, x1, 1992, x2)
+
+inst_532:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, 0x66666666, x1, 1996, x2)
+
+inst_533:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, -0xb504, x1, 2000, x2)
+
+inst_534:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, 0xb504, x1, 2004, x2)
+
+inst_535:
+// rs1_val==46339 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x5a81, 0xb503, 0x2, x1, 2008, x2)
+
+inst_536:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, 0x55555554, x1, 2012, x2)
+
+inst_537:
+// rs1_val==46339 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0xb503, 0x0, x1, 2016, x2)
+
+inst_538:
+// rs1_val==46339 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x2d40, 0xb503, 0x4, x1, 2020, x2)
+
+inst_539:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, 0x33333332, x1, 2024, x2)
+
+inst_540:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, 0x66666665, x1, 2028, x2)
+
+inst_541:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0xb503, 0xb503, x1, 2032, x2)
+
+inst_542:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, 0x55555556, x1, 2036, x2)
+
+inst_543:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, -0x55555555, x1, 2040, x2)
+
+inst_544:
+// rs1_val==46339 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x1e2b, 0xb503, 0x6, x1, 2044, x2)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_545:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, 0x33333334, x1, 0, x2)
+
+inst_546:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, 0x66666667, x1, 4, x2)
+
+inst_547:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0xb503, -0xb503, x1, 8, x2)
+
+inst_548:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb503, 0xb505, x1, 12, x2)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1c71c71c, 0x55555556, 0x3, x1, 16, x2)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555556, 0x55555555, x1, 20, x2)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0x55555556, -0x55555556, x1, 24, x2)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x11111111, 0x55555556, 0x5, x1, 28, x2)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555556, 0x33333333, x1, 32, x2)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555556, 0x66666666, x1, 36, x2)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffff8752, 0x55555556, -0xb504, x1, 40, x2)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x78ae, 0x55555556, 0xb504, x1, 44, x2)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x2aaaaaab, 0x55555556, 0x2, x1, 48, x2)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555556, 0x55555554, x1, 52, x2)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, 0x55555556, 0x0, x1, 56, x2)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x15555555, 0x55555556, 0x4, x1, 60, x2)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555556, 0x33333332, x1, 64, x2)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555556, 0x66666665, x1, 68, x2)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0x78af, 0x55555556, 0xb503, x1, 72, x2)
+
+inst_564:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555556, 0x55555556, x1, 76, x2)
+
+inst_565:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, 0x55555556, -0x55555555, x1, 80, x2)
+
+inst_566:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0xe38e38e, 0x55555556, 0x6, x1, 84, x2)
+
+inst_567:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x55555556, 0x33333334, x1, 88, x2)
+
+inst_568:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x55555556, 0x66666667, x1, 92, x2)
+
+inst_569:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffff8751, 0x55555556, -0xb503, x1, 96, x2)
+
+inst_570:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(div, x12, x10, x11, 0x78ad, 0x55555556, 0xb505, x1, 100, x2)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0xe38e38e4, -0x55555555, 0x3, x1, 104, x2)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555555
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0x55555555, 0x55555555, x1, 108, x2)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x55555555, -0x55555556, x1, 112, x2)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0xeeeeeeef, -0x55555555, 0x5, x1, 116, x2)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333333
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0x55555555, 0x33333333, x1, 120, x2)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x55555555, 0x66666666, x1, 124, x2)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb504
+TEST_RR_OP(div, x12, x10, x11, 0x78ae, -0x55555555, -0xb504, x1, 128, x2)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb504
+TEST_RR_OP(div, x12, x10, x11, 0xffff8752, -0x55555555, 0xb504, x1, 132, x2)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0xd5555556, -0x55555555, 0x2, x1, 136, x2)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555554
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0x55555555, 0x55555554, x1, 140, x2)
+
+inst_581:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFF, -0x55555555, 0x0, x1, 144, x2)
+
+inst_582:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0xeaaaaaab, -0x55555555, 0x4, x1, 148, x2)
+
+inst_583:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333332
+TEST_RR_OP(div, x12, x10, x11, 0xffffffff, -0x55555555, 0x33333332, x1, 152, x2)
+
+inst_584:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x55555555, 0x66666665, x1, 156, x2)
+
+inst_585:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb503
+TEST_RR_OP(div, x12, x10, x11, 0xffff8751, -0x55555555, 0xb503, x1, 160, x2)
+
+inst_586:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x55555555, 0x55555556, x1, 164, x2)
+
+inst_587:
+// rs1_val > 0 and rs2_val > 0, rs1_val != rs2_val, rs2_val == 262144
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:0x40000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x7, 0x40000, x1, 168, x2)
+
+inst_588:
+// rs1_val > 0 and rs2_val < 0, rs1_val == 256, rs2_val == -3
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x3
+TEST_RR_OP(div, x12, x10, x11, 0xffffffab, 0x100, -0x3, x1, 172, x2)
+
+inst_589:
+// rs1_val == rs2_val, rs2_val == 524288, rs1_val == 524288
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0x80000
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x80000, 0x80000, x1, 176, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 17*(XLEN/32),4,0xdeadbeef
+
+
+signature_x17_0:
+ .fill 16*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 45*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/divu-01.S b/riscof/suite/rv32i_m/M/divu-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..eea1ada7399941fb999ed60627ea51ae471553e3
--- /dev/null
+++ b/riscof/suite/rv32i_m/M/divu-01.S
@@ -0,0 +1,3704 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:41:59 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32im.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the divu instruction of the RISC-V M extension for the divu covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IM")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*M.*);def TEST_CASE_1=True;",divu)
+
+RVTEST_SIGBASE( x11,signature_x11_1)
+
+inst_0:
+// rs1 == rd != rs2, rs1==x31, rs2==x30, rd==x31, rs1_val > 0 and rs2_val > 0, rs1_val != rs2_val and rs1_val > 0 and rs2_val > 0, rs2_val == 4290772991
+// opcode: divu ; op1:x31; op2:x30; dest:x31; op1val:0x66666666; op2val:0xffbfffff
+TEST_RR_OP(divu, x31, x31, x30, 0x0, 0x66666666, 0xffbfffff, x11, 0, x14)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x16, rs2==x16, rd==x4, rs1_val == rs2_val and rs1_val > 0 and rs2_val > 0, rs1_val==65534 and rs2_val==65534
+// opcode: divu ; op1:x16; op2:x16; dest:x4; op1val:0xfffe; op2val:0xfffe
+TEST_RR_OP(divu, x4, x16, x16, 0x1, 0xfffe, 0xfffe, x11, 4, x14)
+
+inst_2:
+// rs2 == rd != rs1, rs1==x27, rs2==x29, rd==x29, rs2_val == 0, rs1_val == 2863311530, rs1_val==2863311530 and rs2_val==0
+// opcode: divu ; op1:x27; op2:x29; dest:x29; op1val:0xaaaaaaaa; op2val:0x0
+TEST_RR_OP(divu, x29, x27, x29, 0xFFFFFFFF, 0xaaaaaaaa, 0x0, x11, 8, x14)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x12, rs2==x5, rd==x8, rs2_val == (2**(xlen)-1), rs1_val == 2097152
+// opcode: divu ; op1:x12; op2:x5; dest:x8; op1val:0x200000; op2val:0xffffffff
+TEST_RR_OP(divu, x8, x12, x5, 0x0, 0x200000, 0xffffffff, x11, 12, x14)
+
+inst_4:
+// rs1 == rs2 == rd, rs1==x6, rs2==x6, rd==x6, rs2_val == 1, rs1_val == 262144
+// opcode: divu ; op1:x6; op2:x6; dest:x6; op1val:0x40000; op2val:0x40000
+TEST_RR_OP(divu, x6, x6, x6, 0x1, 0x40000, 0x40000, x11, 16, x14)
+
+inst_5:
+// rs1==x30, rs2==x25, rd==x21, rs1_val == 0, rs2_val == 4294443007
+// opcode: divu ; op1:x30; op2:x25; dest:x21; op1val:0x0; op2val:0xfff7ffff
+TEST_RR_OP(divu, x21, x30, x25, 0x0, 0x0, 0xfff7ffff, x11, 20, x14)
+
+inst_6:
+// rs1==x2, rs2==x18, rd==x19, rs1_val == (2**(xlen)-1), rs2_val == 32768
+// opcode: divu ; op1:x2; op2:x18; dest:x19; op1val:0xffffffff; op2val:0x8000
+TEST_RR_OP(divu, x19, x2, x18, 0x1ffff, 0xffffffff, 0x8000, x11, 24, x14)
+
+inst_7:
+// rs1==x20, rs2==x0, rd==x30, rs1_val == 1, rs1_val==1 and rs2_val==46339
+// opcode: divu ; op1:x20; op2:x0; dest:x30; op1val:0x1; op2val:0x0
+TEST_RR_OP(divu, x30, x20, x0, 0xFFFFFFFF, 0x1, 0x0, x11, 28, x14)
+
+inst_8:
+// rs1==x15, rs2==x31, rd==x5, rs2_val == 2, rs1_val == 4294901759
+// opcode: divu ; op1:x15; op2:x31; dest:x5; op1val:0xfffeffff; op2val:0x2
+TEST_RR_OP(divu, x5, x15, x31, 0x7fff7fff, 0xfffeffff, 0x2, x11, 32, x14)
+
+inst_9:
+// rs1==x10, rs2==x28, rd==x22, rs2_val == 4,
+// opcode: divu ; op1:x10; op2:x28; dest:x22; op1val:0x40000; op2val:0x4
+TEST_RR_OP(divu, x22, x10, x28, 0x10000, 0x40000, 0x4, x11, 36, x14)
+
+inst_10:
+// rs1==x7, rs2==x20, rd==x15, rs2_val == 8,
+// opcode: divu ; op1:x7; op2:x20; dest:x15; op1val:0x6; op2val:0x8
+TEST_RR_OP(divu, x15, x7, x20, 0x0, 0x6, 0x8, x11, 40, x14)
+
+inst_11:
+// rs1==x25, rs2==x27, rd==x28, rs2_val == 16, rs1_val == 2048
+// opcode: divu ; op1:x25; op2:x27; dest:x28; op1val:0x800; op2val:0x10
+TEST_RR_OP(divu, x28, x25, x27, 0x80, 0x800, 0x10, x11, 44, x14)
+
+inst_12:
+// rs1==x8, rs2==x26, rd==x12, rs2_val == 32, rs1_val == 524288
+// opcode: divu ; op1:x8; op2:x26; dest:x12; op1val:0x80000; op2val:0x20
+TEST_RR_OP(divu, x12, x8, x26, 0x4000, 0x80000, 0x20, x11, 48, x14)
+
+inst_13:
+// rs1==x13, rs2==x17, rd==x18, rs2_val == 64,
+// opcode: divu ; op1:x13; op2:x17; dest:x18; op1val:0x200000; op2val:0x40
+TEST_RR_OP(divu, x18, x13, x17, 0x8000, 0x200000, 0x40, x11, 52, x14)
+
+inst_14:
+// rs1==x9, rs2==x24, rd==x27, rs2_val == 128, rs1_val == 4294934527
+// opcode: divu ; op1:x9; op2:x24; dest:x27; op1val:0xffff7fff; op2val:0x80
+TEST_RR_OP(divu, x27, x9, x24, 0x1fffeff, 0xffff7fff, 0x80, x11, 56, x14)
+
+inst_15:
+// rs1==x3, rs2==x1, rd==x25, rs2_val == 256,
+// opcode: divu ; op1:x3; op2:x1; dest:x25; op1val:0x0; op2val:0x100
+TEST_RR_OP(divu, x25, x3, x1, 0x0, 0x0, 0x100, x11, 60, x14)
+RVTEST_SIGBASE( x6,signature_x6_0)
+
+inst_16:
+// rs1==x18, rs2==x12, rd==x13, rs2_val == 512, rs1_val == 4294965247
+// opcode: divu ; op1:x18; op2:x12; dest:x13; op1val:0xfffff7ff; op2val:0x200
+TEST_RR_OP(divu, x13, x18, x12, 0x7ffffb, 0xfffff7ff, 0x200, x6, 0, x25)
+
+inst_17:
+// rs1==x19, rs2==x3, rd==x7, rs2_val == 1024, rs1_val == 1073741824
+// opcode: divu ; op1:x19; op2:x3; dest:x7; op1val:0x40000000; op2val:0x400
+TEST_RR_OP(divu, x7, x19, x3, 0x100000, 0x40000000, 0x400, x6, 4, x25)
+
+inst_18:
+// rs1==x5, rs2==x22, rd==x3, rs2_val == 2048, rs1_val == 4292870143
+// opcode: divu ; op1:x5; op2:x22; dest:x3; op1val:0xffdfffff; op2val:0x800
+TEST_RR_OP(divu, x3, x5, x22, 0x1ffbff, 0xffdfffff, 0x800, x6, 8, x25)
+
+inst_19:
+// rs1==x1, rs2==x7, rd==x14, rs2_val == 4096, rs1_val == 2
+// opcode: divu ; op1:x1; op2:x7; dest:x14; op1val:0x2; op2val:0x1000
+TEST_RR_OP(divu, x14, x1, x7, 0x0, 0x2, 0x1000, x6, 12, x25)
+
+inst_20:
+// rs1==x17, rs2==x13, rd==x11, rs2_val == 8192, rs1_val == 4293918719
+// opcode: divu ; op1:x17; op2:x13; dest:x11; op1val:0xffefffff; op2val:0x2000
+TEST_RR_OP(divu, x11, x17, x13, 0x7ff7f, 0xffefffff, 0x2000, x6, 16, x25)
+
+inst_21:
+// rs1==x23, rs2==x4, rd==x20, rs2_val == 16384,
+// opcode: divu ; op1:x23; op2:x4; dest:x20; op1val:0xe; op2val:0x4000
+TEST_RR_OP(divu, x20, x23, x4, 0x0, 0xe, 0x4000, x6, 20, x25)
+
+inst_22:
+// rs1==x11, rs2==x14, rd==x9, rs2_val == 65536, rs1_val == 4290772991
+// opcode: divu ; op1:x11; op2:x14; dest:x9; op1val:0xffbfffff; op2val:0x10000
+TEST_RR_OP(divu, x9, x11, x14, 0xffbf, 0xffbfffff, 0x10000, x6, 24, x25)
+
+inst_23:
+// rs1==x24, rs2==x10, rd==x16, rs2_val == 131072,
+// opcode: divu ; op1:x24; op2:x10; dest:x16; op1val:0xaaaaaaaa; op2val:0x20000
+TEST_RR_OP(divu, x16, x24, x10, 0x5555, 0xaaaaaaaa, 0x20000, x6, 28, x25)
+
+inst_24:
+// rs1==x0, rs2==x19, rd==x24, rs2_val == 262144, rs1_val == 4227858431
+// opcode: divu ; op1:x0; op2:x19; dest:x24; op1val:0x0; op2val:0x40000
+TEST_RR_OP(divu, x24, x0, x19, 0x0, 0x0, 0x40000, x6, 32, x25)
+
+inst_25:
+// rs1==x22, rs2==x21, rd==x1, rs2_val == 524288, rs1_val == 4294836223
+// opcode: divu ; op1:x22; op2:x21; dest:x1; op1val:0xfffdffff; op2val:0x80000
+TEST_RR_OP(divu, x1, x22, x21, 0x1fff, 0xfffdffff, 0x80000, x6, 36, x25)
+
+inst_26:
+// rs1==x28, rs2==x9, rd==x10, rs2_val == 1048576,
+// opcode: divu ; op1:x28; op2:x9; dest:x10; op1val:0x800; op2val:0x100000
+TEST_RR_OP(divu, x10, x28, x9, 0x0, 0x800, 0x100000, x6, 40, x25)
+
+inst_27:
+// rs1==x21, rs2==x8, rd==x17, rs2_val == 2097152,
+// opcode: divu ; op1:x21; op2:x8; dest:x17; op1val:0xb505; op2val:0x200000
+TEST_RR_OP(divu, x17, x21, x8, 0x0, 0xb505, 0x200000, x6, 44, x25)
+
+inst_28:
+// rs1==x14, rs2==x11, rd==x23, rs2_val == 4194304, rs1_val == 16
+// opcode: divu ; op1:x14; op2:x11; dest:x23; op1val:0x10; op2val:0x400000
+TEST_RR_OP(divu, x23, x14, x11, 0x0, 0x10, 0x400000, x6, 48, x25)
+
+inst_29:
+// rs1==x26, rs2==x15, rd==x0, rs2_val == 8388608,
+// opcode: divu ; op1:x26; op2:x15; dest:x0; op1val:0xffdfffff; op2val:0x800000
+TEST_RR_OP(divu, x0, x26, x15, 0, 0xffdfffff, 0x800000, x6, 52, x25)
+
+inst_30:
+// rs1==x29, rs2==x2, rd==x26, rs2_val == 16777216,
+// opcode: divu ; op1:x29; op2:x2; dest:x26; op1val:0xffbfffff; op2val:0x1000000
+TEST_RR_OP(divu, x26, x29, x2, 0xff, 0xffbfffff, 0x1000000, x6, 56, x25)
+
+inst_31:
+// rs1==x4, rs2==x23, rd==x2, rs2_val == 33554432, rs1_val == 33554432
+// opcode: divu ; op1:x4; op2:x23; dest:x2; op1val:0x2000000; op2val:0x2000000
+TEST_RR_OP(divu, x2, x4, x23, 0x1, 0x2000000, 0x2000000, x6, 60, x25)
+
+inst_32:
+// rs2_val == 67108864, rs1_val == 4294967039
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffeff; op2val:0x4000000
+TEST_RR_OP(divu, x12, x10, x11, 0x3f, 0xfffffeff, 0x4000000, x6, 64, x25)
+
+inst_33:
+// rs2_val == 134217728, rs1_val == 4294963199
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffffefff; op2val:0x8000000
+TEST_RR_OP(divu, x12, x10, x11, 0x1f, 0xffffefff, 0x8000000, x6, 68, x25)
+
+inst_34:
+// rs2_val == 268435456,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xf; op2val:0x10000000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xf, 0x10000000, x6, 72, x25)
+
+inst_35:
+// rs2_val == 536870912,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x9; op2val:0x20000000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x9, 0x20000000, x6, 76, x25)
+
+inst_36:
+// rs2_val == 1073741824,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x40000000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x40000000, x6, 80, x25)
+
+inst_37:
+// rs2_val == 2147483648,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xd; op2val:0x80000000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xd, 0x80000000, x6, 84, x25)
+
+inst_38:
+// rs2_val == 4294967294,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x11; op2val:0xfffffffe
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x11, 0xfffffffe, x6, 88, x25)
+
+inst_39:
+// rs2_val == 4294967293, rs1_val == 128
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0xfffffffd
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x80, 0xfffffffd, x6, 92, x25)
+
+inst_40:
+// rs2_val == 4294967291,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xfffffffb
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0xfffffffb, x6, 96, x25)
+
+inst_41:
+// rs2_val == 4294967287,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffefffff; op2val:0xfffffff7
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffefffff, 0xfffffff7, x6, 100, x25)
+
+inst_42:
+// rs2_val == 4294967279, rs1_val == 2147483647
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffff; op2val:0xffffffef
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x7fffffff, 0xffffffef, x6, 104, x25)
+
+inst_43:
+// rs2_val == 4294967263,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xc; op2val:0xffffffdf
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xc, 0xffffffdf, x6, 108, x25)
+
+inst_44:
+// rs2_val == 4294967231, rs1_val == 8388608
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0xffffffbf
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x800000, 0xffffffbf, x6, 112, x25)
+
+inst_45:
+// rs2_val == 4294967167,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0xffffff7f
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xffffffff, 0xffffff7f, x6, 116, x25)
+
+inst_46:
+// rs2_val == 4294967039,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xe; op2val:0xfffffeff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xe, 0xfffffeff, x6, 120, x25)
+
+inst_47:
+// rs2_val == 4294966783, rs1_val == 4294967279
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffef; op2val:0xfffffdff
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xffffffef, 0xfffffdff, x6, 124, x25)
+
+inst_48:
+// rs2_val == 4294966271, rs1_val == 65536
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xfffffbff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10000, 0xfffffbff, x6, 128, x25)
+
+inst_49:
+// rs2_val == 4294965247,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xfffff7ff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xaaaaaaab, 0xfffff7ff, x6, 132, x25)
+
+inst_50:
+// rs2_val == 4294963199, rs1_val == 16777216
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0xffffefff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1000000, 0xffffefff, x6, 136, x25)
+
+inst_51:
+// rs2_val == 4294959103, rs1_val == 1431655765
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xffffdfff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555555, 0xffffdfff, x6, 140, x25)
+
+inst_52:
+// rs2_val == 4294950911, rs1_val == 4294967294
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffe; op2val:0xffffbfff
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xfffffffe, 0xffffbfff, x6, 144, x25)
+
+inst_53:
+// rs2_val == 4294934527,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xffff7fff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0xffff7fff, x6, 148, x25)
+
+inst_54:
+// rs2_val == 4294901759,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xfffeffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555556, 0xfffeffff, x6, 152, x25)
+
+inst_55:
+// rs2_val == 4294836223,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xfffdffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0xfffdffff, x6, 156, x25)
+
+inst_56:
+// rs2_val == 4294705151,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0xfffbffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10, 0xfffbffff, x6, 160, x25)
+
+inst_57:
+// rs2_val == 4293918719,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0xffefffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x80000, 0xffefffff, x6, 164, x25)
+
+inst_58:
+// rs2_val == 4292870143, rs1_val == 1024
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:0xffdfffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x400, 0xffdfffff, x6, 168, x25)
+
+inst_59:
+// rs2_val == 4286578687,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xe; op2val:0xff7fffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xe, 0xff7fffff, x6, 172, x25)
+
+inst_60:
+// rs2_val == 4278190079, rs1_val == 4294967287
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffff7; op2val:0xfeffffff
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xfffffff7, 0xfeffffff, x6, 176, x25)
+
+inst_61:
+// rs2_val == 4261412863,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xc; op2val:0xfdffffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xc, 0xfdffffff, x6, 180, x25)
+
+inst_62:
+// rs2_val == 4227858431,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x12; op2val:0xfbffffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x12, 0xfbffffff, x6, 184, x25)
+
+inst_63:
+// rs2_val == 4160749567, rs1_val == 134217728
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0xf7ffffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x8000000, 0xf7ffffff, x6, 188, x25)
+
+inst_64:
+// rs2_val == 4026531839, rs1_val == 8
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0xefffffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x8, 0xefffffff, x6, 192, x25)
+
+inst_65:
+// rs2_val == 3758096383, rs1_val == 4160749567
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xf7ffffff; op2val:0xdfffffff
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xf7ffffff, 0xdfffffff, x6, 196, x25)
+
+inst_66:
+// rs2_val == 3221225471, rs1_val == 4286578687
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xff7fffff; op2val:0xbfffffff
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xff7fffff, 0xbfffffff, x6, 200, x25)
+
+inst_67:
+// rs2_val == 2147483647,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xc; op2val:0x7fffffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xc, 0x7fffffff, x6, 204, x25)
+
+inst_68:
+// rs2_val == 1431655765, rs1_val==2 and rs2_val==1431655765
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x55555555, x6, 208, x25)
+
+inst_69:
+// rs2_val == 2863311530, rs1_val == 4261412863
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfdffffff; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xfdffffff, 0xaaaaaaaa, x6, 212, x25)
+
+inst_70:
+// rs1_val == 4, rs1_val==4 and rs2_val==858993459
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0x33333333, x6, 216, x25)
+
+inst_71:
+// rs1_val == 32,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x20, 0xb505, x6, 220, x25)
+
+inst_72:
+// rs1_val == 64,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0xa
+TEST_RR_OP(divu, x12, x10, x11, 0x6, 0x40, 0xa, x6, 224, x25)
+
+inst_73:
+// rs1_val == 256,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x55, 0x100, 0x3, x6, 228, x25)
+
+inst_74:
+// rs1_val == 512,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:0xfffffeff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x200, 0xfffffeff, x6, 232, x25)
+
+inst_75:
+// rs1_val == 4096,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x7
+TEST_RR_OP(divu, x12, x10, x11, 0x249, 0x1000, 0x7, x6, 236, x25)
+
+inst_76:
+// rs1_val == 8192,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2000, 0xaaaaaaaa, x6, 240, x25)
+
+inst_77:
+// rs1_val == 16384,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4000, 0x66666666, x6, 244, x25)
+
+inst_78:
+// rs1_val == 32768,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:0xfbffffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x8000, 0xfbffffff, x6, 248, x25)
+
+inst_79:
+// rs1_val == 131072,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0xfffdffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x20000, 0xfffdffff, x6, 252, x25)
+
+inst_80:
+// rs1_val == 1048576,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x100000, 0x33333332, x6, 256, x25)
+
+inst_81:
+// rs1_val == 4194304,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x40, 0x400000, 0x10000, x6, 260, x25)
+
+inst_82:
+// rs1_val == 67108864,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x1555555, 0x4000000, 0x3, x6, 264, x25)
+
+inst_83:
+// rs1_val == 268435456,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x12
+TEST_RR_OP(divu, x12, x10, x11, 0xe38e38, 0x10000000, 0x12, x6, 268, x25)
+
+inst_84:
+// rs1_val == 536870912,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x20000000, 0x20000000, 0x1, x6, 272, x25)
+
+inst_85:
+// rs1_val == 2147483648,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0xfffffffe
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x80000000, 0xfffffffe, x6, 276, x25)
+
+inst_86:
+// rs1_val == 4294967293,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffd; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x5, 0xfffffffd, 0x33333332, x6, 280, x25)
+
+inst_87:
+// rs1_val == 4294967291,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffb; op2val:0x20000000
+TEST_RR_OP(divu, x12, x10, x11, 0x7, 0xfffffffb, 0x20000000, x6, 284, x25)
+
+inst_88:
+// rs1_val == 4294967263,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffdf; op2val:0x100
+TEST_RR_OP(divu, x12, x10, x11, 0xffffff, 0xffffffdf, 0x100, x6, 288, x25)
+
+inst_89:
+// rs1_val == 4294967231,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffbf; op2val:0x2000000
+TEST_RR_OP(divu, x12, x10, x11, 0x7f, 0xffffffbf, 0x2000000, x6, 292, x25)
+
+inst_90:
+// rs1_val == 4294967167,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffffff7f; op2val:0xefffffff
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xffffff7f, 0xefffffff, x6, 296, x25)
+
+inst_91:
+// rs1_val == 4294966783,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffdff; op2val:0xffffdfff
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xfffffdff, 0xffffdfff, x6, 300, x25)
+
+inst_92:
+// rs1_val == 4294966271,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffbff; op2val:0x400000
+TEST_RR_OP(divu, x12, x10, x11, 0x3ff, 0xfffffbff, 0x400000, x6, 304, x25)
+
+inst_93:
+// rs1_val == 4294959103,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffffdfff; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0xffffdfff, 0x55555555, x6, 308, x25)
+
+inst_94:
+// rs1_val == 4294950911,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffffbfff; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0xffffbfff, 0x55555555, x6, 312, x25)
+
+inst_95:
+// rs1_val == 4294705151,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffbffff; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x33326666, 0xfffbffff, 0x5, x6, 316, x25)
+
+inst_96:
+// rs1_val == 4294443007,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfff7ffff; op2val:0xfffffffd
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfff7ffff, 0xfffffffd, x6, 320, x25)
+
+inst_97:
+// rs1_val == 4278190079,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfeffffff; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xfeffffff, 0xaaaaaaaa, x6, 324, x25)
+
+inst_98:
+// rs1_val == 4026531839,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xefffffff; op2val:0x200000
+TEST_RR_OP(divu, x12, x10, x11, 0x77f, 0xefffffff, 0x200000, x6, 328, x25)
+
+inst_99:
+// rs1_val == 3758096383,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xdfffffff; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x13cc8, 0xdfffffff, 0xb505, x6, 332, x25)
+
+inst_100:
+// rs1_val == 3221225471,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xbfffffff; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xbfffffff, 0x66666667, x6, 336, x25)
+
+inst_101:
+// rs1_val==3 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x3, 0x3, x6, 340, x25)
+
+inst_102:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0x55555555, x6, 344, x25)
+
+inst_103:
+// rs1_val==3 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0xaaaaaaaa, x6, 348, x25)
+
+inst_104:
+// rs1_val==3 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0x5, x6, 352, x25)
+
+inst_105:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0x33333333, x6, 356, x25)
+
+inst_106:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0x66666666, x6, 360, x25)
+
+inst_107:
+// rs1_val==3 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0xb504, x6, 364, x25)
+
+inst_108:
+// rs1_val==3 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x3, 0x0, x6, 368, x25)
+
+inst_109:
+// rs1_val==3 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0xffff, x6, 372, x25)
+
+inst_110:
+// rs1_val==3 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x3, 0x2, x6, 376, x25)
+
+inst_111:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0x55555554, x6, 380, x25)
+
+inst_112:
+// rs1_val==3 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0xaaaaaaa9, x6, 384, x25)
+
+inst_113:
+// rs1_val==3 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0x4, x6, 388, x25)
+
+inst_114:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0x33333332, x6, 392, x25)
+
+inst_115:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0x66666665, x6, 396, x25)
+
+inst_116:
+// rs1_val==3 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0xb503, x6, 400, x25)
+
+inst_117:
+// rs1_val==3 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0xfffe, x6, 404, x25)
+
+inst_118:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0x55555556, x6, 408, x25)
+
+inst_119:
+// rs1_val==3 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0xaaaaaaab, x6, 412, x25)
+
+inst_120:
+// rs1_val==3 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0x6, x6, 416, x25)
+
+inst_121:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0x33333334, x6, 420, x25)
+
+inst_122:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0x66666667, x6, 424, x25)
+
+inst_123:
+// rs1_val==3 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0xb505, x6, 428, x25)
+
+inst_124:
+// rs1_val==3 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x3, 0x3, 0x1, x6, 432, x25)
+
+inst_125:
+// rs1_val==3 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x3, 0x10000, x6, 436, x25)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x1c71c71c, 0x55555555, 0x3, x6, 440, x25)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555555, 0x55555555, x6, 444, x25)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555555, 0xaaaaaaaa, x6, 448, x25)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x11111111, 0x55555555, 0x5, x6, 452, x25)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555555, 0x33333333, x6, 456, x25)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555555, 0x66666666, x6, 460, x25)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x78ae, 0x55555555, 0xb504, x6, 464, x25)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x55555555, 0x0, x6, 468, x25)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x5555, 0x55555555, 0xffff, x6, 472, x25)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x2aaaaaaa, 0x55555555, 0x2, x6, 476, x25)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555555, 0x55555554, x6, 480, x25)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555555, 0xaaaaaaa9, x6, 484, x25)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x15555555, 0x55555555, 0x4, x6, 488, x25)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555555, 0x33333332, x6, 492, x25)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555555, 0x66666665, x6, 496, x25)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x78af, 0x55555555, 0xb503, x6, 500, x25)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x5556, 0x55555555, 0xfffe, x6, 504, x25)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555555, 0x55555556, x6, 508, x25)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555555, 0xaaaaaaab, x6, 512, x25)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0xe38e38e, 0x55555555, 0x6, x6, 516, x25)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555555, 0x33333334, x6, 520, x25)
+
+inst_147:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555555, 0x66666667, x6, 524, x25)
+
+inst_148:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x78ad, 0x55555555, 0xb505, x6, 528, x25)
+
+inst_149:
+// rs1_val==1431655765 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x55555555, 0x55555555, 0x1, x6, 532, x25)
+
+inst_150:
+// rs1_val==1431655765 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x5555, 0x55555555, 0x10000, x6, 536, x25)
+
+inst_151:
+// rs1_val==2863311530 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x38e38e38, 0xaaaaaaaa, 0x3, x6, 540, x25)
+
+inst_152:
+// rs1_val==2863311530 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0xaaaaaaaa, 0x55555555, x6, 544, x25)
+
+inst_153:
+// rs1_val==2863311530 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaaa, 0xaaaaaaaa, x6, 548, x25)
+
+inst_154:
+// rs1_val==2863311530 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x22222222, 0xaaaaaaaa, 0x5, x6, 552, x25)
+
+inst_155:
+// rs1_val==2863311530 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x3, 0xaaaaaaaa, 0x33333333, x6, 556, x25)
+
+inst_156:
+// rs1_val==2863311530 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaaa, 0x66666666, x6, 560, x25)
+
+inst_157:
+// rs1_val==2863311530 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0xf15d, 0xaaaaaaaa, 0xb504, x6, 564, x25)
+
+inst_158:
+// rs1_val==2863311530 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0xaaab, 0xaaaaaaaa, 0xffff, x6, 568, x25)
+
+inst_159:
+// rs1_val==2863311530 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x55555555, 0xaaaaaaaa, 0x2, x6, 572, x25)
+
+inst_160:
+// rs1_val==2863311530 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0xaaaaaaaa, 0x55555554, x6, 576, x25)
+
+inst_161:
+// rs1_val==2863311530 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaaa, 0xaaaaaaa9, x6, 580, x25)
+
+inst_162:
+// rs1_val==2863311530 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x2aaaaaaa, 0xaaaaaaaa, 0x4, x6, 584, x25)
+
+inst_163:
+// rs1_val==2863311530 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x3, 0xaaaaaaaa, 0x33333332, x6, 588, x25)
+
+inst_164:
+// rs1_val==2863311530 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaaa, 0x66666665, x6, 592, x25)
+
+inst_165:
+// rs1_val==2863311530 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0xf15e, 0xaaaaaaaa, 0xb503, x6, 596, x25)
+
+inst_166:
+// rs1_val==2863311530 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0xaaac, 0xaaaaaaaa, 0xfffe, x6, 600, x25)
+
+inst_167:
+// rs1_val==2863311530 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaaa, 0x55555556, x6, 604, x25)
+
+inst_168:
+// rs1_val==2863311530 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0xaaaaaaab, x6, 608, x25)
+
+inst_169:
+// rs1_val==2863311530 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x1c71c71c, 0xaaaaaaaa, 0x6, x6, 612, x25)
+
+inst_170:
+// rs1_val==2863311530 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x3, 0xaaaaaaaa, 0x33333334, x6, 616, x25)
+
+inst_171:
+// rs1_val==2863311530 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaaa, 0x66666667, x6, 620, x25)
+
+inst_172:
+// rs1_val==2863311530 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0xf15b, 0xaaaaaaaa, 0xb505, x6, 624, x25)
+
+inst_173:
+// rs1_val==2863311530 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0xaaaaaaaa, 0xaaaaaaaa, 0x1, x6, 628, x25)
+
+inst_174:
+// rs1_val==2863311530 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0xaaaa, 0xaaaaaaaa, 0x10000, x6, 632, x25)
+
+inst_175:
+// rs1_val==5 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x5, 0x3, x6, 636, x25)
+
+inst_176:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0x55555555, x6, 640, x25)
+
+inst_177:
+// rs1_val==5 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0xaaaaaaaa, x6, 644, x25)
+
+inst_178:
+// rs1_val==5 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x5, 0x5, x6, 648, x25)
+
+inst_179:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0x33333333, x6, 652, x25)
+
+inst_180:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0x66666666, x6, 656, x25)
+
+inst_181:
+// rs1_val==5 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0xb504, x6, 660, x25)
+
+inst_182:
+// rs1_val==5 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x5, 0x0, x6, 664, x25)
+
+inst_183:
+// rs1_val==5 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0xffff, x6, 668, x25)
+
+inst_184:
+// rs1_val==5 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0x5, 0x2, x6, 672, x25)
+
+inst_185:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0x55555554, x6, 676, x25)
+
+inst_186:
+// rs1_val==5 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0xaaaaaaa9, x6, 680, x25)
+
+inst_187:
+// rs1_val==5 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x5, 0x4, x6, 684, x25)
+
+inst_188:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0x33333332, x6, 688, x25)
+
+inst_189:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0x66666665, x6, 692, x25)
+
+inst_190:
+// rs1_val==5 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0xb503, x6, 696, x25)
+
+inst_191:
+// rs1_val==5 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0xfffe, x6, 700, x25)
+
+inst_192:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0x55555556, x6, 704, x25)
+
+inst_193:
+// rs1_val==5 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0xaaaaaaab, x6, 708, x25)
+
+inst_194:
+// rs1_val==5 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0x6, x6, 712, x25)
+
+inst_195:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0x33333334, x6, 716, x25)
+
+inst_196:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0x66666667, x6, 720, x25)
+
+inst_197:
+// rs1_val==5 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0xb505, x6, 724, x25)
+
+inst_198:
+// rs1_val==5 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x5, 0x5, 0x1, x6, 728, x25)
+
+inst_199:
+// rs1_val==5 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x5, 0x10000, x6, 732, x25)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x11111111, 0x33333333, 0x3, x6, 736, x25)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333333, 0x55555555, x6, 740, x25)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333333, 0xaaaaaaaa, x6, 744, x25)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0xa3d70a3, 0x33333333, 0x5, x6, 748, x25)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x33333333, 0x33333333, x6, 752, x25)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333333, 0x66666666, x6, 756, x25)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x4868, 0x33333333, 0xb504, x6, 760, x25)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x33333333, 0x0, x6, 764, x25)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x3333, 0x33333333, 0xffff, x6, 768, x25)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x19999999, 0x33333333, 0x2, x6, 772, x25)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333333, 0x55555554, x6, 776, x25)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333333, 0xaaaaaaa9, x6, 780, x25)
+
+inst_212:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0xccccccc, 0x33333333, 0x4, x6, 784, x25)
+
+inst_213:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x33333333, 0x33333332, x6, 788, x25)
+
+inst_214:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333333, 0x66666665, x6, 792, x25)
+
+inst_215:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x4869, 0x33333333, 0xb503, x6, 796, x25)
+
+inst_216:
+// rs1_val==858993459 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x3333, 0x33333333, 0xfffe, x6, 800, x25)
+
+inst_217:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333333, 0x55555556, x6, 804, x25)
+
+inst_218:
+// rs1_val==858993459 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333333, 0xaaaaaaab, x6, 808, x25)
+
+inst_219:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x8888888, 0x33333333, 0x6, x6, 812, x25)
+
+inst_220:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333333, 0x33333334, x6, 816, x25)
+
+inst_221:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333333, 0x66666667, x6, 820, x25)
+
+inst_222:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x4868, 0x33333333, 0xb505, x6, 824, x25)
+
+inst_223:
+// rs1_val==858993459 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x33333333, 0x33333333, 0x1, x6, 828, x25)
+
+inst_224:
+// rs1_val==858993459 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x3333, 0x33333333, 0x10000, x6, 832, x25)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x22222222, 0x66666666, 0x3, x6, 836, x25)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666666, 0x55555555, x6, 840, x25)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x66666666, 0xaaaaaaaa, x6, 844, x25)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x147ae147, 0x66666666, 0x5, x6, 848, x25)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0x66666666, 0x33333333, x6, 852, x25)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666666, 0x66666666, x6, 856, x25)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x90d1, 0x66666666, 0xb504, x6, 860, x25)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x66666666, 0x0, x6, 864, x25)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x6666, 0x66666666, 0xffff, x6, 868, x25)
+
+inst_234:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x33333333, 0x66666666, 0x2, x6, 872, x25)
+
+inst_235:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666666, 0x55555554, x6, 876, x25)
+
+inst_236:
+// rs1_val==1717986918 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x66666666, 0xaaaaaaa9, x6, 880, x25)
+
+inst_237:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x19999999, 0x66666666, 0x4, x6, 884, x25)
+
+inst_238:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0x66666666, 0x33333332, x6, 888, x25)
+
+inst_239:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666666, 0x66666665, x6, 892, x25)
+
+inst_240:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x90d2, 0x66666666, 0xb503, x6, 896, x25)
+
+inst_241:
+// rs1_val==1717986918 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x6667, 0x66666666, 0xfffe, x6, 900, x25)
+
+inst_242:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666666, 0x55555556, x6, 904, x25)
+
+inst_243:
+// rs1_val==1717986918 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x66666666, 0xaaaaaaab, x6, 908, x25)
+
+inst_244:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x11111111, 0x66666666, 0x6, x6, 912, x25)
+
+inst_245:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666666, 0x33333334, x6, 916, x25)
+
+inst_246:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x66666666, 0x66666667, x6, 920, x25)
+
+inst_247:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x90d0, 0x66666666, 0xb505, x6, 924, x25)
+
+inst_248:
+// rs1_val==1717986918 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x66666666, 0x66666666, 0x1, x6, 928, x25)
+
+inst_249:
+// rs1_val==1717986918 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x6666, 0x66666666, 0x10000, x6, 932, x25)
+
+inst_250:
+// rs1_val==46340 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x3c56, 0xb504, 0x3, x6, 936, x25)
+
+inst_251:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0x55555555, x6, 940, x25)
+
+inst_252:
+// rs1_val==46340 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0xaaaaaaaa, x6, 944, x25)
+
+inst_253:
+// rs1_val==46340 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x2434, 0xb504, 0x5, x6, 948, x25)
+
+inst_254:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0x33333333, x6, 952, x25)
+
+inst_255:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0x66666666, x6, 956, x25)
+
+inst_256:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xb504, 0xb504, x6, 960, x25)
+
+inst_257:
+// rs1_val==46340 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0xb504, 0x0, x6, 964, x25)
+
+inst_258:
+// rs1_val==46340 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0xffff, x6, 968, x25)
+
+inst_259:
+// rs1_val==46340 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x5a82, 0xb504, 0x2, x6, 972, x25)
+
+inst_260:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0x55555554, x6, 976, x25)
+
+inst_261:
+// rs1_val==46340 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0xaaaaaaa9, x6, 980, x25)
+
+inst_262:
+// rs1_val==46340 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x2d41, 0xb504, 0x4, x6, 984, x25)
+
+inst_263:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0x33333332, x6, 988, x25)
+
+inst_264:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0x66666665, x6, 992, x25)
+
+inst_265:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xb504, 0xb503, x6, 996, x25)
+
+inst_266:
+// rs1_val==46340 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0xfffe, x6, 1000, x25)
+
+inst_267:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0x55555556, x6, 1004, x25)
+
+inst_268:
+// rs1_val==46340 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0xaaaaaaab, x6, 1008, x25)
+
+inst_269:
+// rs1_val==46340 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x1e2b, 0xb504, 0x6, x6, 1012, x25)
+
+inst_270:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0x33333334, x6, 1016, x25)
+
+inst_271:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0x66666667, x6, 1020, x25)
+
+inst_272:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0xb505, x6, 1024, x25)
+
+inst_273:
+// rs1_val==46340 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0xb504, 0xb504, 0x1, x6, 1028, x25)
+
+inst_274:
+// rs1_val==46340 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb504, 0x10000, x6, 1032, x25)
+
+inst_275:
+// rs1_val==0 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x3, x6, 1036, x25)
+
+inst_276:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x55555555, x6, 1040, x25)
+
+inst_277:
+// rs1_val==0 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0xaaaaaaaa, x6, 1044, x25)
+
+inst_278:
+// rs1_val==0 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x5, x6, 1048, x25)
+
+inst_279:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x33333333, x6, 1052, x25)
+
+inst_280:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x66666666, x6, 1056, x25)
+
+inst_281:
+// rs1_val==0 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0xb504, x6, 1060, x25)
+
+inst_282:
+// rs1_val==0 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x0, 0x0, x6, 1064, x25)
+
+inst_283:
+// rs1_val==0 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0xffff, x6, 1068, x25)
+
+inst_284:
+// rs1_val==0 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x2, x6, 1072, x25)
+
+inst_285:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x55555554, x6, 1076, x25)
+
+inst_286:
+// rs1_val==0 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0xaaaaaaa9, x6, 1080, x25)
+
+inst_287:
+// rs1_val==0 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x4, x6, 1084, x25)
+
+inst_288:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x33333332, x6, 1088, x25)
+
+inst_289:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x66666665, x6, 1092, x25)
+
+inst_290:
+// rs1_val==0 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0xb503, x6, 1096, x25)
+
+inst_291:
+// rs1_val==0 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0xfffe, x6, 1100, x25)
+
+inst_292:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x55555556, x6, 1104, x25)
+
+inst_293:
+// rs1_val==0 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0xaaaaaaab, x6, 1108, x25)
+
+inst_294:
+// rs1_val==0 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x6, x6, 1112, x25)
+
+inst_295:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x33333334, x6, 1116, x25)
+
+inst_296:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x66666667, x6, 1120, x25)
+
+inst_297:
+// rs1_val==0 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0xb505, x6, 1124, x25)
+
+inst_298:
+// rs1_val==0 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x1, x6, 1128, x25)
+
+inst_299:
+// rs1_val==0 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x0, 0x10000, x6, 1132, x25)
+
+inst_300:
+// rs1_val==65535 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x5555, 0xffff, 0x3, x6, 1136, x25)
+
+inst_301:
+// rs1_val==65535 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffff, 0x55555555, x6, 1140, x25)
+
+inst_302:
+// rs1_val==65535 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffff, 0xaaaaaaaa, x6, 1144, x25)
+
+inst_303:
+// rs1_val==65535 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x3333, 0xffff, 0x5, x6, 1148, x25)
+
+inst_304:
+// rs1_val==65535 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffff, 0x33333333, x6, 1152, x25)
+
+inst_305:
+// rs1_val==65535 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffff, 0x66666666, x6, 1156, x25)
+
+inst_306:
+// rs1_val==65535 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xffff, 0xb504, x6, 1160, x25)
+
+inst_307:
+// rs1_val==65535 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0xffff, 0x0, x6, 1164, x25)
+
+inst_308:
+// rs1_val==65535 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xffff, 0xffff, x6, 1168, x25)
+
+inst_309:
+// rs1_val==65535 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x7fff, 0xffff, 0x2, x6, 1172, x25)
+
+inst_310:
+// rs1_val==65535 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffff, 0x55555554, x6, 1176, x25)
+
+inst_311:
+// rs1_val==65535 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffff, 0xaaaaaaa9, x6, 1180, x25)
+
+inst_312:
+// rs1_val==65535 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x3fff, 0xffff, 0x4, x6, 1184, x25)
+
+inst_313:
+// rs1_val==65535 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffff, 0x33333332, x6, 1188, x25)
+
+inst_314:
+// rs1_val==65535 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffff, 0x66666665, x6, 1192, x25)
+
+inst_315:
+// rs1_val==65535 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xffff, 0xb503, x6, 1196, x25)
+
+inst_316:
+// rs1_val==65535 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xffff, 0xfffe, x6, 1200, x25)
+
+inst_317:
+// rs1_val==65535 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffff, 0x55555556, x6, 1204, x25)
+
+inst_318:
+// rs1_val==65535 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffff, 0xaaaaaaab, x6, 1208, x25)
+
+inst_319:
+// rs1_val==65535 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x2aaa, 0xffff, 0x6, x6, 1212, x25)
+
+inst_320:
+// rs1_val==65535 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffff, 0x33333334, x6, 1216, x25)
+
+inst_321:
+// rs1_val==65535 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffff, 0x66666667, x6, 1220, x25)
+
+inst_322:
+// rs1_val==65535 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xffff, 0xb505, x6, 1224, x25)
+
+inst_323:
+// rs1_val==65535 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0xffff, 0xffff, 0x1, x6, 1228, x25)
+
+inst_324:
+// rs1_val==65535 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xffff, 0x10000, x6, 1232, x25)
+
+inst_325:
+// rs1_val==2 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x3, x6, 1236, x25)
+
+inst_326:
+// rs1_val==2 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0xaaaaaaaa, x6, 1240, x25)
+
+inst_327:
+// rs1_val==2 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x5, x6, 1244, x25)
+
+inst_328:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x33333333, x6, 1248, x25)
+
+inst_329:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x66666666, x6, 1252, x25)
+
+inst_330:
+// rs1_val==2 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0xb504, x6, 1256, x25)
+
+inst_331:
+// rs1_val==2 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x2, 0x0, x6, 1260, x25)
+
+inst_332:
+// rs1_val==2 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0xffff, x6, 1264, x25)
+
+inst_333:
+// rs1_val==2 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x2, 0x2, x6, 1268, x25)
+
+inst_334:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x55555554, x6, 1272, x25)
+
+inst_335:
+// rs1_val==2 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0xaaaaaaa9, x6, 1276, x25)
+
+inst_336:
+// rs1_val==2 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x4, x6, 1280, x25)
+
+inst_337:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x33333332, x6, 1284, x25)
+
+inst_338:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x66666665, x6, 1288, x25)
+
+inst_339:
+// rs1_val==2 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0xb503, x6, 1292, x25)
+
+inst_340:
+// rs1_val==2 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0xfffe, x6, 1296, x25)
+
+inst_341:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x55555556, x6, 1300, x25)
+
+inst_342:
+// rs1_val==2 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0xaaaaaaab, x6, 1304, x25)
+
+inst_343:
+// rs1_val==2 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x6, x6, 1308, x25)
+
+inst_344:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x33333334, x6, 1312, x25)
+
+inst_345:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x66666667, x6, 1316, x25)
+
+inst_346:
+// rs1_val==2 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0xb505, x6, 1320, x25)
+
+inst_347:
+// rs1_val==2 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0x2, 0x1, x6, 1324, x25)
+
+inst_348:
+// rs1_val==2 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x2, 0x10000, x6, 1328, x25)
+
+inst_349:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x1c71c71c, 0x55555554, 0x3, x6, 1332, x25)
+
+inst_350:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555554, 0x55555555, x6, 1336, x25)
+
+inst_351:
+// rs1_val==1431655764 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555554, 0xaaaaaaaa, x6, 1340, x25)
+
+inst_352:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x11111110, 0x55555554, 0x5, x6, 1344, x25)
+
+inst_353:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555554, 0x33333333, x6, 1348, x25)
+
+inst_354:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555554, 0x66666666, x6, 1352, x25)
+
+inst_355:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x78ae, 0x55555554, 0xb504, x6, 1356, x25)
+
+inst_356:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x55555554, 0x0, x6, 1360, x25)
+
+inst_357:
+// rs1_val==1431655764 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x5555, 0x55555554, 0xffff, x6, 1364, x25)
+
+inst_358:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x2aaaaaaa, 0x55555554, 0x2, x6, 1368, x25)
+
+inst_359:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555554, 0x55555554, x6, 1372, x25)
+
+inst_360:
+// rs1_val==1431655764 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555554, 0xaaaaaaa9, x6, 1376, x25)
+
+inst_361:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x15555555, 0x55555554, 0x4, x6, 1380, x25)
+
+inst_362:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555554, 0x33333332, x6, 1384, x25)
+
+inst_363:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555554, 0x66666665, x6, 1388, x25)
+
+inst_364:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x78af, 0x55555554, 0xb503, x6, 1392, x25)
+
+inst_365:
+// rs1_val==1431655764 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x5556, 0x55555554, 0xfffe, x6, 1396, x25)
+
+inst_366:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555554, 0x55555556, x6, 1400, x25)
+
+inst_367:
+// rs1_val==1431655764 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555554, 0xaaaaaaab, x6, 1404, x25)
+
+inst_368:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0xe38e38e, 0x55555554, 0x6, x6, 1408, x25)
+
+inst_369:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555554, 0x33333334, x6, 1412, x25)
+
+inst_370:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555554, 0x66666667, x6, 1416, x25)
+
+inst_371:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x78ad, 0x55555554, 0xb505, x6, 1420, x25)
+
+inst_372:
+// rs1_val==1431655764 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x55555554, 0x55555554, 0x1, x6, 1424, x25)
+
+inst_373:
+// rs1_val==1431655764 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x5555, 0x55555554, 0x10000, x6, 1428, x25)
+
+inst_374:
+// rs1_val==2863311529 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x38e38e38, 0xaaaaaaa9, 0x3, x6, 1432, x25)
+
+inst_375:
+// rs1_val==2863311529 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0x55555555, x6, 1436, x25)
+
+inst_376:
+// rs1_val==2863311529 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0xaaaaaaaa, x6, 1440, x25)
+
+inst_377:
+// rs1_val==2863311529 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x22222221, 0xaaaaaaa9, 0x5, x6, 1444, x25)
+
+inst_378:
+// rs1_val==2863311529 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x3, 0xaaaaaaa9, 0x33333333, x6, 1448, x25)
+
+inst_379:
+// rs1_val==2863311529 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0x66666666, x6, 1452, x25)
+
+inst_380:
+// rs1_val==2863311529 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0xf15d, 0xaaaaaaa9, 0xb504, x6, 1456, x25)
+
+inst_381:
+// rs1_val==2863311529 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0xaaaaaaa9, 0x0, x6, 1460, x25)
+
+inst_382:
+// rs1_val==2863311529 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0xaaab, 0xaaaaaaa9, 0xffff, x6, 1464, x25)
+
+inst_383:
+// rs1_val==2863311529 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x55555554, 0xaaaaaaa9, 0x2, x6, 1468, x25)
+
+inst_384:
+// rs1_val==2863311529 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0xaaaaaaa9, 0x55555554, x6, 1472, x25)
+
+inst_385:
+// rs1_val==2863311529 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0xaaaaaaa9, x6, 1476, x25)
+
+inst_386:
+// rs1_val==2863311529 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x2aaaaaaa, 0xaaaaaaa9, 0x4, x6, 1480, x25)
+
+inst_387:
+// rs1_val==2863311529 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x3, 0xaaaaaaa9, 0x33333332, x6, 1484, x25)
+
+inst_388:
+// rs1_val==2863311529 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0x66666665, x6, 1488, x25)
+
+inst_389:
+// rs1_val==2863311529 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0xf15e, 0xaaaaaaa9, 0xb503, x6, 1492, x25)
+
+inst_390:
+// rs1_val==2863311529 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0xaaac, 0xaaaaaaa9, 0xfffe, x6, 1496, x25)
+
+inst_391:
+// rs1_val==2863311529 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0x55555556, x6, 1500, x25)
+
+inst_392:
+// rs1_val==2863311529 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0xaaaaaaab, x6, 1504, x25)
+
+inst_393:
+// rs1_val==2863311529 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x1c71c71c, 0xaaaaaaa9, 0x6, x6, 1508, x25)
+
+inst_394:
+// rs1_val==2863311529 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x3, 0xaaaaaaa9, 0x33333334, x6, 1512, x25)
+
+inst_395:
+// rs1_val==2863311529 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0x66666667, x6, 1516, x25)
+
+inst_396:
+// rs1_val==2863311529 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0xf15b, 0xaaaaaaa9, 0xb505, x6, 1520, x25)
+
+inst_397:
+// rs1_val==2863311529 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0xaaaaaaa9, 0xaaaaaaa9, 0x1, x6, 1524, x25)
+
+inst_398:
+// rs1_val==2863311529 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0xaaaa, 0xaaaaaaa9, 0x10000, x6, 1528, x25)
+
+inst_399:
+// rs1_val==4 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x4, 0x3, x6, 1532, x25)
+
+inst_400:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0x55555555, x6, 1536, x25)
+
+inst_401:
+// rs1_val==4 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0xaaaaaaaa, x6, 1540, x25)
+
+inst_402:
+// rs1_val==4 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0x5, x6, 1544, x25)
+
+inst_403:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0x66666666, x6, 1548, x25)
+
+inst_404:
+// rs1_val==4 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0xb504, x6, 1552, x25)
+
+inst_405:
+// rs1_val==4 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x4, 0x0, x6, 1556, x25)
+
+inst_406:
+// rs1_val==4 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0xffff, x6, 1560, x25)
+
+inst_407:
+// rs1_val==4 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0x4, 0x2, x6, 1564, x25)
+
+inst_408:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0x55555554, x6, 1568, x25)
+
+inst_409:
+// rs1_val==4 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0xaaaaaaa9, x6, 1572, x25)
+
+inst_410:
+// rs1_val==4 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x4, 0x4, x6, 1576, x25)
+
+inst_411:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0x33333332, x6, 1580, x25)
+
+inst_412:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0x66666665, x6, 1584, x25)
+
+inst_413:
+// rs1_val==4 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0xb503, x6, 1588, x25)
+
+inst_414:
+// rs1_val==4 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0xfffe, x6, 1592, x25)
+
+inst_415:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0x55555556, x6, 1596, x25)
+
+inst_416:
+// rs1_val==4 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0xaaaaaaab, x6, 1600, x25)
+
+inst_417:
+// rs1_val==4 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0x6, x6, 1604, x25)
+
+inst_418:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0x33333334, x6, 1608, x25)
+
+inst_419:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0x66666667, x6, 1612, x25)
+
+inst_420:
+// rs1_val==4 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0xb505, x6, 1616, x25)
+
+inst_421:
+// rs1_val==4 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x4, 0x4, 0x1, x6, 1620, x25)
+
+inst_422:
+// rs1_val==4 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x4, 0x10000, x6, 1624, x25)
+
+inst_423:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x11111110, 0x33333332, 0x3, x6, 1628, x25)
+
+inst_424:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333332, 0x55555555, x6, 1632, x25)
+
+inst_425:
+// rs1_val==858993458 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333332, 0xaaaaaaaa, x6, 1636, x25)
+
+inst_426:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0xa3d70a3, 0x33333332, 0x5, x6, 1640, x25)
+
+inst_427:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333332, 0x33333333, x6, 1644, x25)
+
+inst_428:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333332, 0x66666666, x6, 1648, x25)
+
+inst_429:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x4868, 0x33333332, 0xb504, x6, 1652, x25)
+
+inst_430:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x33333332, 0x0, x6, 1656, x25)
+
+inst_431:
+// rs1_val==858993458 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x3333, 0x33333332, 0xffff, x6, 1660, x25)
+
+inst_432:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x19999999, 0x33333332, 0x2, x6, 1664, x25)
+
+inst_433:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333332, 0x55555554, x6, 1668, x25)
+
+inst_434:
+// rs1_val==858993458 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333332, 0xaaaaaaa9, x6, 1672, x25)
+
+inst_435:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0xccccccc, 0x33333332, 0x4, x6, 1676, x25)
+
+inst_436:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x33333332, 0x33333332, x6, 1680, x25)
+
+inst_437:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333332, 0x66666665, x6, 1684, x25)
+
+inst_438:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x4869, 0x33333332, 0xb503, x6, 1688, x25)
+
+inst_439:
+// rs1_val==858993458 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x3333, 0x33333332, 0xfffe, x6, 1692, x25)
+
+inst_440:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333332, 0x55555556, x6, 1696, x25)
+
+inst_441:
+// rs1_val==858993458 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333332, 0xaaaaaaab, x6, 1700, x25)
+
+inst_442:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x8888888, 0x33333332, 0x6, x6, 1704, x25)
+
+inst_443:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333332, 0x33333334, x6, 1708, x25)
+
+inst_444:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333332, 0x66666667, x6, 1712, x25)
+
+inst_445:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x4868, 0x33333332, 0xb505, x6, 1716, x25)
+
+inst_446:
+// rs1_val==858993458 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x33333332, 0x33333332, 0x1, x6, 1720, x25)
+
+inst_447:
+// rs1_val==858993458 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x3333, 0x33333332, 0x10000, x6, 1724, x25)
+
+inst_448:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x22222221, 0x66666665, 0x3, x6, 1728, x25)
+
+inst_449:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666665, 0x55555555, x6, 1732, x25)
+
+inst_450:
+// rs1_val==1717986917 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x66666665, 0xaaaaaaaa, x6, 1736, x25)
+
+inst_451:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x147ae147, 0x66666665, 0x5, x6, 1740, x25)
+
+inst_452:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666665, 0x33333333, x6, 1744, x25)
+
+inst_453:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x66666665, 0x66666666, x6, 1748, x25)
+
+inst_454:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x90d1, 0x66666665, 0xb504, x6, 1752, x25)
+
+inst_455:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x66666665, 0x0, x6, 1756, x25)
+
+inst_456:
+// rs1_val==1717986917 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x6666, 0x66666665, 0xffff, x6, 1760, x25)
+
+inst_457:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x33333332, 0x66666665, 0x2, x6, 1764, x25)
+
+inst_458:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666665, 0x55555554, x6, 1768, x25)
+
+inst_459:
+// rs1_val==1717986917 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x66666665, 0xaaaaaaa9, x6, 1772, x25)
+
+inst_460:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x19999999, 0x66666665, 0x4, x6, 1776, x25)
+
+inst_461:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0x66666665, 0x33333332, x6, 1780, x25)
+
+inst_462:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666665, 0x66666665, x6, 1784, x25)
+
+inst_463:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x90d2, 0x66666665, 0xb503, x6, 1788, x25)
+
+inst_464:
+// rs1_val==1717986917 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x6667, 0x66666665, 0xfffe, x6, 1792, x25)
+
+inst_465:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666665, 0x55555556, x6, 1796, x25)
+
+inst_466:
+// rs1_val==1717986917 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x66666665, 0x66666665, 0x1, x6, 1800, x25)
+
+inst_467:
+// rs1_val==1717986917 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x6666, 0x66666665, 0x10000, x6, 1804, x25)
+
+inst_468:
+// rs1_val==46339 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x3c56, 0xb503, 0x3, x6, 1808, x25)
+
+inst_469:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0x55555555, x6, 1812, x25)
+
+inst_470:
+// rs1_val==46339 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0xaaaaaaaa, x6, 1816, x25)
+
+inst_471:
+// rs1_val==46339 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x2433, 0xb503, 0x5, x6, 1820, x25)
+
+inst_472:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0x33333333, x6, 1824, x25)
+
+inst_473:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0x66666666, x6, 1828, x25)
+
+inst_474:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0xb504, x6, 1832, x25)
+
+inst_475:
+// rs1_val==46339 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0xb503, 0x0, x6, 1836, x25)
+
+inst_476:
+// rs1_val==46339 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0xffff, x6, 1840, x25)
+
+inst_477:
+// rs1_val==46339 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x5a81, 0xb503, 0x2, x6, 1844, x25)
+
+inst_478:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0x55555554, x6, 1848, x25)
+
+inst_479:
+// rs1_val==46339 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0xaaaaaaa9, x6, 1852, x25)
+
+inst_480:
+// rs1_val==46339 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x2d40, 0xb503, 0x4, x6, 1856, x25)
+
+inst_481:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0x33333332, x6, 1860, x25)
+
+inst_482:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0x66666665, x6, 1864, x25)
+
+inst_483:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xb503, 0xb503, x6, 1868, x25)
+
+inst_484:
+// rs1_val==46339 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0xfffe, x6, 1872, x25)
+
+inst_485:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0x55555556, x6, 1876, x25)
+
+inst_486:
+// rs1_val==46339 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0xaaaaaaab, x6, 1880, x25)
+
+inst_487:
+// rs1_val==46339 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x1e2b, 0xb503, 0x6, x6, 1884, x25)
+
+inst_488:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0x33333334, x6, 1888, x25)
+
+inst_489:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0x66666667, x6, 1892, x25)
+
+inst_490:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0xb505, x6, 1896, x25)
+
+inst_491:
+// rs1_val==46339 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0xb503, 0xb503, 0x1, x6, 1900, x25)
+
+inst_492:
+// rs1_val==46339 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb503, 0x10000, x6, 1904, x25)
+
+inst_493:
+// rs1_val==65534 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x5554, 0xfffe, 0x3, x6, 1908, x25)
+
+inst_494:
+// rs1_val==65534 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0x55555555, x6, 1912, x25)
+
+inst_495:
+// rs1_val==65534 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0xaaaaaaaa, x6, 1916, x25)
+
+inst_496:
+// rs1_val==65534 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x3332, 0xfffe, 0x5, x6, 1920, x25)
+
+inst_497:
+// rs1_val==65534 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0x33333333, x6, 1924, x25)
+
+inst_498:
+// rs1_val==65534 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0x66666666, x6, 1928, x25)
+
+inst_499:
+// rs1_val==65534 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xfffe, 0xb504, x6, 1932, x25)
+
+inst_500:
+// rs1_val==65534 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0xfffe, 0x0, x6, 1936, x25)
+
+inst_501:
+// rs1_val==65534 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0xffff, x6, 1940, x25)
+
+inst_502:
+// rs1_val==65534 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x7fff, 0xfffe, 0x2, x6, 1944, x25)
+
+inst_503:
+// rs1_val==65534 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0x55555554, x6, 1948, x25)
+
+inst_504:
+// rs1_val==65534 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0xaaaaaaa9, x6, 1952, x25)
+
+inst_505:
+// rs1_val==65534 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x3fff, 0xfffe, 0x4, x6, 1956, x25)
+
+inst_506:
+// rs1_val==65534 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0x33333332, x6, 1960, x25)
+
+inst_507:
+// rs1_val==65534 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0x66666665, x6, 1964, x25)
+
+inst_508:
+// rs1_val==65534 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xfffe, 0xb503, x6, 1968, x25)
+
+inst_509:
+// rs1_val==65534 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0x55555556, x6, 1972, x25)
+
+inst_510:
+// rs1_val==65534 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0xaaaaaaab, x6, 1976, x25)
+
+inst_511:
+// rs1_val==65534 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x2aaa, 0xfffe, 0x6, x6, 1980, x25)
+
+inst_512:
+// rs1_val==65534 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0x33333334, x6, 1984, x25)
+
+inst_513:
+// rs1_val==65534 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0x66666667, x6, 1988, x25)
+
+inst_514:
+// rs1_val==65534 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xfffe, 0xb505, x6, 1992, x25)
+
+inst_515:
+// rs1_val==65534 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0xfffe, 0xfffe, 0x1, x6, 1996, x25)
+
+inst_516:
+// rs1_val==65534 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xfffe, 0x10000, x6, 2000, x25)
+
+inst_517:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x1c71c71c, 0x55555556, 0x3, x6, 2004, x25)
+
+inst_518:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555556, 0x55555555, x6, 2008, x25)
+
+inst_519:
+// rs1_val==1431655766 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555556, 0xaaaaaaaa, x6, 2012, x25)
+
+inst_520:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x11111111, 0x55555556, 0x5, x6, 2016, x25)
+
+inst_521:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555556, 0x33333333, x6, 2020, x25)
+
+inst_522:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555556, 0x66666666, x6, 2024, x25)
+
+inst_523:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x78ae, 0x55555556, 0xb504, x6, 2028, x25)
+
+inst_524:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x55555556, 0x0, x6, 2032, x25)
+
+inst_525:
+// rs1_val==1431655766 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x5555, 0x55555556, 0xffff, x6, 2036, x25)
+
+inst_526:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x2aaaaaab, 0x55555556, 0x2, x6, 2040, x25)
+
+inst_527:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555556, 0x55555554, x6, 2044, x25)
+RVTEST_SIGBASE( x6,signature_x6_1)
+
+inst_528:
+// rs1_val==1431655766 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555556, 0xaaaaaaa9, x6, 0, x25)
+
+inst_529:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x15555555, 0x55555556, 0x4, x6, 4, x25)
+
+inst_530:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555556, 0x33333332, x6, 8, x25)
+
+inst_531:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555556, 0x66666665, x6, 12, x25)
+
+inst_532:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x78af, 0x55555556, 0xb503, x6, 16, x25)
+
+inst_533:
+// rs1_val==1431655766 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x5556, 0x55555556, 0xfffe, x6, 20, x25)
+
+inst_534:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555556, 0x55555556, x6, 24, x25)
+
+inst_535:
+// rs1_val==1431655766 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555556, 0xaaaaaaab, x6, 28, x25)
+
+inst_536:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0xe38e38e, 0x55555556, 0x6, x6, 32, x25)
+
+inst_537:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x55555556, 0x33333334, x6, 36, x25)
+
+inst_538:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x55555556, 0x66666667, x6, 40, x25)
+
+inst_539:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x78ad, 0x55555556, 0xb505, x6, 44, x25)
+
+inst_540:
+// rs1_val==1431655766 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x55555556, 0x55555556, 0x1, x6, 48, x25)
+
+inst_541:
+// rs1_val==1431655766 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x5555, 0x55555556, 0x10000, x6, 52, x25)
+
+inst_542:
+// rs1_val==2863311531 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x38e38e39, 0xaaaaaaab, 0x3, x6, 56, x25)
+
+inst_543:
+// rs1_val==2863311531 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0xaaaaaaab, 0x55555555, x6, 60, x25)
+
+inst_544:
+// rs1_val==2863311531 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaab, 0xaaaaaaaa, x6, 64, x25)
+
+inst_545:
+// rs1_val==2863311531 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x22222222, 0xaaaaaaab, 0x5, x6, 68, x25)
+
+inst_546:
+// rs1_val==2863311531 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x3, 0xaaaaaaab, 0x33333333, x6, 72, x25)
+
+inst_547:
+// rs1_val==2863311531 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaab, 0x66666666, x6, 76, x25)
+
+inst_548:
+// rs1_val==2863311531 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0xf15d, 0xaaaaaaab, 0xb504, x6, 80, x25)
+
+inst_549:
+// rs1_val==2863311531 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0xaaaaaaab, 0x0, x6, 84, x25)
+
+inst_550:
+// rs1_val==2863311531 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0xaaab, 0xaaaaaaab, 0xffff, x6, 88, x25)
+
+inst_551:
+// rs1_val==2863311531 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x55555555, 0xaaaaaaab, 0x2, x6, 92, x25)
+
+inst_552:
+// rs1_val==2863311531 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0xaaaaaaab, 0x55555554, x6, 96, x25)
+
+inst_553:
+// rs1_val==2863311531 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaab, 0xaaaaaaa9, x6, 100, x25)
+
+inst_554:
+// rs1_val==2863311531 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x2aaaaaaa, 0xaaaaaaab, 0x4, x6, 104, x25)
+
+inst_555:
+// rs1_val==2863311531 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x3, 0xaaaaaaab, 0x33333332, x6, 108, x25)
+
+inst_556:
+// rs1_val==2863311531 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaab, 0x66666665, x6, 112, x25)
+
+inst_557:
+// rs1_val==2863311531 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0xf15e, 0xaaaaaaab, 0xb503, x6, 116, x25)
+
+inst_558:
+// rs1_val==2863311531 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0xaaac, 0xaaaaaaab, 0xfffe, x6, 120, x25)
+
+inst_559:
+// rs1_val==2863311531 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaab, 0x55555556, x6, 124, x25)
+
+inst_560:
+// rs1_val==2863311531 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaab, 0xaaaaaaab, x6, 128, x25)
+
+inst_561:
+// rs1_val==2863311531 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x1c71c71c, 0xaaaaaaab, 0x6, x6, 132, x25)
+
+inst_562:
+// rs1_val==2863311531 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x3, 0xaaaaaaab, 0x33333334, x6, 136, x25)
+
+inst_563:
+// rs1_val==2863311531 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xaaaaaaab, 0x66666667, x6, 140, x25)
+
+inst_564:
+// rs1_val==2863311531 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0xf15b, 0xaaaaaaab, 0xb505, x6, 144, x25)
+
+inst_565:
+// rs1_val==2863311531 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0xaaaaaaab, 0xaaaaaaab, 0x1, x6, 148, x25)
+
+inst_566:
+// rs1_val==2863311531 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0xaaaa, 0xaaaaaaab, 0x10000, x6, 152, x25)
+
+inst_567:
+// rs1_val==6 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0x6, 0x3, x6, 156, x25)
+
+inst_568:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0x55555555, x6, 160, x25)
+
+inst_569:
+// rs1_val==6 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0xaaaaaaaa, x6, 164, x25)
+
+inst_570:
+// rs1_val==6 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x6, 0x5, x6, 168, x25)
+
+inst_571:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0x33333333, x6, 172, x25)
+
+inst_572:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0x66666666, x6, 176, x25)
+
+inst_573:
+// rs1_val==6 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0xb504, x6, 180, x25)
+
+inst_574:
+// rs1_val==6 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x6, 0x0, x6, 184, x25)
+
+inst_575:
+// rs1_val==6 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0xffff, x6, 188, x25)
+
+inst_576:
+// rs1_val==6 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x3, 0x6, 0x2, x6, 192, x25)
+
+inst_577:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0x55555554, x6, 196, x25)
+
+inst_578:
+// rs1_val==6 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0xaaaaaaa9, x6, 200, x25)
+
+inst_579:
+// rs1_val==6 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x6, 0x4, x6, 204, x25)
+
+inst_580:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0x33333332, x6, 208, x25)
+
+inst_581:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0x66666665, x6, 212, x25)
+
+inst_582:
+// rs1_val==6 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0xb503, x6, 216, x25)
+
+inst_583:
+// rs1_val==6 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0xfffe, x6, 220, x25)
+
+inst_584:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0x55555556, x6, 224, x25)
+
+inst_585:
+// rs1_val==6 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0xaaaaaaab, x6, 228, x25)
+
+inst_586:
+// rs1_val==6 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x6, 0x6, x6, 232, x25)
+
+inst_587:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0x33333334, x6, 236, x25)
+
+inst_588:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0x66666667, x6, 240, x25)
+
+inst_589:
+// rs1_val==6 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0xb505, x6, 244, x25)
+
+inst_590:
+// rs1_val==6 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x6, 0x6, 0x1, x6, 248, x25)
+
+inst_591:
+// rs1_val==6 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x6, 0x10000, x6, 252, x25)
+
+inst_592:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x11111111, 0x33333334, 0x3, x6, 256, x25)
+
+inst_593:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333334, 0x55555555, x6, 260, x25)
+
+inst_594:
+// rs1_val==858993460 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333334, 0xaaaaaaaa, x6, 264, x25)
+
+inst_595:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x90d0, 0x66666665, 0xb505, x6, 268, x25)
+
+inst_596:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0xa3d70a4, 0x33333334, 0x5, x6, 272, x25)
+
+inst_597:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x33333334, 0x33333333, x6, 276, x25)
+
+inst_598:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333334, 0x66666666, x6, 280, x25)
+
+inst_599:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x4868, 0x33333334, 0xb504, x6, 284, x25)
+
+inst_600:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x33333334, 0x0, x6, 288, x25)
+
+inst_601:
+// rs1_val==858993460 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x3333, 0x33333334, 0xffff, x6, 292, x25)
+
+inst_602:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x1999999a, 0x33333334, 0x2, x6, 296, x25)
+
+inst_603:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333334, 0x55555554, x6, 300, x25)
+
+inst_604:
+// rs1_val==858993460 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333334, 0xaaaaaaa9, x6, 304, x25)
+
+inst_605:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0xccccccd, 0x33333334, 0x4, x6, 308, x25)
+
+inst_606:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x33333334, 0x33333332, x6, 312, x25)
+
+inst_607:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333334, 0x66666665, x6, 316, x25)
+
+inst_608:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x4869, 0x33333334, 0xb503, x6, 320, x25)
+
+inst_609:
+// rs1_val==858993460 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x3333, 0x33333334, 0xfffe, x6, 324, x25)
+
+inst_610:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333334, 0x55555556, x6, 328, x25)
+
+inst_611:
+// rs1_val==858993460 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333334, 0xaaaaaaab, x6, 332, x25)
+
+inst_612:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x8888888, 0x33333334, 0x6, x6, 336, x25)
+
+inst_613:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x33333334, 0x33333334, x6, 340, x25)
+
+inst_614:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x33333334, 0x66666667, x6, 344, x25)
+
+inst_615:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x4868, 0x33333334, 0xb505, x6, 348, x25)
+
+inst_616:
+// rs1_val==858993460 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x33333334, 0x33333334, 0x1, x6, 352, x25)
+
+inst_617:
+// rs1_val==858993460 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x3333, 0x33333334, 0x10000, x6, 356, x25)
+
+inst_618:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x22222222, 0x66666667, 0x3, x6, 360, x25)
+
+inst_619:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666667, 0x55555555, x6, 364, x25)
+
+inst_620:
+// rs1_val==1717986919 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x66666667, 0xaaaaaaaa, x6, 368, x25)
+
+inst_621:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x147ae147, 0x66666667, 0x5, x6, 372, x25)
+
+inst_622:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0x66666667, 0x33333333, x6, 376, x25)
+
+inst_623:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666667, 0x66666666, x6, 380, x25)
+
+inst_624:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x90d1, 0x66666667, 0xb504, x6, 384, x25)
+
+inst_625:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x66666667, 0x0, x6, 388, x25)
+
+inst_626:
+// rs1_val==1717986919 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x6666, 0x66666667, 0xffff, x6, 392, x25)
+
+inst_627:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x33333333, 0x66666667, 0x2, x6, 396, x25)
+
+inst_628:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666667, 0x55555554, x6, 400, x25)
+
+inst_629:
+// rs1_val==1717986919 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x66666667, 0xaaaaaaa9, x6, 404, x25)
+
+inst_630:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x19999999, 0x66666667, 0x4, x6, 408, x25)
+
+inst_631:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x2, 0x66666667, 0x33333332, x6, 412, x25)
+
+inst_632:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666667, 0x66666665, x6, 416, x25)
+
+inst_633:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x90d2, 0x66666667, 0xb503, x6, 420, x25)
+
+inst_634:
+// rs1_val==1717986919 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x6667, 0x66666667, 0xfffe, x6, 424, x25)
+
+inst_635:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666667, 0x55555556, x6, 428, x25)
+
+inst_636:
+// rs1_val==1717986919 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x66666667, 0xaaaaaaab, x6, 432, x25)
+
+inst_637:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x11111111, 0x66666667, 0x6, x6, 436, x25)
+
+inst_638:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666667, 0x33333334, x6, 440, x25)
+
+inst_639:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666667, 0x66666667, x6, 444, x25)
+
+inst_640:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x90d0, 0x66666667, 0xb505, x6, 448, x25)
+
+inst_641:
+// rs1_val==1717986919 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x66666667, 0x66666667, 0x1, x6, 452, x25)
+
+inst_642:
+// rs1_val==1717986919 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x6666, 0x66666667, 0x10000, x6, 456, x25)
+
+inst_643:
+// rs1_val==46341 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x3c57, 0xb505, 0x3, x6, 460, x25)
+
+inst_644:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0x55555555, x6, 464, x25)
+
+inst_645:
+// rs1_val==46341 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0xaaaaaaaa, x6, 468, x25)
+
+inst_646:
+// rs1_val==46341 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x2434, 0xb505, 0x5, x6, 472, x25)
+
+inst_647:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0x33333333, x6, 476, x25)
+
+inst_648:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0x66666666, x6, 480, x25)
+
+inst_649:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xb505, 0xb504, x6, 484, x25)
+
+inst_650:
+// rs1_val==46341 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0xb505, 0x0, x6, 488, x25)
+
+inst_651:
+// rs1_val==46341 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0xffff, x6, 492, x25)
+
+inst_652:
+// rs1_val==46341 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x5a82, 0xb505, 0x2, x6, 496, x25)
+
+inst_653:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0x55555554, x6, 500, x25)
+
+inst_654:
+// rs1_val==46341 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0xaaaaaaa9, x6, 504, x25)
+
+inst_655:
+// rs1_val==46341 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x2d41, 0xb505, 0x4, x6, 508, x25)
+
+inst_656:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0x33333332, x6, 512, x25)
+
+inst_657:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0x66666665, x6, 516, x25)
+
+inst_658:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xb505, 0xb503, x6, 520, x25)
+
+inst_659:
+// rs1_val==46341 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0xfffe, x6, 524, x25)
+
+inst_660:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0x55555556, x6, 528, x25)
+
+inst_661:
+// rs1_val==46341 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0xaaaaaaab, x6, 532, x25)
+
+inst_662:
+// rs1_val==46341 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x1e2b, 0xb505, 0x6, x6, 536, x25)
+
+inst_663:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0x33333334, x6, 540, x25)
+
+inst_664:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0x66666667, x6, 544, x25)
+
+inst_665:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xb505, 0xb505, x6, 548, x25)
+
+inst_666:
+// rs1_val==46341 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0xb505, 0xb505, 0x1, x6, 552, x25)
+
+inst_667:
+// rs1_val==46341 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0xb505, 0x10000, x6, 556, x25)
+
+inst_668:
+// rs1_val==1 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x3, x6, 560, x25)
+
+inst_669:
+// rs1_val==1 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x55555555, x6, 564, x25)
+
+inst_670:
+// rs1_val==1 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0xaaaaaaaa, x6, 568, x25)
+
+inst_671:
+// rs1_val==1 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x5, x6, 572, x25)
+
+inst_672:
+// rs1_val==1 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x33333333, x6, 576, x25)
+
+inst_673:
+// rs1_val==1 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x66666666, x6, 580, x25)
+
+inst_674:
+// rs1_val==1 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0xb504, x6, 584, x25)
+
+inst_675:
+// rs1_val==1 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x1, 0x0, x6, 588, x25)
+
+inst_676:
+// rs1_val==1 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0xffff, x6, 592, x25)
+
+inst_677:
+// rs1_val==1 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x2, x6, 596, x25)
+
+inst_678:
+// rs1_val==1 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x55555554, x6, 600, x25)
+
+inst_679:
+// rs1_val==1 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0xaaaaaaa9, x6, 604, x25)
+
+inst_680:
+// rs1_val==1 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x4, x6, 608, x25)
+
+inst_681:
+// rs1_val==1 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x33333332, x6, 612, x25)
+
+inst_682:
+// rs1_val==1 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x66666665, x6, 616, x25)
+
+inst_683:
+// rs1_val==1 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0xfffe, x6, 620, x25)
+
+inst_684:
+// rs1_val==1 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x55555556, x6, 624, x25)
+
+inst_685:
+// rs1_val==1 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0xaaaaaaab, x6, 628, x25)
+
+inst_686:
+// rs1_val==1 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x6, x6, 632, x25)
+
+inst_687:
+// rs1_val==1 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x33333334, x6, 636, x25)
+
+inst_688:
+// rs1_val==1 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x66666667, x6, 640, x25)
+
+inst_689:
+// rs1_val==1 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0xb505, x6, 644, x25)
+
+inst_690:
+// rs1_val==1 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x1, 0x1, x6, 648, x25)
+
+inst_691:
+// rs1_val==1 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0x10000, x6, 652, x25)
+
+inst_692:
+// rs1_val==65536 and rs2_val==3,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x3
+TEST_RR_OP(divu, x12, x10, x11, 0x5555, 0x10000, 0x3, x6, 656, x25)
+
+inst_693:
+// rs1_val==65536 and rs2_val==1431655765,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x55555555
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10000, 0x55555555, x6, 660, x25)
+
+inst_694:
+// rs1_val==65536 and rs2_val==2863311530,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xaaaaaaaa
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10000, 0xaaaaaaaa, x6, 664, x25)
+
+inst_695:
+// rs1_val==65536 and rs2_val==5,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x5
+TEST_RR_OP(divu, x12, x10, x11, 0x3333, 0x10000, 0x5, x6, 668, x25)
+
+inst_696:
+// rs1_val==65536 and rs2_val==858993459,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x33333333
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10000, 0x33333333, x6, 672, x25)
+
+inst_697:
+// rs1_val==65536 and rs2_val==1717986918,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x66666666
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10000, 0x66666666, x6, 676, x25)
+
+inst_698:
+// rs1_val==65536 and rs2_val==46340,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xb504
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x10000, 0xb504, x6, 680, x25)
+
+inst_699:
+// rs1_val==65536 and rs2_val==0,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x0
+TEST_RR_OP(divu, x12, x10, x11, 0xFFFFFFFF, 0x10000, 0x0, x6, 684, x25)
+
+inst_700:
+// rs1_val==65536 and rs2_val==65535,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xffff
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x10000, 0xffff, x6, 688, x25)
+
+inst_701:
+// rs1_val==65536 and rs2_val==2,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x2
+TEST_RR_OP(divu, x12, x10, x11, 0x8000, 0x10000, 0x2, x6, 692, x25)
+
+inst_702:
+// rs1_val==65536 and rs2_val==1431655764,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x55555554
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10000, 0x55555554, x6, 696, x25)
+
+inst_703:
+// rs1_val==65536 and rs2_val==2863311529,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xaaaaaaa9
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10000, 0xaaaaaaa9, x6, 700, x25)
+
+inst_704:
+// rs1_val==65536 and rs2_val==4,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x4
+TEST_RR_OP(divu, x12, x10, x11, 0x4000, 0x10000, 0x4, x6, 704, x25)
+
+inst_705:
+// rs1_val==65536 and rs2_val==858993458,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x33333332
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10000, 0x33333332, x6, 708, x25)
+
+inst_706:
+// rs1_val==65536 and rs2_val==1717986917,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x66666665
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10000, 0x66666665, x6, 712, x25)
+
+inst_707:
+// rs1_val==65536 and rs2_val==46339,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x10000, 0xb503, x6, 716, x25)
+
+inst_708:
+// rs1_val==65536 and rs2_val==65534,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x10000, 0xfffe, x6, 720, x25)
+
+inst_709:
+// rs1_val==65536 and rs2_val==1431655766,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x55555556
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10000, 0x55555556, x6, 724, x25)
+
+inst_710:
+// rs1_val==65536 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10000, 0xaaaaaaab, x6, 728, x25)
+
+inst_711:
+// rs1_val==65536 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x2aaa, 0x10000, 0x6, x6, 732, x25)
+
+inst_712:
+// rs1_val==65536 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10000, 0x33333334, x6, 736, x25)
+
+inst_713:
+// rs1_val==65536 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x10000, 0x66666667, x6, 740, x25)
+
+inst_714:
+// rs1_val==65536 and rs2_val==46341,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xb505
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x10000, 0xb505, x6, 744, x25)
+
+inst_715:
+// rs1_val==65536 and rs2_val==1,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x1
+TEST_RR_OP(divu, x12, x10, x11, 0x10000, 0x10000, 0x1, x6, 748, x25)
+
+inst_716:
+// rs1_val==1717986917 and rs2_val==2863311531,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaab
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x66666665, 0xaaaaaaab, x6, 752, x25)
+
+inst_717:
+// rs1_val==65536 and rs2_val==65536,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x10000
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x10000, 0x10000, x6, 756, x25)
+
+inst_718:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(divu, x12, x10, x11, 0x11111110, 0x66666665, 0x6, x6, 760, x25)
+
+inst_719:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0x66666665, 0x33333334, x6, 764, x25)
+
+inst_720:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x66666665, 0x66666667, x6, 768, x25)
+
+inst_721:
+// rs1_val == rs2_val and rs1_val > 0 and rs2_val > 0, rs1_val==65534 and rs2_val==65534
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xfffe
+TEST_RR_OP(divu, x12, x10, x11, 0x1, 0xfffe, 0xfffe, x6, 772, x25)
+
+inst_722:
+// rs1_val == 1, rs1_val==1 and rs2_val==46339
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb503
+TEST_RR_OP(divu, x12, x10, x11, 0x0, 0x1, 0xb503, x6, 776, x25)
+
+inst_723:
+// rs2_val == 262144, rs1_val == 4227858431
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xfbffffff; op2val:0x40000
+TEST_RR_OP(divu, x12, x10, x11, 0x3eff, 0xfbffffff, 0x40000, x6, 780, x25)
+
+inst_724:
+// rs2_val == 8388608,
+// opcode: divu ; op1:x10; op2:x11; dest:x12; op1val:0xffdfffff; op2val:0x800000
+TEST_RR_OP(divu, x12, x10, x11, 0x1ff, 0xffdfffff, 0x800000, x6, 784, x25)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x11_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x11_1:
+ .fill 16*(XLEN/32),4,0xdeadbeef
+
+
+signature_x6_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x6_1:
+ .fill 197*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/mul-01.S b/riscof/suite/rv32i_m/M/mul-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..447f22880eb2bf42bd85da5fe58536bf18f0d2ba
--- /dev/null
+++ b/riscof/suite/rv32i_m/M/mul-01.S
@@ -0,0 +1,3009 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:41:59 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32im.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the mul instruction of the RISC-V M extension for the mul covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IM")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*M.*);def TEST_CASE_1=True;",mul)
+
+RVTEST_SIGBASE( x4,signature_x4_1)
+
+inst_0:
+// rs1 == rd != rs2, rs1==x31, rs2==x5, rd==x31, rs1_val > 0 and rs2_val > 0, rs2_val == 65536, rs1_val != rs2_val
+// opcode: mul ; op1:x31; op2:x5; dest:x31; op1val:0x9; op2val:0x10000
+TEST_RR_OP(mul, x31, x31, x5, 0x90000, 0x9, 0x10000, x4, 0, x18)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x21, rs2==x21, rd==x8, rs1_val > 0 and rs2_val < 0, rs1_val == 32, rs2_val == -16385
+// opcode: mul ; op1:x21; op2:x21; dest:x8; op1val:0x20; op2val:0x20
+TEST_RR_OP(mul, x8, x21, x21, 0x400, 0x20, 0x20, x4, 4, x18)
+
+inst_2:
+// rs2 == rd != rs1, rs1==x11, rs2==x23, rd==x23, rs1_val < 0 and rs2_val < 0, rs2_val == -134217729
+// opcode: mul ; op1:x11; op2:x23; dest:x23; op1val:-0x55555555; op2val:-0x8000001
+TEST_RR_OP(mul, x23, x11, x23, 0xfd555555, -0x55555555, -0x8000001, x4, 8, x18)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x14, rs2==x20, rd==x7, rs1_val < 0 and rs2_val > 0, rs1_val == -513
+// opcode: mul ; op1:x14; op2:x20; dest:x7; op1val:-0x201; op2val:0x3
+TEST_RR_OP(mul, x7, x14, x20, 0xfffff9fd, -0x201, 0x3, x4, 12, x18)
+
+inst_4:
+// rs1 == rs2 == rd, rs1==x15, rs2==x15, rd==x15, rs1_val == rs2_val,
+// opcode: mul ; op1:x15; op2:x15; dest:x15; op1val:-0x1; op2val:-0x1
+TEST_RR_OP(mul, x15, x15, x15, 0x1, -0x1, -0x1, x4, 16, x18)
+
+inst_5:
+// rs1==x25, rs2==x29, rd==x16, rs2_val == (-2**(xlen-1)), rs1_val == -262145, rs2_val == -2147483648
+// opcode: mul ; op1:x25; op2:x29; dest:x16; op1val:-0x40001; op2val:-0x80000000
+TEST_RR_OP(mul, x16, x25, x29, 0x80000000, -0x40001, -0x80000000, x4, 20, x18)
+
+inst_6:
+// rs1==x29, rs2==x25, rd==x3, rs2_val == 0, rs1_val==1717986917 and rs2_val==0
+// opcode: mul ; op1:x29; op2:x25; dest:x3; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(mul, x3, x29, x25, 0x0, 0x66666665, 0x0, x4, 24, x18)
+
+inst_7:
+// rs1==x23, rs2==x28, rd==x17, rs2_val == (2**(xlen-1)-1), rs2_val == 2147483647
+// opcode: mul ; op1:x23; op2:x28; dest:x17; op1val:0xb504; op2val:0x7fffffff
+TEST_RR_OP(mul, x17, x23, x28, 0xffff4afc, 0xb504, 0x7fffffff, x4, 28, x18)
+
+inst_8:
+// rs1==x2, rs2==x19, rd==x22, rs2_val == 1, rs1_val == 2
+// opcode: mul ; op1:x2; op2:x19; dest:x22; op1val:0x2; op2val:0x1
+TEST_RR_OP(mul, x22, x2, x19, 0x2, 0x2, 0x1, x4, 32, x18)
+
+inst_9:
+// rs1==x20, rs2==x22, rd==x28, rs1_val == (-2**(xlen-1)), rs2_val == -65, rs1_val == -2147483648
+// opcode: mul ; op1:x20; op2:x22; dest:x28; op1val:-0x80000000; op2val:-0x41
+TEST_RR_OP(mul, x28, x20, x22, 0x80000000, -0x80000000, -0x41, x4, 36, x18)
+
+inst_10:
+// rs1==x3, rs2==x6, rd==x2, rs1_val == 0, rs1_val==0 and rs2_val==0
+// opcode: mul ; op1:x3; op2:x6; dest:x2; op1val:0x0; op2val:0x0
+TEST_RR_OP(mul, x2, x3, x6, 0x0, 0x0, 0x0, x4, 40, x18)
+
+inst_11:
+// rs1==x22, rs2==x11, rd==x5, rs1_val == (2**(xlen-1)-1), rs2_val == -129, rs1_val == 2147483647
+// opcode: mul ; op1:x22; op2:x11; dest:x5; op1val:0x7fffffff; op2val:-0x81
+TEST_RR_OP(mul, x5, x22, x11, 0x80000081, 0x7fffffff, -0x81, x4, 44, x18)
+
+inst_12:
+// rs1==x7, rs2==x9, rd==x13, rs1_val == 1, rs2_val == -268435457
+// opcode: mul ; op1:x7; op2:x9; dest:x13; op1val:0x1; op2val:-0x10000001
+TEST_RR_OP(mul, x13, x7, x9, 0xefffffff, 0x1, -0x10000001, x4, 48, x18)
+
+inst_13:
+// rs1==x10, rs2==x17, rd==x6, rs2_val == 2, rs1_val == 128
+// opcode: mul ; op1:x10; op2:x17; dest:x6; op1val:0x80; op2val:0x2
+TEST_RR_OP(mul, x6, x10, x17, 0x100, 0x80, 0x2, x4, 52, x18)
+
+inst_14:
+// rs1==x1, rs2==x2, rd==x30, rs2_val == 4, rs1_val==-46339 and rs2_val==4
+// opcode: mul ; op1:x1; op2:x2; dest:x30; op1val:-0xb503; op2val:0x4
+TEST_RR_OP(mul, x30, x1, x2, 0xfffd2bf4, -0xb503, 0x4, x4, 56, x18)
+
+inst_15:
+// rs1==x13, rs2==x1, rd==x25, rs2_val == 8, rs1_val == -536870913
+// opcode: mul ; op1:x13; op2:x1; dest:x25; op1val:-0x20000001; op2val:0x8
+TEST_RR_OP(mul, x25, x13, x1, 0xfffffff8, -0x20000001, 0x8, x4, 60, x18)
+
+inst_16:
+// rs1==x16, rs2==x12, rd==x29, rs2_val == 16, rs1_val == -2049
+// opcode: mul ; op1:x16; op2:x12; dest:x29; op1val:-0x801; op2val:0x10
+TEST_RR_OP(mul, x29, x16, x12, 0xffff7ff0, -0x801, 0x10, x4, 64, x18)
+
+inst_17:
+// rs1==x27, rs2==x24, rd==x21, rs2_val == 32, rs1_val == 16384
+// opcode: mul ; op1:x27; op2:x24; dest:x21; op1val:0x4000; op2val:0x20
+TEST_RR_OP(mul, x21, x27, x24, 0x80000, 0x4000, 0x20, x4, 68, x18)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_18:
+// rs1==x19, rs2==x10, rd==x14, rs2_val == 64,
+// opcode: mul ; op1:x19; op2:x10; dest:x14; op1val:0xb504; op2val:0x40
+TEST_RR_OP(mul, x14, x19, x10, 0x2d4100, 0xb504, 0x40, x2, 0, x15)
+
+inst_19:
+// rs1==x6, rs2==x14, rd==x26, rs2_val == 128, rs1_val == -5
+// opcode: mul ; op1:x6; op2:x14; dest:x26; op1val:-0x5; op2val:0x80
+TEST_RR_OP(mul, x26, x6, x14, 0xfffffd80, -0x5, 0x80, x2, 4, x15)
+
+inst_20:
+// rs1==x8, rs2==x18, rd==x12, rs2_val == 256,
+// opcode: mul ; op1:x8; op2:x18; dest:x12; op1val:0x5; op2val:0x100
+TEST_RR_OP(mul, x12, x8, x18, 0x500, 0x5, 0x100, x2, 8, x15)
+
+inst_21:
+// rs1==x30, rs2==x4, rd==x9, rs2_val == 512, rs1_val == -67108865
+// opcode: mul ; op1:x30; op2:x4; dest:x9; op1val:-0x4000001; op2val:0x200
+TEST_RR_OP(mul, x9, x30, x4, 0xfffffe00, -0x4000001, 0x200, x2, 12, x15)
+
+inst_22:
+// rs1==x5, rs2==x26, rd==x19, rs2_val == 1024, rs1_val == 8388608
+// opcode: mul ; op1:x5; op2:x26; dest:x19; op1val:0x800000; op2val:0x400
+TEST_RR_OP(mul, x19, x5, x26, 0x0, 0x800000, 0x400, x2, 16, x15)
+
+inst_23:
+// rs1==x12, rs2==x13, rd==x18, rs2_val == 2048, rs1_val == -17
+// opcode: mul ; op1:x12; op2:x13; dest:x18; op1val:-0x11; op2val:0x800
+TEST_RR_OP(mul, x18, x12, x13, 0xffff7800, -0x11, 0x800, x2, 20, x15)
+
+inst_24:
+// rs1==x18, rs2==x31, rd==x24, rs2_val == 4096,
+// opcode: mul ; op1:x18; op2:x31; dest:x24; op1val:0x33333332; op2val:0x1000
+TEST_RR_OP(mul, x24, x18, x31, 0x33332000, 0x33333332, 0x1000, x2, 24, x15)
+
+inst_25:
+// rs1==x9, rs2==x27, rd==x0, rs2_val == 8192,
+// opcode: mul ; op1:x9; op2:x27; dest:x0; op1val:0x9; op2val:0x2000
+TEST_RR_OP(mul, x0, x9, x27, 0, 0x9, 0x2000, x2, 28, x15)
+
+inst_26:
+// rs1==x17, rs2==x8, rd==x11, rs2_val == 16384, rs1_val == -2
+// opcode: mul ; op1:x17; op2:x8; dest:x11; op1val:-0x2; op2val:0x4000
+TEST_RR_OP(mul, x11, x17, x8, 0xffff8000, -0x2, 0x4000, x2, 32, x15)
+
+inst_27:
+// rs1==x0, rs2==x16, rd==x10, rs2_val == 32768,
+// opcode: mul ; op1:x0; op2:x16; dest:x10; op1val:0x0; op2val:0x8000
+TEST_RR_OP(mul, x10, x0, x16, 0x0, 0x0, 0x8000, x2, 36, x15)
+
+inst_28:
+// rs1==x26, rs2==x30, rd==x1, rs2_val == 131072, rs1_val == -1431655766
+// opcode: mul ; op1:x26; op2:x30; dest:x1; op1val:-0x55555556; op2val:0x20000
+TEST_RR_OP(mul, x1, x26, x30, 0x55540000, -0x55555556, 0x20000, x2, 40, x15)
+
+inst_29:
+// rs1==x4, rs2==x0, rd==x27, rs2_val == 262144,
+// opcode: mul ; op1:x4; op2:x0; dest:x27; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(mul, x27, x4, x0, 0x0, 0x33333334, 0x0, x2, 44, x15)
+
+inst_30:
+// rs1==x24, rs2==x7, rd==x20, rs2_val == 524288,
+// opcode: mul ; op1:x24; op2:x7; dest:x20; op1val:-0x1; op2val:0x80000
+TEST_RR_OP(mul, x20, x24, x7, 0xfff80000, -0x1, 0x80000, x2, 48, x15)
+
+inst_31:
+// rs1==x28, rs2==x3, rd==x4, rs2_val == 1048576, rs1_val == -4194305
+// opcode: mul ; op1:x28; op2:x3; dest:x4; op1val:-0x400001; op2val:0x100000
+TEST_RR_OP(mul, x4, x28, x3, 0xfff00000, -0x400001, 0x100000, x2, 52, x15)
+
+inst_32:
+// rs2_val == 2097152,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x4; op2val:0x200000
+TEST_RR_OP(mul, x12, x10, x11, 0xff800000, -0x4, 0x200000, x2, 56, x15)
+
+inst_33:
+// rs2_val == 4194304, rs1_val == -2097153
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0x400000
+TEST_RR_OP(mul, x12, x10, x11, 0xffc00000, -0x200001, 0x400000, x2, 60, x15)
+
+inst_34:
+// rs2_val == 8388608,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x800000
+TEST_RR_OP(mul, x12, x10, x11, 0x1800000, 0x3, 0x800000, x2, 64, x15)
+
+inst_35:
+// rs2_val == 16777216,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x8; op2val:0x1000000
+TEST_RR_OP(mul, x12, x10, x11, 0xf8000000, -0x8, 0x1000000, x2, 68, x15)
+
+inst_36:
+// rs2_val == 33554432, rs1_val == -9
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x2000000
+TEST_RR_OP(mul, x12, x10, x11, 0xee000000, -0x9, 0x2000000, x2, 72, x15)
+
+inst_37:
+// rs2_val == 67108864, rs1_val == 1048576
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0x4000000
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x100000, 0x4000000, x2, 76, x15)
+
+inst_38:
+// rs2_val == 134217728, rs1_val == -524289
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x8000000
+TEST_RR_OP(mul, x12, x10, x11, 0xf8000000, -0x80001, 0x8000000, x2, 80, x15)
+
+inst_39:
+// rs2_val == 268435456, rs1_val == -8193
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x10000000
+TEST_RR_OP(mul, x12, x10, x11, 0xf0000000, -0x2001, 0x10000000, x2, 84, x15)
+
+inst_40:
+// rs2_val == 536870912,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x20000000
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x20000000, x2, 88, x15)
+
+inst_41:
+// rs2_val == 1073741824,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x40000000
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x800000, 0x40000000, x2, 92, x15)
+
+inst_42:
+// rs2_val == -2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x2
+TEST_RR_OP(mul, x12, x10, x11, 0xffffffc0, 0x20, -0x2, x2, 96, x15)
+
+inst_43:
+// rs2_val == -3, rs1_val == 256
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x3
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffd00, 0x100, -0x3, x2, 100, x15)
+
+inst_44:
+// rs2_val == -5, rs1_val == 524288
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:-0x5
+TEST_RR_OP(mul, x12, x10, x11, 0xffd80000, 0x80000, -0x5, x2, 104, x15)
+
+inst_45:
+// rs2_val == -9, rs1_val == 8
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:-0x9
+TEST_RR_OP(mul, x12, x10, x11, 0xffffffb8, 0x8, -0x9, x2, 108, x15)
+
+inst_46:
+// rs2_val == -17,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:-0x11
+TEST_RR_OP(mul, x12, x10, x11, 0xff780000, 0x80000, -0x11, x2, 112, x15)
+
+inst_47:
+// rs2_val == -33, rs1_val == -3
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0x21
+TEST_RR_OP(mul, x12, x10, x11, 0x63, -0x3, -0x21, x2, 116, x15)
+
+inst_48:
+// rs2_val == -257,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x101
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffcfd, 0x3, -0x101, x2, 120, x15)
+
+inst_49:
+// rs2_val == -513,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x201
+TEST_RR_OP(mul, x12, x10, x11, 0x156, -0x55555556, -0x201, x2, 124, x15)
+
+inst_50:
+// rs2_val == -1025,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x401
+TEST_RR_OP(mul, x12, x10, x11, 0xffffebfb, 0x5, -0x401, x2, 128, x15)
+
+inst_51:
+// rs2_val == -2049,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0x801
+TEST_RR_OP(mul, x12, x10, x11, 0x1002, -0x2, -0x801, x2, 132, x15)
+
+inst_52:
+// rs2_val == -4097, rs1_val == -134217729
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x1001
+TEST_RR_OP(mul, x12, x10, x11, 0x8001001, -0x8000001, -0x1001, x2, 136, x15)
+
+inst_53:
+// rs2_val == -8193,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x2001
+TEST_RR_OP(mul, x12, x10, x11, 0x66668cce, 0x33333332, -0x2001, x2, 140, x15)
+
+inst_54:
+// rs2_val == -32769, rs1_val == 512
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:-0x8001
+TEST_RR_OP(mul, x12, x10, x11, 0xfefffe00, 0x200, -0x8001, x2, 144, x15)
+
+inst_55:
+// rs2_val == -65537,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x10001
+TEST_RR_OP(mul, x12, x10, x11, 0xb503b503, -0xb503, -0x10001, x2, 148, x15)
+
+inst_56:
+// rs2_val == -131073, rs1_val == 1431655765
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x20001
+TEST_RR_OP(mul, x12, x10, x11, 0xaaab, 0x55555555, -0x20001, x2, 152, x15)
+
+inst_57:
+// rs2_val == -262145,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0x40001
+TEST_RR_OP(mul, x12, x10, x11, 0xc0003, -0x3, -0x40001, x2, 156, x15)
+
+inst_58:
+// rs2_val == -524289, rs1_val == -16385
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:-0x80001
+TEST_RR_OP(mul, x12, x10, x11, 0x84001, -0x4001, -0x80001, x2, 160, x15)
+
+inst_59:
+// rs2_val == -1048577,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:-0x100001
+TEST_RR_OP(mul, x12, x10, x11, 0x300001, -0x200001, -0x100001, x2, 164, x15)
+
+inst_60:
+// rs2_val == -2097153,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:-0x200001
+TEST_RR_OP(mul, x12, x10, x11, 0xffffc000, 0x4000, -0x200001, x2, 168, x15)
+
+inst_61:
+// rs2_val == -4194305,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x400001
+TEST_RR_OP(mul, x12, x10, x11, 0xbebf4afb, 0xb505, -0x400001, x2, 172, x15)
+
+inst_62:
+// rs2_val == -8388609,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x800001
+TEST_RR_OP(mul, x12, x10, x11, 0x8200b504, -0xb504, -0x800001, x2, 176, x15)
+
+inst_63:
+// rs2_val == -16777217, rs1_val == -4097
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:-0x1000001
+TEST_RR_OP(mul, x12, x10, x11, 0x1001001, -0x1001, -0x1000001, x2, 180, x15)
+
+inst_64:
+// rs2_val == -33554433,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x2000001
+TEST_RR_OP(mul, x12, x10, x11, 0xf5fffffb, 0x5, -0x2000001, x2, 184, x15)
+
+inst_65:
+// rs2_val == -67108865, rs1_val == -33
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x4000001
+TEST_RR_OP(mul, x12, x10, x11, 0x84000021, -0x21, -0x4000001, x2, 188, x15)
+
+inst_66:
+// rs2_val == -536870913, rs1_val == -131073
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:-0x20000001
+TEST_RR_OP(mul, x12, x10, x11, 0x20020001, -0x20001, -0x20000001, x2, 192, x15)
+
+inst_67:
+// rs2_val == -1073741825,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x40000001
+TEST_RR_OP(mul, x12, x10, x11, 0xb504, -0xb504, -0x40000001, x2, 196, x15)
+
+inst_68:
+// rs2_val == 1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x2aaaaab, -0x8000001, 0x55555555, x2, 200, x15)
+
+inst_69:
+// rs2_val == -1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x55000000, 0x800000, -0x55555556, x2, 204, x15)
+
+inst_70:
+// rs1_val == 4, rs1_val==4 and rs2_val==1431655764
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0x55555550, 0x4, 0x55555554, x2, 208, x15)
+
+inst_71:
+// rs1_val == 16,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x9
+TEST_RR_OP(mul, x12, x10, x11, 0x90, 0x10, 0x9, x2, 212, x15)
+
+inst_72:
+// rs1_val == 64,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x40, 0x0, x2, 216, x15)
+
+inst_73:
+// rs1_val == 1024,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:-0x101
+TEST_RR_OP(mul, x12, x10, x11, 0xfffbfc00, 0x400, -0x101, x2, 220, x15)
+
+inst_74:
+// rs1_val == 2048,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x5a82000, 0x800, 0xb504, x2, 224, x15)
+
+inst_75:
+// rs1_val == 4096,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:-0x801
+TEST_RR_OP(mul, x12, x10, x11, 0xff7ff000, 0x1000, -0x801, x2, 228, x15)
+
+inst_76:
+// rs1_val == 8192,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x6000, 0x2000, 0x3, x2, 232, x15)
+
+inst_77:
+// rs1_val == 32768,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0x28000, 0x8000, 0x5, x2, 236, x15)
+
+inst_78:
+// rs1_val == 65536,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:-0xa
+TEST_RR_OP(mul, x12, x10, x11, 0xfff60000, 0x10000, -0xa, x2, 240, x15)
+
+inst_79:
+// rs1_val == 131072,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x6a060000, 0x20000, 0xb503, x2, 244, x15)
+
+inst_80:
+// rs1_val == 262144,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x180000, 0x40000, 0x6, x2, 248, x15)
+
+inst_81:
+// rs1_val == 2097152,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0x4000
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x200000, 0x4000, x2, 252, x15)
+
+inst_82:
+// rs1_val == 4194304,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:-0x800001
+TEST_RR_OP(mul, x12, x10, x11, 0xffc00000, 0x400000, -0x800001, x2, 256, x15)
+
+inst_83:
+// rs1_val == 16777216,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x32000000, 0x1000000, 0x33333332, x2, 260, x15)
+
+inst_84:
+// rs1_val == 33554432,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x40
+TEST_RR_OP(mul, x12, x10, x11, 0x80000000, 0x2000000, 0x40, x2, 264, x15)
+
+inst_85:
+// rs1_val == 67108864,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:-0x20001
+TEST_RR_OP(mul, x12, x10, x11, 0xfc000000, 0x4000000, -0x20001, x2, 268, x15)
+
+inst_86:
+// rs1_val == 134217728,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xa8000000, 0x8000000, 0x55555555, x2, 272, x15)
+
+inst_87:
+// rs1_val == 268435456,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x40000000
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x10000000, 0x40000000, x2, 276, x15)
+
+inst_88:
+// rs1_val == 536870912,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x40
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x20000000, 0x40, x2, 280, x15)
+
+inst_89:
+// rs1_val == 1073741824,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x40
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x40000000, 0x40, x2, 284, x15)
+
+inst_90:
+// rs1_val == -65,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:-0x8001
+TEST_RR_OP(mul, x12, x10, x11, 0x208041, -0x41, -0x8001, x2, 288, x15)
+
+inst_91:
+// rs1_val == -129,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:-0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x204, -0x81, -0x4, x2, 292, x15)
+
+inst_92:
+// rs1_val == -257,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:-0x100001
+TEST_RR_OP(mul, x12, x10, x11, 0x10100101, -0x101, -0x100001, x2, 296, x15)
+
+inst_93:
+// rs1_val == -1025,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, -0x401, 0x0, x2, 300, x15)
+
+inst_94:
+// rs1_val == -32769,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:-0x9
+TEST_RR_OP(mul, x12, x10, x11, 0x48009, -0x8001, -0x9, x2, 304, x15)
+
+inst_95:
+// rs1_val == -65537,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x4000
+TEST_RR_OP(mul, x12, x10, x11, 0xbfffc000, -0x10001, 0x4000, x2, 308, x15)
+
+inst_96:
+// rs1_val == -1048577,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:-0x200001
+TEST_RR_OP(mul, x12, x10, x11, 0x300001, -0x100001, -0x200001, x2, 312, x15)
+
+inst_97:
+// rs1_val == -8388609,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:-0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x1800003, -0x800001, -0x3, x2, 316, x15)
+
+inst_98:
+// rs1_val == -16777217,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, -0x1000001, 0x0, x2, 320, x15)
+
+inst_99:
+// rs1_val == -33554433,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:-0x801
+TEST_RR_OP(mul, x12, x10, x11, 0x2000801, -0x2000001, -0x801, x2, 324, x15)
+
+inst_100:
+// rs1_val == -268435457,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:-0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x30000003, -0x10000001, -0x3, x2, 328, x15)
+
+inst_101:
+// rs1_val == -1073741825,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x2000000
+TEST_RR_OP(mul, x12, x10, x11, 0xfe000000, -0x40000001, 0x2000000, x2, 332, x15)
+
+inst_102:
+// rs1_val==3 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x9, 0x3, 0x3, x2, 336, x15)
+
+inst_103:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xffffffff, 0x3, 0x55555555, x2, 340, x15)
+
+inst_104:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffffe, 0x3, -0x55555556, x2, 344, x15)
+
+inst_105:
+// rs1_val==3 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0xf, 0x3, 0x5, x2, 348, x15)
+
+inst_106:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0x99999999, 0x3, 0x33333333, x2, 352, x15)
+
+inst_107:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x33333332, 0x3, 0x66666666, x2, 356, x15)
+
+inst_108:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xfffde0f4, 0x3, -0xb504, x2, 360, x15)
+
+inst_109:
+// rs1_val==3 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x21f0c, 0x3, 0xb504, x2, 364, x15)
+
+inst_110:
+// rs1_val==3 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0x6, 0x3, 0x2, x2, 368, x15)
+
+inst_111:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffffc, 0x3, 0x55555554, x2, 372, x15)
+
+inst_112:
+// rs1_val==3 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x3, 0x0, x2, 376, x15)
+
+inst_113:
+// rs1_val==3 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0xc, 0x3, 0x4, x2, 380, x15)
+
+inst_114:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x99999996, 0x3, 0x33333332, x2, 384, x15)
+
+inst_115:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0x3333332f, 0x3, 0x66666665, x2, 388, x15)
+
+inst_116:
+// rs1_val==3 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x21f09, 0x3, 0xb503, x2, 392, x15)
+
+inst_117:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x2, 0x3, 0x55555556, x2, 396, x15)
+
+inst_118:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x1, 0x3, -0x55555555, x2, 400, x15)
+
+inst_119:
+// rs1_val==3 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x12, 0x3, 0x6, x2, 404, x15)
+
+inst_120:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x9999999c, 0x3, 0x33333334, x2, 408, x15)
+
+inst_121:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x33333335, 0x3, 0x66666667, x2, 412, x15)
+
+inst_122:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0xfffde0f7, 0x3, -0xb503, x2, 416, x15)
+
+inst_123:
+// rs1_val==3 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x21f0f, 0x3, 0xb505, x2, 420, x15)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0xffffffff, 0x55555555, 0x3, x2, 424, x15)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x38e38e39, 0x55555555, 0x55555555, x2, 428, x15)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x71c71c72, 0x55555555, -0x55555556, x2, 432, x15)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaa9, 0x55555555, 0x5, x2, 436, x15)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0xeeeeeeef, 0x55555555, 0x33333333, x2, 440, x15)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0xddddddde, 0x55555555, 0x66666666, x2, 444, x15)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x555591ac, 0x55555555, -0xb504, x2, 448, x15)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaa6e54, 0x55555555, 0xb504, x2, 452, x15)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaaa, 0x55555555, 0x2, x2, 456, x15)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0xe38e38e4, 0x55555555, 0x55555554, x2, 460, x15)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x55555555, 0x0, x2, 464, x15)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x55555554, 0x55555555, 0x4, x2, 468, x15)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x9999999a, 0x55555555, 0x33333332, x2, 472, x15)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0x88888889, 0x55555555, 0x66666665, x2, 476, x15)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x555518ff, 0x55555555, 0xb503, x2, 480, x15)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x8e38e38e, 0x55555555, 0x55555556, x2, 484, x15)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xc71c71c7, 0x55555555, -0x55555555, x2, 488, x15)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffffe, 0x55555555, 0x6, x2, 492, x15)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x44444444, 0x55555555, 0x33333334, x2, 496, x15)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x33333333, 0x55555555, 0x66666667, x2, 500, x15)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaae701, 0x55555555, -0xb503, x2, 504, x15)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0xffffc3a9, 0x55555555, 0xb505, x2, 508, x15)
+
+inst_146:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffffe, -0x55555556, 0x3, x2, 512, x15)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x71c71c72, -0x55555556, 0x55555555, x2, 516, x15)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xe38e38e4, -0x55555556, -0x55555556, x2, 520, x15)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0x55555552, -0x55555556, 0x5, x2, 524, x15)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0xddddddde, -0x55555556, 0x33333333, x2, 528, x15)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0xbbbbbbbc, -0x55555556, 0x66666666, x2, 532, x15)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xaaab2358, -0x55555556, -0xb504, x2, 536, x15)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x5554dca8, -0x55555556, 0xb504, x2, 540, x15)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0x55555554, -0x55555556, 0x2, x2, 544, x15)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0xc71c71c8, -0x55555556, 0x55555554, x2, 548, x15)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, -0x55555556, 0x0, x2, 552, x15)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaa8, -0x55555556, 0x4, x2, 556, x15)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x33333334, -0x55555556, 0x33333332, x2, 560, x15)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0x11111112, -0x55555556, 0x66666665, x2, 564, x15)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaa31fe, -0x55555556, 0xb503, x2, 568, x15)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x1c71c71c, -0x55555556, 0x55555556, x2, 572, x15)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x8e38e38e, -0x55555556, -0x55555555, x2, 576, x15)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffffc, -0x55555556, 0x6, x2, 580, x15)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x88888888, -0x55555556, 0x33333334, x2, 584, x15)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x66666666, -0x55555556, 0x66666667, x2, 588, x15)
+
+inst_166:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x5555ce02, -0x55555556, -0xb503, x2, 592, x15)
+
+inst_167:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0xffff8752, -0x55555556, 0xb505, x2, 596, x15)
+
+inst_168:
+// rs1_val==5 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0xf, 0x5, 0x3, x2, 600, x15)
+
+inst_169:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaa9, 0x5, 0x55555555, x2, 604, x15)
+
+inst_170:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x55555552, 0x5, -0x55555556, x2, 608, x15)
+
+inst_171:
+// rs1_val==5 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0x19, 0x5, 0x5, x2, 612, x15)
+
+inst_172:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0xffffffff, 0x5, 0x33333333, x2, 616, x15)
+
+inst_173:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffffe, 0x5, 0x66666666, x2, 620, x15)
+
+inst_174:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xfffc76ec, 0x5, -0xb504, x2, 624, x15)
+
+inst_175:
+// rs1_val==5 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x38914, 0x5, 0xb504, x2, 628, x15)
+
+inst_176:
+// rs1_val==5 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0xa, 0x5, 0x2, x2, 632, x15)
+
+inst_177:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaa4, 0x5, 0x55555554, x2, 636, x15)
+
+inst_178:
+// rs1_val==5 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x5, 0x0, x2, 640, x15)
+
+inst_179:
+// rs1_val==5 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x14, 0x5, 0x4, x2, 644, x15)
+
+inst_180:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffffa, 0x5, 0x33333332, x2, 648, x15)
+
+inst_181:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffff9, 0x5, 0x66666665, x2, 652, x15)
+
+inst_182:
+// rs1_val==5 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x3890f, 0x5, 0xb503, x2, 656, x15)
+
+inst_183:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaae, 0x5, 0x55555556, x2, 660, x15)
+
+inst_184:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x55555557, 0x5, -0x55555555, x2, 664, x15)
+
+inst_185:
+// rs1_val==5 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x1e, 0x5, 0x6, x2, 668, x15)
+
+inst_186:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x4, 0x5, 0x33333334, x2, 672, x15)
+
+inst_187:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x3, 0x5, 0x66666667, x2, 676, x15)
+
+inst_188:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0xfffc76f1, 0x5, -0xb503, x2, 680, x15)
+
+inst_189:
+// rs1_val==5 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x38919, 0x5, 0xb505, x2, 684, x15)
+
+inst_190:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x99999999, 0x33333333, 0x3, x2, 688, x15)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xeeeeeeef, 0x33333333, 0x55555555, x2, 692, x15)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xddddddde, 0x33333333, -0x55555556, x2, 696, x15)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0xffffffff, 0x33333333, 0x5, x2, 700, x15)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0xc28f5c29, 0x33333333, 0x33333333, x2, 704, x15)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x851eb852, 0x33333333, 0x66666666, x2, 708, x15)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x2434, 0x33333333, -0xb504, x2, 712, x15)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xffffdbcc, 0x33333333, 0xb504, x2, 716, x15)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0x66666666, 0x33333333, 0x2, x2, 720, x15)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0xbbbbbbbc, 0x33333333, 0x55555554, x2, 724, x15)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x33333333, 0x0, x2, 728, x15)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0xcccccccc, 0x33333333, 0x4, x2, 732, x15)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x8f5c28f6, 0x33333333, 0x33333332, x2, 736, x15)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0x51eb851f, 0x33333333, 0x66666665, x2, 740, x15)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0xcccca899, 0x33333333, 0xb503, x2, 744, x15)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x22222222, 0x33333333, 0x55555556, x2, 748, x15)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x11111111, 0x33333333, -0x55555555, x2, 752, x15)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x33333332, 0x33333333, 0x6, x2, 756, x15)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0xf5c28f5c, 0x33333333, 0x33333334, x2, 760, x15)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0xb851eb85, 0x33333333, 0x66666667, x2, 764, x15)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x33335767, 0x33333333, -0xb503, x2, 768, x15)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x33330eff, 0x33333333, 0xb505, x2, 772, x15)
+
+inst_212:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x33333332, 0x66666666, 0x3, x2, 776, x15)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xddddddde, 0x66666666, 0x55555555, x2, 780, x15)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xbbbbbbbc, 0x66666666, -0x55555556, x2, 784, x15)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffffe, 0x66666666, 0x5, x2, 788, x15)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0x851eb852, 0x66666666, 0x33333333, x2, 792, x15)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0xa3d70a4, 0x66666666, 0x66666666, x2, 796, x15)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x4868, 0x66666666, -0xb504, x2, 800, x15)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xffffb798, 0x66666666, 0xb504, x2, 804, x15)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0xcccccccc, 0x66666666, 0x2, x2, 808, x15)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0x77777778, 0x66666666, 0x55555554, x2, 812, x15)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x66666666, 0x0, x2, 816, x15)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x99999998, 0x66666666, 0x4, x2, 820, x15)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x1eb851ec, 0x66666666, 0x33333332, x2, 824, x15)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0xa3d70a3e, 0x66666666, 0x66666665, x2, 828, x15)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x99995132, 0x66666666, 0xb503, x2, 832, x15)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x44444444, 0x66666666, 0x55555556, x2, 836, x15)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x22222222, 0x66666666, -0x55555555, x2, 840, x15)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x66666664, 0x66666666, 0x6, x2, 844, x15)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0xeb851eb8, 0x66666666, 0x33333334, x2, 848, x15)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x70a3d70a, 0x66666666, 0x66666667, x2, 852, x15)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x6666aece, 0x66666666, -0xb503, x2, 856, x15)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x66661dfe, 0x66666666, 0xb505, x2, 860, x15)
+
+inst_234:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0xfffde0f4, -0xb504, 0x3, x2, 864, x15)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x555591ac, -0xb504, 0x55555555, x2, 868, x15)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xaaab2358, -0xb504, -0x55555556, x2, 872, x15)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0xfffc76ec, -0xb504, 0x5, x2, 876, x15)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0x2434, -0xb504, 0x33333333, x2, 880, x15)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x4868, -0xb504, 0x66666666, x2, 884, x15)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x7ffea810, -0xb504, -0xb504, x2, 888, x15)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x800157f0, -0xb504, 0xb504, x2, 892, x15)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0xfffe95f8, -0xb504, 0x2, x2, 896, x15)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0x555646b0, -0xb504, 0x55555554, x2, 900, x15)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, -0xb504, 0x0, x2, 904, x15)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0xfffd2bf0, -0xb504, 0x4, x2, 908, x15)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0xd938, -0xb504, 0x33333332, x2, 912, x15)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0xfd6c, -0xb504, 0x66666665, x2, 916, x15)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x80020cf4, -0xb504, 0xb503, x2, 920, x15)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x5554dca8, -0xb504, 0x55555556, x2, 924, x15)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaa6e54, -0xb504, -0x55555555, x2, 928, x15)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0xfffbc1e8, -0xb504, 0x6, x2, 932, x15)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0xffff6f30, -0xb504, 0x33333334, x2, 936, x15)
+
+inst_253:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0xffff9364, -0xb504, 0x66666667, x2, 940, x15)
+
+inst_254:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x7ffdf30c, -0xb504, -0xb503, x2, 944, x15)
+
+inst_255:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x8000a2ec, -0xb504, 0xb505, x2, 948, x15)
+
+inst_256:
+// rs1_val==46340 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x21f0c, 0xb504, 0x3, x2, 952, x15)
+
+inst_257:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaa6e54, 0xb504, 0x55555555, x2, 956, x15)
+
+inst_258:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x5554dca8, 0xb504, -0x55555556, x2, 960, x15)
+
+inst_259:
+// rs1_val==46340 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0x38914, 0xb504, 0x5, x2, 964, x15)
+
+inst_260:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0xffffdbcc, 0xb504, 0x33333333, x2, 968, x15)
+
+inst_261:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0xffffb798, 0xb504, 0x66666666, x2, 972, x15)
+
+inst_262:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x800157f0, 0xb504, -0xb504, x2, 976, x15)
+
+inst_263:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x7ffea810, 0xb504, 0xb504, x2, 980, x15)
+
+inst_264:
+// rs1_val==46340 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0x16a08, 0xb504, 0x2, x2, 984, x15)
+
+inst_265:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0xaaa9b950, 0xb504, 0x55555554, x2, 988, x15)
+
+inst_266:
+// rs1_val==46340 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0xb504, 0x0, x2, 992, x15)
+
+inst_267:
+// rs1_val==46340 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x2d410, 0xb504, 0x4, x2, 996, x15)
+
+inst_268:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0xffff26c8, 0xb504, 0x33333332, x2, 1000, x15)
+
+inst_269:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0xffff0294, 0xb504, 0x66666665, x2, 1004, x15)
+
+inst_270:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x7ffdf30c, 0xb504, 0xb503, x2, 1008, x15)
+
+inst_271:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xaaab2358, 0xb504, 0x55555556, x2, 1012, x15)
+
+inst_272:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x555591ac, 0xb504, -0x55555555, x2, 1016, x15)
+
+inst_273:
+// rs1_val==46340 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x43e18, 0xb504, 0x6, x2, 1020, x15)
+
+inst_274:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x90d0, 0xb504, 0x33333334, x2, 1024, x15)
+
+inst_275:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x6c9c, 0xb504, 0x66666667, x2, 1028, x15)
+
+inst_276:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x80020cf4, 0xb504, -0xb503, x2, 1032, x15)
+
+inst_277:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x7fff5d14, 0xb504, 0xb505, x2, 1036, x15)
+
+inst_278:
+// rs1_val==2 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x6, 0x2, 0x3, x2, 1040, x15)
+
+inst_279:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaaa, 0x2, 0x55555555, x2, 1044, x15)
+
+inst_280:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x55555554, 0x2, -0x55555556, x2, 1048, x15)
+
+inst_281:
+// rs1_val==2 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0xa, 0x2, 0x5, x2, 1052, x15)
+
+inst_282:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0x66666666, 0x2, 0x33333333, x2, 1056, x15)
+
+inst_283:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0xcccccccc, 0x2, 0x66666666, x2, 1060, x15)
+
+inst_284:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xfffe95f8, 0x2, -0xb504, x2, 1064, x15)
+
+inst_285:
+// rs1_val==2 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x16a08, 0x2, 0xb504, x2, 1068, x15)
+
+inst_286:
+// rs1_val==2 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0x4, 0x2, 0x2, x2, 1072, x15)
+
+inst_287:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaa8, 0x2, 0x55555554, x2, 1076, x15)
+
+inst_288:
+// rs1_val==2 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x2, 0x0, x2, 1080, x15)
+
+inst_289:
+// rs1_val==2 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x8, 0x2, 0x4, x2, 1084, x15)
+
+inst_290:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x66666664, 0x2, 0x33333332, x2, 1088, x15)
+
+inst_291:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0xccccccca, 0x2, 0x66666665, x2, 1092, x15)
+
+inst_292:
+// rs1_val==2 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x16a06, 0x2, 0xb503, x2, 1096, x15)
+
+inst_293:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaac, 0x2, 0x55555556, x2, 1100, x15)
+
+inst_294:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x55555556, 0x2, -0x55555555, x2, 1104, x15)
+
+inst_295:
+// rs1_val==2 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0xc, 0x2, 0x6, x2, 1108, x15)
+
+inst_296:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x66666668, 0x2, 0x33333334, x2, 1112, x15)
+
+inst_297:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0xccccccce, 0x2, 0x66666667, x2, 1116, x15)
+
+inst_298:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0xfffe95fa, 0x2, -0xb503, x2, 1120, x15)
+
+inst_299:
+// rs1_val==2 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x16a0a, 0x2, 0xb505, x2, 1124, x15)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffffc, 0x55555554, 0x3, x2, 1128, x15)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xe38e38e4, 0x55555554, 0x55555555, x2, 1132, x15)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xc71c71c8, 0x55555554, -0x55555556, x2, 1136, x15)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaa4, 0x55555554, 0x5, x2, 1140, x15)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0xbbbbbbbc, 0x55555554, 0x33333333, x2, 1144, x15)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x77777778, 0x55555554, 0x66666666, x2, 1148, x15)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x555646b0, 0x55555554, -0xb504, x2, 1152, x15)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xaaa9b950, 0x55555554, 0xb504, x2, 1156, x15)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaa8, 0x55555554, 0x2, x2, 1160, x15)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0x8e38e390, 0x55555554, 0x55555554, x2, 1164, x15)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x55555554, 0x0, x2, 1168, x15)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x55555550, 0x55555554, 0x4, x2, 1172, x15)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x66666668, 0x55555554, 0x33333332, x2, 1176, x15)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0x22222224, 0x55555554, 0x66666665, x2, 1180, x15)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x555463fc, 0x55555554, 0xb503, x2, 1184, x15)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x38e38e38, 0x55555554, 0x55555556, x2, 1188, x15)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x1c71c71c, 0x55555554, -0x55555555, x2, 1192, x15)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffff8, 0x55555554, 0x6, x2, 1196, x15)
+
+inst_318:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x11111110, 0x55555554, 0x33333334, x2, 1200, x15)
+
+inst_319:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0xcccccccc, 0x55555554, 0x66666667, x2, 1204, x15)
+
+inst_320:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0xaaab9c04, 0x55555554, -0xb503, x2, 1208, x15)
+
+inst_321:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0xffff0ea4, 0x55555554, 0xb505, x2, 1212, x15)
+
+inst_322:
+// rs1_val==0 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x3, x2, 1216, x15)
+
+inst_323:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x55555555, x2, 1220, x15)
+
+inst_324:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, -0x55555556, x2, 1224, x15)
+
+inst_325:
+// rs1_val==0 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x5, x2, 1228, x15)
+
+inst_326:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x33333333, x2, 1232, x15)
+
+inst_327:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x38e38e39, -0x55555555, -0x55555555, x2, 1236, x15)
+
+inst_328:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x2, -0x55555555, 0x6, x2, 1240, x15)
+
+inst_329:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0xbbbbbbbc, -0x55555555, 0x33333334, x2, 1244, x15)
+
+inst_330:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0xcccccccd, -0x55555555, 0x66666667, x2, 1248, x15)
+
+inst_331:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x555518ff, -0x55555555, -0xb503, x2, 1252, x15)
+
+inst_332:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x3c57, -0x55555555, 0xb505, x2, 1256, x15)
+
+inst_333:
+// rs1_val==6 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x12, 0x6, 0x3, x2, 1260, x15)
+
+inst_334:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffffe, 0x6, 0x55555555, x2, 1264, x15)
+
+inst_335:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffffc, 0x6, -0x55555556, x2, 1268, x15)
+
+inst_336:
+// rs1_val==6 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0x1e, 0x6, 0x5, x2, 1272, x15)
+
+inst_337:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0x33333332, 0x6, 0x33333333, x2, 1276, x15)
+
+inst_338:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x66666664, 0x6, 0x66666666, x2, 1280, x15)
+
+inst_339:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xfffbc1e8, 0x6, -0xb504, x2, 1284, x15)
+
+inst_340:
+// rs1_val==6 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x43e18, 0x6, 0xb504, x2, 1288, x15)
+
+inst_341:
+// rs1_val==6 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0xc, 0x6, 0x2, x2, 1292, x15)
+
+inst_342:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffff8, 0x6, 0x55555554, x2, 1296, x15)
+
+inst_343:
+// rs1_val==6 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x6, 0x0, x2, 1300, x15)
+
+inst_344:
+// rs1_val==6 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x18, 0x6, 0x4, x2, 1304, x15)
+
+inst_345:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x3333332c, 0x6, 0x33333332, x2, 1308, x15)
+
+inst_346:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0x6666665e, 0x6, 0x66666665, x2, 1312, x15)
+
+inst_347:
+// rs1_val==6 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x43e12, 0x6, 0xb503, x2, 1316, x15)
+
+inst_348:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x4, 0x6, 0x55555556, x2, 1320, x15)
+
+inst_349:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x2, 0x6, -0x55555555, x2, 1324, x15)
+
+inst_350:
+// rs1_val==6 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x24, 0x6, 0x6, x2, 1328, x15)
+
+inst_351:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x33333338, 0x6, 0x33333334, x2, 1332, x15)
+
+inst_352:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x6666666a, 0x6, 0x66666667, x2, 1336, x15)
+
+inst_353:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0xfffbc1ee, 0x6, -0xb503, x2, 1340, x15)
+
+inst_354:
+// rs1_val==6 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x43e1e, 0x6, 0xb505, x2, 1344, x15)
+
+inst_355:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x9999999c, 0x33333334, 0x3, x2, 1348, x15)
+
+inst_356:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x44444444, 0x33333334, 0x55555555, x2, 1352, x15)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x88888888, 0x33333334, -0x55555556, x2, 1356, x15)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0x4, 0x33333334, 0x5, x2, 1360, x15)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0xf5c28f5c, 0x33333334, 0x33333333, x2, 1364, x15)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0xeb851eb8, 0x33333334, 0x66666666, x2, 1368, x15)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xffff6f30, 0x33333334, -0xb504, x2, 1372, x15)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x90d0, 0x33333334, 0xb504, x2, 1376, x15)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0x66666668, 0x33333334, 0x2, x2, 1380, x15)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0x11111110, 0x33333334, 0x55555554, x2, 1384, x15)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x33333334, 0x0, x2, 1388, x15)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0xccccccd0, 0x33333334, 0x4, x2, 1392, x15)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0xc28f5c28, 0x33333334, 0x33333332, x2, 1396, x15)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0xb851eb84, 0x33333334, 0x66666665, x2, 1400, x15)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0xcccd5d9c, 0x33333334, 0xb503, x2, 1404, x15)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x77777778, 0x33333334, 0x55555556, x2, 1408, x15)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xbbbbbbbc, 0x33333334, -0x55555555, x2, 1412, x15)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x33333338, 0x33333334, 0x6, x2, 1416, x15)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x28f5c290, 0x33333334, 0x33333334, x2, 1420, x15)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x1eb851ec, 0x33333334, 0x66666667, x2, 1424, x15)
+
+inst_375:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x3332a264, 0x33333334, -0xb503, x2, 1428, x15)
+
+inst_376:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x3333c404, 0x33333334, 0xb505, x2, 1432, x15)
+
+inst_377:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x33333335, 0x66666667, 0x3, x2, 1436, x15)
+
+inst_378:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x33333333, 0x66666667, 0x55555555, x2, 1440, x15)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x66666666, 0x66666667, -0x55555556, x2, 1444, x15)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0x3, 0x66666667, 0x5, x2, 1448, x15)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0xb851eb85, 0x66666667, 0x33333333, x2, 1452, x15)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x70a3d70a, 0x66666667, 0x66666666, x2, 1456, x15)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xffff9364, 0x66666667, -0xb504, x2, 1460, x15)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x6c9c, 0x66666667, 0xb504, x2, 1464, x15)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0xccccccce, 0x66666667, 0x2, x2, 1468, x15)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0xcccccccc, 0x66666667, 0x55555554, x2, 1472, x15)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x66666667, 0x0, x2, 1476, x15)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x9999999c, 0x66666667, 0x4, x2, 1480, x15)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x51eb851e, 0x66666667, 0x33333332, x2, 1484, x15)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0xa3d70a3, 0x66666667, 0x66666665, x2, 1488, x15)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x999a0635, 0x66666667, 0xb503, x2, 1492, x15)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x9999999a, 0x66666667, 0x55555556, x2, 1496, x15)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xcccccccd, 0x66666667, -0x55555555, x2, 1500, x15)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x6666666a, 0x66666667, 0x6, x2, 1504, x15)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x1eb851ec, 0x66666667, 0x33333334, x2, 1508, x15)
+
+inst_396:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0xd70a3d71, 0x66666667, 0x66666667, x2, 1512, x15)
+
+inst_397:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x6665f9cb, 0x66666667, -0xb503, x2, 1516, x15)
+
+inst_398:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x6666d303, 0x66666667, 0xb505, x2, 1520, x15)
+
+inst_399:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0xfffde0f7, -0xb503, 0x3, x2, 1524, x15)
+
+inst_400:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaae701, -0xb503, 0x55555555, x2, 1528, x15)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x5555ce02, -0xb503, -0x55555556, x2, 1532, x15)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0xfffc76f1, -0xb503, 0x5, x2, 1536, x15)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0x33335767, -0xb503, 0x33333333, x2, 1540, x15)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x6666aece, -0xb503, 0x66666666, x2, 1544, x15)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x7ffdf30c, -0xb503, -0xb504, x2, 1548, x15)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x80020cf4, -0xb503, 0xb504, x2, 1552, x15)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0xfffe95fa, -0xb503, 0x2, x2, 1556, x15)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0xaaab9c04, -0xb503, 0x55555554, x2, 1560, x15)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, -0xb503, 0x0, x2, 1564, x15)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x33340c6a, -0xb503, 0x33333332, x2, 1568, x15)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0x666763d1, -0xb503, 0x66666665, x2, 1572, x15)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x8002c1f7, -0xb503, 0xb503, x2, 1576, x15)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaa31fe, -0xb503, 0x55555556, x2, 1580, x15)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x555518ff, -0xb503, -0x55555555, x2, 1584, x15)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0xfffbc1ee, -0xb503, 0x6, x2, 1588, x15)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x3332a264, -0xb503, 0x33333334, x2, 1592, x15)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x6665f9cb, -0xb503, 0x66666667, x2, 1596, x15)
+
+inst_418:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x7ffd3e09, -0xb503, -0xb503, x2, 1600, x15)
+
+inst_419:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x800157f1, -0xb503, 0xb505, x2, 1604, x15)
+
+inst_420:
+// rs1_val==46341 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x21f0f, 0xb505, 0x3, x2, 1608, x15)
+
+inst_421:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xffffc3a9, 0xb505, 0x55555555, x2, 1612, x15)
+
+inst_422:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xffff8752, 0xb505, -0x55555556, x2, 1616, x15)
+
+inst_423:
+// rs1_val==46341 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0x38919, 0xb505, 0x5, x2, 1620, x15)
+
+inst_424:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0x33330eff, 0xb505, 0x33333333, x2, 1624, x15)
+
+inst_425:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x66661dfe, 0xb505, 0x66666666, x2, 1628, x15)
+
+inst_426:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x8000a2ec, 0xb505, -0xb504, x2, 1632, x15)
+
+inst_427:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x7fff5d14, 0xb505, 0xb504, x2, 1636, x15)
+
+inst_428:
+// rs1_val==46341 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0x16a0a, 0xb505, 0x2, x2, 1640, x15)
+
+inst_429:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0xffff0ea4, 0xb505, 0x55555554, x2, 1644, x15)
+
+inst_430:
+// rs1_val==46341 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0xb505, 0x0, x2, 1648, x15)
+
+inst_431:
+// rs1_val==46341 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x2d414, 0xb505, 0x4, x2, 1652, x15)
+
+inst_432:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x333259fa, 0xb505, 0x33333332, x2, 1656, x15)
+
+inst_433:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0x666568f9, 0xb505, 0x66666665, x2, 1660, x15)
+
+inst_434:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x7ffea80f, 0xb505, 0xb503, x2, 1664, x15)
+
+inst_435:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x78ae, 0xb505, 0x55555556, x2, 1668, x15)
+
+inst_436:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x3c57, 0xb505, -0x55555555, x2, 1672, x15)
+
+inst_437:
+// rs1_val==46341 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x43e1e, 0xb505, 0x6, x2, 1676, x15)
+
+inst_438:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x3333c404, 0xb505, 0x33333334, x2, 1680, x15)
+
+inst_439:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x6666d303, 0xb505, 0x66666667, x2, 1684, x15)
+
+inst_440:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x800157f1, 0xb505, -0xb503, x2, 1688, x15)
+
+inst_441:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x80001219, 0xb505, 0xb505, x2, 1692, x15)
+
+inst_442:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x66666666, x2, 1696, x15)
+
+inst_443:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, -0xb504, x2, 1700, x15)
+
+inst_444:
+// rs1_val==0 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0xb504, x2, 1704, x15)
+
+inst_445:
+// rs1_val==0 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x2, x2, 1708, x15)
+
+inst_446:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x55555554, x2, 1712, x15)
+
+inst_447:
+// rs1_val==0 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x4, x2, 1716, x15)
+
+inst_448:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x33333332, x2, 1720, x15)
+
+inst_449:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x66666665, x2, 1724, x15)
+
+inst_450:
+// rs1_val==0 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0xb503, x2, 1728, x15)
+
+inst_451:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x55555556, x2, 1732, x15)
+
+inst_452:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, -0x55555555, x2, 1736, x15)
+
+inst_453:
+// rs1_val==0 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x6, x2, 1740, x15)
+
+inst_454:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x33333334, x2, 1744, x15)
+
+inst_455:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0x66666667, x2, 1748, x15)
+
+inst_456:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, -0xb503, x2, 1752, x15)
+
+inst_457:
+// rs1_val==0 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x0, 0xb505, x2, 1756, x15)
+
+inst_458:
+// rs1_val==4 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0xc, 0x4, 0x3, x2, 1760, x15)
+
+inst_459:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x55555554, 0x4, 0x55555555, x2, 1764, x15)
+
+inst_460:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaa8, 0x4, -0x55555556, x2, 1768, x15)
+
+inst_461:
+// rs1_val==4 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0x14, 0x4, 0x5, x2, 1772, x15)
+
+inst_462:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0xcccccccc, 0x4, 0x33333333, x2, 1776, x15)
+
+inst_463:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x99999998, 0x4, 0x66666666, x2, 1780, x15)
+
+inst_464:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xfffd2bf0, 0x4, -0xb504, x2, 1784, x15)
+
+inst_465:
+// rs1_val==4 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x2d410, 0x4, 0xb504, x2, 1788, x15)
+
+inst_466:
+// rs1_val==4 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0x8, 0x4, 0x2, x2, 1792, x15)
+
+inst_467:
+// rs1_val==4 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x4, 0x0, x2, 1796, x15)
+
+inst_468:
+// rs1_val==4 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x10, 0x4, 0x4, x2, 1800, x15)
+
+inst_469:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0xccccccc8, 0x4, 0x33333332, x2, 1804, x15)
+
+inst_470:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0x99999994, 0x4, 0x66666665, x2, 1808, x15)
+
+inst_471:
+// rs1_val==4 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x2d40c, 0x4, 0xb503, x2, 1812, x15)
+
+inst_472:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x55555558, 0x4, 0x55555556, x2, 1816, x15)
+
+inst_473:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaac, 0x4, -0x55555555, x2, 1820, x15)
+
+inst_474:
+// rs1_val==4 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x18, 0x4, 0x6, x2, 1824, x15)
+
+inst_475:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0xccccccd0, 0x4, 0x33333334, x2, 1828, x15)
+
+inst_476:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x9999999c, 0x4, 0x66666667, x2, 1832, x15)
+
+inst_477:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0xfffd2bf4, 0x4, -0xb503, x2, 1836, x15)
+
+inst_478:
+// rs1_val==4 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x2d414, 0x4, 0xb505, x2, 1840, x15)
+
+inst_479:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x99999996, 0x33333332, 0x3, x2, 1844, x15)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x9999999a, 0x33333332, 0x55555555, x2, 1848, x15)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x33333334, 0x33333332, -0x55555556, x2, 1852, x15)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffffa, 0x33333332, 0x5, x2, 1856, x15)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0x8f5c28f6, 0x33333332, 0x33333333, x2, 1860, x15)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x1eb851ec, 0x33333332, 0x66666666, x2, 1864, x15)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xd938, 0x33333332, -0xb504, x2, 1868, x15)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xffff26c8, 0x33333332, 0xb504, x2, 1872, x15)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0x66666664, 0x33333332, 0x2, x2, 1876, x15)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0x66666668, 0x33333332, 0x55555554, x2, 1880, x15)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x33333332, 0x0, x2, 1884, x15)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0xccccccc8, 0x33333332, 0x4, x2, 1888, x15)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x5c28f5c4, 0x33333332, 0x33333332, x2, 1892, x15)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0xeb851eba, 0x33333332, 0x66666665, x2, 1896, x15)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0xcccbf396, 0x33333332, 0xb503, x2, 1900, x15)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xcccccccc, 0x33333332, 0x55555556, x2, 1904, x15)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x66666666, 0x33333332, -0x55555555, x2, 1908, x15)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x3333332c, 0x33333332, 0x6, x2, 1912, x15)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0xc28f5c28, 0x33333332, 0x33333334, x2, 1916, x15)
+
+inst_498:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x51eb851e, 0x33333332, 0x66666667, x2, 1920, x15)
+
+inst_499:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x33340c6a, 0x33333332, -0xb503, x2, 1924, x15)
+
+inst_500:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x333259fa, 0x33333332, 0xb505, x2, 1928, x15)
+
+inst_501:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x3333332f, 0x66666665, 0x3, x2, 1932, x15)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x88888889, 0x66666665, 0x55555555, x2, 1936, x15)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x11111112, 0x66666665, -0x55555556, x2, 1940, x15)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0xfffffff9, 0x66666665, 0x5, x2, 1944, x15)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0x51eb851f, 0x66666665, 0x33333333, x2, 1948, x15)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0xa3d70a3e, 0x66666665, 0x66666666, x2, 1952, x15)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xfd6c, 0x66666665, -0xb504, x2, 1956, x15)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xffff0294, 0x66666665, 0xb504, x2, 1960, x15)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0xccccccca, 0x66666665, 0x2, x2, 1964, x15)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0x22222224, 0x66666665, 0x55555554, x2, 1968, x15)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x99999994, 0x66666665, 0x4, x2, 1972, x15)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0xeb851eba, 0x66666665, 0x33333332, x2, 1976, x15)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0x3d70a3d9, 0x66666665, 0x66666665, x2, 1980, x15)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x99989c2f, 0x66666665, 0xb503, x2, 1984, x15)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xeeeeeeee, 0x66666665, 0x55555556, x2, 1988, x15)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x77777777, 0x66666665, -0x55555555, x2, 1992, x15)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x6666665e, 0x66666665, 0x6, x2, 1996, x15)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0xb851eb84, 0x66666665, 0x33333334, x2, 2000, x15)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0xa3d70a3, 0x66666665, 0x66666667, x2, 2004, x15)
+
+inst_520:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x666763d1, 0x66666665, -0xb503, x2, 2008, x15)
+
+inst_521:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x666568f9, 0x66666665, 0xb505, x2, 2012, x15)
+
+inst_522:
+// rs1_val==46339 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x21f09, 0xb503, 0x3, x2, 2016, x15)
+
+inst_523:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x555518ff, 0xb503, 0x55555555, x2, 2020, x15)
+
+inst_524:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaa31fe, 0xb503, -0x55555556, x2, 2024, x15)
+
+inst_525:
+// rs1_val==46339 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0x3890f, 0xb503, 0x5, x2, 2028, x15)
+
+inst_526:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0xcccca899, 0xb503, 0x33333333, x2, 2032, x15)
+
+inst_527:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x99995132, 0xb503, 0x66666666, x2, 2036, x15)
+
+inst_528:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x80020cf4, 0xb503, -0xb504, x2, 2040, x15)
+
+inst_529:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x7ffdf30c, 0xb503, 0xb504, x2, 2044, x15)
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_530:
+// rs1_val==46339 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0x16a06, 0xb503, 0x2, x2, 0, x15)
+
+inst_531:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0x555463fc, 0xb503, 0x55555554, x2, 4, x15)
+
+inst_532:
+// rs1_val==46339 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0xb503, 0x0, x2, 8, x15)
+
+inst_533:
+// rs1_val==46339 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x2d40c, 0xb503, 0x4, x2, 12, x15)
+
+inst_534:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0xcccbf396, 0xb503, 0x33333332, x2, 16, x15)
+
+inst_535:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0x99989c2f, 0xb503, 0x66666665, x2, 20, x15)
+
+inst_536:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x7ffd3e09, 0xb503, 0xb503, x2, 24, x15)
+
+inst_537:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x5555ce02, 0xb503, 0x55555556, x2, 28, x15)
+
+inst_538:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaae701, 0xb503, -0x55555555, x2, 32, x15)
+
+inst_539:
+// rs1_val==46339 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x43e12, 0xb503, 0x6, x2, 36, x15)
+
+inst_540:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0xcccd5d9c, 0xb503, 0x33333334, x2, 40, x15)
+
+inst_541:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x999a0635, 0xb503, 0x66666667, x2, 44, x15)
+
+inst_542:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x8002c1f7, 0xb503, -0xb503, x2, 48, x15)
+
+inst_543:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x7ffea80f, 0xb503, 0xb505, x2, 52, x15)
+
+inst_544:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x2, 0x55555556, 0x3, x2, 56, x15)
+
+inst_545:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x8e38e38e, 0x55555556, 0x55555555, x2, 60, x15)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x1c71c71c, 0x55555556, -0x55555556, x2, 64, x15)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaae, 0x55555556, 0x5, x2, 68, x15)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0x22222222, 0x55555556, 0x33333333, x2, 72, x15)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x44444444, 0x55555556, 0x66666666, x2, 76, x15)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x5554dca8, 0x55555556, -0xb504, x2, 80, x15)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xaaab2358, 0x55555556, 0xb504, x2, 84, x15)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaac, 0x55555556, 0x2, x2, 88, x15)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0x38e38e38, 0x55555556, 0x55555554, x2, 92, x15)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, 0x55555556, 0x0, x2, 96, x15)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0x55555558, 0x55555556, 0x4, x2, 100, x15)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0xcccccccc, 0x55555556, 0x33333332, x2, 104, x15)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0xeeeeeeee, 0x55555556, 0x66666665, x2, 108, x15)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0x5555ce02, 0x55555556, 0xb503, x2, 112, x15)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0xe38e38e4, 0x55555556, 0x55555556, x2, 116, x15)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0x71c71c72, 0x55555556, -0x55555555, x2, 120, x15)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(mul, x12, x10, x11, 0x4, 0x55555556, 0x6, x2, 124, x15)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(mul, x12, x10, x11, 0x77777778, 0x55555556, 0x33333334, x2, 128, x15)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(mul, x12, x10, x11, 0x9999999a, 0x55555556, 0x66666667, x2, 132, x15)
+
+inst_564:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaa31fe, 0x55555556, -0xb503, x2, 136, x15)
+
+inst_565:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(mul, x12, x10, x11, 0x78ae, 0x55555556, 0xb505, x2, 140, x15)
+
+inst_566:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x3
+TEST_RR_OP(mul, x12, x10, x11, 0x1, -0x55555555, 0x3, x2, 144, x15)
+
+inst_567:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555555
+TEST_RR_OP(mul, x12, x10, x11, 0xc71c71c7, -0x55555555, 0x55555555, x2, 148, x15)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x8e38e38e, -0x55555555, -0x55555556, x2, 152, x15)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x5
+TEST_RR_OP(mul, x12, x10, x11, 0x55555557, -0x55555555, 0x5, x2, 156, x15)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333333
+TEST_RR_OP(mul, x12, x10, x11, 0x11111111, -0x55555555, 0x33333333, x2, 160, x15)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666666
+TEST_RR_OP(mul, x12, x10, x11, 0x22222222, -0x55555555, 0x66666666, x2, 164, x15)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaa6e54, -0x55555555, -0xb504, x2, 168, x15)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb504
+TEST_RR_OP(mul, x12, x10, x11, 0x555591ac, -0x55555555, 0xb504, x2, 172, x15)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x2
+TEST_RR_OP(mul, x12, x10, x11, 0x55555556, -0x55555555, 0x2, x2, 176, x15)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555554
+TEST_RR_OP(mul, x12, x10, x11, 0x1c71c71c, -0x55555555, 0x55555554, x2, 180, x15)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x0
+TEST_RR_OP(mul, x12, x10, x11, 0x0, -0x55555555, 0x0, x2, 184, x15)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x4
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaaaaac, -0x55555555, 0x4, x2, 188, x15)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333332
+TEST_RR_OP(mul, x12, x10, x11, 0x66666666, -0x55555555, 0x33333332, x2, 192, x15)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666665
+TEST_RR_OP(mul, x12, x10, x11, 0x77777777, -0x55555555, 0x66666665, x2, 196, x15)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb503
+TEST_RR_OP(mul, x12, x10, x11, 0xaaaae701, -0x55555555, 0xb503, x2, 200, x15)
+
+inst_581:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555556
+TEST_RR_OP(mul, x12, x10, x11, 0x71c71c72, -0x55555555, 0x55555556, x2, 204, x15)
+
+inst_582:
+// rs1_val > 0 and rs2_val < 0, rs1_val == 32, rs2_val == -16385
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x4001
+TEST_RR_OP(mul, x12, x10, x11, 0xfff7ffe0, 0x20, -0x4001, x2, 208, x15)
+
+inst_583:
+// rs2_val == 8192,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x9; op2val:0x2000
+TEST_RR_OP(mul, x12, x10, x11, 0x12000, 0x9, 0x2000, x2, 212, x15)
+
+inst_584:
+// rs2_val == 32768,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:-0x4; op2val:0x8000
+TEST_RR_OP(mul, x12, x10, x11, 0xfffe0000, -0x4, 0x8000, x2, 216, x15)
+
+inst_585:
+// rs2_val == 262144,
+// opcode: mul ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x40000
+TEST_RR_OP(mul, x12, x10, x11, 0xccd00000, 0x33333334, 0x40000, x2, 220, x15)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x4_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_1:
+ .fill 18*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 56*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/mulh-01.S b/riscof/suite/rv32i_m/M/mulh-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..ae74c19fa6f8bdd355416e7a5aae6a5f54be0b17
--- /dev/null
+++ b/riscof/suite/rv32i_m/M/mulh-01.S
@@ -0,0 +1,3009 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:41:59 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32im.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the mulh instruction of the RISC-V M extension for the mulh covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IM")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*M.*);def TEST_CASE_1=True;",mulh)
+
+RVTEST_SIGBASE( x4,signature_x4_1)
+
+inst_0:
+// rs1 == rd != rs2, rs1==x15, rs2==x21, rd==x15, rs1_val > 0 and rs2_val > 0, rs2_val == 134217728, rs1_val != rs2_val
+// opcode: mulh ; op1:x15; op2:x21; dest:x15; op1val:0xb504; op2val:0x8000000
+TEST_RR_OP(mulh, x15, x15, x21, 0x5a8, 0xb504, 0x8000000, x4, 0, x14)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x1, rs2==x1, rd==x7, rs1_val > 0 and rs2_val < 0, rs2_val == -2
+// opcode: mulh ; op1:x1; op2:x1; dest:x7; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(mulh, x7, x1, x1, 0xa3d70a3, 0x33333332, 0x33333332, x4, 4, x14)
+
+inst_2:
+// rs2 == rd != rs1, rs1==x7, rs2==x6, rd==x6, rs1_val < 0 and rs2_val < 0, rs2_val == -2049, rs1_val == -32769
+// opcode: mulh ; op1:x7; op2:x6; dest:x6; op1val:-0x8001; op2val:-0x801
+TEST_RR_OP(mulh, x6, x7, x6, 0x0, -0x8001, -0x801, x4, 8, x14)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x27, rs2==x16, rd==x5, rs1_val < 0 and rs2_val > 0, rs2_val == 64
+// opcode: mulh ; op1:x27; op2:x16; dest:x5; op1val:-0xb503; op2val:0x40
+TEST_RR_OP(mulh, x5, x27, x16, 0xffffffff, -0xb503, 0x40, x4, 12, x14)
+
+inst_4:
+// rs1 == rs2 == rd, rs1==x26, rs2==x26, rd==x26, rs1_val == rs2_val,
+// opcode: mulh ; op1:x26; op2:x26; dest:x26; op1val:0x7; op2val:0x7
+TEST_RR_OP(mulh, x26, x26, x26, 0x0, 0x7, 0x7, x4, 16, x14)
+
+inst_5:
+// rs1==x24, rs2==x7, rd==x10, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648
+// opcode: mulh ; op1:x24; op2:x7; dest:x10; op1val:-0xb503; op2val:-0x80000000
+TEST_RR_OP(mulh, x10, x24, x7, 0x5a81, -0xb503, -0x80000000, x4, 20, x14)
+
+inst_6:
+// rs1==x30, rs2==x2, rd==x8, rs2_val == 0, rs1_val == -8193
+// opcode: mulh ; op1:x30; op2:x2; dest:x8; op1val:-0x2001; op2val:0x0
+TEST_RR_OP(mulh, x8, x30, x2, 0x0, -0x2001, 0x0, x4, 24, x14)
+
+inst_7:
+// rs1==x0, rs2==x11, rd==x19, rs2_val == (2**(xlen-1)-1), rs1_val == -5, rs2_val == 2147483647
+// opcode: mulh ; op1:x0; op2:x11; dest:x19; op1val:0x0; op2val:0x7fffffff
+TEST_RR_OP(mulh, x19, x0, x11, 0x0, 0x0, 0x7fffffff, x4, 28, x14)
+
+inst_8:
+// rs1==x21, rs2==x17, rd==x24, rs2_val == 1, rs1_val == 8192
+// opcode: mulh ; op1:x21; op2:x17; dest:x24; op1val:0x2000; op2val:0x1
+TEST_RR_OP(mulh, x24, x21, x17, 0x0, 0x2000, 0x1, x4, 32, x14)
+
+inst_9:
+// rs1==x23, rs2==x9, rd==x29, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648
+// opcode: mulh ; op1:x23; op2:x9; dest:x29; op1val:-0x80000000; op2val:-0x4
+TEST_RR_OP(mulh, x29, x23, x9, 0x2, -0x80000000, -0x4, x4, 36, x14)
+
+inst_10:
+// rs1==x22, rs2==x3, rd==x27, rs1_val == 0,
+// opcode: mulh ; op1:x22; op2:x3; dest:x27; op1val:0x0; op2val:0x7
+TEST_RR_OP(mulh, x27, x22, x3, 0x0, 0x0, 0x7, x4, 40, x14)
+
+inst_11:
+// rs1==x2, rs2==x22, rd==x28, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647
+// opcode: mulh ; op1:x2; op2:x22; dest:x28; op1val:0x7fffffff; op2val:0x6
+TEST_RR_OP(mulh, x28, x2, x22, 0x2, 0x7fffffff, 0x6, x4, 44, x14)
+
+inst_12:
+// rs1==x28, rs2==x29, rd==x23, rs1_val == 1, rs2_val == 1431655765
+// opcode: mulh ; op1:x28; op2:x29; dest:x23; op1val:0x1; op2val:0x55555555
+TEST_RR_OP(mulh, x23, x28, x29, 0x0, 0x1, 0x55555555, x4, 48, x14)
+
+inst_13:
+// rs1==x13, rs2==x19, rd==x20, rs2_val == 2, rs1_val==1717986919 and rs2_val==2
+// opcode: mulh ; op1:x13; op2:x19; dest:x20; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(mulh, x20, x13, x19, 0x0, 0x66666667, 0x2, x4, 52, x14)
+
+inst_14:
+// rs1==x5, rs2==x12, rd==x22, rs2_val == 4, rs1_val==0 and rs2_val==4
+// opcode: mulh ; op1:x5; op2:x12; dest:x22; op1val:0x0; op2val:0x4
+TEST_RR_OP(mulh, x22, x5, x12, 0x0, 0x0, 0x4, x4, 56, x14)
+
+inst_15:
+// rs1==x10, rs2==x18, rd==x25, rs2_val == 8, rs1_val == 4
+// opcode: mulh ; op1:x10; op2:x18; dest:x25; op1val:0x4; op2val:0x8
+TEST_RR_OP(mulh, x25, x10, x18, 0x0, 0x4, 0x8, x4, 60, x14)
+RVTEST_SIGBASE( x7,signature_x7_0)
+
+inst_16:
+// rs1==x25, rs2==x15, rd==x9, rs2_val == 16, rs1_val == -17
+// opcode: mulh ; op1:x25; op2:x15; dest:x9; op1val:-0x11; op2val:0x10
+TEST_RR_OP(mulh, x9, x25, x15, 0xffffffff, -0x11, 0x10, x7, 0, x22)
+
+inst_17:
+// rs1==x16, rs2==x28, rd==x2, rs2_val == 32,
+// opcode: mulh ; op1:x16; op2:x28; dest:x2; op1val:0x5; op2val:0x20
+TEST_RR_OP(mulh, x2, x16, x28, 0x0, 0x5, 0x20, x7, 4, x22)
+
+inst_18:
+// rs1==x9, rs2==x10, rd==x1, rs2_val == 128, rs1_val == 262144
+// opcode: mulh ; op1:x9; op2:x10; dest:x1; op1val:0x40000; op2val:0x80
+TEST_RR_OP(mulh, x1, x9, x10, 0x0, 0x40000, 0x80, x7, 8, x22)
+
+inst_19:
+// rs1==x20, rs2==x5, rd==x11, rs2_val == 256, rs1_val == -536870913
+// opcode: mulh ; op1:x20; op2:x5; dest:x11; op1val:-0x20000001; op2val:0x100
+TEST_RR_OP(mulh, x11, x20, x5, 0xffffffdf, -0x20000001, 0x100, x7, 12, x22)
+
+inst_20:
+// rs1==x6, rs2==x20, rd==x13, rs2_val == 512,
+// opcode: mulh ; op1:x6; op2:x20; dest:x13; op1val:0x55555554; op2val:0x200
+TEST_RR_OP(mulh, x13, x6, x20, 0xaa, 0x55555554, 0x200, x7, 16, x22)
+
+inst_21:
+// rs1==x19, rs2==x25, rd==x12, rs2_val == 1024, rs1_val == -1073741825
+// opcode: mulh ; op1:x19; op2:x25; dest:x12; op1val:-0x40000001; op2val:0x400
+TEST_RR_OP(mulh, x12, x19, x25, 0xfffffeff, -0x40000001, 0x400, x7, 20, x22)
+
+inst_22:
+// rs1==x4, rs2==x27, rd==x16, rs2_val == 2048,
+// opcode: mulh ; op1:x4; op2:x27; dest:x16; op1val:-0xb504; op2val:0x800
+TEST_RR_OP(mulh, x16, x4, x27, 0xffffffff, -0xb504, 0x800, x7, 24, x22)
+
+inst_23:
+// rs1==x17, rs2==x4, rd==x30, rs2_val == 4096,
+// opcode: mulh ; op1:x17; op2:x4; dest:x30; op1val:-0x2001; op2val:0x1000
+TEST_RR_OP(mulh, x30, x17, x4, 0xffffffff, -0x2001, 0x1000, x7, 28, x22)
+
+inst_24:
+// rs1==x31, rs2==x14, rd==x0, rs2_val == 8192,
+// opcode: mulh ; op1:x31; op2:x14; dest:x0; op1val:0x5; op2val:0x2000
+TEST_RR_OP(mulh, x0, x31, x14, 0, 0x5, 0x2000, x7, 32, x22)
+
+inst_25:
+// rs1==x14, rs2==x13, rd==x31, rs2_val == 16384, rs1_val == 2
+// opcode: mulh ; op1:x14; op2:x13; dest:x31; op1val:0x2; op2val:0x4000
+TEST_RR_OP(mulh, x31, x14, x13, 0x0, 0x2, 0x4000, x7, 36, x22)
+
+inst_26:
+// rs1==x12, rs2==x8, rd==x14, rs2_val == 32768, rs1_val == -33
+// opcode: mulh ; op1:x12; op2:x8; dest:x14; op1val:-0x21; op2val:0x8000
+TEST_RR_OP(mulh, x14, x12, x8, 0xffffffff, -0x21, 0x8000, x7, 40, x22)
+
+inst_27:
+// rs1==x11, rs2==x23, rd==x17, rs2_val == 65536, rs1_val == -2
+// opcode: mulh ; op1:x11; op2:x23; dest:x17; op1val:-0x2; op2val:0x10000
+TEST_RR_OP(mulh, x17, x11, x23, 0xffffffff, -0x2, 0x10000, x7, 44, x22)
+
+inst_28:
+// rs1==x29, rs2==x0, rd==x21, rs2_val == 131072, rs1_val == 33554432
+// opcode: mulh ; op1:x29; op2:x0; dest:x21; op1val:0x2000000; op2val:0x0
+TEST_RR_OP(mulh, x21, x29, x0, 0x0, 0x2000000, 0x0, x7, 48, x22)
+
+inst_29:
+// rs1==x18, rs2==x30, rd==x3, rs2_val == 262144, rs1_val == -33554433
+// opcode: mulh ; op1:x18; op2:x30; dest:x3; op1val:-0x2000001; op2val:0x40000
+TEST_RR_OP(mulh, x3, x18, x30, 0xfffff7ff, -0x2000001, 0x40000, x7, 52, x22)
+
+inst_30:
+// rs1==x8, rs2==x24, rd==x18, rs2_val == 524288, rs1_val == 1024
+// opcode: mulh ; op1:x8; op2:x24; dest:x18; op1val:0x400; op2val:0x80000
+TEST_RR_OP(mulh, x18, x8, x24, 0x0, 0x400, 0x80000, x7, 56, x2)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_31:
+// rs1==x3, rs2==x31, rd==x4, rs2_val == 1048576, rs1_val == -524289
+// opcode: mulh ; op1:x3; op2:x31; dest:x4; op1val:-0x80001; op2val:0x100000
+TEST_RR_OP(mulh, x4, x3, x31, 0xffffff7f, -0x80001, 0x100000, x1, 0, x2)
+
+inst_32:
+// rs2_val == 2097152, rs1_val == -131073
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x200000
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffbf, -0x20001, 0x200000, x1, 4, x2)
+
+inst_33:
+// rs2_val == 4194304, rs1_val == -1431655766
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x400000
+TEST_RR_OP(mulh, x12, x10, x11, 0xffeaaaaa, -0x55555556, 0x400000, x1, 8, x2)
+
+inst_34:
+// rs2_val == 8388608, rs1_val == -129
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x800000
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0x81, 0x800000, x1, 12, x2)
+
+inst_35:
+// rs2_val == 16777216, rs1_val == -4097
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x1000000
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffef, -0x1001, 0x1000000, x1, 16, x2)
+
+inst_36:
+// rs2_val == 33554432,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x2000000
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffe95, -0xb503, 0x2000000, x1, 20, x2)
+
+inst_37:
+// rs2_val == 67108864, rs1_val == 524288
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0x4000000
+TEST_RR_OP(mulh, x12, x10, x11, 0x2000, 0x80000, 0x4000000, x1, 24, x2)
+
+inst_38:
+// rs2_val == 268435456,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x9; op2val:0x10000000
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x9, 0x10000000, x1, 28, x2)
+
+inst_39:
+// rs2_val == 536870912,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x20000000
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4, 0x20000000, x1, 32, x2)
+
+inst_40:
+// rs2_val == 1073741824,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x40000000
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffff7, -0x21, 0x40000000, x1, 36, x2)
+
+inst_41:
+// rs2_val == -3, rs1_val == -8388609
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:-0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0x800001, -0x3, x1, 40, x2)
+
+inst_42:
+// rs2_val == -5, rs1_val == 512
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:-0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x200, -0x5, x1, 44, x2)
+
+inst_43:
+// rs2_val == -9, rs1_val == 128
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:-0x9
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x80, -0x9, x1, 48, x2)
+
+inst_44:
+// rs2_val == -17,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:-0x11
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x7, -0x11, x1, 52, x2)
+
+inst_45:
+// rs2_val == -33, rs1_val == 16777216
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:-0x21
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x1000000, -0x21, x1, 56, x2)
+
+inst_46:
+// rs2_val == -65, rs1_val == 1048576
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:-0x41
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x100000, -0x41, x1, 60, x2)
+
+inst_47:
+// rs2_val == -129,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x81
+TEST_RR_OP(mulh, x12, x10, x11, 0x2b, -0x55555556, -0x81, x1, 64, x2)
+
+inst_48:
+// rs2_val == -257,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x101
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffaa, 0x55555556, -0x101, x1, 68, x2)
+
+inst_49:
+// rs2_val == -513, rs1_val == 65536
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:-0x201
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x10000, -0x201, x1, 72, x2)
+
+inst_50:
+// rs2_val == -1025, rs1_val == 8388608
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:-0x401
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffd, 0x800000, -0x401, x1, 76, x2)
+
+inst_51:
+// rs2_val == -4097,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x1001
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x5, -0x1001, x1, 80, x2)
+
+inst_52:
+// rs2_val == -8193,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x2001
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffff999, 0x33333333, -0x2001, x1, 84, x2)
+
+inst_53:
+// rs2_val == -16385, rs1_val == -2049
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:-0x4001
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0x801, -0x4001, x1, 88, x2)
+
+inst_54:
+// rs2_val == -32769,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:-0x8001
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffd, 0x40000, -0x8001, x1, 92, x2)
+
+inst_55:
+// rs2_val == -65537, rs1_val == -65
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:-0x10001
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0x41, -0x10001, x1, 96, x2)
+
+inst_56:
+// rs2_val == -131073, rs1_val == -16777217
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:-0x20001
+TEST_RR_OP(mulh, x12, x10, x11, 0x200, -0x1000001, -0x20001, x1, 100, x2)
+
+inst_57:
+// rs2_val == -262145,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x6; op2val:-0x40001
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0x6, -0x40001, x1, 104, x2)
+
+inst_58:
+// rs2_val == -524289,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:-0x80001
+TEST_RR_OP(mulh, x12, x10, x11, 0x400, -0x800001, -0x80001, x1, 108, x2)
+
+inst_59:
+// rs2_val == -1048577,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:-0x100001
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0x11, -0x100001, x1, 112, x2)
+
+inst_60:
+// rs2_val == -2097153,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:-0x200001
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffb, 0x2000, -0x200001, x1, 116, x2)
+
+inst_61:
+// rs2_val == -4194305,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x400001
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffd2, 0xb505, -0x400001, x1, 120, x2)
+
+inst_62:
+// rs2_val == -8388609,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:-0x800001
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0x81, -0x800001, x1, 124, x2)
+
+inst_63:
+// rs2_val == -16777217,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x1000001
+TEST_RR_OP(mulh, x12, x10, x11, 0x555555, -0x55555555, -0x1000001, x1, 128, x2)
+
+inst_64:
+// rs2_val == -33554433,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:-0x2000001
+TEST_RR_OP(mulh, x12, x10, x11, 0x40000, -0x2000001, -0x2000001, x1, 132, x2)
+
+inst_65:
+// rs2_val == -67108865,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:-0x4000001
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x1, -0x4000001, x1, 136, x2)
+
+inst_66:
+// rs2_val == -134217729,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x8000001
+TEST_RR_OP(mulh, x12, x10, x11, 0x5a8, -0xb504, -0x8000001, x1, 140, x2)
+
+inst_67:
+// rs2_val == -268435457, rs1_val == 2048
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x10000001
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffff7f, 0x800, -0x10000001, x1, 144, x2)
+
+inst_68:
+// rs2_val == -536870913, rs1_val == 131072
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x20000001
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffbfff, 0x20000, -0x20000001, x1, 148, x2)
+
+inst_69:
+// rs2_val == -1073741825, rs1_val == -16385
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:-0x40000001
+TEST_RR_OP(mulh, x12, x10, x11, 0x1000, -0x4001, -0x40000001, x1, 152, x2)
+
+inst_70:
+// rs2_val == -1431655766, rs1_val==6 and rs2_val==-1431655766
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffd, 0x6, -0x55555556, x1, 156, x2)
+
+inst_71:
+// rs1_val == 8,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x8, 0x33333333, x1, 160, x2)
+
+inst_72:
+// rs1_val == 16,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x10, 0x4, x1, 164, x2)
+
+inst_73:
+// rs1_val == 32,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:0x80000
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x20, 0x80000, x1, 168, x2)
+
+inst_74:
+// rs1_val == 64,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0xc, 0x40, 0x33333332, x1, 172, x2)
+
+inst_75:
+// rs1_val == 256,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x100001
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x100, -0x100001, x1, 176, x2)
+
+inst_76:
+// rs1_val == 4096,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x1000, 0x0, x1, 180, x2)
+
+inst_77:
+// rs1_val == 16384,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:0x100
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4000, 0x100, x1, 184, x2)
+
+inst_78:
+// rs1_val == 32768,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x8000, 0xb505, x1, 188, x2)
+
+inst_79:
+// rs1_val == 2097152,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x200000, 0x0, x1, 192, x2)
+
+inst_80:
+// rs1_val == 4194304,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x10000000
+TEST_RR_OP(mulh, x12, x10, x11, 0x40000, 0x400000, 0x10000000, x1, 196, x2)
+
+inst_81:
+// rs1_val == 67108864,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xfeaaaaaa, 0x4000000, -0x55555555, x1, 200, x2)
+
+inst_82:
+// rs1_val == 134217728,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x5a8, 0x8000000, 0xb504, x1, 204, x2)
+
+inst_83:
+// rs1_val == 268435456,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:-0x40000001
+TEST_RR_OP(mulh, x12, x10, x11, 0xfbffffff, 0x10000000, -0x40000001, x1, 208, x2)
+
+inst_84:
+// rs1_val == 536870912,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:-0x11
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffd, 0x20000000, -0x11, x1, 212, x2)
+
+inst_85:
+// rs1_val == 1073741824,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:-0x2001
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffff7ff, 0x40000000, -0x2001, x1, 216, x2)
+
+inst_86:
+// rs1_val == -3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0x40
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0x3, 0x40, x1, 220, x2)
+
+inst_87:
+// rs1_val == -9,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffd, -0x9, 0x55555554, x1, 224, x2)
+
+inst_88:
+// rs1_val == -257,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0x101, 0x0, x1, 228, x2)
+
+inst_89:
+// rs1_val == -513,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x40
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0x201, 0x40, x1, 232, x2)
+
+inst_90:
+// rs1_val == -1025,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x7fffffff
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffdff, -0x401, 0x7fffffff, x1, 236, x2)
+
+inst_91:
+// rs1_val == -65537,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x10001
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, -0x10001, -0x10001, x1, 240, x2)
+
+inst_92:
+// rs1_val == -262145,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:-0x4000001
+TEST_RR_OP(mulh, x12, x10, x11, 0x1000, -0x40001, -0x4000001, x1, 244, x2)
+
+inst_93:
+// rs1_val == -1048577,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x200
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0x100001, 0x200, x1, 248, x2)
+
+inst_94:
+// rs1_val == -2097153,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffe9, -0x200001, 0xb503, x1, 252, x2)
+
+inst_95:
+// rs1_val == -4194305,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0x400000
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffefff, -0x400001, 0x400000, x1, 256, x2)
+
+inst_96:
+// rs1_val == -67108865,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x3fffffff
+TEST_RR_OP(mulh, x12, x10, x11, 0xfeffffff, -0x4000001, 0x3fffffff, x1, 260, x2)
+
+inst_97:
+// rs1_val == -134217729,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x11
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0x8000001, -0x11, x1, 264, x2)
+
+inst_98:
+// rs1_val == -268435457,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0x10000001, 0x0, x1, 268, x2)
+
+inst_99:
+// rs1_val == 1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x9
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffd, 0x55555555, -0x9, x1, 272, x2)
+
+inst_100:
+// rs1_val==3 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0x3, x1, 276, x2)
+
+inst_101:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0x55555555, x1, 280, x2)
+
+inst_102:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffe, 0x3, -0x55555556, x1, 284, x2)
+
+inst_103:
+// rs1_val==3 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0x5, x1, 288, x2)
+
+inst_104:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0x33333333, x1, 292, x2)
+
+inst_105:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x3, 0x66666666, x1, 296, x2)
+
+inst_106:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x3, -0xb504, x1, 300, x2)
+
+inst_107:
+// rs1_val==3 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0xb504, x1, 304, x2)
+
+inst_108:
+// rs1_val==3 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0x2, x1, 308, x2)
+
+inst_109:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0x55555554, x1, 312, x2)
+
+inst_110:
+// rs1_val==3 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0x0, x1, 316, x2)
+
+inst_111:
+// rs1_val==3 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0x4, x1, 320, x2)
+
+inst_112:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0x33333332, x1, 324, x2)
+
+inst_113:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x3, 0x66666665, x1, 328, x2)
+
+inst_114:
+// rs1_val==3 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0xb503, x1, 332, x2)
+
+inst_115:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x3, 0x55555556, x1, 336, x2)
+
+inst_116:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x3, -0x55555555, x1, 340, x2)
+
+inst_117:
+// rs1_val==3 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0x6, x1, 344, x2)
+
+inst_118:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0x33333334, x1, 348, x2)
+
+inst_119:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x3, 0x66666667, x1, 352, x2)
+
+inst_120:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x3, -0xb503, x1, 356, x2)
+
+inst_121:
+// rs1_val==3 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x3, 0xb505, x1, 360, x2)
+
+inst_122:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x55555555, 0x3, x1, 364, x2)
+
+inst_123:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x1c71c71c, 0x55555555, 0x55555555, x1, 368, x2)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xe38e38e3, 0x55555555, -0x55555556, x1, 372, x2)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x55555555, 0x5, x1, 376, x2)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111110, 0x55555555, 0x33333333, x1, 380, x2)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222221, 0x55555555, 0x66666666, x1, 384, x2)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, 0x55555555, -0xb504, x1, 388, x2)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0x55555555, 0xb504, x1, 392, x2)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x55555555, 0x2, x1, 396, x2)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x1c71c71b, 0x55555555, 0x55555554, x1, 400, x2)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x55555555, 0x0, x1, 404, x2)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x55555555, 0x4, x1, 408, x2)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111110, 0x55555555, 0x33333332, x1, 412, x2)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222221, 0x55555555, 0x66666665, x1, 416, x2)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0x55555555, 0xb503, x1, 420, x2)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x1c71c71c, 0x55555555, 0x55555556, x1, 424, x2)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xe38e38e3, 0x55555555, -0x55555555, x1, 428, x2)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x55555555, 0x6, x1, 432, x2)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111111, 0x55555555, 0x33333334, x1, 436, x2)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222222, 0x55555555, 0x66666667, x1, 440, x2)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, 0x55555555, -0xb503, x1, 444, x2)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0x55555555, 0xb505, x1, 448, x2)
+
+inst_144:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffe, -0x55555556, 0x3, x1, 452, x2)
+
+inst_145:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xe38e38e3, -0x55555556, 0x55555555, x1, 456, x2)
+
+inst_146:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x1c71c71c, -0x55555556, -0x55555556, x1, 460, x2)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffe, -0x55555556, 0x5, x1, 464, x2)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0xeeeeeeee, -0x55555556, 0x33333333, x1, 468, x2)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0xdddddddd, -0x55555556, 0x66666666, x1, 472, x2)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, -0x55555556, -0xb504, x1, 476, x2)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, -0x55555556, 0xb504, x1, 480, x2)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0x55555556, 0x2, x1, 484, x2)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0xe38e38e3, -0x55555556, 0x55555554, x1, 488, x2)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0x55555556, 0x0, x1, 492, x2)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffe, -0x55555556, 0x4, x1, 496, x2)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0xeeeeeeef, -0x55555556, 0x33333332, x1, 500, x2)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0xddddddde, -0x55555556, 0x66666665, x1, 504, x2)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, -0x55555556, 0xb503, x1, 508, x2)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xe38e38e3, -0x55555556, 0x55555556, x1, 512, x2)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x1c71c71c, -0x55555556, -0x55555555, x1, 516, x2)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffd, -0x55555556, 0x6, x1, 520, x2)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0xeeeeeeee, -0x55555556, 0x33333334, x1, 524, x2)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0xdddddddd, -0x55555556, 0x66666667, x1, 528, x2)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, -0x55555556, -0xb503, x1, 532, x2)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a8, -0x55555556, 0xb505, x1, 536, x2)
+
+inst_166:
+// rs1_val==5 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x5, 0x3, x1, 540, x2)
+
+inst_167:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x5, 0x55555555, x1, 544, x2)
+
+inst_168:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffe, 0x5, -0x55555556, x1, 548, x2)
+
+inst_169:
+// rs1_val==5 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x5, 0x5, x1, 552, x2)
+
+inst_170:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x5, 0x33333333, x1, 556, x2)
+
+inst_171:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x5, 0x66666666, x1, 560, x2)
+
+inst_172:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x5, -0xb504, x1, 564, x2)
+
+inst_173:
+// rs1_val==5 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x5, 0xb504, x1, 568, x2)
+
+inst_174:
+// rs1_val==5 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x5, 0x2, x1, 572, x2)
+
+inst_175:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x5, 0x55555554, x1, 576, x2)
+
+inst_176:
+// rs1_val==5 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x5, 0x0, x1, 580, x2)
+
+inst_177:
+// rs1_val==5 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x5, 0x4, x1, 584, x2)
+
+inst_178:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x5, 0x33333332, x1, 588, x2)
+
+inst_179:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x5, 0x66666665, x1, 592, x2)
+
+inst_180:
+// rs1_val==5 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x5, 0xb503, x1, 596, x2)
+
+inst_181:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x5, 0x55555556, x1, 600, x2)
+
+inst_182:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffe, 0x5, -0x55555555, x1, 604, x2)
+
+inst_183:
+// rs1_val==5 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x5, 0x6, x1, 608, x2)
+
+inst_184:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x5, 0x33333334, x1, 612, x2)
+
+inst_185:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x2, 0x5, 0x66666667, x1, 616, x2)
+
+inst_186:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x5, -0xb503, x1, 620, x2)
+
+inst_187:
+// rs1_val==5 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x5, 0xb505, x1, 624, x2)
+
+inst_188:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333333, 0x3, x1, 628, x2)
+
+inst_189:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111110, 0x33333333, 0x55555555, x1, 632, x2)
+
+inst_190:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xeeeeeeee, 0x33333333, -0x55555556, x1, 636, x2)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333333, 0x5, x1, 640, x2)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0xa3d70a3, 0x33333333, 0x33333333, x1, 644, x2)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x33333333, 0x66666666, x1, 648, x2)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffdbcc, 0x33333333, -0xb504, x1, 652, x2)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x2433, 0x33333333, 0xb504, x1, 656, x2)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333333, 0x2, x1, 660, x2)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111110, 0x33333333, 0x55555554, x1, 664, x2)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333333, 0x0, x1, 668, x2)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333333, 0x4, x1, 672, x2)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0xa3d70a3, 0x33333333, 0x33333332, x1, 676, x2)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x33333333, 0x66666665, x1, 680, x2)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x2433, 0x33333333, 0xb503, x1, 684, x2)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111111, 0x33333333, 0x55555556, x1, 688, x2)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xeeeeeeef, 0x33333333, -0x55555555, x1, 692, x2)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x33333333, 0x6, x1, 696, x2)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0xa3d70a3, 0x33333333, 0x33333334, x1, 700, x2)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x33333333, 0x66666667, x1, 704, x2)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffdbcc, 0x33333333, -0xb503, x1, 708, x2)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x2434, 0x33333333, 0xb505, x1, 712, x2)
+
+inst_210:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x66666666, 0x3, x1, 716, x2)
+
+inst_211:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222221, 0x66666666, 0x55555555, x1, 720, x2)
+
+inst_212:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xdddddddd, 0x66666666, -0x55555556, x1, 724, x2)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x66666666, 0x5, x1, 728, x2)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x66666666, 0x33333333, x1, 732, x2)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x28f5c28f, 0x66666666, 0x66666666, x1, 736, x2)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffb798, 0x66666666, -0xb504, x1, 740, x2)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x4867, 0x66666666, 0xb504, x1, 744, x2)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x66666666, 0x2, x1, 748, x2)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222221, 0x66666666, 0x55555554, x1, 752, x2)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x66666666, 0x0, x1, 756, x2)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x66666666, 0x4, x1, 760, x2)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x66666666, 0x33333332, x1, 764, x2)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x28f5c28e, 0x66666666, 0x66666665, x1, 768, x2)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x4867, 0x66666666, 0xb503, x1, 772, x2)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222222, 0x66666666, 0x55555556, x1, 776, x2)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xddddddde, 0x66666666, -0x55555555, x1, 780, x2)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x2, 0x66666666, 0x6, x1, 784, x2)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x66666666, 0x33333334, x1, 788, x2)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x28f5c28f, 0x66666666, 0x66666667, x1, 792, x2)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffb798, 0x66666666, -0xb503, x1, 796, x2)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x4868, 0x66666666, 0xb505, x1, 800, x2)
+
+inst_232:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb504, 0x3, x1, 804, x2)
+
+inst_233:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, -0xb504, 0x55555555, x1, 808, x2)
+
+inst_234:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, -0xb504, -0x55555556, x1, 812, x2)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb504, 0x5, x1, 816, x2)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffdbcc, -0xb504, 0x33333333, x1, 820, x2)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffb798, -0xb504, 0x66666666, x1, 824, x2)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0xb504, -0xb504, x1, 828, x2)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb504, 0xb504, x1, 832, x2)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb504, 0x2, x1, 836, x2)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, -0xb504, 0x55555554, x1, 840, x2)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0xb504, 0x0, x1, 844, x2)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb504, 0x4, x1, 848, x2)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffdbcc, -0xb504, 0x33333332, x1, 852, x2)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffb798, -0xb504, 0x66666665, x1, 856, x2)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb504, 0xb503, x1, 860, x2)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, -0xb504, 0x55555556, x1, 864, x2)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, -0xb504, -0x55555555, x1, 868, x2)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb504, 0x6, x1, 872, x2)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffdbcb, -0xb504, 0x33333334, x1, 876, x2)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffb797, -0xb504, 0x66666667, x1, 880, x2)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0xb504, -0xb503, x1, 884, x2)
+
+inst_253:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb504, 0xb505, x1, 888, x2)
+
+inst_254:
+// rs1_val==46340 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb504, 0x3, x1, 892, x2)
+
+inst_255:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0xb504, 0x55555555, x1, 896, x2)
+
+inst_256:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, 0xb504, -0x55555556, x1, 900, x2)
+
+inst_257:
+// rs1_val==46340 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb504, 0x5, x1, 904, x2)
+
+inst_258:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x2433, 0xb504, 0x33333333, x1, 908, x2)
+
+inst_259:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x4867, 0xb504, 0x66666666, x1, 912, x2)
+
+inst_260:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0xb504, -0xb504, x1, 916, x2)
+
+inst_261:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb504, 0xb504, x1, 920, x2)
+
+inst_262:
+// rs1_val==46340 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb504, 0x2, x1, 924, x2)
+
+inst_263:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0xb504, 0x55555554, x1, 928, x2)
+
+inst_264:
+// rs1_val==46340 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb504, 0x0, x1, 932, x2)
+
+inst_265:
+// rs1_val==46340 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb504, 0x4, x1, 936, x2)
+
+inst_266:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x2433, 0xb504, 0x33333332, x1, 940, x2)
+
+inst_267:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x4867, 0xb504, 0x66666665, x1, 944, x2)
+
+inst_268:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb504, 0xb503, x1, 948, x2)
+
+inst_269:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0xb504, 0x55555556, x1, 952, x2)
+
+inst_270:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, 0xb504, -0x55555555, x1, 956, x2)
+
+inst_271:
+// rs1_val==46340 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb504, 0x6, x1, 960, x2)
+
+inst_272:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x2434, 0xb504, 0x33333334, x1, 964, x2)
+
+inst_273:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x4868, 0xb504, 0x66666667, x1, 968, x2)
+
+inst_274:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0xb504, -0xb503, x1, 972, x2)
+
+inst_275:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb504, 0xb505, x1, 976, x2)
+
+inst_276:
+// rs1_val==2 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x3, x1, 980, x2)
+
+inst_277:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x55555555, x1, 984, x2)
+
+inst_278:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x2, -0x55555556, x1, 988, x2)
+
+inst_279:
+// rs1_val==2 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x5, x1, 992, x2)
+
+inst_280:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x33333333, x1, 996, x2)
+
+inst_281:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x66666666, x1, 1000, x2)
+
+inst_282:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x2, -0xb504, x1, 1004, x2)
+
+inst_283:
+// rs1_val==2 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0xb504, x1, 1008, x2)
+
+inst_284:
+// rs1_val==2 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x2, x1, 1012, x2)
+
+inst_285:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x55555554, x1, 1016, x2)
+
+inst_286:
+// rs1_val==2 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x0, x1, 1020, x2)
+
+inst_287:
+// rs1_val==2 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x4, x1, 1024, x2)
+
+inst_288:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x33333332, x1, 1028, x2)
+
+inst_289:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x66666665, x1, 1032, x2)
+
+inst_290:
+// rs1_val==2 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0xb503, x1, 1036, x2)
+
+inst_291:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x55555556, x1, 1040, x2)
+
+inst_292:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x2, -0x55555555, x1, 1044, x2)
+
+inst_293:
+// rs1_val==2 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x6, x1, 1048, x2)
+
+inst_294:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x33333334, x1, 1052, x2)
+
+inst_295:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0x66666667, x1, 1056, x2)
+
+inst_296:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x2, -0xb503, x1, 1060, x2)
+
+inst_297:
+// rs1_val==2 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x2, 0xb505, x1, 1064, x2)
+
+inst_298:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x55555554, 0x3, x1, 1068, x2)
+
+inst_299:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x1c71c71b, 0x55555554, 0x55555555, x1, 1072, x2)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xe38e38e3, 0x55555554, -0x55555556, x1, 1076, x2)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x55555554, 0x5, x1, 1080, x2)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111110, 0x55555554, 0x33333333, x1, 1084, x2)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222221, 0x55555554, 0x66666666, x1, 1088, x2)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, 0x55555554, -0xb504, x1, 1092, x2)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0x55555554, 0xb504, x1, 1096, x2)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x55555554, 0x2, x1, 1100, x2)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x1c71c71b, 0x55555554, 0x55555554, x1, 1104, x2)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x55555554, 0x0, x1, 1108, x2)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x55555554, 0x4, x1, 1112, x2)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111110, 0x55555554, 0x33333332, x1, 1116, x2)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222221, 0x55555554, 0x66666665, x1, 1120, x2)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0x55555554, 0xb503, x1, 1124, x2)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x1c71c71c, 0x55555554, 0x55555556, x1, 1128, x2)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xe38e38e4, 0x55555554, -0x55555555, x1, 1132, x2)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x55555554, 0x6, x1, 1136, x2)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111111, 0x55555554, 0x33333334, x1, 1140, x2)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222221, 0x55555554, 0x66666667, x1, 1144, x2)
+
+inst_318:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, 0x55555554, -0xb503, x1, 1148, x2)
+
+inst_319:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0x55555554, 0xb505, x1, 1152, x2)
+
+inst_320:
+// rs1_val==0 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x3, x1, 1156, x2)
+
+inst_321:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x55555555, x1, 1160, x2)
+
+inst_322:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, -0x55555556, x1, 1164, x2)
+
+inst_323:
+// rs1_val==0 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x5, x1, 1168, x2)
+
+inst_324:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x33333333, x1, 1172, x2)
+
+inst_325:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x66666666, x1, 1176, x2)
+
+inst_326:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x1c71c71c, -0x55555555, -0x55555555, x1, 1180, x2)
+
+inst_327:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffe, -0x55555555, 0x6, x1, 1184, x2)
+
+inst_328:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0xeeeeeeee, -0x55555555, 0x33333334, x1, 1188, x2)
+
+inst_329:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0xdddddddd, -0x55555555, 0x66666667, x1, 1192, x2)
+
+inst_330:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, -0x55555555, -0xb503, x1, 1196, x2)
+
+inst_331:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, -0x55555555, 0xb505, x1, 1200, x2)
+
+inst_332:
+// rs1_val==6 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x6, 0x3, x1, 1204, x2)
+
+inst_333:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x6, 0x55555555, x1, 1208, x2)
+
+inst_334:
+// rs1_val==6 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x6, 0x5, x1, 1212, x2)
+
+inst_335:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x6, 0x33333333, x1, 1216, x2)
+
+inst_336:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x2, 0x6, 0x66666666, x1, 1220, x2)
+
+inst_337:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x6, -0xb504, x1, 1224, x2)
+
+inst_338:
+// rs1_val==6 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x6, 0xb504, x1, 1228, x2)
+
+inst_339:
+// rs1_val==6 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x6, 0x2, x1, 1232, x2)
+
+inst_340:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x6, 0x55555554, x1, 1236, x2)
+
+inst_341:
+// rs1_val==6 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x6, 0x0, x1, 1240, x2)
+
+inst_342:
+// rs1_val==6 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x6, 0x4, x1, 1244, x2)
+
+inst_343:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x6, 0x33333332, x1, 1248, x2)
+
+inst_344:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x2, 0x6, 0x66666665, x1, 1252, x2)
+
+inst_345:
+// rs1_val==6 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x6, 0xb503, x1, 1256, x2)
+
+inst_346:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x2, 0x6, 0x55555556, x1, 1260, x2)
+
+inst_347:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffe, 0x6, -0x55555555, x1, 1264, x2)
+
+inst_348:
+// rs1_val==6 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x6, 0x6, x1, 1268, x2)
+
+inst_349:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x6, 0x33333334, x1, 1272, x2)
+
+inst_350:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x2, 0x6, 0x66666667, x1, 1276, x2)
+
+inst_351:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x6, -0xb503, x1, 1280, x2)
+
+inst_352:
+// rs1_val==6 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x6, 0xb505, x1, 1284, x2)
+
+inst_353:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333334, 0x3, x1, 1288, x2)
+
+inst_354:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111111, 0x33333334, 0x55555555, x1, 1292, x2)
+
+inst_355:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xeeeeeeee, 0x33333334, -0x55555556, x1, 1296, x2)
+
+inst_356:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x33333334, 0x5, x1, 1300, x2)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0xa3d70a3, 0x33333334, 0x33333333, x1, 1304, x2)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x33333334, 0x66666666, x1, 1308, x2)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffdbcb, 0x33333334, -0xb504, x1, 1312, x2)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x2434, 0x33333334, 0xb504, x1, 1316, x2)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333334, 0x2, x1, 1320, x2)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111111, 0x33333334, 0x55555554, x1, 1324, x2)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333334, 0x0, x1, 1328, x2)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333334, 0x4, x1, 1332, x2)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0xa3d70a3, 0x33333334, 0x33333332, x1, 1336, x2)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x33333334, 0x66666665, x1, 1340, x2)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x2433, 0x33333334, 0xb503, x1, 1344, x2)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111111, 0x33333334, 0x55555556, x1, 1348, x2)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xeeeeeeee, 0x33333334, -0x55555555, x1, 1352, x2)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x33333334, 0x6, x1, 1356, x2)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0xa3d70a4, 0x33333334, 0x33333334, x1, 1360, x2)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae148, 0x33333334, 0x66666667, x1, 1364, x2)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffdbcc, 0x33333334, -0xb503, x1, 1368, x2)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x2434, 0x33333334, 0xb505, x1, 1372, x2)
+
+inst_375:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x66666667, 0x3, x1, 1376, x2)
+
+inst_376:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222222, 0x66666667, 0x55555555, x1, 1380, x2)
+
+inst_377:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xdddddddd, 0x66666667, -0x55555556, x1, 1384, x2)
+
+inst_378:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x2, 0x66666667, 0x5, x1, 1388, x2)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x66666667, 0x33333333, x1, 1392, x2)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x28f5c28f, 0x66666667, 0x66666666, x1, 1396, x2)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffb797, 0x66666667, -0xb504, x1, 1400, x2)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x4868, 0x66666667, 0xb504, x1, 1404, x2)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222221, 0x66666667, 0x55555554, x1, 1408, x2)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x66666667, 0x0, x1, 1412, x2)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x66666667, 0x4, x1, 1416, x2)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x66666667, 0x33333332, x1, 1420, x2)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x28f5c28f, 0x66666667, 0x66666665, x1, 1424, x2)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x4867, 0x66666667, 0xb503, x1, 1428, x2)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222222, 0x66666667, 0x55555556, x1, 1432, x2)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xdddddddd, 0x66666667, -0x55555555, x1, 1436, x2)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x2, 0x66666667, 0x6, x1, 1440, x2)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae148, 0x66666667, 0x33333334, x1, 1444, x2)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x28f5c28f, 0x66666667, 0x66666667, x1, 1448, x2)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffb798, 0x66666667, -0xb503, x1, 1452, x2)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x4868, 0x66666667, 0xb505, x1, 1456, x2)
+
+inst_396:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb503, 0x3, x1, 1460, x2)
+
+inst_397:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, -0xb503, 0x55555555, x1, 1464, x2)
+
+inst_398:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, -0xb503, -0x55555556, x1, 1468, x2)
+
+inst_399:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb503, 0x5, x1, 1472, x2)
+
+inst_400:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffdbcc, -0xb503, 0x33333333, x1, 1476, x2)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffb798, -0xb503, 0x66666666, x1, 1480, x2)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0xb503, -0xb504, x1, 1484, x2)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb503, 0xb504, x1, 1488, x2)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb503, 0x2, x1, 1492, x2)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, -0xb503, 0x55555554, x1, 1496, x2)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0xb503, 0x0, x1, 1500, x2)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb503, 0x4, x1, 1504, x2)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffdbcc, -0xb503, 0x33333332, x1, 1508, x2)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffb798, -0xb503, 0x66666665, x1, 1512, x2)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb503, 0xb503, x1, 1516, x2)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, -0xb503, 0x55555556, x1, 1520, x2)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, -0xb503, -0x55555555, x1, 1524, x2)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb503, 0x6, x1, 1528, x2)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffdbcc, -0xb503, 0x33333334, x1, 1532, x2)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffb798, -0xb503, 0x66666667, x1, 1536, x2)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0xb503, -0xb503, x1, 1540, x2)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0xb503, 0xb505, x1, 1544, x2)
+
+inst_418:
+// rs1_val==46341 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb505, 0x3, x1, 1548, x2)
+
+inst_419:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0xb505, 0x55555555, x1, 1552, x2)
+
+inst_420:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a8, 0xb505, -0x55555556, x1, 1556, x2)
+
+inst_421:
+// rs1_val==46341 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb505, 0x5, x1, 1560, x2)
+
+inst_422:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x2434, 0xb505, 0x33333333, x1, 1564, x2)
+
+inst_423:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x4868, 0xb505, 0x66666666, x1, 1568, x2)
+
+inst_424:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0xb505, -0xb504, x1, 1572, x2)
+
+inst_425:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb505, 0xb504, x1, 1576, x2)
+
+inst_426:
+// rs1_val==46341 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb505, 0x2, x1, 1580, x2)
+
+inst_427:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0xb505, 0x55555554, x1, 1584, x2)
+
+inst_428:
+// rs1_val==46341 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb505, 0x0, x1, 1588, x2)
+
+inst_429:
+// rs1_val==46341 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb505, 0x4, x1, 1592, x2)
+
+inst_430:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x2434, 0xb505, 0x33333332, x1, 1596, x2)
+
+inst_431:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x4868, 0xb505, 0x66666665, x1, 1600, x2)
+
+inst_432:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb505, 0xb503, x1, 1604, x2)
+
+inst_433:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c57, 0xb505, 0x55555556, x1, 1608, x2)
+
+inst_434:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, 0xb505, -0x55555555, x1, 1612, x2)
+
+inst_435:
+// rs1_val==46341 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb505, 0x6, x1, 1616, x2)
+
+inst_436:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x2434, 0xb505, 0x33333334, x1, 1620, x2)
+
+inst_437:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x4868, 0xb505, 0x66666667, x1, 1624, x2)
+
+inst_438:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0xb505, -0xb503, x1, 1628, x2)
+
+inst_439:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb505, 0xb505, x1, 1632, x2)
+
+inst_440:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, -0xb504, x1, 1636, x2)
+
+inst_441:
+// rs1_val==0 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0xb504, x1, 1640, x2)
+
+inst_442:
+// rs1_val==0 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x2, x1, 1644, x2)
+
+inst_443:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x55555554, x1, 1648, x2)
+
+inst_444:
+// rs1_val==0 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x0, x1, 1652, x2)
+
+inst_445:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x33333332, x1, 1656, x2)
+
+inst_446:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x66666665, x1, 1660, x2)
+
+inst_447:
+// rs1_val==0 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0xb503, x1, 1664, x2)
+
+inst_448:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x55555556, x1, 1668, x2)
+
+inst_449:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, -0x55555555, x1, 1672, x2)
+
+inst_450:
+// rs1_val==0 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x6, x1, 1676, x2)
+
+inst_451:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x33333334, x1, 1680, x2)
+
+inst_452:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0x66666667, x1, 1684, x2)
+
+inst_453:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, -0xb503, x1, 1688, x2)
+
+inst_454:
+// rs1_val==0 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x0, 0xb505, x1, 1692, x2)
+
+inst_455:
+// rs1_val==4 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4, 0x3, x1, 1696, x2)
+
+inst_456:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x4, 0x55555555, x1, 1700, x2)
+
+inst_457:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffe, 0x4, -0x55555556, x1, 1704, x2)
+
+inst_458:
+// rs1_val==4 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4, 0x5, x1, 1708, x2)
+
+inst_459:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4, 0x33333333, x1, 1712, x2)
+
+inst_460:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x4, 0x66666666, x1, 1716, x2)
+
+inst_461:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x4, -0xb504, x1, 1720, x2)
+
+inst_462:
+// rs1_val==4 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4, 0xb504, x1, 1724, x2)
+
+inst_463:
+// rs1_val==4 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4, 0x2, x1, 1728, x2)
+
+inst_464:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x4, 0x55555554, x1, 1732, x2)
+
+inst_465:
+// rs1_val==4 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4, 0x0, x1, 1736, x2)
+
+inst_466:
+// rs1_val==4 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4, 0x4, x1, 1740, x2)
+
+inst_467:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4, 0x33333332, x1, 1744, x2)
+
+inst_468:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x4, 0x66666665, x1, 1748, x2)
+
+inst_469:
+// rs1_val==4 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4, 0xb503, x1, 1752, x2)
+
+inst_470:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x4, 0x55555556, x1, 1756, x2)
+
+inst_471:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffe, 0x4, -0x55555555, x1, 1760, x2)
+
+inst_472:
+// rs1_val==4 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4, 0x6, x1, 1764, x2)
+
+inst_473:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4, 0x33333334, x1, 1768, x2)
+
+inst_474:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x4, 0x66666667, x1, 1772, x2)
+
+inst_475:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x4, -0xb503, x1, 1776, x2)
+
+inst_476:
+// rs1_val==4 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x4, 0xb505, x1, 1780, x2)
+
+inst_477:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333332, 0x3, x1, 1784, x2)
+
+inst_478:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111110, 0x33333332, 0x55555555, x1, 1788, x2)
+
+inst_479:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xeeeeeeef, 0x33333332, -0x55555556, x1, 1792, x2)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333332, 0x5, x1, 1796, x2)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0xa3d70a3, 0x33333332, 0x33333333, x1, 1800, x2)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x33333332, 0x66666666, x1, 1804, x2)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffdbcc, 0x33333332, -0xb504, x1, 1808, x2)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x2433, 0x33333332, 0xb504, x1, 1812, x2)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333332, 0x2, x1, 1816, x2)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111110, 0x33333332, 0x55555554, x1, 1820, x2)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333332, 0x0, x1, 1824, x2)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x33333332, 0x4, x1, 1828, x2)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0xa3d70a3, 0x33333332, 0x33333332, x1, 1832, x2)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae146, 0x33333332, 0x66666665, x1, 1836, x2)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x2433, 0x33333332, 0xb503, x1, 1840, x2)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111110, 0x33333332, 0x55555556, x1, 1844, x2)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xeeeeeeef, 0x33333332, -0x55555555, x1, 1848, x2)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x33333332, 0x6, x1, 1852, x2)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0xa3d70a3, 0x33333332, 0x33333334, x1, 1856, x2)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x33333332, 0x66666667, x1, 1860, x2)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffdbcc, 0x33333332, -0xb503, x1, 1864, x2)
+
+inst_498:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x2434, 0x33333332, 0xb505, x1, 1868, x2)
+
+inst_499:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x66666665, 0x3, x1, 1872, x2)
+
+inst_500:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222221, 0x66666665, 0x55555555, x1, 1876, x2)
+
+inst_501:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xddddddde, 0x66666665, -0x55555556, x1, 1880, x2)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x66666665, 0x5, x1, 1884, x2)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x66666665, 0x33333333, x1, 1888, x2)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x28f5c28e, 0x66666665, 0x66666666, x1, 1892, x2)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffb798, 0x66666665, -0xb504, x1, 1896, x2)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x4867, 0x66666665, 0xb504, x1, 1900, x2)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x66666665, 0x2, x1, 1904, x2)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222221, 0x66666665, 0x55555554, x1, 1908, x2)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x66666665, 0x0, x1, 1912, x2)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x66666665, 0x4, x1, 1916, x2)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae146, 0x66666665, 0x33333332, x1, 1920, x2)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x28f5c28e, 0x66666665, 0x66666665, x1, 1924, x2)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x4867, 0x66666665, 0xb503, x1, 1928, x2)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222221, 0x66666665, 0x55555556, x1, 1932, x2)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xddddddde, 0x66666665, -0x55555555, x1, 1936, x2)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x2, 0x66666665, 0x6, x1, 1940, x2)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x147ae147, 0x66666665, 0x33333334, x1, 1944, x2)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x28f5c28f, 0x66666665, 0x66666667, x1, 1948, x2)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffb798, 0x66666665, -0xb503, x1, 1952, x2)
+
+inst_520:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x4868, 0x66666665, 0xb505, x1, 1956, x2)
+
+inst_521:
+// rs1_val==46339 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb503, 0x3, x1, 1960, x2)
+
+inst_522:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0xb503, 0x55555555, x1, 1964, x2)
+
+inst_523:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, 0xb503, -0x55555556, x1, 1968, x2)
+
+inst_524:
+// rs1_val==46339 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb503, 0x5, x1, 1972, x2)
+
+inst_525:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x2433, 0xb503, 0x33333333, x1, 1976, x2)
+
+inst_526:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x4867, 0xb503, 0x66666666, x1, 1980, x2)
+
+inst_527:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0xb503, -0xb504, x1, 1984, x2)
+
+inst_528:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb503, 0xb504, x1, 1988, x2)
+
+inst_529:
+// rs1_val==46339 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb503, 0x2, x1, 1992, x2)
+
+inst_530:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0xb503, 0x55555554, x1, 1996, x2)
+
+inst_531:
+// rs1_val==46339 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb503, 0x0, x1, 2000, x2)
+
+inst_532:
+// rs1_val==46339 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb503, 0x4, x1, 2004, x2)
+
+inst_533:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x2433, 0xb503, 0x33333332, x1, 2008, x2)
+
+inst_534:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x4867, 0xb503, 0x66666665, x1, 2012, x2)
+
+inst_535:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb503, 0xb503, x1, 2016, x2)
+
+inst_536:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0xb503, 0x55555556, x1, 2020, x2)
+
+inst_537:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, 0xb503, -0x55555555, x1, 2024, x2)
+
+inst_538:
+// rs1_val==46339 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb503, 0x6, x1, 2028, x2)
+
+inst_539:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x2433, 0xb503, 0x33333334, x1, 2032, x2)
+
+inst_540:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x4867, 0xb503, 0x66666667, x1, 2036, x2)
+
+inst_541:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0xb503, -0xb503, x1, 2040, x2)
+
+inst_542:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0xb503, 0xb505, x1, 2044, x2)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_543:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x55555556, 0x3, x1, 0, x2)
+
+inst_544:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0x1c71c71c, 0x55555556, 0x55555555, x1, 4, x2)
+
+inst_545:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xe38e38e3, 0x55555556, -0x55555556, x1, 8, x2)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x55555556, 0x5, x1, 12, x2)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111111, 0x55555556, 0x33333333, x1, 16, x2)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222222, 0x55555556, 0x66666666, x1, 20, x2)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, 0x55555556, -0xb504, x1, 24, x2)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0x55555556, 0xb504, x1, 28, x2)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x55555556, 0x2, x1, 32, x2)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0x1c71c71c, 0x55555556, 0x55555554, x1, 36, x2)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x55555556, 0x0, x1, 40, x2)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0x1, 0x55555556, 0x4, x1, 44, x2)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111110, 0x55555556, 0x33333332, x1, 48, x2)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222221, 0x55555556, 0x66666665, x1, 52, x2)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, 0x55555556, 0xb503, x1, 56, x2)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x1c71c71c, 0x55555556, 0x55555556, x1, 60, x2)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xe38e38e3, 0x55555556, -0x55555555, x1, 64, x2)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(mulh, x12, x10, x11, 0x2, 0x55555556, 0x6, x1, 68, x2)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(mulh, x12, x10, x11, 0x11111111, 0x55555556, 0x33333334, x1, 72, x2)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(mulh, x12, x10, x11, 0x22222222, 0x55555556, 0x66666667, x1, 76, x2)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, 0x55555556, -0xb503, x1, 80, x2)
+
+inst_564:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c57, 0x55555556, 0xb505, x1, 84, x2)
+
+inst_565:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x3
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0x55555555, 0x3, x1, 88, x2)
+
+inst_566:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555555
+TEST_RR_OP(mulh, x12, x10, x11, 0xe38e38e3, -0x55555555, 0x55555555, x1, 92, x2)
+
+inst_567:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0x1c71c71c, -0x55555555, -0x55555556, x1, 96, x2)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x5
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffe, -0x55555555, 0x5, x1, 100, x2)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333333
+TEST_RR_OP(mulh, x12, x10, x11, 0xeeeeeeef, -0x55555555, 0x33333333, x1, 104, x2)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666666
+TEST_RR_OP(mulh, x12, x10, x11, 0xddddddde, -0x55555555, 0x66666666, x1, 108, x2)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0x3c56, -0x55555555, -0xb504, x1, 112, x2)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb504
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, -0x55555555, 0xb504, x1, 116, x2)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, -0x55555555, 0x2, x1, 120, x2)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555554
+TEST_RR_OP(mulh, x12, x10, x11, 0xe38e38e4, -0x55555555, 0x55555554, x1, 124, x2)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x0
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, -0x55555555, 0x0, x1, 128, x2)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x4
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffe, -0x55555555, 0x4, x1, 132, x2)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333332
+TEST_RR_OP(mulh, x12, x10, x11, 0xeeeeeeef, -0x55555555, 0x33333332, x1, 136, x2)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666665
+TEST_RR_OP(mulh, x12, x10, x11, 0xddddddde, -0x55555555, 0x66666665, x1, 140, x2)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb503
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffc3a9, -0x55555555, 0xb503, x1, 144, x2)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555556
+TEST_RR_OP(mulh, x12, x10, x11, 0xe38e38e3, -0x55555555, 0x55555556, x1, 148, x2)
+
+inst_581:
+// rs1_val > 0 and rs2_val < 0, rs2_val == -2
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x2
+TEST_RR_OP(mulh, x12, x10, x11, 0xffffffff, 0x33333332, -0x2, x1, 152, x2)
+
+inst_582:
+// rs2_val == (2**(xlen-1)-1), rs1_val == -5, rs2_val == 2147483647
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0x7fffffff
+TEST_RR_OP(mulh, x12, x10, x11, 0xfffffffd, -0x5, 0x7fffffff, x1, 156, x2)
+
+inst_583:
+// rs2_val == 8192,
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2000
+TEST_RR_OP(mulh, x12, x10, x11, 0x0, 0x5, 0x2000, x1, 160, x2)
+
+inst_584:
+// rs2_val == 131072, rs1_val == 33554432
+// opcode: mulh ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x20000
+TEST_RR_OP(mulh, x12, x10, x11, 0x400, 0x2000000, 0x20000, x1, 164, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x4_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_1:
+ .fill 16*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_0:
+ .fill 15*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 42*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/mulhsu-01.S b/riscof/suite/rv32i_m/M/mulhsu-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..1052bc8e257b85c18d0123a319c0312bd2ddcc22
--- /dev/null
+++ b/riscof/suite/rv32i_m/M/mulhsu-01.S
@@ -0,0 +1,3319 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:41:59 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32im.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the mulhsu instruction of the RISC-V M extension for the mulhsu covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IM")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*M.*);def TEST_CASE_1=True;",mulhsu)
+
+RVTEST_SIGBASE( x17,signature_x17_1)
+
+inst_0:
+// rs1 == rd != rs2, rs1==x22, rs2==x10, rd==x22, rs1_val > 0 and rs2_val > 0, rs1_val != rs2_val and rs1_val > 0 and rs2_val > 0, rs1_val == 4, rs1_val==4 and rs2_val==3
+// opcode: mulhsu ; op1:x22; op2:x10; dest:x22; op1val:0x4; op2val:0x3
+TEST_RR_OP(mulhsu, x22, x22, x10, 0x0, 0x4, 0x3, x17, 0, x20)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x23, rs2==x23, rd==x2, rs1_val == rs2_val and rs1_val > 0 and rs2_val > 0, rs2_val == 128, rs1_val == 128
+// opcode: mulhsu ; op1:x23; op2:x23; dest:x2; op1val:0x80; op2val:0x80
+TEST_RR_OP(mulhsu, x2, x23, x23, 0x0, 0x80, 0x80, x17, 4, x20)
+
+inst_2:
+// rs2 == rd != rs1, rs1==x2, rs2==x19, rd==x19, rs2_val == 0, rs1_val==46339 and rs2_val==0
+// opcode: mulhsu ; op1:x2; op2:x19; dest:x19; op1val:0xb503; op2val:0x0
+TEST_RR_OP(mulhsu, x19, x2, x19, 0x0, 0xb503, 0x0, x17, 8, x20)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x25, rs2==x9, rd==x7, rs2_val == (2**(xlen)-1),
+// opcode: mulhsu ; op1:x25; op2:x9; dest:x7; op1val:0x4; op2val:0xffffffff
+TEST_RR_OP(mulhsu, x7, x25, x9, 0x3, 0x4, 0xffffffff, x17, 12, x20)
+
+inst_4:
+// rs1 == rs2 == rd, rs1==x28, rs2==x28, rd==x28, rs2_val == 1, rs1_val == -536870913
+// opcode: mulhsu ; op1:x28; op2:x28; dest:x28; op1val:-0x20000001; op2val:-0x20000001
+TEST_RR_OP(mulhsu, x28, x28, x28, 0xe3ffffff, -0x20000001, -0x20000001, x17, 16, x20)
+
+inst_5:
+// rs1==x0, rs2==x18, rd==x8, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648, rs2_val == 4294967263
+// opcode: mulhsu ; op1:x0; op2:x18; dest:x8; op1val:0x0; op2val:0xffffffdf
+TEST_RR_OP(mulhsu, x8, x0, x18, 0x0, 0x0, 0xffffffdf, x17, 20, x20)
+
+inst_6:
+// rs1==x14, rs2==x15, rd==x12, rs1_val == 0,
+// opcode: mulhsu ; op1:x14; op2:x15; dest:x12; op1val:0x0; op2val:0x12
+TEST_RR_OP(mulhsu, x12, x14, x15, 0x0, 0x0, 0x12, x17, 24, x20)
+
+inst_7:
+// rs1==x13, rs2==x3, rd==x4, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647, rs2_val == 4026531839
+// opcode: mulhsu ; op1:x13; op2:x3; dest:x4; op1val:0x7fffffff; op2val:0xefffffff
+TEST_RR_OP(mulhsu, x4, x13, x3, 0x77fffffe, 0x7fffffff, 0xefffffff, x17, 28, x20)
+
+inst_8:
+// rs1==x6, rs2==x16, rd==x30, rs1_val == 1, rs2_val == 1024
+// opcode: mulhsu ; op1:x6; op2:x16; dest:x30; op1val:0x1; op2val:0x400
+TEST_RR_OP(mulhsu, x30, x6, x16, 0x0, 0x1, 0x400, x17, 32, x20)
+
+inst_9:
+// rs1==x8, rs2==x5, rd==x1, rs2_val == 2, rs1_val==3 and rs2_val==2
+// opcode: mulhsu ; op1:x8; op2:x5; dest:x1; op1val:0x3; op2val:0x2
+TEST_RR_OP(mulhsu, x1, x8, x5, 0x0, 0x3, 0x2, x17, 36, x20)
+
+inst_10:
+// rs1==x11, rs2==x27, rd==x9, rs2_val == 4, rs1_val==6 and rs2_val==4
+// opcode: mulhsu ; op1:x11; op2:x27; dest:x9; op1val:0x6; op2val:0x4
+TEST_RR_OP(mulhsu, x9, x11, x27, 0x0, 0x6, 0x4, x17, 40, x20)
+
+inst_11:
+// rs1==x27, rs2==x25, rd==x13, rs2_val == 8,
+// opcode: mulhsu ; op1:x27; op2:x25; dest:x13; op1val:-0x40000000; op2val:0x8
+TEST_RR_OP(mulhsu, x13, x27, x25, 0xfffffffe, -0x40000000, 0x8, x17, 44, x20)
+
+inst_12:
+// rs1==x30, rs2==x14, rd==x16, rs2_val == 16, rs1_val == -65
+// opcode: mulhsu ; op1:x30; op2:x14; dest:x16; op1val:-0x41; op2val:0x10
+TEST_RR_OP(mulhsu, x16, x30, x14, 0xffffffff, -0x41, 0x10, x17, 48, x20)
+
+inst_13:
+// rs1==x15, rs2==x22, rd==x11, rs2_val == 32, rs1_val == -5
+// opcode: mulhsu ; op1:x15; op2:x22; dest:x11; op1val:-0x5; op2val:0x20
+TEST_RR_OP(mulhsu, x11, x15, x22, 0xffffffff, -0x5, 0x20, x17, 52, x20)
+
+inst_14:
+// rs1==x16, rs2==x4, rd==x29, rs2_val == 64,
+// opcode: mulhsu ; op1:x16; op2:x4; dest:x29; op1val:-0x41; op2val:0x40
+TEST_RR_OP(mulhsu, x29, x16, x4, 0xffffffff, -0x41, 0x40, x17, 56, x20)
+
+inst_15:
+// rs1==x24, rs2==x13, rd==x21, rs2_val == 256, rs1_val == 134217728
+// opcode: mulhsu ; op1:x24; op2:x13; dest:x21; op1val:0x8000000; op2val:0x100
+TEST_RR_OP(mulhsu, x21, x24, x13, 0x8, 0x8000000, 0x100, x17, 60, x20)
+
+inst_16:
+// rs1==x19, rs2==x6, rd==x26, rs2_val == 512, rs1_val == -257
+// opcode: mulhsu ; op1:x19; op2:x6; dest:x26; op1val:-0x101; op2val:0x200
+TEST_RR_OP(mulhsu, x26, x19, x6, 0xffffffff, -0x101, 0x200, x17, 64, x16)
+RVTEST_SIGBASE( x13,signature_x13_0)
+
+inst_17:
+// rs1==x9, rs2==x31, rd==x18, rs2_val == 2048,
+// opcode: mulhsu ; op1:x9; op2:x31; dest:x18; op1val:0x33333334; op2val:0x800
+TEST_RR_OP(mulhsu, x18, x9, x31, 0x199, 0x33333334, 0x800, x13, 0, x16)
+
+inst_18:
+// rs1==x5, rs2==x7, rd==x25, rs2_val == 4096,
+// opcode: mulhsu ; op1:x5; op2:x7; dest:x25; op1val:0xb504; op2val:0x1000
+TEST_RR_OP(mulhsu, x25, x5, x7, 0x0, 0xb504, 0x1000, x13, 4, x16)
+
+inst_19:
+// rs1==x26, rs2==x17, rd==x0, rs2_val == 8192, rs1_val == 4194304
+// opcode: mulhsu ; op1:x26; op2:x17; dest:x0; op1val:0x400000; op2val:0x2000
+TEST_RR_OP(mulhsu, x0, x26, x17, 0, 0x400000, 0x2000, x13, 8, x16)
+
+inst_20:
+// rs1==x1, rs2==x26, rd==x23, rs2_val == 16384, rs1_val == 32
+// opcode: mulhsu ; op1:x1; op2:x26; dest:x23; op1val:0x20; op2val:0x4000
+TEST_RR_OP(mulhsu, x23, x1, x26, 0x0, 0x20, 0x4000, x13, 12, x16)
+
+inst_21:
+// rs1==x21, rs2==x8, rd==x15, rs2_val == 32768,
+// opcode: mulhsu ; op1:x21; op2:x8; dest:x15; op1val:0x0; op2val:0x8000
+TEST_RR_OP(mulhsu, x15, x21, x8, 0x0, 0x0, 0x8000, x13, 16, x16)
+
+inst_22:
+// rs1==x31, rs2==x0, rd==x20, rs2_val == 65536, rs1_val == 8
+// opcode: mulhsu ; op1:x31; op2:x0; dest:x20; op1val:0x8; op2val:0x0
+TEST_RR_OP(mulhsu, x20, x31, x0, 0x0, 0x8, 0x0, x13, 20, x16)
+
+inst_23:
+// rs1==x17, rs2==x24, rd==x14, rs2_val == 131072, rs1_val == -17
+// opcode: mulhsu ; op1:x17; op2:x24; dest:x14; op1val:-0x11; op2val:0x20000
+TEST_RR_OP(mulhsu, x14, x17, x24, 0xffffffff, -0x11, 0x20000, x13, 24, x16)
+
+inst_24:
+// rs1==x4, rs2==x21, rd==x24, rs2_val == 262144, rs1_val == 67108864
+// opcode: mulhsu ; op1:x4; op2:x21; dest:x24; op1val:0x4000000; op2val:0x40000
+TEST_RR_OP(mulhsu, x24, x4, x21, 0x1000, 0x4000000, 0x40000, x13, 28, x16)
+
+inst_25:
+// rs1==x12, rs2==x30, rd==x5, rs2_val == 524288,
+// opcode: mulhsu ; op1:x12; op2:x30; dest:x5; op1val:0x66666666; op2val:0x80000
+TEST_RR_OP(mulhsu, x5, x12, x30, 0x33333, 0x66666666, 0x80000, x13, 32, x16)
+
+inst_26:
+// rs1==x7, rs2==x20, rd==x6, rs2_val == 1048576, rs1_val == 4096
+// opcode: mulhsu ; op1:x7; op2:x20; dest:x6; op1val:0x1000; op2val:0x100000
+TEST_RR_OP(mulhsu, x6, x7, x20, 0x1, 0x1000, 0x100000, x13, 36, x16)
+
+inst_27:
+// rs1==x18, rs2==x1, rd==x31, rs2_val == 2097152,
+// opcode: mulhsu ; op1:x18; op2:x1; dest:x31; op1val:0x5; op2val:0x200000
+TEST_RR_OP(mulhsu, x31, x18, x1, 0x0, 0x5, 0x200000, x13, 40, x16)
+
+inst_28:
+// rs1==x29, rs2==x2, rd==x10, rs2_val == 4194304, rs1_val == -1073741825
+// opcode: mulhsu ; op1:x29; op2:x2; dest:x10; op1val:-0x40000001; op2val:0x400000
+TEST_RR_OP(mulhsu, x10, x29, x2, 0xffefffff, -0x40000001, 0x400000, x13, 44, x16)
+
+inst_29:
+// rs1==x3, rs2==x12, rd==x17, rs2_val == 8388608, rs1_val == 512
+// opcode: mulhsu ; op1:x3; op2:x12; dest:x17; op1val:0x200; op2val:0x800000
+TEST_RR_OP(mulhsu, x17, x3, x12, 0x1, 0x200, 0x800000, x13, 48, x16)
+
+inst_30:
+// rs1==x10, rs2==x11, rd==x27, rs2_val == 16777216,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x27; op1val:0x3; op2val:0x1000000
+TEST_RR_OP(mulhsu, x27, x10, x11, 0x0, 0x3, 0x1000000, x13, 52, x16)
+
+inst_31:
+// rs1==x20, rs2==x29, rd==x3, rs2_val == 33554432,
+// opcode: mulhsu ; op1:x20; op2:x29; dest:x3; op1val:-0x6; op2val:0x2000000
+TEST_RR_OP(mulhsu, x3, x20, x29, 0xffffffff, -0x6, 0x2000000, x13, 56, x1)
+
+inst_32:
+// rs2_val == 67108864,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x4000000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x10000, 0x400000, 0x4000000, x13, 60, x1)
+
+inst_33:
+// rs2_val == 134217728,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x8000000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x6, 0x8000000, x13, 64, x1)
+
+inst_34:
+// rs2_val == 268435456,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x9; op2val:0x10000000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x9, 0x10000000, x13, 68, x1)
+
+inst_35:
+// rs2_val == 536870912,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0x20000000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x10, 0x80, 0x20000000, x13, 72, x1)
+
+inst_36:
+// rs2_val == 1073741824, rs1_val == 8388608
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x40000000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x200000, 0x800000, 0x40000000, x13, 76, x1)
+
+inst_37:
+// rs2_val == 2147483648,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x80000000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x800, 0x1000, 0x80000000, x13, 80, x1)
+
+inst_38:
+// rs2_val == 4294967294, rs1_val == -2
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0xfffffffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffffe, -0x2, 0xfffffffe, x13, 84, x1)
+
+inst_39:
+// rs2_val == 4294967293, rs1_val == -1025
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0xfffffffd
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffbff, -0x401, 0xfffffffd, x13, 88, x1)
+
+inst_40:
+// rs2_val == 4294967291, rs1_val == 262144
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0xfffffffb
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3ffff, 0x40000, 0xfffffffb, x13, 92, x1)
+
+inst_41:
+// rs2_val == 4294967287, rs1_val == 65536
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xfffffff7
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffff, 0x10000, 0xfffffff7, x13, 96, x1)
+
+inst_42:
+// rs2_val == 4294967279,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xffffffef
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xb503, 0xb504, 0xffffffef, x13, 100, x1)
+
+inst_43:
+// rs2_val == 4294967231,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xffffffbf
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x33333325, 0x33333332, 0xffffffbf, x13, 104, x1)
+
+inst_44:
+// rs2_val == 4294967167, rs1_val == 1073741824
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0xffffff7f
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3fffffdf, 0x40000000, 0xffffff7f, x13, 108, x1)
+
+inst_45:
+// rs2_val == 4294967039, rs1_val == 32768
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:0xfffffeff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x7fff, 0x8000, 0xfffffeff, x13, 112, x1)
+
+inst_46:
+// rs2_val == 4294966783, rs1_val == -3
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0xfffffdff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffffd, -0x3, 0xfffffdff, x13, 116, x1)
+
+inst_47:
+// rs2_val == 4294966271,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:0xfffffbff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1f, 0x20, 0xfffffbff, x13, 120, x1)
+
+inst_48:
+// rs2_val == 4294965247, rs1_val == 1048576
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0xfffff7ff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffff, 0x100000, 0xfffff7ff, x13, 124, x1)
+
+inst_49:
+// rs2_val == 4294963199, rs1_val == -1431655766
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xffffefff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xaaaaafff, -0x55555556, 0xffffefff, x13, 128, x1)
+
+inst_50:
+// rs2_val == 4294959103,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xffffdfff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3, 0x4, 0xffffdfff, x13, 132, x1)
+
+inst_51:
+// rs2_val == 4294950911,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xffffbfff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xaaaabfff, -0x55555556, 0xffffbfff, x13, 136, x1)
+
+inst_52:
+// rs2_val == 4294934527, rs1_val == 2048
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:0xffff7fff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x7ff, 0x800, 0xffff7fff, x13, 140, x1)
+
+inst_53:
+// rs2_val == 4294901759,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0xfffeffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3fffbff, 0x4000000, 0xfffeffff, x13, 144, x1)
+
+inst_54:
+// rs2_val == 4294836223,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0xfffdffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xc0007fff, -0x40000001, 0xfffdffff, x13, 148, x1)
+
+inst_55:
+// rs2_val == 4294705151,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xfffbffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3, 0x4, 0xfffbffff, x13, 152, x1)
+
+inst_56:
+// rs2_val == 4294443007, rs1_val == -16777217
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0xfff7ffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xff0007ff, -0x1000001, 0xfff7ffff, x13, 156, x1)
+
+inst_57:
+// rs2_val == 4293918719,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xffefffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0xffefffff, x13, 160, x1)
+
+inst_58:
+// rs2_val == 4292870143,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0xffdfffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffffd, -0x3, 0xffdfffff, x13, 164, x1)
+
+inst_59:
+// rs2_val == 4290772991, rs1_val == 64
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0xffbfffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3f, 0x40, 0xffbfffff, x13, 168, x1)
+
+inst_60:
+// rs2_val == 4286578687,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x8; op2val:0xff7fffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffff8, -0x8, 0xff7fffff, x13, 172, x1)
+
+inst_61:
+// rs2_val == 4278190079, rs1_val == -4097
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0xfeffffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffff00f, -0x1001, 0xfeffffff, x13, 176, x1)
+
+inst_62:
+// rs2_val == 4261412863, rs1_val == 2097152
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0xfdffffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1fbfff, 0x200000, 0xfdffffff, x13, 180, x1)
+
+inst_63:
+// rs2_val == 4227858431,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xfbffffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x32666666, 0x33333334, 0xfbffffff, x13, 184, x1)
+
+inst_64:
+// rs2_val == 4160749567, rs1_val == -1048577
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0xf7ffffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfff07fff, -0x100001, 0xf7ffffff, x13, 188, x1)
+
+inst_65:
+// rs2_val == 3758096383,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0xdfffffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x6, 0x8, 0xdfffffff, x13, 192, x1)
+
+inst_66:
+// rs2_val == 3221225471,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0xbfffffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffcff, -0x401, 0xbfffffff, x13, 196, x1)
+
+inst_67:
+// rs2_val == 2147483647,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x7fffffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x7fffffff, x13, 200, x1)
+
+inst_68:
+// rs2_val == 1431655765, rs1_val==-1431655765 and rs2_val==1431655765
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xe38e38e3, -0x55555555, 0x55555555, x13, 204, x1)
+
+inst_69:
+// rs2_val == 2863311530, rs1_val==5 and rs2_val==2863311530
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3, 0x5, 0xaaaaaaaa, x13, 208, x1)
+
+inst_70:
+// rs1_val == 2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x13
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x13, x13, 212, x1)
+
+inst_71:
+// rs1_val == 16,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xa, 0x10, 0xaaaaaaa9, x13, 216, x1)
+
+inst_72:
+// rs1_val == 256,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:0x80
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x100, 0x80, x13, 220, x1)
+
+inst_73:
+// rs1_val == 1024,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:0xffffff7f
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3ff, 0x400, 0xffffff7f, x13, 224, x1)
+
+inst_74:
+// rs1_val == 8192,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0xd
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2000, 0xd, x13, 228, x1)
+
+inst_75:
+// rs1_val == 16384,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4000, 0xb503, x13, 232, x1)
+
+inst_76:
+// rs1_val == 131072,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0xffbfffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1ff7f, 0x20000, 0xffbfffff, x13, 236, x1)
+
+inst_77:
+// rs1_val == 524288,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x5, 0x80000, 0xb504, x13, 240, x1)
+
+inst_78:
+// rs1_val == 16777216,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0x400
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4, 0x1000000, 0x400, x13, 244, x1)
+
+inst_79:
+// rs1_val == 33554432,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xaaaaaa, 0x2000000, 0x55555556, x13, 248, x1)
+
+inst_80:
+// rs1_val == 268435456,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x11
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x10000000, 0x11, x13, 252, x1)
+
+inst_81:
+// rs1_val == 536870912,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0xc
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x20000000, 0xc, x13, 256, x1)
+
+inst_82:
+// rs1_val == -9,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0xff7fffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffff7, -0x9, 0xff7fffff, x13, 260, x1)
+
+inst_83:
+// rs1_val == -33,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x200
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0x21, 0x200, x13, 264, x1)
+
+inst_84:
+// rs1_val == -129,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0xffdfffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffff7f, -0x81, 0xffdfffff, x13, 268, x1)
+
+inst_85:
+// rs1_val == -513,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffff32, -0x201, 0x66666665, x13, 272, x1)
+
+inst_86:
+// rs1_val == -2049,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0x801, 0x4, x13, 276, x1)
+
+inst_87:
+// rs1_val == -8193,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffeaaa, -0x2001, 0xaaaaaaaa, x13, 280, x1)
+
+inst_88:
+// rs1_val == -16385,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0xffffffdf
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffbfff, -0x4001, 0xffffffdf, x13, 284, x1)
+
+inst_89:
+// rs1_val == -32769,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffe666, -0x8001, 0x33333332, x13, 288, x1)
+
+inst_90:
+// rs1_val == -65537,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0xfffffffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffeffff, -0x10001, 0xfffffffe, x13, 292, x1)
+
+inst_91:
+// rs1_val == -131073,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0x20001, 0x4, x13, 296, x1)
+
+inst_92:
+// rs1_val == -262145,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0xffffffef
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffbffff, -0x40001, 0xffffffef, x13, 300, x1)
+
+inst_93:
+// rs1_val == -524289,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0xffffffef
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfff7ffff, -0x80001, 0xffffffef, x13, 304, x1)
+
+inst_94:
+// rs1_val == -2097153,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0x7
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0x200001, 0x7, x13, 308, x1)
+
+inst_95:
+// rs1_val == -4194305,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0x8000000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffdffff, -0x400001, 0x8000000, x13, 312, x1)
+
+inst_96:
+// rs1_val == -8388609,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x10000000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfff7ffff, -0x800001, 0x10000000, x13, 316, x1)
+
+inst_97:
+// rs1_val == -33554433,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xff555554, -0x2000001, 0x55555556, x13, 320, x1)
+
+inst_98:
+// rs1_val == -67108865,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xff333332, -0x4000001, 0x33333334, x13, 324, x1)
+
+inst_99:
+// rs1_val == -134217729,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0xfbffffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xf81fffff, -0x8000001, 0xfbffffff, x13, 328, x1)
+
+inst_100:
+// rs1_val == -268435457,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x400
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffbf, -0x10000001, 0x400, x13, 332, x1)
+
+inst_101:
+// rs1_val == 1431655765, rs1_val==1431655765 and rs2_val==1431655765
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1c71c71c, 0x55555555, 0x55555555, x13, 336, x1)
+
+inst_102:
+// rs1_val==3 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0x3, x13, 340, x1)
+
+inst_103:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0x55555555, x13, 344, x1)
+
+inst_104:
+// rs1_val==3 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x3, 0xaaaaaaaa, x13, 348, x1)
+
+inst_105:
+// rs1_val==3 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0x5, x13, 352, x1)
+
+inst_106:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0x33333333, x13, 356, x1)
+
+inst_107:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x3, 0x66666666, x13, 360, x1)
+
+inst_108:
+// rs1_val==3 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0xb504, x13, 364, x1)
+
+inst_109:
+// rs1_val==3 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0x0, x13, 368, x1)
+
+inst_110:
+// rs1_val==3 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0xffff, x13, 372, x1)
+
+inst_111:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0x55555554, x13, 376, x1)
+
+inst_112:
+// rs1_val==3 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x3, 0xaaaaaaa9, x13, 380, x1)
+
+inst_113:
+// rs1_val==3 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0x4, x13, 384, x1)
+
+inst_114:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0x33333332, x13, 388, x1)
+
+inst_115:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x3, 0x66666665, x13, 392, x1)
+
+inst_116:
+// rs1_val==3 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0xb503, x13, 396, x1)
+
+inst_117:
+// rs1_val==3 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0xfffe, x13, 400, x1)
+
+inst_118:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x3, 0x55555556, x13, 404, x1)
+
+inst_119:
+// rs1_val==3 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x3, 0xaaaaaaab, x13, 408, x1)
+
+inst_120:
+// rs1_val==3 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0x6, x13, 412, x1)
+
+inst_121:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0x33333334, x13, 416, x1)
+
+inst_122:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x3, 0x66666667, x13, 420, x1)
+
+inst_123:
+// rs1_val==3 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0xb505, x13, 424, x1)
+
+inst_124:
+// rs1_val==3 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0x1, x13, 428, x1)
+
+inst_125:
+// rs1_val==3 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x3, 0x10000, x13, 432, x1)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x55555555, 0x3, x13, 436, x1)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x38e38e38, 0x55555555, 0xaaaaaaaa, x13, 440, x1)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x55555555, 0x5, x13, 444, x1)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111110, 0x55555555, 0x33333333, x13, 448, x1)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x55555555, 0x66666666, x13, 452, x1)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0x55555555, 0xb504, x13, 456, x1)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x55555555, 0x0, x13, 460, x1)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x5554, 0x55555555, 0xffff, x13, 464, x1)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x55555555, 0x2, x13, 468, x1)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1c71c71b, 0x55555555, 0x55555554, x13, 472, x1)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x38e38e38, 0x55555555, 0xaaaaaaa9, x13, 476, x1)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x55555555, 0x4, x13, 480, x1)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111110, 0x55555555, 0x33333332, x13, 484, x1)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x55555555, 0x66666665, x13, 488, x1)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0x55555555, 0xb503, x13, 492, x1)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x5554, 0x55555555, 0xfffe, x13, 496, x1)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1c71c71c, 0x55555555, 0x55555556, x13, 500, x1)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x38e38e38, 0x55555555, 0xaaaaaaab, x13, 504, x1)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x55555555, 0x6, x13, 508, x1)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111111, 0x55555555, 0x33333334, x13, 512, x1)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222222, 0x55555555, 0x66666667, x13, 516, x1)
+
+inst_147:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0x55555555, 0xb505, x13, 520, x1)
+
+inst_148:
+// rs1_val==1431655765 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x55555555, 0x1, x13, 524, x1)
+
+inst_149:
+// rs1_val==1431655765 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x5555, 0x55555555, 0x10000, x13, 528, x1)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffffe, -0x55555556, 0x3, x13, 532, x1)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xe38e38e3, -0x55555556, 0x55555555, x13, 536, x1)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xc71c71c6, -0x55555556, 0xaaaaaaaa, x13, 540, x1)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffffe, -0x55555556, 0x5, x13, 544, x1)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xeeeeeeee, -0x55555556, 0x33333333, x13, 548, x1)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xdddddddd, -0x55555556, 0x66666666, x13, 552, x1)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffc3a9, -0x55555556, 0xb504, x13, 556, x1)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, -0x55555556, 0x0, x13, 560, x1)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffaaaa, -0x55555556, 0xffff, x13, 564, x1)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0x55555556, 0x2, x13, 568, x1)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xe38e38e3, -0x55555556, 0x55555554, x13, 572, x1)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xc71c71c7, -0x55555556, 0xaaaaaaa9, x13, 576, x1)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffffe, -0x55555556, 0x4, x13, 580, x1)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xeeeeeeef, -0x55555556, 0x33333332, x13, 584, x1)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xddddddde, -0x55555556, 0x66666665, x13, 588, x1)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffc3a9, -0x55555556, 0xb503, x13, 592, x1)
+
+inst_166:
+// rs1_val==-1431655766 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffaaab, -0x55555556, 0xfffe, x13, 596, x1)
+
+inst_167:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xe38e38e3, -0x55555556, 0x55555556, x13, 600, x1)
+
+inst_168:
+// rs1_val==-1431655766 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xc71c71c6, -0x55555556, 0xaaaaaaab, x13, 604, x1)
+
+inst_169:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffffd, -0x55555556, 0x6, x13, 608, x1)
+
+inst_170:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xeeeeeeee, -0x55555556, 0x33333334, x13, 612, x1)
+
+inst_171:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xdddddddd, -0x55555556, 0x66666667, x13, 616, x1)
+
+inst_172:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffc3a8, -0x55555556, 0xb505, x13, 620, x1)
+
+inst_173:
+// rs1_val==-1431655766 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0x55555556, 0x1, x13, 624, x1)
+
+inst_174:
+// rs1_val==-1431655766 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffaaaa, -0x55555556, 0x10000, x13, 628, x1)
+
+inst_175:
+// rs1_val==5 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0x3, x13, 632, x1)
+
+inst_176:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x5, 0x55555555, x13, 636, x1)
+
+inst_177:
+// rs1_val==5 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0x5, x13, 640, x1)
+
+inst_178:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0x33333333, x13, 644, x1)
+
+inst_179:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x5, 0x66666666, x13, 648, x1)
+
+inst_180:
+// rs1_val==5 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0xb504, x13, 652, x1)
+
+inst_181:
+// rs1_val==5 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0x0, x13, 656, x1)
+
+inst_182:
+// rs1_val==5 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0xffff, x13, 660, x1)
+
+inst_183:
+// rs1_val==5 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0x2, x13, 664, x1)
+
+inst_184:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x5, 0x55555554, x13, 668, x1)
+
+inst_185:
+// rs1_val==5 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3, 0x5, 0xaaaaaaa9, x13, 672, x1)
+
+inst_186:
+// rs1_val==5 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0x4, x13, 676, x1)
+
+inst_187:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0x33333332, x13, 680, x1)
+
+inst_188:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x5, 0x66666665, x13, 684, x1)
+
+inst_189:
+// rs1_val==5 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0xb503, x13, 688, x1)
+
+inst_190:
+// rs1_val==5 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0xfffe, x13, 692, x1)
+
+inst_191:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x5, 0x55555556, x13, 696, x1)
+
+inst_192:
+// rs1_val==5 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3, 0x5, 0xaaaaaaab, x13, 700, x1)
+
+inst_193:
+// rs1_val==5 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0x6, x13, 704, x1)
+
+inst_194:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x5, 0x33333334, x13, 708, x1)
+
+inst_195:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x5, 0x66666667, x13, 712, x1)
+
+inst_196:
+// rs1_val==5 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0xb505, x13, 716, x1)
+
+inst_197:
+// rs1_val==5 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0x1, x13, 720, x1)
+
+inst_198:
+// rs1_val==5 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x5, 0x10000, x13, 724, x1)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333333, 0x3, x13, 728, x1)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111110, 0x33333333, 0x55555555, x13, 732, x1)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x33333333, 0xaaaaaaaa, x13, 736, x1)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333333, 0x5, x13, 740, x1)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xa3d70a3, 0x33333333, 0x33333333, x13, 744, x1)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x33333333, 0x66666666, x13, 748, x1)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2433, 0x33333333, 0xb504, x13, 752, x1)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333333, 0x0, x13, 756, x1)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3332, 0x33333333, 0xffff, x13, 760, x1)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333333, 0x2, x13, 764, x1)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111110, 0x33333333, 0x55555554, x13, 768, x1)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x33333333, 0xaaaaaaa9, x13, 772, x1)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333333, 0x4, x13, 776, x1)
+
+inst_212:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xa3d70a3, 0x33333333, 0x33333332, x13, 780, x1)
+
+inst_213:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x33333333, 0x66666665, x13, 784, x1)
+
+inst_214:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2433, 0x33333333, 0xb503, x13, 788, x1)
+
+inst_215:
+// rs1_val==858993459 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3332, 0x33333333, 0xfffe, x13, 792, x1)
+
+inst_216:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111111, 0x33333333, 0x55555556, x13, 796, x1)
+
+inst_217:
+// rs1_val==858993459 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222222, 0x33333333, 0xaaaaaaab, x13, 800, x1)
+
+inst_218:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x33333333, 0x6, x13, 804, x1)
+
+inst_219:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xa3d70a3, 0x33333333, 0x33333334, x13, 808, x1)
+
+inst_220:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x33333333, 0x66666667, x13, 812, x1)
+
+inst_221:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2434, 0x33333333, 0xb505, x13, 816, x1)
+
+inst_222:
+// rs1_val==858993459 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333333, 0x1, x13, 820, x1)
+
+inst_223:
+// rs1_val==858993459 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3333, 0x33333333, 0x10000, x13, 824, x1)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x66666666, 0x3, x13, 828, x1)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x66666666, 0x55555555, x13, 832, x1)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x44444443, 0x66666666, 0xaaaaaaaa, x13, 836, x1)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x66666666, 0x5, x13, 840, x1)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x66666666, 0x33333333, x13, 844, x1)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x28f5c28f, 0x66666666, 0x66666666, x13, 848, x1)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4867, 0x66666666, 0xb504, x13, 852, x1)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x66666666, 0x0, x13, 856, x1)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x6665, 0x66666666, 0xffff, x13, 860, x1)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x66666666, 0x2, x13, 864, x1)
+
+inst_234:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x66666666, 0x55555554, x13, 868, x1)
+
+inst_235:
+// rs1_val==1717986918 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x44444443, 0x66666666, 0xaaaaaaa9, x13, 872, x1)
+
+inst_236:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x66666666, 0x4, x13, 876, x1)
+
+inst_237:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x66666666, 0x33333332, x13, 880, x1)
+
+inst_238:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x28f5c28e, 0x66666666, 0x66666665, x13, 884, x1)
+
+inst_239:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4867, 0x66666666, 0xb503, x13, 888, x1)
+
+inst_240:
+// rs1_val==1717986918 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x6665, 0x66666666, 0xfffe, x13, 892, x1)
+
+inst_241:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222222, 0x66666666, 0x55555556, x13, 896, x1)
+
+inst_242:
+// rs1_val==1717986918 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x44444444, 0x66666666, 0xaaaaaaab, x13, 900, x1)
+
+inst_243:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x66666666, 0x6, x13, 904, x1)
+
+inst_244:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x66666666, 0x33333334, x13, 908, x1)
+
+inst_245:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x28f5c28f, 0x66666666, 0x66666667, x13, 912, x1)
+
+inst_246:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4868, 0x66666666, 0xb505, x13, 916, x1)
+
+inst_247:
+// rs1_val==1717986918 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x66666666, 0x1, x13, 920, x1)
+
+inst_248:
+// rs1_val==1717986918 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x6666, 0x66666666, 0x10000, x13, 924, x1)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb504, 0x3, x13, 928, x1)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffc3a9, -0xb504, 0x55555555, x13, 932, x1)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffff8752, -0xb504, 0xaaaaaaaa, x13, 936, x1)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb504, 0x5, x13, 940, x1)
+
+inst_253:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffdbcc, -0xb504, 0x33333333, x13, 944, x1)
+
+inst_254:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffb798, -0xb504, 0x66666666, x13, 948, x1)
+
+inst_255:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb504, 0xb504, x13, 952, x1)
+
+inst_256:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, -0xb504, 0x0, x13, 956, x1)
+
+inst_257:
+// rs1_val==-46340 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb504, 0xffff, x13, 960, x1)
+
+inst_258:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb504, 0x2, x13, 964, x1)
+
+inst_259:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffc3a9, -0xb504, 0x55555554, x13, 968, x1)
+
+inst_260:
+// rs1_val==-46340 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffff8752, -0xb504, 0xaaaaaaa9, x13, 972, x1)
+
+inst_261:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb504, 0x4, x13, 976, x1)
+
+inst_262:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffdbcc, -0xb504, 0x33333332, x13, 980, x1)
+
+inst_263:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffb798, -0xb504, 0x66666665, x13, 984, x1)
+
+inst_264:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb504, 0xb503, x13, 988, x1)
+
+inst_265:
+// rs1_val==-46340 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb504, 0xfffe, x13, 992, x1)
+
+inst_266:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffc3a9, -0xb504, 0x55555556, x13, 996, x1)
+
+inst_267:
+// rs1_val==-46340 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffff8752, -0xb504, 0xaaaaaaab, x13, 1000, x1)
+
+inst_268:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb504, 0x6, x13, 1004, x1)
+
+inst_269:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffdbcb, -0xb504, 0x33333334, x13, 1008, x1)
+
+inst_270:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffb797, -0xb504, 0x66666667, x13, 1012, x1)
+
+inst_271:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb504, 0xb505, x13, 1016, x1)
+
+inst_272:
+// rs1_val==-46340 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb504, 0x1, x13, 1020, x1)
+
+inst_273:
+// rs1_val==-46340 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb504, 0x10000, x13, 1024, x1)
+
+inst_274:
+// rs1_val==46340 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb504, 0x3, x13, 1028, x1)
+
+inst_275:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0xb504, 0x55555555, x13, 1032, x1)
+
+inst_276:
+// rs1_val==46340 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x78ad, 0xb504, 0xaaaaaaaa, x13, 1036, x1)
+
+inst_277:
+// rs1_val==46340 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb504, 0x5, x13, 1040, x1)
+
+inst_278:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2433, 0xb504, 0x33333333, x13, 1044, x1)
+
+inst_279:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4867, 0xb504, 0x66666666, x13, 1048, x1)
+
+inst_280:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb504, 0xb504, x13, 1052, x1)
+
+inst_281:
+// rs1_val==46340 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb504, 0x0, x13, 1056, x1)
+
+inst_282:
+// rs1_val==46340 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb504, 0xffff, x13, 1060, x1)
+
+inst_283:
+// rs1_val==46340 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb504, 0x2, x13, 1064, x1)
+
+inst_284:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0xb504, 0x55555554, x13, 1068, x1)
+
+inst_285:
+// rs1_val==46340 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x78ad, 0xb504, 0xaaaaaaa9, x13, 1072, x1)
+
+inst_286:
+// rs1_val==46340 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb504, 0x4, x13, 1076, x1)
+
+inst_287:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2433, 0xb504, 0x33333332, x13, 1080, x1)
+
+inst_288:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4867, 0xb504, 0x66666665, x13, 1084, x1)
+
+inst_289:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb504, 0xb503, x13, 1088, x1)
+
+inst_290:
+// rs1_val==46340 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb504, 0xfffe, x13, 1092, x1)
+
+inst_291:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0xb504, 0x55555556, x13, 1096, x1)
+
+inst_292:
+// rs1_val==46340 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x78ad, 0xb504, 0xaaaaaaab, x13, 1100, x1)
+
+inst_293:
+// rs1_val==46340 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb504, 0x6, x13, 1104, x1)
+
+inst_294:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2434, 0xb504, 0x33333334, x13, 1108, x1)
+
+inst_295:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4868, 0xb504, 0x66666667, x13, 1112, x1)
+
+inst_296:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb504, 0xb505, x13, 1116, x1)
+
+inst_297:
+// rs1_val==46340 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb504, 0x1, x13, 1120, x1)
+
+inst_298:
+// rs1_val==46340 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb504, 0x10000, x13, 1124, x1)
+
+inst_299:
+// rs1_val==2 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x3, x13, 1128, x1)
+
+inst_300:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x55555555, x13, 1132, x1)
+
+inst_301:
+// rs1_val==2 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x2, 0xaaaaaaaa, x13, 1136, x1)
+
+inst_302:
+// rs1_val==2 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x5, x13, 1140, x1)
+
+inst_303:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x33333333, x13, 1144, x1)
+
+inst_304:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x66666666, x13, 1148, x1)
+
+inst_305:
+// rs1_val==2 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0xb504, x13, 1152, x1)
+
+inst_306:
+// rs1_val==2 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x0, x13, 1156, x1)
+
+inst_307:
+// rs1_val==2 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0xffff, x13, 1160, x1)
+
+inst_308:
+// rs1_val==2 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x2, x13, 1164, x1)
+
+inst_309:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x55555554, x13, 1168, x1)
+
+inst_310:
+// rs1_val==2 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x2, 0xaaaaaaa9, x13, 1172, x1)
+
+inst_311:
+// rs1_val==2 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x4, x13, 1176, x1)
+
+inst_312:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x33333332, x13, 1180, x1)
+
+inst_313:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x66666665, x13, 1184, x1)
+
+inst_314:
+// rs1_val==2 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0xb503, x13, 1188, x1)
+
+inst_315:
+// rs1_val==2 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0xfffe, x13, 1192, x1)
+
+inst_316:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x55555556, x13, 1196, x1)
+
+inst_317:
+// rs1_val==2 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x2, 0xaaaaaaab, x13, 1200, x1)
+
+inst_318:
+// rs1_val==2 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x6, x13, 1204, x1)
+
+inst_319:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x33333334, x13, 1208, x1)
+
+inst_320:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x66666667, x13, 1212, x1)
+
+inst_321:
+// rs1_val==2 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0xb505, x13, 1216, x1)
+
+inst_322:
+// rs1_val==2 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x1, x13, 1220, x1)
+
+inst_323:
+// rs1_val==2 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x2, 0x10000, x13, 1224, x1)
+
+inst_324:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x55555554, 0x3, x13, 1228, x1)
+
+inst_325:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1c71c71b, 0x55555554, 0x55555555, x13, 1232, x1)
+
+inst_326:
+// rs1_val==1431655764 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x38e38e37, 0x55555554, 0xaaaaaaaa, x13, 1236, x1)
+
+inst_327:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x55555554, 0x5, x13, 1240, x1)
+
+inst_328:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111110, 0x55555554, 0x33333333, x13, 1244, x1)
+
+inst_329:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x55555554, 0x66666666, x13, 1248, x1)
+
+inst_330:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0x55555554, 0xb504, x13, 1252, x1)
+
+inst_331:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x55555554, 0x0, x13, 1256, x1)
+
+inst_332:
+// rs1_val==1431655764 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x5554, 0x55555554, 0xffff, x13, 1260, x1)
+
+inst_333:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x55555554, 0x2, x13, 1264, x1)
+
+inst_334:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1c71c71b, 0x55555554, 0x55555554, x13, 1268, x1)
+
+inst_335:
+// rs1_val==1431655764 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x38e38e37, 0x55555554, 0xaaaaaaa9, x13, 1272, x1)
+
+inst_336:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x55555554, 0x4, x13, 1276, x1)
+
+inst_337:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111110, 0x55555554, 0x33333332, x13, 1280, x1)
+
+inst_338:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x55555554, 0x66666665, x13, 1284, x1)
+
+inst_339:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0x55555554, 0xb503, x13, 1288, x1)
+
+inst_340:
+// rs1_val==1431655764 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x5554, 0x55555554, 0xfffe, x13, 1292, x1)
+
+inst_341:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1c71c71c, 0x55555554, 0x55555556, x13, 1296, x1)
+
+inst_342:
+// rs1_val==1431655764 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x38e38e38, 0x55555554, 0xaaaaaaab, x13, 1300, x1)
+
+inst_343:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x55555554, 0x6, x13, 1304, x1)
+
+inst_344:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111111, 0x55555554, 0x33333334, x13, 1308, x1)
+
+inst_345:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x55555554, 0x66666667, x13, 1312, x1)
+
+inst_346:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0x55555554, 0xb505, x13, 1316, x1)
+
+inst_347:
+// rs1_val==1431655764 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x55555554, 0x1, x13, 1320, x1)
+
+inst_348:
+// rs1_val==1431655764 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x5555, 0x55555554, 0x10000, x13, 1324, x1)
+
+inst_349:
+// rs1_val==0 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x3, x13, 1328, x1)
+
+inst_350:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x55555555, x13, 1332, x1)
+
+inst_351:
+// rs1_val==0 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0xaaaaaaaa, x13, 1336, x1)
+
+inst_352:
+// rs1_val==0 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x5, x13, 1340, x1)
+
+inst_353:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x33333333, x13, 1344, x1)
+
+inst_354:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x66666666, x13, 1348, x1)
+
+inst_355:
+// rs1_val==0 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0xb504, x13, 1352, x1)
+
+inst_356:
+// rs1_val==0 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x0, x13, 1356, x1)
+
+inst_357:
+// rs1_val==0 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0xffff, x13, 1360, x1)
+
+inst_358:
+// rs1_val==0 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x2, x13, 1364, x1)
+
+inst_359:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x55555554, x13, 1368, x1)
+
+inst_360:
+// rs1_val==0 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0xaaaaaaa9, x13, 1372, x1)
+
+inst_361:
+// rs1_val==0 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x4, x13, 1376, x1)
+
+inst_362:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x33333332, x13, 1380, x1)
+
+inst_363:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x66666665, x13, 1384, x1)
+
+inst_364:
+// rs1_val==0 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0xb503, x13, 1388, x1)
+
+inst_365:
+// rs1_val==0 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0xfffe, x13, 1392, x1)
+
+inst_366:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x55555556, x13, 1396, x1)
+
+inst_367:
+// rs1_val==0 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0xaaaaaaab, x13, 1400, x1)
+
+inst_368:
+// rs1_val==0 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x6, x13, 1404, x1)
+
+inst_369:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x33333334, x13, 1408, x1)
+
+inst_370:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x66666667, x13, 1412, x1)
+
+inst_371:
+// rs1_val==0 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0xb505, x13, 1416, x1)
+
+inst_372:
+// rs1_val==0 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x1, x13, 1420, x1)
+
+inst_373:
+// rs1_val==0 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x0, 0x10000, x13, 1424, x1)
+
+inst_374:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x4, 0x55555555, x13, 1428, x1)
+
+inst_375:
+// rs1_val==4 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x4, 0xaaaaaaaa, x13, 1432, x1)
+
+inst_376:
+// rs1_val==4 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0x5, x13, 1436, x1)
+
+inst_377:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0x33333333, x13, 1440, x1)
+
+inst_378:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x4, 0x66666666, x13, 1444, x1)
+
+inst_379:
+// rs1_val==4 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0xb504, x13, 1448, x1)
+
+inst_380:
+// rs1_val==4 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0x0, x13, 1452, x1)
+
+inst_381:
+// rs1_val==4 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0xffff, x13, 1456, x1)
+
+inst_382:
+// rs1_val==4 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0x2, x13, 1460, x1)
+
+inst_383:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x4, 0x55555554, x13, 1464, x1)
+
+inst_384:
+// rs1_val==4 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x4, 0xaaaaaaa9, x13, 1468, x1)
+
+inst_385:
+// rs1_val==4 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0x4, x13, 1472, x1)
+
+inst_386:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0x33333332, x13, 1476, x1)
+
+inst_387:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x4, 0x66666665, x13, 1480, x1)
+
+inst_388:
+// rs1_val==4 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0xb503, x13, 1484, x1)
+
+inst_389:
+// rs1_val==4 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0xfffe, x13, 1488, x1)
+
+inst_390:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb503, 0xb505, x13, 1492, x1)
+
+inst_391:
+// rs1_val==46339 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb503, 0x1, x13, 1496, x1)
+
+inst_392:
+// rs1_val==46339 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb503, 0x10000, x13, 1500, x1)
+
+inst_393:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x55555556, 0x3, x13, 1504, x1)
+
+inst_394:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1c71c71c, 0x55555556, 0x55555555, x13, 1508, x1)
+
+inst_395:
+// rs1_val==1431655766 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x38e38e39, 0x55555556, 0xaaaaaaaa, x13, 1512, x1)
+
+inst_396:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x55555556, 0x5, x13, 1516, x1)
+
+inst_397:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111111, 0x55555556, 0x33333333, x13, 1520, x1)
+
+inst_398:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222222, 0x55555556, 0x66666666, x13, 1524, x1)
+
+inst_399:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0x55555556, 0xb504, x13, 1528, x1)
+
+inst_400:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x55555556, 0x0, x13, 1532, x1)
+
+inst_401:
+// rs1_val==1431655766 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x5555, 0x55555556, 0xffff, x13, 1536, x1)
+
+inst_402:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x55555556, 0x2, x13, 1540, x1)
+
+inst_403:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1c71c71c, 0x55555556, 0x55555554, x13, 1544, x1)
+
+inst_404:
+// rs1_val==1431655766 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x38e38e38, 0x55555556, 0xaaaaaaa9, x13, 1548, x1)
+
+inst_405:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x55555556, 0x4, x13, 1552, x1)
+
+inst_406:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111110, 0x55555556, 0x33333332, x13, 1556, x1)
+
+inst_407:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x55555556, 0x66666665, x13, 1560, x1)
+
+inst_408:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0x55555556, 0xb503, x13, 1564, x1)
+
+inst_409:
+// rs1_val==1431655766 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x5554, 0x55555556, 0xfffe, x13, 1568, x1)
+
+inst_410:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1c71c71c, 0x55555556, 0x55555556, x13, 1572, x1)
+
+inst_411:
+// rs1_val==1431655766 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x38e38e39, 0x55555556, 0xaaaaaaab, x13, 1576, x1)
+
+inst_412:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x55555556, 0x6, x13, 1580, x1)
+
+inst_413:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111111, 0x55555556, 0x33333334, x13, 1584, x1)
+
+inst_414:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222222, 0x55555556, 0x66666667, x13, 1588, x1)
+
+inst_415:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c57, 0x55555556, 0xb505, x13, 1592, x1)
+
+inst_416:
+// rs1_val==1431655766 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x55555556, 0x1, x13, 1596, x1)
+
+inst_417:
+// rs1_val==1431655766 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x5555, 0x55555556, 0x10000, x13, 1600, x1)
+
+inst_418:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0x55555555, 0x3, x13, 1604, x1)
+
+inst_419:
+// rs1_val==-1431655765 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xc71c71c7, -0x55555555, 0xaaaaaaaa, x13, 1608, x1)
+
+inst_420:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffffe, -0x55555555, 0x5, x13, 1612, x1)
+
+inst_421:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xeeeeeeef, -0x55555555, 0x33333333, x13, 1616, x1)
+
+inst_422:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xddddddde, -0x55555555, 0x66666666, x13, 1620, x1)
+
+inst_423:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffc3a9, -0x55555555, 0xb504, x13, 1624, x1)
+
+inst_424:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, -0x55555555, 0x0, x13, 1628, x1)
+
+inst_425:
+// rs1_val==-1431655765 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffaaab, -0x55555555, 0xffff, x13, 1632, x1)
+
+inst_426:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0x55555555, 0x2, x13, 1636, x1)
+
+inst_427:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xe38e38e4, -0x55555555, 0x55555554, x13, 1640, x1)
+
+inst_428:
+// rs1_val==-1431655765 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xc71c71c7, -0x55555555, 0xaaaaaaa9, x13, 1644, x1)
+
+inst_429:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffffe, -0x55555555, 0x4, x13, 1648, x1)
+
+inst_430:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xeeeeeeef, -0x55555555, 0x33333332, x13, 1652, x1)
+
+inst_431:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xddddddde, -0x55555555, 0x66666665, x13, 1656, x1)
+
+inst_432:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffc3a9, -0x55555555, 0xb503, x13, 1660, x1)
+
+inst_433:
+// rs1_val==-1431655765 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffaaab, -0x55555555, 0xfffe, x13, 1664, x1)
+
+inst_434:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xe38e38e3, -0x55555555, 0x55555556, x13, 1668, x1)
+
+inst_435:
+// rs1_val==-1431655765 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xc71c71c7, -0x55555555, 0xaaaaaaab, x13, 1672, x1)
+
+inst_436:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xfffffffe, -0x55555555, 0x6, x13, 1676, x1)
+
+inst_437:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xeeeeeeee, -0x55555555, 0x33333334, x13, 1680, x1)
+
+inst_438:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xdddddddd, -0x55555555, 0x66666667, x13, 1684, x1)
+
+inst_439:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffc3a9, -0x55555555, 0xb505, x13, 1688, x1)
+
+inst_440:
+// rs1_val==-1431655765 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0x55555555, 0x1, x13, 1692, x1)
+
+inst_441:
+// rs1_val==-1431655765 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffaaaa, -0x55555555, 0x10000, x13, 1696, x1)
+
+inst_442:
+// rs1_val==6 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x6, 0x3, x13, 1700, x1)
+
+inst_443:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x6, 0x55555555, x13, 1704, x1)
+
+inst_444:
+// rs1_val==6 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3, 0x6, 0xaaaaaaaa, x13, 1708, x1)
+
+inst_445:
+// rs1_val==6 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x6, 0x5, x13, 1712, x1)
+
+inst_446:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x6, 0x33333333, x13, 1716, x1)
+
+inst_447:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x6, 0x66666666, x13, 1720, x1)
+
+inst_448:
+// rs1_val==6 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x6, 0xb504, x13, 1724, x1)
+
+inst_449:
+// rs1_val==6 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x6, 0x0, x13, 1728, x1)
+
+inst_450:
+// rs1_val==6 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x6, 0xffff, x13, 1732, x1)
+
+inst_451:
+// rs1_val==6 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x6, 0x2, x13, 1736, x1)
+
+inst_452:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x6, 0x55555554, x13, 1740, x1)
+
+inst_453:
+// rs1_val==6 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3, 0x6, 0xaaaaaaa9, x13, 1744, x1)
+
+inst_454:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x6, 0x33333332, x13, 1748, x1)
+
+inst_455:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x6, 0x66666665, x13, 1752, x1)
+
+inst_456:
+// rs1_val==6 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x6, 0xb503, x13, 1756, x1)
+
+inst_457:
+// rs1_val==6 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x6, 0xfffe, x13, 1760, x1)
+
+inst_458:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x6, 0x55555556, x13, 1764, x1)
+
+inst_459:
+// rs1_val==6 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4, 0x6, 0xaaaaaaab, x13, 1768, x1)
+
+inst_460:
+// rs1_val==6 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x6, 0x6, x13, 1772, x1)
+
+inst_461:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x6, 0x33333334, x13, 1776, x1)
+
+inst_462:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x6, 0x66666667, x13, 1780, x1)
+
+inst_463:
+// rs1_val==6 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x6, 0xb505, x13, 1784, x1)
+
+inst_464:
+// rs1_val==6 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x6, 0x1, x13, 1788, x1)
+
+inst_465:
+// rs1_val==6 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x6, 0x10000, x13, 1792, x1)
+
+inst_466:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333334, 0x3, x13, 1796, x1)
+
+inst_467:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111111, 0x33333334, 0x55555555, x13, 1800, x1)
+
+inst_468:
+// rs1_val==858993460 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222222, 0x33333334, 0xaaaaaaaa, x13, 1804, x1)
+
+inst_469:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x33333334, 0x5, x13, 1808, x1)
+
+inst_470:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xa3d70a3, 0x33333334, 0x33333333, x13, 1812, x1)
+
+inst_471:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x33333334, 0x66666666, x13, 1816, x1)
+
+inst_472:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2434, 0x33333334, 0xb504, x13, 1820, x1)
+
+inst_473:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333334, 0x0, x13, 1824, x1)
+
+inst_474:
+// rs1_val==858993460 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3333, 0x33333334, 0xffff, x13, 1828, x1)
+
+inst_475:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333334, 0x2, x13, 1832, x1)
+
+inst_476:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111111, 0x33333334, 0x55555554, x13, 1836, x1)
+
+inst_477:
+// rs1_val==858993460 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222222, 0x33333334, 0xaaaaaaa9, x13, 1840, x1)
+
+inst_478:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333334, 0x4, x13, 1844, x1)
+
+inst_479:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xa3d70a3, 0x33333334, 0x33333332, x13, 1848, x1)
+
+inst_480:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x33333334, 0x66666665, x13, 1852, x1)
+
+inst_481:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2433, 0x33333334, 0xb503, x13, 1856, x1)
+
+inst_482:
+// rs1_val==858993460 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3332, 0x33333334, 0xfffe, x13, 1860, x1)
+
+inst_483:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111111, 0x33333334, 0x55555556, x13, 1864, x1)
+
+inst_484:
+// rs1_val==858993460 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222222, 0x33333334, 0xaaaaaaab, x13, 1868, x1)
+
+inst_485:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x33333334, 0x6, x13, 1872, x1)
+
+inst_486:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xa3d70a4, 0x33333334, 0x33333334, x13, 1876, x1)
+
+inst_487:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae148, 0x33333334, 0x66666667, x13, 1880, x1)
+
+inst_488:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2434, 0x33333334, 0xb505, x13, 1884, x1)
+
+inst_489:
+// rs1_val==858993460 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333334, 0x1, x13, 1888, x1)
+
+inst_490:
+// rs1_val==858993460 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3333, 0x33333334, 0x10000, x13, 1892, x1)
+
+inst_491:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x66666667, 0x3, x13, 1896, x1)
+
+inst_492:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222222, 0x66666667, 0x55555555, x13, 1900, x1)
+
+inst_493:
+// rs1_val==1717986919 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x44444444, 0x66666667, 0xaaaaaaaa, x13, 1904, x1)
+
+inst_494:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x66666667, 0x5, x13, 1908, x1)
+
+inst_495:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x66666667, 0x33333333, x13, 1912, x1)
+
+inst_496:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x28f5c28f, 0x66666667, 0x66666666, x13, 1916, x1)
+
+inst_497:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4868, 0x66666667, 0xb504, x13, 1920, x1)
+
+inst_498:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x66666667, 0x0, x13, 1924, x1)
+
+inst_499:
+// rs1_val==1717986919 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x6666, 0x66666667, 0xffff, x13, 1928, x1)
+
+inst_500:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x66666667, 0x2, x13, 1932, x1)
+
+inst_501:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x66666667, 0x55555554, x13, 1936, x1)
+
+inst_502:
+// rs1_val==1717986919 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x44444443, 0x66666667, 0xaaaaaaa9, x13, 1940, x1)
+
+inst_503:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x66666667, 0x4, x13, 1944, x1)
+
+inst_504:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x66666667, 0x33333332, x13, 1948, x1)
+
+inst_505:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x28f5c28f, 0x66666667, 0x66666665, x13, 1952, x1)
+
+inst_506:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4867, 0x66666667, 0xb503, x13, 1956, x1)
+
+inst_507:
+// rs1_val==1717986919 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x6665, 0x66666667, 0xfffe, x13, 1960, x1)
+
+inst_508:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222222, 0x66666667, 0x55555556, x13, 1964, x1)
+
+inst_509:
+// rs1_val==1717986919 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x44444444, 0x66666667, 0xaaaaaaab, x13, 1968, x1)
+
+inst_510:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x66666667, 0x6, x13, 1972, x1)
+
+inst_511:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae148, 0x66666667, 0x33333334, x13, 1976, x1)
+
+inst_512:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x28f5c28f, 0x66666667, 0x66666667, x13, 1980, x1)
+
+inst_513:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4868, 0x66666667, 0xb505, x13, 1984, x1)
+
+inst_514:
+// rs1_val==1717986919 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x66666667, 0x1, x13, 1988, x1)
+
+inst_515:
+// rs1_val==1717986919 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x6666, 0x66666667, 0x10000, x13, 1992, x1)
+
+inst_516:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb503, 0x3, x13, 1996, x1)
+
+inst_517:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffc3a9, -0xb503, 0x55555555, x13, 2000, x1)
+
+inst_518:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2433, 0xb503, 0x33333332, x13, 2004, x1)
+
+inst_519:
+// rs1_val==-46339 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffff8753, -0xb503, 0xaaaaaaaa, x13, 2008, x1)
+
+inst_520:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb503, 0x5, x13, 2012, x1)
+
+inst_521:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffdbcc, -0xb503, 0x33333333, x13, 2016, x1)
+
+inst_522:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffb798, -0xb503, 0x66666666, x13, 2020, x1)
+
+inst_523:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb503, 0xb504, x13, 2024, x1)
+
+inst_524:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, -0xb503, 0x0, x13, 2028, x1)
+
+inst_525:
+// rs1_val==-46339 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb503, 0xffff, x13, 2032, x1)
+
+inst_526:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb503, 0x2, x13, 2036, x1)
+
+inst_527:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffc3a9, -0xb503, 0x55555554, x13, 2040, x1)
+
+inst_528:
+// rs1_val==-46339 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffff8753, -0xb503, 0xaaaaaaa9, x13, 2044, x1)
+RVTEST_SIGBASE( x13,signature_x13_1)
+
+inst_529:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb503, 0x4, x13, 0, x1)
+
+inst_530:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffdbcc, -0xb503, 0x33333332, x13, 4, x1)
+
+inst_531:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffb798, -0xb503, 0x66666665, x13, 8, x1)
+
+inst_532:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb503, 0xb503, x13, 12, x1)
+
+inst_533:
+// rs1_val==-46339 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb503, 0xfffe, x13, 16, x1)
+
+inst_534:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffc3a9, -0xb503, 0x55555556, x13, 20, x1)
+
+inst_535:
+// rs1_val==-46339 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffff8753, -0xb503, 0xaaaaaaab, x13, 24, x1)
+
+inst_536:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb503, 0x6, x13, 28, x1)
+
+inst_537:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffdbcc, -0xb503, 0x33333334, x13, 32, x1)
+
+inst_538:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffb798, -0xb503, 0x66666667, x13, 36, x1)
+
+inst_539:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb503, 0xb505, x13, 40, x1)
+
+inst_540:
+// rs1_val==-46339 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb503, 0x1, x13, 44, x1)
+
+inst_541:
+// rs1_val==-46339 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0xb503, 0x10000, x13, 48, x1)
+
+inst_542:
+// rs1_val==46341 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb505, 0x3, x13, 52, x1)
+
+inst_543:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0xb505, 0x55555555, x13, 56, x1)
+
+inst_544:
+// rs1_val==46341 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x78ad, 0xb505, 0xaaaaaaaa, x13, 60, x1)
+
+inst_545:
+// rs1_val==46341 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb505, 0x5, x13, 64, x1)
+
+inst_546:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2434, 0xb505, 0x33333333, x13, 68, x1)
+
+inst_547:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4868, 0xb505, 0x66666666, x13, 72, x1)
+
+inst_548:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb505, 0xb504, x13, 76, x1)
+
+inst_549:
+// rs1_val==46341 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb505, 0x0, x13, 80, x1)
+
+inst_550:
+// rs1_val==46341 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb505, 0xffff, x13, 84, x1)
+
+inst_551:
+// rs1_val==46341 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb505, 0x2, x13, 88, x1)
+
+inst_552:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0xb505, 0x55555554, x13, 92, x1)
+
+inst_553:
+// rs1_val==46341 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x78ad, 0xb505, 0xaaaaaaa9, x13, 96, x1)
+
+inst_554:
+// rs1_val==46341 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb505, 0x4, x13, 100, x1)
+
+inst_555:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2434, 0xb505, 0x33333332, x13, 104, x1)
+
+inst_556:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4868, 0xb505, 0x66666665, x13, 108, x1)
+
+inst_557:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb505, 0xb503, x13, 112, x1)
+
+inst_558:
+// rs1_val==46341 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb505, 0xfffe, x13, 116, x1)
+
+inst_559:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c57, 0xb505, 0x55555556, x13, 120, x1)
+
+inst_560:
+// rs1_val==46341 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x78ae, 0xb505, 0xaaaaaaab, x13, 124, x1)
+
+inst_561:
+// rs1_val==46341 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb505, 0x6, x13, 128, x1)
+
+inst_562:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2434, 0xb505, 0x33333334, x13, 132, x1)
+
+inst_563:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4868, 0xb505, 0x66666667, x13, 136, x1)
+
+inst_564:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb505, 0xb505, x13, 140, x1)
+
+inst_565:
+// rs1_val==46341 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb505, 0x1, x13, 144, x1)
+
+inst_566:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x4, 0x55555556, x13, 148, x1)
+
+inst_567:
+// rs1_val==46341 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb505, 0x10000, x13, 152, x1)
+
+inst_568:
+// rs1_val==4 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x4, 0xaaaaaaab, x13, 156, x1)
+
+inst_569:
+// rs1_val==4 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0x6, x13, 160, x1)
+
+inst_570:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0x33333334, x13, 164, x1)
+
+inst_571:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x4, 0x66666667, x13, 168, x1)
+
+inst_572:
+// rs1_val==4 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0xb505, x13, 172, x1)
+
+inst_573:
+// rs1_val==4 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0x1, x13, 176, x1)
+
+inst_574:
+// rs1_val==4 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x4, 0x10000, x13, 180, x1)
+
+inst_575:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333332, 0x3, x13, 184, x1)
+
+inst_576:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111110, 0x33333332, 0x55555555, x13, 188, x1)
+
+inst_577:
+// rs1_val==858993458 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x33333332, 0xaaaaaaaa, x13, 192, x1)
+
+inst_578:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333332, 0x5, x13, 196, x1)
+
+inst_579:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xa3d70a3, 0x33333332, 0x33333333, x13, 200, x1)
+
+inst_580:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x33333332, 0x66666666, x13, 204, x1)
+
+inst_581:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2433, 0x33333332, 0xb504, x13, 208, x1)
+
+inst_582:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333332, 0x0, x13, 212, x1)
+
+inst_583:
+// rs1_val==858993458 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3332, 0x33333332, 0xffff, x13, 216, x1)
+
+inst_584:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333332, 0x2, x13, 220, x1)
+
+inst_585:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111110, 0x33333332, 0x55555554, x13, 224, x1)
+
+inst_586:
+// rs1_val==858993458 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x33333332, 0xaaaaaaa9, x13, 228, x1)
+
+inst_587:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333332, 0x4, x13, 232, x1)
+
+inst_588:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xa3d70a3, 0x33333332, 0x33333332, x13, 236, x1)
+
+inst_589:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae146, 0x33333332, 0x66666665, x13, 240, x1)
+
+inst_590:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2433, 0x33333332, 0xb503, x13, 244, x1)
+
+inst_591:
+// rs1_val==858993458 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3332, 0x33333332, 0xfffe, x13, 248, x1)
+
+inst_592:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x11111110, 0x33333332, 0x55555556, x13, 252, x1)
+
+inst_593:
+// rs1_val==858993458 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x33333332, 0xaaaaaaab, x13, 256, x1)
+
+inst_594:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x33333332, 0x6, x13, 260, x1)
+
+inst_595:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xa3d70a3, 0x33333332, 0x33333334, x13, 264, x1)
+
+inst_596:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x33333332, 0x66666667, x13, 268, x1)
+
+inst_597:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2434, 0x33333332, 0xb505, x13, 272, x1)
+
+inst_598:
+// rs1_val==858993458 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x33333332, 0x1, x13, 276, x1)
+
+inst_599:
+// rs1_val==858993458 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3333, 0x33333332, 0x10000, x13, 280, x1)
+
+inst_600:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x66666665, 0x3, x13, 284, x1)
+
+inst_601:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x66666665, 0x55555555, x13, 288, x1)
+
+inst_602:
+// rs1_val==1717986917 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x44444443, 0x66666665, 0xaaaaaaaa, x13, 292, x1)
+
+inst_603:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x66666665, 0x5, x13, 296, x1)
+
+inst_604:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x66666665, 0x33333333, x13, 300, x1)
+
+inst_605:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x28f5c28e, 0x66666665, 0x66666666, x13, 304, x1)
+
+inst_606:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4867, 0x66666665, 0xb504, x13, 308, x1)
+
+inst_607:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x66666665, 0x0, x13, 312, x1)
+
+inst_608:
+// rs1_val==1717986917 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x6665, 0x66666665, 0xffff, x13, 316, x1)
+
+inst_609:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x66666665, 0x2, x13, 320, x1)
+
+inst_610:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x66666665, 0x55555554, x13, 324, x1)
+
+inst_611:
+// rs1_val==1717986917 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x44444442, 0x66666665, 0xaaaaaaa9, x13, 328, x1)
+
+inst_612:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x1, 0x66666665, 0x4, x13, 332, x1)
+
+inst_613:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae146, 0x66666665, 0x33333332, x13, 336, x1)
+
+inst_614:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x28f5c28e, 0x66666665, 0x66666665, x13, 340, x1)
+
+inst_615:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4867, 0x66666665, 0xb503, x13, 344, x1)
+
+inst_616:
+// rs1_val==1717986917 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x6665, 0x66666665, 0xfffe, x13, 348, x1)
+
+inst_617:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x22222221, 0x66666665, 0x55555556, x13, 352, x1)
+
+inst_618:
+// rs1_val==1717986917 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x44444443, 0x66666665, 0xaaaaaaab, x13, 356, x1)
+
+inst_619:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2, 0x66666665, 0x6, x13, 360, x1)
+
+inst_620:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x147ae147, 0x66666665, 0x33333334, x13, 364, x1)
+
+inst_621:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x28f5c28f, 0x66666665, 0x66666667, x13, 368, x1)
+
+inst_622:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4868, 0x66666665, 0xb505, x13, 372, x1)
+
+inst_623:
+// rs1_val==1717986917 and rs2_val==1,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0x66666665, 0x1, x13, 376, x1)
+
+inst_624:
+// rs1_val==1717986917 and rs2_val==65536,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x10000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x6666, 0x66666665, 0x10000, x13, 380, x1)
+
+inst_625:
+// rs1_val==46339 and rs2_val==3,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb503, 0x3, x13, 384, x1)
+
+inst_626:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0xb503, 0x55555555, x13, 388, x1)
+
+inst_627:
+// rs1_val==46339 and rs2_val==2863311530,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x78ac, 0xb503, 0xaaaaaaaa, x13, 392, x1)
+
+inst_628:
+// rs1_val==46339 and rs2_val==5,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb503, 0x5, x13, 396, x1)
+
+inst_629:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2433, 0xb503, 0x33333333, x13, 400, x1)
+
+inst_630:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4867, 0xb503, 0x66666666, x13, 404, x1)
+
+inst_631:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb503, 0xb504, x13, 408, x1)
+
+inst_632:
+// rs1_val==46339 and rs2_val==65535,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xffff
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb503, 0xffff, x13, 412, x1)
+
+inst_633:
+// rs1_val==46339 and rs2_val==2,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb503, 0x2, x13, 416, x1)
+
+inst_634:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0xb503, 0x55555554, x13, 420, x1)
+
+inst_635:
+// rs1_val==46339 and rs2_val==2863311529,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x78ac, 0xb503, 0xaaaaaaa9, x13, 424, x1)
+
+inst_636:
+// rs1_val==46339 and rs2_val==4,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb503, 0x4, x13, 428, x1)
+
+inst_637:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4867, 0xb503, 0x66666665, x13, 432, x1)
+
+inst_638:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb503, 0xb503, x13, 436, x1)
+
+inst_639:
+// rs1_val==46339 and rs2_val==65534,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xfffe
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb503, 0xfffe, x13, 440, x1)
+
+inst_640:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x3c56, 0xb503, 0x55555556, x13, 444, x1)
+
+inst_641:
+// rs1_val==46339 and rs2_val==2863311531,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaab
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x78ac, 0xb503, 0xaaaaaaab, x13, 448, x1)
+
+inst_642:
+// rs1_val==46339 and rs2_val==6,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x0, 0xb503, 0x6, x13, 452, x1)
+
+inst_643:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x2433, 0xb503, 0x33333334, x13, 456, x1)
+
+inst_644:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x4867, 0xb503, 0x66666667, x13, 460, x1)
+
+inst_645:
+// rs2_val == 1, rs1_val == -536870913
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x1
+TEST_RR_OP(mulhsu, x12, x10, x11, 0xffffffff, -0x20000001, 0x1, x13, 464, x1)
+
+inst_646:
+// rs1_val == (-2**(xlen-1)), rs1_val == -2147483648, rs2_val == 4294967263
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000; op2val:0xffffffdf
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x80000010, -0x80000000, 0xffffffdf, x13, 468, x1)
+
+inst_647:
+// rs2_val == 8192, rs1_val == 4194304
+// opcode: mulhsu ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x2000
+TEST_RR_OP(mulhsu, x12, x10, x11, 0x8, 0x400000, 0x2000, x13, 472, x1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x17_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x17_1:
+ .fill 17*(XLEN/32),4,0xdeadbeef
+
+
+signature_x13_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x13_1:
+ .fill 119*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/mulhu-01.S b/riscof/suite/rv32i_m/M/mulhu-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..8b5d4b58375fb9c50e6eb9ffa210532694f66266
--- /dev/null
+++ b/riscof/suite/rv32i_m/M/mulhu-01.S
@@ -0,0 +1,3699 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:41:59 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32im.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the mulhu instruction of the RISC-V M extension for the mulhu covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IM")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*M.*);def TEST_CASE_1=True;",mulhu)
+
+RVTEST_SIGBASE( x17,signature_x17_1)
+
+inst_0:
+// rs1 == rd != rs2, rs1==x30, rs2==x23, rd==x30, rs1_val > 0 and rs2_val > 0, rs1_val == 4, rs1_val != rs2_val and rs1_val > 0 and rs2_val > 0, rs2_val == 4294967287
+// opcode: mulhu ; op1:x30; op2:x23; dest:x30; op1val:0x4; op2val:0xfffffff7
+TEST_RR_OP(mulhu, x30, x30, x23, 0x3, 0x4, 0xfffffff7, x17, 0, x19)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x20, rs2==x20, rd==x15, rs1_val == rs2_val and rs1_val > 0 and rs2_val > 0, rs1_val == 2147483648, rs2_val == 2147483648
+// opcode: mulhu ; op1:x20; op2:x20; dest:x15; op1val:0x80000000; op2val:0x80000000
+TEST_RR_OP(mulhu, x15, x20, x20, 0x40000000, 0x80000000, 0x80000000, x17, 4, x19)
+
+inst_2:
+// rs2 == rd != rs1, rs1==x8, rs2==x13, rd==x13, rs2_val == 0, rs1_val==0 and rs2_val==0, rs1_val == 0
+// opcode: mulhu ; op1:x8; op2:x13; dest:x13; op1val:0x0; op2val:0x0
+TEST_RR_OP(mulhu, x13, x8, x13, 0x0, 0x0, 0x0, x17, 8, x19)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x4, rs2==x6, rd==x10, rs2_val == (2**(xlen)-1), rs1_val == 128
+// opcode: mulhu ; op1:x4; op2:x6; dest:x10; op1val:0x80; op2val:0xffffffff
+TEST_RR_OP(mulhu, x10, x4, x6, 0x7f, 0x80, 0xffffffff, x17, 12, x19)
+
+inst_4:
+// rs1 == rs2 == rd, rs1==x26, rs2==x26, rd==x26, rs2_val == 1, rs1_val==1717986918 and rs2_val==1
+// opcode: mulhu ; op1:x26; op2:x26; dest:x26; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(mulhu, x26, x26, x26, 0x28f5c28f, 0x66666666, 0x66666666, x17, 16, x19)
+
+inst_5:
+// rs1==x21, rs2==x4, rd==x20, rs1_val == (2**(xlen)-1),
+// opcode: mulhu ; op1:x21; op2:x4; dest:x20; op1val:0xffffffff; op2val:0x9
+TEST_RR_OP(mulhu, x20, x21, x4, 0x8, 0xffffffff, 0x9, x17, 20, x19)
+
+inst_6:
+// rs1==x23, rs2==x11, rd==x18, rs1_val == 1, rs2_val == 512
+// opcode: mulhu ; op1:x23; op2:x11; dest:x18; op1val:0x1; op2val:0x200
+TEST_RR_OP(mulhu, x18, x23, x11, 0x0, 0x1, 0x200, x17, 24, x19)
+
+inst_7:
+// rs1==x16, rs2==x18, rd==x27, rs2_val == 2, rs1_val==0 and rs2_val==2
+// opcode: mulhu ; op1:x16; op2:x18; dest:x27; op1val:0x0; op2val:0x2
+TEST_RR_OP(mulhu, x27, x16, x18, 0x0, 0x0, 0x2, x17, 28, x19)
+
+inst_8:
+// rs1==x7, rs2==x5, rd==x22, rs2_val == 4, rs1_val == 268435456
+// opcode: mulhu ; op1:x7; op2:x5; dest:x22; op1val:0x10000000; op2val:0x4
+TEST_RR_OP(mulhu, x22, x7, x5, 0x0, 0x10000000, 0x4, x17, 32, x19)
+
+inst_9:
+// rs1==x31, rs2==x1, rd==x3, rs2_val == 8,
+// opcode: mulhu ; op1:x31; op2:x1; dest:x3; op1val:0x10000000; op2val:0x8
+TEST_RR_OP(mulhu, x3, x31, x1, 0x0, 0x10000000, 0x8, x17, 36, x19)
+
+inst_10:
+// rs1==x15, rs2==x12, rd==x2, rs2_val == 16, rs1_val == 512
+// opcode: mulhu ; op1:x15; op2:x12; dest:x2; op1val:0x200; op2val:0x10
+TEST_RR_OP(mulhu, x2, x15, x12, 0x0, 0x200, 0x10, x17, 40, x19)
+
+inst_11:
+// rs1==x1, rs2==x15, rd==x5, rs2_val == 32,
+// opcode: mulhu ; op1:x1; op2:x15; dest:x5; op1val:0x3; op2val:0x20
+TEST_RR_OP(mulhu, x5, x1, x15, 0x0, 0x3, 0x20, x17, 44, x19)
+
+inst_12:
+// rs1==x28, rs2==x9, rd==x8, rs2_val == 64, rs1_val == 2863311530
+// opcode: mulhu ; op1:x28; op2:x9; dest:x8; op1val:0xaaaaaaaa; op2val:0x40
+TEST_RR_OP(mulhu, x8, x28, x9, 0x2a, 0xaaaaaaaa, 0x40, x17, 48, x19)
+
+inst_13:
+// rs1==x5, rs2==x24, rd==x14, rs2_val == 128,
+// opcode: mulhu ; op1:x5; op2:x24; dest:x14; op1val:0x66666667; op2val:0x80
+TEST_RR_OP(mulhu, x14, x5, x24, 0x33, 0x66666667, 0x80, x17, 52, x19)
+
+inst_14:
+// rs1==x12, rs2==x2, rd==x0, rs2_val == 256, rs1_val == 1431655765
+// opcode: mulhu ; op1:x12; op2:x2; dest:x0; op1val:0x55555555; op2val:0x100
+TEST_RR_OP(mulhu, x0, x12, x2, 0, 0x55555555, 0x100, x17, 56, x15)
+
+inst_15:
+// rs1==x9, rs2==x30, rd==x19, rs2_val == 1024, rs1_val == 256
+// opcode: mulhu ; op1:x9; op2:x30; dest:x19; op1val:0x100; op2val:0x400
+TEST_RR_OP(mulhu, x19, x9, x30, 0x0, 0x100, 0x400, x17, 60, x15)
+RVTEST_SIGBASE( x5,signature_x5_0)
+
+inst_16:
+// rs1==x6, rs2==x22, rd==x17, rs2_val == 2048,
+// opcode: mulhu ; op1:x6; op2:x22; dest:x17; op1val:0x6; op2val:0x800
+TEST_RR_OP(mulhu, x17, x6, x22, 0x0, 0x6, 0x800, x5, 0, x15)
+
+inst_17:
+// rs1==x17, rs2==x0, rd==x16, rs2_val == 4096, rs1_val == 2
+// opcode: mulhu ; op1:x17; op2:x0; dest:x16; op1val:0x2; op2val:0x0
+TEST_RR_OP(mulhu, x16, x17, x0, 0x0, 0x2, 0x0, x5, 4, x15)
+
+inst_18:
+// rs1==x18, rs2==x16, rd==x24, rs2_val == 8192, rs1_val == 4294967287
+// opcode: mulhu ; op1:x18; op2:x16; dest:x24; op1val:0xfffffff7; op2val:0x2000
+TEST_RR_OP(mulhu, x24, x18, x16, 0x1fff, 0xfffffff7, 0x2000, x5, 8, x15)
+
+inst_19:
+// rs1==x3, rs2==x21, rd==x28, rs2_val == 16384,
+// opcode: mulhu ; op1:x3; op2:x21; dest:x28; op1val:0xfffe; op2val:0x4000
+TEST_RR_OP(mulhu, x28, x3, x21, 0x0, 0xfffe, 0x4000, x5, 12, x15)
+
+inst_20:
+// rs1==x22, rs2==x7, rd==x29, rs2_val == 32768,
+// opcode: mulhu ; op1:x22; op2:x7; dest:x29; op1val:0xfffe; op2val:0x8000
+TEST_RR_OP(mulhu, x29, x22, x7, 0x0, 0xfffe, 0x8000, x5, 16, x15)
+
+inst_21:
+// rs1==x19, rs2==x17, rd==x6, rs2_val == 65536, rs1_val==4 and rs2_val==65536
+// opcode: mulhu ; op1:x19; op2:x17; dest:x6; op1val:0x4; op2val:0x10000
+TEST_RR_OP(mulhu, x6, x19, x17, 0x0, 0x4, 0x10000, x5, 20, x15)
+
+inst_22:
+// rs1==x25, rs2==x10, rd==x31, rs2_val == 131072, rs1_val == 3221225471
+// opcode: mulhu ; op1:x25; op2:x10; dest:x31; op1val:0xbfffffff; op2val:0x20000
+TEST_RR_OP(mulhu, x31, x25, x10, 0x17fff, 0xbfffffff, 0x20000, x5, 24, x15)
+
+inst_23:
+// rs1==x13, rs2==x14, rd==x1, rs2_val == 262144,
+// opcode: mulhu ; op1:x13; op2:x14; dest:x1; op1val:0x9; op2val:0x40000
+TEST_RR_OP(mulhu, x1, x13, x14, 0x0, 0x9, 0x40000, x5, 28, x15)
+
+inst_24:
+// rs1==x0, rs2==x29, rd==x4, rs2_val == 524288,
+// opcode: mulhu ; op1:x0; op2:x29; dest:x4; op1val:0x0; op2val:0x80000
+TEST_RR_OP(mulhu, x4, x0, x29, 0x0, 0x0, 0x80000, x5, 32, x15)
+
+inst_25:
+// rs1==x10, rs2==x3, rd==x12, rs2_val == 1048576, rs1_val == 4294443007
+// opcode: mulhu ; op1:x10; op2:x3; dest:x12; op1val:0xfff7ffff; op2val:0x100000
+TEST_RR_OP(mulhu, x12, x10, x3, 0xfff7f, 0xfff7ffff, 0x100000, x5, 36, x15)
+
+inst_26:
+// rs1==x14, rs2==x28, rd==x23, rs2_val == 2097152, rs1_val == 4294966271
+// opcode: mulhu ; op1:x14; op2:x28; dest:x23; op1val:0xfffffbff; op2val:0x200000
+TEST_RR_OP(mulhu, x23, x14, x28, 0x1fffff, 0xfffffbff, 0x200000, x5, 40, x15)
+
+inst_27:
+// rs1==x2, rs2==x25, rd==x9, rs2_val == 4194304,
+// opcode: mulhu ; op1:x2; op2:x25; dest:x9; op1val:0x2; op2val:0x400000
+TEST_RR_OP(mulhu, x9, x2, x25, 0x0, 0x2, 0x400000, x5, 44, x15)
+
+inst_28:
+// rs1==x27, rs2==x8, rd==x11, rs2_val == 8388608,
+// opcode: mulhu ; op1:x27; op2:x8; dest:x11; op1val:0xf; op2val:0x800000
+TEST_RR_OP(mulhu, x11, x27, x8, 0x0, 0xf, 0x800000, x5, 48, x15)
+
+inst_29:
+// rs1==x11, rs2==x19, rd==x25, rs2_val == 16777216, rs1_val == 1073741824
+// opcode: mulhu ; op1:x11; op2:x19; dest:x25; op1val:0x40000000; op2val:0x1000000
+TEST_RR_OP(mulhu, x25, x11, x19, 0x400000, 0x40000000, 0x1000000, x5, 52, x1)
+
+inst_30:
+// rs1==x24, rs2==x31, rd==x21, rs2_val == 33554432, rs1_val == 4294836223
+// opcode: mulhu ; op1:x24; op2:x31; dest:x21; op1val:0xfffdffff; op2val:0x2000000
+TEST_RR_OP(mulhu, x21, x24, x31, 0x1fffbff, 0xfffdffff, 0x2000000, x5, 56, x1)
+
+inst_31:
+// rs1==x29, rs2==x27, rd==x7, rs2_val == 67108864, rs1_val == 16384
+// opcode: mulhu ; op1:x29; op2:x27; dest:x7; op1val:0x4000; op2val:0x4000000
+TEST_RR_OP(mulhu, x7, x29, x27, 0x100, 0x4000, 0x4000000, x5, 60, x1)
+
+inst_32:
+// rs2_val == 134217728,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x8000000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0x8000000, x5, 64, x1)
+
+inst_33:
+// rs2_val == 268435456, rs1_val == 8
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0x10000000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x8, 0x10000000, x5, 68, x1)
+
+inst_34:
+// rs2_val == 536870912, rs1_val == 67108864
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x20000000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x800000, 0x4000000, 0x20000000, x5, 72, x1)
+
+inst_35:
+// rs2_val == 1073741824, rs1_val == 4294965247
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffff7ff; op2val:0x40000000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3ffffdff, 0xfffff7ff, 0x40000000, x5, 76, x1)
+
+inst_36:
+// rs2_val == 4294967294, rs1_val == 4294967294
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffe; op2val:0xfffffffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0xfffffffc, 0xfffffffe, 0xfffffffe, x5, 80, x1)
+
+inst_37:
+// rs2_val == 4294967293, rs1_val == 4026531839
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xefffffff; op2val:0xfffffffd
+TEST_RR_OP(mulhu, x12, x10, x11, 0xeffffffc, 0xefffffff, 0xfffffffd, x5, 84, x1)
+
+inst_38:
+// rs2_val == 4294967291,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xfffffffb
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaaaaaa7, 0xaaaaaaab, 0xfffffffb, x5, 88, x1)
+
+inst_39:
+// rs2_val == 4294967279,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xffffffef
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3, 0x4, 0xffffffef, x5, 92, x1)
+
+inst_40:
+// rs2_val == 4294967263,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xffffffdf
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0xffffffdf, x5, 96, x1)
+
+inst_41:
+// rs2_val == 4294967231,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xffffffbf
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5555553f, 0x55555555, 0xffffffbf, x5, 100, x1)
+
+inst_42:
+// rs2_val == 4294967167,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xffffff7f
+TEST_RR_OP(mulhu, x12, x10, x11, 0xb502, 0xb503, 0xffffff7f, x5, 104, x1)
+
+inst_43:
+// rs2_val == 4294967039, rs1_val == 536870912
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0xfffffeff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1fffffdf, 0x20000000, 0xfffffeff, x5, 108, x1)
+
+inst_44:
+// rs2_val == 4294966783,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x11; op2val:0xfffffdff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x10, 0x11, 0xfffffdff, x5, 112, x1)
+
+inst_45:
+// rs2_val == 4294966271,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xfffffbff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3, 0x4, 0xfffffbff, x5, 116, x1)
+
+inst_46:
+// rs2_val == 4294965247, rs1_val == 262144
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0xfffff7ff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3ffff, 0x40000, 0xfffff7ff, x5, 120, x1)
+
+inst_47:
+// rs2_val == 4294963199, rs1_val == 4160749567
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xf7ffffff; op2val:0xffffefff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xf7fff07e, 0xf7ffffff, 0xffffefff, x5, 124, x1)
+
+inst_48:
+// rs2_val == 4294959103,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0xffffdfff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1ffffbff, 0x20000000, 0xffffdfff, x5, 128, x1)
+
+inst_49:
+// rs2_val == 4294950911,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0xffffbfff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1ffff7ff, 0x20000000, 0xffffbfff, x5, 132, x1)
+
+inst_50:
+// rs2_val == 4294934527, rs1_val == 64
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0xffff7fff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3f, 0x40, 0xffff7fff, x5, 136, x1)
+
+inst_51:
+// rs2_val == 4294901759,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xfffeffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0xfffeffff, x5, 140, x1)
+
+inst_52:
+// rs2_val == 4294836223, rs1_val == 131072
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0xfffdffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1fffb, 0x20000, 0xfffdffff, x5, 144, x1)
+
+inst_53:
+// rs2_val == 4294705151,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xe; op2val:0xfffbffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xd, 0xe, 0xfffbffff, x5, 148, x1)
+
+inst_54:
+// rs2_val == 4294443007, rs1_val == 1048576
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0xfff7ffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xfff7f, 0x100000, 0xfff7ffff, x5, 152, x1)
+
+inst_55:
+// rs2_val == 4293918719,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xffefffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaa9ffffd, 0xaaaaaaa9, 0xffefffff, x5, 156, x1)
+
+inst_56:
+// rs2_val == 4292870143, rs1_val == 4294959103
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffffdfff; op2val:0xffdfffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xffdfe002, 0xffffdfff, 0xffdfffff, x5, 160, x1)
+
+inst_57:
+// rs2_val == 4290772991,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffff7; op2val:0xffbfffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xffbffff6, 0xfffffff7, 0xffbfffff, x5, 164, x1)
+
+inst_58:
+// rs2_val == 4286578687,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfff7ffff; op2val:0xff7fffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xff7803fe, 0xfff7ffff, 0xff7fffff, x5, 168, x1)
+
+inst_59:
+// rs2_val == 4278190079, rs1_val == 32768
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:0xfeffffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x7f7f, 0x8000, 0xfeffffff, x5, 172, x1)
+
+inst_60:
+// rs2_val == 4261412863, rs1_val == 2048
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:0xfdffffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x7ef, 0x800, 0xfdffffff, x5, 176, x1)
+
+inst_61:
+// rs2_val == 4227858431, rs1_val == 524288
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0xfbffffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x7dfff, 0x80000, 0xfbffffff, x5, 180, x1)
+
+inst_62:
+// rs2_val == 4160749567, rs1_val == 4294963199
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffffefff; op2val:0xf7ffffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xf7fff07e, 0xffffefff, 0xf7ffffff, x5, 184, x1)
+
+inst_63:
+// rs2_val == 4026531839,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xefffffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4, 0x5, 0xefffffff, x5, 188, x1)
+
+inst_64:
+// rs2_val == 3758096383, rs1_val == 4294967279
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffef; op2val:0xdfffffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xdffffff0, 0xffffffef, 0xdfffffff, x5, 192, x1)
+
+inst_65:
+// rs2_val == 3221225471,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xbfffffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3, 0x5, 0xbfffffff, x5, 196, x1)
+
+inst_66:
+// rs2_val == 2147483647, rs1_val == 4294950911
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffffbfff; op2val:0x7fffffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x7fffdffe, 0xffffbfff, 0x7fffffff, x5, 200, x1)
+
+inst_67:
+// rs2_val == 1431655765, rs1_val == 16
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5, 0x10, 0x55555555, x5, 204, x1)
+
+inst_68:
+// rs2_val == 2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x155, 0x200, 0xaaaaaaaa, x5, 208, x1)
+
+inst_69:
+// rs1_val == 32,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:0xf7ffffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1e, 0x20, 0xf7ffffff, x5, 212, x1)
+
+inst_70:
+// rs1_val == 1024,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:0xfffdffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3ff, 0x400, 0xfffdffff, x5, 216, x1)
+
+inst_71:
+// rs1_val == 4096,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0xffffffdf
+TEST_RR_OP(mulhu, x12, x10, x11, 0xfff, 0x1000, 0xffffffdf, x5, 220, x1)
+
+inst_72:
+// rs1_val == 8192,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaa, 0x2000, 0x55555555, x5, 224, x1)
+
+inst_73:
+// rs1_val == 65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xfffeffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xfffe, 0x10000, 0xfffeffff, x5, 228, x1)
+
+inst_74:
+// rs1_val == 2097152,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0xc
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x200000, 0xc, x5, 232, x1)
+
+inst_75:
+// rs1_val == 4194304,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x40000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x100, 0x400000, 0x40000, x5, 236, x1)
+
+inst_76:
+// rs1_val == 8388608,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x199999, 0x800000, 0x33333333, x5, 240, x1)
+
+inst_77:
+// rs1_val == 16777216,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1000000, 0x5, x5, 244, x1)
+
+inst_78:
+// rs1_val == 33554432,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2000000, 0x6, x5, 248, x1)
+
+inst_79:
+// rs1_val == 134217728,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0xf7ffffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x7bfffff, 0x8000000, 0xf7ffffff, x5, 252, x1)
+
+inst_80:
+// rs1_val == 4294967293,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffd; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5, 0xfffffffd, 0x6, x5, 256, x1)
+
+inst_81:
+// rs1_val == 4294967291,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffb; op2val:0x2000000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1ffffff, 0xfffffffb, 0x2000000, x5, 260, x1)
+
+inst_82:
+// rs1_val == 4294967263,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffdf; op2val:0x40
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3f, 0xffffffdf, 0x40, x5, 264, x1)
+
+inst_83:
+// rs1_val == 4294967231,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffbf; op2val:0x80
+TEST_RR_OP(mulhu, x12, x10, x11, 0x7f, 0xffffffbf, 0x80, x5, 268, x1)
+
+inst_84:
+// rs1_val == 4294967167,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffffff7f; op2val:0xfffff7ff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xfffff77e, 0xffffff7f, 0xfffff7ff, x5, 272, x1)
+
+inst_85:
+// rs1_val == 4294967039,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffeff; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0xb504, 0xfffffeff, 0xb505, x5, 276, x1)
+
+inst_86:
+// rs1_val == 4294966783,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffdff; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0xb503, 0xfffffdff, 0xb504, x5, 280, x1)
+
+inst_87:
+// rs1_val == 4294934527,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff7fff; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0xfffd, 0xffff7fff, 0xfffe, x5, 284, x1)
+
+inst_88:
+// rs1_val == 4294901759,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffeffff; op2val:0x10
+TEST_RR_OP(mulhu, x12, x10, x11, 0xf, 0xfffeffff, 0x10, x5, 288, x1)
+
+inst_89:
+// rs1_val == 4294705151,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffbffff; op2val:0x1000
+TEST_RR_OP(mulhu, x12, x10, x11, 0xfff, 0xfffbffff, 0x1000, x5, 292, x1)
+
+inst_90:
+// rs1_val == 4293918719,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffefffff; op2val:0x200
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1ff, 0xffefffff, 0x200, x5, 296, x1)
+
+inst_91:
+// rs1_val == 4292870143,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffdfffff; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x554aaaaa, 0xffdfffff, 0x55555556, x5, 300, x1)
+
+inst_92:
+// rs1_val == 4290772991,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffbfffff; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0xffbfffff, 0x2, x5, 304, x1)
+
+inst_93:
+// rs1_val == 4286578687,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xff7fffff; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xff7fffff, 0x0, x5, 308, x1)
+
+inst_94:
+// rs1_val == 4278190079,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfeffffff; op2val:0xe
+TEST_RR_OP(mulhu, x12, x10, x11, 0xd, 0xfeffffff, 0xe, x5, 312, x1)
+
+inst_95:
+// rs1_val == 4261412863,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfdffffff; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x54aaaaa9, 0xfdffffff, 0x55555554, x5, 316, x1)
+
+inst_96:
+// rs1_val == 4227858431,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfbffffff; op2val:0xfffffdff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xfbfffe06, 0xfbffffff, 0xfffffdff, x5, 320, x1)
+
+inst_97:
+// rs1_val == 3758096383,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xdfffffff; op2val:0x10
+TEST_RR_OP(mulhu, x12, x10, x11, 0xd, 0xdfffffff, 0x10, x5, 324, x1)
+
+inst_98:
+// rs1_val == 2147483647,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffff; op2val:0xffffff7f
+TEST_RR_OP(mulhu, x12, x10, x11, 0x7fffffbe, 0x7fffffff, 0xffffff7f, x5, 328, x1)
+
+inst_99:
+// rs1_val==3 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0x3, x5, 332, x1)
+
+inst_100:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0x55555555, x5, 336, x1)
+
+inst_101:
+// rs1_val==3 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x3, 0xaaaaaaaa, x5, 340, x1)
+
+inst_102:
+// rs1_val==3 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0x5, x5, 344, x1)
+
+inst_103:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0x33333333, x5, 348, x1)
+
+inst_104:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x3, 0x66666666, x5, 352, x1)
+
+inst_105:
+// rs1_val==3 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0xb504, x5, 356, x1)
+
+inst_106:
+// rs1_val==3 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0x0, x5, 360, x1)
+
+inst_107:
+// rs1_val==3 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0xffff, x5, 364, x1)
+
+inst_108:
+// rs1_val==3 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0x2, x5, 368, x1)
+
+inst_109:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0x55555554, x5, 372, x1)
+
+inst_110:
+// rs1_val==3 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x3, 0xaaaaaaa9, x5, 376, x1)
+
+inst_111:
+// rs1_val==3 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0x4, x5, 380, x1)
+
+inst_112:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0x33333332, x5, 384, x1)
+
+inst_113:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x3, 0x66666665, x5, 388, x1)
+
+inst_114:
+// rs1_val==3 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0xb503, x5, 392, x1)
+
+inst_115:
+// rs1_val==3 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0xfffe, x5, 396, x1)
+
+inst_116:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x3, 0x55555556, x5, 400, x1)
+
+inst_117:
+// rs1_val==3 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x3, 0xaaaaaaab, x5, 404, x1)
+
+inst_118:
+// rs1_val==3 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0x6, x5, 408, x1)
+
+inst_119:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0x33333334, x5, 412, x1)
+
+inst_120:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x3, 0x66666667, x5, 416, x1)
+
+inst_121:
+// rs1_val==3 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0xb505, x5, 420, x1)
+
+inst_122:
+// rs1_val==3 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0x1, x5, 424, x1)
+
+inst_123:
+// rs1_val==3 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x3, 0x10000, x5, 428, x1)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x55555555, 0x3, x5, 432, x1)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1c71c71c, 0x55555555, 0x55555555, x5, 436, x1)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e38, 0x55555555, 0xaaaaaaaa, x5, 440, x1)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x55555555, 0x5, x5, 444, x1)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111110, 0x55555555, 0x33333333, x5, 448, x1)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x55555555, 0x66666666, x5, 452, x1)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0x55555555, 0xb504, x5, 456, x1)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x55555555, 0x0, x5, 460, x1)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5554, 0x55555555, 0xffff, x5, 464, x1)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x55555555, 0x2, x5, 468, x1)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1c71c71b, 0x55555555, 0x55555554, x5, 472, x1)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e38, 0x55555555, 0xaaaaaaa9, x5, 476, x1)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x55555555, 0x4, x5, 480, x1)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111110, 0x55555555, 0x33333332, x5, 484, x1)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x55555555, 0x66666665, x5, 488, x1)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0x55555555, 0xb503, x5, 492, x1)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5554, 0x55555555, 0xfffe, x5, 496, x1)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1c71c71c, 0x55555555, 0x55555556, x5, 500, x1)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e38, 0x55555555, 0xaaaaaaab, x5, 504, x1)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x55555555, 0x6, x5, 508, x1)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111111, 0x55555555, 0x33333334, x5, 512, x1)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0x55555555, 0x66666667, x5, 516, x1)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0x55555555, 0xb505, x5, 520, x1)
+
+inst_147:
+// rs1_val==1431655765 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x55555555, 0x1, x5, 524, x1)
+
+inst_148:
+// rs1_val==1431655765 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5555, 0x55555555, 0x10000, x5, 528, x1)
+
+inst_149:
+// rs1_val==2863311530 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0xaaaaaaaa, 0x3, x5, 532, x1)
+
+inst_150:
+// rs1_val==2863311530 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e38, 0xaaaaaaaa, 0x55555555, x5, 536, x1)
+
+inst_151:
+// rs1_val==2863311530 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x71c71c70, 0xaaaaaaaa, 0xaaaaaaaa, x5, 540, x1)
+
+inst_152:
+// rs1_val==2863311530 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3, 0xaaaaaaaa, 0x5, x5, 544, x1)
+
+inst_153:
+// rs1_val==2863311530 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0xaaaaaaaa, 0x33333333, x5, 548, x1)
+
+inst_154:
+// rs1_val==2863311530 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444443, 0xaaaaaaaa, 0x66666666, x5, 552, x1)
+
+inst_155:
+// rs1_val==2863311530 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ad, 0xaaaaaaaa, 0xb504, x5, 556, x1)
+
+inst_156:
+// rs1_val==2863311530 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x0, x5, 560, x1)
+
+inst_157:
+// rs1_val==2863311530 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaa9, 0xaaaaaaaa, 0xffff, x5, 564, x1)
+
+inst_158:
+// rs1_val==2863311530 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0xaaaaaaaa, 0x2, x5, 568, x1)
+
+inst_159:
+// rs1_val==2863311530 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e37, 0xaaaaaaaa, 0x55555554, x5, 572, x1)
+
+inst_160:
+// rs1_val==2863311530 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x71c71c70, 0xaaaaaaaa, 0xaaaaaaa9, x5, 576, x1)
+
+inst_161:
+// rs1_val==2863311530 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0xaaaaaaaa, 0x4, x5, 580, x1)
+
+inst_162:
+// rs1_val==2863311530 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0xaaaaaaaa, 0x33333332, x5, 584, x1)
+
+inst_163:
+// rs1_val==2863311530 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444443, 0xaaaaaaaa, 0x66666665, x5, 588, x1)
+
+inst_164:
+// rs1_val==2863311530 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ac, 0xaaaaaaaa, 0xb503, x5, 592, x1)
+
+inst_165:
+// rs1_val==2863311530 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaa9, 0xaaaaaaaa, 0xfffe, x5, 596, x1)
+
+inst_166:
+// rs1_val==2863311530 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e39, 0xaaaaaaaa, 0x55555556, x5, 600, x1)
+
+inst_167:
+// rs1_val==2863311530 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x71c71c71, 0xaaaaaaaa, 0xaaaaaaab, x5, 604, x1)
+
+inst_168:
+// rs1_val==2863311530 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3, 0xaaaaaaaa, 0x6, x5, 608, x1)
+
+inst_169:
+// rs1_val==2863311530 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0xaaaaaaaa, 0x33333334, x5, 612, x1)
+
+inst_170:
+// rs1_val==2863311530 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444444, 0xaaaaaaaa, 0x66666667, x5, 616, x1)
+
+inst_171:
+// rs1_val==2863311530 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ad, 0xaaaaaaaa, 0xb505, x5, 620, x1)
+
+inst_172:
+// rs1_val==2863311530 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x1, x5, 624, x1)
+
+inst_173:
+// rs1_val==2863311530 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaaa, 0xaaaaaaaa, 0x10000, x5, 628, x1)
+
+inst_174:
+// rs1_val==5 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0x3, x5, 632, x1)
+
+inst_175:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x5, 0x55555555, x5, 636, x1)
+
+inst_176:
+// rs1_val==5 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3, 0x5, 0xaaaaaaaa, x5, 640, x1)
+
+inst_177:
+// rs1_val==5 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0x5, x5, 644, x1)
+
+inst_178:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0x33333333, x5, 648, x1)
+
+inst_179:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x5, 0x66666666, x5, 652, x1)
+
+inst_180:
+// rs1_val==5 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0xb504, x5, 656, x1)
+
+inst_181:
+// rs1_val==5 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0x0, x5, 660, x1)
+
+inst_182:
+// rs1_val==5 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0xffff, x5, 664, x1)
+
+inst_183:
+// rs1_val==5 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0x2, x5, 668, x1)
+
+inst_184:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x5, 0x55555554, x5, 672, x1)
+
+inst_185:
+// rs1_val==5 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3, 0x5, 0xaaaaaaa9, x5, 676, x1)
+
+inst_186:
+// rs1_val==5 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0x4, x5, 680, x1)
+
+inst_187:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0x33333332, x5, 684, x1)
+
+inst_188:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x5, 0x66666665, x5, 688, x1)
+
+inst_189:
+// rs1_val==5 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0xb503, x5, 692, x1)
+
+inst_190:
+// rs1_val==5 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0xfffe, x5, 696, x1)
+
+inst_191:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x5, 0x55555556, x5, 700, x1)
+
+inst_192:
+// rs1_val==5 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3, 0x5, 0xaaaaaaab, x5, 704, x1)
+
+inst_193:
+// rs1_val==5 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0x6, x5, 708, x1)
+
+inst_194:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x5, 0x33333334, x5, 712, x1)
+
+inst_195:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x5, 0x66666667, x5, 716, x1)
+
+inst_196:
+// rs1_val==5 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0xb505, x5, 720, x1)
+
+inst_197:
+// rs1_val==5 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0x1, x5, 724, x1)
+
+inst_198:
+// rs1_val==5 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x5, 0x10000, x5, 728, x1)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333333, 0x3, x5, 732, x1)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111110, 0x33333333, 0x55555555, x5, 736, x1)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x33333333, 0xaaaaaaaa, x5, 740, x1)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333333, 0x5, x5, 744, x1)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0xa3d70a3, 0x33333333, 0x33333333, x5, 748, x1)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x33333333, 0x66666666, x5, 752, x1)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2433, 0x33333333, 0xb504, x5, 756, x1)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333333, 0x0, x5, 760, x1)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3332, 0x33333333, 0xffff, x5, 764, x1)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333333, 0x2, x5, 768, x1)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111110, 0x33333333, 0x55555554, x5, 772, x1)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x33333333, 0xaaaaaaa9, x5, 776, x1)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333333, 0x4, x5, 780, x1)
+
+inst_212:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0xa3d70a3, 0x33333333, 0x33333332, x5, 784, x1)
+
+inst_213:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x33333333, 0x66666665, x5, 788, x1)
+
+inst_214:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2433, 0x33333333, 0xb503, x5, 792, x1)
+
+inst_215:
+// rs1_val==858993459 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3332, 0x33333333, 0xfffe, x5, 796, x1)
+
+inst_216:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111111, 0x33333333, 0x55555556, x5, 800, x1)
+
+inst_217:
+// rs1_val==858993459 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0x33333333, 0xaaaaaaab, x5, 804, x1)
+
+inst_218:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x33333333, 0x6, x5, 808, x1)
+
+inst_219:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0xa3d70a3, 0x33333333, 0x33333334, x5, 812, x1)
+
+inst_220:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x33333333, 0x66666667, x5, 816, x1)
+
+inst_221:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2434, 0x33333333, 0xb505, x5, 820, x1)
+
+inst_222:
+// rs1_val==858993459 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333333, 0x1, x5, 824, x1)
+
+inst_223:
+// rs1_val==858993459 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3333, 0x33333333, 0x10000, x5, 828, x1)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x66666666, 0x3, x5, 832, x1)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x66666666, 0x55555555, x5, 836, x1)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444443, 0x66666666, 0xaaaaaaaa, x5, 840, x1)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x66666666, 0x5, x5, 844, x1)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x66666666, 0x33333333, x5, 848, x1)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x28f5c28f, 0x66666666, 0x66666666, x5, 852, x1)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4867, 0x66666666, 0xb504, x5, 856, x1)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x66666666, 0x0, x5, 860, x1)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6665, 0x66666666, 0xffff, x5, 864, x1)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x66666666, 0x2, x5, 868, x1)
+
+inst_234:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x66666666, 0x55555554, x5, 872, x1)
+
+inst_235:
+// rs1_val==1717986918 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444443, 0x66666666, 0xaaaaaaa9, x5, 876, x1)
+
+inst_236:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x66666666, 0x4, x5, 880, x1)
+
+inst_237:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x66666666, 0x33333332, x5, 884, x1)
+
+inst_238:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x28f5c28e, 0x66666666, 0x66666665, x5, 888, x1)
+
+inst_239:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4867, 0x66666666, 0xb503, x5, 892, x1)
+
+inst_240:
+// rs1_val==1717986918 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6665, 0x66666666, 0xfffe, x5, 896, x1)
+
+inst_241:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0x66666666, 0x55555556, x5, 900, x1)
+
+inst_242:
+// rs1_val==1717986918 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444444, 0x66666666, 0xaaaaaaab, x5, 904, x1)
+
+inst_243:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x66666666, 0x6, x5, 908, x1)
+
+inst_244:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x66666666, 0x33333334, x5, 912, x1)
+
+inst_245:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x28f5c28f, 0x66666666, 0x66666667, x5, 916, x1)
+
+inst_246:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4868, 0x66666666, 0xb505, x5, 920, x1)
+
+inst_247:
+// rs1_val==1717986918 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6666, 0x66666666, 0x10000, x5, 924, x1)
+
+inst_248:
+// rs1_val==46340 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb504, 0x3, x5, 928, x1)
+
+inst_249:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0xb504, 0x55555555, x5, 932, x1)
+
+inst_250:
+// rs1_val==46340 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ad, 0xb504, 0xaaaaaaaa, x5, 936, x1)
+
+inst_251:
+// rs1_val==46340 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb504, 0x5, x5, 940, x1)
+
+inst_252:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2433, 0xb504, 0x33333333, x5, 944, x1)
+
+inst_253:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4867, 0xb504, 0x66666666, x5, 948, x1)
+
+inst_254:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb504, 0xb504, x5, 952, x1)
+
+inst_255:
+// rs1_val==46340 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb504, 0x0, x5, 956, x1)
+
+inst_256:
+// rs1_val==46340 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb504, 0xffff, x5, 960, x1)
+
+inst_257:
+// rs1_val==46340 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb504, 0x2, x5, 964, x1)
+
+inst_258:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0xb504, 0x55555554, x5, 968, x1)
+
+inst_259:
+// rs1_val==46340 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ad, 0xb504, 0xaaaaaaa9, x5, 972, x1)
+
+inst_260:
+// rs1_val==46340 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb504, 0x4, x5, 976, x1)
+
+inst_261:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2433, 0xb504, 0x33333332, x5, 980, x1)
+
+inst_262:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4867, 0xb504, 0x66666665, x5, 984, x1)
+
+inst_263:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb504, 0xb503, x5, 988, x1)
+
+inst_264:
+// rs1_val==46340 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb504, 0xfffe, x5, 992, x1)
+
+inst_265:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0xb504, 0x55555556, x5, 996, x1)
+
+inst_266:
+// rs1_val==46340 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ad, 0xb504, 0xaaaaaaab, x5, 1000, x1)
+
+inst_267:
+// rs1_val==46340 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb504, 0x6, x5, 1004, x1)
+
+inst_268:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2434, 0xb504, 0x33333334, x5, 1008, x1)
+
+inst_269:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4868, 0xb504, 0x66666667, x5, 1012, x1)
+
+inst_270:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb504, 0xb505, x5, 1016, x1)
+
+inst_271:
+// rs1_val==46340 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb504, 0x1, x5, 1020, x1)
+
+inst_272:
+// rs1_val==46340 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb504, 0x10000, x5, 1024, x1)
+
+inst_273:
+// rs1_val==0 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x3, x5, 1028, x1)
+
+inst_274:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x55555555, x5, 1032, x1)
+
+inst_275:
+// rs1_val==0 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0xaaaaaaaa, x5, 1036, x1)
+
+inst_276:
+// rs1_val==0 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x5, x5, 1040, x1)
+
+inst_277:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x33333333, x5, 1044, x1)
+
+inst_278:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x66666666, x5, 1048, x1)
+
+inst_279:
+// rs1_val==0 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0xb504, x5, 1052, x1)
+
+inst_280:
+// rs1_val==0 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0xffff, x5, 1056, x1)
+
+inst_281:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x55555554, x5, 1060, x1)
+
+inst_282:
+// rs1_val==0 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0xaaaaaaa9, x5, 1064, x1)
+
+inst_283:
+// rs1_val==0 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x4, x5, 1068, x1)
+
+inst_284:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x33333332, x5, 1072, x1)
+
+inst_285:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x66666665, x5, 1076, x1)
+
+inst_286:
+// rs1_val==0 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0xb503, x5, 1080, x1)
+
+inst_287:
+// rs1_val==0 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0xfffe, x5, 1084, x1)
+
+inst_288:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x55555556, x5, 1088, x1)
+
+inst_289:
+// rs1_val==0 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0xaaaaaaab, x5, 1092, x1)
+
+inst_290:
+// rs1_val==0 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x6, x5, 1096, x1)
+
+inst_291:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x33333334, x5, 1100, x1)
+
+inst_292:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x66666667, x5, 1104, x1)
+
+inst_293:
+// rs1_val==0 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0xb505, x5, 1108, x1)
+
+inst_294:
+// rs1_val==0 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x1, x5, 1112, x1)
+
+inst_295:
+// rs1_val==0 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x0, 0x10000, x5, 1116, x1)
+
+inst_296:
+// rs1_val==65535 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xffff, 0x3, x5, 1120, x1)
+
+inst_297:
+// rs1_val==65535 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5554, 0xffff, 0x55555555, x5, 1124, x1)
+
+inst_298:
+// rs1_val==65535 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaa9, 0xffff, 0xaaaaaaaa, x5, 1128, x1)
+
+inst_299:
+// rs1_val==65535 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xffff, 0x5, x5, 1132, x1)
+
+inst_300:
+// rs1_val==65535 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3332, 0xffff, 0x33333333, x5, 1136, x1)
+
+inst_301:
+// rs1_val==65535 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6665, 0xffff, 0x66666666, x5, 1140, x1)
+
+inst_302:
+// rs1_val==65535 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xffff, 0xb504, x5, 1144, x1)
+
+inst_303:
+// rs1_val==65535 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xffff, 0x0, x5, 1148, x1)
+
+inst_304:
+// rs1_val==65535 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xffff, 0xffff, x5, 1152, x1)
+
+inst_305:
+// rs1_val==65535 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xffff, 0x2, x5, 1156, x1)
+
+inst_306:
+// rs1_val==65535 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5554, 0xffff, 0x55555554, x5, 1160, x1)
+
+inst_307:
+// rs1_val==65535 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaa9, 0xffff, 0xaaaaaaa9, x5, 1164, x1)
+
+inst_308:
+// rs1_val==65535 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xffff, 0x4, x5, 1168, x1)
+
+inst_309:
+// rs1_val==65535 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3332, 0xffff, 0x33333332, x5, 1172, x1)
+
+inst_310:
+// rs1_val==65535 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6665, 0xffff, 0x66666665, x5, 1176, x1)
+
+inst_311:
+// rs1_val==65535 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xffff, 0xb503, x5, 1180, x1)
+
+inst_312:
+// rs1_val==65535 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xffff, 0xfffe, x5, 1184, x1)
+
+inst_313:
+// rs1_val==65535 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5555, 0xffff, 0x55555556, x5, 1188, x1)
+
+inst_314:
+// rs1_val==65535 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaaa, 0xffff, 0xaaaaaaab, x5, 1192, x1)
+
+inst_315:
+// rs1_val==65535 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xffff, 0x6, x5, 1196, x1)
+
+inst_316:
+// rs1_val==65535 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3333, 0xffff, 0x33333334, x5, 1200, x1)
+
+inst_317:
+// rs1_val==65535 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6666, 0xffff, 0x66666667, x5, 1204, x1)
+
+inst_318:
+// rs1_val==65535 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xffff, 0xb505, x5, 1208, x1)
+
+inst_319:
+// rs1_val==65535 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xffff, 0x1, x5, 1212, x1)
+
+inst_320:
+// rs1_val==65535 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xffff, 0x10000, x5, 1216, x1)
+
+inst_321:
+// rs1_val==2 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x3, x5, 1220, x1)
+
+inst_322:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x55555555, x5, 1224, x1)
+
+inst_323:
+// rs1_val==2 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x2, 0xaaaaaaaa, x5, 1228, x1)
+
+inst_324:
+// rs1_val==2 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x5, x5, 1232, x1)
+
+inst_325:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x33333333, x5, 1236, x1)
+
+inst_326:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x66666666, x5, 1240, x1)
+
+inst_327:
+// rs1_val==2 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0xb504, x5, 1244, x1)
+
+inst_328:
+// rs1_val==2 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x0, x5, 1248, x1)
+
+inst_329:
+// rs1_val==2 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0xffff, x5, 1252, x1)
+
+inst_330:
+// rs1_val==2 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x2, x5, 1256, x1)
+
+inst_331:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x55555554, x5, 1260, x1)
+
+inst_332:
+// rs1_val==2 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x2, 0xaaaaaaa9, x5, 1264, x1)
+
+inst_333:
+// rs1_val==2 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x4, x5, 1268, x1)
+
+inst_334:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x33333332, x5, 1272, x1)
+
+inst_335:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x66666665, x5, 1276, x1)
+
+inst_336:
+// rs1_val==2 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0xb503, x5, 1280, x1)
+
+inst_337:
+// rs1_val==2 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0xfffe, x5, 1284, x1)
+
+inst_338:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x55555556, x5, 1288, x1)
+
+inst_339:
+// rs1_val==2 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x2, 0xaaaaaaab, x5, 1292, x1)
+
+inst_340:
+// rs1_val==2 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x6, x5, 1296, x1)
+
+inst_341:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x33333334, x5, 1300, x1)
+
+inst_342:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x66666667, x5, 1304, x1)
+
+inst_343:
+// rs1_val==2 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0xb505, x5, 1308, x1)
+
+inst_344:
+// rs1_val==2 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x1, x5, 1312, x1)
+
+inst_345:
+// rs1_val==2 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x2, 0x10000, x5, 1316, x1)
+
+inst_346:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x55555554, 0x3, x5, 1320, x1)
+
+inst_347:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1c71c71b, 0x55555554, 0x55555555, x5, 1324, x1)
+
+inst_348:
+// rs1_val==1431655764 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e37, 0x55555554, 0xaaaaaaaa, x5, 1328, x1)
+
+inst_349:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x55555554, 0x5, x5, 1332, x1)
+
+inst_350:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111110, 0x55555554, 0x33333333, x5, 1336, x1)
+
+inst_351:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x55555554, 0x66666666, x5, 1340, x1)
+
+inst_352:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0x55555554, 0xb504, x5, 1344, x1)
+
+inst_353:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x55555554, 0x0, x5, 1348, x1)
+
+inst_354:
+// rs1_val==1431655764 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5554, 0x55555554, 0xffff, x5, 1352, x1)
+
+inst_355:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x55555554, 0x2, x5, 1356, x1)
+
+inst_356:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1c71c71b, 0x55555554, 0x55555554, x5, 1360, x1)
+
+inst_357:
+// rs1_val==1431655764 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e37, 0x55555554, 0xaaaaaaa9, x5, 1364, x1)
+
+inst_358:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x55555554, 0x4, x5, 1368, x1)
+
+inst_359:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111110, 0x55555554, 0x33333332, x5, 1372, x1)
+
+inst_360:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x55555554, 0x66666665, x5, 1376, x1)
+
+inst_361:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0x55555554, 0xb503, x5, 1380, x1)
+
+inst_362:
+// rs1_val==1431655764 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5554, 0x55555554, 0xfffe, x5, 1384, x1)
+
+inst_363:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1c71c71c, 0x55555554, 0x55555556, x5, 1388, x1)
+
+inst_364:
+// rs1_val==1431655764 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e38, 0x55555554, 0xaaaaaaab, x5, 1392, x1)
+
+inst_365:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x55555554, 0x6, x5, 1396, x1)
+
+inst_366:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111111, 0x55555554, 0x33333334, x5, 1400, x1)
+
+inst_367:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x55555554, 0x66666667, x5, 1404, x1)
+
+inst_368:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0x55555554, 0xb505, x5, 1408, x1)
+
+inst_369:
+// rs1_val==1431655764 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x55555554, 0x1, x5, 1412, x1)
+
+inst_370:
+// rs1_val==1431655764 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5555, 0x55555554, 0x10000, x5, 1416, x1)
+
+inst_371:
+// rs1_val==2863311529 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0x3, x5, 1420, x1)
+
+inst_372:
+// rs1_val==2863311529 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e38, 0xaaaaaaa9, 0x55555555, x5, 1424, x1)
+
+inst_373:
+// rs1_val==2863311529 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x71c71c70, 0xaaaaaaa9, 0xaaaaaaaa, x5, 1428, x1)
+
+inst_374:
+// rs1_val==2863311529 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3, 0xaaaaaaa9, 0x5, x5, 1432, x1)
+
+inst_375:
+// rs1_val==2863311529 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0xaaaaaaa9, 0x33333333, x5, 1436, x1)
+
+inst_376:
+// rs1_val==2863311529 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444443, 0xaaaaaaa9, 0x66666666, x5, 1440, x1)
+
+inst_377:
+// rs1_val==2863311529 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ad, 0xaaaaaaa9, 0xb504, x5, 1444, x1)
+
+inst_378:
+// rs1_val==2863311529 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x0, x5, 1448, x1)
+
+inst_379:
+// rs1_val==2863311529 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaa9, 0xaaaaaaa9, 0xffff, x5, 1452, x1)
+
+inst_380:
+// rs1_val==2863311529 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0x2, x5, 1456, x1)
+
+inst_381:
+// rs1_val==2863311529 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e37, 0xaaaaaaa9, 0x55555554, x5, 1460, x1)
+
+inst_382:
+// rs1_val==2863311529 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x71c71c6f, 0xaaaaaaa9, 0xaaaaaaa9, x5, 1464, x1)
+
+inst_383:
+// rs1_val==2863311529 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0xaaaaaaa9, 0x4, x5, 1468, x1)
+
+inst_384:
+// rs1_val==2863311529 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0xaaaaaaa9, 0x33333332, x5, 1472, x1)
+
+inst_385:
+// rs1_val==2863311529 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444442, 0xaaaaaaa9, 0x66666665, x5, 1476, x1)
+
+inst_386:
+// rs1_val==2863311529 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ac, 0xaaaaaaa9, 0xb503, x5, 1480, x1)
+
+inst_387:
+// rs1_val==2863311529 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaa9, 0xaaaaaaa9, 0xfffe, x5, 1484, x1)
+
+inst_388:
+// rs1_val==2863311529 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e38, 0xaaaaaaa9, 0x55555556, x5, 1488, x1)
+
+inst_389:
+// rs1_val==2863311529 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x71c71c70, 0xaaaaaaa9, 0xaaaaaaab, x5, 1492, x1)
+
+inst_390:
+// rs1_val==2863311529 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3, 0xaaaaaaa9, 0x6, x5, 1496, x1)
+
+inst_391:
+// rs1_val==2863311529 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0xaaaaaaa9, 0x33333334, x5, 1500, x1)
+
+inst_392:
+// rs1_val==2863311529 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444443, 0xaaaaaaa9, 0x66666667, x5, 1504, x1)
+
+inst_393:
+// rs1_val==2863311529 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ad, 0xaaaaaaa9, 0xb505, x5, 1508, x1)
+
+inst_394:
+// rs1_val==2863311529 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x1, x5, 1512, x1)
+
+inst_395:
+// rs1_val==2863311529 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaaa, 0xaaaaaaa9, 0x10000, x5, 1516, x1)
+
+inst_396:
+// rs1_val==4 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0x3, x5, 1520, x1)
+
+inst_397:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x4, 0x55555555, x5, 1524, x1)
+
+inst_398:
+// rs1_val==4 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x4, 0xaaaaaaaa, x5, 1528, x1)
+
+inst_399:
+// rs1_val==4 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0x5, x5, 1532, x1)
+
+inst_400:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0x33333333, x5, 1536, x1)
+
+inst_401:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x4, 0x66666666, x5, 1540, x1)
+
+inst_402:
+// rs1_val==4 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0xb504, x5, 1544, x1)
+
+inst_403:
+// rs1_val==4 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0x0, x5, 1548, x1)
+
+inst_404:
+// rs1_val==4 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0xffff, x5, 1552, x1)
+
+inst_405:
+// rs1_val==4 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0x2, x5, 1556, x1)
+
+inst_406:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x4, 0x55555554, x5, 1560, x1)
+
+inst_407:
+// rs1_val==4 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x4, 0xaaaaaaa9, x5, 1564, x1)
+
+inst_408:
+// rs1_val==4 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0x4, x5, 1568, x1)
+
+inst_409:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0x33333332, x5, 1572, x1)
+
+inst_410:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x4, 0x66666665, x5, 1576, x1)
+
+inst_411:
+// rs1_val==4 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0xb503, x5, 1580, x1)
+
+inst_412:
+// rs1_val==4 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0xfffe, x5, 1584, x1)
+
+inst_413:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x4, 0x55555556, x5, 1588, x1)
+
+inst_414:
+// rs1_val==4 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x4, 0xaaaaaaab, x5, 1592, x1)
+
+inst_415:
+// rs1_val==4 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0x6, x5, 1596, x1)
+
+inst_416:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0x33333334, x5, 1600, x1)
+
+inst_417:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x4, 0x66666667, x5, 1604, x1)
+
+inst_418:
+// rs1_val==4 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0xb505, x5, 1608, x1)
+
+inst_419:
+// rs1_val==4 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0x1, x5, 1612, x1)
+
+inst_420:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333332, 0x3, x5, 1616, x1)
+
+inst_421:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111110, 0x33333332, 0x55555555, x5, 1620, x1)
+
+inst_422:
+// rs1_val==858993458 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x33333332, 0xaaaaaaaa, x5, 1624, x1)
+
+inst_423:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333332, 0x5, x5, 1628, x1)
+
+inst_424:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0xa3d70a3, 0x33333332, 0x33333333, x5, 1632, x1)
+
+inst_425:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x33333332, 0x66666666, x5, 1636, x1)
+
+inst_426:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2433, 0x33333332, 0xb504, x5, 1640, x1)
+
+inst_427:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333332, 0x0, x5, 1644, x1)
+
+inst_428:
+// rs1_val==858993458 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3332, 0x33333332, 0xffff, x5, 1648, x1)
+
+inst_429:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333332, 0x2, x5, 1652, x1)
+
+inst_430:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111110, 0x33333332, 0x55555554, x5, 1656, x1)
+
+inst_431:
+// rs1_val==858993458 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x33333332, 0xaaaaaaa9, x5, 1660, x1)
+
+inst_432:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333332, 0x4, x5, 1664, x1)
+
+inst_433:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0xa3d70a3, 0x33333332, 0x33333332, x5, 1668, x1)
+
+inst_434:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae146, 0x33333332, 0x66666665, x5, 1672, x1)
+
+inst_435:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2433, 0x33333332, 0xb503, x5, 1676, x1)
+
+inst_436:
+// rs1_val==858993458 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3332, 0x33333332, 0xfffe, x5, 1680, x1)
+
+inst_437:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111110, 0x33333332, 0x55555556, x5, 1684, x1)
+
+inst_438:
+// rs1_val==858993458 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x33333332, 0xaaaaaaab, x5, 1688, x1)
+
+inst_439:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x33333332, 0x6, x5, 1692, x1)
+
+inst_440:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0xa3d70a3, 0x33333332, 0x33333334, x5, 1696, x1)
+
+inst_441:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x33333332, 0x66666667, x5, 1700, x1)
+
+inst_442:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2434, 0x33333332, 0xb505, x5, 1704, x1)
+
+inst_443:
+// rs1_val==858993458 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333332, 0x1, x5, 1708, x1)
+
+inst_444:
+// rs1_val==858993458 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3333, 0x33333332, 0x10000, x5, 1712, x1)
+
+inst_445:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x66666665, 0x3, x5, 1716, x1)
+
+inst_446:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x66666665, 0x55555555, x5, 1720, x1)
+
+inst_447:
+// rs1_val==1717986917 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444443, 0x66666665, 0xaaaaaaaa, x5, 1724, x1)
+
+inst_448:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x66666665, 0x5, x5, 1728, x1)
+
+inst_449:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x66666665, 0x33333333, x5, 1732, x1)
+
+inst_450:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x28f5c28e, 0x66666665, 0x66666666, x5, 1736, x1)
+
+inst_451:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4867, 0x66666665, 0xb504, x5, 1740, x1)
+
+inst_452:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x66666665, 0x0, x5, 1744, x1)
+
+inst_453:
+// rs1_val==1717986917 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6665, 0x66666665, 0xffff, x5, 1748, x1)
+
+inst_454:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x66666665, 0x2, x5, 1752, x1)
+
+inst_455:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x66666665, 0x55555554, x5, 1756, x1)
+
+inst_456:
+// rs1_val==1717986917 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444442, 0x66666665, 0xaaaaaaa9, x5, 1760, x1)
+
+inst_457:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x66666665, 0x4, x5, 1764, x1)
+
+inst_458:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae146, 0x66666665, 0x33333332, x5, 1768, x1)
+
+inst_459:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x28f5c28e, 0x66666665, 0x66666665, x5, 1772, x1)
+
+inst_460:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4867, 0x66666665, 0xb503, x5, 1776, x1)
+
+inst_461:
+// rs1_val==1717986917 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6665, 0x66666665, 0xfffe, x5, 1780, x1)
+
+inst_462:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x66666665, 0x55555556, x5, 1784, x1)
+
+inst_463:
+// rs1_val==1717986917 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444443, 0x66666665, 0xaaaaaaab, x5, 1788, x1)
+
+inst_464:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x66666665, 0x6, x5, 1792, x1)
+
+inst_465:
+// rs1_val==1717986917 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x66666665, 0x1, x5, 1796, x1)
+
+inst_466:
+// rs1_val==1717986917 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6666, 0x66666665, 0x10000, x5, 1800, x1)
+
+inst_467:
+// rs1_val==46339 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb503, 0x3, x5, 1804, x1)
+
+inst_468:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0xb503, 0x55555555, x5, 1808, x1)
+
+inst_469:
+// rs1_val==46339 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ac, 0xb503, 0xaaaaaaaa, x5, 1812, x1)
+
+inst_470:
+// rs1_val==46339 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb503, 0x5, x5, 1816, x1)
+
+inst_471:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2433, 0xb503, 0x33333333, x5, 1820, x1)
+
+inst_472:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4867, 0xb503, 0x66666666, x5, 1824, x1)
+
+inst_473:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb503, 0xb504, x5, 1828, x1)
+
+inst_474:
+// rs1_val==46339 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb503, 0x0, x5, 1832, x1)
+
+inst_475:
+// rs1_val==46339 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb503, 0xffff, x5, 1836, x1)
+
+inst_476:
+// rs1_val==46339 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb503, 0x2, x5, 1840, x1)
+
+inst_477:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0xb503, 0x55555554, x5, 1844, x1)
+
+inst_478:
+// rs1_val==46339 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ac, 0xb503, 0xaaaaaaa9, x5, 1848, x1)
+
+inst_479:
+// rs1_val==46339 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb503, 0x4, x5, 1852, x1)
+
+inst_480:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2433, 0xb503, 0x33333332, x5, 1856, x1)
+
+inst_481:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4867, 0xb503, 0x66666665, x5, 1860, x1)
+
+inst_482:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb503, 0xb503, x5, 1864, x1)
+
+inst_483:
+// rs1_val==46339 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb503, 0xfffe, x5, 1868, x1)
+
+inst_484:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0xb503, 0x55555556, x5, 1872, x1)
+
+inst_485:
+// rs1_val==46339 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ac, 0xb503, 0xaaaaaaab, x5, 1876, x1)
+
+inst_486:
+// rs1_val==46339 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb503, 0x6, x5, 1880, x1)
+
+inst_487:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2433, 0xb503, 0x33333334, x5, 1884, x1)
+
+inst_488:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4867, 0xb503, 0x66666667, x5, 1888, x1)
+
+inst_489:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb503, 0xb505, x5, 1892, x1)
+
+inst_490:
+// rs1_val==46339 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb503, 0x1, x5, 1896, x1)
+
+inst_491:
+// rs1_val==46339 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb503, 0x10000, x5, 1900, x1)
+
+inst_492:
+// rs1_val==65534 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xfffe, 0x3, x5, 1904, x1)
+
+inst_493:
+// rs1_val==65534 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5554, 0xfffe, 0x55555555, x5, 1908, x1)
+
+inst_494:
+// rs1_val==65534 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaa9, 0xfffe, 0xaaaaaaaa, x5, 1912, x1)
+
+inst_495:
+// rs1_val==65534 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xfffe, 0x5, x5, 1916, x1)
+
+inst_496:
+// rs1_val==65534 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3332, 0xfffe, 0x33333333, x5, 1920, x1)
+
+inst_497:
+// rs1_val==65534 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6665, 0xfffe, 0x66666666, x5, 1924, x1)
+
+inst_498:
+// rs1_val==65534 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xfffe, 0xb504, x5, 1928, x1)
+
+inst_499:
+// rs1_val==65534 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xfffe, 0x0, x5, 1932, x1)
+
+inst_500:
+// rs1_val==65534 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xfffe, 0xffff, x5, 1936, x1)
+
+inst_501:
+// rs1_val==65534 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xfffe, 0x2, x5, 1940, x1)
+
+inst_502:
+// rs1_val==65534 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5554, 0xfffe, 0x55555554, x5, 1944, x1)
+
+inst_503:
+// rs1_val==65534 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaa9, 0xfffe, 0xaaaaaaa9, x5, 1948, x1)
+
+inst_504:
+// rs1_val==65534 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xfffe, 0x4, x5, 1952, x1)
+
+inst_505:
+// rs1_val==65534 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3332, 0xfffe, 0x33333332, x5, 1956, x1)
+
+inst_506:
+// rs1_val==65534 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6665, 0xfffe, 0x66666665, x5, 1960, x1)
+
+inst_507:
+// rs1_val==65534 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xfffe, 0xb503, x5, 1964, x1)
+
+inst_508:
+// rs1_val==65534 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xfffe, 0xfffe, x5, 1968, x1)
+
+inst_509:
+// rs1_val==65534 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5554, 0xfffe, 0x55555556, x5, 1972, x1)
+
+inst_510:
+// rs1_val==65534 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaa9, 0xfffe, 0xaaaaaaab, x5, 1976, x1)
+
+inst_511:
+// rs1_val==65534 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xfffe, 0x6, x5, 1980, x1)
+
+inst_512:
+// rs1_val==65534 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3332, 0xfffe, 0x33333334, x5, 1984, x1)
+
+inst_513:
+// rs1_val==65534 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6665, 0xfffe, 0x66666667, x5, 1988, x1)
+
+inst_514:
+// rs1_val==65534 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xfffe, 0xb505, x5, 1992, x1)
+
+inst_515:
+// rs1_val==65534 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xfffe, 0x1, x5, 1996, x1)
+
+inst_516:
+// rs1_val==65534 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xfffe, 0x10000, x5, 2000, x1)
+
+inst_517:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x55555556, 0x3, x5, 2004, x1)
+
+inst_518:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1c71c71c, 0x55555556, 0x55555555, x5, 2008, x1)
+
+inst_519:
+// rs1_val==1431655766 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e39, 0x55555556, 0xaaaaaaaa, x5, 2012, x1)
+
+inst_520:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x55555556, 0x5, x5, 2016, x1)
+
+inst_521:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111111, 0x55555556, 0x33333333, x5, 2020, x1)
+
+inst_522:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0x55555556, 0x66666666, x5, 2024, x1)
+
+inst_523:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0x55555556, 0xb504, x5, 2028, x1)
+
+inst_524:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x55555556, 0x0, x5, 2032, x1)
+
+inst_525:
+// rs1_val==1431655766 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5555, 0x55555556, 0xffff, x5, 2036, x1)
+
+inst_526:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x55555556, 0x2, x5, 2040, x1)
+
+inst_527:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1c71c71c, 0x55555556, 0x55555554, x5, 2044, x1)
+RVTEST_SIGBASE( x5,signature_x5_1)
+
+inst_528:
+// rs1_val==1431655766 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e38, 0x55555556, 0xaaaaaaa9, x5, 0, x1)
+
+inst_529:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x55555556, 0x4, x5, 4, x1)
+
+inst_530:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111110, 0x55555556, 0x33333332, x5, 8, x1)
+
+inst_531:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x55555556, 0x66666665, x5, 12, x1)
+
+inst_532:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0x55555556, 0xb503, x5, 16, x1)
+
+inst_533:
+// rs1_val==1431655766 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5554, 0x55555556, 0xfffe, x5, 20, x1)
+
+inst_534:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1c71c71c, 0x55555556, 0x55555556, x5, 24, x1)
+
+inst_535:
+// rs1_val==1431655766 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e39, 0x55555556, 0xaaaaaaab, x5, 28, x1)
+
+inst_536:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x55555556, 0x6, x5, 32, x1)
+
+inst_537:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111111, 0x55555556, 0x33333334, x5, 36, x1)
+
+inst_538:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0x55555556, 0x66666667, x5, 40, x1)
+
+inst_539:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c57, 0x55555556, 0xb505, x5, 44, x1)
+
+inst_540:
+// rs1_val==1431655766 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x55555556, 0x1, x5, 48, x1)
+
+inst_541:
+// rs1_val==1431655766 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5555, 0x55555556, 0x10000, x5, 52, x1)
+
+inst_542:
+// rs1_val==2863311531 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0xaaaaaaab, 0x3, x5, 56, x1)
+
+inst_543:
+// rs1_val==2863311531 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e38, 0xaaaaaaab, 0x55555555, x5, 60, x1)
+
+inst_544:
+// rs1_val==2863311531 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x71c71c71, 0xaaaaaaab, 0xaaaaaaaa, x5, 64, x1)
+
+inst_545:
+// rs1_val==2863311531 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3, 0xaaaaaaab, 0x5, x5, 68, x1)
+
+inst_546:
+// rs1_val==2863311531 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0xaaaaaaab, 0x33333333, x5, 72, x1)
+
+inst_547:
+// rs1_val==2863311531 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444444, 0xaaaaaaab, 0x66666666, x5, 76, x1)
+
+inst_548:
+// rs1_val==2863311531 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ad, 0xaaaaaaab, 0xb504, x5, 80, x1)
+
+inst_549:
+// rs1_val==2863311531 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x0, x5, 84, x1)
+
+inst_550:
+// rs1_val==2863311531 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaaa, 0xaaaaaaab, 0xffff, x5, 88, x1)
+
+inst_551:
+// rs1_val==2863311531 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0xaaaaaaab, 0x2, x5, 92, x1)
+
+inst_552:
+// rs1_val==2863311531 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e38, 0xaaaaaaab, 0x55555554, x5, 96, x1)
+
+inst_553:
+// rs1_val==2863311531 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x71c71c70, 0xaaaaaaab, 0xaaaaaaa9, x5, 100, x1)
+
+inst_554:
+// rs1_val==2863311531 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0xaaaaaaab, 0x4, x5, 104, x1)
+
+inst_555:
+// rs1_val==2863311531 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0xaaaaaaab, 0x33333332, x5, 108, x1)
+
+inst_556:
+// rs1_val==2863311531 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444443, 0xaaaaaaab, 0x66666665, x5, 112, x1)
+
+inst_557:
+// rs1_val==2863311531 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ac, 0xaaaaaaab, 0xb503, x5, 116, x1)
+
+inst_558:
+// rs1_val==2863311531 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaa9, 0xaaaaaaab, 0xfffe, x5, 120, x1)
+
+inst_559:
+// rs1_val==2863311531 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x38e38e39, 0xaaaaaaab, 0x55555556, x5, 124, x1)
+
+inst_560:
+// rs1_val==2863311531 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x71c71c72, 0xaaaaaaab, 0xaaaaaaab, x5, 128, x1)
+
+inst_561:
+// rs1_val==2863311531 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4, 0xaaaaaaab, 0x6, x5, 132, x1)
+
+inst_562:
+// rs1_val==2863311531 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0xaaaaaaab, 0x33333334, x5, 136, x1)
+
+inst_563:
+// rs1_val==2863311531 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444444, 0xaaaaaaab, 0x66666667, x5, 140, x1)
+
+inst_564:
+// rs1_val==2863311531 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ae, 0xaaaaaaab, 0xb505, x5, 144, x1)
+
+inst_565:
+// rs1_val==2863311531 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x1, x5, 148, x1)
+
+inst_566:
+// rs1_val==2863311531 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaaa, 0xaaaaaaab, 0x10000, x5, 152, x1)
+
+inst_567:
+// rs1_val==6 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x6, 0x3, x5, 156, x1)
+
+inst_568:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x6, 0x55555555, x5, 160, x1)
+
+inst_569:
+// rs1_val==6 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3, 0x6, 0xaaaaaaaa, x5, 164, x1)
+
+inst_570:
+// rs1_val==6 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x6, 0x5, x5, 168, x1)
+
+inst_571:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x6, 0x33333333, x5, 172, x1)
+
+inst_572:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x6, 0x66666666, x5, 176, x1)
+
+inst_573:
+// rs1_val==6 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x6, 0xb504, x5, 180, x1)
+
+inst_574:
+// rs1_val==6 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x6, 0x0, x5, 184, x1)
+
+inst_575:
+// rs1_val==6 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x6, 0xffff, x5, 188, x1)
+
+inst_576:
+// rs1_val==6 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x6, 0x2, x5, 192, x1)
+
+inst_577:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x6, 0x55555554, x5, 196, x1)
+
+inst_578:
+// rs1_val==6 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3, 0x6, 0xaaaaaaa9, x5, 200, x1)
+
+inst_579:
+// rs1_val==6 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x6, 0x4, x5, 204, x1)
+
+inst_580:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x6, 0x33333332, x5, 208, x1)
+
+inst_581:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x6, 0x66666665, x5, 212, x1)
+
+inst_582:
+// rs1_val==6 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x6, 0xb503, x5, 216, x1)
+
+inst_583:
+// rs1_val==6 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x6, 0xfffe, x5, 220, x1)
+
+inst_584:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x6, 0x55555556, x5, 224, x1)
+
+inst_585:
+// rs1_val==6 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4, 0x6, 0xaaaaaaab, x5, 228, x1)
+
+inst_586:
+// rs1_val==6 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x6, 0x6, x5, 232, x1)
+
+inst_587:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x6, 0x33333334, x5, 236, x1)
+
+inst_588:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x6, 0x66666667, x5, 240, x1)
+
+inst_589:
+// rs1_val==6 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x6, 0xb505, x5, 244, x1)
+
+inst_590:
+// rs1_val==6 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x6, 0x1, x5, 248, x1)
+
+inst_591:
+// rs1_val==6 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x6, 0x10000, x5, 252, x1)
+
+inst_592:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333334, 0x3, x5, 256, x1)
+
+inst_593:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111111, 0x33333334, 0x55555555, x5, 260, x1)
+
+inst_594:
+// rs1_val==858993460 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0x33333334, 0xaaaaaaaa, x5, 264, x1)
+
+inst_595:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x33333334, 0x5, x5, 268, x1)
+
+inst_596:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0xa3d70a3, 0x33333334, 0x33333333, x5, 272, x1)
+
+inst_597:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x33333334, 0x66666666, x5, 276, x1)
+
+inst_598:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2434, 0x33333334, 0xb504, x5, 280, x1)
+
+inst_599:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333334, 0x0, x5, 284, x1)
+
+inst_600:
+// rs1_val==858993460 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3333, 0x33333334, 0xffff, x5, 288, x1)
+
+inst_601:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333334, 0x2, x5, 292, x1)
+
+inst_602:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111111, 0x33333334, 0x55555554, x5, 296, x1)
+
+inst_603:
+// rs1_val==858993460 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0x33333334, 0xaaaaaaa9, x5, 300, x1)
+
+inst_604:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333334, 0x4, x5, 304, x1)
+
+inst_605:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0xa3d70a3, 0x33333334, 0x33333332, x5, 308, x1)
+
+inst_606:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x33333334, 0x66666665, x5, 312, x1)
+
+inst_607:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2433, 0x33333334, 0xb503, x5, 316, x1)
+
+inst_608:
+// rs1_val==858993460 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3332, 0x33333334, 0xfffe, x5, 320, x1)
+
+inst_609:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x11111111, 0x33333334, 0x55555556, x5, 324, x1)
+
+inst_610:
+// rs1_val==858993460 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0x33333334, 0xaaaaaaab, x5, 328, x1)
+
+inst_611:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x33333334, 0x6, x5, 332, x1)
+
+inst_612:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0xa3d70a4, 0x33333334, 0x33333334, x5, 336, x1)
+
+inst_613:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae148, 0x33333334, 0x66666667, x5, 340, x1)
+
+inst_614:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2434, 0x33333334, 0xb505, x5, 344, x1)
+
+inst_615:
+// rs1_val==858993460 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x33333334, 0x1, x5, 348, x1)
+
+inst_616:
+// rs1_val==858993460 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3333, 0x33333334, 0x10000, x5, 352, x1)
+
+inst_617:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x66666667, 0x3, x5, 356, x1)
+
+inst_618:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0x66666667, 0x55555555, x5, 360, x1)
+
+inst_619:
+// rs1_val==1717986919 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444444, 0x66666667, 0xaaaaaaaa, x5, 364, x1)
+
+inst_620:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x66666667, 0x5, x5, 368, x1)
+
+inst_621:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x66666667, 0x33333333, x5, 372, x1)
+
+inst_622:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x28f5c28f, 0x66666667, 0x66666666, x5, 376, x1)
+
+inst_623:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4868, 0x66666667, 0xb504, x5, 380, x1)
+
+inst_624:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x66666667, 0x0, x5, 384, x1)
+
+inst_625:
+// rs1_val==1717986919 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6666, 0x66666667, 0xffff, x5, 388, x1)
+
+inst_626:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x66666667, 0x2, x5, 392, x1)
+
+inst_627:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222221, 0x66666667, 0x55555554, x5, 396, x1)
+
+inst_628:
+// rs1_val==1717986919 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444443, 0x66666667, 0xaaaaaaa9, x5, 400, x1)
+
+inst_629:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x66666667, 0x4, x5, 404, x1)
+
+inst_630:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x66666667, 0x33333332, x5, 408, x1)
+
+inst_631:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x28f5c28f, 0x66666667, 0x66666665, x5, 412, x1)
+
+inst_632:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4867, 0x66666667, 0xb503, x5, 416, x1)
+
+inst_633:
+// rs1_val==1717986919 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6665, 0x66666667, 0xfffe, x5, 420, x1)
+
+inst_634:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x22222222, 0x66666667, 0x55555556, x5, 424, x1)
+
+inst_635:
+// rs1_val==1717986919 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x44444444, 0x66666667, 0xaaaaaaab, x5, 428, x1)
+
+inst_636:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2, 0x66666667, 0x6, x5, 432, x1)
+
+inst_637:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae148, 0x66666667, 0x33333334, x5, 436, x1)
+
+inst_638:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x28f5c28f, 0x66666667, 0x66666667, x5, 440, x1)
+
+inst_639:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4868, 0x66666667, 0xb505, x5, 444, x1)
+
+inst_640:
+// rs1_val==1717986919 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x66666667, 0x1, x5, 448, x1)
+
+inst_641:
+// rs1_val==1717986919 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6666, 0x66666667, 0x10000, x5, 452, x1)
+
+inst_642:
+// rs1_val==46341 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb505, 0x3, x5, 456, x1)
+
+inst_643:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0xb505, 0x55555555, x5, 460, x1)
+
+inst_644:
+// rs1_val==46341 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ad, 0xb505, 0xaaaaaaaa, x5, 464, x1)
+
+inst_645:
+// rs1_val==46341 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb505, 0x5, x5, 468, x1)
+
+inst_646:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2434, 0xb505, 0x33333333, x5, 472, x1)
+
+inst_647:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4868, 0xb505, 0x66666666, x5, 476, x1)
+
+inst_648:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb505, 0xb504, x5, 480, x1)
+
+inst_649:
+// rs1_val==46341 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb505, 0x0, x5, 484, x1)
+
+inst_650:
+// rs1_val==46341 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb505, 0xffff, x5, 488, x1)
+
+inst_651:
+// rs1_val==46341 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb505, 0x2, x5, 492, x1)
+
+inst_652:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c56, 0xb505, 0x55555554, x5, 496, x1)
+
+inst_653:
+// rs1_val==46341 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ad, 0xb505, 0xaaaaaaa9, x5, 500, x1)
+
+inst_654:
+// rs1_val==46341 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb505, 0x4, x5, 504, x1)
+
+inst_655:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2434, 0xb505, 0x33333332, x5, 508, x1)
+
+inst_656:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4868, 0xb505, 0x66666665, x5, 512, x1)
+
+inst_657:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb505, 0xb503, x5, 516, x1)
+
+inst_658:
+// rs1_val==46341 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb505, 0xfffe, x5, 520, x1)
+
+inst_659:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3c57, 0xb505, 0x55555556, x5, 524, x1)
+
+inst_660:
+// rs1_val==46341 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x78ae, 0xb505, 0xaaaaaaab, x5, 528, x1)
+
+inst_661:
+// rs1_val==46341 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb505, 0x6, x5, 532, x1)
+
+inst_662:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x2434, 0xb505, 0x33333334, x5, 536, x1)
+
+inst_663:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4868, 0xb505, 0x66666667, x5, 540, x1)
+
+inst_664:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb505, 0xb505, x5, 544, x1)
+
+inst_665:
+// rs1_val==46341 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb505, 0x1, x5, 548, x1)
+
+inst_666:
+// rs1_val==46341 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0xb505, 0x10000, x5, 552, x1)
+
+inst_667:
+// rs1_val==1 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x3, x5, 556, x1)
+
+inst_668:
+// rs1_val==1 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x55555555, x5, 560, x1)
+
+inst_669:
+// rs1_val==1 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0xaaaaaaaa, x5, 564, x1)
+
+inst_670:
+// rs1_val==1 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x5, x5, 568, x1)
+
+inst_671:
+// rs1_val==1 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x33333333, x5, 572, x1)
+
+inst_672:
+// rs1_val==1 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x66666666, x5, 576, x1)
+
+inst_673:
+// rs1_val==1 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0xb504, x5, 580, x1)
+
+inst_674:
+// rs1_val==1 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x0, x5, 584, x1)
+
+inst_675:
+// rs1_val==1 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0xffff, x5, 588, x1)
+
+inst_676:
+// rs1_val==1 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x2, x5, 592, x1)
+
+inst_677:
+// rs1_val==1 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x55555554, x5, 596, x1)
+
+inst_678:
+// rs1_val==1 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0xaaaaaaa9, x5, 600, x1)
+
+inst_679:
+// rs1_val==1 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x4, x5, 604, x1)
+
+inst_680:
+// rs1_val==1 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x33333332, x5, 608, x1)
+
+inst_681:
+// rs1_val==1 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x66666665, x5, 612, x1)
+
+inst_682:
+// rs1_val==1 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0xb503, x5, 616, x1)
+
+inst_683:
+// rs1_val==1 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0xfffe, x5, 620, x1)
+
+inst_684:
+// rs1_val==1 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x55555556, x5, 624, x1)
+
+inst_685:
+// rs1_val==1 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0xaaaaaaab, x5, 628, x1)
+
+inst_686:
+// rs1_val==1 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x6, x5, 632, x1)
+
+inst_687:
+// rs1_val==1 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x33333334, x5, 636, x1)
+
+inst_688:
+// rs1_val==1 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x66666667, x5, 640, x1)
+
+inst_689:
+// rs1_val==1 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0xb505, x5, 644, x1)
+
+inst_690:
+// rs1_val==1 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x1, x5, 648, x1)
+
+inst_691:
+// rs1_val==1 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x1, 0x10000, x5, 652, x1)
+
+inst_692:
+// rs1_val==65536 and rs2_val==3,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x3
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x10000, 0x3, x5, 656, x1)
+
+inst_693:
+// rs1_val==65536 and rs2_val==1431655765,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x55555555
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5555, 0x10000, 0x55555555, x5, 660, x1)
+
+inst_694:
+// rs1_val==65536 and rs2_val==2863311530,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xaaaaaaaa
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaaa, 0x10000, 0xaaaaaaaa, x5, 664, x1)
+
+inst_695:
+// rs1_val==65536 and rs2_val==5,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x5
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x10000, 0x5, x5, 668, x1)
+
+inst_696:
+// rs1_val==65536 and rs2_val==858993459,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x33333333
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3333, 0x10000, 0x33333333, x5, 672, x1)
+
+inst_697:
+// rs1_val==65536 and rs2_val==1717986918,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x66666666
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6666, 0x10000, 0x66666666, x5, 676, x1)
+
+inst_698:
+// rs1_val==65536 and rs2_val==46340,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xb504
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x10000, 0xb504, x5, 680, x1)
+
+inst_699:
+// rs1_val==65536 and rs2_val==0,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x0
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x10000, 0x0, x5, 684, x1)
+
+inst_700:
+// rs1_val==65536 and rs2_val==65535,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xffff
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x10000, 0xffff, x5, 688, x1)
+
+inst_701:
+// rs1_val==65536 and rs2_val==2,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x2
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x10000, 0x2, x5, 692, x1)
+
+inst_702:
+// rs1_val==65536 and rs2_val==1431655764,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x55555554
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5555, 0x10000, 0x55555554, x5, 696, x1)
+
+inst_703:
+// rs1_val==65536 and rs2_val==2863311529,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xaaaaaaa9
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaaa, 0x10000, 0xaaaaaaa9, x5, 700, x1)
+
+inst_704:
+// rs1_val==65536 and rs2_val==4,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x4
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x10000, 0x4, x5, 704, x1)
+
+inst_705:
+// rs1_val==65536 and rs2_val==858993458,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x33333332
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3333, 0x10000, 0x33333332, x5, 708, x1)
+
+inst_706:
+// rs1_val==65536 and rs2_val==1717986917,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x66666665
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6666, 0x10000, 0x66666665, x5, 712, x1)
+
+inst_707:
+// rs1_val==65536 and rs2_val==46339,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xb503
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x10000, 0xb503, x5, 716, x1)
+
+inst_708:
+// rs1_val==65536 and rs2_val==65534,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xfffe
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x10000, 0xfffe, x5, 720, x1)
+
+inst_709:
+// rs1_val==65536 and rs2_val==1431655766,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x55555556
+TEST_RR_OP(mulhu, x12, x10, x11, 0x5555, 0x10000, 0x55555556, x5, 724, x1)
+
+inst_710:
+// rs1_val==65536 and rs2_val==2863311531,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xaaaaaaab
+TEST_RR_OP(mulhu, x12, x10, x11, 0xaaaa, 0x10000, 0xaaaaaaab, x5, 728, x1)
+
+inst_711:
+// rs1_val==65536 and rs2_val==6,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x6
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x10000, 0x6, x5, 732, x1)
+
+inst_712:
+// rs1_val==65536 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x3333, 0x10000, 0x33333334, x5, 736, x1)
+
+inst_713:
+// rs1_val==65536 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x6666, 0x10000, 0x66666667, x5, 740, x1)
+
+inst_714:
+// rs1_val==65536 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x10000, 0xb505, x5, 744, x1)
+
+inst_715:
+// rs1_val==65536 and rs2_val==1,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x10000, 0x1, x5, 748, x1)
+
+inst_716:
+// rs1_val==65536 and rs2_val==65536,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x10000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x1, 0x10000, 0x10000, x5, 752, x1)
+
+inst_717:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(mulhu, x12, x10, x11, 0x147ae147, 0x66666665, 0x33333334, x5, 756, x1)
+
+inst_718:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(mulhu, x12, x10, x11, 0x28f5c28f, 0x66666665, 0x66666667, x5, 760, x1)
+
+inst_719:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(mulhu, x12, x10, x11, 0x4868, 0x66666665, 0xb505, x5, 764, x1)
+
+inst_720:
+// rs1_val == rs2_val and rs1_val > 0 and rs2_val > 0, rs1_val == 2147483648, rs2_val == 2147483648
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0x80000000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x40000000, 0x80000000, 0x80000000, x5, 768, x1)
+
+inst_721:
+// rs2_val == 1, rs1_val==1717986918 and rs2_val==1
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x1
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x66666666, 0x1, x5, 772, x1)
+
+inst_722:
+// rs2_val == 256, rs1_val == 1431655765
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x100
+TEST_RR_OP(mulhu, x12, x10, x11, 0x55, 0x55555555, 0x100, x5, 776, x1)
+
+inst_723:
+// rs2_val == 524288,
+// opcode: mulhu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x80000
+TEST_RR_OP(mulhu, x12, x10, x11, 0x0, 0x4, 0x80000, x5, 780, x1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x17_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x17_1:
+ .fill 16*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_1:
+ .fill 196*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/rem-01.S b/riscof/suite/rv32i_m/M/rem-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..ee8abb95c87a6bf8c2da08ec2a468a8c80cedddb
--- /dev/null
+++ b/riscof/suite/rv32i_m/M/rem-01.S
@@ -0,0 +1,3014 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:19:56 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32im.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the rem instruction of the RISC-V M extension for the rem covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IM")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*M.*);def TEST_CASE_1=True;",rem)
+
+RVTEST_SIGBASE( x26,signature_x26_1)
+
+inst_0:
+// rs2 == rd != rs1, rs1==x24, rs2==x11, rd==x11, rs1_val > 0 and rs2_val > 0, rs1_val==1431655766 and rs2_val==2, rs1_val != rs2_val, rs2_val == 2
+// opcode: rem ; op1:x24; op2:x11; dest:x11; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(rem, x11, x24, x11, 0x0, 0x55555556, 0x2, x26, 0, x10)
+
+inst_1:
+// rs1 == rs2 == rd, rs1==x2, rs2==x2, rd==x2, rs1_val > 0 and rs2_val < 0, rs2_val == -4194305, rs1_val == 64
+// opcode: rem ; op1:x2; op2:x2; dest:x2; op1val:0x40; op2val:0x40
+TEST_RR_OP(rem, x2, x2, x2, 0x0, 0x40, 0x40, x26, 4, x10)
+
+inst_2:
+// rs1 == rs2 != rd, rs1==x3, rs2==x3, rd==x13, rs1_val < 0 and rs2_val < 0, rs1_val == -65
+// opcode: rem ; op1:x3; op2:x3; dest:x13; op1val:-0x41; op2val:-0x41
+TEST_RR_OP(rem, x13, x3, x3, 0x0, -0x41, -0x41, x26, 8, x10)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x5, rs2==x1, rd==x25, rs1_val < 0 and rs2_val > 0, rs1_val == (-2**(xlen-1)), rs1_val == -2147483648, rs2_val == 65536
+// opcode: rem ; op1:x5; op2:x1; dest:x25; op1val:-0x80000000; op2val:0x10000
+TEST_RR_OP(rem, x25, x5, x1, 0x0, -0x80000000, 0x10000, x26, 12, x10)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x22, rs2==x17, rd==x22, rs1_val == rs2_val, rs1_val==46340 and rs2_val==46340
+// opcode: rem ; op1:x22; op2:x17; dest:x22; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(rem, x22, x22, x17, 0x0, 0xb504, 0xb504, x26, 16, x10)
+
+inst_5:
+// rs1==x27, rs2==x7, rd==x4, rs2_val == (-2**(xlen-1)), rs2_val == -2147483648
+// opcode: rem ; op1:x27; op2:x7; dest:x4; op1val:0x55555554; op2val:-0x80000000
+TEST_RR_OP(rem, x4, x27, x7, 0x55555554, 0x55555554, -0x80000000, x26, 20, x10)
+
+inst_6:
+// rs1==x8, rs2==x25, rd==x5, rs2_val == 0, rs1_val == 2097152
+// opcode: rem ; op1:x8; op2:x25; dest:x5; op1val:0x200000; op2val:0x0
+TEST_RR_OP(rem, x5, x8, x25, 0x200000, 0x200000, 0x0, x26, 24, x10)
+
+inst_7:
+// rs1==x4, rs2==x0, rd==x14, rs2_val == (2**(xlen-1)-1), rs2_val == 2147483647
+// opcode: rem ; op1:x4; op2:x0; dest:x14; op1val:-0xb503; op2val:0x0
+TEST_RR_OP(rem, x14, x4, x0, -0xb503, -0xb503, 0x0, x26, 28, x10)
+
+inst_8:
+// rs1==x9, rs2==x13, rd==x24, rs2_val == 1,
+// opcode: rem ; op1:x9; op2:x13; dest:x24; op1val:0x6; op2val:0x1
+TEST_RR_OP(rem, x24, x9, x13, 0x0, 0x6, 0x1, x26, 32, x10)
+
+inst_9:
+// rs1==x28, rs2==x18, rd==x30, rs1_val == 0, rs1_val==0 and rs2_val==4, rs2_val == 4
+// opcode: rem ; op1:x28; op2:x18; dest:x30; op1val:0x0; op2val:0x4
+TEST_RR_OP(rem, x30, x28, x18, 0x0, 0x0, 0x4, x26, 36, x10)
+
+inst_10:
+// rs1==x13, rs2==x16, rd==x19, rs1_val == (2**(xlen-1)-1), rs1_val == 2147483647
+// opcode: rem ; op1:x13; op2:x16; dest:x19; op1val:0x7fffffff; op2val:-0xa
+TEST_RR_OP(rem, x19, x13, x16, 0x7, 0x7fffffff, -0xa, x26, 40, x10)
+
+inst_11:
+// rs1==x7, rs2==x9, rd==x20, rs1_val == 1,
+// opcode: rem ; op1:x7; op2:x9; dest:x20; op1val:0x1; op2val:0xb503
+TEST_RR_OP(rem, x20, x7, x9, 0x1, 0x1, 0xb503, x26, 44, x10)
+
+inst_12:
+// rs1==x0, rs2==x6, rd==x7, rs2_val == 8,
+// opcode: rem ; op1:x0; op2:x6; dest:x7; op1val:0x0; op2val:0x8
+TEST_RR_OP(rem, x7, x0, x6, 0x0, 0x0, 0x8, x26, 48, x10)
+
+inst_13:
+// rs1==x18, rs2==x24, rd==x16, rs2_val == 16, rs1_val == 512
+// opcode: rem ; op1:x18; op2:x24; dest:x16; op1val:0x200; op2val:0x10
+TEST_RR_OP(rem, x16, x18, x24, 0x0, 0x200, 0x10, x26, 52, x10)
+
+inst_14:
+// rs1==x15, rs2==x21, rd==x23, rs2_val == 32, rs1_val == -257
+// opcode: rem ; op1:x15; op2:x21; dest:x23; op1val:-0x101; op2val:0x20
+TEST_RR_OP(rem, x23, x15, x21, -0x1, -0x101, 0x20, x26, 56, x10)
+
+inst_15:
+// rs1==x1, rs2==x14, rd==x17, rs2_val == 64, rs1_val == -268435457
+// opcode: rem ; op1:x1; op2:x14; dest:x17; op1val:-0x10000001; op2val:0x40
+TEST_RR_OP(rem, x17, x1, x14, -0x1, -0x10000001, 0x40, x26, 60, x10)
+
+inst_16:
+// rs1==x19, rs2==x15, rd==x1, rs2_val == 128, rs1_val == -3
+// opcode: rem ; op1:x19; op2:x15; dest:x1; op1val:-0x3; op2val:0x80
+TEST_RR_OP(rem, x1, x19, x15, -0x3, -0x3, 0x80, x26, 64, x10)
+
+inst_17:
+// rs1==x11, rs2==x12, rd==x15, rs2_val == 256, rs1_val == -16777217
+// opcode: rem ; op1:x11; op2:x12; dest:x15; op1val:-0x1000001; op2val:0x100
+TEST_RR_OP(rem, x15, x11, x12, -0x1, -0x1000001, 0x100, x26, 68, x10)
+
+inst_18:
+// rs1==x6, rs2==x20, rd==x3, rs2_val == 512, rs1_val == -8388609
+// opcode: rem ; op1:x6; op2:x20; dest:x3; op1val:-0x800001; op2val:0x200
+TEST_RR_OP(rem, x3, x6, x20, -0x1, -0x800001, 0x200, x26, 72, x2)
+
+inst_19:
+// rs1==x25, rs2==x30, rd==x10, rs2_val == 1024, rs1_val == -16385
+// opcode: rem ; op1:x25; op2:x30; dest:x10; op1val:-0x4001; op2val:0x400
+TEST_RR_OP(rem, x10, x25, x30, -0x1, -0x4001, 0x400, x26, 76, x2)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_20:
+// rs1==x16, rs2==x26, rd==x0, rs2_val == 2048,
+// opcode: rem ; op1:x16; op2:x26; dest:x0; op1val:-0x4001; op2val:0x800
+TEST_RR_OP(rem, x0, x16, x26, 0, -0x4001, 0x800, x1, 0, x2)
+
+inst_21:
+// rs1==x14, rs2==x31, rd==x9, rs2_val == 4096, rs1_val == -131073
+// opcode: rem ; op1:x14; op2:x31; dest:x9; op1val:-0x20001; op2val:0x1000
+TEST_RR_OP(rem, x9, x14, x31, -0x1, -0x20001, 0x1000, x1, 4, x2)
+
+inst_22:
+// rs1==x23, rs2==x4, rd==x6, rs2_val == 8192, rs1_val == -17
+// opcode: rem ; op1:x23; op2:x4; dest:x6; op1val:-0x11; op2val:0x2000
+TEST_RR_OP(rem, x6, x23, x4, -0x11, -0x11, 0x2000, x1, 8, x2)
+
+inst_23:
+// rs1==x10, rs2==x5, rd==x18, rs2_val == 16384, rs1_val == 16
+// opcode: rem ; op1:x10; op2:x5; dest:x18; op1val:0x10; op2val:0x4000
+TEST_RR_OP(rem, x18, x10, x5, 0x10, 0x10, 0x4000, x1, 12, x2)
+
+inst_24:
+// rs1==x17, rs2==x19, rd==x27, rs2_val == 32768,
+// opcode: rem ; op1:x17; op2:x19; dest:x27; op1val:0x40; op2val:0x8000
+TEST_RR_OP(rem, x27, x17, x19, 0x40, 0x40, 0x8000, x1, 16, x2)
+
+inst_25:
+// rs1==x12, rs2==x8, rd==x28, rs2_val == 131072, rs1_val == -524289
+// opcode: rem ; op1:x12; op2:x8; dest:x28; op1val:-0x80001; op2val:0x20000
+TEST_RR_OP(rem, x28, x12, x8, -0x1, -0x80001, 0x20000, x1, 20, x2)
+
+inst_26:
+// rs1==x21, rs2==x28, rd==x26, rs2_val == 262144, rs1_val == 8192
+// opcode: rem ; op1:x21; op2:x28; dest:x26; op1val:0x2000; op2val:0x40000
+TEST_RR_OP(rem, x26, x21, x28, 0x2000, 0x2000, 0x40000, x1, 24, x2)
+
+inst_27:
+// rs1==x31, rs2==x23, rd==x29, rs2_val == 524288, rs1_val == 4
+// opcode: rem ; op1:x31; op2:x23; dest:x29; op1val:0x4; op2val:0x80000
+TEST_RR_OP(rem, x29, x31, x23, 0x4, 0x4, 0x80000, x1, 28, x2)
+
+inst_28:
+// rs1==x29, rs2==x22, rd==x8, rs2_val == 1048576, rs1_val == 131072
+// opcode: rem ; op1:x29; op2:x22; dest:x8; op1val:0x20000; op2val:0x100000
+TEST_RR_OP(rem, x8, x29, x22, 0x20000, 0x20000, 0x100000, x1, 32, x2)
+
+inst_29:
+// rs1==x20, rs2==x27, rd==x31, rs2_val == 2097152,
+// opcode: rem ; op1:x20; op2:x27; dest:x31; op1val:0x40; op2val:0x200000
+TEST_RR_OP(rem, x31, x20, x27, 0x40, 0x40, 0x200000, x1, 36, x2)
+
+inst_30:
+// rs1==x30, rs2==x29, rd==x21, rs2_val == 4194304, rs1_val == 1048576
+// opcode: rem ; op1:x30; op2:x29; dest:x21; op1val:0x100000; op2val:0x400000
+TEST_RR_OP(rem, x21, x30, x29, 0x100000, 0x100000, 0x400000, x1, 40, x2)
+
+inst_31:
+// rs1==x26, rs2==x10, rd==x12, rs2_val == 8388608, rs1_val == 268435456
+// opcode: rem ; op1:x26; op2:x10; dest:x12; op1val:0x10000000; op2val:0x800000
+TEST_RR_OP(rem, x12, x26, x10, 0x0, 0x10000000, 0x800000, x1, 44, x2)
+
+inst_32:
+// rs2_val == 16777216,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x1000000
+TEST_RR_OP(rem, x12, x10, x11, 0x333333, 0x33333333, 0x1000000, x1, 48, x2)
+
+inst_33:
+// rs2_val == 33554432,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x2000000
+TEST_RR_OP(rem, x12, x10, x11, -0x4001, -0x4001, 0x2000000, x1, 52, x2)
+
+inst_34:
+// rs2_val == 67108864,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4000000
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x4000000, x1, 56, x2)
+
+inst_35:
+// rs2_val == 134217728, rs1_val == -513
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x8000000
+TEST_RR_OP(rem, x12, x10, x11, -0x201, -0x201, 0x8000000, x1, 60, x2)
+
+inst_36:
+// rs2_val == 268435456,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x10000000
+TEST_RR_OP(rem, x12, x10, x11, 0xb505, 0xb505, 0x10000000, x1, 64, x2)
+
+inst_37:
+// rs2_val == 536870912, rs1_val == 8
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0x20000000
+TEST_RR_OP(rem, x12, x10, x11, 0x8, 0x8, 0x20000000, x1, 68, x2)
+
+inst_38:
+// rs2_val == 1073741824, rs1_val == -67108865
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x40000000
+TEST_RR_OP(rem, x12, x10, x11, -0x4000001, -0x4000001, 0x40000000, x1, 72, x2)
+
+inst_39:
+// rs2_val == -2, rs1_val == 1431655765
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x55555555, -0x2, x1, 76, x2)
+
+inst_40:
+// rs2_val == -3, rs1_val == -1431655766
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x3
+TEST_RR_OP(rem, x12, x10, x11, -0x2, -0x55555556, -0x3, x1, 80, x2)
+
+inst_41:
+// rs2_val == -5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:-0x5
+TEST_RR_OP(rem, x12, x10, x11, -0x2, -0x11, -0x5, x1, 84, x2)
+
+inst_42:
+// rs2_val == -9, rs1_val == -134217729
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x9
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0x8000001, -0x9, x1, 88, x2)
+
+inst_43:
+// rs2_val == -17,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:-0x11
+TEST_RR_OP(rem, x12, x10, x11, -0x9, -0x80001, -0x11, x1, 92, x2)
+
+inst_44:
+// rs2_val == -33,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x21
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, -0x21, x1, 96, x2)
+
+inst_45:
+// rs2_val == -65,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x41
+TEST_RR_OP(rem, x12, x10, x11, -0x9, -0x8000001, -0x41, x1, 100, x2)
+
+inst_46:
+// rs2_val == -129, rs1_val == 2
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x81
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, -0x81, x1, 104, x2)
+
+inst_47:
+// rs2_val == -257,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x9; op2val:-0x101
+TEST_RR_OP(rem, x12, x10, x11, 0x9, 0x9, -0x101, x1, 108, x2)
+
+inst_48:
+// rs2_val == -513,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:-0x201
+TEST_RR_OP(rem, x12, x10, x11, -0x21, -0x800001, -0x201, x1, 112, x2)
+
+inst_49:
+// rs2_val == -1025,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x401
+TEST_RR_OP(rem, x12, x10, x11, -0x155, -0x55555556, -0x401, x1, 116, x2)
+
+inst_50:
+// rs2_val == -2049, rs1_val == -1048577
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:-0x801
+TEST_RR_OP(rem, x12, x10, x11, -0x602, -0x100001, -0x801, x1, 120, x2)
+
+inst_51:
+// rs2_val == -4097, rs1_val == 262144
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:-0x1001
+TEST_RR_OP(rem, x12, x10, x11, 0xfc1, 0x40000, -0x1001, x1, 124, x2)
+
+inst_52:
+// rs2_val == -8193,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x2001
+TEST_RR_OP(rem, x12, x10, x11, 0x19a8, 0x33333334, -0x2001, x1, 128, x2)
+
+inst_53:
+// rs2_val == -16385, rs1_val == 32768
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x4001
+TEST_RR_OP(rem, x12, x10, x11, 0x3fff, 0x8000, -0x4001, x1, 132, x2)
+
+inst_54:
+// rs2_val == -32769,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:-0x8001
+TEST_RR_OP(rem, x12, x10, x11, 0x7fe1, 0x100000, -0x8001, x1, 136, x2)
+
+inst_55:
+// rs2_val == -65537,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:-0x10001
+TEST_RR_OP(rem, x12, x10, x11, 0xfff1, 0x100000, -0x10001, x1, 140, x2)
+
+inst_56:
+// rs2_val == -131073,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:-0x20001
+TEST_RR_OP(rem, x12, x10, x11, 0x1fff1, 0x200000, -0x20001, x1, 144, x2)
+
+inst_57:
+// rs2_val == -262145,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000; op2val:-0x40001
+TEST_RR_OP(rem, x12, x10, x11, -0x3e001, -0x80000000, -0x40001, x1, 148, x2)
+
+inst_58:
+// rs2_val == -524289,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:-0x80001
+TEST_RR_OP(rem, x12, x10, x11, 0x7fffd, 0x200000, -0x80001, x1, 152, x2)
+
+inst_59:
+// rs2_val == -1048577, rs1_val == 256
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x100001
+TEST_RR_OP(rem, x12, x10, x11, 0x100, 0x100, -0x100001, x1, 156, x2)
+
+inst_60:
+// rs2_val == -2097153,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:-0x200001
+TEST_RR_OP(rem, x12, x10, x11, -0x11, -0x11, -0x200001, x1, 160, x2)
+
+inst_61:
+// rs2_val == -8388609, rs1_val == 4096
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:-0x800001
+TEST_RR_OP(rem, x12, x10, x11, 0x1000, 0x1000, -0x800001, x1, 164, x2)
+
+inst_62:
+// rs2_val == -16777217, rs1_val == -32769
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:-0x1000001
+TEST_RR_OP(rem, x12, x10, x11, -0x8001, -0x8001, -0x1000001, x1, 168, x2)
+
+inst_63:
+// rs2_val == -33554433,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x2000001
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, -0x2000001, x1, 172, x2)
+
+inst_64:
+// rs2_val == -67108865,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:-0x4000001
+TEST_RR_OP(rem, x12, x10, x11, 0x3fffffd, 0x10000000, -0x4000001, x1, 176, x2)
+
+inst_65:
+// rs2_val == -134217729,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x8000001
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, -0x8000001, x1, 180, x2)
+
+inst_66:
+// rs2_val == -268435457,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x10000001
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, -0x10000001, x1, 184, x2)
+
+inst_67:
+// rs2_val == -536870913,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x20000001
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, -0x20000001, x1, 188, x2)
+
+inst_68:
+// rs2_val == -1073741825,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x40000001
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, -0x40000001, x1, 192, x2)
+
+inst_69:
+// rs2_val == 1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, -0x1000001, -0x1000001, 0x55555555, x1, 196, x2)
+
+inst_70:
+// rs2_val == -1431655766, rs1_val == 1073741824
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x40000000, 0x40000000, -0x55555556, x1, 200, x2)
+
+inst_71:
+// rs1_val == 32,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:0x40000000
+TEST_RR_OP(rem, x12, x10, x11, 0x20, 0x20, 0x40000000, x1, 204, x2)
+
+inst_72:
+// rs1_val == 128,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x80, 0x80, 0x55555556, x1, 208, x2)
+
+inst_73:
+// rs1_val == 1024,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:0x1
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x400, 0x1, x1, 212, x2)
+
+inst_74:
+// rs1_val == 2048,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x401
+TEST_RR_OP(rem, x12, x10, x11, 0x3ff, 0x800, -0x401, x1, 216, x2)
+
+inst_75:
+// rs1_val == 16384,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:-0x81
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x4000, -0x81, x1, 220, x2)
+
+inst_76:
+// rs1_val == 65536,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x3fffffff
+TEST_RR_OP(rem, x12, x10, x11, 0x10000, 0x10000, 0x3fffffff, x1, 224, x2)
+
+inst_77:
+// rs1_val == 524288,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:-0x20001
+TEST_RR_OP(rem, x12, x10, x11, 0x1fffd, 0x80000, -0x20001, x1, 228, x2)
+
+inst_78:
+// rs1_val == 4194304,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x400000, 0x2, x1, 232, x2)
+
+inst_79:
+// rs1_val == 8388608,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x377, 0x800000, 0xb505, x1, 236, x2)
+
+inst_80:
+// rs1_val == 16777216,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0x40
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x1000000, 0x40, x1, 240, x2)
+
+inst_81:
+// rs1_val == 33554432,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x200
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x2000000, 0x200, x1, 244, x2)
+
+inst_82:
+// rs1_val == 67108864,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x20000
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x4000000, 0x20000, x1, 248, x2)
+
+inst_83:
+// rs1_val == 134217728,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:-0x81
+TEST_RR_OP(rem, x12, x10, x11, 0x41, 0x8000000, -0x81, x1, 252, x2)
+
+inst_84:
+// rs1_val == 536870912,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x20000000, 0x20000000, 0x0, x1, 256, x2)
+
+inst_85:
+// rs1_val == -2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0x201
+TEST_RR_OP(rem, x12, x10, x11, -0x2, -0x2, -0x201, x1, 260, x2)
+
+inst_86:
+// rs1_val == -5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:-0x3
+TEST_RR_OP(rem, x12, x10, x11, -0x2, -0x5, -0x3, x1, 264, x2)
+
+inst_87:
+// rs1_val == -9,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, -0x9, -0x9, 0x66666666, x1, 268, x2)
+
+inst_88:
+// rs1_val == -33,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, -0x3, -0x21, 0x5, x1, 272, x2)
+
+inst_89:
+// rs1_val == -129,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:-0x200001
+TEST_RR_OP(rem, x12, x10, x11, -0x81, -0x81, -0x200001, x1, 276, x2)
+
+inst_90:
+// rs1_val == -1025,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x401, 0x2, x1, 280, x2)
+
+inst_91:
+// rs1_val == -2049,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x20
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x801, 0x20, x1, 284, x2)
+
+inst_92:
+// rs1_val == -4097,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x80
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x1001, 0x80, x1, 288, x2)
+
+inst_93:
+// rs1_val == -8193,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0x2001, 0x3, x1, 292, x2)
+
+inst_94:
+// rs1_val == -65537,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x40
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x10001, 0x40, x1, 296, x2)
+
+inst_95:
+// rs1_val == -262145,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:-0x20000001
+TEST_RR_OP(rem, x12, x10, x11, -0x40001, -0x40001, -0x20000001, x1, 300, x2)
+
+inst_96:
+// rs1_val == -2097153,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, -0x200001, -0x200001, 0x55555555, x1, 304, x2)
+
+inst_97:
+// rs1_val == -4194305,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:-0x11
+TEST_RR_OP(rem, x12, x10, x11, -0xe, -0x400001, -0x11, x1, 308, x2)
+
+inst_98:
+// rs1_val == -33554433,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x2000000
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x2000001, 0x2000000, x1, 312, x2)
+
+inst_99:
+// rs1_val == -536870913,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x2000000
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x20000001, 0x2000000, x1, 316, x2)
+
+inst_100:
+// rs1_val == -1073741825,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x20000000
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x40000001, 0x20000000, x1, 320, x2)
+
+inst_101:
+// rs1_val==3 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x3, 0x3, x1, 324, x2)
+
+inst_102:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0x55555555, x1, 328, x2)
+
+inst_103:
+// rs1_val==3 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, -0x55555556, x1, 332, x2)
+
+inst_104:
+// rs1_val==3 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0x5, x1, 336, x2)
+
+inst_105:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0x33333333, x1, 340, x2)
+
+inst_106:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0x66666666, x1, 344, x2)
+
+inst_107:
+// rs1_val==3 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, -0xb504, x1, 348, x2)
+
+inst_108:
+// rs1_val==3 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0xb504, x1, 352, x2)
+
+inst_109:
+// rs1_val==3 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x3, 0x2, x1, 356, x2)
+
+inst_110:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0x55555554, x1, 360, x2)
+
+inst_111:
+// rs1_val==3 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0x0, x1, 364, x2)
+
+inst_112:
+// rs1_val==3 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0x4, x1, 368, x2)
+
+inst_113:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0x33333332, x1, 372, x2)
+
+inst_114:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0x66666665, x1, 376, x2)
+
+inst_115:
+// rs1_val==3 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0xb503, x1, 380, x2)
+
+inst_116:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0x55555556, x1, 384, x2)
+
+inst_117:
+// rs1_val==3 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, -0x55555555, x1, 388, x2)
+
+inst_118:
+// rs1_val==3 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0x6, x1, 392, x2)
+
+inst_119:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0x33333334, x1, 396, x2)
+
+inst_120:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0x66666667, x1, 400, x2)
+
+inst_121:
+// rs1_val==3 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, -0xb503, x1, 404, x2)
+
+inst_122:
+// rs1_val==3 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x3, 0xb505, x1, 408, x2)
+
+inst_123:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x55555555, 0x3, x1, 412, x2)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x55555555, 0x55555555, x1, 416, x2)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x55555555, 0x55555555, -0x55555556, x1, 420, x2)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x55555555, 0x5, x1, 424, x2)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x22222222, 0x55555555, 0x33333333, x1, 428, x2)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x55555555, 0x55555555, 0x66666666, x1, 432, x2)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x6c9d, 0x55555555, -0xb504, x1, 436, x2)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x6c9d, 0x55555555, 0xb504, x1, 440, x2)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x55555555, 0x2, x1, 444, x2)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x55555555, 0x55555554, x1, 448, x2)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x55555555, 0x55555555, 0x0, x1, 452, x2)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x55555555, 0x4, x1, 456, x2)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x22222223, 0x55555555, 0x33333332, x1, 460, x2)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x55555555, 0x55555555, 0x66666665, x1, 464, x2)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x3048, 0x55555555, 0xb503, x1, 468, x2)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x55555555, 0x55555555, 0x55555556, x1, 472, x2)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x55555555, -0x55555555, x1, 476, x2)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x55555555, 0x6, x1, 480, x2)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x22222221, 0x55555555, 0x33333334, x1, 484, x2)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x55555555, 0x55555555, 0x66666667, x1, 488, x2)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x3048, 0x55555555, -0xb503, x1, 492, x2)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0xa8f4, 0x55555555, 0xb505, x1, 496, x2)
+
+inst_145:
+// rs1_val==-1431655766 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, -0x2, -0x55555556, 0x3, x1, 500, x2)
+
+inst_146:
+// rs1_val==-1431655766 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x55555556, 0x55555555, x1, 504, x2)
+
+inst_147:
+// rs1_val==-1431655766 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0x55555556, -0x55555556, x1, 508, x2)
+
+inst_148:
+// rs1_val==-1431655766 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x55555556, 0x5, x1, 512, x2)
+
+inst_149:
+// rs1_val==-1431655766 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, -0x22222223, -0x55555556, 0x33333333, x1, 516, x2)
+
+inst_150:
+// rs1_val==-1431655766 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, -0x55555556, -0x55555556, 0x66666666, x1, 520, x2)
+
+inst_151:
+// rs1_val==-1431655766 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, -0x6c9e, -0x55555556, -0xb504, x1, 524, x2)
+
+inst_152:
+// rs1_val==-1431655766 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, -0x6c9e, -0x55555556, 0xb504, x1, 528, x2)
+
+inst_153:
+// rs1_val==-1431655766 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0x55555556, 0x2, x1, 532, x2)
+
+inst_154:
+// rs1_val==-1431655766 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, -0x2, -0x55555556, 0x55555554, x1, 536, x2)
+
+inst_155:
+// rs1_val==-1431655766 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, -0x55555556, -0x55555556, 0x0, x1, 540, x2)
+
+inst_156:
+// rs1_val==-1431655766 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, -0x2, -0x55555556, 0x4, x1, 544, x2)
+
+inst_157:
+// rs1_val==-1431655766 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, -0x22222224, -0x55555556, 0x33333332, x1, 548, x2)
+
+inst_158:
+// rs1_val==-1431655766 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, -0x55555556, -0x55555556, 0x66666665, x1, 552, x2)
+
+inst_159:
+// rs1_val==-1431655766 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, -0x3049, -0x55555556, 0xb503, x1, 556, x2)
+
+inst_160:
+// rs1_val==-1431655766 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0x55555556, 0x55555556, x1, 560, x2)
+
+inst_161:
+// rs1_val==-1431655766 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x55555556, -0x55555555, x1, 564, x2)
+
+inst_162:
+// rs1_val==-1431655766 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, -0x2, -0x55555556, 0x6, x1, 568, x2)
+
+inst_163:
+// rs1_val==-1431655766 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, -0x22222222, -0x55555556, 0x33333334, x1, 572, x2)
+
+inst_164:
+// rs1_val==-1431655766 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, -0x55555556, -0x55555556, 0x66666667, x1, 576, x2)
+
+inst_165:
+// rs1_val==-1431655766 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, -0x3049, -0x55555556, -0xb503, x1, 580, x2)
+
+inst_166:
+// rs1_val==-1431655766 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555556; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, -0xa8f5, -0x55555556, 0xb505, x1, 584, x2)
+
+inst_167:
+// rs1_val==5 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x5, 0x3, x1, 588, x2)
+
+inst_168:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0x55555555, x1, 592, x2)
+
+inst_169:
+// rs1_val==5 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, -0x55555556, x1, 596, x2)
+
+inst_170:
+// rs1_val==5 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x5, 0x5, x1, 600, x2)
+
+inst_171:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0x33333333, x1, 604, x2)
+
+inst_172:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0x66666666, x1, 608, x2)
+
+inst_173:
+// rs1_val==5 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, -0xb504, x1, 612, x2)
+
+inst_174:
+// rs1_val==5 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0xb504, x1, 616, x2)
+
+inst_175:
+// rs1_val==5 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x5, 0x2, x1, 620, x2)
+
+inst_176:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0x55555554, x1, 624, x2)
+
+inst_177:
+// rs1_val==5 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0x0, x1, 628, x2)
+
+inst_178:
+// rs1_val==5 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x5, 0x4, x1, 632, x2)
+
+inst_179:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0x33333332, x1, 636, x2)
+
+inst_180:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0x66666665, x1, 640, x2)
+
+inst_181:
+// rs1_val==5 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0xb503, x1, 644, x2)
+
+inst_182:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0x55555556, x1, 648, x2)
+
+inst_183:
+// rs1_val==5 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, -0x55555555, x1, 652, x2)
+
+inst_184:
+// rs1_val==5 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0x6, x1, 656, x2)
+
+inst_185:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0x33333334, x1, 660, x2)
+
+inst_186:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0x66666667, x1, 664, x2)
+
+inst_187:
+// rs1_val==5 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, -0xb503, x1, 668, x2)
+
+inst_188:
+// rs1_val==5 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x5, 0xb505, x1, 672, x2)
+
+inst_189:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x33333333, 0x3, x1, 676, x2)
+
+inst_190:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x33333333, 0x33333333, 0x55555555, x1, 680, x2)
+
+inst_191:
+// rs1_val==858993459 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x33333333, 0x33333333, -0x55555556, x1, 684, x2)
+
+inst_192:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x33333333, 0x5, x1, 688, x2)
+
+inst_193:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x33333333, 0x33333333, x1, 692, x2)
+
+inst_194:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x33333333, 0x33333333, 0x66666666, x1, 696, x2)
+
+inst_195:
+// rs1_val==858993459 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x8993, 0x33333333, -0xb504, x1, 700, x2)
+
+inst_196:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x8993, 0x33333333, 0xb504, x1, 704, x2)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x33333333, 0x2, x1, 708, x2)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x33333333, 0x33333333, 0x55555554, x1, 712, x2)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x33333333, 0x33333333, 0x0, x1, 716, x2)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x33333333, 0x4, x1, 720, x2)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x33333333, 0x33333332, x1, 724, x2)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x33333333, 0x33333333, 0x66666665, x1, 728, x2)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x1cf8, 0x33333333, 0xb503, x1, 732, x2)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x33333333, 0x33333333, 0x55555556, x1, 736, x2)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x33333333, 0x33333333, -0x55555555, x1, 740, x2)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x33333333, 0x6, x1, 744, x2)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x33333333, 0x33333333, 0x33333334, x1, 748, x2)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x33333333, 0x33333333, 0x66666667, x1, 752, x2)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x1cf8, 0x33333333, -0xb503, x1, 756, x2)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x412b, 0x33333333, 0xb505, x1, 760, x2)
+
+inst_211:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x66666666, 0x3, x1, 764, x2)
+
+inst_212:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x11111111, 0x66666666, 0x55555555, x1, 768, x2)
+
+inst_213:
+// rs1_val==1717986918 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x11111110, 0x66666666, -0x55555556, x1, 772, x2)
+
+inst_214:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x66666666, 0x5, x1, 776, x2)
+
+inst_215:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x66666666, 0x33333333, x1, 780, x2)
+
+inst_216:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x66666666, 0x66666666, x1, 784, x2)
+
+inst_217:
+// rs1_val==1717986918 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x5e22, 0x66666666, -0xb504, x1, 788, x2)
+
+inst_218:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x5e22, 0x66666666, 0xb504, x1, 792, x2)
+
+inst_219:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x66666666, 0x2, x1, 796, x2)
+
+inst_220:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x11111112, 0x66666666, 0x55555554, x1, 800, x2)
+
+inst_221:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x66666666, 0x66666666, 0x0, x1, 804, x2)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x66666666, 0x4, x1, 808, x2)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x66666666, 0x33333332, x1, 812, x2)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x66666666, 0x66666665, x1, 816, x2)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x39f0, 0x66666666, 0xb503, x1, 820, x2)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x11111110, 0x66666666, 0x55555556, x1, 824, x2)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x11111111, 0x66666666, -0x55555555, x1, 828, x2)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x66666666, 0x6, x1, 832, x2)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x33333332, 0x66666666, 0x33333334, x1, 836, x2)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x66666666, 0x66666666, 0x66666667, x1, 840, x2)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x39f0, 0x66666666, -0xb503, x1, 844, x2)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x8256, 0x66666666, 0xb505, x1, 848, x2)
+
+inst_233:
+// rs1_val==-46340 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, -0x2, -0xb504, 0x3, x1, 852, x2)
+
+inst_234:
+// rs1_val==-46340 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, -0xb504, -0xb504, 0x55555555, x1, 856, x2)
+
+inst_235:
+// rs1_val==-46340 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, -0xb504, -0xb504, -0x55555556, x1, 860, x2)
+
+inst_236:
+// rs1_val==-46340 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0xb504, 0x5, x1, 864, x2)
+
+inst_237:
+// rs1_val==-46340 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, -0xb504, -0xb504, 0x33333333, x1, 868, x2)
+
+inst_238:
+// rs1_val==-46340 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, -0xb504, -0xb504, 0x66666666, x1, 872, x2)
+
+inst_239:
+// rs1_val==-46340 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0xb504, -0xb504, x1, 876, x2)
+
+inst_240:
+// rs1_val==-46340 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0xb504, 0xb504, x1, 880, x2)
+
+inst_241:
+// rs1_val==-46340 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0xb504, 0x2, x1, 884, x2)
+
+inst_242:
+// rs1_val==-46340 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, -0xb504, -0xb504, 0x55555554, x1, 888, x2)
+
+inst_243:
+// rs1_val==-46340 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, -0xb504, -0xb504, 0x0, x1, 892, x2)
+
+inst_244:
+// rs1_val==-46340 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0xb504, 0x4, x1, 896, x2)
+
+inst_245:
+// rs1_val==-46340 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, -0xb504, -0xb504, 0x33333332, x1, 900, x2)
+
+inst_246:
+// rs1_val==-46340 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, -0xb504, -0xb504, 0x66666665, x1, 904, x2)
+
+inst_247:
+// rs1_val==-46340 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0xb504, 0xb503, x1, 908, x2)
+
+inst_248:
+// rs1_val==-46340 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, -0xb504, -0xb504, 0x55555556, x1, 912, x2)
+
+inst_249:
+// rs1_val==-46340 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, -0xb504, -0xb504, -0x55555555, x1, 916, x2)
+
+inst_250:
+// rs1_val==-46340 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, -0x2, -0xb504, 0x6, x1, 920, x2)
+
+inst_251:
+// rs1_val==-46340 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, -0xb504, -0xb504, 0x33333334, x1, 924, x2)
+
+inst_252:
+// rs1_val==-46340 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, -0xb504, -0xb504, 0x66666667, x1, 928, x2)
+
+inst_253:
+// rs1_val==-46340 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0xb504, -0xb503, x1, 932, x2)
+
+inst_254:
+// rs1_val==-46340 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb504; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, -0xb504, -0xb504, 0xb505, x1, 936, x2)
+
+inst_255:
+// rs1_val==46340 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0xb504, 0x3, x1, 940, x2)
+
+inst_256:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0xb504, 0xb504, 0x55555555, x1, 944, x2)
+
+inst_257:
+// rs1_val==46340 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0xb504, 0xb504, -0x55555556, x1, 948, x2)
+
+inst_258:
+// rs1_val==46340 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0xb504, 0x5, x1, 952, x2)
+
+inst_259:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0xb504, 0xb504, 0x33333333, x1, 956, x2)
+
+inst_260:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0xb504, 0xb504, 0x66666666, x1, 960, x2)
+
+inst_261:
+// rs1_val==46340 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0xb504, -0xb504, x1, 964, x2)
+
+inst_262:
+// rs1_val==46340 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0xb504, 0x2, x1, 968, x2)
+
+inst_263:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0xb504, 0xb504, 0x55555554, x1, 972, x2)
+
+inst_264:
+// rs1_val==46340 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0xb504, 0xb504, 0x0, x1, 976, x2)
+
+inst_265:
+// rs1_val==46340 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0xb504, 0x4, x1, 980, x2)
+
+inst_266:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0xb504, 0xb504, 0x33333332, x1, 984, x2)
+
+inst_267:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0xb504, 0xb504, 0x66666665, x1, 988, x2)
+
+inst_268:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0xb504, 0xb503, x1, 992, x2)
+
+inst_269:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0xb504, 0xb504, 0x55555556, x1, 996, x2)
+
+inst_270:
+// rs1_val==46340 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0xb504, 0xb504, -0x55555555, x1, 1000, x2)
+
+inst_271:
+// rs1_val==46340 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0xb504, 0x6, x1, 1004, x2)
+
+inst_272:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0xb504, 0xb504, 0x33333334, x1, 1008, x2)
+
+inst_273:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0xb504, 0xb504, 0x66666667, x1, 1012, x2)
+
+inst_274:
+// rs1_val==46340 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0xb504, -0xb503, x1, 1016, x2)
+
+inst_275:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0xb504, 0xb504, 0xb505, x1, 1020, x2)
+
+inst_276:
+// rs1_val==2 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x3, x1, 1024, x2)
+
+inst_277:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x55555555, x1, 1028, x2)
+
+inst_278:
+// rs1_val==2 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, -0x55555556, x1, 1032, x2)
+
+inst_279:
+// rs1_val==2 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x5, x1, 1036, x2)
+
+inst_280:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x33333333, x1, 1040, x2)
+
+inst_281:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x66666666, x1, 1044, x2)
+
+inst_282:
+// rs1_val==2 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, -0xb504, x1, 1048, x2)
+
+inst_283:
+// rs1_val==2 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0xb504, x1, 1052, x2)
+
+inst_284:
+// rs1_val==2 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x2, 0x2, x1, 1056, x2)
+
+inst_285:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x55555554, x1, 1060, x2)
+
+inst_286:
+// rs1_val==2 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x0, x1, 1064, x2)
+
+inst_287:
+// rs1_val==2 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x4, x1, 1068, x2)
+
+inst_288:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x33333332, x1, 1072, x2)
+
+inst_289:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x66666665, x1, 1076, x2)
+
+inst_290:
+// rs1_val==2 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0xb503, x1, 1080, x2)
+
+inst_291:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x55555556, x1, 1084, x2)
+
+inst_292:
+// rs1_val==2 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, -0x55555555, x1, 1088, x2)
+
+inst_293:
+// rs1_val==2 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x6, x1, 1092, x2)
+
+inst_294:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x33333334, x1, 1096, x2)
+
+inst_295:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0x66666667, x1, 1100, x2)
+
+inst_296:
+// rs1_val==2 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, -0xb503, x1, 1104, x2)
+
+inst_297:
+// rs1_val==2 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x2, 0xb505, x1, 1108, x2)
+
+inst_298:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x55555554, 0x3, x1, 1112, x2)
+
+inst_299:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x55555554, 0x55555554, 0x55555555, x1, 1116, x2)
+
+inst_300:
+// rs1_val==1431655764 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x55555554, 0x55555554, -0x55555556, x1, 1120, x2)
+
+inst_301:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x55555554, 0x5, x1, 1124, x2)
+
+inst_302:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x22222221, 0x55555554, 0x33333333, x1, 1128, x2)
+
+inst_303:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x55555554, 0x55555554, 0x66666666, x1, 1132, x2)
+
+inst_304:
+// rs1_val==1431655764 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x6c9c, 0x55555554, -0xb504, x1, 1136, x2)
+
+inst_305:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x6c9c, 0x55555554, 0xb504, x1, 1140, x2)
+
+inst_306:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x55555554, 0x2, x1, 1144, x2)
+
+inst_307:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x55555554, 0x55555554, x1, 1148, x2)
+
+inst_308:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x55555554, 0x55555554, 0x0, x1, 1152, x2)
+
+inst_309:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x55555554, 0x4, x1, 1156, x2)
+
+inst_310:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x22222222, 0x55555554, 0x33333332, x1, 1160, x2)
+
+inst_311:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x55555554, 0x55555554, 0x66666665, x1, 1164, x2)
+
+inst_312:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x3047, 0x55555554, 0xb503, x1, 1168, x2)
+
+inst_313:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x55555554, 0x55555554, 0x55555556, x1, 1172, x2)
+
+inst_314:
+// rs1_val==1431655764 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x55555554, 0x55555554, -0x55555555, x1, 1176, x2)
+
+inst_315:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x55555554, 0x6, x1, 1180, x2)
+
+inst_316:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x22222220, 0x55555554, 0x33333334, x1, 1184, x2)
+
+inst_317:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x55555554, 0x55555554, 0x66666667, x1, 1188, x2)
+
+inst_318:
+// rs1_val==1431655764 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x3047, 0x55555554, -0xb503, x1, 1192, x2)
+
+inst_319:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0xa8f3, 0x55555554, 0xb505, x1, 1196, x2)
+
+inst_320:
+// rs1_val==0 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x3, x1, 1200, x2)
+
+inst_321:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x55555555, x1, 1204, x2)
+
+inst_322:
+// rs1_val==0 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, -0x55555556, x1, 1208, x2)
+
+inst_323:
+// rs1_val==0 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x5, x1, 1212, x2)
+
+inst_324:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x33333333, x1, 1216, x2)
+
+inst_325:
+// rs1_val==0 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x66666666, x1, 1220, x2)
+
+inst_326:
+// rs1_val==0 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, -0xb504, x1, 1224, x2)
+
+inst_327:
+// rs1_val==-1431655765 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0x55555555, -0x55555555, x1, 1228, x2)
+
+inst_328:
+// rs1_val==-1431655765 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x55555555, 0x6, x1, 1232, x2)
+
+inst_329:
+// rs1_val==-1431655765 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, -0x22222221, -0x55555555, 0x33333334, x1, 1236, x2)
+
+inst_330:
+// rs1_val==-1431655765 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, -0x55555555, -0x55555555, 0x66666667, x1, 1240, x2)
+
+inst_331:
+// rs1_val==-1431655765 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, -0x3048, -0x55555555, -0xb503, x1, 1244, x2)
+
+inst_332:
+// rs1_val==-1431655765 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, -0xa8f4, -0x55555555, 0xb505, x1, 1248, x2)
+
+inst_333:
+// rs1_val==6 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x6, 0x3, x1, 1252, x2)
+
+inst_334:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, 0x55555555, x1, 1256, x2)
+
+inst_335:
+// rs1_val==6 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, -0x55555556, x1, 1260, x2)
+
+inst_336:
+// rs1_val==6 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x6, 0x5, x1, 1264, x2)
+
+inst_337:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, 0x33333333, x1, 1268, x2)
+
+inst_338:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, 0x66666666, x1, 1272, x2)
+
+inst_339:
+// rs1_val==6 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, -0xb504, x1, 1276, x2)
+
+inst_340:
+// rs1_val==6 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, 0xb504, x1, 1280, x2)
+
+inst_341:
+// rs1_val==6 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x6, 0x2, x1, 1284, x2)
+
+inst_342:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, 0x55555554, x1, 1288, x2)
+
+inst_343:
+// rs1_val==6 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, 0x0, x1, 1292, x2)
+
+inst_344:
+// rs1_val==6 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x6, 0x4, x1, 1296, x2)
+
+inst_345:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, 0x33333332, x1, 1300, x2)
+
+inst_346:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, 0x66666665, x1, 1304, x2)
+
+inst_347:
+// rs1_val==6 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, 0xb503, x1, 1308, x2)
+
+inst_348:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, 0x55555556, x1, 1312, x2)
+
+inst_349:
+// rs1_val==6 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, -0x55555555, x1, 1316, x2)
+
+inst_350:
+// rs1_val==6 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x6, 0x6, x1, 1320, x2)
+
+inst_351:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, 0x33333334, x1, 1324, x2)
+
+inst_352:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, 0x66666667, x1, 1328, x2)
+
+inst_353:
+// rs1_val==6 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, -0xb503, x1, 1332, x2)
+
+inst_354:
+// rs1_val==6 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x6, 0x6, 0xb505, x1, 1336, x2)
+
+inst_355:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x33333334, 0x3, x1, 1340, x2)
+
+inst_356:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x33333334, 0x33333334, 0x55555555, x1, 1344, x2)
+
+inst_357:
+// rs1_val==858993460 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x33333334, 0x33333334, -0x55555556, x1, 1348, x2)
+
+inst_358:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x33333334, 0x5, x1, 1352, x2)
+
+inst_359:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x33333334, 0x33333333, x1, 1356, x2)
+
+inst_360:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x33333334, 0x33333334, 0x66666666, x1, 1360, x2)
+
+inst_361:
+// rs1_val==858993460 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x8994, 0x33333334, -0xb504, x1, 1364, x2)
+
+inst_362:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x8994, 0x33333334, 0xb504, x1, 1368, x2)
+
+inst_363:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x33333334, 0x2, x1, 1372, x2)
+
+inst_364:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x33333334, 0x33333334, 0x55555554, x1, 1376, x2)
+
+inst_365:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x33333334, 0x33333334, 0x0, x1, 1380, x2)
+
+inst_366:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x33333334, 0x4, x1, 1384, x2)
+
+inst_367:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x33333334, 0x33333332, x1, 1388, x2)
+
+inst_368:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x33333334, 0x33333334, 0x66666665, x1, 1392, x2)
+
+inst_369:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x1cf9, 0x33333334, 0xb503, x1, 1396, x2)
+
+inst_370:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x33333334, 0x33333334, 0x55555556, x1, 1400, x2)
+
+inst_371:
+// rs1_val==858993460 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x33333334, 0x33333334, -0x55555555, x1, 1404, x2)
+
+inst_372:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x33333334, 0x6, x1, 1408, x2)
+
+inst_373:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x33333334, 0x33333334, x1, 1412, x2)
+
+inst_374:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x33333334, 0x33333334, 0x66666667, x1, 1416, x2)
+
+inst_375:
+// rs1_val==858993460 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x1cf9, 0x33333334, -0xb503, x1, 1420, x2)
+
+inst_376:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x412c, 0x33333334, 0xb505, x1, 1424, x2)
+
+inst_377:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x66666667, 0x3, x1, 1428, x2)
+
+inst_378:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x11111112, 0x66666667, 0x55555555, x1, 1432, x2)
+
+inst_379:
+// rs1_val==1717986919 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x11111111, 0x66666667, -0x55555556, x1, 1436, x2)
+
+inst_380:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x66666667, 0x5, x1, 1440, x2)
+
+inst_381:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x66666667, 0x33333333, x1, 1444, x2)
+
+inst_382:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x66666667, 0x66666666, x1, 1448, x2)
+
+inst_383:
+// rs1_val==1717986919 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x5e23, 0x66666667, -0xb504, x1, 1452, x2)
+
+inst_384:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x5e23, 0x66666667, 0xb504, x1, 1456, x2)
+
+inst_385:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x66666667, 0x2, x1, 1460, x2)
+
+inst_386:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x11111113, 0x66666667, 0x55555554, x1, 1464, x2)
+
+inst_387:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x66666667, 0x66666667, 0x0, x1, 1468, x2)
+
+inst_388:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x66666667, 0x4, x1, 1472, x2)
+
+inst_389:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x66666667, 0x33333332, x1, 1476, x2)
+
+inst_390:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x66666667, 0x66666665, x1, 1480, x2)
+
+inst_391:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x39f1, 0x66666667, 0xb503, x1, 1484, x2)
+
+inst_392:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x11111111, 0x66666667, 0x55555556, x1, 1488, x2)
+
+inst_393:
+// rs1_val==1717986919 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x11111112, 0x66666667, -0x55555555, x1, 1492, x2)
+
+inst_394:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x66666667, 0x6, x1, 1496, x2)
+
+inst_395:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x33333333, 0x66666667, 0x33333334, x1, 1500, x2)
+
+inst_396:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x66666667, 0x66666667, x1, 1504, x2)
+
+inst_397:
+// rs1_val==1717986919 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x39f1, 0x66666667, -0xb503, x1, 1508, x2)
+
+inst_398:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x8257, 0x66666667, 0xb505, x1, 1512, x2)
+
+inst_399:
+// rs1_val==-46339 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0xb503, 0x3, x1, 1516, x2)
+
+inst_400:
+// rs1_val==-46339 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, 0x55555555, x1, 1520, x2)
+
+inst_401:
+// rs1_val==-46339 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, -0x55555556, x1, 1524, x2)
+
+inst_402:
+// rs1_val==-46339 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, -0x4, -0xb503, 0x5, x1, 1528, x2)
+
+inst_403:
+// rs1_val==-46339 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, 0x33333333, x1, 1532, x2)
+
+inst_404:
+// rs1_val==-46339 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, 0x66666666, x1, 1536, x2)
+
+inst_405:
+// rs1_val==-46339 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, -0xb504, x1, 1540, x2)
+
+inst_406:
+// rs1_val==-46339 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, 0xb504, x1, 1544, x2)
+
+inst_407:
+// rs1_val==-46339 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0xb503, 0x2, x1, 1548, x2)
+
+inst_408:
+// rs1_val==-46339 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, 0x55555554, x1, 1552, x2)
+
+inst_409:
+// rs1_val==-46339 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, 0x0, x1, 1556, x2)
+
+inst_410:
+// rs1_val==-46339 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, -0x3, -0xb503, 0x4, x1, 1560, x2)
+
+inst_411:
+// rs1_val==-46339 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, 0x33333332, x1, 1564, x2)
+
+inst_412:
+// rs1_val==-46339 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, 0x66666665, x1, 1568, x2)
+
+inst_413:
+// rs1_val==-46339 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0xb503, 0xb503, x1, 1572, x2)
+
+inst_414:
+// rs1_val==-46339 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, 0x55555556, x1, 1576, x2)
+
+inst_415:
+// rs1_val==-46339 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, -0x55555555, x1, 1580, x2)
+
+inst_416:
+// rs1_val==-46339 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0xb503, 0x6, x1, 1584, x2)
+
+inst_417:
+// rs1_val==-46339 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, 0x33333334, x1, 1588, x2)
+
+inst_418:
+// rs1_val==-46339 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, 0x66666667, x1, 1592, x2)
+
+inst_419:
+// rs1_val==-46339 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0xb503, -0xb503, x1, 1596, x2)
+
+inst_420:
+// rs1_val==-46339 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, 0xb505, x1, 1600, x2)
+
+inst_421:
+// rs1_val==46341 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0xb505, 0x3, x1, 1604, x2)
+
+inst_422:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0xb505, 0xb505, 0x55555555, x1, 1608, x2)
+
+inst_423:
+// rs1_val==46341 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0xb505, 0xb505, -0x55555556, x1, 1612, x2)
+
+inst_424:
+// rs1_val==46341 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0xb505, 0x5, x1, 1616, x2)
+
+inst_425:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0xb505, 0xb505, 0x33333333, x1, 1620, x2)
+
+inst_426:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0xb505, 0xb505, 0x66666666, x1, 1624, x2)
+
+inst_427:
+// rs1_val==46341 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0xb505, -0xb504, x1, 1628, x2)
+
+inst_428:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0xb505, 0xb504, x1, 1632, x2)
+
+inst_429:
+// rs1_val==46341 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0xb505, 0x2, x1, 1636, x2)
+
+inst_430:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0xb505, 0xb505, 0x55555554, x1, 1640, x2)
+
+inst_431:
+// rs1_val==46341 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0xb505, 0xb505, 0x0, x1, 1644, x2)
+
+inst_432:
+// rs1_val==46341 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0xb505, 0x4, x1, 1648, x2)
+
+inst_433:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0xb505, 0xb505, 0x33333332, x1, 1652, x2)
+
+inst_434:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0xb505, 0xb505, 0x66666665, x1, 1656, x2)
+
+inst_435:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0xb505, 0xb503, x1, 1660, x2)
+
+inst_436:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0xb505, 0xb505, 0x55555556, x1, 1664, x2)
+
+inst_437:
+// rs1_val==46341 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0xb505, 0xb505, -0x55555555, x1, 1668, x2)
+
+inst_438:
+// rs1_val==46341 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0xb505, 0x6, x1, 1672, x2)
+
+inst_439:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0xb505, 0xb505, 0x33333334, x1, 1676, x2)
+
+inst_440:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0xb505, 0xb505, 0x66666667, x1, 1680, x2)
+
+inst_441:
+// rs1_val==46341 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0xb505, -0xb503, x1, 1684, x2)
+
+inst_442:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0xb505, 0xb505, x1, 1688, x2)
+
+inst_443:
+// rs1_val==0 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0xb504, x1, 1692, x2)
+
+inst_444:
+// rs1_val==0 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x2, x1, 1696, x2)
+
+inst_445:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x55555554, x1, 1700, x2)
+
+inst_446:
+// rs1_val==0 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x0, x1, 1704, x2)
+
+inst_447:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x33333332, x1, 1708, x2)
+
+inst_448:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x66666665, x1, 1712, x2)
+
+inst_449:
+// rs1_val==0 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0xb503, x1, 1716, x2)
+
+inst_450:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x55555556, x1, 1720, x2)
+
+inst_451:
+// rs1_val==0 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, -0x55555555, x1, 1724, x2)
+
+inst_452:
+// rs1_val==0 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x6, x1, 1728, x2)
+
+inst_453:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x33333334, x1, 1732, x2)
+
+inst_454:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0x66666667, x1, 1736, x2)
+
+inst_455:
+// rs1_val==0 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, -0xb503, x1, 1740, x2)
+
+inst_456:
+// rs1_val==0 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x0, 0xb505, x1, 1744, x2)
+
+inst_457:
+// rs1_val==4 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x4, 0x3, x1, 1748, x2)
+
+inst_458:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0x55555555, x1, 1752, x2)
+
+inst_459:
+// rs1_val==4 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, -0x55555556, x1, 1756, x2)
+
+inst_460:
+// rs1_val==4 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0x5, x1, 1760, x2)
+
+inst_461:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0x33333333, x1, 1764, x2)
+
+inst_462:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0x66666666, x1, 1768, x2)
+
+inst_463:
+// rs1_val==4 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, -0xb504, x1, 1772, x2)
+
+inst_464:
+// rs1_val==4 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0xb504, x1, 1776, x2)
+
+inst_465:
+// rs1_val==4 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x4, 0x2, x1, 1780, x2)
+
+inst_466:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0x55555554, x1, 1784, x2)
+
+inst_467:
+// rs1_val==4 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0x0, x1, 1788, x2)
+
+inst_468:
+// rs1_val==4 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x4, 0x4, x1, 1792, x2)
+
+inst_469:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0x33333332, x1, 1796, x2)
+
+inst_470:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0x66666665, x1, 1800, x2)
+
+inst_471:
+// rs1_val==4 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0xb503, x1, 1804, x2)
+
+inst_472:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0x55555556, x1, 1808, x2)
+
+inst_473:
+// rs1_val==4 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, -0x55555555, x1, 1812, x2)
+
+inst_474:
+// rs1_val==4 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0x6, x1, 1816, x2)
+
+inst_475:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0x33333334, x1, 1820, x2)
+
+inst_476:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0x66666667, x1, 1824, x2)
+
+inst_477:
+// rs1_val==4 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, -0xb503, x1, 1828, x2)
+
+inst_478:
+// rs1_val==4 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0x4, 0xb505, x1, 1832, x2)
+
+inst_479:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x33333332, 0x3, x1, 1836, x2)
+
+inst_480:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x33333332, 0x33333332, 0x55555555, x1, 1840, x2)
+
+inst_481:
+// rs1_val==858993458 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x33333332, 0x33333332, -0x55555556, x1, 1844, x2)
+
+inst_482:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0x33333332, 0x5, x1, 1848, x2)
+
+inst_483:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x33333332, 0x33333332, 0x33333333, x1, 1852, x2)
+
+inst_484:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x33333332, 0x33333332, 0x66666666, x1, 1856, x2)
+
+inst_485:
+// rs1_val==858993458 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x8992, 0x33333332, -0xb504, x1, 1860, x2)
+
+inst_486:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x8992, 0x33333332, 0xb504, x1, 1864, x2)
+
+inst_487:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x33333332, 0x2, x1, 1868, x2)
+
+inst_488:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x33333332, 0x33333332, 0x55555554, x1, 1872, x2)
+
+inst_489:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x33333332, 0x33333332, 0x0, x1, 1876, x2)
+
+inst_490:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x33333332, 0x4, x1, 1880, x2)
+
+inst_491:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x33333332, 0x33333332, x1, 1884, x2)
+
+inst_492:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x33333332, 0x33333332, 0x66666665, x1, 1888, x2)
+
+inst_493:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x1cf7, 0x33333332, 0xb503, x1, 1892, x2)
+
+inst_494:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x33333332, 0x33333332, 0x55555556, x1, 1896, x2)
+
+inst_495:
+// rs1_val==858993458 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x33333332, 0x33333332, -0x55555555, x1, 1900, x2)
+
+inst_496:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x33333332, 0x6, x1, 1904, x2)
+
+inst_497:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x33333332, 0x33333332, 0x33333334, x1, 1908, x2)
+
+inst_498:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x33333332, 0x33333332, 0x66666667, x1, 1912, x2)
+
+inst_499:
+// rs1_val==858993458 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x1cf7, 0x33333332, -0xb503, x1, 1916, x2)
+
+inst_500:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x412a, 0x33333332, 0xb505, x1, 1920, x2)
+
+inst_501:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x66666665, 0x3, x1, 1924, x2)
+
+inst_502:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x11111110, 0x66666665, 0x55555555, x1, 1928, x2)
+
+inst_503:
+// rs1_val==1717986917 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x1111110f, 0x66666665, -0x55555556, x1, 1932, x2)
+
+inst_504:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x66666665, 0x5, x1, 1936, x2)
+
+inst_505:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x33333332, 0x66666665, 0x33333333, x1, 1940, x2)
+
+inst_506:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x66666665, 0x66666665, 0x66666666, x1, 1944, x2)
+
+inst_507:
+// rs1_val==1717986917 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x5e21, 0x66666665, -0xb504, x1, 1948, x2)
+
+inst_508:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x5e21, 0x66666665, 0xb504, x1, 1952, x2)
+
+inst_509:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x66666665, 0x2, x1, 1956, x2)
+
+inst_510:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x11111111, 0x66666665, 0x55555554, x1, 1960, x2)
+
+inst_511:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x66666665, 0x66666665, 0x0, x1, 1964, x2)
+
+inst_512:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x66666665, 0x4, x1, 1968, x2)
+
+inst_513:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x66666665, 0x33333332, x1, 1972, x2)
+
+inst_514:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x66666665, 0x66666665, x1, 1976, x2)
+
+inst_515:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x39ef, 0x66666665, 0xb503, x1, 1980, x2)
+
+inst_516:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x1111110f, 0x66666665, 0x55555556, x1, 1984, x2)
+
+inst_517:
+// rs1_val==1717986917 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x11111110, 0x66666665, -0x55555555, x1, 1988, x2)
+
+inst_518:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0x66666665, 0x6, x1, 1992, x2)
+
+inst_519:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x33333331, 0x66666665, 0x33333334, x1, 1996, x2)
+
+inst_520:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x66666665, 0x66666665, 0x66666667, x1, 2000, x2)
+
+inst_521:
+// rs1_val==1717986917 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x39ef, 0x66666665, -0xb503, x1, 2004, x2)
+
+inst_522:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0x8255, 0x66666665, 0xb505, x1, 2008, x2)
+
+inst_523:
+// rs1_val==46339 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0xb503, 0x3, x1, 2012, x2)
+
+inst_524:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, 0x55555555, x1, 2016, x2)
+
+inst_525:
+// rs1_val==46339 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, -0x55555556, x1, 2020, x2)
+
+inst_526:
+// rs1_val==46339 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x4, 0xb503, 0x5, x1, 2024, x2)
+
+inst_527:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, 0x33333333, x1, 2028, x2)
+
+inst_528:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, 0x66666666, x1, 2032, x2)
+
+inst_529:
+// rs1_val==46339 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, -0xb504, x1, 2036, x2)
+
+inst_530:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, 0xb504, x1, 2040, x2)
+
+inst_531:
+// rs1_val==46339 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0xb503, 0x2, x1, 2044, x2)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_532:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, 0x55555554, x1, 0, x2)
+
+inst_533:
+// rs1_val==46339 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, 0x0, x1, 4, x2)
+
+inst_534:
+// rs1_val==46339 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x3, 0xb503, 0x4, x1, 8, x2)
+
+inst_535:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, 0x33333332, x1, 12, x2)
+
+inst_536:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, 0x66666665, x1, 16, x2)
+
+inst_537:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0xb503, 0xb503, x1, 20, x2)
+
+inst_538:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, 0x55555556, x1, 24, x2)
+
+inst_539:
+// rs1_val==46339 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, -0x55555555, x1, 28, x2)
+
+inst_540:
+// rs1_val==46339 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0xb503, 0x6, x1, 32, x2)
+
+inst_541:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, 0x33333334, x1, 36, x2)
+
+inst_542:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, 0x66666667, x1, 40, x2)
+
+inst_543:
+// rs1_val==46339 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0xb503, -0xb503, x1, 44, x2)
+
+inst_544:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0xb503, 0xb503, 0xb505, x1, 48, x2)
+
+inst_545:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x55555556, 0x3, x1, 52, x2)
+
+inst_546:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x55555556, 0x55555555, x1, 56, x2)
+
+inst_547:
+// rs1_val==1431655766 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x55555556, -0x55555556, x1, 60, x2)
+
+inst_548:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x55555556, 0x5, x1, 64, x2)
+
+inst_549:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, 0x22222223, 0x55555556, 0x33333333, x1, 68, x2)
+
+inst_550:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, 0x55555556, 0x55555556, 0x66666666, x1, 72, x2)
+
+inst_551:
+// rs1_val==1431655766 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x6c9e, 0x55555556, -0xb504, x1, 76, x2)
+
+inst_552:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, 0x6c9e, 0x55555556, 0xb504, x1, 80, x2)
+
+inst_553:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x55555556, 0x55555554, x1, 84, x2)
+
+inst_554:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, 0x55555556, 0x55555556, 0x0, x1, 88, x2)
+
+inst_555:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x55555556, 0x4, x1, 92, x2)
+
+inst_556:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, 0x22222224, 0x55555556, 0x33333332, x1, 96, x2)
+
+inst_557:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, 0x55555556, 0x55555556, 0x66666665, x1, 100, x2)
+
+inst_558:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x3049, 0x55555556, 0xb503, x1, 104, x2)
+
+inst_559:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, 0x0, 0x55555556, 0x55555556, x1, 108, x2)
+
+inst_560:
+// rs1_val==1431655766 and rs2_val==-1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x1, 0x55555556, -0x55555555, x1, 112, x2)
+
+inst_561:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(rem, x12, x10, x11, 0x2, 0x55555556, 0x6, x1, 116, x2)
+
+inst_562:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(rem, x12, x10, x11, 0x22222222, 0x55555556, 0x33333334, x1, 120, x2)
+
+inst_563:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(rem, x12, x10, x11, 0x55555556, 0x55555556, 0x66666667, x1, 124, x2)
+
+inst_564:
+// rs1_val==1431655766 and rs2_val==-46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:-0xb503
+TEST_RR_OP(rem, x12, x10, x11, 0x3049, 0x55555556, -0xb503, x1, 128, x2)
+
+inst_565:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(rem, x12, x10, x11, 0xa8f5, 0x55555556, 0xb505, x1, 132, x2)
+
+inst_566:
+// rs1_val==-1431655765 and rs2_val==3,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x3
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x55555555, 0x3, x1, 136, x2)
+
+inst_567:
+// rs1_val==-1431655765 and rs2_val==1431655765,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555555
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0x55555555, 0x55555555, x1, 140, x2)
+
+inst_568:
+// rs1_val==-1431655765 and rs2_val==-1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0x55555556
+TEST_RR_OP(rem, x12, x10, x11, -0x55555555, -0x55555555, -0x55555556, x1, 144, x2)
+
+inst_569:
+// rs1_val==-1431655765 and rs2_val==5,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x5
+TEST_RR_OP(rem, x12, x10, x11, 0x0, -0x55555555, 0x5, x1, 148, x2)
+
+inst_570:
+// rs1_val==-1431655765 and rs2_val==858993459,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333333
+TEST_RR_OP(rem, x12, x10, x11, -0x22222222, -0x55555555, 0x33333333, x1, 152, x2)
+
+inst_571:
+// rs1_val==-1431655765 and rs2_val==1717986918,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666666
+TEST_RR_OP(rem, x12, x10, x11, -0x55555555, -0x55555555, 0x66666666, x1, 156, x2)
+
+inst_572:
+// rs1_val==-1431655765 and rs2_val==-46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:-0xb504
+TEST_RR_OP(rem, x12, x10, x11, -0x6c9d, -0x55555555, -0xb504, x1, 160, x2)
+
+inst_573:
+// rs1_val==-1431655765 and rs2_val==46340,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb504
+TEST_RR_OP(rem, x12, x10, x11, -0x6c9d, -0x55555555, 0xb504, x1, 164, x2)
+
+inst_574:
+// rs1_val==-1431655765 and rs2_val==2,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x2
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x55555555, 0x2, x1, 168, x2)
+
+inst_575:
+// rs1_val==-1431655765 and rs2_val==1431655764,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555554
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x55555555, 0x55555554, x1, 172, x2)
+
+inst_576:
+// rs1_val==-1431655765 and rs2_val==0,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x0
+TEST_RR_OP(rem, x12, x10, x11, -0x55555555, -0x55555555, 0x0, x1, 176, x2)
+
+inst_577:
+// rs1_val==-1431655765 and rs2_val==4,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x4
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x55555555, 0x4, x1, 180, x2)
+
+inst_578:
+// rs1_val==-1431655765 and rs2_val==858993458,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x33333332
+TEST_RR_OP(rem, x12, x10, x11, -0x22222223, -0x55555555, 0x33333332, x1, 184, x2)
+
+inst_579:
+// rs1_val==-1431655765 and rs2_val==1717986917,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x66666665
+TEST_RR_OP(rem, x12, x10, x11, -0x55555555, -0x55555555, 0x66666665, x1, 188, x2)
+
+inst_580:
+// rs1_val==-1431655765 and rs2_val==46339,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0xb503
+TEST_RR_OP(rem, x12, x10, x11, -0x3048, -0x55555555, 0xb503, x1, 192, x2)
+
+inst_581:
+// rs1_val==-1431655765 and rs2_val==1431655766,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x55555555; op2val:0x55555556
+TEST_RR_OP(rem, x12, x10, x11, -0x55555555, -0x55555555, 0x55555556, x1, 196, x2)
+
+inst_582:
+// rs1_val > 0 and rs2_val < 0, rs2_val == -4194305, rs1_val == 64
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:-0x400001
+TEST_RR_OP(rem, x12, x10, x11, 0x40, 0x40, -0x400001, x1, 200, x2)
+
+inst_583:
+// rs1_val < 0 and rs2_val < 0, rs1_val == -65
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:-0x8
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x41, -0x8, x1, 204, x2)
+
+inst_584:
+// rs2_val == (2**(xlen-1)-1), rs2_val == 2147483647
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0xb503; op2val:0x7fffffff
+TEST_RR_OP(rem, x12, x10, x11, -0xb503, -0xb503, 0x7fffffff, x1, 208, x2)
+
+inst_585:
+// rs2_val == 8,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x8
+TEST_RR_OP(rem, x12, x10, x11, 0x5, 0xb505, 0x8, x1, 212, x2)
+
+inst_586:
+// rs2_val == 2048,
+// opcode: rem ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x800
+TEST_RR_OP(rem, x12, x10, x11, -0x1, -0x4001, 0x800, x1, 216, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x26_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x26_1:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 55*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/M/remu-01.S b/riscof/suite/rv32i_m/M/remu-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..e90f48f2c6515ef35c821cd35fc7ea7689caf447
--- /dev/null
+++ b/riscof/suite/rv32i_m/M/remu-01.S
@@ -0,0 +1,3699 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:41:59 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32im.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the remu instruction of the RISC-V M extension for the remu covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32IM")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*M.*);def TEST_CASE_1=True;",remu)
+
+RVTEST_SIGBASE( x19,signature_x19_1)
+
+inst_0:
+// rs1 == rd != rs2, rs1==x7, rs2==x21, rd==x7, rs1_val > 0 and rs2_val > 0, rs1_val != rs2_val and rs1_val > 0 and rs2_val > 0, rs1_val == 4294443007, rs2_val == 3221225471
+// opcode: remu ; op1:x7; op2:x21; dest:x7; op1val:0xfff7ffff; op2val:0xbfffffff
+TEST_RR_OP(remu, x7, x7, x21, 0x3ff80000, 0xfff7ffff, 0xbfffffff, x19, 0, x23)
+
+inst_1:
+// rs1 == rs2 != rd, rs1==x9, rs2==x9, rd==x30, rs1_val == rs2_val and rs1_val > 0 and rs2_val > 0, rs1_val == 8388608, rs2_val == 8388608
+// opcode: remu ; op1:x9; op2:x9; dest:x30; op1val:0x800000; op2val:0x800000
+TEST_RR_OP(remu, x30, x9, x9, 0x0, 0x800000, 0x800000, x19, 4, x23)
+
+inst_2:
+// rs2 == rd != rs1, rs1==x26, rs2==x6, rd==x6, rs2_val == 0, rs1_val == 4294966271
+// opcode: remu ; op1:x26; op2:x6; dest:x6; op1val:0xfffffbff; op2val:0x0
+TEST_RR_OP(remu, x6, x26, x6, 0xfffffbff, 0xfffffbff, 0x0, x19, 8, x23)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x17, rs2==x2, rd==x25, rs2_val == (2**(xlen)-1), rs1_val == 1024
+// opcode: remu ; op1:x17; op2:x2; dest:x25; op1val:0x400; op2val:0xffffffff
+TEST_RR_OP(remu, x25, x17, x2, 0x400, 0x400, 0xffffffff, x19, 12, x23)
+
+inst_4:
+// rs1 == rs2 == rd, rs1==x16, rs2==x16, rd==x16, rs2_val == 1, rs1_val == 2863311530, rs1_val==2863311530 and rs2_val==1
+// opcode: remu ; op1:x16; op2:x16; dest:x16; op1val:0xaaaaaaaa; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x16, x16, x16, 0x0, 0xaaaaaaaa, 0xaaaaaaaa, x19, 16, x23)
+
+inst_5:
+// rs1==x2, rs2==x1, rd==x5, rs1_val == 0, rs1_val==0 and rs2_val==1717986918
+// opcode: remu ; op1:x2; op2:x1; dest:x5; op1val:0x0; op2val:0x66666666
+TEST_RR_OP(remu, x5, x2, x1, 0x0, 0x0, 0x66666666, x19, 20, x23)
+
+inst_6:
+// rs1==x1, rs2==x26, rd==x15, rs1_val == (2**(xlen)-1), rs2_val == 4294967291
+// opcode: remu ; op1:x1; op2:x26; dest:x15; op1val:0xffffffff; op2val:0xfffffffb
+TEST_RR_OP(remu, x15, x1, x26, 0x4, 0xffffffff, 0xfffffffb, x19, 24, x23)
+
+inst_7:
+// rs1==x29, rs2==x15, rd==x0, rs1_val == 1, rs2_val == 4294934527
+// opcode: remu ; op1:x29; op2:x15; dest:x0; op1val:0x1; op2val:0xffff7fff
+TEST_RR_OP(remu, x0, x29, x15, 0, 0x1, 0xffff7fff, x19, 28, x23)
+
+inst_8:
+// rs1==x15, rs2==x31, rd==x28, rs2_val == 2, rs1_val == 4096
+// opcode: remu ; op1:x15; op2:x31; dest:x28; op1val:0x1000; op2val:0x2
+TEST_RR_OP(remu, x28, x15, x31, 0x0, 0x1000, 0x2, x19, 32, x23)
+
+inst_9:
+// rs1==x3, rs2==x7, rd==x21, rs2_val == 4, rs1_val == 536870912
+// opcode: remu ; op1:x3; op2:x7; dest:x21; op1val:0x20000000; op2val:0x4
+TEST_RR_OP(remu, x21, x3, x7, 0x0, 0x20000000, 0x4, x19, 36, x23)
+
+inst_10:
+// rs1==x5, rs2==x11, rd==x20, rs2_val == 8,
+// opcode: remu ; op1:x5; op2:x11; dest:x20; op1val:0xd; op2val:0x8
+TEST_RR_OP(remu, x20, x5, x11, 0x5, 0xd, 0x8, x19, 40, x23)
+
+inst_11:
+// rs1==x30, rs2==x8, rd==x31, rs2_val == 16,
+// opcode: remu ; op1:x30; op2:x8; dest:x31; op1val:0x6; op2val:0x10
+TEST_RR_OP(remu, x31, x30, x8, 0x6, 0x6, 0x10, x19, 44, x23)
+
+inst_12:
+// rs1==x12, rs2==x5, rd==x9, rs2_val == 32,
+// opcode: remu ; op1:x12; op2:x5; dest:x9; op1val:0xf; op2val:0x20
+TEST_RR_OP(remu, x9, x12, x5, 0xf, 0xf, 0x20, x19, 48, x23)
+
+inst_13:
+// rs1==x31, rs2==x4, rd==x11, rs2_val == 64, rs1_val == 4286578687
+// opcode: remu ; op1:x31; op2:x4; dest:x11; op1val:0xff7fffff; op2val:0x40
+TEST_RR_OP(remu, x11, x31, x4, 0x3f, 0xff7fffff, 0x40, x19, 52, x23)
+
+inst_14:
+// rs1==x27, rs2==x10, rd==x14, rs2_val == 128, rs1_val == 64
+// opcode: remu ; op1:x27; op2:x10; dest:x14; op1val:0x40; op2val:0x80
+TEST_RR_OP(remu, x14, x27, x10, 0x40, 0x40, 0x80, x19, 56, x23)
+
+inst_15:
+// rs1==x25, rs2==x14, rd==x13, rs2_val == 256, rs1_val == 256
+// opcode: remu ; op1:x25; op2:x14; dest:x13; op1val:0x100; op2val:0x100
+TEST_RR_OP(remu, x13, x25, x14, 0x0, 0x100, 0x100, x19, 60, x23)
+
+inst_16:
+// rs1==x18, rs2==x0, rd==x22, rs2_val == 512,
+// opcode: remu ; op1:x18; op2:x0; dest:x22; op1val:0xa; op2val:0x0
+TEST_RR_OP(remu, x22, x18, x0, 0xa, 0xa, 0x0, x19, 64, x23)
+RVTEST_SIGBASE( x5,signature_x5_0)
+
+inst_17:
+// rs1==x22, rs2==x12, rd==x3, rs2_val == 1024,
+// opcode: remu ; op1:x22; op2:x12; dest:x3; op1val:0xb503; op2val:0x400
+TEST_RR_OP(remu, x3, x22, x12, 0x103, 0xb503, 0x400, x5, 0, x7)
+
+inst_18:
+// rs1==x19, rs2==x3, rd==x24, rs2_val == 2048, rs1_val == 4294967291
+// opcode: remu ; op1:x19; op2:x3; dest:x24; op1val:0xfffffffb; op2val:0x800
+TEST_RR_OP(remu, x24, x19, x3, 0x7fb, 0xfffffffb, 0x800, x5, 4, x7)
+
+inst_19:
+// rs1==x0, rs2==x17, rd==x19, rs2_val == 4096, rs1_val == 4294901759
+// opcode: remu ; op1:x0; op2:x17; dest:x19; op1val:0x0; op2val:0x1000
+TEST_RR_OP(remu, x19, x0, x17, 0x0, 0x0, 0x1000, x5, 8, x7)
+
+inst_20:
+// rs1==x11, rs2==x28, rd==x23, rs2_val == 8192,
+// opcode: remu ; op1:x11; op2:x28; dest:x23; op1val:0x1000; op2val:0x2000
+TEST_RR_OP(remu, x23, x11, x28, 0x1000, 0x1000, 0x2000, x5, 12, x7)
+
+inst_21:
+// rs1==x20, rs2==x27, rd==x18, rs2_val == 16384, rs1_val == 262144
+// opcode: remu ; op1:x20; op2:x27; dest:x18; op1val:0x40000; op2val:0x4000
+TEST_RR_OP(remu, x18, x20, x27, 0x0, 0x40000, 0x4000, x5, 16, x7)
+
+inst_22:
+// rs1==x14, rs2==x13, rd==x1, rs2_val == 32768, rs1_val == 2048
+// opcode: remu ; op1:x14; op2:x13; dest:x1; op1val:0x800; op2val:0x8000
+TEST_RR_OP(remu, x1, x14, x13, 0x800, 0x800, 0x8000, x5, 20, x7)
+
+inst_23:
+// rs1==x6, rs2==x30, rd==x26, rs2_val == 65536, rs1_val == 268435456
+// opcode: remu ; op1:x6; op2:x30; dest:x26; op1val:0x10000000; op2val:0x10000
+TEST_RR_OP(remu, x26, x6, x30, 0x0, 0x10000000, 0x10000, x5, 24, x7)
+
+inst_24:
+// rs1==x23, rs2==x20, rd==x12, rs2_val == 131072, rs1_val == 4
+// opcode: remu ; op1:x23; op2:x20; dest:x12; op1val:0x4; op2val:0x20000
+TEST_RR_OP(remu, x12, x23, x20, 0x4, 0x4, 0x20000, x5, 28, x7)
+
+inst_25:
+// rs1==x13, rs2==x29, rd==x2, rs2_val == 262144, rs1_val == 2097152
+// opcode: remu ; op1:x13; op2:x29; dest:x2; op1val:0x200000; op2val:0x40000
+TEST_RR_OP(remu, x2, x13, x29, 0x0, 0x200000, 0x40000, x5, 32, x7)
+
+inst_26:
+// rs1==x28, rs2==x25, rd==x8, rs2_val == 524288,
+// opcode: remu ; op1:x28; op2:x25; dest:x8; op1val:0x40; op2val:0x80000
+TEST_RR_OP(remu, x8, x28, x25, 0x40, 0x40, 0x80000, x5, 36, x7)
+
+inst_27:
+// rs1==x24, rs2==x23, rd==x17, rs2_val == 1048576,
+// opcode: remu ; op1:x24; op2:x23; dest:x17; op1val:0x0; op2val:0x100000
+TEST_RR_OP(remu, x17, x24, x23, 0x0, 0x0, 0x100000, x5, 40, x7)
+
+inst_28:
+// rs1==x10, rs2==x18, rd==x29, rs2_val == 2097152,
+// opcode: remu ; op1:x10; op2:x18; dest:x29; op1val:0x55555554; op2val:0x200000
+TEST_RR_OP(remu, x29, x10, x18, 0x155554, 0x55555554, 0x200000, x5, 44, x7)
+
+inst_29:
+// rs1==x21, rs2==x24, rd==x27, rs2_val == 4194304, rs1_val == 4294967294
+// opcode: remu ; op1:x21; op2:x24; dest:x27; op1val:0xfffffffe; op2val:0x400000
+TEST_RR_OP(remu, x27, x21, x24, 0x3ffffe, 0xfffffffe, 0x400000, x5, 48, x7)
+
+inst_30:
+// rs1==x4, rs2==x19, rd==x10, rs2_val == 16777216, rs1_val == 32
+// opcode: remu ; op1:x4; op2:x19; dest:x10; op1val:0x20; op2val:0x1000000
+TEST_RR_OP(remu, x10, x4, x19, 0x20, 0x20, 0x1000000, x5, 52, x7)
+
+inst_31:
+// rs1==x8, rs2==x22, rd==x4, rs2_val == 33554432,
+// opcode: remu ; op1:x8; op2:x22; dest:x4; op1val:0x0; op2val:0x2000000
+TEST_RR_OP(remu, x4, x8, x22, 0x0, 0x0, 0x2000000, x5, 56, x7)
+
+inst_32:
+// rs2_val == 67108864,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x4000000
+TEST_RR_OP(remu, x12, x10, x11, 0x2aaaaaa, 0xaaaaaaaa, 0x4000000, x5, 60, x7)
+
+inst_33:
+// rs2_val == 134217728, rs1_val == 4294934527
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff7fff; op2val:0x8000000
+TEST_RR_OP(remu, x12, x10, x11, 0x7ff7fff, 0xffff7fff, 0x8000000, x5, 64, x7)
+
+inst_34:
+// rs2_val == 268435456, rs1_val == 4261412863
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfdffffff; op2val:0x10000000
+TEST_RR_OP(remu, x12, x10, x11, 0xdffffff, 0xfdffffff, 0x10000000, x5, 68, x7)
+
+inst_35:
+// rs2_val == 536870912, rs1_val == 4160749567
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xf7ffffff; op2val:0x20000000
+TEST_RR_OP(remu, x12, x10, x11, 0x17ffffff, 0xf7ffffff, 0x20000000, x5, 72, x7)
+
+inst_36:
+// rs2_val == 1073741824,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x40000000
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x40000000, x5, 76, x7)
+
+inst_37:
+// rs2_val == 2147483648,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb; op2val:0x80000000
+TEST_RR_OP(remu, x12, x10, x11, 0xb, 0xb, 0x80000000, x5, 80, x7)
+
+inst_38:
+// rs2_val == 4294967294, rs1_val == 524288
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0xfffffffe
+TEST_RR_OP(remu, x12, x10, x11, 0x80000, 0x80000, 0xfffffffe, x5, 84, x7)
+
+inst_39:
+// rs2_val == 4294967293, rs1_val == 4294967231
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffbf; op2val:0xfffffffd
+TEST_RR_OP(remu, x12, x10, x11, 0xffffffbf, 0xffffffbf, 0xfffffffd, x5, 88, x7)
+
+inst_40:
+// rs2_val == 4294967287, rs1_val == 4290772991
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffbfffff; op2val:0xfffffff7
+TEST_RR_OP(remu, x12, x10, x11, 0xffbfffff, 0xffbfffff, 0xfffffff7, x5, 92, x7)
+
+inst_41:
+// rs2_val == 4294967279, rs1_val == 4026531839
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xefffffff; op2val:0xffffffef
+TEST_RR_OP(remu, x12, x10, x11, 0xefffffff, 0xefffffff, 0xffffffef, x5, 96, x7)
+
+inst_42:
+// rs2_val == 4294967263, rs1_val == 2147483647
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffff; op2val:0xffffffdf
+TEST_RR_OP(remu, x12, x10, x11, 0x7fffffff, 0x7fffffff, 0xffffffdf, x5, 100, x7)
+
+inst_43:
+// rs2_val == 4294967231, rs1_val == 2
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xffffffbf
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0xffffffbf, x5, 104, x7)
+
+inst_44:
+// rs2_val == 4294967167, rs1_val == 1048576
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0xffffff7f
+TEST_RR_OP(remu, x12, x10, x11, 0x100000, 0x100000, 0xffffff7f, x5, 108, x7)
+
+inst_45:
+// rs2_val == 4294967039, rs1_val == 4292870143
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffdfffff; op2val:0xfffffeff
+TEST_RR_OP(remu, x12, x10, x11, 0xffdfffff, 0xffdfffff, 0xfffffeff, x5, 112, x7)
+
+inst_46:
+// rs2_val == 4294966783,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xfffffdff
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0xfffffdff, x5, 116, x7)
+
+inst_47:
+// rs2_val == 4294966271,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xefffffff; op2val:0xfffffbff
+TEST_RR_OP(remu, x12, x10, x11, 0xefffffff, 0xefffffff, 0xfffffbff, x5, 120, x7)
+
+inst_48:
+// rs2_val == 4294965247, rs1_val == 3221225471
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xbfffffff; op2val:0xfffff7ff
+TEST_RR_OP(remu, x12, x10, x11, 0xbfffffff, 0xbfffffff, 0xfffff7ff, x5, 124, x7)
+
+inst_49:
+// rs2_val == 4294963199,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:0xffffefff
+TEST_RR_OP(remu, x12, x10, x11, 0x400, 0x400, 0xffffefff, x5, 128, x7)
+
+inst_50:
+// rs2_val == 4294959103,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xffffdfff
+TEST_RR_OP(remu, x12, x10, x11, 0x33333334, 0x33333334, 0xffffdfff, x5, 132, x7)
+
+inst_51:
+// rs2_val == 4294950911,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xffffbfff
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0xffffbfff, x5, 136, x7)
+
+inst_52:
+// rs2_val == 4294901759,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xfffeffff
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0xfffeffff, x5, 140, x7)
+
+inst_53:
+// rs2_val == 4294836223, rs1_val == 8192
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0xfffdffff
+TEST_RR_OP(remu, x12, x10, x11, 0x2000, 0x2000, 0xfffdffff, x5, 144, x7)
+
+inst_54:
+// rs2_val == 4294705151,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xfffbffff
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0xfffbffff, x5, 148, x7)
+
+inst_55:
+// rs2_val == 4294443007,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xfff7ffff
+TEST_RR_OP(remu, x12, x10, x11, 0x66666666, 0x66666666, 0xfff7ffff, x5, 152, x7)
+
+inst_56:
+// rs2_val == 4293918719,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0xffefffff
+TEST_RR_OP(remu, x12, x10, x11, 0x40000, 0x40000, 0xffefffff, x5, 156, x7)
+
+inst_57:
+// rs2_val == 4292870143,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x12; op2val:0xffdfffff
+TEST_RR_OP(remu, x12, x10, x11, 0x12, 0x12, 0xffdfffff, x5, 160, x7)
+
+inst_58:
+// rs2_val == 4290772991, rs1_val == 4293918719
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffefffff; op2val:0xffbfffff
+TEST_RR_OP(remu, x12, x10, x11, 0x300000, 0xffefffff, 0xffbfffff, x5, 164, x7)
+
+inst_59:
+// rs2_val == 4286578687, rs1_val == 8
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0xff7fffff
+TEST_RR_OP(remu, x12, x10, x11, 0x8, 0x8, 0xff7fffff, x5, 168, x7)
+
+inst_60:
+// rs2_val == 4278190079,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0xfeffffff
+TEST_RR_OP(remu, x12, x10, x11, 0x10000000, 0x10000000, 0xfeffffff, x5, 172, x7)
+
+inst_61:
+// rs2_val == 4261412863, rs1_val == 2147483648
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0xfdffffff
+TEST_RR_OP(remu, x12, x10, x11, 0x80000000, 0x80000000, 0xfdffffff, x5, 176, x7)
+
+inst_62:
+// rs2_val == 4227858431,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xfbffffff
+TEST_RR_OP(remu, x12, x10, x11, 0x66666665, 0x66666665, 0xfbffffff, x5, 180, x7)
+
+inst_63:
+// rs2_val == 4160749567, rs1_val == 67108864
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0xf7ffffff
+TEST_RR_OP(remu, x12, x10, x11, 0x4000000, 0x4000000, 0xf7ffffff, x5, 184, x7)
+
+inst_64:
+// rs2_val == 4026531839,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0xefffffff
+TEST_RR_OP(remu, x12, x10, x11, 0x80000, 0x80000, 0xefffffff, x5, 188, x7)
+
+inst_65:
+// rs2_val == 3758096383,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xdfffffff
+TEST_RR_OP(remu, x12, x10, x11, 0xaaaaaaab, 0xaaaaaaab, 0xdfffffff, x5, 192, x7)
+
+inst_66:
+// rs2_val == 2147483647,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x12; op2val:0x7fffffff
+TEST_RR_OP(remu, x12, x10, x11, 0x12, 0x12, 0x7fffffff, x5, 196, x7)
+
+inst_67:
+// rs2_val == 1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x80000, 0x80000, 0x55555555, x5, 200, x7)
+
+inst_68:
+// rs2_val == 2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x100000, 0x100000, 0xaaaaaaaa, x5, 204, x7)
+
+inst_69:
+// rs1_val == 16,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x20000000
+TEST_RR_OP(remu, x12, x10, x11, 0x10, 0x10, 0x20000000, x5, 208, x7)
+
+inst_70:
+// rs1_val == 128,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0xffffffff
+TEST_RR_OP(remu, x12, x10, x11, 0x80, 0x80, 0xffffffff, x5, 212, x7)
+
+inst_71:
+// rs1_val == 512,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x200, 0x4, x5, 216, x7)
+
+inst_72:
+// rs1_val == 16384,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:0xffffdfff
+TEST_RR_OP(remu, x12, x10, x11, 0x4000, 0x4000, 0xffffdfff, x5, 220, x7)
+
+inst_73:
+// rs1_val == 32768,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:0xdfffffff
+TEST_RR_OP(remu, x12, x10, x11, 0x8000, 0x8000, 0xdfffffff, x5, 224, x7)
+
+inst_74:
+// rs1_val == 65536, rs1_val==65536 and rs2_val==858993460
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x10000, 0x10000, 0x33333334, x5, 228, x7)
+
+inst_75:
+// rs1_val == 131072,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x20000, 0x10000, x5, 232, x7)
+
+inst_76:
+// rs1_val == 4194304,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0xe
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x400000, 0xe, x5, 236, x7)
+
+inst_77:
+// rs1_val == 16777216,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0xf
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1000000, 0xf, x5, 240, x7)
+
+inst_78:
+// rs1_val == 33554432,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0xffffefff
+TEST_RR_OP(remu, x12, x10, x11, 0x2000000, 0x2000000, 0xffffefff, x5, 244, x7)
+
+inst_79:
+// rs1_val == 134217728,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x8000000, 0x4, x5, 248, x7)
+
+inst_80:
+// rs1_val == 1073741824,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x40000000, 0x4, x5, 252, x7)
+
+inst_81:
+// rs1_val == 4294967293,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffd; op2val:0xfffffbff
+TEST_RR_OP(remu, x12, x10, x11, 0x3fe, 0xfffffffd, 0xfffffbff, x5, 256, x7)
+
+inst_82:
+// rs1_val == 4294967287,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffff7; op2val:0xdfffffff
+TEST_RR_OP(remu, x12, x10, x11, 0x1ffffff8, 0xfffffff7, 0xdfffffff, x5, 260, x7)
+
+inst_83:
+// rs1_val == 4294967279,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffef; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x55555545, 0xffffffef, 0x55555555, x5, 264, x7)
+
+inst_84:
+// rs1_val == 4294967263,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffdf; op2val:0xffdfffff
+TEST_RR_OP(remu, x12, x10, x11, 0x1fffe0, 0xffffffdf, 0xffdfffff, x5, 268, x7)
+
+inst_85:
+// rs1_val == 4294967167,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffffff7f; op2val:0x1000000
+TEST_RR_OP(remu, x12, x10, x11, 0xffff7f, 0xffffff7f, 0x1000000, x5, 272, x7)
+
+inst_86:
+// rs1_val == 4294967039,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffeff; op2val:0x4000000
+TEST_RR_OP(remu, x12, x10, x11, 0x3fffeff, 0xfffffeff, 0x4000000, x5, 276, x7)
+
+inst_87:
+// rs1_val == 4294966783,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffdff; op2val:0xfeffffff
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe00, 0xfffffdff, 0xfeffffff, x5, 280, x7)
+
+inst_88:
+// rs1_val == 4294965247,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffff7ff; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xfffff7ff, 0x6, x5, 284, x7)
+
+inst_89:
+// rs1_val == 4294963199,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffffefff; op2val:0xfffdffff
+TEST_RR_OP(remu, x12, x10, x11, 0x1f000, 0xffffefff, 0xfffdffff, x5, 288, x7)
+
+inst_90:
+// rs1_val == 4294959103,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffffdfff; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x33331331, 0xffffdfff, 0x66666667, x5, 292, x7)
+
+inst_91:
+// rs1_val == 4294950911,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffffbfff; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x3332f335, 0xffffbfff, 0x66666665, x5, 296, x7)
+
+inst_92:
+// rs1_val == 4294836223,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffdffff; op2val:0x4000000
+TEST_RR_OP(remu, x12, x10, x11, 0x3fdffff, 0xfffdffff, 0x4000000, x5, 300, x7)
+
+inst_93:
+// rs1_val == 4294705151,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffbffff; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x55515556, 0xfffbffff, 0xaaaaaaa9, x5, 304, x7)
+
+inst_94:
+// rs1_val == 4278190079,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfeffffff; op2val:0x80000000
+TEST_RR_OP(remu, x12, x10, x11, 0x7effffff, 0xfeffffff, 0x80000000, x5, 308, x7)
+
+inst_95:
+// rs1_val == 4227858431,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfbffffff; op2val:0xa
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xfbffffff, 0xa, x5, 312, x7)
+
+inst_96:
+// rs1_val == 3758096383,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xdfffffff; op2val:0x200
+TEST_RR_OP(remu, x12, x10, x11, 0x1ff, 0xdfffffff, 0x200, x5, 316, x7)
+
+inst_97:
+// rs1_val == 1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x200000
+TEST_RR_OP(remu, x12, x10, x11, 0x155555, 0x55555555, 0x200000, x5, 320, x7)
+
+inst_98:
+// rs1_val==3 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x3, 0x3, x5, 324, x7)
+
+inst_99:
+// rs1_val==3 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x55555555, x5, 328, x7)
+
+inst_100:
+// rs1_val==3 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0xaaaaaaaa, x5, 332, x7)
+
+inst_101:
+// rs1_val==3 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x5, x5, 336, x7)
+
+inst_102:
+// rs1_val==3 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x33333333, x5, 340, x7)
+
+inst_103:
+// rs1_val==3 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x66666666, x5, 344, x7)
+
+inst_104:
+// rs1_val==3 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0xb504, x5, 348, x7)
+
+inst_105:
+// rs1_val==3 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x0, x5, 352, x7)
+
+inst_106:
+// rs1_val==3 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0xffff, x5, 356, x7)
+
+inst_107:
+// rs1_val==3 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x3, 0x2, x5, 360, x7)
+
+inst_108:
+// rs1_val==3 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x55555554, x5, 364, x7)
+
+inst_109:
+// rs1_val==3 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0xaaaaaaa9, x5, 368, x7)
+
+inst_110:
+// rs1_val==3 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x4, x5, 372, x7)
+
+inst_111:
+// rs1_val==3 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x33333332, x5, 376, x7)
+
+inst_112:
+// rs1_val==3 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x66666665, x5, 380, x7)
+
+inst_113:
+// rs1_val==3 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0xb503, x5, 384, x7)
+
+inst_114:
+// rs1_val==3 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0xfffe, x5, 388, x7)
+
+inst_115:
+// rs1_val==3 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x55555556, x5, 392, x7)
+
+inst_116:
+// rs1_val==3 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0xaaaaaaab, x5, 396, x7)
+
+inst_117:
+// rs1_val==3 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x6, x5, 400, x7)
+
+inst_118:
+// rs1_val==3 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x33333334, x5, 404, x7)
+
+inst_119:
+// rs1_val==3 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x66666667, x5, 408, x7)
+
+inst_120:
+// rs1_val==3 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0xb505, x5, 412, x7)
+
+inst_121:
+// rs1_val==3 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x3, 0x1, x5, 416, x7)
+
+inst_122:
+// rs1_val==3 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x3, 0x10000, x5, 420, x7)
+
+inst_123:
+// rs1_val==1431655765 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x55555555, 0x3, x5, 424, x7)
+
+inst_124:
+// rs1_val==1431655765 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x55555555, 0x55555555, x5, 428, x7)
+
+inst_125:
+// rs1_val==1431655765 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x55555555, 0x55555555, 0xaaaaaaaa, x5, 432, x7)
+
+inst_126:
+// rs1_val==1431655765 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x55555555, 0x5, x5, 436, x7)
+
+inst_127:
+// rs1_val==1431655765 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x22222222, 0x55555555, 0x33333333, x5, 440, x7)
+
+inst_128:
+// rs1_val==1431655765 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x55555555, 0x55555555, 0x66666666, x5, 444, x7)
+
+inst_129:
+// rs1_val==1431655765 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x6c9d, 0x55555555, 0xb504, x5, 448, x7)
+
+inst_130:
+// rs1_val==1431655765 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x55555555, 0x55555555, 0x0, x5, 452, x7)
+
+inst_131:
+// rs1_val==1431655765 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0xaaaa, 0x55555555, 0xffff, x5, 456, x7)
+
+inst_132:
+// rs1_val==1431655765 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x55555555, 0x2, x5, 460, x7)
+
+inst_133:
+// rs1_val==1431655765 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x55555555, 0x55555554, x5, 464, x7)
+
+inst_134:
+// rs1_val==1431655765 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x55555555, 0x55555555, 0xaaaaaaa9, x5, 468, x7)
+
+inst_135:
+// rs1_val==1431655765 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x55555555, 0x4, x5, 472, x7)
+
+inst_136:
+// rs1_val==1431655765 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x22222223, 0x55555555, 0x33333332, x5, 476, x7)
+
+inst_137:
+// rs1_val==1431655765 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x55555555, 0x55555555, 0x66666665, x5, 480, x7)
+
+inst_138:
+// rs1_val==1431655765 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x3048, 0x55555555, 0xb503, x5, 484, x7)
+
+inst_139:
+// rs1_val==1431655765 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x55555555, 0xfffe, x5, 488, x7)
+
+inst_140:
+// rs1_val==1431655765 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x55555555, 0x55555555, 0x55555556, x5, 492, x7)
+
+inst_141:
+// rs1_val==1431655765 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x55555555, 0x55555555, 0xaaaaaaab, x5, 496, x7)
+
+inst_142:
+// rs1_val==1431655765 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x55555555, 0x6, x5, 500, x7)
+
+inst_143:
+// rs1_val==1431655765 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x22222221, 0x55555555, 0x33333334, x5, 504, x7)
+
+inst_144:
+// rs1_val==1431655765 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x55555555, 0x55555555, 0x66666667, x5, 508, x7)
+
+inst_145:
+// rs1_val==1431655765 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0xa8f4, 0x55555555, 0xb505, x5, 512, x7)
+
+inst_146:
+// rs1_val==1431655765 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x55555555, 0x1, x5, 516, x7)
+
+inst_147:
+// rs1_val==1431655765 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555555; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x5555, 0x55555555, 0x10000, x5, 520, x7)
+
+inst_148:
+// rs1_val==2863311530 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0xaaaaaaaa, 0x3, x5, 524, x7)
+
+inst_149:
+// rs1_val==2863311530 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x55555555, x5, 528, x7)
+
+inst_150:
+// rs1_val==2863311530 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0xaaaaaaaa, x5, 532, x7)
+
+inst_151:
+// rs1_val==2863311530 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x5, x5, 536, x7)
+
+inst_152:
+// rs1_val==2863311530 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x11111111, 0xaaaaaaaa, 0x33333333, x5, 540, x7)
+
+inst_153:
+// rs1_val==2863311530 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x44444444, 0xaaaaaaaa, 0x66666666, x5, 544, x7)
+
+inst_154:
+// rs1_val==2863311530 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x2436, 0xaaaaaaaa, 0xb504, x5, 548, x7)
+
+inst_155:
+// rs1_val==2863311530 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0xaaaaaaaa, 0xaaaaaaaa, 0x0, x5, 552, x7)
+
+inst_156:
+// rs1_val==2863311530 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x5555, 0xaaaaaaaa, 0xffff, x5, 556, x7)
+
+inst_157:
+// rs1_val==2863311530 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x2, x5, 560, x7)
+
+inst_158:
+// rs1_val==2863311530 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0xaaaaaaaa, 0x55555554, x5, 564, x7)
+
+inst_159:
+// rs1_val==2863311530 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xaaaaaaaa, 0xaaaaaaa9, x5, 568, x7)
+
+inst_160:
+// rs1_val==2863311530 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0xaaaaaaaa, 0x4, x5, 572, x7)
+
+inst_161:
+// rs1_val==2863311530 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x11111114, 0xaaaaaaaa, 0x33333332, x5, 576, x7)
+
+inst_162:
+// rs1_val==2863311530 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x44444445, 0xaaaaaaaa, 0x66666665, x5, 580, x7)
+
+inst_163:
+// rs1_val==2863311530 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x6090, 0xaaaaaaaa, 0xb503, x5, 584, x7)
+
+inst_164:
+// rs1_val==2863311530 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0xaaaaaaaa, 0xfffe, x5, 588, x7)
+
+inst_165:
+// rs1_val==2863311530 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x55555554, 0xaaaaaaaa, 0x55555556, x5, 592, x7)
+
+inst_166:
+// rs1_val==2863311530 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaab, x5, 596, x7)
+
+inst_167:
+// rs1_val==2863311530 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0xaaaaaaaa, 0x6, x5, 600, x7)
+
+inst_168:
+// rs1_val==2863311530 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x1111110e, 0xaaaaaaaa, 0x33333334, x5, 604, x7)
+
+inst_169:
+// rs1_val==2863311530 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x44444443, 0xaaaaaaaa, 0x66666667, x5, 608, x7)
+
+inst_170:
+// rs1_val==2863311530 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x9ce3, 0xaaaaaaaa, 0xb505, x5, 612, x7)
+
+inst_171:
+// rs1_val==2863311530 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0xaaaa, 0xaaaaaaaa, 0x10000, x5, 616, x7)
+
+inst_172:
+// rs1_val==5 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x5, 0x3, x5, 620, x7)
+
+inst_173:
+// rs1_val==5 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0x55555555, x5, 624, x7)
+
+inst_174:
+// rs1_val==5 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0xaaaaaaaa, x5, 628, x7)
+
+inst_175:
+// rs1_val==5 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x5, 0x5, x5, 632, x7)
+
+inst_176:
+// rs1_val==5 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0x33333333, x5, 636, x7)
+
+inst_177:
+// rs1_val==5 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0x66666666, x5, 640, x7)
+
+inst_178:
+// rs1_val==5 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0xb504, x5, 644, x7)
+
+inst_179:
+// rs1_val==5 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0x0, x5, 648, x7)
+
+inst_180:
+// rs1_val==5 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0xffff, x5, 652, x7)
+
+inst_181:
+// rs1_val==5 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x5, 0x2, x5, 656, x7)
+
+inst_182:
+// rs1_val==5 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0x55555554, x5, 660, x7)
+
+inst_183:
+// rs1_val==5 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0xaaaaaaa9, x5, 664, x7)
+
+inst_184:
+// rs1_val==5 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x5, 0x4, x5, 668, x7)
+
+inst_185:
+// rs1_val==5 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0x33333332, x5, 672, x7)
+
+inst_186:
+// rs1_val==5 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0x66666665, x5, 676, x7)
+
+inst_187:
+// rs1_val==5 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0xb503, x5, 680, x7)
+
+inst_188:
+// rs1_val==5 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0xfffe, x5, 684, x7)
+
+inst_189:
+// rs1_val==5 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0x55555556, x5, 688, x7)
+
+inst_190:
+// rs1_val==5 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0xaaaaaaab, x5, 692, x7)
+
+inst_191:
+// rs1_val==5 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0x6, x5, 696, x7)
+
+inst_192:
+// rs1_val==5 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0x33333334, x5, 700, x7)
+
+inst_193:
+// rs1_val==5 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0x66666667, x5, 704, x7)
+
+inst_194:
+// rs1_val==5 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0xb505, x5, 708, x7)
+
+inst_195:
+// rs1_val==5 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x5, 0x1, x5, 712, x7)
+
+inst_196:
+// rs1_val==5 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x5, 0x10000, x5, 716, x7)
+
+inst_197:
+// rs1_val==858993459 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x33333333, 0x3, x5, 720, x7)
+
+inst_198:
+// rs1_val==858993459 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x33333333, 0x33333333, 0x55555555, x5, 724, x7)
+
+inst_199:
+// rs1_val==858993459 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x33333333, 0x33333333, 0xaaaaaaaa, x5, 728, x7)
+
+inst_200:
+// rs1_val==858993459 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x33333333, 0x5, x5, 732, x7)
+
+inst_201:
+// rs1_val==858993459 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x33333333, 0x33333333, x5, 736, x7)
+
+inst_202:
+// rs1_val==858993459 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x33333333, 0x33333333, 0x66666666, x5, 740, x7)
+
+inst_203:
+// rs1_val==858993459 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x8993, 0x33333333, 0xb504, x5, 744, x7)
+
+inst_204:
+// rs1_val==858993459 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x33333333, 0x33333333, 0x0, x5, 748, x7)
+
+inst_205:
+// rs1_val==858993459 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x6666, 0x33333333, 0xffff, x5, 752, x7)
+
+inst_206:
+// rs1_val==858993459 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x33333333, 0x2, x5, 756, x7)
+
+inst_207:
+// rs1_val==858993459 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x33333333, 0x33333333, 0x55555554, x5, 760, x7)
+
+inst_208:
+// rs1_val==858993459 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x33333333, 0x33333333, 0xaaaaaaa9, x5, 764, x7)
+
+inst_209:
+// rs1_val==858993459 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x33333333, 0x4, x5, 768, x7)
+
+inst_210:
+// rs1_val==858993459 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x33333333, 0x33333332, x5, 772, x7)
+
+inst_211:
+// rs1_val==858993459 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x33333333, 0x33333333, 0x66666665, x5, 776, x7)
+
+inst_212:
+// rs1_val==858993459 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x1cf8, 0x33333333, 0xb503, x5, 780, x7)
+
+inst_213:
+// rs1_val==858993459 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x9999, 0x33333333, 0xfffe, x5, 784, x7)
+
+inst_214:
+// rs1_val==858993459 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x33333333, 0x33333333, 0x55555556, x5, 788, x7)
+
+inst_215:
+// rs1_val==858993459 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x33333333, 0x33333333, 0xaaaaaaab, x5, 792, x7)
+
+inst_216:
+// rs1_val==858993459 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x33333333, 0x6, x5, 796, x7)
+
+inst_217:
+// rs1_val==858993459 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x33333333, 0x33333333, 0x33333334, x5, 800, x7)
+
+inst_218:
+// rs1_val==858993459 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x33333333, 0x33333333, 0x66666667, x5, 804, x7)
+
+inst_219:
+// rs1_val==858993459 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x412b, 0x33333333, 0xb505, x5, 808, x7)
+
+inst_220:
+// rs1_val==858993459 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x33333333, 0x1, x5, 812, x7)
+
+inst_221:
+// rs1_val==858993459 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333333; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x3333, 0x33333333, 0x10000, x5, 816, x7)
+
+inst_222:
+// rs1_val==1717986918 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x66666666, 0x3, x5, 820, x7)
+
+inst_223:
+// rs1_val==1717986918 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x11111111, 0x66666666, 0x55555555, x5, 824, x7)
+
+inst_224:
+// rs1_val==1717986918 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x66666666, 0x66666666, 0xaaaaaaaa, x5, 828, x7)
+
+inst_225:
+// rs1_val==1717986918 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x66666666, 0x5, x5, 832, x7)
+
+inst_226:
+// rs1_val==1717986918 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x66666666, 0x33333333, x5, 836, x7)
+
+inst_227:
+// rs1_val==1717986918 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x66666666, 0x66666666, x5, 840, x7)
+
+inst_228:
+// rs1_val==1717986918 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x5e22, 0x66666666, 0xb504, x5, 844, x7)
+
+inst_229:
+// rs1_val==1717986918 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x66666666, 0x66666666, 0x0, x5, 848, x7)
+
+inst_230:
+// rs1_val==1717986918 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0xcccc, 0x66666666, 0xffff, x5, 852, x7)
+
+inst_231:
+// rs1_val==1717986918 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x66666666, 0x2, x5, 856, x7)
+
+inst_232:
+// rs1_val==1717986918 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x11111112, 0x66666666, 0x55555554, x5, 860, x7)
+
+inst_233:
+// rs1_val==1717986918 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x66666666, 0x66666666, 0xaaaaaaa9, x5, 864, x7)
+
+inst_234:
+// rs1_val==1717986918 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x66666666, 0x4, x5, 868, x7)
+
+inst_235:
+// rs1_val==1717986918 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x66666666, 0x33333332, x5, 872, x7)
+
+inst_236:
+// rs1_val==1717986918 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x66666666, 0x66666665, x5, 876, x7)
+
+inst_237:
+// rs1_val==1717986918 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x39f0, 0x66666666, 0xb503, x5, 880, x7)
+
+inst_238:
+// rs1_val==1717986918 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x3334, 0x66666666, 0xfffe, x5, 884, x7)
+
+inst_239:
+// rs1_val==1717986918 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x11111110, 0x66666666, 0x55555556, x5, 888, x7)
+
+inst_240:
+// rs1_val==1717986918 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x66666666, 0x66666666, 0xaaaaaaab, x5, 892, x7)
+
+inst_241:
+// rs1_val==1717986918 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x66666666, 0x6, x5, 896, x7)
+
+inst_242:
+// rs1_val==1717986918 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x66666666, 0x33333334, x5, 900, x7)
+
+inst_243:
+// rs1_val==1717986918 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x66666666, 0x66666666, 0x66666667, x5, 904, x7)
+
+inst_244:
+// rs1_val==1717986918 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x8256, 0x66666666, 0xb505, x5, 908, x7)
+
+inst_245:
+// rs1_val==1717986918 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x66666666, 0x1, x5, 912, x7)
+
+inst_246:
+// rs1_val==1717986918 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666666; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x6666, 0x66666666, 0x10000, x5, 916, x7)
+
+inst_247:
+// rs1_val==46340 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0xb504, 0x3, x5, 920, x7)
+
+inst_248:
+// rs1_val==46340 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0x55555555, x5, 924, x7)
+
+inst_249:
+// rs1_val==46340 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0xaaaaaaaa, x5, 928, x7)
+
+inst_250:
+// rs1_val==46340 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xb504, 0x5, x5, 932, x7)
+
+inst_251:
+// rs1_val==46340 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0x33333333, x5, 936, x7)
+
+inst_252:
+// rs1_val==46340 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0x66666666, x5, 940, x7)
+
+inst_253:
+// rs1_val==46340 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xb504, 0xb504, x5, 944, x7)
+
+inst_254:
+// rs1_val==46340 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0x0, x5, 948, x7)
+
+inst_255:
+// rs1_val==46340 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0xffff, x5, 952, x7)
+
+inst_256:
+// rs1_val==46340 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xb504, 0x2, x5, 956, x7)
+
+inst_257:
+// rs1_val==46340 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0x55555554, x5, 960, x7)
+
+inst_258:
+// rs1_val==46340 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0xaaaaaaa9, x5, 964, x7)
+
+inst_259:
+// rs1_val==46340 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xb504, 0x4, x5, 968, x7)
+
+inst_260:
+// rs1_val==46340 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0x33333332, x5, 972, x7)
+
+inst_261:
+// rs1_val==46340 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0x66666665, x5, 976, x7)
+
+inst_262:
+// rs1_val==46340 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xb504, 0xb503, x5, 980, x7)
+
+inst_263:
+// rs1_val==46340 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0xfffe, x5, 984, x7)
+
+inst_264:
+// rs1_val==46340 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0x55555556, x5, 988, x7)
+
+inst_265:
+// rs1_val==46340 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0xaaaaaaab, x5, 992, x7)
+
+inst_266:
+// rs1_val==46340 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0xb504, 0x6, x5, 996, x7)
+
+inst_267:
+// rs1_val==46340 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0x33333334, x5, 1000, x7)
+
+inst_268:
+// rs1_val==46340 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0x66666667, x5, 1004, x7)
+
+inst_269:
+// rs1_val==46340 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0xb505, x5, 1008, x7)
+
+inst_270:
+// rs1_val==46340 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xb504, 0x1, x5, 1012, x7)
+
+inst_271:
+// rs1_val==46340 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb504; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0xb504, 0xb504, 0x10000, x5, 1016, x7)
+
+inst_272:
+// rs1_val==0 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x3, x5, 1020, x7)
+
+inst_273:
+// rs1_val==0 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x55555555, x5, 1024, x7)
+
+inst_274:
+// rs1_val==0 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0xaaaaaaaa, x5, 1028, x7)
+
+inst_275:
+// rs1_val==0 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x5, x5, 1032, x7)
+
+inst_276:
+// rs1_val==0 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x33333333, x5, 1036, x7)
+
+inst_277:
+// rs1_val==0 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0xb504, x5, 1040, x7)
+
+inst_278:
+// rs1_val==0 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x0, x5, 1044, x7)
+
+inst_279:
+// rs1_val==0 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0xffff, x5, 1048, x7)
+
+inst_280:
+// rs1_val==0 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x2, x5, 1052, x7)
+
+inst_281:
+// rs1_val==0 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x55555554, x5, 1056, x7)
+
+inst_282:
+// rs1_val==0 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0xaaaaaaa9, x5, 1060, x7)
+
+inst_283:
+// rs1_val==0 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x4, x5, 1064, x7)
+
+inst_284:
+// rs1_val==0 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x33333332, x5, 1068, x7)
+
+inst_285:
+// rs1_val==0 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x66666665, x5, 1072, x7)
+
+inst_286:
+// rs1_val==0 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0xb503, x5, 1076, x7)
+
+inst_287:
+// rs1_val==0 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0xfffe, x5, 1080, x7)
+
+inst_288:
+// rs1_val==0 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x55555556, x5, 1084, x7)
+
+inst_289:
+// rs1_val==0 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0xaaaaaaab, x5, 1088, x7)
+
+inst_290:
+// rs1_val==0 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x6, x5, 1092, x7)
+
+inst_291:
+// rs1_val==0 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x33333334, x5, 1096, x7)
+
+inst_292:
+// rs1_val==0 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x66666667, x5, 1100, x7)
+
+inst_293:
+// rs1_val==0 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0xb505, x5, 1104, x7)
+
+inst_294:
+// rs1_val==0 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x1, x5, 1108, x7)
+
+inst_295:
+// rs1_val==0 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x0, 0x10000, x5, 1112, x7)
+
+inst_296:
+// rs1_val==65535 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xffff, 0x3, x5, 1116, x7)
+
+inst_297:
+// rs1_val==65535 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0x55555555, x5, 1120, x7)
+
+inst_298:
+// rs1_val==65535 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0xaaaaaaaa, x5, 1124, x7)
+
+inst_299:
+// rs1_val==65535 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xffff, 0x5, x5, 1128, x7)
+
+inst_300:
+// rs1_val==65535 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0x33333333, x5, 1132, x7)
+
+inst_301:
+// rs1_val==65535 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0x66666666, x5, 1136, x7)
+
+inst_302:
+// rs1_val==65535 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x4afb, 0xffff, 0xb504, x5, 1140, x7)
+
+inst_303:
+// rs1_val==65535 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0x0, x5, 1144, x7)
+
+inst_304:
+// rs1_val==65535 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xffff, 0xffff, x5, 1148, x7)
+
+inst_305:
+// rs1_val==65535 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xffff, 0x2, x5, 1152, x7)
+
+inst_306:
+// rs1_val==65535 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0x55555554, x5, 1156, x7)
+
+inst_307:
+// rs1_val==65535 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0xaaaaaaa9, x5, 1160, x7)
+
+inst_308:
+// rs1_val==65535 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0xffff, 0x4, x5, 1164, x7)
+
+inst_309:
+// rs1_val==65535 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0x33333332, x5, 1168, x7)
+
+inst_310:
+// rs1_val==65535 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0x66666665, x5, 1172, x7)
+
+inst_311:
+// rs1_val==65535 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x4afc, 0xffff, 0xb503, x5, 1176, x7)
+
+inst_312:
+// rs1_val==65535 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xffff, 0xfffe, x5, 1180, x7)
+
+inst_313:
+// rs1_val==65535 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0x55555556, x5, 1184, x7)
+
+inst_314:
+// rs1_val==65535 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0xaaaaaaab, x5, 1188, x7)
+
+inst_315:
+// rs1_val==65535 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0xffff, 0x6, x5, 1192, x7)
+
+inst_316:
+// rs1_val==65535 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0x33333334, x5, 1196, x7)
+
+inst_317:
+// rs1_val==65535 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0x66666667, x5, 1200, x7)
+
+inst_318:
+// rs1_val==65535 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x4afa, 0xffff, 0xb505, x5, 1204, x7)
+
+inst_319:
+// rs1_val==65535 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xffff, 0x1, x5, 1208, x7)
+
+inst_320:
+// rs1_val==65535 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xffff; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0xffff, 0xffff, 0x10000, x5, 1212, x7)
+
+inst_321:
+// rs1_val==2 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x3, x5, 1216, x7)
+
+inst_322:
+// rs1_val==2 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x55555555, x5, 1220, x7)
+
+inst_323:
+// rs1_val==2 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0xaaaaaaaa, x5, 1224, x7)
+
+inst_324:
+// rs1_val==2 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x5, x5, 1228, x7)
+
+inst_325:
+// rs1_val==2 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x33333333, x5, 1232, x7)
+
+inst_326:
+// rs1_val==2 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x66666666, x5, 1236, x7)
+
+inst_327:
+// rs1_val==2 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0xb504, x5, 1240, x7)
+
+inst_328:
+// rs1_val==2 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x0, x5, 1244, x7)
+
+inst_329:
+// rs1_val==2 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0xffff, x5, 1248, x7)
+
+inst_330:
+// rs1_val==2 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x2, 0x2, x5, 1252, x7)
+
+inst_331:
+// rs1_val==2 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x55555554, x5, 1256, x7)
+
+inst_332:
+// rs1_val==2 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0xaaaaaaa9, x5, 1260, x7)
+
+inst_333:
+// rs1_val==2 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x4, x5, 1264, x7)
+
+inst_334:
+// rs1_val==2 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x33333332, x5, 1268, x7)
+
+inst_335:
+// rs1_val==2 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x66666665, x5, 1272, x7)
+
+inst_336:
+// rs1_val==2 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0xb503, x5, 1276, x7)
+
+inst_337:
+// rs1_val==2 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0xfffe, x5, 1280, x7)
+
+inst_338:
+// rs1_val==2 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x55555556, x5, 1284, x7)
+
+inst_339:
+// rs1_val==2 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0xaaaaaaab, x5, 1288, x7)
+
+inst_340:
+// rs1_val==2 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x6, x5, 1292, x7)
+
+inst_341:
+// rs1_val==2 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x33333334, x5, 1296, x7)
+
+inst_342:
+// rs1_val==2 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x66666667, x5, 1300, x7)
+
+inst_343:
+// rs1_val==2 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0xb505, x5, 1304, x7)
+
+inst_344:
+// rs1_val==2 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x2, 0x1, x5, 1308, x7)
+
+inst_345:
+// rs1_val==2 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x2, 0x10000, x5, 1312, x7)
+
+inst_346:
+// rs1_val==1431655764 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x55555554, 0x3, x5, 1316, x7)
+
+inst_347:
+// rs1_val==1431655764 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x55555554, 0x55555554, 0x55555555, x5, 1320, x7)
+
+inst_348:
+// rs1_val==1431655764 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x55555554, 0x55555554, 0xaaaaaaaa, x5, 1324, x7)
+
+inst_349:
+// rs1_val==1431655764 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x55555554, 0x5, x5, 1328, x7)
+
+inst_350:
+// rs1_val==1431655764 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x22222221, 0x55555554, 0x33333333, x5, 1332, x7)
+
+inst_351:
+// rs1_val==1431655764 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x55555554, 0x55555554, 0x66666666, x5, 1336, x7)
+
+inst_352:
+// rs1_val==1431655764 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x6c9c, 0x55555554, 0xb504, x5, 1340, x7)
+
+inst_353:
+// rs1_val==1431655764 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x55555554, 0x55555554, 0x0, x5, 1344, x7)
+
+inst_354:
+// rs1_val==1431655764 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0xaaa9, 0x55555554, 0xffff, x5, 1348, x7)
+
+inst_355:
+// rs1_val==1431655764 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x55555554, 0x2, x5, 1352, x7)
+
+inst_356:
+// rs1_val==1431655764 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x55555554, 0x55555554, x5, 1356, x7)
+
+inst_357:
+// rs1_val==1431655764 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x55555554, 0x55555554, 0xaaaaaaa9, x5, 1360, x7)
+
+inst_358:
+// rs1_val==1431655764 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x55555554, 0x4, x5, 1364, x7)
+
+inst_359:
+// rs1_val==1431655764 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x22222222, 0x55555554, 0x33333332, x5, 1368, x7)
+
+inst_360:
+// rs1_val==1431655764 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x55555554, 0x55555554, 0x66666665, x5, 1372, x7)
+
+inst_361:
+// rs1_val==1431655764 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x3047, 0x55555554, 0xb503, x5, 1376, x7)
+
+inst_362:
+// rs1_val==1431655764 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x55555554, 0xfffe, x5, 1380, x7)
+
+inst_363:
+// rs1_val==1431655764 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x55555554, 0x55555554, 0x55555556, x5, 1384, x7)
+
+inst_364:
+// rs1_val==1431655764 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x55555554, 0x55555554, 0xaaaaaaab, x5, 1388, x7)
+
+inst_365:
+// rs1_val==1431655764 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x55555554, 0x6, x5, 1392, x7)
+
+inst_366:
+// rs1_val==1431655764 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x22222220, 0x55555554, 0x33333334, x5, 1396, x7)
+
+inst_367:
+// rs1_val==1431655764 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x55555554, 0x55555554, 0x66666667, x5, 1400, x7)
+
+inst_368:
+// rs1_val==1431655764 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0xa8f3, 0x55555554, 0xb505, x5, 1404, x7)
+
+inst_369:
+// rs1_val==1431655764 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x55555554, 0x1, x5, 1408, x7)
+
+inst_370:
+// rs1_val==1431655764 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555554; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x5554, 0x55555554, 0x10000, x5, 1412, x7)
+
+inst_371:
+// rs1_val==2863311529 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0x3, x5, 1416, x7)
+
+inst_372:
+// rs1_val==2863311529 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x55555554, 0xaaaaaaa9, 0x55555555, x5, 1420, x7)
+
+inst_373:
+// rs1_val==2863311529 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0xaaaaaaa9, 0xaaaaaaa9, 0xaaaaaaaa, x5, 1424, x7)
+
+inst_374:
+// rs1_val==2863311529 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0xaaaaaaa9, 0x5, x5, 1428, x7)
+
+inst_375:
+// rs1_val==2863311529 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x11111110, 0xaaaaaaa9, 0x33333333, x5, 1432, x7)
+
+inst_376:
+// rs1_val==2863311529 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x44444443, 0xaaaaaaa9, 0x66666666, x5, 1436, x7)
+
+inst_377:
+// rs1_val==2863311529 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x2435, 0xaaaaaaa9, 0xb504, x5, 1440, x7)
+
+inst_378:
+// rs1_val==2863311529 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0xaaaaaaa9, 0xaaaaaaa9, 0x0, x5, 1444, x7)
+
+inst_379:
+// rs1_val==2863311529 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x5554, 0xaaaaaaa9, 0xffff, x5, 1448, x7)
+
+inst_380:
+// rs1_val==2863311529 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0x2, x5, 1452, x7)
+
+inst_381:
+// rs1_val==2863311529 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0x55555554, x5, 1456, x7)
+
+inst_382:
+// rs1_val==2863311529 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0xaaaaaaa9, x5, 1460, x7)
+
+inst_383:
+// rs1_val==2863311529 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0x4, x5, 1464, x7)
+
+inst_384:
+// rs1_val==2863311529 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x11111113, 0xaaaaaaa9, 0x33333332, x5, 1468, x7)
+
+inst_385:
+// rs1_val==2863311529 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x44444444, 0xaaaaaaa9, 0x66666665, x5, 1472, x7)
+
+inst_386:
+// rs1_val==2863311529 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x608f, 0xaaaaaaa9, 0xb503, x5, 1476, x7)
+
+inst_387:
+// rs1_val==2863311529 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0xfffe, x5, 1480, x7)
+
+inst_388:
+// rs1_val==2863311529 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x55555553, 0xaaaaaaa9, 0x55555556, x5, 1484, x7)
+
+inst_389:
+// rs1_val==2863311529 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0xaaaaaaa9, 0xaaaaaaa9, 0xaaaaaaab, x5, 1488, x7)
+
+inst_390:
+// rs1_val==2863311529 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xaaaaaaa9, 0x6, x5, 1492, x7)
+
+inst_391:
+// rs1_val==2863311529 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x1111110d, 0xaaaaaaa9, 0x33333334, x5, 1496, x7)
+
+inst_392:
+// rs1_val==2863311529 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x44444442, 0xaaaaaaa9, 0x66666667, x5, 1500, x7)
+
+inst_393:
+// rs1_val==2863311529 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x9ce2, 0xaaaaaaa9, 0xb505, x5, 1504, x7)
+
+inst_394:
+// rs1_val==2863311529 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xaaaaaaa9, 0x1, x5, 1508, x7)
+
+inst_395:
+// rs1_val==2863311529 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaa9; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0xaaa9, 0xaaaaaaa9, 0x10000, x5, 1512, x7)
+
+inst_396:
+// rs1_val==4 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x4, 0x3, x5, 1516, x7)
+
+inst_397:
+// rs1_val==4 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0x55555555, x5, 1520, x7)
+
+inst_398:
+// rs1_val==4 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0xaaaaaaaa, x5, 1524, x7)
+
+inst_399:
+// rs1_val==4 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0x5, x5, 1528, x7)
+
+inst_400:
+// rs1_val==4 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0x33333333, x5, 1532, x7)
+
+inst_401:
+// rs1_val==4 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0x66666666, x5, 1536, x7)
+
+inst_402:
+// rs1_val==4 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0xb504, x5, 1540, x7)
+
+inst_403:
+// rs1_val==4 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0x0, x5, 1544, x7)
+
+inst_404:
+// rs1_val==4 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0xffff, x5, 1548, x7)
+
+inst_405:
+// rs1_val==4 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x4, 0x2, x5, 1552, x7)
+
+inst_406:
+// rs1_val==4 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0x55555554, x5, 1556, x7)
+
+inst_407:
+// rs1_val==4 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0xaaaaaaa9, x5, 1560, x7)
+
+inst_408:
+// rs1_val==4 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x4, 0x4, x5, 1564, x7)
+
+inst_409:
+// rs1_val==4 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0x33333332, x5, 1568, x7)
+
+inst_410:
+// rs1_val==4 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0x66666665, x5, 1572, x7)
+
+inst_411:
+// rs1_val==4 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0xb503, x5, 1576, x7)
+
+inst_412:
+// rs1_val==4 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0xfffe, x5, 1580, x7)
+
+inst_413:
+// rs1_val==4 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0x55555556, x5, 1584, x7)
+
+inst_414:
+// rs1_val==4 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0xaaaaaaab, x5, 1588, x7)
+
+inst_415:
+// rs1_val==4 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0x6, x5, 1592, x7)
+
+inst_416:
+// rs1_val==4 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0x33333334, x5, 1596, x7)
+
+inst_417:
+// rs1_val==4 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0x66666667, x5, 1600, x7)
+
+inst_418:
+// rs1_val==4 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0xb505, x5, 1604, x7)
+
+inst_419:
+// rs1_val==4 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x4, 0x1, x5, 1608, x7)
+
+inst_420:
+// rs1_val==4 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x4, 0x10000, x5, 1612, x7)
+
+inst_421:
+// rs1_val==858993458 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x33333332, 0x3, x5, 1616, x7)
+
+inst_422:
+// rs1_val==858993458 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x33333332, 0x55555555, x5, 1620, x7)
+
+inst_423:
+// rs1_val==858993458 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x33333332, 0xaaaaaaaa, x5, 1624, x7)
+
+inst_424:
+// rs1_val==858993458 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x33333332, 0x5, x5, 1628, x7)
+
+inst_425:
+// rs1_val==858993458 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x33333332, 0x33333333, x5, 1632, x7)
+
+inst_426:
+// rs1_val==858993458 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x33333332, 0x66666666, x5, 1636, x7)
+
+inst_427:
+// rs1_val==858993458 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x8992, 0x33333332, 0xb504, x5, 1640, x7)
+
+inst_428:
+// rs1_val==858993458 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x33333332, 0x0, x5, 1644, x7)
+
+inst_429:
+// rs1_val==858993458 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x6665, 0x33333332, 0xffff, x5, 1648, x7)
+
+inst_430:
+// rs1_val==858993458 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x33333332, 0x2, x5, 1652, x7)
+
+inst_431:
+// rs1_val==858993458 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x33333332, 0x55555554, x5, 1656, x7)
+
+inst_432:
+// rs1_val==858993458 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x33333332, 0xaaaaaaa9, x5, 1660, x7)
+
+inst_433:
+// rs1_val==858993458 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x33333332, 0x4, x5, 1664, x7)
+
+inst_434:
+// rs1_val==858993458 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x33333332, 0x33333332, x5, 1668, x7)
+
+inst_435:
+// rs1_val==858993458 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x33333332, 0x66666665, x5, 1672, x7)
+
+inst_436:
+// rs1_val==858993458 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x1cf7, 0x33333332, 0xb503, x5, 1676, x7)
+
+inst_437:
+// rs1_val==858993458 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x9998, 0x33333332, 0xfffe, x5, 1680, x7)
+
+inst_438:
+// rs1_val==858993458 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x33333332, 0x55555556, x5, 1684, x7)
+
+inst_439:
+// rs1_val==858993458 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x33333332, 0xaaaaaaab, x5, 1688, x7)
+
+inst_440:
+// rs1_val==858993458 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x33333332, 0x6, x5, 1692, x7)
+
+inst_441:
+// rs1_val==858993458 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x33333332, 0x33333334, x5, 1696, x7)
+
+inst_442:
+// rs1_val==858993458 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x33333332, 0x66666667, x5, 1700, x7)
+
+inst_443:
+// rs1_val==858993458 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x412a, 0x33333332, 0xb505, x5, 1704, x7)
+
+inst_444:
+// rs1_val==858993458 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x33333332, 0x1, x5, 1708, x7)
+
+inst_445:
+// rs1_val==858993458 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333332; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x3332, 0x33333332, 0x10000, x5, 1712, x7)
+
+inst_446:
+// rs1_val==1717986917 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x66666665, 0x3, x5, 1716, x7)
+
+inst_447:
+// rs1_val==1717986917 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x11111110, 0x66666665, 0x55555555, x5, 1720, x7)
+
+inst_448:
+// rs1_val==1717986917 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x66666665, 0x66666665, 0xaaaaaaaa, x5, 1724, x7)
+
+inst_449:
+// rs1_val==1717986917 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x66666665, 0x5, x5, 1728, x7)
+
+inst_450:
+// rs1_val==1717986917 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x33333332, 0x66666665, 0x33333333, x5, 1732, x7)
+
+inst_451:
+// rs1_val==1717986917 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x66666665, 0x66666665, 0x66666666, x5, 1736, x7)
+
+inst_452:
+// rs1_val==1717986917 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x5e21, 0x66666665, 0xb504, x5, 1740, x7)
+
+inst_453:
+// rs1_val==1717986917 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x66666665, 0x66666665, 0x0, x5, 1744, x7)
+
+inst_454:
+// rs1_val==1717986917 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0xcccb, 0x66666665, 0xffff, x5, 1748, x7)
+
+inst_455:
+// rs1_val==1717986917 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x66666665, 0x2, x5, 1752, x7)
+
+inst_456:
+// rs1_val==1717986917 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x11111111, 0x66666665, 0x55555554, x5, 1756, x7)
+
+inst_457:
+// rs1_val==1717986917 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x66666665, 0x66666665, 0xaaaaaaa9, x5, 1760, x7)
+
+inst_458:
+// rs1_val==1717986917 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x66666665, 0x4, x5, 1764, x7)
+
+inst_459:
+// rs1_val==1717986917 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x66666665, 0x33333332, x5, 1768, x7)
+
+inst_460:
+// rs1_val==1717986917 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x66666665, 0x66666665, x5, 1772, x7)
+
+inst_461:
+// rs1_val==1717986917 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x39ef, 0x66666665, 0xb503, x5, 1776, x7)
+
+inst_462:
+// rs1_val==1717986917 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x3333, 0x66666665, 0xfffe, x5, 1780, x7)
+
+inst_463:
+// rs1_val==1717986917 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x1111110f, 0x66666665, 0x55555556, x5, 1784, x7)
+
+inst_464:
+// rs1_val==1717986917 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x66666665, 0x66666665, 0xaaaaaaab, x5, 1788, x7)
+
+inst_465:
+// rs1_val==1717986917 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x66666665, 0x1, x5, 1792, x7)
+
+inst_466:
+// rs1_val==1717986917 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x6665, 0x66666665, 0x10000, x5, 1796, x7)
+
+inst_467:
+// rs1_val==46339 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xb503, 0x3, x5, 1800, x7)
+
+inst_468:
+// rs1_val==46339 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0x55555555, x5, 1804, x7)
+
+inst_469:
+// rs1_val==46339 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0xaaaaaaaa, x5, 1808, x7)
+
+inst_470:
+// rs1_val==46339 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0xb503, 0x5, x5, 1812, x7)
+
+inst_471:
+// rs1_val==46339 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0x33333333, x5, 1816, x7)
+
+inst_472:
+// rs1_val==46339 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0x66666666, x5, 1820, x7)
+
+inst_473:
+// rs1_val==46339 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0xb504, x5, 1824, x7)
+
+inst_474:
+// rs1_val==46339 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0x0, x5, 1828, x7)
+
+inst_475:
+// rs1_val==46339 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0xffff, x5, 1832, x7)
+
+inst_476:
+// rs1_val==46339 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xb503, 0x2, x5, 1836, x7)
+
+inst_477:
+// rs1_val==46339 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0x55555554, x5, 1840, x7)
+
+inst_478:
+// rs1_val==46339 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0xaaaaaaa9, x5, 1844, x7)
+
+inst_479:
+// rs1_val==46339 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0xb503, 0x4, x5, 1848, x7)
+
+inst_480:
+// rs1_val==46339 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0x33333332, x5, 1852, x7)
+
+inst_481:
+// rs1_val==46339 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0x66666665, x5, 1856, x7)
+
+inst_482:
+// rs1_val==46339 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xb503, 0xb503, x5, 1860, x7)
+
+inst_483:
+// rs1_val==46339 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0xfffe, x5, 1864, x7)
+
+inst_484:
+// rs1_val==46339 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0x55555556, x5, 1868, x7)
+
+inst_485:
+// rs1_val==46339 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0xaaaaaaab, x5, 1872, x7)
+
+inst_486:
+// rs1_val==46339 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xb503, 0x6, x5, 1876, x7)
+
+inst_487:
+// rs1_val==46339 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0x33333334, x5, 1880, x7)
+
+inst_488:
+// rs1_val==46339 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0x66666667, x5, 1884, x7)
+
+inst_489:
+// rs1_val==46339 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0xb505, x5, 1888, x7)
+
+inst_490:
+// rs1_val==46339 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xb503, 0x1, x5, 1892, x7)
+
+inst_491:
+// rs1_val==46339 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb503; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0xb503, 0xb503, 0x10000, x5, 1896, x7)
+
+inst_492:
+// rs1_val==65534 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0xfffe, 0x3, x5, 1900, x7)
+
+inst_493:
+// rs1_val==65534 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0x55555555, x5, 1904, x7)
+
+inst_494:
+// rs1_val==65534 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0xaaaaaaaa, x5, 1908, x7)
+
+inst_495:
+// rs1_val==65534 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0xfffe, 0x5, x5, 1912, x7)
+
+inst_496:
+// rs1_val==65534 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0x33333333, x5, 1916, x7)
+
+inst_497:
+// rs1_val==65534 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0x66666666, x5, 1920, x7)
+
+inst_498:
+// rs1_val==65534 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x4afa, 0xfffe, 0xb504, x5, 1924, x7)
+
+inst_499:
+// rs1_val==65534 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0x0, x5, 1928, x7)
+
+inst_500:
+// rs1_val==65534 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0xffff, x5, 1932, x7)
+
+inst_501:
+// rs1_val==65534 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xfffe, 0x2, x5, 1936, x7)
+
+inst_502:
+// rs1_val==65534 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0x55555554, x5, 1940, x7)
+
+inst_503:
+// rs1_val==65534 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0xaaaaaaa9, x5, 1944, x7)
+
+inst_504:
+// rs1_val==65534 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0xfffe, 0x4, x5, 1948, x7)
+
+inst_505:
+// rs1_val==65534 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0x33333332, x5, 1952, x7)
+
+inst_506:
+// rs1_val==65534 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0x66666665, x5, 1956, x7)
+
+inst_507:
+// rs1_val==65534 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x4afb, 0xfffe, 0xb503, x5, 1960, x7)
+
+inst_508:
+// rs1_val==65534 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xfffe, 0xfffe, x5, 1964, x7)
+
+inst_509:
+// rs1_val==65534 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0x55555556, x5, 1968, x7)
+
+inst_510:
+// rs1_val==65534 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0xaaaaaaab, x5, 1972, x7)
+
+inst_511:
+// rs1_val==65534 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0xfffe, 0x6, x5, 1976, x7)
+
+inst_512:
+// rs1_val==65534 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0x33333334, x5, 1980, x7)
+
+inst_513:
+// rs1_val==65534 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0x66666667, x5, 1984, x7)
+
+inst_514:
+// rs1_val==65534 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x4af9, 0xfffe, 0xb505, x5, 1988, x7)
+
+inst_515:
+// rs1_val==65534 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xfffe, 0x1, x5, 1992, x7)
+
+inst_516:
+// rs1_val==65534 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffe; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0xfffe, 0xfffe, 0x10000, x5, 1996, x7)
+
+inst_517:
+// rs1_val==1431655766 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x55555556, 0x3, x5, 2000, x7)
+
+inst_518:
+// rs1_val==1431655766 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x55555556, 0x55555555, x5, 2004, x7)
+
+inst_519:
+// rs1_val==1431655766 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x55555556, 0x55555556, 0xaaaaaaaa, x5, 2008, x7)
+
+inst_520:
+// rs1_val==1431655766 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x55555556, 0x5, x5, 2012, x7)
+
+inst_521:
+// rs1_val==1431655766 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x22222223, 0x55555556, 0x33333333, x5, 2016, x7)
+
+inst_522:
+// rs1_val==1431655766 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x55555556, 0x55555556, 0x66666666, x5, 2020, x7)
+
+inst_523:
+// rs1_val==1431655766 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x6c9e, 0x55555556, 0xb504, x5, 2024, x7)
+
+inst_524:
+// rs1_val==1431655766 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x55555556, 0x55555556, 0x0, x5, 2028, x7)
+
+inst_525:
+// rs1_val==1431655766 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0xaaab, 0x55555556, 0xffff, x5, 2032, x7)
+
+inst_526:
+// rs1_val==1431655766 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x55555556, 0x2, x5, 2036, x7)
+
+inst_527:
+// rs1_val==1431655766 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x55555556, 0x55555554, x5, 2040, x7)
+
+inst_528:
+// rs1_val==1431655766 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x55555556, 0x55555556, 0xaaaaaaa9, x5, 2044, x7)
+RVTEST_SIGBASE( x5,signature_x5_1)
+
+inst_529:
+// rs1_val==1431655766 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x55555556, 0x4, x5, 0, x7)
+
+inst_530:
+// rs1_val==1431655766 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x22222224, 0x55555556, 0x33333332, x5, 4, x7)
+
+inst_531:
+// rs1_val==1431655766 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x55555556, 0x55555556, 0x66666665, x5, 8, x7)
+
+inst_532:
+// rs1_val==1431655766 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x3049, 0x55555556, 0xb503, x5, 12, x7)
+
+inst_533:
+// rs1_val==1431655766 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x55555556, 0xfffe, x5, 16, x7)
+
+inst_534:
+// rs1_val==1431655766 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x55555556, 0x55555556, x5, 20, x7)
+
+inst_535:
+// rs1_val==1431655766 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x55555556, 0x55555556, 0xaaaaaaab, x5, 24, x7)
+
+inst_536:
+// rs1_val==1431655766 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x55555556, 0x6, x5, 28, x7)
+
+inst_537:
+// rs1_val==1431655766 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x22222222, 0x55555556, 0x33333334, x5, 32, x7)
+
+inst_538:
+// rs1_val==1431655766 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x55555556, 0x55555556, 0x66666667, x5, 36, x7)
+
+inst_539:
+// rs1_val==1431655766 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0xa8f5, 0x55555556, 0xb505, x5, 40, x7)
+
+inst_540:
+// rs1_val==1431655766 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x55555556, 0x1, x5, 44, x7)
+
+inst_541:
+// rs1_val==1431655766 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x55555556; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x5556, 0x55555556, 0x10000, x5, 48, x7)
+
+inst_542:
+// rs1_val==2863311531 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x3, x5, 52, x7)
+
+inst_543:
+// rs1_val==2863311531 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xaaaaaaab, 0x55555555, x5, 56, x7)
+
+inst_544:
+// rs1_val==2863311531 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xaaaaaaab, 0xaaaaaaaa, x5, 60, x7)
+
+inst_545:
+// rs1_val==2863311531 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xaaaaaaab, 0x5, x5, 64, x7)
+
+inst_546:
+// rs1_val==2863311531 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x11111112, 0xaaaaaaab, 0x33333333, x5, 68, x7)
+
+inst_547:
+// rs1_val==2863311531 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x44444445, 0xaaaaaaab, 0x66666666, x5, 72, x7)
+
+inst_548:
+// rs1_val==2863311531 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x2437, 0xaaaaaaab, 0xb504, x5, 76, x7)
+
+inst_549:
+// rs1_val==2863311531 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0xaaaaaaab, 0xaaaaaaab, 0x0, x5, 80, x7)
+
+inst_550:
+// rs1_val==2863311531 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x5556, 0xaaaaaaab, 0xffff, x5, 84, x7)
+
+inst_551:
+// rs1_val==2863311531 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xaaaaaaab, 0x2, x5, 88, x7)
+
+inst_552:
+// rs1_val==2863311531 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0xaaaaaaab, 0x55555554, x5, 92, x7)
+
+inst_553:
+// rs1_val==2863311531 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0xaaaaaaab, 0xaaaaaaa9, x5, 96, x7)
+
+inst_554:
+// rs1_val==2863311531 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0xaaaaaaab, 0x4, x5, 100, x7)
+
+inst_555:
+// rs1_val==2863311531 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x11111115, 0xaaaaaaab, 0x33333332, x5, 104, x7)
+
+inst_556:
+// rs1_val==2863311531 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x44444446, 0xaaaaaaab, 0x66666665, x5, 108, x7)
+
+inst_557:
+// rs1_val==2863311531 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x6091, 0xaaaaaaab, 0xb503, x5, 112, x7)
+
+inst_558:
+// rs1_val==2863311531 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0xaaaaaaab, 0xfffe, x5, 116, x7)
+
+inst_559:
+// rs1_val==2863311531 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x55555555, 0xaaaaaaab, 0x55555556, x5, 120, x7)
+
+inst_560:
+// rs1_val==2863311531 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xaaaaaaab, 0xaaaaaaab, x5, 124, x7)
+
+inst_561:
+// rs1_val==2863311531 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0xaaaaaaab, 0x6, x5, 128, x7)
+
+inst_562:
+// rs1_val==2863311531 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x1111110f, 0xaaaaaaab, 0x33333334, x5, 132, x7)
+
+inst_563:
+// rs1_val==2863311531 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x44444444, 0xaaaaaaab, 0x66666667, x5, 136, x7)
+
+inst_564:
+// rs1_val==2863311531 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x9ce4, 0xaaaaaaab, 0xb505, x5, 140, x7)
+
+inst_565:
+// rs1_val==2863311531 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xaaaaaaab, 0x1, x5, 144, x7)
+
+inst_566:
+// rs1_val==2863311531 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaab; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0xaaab, 0xaaaaaaab, 0x10000, x5, 148, x7)
+
+inst_567:
+// rs1_val==6 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x6, 0x3, x5, 152, x7)
+
+inst_568:
+// rs1_val==6 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0x55555555, x5, 156, x7)
+
+inst_569:
+// rs1_val==6 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0xaaaaaaaa, x5, 160, x7)
+
+inst_570:
+// rs1_val==6 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x6, 0x5, x5, 164, x7)
+
+inst_571:
+// rs1_val==6 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0x33333333, x5, 168, x7)
+
+inst_572:
+// rs1_val==6 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0x66666666, x5, 172, x7)
+
+inst_573:
+// rs1_val==6 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0xb504, x5, 176, x7)
+
+inst_574:
+// rs1_val==6 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0x0, x5, 180, x7)
+
+inst_575:
+// rs1_val==6 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0xffff, x5, 184, x7)
+
+inst_576:
+// rs1_val==6 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x6, 0x2, x5, 188, x7)
+
+inst_577:
+// rs1_val==6 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0x55555554, x5, 192, x7)
+
+inst_578:
+// rs1_val==6 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0xaaaaaaa9, x5, 196, x7)
+
+inst_579:
+// rs1_val==6 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x6, 0x4, x5, 200, x7)
+
+inst_580:
+// rs1_val==6 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0x33333332, x5, 204, x7)
+
+inst_581:
+// rs1_val==6 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0x66666665, x5, 208, x7)
+
+inst_582:
+// rs1_val==6 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0xb503, x5, 212, x7)
+
+inst_583:
+// rs1_val==6 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0xfffe, x5, 216, x7)
+
+inst_584:
+// rs1_val==6 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0x55555556, x5, 220, x7)
+
+inst_585:
+// rs1_val==6 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0xaaaaaaab, x5, 224, x7)
+
+inst_586:
+// rs1_val==6 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x6, 0x6, x5, 228, x7)
+
+inst_587:
+// rs1_val==6 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0x33333334, x5, 232, x7)
+
+inst_588:
+// rs1_val==6 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0x66666667, x5, 236, x7)
+
+inst_589:
+// rs1_val==6 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0xb505, x5, 240, x7)
+
+inst_590:
+// rs1_val==6 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x6, 0x1, x5, 244, x7)
+
+inst_591:
+// rs1_val==6 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x6, 0x6, 0x10000, x5, 248, x7)
+
+inst_592:
+// rs1_val==858993460 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x33333334, 0x3, x5, 252, x7)
+
+inst_593:
+// rs1_val==858993460 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x33333334, 0x33333334, 0x55555555, x5, 256, x7)
+
+inst_594:
+// rs1_val==858993460 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x33333334, 0x33333334, 0xaaaaaaaa, x5, 260, x7)
+
+inst_595:
+// rs1_val==858993460 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x33333334, 0x5, x5, 264, x7)
+
+inst_596:
+// rs1_val==858993460 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x33333334, 0x33333333, x5, 268, x7)
+
+inst_597:
+// rs1_val==858993460 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x33333334, 0x33333334, 0x66666666, x5, 272, x7)
+
+inst_598:
+// rs1_val==858993460 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x8994, 0x33333334, 0xb504, x5, 276, x7)
+
+inst_599:
+// rs1_val==858993460 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x33333334, 0x33333334, 0x0, x5, 280, x7)
+
+inst_600:
+// rs1_val==858993460 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x6667, 0x33333334, 0xffff, x5, 284, x7)
+
+inst_601:
+// rs1_val==858993460 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x33333334, 0x2, x5, 288, x7)
+
+inst_602:
+// rs1_val==858993460 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x33333334, 0x33333334, 0x55555554, x5, 292, x7)
+
+inst_603:
+// rs1_val==858993460 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x33333334, 0x33333334, 0xaaaaaaa9, x5, 296, x7)
+
+inst_604:
+// rs1_val==858993460 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x33333334, 0x4, x5, 300, x7)
+
+inst_605:
+// rs1_val==858993460 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x33333334, 0x33333332, x5, 304, x7)
+
+inst_606:
+// rs1_val==858993460 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x33333334, 0x33333334, 0x66666665, x5, 308, x7)
+
+inst_607:
+// rs1_val==858993460 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x1cf9, 0x33333334, 0xb503, x5, 312, x7)
+
+inst_608:
+// rs1_val==858993460 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x999a, 0x33333334, 0xfffe, x5, 316, x7)
+
+inst_609:
+// rs1_val==858993460 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x33333334, 0x33333334, 0x55555556, x5, 320, x7)
+
+inst_610:
+// rs1_val==858993460 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x33333334, 0x33333334, 0xaaaaaaab, x5, 324, x7)
+
+inst_611:
+// rs1_val==858993460 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x33333334, 0x6, x5, 328, x7)
+
+inst_612:
+// rs1_val==858993460 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x33333334, 0x33333334, x5, 332, x7)
+
+inst_613:
+// rs1_val==858993460 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x33333334, 0x33333334, 0x66666667, x5, 336, x7)
+
+inst_614:
+// rs1_val==858993460 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x412c, 0x33333334, 0xb505, x5, 340, x7)
+
+inst_615:
+// rs1_val==858993460 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x33333334, 0x1, x5, 344, x7)
+
+inst_616:
+// rs1_val==858993460 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x33333334; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x3334, 0x33333334, 0x10000, x5, 348, x7)
+
+inst_617:
+// rs1_val==1717986919 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x66666667, 0x3, x5, 352, x7)
+
+inst_618:
+// rs1_val==1717986919 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x11111112, 0x66666667, 0x55555555, x5, 356, x7)
+
+inst_619:
+// rs1_val==1717986919 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x66666667, 0x66666667, 0xaaaaaaaa, x5, 360, x7)
+
+inst_620:
+// rs1_val==1717986919 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x66666667, 0x5, x5, 364, x7)
+
+inst_621:
+// rs1_val==1717986919 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x66666667, 0x33333333, x5, 368, x7)
+
+inst_622:
+// rs1_val==1717986919 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x66666667, 0x66666666, x5, 372, x7)
+
+inst_623:
+// rs1_val==1717986919 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x5e23, 0x66666667, 0xb504, x5, 376, x7)
+
+inst_624:
+// rs1_val==1717986919 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x66666667, 0x66666667, 0x0, x5, 380, x7)
+
+inst_625:
+// rs1_val==1717986919 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0xcccd, 0x66666667, 0xffff, x5, 384, x7)
+
+inst_626:
+// rs1_val==1717986919 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x66666667, 0x2, x5, 388, x7)
+
+inst_627:
+// rs1_val==1717986919 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x11111113, 0x66666667, 0x55555554, x5, 392, x7)
+
+inst_628:
+// rs1_val==1717986919 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x66666667, 0x66666667, 0xaaaaaaa9, x5, 396, x7)
+
+inst_629:
+// rs1_val==1717986919 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x66666667, 0x4, x5, 400, x7)
+
+inst_630:
+// rs1_val==1717986919 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0x66666667, 0x33333332, x5, 404, x7)
+
+inst_631:
+// rs1_val==1717986919 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x66666667, 0x66666665, x5, 408, x7)
+
+inst_632:
+// rs1_val==1717986919 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x39f1, 0x66666667, 0xb503, x5, 412, x7)
+
+inst_633:
+// rs1_val==1717986919 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x3335, 0x66666667, 0xfffe, x5, 416, x7)
+
+inst_634:
+// rs1_val==1717986919 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x11111111, 0x66666667, 0x55555556, x5, 420, x7)
+
+inst_635:
+// rs1_val==1717986919 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x66666667, 0x66666667, 0xaaaaaaab, x5, 424, x7)
+
+inst_636:
+// rs1_val==1717986919 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x66666667, 0x6, x5, 428, x7)
+
+inst_637:
+// rs1_val==1717986919 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x33333333, 0x66666667, 0x33333334, x5, 432, x7)
+
+inst_638:
+// rs1_val==1717986919 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x66666667, 0x66666667, x5, 436, x7)
+
+inst_639:
+// rs1_val==1717986919 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x8257, 0x66666667, 0xb505, x5, 440, x7)
+
+inst_640:
+// rs1_val==1717986919 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x66666667, 0x1, x5, 444, x7)
+
+inst_641:
+// rs1_val==1717986919 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666667; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x6667, 0x66666667, 0x10000, x5, 448, x7)
+
+inst_642:
+// rs1_val==46341 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xb505, 0x3, x5, 452, x7)
+
+inst_643:
+// rs1_val==46341 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0x55555555, x5, 456, x7)
+
+inst_644:
+// rs1_val==46341 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0xaaaaaaaa, x5, 460, x7)
+
+inst_645:
+// rs1_val==46341 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xb505, 0x5, x5, 464, x7)
+
+inst_646:
+// rs1_val==46341 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0x33333333, x5, 468, x7)
+
+inst_647:
+// rs1_val==46341 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0x66666666, x5, 472, x7)
+
+inst_648:
+// rs1_val==46341 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xb505, 0xb504, x5, 476, x7)
+
+inst_649:
+// rs1_val==46341 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0x0, x5, 480, x7)
+
+inst_650:
+// rs1_val==46341 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0xffff, x5, 484, x7)
+
+inst_651:
+// rs1_val==46341 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xb505, 0x2, x5, 488, x7)
+
+inst_652:
+// rs1_val==46341 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0x55555554, x5, 492, x7)
+
+inst_653:
+// rs1_val==46341 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0xaaaaaaa9, x5, 496, x7)
+
+inst_654:
+// rs1_val==46341 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0xb505, 0x4, x5, 500, x7)
+
+inst_655:
+// rs1_val==46341 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0x33333332, x5, 504, x7)
+
+inst_656:
+// rs1_val==46341 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0x66666665, x5, 508, x7)
+
+inst_657:
+// rs1_val==46341 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0xb505, 0xb503, x5, 512, x7)
+
+inst_658:
+// rs1_val==46341 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0xfffe, x5, 516, x7)
+
+inst_659:
+// rs1_val==46341 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0x55555556, x5, 520, x7)
+
+inst_660:
+// rs1_val==46341 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0xaaaaaaab, x5, 524, x7)
+
+inst_661:
+// rs1_val==46341 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x3, 0xb505, 0x6, x5, 528, x7)
+
+inst_662:
+// rs1_val==46341 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0x33333334, x5, 532, x7)
+
+inst_663:
+// rs1_val==46341 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0x66666667, x5, 536, x7)
+
+inst_664:
+// rs1_val==46341 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xb505, 0xb505, x5, 540, x7)
+
+inst_665:
+// rs1_val==46341 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xb505, 0x1, x5, 544, x7)
+
+inst_666:
+// rs1_val==46341 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xb505; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0xb505, 0xb505, 0x10000, x5, 548, x7)
+
+inst_667:
+// rs1_val==1 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x3, x5, 552, x7)
+
+inst_668:
+// rs1_val==1 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x55555555, x5, 556, x7)
+
+inst_669:
+// rs1_val==1 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0xaaaaaaaa, x5, 560, x7)
+
+inst_670:
+// rs1_val==1 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x5, x5, 564, x7)
+
+inst_671:
+// rs1_val==1 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x33333333, x5, 568, x7)
+
+inst_672:
+// rs1_val==1 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x66666666, x5, 572, x7)
+
+inst_673:
+// rs1_val==1 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0xb504, x5, 576, x7)
+
+inst_674:
+// rs1_val==1 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x0, x5, 580, x7)
+
+inst_675:
+// rs1_val==1 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0xffff, x5, 584, x7)
+
+inst_676:
+// rs1_val==1 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x2, x5, 588, x7)
+
+inst_677:
+// rs1_val==1 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x55555554, x5, 592, x7)
+
+inst_678:
+// rs1_val==1 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0xaaaaaaa9, x5, 596, x7)
+
+inst_679:
+// rs1_val==1 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x4, x5, 600, x7)
+
+inst_680:
+// rs1_val==1 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x33333332, x5, 604, x7)
+
+inst_681:
+// rs1_val==1 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x66666665, x5, 608, x7)
+
+inst_682:
+// rs1_val==1 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0xb503, x5, 612, x7)
+
+inst_683:
+// rs1_val==1 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0xfffe, x5, 616, x7)
+
+inst_684:
+// rs1_val==1 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x55555556, x5, 620, x7)
+
+inst_685:
+// rs1_val==1 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0xaaaaaaab, x5, 624, x7)
+
+inst_686:
+// rs1_val==1 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x6, x5, 628, x7)
+
+inst_687:
+// rs1_val==1 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x33333334, x5, 632, x7)
+
+inst_688:
+// rs1_val==1 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x66666667, x5, 636, x7)
+
+inst_689:
+// rs1_val==1 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0xb505, x5, 640, x7)
+
+inst_690:
+// rs1_val==1 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x1, 0x1, x5, 644, x7)
+
+inst_691:
+// rs1_val==1 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0x10000, x5, 648, x7)
+
+inst_692:
+// rs1_val==65536 and rs2_val==3,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x3
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x10000, 0x3, x5, 652, x7)
+
+inst_693:
+// rs1_val==65536 and rs2_val==1431655765,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x55555555
+TEST_RR_OP(remu, x12, x10, x11, 0x10000, 0x10000, 0x55555555, x5, 656, x7)
+
+inst_694:
+// rs1_val==65536 and rs2_val==2863311530,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xaaaaaaaa
+TEST_RR_OP(remu, x12, x10, x11, 0x10000, 0x10000, 0xaaaaaaaa, x5, 660, x7)
+
+inst_695:
+// rs1_val==65536 and rs2_val==5,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x5
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x10000, 0x5, x5, 664, x7)
+
+inst_696:
+// rs1_val==65536 and rs2_val==858993459,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x33333333
+TEST_RR_OP(remu, x12, x10, x11, 0x10000, 0x10000, 0x33333333, x5, 668, x7)
+
+inst_697:
+// rs1_val==65536 and rs2_val==1717986918,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x66666666
+TEST_RR_OP(remu, x12, x10, x11, 0x10000, 0x10000, 0x66666666, x5, 672, x7)
+
+inst_698:
+// rs1_val==65536 and rs2_val==46340,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xb504
+TEST_RR_OP(remu, x12, x10, x11, 0x4afc, 0x10000, 0xb504, x5, 676, x7)
+
+inst_699:
+// rs1_val==65536 and rs2_val==0,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x0
+TEST_RR_OP(remu, x12, x10, x11, 0x10000, 0x10000, 0x0, x5, 680, x7)
+
+inst_700:
+// rs1_val==65536 and rs2_val==65535,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xffff
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x10000, 0xffff, x5, 684, x7)
+
+inst_701:
+// rs1_val==65536 and rs2_val==2,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x2
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x10000, 0x2, x5, 688, x7)
+
+inst_702:
+// rs1_val==65536 and rs2_val==1431655764,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x55555554
+TEST_RR_OP(remu, x12, x10, x11, 0x10000, 0x10000, 0x55555554, x5, 692, x7)
+
+inst_703:
+// rs1_val==65536 and rs2_val==2863311529,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xaaaaaaa9
+TEST_RR_OP(remu, x12, x10, x11, 0x10000, 0x10000, 0xaaaaaaa9, x5, 696, x7)
+
+inst_704:
+// rs1_val==65536 and rs2_val==4,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x4
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x10000, 0x4, x5, 700, x7)
+
+inst_705:
+// rs1_val==65536 and rs2_val==858993458,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x33333332
+TEST_RR_OP(remu, x12, x10, x11, 0x10000, 0x10000, 0x33333332, x5, 704, x7)
+
+inst_706:
+// rs1_val==65536 and rs2_val==1717986917,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x66666665
+TEST_RR_OP(remu, x12, x10, x11, 0x10000, 0x10000, 0x66666665, x5, 708, x7)
+
+inst_707:
+// rs1_val==65536 and rs2_val==46339,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xb503
+TEST_RR_OP(remu, x12, x10, x11, 0x4afd, 0x10000, 0xb503, x5, 712, x7)
+
+inst_708:
+// rs1_val==65536 and rs2_val==65534,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xfffe
+TEST_RR_OP(remu, x12, x10, x11, 0x2, 0x10000, 0xfffe, x5, 716, x7)
+
+inst_709:
+// rs1_val==65536 and rs2_val==1431655766,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x55555556
+TEST_RR_OP(remu, x12, x10, x11, 0x10000, 0x10000, 0x55555556, x5, 720, x7)
+
+inst_710:
+// rs1_val==65536 and rs2_val==2863311531,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xaaaaaaab
+TEST_RR_OP(remu, x12, x10, x11, 0x10000, 0x10000, 0xaaaaaaab, x5, 724, x7)
+
+inst_711:
+// rs1_val==65536 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x4, 0x10000, 0x6, x5, 728, x7)
+
+inst_712:
+// rs1_val==65536 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x10000, 0x10000, 0x66666667, x5, 732, x7)
+
+inst_713:
+// rs1_val==65536 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x4afb, 0x10000, 0xb505, x5, 736, x7)
+
+inst_714:
+// rs1_val==65536 and rs2_val==1,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x10000, 0x1, x5, 740, x7)
+
+inst_715:
+// rs1_val==65536 and rs2_val==65536,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x10000
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x10000, 0x10000, x5, 744, x7)
+
+inst_716:
+// rs1_val==1717986917 and rs2_val==6,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x6
+TEST_RR_OP(remu, x12, x10, x11, 0x5, 0x66666665, 0x6, x5, 748, x7)
+
+inst_717:
+// rs1_val==1717986917 and rs2_val==858993460,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x33333334
+TEST_RR_OP(remu, x12, x10, x11, 0x33333331, 0x66666665, 0x33333334, x5, 752, x7)
+
+inst_718:
+// rs1_val==1717986917 and rs2_val==1717986919,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0x66666667
+TEST_RR_OP(remu, x12, x10, x11, 0x66666665, 0x66666665, 0x66666667, x5, 756, x7)
+
+inst_719:
+// rs1_val==1717986917 and rs2_val==46341,
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x66666665; op2val:0xb505
+TEST_RR_OP(remu, x12, x10, x11, 0x8255, 0x66666665, 0xb505, x5, 760, x7)
+
+inst_720:
+// rs1_val == rs2_val and rs1_val > 0 and rs2_val > 0, rs1_val == 8388608, rs2_val == 8388608
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x800000
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0x800000, 0x800000, x5, 764, x7)
+
+inst_721:
+// rs2_val == 1, rs1_val == 2863311530, rs1_val==2863311530 and rs2_val==1
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaa; op2val:0x1
+TEST_RR_OP(remu, x12, x10, x11, 0x0, 0xaaaaaaaa, 0x1, x5, 768, x7)
+
+inst_722:
+// rs1_val == 1, rs2_val == 4294934527
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xffff7fff
+TEST_RR_OP(remu, x12, x10, x11, 0x1, 0x1, 0xffff7fff, x5, 772, x7)
+
+inst_723:
+// rs2_val == 4096, rs1_val == 4294901759
+// opcode: remu ; op1:x10; op2:x11; dest:x12; op1val:0xfffeffff; op2val:0x1000
+TEST_RR_OP(remu, x12, x10, x11, 0xfff, 0xfffeffff, 0x1000, x5, 776, x7)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x19_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x19_1:
+ .fill 17*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_0:
+ .fill 512*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_1:
+ .fill 195*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/Zicsr/I-CSRRC-01.S b/riscof/suite/rv32i_m/Zicsr/I-CSRRC-01.S
deleted file mode 100644
index c300178870355ffc553fa672b81fe391657faccd..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/Zicsr/I-CSRRC-01.S
+++ /dev/null
@@ -1,281 +0,0 @@
-# RISC-V Compliance Test I-CSRRC-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction CSRRC.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region.
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*Zicsr.*); def TEST_CASE_1=True", csrrc)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - general test of csrrc\n");
-
- # Address for test results
- la x15, test_A1_res
-
- # Register initialization
- li x1, 1
- li x2, 0
- li x3, 0x7FF0FFFF
- li x4, 0x80000000
- li x5, -1
- csrrw x0, mscratch, x5
-
- # Test
- csrrc x1, mscratch, x1
- csrrw x1, mscratch, x5
-
- csrrc x2, mscratch, x2
- csrrw x2, mscratch, x5
-
- csrrc x3, mscratch, x3
- csrrw x3, mscratch, x5
-
- csrrc x4, mscratch, x4
- csrrw x4, mscratch, x5
-
- csrrc x5, mscratch, x5
- csrrw x5, mscratch, x0
-
- # Store results
- sw x0, 0(x15)
- sw x1, 4(x15)
- sw x2, 8(x15)
- sw x3, 12(x15)
- sw x4, 16(x15)
- sw x5, 20(x15)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x1, 0xFFFFFFFE)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x2, 0xFFFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x3, 0x800F0000)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x4, 0x7FFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x5, 0x00000000)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - general test of csrrc\n");
-
- # Address for test results
- la x5, test_A2_res
-
- # Register initialization
- li x11, 1
- li x12, 0
- li x13, 0x7FF0FFFF
- li x14, 0x80000000
- li x15, -1
- csrrw x0, mscratch, x15
-
- # Test
- csrrc x11, mscratch, x11
- csrrc x12, mscratch, x12
- csrrc x13, mscratch, x13
- csrrc x14, mscratch, x14
- csrrc x15, mscratch, x15
- csrrc x16, mscratch, x0
-
-
- # Store results
- sw x11, 0(x5)
- sw x12, 4(x5)
- sw x13, 8(x5)
- sw x14, 12(x5)
- sw x15, 16(x5)
- sw x16, 20(x5)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x11, 0xFFFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x12, 0xFFFFFFFE)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x13, 0xFFFFFFFE)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x800F0000)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x000F0000)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00000000)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part B - testing forwarding between instructions\n");
-
- # Address for test results
- la x26, test_B_res
-
- # Register initialization
- li x21, 0x12345678
- li x20, -1
- csrrw x0, mscratch, x20
-
- # Test
- csrrc x22, mscratch, x21
- csrrc x21, mscratch, x22
- csrrw x23, mscratch, x20
- csrrc x24, mscratch, x23
- csrrc x25, mscratch, x0
-
- # store results
- sw x21, 0(x26)
- sw x22, 4(x26)
- sw x23, 8(x26)
- sw x24, 12(x26)
- sw x25, 16(x26)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x21, 0xEDCBA987)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x22, 0xFFFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x23, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x24, 0xFFFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x25, 0xFFFFFFFF)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A3 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part C - testing writing to x0 and reading from x0\n");
-
- # Address for test results
- la x1, test_C_res
-
- # Register initialization
- li x30, 0x42726E6F
- csrrw x0, mscratch, x30
-
- # Test
- csrrc x0, mscratch, x30
-
- # store results
- sw x0, 0(x1)
- sw x30, 4(x1)
-
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x30, 0x42726e6f)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A4 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part D - testing forwarding throught x0\n");
-
- # Address for test results
- la x2, test_D_res
-
- # Register initialization
- li x31, 0xF7FF8818
- csrrw x0, mscratch, x31
-
- # Test
- csrrc x0, mscratch, x0
- csrrc x0, mscratch, x0
- csrrc x31, mscratch, x0
-
- # store results
- sw x0, 0(x2)
- sw x31, 4(x2)
-
-
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x31, 0xF7FF8818)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A5 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part E - testing csrrc with same dst and src registers\n");
-
- # Address for test results
- la x2, test_E_res
-
- # Register initialization
- li x4, -1
- li x5, 0x96385274
- li x7, 0x32165498
- csrrw x0, mscratch, x4
-
- # Test
- csrrc x5, mscratch, x5
- csrrc x7, mscratch, x7
- csrrc x8, mscratch, x8
-
- # Store results
- sw x5, 0(x2)
- sw x7, 4(x2)
- sw x8, 8(x2)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xFFFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x69C7AD8B)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x49C1A903)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part B - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A1_res:
- .fill 6, 4, -1
-test_A2_res:
- .fill 6, 4, -1
-test_B_res:
- .fill 5, 4, -1
-test_C_res:
- .fill 2, 4, -1
-test_D_res:
- .fill 2, 4, -1
-test_E_res:
- .fill 3, 4, -1
-
-RVMODEL_DATA_END # End of test output data region.
diff --git a/riscof/suite/rv32i_m/Zicsr/I-CSRRCI-01.S b/riscof/suite/rv32i_m/Zicsr/I-CSRRCI-01.S
deleted file mode 100644
index de3d878c1eba564b2f7ccfea86f346ab0ec2e939..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/Zicsr/I-CSRRCI-01.S
+++ /dev/null
@@ -1,187 +0,0 @@
-# RISC-V Compliance Test I-CSRRCI-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction CSRRCI.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region.
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*Zicsr.*); def TEST_CASE_1=True", csrrci)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - general test of csrrci\n");
-
- # Address for test results
- la x15, test_A1_res
-
- # Register initialization
- li x8, -1
- csrrw x0, mscratch, x8
-
- # Test
- csrrci x1, mscratch, 1
- csrrw x1, mscratch, x8
-
- csrrci x2, mscratch, 0
- csrrw x2, mscratch, x8
-
- csrrci x3, mscratch, 0x1F
- csrrw x3, mscratch, x8
-
- csrrci x4, mscratch, 0x10
- csrrw x4, mscratch, x8
-
- csrrci x5, mscratch, 0xF
- csrrw x5, mscratch, x8
-
-
- # Store results
- sw x0, 0(x15)
- sw x1, 4(x15)
- sw x2, 8(x15)
- sw x3, 12(x15)
- sw x4, 16(x15)
- sw x5, 20(x15)
- sw x8, 24(x15)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x1, 0xFFFFFFFE)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x2, 0xFFFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x3, 0xFFFFFFE0)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x4, 0xFFFFFFEF)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x5, 0xFFFFFFF0)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x8, 0xFFFFFFFF)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - general test of csrrci\n");
-
- # Address for test results
- la x5, test_A2_res
-
- # Register initialization
- li x8, -1
- csrrw x0, mscratch, x8
-
- # Test
- csrrci x11, mscratch, 1
- csrrci x12, mscratch, 0
- csrrci x13, mscratch, 0x1F
- csrrci x14, mscratch, 0x10
- csrrci x15, mscratch, 0xF
- csrrci x16, mscratch, 0
-
-
- # Store results
- sw x11, 0(x5)
- sw x12, 4(x5)
- sw x13, 8(x5)
- sw x14, 12(x5)
- sw x15, 16(x5)
- sw x16, 20(x5)
- sw x8, 24(x5)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x11, 0xFFFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x12, 0xFFFFFFFE)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x13, 0xFFFFFFFE)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xFFFFFFE0)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xFFFFFFE0)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xFFFFFFE0)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x8, 0xFFFFFFFF)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part B - testing writing to x0\n");
-
- # Address for test results
- la x1, test_B_res
-
- # Register initialization
- li x20, 0x32165498
- csrrw x0, mscratch, x20
-
- # Test
- csrrci x0, mscratch, 0xF
- csrrw x20, mscratch, x20
-
-
- # store results
- sw x0, 0(x1)
- sw x20, 4(x1)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x20, 0x32165490)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A3 - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A1_res:
- .fill 7, 4, -1
-test_A2_res:
- .fill 7, 4, -1
-test_B_res:
- .fill 2, 4, -1
-
-RVMODEL_DATA_END # End of test output data region.
diff --git a/riscof/suite/rv32i_m/Zicsr/I-CSRRS-01.S b/riscof/suite/rv32i_m/Zicsr/I-CSRRS-01.S
deleted file mode 100644
index 536247d00f2e4533e044affb770fbae1df62e6b0..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/Zicsr/I-CSRRS-01.S
+++ /dev/null
@@ -1,279 +0,0 @@
-# RISC-V Compliance Test I-CSRRS-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction CSRRS.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region.
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*Zicsr.*); def TEST_CASE_1=True", csrrs)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - general test of CSRRS\n");
-
- # Address for test results
- la x15, test_A1_res
-
- # Register initialization
- li x1, 1
- li x2, 0
- li x3, 0x7FF0FFFF
- li x4, 0x80000000
- li x5, -1
- csrrw x0, mscratch, x0
-
- # Test
- csrrs x1, mscratch, x1
- csrrw x1, mscratch, x0
-
- csrrs x2, mscratch, x2
- csrrw x2, mscratch, x0
-
- csrrs x3, mscratch, x3
- csrrw x3, mscratch, x0
-
- csrrs x4, mscratch, x4
- csrrw x4, mscratch, x0
-
- csrrs x5, mscratch, x5
- csrrw x5, mscratch, x0
-
- # Store results
- sw x0, 0(x15)
- sw x1, 4(x15)
- sw x2, 8(x15)
- sw x3, 12(x15)
- sw x4, 16(x15)
- sw x5, 20(x15)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x1, 0x00000001)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x2, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x3, 0x7FF0FFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x4, 0x80000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x5, 0xFFFFFFFF)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - general test of CSRRS\n");
-
- # Address for test results
- la x5, test_A2_res
-
- # Register initialization
- li x11, 1
- li x12, 0
- li x13, 0x7FF0FFFF
- li x14, 0x80000000
- li x15, -1
- csrrw x0, mscratch, x0
-
- # Test
- csrrs x11, mscratch, x11
- csrrs x12, mscratch, x12
- csrrs x13, mscratch, x13
- csrrs x14, mscratch, x14
- csrrs x15, mscratch, x15
- csrrs x16, mscratch, x0
-
-
- # Store results
- sw x11, 0(x5)
- sw x12, 4(x5)
- sw x13, 8(x5)
- sw x14, 12(x5)
- sw x15, 16(x5)
- sw x16, 20(x5)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x11, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x12, 0x00000001)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x13, 0x00000001)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x7FF0FFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xFFF0FFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xFFFFFFFF)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part B - testing forwarding between instructions\n");
-
- # Address for test results
- la x26, test_B_res
-
- # Register initialization
- li x21, 0x12345678
- csrrw x0, mscratch, x0
-
- # Test
- csrrs x22, mscratch, x21
- csrrs x23, mscratch, x22
- csrrw x23, mscratch, x0
- csrrs x24, mscratch, x23
- csrrs x25, mscratch, x0
-
- # store results
- sw x21, 0(x26)
- sw x22, 4(x26)
- sw x23, 8(x26)
- sw x24, 12(x26)
- sw x25, 16(x26)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x21, 0x12345678)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x22, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x23, 0x12345678)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x24, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x25, 0x12345678)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A3 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part C - testing writing to x0 and reading from x0\n");
-
- # Address for test results
- la x1, test_C_res
-
- # Register initialization
- li x30, 0x42726E6F
- csrrw x0, mscratch, x30
-
- # Test
- csrrs x0, mscratch, x30
-
- # store results
- sw x0, 0(x1)
- sw x30, 4(x1)
-
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x30, 0x42726E6F)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A4 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part D - testing forwarding throught x0\n");
-
- # Address for test results
- la x2, test_D_res
-
- # Register initialization
- li x31, 0xF7FF8818
- csrrw x0, mscratch, x31
-
- # Test
- csrrs x0, mscratch, x0
- csrrs x0, mscratch, x0
- csrrs x31, mscratch, x0
-
- # store results
- sw x0, 0(x2)
- sw x31, 4(x2)
-
-
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x31, 0xF7FF8818)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A5 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part E - testing csrrs with same dst and src registers\n");
-
- # Address for test results
- la x2, test_E_res
-
- # Register initialization
- li x7, 0x32165498
- li x5, 0x96385274
- csrrw x0, mscratch, x0
-
- # Test
- csrrs x5, mscratch, x5
- csrrs x7, mscratch, x7
- csrrs x8, mscratch, x8
-
- # Store results
- sw x5, 0(x2)
- sw x7, 4(x2)
- sw x8, 8(x2)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x96385274)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xB63E56FC)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part B - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A1_res:
- .fill 6, 4, -1
-test_A2_res:
- .fill 6, 4, -1
-test_B_res:
- .fill 5, 4, -1
-test_C_res:
- .fill 2, 4, -1
-test_D_res:
- .fill 2, 4, -1
-test_E_res:
- .fill 3, 4, -1
-
-RVMODEL_DATA_END # End of test output data region.
diff --git a/riscof/suite/rv32i_m/Zicsr/I-CSRRSI-01.S b/riscof/suite/rv32i_m/Zicsr/I-CSRRSI-01.S
deleted file mode 100644
index 4b30c1fa6116d709e0598cc6f53afca716cca742..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/Zicsr/I-CSRRSI-01.S
+++ /dev/null
@@ -1,182 +0,0 @@
-# RISC-V Compliance Test I-CSRRSI-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction CSRRSI.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region.
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*Zicsr.*); def TEST_CASE_1=True", csrrsi)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - general test of CSRRSI\n");
-
- # Address for test results
- la x15, test_A1_res
-
- # Register initialization
- csrrw x0, mscratch, x0
-
- # Test
- csrrsi x1, mscratch, 1
- csrrw x1, mscratch, x0
-
- csrrsi x2, mscratch, 0
- csrrw x2, mscratch, x0
-
- csrrsi x3, mscratch, 0x1F
- csrrw x3, mscratch, x0
-
- csrrsi x4, mscratch, 0x10
- csrrw x4, mscratch, x0
-
- csrrsi x5, mscratch, 0xF
- csrrw x5, mscratch, x0
-
- # Store results
- sw x0, 0(x15)
- sw x1, 4(x15)
- sw x2, 8(x15)
- sw x3, 12(x15)
- sw x4, 16(x15)
- sw x5, 20(x15)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x1, 0x00000001)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x2, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x3, 0x0000001F)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x4, 0x00000010)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x5, 0x0000000F)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - general test of CSRRSI\n");
-
- # Address for test results
- la x5, test_A2_res
-
- # Register initialization
- csrrw x0, mscratch, x0
-
- # Test
- csrrsi x11, mscratch, 1
- csrrsi x12, mscratch, 0
- csrrsi x13, mscratch, 0x1F
- csrrsi x14, mscratch, 0x10
- csrrsi x15, mscratch, 0xF
- csrrsi x16, mscratch, 0
-
- # Store results
- sw x0, 0(x5)
- sw x11, 4(x5)
- sw x12, 8(x5)
- sw x13, 12(x5)
- sw x14, 16(x5)
- sw x15, 20(x5)
- sw x16, 24(x5)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x11, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x12, 0x00000001)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x13, 0x00000001)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x0000001F)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x0000001F)
- RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x0000001F)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part B - testing writing to x0\n");
-
- # Address for test results
- la x1, test_B_res
-
- # Register initialization
- li x20, 0x32165498
- csrrw x0, mscratch, x20
-
- # Test
- csrrsi x0, mscratch, 0xF
- csrrw x21, mscratch, x20
-
- # store results
- sw x0, 0(x1)
- sw x21, 4(x1)
- sw x20, 8(x1)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x21, 0x3216549F)
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x20, 0x32165498)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A3 - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A1_res:
- .fill 6, 4, -1
-test_A2_res:
- .fill 7, 4, -1
-test_B_res:
- .fill 3, 4, -1
-
-RVMODEL_DATA_END # End of test output data region.
diff --git a/riscof/suite/rv32i_m/Zicsr/I-CSRRW-01.S b/riscof/suite/rv32i_m/Zicsr/I-CSRRW-01.S
deleted file mode 100644
index 8a75467115cebfeab012abfb678111090e6aa0c1..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/Zicsr/I-CSRRW-01.S
+++ /dev/null
@@ -1,225 +0,0 @@
-# RISC-V Compliance Test I-CSRRW-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction CSRRW.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region.
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*Zicsr.*); def TEST_CASE_1=True",csrrw)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A - general test of CSRRW\n");
-
- # Address for test results
- la x15, test_A_res
-
- # Register initialization
- li x1, 1
- li x3, 0
- li x5, -1
- li x27, 0x7FFFFFFF
- li x29, 0x80000000
- csrrw x0, mscratch, x0
-
- # Test
- csrrw x2, mscratch, x1
- csrrw x4, mscratch, x3
- csrrw x6, mscratch, x5
- csrrw x28, mscratch, x27
- csrrw x30, mscratch, x29
- csrrw x31, mscratch, x0
-
- # Store results
- sw x2, 0(x15)
- sw x4, 4(x15)
- sw x6, 8(x15)
- sw x28, 12(x15)
- sw x30, 16(x15)
- sw x31, 20(x15)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x2, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x4, 0x00000001)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x6, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x28, 0xFFFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x30, 0x7FFFFFFF)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x31, 0x80000000)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part B - testing forwarding between instructions\n");
-
- # Address for test results
- la x26, test_B_res
-
- # Register initialization
- li x1, 0x12345678
- li x2, 0x9ABCDEF0
-
- # Test
- csrrw x0, mscratch, x1
- csrrw x3, mscratch, x2
- csrrw x4, mscratch, x3
- csrrw x5, mscratch, x4
- csrrw x6, mscratch, x0
-
- # store results
- sw x3, 0(x26)
- sw x4, 4(x26)
- sw x5, 8(x26)
- sw x6, 12(x26)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x3, 0x12345678)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x4, 0x9ABCDEF0)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x5, 0x12345678)
- RVMODEL_IO_ASSERT_GPR_EQ(x26, x6, 0x9ABCDEF0)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part C - testing writing to x0\n");
-
- # Address for test results
- la x1, test_C_res
-
- # Register initialization
- li x2, 0x42726E6F
-
- # Test
- csrrw x0, mscratch, x2
- csrrw x0, mscratch, x0
-
- # store results
- sw x0, 0(x1)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x0, 0x00000000)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A3 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part D - testing forwarding throught x0\n");
-
- # Address for test results
- la x2, test_D_res
-
- # Register initialization
- li x27, 0xF7FF8818
-
- # Test
- csrrw x0, mscratch, x27
- csrrw x0, mscratch, x0
- csrrw x0, mscratch, x0
- csrrw x5, mscratch, x0
-
- # store results
- sw x0, 0(x2)
- sw x5, 4(x2)
-
-
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A4 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part E - testing csrrw with same dst and src registers\n");
-
- # Address for test results
- la x2, test_E_res
-
- # Register initialization
- li x7, 0x32165498
- li x6, 0x14725836
- li x5, 0x96385274
-
- # Test
- csrrw x0, mscratch, x6
- csrrw x5, mscratch, x5
- csrrw x7, mscratch, x7
- csrrw x8, mscratch, x0
-
- # Store results
- sw x5, 0(x2)
- sw x7, 4(x2)
- sw x8, 8(x2)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x14725836)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x96385274)
- RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x32165498)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A5 - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A_res:
- .fill 6, 4, -1
-test_B_res:
- .fill 4, 4, -1
-test_C_res:
- .fill 1, 4, -1
-test_D_res:
- .fill 2, 4, -1
-test_E_res:
- .fill 3, 4, -1
-
-RVMODEL_DATA_END # End of test output data region.
diff --git a/riscof/suite/rv32i_m/Zicsr/I-CSRRWI-01.S b/riscof/suite/rv32i_m/Zicsr/I-CSRRWI-01.S
deleted file mode 100644
index a9e339ebde7cae67f97f8a5a0dbcfda9ef888242..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/Zicsr/I-CSRRWI-01.S
+++ /dev/null
@@ -1,129 +0,0 @@
-# RISC-V Compliance Test I-CSRRWI-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction CSRRWI.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region.
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*Zicsr.*); def TEST_CASE_1=True", csrrwi)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A - general test of CSRRWI\n");
-
- # Address for test results
- la x15, test_A_res
-
- # Register initialization
- csrrw x0, mscratch, x0
-
- # Test
- csrrwi x2, mscratch, 1
- csrrwi x4, mscratch, 0
- csrrwi x6, mscratch, 0x1F
- csrrwi x28, mscratch, 0x0F
- csrrwi x30, mscratch, 0x10
- csrrwi x31, mscratch, 0
-
- # Store results
- sw x0, 0(x15)
- sw x2, 4(x15)
- sw x4, 8(x15)
- sw x6, 12(x15)
- sw x28, 16(x15)
- sw x30, 20(x15)
- sw x31, 24(x15)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x0, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x2, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x4, 0x00000001)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x6, 0x00000000)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x28, 0x0000001F)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x30, 0x0000000F)
- RVMODEL_IO_ASSERT_GPR_EQ(x15, x31, 0x00000010)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part B - testing writing to x0\n");
-
- # Address for test results
- la x1, test_B_res
-
- # Test
- csrrwi x0, mscratch, 0xF
- csrrwi x0, mscratch, 0
-
- # store results
- sw x0, 0(x1)
-
- RVMODEL_IO_ASSERT_GPR_EQ(x1, x0, 0x00000000)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A2 - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A_res:
- .fill 7, 4, -1
-test_B_res:
- .fill 1, 4, -1
-
-RVMODEL_DATA_END # End of test output data region.
diff --git a/riscof/suite/rv32i_m/Zifencei/Fencei.S b/riscof/suite/rv32i_m/Zifencei/Fencei.S
new file mode 100644
index 0000000000000000000000000000000000000000..81be62ed5be0deb705a607e207d1561e68247c35
--- /dev/null
+++ b/riscof/suite/rv32i_m/Zifencei/Fencei.S
@@ -0,0 +1,99 @@
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the fence.i instruction of the RISC-V Zifencei extension.
+//
+
+#include "model_test.h"
+#include "arch_test.h"
+
+# Test Virtual Machine (TVM) used by program.
+RVTEST_ISA("RV32I")
+
+# Test code region
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
+RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
+
+#ifdef TEST_CASE_1
+ RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*Zifencei.*); def TEST_CASE_1=True", fencei)
+
+ # ---------------------------------------------------------------------------------------------
+ RVMODEL_IO_WRITE_STR(x31, "# Test part A - test fence\n");
+
+ # Addresses for test data and results
+ la x16, test_A_data
+ la x17, test_A_res
+
+ # Register initialization
+ li x3, 0
+
+ # Load testdata
+ lw x1, 0(x16)
+ lw x2, 4(x16)
+
+ # Test
+ la x20, instr_A_src
+ la x21, instr_A_dst
+ lw x15, 0(x20)
+ sw x15, 0(x21)
+ fence.i
+instr_A_dst:
+ lui x2, 0
+
+ # Store results
+ sw x1, 0(x17)
+ sw x2, 4(x17)
+ sw x3, 8(x17)
+ sw x15, 12(x17)
+
+ //
+ // Assert
+ //
+ RVMODEL_IO_ASSERT_GPR_EQ(x17, x2, 0x00000012)
+ RVMODEL_IO_ASSERT_GPR_EQ(x17, x3, 0x00000042)
+ RVMODEL_IO_ASSERT_GPR_EQ(x17, x15, 0x001101B3)
+
+ RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
+
+ RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
+
+#endif
+
+ # ---------------------------------------------------------------------------------------------
+ # HALT
+ RVMODEL_HALT
+
+RVTEST_CODE_END
+
+RVTEST_DATA_BEGIN
+# Input data section.
+ .data
+ .align 4
+
+instr_A_src:
+ add x3, x2, x1
+
+test_A_data:
+ .word 0x30
+ .word 0x12
+RVTEST_DATA_END
+
+
+# Output data section.
+RVMODEL_DATA_BEGIN
+test_A_res:
+ .fill 4, 4, 0xdeadbeef
+
+#ifdef rvtest_gpr_save
+gpr_save:
+ .fill 32*(XLEN/32), 4, 0xdeadbeef
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/Zifencei/I-FENCE.I-01.S b/riscof/suite/rv32i_m/Zifencei/I-FENCE.I-01.S
deleted file mode 100644
index 90f1c702f0accd76560dcf72883fd0f616e18ca1..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/Zifencei/I-FENCE.I-01.S
+++ /dev/null
@@ -1,117 +0,0 @@
-# RISC-V Compliance Test I-FENCE.I-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction FENCE.I.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x31, "# Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check ISA:=regex(.*Zifencei.*); def TEST_CASE_1=True", fencei)
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x31, "# Test part A - test fence\n");
-
- # Addresses for test data and results
- la x16, test_A_data
- la x17, test_A_res
-
- # Register initialization
- li x3, 0
-
- # Load testdata
- lw x1, 0(x16)
- lw x2, 4(x16)
-
- # Test
- la x20, instr_A_src
- la x21, instr_A_dst
- lw x15, 0(x20)
- sw x15, 0(x21)
- fence.i
-instr_A_dst:
- lui x2, 0
-
- # Store results
- sw x1, 0(x17)
- sw x2, 4(x17)
- sw x3, 8(x17)
- sw x15, 12(x17)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_ASSERT_GPR_EQ(x17, x2, 0x00000012)
- RVMODEL_IO_ASSERT_GPR_EQ(x17, x3, 0x00000042)
- RVMODEL_IO_ASSERT_GPR_EQ(x17, x15, 0x001101B3)
-
- RVMODEL_IO_WRITE_STR(x31, "# Test part A1 - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x31, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-instr_A_src:
- add x3, x2, x1
-
-test_A_data:
- .word 0x30
- .word 0x12
-
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A_res:
- .fill 4, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/privilege/I-EBREAK-01.S b/riscof/suite/rv32i_m/privilege/I-EBREAK-01.S
deleted file mode 100644
index 0b9a0da176c5c6bed0664820eaa245e6202af3b4..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/privilege/I-EBREAK-01.S
+++ /dev/null
@@ -1,123 +0,0 @@
-# RISC-V Compliance Test I-EBREAK-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction EBREAK.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x30, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x30, "# Test Begin Reserved reg x31\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",ebreak)
-
- # Save and set trap handler address
- la x1, _trap_handler
- csrrw x31, mtvec, x1
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part A - test EBREAK\n");
-
- # Address for test results
- la x1, test_A_res_exc
-
- # Test
- li x2, 0x11111111
- ebreak
- sw x0, 0(x1)
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- # restore mtvec and jump to the end
- csrw mtvec, x31
- jal x0, test_end
-
- # ---------------------------------------------------------------------------------------------
- # Exception handler
-_trap_handler:
- # increment return address
- csrr x30, mepc
- addi x30, x30, 4
- csrw mepc, x30
-
- # Store MCAUSE
- csrr x30, mcause
- sw x30, 0(x1)
-
- # Store data from test
- sw x2, 4(x1)
- sw x0, 8(x1)
-
- # increment data_exc address
- addi x1, x1, 12
-
- # return
- mret
-
- # ---------------------------------------------------------------------------------------------
-
-test_end:
-
- RVMODEL_IO_WRITE_STR(x30, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A_res_exc:
- .fill 4, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/privilege/I-ECALL-01.S b/riscof/suite/rv32i_m/privilege/I-ECALL-01.S
deleted file mode 100644
index 84b006178504980c9c0511c57a5719274194fcdb..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/privilege/I-ECALL-01.S
+++ /dev/null
@@ -1,125 +0,0 @@
-# RISC-V Compliance Test I-ECALL-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction ECALL.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x30, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x30, "# Test Begin Reserved reg x31\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",ecall)
-
- # Save and set trap handler address
- la x1, _trap_handler
- csrrw x31, mtvec, x1
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part A - test ECALL\n");
-
- # Address for test results
- la x1, test_A_res_exc
-
- # Test
- li x2, 0x11111111
- ecall
- sw x0, 0(x1)
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- # restore mtvec and jump to the end
- csrw mtvec, x31
- jal x0, test_end
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part A2 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- # Exception handler
-_trap_handler:
- # increment return address
- csrr x30, mepc
- addi x30, x30, 4
- csrw mepc, x30
-
- # Store MCAUSE
- csrr x30, mcause
- sw x30, 0(x1)
-
- # Store data from test
- sw x2, 4(x1)
- sw x0, 8(x1)
-
- # increment data_exc address
- addi x1, x1, 12
-
- # return
- mret
-
- # ---------------------------------------------------------------------------------------------
-
-test_end:
-
- RVMODEL_IO_WRITE_STR(x30, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A_res_exc:
- .fill 4, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/privilege/I-MISALIGN_JMP-01.S b/riscof/suite/rv32i_m/privilege/I-MISALIGN_JMP-01.S
deleted file mode 100644
index 08ad72ed2e9fa5e03f7f1725f46bd82cb19d2338..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/privilege/I-MISALIGN_JMP-01.S
+++ /dev/null
@@ -1,351 +0,0 @@
-# RISC-V Compliance Test I-MISALIGN_JMP-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing MISALIGNED JUMP exception.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x30, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x30, "# Test Begin Reserved reg x31\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True", misalign-jal, misalign-beq, misalign-bge, misalign-bgeu, misalign-blt, misalign-bltu, misalign-bne, misalign-jalr)
-
- # Save and set trap handler address
- la x1, _trap_handler
- csrrw x31, mtvec, x1
-
- # switch off C
- csrrci x0, misa, 4
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part A1 - test JAL\n");
-
- # Address for test results
- la x1, test_A1_res_exc
-
- # Test
- li x2, 0x11111111
- jal x0, 1f + 2
- li x2, 0
-1:
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_WRITE_STR(x30, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part A2 - test JALR - NOT causing the exception\n");
-
- # Address for test results
- la x1, test_A2_res
-
- # Test
- li x2, 0x22222222
- la x4, 1f + 1
- jalr x0, x4, 0
- li x2, 0
-1:
- sw x2, 0(x1)
- addi x1, x1, 4
-
- li x2, 0x33333333
- la x4, 1f
- jalr x0, x4, 1
- li x2, 0
-1:
- sw x2, 0(x1)
- addi x1, x1, 4
-
- li x2, 0x44444444
- la x4, 1f
- jalr x0, x4, -3
- li x2, 0
-
- sw x2, 0(x1)
-1:
- addi x1, x1, 4
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part A2 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part A3 - test JALR - causing the exception\n");
-
- # Address for test results
- la x1, test_A3_res_exc
-
- # Test
- li x2, 0x55555555
- la x4, 1f + 2
- jalr x0, x4, 0
- li x2, 0
-1:
-
- li x2, 0x66666666
- la x4, 1f + 3
- jalr x0, x4, 0
- li x2, 0
-1:
-
- # Test
- li x2, 0x77777777
- la x4, 1f
- jalr x0, x4, 2
- li x2, 0
-1:
-
- li x2, 0x88888888
- la x4, 1f
- jalr x0, x4, 3
- li x2, 0
-1:
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part A3 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part B1 - test BEQ\n");
-
- # Address for test results
- la x1, test_B1_res_exc
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- beq x5, x6, 1f + 2
- li x2, 0x99999999
-1:
- nop
- nop
- beq x5, x5, 1f + 2
- li x2, 0
-1:
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part A4 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part B2 - test BNE\n");
-
- # Address for test results
- la x1, test_B2_res_exc
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- bne x5, x5, 1f + 2
- li x2, 0xAAAAAAAA
-1:
- nop
- nop
- bne x5, x6, 1f + 2
- li x2, 0
-1:
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part A5 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part B3 - test BLT\n");
-
- # Address for test results
- la x1, test_B3_res_exc
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- blt x6, x5, 1f + 2
- li x2, 0xBBBBBBBB
-1:
- nop
- nop
- blt x5, x6, 1f + 2
- li x2, 0
-1:
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part B - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part B4 - test BLTU\n");
-
- # Address for test results
- la x1, test_B4_res_exc
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- bltu x6, x5, 1f + 2
- li x2, 0xCCCCCCCC
-1:
- nop
- nop
- bltu x5, x6, 1f + 2
- li x2, 0
-1:
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part C - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part B5 - test BGE\n");
-
- # Address for test results
- la x1, test_B5_res_exc
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- bge x5, x6, 1f + 2
- li x2, 0xDDDDDDDD
-1:
- nop
- nop
- bge x6, x5, 1f + 2
- li x2, 0
-1:
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part D - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part B6 - test BGEU\n");
-
- # Address for test results
- la x1, test_B6_res_exc
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- bgeu x5, x6, 1f + 2
- li x2, 0xEEEEEEEE
-1:
- nop
- nop
- bgeu x6, x5, 1f + 2
- li x2, 0
-1:
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part E - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- # restore mtvec and jump to the end
- csrw mtvec, x31
- jal x0, test_end
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- # Exception handler
-_trap_handler:
- # increment return address
- csrr x30, mtval
- addi x30, x30, -2
- csrw mepc, x30
-
- # store low bits of mtval
- csrr x30, mtval
- andi x30, x30, 3
- sw x30, 0(x1)
-
- # Store MCAUSE
- csrr x30, mcause
- sw x30, 4(x1)
-
- # Store data from test
- sw x2, 8(x1)
-
- # increment data_exc address
- addi x1, x1, 12
-
- # return
- mret
- RVMODEL_IO_WRITE_STR(x30, "# Test part A2 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
-
-test_end:
- RVMODEL_IO_WRITE_STR(x30, "# Test part A3 - Complete\n");
-
- RVMODEL_IO_WRITE_STR(x30, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A1_res_exc:
- .fill 3, 4, -1
-test_A2_res:
- .fill 3, 4, -1
-test_A3_res_exc:
- .fill 12, 4, -1
-test_B1_res_exc:
- .fill 3, 4, -1
-test_B2_res_exc:
- .fill 3, 4, -1
-test_B3_res_exc:
- .fill 3, 4, -1
-test_B4_res_exc:
- .fill 3, 4, -1
-test_B5_res_exc:
- .fill 3, 4, -1
-test_B6_res_exc:
- .fill 3, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/privilege/I-MISALIGN_LDST-01.S b/riscof/suite/rv32i_m/privilege/I-MISALIGN_LDST-01.S
deleted file mode 100644
index ac3479a5ae2c3c13c6cfd9b4a25933a00696d1c8..0000000000000000000000000000000000000000
--- a/riscof/suite/rv32i_m/privilege/I-MISALIGN_LDST-01.S
+++ /dev/null
@@ -1,261 +0,0 @@
-# RISC-V Compliance Test I-MISALIGN_LDST-01
-#
-# Copyright (c) 2017, Codasip Ltd.
-# Copyright (c) 2018, Imperas Software Ltd. Additions
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
-# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV32I Base Integer Instruction Set, Version 2.0
-# Description: Testing MISALIGNED LOAD/STORE exception.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-# Test Virtual Machine (TVM) used by program.
-RVTEST_ISA("RV32I")
-
-# Test code region
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x30, x0, 0x00000000)
- RVMODEL_IO_WRITE_STR(x30, "# Test Begin Reserved reg x31\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*32.*); check ISA:=regex(.*I.*); check hw_data_misaligned_support:=False; def TEST_CASE_1=True", misalign-sw, misalign-sh, misalign-lw, misalign-lhu, misalign-lh)
-
- # Save and set trap handler address
- la x1, _trap_handler
- csrrw x31, mtvec, x1
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part A1 - test LW\n");
-
- # Addresses for test data and results
- la x3, test_A1_data
- la x2, test_A1_res
- la x1, test_A1_res_exc
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- lw x4, 0(x3)
- sw x4, 0(x2)
-
- lw x4, 1(x3)
- sw x4, 4(x2)
-
- lw x4, 2(x3)
- sw x4, 8(x2)
-
- lw x4, 3(x3)
- sw x4, 12(x2)
-
- //
- // Assert
- //
- RVMODEL_IO_CHECK()
- RVMODEL_IO_WRITE_STR(x30, "# Test part A1 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part A2 - test LH and LHU\n");
-
- # Addresses for test data and results
- la x3, test_A2_data
- la x2, test_A2_res
- la x1, test_A2_res_exc
-
- # Register initialization
- li x5, 5
- li x6, 6
-
- # Test
- lh x4, 0(x3)
- sw x4, 0(x2)
-
- lh x4, 1(x3)
- sw x4, 4(x2)
-
- lh x4, 2(x3)
- sw x4, 8(x2)
-
- lh x4, 3(x3)
- sw x4, 12(x2)
-
- lhu x4, 0(x3)
- sw x4, 16(x2)
-
- lhu x4, 1(x3)
- sw x4, 20(x2)
-
- lhu x4, 2(x3)
- sw x4, 24(x2)
-
- lhu x4, 3(x3)
- sw x4, 28(x2)
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part A2 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part B1 - test SW\n");
-
- # Addresses for test data and results
- la x2, test_B1_res
- la x1, test_B1_res_exc
-
- # Register initialization
- li x6, 0x0
- li x5, 0x99999999
-
- # Init memory
- sw x5, 0(x2)
- sw x5, 4(x2)
- sw x5, 8(x2)
- sw x5, 12(x2)
-
- # Test
- sw x6, 0(x2)
- addi x2, x2, 4
-
- sw x6, 1(x2)
- addi x2, x2, 4
-
- sw x6, 2(x2)
- addi x2, x2, 4
-
- sw x6, 3(x2)
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part A3 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- RVMODEL_IO_WRITE_STR(x30, "# Test part B2 - test SH\n");
-
- # Addresses for test data and results
- la x2, test_B2_res
- la x1, test_B2_res_exc
-
- # Register initialization
- li x6, 0x0
- li x5, 0x99999999
-
- # Init memory
- sw x5, 0(x2)
- sw x5, 4(x2)
- sw x5, 8(x2)
- sw x5, 12(x2)
-
- # Test
- sh x6, 0(x2)
- addi x2, x2, 4
-
- sh x6, 1(x2)
- addi x2, x2, 4
-
- sh x6, 2(x2)
- addi x2, x2, 4
-
- sh x6, 3(x2)
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part A4 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- # restore mtvec and jump to the end
- csrw mtvec, x31
- jal x0, test_end
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part A5 - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
- # Exception handler
-_trap_handler:
- # increment return address
- csrr x30, mepc
- addi x30, x30, 4
- csrw mepc, x30
-
- # store low bits of mtval
- csrr x30, mtval
- andi x30, x30, 3
- sw x30, 0(x1)
-
- # Store MCAUSE
- csrr x30, mcause
- sw x30, 4(x1)
-
- # increment data_exc address
- addi x1, x1, 8
-
- # return
- mret
-
- RVMODEL_IO_WRITE_STR(x30, "# Test part B - Complete\n");
-
- # ---------------------------------------------------------------------------------------------
-
-test_end:
-
- RVMODEL_IO_WRITE_STR(x30, "# Test End\n")
-
-#endif
-
- # ---------------------------------------------------------------------------------------------
- # HALT
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
- .align 4
-
-test_A1_data:
- .word 0x91A1B1C1
-test_A2_data:
- .word 0xD2E2F202
-
-# Output data section.
-RVMODEL_DATA_BEGIN
- .align 4
-
-test_A1_res:
- .fill 4, 4, -1
-test_A1_res_exc:
- .fill 6, 4, -1
-test_A2_res:
- .fill 8, 4, -1
-test_A2_res_exc:
- .fill 8, 4, -1
-test_B1_res:
- .fill 4, 4, -1
-test_B1_res_exc:
- .fill 6, 4, -1
-test_B2_res:
- .fill 4, 4, -1
-test_B2_res_exc:
- .fill 4, 4, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/privilege/ebreak.S b/riscof/suite/rv32i_m/privilege/ebreak.S
new file mode 100644
index 0000000000000000000000000000000000000000..de0fac21020fc082456bbe270df5b8e219944508
--- /dev/null
+++ b/riscof/suite/rv32i_m/privilege/ebreak.S
@@ -0,0 +1,64 @@
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the ebreak instruction of the RISC-V I extension.
+//
+
+#include "model_test.h"
+#include "arch_test.h"
+
+RVTEST_ISA("RV32I")
+
+# Test code region
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ebreak)
+ # ---------------------------------------------------------------------------------------------
+
+ la x1, test_A_res
+
+ li x2, 0x11111111
+ ebreak
+ nop
+ nop
+ sw x0, 0(x1)
+ sw x2, 4(x1)
+
+ RVMODEL_IO_WRITE_STR(x30, "# Test part A - test EBREAK\n");
+
+ RVMODEL_IO_WRITE_STR(x30, "# Test End\n")
+
+#endif
+
+ # ---------------------------------------------------------------------------------------------
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+# Input data section.
+ .data
+ .align 4
+RVTEST_DATA_END
+
+# Output data section.
+RVMODEL_DATA_BEGIN
+test_A_res:
+ .fill 2, 4, 0xdeadbeef
+
+mtrap_sigptr:
+ .fill 4, 4, 0xdeadbeef
+
+#ifdef rvtest_gpr_save
+gpr_save:
+ .fill 32*(XLEN/32), 4, 0xdeadbeef
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/privilege/ecall.S b/riscof/suite/rv32i_m/privilege/ecall.S
new file mode 100644
index 0000000000000000000000000000000000000000..f037254757be17832454289dc568bc4722d2231b
--- /dev/null
+++ b/riscof/suite/rv32i_m/privilege/ecall.S
@@ -0,0 +1,66 @@
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the ecall instruction of the RISC-V I extension.
+//
+
+#include "model_test.h"
+#include "arch_test.h"
+
+RVTEST_ISA("RV32I")
+
+# Test code region
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ecall)
+
+ # ---------------------------------------------------------------------------------------------
+ la x1, test_A_res
+
+ li x2, 0x11111111
+ ecall
+ nop
+ nop
+ sw x0, 0(x1)
+ sw x2, 4(x1)
+
+ RVMODEL_IO_WRITE_STR(x30, "# Test part A - test EBREAK\n");
+
+ RVMODEL_IO_WRITE_STR(x30, "# Test End\n")
+
+#endif
+
+ # ---------------------------------------------------------------------------------------------
+ # HALT
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+# Input data section.
+ .data
+ .align 4
+RVTEST_DATA_END
+
+# Output data section.
+RVMODEL_DATA_BEGIN
+
+test_A_res:
+ .fill 2, 4, 0xdeadbeef
+
+mtrap_sigptr:
+ .fill 4, 4, 0xdeadbeef
+
+#ifdef rvtest_gpr_save
+gpr_save:
+ .fill 32*(XLEN/32), 4, 0xdeadbeef
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/privilege/misalign-beq-01.S b/riscof/suite/rv32i_m/privilege/misalign-beq-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..691bacff7125730aa4a991dae799e65ec066b4f6
--- /dev/null
+++ b/riscof/suite/rv32i_m/privilege/misalign-beq-01.S
@@ -0,0 +1,76 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:45:45 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i_priv.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the beq instruction of the RISC-V I extension for the misalign-beq covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*); def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",misalign-beq)
+
+RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",misalign-beq)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1_val==rs2_val and ea_align == 2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x5; immval:0x8; align:2
+TEST_BRANCH_OP(beq, x2, x10, x11, 0x5, 0x5, 0x8, 3f, x1, 0,2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 1*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/privilege/misalign-bge-01.S b/riscof/suite/rv32i_m/privilege/misalign-bge-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..e02a50138142217afcb04ed79d0855e5466cfb3f
--- /dev/null
+++ b/riscof/suite/rv32i_m/privilege/misalign-bge-01.S
@@ -0,0 +1,76 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:45:45 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i_priv.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the bge instruction of the RISC-V I extension for the misalign-bge covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*); def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",misalign-bge)
+
+RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",misalign-bge)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1_val>rs2_val and ea_align == 2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4000000; op2val:-0xb503; immval:0x0; align:2
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4000000, -0xb503, 0x0, 3f, x1, 0,2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 1*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/privilege/misalign-bgeu-01.S b/riscof/suite/rv32i_m/privilege/misalign-bgeu-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..8fee6b79484f12a0d9145d2580cc7f9bc429f059
--- /dev/null
+++ b/riscof/suite/rv32i_m/privilege/misalign-bgeu-01.S
@@ -0,0 +1,76 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:45:45 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i_priv.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the bgeu instruction of the RISC-V I extension for the misalign-bgeu covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*); def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",misalign-bgeu)
+
+RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",misalign-bgeu)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1_val>rs2_val and ea_align == 2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x55555555; op2val:0x20000000; immval:0x400; align:2
+TEST_BRANCH_OP(bgeu, x2, x10, x11, 0x55555555, 0x20000000, 0x400, 1b, x1, 0,2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 1*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv32i_m/privilege/misalign-blt-01.S b/riscof/suite/rv32i_m/privilege/misalign-blt-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..a29614737e62cd110367d51410f7cede4f8f2be8
--- /dev/null
+++ b/riscof/suite/rv32i_m/privilege/misalign-blt-01.S
@@ -0,0 +1,76 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Tue Dec 15 15:45:45 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv32i_priv.cgf') \
+// -- xlen 32 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the blt instruction of the RISC-V I extension for the misalign-blt covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV32I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*C.*); def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",misalign-blt)
+
+RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",misalign-blt)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1_val 0, rs2_val == 9223372036854775807
+// opcode: c.add; op1:x20; op2:x19; op1val:0x6666666666666665; op2val:0x7fffffffffffffff
+TEST_CR_OP( c.add, x20, x19, 0xe666666666666664, 0x6666666666666665, 0x7fffffffffffffff, x6, 16, x17)
+
+inst_3:
+// rs1==x26, rs2==x24, rs2_val == 1, rs1_val == -536870913
+// opcode: c.add; op1:x26; op2:x24; op1val:-0x20000001; op2val:0x1
+TEST_CR_OP( c.add, x26, x24, 0xffffffffe0000000, -0x20000001, 0x1, x6, 24, x17)
+
+inst_4:
+// rs1==x12, rs2==x20, rs1_val == (-2**(xlen-1)), rs2_val == 549755813888, rs1_val == -9223372036854775808
+// opcode: c.add; op1:x12; op2:x20; op1val:-0x8000000000000000; op2val:0x8000000000
+TEST_CR_OP( c.add, x12, x20, 0x8000008000000000, -0x8000000000000000, 0x8000000000, x6, 32, x17)
+
+inst_5:
+// rs1==x2, rs2==x9, rs1_val == 0, rs2_val == 140737488355328
+// opcode: c.add; op1:x2; op2:x9; op1val:0x0; op2val:0x800000000000
+TEST_CR_OP( c.add, x2, x9, 0x800000000000, 0x0, 0x800000000000, x6, 40, x17)
+
+inst_6:
+// rs1==x29, rs2==x3, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807
+// opcode: c.add; op1:x29; op2:x3; op1val:0x7fffffffffffffff; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x29, x3, 0xb333333333333333, 0x7fffffffffffffff, 0x3333333333333334, x6, 48, x17)
+
+inst_7:
+// rs1==x0, rs2==x7, rs1_val == 1, rs2_val == 68719476736
+// opcode: c.add; op1:x0; op2:x7; op1val:0x0; op2val:0x1000000000
+TEST_CR_OP( c.add, x0, x7, 0, 0x0, 0x1000000000, x6, 56, x17)
+
+inst_8:
+// rs1==x28, rs2==x10, rs2_val == 2, rs1_val == 4611686018427387904
+// opcode: c.add; op1:x28; op2:x10; op1val:0x4000000000000000; op2val:0x2
+TEST_CR_OP( c.add, x28, x10, 0x4000000000000002, 0x4000000000000000, 0x2, x6, 64, x17)
+
+inst_9:
+// rs1==x14, rs2==x12, rs2_val == 4, rs1_val == -4611686018427387905
+// opcode: c.add; op1:x14; op2:x12; op1val:-0x4000000000000001; op2val:0x4
+TEST_CR_OP( c.add, x14, x12, 0xc000000000000003, -0x4000000000000001, 0x4, x6, 72, x17)
+
+inst_10:
+// rs1==x18, rs2==x13, rs2_val == 8, rs1_val == -4097
+// opcode: c.add; op1:x18; op2:x13; op1val:-0x1001; op2val:0x8
+TEST_CR_OP( c.add, x18, x13, 0xfffffffffffff007, -0x1001, 0x8, x6, 80, x17)
+
+inst_11:
+// rs1==x25, rs2==x28, rs2_val == 16, rs1_val == 4
+// opcode: c.add; op1:x25; op2:x28; op1val:0x4; op2val:0x10
+TEST_CR_OP( c.add, x25, x28, 0x14, 0x4, 0x10, x6, 88, x17)
+
+inst_12:
+// rs1==x15, rs2==x31, rs2_val == 32, rs1_val == -134217729
+// opcode: c.add; op1:x15; op2:x31; op1val:-0x8000001; op2val:0x20
+TEST_CR_OP( c.add, x15, x31, 0xfffffffff800001f, -0x8000001, 0x20, x6, 96, x17)
+
+inst_13:
+// rs1==x8, rs2==x29, rs2_val == 64, rs1_val == -70368744177665
+// opcode: c.add; op1:x8; op2:x29; op1val:-0x400000000001; op2val:0x40
+TEST_CR_OP( c.add, x8, x29, 0xffffc0000000003f, -0x400000000001, 0x40, x6, 104, x17)
+
+inst_14:
+// rs1==x27, rs2==x30, rs2_val == 128, rs1_val == 2251799813685248
+// opcode: c.add; op1:x27; op2:x30; op1val:0x8000000000000; op2val:0x80
+TEST_CR_OP( c.add, x27, x30, 0x8000000000080, 0x8000000000000, 0x80, x6, 112, x17)
+
+inst_15:
+// rs1==x24, rs2==x27, rs2_val == 256,
+// opcode: c.add; op1:x24; op2:x27; op1val:0x6666666666666666; op2val:0x100
+TEST_CR_OP( c.add, x24, x27, 0x6666666666666766, 0x6666666666666666, 0x100, x6, 120, x17)
+
+inst_16:
+// rs1==x10, rs2==x11, rs2_val == 512,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x9; op2val:0x200
+TEST_CR_OP( c.add, x10, x11, 0x209, 0x9, 0x200, x6, 128, x17)
+
+inst_17:
+// rs1==x16, rs2==x4, rs2_val == 1024,
+// opcode: c.add; op1:x16; op2:x4; op1val:0x6666666666666665; op2val:0x400
+TEST_CR_OP( c.add, x16, x4, 0x6666666666666a65, 0x6666666666666665, 0x400, x6, 136, x17)
+
+inst_18:
+// rs1==x19, rs2==x18, rs2_val == 2048, rs1_val == -16385
+// opcode: c.add; op1:x19; op2:x18; op1val:-0x4001; op2val:0x800
+TEST_CR_OP( c.add, x19, x18, 0xffffffffffffc7ff, -0x4001, 0x800, x6, 144, x17)
+
+inst_19:
+// rs1==x9, rs2==x22, rs2_val == 4096, rs1_val == 36028797018963968
+// opcode: c.add; op1:x9; op2:x22; op1val:0x80000000000000; op2val:0x1000
+TEST_CR_OP( c.add, x9, x22, 0x80000000001000, 0x80000000000000, 0x1000, x6, 152, x17)
+
+inst_20:
+// rs1==x23, rs2==x16, rs2_val == 8192,
+// opcode: c.add; op1:x23; op2:x16; op1val:0x5555555555555554; op2val:0x2000
+TEST_CR_OP( c.add, x23, x16, 0x5555555555557554, 0x5555555555555554, 0x2000, x6, 160, x5)
+RVTEST_SIGBASE( x4,signature_x4_0)
+
+inst_21:
+// rs1==x31, rs2==x25, rs2_val == 16384,
+// opcode: c.add; op1:x31; op2:x25; op1val:0xb504f333; op2val:0x4000
+TEST_CR_OP( c.add, x31, x25, 0xb5053333, 0xb504f333, 0x4000, x4, 0, x5)
+
+inst_22:
+// rs1==x30, rs2==x26, rs2_val == 32768,
+// opcode: c.add; op1:x30; op2:x26; op1val:-0x8; op2val:0x8000
+TEST_CR_OP( c.add, x30, x26, 0x7ff8, -0x8, 0x8000, x4, 8, x5)
+
+inst_23:
+// rs1==x17, rs2==x21, rs2_val == 65536, rs1_val == -576460752303423489
+// opcode: c.add; op1:x17; op2:x21; op1val:-0x800000000000001; op2val:0x10000
+TEST_CR_OP( c.add, x17, x21, 0xf80000000000ffff, -0x800000000000001, 0x10000, x4, 16, x5)
+
+inst_24:
+// rs1==x13, rs2==x14, rs2_val == 131072, rs1_val == -2251799813685249
+// opcode: c.add; op1:x13; op2:x14; op1val:-0x8000000000001; op2val:0x20000
+TEST_CR_OP( c.add, x13, x14, 0xfff800000001ffff, -0x8000000000001, 0x20000, x4, 24, x5)
+
+inst_25:
+// rs1==x7, rs2==x17, rs2_val == 262144, rs1_val == 262144
+// opcode: c.add; op1:x7; op2:x17; op1val:0x40000; op2val:0x40000
+TEST_CR_OP( c.add, x7, x17, 0x80000, 0x40000, 0x40000, x4, 32, x5)
+
+inst_26:
+// rs1==x3, rs2==x23, rs2_val == 524288,
+// opcode: c.add; op1:x3; op2:x23; op1val:0x80000000000000; op2val:0x80000
+TEST_CR_OP( c.add, x3, x23, 0x80000000080000, 0x80000000000000, 0x80000, x4, 40, x5)
+
+inst_27:
+// rs1==x21, rs2==x8, rs2_val == 1048576,
+// opcode: c.add; op1:x21; op2:x8; op1val:0x40000; op2val:0x100000
+TEST_CR_OP( c.add, x21, x8, 0x140000, 0x40000, 0x100000, x4, 48, x5)
+
+inst_28:
+// rs1==x11, rs2==x15, rs2_val == 2097152, rs1_val == -72057594037927937
+// opcode: c.add; op1:x11; op2:x15; op1val:-0x100000000000001; op2val:0x200000
+TEST_CR_OP( c.add, x11, x15, 0xff000000001fffff, -0x100000000000001, 0x200000, x4, 56, x5)
+
+inst_29:
+// rs1==x1, rs2==x6, rs2_val == 4194304, rs1_val == 17592186044416
+// opcode: c.add; op1:x1; op2:x6; op1val:0x100000000000; op2val:0x400000
+TEST_CR_OP( c.add, x1, x6, 0x100000400000, 0x100000000000, 0x400000, x4, 64, x5)
+
+inst_30:
+// rs1==x22, rs2==x2, rs2_val == 8388608, rs1_val == 2305843009213693952
+// opcode: c.add; op1:x22; op2:x2; op1val:0x2000000000000000; op2val:0x800000
+TEST_CR_OP( c.add, x22, x2, 0x2000000000800000, 0x2000000000000000, 0x800000, x4, 72, x5)
+
+inst_31:
+// rs1==x6, rs2_val == 16777216, rs1_val == -2
+// opcode: c.add; op1:x6; op2:x11; op1val:-0x2; op2val:0x1000000
+TEST_CR_OP( c.add, x6, x11, 0xfffffe, -0x2, 0x1000000, x4, 80, x5)
+
+inst_32:
+// rs2_val == 33554432,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x1; op2val:0x2000000
+TEST_CR_OP( c.add, x10, x11, 0x1ffffff, -0x1, 0x2000000, x4, 88, x5)
+
+inst_33:
+// rs2_val == 67108864, rs1_val == -2049
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x801; op2val:0x4000000
+TEST_CR_OP( c.add, x10, x11, 0x3fff7ff, -0x801, 0x4000000, x4, 96, x5)
+
+inst_34:
+// rs2_val == 134217728, rs1_val == 8796093022208
+// opcode: c.add; op1:x10; op2:x11; op1val:0x80000000000; op2val:0x8000000
+TEST_CR_OP( c.add, x10, x11, 0x80008000000, 0x80000000000, 0x8000000, x4, 104, x5)
+
+inst_35:
+// rs2_val == 268435456,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x7fffffffffffffff; op2val:0x10000000
+TEST_CR_OP( c.add, x10, x11, 0x800000000fffffff, 0x7fffffffffffffff, 0x10000000, x4, 112, x5)
+
+inst_36:
+// rs2_val == 536870912,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x7; op2val:0x20000000
+TEST_CR_OP( c.add, x10, x11, 0x20000007, 0x7, 0x20000000, x4, 120, x5)
+
+inst_37:
+// rs2_val == 1073741824,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x4; op2val:0x40000000
+TEST_CR_OP( c.add, x10, x11, 0x3ffffffc, -0x4, 0x40000000, x4, 128, x5)
+
+inst_38:
+// rs2_val == 2147483648, rs1_val == 6148914691236517205
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x80000000
+TEST_CR_OP( c.add, x10, x11, 0x55555555d5555555, 0x5555555555555555, 0x80000000, x4, 136, x5)
+
+inst_39:
+// rs2_val == 4294967296,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x80000; op2val:0x100000000
+TEST_CR_OP( c.add, x10, x11, 0x100080000, 0x80000, 0x100000000, x4, 144, x5)
+
+inst_40:
+// rs2_val == 8589934592, rs1_val == 68719476736
+// opcode: c.add; op1:x10; op2:x11; op1val:0x1000000000; op2val:0x200000000
+TEST_CR_OP( c.add, x10, x11, 0x1200000000, 0x1000000000, 0x200000000, x4, 152, x5)
+
+inst_41:
+// rs2_val == 17179869184,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x4000000000000000; op2val:0x400000000
+TEST_CR_OP( c.add, x10, x11, 0xc000000400000000, -0x4000000000000000, 0x400000000, x4, 160, x5)
+
+inst_42:
+// rs2_val == 34359738368,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x800000000
+TEST_CR_OP( c.add, x10, x11, 0x8b504f334, 0xb504f334, 0x800000000, x4, 168, x5)
+
+inst_43:
+// rs2_val == 137438953472,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x2000000000
+TEST_CR_OP( c.add, x10, x11, 0x2000000006, 0x6, 0x2000000000, x4, 176, x5)
+
+inst_44:
+// rs2_val == 274877906944, rs1_val == -35184372088833
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x200000000001; op2val:0x4000000000
+TEST_CR_OP( c.add, x10, x11, 0xffffe03fffffffff, -0x200000000001, 0x4000000000, x4, 184, x5)
+
+inst_45:
+// rs2_val == 1099511627776, rs1_val == -8796093022209
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x80000000001; op2val:0x10000000000
+TEST_CR_OP( c.add, x10, x11, 0xfffff8ffffffffff, -0x80000000001, 0x10000000000, x4, 192, x5)
+
+inst_46:
+// rs2_val == 2199023255552, rs1_val == -3
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x3; op2val:0x20000000000
+TEST_CR_OP( c.add, x10, x11, 0x1fffffffffd, -0x3, 0x20000000000, x4, 200, x5)
+
+inst_47:
+// rs2_val == 4398046511104, rs1_val == 4503599627370496
+// opcode: c.add; op1:x10; op2:x11; op1val:0x10000000000000; op2val:0x40000000000
+TEST_CR_OP( c.add, x10, x11, 0x10040000000000, 0x10000000000000, 0x40000000000, x4, 208, x5)
+
+inst_48:
+// rs2_val == 8796093022208, rs1_val == -17
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x11; op2val:0x80000000000
+TEST_CR_OP( c.add, x10, x11, 0x7ffffffffef, -0x11, 0x80000000000, x4, 216, x5)
+
+inst_49:
+// rs2_val == 17592186044416,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x100000000000
+TEST_CR_OP( c.add, x10, x11, 0x100000000006, 0x6, 0x100000000000, x4, 224, x5)
+
+inst_50:
+// rs2_val == 35184372088832, rs1_val == -513
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x201; op2val:0x200000000000
+TEST_CR_OP( c.add, x10, x11, 0x1ffffffffdff, -0x201, 0x200000000000, x4, 232, x5)
+
+inst_51:
+// rs2_val == 70368744177664, rs1_val == -5
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5; op2val:0x400000000000
+TEST_CR_OP( c.add, x10, x11, 0x3ffffffffffb, -0x5, 0x400000000000, x4, 240, x5)
+
+inst_52:
+// rs2_val == 281474976710656, rs1_val == 8192
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2000; op2val:0x1000000000000
+TEST_CR_OP( c.add, x10, x11, 0x1000000002000, 0x2000, 0x1000000000000, x4, 248, x5)
+
+inst_53:
+// rs2_val == 562949953421312, rs1_val == 4194304
+// opcode: c.add; op1:x10; op2:x11; op1val:0x400000; op2val:0x2000000000000
+TEST_CR_OP( c.add, x10, x11, 0x2000000400000, 0x400000, 0x2000000000000, x4, 256, x5)
+
+inst_54:
+// rs2_val == 1125899906842624, rs1_val == -2097153
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x200001; op2val:0x4000000000000
+TEST_CR_OP( c.add, x10, x11, 0x3ffffffdfffff, -0x200001, 0x4000000000000, x4, 264, x5)
+
+inst_55:
+// rs2_val == 2251799813685248,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x8000000000000
+TEST_CR_OP( c.add, x10, x11, 0x555d555555555555, 0x5555555555555555, 0x8000000000000, x4, 272, x5)
+
+inst_56:
+// rs2_val == 4503599627370496, rs1_val == -8589934593
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x200000001; op2val:0x10000000000000
+TEST_CR_OP( c.add, x10, x11, 0xffffdffffffff, -0x200000001, 0x10000000000000, x4, 280, x5)
+
+inst_57:
+// rs2_val == 9007199254740992,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x200001; op2val:0x20000000000000
+TEST_CR_OP( c.add, x10, x11, 0x1fffffffdfffff, -0x200001, 0x20000000000000, x4, 288, x5)
+
+inst_58:
+// rs2_val == 18014398509481984, rs1_val == 536870912
+// opcode: c.add; op1:x10; op2:x11; op1val:0x20000000; op2val:0x40000000000000
+TEST_CR_OP( c.add, x10, x11, 0x40000020000000, 0x20000000, 0x40000000000000, x4, 296, x5)
+
+inst_59:
+// rs2_val == 36028797018963968, rs1_val == 1125899906842624
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4000000000000; op2val:0x80000000000000
+TEST_CR_OP( c.add, x10, x11, 0x84000000000000, 0x4000000000000, 0x80000000000000, x4, 304, x5)
+
+inst_60:
+// rs2_val == 72057594037927936,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x100000000000000
+TEST_CR_OP( c.add, x10, x11, 0x5655555555555555, 0x5555555555555555, 0x100000000000000, x4, 312, x5)
+
+inst_61:
+// rs2_val == 144115188075855872,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x400000; op2val:0x200000000000000
+TEST_CR_OP( c.add, x10, x11, 0x200000000400000, 0x400000, 0x200000000000000, x4, 320, x5)
+
+inst_62:
+// rs2_val == 288230376151711744,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x400000000000000
+TEST_CR_OP( c.add, x10, x11, 0x400000000000005, 0x5, 0x400000000000000, x4, 328, x5)
+
+inst_63:
+// rs2_val == 576460752303423488,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x3; op2val:0x800000000000000
+TEST_CR_OP( c.add, x10, x11, 0x7fffffffffffffd, -0x3, 0x800000000000000, x4, 336, x5)
+
+inst_64:
+// rs2_val == 1152921504606846976,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x6; op2val:0x1000000000000000
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffffffa, -0x6, 0x1000000000000000, x4, 344, x5)
+
+inst_65:
+// rs2_val == 2305843009213693952,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x4000000000000000; op2val:0x2000000000000000
+TEST_CR_OP( c.add, x10, x11, 0xe000000000000000, -0x4000000000000000, 0x2000000000000000, x4, 352, x5)
+
+inst_66:
+// rs2_val == 4611686018427387904, rs1_val == -129
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x81; op2val:0x4000000000000000
+TEST_CR_OP( c.add, x10, x11, 0x3fffffffffffff7f, -0x81, 0x4000000000000000, x4, 360, x5)
+
+inst_67:
+// rs2_val == -2, rs1_val == 4096
+// opcode: c.add; op1:x10; op2:x11; op1val:0x1000; op2val:-0x2
+TEST_CR_OP( c.add, x10, x11, 0xffe, 0x1000, -0x2, x4, 368, x5)
+
+inst_68:
+// rs2_val == -3, rs1_val == -1048577
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x100001; op2val:-0x3
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffeffffc, -0x100001, -0x3, x4, 376, x5)
+
+inst_69:
+// rs2_val == -5,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x8000001; op2val:-0x5
+TEST_CR_OP( c.add, x10, x11, 0xfffffffff7fffffa, -0x8000001, -0x5, x4, 384, x5)
+
+inst_70:
+// rs2_val == -9, rs1_val == -2305843009213693953
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x2000000000000001; op2val:-0x9
+TEST_CR_OP( c.add, x10, x11, 0xdffffffffffffff6, -0x2000000000000001, -0x9, x4, 392, x5)
+
+inst_71:
+// rs2_val == -17, rs1_val == -17179869185
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x400000001; op2val:-0x11
+TEST_CR_OP( c.add, x10, x11, 0xfffffffbffffffee, -0x400000001, -0x11, x4, 400, x5)
+
+inst_72:
+// rs2_val == -33,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0x21
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffffffe3, 0x4, -0x21, x4, 408, x5)
+
+inst_73:
+// rs2_val == -65, rs1_val == 1099511627776
+// opcode: c.add; op1:x10; op2:x11; op1val:0x10000000000; op2val:-0x41
+TEST_CR_OP( c.add, x10, x11, 0xffffffffbf, 0x10000000000, -0x41, x4, 416, x5)
+
+inst_74:
+// rs2_val == -129,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0x81
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffffff83, 0x4, -0x81, x4, 424, x5)
+
+inst_75:
+// rs2_val == -257, rs1_val == -562949953421313
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x2000000000001; op2val:-0x101
+TEST_CR_OP( c.add, x10, x11, 0xfffdfffffffffefe, -0x2000000000001, -0x101, x4, 432, x5)
+
+inst_76:
+// rs2_val == -513, rs1_val == 32
+// opcode: c.add; op1:x10; op2:x11; op1val:0x20; op2val:-0x201
+TEST_CR_OP( c.add, x10, x11, 0xfffffffffffffe1f, 0x20, -0x201, x4, 440, x5)
+
+inst_77:
+// rs2_val == -1025,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x401
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb08cc, -0xb504f333, -0x401, x4, 448, x5)
+
+inst_78:
+// rs2_val == -2049,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x8000000000000000; op2val:-0x801
+TEST_CR_OP( c.add, x10, x11, 0x7ffffffffffff7ff, -0x8000000000000000, -0x801, x4, 456, x5)
+
+inst_79:
+// rs2_val == -4097, rs1_val == 72057594037927936
+// opcode: c.add; op1:x10; op2:x11; op1val:0x100000000000000; op2val:-0x1001
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffefff, 0x100000000000000, -0x1001, x4, 464, x5)
+
+inst_80:
+// rs2_val == -8193, rs1_val == -2199023255553
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x20000000001; op2val:-0x2001
+TEST_CR_OP( c.add, x10, x11, 0xfffffdffffffdffe, -0x20000000001, -0x2001, x4, 472, x5)
+
+inst_81:
+// rs2_val == -16385, rs1_val == -33
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x21; op2val:-0x4001
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffffbfde, -0x21, -0x4001, x4, 480, x5)
+
+inst_82:
+// rs2_val == -32769, rs1_val == -257
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x101; op2val:-0x8001
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffff7efe, -0x101, -0x8001, x4, 488, x5)
+
+inst_83:
+// rs2_val == -65537,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x2000000000001; op2val:-0x10001
+TEST_CR_OP( c.add, x10, x11, 0xfffdfffffffefffe, -0x2000000000001, -0x10001, x4, 496, x5)
+
+inst_84:
+// rs2_val == -131073, rs1_val == -32769
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x8001; op2val:-0x20001
+TEST_CR_OP( c.add, x10, x11, 0xfffffffffffd7ffe, -0x8001, -0x20001, x4, 504, x5)
+
+inst_85:
+// rs2_val == -262145, rs1_val == 16
+// opcode: c.add; op1:x10; op2:x11; op1val:0x10; op2val:-0x40001
+TEST_CR_OP( c.add, x10, x11, 0xfffffffffffc000f, 0x10, -0x40001, x4, 512, x5)
+
+inst_86:
+// rs2_val == -524289,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0x80001
+TEST_CR_OP( c.add, x10, x11, 0xfffffffffff80003, 0x4, -0x80001, x4, 520, x5)
+
+inst_87:
+// rs2_val == -1048577, rs1_val == -262145
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x40001; op2val:-0x100001
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffebfffe, -0x40001, -0x100001, x4, 528, x5)
+
+inst_88:
+// rs2_val == -2097153,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x100000000000000; op2val:-0x200001
+TEST_CR_OP( c.add, x10, x11, 0xffffffffdfffff, 0x100000000000000, -0x200001, x4, 536, x5)
+
+inst_89:
+// rs2_val == -4194305, rs1_val == -524289
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x80001; op2val:-0x400001
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffb7fffe, -0x80001, -0x400001, x4, 544, x5)
+
+inst_90:
+// rs2_val == -8388609, rs1_val == 2
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:-0x800001
+TEST_CR_OP( c.add, x10, x11, 0xffffffffff800001, 0x2, -0x800001, x4, 552, x5)
+
+inst_91:
+// rs2_val == -16777217, rs1_val == 65536
+// opcode: c.add; op1:x10; op2:x11; op1val:0x10000; op2val:-0x1000001
+TEST_CR_OP( c.add, x10, x11, 0xffffffffff00ffff, 0x10000, -0x1000001, x4, 560, x5)
+
+inst_92:
+// rs2_val == -33554433, rs1_val == 576460752303423488
+// opcode: c.add; op1:x10; op2:x11; op1val:0x800000000000000; op2val:-0x2000001
+TEST_CR_OP( c.add, x10, x11, 0x7fffffffdffffff, 0x800000000000000, -0x2000001, x4, 568, x5)
+
+inst_93:
+// rs2_val == -67108865, rs1_val == 64
+// opcode: c.add; op1:x10; op2:x11; op1val:0x40; op2val:-0x4000001
+TEST_CR_OP( c.add, x10, x11, 0xfffffffffc00003f, 0x40, -0x4000001, x4, 576, x5)
+
+inst_94:
+// rs2_val == -134217729,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5; op2val:-0x8000001
+TEST_CR_OP( c.add, x10, x11, 0xfffffffff7fffffa, -0x5, -0x8000001, x4, 584, x5)
+
+inst_95:
+// rs2_val == -268435457, rs1_val == 1048576
+// opcode: c.add; op1:x10; op2:x11; op1val:0x100000; op2val:-0x10000001
+TEST_CR_OP( c.add, x10, x11, 0xfffffffff00fffff, 0x100000, -0x10000001, x4, 592, x5)
+
+inst_96:
+// rs2_val == -536870913, rs1_val == 288230376151711744
+// opcode: c.add; op1:x10; op2:x11; op1val:0x400000000000000; op2val:-0x20000001
+TEST_CR_OP( c.add, x10, x11, 0x3ffffffdfffffff, 0x400000000000000, -0x20000001, x4, 600, x5)
+
+inst_97:
+// rs2_val == -1073741825, rs1_val == 18014398509481984
+// opcode: c.add; op1:x10; op2:x11; op1val:0x40000000000000; op2val:-0x40000001
+TEST_CR_OP( c.add, x10, x11, 0x3fffffbfffffff, 0x40000000000000, -0x40000001, x4, 608, x5)
+
+inst_98:
+// rs2_val == -2147483649,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x8000001; op2val:-0x80000001
+TEST_CR_OP( c.add, x10, x11, 0xffffffff77fffffe, -0x8000001, -0x80000001, x4, 616, x5)
+
+inst_99:
+// rs2_val == -4294967297,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x20000000001; op2val:-0x100000001
+TEST_CR_OP( c.add, x10, x11, 0xfffffdfefffffffe, -0x20000000001, -0x100000001, x4, 624, x5)
+
+inst_100:
+// rs2_val == -8589934593, rs1_val == 70368744177664
+// opcode: c.add; op1:x10; op2:x11; op1val:0x400000000000; op2val:-0x200000001
+TEST_CR_OP( c.add, x10, x11, 0x3ffdffffffff, 0x400000000000, -0x200000001, x4, 632, x5)
+
+inst_101:
+// rs2_val == -17179869185, rs1_val == -33554433
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x2000001; op2val:-0x400000001
+TEST_CR_OP( c.add, x10, x11, 0xfffffffbfdfffffe, -0x2000001, -0x400000001, x4, 640, x5)
+
+inst_102:
+// rs2_val == -34359738369,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0x800000001
+TEST_CR_OP( c.add, x10, x11, 0xfffffff800000003, 0x4, -0x800000001, x4, 648, x5)
+
+inst_103:
+// rs2_val == -68719476737,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x100000000000; op2val:-0x1000000001
+TEST_CR_OP( c.add, x10, x11, 0xfefffffffff, 0x100000000000, -0x1000000001, x4, 656, x5)
+
+inst_104:
+// rs2_val == -137438953473, rs1_val == -34359738369
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x800000001; op2val:-0x2000000001
+TEST_CR_OP( c.add, x10, x11, 0xffffffd7fffffffe, -0x800000001, -0x2000000001, x4, 664, x5)
+
+inst_105:
+// rs2_val == -274877906945, rs1_val == -9
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x9; op2val:-0x4000000001
+TEST_CR_OP( c.add, x10, x11, 0xffffffbffffffff6, -0x9, -0x4000000001, x4, 672, x5)
+
+inst_106:
+// rs2_val == -549755813889,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x10000; op2val:-0x8000000001
+TEST_CR_OP( c.add, x10, x11, 0xffffff800000ffff, 0x10000, -0x8000000001, x4, 680, x5)
+
+inst_107:
+// rs2_val == -1099511627777,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x10000000001
+TEST_CR_OP( c.add, x10, x11, 0xfffffeff4afb0ccc, -0xb504f333, -0x10000000001, x4, 688, x5)
+
+inst_108:
+// rs2_val == -2199023255553,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x7fffffffffffffff; op2val:-0x20000000001
+TEST_CR_OP( c.add, x10, x11, 0x7ffffdfffffffffe, 0x7fffffffffffffff, -0x20000000001, x4, 696, x5)
+
+inst_109:
+// rs2_val == -4398046511105,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0x40000000001
+TEST_CR_OP( c.add, x10, x11, 0xfffffc0000000003, 0x4, -0x40000000001, x4, 704, x5)
+
+inst_110:
+// rs2_val == -8796093022209, rs1_val == -65
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x41; op2val:-0x80000000001
+TEST_CR_OP( c.add, x10, x11, 0xfffff7ffffffffbe, -0x41, -0x80000000001, x4, 712, x5)
+
+inst_111:
+// rs2_val == -17592186044417, rs1_val == -9007199254740993
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x20000000000001; op2val:-0x100000000001
+TEST_CR_OP( c.add, x10, x11, 0xffdfeffffffffffe, -0x20000000000001, -0x100000000001, x4, 720, x5)
+
+inst_112:
+// rs2_val == -35184372088833,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x2000001; op2val:-0x200000000001
+TEST_CR_OP( c.add, x10, x11, 0xffffdffffdfffffe, -0x2000001, -0x200000000001, x4, 728, x5)
+
+inst_113:
+// rs2_val == -70368744177665,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x400000; op2val:-0x400000000001
+TEST_CR_OP( c.add, x10, x11, 0xffffc000003fffff, 0x400000, -0x400000000001, x4, 736, x5)
+
+inst_114:
+// rs2_val == -140737488355329, rs1_val == 140737488355328
+// opcode: c.add; op1:x10; op2:x11; op1val:0x800000000000; op2val:-0x800000000001
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffffffff, 0x800000000000, -0x800000000001, x4, 744, x5)
+
+inst_115:
+// rs2_val == -281474976710657, rs1_val == 2147483648
+// opcode: c.add; op1:x10; op2:x11; op1val:0x80000000; op2val:-0x1000000000001
+TEST_CR_OP( c.add, x10, x11, 0xffff00007fffffff, 0x80000000, -0x1000000000001, x4, 752, x5)
+
+inst_116:
+// rs2_val == -562949953421313, rs1_val == 281474976710656
+// opcode: c.add; op1:x10; op2:x11; op1val:0x1000000000000; op2val:-0x2000000000001
+TEST_CR_OP( c.add, x10, x11, 0xfffeffffffffffff, 0x1000000000000, -0x2000000000001, x4, 760, x5)
+
+inst_117:
+// rs2_val == -1125899906842625,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x40001; op2val:-0x4000000000001
+TEST_CR_OP( c.add, x10, x11, 0xfffbfffffffbfffe, -0x40001, -0x4000000000001, x4, 768, x5)
+
+inst_118:
+// rs2_val == -2251799813685249,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x20000000000001; op2val:-0x8000000000001
+TEST_CR_OP( c.add, x10, x11, 0xffd7fffffffffffe, -0x20000000000001, -0x8000000000001, x4, 776, x5)
+
+inst_119:
+// rs2_val == -4503599627370497, rs1_val == -18014398509481985
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x40000000000001; op2val:-0x10000000000001
+TEST_CR_OP( c.add, x10, x11, 0xffaffffffffffffe, -0x40000000000001, -0x10000000000001, x4, 784, x5)
+
+inst_120:
+// rs2_val == -9007199254740993, rs1_val == -4294967297
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x100000001; op2val:-0x20000000000001
+TEST_CR_OP( c.add, x10, x11, 0xffdffffefffffffe, -0x100000001, -0x20000000000001, x4, 792, x5)
+
+inst_121:
+// rs2_val == -18014398509481985, rs1_val == 137438953472
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2000000000; op2val:-0x40000000000001
+TEST_CR_OP( c.add, x10, x11, 0xffc0001fffffffff, 0x2000000000, -0x40000000000001, x4, 800, x5)
+
+inst_122:
+// rs2_val == -36028797018963969, rs1_val == 512
+// opcode: c.add; op1:x10; op2:x11; op1val:0x200; op2val:-0x80000000000001
+TEST_CR_OP( c.add, x10, x11, 0xff800000000001ff, 0x200, -0x80000000000001, x4, 808, x5)
+
+inst_123:
+// rs2_val == -72057594037927937,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:-0x100000000000001
+TEST_CR_OP( c.add, x10, x11, 0xff00000000000005, 0x6, -0x100000000000001, x4, 816, x5)
+
+inst_124:
+// rs2_val == -144115188075855873,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x80000000; op2val:-0x200000000000001
+TEST_CR_OP( c.add, x10, x11, 0xfe0000007fffffff, 0x80000000, -0x200000000000001, x4, 824, x5)
+
+inst_125:
+// rs2_val == -288230376151711745,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x20000000; op2val:-0x400000000000001
+TEST_CR_OP( c.add, x10, x11, 0xfc0000001fffffff, 0x20000000, -0x400000000000001, x4, 832, x5)
+
+inst_126:
+// rs2_val == -576460752303423489,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x800000000000001
+TEST_CR_OP( c.add, x10, x11, 0x4d55555555555555, 0x5555555555555556, -0x800000000000001, x4, 840, x5)
+
+inst_127:
+// rs2_val == -1152921504606846977, rs1_val == 562949953421312
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2000000000000; op2val:-0x1000000000000001
+TEST_CR_OP( c.add, x10, x11, 0xf001ffffffffffff, 0x2000000000000, -0x1000000000000001, x4, 848, x5)
+
+inst_128:
+// rs2_val == -2305843009213693953,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x2000000000000001
+TEST_CR_OP( c.add, x10, x11, 0x3555555555555555, 0x5555555555555556, -0x2000000000000001, x4, 856, x5)
+
+inst_129:
+// rs2_val == -4611686018427387905, rs1_val == -67108865
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x4000001; op2val:-0x4000000000000001
+TEST_CR_OP( c.add, x10, x11, 0xbffffffffbfffffe, -0x4000001, -0x4000000000000001, x4, 864, x5)
+
+inst_130:
+// rs2_val == 6148914691236517205, rs1_val == 8
+// opcode: c.add; op1:x10; op2:x11; op1val:0x8; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x555555555555555d, 0x8, 0x5555555555555555, x4, 872, x5)
+
+inst_131:
+// rs2_val == -6148914691236517206, rs1_val==-3037000498 and rs2_val==-6148914691236517206
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaa9f5a5b778, -0xb504f332, -0x5555555555555556, x4, 880, x5)
+
+inst_132:
+// rs1_val == 128,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x80; op2val:-0x400000000000001
+TEST_CR_OP( c.add, x10, x11, 0xfc0000000000007f, 0x80, -0x400000000000001, x4, 888, x5)
+
+inst_133:
+// rs1_val == 256,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x100; op2val:0x1000000000000000
+TEST_CR_OP( c.add, x10, x11, 0x1000000000000100, 0x100, 0x1000000000000000, x4, 896, x5)
+
+inst_134:
+// rs1_val == 1024,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x400; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb10ce, 0x400, -0xb504f332, x4, 904, x5)
+
+inst_135:
+// rs1_val == 2048,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x800; op2val:-0x11
+TEST_CR_OP( c.add, x10, x11, 0x7ef, 0x800, -0x11, x4, 912, x5)
+
+inst_136:
+// rs1_val == 16384,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4000; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaeaab, 0x4000, -0x5555555555555555, x4, 920, x5)
+
+inst_137:
+// rs1_val == 32768,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x8000; op2val:-0x40000001
+TEST_CR_OP( c.add, x10, x11, 0xffffffffc0007fff, 0x8000, -0x40000001, x4, 928, x5)
+
+inst_138:
+// rs1_val == 131072,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x20000; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x20002, 0x20000, 0x2, x4, 936, x5)
+
+inst_139:
+// rs1_val == 2097152,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x200000; op2val:-0x10000000000001
+TEST_CR_OP( c.add, x10, x11, 0xfff00000001fffff, 0x200000, -0x10000000000001, x4, 944, x5)
+
+inst_140:
+// rs1_val == 8388608,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x800000; op2val:-0x200001
+TEST_CR_OP( c.add, x10, x11, 0x5fffff, 0x800000, -0x200001, x4, 952, x5)
+
+inst_141:
+// rs1_val == 16777216,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x1000000; op2val:0x4000000
+TEST_CR_OP( c.add, x10, x11, 0x5000000, 0x1000000, 0x4000000, x4, 960, x5)
+
+inst_142:
+// rs1_val == 33554432,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2000000; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x3333333335333332, 0x2000000, 0x3333333333333332, x4, 968, x5)
+
+inst_143:
+// rs1_val == 67108864,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4000000; op2val:0x8000000000000
+TEST_CR_OP( c.add, x10, x11, 0x8000004000000, 0x4000000, 0x8000000000000, x4, 976, x5)
+
+inst_144:
+// rs1_val == 134217728,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x8000000; op2val:0x800000000
+TEST_CR_OP( c.add, x10, x11, 0x808000000, 0x8000000, 0x800000000, x4, 984, x5)
+
+inst_145:
+// rs1_val == 268435456,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x10000000; op2val:-0x41
+TEST_CR_OP( c.add, x10, x11, 0xfffffbf, 0x10000000, -0x41, x4, 992, x5)
+
+inst_146:
+// rs1_val == 1073741824,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x40000000; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x40000000, 0x40000000, 0x0, x4, 1000, x5)
+
+inst_147:
+// rs1_val == 4294967296,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x100000000; op2val:0x80
+TEST_CR_OP( c.add, x10, x11, 0x100000080, 0x100000000, 0x80, x4, 1008, x5)
+
+inst_148:
+// rs1_val == 8589934592,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x200000000; op2val:-0x2
+TEST_CR_OP( c.add, x10, x11, 0x1fffffffe, 0x200000000, -0x2, x4, 1016, x5)
+
+inst_149:
+// rs1_val == 17179869184,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x400000000; op2val:-0x2000001
+TEST_CR_OP( c.add, x10, x11, 0x3fdffffff, 0x400000000, -0x2000001, x4, 1024, x5)
+
+inst_150:
+// rs1_val == 34359738368,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x800000000; op2val:0x80000000
+TEST_CR_OP( c.add, x10, x11, 0x880000000, 0x800000000, 0x80000000, x4, 1032, x5)
+
+inst_151:
+// rs1_val == 274877906944,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4000000000; op2val:-0x400001
+TEST_CR_OP( c.add, x10, x11, 0x3fffbfffff, 0x4000000000, -0x400001, x4, 1040, x5)
+
+inst_152:
+// rs1_val == 549755813888,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x8000000000; op2val:-0x800000000001
+TEST_CR_OP( c.add, x10, x11, 0xffff807fffffffff, 0x8000000000, -0x800000000001, x4, 1048, x5)
+
+inst_153:
+// rs1_val == 2199023255552,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x20000000000; op2val:0x80
+TEST_CR_OP( c.add, x10, x11, 0x20000000080, 0x20000000000, 0x80, x4, 1056, x5)
+
+inst_154:
+// rs1_val == 4398046511104,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x40000000000; op2val:-0x81
+TEST_CR_OP( c.add, x10, x11, 0x3ffffffff7f, 0x40000000000, -0x81, x4, 1064, x5)
+
+inst_155:
+// rs1_val == 35184372088832,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x200000000000; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaacaaaaaaaaaaa, 0x200000000000, -0x5555555555555556, x4, 1072, x5)
+
+inst_156:
+// rs1_val == 9007199254740992,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x20000000000000; op2val:0x4000000000000
+TEST_CR_OP( c.add, x10, x11, 0x24000000000000, 0x20000000000000, 0x4000000000000, x4, 1080, x5)
+
+inst_157:
+// rs1_val == 144115188075855872,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x200000000000000; op2val:0x2000000
+TEST_CR_OP( c.add, x10, x11, 0x200000002000000, 0x200000000000000, 0x2000000, x4, 1088, x5)
+
+inst_158:
+// rs1_val == 1152921504606846976,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x1000000000000000; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xbaaaaaaaaaaaaaaa, 0x1000000000000000, -0x5555555555555556, x4, 1096, x5)
+
+inst_159:
+// rs1_val == -1025,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x401; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0xb504ef33, -0x401, 0xb504f334, x4, 1104, x5)
+
+inst_160:
+// rs1_val == -8193,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x2001; op2val:-0x800000000000001
+TEST_CR_OP( c.add, x10, x11, 0xf7ffffffffffdffe, -0x2001, -0x800000000000001, x4, 1112, x5)
+
+inst_161:
+// rs1_val == -65537,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x10001; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xfffffffffffeffff, -0x10001, 0x0, x4, 1120, x5)
+
+inst_162:
+// rs1_val == -131073,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x20001; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x5555555555535554, -0x20001, 0x5555555555555555, x4, 1128, x5)
+
+inst_163:
+// rs1_val == -4194305,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x400001; op2val:0x4000
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffc03fff, -0x400001, 0x4000, x4, 1136, x5)
+
+inst_164:
+// rs1_val == -8388609,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x800001; op2val:0x10000000000000
+TEST_CR_OP( c.add, x10, x11, 0xfffffff7fffff, -0x800001, 0x10000000000000, x4, 1144, x5)
+
+inst_165:
+// rs1_val == -16777217,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x1000001; op2val:0x8000000000
+TEST_CR_OP( c.add, x10, x11, 0x7ffeffffff, -0x1000001, 0x8000000000, x4, 1152, x5)
+
+inst_166:
+// rs1_val == -268435457,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x10000001; op2val:0x20000000000000
+TEST_CR_OP( c.add, x10, x11, 0x1fffffefffffff, -0x10000001, 0x20000000000000, x4, 1160, x5)
+
+inst_167:
+// rs1_val == -2147483649,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x80000001; op2val:0x8
+TEST_CR_OP( c.add, x10, x11, 0xffffffff80000007, -0x80000001, 0x8, x4, 1168, x5)
+
+inst_168:
+// rs1_val == -68719476737,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x1000000001; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xffffffefffffffff, -0x1000000001, 0x0, x4, 1176, x5)
+
+inst_169:
+// rs1_val == -137438953473,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x2000000001; op2val:0x400000000000
+TEST_CR_OP( c.add, x10, x11, 0x3fdfffffffff, -0x2000000001, 0x400000000000, x4, 1184, x5)
+
+inst_170:
+// rs1_val == -274877906945,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x4000000001; op2val:-0x4000000001
+TEST_CR_OP( c.add, x10, x11, 0xffffff7ffffffffe, -0x4000000001, -0x4000000001, x4, 1192, x5)
+
+inst_171:
+// rs1_val == -549755813889,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x8000000001; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xffffff8000000005, -0x8000000001, 0x6, x4, 1200, x5)
+
+inst_172:
+// rs1_val == -1099511627777,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x10000000001; op2val:-0x4000000000000000
+TEST_CR_OP( c.add, x10, x11, 0xbffffeffffffffff, -0x10000000001, -0x4000000000000000, x4, 1208, x5)
+
+inst_173:
+// rs1_val == -4398046511105,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x40000000001; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x5555515555555554, -0x40000000001, 0x5555555555555555, x4, 1216, x5)
+
+inst_174:
+// rs1_val == -17592186044417,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x100000000001; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xfffff00000000004, -0x100000000001, 0x5, x4, 1224, x5)
+
+inst_175:
+// rs1_val == -140737488355329,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x800000000001; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xffff800000000005, -0x800000000001, 0x6, x4, 1232, x5)
+
+inst_176:
+// rs1_val == -281474976710657,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x1000000000001; op2val:0x8000000
+TEST_CR_OP( c.add, x10, x11, 0xffff000007ffffff, -0x1000000000001, 0x8000000, x4, 1240, x5)
+
+inst_177:
+// rs1_val == -1125899906842625,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x4000000000001; op2val:-0x40000001
+TEST_CR_OP( c.add, x10, x11, 0xfffbffffbffffffe, -0x4000000000001, -0x40000001, x4, 1248, x5)
+
+inst_178:
+// rs1_val == -4503599627370497,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x10000000000001; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xffefffffffffffff, -0x10000000000001, 0x0, x4, 1256, x5)
+
+inst_179:
+// rs1_val == -36028797018963969,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x80000000000001; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xff7fffffffffffff, -0x80000000000001, 0x0, x4, 1264, x5)
+
+inst_180:
+// rs1_val == -144115188075855873,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x200000000000001; op2val:0x4000000000000000
+TEST_CR_OP( c.add, x10, x11, 0x3dffffffffffffff, -0x200000000000001, 0x4000000000000000, x4, 1272, x5)
+
+inst_181:
+// rs1_val == -288230376151711745,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x400000000000001; op2val:0x800000
+TEST_CR_OP( c.add, x10, x11, 0xfc000000007fffff, -0x400000000000001, 0x800000, x4, 1280, x5)
+
+inst_182:
+// rs1_val == -1152921504606846977,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:-0x401
+TEST_CR_OP( c.add, x10, x11, 0xeffffffffffffbfe, -0x1000000000000001, -0x401, x4, 1288, x5)
+
+inst_183:
+// rs1_val == -6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x20000000001
+TEST_CR_OP( c.add, x10, x11, 0xaaaaa8aaaaaaaaa9, -0x5555555555555556, -0x20000000001, x4, 1296, x5)
+
+inst_184:
+// rs1_val==3 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x6, 0x3, 0x3, x4, 1304, x5)
+
+inst_185:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555558, 0x3, 0x5555555555555555, x4, 1312, x5)
+
+inst_186:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaad, 0x3, -0x5555555555555556, x4, 1320, x5)
+
+inst_187:
+// rs1_val==3 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x8, 0x3, 0x5, x4, 1328, x5)
+
+inst_188:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333336, 0x3, 0x3333333333333333, x4, 1336, x5)
+
+inst_189:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666669, 0x3, 0x6666666666666666, x4, 1344, x5)
+
+inst_190:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd0, 0x3, -0xb504f333, x4, 1352, x5)
+
+inst_191:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xb504f336, 0x3, 0xb504f333, x4, 1360, x5)
+
+inst_192:
+// rs1_val==3 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x5, 0x3, 0x2, x4, 1368, x5)
+
+inst_193:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555557, 0x3, 0x5555555555555554, x4, 1376, x5)
+
+inst_194:
+// rs1_val==3 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x3, 0x3, 0x0, x4, 1384, x5)
+
+inst_195:
+// rs1_val==3 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x7, 0x3, 0x4, x4, 1392, x5)
+
+inst_196:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333335, 0x3, 0x3333333333333332, x4, 1400, x5)
+
+inst_197:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666668, 0x3, 0x6666666666666665, x4, 1408, x5)
+
+inst_198:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xb504f335, 0x3, 0xb504f332, x4, 1416, x5)
+
+inst_199:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555559, 0x3, 0x5555555555555556, x4, 1424, x5)
+
+inst_200:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaae, 0x3, -0x5555555555555555, x4, 1432, x5)
+
+inst_201:
+// rs1_val==3 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x9, 0x3, 0x6, x4, 1440, x5)
+
+inst_202:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333337, 0x3, 0x3333333333333334, x4, 1448, x5)
+
+inst_203:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666a, 0x3, 0x6666666666666667, x4, 1456, x5)
+
+inst_204:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd1, 0x3, -0xb504f332, x4, 1464, x5)
+
+inst_205:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0xb504f337, 0x3, 0xb504f334, x4, 1472, x5)
+
+inst_206:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555558, 0x5555555555555555, 0x3, x4, 1480, x5)
+
+inst_207:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555555, 0x5555555555555555, x4, 1488, x5)
+
+inst_208:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffffffff, 0x5555555555555555, -0x5555555555555556, x4, 1496, x5)
+
+inst_209:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x555555555555555a, 0x5555555555555555, 0x5, x4, 1504, x5)
+
+inst_210:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888888, 0x5555555555555555, 0x3333333333333333, x4, 1512, x5)
+
+inst_211:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x5555555555555555, 0x6666666666666666, x4, 1520, x5)
+
+inst_212:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x55555554a0506222, 0x5555555555555555, -0xb504f333, x4, 1528, x5)
+
+inst_213:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4888, 0x5555555555555555, 0xb504f333, x4, 1536, x5)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555557, 0x5555555555555555, 0x2, x4, 1544, x5)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5555555555555555, 0x5555555555555554, x4, 1552, x5)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x0, x4, 1560, x5)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555559, 0x5555555555555555, 0x4, x4, 1568, x5)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888887, 0x5555555555555555, 0x3333333333333332, x4, 1576, x5)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbba, 0x5555555555555555, 0x6666666666666665, x4, 1584, x5)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4887, 0x5555555555555555, 0xb504f332, x4, 1592, x5)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555555, 0x5555555555555556, x4, 1600, x5)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x0, 0x5555555555555555, -0x5555555555555555, x4, 1608, x5)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x555555555555555b, 0x5555555555555555, 0x6, x4, 1616, x5)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888889, 0x5555555555555555, 0x3333333333333334, x4, 1624, x5)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbbc, 0x5555555555555555, 0x6666666666666667, x4, 1632, x5)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x55555554a0506223, 0x5555555555555555, -0xb504f332, x4, 1640, x5)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4889, 0x5555555555555555, 0xb504f334, x4, 1648, x5)
+
+inst_228:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaad, -0x5555555555555556, 0x3, x4, 1656, x5)
+
+inst_229:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffffffff, -0x5555555555555556, 0x5555555555555555, x4, 1664, x5)
+
+inst_230:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555554, -0x5555555555555556, -0x5555555555555556, x4, 1672, x5)
+
+inst_231:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555556, 0x5, x4, 1680, x5)
+
+inst_232:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0xdddddddddddddddd, -0x5555555555555556, 0x3333333333333333, x4, 1688, x5)
+
+inst_233:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x1111111111111110, -0x5555555555555556, 0x6666666666666666, x4, 1696, x5)
+
+inst_234:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaa9f5a5b777, -0x5555555555555556, -0xb504f333, x4, 1704, x5)
+
+inst_235:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab5faf9ddd, -0x5555555555555556, 0xb504f333, x4, 1712, x5)
+
+inst_236:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaac, -0x5555555555555556, 0x2, x4, 1720, x5)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0xfffffffffffffffe, -0x5555555555555556, 0x5555555555555554, x4, 1728, x5)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x0, x4, 1736, x5)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x4, x4, 1744, x5)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0xdddddddddddddddc, -0x5555555555555556, 0x3333333333333332, x4, 1752, x5)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x111111111111110f, -0x5555555555555556, 0x6666666666666665, x4, 1760, x5)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab5faf9ddc, -0x5555555555555556, 0xb504f332, x4, 1768, x5)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x0, -0x5555555555555556, 0x5555555555555556, x4, 1776, x5)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555555, -0x5555555555555556, -0x5555555555555555, x4, 1784, x5)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaab0, -0x5555555555555556, 0x6, x4, 1792, x5)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0xddddddddddddddde, -0x5555555555555556, 0x3333333333333334, x4, 1800, x5)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x1111111111111111, -0x5555555555555556, 0x6666666666666667, x4, 1808, x5)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaa9f5a5b778, -0x5555555555555556, -0xb504f332, x4, 1816, x5)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab5faf9dde, -0x5555555555555556, 0xb504f334, x4, 1824, x5)
+
+inst_250:
+// rs1_val==5 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x8, 0x5, 0x3, x4, 1832, x5)
+
+inst_251:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x555555555555555a, 0x5, 0x5555555555555555, x4, 1840, x5)
+
+inst_252:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x5, -0x5555555555555556, x4, 1848, x5)
+
+inst_253:
+// rs1_val==5 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xa, 0x5, 0x5, x4, 1856, x5)
+
+inst_254:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333338, 0x5, 0x3333333333333333, x4, 1864, x5)
+
+inst_255:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666b, 0x5, 0x6666666666666666, x4, 1872, x5)
+
+inst_256:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd2, 0x5, -0xb504f333, x4, 1880, x5)
+
+inst_257:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xb504f338, 0x5, 0xb504f333, x4, 1888, x5)
+
+inst_258:
+// rs1_val==5 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x7, 0x5, 0x2, x4, 1896, x5)
+
+inst_259:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555559, 0x5, 0x5555555555555554, x4, 1904, x5)
+
+inst_260:
+// rs1_val==5 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x5, 0x5, 0x0, x4, 1912, x5)
+
+inst_261:
+// rs1_val==5 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x9, 0x5, 0x4, x4, 1920, x5)
+
+inst_262:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333337, 0x5, 0x3333333333333332, x4, 1928, x5)
+
+inst_263:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666a, 0x5, 0x6666666666666665, x4, 1936, x5)
+
+inst_264:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xb504f337, 0x5, 0xb504f332, x4, 1944, x5)
+
+inst_265:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x555555555555555b, 0x5, 0x5555555555555556, x4, 1952, x5)
+
+inst_266:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaab0, 0x5, -0x5555555555555555, x4, 1960, x5)
+
+inst_267:
+// rs1_val==5 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xb, 0x5, 0x6, x4, 1968, x5)
+
+inst_268:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333339, 0x5, 0x3333333333333334, x4, 1976, x5)
+
+inst_269:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666c, 0x5, 0x6666666666666667, x4, 1984, x5)
+
+inst_270:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd3, 0x5, -0xb504f332, x4, 1992, x5)
+
+inst_271:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0xb504f339, 0x5, 0xb504f334, x4, 2000, x5)
+
+inst_272:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333336, 0x3333333333333333, 0x3, x4, 2008, x5)
+
+inst_273:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888888, 0x3333333333333333, 0x5555555555555555, x4, 2016, x5)
+
+inst_274:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xdddddddddddddddd, 0x3333333333333333, -0x5555555555555556, x4, 2024, x5)
+
+inst_275:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333338, 0x3333333333333333, 0x5, x4, 2032, x5)
+
+inst_276:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666666, 0x3333333333333333, 0x3333333333333333, x4, 2040, x5)
+RVTEST_SIGBASE( x4,signature_x4_1)
+
+inst_277:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x9999999999999999, 0x3333333333333333, 0x6666666666666666, x4, 0, x5)
+
+inst_278:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x333333327e2e4000, 0x3333333333333333, -0xb504f333, x4, 8, x5)
+
+inst_279:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382666, 0x3333333333333333, 0xb504f333, x4, 16, x5)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333335, 0x3333333333333333, 0x2, x4, 24, x5)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888887, 0x3333333333333333, 0x5555555555555554, x4, 32, x5)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x0, x4, 40, x5)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333337, 0x3333333333333333, 0x4, x4, 48, x5)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666665, 0x3333333333333333, 0x3333333333333332, x4, 56, x5)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x9999999999999998, 0x3333333333333333, 0x6666666666666665, x4, 64, x5)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382665, 0x3333333333333333, 0xb504f332, x4, 72, x5)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888889, 0x3333333333333333, 0x5555555555555556, x4, 80, x5)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xddddddddddddddde, 0x3333333333333333, -0x5555555555555555, x4, 88, x5)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333339, 0x3333333333333333, 0x6, x4, 96, x5)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666667, 0x3333333333333333, 0x3333333333333334, x4, 104, x5)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x999999999999999a, 0x3333333333333333, 0x6666666666666667, x4, 112, x5)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x333333327e2e4001, 0x3333333333333333, -0xb504f332, x4, 120, x5)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382667, 0x3333333333333333, 0xb504f334, x4, 128, x5)
+
+inst_294:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666669, 0x6666666666666666, 0x3, x4, 136, x5)
+
+inst_295:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x6666666666666666, 0x5555555555555555, x4, 144, x5)
+
+inst_296:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x1111111111111110, 0x6666666666666666, -0x5555555555555556, x4, 152, x5)
+
+inst_297:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666b, 0x6666666666666666, 0x5, x4, 160, x5)
+
+inst_298:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x9999999999999999, 0x6666666666666666, 0x3333333333333333, x4, 168, x5)
+
+inst_299:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0xcccccccccccccccc, 0x6666666666666666, 0x6666666666666666, x4, 176, x5)
+
+inst_300:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x66666665b1617333, 0x6666666666666666, -0xb504f333, x4, 184, x5)
+
+inst_301:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b5999, 0x6666666666666666, 0xb504f333, x4, 192, x5)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666668, 0x6666666666666666, 0x2, x4, 200, x5)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbba, 0x6666666666666666, 0x5555555555555554, x4, 208, x5)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x0, x4, 216, x5)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666a, 0x6666666666666666, 0x4, x4, 224, x5)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x9999999999999998, 0x6666666666666666, 0x3333333333333332, x4, 232, x5)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0xcccccccccccccccb, 0x6666666666666666, 0x6666666666666665, x4, 240, x5)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b5998, 0x6666666666666666, 0xb504f332, x4, 248, x5)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbbc, 0x6666666666666666, 0x5555555555555556, x4, 256, x5)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x1111111111111111, 0x6666666666666666, -0x5555555555555555, x4, 264, x5)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666c, 0x6666666666666666, 0x6, x4, 272, x5)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x999999999999999a, 0x6666666666666666, 0x3333333333333334, x4, 280, x5)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0xcccccccccccccccd, 0x6666666666666666, 0x6666666666666667, x4, 288, x5)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x66666665b1617334, 0x6666666666666666, -0xb504f332, x4, 296, x5)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b599a, 0x6666666666666666, 0xb504f334, x4, 304, x5)
+
+inst_316:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd0, -0xb504f333, 0x3, x4, 312, x5)
+
+inst_317:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x55555554a0506222, -0xb504f333, 0x5555555555555555, x4, 320, x5)
+
+inst_318:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaa9f5a5b777, -0xb504f333, -0x5555555555555556, x4, 328, x5)
+
+inst_319:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd2, -0xb504f333, 0x5, x4, 336, x5)
+
+inst_320:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x333333327e2e4000, -0xb504f333, 0x3333333333333333, x4, 344, x5)
+
+inst_321:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x66666665b1617333, -0xb504f333, 0x6666666666666666, x4, 352, x5)
+
+inst_322:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xfffffffe95f6199a, -0xb504f333, -0xb504f333, x4, 360, x5)
+
+inst_323:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x0, -0xb504f333, 0xb504f333, x4, 368, x5)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0ccf, -0xb504f333, 0x2, x4, 376, x5)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x55555554a0506221, -0xb504f333, 0x5555555555555554, x4, 384, x5)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x0, x4, 392, x5)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd1, -0xb504f333, 0x4, x4, 400, x5)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x333333327e2e3fff, -0xb504f333, 0x3333333333333332, x4, 408, x5)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x66666665b1617332, -0xb504f333, 0x6666666666666665, x4, 416, x5)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffffffff, -0xb504f333, 0xb504f332, x4, 424, x5)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x55555554a0506223, -0xb504f333, 0x5555555555555556, x4, 432, x5)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaa9f5a5b778, -0xb504f333, -0x5555555555555555, x4, 440, x5)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd3, -0xb504f333, 0x6, x4, 448, x5)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x333333327e2e4001, -0xb504f333, 0x3333333333333334, x4, 456, x5)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x66666665b1617334, -0xb504f333, 0x6666666666666667, x4, 464, x5)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xfffffffe95f6199b, -0xb504f333, -0xb504f332, x4, 472, x5)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x1, -0xb504f333, 0xb504f334, x4, 480, x5)
+
+inst_338:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xb504f336, 0xb504f333, 0x3, x4, 488, x5)
+
+inst_339:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4888, 0xb504f333, 0x5555555555555555, x4, 496, x5)
+
+inst_340:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab5faf9ddd, 0xb504f333, -0x5555555555555556, x4, 504, x5)
+
+inst_341:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xb504f338, 0xb504f333, 0x5, x4, 512, x5)
+
+inst_342:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382666, 0xb504f333, 0x3333333333333333, x4, 520, x5)
+
+inst_343:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b5999, 0xb504f333, 0x6666666666666666, x4, 528, x5)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x0, 0xb504f333, -0xb504f333, x4, 536, x5)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x16a09e666, 0xb504f333, 0xb504f333, x4, 544, x5)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xb504f335, 0xb504f333, 0x2, x4, 552, x5)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4887, 0xb504f333, 0x5555555555555554, x4, 560, x5)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xb504f333, 0xb504f333, 0x0, x4, 568, x5)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xb504f337, 0xb504f333, 0x4, x4, 576, x5)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382665, 0xb504f333, 0x3333333333333332, x4, 584, x5)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b5998, 0xb504f333, 0x6666666666666665, x4, 592, x5)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x16a09e665, 0xb504f333, 0xb504f332, x4, 600, x5)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4889, 0xb504f333, 0x5555555555555556, x4, 608, x5)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab5faf9dde, 0xb504f333, -0x5555555555555555, x4, 616, x5)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xb504f339, 0xb504f333, 0x6, x4, 624, x5)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382667, 0xb504f333, 0x3333333333333334, x4, 632, x5)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b599a, 0xb504f333, 0x6666666666666667, x4, 640, x5)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x1, 0xb504f333, -0xb504f332, x4, 648, x5)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x16a09e667, 0xb504f333, 0xb504f334, x4, 656, x5)
+
+inst_360:
+// rs1_val==2 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x5, 0x2, 0x3, x4, 664, x5)
+
+inst_361:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555557, 0x2, 0x5555555555555555, x4, 672, x5)
+
+inst_362:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaac, 0x2, -0x5555555555555556, x4, 680, x5)
+
+inst_363:
+// rs1_val==2 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x7, 0x2, 0x5, x4, 688, x5)
+
+inst_364:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333335, 0x2, 0x3333333333333333, x4, 696, x5)
+
+inst_365:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666668, 0x2, 0x6666666666666666, x4, 704, x5)
+
+inst_366:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0ccf, 0x2, -0xb504f333, x4, 712, x5)
+
+inst_367:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xb504f335, 0x2, 0xb504f333, x4, 720, x5)
+
+inst_368:
+// rs1_val==2 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x4, 0x2, 0x2, x4, 728, x5)
+
+inst_369:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555556, 0x2, 0x5555555555555554, x4, 736, x5)
+
+inst_370:
+// rs1_val==2 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x2, 0x2, 0x0, x4, 744, x5)
+
+inst_371:
+// rs1_val==2 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x6, 0x2, 0x4, x4, 752, x5)
+
+inst_372:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333334, 0x2, 0x3333333333333332, x4, 760, x5)
+
+inst_373:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666667, 0x2, 0x6666666666666665, x4, 768, x5)
+
+inst_374:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xb504f334, 0x2, 0xb504f332, x4, 776, x5)
+
+inst_375:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555558, 0x2, 0x5555555555555556, x4, 784, x5)
+
+inst_376:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaad, 0x2, -0x5555555555555555, x4, 792, x5)
+
+inst_377:
+// rs1_val==2 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x8, 0x2, 0x6, x4, 800, x5)
+
+inst_378:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333336, 0x2, 0x3333333333333334, x4, 808, x5)
+
+inst_379:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666669, 0x2, 0x6666666666666667, x4, 816, x5)
+
+inst_380:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd0, 0x2, -0xb504f332, x4, 824, x5)
+
+inst_381:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0xb504f336, 0x2, 0xb504f334, x4, 832, x5)
+
+inst_382:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555557, 0x5555555555555554, 0x3, x4, 840, x5)
+
+inst_383:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5555555555555554, 0x5555555555555555, x4, 848, x5)
+
+inst_384:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xfffffffffffffffe, 0x5555555555555554, -0x5555555555555556, x4, 856, x5)
+
+inst_385:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555559, 0x5555555555555554, 0x5, x4, 864, x5)
+
+inst_386:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888887, 0x5555555555555554, 0x3333333333333333, x4, 872, x5)
+
+inst_387:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbba, 0x5555555555555554, 0x6666666666666666, x4, 880, x5)
+
+inst_388:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x55555554a0506221, 0x5555555555555554, -0xb504f333, x4, 888, x5)
+
+inst_389:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4887, 0x5555555555555554, 0xb504f333, x4, 896, x5)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x2, x4, 904, x5)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaa8, 0x5555555555555554, 0x5555555555555554, x4, 912, x5)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x0, x4, 920, x5)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555558, 0x5555555555555554, 0x4, x4, 928, x5)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888886, 0x5555555555555554, 0x3333333333333332, x4, 936, x5)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbb9, 0x5555555555555554, 0x6666666666666665, x4, 944, x5)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4886, 0x5555555555555554, 0xb504f332, x4, 952, x5)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555554, 0x5555555555555556, x4, 960, x5)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffffffff, 0x5555555555555554, -0x5555555555555555, x4, 968, x5)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x555555555555555a, 0x5555555555555554, 0x6, x4, 976, x5)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888888, 0x5555555555555554, 0x3333333333333334, x4, 984, x5)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x5555555555555554, 0x6666666666666667, x4, 992, x5)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x55555554a0506222, 0x5555555555555554, -0xb504f332, x4, 1000, x5)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4888, 0x5555555555555554, 0xb504f334, x4, 1008, x5)
+
+inst_404:
+// rs1_val==0 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x3, 0x0, 0x3, x4, 1016, x5)
+
+inst_405:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555555, 0x0, 0x5555555555555555, x4, 1024, x5)
+
+inst_406:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x0, -0x5555555555555556, x4, 1032, x5)
+
+inst_407:
+// rs1_val==0 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x5, 0x0, 0x5, x4, 1040, x5)
+
+inst_408:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333333, 0x0, 0x3333333333333333, x4, 1048, x5)
+
+inst_409:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666666, 0x0, 0x6666666666666666, x4, 1056, x5)
+
+inst_410:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0ccd, 0x0, -0xb504f333, x4, 1064, x5)
+
+inst_411:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xb504f333, 0x0, 0xb504f333, x4, 1072, x5)
+
+inst_412:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaae, 0x4, -0x5555555555555556, x4, 1080, x5)
+
+inst_413:
+// rs1_val==4 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x9, 0x4, 0x5, x4, 1088, x5)
+
+inst_414:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333337, 0x4, 0x3333333333333333, x4, 1096, x5)
+
+inst_415:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666a, 0x4, 0x6666666666666666, x4, 1104, x5)
+
+inst_416:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd1, 0x4, -0xb504f333, x4, 1112, x5)
+
+inst_417:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xb504f337, 0x4, 0xb504f333, x4, 1120, x5)
+
+inst_418:
+// rs1_val==4 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x6, 0x4, 0x2, x4, 1128, x5)
+
+inst_419:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555558, 0x4, 0x5555555555555554, x4, 1136, x5)
+
+inst_420:
+// rs1_val==4 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x4, 0x4, 0x0, x4, 1144, x5)
+
+inst_421:
+// rs1_val==4 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x8, 0x4, 0x4, x4, 1152, x5)
+
+inst_422:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333336, 0x4, 0x3333333333333332, x4, 1160, x5)
+
+inst_423:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666669, 0x4, 0x6666666666666665, x4, 1168, x5)
+
+inst_424:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xb504f336, 0x4, 0xb504f332, x4, 1176, x5)
+
+inst_425:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x555555555555555a, 0x4, 0x5555555555555556, x4, 1184, x5)
+
+inst_426:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x4, -0x5555555555555555, x4, 1192, x5)
+
+inst_427:
+// rs1_val==4 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xa, 0x4, 0x6, x4, 1200, x5)
+
+inst_428:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333338, 0x4, 0x3333333333333334, x4, 1208, x5)
+
+inst_429:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666b, 0x4, 0x6666666666666667, x4, 1216, x5)
+
+inst_430:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd2, 0x4, -0xb504f332, x4, 1224, x5)
+
+inst_431:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0xb504f338, 0x4, 0xb504f334, x4, 1232, x5)
+
+inst_432:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333335, 0x3333333333333332, 0x3, x4, 1240, x5)
+
+inst_433:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888887, 0x3333333333333332, 0x5555555555555555, x4, 1248, x5)
+
+inst_434:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xdddddddddddddddc, 0x3333333333333332, -0x5555555555555556, x4, 1256, x5)
+
+inst_435:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333337, 0x3333333333333332, 0x5, x4, 1264, x5)
+
+inst_436:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666665, 0x3333333333333332, 0x3333333333333333, x4, 1272, x5)
+
+inst_437:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x9999999999999998, 0x3333333333333332, 0x6666666666666666, x4, 1280, x5)
+
+inst_438:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x333333327e2e3fff, 0x3333333333333332, -0xb504f333, x4, 1288, x5)
+
+inst_439:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382665, 0x3333333333333332, 0xb504f333, x4, 1296, x5)
+
+inst_440:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333334, 0x3333333333333332, 0x2, x4, 1304, x5)
+
+inst_441:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888886, 0x3333333333333332, 0x5555555555555554, x4, 1312, x5)
+
+inst_442:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x0, x4, 1320, x5)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333336, 0x3333333333333332, 0x4, x4, 1328, x5)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666664, 0x3333333333333332, 0x3333333333333332, x4, 1336, x5)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x9999999999999997, 0x3333333333333332, 0x6666666666666665, x4, 1344, x5)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382664, 0x3333333333333332, 0xb504f332, x4, 1352, x5)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888888, 0x3333333333333332, 0x5555555555555556, x4, 1360, x5)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xdddddddddddddddd, 0x3333333333333332, -0x5555555555555555, x4, 1368, x5)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333338, 0x3333333333333332, 0x6, x4, 1376, x5)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666666, 0x3333333333333332, 0x3333333333333334, x4, 1384, x5)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x9999999999999999, 0x3333333333333332, 0x6666666666666667, x4, 1392, x5)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x333333327e2e4000, 0x3333333333333332, -0xb504f332, x4, 1400, x5)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382666, 0x3333333333333332, 0xb504f334, x4, 1408, x5)
+
+inst_454:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666668, 0x6666666666666665, 0x3, x4, 1416, x5)
+
+inst_455:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbba, 0x6666666666666665, 0x5555555555555555, x4, 1424, x5)
+
+inst_456:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x111111111111110f, 0x6666666666666665, -0x5555555555555556, x4, 1432, x5)
+
+inst_457:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666a, 0x6666666666666665, 0x5, x4, 1440, x5)
+
+inst_458:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x9999999999999998, 0x6666666666666665, 0x3333333333333333, x4, 1448, x5)
+
+inst_459:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0xcccccccccccccccb, 0x6666666666666665, 0x6666666666666666, x4, 1456, x5)
+
+inst_460:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x66666665b1617332, 0x6666666666666665, -0xb504f333, x4, 1464, x5)
+
+inst_461:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b5998, 0x6666666666666665, 0xb504f333, x4, 1472, x5)
+
+inst_462:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x2, x4, 1480, x5)
+
+inst_463:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbb9, 0x6666666666666665, 0x5555555555555554, x4, 1488, x5)
+
+inst_464:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x0, x4, 1496, x5)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666669, 0x6666666666666665, 0x4, x4, 1504, x5)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x9999999999999997, 0x6666666666666665, 0x3333333333333332, x4, 1512, x5)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0xccccccccccccccca, 0x6666666666666665, 0x6666666666666665, x4, 1520, x5)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b5997, 0x6666666666666665, 0xb504f332, x4, 1528, x5)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x6666666666666665, 0x5555555555555556, x4, 1536, x5)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x1111111111111110, 0x6666666666666665, -0x5555555555555555, x4, 1544, x5)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666b, 0x6666666666666665, 0x6, x4, 1552, x5)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x9999999999999999, 0x6666666666666665, 0x3333333333333334, x4, 1560, x5)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0xcccccccccccccccc, 0x6666666666666665, 0x6666666666666667, x4, 1568, x5)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x66666665b1617333, 0x6666666666666665, -0xb504f332, x4, 1576, x5)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b5999, 0x6666666666666665, 0xb504f334, x4, 1584, x5)
+
+inst_476:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xb504f335, 0xb504f332, 0x3, x4, 1592, x5)
+
+inst_477:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4887, 0xb504f332, 0x5555555555555555, x4, 1600, x5)
+
+inst_478:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab5faf9ddc, 0xb504f332, -0x5555555555555556, x4, 1608, x5)
+
+inst_479:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xb504f337, 0xb504f332, 0x5, x4, 1616, x5)
+
+inst_480:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382665, 0xb504f332, 0x3333333333333333, x4, 1624, x5)
+
+inst_481:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b5998, 0xb504f332, 0x6666666666666666, x4, 1632, x5)
+
+inst_482:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffffffff, 0xb504f332, -0xb504f333, x4, 1640, x5)
+
+inst_483:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x16a09e665, 0xb504f332, 0xb504f333, x4, 1648, x5)
+
+inst_484:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xb504f334, 0xb504f332, 0x2, x4, 1656, x5)
+
+inst_485:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4886, 0xb504f332, 0x5555555555555554, x4, 1664, x5)
+
+inst_486:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xb504f332, 0xb504f332, 0x0, x4, 1672, x5)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xb504f336, 0xb504f332, 0x4, x4, 1680, x5)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382664, 0xb504f332, 0x3333333333333332, x4, 1688, x5)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b5997, 0xb504f332, 0x6666666666666665, x4, 1696, x5)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x16a09e664, 0xb504f332, 0xb504f332, x4, 1704, x5)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4888, 0xb504f332, 0x5555555555555556, x4, 1712, x5)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab5faf9ddd, 0xb504f332, -0x5555555555555555, x4, 1720, x5)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xb504f338, 0xb504f332, 0x6, x4, 1728, x5)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382666, 0xb504f332, 0x3333333333333334, x4, 1736, x5)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b5999, 0xb504f332, 0x6666666666666667, x4, 1744, x5)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x0, 0xb504f332, -0xb504f332, x4, 1752, x5)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x16a09e666, 0xb504f332, 0xb504f334, x4, 1760, x5)
+
+inst_498:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555559, 0x5555555555555556, 0x3, x4, 1768, x5)
+
+inst_499:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555556, 0x5555555555555555, x4, 1776, x5)
+
+inst_500:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x0, 0x5555555555555556, -0x5555555555555556, x4, 1784, x5)
+
+inst_501:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x555555555555555b, 0x5555555555555556, 0x5, x4, 1792, x5)
+
+inst_502:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888889, 0x5555555555555556, 0x3333333333333333, x4, 1800, x5)
+
+inst_503:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbbc, 0x5555555555555556, 0x6666666666666666, x4, 1808, x5)
+
+inst_504:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x55555554a0506223, 0x5555555555555556, -0xb504f333, x4, 1816, x5)
+
+inst_505:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4889, 0x5555555555555556, 0xb504f333, x4, 1824, x5)
+
+inst_506:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555558, 0x5555555555555556, 0x2, x4, 1832, x5)
+
+inst_507:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555556, 0x5555555555555554, x4, 1840, x5)
+
+inst_508:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x0, x4, 1848, x5)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x555555555555555a, 0x5555555555555556, 0x4, x4, 1856, x5)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888888, 0x5555555555555556, 0x3333333333333332, x4, 1864, x5)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x5555555555555556, 0x6666666666666665, x4, 1872, x5)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4888, 0x5555555555555556, 0xb504f332, x4, 1880, x5)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaac, 0x5555555555555556, 0x5555555555555556, x4, 1888, x5)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x1, 0x5555555555555556, -0x5555555555555555, x4, 1896, x5)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x555555555555555c, 0x5555555555555556, 0x6, x4, 1904, x5)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x888888888888888a, 0x5555555555555556, 0x3333333333333334, x4, 1912, x5)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbbd, 0x5555555555555556, 0x6666666666666667, x4, 1920, x5)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x55555554a0506224, 0x5555555555555556, -0xb504f332, x4, 1928, x5)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a488a, 0x5555555555555556, 0xb504f334, x4, 1936, x5)
+
+inst_520:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaae, -0x5555555555555555, 0x3, x4, 1944, x5)
+
+inst_521:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x0, -0x5555555555555555, 0x5555555555555555, x4, 1952, x5)
+
+inst_522:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555555, -0x5555555555555555, -0x5555555555555556, x4, 1960, x5)
+
+inst_523:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaab0, -0x5555555555555555, 0x5, x4, 1968, x5)
+
+inst_524:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0xddddddddddddddde, -0x5555555555555555, 0x3333333333333333, x4, 1976, x5)
+
+inst_525:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x1111111111111111, -0x5555555555555555, 0x6666666666666666, x4, 1984, x5)
+
+inst_526:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaa9f5a5b778, -0x5555555555555555, -0xb504f333, x4, 1992, x5)
+
+inst_527:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab5faf9dde, -0x5555555555555555, 0xb504f333, x4, 2000, x5)
+
+inst_528:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaad, -0x5555555555555555, 0x2, x4, 2008, x5)
+
+inst_529:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0xffffffffffffffff, -0x5555555555555555, 0x5555555555555554, x4, 2016, x5)
+
+inst_530:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x0, x4, 2024, x5)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x4, x4, 2032, x5)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0xdddddddddddddddd, -0x5555555555555555, 0x3333333333333332, x4, 2040, x5)
+RVTEST_SIGBASE( x4,signature_x4_2)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x1111111111111110, -0x5555555555555555, 0x6666666666666665, x4, 0, x5)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab5faf9ddd, -0x5555555555555555, 0xb504f332, x4, 8, x5)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x1, -0x5555555555555555, 0x5555555555555556, x4, 16, x5)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555556, -0x5555555555555555, -0x5555555555555555, x4, 24, x5)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaab1, -0x5555555555555555, 0x6, x4, 32, x5)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0xdddddddddddddddf, -0x5555555555555555, 0x3333333333333334, x4, 40, x5)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x1111111111111112, -0x5555555555555555, 0x6666666666666667, x4, 48, x5)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaa9f5a5b779, -0x5555555555555555, -0xb504f332, x4, 56, x5)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab5faf9ddf, -0x5555555555555555, 0xb504f334, x4, 64, x5)
+
+inst_542:
+// rs1_val==6 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x9, 0x6, 0x3, x4, 72, x5)
+
+inst_543:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x555555555555555b, 0x6, 0x5555555555555555, x4, 80, x5)
+
+inst_544:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaab0, 0x6, -0x5555555555555556, x4, 88, x5)
+
+inst_545:
+// rs1_val==6 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xb, 0x6, 0x5, x4, 96, x5)
+
+inst_546:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333339, 0x6, 0x3333333333333333, x4, 104, x5)
+
+inst_547:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666c, 0x6, 0x6666666666666666, x4, 112, x5)
+
+inst_548:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd3, 0x6, -0xb504f333, x4, 120, x5)
+
+inst_549:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xb504f339, 0x6, 0xb504f333, x4, 128, x5)
+
+inst_550:
+// rs1_val==6 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x8, 0x6, 0x2, x4, 136, x5)
+
+inst_551:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x555555555555555a, 0x6, 0x5555555555555554, x4, 144, x5)
+
+inst_552:
+// rs1_val==6 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x6, 0x6, 0x0, x4, 152, x5)
+
+inst_553:
+// rs1_val==6 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xa, 0x6, 0x4, x4, 160, x5)
+
+inst_554:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333338, 0x6, 0x3333333333333332, x4, 168, x5)
+
+inst_555:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666b, 0x6, 0x6666666666666665, x4, 176, x5)
+
+inst_556:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xb504f338, 0x6, 0xb504f332, x4, 184, x5)
+
+inst_557:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x555555555555555c, 0x6, 0x5555555555555556, x4, 192, x5)
+
+inst_558:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaab1, 0x6, -0x5555555555555555, x4, 200, x5)
+
+inst_559:
+// rs1_val==6 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xc, 0x6, 0x6, x4, 208, x5)
+
+inst_560:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x333333333333333a, 0x6, 0x3333333333333334, x4, 216, x5)
+
+inst_561:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666d, 0x6, 0x6666666666666667, x4, 224, x5)
+
+inst_562:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd4, 0x6, -0xb504f332, x4, 232, x5)
+
+inst_563:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0xb504f33a, 0x6, 0xb504f334, x4, 240, x5)
+
+inst_564:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333337, 0x3333333333333334, 0x3, x4, 248, x5)
+
+inst_565:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888889, 0x3333333333333334, 0x5555555555555555, x4, 256, x5)
+
+inst_566:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xddddddddddddddde, 0x3333333333333334, -0x5555555555555556, x4, 264, x5)
+
+inst_567:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333339, 0x3333333333333334, 0x5, x4, 272, x5)
+
+inst_568:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666667, 0x3333333333333334, 0x3333333333333333, x4, 280, x5)
+
+inst_569:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x999999999999999a, 0x3333333333333334, 0x6666666666666666, x4, 288, x5)
+
+inst_570:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x333333327e2e4001, 0x3333333333333334, -0xb504f333, x4, 296, x5)
+
+inst_571:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382667, 0x3333333333333334, 0xb504f333, x4, 304, x5)
+
+inst_572:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333336, 0x3333333333333334, 0x2, x4, 312, x5)
+
+inst_573:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x8888888888888888, 0x3333333333333334, 0x5555555555555554, x4, 320, x5)
+
+inst_574:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x0, x4, 328, x5)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333338, 0x3333333333333334, 0x4, x4, 336, x5)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666666, 0x3333333333333334, 0x3333333333333332, x4, 344, x5)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x9999999999999999, 0x3333333333333334, 0x6666666666666665, x4, 352, x5)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382666, 0x3333333333333334, 0xb504f332, x4, 360, x5)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x888888888888888a, 0x3333333333333334, 0x5555555555555556, x4, 368, x5)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xdddddddddddddddf, 0x3333333333333334, -0x5555555555555555, x4, 376, x5)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x333333333333333a, 0x3333333333333334, 0x6, x4, 384, x5)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666668, 0x3333333333333334, 0x3333333333333334, x4, 392, x5)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x999999999999999b, 0x3333333333333334, 0x6666666666666667, x4, 400, x5)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x333333327e2e4002, 0x3333333333333334, -0xb504f332, x4, 408, x5)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382668, 0x3333333333333334, 0xb504f334, x4, 416, x5)
+
+inst_586:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666a, 0x6666666666666667, 0x3, x4, 424, x5)
+
+inst_587:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbbc, 0x6666666666666667, 0x5555555555555555, x4, 432, x5)
+
+inst_588:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x1111111111111111, 0x6666666666666667, -0x5555555555555556, x4, 440, x5)
+
+inst_589:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666c, 0x6666666666666667, 0x5, x4, 448, x5)
+
+inst_590:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x999999999999999a, 0x6666666666666667, 0x3333333333333333, x4, 456, x5)
+
+inst_591:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0xcccccccccccccccd, 0x6666666666666667, 0x6666666666666666, x4, 464, x5)
+
+inst_592:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x66666665b1617334, 0x6666666666666667, -0xb504f333, x4, 472, x5)
+
+inst_593:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b599a, 0x6666666666666667, 0xb504f333, x4, 480, x5)
+
+inst_594:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666669, 0x6666666666666667, 0x2, x4, 488, x5)
+
+inst_595:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x6666666666666667, 0x5555555555555554, x4, 496, x5)
+
+inst_596:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x0, x4, 504, x5)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666b, 0x6666666666666667, 0x4, x4, 512, x5)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x9999999999999999, 0x6666666666666667, 0x3333333333333332, x4, 520, x5)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0xcccccccccccccccc, 0x6666666666666667, 0x6666666666666665, x4, 528, x5)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b5999, 0x6666666666666667, 0xb504f332, x4, 536, x5)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xbbbbbbbbbbbbbbbd, 0x6666666666666667, 0x5555555555555556, x4, 544, x5)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x1111111111111112, 0x6666666666666667, -0x5555555555555555, x4, 552, x5)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x666666666666666d, 0x6666666666666667, 0x6, x4, 560, x5)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x999999999999999b, 0x6666666666666667, 0x3333333333333334, x4, 568, x5)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0xccccccccccccccce, 0x6666666666666667, 0x6666666666666667, x4, 576, x5)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x66666665b1617335, 0x6666666666666667, -0xb504f332, x4, 584, x5)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b599b, 0x6666666666666667, 0xb504f334, x4, 592, x5)
+
+inst_608:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd1, -0xb504f332, 0x3, x4, 600, x5)
+
+inst_609:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x55555554a0506223, -0xb504f332, 0x5555555555555555, x4, 608, x5)
+
+inst_610:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd3, -0xb504f332, 0x5, x4, 616, x5)
+
+inst_611:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x333333327e2e4001, -0xb504f332, 0x3333333333333333, x4, 624, x5)
+
+inst_612:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x66666665b1617334, -0xb504f332, 0x6666666666666666, x4, 632, x5)
+
+inst_613:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0xfffffffe95f6199b, -0xb504f332, -0xb504f333, x4, 640, x5)
+
+inst_614:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x1, -0xb504f332, 0xb504f333, x4, 648, x5)
+
+inst_615:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd0, -0xb504f332, 0x2, x4, 656, x5)
+
+inst_616:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x55555554a0506222, -0xb504f332, 0x5555555555555554, x4, 664, x5)
+
+inst_617:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x0, x4, 672, x5)
+
+inst_618:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd2, -0xb504f332, 0x4, x4, 680, x5)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x333333327e2e4000, -0xb504f332, 0x3333333333333332, x4, 688, x5)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x66666665b1617333, -0xb504f332, 0x6666666666666665, x4, 696, x5)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x0, -0xb504f332, 0xb504f332, x4, 704, x5)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x55555554a0506224, -0xb504f332, 0x5555555555555556, x4, 712, x5)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaa9f5a5b779, -0xb504f332, -0x5555555555555555, x4, 720, x5)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cd4, -0xb504f332, 0x6, x4, 728, x5)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x333333327e2e4002, -0xb504f332, 0x3333333333333334, x4, 736, x5)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x66666665b1617335, -0xb504f332, 0x6666666666666667, x4, 744, x5)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xfffffffe95f6199c, -0xb504f332, -0xb504f332, x4, 752, x5)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x2, -0xb504f332, 0xb504f334, x4, 760, x5)
+
+inst_629:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0xb504f337, 0xb504f334, 0x3, x4, 768, x5)
+
+inst_630:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4889, 0xb504f334, 0x5555555555555555, x4, 776, x5)
+
+inst_631:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab5faf9dde, 0xb504f334, -0x5555555555555556, x4, 784, x5)
+
+inst_632:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5
+TEST_CR_OP( c.add, x10, x11, 0xb504f339, 0xb504f334, 0x5, x4, 792, x5)
+
+inst_633:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382667, 0xb504f334, 0x3333333333333333, x4, 800, x5)
+
+inst_634:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b599a, 0xb504f334, 0x6666666666666666, x4, 808, x5)
+
+inst_635:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x1, 0xb504f334, -0xb504f333, x4, 816, x5)
+
+inst_636:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f333
+TEST_CR_OP( c.add, x10, x11, 0x16a09e667, 0xb504f334, 0xb504f333, x4, 824, x5)
+
+inst_637:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0xb504f336, 0xb504f334, 0x2, x4, 832, x5)
+
+inst_638:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a4888, 0xb504f334, 0x5555555555555554, x4, 840, x5)
+
+inst_639:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xb504f334, 0xb504f334, 0x0, x4, 848, x5)
+
+inst_640:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0xb504f338, 0xb504f334, 0x4, x4, 856, x5)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382666, 0xb504f334, 0x3333333333333332, x4, 864, x5)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b5999, 0xb504f334, 0x6666666666666665, x4, 872, x5)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x16a09e666, 0xb504f334, 0xb504f332, x4, 880, x5)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x555555560a5a488a, 0xb504f334, 0x5555555555555556, x4, 888, x5)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaab5faf9ddf, 0xb504f334, -0x5555555555555555, x4, 896, x5)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0xb504f33a, 0xb504f334, 0x6, x4, 904, x5)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x33333333e8382668, 0xb504f334, 0x3333333333333334, x4, 912, x5)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x666666671b6b599b, 0xb504f334, 0x6666666666666667, x4, 920, x5)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0x2, 0xb504f334, -0xb504f332, x4, 928, x5)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0x16a09e668, 0xb504f334, 0xb504f334, x4, 936, x5)
+
+inst_651:
+// rs1_val==0 and rs2_val==2,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x2
+TEST_CR_OP( c.add, x10, x11, 0x2, 0x0, 0x2, x4, 944, x5)
+
+inst_652:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555554
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555554, 0x0, 0x5555555555555554, x4, 952, x5)
+
+inst_653:
+// rs1_val==0 and rs2_val==0,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0x0, 0x0, 0x0, x4, 960, x5)
+
+inst_654:
+// rs1_val==0 and rs2_val==4,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x4
+TEST_CR_OP( c.add, x10, x11, 0x4, 0x0, 0x4, x4, 968, x5)
+
+inst_655:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333332
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333332, 0x0, 0x3333333333333332, x4, 976, x5)
+
+inst_656:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666665
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666665, 0x0, 0x6666666666666665, x4, 984, x5)
+
+inst_657:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xb504f332, 0x0, 0xb504f332, x4, 992, x5)
+
+inst_658:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555556
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555556, 0x0, 0x5555555555555556, x4, 1000, x5)
+
+inst_659:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0xaaaaaaaaaaaaaaab, 0x0, -0x5555555555555555, x4, 1008, x5)
+
+inst_660:
+// rs1_val==0 and rs2_val==6,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x6
+TEST_CR_OP( c.add, x10, x11, 0x6, 0x0, 0x6, x4, 1016, x5)
+
+inst_661:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333334
+TEST_CR_OP( c.add, x10, x11, 0x3333333333333334, 0x0, 0x3333333333333334, x4, 1024, x5)
+
+inst_662:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666667
+TEST_CR_OP( c.add, x10, x11, 0x6666666666666667, 0x0, 0x6666666666666667, x4, 1032, x5)
+
+inst_663:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f332
+TEST_CR_OP( c.add, x10, x11, 0xffffffff4afb0cce, 0x0, -0xb504f332, x4, 1040, x5)
+
+inst_664:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f334
+TEST_CR_OP( c.add, x10, x11, 0xb504f334, 0x0, 0xb504f334, x4, 1048, x5)
+
+inst_665:
+// rs1_val==4 and rs2_val==3,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x3
+TEST_CR_OP( c.add, x10, x11, 0x7, 0x4, 0x3, x4, 1056, x5)
+
+inst_666:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: c.add; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555555
+TEST_CR_OP( c.add, x10, x11, 0x5555555555555559, 0x4, 0x5555555555555555, x4, 1064, x5)
+
+inst_667:
+// rs2_val == 0, rs1_val == -1073741825
+// opcode: c.add; op1:x10; op2:x11; op1val:-0x40000001; op2val:0x0
+TEST_CR_OP( c.add, x10, x11, 0xffffffffbfffffff, -0x40000001, 0x0, x4, 1072, x5)
+
+inst_668:
+// rs1_val == 1, rs2_val == 68719476736
+// opcode: c.add; op1:x10; op2:x11; op1val:0x1; op2val:0x1000000000
+TEST_CR_OP( c.add, x10, x11, 0x1000000001, 0x1, 0x1000000000, x4, 1080, x5)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x6_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x6_1:
+ .fill 21*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_2:
+ .fill 136*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/caddi-01.S b/riscof/suite/rv64i_m/C/caddi-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..f1e6a3b7bd0dceaedbb57806f54207a3c8b95801
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/caddi-01.S
@@ -0,0 +1,2279 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.addi instruction of the RISC-V C extension for the caddi covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",caddi)
+
+RVTEST_SIGBASE( x13,signature_x13_1)
+
+inst_0:
+// rd==x15, rs1_val == imm_val, rs1_val == -3, imm_val == -3, rs1_val < 0 and imm_val < 0
+// opcode:c.addi; op1:x15; dest:x15 op1val:-0x3; immval:-0x3
+TEST_CI_OP( c.addi, x15, 0xfffffffffffffffa, -0x3, -0x3, x13, 0, x17)
+
+inst_1:
+// rd==x4, rs1_val != imm_val, rs1_val < 0 and imm_val > 0
+// opcode:c.addi; op1:x4; dest:x4 op1val:-0xb504f332; immval:0xf
+TEST_CI_OP( c.addi, x4, 0xffffffff4afb0cdd, -0xb504f332, 0xf, x13, 8, x17)
+
+inst_2:
+// rd==x12, rs1_val > 0 and imm_val > 0, rs1_val == 6148914691236517205, rs1_val==6148914691236517205 and imm_val==6
+// opcode:c.addi; op1:x12; dest:x12 op1val:0x5555555555555555; immval:0x6
+TEST_CI_OP( c.addi, x12, 0x555555555555555b, 0x5555555555555555, 0x6, x13, 16, x17)
+
+inst_3:
+// rd==x5, rs1_val > 0 and imm_val < 0, rs1_val==6 and imm_val==-1
+// opcode:c.addi; op1:x5; dest:x5 op1val:0x6; immval:-0x1
+TEST_CI_OP( c.addi, x5, 0x5, 0x6, -0x1, x13, 24, x17)
+
+inst_4:
+// rd==x8, imm_val == (-2**(6-1)), imm_val == -32, rs1_val == -1025
+// opcode:c.addi; op1:x8; dest:x8 op1val:-0x401; immval:-0x20
+TEST_CI_OP( c.addi, x8, 0xfffffffffffffbdf, -0x401, -0x20, x13, 32, x17)
+
+inst_5:
+// rd==x14, imm_val == 0, rs1_val==-6148914691236517206 and imm_val==0, rs1_val == -6148914691236517206
+// opcode:c.addi; op1:x14; dest:x14 op1val:-0x5555555555555556; immval:0x0
+TEST_CI_OP( c.addi, x14, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x0, x13, 40, x17)
+
+inst_6:
+// rd==x21, imm_val == (2**(6-1)-1), imm_val == 31
+// opcode:c.addi; op1:x21; dest:x21 op1val:-0x401; immval:0x1f
+TEST_CI_OP( c.addi, x21, 0xfffffffffffffc1e, -0x401, 0x1f, x13, 48, x17)
+
+inst_7:
+// rd==x22, imm_val == 1,
+// opcode:c.addi; op1:x22; dest:x22 op1val:0x5555555555555555; immval:0x1
+TEST_CI_OP( c.addi, x22, 0x5555555555555556, 0x5555555555555555, 0x1, x13, 56, x17)
+
+inst_8:
+// rd==x28, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808, imm_val == 2
+// opcode:c.addi; op1:x28; dest:x28 op1val:-0x8000000000000000; immval:0x2
+TEST_CI_OP( c.addi, x28, 0x8000000000000002, -0x8000000000000000, 0x2, x13, 64, x17)
+
+inst_9:
+// rd==x1, rs1_val == 0,
+// opcode:c.addi; op1:x1; dest:x1 op1val:0x0; immval:-0x10
+TEST_CI_OP( c.addi, x1, 0xfffffffffffffff0, 0x0, -0x10, x13, 72, x17)
+
+inst_10:
+// rd==x9, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, imm_val == -5
+// opcode:c.addi; op1:x9; dest:x9 op1val:0x7fffffffffffffff; immval:-0x5
+TEST_CI_OP( c.addi, x9, 0x7ffffffffffffffa, 0x7fffffffffffffff, -0x5, x13, 80, x17)
+
+inst_11:
+// rd==x25, rs1_val == 1,
+// opcode:c.addi; op1:x25; dest:x25 op1val:0x1; immval:-0x1
+TEST_CI_OP( c.addi, x25, 0x0, 0x1, -0x1, x13, 88, x17)
+
+inst_12:
+// rd==x31, imm_val == 4, rs1_val == 1073741824
+// opcode:c.addi; op1:x31; dest:x31 op1val:0x40000000; immval:0x4
+TEST_CI_OP( c.addi, x31, 0x40000004, 0x40000000, 0x4, x13, 96, x17)
+
+inst_13:
+// rd==x20, imm_val == 8, rs1_val == -17179869185
+// opcode:c.addi; op1:x20; dest:x20 op1val:-0x400000001; immval:0x8
+TEST_CI_OP( c.addi, x20, 0xfffffffc00000007, -0x400000001, 0x8, x13, 104, x17)
+
+inst_14:
+// rd==x6, imm_val == 16,
+// opcode:c.addi; op1:x6; dest:x6 op1val:-0x6; immval:0x10
+TEST_CI_OP( c.addi, x6, 0xa, -0x6, 0x10, x13, 112, x17)
+
+inst_15:
+// rd==x26, imm_val == -2, rs1_val==4 and imm_val==-2, rs1_val == 4
+// opcode:c.addi; op1:x26; dest:x26 op1val:0x4; immval:-0x2
+TEST_CI_OP( c.addi, x26, 0x2, 0x4, -0x2, x13, 120, x17)
+
+inst_16:
+// rd==x19, imm_val == -9,
+// opcode:c.addi; op1:x19; dest:x19 op1val:0xb504f332; immval:-0x9
+TEST_CI_OP( c.addi, x19, 0xb504f329, 0xb504f332, -0x9, x13, 128, x17)
+
+inst_17:
+// rd==x16, imm_val == -17, rs1_val == -2251799813685249
+// opcode:c.addi; op1:x16; dest:x16 op1val:-0x8000000000001; immval:-0x11
+TEST_CI_OP( c.addi, x16, 0xfff7ffffffffffee, -0x8000000000001, -0x11, x13, 136, x17)
+
+inst_18:
+// rd==x7, imm_val == 21, rs1_val == 16777216
+// opcode:c.addi; op1:x7; dest:x7 op1val:0x1000000; immval:0x15
+TEST_CI_OP( c.addi, x7, 0x1000015, 0x1000000, 0x15, x13, 144, x17)
+
+inst_19:
+// rd==x30, imm_val == -22, rs1_val == -131073
+// opcode:c.addi; op1:x30; dest:x30 op1val:-0x20001; immval:-0x16
+TEST_CI_OP( c.addi, x30, 0xfffffffffffdffe9, -0x20001, -0x16, x13, 152, x17)
+
+inst_20:
+// rd==x11, rs1_val == 2, rs1_val==2 and imm_val==5
+// opcode:c.addi; op1:x11; dest:x11 op1val:0x2; immval:0x5
+TEST_CI_OP( c.addi, x11, 0x7, 0x2, 0x5, x13, 160, x17)
+
+inst_21:
+// rd==x10, rs1_val == 8,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x8; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xd, 0x8, 0x5, x13, 168, x17)
+
+inst_22:
+// rd==x3, rs1_val == 16,
+// opcode:c.addi; op1:x3; dest:x3 op1val:0x10; immval:0x7
+TEST_CI_OP( c.addi, x3, 0x17, 0x10, 0x7, x13, 176, x17)
+
+inst_23:
+// rd==x27, rs1_val == 32,
+// opcode:c.addi; op1:x27; dest:x27 op1val:0x20; immval:-0x20
+TEST_CI_OP( c.addi, x27, 0x0, 0x20, -0x20, x13, 184, x17)
+
+inst_24:
+// rd==x18, rs1_val == 64,
+// opcode:c.addi; op1:x18; dest:x18 op1val:0x40; immval:-0x2
+TEST_CI_OP( c.addi, x18, 0x3e, 0x40, -0x2, x13, 192, x17)
+
+inst_25:
+// rd==x23, rs1_val == 128,
+// opcode:c.addi; op1:x23; dest:x23 op1val:0x80; immval:0x1f
+TEST_CI_OP( c.addi, x23, 0x9f, 0x80, 0x1f, x13, 200, x17)
+
+inst_26:
+// rd==x2, rs1_val == 256,
+// opcode:c.addi; op1:x2; dest:x2 op1val:0x100; immval:0x4
+TEST_CI_OP( c.addi, x2, 0x104, 0x100, 0x4, x13, 208, x17)
+
+inst_27:
+// rd==x24, rs1_val == 512,
+// opcode:c.addi; op1:x24; dest:x24 op1val:0x200; immval:0x6
+TEST_CI_OP( c.addi, x24, 0x206, 0x200, 0x6, x13, 216, x2)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_28:
+// rd==x13, rs1_val == 1024,
+// opcode:c.addi; op1:x13; dest:x13 op1val:0x400; immval:0x7
+TEST_CI_OP( c.addi, x13, 0x407, 0x400, 0x7, x1, 0, x2)
+
+inst_29:
+// rd==x17, rs1_val == 2048,
+// opcode:c.addi; op1:x17; dest:x17 op1val:0x800; immval:0x1f
+TEST_CI_OP( c.addi, x17, 0x81f, 0x800, 0x1f, x1, 8, x2)
+
+inst_30:
+// rd==x29, rs1_val == 4096,
+// opcode:c.addi; op1:x29; dest:x29 op1val:0x1000; immval:0x6
+TEST_CI_OP( c.addi, x29, 0x1006, 0x1000, 0x6, x1, 16, x2)
+
+inst_31:
+// rs1_val == 8192,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2000; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x2004, 0x2000, 0x4, x1, 24, x2)
+
+inst_32:
+// rs1_val == 16384,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4000; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x4007, 0x4000, 0x7, x1, 32, x2)
+
+inst_33:
+// rs1_val == 32768,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x8000; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x8004, 0x8000, 0x4, x1, 40, x2)
+
+inst_34:
+// rs1_val == 65536,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x10000; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x10004, 0x10000, 0x4, x1, 48, x2)
+
+inst_35:
+// rs1_val == 131072,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x20000; immval:-0x3
+TEST_CI_OP( c.addi, x10, 0x1fffd, 0x20000, -0x3, x1, 56, x2)
+
+inst_36:
+// rs1_val == 262144,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x40000; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x40002, 0x40000, 0x2, x1, 64, x2)
+
+inst_37:
+// rs1_val == 524288,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x80000; immval:-0x16
+TEST_CI_OP( c.addi, x10, 0x7ffea, 0x80000, -0x16, x1, 72, x2)
+
+inst_38:
+// rs1_val == 1048576,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x100000; immval:-0x9
+TEST_CI_OP( c.addi, x10, 0xffff7, 0x100000, -0x9, x1, 80, x2)
+
+inst_39:
+// rs1_val == 2097152,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x200000; immval:-0xa
+TEST_CI_OP( c.addi, x10, 0x1ffff6, 0x200000, -0xa, x1, 88, x2)
+
+inst_40:
+// rs1_val == 4194304,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x400000; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x400004, 0x400000, 0x4, x1, 96, x2)
+
+inst_41:
+// rs1_val == 8388608,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x800000; immval:-0x20
+TEST_CI_OP( c.addi, x10, 0x7fffe0, 0x800000, -0x20, x1, 104, x2)
+
+inst_42:
+// rs1_val == 33554432,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2000000; immval:-0x11
+TEST_CI_OP( c.addi, x10, 0x1ffffef, 0x2000000, -0x11, x1, 112, x2)
+
+inst_43:
+// rs1_val == 67108864,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4000000; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x4000004, 0x4000000, 0x4, x1, 120, x2)
+
+inst_44:
+// rs1_val == 134217728,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x8000000; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x8000006, 0x8000000, 0x6, x1, 128, x2)
+
+inst_45:
+// rs1_val == 268435456,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x10000000; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x10000002, 0x10000000, 0x2, x1, 136, x2)
+
+inst_46:
+// rs1_val == 536870912,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x20000000; immval:-0x20
+TEST_CI_OP( c.addi, x10, 0x1fffffe0, 0x20000000, -0x20, x1, 144, x2)
+
+inst_47:
+// rs1_val == 2147483648,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x80000000; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x80000000, 0x80000000, 0x0, x1, 152, x2)
+
+inst_48:
+// rs1_val == 4294967296,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x100000000; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x10000000a, 0x100000000, 0xa, x1, 160, x2)
+
+inst_49:
+// rs1_val == 8589934592,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x200000000; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x200000006, 0x200000000, 0x6, x1, 168, x2)
+
+inst_50:
+// rs1_val == 17179869184,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x400000000; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x40000000a, 0x400000000, 0xa, x1, 176, x2)
+
+inst_51:
+// rs1_val == 34359738368,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x800000000; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x800000007, 0x800000000, 0x7, x1, 184, x2)
+
+inst_52:
+// rs1_val == 68719476736,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x1000000000; immval:-0x3
+TEST_CI_OP( c.addi, x10, 0xffffffffd, 0x1000000000, -0x3, x1, 192, x2)
+
+inst_53:
+// rs1_val == 137438953472,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2000000000; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x1ffffffffc, 0x2000000000, -0x4, x1, 200, x2)
+
+inst_54:
+// rs1_val == 274877906944,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4000000000; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x4000000002, 0x4000000000, 0x2, x1, 208, x2)
+
+inst_55:
+// rs1_val == 549755813888,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x8000000000; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x8000000006, 0x8000000000, 0x6, x1, 216, x2)
+
+inst_56:
+// rs1_val == 1099511627776,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x10000000000; immval:0x8
+TEST_CI_OP( c.addi, x10, 0x10000000008, 0x10000000000, 0x8, x1, 224, x2)
+
+inst_57:
+// rs1_val == 2199023255552,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x20000000000; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x20000000000, 0x20000000000, 0x0, x1, 232, x2)
+
+inst_58:
+// rs1_val == 4398046511104,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x40000000000; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x40000000005, 0x40000000000, 0x5, x1, 240, x2)
+
+inst_59:
+// rs1_val == 8796093022208,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x80000000000; immval:-0x3
+TEST_CI_OP( c.addi, x10, 0x7fffffffffd, 0x80000000000, -0x3, x1, 248, x2)
+
+inst_60:
+// rs1_val == 17592186044416,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x100000000000; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x100000000006, 0x100000000000, 0x6, x1, 256, x2)
+
+inst_61:
+// rs1_val == 35184372088832,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x200000000000; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x1ffffffffffb, 0x200000000000, -0x5, x1, 264, x2)
+
+inst_62:
+// rs1_val == 70368744177664,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x400000000000; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x400000000009, 0x400000000000, 0x9, x1, 272, x2)
+
+inst_63:
+// rs1_val == 140737488355328,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x800000000000; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x800000000000, 0x800000000000, 0x0, x1, 280, x2)
+
+inst_64:
+// rs1_val == 281474976710656,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x1000000000000; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x1000000000005, 0x1000000000000, 0x5, x1, 288, x2)
+
+inst_65:
+// rs1_val == 562949953421312,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2000000000000; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x2000000000005, 0x2000000000000, 0x5, x1, 296, x2)
+
+inst_66:
+// rs1_val == 1125899906842624,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4000000000000; immval:-0x20
+TEST_CI_OP( c.addi, x10, 0x3ffffffffffe0, 0x4000000000000, -0x20, x1, 304, x2)
+
+inst_67:
+// rs1_val == 2251799813685248,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x8000000000000; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x8000000000003, 0x8000000000000, 0x3, x1, 312, x2)
+
+inst_68:
+// rs1_val == 4503599627370496,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x10000000000000; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x10000000000003, 0x10000000000000, 0x3, x1, 320, x2)
+
+inst_69:
+// rs1_val == 9007199254740992,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x20000000000000; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x20000000000006, 0x20000000000000, 0x6, x1, 328, x2)
+
+inst_70:
+// rs1_val == 18014398509481984,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x40000000000000; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x40000000000005, 0x40000000000000, 0x5, x1, 336, x2)
+
+inst_71:
+// rs1_val == 36028797018963968,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x80000000000000; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x80000000000002, 0x80000000000000, 0x2, x1, 344, x2)
+
+inst_72:
+// rs1_val == 72057594037927936,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x100000000000000; immval:-0x3
+TEST_CI_OP( c.addi, x10, 0xfffffffffffffd, 0x100000000000000, -0x3, x1, 352, x2)
+
+inst_73:
+// rs1_val == 144115188075855872,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x200000000000000; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x200000000000004, 0x200000000000000, 0x4, x1, 360, x2)
+
+inst_74:
+// rs1_val == 288230376151711744,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x400000000000000; immval:0x1
+TEST_CI_OP( c.addi, x10, 0x400000000000001, 0x400000000000000, 0x1, x1, 368, x2)
+
+inst_75:
+// rs1_val == 576460752303423488,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x800000000000000; immval:0x8
+TEST_CI_OP( c.addi, x10, 0x800000000000008, 0x800000000000000, 0x8, x1, 376, x2)
+
+inst_76:
+// rs1_val == 1152921504606846976,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x1000000000000000; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x1000000000000004, 0x1000000000000000, 0x4, x1, 384, x2)
+
+inst_77:
+// rs1_val == 2305843009213693952,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2000000000000000; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x2000000000000003, 0x2000000000000000, 0x3, x1, 392, x2)
+
+inst_78:
+// rs1_val == 4611686018427387904,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4000000000000000; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x3ffffffffffffffe, 0x4000000000000000, -0x2, x1, 400, x2)
+
+inst_79:
+// rs1_val == -2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x2; immval:0x8
+TEST_CI_OP( c.addi, x10, 0x6, -0x2, 0x8, x1, 408, x2)
+
+inst_80:
+// rs1_val == -5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x6, -0x5, 0xb, x1, 416, x2)
+
+inst_81:
+// rs1_val == -9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x9; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xfffffffffffffff7, -0x9, 0x0, x1, 424, x2)
+
+inst_82:
+// rs1_val == -17,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x11; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xffffffffffffffea, -0x11, -0x5, x1, 432, x2)
+
+inst_83:
+// rs1_val == -33,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x21; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xffffffffffffffda, -0x21, -0x5, x1, 440, x2)
+
+inst_84:
+// rs1_val == -65,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x41; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xffffffffffffffc5, -0x41, 0x6, x1, 448, x2)
+
+inst_85:
+// rs1_val == -129,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x81; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xffffffffffffff7a, -0x81, -0x5, x1, 456, x2)
+
+inst_86:
+// rs1_val == -257,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x101; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xfffffffffffffefd, -0x101, -0x2, x1, 464, x2)
+
+inst_87:
+// rs1_val == -513,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x201; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xfffffffffffffe03, -0x201, 0x4, x1, 472, x2)
+
+inst_88:
+// rs1_val == -2049,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x801; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xfffffffffffff805, -0x801, 0x6, x1, 480, x2)
+
+inst_89:
+// rs1_val == -4097,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x1001; immval:-0x3
+TEST_CI_OP( c.addi, x10, 0xffffffffffffeffc, -0x1001, -0x3, x1, 488, x2)
+
+inst_90:
+// rs1_val == -8193,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x2001; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xffffffffffffe005, -0x2001, 0x6, x1, 496, x2)
+
+inst_91:
+// rs1_val == -16385,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x4001; immval:-0x11
+TEST_CI_OP( c.addi, x10, 0xffffffffffffbfee, -0x4001, -0x11, x1, 504, x2)
+
+inst_92:
+// rs1_val == -32769,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x8001; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xffffffffffff8003, -0x8001, 0x4, x1, 512, x2)
+
+inst_93:
+// rs1_val == -65537,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x10001; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xffffffffffff0002, -0x10001, 0x3, x1, 520, x2)
+
+inst_94:
+// rs1_val == -262145,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x40001; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xfffffffffffbfffe, -0x40001, -0x1, x1, 528, x2)
+
+inst_95:
+// rs1_val == -524289,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x80001; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xfffffffffff7fffd, -0x80001, -0x2, x1, 536, x2)
+
+inst_96:
+// rs1_val == -1048577,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x100001; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xffffffffffefffff, -0x100001, 0x0, x1, 544, x2)
+
+inst_97:
+// rs1_val == -2097153,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x200001; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xffffffffffe00005, -0x200001, 0x6, x1, 552, x2)
+
+inst_98:
+// rs1_val == -4194305,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x400001; immval:0x1f
+TEST_CI_OP( c.addi, x10, 0xffffffffffc0001e, -0x400001, 0x1f, x1, 560, x2)
+
+inst_99:
+// rs1_val == -8388609,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x800001; immval:-0x6
+TEST_CI_OP( c.addi, x10, 0xffffffffff7ffff9, -0x800001, -0x6, x1, 568, x2)
+
+inst_100:
+// rs1_val == -16777217,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x1000001; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xffffffffff000009, -0x1000001, 0xa, x1, 576, x2)
+
+inst_101:
+// rs1_val == -33554433,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x2000001; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xfffffffffdfffffb, -0x2000001, -0x4, x1, 584, x2)
+
+inst_102:
+// rs1_val == -67108865,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x4000001; immval:0xf
+TEST_CI_OP( c.addi, x10, 0xfffffffffc00000e, -0x4000001, 0xf, x1, 592, x2)
+
+inst_103:
+// rs1_val == -134217729,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x8000001; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xfffffffff8000005, -0x8000001, 0x6, x1, 600, x2)
+
+inst_104:
+// rs1_val == -268435457,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x10000001; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xfffffffff0000005, -0x10000001, 0x6, x1, 608, x2)
+
+inst_105:
+// rs1_val == -536870913,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x20000001; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xffffffffdffffffe, -0x20000001, -0x1, x1, 616, x2)
+
+inst_106:
+// rs1_val == -1073741825,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x40000001; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xffffffffbfffffff, -0x40000001, 0x0, x1, 624, x2)
+
+inst_107:
+// rs1_val == -2147483649,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x80000001; immval:-0x7
+TEST_CI_OP( c.addi, x10, 0xffffffff7ffffff8, -0x80000001, -0x7, x1, 632, x2)
+
+inst_108:
+// rs1_val == -4294967297,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x100000001; immval:0x10
+TEST_CI_OP( c.addi, x10, 0xffffffff0000000f, -0x100000001, 0x10, x1, 640, x2)
+
+inst_109:
+// rs1_val == -8589934593,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x200000001; immval:0x8
+TEST_CI_OP( c.addi, x10, 0xfffffffe00000007, -0x200000001, 0x8, x1, 648, x2)
+
+inst_110:
+// rs1_val == -34359738369,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x800000001; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xfffffff7ffffffff, -0x800000001, 0x0, x1, 656, x2)
+
+inst_111:
+// rs1_val == -68719476737,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x1000000001; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xfffffff000000003, -0x1000000001, 0x4, x1, 664, x2)
+
+inst_112:
+// rs1_val == -137438953473,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x2000000001; immval:-0x11
+TEST_CI_OP( c.addi, x10, 0xffffffdfffffffee, -0x2000000001, -0x11, x1, 672, x2)
+
+inst_113:
+// rs1_val == -274877906945,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x4000000001; immval:0xf
+TEST_CI_OP( c.addi, x10, 0xffffffc00000000e, -0x4000000001, 0xf, x1, 680, x2)
+
+inst_114:
+// rs1_val == -549755813889,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x8000000001; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xffffff8000000004, -0x8000000001, 0x5, x1, 688, x2)
+
+inst_115:
+// rs1_val == -1099511627777,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x10000000001; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xfffffeffffffffff, -0x10000000001, 0x0, x1, 696, x2)
+
+inst_116:
+// rs1_val == -2199023255553,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x20000000001; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xfffffe0000000005, -0x20000000001, 0x6, x1, 704, x2)
+
+inst_117:
+// rs1_val == -4398046511105,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x40000000001; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xfffffc0000000006, -0x40000000001, 0x7, x1, 712, x2)
+
+inst_118:
+// rs1_val == -8796093022209,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x80000000001; immval:-0x9
+TEST_CI_OP( c.addi, x10, 0xfffff7fffffffff6, -0x80000000001, -0x9, x1, 720, x2)
+
+inst_119:
+// rs1_val == -17592186044417,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x100000000001; immval:-0x16
+TEST_CI_OP( c.addi, x10, 0xffffefffffffffe9, -0x100000000001, -0x16, x1, 728, x2)
+
+inst_120:
+// rs1_val == -35184372088833,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x200000000001; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xffffe00000000003, -0x200000000001, 0x4, x1, 736, x2)
+
+inst_121:
+// rs1_val == -70368744177665,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x400000000001; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xffffc00000000003, -0x400000000001, 0x4, x1, 744, x2)
+
+inst_122:
+// rs1_val == -140737488355329,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x800000000001; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xffff800000000004, -0x800000000001, 0x5, x1, 752, x2)
+
+inst_123:
+// rs1_val == -281474976710657,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x1000000000001; immval:-0x16
+TEST_CI_OP( c.addi, x10, 0xfffeffffffffffe9, -0x1000000000001, -0x16, x1, 760, x2)
+
+inst_124:
+// rs1_val == -562949953421313,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x2000000000001; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xfffe00000000000a, -0x2000000000001, 0xb, x1, 768, x2)
+
+inst_125:
+// rs1_val == -1125899906842625,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x4000000000001; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xfffc000000000004, -0x4000000000001, 0x5, x1, 776, x2)
+
+inst_126:
+// rs1_val == -4503599627370497,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x10000000000001; immval:-0x8
+TEST_CI_OP( c.addi, x10, 0xffeffffffffffff7, -0x10000000000001, -0x8, x1, 784, x2)
+
+inst_127:
+// rs1_val == -9007199254740993,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x20000000000001; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xffe0000000000005, -0x20000000000001, 0x6, x1, 792, x2)
+
+inst_128:
+// rs1_val == -18014398509481985,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x40000000000001; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xffc0000000000001, -0x40000000000001, 0x2, x1, 800, x2)
+
+inst_129:
+// rs1_val == -36028797018963969,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x80000000000001; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xff7fffffffffffff, -0x80000000000001, 0x0, x1, 808, x2)
+
+inst_130:
+// rs1_val == -72057594037927937,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x100000000000001; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xff00000000000005, -0x100000000000001, 0x6, x1, 816, x2)
+
+inst_131:
+// rs1_val == -144115188075855873,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x200000000000001; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xfdffffffffffffff, -0x200000000000001, 0x0, x1, 824, x2)
+
+inst_132:
+// rs1_val == -288230376151711745,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x400000000000001; immval:-0x11
+TEST_CI_OP( c.addi, x10, 0xfbffffffffffffee, -0x400000000000001, -0x11, x1, 832, x2)
+
+inst_133:
+// rs1_val == -576460752303423489,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x800000000000001; immval:-0x11
+TEST_CI_OP( c.addi, x10, 0xf7ffffffffffffee, -0x800000000000001, -0x11, x1, 840, x2)
+
+inst_134:
+// rs1_val == -1152921504606846977,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x1000000000000001; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xf000000000000001, -0x1000000000000001, 0x2, x1, 848, x2)
+
+inst_135:
+// rs1_val == -2305843009213693953,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x2000000000000001; immval:0x15
+TEST_CI_OP( c.addi, x10, 0xe000000000000014, -0x2000000000000001, 0x15, x1, 856, x2)
+
+inst_136:
+// rs1_val == -4611686018427387905,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x4000000000000001; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xc000000000000002, -0x4000000000000001, 0x3, x1, 864, x2)
+
+inst_137:
+// rs1_val==3 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x6, 0x3, 0x3, x1, 872, x2)
+
+inst_138:
+// rs1_val==3 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x8, 0x3, 0x5, x1, 880, x2)
+
+inst_139:
+// rs1_val==3 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xd, 0x3, 0xa, x1, 888, x2)
+
+inst_140:
+// rs1_val==3 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x9, 0x3, 0x6, x1, 896, x2)
+
+inst_141:
+// rs1_val==3 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x1, 0x3, -0x2, x1, 904, x2)
+
+inst_142:
+// rs1_val==3 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xfffffffffffffffe, 0x3, -0x5, x1, 912, x2)
+
+inst_143:
+// rs1_val==3 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x5, 0x3, 0x2, x1, 920, x2)
+
+inst_144:
+// rs1_val==3 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x7, 0x3, 0x4, x1, 928, x2)
+
+inst_145:
+// rs1_val==3 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xc, 0x3, 0x9, x1, 936, x2)
+
+inst_146:
+// rs1_val==3 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x3, 0x3, 0x0, x1, 944, x2)
+
+inst_147:
+// rs1_val==3 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xe, 0x3, 0xb, x1, 952, x2)
+
+inst_148:
+// rs1_val==3 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xa, 0x3, 0x7, x1, 960, x2)
+
+inst_149:
+// rs1_val==3 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x2, 0x3, -0x1, x1, 968, x2)
+
+inst_150:
+// rs1_val==3 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xffffffffffffffff, 0x3, -0x4, x1, 976, x2)
+
+inst_151:
+// rs1_val==6148914691236517205 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x5555555555555558, 0x5555555555555555, 0x3, x1, 984, x2)
+
+inst_152:
+// rs1_val==6148914691236517205 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x555555555555555a, 0x5555555555555555, 0x5, x1, 992, x2)
+
+inst_153:
+// rs1_val==6148914691236517205 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x555555555555555f, 0x5555555555555555, 0xa, x1, 1000, x2)
+
+inst_154:
+// rs1_val==6148914691236517205 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555555; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x5555555555555553, 0x5555555555555555, -0x2, x1, 1008, x2)
+
+inst_155:
+// rs1_val==6148914691236517205 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555555; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x5555555555555550, 0x5555555555555555, -0x5, x1, 1016, x2)
+
+inst_156:
+// rs1_val==6148914691236517205 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x5555555555555557, 0x5555555555555555, 0x2, x1, 1024, x2)
+
+inst_157:
+// rs1_val==6148914691236517205 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x5555555555555559, 0x5555555555555555, 0x4, x1, 1032, x2)
+
+inst_158:
+// rs1_val==6148914691236517205 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x555555555555555e, 0x5555555555555555, 0x9, x1, 1040, x2)
+
+inst_159:
+// rs1_val==6148914691236517205 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x5555555555555555, 0x5555555555555555, 0x0, x1, 1048, x2)
+
+inst_160:
+// rs1_val==6148914691236517205 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x5555555555555560, 0x5555555555555555, 0xb, x1, 1056, x2)
+
+inst_161:
+// rs1_val==6148914691236517205 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x555555555555555c, 0x5555555555555555, 0x7, x1, 1064, x2)
+
+inst_162:
+// rs1_val==6148914691236517205 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555555; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x5555555555555554, 0x5555555555555555, -0x1, x1, 1072, x2)
+
+inst_163:
+// rs1_val==6148914691236517205 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555555; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x5555555555555551, 0x5555555555555555, -0x4, x1, 1080, x2)
+
+inst_164:
+// rs1_val==-6148914691236517206 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaad, -0x5555555555555556, 0x3, x1, 1088, x2)
+
+inst_165:
+// rs1_val==-6148914691236517206 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555556, 0x5, x1, 1096, x2)
+
+inst_166:
+// rs1_val==-6148914691236517206 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaab4, -0x5555555555555556, 0xa, x1, 1104, x2)
+
+inst_167:
+// rs1_val==-6148914691236517206 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaab0, -0x5555555555555556, 0x6, x1, 1112, x2)
+
+inst_168:
+// rs1_val==-6148914691236517206 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaa8, -0x5555555555555556, -0x2, x1, 1120, x2)
+
+inst_169:
+// rs1_val==-6148914691236517206 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaa5, -0x5555555555555556, -0x5, x1, 1128, x2)
+
+inst_170:
+// rs1_val==-6148914691236517206 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaac, -0x5555555555555556, 0x2, x1, 1136, x2)
+
+inst_171:
+// rs1_val==-6148914691236517206 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x4, x1, 1144, x2)
+
+inst_172:
+// rs1_val==-6148914691236517206 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaab3, -0x5555555555555556, 0x9, x1, 1152, x2)
+
+inst_173:
+// rs1_val==-6148914691236517206 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaab5, -0x5555555555555556, 0xb, x1, 1160, x2)
+
+inst_174:
+// rs1_val==-6148914691236517206 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaab1, -0x5555555555555556, 0x7, x1, 1168, x2)
+
+inst_175:
+// rs1_val==-6148914691236517206 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaa9, -0x5555555555555556, -0x1, x1, 1176, x2)
+
+inst_176:
+// rs1_val==-6148914691236517206 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaa6, -0x5555555555555556, -0x4, x1, 1184, x2)
+
+inst_177:
+// rs1_val==5 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x8, 0x5, 0x3, x1, 1192, x2)
+
+inst_178:
+// rs1_val==5 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xa, 0x5, 0x5, x1, 1200, x2)
+
+inst_179:
+// rs1_val==5 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xf, 0x5, 0xa, x1, 1208, x2)
+
+inst_180:
+// rs1_val==5 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xb, 0x5, 0x6, x1, 1216, x2)
+
+inst_181:
+// rs1_val==5 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x3, 0x5, -0x2, x1, 1224, x2)
+
+inst_182:
+// rs1_val==5 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x0, 0x5, -0x5, x1, 1232, x2)
+
+inst_183:
+// rs1_val==5 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x7, 0x5, 0x2, x1, 1240, x2)
+
+inst_184:
+// rs1_val==5 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x9, 0x5, 0x4, x1, 1248, x2)
+
+inst_185:
+// rs1_val==5 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xe, 0x5, 0x9, x1, 1256, x2)
+
+inst_186:
+// rs1_val==5 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x5, 0x5, 0x0, x1, 1264, x2)
+
+inst_187:
+// rs1_val==5 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x10, 0x5, 0xb, x1, 1272, x2)
+
+inst_188:
+// rs1_val==5 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xc, 0x5, 0x7, x1, 1280, x2)
+
+inst_189:
+// rs1_val==5 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x4, 0x5, -0x1, x1, 1288, x2)
+
+inst_190:
+// rs1_val==5 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x1, 0x5, -0x4, x1, 1296, x2)
+
+inst_191:
+// rs1_val==3689348814741910323 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x3333333333333336, 0x3333333333333333, 0x3, x1, 1304, x2)
+
+inst_192:
+// rs1_val==3689348814741910323 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x3333333333333338, 0x3333333333333333, 0x5, x1, 1312, x2)
+
+inst_193:
+// rs1_val==3689348814741910323 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x333333333333333d, 0x3333333333333333, 0xa, x1, 1320, x2)
+
+inst_194:
+// rs1_val==3689348814741910323 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x3333333333333339, 0x3333333333333333, 0x6, x1, 1328, x2)
+
+inst_195:
+// rs1_val==3689348814741910323 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x3333333333333331, 0x3333333333333333, -0x2, x1, 1336, x2)
+
+inst_196:
+// rs1_val==3689348814741910323 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x333333333333332e, 0x3333333333333333, -0x5, x1, 1344, x2)
+
+inst_197:
+// rs1_val==3689348814741910323 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x3333333333333335, 0x3333333333333333, 0x2, x1, 1352, x2)
+
+inst_198:
+// rs1_val==3689348814741910323 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x3333333333333337, 0x3333333333333333, 0x4, x1, 1360, x2)
+
+inst_199:
+// rs1_val==3689348814741910323 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x333333333333333c, 0x3333333333333333, 0x9, x1, 1368, x2)
+
+inst_200:
+// rs1_val==3689348814741910323 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x3333333333333333, 0x3333333333333333, 0x0, x1, 1376, x2)
+
+inst_201:
+// rs1_val==3689348814741910323 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x333333333333333e, 0x3333333333333333, 0xb, x1, 1384, x2)
+
+inst_202:
+// rs1_val==3689348814741910323 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x333333333333333a, 0x3333333333333333, 0x7, x1, 1392, x2)
+
+inst_203:
+// rs1_val==3689348814741910323 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x3333333333333332, 0x3333333333333333, -0x1, x1, 1400, x2)
+
+inst_204:
+// rs1_val==3689348814741910323 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333333; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x333333333333332f, 0x3333333333333333, -0x4, x1, 1408, x2)
+
+inst_205:
+// rs1_val==7378697629483820646 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x6666666666666669, 0x6666666666666666, 0x3, x1, 1416, x2)
+
+inst_206:
+// rs1_val==7378697629483820646 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x666666666666666b, 0x6666666666666666, 0x5, x1, 1424, x2)
+
+inst_207:
+// rs1_val==7378697629483820646 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x6666666666666670, 0x6666666666666666, 0xa, x1, 1432, x2)
+
+inst_208:
+// rs1_val==7378697629483820646 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x666666666666666c, 0x6666666666666666, 0x6, x1, 1440, x2)
+
+inst_209:
+// rs1_val==7378697629483820646 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x6666666666666664, 0x6666666666666666, -0x2, x1, 1448, x2)
+
+inst_210:
+// rs1_val==7378697629483820646 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x6666666666666661, 0x6666666666666666, -0x5, x1, 1456, x2)
+
+inst_211:
+// rs1_val==7378697629483820646 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x6666666666666668, 0x6666666666666666, 0x2, x1, 1464, x2)
+
+inst_212:
+// rs1_val==7378697629483820646 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x666666666666666a, 0x6666666666666666, 0x4, x1, 1472, x2)
+
+inst_213:
+// rs1_val==7378697629483820646 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x666666666666666f, 0x6666666666666666, 0x9, x1, 1480, x2)
+
+inst_214:
+// rs1_val==7378697629483820646 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x6666666666666666, 0x6666666666666666, 0x0, x1, 1488, x2)
+
+inst_215:
+// rs1_val==7378697629483820646 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x6666666666666671, 0x6666666666666666, 0xb, x1, 1496, x2)
+
+inst_216:
+// rs1_val==7378697629483820646 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x666666666666666d, 0x6666666666666666, 0x7, x1, 1504, x2)
+
+inst_217:
+// rs1_val==7378697629483820646 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x6666666666666665, 0x6666666666666666, -0x1, x1, 1512, x2)
+
+inst_218:
+// rs1_val==7378697629483820646 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666666; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x6666666666666662, 0x6666666666666666, -0x4, x1, 1520, x2)
+
+inst_219:
+// rs1_val==-3037000499 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd0, -0xb504f333, 0x3, x1, 1528, x2)
+
+inst_220:
+// rs1_val==-3037000499 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd2, -0xb504f333, 0x5, x1, 1536, x2)
+
+inst_221:
+// rs1_val==-3037000499 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd7, -0xb504f333, 0xa, x1, 1544, x2)
+
+inst_222:
+// rs1_val==-3037000499 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd3, -0xb504f333, 0x6, x1, 1552, x2)
+
+inst_223:
+// rs1_val==-3037000499 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0ccb, -0xb504f333, -0x2, x1, 1560, x2)
+
+inst_224:
+// rs1_val==-3037000499 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cc8, -0xb504f333, -0x5, x1, 1568, x2)
+
+inst_225:
+// rs1_val==-3037000499 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0ccf, -0xb504f333, 0x2, x1, 1576, x2)
+
+inst_226:
+// rs1_val==-3037000499 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd1, -0xb504f333, 0x4, x1, 1584, x2)
+
+inst_227:
+// rs1_val==-3037000499 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd6, -0xb504f333, 0x9, x1, 1592, x2)
+
+inst_228:
+// rs1_val==-3037000499 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0ccd, -0xb504f333, 0x0, x1, 1600, x2)
+
+inst_229:
+// rs1_val==-3037000499 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd8, -0xb504f333, 0xb, x1, 1608, x2)
+
+inst_230:
+// rs1_val==-3037000499 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd4, -0xb504f333, 0x7, x1, 1616, x2)
+
+inst_231:
+// rs1_val==-3037000499 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0ccc, -0xb504f333, -0x1, x1, 1624, x2)
+
+inst_232:
+// rs1_val==-3037000499 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f333; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cc9, -0xb504f333, -0x4, x1, 1632, x2)
+
+inst_233:
+// rs1_val==3037000499 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xb504f336, 0xb504f333, 0x3, x1, 1640, x2)
+
+inst_234:
+// rs1_val==3037000499 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xb504f338, 0xb504f333, 0x5, x1, 1648, x2)
+
+inst_235:
+// rs1_val==3037000499 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xb504f33d, 0xb504f333, 0xa, x1, 1656, x2)
+
+inst_236:
+// rs1_val==3037000499 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xb504f339, 0xb504f333, 0x6, x1, 1664, x2)
+
+inst_237:
+// rs1_val==3037000499 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xb504f331, 0xb504f333, -0x2, x1, 1672, x2)
+
+inst_238:
+// rs1_val==3037000499 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xb504f32e, 0xb504f333, -0x5, x1, 1680, x2)
+
+inst_239:
+// rs1_val==3037000499 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xb504f335, 0xb504f333, 0x2, x1, 1688, x2)
+
+inst_240:
+// rs1_val==3037000499 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xb504f337, 0xb504f333, 0x4, x1, 1696, x2)
+
+inst_241:
+// rs1_val==3037000499 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xb504f33c, 0xb504f333, 0x9, x1, 1704, x2)
+
+inst_242:
+// rs1_val==3037000499 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xb504f333, 0xb504f333, 0x0, x1, 1712, x2)
+
+inst_243:
+// rs1_val==3037000499 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xb504f33e, 0xb504f333, 0xb, x1, 1720, x2)
+
+inst_244:
+// rs1_val==3037000499 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xb504f33a, 0xb504f333, 0x7, x1, 1728, x2)
+
+inst_245:
+// rs1_val==3037000499 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xb504f332, 0xb504f333, -0x1, x1, 1736, x2)
+
+inst_246:
+// rs1_val==3037000499 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f333; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xb504f32f, 0xb504f333, -0x4, x1, 1744, x2)
+
+inst_247:
+// rs1_val==2 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x5, 0x2, 0x3, x1, 1752, x2)
+
+inst_248:
+// rs1_val==2 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xc, 0x2, 0xa, x1, 1760, x2)
+
+inst_249:
+// rs1_val==2 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x8, 0x2, 0x6, x1, 1768, x2)
+
+inst_250:
+// rs1_val==2 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x0, 0x2, -0x2, x1, 1776, x2)
+
+inst_251:
+// rs1_val==2 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xfffffffffffffffd, 0x2, -0x5, x1, 1784, x2)
+
+inst_252:
+// rs1_val==2 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x4, 0x2, 0x2, x1, 1792, x2)
+
+inst_253:
+// rs1_val==2 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x6, 0x2, 0x4, x1, 1800, x2)
+
+inst_254:
+// rs1_val==2 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xb, 0x2, 0x9, x1, 1808, x2)
+
+inst_255:
+// rs1_val==2 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x2, 0x2, 0x0, x1, 1816, x2)
+
+inst_256:
+// rs1_val==2 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xd, 0x2, 0xb, x1, 1824, x2)
+
+inst_257:
+// rs1_val==2 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x9, 0x2, 0x7, x1, 1832, x2)
+
+inst_258:
+// rs1_val==2 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x1, 0x2, -0x1, x1, 1840, x2)
+
+inst_259:
+// rs1_val==2 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x2; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xfffffffffffffffe, 0x2, -0x4, x1, 1848, x2)
+
+inst_260:
+// rs1_val==6148914691236517204 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x5555555555555557, 0x5555555555555554, 0x3, x1, 1856, x2)
+
+inst_261:
+// rs1_val==6148914691236517204 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x5555555555555559, 0x5555555555555554, 0x5, x1, 1864, x2)
+
+inst_262:
+// rs1_val==6148914691236517204 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x555555555555555e, 0x5555555555555554, 0xa, x1, 1872, x2)
+
+inst_263:
+// rs1_val==6148914691236517204 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x555555555555555a, 0x5555555555555554, 0x6, x1, 1880, x2)
+
+inst_264:
+// rs1_val==6148914691236517204 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x5555555555555552, 0x5555555555555554, -0x2, x1, 1888, x2)
+
+inst_265:
+// rs1_val==6148914691236517204 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x555555555555554f, 0x5555555555555554, -0x5, x1, 1896, x2)
+
+inst_266:
+// rs1_val==6148914691236517204 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x5555555555555556, 0x5555555555555554, 0x2, x1, 1904, x2)
+
+inst_267:
+// rs1_val==6148914691236517204 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x5555555555555558, 0x5555555555555554, 0x4, x1, 1912, x2)
+
+inst_268:
+// rs1_val==6148914691236517204 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x555555555555555d, 0x5555555555555554, 0x9, x1, 1920, x2)
+
+inst_269:
+// rs1_val==6148914691236517204 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x5555555555555554, 0x5555555555555554, 0x0, x1, 1928, x2)
+
+inst_270:
+// rs1_val==6148914691236517204 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x555555555555555f, 0x5555555555555554, 0xb, x1, 1936, x2)
+
+inst_271:
+// rs1_val==6148914691236517204 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x555555555555555b, 0x5555555555555554, 0x7, x1, 1944, x2)
+
+inst_272:
+// rs1_val==6148914691236517204 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x5555555555555553, 0x5555555555555554, -0x1, x1, 1952, x2)
+
+inst_273:
+// rs1_val==6148914691236517204 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555554; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x5555555555555550, 0x5555555555555554, -0x4, x1, 1960, x2)
+
+inst_274:
+// rs1_val==0 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x3, 0x0, 0x3, x1, 1968, x2)
+
+inst_275:
+// rs1_val==0 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x5, 0x0, 0x5, x1, 1976, x2)
+
+inst_276:
+// rs1_val==0 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xa, 0x0, 0xa, x1, 1984, x2)
+
+inst_277:
+// rs1_val==0 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x6, 0x0, 0x6, x1, 1992, x2)
+
+inst_278:
+// rs1_val==0 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xfffffffffffffffe, 0x0, -0x2, x1, 2000, x2)
+
+inst_279:
+// rs1_val==0 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xfffffffffffffffb, 0x0, -0x5, x1, 2008, x2)
+
+inst_280:
+// rs1_val==0 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x2, 0x0, 0x2, x1, 2016, x2)
+
+inst_281:
+// rs1_val==0 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x4, 0x0, 0x4, x1, 2024, x2)
+
+inst_282:
+// rs1_val==0 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x9, 0x0, 0x9, x1, 2032, x2)
+
+inst_283:
+// rs1_val==0 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x0, 0x0, 0x0, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_284:
+// rs1_val==0 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xb, 0x0, 0xb, x1, 0, x2)
+
+inst_285:
+// rs1_val==0 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x7, 0x0, 0x7, x1, 8, x2)
+
+inst_286:
+// rs1_val==0 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xffffffffffffffff, 0x0, -0x1, x1, 16, x2)
+
+inst_287:
+// rs1_val==0 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x0; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xfffffffffffffffc, 0x0, -0x4, x1, 24, x2)
+
+inst_288:
+// rs1_val==4 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x7, 0x4, 0x3, x1, 32, x2)
+
+inst_289:
+// rs1_val==4 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x9, 0x4, 0x5, x1, 40, x2)
+
+inst_290:
+// rs1_val==4 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xe, 0x4, 0xa, x1, 48, x2)
+
+inst_291:
+// rs1_val==4 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xa, 0x4, 0x6, x1, 56, x2)
+
+inst_292:
+// rs1_val==4 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xffffffffffffffff, 0x4, -0x5, x1, 64, x2)
+
+inst_293:
+// rs1_val==4 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x6, 0x4, 0x2, x1, 72, x2)
+
+inst_294:
+// rs1_val==4 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x8, 0x4, 0x4, x1, 80, x2)
+
+inst_295:
+// rs1_val==4 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xd, 0x4, 0x9, x1, 88, x2)
+
+inst_296:
+// rs1_val==4 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x4, 0x4, 0x0, x1, 96, x2)
+
+inst_297:
+// rs1_val==4 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xf, 0x4, 0xb, x1, 104, x2)
+
+inst_298:
+// rs1_val==4 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xb, 0x4, 0x7, x1, 112, x2)
+
+inst_299:
+// rs1_val==4 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x3, 0x4, -0x1, x1, 120, x2)
+
+inst_300:
+// rs1_val==4 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x4; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x0, 0x4, -0x4, x1, 128, x2)
+
+inst_301:
+// rs1_val==3689348814741910322 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x3333333333333335, 0x3333333333333332, 0x3, x1, 136, x2)
+
+inst_302:
+// rs1_val==3689348814741910322 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x3333333333333337, 0x3333333333333332, 0x5, x1, 144, x2)
+
+inst_303:
+// rs1_val==3689348814741910322 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x333333333333333c, 0x3333333333333332, 0xa, x1, 152, x2)
+
+inst_304:
+// rs1_val==3689348814741910322 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x3333333333333338, 0x3333333333333332, 0x6, x1, 160, x2)
+
+inst_305:
+// rs1_val==3689348814741910322 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x3333333333333330, 0x3333333333333332, -0x2, x1, 168, x2)
+
+inst_306:
+// rs1_val==3689348814741910322 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x333333333333332d, 0x3333333333333332, -0x5, x1, 176, x2)
+
+inst_307:
+// rs1_val==3689348814741910322 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x3333333333333334, 0x3333333333333332, 0x2, x1, 184, x2)
+
+inst_308:
+// rs1_val==3689348814741910322 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x3333333333333336, 0x3333333333333332, 0x4, x1, 192, x2)
+
+inst_309:
+// rs1_val==3689348814741910322 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x333333333333333b, 0x3333333333333332, 0x9, x1, 200, x2)
+
+inst_310:
+// rs1_val==3689348814741910322 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x3333333333333332, 0x3333333333333332, 0x0, x1, 208, x2)
+
+inst_311:
+// rs1_val==3689348814741910322 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x333333333333333d, 0x3333333333333332, 0xb, x1, 216, x2)
+
+inst_312:
+// rs1_val==3689348814741910322 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x3333333333333339, 0x3333333333333332, 0x7, x1, 224, x2)
+
+inst_313:
+// rs1_val==3689348814741910322 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x3333333333333331, 0x3333333333333332, -0x1, x1, 232, x2)
+
+inst_314:
+// rs1_val==3689348814741910322 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333332; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x333333333333332e, 0x3333333333333332, -0x4, x1, 240, x2)
+
+inst_315:
+// rs1_val==7378697629483820645 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x6666666666666668, 0x6666666666666665, 0x3, x1, 248, x2)
+
+inst_316:
+// rs1_val==7378697629483820645 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x666666666666666a, 0x6666666666666665, 0x5, x1, 256, x2)
+
+inst_317:
+// rs1_val==7378697629483820645 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x666666666666666f, 0x6666666666666665, 0xa, x1, 264, x2)
+
+inst_318:
+// rs1_val==7378697629483820645 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x666666666666666b, 0x6666666666666665, 0x6, x1, 272, x2)
+
+inst_319:
+// rs1_val==7378697629483820645 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x6666666666666663, 0x6666666666666665, -0x2, x1, 280, x2)
+
+inst_320:
+// rs1_val==7378697629483820645 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x6666666666666660, 0x6666666666666665, -0x5, x1, 288, x2)
+
+inst_321:
+// rs1_val==7378697629483820645 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x6666666666666667, 0x6666666666666665, 0x2, x1, 296, x2)
+
+inst_322:
+// rs1_val==7378697629483820645 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x6666666666666669, 0x6666666666666665, 0x4, x1, 304, x2)
+
+inst_323:
+// rs1_val==7378697629483820645 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x666666666666666e, 0x6666666666666665, 0x9, x1, 312, x2)
+
+inst_324:
+// rs1_val==7378697629483820645 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x6666666666666665, 0x6666666666666665, 0x0, x1, 320, x2)
+
+inst_325:
+// rs1_val==7378697629483820645 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x6666666666666670, 0x6666666666666665, 0xb, x1, 328, x2)
+
+inst_326:
+// rs1_val==7378697629483820645 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x666666666666666c, 0x6666666666666665, 0x7, x1, 336, x2)
+
+inst_327:
+// rs1_val==7378697629483820645 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x6666666666666664, 0x6666666666666665, -0x1, x1, 344, x2)
+
+inst_328:
+// rs1_val==7378697629483820645 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666665; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x6666666666666661, 0x6666666666666665, -0x4, x1, 352, x2)
+
+inst_329:
+// rs1_val==3037000498 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xb504f335, 0xb504f332, 0x3, x1, 360, x2)
+
+inst_330:
+// rs1_val==3037000498 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xb504f337, 0xb504f332, 0x5, x1, 368, x2)
+
+inst_331:
+// rs1_val==3037000498 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xb504f33c, 0xb504f332, 0xa, x1, 376, x2)
+
+inst_332:
+// rs1_val==3037000498 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xb504f338, 0xb504f332, 0x6, x1, 384, x2)
+
+inst_333:
+// rs1_val==3037000498 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xb504f330, 0xb504f332, -0x2, x1, 392, x2)
+
+inst_334:
+// rs1_val==3037000498 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xb504f32d, 0xb504f332, -0x5, x1, 400, x2)
+
+inst_335:
+// rs1_val==3037000498 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xb504f334, 0xb504f332, 0x2, x1, 408, x2)
+
+inst_336:
+// rs1_val==3037000498 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xb504f336, 0xb504f332, 0x4, x1, 416, x2)
+
+inst_337:
+// rs1_val==3037000498 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xb504f33b, 0xb504f332, 0x9, x1, 424, x2)
+
+inst_338:
+// rs1_val==3037000498 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xb504f332, 0xb504f332, 0x0, x1, 432, x2)
+
+inst_339:
+// rs1_val==3037000498 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xb504f33d, 0xb504f332, 0xb, x1, 440, x2)
+
+inst_340:
+// rs1_val==3037000498 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xb504f339, 0xb504f332, 0x7, x1, 448, x2)
+
+inst_341:
+// rs1_val==3037000498 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xb504f331, 0xb504f332, -0x1, x1, 456, x2)
+
+inst_342:
+// rs1_val==3037000498 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f332; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xb504f32e, 0xb504f332, -0x4, x1, 464, x2)
+
+inst_343:
+// rs1_val==6148914691236517206 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x5555555555555559, 0x5555555555555556, 0x3, x1, 472, x2)
+
+inst_344:
+// rs1_val==6148914691236517206 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x555555555555555b, 0x5555555555555556, 0x5, x1, 480, x2)
+
+inst_345:
+// rs1_val==6148914691236517206 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x5555555555555560, 0x5555555555555556, 0xa, x1, 488, x2)
+
+inst_346:
+// rs1_val==6148914691236517206 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x555555555555555c, 0x5555555555555556, 0x6, x1, 496, x2)
+
+inst_347:
+// rs1_val==6148914691236517206 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x5555555555555554, 0x5555555555555556, -0x2, x1, 504, x2)
+
+inst_348:
+// rs1_val==6148914691236517206 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x5555555555555551, 0x5555555555555556, -0x5, x1, 512, x2)
+
+inst_349:
+// rs1_val==6148914691236517206 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x5555555555555558, 0x5555555555555556, 0x2, x1, 520, x2)
+
+inst_350:
+// rs1_val==6148914691236517206 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x555555555555555a, 0x5555555555555556, 0x4, x1, 528, x2)
+
+inst_351:
+// rs1_val==6148914691236517206 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x555555555555555f, 0x5555555555555556, 0x9, x1, 536, x2)
+
+inst_352:
+// rs1_val==6148914691236517206 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x5555555555555556, 0x5555555555555556, 0x0, x1, 544, x2)
+
+inst_353:
+// rs1_val==6148914691236517206 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x5555555555555561, 0x5555555555555556, 0xb, x1, 552, x2)
+
+inst_354:
+// rs1_val==6148914691236517206 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x555555555555555d, 0x5555555555555556, 0x7, x1, 560, x2)
+
+inst_355:
+// rs1_val==6148914691236517206 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x5555555555555555, 0x5555555555555556, -0x1, x1, 568, x2)
+
+inst_356:
+// rs1_val==6148914691236517206 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x5555555555555556; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x5555555555555552, 0x5555555555555556, -0x4, x1, 576, x2)
+
+inst_357:
+// rs1_val==-6148914691236517205 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaae, -0x5555555555555555, 0x3, x1, 584, x2)
+
+inst_358:
+// rs1_val==-6148914691236517205 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaab0, -0x5555555555555555, 0x5, x1, 592, x2)
+
+inst_359:
+// rs1_val==-6148914691236517205 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaab5, -0x5555555555555555, 0xa, x1, 600, x2)
+
+inst_360:
+// rs1_val==-6148914691236517205 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaab1, -0x5555555555555555, 0x6, x1, 608, x2)
+
+inst_361:
+// rs1_val==-6148914691236517205 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaa9, -0x5555555555555555, -0x2, x1, 616, x2)
+
+inst_362:
+// rs1_val==-6148914691236517205 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaa6, -0x5555555555555555, -0x5, x1, 624, x2)
+
+inst_363:
+// rs1_val==-6148914691236517205 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaad, -0x5555555555555555, 0x2, x1, 632, x2)
+
+inst_364:
+// rs1_val==-6148914691236517205 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x4, x1, 640, x2)
+
+inst_365:
+// rs1_val==-6148914691236517205 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaab4, -0x5555555555555555, 0x9, x1, 648, x2)
+
+inst_366:
+// rs1_val==-6148914691236517205 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x0, x1, 656, x2)
+
+inst_367:
+// rs1_val==-6148914691236517205 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaab6, -0x5555555555555555, 0xb, x1, 664, x2)
+
+inst_368:
+// rs1_val==-6148914691236517205 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaab2, -0x5555555555555555, 0x7, x1, 672, x2)
+
+inst_369:
+// rs1_val==-6148914691236517205 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaaa, -0x5555555555555555, -0x1, x1, 680, x2)
+
+inst_370:
+// rs1_val==-6148914691236517205 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xaaaaaaaaaaaaaaa7, -0x5555555555555555, -0x4, x1, 688, x2)
+
+inst_371:
+// rs1_val==6 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x9, 0x6, 0x3, x1, 696, x2)
+
+inst_372:
+// rs1_val==6 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xb, 0x6, 0x5, x1, 704, x2)
+
+inst_373:
+// rs1_val==6 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x10, 0x6, 0xa, x1, 712, x2)
+
+inst_374:
+// rs1_val==6 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xc, 0x6, 0x6, x1, 720, x2)
+
+inst_375:
+// rs1_val==6 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x4, 0x6, -0x2, x1, 728, x2)
+
+inst_376:
+// rs1_val==6 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x1, 0x6, -0x5, x1, 736, x2)
+
+inst_377:
+// rs1_val==6 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x8, 0x6, 0x2, x1, 744, x2)
+
+inst_378:
+// rs1_val==6 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xa, 0x6, 0x4, x1, 752, x2)
+
+inst_379:
+// rs1_val==6 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xf, 0x6, 0x9, x1, 760, x2)
+
+inst_380:
+// rs1_val==6 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x6, 0x6, 0x0, x1, 768, x2)
+
+inst_381:
+// rs1_val==6 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x11, 0x6, 0xb, x1, 776, x2)
+
+inst_382:
+// rs1_val==6 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xd, 0x6, 0x7, x1, 784, x2)
+
+inst_383:
+// rs1_val==6 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x2, 0x6, -0x4, x1, 792, x2)
+
+inst_384:
+// rs1_val==3689348814741910324 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x3333333333333337, 0x3333333333333334, 0x3, x1, 800, x2)
+
+inst_385:
+// rs1_val==3689348814741910324 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x3333333333333339, 0x3333333333333334, 0x5, x1, 808, x2)
+
+inst_386:
+// rs1_val==3689348814741910324 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x333333333333333e, 0x3333333333333334, 0xa, x1, 816, x2)
+
+inst_387:
+// rs1_val==3689348814741910324 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x333333333333333a, 0x3333333333333334, 0x6, x1, 824, x2)
+
+inst_388:
+// rs1_val==3689348814741910324 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x3333333333333332, 0x3333333333333334, -0x2, x1, 832, x2)
+
+inst_389:
+// rs1_val==3689348814741910324 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x333333333333332f, 0x3333333333333334, -0x5, x1, 840, x2)
+
+inst_390:
+// rs1_val==3689348814741910324 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x3333333333333336, 0x3333333333333334, 0x2, x1, 848, x2)
+
+inst_391:
+// rs1_val==3689348814741910324 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x3333333333333338, 0x3333333333333334, 0x4, x1, 856, x2)
+
+inst_392:
+// rs1_val==3689348814741910324 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x333333333333333d, 0x3333333333333334, 0x9, x1, 864, x2)
+
+inst_393:
+// rs1_val==3689348814741910324 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x3333333333333334, 0x3333333333333334, 0x0, x1, 872, x2)
+
+inst_394:
+// rs1_val==3689348814741910324 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x333333333333333f, 0x3333333333333334, 0xb, x1, 880, x2)
+
+inst_395:
+// rs1_val==3689348814741910324 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x333333333333333b, 0x3333333333333334, 0x7, x1, 888, x2)
+
+inst_396:
+// rs1_val==3689348814741910324 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x3333333333333333, 0x3333333333333334, -0x1, x1, 896, x2)
+
+inst_397:
+// rs1_val==3689348814741910324 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x3333333333333334; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x3333333333333330, 0x3333333333333334, -0x4, x1, 904, x2)
+
+inst_398:
+// rs1_val==7378697629483820647 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x3
+TEST_CI_OP( c.addi, x10, 0x666666666666666a, 0x6666666666666667, 0x3, x1, 912, x2)
+
+inst_399:
+// rs1_val==7378697629483820647 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x5
+TEST_CI_OP( c.addi, x10, 0x666666666666666c, 0x6666666666666667, 0x5, x1, 920, x2)
+
+inst_400:
+// rs1_val==7378697629483820647 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0xa
+TEST_CI_OP( c.addi, x10, 0x6666666666666671, 0x6666666666666667, 0xa, x1, 928, x2)
+
+inst_401:
+// rs1_val==7378697629483820647 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x6
+TEST_CI_OP( c.addi, x10, 0x666666666666666d, 0x6666666666666667, 0x6, x1, 936, x2)
+
+inst_402:
+// rs1_val==7378697629483820647 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0x6666666666666665, 0x6666666666666667, -0x2, x1, 944, x2)
+
+inst_403:
+// rs1_val==7378697629483820647 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0x6666666666666662, 0x6666666666666667, -0x5, x1, 952, x2)
+
+inst_404:
+// rs1_val==7378697629483820647 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x2
+TEST_CI_OP( c.addi, x10, 0x6666666666666669, 0x6666666666666667, 0x2, x1, 960, x2)
+
+inst_405:
+// rs1_val==7378697629483820647 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x4
+TEST_CI_OP( c.addi, x10, 0x666666666666666b, 0x6666666666666667, 0x4, x1, 968, x2)
+
+inst_406:
+// rs1_val==7378697629483820647 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x9
+TEST_CI_OP( c.addi, x10, 0x6666666666666670, 0x6666666666666667, 0x9, x1, 976, x2)
+
+inst_407:
+// rs1_val==7378697629483820647 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x0
+TEST_CI_OP( c.addi, x10, 0x6666666666666667, 0x6666666666666667, 0x0, x1, 984, x2)
+
+inst_408:
+// rs1_val==7378697629483820647 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0xb
+TEST_CI_OP( c.addi, x10, 0x6666666666666672, 0x6666666666666667, 0xb, x1, 992, x2)
+
+inst_409:
+// rs1_val==-3037000498 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0ccd, -0xb504f332, -0x1, x1, 1000, x2)
+
+inst_410:
+// rs1_val==-3037000498 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cca, -0xb504f332, -0x4, x1, 1008, x2)
+
+inst_411:
+// rs1_val==3037000500 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xb504f337, 0xb504f334, 0x3, x1, 1016, x2)
+
+inst_412:
+// rs1_val==3037000500 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xb504f339, 0xb504f334, 0x5, x1, 1024, x2)
+
+inst_413:
+// rs1_val==3037000500 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xb504f33e, 0xb504f334, 0xa, x1, 1032, x2)
+
+inst_414:
+// rs1_val==3037000500 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xb504f33a, 0xb504f334, 0x6, x1, 1040, x2)
+
+inst_415:
+// rs1_val==3037000500 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xb504f332, 0xb504f334, -0x2, x1, 1048, x2)
+
+inst_416:
+// rs1_val==3037000500 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xb504f32f, 0xb504f334, -0x5, x1, 1056, x2)
+
+inst_417:
+// rs1_val==3037000500 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xb504f336, 0xb504f334, 0x2, x1, 1064, x2)
+
+inst_418:
+// rs1_val==3037000500 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xb504f338, 0xb504f334, 0x4, x1, 1072, x2)
+
+inst_419:
+// rs1_val==3037000500 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xb504f33d, 0xb504f334, 0x9, x1, 1080, x2)
+
+inst_420:
+// rs1_val==3037000500 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xb504f334, 0xb504f334, 0x0, x1, 1088, x2)
+
+inst_421:
+// rs1_val==3037000500 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xb504f33f, 0xb504f334, 0xb, x1, 1096, x2)
+
+inst_422:
+// rs1_val==3037000500 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xb504f33b, 0xb504f334, 0x7, x1, 1104, x2)
+
+inst_423:
+// rs1_val==3037000500 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0xb504f333, 0xb504f334, -0x1, x1, 1112, x2)
+
+inst_424:
+// rs1_val==3037000500 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0xb504f334; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0xb504f330, 0xb504f334, -0x4, x1, 1120, x2)
+
+inst_425:
+// rs1_val==7378697629483820647 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x7
+TEST_CI_OP( c.addi, x10, 0x666666666666666e, 0x6666666666666667, 0x7, x1, 1128, x2)
+
+inst_426:
+// rs1_val==7378697629483820647 and imm_val==-1,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:-0x1
+TEST_CI_OP( c.addi, x10, 0x6666666666666666, 0x6666666666666667, -0x1, x1, 1136, x2)
+
+inst_427:
+// rs1_val==7378697629483820647 and imm_val==-4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:0x6666666666666667; immval:-0x4
+TEST_CI_OP( c.addi, x10, 0x6666666666666663, 0x6666666666666667, -0x4, x1, 1144, x2)
+
+inst_428:
+// rs1_val==-3037000498 and imm_val==3,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x3
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd1, -0xb504f332, 0x3, x1, 1152, x2)
+
+inst_429:
+// rs1_val==-3037000498 and imm_val==5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x5
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd3, -0xb504f332, 0x5, x1, 1160, x2)
+
+inst_430:
+// rs1_val==-3037000498 and imm_val==10,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:0xa
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd8, -0xb504f332, 0xa, x1, 1168, x2)
+
+inst_431:
+// rs1_val==-3037000498 and imm_val==6,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x6
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd4, -0xb504f332, 0x6, x1, 1176, x2)
+
+inst_432:
+// rs1_val==-3037000498 and imm_val==-2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:-0x2
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0ccc, -0xb504f332, -0x2, x1, 1184, x2)
+
+inst_433:
+// rs1_val==-3037000498 and imm_val==-5,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:-0x5
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cc9, -0xb504f332, -0x5, x1, 1192, x2)
+
+inst_434:
+// rs1_val==-3037000498 and imm_val==2,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x2
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd0, -0xb504f332, 0x2, x1, 1200, x2)
+
+inst_435:
+// rs1_val==-3037000498 and imm_val==4,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x4
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd2, -0xb504f332, 0x4, x1, 1208, x2)
+
+inst_436:
+// rs1_val==-3037000498 and imm_val==9,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x9
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd7, -0xb504f332, 0x9, x1, 1216, x2)
+
+inst_437:
+// rs1_val==-3037000498 and imm_val==0,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x0
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cce, -0xb504f332, 0x0, x1, 1224, x2)
+
+inst_438:
+// rs1_val==-3037000498 and imm_val==11,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:0xb
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd9, -0xb504f332, 0xb, x1, 1232, x2)
+
+inst_439:
+// rs1_val==-3037000498 and imm_val==7,
+// opcode:c.addi; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x7
+TEST_CI_OP( c.addi, x10, 0xffffffff4afb0cd5, -0xb504f332, 0x7, x1, 1240, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x13_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x13_1:
+ .fill 28*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 156*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/caddi16sp-01.S b/riscof/suite/rv64i_m/C/caddi16sp-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..3110e1cb3f1654af85a58a09470d008f333b9e10
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/caddi16sp-01.S
@@ -0,0 +1,729 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.addi16sp instruction of the RISC-V C extension for the caddi16sp covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",caddi16sp)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rd==x2, rs1_val == imm_val, imm_val == 256, rs1_val > 0 and imm_val > 0, rs1_val == 256
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x100; immval:0x100
+TEST_CI_OP( c.addi16sp, x2, 0x200, 0x100, 0x100, x1, 0, x3)
+
+inst_1:
+// rs1_val != imm_val, rs1_val == 2097152, rs1_val > 0 and imm_val < 0, imm_val == -144
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x200000; immval:-0x90
+TEST_CI_OP( c.addi16sp, x2, 0x1fff70, 0x200000, -0x90, x1, 8, x3)
+
+inst_2:
+// rs1_val < 0 and imm_val > 0, rs1_val == -274877906945
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x4000000001; immval:0x90
+TEST_CI_OP( c.addi16sp, x2, 0xffffffc00000008f, -0x4000000001, 0x90, x1, 16, x3)
+
+inst_3:
+// rs1_val < 0 and imm_val < 0, imm_val == -512, rs1_val == -2
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x2; immval:-0x200
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffffffdfe, -0x2, -0x200, x1, 24, x3)
+
+inst_4:
+// rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808, imm_val == 16
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x8000000000000000; immval:0x10
+TEST_CI_OP( c.addi16sp, x2, 0x8000000000000010, -0x8000000000000000, 0x10, x1, 32, x3)
+
+inst_5:
+// rs1_val == 0,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x0; immval:0x30
+TEST_CI_OP( c.addi16sp, x2, 0x30, 0x0, 0x30, x1, 40, x3)
+
+inst_6:
+// rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x7fffffffffffffff; immval:0x90
+TEST_CI_OP( c.addi16sp, x2, 0x800000000000008f, 0x7fffffffffffffff, 0x90, x1, 48, x3)
+
+inst_7:
+// rs1_val == 1,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x1; immval:0xf0
+TEST_CI_OP( c.addi16sp, x2, 0xf1, 0x1, 0xf0, x1, 56, x3)
+
+inst_8:
+// imm_val == 496, rs1_val == -65537
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x10001; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffffff01ef, -0x10001, 0x1f0, x1, 64, x3)
+
+inst_9:
+// rs1_val == 2, imm_val == 336
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x2; immval:0x150
+TEST_CI_OP( c.addi16sp, x2, 0x152, 0x2, 0x150, x1, 72, x3)
+
+inst_10:
+// rs1_val == 4, imm_val == -48
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x4; immval:-0x30
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffffffffd4, 0x4, -0x30, x1, 80, x3)
+
+inst_11:
+// rs1_val == 8, imm_val == 128
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x8; immval:0x80
+TEST_CI_OP( c.addi16sp, x2, 0x88, 0x8, 0x80, x1, 88, x3)
+
+inst_12:
+// rs1_val == 16,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x10; immval:0x150
+TEST_CI_OP( c.addi16sp, x2, 0x160, 0x10, 0x150, x1, 96, x3)
+
+inst_13:
+// rs1_val == 32, imm_val == -80
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x20; immval:-0x50
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffffffffd0, 0x20, -0x50, x1, 104, x3)
+
+inst_14:
+// rs1_val == 64,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x40; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0x230, 0x40, 0x1f0, x1, 112, x3)
+
+inst_15:
+// rs1_val == 128,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x80; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0x270, 0x80, 0x1f0, x1, 120, x3)
+
+inst_16:
+// rs1_val == 512,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x200; immval:0x50
+TEST_CI_OP( c.addi16sp, x2, 0x250, 0x200, 0x50, x1, 128, x3)
+
+inst_17:
+// rs1_val == 1024, imm_val == 64
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x400; immval:0x40
+TEST_CI_OP( c.addi16sp, x2, 0x440, 0x400, 0x40, x1, 136, x3)
+
+inst_18:
+// rs1_val == 2048,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x800; immval:-0x50
+TEST_CI_OP( c.addi16sp, x2, 0x7b0, 0x800, -0x50, x1, 144, x3)
+
+inst_19:
+// rs1_val == 4096,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x1000; immval:-0x50
+TEST_CI_OP( c.addi16sp, x2, 0xfb0, 0x1000, -0x50, x1, 152, x3)
+
+inst_20:
+// rs1_val == 8192,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x2000; immval:0x80
+TEST_CI_OP( c.addi16sp, x2, 0x2080, 0x2000, 0x80, x1, 160, x3)
+
+inst_21:
+// rs1_val == 16384,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x4000; immval:0xf0
+TEST_CI_OP( c.addi16sp, x2, 0x40f0, 0x4000, 0xf0, x1, 168, x3)
+
+inst_22:
+// rs1_val == 32768,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x8000; immval:0x10
+TEST_CI_OP( c.addi16sp, x2, 0x8010, 0x8000, 0x10, x1, 176, x3)
+
+inst_23:
+// rs1_val == 65536, imm_val == 32
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x10000; immval:0x20
+TEST_CI_OP( c.addi16sp, x2, 0x10020, 0x10000, 0x20, x1, 184, x3)
+
+inst_24:
+// rs1_val == 131072,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x20000; immval:0x100
+TEST_CI_OP( c.addi16sp, x2, 0x20100, 0x20000, 0x100, x1, 192, x3)
+
+inst_25:
+// rs1_val == 262144,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x40000; immval:0x60
+TEST_CI_OP( c.addi16sp, x2, 0x40060, 0x40000, 0x60, x1, 200, x3)
+
+inst_26:
+// rs1_val == 524288,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x80000; immval:0x50
+TEST_CI_OP( c.addi16sp, x2, 0x80050, 0x80000, 0x50, x1, 208, x3)
+
+inst_27:
+// rs1_val == 1048576,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x100000; immval:0x40
+TEST_CI_OP( c.addi16sp, x2, 0x100040, 0x100000, 0x40, x1, 216, x3)
+
+inst_28:
+// rs1_val == 4194304,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x400000; immval:0x60
+TEST_CI_OP( c.addi16sp, x2, 0x400060, 0x400000, 0x60, x1, 224, x3)
+
+inst_29:
+// rs1_val == 8388608,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x800000; immval:-0x90
+TEST_CI_OP( c.addi16sp, x2, 0x7fff70, 0x800000, -0x90, x1, 232, x3)
+
+inst_30:
+// rs1_val == 16777216,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x1000000; immval:-0x60
+TEST_CI_OP( c.addi16sp, x2, 0xffffa0, 0x1000000, -0x60, x1, 240, x3)
+
+inst_31:
+// rs1_val == 33554432,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x2000000; immval:-0x30
+TEST_CI_OP( c.addi16sp, x2, 0x1ffffd0, 0x2000000, -0x30, x1, 248, x3)
+
+inst_32:
+// rs1_val == 67108864,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x4000000; immval:0x70
+TEST_CI_OP( c.addi16sp, x2, 0x4000070, 0x4000000, 0x70, x1, 256, x3)
+
+inst_33:
+// rs1_val == 134217728,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x8000000; immval:0x30
+TEST_CI_OP( c.addi16sp, x2, 0x8000030, 0x8000000, 0x30, x1, 264, x3)
+
+inst_34:
+// rs1_val == 268435456,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x10000000; immval:-0xa0
+TEST_CI_OP( c.addi16sp, x2, 0xfffff60, 0x10000000, -0xa0, x1, 272, x3)
+
+inst_35:
+// rs1_val == 536870912,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x20000000; immval:-0x50
+TEST_CI_OP( c.addi16sp, x2, 0x1fffffb0, 0x20000000, -0x50, x1, 280, x3)
+
+inst_36:
+// rs1_val == 1073741824,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x40000000; immval:-0x200
+TEST_CI_OP( c.addi16sp, x2, 0x3ffffe00, 0x40000000, -0x200, x1, 288, x3)
+
+inst_37:
+// rs1_val == 2147483648,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x80000000; immval:-0x40
+TEST_CI_OP( c.addi16sp, x2, 0x7fffffc0, 0x80000000, -0x40, x1, 296, x3)
+
+inst_38:
+// rs1_val == 4294967296,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x100000000; immval:0x20
+TEST_CI_OP( c.addi16sp, x2, 0x100000020, 0x100000000, 0x20, x1, 304, x3)
+
+inst_39:
+// rs1_val == 8589934592,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x200000000; immval:0x60
+TEST_CI_OP( c.addi16sp, x2, 0x200000060, 0x200000000, 0x60, x1, 312, x3)
+
+inst_40:
+// rs1_val == 17179869184,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x400000000; immval:-0x40
+TEST_CI_OP( c.addi16sp, x2, 0x3ffffffc0, 0x400000000, -0x40, x1, 320, x3)
+
+inst_41:
+// rs1_val == 34359738368,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x800000000; immval:0x50
+TEST_CI_OP( c.addi16sp, x2, 0x800000050, 0x800000000, 0x50, x1, 328, x3)
+
+inst_42:
+// rs1_val == 68719476736,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x1000000000; immval:0x80
+TEST_CI_OP( c.addi16sp, x2, 0x1000000080, 0x1000000000, 0x80, x1, 336, x3)
+
+inst_43:
+// rs1_val == 137438953472,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x2000000000; immval:-0x50
+TEST_CI_OP( c.addi16sp, x2, 0x1fffffffb0, 0x2000000000, -0x50, x1, 344, x3)
+
+inst_44:
+// rs1_val == 274877906944,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x4000000000; immval:-0xa0
+TEST_CI_OP( c.addi16sp, x2, 0x3fffffff60, 0x4000000000, -0xa0, x1, 352, x3)
+
+inst_45:
+// rs1_val == 549755813888,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x8000000000; immval:-0x70
+TEST_CI_OP( c.addi16sp, x2, 0x7fffffff90, 0x8000000000, -0x70, x1, 360, x3)
+
+inst_46:
+// rs1_val == 1099511627776,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x10000000000; immval:-0x40
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffc0, 0x10000000000, -0x40, x1, 368, x3)
+
+inst_47:
+// rs1_val == 2199023255552,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x20000000000; immval:0x70
+TEST_CI_OP( c.addi16sp, x2, 0x20000000070, 0x20000000000, 0x70, x1, 376, x3)
+
+inst_48:
+// rs1_val == 4398046511104,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x40000000000; immval:0x10
+TEST_CI_OP( c.addi16sp, x2, 0x40000000010, 0x40000000000, 0x10, x1, 384, x3)
+
+inst_49:
+// rs1_val == 8796093022208,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x80000000000; immval:-0x30
+TEST_CI_OP( c.addi16sp, x2, 0x7ffffffffd0, 0x80000000000, -0x30, x1, 392, x3)
+
+inst_50:
+// rs1_val == 17592186044416,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x100000000000; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0x1000000001f0, 0x100000000000, 0x1f0, x1, 400, x3)
+
+inst_51:
+// rs1_val == 35184372088832,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x200000000000; immval:0xf0
+TEST_CI_OP( c.addi16sp, x2, 0x2000000000f0, 0x200000000000, 0xf0, x1, 408, x3)
+
+inst_52:
+// rs1_val == 70368744177664,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x400000000000; immval:0x30
+TEST_CI_OP( c.addi16sp, x2, 0x400000000030, 0x400000000000, 0x30, x1, 416, x3)
+
+inst_53:
+// rs1_val == 140737488355328,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x800000000000; immval:0x70
+TEST_CI_OP( c.addi16sp, x2, 0x800000000070, 0x800000000000, 0x70, x1, 424, x3)
+
+inst_54:
+// rs1_val == 281474976710656,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x1000000000000; immval:0x30
+TEST_CI_OP( c.addi16sp, x2, 0x1000000000030, 0x1000000000000, 0x30, x1, 432, x3)
+
+inst_55:
+// rs1_val == 562949953421312,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x2000000000000; immval:0x30
+TEST_CI_OP( c.addi16sp, x2, 0x2000000000030, 0x2000000000000, 0x30, x1, 440, x3)
+
+inst_56:
+// rs1_val == 1125899906842624, imm_val == -352
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x4000000000000; immval:-0x160
+TEST_CI_OP( c.addi16sp, x2, 0x3fffffffffea0, 0x4000000000000, -0x160, x1, 448, x3)
+
+inst_57:
+// rs1_val == 2251799813685248,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x8000000000000; immval:-0x30
+TEST_CI_OP( c.addi16sp, x2, 0x7ffffffffffd0, 0x8000000000000, -0x30, x1, 456, x3)
+
+inst_58:
+// rs1_val == 4503599627370496,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x10000000000000; immval:0x80
+TEST_CI_OP( c.addi16sp, x2, 0x10000000000080, 0x10000000000000, 0x80, x1, 464, x3)
+
+inst_59:
+// rs1_val == 9007199254740992,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x20000000000000; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0x200000000001f0, 0x20000000000000, 0x1f0, x1, 472, x3)
+
+inst_60:
+// rs1_val == 18014398509481984,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x40000000000000; immval:0xf0
+TEST_CI_OP( c.addi16sp, x2, 0x400000000000f0, 0x40000000000000, 0xf0, x1, 480, x3)
+
+inst_61:
+// rs1_val == 36028797018963968,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x80000000000000; immval:-0x30
+TEST_CI_OP( c.addi16sp, x2, 0x7fffffffffffd0, 0x80000000000000, -0x30, x1, 488, x3)
+
+inst_62:
+// rs1_val == 72057594037927936, imm_val == -32
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x100000000000000; immval:-0x20
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffffffe0, 0x100000000000000, -0x20, x1, 496, x3)
+
+inst_63:
+// rs1_val == 144115188075855872,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x200000000000000; immval:0x20
+TEST_CI_OP( c.addi16sp, x2, 0x200000000000020, 0x200000000000000, 0x20, x1, 504, x3)
+
+inst_64:
+// rs1_val == 288230376151711744,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x400000000000000; immval:-0x40
+TEST_CI_OP( c.addi16sp, x2, 0x3ffffffffffffc0, 0x400000000000000, -0x40, x1, 512, x3)
+
+inst_65:
+// rs1_val == 576460752303423488,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x800000000000000; immval:0x40
+TEST_CI_OP( c.addi16sp, x2, 0x800000000000040, 0x800000000000000, 0x40, x1, 520, x3)
+
+inst_66:
+// rs1_val == 1152921504606846976,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x1000000000000000; immval:0x20
+TEST_CI_OP( c.addi16sp, x2, 0x1000000000000020, 0x1000000000000000, 0x20, x1, 528, x3)
+
+inst_67:
+// rs1_val == 2305843009213693952,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x2000000000000000; immval:0x30
+TEST_CI_OP( c.addi16sp, x2, 0x2000000000000030, 0x2000000000000000, 0x30, x1, 536, x3)
+
+inst_68:
+// rs1_val == 4611686018427387904,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x4000000000000000; immval:0x50
+TEST_CI_OP( c.addi16sp, x2, 0x4000000000000050, 0x4000000000000000, 0x50, x1, 544, x3)
+
+inst_69:
+// rs1_val == -9007199254740993,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x20000000000001; immval:-0x10
+TEST_CI_OP( c.addi16sp, x2, 0xffdfffffffffffef, -0x20000000000001, -0x10, x1, 552, x3)
+
+inst_70:
+// rs1_val == -18014398509481985,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x40000000000001; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0xffc00000000001ef, -0x40000000000001, 0x1f0, x1, 560, x3)
+
+inst_71:
+// rs1_val == -36028797018963969,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x80000000000001; immval:0x30
+TEST_CI_OP( c.addi16sp, x2, 0xff8000000000002f, -0x80000000000001, 0x30, x1, 568, x3)
+
+inst_72:
+// rs1_val == -72057594037927937,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x100000000000001; immval:0x80
+TEST_CI_OP( c.addi16sp, x2, 0xff0000000000007f, -0x100000000000001, 0x80, x1, 576, x3)
+
+inst_73:
+// rs1_val == -144115188075855873,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x200000000000001; immval:-0x80
+TEST_CI_OP( c.addi16sp, x2, 0xfdffffffffffff7f, -0x200000000000001, -0x80, x1, 584, x3)
+
+inst_74:
+// rs1_val == -288230376151711745,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x400000000000001; immval:0x150
+TEST_CI_OP( c.addi16sp, x2, 0xfc0000000000014f, -0x400000000000001, 0x150, x1, 592, x3)
+
+inst_75:
+// rs1_val == -576460752303423489,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x800000000000001; immval:-0x40
+TEST_CI_OP( c.addi16sp, x2, 0xf7ffffffffffffbf, -0x800000000000001, -0x40, x1, 600, x3)
+
+inst_76:
+// rs1_val == -1152921504606846977,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x1000000000000001; immval:-0x70
+TEST_CI_OP( c.addi16sp, x2, 0xefffffffffffff8f, -0x1000000000000001, -0x70, x1, 608, x3)
+
+inst_77:
+// rs1_val == -2305843009213693953,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x2000000000000001; immval:-0x100
+TEST_CI_OP( c.addi16sp, x2, 0xdffffffffffffeff, -0x2000000000000001, -0x100, x1, 616, x3)
+
+inst_78:
+// rs1_val == -4611686018427387905,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x4000000000000001; immval:-0x60
+TEST_CI_OP( c.addi16sp, x2, 0xbfffffffffffff9f, -0x4000000000000001, -0x60, x1, 624, x3)
+
+inst_79:
+// rs1_val == 6148914691236517205,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x5555555555555555; immval:0x100
+TEST_CI_OP( c.addi16sp, x2, 0x5555555555555655, 0x5555555555555555, 0x100, x1, 632, x3)
+
+inst_80:
+// rs1_val == -6148914691236517206,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x5555555555555556; immval:-0x40
+TEST_CI_OP( c.addi16sp, x2, 0xaaaaaaaaaaaaaa6a, -0x5555555555555556, -0x40, x1, 640, x3)
+
+inst_81:
+// imm_val == -272,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:0x100; immval:-0x110
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffffffff0, 0x100, -0x110, x1, 648, x3)
+
+inst_82:
+// rs1_val == -3,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x3; immval:0x50
+TEST_CI_OP( c.addi16sp, x2, 0x4d, -0x3, 0x50, x1, 656, x3)
+
+inst_83:
+// rs1_val == -5,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x5; immval:0x20
+TEST_CI_OP( c.addi16sp, x2, 0x1b, -0x5, 0x20, x1, 664, x3)
+
+inst_84:
+// rs1_val == -9,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x9; immval:-0x40
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffffffffb7, -0x9, -0x40, x1, 672, x3)
+
+inst_85:
+// rs1_val == -17,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x11; immval:0x150
+TEST_CI_OP( c.addi16sp, x2, 0x13f, -0x11, 0x150, x1, 680, x3)
+
+inst_86:
+// rs1_val == -33,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x21; immval:-0x110
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffffffecf, -0x21, -0x110, x1, 688, x3)
+
+inst_87:
+// rs1_val == -65,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x41; immval:-0xa0
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffffffff1f, -0x41, -0xa0, x1, 696, x3)
+
+inst_88:
+// rs1_val == -129,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x81; immval:-0x200
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffffffd7f, -0x81, -0x200, x1, 704, x3)
+
+inst_89:
+// rs1_val == -257,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x101; immval:-0x40
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffffffebf, -0x101, -0x40, x1, 712, x3)
+
+inst_90:
+// rs1_val == -513,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x201; immval:0x60
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffffffe5f, -0x201, 0x60, x1, 720, x3)
+
+inst_91:
+// rs1_val == -1025,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x401; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffffffdef, -0x401, 0x1f0, x1, 728, x3)
+
+inst_92:
+// rs1_val == -2049,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x801; immval:0x40
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffffff83f, -0x801, 0x40, x1, 736, x3)
+
+inst_93:
+// rs1_val == -4097,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x1001; immval:0x50
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffffff04f, -0x1001, 0x50, x1, 744, x3)
+
+inst_94:
+// rs1_val == -8193,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x2001; immval:-0x10
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffffffdfef, -0x2001, -0x10, x1, 752, x3)
+
+inst_95:
+// rs1_val == -16385,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x4001; immval:-0x100
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffffffbeff, -0x4001, -0x100, x1, 760, x3)
+
+inst_96:
+// rs1_val == -32769,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x8001; immval:0x70
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffffff806f, -0x8001, 0x70, x1, 768, x3)
+
+inst_97:
+// rs1_val == -131073,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x20001; immval:0x90
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffffe008f, -0x20001, 0x90, x1, 776, x3)
+
+inst_98:
+// rs1_val == -262145,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x40001; immval:0x80
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffffc007f, -0x40001, 0x80, x1, 784, x3)
+
+inst_99:
+// rs1_val == -524289,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x80001; immval:0x90
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffff8008f, -0x80001, 0x90, x1, 792, x3)
+
+inst_100:
+// rs1_val == -1048577,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x100001; immval:-0x10
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffffefffef, -0x100001, -0x10, x1, 800, x3)
+
+inst_101:
+// rs1_val == -2097153,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x200001; immval:0x30
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffffe0002f, -0x200001, 0x30, x1, 808, x3)
+
+inst_102:
+// rs1_val == -4194305,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x400001; immval:0x80
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffffc0007f, -0x400001, 0x80, x1, 816, x3)
+
+inst_103:
+// rs1_val == -8388609,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x800001; immval:0x20
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffff80001f, -0x800001, 0x20, x1, 824, x3)
+
+inst_104:
+// rs1_val == -16777217,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x1000001; immval:0x80
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffff00007f, -0x1000001, 0x80, x1, 832, x3)
+
+inst_105:
+// rs1_val == -33554433,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x2000001; immval:0x30
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffe00002f, -0x2000001, 0x30, x1, 840, x3)
+
+inst_106:
+// rs1_val == -67108865,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x4000001; immval:-0x50
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffffbffffaf, -0x4000001, -0x50, x1, 848, x3)
+
+inst_107:
+// rs1_val == -134217729,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x8000001; immval:0x30
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffff800002f, -0x8000001, 0x30, x1, 856, x3)
+
+inst_108:
+// rs1_val == -268435457,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x10000001; immval:-0x30
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffefffffcf, -0x10000001, -0x30, x1, 864, x3)
+
+inst_109:
+// rs1_val == -536870913,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x20000001; immval:-0x40
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffdfffffbf, -0x20000001, -0x40, x1, 872, x3)
+
+inst_110:
+// rs1_val == -1073741825,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x40000001; immval:-0x110
+TEST_CI_OP( c.addi16sp, x2, 0xffffffffbffffeef, -0x40000001, -0x110, x1, 880, x3)
+
+inst_111:
+// rs1_val == -2147483649,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x80000001; immval:-0x60
+TEST_CI_OP( c.addi16sp, x2, 0xffffffff7fffff9f, -0x80000001, -0x60, x1, 888, x3)
+
+inst_112:
+// rs1_val == -4294967297,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x100000001; immval:0x70
+TEST_CI_OP( c.addi16sp, x2, 0xffffffff0000006f, -0x100000001, 0x70, x1, 896, x3)
+
+inst_113:
+// rs1_val == -8589934593,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x200000001; immval:-0x90
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffdffffff6f, -0x200000001, -0x90, x1, 904, x3)
+
+inst_114:
+// rs1_val == -17179869185,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x400000001; immval:-0xa0
+TEST_CI_OP( c.addi16sp, x2, 0xfffffffbffffff5f, -0x400000001, -0xa0, x1, 912, x3)
+
+inst_115:
+// rs1_val == -34359738369,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x800000001; immval:0x90
+TEST_CI_OP( c.addi16sp, x2, 0xfffffff80000008f, -0x800000001, 0x90, x1, 920, x3)
+
+inst_116:
+// rs1_val == -68719476737,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x1000000001; immval:-0xa0
+TEST_CI_OP( c.addi16sp, x2, 0xffffffefffffff5f, -0x1000000001, -0xa0, x1, 928, x3)
+
+inst_117:
+// rs1_val == -137438953473,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x2000000001; immval:0x100
+TEST_CI_OP( c.addi16sp, x2, 0xffffffe0000000ff, -0x2000000001, 0x100, x1, 936, x3)
+
+inst_118:
+// rs1_val == -549755813889,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x8000000001; immval:-0xa0
+TEST_CI_OP( c.addi16sp, x2, 0xffffff7fffffff5f, -0x8000000001, -0xa0, x1, 944, x3)
+
+inst_119:
+// rs1_val == -1099511627777,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x10000000001; immval:-0x30
+TEST_CI_OP( c.addi16sp, x2, 0xfffffeffffffffcf, -0x10000000001, -0x30, x1, 952, x3)
+
+inst_120:
+// rs1_val == -2199023255553,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x20000000001; immval:-0xa0
+TEST_CI_OP( c.addi16sp, x2, 0xfffffdffffffff5f, -0x20000000001, -0xa0, x1, 960, x3)
+
+inst_121:
+// rs1_val == -4398046511105,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x40000000001; immval:-0x110
+TEST_CI_OP( c.addi16sp, x2, 0xfffffbfffffffeef, -0x40000000001, -0x110, x1, 968, x3)
+
+inst_122:
+// rs1_val == -8796093022209,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x80000000001; immval:0x10
+TEST_CI_OP( c.addi16sp, x2, 0xfffff8000000000f, -0x80000000001, 0x10, x1, 976, x3)
+
+inst_123:
+// rs1_val == -17592186044417,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x100000000001; immval:0x70
+TEST_CI_OP( c.addi16sp, x2, 0xfffff0000000006f, -0x100000000001, 0x70, x1, 984, x3)
+
+inst_124:
+// rs1_val == -35184372088833,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x200000000001; immval:0x40
+TEST_CI_OP( c.addi16sp, x2, 0xffffe0000000003f, -0x200000000001, 0x40, x1, 992, x3)
+
+inst_125:
+// rs1_val == -70368744177665,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x400000000001; immval:0x100
+TEST_CI_OP( c.addi16sp, x2, 0xffffc000000000ff, -0x400000000001, 0x100, x1, 1000, x3)
+
+inst_126:
+// rs1_val == -140737488355329,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x800000000001; immval:0x40
+TEST_CI_OP( c.addi16sp, x2, 0xffff80000000003f, -0x800000000001, 0x40, x1, 1008, x3)
+
+inst_127:
+// rs1_val == -281474976710657,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x1000000000001; immval:0x1f0
+TEST_CI_OP( c.addi16sp, x2, 0xffff0000000001ef, -0x1000000000001, 0x1f0, x1, 1016, x3)
+
+inst_128:
+// rs1_val == -562949953421313,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x2000000000001; immval:-0xa0
+TEST_CI_OP( c.addi16sp, x2, 0xfffdffffffffff5f, -0x2000000000001, -0xa0, x1, 1024, x3)
+
+inst_129:
+// rs1_val == -1125899906842625,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x4000000000001; immval:-0x10
+TEST_CI_OP( c.addi16sp, x2, 0xfffbffffffffffef, -0x4000000000001, -0x10, x1, 1032, x3)
+
+inst_130:
+// rs1_val == -2251799813685249,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x8000000000001; immval:-0x70
+TEST_CI_OP( c.addi16sp, x2, 0xfff7ffffffffff8f, -0x8000000000001, -0x70, x1, 1040, x3)
+
+inst_131:
+// rs1_val == -4503599627370497,
+// opcode:c.addi16sp; op1:x2; dest:x2 op1val:-0x10000000000001; immval:-0x20
+TEST_CI_OP( c.addi16sp, x2, 0xffefffffffffffdf, -0x10000000000001, -0x20, x1, 1048, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 132*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/caddi4spn-01.S b/riscof/suite/rv64i_m/C/caddi4spn-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..71ddaa4336e1a691dce6d373ffb70e66fbf064b6
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/caddi4spn-01.S
@@ -0,0 +1,164 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.addi4spn instruction of the RISC-V C extension for the caddi4spn covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",caddi4spn)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rd==x13, imm_val > 0, imm_val == 512
+// opcode:c.addi4spn; dest:x13; immval:0x200
+TEST_CADDI4SPN_OP( c.addi4spn, x13, 0x200, 0x200, x1, 0, x2)
+
+inst_1:
+// rd==x14, imm_val == 1020,
+// opcode:c.addi4spn; dest:x14; immval:0x3fc
+TEST_CADDI4SPN_OP( c.addi4spn, x14, 0x3fc, 0x3fc, x1, 8, x2)
+
+inst_2:
+// rd==x11, imm_val == 4,
+// opcode:c.addi4spn; dest:x11; immval:0x4
+TEST_CADDI4SPN_OP( c.addi4spn, x11, 0x4, 0x4, x1, 16, x2)
+
+inst_3:
+// rd==x10, imm_val == 8,
+// opcode:c.addi4spn; dest:x10; immval:0x8
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x8, 0x8, x1, 24, x2)
+
+inst_4:
+// rd==x12, imm_val == 16,
+// opcode:c.addi4spn; dest:x12; immval:0x10
+TEST_CADDI4SPN_OP( c.addi4spn, x12, 0x10, 0x10, x1, 32, x2)
+
+inst_5:
+// rd==x8, imm_val == 32,
+// opcode:c.addi4spn; dest:x8; immval:0x20
+TEST_CADDI4SPN_OP( c.addi4spn, x8, 0x20, 0x20, x1, 40, x2)
+
+inst_6:
+// rd==x9, imm_val == 64,
+// opcode:c.addi4spn; dest:x9; immval:0x40
+TEST_CADDI4SPN_OP( c.addi4spn, x9, 0x40, 0x40, x1, 48, x2)
+
+inst_7:
+// rd==x15, imm_val == 128,
+// opcode:c.addi4spn; dest:x15; immval:0x80
+TEST_CADDI4SPN_OP( c.addi4spn, x15, 0x80, 0x80, x1, 56, x2)
+
+inst_8:
+// imm_val == 256,
+// opcode:c.addi4spn; dest:x10; immval:0x100
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x100, 0x100, x1, 64, x2)
+
+inst_9:
+// imm_val == 1016,
+// opcode:c.addi4spn; dest:x10; immval:0x3f8
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x3f8, 0x3f8, x1, 72, x2)
+
+inst_10:
+// imm_val == 1012,
+// opcode:c.addi4spn; dest:x10; immval:0x3f4
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x3f4, 0x3f4, x1, 80, x2)
+
+inst_11:
+// imm_val == 1004,
+// opcode:c.addi4spn; dest:x10; immval:0x3ec
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x3ec, 0x3ec, x1, 88, x2)
+
+inst_12:
+// imm_val == 764,
+// opcode:c.addi4spn; dest:x10; immval:0x2fc
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x2fc, 0x2fc, x1, 96, x2)
+
+inst_13:
+// imm_val == 508,
+// opcode:c.addi4spn; dest:x10; immval:0x1fc
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x1fc, 0x1fc, x1, 104, x2)
+
+inst_14:
+// imm_val == 340,
+// opcode:c.addi4spn; dest:x10; immval:0x154
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x154, 0x154, x1, 112, x2)
+
+inst_15:
+// imm_val == 680,
+// opcode:c.addi4spn; dest:x10; immval:0x2a8
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x2a8, 0x2a8, x1, 120, x2)
+
+inst_16:
+// imm_val == 988,
+// opcode:c.addi4spn; dest:x10; immval:0x3dc
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x3dc, 0x3dc, x1, 128, x2)
+
+inst_17:
+// imm_val == 956,
+// opcode:c.addi4spn; dest:x10; immval:0x3bc
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x3bc, 0x3bc, x1, 136, x2)
+
+inst_18:
+// imm_val == 892,
+// opcode:c.addi4spn; dest:x10; immval:0x37c
+TEST_CADDI4SPN_OP( c.addi4spn, x10, 0x37c, 0x37c, x1, 144, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 19*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/caddiw-01.S b/riscof/suite/rv64i_m/C/caddiw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..415c21e49594e6901cd868107f53705eca34991e
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/caddiw-01.S
@@ -0,0 +1,2269 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.addiw instruction of the RISC-V C extension for the caddiw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*C.*);def TEST_CASE_1=True;",caddiw)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rd==x9, rs1_val == imm_val, imm_val == 16, rs1_val > 0 and imm_val > 0, rs1_val == 16
+// opcode:c.addiw; op1:x9; dest:x9 op1val:0x10; immval:0x10
+TEST_CI_OP( c.addiw, x9, 0x20, 0x10, 0x10, x2, 0, x5)
+
+inst_1:
+// rd==x7, rs1_val != imm_val, rs1_val == 32768
+// opcode:c.addiw; op1:x7; dest:x7 op1val:0x8000; immval:0x7
+TEST_CI_OP( c.addiw, x7, 0x8007, 0x8000, 0x7, x2, 8, x5)
+
+inst_2:
+// rd==x31, rs1_val > 0 and imm_val < 0, rs1_val == 144115188075855872
+// opcode:c.addiw; op1:x31; dest:x31 op1val:0x200000000000000; immval:-0x1
+TEST_CI_OP( c.addiw, x31, -0x1, 0x200000000000000, -0x1, x2, 16, x5)
+
+inst_3:
+// rd==x10, rs1_val < 0 and imm_val > 0, rs1_val == -4097
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x1001; immval:0x3
+TEST_CI_OP( c.addiw, x10, -0xffe, -0x1001, 0x3, x2, 24, x5)
+
+inst_4:
+// rd==x16, rs1_val < 0 and imm_val < 0, imm_val == -22, rs1_val == -513
+// opcode:c.addiw; op1:x16; dest:x16 op1val:-0x201; immval:-0x16
+TEST_CI_OP( c.addiw, x16, -0x217, -0x201, -0x16, x2, 32, x5)
+
+inst_5:
+// rd==x27, imm_val == (-2**(6-1)), rs1_val == 1125899906842624, imm_val == -32
+// opcode:c.addiw; op1:x27; dest:x27 op1val:0x4000000000000; immval:-0x20
+TEST_CI_OP( c.addiw, x27, -0x20, 0x4000000000000, -0x20, x2, 40, x5)
+
+inst_6:
+// rd==x18, imm_val == 0,
+// opcode:c.addiw; op1:x18; dest:x18 op1val:-0x8; immval:0x0
+TEST_CI_OP( c.addiw, x18, -0x8, -0x8, 0x0, x2, 48, x5)
+
+inst_7:
+// rd==x21, imm_val == (2**(6-1)-1), imm_val == 31, rs1_val == -8388609
+// opcode:c.addiw; op1:x21; dest:x21 op1val:-0x800001; immval:0x1f
+TEST_CI_OP( c.addiw, x21, -0x7fffe2, -0x800001, 0x1f, x2, 56, x5)
+
+inst_8:
+// rd==x11, imm_val == 1, rs1_val == -68719476737
+// opcode:c.addiw; op1:x11; dest:x11 op1val:-0x1000000001; immval:0x1
+TEST_CI_OP( c.addiw, x11, 0x0, -0x1000000001, 0x1, x2, 64, x5)
+
+inst_9:
+// rd==x4, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808
+// opcode:c.addiw; op1:x4; dest:x4 op1val:-0x8000000000000000; immval:0x5
+TEST_CI_OP( c.addiw, x4, 0x5, -0x8000000000000000, 0x5, x2, 72, x5)
+
+inst_10:
+// rd==x3, rs1_val == 0, rs1_val==0 and imm_val==4, imm_val == 4
+// opcode:c.addiw; op1:x3; dest:x3 op1val:0x0; immval:0x4
+TEST_CI_OP( c.addiw, x3, 0x4, 0x0, 0x4, x2, 80, x5)
+
+inst_11:
+// rd==x24, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807
+// opcode:c.addiw; op1:x24; dest:x24 op1val:0x7fffffffffffffff; immval:0x6
+TEST_CI_OP( c.addiw, x24, 0x5, 0x7fffffffffffffff, 0x6, x2, 88, x5)
+
+inst_12:
+// rd==x30, rs1_val == 1,
+// opcode:c.addiw; op1:x30; dest:x30 op1val:0x1; immval:0x3
+TEST_CI_OP( c.addiw, x30, 0x4, 0x1, 0x3, x2, 96, x5)
+
+inst_13:
+// rd==x13, imm_val == 2, rs1_val == -1048577
+// opcode:c.addiw; op1:x13; dest:x13 op1val:-0x100001; immval:0x2
+TEST_CI_OP( c.addiw, x13, -0xfffff, -0x100001, 0x2, x2, 104, x5)
+
+inst_14:
+// rd==x14, imm_val == 8, rs1_val == -1073741825
+// opcode:c.addiw; op1:x14; dest:x14 op1val:-0x40000001; immval:0x8
+TEST_CI_OP( c.addiw, x14, -0x3ffffff9, -0x40000001, 0x8, x2, 112, x5)
+
+inst_15:
+// rd==x26, imm_val == -2,
+// opcode:c.addiw; op1:x26; dest:x26 op1val:-0xa; immval:-0x2
+TEST_CI_OP( c.addiw, x26, -0xc, -0xa, -0x2, x2, 120, x5)
+
+inst_16:
+// rd==x12, imm_val == -3,
+// opcode:c.addiw; op1:x12; dest:x12 op1val:0x3; immval:-0x3
+TEST_CI_OP( c.addiw, x12, 0x0, 0x3, -0x3, x2, 128, x5)
+
+inst_17:
+// rd==x6, imm_val == -5, rs1_val == 268435456
+// opcode:c.addiw; op1:x6; dest:x6 op1val:0x10000000; immval:-0x5
+TEST_CI_OP( c.addiw, x6, 0xffffffb, 0x10000000, -0x5, x2, 136, x5)
+
+inst_18:
+// rd==x17, imm_val == -9, rs1_val == -9
+// opcode:c.addiw; op1:x17; dest:x17 op1val:-0x9; immval:-0x9
+TEST_CI_OP( c.addiw, x17, -0x12, -0x9, -0x9, x2, 144, x5)
+
+inst_19:
+// rd==x29, imm_val == -17, rs1_val == -35184372088833
+// opcode:c.addiw; op1:x29; dest:x29 op1val:-0x200000000001; immval:-0x11
+TEST_CI_OP( c.addiw, x29, -0x12, -0x200000000001, -0x11, x2, 152, x5)
+
+inst_20:
+// rd==x23, imm_val == 21, rs1_val == 4
+// opcode:c.addiw; op1:x23; dest:x23 op1val:0x4; immval:0x15
+TEST_CI_OP( c.addiw, x23, 0x19, 0x4, 0x15, x2, 160, x5)
+
+inst_21:
+// rd==x28, rs1_val==3 and imm_val==3,
+// opcode:c.addiw; op1:x28; dest:x28 op1val:0x3; immval:0x3
+TEST_CI_OP( c.addiw, x28, 0x6, 0x3, 0x3, x2, 168, x5)
+
+inst_22:
+// rd==x8, rs1_val==3 and imm_val==5,
+// opcode:c.addiw; op1:x8; dest:x8 op1val:0x3; immval:0x5
+TEST_CI_OP( c.addiw, x8, 0x8, 0x3, 0x5, x2, 176, x5)
+
+inst_23:
+// rd==x15, rs1_val==3 and imm_val==10,
+// opcode:c.addiw; op1:x15; dest:x15 op1val:0x3; immval:0xa
+TEST_CI_OP( c.addiw, x15, 0xd, 0x3, 0xa, x2, 184, x5)
+
+inst_24:
+// rd==x22, rs1_val==3 and imm_val==6,
+// opcode:c.addiw; op1:x22; dest:x22 op1val:0x3; immval:0x6
+TEST_CI_OP( c.addiw, x22, 0x9, 0x3, 0x6, x2, 192, x5)
+
+inst_25:
+// rd==x19, rs1_val==3 and imm_val==-2,
+// opcode:c.addiw; op1:x19; dest:x19 op1val:0x3; immval:-0x2
+TEST_CI_OP( c.addiw, x19, 0x1, 0x3, -0x2, x2, 200, x5)
+
+inst_26:
+// rd==x1, rs1_val==3 and imm_val==-5,
+// opcode:c.addiw; op1:x1; dest:x1 op1val:0x3; immval:-0x5
+TEST_CI_OP( c.addiw, x1, -0x2, 0x3, -0x5, x2, 208, x5)
+
+inst_27:
+// rd==x20, rs1_val==3 and imm_val==2,
+// opcode:c.addiw; op1:x20; dest:x20 op1val:0x3; immval:0x2
+TEST_CI_OP( c.addiw, x20, 0x5, 0x3, 0x2, x2, 216, x3)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_28:
+// rd==x2, rs1_val==3 and imm_val==4,
+// opcode:c.addiw; op1:x2; dest:x2 op1val:0x3; immval:0x4
+TEST_CI_OP( c.addiw, x2, 0x7, 0x3, 0x4, x1, 0, x3)
+
+inst_29:
+// rd==x25, rs1_val==3 and imm_val==9,
+// opcode:c.addiw; op1:x25; dest:x25 op1val:0x3; immval:0x9
+TEST_CI_OP( c.addiw, x25, 0xc, 0x3, 0x9, x1, 8, x3)
+
+inst_30:
+// rd==x5, rs1_val==3 and imm_val==0,
+// opcode:c.addiw; op1:x5; dest:x5 op1val:0x3; immval:0x0
+TEST_CI_OP( c.addiw, x5, 0x3, 0x3, 0x0, x1, 16, x3)
+
+inst_31:
+// rs1_val==3 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0xe, 0x3, 0xb, x1, 24, x3)
+
+inst_32:
+// rs1_val==3 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0xa, 0x3, 0x7, x1, 32, x3)
+
+inst_33:
+// rs1_val==3 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x2, 0x3, -0x1, x1, 40, x3)
+
+inst_34:
+// rs1_val==3 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3; immval:-0x4
+TEST_CI_OP( c.addiw, x10, -0x1, 0x3, -0x4, x1, 48, x3)
+
+inst_35:
+// rs1_val==6148914691236517205 and imm_val==3, rs1_val == 6148914691236517205
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x55555558, 0x5555555555555555, 0x3, x1, 56, x3)
+
+inst_36:
+// rs1_val==6148914691236517205 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x5555555a, 0x5555555555555555, 0x5, x1, 64, x3)
+
+inst_37:
+// rs1_val==6148914691236517205 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0x5555555f, 0x5555555555555555, 0xa, x1, 72, x3)
+
+inst_38:
+// rs1_val==6148914691236517205 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x5555555b, 0x5555555555555555, 0x6, x1, 80, x3)
+
+inst_39:
+// rs1_val==6148914691236517205 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x55555553, 0x5555555555555555, -0x2, x1, 88, x3)
+
+inst_40:
+// rs1_val==6148914691236517205 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0x55555550, 0x5555555555555555, -0x5, x1, 96, x3)
+
+inst_41:
+// rs1_val==6148914691236517205 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x55555557, 0x5555555555555555, 0x2, x1, 104, x3)
+
+inst_42:
+// rs1_val==6148914691236517205 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x55555559, 0x5555555555555555, 0x4, x1, 112, x3)
+
+inst_43:
+// rs1_val==6148914691236517205 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0x5555555e, 0x5555555555555555, 0x9, x1, 120, x3)
+
+inst_44:
+// rs1_val==6148914691236517205 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x55555555, 0x5555555555555555, 0x0, x1, 128, x3)
+
+inst_45:
+// rs1_val==6148914691236517205 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0x55555560, 0x5555555555555555, 0xb, x1, 136, x3)
+
+inst_46:
+// rs1_val==6148914691236517205 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x5555555c, 0x5555555555555555, 0x7, x1, 144, x3)
+
+inst_47:
+// rs1_val==6148914691236517205 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x55555554, 0x5555555555555555, -0x1, x1, 152, x3)
+
+inst_48:
+// rs1_val==6148914691236517205 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555555; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x55555551, 0x5555555555555555, -0x4, x1, 160, x3)
+
+inst_49:
+// rs1_val==-6148914691236517206 and imm_val==3, rs1_val == -6148914691236517206
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x3
+TEST_CI_OP( c.addiw, x10, -0x55555553, -0x5555555555555556, 0x3, x1, 168, x3)
+
+inst_50:
+// rs1_val==-6148914691236517206 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x5
+TEST_CI_OP( c.addiw, x10, -0x55555551, -0x5555555555555556, 0x5, x1, 176, x3)
+
+inst_51:
+// rs1_val==-6148914691236517206 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0xa
+TEST_CI_OP( c.addiw, x10, -0x5555554c, -0x5555555555555556, 0xa, x1, 184, x3)
+
+inst_52:
+// rs1_val==-6148914691236517206 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x6
+TEST_CI_OP( c.addiw, x10, -0x55555550, -0x5555555555555556, 0x6, x1, 192, x3)
+
+inst_53:
+// rs1_val==-6148914691236517206 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:-0x2
+TEST_CI_OP( c.addiw, x10, -0x55555558, -0x5555555555555556, -0x2, x1, 200, x3)
+
+inst_54:
+// rs1_val==-6148914691236517206 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:-0x5
+TEST_CI_OP( c.addiw, x10, -0x5555555b, -0x5555555555555556, -0x5, x1, 208, x3)
+
+inst_55:
+// rs1_val==-6148914691236517206 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x2
+TEST_CI_OP( c.addiw, x10, -0x55555554, -0x5555555555555556, 0x2, x1, 216, x3)
+
+inst_56:
+// rs1_val==-6148914691236517206 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x4
+TEST_CI_OP( c.addiw, x10, -0x55555552, -0x5555555555555556, 0x4, x1, 224, x3)
+
+inst_57:
+// rs1_val==-6148914691236517206 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x9
+TEST_CI_OP( c.addiw, x10, -0x5555554d, -0x5555555555555556, 0x9, x1, 232, x3)
+
+inst_58:
+// rs1_val==-6148914691236517206 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x0
+TEST_CI_OP( c.addiw, x10, -0x55555556, -0x5555555555555556, 0x0, x1, 240, x3)
+
+inst_59:
+// rs1_val==-6148914691236517206 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0xb
+TEST_CI_OP( c.addiw, x10, -0x5555554b, -0x5555555555555556, 0xb, x1, 248, x3)
+
+inst_60:
+// rs1_val==-6148914691236517206 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x7
+TEST_CI_OP( c.addiw, x10, -0x5555554f, -0x5555555555555556, 0x7, x1, 256, x3)
+
+inst_61:
+// rs1_val==-6148914691236517206 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:-0x1
+TEST_CI_OP( c.addiw, x10, -0x55555557, -0x5555555555555556, -0x1, x1, 264, x3)
+
+inst_62:
+// rs1_val==-6148914691236517206 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:-0x4
+TEST_CI_OP( c.addiw, x10, -0x5555555a, -0x5555555555555556, -0x4, x1, 272, x3)
+
+inst_63:
+// rs1_val==5 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x8, 0x5, 0x3, x1, 280, x3)
+
+inst_64:
+// rs1_val==5 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0xa, 0x5, 0x5, x1, 288, x3)
+
+inst_65:
+// rs1_val==5 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0xf, 0x5, 0xa, x1, 296, x3)
+
+inst_66:
+// rs1_val==5 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0xb, 0x5, 0x6, x1, 304, x3)
+
+inst_67:
+// rs1_val==5 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x3, 0x5, -0x2, x1, 312, x3)
+
+inst_68:
+// rs1_val==5 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0x0, 0x5, -0x5, x1, 320, x3)
+
+inst_69:
+// rs1_val==5 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x7, 0x5, 0x2, x1, 328, x3)
+
+inst_70:
+// rs1_val==5 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x9, 0x5, 0x4, x1, 336, x3)
+
+inst_71:
+// rs1_val==5 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0xe, 0x5, 0x9, x1, 344, x3)
+
+inst_72:
+// rs1_val==5 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x5, 0x5, 0x0, x1, 352, x3)
+
+inst_73:
+// rs1_val==5 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0x10, 0x5, 0xb, x1, 360, x3)
+
+inst_74:
+// rs1_val==5 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0xc, 0x5, 0x7, x1, 368, x3)
+
+inst_75:
+// rs1_val==5 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x4, 0x5, -0x1, x1, 376, x3)
+
+inst_76:
+// rs1_val==5 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x1, 0x5, -0x4, x1, 384, x3)
+
+inst_77:
+// rs1_val==3689348814741910323 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x33333336, 0x3333333333333333, 0x3, x1, 392, x3)
+
+inst_78:
+// rs1_val==3689348814741910323 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x33333338, 0x3333333333333333, 0x5, x1, 400, x3)
+
+inst_79:
+// rs1_val==3689348814741910323 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0x3333333d, 0x3333333333333333, 0xa, x1, 408, x3)
+
+inst_80:
+// rs1_val==3689348814741910323 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x33333339, 0x3333333333333333, 0x6, x1, 416, x3)
+
+inst_81:
+// rs1_val==3689348814741910323 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x33333331, 0x3333333333333333, -0x2, x1, 424, x3)
+
+inst_82:
+// rs1_val==3689348814741910323 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0x3333332e, 0x3333333333333333, -0x5, x1, 432, x3)
+
+inst_83:
+// rs1_val==3689348814741910323 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x33333335, 0x3333333333333333, 0x2, x1, 440, x3)
+
+inst_84:
+// rs1_val==3689348814741910323 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x33333337, 0x3333333333333333, 0x4, x1, 448, x3)
+
+inst_85:
+// rs1_val==3689348814741910323 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0x3333333c, 0x3333333333333333, 0x9, x1, 456, x3)
+
+inst_86:
+// rs1_val==3689348814741910323 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x33333333, 0x3333333333333333, 0x0, x1, 464, x3)
+
+inst_87:
+// rs1_val==3689348814741910323 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0x3333333e, 0x3333333333333333, 0xb, x1, 472, x3)
+
+inst_88:
+// rs1_val==3689348814741910323 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x3333333a, 0x3333333333333333, 0x7, x1, 480, x3)
+
+inst_89:
+// rs1_val==3689348814741910323 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x33333332, 0x3333333333333333, -0x1, x1, 488, x3)
+
+inst_90:
+// rs1_val==3689348814741910323 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333333; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x3333332f, 0x3333333333333333, -0x4, x1, 496, x3)
+
+inst_91:
+// rs1_val==7378697629483820646 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x66666669, 0x6666666666666666, 0x3, x1, 504, x3)
+
+inst_92:
+// rs1_val==7378697629483820646 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x6666666b, 0x6666666666666666, 0x5, x1, 512, x3)
+
+inst_93:
+// rs1_val==7378697629483820646 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0x66666670, 0x6666666666666666, 0xa, x1, 520, x3)
+
+inst_94:
+// rs1_val==7378697629483820646 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x6666666c, 0x6666666666666666, 0x6, x1, 528, x3)
+
+inst_95:
+// rs1_val==7378697629483820646 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x66666664, 0x6666666666666666, -0x2, x1, 536, x3)
+
+inst_96:
+// rs1_val==7378697629483820646 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0x66666661, 0x6666666666666666, -0x5, x1, 544, x3)
+
+inst_97:
+// rs1_val==7378697629483820646 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x66666668, 0x6666666666666666, 0x2, x1, 552, x3)
+
+inst_98:
+// rs1_val==7378697629483820646 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x6666666a, 0x6666666666666666, 0x4, x1, 560, x3)
+
+inst_99:
+// rs1_val==7378697629483820646 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0x6666666f, 0x6666666666666666, 0x9, x1, 568, x3)
+
+inst_100:
+// rs1_val==7378697629483820646 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x66666666, 0x6666666666666666, 0x0, x1, 576, x3)
+
+inst_101:
+// rs1_val==7378697629483820646 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0x66666671, 0x6666666666666666, 0xb, x1, 584, x3)
+
+inst_102:
+// rs1_val==7378697629483820646 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x6666666d, 0x6666666666666666, 0x7, x1, 592, x3)
+
+inst_103:
+// rs1_val==7378697629483820646 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x66666665, 0x6666666666666666, -0x1, x1, 600, x3)
+
+inst_104:
+// rs1_val==7378697629483820646 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666666; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x66666662, 0x6666666666666666, -0x4, x1, 608, x3)
+
+inst_105:
+// rs1_val==-3037000499 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd0, -0xb504f333, 0x3, x1, 616, x3)
+
+inst_106:
+// rs1_val==-3037000499 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd2, -0xb504f333, 0x5, x1, 624, x3)
+
+inst_107:
+// rs1_val==-3037000499 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd7, -0xb504f333, 0xa, x1, 632, x3)
+
+inst_108:
+// rs1_val==-3037000499 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd3, -0xb504f333, 0x6, x1, 640, x3)
+
+inst_109:
+// rs1_val==-3037000499 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x4afb0ccb, -0xb504f333, -0x2, x1, 648, x3)
+
+inst_110:
+// rs1_val==-3037000499 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0x4afb0cc8, -0xb504f333, -0x5, x1, 656, x3)
+
+inst_111:
+// rs1_val==-3037000499 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x4afb0ccf, -0xb504f333, 0x2, x1, 664, x3)
+
+inst_112:
+// rs1_val==-3037000499 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd1, -0xb504f333, 0x4, x1, 672, x3)
+
+inst_113:
+// rs1_val==-3037000499 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd6, -0xb504f333, 0x9, x1, 680, x3)
+
+inst_114:
+// rs1_val==-3037000499 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x4afb0ccd, -0xb504f333, 0x0, x1, 688, x3)
+
+inst_115:
+// rs1_val==-3037000499 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd8, -0xb504f333, 0xb, x1, 696, x3)
+
+inst_116:
+// rs1_val==-3037000499 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd4, -0xb504f333, 0x7, x1, 704, x3)
+
+inst_117:
+// rs1_val==-3037000499 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x4afb0ccc, -0xb504f333, -0x1, x1, 712, x3)
+
+inst_118:
+// rs1_val==-3037000499 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f333; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x4afb0cc9, -0xb504f333, -0x4, x1, 720, x3)
+
+inst_119:
+// rs1_val==3037000499 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:0x3
+TEST_CI_OP( c.addiw, x10, -0x4afb0cca, 0xb504f333, 0x3, x1, 728, x3)
+
+inst_120:
+// rs1_val==3037000499 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:0x5
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc8, 0xb504f333, 0x5, x1, 736, x3)
+
+inst_121:
+// rs1_val==3037000499 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:0xa
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc3, 0xb504f333, 0xa, x1, 744, x3)
+
+inst_122:
+// rs1_val==3037000499 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:0x6
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc7, 0xb504f333, 0x6, x1, 752, x3)
+
+inst_123:
+// rs1_val==3037000499 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:-0x2
+TEST_CI_OP( c.addiw, x10, -0x4afb0ccf, 0xb504f333, -0x2, x1, 760, x3)
+
+inst_124:
+// rs1_val==3037000499 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:-0x5
+TEST_CI_OP( c.addiw, x10, -0x4afb0cd2, 0xb504f333, -0x5, x1, 768, x3)
+
+inst_125:
+// rs1_val==3037000499 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:0x2
+TEST_CI_OP( c.addiw, x10, -0x4afb0ccb, 0xb504f333, 0x2, x1, 776, x3)
+
+inst_126:
+// rs1_val==3037000499 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:0x4
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc9, 0xb504f333, 0x4, x1, 784, x3)
+
+inst_127:
+// rs1_val==3037000499 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:0x9
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc4, 0xb504f333, 0x9, x1, 792, x3)
+
+inst_128:
+// rs1_val==3037000499 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:0x0
+TEST_CI_OP( c.addiw, x10, -0x4afb0ccd, 0xb504f333, 0x0, x1, 800, x3)
+
+inst_129:
+// rs1_val==3037000499 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:0xb
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc2, 0xb504f333, 0xb, x1, 808, x3)
+
+inst_130:
+// rs1_val==3037000499 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:0x7
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc6, 0xb504f333, 0x7, x1, 816, x3)
+
+inst_131:
+// rs1_val==3037000499 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:-0x1
+TEST_CI_OP( c.addiw, x10, -0x4afb0cce, 0xb504f333, -0x1, x1, 824, x3)
+
+inst_132:
+// rs1_val==3037000499 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f333; immval:-0x4
+TEST_CI_OP( c.addiw, x10, -0x4afb0cd1, 0xb504f333, -0x4, x1, 832, x3)
+
+inst_133:
+// rs1_val==2 and imm_val==3, rs1_val == 2
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x5, 0x2, 0x3, x1, 840, x3)
+
+inst_134:
+// rs1_val==2 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x7, 0x2, 0x5, x1, 848, x3)
+
+inst_135:
+// rs1_val==2 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0xc, 0x2, 0xa, x1, 856, x3)
+
+inst_136:
+// rs1_val==2 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x8, 0x2, 0x6, x1, 864, x3)
+
+inst_137:
+// rs1_val==2 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x0, 0x2, -0x2, x1, 872, x3)
+
+inst_138:
+// rs1_val==2 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:-0x5
+TEST_CI_OP( c.addiw, x10, -0x3, 0x2, -0x5, x1, 880, x3)
+
+inst_139:
+// rs1_val==2 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x4, 0x2, 0x2, x1, 888, x3)
+
+inst_140:
+// rs1_val==2 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x6, 0x2, 0x4, x1, 896, x3)
+
+inst_141:
+// rs1_val==2 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0xb, 0x2, 0x9, x1, 904, x3)
+
+inst_142:
+// rs1_val==2 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x2, 0x2, 0x0, x1, 912, x3)
+
+inst_143:
+// rs1_val==2 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0xd, 0x2, 0xb, x1, 920, x3)
+
+inst_144:
+// rs1_val==2 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x9, 0x2, 0x7, x1, 928, x3)
+
+inst_145:
+// rs1_val==2 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x1, 0x2, -0x1, x1, 936, x3)
+
+inst_146:
+// rs1_val==2 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2; immval:-0x4
+TEST_CI_OP( c.addiw, x10, -0x2, 0x2, -0x4, x1, 944, x3)
+
+inst_147:
+// rs1_val==6148914691236517204 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x55555557, 0x5555555555555554, 0x3, x1, 952, x3)
+
+inst_148:
+// rs1_val==6148914691236517204 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x55555559, 0x5555555555555554, 0x5, x1, 960, x3)
+
+inst_149:
+// rs1_val==6148914691236517204 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0x5555555e, 0x5555555555555554, 0xa, x1, 968, x3)
+
+inst_150:
+// rs1_val==6148914691236517204 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x5555555a, 0x5555555555555554, 0x6, x1, 976, x3)
+
+inst_151:
+// rs1_val==6148914691236517204 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x55555552, 0x5555555555555554, -0x2, x1, 984, x3)
+
+inst_152:
+// rs1_val==6148914691236517204 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0x5555554f, 0x5555555555555554, -0x5, x1, 992, x3)
+
+inst_153:
+// rs1_val==6148914691236517204 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x55555556, 0x5555555555555554, 0x2, x1, 1000, x3)
+
+inst_154:
+// rs1_val==6148914691236517204 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x55555558, 0x5555555555555554, 0x4, x1, 1008, x3)
+
+inst_155:
+// rs1_val==6148914691236517204 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0x5555555d, 0x5555555555555554, 0x9, x1, 1016, x3)
+
+inst_156:
+// rs1_val==6148914691236517204 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x55555554, 0x5555555555555554, 0x0, x1, 1024, x3)
+
+inst_157:
+// rs1_val==6148914691236517204 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0x5555555f, 0x5555555555555554, 0xb, x1, 1032, x3)
+
+inst_158:
+// rs1_val==6148914691236517204 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x5555555b, 0x5555555555555554, 0x7, x1, 1040, x3)
+
+inst_159:
+// rs1_val==6148914691236517204 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x55555553, 0x5555555555555554, -0x1, x1, 1048, x3)
+
+inst_160:
+// rs1_val==6148914691236517204 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555554; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x55555550, 0x5555555555555554, -0x4, x1, 1056, x3)
+
+inst_161:
+// rs1_val==0 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x0; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x3, 0x0, 0x3, x1, 1064, x3)
+
+inst_162:
+// rs1_val==0 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x0; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x5, 0x0, 0x5, x1, 1072, x3)
+
+inst_163:
+// rs1_val==0 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x0; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0xa, 0x0, 0xa, x1, 1080, x3)
+
+inst_164:
+// rs1_val==0 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x0; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x6, 0x0, 0x6, x1, 1088, x3)
+
+inst_165:
+// rs1_val==0 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x0; immval:-0x2
+TEST_CI_OP( c.addiw, x10, -0x2, 0x0, -0x2, x1, 1096, x3)
+
+inst_166:
+// rs1_val==0 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x0; immval:-0x5
+TEST_CI_OP( c.addiw, x10, -0x5, 0x0, -0x5, x1, 1104, x3)
+
+inst_167:
+// rs1_val==0 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x0; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x2, 0x0, 0x2, x1, 1112, x3)
+
+inst_168:
+// rs1_val==0 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x0; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0x9, 0x0, 0x9, x1, 1120, x3)
+
+inst_169:
+// rs1_val==0 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x0; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x0, 0x0, 0x0, x1, 1128, x3)
+
+inst_170:
+// rs1_val==0 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x0; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0xb, 0x0, 0xb, x1, 1136, x3)
+
+inst_171:
+// rs1_val==0 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x0; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x7, 0x0, 0x7, x1, 1144, x3)
+
+inst_172:
+// rs1_val==0 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x0; immval:-0x1
+TEST_CI_OP( c.addiw, x10, -0x1, 0x0, -0x1, x1, 1152, x3)
+
+inst_173:
+// rs1_val==0 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x0; immval:-0x4
+TEST_CI_OP( c.addiw, x10, -0x4, 0x0, -0x4, x1, 1160, x3)
+
+inst_174:
+// rs1_val==4 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x7, 0x4, 0x3, x1, 1168, x3)
+
+inst_175:
+// rs1_val==4 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x9, 0x4, 0x5, x1, 1176, x3)
+
+inst_176:
+// rs1_val==4 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0xe, 0x4, 0xa, x1, 1184, x3)
+
+inst_177:
+// rs1_val==4 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0xa, 0x4, 0x6, x1, 1192, x3)
+
+inst_178:
+// rs1_val==4 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x2, 0x4, -0x2, x1, 1200, x3)
+
+inst_179:
+// rs1_val==4 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:-0x5
+TEST_CI_OP( c.addiw, x10, -0x1, 0x4, -0x5, x1, 1208, x3)
+
+inst_180:
+// rs1_val==4 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x6, 0x4, 0x2, x1, 1216, x3)
+
+inst_181:
+// rs1_val==4 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x8, 0x4, 0x4, x1, 1224, x3)
+
+inst_182:
+// rs1_val==4 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0xd, 0x4, 0x9, x1, 1232, x3)
+
+inst_183:
+// rs1_val==4 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x4, 0x4, 0x0, x1, 1240, x3)
+
+inst_184:
+// rs1_val==4 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0xf, 0x4, 0xb, x1, 1248, x3)
+
+inst_185:
+// rs1_val==4 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0xb, 0x4, 0x7, x1, 1256, x3)
+
+inst_186:
+// rs1_val==4 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x3, 0x4, -0x1, x1, 1264, x3)
+
+inst_187:
+// rs1_val==4 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x0, 0x4, -0x4, x1, 1272, x3)
+
+inst_188:
+// rs1_val==3689348814741910322 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x33333335, 0x3333333333333332, 0x3, x1, 1280, x3)
+
+inst_189:
+// rs1_val==3689348814741910322 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x33333337, 0x3333333333333332, 0x5, x1, 1288, x3)
+
+inst_190:
+// rs1_val==3689348814741910322 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0x3333333c, 0x3333333333333332, 0xa, x1, 1296, x3)
+
+inst_191:
+// rs1_val==3689348814741910322 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x33333338, 0x3333333333333332, 0x6, x1, 1304, x3)
+
+inst_192:
+// rs1_val==3689348814741910322 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x33333330, 0x3333333333333332, -0x2, x1, 1312, x3)
+
+inst_193:
+// rs1_val==3689348814741910322 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0x3333332d, 0x3333333333333332, -0x5, x1, 1320, x3)
+
+inst_194:
+// rs1_val==3689348814741910322 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x33333334, 0x3333333333333332, 0x2, x1, 1328, x3)
+
+inst_195:
+// rs1_val==3689348814741910322 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x33333336, 0x3333333333333332, 0x4, x1, 1336, x3)
+
+inst_196:
+// rs1_val==3689348814741910322 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0x3333333b, 0x3333333333333332, 0x9, x1, 1344, x3)
+
+inst_197:
+// rs1_val==3689348814741910322 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x33333332, 0x3333333333333332, 0x0, x1, 1352, x3)
+
+inst_198:
+// rs1_val==3689348814741910322 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0x3333333d, 0x3333333333333332, 0xb, x1, 1360, x3)
+
+inst_199:
+// rs1_val==3689348814741910322 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x33333339, 0x3333333333333332, 0x7, x1, 1368, x3)
+
+inst_200:
+// rs1_val==3689348814741910322 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x33333331, 0x3333333333333332, -0x1, x1, 1376, x3)
+
+inst_201:
+// rs1_val==3689348814741910322 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333332; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x3333332e, 0x3333333333333332, -0x4, x1, 1384, x3)
+
+inst_202:
+// rs1_val==7378697629483820645 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x66666668, 0x6666666666666665, 0x3, x1, 1392, x3)
+
+inst_203:
+// rs1_val==7378697629483820645 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x6666666a, 0x6666666666666665, 0x5, x1, 1400, x3)
+
+inst_204:
+// rs1_val==7378697629483820645 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0x6666666f, 0x6666666666666665, 0xa, x1, 1408, x3)
+
+inst_205:
+// rs1_val==7378697629483820645 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x6666666b, 0x6666666666666665, 0x6, x1, 1416, x3)
+
+inst_206:
+// rs1_val==7378697629483820645 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x66666663, 0x6666666666666665, -0x2, x1, 1424, x3)
+
+inst_207:
+// rs1_val==7378697629483820645 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0x66666660, 0x6666666666666665, -0x5, x1, 1432, x3)
+
+inst_208:
+// rs1_val==7378697629483820645 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x66666667, 0x6666666666666665, 0x2, x1, 1440, x3)
+
+inst_209:
+// rs1_val==7378697629483820645 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x66666669, 0x6666666666666665, 0x4, x1, 1448, x3)
+
+inst_210:
+// rs1_val==7378697629483820645 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0x6666666e, 0x6666666666666665, 0x9, x1, 1456, x3)
+
+inst_211:
+// rs1_val==7378697629483820645 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x66666665, 0x6666666666666665, 0x0, x1, 1464, x3)
+
+inst_212:
+// rs1_val==7378697629483820645 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0x66666670, 0x6666666666666665, 0xb, x1, 1472, x3)
+
+inst_213:
+// rs1_val==7378697629483820645 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x6666666c, 0x6666666666666665, 0x7, x1, 1480, x3)
+
+inst_214:
+// rs1_val==7378697629483820645 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x66666664, 0x6666666666666665, -0x1, x1, 1488, x3)
+
+inst_215:
+// rs1_val==7378697629483820645 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666665; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x66666661, 0x6666666666666665, -0x4, x1, 1496, x3)
+
+inst_216:
+// rs1_val==3037000498 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:0x3
+TEST_CI_OP( c.addiw, x10, -0x4afb0ccb, 0xb504f332, 0x3, x1, 1504, x3)
+
+inst_217:
+// rs1_val==3037000498 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:0x5
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc9, 0xb504f332, 0x5, x1, 1512, x3)
+
+inst_218:
+// rs1_val==3037000498 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:0xa
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc4, 0xb504f332, 0xa, x1, 1520, x3)
+
+inst_219:
+// rs1_val==3037000498 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:0x6
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc8, 0xb504f332, 0x6, x1, 1528, x3)
+
+inst_220:
+// rs1_val==3037000498 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:-0x2
+TEST_CI_OP( c.addiw, x10, -0x4afb0cd0, 0xb504f332, -0x2, x1, 1536, x3)
+
+inst_221:
+// rs1_val==3037000498 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:-0x5
+TEST_CI_OP( c.addiw, x10, -0x4afb0cd3, 0xb504f332, -0x5, x1, 1544, x3)
+
+inst_222:
+// rs1_val==3037000498 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:0x2
+TEST_CI_OP( c.addiw, x10, -0x4afb0ccc, 0xb504f332, 0x2, x1, 1552, x3)
+
+inst_223:
+// rs1_val==3037000498 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:0x4
+TEST_CI_OP( c.addiw, x10, -0x4afb0cca, 0xb504f332, 0x4, x1, 1560, x3)
+
+inst_224:
+// rs1_val==3037000498 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:0x9
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc5, 0xb504f332, 0x9, x1, 1568, x3)
+
+inst_225:
+// rs1_val==3037000498 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:0x0
+TEST_CI_OP( c.addiw, x10, -0x4afb0cce, 0xb504f332, 0x0, x1, 1576, x3)
+
+inst_226:
+// rs1_val==3037000498 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:0xb
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc3, 0xb504f332, 0xb, x1, 1584, x3)
+
+inst_227:
+// rs1_val==3037000498 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:0x7
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc7, 0xb504f332, 0x7, x1, 1592, x3)
+
+inst_228:
+// rs1_val==3037000498 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:-0x1
+TEST_CI_OP( c.addiw, x10, -0x4afb0ccf, 0xb504f332, -0x1, x1, 1600, x3)
+
+inst_229:
+// rs1_val==3037000498 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f332; immval:-0x4
+TEST_CI_OP( c.addiw, x10, -0x4afb0cd2, 0xb504f332, -0x4, x1, 1608, x3)
+
+inst_230:
+// rs1_val==6148914691236517206 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x55555559, 0x5555555555555556, 0x3, x1, 1616, x3)
+
+inst_231:
+// rs1_val==6148914691236517206 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x5555555b, 0x5555555555555556, 0x5, x1, 1624, x3)
+
+inst_232:
+// rs1_val==6148914691236517206 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0x55555560, 0x5555555555555556, 0xa, x1, 1632, x3)
+
+inst_233:
+// rs1_val==6148914691236517206 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x5555555c, 0x5555555555555556, 0x6, x1, 1640, x3)
+
+inst_234:
+// rs1_val==6148914691236517206 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x55555554, 0x5555555555555556, -0x2, x1, 1648, x3)
+
+inst_235:
+// rs1_val==6148914691236517206 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0x55555551, 0x5555555555555556, -0x5, x1, 1656, x3)
+
+inst_236:
+// rs1_val==6148914691236517206 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x55555558, 0x5555555555555556, 0x2, x1, 1664, x3)
+
+inst_237:
+// rs1_val==6148914691236517206 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x5555555a, 0x5555555555555556, 0x4, x1, 1672, x3)
+
+inst_238:
+// rs1_val==6148914691236517206 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0x5555555f, 0x5555555555555556, 0x9, x1, 1680, x3)
+
+inst_239:
+// rs1_val==6148914691236517206 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x55555556, 0x5555555555555556, 0x0, x1, 1688, x3)
+
+inst_240:
+// rs1_val==6148914691236517206 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0x55555561, 0x5555555555555556, 0xb, x1, 1696, x3)
+
+inst_241:
+// rs1_val==6148914691236517206 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x5555555d, 0x5555555555555556, 0x7, x1, 1704, x3)
+
+inst_242:
+// rs1_val==6148914691236517206 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x55555555, 0x5555555555555556, -0x1, x1, 1712, x3)
+
+inst_243:
+// rs1_val==6148914691236517206 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x5555555555555556; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x55555552, 0x5555555555555556, -0x4, x1, 1720, x3)
+
+inst_244:
+// rs1_val==-6148914691236517205 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x3
+TEST_CI_OP( c.addiw, x10, -0x55555552, -0x5555555555555555, 0x3, x1, 1728, x3)
+
+inst_245:
+// rs1_val==-6148914691236517205 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x5
+TEST_CI_OP( c.addiw, x10, -0x55555550, -0x5555555555555555, 0x5, x1, 1736, x3)
+
+inst_246:
+// rs1_val==-6148914691236517205 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0xa
+TEST_CI_OP( c.addiw, x10, -0x5555554b, -0x5555555555555555, 0xa, x1, 1744, x3)
+
+inst_247:
+// rs1_val==-6148914691236517205 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x6
+TEST_CI_OP( c.addiw, x10, -0x5555554f, -0x5555555555555555, 0x6, x1, 1752, x3)
+
+inst_248:
+// rs1_val==-6148914691236517205 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:-0x2
+TEST_CI_OP( c.addiw, x10, -0x55555557, -0x5555555555555555, -0x2, x1, 1760, x3)
+
+inst_249:
+// rs1_val==-6148914691236517205 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:-0x5
+TEST_CI_OP( c.addiw, x10, -0x5555555a, -0x5555555555555555, -0x5, x1, 1768, x3)
+
+inst_250:
+// rs1_val==-6148914691236517205 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x2
+TEST_CI_OP( c.addiw, x10, -0x55555553, -0x5555555555555555, 0x2, x1, 1776, x3)
+
+inst_251:
+// rs1_val==-6148914691236517205 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x4
+TEST_CI_OP( c.addiw, x10, -0x55555551, -0x5555555555555555, 0x4, x1, 1784, x3)
+
+inst_252:
+// rs1_val==-6148914691236517205 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x9
+TEST_CI_OP( c.addiw, x10, -0x5555554c, -0x5555555555555555, 0x9, x1, 1792, x3)
+
+inst_253:
+// rs1_val==-6148914691236517205 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x0
+TEST_CI_OP( c.addiw, x10, -0x55555555, -0x5555555555555555, 0x0, x1, 1800, x3)
+
+inst_254:
+// rs1_val==-6148914691236517205 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0xb
+TEST_CI_OP( c.addiw, x10, -0x5555554a, -0x5555555555555555, 0xb, x1, 1808, x3)
+
+inst_255:
+// rs1_val==-6148914691236517205 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x7
+TEST_CI_OP( c.addiw, x10, -0x5555554e, -0x5555555555555555, 0x7, x1, 1816, x3)
+
+inst_256:
+// rs1_val==-6148914691236517205 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:-0x1
+TEST_CI_OP( c.addiw, x10, -0x55555556, -0x5555555555555555, -0x1, x1, 1824, x3)
+
+inst_257:
+// rs1_val==-6148914691236517205 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:-0x4
+TEST_CI_OP( c.addiw, x10, -0x55555559, -0x5555555555555555, -0x4, x1, 1832, x3)
+
+inst_258:
+// rs1_val==6 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x9, 0x6, 0x3, x1, 1840, x3)
+
+inst_259:
+// rs1_val==6 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0xb, 0x6, 0x5, x1, 1848, x3)
+
+inst_260:
+// rs1_val==6 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0x10, 0x6, 0xa, x1, 1856, x3)
+
+inst_261:
+// rs1_val==6 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0xc, 0x6, 0x6, x1, 1864, x3)
+
+inst_262:
+// rs1_val==6 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x4, 0x6, -0x2, x1, 1872, x3)
+
+inst_263:
+// rs1_val==6 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0x1, 0x6, -0x5, x1, 1880, x3)
+
+inst_264:
+// rs1_val==6 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x8, 0x6, 0x2, x1, 1888, x3)
+
+inst_265:
+// rs1_val==6 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0xa, 0x6, 0x4, x1, 1896, x3)
+
+inst_266:
+// rs1_val==6 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0xf, 0x6, 0x9, x1, 1904, x3)
+
+inst_267:
+// rs1_val==6 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x6, 0x6, 0x0, x1, 1912, x3)
+
+inst_268:
+// rs1_val==6 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0x11, 0x6, 0xb, x1, 1920, x3)
+
+inst_269:
+// rs1_val==6 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0xd, 0x6, 0x7, x1, 1928, x3)
+
+inst_270:
+// rs1_val==6 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x5, 0x6, -0x1, x1, 1936, x3)
+
+inst_271:
+// rs1_val==6 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x2, 0x6, -0x4, x1, 1944, x3)
+
+inst_272:
+// rs1_val==3689348814741910324 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x33333337, 0x3333333333333334, 0x3, x1, 1952, x3)
+
+inst_273:
+// rs1_val==3689348814741910324 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x33333339, 0x3333333333333334, 0x5, x1, 1960, x3)
+
+inst_274:
+// rs1_val==3689348814741910324 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0x3333333e, 0x3333333333333334, 0xa, x1, 1968, x3)
+
+inst_275:
+// rs1_val==3689348814741910324 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x3333333a, 0x3333333333333334, 0x6, x1, 1976, x3)
+
+inst_276:
+// rs1_val==3689348814741910324 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x33333332, 0x3333333333333334, -0x2, x1, 1984, x3)
+
+inst_277:
+// rs1_val==3689348814741910324 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0x3333332f, 0x3333333333333334, -0x5, x1, 1992, x3)
+
+inst_278:
+// rs1_val==3689348814741910324 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x33333336, 0x3333333333333334, 0x2, x1, 2000, x3)
+
+inst_279:
+// rs1_val==3689348814741910324 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x33333338, 0x3333333333333334, 0x4, x1, 2008, x3)
+
+inst_280:
+// rs1_val==3689348814741910324 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0x3333333d, 0x3333333333333334, 0x9, x1, 2016, x3)
+
+inst_281:
+// rs1_val==3689348814741910324 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x33333334, 0x3333333333333334, 0x0, x1, 2024, x3)
+
+inst_282:
+// rs1_val==3689348814741910324 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0x3333333f, 0x3333333333333334, 0xb, x1, 2032, x3)
+
+inst_283:
+// rs1_val==3689348814741910324 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x3333333b, 0x3333333333333334, 0x7, x1, 2040, x3)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_284:
+// rs1_val==3689348814741910324 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x33333333, 0x3333333333333334, -0x1, x1, 0, x3)
+
+inst_285:
+// rs1_val==3689348814741910324 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x3333333333333334; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x33333330, 0x3333333333333334, -0x4, x1, 8, x3)
+
+inst_286:
+// rs1_val==7378697629483820647 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x6666666a, 0x6666666666666667, 0x3, x1, 16, x3)
+
+inst_287:
+// rs1_val==7378697629483820647 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x6666666c, 0x6666666666666667, 0x5, x1, 24, x3)
+
+inst_288:
+// rs1_val==7378697629483820647 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0x66666671, 0x6666666666666667, 0xa, x1, 32, x3)
+
+inst_289:
+// rs1_val==7378697629483820647 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x6666666d, 0x6666666666666667, 0x6, x1, 40, x3)
+
+inst_290:
+// rs1_val==7378697629483820647 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x66666665, 0x6666666666666667, -0x2, x1, 48, x3)
+
+inst_291:
+// rs1_val==7378697629483820647 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0x66666662, 0x6666666666666667, -0x5, x1, 56, x3)
+
+inst_292:
+// rs1_val==7378697629483820647 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x66666669, 0x6666666666666667, 0x2, x1, 64, x3)
+
+inst_293:
+// rs1_val==7378697629483820647 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x6666666b, 0x6666666666666667, 0x4, x1, 72, x3)
+
+inst_294:
+// rs1_val==7378697629483820647 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0x66666670, 0x6666666666666667, 0x9, x1, 80, x3)
+
+inst_295:
+// rs1_val==7378697629483820647 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x66666667, 0x6666666666666667, 0x0, x1, 88, x3)
+
+inst_296:
+// rs1_val==7378697629483820647 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0x66666672, 0x6666666666666667, 0xb, x1, 96, x3)
+
+inst_297:
+// rs1_val==7378697629483820647 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x6666666e, 0x6666666666666667, 0x7, x1, 104, x3)
+
+inst_298:
+// rs1_val==7378697629483820647 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x66666666, 0x6666666666666667, -0x1, x1, 112, x3)
+
+inst_299:
+// rs1_val==7378697629483820647 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x6666666666666667; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x66666663, 0x6666666666666667, -0x4, x1, 120, x3)
+
+inst_300:
+// rs1_val==-3037000498 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd1, -0xb504f332, 0x3, x1, 128, x3)
+
+inst_301:
+// rs1_val==-3037000498 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd3, -0xb504f332, 0x5, x1, 136, x3)
+
+inst_302:
+// rs1_val==-3037000498 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd8, -0xb504f332, 0xa, x1, 144, x3)
+
+inst_303:
+// rs1_val==-3037000498 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd4, -0xb504f332, 0x6, x1, 152, x3)
+
+inst_304:
+// rs1_val==-3037000498 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0x4afb0ccc, -0xb504f332, -0x2, x1, 160, x3)
+
+inst_305:
+// rs1_val==-3037000498 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0x4afb0cc9, -0xb504f332, -0x5, x1, 168, x3)
+
+inst_306:
+// rs1_val==-3037000498 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd0, -0xb504f332, 0x2, x1, 176, x3)
+
+inst_307:
+// rs1_val==-3037000498 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd2, -0xb504f332, 0x4, x1, 184, x3)
+
+inst_308:
+// rs1_val==-3037000498 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd7, -0xb504f332, 0x9, x1, 192, x3)
+
+inst_309:
+// rs1_val==-3037000498 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x4afb0cce, -0xb504f332, 0x0, x1, 200, x3)
+
+inst_310:
+// rs1_val==-3037000498 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd9, -0xb504f332, 0xb, x1, 208, x3)
+
+inst_311:
+// rs1_val==-3037000498 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x4afb0cd5, -0xb504f332, 0x7, x1, 216, x3)
+
+inst_312:
+// rs1_val==-3037000498 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x4afb0ccd, -0xb504f332, -0x1, x1, 224, x3)
+
+inst_313:
+// rs1_val==-3037000498 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0xb504f332; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x4afb0cca, -0xb504f332, -0x4, x1, 232, x3)
+
+inst_314:
+// rs1_val==3037000500 and imm_val==3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:0x3
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc9, 0xb504f334, 0x3, x1, 240, x3)
+
+inst_315:
+// rs1_val==3037000500 and imm_val==5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:0x5
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc7, 0xb504f334, 0x5, x1, 248, x3)
+
+inst_316:
+// rs1_val==3037000500 and imm_val==10,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:0xa
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc2, 0xb504f334, 0xa, x1, 256, x3)
+
+inst_317:
+// rs1_val==3037000500 and imm_val==6,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:0x6
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc6, 0xb504f334, 0x6, x1, 264, x3)
+
+inst_318:
+// rs1_val==3037000500 and imm_val==-2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:-0x2
+TEST_CI_OP( c.addiw, x10, -0x4afb0cce, 0xb504f334, -0x2, x1, 272, x3)
+
+inst_319:
+// rs1_val==3037000500 and imm_val==-5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:-0x5
+TEST_CI_OP( c.addiw, x10, -0x4afb0cd1, 0xb504f334, -0x5, x1, 280, x3)
+
+inst_320:
+// rs1_val==3037000500 and imm_val==2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:0x2
+TEST_CI_OP( c.addiw, x10, -0x4afb0cca, 0xb504f334, 0x2, x1, 288, x3)
+
+inst_321:
+// rs1_val==3037000500 and imm_val==4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:0x4
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc8, 0xb504f334, 0x4, x1, 296, x3)
+
+inst_322:
+// rs1_val==3037000500 and imm_val==9,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:0x9
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc3, 0xb504f334, 0x9, x1, 304, x3)
+
+inst_323:
+// rs1_val==3037000500 and imm_val==0,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:0x0
+TEST_CI_OP( c.addiw, x10, -0x4afb0ccc, 0xb504f334, 0x0, x1, 312, x3)
+
+inst_324:
+// rs1_val==3037000500 and imm_val==11,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:0xb
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc1, 0xb504f334, 0xb, x1, 320, x3)
+
+inst_325:
+// rs1_val==3037000500 and imm_val==7,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:0x7
+TEST_CI_OP( c.addiw, x10, -0x4afb0cc5, 0xb504f334, 0x7, x1, 328, x3)
+
+inst_326:
+// rs1_val==3037000500 and imm_val==-1,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:-0x1
+TEST_CI_OP( c.addiw, x10, -0x4afb0ccd, 0xb504f334, -0x1, x1, 336, x3)
+
+inst_327:
+// rs1_val==3037000500 and imm_val==-4,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0xb504f334; immval:-0x4
+TEST_CI_OP( c.addiw, x10, -0x4afb0cd0, 0xb504f334, -0x4, x1, 344, x3)
+
+inst_328:
+// rs1_val == 8,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x8; immval:-0x16
+TEST_CI_OP( c.addiw, x10, -0xe, 0x8, -0x16, x1, 352, x3)
+
+inst_329:
+// rs1_val == 32,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x20; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x26, 0x20, 0x6, x1, 360, x3)
+
+inst_330:
+// rs1_val == 64,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x40; immval:-0x9
+TEST_CI_OP( c.addiw, x10, 0x37, 0x40, -0x9, x1, 368, x3)
+
+inst_331:
+// rs1_val == 128,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x80; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x80, 0x80, 0x0, x1, 376, x3)
+
+inst_332:
+// rs1_val == 256,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x100; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0xfc, 0x100, -0x4, x1, 384, x3)
+
+inst_333:
+// rs1_val == 512,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x200; immval:-0x1
+TEST_CI_OP( c.addiw, x10, 0x1ff, 0x200, -0x1, x1, 392, x3)
+
+inst_334:
+// rs1_val == 1024,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x400; immval:-0x4
+TEST_CI_OP( c.addiw, x10, 0x3fc, 0x400, -0x4, x1, 400, x3)
+
+inst_335:
+// rs1_val == 2048,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x800; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x806, 0x800, 0x6, x1, 408, x3)
+
+inst_336:
+// rs1_val == 4096,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x1000; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x1005, 0x1000, 0x5, x1, 416, x3)
+
+inst_337:
+// rs1_val == 8192,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2000; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x2002, 0x2000, 0x2, x1, 424, x3)
+
+inst_338:
+// rs1_val == 16384,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4000; immval:-0x3
+TEST_CI_OP( c.addiw, x10, 0x3ffd, 0x4000, -0x3, x1, 432, x3)
+
+inst_339:
+// rs1_val == 65536,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x10000; immval:-0x5
+TEST_CI_OP( c.addiw, x10, 0xfffb, 0x10000, -0x5, x1, 440, x3)
+
+inst_340:
+// rs1_val == 131072,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x20000; immval:-0x6
+TEST_CI_OP( c.addiw, x10, 0x1fffa, 0x20000, -0x6, x1, 448, x3)
+
+inst_341:
+// rs1_val == 262144,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x40000; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x40002, 0x40000, 0x2, x1, 456, x3)
+
+inst_342:
+// rs1_val == 524288,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x80000; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x80005, 0x80000, 0x5, x1, 464, x3)
+
+inst_343:
+// rs1_val == 1048576,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x100000; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x100004, 0x100000, 0x4, x1, 472, x3)
+
+inst_344:
+// rs1_val == 2097152,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x200000; immval:0x8
+TEST_CI_OP( c.addiw, x10, 0x200008, 0x200000, 0x8, x1, 480, x3)
+
+inst_345:
+// rs1_val == 4194304,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x400000; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x400006, 0x400000, 0x6, x1, 488, x3)
+
+inst_346:
+// rs1_val == 8388608,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x800000; immval:-0x9
+TEST_CI_OP( c.addiw, x10, 0x7ffff7, 0x800000, -0x9, x1, 496, x3)
+
+inst_347:
+// rs1_val == 16777216,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x1000000; immval:-0x2
+TEST_CI_OP( c.addiw, x10, 0xfffffe, 0x1000000, -0x2, x1, 504, x3)
+
+inst_348:
+// rs1_val == 33554432,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2000000; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x2000006, 0x2000000, 0x6, x1, 512, x3)
+
+inst_349:
+// rs1_val == 67108864,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4000000; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x4000006, 0x4000000, 0x6, x1, 520, x3)
+
+inst_350:
+// rs1_val == 134217728,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x8000000; immval:0x0
+TEST_CI_OP( c.addiw, x10, 0x8000000, 0x8000000, 0x0, x1, 528, x3)
+
+inst_351:
+// rs1_val == 536870912,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x20000000; immval:-0x7
+TEST_CI_OP( c.addiw, x10, 0x1ffffff9, 0x20000000, -0x7, x1, 536, x3)
+
+inst_352:
+// rs1_val == 1073741824,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x40000000; immval:-0x11
+TEST_CI_OP( c.addiw, x10, 0x3fffffef, 0x40000000, -0x11, x1, 544, x3)
+
+inst_353:
+// rs1_val == 2147483648,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x80000000; immval:0x0
+TEST_CI_OP( c.addiw, x10, -0x80000000, 0x80000000, 0x0, x1, 552, x3)
+
+inst_354:
+// rs1_val == 4294967296,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x100000000; immval:-0x2
+TEST_CI_OP( c.addiw, x10, -0x2, 0x100000000, -0x2, x1, 560, x3)
+
+inst_355:
+// rs1_val == 8589934592,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x200000000; immval:-0x5
+TEST_CI_OP( c.addiw, x10, -0x5, 0x200000000, -0x5, x1, 568, x3)
+
+inst_356:
+// rs1_val == 17179869184,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x400000000; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x2, 0x400000000, 0x2, x1, 576, x3)
+
+inst_357:
+// rs1_val == 34359738368,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x800000000; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x3, 0x800000000, 0x3, x1, 584, x3)
+
+inst_358:
+// rs1_val == 68719476736,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x1000000000; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x4, 0x1000000000, 0x4, x1, 592, x3)
+
+inst_359:
+// rs1_val == 137438953472,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2000000000; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x4, 0x2000000000, 0x4, x1, 600, x3)
+
+inst_360:
+// rs1_val == 274877906944,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4000000000; immval:0xf
+TEST_CI_OP( c.addiw, x10, 0xf, 0x4000000000, 0xf, x1, 608, x3)
+
+inst_361:
+// rs1_val == 549755813888,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x8000000000; immval:0x10
+TEST_CI_OP( c.addiw, x10, 0x10, 0x8000000000, 0x10, x1, 616, x3)
+
+inst_362:
+// rs1_val == 1099511627776,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x10000000000; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x5, 0x10000000000, 0x5, x1, 624, x3)
+
+inst_363:
+// rs1_val == 2199023255552,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x20000000000; immval:0xf
+TEST_CI_OP( c.addiw, x10, 0xf, 0x20000000000, 0xf, x1, 632, x3)
+
+inst_364:
+// rs1_val == 4398046511104,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x40000000000; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x2, 0x40000000000, 0x2, x1, 640, x3)
+
+inst_365:
+// rs1_val == 8796093022208,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x80000000000; immval:-0x8
+TEST_CI_OP( c.addiw, x10, -0x8, 0x80000000000, -0x8, x1, 648, x3)
+
+inst_366:
+// rs1_val == 17592186044416,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x100000000000; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x5, 0x100000000000, 0x5, x1, 656, x3)
+
+inst_367:
+// rs1_val == 35184372088832,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x200000000000; immval:-0xa
+TEST_CI_OP( c.addiw, x10, -0xa, 0x200000000000, -0xa, x1, 664, x3)
+
+inst_368:
+// rs1_val == 70368744177664,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x400000000000; immval:0x10
+TEST_CI_OP( c.addiw, x10, 0x10, 0x400000000000, 0x10, x1, 672, x3)
+
+inst_369:
+// rs1_val == 140737488355328,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x800000000000; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x5, 0x800000000000, 0x5, x1, 680, x3)
+
+inst_370:
+// rs1_val == 281474976710656,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x1000000000000; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x6, 0x1000000000000, 0x6, x1, 688, x3)
+
+inst_371:
+// rs1_val == 562949953421312,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2000000000000; immval:-0x7
+TEST_CI_OP( c.addiw, x10, -0x7, 0x2000000000000, -0x7, x1, 696, x3)
+
+inst_372:
+// rs1_val == 2251799813685248,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x8000000000000; immval:0xb
+TEST_CI_OP( c.addiw, x10, 0xb, 0x8000000000000, 0xb, x1, 704, x3)
+
+inst_373:
+// rs1_val == 4503599627370496,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x10000000000000; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x4, 0x10000000000000, 0x4, x1, 712, x3)
+
+inst_374:
+// rs1_val == 9007199254740992,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x20000000000000; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x7, 0x20000000000000, 0x7, x1, 720, x3)
+
+inst_375:
+// rs1_val == 18014398509481984,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x40000000000000; immval:0x1f
+TEST_CI_OP( c.addiw, x10, 0x1f, 0x40000000000000, 0x1f, x1, 728, x3)
+
+inst_376:
+// rs1_val == 36028797018963968,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x80000000000000; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x4, 0x80000000000000, 0x4, x1, 736, x3)
+
+inst_377:
+// rs1_val == 72057594037927936,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x100000000000000; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x5, 0x100000000000000, 0x5, x1, 744, x3)
+
+inst_378:
+// rs1_val == 288230376151711744,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x400000000000000; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x2, 0x400000000000000, 0x2, x1, 752, x3)
+
+inst_379:
+// rs1_val == 576460752303423488,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x800000000000000; immval:0x15
+TEST_CI_OP( c.addiw, x10, 0x15, 0x800000000000000, 0x15, x1, 760, x3)
+
+inst_380:
+// rs1_val == 1152921504606846976,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x1000000000000000; immval:-0x20
+TEST_CI_OP( c.addiw, x10, -0x20, 0x1000000000000000, -0x20, x1, 768, x3)
+
+inst_381:
+// rs1_val == 2305843009213693952,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x2000000000000000; immval:-0xa
+TEST_CI_OP( c.addiw, x10, -0xa, 0x2000000000000000, -0xa, x1, 776, x3)
+
+inst_382:
+// rs1_val == 4611686018427387904,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:0x4000000000000000; immval:0x7
+TEST_CI_OP( c.addiw, x10, 0x7, 0x4000000000000000, 0x7, x1, 784, x3)
+
+inst_383:
+// rs1_val == -2,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x2; immval:-0x4
+TEST_CI_OP( c.addiw, x10, -0x6, -0x2, -0x4, x1, 792, x3)
+
+inst_384:
+// rs1_val == -3,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x3; immval:0x0
+TEST_CI_OP( c.addiw, x10, -0x3, -0x3, 0x0, x1, 800, x3)
+
+inst_385:
+// rs1_val == -5,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x5; immval:0x4
+TEST_CI_OP( c.addiw, x10, -0x1, -0x5, 0x4, x1, 808, x3)
+
+inst_386:
+// rs1_val == -17,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x11; immval:0x1
+TEST_CI_OP( c.addiw, x10, -0x10, -0x11, 0x1, x1, 816, x3)
+
+inst_387:
+// rs1_val == -33,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x21; immval:-0x2
+TEST_CI_OP( c.addiw, x10, -0x23, -0x21, -0x2, x1, 824, x3)
+
+inst_388:
+// rs1_val == -65,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x41; immval:0x4
+TEST_CI_OP( c.addiw, x10, -0x3d, -0x41, 0x4, x1, 832, x3)
+
+inst_389:
+// rs1_val == -129,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x81; immval:0x2
+TEST_CI_OP( c.addiw, x10, -0x7f, -0x81, 0x2, x1, 840, x3)
+
+inst_390:
+// rs1_val == -257,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x101; immval:0xf
+TEST_CI_OP( c.addiw, x10, -0xf2, -0x101, 0xf, x1, 848, x3)
+
+inst_391:
+// rs1_val == -1025,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x401; immval:-0x16
+TEST_CI_OP( c.addiw, x10, -0x417, -0x401, -0x16, x1, 856, x3)
+
+inst_392:
+// rs1_val == -2049,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x801; immval:0x2
+TEST_CI_OP( c.addiw, x10, -0x7ff, -0x801, 0x2, x1, 864, x3)
+
+inst_393:
+// rs1_val == -8193,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x2001; immval:0x1f
+TEST_CI_OP( c.addiw, x10, -0x1fe2, -0x2001, 0x1f, x1, 872, x3)
+
+inst_394:
+// rs1_val == -16385,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x4001; immval:0x4
+TEST_CI_OP( c.addiw, x10, -0x3ffd, -0x4001, 0x4, x1, 880, x3)
+
+inst_395:
+// rs1_val == -32769,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x8001; immval:0x0
+TEST_CI_OP( c.addiw, x10, -0x8001, -0x8001, 0x0, x1, 888, x3)
+
+inst_396:
+// rs1_val == -65537,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x10001; immval:0x4
+TEST_CI_OP( c.addiw, x10, -0xfffd, -0x10001, 0x4, x1, 896, x3)
+
+inst_397:
+// rs1_val == -131073,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x20001; immval:0x5
+TEST_CI_OP( c.addiw, x10, -0x1fffc, -0x20001, 0x5, x1, 904, x3)
+
+inst_398:
+// rs1_val == -262145,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x40001; immval:0xa
+TEST_CI_OP( c.addiw, x10, -0x3fff7, -0x40001, 0xa, x1, 912, x3)
+
+inst_399:
+// rs1_val == -524289,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x80001; immval:0x1f
+TEST_CI_OP( c.addiw, x10, -0x7ffe2, -0x80001, 0x1f, x1, 920, x3)
+
+inst_400:
+// rs1_val == -2097153,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x200001; immval:-0x2
+TEST_CI_OP( c.addiw, x10, -0x200003, -0x200001, -0x2, x1, 928, x3)
+
+inst_401:
+// rs1_val == -4194305,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x400001; immval:0x0
+TEST_CI_OP( c.addiw, x10, -0x400001, -0x400001, 0x0, x1, 936, x3)
+
+inst_402:
+// rs1_val == -16777217,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x1000001; immval:0xb
+TEST_CI_OP( c.addiw, x10, -0xfffff6, -0x1000001, 0xb, x1, 944, x3)
+
+inst_403:
+// rs1_val == -33554433,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x2000001; immval:-0x7
+TEST_CI_OP( c.addiw, x10, -0x2000008, -0x2000001, -0x7, x1, 952, x3)
+
+inst_404:
+// rs1_val == -67108865,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x4000001; immval:0x4
+TEST_CI_OP( c.addiw, x10, -0x3fffffd, -0x4000001, 0x4, x1, 960, x3)
+
+inst_405:
+// rs1_val == -134217729,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x8000001; immval:0x1
+TEST_CI_OP( c.addiw, x10, -0x8000000, -0x8000001, 0x1, x1, 968, x3)
+
+inst_406:
+// rs1_val == -268435457,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x10000001; immval:0x5
+TEST_CI_OP( c.addiw, x10, -0xffffffc, -0x10000001, 0x5, x1, 976, x3)
+
+inst_407:
+// rs1_val == -1125899906842625,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x4000000000001; immval:0x1
+TEST_CI_OP( c.addiw, x10, 0x0, -0x4000000000001, 0x1, x1, 984, x3)
+
+inst_408:
+// rs1_val == -2251799813685249,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x8000000000001; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x5, -0x8000000000001, 0x6, x1, 992, x3)
+
+inst_409:
+// rs1_val == -4503599627370497,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x10000000000001; immval:-0x4
+TEST_CI_OP( c.addiw, x10, -0x5, -0x10000000000001, -0x4, x1, 1000, x3)
+
+inst_410:
+// rs1_val == -9007199254740993,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x20000000000001; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x2, -0x20000000000001, 0x3, x1, 1008, x3)
+
+inst_411:
+// rs1_val == -18014398509481985,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x40000000000001; immval:0x0
+TEST_CI_OP( c.addiw, x10, -0x1, -0x40000000000001, 0x0, x1, 1016, x3)
+
+inst_412:
+// rs1_val == -36028797018963969,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x80000000000001; immval:0x0
+TEST_CI_OP( c.addiw, x10, -0x1, -0x80000000000001, 0x0, x1, 1024, x3)
+
+inst_413:
+// rs1_val == -72057594037927937,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x100000000000001; immval:0x9
+TEST_CI_OP( c.addiw, x10, 0x8, -0x100000000000001, 0x9, x1, 1032, x3)
+
+inst_414:
+// rs1_val == -144115188075855873,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x200000000000001; immval:0x6
+TEST_CI_OP( c.addiw, x10, 0x5, -0x200000000000001, 0x6, x1, 1040, x3)
+
+inst_415:
+// rs1_val == -288230376151711745,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x400000000000001; immval:0x0
+TEST_CI_OP( c.addiw, x10, -0x1, -0x400000000000001, 0x0, x1, 1048, x3)
+
+inst_416:
+// rs1_val == -576460752303423489,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x800000000000001; immval:0xa
+TEST_CI_OP( c.addiw, x10, 0x9, -0x800000000000001, 0xa, x1, 1056, x3)
+
+inst_417:
+// rs1_val == -1152921504606846977,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x1000000000000001; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x3, -0x1000000000000001, 0x4, x1, 1064, x3)
+
+inst_418:
+// rs1_val == -2305843009213693953,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x2000000000000001; immval:-0x2
+TEST_CI_OP( c.addiw, x10, -0x3, -0x2000000000000001, -0x2, x1, 1072, x3)
+
+inst_419:
+// rs1_val == -4611686018427387905,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x4000000000000001; immval:-0x7
+TEST_CI_OP( c.addiw, x10, -0x8, -0x4000000000000001, -0x7, x1, 1080, x3)
+
+inst_420:
+// rs1_val == -536870913,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x20000001; immval:0x2
+TEST_CI_OP( c.addiw, x10, -0x1fffffff, -0x20000001, 0x2, x1, 1088, x3)
+
+inst_421:
+// rs1_val == -2147483649,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x80000001; immval:0x9
+TEST_CI_OP( c.addiw, x10, -0x7ffffff8, -0x80000001, 0x9, x1, 1096, x3)
+
+inst_422:
+// rs1_val == -4294967297,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x100000001; immval:0x10
+TEST_CI_OP( c.addiw, x10, 0xf, -0x100000001, 0x10, x1, 1104, x3)
+
+inst_423:
+// rs1_val == -8589934593,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x200000001; immval:0x1f
+TEST_CI_OP( c.addiw, x10, 0x1e, -0x200000001, 0x1f, x1, 1112, x3)
+
+inst_424:
+// rs1_val == -17179869185,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x400000001; immval:-0x9
+TEST_CI_OP( c.addiw, x10, -0xa, -0x400000001, -0x9, x1, 1120, x3)
+
+inst_425:
+// rs1_val == -34359738369,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x800000001; immval:-0x8
+TEST_CI_OP( c.addiw, x10, -0x9, -0x800000001, -0x8, x1, 1128, x3)
+
+inst_426:
+// rs1_val == -137438953473,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x2000000001; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x3, -0x2000000001, 0x4, x1, 1136, x3)
+
+inst_427:
+// rs1_val == -274877906945,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x4000000001; immval:0x15
+TEST_CI_OP( c.addiw, x10, 0x14, -0x4000000001, 0x15, x1, 1144, x3)
+
+inst_428:
+// rs1_val == -549755813889,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x8000000001; immval:0x4
+TEST_CI_OP( c.addiw, x10, 0x3, -0x8000000001, 0x4, x1, 1152, x3)
+
+inst_429:
+// rs1_val == -1099511627777,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x10000000001; immval:0x5
+TEST_CI_OP( c.addiw, x10, 0x4, -0x10000000001, 0x5, x1, 1160, x3)
+
+inst_430:
+// rs1_val == -2199023255553,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x20000000001; immval:-0xa
+TEST_CI_OP( c.addiw, x10, -0xb, -0x20000000001, -0xa, x1, 1168, x3)
+
+inst_431:
+// rs1_val == -4398046511105,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x40000000001; immval:0x3
+TEST_CI_OP( c.addiw, x10, 0x2, -0x40000000001, 0x3, x1, 1176, x3)
+
+inst_432:
+// rs1_val == -8796093022209,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x80000000001; immval:0x15
+TEST_CI_OP( c.addiw, x10, 0x14, -0x80000000001, 0x15, x1, 1184, x3)
+
+inst_433:
+// rs1_val == -17592186044417,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x100000000001; immval:0x2
+TEST_CI_OP( c.addiw, x10, 0x1, -0x100000000001, 0x2, x1, 1192, x3)
+
+inst_434:
+// rs1_val == -70368744177665,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x400000000001; immval:-0x1
+TEST_CI_OP( c.addiw, x10, -0x2, -0x400000000001, -0x1, x1, 1200, x3)
+
+inst_435:
+// rs1_val == -140737488355329,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x800000000001; immval:-0x20
+TEST_CI_OP( c.addiw, x10, -0x21, -0x800000000001, -0x20, x1, 1208, x3)
+
+inst_436:
+// rs1_val == -281474976710657,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x1000000000001; immval:-0x2
+TEST_CI_OP( c.addiw, x10, -0x3, -0x1000000000001, -0x2, x1, 1216, x3)
+
+inst_437:
+// rs1_val == -562949953421313,
+// opcode:c.addiw; op1:x10; dest:x10 op1val:-0x2000000000001; immval:0x1f
+TEST_CI_OP( c.addiw, x10, 0x1e, -0x2000000000001, 0x1f, x1, 1224, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 28*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 154*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/caddw-01.S b/riscof/suite/rv64i_m/C/caddw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..f1f44b36b89df6fff2ba74f40e54ff3d767990b3
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/caddw-01.S
@@ -0,0 +1,3469 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 05:22:37 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.addw instruction of the RISC-V C extension for the caddw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*C.*);def TEST_CASE_1=True;",caddw)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x10, rs2==x15, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, rs2_val < 0, rs1_val == -4611686018427387905
+// opcode: c.addw; op1:x10; op2:x15; op1val:-0x4000000000000001; op2val:-0x8000000000000000
+TEST_CR_OP( c.addw, x10, x15, -0x1, -0x4000000000000001, -0x8000000000000000, x1, 0, x2)
+
+inst_1:
+// rs1 == rs2, rs1==x9, rs2==x9, rs2_val == 0,
+// opcode: c.addw; op1:x9; op2:x9; op1val:-0xa; op2val:-0xa
+TEST_CR_OP( c.addw, x9, x9, -0x14, -0xa, -0xa, x1, 8, x2)
+
+inst_2:
+// rs1==x15, rs2==x13, rs2_val == (2**(xlen-1)-1), rs2_val > 0, rs1_val == -2147483649, rs2_val == 9223372036854775807
+// opcode: c.addw; op1:x15; op2:x13; op1val:-0x80000001; op2val:0x7fffffffffffffff
+TEST_CR_OP( c.addw, x15, x13, 0x7ffffffe, -0x80000001, 0x7fffffffffffffff, x1, 16, x2)
+
+inst_3:
+// rs1==x8, rs2==x10, rs2_val == 1, rs1_val == -2049
+// opcode: c.addw; op1:x8; op2:x10; op1val:-0x801; op2val:0x1
+TEST_CR_OP( c.addw, x8, x10, -0x800, -0x801, 0x1, x1, 24, x2)
+
+inst_4:
+// rs1==x13, rs2==x12, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808, rs2_val == -3
+// opcode: c.addw; op1:x13; op2:x12; op1val:-0x8000000000000000; op2val:-0x3
+TEST_CR_OP( c.addw, x13, x12, -0x3, -0x8000000000000000, -0x3, x1, 32, x2)
+
+inst_5:
+// rs1==x12, rs2==x14, rs1_val == 0, rs2_val == 256
+// opcode: c.addw; op1:x12; op2:x14; op1val:0x0; op2val:0x100
+TEST_CR_OP( c.addw, x12, x14, 0x100, 0x0, 0x100, x1, 40, x2)
+
+inst_6:
+// rs1==x14, rs2==x8, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, rs2_val == 18014398509481984
+// opcode: c.addw; op1:x14; op2:x8; op1val:0x7fffffffffffffff; op2val:0x40000000000000
+TEST_CR_OP( c.addw, x14, x8, -0x1, 0x7fffffffffffffff, 0x40000000000000, x1, 48, x2)
+
+inst_7:
+// rs1==x11, rs1_val == 1, rs2_val == -8589934593
+// opcode: c.addw; op1:x11; op2:x10; op1val:0x1; op2val:-0x200000001
+TEST_CR_OP( c.addw, x11, x10, 0x0, 0x1, -0x200000001, x1, 56, x2)
+
+inst_8:
+// rs2==x11, rs2_val == 2, rs1_val == -140737488355329
+// opcode: c.addw; op1:x13; op2:x11; op1val:-0x800000000001; op2val:0x2
+TEST_CR_OP( c.addw, x13, x11, 0x1, -0x800000000001, 0x2, x1, 64, x2)
+
+inst_9:
+// rs2_val == 4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x800000000001; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x3, -0x800000000001, 0x4, x1, 72, x2)
+
+inst_10:
+// rs2_val == 8, rs1_val == 1073741824
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x40000000; op2val:0x8
+TEST_CR_OP( c.addw, x10, x11, 0x40000008, 0x40000000, 0x8, x1, 80, x2)
+
+inst_11:
+// rs2_val == 16,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x10
+TEST_CR_OP( c.addw, x10, x11, 0x66666677, 0x6666666666666667, 0x10, x1, 88, x2)
+
+inst_12:
+// rs2_val == 32, rs1_val == 8589934592
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x200000000; op2val:0x20
+TEST_CR_OP( c.addw, x10, x11, 0x20, 0x200000000, 0x20, x1, 96, x2)
+
+inst_13:
+// rs2_val == 64, rs1_val == -2199023255553
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x20000000001; op2val:0x40
+TEST_CR_OP( c.addw, x10, x11, 0x3f, -0x20000000001, 0x40, x1, 104, x2)
+
+inst_14:
+// rs2_val == 128,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x80
+TEST_CR_OP( c.addw, x10, x11, 0x333333b2, 0x3333333333333332, 0x80, x1, 112, x2)
+
+inst_15:
+// rs2_val == 512, rs1_val == -1048577
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x100001; op2val:0x200
+TEST_CR_OP( c.addw, x10, x11, -0xffe01, -0x100001, 0x200, x1, 120, x2)
+
+inst_16:
+// rs2_val == 1024,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x400
+TEST_CR_OP( c.addw, x10, x11, 0x400, 0x0, 0x400, x1, 128, x2)
+
+inst_17:
+// rs2_val == 2048, rs1_val == 33554432
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2000000; op2val:0x800
+TEST_CR_OP( c.addw, x10, x11, 0x2000800, 0x2000000, 0x800, x1, 136, x2)
+
+inst_18:
+// rs2_val == 4096, rs1_val == 4
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x1000
+TEST_CR_OP( c.addw, x10, x11, 0x1004, 0x4, 0x1000, x1, 144, x2)
+
+inst_19:
+// rs2_val == 8192, rs1_val == -8193
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x2001; op2val:0x2000
+TEST_CR_OP( c.addw, x10, x11, -0x1, -0x2001, 0x2000, x1, 152, x2)
+
+inst_20:
+// rs2_val == 16384,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x4000
+TEST_CR_OP( c.addw, x10, x11, 0x4005, 0x5, 0x4000, x1, 160, x2)
+
+inst_21:
+// rs2_val == 32768,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x8000000000000000; op2val:0x8000
+TEST_CR_OP( c.addw, x10, x11, 0x8000, -0x8000000000000000, 0x8000, x1, 168, x2)
+
+inst_22:
+// rs2_val == 65536, rs1_val == -35184372088833
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x200000000001; op2val:0x10000
+TEST_CR_OP( c.addw, x10, x11, 0xffff, -0x200000000001, 0x10000, x1, 176, x2)
+
+inst_23:
+// rs2_val == 131072,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x20000
+TEST_CR_OP( c.addw, x10, x11, 0x4afd0ccd, -0xb504f333, 0x20000, x1, 184, x2)
+
+inst_24:
+// rs2_val == 262144,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x40000
+TEST_CR_OP( c.addw, x10, x11, 0x40003, 0x3, 0x40000, x1, 192, x2)
+
+inst_25:
+// rs2_val == 524288,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x80000
+TEST_CR_OP( c.addw, x10, x11, 0x80000, 0x0, 0x80000, x1, 200, x2)
+
+inst_26:
+// rs2_val == 1048576, rs1_val == 274877906944
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4000000000; op2val:0x100000
+TEST_CR_OP( c.addw, x10, x11, 0x100000, 0x4000000000, 0x100000, x1, 208, x2)
+
+inst_27:
+// rs2_val == 2097152,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x200000000; op2val:0x200000
+TEST_CR_OP( c.addw, x10, x11, 0x200000, 0x200000000, 0x200000, x1, 216, x2)
+
+inst_28:
+// rs2_val == 4194304, rs1_val == -137438953473
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x2000000001; op2val:0x400000
+TEST_CR_OP( c.addw, x10, x11, 0x3fffff, -0x2000000001, 0x400000, x1, 224, x2)
+
+inst_29:
+// rs2_val == 8388608, rs1_val == 17179869184
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x400000000; op2val:0x800000
+TEST_CR_OP( c.addw, x10, x11, 0x800000, 0x400000000, 0x800000, x1, 232, x2)
+
+inst_30:
+// rs2_val == 16777216,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x7; op2val:0x1000000
+TEST_CR_OP( c.addw, x10, x11, 0xfffff9, -0x7, 0x1000000, x1, 240, x2)
+
+inst_31:
+// rs2_val == 33554432,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x6; op2val:0x2000000
+TEST_CR_OP( c.addw, x10, x11, 0x1fffffa, -0x6, 0x2000000, x1, 248, x2)
+
+inst_32:
+// rs2_val == 67108864, rs1_val == 67108864
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4000000; op2val:0x4000000
+TEST_CR_OP( c.addw, x10, x11, 0x8000000, 0x4000000, 0x4000000, x1, 256, x2)
+
+inst_33:
+// rs2_val == 134217728,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x4; op2val:0x8000000
+TEST_CR_OP( c.addw, x10, x11, 0x7fffffc, -0x4, 0x8000000, x1, 264, x2)
+
+inst_34:
+// rs2_val == 268435456, rs1_val == 16777216
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x1000000; op2val:0x10000000
+TEST_CR_OP( c.addw, x10, x11, 0x11000000, 0x1000000, 0x10000000, x1, 272, x2)
+
+inst_35:
+// rs2_val == 536870912, rs1_val == 6148914691236517205
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x20000000
+TEST_CR_OP( c.addw, x10, x11, 0x75555555, 0x5555555555555555, 0x20000000, x1, 280, x2)
+
+inst_36:
+// rs2_val == 1073741824,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x40000000
+TEST_CR_OP( c.addw, x10, x11, 0x40000006, 0x6, 0x40000000, x1, 288, x2)
+
+inst_37:
+// rs2_val == 2147483648, rs1_val == -36028797018963969
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x80000000000001; op2val:0x80000000
+TEST_CR_OP( c.addw, x10, x11, 0x7fffffff, -0x80000000000001, 0x80000000, x1, 296, x2)
+
+inst_38:
+// rs2_val == 4294967296,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x1000000; op2val:0x100000000
+TEST_CR_OP( c.addw, x10, x11, 0x1000000, 0x1000000, 0x100000000, x1, 304, x2)
+
+inst_39:
+// rs2_val == 8589934592, rs1_val == -65537
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x10001; op2val:0x200000000
+TEST_CR_OP( c.addw, x10, x11, -0x10001, -0x10001, 0x200000000, x1, 312, x2)
+
+inst_40:
+// rs2_val == 17179869184,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x400000000
+TEST_CR_OP( c.addw, x10, x11, 0x0, 0x0, 0x400000000, x1, 320, x2)
+
+inst_41:
+// rs2_val == 34359738368, rs1_val == -33554433
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x2000001; op2val:0x800000000
+TEST_CR_OP( c.addw, x10, x11, -0x2000001, -0x2000001, 0x800000000, x1, 328, x2)
+
+inst_42:
+// rs2_val == 68719476736,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x1000000000
+TEST_CR_OP( c.addw, x10, x11, 0x4, 0x4, 0x1000000000, x1, 336, x2)
+
+inst_43:
+// rs2_val == 137438953472,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x8; op2val:0x2000000000
+TEST_CR_OP( c.addw, x10, x11, -0x8, -0x8, 0x2000000000, x1, 344, x2)
+
+inst_44:
+// rs2_val == 274877906944,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x4000000000
+TEST_CR_OP( c.addw, x10, x11, 0x5, 0x5, 0x4000000000, x1, 352, x2)
+
+inst_45:
+// rs2_val == 549755813888,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x8; op2val:0x8000000000
+TEST_CR_OP( c.addw, x10, x11, -0x8, -0x8, 0x8000000000, x1, 360, x2)
+
+inst_46:
+// rs2_val == 1099511627776, rs1_val == -4097
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x1001; op2val:0x10000000000
+TEST_CR_OP( c.addw, x10, x11, -0x1001, -0x1001, 0x10000000000, x1, 368, x2)
+
+inst_47:
+// rs2_val == 2199023255552, rs1_val == -288230376151711745
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x400000000000001; op2val:0x20000000000
+TEST_CR_OP( c.addw, x10, x11, -0x1, -0x400000000000001, 0x20000000000, x1, 376, x2)
+
+inst_48:
+// rs2_val == 4398046511104,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x40000000000
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cce, -0xb504f332, 0x40000000000, x1, 384, x2)
+
+inst_49:
+// rs2_val == 8796093022208,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x400000000000001; op2val:0x80000000000
+TEST_CR_OP( c.addw, x10, x11, -0x1, -0x400000000000001, 0x80000000000, x1, 392, x2)
+
+inst_50:
+// rs2_val == 17592186044416, rs1_val == -562949953421313
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x2000000000001; op2val:0x100000000000
+TEST_CR_OP( c.addw, x10, x11, -0x1, -0x2000000000001, 0x100000000000, x1, 400, x2)
+
+inst_51:
+// rs2_val == 35184372088832, rs1_val == -70368744177665
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x400000000001; op2val:0x200000000000
+TEST_CR_OP( c.addw, x10, x11, -0x1, -0x400000000001, 0x200000000000, x1, 408, x2)
+
+inst_52:
+// rs2_val == 70368744177664,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x400000000000
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cce, -0xb504f332, 0x400000000000, x1, 416, x2)
+
+inst_53:
+// rs2_val == 140737488355328,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x80000001; op2val:0x800000000000
+TEST_CR_OP( c.addw, x10, x11, 0x7fffffff, -0x80000001, 0x800000000000, x1, 424, x2)
+
+inst_54:
+// rs2_val == 281474976710656,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xa; op2val:0x1000000000000
+TEST_CR_OP( c.addw, x10, x11, -0xa, -0xa, 0x1000000000000, x1, 432, x2)
+
+inst_55:
+// rs2_val == 562949953421312,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x80000000000001; op2val:0x2000000000000
+TEST_CR_OP( c.addw, x10, x11, -0x1, -0x80000000000001, 0x2000000000000, x1, 440, x2)
+
+inst_56:
+// rs2_val == 1125899906842624, rs1_val == -4398046511105
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x40000000001; op2val:0x4000000000000
+TEST_CR_OP( c.addw, x10, x11, -0x1, -0x40000000001, 0x4000000000000, x1, 448, x2)
+
+inst_57:
+// rs2_val == 2251799813685248,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x10001; op2val:0x8000000000000
+TEST_CR_OP( c.addw, x10, x11, -0x10001, -0x10001, 0x8000000000000, x1, 456, x2)
+
+inst_58:
+// rs2_val == 4503599627370496, rs1_val == 2305843009213693952
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2000000000000000; op2val:0x10000000000000
+TEST_CR_OP( c.addw, x10, x11, 0x0, 0x2000000000000000, 0x10000000000000, x1, 464, x2)
+
+inst_59:
+// rs2_val == 9007199254740992, rs1_val == -6148914691236517206
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x20000000000000
+TEST_CR_OP( c.addw, x10, x11, -0x55555556, -0x5555555555555556, 0x20000000000000, x1, 472, x2)
+
+inst_60:
+// rs2_val == 36028797018963968,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x80000000000000
+TEST_CR_OP( c.addw, x10, x11, 0x66666665, 0x6666666666666665, 0x80000000000000, x1, 480, x2)
+
+inst_61:
+// rs2_val == 72057594037927936,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x100000000000000
+TEST_CR_OP( c.addw, x10, x11, 0x55555555, 0x5555555555555555, 0x100000000000000, x1, 488, x2)
+
+inst_62:
+// rs2_val == 144115188075855872, rs1_val == 536870912
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x20000000; op2val:0x200000000000000
+TEST_CR_OP( c.addw, x10, x11, 0x20000000, 0x20000000, 0x200000000000000, x1, 496, x2)
+
+inst_63:
+// rs2_val == 288230376151711744,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x400000000000000
+TEST_CR_OP( c.addw, x10, x11, -0x55555556, -0x5555555555555556, 0x400000000000000, x1, 504, x2)
+
+inst_64:
+// rs2_val == 576460752303423488, rs1_val == 1152921504606846976
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x1000000000000000; op2val:0x800000000000000
+TEST_CR_OP( c.addw, x10, x11, 0x0, 0x1000000000000000, 0x800000000000000, x1, 512, x2)
+
+inst_65:
+// rs2_val == 1152921504606846976,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x2000001; op2val:0x1000000000000000
+TEST_CR_OP( c.addw, x10, x11, -0x2000001, -0x2000001, 0x1000000000000000, x1, 520, x2)
+
+inst_66:
+// rs2_val == 2305843009213693952,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x2000000000000000
+TEST_CR_OP( c.addw, x10, x11, 0x4, 0x4, 0x2000000000000000, x1, 528, x2)
+
+inst_67:
+// rs2_val == 4611686018427387904, rs1_val == 281474976710656
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x1000000000000; op2val:0x4000000000000000
+TEST_CR_OP( c.addw, x10, x11, 0x0, 0x1000000000000, 0x4000000000000000, x1, 536, x2)
+
+inst_68:
+// rs2_val == -2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:-0x2
+TEST_CR_OP( c.addw, x10, x11, 0x3, 0x5, -0x2, x1, 544, x2)
+
+inst_69:
+// rs2_val == -5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cc9, -0xb504f332, -0x5, x1, 552, x2)
+
+inst_70:
+// rs2_val == -9, rs1_val == 2048
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x800; op2val:-0x9
+TEST_CR_OP( c.addw, x10, x11, 0x7f7, 0x800, -0x9, x1, 560, x2)
+
+inst_71:
+// rs2_val == -17, rs1_val == -8589934593
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x200000001; op2val:-0x11
+TEST_CR_OP( c.addw, x10, x11, -0x12, -0x200000001, -0x11, x1, 568, x2)
+
+inst_72:
+// rs2_val == -33,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x200000000; op2val:-0x21
+TEST_CR_OP( c.addw, x10, x11, -0x21, 0x200000000, -0x21, x1, 576, x2)
+
+inst_73:
+// rs2_val == -65, rs1_val == -3
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x3; op2val:-0x41
+TEST_CR_OP( c.addw, x10, x11, -0x44, -0x3, -0x41, x1, 584, x2)
+
+inst_74:
+// rs2_val == -129,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x3; op2val:-0x81
+TEST_CR_OP( c.addw, x10, x11, -0x84, -0x3, -0x81, x1, 592, x2)
+
+inst_75:
+// rs2_val == -257, rs1_val == 268435456
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x10000000; op2val:-0x101
+TEST_CR_OP( c.addw, x10, x11, 0xffffeff, 0x10000000, -0x101, x1, 600, x2)
+
+inst_76:
+// rs2_val == -513, rs1_val == -257
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x101; op2val:-0x201
+TEST_CR_OP( c.addw, x10, x11, -0x302, -0x101, -0x201, x1, 608, x2)
+
+inst_77:
+// rs2_val == -1025, rs1_val == 562949953421312
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2000000000000; op2val:-0x401
+TEST_CR_OP( c.addw, x10, x11, -0x401, 0x2000000000000, -0x401, x1, 616, x2)
+
+inst_78:
+// rs2_val == -2049, rs1_val == -8388609
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x800001; op2val:-0x801
+TEST_CR_OP( c.addw, x10, x11, -0x800802, -0x800001, -0x801, x1, 624, x2)
+
+inst_79:
+// rs2_val == -4097, rs1_val == 256
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x100; op2val:-0x1001
+TEST_CR_OP( c.addw, x10, x11, -0xf01, 0x100, -0x1001, x1, 632, x2)
+
+inst_80:
+// rs2_val == -8193,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x8000000000000000; op2val:-0x2001
+TEST_CR_OP( c.addw, x10, x11, -0x2001, -0x8000000000000000, -0x2001, x1, 640, x2)
+
+inst_81:
+// rs2_val == -16385, rs1_val == -268435457
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x10000001; op2val:-0x4001
+TEST_CR_OP( c.addw, x10, x11, -0x10004002, -0x10000001, -0x4001, x1, 648, x2)
+
+inst_82:
+// rs2_val == -32769, rs1_val == -281474976710657
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x1000000000001; op2val:-0x8001
+TEST_CR_OP( c.addw, x10, x11, -0x8002, -0x1000000000001, -0x8001, x1, 656, x2)
+
+inst_83:
+// rs2_val == -65537,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x10001
+TEST_CR_OP( c.addw, x10, x11, 0x66656665, 0x6666666666666666, -0x10001, x1, 664, x2)
+
+inst_84:
+// rs2_val == -131073, rs1_val == -16385
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x4001; op2val:-0x20001
+TEST_CR_OP( c.addw, x10, x11, -0x24002, -0x4001, -0x20001, x1, 672, x2)
+
+inst_85:
+// rs2_val == -262145,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x9; op2val:-0x40001
+TEST_CR_OP( c.addw, x10, x11, -0x3fff8, 0x9, -0x40001, x1, 680, x2)
+
+inst_86:
+// rs2_val == -524289, rs1_val == -262145
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x40001; op2val:-0x80001
+TEST_CR_OP( c.addw, x10, x11, -0xc0002, -0x40001, -0x80001, x1, 688, x2)
+
+inst_87:
+// rs2_val == -1048577, rs1_val == 68719476736
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x1000000000; op2val:-0x100001
+TEST_CR_OP( c.addw, x10, x11, -0x100001, 0x1000000000, -0x100001, x1, 696, x2)
+
+inst_88:
+// rs2_val == -2097153, rs1_val == 576460752303423488
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x800000000000000; op2val:-0x200001
+TEST_CR_OP( c.addw, x10, x11, -0x200001, 0x800000000000000, -0x200001, x1, 704, x2)
+
+inst_89:
+// rs2_val == -4194305, rs1_val == 16384
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4000; op2val:-0x400001
+TEST_CR_OP( c.addw, x10, x11, -0x3fc001, 0x4000, -0x400001, x1, 712, x2)
+
+inst_90:
+// rs2_val == -8388609,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x800001
+TEST_CR_OP( c.addw, x10, x11, -0x55d55556, -0x5555555555555555, -0x800001, x1, 720, x2)
+
+inst_91:
+// rs2_val == -16777217, rs1_val == 32
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x20; op2val:-0x1000001
+TEST_CR_OP( c.addw, x10, x11, -0xffffe1, 0x20, -0x1000001, x1, 728, x2)
+
+inst_92:
+// rs2_val == -33554433,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x8; op2val:-0x2000001
+TEST_CR_OP( c.addw, x10, x11, -0x2000009, -0x8, -0x2000001, x1, 736, x2)
+
+inst_93:
+// rs2_val == -67108865,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4000000; op2val:-0x4000001
+TEST_CR_OP( c.addw, x10, x11, -0x1, 0x4000000, -0x4000001, x1, 744, x2)
+
+inst_94:
+// rs2_val == -134217729, rs1_val == 2251799813685248
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x8000000000000; op2val:-0x8000001
+TEST_CR_OP( c.addw, x10, x11, -0x8000001, 0x8000000000000, -0x8000001, x1, 752, x2)
+
+inst_95:
+// rs2_val == -268435457, rs1_val == 2
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:-0x10000001
+TEST_CR_OP( c.addw, x10, x11, -0xfffffff, 0x2, -0x10000001, x1, 760, x2)
+
+inst_96:
+// rs2_val == -536870913, rs1_val == 1099511627776
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x10000000000; op2val:-0x20000001
+TEST_CR_OP( c.addw, x10, x11, -0x20000001, 0x10000000000, -0x20000001, x1, 768, x2)
+
+inst_97:
+// rs2_val == -1073741825,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x3; op2val:-0x40000001
+TEST_CR_OP( c.addw, x10, x11, -0x40000004, -0x3, -0x40000001, x1, 776, x2)
+
+inst_98:
+// rs2_val == -2147483649,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x100; op2val:-0x80000001
+TEST_CR_OP( c.addw, x10, x11, -0x7fffff01, 0x100, -0x80000001, x1, 784, x2)
+
+inst_99:
+// rs2_val == -4294967297, rs1_val == 4096
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x1000; op2val:-0x100000001
+TEST_CR_OP( c.addw, x10, x11, 0xfff, 0x1000, -0x100000001, x1, 792, x2)
+
+inst_100:
+// rs2_val == -17179869185, rs1_val == -1025
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x401; op2val:-0x400000001
+TEST_CR_OP( c.addw, x10, x11, -0x402, -0x401, -0x400000001, x1, 800, x2)
+
+inst_101:
+// rs2_val == -34359738369,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x4; op2val:-0x800000001
+TEST_CR_OP( c.addw, x10, x11, -0x5, -0x4, -0x800000001, x1, 808, x2)
+
+inst_102:
+// rs2_val == -68719476737,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x10001; op2val:-0x1000000001
+TEST_CR_OP( c.addw, x10, x11, -0x10002, -0x10001, -0x1000000001, x1, 816, x2)
+
+inst_103:
+// rs2_val == -137438953473,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4000000000; op2val:-0x2000000001
+TEST_CR_OP( c.addw, x10, x11, -0x1, 0x4000000000, -0x2000000001, x1, 824, x2)
+
+inst_104:
+// rs2_val == -274877906945, rs1_val == 17592186044416
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x100000000000; op2val:-0x4000000001
+TEST_CR_OP( c.addw, x10, x11, -0x1, 0x100000000000, -0x4000000001, x1, 832, x2)
+
+inst_105:
+// rs2_val == -549755813889, rs1_val == -576460752303423489
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x800000000000001; op2val:-0x8000000001
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x800000000000001, -0x8000000001, x1, 840, x2)
+
+inst_106:
+// rs2_val == -1099511627777,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x2000000001; op2val:-0x10000000001
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x2000000001, -0x10000000001, x1, 848, x2)
+
+inst_107:
+// rs2_val == -2199023255553, rs1_val == -32769
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x8001; op2val:-0x20000000001
+TEST_CR_OP( c.addw, x10, x11, -0x8002, -0x8001, -0x20000000001, x1, 856, x2)
+
+inst_108:
+// rs2_val == -4398046511105, rs1_val == -524289
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x80001; op2val:-0x40000000001
+TEST_CR_OP( c.addw, x10, x11, -0x80002, -0x80001, -0x40000000001, x1, 864, x2)
+
+inst_109:
+// rs2_val == -8796093022209, rs1_val == -2251799813685249
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x8000000000001; op2val:-0x80000000001
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x8000000000001, -0x80000000001, x1, 872, x2)
+
+inst_110:
+// rs2_val == -17592186044417, rs1_val == 549755813888
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x8000000000; op2val:-0x100000000001
+TEST_CR_OP( c.addw, x10, x11, -0x1, 0x8000000000, -0x100000000001, x1, 880, x2)
+
+inst_111:
+// rs2_val == -35184372088833,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x40000000001; op2val:-0x200000000001
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x40000000001, -0x200000000001, x1, 888, x2)
+
+inst_112:
+// rs2_val == -70368744177665, rs1_val == 18014398509481984
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x40000000000000; op2val:-0x400000000001
+TEST_CR_OP( c.addw, x10, x11, -0x1, 0x40000000000000, -0x400000000001, x1, 896, x2)
+
+inst_113:
+// rs2_val == -140737488355329, rs1_val == -1125899906842625
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x4000000000001; op2val:-0x800000000001
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x4000000000001, -0x800000000001, x1, 904, x2)
+
+inst_114:
+// rs2_val == -281474976710657, rs1_val == 131072
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x20000; op2val:-0x1000000000001
+TEST_CR_OP( c.addw, x10, x11, 0x1ffff, 0x20000, -0x1000000000001, x1, 912, x2)
+
+inst_115:
+// rs2_val == -562949953421313,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x2000000000001
+TEST_CR_OP( c.addw, x10, x11, 0x55555555, 0x5555555555555556, -0x2000000000001, x1, 920, x2)
+
+inst_116:
+// rs2_val == -1125899906842625,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x80001; op2val:-0x4000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x80002, -0x80001, -0x4000000000001, x1, 928, x2)
+
+inst_117:
+// rs2_val == -2251799813685249, rs1_val == -34359738369
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x800000001; op2val:-0x8000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x800000001, -0x8000000000001, x1, 936, x2)
+
+inst_118:
+// rs2_val == -4503599627370497,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:-0x10000000000001
+TEST_CR_OP( c.addw, x10, x11, 0x4, 0x5, -0x10000000000001, x1, 944, x2)
+
+inst_119:
+// rs2_val == -9007199254740993,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4000; op2val:-0x20000000000001
+TEST_CR_OP( c.addw, x10, x11, 0x3fff, 0x4000, -0x20000000000001, x1, 952, x2)
+
+inst_120:
+// rs2_val == -18014398509481985,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xa; op2val:-0x40000000000001
+TEST_CR_OP( c.addw, x10, x11, -0xb, -0xa, -0x40000000000001, x1, 960, x2)
+
+inst_121:
+// rs2_val == -36028797018963969,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x2000000001; op2val:-0x80000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x2000000001, -0x80000000000001, x1, 968, x2)
+
+inst_122:
+// rs2_val == -72057594037927937,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x801; op2val:-0x100000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x802, -0x801, -0x100000000000001, x1, 976, x2)
+
+inst_123:
+// rs2_val == -144115188075855873,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x8000000000; op2val:-0x200000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x1, 0x8000000000, -0x200000000000001, x1, 984, x2)
+
+inst_124:
+// rs2_val == -288230376151711745, rs1_val == -17179869185
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x400000001; op2val:-0x400000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x400000001, -0x400000000000001, x1, 992, x2)
+
+inst_125:
+// rs2_val == -576460752303423489,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x400000001; op2val:-0x800000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x400000001, -0x800000000000001, x1, 1000, x2)
+
+inst_126:
+// rs2_val == -1152921504606846977, rs1_val == -33
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x21; op2val:-0x1000000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x22, -0x21, -0x1000000000000001, x1, 1008, x2)
+
+inst_127:
+// rs2_val == -2305843009213693953,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x1; op2val:-0x2000000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x1, -0x2000000000000001, x1, 1016, x2)
+
+inst_128:
+// rs2_val == -4611686018427387905,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x4000000000000001
+TEST_CR_OP( c.addw, x10, x11, 0x33333331, 0x3333333333333332, -0x4000000000000001, x1, 1024, x2)
+
+inst_129:
+// rs2_val == 6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x401; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x55555154, -0x401, 0x5555555555555555, x1, 1032, x2)
+
+inst_130:
+// rs2_val == -6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x100; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x55555456, 0x100, -0x5555555555555556, x1, 1040, x2)
+
+inst_131:
+// rs1_val == 8,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x8; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x8, 0x8, 0x0, x1, 1048, x2)
+
+inst_132:
+// rs1_val == 16,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x10; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cde, 0x10, -0xb504f332, x1, 1056, x2)
+
+inst_133:
+// rs1_val == 64,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x40; op2val:0x400000000000000
+TEST_CR_OP( c.addw, x10, x11, 0x40, 0x40, 0x400000000000000, x1, 1064, x2)
+
+inst_134:
+// rs1_val == 128,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x80; op2val:-0x3
+TEST_CR_OP( c.addw, x10, x11, 0x7d, 0x80, -0x3, x1, 1072, x2)
+
+inst_135:
+// rs1_val == 512,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x200; op2val:-0x101
+TEST_CR_OP( c.addw, x10, x11, 0xff, 0x200, -0x101, x1, 1080, x2)
+
+inst_136:
+// rs1_val == 1024,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x400; op2val:0x2000000000000000
+TEST_CR_OP( c.addw, x10, x11, 0x400, 0x400, 0x2000000000000000, x1, 1088, x2)
+
+inst_137:
+// rs1_val == 8192,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2000; op2val:-0x400000000000001
+TEST_CR_OP( c.addw, x10, x11, 0x1fff, 0x2000, -0x400000000000001, x1, 1096, x2)
+
+inst_138:
+// rs1_val == 32768,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x8000; op2val:-0x1001
+TEST_CR_OP( c.addw, x10, x11, 0x6fff, 0x8000, -0x1001, x1, 1104, x2)
+
+inst_139:
+// rs1_val == 65536,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x10000; op2val:0x7fffffffffffffff
+TEST_CR_OP( c.addw, x10, x11, 0xffff, 0x10000, 0x7fffffffffffffff, x1, 1112, x2)
+
+inst_140:
+// rs1_val == 262144,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x40000; op2val:-0x1000000000001
+TEST_CR_OP( c.addw, x10, x11, 0x3ffff, 0x40000, -0x1000000000001, x1, 1120, x2)
+
+inst_141:
+// rs1_val == 524288,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x80000; op2val:-0x100000000000001
+TEST_CR_OP( c.addw, x10, x11, 0x7ffff, 0x80000, -0x100000000000001, x1, 1128, x2)
+
+inst_142:
+// rs1_val == 1048576,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x100000; op2val:0x1000000000000
+TEST_CR_OP( c.addw, x10, x11, 0x100000, 0x100000, 0x1000000000000, x1, 1136, x2)
+
+inst_143:
+// rs1_val == 2097152,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x200000; op2val:0x800000000
+TEST_CR_OP( c.addw, x10, x11, 0x200000, 0x200000, 0x800000000, x1, 1144, x2)
+
+inst_144:
+// rs1_val == 4194304,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x400000; op2val:-0x2000000001
+TEST_CR_OP( c.addw, x10, x11, 0x3fffff, 0x400000, -0x2000000001, x1, 1152, x2)
+
+inst_145:
+// rs1_val == 8388608,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x800000; op2val:-0x9
+TEST_CR_OP( c.addw, x10, x11, 0x7ffff7, 0x800000, -0x9, x1, 1160, x2)
+
+inst_146:
+// rs1_val == 134217728,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x8000000; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x4d555555, 0x8000000, -0x5555555555555555, x1, 1168, x2)
+
+inst_147:
+// rs1_val == 2147483648,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x80000000; op2val:0x2000000000000000
+TEST_CR_OP( c.addw, x10, x11, -0x80000000, 0x80000000, 0x2000000000000000, x1, 1176, x2)
+
+inst_148:
+// rs1_val == 4294967296,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x100000000; op2val:-0x200000001
+TEST_CR_OP( c.addw, x10, x11, -0x1, 0x100000000, -0x200000001, x1, 1184, x2)
+
+inst_149:
+// rs1_val == 34359738368,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x800000000; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, 0x33333332, 0x800000000, 0x3333333333333332, x1, 1192, x2)
+
+inst_150:
+// rs1_val == 137438953472,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2000000000; op2val:-0x200001
+TEST_CR_OP( c.addw, x10, x11, -0x200001, 0x2000000000, -0x200001, x1, 1200, x2)
+
+inst_151:
+// rs1_val == 2199023255552,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x20000000000; op2val:0x1000000
+TEST_CR_OP( c.addw, x10, x11, 0x1000000, 0x20000000000, 0x1000000, x1, 1208, x2)
+
+inst_152:
+// rs1_val == 4398046511104,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x40000000000; op2val:-0x4001
+TEST_CR_OP( c.addw, x10, x11, -0x4001, 0x40000000000, -0x4001, x1, 1216, x2)
+
+inst_153:
+// rs1_val == 8796093022208,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x80000000000; op2val:-0x10000001
+TEST_CR_OP( c.addw, x10, x11, -0x10000001, 0x80000000000, -0x10000001, x1, 1224, x2)
+
+inst_154:
+// rs1_val == 35184372088832,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x200000000000; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x55555556, 0x200000000000, 0x5555555555555556, x1, 1232, x2)
+
+inst_155:
+// rs1_val == 70368744177664,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x400000000000; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, 0x66666666, 0x400000000000, 0x6666666666666666, x1, 1240, x2)
+
+inst_156:
+// rs1_val == 140737488355328,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x800000000000; op2val:0x20000000000
+TEST_CR_OP( c.addw, x10, x11, 0x0, 0x800000000000, 0x20000000000, x1, 1248, x2)
+
+inst_157:
+// rs1_val == 1125899906842624,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4000000000000; op2val:-0x40000001
+TEST_CR_OP( c.addw, x10, x11, -0x40000001, 0x4000000000000, -0x40000001, x1, 1256, x2)
+
+inst_158:
+// rs1_val == 4503599627370496,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x10000000000000; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0ccd, 0x10000000000000, -0xb504f333, x1, 1264, x2)
+
+inst_159:
+// rs1_val == 9007199254740992,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x20000000000000; op2val:-0x5
+TEST_CR_OP( c.addw, x10, x11, -0x5, 0x20000000000000, -0x5, x1, 1272, x2)
+
+inst_160:
+// rs1_val == 36028797018963968,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x80000000000000; op2val:0x9
+TEST_CR_OP( c.addw, x10, x11, 0x9, 0x80000000000000, 0x9, x1, 1280, x2)
+
+inst_161:
+// rs1_val == 72057594037927936,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x100000000000000; op2val:0x1000000
+TEST_CR_OP( c.addw, x10, x11, 0x1000000, 0x100000000000000, 0x1000000, x1, 1288, x2)
+
+inst_162:
+// rs1_val == 144115188075855872,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x200000000000000; op2val:-0x2001
+TEST_CR_OP( c.addw, x10, x11, -0x2001, 0x200000000000000, -0x2001, x1, 1296, x2)
+
+inst_163:
+// rs1_val == 288230376151711744,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x400000000000000; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x55555556, 0x400000000000000, -0x5555555555555556, x1, 1304, x2)
+
+inst_164:
+// rs1_val == 4611686018427387904,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4000000000000000; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x55555555, 0x4000000000000000, -0x5555555555555555, x1, 1312, x2)
+
+inst_165:
+// rs1_val == -2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x2; op2val:-0x1
+TEST_CR_OP( c.addw, x10, x11, -0x3, -0x2, -0x1, x1, 1320, x2)
+
+inst_166:
+// rs1_val == -5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, -0x3, -0x5, 0x2, x1, 1328, x2)
+
+inst_167:
+// rs1_val == -9,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x9; op2val:-0x4
+TEST_CR_OP( c.addw, x10, x11, -0xd, -0x9, -0x4, x1, 1336, x2)
+
+inst_168:
+// rs1_val == -17,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x11; op2val:-0x4001
+TEST_CR_OP( c.addw, x10, x11, -0x4012, -0x11, -0x4001, x1, 1344, x2)
+
+inst_169:
+// rs1_val == -65,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x41; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x55555515, -0x41, 0x5555555555555556, x1, 1352, x2)
+
+inst_170:
+// rs1_val == -129,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x81; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, -0x7b, -0x81, 0x6, x1, 1360, x2)
+
+inst_171:
+// rs1_val == -513,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x201; op2val:0x100000000000000
+TEST_CR_OP( c.addw, x10, x11, -0x201, -0x201, 0x100000000000000, x1, 1368, x2)
+
+inst_172:
+// rs1_val == -131073,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x20001; op2val:0x10000000000
+TEST_CR_OP( c.addw, x10, x11, -0x20001, -0x20001, 0x10000000000, x1, 1376, x2)
+
+inst_173:
+// rs1_val == -2097153,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x200001; op2val:-0x100000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x200002, -0x200001, -0x100000000000001, x1, 1384, x2)
+
+inst_174:
+// rs1_val == -4194305,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x400001; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x55155554, -0x400001, 0x5555555555555555, x1, 1392, x2)
+
+inst_175:
+// rs1_val == -16777217,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x1000001; op2val:0x20000
+TEST_CR_OP( c.addw, x10, x11, -0xfe0001, -0x1000001, 0x20000, x1, 1400, x2)
+
+inst_176:
+// rs1_val == -67108865,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x4000001; op2val:-0x4000000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x4000002, -0x4000001, -0x4000000000000001, x1, 1408, x2)
+
+inst_177:
+// rs1_val == -134217729,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x8000001; op2val:0x20000000000
+TEST_CR_OP( c.addw, x10, x11, -0x8000001, -0x8000001, 0x20000000000, x1, 1416, x2)
+
+inst_178:
+// rs1_val == -536870913,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x20000001; op2val:-0x2001
+TEST_CR_OP( c.addw, x10, x11, -0x20002002, -0x20000001, -0x2001, x1, 1424, x2)
+
+inst_179:
+// rs1_val == -1073741825,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x40000001; op2val:-0x80000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x40000002, -0x40000001, -0x80000000000001, x1, 1432, x2)
+
+inst_180:
+// rs1_val == -4294967297,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x100000001; op2val:-0x11
+TEST_CR_OP( c.addw, x10, x11, -0x12, -0x100000001, -0x11, x1, 1440, x2)
+
+inst_181:
+// rs1_val == -68719476737,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x1000000001; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, 0x66666664, -0x1000000001, 0x6666666666666665, x1, 1448, x2)
+
+inst_182:
+// rs1_val == -274877906945,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x4000000001; op2val:0x4000000000
+TEST_CR_OP( c.addw, x10, x11, -0x1, -0x4000000001, 0x4000000000, x1, 1456, x2)
+
+inst_183:
+// rs1_val == -549755813889,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x8000000001; op2val:0x80000000000
+TEST_CR_OP( c.addw, x10, x11, -0x1, -0x8000000001, 0x80000000000, x1, 1464, x2)
+
+inst_184:
+// rs1_val == -1099511627777,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x10000000001; op2val:-0x8
+TEST_CR_OP( c.addw, x10, x11, -0x9, -0x10000000001, -0x8, x1, 1472, x2)
+
+inst_185:
+// rs1_val == -8796093022209,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x80000000001; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0ccf, -0x80000000001, 0xb504f332, x1, 1480, x2)
+
+inst_186:
+// rs1_val == -17592186044417,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x100000000001; op2val:-0x40000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x100000000001, -0x40000000000001, x1, 1488, x2)
+
+inst_187:
+// rs1_val == -4503599627370497,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x10000000000001; op2val:-0x2000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x10000000000001, -0x2000000000001, x1, 1496, x2)
+
+inst_188:
+// rs1_val == -9007199254740993,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x20000000000001; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, 0x66666666, -0x20000000000001, 0x6666666666666667, x1, 1504, x2)
+
+inst_189:
+// rs1_val == -18014398509481985,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x40000000000001; op2val:-0x10000001
+TEST_CR_OP( c.addw, x10, x11, -0x10000002, -0x40000000000001, -0x10000001, x1, 1512, x2)
+
+inst_190:
+// rs1_val == -72057594037927937,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x100000000000001; op2val:-0x6
+TEST_CR_OP( c.addw, x10, x11, -0x7, -0x100000000000001, -0x6, x1, 1520, x2)
+
+inst_191:
+// rs1_val == -144115188075855873,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x200000000000001; op2val:-0x400000000000001
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x200000000000001, -0x400000000000001, x1, 1528, x2)
+
+inst_192:
+// rs1_val == -1152921504606846977,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:-0x100001
+TEST_CR_OP( c.addw, x10, x11, -0x100002, -0x1000000000000001, -0x100001, x1, 1536, x2)
+
+inst_193:
+// rs1_val == -2305843009213693953,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x2000000000000001; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0ccc, -0x2000000000000001, -0xb504f333, x1, 1544, x2)
+
+inst_194:
+// rs1_val==3 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x6, 0x3, 0x3, x1, 1552, x2)
+
+inst_195:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x55555558, 0x3, 0x5555555555555555, x1, 1560, x2)
+
+inst_196:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x55555553, 0x3, -0x5555555555555556, x1, 1568, x2)
+
+inst_197:
+// rs1_val==3 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x8, 0x3, 0x5, x1, 1576, x2)
+
+inst_198:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, 0x33333336, 0x3, 0x3333333333333333, x1, 1584, x2)
+
+inst_199:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, 0x66666669, 0x3, 0x6666666666666666, x1, 1592, x2)
+
+inst_200:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd0, 0x3, -0xb504f333, x1, 1600, x2)
+
+inst_201:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cca, 0x3, 0xb504f333, x1, 1608, x2)
+
+inst_202:
+// rs1_val==3 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x5, 0x3, 0x2, x1, 1616, x2)
+
+inst_203:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, 0x55555557, 0x3, 0x5555555555555554, x1, 1624, x2)
+
+inst_204:
+// rs1_val==3 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x3, 0x3, 0x0, x1, 1632, x2)
+
+inst_205:
+// rs1_val==3 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x7, 0x3, 0x4, x1, 1640, x2)
+
+inst_206:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, 0x33333335, 0x3, 0x3333333333333332, x1, 1648, x2)
+
+inst_207:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, 0x66666668, 0x3, 0x6666666666666665, x1, 1656, x2)
+
+inst_208:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0ccb, 0x3, 0xb504f332, x1, 1664, x2)
+
+inst_209:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x55555559, 0x3, 0x5555555555555556, x1, 1672, x2)
+
+inst_210:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x55555552, 0x3, -0x5555555555555555, x1, 1680, x2)
+
+inst_211:
+// rs1_val==3 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x9, 0x3, 0x6, x1, 1688, x2)
+
+inst_212:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, 0x33333337, 0x3, 0x3333333333333334, x1, 1696, x2)
+
+inst_213:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, 0x6666666a, 0x3, 0x6666666666666667, x1, 1704, x2)
+
+inst_214:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd1, 0x3, -0xb504f332, x1, 1712, x2)
+
+inst_215:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc9, 0x3, 0xb504f334, x1, 1720, x2)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x55555558, 0x5555555555555555, 0x3, x1, 1728, x2)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x55555556, 0x5555555555555555, 0x5555555555555555, x1, 1736, x2)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x1, 0x5555555555555555, -0x5555555555555556, x1, 1744, x2)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x5555555a, 0x5555555555555555, 0x5, x1, 1752, x2)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, -0x77777778, 0x5555555555555555, 0x3333333333333333, x1, 1760, x2)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, -0x44444445, 0x5555555555555555, 0x6666666666666666, x1, 1768, x2)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x5faf9dde, 0x5555555555555555, -0xb504f333, x1, 1776, x2)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4888, 0x5555555555555555, 0xb504f333, x1, 1784, x2)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x55555557, 0x5555555555555555, 0x2, x1, 1792, x2)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, -0x55555557, 0x5555555555555555, 0x5555555555555554, x1, 1800, x2)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x55555555, 0x5555555555555555, 0x0, x1, 1808, x2)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x55555559, 0x5555555555555555, 0x4, x1, 1816, x2)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, -0x77777779, 0x5555555555555555, 0x3333333333333332, x1, 1824, x2)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, -0x44444446, 0x5555555555555555, 0x6666666666666665, x1, 1832, x2)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4887, 0x5555555555555555, 0xb504f332, x1, 1840, x2)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x55555555, 0x5555555555555555, 0x5555555555555556, x1, 1848, x2)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x0, 0x5555555555555555, -0x5555555555555555, x1, 1856, x2)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x5555555b, 0x5555555555555555, 0x6, x1, 1864, x2)
+
+inst_234:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, -0x77777777, 0x5555555555555555, 0x3333333333333334, x1, 1872, x2)
+
+inst_235:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, -0x44444444, 0x5555555555555555, 0x6666666666666667, x1, 1880, x2)
+
+inst_236:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x5faf9ddd, 0x5555555555555555, -0xb504f332, x1, 1888, x2)
+
+inst_237:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4889, 0x5555555555555555, 0xb504f334, x1, 1896, x2)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, -0x55555553, -0x5555555555555556, 0x3, x1, 1904, x2)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x1, -0x5555555555555556, 0x5555555555555555, x1, 1912, x2)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x55555554, -0x5555555555555556, -0x5555555555555556, x1, 1920, x2)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, -0x55555551, -0x5555555555555556, 0x5, x1, 1928, x2)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, -0x22222223, -0x5555555555555556, 0x3333333333333333, x1, 1936, x2)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, 0x11111110, -0x5555555555555556, 0x6666666666666666, x1, 1944, x2)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0xa5a4889, -0x5555555555555556, -0xb504f333, x1, 1952, x2)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x5faf9ddd, -0x5555555555555556, 0xb504f333, x1, 1960, x2)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, -0x55555554, -0x5555555555555556, 0x2, x1, 1968, x2)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, -0x2, -0x5555555555555556, 0x5555555555555554, x1, 1976, x2)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, -0x55555556, -0x5555555555555556, 0x0, x1, 1984, x2)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, -0x55555552, -0x5555555555555556, 0x4, x1, 1992, x2)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, -0x22222224, -0x5555555555555556, 0x3333333333333332, x1, 2000, x2)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, 0x1111110f, -0x5555555555555556, 0x6666666666666665, x1, 2008, x2)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x5faf9ddc, -0x5555555555555556, 0xb504f332, x1, 2016, x2)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x0, -0x5555555555555556, 0x5555555555555556, x1, 2024, x2)
+
+inst_254:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x55555555, -0x5555555555555556, -0x5555555555555555, x1, 2032, x2)
+
+inst_255:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, -0x55555550, -0x5555555555555556, 0x6, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_256:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, -0x22222222, -0x5555555555555556, 0x3333333333333334, x1, 0, x2)
+
+inst_257:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, 0x11111111, -0x5555555555555556, 0x6666666666666667, x1, 8, x2)
+
+inst_258:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0xa5a4888, -0x5555555555555556, -0xb504f332, x1, 16, x2)
+
+inst_259:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, 0x5faf9dde, -0x5555555555555556, 0xb504f334, x1, 24, x2)
+
+inst_260:
+// rs1_val==5 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x8, 0x5, 0x3, x1, 32, x2)
+
+inst_261:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x5555555a, 0x5, 0x5555555555555555, x1, 40, x2)
+
+inst_262:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x55555551, 0x5, -0x5555555555555556, x1, 48, x2)
+
+inst_263:
+// rs1_val==5 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0xa, 0x5, 0x5, x1, 56, x2)
+
+inst_264:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, 0x33333338, 0x5, 0x3333333333333333, x1, 64, x2)
+
+inst_265:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, 0x6666666b, 0x5, 0x6666666666666666, x1, 72, x2)
+
+inst_266:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd2, 0x5, -0xb504f333, x1, 80, x2)
+
+inst_267:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc8, 0x5, 0xb504f333, x1, 88, x2)
+
+inst_268:
+// rs1_val==5 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x7, 0x5, 0x2, x1, 96, x2)
+
+inst_269:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, 0x55555559, 0x5, 0x5555555555555554, x1, 104, x2)
+
+inst_270:
+// rs1_val==5 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x5, 0x5, 0x0, x1, 112, x2)
+
+inst_271:
+// rs1_val==5 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x9, 0x5, 0x4, x1, 120, x2)
+
+inst_272:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, 0x33333337, 0x5, 0x3333333333333332, x1, 128, x2)
+
+inst_273:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, 0x6666666a, 0x5, 0x6666666666666665, x1, 136, x2)
+
+inst_274:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc9, 0x5, 0xb504f332, x1, 144, x2)
+
+inst_275:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x5555555b, 0x5, 0x5555555555555556, x1, 152, x2)
+
+inst_276:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x55555550, 0x5, -0x5555555555555555, x1, 160, x2)
+
+inst_277:
+// rs1_val==5 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0xb, 0x5, 0x6, x1, 168, x2)
+
+inst_278:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, 0x33333339, 0x5, 0x3333333333333334, x1, 176, x2)
+
+inst_279:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, 0x6666666c, 0x5, 0x6666666666666667, x1, 184, x2)
+
+inst_280:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd3, 0x5, -0xb504f332, x1, 192, x2)
+
+inst_281:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc7, 0x5, 0xb504f334, x1, 200, x2)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x33333336, 0x3333333333333333, 0x3, x1, 208, x2)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x77777778, 0x3333333333333333, 0x5555555555555555, x1, 216, x2)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x22222223, 0x3333333333333333, -0x5555555555555556, x1, 224, x2)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x33333338, 0x3333333333333333, 0x5, x1, 232, x2)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, 0x66666666, 0x3333333333333333, 0x3333333333333333, x1, 240, x2)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, -0x66666667, 0x3333333333333333, 0x6666666666666666, x1, 248, x2)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x7e2e4000, 0x3333333333333333, -0xb504f333, x1, 256, x2)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d99a, 0x3333333333333333, 0xb504f333, x1, 264, x2)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x33333335, 0x3333333333333333, 0x2, x1, 272, x2)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, -0x77777779, 0x3333333333333333, 0x5555555555555554, x1, 280, x2)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x33333333, 0x3333333333333333, 0x0, x1, 288, x2)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x33333337, 0x3333333333333333, 0x4, x1, 296, x2)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, 0x66666665, 0x3333333333333333, 0x3333333333333332, x1, 304, x2)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, -0x66666668, 0x3333333333333333, 0x6666666666666665, x1, 312, x2)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d99b, 0x3333333333333333, 0xb504f332, x1, 320, x2)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x77777777, 0x3333333333333333, 0x5555555555555556, x1, 328, x2)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x22222222, 0x3333333333333333, -0x5555555555555555, x1, 336, x2)
+
+inst_299:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x33333339, 0x3333333333333333, 0x6, x1, 344, x2)
+
+inst_300:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, 0x66666667, 0x3333333333333333, 0x3333333333333334, x1, 352, x2)
+
+inst_301:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, -0x66666666, 0x3333333333333333, 0x6666666666666667, x1, 360, x2)
+
+inst_302:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x7e2e4001, 0x3333333333333333, -0xb504f332, x1, 368, x2)
+
+inst_303:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d999, 0x3333333333333333, 0xb504f334, x1, 376, x2)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x66666669, 0x6666666666666666, 0x3, x1, 384, x2)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x44444445, 0x6666666666666666, 0x5555555555555555, x1, 392, x2)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x11111110, 0x6666666666666666, -0x5555555555555556, x1, 400, x2)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x6666666b, 0x6666666666666666, 0x5, x1, 408, x2)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, -0x66666667, 0x6666666666666666, 0x3333333333333333, x1, 416, x2)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, -0x33333334, 0x6666666666666666, 0x6666666666666666, x1, 424, x2)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x4e9e8ccd, 0x6666666666666666, -0xb504f333, x1, 432, x2)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b5999, 0x6666666666666666, 0xb504f333, x1, 440, x2)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x66666668, 0x6666666666666666, 0x2, x1, 448, x2)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, -0x44444446, 0x6666666666666666, 0x5555555555555554, x1, 456, x2)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x66666666, 0x6666666666666666, 0x0, x1, 464, x2)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x6666666a, 0x6666666666666666, 0x4, x1, 472, x2)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, -0x66666668, 0x6666666666666666, 0x3333333333333332, x1, 480, x2)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, -0x33333335, 0x6666666666666666, 0x6666666666666665, x1, 488, x2)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b5998, 0x6666666666666666, 0xb504f332, x1, 496, x2)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x44444444, 0x6666666666666666, 0x5555555555555556, x1, 504, x2)
+
+inst_320:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x11111111, 0x6666666666666666, -0x5555555555555555, x1, 512, x2)
+
+inst_321:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x6666666c, 0x6666666666666666, 0x6, x1, 520, x2)
+
+inst_322:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, -0x66666666, 0x6666666666666666, 0x3333333333333334, x1, 528, x2)
+
+inst_323:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, -0x33333333, 0x6666666666666666, 0x6666666666666667, x1, 536, x2)
+
+inst_324:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x4e9e8ccc, 0x6666666666666666, -0xb504f332, x1, 544, x2)
+
+inst_325:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b599a, 0x6666666666666666, 0xb504f334, x1, 552, x2)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd0, -0xb504f333, 0x3, x1, 560, x2)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x5faf9dde, -0xb504f333, 0x5555555555555555, x1, 568, x2)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0xa5a4889, -0xb504f333, -0x5555555555555556, x1, 576, x2)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd2, -0xb504f333, 0x5, x1, 584, x2)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, 0x7e2e4000, -0xb504f333, 0x3333333333333333, x1, 592, x2)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, -0x4e9e8ccd, -0xb504f333, 0x6666666666666666, x1, 600, x2)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x6a09e666, -0xb504f333, -0xb504f333, x1, 608, x2)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x0, -0xb504f333, 0xb504f333, x1, 616, x2)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0ccf, -0xb504f333, 0x2, x1, 624, x2)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, -0x5faf9ddf, -0xb504f333, 0x5555555555555554, x1, 632, x2)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0ccd, -0xb504f333, 0x0, x1, 640, x2)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd1, -0xb504f333, 0x4, x1, 648, x2)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, 0x7e2e3fff, -0xb504f333, 0x3333333333333332, x1, 656, x2)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, -0x4e9e8cce, -0xb504f333, 0x6666666666666665, x1, 664, x2)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x1, -0xb504f333, 0xb504f332, x1, 672, x2)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x5faf9ddd, -0xb504f333, 0x5555555555555556, x1, 680, x2)
+
+inst_342:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0xa5a4888, -0xb504f333, -0x5555555555555555, x1, 688, x2)
+
+inst_343:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd3, -0xb504f333, 0x6, x1, 696, x2)
+
+inst_344:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, 0x7e2e4001, -0xb504f333, 0x3333333333333334, x1, 704, x2)
+
+inst_345:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, -0x4e9e8ccc, -0xb504f333, 0x6666666666666667, x1, 712, x2)
+
+inst_346:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x6a09e665, -0xb504f333, -0xb504f332, x1, 720, x2)
+
+inst_347:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, 0x1, -0xb504f333, 0xb504f334, x1, 728, x2)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cca, 0xb504f333, 0x3, x1, 736, x2)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4888, 0xb504f333, 0x5555555555555555, x1, 744, x2)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x5faf9ddd, 0xb504f333, -0x5555555555555556, x1, 752, x2)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc8, 0xb504f333, 0x5, x1, 760, x2)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d99a, 0xb504f333, 0x3333333333333333, x1, 768, x2)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b5999, 0xb504f333, 0x6666666666666666, x1, 776, x2)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x0, 0xb504f333, -0xb504f333, x1, 784, x2)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x6a09e666, 0xb504f333, 0xb504f333, x1, 792, x2)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0ccb, 0xb504f333, 0x2, x1, 800, x2)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4887, 0xb504f333, 0x5555555555555554, x1, 808, x2)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0ccd, 0xb504f333, 0x0, x1, 816, x2)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc9, 0xb504f333, 0x4, x1, 824, x2)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d99b, 0xb504f333, 0x3333333333333332, x1, 832, x2)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b5998, 0xb504f333, 0x6666666666666665, x1, 840, x2)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x6a09e665, 0xb504f333, 0xb504f332, x1, 848, x2)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4889, 0xb504f333, 0x5555555555555556, x1, 856, x2)
+
+inst_364:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x5faf9dde, 0xb504f333, -0x5555555555555555, x1, 864, x2)
+
+inst_365:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc7, 0xb504f333, 0x6, x1, 872, x2)
+
+inst_366:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d999, 0xb504f333, 0x3333333333333334, x1, 880, x2)
+
+inst_367:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b599a, 0xb504f333, 0x6666666666666667, x1, 888, x2)
+
+inst_368:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x1, 0xb504f333, -0xb504f332, x1, 896, x2)
+
+inst_369:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, 0x6a09e667, 0xb504f333, 0xb504f334, x1, 904, x2)
+
+inst_370:
+// rs1_val==2 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x5, 0x2, 0x3, x1, 912, x2)
+
+inst_371:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x55555557, 0x2, 0x5555555555555555, x1, 920, x2)
+
+inst_372:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x55555554, 0x2, -0x5555555555555556, x1, 928, x2)
+
+inst_373:
+// rs1_val==2 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x7, 0x2, 0x5, x1, 936, x2)
+
+inst_374:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, 0x33333335, 0x2, 0x3333333333333333, x1, 944, x2)
+
+inst_375:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, 0x66666668, 0x2, 0x6666666666666666, x1, 952, x2)
+
+inst_376:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0ccf, 0x2, -0xb504f333, x1, 960, x2)
+
+inst_377:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0ccb, 0x2, 0xb504f333, x1, 968, x2)
+
+inst_378:
+// rs1_val==2 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x4, 0x2, 0x2, x1, 976, x2)
+
+inst_379:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, 0x55555556, 0x2, 0x5555555555555554, x1, 984, x2)
+
+inst_380:
+// rs1_val==2 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x2, 0x2, 0x0, x1, 992, x2)
+
+inst_381:
+// rs1_val==2 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x6, 0x2, 0x4, x1, 1000, x2)
+
+inst_382:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, 0x33333334, 0x2, 0x3333333333333332, x1, 1008, x2)
+
+inst_383:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, 0x66666667, 0x2, 0x6666666666666665, x1, 1016, x2)
+
+inst_384:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0ccc, 0x2, 0xb504f332, x1, 1024, x2)
+
+inst_385:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x55555558, 0x2, 0x5555555555555556, x1, 1032, x2)
+
+inst_386:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x55555553, 0x2, -0x5555555555555555, x1, 1040, x2)
+
+inst_387:
+// rs1_val==2 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x8, 0x2, 0x6, x1, 1048, x2)
+
+inst_388:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, 0x33333336, 0x2, 0x3333333333333334, x1, 1056, x2)
+
+inst_389:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, 0x66666669, 0x2, 0x6666666666666667, x1, 1064, x2)
+
+inst_390:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd0, 0x2, -0xb504f332, x1, 1072, x2)
+
+inst_391:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cca, 0x2, 0xb504f334, x1, 1080, x2)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x55555557, 0x5555555555555554, 0x3, x1, 1088, x2)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x55555557, 0x5555555555555554, 0x5555555555555555, x1, 1096, x2)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x2, 0x5555555555555554, -0x5555555555555556, x1, 1104, x2)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x55555559, 0x5555555555555554, 0x5, x1, 1112, x2)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, -0x77777779, 0x5555555555555554, 0x3333333333333333, x1, 1120, x2)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, -0x44444446, 0x5555555555555554, 0x6666666666666666, x1, 1128, x2)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x5faf9ddf, 0x5555555555555554, -0xb504f333, x1, 1136, x2)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4887, 0x5555555555555554, 0xb504f333, x1, 1144, x2)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x55555556, 0x5555555555555554, 0x2, x1, 1152, x2)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, -0x55555558, 0x5555555555555554, 0x5555555555555554, x1, 1160, x2)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x55555554, 0x5555555555555554, 0x0, x1, 1168, x2)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x55555558, 0x5555555555555554, 0x4, x1, 1176, x2)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, -0x7777777a, 0x5555555555555554, 0x3333333333333332, x1, 1184, x2)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, -0x44444447, 0x5555555555555554, 0x6666666666666665, x1, 1192, x2)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4886, 0x5555555555555554, 0xb504f332, x1, 1200, x2)
+
+inst_407:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x55555556, 0x5555555555555554, 0x5555555555555556, x1, 1208, x2)
+
+inst_408:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x1, 0x5555555555555554, -0x5555555555555555, x1, 1216, x2)
+
+inst_409:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x5555555a, 0x5555555555555554, 0x6, x1, 1224, x2)
+
+inst_410:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, -0x77777778, 0x5555555555555554, 0x3333333333333334, x1, 1232, x2)
+
+inst_411:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, -0x44444445, 0x5555555555555554, 0x6666666666666667, x1, 1240, x2)
+
+inst_412:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x5faf9dde, 0x5555555555555554, -0xb504f332, x1, 1248, x2)
+
+inst_413:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4888, 0x5555555555555554, 0xb504f334, x1, 1256, x2)
+
+inst_414:
+// rs1_val==0 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x3, 0x0, 0x3, x1, 1264, x2)
+
+inst_415:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x55555555, 0x0, 0x5555555555555555, x1, 1272, x2)
+
+inst_416:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x55555556, 0x0, -0x5555555555555556, x1, 1280, x2)
+
+inst_417:
+// rs1_val==0 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x5, 0x0, 0x5, x1, 1288, x2)
+
+inst_418:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, 0x33333333, 0x0, 0x3333333333333333, x1, 1296, x2)
+
+inst_419:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, 0x66666666, 0x0, 0x6666666666666666, x1, 1304, x2)
+
+inst_420:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0ccd, 0x0, -0xb504f333, x1, 1312, x2)
+
+inst_421:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0ccd, 0x0, 0xb504f333, x1, 1320, x2)
+
+inst_422:
+// rs1_val==0 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x2, 0x0, 0x2, x1, 1328, x2)
+
+inst_423:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x55555552, 0x4, -0x5555555555555556, x1, 1336, x2)
+
+inst_424:
+// rs1_val==4 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x9, 0x4, 0x5, x1, 1344, x2)
+
+inst_425:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, 0x33333337, 0x4, 0x3333333333333333, x1, 1352, x2)
+
+inst_426:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, 0x6666666a, 0x4, 0x6666666666666666, x1, 1360, x2)
+
+inst_427:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd1, 0x4, -0xb504f333, x1, 1368, x2)
+
+inst_428:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc9, 0x4, 0xb504f333, x1, 1376, x2)
+
+inst_429:
+// rs1_val==4 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x6, 0x4, 0x2, x1, 1384, x2)
+
+inst_430:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, 0x55555558, 0x4, 0x5555555555555554, x1, 1392, x2)
+
+inst_431:
+// rs1_val==4 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x4, 0x4, 0x0, x1, 1400, x2)
+
+inst_432:
+// rs1_val==4 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x8, 0x4, 0x4, x1, 1408, x2)
+
+inst_433:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, 0x33333336, 0x4, 0x3333333333333332, x1, 1416, x2)
+
+inst_434:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, 0x66666669, 0x4, 0x6666666666666665, x1, 1424, x2)
+
+inst_435:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cca, 0x4, 0xb504f332, x1, 1432, x2)
+
+inst_436:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x5555555a, 0x4, 0x5555555555555556, x1, 1440, x2)
+
+inst_437:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x55555551, 0x4, -0x5555555555555555, x1, 1448, x2)
+
+inst_438:
+// rs1_val==4 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0xa, 0x4, 0x6, x1, 1456, x2)
+
+inst_439:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, 0x33333338, 0x4, 0x3333333333333334, x1, 1464, x2)
+
+inst_440:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, 0x6666666b, 0x4, 0x6666666666666667, x1, 1472, x2)
+
+inst_441:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd2, 0x4, -0xb504f332, x1, 1480, x2)
+
+inst_442:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc8, 0x4, 0xb504f334, x1, 1488, x2)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x33333335, 0x3333333333333332, 0x3, x1, 1496, x2)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x77777779, 0x3333333333333332, 0x5555555555555555, x1, 1504, x2)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x22222224, 0x3333333333333332, -0x5555555555555556, x1, 1512, x2)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x33333337, 0x3333333333333332, 0x5, x1, 1520, x2)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, 0x66666665, 0x3333333333333332, 0x3333333333333333, x1, 1528, x2)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, -0x66666668, 0x3333333333333332, 0x6666666666666666, x1, 1536, x2)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x7e2e3fff, 0x3333333333333332, -0xb504f333, x1, 1544, x2)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d99b, 0x3333333333333332, 0xb504f333, x1, 1552, x2)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x33333334, 0x3333333333333332, 0x2, x1, 1560, x2)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, -0x7777777a, 0x3333333333333332, 0x5555555555555554, x1, 1568, x2)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x33333332, 0x3333333333333332, 0x0, x1, 1576, x2)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x33333336, 0x3333333333333332, 0x4, x1, 1584, x2)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, 0x66666664, 0x3333333333333332, 0x3333333333333332, x1, 1592, x2)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, -0x66666669, 0x3333333333333332, 0x6666666666666665, x1, 1600, x2)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d99c, 0x3333333333333332, 0xb504f332, x1, 1608, x2)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x77777778, 0x3333333333333332, 0x5555555555555556, x1, 1616, x2)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x22222223, 0x3333333333333332, -0x5555555555555555, x1, 1624, x2)
+
+inst_460:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x33333338, 0x3333333333333332, 0x6, x1, 1632, x2)
+
+inst_461:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, 0x66666666, 0x3333333333333332, 0x3333333333333334, x1, 1640, x2)
+
+inst_462:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, -0x66666667, 0x3333333333333332, 0x6666666666666667, x1, 1648, x2)
+
+inst_463:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x7e2e4000, 0x3333333333333332, -0xb504f332, x1, 1656, x2)
+
+inst_464:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d99a, 0x3333333333333332, 0xb504f334, x1, 1664, x2)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x66666668, 0x6666666666666665, 0x3, x1, 1672, x2)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x44444446, 0x6666666666666665, 0x5555555555555555, x1, 1680, x2)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x1111110f, 0x6666666666666665, -0x5555555555555556, x1, 1688, x2)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x6666666a, 0x6666666666666665, 0x5, x1, 1696, x2)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, -0x66666668, 0x6666666666666665, 0x3333333333333333, x1, 1704, x2)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, -0x33333335, 0x6666666666666665, 0x6666666666666666, x1, 1712, x2)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x4e9e8cce, 0x6666666666666665, -0xb504f333, x1, 1720, x2)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b5998, 0x6666666666666665, 0xb504f333, x1, 1728, x2)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x66666667, 0x6666666666666665, 0x2, x1, 1736, x2)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, -0x44444447, 0x6666666666666665, 0x5555555555555554, x1, 1744, x2)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x66666665, 0x6666666666666665, 0x0, x1, 1752, x2)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x66666669, 0x6666666666666665, 0x4, x1, 1760, x2)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, -0x66666669, 0x6666666666666665, 0x3333333333333332, x1, 1768, x2)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, -0x33333336, 0x6666666666666665, 0x6666666666666665, x1, 1776, x2)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b5997, 0x6666666666666665, 0xb504f332, x1, 1784, x2)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x44444445, 0x6666666666666665, 0x5555555555555556, x1, 1792, x2)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x11111110, 0x6666666666666665, -0x5555555555555555, x1, 1800, x2)
+
+inst_482:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x6666666b, 0x6666666666666665, 0x6, x1, 1808, x2)
+
+inst_483:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, -0x66666667, 0x6666666666666665, 0x3333333333333334, x1, 1816, x2)
+
+inst_484:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, -0x33333334, 0x6666666666666665, 0x6666666666666667, x1, 1824, x2)
+
+inst_485:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x4e9e8ccd, 0x6666666666666665, -0xb504f332, x1, 1832, x2)
+
+inst_486:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b5999, 0x6666666666666665, 0xb504f334, x1, 1840, x2)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0ccb, 0xb504f332, 0x3, x1, 1848, x2)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4887, 0xb504f332, 0x5555555555555555, x1, 1856, x2)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x5faf9ddc, 0xb504f332, -0x5555555555555556, x1, 1864, x2)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc9, 0xb504f332, 0x5, x1, 1872, x2)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d99b, 0xb504f332, 0x3333333333333333, x1, 1880, x2)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b5998, 0xb504f332, 0x6666666666666666, x1, 1888, x2)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x1, 0xb504f332, -0xb504f333, x1, 1896, x2)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x6a09e665, 0xb504f332, 0xb504f333, x1, 1904, x2)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0ccc, 0xb504f332, 0x2, x1, 1912, x2)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4886, 0xb504f332, 0x5555555555555554, x1, 1920, x2)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cce, 0xb504f332, 0x0, x1, 1928, x2)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cca, 0xb504f332, 0x4, x1, 1936, x2)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d99c, 0xb504f332, 0x3333333333333332, x1, 1944, x2)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b5997, 0xb504f332, 0x6666666666666665, x1, 1952, x2)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x6a09e664, 0xb504f332, 0xb504f332, x1, 1960, x2)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4888, 0xb504f332, 0x5555555555555556, x1, 1968, x2)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x5faf9ddd, 0xb504f332, -0x5555555555555555, x1, 1976, x2)
+
+inst_504:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc8, 0xb504f332, 0x6, x1, 1984, x2)
+
+inst_505:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d99a, 0xb504f332, 0x3333333333333334, x1, 1992, x2)
+
+inst_506:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b5999, 0xb504f332, 0x6666666666666667, x1, 2000, x2)
+
+inst_507:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x0, 0xb504f332, -0xb504f332, x1, 2008, x2)
+
+inst_508:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, 0x6a09e666, 0xb504f332, 0xb504f334, x1, 2016, x2)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x55555559, 0x5555555555555556, 0x3, x1, 2024, x2)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x55555555, 0x5555555555555556, 0x5555555555555555, x1, 2032, x2)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x0, 0x5555555555555556, -0x5555555555555556, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_3)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x5555555b, 0x5555555555555556, 0x5, x1, 0, x2)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, -0x77777777, 0x5555555555555556, 0x3333333333333333, x1, 8, x2)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, -0x44444444, 0x5555555555555556, 0x6666666666666666, x1, 16, x2)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x5faf9ddd, 0x5555555555555556, -0xb504f333, x1, 24, x2)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4889, 0x5555555555555556, 0xb504f333, x1, 32, x2)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x55555558, 0x5555555555555556, 0x2, x1, 40, x2)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, -0x55555556, 0x5555555555555556, 0x5555555555555554, x1, 48, x2)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x55555556, 0x5555555555555556, 0x0, x1, 56, x2)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x5555555a, 0x5555555555555556, 0x4, x1, 64, x2)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, -0x77777778, 0x5555555555555556, 0x3333333333333332, x1, 72, x2)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, -0x44444445, 0x5555555555555556, 0x6666666666666665, x1, 80, x2)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4888, 0x5555555555555556, 0xb504f332, x1, 88, x2)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x55555554, 0x5555555555555556, 0x5555555555555556, x1, 96, x2)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x1, 0x5555555555555556, -0x5555555555555555, x1, 104, x2)
+
+inst_526:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x5555555c, 0x5555555555555556, 0x6, x1, 112, x2)
+
+inst_527:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, -0x77777776, 0x5555555555555556, 0x3333333333333334, x1, 120, x2)
+
+inst_528:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, -0x44444443, 0x5555555555555556, 0x6666666666666667, x1, 128, x2)
+
+inst_529:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x5faf9ddc, 0x5555555555555556, -0xb504f332, x1, 136, x2)
+
+inst_530:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, 0xa5a488a, 0x5555555555555556, 0xb504f334, x1, 144, x2)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, -0x55555552, -0x5555555555555555, 0x3, x1, 152, x2)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x0, -0x5555555555555555, 0x5555555555555555, x1, 160, x2)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x55555555, -0x5555555555555555, -0x5555555555555556, x1, 168, x2)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, -0x55555550, -0x5555555555555555, 0x5, x1, 176, x2)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, -0x22222222, -0x5555555555555555, 0x3333333333333333, x1, 184, x2)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, 0x11111111, -0x5555555555555555, 0x6666666666666666, x1, 192, x2)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0xa5a4888, -0x5555555555555555, -0xb504f333, x1, 200, x2)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x5faf9dde, -0x5555555555555555, 0xb504f333, x1, 208, x2)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, -0x55555553, -0x5555555555555555, 0x2, x1, 216, x2)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, -0x1, -0x5555555555555555, 0x5555555555555554, x1, 224, x2)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, -0x55555555, -0x5555555555555555, 0x0, x1, 232, x2)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, -0x55555551, -0x5555555555555555, 0x4, x1, 240, x2)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, -0x22222223, -0x5555555555555555, 0x3333333333333332, x1, 248, x2)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, 0x11111110, -0x5555555555555555, 0x6666666666666665, x1, 256, x2)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x5faf9ddd, -0x5555555555555555, 0xb504f332, x1, 264, x2)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x1, -0x5555555555555555, 0x5555555555555556, x1, 272, x2)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x55555556, -0x5555555555555555, -0x5555555555555555, x1, 280, x2)
+
+inst_548:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, -0x5555554f, -0x5555555555555555, 0x6, x1, 288, x2)
+
+inst_549:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, -0x22222221, -0x5555555555555555, 0x3333333333333334, x1, 296, x2)
+
+inst_550:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, 0x11111112, -0x5555555555555555, 0x6666666666666667, x1, 304, x2)
+
+inst_551:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0xa5a4887, -0x5555555555555555, -0xb504f332, x1, 312, x2)
+
+inst_552:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, 0x5faf9ddf, -0x5555555555555555, 0xb504f334, x1, 320, x2)
+
+inst_553:
+// rs1_val==6 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x9, 0x6, 0x3, x1, 328, x2)
+
+inst_554:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x5555555b, 0x6, 0x5555555555555555, x1, 336, x2)
+
+inst_555:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x55555550, 0x6, -0x5555555555555556, x1, 344, x2)
+
+inst_556:
+// rs1_val==6 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0xb, 0x6, 0x5, x1, 352, x2)
+
+inst_557:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, 0x33333339, 0x6, 0x3333333333333333, x1, 360, x2)
+
+inst_558:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, 0x6666666c, 0x6, 0x6666666666666666, x1, 368, x2)
+
+inst_559:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd3, 0x6, -0xb504f333, x1, 376, x2)
+
+inst_560:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc7, 0x6, 0xb504f333, x1, 384, x2)
+
+inst_561:
+// rs1_val==6 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x8, 0x6, 0x2, x1, 392, x2)
+
+inst_562:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, 0x5555555a, 0x6, 0x5555555555555554, x1, 400, x2)
+
+inst_563:
+// rs1_val==6 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x6, 0x6, 0x0, x1, 408, x2)
+
+inst_564:
+// rs1_val==6 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0xa, 0x6, 0x4, x1, 416, x2)
+
+inst_565:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, 0x33333338, 0x6, 0x3333333333333332, x1, 424, x2)
+
+inst_566:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, 0x6666666b, 0x6, 0x6666666666666665, x1, 432, x2)
+
+inst_567:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc8, 0x6, 0xb504f332, x1, 440, x2)
+
+inst_568:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x5555555c, 0x6, 0x5555555555555556, x1, 448, x2)
+
+inst_569:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x5555554f, 0x6, -0x5555555555555555, x1, 456, x2)
+
+inst_570:
+// rs1_val==6 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0xc, 0x6, 0x6, x1, 464, x2)
+
+inst_571:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, 0x3333333a, 0x6, 0x3333333333333334, x1, 472, x2)
+
+inst_572:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, 0x6666666d, 0x6, 0x6666666666666667, x1, 480, x2)
+
+inst_573:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd4, 0x6, -0xb504f332, x1, 488, x2)
+
+inst_574:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc6, 0x6, 0xb504f334, x1, 496, x2)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x33333337, 0x3333333333333334, 0x3, x1, 504, x2)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x77777777, 0x3333333333333334, 0x5555555555555555, x1, 512, x2)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x22222222, 0x3333333333333334, -0x5555555555555556, x1, 520, x2)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x33333339, 0x3333333333333334, 0x5, x1, 528, x2)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, 0x66666667, 0x3333333333333334, 0x3333333333333333, x1, 536, x2)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, -0x66666666, 0x3333333333333334, 0x6666666666666666, x1, 544, x2)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x7e2e4001, 0x3333333333333334, -0xb504f333, x1, 552, x2)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d999, 0x3333333333333334, 0xb504f333, x1, 560, x2)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x33333336, 0x3333333333333334, 0x2, x1, 568, x2)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, -0x77777778, 0x3333333333333334, 0x5555555555555554, x1, 576, x2)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x33333334, 0x3333333333333334, 0x0, x1, 584, x2)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x33333338, 0x3333333333333334, 0x4, x1, 592, x2)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, 0x66666666, 0x3333333333333334, 0x3333333333333332, x1, 600, x2)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, -0x66666667, 0x3333333333333334, 0x6666666666666665, x1, 608, x2)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d99a, 0x3333333333333334, 0xb504f332, x1, 616, x2)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x77777776, 0x3333333333333334, 0x5555555555555556, x1, 624, x2)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x22222221, 0x3333333333333334, -0x5555555555555555, x1, 632, x2)
+
+inst_592:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x3333333a, 0x3333333333333334, 0x6, x1, 640, x2)
+
+inst_593:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, 0x66666668, 0x3333333333333334, 0x3333333333333334, x1, 648, x2)
+
+inst_594:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, -0x66666665, 0x3333333333333334, 0x6666666666666667, x1, 656, x2)
+
+inst_595:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x7e2e4002, 0x3333333333333334, -0xb504f332, x1, 664, x2)
+
+inst_596:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d998, 0x3333333333333334, 0xb504f334, x1, 672, x2)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x6666666a, 0x6666666666666667, 0x3, x1, 680, x2)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x44444444, 0x6666666666666667, 0x5555555555555555, x1, 688, x2)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x11111111, 0x6666666666666667, -0x5555555555555556, x1, 696, x2)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x6666666c, 0x6666666666666667, 0x5, x1, 704, x2)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, -0x66666666, 0x6666666666666667, 0x3333333333333333, x1, 712, x2)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, -0x33333333, 0x6666666666666667, 0x6666666666666666, x1, 720, x2)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x4e9e8ccc, 0x6666666666666667, -0xb504f333, x1, 728, x2)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b599a, 0x6666666666666667, 0xb504f333, x1, 736, x2)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x66666669, 0x6666666666666667, 0x2, x1, 744, x2)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, -0x44444445, 0x6666666666666667, 0x5555555555555554, x1, 752, x2)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x66666667, 0x6666666666666667, 0x0, x1, 760, x2)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x6666666b, 0x6666666666666667, 0x4, x1, 768, x2)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, -0x66666667, 0x6666666666666667, 0x3333333333333332, x1, 776, x2)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, -0x33333334, 0x6666666666666667, 0x6666666666666665, x1, 784, x2)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b5999, 0x6666666666666667, 0xb504f332, x1, 792, x2)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x44444443, 0x6666666666666667, 0x5555555555555556, x1, 800, x2)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x11111112, 0x6666666666666667, -0x5555555555555555, x1, 808, x2)
+
+inst_614:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x6666666d, 0x6666666666666667, 0x6, x1, 816, x2)
+
+inst_615:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, -0x66666665, 0x6666666666666667, 0x3333333333333334, x1, 824, x2)
+
+inst_616:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, -0x33333332, 0x6666666666666667, 0x6666666666666667, x1, 832, x2)
+
+inst_617:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x4e9e8ccb, 0x6666666666666667, -0xb504f332, x1, 840, x2)
+
+inst_618:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b599b, 0x6666666666666667, 0xb504f334, x1, 848, x2)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd1, -0xb504f332, 0x3, x1, 856, x2)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x5faf9ddd, -0xb504f332, 0x5555555555555555, x1, 864, x2)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0xa5a4888, -0xb504f332, -0x5555555555555556, x1, 872, x2)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd3, -0xb504f332, 0x5, x1, 880, x2)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, 0x7e2e4001, -0xb504f332, 0x3333333333333333, x1, 888, x2)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, -0x4e9e8ccc, -0xb504f332, 0x6666666666666666, x1, 896, x2)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, -0x6a09e665, -0xb504f332, -0xb504f333, x1, 904, x2)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x1, -0xb504f332, 0xb504f333, x1, 912, x2)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd0, -0xb504f332, 0x2, x1, 920, x2)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, -0x5faf9dde, -0xb504f332, 0x5555555555555554, x1, 928, x2)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cce, -0xb504f332, 0x0, x1, 936, x2)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd2, -0xb504f332, 0x4, x1, 944, x2)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, 0x7e2e4000, -0xb504f332, 0x3333333333333332, x1, 952, x2)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, -0x4e9e8ccd, -0xb504f332, 0x6666666666666665, x1, 960, x2)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x0, -0xb504f332, 0xb504f332, x1, 968, x2)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, -0x5faf9ddc, -0xb504f332, 0x5555555555555556, x1, 976, x2)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0xa5a4887, -0xb504f332, -0x5555555555555555, x1, 984, x2)
+
+inst_636:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cd4, -0xb504f332, 0x6, x1, 992, x2)
+
+inst_637:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, 0x7e2e4002, -0xb504f332, 0x3333333333333334, x1, 1000, x2)
+
+inst_638:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, -0x4e9e8ccb, -0xb504f332, 0x6666666666666667, x1, 1008, x2)
+
+inst_639:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x6a09e664, -0xb504f332, -0xb504f332, x1, 1016, x2)
+
+inst_640:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, 0x2, -0xb504f332, 0xb504f334, x1, 1024, x2)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc9, 0xb504f334, 0x3, x1, 1032, x2)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4889, 0xb504f334, 0x5555555555555555, x1, 1040, x2)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x5faf9dde, 0xb504f334, -0x5555555555555556, x1, 1048, x2)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc7, 0xb504f334, 0x5, x1, 1056, x2)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d999, 0xb504f334, 0x3333333333333333, x1, 1064, x2)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b599a, 0xb504f334, 0x6666666666666666, x1, 1072, x2)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x1, 0xb504f334, -0xb504f333, x1, 1080, x2)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f333
+TEST_CR_OP( c.addw, x10, x11, 0x6a09e667, 0xb504f334, 0xb504f333, x1, 1088, x2)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x2
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cca, 0xb504f334, 0x2, x1, 1096, x2)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, 0xa5a4888, 0xb504f334, 0x5555555555555554, x1, 1104, x2)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0ccc, 0xb504f334, 0x0, x1, 1112, x2)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc8, 0xb504f334, 0x4, x1, 1120, x2)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d99a, 0xb504f334, 0x3333333333333332, x1, 1128, x2)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b5999, 0xb504f334, 0x6666666666666665, x1, 1136, x2)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x6a09e666, 0xb504f334, 0xb504f332, x1, 1144, x2)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0xa5a488a, 0xb504f334, 0x5555555555555556, x1, 1152, x2)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x5faf9ddf, 0xb504f334, -0x5555555555555555, x1, 1160, x2)
+
+inst_658:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cc6, 0xb504f334, 0x6, x1, 1168, x2)
+
+inst_659:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, -0x17c7d998, 0xb504f334, 0x3333333333333334, x1, 1176, x2)
+
+inst_660:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, 0x1b6b599b, 0xb504f334, 0x6666666666666667, x1, 1184, x2)
+
+inst_661:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x2, 0xb504f334, -0xb504f332, x1, 1192, x2)
+
+inst_662:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, 0x6a09e668, 0xb504f334, 0xb504f334, x1, 1200, x2)
+
+inst_663:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555554
+TEST_CR_OP( c.addw, x10, x11, 0x55555554, 0x0, 0x5555555555555554, x1, 1208, x2)
+
+inst_664:
+// rs1_val==0 and rs2_val==0,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x0
+TEST_CR_OP( c.addw, x10, x11, 0x0, 0x0, 0x0, x1, 1216, x2)
+
+inst_665:
+// rs1_val==0 and rs2_val==4,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x4
+TEST_CR_OP( c.addw, x10, x11, 0x4, 0x0, 0x4, x1, 1224, x2)
+
+inst_666:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333332
+TEST_CR_OP( c.addw, x10, x11, 0x33333332, 0x0, 0x3333333333333332, x1, 1232, x2)
+
+inst_667:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666665
+TEST_CR_OP( c.addw, x10, x11, 0x66666665, 0x0, 0x6666666666666665, x1, 1240, x2)
+
+inst_668:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f332
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0cce, 0x0, 0xb504f332, x1, 1248, x2)
+
+inst_669:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555556
+TEST_CR_OP( c.addw, x10, x11, 0x55555556, 0x0, 0x5555555555555556, x1, 1256, x2)
+
+inst_670:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, -0x55555555, 0x0, -0x5555555555555555, x1, 1264, x2)
+
+inst_671:
+// rs1_val==0 and rs2_val==6,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x6
+TEST_CR_OP( c.addw, x10, x11, 0x6, 0x0, 0x6, x1, 1272, x2)
+
+inst_672:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333334
+TEST_CR_OP( c.addw, x10, x11, 0x33333334, 0x0, 0x3333333333333334, x1, 1280, x2)
+
+inst_673:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666667
+TEST_CR_OP( c.addw, x10, x11, 0x66666667, 0x0, 0x6666666666666667, x1, 1288, x2)
+
+inst_674:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f332
+TEST_CR_OP( c.addw, x10, x11, 0x4afb0cce, 0x0, -0xb504f332, x1, 1296, x2)
+
+inst_675:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f334
+TEST_CR_OP( c.addw, x10, x11, -0x4afb0ccc, 0x0, 0xb504f334, x1, 1304, x2)
+
+inst_676:
+// rs1_val==4 and rs2_val==3,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x3
+TEST_CR_OP( c.addw, x10, x11, 0x7, 0x4, 0x3, x1, 1312, x2)
+
+inst_677:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: c.addw; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555555
+TEST_CR_OP( c.addw, x10, x11, 0x55555559, 0x4, 0x5555555555555555, x1, 1320, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_3:
+ .fill 166*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cand-01.S b/riscof/suite/rv64i_m/C/cand-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..2696bac091a6c0890f25f913a37ccd2f591d95ab
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cand-01.S
@@ -0,0 +1,3434 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.and instruction of the RISC-V C extension for the cand covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cand)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x9, rs2==x8, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, rs2_val < 0, rs1_val == 68719476736
+// opcode: c.and; op1:x9; op2:x8; op1val:0x1000000000; op2val:-0x8000000000000000
+TEST_CR_OP( c.and, x9, x8, 0x0, 0x1000000000, -0x8000000000000000, x1, 0, x2)
+
+inst_1:
+// rs1 == rs2, rs1==x14, rs2==x14, rs2_val == 0, rs1_val == -2199023255553
+// opcode: c.and; op1:x14; op2:x14; op1val:-0x20000000001; op2val:-0x20000000001
+TEST_CR_OP( c.and, x14, x14, 0xfffffdffffffffff, -0x20000000001, -0x20000000001, x1, 8, x2)
+
+inst_2:
+// rs1==x15, rs2==x10, rs2_val == (2**(xlen-1)-1), rs2_val > 0, rs2_val == 9223372036854775807, rs1_val == 2048
+// opcode: c.and; op1:x15; op2:x10; op1val:0x800; op2val:0x7fffffffffffffff
+TEST_CR_OP( c.and, x15, x10, 0x800, 0x800, 0x7fffffffffffffff, x1, 16, x2)
+
+inst_3:
+// rs1==x12, rs2==x13, rs2_val == 1, rs1_val == 8
+// opcode: c.and; op1:x12; op2:x13; op1val:0x8; op2val:0x1
+TEST_CR_OP( c.and, x12, x13, 0x0, 0x8, 0x1, x1, 24, x2)
+
+inst_4:
+// rs1==x13, rs2==x9, rs1_val == (-2**(xlen-1)), rs2_val == -129, rs1_val == -9223372036854775808
+// opcode: c.and; op1:x13; op2:x9; op1val:-0x8000000000000000; op2val:-0x81
+TEST_CR_OP( c.and, x13, x9, 0x8000000000000000, -0x8000000000000000, -0x81, x1, 32, x2)
+
+inst_5:
+// rs1==x8, rs2==x15, rs1_val == 0, rs2_val == 4194304
+// opcode: c.and; op1:x8; op2:x15; op1val:0x0; op2val:0x400000
+TEST_CR_OP( c.and, x8, x15, 0x0, 0x0, 0x400000, x1, 40, x2)
+
+inst_6:
+// rs1==x11, rs2==x12, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, rs2_val == -65
+// opcode: c.and; op1:x11; op2:x12; op1val:0x7fffffffffffffff; op2val:-0x41
+TEST_CR_OP( c.and, x11, x12, 0x7fffffffffffffbf, 0x7fffffffffffffff, -0x41, x1, 48, x2)
+
+inst_7:
+// rs1==x10, rs2==x11, rs1_val == 1,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x1; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x1, 0x3333333333333333, x1, 56, x2)
+
+inst_8:
+// rs2_val == 2, rs1_val == 4, rs1_val==4 and rs2_val==2
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0x2, x1, 64, x2)
+
+inst_9:
+// rs2_val == 4, rs1_val == 128
+// opcode: c.and; op1:x10; op2:x11; op1val:0x80; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x80, 0x4, x1, 72, x2)
+
+inst_10:
+// rs2_val == 8, rs1_val == -4503599627370497
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x10000000000001; op2val:0x8
+TEST_CR_OP( c.and, x10, x11, 0x8, -0x10000000000001, 0x8, x1, 80, x2)
+
+inst_11:
+// rs2_val == 16, rs1_val == 16
+// opcode: c.and; op1:x10; op2:x11; op1val:0x10; op2val:0x10
+TEST_CR_OP( c.and, x10, x11, 0x10, 0x10, 0x10, x1, 88, x2)
+
+inst_12:
+// rs2_val == 32, rs1_val == -268435457
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x10000001; op2val:0x20
+TEST_CR_OP( c.and, x10, x11, 0x20, -0x10000001, 0x20, x1, 96, x2)
+
+inst_13:
+// rs2_val == 64,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x40
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504f334, 0x40, x1, 104, x2)
+
+inst_14:
+// rs2_val == 128, rs1_val == 512
+// opcode: c.and; op1:x10; op2:x11; op1val:0x200; op2val:0x80
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x200, 0x80, x1, 112, x2)
+
+inst_15:
+// rs2_val == 256, rs1_val == -134217729
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x8000001; op2val:0x100
+TEST_CR_OP( c.and, x10, x11, 0x100, -0x8000001, 0x100, x1, 120, x2)
+
+inst_16:
+// rs2_val == 512,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x200
+TEST_CR_OP( c.and, x10, x11, 0x200, 0xb504f334, 0x200, x1, 128, x2)
+
+inst_17:
+// rs2_val == 1024, rs1_val == -3
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x3; op2val:0x400
+TEST_CR_OP( c.and, x10, x11, 0x400, -0x3, 0x400, x1, 136, x2)
+
+inst_18:
+// rs2_val == 2048, rs1_val == -1025
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x401; op2val:0x800
+TEST_CR_OP( c.and, x10, x11, 0x800, -0x401, 0x800, x1, 144, x2)
+
+inst_19:
+// rs2_val == 4096, rs1_val == 137438953472
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2000000000; op2val:0x1000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2000000000, 0x1000, x1, 152, x2)
+
+inst_20:
+// rs2_val == 8192, rs1_val == -33
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x21; op2val:0x2000
+TEST_CR_OP( c.and, x10, x11, 0x2000, -0x21, 0x2000, x1, 160, x2)
+
+inst_21:
+// rs2_val == 16384, rs1_val == 17179869184
+// opcode: c.and; op1:x10; op2:x11; op1val:0x400000000; op2val:0x4000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x400000000, 0x4000, x1, 168, x2)
+
+inst_22:
+// rs2_val == 32768, rs1_val == -72057594037927937
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x100000000000001; op2val:0x8000
+TEST_CR_OP( c.and, x10, x11, 0x8000, -0x100000000000001, 0x8000, x1, 176, x2)
+
+inst_23:
+// rs2_val == 65536, rs1_val == -1125899906842625
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x4000000000001; op2val:0x10000
+TEST_CR_OP( c.and, x10, x11, 0x10000, -0x4000000000001, 0x10000, x1, 184, x2)
+
+inst_24:
+// rs2_val == 131072, rs1_val == -4194305
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x400001; op2val:0x20000
+TEST_CR_OP( c.and, x10, x11, 0x20000, -0x400001, 0x20000, x1, 192, x2)
+
+inst_25:
+// rs2_val == 262144, rs1_val == 4611686018427387904
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4000000000000000; op2val:0x40000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4000000000000000, 0x40000, x1, 200, x2)
+
+inst_26:
+// rs2_val == 524288, rs1_val == -1152921504606846977
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:0x80000
+TEST_CR_OP( c.and, x10, x11, 0x80000, -0x1000000000000001, 0x80000, x1, 208, x2)
+
+inst_27:
+// rs2_val == 1048576, rs1_val == -65
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x41; op2val:0x100000
+TEST_CR_OP( c.and, x10, x11, 0x100000, -0x41, 0x100000, x1, 216, x2)
+
+inst_28:
+// rs2_val == 2097152,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xa; op2val:0x200000
+TEST_CR_OP( c.and, x10, x11, 0x200000, -0xa, 0x200000, x1, 224, x2)
+
+inst_29:
+// rs2_val == 8388608, rs1_val == -144115188075855873
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x200000000000001; op2val:0x800000
+TEST_CR_OP( c.and, x10, x11, 0x800000, -0x200000000000001, 0x800000, x1, 232, x2)
+
+inst_30:
+// rs2_val == 16777216,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x10000000000001; op2val:0x1000000
+TEST_CR_OP( c.and, x10, x11, 0x1000000, -0x10000000000001, 0x1000000, x1, 240, x2)
+
+inst_31:
+// rs2_val == 33554432, rs1_val == 2
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x2000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x2000000, x1, 248, x2)
+
+inst_32:
+// rs2_val == 67108864, rs1_val == 2199023255552
+// opcode: c.and; op1:x10; op2:x11; op1val:0x20000000000; op2val:0x4000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x20000000000, 0x4000000, x1, 256, x2)
+
+inst_33:
+// rs2_val == 134217728, rs1_val == -2305843009213693953
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x2000000000000001; op2val:0x8000000
+TEST_CR_OP( c.and, x10, x11, 0x8000000, -0x2000000000000001, 0x8000000, x1, 264, x2)
+
+inst_34:
+// rs2_val == 268435456, rs1_val == 2305843009213693952
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2000000000000000; op2val:0x10000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2000000000000000, 0x10000000, x1, 272, x2)
+
+inst_35:
+// rs2_val == 536870912, rs1_val == 72057594037927936
+// opcode: c.and; op1:x10; op2:x11; op1val:0x100000000000000; op2val:0x20000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x100000000000000, 0x20000000, x1, 280, x2)
+
+inst_36:
+// rs2_val == 1073741824, rs1_val == -562949953421313
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x2000000000001; op2val:0x40000000
+TEST_CR_OP( c.and, x10, x11, 0x40000000, -0x2000000000001, 0x40000000, x1, 288, x2)
+
+inst_37:
+// rs2_val == 2147483648,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x100000000000000; op2val:0x80000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x100000000000000, 0x80000000, x1, 296, x2)
+
+inst_38:
+// rs2_val == 4294967296,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x401; op2val:0x100000000
+TEST_CR_OP( c.and, x10, x11, 0x100000000, -0x401, 0x100000000, x1, 304, x2)
+
+inst_39:
+// rs2_val == 8589934592,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x200000000
+TEST_CR_OP( c.and, x10, x11, 0x200000000, 0x3333333333333334, 0x200000000, x1, 312, x2)
+
+inst_40:
+// rs2_val == 17179869184, rs1_val == 8589934592
+// opcode: c.and; op1:x10; op2:x11; op1val:0x200000000; op2val:0x400000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x200000000, 0x400000000, x1, 320, x2)
+
+inst_41:
+// rs2_val == 34359738368,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x2000000000000001; op2val:0x800000000
+TEST_CR_OP( c.and, x10, x11, 0x800000000, -0x2000000000000001, 0x800000000, x1, 328, x2)
+
+inst_42:
+// rs2_val == 68719476736,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x20000000001; op2val:0x1000000000
+TEST_CR_OP( c.and, x10, x11, 0x1000000000, -0x20000000001, 0x1000000000, x1, 336, x2)
+
+inst_43:
+// rs2_val == 137438953472,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x10; op2val:0x2000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x10, 0x2000000000, x1, 344, x2)
+
+inst_44:
+// rs2_val == 274877906944, rs1_val == -67108865
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x4000001; op2val:0x4000000000
+TEST_CR_OP( c.and, x10, x11, 0x4000000000, -0x4000001, 0x4000000000, x1, 352, x2)
+
+inst_45:
+// rs2_val == 549755813888,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x20000000000; op2val:0x8000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x20000000000, 0x8000000000, x1, 360, x2)
+
+inst_46:
+// rs2_val == 1099511627776,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x8; op2val:0x10000000000
+TEST_CR_OP( c.and, x10, x11, 0x10000000000, -0x8, 0x10000000000, x1, 368, x2)
+
+inst_47:
+// rs2_val == 2199023255552,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x4; op2val:0x20000000000
+TEST_CR_OP( c.and, x10, x11, 0x20000000000, -0x4, 0x20000000000, x1, 376, x2)
+
+inst_48:
+// rs2_val == 4398046511104, rs1_val == -288230376151711745
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x400000000000001; op2val:0x40000000000
+TEST_CR_OP( c.and, x10, x11, 0x40000000000, -0x400000000000001, 0x40000000000, x1, 384, x2)
+
+inst_49:
+// rs2_val == 8796093022208, rs1_val == -513
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x201; op2val:0x80000000000
+TEST_CR_OP( c.and, x10, x11, 0x80000000000, -0x201, 0x80000000000, x1, 392, x2)
+
+inst_50:
+// rs2_val == 17592186044416, rs1_val == 524288
+// opcode: c.and; op1:x10; op2:x11; op1val:0x80000; op2val:0x100000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x80000, 0x100000000000, x1, 400, x2)
+
+inst_51:
+// rs2_val == 35184372088832, rs1_val == -68719476737
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x1000000001; op2val:0x200000000000
+TEST_CR_OP( c.and, x10, x11, 0x200000000000, -0x1000000001, 0x200000000000, x1, 408, x2)
+
+inst_52:
+// rs2_val == 70368744177664,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x1000000001; op2val:0x400000000000
+TEST_CR_OP( c.and, x10, x11, 0x400000000000, -0x1000000001, 0x400000000000, x1, 416, x2)
+
+inst_53:
+// rs2_val == 140737488355328,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x800000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3333333333333334, 0x800000000000, x1, 424, x2)
+
+inst_54:
+// rs2_val == 281474976710656, rs1_val == -8193
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x2001; op2val:0x1000000000000
+TEST_CR_OP( c.and, x10, x11, 0x1000000000000, -0x2001, 0x1000000000000, x1, 432, x2)
+
+inst_55:
+// rs2_val == 562949953421312, rs1_val == 256
+// opcode: c.and; op1:x10; op2:x11; op1val:0x100; op2val:0x2000000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x100, 0x2000000000000, x1, 440, x2)
+
+inst_56:
+// rs2_val == 1125899906842624, rs1_val == -2147483649
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x80000001; op2val:0x4000000000000
+TEST_CR_OP( c.and, x10, x11, 0x4000000000000, -0x80000001, 0x4000000000000, x1, 448, x2)
+
+inst_57:
+// rs2_val == 2251799813685248,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xa; op2val:0x8000000000000
+TEST_CR_OP( c.and, x10, x11, 0x8000000000000, -0xa, 0x8000000000000, x1, 456, x2)
+
+inst_58:
+// rs2_val == 4503599627370496,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x10000000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0x10000000000000, x1, 464, x2)
+
+inst_59:
+// rs2_val == 9007199254740992, rs1_val == 4194304
+// opcode: c.and; op1:x10; op2:x11; op1val:0x400000; op2val:0x20000000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x400000, 0x20000000000000, x1, 472, x2)
+
+inst_60:
+// rs2_val == 18014398509481984,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2000000000; op2val:0x40000000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2000000000, 0x40000000000000, x1, 480, x2)
+
+inst_61:
+// rs2_val == 36028797018963968, rs1_val == 274877906944
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4000000000; op2val:0x80000000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4000000000, 0x80000000000000, x1, 488, x2)
+
+inst_62:
+// rs2_val == 72057594037927936,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x21; op2val:0x100000000000000
+TEST_CR_OP( c.and, x10, x11, 0x100000000000000, -0x21, 0x100000000000000, x1, 496, x2)
+
+inst_63:
+// rs2_val == 144115188075855872, rs1_val == 4398046511104
+// opcode: c.and; op1:x10; op2:x11; op1val:0x40000000000; op2val:0x200000000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x40000000000, 0x200000000000000, x1, 504, x2)
+
+inst_64:
+// rs2_val == 288230376151711744, rs1_val == -34359738369
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x800000001; op2val:0x400000000000000
+TEST_CR_OP( c.and, x10, x11, 0x400000000000000, -0x800000001, 0x400000000000000, x1, 512, x2)
+
+inst_65:
+// rs2_val == 576460752303423488,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x21; op2val:0x800000000000000
+TEST_CR_OP( c.and, x10, x11, 0x800000000000000, -0x21, 0x800000000000000, x1, 520, x2)
+
+inst_66:
+// rs2_val == 1152921504606846976,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x1000000001; op2val:0x1000000000000000
+TEST_CR_OP( c.and, x10, x11, 0x1000000000000000, -0x1000000001, 0x1000000000000000, x1, 528, x2)
+
+inst_67:
+// rs2_val == 2305843009213693952,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x400000000; op2val:0x2000000000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x400000000, 0x2000000000000000, x1, 536, x2)
+
+inst_68:
+// rs2_val == 4611686018427387904,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x10000001; op2val:0x4000000000000000
+TEST_CR_OP( c.and, x10, x11, 0x4000000000000000, -0x10000001, 0x4000000000000000, x1, 544, x2)
+
+inst_69:
+// rs2_val == -2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x7; op2val:-0x2
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x7, -0x2, x1, 552, x2)
+
+inst_70:
+// rs2_val == -3, rs1_val == 576460752303423488
+// opcode: c.and; op1:x10; op2:x11; op1val:0x800000000000000; op2val:-0x3
+TEST_CR_OP( c.and, x10, x11, 0x800000000000000, 0x800000000000000, -0x3, x1, 560, x2)
+
+inst_71:
+// rs2_val == -5,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x4000000000000000; op2val:-0x5
+TEST_CR_OP( c.and, x10, x11, 0xc000000000000000, -0x4000000000000000, -0x5, x1, 568, x2)
+
+inst_72:
+// rs2_val == -9,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x80; op2val:-0x9
+TEST_CR_OP( c.and, x10, x11, 0x80, 0x80, -0x9, x1, 576, x2)
+
+inst_73:
+// rs2_val == -17,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x10000000000001; op2val:-0x11
+TEST_CR_OP( c.and, x10, x11, 0xffefffffffffffef, -0x10000000000001, -0x11, x1, 584, x2)
+
+inst_74:
+// rs2_val == -33, rs1_val == -8796093022209
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x80000000001; op2val:-0x21
+TEST_CR_OP( c.and, x10, x11, 0xfffff7ffffffffdf, -0x80000000001, -0x21, x1, 592, x2)
+
+inst_75:
+// rs2_val == -257, rs1_val == 18014398509481984
+// opcode: c.and; op1:x10; op2:x11; op1val:0x40000000000000; op2val:-0x101
+TEST_CR_OP( c.and, x10, x11, 0x40000000000000, 0x40000000000000, -0x101, x1, 600, x2)
+
+inst_76:
+// rs2_val == -513, rs1_val == -257
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x101; op2val:-0x201
+TEST_CR_OP( c.and, x10, x11, 0xfffffffffffffcff, -0x101, -0x201, x1, 608, x2)
+
+inst_77:
+// rs2_val == -1025, rs1_val == 8388608
+// opcode: c.and; op1:x10; op2:x11; op1val:0x800000; op2val:-0x401
+TEST_CR_OP( c.and, x10, x11, 0x800000, 0x800000, -0x401, x1, 616, x2)
+
+inst_78:
+// rs2_val == -2049,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x80000000001; op2val:-0x801
+TEST_CR_OP( c.and, x10, x11, 0xfffff7fffffff7ff, -0x80000000001, -0x801, x1, 624, x2)
+
+inst_79:
+// rs2_val == -4097, rs1_val == 4096
+// opcode: c.and; op1:x10; op2:x11; op1val:0x1000; op2val:-0x1001
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x1000, -0x1001, x1, 632, x2)
+
+inst_80:
+// rs2_val == -8193,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x400000000000001; op2val:-0x2001
+TEST_CR_OP( c.and, x10, x11, 0xfbffffffffffdfff, -0x400000000000001, -0x2001, x1, 640, x2)
+
+inst_81:
+// rs2_val == -16385, rs1_val == 65536
+// opcode: c.and; op1:x10; op2:x11; op1val:0x10000; op2val:-0x4001
+TEST_CR_OP( c.and, x10, x11, 0x10000, 0x10000, -0x4001, x1, 648, x2)
+
+inst_82:
+// rs2_val == -32769,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x10000001; op2val:-0x8001
+TEST_CR_OP( c.and, x10, x11, 0xffffffffefff7fff, -0x10000001, -0x8001, x1, 656, x2)
+
+inst_83:
+// rs2_val == -65537,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x41; op2val:-0x10001
+TEST_CR_OP( c.and, x10, x11, 0xfffffffffffeffbf, -0x41, -0x10001, x1, 664, x2)
+
+inst_84:
+// rs2_val == -131073,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4000000000000000; op2val:-0x20001
+TEST_CR_OP( c.and, x10, x11, 0x4000000000000000, 0x4000000000000000, -0x20001, x1, 672, x2)
+
+inst_85:
+// rs2_val == -262145, rs1_val == -65537
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x10001; op2val:-0x40001
+TEST_CR_OP( c.and, x10, x11, 0xfffffffffffaffff, -0x10001, -0x40001, x1, 680, x2)
+
+inst_86:
+// rs2_val == -524289,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x7fffffffffffffff; op2val:-0x80001
+TEST_CR_OP( c.and, x10, x11, 0x7ffffffffff7ffff, 0x7fffffffffffffff, -0x80001, x1, 688, x2)
+
+inst_87:
+// rs2_val == -1048577, rs1_val == -4097
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x1001; op2val:-0x100001
+TEST_CR_OP( c.and, x10, x11, 0xffffffffffefefff, -0x1001, -0x100001, x1, 696, x2)
+
+inst_88:
+// rs2_val == -2097153, rs1_val == 16384
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4000; op2val:-0x200001
+TEST_CR_OP( c.and, x10, x11, 0x4000, 0x4000, -0x200001, x1, 704, x2)
+
+inst_89:
+// rs2_val == -4194305,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x400001
+TEST_CR_OP( c.and, x10, x11, 0x6666666666266667, 0x6666666666666667, -0x400001, x1, 712, x2)
+
+inst_90:
+// rs2_val == -8388609,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x400000000; op2val:-0x800001
+TEST_CR_OP( c.and, x10, x11, 0x400000000, 0x400000000, -0x800001, x1, 720, x2)
+
+inst_91:
+// rs2_val == -16777217, rs1_val == 1024
+// opcode: c.and; op1:x10; op2:x11; op1val:0x400; op2val:-0x1000001
+TEST_CR_OP( c.and, x10, x11, 0x400, 0x400, -0x1000001, x1, 728, x2)
+
+inst_92:
+// rs2_val == -33554433,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x400001; op2val:-0x2000001
+TEST_CR_OP( c.and, x10, x11, 0xfffffffffdbfffff, -0x400001, -0x2000001, x1, 736, x2)
+
+inst_93:
+// rs2_val == -67108865,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:-0x4000001
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3, -0x4000001, x1, 744, x2)
+
+inst_94:
+// rs2_val == -134217729, rs1_val == 8796093022208
+// opcode: c.and; op1:x10; op2:x11; op1val:0x80000000000; op2val:-0x8000001
+TEST_CR_OP( c.and, x10, x11, 0x80000000000, 0x80000000000, -0x8000001, x1, 752, x2)
+
+inst_95:
+// rs2_val == -268435457, rs1_val == -18014398509481985
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x40000000000001; op2val:-0x10000001
+TEST_CR_OP( c.and, x10, x11, 0xffbfffffefffffff, -0x40000000000001, -0x10000001, x1, 760, x2)
+
+inst_96:
+// rs2_val == -536870913,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:-0x20000001
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, -0x20000001, x1, 768, x2)
+
+inst_97:
+// rs2_val == -1073741825,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:-0x40000001
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, -0x40000001, x1, 776, x2)
+
+inst_98:
+// rs2_val == -2147483649, rs1_val == 144115188075855872
+// opcode: c.and; op1:x10; op2:x11; op1val:0x200000000000000; op2val:-0x80000001
+TEST_CR_OP( c.and, x10, x11, 0x200000000000000, 0x200000000000000, -0x80000001, x1, 784, x2)
+
+inst_99:
+// rs2_val == -4294967297, rs1_val == -4398046511105
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x40000000001; op2val:-0x100000001
+TEST_CR_OP( c.and, x10, x11, 0xfffffbfeffffffff, -0x40000000001, -0x100000001, x1, 792, x2)
+
+inst_100:
+// rs2_val == -8589934593, rs1_val == 67108864
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4000000; op2val:-0x200000001
+TEST_CR_OP( c.and, x10, x11, 0x4000000, 0x4000000, -0x200000001, x1, 800, x2)
+
+inst_101:
+// rs2_val == -17179869185,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x10001; op2val:-0x400000001
+TEST_CR_OP( c.and, x10, x11, 0xfffffffbfffeffff, -0x10001, -0x400000001, x1, 808, x2)
+
+inst_102:
+// rs2_val == -34359738369, rs1_val == -8589934593
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x200000001; op2val:-0x800000001
+TEST_CR_OP( c.and, x10, x11, 0xfffffff5ffffffff, -0x200000001, -0x800000001, x1, 816, x2)
+
+inst_103:
+// rs2_val == -68719476737,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x10000001; op2val:-0x1000000001
+TEST_CR_OP( c.and, x10, x11, 0xffffffefefffffff, -0x10000001, -0x1000000001, x1, 824, x2)
+
+inst_104:
+// rs2_val == -137438953473,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x200; op2val:-0x2000000001
+TEST_CR_OP( c.and, x10, x11, 0x200, 0x200, -0x2000000001, x1, 832, x2)
+
+inst_105:
+// rs2_val == -274877906945, rs1_val == 32768
+// opcode: c.and; op1:x10; op2:x11; op1val:0x8000; op2val:-0x4000000001
+TEST_CR_OP( c.and, x10, x11, 0x8000, 0x8000, -0x4000000001, x1, 840, x2)
+
+inst_106:
+// rs2_val == -549755813889, rs1_val == 6148914691236517205
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x8000000001
+TEST_CR_OP( c.and, x10, x11, 0x5555555555555555, 0x5555555555555555, -0x8000000001, x1, 848, x2)
+
+inst_107:
+// rs2_val == -1099511627777,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x10000000001
+TEST_CR_OP( c.and, x10, x11, 0x3333323333333332, 0x3333333333333332, -0x10000000001, x1, 856, x2)
+
+inst_108:
+// rs2_val == -2199023255553,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2000000000000000; op2val:-0x20000000001
+TEST_CR_OP( c.and, x10, x11, 0x2000000000000000, 0x2000000000000000, -0x20000000001, x1, 864, x2)
+
+inst_109:
+// rs2_val == -4398046511105, rs1_val == 8192
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2000; op2val:-0x40000000001
+TEST_CR_OP( c.and, x10, x11, 0x2000, 0x2000, -0x40000000001, x1, 872, x2)
+
+inst_110:
+// rs2_val == -8796093022209, rs1_val == -1048577
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x100001; op2val:-0x80000000001
+TEST_CR_OP( c.and, x10, x11, 0xfffff7ffffefffff, -0x100001, -0x80000000001, x1, 880, x2)
+
+inst_111:
+// rs2_val == -17592186044417,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:-0x100000000001
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6, -0x100000000001, x1, 888, x2)
+
+inst_112:
+// rs2_val == -35184372088833,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x20000000000; op2val:-0x200000000001
+TEST_CR_OP( c.and, x10, x11, 0x20000000000, 0x20000000000, -0x200000000001, x1, 896, x2)
+
+inst_113:
+// rs2_val == -70368744177665, rs1_val == -274877906945
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x4000000001; op2val:-0x400000000001
+TEST_CR_OP( c.and, x10, x11, 0xffffbfbfffffffff, -0x4000000001, -0x400000000001, x1, 904, x2)
+
+inst_114:
+// rs2_val == -140737488355329, rs1_val == 64
+// opcode: c.and; op1:x10; op2:x11; op1val:0x40; op2val:-0x800000000001
+TEST_CR_OP( c.and, x10, x11, 0x40, 0x40, -0x800000000001, x1, 912, x2)
+
+inst_115:
+// rs2_val == -281474976710657, rs1_val == 70368744177664
+// opcode: c.and; op1:x10; op2:x11; op1val:0x400000000000; op2val:-0x1000000000001
+TEST_CR_OP( c.and, x10, x11, 0x400000000000, 0x400000000000, -0x1000000000001, x1, 920, x2)
+
+inst_116:
+// rs2_val == -562949953421313,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x201; op2val:-0x2000000000001
+TEST_CR_OP( c.and, x10, x11, 0xfffdfffffffffdff, -0x201, -0x2000000000001, x1, 928, x2)
+
+inst_117:
+// rs2_val == -1125899906842625, rs1_val == 140737488355328
+// opcode: c.and; op1:x10; op2:x11; op1val:0x800000000000; op2val:-0x4000000000001
+TEST_CR_OP( c.and, x10, x11, 0x800000000000, 0x800000000000, -0x4000000000001, x1, 936, x2)
+
+inst_118:
+// rs2_val == -2251799813685249,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x8000000000001
+TEST_CR_OP( c.and, x10, x11, 0x3333333333333334, 0x3333333333333334, -0x8000000000001, x1, 944, x2)
+
+inst_119:
+// rs2_val == -4503599627370497,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x10000000000001
+TEST_CR_OP( c.and, x10, x11, 0x5545555555555556, 0x5555555555555556, -0x10000000000001, x1, 952, x2)
+
+inst_120:
+// rs2_val == -9007199254740993,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x800000001; op2val:-0x20000000000001
+TEST_CR_OP( c.and, x10, x11, 0xffdffff7ffffffff, -0x800000001, -0x20000000000001, x1, 960, x2)
+
+inst_121:
+// rs2_val == -18014398509481985,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:-0x40000000000001
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, -0x40000000000001, x1, 968, x2)
+
+inst_122:
+// rs2_val == -36028797018963969, rs1_val == -70368744177665
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x400000000001; op2val:-0x80000000000001
+TEST_CR_OP( c.and, x10, x11, 0xff7fbfffffffffff, -0x400000000001, -0x80000000000001, x1, 976, x2)
+
+inst_123:
+// rs2_val == -72057594037927937, rs1_val == 36028797018963968
+// opcode: c.and; op1:x10; op2:x11; op1val:0x80000000000000; op2val:-0x100000000000001
+TEST_CR_OP( c.and, x10, x11, 0x80000000000000, 0x80000000000000, -0x100000000000001, x1, 984, x2)
+
+inst_124:
+// rs2_val == -144115188075855873,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x200000000000001; op2val:-0x200000000000001
+TEST_CR_OP( c.and, x10, x11, 0xfdffffffffffffff, -0x200000000000001, -0x200000000000001, x1, 992, x2)
+
+inst_125:
+// rs2_val == -288230376151711745,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x400000; op2val:-0x400000000000001
+TEST_CR_OP( c.and, x10, x11, 0x400000, 0x400000, -0x400000000000001, x1, 1000, x2)
+
+inst_126:
+// rs2_val == -576460752303423489,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x40000000000; op2val:-0x800000000000001
+TEST_CR_OP( c.and, x10, x11, 0x40000000000, 0x40000000000, -0x800000000000001, x1, 1008, x2)
+
+inst_127:
+// rs2_val == -1152921504606846977,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x400; op2val:-0x1000000000000001
+TEST_CR_OP( c.and, x10, x11, 0x400, 0x400, -0x1000000000000001, x1, 1016, x2)
+
+inst_128:
+// rs2_val == -2305843009213693953,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x200000000; op2val:-0x2000000000000001
+TEST_CR_OP( c.and, x10, x11, 0x200000000, 0x200000000, -0x2000000000000001, x1, 1024, x2)
+
+inst_129:
+// rs2_val == -4611686018427387905,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x4; op2val:-0x4000000000000001
+TEST_CR_OP( c.and, x10, x11, 0xbffffffffffffffc, -0x4, -0x4000000000000001, x1, 1032, x2)
+
+inst_130:
+// rs2_val == 6148914691236517205, rs1_val == -1073741825
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x40000001; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x5555555515555555, -0x40000001, 0x5555555555555555, x1, 1040, x2)
+
+inst_131:
+// rs2_val == -6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x20000000001; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0xaaaaa8aaaaaaaaaa, -0x20000000001, -0x5555555555555556, x1, 1048, x2)
+
+inst_132:
+// rs1_val == 32,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x20; op2val:0x200000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x20, 0x200000, x1, 1056, x2)
+
+inst_133:
+// rs1_val == 131072,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x20000; op2val:0x20
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x20000, 0x20, x1, 1064, x2)
+
+inst_134:
+// rs1_val == 262144,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x40000; op2val:0x400000000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x40000, 0x400000000000000, x1, 1072, x2)
+
+inst_135:
+// rs1_val == 1048576,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x100000; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x100000, 0x6, x1, 1080, x2)
+
+inst_136:
+// rs1_val == 2097152,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x200000; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x200000, 0x4, x1, 1088, x2)
+
+inst_137:
+// rs1_val == 16777216,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x1000000; op2val:-0x40001
+TEST_CR_OP( c.and, x10, x11, 0x1000000, 0x1000000, -0x40001, x1, 1096, x2)
+
+inst_138:
+// rs1_val == 33554432,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2000000; op2val:-0x4000000001
+TEST_CR_OP( c.and, x10, x11, 0x2000000, 0x2000000, -0x4000000001, x1, 1104, x2)
+
+inst_139:
+// rs1_val == 134217728,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x8000000; op2val:0x10000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x8000000, 0x10000000000, x1, 1112, x2)
+
+inst_140:
+// rs1_val == 268435456,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x10000000; op2val:-0x8000000001
+TEST_CR_OP( c.and, x10, x11, 0x10000000, 0x10000000, -0x8000000001, x1, 1120, x2)
+
+inst_141:
+// rs1_val == 536870912,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x20000000; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x20000000, 0x20000000, 0xb504f333, x1, 1128, x2)
+
+inst_142:
+// rs1_val == 1073741824,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x40000000; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x40000000, 0x4, x1, 1136, x2)
+
+inst_143:
+// rs1_val == 2147483648,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x80000000; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x80000000, 0x0, x1, 1144, x2)
+
+inst_144:
+// rs1_val == 4294967296,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x100000000; op2val:0x40000000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x100000000, 0x40000000000000, x1, 1152, x2)
+
+inst_145:
+// rs1_val == 34359738368,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x800000000; op2val:-0x2001
+TEST_CR_OP( c.and, x10, x11, 0x800000000, 0x800000000, -0x2001, x1, 1160, x2)
+
+inst_146:
+// rs1_val == 549755813888,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x8000000000; op2val:0x40000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x8000000000, 0x40000, x1, 1168, x2)
+
+inst_147:
+// rs1_val == 1099511627776,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x10000000000; op2val:-0x41
+TEST_CR_OP( c.and, x10, x11, 0x10000000000, 0x10000000000, -0x41, x1, 1176, x2)
+
+inst_148:
+// rs1_val == 17592186044416,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x100000000000; op2val:-0x20001
+TEST_CR_OP( c.and, x10, x11, 0x100000000000, 0x100000000000, -0x20001, x1, 1184, x2)
+
+inst_149:
+// rs1_val == 35184372088832,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x200000000000; op2val:0x1
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x200000000000, 0x1, x1, 1192, x2)
+
+inst_150:
+// rs1_val == 281474976710656,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x1000000000000; op2val:-0x101
+TEST_CR_OP( c.and, x10, x11, 0x1000000000000, 0x1000000000000, -0x101, x1, 1200, x2)
+
+inst_151:
+// rs1_val == 562949953421312,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2000000000000; op2val:0x20000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2000000000000, 0x20000000000, x1, 1208, x2)
+
+inst_152:
+// rs1_val == 1125899906842624,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4000000000000; op2val:-0x8000000001
+TEST_CR_OP( c.and, x10, x11, 0x4000000000000, 0x4000000000000, -0x8000000001, x1, 1216, x2)
+
+inst_153:
+// rs1_val == 2251799813685248,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x8000000000000; op2val:-0x200000000001
+TEST_CR_OP( c.and, x10, x11, 0x8000000000000, 0x8000000000000, -0x200000000001, x1, 1224, x2)
+
+inst_154:
+// rs1_val == 4503599627370496,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x10000000000000; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x10000000000000, 0xb504f334, x1, 1232, x2)
+
+inst_155:
+// rs1_val == 9007199254740992,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x20000000000000; op2val:-0x4000000001
+TEST_CR_OP( c.and, x10, x11, 0x20000000000000, 0x20000000000000, -0x4000000001, x1, 1240, x2)
+
+inst_156:
+// rs1_val == 288230376151711744,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x400000000000000; op2val:0x2000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x400000000000000, 0x2000000000, x1, 1248, x2)
+
+inst_157:
+// rs1_val == 1152921504606846976,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x1000000000000000; op2val:0x4000000000
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x1000000000000000, 0x4000000000, x1, 1256, x2)
+
+inst_158:
+// rs1_val == -2,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x2; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, -0x2, 0x5, x1, 1264, x2)
+
+inst_159:
+// rs1_val == -5,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0xffffffff4afb0cca, -0x5, -0xb504f332, x1, 1272, x2)
+
+inst_160:
+// rs1_val == -9,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x9; op2val:-0x21
+TEST_CR_OP( c.and, x10, x11, 0xffffffffffffffd7, -0x9, -0x21, x1, 1280, x2)
+
+inst_161:
+// rs1_val == -17,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x11; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0xb504f323, -0x11, 0xb504f333, x1, 1288, x2)
+
+inst_162:
+// rs1_val == -129,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x81; op2val:-0x800001
+TEST_CR_OP( c.and, x10, x11, 0xffffffffff7fff7f, -0x81, -0x800001, x1, 1296, x2)
+
+inst_163:
+// rs1_val == -2049,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x801; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x6666666666666667, -0x801, 0x6666666666666667, x1, 1304, x2)
+
+inst_164:
+// rs1_val == -16385,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x4001; op2val:0x40000
+TEST_CR_OP( c.and, x10, x11, 0x40000, -0x4001, 0x40000, x1, 1312, x2)
+
+inst_165:
+// rs1_val == -32769,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x8001; op2val:-0x3
+TEST_CR_OP( c.and, x10, x11, 0xffffffffffff7ffd, -0x8001, -0x3, x1, 1320, x2)
+
+inst_166:
+// rs1_val == -131073,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x20001; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x3333333333313334, -0x20001, 0x3333333333333334, x1, 1328, x2)
+
+inst_167:
+// rs1_val == -262145,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x40001; op2val:-0x801
+TEST_CR_OP( c.and, x10, x11, 0xfffffffffffbf7ff, -0x40001, -0x801, x1, 1336, x2)
+
+inst_168:
+// rs1_val == -524289,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x80001; op2val:-0x2000000000001
+TEST_CR_OP( c.and, x10, x11, 0xfffdfffffff7ffff, -0x80001, -0x2000000000001, x1, 1344, x2)
+
+inst_169:
+// rs1_val == -2097153,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x200001; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0xffffffff4adb0cce, -0x200001, -0xb504f332, x1, 1352, x2)
+
+inst_170:
+// rs1_val == -8388609,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x800001; op2val:0x400000
+TEST_CR_OP( c.and, x10, x11, 0x400000, -0x800001, 0x400000, x1, 1360, x2)
+
+inst_171:
+// rs1_val == -16777217,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x1000001; op2val:-0x4000000001
+TEST_CR_OP( c.and, x10, x11, 0xffffffbffeffffff, -0x1000001, -0x4000000001, x1, 1368, x2)
+
+inst_172:
+// rs1_val == -33554433,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x2000001; op2val:-0x2000000001
+TEST_CR_OP( c.and, x10, x11, 0xffffffdffdffffff, -0x2000001, -0x2000000001, x1, 1376, x2)
+
+inst_173:
+// rs1_val == -536870913,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x20000001; op2val:-0x100000000001
+TEST_CR_OP( c.and, x10, x11, 0xffffefffdfffffff, -0x20000001, -0x100000000001, x1, 1384, x2)
+
+inst_174:
+// rs1_val == -4294967297,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x100000001; op2val:0x4000000000
+TEST_CR_OP( c.and, x10, x11, 0x4000000000, -0x100000001, 0x4000000000, x1, 1392, x2)
+
+inst_175:
+// rs1_val == -17179869185,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x400000001; op2val:-0x10001
+TEST_CR_OP( c.and, x10, x11, 0xfffffffbfffeffff, -0x400000001, -0x10001, x1, 1400, x2)
+
+inst_176:
+// rs1_val == -137438953473,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x2000000001; op2val:-0x20000000000001
+TEST_CR_OP( c.and, x10, x11, 0xffdfffdfffffffff, -0x2000000001, -0x20000000000001, x1, 1408, x2)
+
+inst_177:
+// rs1_val == -549755813889,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x8000000001; op2val:-0x100001
+TEST_CR_OP( c.and, x10, x11, 0xffffff7fffefffff, -0x8000000001, -0x100001, x1, 1416, x2)
+
+inst_178:
+// rs1_val == -1099511627777,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x10000000001; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0xb504f333, -0x10000000001, 0xb504f333, x1, 1424, x2)
+
+inst_179:
+// rs1_val == -17592186044417,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x100000000001; op2val:-0x100000000001
+TEST_CR_OP( c.and, x10, x11, 0xffffefffffffffff, -0x100000000001, -0x100000000001, x1, 1432, x2)
+
+inst_180:
+// rs1_val == -35184372088833,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x200000000001; op2val:0x4000
+TEST_CR_OP( c.and, x10, x11, 0x4000, -0x200000000001, 0x4000, x1, 1440, x2)
+
+inst_181:
+// rs1_val == -140737488355329,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x800000000001; op2val:-0x800000000000001
+TEST_CR_OP( c.and, x10, x11, 0xf7ff7fffffffffff, -0x800000000001, -0x800000000000001, x1, 1448, x2)
+
+inst_182:
+// rs1_val == -281474976710657,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x1000000000001; op2val:-0x10000000000001
+TEST_CR_OP( c.and, x10, x11, 0xffeeffffffffffff, -0x1000000000001, -0x10000000000001, x1, 1456, x2)
+
+inst_183:
+// rs1_val == -2251799813685249,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x8000000000001; op2val:0x80000000000
+TEST_CR_OP( c.and, x10, x11, 0x80000000000, -0x8000000000001, 0x80000000000, x1, 1464, x2)
+
+inst_184:
+// rs1_val == -9007199254740993,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x20000000000001; op2val:-0x2001
+TEST_CR_OP( c.and, x10, x11, 0xffdfffffffffdfff, -0x20000000000001, -0x2001, x1, 1472, x2)
+
+inst_185:
+// rs1_val == -36028797018963969,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x80000000000001; op2val:-0x8001
+TEST_CR_OP( c.and, x10, x11, 0xff7fffffffff7fff, -0x80000000000001, -0x8001, x1, 1480, x2)
+
+inst_186:
+// rs1_val == -576460752303423489,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x800000000000001; op2val:0x4000000
+TEST_CR_OP( c.and, x10, x11, 0x4000000, -0x800000000000001, 0x4000000, x1, 1488, x2)
+
+inst_187:
+// rs1_val == -4611686018427387905,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x4000000000000001; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, -0x4000000000000001, 0x4, x1, 1496, x2)
+
+inst_188:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206 and rs2_val==3
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x5555555555555556, 0x3, x1, 1504, x2)
+
+inst_189:
+// rs1_val==3 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3, 0x3, x1, 1512, x2)
+
+inst_190:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x3, 0x5555555555555555, x1, 1520, x2)
+
+inst_191:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, -0x5555555555555556, x1, 1528, x2)
+
+inst_192:
+// rs1_val==3 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x3, 0x5, x1, 1536, x2)
+
+inst_193:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3, 0x3333333333333333, x1, 1544, x2)
+
+inst_194:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, 0x6666666666666666, x1, 1552, x2)
+
+inst_195:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x3, -0xb504f333, x1, 1560, x2)
+
+inst_196:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3, 0xb504f333, x1, 1568, x2)
+
+inst_197:
+// rs1_val==3 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, 0x2, x1, 1576, x2)
+
+inst_198:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3, 0x5555555555555554, x1, 1584, x2)
+
+inst_199:
+// rs1_val==3 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3, 0x0, x1, 1592, x2)
+
+inst_200:
+// rs1_val==3 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3, 0x4, x1, 1600, x2)
+
+inst_201:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, 0x3333333333333332, x1, 1608, x2)
+
+inst_202:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x3, 0x6666666666666665, x1, 1616, x2)
+
+inst_203:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, 0xb504f332, x1, 1624, x2)
+
+inst_204:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, 0x5555555555555556, x1, 1632, x2)
+
+inst_205:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3, -0x5555555555555555, x1, 1640, x2)
+
+inst_206:
+// rs1_val==3 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, 0x6, x1, 1648, x2)
+
+inst_207:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3, 0x3333333333333334, x1, 1656, x2)
+
+inst_208:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3, 0x6666666666666667, x1, 1664, x2)
+
+inst_209:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3, -0xb504f332, x1, 1672, x2)
+
+inst_210:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3, 0xb504f334, x1, 1680, x2)
+
+inst_211:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x5555555555555555, 0x3, x1, 1688, x2)
+
+inst_212:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x5555555555555555, x1, 1696, x2)
+
+inst_213:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5555555555555555, -0x5555555555555556, x1, 1704, x2)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x5555555555555555, 0x5, x1, 1712, x2)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111111, 0x5555555555555555, 0x3333333333333333, x1, 1720, x2)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444444, 0x5555555555555555, 0x6666666666666666, x1, 1728, x2)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x5555555540510445, 0x5555555555555555, -0xb504f333, x1, 1736, x2)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x15045111, 0x5555555555555555, 0xb504f333, x1, 1744, x2)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5555555555555555, 0x2, x1, 1752, x2)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x5555555555555554, 0x5555555555555555, 0x5555555555555554, x1, 1760, x2)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5555555555555555, 0x0, x1, 1768, x2)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5555555555555555, 0x4, x1, 1776, x2)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111110, 0x5555555555555555, 0x3333333333333332, x1, 1784, x2)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444445, 0x5555555555555555, 0x6666666666666665, x1, 1792, x2)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x15045110, 0x5555555555555555, 0xb504f332, x1, 1800, x2)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x5555555555555554, 0x5555555555555555, 0x5555555555555556, x1, 1808, x2)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x5555555555555555, -0x5555555555555555, x1, 1816, x2)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5555555555555555, 0x6, x1, 1824, x2)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111114, 0x5555555555555555, 0x3333333333333334, x1, 1832, x2)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444445, 0x5555555555555555, 0x6666666666666667, x1, 1840, x2)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x5555555540510444, 0x5555555555555555, -0xb504f332, x1, 1848, x2)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x15045114, 0x5555555555555555, 0xb504f334, x1, 1856, x2)
+
+inst_233:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x5555555555555556, 0x5555555555555555, x1, 1864, x2)
+
+inst_234:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, -0x5555555555555556, x1, 1872, x2)
+
+inst_235:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x5555555555555556, 0x5, x1, 1880, x2)
+
+inst_236:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, -0x5555555555555556, 0x3333333333333333, x1, 1888, x2)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, -0x5555555555555556, 0x6666666666666666, x1, 1896, x2)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaa0aaa0888, -0x5555555555555556, -0xb504f333, x1, 1904, x2)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0xa000a222, -0x5555555555555556, 0xb504f333, x1, 1912, x2)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x5555555555555556, 0x2, x1, 1920, x2)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x5555555555555556, 0x5555555555555554, x1, 1928, x2)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x5555555555555556, 0x0, x1, 1936, x2)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x5555555555555556, 0x4, x1, 1944, x2)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, -0x5555555555555556, 0x3333333333333332, x1, 1952, x2)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222220, -0x5555555555555556, 0x6666666666666665, x1, 1960, x2)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0xa000a222, -0x5555555555555556, 0xb504f332, x1, 1968, x2)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x5555555555555556, 0x5555555555555556, x1, 1976, x2)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, -0x5555555555555555, x1, 1984, x2)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x5555555555555556, 0x6, x1, 1992, x2)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222220, -0x5555555555555556, 0x3333333333333334, x1, 2000, x2)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, -0x5555555555555556, 0x6666666666666667, x1, 2008, x2)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaa0aaa088a, -0x5555555555555556, -0xb504f332, x1, 2016, x2)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0xa000a220, -0x5555555555555556, 0xb504f334, x1, 2024, x2)
+
+inst_254:
+// rs1_val==5 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x5, 0x3, x1, 2032, x2)
+
+inst_255:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x5, 0x5555555555555555, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_256:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5, -0x5555555555555556, x1, 0, x2)
+
+inst_257:
+// rs1_val==5 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x5, 0x5, x1, 8, x2)
+
+inst_258:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x5, 0x3333333333333333, x1, 16, x2)
+
+inst_259:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0x6666666666666666, x1, 24, x2)
+
+inst_260:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x5, -0xb504f333, x1, 32, x2)
+
+inst_261:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x5, 0xb504f333, x1, 40, x2)
+
+inst_262:
+// rs1_val==5 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5, 0x2, x1, 48, x2)
+
+inst_263:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0x5555555555555554, x1, 56, x2)
+
+inst_264:
+// rs1_val==5 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5, 0x0, x1, 64, x2)
+
+inst_265:
+// rs1_val==5 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0x4, x1, 72, x2)
+
+inst_266:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5, 0x3333333333333332, x1, 80, x2)
+
+inst_267:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x5, 0x6666666666666665, x1, 88, x2)
+
+inst_268:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5, 0xb504f332, x1, 96, x2)
+
+inst_269:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0x5555555555555556, x1, 104, x2)
+
+inst_270:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x5, -0x5555555555555555, x1, 112, x2)
+
+inst_271:
+// rs1_val==5 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0x6, x1, 120, x2)
+
+inst_272:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0x3333333333333334, x1, 128, x2)
+
+inst_273:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x5, 0x6666666666666667, x1, 136, x2)
+
+inst_274:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, -0xb504f332, x1, 144, x2)
+
+inst_275:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5, 0xb504f334, x1, 152, x2)
+
+inst_276:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x3333333333333333, 0x3, x1, 160, x2)
+
+inst_277:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111111, 0x3333333333333333, 0x5555555555555555, x1, 168, x2)
+
+inst_278:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, 0x3333333333333333, -0x5555555555555556, x1, 176, x2)
+
+inst_279:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x3333333333333333, 0x5, x1, 184, x2)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x3333333333333333, x1, 192, x2)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, 0x3333333333333333, 0x6666666666666666, x1, 200, x2)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x3333333302330001, 0x3333333333333333, -0xb504f333, x1, 208, x2)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x31003333, 0x3333333333333333, 0xb504f333, x1, 216, x2)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3333333333333333, 0x2, x1, 224, x2)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111110, 0x3333333333333333, 0x5555555555555554, x1, 232, x2)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3333333333333333, 0x0, x1, 240, x2)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3333333333333333, 0x4, x1, 248, x2)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x3333333333333332, 0x3333333333333333, 0x3333333333333332, x1, 256, x2)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222221, 0x3333333333333333, 0x6666666666666665, x1, 264, x2)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x31003332, 0x3333333333333333, 0xb504f332, x1, 272, x2)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111112, 0x3333333333333333, 0x5555555555555556, x1, 280, x2)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222223, 0x3333333333333333, -0x5555555555555555, x1, 288, x2)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3333333333333333, 0x6, x1, 296, x2)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x3333333333333330, 0x3333333333333333, 0x3333333333333334, x1, 304, x2)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222223, 0x3333333333333333, 0x6666666666666667, x1, 312, x2)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x3333333302330002, 0x3333333333333333, -0xb504f332, x1, 320, x2)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x31003330, 0x3333333333333333, 0xb504f334, x1, 328, x2)
+
+inst_298:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6666666666666666, 0x3, x1, 336, x2)
+
+inst_299:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444444, 0x6666666666666666, 0x5555555555555555, x1, 344, x2)
+
+inst_300:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, 0x6666666666666666, -0x5555555555555556, x1, 352, x2)
+
+inst_301:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6666666666666666, 0x5, x1, 360, x2)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, 0x6666666666666666, 0x3333333333333333, x1, 368, x2)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x6666666666666666, x1, 376, x2)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x6666666642620444, 0x6666666666666666, -0xb504f333, x1, 384, x2)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x24046222, 0x6666666666666666, 0xb504f333, x1, 392, x2)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6666666666666666, 0x2, x1, 400, x2)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444444, 0x6666666666666666, 0x5555555555555554, x1, 408, x2)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x6666666666666666, 0x0, x1, 416, x2)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6666666666666666, 0x4, x1, 424, x2)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, 0x6666666666666666, 0x3333333333333332, x1, 432, x2)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x6666666666666664, 0x6666666666666666, 0x6666666666666665, x1, 440, x2)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x24046222, 0x6666666666666666, 0xb504f332, x1, 448, x2)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444446, 0x6666666666666666, 0x5555555555555556, x1, 456, x2)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, 0x6666666666666666, -0x5555555555555555, x1, 464, x2)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6666666666666666, 0x6, x1, 472, x2)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222224, 0x6666666666666666, 0x3333333333333334, x1, 480, x2)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x6666666666666667, x1, 488, x2)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x6666666642620446, 0x6666666666666666, -0xb504f332, x1, 496, x2)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x24046224, 0x6666666666666666, 0xb504f334, x1, 504, x2)
+
+inst_320:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x1, -0xb504f333, 0x3, x1, 512, x2)
+
+inst_321:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x5555555540510445, -0xb504f333, 0x5555555555555555, x1, 520, x2)
+
+inst_322:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaa0aaa0888, -0xb504f333, -0x5555555555555556, x1, 528, x2)
+
+inst_323:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x5, -0xb504f333, 0x5, x1, 536, x2)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x3333333302330001, -0xb504f333, 0x3333333333333333, x1, 544, x2)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x6666666642620444, -0xb504f333, 0x6666666666666666, x1, 552, x2)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, -0xb504f333, x1, 560, x2)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x1, -0xb504f333, 0xb504f333, x1, 568, x2)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, -0xb504f333, 0x2, x1, 576, x2)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x5555555540510444, -0xb504f333, 0x5555555555555554, x1, 584, x2)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, -0xb504f333, 0x0, x1, 592, x2)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb504f333, 0x4, x1, 600, x2)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x3333333302330000, -0xb504f333, 0x3333333333333332, x1, 608, x2)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x6666666642620445, -0xb504f333, 0x6666666666666665, x1, 616, x2)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x0, -0xb504f333, 0xb504f332, x1, 624, x2)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x5555555540510444, -0xb504f333, 0x5555555555555556, x1, 632, x2)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaa0aaa0889, -0xb504f333, -0x5555555555555555, x1, 640, x2)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb504f333, 0x6, x1, 648, x2)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x3333333302330004, -0xb504f333, 0x3333333333333334, x1, 656, x2)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x6666666642620445, -0xb504f333, 0x6666666666666667, x1, 664, x2)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0xffffffff4afb0ccc, -0xb504f333, -0xb504f332, x1, 672, x2)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb504f333, 0xb504f334, x1, 680, x2)
+
+inst_342:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x3, 0xb504f333, 0x3, x1, 688, x2)
+
+inst_343:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x15045111, 0xb504f333, 0x5555555555555555, x1, 696, x2)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0xa000a222, 0xb504f333, -0x5555555555555556, x1, 704, x2)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x1, 0xb504f333, 0x5, x1, 712, x2)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x31003333, 0xb504f333, 0x3333333333333333, x1, 720, x2)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x24046222, 0xb504f333, 0x6666666666666666, x1, 728, x2)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x1, 0xb504f333, -0xb504f333, x1, 736, x2)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0xb504f333, 0xb504f333, 0xb504f333, x1, 744, x2)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0xb504f333, 0x2, x1, 752, x2)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x15045110, 0xb504f333, 0x5555555555555554, x1, 760, x2)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504f333, 0x0, x1, 768, x2)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504f333, 0x4, x1, 776, x2)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x31003332, 0xb504f333, 0x3333333333333332, x1, 784, x2)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x24046221, 0xb504f333, 0x6666666666666665, x1, 792, x2)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0xb504f332, 0xb504f333, 0xb504f332, x1, 800, x2)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x15045112, 0xb504f333, 0x5555555555555556, x1, 808, x2)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0xa000a223, 0xb504f333, -0x5555555555555555, x1, 816, x2)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, 0xb504f333, 0x6, x1, 824, x2)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x31003330, 0xb504f333, 0x3333333333333334, x1, 832, x2)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x24046223, 0xb504f333, 0x6666666666666667, x1, 840, x2)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x2, 0xb504f333, -0xb504f332, x1, 848, x2)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0xb504f330, 0xb504f333, 0xb504f334, x1, 856, x2)
+
+inst_364:
+// rs1_val==2 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x3, x1, 864, x2)
+
+inst_365:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x5555555555555555, x1, 872, x2)
+
+inst_366:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, -0x5555555555555556, x1, 880, x2)
+
+inst_367:
+// rs1_val==2 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x5, x1, 888, x2)
+
+inst_368:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x3333333333333333, x1, 896, x2)
+
+inst_369:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x6666666666666666, x1, 904, x2)
+
+inst_370:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, -0xb504f333, x1, 912, x2)
+
+inst_371:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0xb504f333, x1, 920, x2)
+
+inst_372:
+// rs1_val==2 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x2, x1, 928, x2)
+
+inst_373:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x5555555555555554, x1, 936, x2)
+
+inst_374:
+// rs1_val==2 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x0, x1, 944, x2)
+
+inst_375:
+// rs1_val==2 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x4, x1, 952, x2)
+
+inst_376:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x3333333333333332, x1, 960, x2)
+
+inst_377:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x6666666666666665, x1, 968, x2)
+
+inst_378:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0xb504f332, x1, 976, x2)
+
+inst_379:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x5555555555555556, x1, 984, x2)
+
+inst_380:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, -0x5555555555555555, x1, 992, x2)
+
+inst_381:
+// rs1_val==2 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x6, x1, 1000, x2)
+
+inst_382:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0x3333333333333334, x1, 1008, x2)
+
+inst_383:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, 0x6666666666666667, x1, 1016, x2)
+
+inst_384:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x2, -0xb504f332, x1, 1024, x2)
+
+inst_385:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x2, 0xb504f334, x1, 1032, x2)
+
+inst_386:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5555555555555554, 0x3, x1, 1040, x2)
+
+inst_387:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x5555555555555555, x1, 1048, x2)
+
+inst_388:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5555555555555554, -0x5555555555555556, x1, 1056, x2)
+
+inst_389:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5555555555555554, 0x5, x1, 1064, x2)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111110, 0x5555555555555554, 0x3333333333333333, x1, 1072, x2)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444444, 0x5555555555555554, 0x6666666666666666, x1, 1080, x2)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x5555555540510444, 0x5555555555555554, -0xb504f333, x1, 1088, x2)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x15045110, 0x5555555555555554, 0xb504f333, x1, 1096, x2)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5555555555555554, 0x2, x1, 1104, x2)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x5555555555555554, x1, 1112, x2)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5555555555555554, 0x0, x1, 1120, x2)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5555555555555554, 0x4, x1, 1128, x2)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111110, 0x5555555555555554, 0x3333333333333332, x1, 1136, x2)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444444, 0x5555555555555554, 0x6666666666666665, x1, 1144, x2)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x15045110, 0x5555555555555554, 0xb504f332, x1, 1152, x2)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x5555555555555556, x1, 1160, x2)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5555555555555554, -0x5555555555555555, x1, 1168, x2)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5555555555555554, 0x6, x1, 1176, x2)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111114, 0x5555555555555554, 0x3333333333333334, x1, 1184, x2)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444444, 0x5555555555555554, 0x6666666666666667, x1, 1192, x2)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x5555555540510444, 0x5555555555555554, -0xb504f332, x1, 1200, x2)
+
+inst_407:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x15045114, 0x5555555555555554, 0xb504f334, x1, 1208, x2)
+
+inst_408:
+// rs1_val==0 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x3, x1, 1216, x2)
+
+inst_409:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x5555555555555555, x1, 1224, x2)
+
+inst_410:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, -0x5555555555555556, x1, 1232, x2)
+
+inst_411:
+// rs1_val==0 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x5, x1, 1240, x2)
+
+inst_412:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x3333333333333333, x1, 1248, x2)
+
+inst_413:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x6666666666666666, x1, 1256, x2)
+
+inst_414:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, -0xb504f333, x1, 1264, x2)
+
+inst_415:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0xb504f333, x1, 1272, x2)
+
+inst_416:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, -0x5555555555555556, x1, 1280, x2)
+
+inst_417:
+// rs1_val==4 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x5, x1, 1288, x2)
+
+inst_418:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0x3333333333333333, x1, 1296, x2)
+
+inst_419:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x6666666666666666, x1, 1304, x2)
+
+inst_420:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, -0xb504f333, x1, 1312, x2)
+
+inst_421:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0xb504f333, x1, 1320, x2)
+
+inst_422:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x5555555555555554, x1, 1328, x2)
+
+inst_423:
+// rs1_val==4 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0x0, x1, 1336, x2)
+
+inst_424:
+// rs1_val==4 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x4, x1, 1344, x2)
+
+inst_425:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0x3333333333333332, x1, 1352, x2)
+
+inst_426:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x6666666666666665, x1, 1360, x2)
+
+inst_427:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0xb504f332, x1, 1368, x2)
+
+inst_428:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x5555555555555556, x1, 1376, x2)
+
+inst_429:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, -0x5555555555555555, x1, 1384, x2)
+
+inst_430:
+// rs1_val==4 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x6, x1, 1392, x2)
+
+inst_431:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x3333333333333334, x1, 1400, x2)
+
+inst_432:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x6666666666666667, x1, 1408, x2)
+
+inst_433:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, -0xb504f332, x1, 1416, x2)
+
+inst_434:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0xb504f334, x1, 1424, x2)
+
+inst_435:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3333333333333332, 0x3, x1, 1432, x2)
+
+inst_436:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111110, 0x3333333333333332, 0x5555555555555555, x1, 1440, x2)
+
+inst_437:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, 0x3333333333333332, -0x5555555555555556, x1, 1448, x2)
+
+inst_438:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3333333333333332, 0x5, x1, 1456, x2)
+
+inst_439:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x3333333333333333, x1, 1464, x2)
+
+inst_440:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, 0x3333333333333332, 0x6666666666666666, x1, 1472, x2)
+
+inst_441:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x3333333302330000, 0x3333333333333332, -0xb504f333, x1, 1480, x2)
+
+inst_442:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x31003332, 0x3333333333333332, 0xb504f333, x1, 1488, x2)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3333333333333332, 0x2, x1, 1496, x2)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111110, 0x3333333333333332, 0x5555555555555554, x1, 1504, x2)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3333333333333332, 0x0, x1, 1512, x2)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3333333333333332, 0x4, x1, 1520, x2)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x3333333333333332, x1, 1528, x2)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222220, 0x3333333333333332, 0x6666666666666665, x1, 1536, x2)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x31003332, 0x3333333333333332, 0xb504f332, x1, 1544, x2)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111112, 0x3333333333333332, 0x5555555555555556, x1, 1552, x2)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, 0x3333333333333332, -0x5555555555555555, x1, 1560, x2)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x3333333333333332, 0x6, x1, 1568, x2)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x3333333333333330, 0x3333333333333332, 0x3333333333333334, x1, 1576, x2)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, 0x3333333333333332, 0x6666666666666667, x1, 1584, x2)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x3333333302330002, 0x3333333333333332, -0xb504f332, x1, 1592, x2)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x31003330, 0x3333333333333332, 0xb504f334, x1, 1600, x2)
+
+inst_457:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x1, 0x6666666666666665, 0x3, x1, 1608, x2)
+
+inst_458:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444445, 0x6666666666666665, 0x5555555555555555, x1, 1616, x2)
+
+inst_459:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222220, 0x6666666666666665, -0x5555555555555556, x1, 1624, x2)
+
+inst_460:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x6666666666666665, 0x5, x1, 1632, x2)
+
+inst_461:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222221, 0x6666666666666665, 0x3333333333333333, x1, 1640, x2)
+
+inst_462:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x6666666666666664, 0x6666666666666665, 0x6666666666666666, x1, 1648, x2)
+
+inst_463:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x6666666642620445, 0x6666666666666665, -0xb504f333, x1, 1656, x2)
+
+inst_464:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x24046221, 0x6666666666666665, 0xb504f333, x1, 1664, x2)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x6666666666666665, 0x2, x1, 1672, x2)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444444, 0x6666666666666665, 0x5555555555555554, x1, 1680, x2)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x6666666666666665, 0x0, x1, 1688, x2)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6666666666666665, 0x4, x1, 1696, x2)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222220, 0x6666666666666665, 0x3333333333333332, x1, 1704, x2)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x6666666666666665, x1, 1712, x2)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x24046220, 0x6666666666666665, 0xb504f332, x1, 1720, x2)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444444, 0x6666666666666665, 0x5555555555555556, x1, 1728, x2)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222221, 0x6666666666666665, -0x5555555555555555, x1, 1736, x2)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6666666666666665, 0x6, x1, 1744, x2)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222224, 0x6666666666666665, 0x3333333333333334, x1, 1752, x2)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x6666666666666667, x1, 1760, x2)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x6666666642620444, 0x6666666666666665, -0xb504f332, x1, 1768, x2)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x24046224, 0x6666666666666665, 0xb504f334, x1, 1776, x2)
+
+inst_479:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, 0xb504f332, 0x3, x1, 1784, x2)
+
+inst_480:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x15045110, 0xb504f332, 0x5555555555555555, x1, 1792, x2)
+
+inst_481:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0xa000a222, 0xb504f332, -0x5555555555555556, x1, 1800, x2)
+
+inst_482:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504f332, 0x5, x1, 1808, x2)
+
+inst_483:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x31003332, 0xb504f332, 0x3333333333333333, x1, 1816, x2)
+
+inst_484:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x24046222, 0xb504f332, 0x6666666666666666, x1, 1824, x2)
+
+inst_485:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504f332, -0xb504f333, x1, 1832, x2)
+
+inst_486:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0xb504f332, 0xb504f332, 0xb504f333, x1, 1840, x2)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0xb504f332, 0x2, x1, 1848, x2)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x15045110, 0xb504f332, 0x5555555555555554, x1, 1856, x2)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504f332, 0x0, x1, 1864, x2)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504f332, 0x4, x1, 1872, x2)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x31003332, 0xb504f332, 0x3333333333333332, x1, 1880, x2)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x24046220, 0xb504f332, 0x6666666666666665, x1, 1888, x2)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0xb504f332, 0xb504f332, 0xb504f332, x1, 1896, x2)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x15045112, 0xb504f332, 0x5555555555555556, x1, 1904, x2)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0xa000a222, 0xb504f332, -0x5555555555555555, x1, 1912, x2)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, 0xb504f332, 0x6, x1, 1920, x2)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x31003330, 0xb504f332, 0x3333333333333334, x1, 1928, x2)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x24046222, 0xb504f332, 0x6666666666666667, x1, 1936, x2)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x2, 0xb504f332, -0xb504f332, x1, 1944, x2)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0xb504f330, 0xb504f332, 0xb504f334, x1, 1952, x2)
+
+inst_501:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x5555555555555556, 0x3, x1, 1960, x2)
+
+inst_502:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x5555555555555555, x1, 1968, x2)
+
+inst_503:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x5555555555555556, -0x5555555555555556, x1, 1976, x2)
+
+inst_504:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5555555555555556, 0x5, x1, 1984, x2)
+
+inst_505:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111112, 0x5555555555555556, 0x3333333333333333, x1, 1992, x2)
+
+inst_506:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444446, 0x5555555555555556, 0x6666666666666666, x1, 2000, x2)
+
+inst_507:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x5555555540510444, 0x5555555555555556, -0xb504f333, x1, 2008, x2)
+
+inst_508:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x15045112, 0x5555555555555556, 0xb504f333, x1, 2016, x2)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x5555555555555556, 0x2, x1, 2024, x2)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x5555555555555554, x1, 2032, x2)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x5555555555555556, 0x0, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_3)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x5555555555555556, 0x4, x1, 0, x2)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111112, 0x5555555555555556, 0x3333333333333332, x1, 8, x2)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444444, 0x5555555555555556, 0x6666666666666665, x1, 16, x2)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x15045112, 0x5555555555555556, 0xb504f332, x1, 24, x2)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x5555555555555556, x1, 32, x2)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x5555555555555556, -0x5555555555555555, x1, 40, x2)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x5555555555555556, 0x6, x1, 48, x2)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111114, 0x5555555555555556, 0x3333333333333334, x1, 56, x2)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444446, 0x5555555555555556, 0x6666666666666667, x1, 64, x2)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x5555555540510446, 0x5555555555555556, -0xb504f332, x1, 72, x2)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x15045114, 0x5555555555555556, 0xb504f334, x1, 80, x2)
+
+inst_523:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x3, -0x5555555555555555, 0x3, x1, 88, x2)
+
+inst_524:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x1, -0x5555555555555555, 0x5555555555555555, x1, 96, x2)
+
+inst_525:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555555, -0x5555555555555556, x1, 104, x2)
+
+inst_526:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x1, -0x5555555555555555, 0x5, x1, 112, x2)
+
+inst_527:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222223, -0x5555555555555555, 0x3333333333333333, x1, 120, x2)
+
+inst_528:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, -0x5555555555555555, 0x6666666666666666, x1, 128, x2)
+
+inst_529:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaa0aaa0889, -0x5555555555555555, -0xb504f333, x1, 136, x2)
+
+inst_530:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0xa000a223, -0x5555555555555555, 0xb504f333, x1, 144, x2)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x5555555555555555, 0x2, x1, 152, x2)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x5555555555555555, 0x5555555555555554, x1, 160, x2)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x5555555555555555, 0x0, x1, 168, x2)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, -0x5555555555555555, 0x4, x1, 176, x2)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, -0x5555555555555555, 0x3333333333333332, x1, 184, x2)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222221, -0x5555555555555555, 0x6666666666666665, x1, 192, x2)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0xa000a222, -0x5555555555555555, 0xb504f332, x1, 200, x2)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x5555555555555555, 0x5555555555555556, x1, 208, x2)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, -0x5555555555555555, x1, 216, x2)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x2, -0x5555555555555555, 0x6, x1, 224, x2)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222220, -0x5555555555555555, 0x3333333333333334, x1, 232, x2)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222223, -0x5555555555555555, 0x6666666666666667, x1, 240, x2)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaa0aaa088a, -0x5555555555555555, -0xb504f332, x1, 248, x2)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0xa000a220, -0x5555555555555555, 0xb504f334, x1, 256, x2)
+
+inst_545:
+// rs1_val==6 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, 0x3, x1, 264, x2)
+
+inst_546:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0x5555555555555555, x1, 272, x2)
+
+inst_547:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, -0x5555555555555556, x1, 280, x2)
+
+inst_548:
+// rs1_val==6 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0x5, x1, 288, x2)
+
+inst_549:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, 0x3333333333333333, x1, 296, x2)
+
+inst_550:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6, 0x6666666666666666, x1, 304, x2)
+
+inst_551:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, -0xb504f333, x1, 312, x2)
+
+inst_552:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, 0xb504f333, x1, 320, x2)
+
+inst_553:
+// rs1_val==6 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, 0x2, x1, 328, x2)
+
+inst_554:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0x5555555555555554, x1, 336, x2)
+
+inst_555:
+// rs1_val==6 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x6, 0x0, x1, 344, x2)
+
+inst_556:
+// rs1_val==6 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0x4, x1, 352, x2)
+
+inst_557:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, 0x3333333333333332, x1, 360, x2)
+
+inst_558:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0x6666666666666665, x1, 368, x2)
+
+inst_559:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, 0xb504f332, x1, 376, x2)
+
+inst_560:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6, 0x5555555555555556, x1, 384, x2)
+
+inst_561:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6, -0x5555555555555555, x1, 392, x2)
+
+inst_562:
+// rs1_val==6 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6, 0x6, x1, 400, x2)
+
+inst_563:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0x3333333333333334, x1, 408, x2)
+
+inst_564:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6, 0x6666666666666667, x1, 416, x2)
+
+inst_565:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6, -0xb504f332, x1, 424, x2)
+
+inst_566:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6, 0xb504f334, x1, 432, x2)
+
+inst_567:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3333333333333334, 0x3, x1, 440, x2)
+
+inst_568:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111114, 0x3333333333333334, 0x5555555555555555, x1, 448, x2)
+
+inst_569:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222220, 0x3333333333333334, -0x5555555555555556, x1, 456, x2)
+
+inst_570:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x3333333333333334, 0x5, x1, 464, x2)
+
+inst_571:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x3333333333333330, 0x3333333333333334, 0x3333333333333333, x1, 472, x2)
+
+inst_572:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222224, 0x3333333333333334, 0x6666666666666666, x1, 480, x2)
+
+inst_573:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x3333333302330004, 0x3333333333333334, -0xb504f333, x1, 488, x2)
+
+inst_574:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x31003330, 0x3333333333333334, 0xb504f333, x1, 496, x2)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3333333333333334, 0x2, x1, 504, x2)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111114, 0x3333333333333334, 0x5555555555555554, x1, 512, x2)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x3333333333333334, 0x0, x1, 520, x2)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x3333333333333334, 0x4, x1, 528, x2)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x3333333333333330, 0x3333333333333334, 0x3333333333333332, x1, 536, x2)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222224, 0x3333333333333334, 0x6666666666666665, x1, 544, x2)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x31003330, 0x3333333333333334, 0xb504f332, x1, 552, x2)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x1111111111111114, 0x3333333333333334, 0x5555555555555556, x1, 560, x2)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222220, 0x3333333333333334, -0x5555555555555555, x1, 568, x2)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x3333333333333334, 0x6, x1, 576, x2)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x3333333333333334, x1, 584, x2)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222224, 0x3333333333333334, 0x6666666666666667, x1, 592, x2)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x3333333302330004, 0x3333333333333334, -0xb504f332, x1, 600, x2)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x31003334, 0x3333333333333334, 0xb504f334, x1, 608, x2)
+
+inst_589:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x3, 0x6666666666666667, 0x3, x1, 616, x2)
+
+inst_590:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444445, 0x6666666666666667, 0x5555555555555555, x1, 624, x2)
+
+inst_591:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, 0x6666666666666667, -0x5555555555555556, x1, 632, x2)
+
+inst_592:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x5, 0x6666666666666667, 0x5, x1, 640, x2)
+
+inst_593:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222223, 0x6666666666666667, 0x3333333333333333, x1, 648, x2)
+
+inst_594:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x6666666666666666, 0x6666666666666667, 0x6666666666666666, x1, 656, x2)
+
+inst_595:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x6666666642620445, 0x6666666666666667, -0xb504f333, x1, 664, x2)
+
+inst_596:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x24046223, 0x6666666666666667, 0xb504f333, x1, 672, x2)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, 0x6666666666666667, 0x2, x1, 680, x2)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444444, 0x6666666666666667, 0x5555555555555554, x1, 688, x2)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x6666666666666667, 0x0, x1, 696, x2)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x6666666666666667, 0x4, x1, 704, x2)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222222, 0x6666666666666667, 0x3333333333333332, x1, 712, x2)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x6666666666666665, 0x6666666666666667, 0x6666666666666665, x1, 720, x2)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x24046222, 0x6666666666666667, 0xb504f332, x1, 728, x2)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x4444444444444446, 0x6666666666666667, 0x5555555555555556, x1, 736, x2)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222223, 0x6666666666666667, -0x5555555555555555, x1, 744, x2)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x6, 0x6666666666666667, 0x6, x1, 752, x2)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x2222222222222224, 0x6666666666666667, 0x3333333333333334, x1, 760, x2)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x6666666666666667, x1, 768, x2)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x6666666642620446, 0x6666666666666667, -0xb504f332, x1, 776, x2)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x24046224, 0x6666666666666667, 0xb504f334, x1, 784, x2)
+
+inst_611:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x2, -0xb504f332, 0x3, x1, 792, x2)
+
+inst_612:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x5555555540510444, -0xb504f332, 0x5555555555555555, x1, 800, x2)
+
+inst_613:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaa0aaa088a, -0xb504f332, -0x5555555555555556, x1, 808, x2)
+
+inst_614:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb504f332, 0x5, x1, 816, x2)
+
+inst_615:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x3333333302330002, -0xb504f332, 0x3333333333333333, x1, 824, x2)
+
+inst_616:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x6666666642620446, -0xb504f332, 0x6666666666666666, x1, 832, x2)
+
+inst_617:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0xffffffff4afb0ccc, -0xb504f332, -0xb504f333, x1, 840, x2)
+
+inst_618:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x2, -0xb504f332, 0xb504f333, x1, 848, x2)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x2, -0xb504f332, 0x2, x1, 856, x2)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x5555555540510444, -0xb504f332, 0x5555555555555554, x1, 864, x2)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, -0xb504f332, 0x0, x1, 872, x2)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb504f332, 0x4, x1, 880, x2)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x3333333302330002, -0xb504f332, 0x3333333333333332, x1, 888, x2)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x6666666642620444, -0xb504f332, 0x6666666666666665, x1, 896, x2)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x2, -0xb504f332, 0xb504f332, x1, 904, x2)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x5555555540510446, -0xb504f332, 0x5555555555555556, x1, 912, x2)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0xaaaaaaaa0aaa088a, -0xb504f332, -0x5555555555555555, x1, 920, x2)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x6, -0xb504f332, 0x6, x1, 928, x2)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x3333333302330004, -0xb504f332, 0x3333333333333334, x1, 936, x2)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x6666666642620446, -0xb504f332, 0x6666666666666667, x1, 944, x2)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0xffffffff4afb0cce, -0xb504f332, -0xb504f332, x1, 952, x2)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x4, -0xb504f332, 0xb504f334, x1, 960, x2)
+
+inst_633:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504f334, 0x3, x1, 968, x2)
+
+inst_634:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x15045114, 0xb504f334, 0x5555555555555555, x1, 976, x2)
+
+inst_635:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0xa000a220, 0xb504f334, -0x5555555555555556, x1, 984, x2)
+
+inst_636:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5
+TEST_CR_OP( c.and, x10, x11, 0x4, 0xb504f334, 0x5, x1, 992, x2)
+
+inst_637:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_CR_OP( c.and, x10, x11, 0x31003330, 0xb504f334, 0x3333333333333333, x1, 1000, x2)
+
+inst_638:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_CR_OP( c.and, x10, x11, 0x24046224, 0xb504f334, 0x6666666666666666, x1, 1008, x2)
+
+inst_639:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0x4, 0xb504f334, -0xb504f333, x1, 1016, x2)
+
+inst_640:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f333
+TEST_CR_OP( c.and, x10, x11, 0xb504f330, 0xb504f334, 0xb504f333, x1, 1024, x2)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504f334, 0x2, x1, 1032, x2)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x15045114, 0xb504f334, 0x5555555555555554, x1, 1040, x2)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0xb504f334, 0x0, x1, 1048, x2)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x4, 0xb504f334, 0x4, x1, 1056, x2)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x31003330, 0xb504f334, 0x3333333333333332, x1, 1064, x2)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x24046224, 0xb504f334, 0x6666666666666665, x1, 1072, x2)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0xb504f330, 0xb504f334, 0xb504f332, x1, 1080, x2)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x15045114, 0xb504f334, 0x5555555555555556, x1, 1088, x2)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0xa000a220, 0xb504f334, -0x5555555555555555, x1, 1096, x2)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x4, 0xb504f334, 0x6, x1, 1104, x2)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x31003334, 0xb504f334, 0x3333333333333334, x1, 1112, x2)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x24046224, 0xb504f334, 0x6666666666666667, x1, 1120, x2)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x4, 0xb504f334, -0xb504f332, x1, 1128, x2)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0xb504f334, 0xb504f334, 0xb504f334, x1, 1136, x2)
+
+inst_655:
+// rs1_val==0 and rs2_val==2,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x2
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x2, x1, 1144, x2)
+
+inst_656:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555554
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x5555555555555554, x1, 1152, x2)
+
+inst_657:
+// rs1_val==0 and rs2_val==0,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x0
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x0, x1, 1160, x2)
+
+inst_658:
+// rs1_val==0 and rs2_val==4,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x4
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x4, x1, 1168, x2)
+
+inst_659:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333332
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x3333333333333332, x1, 1176, x2)
+
+inst_660:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666665
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x6666666666666665, x1, 1184, x2)
+
+inst_661:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0xb504f332, x1, 1192, x2)
+
+inst_662:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555556
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x5555555555555556, x1, 1200, x2)
+
+inst_663:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, -0x5555555555555555, x1, 1208, x2)
+
+inst_664:
+// rs1_val==0 and rs2_val==6,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x6
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x6, x1, 1216, x2)
+
+inst_665:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333334
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x3333333333333334, x1, 1224, x2)
+
+inst_666:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666667
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0x6666666666666667, x1, 1232, x2)
+
+inst_667:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f332
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, -0xb504f332, x1, 1240, x2)
+
+inst_668:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f334
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x0, 0xb504f334, x1, 1248, x2)
+
+inst_669:
+// rs1_val==4 and rs2_val==3,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x3
+TEST_CR_OP( c.and, x10, x11, 0x0, 0x4, 0x3, x1, 1256, x2)
+
+inst_670:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: c.and; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555555
+TEST_CR_OP( c.and, x10, x11, 0x4, 0x4, 0x5555555555555555, x1, 1264, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_3:
+ .fill 159*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/candi-01.S b/riscof/suite/rv64i_m/C/candi-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..53a81ef63bc536e6631c7843d9d9711c8f108032
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/candi-01.S
@@ -0,0 +1,2269 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.andi instruction of the RISC-V C extension for the candi covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",candi)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1==x9, rs1_val == imm_val, rs1_val > 0 and imm_val > 0
+// opcode: c.andi; op1:x9; immval:0x9
+TEST_CI_OP( c.andi, x9, 0x9, 0x9, 0x9, x1, 0, x2)
+
+inst_1:
+// rs1==x10, rs1_val != imm_val, rs1_val == -9, imm_val == -3, rs1_val < 0 and imm_val < 0
+// opcode: c.andi; op1:x10; immval:-0x3
+TEST_CI_OP( c.andi, x10, 0xfffffffffffffff5, -0x9, -0x3, x1, 8, x2)
+
+inst_2:
+// rs1==x11, rs1_val > 0 and imm_val < 0, rs1_val == 4
+// opcode: c.andi; op1:x11; immval:-0xa
+TEST_CI_OP( c.andi, x11, 0x4, 0x4, -0xa, x1, 16, x2)
+
+inst_3:
+// rs1==x12, rs1_val < 0 and imm_val > 0, rs1_val == -129
+// opcode: c.andi; op1:x12; immval:0x3
+TEST_CI_OP( c.andi, x12, 0x3, -0x81, 0x3, x1, 24, x2)
+
+inst_4:
+// rs1==x14, imm_val == (-2**(6-1)), imm_val == -32, rs1_val == 8192
+// opcode: c.andi; op1:x14; immval:-0x20
+TEST_CI_OP( c.andi, x14, 0x2000, 0x2000, -0x20, x1, 32, x2)
+
+inst_5:
+// rs1==x8, imm_val == 0, rs1_val == 70368744177664
+// opcode: c.andi; op1:x8; immval:0x0
+TEST_CI_OP( c.andi, x8, 0x0, 0x400000000000, 0x0, x1, 40, x2)
+
+inst_6:
+// rs1==x15, imm_val == (2**(6-1)-1), imm_val == 31, rs1_val == -68719476737
+// opcode: c.andi; op1:x15; immval:0x1f
+TEST_CI_OP( c.andi, x15, 0x1f, -0x1000000001, 0x1f, x1, 48, x2)
+
+inst_7:
+// rs1==x13, imm_val == 1, rs1_val == 0
+// opcode: c.andi; op1:x13; immval:0x1
+TEST_CI_OP( c.andi, x13, 0x0, 0x0, 0x1, x1, 56, x2)
+
+inst_8:
+// rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x8000000000000000, -0x8000000000000000, -0x4, x1, 64, x2)
+
+inst_9:
+// rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, 0x7fffffffffffffff, 0x5, x1, 72, x2)
+
+inst_10:
+// rs1_val == 1, imm_val == -2
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x1, -0x2, x1, 80, x2)
+
+inst_11:
+// imm_val == 2, rs1_val == 268435456
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x10000000, 0x2, x1, 88, x2)
+
+inst_12:
+// imm_val == 4, rs1_val==-6148914691236517205 and imm_val==4
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, -0x5555555555555555, 0x4, x1, 96, x2)
+
+inst_13:
+// imm_val == 8, rs1_val == -262145
+// opcode: c.andi; op1:x10; immval:0x8
+TEST_CI_OP( c.andi, x10, 0x8, -0x40001, 0x8, x1, 104, x2)
+
+inst_14:
+// imm_val == 16, rs1_val == -4611686018427387905
+// opcode: c.andi; op1:x10; immval:0x10
+TEST_CI_OP( c.andi, x10, 0x10, -0x4000000000000001, 0x10, x1, 112, x2)
+
+inst_15:
+// imm_val == -5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x3, 0x7, -0x5, x1, 120, x2)
+
+inst_16:
+// imm_val == -9, rs1_val == -32769
+// opcode: c.andi; op1:x10; immval:-0x9
+TEST_CI_OP( c.andi, x10, 0xffffffffffff7ff7, -0x8001, -0x9, x1, 128, x2)
+
+inst_17:
+// imm_val == -17, rs1_val == 18014398509481984
+// opcode: c.andi; op1:x10; immval:-0x11
+TEST_CI_OP( c.andi, x10, 0x40000000000000, 0x40000000000000, -0x11, x1, 136, x2)
+
+inst_18:
+// imm_val == 21,
+// opcode: c.andi; op1:x10; immval:0x15
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x15, x1, 144, x2)
+
+inst_19:
+// imm_val == -22, rs1_val == 36028797018963968
+// opcode: c.andi; op1:x10; immval:-0x16
+TEST_CI_OP( c.andi, x10, 0x80000000000000, 0x80000000000000, -0x16, x1, 152, x2)
+
+inst_20:
+// rs1_val == 2, rs1_val==2 and imm_val==-2
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, -0x2, x1, 160, x2)
+
+inst_21:
+// rs1_val == 8,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x8, 0x0, x1, 168, x2)
+
+inst_22:
+// rs1_val == 16,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x10, 0x4, x1, 176, x2)
+
+inst_23:
+// rs1_val == 32,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x20, 0x20, -0x5, x1, 184, x2)
+
+inst_24:
+// rs1_val == 64,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x40, 0x3, x1, 192, x2)
+
+inst_25:
+// rs1_val == 128,
+// opcode: c.andi; op1:x10; immval:0x1
+TEST_CI_OP( c.andi, x10, 0x0, 0x80, 0x1, x1, 200, x2)
+
+inst_26:
+// rs1_val == 256,
+// opcode: c.andi; op1:x10; immval:-0x3
+TEST_CI_OP( c.andi, x10, 0x100, 0x100, -0x3, x1, 208, x2)
+
+inst_27:
+// rs1_val == 512,
+// opcode: c.andi; op1:x10; immval:0x15
+TEST_CI_OP( c.andi, x10, 0x0, 0x200, 0x15, x1, 216, x2)
+
+inst_28:
+// rs1_val == 1024,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x400, 0x400, -0x1, x1, 224, x2)
+
+inst_29:
+// rs1_val == 2048,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x0, 0x800, 0x6, x1, 232, x2)
+
+inst_30:
+// rs1_val == 4096,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x1000, 0x2, x1, 240, x2)
+
+inst_31:
+// rs1_val == 16384,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x4000, 0x5, x1, 248, x2)
+
+inst_32:
+// rs1_val == 32768,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x8000, 0x8000, -0x2, x1, 256, x2)
+
+inst_33:
+// rs1_val == 65536,
+// opcode: c.andi; op1:x10; immval:-0x16
+TEST_CI_OP( c.andi, x10, 0x10000, 0x10000, -0x16, x1, 264, x2)
+
+inst_34:
+// rs1_val == 131072,
+// opcode: c.andi; op1:x10; immval:-0x20
+TEST_CI_OP( c.andi, x10, 0x20000, 0x20000, -0x20, x1, 272, x2)
+
+inst_35:
+// rs1_val == 262144,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x40000, 0x40000, -0x1, x1, 280, x2)
+
+inst_36:
+// rs1_val == 524288,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x80000, 0x0, x1, 288, x2)
+
+inst_37:
+// rs1_val == 1048576,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x0, 0x100000, 0x6, x1, 296, x2)
+
+inst_38:
+// rs1_val == 2097152,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x200000, 0x9, x1, 304, x2)
+
+inst_39:
+// rs1_val == 4194304,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x400000, 0x9, x1, 312, x2)
+
+inst_40:
+// rs1_val == 8388608,
+// opcode: c.andi; op1:x10; immval:0xf
+TEST_CI_OP( c.andi, x10, 0x0, 0x800000, 0xf, x1, 320, x2)
+
+inst_41:
+// rs1_val == 16777216,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x1000000, 0x1000000, -0x1, x1, 328, x2)
+
+inst_42:
+// rs1_val == 33554432,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x2000000, 0x5, x1, 336, x2)
+
+inst_43:
+// rs1_val == 67108864,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x4000000, 0x4, x1, 344, x2)
+
+inst_44:
+// rs1_val == 134217728,
+// opcode: c.andi; op1:x10; immval:0x1
+TEST_CI_OP( c.andi, x10, 0x0, 0x8000000, 0x1, x1, 352, x2)
+
+inst_45:
+// rs1_val == 536870912,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x20000000, 0x20000000, -0x5, x1, 360, x2)
+
+inst_46:
+// rs1_val == 1073741824,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x40000000, 0x4, x1, 368, x2)
+
+inst_47:
+// rs1_val == 2147483648,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x80000000, 0x4, x1, 376, x2)
+
+inst_48:
+// rs1_val == 4294967296,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x100000000, 0x5, x1, 384, x2)
+
+inst_49:
+// rs1_val == 8589934592,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x200000000, 0x200000000, -0x2, x1, 392, x2)
+
+inst_50:
+// rs1_val == 17179869184,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x400000000, 0x9, x1, 400, x2)
+
+inst_51:
+// rs1_val == 34359738368,
+// opcode: c.andi; op1:x10; immval:-0x11
+TEST_CI_OP( c.andi, x10, 0x800000000, 0x800000000, -0x11, x1, 408, x2)
+
+inst_52:
+// rs1_val == 68719476736,
+// opcode: c.andi; op1:x10; immval:0x1
+TEST_CI_OP( c.andi, x10, 0x0, 0x1000000000, 0x1, x1, 416, x2)
+
+inst_53:
+// rs1_val == 137438953472,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x0, 0x2000000000, 0x6, x1, 424, x2)
+
+inst_54:
+// rs1_val == 274877906944,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x4000000000, 0x3, x1, 432, x2)
+
+inst_55:
+// rs1_val == 549755813888,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x8000000000, 0x4, x1, 440, x2)
+
+inst_56:
+// rs1_val == 1099511627776,
+// opcode: c.andi; op1:x10; immval:0x15
+TEST_CI_OP( c.andi, x10, 0x0, 0x10000000000, 0x15, x1, 448, x2)
+
+inst_57:
+// rs1_val == 2199023255552,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x20000000000, 0x4, x1, 456, x2)
+
+inst_58:
+// rs1_val == 4398046511104,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x40000000000, 0x4, x1, 464, x2)
+
+inst_59:
+// rs1_val == 8796093022208,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x80000000000, 0x4, x1, 472, x2)
+
+inst_60:
+// rs1_val == 17592186044416,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x100000000000, 0x4, x1, 480, x2)
+
+inst_61:
+// rs1_val == 35184372088832,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x200000000000, 0x4, x1, 488, x2)
+
+inst_62:
+// rs1_val == 140737488355328,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x800000000000, 0x3, x1, 496, x2)
+
+inst_63:
+// rs1_val == 281474976710656,
+// opcode: c.andi; op1:x10; immval:0x1f
+TEST_CI_OP( c.andi, x10, 0x0, 0x1000000000000, 0x1f, x1, 504, x2)
+
+inst_64:
+// rs1_val == 562949953421312,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x2000000000000, 0x3, x1, 512, x2)
+
+inst_65:
+// rs1_val == 1125899906842624,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x4000000000000, 0x0, x1, 520, x2)
+
+inst_66:
+// rs1_val == 2251799813685248,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x8000000000000, 0x5, x1, 528, x2)
+
+inst_67:
+// rs1_val == 4503599627370496,
+// opcode: c.andi; op1:x10; immval:-0x11
+TEST_CI_OP( c.andi, x10, 0x10000000000000, 0x10000000000000, -0x11, x1, 536, x2)
+
+inst_68:
+// rs1_val == 9007199254740992,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x20000000000000, 0x20000000000000, -0x2, x1, 544, x2)
+
+inst_69:
+// rs1_val == 72057594037927936,
+// opcode: c.andi; op1:x10; immval:-0xa
+TEST_CI_OP( c.andi, x10, 0x100000000000000, 0x100000000000000, -0xa, x1, 552, x2)
+
+inst_70:
+// rs1_val == 144115188075855872,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x200000000000000, 0x3, x1, 560, x2)
+
+inst_71:
+// rs1_val == 288230376151711744,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x400000000000000, 0x2, x1, 568, x2)
+
+inst_72:
+// rs1_val == 576460752303423488,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x800000000000000, 0x5, x1, 576, x2)
+
+inst_73:
+// rs1_val == 1152921504606846976,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x1000000000000000, 0x3, x1, 584, x2)
+
+inst_74:
+// rs1_val == 2305843009213693952,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x2000000000000000, 0x2000000000000000, -0x2, x1, 592, x2)
+
+inst_75:
+// rs1_val == 4611686018427387904,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x4000000000000000, 0x5, x1, 600, x2)
+
+inst_76:
+// rs1_val == -2,
+// opcode: c.andi; op1:x10; immval:-0x7
+TEST_CI_OP( c.andi, x10, 0xfffffffffffffff8, -0x2, -0x7, x1, 608, x2)
+
+inst_77:
+// rs1_val == -3,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xfffffffffffffffd, -0x3, -0x1, x1, 616, x2)
+
+inst_78:
+// rs1_val == -5,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xfffffffffffffff8, -0x5, -0x4, x1, 624, x2)
+
+inst_79:
+// rs1_val == -17,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x7, -0x11, 0x7, x1, 632, x2)
+
+inst_80:
+// rs1_val == -33,
+// opcode: c.andi; op1:x10; immval:-0x20
+TEST_CI_OP( c.andi, x10, 0xffffffffffffffc0, -0x21, -0x20, x1, 640, x2)
+
+inst_81:
+// rs1_val == -65,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, -0x41, 0x6, x1, 648, x2)
+
+inst_82:
+// rs1_val == -257,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x7, -0x101, 0x7, x1, 656, x2)
+
+inst_83:
+// rs1_val == -513,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, -0x201, 0x4, x1, 664, x2)
+
+inst_84:
+// rs1_val == -1025,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, -0x401, 0x0, x1, 672, x2)
+
+inst_85:
+// rs1_val == -2049,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, -0x801, 0x4, x1, 680, x2)
+
+inst_86:
+// rs1_val == -4097,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x7, -0x1001, 0x7, x1, 688, x2)
+
+inst_87:
+// rs1_val == -8193,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, -0x2001, 0x4, x1, 696, x2)
+
+inst_88:
+// rs1_val == -16385,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, -0x4001, 0x4, x1, 704, x2)
+
+inst_89:
+// rs1_val == -65537,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, -0x10001, 0x3, x1, 712, x2)
+
+inst_90:
+// rs1_val == -131073,
+// opcode: c.andi; op1:x10; immval:-0x3
+TEST_CI_OP( c.andi, x10, 0xfffffffffffdfffd, -0x20001, -0x3, x1, 720, x2)
+
+inst_91:
+// rs1_val == -524289,
+// opcode: c.andi; op1:x10; immval:-0xa
+TEST_CI_OP( c.andi, x10, 0xfffffffffff7fff6, -0x80001, -0xa, x1, 728, x2)
+
+inst_92:
+// rs1_val == -1048577,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xffffffffffeffffc, -0x100001, -0x4, x1, 736, x2)
+
+inst_93:
+// rs1_val == -2097153,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, -0x200001, 0x3, x1, 744, x2)
+
+inst_94:
+// rs1_val == -4194305,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, -0x400001, 0x4, x1, 752, x2)
+
+inst_95:
+// rs1_val == -8388609,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xffffffffff7fffff, -0x800001, -0x1, x1, 760, x2)
+
+inst_96:
+// rs1_val == -16777217,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xfffffffffefffffe, -0x1000001, -0x2, x1, 768, x2)
+
+inst_97:
+// rs1_val == -33554433,
+// opcode: c.andi; op1:x10; immval:-0x6
+TEST_CI_OP( c.andi, x10, 0xfffffffffdfffffa, -0x2000001, -0x6, x1, 776, x2)
+
+inst_98:
+// rs1_val == -67108865,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xfffffffffbfffffb, -0x4000001, -0x5, x1, 784, x2)
+
+inst_99:
+// rs1_val == -134217729,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xfffffffff7fffffe, -0x8000001, -0x2, x1, 792, x2)
+
+inst_100:
+// rs1_val == -268435457,
+// opcode: c.andi; op1:x10; immval:0xf
+TEST_CI_OP( c.andi, x10, 0xf, -0x10000001, 0xf, x1, 800, x2)
+
+inst_101:
+// rs1_val == -536870913,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xffffffffdffffffc, -0x20000001, -0x4, x1, 808, x2)
+
+inst_102:
+// rs1_val == -1073741825,
+// opcode: c.andi; op1:x10; immval:-0x11
+TEST_CI_OP( c.andi, x10, 0xffffffffbfffffef, -0x40000001, -0x11, x1, 816, x2)
+
+inst_103:
+// rs1_val == -2147483649,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, -0x80000001, 0x6, x1, 824, x2)
+
+inst_104:
+// rs1_val == -4294967297,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xfffffffefffffffe, -0x100000001, -0x2, x1, 832, x2)
+
+inst_105:
+// rs1_val == -8589934593,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xfffffffdfffffffb, -0x200000001, -0x5, x1, 840, x2)
+
+inst_106:
+// rs1_val == -17179869185,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, -0x400000001, 0x2, x1, 848, x2)
+
+inst_107:
+// rs1_val == -34359738369,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, -0x800000001, 0x0, x1, 856, x2)
+
+inst_108:
+// rs1_val == -137438953473,
+// opcode: c.andi; op1:x10; immval:-0x3
+TEST_CI_OP( c.andi, x10, 0xffffffdffffffffd, -0x2000000001, -0x3, x1, 864, x2)
+
+inst_109:
+// rs1_val == -274877906945,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x9, -0x4000000001, 0x9, x1, 872, x2)
+
+inst_110:
+// rs1_val == -549755813889,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, -0x8000000001, 0x6, x1, 880, x2)
+
+inst_111:
+// rs1_val == -1099511627777,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xfffffefffffffffe, -0x10000000001, -0x2, x1, 888, x2)
+
+inst_112:
+// rs1_val == -2199023255553,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, -0x20000000001, 0x5, x1, 896, x2)
+
+inst_113:
+// rs1_val == -4398046511105,
+// opcode: c.andi; op1:x10; immval:-0x20
+TEST_CI_OP( c.andi, x10, 0xfffffbffffffffe0, -0x40000000001, -0x20, x1, 904, x2)
+
+inst_114:
+// rs1_val == -8796093022209,
+// opcode: c.andi; op1:x10; immval:0xf
+TEST_CI_OP( c.andi, x10, 0xf, -0x80000000001, 0xf, x1, 912, x2)
+
+inst_115:
+// rs1_val == -17592186044417,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, -0x100000000001, 0x6, x1, 920, x2)
+
+inst_116:
+// rs1_val == -35184372088833,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, -0x200000000001, 0x5, x1, 928, x2)
+
+inst_117:
+// rs1_val == -70368744177665,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, -0x400000000001, 0x4, x1, 936, x2)
+
+inst_118:
+// rs1_val == -140737488355329,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xffff7ffffffffffe, -0x800000000001, -0x2, x1, 944, x2)
+
+inst_119:
+// rs1_val == -281474976710657,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, -0x1000000000001, 0x5, x1, 952, x2)
+
+inst_120:
+// rs1_val == -562949953421313,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, -0x2000000000001, 0x6, x1, 960, x2)
+
+inst_121:
+// rs1_val == -1125899906842625,
+// opcode: c.andi; op1:x10; immval:0xf
+TEST_CI_OP( c.andi, x10, 0xf, -0x4000000000001, 0xf, x1, 968, x2)
+
+inst_122:
+// rs1_val == -2251799813685249,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xfff7fffffffffffb, -0x8000000000001, -0x5, x1, 976, x2)
+
+inst_123:
+// rs1_val == -4503599627370497,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, -0x10000000000001, 0x5, x1, 984, x2)
+
+inst_124:
+// rs1_val == -9007199254740993,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, -0x20000000000001, 0x3, x1, 992, x2)
+
+inst_125:
+// rs1_val == -18014398509481985,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xffbffffffffffffc, -0x40000000000001, -0x4, x1, 1000, x2)
+
+inst_126:
+// rs1_val == -36028797018963969,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x9, -0x80000000000001, 0x9, x1, 1008, x2)
+
+inst_127:
+// rs1_val == -72057594037927937,
+// opcode: c.andi; op1:x10; immval:0x8
+TEST_CI_OP( c.andi, x10, 0x8, -0x100000000000001, 0x8, x1, 1016, x2)
+
+inst_128:
+// rs1_val == -144115188075855873,
+// opcode: c.andi; op1:x10; immval:-0x16
+TEST_CI_OP( c.andi, x10, 0xfdffffffffffffea, -0x200000000000001, -0x16, x1, 1024, x2)
+
+inst_129:
+// rs1_val == -288230376151711745,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xfbfffffffffffffe, -0x400000000000001, -0x2, x1, 1032, x2)
+
+inst_130:
+// rs1_val == -576460752303423489,
+// opcode: c.andi; op1:x10; immval:-0x3
+TEST_CI_OP( c.andi, x10, 0xf7fffffffffffffd, -0x800000000000001, -0x3, x1, 1040, x2)
+
+inst_131:
+// rs1_val == -1152921504606846977,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, -0x1000000000000001, 0x2, x1, 1048, x2)
+
+inst_132:
+// rs1_val == -2305843009213693953,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xdfffffffffffffff, -0x2000000000000001, -0x1, x1, 1056, x2)
+
+inst_133:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205 and imm_val==-1
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x5555555555555555, 0x5555555555555555, -0x1, x1, 1064, x2)
+
+inst_134:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206 and imm_val==9
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x8, -0x5555555555555556, 0x9, x1, 1072, x2)
+
+inst_135:
+// rs1_val==3 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, 0x3, 0x3, x1, 1080, x2)
+
+inst_136:
+// rs1_val==3 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x1, 0x3, 0x5, x1, 1088, x2)
+
+inst_137:
+// rs1_val==3 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x3, 0xa, x1, 1096, x2)
+
+inst_138:
+// rs1_val==3 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, 0x3, 0x6, x1, 1104, x2)
+
+inst_139:
+// rs1_val==3 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x3, -0x2, x1, 1112, x2)
+
+inst_140:
+// rs1_val==3 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x3, 0x3, -0x5, x1, 1120, x2)
+
+inst_141:
+// rs1_val==3 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x3, 0x2, x1, 1128, x2)
+
+inst_142:
+// rs1_val==3 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x3, 0x4, x1, 1136, x2)
+
+inst_143:
+// rs1_val==3 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0x3, 0x9, x1, 1144, x2)
+
+inst_144:
+// rs1_val==3 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x3, 0x0, x1, 1152, x2)
+
+inst_145:
+// rs1_val==3 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x3, 0x3, 0xb, x1, 1160, x2)
+
+inst_146:
+// rs1_val==3 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x3, 0x3, 0x7, x1, 1168, x2)
+
+inst_147:
+// rs1_val==3 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x3, 0x3, -0x1, x1, 1176, x2)
+
+inst_148:
+// rs1_val==3 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x3, -0x4, x1, 1184, x2)
+
+inst_149:
+// rs1_val==6148914691236517205 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x1, 0x5555555555555555, 0x3, x1, 1192, x2)
+
+inst_150:
+// rs1_val==6148914691236517205 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, 0x5555555555555555, 0x5, x1, 1200, x2)
+
+inst_151:
+// rs1_val==6148914691236517205 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x5555555555555555, 0xa, x1, 1208, x2)
+
+inst_152:
+// rs1_val==6148914691236517205 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0x5555555555555555, 0x6, x1, 1216, x2)
+
+inst_153:
+// rs1_val==6148914691236517205 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x5555555555555554, 0x5555555555555555, -0x2, x1, 1224, x2)
+
+inst_154:
+// rs1_val==6148914691236517205 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x5555555555555551, 0x5555555555555555, -0x5, x1, 1232, x2)
+
+inst_155:
+// rs1_val==6148914691236517205 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x5555555555555555, 0x2, x1, 1240, x2)
+
+inst_156:
+// rs1_val==6148914691236517205 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x5555555555555555, 0x4, x1, 1248, x2)
+
+inst_157:
+// rs1_val==6148914691236517205 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0x5555555555555555, 0x9, x1, 1256, x2)
+
+inst_158:
+// rs1_val==6148914691236517205 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x5555555555555555, 0x0, x1, 1264, x2)
+
+inst_159:
+// rs1_val==6148914691236517205 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x1, 0x5555555555555555, 0xb, x1, 1272, x2)
+
+inst_160:
+// rs1_val==6148914691236517205 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x5, 0x5555555555555555, 0x7, x1, 1280, x2)
+
+inst_161:
+// rs1_val==6148914691236517205 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x5555555555555554, 0x5555555555555555, -0x4, x1, 1288, x2)
+
+inst_162:
+// rs1_val==-6148914691236517206 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, -0x5555555555555556, 0x3, x1, 1296, x2)
+
+inst_163:
+// rs1_val==-6148914691236517206 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, -0x5555555555555556, 0x5, x1, 1304, x2)
+
+inst_164:
+// rs1_val==-6148914691236517206 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0xa, -0x5555555555555556, 0xa, x1, 1312, x2)
+
+inst_165:
+// rs1_val==-6148914691236517206 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, -0x5555555555555556, 0x6, x1, 1320, x2)
+
+inst_166:
+// rs1_val==-6148914691236517206 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, -0x2, x1, 1328, x2)
+
+inst_167:
+// rs1_val==-6148914691236517206 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, -0x5, x1, 1336, x2)
+
+inst_168:
+// rs1_val==-6148914691236517206 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, -0x5555555555555556, 0x2, x1, 1344, x2)
+
+inst_169:
+// rs1_val==-6148914691236517206 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, -0x5555555555555556, 0x4, x1, 1352, x2)
+
+inst_170:
+// rs1_val==-6148914691236517206 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, -0x5555555555555556, 0x0, x1, 1360, x2)
+
+inst_171:
+// rs1_val==-6148914691236517206 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0xa, -0x5555555555555556, 0xb, x1, 1368, x2)
+
+inst_172:
+// rs1_val==-6148914691236517206 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x2, -0x5555555555555556, 0x7, x1, 1376, x2)
+
+inst_173:
+// rs1_val==-6148914691236517206 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, -0x1, x1, 1384, x2)
+
+inst_174:
+// rs1_val==-6148914691236517206 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xaaaaaaaaaaaaaaa8, -0x5555555555555556, -0x4, x1, 1392, x2)
+
+inst_175:
+// rs1_val==5 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x1, 0x5, 0x3, x1, 1400, x2)
+
+inst_176:
+// rs1_val==5 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, 0x5, 0x5, x1, 1408, x2)
+
+inst_177:
+// rs1_val==5 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x5, 0xa, x1, 1416, x2)
+
+inst_178:
+// rs1_val==5 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0x5, 0x6, x1, 1424, x2)
+
+inst_179:
+// rs1_val==5 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x4, 0x5, -0x2, x1, 1432, x2)
+
+inst_180:
+// rs1_val==5 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x1, 0x5, -0x5, x1, 1440, x2)
+
+inst_181:
+// rs1_val==5 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x5, 0x2, x1, 1448, x2)
+
+inst_182:
+// rs1_val==5 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x5, 0x4, x1, 1456, x2)
+
+inst_183:
+// rs1_val==5 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0x5, 0x9, x1, 1464, x2)
+
+inst_184:
+// rs1_val==5 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x5, 0x0, x1, 1472, x2)
+
+inst_185:
+// rs1_val==5 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x1, 0x5, 0xb, x1, 1480, x2)
+
+inst_186:
+// rs1_val==5 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x5, 0x5, 0x7, x1, 1488, x2)
+
+inst_187:
+// rs1_val==5 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x5, 0x5, -0x1, x1, 1496, x2)
+
+inst_188:
+// rs1_val==5 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x5, -0x4, x1, 1504, x2)
+
+inst_189:
+// rs1_val==3689348814741910323 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, 0x3333333333333333, 0x3, x1, 1512, x2)
+
+inst_190:
+// rs1_val==3689348814741910323 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x1, 0x3333333333333333, 0x5, x1, 1520, x2)
+
+inst_191:
+// rs1_val==3689348814741910323 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x3333333333333333, 0xa, x1, 1528, x2)
+
+inst_192:
+// rs1_val==3689348814741910323 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, 0x3333333333333333, 0x6, x1, 1536, x2)
+
+inst_193:
+// rs1_val==3689348814741910323 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x3333333333333332, 0x3333333333333333, -0x2, x1, 1544, x2)
+
+inst_194:
+// rs1_val==3689348814741910323 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x3333333333333333, 0x3333333333333333, -0x5, x1, 1552, x2)
+
+inst_195:
+// rs1_val==3689348814741910323 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x3333333333333333, 0x2, x1, 1560, x2)
+
+inst_196:
+// rs1_val==3689348814741910323 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x3333333333333333, 0x4, x1, 1568, x2)
+
+inst_197:
+// rs1_val==3689348814741910323 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0x3333333333333333, 0x9, x1, 1576, x2)
+
+inst_198:
+// rs1_val==3689348814741910323 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x3333333333333333, 0x0, x1, 1584, x2)
+
+inst_199:
+// rs1_val==3689348814741910323 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x3, 0x3333333333333333, 0xb, x1, 1592, x2)
+
+inst_200:
+// rs1_val==3689348814741910323 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x3, 0x3333333333333333, 0x7, x1, 1600, x2)
+
+inst_201:
+// rs1_val==3689348814741910323 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x3333333333333333, 0x3333333333333333, -0x1, x1, 1608, x2)
+
+inst_202:
+// rs1_val==3689348814741910323 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x3333333333333330, 0x3333333333333333, -0x4, x1, 1616, x2)
+
+inst_203:
+// rs1_val==7378697629483820646 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, 0x6666666666666666, 0x3, x1, 1624, x2)
+
+inst_204:
+// rs1_val==7378697629483820646 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0x6666666666666666, 0x5, x1, 1632, x2)
+
+inst_205:
+// rs1_val==7378697629483820646 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x6666666666666666, 0xa, x1, 1640, x2)
+
+inst_206:
+// rs1_val==7378697629483820646 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, 0x6666666666666666, 0x6, x1, 1648, x2)
+
+inst_207:
+// rs1_val==7378697629483820646 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x6666666666666666, 0x6666666666666666, -0x2, x1, 1656, x2)
+
+inst_208:
+// rs1_val==7378697629483820646 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x6666666666666662, 0x6666666666666666, -0x5, x1, 1664, x2)
+
+inst_209:
+// rs1_val==7378697629483820646 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x6666666666666666, 0x2, x1, 1672, x2)
+
+inst_210:
+// rs1_val==7378697629483820646 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x6666666666666666, 0x4, x1, 1680, x2)
+
+inst_211:
+// rs1_val==7378697629483820646 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x6666666666666666, 0x9, x1, 1688, x2)
+
+inst_212:
+// rs1_val==7378697629483820646 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x6666666666666666, 0x0, x1, 1696, x2)
+
+inst_213:
+// rs1_val==7378697629483820646 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x2, 0x6666666666666666, 0xb, x1, 1704, x2)
+
+inst_214:
+// rs1_val==7378697629483820646 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x6, 0x6666666666666666, 0x7, x1, 1712, x2)
+
+inst_215:
+// rs1_val==7378697629483820646 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x6666666666666666, 0x6666666666666666, -0x1, x1, 1720, x2)
+
+inst_216:
+// rs1_val==7378697629483820646 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x6666666666666664, 0x6666666666666666, -0x4, x1, 1728, x2)
+
+inst_217:
+// rs1_val==-3037000499 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x1, -0xb504f333, 0x3, x1, 1736, x2)
+
+inst_218:
+// rs1_val==-3037000499 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, -0xb504f333, 0x5, x1, 1744, x2)
+
+inst_219:
+// rs1_val==-3037000499 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x8, -0xb504f333, 0xa, x1, 1752, x2)
+
+inst_220:
+// rs1_val==-3037000499 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, -0xb504f333, 0x6, x1, 1760, x2)
+
+inst_221:
+// rs1_val==-3037000499 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xffffffff4afb0ccc, -0xb504f333, -0x2, x1, 1768, x2)
+
+inst_222:
+// rs1_val==-3037000499 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xffffffff4afb0cc9, -0xb504f333, -0x5, x1, 1776, x2)
+
+inst_223:
+// rs1_val==-3037000499 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, -0xb504f333, 0x2, x1, 1784, x2)
+
+inst_224:
+// rs1_val==-3037000499 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, -0xb504f333, 0x4, x1, 1792, x2)
+
+inst_225:
+// rs1_val==-3037000499 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x9, -0xb504f333, 0x9, x1, 1800, x2)
+
+inst_226:
+// rs1_val==-3037000499 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, -0xb504f333, 0x0, x1, 1808, x2)
+
+inst_227:
+// rs1_val==-3037000499 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x9, -0xb504f333, 0xb, x1, 1816, x2)
+
+inst_228:
+// rs1_val==-3037000499 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x5, -0xb504f333, 0x7, x1, 1824, x2)
+
+inst_229:
+// rs1_val==-3037000499 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xffffffff4afb0ccd, -0xb504f333, -0x1, x1, 1832, x2)
+
+inst_230:
+// rs1_val==-3037000499 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xffffffff4afb0ccc, -0xb504f333, -0x4, x1, 1840, x2)
+
+inst_231:
+// rs1_val==3037000499 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, 0xb504f333, 0x3, x1, 1848, x2)
+
+inst_232:
+// rs1_val==3037000499 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x1, 0xb504f333, 0x5, x1, 1856, x2)
+
+inst_233:
+// rs1_val==3037000499 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0xb504f333, 0xa, x1, 1864, x2)
+
+inst_234:
+// rs1_val==3037000499 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, 0xb504f333, 0x6, x1, 1872, x2)
+
+inst_235:
+// rs1_val==3037000499 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xb504f332, 0xb504f333, -0x2, x1, 1880, x2)
+
+inst_236:
+// rs1_val==3037000499 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xb504f333, 0xb504f333, -0x5, x1, 1888, x2)
+
+inst_237:
+// rs1_val==3037000499 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0xb504f333, 0x2, x1, 1896, x2)
+
+inst_238:
+// rs1_val==3037000499 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504f333, 0x4, x1, 1904, x2)
+
+inst_239:
+// rs1_val==3037000499 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0xb504f333, 0x9, x1, 1912, x2)
+
+inst_240:
+// rs1_val==3037000499 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504f333, 0x0, x1, 1920, x2)
+
+inst_241:
+// rs1_val==3037000499 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x3, 0xb504f333, 0xb, x1, 1928, x2)
+
+inst_242:
+// rs1_val==3037000499 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x3, 0xb504f333, 0x7, x1, 1936, x2)
+
+inst_243:
+// rs1_val==3037000499 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xb504f333, 0xb504f333, -0x1, x1, 1944, x2)
+
+inst_244:
+// rs1_val==3037000499 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xb504f330, 0xb504f333, -0x4, x1, 1952, x2)
+
+inst_245:
+// rs1_val==2 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, 0x3, x1, 1960, x2)
+
+inst_246:
+// rs1_val==2 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x2, 0x5, x1, 1968, x2)
+
+inst_247:
+// rs1_val==2 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, 0xa, x1, 1976, x2)
+
+inst_248:
+// rs1_val==2 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, 0x6, x1, 1984, x2)
+
+inst_249:
+// rs1_val==2 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, -0x5, x1, 1992, x2)
+
+inst_250:
+// rs1_val==2 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, 0x2, x1, 2000, x2)
+
+inst_251:
+// rs1_val==2 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x2, 0x4, x1, 2008, x2)
+
+inst_252:
+// rs1_val==2 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x2, 0x9, x1, 2016, x2)
+
+inst_253:
+// rs1_val==2 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x2, 0x0, x1, 2024, x2)
+
+inst_254:
+// rs1_val==2 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, 0xb, x1, 2032, x2)
+
+inst_255:
+// rs1_val==2 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, 0x7, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_256:
+// rs1_val==2 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x2, 0x2, -0x1, x1, 0, x2)
+
+inst_257:
+// rs1_val==2 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x2, -0x4, x1, 8, x2)
+
+inst_258:
+// rs1_val==6148914691236517204 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x5555555555555554, 0x3, x1, 16, x2)
+
+inst_259:
+// rs1_val==6148914691236517204 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0x5555555555555554, 0x5, x1, 24, x2)
+
+inst_260:
+// rs1_val==6148914691236517204 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x5555555555555554, 0xa, x1, 32, x2)
+
+inst_261:
+// rs1_val==6148914691236517204 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0x5555555555555554, 0x6, x1, 40, x2)
+
+inst_262:
+// rs1_val==6148914691236517204 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x5555555555555554, 0x5555555555555554, -0x2, x1, 48, x2)
+
+inst_263:
+// rs1_val==6148914691236517204 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x5555555555555550, 0x5555555555555554, -0x5, x1, 56, x2)
+
+inst_264:
+// rs1_val==6148914691236517204 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x5555555555555554, 0x2, x1, 64, x2)
+
+inst_265:
+// rs1_val==6148914691236517204 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x5555555555555554, 0x4, x1, 72, x2)
+
+inst_266:
+// rs1_val==6148914691236517204 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x5555555555555554, 0x9, x1, 80, x2)
+
+inst_267:
+// rs1_val==6148914691236517204 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x5555555555555554, 0x0, x1, 88, x2)
+
+inst_268:
+// rs1_val==6148914691236517204 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x0, 0x5555555555555554, 0xb, x1, 96, x2)
+
+inst_269:
+// rs1_val==6148914691236517204 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x4, 0x5555555555555554, 0x7, x1, 104, x2)
+
+inst_270:
+// rs1_val==6148914691236517204 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x5555555555555554, 0x5555555555555554, -0x1, x1, 112, x2)
+
+inst_271:
+// rs1_val==6148914691236517204 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x5555555555555554, 0x5555555555555554, -0x4, x1, 120, x2)
+
+inst_272:
+// rs1_val==0 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x3, x1, 128, x2)
+
+inst_273:
+// rs1_val==0 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x5, x1, 136, x2)
+
+inst_274:
+// rs1_val==0 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0xa, x1, 144, x2)
+
+inst_275:
+// rs1_val==0 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x6, x1, 152, x2)
+
+inst_276:
+// rs1_val==0 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, -0x2, x1, 160, x2)
+
+inst_277:
+// rs1_val==0 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, -0x5, x1, 168, x2)
+
+inst_278:
+// rs1_val==0 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x2, x1, 176, x2)
+
+inst_279:
+// rs1_val==0 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x4, x1, 184, x2)
+
+inst_280:
+// rs1_val==0 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x9, x1, 192, x2)
+
+inst_281:
+// rs1_val==0 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x0, x1, 200, x2)
+
+inst_282:
+// rs1_val==0 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0xb, x1, 208, x2)
+
+inst_283:
+// rs1_val==0 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, 0x7, x1, 216, x2)
+
+inst_284:
+// rs1_val==0 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, -0x1, x1, 224, x2)
+
+inst_285:
+// rs1_val==0 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x0, -0x4, x1, 232, x2)
+
+inst_286:
+// rs1_val==4 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, 0x3, x1, 240, x2)
+
+inst_287:
+// rs1_val==4 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, 0x5, x1, 248, x2)
+
+inst_288:
+// rs1_val==4 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, 0xa, x1, 256, x2)
+
+inst_289:
+// rs1_val==4 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, 0x6, x1, 264, x2)
+
+inst_290:
+// rs1_val==4 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, -0x2, x1, 272, x2)
+
+inst_291:
+// rs1_val==4 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, -0x5, x1, 280, x2)
+
+inst_292:
+// rs1_val==4 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, 0x2, x1, 288, x2)
+
+inst_293:
+// rs1_val==4 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, 0x4, x1, 296, x2)
+
+inst_294:
+// rs1_val==4 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, 0x9, x1, 304, x2)
+
+inst_295:
+// rs1_val==4 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, 0x0, x1, 312, x2)
+
+inst_296:
+// rs1_val==4 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x0, 0x4, 0xb, x1, 320, x2)
+
+inst_297:
+// rs1_val==4 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, 0x7, x1, 328, x2)
+
+inst_298:
+// rs1_val==4 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, -0x1, x1, 336, x2)
+
+inst_299:
+// rs1_val==4 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x4, -0x4, x1, 344, x2)
+
+inst_300:
+// rs1_val==3689348814741910322 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, 0x3333333333333332, 0x3, x1, 352, x2)
+
+inst_301:
+// rs1_val==3689348814741910322 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0x3333333333333332, 0x5, x1, 360, x2)
+
+inst_302:
+// rs1_val==3689348814741910322 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x3333333333333332, 0xa, x1, 368, x2)
+
+inst_303:
+// rs1_val==3689348814741910322 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, 0x3333333333333332, 0x6, x1, 376, x2)
+
+inst_304:
+// rs1_val==3689348814741910322 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x3333333333333332, 0x3333333333333332, -0x2, x1, 384, x2)
+
+inst_305:
+// rs1_val==3689348814741910322 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x3333333333333332, 0x3333333333333332, -0x5, x1, 392, x2)
+
+inst_306:
+// rs1_val==3689348814741910322 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x3333333333333332, 0x2, x1, 400, x2)
+
+inst_307:
+// rs1_val==3689348814741910322 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0x3333333333333332, 0x4, x1, 408, x2)
+
+inst_308:
+// rs1_val==3689348814741910322 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x3333333333333332, 0x9, x1, 416, x2)
+
+inst_309:
+// rs1_val==3689348814741910322 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x3333333333333332, 0x0, x1, 424, x2)
+
+inst_310:
+// rs1_val==3689348814741910322 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x2, 0x3333333333333332, 0xb, x1, 432, x2)
+
+inst_311:
+// rs1_val==3689348814741910322 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x2, 0x3333333333333332, 0x7, x1, 440, x2)
+
+inst_312:
+// rs1_val==3689348814741910322 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x3333333333333332, 0x3333333333333332, -0x1, x1, 448, x2)
+
+inst_313:
+// rs1_val==3689348814741910322 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x3333333333333330, 0x3333333333333332, -0x4, x1, 456, x2)
+
+inst_314:
+// rs1_val==7378697629483820645 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x1, 0x6666666666666665, 0x3, x1, 464, x2)
+
+inst_315:
+// rs1_val==7378697629483820645 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, 0x6666666666666665, 0x5, x1, 472, x2)
+
+inst_316:
+// rs1_val==7378697629483820645 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x6666666666666665, 0xa, x1, 480, x2)
+
+inst_317:
+// rs1_val==7378697629483820645 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0x6666666666666665, 0x6, x1, 488, x2)
+
+inst_318:
+// rs1_val==7378697629483820645 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x6666666666666664, 0x6666666666666665, -0x2, x1, 496, x2)
+
+inst_319:
+// rs1_val==7378697629483820645 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x6666666666666661, 0x6666666666666665, -0x5, x1, 504, x2)
+
+inst_320:
+// rs1_val==7378697629483820645 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x6666666666666665, 0x2, x1, 512, x2)
+
+inst_321:
+// rs1_val==7378697629483820645 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x6666666666666665, 0x4, x1, 520, x2)
+
+inst_322:
+// rs1_val==7378697629483820645 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0x6666666666666665, 0x9, x1, 528, x2)
+
+inst_323:
+// rs1_val==7378697629483820645 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x6666666666666665, 0x0, x1, 536, x2)
+
+inst_324:
+// rs1_val==7378697629483820645 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x1, 0x6666666666666665, 0xb, x1, 544, x2)
+
+inst_325:
+// rs1_val==7378697629483820645 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x5, 0x6666666666666665, 0x7, x1, 552, x2)
+
+inst_326:
+// rs1_val==7378697629483820645 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x6666666666666665, 0x6666666666666665, -0x1, x1, 560, x2)
+
+inst_327:
+// rs1_val==7378697629483820645 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x6666666666666664, 0x6666666666666665, -0x4, x1, 568, x2)
+
+inst_328:
+// rs1_val==3037000498 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, 0xb504f332, 0x3, x1, 576, x2)
+
+inst_329:
+// rs1_val==3037000498 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504f332, 0x5, x1, 584, x2)
+
+inst_330:
+// rs1_val==3037000498 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0xb504f332, 0xa, x1, 592, x2)
+
+inst_331:
+// rs1_val==3037000498 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, 0xb504f332, 0x6, x1, 600, x2)
+
+inst_332:
+// rs1_val==3037000498 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xb504f332, 0xb504f332, -0x2, x1, 608, x2)
+
+inst_333:
+// rs1_val==3037000498 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xb504f332, 0xb504f332, -0x5, x1, 616, x2)
+
+inst_334:
+// rs1_val==3037000498 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0xb504f332, 0x2, x1, 624, x2)
+
+inst_335:
+// rs1_val==3037000498 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504f332, 0x4, x1, 632, x2)
+
+inst_336:
+// rs1_val==3037000498 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504f332, 0x9, x1, 640, x2)
+
+inst_337:
+// rs1_val==3037000498 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504f332, 0x0, x1, 648, x2)
+
+inst_338:
+// rs1_val==3037000498 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x2, 0xb504f332, 0xb, x1, 656, x2)
+
+inst_339:
+// rs1_val==3037000498 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x2, 0xb504f332, 0x7, x1, 664, x2)
+
+inst_340:
+// rs1_val==3037000498 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xb504f332, 0xb504f332, -0x1, x1, 672, x2)
+
+inst_341:
+// rs1_val==3037000498 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xb504f330, 0xb504f332, -0x4, x1, 680, x2)
+
+inst_342:
+// rs1_val==6148914691236517206 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, 0x5555555555555556, 0x3, x1, 688, x2)
+
+inst_343:
+// rs1_val==6148914691236517206 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0x5555555555555556, 0x5, x1, 696, x2)
+
+inst_344:
+// rs1_val==6148914691236517206 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x5555555555555556, 0xa, x1, 704, x2)
+
+inst_345:
+// rs1_val==6148914691236517206 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, 0x5555555555555556, 0x6, x1, 712, x2)
+
+inst_346:
+// rs1_val==6148914691236517206 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x5555555555555556, 0x5555555555555556, -0x2, x1, 720, x2)
+
+inst_347:
+// rs1_val==6148914691236517206 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x5555555555555552, 0x5555555555555556, -0x5, x1, 728, x2)
+
+inst_348:
+// rs1_val==6148914691236517206 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x5555555555555556, 0x2, x1, 736, x2)
+
+inst_349:
+// rs1_val==6148914691236517206 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x5555555555555556, 0x4, x1, 744, x2)
+
+inst_350:
+// rs1_val==6148914691236517206 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x5555555555555556, 0x9, x1, 752, x2)
+
+inst_351:
+// rs1_val==6148914691236517206 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x5555555555555556, 0x0, x1, 760, x2)
+
+inst_352:
+// rs1_val==6148914691236517206 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x2, 0x5555555555555556, 0xb, x1, 768, x2)
+
+inst_353:
+// rs1_val==6148914691236517206 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x6, 0x5555555555555556, 0x7, x1, 776, x2)
+
+inst_354:
+// rs1_val==6148914691236517206 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x5555555555555556, 0x5555555555555556, -0x1, x1, 784, x2)
+
+inst_355:
+// rs1_val==6148914691236517206 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x5555555555555554, 0x5555555555555556, -0x4, x1, 792, x2)
+
+inst_356:
+// rs1_val==-6148914691236517205 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, -0x5555555555555555, 0x3, x1, 800, x2)
+
+inst_357:
+// rs1_val==-6148914691236517205 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x1, -0x5555555555555555, 0x5, x1, 808, x2)
+
+inst_358:
+// rs1_val==-6148914691236517205 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0xa, -0x5555555555555555, 0xa, x1, 816, x2)
+
+inst_359:
+// rs1_val==-6148914691236517205 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x2, -0x5555555555555555, 0x6, x1, 824, x2)
+
+inst_360:
+// rs1_val==-6148914691236517205 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xaaaaaaaaaaaaaaaa, -0x5555555555555555, -0x2, x1, 832, x2)
+
+inst_361:
+// rs1_val==-6148914691236517205 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, -0x5, x1, 840, x2)
+
+inst_362:
+// rs1_val==-6148914691236517205 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, -0x5555555555555555, 0x2, x1, 848, x2)
+
+inst_363:
+// rs1_val==-6148914691236517205 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x9, -0x5555555555555555, 0x9, x1, 856, x2)
+
+inst_364:
+// rs1_val==-6148914691236517205 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, -0x5555555555555555, 0x0, x1, 864, x2)
+
+inst_365:
+// rs1_val==-6148914691236517205 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0xb, -0x5555555555555555, 0xb, x1, 872, x2)
+
+inst_366:
+// rs1_val==-6148914691236517205 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x3, -0x5555555555555555, 0x7, x1, 880, x2)
+
+inst_367:
+// rs1_val==-6148914691236517205 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, -0x1, x1, 888, x2)
+
+inst_368:
+// rs1_val==-6148914691236517205 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xaaaaaaaaaaaaaaa8, -0x5555555555555555, -0x4, x1, 896, x2)
+
+inst_369:
+// rs1_val==6 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, 0x6, 0x3, x1, 904, x2)
+
+inst_370:
+// rs1_val==6 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0x6, 0x5, x1, 912, x2)
+
+inst_371:
+// rs1_val==6 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x6, 0xa, x1, 920, x2)
+
+inst_372:
+// rs1_val==6 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, 0x6, 0x6, x1, 928, x2)
+
+inst_373:
+// rs1_val==6 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x6, 0x6, -0x2, x1, 936, x2)
+
+inst_374:
+// rs1_val==6 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x2, 0x6, -0x5, x1, 944, x2)
+
+inst_375:
+// rs1_val==6 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x6, 0x2, x1, 952, x2)
+
+inst_376:
+// rs1_val==6 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x6, 0x4, x1, 960, x2)
+
+inst_377:
+// rs1_val==6 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x6, 0x9, x1, 968, x2)
+
+inst_378:
+// rs1_val==6 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x6, 0x0, x1, 976, x2)
+
+inst_379:
+// rs1_val==6 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x2, 0x6, 0xb, x1, 984, x2)
+
+inst_380:
+// rs1_val==6 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x6, 0x6, 0x7, x1, 992, x2)
+
+inst_381:
+// rs1_val==6 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x6, 0x6, -0x1, x1, 1000, x2)
+
+inst_382:
+// rs1_val==6 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x6, -0x4, x1, 1008, x2)
+
+inst_383:
+// rs1_val==3689348814741910324 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0x3333333333333334, 0x3, x1, 1016, x2)
+
+inst_384:
+// rs1_val==3689348814741910324 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0x3333333333333334, 0x5, x1, 1024, x2)
+
+inst_385:
+// rs1_val==3689348814741910324 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0x3333333333333334, 0xa, x1, 1032, x2)
+
+inst_386:
+// rs1_val==3689348814741910324 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0x3333333333333334, 0x6, x1, 1040, x2)
+
+inst_387:
+// rs1_val==3689348814741910324 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x3333333333333334, 0x3333333333333334, -0x2, x1, 1048, x2)
+
+inst_388:
+// rs1_val==3689348814741910324 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x3333333333333330, 0x3333333333333334, -0x5, x1, 1056, x2)
+
+inst_389:
+// rs1_val==3689348814741910324 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0x3333333333333334, 0x2, x1, 1064, x2)
+
+inst_390:
+// rs1_val==3689348814741910324 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x3333333333333334, 0x4, x1, 1072, x2)
+
+inst_391:
+// rs1_val==3689348814741910324 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0x3333333333333334, 0x9, x1, 1080, x2)
+
+inst_392:
+// rs1_val==3689348814741910324 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x3333333333333334, 0x0, x1, 1088, x2)
+
+inst_393:
+// rs1_val==3689348814741910324 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x0, 0x3333333333333334, 0xb, x1, 1096, x2)
+
+inst_394:
+// rs1_val==3689348814741910324 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x4, 0x3333333333333334, 0x7, x1, 1104, x2)
+
+inst_395:
+// rs1_val==3689348814741910324 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x3333333333333334, 0x3333333333333334, -0x1, x1, 1112, x2)
+
+inst_396:
+// rs1_val==3689348814741910324 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x3333333333333334, 0x3333333333333334, -0x4, x1, 1120, x2)
+
+inst_397:
+// rs1_val==7378697629483820647 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x3, 0x6666666666666667, 0x3, x1, 1128, x2)
+
+inst_398:
+// rs1_val==7378697629483820647 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x5, 0x6666666666666667, 0x5, x1, 1136, x2)
+
+inst_399:
+// rs1_val==7378697629483820647 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x2, 0x6666666666666667, 0xa, x1, 1144, x2)
+
+inst_400:
+// rs1_val==7378697629483820647 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, 0x6666666666666667, 0x6, x1, 1152, x2)
+
+inst_401:
+// rs1_val==7378697629483820647 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0x6666666666666666, 0x6666666666666667, -0x2, x1, 1160, x2)
+
+inst_402:
+// rs1_val==7378697629483820647 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0x6666666666666663, 0x6666666666666667, -0x5, x1, 1168, x2)
+
+inst_403:
+// rs1_val==7378697629483820647 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, 0x6666666666666667, 0x2, x1, 1176, x2)
+
+inst_404:
+// rs1_val==7378697629483820647 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0x6666666666666667, 0x4, x1, 1184, x2)
+
+inst_405:
+// rs1_val==7378697629483820647 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x1, 0x6666666666666667, 0x9, x1, 1192, x2)
+
+inst_406:
+// rs1_val==7378697629483820647 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0x6666666666666667, 0x0, x1, 1200, x2)
+
+inst_407:
+// rs1_val==7378697629483820647 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x3, 0x6666666666666667, 0xb, x1, 1208, x2)
+
+inst_408:
+// rs1_val==-3037000498 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xffffffff4afb0cce, -0xb504f332, -0x1, x1, 1216, x2)
+
+inst_409:
+// rs1_val==-3037000498 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xffffffff4afb0ccc, -0xb504f332, -0x4, x1, 1224, x2)
+
+inst_410:
+// rs1_val==3037000500 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504f334, 0x3, x1, 1232, x2)
+
+inst_411:
+// rs1_val==3037000500 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, 0xb504f334, 0x5, x1, 1240, x2)
+
+inst_412:
+// rs1_val==3037000500 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504f334, 0xa, x1, 1248, x2)
+
+inst_413:
+// rs1_val==3037000500 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x4, 0xb504f334, 0x6, x1, 1256, x2)
+
+inst_414:
+// rs1_val==3037000500 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xb504f334, 0xb504f334, -0x2, x1, 1264, x2)
+
+inst_415:
+// rs1_val==3037000500 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xb504f330, 0xb504f334, -0x5, x1, 1272, x2)
+
+inst_416:
+// rs1_val==3037000500 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504f334, 0x2, x1, 1280, x2)
+
+inst_417:
+// rs1_val==3037000500 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, 0xb504f334, 0x4, x1, 1288, x2)
+
+inst_418:
+// rs1_val==3037000500 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504f334, 0x9, x1, 1296, x2)
+
+inst_419:
+// rs1_val==3037000500 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504f334, 0x0, x1, 1304, x2)
+
+inst_420:
+// rs1_val==3037000500 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0x0, 0xb504f334, 0xb, x1, 1312, x2)
+
+inst_421:
+// rs1_val==3037000500 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x4, 0xb504f334, 0x7, x1, 1320, x2)
+
+inst_422:
+// rs1_val==3037000500 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0xb504f334, 0xb504f334, -0x1, x1, 1328, x2)
+
+inst_423:
+// rs1_val==3037000500 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0xb504f334, 0xb504f334, -0x4, x1, 1336, x2)
+
+inst_424:
+// rs1_val==7378697629483820647 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x7, 0x6666666666666667, 0x7, x1, 1344, x2)
+
+inst_425:
+// rs1_val==7378697629483820647 and imm_val==-1,
+// opcode: c.andi; op1:x10; immval:-0x1
+TEST_CI_OP( c.andi, x10, 0x6666666666666667, 0x6666666666666667, -0x1, x1, 1352, x2)
+
+inst_426:
+// rs1_val==7378697629483820647 and imm_val==-4,
+// opcode: c.andi; op1:x10; immval:-0x4
+TEST_CI_OP( c.andi, x10, 0x6666666666666664, 0x6666666666666667, -0x4, x1, 1360, x2)
+
+inst_427:
+// rs1_val==-3037000498 and imm_val==3,
+// opcode: c.andi; op1:x10; immval:0x3
+TEST_CI_OP( c.andi, x10, 0x2, -0xb504f332, 0x3, x1, 1368, x2)
+
+inst_428:
+// rs1_val==-3037000498 and imm_val==5,
+// opcode: c.andi; op1:x10; immval:0x5
+TEST_CI_OP( c.andi, x10, 0x4, -0xb504f332, 0x5, x1, 1376, x2)
+
+inst_429:
+// rs1_val==-3037000498 and imm_val==10,
+// opcode: c.andi; op1:x10; immval:0xa
+TEST_CI_OP( c.andi, x10, 0xa, -0xb504f332, 0xa, x1, 1384, x2)
+
+inst_430:
+// rs1_val==-3037000498 and imm_val==6,
+// opcode: c.andi; op1:x10; immval:0x6
+TEST_CI_OP( c.andi, x10, 0x6, -0xb504f332, 0x6, x1, 1392, x2)
+
+inst_431:
+// rs1_val==-3037000498 and imm_val==-2,
+// opcode: c.andi; op1:x10; immval:-0x2
+TEST_CI_OP( c.andi, x10, 0xffffffff4afb0cce, -0xb504f332, -0x2, x1, 1400, x2)
+
+inst_432:
+// rs1_val==-3037000498 and imm_val==-5,
+// opcode: c.andi; op1:x10; immval:-0x5
+TEST_CI_OP( c.andi, x10, 0xffffffff4afb0cca, -0xb504f332, -0x5, x1, 1408, x2)
+
+inst_433:
+// rs1_val==-3037000498 and imm_val==2,
+// opcode: c.andi; op1:x10; immval:0x2
+TEST_CI_OP( c.andi, x10, 0x2, -0xb504f332, 0x2, x1, 1416, x2)
+
+inst_434:
+// rs1_val==-3037000498 and imm_val==4,
+// opcode: c.andi; op1:x10; immval:0x4
+TEST_CI_OP( c.andi, x10, 0x4, -0xb504f332, 0x4, x1, 1424, x2)
+
+inst_435:
+// rs1_val==-3037000498 and imm_val==9,
+// opcode: c.andi; op1:x10; immval:0x9
+TEST_CI_OP( c.andi, x10, 0x8, -0xb504f332, 0x9, x1, 1432, x2)
+
+inst_436:
+// rs1_val==-3037000498 and imm_val==0,
+// opcode: c.andi; op1:x10; immval:0x0
+TEST_CI_OP( c.andi, x10, 0x0, -0xb504f332, 0x0, x1, 1440, x2)
+
+inst_437:
+// rs1_val==-3037000498 and imm_val==11,
+// opcode: c.andi; op1:x10; immval:0xb
+TEST_CI_OP( c.andi, x10, 0xa, -0xb504f332, 0xb, x1, 1448, x2)
+
+inst_438:
+// rs1_val==-3037000498 and imm_val==7,
+// opcode: c.andi; op1:x10; immval:0x7
+TEST_CI_OP( c.andi, x10, 0x6, -0xb504f332, 0x7, x1, 1456, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 183*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cbeqz-01.S b/riscof/suite/rv64i_m/C/cbeqz-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..f878f6746ef05888550812f8f863ea927a295f7a
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cbeqz-01.S
@@ -0,0 +1,814 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.beqz instruction of the RISC-V C extension for the cbeqz covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cbeqz)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1==x11, rs1_val == (-2**(xlen-1)), rs1_val < 0 and imm_val < 0, rs1_val == -9223372036854775808
+// opcode:c.beqz; op1:x11; op1val:-0x8000000000000000; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x11, -0x8000000000000000, 0x6, 1b, x1, 0)
+
+inst_1:
+// rs1==x13, rs1_val == 0, rs1_val==0, rs1_val == 0 and imm_val > 0
+// opcode:c.beqz; op1:x13; op1val:0x0; immval:0xaa
+TEST_CBRANCH_OP(c.beqz, x2, x13, 0x0, 0xaa, 3f, x1, 8)
+
+inst_2:
+// rs1==x12, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, rs1_val > 0 and imm_val > 0
+// opcode:c.beqz; op1:x12; op1val:0x7fffffffffffffff; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x12, 0x7fffffffffffffff, 0x80, 3f, x1, 16)
+
+inst_3:
+// rs1==x10, rs1_val == 1,
+// opcode:c.beqz; op1:x10; op1val:0x1; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x1, 0x4, 3f, x1, 24)
+
+inst_4:
+// rs1==x15, rs1_val < 0 and imm_val > 0, rs1_val==-3037000499
+// opcode:c.beqz; op1:x15; op1val:-0xb504f333; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x15, -0xb504f333, 0x80, 3f, x1, 32)
+
+inst_5:
+// rs1==x14, rs1_val > 0 and imm_val < 0, rs1_val == 131072
+// opcode:c.beqz; op1:x14; op1val:0x20000; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x14, 0x20000, 0xe, 1b, x1, 40)
+
+inst_6:
+// rs1==x8, rs1_val == 0 and imm_val < 0,
+// opcode:c.beqz; op1:x8; op1val:0x0; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x8, 0x0, 0x80, 1b, x1, 48)
+
+inst_7:
+// rs1==x9, rs1_val == 2, rs1_val==2
+// opcode:c.beqz; op1:x9; op1val:0x2; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x9, 0x2, 0xe, 1b, x1, 56)
+
+inst_8:
+// rs1_val == 4, rs1_val==4
+// opcode:c.beqz; op1:x10; op1val:0x4; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x4, 0xa, 3f, x1, 64)
+
+inst_9:
+// rs1_val == 8,
+// opcode:c.beqz; op1:x10; op1val:0x8; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x8, 0x8, 3f, x1, 72)
+
+inst_10:
+// rs1_val == 16,
+// opcode:c.beqz; op1:x10; op1val:0x10; immval:0xac
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x10, 0xac, 1b, x1, 80)
+
+inst_11:
+// rs1_val == 32,
+// opcode:c.beqz; op1:x10; op1val:0x20; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x20, 0x10, 3f, x1, 88)
+
+inst_12:
+// rs1_val == 64,
+// opcode:c.beqz; op1:x10; op1val:0x40; immval:0x82
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x40, 0x82, 1b, x1, 96)
+
+inst_13:
+// rs1_val == 128,
+// opcode:c.beqz; op1:x10; op1val:0x80; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x80, 0x8, 1b, x1, 104)
+
+inst_14:
+// rs1_val == 256,
+// opcode:c.beqz; op1:x10; op1val:0x100; immval:0x20
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x100, 0x20, 3f, x1, 112)
+
+inst_15:
+// rs1_val == 512,
+// opcode:c.beqz; op1:x10; op1val:0x200; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x200, 0x4, 1b, x1, 120)
+
+inst_16:
+// rs1_val == 1024,
+// opcode:c.beqz; op1:x10; op1val:0x400; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x400, 0x4, 3f, x1, 128)
+
+inst_17:
+// rs1_val == 2048,
+// opcode:c.beqz; op1:x10; op1val:0x800; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x800, 0xe, 1b, x1, 136)
+
+inst_18:
+// rs1_val == 4096,
+// opcode:c.beqz; op1:x10; op1val:0x1000; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x1000, 0x12, 3f, x1, 144)
+
+inst_19:
+// rs1_val == 8192,
+// opcode:c.beqz; op1:x10; op1val:0x2000; immval:0xac
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x2000, 0xac, 1b, x1, 152)
+
+inst_20:
+// rs1_val == 16384,
+// opcode:c.beqz; op1:x10; op1val:0x4000; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x4000, 0x8, 3f, x1, 160)
+
+inst_21:
+// rs1_val == 32768,
+// opcode:c.beqz; op1:x10; op1val:0x8000; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x8000, 0x6, 1b, x1, 168)
+
+inst_22:
+// rs1_val == 65536,
+// opcode:c.beqz; op1:x10; op1val:0x10000; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x10000, 0xc, 1b, x1, 176)
+
+inst_23:
+// rs1_val == 262144,
+// opcode:c.beqz; op1:x10; op1val:0x40000; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x40000, 0x4, 1b, x1, 184)
+
+inst_24:
+// rs1_val == 524288,
+// opcode:c.beqz; op1:x10; op1val:0x80000; immval:0x20
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x80000, 0x20, 3f, x1, 192)
+
+inst_25:
+// rs1_val == 1048576,
+// opcode:c.beqz; op1:x10; op1val:0x100000; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x100000, 0x10, 1b, x1, 200)
+
+inst_26:
+// rs1_val == 2097152,
+// opcode:c.beqz; op1:x10; op1val:0x200000; immval:0x42
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x200000, 0x42, 1b, x1, 208)
+
+inst_27:
+// rs1_val == 4194304,
+// opcode:c.beqz; op1:x10; op1val:0x400000; immval:0x82
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x400000, 0x82, 1b, x1, 216)
+
+inst_28:
+// rs1_val == 8388608,
+// opcode:c.beqz; op1:x10; op1val:0x800000; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x800000, 0x10, 3f, x1, 224)
+
+inst_29:
+// rs1_val == 16777216,
+// opcode:c.beqz; op1:x10; op1val:0x1000000; immval:0xac
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x1000000, 0xac, 1b, x1, 232)
+
+inst_30:
+// rs1_val == 33554432,
+// opcode:c.beqz; op1:x10; op1val:0x2000000; immval:0x42
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x2000000, 0x42, 1b, x1, 240)
+
+inst_31:
+// rs1_val == 67108864,
+// opcode:c.beqz; op1:x10; op1val:0x4000000; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x4000000, 0x6, 3f, x1, 248)
+
+inst_32:
+// rs1_val == 134217728,
+// opcode:c.beqz; op1:x10; op1val:0x8000000; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x8000000, 0x80, 1b, x1, 256)
+
+inst_33:
+// rs1_val == 268435456,
+// opcode:c.beqz; op1:x10; op1val:0x10000000; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x10000000, 0x12, 3f, x1, 264)
+
+inst_34:
+// rs1_val == 536870912,
+// opcode:c.beqz; op1:x10; op1val:0x20000000; immval:0x42
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x20000000, 0x42, 1b, x1, 272)
+
+inst_35:
+// rs1_val == 1073741824,
+// opcode:c.beqz; op1:x10; op1val:0x40000000; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x40000000, 0xe, 1b, x1, 280)
+
+inst_36:
+// rs1_val == 2147483648,
+// opcode:c.beqz; op1:x10; op1val:0x80000000; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x80000000, 0x12, 1b, x1, 288)
+
+inst_37:
+// rs1_val == 4294967296,
+// opcode:c.beqz; op1:x10; op1val:0x100000000; immval:0xaa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x100000000, 0xaa, 3f, x1, 296)
+
+inst_38:
+// rs1_val == 8589934592,
+// opcode:c.beqz; op1:x10; op1val:0x200000000; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x200000000, 0x10, 3f, x1, 304)
+
+inst_39:
+// rs1_val == 17179869184,
+// opcode:c.beqz; op1:x10; op1val:0x400000000; immval:0x14
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x400000000, 0x14, 1b, x1, 312)
+
+inst_40:
+// rs1_val == 34359738368,
+// opcode:c.beqz; op1:x10; op1val:0x800000000; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x800000000, 0xe, 1b, x1, 320)
+
+inst_41:
+// rs1_val == 68719476736,
+// opcode:c.beqz; op1:x10; op1val:0x1000000000; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x1000000000, 0xe, 1b, x1, 328)
+
+inst_42:
+// rs1_val == 137438953472,
+// opcode:c.beqz; op1:x10; op1val:0x2000000000; immval:0x82
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x2000000000, 0x82, 1b, x1, 336)
+
+inst_43:
+// rs1_val == 274877906944,
+// opcode:c.beqz; op1:x10; op1val:0x4000000000; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x4000000000, 0x4, 3f, x1, 344)
+
+inst_44:
+// rs1_val == 549755813888,
+// opcode:c.beqz; op1:x10; op1val:0x8000000000; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x8000000000, 0x8, 1b, x1, 352)
+
+inst_45:
+// rs1_val == 1099511627776,
+// opcode:c.beqz; op1:x10; op1val:0x10000000000; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x10000000000, 0xe, 3f, x1, 360)
+
+inst_46:
+// rs1_val == 2199023255552,
+// opcode:c.beqz; op1:x10; op1val:0x20000000000; immval:0x20
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x20000000000, 0x20, 3f, x1, 368)
+
+inst_47:
+// rs1_val == 4398046511104,
+// opcode:c.beqz; op1:x10; op1val:0x40000000000; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x40000000000, 0x8, 1b, x1, 376)
+
+inst_48:
+// rs1_val == 8796093022208,
+// opcode:c.beqz; op1:x10; op1val:0x80000000000; immval:0x22
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x80000000000, 0x22, 1b, x1, 384)
+
+inst_49:
+// rs1_val == 17592186044416,
+// opcode:c.beqz; op1:x10; op1val:0x100000000000; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x100000000000, 0x4, 3f, x1, 392)
+
+inst_50:
+// rs1_val == 35184372088832,
+// opcode:c.beqz; op1:x10; op1val:0x200000000000; immval:0x14
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x200000000000, 0x14, 1b, x1, 400)
+
+inst_51:
+// rs1_val == 70368744177664,
+// opcode:c.beqz; op1:x10; op1val:0x400000000000; immval:0x14
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x400000000000, 0x14, 1b, x1, 408)
+
+inst_52:
+// rs1_val == 140737488355328,
+// opcode:c.beqz; op1:x10; op1val:0x800000000000; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x800000000000, 0x10, 3f, x1, 416)
+
+inst_53:
+// rs1_val == 281474976710656,
+// opcode:c.beqz; op1:x10; op1val:0x1000000000000; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x1000000000000, 0x10, 1b, x1, 424)
+
+inst_54:
+// rs1_val == 562949953421312,
+// opcode:c.beqz; op1:x10; op1val:0x2000000000000; immval:0x14
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x2000000000000, 0x14, 1b, x1, 432)
+
+inst_55:
+// rs1_val == 1125899906842624,
+// opcode:c.beqz; op1:x10; op1val:0x4000000000000; immval:0x82
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x4000000000000, 0x82, 1b, x1, 440)
+
+inst_56:
+// rs1_val == 2251799813685248,
+// opcode:c.beqz; op1:x10; op1val:0x8000000000000; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x8000000000000, 0x12, 1b, x1, 448)
+
+inst_57:
+// rs1_val == 4503599627370496,
+// opcode:c.beqz; op1:x10; op1val:0x10000000000000; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x10000000000000, 0x6, 3f, x1, 456)
+
+inst_58:
+// rs1_val == 9007199254740992,
+// opcode:c.beqz; op1:x10; op1val:0x20000000000000; immval:0xaa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x20000000000000, 0xaa, 3f, x1, 464)
+
+inst_59:
+// rs1_val == 18014398509481984,
+// opcode:c.beqz; op1:x10; op1val:0x40000000000000; immval:0x7e
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x40000000000000, 0x7e, 3f, x1, 472)
+
+inst_60:
+// rs1_val == 36028797018963968,
+// opcode:c.beqz; op1:x10; op1val:0x80000000000000; immval:0x40
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x80000000000000, 0x40, 3f, x1, 480)
+
+inst_61:
+// rs1_val == 72057594037927936,
+// opcode:c.beqz; op1:x10; op1val:0x100000000000000; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x100000000000000, 0xa, 3f, x1, 488)
+
+inst_62:
+// rs1_val == 144115188075855872,
+// opcode:c.beqz; op1:x10; op1val:0x200000000000000; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x200000000000000, 0xa, 3f, x1, 496)
+
+inst_63:
+// rs1_val == 288230376151711744,
+// opcode:c.beqz; op1:x10; op1val:0x400000000000000; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x400000000000000, 0x6, 1b, x1, 504)
+
+inst_64:
+// rs1_val == 576460752303423488,
+// opcode:c.beqz; op1:x10; op1val:0x800000000000000; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x800000000000000, 0xc, 1b, x1, 512)
+
+inst_65:
+// rs1_val == 1152921504606846976,
+// opcode:c.beqz; op1:x10; op1val:0x1000000000000000; immval:0x42
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x1000000000000000, 0x42, 1b, x1, 520)
+
+inst_66:
+// rs1_val == 2305843009213693952,
+// opcode:c.beqz; op1:x10; op1val:0x2000000000000000; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x2000000000000000, 0xe, 3f, x1, 528)
+
+inst_67:
+// rs1_val == 4611686018427387904,
+// opcode:c.beqz; op1:x10; op1val:0x4000000000000000; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x4000000000000000, 0x4, 3f, x1, 536)
+
+inst_68:
+// rs1_val == -2,
+// opcode:c.beqz; op1:x10; op1val:-0x2; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x2, 0xc, 3f, x1, 544)
+
+inst_69:
+// rs1_val == -3,
+// opcode:c.beqz; op1:x10; op1val:-0x3; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x3, 0x6, 1b, x1, 552)
+
+inst_70:
+// rs1_val == -5,
+// opcode:c.beqz; op1:x10; op1val:-0x5; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x5, 0x12, 3f, x1, 560)
+
+inst_71:
+// rs1_val == -9,
+// opcode:c.beqz; op1:x10; op1val:-0x9; immval:0x14
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x9, 0x14, 1b, x1, 568)
+
+inst_72:
+// rs1_val == -17,
+// opcode:c.beqz; op1:x10; op1val:-0x11; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x11, 0x80, 1b, x1, 576)
+
+inst_73:
+// rs1_val == -33,
+// opcode:c.beqz; op1:x10; op1val:-0x21; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x21, 0xe, 1b, x1, 584)
+
+inst_74:
+// rs1_val == -65,
+// opcode:c.beqz; op1:x10; op1val:-0x41; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x41, 0x6, 3f, x1, 592)
+
+inst_75:
+// rs1_val == -129,
+// opcode:c.beqz; op1:x10; op1val:-0x81; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x81, 0xc, 3f, x1, 600)
+
+inst_76:
+// rs1_val == -257,
+// opcode:c.beqz; op1:x10; op1val:-0x101; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x101, 0x10, 1b, x1, 608)
+
+inst_77:
+// rs1_val == -513,
+// opcode:c.beqz; op1:x10; op1val:-0x201; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x201, 0x8, 3f, x1, 616)
+
+inst_78:
+// rs1_val == -1025,
+// opcode:c.beqz; op1:x10; op1val:-0x401; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x401, 0x12, 1b, x1, 624)
+
+inst_79:
+// rs1_val == -2049,
+// opcode:c.beqz; op1:x10; op1val:-0x801; immval:0x7e
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x801, 0x7e, 3f, x1, 632)
+
+inst_80:
+// rs1_val == -4097,
+// opcode:c.beqz; op1:x10; op1val:-0x1001; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x1001, 0xe, 3f, x1, 640)
+
+inst_81:
+// rs1_val == -8193,
+// opcode:c.beqz; op1:x10; op1val:-0x2001; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x2001, 0x8, 3f, x1, 648)
+
+inst_82:
+// rs1_val == -16385,
+// opcode:c.beqz; op1:x10; op1val:-0x4001; immval:0xac
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x4001, 0xac, 1b, x1, 656)
+
+inst_83:
+// rs1_val == -32769,
+// opcode:c.beqz; op1:x10; op1val:-0x8001; immval:0x40
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x8001, 0x40, 3f, x1, 664)
+
+inst_84:
+// rs1_val == -65537,
+// opcode:c.beqz; op1:x10; op1val:-0x10001; immval:0x14
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x10001, 0x14, 1b, x1, 672)
+
+inst_85:
+// rs1_val == -131073,
+// opcode:c.beqz; op1:x10; op1val:-0x20001; immval:0x82
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x20001, 0x82, 1b, x1, 680)
+
+inst_86:
+// rs1_val == -262145,
+// opcode:c.beqz; op1:x10; op1val:-0x40001; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x40001, 0x10, 1b, x1, 688)
+
+inst_87:
+// rs1_val == -524289,
+// opcode:c.beqz; op1:x10; op1val:-0x80001; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x80001, 0xe, 1b, x1, 696)
+
+inst_88:
+// rs1_val == -36028797018963969,
+// opcode:c.beqz; op1:x10; op1val:-0x80000000000001; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x80000000000001, 0xe, 1b, x1, 704)
+
+inst_89:
+// rs1_val == -72057594037927937,
+// opcode:c.beqz; op1:x10; op1val:-0x100000000000001; immval:0x40
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x100000000000001, 0x40, 3f, x1, 712)
+
+inst_90:
+// rs1_val == -144115188075855873,
+// opcode:c.beqz; op1:x10; op1val:-0x200000000000001; immval:0x42
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x200000000000001, 0x42, 1b, x1, 720)
+
+inst_91:
+// rs1_val == -288230376151711745,
+// opcode:c.beqz; op1:x10; op1val:-0x400000000000001; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x400000000000001, 0x10, 3f, x1, 728)
+
+inst_92:
+// rs1_val == -576460752303423489,
+// opcode:c.beqz; op1:x10; op1val:-0x800000000000001; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x800000000000001, 0x6, 3f, x1, 736)
+
+inst_93:
+// rs1_val == -1152921504606846977,
+// opcode:c.beqz; op1:x10; op1val:-0x1000000000000001; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x1000000000000001, 0xc, 3f, x1, 744)
+
+inst_94:
+// rs1_val == -2305843009213693953,
+// opcode:c.beqz; op1:x10; op1val:-0x2000000000000001; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x2000000000000001, 0xc, 3f, x1, 752)
+
+inst_95:
+// rs1_val == -4611686018427387905,
+// opcode:c.beqz; op1:x10; op1val:-0x4000000000000001; immval:0x14
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x4000000000000001, 0x14, 1b, x1, 760)
+
+inst_96:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode:c.beqz; op1:x10; op1val:0x5555555555555555; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x5555555555555555, 0xc, 3f, x1, 768)
+
+inst_97:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode:c.beqz; op1:x10; op1val:-0x5555555555555556; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x5555555555555556, 0xe, 3f, x1, 776)
+
+inst_98:
+// rs1_val==3,
+// opcode:c.beqz; op1:x10; op1val:0x3; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x3, 0x4, 3f, x1, 784)
+
+inst_99:
+// rs1_val==5,
+// opcode:c.beqz; op1:x10; op1val:0x5; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x5, 0xa, 3f, x1, 792)
+
+inst_100:
+// rs1_val==3689348814741910323,
+// opcode:c.beqz; op1:x10; op1val:0x3333333333333333; immval:0x20
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x3333333333333333, 0x20, 3f, x1, 800)
+
+inst_101:
+// rs1_val==7378697629483820646,
+// opcode:c.beqz; op1:x10; op1val:0x6666666666666666; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x6666666666666666, 0x12, 3f, x1, 808)
+
+inst_102:
+// rs1_val==3037000499,
+// opcode:c.beqz; op1:x10; op1val:0xb504f333; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0xb504f333, 0x6, 1b, x1, 816)
+
+inst_103:
+// rs1_val==6148914691236517204,
+// opcode:c.beqz; op1:x10; op1val:0x5555555555555554; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x5555555555555554, 0x6, 3f, x1, 824)
+
+inst_104:
+// rs1_val==3689348814741910322,
+// opcode:c.beqz; op1:x10; op1val:0x3333333333333332; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x3333333333333332, 0x10, 3f, x1, 832)
+
+inst_105:
+// rs1_val==7378697629483820645,
+// opcode:c.beqz; op1:x10; op1val:0x6666666666666665; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x6666666666666665, 0x80, 3f, x1, 840)
+
+inst_106:
+// rs1_val==3037000498,
+// opcode:c.beqz; op1:x10; op1val:0xb504f332; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0xb504f332, 0x80, 3f, x1, 848)
+
+inst_107:
+// rs1_val==6148914691236517206,
+// opcode:c.beqz; op1:x10; op1val:0x5555555555555556; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x5555555555555556, 0xe, 3f, x1, 856)
+
+inst_108:
+// rs1_val==-6148914691236517205,
+// opcode:c.beqz; op1:x10; op1val:-0x5555555555555555; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x5555555555555555, 0x4, 3f, x1, 864)
+
+inst_109:
+// rs1_val==6,
+// opcode:c.beqz; op1:x10; op1val:0x6; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x6, 0x4, 1b, x1, 872)
+
+inst_110:
+// rs1_val==3689348814741910324,
+// opcode:c.beqz; op1:x10; op1val:0x3333333333333334; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x3333333333333334, 0x12, 3f, x1, 880)
+
+inst_111:
+// rs1_val==7378697629483820647,
+// opcode:c.beqz; op1:x10; op1val:0x6666666666666667; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0x6666666666666667, 0xe, 1b, x1, 888)
+
+inst_112:
+// rs1_val==-3037000498,
+// opcode:c.beqz; op1:x10; op1val:-0xb504f332; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0xb504f332, 0x80, 3f, x1, 896)
+
+inst_113:
+// rs1_val==3037000500,
+// opcode:c.beqz; op1:x10; op1val:0xb504f334; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, 0xb504f334, 0xc, 3f, x1, 904)
+
+inst_114:
+// rs1_val == -1048577,
+// opcode:c.beqz; op1:x10; op1val:-0x100001; immval:0x40
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x100001, 0x40, 3f, x1, 912)
+
+inst_115:
+// rs1_val == -2097153,
+// opcode:c.beqz; op1:x10; op1val:-0x200001; immval:0x40
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x200001, 0x40, 3f, x1, 920)
+
+inst_116:
+// rs1_val == -4194305,
+// opcode:c.beqz; op1:x10; op1val:-0x400001; immval:0x7e
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x400001, 0x7e, 3f, x1, 928)
+
+inst_117:
+// rs1_val == -8388609,
+// opcode:c.beqz; op1:x10; op1val:-0x800001; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x800001, 0xa, 1b, x1, 936)
+
+inst_118:
+// rs1_val == -16777217,
+// opcode:c.beqz; op1:x10; op1val:-0x1000001; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x1000001, 0x8, 3f, x1, 944)
+
+inst_119:
+// rs1_val == -33554433,
+// opcode:c.beqz; op1:x10; op1val:-0x2000001; immval:0x7e
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x2000001, 0x7e, 3f, x1, 952)
+
+inst_120:
+// rs1_val == -67108865,
+// opcode:c.beqz; op1:x10; op1val:-0x4000001; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x4000001, 0xe, 1b, x1, 960)
+
+inst_121:
+// rs1_val == -134217729,
+// opcode:c.beqz; op1:x10; op1val:-0x8000001; immval:0x42
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x8000001, 0x42, 1b, x1, 968)
+
+inst_122:
+// rs1_val == -268435457,
+// opcode:c.beqz; op1:x10; op1val:-0x10000001; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x10000001, 0x12, 1b, x1, 976)
+
+inst_123:
+// rs1_val == -536870913,
+// opcode:c.beqz; op1:x10; op1val:-0x20000001; immval:0x42
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x20000001, 0x42, 1b, x1, 984)
+
+inst_124:
+// rs1_val == -1073741825,
+// opcode:c.beqz; op1:x10; op1val:-0x40000001; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x40000001, 0x10, 1b, x1, 992)
+
+inst_125:
+// rs1_val == -2147483649,
+// opcode:c.beqz; op1:x10; op1val:-0x80000001; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x80000001, 0x4, 1b, x1, 1000)
+
+inst_126:
+// rs1_val == -4294967297,
+// opcode:c.beqz; op1:x10; op1val:-0x100000001; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x100000001, 0x8, 3f, x1, 1008)
+
+inst_127:
+// rs1_val == -8589934593,
+// opcode:c.beqz; op1:x10; op1val:-0x200000001; immval:0xac
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x200000001, 0xac, 1b, x1, 1016)
+
+inst_128:
+// rs1_val == -17179869185,
+// opcode:c.beqz; op1:x10; op1val:-0x400000001; immval:0x4
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x400000001, 0x4, 3f, x1, 1024)
+
+inst_129:
+// rs1_val == -34359738369,
+// opcode:c.beqz; op1:x10; op1val:-0x800000001; immval:0xc
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x800000001, 0xc, 1b, x1, 1032)
+
+inst_130:
+// rs1_val == -68719476737,
+// opcode:c.beqz; op1:x10; op1val:-0x1000000001; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x1000000001, 0xe, 3f, x1, 1040)
+
+inst_131:
+// rs1_val == -137438953473,
+// opcode:c.beqz; op1:x10; op1val:-0x2000000001; immval:0x7e
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x2000000001, 0x7e, 3f, x1, 1048)
+
+inst_132:
+// rs1_val == -274877906945,
+// opcode:c.beqz; op1:x10; op1val:-0x4000000001; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x4000000001, 0x10, 3f, x1, 1056)
+
+inst_133:
+// rs1_val == -549755813889,
+// opcode:c.beqz; op1:x10; op1val:-0x8000000001; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x8000000001, 0x12, 3f, x1, 1064)
+
+inst_134:
+// rs1_val == -1099511627777,
+// opcode:c.beqz; op1:x10; op1val:-0x10000000001; immval:0xac
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x10000000001, 0xac, 1b, x1, 1072)
+
+inst_135:
+// rs1_val == -2199023255553,
+// opcode:c.beqz; op1:x10; op1val:-0x20000000001; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x20000000001, 0xa, 3f, x1, 1080)
+
+inst_136:
+// rs1_val == -4398046511105,
+// opcode:c.beqz; op1:x10; op1val:-0x40000000001; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x40000000001, 0xa, 3f, x1, 1088)
+
+inst_137:
+// rs1_val == -8796093022209,
+// opcode:c.beqz; op1:x10; op1val:-0x80000000001; immval:0xac
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x80000000001, 0xac, 1b, x1, 1096)
+
+inst_138:
+// rs1_val == -17592186044417,
+// opcode:c.beqz; op1:x10; op1val:-0x100000000001; immval:0x12
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x100000000001, 0x12, 1b, x1, 1104)
+
+inst_139:
+// rs1_val == -35184372088833,
+// opcode:c.beqz; op1:x10; op1val:-0x200000000001; immval:0x8
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x200000000001, 0x8, 1b, x1, 1112)
+
+inst_140:
+// rs1_val == -70368744177665,
+// opcode:c.beqz; op1:x10; op1val:-0x400000000001; immval:0xe
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x400000000001, 0xe, 1b, x1, 1120)
+
+inst_141:
+// rs1_val == -140737488355329,
+// opcode:c.beqz; op1:x10; op1val:-0x800000000001; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x800000000001, 0x80, 1b, x1, 1128)
+
+inst_142:
+// rs1_val == -281474976710657,
+// opcode:c.beqz; op1:x10; op1val:-0x1000000000001; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x1000000000001, 0x80, 1b, x1, 1136)
+
+inst_143:
+// rs1_val == -562949953421313,
+// opcode:c.beqz; op1:x10; op1val:-0x2000000000001; immval:0x80
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x2000000000001, 0x80, 1b, x1, 1144)
+
+inst_144:
+// rs1_val == -1125899906842625,
+// opcode:c.beqz; op1:x10; op1val:-0x4000000000001; immval:0xa
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x4000000000001, 0xa, 3f, x1, 1152)
+
+inst_145:
+// rs1_val == -2251799813685249,
+// opcode:c.beqz; op1:x10; op1val:-0x8000000000001; immval:0x20
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x8000000000001, 0x20, 3f, x1, 1160)
+
+inst_146:
+// rs1_val == -4503599627370497,
+// opcode:c.beqz; op1:x10; op1val:-0x10000000000001; immval:0xaa
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x10000000000001, 0xaa, 3f, x1, 1168)
+
+inst_147:
+// rs1_val == -9007199254740993,
+// opcode:c.beqz; op1:x10; op1val:-0x20000000000001; immval:0x6
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x20000000000001, 0x6, 1b, x1, 1176)
+
+inst_148:
+// rs1_val == -18014398509481985,
+// opcode:c.beqz; op1:x10; op1val:-0x40000000000001; immval:0x10
+TEST_CBRANCH_OP(c.beqz, x2, x10, -0x40000000000001, 0x10, 3f, x1, 1184)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 149*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cbnez-01.S b/riscof/suite/rv64i_m/C/cbnez-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..766426f3a40c4e756e3cbd806d70c250853d05d2
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cbnez-01.S
@@ -0,0 +1,814 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.bnez instruction of the RISC-V C extension for the cbnez covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cbnez)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1==x12, rs1_val == (-2**(xlen-1)), rs1_val < 0 and imm_val < 0, rs1_val == -9223372036854775808
+// opcode: c.bnez; op1:x12; op1val:-0x8000000000000000; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x12, -0x8000000000000000, 0x80, 1b, x1, 0)
+
+inst_1:
+// rs1==x14, rs1_val == 0, rs1_val==0, rs1_val == 0 and imm_val > 0
+// opcode: c.bnez; op1:x14; op1val:0x0; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x14, 0x0, 0x12, 3f, x1, 8)
+
+inst_2:
+// rs1==x13, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, rs1_val > 0 and imm_val < 0
+// opcode: c.bnez; op1:x13; op1val:0x7fffffffffffffff; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x13, 0x7fffffffffffffff, 0x6, 1b, x1, 16)
+
+inst_3:
+// rs1==x15, rs1_val == 1,
+// opcode: c.bnez; op1:x15; op1val:0x1; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x15, 0x1, 0xa, 1b, x1, 24)
+
+inst_4:
+// rs1==x10, rs1_val > 0 and imm_val > 0, rs1_val == 2305843009213693952
+// opcode: c.bnez; op1:x10; op1val:0x2000000000000000; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x2000000000000000, 0x80, 3f, x1, 32)
+
+inst_5:
+// rs1==x8, rs1_val < 0 and imm_val > 0, rs1_val == -8193
+// opcode: c.bnez; op1:x8; op1val:-0x2001; immval:0x20
+TEST_CBRANCH_OP(c.bnez, x2, x8, -0x2001, 0x20, 3f, x1, 40)
+
+inst_6:
+// rs1==x11, rs1_val == 0 and imm_val < 0,
+// opcode: c.bnez; op1:x11; op1val:0x0; immval:0x22
+TEST_CBRANCH_OP(c.bnez, x2, x11, 0x0, 0x22, 1b, x1, 48)
+
+inst_7:
+// rs1==x9, rs1_val == 2, rs1_val==2
+// opcode: c.bnez; op1:x9; op1val:0x2; immval:0x20
+TEST_CBRANCH_OP(c.bnez, x2, x9, 0x2, 0x20, 3f, x1, 56)
+
+inst_8:
+// rs1_val == 4, rs1_val==4
+// opcode: c.bnez; op1:x10; op1val:0x4; immval:0x82
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x4, 0x82, 1b, x1, 64)
+
+inst_9:
+// rs1_val == 8,
+// opcode: c.bnez; op1:x10; op1val:0x8; immval:0x14
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x8, 0x14, 1b, x1, 72)
+
+inst_10:
+// rs1_val == 16,
+// opcode: c.bnez; op1:x10; op1val:0x10; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x10, 0xe, 1b, x1, 80)
+
+inst_11:
+// rs1_val == 32,
+// opcode: c.bnez; op1:x10; op1val:0x20; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x20, 0x80, 1b, x1, 88)
+
+inst_12:
+// rs1_val == 64,
+// opcode: c.bnez; op1:x10; op1val:0x40; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x40, 0xa, 3f, x1, 96)
+
+inst_13:
+// rs1_val == 128,
+// opcode: c.bnez; op1:x10; op1val:0x80; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x80, 0x80, 3f, x1, 104)
+
+inst_14:
+// rs1_val == 256,
+// opcode: c.bnez; op1:x10; op1val:0x100; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x100, 0x4, 3f, x1, 112)
+
+inst_15:
+// rs1_val == 512,
+// opcode: c.bnez; op1:x10; op1val:0x200; immval:0x20
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x200, 0x20, 3f, x1, 120)
+
+inst_16:
+// rs1_val == 1024,
+// opcode: c.bnez; op1:x10; op1val:0x400; immval:0x42
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x400, 0x42, 1b, x1, 128)
+
+inst_17:
+// rs1_val == 2048,
+// opcode: c.bnez; op1:x10; op1val:0x800; immval:0xac
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x800, 0xac, 1b, x1, 136)
+
+inst_18:
+// rs1_val == 4096,
+// opcode: c.bnez; op1:x10; op1val:0x1000; immval:0x82
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x1000, 0x82, 1b, x1, 144)
+
+inst_19:
+// rs1_val == 8192,
+// opcode: c.bnez; op1:x10; op1val:0x2000; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x2000, 0x10, 3f, x1, 152)
+
+inst_20:
+// rs1_val == 16384,
+// opcode: c.bnez; op1:x10; op1val:0x4000; immval:0xaa
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x4000, 0xaa, 3f, x1, 160)
+
+inst_21:
+// rs1_val == 32768,
+// opcode: c.bnez; op1:x10; op1val:0x8000; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x8000, 0xa, 3f, x1, 168)
+
+inst_22:
+// rs1_val == 65536,
+// opcode: c.bnez; op1:x10; op1val:0x10000; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x10000, 0x80, 1b, x1, 176)
+
+inst_23:
+// rs1_val == 131072,
+// opcode: c.bnez; op1:x10; op1val:0x20000; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x20000, 0x10, 3f, x1, 184)
+
+inst_24:
+// rs1_val == 262144,
+// opcode: c.bnez; op1:x10; op1val:0x40000; immval:0x22
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x40000, 0x22, 1b, x1, 192)
+
+inst_25:
+// rs1_val == 524288,
+// opcode: c.bnez; op1:x10; op1val:0x80000; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x80000, 0x10, 1b, x1, 200)
+
+inst_26:
+// rs1_val == 1048576,
+// opcode: c.bnez; op1:x10; op1val:0x100000; immval:0x7e
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x100000, 0x7e, 3f, x1, 208)
+
+inst_27:
+// rs1_val == 2097152,
+// opcode: c.bnez; op1:x10; op1val:0x200000; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x200000, 0x8, 1b, x1, 216)
+
+inst_28:
+// rs1_val == 4194304,
+// opcode: c.bnez; op1:x10; op1val:0x400000; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x400000, 0x10, 3f, x1, 224)
+
+inst_29:
+// rs1_val == 8388608,
+// opcode: c.bnez; op1:x10; op1val:0x800000; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x800000, 0x4, 3f, x1, 232)
+
+inst_30:
+// rs1_val == 16777216,
+// opcode: c.bnez; op1:x10; op1val:0x1000000; immval:0x7e
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x1000000, 0x7e, 3f, x1, 240)
+
+inst_31:
+// rs1_val == 33554432,
+// opcode: c.bnez; op1:x10; op1val:0x2000000; immval:0x82
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x2000000, 0x82, 1b, x1, 248)
+
+inst_32:
+// rs1_val == 67108864,
+// opcode: c.bnez; op1:x10; op1val:0x4000000; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x4000000, 0x8, 3f, x1, 256)
+
+inst_33:
+// rs1_val == 134217728,
+// opcode: c.bnez; op1:x10; op1val:0x8000000; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x8000000, 0x12, 1b, x1, 264)
+
+inst_34:
+// rs1_val == 268435456,
+// opcode: c.bnez; op1:x10; op1val:0x10000000; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x10000000, 0x6, 1b, x1, 272)
+
+inst_35:
+// rs1_val == 536870912,
+// opcode: c.bnez; op1:x10; op1val:0x20000000; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x20000000, 0xe, 1b, x1, 280)
+
+inst_36:
+// rs1_val == 1073741824,
+// opcode: c.bnez; op1:x10; op1val:0x40000000; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x40000000, 0x8, 1b, x1, 288)
+
+inst_37:
+// rs1_val == 2147483648,
+// opcode: c.bnez; op1:x10; op1val:0x80000000; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x80000000, 0x8, 1b, x1, 296)
+
+inst_38:
+// rs1_val == 4294967296,
+// opcode: c.bnez; op1:x10; op1val:0x100000000; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x100000000, 0xa, 1b, x1, 304)
+
+inst_39:
+// rs1_val == 8589934592,
+// opcode: c.bnez; op1:x10; op1val:0x200000000; immval:0xc
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x200000000, 0xc, 1b, x1, 312)
+
+inst_40:
+// rs1_val == 17179869184,
+// opcode: c.bnez; op1:x10; op1val:0x400000000; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x400000000, 0x10, 1b, x1, 320)
+
+inst_41:
+// rs1_val == 34359738368,
+// opcode: c.bnez; op1:x10; op1val:0x800000000; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x800000000, 0xe, 3f, x1, 328)
+
+inst_42:
+// rs1_val == 68719476736,
+// opcode: c.bnez; op1:x10; op1val:0x1000000000; immval:0x42
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x1000000000, 0x42, 1b, x1, 336)
+
+inst_43:
+// rs1_val == 137438953472,
+// opcode: c.bnez; op1:x10; op1val:0x2000000000; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x2000000000, 0xe, 1b, x1, 344)
+
+inst_44:
+// rs1_val == 274877906944,
+// opcode: c.bnez; op1:x10; op1val:0x4000000000; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x4000000000, 0x8, 3f, x1, 352)
+
+inst_45:
+// rs1_val == 549755813888,
+// opcode: c.bnez; op1:x10; op1val:0x8000000000; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x8000000000, 0xe, 1b, x1, 360)
+
+inst_46:
+// rs1_val == 1099511627776,
+// opcode: c.bnez; op1:x10; op1val:0x10000000000; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x10000000000, 0xe, 1b, x1, 368)
+
+inst_47:
+// rs1_val == 2199023255552,
+// opcode: c.bnez; op1:x10; op1val:0x20000000000; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x20000000000, 0x80, 1b, x1, 376)
+
+inst_48:
+// rs1_val == 4398046511104,
+// opcode: c.bnez; op1:x10; op1val:0x40000000000; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x40000000000, 0x4, 3f, x1, 384)
+
+inst_49:
+// rs1_val == 8796093022208,
+// opcode: c.bnez; op1:x10; op1val:0x80000000000; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x80000000000, 0x12, 3f, x1, 392)
+
+inst_50:
+// rs1_val == 17592186044416,
+// opcode: c.bnez; op1:x10; op1val:0x100000000000; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x100000000000, 0x80, 3f, x1, 400)
+
+inst_51:
+// rs1_val == 35184372088832,
+// opcode: c.bnez; op1:x10; op1val:0x200000000000; immval:0xc
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x200000000000, 0xc, 1b, x1, 408)
+
+inst_52:
+// rs1_val == 70368744177664,
+// opcode: c.bnez; op1:x10; op1val:0x400000000000; immval:0xc
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x400000000000, 0xc, 1b, x1, 416)
+
+inst_53:
+// rs1_val == 140737488355328,
+// opcode: c.bnez; op1:x10; op1val:0x800000000000; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x800000000000, 0x12, 1b, x1, 424)
+
+inst_54:
+// rs1_val == 281474976710656,
+// opcode: c.bnez; op1:x10; op1val:0x1000000000000; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x1000000000000, 0x80, 3f, x1, 432)
+
+inst_55:
+// rs1_val == 562949953421312,
+// opcode: c.bnez; op1:x10; op1val:0x2000000000000; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x2000000000000, 0x80, 1b, x1, 440)
+
+inst_56:
+// rs1_val == 1125899906842624,
+// opcode: c.bnez; op1:x10; op1val:0x4000000000000; immval:0x14
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x4000000000000, 0x14, 1b, x1, 448)
+
+inst_57:
+// rs1_val == 2251799813685248,
+// opcode: c.bnez; op1:x10; op1val:0x8000000000000; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x8000000000000, 0x8, 3f, x1, 456)
+
+inst_58:
+// rs1_val == 4503599627370496,
+// opcode: c.bnez; op1:x10; op1val:0x10000000000000; immval:0x42
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x10000000000000, 0x42, 1b, x1, 464)
+
+inst_59:
+// rs1_val == 9007199254740992,
+// opcode: c.bnez; op1:x10; op1val:0x20000000000000; immval:0x7e
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x20000000000000, 0x7e, 3f, x1, 472)
+
+inst_60:
+// rs1_val == 18014398509481984,
+// opcode: c.bnez; op1:x10; op1val:0x40000000000000; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x40000000000000, 0xe, 3f, x1, 480)
+
+inst_61:
+// rs1_val == 36028797018963968,
+// opcode: c.bnez; op1:x10; op1val:0x80000000000000; immval:0xaa
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x80000000000000, 0xaa, 3f, x1, 488)
+
+inst_62:
+// rs1_val == 72057594037927936,
+// opcode: c.bnez; op1:x10; op1val:0x100000000000000; immval:0x22
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x100000000000000, 0x22, 1b, x1, 496)
+
+inst_63:
+// rs1_val == 144115188075855872,
+// opcode: c.bnez; op1:x10; op1val:0x200000000000000; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x200000000000000, 0x4, 3f, x1, 504)
+
+inst_64:
+// rs1_val == 288230376151711744,
+// opcode: c.bnez; op1:x10; op1val:0x400000000000000; immval:0x7e
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x400000000000000, 0x7e, 3f, x1, 512)
+
+inst_65:
+// rs1_val == 576460752303423488,
+// opcode: c.bnez; op1:x10; op1val:0x800000000000000; immval:0x20
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x800000000000000, 0x20, 3f, x1, 520)
+
+inst_66:
+// rs1_val == 1152921504606846976,
+// opcode: c.bnez; op1:x10; op1val:0x1000000000000000; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x1000000000000000, 0x6, 1b, x1, 528)
+
+inst_67:
+// rs1_val == 4611686018427387904,
+// opcode: c.bnez; op1:x10; op1val:0x4000000000000000; immval:0x20
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x4000000000000000, 0x20, 3f, x1, 536)
+
+inst_68:
+// rs1_val == -2,
+// opcode: c.bnez; op1:x10; op1val:-0x2; immval:0x22
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x2, 0x22, 1b, x1, 544)
+
+inst_69:
+// rs1_val == -3,
+// opcode: c.bnez; op1:x10; op1val:-0x3; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x3, 0x10, 3f, x1, 552)
+
+inst_70:
+// rs1_val == -5,
+// opcode: c.bnez; op1:x10; op1val:-0x5; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x5, 0x80, 1b, x1, 560)
+
+inst_71:
+// rs1_val == -9,
+// opcode: c.bnez; op1:x10; op1val:-0x9; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x9, 0x10, 1b, x1, 568)
+
+inst_72:
+// rs1_val == -17,
+// opcode: c.bnez; op1:x10; op1val:-0x11; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x11, 0x10, 1b, x1, 576)
+
+inst_73:
+// rs1_val == -33,
+// opcode: c.bnez; op1:x10; op1val:-0x21; immval:0x42
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x21, 0x42, 1b, x1, 584)
+
+inst_74:
+// rs1_val == -65,
+// opcode: c.bnez; op1:x10; op1val:-0x41; immval:0xaa
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x41, 0xaa, 3f, x1, 592)
+
+inst_75:
+// rs1_val == -129,
+// opcode: c.bnez; op1:x10; op1val:-0x81; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x81, 0x4, 3f, x1, 600)
+
+inst_76:
+// rs1_val == -257,
+// opcode: c.bnez; op1:x10; op1val:-0x101; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x101, 0x80, 1b, x1, 608)
+
+inst_77:
+// rs1_val == -513,
+// opcode: c.bnez; op1:x10; op1val:-0x201; immval:0x7e
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x201, 0x7e, 3f, x1, 616)
+
+inst_78:
+// rs1_val == -1025,
+// opcode: c.bnez; op1:x10; op1val:-0x401; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x401, 0x6, 3f, x1, 624)
+
+inst_79:
+// rs1_val == -2049,
+// opcode: c.bnez; op1:x10; op1val:-0x801; immval:0xaa
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x801, 0xaa, 3f, x1, 632)
+
+inst_80:
+// rs1_val == -4097,
+// opcode: c.bnez; op1:x10; op1val:-0x1001; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x1001, 0xa, 3f, x1, 640)
+
+inst_81:
+// rs1_val == -16385,
+// opcode: c.bnez; op1:x10; op1val:-0x4001; immval:0x22
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x4001, 0x22, 1b, x1, 648)
+
+inst_82:
+// rs1_val == -32769,
+// opcode: c.bnez; op1:x10; op1val:-0x8001; immval:0xc
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x8001, 0xc, 3f, x1, 656)
+
+inst_83:
+// rs1_val == -65537,
+// opcode: c.bnez; op1:x10; op1val:-0x10001; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x10001, 0xa, 1b, x1, 664)
+
+inst_84:
+// rs1_val == -131073,
+// opcode: c.bnez; op1:x10; op1val:-0x20001; immval:0xaa
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x20001, 0xaa, 3f, x1, 672)
+
+inst_85:
+// rs1_val == -262145,
+// opcode: c.bnez; op1:x10; op1val:-0x40001; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x40001, 0x12, 1b, x1, 680)
+
+inst_86:
+// rs1_val == -524289,
+// opcode: c.bnez; op1:x10; op1val:-0x80001; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x80001, 0x4, 3f, x1, 688)
+
+inst_87:
+// rs1_val == -1048577,
+// opcode: c.bnez; op1:x10; op1val:-0x100001; immval:0xc
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x100001, 0xc, 1b, x1, 696)
+
+inst_88:
+// rs1_val == -36028797018963969,
+// opcode: c.bnez; op1:x10; op1val:-0x80000000000001; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x80000000000001, 0x80, 1b, x1, 704)
+
+inst_89:
+// rs1_val == -72057594037927937,
+// opcode: c.bnez; op1:x10; op1val:-0x100000000000001; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x100000000000001, 0x6, 1b, x1, 712)
+
+inst_90:
+// rs1_val == -144115188075855873,
+// opcode: c.bnez; op1:x10; op1val:-0x200000000000001; immval:0x82
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x200000000000001, 0x82, 1b, x1, 720)
+
+inst_91:
+// rs1_val == -288230376151711745,
+// opcode: c.bnez; op1:x10; op1val:-0x400000000000001; immval:0xac
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x400000000000001, 0xac, 1b, x1, 728)
+
+inst_92:
+// rs1_val == -576460752303423489,
+// opcode: c.bnez; op1:x10; op1val:-0x800000000000001; immval:0x14
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x800000000000001, 0x14, 1b, x1, 736)
+
+inst_93:
+// rs1_val == -1152921504606846977,
+// opcode: c.bnez; op1:x10; op1val:-0x1000000000000001; immval:0x22
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x1000000000000001, 0x22, 1b, x1, 744)
+
+inst_94:
+// rs1_val == -2305843009213693953,
+// opcode: c.bnez; op1:x10; op1val:-0x2000000000000001; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x2000000000000001, 0xa, 3f, x1, 752)
+
+inst_95:
+// rs1_val == -4611686018427387905,
+// opcode: c.bnez; op1:x10; op1val:-0x4000000000000001; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x4000000000000001, 0xa, 1b, x1, 760)
+
+inst_96:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode: c.bnez; op1:x10; op1val:0x5555555555555555; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x5555555555555555, 0x6, 1b, x1, 768)
+
+inst_97:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode: c.bnez; op1:x10; op1val:-0x5555555555555556; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x5555555555555556, 0x8, 1b, x1, 776)
+
+inst_98:
+// rs1_val==3,
+// opcode: c.bnez; op1:x10; op1val:0x3; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x3, 0xa, 1b, x1, 784)
+
+inst_99:
+// rs1_val==5,
+// opcode: c.bnez; op1:x10; op1val:0x5; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x5, 0xa, 1b, x1, 792)
+
+inst_100:
+// rs1_val==3689348814741910323,
+// opcode: c.bnez; op1:x10; op1val:0x3333333333333333; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x3333333333333333, 0x10, 1b, x1, 800)
+
+inst_101:
+// rs1_val==7378697629483820646,
+// opcode: c.bnez; op1:x10; op1val:0x6666666666666666; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x6666666666666666, 0x80, 1b, x1, 808)
+
+inst_102:
+// rs1_val==-3037000499,
+// opcode: c.bnez; op1:x10; op1val:-0xb504f333; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0xb504f333, 0x80, 3f, x1, 816)
+
+inst_103:
+// rs1_val==3037000499,
+// opcode: c.bnez; op1:x10; op1val:0xb504f333; immval:0x14
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0xb504f333, 0x14, 1b, x1, 824)
+
+inst_104:
+// rs1_val==6148914691236517204,
+// opcode: c.bnez; op1:x10; op1val:0x5555555555555554; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x5555555555555554, 0x6, 3f, x1, 832)
+
+inst_105:
+// rs1_val==3689348814741910322,
+// opcode: c.bnez; op1:x10; op1val:0x3333333333333332; immval:0x80
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x3333333333333332, 0x80, 1b, x1, 840)
+
+inst_106:
+// rs1_val==7378697629483820645,
+// opcode: c.bnez; op1:x10; op1val:0x6666666666666665; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x6666666666666665, 0x6, 3f, x1, 848)
+
+inst_107:
+// rs1_val==3037000498,
+// opcode: c.bnez; op1:x10; op1val:0xb504f332; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0xb504f332, 0x6, 1b, x1, 856)
+
+inst_108:
+// rs1_val==6148914691236517206,
+// opcode: c.bnez; op1:x10; op1val:0x5555555555555556; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x5555555555555556, 0xe, 3f, x1, 864)
+
+inst_109:
+// rs1_val==-6148914691236517205,
+// opcode: c.bnez; op1:x10; op1val:-0x5555555555555555; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x5555555555555555, 0xa, 1b, x1, 872)
+
+inst_110:
+// rs1_val==6,
+// opcode: c.bnez; op1:x10; op1val:0x6; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x6, 0x6, 1b, x1, 880)
+
+inst_111:
+// rs1_val==3689348814741910324,
+// opcode: c.bnez; op1:x10; op1val:0x3333333333333334; immval:0x14
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x3333333333333334, 0x14, 1b, x1, 888)
+
+inst_112:
+// rs1_val==7378697629483820647,
+// opcode: c.bnez; op1:x10; op1val:0x6666666666666667; immval:0xc
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0x6666666666666667, 0xc, 1b, x1, 896)
+
+inst_113:
+// rs1_val==-3037000498,
+// opcode: c.bnez; op1:x10; op1val:-0xb504f332; immval:0x8
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0xb504f332, 0x8, 3f, x1, 904)
+
+inst_114:
+// rs1_val==3037000500,
+// opcode: c.bnez; op1:x10; op1val:0xb504f334; immval:0x7e
+TEST_CBRANCH_OP(c.bnez, x2, x10, 0xb504f334, 0x7e, 3f, x1, 912)
+
+inst_115:
+// rs1_val == -2097153,
+// opcode: c.bnez; op1:x10; op1val:-0x200001; immval:0xe
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x200001, 0xe, 1b, x1, 920)
+
+inst_116:
+// rs1_val == -4194305,
+// opcode: c.bnez; op1:x10; op1val:-0x400001; immval:0xaa
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x400001, 0xaa, 3f, x1, 928)
+
+inst_117:
+// rs1_val == -8388609,
+// opcode: c.bnez; op1:x10; op1val:-0x800001; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x800001, 0x10, 1b, x1, 936)
+
+inst_118:
+// rs1_val == -16777217,
+// opcode: c.bnez; op1:x10; op1val:-0x1000001; immval:0xc
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x1000001, 0xc, 1b, x1, 944)
+
+inst_119:
+// rs1_val == -33554433,
+// opcode: c.bnez; op1:x10; op1val:-0x2000001; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x2000001, 0x4, 3f, x1, 952)
+
+inst_120:
+// rs1_val == -67108865,
+// opcode: c.bnez; op1:x10; op1val:-0x4000001; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x4000001, 0x6, 3f, x1, 960)
+
+inst_121:
+// rs1_val == -134217729,
+// opcode: c.bnez; op1:x10; op1val:-0x8000001; immval:0x22
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x8000001, 0x22, 1b, x1, 968)
+
+inst_122:
+// rs1_val == -268435457,
+// opcode: c.bnez; op1:x10; op1val:-0x10000001; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x10000001, 0x6, 1b, x1, 976)
+
+inst_123:
+// rs1_val == -536870913,
+// opcode: c.bnez; op1:x10; op1val:-0x20000001; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x20000001, 0x10, 1b, x1, 984)
+
+inst_124:
+// rs1_val == -1073741825,
+// opcode: c.bnez; op1:x10; op1val:-0x40000001; immval:0x40
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x40000001, 0x40, 3f, x1, 992)
+
+inst_125:
+// rs1_val == -2147483649,
+// opcode: c.bnez; op1:x10; op1val:-0x80000001; immval:0x42
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x80000001, 0x42, 1b, x1, 1000)
+
+inst_126:
+// rs1_val == -4294967297,
+// opcode: c.bnez; op1:x10; op1val:-0x100000001; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x100000001, 0x4, 3f, x1, 1008)
+
+inst_127:
+// rs1_val == -8589934593,
+// opcode: c.bnez; op1:x10; op1val:-0x200000001; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x200000001, 0x12, 3f, x1, 1016)
+
+inst_128:
+// rs1_val == -17179869185,
+// opcode: c.bnez; op1:x10; op1val:-0x400000001; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x400000001, 0xa, 3f, x1, 1024)
+
+inst_129:
+// rs1_val == -34359738369,
+// opcode: c.bnez; op1:x10; op1val:-0x800000001; immval:0x14
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x800000001, 0x14, 1b, x1, 1032)
+
+inst_130:
+// rs1_val == -68719476737,
+// opcode: c.bnez; op1:x10; op1val:-0x1000000001; immval:0x42
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x1000000001, 0x42, 1b, x1, 1040)
+
+inst_131:
+// rs1_val == -137438953473,
+// opcode: c.bnez; op1:x10; op1val:-0x2000000001; immval:0x7e
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x2000000001, 0x7e, 3f, x1, 1048)
+
+inst_132:
+// rs1_val == -274877906945,
+// opcode: c.bnez; op1:x10; op1val:-0x4000000001; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x4000000001, 0x4, 3f, x1, 1056)
+
+inst_133:
+// rs1_val == -549755813889,
+// opcode: c.bnez; op1:x10; op1val:-0x8000000001; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x8000000001, 0x12, 1b, x1, 1064)
+
+inst_134:
+// rs1_val == -1099511627777,
+// opcode: c.bnez; op1:x10; op1val:-0x10000000001; immval:0x7e
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x10000000001, 0x7e, 3f, x1, 1072)
+
+inst_135:
+// rs1_val == -2199023255553,
+// opcode: c.bnez; op1:x10; op1val:-0x20000000001; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x20000000001, 0xa, 3f, x1, 1080)
+
+inst_136:
+// rs1_val == -4398046511105,
+// opcode: c.bnez; op1:x10; op1val:-0x40000000001; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x40000000001, 0x10, 3f, x1, 1088)
+
+inst_137:
+// rs1_val == -8796093022209,
+// opcode: c.bnez; op1:x10; op1val:-0x80000000001; immval:0x40
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x80000000001, 0x40, 3f, x1, 1096)
+
+inst_138:
+// rs1_val == -17592186044417,
+// opcode: c.bnez; op1:x10; op1val:-0x100000000001; immval:0x10
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x100000000001, 0x10, 1b, x1, 1104)
+
+inst_139:
+// rs1_val == -35184372088833,
+// opcode: c.bnez; op1:x10; op1val:-0x200000000001; immval:0x6
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x200000000001, 0x6, 3f, x1, 1112)
+
+inst_140:
+// rs1_val == -70368744177665,
+// opcode: c.bnez; op1:x10; op1val:-0x400000000001; immval:0x42
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x400000000001, 0x42, 1b, x1, 1120)
+
+inst_141:
+// rs1_val == -140737488355329,
+// opcode: c.bnez; op1:x10; op1val:-0x800000000001; immval:0xc
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x800000000001, 0xc, 1b, x1, 1128)
+
+inst_142:
+// rs1_val == -281474976710657,
+// opcode: c.bnez; op1:x10; op1val:-0x1000000000001; immval:0xac
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x1000000000001, 0xac, 1b, x1, 1136)
+
+inst_143:
+// rs1_val == -562949953421313,
+// opcode: c.bnez; op1:x10; op1val:-0x2000000000001; immval:0x7e
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x2000000000001, 0x7e, 3f, x1, 1144)
+
+inst_144:
+// rs1_val == -1125899906842625,
+// opcode: c.bnez; op1:x10; op1val:-0x4000000000001; immval:0x82
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x4000000000001, 0x82, 1b, x1, 1152)
+
+inst_145:
+// rs1_val == -2251799813685249,
+// opcode: c.bnez; op1:x10; op1val:-0x8000000000001; immval:0xa
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x8000000000001, 0xa, 3f, x1, 1160)
+
+inst_146:
+// rs1_val == -4503599627370497,
+// opcode: c.bnez; op1:x10; op1val:-0x10000000000001; immval:0x12
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x10000000000001, 0x12, 3f, x1, 1168)
+
+inst_147:
+// rs1_val == -9007199254740993,
+// opcode: c.bnez; op1:x10; op1val:-0x20000000000001; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x20000000000001, 0x4, 3f, x1, 1176)
+
+inst_148:
+// rs1_val == -18014398509481985,
+// opcode: c.bnez; op1:x10; op1val:-0x40000000000001; immval:0x4
+TEST_CBRANCH_OP(c.bnez, x2, x10, -0x40000000000001, 0x4, 3f, x1, 1184)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 149*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cebreak-01.S b/riscof/suite/rv64i_m/C/cebreak-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..0d587d9971dff8d45845fd663ac1d1ee3c21b0e5
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cebreak-01.S
@@ -0,0 +1,71 @@
+
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.ebreak instruction of the RISC-V C extension.
+//
+
+#define rvtest_mtrap_routine
+
+#include "model_test.h"
+#include "arch_test.h"
+
+RVTEST_ISA("RV64IC")
+
+# Test code region
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+ RVTEST_CASE(1,"//check ISA:=regex(.*64.*); check ISA:=regex(.*I.*Zicsr.*.C*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",cebreak)
+
+ # ---------------------------------------------------------------------------------------------
+ la x1, test_A_res
+
+ li x2, 0x11111111
+ c.ebreak
+ .align 2
+ .option push
+ .option norvc
+ nop
+ .option pop
+ sw x0, 0(x1)
+ sw x2, 4(x1)
+
+ RVMODEL_IO_WRITE_STR(x30, "# Test part A - test EBREAK\n");
+
+ RVMODEL_IO_WRITE_STR(x30, "# Test End\n")
+
+#endif
+
+ # ---------------------------------------------------------------------------------------------
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+# Input data section.
+ .data
+ .align 4
+RVTEST_DATA_END
+
+# Output data section.
+RVMODEL_DATA_BEGIN
+
+test_A_res:
+ .fill 2, 4, 0xdeadbeef
+
+mtrap_sigptr:
+ .fill 4, 4, 0xdeadbeef
+
+#ifdef rvtest_gpr_save
+gpr_save:
+ .fill 32*(XLEN/32), 4, 0xdeadbeef
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cj-01.S b/riscof/suite/rv64i_m/C/cj-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..b4417dac8dd1ba936ef759b4ea8847a9f19e09b7
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cj-01.S
@@ -0,0 +1,159 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.j instruction of the RISC-V C extension for the cj covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cj)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// imm_val > 0,
+// opcode:c.j; immval:0xc
+TEST_CJ_OP(c.j, x2, 0xc, 3f, x1, 0)
+
+inst_1:
+// imm_val < 0, imm_val == -1366
+// opcode:c.j; immval:0x556
+TEST_CJ_OP(c.j, x2, 0x556, 1b, x1, 8)
+
+inst_2:
+// imm_val == 16,
+// opcode:c.j; immval:0x10
+TEST_CJ_OP(c.j, x2, 0x10, 3f, x1, 16)
+
+inst_3:
+// imm_val == 32,
+// opcode:c.j; immval:0x20
+TEST_CJ_OP(c.j, x2, 0x20, 3f, x1, 24)
+
+inst_4:
+// imm_val == 64,
+// opcode:c.j; immval:0x40
+TEST_CJ_OP(c.j, x2, 0x40, 3f, x1, 32)
+
+inst_5:
+// imm_val == 128,
+// opcode:c.j; immval:0x80
+TEST_CJ_OP(c.j, x2, 0x80, 3f, x1, 40)
+
+inst_6:
+// imm_val == 256,
+// opcode:c.j; immval:0x100
+TEST_CJ_OP(c.j, x2, 0x100, 3f, x1, 48)
+
+inst_7:
+// imm_val == 512,
+// opcode:c.j; immval:0x200
+TEST_CJ_OP(c.j, x2, 0x200, 3f, x1, 56)
+
+inst_8:
+// imm_val == 1024,
+// opcode:c.j; immval:0x400
+TEST_CJ_OP(c.j, x2, 0x400, 3f, x1, 64)
+
+inst_9:
+// imm_val == -10,
+// opcode:c.j; immval:0xa
+TEST_CJ_OP(c.j, x2, 0xa, 1b, x1, 72)
+
+inst_10:
+// imm_val == -18,
+// opcode:c.j; immval:0x12
+TEST_CJ_OP(c.j, x2, 0x12, 1b, x1, 80)
+
+inst_11:
+// imm_val == -1026,
+// opcode:c.j; immval:0x402
+TEST_CJ_OP(c.j, x2, 0x402, 1b, x1, 88)
+
+inst_12:
+// imm_val == 1364,
+// opcode:c.j; immval:0x554
+TEST_CJ_OP(c.j, x2, 0x554, 3f, x1, 96)
+
+inst_13:
+// imm_val == -34,
+// opcode:c.j; immval:0x22
+TEST_CJ_OP(c.j, x2, 0x22, 1b, x1, 104)
+
+inst_14:
+// imm_val == -66,
+// opcode:c.j; immval:0x42
+TEST_CJ_OP(c.j, x2, 0x42, 1b, x1, 112)
+
+inst_15:
+// imm_val == -130,
+// opcode:c.j; immval:0x82
+TEST_CJ_OP(c.j, x2, 0x82, 1b, x1, 120)
+
+inst_16:
+// imm_val == -258,
+// opcode:c.j; immval:0x102
+TEST_CJ_OP(c.j, x2, 0x102, 1b, x1, 128)
+
+inst_17:
+// imm_val == -514,
+// opcode:c.j; immval:0x202
+TEST_CJ_OP(c.j, x2, 0x202, 1b, x1, 136)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 18*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cjalr-01.S b/riscof/suite/rv64i_m/C/cjalr-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..ac4df088041a70a237344f9b3ddf11a17988668f
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cjalr-01.S
@@ -0,0 +1,229 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.jalr instruction of the RISC-V C extension for the cjalr covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cjalr)
+
+RVTEST_SIGBASE( x10,signature_x10_1)
+
+inst_0:
+// rs1==x17,
+// opcode:c.jalr; op1:x17
+TEST_CJALR_OP(x12, x17, x10, 0)
+
+inst_1:
+// rs1==x3,
+// opcode:c.jalr; op1:x3
+TEST_CJALR_OP(x12, x3, x10, 8)
+
+inst_2:
+// rs1==x20,
+// opcode:c.jalr; op1:x20
+TEST_CJALR_OP(x12, x20, x10, 16)
+
+inst_3:
+// rs1==x4,
+// opcode:c.jalr; op1:x4
+TEST_CJALR_OP(x12, x4, x10, 24)
+
+inst_4:
+// rs1==x29,
+// opcode:c.jalr; op1:x29
+TEST_CJALR_OP(x12, x29, x10, 32)
+
+inst_5:
+// rs1==x5,
+// opcode:c.jalr; op1:x5
+TEST_CJALR_OP(x12, x5, x10, 40)
+
+inst_6:
+// rs1==x26,
+// opcode:c.jalr; op1:x26
+TEST_CJALR_OP(x12, x26, x10, 48)
+
+inst_7:
+// rs1==x23,
+// opcode:c.jalr; op1:x23
+TEST_CJALR_OP(x12, x23, x10, 56)
+
+inst_8:
+// rs1==x30,
+// opcode:c.jalr; op1:x30
+TEST_CJALR_OP(x12, x30, x10, 64)
+
+inst_9:
+// rs1==x13,
+// opcode:c.jalr; op1:x13
+TEST_CJALR_OP(x12, x13, x10, 72)
+
+inst_10:
+// rs1==x9,
+// opcode:c.jalr; op1:x9
+TEST_CJALR_OP(x12, x9, x10, 80)
+
+inst_11:
+// rs1==x16,
+// opcode:c.jalr; op1:x16
+TEST_CJALR_OP(x12, x16, x10, 88)
+
+inst_12:
+// rs1==x15,
+// opcode:c.jalr; op1:x15
+TEST_CJALR_OP(x12, x15, x10, 96)
+
+inst_13:
+// rs1==x8,
+// opcode:c.jalr; op1:x8
+TEST_CJALR_OP(x12, x8, x10, 104)
+
+inst_14:
+// rs1==x22,
+// opcode:c.jalr; op1:x22
+TEST_CJALR_OP(x12, x22, x10, 112)
+
+inst_15:
+// rs1==x31,
+// opcode:c.jalr; op1:x31
+TEST_CJALR_OP(x12, x31, x10, 120)
+
+inst_16:
+// rs1==x24,
+// opcode:c.jalr; op1:x24
+TEST_CJALR_OP(x12, x24, x10, 128)
+
+inst_17:
+// rs1==x25,
+// opcode:c.jalr; op1:x25
+TEST_CJALR_OP(x12, x25, x10, 136)
+
+inst_18:
+// rs1==x27,
+// opcode:c.jalr; op1:x27
+TEST_CJALR_OP(x12, x27, x10, 144)
+
+inst_19:
+// rs1==x2,
+// opcode:c.jalr; op1:x2
+TEST_CJALR_OP(x12, x2, x10, 152)
+
+inst_20:
+// rs1==x6,
+// opcode:c.jalr; op1:x6
+TEST_CJALR_OP(x12, x6, x10, 160)
+
+inst_21:
+// rs1==x18,
+// opcode:c.jalr; op1:x18
+TEST_CJALR_OP(x12, x18, x10, 168)
+
+inst_22:
+// rs1==x14,
+// opcode:c.jalr; op1:x14
+TEST_CJALR_OP(x12, x14, x10, 176)
+
+inst_23:
+// rs1==x11,
+// opcode:c.jalr; op1:x11
+TEST_CJALR_OP(x12, x11, x10, 184)
+
+inst_24:
+// rs1==x1,
+// opcode:c.jalr; op1:x1
+TEST_CJALR_OP(x12, x1, x10, 192)
+
+inst_25:
+// rs1==x7,
+// opcode:c.jalr; op1:x7
+TEST_CJALR_OP(x12, x7, x10, 200)
+
+inst_26:
+// rs1==x19,
+// opcode:c.jalr; op1:x19
+TEST_CJALR_OP(x12, x19, x10, 208)
+
+inst_27:
+// rs1==x12,
+// opcode:c.jalr; op1:x12
+TEST_CJALR_OP(x3, x12, x10, 216)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_28:
+// rs1==x21,
+// opcode:c.jalr; op1:x21
+TEST_CJALR_OP(x3, x21, x2, 0)
+
+inst_29:
+// rs1==x28,
+// opcode:c.jalr; op1:x28
+TEST_CJALR_OP(x3, x28, x2, 8)
+
+inst_30:
+// rs1==x10,
+// opcode:c.jalr; op1:x10
+TEST_CJALR_OP(x3, x10, x2, 16)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x10_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x10_1:
+ .fill 28*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 3*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cjr-01.S b/riscof/suite/rv64i_m/C/cjr-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..3436f574752c7a61721537aea96fffc3c74d431f
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cjr-01.S
@@ -0,0 +1,229 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.jr instruction of the RISC-V C extension for the cjr covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cjr)
+
+RVTEST_SIGBASE( x23,signature_x23_1)
+
+inst_0:
+// rs1==x5,
+// opcode: c.jr; op1:x5
+TEST_CJR_OP(x25, x5, x23, 0)
+
+inst_1:
+// rs1==x11,
+// opcode: c.jr; op1:x11
+TEST_CJR_OP(x25, x11, x23, 8)
+
+inst_2:
+// rs1==x17,
+// opcode: c.jr; op1:x17
+TEST_CJR_OP(x25, x17, x23, 16)
+
+inst_3:
+// rs1==x16,
+// opcode: c.jr; op1:x16
+TEST_CJR_OP(x25, x16, x23, 24)
+
+inst_4:
+// rs1==x26,
+// opcode: c.jr; op1:x26
+TEST_CJR_OP(x25, x26, x23, 32)
+
+inst_5:
+// rs1==x27,
+// opcode: c.jr; op1:x27
+TEST_CJR_OP(x25, x27, x23, 40)
+
+inst_6:
+// rs1==x22,
+// opcode: c.jr; op1:x22
+TEST_CJR_OP(x25, x22, x23, 48)
+
+inst_7:
+// rs1==x13,
+// opcode: c.jr; op1:x13
+TEST_CJR_OP(x25, x13, x23, 56)
+
+inst_8:
+// rs1==x14,
+// opcode: c.jr; op1:x14
+TEST_CJR_OP(x25, x14, x23, 64)
+
+inst_9:
+// rs1==x4,
+// opcode: c.jr; op1:x4
+TEST_CJR_OP(x25, x4, x23, 72)
+
+inst_10:
+// rs1==x24,
+// opcode: c.jr; op1:x24
+TEST_CJR_OP(x25, x24, x23, 80)
+
+inst_11:
+// rs1==x19,
+// opcode: c.jr; op1:x19
+TEST_CJR_OP(x25, x19, x23, 88)
+
+inst_12:
+// rs1==x8,
+// opcode: c.jr; op1:x8
+TEST_CJR_OP(x25, x8, x23, 96)
+
+inst_13:
+// rs1==x2,
+// opcode: c.jr; op1:x2
+TEST_CJR_OP(x25, x2, x23, 104)
+
+inst_14:
+// rs1==x20,
+// opcode: c.jr; op1:x20
+TEST_CJR_OP(x25, x20, x23, 112)
+
+inst_15:
+// rs1==x6,
+// opcode: c.jr; op1:x6
+TEST_CJR_OP(x25, x6, x23, 120)
+
+inst_16:
+// rs1==x18,
+// opcode: c.jr; op1:x18
+TEST_CJR_OP(x25, x18, x23, 128)
+
+inst_17:
+// rs1==x21,
+// opcode: c.jr; op1:x21
+TEST_CJR_OP(x25, x21, x23, 136)
+
+inst_18:
+// rs1==x3,
+// opcode: c.jr; op1:x3
+TEST_CJR_OP(x25, x3, x23, 144)
+
+inst_19:
+// rs1==x9,
+// opcode: c.jr; op1:x9
+TEST_CJR_OP(x25, x9, x23, 152)
+
+inst_20:
+// rs1==x30,
+// opcode: c.jr; op1:x30
+TEST_CJR_OP(x25, x30, x23, 160)
+
+inst_21:
+// rs1==x1,
+// opcode: c.jr; op1:x1
+TEST_CJR_OP(x25, x1, x23, 168)
+
+inst_22:
+// rs1==x7,
+// opcode: c.jr; op1:x7
+TEST_CJR_OP(x25, x7, x23, 176)
+
+inst_23:
+// rs1==x15,
+// opcode: c.jr; op1:x15
+TEST_CJR_OP(x25, x15, x23, 184)
+
+inst_24:
+// rs1==x12,
+// opcode: c.jr; op1:x12
+TEST_CJR_OP(x25, x12, x23, 192)
+
+inst_25:
+// rs1==x31,
+// opcode: c.jr; op1:x31
+TEST_CJR_OP(x25, x31, x23, 200)
+
+inst_26:
+// rs1==x29,
+// opcode: c.jr; op1:x29
+TEST_CJR_OP(x2, x29, x23, 208)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_27:
+// rs1==x25,
+// opcode: c.jr; op1:x25
+TEST_CJR_OP(x2, x25, x1, 0)
+
+inst_28:
+// rs1==x28,
+// opcode: c.jr; op1:x28
+TEST_CJR_OP(x2, x28, x1, 8)
+
+inst_29:
+// rs1==x23,
+// opcode: c.jr; op1:x23
+TEST_CJR_OP(x2, x23, x1, 16)
+
+inst_30:
+// rs1==x10,
+// opcode: c.jr; op1:x10
+TEST_CJR_OP(x2, x10, x1, 24)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x23_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x23_1:
+ .fill 27*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 4*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cld-01.S b/riscof/suite/rv64i_m/C/cld-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..b32d9258c61df2dcb3e757076dd322d5551aa69c
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cld-01.S
@@ -0,0 +1,134 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.ld instruction of the RISC-V C extension for the cld covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*C.*);def TEST_CASE_1=True;",cld)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rd, rd==x12, rs1==x14, imm_val > 0, imm_val == 32
+// opcode: c.ld; op1:x14; dest:x12; op1val:0x0; immval:0x20
+TEST_LOAD(x1,x2,0,x14,x12,0x20,0,c.ld,0x0)
+
+inst_1:
+// rs1 == rd, rd==x15, rs1==x15, imm_val == 0,
+// opcode: c.ld; op1:x15; dest:x15; op1val:0x0; immval:0x0
+TEST_LOAD(x1,x2,0,x15,x15,0x0,8,c.ld,0x0)
+
+inst_2:
+// rd==x9, rs1==x11, imm_val == 8,
+// opcode: c.ld; op1:x11; dest:x9; op1val:0x0; immval:0x8
+TEST_LOAD(x1,x2,0,x11,x9,0x8,16,c.ld,0x0)
+
+inst_3:
+// rd==x8, rs1==x10, imm_val == 16,
+// opcode: c.ld; op1:x10; dest:x8; op1val:0x0; immval:0x10
+TEST_LOAD(x1,x2,0,x10,x8,0x10,24,c.ld,0x0)
+
+inst_4:
+// rd==x14, rs1==x12, imm_val == 64,
+// opcode: c.ld; op1:x12; dest:x14; op1val:0x0; immval:0x40
+TEST_LOAD(x1,x2,0,x12,x14,0x40,32,c.ld,0x0)
+
+inst_5:
+// rd==x10, rs1==x13, imm_val == 128,
+// opcode: c.ld; op1:x13; dest:x10; op1val:0x0; immval:0x80
+TEST_LOAD(x1,x2,0,x13,x10,0x80,40,c.ld,0x0)
+
+inst_6:
+// rd==x13, rs1==x8, imm_val == 240,
+// opcode: c.ld; op1:x8; dest:x13; op1val:0x0; immval:0xf0
+TEST_LOAD(x1,x2,0,x8,x13,0xf0,48,c.ld,0x0)
+
+inst_7:
+// rd==x11, rs1==x9, imm_val == 232,
+// opcode: c.ld; op1:x9; dest:x11; op1val:0x0; immval:0xe8
+TEST_LOAD(x1,x2,0,x9,x11,0xe8,56,c.ld,0x0)
+
+inst_8:
+// imm_val == 216,
+// opcode: c.ld; op1:x11; dest:x10; op1val:0x0; immval:0xd8
+TEST_LOAD(x1,x2,0,x11,x10,0xd8,64,c.ld,0x0)
+
+inst_9:
+// imm_val == 184,
+// opcode: c.ld; op1:x11; dest:x10; op1val:0x0; immval:0xb8
+TEST_LOAD(x1,x2,0,x11,x10,0xb8,72,c.ld,0x0)
+
+inst_10:
+// imm_val == 120,
+// opcode: c.ld; op1:x11; dest:x10; op1val:0x0; immval:0x78
+TEST_LOAD(x1,x2,0,x11,x10,0x78,80,c.ld,0x0)
+
+inst_11:
+// imm_val == 168,
+// opcode: c.ld; op1:x11; dest:x10; op1val:0x0; immval:0xa8
+TEST_LOAD(x1,x2,0,x11,x10,0xa8,88,c.ld,0x0)
+
+inst_12:
+// imm_val == 80,
+// opcode: c.ld; op1:x11; dest:x10; op1val:0x0; immval:0x50
+TEST_LOAD(x1,x2,0,x11,x10,0x50,96,c.ld,0x0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 13*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cldsp-01.S b/riscof/suite/rv64i_m/C/cldsp-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..1305330694d67e04a39b5ce27278fc51747ab755
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cldsp-01.S
@@ -0,0 +1,229 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.ldsp instruction of the RISC-V C extension for the cldsp covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*C.*);def TEST_CASE_1=True;",cldsp)
+
+RVTEST_SIGBASE( x13,signature_x13_1)
+
+inst_0:
+// rd==x5, imm_val > 0, imm_val == 128
+// opcode: c.ldsp; op1:x2; dest:x5; immval:0x80
+TEST_LOAD(x13,x17,0,x2,x5,0x80,0,c.ldsp,0)
+
+inst_1:
+// rd==x1, imm_val == 0,
+// opcode: c.ldsp; op1:x2; dest:x1; immval:0x0
+TEST_LOAD(x13,x17,0,x2,x1,0x0,8,c.ldsp,0)
+
+inst_2:
+// rd==x27, imm_val == 8,
+// opcode: c.ldsp; op1:x2; dest:x27; immval:0x8
+TEST_LOAD(x13,x17,0,x2,x27,0x8,16,c.ldsp,0)
+
+inst_3:
+// rd==x8, imm_val == 16,
+// opcode: c.ldsp; op1:x2; dest:x8; immval:0x10
+TEST_LOAD(x13,x17,0,x2,x8,0x10,24,c.ldsp,0)
+
+inst_4:
+// rd==x22, imm_val == 32,
+// opcode: c.ldsp; op1:x2; dest:x22; immval:0x20
+TEST_LOAD(x13,x17,0,x2,x22,0x20,32,c.ldsp,0)
+
+inst_5:
+// rd==x19, imm_val == 64,
+// opcode: c.ldsp; op1:x2; dest:x19; immval:0x40
+TEST_LOAD(x13,x17,0,x2,x19,0x40,40,c.ldsp,0)
+
+inst_6:
+// rd==x10, imm_val == 256,
+// opcode: c.ldsp; op1:x2; dest:x10; immval:0x100
+TEST_LOAD(x13,x17,0,x2,x10,0x100,48,c.ldsp,0)
+
+inst_7:
+// rd==x24, imm_val == 496,
+// opcode: c.ldsp; op1:x2; dest:x24; immval:0x1f0
+TEST_LOAD(x13,x17,0,x2,x24,0x1f0,56,c.ldsp,0)
+
+inst_8:
+// rd==x14, imm_val == 488,
+// opcode: c.ldsp; op1:x2; dest:x14; immval:0x1e8
+TEST_LOAD(x13,x17,0,x2,x14,0x1e8,64,c.ldsp,0)
+
+inst_9:
+// rd==x3, imm_val == 472,
+// opcode: c.ldsp; op1:x2; dest:x3; immval:0x1d8
+TEST_LOAD(x13,x17,0,x2,x3,0x1d8,72,c.ldsp,0)
+
+inst_10:
+// rd==x15, imm_val == 440,
+// opcode: c.ldsp; op1:x2; dest:x15; immval:0x1b8
+TEST_LOAD(x13,x17,0,x2,x15,0x1b8,80,c.ldsp,0)
+
+inst_11:
+// rd==x21, imm_val == 376,
+// opcode: c.ldsp; op1:x2; dest:x21; immval:0x178
+TEST_LOAD(x13,x17,0,x2,x21,0x178,88,c.ldsp,0)
+
+inst_12:
+// rd==x28, imm_val == 248,
+// opcode: c.ldsp; op1:x2; dest:x28; immval:0xf8
+TEST_LOAD(x13,x17,0,x2,x28,0xf8,96,c.ldsp,0)
+
+inst_13:
+// rd==x2, imm_val == 168,
+// opcode: c.ldsp; op1:x2; dest:x2; immval:0xa8
+TEST_LOAD(x13,x17,0,x2,x2,0xa8,104,c.ldsp,0)
+
+inst_14:
+// rd==x6, imm_val == 336,
+// opcode: c.ldsp; op1:x2; dest:x6; immval:0x150
+TEST_LOAD(x13,x17,0,x2,x6,0x150,112,c.ldsp,0)
+
+inst_15:
+// rd==x23,
+// opcode: c.ldsp; op1:x2; dest:x23; immval:0x0
+TEST_LOAD(x13,x17,0,x2,x23,0x0,120,c.ldsp,0)
+
+inst_16:
+// rd==x18,
+// opcode: c.ldsp; op1:x2; dest:x18; immval:0x0
+TEST_LOAD(x13,x17,0,x2,x18,0x0,128,c.ldsp,0)
+
+inst_17:
+// rd==x20,
+// opcode: c.ldsp; op1:x2; dest:x20; immval:0x0
+TEST_LOAD(x13,x17,0,x2,x20,0x0,136,c.ldsp,0)
+
+inst_18:
+// rd==x11,
+// opcode: c.ldsp; op1:x2; dest:x11; immval:0x0
+TEST_LOAD(x13,x17,0,x2,x11,0x0,144,c.ldsp,0)
+
+inst_19:
+// rd==x16,
+// opcode: c.ldsp; op1:x2; dest:x16; immval:0x0
+TEST_LOAD(x13,x17,0,x2,x16,0x0,152,c.ldsp,0)
+
+inst_20:
+// rd==x9,
+// opcode: c.ldsp; op1:x2; dest:x9; immval:0x0
+TEST_LOAD(x13,x17,0,x2,x9,0x0,160,c.ldsp,0)
+
+inst_21:
+// rd==x29,
+// opcode: c.ldsp; op1:x2; dest:x29; immval:0x0
+TEST_LOAD(x13,x17,0,x2,x29,0x0,168,c.ldsp,0)
+
+inst_22:
+// rd==x31,
+// opcode: c.ldsp; op1:x2; dest:x31; immval:0x0
+TEST_LOAD(x13,x17,0,x2,x31,0x0,176,c.ldsp,0)
+
+inst_23:
+// rd==x12,
+// opcode: c.ldsp; op1:x2; dest:x12; immval:0x0
+TEST_LOAD(x13,x17,0,x2,x12,0x0,184,c.ldsp,0)
+
+inst_24:
+// rd==x7,
+// opcode: c.ldsp; op1:x2; dest:x7; immval:0x0
+TEST_LOAD(x13,x17,0,x2,x7,0x0,192,c.ldsp,0)
+
+inst_25:
+// rd==x4,
+// opcode: c.ldsp; op1:x2; dest:x4; immval:0x0
+TEST_LOAD(x13,x17,0,x2,x4,0x0,200,c.ldsp,0)
+
+inst_26:
+// rd==x26,
+// opcode: c.ldsp; op1:x2; dest:x26; immval:0x0
+TEST_LOAD(x13,x17,0,x2,x26,0x0,208,c.ldsp,0)
+
+inst_27:
+// rd==x17,
+// opcode: c.ldsp; op1:x2; dest:x17; immval:0x0
+TEST_LOAD(x13,x3,0,x2,x17,0x0,216,c.ldsp,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_28:
+// rd==x25,
+// opcode: c.ldsp; op1:x2; dest:x25; immval:0x0
+TEST_LOAD(x1,x3,0,x2,x25,0x0,0,c.ldsp,0)
+
+inst_29:
+// rd==x13,
+// opcode: c.ldsp; op1:x2; dest:x13; immval:0x0
+TEST_LOAD(x1,x3,0,x2,x13,0x0,8,c.ldsp,0)
+
+inst_30:
+// rd==x30,
+// opcode: c.ldsp; op1:x2; dest:x30; immval:0x0
+TEST_LOAD(x1,x3,0,x2,x30,0x0,16,c.ldsp,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x13_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x13_1:
+ .fill 28*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 3*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cli-01.S b/riscof/suite/rv64i_m/C/cli-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..54d373d43fc18f94b1d9a0c0d90bee63e3237b7b
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cli-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.li instruction of the RISC-V C extension for the cli covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cli)
+
+RVTEST_SIGBASE( x11,signature_x11_1)
+
+inst_0:
+// rd==x15, imm_val == (-2**(6-1)), imm_val == -32
+// opcode:c.li; dest:x15; immval:-0x20
+TEST_CASE(x1, x15, -0x20, x11, 0, c.li x15, -0x20;)
+
+inst_1:
+// rd==x14, imm_val == 0,
+// opcode:c.li; dest:x14; immval:0x0
+TEST_CASE(x1, x14, 0x0, x11, 8, c.li x14, 0x0;)
+
+inst_2:
+// rd==x30, imm_val == (2**(6-1)-1), imm_val == 31
+// opcode:c.li; dest:x30; immval:0x1f
+TEST_CASE(x1, x30, 0x1f, x11, 16, c.li x30, 0x1f;)
+
+inst_3:
+// rd==x6, imm_val == 1,
+// opcode:c.li; dest:x6; immval:0x1
+TEST_CASE(x1, x6, 0x1, x11, 24, c.li x6, 0x1;)
+
+inst_4:
+// rd==x8, imm_val == 2,
+// opcode:c.li; dest:x8; immval:0x2
+TEST_CASE(x1, x8, 0x2, x11, 32, c.li x8, 0x2;)
+
+inst_5:
+// rd==x3, imm_val == 4,
+// opcode:c.li; dest:x3; immval:0x4
+TEST_CASE(x1, x3, 0x4, x11, 40, c.li x3, 0x4;)
+
+inst_6:
+// rd==x22, imm_val == 8,
+// opcode:c.li; dest:x22; immval:0x8
+TEST_CASE(x1, x22, 0x8, x11, 48, c.li x22, 0x8;)
+
+inst_7:
+// rd==x9, imm_val == 16,
+// opcode:c.li; dest:x9; immval:0x10
+TEST_CASE(x1, x9, 0x10, x11, 56, c.li x9, 0x10;)
+
+inst_8:
+// rd==x10, imm_val == -22,
+// opcode:c.li; dest:x10; immval:-0x16
+TEST_CASE(x1, x10, -0x16, x11, 64, c.li x10, -0x16;)
+
+inst_9:
+// rd==x25, imm_val == -2,
+// opcode:c.li; dest:x25; immval:-0x2
+TEST_CASE(x1, x25, -0x2, x11, 72, c.li x25, -0x2;)
+
+inst_10:
+// rd==x24, imm_val == -3,
+// opcode:c.li; dest:x24; immval:-0x3
+TEST_CASE(x1, x24, -0x3, x11, 80, c.li x24, -0x3;)
+
+inst_11:
+// rd==x7, imm_val == -5,
+// opcode:c.li; dest:x7; immval:-0x5
+TEST_CASE(x1, x7, -0x5, x11, 88, c.li x7, -0x5;)
+
+inst_12:
+// rd==x4, imm_val == -9,
+// opcode:c.li; dest:x4; immval:-0x9
+TEST_CASE(x1, x4, -0x9, x11, 96, c.li x4, -0x9;)
+
+inst_13:
+// rd==x17, imm_val == -17,
+// opcode:c.li; dest:x17; immval:-0x11
+TEST_CASE(x1, x17, -0x11, x11, 104, c.li x17, -0x11;)
+
+inst_14:
+// rd==x27, imm_val == 21,
+// opcode:c.li; dest:x27; immval:0x15
+TEST_CASE(x1, x27, 0x15, x11, 112, c.li x27, 0x15;)
+
+inst_15:
+// rd==x18,
+// opcode:c.li; dest:x18; immval:0x0
+TEST_CASE(x1, x18, 0x0, x11, 120, c.li x18, 0x0;)
+
+inst_16:
+// rd==x16,
+// opcode:c.li; dest:x16; immval:0x0
+TEST_CASE(x1, x16, 0x0, x11, 128, c.li x16, 0x0;)
+
+inst_17:
+// rd==x28,
+// opcode:c.li; dest:x28; immval:0x0
+TEST_CASE(x1, x28, 0x0, x11, 136, c.li x28, 0x0;)
+
+inst_18:
+// rd==x5,
+// opcode:c.li; dest:x5; immval:0x0
+TEST_CASE(x1, x5, 0x0, x11, 144, c.li x5, 0x0;)
+
+inst_19:
+// rd==x20,
+// opcode:c.li; dest:x20; immval:0x0
+TEST_CASE(x1, x20, 0x0, x11, 152, c.li x20, 0x0;)
+
+inst_20:
+// rd==x21,
+// opcode:c.li; dest:x21; immval:0x0
+TEST_CASE(x1, x21, 0x0, x11, 160, c.li x21, 0x0;)
+
+inst_21:
+// rd==x26,
+// opcode:c.li; dest:x26; immval:0x0
+TEST_CASE(x1, x26, 0x0, x11, 168, c.li x26, 0x0;)
+
+inst_22:
+// rd==x2,
+// opcode:c.li; dest:x2; immval:0x0
+TEST_CASE(x1, x2, 0x0, x11, 176, c.li x2, 0x0;)
+
+inst_23:
+// rd==x31,
+// opcode:c.li; dest:x31; immval:0x0
+TEST_CASE(x1, x31, 0x0, x11, 184, c.li x31, 0x0;)
+
+inst_24:
+// rd==x23,
+// opcode:c.li; dest:x23; immval:0x0
+TEST_CASE(x1, x23, 0x0, x11, 192, c.li x23, 0x0;)
+
+inst_25:
+// rd==x29,
+// opcode:c.li; dest:x29; immval:0x0
+TEST_CASE(x1, x29, 0x0, x11, 200, c.li x29, 0x0;)
+
+inst_26:
+// rd==x19,
+// opcode:c.li; dest:x19; immval:0x0
+TEST_CASE(x1, x19, 0x0, x11, 208, c.li x19, 0x0;)
+
+inst_27:
+// rd==x1,
+// opcode:c.li; dest:x1; immval:0x0
+TEST_CASE(x2, x1, 0x0, x11, 216, c.li x1, 0x0;)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_28:
+// rd==x0,
+// opcode:c.li; dest:x0; immval:0x0
+TEST_CASE(x2, x0, 0, x1, 0, c.li x0, 0x0;)
+
+inst_29:
+// rd==x11,
+// opcode:c.li; dest:x11; immval:0x0
+TEST_CASE(x2, x11, 0x0, x1, 8, c.li x11, 0x0;)
+
+inst_30:
+// rd==x12,
+// opcode:c.li; dest:x12; immval:0x0
+TEST_CASE(x2, x12, 0x0, x1, 16, c.li x12, 0x0;)
+
+inst_31:
+// rd==x13,
+// opcode:c.li; dest:x13; immval:0x0
+TEST_CASE(x2, x13, 0x0, x1, 24, c.li x13, 0x0;)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x11_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x11_1:
+ .fill 28*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 4*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/clui-01.S b/riscof/suite/rv64i_m/C/clui-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..2a59b2877863416d86ea25f1f8a11ed76238d81a
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/clui-01.S
@@ -0,0 +1,229 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 06:20:51 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.lui instruction of the RISC-V C extension for the clui covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",clui)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rd==x12, rs1_val > 0 and imm_val > 32, imm_val == 47
+// opcode:c.lui; op1:x12; dest:x12 op1val:0x4000000000; immval:0xfffef
+TEST_CI_OP( c.lui, x12, -0x11000, 0x4000000000, 0xfffef, x2, 0, x15)
+
+inst_1:
+// rd==x27, rs1_val > 0 and imm_val < 32 and imm_val !=0 , imm_val == 31
+// opcode:c.lui; op1:x27; dest:x27 op1val:0x10000000000; immval:0x1f
+TEST_CI_OP( c.lui, x27, 0x1f000, 0x10000000000, 0x1f, x2, 8, x15)
+
+inst_2:
+// rd==x14, rs1_val < 0 and imm_val > 32, imm_val == 55
+// opcode:c.lui; op1:x14; dest:x14 op1val:-0x1; immval:0xffff7
+TEST_CI_OP( c.lui, x14, -0x9000, -0x1, 0xffff7, x2, 16, x15)
+
+inst_3:
+// rd==x23, rs1_val < 0 and imm_val < 32 and imm_val !=0 ,
+// opcode:c.lui; op1:x23; dest:x23 op1val:-0x8; immval:0x11
+TEST_CI_OP( c.lui, x23, 0x11000, -0x8, 0x11, x2, 24, x15)
+
+inst_4:
+// rd==x3, imm_val == 1,
+// opcode:c.lui; op1:x3; dest:x3 op1val:-0x8000001; immval:0x1
+TEST_CI_OP( c.lui, x3, 0x1000, -0x8000001, 0x1, x2, 32, x15)
+
+inst_5:
+// rd==x5, imm_val == 2,
+// opcode:c.lui; op1:x5; dest:x5 op1val:0x1000000000000000; immval:0x2
+TEST_CI_OP( c.lui, x5, 0x2000, 0x1000000000000000, 0x2, x2, 40, x15)
+
+inst_6:
+// rd==x1, imm_val == 4,
+// opcode:c.lui; op1:x1; dest:x1 op1val:-0x101; immval:0x4
+TEST_CI_OP( c.lui, x1, 0x4000, -0x101, 0x4, x2, 48, x15)
+
+inst_7:
+// rd==x17, imm_val == 8,
+// opcode:c.lui; op1:x17; dest:x17 op1val:-0x8000001; immval:0x8
+TEST_CI_OP( c.lui, x17, 0x8000, -0x8000001, 0x8, x2, 56, x15)
+
+inst_8:
+// rd==x24, imm_val == 21,
+// opcode:c.lui; op1:x24; dest:x24 op1val:0x7fffffffffffffff; immval:0x15
+TEST_CI_OP( c.lui, x24, 0x15000, 0x7fffffffffffffff, 0x15, x2, 64, x15)
+
+inst_9:
+// rd==x10, imm_val == 42,
+// opcode:c.lui; op1:x10; dest:x10 op1val:0x800; immval:0xfffea
+TEST_CI_OP( c.lui, x10, -0x16000, 0x800, 0xfffea, x2, 72, x15)
+
+inst_10:
+// rd==x30, imm_val == 16,
+// opcode:c.lui; op1:x30; dest:x30 op1val:-0x1001; immval:0x10
+TEST_CI_OP( c.lui, x30, 0x10000, -0x1001, 0x10, x2, 80, x15)
+
+inst_11:
+// rd==x21, imm_val == 32,
+// opcode:c.lui; op1:x21; dest:x21 op1val:0x8000000000000; immval:0xfffe0
+TEST_CI_OP( c.lui, x21, -0x20000, 0x8000000000000, 0xfffe0, x2, 88, x15)
+
+inst_12:
+// rd==x9, imm_val == 62,
+// opcode:c.lui; op1:x9; dest:x9 op1val:0x200000000000000; immval:0xffffe
+TEST_CI_OP( c.lui, x9, -0x2000, 0x200000000000000, 0xffffe, x2, 96, x15)
+
+inst_13:
+// rd==x16, imm_val == 61,
+// opcode:c.lui; op1:x16; dest:x16 op1val:-0x4000001; immval:0xffffd
+TEST_CI_OP( c.lui, x16, -0x3000, -0x4000001, 0xffffd, x2, 104, x15)
+
+inst_14:
+// rd==x19, imm_val == 59,
+// opcode:c.lui; op1:x19; dest:x19 op1val:0x2000000000000; immval:0xffffb
+TEST_CI_OP( c.lui, x19, -0x5000, 0x2000000000000, 0xffffb, x2, 112, x15)
+
+inst_15:
+// rd==x18,
+// opcode:c.lui; op1:x18; dest:x18 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x18, 0x1000, 0x0, 0x1, x2, 120, x15)
+
+inst_16:
+// rd==x13,
+// opcode:c.lui; op1:x13; dest:x13 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x13, 0x1000, 0x0, 0x1, x2, 128, x15)
+
+inst_17:
+// rd==x31,
+// opcode:c.lui; op1:x31; dest:x31 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x31, 0x1000, 0x0, 0x1, x2, 136, x15)
+
+inst_18:
+// rd==x0,
+// opcode:c.lui; op1:x0; dest:x0 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x0, 0, 0x0, 0x1, x2, 144, x15)
+
+inst_19:
+// rd==x8,
+// opcode:c.lui; op1:x8; dest:x8 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x8, 0x1000, 0x0, 0x1, x2, 152, x15)
+
+inst_20:
+// rd==x25,
+// opcode:c.lui; op1:x25; dest:x25 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x25, 0x1000, 0x0, 0x1, x2, 160, x15)
+
+inst_21:
+// rd==x26,
+// opcode:c.lui; op1:x26; dest:x26 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x26, 0x1000, 0x0, 0x1, x2, 168, x15)
+
+inst_22:
+// rd==x7,
+// opcode:c.lui; op1:x7; dest:x7 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x7, 0x1000, 0x0, 0x1, x2, 176, x15)
+
+inst_23:
+// rd==x11,
+// opcode:c.lui; op1:x11; dest:x11 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x11, 0x1000, 0x0, 0x1, x2, 184, x15)
+
+inst_24:
+// rd==x6,
+// opcode:c.lui; op1:x6; dest:x6 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x6, 0x1000, 0x0, 0x1, x2, 192, x15)
+
+inst_25:
+// rd==x4,
+// opcode:c.lui; op1:x4; dest:x4 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x4, 0x1000, 0x0, 0x1, x2, 200, x15)
+
+inst_26:
+// rd==x20,
+// opcode:c.lui; op1:x20; dest:x20 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x20, 0x1000, 0x0, 0x1, x2, 208, x15)
+
+inst_27:
+// rd==x22,
+// opcode:c.lui; op1:x22; dest:x22 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x22, 0x1000, 0x0, 0x1, x2, 216, x15)
+
+inst_28:
+// rd==x29,
+// opcode:c.lui; op1:x29; dest:x29 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x29, 0x1000, 0x0, 0x1, x2, 224, x3)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_29:
+// rd==x15,
+// opcode:c.lui; op1:x15; dest:x15 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x15, 0x1000, 0x0, 0x1, x1, 0, x3)
+
+inst_30:
+// rd==x28,
+// opcode:c.lui; op1:x28; dest:x28 op1val:0x0; immval:0x1
+TEST_CI_OP( c.lui, x28, 0x1000, 0x0, 0x1, x1, 8, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 29*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 2*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/clw-01.S b/riscof/suite/rv64i_m/C/clw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..28e78bf720f17a4cce0c59d9d8d715c53e32aad1
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/clw-01.S
@@ -0,0 +1,134 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.lw instruction of the RISC-V C extension for the clw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",clw)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rd, rd==x12, rs1==x14, imm_val > 0, imm_val == 108
+// opcode: c.lw; op1:x14; dest:x12; immval:0x6c
+TEST_LOAD(x1,x2,0,x14,x12,0x6c,0,c.lw,0)
+
+inst_1:
+// rs1 == rd, rd==x10, rs1==x10, imm_val == 0,
+// opcode: c.lw; op1:x10; dest:x10; immval:0x0
+TEST_LOAD(x1,x2,0,x10,x10,0x0,8,c.lw,0)
+
+inst_2:
+// rd==x13, rs1==x9, imm_val == 4,
+// opcode: c.lw; op1:x9; dest:x13; immval:0x4
+TEST_LOAD(x1,x2,0,x9,x13,0x4,16,c.lw,0)
+
+inst_3:
+// rd==x8, rs1==x11, imm_val == 8,
+// opcode: c.lw; op1:x11; dest:x8; immval:0x8
+TEST_LOAD(x1,x2,0,x11,x8,0x8,24,c.lw,0)
+
+inst_4:
+// rd==x9, rs1==x8, imm_val == 16,
+// opcode: c.lw; op1:x8; dest:x9; immval:0x10
+TEST_LOAD(x1,x2,0,x8,x9,0x10,32,c.lw,0)
+
+inst_5:
+// rd==x14, rs1==x13, imm_val == 32,
+// opcode: c.lw; op1:x13; dest:x14; immval:0x20
+TEST_LOAD(x1,x2,0,x13,x14,0x20,40,c.lw,0)
+
+inst_6:
+// rd==x11, rs1==x15, imm_val == 64,
+// opcode: c.lw; op1:x15; dest:x11; immval:0x40
+TEST_LOAD(x1,x2,0,x15,x11,0x40,48,c.lw,0)
+
+inst_7:
+// rd==x15, rs1==x12, imm_val == 120,
+// opcode: c.lw; op1:x12; dest:x15; immval:0x78
+TEST_LOAD(x1,x2,0,x12,x15,0x78,56,c.lw,0)
+
+inst_8:
+// imm_val == 116,
+// opcode: c.lw; op1:x11; dest:x10; immval:0x74
+TEST_LOAD(x1,x2,0,x11,x10,0x74,64,c.lw,0)
+
+inst_9:
+// imm_val == 92,
+// opcode: c.lw; op1:x11; dest:x10; immval:0x5c
+TEST_LOAD(x1,x2,0,x11,x10,0x5c,72,c.lw,0)
+
+inst_10:
+// imm_val == 60,
+// opcode: c.lw; op1:x11; dest:x10; immval:0x3c
+TEST_LOAD(x1,x2,0,x11,x10,0x3c,80,c.lw,0)
+
+inst_11:
+// imm_val == 84,
+// opcode: c.lw; op1:x11; dest:x10; immval:0x54
+TEST_LOAD(x1,x2,0,x11,x10,0x54,88,c.lw,0)
+
+inst_12:
+// imm_val == 40,
+// opcode: c.lw; op1:x11; dest:x10; immval:0x28
+TEST_LOAD(x1,x2,0,x11,x10,0x28,96,c.lw,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 13*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/clwsp-01.S b/riscof/suite/rv64i_m/C/clwsp-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..8297b908fd12289faab3902103071f4b57f4aef9
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/clwsp-01.S
@@ -0,0 +1,229 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.lwsp instruction of the RISC-V C extension for the clwsp covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",clwsp)
+
+RVTEST_SIGBASE( x8,signature_x8_1)
+
+inst_0:
+// rd==x1, imm_val > 0,
+// opcode: c.lwsp; op1:x2; dest:x1; immval:0x18
+TEST_LOAD(x8,x12,0,x2,x1,0x18,0,c.lwsp,0)
+
+inst_1:
+// rd==x24, imm_val == 0,
+// opcode: c.lwsp; op1:x2; dest:x24; immval:0x0
+TEST_LOAD(x8,x12,0,x2,x24,0x0,8,c.lwsp,0)
+
+inst_2:
+// rd==x22, imm_val == 4,
+// opcode: c.lwsp; op1:x2; dest:x22; immval:0x4
+TEST_LOAD(x8,x12,0,x2,x22,0x4,16,c.lwsp,0)
+
+inst_3:
+// rd==x18, imm_val == 8,
+// opcode: c.lwsp; op1:x2; dest:x18; immval:0x8
+TEST_LOAD(x8,x12,0,x2,x18,0x8,24,c.lwsp,0)
+
+inst_4:
+// rd==x16, imm_val == 16,
+// opcode: c.lwsp; op1:x2; dest:x16; immval:0x10
+TEST_LOAD(x8,x12,0,x2,x16,0x10,32,c.lwsp,0)
+
+inst_5:
+// rd==x23, imm_val == 32,
+// opcode: c.lwsp; op1:x2; dest:x23; immval:0x20
+TEST_LOAD(x8,x12,0,x2,x23,0x20,40,c.lwsp,0)
+
+inst_6:
+// rd==x6, imm_val == 64,
+// opcode: c.lwsp; op1:x2; dest:x6; immval:0x40
+TEST_LOAD(x8,x12,0,x2,x6,0x40,48,c.lwsp,0)
+
+inst_7:
+// rd==x2, imm_val == 128,
+// opcode: c.lwsp; op1:x2; dest:x2; immval:0x80
+TEST_LOAD(x8,x12,0,x2,x2,0x80,56,c.lwsp,0)
+
+inst_8:
+// rd==x10, imm_val == 248,
+// opcode: c.lwsp; op1:x2; dest:x10; immval:0xf8
+TEST_LOAD(x8,x12,0,x2,x10,0xf8,64,c.lwsp,0)
+
+inst_9:
+// rd==x5, imm_val == 244,
+// opcode: c.lwsp; op1:x2; dest:x5; immval:0xf4
+TEST_LOAD(x8,x12,0,x2,x5,0xf4,72,c.lwsp,0)
+
+inst_10:
+// rd==x7, imm_val == 236,
+// opcode: c.lwsp; op1:x2; dest:x7; immval:0xec
+TEST_LOAD(x8,x12,0,x2,x7,0xec,80,c.lwsp,0)
+
+inst_11:
+// rd==x31, imm_val == 220,
+// opcode: c.lwsp; op1:x2; dest:x31; immval:0xdc
+TEST_LOAD(x8,x12,0,x2,x31,0xdc,88,c.lwsp,0)
+
+inst_12:
+// rd==x26, imm_val == 188,
+// opcode: c.lwsp; op1:x2; dest:x26; immval:0xbc
+TEST_LOAD(x8,x12,0,x2,x26,0xbc,96,c.lwsp,0)
+
+inst_13:
+// rd==x28, imm_val == 124,
+// opcode: c.lwsp; op1:x2; dest:x28; immval:0x7c
+TEST_LOAD(x8,x12,0,x2,x28,0x7c,104,c.lwsp,0)
+
+inst_14:
+// rd==x21, imm_val == 84,
+// opcode: c.lwsp; op1:x2; dest:x21; immval:0x54
+TEST_LOAD(x8,x12,0,x2,x21,0x54,112,c.lwsp,0)
+
+inst_15:
+// rd==x30, imm_val == 168,
+// opcode: c.lwsp; op1:x2; dest:x30; immval:0xa8
+TEST_LOAD(x8,x12,0,x2,x30,0xa8,120,c.lwsp,0)
+
+inst_16:
+// rd==x14,
+// opcode: c.lwsp; op1:x2; dest:x14; immval:0x0
+TEST_LOAD(x8,x12,0,x2,x14,0x0,128,c.lwsp,0)
+
+inst_17:
+// rd==x13,
+// opcode: c.lwsp; op1:x2; dest:x13; immval:0x0
+TEST_LOAD(x8,x12,0,x2,x13,0x0,136,c.lwsp,0)
+
+inst_18:
+// rd==x20,
+// opcode: c.lwsp; op1:x2; dest:x20; immval:0x0
+TEST_LOAD(x8,x12,0,x2,x20,0x0,144,c.lwsp,0)
+
+inst_19:
+// rd==x15,
+// opcode: c.lwsp; op1:x2; dest:x15; immval:0x0
+TEST_LOAD(x8,x12,0,x2,x15,0x0,152,c.lwsp,0)
+
+inst_20:
+// rd==x9,
+// opcode: c.lwsp; op1:x2; dest:x9; immval:0x0
+TEST_LOAD(x8,x12,0,x2,x9,0x0,160,c.lwsp,0)
+
+inst_21:
+// rd==x19,
+// opcode: c.lwsp; op1:x2; dest:x19; immval:0x0
+TEST_LOAD(x8,x12,0,x2,x19,0x0,168,c.lwsp,0)
+
+inst_22:
+// rd==x17,
+// opcode: c.lwsp; op1:x2; dest:x17; immval:0x0
+TEST_LOAD(x8,x12,0,x2,x17,0x0,176,c.lwsp,0)
+
+inst_23:
+// rd==x11,
+// opcode: c.lwsp; op1:x2; dest:x11; immval:0x0
+TEST_LOAD(x8,x12,0,x2,x11,0x0,184,c.lwsp,0)
+
+inst_24:
+// rd==x3,
+// opcode: c.lwsp; op1:x2; dest:x3; immval:0x0
+TEST_LOAD(x8,x12,0,x2,x3,0x0,192,c.lwsp,0)
+
+inst_25:
+// rd==x4,
+// opcode: c.lwsp; op1:x2; dest:x4; immval:0x0
+TEST_LOAD(x8,x12,0,x2,x4,0x0,200,c.lwsp,0)
+
+inst_26:
+// rd==x25,
+// opcode: c.lwsp; op1:x2; dest:x25; immval:0x0
+TEST_LOAD(x8,x12,0,x2,x25,0x0,208,c.lwsp,0)
+
+inst_27:
+// rd==x29,
+// opcode: c.lwsp; op1:x2; dest:x29; immval:0x0
+TEST_LOAD(x8,x3,0,x2,x29,0x0,216,c.lwsp,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_28:
+// rd==x27,
+// opcode: c.lwsp; op1:x2; dest:x27; immval:0x0
+TEST_LOAD(x1,x3,0,x2,x27,0x0,0,c.lwsp,0)
+
+inst_29:
+// rd==x12,
+// opcode: c.lwsp; op1:x2; dest:x12; immval:0x0
+TEST_LOAD(x1,x3,0,x2,x12,0x0,8,c.lwsp,0)
+
+inst_30:
+// rd==x8,
+// opcode: c.lwsp; op1:x2; dest:x8; immval:0x0
+TEST_LOAD(x1,x3,0,x2,x8,0x0,16,c.lwsp,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x8_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x8_1:
+ .fill 28*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 3*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cmv-01.S b/riscof/suite/rv64i_m/C/cmv-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..1cb3b27efd1d0d1f0ba1b006da54fe147a47fc4f
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cmv-01.S
@@ -0,0 +1,819 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.mv instruction of the RISC-V C extension for the cmv covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cmv)
+
+RVTEST_SIGBASE( x13,signature_x13_1)
+
+inst_0:
+// rs2 != rd and rs2 != 0, rd==x11, rs2==x12, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808
+// opcode: c.mv; op2:x12; dest:x11; op2val:-0x8000000000000000
+TEST_CMV_OP( c.mv, x11, x12, -0x8000000000000000, -0x8000000000000000, x13, 0, x10)
+
+inst_1:
+// rs2 == rd and rs2 != 0, rd==x2, rs2==x2, rs2_val == 0, rs2_val==0
+// opcode: c.mv; op2:x2; dest:x2; op2val:0x0
+TEST_CMV_OP( c.mv, x2, x2, 0x0, 0x0, x13, 8, x10)
+
+inst_2:
+// rd==x19, rs2==x7, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807
+// opcode: c.mv; op2:x7; dest:x19; op2val:0x7fffffffffffffff
+TEST_CMV_OP( c.mv, x19, x7, 0x7fffffffffffffff, 0x7fffffffffffffff, x13, 16, x10)
+
+inst_3:
+// rd==x6, rs2==x17, rs2_val == 1,
+// opcode: c.mv; op2:x17; dest:x6; op2val:0x1
+TEST_CMV_OP( c.mv, x6, x17, 0x1, 0x1, x13, 24, x10)
+
+inst_4:
+// rd==x14, rs2==x26, rs2_val == 2, rs2_val==2
+// opcode: c.mv; op2:x26; dest:x14; op2val:0x2
+TEST_CMV_OP( c.mv, x14, x26, 0x2, 0x2, x13, 32, x10)
+
+inst_5:
+// rd==x21, rs2==x5, rs2_val == 4, rs2_val==4
+// opcode: c.mv; op2:x5; dest:x21; op2val:0x4
+TEST_CMV_OP( c.mv, x21, x5, 0x4, 0x4, x13, 40, x10)
+
+inst_6:
+// rd==x27, rs2==x1, rs2_val == 8,
+// opcode: c.mv; op2:x1; dest:x27; op2val:0x8
+TEST_CMV_OP( c.mv, x27, x1, 0x8, 0x8, x13, 48, x10)
+
+inst_7:
+// rd==x17, rs2==x9, rs2_val == 16,
+// opcode: c.mv; op2:x9; dest:x17; op2val:0x10
+TEST_CMV_OP( c.mv, x17, x9, 0x10, 0x10, x13, 56, x10)
+
+inst_8:
+// rd==x0, rs2==x18, rs2_val == 32,
+// opcode: c.mv; op2:x18; dest:x0; op2val:0x20
+TEST_CMV_OP( c.mv, x0, x18, 0, 0x20, x13, 64, x10)
+
+inst_9:
+// rd==x9, rs2==x22, rs2_val == 64,
+// opcode: c.mv; op2:x22; dest:x9; op2val:0x40
+TEST_CMV_OP( c.mv, x9, x22, 0x40, 0x40, x13, 72, x10)
+
+inst_10:
+// rd==x4, rs2==x8, rs2_val == 128,
+// opcode: c.mv; op2:x8; dest:x4; op2val:0x80
+TEST_CMV_OP( c.mv, x4, x8, 0x80, 0x80, x13, 80, x10)
+
+inst_11:
+// rd==x3, rs2==x24, rs2_val == 256,
+// opcode: c.mv; op2:x24; dest:x3; op2val:0x100
+TEST_CMV_OP( c.mv, x3, x24, 0x100, 0x100, x13, 88, x10)
+
+inst_12:
+// rd==x20, rs2==x21, rs2_val == 512,
+// opcode: c.mv; op2:x21; dest:x20; op2val:0x200
+TEST_CMV_OP( c.mv, x20, x21, 0x200, 0x200, x13, 96, x10)
+
+inst_13:
+// rd==x12, rs2==x23, rs2_val == 1024,
+// opcode: c.mv; op2:x23; dest:x12; op2val:0x400
+TEST_CMV_OP( c.mv, x12, x23, 0x400, 0x400, x13, 104, x10)
+
+inst_14:
+// rd==x22, rs2==x31, rs2_val == 2048,
+// opcode: c.mv; op2:x31; dest:x22; op2val:0x800
+TEST_CMV_OP( c.mv, x22, x31, 0x800, 0x800, x13, 112, x10)
+
+inst_15:
+// rd==x18, rs2==x3, rs2_val == 4096,
+// opcode: c.mv; op2:x3; dest:x18; op2val:0x1000
+TEST_CMV_OP( c.mv, x18, x3, 0x1000, 0x1000, x13, 120, x10)
+
+inst_16:
+// rd==x7, rs2==x4, rs2_val == 8192,
+// opcode: c.mv; op2:x4; dest:x7; op2val:0x2000
+TEST_CMV_OP( c.mv, x7, x4, 0x2000, 0x2000, x13, 128, x10)
+
+inst_17:
+// rd==x8, rs2==x25, rs2_val == 16384,
+// opcode: c.mv; op2:x25; dest:x8; op2val:0x4000
+TEST_CMV_OP( c.mv, x8, x25, 0x4000, 0x4000, x13, 136, x10)
+
+inst_18:
+// rd==x15, rs2==x14, rs2_val == 32768,
+// opcode: c.mv; op2:x14; dest:x15; op2val:0x8000
+TEST_CMV_OP( c.mv, x15, x14, 0x8000, 0x8000, x13, 144, x10)
+
+inst_19:
+// rd==x31, rs2==x29, rs2_val == 65536,
+// opcode: c.mv; op2:x29; dest:x31; op2val:0x10000
+TEST_CMV_OP( c.mv, x31, x29, 0x10000, 0x10000, x13, 152, x10)
+
+inst_20:
+// rd==x29, rs2==x28, rs2_val == 131072,
+// opcode: c.mv; op2:x28; dest:x29; op2val:0x20000
+TEST_CMV_OP( c.mv, x29, x28, 0x20000, 0x20000, x13, 160, x10)
+
+inst_21:
+// rd==x10, rs2==x16, rs2_val == 262144,
+// opcode: c.mv; op2:x16; dest:x10; op2val:0x40000
+TEST_CMV_OP( c.mv, x10, x16, 0x40000, 0x40000, x13, 168, x3)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_22:
+// rd==x25, rs2==x20, rs2_val == 524288,
+// opcode: c.mv; op2:x20; dest:x25; op2val:0x80000
+TEST_CMV_OP( c.mv, x25, x20, 0x80000, 0x80000, x2, 0, x3)
+
+inst_23:
+// rd==x5, rs2==x13, rs2_val == 1048576,
+// opcode: c.mv; op2:x13; dest:x5; op2val:0x100000
+TEST_CMV_OP( c.mv, x5, x13, 0x100000, 0x100000, x2, 8, x3)
+
+inst_24:
+// rd==x1, rs2==x6, rs2_val == 2097152,
+// opcode: c.mv; op2:x6; dest:x1; op2val:0x200000
+TEST_CMV_OP( c.mv, x1, x6, 0x200000, 0x200000, x2, 16, x3)
+
+inst_25:
+// rd==x26, rs2==x15, rs2_val == 4194304,
+// opcode: c.mv; op2:x15; dest:x26; op2val:0x400000
+TEST_CMV_OP( c.mv, x26, x15, 0x400000, 0x400000, x2, 24, x3)
+
+inst_26:
+// rd==x24, rs2==x10, rs2_val == 8388608,
+// opcode: c.mv; op2:x10; dest:x24; op2val:0x800000
+TEST_CMV_OP( c.mv, x24, x10, 0x800000, 0x800000, x2, 32, x3)
+
+inst_27:
+// rd==x28, rs2==x30, rs2_val == 16777216,
+// opcode: c.mv; op2:x30; dest:x28; op2val:0x1000000
+TEST_CMV_OP( c.mv, x28, x30, 0x1000000, 0x1000000, x2, 40, x3)
+
+inst_28:
+// rd==x23, rs2==x19, rs2_val == 33554432,
+// opcode: c.mv; op2:x19; dest:x23; op2val:0x2000000
+TEST_CMV_OP( c.mv, x23, x19, 0x2000000, 0x2000000, x2, 48, x3)
+
+inst_29:
+// rd==x30, rs2==x11, rs2_val == 67108864,
+// opcode: c.mv; op2:x11; dest:x30; op2val:0x4000000
+TEST_CMV_OP( c.mv, x30, x11, 0x4000000, 0x4000000, x2, 56, x3)
+
+inst_30:
+// rd==x13, rs2==x27, rs2_val == 134217728,
+// opcode: c.mv; op2:x27; dest:x13; op2val:0x8000000
+TEST_CMV_OP( c.mv, x13, x27, 0x8000000, 0x8000000, x2, 64, x3)
+
+inst_31:
+// rd==x16, rs2_val == 268435456,
+// opcode: c.mv; op2:x28; dest:x16; op2val:0x10000000
+TEST_CMV_OP( c.mv, x16, x28, 0x10000000, 0x10000000, x2, 72, x3)
+
+inst_32:
+// rs2_val == 536870912,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x20000000
+TEST_CMV_OP( c.mv, x10, x11, 0x20000000, 0x20000000, x2, 80, x3)
+
+inst_33:
+// rs2_val == 1073741824,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x40000000
+TEST_CMV_OP( c.mv, x10, x11, 0x40000000, 0x40000000, x2, 88, x3)
+
+inst_34:
+// rs2_val == 2147483648,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x80000000
+TEST_CMV_OP( c.mv, x10, x11, 0x80000000, 0x80000000, x2, 96, x3)
+
+inst_35:
+// rs2_val == 4294967296,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x100000000
+TEST_CMV_OP( c.mv, x10, x11, 0x100000000, 0x100000000, x2, 104, x3)
+
+inst_36:
+// rs2_val == 8589934592,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x200000000
+TEST_CMV_OP( c.mv, x10, x11, 0x200000000, 0x200000000, x2, 112, x3)
+
+inst_37:
+// rs2_val == 17179869184,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x400000000
+TEST_CMV_OP( c.mv, x10, x11, 0x400000000, 0x400000000, x2, 120, x3)
+
+inst_38:
+// rs2_val == 34359738368,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x800000000
+TEST_CMV_OP( c.mv, x10, x11, 0x800000000, 0x800000000, x2, 128, x3)
+
+inst_39:
+// rs2_val == 68719476736,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x1000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x1000000000, 0x1000000000, x2, 136, x3)
+
+inst_40:
+// rs2_val == 137438953472,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x2000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x2000000000, 0x2000000000, x2, 144, x3)
+
+inst_41:
+// rs2_val == 274877906944,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x4000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x4000000000, 0x4000000000, x2, 152, x3)
+
+inst_42:
+// rs2_val == 549755813888,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x8000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x8000000000, 0x8000000000, x2, 160, x3)
+
+inst_43:
+// rs2_val == 1099511627776,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x10000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x10000000000, 0x10000000000, x2, 168, x3)
+
+inst_44:
+// rs2_val == 2199023255552,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x20000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x20000000000, 0x20000000000, x2, 176, x3)
+
+inst_45:
+// rs2_val == 4398046511104,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x40000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x40000000000, 0x40000000000, x2, 184, x3)
+
+inst_46:
+// rs2_val == 8796093022208,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x80000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x80000000000, 0x80000000000, x2, 192, x3)
+
+inst_47:
+// rs2_val == 17592186044416,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x100000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x100000000000, 0x100000000000, x2, 200, x3)
+
+inst_48:
+// rs2_val == 35184372088832,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x200000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x200000000000, 0x200000000000, x2, 208, x3)
+
+inst_49:
+// rs2_val == 70368744177664,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x400000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x400000000000, 0x400000000000, x2, 216, x3)
+
+inst_50:
+// rs2_val == 140737488355328,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x800000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x800000000000, 0x800000000000, x2, 224, x3)
+
+inst_51:
+// rs2_val == 281474976710656,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x1000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x1000000000000, 0x1000000000000, x2, 232, x3)
+
+inst_52:
+// rs2_val == 562949953421312,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x2000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x2000000000000, 0x2000000000000, x2, 240, x3)
+
+inst_53:
+// rs2_val == 1125899906842624,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x4000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x4000000000000, 0x4000000000000, x2, 248, x3)
+
+inst_54:
+// rs2_val == 2251799813685248,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x8000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x8000000000000, 0x8000000000000, x2, 256, x3)
+
+inst_55:
+// rs2_val == 4503599627370496,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x10000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x10000000000000, 0x10000000000000, x2, 264, x3)
+
+inst_56:
+// rs2_val == 9007199254740992,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x20000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x20000000000000, 0x20000000000000, x2, 272, x3)
+
+inst_57:
+// rs2_val == 18014398509481984,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x40000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x40000000000000, 0x40000000000000, x2, 280, x3)
+
+inst_58:
+// rs2_val == 36028797018963968,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x80000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x80000000000000, 0x80000000000000, x2, 288, x3)
+
+inst_59:
+// rs2_val == 72057594037927936,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x100000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x100000000000000, 0x100000000000000, x2, 296, x3)
+
+inst_60:
+// rs2_val == 144115188075855872,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x200000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x200000000000000, 0x200000000000000, x2, 304, x3)
+
+inst_61:
+// rs2_val == 288230376151711744,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x400000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x400000000000000, 0x400000000000000, x2, 312, x3)
+
+inst_62:
+// rs2_val == 576460752303423488,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x800000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x800000000000000, 0x800000000000000, x2, 320, x3)
+
+inst_63:
+// rs2_val == 1152921504606846976,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x1000000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x1000000000000000, 0x1000000000000000, x2, 328, x3)
+
+inst_64:
+// rs2_val == 2305843009213693952,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x2000000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x2000000000000000, 0x2000000000000000, x2, 336, x3)
+
+inst_65:
+// rs2_val == 4611686018427387904,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x4000000000000000
+TEST_CMV_OP( c.mv, x10, x11, 0x4000000000000000, 0x4000000000000000, x2, 344, x3)
+
+inst_66:
+// rs2_val == -2,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x2
+TEST_CMV_OP( c.mv, x10, x11, -0x2, -0x2, x2, 352, x3)
+
+inst_67:
+// rs2_val == -3,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x3
+TEST_CMV_OP( c.mv, x10, x11, -0x3, -0x3, x2, 360, x3)
+
+inst_68:
+// rs2_val == -5,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x5
+TEST_CMV_OP( c.mv, x10, x11, -0x5, -0x5, x2, 368, x3)
+
+inst_69:
+// rs2_val == -9,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x9
+TEST_CMV_OP( c.mv, x10, x11, -0x9, -0x9, x2, 376, x3)
+
+inst_70:
+// rs2_val == -17,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x11
+TEST_CMV_OP( c.mv, x10, x11, -0x11, -0x11, x2, 384, x3)
+
+inst_71:
+// rs2_val == -33,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x21
+TEST_CMV_OP( c.mv, x10, x11, -0x21, -0x21, x2, 392, x3)
+
+inst_72:
+// rs2_val == -65,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x41
+TEST_CMV_OP( c.mv, x10, x11, -0x41, -0x41, x2, 400, x3)
+
+inst_73:
+// rs2_val == -129,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x81
+TEST_CMV_OP( c.mv, x10, x11, -0x81, -0x81, x2, 408, x3)
+
+inst_74:
+// rs2_val == -257,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x101
+TEST_CMV_OP( c.mv, x10, x11, -0x101, -0x101, x2, 416, x3)
+
+inst_75:
+// rs2_val == -513,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x201
+TEST_CMV_OP( c.mv, x10, x11, -0x201, -0x201, x2, 424, x3)
+
+inst_76:
+// rs2_val == -1025,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x401
+TEST_CMV_OP( c.mv, x10, x11, -0x401, -0x401, x2, 432, x3)
+
+inst_77:
+// rs2_val == -2049,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x801
+TEST_CMV_OP( c.mv, x10, x11, -0x801, -0x801, x2, 440, x3)
+
+inst_78:
+// rs2_val == -4097,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x1001
+TEST_CMV_OP( c.mv, x10, x11, -0x1001, -0x1001, x2, 448, x3)
+
+inst_79:
+// rs2_val == -8193,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x2001
+TEST_CMV_OP( c.mv, x10, x11, -0x2001, -0x2001, x2, 456, x3)
+
+inst_80:
+// rs2_val == -16385,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x4001
+TEST_CMV_OP( c.mv, x10, x11, -0x4001, -0x4001, x2, 464, x3)
+
+inst_81:
+// rs2_val == -32769,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x8001
+TEST_CMV_OP( c.mv, x10, x11, -0x8001, -0x8001, x2, 472, x3)
+
+inst_82:
+// rs2_val == -65537,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x10001
+TEST_CMV_OP( c.mv, x10, x11, -0x10001, -0x10001, x2, 480, x3)
+
+inst_83:
+// rs2_val == -131073,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x20001
+TEST_CMV_OP( c.mv, x10, x11, -0x20001, -0x20001, x2, 488, x3)
+
+inst_84:
+// rs2_val == -262145,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x40001
+TEST_CMV_OP( c.mv, x10, x11, -0x40001, -0x40001, x2, 496, x3)
+
+inst_85:
+// rs2_val == -524289,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x80001
+TEST_CMV_OP( c.mv, x10, x11, -0x80001, -0x80001, x2, 504, x3)
+
+inst_86:
+// rs2_val == -1048577,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x100001
+TEST_CMV_OP( c.mv, x10, x11, -0x100001, -0x100001, x2, 512, x3)
+
+inst_87:
+// rs2_val == -2305843009213693953,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x2000000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x2000000000000001, -0x2000000000000001, x2, 520, x3)
+
+inst_88:
+// rs2_val == -4611686018427387905,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x4000000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x4000000000000001, -0x4000000000000001, x2, 528, x3)
+
+inst_89:
+// rs2_val == 6148914691236517205, rs2_val==6148914691236517205
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x5555555555555555
+TEST_CMV_OP( c.mv, x10, x11, 0x5555555555555555, 0x5555555555555555, x2, 536, x3)
+
+inst_90:
+// rs2_val == -6148914691236517206, rs2_val==-6148914691236517206
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x5555555555555556
+TEST_CMV_OP( c.mv, x10, x11, -0x5555555555555556, -0x5555555555555556, x2, 544, x3)
+
+inst_91:
+// rs2_val==3,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x3
+TEST_CMV_OP( c.mv, x10, x11, 0x3, 0x3, x2, 552, x3)
+
+inst_92:
+// rs2_val==5,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x5
+TEST_CMV_OP( c.mv, x10, x11, 0x5, 0x5, x2, 560, x3)
+
+inst_93:
+// rs2_val==3689348814741910323,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x3333333333333333
+TEST_CMV_OP( c.mv, x10, x11, 0x3333333333333333, 0x3333333333333333, x2, 568, x3)
+
+inst_94:
+// rs2_val==7378697629483820646,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x6666666666666666
+TEST_CMV_OP( c.mv, x10, x11, 0x6666666666666666, 0x6666666666666666, x2, 576, x3)
+
+inst_95:
+// rs2_val==-3037000499,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0xb504f333
+TEST_CMV_OP( c.mv, x10, x11, -0xb504f333, -0xb504f333, x2, 584, x3)
+
+inst_96:
+// rs2_val==3037000499,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0xb504f333
+TEST_CMV_OP( c.mv, x10, x11, 0xb504f333, 0xb504f333, x2, 592, x3)
+
+inst_97:
+// rs2_val==6148914691236517204,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x5555555555555554
+TEST_CMV_OP( c.mv, x10, x11, 0x5555555555555554, 0x5555555555555554, x2, 600, x3)
+
+inst_98:
+// rs2_val==3689348814741910322,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x3333333333333332
+TEST_CMV_OP( c.mv, x10, x11, 0x3333333333333332, 0x3333333333333332, x2, 608, x3)
+
+inst_99:
+// rs2_val==7378697629483820645,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x6666666666666665
+TEST_CMV_OP( c.mv, x10, x11, 0x6666666666666665, 0x6666666666666665, x2, 616, x3)
+
+inst_100:
+// rs2_val==3037000498,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0xb504f332
+TEST_CMV_OP( c.mv, x10, x11, 0xb504f332, 0xb504f332, x2, 624, x3)
+
+inst_101:
+// rs2_val==6148914691236517206,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x5555555555555556
+TEST_CMV_OP( c.mv, x10, x11, 0x5555555555555556, 0x5555555555555556, x2, 632, x3)
+
+inst_102:
+// rs2_val==-6148914691236517205,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x5555555555555555
+TEST_CMV_OP( c.mv, x10, x11, -0x5555555555555555, -0x5555555555555555, x2, 640, x3)
+
+inst_103:
+// rs2_val==6,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x6
+TEST_CMV_OP( c.mv, x10, x11, 0x6, 0x6, x2, 648, x3)
+
+inst_104:
+// rs2_val==3689348814741910324,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x3333333333333334
+TEST_CMV_OP( c.mv, x10, x11, 0x3333333333333334, 0x3333333333333334, x2, 656, x3)
+
+inst_105:
+// rs2_val==7378697629483820647,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x6666666666666667
+TEST_CMV_OP( c.mv, x10, x11, 0x6666666666666667, 0x6666666666666667, x2, 664, x3)
+
+inst_106:
+// rs2_val==-3037000498,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0xb504f332
+TEST_CMV_OP( c.mv, x10, x11, -0xb504f332, -0xb504f332, x2, 672, x3)
+
+inst_107:
+// rs2_val==3037000500,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0xb504f334
+TEST_CMV_OP( c.mv, x10, x11, 0xb504f334, 0xb504f334, x2, 680, x3)
+
+inst_108:
+// rs2_val == -2097153,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x200001
+TEST_CMV_OP( c.mv, x10, x11, -0x200001, -0x200001, x2, 688, x3)
+
+inst_109:
+// rs2_val == -4194305,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x400001
+TEST_CMV_OP( c.mv, x10, x11, -0x400001, -0x400001, x2, 696, x3)
+
+inst_110:
+// rs2_val == -8388609,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x800001
+TEST_CMV_OP( c.mv, x10, x11, -0x800001, -0x800001, x2, 704, x3)
+
+inst_111:
+// rs2_val == -16777217,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x1000001
+TEST_CMV_OP( c.mv, x10, x11, -0x1000001, -0x1000001, x2, 712, x3)
+
+inst_112:
+// rs2_val == -33554433,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x2000001
+TEST_CMV_OP( c.mv, x10, x11, -0x2000001, -0x2000001, x2, 720, x3)
+
+inst_113:
+// rs2_val == -67108865,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x4000001
+TEST_CMV_OP( c.mv, x10, x11, -0x4000001, -0x4000001, x2, 728, x3)
+
+inst_114:
+// rs2_val == -134217729,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x8000001
+TEST_CMV_OP( c.mv, x10, x11, -0x8000001, -0x8000001, x2, 736, x3)
+
+inst_115:
+// rs2_val == -268435457,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x10000001
+TEST_CMV_OP( c.mv, x10, x11, -0x10000001, -0x10000001, x2, 744, x3)
+
+inst_116:
+// rs2_val == -536870913,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x20000001
+TEST_CMV_OP( c.mv, x10, x11, -0x20000001, -0x20000001, x2, 752, x3)
+
+inst_117:
+// rs2_val == -1073741825,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x40000001
+TEST_CMV_OP( c.mv, x10, x11, -0x40000001, -0x40000001, x2, 760, x3)
+
+inst_118:
+// rs2_val == -2147483649,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x80000001
+TEST_CMV_OP( c.mv, x10, x11, -0x80000001, -0x80000001, x2, 768, x3)
+
+inst_119:
+// rs2_val == -4294967297,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x100000001
+TEST_CMV_OP( c.mv, x10, x11, -0x100000001, -0x100000001, x2, 776, x3)
+
+inst_120:
+// rs2_val == -8589934593,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x200000001
+TEST_CMV_OP( c.mv, x10, x11, -0x200000001, -0x200000001, x2, 784, x3)
+
+inst_121:
+// rs2_val == -17179869185,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x400000001
+TEST_CMV_OP( c.mv, x10, x11, -0x400000001, -0x400000001, x2, 792, x3)
+
+inst_122:
+// rs2_val == -34359738369,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x800000001
+TEST_CMV_OP( c.mv, x10, x11, -0x800000001, -0x800000001, x2, 800, x3)
+
+inst_123:
+// rs2_val == -68719476737,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x1000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x1000000001, -0x1000000001, x2, 808, x3)
+
+inst_124:
+// rs2_val == -137438953473,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x2000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x2000000001, -0x2000000001, x2, 816, x3)
+
+inst_125:
+// rs2_val == -274877906945,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x4000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x4000000001, -0x4000000001, x2, 824, x3)
+
+inst_126:
+// rs2_val == -549755813889,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x8000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x8000000001, -0x8000000001, x2, 832, x3)
+
+inst_127:
+// rs2_val == -1099511627777,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x10000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x10000000001, -0x10000000001, x2, 840, x3)
+
+inst_128:
+// rs2_val == -2199023255553,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x20000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x20000000001, -0x20000000001, x2, 848, x3)
+
+inst_129:
+// rs2_val == -4398046511105,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x40000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x40000000001, -0x40000000001, x2, 856, x3)
+
+inst_130:
+// rs2_val == -8796093022209,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x80000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x80000000001, -0x80000000001, x2, 864, x3)
+
+inst_131:
+// rs2_val == -17592186044417,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x100000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x100000000001, -0x100000000001, x2, 872, x3)
+
+inst_132:
+// rs2_val == -35184372088833,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x200000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x200000000001, -0x200000000001, x2, 880, x3)
+
+inst_133:
+// rs2_val == -70368744177665,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x400000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x400000000001, -0x400000000001, x2, 888, x3)
+
+inst_134:
+// rs2_val == -140737488355329,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x800000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x800000000001, -0x800000000001, x2, 896, x3)
+
+inst_135:
+// rs2_val == -281474976710657,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x1000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x1000000000001, -0x1000000000001, x2, 904, x3)
+
+inst_136:
+// rs2_val == -562949953421313,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x2000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x2000000000001, -0x2000000000001, x2, 912, x3)
+
+inst_137:
+// rs2_val == -1125899906842625,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x4000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x4000000000001, -0x4000000000001, x2, 920, x3)
+
+inst_138:
+// rs2_val == -2251799813685249,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x8000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x8000000000001, -0x8000000000001, x2, 928, x3)
+
+inst_139:
+// rs2_val == -4503599627370497,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x10000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x10000000000001, -0x10000000000001, x2, 936, x3)
+
+inst_140:
+// rs2_val == -9007199254740993,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x20000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x20000000000001, -0x20000000000001, x2, 944, x3)
+
+inst_141:
+// rs2_val == -18014398509481985,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x40000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x40000000000001, -0x40000000000001, x2, 952, x3)
+
+inst_142:
+// rs2_val == -36028797018963969,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x80000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x80000000000001, -0x80000000000001, x2, 960, x3)
+
+inst_143:
+// rs2_val == -72057594037927937,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x100000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x100000000000001, -0x100000000000001, x2, 968, x3)
+
+inst_144:
+// rs2_val == -144115188075855873,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x200000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x200000000000001, -0x200000000000001, x2, 976, x3)
+
+inst_145:
+// rs2_val == -288230376151711745,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x400000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x400000000000001, -0x400000000000001, x2, 984, x3)
+
+inst_146:
+// rs2_val == -576460752303423489,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x800000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x800000000000001, -0x800000000000001, x2, 992, x3)
+
+inst_147:
+// rs2_val == -1152921504606846977,
+// opcode: c.mv; op2:x11; dest:x10; op2val:-0x1000000000000001
+TEST_CMV_OP( c.mv, x10, x11, -0x1000000000000001, -0x1000000000000001, x2, 1000, x3)
+
+inst_148:
+// rs2_val == 32,
+// opcode: c.mv; op2:x11; dest:x10; op2val:0x20
+TEST_CMV_OP( c.mv, x10, x11, 0x20, 0x20, x2, 1008, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x13_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x13_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 127*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cnop-01.S b/riscof/suite/rv64i_m/C/cnop-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..70b2e3df20d8a6dab12d986991f2ff6bf34f37d9
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cnop-01.S
@@ -0,0 +1,139 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.nop instruction of the RISC-V C extension for the cnop covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cnop)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// imm_val == 1,
+// opcode:c.nop; immval:0x1
+TEST_CNOP_OP(c.nop, x2, 0x1, x1, 0)
+
+inst_1:
+// imm_val == 2,
+// opcode:c.nop; immval:0x2
+TEST_CNOP_OP(c.nop, x2, 0x2, x1, 8)
+
+inst_2:
+// imm_val == 4,
+// opcode:c.nop; immval:0x4
+TEST_CNOP_OP(c.nop, x2, 0x4, x1, 16)
+
+inst_3:
+// imm_val == 8,
+// opcode:c.nop; immval:0x8
+TEST_CNOP_OP(c.nop, x2, 0x8, x1, 24)
+
+inst_4:
+// imm_val == 16,
+// opcode:c.nop; immval:0x10
+TEST_CNOP_OP(c.nop, x2, 0x10, x1, 32)
+
+inst_5:
+// imm_val == -32,
+// opcode:c.nop; immval:-0x20
+TEST_CNOP_OP(c.nop, x2, -0x20, x1, 40)
+
+inst_6:
+// imm_val == -2,
+// opcode:c.nop; immval:-0x2
+TEST_CNOP_OP(c.nop, x2, -0x2, x1, 48)
+
+inst_7:
+// imm_val == -3,
+// opcode:c.nop; immval:-0x3
+TEST_CNOP_OP(c.nop, x2, -0x3, x1, 56)
+
+inst_8:
+// imm_val == -5,
+// opcode:c.nop; immval:-0x5
+TEST_CNOP_OP(c.nop, x2, -0x5, x1, 64)
+
+inst_9:
+// imm_val == -9,
+// opcode:c.nop; immval:-0x9
+TEST_CNOP_OP(c.nop, x2, -0x9, x1, 72)
+
+inst_10:
+// imm_val == -17,
+// opcode:c.nop; immval:-0x11
+TEST_CNOP_OP(c.nop, x2, -0x11, x1, 80)
+
+inst_11:
+// imm_val == 31,
+// opcode:c.nop; immval:0x1f
+TEST_CNOP_OP(c.nop, x2, 0x1f, x1, 88)
+
+inst_12:
+// imm_val == 21,
+// opcode:c.nop; immval:0x15
+TEST_CNOP_OP(c.nop, x2, 0x15, x1, 96)
+
+inst_13:
+// imm_val == -22,
+// opcode:c.nop; immval:-0x16
+TEST_CNOP_OP(c.nop, x2, -0x16, x1, 104)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 14*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cor-01.S b/riscof/suite/rv64i_m/C/cor-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..9269f65925f429f4d0438b10c06da78e1aa5b702
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cor-01.S
@@ -0,0 +1,3479 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.or instruction of the RISC-V C extension for the cor covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cor)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x13, rs2==x12, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, rs2_val < 0, rs1_val == 33554432
+// opcode: c.or; op1:x13; op2:x12; op1val:0x2000000; op2val:-0x8000000000000000
+TEST_CR_OP( c.or, x13, x12, 0x8000000002000000, 0x2000000, -0x8000000000000000, x1, 0, x2)
+
+inst_1:
+// rs1 == rs2, rs1==x8, rs2==x8, rs2_val == 0, rs1_val == -9223372036854775808, rs1_val == (-2**(xlen-1))
+// opcode: c.or; op1:x8; op2:x8; op1val:-0x8000000000000000; op2val:-0x8000000000000000
+TEST_CR_OP( c.or, x8, x8, 0x8000000000000000, -0x8000000000000000, -0x8000000000000000, x1, 8, x2)
+
+inst_2:
+// rs1==x12, rs2==x9, rs2_val == (2**(xlen-1)-1), rs2_val > 0, rs2_val == 9223372036854775807
+// opcode: c.or; op1:x12; op2:x9; op1val:-0xb504f332; op2val:0x7fffffffffffffff
+TEST_CR_OP( c.or, x12, x9, 0xffffffffffffffff, -0xb504f332, 0x7fffffffffffffff, x1, 16, x2)
+
+inst_3:
+// rs1==x9, rs2==x15, rs2_val == 1,
+// opcode: c.or; op1:x9; op2:x15; op1val:0x5; op2val:0x1
+TEST_CR_OP( c.or, x9, x15, 0x5, 0x5, 0x1, x1, 24, x2)
+
+inst_4:
+// rs1==x10, rs2==x14, rs1_val == 0, rs2_val == -131073
+// opcode: c.or; op1:x10; op2:x14; op1val:0x0; op2val:-0x20001
+TEST_CR_OP( c.or, x10, x14, 0xfffffffffffdffff, 0x0, -0x20001, x1, 32, x2)
+
+inst_5:
+// rs1==x11, rs2==x10, rs1_val == (2**(xlen-1)-1), rs2_val == -72057594037927937, rs1_val == 9223372036854775807
+// opcode: c.or; op1:x11; op2:x10; op1val:0x7fffffffffffffff; op2val:-0x100000000000001
+TEST_CR_OP( c.or, x11, x10, 0xffffffffffffffff, 0x7fffffffffffffff, -0x100000000000001, x1, 40, x2)
+
+inst_6:
+// rs1==x15, rs2==x13, rs1_val == 1, rs2_val == -129
+// opcode: c.or; op1:x15; op2:x13; op1val:0x1; op2val:-0x81
+TEST_CR_OP( c.or, x15, x13, 0xffffffffffffff7f, 0x1, -0x81, x1, 48, x2)
+
+inst_7:
+// rs1==x14, rs2==x11, rs2_val == 2, rs1_val == 2199023255552
+// opcode: c.or; op1:x14; op2:x11; op1val:0x20000000000; op2val:0x2
+TEST_CR_OP( c.or, x14, x11, 0x20000000002, 0x20000000000, 0x2, x1, 56, x2)
+
+inst_8:
+// rs2_val == 4, rs1_val == -536870913
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x20000001; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xffffffffdfffffff, -0x20000001, 0x4, x1, 64, x2)
+
+inst_9:
+// rs2_val == 8,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x8
+TEST_CR_OP( c.or, x10, x11, 0xd, 0x5, 0x8, x1, 72, x2)
+
+inst_10:
+// rs2_val == 16,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x9; op2val:0x10
+TEST_CR_OP( c.or, x10, x11, 0x19, 0x9, 0x10, x1, 80, x2)
+
+inst_11:
+// rs2_val == 32,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x20
+TEST_CR_OP( c.or, x10, x11, 0x23, 0x3, 0x20, x1, 88, x2)
+
+inst_12:
+// rs2_val == 64, rs1_val == -32769
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x8001; op2val:0x40
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffff7fff, -0x8001, 0x40, x1, 96, x2)
+
+inst_13:
+// rs2_val == 128,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2000000; op2val:0x80
+TEST_CR_OP( c.or, x10, x11, 0x2000080, 0x2000000, 0x80, x1, 104, x2)
+
+inst_14:
+// rs2_val == 256,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x100
+TEST_CR_OP( c.or, x10, x11, 0x100, 0x0, 0x100, x1, 112, x2)
+
+inst_15:
+// rs2_val == 512, rs1_val == 1152921504606846976
+// opcode: c.or; op1:x10; op2:x11; op1val:0x1000000000000000; op2val:0x200
+TEST_CR_OP( c.or, x10, x11, 0x1000000000000200, 0x1000000000000000, 0x200, x1, 120, x2)
+
+inst_16:
+// rs2_val == 1024, rs1_val == -274877906945
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x4000000001; op2val:0x400
+TEST_CR_OP( c.or, x10, x11, 0xffffffbfffffffff, -0x4000000001, 0x400, x1, 128, x2)
+
+inst_17:
+// rs2_val == 2048, rs1_val == 64
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40; op2val:0x800
+TEST_CR_OP( c.or, x10, x11, 0x840, 0x40, 0x800, x1, 136, x2)
+
+inst_18:
+// rs2_val == 4096, rs1_val == 256
+// opcode: c.or; op1:x10; op2:x11; op1val:0x100; op2val:0x1000
+TEST_CR_OP( c.or, x10, x11, 0x1100, 0x100, 0x1000, x1, 144, x2)
+
+inst_19:
+// rs2_val == 8192, rs1_val == 2251799813685248
+// opcode: c.or; op1:x10; op2:x11; op1val:0x8000000000000; op2val:0x2000
+TEST_CR_OP( c.or, x10, x11, 0x8000000002000, 0x8000000000000, 0x2000, x1, 152, x2)
+
+inst_20:
+// rs2_val == 16384, rs1_val == 68719476736
+// opcode: c.or; op1:x10; op2:x11; op1val:0x1000000000; op2val:0x4000
+TEST_CR_OP( c.or, x10, x11, 0x1000004000, 0x1000000000, 0x4000, x1, 160, x2)
+
+inst_21:
+// rs2_val == 32768, rs1_val == 8388608
+// opcode: c.or; op1:x10; op2:x11; op1val:0x800000; op2val:0x8000
+TEST_CR_OP( c.or, x10, x11, 0x808000, 0x800000, 0x8000, x1, 168, x2)
+
+inst_22:
+// rs2_val == 65536, rs1_val == -562949953421313
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x2000000000001; op2val:0x10000
+TEST_CR_OP( c.or, x10, x11, 0xfffdffffffffffff, -0x2000000000001, 0x10000, x1, 176, x2)
+
+inst_23:
+// rs2_val == 131072, rs1_val == -67108865
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x4000001; op2val:0x20000
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffbffffff, -0x4000001, 0x20000, x1, 184, x2)
+
+inst_24:
+// rs2_val == 262144, rs1_val == 2
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x40000
+TEST_CR_OP( c.or, x10, x11, 0x40002, 0x2, 0x40000, x1, 192, x2)
+
+inst_25:
+// rs2_val == 524288, rs1_val == 16
+// opcode: c.or; op1:x10; op2:x11; op1val:0x10; op2val:0x80000
+TEST_CR_OP( c.or, x10, x11, 0x80010, 0x10, 0x80000, x1, 200, x2)
+
+inst_26:
+// rs2_val == 1048576,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x100000
+TEST_CR_OP( c.or, x10, x11, 0xb514f334, 0xb504f334, 0x100000, x1, 208, x2)
+
+inst_27:
+// rs2_val == 2097152, rs1_val == -33554433
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x2000001; op2val:0x200000
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffdffffff, -0x2000001, 0x200000, x1, 216, x2)
+
+inst_28:
+// rs2_val == 4194304, rs1_val == -8388609
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x800001; op2val:0x400000
+TEST_CR_OP( c.or, x10, x11, 0xffffffffff7fffff, -0x800001, 0x400000, x1, 224, x2)
+
+inst_29:
+// rs2_val == 8388608, rs1_val == -34359738369
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x800000001; op2val:0x800000
+TEST_CR_OP( c.or, x10, x11, 0xfffffff7ffffffff, -0x800000001, 0x800000, x1, 232, x2)
+
+inst_30:
+// rs2_val == 16777216, rs1_val == -65
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x41; op2val:0x1000000
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffbf, -0x41, 0x1000000, x1, 240, x2)
+
+inst_31:
+// rs2_val == 33554432,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x4000000000000000; op2val:0x2000000
+TEST_CR_OP( c.or, x10, x11, 0xc000000002000000, -0x4000000000000000, 0x2000000, x1, 248, x2)
+
+inst_32:
+// rs2_val == 67108864, rs1_val == 4
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x4000000
+TEST_CR_OP( c.or, x10, x11, 0x4000004, 0x4, 0x4000000, x1, 256, x2)
+
+inst_33:
+// rs2_val == 134217728, rs1_val == 131072
+// opcode: c.or; op1:x10; op2:x11; op1val:0x20000; op2val:0x8000000
+TEST_CR_OP( c.or, x10, x11, 0x8020000, 0x20000, 0x8000000, x1, 264, x2)
+
+inst_34:
+// rs2_val == 268435456,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x10000000
+TEST_CR_OP( c.or, x10, x11, 0x10000004, 0x4, 0x10000000, x1, 272, x2)
+
+inst_35:
+// rs2_val == 536870912, rs1_val == 1073741824
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40000000; op2val:0x20000000
+TEST_CR_OP( c.or, x10, x11, 0x60000000, 0x40000000, 0x20000000, x1, 280, x2)
+
+inst_36:
+// rs2_val == 1073741824,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x40000000
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x40000000, x1, 288, x2)
+
+inst_37:
+// rs2_val == 2147483648,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x20000; op2val:0x80000000
+TEST_CR_OP( c.or, x10, x11, 0x80020000, 0x20000, 0x80000000, x1, 296, x2)
+
+inst_38:
+// rs2_val == 4294967296, rs1_val == -144115188075855873
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x200000000000001; op2val:0x100000000
+TEST_CR_OP( c.or, x10, x11, 0xfdffffffffffffff, -0x200000000000001, 0x100000000, x1, 304, x2)
+
+inst_39:
+// rs2_val == 8589934592, rs1_val == -1152921504606846977
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:0x200000000
+TEST_CR_OP( c.or, x10, x11, 0xefffffffffffffff, -0x1000000000000001, 0x200000000, x1, 312, x2)
+
+inst_40:
+// rs2_val == 17179869184,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x400000000
+TEST_CR_OP( c.or, x10, x11, 0x400000005, 0x5, 0x400000000, x1, 320, x2)
+
+inst_41:
+// rs2_val == 34359738368,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x800000000
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x800000000, x1, 328, x2)
+
+inst_42:
+// rs2_val == 68719476736,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x1000000000
+TEST_CR_OP( c.or, x10, x11, 0x1000000006, 0x6, 0x1000000000, x1, 336, x2)
+
+inst_43:
+// rs2_val == 137438953472, rs1_val == 1024
+// opcode: c.or; op1:x10; op2:x11; op1val:0x400; op2val:0x2000000000
+TEST_CR_OP( c.or, x10, x11, 0x2000000400, 0x400, 0x2000000000, x1, 344, x2)
+
+inst_44:
+// rs2_val == 274877906944,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4000000000
+TEST_CR_OP( c.or, x10, x11, 0x3333337333333334, 0x3333333333333334, 0x4000000000, x1, 352, x2)
+
+inst_45:
+// rs2_val == 549755813888,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x7; op2val:0x8000000000
+TEST_CR_OP( c.or, x10, x11, 0x8000000007, 0x7, 0x8000000000, x1, 360, x2)
+
+inst_46:
+// rs2_val == 1099511627776,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x10000000000
+TEST_CR_OP( c.or, x10, x11, 0x10000000002, 0x2, 0x10000000000, x1, 368, x2)
+
+inst_47:
+// rs2_val == 2199023255552, rs1_val == -70368744177665
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x400000000001; op2val:0x20000000000
+TEST_CR_OP( c.or, x10, x11, 0xffffbfffffffffff, -0x400000000001, 0x20000000000, x1, 376, x2)
+
+inst_48:
+// rs2_val == 4398046511104, rs1_val == 34359738368
+// opcode: c.or; op1:x10; op2:x11; op1val:0x800000000; op2val:0x40000000000
+TEST_CR_OP( c.or, x10, x11, 0x40800000000, 0x800000000, 0x40000000000, x1, 384, x2)
+
+inst_49:
+// rs2_val == 8796093022208, rs1_val == -268435457
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x10000001; op2val:0x80000000000
+TEST_CR_OP( c.or, x10, x11, 0xffffffffefffffff, -0x10000001, 0x80000000000, x1, 392, x2)
+
+inst_50:
+// rs2_val == 17592186044416,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x100000000000
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x100000000000, x1, 400, x2)
+
+inst_51:
+// rs2_val == 35184372088832, rs1_val == -131073
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x20001; op2val:0x200000000000
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffdffff, -0x20001, 0x200000000000, x1, 408, x2)
+
+inst_52:
+// rs2_val == 70368744177664,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x400000000000
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x400000000000, x1, 416, x2)
+
+inst_53:
+// rs2_val == 140737488355328,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x800000000; op2val:0x800000000000
+TEST_CR_OP( c.or, x10, x11, 0x800800000000, 0x800000000, 0x800000000000, x1, 424, x2)
+
+inst_54:
+// rs2_val == 281474976710656, rs1_val == 16777216
+// opcode: c.or; op1:x10; op2:x11; op1val:0x1000000; op2val:0x1000000000000
+TEST_CR_OP( c.or, x10, x11, 0x1000001000000, 0x1000000, 0x1000000000000, x1, 432, x2)
+
+inst_55:
+// rs2_val == 562949953421312, rs1_val == -262145
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x40001; op2val:0x2000000000000
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffbffff, -0x40001, 0x2000000000000, x1, 440, x2)
+
+inst_56:
+// rs2_val == 1125899906842624, rs1_val == -1048577
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x100001; op2val:0x4000000000000
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffefffff, -0x100001, 0x4000000000000, x1, 448, x2)
+
+inst_57:
+// rs2_val == 2251799813685248, rs1_val == 8
+// opcode: c.or; op1:x10; op2:x11; op1val:0x8; op2val:0x8000000000000
+TEST_CR_OP( c.or, x10, x11, 0x8000000000008, 0x8, 0x8000000000000, x1, 456, x2)
+
+inst_58:
+// rs2_val == 4503599627370496, rs1_val == -549755813889
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x8000000001; op2val:0x10000000000000
+TEST_CR_OP( c.or, x10, x11, 0xffffff7fffffffff, -0x8000000001, 0x10000000000000, x1, 464, x2)
+
+inst_59:
+// rs2_val == 9007199254740992, rs1_val == 72057594037927936
+// opcode: c.or; op1:x10; op2:x11; op1val:0x100000000000000; op2val:0x20000000000000
+TEST_CR_OP( c.or, x10, x11, 0x120000000000000, 0x100000000000000, 0x20000000000000, x1, 472, x2)
+
+inst_60:
+// rs2_val == 18014398509481984,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x40000000000000
+TEST_CR_OP( c.or, x10, x11, 0x40000000000003, 0x3, 0x40000000000000, x1, 480, x2)
+
+inst_61:
+// rs2_val == 36028797018963968,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x80000000000000
+TEST_CR_OP( c.or, x10, x11, 0x33b3333333333333, 0x3333333333333333, 0x80000000000000, x1, 488, x2)
+
+inst_62:
+// rs2_val == 72057594037927936,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x100000000000000
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x100000000000000, x1, 496, x2)
+
+inst_63:
+// rs2_val == 144115188075855872,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x200000000000000
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x200000000000000, x1, 504, x2)
+
+inst_64:
+// rs2_val == 288230376151711744, rs1_val == 18014398509481984
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40000000000000; op2val:0x400000000000000
+TEST_CR_OP( c.or, x10, x11, 0x440000000000000, 0x40000000000000, 0x400000000000000, x1, 512, x2)
+
+inst_65:
+// rs2_val == 576460752303423488, rs1_val == -140737488355329
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x800000000001; op2val:0x800000000000000
+TEST_CR_OP( c.or, x10, x11, 0xffff7fffffffffff, -0x800000000001, 0x800000000000000, x1, 520, x2)
+
+inst_66:
+// rs2_val == 1152921504606846976, rs1_val == 536870912
+// opcode: c.or; op1:x10; op2:x11; op1val:0x20000000; op2val:0x1000000000000000
+TEST_CR_OP( c.or, x10, x11, 0x1000000020000000, 0x20000000, 0x1000000000000000, x1, 528, x2)
+
+inst_67:
+// rs2_val == 2305843009213693952, rs1_val == 134217728
+// opcode: c.or; op1:x10; op2:x11; op1val:0x8000000; op2val:0x2000000000000000
+TEST_CR_OP( c.or, x10, x11, 0x2000000008000000, 0x8000000, 0x2000000000000000, x1, 536, x2)
+
+inst_68:
+// rs2_val == 4611686018427387904,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x8; op2val:0x4000000000000000
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffff8, -0x8, 0x4000000000000000, x1, 544, x2)
+
+inst_69:
+// rs2_val == -2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x2
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffffe, 0x5555555555555554, -0x2, x1, 552, x2)
+
+inst_70:
+// rs2_val == -3, rs1_val == -1025
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x401; op2val:-0x3
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x401, -0x3, x1, 560, x2)
+
+inst_71:
+// rs2_val == -5,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffffb, -0x5555555555555555, -0x5, x1, 568, x2)
+
+inst_72:
+// rs2_val == -9, rs1_val == -9007199254740993
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x20000000000001; op2val:-0x9
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x20000000000001, -0x9, x1, 576, x2)
+
+inst_73:
+// rs2_val == -17,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x8; op2val:-0x11
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffef, 0x8, -0x11, x1, 584, x2)
+
+inst_74:
+// rs2_val == -33, rs1_val == 281474976710656
+// opcode: c.or; op1:x10; op2:x11; op1val:0x1000000000000; op2val:-0x21
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffdf, 0x1000000000000, -0x21, x1, 592, x2)
+
+inst_75:
+// rs2_val == -65,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:-0x41
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffbf, 0x0, -0x41, x1, 600, x2)
+
+inst_76:
+// rs2_val == -257,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xa; op2val:-0x101
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0xa, -0x101, x1, 608, x2)
+
+inst_77:
+// rs2_val == -513, rs1_val == 4503599627370496
+// opcode: c.or; op1:x10; op2:x11; op1val:0x10000000000000; op2val:-0x201
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffdff, 0x10000000000000, -0x201, x1, 616, x2)
+
+inst_78:
+// rs2_val == -1025, rs1_val == 288230376151711744
+// opcode: c.or; op1:x10; op2:x11; op1val:0x400000000000000; op2val:-0x401
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffbff, 0x400000000000000, -0x401, x1, 624, x2)
+
+inst_79:
+// rs2_val == -2049,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x800000000001; op2val:-0x801
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x800000000001, -0x801, x1, 632, x2)
+
+inst_80:
+// rs2_val == -4097,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:-0x1001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffefff, 0x0, -0x1001, x1, 640, x2)
+
+inst_81:
+// rs2_val == -8193,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:-0x2001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffdfff, 0x2, -0x2001, x1, 648, x2)
+
+inst_82:
+// rs2_val == -16385, rs1_val == 32
+// opcode: c.or; op1:x10; op2:x11; op1val:0x20; op2val:-0x4001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffbfff, 0x20, -0x4001, x1, 656, x2)
+
+inst_83:
+// rs2_val == -32769,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x20000000000001; op2val:-0x8001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x20000000000001, -0x8001, x1, 664, x2)
+
+inst_84:
+// rs2_val == -65537,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x8000000; op2val:-0x10001
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffeffff, 0x8000000, -0x10001, x1, 672, x2)
+
+inst_85:
+// rs2_val == -262145, rs1_val == -3
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x3; op2val:-0x40001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x3, -0x40001, x1, 680, x2)
+
+inst_86:
+// rs2_val == -524289,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x80001
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffff7ffff, 0x6666666666666667, -0x80001, x1, 688, x2)
+
+inst_87:
+// rs2_val == -1048577,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x1000000000; op2val:-0x100001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffefffff, 0x1000000000, -0x100001, x1, 696, x2)
+
+inst_88:
+// rs2_val == -2097153, rs1_val == 4194304
+// opcode: c.or; op1:x10; op2:x11; op1val:0x400000; op2val:-0x200001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffdfffff, 0x400000, -0x200001, x1, 704, x2)
+
+inst_89:
+// rs2_val == -4194305,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x1000000000; op2val:-0x400001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffbfffff, 0x1000000000, -0x400001, x1, 712, x2)
+
+inst_90:
+// rs2_val == -8388609, rs1_val == 6148914691236517205
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x800001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffff7fffff, 0x5555555555555555, -0x800001, x1, 720, x2)
+
+inst_91:
+// rs2_val == -16777217,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40; op2val:-0x1000001
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffeffffff, 0x40, -0x1000001, x1, 728, x2)
+
+inst_92:
+// rs2_val == -33554433,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x1000000; op2val:-0x2000001
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffdffffff, 0x1000000, -0x2000001, x1, 736, x2)
+
+inst_93:
+// rs2_val == -67108865,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x4000001
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffbffffff, -0xb504f333, -0x4000001, x1, 744, x2)
+
+inst_94:
+// rs2_val == -134217729,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x7; op2val:-0x8000001
+TEST_CR_OP( c.or, x10, x11, 0xfffffffff7ffffff, 0x7, -0x8000001, x1, 752, x2)
+
+inst_95:
+// rs2_val == -268435457, rs1_val == 1048576
+// opcode: c.or; op1:x10; op2:x11; op1val:0x100000; op2val:-0x10000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffefffffff, 0x100000, -0x10000001, x1, 760, x2)
+
+inst_96:
+// rs2_val == -536870913,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40000000; op2val:-0x20000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffdfffffff, 0x40000000, -0x20000001, x1, 768, x2)
+
+inst_97:
+// rs2_val == -1073741825, rs1_val == -6148914691236517206
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x40000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffbfffffff, -0x5555555555555556, -0x40000001, x1, 776, x2)
+
+inst_98:
+// rs2_val == -2147483649, rs1_val == 65536
+// opcode: c.or; op1:x10; op2:x11; op1val:0x10000; op2val:-0x80000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7fffffff, 0x10000, -0x80000001, x1, 784, x2)
+
+inst_99:
+// rs2_val == -4294967297, rs1_val == -17592186044417
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x100000000001; op2val:-0x100000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x100000000001, -0x100000001, x1, 792, x2)
+
+inst_100:
+// rs2_val == -8589934593,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40000000; op2val:-0x200000001
+TEST_CR_OP( c.or, x10, x11, 0xfffffffdffffffff, 0x40000000, -0x200000001, x1, 800, x2)
+
+inst_101:
+// rs2_val == -17179869185,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x1000000000; op2val:-0x400000001
+TEST_CR_OP( c.or, x10, x11, 0xfffffffbffffffff, 0x1000000000, -0x400000001, x1, 808, x2)
+
+inst_102:
+// rs2_val == -34359738369,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x800000001
+TEST_CR_OP( c.or, x10, x11, 0xfffffff7ffffffff, 0x6666666666666667, -0x800000001, x1, 816, x2)
+
+inst_103:
+// rs2_val == -68719476737,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x8000000000000; op2val:-0x1000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffefffffffff, 0x8000000000000, -0x1000000001, x1, 824, x2)
+
+inst_104:
+// rs2_val == -137438953473,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x4000000000000000; op2val:-0x2000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffdfffffffff, -0x4000000000000000, -0x2000000001, x1, 832, x2)
+
+inst_105:
+// rs2_val == -274877906945,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x7; op2val:-0x4000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffbfffffffff, 0x7, -0x4000000001, x1, 840, x2)
+
+inst_106:
+// rs2_val == -549755813889,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x800000001; op2val:-0x8000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x800000001, -0x8000000001, x1, 848, x2)
+
+inst_107:
+// rs2_val == -1099511627777,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x10000000001
+TEST_CR_OP( c.or, x10, x11, 0xfffffeffffffffff, 0x6666666666666667, -0x10000000001, x1, 856, x2)
+
+inst_108:
+// rs2_val == -2199023255553,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x20000000001
+TEST_CR_OP( c.or, x10, x11, 0xfffffdffffffffff, 0x5555555555555554, -0x20000000001, x1, 864, x2)
+
+inst_109:
+// rs2_val == -4398046511105,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x20000000000; op2val:-0x40000000001
+TEST_CR_OP( c.or, x10, x11, 0xfffffbffffffffff, 0x20000000000, -0x40000000001, x1, 872, x2)
+
+inst_110:
+// rs2_val == -8796093022209, rs1_val == -16777217
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x1000001; op2val:-0x80000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x1000001, -0x80000000001, x1, 880, x2)
+
+inst_111:
+// rs2_val == -17592186044417,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x100000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0xb504f332, -0x100000000001, x1, 888, x2)
+
+inst_112:
+// rs2_val == -35184372088833, rs1_val == -1125899906842625
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x4000000000001; op2val:-0x200000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x4000000000001, -0x200000000001, x1, 896, x2)
+
+inst_113:
+// rs2_val == -70368744177665,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x200000000000001; op2val:-0x400000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x200000000000001, -0x400000000001, x1, 904, x2)
+
+inst_114:
+// rs2_val == -140737488355329, rs1_val == 2097152
+// opcode: c.or; op1:x10; op2:x11; op1val:0x200000; op2val:-0x800000000001
+TEST_CR_OP( c.or, x10, x11, 0xffff7fffffffffff, 0x200000, -0x800000000001, x1, 912, x2)
+
+inst_115:
+// rs2_val == -281474976710657, rs1_val == -5
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5; op2val:-0x1000000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x5, -0x1000000000001, x1, 920, x2)
+
+inst_116:
+// rs2_val == -562949953421313,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x401; op2val:-0x2000000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x401, -0x2000000000001, x1, 928, x2)
+
+inst_117:
+// rs2_val == -1125899906842625, rs1_val == -134217729
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x8000001; op2val:-0x4000000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x8000001, -0x4000000000001, x1, 936, x2)
+
+inst_118:
+// rs2_val == -2251799813685249,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x1000001; op2val:-0x8000000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x1000001, -0x8000000000001, x1, 944, x2)
+
+inst_119:
+// rs2_val == -4503599627370497, rs1_val == 562949953421312
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2000000000000; op2val:-0x10000000000001
+TEST_CR_OP( c.or, x10, x11, 0xffefffffffffffff, 0x2000000000000, -0x10000000000001, x1, 952, x2)
+
+inst_120:
+// rs2_val == -9007199254740993, rs1_val == 1125899906842624
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4000000000000; op2val:-0x20000000000001
+TEST_CR_OP( c.or, x10, x11, 0xffdfffffffffffff, 0x4000000000000, -0x20000000000001, x1, 960, x2)
+
+inst_121:
+// rs2_val == -18014398509481985,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x40001; op2val:-0x40000000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x40001, -0x40000000000001, x1, 968, x2)
+
+inst_122:
+// rs2_val == -36028797018963969, rs1_val == -4194305
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x400001; op2val:-0x80000000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x400001, -0x80000000000001, x1, 976, x2)
+
+inst_123:
+// rs2_val == -144115188075855873,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x200000000000001
+TEST_CR_OP( c.or, x10, x11, 0xfdffffffffffffff, 0xb504f334, -0x200000000000001, x1, 984, x2)
+
+inst_124:
+// rs2_val == -288230376151711745,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40000000; op2val:-0x400000000000001
+TEST_CR_OP( c.or, x10, x11, 0xfbffffffffffffff, 0x40000000, -0x400000000000001, x1, 992, x2)
+
+inst_125:
+// rs2_val == -576460752303423489, rs1_val == 32768
+// opcode: c.or; op1:x10; op2:x11; op1val:0x8000; op2val:-0x800000000000001
+TEST_CR_OP( c.or, x10, x11, 0xf7ffffffffffffff, 0x8000, -0x800000000000001, x1, 1000, x2)
+
+inst_126:
+// rs2_val == -1152921504606846977,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x9; op2val:-0x1000000000000001
+TEST_CR_OP( c.or, x10, x11, 0xefffffffffffffff, 0x9, -0x1000000000000001, x1, 1008, x2)
+
+inst_127:
+// rs2_val == -2305843009213693953,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x8000000; op2val:-0x2000000000000001
+TEST_CR_OP( c.or, x10, x11, 0xdfffffffffffffff, 0x8000000, -0x2000000000000001, x1, 1016, x2)
+
+inst_128:
+// rs2_val == -4611686018427387905,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x400000000000000; op2val:-0x4000000000000001
+TEST_CR_OP( c.or, x10, x11, 0xbfffffffffffffff, 0x400000000000000, -0x4000000000000001, x1, 1024, x2)
+
+inst_129:
+// rs2_val == 6148914691236517205, rs1_val==3 and rs2_val==6148914691236517205
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x3, 0x5555555555555555, x1, 1032, x2)
+
+inst_130:
+// rs2_val == -6148914691236517206, rs1_val==7378697629483820646 and rs2_val==-6148914691236517206
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeeeeeeeeeee, 0x6666666666666666, -0x5555555555555556, x1, 1040, x2)
+
+inst_131:
+// rs1_val == 128,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x80; op2val:-0x800000000000001
+TEST_CR_OP( c.or, x10, x11, 0xf7ffffffffffffff, 0x80, -0x800000000000001, x1, 1048, x2)
+
+inst_132:
+// rs1_val == 512,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x200; op2val:-0x20001
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffdffff, 0x200, -0x20001, x1, 1056, x2)
+
+inst_133:
+// rs1_val == 2048,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x800; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x800, 0x800, 0x0, x1, 1064, x2)
+
+inst_134:
+// rs1_val == 4096,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x1000; op2val:-0x10001
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffeffff, 0x1000, -0x10001, x1, 1072, x2)
+
+inst_135:
+// rs1_val == 8192,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2000; op2val:-0x80000000001
+TEST_CR_OP( c.or, x10, x11, 0xfffff7ffffffffff, 0x2000, -0x80000000001, x1, 1080, x2)
+
+inst_136:
+// rs1_val == 16384,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4000; op2val:-0x20000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffdfffffff, 0x4000, -0x20000001, x1, 1088, x2)
+
+inst_137:
+// rs1_val == 262144,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40000; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x40000, 0x40000, 0x0, x1, 1096, x2)
+
+inst_138:
+// rs1_val == 524288,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x80000; op2val:-0x1000001
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffeffffff, 0x80000, -0x1000001, x1, 1104, x2)
+
+inst_139:
+// rs1_val == 67108864,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4000000; op2val:-0x200001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffdfffff, 0x4000000, -0x200001, x1, 1112, x2)
+
+inst_140:
+// rs1_val == 268435456,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x10000000; op2val:-0x80000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7fffffff, 0x10000000, -0x80000001, x1, 1120, x2)
+
+inst_141:
+// rs1_val == 2147483648,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x80000000; op2val:0x20000000
+TEST_CR_OP( c.or, x10, x11, 0xa0000000, 0x80000000, 0x20000000, x1, 1128, x2)
+
+inst_142:
+// rs1_val == 4294967296,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x100000000; op2val:0x8
+TEST_CR_OP( c.or, x10, x11, 0x100000008, 0x100000000, 0x8, x1, 1136, x2)
+
+inst_143:
+// rs1_val == 8589934592,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x200000000; op2val:0x4000
+TEST_CR_OP( c.or, x10, x11, 0x200004000, 0x200000000, 0x4000, x1, 1144, x2)
+
+inst_144:
+// rs1_val == 17179869184,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x400000000; op2val:-0x80001
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffff7ffff, 0x400000000, -0x80001, x1, 1152, x2)
+
+inst_145:
+// rs1_val == 137438953472,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2000000000; op2val:-0x2000000000000001
+TEST_CR_OP( c.or, x10, x11, 0xdfffffffffffffff, 0x2000000000, -0x2000000000000001, x1, 1160, x2)
+
+inst_146:
+// rs1_val == 274877906944,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4000000000; op2val:-0x10000000001
+TEST_CR_OP( c.or, x10, x11, 0xfffffeffffffffff, 0x4000000000, -0x10000000001, x1, 1168, x2)
+
+inst_147:
+// rs1_val == 549755813888,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x8000000000; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x8000000003, 0x8000000000, 0x3, x1, 1176, x2)
+
+inst_148:
+// rs1_val == 1099511627776,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x10000000000; op2val:0x4000000000000
+TEST_CR_OP( c.or, x10, x11, 0x4010000000000, 0x10000000000, 0x4000000000000, x1, 1184, x2)
+
+inst_149:
+// rs1_val == 4398046511104,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x40000000000; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666666, 0x40000000000, 0x6666666666666666, x1, 1192, x2)
+
+inst_150:
+// rs1_val == 8796093022208,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x80000000000; op2val:0x8
+TEST_CR_OP( c.or, x10, x11, 0x80000000008, 0x80000000000, 0x8, x1, 1200, x2)
+
+inst_151:
+// rs1_val == 17592186044416,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x100000000000; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x100000000002, 0x100000000000, 0x2, x1, 1208, x2)
+
+inst_152:
+// rs1_val == 35184372088832,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x200000000000; op2val:0x1000000000000000
+TEST_CR_OP( c.or, x10, x11, 0x1000200000000000, 0x200000000000, 0x1000000000000000, x1, 1216, x2)
+
+inst_153:
+// rs1_val == 70368744177664,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x400000000000; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0x4000b504f334, 0x400000000000, 0xb504f334, x1, 1224, x2)
+
+inst_154:
+// rs1_val == 140737488355328,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x800000000000; op2val:0x8000000000000
+TEST_CR_OP( c.or, x10, x11, 0x8800000000000, 0x800000000000, 0x8000000000000, x1, 1232, x2)
+
+inst_155:
+// rs1_val == 9007199254740992,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x20000000000000; op2val:-0x100001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffefffff, 0x20000000000000, -0x100001, x1, 1240, x2)
+
+inst_156:
+// rs1_val == 36028797018963968,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x80000000000000; op2val:-0x20000000000001
+TEST_CR_OP( c.or, x10, x11, 0xffdfffffffffffff, 0x80000000000000, -0x20000000000001, x1, 1248, x2)
+
+inst_157:
+// rs1_val == 144115188075855872,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x200000000000000; op2val:-0x1
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, 0x200000000000000, -0x1, x1, 1256, x2)
+
+inst_158:
+// rs1_val == 576460752303423488,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x800000000000000; op2val:0x40000000
+TEST_CR_OP( c.or, x10, x11, 0x800000040000000, 0x800000000000000, 0x40000000, x1, 1264, x2)
+
+inst_159:
+// rs1_val == 2305843009213693952,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2000000000000000; op2val:0x100000
+TEST_CR_OP( c.or, x10, x11, 0x2000000000100000, 0x2000000000000000, 0x100000, x1, 1272, x2)
+
+inst_160:
+// rs1_val == 4611686018427387904,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4000000000000000; op2val:0x8000000000
+TEST_CR_OP( c.or, x10, x11, 0x4000008000000000, 0x4000000000000000, 0x8000000000, x1, 1280, x2)
+
+inst_161:
+// rs1_val == -2,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x2; op2val:0x200
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffffe, -0x2, 0x200, x1, 1288, x2)
+
+inst_162:
+// rs1_val == -9,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x9; op2val:-0x801
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x9, -0x801, x1, 1296, x2)
+
+inst_163:
+// rs1_val == -17,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x11; op2val:-0x80001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x11, -0x80001, x1, 1304, x2)
+
+inst_164:
+// rs1_val == -33,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x21; op2val:0x40000000
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffdf, -0x21, 0x40000000, x1, 1312, x2)
+
+inst_165:
+// rs1_val == -129,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x81; op2val:-0x8
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x81, -0x8, x1, 1320, x2)
+
+inst_166:
+// rs1_val == -257,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x101; op2val:-0x2000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x101, -0x2000000001, x1, 1328, x2)
+
+inst_167:
+// rs1_val == -513,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x201; op2val:-0x101
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x201, -0x101, x1, 1336, x2)
+
+inst_168:
+// rs1_val == -2049,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x801; op2val:0x2000
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffff7ff, -0x801, 0x2000, x1, 1344, x2)
+
+inst_169:
+// rs1_val == -4097,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x1001; op2val:0x10000
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffefff, -0x1001, 0x10000, x1, 1352, x2)
+
+inst_170:
+// rs1_val == -8193,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x2001; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffdfff, -0x2001, 0x0, x1, 1360, x2)
+
+inst_171:
+// rs1_val == -16385,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x4001; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x4001, 0xb504f333, x1, 1368, x2)
+
+inst_172:
+// rs1_val == -65537,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x10001; op2val:-0x2000000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x10001, -0x2000000000001, x1, 1376, x2)
+
+inst_173:
+// rs1_val == -524289,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x80001; op2val:0x1000000000000
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffff7ffff, -0x80001, 0x1000000000000, x1, 1384, x2)
+
+inst_174:
+// rs1_val == -2097153,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x200001; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffdfffff, -0x200001, 0xb504f334, x1, 1392, x2)
+
+inst_175:
+// rs1_val == -1073741825,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x40000001; op2val:0x200000
+TEST_CR_OP( c.or, x10, x11, 0xffffffffbfffffff, -0x40000001, 0x200000, x1, 1400, x2)
+
+inst_176:
+// rs1_val == -2147483649,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x80000001; op2val:0x20000
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7fffffff, -0x80000001, 0x20000, x1, 1408, x2)
+
+inst_177:
+// rs1_val == -4294967297,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x100000001; op2val:-0x4
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x100000001, -0x4, x1, 1416, x2)
+
+inst_178:
+// rs1_val == -8589934593,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x200000001; op2val:-0x100001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x200000001, -0x100001, x1, 1424, x2)
+
+inst_179:
+// rs1_val == -17179869185,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x400000001; op2val:0x800
+TEST_CR_OP( c.or, x10, x11, 0xfffffffbffffffff, -0x400000001, 0x800, x1, 1432, x2)
+
+inst_180:
+// rs1_val == -68719476737,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x1000000001; op2val:-0x800000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x1000000001, -0x800000000001, x1, 1440, x2)
+
+inst_181:
+// rs1_val == -137438953473,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x2000000001; op2val:-0x401
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x2000000001, -0x401, x1, 1448, x2)
+
+inst_182:
+// rs1_val == -1099511627777,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x10000000001; op2val:0x20000000
+TEST_CR_OP( c.or, x10, x11, 0xfffffeffffffffff, -0x10000000001, 0x20000000, x1, 1456, x2)
+
+inst_183:
+// rs1_val == -2199023255553,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x20000000001; op2val:-0x1000000000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x20000000001, -0x1000000000000001, x1, 1464, x2)
+
+inst_184:
+// rs1_val == -4398046511105,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x40000000001; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xfffffbffffffffff, -0x40000000001, 0x6, x1, 1472, x2)
+
+inst_185:
+// rs1_val == -8796093022209,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x80000000001; op2val:0x80000000000
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x80000000001, 0x80000000000, x1, 1480, x2)
+
+inst_186:
+// rs1_val == -35184372088833,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x200000000001; op2val:-0x20000000000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x200000000001, -0x20000000000001, x1, 1488, x2)
+
+inst_187:
+// rs1_val == -281474976710657,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x1000000000001; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x1000000000001, -0xb504f333, x1, 1496, x2)
+
+inst_188:
+// rs1_val == -2251799813685249,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x8000000000001; op2val:-0x4000001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x8000000000001, -0x4000001, x1, 1504, x2)
+
+inst_189:
+// rs1_val == -4503599627370497,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x10000000000001; op2val:-0xa
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x10000000000001, -0xa, x1, 1512, x2)
+
+inst_190:
+// rs1_val == -18014398509481985,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x40000000000001; op2val:-0x4
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x40000000000001, -0x4, x1, 1520, x2)
+
+inst_191:
+// rs1_val == -36028797018963969,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x80000000000001; op2val:0x1000000000000
+TEST_CR_OP( c.or, x10, x11, 0xff7fffffffffffff, -0x80000000000001, 0x1000000000000, x1, 1528, x2)
+
+inst_192:
+// rs1_val == -72057594037927937,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x100000000000001; op2val:0x200000
+TEST_CR_OP( c.or, x10, x11, 0xfeffffffffffffff, -0x100000000000001, 0x200000, x1, 1536, x2)
+
+inst_193:
+// rs1_val == -288230376151711745,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x400000000000001; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x400000000000001, 0x5555555555555556, x1, 1544, x2)
+
+inst_194:
+// rs1_val == -576460752303423489,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x800000000000001; op2val:-0x100001
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x800000000000001, -0x100001, x1, 1552, x2)
+
+inst_195:
+// rs1_val == -2305843009213693953,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x2000000000000001; op2val:0x800000000
+TEST_CR_OP( c.or, x10, x11, 0xdfffffffffffffff, -0x2000000000000001, 0x800000000, x1, 1560, x2)
+
+inst_196:
+// rs1_val == -4611686018427387905,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x4000000000000001; op2val:-0x201
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x4000000000000001, -0x201, x1, 1568, x2)
+
+inst_197:
+// rs1_val==3 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x3, 0x3, 0x3, x1, 1576, x2)
+
+inst_198:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaab, 0x3, -0x5555555555555556, x1, 1584, x2)
+
+inst_199:
+// rs1_val==3 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x3, 0x5, x1, 1592, x2)
+
+inst_200:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333333, 0x3, 0x3333333333333333, x1, 1600, x2)
+
+inst_201:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x3, 0x6666666666666666, x1, 1608, x2)
+
+inst_202:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccf, 0x3, -0xb504f333, x1, 1616, x2)
+
+inst_203:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xb504f333, 0x3, 0xb504f333, x1, 1624, x2)
+
+inst_204:
+// rs1_val==3 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x3, 0x3, 0x2, x1, 1632, x2)
+
+inst_205:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x3, 0x5555555555555554, x1, 1640, x2)
+
+inst_206:
+// rs1_val==3 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x3, 0x3, 0x0, x1, 1648, x2)
+
+inst_207:
+// rs1_val==3 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x3, 0x4, x1, 1656, x2)
+
+inst_208:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333333, 0x3, 0x3333333333333332, x1, 1664, x2)
+
+inst_209:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x3, 0x6666666666666665, x1, 1672, x2)
+
+inst_210:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xb504f333, 0x3, 0xb504f332, x1, 1680, x2)
+
+inst_211:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x3, 0x5555555555555556, x1, 1688, x2)
+
+inst_212:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaab, 0x3, -0x5555555555555555, x1, 1696, x2)
+
+inst_213:
+// rs1_val==3 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x3, 0x6, x1, 1704, x2)
+
+inst_214:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333337, 0x3, 0x3333333333333334, x1, 1712, x2)
+
+inst_215:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x3, 0x6666666666666667, x1, 1720, x2)
+
+inst_216:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccf, 0x3, -0xb504f332, x1, 1728, x2)
+
+inst_217:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xb504f337, 0x3, 0xb504f334, x1, 1736, x2)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x5555555555555555, 0x3, x1, 1744, x2)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x5555555555555555, x1, 1752, x2)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, 0x5555555555555555, -0x5555555555555556, x1, 1760, x2)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x5, x1, 1768, x2)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x5555555555555555, 0x3333333333333333, x1, 1776, x2)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x5555555555555555, 0x6666666666666666, x1, 1784, x2)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff5fff5ddd, 0x5555555555555555, -0xb504f333, x1, 1792, x2)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f777, 0x5555555555555555, 0xb504f333, x1, 1800, x2)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x5555555555555555, 0x2, x1, 1808, x2)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x5555555555555554, x1, 1816, x2)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x0, x1, 1824, x2)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x4, x1, 1832, x2)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x5555555555555555, 0x3333333333333332, x1, 1840, x2)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777775, 0x5555555555555555, 0x6666666666666665, x1, 1848, x2)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f777, 0x5555555555555555, 0xb504f332, x1, 1856, x2)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x5555555555555555, 0x5555555555555556, x1, 1864, x2)
+
+inst_234:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, 0x5555555555555555, -0x5555555555555555, x1, 1872, x2)
+
+inst_235:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x5555555555555555, 0x6, x1, 1880, x2)
+
+inst_236:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777775, 0x5555555555555555, 0x3333333333333334, x1, 1888, x2)
+
+inst_237:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x5555555555555555, 0x6666666666666667, x1, 1896, x2)
+
+inst_238:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff5fff5ddf, 0x5555555555555555, -0xb504f332, x1, 1904, x2)
+
+inst_239:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f775, 0x5555555555555555, 0xb504f334, x1, 1912, x2)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555556, 0x3, x1, 1920, x2)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x5555555555555556, 0x5555555555555555, x1, 1928, x2)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, -0x5555555555555556, x1, 1936, x2)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555556, 0x5, x1, 1944, x2)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbbbbbbbbbb, -0x5555555555555556, 0x3333333333333333, x1, 1952, x2)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeeeeeeeeeee, -0x5555555555555556, 0x6666666666666666, x1, 1960, x2)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffffeafbaeef, -0x5555555555555556, -0xb504f333, x1, 1968, x2)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaabfaefbbb, -0x5555555555555556, 0xb504f333, x1, 1976, x2)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x2, x1, 1984, x2)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffffe, -0x5555555555555556, 0x5555555555555554, x1, 1992, x2)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x0, x1, 2000, x2)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x4, x1, 2008, x2)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbbbbbbbbba, -0x5555555555555556, 0x3333333333333332, x1, 2016, x2)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeeeeeeeeeef, -0x5555555555555556, 0x6666666666666665, x1, 2024, x2)
+
+inst_254:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaabfaefbba, -0x5555555555555556, 0xb504f332, x1, 2032, x2)
+
+inst_255:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffffe, -0x5555555555555556, 0x5555555555555556, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_256:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555556, -0x5555555555555555, x1, 0, x2)
+
+inst_257:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x6, x1, 8, x2)
+
+inst_258:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbbbbbbbbbe, -0x5555555555555556, 0x3333333333333334, x1, 16, x2)
+
+inst_259:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeeeeeeeeeef, -0x5555555555555556, 0x6666666666666667, x1, 24, x2)
+
+inst_260:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffffeafbaeee, -0x5555555555555556, -0xb504f332, x1, 32, x2)
+
+inst_261:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaabfaefbbe, -0x5555555555555556, 0xb504f334, x1, 40, x2)
+
+inst_262:
+// rs1_val==5 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x5, 0x3, x1, 48, x2)
+
+inst_263:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555555, 0x5, 0x5555555555555555, x1, 56, x2)
+
+inst_264:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x5, -0x5555555555555556, x1, 64, x2)
+
+inst_265:
+// rs1_val==5 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x5, 0x5, 0x5, x1, 72, x2)
+
+inst_266:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333337, 0x5, 0x3333333333333333, x1, 80, x2)
+
+inst_267:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x5, 0x6666666666666666, x1, 88, x2)
+
+inst_268:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccd, 0x5, -0xb504f333, x1, 96, x2)
+
+inst_269:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xb504f337, 0x5, 0xb504f333, x1, 104, x2)
+
+inst_270:
+// rs1_val==5 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x5, 0x2, x1, 112, x2)
+
+inst_271:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555555, 0x5, 0x5555555555555554, x1, 120, x2)
+
+inst_272:
+// rs1_val==5 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x5, 0x5, 0x0, x1, 128, x2)
+
+inst_273:
+// rs1_val==5 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x5, 0x5, 0x4, x1, 136, x2)
+
+inst_274:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333337, 0x5, 0x3333333333333332, x1, 144, x2)
+
+inst_275:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666665, 0x5, 0x6666666666666665, x1, 152, x2)
+
+inst_276:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xb504f337, 0x5, 0xb504f332, x1, 160, x2)
+
+inst_277:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x5, 0x5555555555555556, x1, 168, x2)
+
+inst_278:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x5, -0x5555555555555555, x1, 176, x2)
+
+inst_279:
+// rs1_val==5 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x5, 0x6, x1, 184, x2)
+
+inst_280:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333335, 0x5, 0x3333333333333334, x1, 192, x2)
+
+inst_281:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x5, 0x6666666666666667, x1, 200, x2)
+
+inst_282:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccf, 0x5, -0xb504f332, x1, 208, x2)
+
+inst_283:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xb504f335, 0x5, 0xb504f334, x1, 216, x2)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x3, x1, 224, x2)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x3333333333333333, 0x5555555555555555, x1, 232, x2)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x3333333333333333, -0x5555555555555556, x1, 240, x2)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333337, 0x3333333333333333, 0x5, x1, 248, x2)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x3333333333333333, x1, 256, x2)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x3333333333333333, 0x6666666666666666, x1, 264, x2)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7bfb3fff, 0x3333333333333333, -0xb504f333, x1, 272, x2)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f333, 0x3333333333333333, 0xb504f333, x1, 280, x2)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x2, x1, 288, x2)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x3333333333333333, 0x5555555555555554, x1, 296, x2)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x0, x1, 304, x2)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333337, 0x3333333333333333, 0x4, x1, 312, x2)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x3333333333333332, x1, 320, x2)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x3333333333333333, 0x6666666666666665, x1, 328, x2)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f333, 0x3333333333333333, 0xb504f332, x1, 336, x2)
+
+inst_299:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x3333333333333333, 0x5555555555555556, x1, 344, x2)
+
+inst_300:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x3333333333333333, -0x5555555555555555, x1, 352, x2)
+
+inst_301:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333337, 0x3333333333333333, 0x6, x1, 360, x2)
+
+inst_302:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333337, 0x3333333333333333, 0x3333333333333334, x1, 368, x2)
+
+inst_303:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x3333333333333333, 0x6666666666666667, x1, 376, x2)
+
+inst_304:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7bfb3fff, 0x3333333333333333, -0xb504f332, x1, 384, x2)
+
+inst_305:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f337, 0x3333333333333333, 0xb504f334, x1, 392, x2)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x3, x1, 400, x2)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x6666666666666666, 0x5555555555555555, x1, 408, x2)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x5, x1, 416, x2)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x6666666666666666, 0x3333333333333333, x1, 424, x2)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x6666666666666666, x1, 432, x2)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff6eff6eef, 0x6666666666666666, -0xb504f333, x1, 440, x2)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f777, 0x6666666666666666, 0xb504f333, x1, 448, x2)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x2, x1, 456, x2)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x6666666666666666, 0x5555555555555554, x1, 464, x2)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x0, x1, 472, x2)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x4, x1, 480, x2)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x6666666666666666, 0x3333333333333332, x1, 488, x2)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x6666666666666665, x1, 496, x2)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f776, 0x6666666666666666, 0xb504f332, x1, 504, x2)
+
+inst_320:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x6666666666666666, 0x5555555555555556, x1, 512, x2)
+
+inst_321:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeeeeeeeeeef, 0x6666666666666666, -0x5555555555555555, x1, 520, x2)
+
+inst_322:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x6, x1, 528, x2)
+
+inst_323:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x6666666666666666, 0x3333333333333334, x1, 536, x2)
+
+inst_324:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x6666666666666667, x1, 544, x2)
+
+inst_325:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff6eff6eee, 0x6666666666666666, -0xb504f332, x1, 552, x2)
+
+inst_326:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f776, 0x6666666666666666, 0xb504f334, x1, 560, x2)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccf, -0xb504f333, 0x3, x1, 568, x2)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffff5fff5ddd, -0xb504f333, 0x5555555555555555, x1, 576, x2)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xffffffffeafbaeef, -0xb504f333, -0x5555555555555556, x1, 584, x2)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x5, x1, 592, x2)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7bfb3fff, -0xb504f333, 0x3333333333333333, x1, 600, x2)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0xffffffff6eff6eef, -0xb504f333, 0x6666666666666666, x1, 608, x2)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, -0xb504f333, x1, 616, x2)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0xb504f333, 0xb504f333, x1, 624, x2)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccf, -0xb504f333, 0x2, x1, 632, x2)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0xffffffff5fff5ddd, -0xb504f333, 0x5555555555555554, x1, 640, x2)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x0, x1, 648, x2)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x4, x1, 656, x2)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7bfb3fff, -0xb504f333, 0x3333333333333332, x1, 664, x2)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0xffffffff6eff6eed, -0xb504f333, 0x6666666666666665, x1, 672, x2)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0xb504f333, 0xb504f332, x1, 680, x2)
+
+inst_342:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xffffffff5fff5ddf, -0xb504f333, 0x5555555555555556, x1, 688, x2)
+
+inst_343:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffffeafbaeef, -0xb504f333, -0x5555555555555555, x1, 696, x2)
+
+inst_344:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccf, -0xb504f333, 0x6, x1, 704, x2)
+
+inst_345:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7bfb3ffd, -0xb504f333, 0x3333333333333334, x1, 712, x2)
+
+inst_346:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0xffffffff6eff6eef, -0xb504f333, 0x6666666666666667, x1, 720, x2)
+
+inst_347:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccf, -0xb504f333, -0xb504f332, x1, 728, x2)
+
+inst_348:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffffd, -0xb504f333, 0xb504f334, x1, 736, x2)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xb504f333, 0xb504f333, 0x3, x1, 744, x2)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f777, 0xb504f333, 0x5555555555555555, x1, 752, x2)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaabfaefbbb, 0xb504f333, -0x5555555555555556, x1, 760, x2)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xb504f337, 0xb504f333, 0x5, x1, 768, x2)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f333, 0xb504f333, 0x3333333333333333, x1, 776, x2)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f777, 0xb504f333, 0x6666666666666666, x1, 784, x2)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, 0xb504f333, -0xb504f333, x1, 792, x2)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xb504f333, 0xb504f333, 0xb504f333, x1, 800, x2)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xb504f333, 0xb504f333, 0x2, x1, 808, x2)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f777, 0xb504f333, 0x5555555555555554, x1, 816, x2)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xb504f333, 0xb504f333, 0x0, x1, 824, x2)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xb504f337, 0xb504f333, 0x4, x1, 832, x2)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f333, 0xb504f333, 0x3333333333333332, x1, 840, x2)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f777, 0xb504f333, 0x6666666666666665, x1, 848, x2)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xb504f333, 0xb504f333, 0xb504f332, x1, 856, x2)
+
+inst_364:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f777, 0xb504f333, 0x5555555555555556, x1, 864, x2)
+
+inst_365:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaabfaefbbb, 0xb504f333, -0x5555555555555555, x1, 872, x2)
+
+inst_366:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xb504f337, 0xb504f333, 0x6, x1, 880, x2)
+
+inst_367:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f337, 0xb504f333, 0x3333333333333334, x1, 888, x2)
+
+inst_368:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f777, 0xb504f333, 0x6666666666666667, x1, 896, x2)
+
+inst_369:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, 0xb504f333, -0xb504f332, x1, 904, x2)
+
+inst_370:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xb504f337, 0xb504f333, 0xb504f334, x1, 912, x2)
+
+inst_371:
+// rs1_val==2 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x3, 0x2, 0x3, x1, 920, x2)
+
+inst_372:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x2, 0x5555555555555555, x1, 928, x2)
+
+inst_373:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x2, -0x5555555555555556, x1, 936, x2)
+
+inst_374:
+// rs1_val==2 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x2, 0x5, x1, 944, x2)
+
+inst_375:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333333, 0x2, 0x3333333333333333, x1, 952, x2)
+
+inst_376:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666666, 0x2, 0x6666666666666666, x1, 960, x2)
+
+inst_377:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccf, 0x2, -0xb504f333, x1, 968, x2)
+
+inst_378:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xb504f333, 0x2, 0xb504f333, x1, 976, x2)
+
+inst_379:
+// rs1_val==2 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x2, 0x2, 0x2, x1, 984, x2)
+
+inst_380:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x2, 0x5555555555555554, x1, 992, x2)
+
+inst_381:
+// rs1_val==2 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x2, 0x2, 0x0, x1, 1000, x2)
+
+inst_382:
+// rs1_val==2 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x2, 0x4, x1, 1008, x2)
+
+inst_383:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333332, 0x2, 0x3333333333333332, x1, 1016, x2)
+
+inst_384:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x2, 0x6666666666666665, x1, 1024, x2)
+
+inst_385:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xb504f332, 0x2, 0xb504f332, x1, 1032, x2)
+
+inst_386:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x2, 0x5555555555555556, x1, 1040, x2)
+
+inst_387:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaab, 0x2, -0x5555555555555555, x1, 1048, x2)
+
+inst_388:
+// rs1_val==2 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x2, 0x6, x1, 1056, x2)
+
+inst_389:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333336, 0x2, 0x3333333333333334, x1, 1064, x2)
+
+inst_390:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x2, 0x6666666666666667, x1, 1072, x2)
+
+inst_391:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0cce, 0x2, -0xb504f332, x1, 1080, x2)
+
+inst_392:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xb504f336, 0x2, 0xb504f334, x1, 1088, x2)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x5555555555555554, 0x3, x1, 1096, x2)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555555, 0x5555555555555554, 0x5555555555555555, x1, 1104, x2)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffffe, 0x5555555555555554, -0x5555555555555556, x1, 1112, x2)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555555, 0x5555555555555554, 0x5, x1, 1120, x2)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x5555555555555554, 0x3333333333333333, x1, 1128, x2)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x5555555555555554, 0x6666666666666666, x1, 1136, x2)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff5fff5ddd, 0x5555555555555554, -0xb504f333, x1, 1144, x2)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f777, 0x5555555555555554, 0xb504f333, x1, 1152, x2)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x2, x1, 1160, x2)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x5555555555555554, x1, 1168, x2)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x0, x1, 1176, x2)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x4, x1, 1184, x2)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x5555555555555554, 0x3333333333333332, x1, 1192, x2)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777775, 0x5555555555555554, 0x6666666666666665, x1, 1200, x2)
+
+inst_407:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f776, 0x5555555555555554, 0xb504f332, x1, 1208, x2)
+
+inst_408:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x5555555555555556, x1, 1216, x2)
+
+inst_409:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, 0x5555555555555554, -0x5555555555555555, x1, 1224, x2)
+
+inst_410:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x6, x1, 1232, x2)
+
+inst_411:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777774, 0x5555555555555554, 0x3333333333333334, x1, 1240, x2)
+
+inst_412:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x5555555555555554, 0x6666666666666667, x1, 1248, x2)
+
+inst_413:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff5fff5dde, 0x5555555555555554, -0xb504f332, x1, 1256, x2)
+
+inst_414:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f774, 0x5555555555555554, 0xb504f334, x1, 1264, x2)
+
+inst_415:
+// rs1_val==0 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x3, 0x0, 0x3, x1, 1272, x2)
+
+inst_416:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555555, 0x0, 0x5555555555555555, x1, 1280, x2)
+
+inst_417:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x0, -0x5555555555555556, x1, 1288, x2)
+
+inst_418:
+// rs1_val==0 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x5, 0x0, 0x5, x1, 1296, x2)
+
+inst_419:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333333, 0x0, 0x3333333333333333, x1, 1304, x2)
+
+inst_420:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666666, 0x0, 0x6666666666666666, x1, 1312, x2)
+
+inst_421:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccd, 0x0, -0xb504f333, x1, 1320, x2)
+
+inst_422:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xb504f333, 0x0, 0xb504f333, x1, 1328, x2)
+
+inst_423:
+// rs1_val==0 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x2, 0x0, 0x2, x1, 1336, x2)
+
+inst_424:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaae, 0x4, -0x5555555555555556, x1, 1344, x2)
+
+inst_425:
+// rs1_val==4 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x5, 0x4, 0x5, x1, 1352, x2)
+
+inst_426:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333337, 0x4, 0x3333333333333333, x1, 1360, x2)
+
+inst_427:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666666, 0x4, 0x6666666666666666, x1, 1368, x2)
+
+inst_428:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccd, 0x4, -0xb504f333, x1, 1376, x2)
+
+inst_429:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xb504f337, 0x4, 0xb504f333, x1, 1384, x2)
+
+inst_430:
+// rs1_val==4 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x4, 0x2, x1, 1392, x2)
+
+inst_431:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555554, 0x4, 0x5555555555555554, x1, 1400, x2)
+
+inst_432:
+// rs1_val==4 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x4, 0x4, 0x0, x1, 1408, x2)
+
+inst_433:
+// rs1_val==4 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x4, 0x4, 0x4, x1, 1416, x2)
+
+inst_434:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333336, 0x4, 0x3333333333333332, x1, 1424, x2)
+
+inst_435:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666665, 0x4, 0x6666666666666665, x1, 1432, x2)
+
+inst_436:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xb504f336, 0x4, 0xb504f332, x1, 1440, x2)
+
+inst_437:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x4, 0x5555555555555556, x1, 1448, x2)
+
+inst_438:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x4, -0x5555555555555555, x1, 1456, x2)
+
+inst_439:
+// rs1_val==4 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x4, 0x6, x1, 1464, x2)
+
+inst_440:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333334, 0x4, 0x3333333333333334, x1, 1472, x2)
+
+inst_441:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x4, 0x6666666666666667, x1, 1480, x2)
+
+inst_442:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0cce, 0x4, -0xb504f332, x1, 1488, x2)
+
+inst_443:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xb504f334, 0x4, 0xb504f334, x1, 1496, x2)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333333, 0x3333333333333332, 0x3, x1, 1504, x2)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x3333333333333332, 0x5555555555555555, x1, 1512, x2)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbbbbbbbbba, 0x3333333333333332, -0x5555555555555556, x1, 1520, x2)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333337, 0x3333333333333332, 0x5, x1, 1528, x2)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333333, 0x3333333333333332, 0x3333333333333333, x1, 1536, x2)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x3333333333333332, 0x6666666666666666, x1, 1544, x2)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7bfb3fff, 0x3333333333333332, -0xb504f333, x1, 1552, x2)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f333, 0x3333333333333332, 0xb504f333, x1, 1560, x2)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x2, x1, 1568, x2)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x3333333333333332, 0x5555555555555554, x1, 1576, x2)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x0, x1, 1584, x2)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333336, 0x3333333333333332, 0x4, x1, 1592, x2)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x3333333333333332, x1, 1600, x2)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x3333333333333332, 0x6666666666666665, x1, 1608, x2)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f332, 0x3333333333333332, 0xb504f332, x1, 1616, x2)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x3333333333333332, 0x5555555555555556, x1, 1624, x2)
+
+inst_460:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x3333333333333332, -0x5555555555555555, x1, 1632, x2)
+
+inst_461:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333336, 0x3333333333333332, 0x6, x1, 1640, x2)
+
+inst_462:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333336, 0x3333333333333332, 0x3333333333333334, x1, 1648, x2)
+
+inst_463:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x3333333333333332, 0x6666666666666667, x1, 1656, x2)
+
+inst_464:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7bfb3ffe, 0x3333333333333332, -0xb504f332, x1, 1664, x2)
+
+inst_465:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f336, 0x3333333333333332, 0xb504f334, x1, 1672, x2)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x3, x1, 1680, x2)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777775, 0x6666666666666665, 0x5555555555555555, x1, 1688, x2)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeeeeeeeeeef, 0x6666666666666665, -0x5555555555555556, x1, 1696, x2)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x5, x1, 1704, x2)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x6666666666666665, 0x3333333333333333, x1, 1712, x2)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x6666666666666666, x1, 1720, x2)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff6eff6eed, 0x6666666666666665, -0xb504f333, x1, 1728, x2)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f777, 0x6666666666666665, 0xb504f333, x1, 1736, x2)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x2, x1, 1744, x2)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777775, 0x6666666666666665, 0x5555555555555554, x1, 1752, x2)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x0, x1, 1760, x2)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x4, x1, 1768, x2)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x6666666666666665, 0x3333333333333332, x1, 1776, x2)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x6666666666666665, x1, 1784, x2)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f777, 0x6666666666666665, 0xb504f332, x1, 1792, x2)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x6666666666666665, 0x5555555555555556, x1, 1800, x2)
+
+inst_482:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeeeeeeeeeef, 0x6666666666666665, -0x5555555555555555, x1, 1808, x2)
+
+inst_483:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x6, x1, 1816, x2)
+
+inst_484:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777775, 0x6666666666666665, 0x3333333333333334, x1, 1824, x2)
+
+inst_485:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x6666666666666667, x1, 1832, x2)
+
+inst_486:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff6eff6eef, 0x6666666666666665, -0xb504f332, x1, 1840, x2)
+
+inst_487:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f775, 0x6666666666666665, 0xb504f334, x1, 1848, x2)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xb504f333, 0xb504f332, 0x3, x1, 1856, x2)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f777, 0xb504f332, 0x5555555555555555, x1, 1864, x2)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaabfaefbba, 0xb504f332, -0x5555555555555556, x1, 1872, x2)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xb504f337, 0xb504f332, 0x5, x1, 1880, x2)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f333, 0xb504f332, 0x3333333333333333, x1, 1888, x2)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f776, 0xb504f332, 0x6666666666666666, x1, 1896, x2)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, 0xb504f332, -0xb504f333, x1, 1904, x2)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xb504f333, 0xb504f332, 0xb504f333, x1, 1912, x2)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xb504f332, 0xb504f332, 0x2, x1, 1920, x2)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f776, 0xb504f332, 0x5555555555555554, x1, 1928, x2)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xb504f332, 0xb504f332, 0x0, x1, 1936, x2)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xb504f336, 0xb504f332, 0x4, x1, 1944, x2)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f332, 0xb504f332, 0x3333333333333332, x1, 1952, x2)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f777, 0xb504f332, 0x6666666666666665, x1, 1960, x2)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xb504f332, 0xb504f332, 0xb504f332, x1, 1968, x2)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f776, 0xb504f332, 0x5555555555555556, x1, 1976, x2)
+
+inst_504:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaabfaefbbb, 0xb504f332, -0x5555555555555555, x1, 1984, x2)
+
+inst_505:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xb504f336, 0xb504f332, 0x6, x1, 1992, x2)
+
+inst_506:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f336, 0xb504f332, 0x3333333333333334, x1, 2000, x2)
+
+inst_507:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f777, 0xb504f332, 0x6666666666666667, x1, 2008, x2)
+
+inst_508:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffffe, 0xb504f332, -0xb504f332, x1, 2016, x2)
+
+inst_509:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xb504f336, 0xb504f332, 0xb504f334, x1, 2024, x2)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x5555555555555556, 0x3, x1, 2032, x2)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x5555555555555556, 0x5555555555555555, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_3)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffffe, 0x5555555555555556, -0x5555555555555556, x1, 0, x2)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x5555555555555556, 0x5, x1, 8, x2)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x5555555555555556, 0x3333333333333333, x1, 16, x2)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x5555555555555556, 0x6666666666666666, x1, 24, x2)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff5fff5ddf, 0x5555555555555556, -0xb504f333, x1, 32, x2)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f777, 0x5555555555555556, 0xb504f333, x1, 40, x2)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x2, x1, 48, x2)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x5555555555555554, x1, 56, x2)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x0, x1, 64, x2)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x4, x1, 72, x2)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x5555555555555556, 0x3333333333333332, x1, 80, x2)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x5555555555555556, 0x6666666666666665, x1, 88, x2)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f776, 0x5555555555555556, 0xb504f332, x1, 96, x2)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x5555555555555556, x1, 104, x2)
+
+inst_526:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, 0x5555555555555556, -0x5555555555555555, x1, 112, x2)
+
+inst_527:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x6, x1, 120, x2)
+
+inst_528:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x5555555555555556, 0x3333333333333334, x1, 128, x2)
+
+inst_529:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x5555555555555556, 0x6666666666666667, x1, 136, x2)
+
+inst_530:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff5fff5dde, 0x5555555555555556, -0xb504f332, x1, 144, x2)
+
+inst_531:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f776, 0x5555555555555556, 0xb504f334, x1, 152, x2)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x3, x1, 160, x2)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x5555555555555555, 0x5555555555555555, x1, 168, x2)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, -0x5555555555555556, x1, 176, x2)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x5, x1, 184, x2)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbbbbbbbbbb, -0x5555555555555555, 0x3333333333333333, x1, 192, x2)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeeeeeeeeeef, -0x5555555555555555, 0x6666666666666666, x1, 200, x2)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffffeafbaeef, -0x5555555555555555, -0xb504f333, x1, 208, x2)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaabfaefbbb, -0x5555555555555555, 0xb504f333, x1, 216, x2)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x2, x1, 224, x2)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x5555555555555555, 0x5555555555555554, x1, 232, x2)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x0, x1, 240, x2)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x4, x1, 248, x2)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbbbbbbbbbb, -0x5555555555555555, 0x3333333333333332, x1, 256, x2)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeeeeeeeeeef, -0x5555555555555555, 0x6666666666666665, x1, 264, x2)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaabfaefbbb, -0x5555555555555555, 0xb504f332, x1, 272, x2)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0x5555555555555555, 0x5555555555555556, x1, 280, x2)
+
+inst_548:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, -0x5555555555555555, x1, 288, x2)
+
+inst_549:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x6, x1, 296, x2)
+
+inst_550:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbbbbbbbbbf, -0x5555555555555555, 0x3333333333333334, x1, 304, x2)
+
+inst_551:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeeeeeeeeeef, -0x5555555555555555, 0x6666666666666667, x1, 312, x2)
+
+inst_552:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffffeafbaeef, -0x5555555555555555, -0xb504f332, x1, 320, x2)
+
+inst_553:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaabfaefbbf, -0x5555555555555555, 0xb504f334, x1, 328, x2)
+
+inst_554:
+// rs1_val==6 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x6, 0x3, x1, 336, x2)
+
+inst_555:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555557, 0x6, 0x5555555555555555, x1, 344, x2)
+
+inst_556:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaae, 0x6, -0x5555555555555556, x1, 352, x2)
+
+inst_557:
+// rs1_val==6 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x6, 0x5, x1, 360, x2)
+
+inst_558:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333337, 0x6, 0x3333333333333333, x1, 368, x2)
+
+inst_559:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666666, 0x6, 0x6666666666666666, x1, 376, x2)
+
+inst_560:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccf, 0x6, -0xb504f333, x1, 384, x2)
+
+inst_561:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xb504f337, 0x6, 0xb504f333, x1, 392, x2)
+
+inst_562:
+// rs1_val==6 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x6, 0x2, x1, 400, x2)
+
+inst_563:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x6, 0x5555555555555554, x1, 408, x2)
+
+inst_564:
+// rs1_val==6 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x6, 0x0, x1, 416, x2)
+
+inst_565:
+// rs1_val==6 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x6, 0x4, x1, 424, x2)
+
+inst_566:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333336, 0x6, 0x3333333333333332, x1, 432, x2)
+
+inst_567:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6, 0x6666666666666665, x1, 440, x2)
+
+inst_568:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xb504f336, 0x6, 0xb504f332, x1, 448, x2)
+
+inst_569:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x6, 0x5555555555555556, x1, 456, x2)
+
+inst_570:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x6, -0x5555555555555555, x1, 464, x2)
+
+inst_571:
+// rs1_val==6 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x6, 0x6, x1, 472, x2)
+
+inst_572:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333336, 0x6, 0x3333333333333334, x1, 480, x2)
+
+inst_573:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6, 0x6666666666666667, x1, 488, x2)
+
+inst_574:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0cce, 0x6, -0xb504f332, x1, 496, x2)
+
+inst_575:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xb504f336, 0x6, 0xb504f334, x1, 504, x2)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333337, 0x3333333333333334, 0x3, x1, 512, x2)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777775, 0x3333333333333334, 0x5555555555555555, x1, 520, x2)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbbbbbbbbbe, 0x3333333333333334, -0x5555555555555556, x1, 528, x2)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333335, 0x3333333333333334, 0x5, x1, 536, x2)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333337, 0x3333333333333334, 0x3333333333333333, x1, 544, x2)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x3333333333333334, 0x6666666666666666, x1, 552, x2)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7bfb3ffd, 0x3333333333333334, -0xb504f333, x1, 560, x2)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f337, 0x3333333333333334, 0xb504f333, x1, 568, x2)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333336, 0x3333333333333334, 0x2, x1, 576, x2)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777774, 0x3333333333333334, 0x5555555555555554, x1, 584, x2)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x0, x1, 592, x2)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x4, x1, 600, x2)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333336, 0x3333333333333334, 0x3333333333333332, x1, 608, x2)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777775, 0x3333333333333334, 0x6666666666666665, x1, 616, x2)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f336, 0x3333333333333334, 0xb504f332, x1, 624, x2)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777776, 0x3333333333333334, 0x5555555555555556, x1, 632, x2)
+
+inst_592:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xbbbbbbbbbbbbbbbf, 0x3333333333333334, -0x5555555555555555, x1, 640, x2)
+
+inst_593:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333336, 0x3333333333333334, 0x6, x1, 648, x2)
+
+inst_594:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x3333333333333334, x1, 656, x2)
+
+inst_595:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x3333333333333334, 0x6666666666666667, x1, 664, x2)
+
+inst_596:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7bfb3ffe, 0x3333333333333334, -0xb504f332, x1, 672, x2)
+
+inst_597:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f334, 0x3333333333333334, 0xb504f334, x1, 680, x2)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x3, x1, 688, x2)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x6666666666666667, 0x5555555555555555, x1, 696, x2)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeeeeeeeeeef, 0x6666666666666667, -0x5555555555555556, x1, 704, x2)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x5, x1, 712, x2)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x6666666666666667, 0x3333333333333333, x1, 720, x2)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x6666666666666666, x1, 728, x2)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff6eff6eef, 0x6666666666666667, -0xb504f333, x1, 736, x2)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f777, 0x6666666666666667, 0xb504f333, x1, 744, x2)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x2, x1, 752, x2)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x6666666666666667, 0x5555555555555554, x1, 760, x2)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x0, x1, 768, x2)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x4, x1, 776, x2)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x6666666666666667, 0x3333333333333332, x1, 784, x2)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x6666666666666665, x1, 792, x2)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f777, 0x6666666666666667, 0xb504f332, x1, 800, x2)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x6666666666666667, 0x5555555555555556, x1, 808, x2)
+
+inst_614:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xeeeeeeeeeeeeeeef, 0x6666666666666667, -0x5555555555555555, x1, 816, x2)
+
+inst_615:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x6, x1, 824, x2)
+
+inst_616:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x7777777777777777, 0x6666666666666667, 0x3333333333333334, x1, 832, x2)
+
+inst_617:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x6666666666666667, x1, 840, x2)
+
+inst_618:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff6eff6eef, 0x6666666666666667, -0xb504f332, x1, 848, x2)
+
+inst_619:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f777, 0x6666666666666667, 0xb504f334, x1, 856, x2)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccf, -0xb504f332, 0x3, x1, 864, x2)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffff5fff5ddf, -0xb504f332, 0x5555555555555555, x1, 872, x2)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xffffffffeafbaeee, -0xb504f332, -0x5555555555555556, x1, 880, x2)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccf, -0xb504f332, 0x5, x1, 888, x2)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7bfb3fff, -0xb504f332, 0x3333333333333333, x1, 896, x2)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0xffffffff6eff6eee, -0xb504f332, 0x6666666666666666, x1, 904, x2)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0ccf, -0xb504f332, -0xb504f333, x1, 912, x2)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xffffffffffffffff, -0xb504f332, 0xb504f333, x1, 920, x2)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x2, x1, 928, x2)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0xffffffff5fff5dde, -0xb504f332, 0x5555555555555554, x1, 936, x2)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x0, x1, 944, x2)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x4, x1, 952, x2)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7bfb3ffe, -0xb504f332, 0x3333333333333332, x1, 960, x2)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0xffffffff6eff6eef, -0xb504f332, 0x6666666666666665, x1, 968, x2)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffffe, -0xb504f332, 0xb504f332, x1, 976, x2)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xffffffff5fff5dde, -0xb504f332, 0x5555555555555556, x1, 984, x2)
+
+inst_636:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xffffffffeafbaeef, -0xb504f332, -0x5555555555555555, x1, 992, x2)
+
+inst_637:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x6, x1, 1000, x2)
+
+inst_638:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0xffffffff7bfb3ffe, -0xb504f332, 0x3333333333333334, x1, 1008, x2)
+
+inst_639:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0xffffffff6eff6eef, -0xb504f332, 0x6666666666666667, x1, 1016, x2)
+
+inst_640:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0cce, -0xb504f332, -0xb504f332, x1, 1024, x2)
+
+inst_641:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffffe, -0xb504f332, 0xb504f334, x1, 1032, x2)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0xb504f337, 0xb504f334, 0x3, x1, 1040, x2)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f775, 0xb504f334, 0x5555555555555555, x1, 1048, x2)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaabfaefbbe, 0xb504f334, -0x5555555555555556, x1, 1056, x2)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5
+TEST_CR_OP( c.or, x10, x11, 0xb504f335, 0xb504f334, 0x5, x1, 1064, x2)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f337, 0xb504f334, 0x3333333333333333, x1, 1072, x2)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f776, 0xb504f334, 0x6666666666666666, x1, 1080, x2)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffffd, 0xb504f334, -0xb504f333, x1, 1088, x2)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f333
+TEST_CR_OP( c.or, x10, x11, 0xb504f337, 0xb504f334, 0xb504f333, x1, 1096, x2)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x2
+TEST_CR_OP( c.or, x10, x11, 0xb504f336, 0xb504f334, 0x2, x1, 1104, x2)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f774, 0xb504f334, 0x5555555555555554, x1, 1112, x2)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0xb504f334, 0xb504f334, 0x0, x1, 1120, x2)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0xb504f334, 0xb504f334, 0x4, x1, 1128, x2)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f336, 0xb504f334, 0x3333333333333332, x1, 1136, x2)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f775, 0xb504f334, 0x6666666666666665, x1, 1144, x2)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xb504f336, 0xb504f334, 0xb504f332, x1, 1152, x2)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x55555555f555f776, 0xb504f334, 0x5555555555555556, x1, 1160, x2)
+
+inst_658:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaabfaefbbf, 0xb504f334, -0x5555555555555555, x1, 1168, x2)
+
+inst_659:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0xb504f336, 0xb504f334, 0x6, x1, 1176, x2)
+
+inst_660:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x33333333b737f334, 0xb504f334, 0x3333333333333334, x1, 1184, x2)
+
+inst_661:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x66666666f766f777, 0xb504f334, 0x6666666666666667, x1, 1192, x2)
+
+inst_662:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xfffffffffffffffe, 0xb504f334, -0xb504f332, x1, 1200, x2)
+
+inst_663:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xb504f334, 0xb504f334, 0xb504f334, x1, 1208, x2)
+
+inst_664:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555554
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555554, 0x0, 0x5555555555555554, x1, 1216, x2)
+
+inst_665:
+// rs1_val==0 and rs2_val==0,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x0, 0x0, 0x0, x1, 1224, x2)
+
+inst_666:
+// rs1_val==0 and rs2_val==4,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x4
+TEST_CR_OP( c.or, x10, x11, 0x4, 0x0, 0x4, x1, 1232, x2)
+
+inst_667:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333332
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333332, 0x0, 0x3333333333333332, x1, 1240, x2)
+
+inst_668:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666665
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666665, 0x0, 0x6666666666666665, x1, 1248, x2)
+
+inst_669:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xb504f332, 0x0, 0xb504f332, x1, 1256, x2)
+
+inst_670:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555556
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555556, 0x0, 0x5555555555555556, x1, 1264, x2)
+
+inst_671:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0xaaaaaaaaaaaaaaab, 0x0, -0x5555555555555555, x1, 1272, x2)
+
+inst_672:
+// rs1_val==0 and rs2_val==6,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x6
+TEST_CR_OP( c.or, x10, x11, 0x6, 0x0, 0x6, x1, 1280, x2)
+
+inst_673:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333334
+TEST_CR_OP( c.or, x10, x11, 0x3333333333333334, 0x0, 0x3333333333333334, x1, 1288, x2)
+
+inst_674:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666667
+TEST_CR_OP( c.or, x10, x11, 0x6666666666666667, 0x0, 0x6666666666666667, x1, 1296, x2)
+
+inst_675:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f332
+TEST_CR_OP( c.or, x10, x11, 0xffffffff4afb0cce, 0x0, -0xb504f332, x1, 1304, x2)
+
+inst_676:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f334
+TEST_CR_OP( c.or, x10, x11, 0xb504f334, 0x0, 0xb504f334, x1, 1312, x2)
+
+inst_677:
+// rs1_val==4 and rs2_val==3,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x3
+TEST_CR_OP( c.or, x10, x11, 0x7, 0x4, 0x3, x1, 1320, x2)
+
+inst_678:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: c.or; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555555
+TEST_CR_OP( c.or, x10, x11, 0x5555555555555555, 0x4, 0x5555555555555555, x1, 1328, x2)
+
+inst_679:
+// rs2_val == 0, rs1_val == -9223372036854775808, rs1_val == (-2**(xlen-1))
+// opcode: c.or; op1:x10; op2:x11; op1val:-0x8000000000000000; op2val:0x0
+TEST_CR_OP( c.or, x10, x11, 0x8000000000000000, -0x8000000000000000, 0x0, x1, 1336, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_3:
+ .fill 168*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/csd-01.S b/riscof/suite/rv64i_m/C/csd-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..fc1dca4385e4d868c34ac32712ea9ff2149f9c4f
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/csd-01.S
@@ -0,0 +1,729 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.sd instruction of the RISC-V C extension for the csd covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*C.*);def TEST_CASE_1=True;",csd)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x8, rs2==x12, rs2_val == (-2**(xlen-1)), imm_val == 120, imm_val > 0, rs2_val == -9223372036854775808
+// opcode:c.sd; op1:x8; op2:x12; op2val:-0x8000000000000000; immval:0x78
+TEST_STORE(x1,x2,0,x8,x12,-0x8000000000000000,0x78,0,c.sd,0)
+
+inst_1:
+// rs1==x15, rs2==x9, rs2_val == 0, imm_val == 168
+// opcode:c.sd; op1:x15; op2:x9; op2val:0x0; immval:0xa8
+TEST_STORE(x1,x2,0,x15,x9,0x0,0xa8,8,c.sd,0)
+
+inst_2:
+// rs1==x9, rs2==x13, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807, imm_val == 216
+// opcode:c.sd; op1:x9; op2:x13; op2val:0x7fffffffffffffff; immval:0xd8
+TEST_STORE(x1,x2,0,x9,x13,0x7fffffffffffffff,0xd8,16,c.sd,0)
+
+inst_3:
+// rs1==x14, rs2==x15, rs2_val == 1,
+// opcode:c.sd; op1:x14; op2:x15; op2val:0x1; immval:0xd8
+TEST_STORE(x1,x2,0,x14,x15,0x1,0xd8,24,c.sd,0)
+
+inst_4:
+// rs1==x11, rs2==x10, imm_val == 0, rs2_val == -9007199254740993
+// opcode:c.sd; op1:x11; op2:x10; op2val:-0x20000000000001; immval:0x0
+TEST_STORE(x1,x2,0,x11,x10,-0x20000000000001,0x0,32,c.sd,0)
+
+inst_5:
+// rs1==x10, rs2==x8, rs2_val == 2,
+// opcode:c.sd; op1:x10; op2:x8; op2val:0x2; immval:0x78
+TEST_STORE(x1,x2,0,x10,x8,0x2,0x78,40,c.sd,0)
+
+inst_6:
+// rs1==x12, rs2==x11, rs2_val == 4,
+// opcode:c.sd; op1:x12; op2:x11; op2val:0x4; immval:0xd8
+TEST_STORE(x1,x2,0,x12,x11,0x4,0xd8,48,c.sd,0)
+
+inst_7:
+// rs1==x13, rs2==x14, rs2_val == 8,
+// opcode:c.sd; op1:x13; op2:x14; op2val:0x8; immval:0xd8
+TEST_STORE(x1,x2,0,x13,x14,0x8,0xd8,56,c.sd,0)
+
+inst_8:
+// rs2_val == 16, imm_val == 80
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x10; immval:0x50
+TEST_STORE(x1,x2,0,x10,x11,0x10,0x50,64,c.sd,0)
+
+inst_9:
+// rs2_val == 32, imm_val == 128
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x20; immval:0x80
+TEST_STORE(x1,x2,0,x10,x11,0x20,0x80,72,c.sd,0)
+
+inst_10:
+// rs2_val == 64,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x40; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,0x40,0x28,80,c.sd,0)
+
+inst_11:
+// rs2_val == 128, imm_val == 240
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x80; immval:0xf0
+TEST_STORE(x1,x2,0,x10,x11,0x80,0xf0,88,c.sd,0)
+
+inst_12:
+// rs2_val == 256,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x100; immval:0x18
+TEST_STORE(x1,x2,0,x10,x11,0x100,0x18,96,c.sd,0)
+
+inst_13:
+// rs2_val == 512,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x200; immval:0xa8
+TEST_STORE(x1,x2,0,x10,x11,0x200,0xa8,104,c.sd,0)
+
+inst_14:
+// rs2_val == 1024, imm_val == 32
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x400; immval:0x20
+TEST_STORE(x1,x2,0,x10,x11,0x400,0x20,112,c.sd,0)
+
+inst_15:
+// rs2_val == 2048,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x800; immval:0x50
+TEST_STORE(x1,x2,0,x10,x11,0x800,0x50,120,c.sd,0)
+
+inst_16:
+// rs2_val == 4096,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x1000; immval:0x80
+TEST_STORE(x1,x2,0,x10,x11,0x1000,0x80,128,c.sd,0)
+
+inst_17:
+// rs2_val == 8192,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x2000; immval:0x78
+TEST_STORE(x1,x2,0,x10,x11,0x2000,0x78,136,c.sd,0)
+
+inst_18:
+// rs2_val == 16384,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x4000; immval:0x70
+TEST_STORE(x1,x2,0,x10,x11,0x4000,0x70,144,c.sd,0)
+
+inst_19:
+// rs2_val == 32768, imm_val == 64
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x8000; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,0x8000,0x40,152,c.sd,0)
+
+inst_20:
+// rs2_val == 65536,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x10000; immval:0x58
+TEST_STORE(x1,x2,0,x10,x11,0x10000,0x58,160,c.sd,0)
+
+inst_21:
+// rs2_val == 131072,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x20000; immval:0x50
+TEST_STORE(x1,x2,0,x10,x11,0x20000,0x50,168,c.sd,0)
+
+inst_22:
+// rs2_val == 262144,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x40000; immval:0x68
+TEST_STORE(x1,x2,0,x10,x11,0x40000,0x68,176,c.sd,0)
+
+inst_23:
+// rs2_val == 524288,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x80000; immval:0x60
+TEST_STORE(x1,x2,0,x10,x11,0x80000,0x60,184,c.sd,0)
+
+inst_24:
+// rs2_val == 1048576,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x100000; immval:0x58
+TEST_STORE(x1,x2,0,x10,x11,0x100000,0x58,192,c.sd,0)
+
+inst_25:
+// rs2_val == 2097152,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x200000; immval:0x58
+TEST_STORE(x1,x2,0,x10,x11,0x200000,0x58,200,c.sd,0)
+
+inst_26:
+// rs2_val == 4194304,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x400000; immval:0x68
+TEST_STORE(x1,x2,0,x10,x11,0x400000,0x68,208,c.sd,0)
+
+inst_27:
+// rs2_val == 8388608,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x800000; immval:0x70
+TEST_STORE(x1,x2,0,x10,x11,0x800000,0x70,216,c.sd,0)
+
+inst_28:
+// rs2_val == 16777216,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x1000000; immval:0x0
+TEST_STORE(x1,x2,0,x10,x11,0x1000000,0x0,224,c.sd,0)
+
+inst_29:
+// rs2_val == 33554432,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x2000000; immval:0x88
+TEST_STORE(x1,x2,0,x10,x11,0x2000000,0x88,232,c.sd,0)
+
+inst_30:
+// rs2_val == 67108864,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x4000000; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,0x4000000,0x28,240,c.sd,0)
+
+inst_31:
+// rs2_val == 134217728,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x8000000; immval:0x30
+TEST_STORE(x1,x2,0,x10,x11,0x8000000,0x30,248,c.sd,0)
+
+inst_32:
+// rs2_val == 268435456,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x10000000; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,0x10000000,0x28,256,c.sd,0)
+
+inst_33:
+// rs2_val == 536870912,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x20000000; immval:0x58
+TEST_STORE(x1,x2,0,x10,x11,0x20000000,0x58,264,c.sd,0)
+
+inst_34:
+// rs2_val == 1073741824,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x40000000; immval:0x38
+TEST_STORE(x1,x2,0,x10,x11,0x40000000,0x38,272,c.sd,0)
+
+inst_35:
+// rs2_val == 2147483648,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x80000000; immval:0x0
+TEST_STORE(x1,x2,0,x10,x11,0x80000000,0x0,280,c.sd,0)
+
+inst_36:
+// rs2_val == 4294967296, imm_val == 16
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x100000000; immval:0x10
+TEST_STORE(x1,x2,0,x10,x11,0x100000000,0x10,288,c.sd,0)
+
+inst_37:
+// rs2_val == 8589934592,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x200000000; immval:0x10
+TEST_STORE(x1,x2,0,x10,x11,0x200000000,0x10,296,c.sd,0)
+
+inst_38:
+// rs2_val == 17179869184,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x400000000; immval:0x30
+TEST_STORE(x1,x2,0,x10,x11,0x400000000,0x30,304,c.sd,0)
+
+inst_39:
+// rs2_val == 34359738368, imm_val == 8
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x800000000; immval:0x8
+TEST_STORE(x1,x2,0,x10,x11,0x800000000,0x8,312,c.sd,0)
+
+inst_40:
+// rs2_val == 68719476736,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x1000000000; immval:0x48
+TEST_STORE(x1,x2,0,x10,x11,0x1000000000,0x48,320,c.sd,0)
+
+inst_41:
+// rs2_val == 137438953472,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x2000000000; immval:0x98
+TEST_STORE(x1,x2,0,x10,x11,0x2000000000,0x98,328,c.sd,0)
+
+inst_42:
+// rs2_val == 274877906944,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x4000000000; immval:0x80
+TEST_STORE(x1,x2,0,x10,x11,0x4000000000,0x80,336,c.sd,0)
+
+inst_43:
+// rs2_val == 549755813888,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x8000000000; immval:0xa8
+TEST_STORE(x1,x2,0,x10,x11,0x8000000000,0xa8,344,c.sd,0)
+
+inst_44:
+// rs2_val == 1099511627776,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x10000000000; immval:0x80
+TEST_STORE(x1,x2,0,x10,x11,0x10000000000,0x80,352,c.sd,0)
+
+inst_45:
+// rs2_val == 2199023255552,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x20000000000; immval:0x88
+TEST_STORE(x1,x2,0,x10,x11,0x20000000000,0x88,360,c.sd,0)
+
+inst_46:
+// rs2_val == 4398046511104,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x40000000000; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,0x40000000000,0x40,368,c.sd,0)
+
+inst_47:
+// rs2_val == 8796093022208,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x80000000000; immval:0x60
+TEST_STORE(x1,x2,0,x10,x11,0x80000000000,0x60,376,c.sd,0)
+
+inst_48:
+// rs2_val == 17592186044416,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x100000000000; immval:0x50
+TEST_STORE(x1,x2,0,x10,x11,0x100000000000,0x50,384,c.sd,0)
+
+inst_49:
+// rs2_val == 35184372088832, imm_val == 184
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x200000000000; immval:0xb8
+TEST_STORE(x1,x2,0,x10,x11,0x200000000000,0xb8,392,c.sd,0)
+
+inst_50:
+// rs2_val == 70368744177664,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x400000000000; immval:0x38
+TEST_STORE(x1,x2,0,x10,x11,0x400000000000,0x38,400,c.sd,0)
+
+inst_51:
+// rs2_val == 140737488355328,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x800000000000; immval:0x8
+TEST_STORE(x1,x2,0,x10,x11,0x800000000000,0x8,408,c.sd,0)
+
+inst_52:
+// rs2_val == 281474976710656,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x1000000000000; immval:0x58
+TEST_STORE(x1,x2,0,x10,x11,0x1000000000000,0x58,416,c.sd,0)
+
+inst_53:
+// rs2_val == 562949953421312,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x2000000000000; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,0x2000000000000,0x40,424,c.sd,0)
+
+inst_54:
+// rs2_val == 1125899906842624,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x4000000000000; immval:0x30
+TEST_STORE(x1,x2,0,x10,x11,0x4000000000000,0x30,432,c.sd,0)
+
+inst_55:
+// rs2_val == 2251799813685248,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x8000000000000; immval:0x30
+TEST_STORE(x1,x2,0,x10,x11,0x8000000000000,0x30,440,c.sd,0)
+
+inst_56:
+// rs2_val == 4503599627370496,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x10000000000000; immval:0x78
+TEST_STORE(x1,x2,0,x10,x11,0x10000000000000,0x78,448,c.sd,0)
+
+inst_57:
+// rs2_val == 9007199254740992,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x20000000000000; immval:0xb8
+TEST_STORE(x1,x2,0,x10,x11,0x20000000000000,0xb8,456,c.sd,0)
+
+inst_58:
+// rs2_val == 18014398509481984,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x40000000000000; immval:0x0
+TEST_STORE(x1,x2,0,x10,x11,0x40000000000000,0x0,464,c.sd,0)
+
+inst_59:
+// rs2_val == 36028797018963968,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x80000000000000; immval:0x48
+TEST_STORE(x1,x2,0,x10,x11,0x80000000000000,0x48,472,c.sd,0)
+
+inst_60:
+// rs2_val == 72057594037927936,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x100000000000000; immval:0x58
+TEST_STORE(x1,x2,0,x10,x11,0x100000000000000,0x58,480,c.sd,0)
+
+inst_61:
+// rs2_val == 144115188075855872,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x200000000000000; immval:0xa8
+TEST_STORE(x1,x2,0,x10,x11,0x200000000000000,0xa8,488,c.sd,0)
+
+inst_62:
+// rs2_val == 288230376151711744,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x400000000000000; immval:0x98
+TEST_STORE(x1,x2,0,x10,x11,0x400000000000000,0x98,496,c.sd,0)
+
+inst_63:
+// rs2_val == 576460752303423488,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x800000000000000; immval:0x68
+TEST_STORE(x1,x2,0,x10,x11,0x800000000000000,0x68,504,c.sd,0)
+
+inst_64:
+// rs2_val == 1152921504606846976,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x1000000000000000; immval:0x80
+TEST_STORE(x1,x2,0,x10,x11,0x1000000000000000,0x80,512,c.sd,0)
+
+inst_65:
+// rs2_val == 2305843009213693952,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x2000000000000000; immval:0xf0
+TEST_STORE(x1,x2,0,x10,x11,0x2000000000000000,0xf0,520,c.sd,0)
+
+inst_66:
+// rs2_val == 4611686018427387904,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x4000000000000000; immval:0x60
+TEST_STORE(x1,x2,0,x10,x11,0x4000000000000000,0x60,528,c.sd,0)
+
+inst_67:
+// rs2_val == -2,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x2; immval:0x50
+TEST_STORE(x1,x2,0,x10,x11,-0x2,0x50,536,c.sd,0)
+
+inst_68:
+// rs2_val == -3,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x3; immval:0xf8
+TEST_STORE(x1,x2,0,x10,x11,-0x3,0xf8,544,c.sd,0)
+
+inst_69:
+// rs2_val == -576460752303423489,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x800000000000001; immval:0xf8
+TEST_STORE(x1,x2,0,x10,x11,-0x800000000000001,0xf8,552,c.sd,0)
+
+inst_70:
+// rs2_val == -1152921504606846977,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x1000000000000001; immval:0x8
+TEST_STORE(x1,x2,0,x10,x11,-0x1000000000000001,0x8,560,c.sd,0)
+
+inst_71:
+// rs2_val == -2305843009213693953,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x2000000000000001; immval:0x18
+TEST_STORE(x1,x2,0,x10,x11,-0x2000000000000001,0x18,568,c.sd,0)
+
+inst_72:
+// rs2_val == -4611686018427387905,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x4000000000000001; immval:0x18
+TEST_STORE(x1,x2,0,x10,x11,-0x4000000000000001,0x18,576,c.sd,0)
+
+inst_73:
+// rs2_val == 6148914691236517205,
+// opcode:c.sd; op1:x10; op2:x11; op2val:0x5555555555555555; immval:0xd8
+TEST_STORE(x1,x2,0,x10,x11,0x5555555555555555,0xd8,584,c.sd,0)
+
+inst_74:
+// rs2_val == -6148914691236517206,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x5555555555555556; immval:0x20
+TEST_STORE(x1,x2,0,x10,x11,-0x5555555555555556,0x20,592,c.sd,0)
+
+inst_75:
+// imm_val == 232,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x8; immval:0xe8
+TEST_STORE(x1,x2,0,x10,x11,-0x8,0xe8,600,c.sd,0)
+
+inst_76:
+// rs2_val == -5,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x5; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,-0x5,0x28,608,c.sd,0)
+
+inst_77:
+// rs2_val == -9,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x9; immval:0xf0
+TEST_STORE(x1,x2,0,x10,x11,-0x9,0xf0,616,c.sd,0)
+
+inst_78:
+// rs2_val == -17,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x11; immval:0x50
+TEST_STORE(x1,x2,0,x10,x11,-0x11,0x50,624,c.sd,0)
+
+inst_79:
+// rs2_val == -33,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x21; immval:0x20
+TEST_STORE(x1,x2,0,x10,x11,-0x21,0x20,632,c.sd,0)
+
+inst_80:
+// rs2_val == -65,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x41; immval:0xf0
+TEST_STORE(x1,x2,0,x10,x11,-0x41,0xf0,640,c.sd,0)
+
+inst_81:
+// rs2_val == -129,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x81; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,-0x81,0x28,648,c.sd,0)
+
+inst_82:
+// rs2_val == -257,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x101; immval:0x68
+TEST_STORE(x1,x2,0,x10,x11,-0x101,0x68,656,c.sd,0)
+
+inst_83:
+// rs2_val == -513,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x201; immval:0x20
+TEST_STORE(x1,x2,0,x10,x11,-0x201,0x20,664,c.sd,0)
+
+inst_84:
+// rs2_val == -1025,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x401; immval:0x18
+TEST_STORE(x1,x2,0,x10,x11,-0x401,0x18,672,c.sd,0)
+
+inst_85:
+// rs2_val == -2049,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x801; immval:0xb8
+TEST_STORE(x1,x2,0,x10,x11,-0x801,0xb8,680,c.sd,0)
+
+inst_86:
+// rs2_val == -4097,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x1001; immval:0x98
+TEST_STORE(x1,x2,0,x10,x11,-0x1001,0x98,688,c.sd,0)
+
+inst_87:
+// rs2_val == -8193,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x2001; immval:0x58
+TEST_STORE(x1,x2,0,x10,x11,-0x2001,0x58,696,c.sd,0)
+
+inst_88:
+// rs2_val == -16385,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x4001; immval:0x58
+TEST_STORE(x1,x2,0,x10,x11,-0x4001,0x58,704,c.sd,0)
+
+inst_89:
+// rs2_val == -32769,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x8001; immval:0x90
+TEST_STORE(x1,x2,0,x10,x11,-0x8001,0x90,712,c.sd,0)
+
+inst_90:
+// rs2_val == -65537,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x10001; immval:0x88
+TEST_STORE(x1,x2,0,x10,x11,-0x10001,0x88,720,c.sd,0)
+
+inst_91:
+// rs2_val == -131073,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x20001; immval:0x0
+TEST_STORE(x1,x2,0,x10,x11,-0x20001,0x0,728,c.sd,0)
+
+inst_92:
+// rs2_val == -262145,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x40001; immval:0xd8
+TEST_STORE(x1,x2,0,x10,x11,-0x40001,0xd8,736,c.sd,0)
+
+inst_93:
+// rs2_val == -524289,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x80001; immval:0x50
+TEST_STORE(x1,x2,0,x10,x11,-0x80001,0x50,744,c.sd,0)
+
+inst_94:
+// rs2_val == -1048577,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x100001; immval:0x60
+TEST_STORE(x1,x2,0,x10,x11,-0x100001,0x60,752,c.sd,0)
+
+inst_95:
+// rs2_val == -2097153,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x200001; immval:0xa8
+TEST_STORE(x1,x2,0,x10,x11,-0x200001,0xa8,760,c.sd,0)
+
+inst_96:
+// rs2_val == -4194305,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x400001; immval:0x70
+TEST_STORE(x1,x2,0,x10,x11,-0x400001,0x70,768,c.sd,0)
+
+inst_97:
+// rs2_val == -8388609,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x800001; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,-0x800001,0x40,776,c.sd,0)
+
+inst_98:
+// rs2_val == -16777217,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x1000001; immval:0xf0
+TEST_STORE(x1,x2,0,x10,x11,-0x1000001,0xf0,784,c.sd,0)
+
+inst_99:
+// rs2_val == -33554433,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x2000001; immval:0xf8
+TEST_STORE(x1,x2,0,x10,x11,-0x2000001,0xf8,792,c.sd,0)
+
+inst_100:
+// rs2_val == -67108865,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x4000001; immval:0xf8
+TEST_STORE(x1,x2,0,x10,x11,-0x4000001,0xf8,800,c.sd,0)
+
+inst_101:
+// rs2_val == -134217729,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x8000001; immval:0x20
+TEST_STORE(x1,x2,0,x10,x11,-0x8000001,0x20,808,c.sd,0)
+
+inst_102:
+// rs2_val == -268435457,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x10000001; immval:0x0
+TEST_STORE(x1,x2,0,x10,x11,-0x10000001,0x0,816,c.sd,0)
+
+inst_103:
+// rs2_val == -536870913,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x20000001; immval:0xd8
+TEST_STORE(x1,x2,0,x10,x11,-0x20000001,0xd8,824,c.sd,0)
+
+inst_104:
+// rs2_val == -1073741825,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x40000001; immval:0xf0
+TEST_STORE(x1,x2,0,x10,x11,-0x40000001,0xf0,832,c.sd,0)
+
+inst_105:
+// rs2_val == -2147483649,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x80000001; immval:0x48
+TEST_STORE(x1,x2,0,x10,x11,-0x80000001,0x48,840,c.sd,0)
+
+inst_106:
+// rs2_val == -4294967297,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x100000001; immval:0x30
+TEST_STORE(x1,x2,0,x10,x11,-0x100000001,0x30,848,c.sd,0)
+
+inst_107:
+// rs2_val == -8589934593,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x200000001; immval:0x50
+TEST_STORE(x1,x2,0,x10,x11,-0x200000001,0x50,856,c.sd,0)
+
+inst_108:
+// rs2_val == -17179869185,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x400000001; immval:0xe8
+TEST_STORE(x1,x2,0,x10,x11,-0x400000001,0xe8,864,c.sd,0)
+
+inst_109:
+// rs2_val == -34359738369,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x800000001; immval:0x78
+TEST_STORE(x1,x2,0,x10,x11,-0x800000001,0x78,872,c.sd,0)
+
+inst_110:
+// rs2_val == -68719476737,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x1000000001; immval:0x50
+TEST_STORE(x1,x2,0,x10,x11,-0x1000000001,0x50,880,c.sd,0)
+
+inst_111:
+// rs2_val == -137438953473,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x2000000001; immval:0x0
+TEST_STORE(x1,x2,0,x10,x11,-0x2000000001,0x0,888,c.sd,0)
+
+inst_112:
+// rs2_val == -274877906945,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x4000000001; immval:0x80
+TEST_STORE(x1,x2,0,x10,x11,-0x4000000001,0x80,896,c.sd,0)
+
+inst_113:
+// rs2_val == -549755813889,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x8000000001; immval:0x78
+TEST_STORE(x1,x2,0,x10,x11,-0x8000000001,0x78,904,c.sd,0)
+
+inst_114:
+// rs2_val == -1099511627777,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x10000000001; immval:0xf8
+TEST_STORE(x1,x2,0,x10,x11,-0x10000000001,0xf8,912,c.sd,0)
+
+inst_115:
+// rs2_val == -2199023255553,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x20000000001; immval:0xf0
+TEST_STORE(x1,x2,0,x10,x11,-0x20000000001,0xf0,920,c.sd,0)
+
+inst_116:
+// rs2_val == -4398046511105,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x40000000001; immval:0x60
+TEST_STORE(x1,x2,0,x10,x11,-0x40000000001,0x60,928,c.sd,0)
+
+inst_117:
+// rs2_val == -8796093022209,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x80000000001; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,-0x80000000001,0x40,936,c.sd,0)
+
+inst_118:
+// rs2_val == -17592186044417,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x100000000001; immval:0x18
+TEST_STORE(x1,x2,0,x10,x11,-0x100000000001,0x18,944,c.sd,0)
+
+inst_119:
+// rs2_val == -35184372088833,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x200000000001; immval:0x30
+TEST_STORE(x1,x2,0,x10,x11,-0x200000000001,0x30,952,c.sd,0)
+
+inst_120:
+// rs2_val == -70368744177665,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x400000000001; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,-0x400000000001,0x28,960,c.sd,0)
+
+inst_121:
+// rs2_val == -140737488355329,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x800000000001; immval:0xb8
+TEST_STORE(x1,x2,0,x10,x11,-0x800000000001,0xb8,968,c.sd,0)
+
+inst_122:
+// rs2_val == -281474976710657,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x1000000000001; immval:0xf8
+TEST_STORE(x1,x2,0,x10,x11,-0x1000000000001,0xf8,976,c.sd,0)
+
+inst_123:
+// rs2_val == -562949953421313,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x2000000000001; immval:0x88
+TEST_STORE(x1,x2,0,x10,x11,-0x2000000000001,0x88,984,c.sd,0)
+
+inst_124:
+// rs2_val == -1125899906842625,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x4000000000001; immval:0x48
+TEST_STORE(x1,x2,0,x10,x11,-0x4000000000001,0x48,992,c.sd,0)
+
+inst_125:
+// rs2_val == -2251799813685249,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x8000000000001; immval:0xd8
+TEST_STORE(x1,x2,0,x10,x11,-0x8000000000001,0xd8,1000,c.sd,0)
+
+inst_126:
+// rs2_val == -4503599627370497,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x10000000000001; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,-0x10000000000001,0x28,1008,c.sd,0)
+
+inst_127:
+// rs2_val == -18014398509481985,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x40000000000001; immval:0x10
+TEST_STORE(x1,x2,0,x10,x11,-0x40000000000001,0x10,1016,c.sd,0)
+
+inst_128:
+// rs2_val == -36028797018963969,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x80000000000001; immval:0x90
+TEST_STORE(x1,x2,0,x10,x11,-0x80000000000001,0x90,1024,c.sd,0)
+
+inst_129:
+// rs2_val == -72057594037927937,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x100000000000001; immval:0xf0
+TEST_STORE(x1,x2,0,x10,x11,-0x100000000000001,0xf0,1032,c.sd,0)
+
+inst_130:
+// rs2_val == -144115188075855873,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x200000000000001; immval:0x60
+TEST_STORE(x1,x2,0,x10,x11,-0x200000000000001,0x60,1040,c.sd,0)
+
+inst_131:
+// rs2_val == -288230376151711745,
+// opcode:c.sd; op1:x10; op2:x11; op2val:-0x400000000000001; immval:0x10
+TEST_STORE(x1,x2,0,x10,x11,-0x400000000000001,0x10,1048,c.sd,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 132*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/csdsp-01.S b/riscof/suite/rv64i_m/C/csdsp-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..c5d410f4817be994f8af85207811ffc3fe7285b8
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/csdsp-01.S
@@ -0,0 +1,729 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.sdsp instruction of the RISC-V C extension for the csdsp covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*C.*);def TEST_CASE_1=True;",csdsp)
+
+RVTEST_SIGBASE( x9,signature_x9_1)
+
+inst_0:
+// rs2==x16, rs2_val == (-2**(xlen-1)), imm_val == 128, imm_val > 0, rs2_val == -9223372036854775808
+// opcode:c.sdsp; op1:x2; op2:x16; op2val:-0x8000000000000000; immval:0x80
+TEST_STORE(x9,x18,0,x2,x16,-0x8000000000000000,0x80,0,c.sdsp,0)
+
+inst_1:
+// rs2==x24, rs2_val == 0,
+// opcode:c.sdsp; op1:x2; op2:x24; op2val:0x0; immval:0x90
+TEST_STORE(x9,x18,0,x2,x24,0x0,0x90,8,c.sdsp,0)
+
+inst_2:
+// rs2==x6, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807
+// opcode:c.sdsp; op1:x2; op2:x6; op2val:0x7fffffffffffffff; immval:0x28
+TEST_STORE(x9,x18,0,x2,x6,0x7fffffffffffffff,0x28,16,c.sdsp,0)
+
+inst_3:
+// rs2==x26, rs2_val == 1, imm_val == 472
+// opcode:c.sdsp; op1:x2; op2:x26; op2val:0x1; immval:0x1d8
+TEST_STORE(x9,x18,0,x2,x26,0x1,0x1d8,24,c.sdsp,0)
+
+inst_4:
+// rs2==x7, imm_val == 0, rs2_val == -33
+// opcode:c.sdsp; op1:x2; op2:x7; op2val:-0x21; immval:0x0
+TEST_STORE(x9,x18,0,x2,x7,-0x21,0x0,32,c.sdsp,0)
+
+inst_5:
+// rs2==x15, rs2_val == 2, imm_val == 376
+// opcode:c.sdsp; op1:x2; op2:x15; op2val:0x2; immval:0x178
+TEST_STORE(x9,x18,0,x2,x15,0x2,0x178,40,c.sdsp,0)
+
+inst_6:
+// rs2==x17, rs2_val == 4, imm_val == 16
+// opcode:c.sdsp; op1:x2; op2:x17; op2val:0x4; immval:0x10
+TEST_STORE(x9,x18,0,x2,x17,0x4,0x10,48,c.sdsp,0)
+
+inst_7:
+// rs2==x27, rs2_val == 8, imm_val == 248
+// opcode:c.sdsp; op1:x2; op2:x27; op2val:0x8; immval:0xf8
+TEST_STORE(x9,x18,0,x2,x27,0x8,0xf8,56,c.sdsp,0)
+
+inst_8:
+// rs2==x11, rs2_val == 16, imm_val == 32
+// opcode:c.sdsp; op1:x2; op2:x11; op2val:0x10; immval:0x20
+TEST_STORE(x9,x18,0,x2,x11,0x10,0x20,64,c.sdsp,0)
+
+inst_9:
+// rs2==x30, rs2_val == 32,
+// opcode:c.sdsp; op1:x2; op2:x30; op2val:0x20; immval:0x60
+TEST_STORE(x9,x18,0,x2,x30,0x20,0x60,72,c.sdsp,0)
+
+inst_10:
+// rs2==x8, rs2_val == 64, imm_val == 336
+// opcode:c.sdsp; op1:x2; op2:x8; op2val:0x40; immval:0x150
+TEST_STORE(x9,x18,0,x2,x8,0x40,0x150,80,c.sdsp,0)
+
+inst_11:
+// rs2==x13, rs2_val == 128,
+// opcode:c.sdsp; op1:x2; op2:x13; op2val:0x80; immval:0x38
+TEST_STORE(x9,x18,0,x2,x13,0x80,0x38,88,c.sdsp,0)
+
+inst_12:
+// rs2==x4, rs2_val == 256,
+// opcode:c.sdsp; op1:x2; op2:x4; op2val:0x100; immval:0x1f8
+TEST_STORE(x9,x18,0,x2,x4,0x100,0x1f8,96,c.sdsp,0)
+
+inst_13:
+// rs2==x28, rs2_val == 512,
+// opcode:c.sdsp; op1:x2; op2:x28; op2val:0x200; immval:0x1f8
+TEST_STORE(x9,x18,0,x2,x28,0x200,0x1f8,104,c.sdsp,0)
+
+inst_14:
+// rs2==x21, rs2_val == 1024, imm_val == 488
+// opcode:c.sdsp; op1:x2; op2:x21; op2val:0x400; immval:0x1e8
+TEST_STORE(x9,x18,0,x2,x21,0x400,0x1e8,112,c.sdsp,0)
+
+inst_15:
+// rs2==x3, rs2_val == 2048, imm_val == 496
+// opcode:c.sdsp; op1:x2; op2:x3; op2val:0x800; immval:0x1f0
+TEST_STORE(x9,x18,0,x2,x3,0x800,0x1f0,120,c.sdsp,0)
+
+inst_16:
+// rs2==x1, rs2_val == 4096,
+// opcode:c.sdsp; op1:x2; op2:x1; op2val:0x1000; immval:0x60
+TEST_STORE(x9,x18,0,x2,x1,0x1000,0x60,128,c.sdsp,0)
+
+inst_17:
+// rs2==x10, rs2_val == 8192,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x2000; immval:0x18
+TEST_STORE(x9,x18,0,x2,x10,0x2000,0x18,136,c.sdsp,0)
+
+inst_18:
+// rs2==x14, rs2_val == 16384,
+// opcode:c.sdsp; op1:x2; op2:x14; op2val:0x4000; immval:0xf8
+TEST_STORE(x9,x18,0,x2,x14,0x4000,0xf8,144,c.sdsp,0)
+
+inst_19:
+// rs2==x5, rs2_val == 32768,
+// opcode:c.sdsp; op1:x2; op2:x5; op2val:0x8000; immval:0x90
+TEST_STORE(x9,x18,0,x2,x5,0x8000,0x90,152,c.sdsp,0)
+
+inst_20:
+// rs2==x25, rs2_val == 65536,
+// opcode:c.sdsp; op1:x2; op2:x25; op2val:0x10000; immval:0x178
+TEST_STORE(x9,x18,0,x2,x25,0x10000,0x178,160,c.sdsp,0)
+
+inst_21:
+// rs2==x23, rs2_val == 131072,
+// opcode:c.sdsp; op1:x2; op2:x23; op2val:0x20000; immval:0x90
+TEST_STORE(x9,x18,0,x2,x23,0x20000,0x90,168,c.sdsp,0)
+
+inst_22:
+// rs2==x19, rs2_val == 262144,
+// opcode:c.sdsp; op1:x2; op2:x19; op2val:0x40000; immval:0x90
+TEST_STORE(x9,x18,0,x2,x19,0x40000,0x90,176,c.sdsp,0)
+
+inst_23:
+// rs2==x29, rs2_val == 524288,
+// opcode:c.sdsp; op1:x2; op2:x29; op2val:0x80000; immval:0x10
+TEST_STORE(x9,x18,0,x2,x29,0x80000,0x10,184,c.sdsp,0)
+
+inst_24:
+// rs2==x12, rs2_val == 1048576,
+// opcode:c.sdsp; op1:x2; op2:x12; op2val:0x100000; immval:0x98
+TEST_STORE(x9,x18,0,x2,x12,0x100000,0x98,192,c.sdsp,0)
+
+inst_25:
+// rs2==x31, rs2_val == 2097152,
+// opcode:c.sdsp; op1:x2; op2:x31; op2val:0x200000; immval:0x18
+TEST_STORE(x9,x18,0,x2,x31,0x200000,0x18,200,c.sdsp,0)
+
+inst_26:
+// rs2==x20, rs2_val == 4194304,
+// opcode:c.sdsp; op1:x2; op2:x20; op2val:0x400000; immval:0x1f0
+TEST_STORE(x9,x3,0,x2,x20,0x400000,0x1f0,208,c.sdsp,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_27:
+// rs2==x22, rs2_val == 8388608,
+// opcode:c.sdsp; op1:x2; op2:x22; op2val:0x800000; immval:0x38
+TEST_STORE(x1,x3,0,x2,x22,0x800000,0x38,0,c.sdsp,0)
+
+inst_28:
+// rs2==x9, rs2_val == 16777216,
+// opcode:c.sdsp; op1:x2; op2:x9; op2val:0x1000000; immval:0x98
+TEST_STORE(x1,x3,0,x2,x9,0x1000000,0x98,8,c.sdsp,0)
+
+inst_29:
+// rs2==x18, rs2_val == 33554432,
+// opcode:c.sdsp; op1:x2; op2:x18; op2val:0x2000000; immval:0x90
+TEST_STORE(x1,x3,0,x2,x18,0x2000000,0x90,16,c.sdsp,0)
+
+inst_30:
+// rs2_val == 67108864,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x4000000; immval:0x1e8
+TEST_STORE(x1,x3,0,x2,x10,0x4000000,0x1e8,24,c.sdsp,0)
+
+inst_31:
+// rs2_val == 134217728,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x8000000; immval:0x68
+TEST_STORE(x1,x3,0,x2,x10,0x8000000,0x68,32,c.sdsp,0)
+
+inst_32:
+// rs2_val == 268435456,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x10000000; immval:0x10
+TEST_STORE(x1,x3,0,x2,x10,0x10000000,0x10,40,c.sdsp,0)
+
+inst_33:
+// rs2_val == 536870912,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x20000000; immval:0x98
+TEST_STORE(x1,x3,0,x2,x10,0x20000000,0x98,48,c.sdsp,0)
+
+inst_34:
+// rs2_val == 1073741824,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x40000000; immval:0x30
+TEST_STORE(x1,x3,0,x2,x10,0x40000000,0x30,56,c.sdsp,0)
+
+inst_35:
+// rs2_val == 2147483648,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x80000000; immval:0x78
+TEST_STORE(x1,x3,0,x2,x10,0x80000000,0x78,64,c.sdsp,0)
+
+inst_36:
+// rs2_val == 4294967296,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x100000000; immval:0xf8
+TEST_STORE(x1,x3,0,x2,x10,0x100000000,0xf8,72,c.sdsp,0)
+
+inst_37:
+// rs2_val == 8589934592,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x200000000; immval:0x78
+TEST_STORE(x1,x3,0,x2,x10,0x200000000,0x78,80,c.sdsp,0)
+
+inst_38:
+// rs2_val == 17179869184,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x400000000; immval:0x88
+TEST_STORE(x1,x3,0,x2,x10,0x400000000,0x88,88,c.sdsp,0)
+
+inst_39:
+// rs2_val == 34359738368,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x800000000; immval:0x0
+TEST_STORE(x1,x3,0,x2,x10,0x800000000,0x0,96,c.sdsp,0)
+
+inst_40:
+// rs2_val == 68719476736,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x1000000000; immval:0x150
+TEST_STORE(x1,x3,0,x2,x10,0x1000000000,0x150,104,c.sdsp,0)
+
+inst_41:
+// rs2_val == 137438953472,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x2000000000; immval:0x80
+TEST_STORE(x1,x3,0,x2,x10,0x2000000000,0x80,112,c.sdsp,0)
+
+inst_42:
+// rs2_val == 274877906944, imm_val == 256
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x4000000000; immval:0x100
+TEST_STORE(x1,x3,0,x2,x10,0x4000000000,0x100,120,c.sdsp,0)
+
+inst_43:
+// rs2_val == 549755813888,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x8000000000; immval:0x48
+TEST_STORE(x1,x3,0,x2,x10,0x8000000000,0x48,128,c.sdsp,0)
+
+inst_44:
+// rs2_val == 1099511627776,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x10000000000; immval:0x50
+TEST_STORE(x1,x3,0,x2,x10,0x10000000000,0x50,136,c.sdsp,0)
+
+inst_45:
+// rs2_val == 2199023255552,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x20000000000; immval:0x20
+TEST_STORE(x1,x3,0,x2,x10,0x20000000000,0x20,144,c.sdsp,0)
+
+inst_46:
+// rs2_val == 4398046511104,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x40000000000; immval:0x150
+TEST_STORE(x1,x3,0,x2,x10,0x40000000000,0x150,152,c.sdsp,0)
+
+inst_47:
+// rs2_val == 8796093022208,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x80000000000; immval:0x48
+TEST_STORE(x1,x3,0,x2,x10,0x80000000000,0x48,160,c.sdsp,0)
+
+inst_48:
+// rs2_val == 17592186044416, imm_val == 168
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x100000000000; immval:0xa8
+TEST_STORE(x1,x3,0,x2,x10,0x100000000000,0xa8,168,c.sdsp,0)
+
+inst_49:
+// rs2_val == 35184372088832,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x200000000000; immval:0x68
+TEST_STORE(x1,x3,0,x2,x10,0x200000000000,0x68,176,c.sdsp,0)
+
+inst_50:
+// rs2_val == 70368744177664,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x400000000000; immval:0x28
+TEST_STORE(x1,x3,0,x2,x10,0x400000000000,0x28,184,c.sdsp,0)
+
+inst_51:
+// rs2_val == 140737488355328,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x800000000000; immval:0x48
+TEST_STORE(x1,x3,0,x2,x10,0x800000000000,0x48,192,c.sdsp,0)
+
+inst_52:
+// rs2_val == 281474976710656,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x1000000000000; immval:0x150
+TEST_STORE(x1,x3,0,x2,x10,0x1000000000000,0x150,200,c.sdsp,0)
+
+inst_53:
+// rs2_val == 562949953421312, imm_val == 8
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x2000000000000; immval:0x8
+TEST_STORE(x1,x3,0,x2,x10,0x2000000000000,0x8,208,c.sdsp,0)
+
+inst_54:
+// rs2_val == 1125899906842624,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x4000000000000; immval:0x18
+TEST_STORE(x1,x3,0,x2,x10,0x4000000000000,0x18,216,c.sdsp,0)
+
+inst_55:
+// rs2_val == 2251799813685248,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x8000000000000; immval:0x28
+TEST_STORE(x1,x3,0,x2,x10,0x8000000000000,0x28,224,c.sdsp,0)
+
+inst_56:
+// rs2_val == 4503599627370496,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x10000000000000; immval:0x150
+TEST_STORE(x1,x3,0,x2,x10,0x10000000000000,0x150,232,c.sdsp,0)
+
+inst_57:
+// rs2_val == 9007199254740992,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x20000000000000; immval:0x20
+TEST_STORE(x1,x3,0,x2,x10,0x20000000000000,0x20,240,c.sdsp,0)
+
+inst_58:
+// rs2_val == 18014398509481984,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x40000000000000; immval:0x88
+TEST_STORE(x1,x3,0,x2,x10,0x40000000000000,0x88,248,c.sdsp,0)
+
+inst_59:
+// rs2_val == 36028797018963968,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x80000000000000; immval:0x20
+TEST_STORE(x1,x3,0,x2,x10,0x80000000000000,0x20,256,c.sdsp,0)
+
+inst_60:
+// rs2_val == 72057594037927936,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x100000000000000; immval:0x68
+TEST_STORE(x1,x3,0,x2,x10,0x100000000000000,0x68,264,c.sdsp,0)
+
+inst_61:
+// rs2_val == 144115188075855872,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x200000000000000; immval:0x10
+TEST_STORE(x1,x3,0,x2,x10,0x200000000000000,0x10,272,c.sdsp,0)
+
+inst_62:
+// rs2_val == 288230376151711744,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x400000000000000; immval:0x90
+TEST_STORE(x1,x3,0,x2,x10,0x400000000000000,0x90,280,c.sdsp,0)
+
+inst_63:
+// rs2_val == 576460752303423488,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x800000000000000; immval:0x90
+TEST_STORE(x1,x3,0,x2,x10,0x800000000000000,0x90,288,c.sdsp,0)
+
+inst_64:
+// rs2_val == 1152921504606846976,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x1000000000000000; immval:0x68
+TEST_STORE(x1,x3,0,x2,x10,0x1000000000000000,0x68,296,c.sdsp,0)
+
+inst_65:
+// rs2_val == 2305843009213693952,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x2000000000000000; immval:0x98
+TEST_STORE(x1,x3,0,x2,x10,0x2000000000000000,0x98,304,c.sdsp,0)
+
+inst_66:
+// rs2_val == 4611686018427387904,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x4000000000000000; immval:0x150
+TEST_STORE(x1,x3,0,x2,x10,0x4000000000000000,0x150,312,c.sdsp,0)
+
+inst_67:
+// rs2_val == -2,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x2; immval:0x10
+TEST_STORE(x1,x3,0,x2,x10,-0x2,0x10,320,c.sdsp,0)
+
+inst_68:
+// rs2_val == -3, imm_val == 440
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x3; immval:0x1b8
+TEST_STORE(x1,x3,0,x2,x10,-0x3,0x1b8,328,c.sdsp,0)
+
+inst_69:
+// rs2_val == -5,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x5; immval:0x1e8
+TEST_STORE(x1,x3,0,x2,x10,-0x5,0x1e8,336,c.sdsp,0)
+
+inst_70:
+// rs2_val == -576460752303423489,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x800000000000001; immval:0x38
+TEST_STORE(x1,x3,0,x2,x10,-0x800000000000001,0x38,344,c.sdsp,0)
+
+inst_71:
+// rs2_val == -1152921504606846977,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x1000000000000001; immval:0x28
+TEST_STORE(x1,x3,0,x2,x10,-0x1000000000000001,0x28,352,c.sdsp,0)
+
+inst_72:
+// rs2_val == -2305843009213693953,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x2000000000000001; immval:0x1e8
+TEST_STORE(x1,x3,0,x2,x10,-0x2000000000000001,0x1e8,360,c.sdsp,0)
+
+inst_73:
+// rs2_val == -4611686018427387905,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x4000000000000001; immval:0x150
+TEST_STORE(x1,x3,0,x2,x10,-0x4000000000000001,0x150,368,c.sdsp,0)
+
+inst_74:
+// rs2_val == 6148914691236517205,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:0x5555555555555555; immval:0x8
+TEST_STORE(x1,x3,0,x2,x10,0x5555555555555555,0x8,376,c.sdsp,0)
+
+inst_75:
+// rs2_val == -6148914691236517206,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x5555555555555556; immval:0x88
+TEST_STORE(x1,x3,0,x2,x10,-0x5555555555555556,0x88,384,c.sdsp,0)
+
+inst_76:
+// imm_val == 64, rs2_val == -65
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x41; immval:0x40
+TEST_STORE(x1,x3,0,x2,x10,-0x41,0x40,392,c.sdsp,0)
+
+inst_77:
+// rs2_val == -9,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x9; immval:0xf8
+TEST_STORE(x1,x3,0,x2,x10,-0x9,0xf8,400,c.sdsp,0)
+
+inst_78:
+// rs2_val == -17,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x11; immval:0x48
+TEST_STORE(x1,x3,0,x2,x10,-0x11,0x48,408,c.sdsp,0)
+
+inst_79:
+// rs2_val == -129,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x81; immval:0xa8
+TEST_STORE(x1,x3,0,x2,x10,-0x81,0xa8,416,c.sdsp,0)
+
+inst_80:
+// rs2_val == -257,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x101; immval:0x1b8
+TEST_STORE(x1,x3,0,x2,x10,-0x101,0x1b8,424,c.sdsp,0)
+
+inst_81:
+// rs2_val == -513,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x201; immval:0x50
+TEST_STORE(x1,x3,0,x2,x10,-0x201,0x50,432,c.sdsp,0)
+
+inst_82:
+// rs2_val == -1025,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x401; immval:0x1f8
+TEST_STORE(x1,x3,0,x2,x10,-0x401,0x1f8,440,c.sdsp,0)
+
+inst_83:
+// rs2_val == -2049,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x801; immval:0x70
+TEST_STORE(x1,x3,0,x2,x10,-0x801,0x70,448,c.sdsp,0)
+
+inst_84:
+// rs2_val == -4097,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x1001; immval:0x1f0
+TEST_STORE(x1,x3,0,x2,x10,-0x1001,0x1f0,456,c.sdsp,0)
+
+inst_85:
+// rs2_val == -8193,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x2001; immval:0x18
+TEST_STORE(x1,x3,0,x2,x10,-0x2001,0x18,464,c.sdsp,0)
+
+inst_86:
+// rs2_val == -16385,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x4001; immval:0x58
+TEST_STORE(x1,x3,0,x2,x10,-0x4001,0x58,472,c.sdsp,0)
+
+inst_87:
+// rs2_val == -32769,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x8001; immval:0x150
+TEST_STORE(x1,x3,0,x2,x10,-0x8001,0x150,480,c.sdsp,0)
+
+inst_88:
+// rs2_val == -65537,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x10001; immval:0x18
+TEST_STORE(x1,x3,0,x2,x10,-0x10001,0x18,488,c.sdsp,0)
+
+inst_89:
+// rs2_val == -131073,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x20001; immval:0x178
+TEST_STORE(x1,x3,0,x2,x10,-0x20001,0x178,496,c.sdsp,0)
+
+inst_90:
+// rs2_val == -262145,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x40001; immval:0x1f0
+TEST_STORE(x1,x3,0,x2,x10,-0x40001,0x1f0,504,c.sdsp,0)
+
+inst_91:
+// rs2_val == -524289,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x80001; immval:0x0
+TEST_STORE(x1,x3,0,x2,x10,-0x80001,0x0,512,c.sdsp,0)
+
+inst_92:
+// rs2_val == -1048577,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x100001; immval:0x60
+TEST_STORE(x1,x3,0,x2,x10,-0x100001,0x60,520,c.sdsp,0)
+
+inst_93:
+// rs2_val == -2097153,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x200001; immval:0x60
+TEST_STORE(x1,x3,0,x2,x10,-0x200001,0x60,528,c.sdsp,0)
+
+inst_94:
+// rs2_val == -4194305,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x400001; immval:0x10
+TEST_STORE(x1,x3,0,x2,x10,-0x400001,0x10,536,c.sdsp,0)
+
+inst_95:
+// rs2_val == -8388609,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x800001; immval:0x1b8
+TEST_STORE(x1,x3,0,x2,x10,-0x800001,0x1b8,544,c.sdsp,0)
+
+inst_96:
+// rs2_val == -16777217,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x1000001; immval:0x98
+TEST_STORE(x1,x3,0,x2,x10,-0x1000001,0x98,552,c.sdsp,0)
+
+inst_97:
+// rs2_val == -33554433,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x2000001; immval:0x98
+TEST_STORE(x1,x3,0,x2,x10,-0x2000001,0x98,560,c.sdsp,0)
+
+inst_98:
+// rs2_val == -67108865,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x4000001; immval:0xf8
+TEST_STORE(x1,x3,0,x2,x10,-0x4000001,0xf8,568,c.sdsp,0)
+
+inst_99:
+// rs2_val == -134217729,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x8000001; immval:0x0
+TEST_STORE(x1,x3,0,x2,x10,-0x8000001,0x0,576,c.sdsp,0)
+
+inst_100:
+// rs2_val == -268435457,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x10000001; immval:0x150
+TEST_STORE(x1,x3,0,x2,x10,-0x10000001,0x150,584,c.sdsp,0)
+
+inst_101:
+// rs2_val == -536870913,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x20000001; immval:0x10
+TEST_STORE(x1,x3,0,x2,x10,-0x20000001,0x10,592,c.sdsp,0)
+
+inst_102:
+// rs2_val == -1073741825,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x40000001; immval:0x150
+TEST_STORE(x1,x3,0,x2,x10,-0x40000001,0x150,600,c.sdsp,0)
+
+inst_103:
+// rs2_val == -2147483649,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x80000001; immval:0x28
+TEST_STORE(x1,x3,0,x2,x10,-0x80000001,0x28,608,c.sdsp,0)
+
+inst_104:
+// rs2_val == -4294967297,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x100000001; immval:0x10
+TEST_STORE(x1,x3,0,x2,x10,-0x100000001,0x10,616,c.sdsp,0)
+
+inst_105:
+// rs2_val == -8589934593,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x200000001; immval:0x58
+TEST_STORE(x1,x3,0,x2,x10,-0x200000001,0x58,624,c.sdsp,0)
+
+inst_106:
+// rs2_val == -17179869185,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x400000001; immval:0x178
+TEST_STORE(x1,x3,0,x2,x10,-0x400000001,0x178,632,c.sdsp,0)
+
+inst_107:
+// rs2_val == -34359738369,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x800000001; immval:0x1e8
+TEST_STORE(x1,x3,0,x2,x10,-0x800000001,0x1e8,640,c.sdsp,0)
+
+inst_108:
+// rs2_val == -68719476737,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x1000000001; immval:0x20
+TEST_STORE(x1,x3,0,x2,x10,-0x1000000001,0x20,648,c.sdsp,0)
+
+inst_109:
+// rs2_val == -137438953473,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x2000000001; immval:0x38
+TEST_STORE(x1,x3,0,x2,x10,-0x2000000001,0x38,656,c.sdsp,0)
+
+inst_110:
+// rs2_val == -274877906945,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x4000000001; immval:0x90
+TEST_STORE(x1,x3,0,x2,x10,-0x4000000001,0x90,664,c.sdsp,0)
+
+inst_111:
+// rs2_val == -549755813889,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x8000000001; immval:0x78
+TEST_STORE(x1,x3,0,x2,x10,-0x8000000001,0x78,672,c.sdsp,0)
+
+inst_112:
+// rs2_val == -1099511627777,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x10000000001; immval:0x40
+TEST_STORE(x1,x3,0,x2,x10,-0x10000000001,0x40,680,c.sdsp,0)
+
+inst_113:
+// rs2_val == -2199023255553,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x20000000001; immval:0x0
+TEST_STORE(x1,x3,0,x2,x10,-0x20000000001,0x0,688,c.sdsp,0)
+
+inst_114:
+// rs2_val == -4398046511105,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x40000000001; immval:0x8
+TEST_STORE(x1,x3,0,x2,x10,-0x40000000001,0x8,696,c.sdsp,0)
+
+inst_115:
+// rs2_val == -8796093022209,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x80000000001; immval:0x88
+TEST_STORE(x1,x3,0,x2,x10,-0x80000000001,0x88,704,c.sdsp,0)
+
+inst_116:
+// rs2_val == -17592186044417,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x100000000001; immval:0x60
+TEST_STORE(x1,x3,0,x2,x10,-0x100000000001,0x60,712,c.sdsp,0)
+
+inst_117:
+// rs2_val == -35184372088833,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x200000000001; immval:0x68
+TEST_STORE(x1,x3,0,x2,x10,-0x200000000001,0x68,720,c.sdsp,0)
+
+inst_118:
+// rs2_val == -70368744177665,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x400000000001; immval:0x10
+TEST_STORE(x1,x3,0,x2,x10,-0x400000000001,0x10,728,c.sdsp,0)
+
+inst_119:
+// rs2_val == -140737488355329,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x800000000001; immval:0x1e8
+TEST_STORE(x1,x3,0,x2,x10,-0x800000000001,0x1e8,736,c.sdsp,0)
+
+inst_120:
+// rs2_val == -281474976710657,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x1000000000001; immval:0x20
+TEST_STORE(x1,x3,0,x2,x10,-0x1000000000001,0x20,744,c.sdsp,0)
+
+inst_121:
+// rs2_val == -562949953421313,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x2000000000001; immval:0x100
+TEST_STORE(x1,x3,0,x2,x10,-0x2000000000001,0x100,752,c.sdsp,0)
+
+inst_122:
+// rs2_val == -1125899906842625,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x4000000000001; immval:0x100
+TEST_STORE(x1,x3,0,x2,x10,-0x4000000000001,0x100,760,c.sdsp,0)
+
+inst_123:
+// rs2_val == -2251799813685249,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x8000000000001; immval:0xf8
+TEST_STORE(x1,x3,0,x2,x10,-0x8000000000001,0xf8,768,c.sdsp,0)
+
+inst_124:
+// rs2_val == -4503599627370497,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x10000000000001; immval:0xa8
+TEST_STORE(x1,x3,0,x2,x10,-0x10000000000001,0xa8,776,c.sdsp,0)
+
+inst_125:
+// rs2_val == -9007199254740993,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x20000000000001; immval:0x178
+TEST_STORE(x1,x3,0,x2,x10,-0x20000000000001,0x178,784,c.sdsp,0)
+
+inst_126:
+// rs2_val == -18014398509481985,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x40000000000001; immval:0x150
+TEST_STORE(x1,x3,0,x2,x10,-0x40000000000001,0x150,792,c.sdsp,0)
+
+inst_127:
+// rs2_val == -36028797018963969,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x80000000000001; immval:0x30
+TEST_STORE(x1,x3,0,x2,x10,-0x80000000000001,0x30,800,c.sdsp,0)
+
+inst_128:
+// rs2_val == -72057594037927937,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x100000000000001; immval:0x18
+TEST_STORE(x1,x3,0,x2,x10,-0x100000000000001,0x18,808,c.sdsp,0)
+
+inst_129:
+// rs2_val == -144115188075855873,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x200000000000001; immval:0x88
+TEST_STORE(x1,x3,0,x2,x10,-0x200000000000001,0x88,816,c.sdsp,0)
+
+inst_130:
+// rs2_val == -288230376151711745,
+// opcode:c.sdsp; op1:x2; op2:x10; op2val:-0x400000000000001; immval:0x70
+TEST_STORE(x1,x3,0,x2,x10,-0x400000000000001,0x70,824,c.sdsp,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x9_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x9_1:
+ .fill 27*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 104*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cslli-01.S b/riscof/suite/rv64i_m/C/cslli-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..d714c89c44e6187d43434b17b8ed765ff47e38d7
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cslli-01.S
@@ -0,0 +1,809 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.slli instruction of the RISC-V C extension for the cslli covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cslli)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rd==x15, rs1_val < 0 and imm_val < xlen, rs1_val == -2199023255553
+// opcode:c.slli; op1:x15; dest:x15 op1val:-0x20000000001; immval:0x11
+TEST_CI_OP( c.slli, x15, 0xfbfffffffffe0000, -0x20000000001, 0x11, x1, 0, x2)
+
+inst_1:
+// rd==x10, rs1_val > 0 and imm_val < xlen, imm_val == 8, rs1_val==3037000500
+// opcode:c.slli; op1:x10; dest:x10 op1val:0xb504f334; immval:0x8
+TEST_CI_OP( c.slli, x10, 0xb504f33400, 0xb504f334, 0x8, x1, 8, x2)
+
+inst_2:
+// rd==x14, rs1_val == imm_val and imm_val != 0 and imm_val < xlen, rs1_val == 8
+// opcode:c.slli; op1:x14; dest:x14 op1val:0x8; immval:0x8
+TEST_CI_OP( c.slli, x14, 0x800, 0x8, 0x8, x1, 16, x2)
+
+inst_3:
+// rd==x9, rs1_val == (-2**(xlen-1)) and imm_val != 0 and imm_val < xlen, rs1_val == -9223372036854775808, imm_val == 1
+// opcode:c.slli; op1:x9; dest:x9 op1val:-0x8000000000000000; immval:0x1
+TEST_CI_OP( c.slli, x9, 0x0, -0x8000000000000000, 0x1, x1, 24, x2)
+
+inst_4:
+// rd==x8, rs1_val == 0 and imm_val != 0 and imm_val < xlen, rs1_val==0
+// opcode:c.slli; op1:x8; dest:x8 op1val:0x0; immval:0x11
+TEST_CI_OP( c.slli, x8, 0x0, 0x0, 0x11, x1, 32, x2)
+
+inst_5:
+// rd==x11, rs1_val == (2**(xlen-1)-1) and imm_val != 0 and imm_val < xlen, imm_val == 32, rs1_val == 9223372036854775807
+// opcode:c.slli; op1:x11; dest:x11 op1val:0x7fffffffffffffff; immval:0x20
+TEST_CI_OP( c.slli, x11, 0xffffffff00000000, 0x7fffffffffffffff, 0x20, x1, 40, x2)
+
+inst_6:
+// rd==x13, rs1_val == 1 and imm_val != 0 and imm_val < xlen, rs1_val == 1
+// opcode:c.slli; op1:x13; dest:x13 op1val:0x1; immval:0xc
+TEST_CI_OP( c.slli, x13, 0x1000, 0x1, 0xc, x1, 48, x2)
+
+inst_7:
+// rd==x12, rs1_val == 2, imm_val == 55, rs1_val==2
+// opcode:c.slli; op1:x12; dest:x12 op1val:0x2; immval:0x37
+TEST_CI_OP( c.slli, x12, 0x100000000000000, 0x2, 0x37, x1, 56, x2)
+
+inst_8:
+// rs1_val == 4, imm_val == 31, rs1_val==4
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x4; immval:0x1f
+TEST_CI_OP( c.slli, x10, 0x200000000, 0x4, 0x1f, x1, 64, x2)
+
+inst_9:
+// rs1_val == 16,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x10; immval:0x5
+TEST_CI_OP( c.slli, x10, 0x200, 0x10, 0x5, x1, 72, x2)
+
+inst_10:
+// rs1_val == 32,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x20; immval:0xa
+TEST_CI_OP( c.slli, x10, 0x8000, 0x20, 0xa, x1, 80, x2)
+
+inst_11:
+// rs1_val == 64,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x40; immval:0x3
+TEST_CI_OP( c.slli, x10, 0x200, 0x40, 0x3, x1, 88, x2)
+
+inst_12:
+// rs1_val == 128,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x80; immval:0x6
+TEST_CI_OP( c.slli, x10, 0x2000, 0x80, 0x6, x1, 96, x2)
+
+inst_13:
+// rs1_val == 256,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x100; immval:0x8
+TEST_CI_OP( c.slli, x10, 0x10000, 0x100, 0x8, x1, 104, x2)
+
+inst_14:
+// rs1_val == 512, imm_val == 61
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x200; immval:0x3d
+TEST_CI_OP( c.slli, x10, 0x0, 0x200, 0x3d, x1, 112, x2)
+
+inst_15:
+// rs1_val == 1024,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x400; immval:0x9
+TEST_CI_OP( c.slli, x10, 0x80000, 0x400, 0x9, x1, 120, x2)
+
+inst_16:
+// rs1_val == 2048,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x800; immval:0x13
+TEST_CI_OP( c.slli, x10, 0x40000000, 0x800, 0x13, x1, 128, x2)
+
+inst_17:
+// rs1_val == 4096, imm_val == 62
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x1000; immval:0x3e
+TEST_CI_OP( c.slli, x10, 0x0, 0x1000, 0x3e, x1, 136, x2)
+
+inst_18:
+// rs1_val == 8192,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x2000; immval:0x13
+TEST_CI_OP( c.slli, x10, 0x100000000, 0x2000, 0x13, x1, 144, x2)
+
+inst_19:
+// rs1_val == 16384,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x4000; immval:0xf
+TEST_CI_OP( c.slli, x10, 0x20000000, 0x4000, 0xf, x1, 152, x2)
+
+inst_20:
+// rs1_val == 32768,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x8000; immval:0x11
+TEST_CI_OP( c.slli, x10, 0x100000000, 0x8000, 0x11, x1, 160, x2)
+
+inst_21:
+// rs1_val == 65536,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x10000; immval:0x3f
+TEST_CI_OP( c.slli, x10, 0x0, 0x10000, 0x3f, x1, 168, x2)
+
+inst_22:
+// rs1_val == 131072,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x20000; immval:0xe
+TEST_CI_OP( c.slli, x10, 0x80000000, 0x20000, 0xe, x1, 176, x2)
+
+inst_23:
+// rs1_val == 262144,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x40000; immval:0x9
+TEST_CI_OP( c.slli, x10, 0x8000000, 0x40000, 0x9, x1, 184, x2)
+
+inst_24:
+// rs1_val == 524288,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x80000; immval:0xe
+TEST_CI_OP( c.slli, x10, 0x200000000, 0x80000, 0xe, x1, 192, x2)
+
+inst_25:
+// rs1_val == 1048576,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x100000; immval:0x20
+TEST_CI_OP( c.slli, x10, 0x10000000000000, 0x100000, 0x20, x1, 200, x2)
+
+inst_26:
+// rs1_val == 2097152,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x200000; immval:0x20
+TEST_CI_OP( c.slli, x10, 0x20000000000000, 0x200000, 0x20, x1, 208, x2)
+
+inst_27:
+// rs1_val == 4194304,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x400000; immval:0xf
+TEST_CI_OP( c.slli, x10, 0x2000000000, 0x400000, 0xf, x1, 216, x2)
+
+inst_28:
+// rs1_val == 8388608,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x800000; immval:0xb
+TEST_CI_OP( c.slli, x10, 0x400000000, 0x800000, 0xb, x1, 224, x2)
+
+inst_29:
+// rs1_val == 16777216,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x1000000; immval:0x1
+TEST_CI_OP( c.slli, x10, 0x2000000, 0x1000000, 0x1, x1, 232, x2)
+
+inst_30:
+// rs1_val == 33554432,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x2000000; immval:0x3d
+TEST_CI_OP( c.slli, x10, 0x0, 0x2000000, 0x3d, x1, 240, x2)
+
+inst_31:
+// rs1_val == 67108864,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x4000000; immval:0xa
+TEST_CI_OP( c.slli, x10, 0x1000000000, 0x4000000, 0xa, x1, 248, x2)
+
+inst_32:
+// rs1_val == 134217728, imm_val == 21
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x8000000; immval:0x15
+TEST_CI_OP( c.slli, x10, 0x1000000000000, 0x8000000, 0x15, x1, 256, x2)
+
+inst_33:
+// rs1_val == 268435456,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x10000000; immval:0x9
+TEST_CI_OP( c.slli, x10, 0x2000000000, 0x10000000, 0x9, x1, 264, x2)
+
+inst_34:
+// rs1_val == 536870912,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x20000000; immval:0xb
+TEST_CI_OP( c.slli, x10, 0x10000000000, 0x20000000, 0xb, x1, 272, x2)
+
+inst_35:
+// rs1_val == 1073741824,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x40000000; immval:0x13
+TEST_CI_OP( c.slli, x10, 0x2000000000000, 0x40000000, 0x13, x1, 280, x2)
+
+inst_36:
+// rs1_val == 2147483648, imm_val == 42
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x80000000; immval:0x2a
+TEST_CI_OP( c.slli, x10, 0x0, 0x80000000, 0x2a, x1, 288, x2)
+
+inst_37:
+// rs1_val == 4294967296,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x100000000; immval:0x2a
+TEST_CI_OP( c.slli, x10, 0x0, 0x100000000, 0x2a, x1, 296, x2)
+
+inst_38:
+// rs1_val == 8589934592,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x200000000; immval:0x6
+TEST_CI_OP( c.slli, x10, 0x8000000000, 0x200000000, 0x6, x1, 304, x2)
+
+inst_39:
+// rs1_val == 17179869184, imm_val == 4
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x400000000; immval:0x4
+TEST_CI_OP( c.slli, x10, 0x4000000000, 0x400000000, 0x4, x1, 312, x2)
+
+inst_40:
+// rs1_val == 34359738368,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x800000000; immval:0xb
+TEST_CI_OP( c.slli, x10, 0x400000000000, 0x800000000, 0xb, x1, 320, x2)
+
+inst_41:
+// rs1_val == 68719476736,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x1000000000; immval:0x6
+TEST_CI_OP( c.slli, x10, 0x40000000000, 0x1000000000, 0x6, x1, 328, x2)
+
+inst_42:
+// rs1_val == 137438953472, imm_val == 47
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x2000000000; immval:0x2f
+TEST_CI_OP( c.slli, x10, 0x0, 0x2000000000, 0x2f, x1, 336, x2)
+
+inst_43:
+// rs1_val == 274877906944,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x4000000000; immval:0x4
+TEST_CI_OP( c.slli, x10, 0x40000000000, 0x4000000000, 0x4, x1, 344, x2)
+
+inst_44:
+// rs1_val == 549755813888, imm_val == 59
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x8000000000; immval:0x3b
+TEST_CI_OP( c.slli, x10, 0x0, 0x8000000000, 0x3b, x1, 352, x2)
+
+inst_45:
+// rs1_val == 1099511627776,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x10000000000; immval:0xc
+TEST_CI_OP( c.slli, x10, 0x10000000000000, 0x10000000000, 0xc, x1, 360, x2)
+
+inst_46:
+// rs1_val == 2199023255552,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x20000000000; immval:0x3e
+TEST_CI_OP( c.slli, x10, 0x0, 0x20000000000, 0x3e, x1, 368, x2)
+
+inst_47:
+// rs1_val == 4398046511104,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x40000000000; immval:0x7
+TEST_CI_OP( c.slli, x10, 0x2000000000000, 0x40000000000, 0x7, x1, 376, x2)
+
+inst_48:
+// rs1_val == 8796093022208,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x80000000000; immval:0x7
+TEST_CI_OP( c.slli, x10, 0x4000000000000, 0x80000000000, 0x7, x1, 384, x2)
+
+inst_49:
+// rs1_val == 17592186044416,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x100000000000; immval:0x20
+TEST_CI_OP( c.slli, x10, 0x0, 0x100000000000, 0x20, x1, 392, x2)
+
+inst_50:
+// rs1_val == 35184372088832,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x200000000000; immval:0x15
+TEST_CI_OP( c.slli, x10, 0x0, 0x200000000000, 0x15, x1, 400, x2)
+
+inst_51:
+// rs1_val == 70368744177664,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x400000000000; immval:0x3d
+TEST_CI_OP( c.slli, x10, 0x0, 0x400000000000, 0x3d, x1, 408, x2)
+
+inst_52:
+// rs1_val == 140737488355328,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x800000000000; immval:0x2f
+TEST_CI_OP( c.slli, x10, 0x0, 0x800000000000, 0x2f, x1, 416, x2)
+
+inst_53:
+// rs1_val == 281474976710656,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x1000000000000; immval:0xf
+TEST_CI_OP( c.slli, x10, 0x8000000000000000, 0x1000000000000, 0xf, x1, 424, x2)
+
+inst_54:
+// rs1_val == 562949953421312,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x2000000000000; immval:0x3e
+TEST_CI_OP( c.slli, x10, 0x0, 0x2000000000000, 0x3e, x1, 432, x2)
+
+inst_55:
+// rs1_val == 1125899906842624,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x4000000000000; immval:0x9
+TEST_CI_OP( c.slli, x10, 0x800000000000000, 0x4000000000000, 0x9, x1, 440, x2)
+
+inst_56:
+// rs1_val == 2251799813685248,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x8000000000000; immval:0xd
+TEST_CI_OP( c.slli, x10, 0x0, 0x8000000000000, 0xd, x1, 448, x2)
+
+inst_57:
+// rs1_val == 4503599627370496,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x10000000000000; immval:0x1f
+TEST_CI_OP( c.slli, x10, 0x0, 0x10000000000000, 0x1f, x1, 456, x2)
+
+inst_58:
+// rs1_val == 9007199254740992,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x20000000000000; immval:0x1
+TEST_CI_OP( c.slli, x10, 0x40000000000000, 0x20000000000000, 0x1, x1, 464, x2)
+
+inst_59:
+// rs1_val == 18014398509481984,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x40000000000000; immval:0xf
+TEST_CI_OP( c.slli, x10, 0x0, 0x40000000000000, 0xf, x1, 472, x2)
+
+inst_60:
+// rs1_val == 36028797018963968,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x80000000000000; immval:0x3f
+TEST_CI_OP( c.slli, x10, 0x0, 0x80000000000000, 0x3f, x1, 480, x2)
+
+inst_61:
+// rs1_val == 72057594037927936,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x100000000000000; immval:0xe
+TEST_CI_OP( c.slli, x10, 0x0, 0x100000000000000, 0xe, x1, 488, x2)
+
+inst_62:
+// rs1_val == 144115188075855872,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x200000000000000; immval:0x37
+TEST_CI_OP( c.slli, x10, 0x0, 0x200000000000000, 0x37, x1, 496, x2)
+
+inst_63:
+// rs1_val == 288230376151711744,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x400000000000000; immval:0x3b
+TEST_CI_OP( c.slli, x10, 0x0, 0x400000000000000, 0x3b, x1, 504, x2)
+
+inst_64:
+// rs1_val == 576460752303423488,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x800000000000000; immval:0x2a
+TEST_CI_OP( c.slli, x10, 0x0, 0x800000000000000, 0x2a, x1, 512, x2)
+
+inst_65:
+// rs1_val == 1152921504606846976,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x1000000000000000; immval:0xf
+TEST_CI_OP( c.slli, x10, 0x0, 0x1000000000000000, 0xf, x1, 520, x2)
+
+inst_66:
+// rs1_val == 2305843009213693952,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x2000000000000000; immval:0x9
+TEST_CI_OP( c.slli, x10, 0x0, 0x2000000000000000, 0x9, x1, 528, x2)
+
+inst_67:
+// rs1_val == 4611686018427387904,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x4000000000000000; immval:0x2f
+TEST_CI_OP( c.slli, x10, 0x0, 0x4000000000000000, 0x2f, x1, 536, x2)
+
+inst_68:
+// rs1_val == -2,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x2; immval:0x9
+TEST_CI_OP( c.slli, x10, 0xfffffffffffffc00, -0x2, 0x9, x1, 544, x2)
+
+inst_69:
+// rs1_val == -3,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x3; immval:0x9
+TEST_CI_OP( c.slli, x10, 0xfffffffffffffa00, -0x3, 0x9, x1, 552, x2)
+
+inst_70:
+// rs1_val == -5,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x5; immval:0xd
+TEST_CI_OP( c.slli, x10, 0xffffffffffff6000, -0x5, 0xd, x1, 560, x2)
+
+inst_71:
+// rs1_val == -9,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x9; immval:0x5
+TEST_CI_OP( c.slli, x10, 0xfffffffffffffee0, -0x9, 0x5, x1, 568, x2)
+
+inst_72:
+// rs1_val == -17,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x11; immval:0x3
+TEST_CI_OP( c.slli, x10, 0xffffffffffffff78, -0x11, 0x3, x1, 576, x2)
+
+inst_73:
+// rs1_val == -33,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x21; immval:0x11
+TEST_CI_OP( c.slli, x10, 0xffffffffffbe0000, -0x21, 0x11, x1, 584, x2)
+
+inst_74:
+// rs1_val == -65, imm_val == 16
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x41; immval:0x10
+TEST_CI_OP( c.slli, x10, 0xffffffffffbf0000, -0x41, 0x10, x1, 592, x2)
+
+inst_75:
+// rs1_val == -129,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x81; immval:0x12
+TEST_CI_OP( c.slli, x10, 0xfffffffffdfc0000, -0x81, 0x12, x1, 600, x2)
+
+inst_76:
+// rs1_val == -257,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x101; immval:0x5
+TEST_CI_OP( c.slli, x10, 0xffffffffffffdfe0, -0x101, 0x5, x1, 608, x2)
+
+inst_77:
+// rs1_val == -513,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x201; immval:0x1
+TEST_CI_OP( c.slli, x10, 0xfffffffffffffbfe, -0x201, 0x1, x1, 616, x2)
+
+inst_78:
+// rs1_val == -1025,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x401; immval:0x5
+TEST_CI_OP( c.slli, x10, 0xffffffffffff7fe0, -0x401, 0x5, x1, 624, x2)
+
+inst_79:
+// rs1_val == -2049,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x801; immval:0x3f
+TEST_CI_OP( c.slli, x10, 0x8000000000000000, -0x801, 0x3f, x1, 632, x2)
+
+inst_80:
+// rs1_val == -4097,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x1001; immval:0x2a
+TEST_CI_OP( c.slli, x10, 0xffbffc0000000000, -0x1001, 0x2a, x1, 640, x2)
+
+inst_81:
+// rs1_val == -8193,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x2001; immval:0x20
+TEST_CI_OP( c.slli, x10, 0xffffdfff00000000, -0x2001, 0x20, x1, 648, x2)
+
+inst_82:
+// rs1_val == -16385,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x4001; immval:0x11
+TEST_CI_OP( c.slli, x10, 0xffffffff7ffe0000, -0x4001, 0x11, x1, 656, x2)
+
+inst_83:
+// rs1_val == -32769,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x8001; immval:0x6
+TEST_CI_OP( c.slli, x10, 0xffffffffffdfffc0, -0x8001, 0x6, x1, 664, x2)
+
+inst_84:
+// rs1_val == -65537, imm_val == 2
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x10001; immval:0x2
+TEST_CI_OP( c.slli, x10, 0xfffffffffffbfffc, -0x10001, 0x2, x1, 672, x2)
+
+inst_85:
+// rs1_val == -131073,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x20001; immval:0x2a
+TEST_CI_OP( c.slli, x10, 0xf7fffc0000000000, -0x20001, 0x2a, x1, 680, x2)
+
+inst_86:
+// rs1_val == -262145,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x40001; immval:0x7
+TEST_CI_OP( c.slli, x10, 0xfffffffffdffff80, -0x40001, 0x7, x1, 688, x2)
+
+inst_87:
+// rs1_val == -144115188075855873,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x200000000000001; immval:0x4
+TEST_CI_OP( c.slli, x10, 0xdffffffffffffff0, -0x200000000000001, 0x4, x1, 696, x2)
+
+inst_88:
+// rs1_val == -288230376151711745,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x400000000000001; immval:0x5
+TEST_CI_OP( c.slli, x10, 0x7fffffffffffffe0, -0x400000000000001, 0x5, x1, 704, x2)
+
+inst_89:
+// rs1_val == -576460752303423489,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x800000000000001; immval:0x10
+TEST_CI_OP( c.slli, x10, 0xffffffffffff0000, -0x800000000000001, 0x10, x1, 712, x2)
+
+inst_90:
+// rs1_val == -1152921504606846977,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x1000000000000001; immval:0x3d
+TEST_CI_OP( c.slli, x10, 0xe000000000000000, -0x1000000000000001, 0x3d, x1, 720, x2)
+
+inst_91:
+// rs1_val == -2305843009213693953,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x2000000000000001; immval:0x3e
+TEST_CI_OP( c.slli, x10, 0xc000000000000000, -0x2000000000000001, 0x3e, x1, 728, x2)
+
+inst_92:
+// rs1_val == -4611686018427387905,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x4000000000000001; immval:0x3b
+TEST_CI_OP( c.slli, x10, 0xf800000000000000, -0x4000000000000001, 0x3b, x1, 736, x2)
+
+inst_93:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x6
+TEST_CI_OP( c.slli, x10, 0x5555555555555540, 0x5555555555555555, 0x6, x1, 744, x2)
+
+inst_94:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0xd
+TEST_CI_OP( c.slli, x10, 0x5555555555554000, -0x5555555555555556, 0xd, x1, 752, x2)
+
+inst_95:
+// rs1_val==3,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x3; immval:0xf
+TEST_CI_OP( c.slli, x10, 0x18000, 0x3, 0xf, x1, 760, x2)
+
+inst_96:
+// rs1_val==5,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x5; immval:0x1f
+TEST_CI_OP( c.slli, x10, 0x280000000, 0x5, 0x1f, x1, 768, x2)
+
+inst_97:
+// rs1_val==3689348814741910323,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x37
+TEST_CI_OP( c.slli, x10, 0x9980000000000000, 0x3333333333333333, 0x37, x1, 776, x2)
+
+inst_98:
+// rs1_val==7378697629483820646,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x11
+TEST_CI_OP( c.slli, x10, 0xcccccccccccc0000, 0x6666666666666666, 0x11, x1, 784, x2)
+
+inst_99:
+// rs1_val==-3037000499,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x2a
+TEST_CI_OP( c.slli, x10, 0xec33340000000000, -0xb504f333, 0x2a, x1, 792, x2)
+
+inst_100:
+// rs1_val==3037000499,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0xb504f333; immval:0xb
+TEST_CI_OP( c.slli, x10, 0x5a827999800, 0xb504f333, 0xb, x1, 800, x2)
+
+inst_101:
+// rs1_val==6148914691236517204,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x2
+TEST_CI_OP( c.slli, x10, 0x5555555555555550, 0x5555555555555554, 0x2, x1, 808, x2)
+
+inst_102:
+// rs1_val==3689348814741910322,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x11
+TEST_CI_OP( c.slli, x10, 0x6666666666640000, 0x3333333333333332, 0x11, x1, 816, x2)
+
+inst_103:
+// rs1_val==7378697629483820645,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0xe
+TEST_CI_OP( c.slli, x10, 0x9999999999994000, 0x6666666666666665, 0xe, x1, 824, x2)
+
+inst_104:
+// rs1_val==3037000498,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0xb504f332; immval:0x2
+TEST_CI_OP( c.slli, x10, 0x2d413ccc8, 0xb504f332, 0x2, x1, 832, x2)
+
+inst_105:
+// rs1_val==6148914691236517206,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0xf
+TEST_CI_OP( c.slli, x10, 0xaaaaaaaaaaab0000, 0x5555555555555556, 0xf, x1, 840, x2)
+
+inst_106:
+// rs1_val==-6148914691236517205,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x10
+TEST_CI_OP( c.slli, x10, 0xaaaaaaaaaaab0000, -0x5555555555555555, 0x10, x1, 848, x2)
+
+inst_107:
+// rs1_val==6,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x6; immval:0x7
+TEST_CI_OP( c.slli, x10, 0x300, 0x6, 0x7, x1, 856, x2)
+
+inst_108:
+// rs1_val==3689348814741910324,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x2
+TEST_CI_OP( c.slli, x10, 0xccccccccccccccd0, 0x3333333333333334, 0x2, x1, 864, x2)
+
+inst_109:
+// rs1_val==7378697629483820647,
+// opcode:c.slli; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0xe
+TEST_CI_OP( c.slli, x10, 0x999999999999c000, 0x6666666666666667, 0xe, x1, 872, x2)
+
+inst_110:
+// rs1_val==-3037000498,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x3d
+TEST_CI_OP( c.slli, x10, 0xc000000000000000, -0xb504f332, 0x3d, x1, 880, x2)
+
+inst_111:
+// rs1_val == -524289,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x80001; immval:0x12
+TEST_CI_OP( c.slli, x10, 0xffffffdffffc0000, -0x80001, 0x12, x1, 888, x2)
+
+inst_112:
+// rs1_val == -1048577,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x100001; immval:0x4
+TEST_CI_OP( c.slli, x10, 0xfffffffffefffff0, -0x100001, 0x4, x1, 896, x2)
+
+inst_113:
+// rs1_val == -2097153,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x200001; immval:0xd
+TEST_CI_OP( c.slli, x10, 0xfffffffbffffe000, -0x200001, 0xd, x1, 904, x2)
+
+inst_114:
+// rs1_val == -4194305,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x400001; immval:0x12
+TEST_CI_OP( c.slli, x10, 0xfffffefffffc0000, -0x400001, 0x12, x1, 912, x2)
+
+inst_115:
+// rs1_val == -8388609,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x800001; immval:0x4
+TEST_CI_OP( c.slli, x10, 0xfffffffff7fffff0, -0x800001, 0x4, x1, 920, x2)
+
+inst_116:
+// rs1_val == -16777217,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x1000001; immval:0x13
+TEST_CI_OP( c.slli, x10, 0xfffff7fffff80000, -0x1000001, 0x13, x1, 928, x2)
+
+inst_117:
+// rs1_val == -33554433,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x2000001; immval:0x12
+TEST_CI_OP( c.slli, x10, 0xfffff7fffffc0000, -0x2000001, 0x12, x1, 936, x2)
+
+inst_118:
+// rs1_val == -67108865,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x4000001; immval:0xa
+TEST_CI_OP( c.slli, x10, 0xffffffeffffffc00, -0x4000001, 0xa, x1, 944, x2)
+
+inst_119:
+// rs1_val == -134217729,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x8000001; immval:0x10
+TEST_CI_OP( c.slli, x10, 0xfffff7ffffff0000, -0x8000001, 0x10, x1, 952, x2)
+
+inst_120:
+// rs1_val == -268435457,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x10000001; immval:0x2f
+TEST_CI_OP( c.slli, x10, 0xffff800000000000, -0x10000001, 0x2f, x1, 960, x2)
+
+inst_121:
+// rs1_val == -536870913,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x20000001; immval:0x3f
+TEST_CI_OP( c.slli, x10, 0x8000000000000000, -0x20000001, 0x3f, x1, 968, x2)
+
+inst_122:
+// rs1_val == -1073741825,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x40000001; immval:0x9
+TEST_CI_OP( c.slli, x10, 0xffffff7ffffffe00, -0x40000001, 0x9, x1, 976, x2)
+
+inst_123:
+// rs1_val == -2147483649,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x80000001; immval:0x12
+TEST_CI_OP( c.slli, x10, 0xfffdfffffffc0000, -0x80000001, 0x12, x1, 984, x2)
+
+inst_124:
+// rs1_val == -4294967297,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x100000001; immval:0x3d
+TEST_CI_OP( c.slli, x10, 0xe000000000000000, -0x100000001, 0x3d, x1, 992, x2)
+
+inst_125:
+// rs1_val == -8589934593,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x200000001; immval:0x3d
+TEST_CI_OP( c.slli, x10, 0xe000000000000000, -0x200000001, 0x3d, x1, 1000, x2)
+
+inst_126:
+// rs1_val == -17179869185,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x400000001; immval:0x8
+TEST_CI_OP( c.slli, x10, 0xfffffbffffffff00, -0x400000001, 0x8, x1, 1008, x2)
+
+inst_127:
+// rs1_val == -34359738369,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x800000001; immval:0x5
+TEST_CI_OP( c.slli, x10, 0xfffffeffffffffe0, -0x800000001, 0x5, x1, 1016, x2)
+
+inst_128:
+// rs1_val == -68719476737,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x1000000001; immval:0x10
+TEST_CI_OP( c.slli, x10, 0xffefffffffff0000, -0x1000000001, 0x10, x1, 1024, x2)
+
+inst_129:
+// rs1_val == -137438953473,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x2000000001; immval:0x12
+TEST_CI_OP( c.slli, x10, 0xff7ffffffffc0000, -0x2000000001, 0x12, x1, 1032, x2)
+
+inst_130:
+// rs1_val == -274877906945,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x4000000001; immval:0x10
+TEST_CI_OP( c.slli, x10, 0xffbfffffffff0000, -0x4000000001, 0x10, x1, 1040, x2)
+
+inst_131:
+// rs1_val == -549755813889,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x8000000001; immval:0x8
+TEST_CI_OP( c.slli, x10, 0xffff7fffffffff00, -0x8000000001, 0x8, x1, 1048, x2)
+
+inst_132:
+// rs1_val == -1099511627777,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x10000000001; immval:0x37
+TEST_CI_OP( c.slli, x10, 0xff80000000000000, -0x10000000001, 0x37, x1, 1056, x2)
+
+inst_133:
+// rs1_val == -4398046511105,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x40000000001; immval:0xa
+TEST_CI_OP( c.slli, x10, 0xffeffffffffffc00, -0x40000000001, 0xa, x1, 1064, x2)
+
+inst_134:
+// rs1_val == -8796093022209,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x80000000001; immval:0x3d
+TEST_CI_OP( c.slli, x10, 0xe000000000000000, -0x80000000001, 0x3d, x1, 1072, x2)
+
+inst_135:
+// rs1_val == -17592186044417,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x100000000001; immval:0x2
+TEST_CI_OP( c.slli, x10, 0xffffbffffffffffc, -0x100000000001, 0x2, x1, 1080, x2)
+
+inst_136:
+// rs1_val == -35184372088833,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x200000000001; immval:0x37
+TEST_CI_OP( c.slli, x10, 0xff80000000000000, -0x200000000001, 0x37, x1, 1088, x2)
+
+inst_137:
+// rs1_val == -70368744177665,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x400000000001; immval:0x37
+TEST_CI_OP( c.slli, x10, 0xff80000000000000, -0x400000000001, 0x37, x1, 1096, x2)
+
+inst_138:
+// rs1_val == -140737488355329,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x800000000001; immval:0x37
+TEST_CI_OP( c.slli, x10, 0xff80000000000000, -0x800000000001, 0x37, x1, 1104, x2)
+
+inst_139:
+// rs1_val == -281474976710657,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x1000000000001; immval:0x3b
+TEST_CI_OP( c.slli, x10, 0xf800000000000000, -0x1000000000001, 0x3b, x1, 1112, x2)
+
+inst_140:
+// rs1_val == -562949953421313,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x2000000000001; immval:0x1f
+TEST_CI_OP( c.slli, x10, 0xffffffff80000000, -0x2000000000001, 0x1f, x1, 1120, x2)
+
+inst_141:
+// rs1_val == -1125899906842625,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x4000000000001; immval:0x2
+TEST_CI_OP( c.slli, x10, 0xffeffffffffffffc, -0x4000000000001, 0x2, x1, 1128, x2)
+
+inst_142:
+// rs1_val == -2251799813685249,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x8000000000001; immval:0x4
+TEST_CI_OP( c.slli, x10, 0xff7ffffffffffff0, -0x8000000000001, 0x4, x1, 1136, x2)
+
+inst_143:
+// rs1_val == -4503599627370497,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x10000000000001; immval:0xc
+TEST_CI_OP( c.slli, x10, 0xfffffffffffff000, -0x10000000000001, 0xc, x1, 1144, x2)
+
+inst_144:
+// rs1_val == -9007199254740993,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x20000000000001; immval:0x2a
+TEST_CI_OP( c.slli, x10, 0xfffffc0000000000, -0x20000000000001, 0x2a, x1, 1152, x2)
+
+inst_145:
+// rs1_val == -18014398509481985,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x40000000000001; immval:0x3d
+TEST_CI_OP( c.slli, x10, 0xe000000000000000, -0x40000000000001, 0x3d, x1, 1160, x2)
+
+inst_146:
+// rs1_val == -36028797018963969,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x80000000000001; immval:0x37
+TEST_CI_OP( c.slli, x10, 0xff80000000000000, -0x80000000000001, 0x37, x1, 1168, x2)
+
+inst_147:
+// rs1_val == -72057594037927937,
+// opcode:c.slli; op1:x10; dest:x10 op1val:-0x100000000000001; immval:0x3
+TEST_CI_OP( c.slli, x10, 0xf7fffffffffffff8, -0x100000000000001, 0x3, x1, 1176, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 148*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/csrai-01.S b/riscof/suite/rv64i_m/C/csrai-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..7977496692fff7a1796410773a833d17c7e070b2
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/csrai-01.S
@@ -0,0 +1,809 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.srai instruction of the RISC-V C extension for the csrai covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",csrai)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1==x8, rs1_val < 0 and imm_val < xlen, rs1_val == -67108865
+// opcode:c.srai; op1:x8; dest:x8 op1val:-0x4000001; immval:0xc
+TEST_CI_OP( c.srai, x8, 0xffffffffffffbfff, -0x4000001, 0xc, x1, 0, x2)
+
+inst_1:
+// rs1==x12, rs1_val > 0 and imm_val < xlen, rs1_val == 1073741824, imm_val == 59
+// opcode:c.srai; op1:x12; dest:x12 op1val:0x40000000; immval:0x3b
+TEST_CI_OP( c.srai, x12, 0x0, 0x40000000, 0x3b, x1, 8, x2)
+
+inst_2:
+// rs1==x15, rs1_val == imm_val and imm_val != 0 and imm_val < xlen, imm_val == 1, rs1_val == 1 and imm_val != 0 and imm_val < xlen, rs1_val == 1
+// opcode:c.srai; op1:x15; dest:x15 op1val:0x1; immval:0x1
+TEST_CI_OP( c.srai, x15, 0x0, 0x1, 0x1, x1, 16, x2)
+
+inst_3:
+// rs1==x11, rs1_val == (-2**(xlen-1)) and imm_val != 0 and imm_val < xlen, rs1_val == -9223372036854775808
+// opcode:c.srai; op1:x11; dest:x11 op1val:-0x8000000000000000; immval:0xd
+TEST_CI_OP( c.srai, x11, 0xfffc000000000000, -0x8000000000000000, 0xd, x1, 24, x2)
+
+inst_4:
+// rs1==x10, rs1_val == 0 and imm_val != 0 and imm_val < xlen, imm_val == 8, rs1_val==0
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x0; immval:0x8
+TEST_CI_OP( c.srai, x10, 0x0, 0x0, 0x8, x1, 32, x2)
+
+inst_5:
+// rs1==x13, rs1_val == (2**(xlen-1)-1) and imm_val != 0 and imm_val < xlen, imm_val == 32, rs1_val == 9223372036854775807
+// opcode:c.srai; op1:x13; dest:x13 op1val:0x7fffffffffffffff; immval:0x20
+TEST_CI_OP( c.srai, x13, 0x7fffffff, 0x7fffffffffffffff, 0x20, x1, 40, x2)
+
+inst_6:
+// rs1==x14, rs1_val == 2, rs1_val==2, imm_val == 47
+// opcode:c.srai; op1:x14; dest:x14 op1val:0x2; immval:0x2f
+TEST_CI_OP( c.srai, x14, 0x0, 0x2, 0x2f, x1, 48, x2)
+
+inst_7:
+// rs1==x9, rs1_val == 4, rs1_val==4
+// opcode:c.srai; op1:x9; dest:x9 op1val:0x4; immval:0x7
+TEST_CI_OP( c.srai, x9, 0x0, 0x4, 0x7, x1, 56, x2)
+
+inst_8:
+// rs1_val == 8,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x8; immval:0x8
+TEST_CI_OP( c.srai, x10, 0x0, 0x8, 0x8, x1, 64, x2)
+
+inst_9:
+// rs1_val == 16, imm_val == 42
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x10; immval:0x2a
+TEST_CI_OP( c.srai, x10, 0x0, 0x10, 0x2a, x1, 72, x2)
+
+inst_10:
+// rs1_val == 32, imm_val == 62
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x20; immval:0x3e
+TEST_CI_OP( c.srai, x10, 0x0, 0x20, 0x3e, x1, 80, x2)
+
+inst_11:
+// rs1_val == 64, imm_val == 31
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x40; immval:0x1f
+TEST_CI_OP( c.srai, x10, 0x0, 0x40, 0x1f, x1, 88, x2)
+
+inst_12:
+// rs1_val == 128,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x80; immval:0xb
+TEST_CI_OP( c.srai, x10, 0x0, 0x80, 0xb, x1, 96, x2)
+
+inst_13:
+// rs1_val == 256,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x100; immval:0x7
+TEST_CI_OP( c.srai, x10, 0x2, 0x100, 0x7, x1, 104, x2)
+
+inst_14:
+// rs1_val == 512,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x200; immval:0xb
+TEST_CI_OP( c.srai, x10, 0x0, 0x200, 0xb, x1, 112, x2)
+
+inst_15:
+// rs1_val == 1024,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x400; immval:0xd
+TEST_CI_OP( c.srai, x10, 0x0, 0x400, 0xd, x1, 120, x2)
+
+inst_16:
+// rs1_val == 2048, imm_val == 4
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x800; immval:0x4
+TEST_CI_OP( c.srai, x10, 0x80, 0x800, 0x4, x1, 128, x2)
+
+inst_17:
+// rs1_val == 4096, imm_val == 16
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x1000; immval:0x10
+TEST_CI_OP( c.srai, x10, 0x0, 0x1000, 0x10, x1, 136, x2)
+
+inst_18:
+// rs1_val == 8192,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x2000; immval:0xf
+TEST_CI_OP( c.srai, x10, 0x0, 0x2000, 0xf, x1, 144, x2)
+
+inst_19:
+// rs1_val == 16384,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x4000; immval:0xf
+TEST_CI_OP( c.srai, x10, 0x0, 0x4000, 0xf, x1, 152, x2)
+
+inst_20:
+// rs1_val == 32768,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x8000; immval:0x4
+TEST_CI_OP( c.srai, x10, 0x800, 0x8000, 0x4, x1, 160, x2)
+
+inst_21:
+// rs1_val == 65536,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x10000; immval:0x20
+TEST_CI_OP( c.srai, x10, 0x0, 0x10000, 0x20, x1, 168, x2)
+
+inst_22:
+// rs1_val == 131072, imm_val == 21
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x20000; immval:0x15
+TEST_CI_OP( c.srai, x10, 0x0, 0x20000, 0x15, x1, 176, x2)
+
+inst_23:
+// rs1_val == 262144,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x40000; immval:0x5
+TEST_CI_OP( c.srai, x10, 0x2000, 0x40000, 0x5, x1, 184, x2)
+
+inst_24:
+// rs1_val == 524288, imm_val == 2
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x80000; immval:0x2
+TEST_CI_OP( c.srai, x10, 0x20000, 0x80000, 0x2, x1, 192, x2)
+
+inst_25:
+// rs1_val == 1048576,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x100000; immval:0xb
+TEST_CI_OP( c.srai, x10, 0x200, 0x100000, 0xb, x1, 200, x2)
+
+inst_26:
+// rs1_val == 2097152,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x200000; immval:0x10
+TEST_CI_OP( c.srai, x10, 0x20, 0x200000, 0x10, x1, 208, x2)
+
+inst_27:
+// rs1_val == 4194304,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x400000; immval:0x13
+TEST_CI_OP( c.srai, x10, 0x8, 0x400000, 0x13, x1, 216, x2)
+
+inst_28:
+// rs1_val == 8388608,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x800000; immval:0x6
+TEST_CI_OP( c.srai, x10, 0x20000, 0x800000, 0x6, x1, 224, x2)
+
+inst_29:
+// rs1_val == 16777216,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x1000000; immval:0x1f
+TEST_CI_OP( c.srai, x10, 0x0, 0x1000000, 0x1f, x1, 232, x2)
+
+inst_30:
+// rs1_val == 33554432,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x2000000; immval:0x5
+TEST_CI_OP( c.srai, x10, 0x100000, 0x2000000, 0x5, x1, 240, x2)
+
+inst_31:
+// rs1_val == 67108864,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x4000000; immval:0x15
+TEST_CI_OP( c.srai, x10, 0x20, 0x4000000, 0x15, x1, 248, x2)
+
+inst_32:
+// rs1_val == 134217728,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x8000000; immval:0x3
+TEST_CI_OP( c.srai, x10, 0x1000000, 0x8000000, 0x3, x1, 256, x2)
+
+inst_33:
+// rs1_val == 268435456,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x10000000; immval:0xa
+TEST_CI_OP( c.srai, x10, 0x40000, 0x10000000, 0xa, x1, 264, x2)
+
+inst_34:
+// rs1_val == 536870912,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x20000000; immval:0x8
+TEST_CI_OP( c.srai, x10, 0x200000, 0x20000000, 0x8, x1, 272, x2)
+
+inst_35:
+// rs1_val == 2147483648,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x80000000; immval:0xe
+TEST_CI_OP( c.srai, x10, 0x20000, 0x80000000, 0xe, x1, 280, x2)
+
+inst_36:
+// rs1_val == 4294967296,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x100000000; immval:0x2
+TEST_CI_OP( c.srai, x10, 0x40000000, 0x100000000, 0x2, x1, 288, x2)
+
+inst_37:
+// rs1_val == 8589934592,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x200000000; immval:0x3b
+TEST_CI_OP( c.srai, x10, 0x0, 0x200000000, 0x3b, x1, 296, x2)
+
+inst_38:
+// rs1_val == 17179869184,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x400000000; immval:0xc
+TEST_CI_OP( c.srai, x10, 0x400000, 0x400000000, 0xc, x1, 304, x2)
+
+inst_39:
+// rs1_val == 34359738368,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x800000000; immval:0xf
+TEST_CI_OP( c.srai, x10, 0x100000, 0x800000000, 0xf, x1, 312, x2)
+
+inst_40:
+// rs1_val == 68719476736,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x1000000000; immval:0x11
+TEST_CI_OP( c.srai, x10, 0x80000, 0x1000000000, 0x11, x1, 320, x2)
+
+inst_41:
+// rs1_val == 137438953472,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x2000000000; immval:0x10
+TEST_CI_OP( c.srai, x10, 0x200000, 0x2000000000, 0x10, x1, 328, x2)
+
+inst_42:
+// rs1_val == 274877906944,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x4000000000; immval:0x6
+TEST_CI_OP( c.srai, x10, 0x100000000, 0x4000000000, 0x6, x1, 336, x2)
+
+inst_43:
+// rs1_val == 549755813888,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x8000000000; immval:0x8
+TEST_CI_OP( c.srai, x10, 0x80000000, 0x8000000000, 0x8, x1, 344, x2)
+
+inst_44:
+// rs1_val == 1099511627776,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x10000000000; immval:0x15
+TEST_CI_OP( c.srai, x10, 0x80000, 0x10000000000, 0x15, x1, 352, x2)
+
+inst_45:
+// rs1_val == 2199023255552,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x20000000000; immval:0x8
+TEST_CI_OP( c.srai, x10, 0x200000000, 0x20000000000, 0x8, x1, 360, x2)
+
+inst_46:
+// rs1_val == 4398046511104,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x40000000000; immval:0x2
+TEST_CI_OP( c.srai, x10, 0x10000000000, 0x40000000000, 0x2, x1, 368, x2)
+
+inst_47:
+// rs1_val == 8796093022208,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x80000000000; immval:0xe
+TEST_CI_OP( c.srai, x10, 0x20000000, 0x80000000000, 0xe, x1, 376, x2)
+
+inst_48:
+// rs1_val == 17592186044416,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x100000000000; immval:0x1
+TEST_CI_OP( c.srai, x10, 0x80000000000, 0x100000000000, 0x1, x1, 384, x2)
+
+inst_49:
+// rs1_val == 35184372088832,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x200000000000; immval:0x11
+TEST_CI_OP( c.srai, x10, 0x10000000, 0x200000000000, 0x11, x1, 392, x2)
+
+inst_50:
+// rs1_val == 70368744177664,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x400000000000; immval:0x2a
+TEST_CI_OP( c.srai, x10, 0x10, 0x400000000000, 0x2a, x1, 400, x2)
+
+inst_51:
+// rs1_val == 140737488355328,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x800000000000; immval:0x1f
+TEST_CI_OP( c.srai, x10, 0x10000, 0x800000000000, 0x1f, x1, 408, x2)
+
+inst_52:
+// rs1_val == 281474976710656,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x1000000000000; immval:0x3e
+TEST_CI_OP( c.srai, x10, 0x0, 0x1000000000000, 0x3e, x1, 416, x2)
+
+inst_53:
+// rs1_val == 562949953421312,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x2000000000000; immval:0xb
+TEST_CI_OP( c.srai, x10, 0x4000000000, 0x2000000000000, 0xb, x1, 424, x2)
+
+inst_54:
+// rs1_val == 1125899906842624,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x4000000000000; immval:0x1f
+TEST_CI_OP( c.srai, x10, 0x80000, 0x4000000000000, 0x1f, x1, 432, x2)
+
+inst_55:
+// rs1_val == 2251799813685248,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x8000000000000; immval:0x2
+TEST_CI_OP( c.srai, x10, 0x2000000000000, 0x8000000000000, 0x2, x1, 440, x2)
+
+inst_56:
+// rs1_val == 4503599627370496,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x10000000000000; immval:0x12
+TEST_CI_OP( c.srai, x10, 0x400000000, 0x10000000000000, 0x12, x1, 448, x2)
+
+inst_57:
+// rs1_val == 9007199254740992,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x20000000000000; immval:0x3f
+TEST_CI_OP( c.srai, x10, 0x0, 0x20000000000000, 0x3f, x1, 456, x2)
+
+inst_58:
+// rs1_val == 18014398509481984,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x40000000000000; immval:0x3f
+TEST_CI_OP( c.srai, x10, 0x0, 0x40000000000000, 0x3f, x1, 464, x2)
+
+inst_59:
+// rs1_val == 36028797018963968,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x80000000000000; immval:0x12
+TEST_CI_OP( c.srai, x10, 0x2000000000, 0x80000000000000, 0x12, x1, 472, x2)
+
+inst_60:
+// rs1_val == 72057594037927936,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x100000000000000; immval:0x3
+TEST_CI_OP( c.srai, x10, 0x20000000000000, 0x100000000000000, 0x3, x1, 480, x2)
+
+inst_61:
+// rs1_val == 144115188075855872,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x200000000000000; immval:0x1
+TEST_CI_OP( c.srai, x10, 0x100000000000000, 0x200000000000000, 0x1, x1, 488, x2)
+
+inst_62:
+// rs1_val == 288230376151711744,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x400000000000000; immval:0xf
+TEST_CI_OP( c.srai, x10, 0x80000000000, 0x400000000000000, 0xf, x1, 496, x2)
+
+inst_63:
+// rs1_val == 576460752303423488, imm_val == 61
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x800000000000000; immval:0x3d
+TEST_CI_OP( c.srai, x10, 0x0, 0x800000000000000, 0x3d, x1, 504, x2)
+
+inst_64:
+// rs1_val == 1152921504606846976,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x1000000000000000; immval:0x3d
+TEST_CI_OP( c.srai, x10, 0x0, 0x1000000000000000, 0x3d, x1, 512, x2)
+
+inst_65:
+// rs1_val == 2305843009213693952,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x2000000000000000; immval:0x9
+TEST_CI_OP( c.srai, x10, 0x10000000000000, 0x2000000000000000, 0x9, x1, 520, x2)
+
+inst_66:
+// rs1_val == 4611686018427387904,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x4000000000000000; immval:0xc
+TEST_CI_OP( c.srai, x10, 0x4000000000000, 0x4000000000000000, 0xc, x1, 528, x2)
+
+inst_67:
+// rs1_val == -2,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x2; immval:0x10
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x2, 0x10, x1, 536, x2)
+
+inst_68:
+// rs1_val == -3,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x3; immval:0xd
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x3, 0xd, x1, 544, x2)
+
+inst_69:
+// rs1_val == -5,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x5; immval:0x3d
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x5, 0x3d, x1, 552, x2)
+
+inst_70:
+// rs1_val == -9,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x9; immval:0x3f
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x9, 0x3f, x1, 560, x2)
+
+inst_71:
+// rs1_val == -17,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x11; immval:0x5
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x11, 0x5, x1, 568, x2)
+
+inst_72:
+// rs1_val == -33,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x21; immval:0xe
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x21, 0xe, x1, 576, x2)
+
+inst_73:
+// rs1_val == -65,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x41; immval:0x10
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x41, 0x10, x1, 584, x2)
+
+inst_74:
+// rs1_val == -129,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x81; immval:0x7
+TEST_CI_OP( c.srai, x10, 0xfffffffffffffffe, -0x81, 0x7, x1, 592, x2)
+
+inst_75:
+// rs1_val == -257,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x101; immval:0x3b
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x101, 0x3b, x1, 600, x2)
+
+inst_76:
+// rs1_val == -513,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x201; immval:0x9
+TEST_CI_OP( c.srai, x10, 0xfffffffffffffffe, -0x201, 0x9, x1, 608, x2)
+
+inst_77:
+// rs1_val == -1025, imm_val == 55
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x401; immval:0x37
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x401, 0x37, x1, 616, x2)
+
+inst_78:
+// rs1_val == -2049,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x801; immval:0x15
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x801, 0x15, x1, 624, x2)
+
+inst_79:
+// rs1_val == -4097,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x1001; immval:0xb
+TEST_CI_OP( c.srai, x10, 0xfffffffffffffffd, -0x1001, 0xb, x1, 632, x2)
+
+inst_80:
+// rs1_val == -8193,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x2001; immval:0x7
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffbf, -0x2001, 0x7, x1, 640, x2)
+
+inst_81:
+// rs1_val == -16385,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x4001; immval:0x9
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffdf, -0x4001, 0x9, x1, 648, x2)
+
+inst_82:
+// rs1_val == -32769,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x8001; immval:0xf
+TEST_CI_OP( c.srai, x10, 0xfffffffffffffffe, -0x8001, 0xf, x1, 656, x2)
+
+inst_83:
+// rs1_val == -65537,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x10001; immval:0x2f
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x10001, 0x2f, x1, 664, x2)
+
+inst_84:
+// rs1_val == -131073,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x20001; immval:0x3e
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x20001, 0x3e, x1, 672, x2)
+
+inst_85:
+// rs1_val == -262145,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x40001; immval:0x15
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x40001, 0x15, x1, 680, x2)
+
+inst_86:
+// rs1_val == -524289,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x80001; immval:0x3f
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x80001, 0x3f, x1, 688, x2)
+
+inst_87:
+// rs1_val == -144115188075855873,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x200000000000001; immval:0xf
+TEST_CI_OP( c.srai, x10, 0xfffffbffffffffff, -0x200000000000001, 0xf, x1, 696, x2)
+
+inst_88:
+// rs1_val == -288230376151711745,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x400000000000001; immval:0x13
+TEST_CI_OP( c.srai, x10, 0xffffff7fffffffff, -0x400000000000001, 0x13, x1, 704, x2)
+
+inst_89:
+// rs1_val == -576460752303423489,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x800000000000001; immval:0x2
+TEST_CI_OP( c.srai, x10, 0xfdffffffffffffff, -0x800000000000001, 0x2, x1, 712, x2)
+
+inst_90:
+// rs1_val == -1152921504606846977,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x1000000000000001; immval:0x3d
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x1000000000000001, 0x3d, x1, 720, x2)
+
+inst_91:
+// rs1_val == -2305843009213693953,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x2000000000000001; immval:0xc
+TEST_CI_OP( c.srai, x10, 0xfffdffffffffffff, -0x2000000000000001, 0xc, x1, 728, x2)
+
+inst_92:
+// rs1_val == -4611686018427387905,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x4000000000000001; immval:0x8
+TEST_CI_OP( c.srai, x10, 0xffbfffffffffffff, -0x4000000000000001, 0x8, x1, 736, x2)
+
+inst_93:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x37
+TEST_CI_OP( c.srai, x10, 0xaa, 0x5555555555555555, 0x37, x1, 744, x2)
+
+inst_94:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0xa
+TEST_CI_OP( c.srai, x10, 0xffeaaaaaaaaaaaaa, -0x5555555555555556, 0xa, x1, 752, x2)
+
+inst_95:
+// rs1_val==3,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x3; immval:0x2
+TEST_CI_OP( c.srai, x10, 0x0, 0x3, 0x2, x1, 760, x2)
+
+inst_96:
+// rs1_val==5,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x5; immval:0x9
+TEST_CI_OP( c.srai, x10, 0x0, 0x5, 0x9, x1, 768, x2)
+
+inst_97:
+// rs1_val==3689348814741910323,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0x3f
+TEST_CI_OP( c.srai, x10, 0x0, 0x3333333333333333, 0x3f, x1, 776, x2)
+
+inst_98:
+// rs1_val==7378697629483820646,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0x1f
+TEST_CI_OP( c.srai, x10, 0xcccccccc, 0x6666666666666666, 0x1f, x1, 784, x2)
+
+inst_99:
+// rs1_val==-3037000499,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x2a
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0xb504f333, 0x2a, x1, 792, x2)
+
+inst_100:
+// rs1_val==3037000499,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0xb504f333; immval:0x3f
+TEST_CI_OP( c.srai, x10, 0x0, 0xb504f333, 0x3f, x1, 800, x2)
+
+inst_101:
+// rs1_val==6148914691236517204,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0xf
+TEST_CI_OP( c.srai, x10, 0xaaaaaaaaaaaa, 0x5555555555555554, 0xf, x1, 808, x2)
+
+inst_102:
+// rs1_val==3689348814741910322,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0xf
+TEST_CI_OP( c.srai, x10, 0x666666666666, 0x3333333333333332, 0xf, x1, 816, x2)
+
+inst_103:
+// rs1_val==7378697629483820645,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0x3e
+TEST_CI_OP( c.srai, x10, 0x1, 0x6666666666666665, 0x3e, x1, 824, x2)
+
+inst_104:
+// rs1_val==3037000498,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0xb504f332; immval:0x3e
+TEST_CI_OP( c.srai, x10, 0x0, 0xb504f332, 0x3e, x1, 832, x2)
+
+inst_105:
+// rs1_val==6148914691236517206,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x6
+TEST_CI_OP( c.srai, x10, 0x155555555555555, 0x5555555555555556, 0x6, x1, 840, x2)
+
+inst_106:
+// rs1_val==-6148914691236517205,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0xc
+TEST_CI_OP( c.srai, x10, 0xfffaaaaaaaaaaaaa, -0x5555555555555555, 0xc, x1, 848, x2)
+
+inst_107:
+// rs1_val==6,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x6; immval:0x9
+TEST_CI_OP( c.srai, x10, 0x0, 0x6, 0x9, x1, 856, x2)
+
+inst_108:
+// rs1_val==3689348814741910324,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0x20
+TEST_CI_OP( c.srai, x10, 0x33333333, 0x3333333333333334, 0x20, x1, 864, x2)
+
+inst_109:
+// rs1_val==7378697629483820647,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0xe
+TEST_CI_OP( c.srai, x10, 0x1999999999999, 0x6666666666666667, 0xe, x1, 872, x2)
+
+inst_110:
+// rs1_val==-3037000498,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0xb504f332; immval:0xc
+TEST_CI_OP( c.srai, x10, 0xfffffffffff4afb0, -0xb504f332, 0xc, x1, 880, x2)
+
+inst_111:
+// rs1_val==3037000500,
+// opcode:c.srai; op1:x10; dest:x10 op1val:0xb504f334; immval:0xe
+TEST_CI_OP( c.srai, x10, 0x2d413, 0xb504f334, 0xe, x1, 888, x2)
+
+inst_112:
+// rs1_val == -1048577,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x100001; immval:0x2a
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x100001, 0x2a, x1, 896, x2)
+
+inst_113:
+// rs1_val == -2097153,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x200001; immval:0x2f
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x200001, 0x2f, x1, 904, x2)
+
+inst_114:
+// rs1_val == -4194305,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x400001; immval:0x1
+TEST_CI_OP( c.srai, x10, 0xffffffffffdfffff, -0x400001, 0x1, x1, 912, x2)
+
+inst_115:
+// rs1_val == -8388609,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x800001; immval:0x1f
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x800001, 0x1f, x1, 920, x2)
+
+inst_116:
+// rs1_val == -16777217,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x1000001; immval:0x15
+TEST_CI_OP( c.srai, x10, 0xfffffffffffffff7, -0x1000001, 0x15, x1, 928, x2)
+
+inst_117:
+// rs1_val == -33554433,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x2000001; immval:0xe
+TEST_CI_OP( c.srai, x10, 0xfffffffffffff7ff, -0x2000001, 0xe, x1, 936, x2)
+
+inst_118:
+// rs1_val == -134217729,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x8000001; immval:0x4
+TEST_CI_OP( c.srai, x10, 0xffffffffff7fffff, -0x8000001, 0x4, x1, 944, x2)
+
+inst_119:
+// rs1_val == -268435457,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x10000001; immval:0x10
+TEST_CI_OP( c.srai, x10, 0xffffffffffffefff, -0x10000001, 0x10, x1, 952, x2)
+
+inst_120:
+// rs1_val == -536870913,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x20000001; immval:0xd
+TEST_CI_OP( c.srai, x10, 0xfffffffffffeffff, -0x20000001, 0xd, x1, 960, x2)
+
+inst_121:
+// rs1_val == -1073741825,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x40000001; immval:0xe
+TEST_CI_OP( c.srai, x10, 0xfffffffffffeffff, -0x40000001, 0xe, x1, 968, x2)
+
+inst_122:
+// rs1_val == -2147483649,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x80000001; immval:0x13
+TEST_CI_OP( c.srai, x10, 0xffffffffffffefff, -0x80000001, 0x13, x1, 976, x2)
+
+inst_123:
+// rs1_val == -4294967297,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x100000001; immval:0x2a
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x100000001, 0x2a, x1, 984, x2)
+
+inst_124:
+// rs1_val == -8589934593,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x200000001; immval:0x13
+TEST_CI_OP( c.srai, x10, 0xffffffffffffbfff, -0x200000001, 0x13, x1, 992, x2)
+
+inst_125:
+// rs1_val == -17179869185,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x400000001; immval:0x2a
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x400000001, 0x2a, x1, 1000, x2)
+
+inst_126:
+// rs1_val == -34359738369,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x800000001; immval:0xa
+TEST_CI_OP( c.srai, x10, 0xfffffffffdffffff, -0x800000001, 0xa, x1, 1008, x2)
+
+inst_127:
+// rs1_val == -68719476737,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x1000000001; immval:0x10
+TEST_CI_OP( c.srai, x10, 0xffffffffffefffff, -0x1000000001, 0x10, x1, 1016, x2)
+
+inst_128:
+// rs1_val == -137438953473,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x2000000001; immval:0x13
+TEST_CI_OP( c.srai, x10, 0xfffffffffffbffff, -0x2000000001, 0x13, x1, 1024, x2)
+
+inst_129:
+// rs1_val == -274877906945,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x4000000001; immval:0x12
+TEST_CI_OP( c.srai, x10, 0xffffffffffefffff, -0x4000000001, 0x12, x1, 1032, x2)
+
+inst_130:
+// rs1_val == -549755813889,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x8000000001; immval:0x3
+TEST_CI_OP( c.srai, x10, 0xffffffefffffffff, -0x8000000001, 0x3, x1, 1040, x2)
+
+inst_131:
+// rs1_val == -1099511627777,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x10000000001; immval:0x2f
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x10000000001, 0x2f, x1, 1048, x2)
+
+inst_132:
+// rs1_val == -2199023255553,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x20000000001; immval:0x1f
+TEST_CI_OP( c.srai, x10, 0xfffffffffffffbff, -0x20000000001, 0x1f, x1, 1056, x2)
+
+inst_133:
+// rs1_val == -4398046511105,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x40000000001; immval:0x7
+TEST_CI_OP( c.srai, x10, 0xfffffff7ffffffff, -0x40000000001, 0x7, x1, 1064, x2)
+
+inst_134:
+// rs1_val == -8796093022209,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x80000000001; immval:0x3b
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x80000000001, 0x3b, x1, 1072, x2)
+
+inst_135:
+// rs1_val == -17592186044417,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x100000000001; immval:0x12
+TEST_CI_OP( c.srai, x10, 0xfffffffffbffffff, -0x100000000001, 0x12, x1, 1080, x2)
+
+inst_136:
+// rs1_val == -35184372088833,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x200000000001; immval:0x3b
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x200000000001, 0x3b, x1, 1088, x2)
+
+inst_137:
+// rs1_val == -70368744177665,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x400000000001; immval:0x1
+TEST_CI_OP( c.srai, x10, 0xffffdfffffffffff, -0x400000000001, 0x1, x1, 1096, x2)
+
+inst_138:
+// rs1_val == -140737488355329,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x800000000001; immval:0x3e
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x800000000001, 0x3e, x1, 1104, x2)
+
+inst_139:
+// rs1_val == -281474976710657,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x1000000000001; immval:0x8
+TEST_CI_OP( c.srai, x10, 0xfffffeffffffffff, -0x1000000000001, 0x8, x1, 1112, x2)
+
+inst_140:
+// rs1_val == -562949953421313,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x2000000000001; immval:0xc
+TEST_CI_OP( c.srai, x10, 0xffffffdfffffffff, -0x2000000000001, 0xc, x1, 1120, x2)
+
+inst_141:
+// rs1_val == -1125899906842625,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x4000000000001; immval:0xb
+TEST_CI_OP( c.srai, x10, 0xffffff7fffffffff, -0x4000000000001, 0xb, x1, 1128, x2)
+
+inst_142:
+// rs1_val == -2251799813685249,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x8000000000001; immval:0x11
+TEST_CI_OP( c.srai, x10, 0xfffffffbffffffff, -0x8000000000001, 0x11, x1, 1136, x2)
+
+inst_143:
+// rs1_val == -4503599627370497,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x10000000000001; immval:0xc
+TEST_CI_OP( c.srai, x10, 0xfffffeffffffffff, -0x10000000000001, 0xc, x1, 1144, x2)
+
+inst_144:
+// rs1_val == -9007199254740993,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x20000000000001; immval:0x3d
+TEST_CI_OP( c.srai, x10, 0xffffffffffffffff, -0x20000000000001, 0x3d, x1, 1152, x2)
+
+inst_145:
+// rs1_val == -18014398509481985,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x40000000000001; immval:0x5
+TEST_CI_OP( c.srai, x10, 0xfffdffffffffffff, -0x40000000000001, 0x5, x1, 1160, x2)
+
+inst_146:
+// rs1_val == -36028797018963969,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x80000000000001; immval:0x1
+TEST_CI_OP( c.srai, x10, 0xffbfffffffffffff, -0x80000000000001, 0x1, x1, 1168, x2)
+
+inst_147:
+// rs1_val == -72057594037927937,
+// opcode:c.srai; op1:x10; dest:x10 op1val:-0x100000000000001; immval:0xe
+TEST_CI_OP( c.srai, x10, 0xfffffbffffffffff, -0x100000000000001, 0xe, x1, 1176, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 148*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/csrli-01.S b/riscof/suite/rv64i_m/C/csrli-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..51f627082c36d4d1b3f54e86b412ab545aa6f108
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/csrli-01.S
@@ -0,0 +1,814 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.srli instruction of the RISC-V C extension for the csrli covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",csrli)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1==x13, rs1_val < 0 and imm_val < xlen, rs1_val == -1125899906842625
+// opcode:c.srli; op1:x13; dest:x13 op1val:-0x4000000000001; immval:0x3
+TEST_CI_OP( c.srli, x13, 0x1fff7fffffffffff, -0x4000000000001, 0x3, x1, 0, x2)
+
+inst_1:
+// rs1==x11, rs1_val > 0 and imm_val < xlen, imm_val == 16, rs1_val == 536870912
+// opcode:c.srli; op1:x11; dest:x11 op1val:0x20000000; immval:0x10
+TEST_CI_OP( c.srli, x11, 0x2000, 0x20000000, 0x10, x1, 8, x2)
+
+inst_2:
+// rs1==x12, rs1_val == imm_val and imm_val != 0 and imm_val < xlen, rs1_val==5
+// opcode:c.srli; op1:x12; dest:x12 op1val:0x5; immval:0x5
+TEST_CI_OP( c.srli, x12, 0x0, 0x5, 0x5, x1, 16, x2)
+
+inst_3:
+// rs1==x10, rs1_val == (-2**(xlen-1)) and imm_val != 0 and imm_val < xlen, rs1_val == -9223372036854775808
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x8000000000000000; immval:0x13
+TEST_CI_OP( c.srli, x10, 0x100000000000, -0x8000000000000000, 0x13, x1, 24, x2)
+
+inst_4:
+// rs1==x15, rs1_val == 0 and imm_val != 0 and imm_val < xlen, rs1_val==0
+// opcode:c.srli; op1:x15; dest:x15 op1val:0x0; immval:0x7
+TEST_CI_OP( c.srli, x15, 0x0, 0x0, 0x7, x1, 32, x2)
+
+inst_5:
+// rs1==x14, rs1_val == (2**(xlen-1)-1) and imm_val != 0 and imm_val < xlen, imm_val == 8, rs1_val == 9223372036854775807
+// opcode:c.srli; op1:x14; dest:x14 op1val:0x7fffffffffffffff; immval:0x8
+TEST_CI_OP( c.srli, x14, 0x7fffffffffffff, 0x7fffffffffffffff, 0x8, x1, 40, x2)
+
+inst_6:
+// rs1==x9, rs1_val == 1 and imm_val != 0 and imm_val < xlen, rs1_val == 1
+// opcode:c.srli; op1:x9; dest:x9 op1val:0x1; immval:0x8
+TEST_CI_OP( c.srli, x9, 0x0, 0x1, 0x8, x1, 48, x2)
+
+inst_7:
+// rs1==x8, rs1_val == 2, rs1_val==2
+// opcode:c.srli; op1:x8; dest:x8 op1val:0x2; immval:0x5
+TEST_CI_OP( c.srli, x8, 0x0, 0x2, 0x5, x1, 56, x2)
+
+inst_8:
+// rs1_val == 4, rs1_val==4, imm_val == 61
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x4; immval:0x3d
+TEST_CI_OP( c.srli, x10, 0x0, 0x4, 0x3d, x1, 64, x2)
+
+inst_9:
+// rs1_val == 8, imm_val == 55
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x8; immval:0x37
+TEST_CI_OP( c.srli, x10, 0x0, 0x8, 0x37, x1, 72, x2)
+
+inst_10:
+// rs1_val == 16,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x10; immval:0x3f
+TEST_CI_OP( c.srli, x10, 0x0, 0x10, 0x3f, x1, 80, x2)
+
+inst_11:
+// rs1_val == 32, imm_val == 59
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x20; immval:0x3b
+TEST_CI_OP( c.srli, x10, 0x0, 0x20, 0x3b, x1, 88, x2)
+
+inst_12:
+// rs1_val == 64, imm_val == 21
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x40; immval:0x15
+TEST_CI_OP( c.srli, x10, 0x0, 0x40, 0x15, x1, 96, x2)
+
+inst_13:
+// rs1_val == 128,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x80; immval:0xc
+TEST_CI_OP( c.srli, x10, 0x0, 0x80, 0xc, x1, 104, x2)
+
+inst_14:
+// rs1_val == 256, imm_val == 2
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x100; immval:0x2
+TEST_CI_OP( c.srli, x10, 0x40, 0x100, 0x2, x1, 112, x2)
+
+inst_15:
+// rs1_val == 512,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x200; immval:0x3b
+TEST_CI_OP( c.srli, x10, 0x0, 0x200, 0x3b, x1, 120, x2)
+
+inst_16:
+// rs1_val == 1024, imm_val == 4
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x400; immval:0x4
+TEST_CI_OP( c.srli, x10, 0x40, 0x400, 0x4, x1, 128, x2)
+
+inst_17:
+// rs1_val == 2048,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x800; immval:0x7
+TEST_CI_OP( c.srli, x10, 0x10, 0x800, 0x7, x1, 136, x2)
+
+inst_18:
+// rs1_val == 4096,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x1000; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x200, 0x1000, 0x3, x1, 144, x2)
+
+inst_19:
+// rs1_val == 8192, imm_val == 31
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x2000; immval:0x1f
+TEST_CI_OP( c.srli, x10, 0x0, 0x2000, 0x1f, x1, 152, x2)
+
+inst_20:
+// rs1_val == 16384,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x4000; immval:0x3d
+TEST_CI_OP( c.srli, x10, 0x0, 0x4000, 0x3d, x1, 160, x2)
+
+inst_21:
+// rs1_val == 32768,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x8000; immval:0x10
+TEST_CI_OP( c.srli, x10, 0x0, 0x8000, 0x10, x1, 168, x2)
+
+inst_22:
+// rs1_val == 65536,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x10000; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x2000, 0x10000, 0x3, x1, 176, x2)
+
+inst_23:
+// rs1_val == 131072, imm_val == 1
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x20000; immval:0x1
+TEST_CI_OP( c.srli, x10, 0x10000, 0x20000, 0x1, x1, 184, x2)
+
+inst_24:
+// rs1_val == 262144,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x40000; immval:0x1f
+TEST_CI_OP( c.srli, x10, 0x0, 0x40000, 0x1f, x1, 192, x2)
+
+inst_25:
+// rs1_val == 524288,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x80000; immval:0x13
+TEST_CI_OP( c.srli, x10, 0x1, 0x80000, 0x13, x1, 200, x2)
+
+inst_26:
+// rs1_val == 1048576,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x100000; immval:0xf
+TEST_CI_OP( c.srli, x10, 0x20, 0x100000, 0xf, x1, 208, x2)
+
+inst_27:
+// rs1_val == 2097152,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x200000; immval:0x10
+TEST_CI_OP( c.srli, x10, 0x20, 0x200000, 0x10, x1, 216, x2)
+
+inst_28:
+// rs1_val == 4194304,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x400000; immval:0x4
+TEST_CI_OP( c.srli, x10, 0x40000, 0x400000, 0x4, x1, 224, x2)
+
+inst_29:
+// rs1_val == 8388608,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x800000; immval:0xa
+TEST_CI_OP( c.srli, x10, 0x2000, 0x800000, 0xa, x1, 232, x2)
+
+inst_30:
+// rs1_val == 16777216,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x1000000; immval:0xd
+TEST_CI_OP( c.srli, x10, 0x800, 0x1000000, 0xd, x1, 240, x2)
+
+inst_31:
+// rs1_val == 33554432,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x2000000; immval:0x3b
+TEST_CI_OP( c.srli, x10, 0x0, 0x2000000, 0x3b, x1, 248, x2)
+
+inst_32:
+// rs1_val == 67108864,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x4000000; immval:0x10
+TEST_CI_OP( c.srli, x10, 0x400, 0x4000000, 0x10, x1, 256, x2)
+
+inst_33:
+// rs1_val == 134217728,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x8000000; immval:0x37
+TEST_CI_OP( c.srli, x10, 0x0, 0x8000000, 0x37, x1, 264, x2)
+
+inst_34:
+// rs1_val == 268435456,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x10000000; immval:0x7
+TEST_CI_OP( c.srli, x10, 0x200000, 0x10000000, 0x7, x1, 272, x2)
+
+inst_35:
+// rs1_val == 1073741824,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x40000000; immval:0x3b
+TEST_CI_OP( c.srli, x10, 0x0, 0x40000000, 0x3b, x1, 280, x2)
+
+inst_36:
+// rs1_val == 2147483648,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x80000000; immval:0x9
+TEST_CI_OP( c.srli, x10, 0x400000, 0x80000000, 0x9, x1, 288, x2)
+
+inst_37:
+// rs1_val == 4294967296,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x100000000; immval:0xe
+TEST_CI_OP( c.srli, x10, 0x40000, 0x100000000, 0xe, x1, 296, x2)
+
+inst_38:
+// rs1_val == 8589934592,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x200000000; immval:0x1
+TEST_CI_OP( c.srli, x10, 0x100000000, 0x200000000, 0x1, x1, 304, x2)
+
+inst_39:
+// rs1_val == 17179869184,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x400000000; immval:0x11
+TEST_CI_OP( c.srli, x10, 0x20000, 0x400000000, 0x11, x1, 312, x2)
+
+inst_40:
+// rs1_val == 34359738368, imm_val == 62
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x800000000; immval:0x3e
+TEST_CI_OP( c.srli, x10, 0x0, 0x800000000, 0x3e, x1, 320, x2)
+
+inst_41:
+// rs1_val == 68719476736,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x1000000000; immval:0xb
+TEST_CI_OP( c.srli, x10, 0x2000000, 0x1000000000, 0xb, x1, 328, x2)
+
+inst_42:
+// rs1_val == 137438953472,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x2000000000; immval:0x6
+TEST_CI_OP( c.srli, x10, 0x80000000, 0x2000000000, 0x6, x1, 336, x2)
+
+inst_43:
+// rs1_val == 274877906944,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x4000000000; immval:0x1f
+TEST_CI_OP( c.srli, x10, 0x80, 0x4000000000, 0x1f, x1, 344, x2)
+
+inst_44:
+// rs1_val == 549755813888,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x8000000000; immval:0x15
+TEST_CI_OP( c.srli, x10, 0x40000, 0x8000000000, 0x15, x1, 352, x2)
+
+inst_45:
+// rs1_val == 1099511627776,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x10000000000; immval:0x9
+TEST_CI_OP( c.srli, x10, 0x80000000, 0x10000000000, 0x9, x1, 360, x2)
+
+inst_46:
+// rs1_val == 2199023255552,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x20000000000; immval:0x3e
+TEST_CI_OP( c.srli, x10, 0x0, 0x20000000000, 0x3e, x1, 368, x2)
+
+inst_47:
+// rs1_val == 4398046511104,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x40000000000; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x8000000000, 0x40000000000, 0x3, x1, 376, x2)
+
+inst_48:
+// rs1_val == 8796093022208,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x80000000000; immval:0x6
+TEST_CI_OP( c.srli, x10, 0x2000000000, 0x80000000000, 0x6, x1, 384, x2)
+
+inst_49:
+// rs1_val == 17592186044416,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x100000000000; immval:0x1
+TEST_CI_OP( c.srli, x10, 0x80000000000, 0x100000000000, 0x1, x1, 392, x2)
+
+inst_50:
+// rs1_val == 35184372088832,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x200000000000; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x40000000000, 0x200000000000, 0x3, x1, 400, x2)
+
+inst_51:
+// rs1_val == 70368744177664,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x400000000000; immval:0x9
+TEST_CI_OP( c.srli, x10, 0x2000000000, 0x400000000000, 0x9, x1, 408, x2)
+
+inst_52:
+// rs1_val == 140737488355328,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x800000000000; immval:0x1
+TEST_CI_OP( c.srli, x10, 0x400000000000, 0x800000000000, 0x1, x1, 416, x2)
+
+inst_53:
+// rs1_val == 281474976710656, imm_val == 47
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x1000000000000; immval:0x2f
+TEST_CI_OP( c.srli, x10, 0x2, 0x1000000000000, 0x2f, x1, 424, x2)
+
+inst_54:
+// rs1_val == 562949953421312,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x2000000000000; immval:0xe
+TEST_CI_OP( c.srli, x10, 0x800000000, 0x2000000000000, 0xe, x1, 432, x2)
+
+inst_55:
+// rs1_val == 1125899906842624,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x4000000000000; immval:0x3f
+TEST_CI_OP( c.srli, x10, 0x0, 0x4000000000000, 0x3f, x1, 440, x2)
+
+inst_56:
+// rs1_val == 2251799813685248,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x8000000000000; immval:0x3f
+TEST_CI_OP( c.srli, x10, 0x0, 0x8000000000000, 0x3f, x1, 448, x2)
+
+inst_57:
+// rs1_val == 4503599627370496,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x10000000000000; immval:0x3f
+TEST_CI_OP( c.srli, x10, 0x0, 0x10000000000000, 0x3f, x1, 456, x2)
+
+inst_58:
+// rs1_val == 9007199254740992,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x20000000000000; immval:0x12
+TEST_CI_OP( c.srli, x10, 0x800000000, 0x20000000000000, 0x12, x1, 464, x2)
+
+inst_59:
+// rs1_val == 18014398509481984,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x40000000000000; immval:0x12
+TEST_CI_OP( c.srli, x10, 0x1000000000, 0x40000000000000, 0x12, x1, 472, x2)
+
+inst_60:
+// rs1_val == 36028797018963968,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x80000000000000; immval:0xa
+TEST_CI_OP( c.srli, x10, 0x200000000000, 0x80000000000000, 0xa, x1, 480, x2)
+
+inst_61:
+// rs1_val == 72057594037927936,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x100000000000000; immval:0x15
+TEST_CI_OP( c.srli, x10, 0x800000000, 0x100000000000000, 0x15, x1, 488, x2)
+
+inst_62:
+// rs1_val == 144115188075855872,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x200000000000000; immval:0xb
+TEST_CI_OP( c.srli, x10, 0x400000000000, 0x200000000000000, 0xb, x1, 496, x2)
+
+inst_63:
+// rs1_val == 288230376151711744,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x400000000000000; immval:0x3d
+TEST_CI_OP( c.srli, x10, 0x0, 0x400000000000000, 0x3d, x1, 504, x2)
+
+inst_64:
+// rs1_val == 576460752303423488,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x800000000000000; immval:0xf
+TEST_CI_OP( c.srli, x10, 0x100000000000, 0x800000000000000, 0xf, x1, 512, x2)
+
+inst_65:
+// rs1_val == 1152921504606846976,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x1000000000000000; immval:0x3b
+TEST_CI_OP( c.srli, x10, 0x2, 0x1000000000000000, 0x3b, x1, 520, x2)
+
+inst_66:
+// rs1_val == 2305843009213693952,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x2000000000000000; immval:0x3f
+TEST_CI_OP( c.srli, x10, 0x0, 0x2000000000000000, 0x3f, x1, 528, x2)
+
+inst_67:
+// rs1_val == 4611686018427387904,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x4000000000000000; immval:0x9
+TEST_CI_OP( c.srli, x10, 0x20000000000000, 0x4000000000000000, 0x9, x1, 536, x2)
+
+inst_68:
+// rs1_val == -2,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x2; immval:0xe
+TEST_CI_OP( c.srli, x10, 0x3ffffffffffff, -0x2, 0xe, x1, 544, x2)
+
+inst_69:
+// rs1_val == -3,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x3; immval:0xc
+TEST_CI_OP( c.srli, x10, 0xfffffffffffff, -0x3, 0xc, x1, 552, x2)
+
+inst_70:
+// rs1_val == -5,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x5; immval:0x6
+TEST_CI_OP( c.srli, x10, 0x3ffffffffffffff, -0x5, 0x6, x1, 560, x2)
+
+inst_71:
+// rs1_val == -9, imm_val == 32
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x9; immval:0x20
+TEST_CI_OP( c.srli, x10, 0xffffffff, -0x9, 0x20, x1, 568, x2)
+
+inst_72:
+// rs1_val == -17,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x11; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x1ffffffffffffffd, -0x11, 0x3, x1, 576, x2)
+
+inst_73:
+// rs1_val == -33,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x21; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x1ffffffffffffffb, -0x21, 0x3, x1, 584, x2)
+
+inst_74:
+// rs1_val == -65,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x41; immval:0x2f
+TEST_CI_OP( c.srli, x10, 0x1ffff, -0x41, 0x2f, x1, 592, x2)
+
+inst_75:
+// rs1_val == -129,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x81; immval:0x20
+TEST_CI_OP( c.srli, x10, 0xffffffff, -0x81, 0x20, x1, 600, x2)
+
+inst_76:
+// rs1_val == -257,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x101; immval:0x3e
+TEST_CI_OP( c.srli, x10, 0x3, -0x101, 0x3e, x1, 608, x2)
+
+inst_77:
+// rs1_val == -513,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x201; immval:0x37
+TEST_CI_OP( c.srli, x10, 0x1ff, -0x201, 0x37, x1, 616, x2)
+
+inst_78:
+// rs1_val == -1025,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x401; immval:0xd
+TEST_CI_OP( c.srli, x10, 0x7ffffffffffff, -0x401, 0xd, x1, 624, x2)
+
+inst_79:
+// rs1_val == -2049,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x801; immval:0x4
+TEST_CI_OP( c.srli, x10, 0xfffffffffffff7f, -0x801, 0x4, x1, 632, x2)
+
+inst_80:
+// rs1_val == -4097,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x1001; immval:0xe
+TEST_CI_OP( c.srli, x10, 0x3ffffffffffff, -0x1001, 0xe, x1, 640, x2)
+
+inst_81:
+// rs1_val == -8193,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x2001; immval:0x11
+TEST_CI_OP( c.srli, x10, 0x7fffffffffff, -0x2001, 0x11, x1, 648, x2)
+
+inst_82:
+// rs1_val == -16385,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x4001; immval:0x5
+TEST_CI_OP( c.srli, x10, 0x7fffffffffffdff, -0x4001, 0x5, x1, 656, x2)
+
+inst_83:
+// rs1_val == -32769,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x8001; immval:0x9
+TEST_CI_OP( c.srli, x10, 0x7fffffffffffbf, -0x8001, 0x9, x1, 664, x2)
+
+inst_84:
+// rs1_val == -65537,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x10001; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x1fffffffffffdfff, -0x10001, 0x3, x1, 672, x2)
+
+inst_85:
+// rs1_val == -131073,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x20001; immval:0x13
+TEST_CI_OP( c.srli, x10, 0x1fffffffffff, -0x20001, 0x13, x1, 680, x2)
+
+inst_86:
+// rs1_val == -262145,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x40001; immval:0x1f
+TEST_CI_OP( c.srli, x10, 0x1ffffffff, -0x40001, 0x1f, x1, 688, x2)
+
+inst_87:
+// rs1_val == -524289,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x80001; immval:0x10
+TEST_CI_OP( c.srli, x10, 0xfffffffffff7, -0x80001, 0x10, x1, 696, x2)
+
+inst_88:
+// rs1_val == -144115188075855873,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x200000000000001; immval:0x3e
+TEST_CI_OP( c.srli, x10, 0x3, -0x200000000000001, 0x3e, x1, 704, x2)
+
+inst_89:
+// rs1_val == -288230376151711745,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x400000000000001; immval:0x37
+TEST_CI_OP( c.srli, x10, 0x1f7, -0x400000000000001, 0x37, x1, 712, x2)
+
+inst_90:
+// rs1_val == -576460752303423489,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x800000000000001; immval:0x15
+TEST_CI_OP( c.srli, x10, 0x7bfffffffff, -0x800000000000001, 0x15, x1, 720, x2)
+
+inst_91:
+// rs1_val == -1152921504606846977,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x1000000000000001; immval:0x9
+TEST_CI_OP( c.srli, x10, 0x77ffffffffffff, -0x1000000000000001, 0x9, x1, 728, x2)
+
+inst_92:
+// rs1_val == -2305843009213693953,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x2000000000000001; immval:0x6
+TEST_CI_OP( c.srli, x10, 0x37fffffffffffff, -0x2000000000000001, 0x6, x1, 736, x2)
+
+inst_93:
+// rs1_val == -4611686018427387905,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x4000000000000001; immval:0x10
+TEST_CI_OP( c.srli, x10, 0xbfffffffffff, -0x4000000000000001, 0x10, x1, 744, x2)
+
+inst_94:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x5555555555555555; immval:0x1f
+TEST_CI_OP( c.srli, x10, 0xaaaaaaaa, 0x5555555555555555, 0x1f, x1, 752, x2)
+
+inst_95:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x5555555555555556; immval:0x6
+TEST_CI_OP( c.srli, x10, 0x2aaaaaaaaaaaaaa, -0x5555555555555556, 0x6, x1, 760, x2)
+
+inst_96:
+// rs1_val==3,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x3; immval:0xc
+TEST_CI_OP( c.srli, x10, 0x0, 0x3, 0xc, x1, 768, x2)
+
+inst_97:
+// rs1_val==3689348814741910323,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x3333333333333333; immval:0xf
+TEST_CI_OP( c.srli, x10, 0x666666666666, 0x3333333333333333, 0xf, x1, 776, x2)
+
+inst_98:
+// rs1_val==7378697629483820646,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x6666666666666666; immval:0xb
+TEST_CI_OP( c.srli, x10, 0xccccccccccccc, 0x6666666666666666, 0xb, x1, 784, x2)
+
+inst_99:
+// rs1_val==-3037000499,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0xb504f333; immval:0x37
+TEST_CI_OP( c.srli, x10, 0x1ff, -0xb504f333, 0x37, x1, 792, x2)
+
+inst_100:
+// rs1_val==3037000499,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0xb504f333; immval:0x7
+TEST_CI_OP( c.srli, x10, 0x16a09e6, 0xb504f333, 0x7, x1, 800, x2)
+
+inst_101:
+// rs1_val==6148914691236517204,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x5555555555555554; immval:0x20
+TEST_CI_OP( c.srli, x10, 0x55555555, 0x5555555555555554, 0x20, x1, 808, x2)
+
+inst_102:
+// rs1_val==3689348814741910322,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x3333333333333332; immval:0x1
+TEST_CI_OP( c.srli, x10, 0x1999999999999999, 0x3333333333333332, 0x1, x1, 816, x2)
+
+inst_103:
+// rs1_val==7378697629483820645,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x6666666666666665; immval:0xd
+TEST_CI_OP( c.srli, x10, 0x3333333333333, 0x6666666666666665, 0xd, x1, 824, x2)
+
+inst_104:
+// rs1_val==3037000498,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0xb504f332; immval:0xa
+TEST_CI_OP( c.srli, x10, 0x2d413c, 0xb504f332, 0xa, x1, 832, x2)
+
+inst_105:
+// rs1_val==6148914691236517206,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x5555555555555556; immval:0x2
+TEST_CI_OP( c.srli, x10, 0x1555555555555555, 0x5555555555555556, 0x2, x1, 840, x2)
+
+inst_106:
+// rs1_val==-6148914691236517205,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x5555555555555555; immval:0x12
+TEST_CI_OP( c.srli, x10, 0x2aaaaaaaaaaa, -0x5555555555555555, 0x12, x1, 848, x2)
+
+inst_107:
+// rs1_val==6,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x6; immval:0x4
+TEST_CI_OP( c.srli, x10, 0x0, 0x6, 0x4, x1, 856, x2)
+
+inst_108:
+// rs1_val==3689348814741910324,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x3333333333333334; immval:0xa
+TEST_CI_OP( c.srli, x10, 0xccccccccccccc, 0x3333333333333334, 0xa, x1, 864, x2)
+
+inst_109:
+// rs1_val==7378697629483820647,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x6666666666666667; immval:0x8
+TEST_CI_OP( c.srli, x10, 0x66666666666666, 0x6666666666666667, 0x8, x1, 872, x2)
+
+inst_110:
+// rs1_val==-3037000498,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0xb504f332; immval:0x5
+TEST_CI_OP( c.srli, x10, 0x7fffffffa57d866, -0xb504f332, 0x5, x1, 880, x2)
+
+inst_111:
+// rs1_val==3037000500,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0xb504f334; immval:0x2f
+TEST_CI_OP( c.srli, x10, 0x0, 0xb504f334, 0x2f, x1, 888, x2)
+
+inst_112:
+// imm_val == 42,
+// opcode:c.srli; op1:x10; dest:x10 op1val:0x100000000000000; immval:0x2a
+TEST_CI_OP( c.srli, x10, 0x4000, 0x100000000000000, 0x2a, x1, 896, x2)
+
+inst_113:
+// rs1_val == -1048577,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x100001; immval:0x5
+TEST_CI_OP( c.srli, x10, 0x7ffffffffff7fff, -0x100001, 0x5, x1, 904, x2)
+
+inst_114:
+// rs1_val == -2097153,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x200001; immval:0x20
+TEST_CI_OP( c.srli, x10, 0xffffffff, -0x200001, 0x20, x1, 912, x2)
+
+inst_115:
+// rs1_val == -4194305,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x400001; immval:0x8
+TEST_CI_OP( c.srli, x10, 0xffffffffffbfff, -0x400001, 0x8, x1, 920, x2)
+
+inst_116:
+// rs1_val == -8388609,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x800001; immval:0x3d
+TEST_CI_OP( c.srli, x10, 0x7, -0x800001, 0x3d, x1, 928, x2)
+
+inst_117:
+// rs1_val == -16777217,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x1000001; immval:0x2
+TEST_CI_OP( c.srli, x10, 0x3fffffffffbfffff, -0x1000001, 0x2, x1, 936, x2)
+
+inst_118:
+// rs1_val == -33554433,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x2000001; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x1fffffffffbfffff, -0x2000001, 0x3, x1, 944, x2)
+
+inst_119:
+// rs1_val == -67108865,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x4000001; immval:0xa
+TEST_CI_OP( c.srli, x10, 0x3ffffffffeffff, -0x4000001, 0xa, x1, 952, x2)
+
+inst_120:
+// rs1_val == -134217729,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x8000001; immval:0xa
+TEST_CI_OP( c.srli, x10, 0x3ffffffffdffff, -0x8000001, 0xa, x1, 960, x2)
+
+inst_121:
+// rs1_val == -268435457,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x10000001; immval:0xd
+TEST_CI_OP( c.srli, x10, 0x7ffffffff7fff, -0x10000001, 0xd, x1, 968, x2)
+
+inst_122:
+// rs1_val == -536870913,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x20000001; immval:0x1f
+TEST_CI_OP( c.srli, x10, 0x1ffffffff, -0x20000001, 0x1f, x1, 976, x2)
+
+inst_123:
+// rs1_val == -1073741825,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x40000001; immval:0x20
+TEST_CI_OP( c.srli, x10, 0xffffffff, -0x40000001, 0x20, x1, 984, x2)
+
+inst_124:
+// rs1_val == -2147483649,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x80000001; immval:0x3e
+TEST_CI_OP( c.srli, x10, 0x3, -0x80000001, 0x3e, x1, 992, x2)
+
+inst_125:
+// rs1_val == -4294967297,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x100000001; immval:0x37
+TEST_CI_OP( c.srli, x10, 0x1ff, -0x100000001, 0x37, x1, 1000, x2)
+
+inst_126:
+// rs1_val == -8589934593,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x200000001; immval:0xb
+TEST_CI_OP( c.srli, x10, 0x1fffffffbfffff, -0x200000001, 0xb, x1, 1008, x2)
+
+inst_127:
+// rs1_val == -17179869185,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x400000001; immval:0x2f
+TEST_CI_OP( c.srli, x10, 0x1ffff, -0x400000001, 0x2f, x1, 1016, x2)
+
+inst_128:
+// rs1_val == -34359738369,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x800000001; immval:0x3f
+TEST_CI_OP( c.srli, x10, 0x1, -0x800000001, 0x3f, x1, 1024, x2)
+
+inst_129:
+// rs1_val == -68719476737,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x1000000001; immval:0x5
+TEST_CI_OP( c.srli, x10, 0x7ffffff7fffffff, -0x1000000001, 0x5, x1, 1032, x2)
+
+inst_130:
+// rs1_val == -137438953473,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x2000000001; immval:0x3d
+TEST_CI_OP( c.srli, x10, 0x7, -0x2000000001, 0x3d, x1, 1040, x2)
+
+inst_131:
+// rs1_val == -274877906945,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x4000000001; immval:0xd
+TEST_CI_OP( c.srli, x10, 0x7fffffdffffff, -0x4000000001, 0xd, x1, 1048, x2)
+
+inst_132:
+// rs1_val == -549755813889,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x8000000001; immval:0xb
+TEST_CI_OP( c.srli, x10, 0x1fffffefffffff, -0x8000000001, 0xb, x1, 1056, x2)
+
+inst_133:
+// rs1_val == -1099511627777,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x10000000001; immval:0x15
+TEST_CI_OP( c.srli, x10, 0x7fffff7ffff, -0x10000000001, 0x15, x1, 1064, x2)
+
+inst_134:
+// rs1_val == -2199023255553,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x20000000001; immval:0x7
+TEST_CI_OP( c.srli, x10, 0x1fffffbffffffff, -0x20000000001, 0x7, x1, 1072, x2)
+
+inst_135:
+// rs1_val == -4398046511105,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x40000000001; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x1fffff7fffffffff, -0x40000000001, 0x3, x1, 1080, x2)
+
+inst_136:
+// rs1_val == -8796093022209,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x80000000001; immval:0xa
+TEST_CI_OP( c.srli, x10, 0x3ffffdffffffff, -0x80000000001, 0xa, x1, 1088, x2)
+
+inst_137:
+// rs1_val == -17592186044417,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x100000000001; immval:0x3d
+TEST_CI_OP( c.srli, x10, 0x7, -0x100000000001, 0x3d, x1, 1096, x2)
+
+inst_138:
+// rs1_val == -35184372088833,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x200000000001; immval:0x1f
+TEST_CI_OP( c.srli, x10, 0x1ffffbfff, -0x200000000001, 0x1f, x1, 1104, x2)
+
+inst_139:
+// rs1_val == -70368744177665,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x400000000001; immval:0xc
+TEST_CI_OP( c.srli, x10, 0xffffbffffffff, -0x400000000001, 0xc, x1, 1112, x2)
+
+inst_140:
+// rs1_val == -140737488355329,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x800000000001; immval:0x1
+TEST_CI_OP( c.srli, x10, 0x7fffbfffffffffff, -0x800000000001, 0x1, x1, 1120, x2)
+
+inst_141:
+// rs1_val == -281474976710657,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x1000000000001; immval:0x3
+TEST_CI_OP( c.srli, x10, 0x1fffdfffffffffff, -0x1000000000001, 0x3, x1, 1128, x2)
+
+inst_142:
+// rs1_val == -562949953421313,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x2000000000001; immval:0x2
+TEST_CI_OP( c.srli, x10, 0x3fff7fffffffffff, -0x2000000000001, 0x2, x1, 1136, x2)
+
+inst_143:
+// rs1_val == -2251799813685249,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x8000000000001; immval:0x5
+TEST_CI_OP( c.srli, x10, 0x7ffbfffffffffff, -0x8000000000001, 0x5, x1, 1144, x2)
+
+inst_144:
+// rs1_val == -4503599627370497,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x10000000000001; immval:0x12
+TEST_CI_OP( c.srli, x10, 0x3ffbffffffff, -0x10000000000001, 0x12, x1, 1152, x2)
+
+inst_145:
+// rs1_val == -9007199254740993,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x20000000000001; immval:0x37
+TEST_CI_OP( c.srli, x10, 0x1ff, -0x20000000000001, 0x37, x1, 1160, x2)
+
+inst_146:
+// rs1_val == -18014398509481985,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x40000000000001; immval:0xc
+TEST_CI_OP( c.srli, x10, 0xffbffffffffff, -0x40000000000001, 0xc, x1, 1168, x2)
+
+inst_147:
+// rs1_val == -36028797018963969,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x80000000000001; immval:0x13
+TEST_CI_OP( c.srli, x10, 0x1fefffffffff, -0x80000000000001, 0x13, x1, 1176, x2)
+
+inst_148:
+// rs1_val == -72057594037927937,
+// opcode:c.srli; op1:x10; dest:x10 op1val:-0x100000000000001; immval:0x2f
+TEST_CI_OP( c.srli, x10, 0x1fdff, -0x100000000000001, 0x2f, x1, 1184, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 149*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/csub-01.S b/riscof/suite/rv64i_m/C/csub-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..e38be8a71e546988c0b4ed47d402ea22085c55af
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/csub-01.S
@@ -0,0 +1,3434 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.sub instruction of the RISC-V C extension for the csub covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",csub)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x9, rs2==x8, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, rs2_val < 0, rs1_val == 17592186044416
+// opcode: c.sub; op1:x9; op2:x8; op1val:0x100000000000; op2val:-0x8000000000000000
+TEST_CR_OP( c.sub, x9, x8, 0x8000100000000000, 0x100000000000, -0x8000000000000000, x1, 0, x2)
+
+inst_1:
+// rs1 == rs2, rs1==x14, rs2==x14, rs2_val == 0, rs1_val == -2251799813685249
+// opcode: c.sub; op1:x14; op2:x14; op1val:-0x8000000000001; op2val:-0x8000000000001
+TEST_CR_OP( c.sub, x14, x14, 0x0, -0x8000000000001, -0x8000000000001, x1, 8, x2)
+
+inst_2:
+// rs1==x13, rs2==x11, rs2_val == (2**(xlen-1)-1), rs2_val > 0, rs1_val == 4, rs2_val == 9223372036854775807
+// opcode: c.sub; op1:x13; op2:x11; op1val:0x4; op2val:0x7fffffffffffffff
+TEST_CR_OP( c.sub, x13, x11, 0x8000000000000005, 0x4, 0x7fffffffffffffff, x1, 16, x2)
+
+inst_3:
+// rs1==x11, rs2==x13, rs2_val == 1, rs1_val == 36028797018963968
+// opcode: c.sub; op1:x11; op2:x13; op1val:0x80000000000000; op2val:0x1
+TEST_CR_OP( c.sub, x11, x13, 0x7fffffffffffff, 0x80000000000000, 0x1, x1, 24, x2)
+
+inst_4:
+// rs1==x12, rs2==x10, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808, rs2_val == 33554432
+// opcode: c.sub; op1:x12; op2:x10; op1val:-0x8000000000000000; op2val:0x2000000
+TEST_CR_OP( c.sub, x12, x10, 0x7ffffffffe000000, -0x8000000000000000, 0x2000000, x1, 32, x2)
+
+inst_5:
+// rs1==x15, rs2==x9, rs1_val == 0, rs2_val == -129
+// opcode: c.sub; op1:x15; op2:x9; op1val:0x0; op2val:-0x81
+TEST_CR_OP( c.sub, x15, x9, 0x81, 0x0, -0x81, x1, 40, x2)
+
+inst_6:
+// rs1==x10, rs2==x15, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, rs2_val == 70368744177664
+// opcode: c.sub; op1:x10; op2:x15; op1val:0x7fffffffffffffff; op2val:0x400000000000
+TEST_CR_OP( c.sub, x10, x15, 0x7fffbfffffffffff, 0x7fffffffffffffff, 0x400000000000, x1, 48, x2)
+
+inst_7:
+// rs1==x8, rs2==x12, rs1_val == 1, rs2_val == -8388609
+// opcode: c.sub; op1:x8; op2:x12; op1val:0x1; op2val:-0x800001
+TEST_CR_OP( c.sub, x8, x12, 0x800002, 0x1, -0x800001, x1, 56, x2)
+
+inst_8:
+// rs2_val == 2, rs1_val == -536870913
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x20000001; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffdffffffd, -0x20000001, 0x2, x1, 64, x2)
+
+inst_9:
+// rs2_val == 4, rs1_val == -2147483649
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x80000001; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff7ffffffb, -0x80000001, 0x4, x1, 72, x2)
+
+inst_10:
+// rs2_val == 8, rs1_val == -4503599627370497
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x10000000000001; op2val:0x8
+TEST_CR_OP( c.sub, x10, x11, 0xffeffffffffffff7, -0x10000000000001, 0x8, x1, 80, x2)
+
+inst_11:
+// rs2_val == 16,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x7; op2val:0x10
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffff7, 0x7, 0x10, x1, 88, x2)
+
+inst_12:
+// rs2_val == 32, rs1_val == -549755813889
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x8000000001; op2val:0x20
+TEST_CR_OP( c.sub, x10, x11, 0xffffff7fffffffdf, -0x8000000001, 0x20, x1, 96, x2)
+
+inst_13:
+// rs2_val == 64, rs1_val == 268435456
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x10000000; op2val:0x40
+TEST_CR_OP( c.sub, x10, x11, 0xfffffc0, 0x10000000, 0x40, x1, 104, x2)
+
+inst_14:
+// rs2_val == 128, rs1_val == -68719476737
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x1000000001; op2val:0x80
+TEST_CR_OP( c.sub, x10, x11, 0xffffffefffffff7f, -0x1000000001, 0x80, x1, 112, x2)
+
+inst_15:
+// rs2_val == 256, rs1_val == -16777217
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x1000001; op2val:0x100
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffefffeff, -0x1000001, 0x100, x1, 120, x2)
+
+inst_16:
+// rs2_val == 512, rs1_val == 35184372088832
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x200000000000; op2val:0x200
+TEST_CR_OP( c.sub, x10, x11, 0x1ffffffffe00, 0x200000000000, 0x200, x1, 128, x2)
+
+inst_17:
+// rs2_val == 1024, rs1_val == -5
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5; op2val:0x400
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffbfb, -0x5, 0x400, x1, 136, x2)
+
+inst_18:
+// rs2_val == 2048,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x8; op2val:0x800
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffff7f8, -0x8, 0x800, x1, 144, x2)
+
+inst_19:
+// rs2_val == 4096, rs1_val == 4096
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x1000; op2val:0x1000
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x1000, 0x1000, x1, 152, x2)
+
+inst_20:
+// rs2_val == 8192, rs1_val == -35184372088833
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x200000000001; op2val:0x2000
+TEST_CR_OP( c.sub, x10, x11, 0xffffdfffffffdfff, -0x200000000001, 0x2000, x1, 160, x2)
+
+inst_21:
+// rs2_val == 16384,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x4000
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffc004, 0x4, 0x4000, x1, 168, x2)
+
+inst_22:
+// rs2_val == 32768,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x1; op2val:0x8000
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffff8001, 0x1, 0x8000, x1, 176, x2)
+
+inst_23:
+// rs2_val == 65536, rs1_val == 16384
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4000; op2val:0x10000
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffff4000, 0x4000, 0x10000, x1, 184, x2)
+
+inst_24:
+// rs2_val == 131072, rs1_val == -1099511627777
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x10000000001; op2val:0x20000
+TEST_CR_OP( c.sub, x10, x11, 0xfffffefffffdffff, -0x10000000001, 0x20000, x1, 192, x2)
+
+inst_25:
+// rs2_val == 262144,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x40000
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffc0004, 0x4, 0x40000, x1, 200, x2)
+
+inst_26:
+// rs2_val == 524288,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x6; op2val:0x80000
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffff7fffa, -0x6, 0x80000, x1, 208, x2)
+
+inst_27:
+// rs2_val == 1048576,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x100000
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4aeb0ccd, -0xb504f333, 0x100000, x1, 216, x2)
+
+inst_28:
+// rs2_val == 2097152, rs1_val == 2048
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x800; op2val:0x200000
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffe00800, 0x800, 0x200000, x1, 224, x2)
+
+inst_29:
+// rs2_val == 4194304,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x8000000000001; op2val:0x400000
+TEST_CR_OP( c.sub, x10, x11, 0xfff7ffffffbfffff, -0x8000000000001, 0x400000, x1, 232, x2)
+
+inst_30:
+// rs2_val == 8388608, rs1_val == -4294967297
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x100000001; op2val:0x800000
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffeff7fffff, -0x100000001, 0x800000, x1, 240, x2)
+
+inst_31:
+// rs2_val == 16777216, rs1_val == -8589934593
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x200000001; op2val:0x1000000
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffdfeffffff, -0x200000001, 0x1000000, x1, 248, x2)
+
+inst_32:
+// rs2_val == 67108864,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5; op2val:0x4000000
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffbfffffb, -0x5, 0x4000000, x1, 256, x2)
+
+inst_33:
+// rs2_val == 134217728, rs1_val == 288230376151711744
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x400000000000000; op2val:0x8000000
+TEST_CR_OP( c.sub, x10, x11, 0x3fffffff8000000, 0x400000000000000, 0x8000000, x1, 264, x2)
+
+inst_34:
+// rs2_val == 268435456, rs1_val == 562949953421312
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2000000000000; op2val:0x10000000
+TEST_CR_OP( c.sub, x10, x11, 0x1fffff0000000, 0x2000000000000, 0x10000000, x1, 272, x2)
+
+inst_35:
+// rs2_val == 536870912,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x20000000
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffe0000004, 0x4, 0x20000000, x1, 280, x2)
+
+inst_36:
+// rs2_val == 1073741824,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x40000000
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffc0000004, 0x4, 0x40000000, x1, 288, x2)
+
+inst_37:
+// rs2_val == 2147483648, rs1_val == 17179869184
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x400000000; op2val:0x80000000
+TEST_CR_OP( c.sub, x10, x11, 0x380000000, 0x400000000, 0x80000000, x1, 296, x2)
+
+inst_38:
+// rs2_val == 4294967296, rs1_val == 140737488355328
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x800000000000; op2val:0x100000000
+TEST_CR_OP( c.sub, x10, x11, 0x7fff00000000, 0x800000000000, 0x100000000, x1, 304, x2)
+
+inst_39:
+// rs2_val == 8589934592, rs1_val == 2097152
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x200000; op2val:0x200000000
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe00200000, 0x200000, 0x200000000, x1, 312, x2)
+
+inst_40:
+// rs2_val == 17179869184,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x4; op2val:0x400000000
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffbfffffffc, -0x4, 0x400000000, x1, 320, x2)
+
+inst_41:
+// rs2_val == 34359738368,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x8; op2val:0x800000000
+TEST_CR_OP( c.sub, x10, x11, 0xfffffff7fffffff8, -0x8, 0x800000000, x1, 328, x2)
+
+inst_42:
+// rs2_val == 68719476736,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x1000000001; op2val:0x1000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffffffdfffffffff, -0x1000000001, 0x1000000000, x1, 336, x2)
+
+inst_43:
+// rs2_val == 137438953472, rs1_val == -33554433
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x2000001; op2val:0x2000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffffffdffdffffff, -0x2000001, 0x2000000000, x1, 344, x2)
+
+inst_44:
+// rs2_val == 274877906944, rs1_val == -65
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x41; op2val:0x4000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffffffbfffffffbf, -0x41, 0x4000000000, x1, 352, x2)
+
+inst_45:
+// rs2_val == 549755813888,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x80000000000000; op2val:0x8000000000
+TEST_CR_OP( c.sub, x10, x11, 0x7fff8000000000, 0x80000000000000, 0x8000000000, x1, 360, x2)
+
+inst_46:
+// rs2_val == 1099511627776, rs1_val == 524288
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x80000; op2val:0x10000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffffff0000080000, 0x80000, 0x10000000000, x1, 368, x2)
+
+inst_47:
+// rs2_val == 2199023255552,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x20000000000
+TEST_CR_OP( c.sub, x10, x11, 0xfffffe0000000006, 0x6, 0x20000000000, x1, 376, x2)
+
+inst_48:
+// rs2_val == 4398046511104,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x10000000000001; op2val:0x40000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffeffbffffffffff, -0x10000000000001, 0x40000000000, x1, 384, x2)
+
+inst_49:
+// rs2_val == 8796093022208, rs1_val == 576460752303423488
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x800000000000000; op2val:0x80000000000
+TEST_CR_OP( c.sub, x10, x11, 0x7fff80000000000, 0x800000000000000, 0x80000000000, x1, 392, x2)
+
+inst_50:
+// rs2_val == 17592186044416, rs1_val == -33
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x21; op2val:0x100000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffffefffffffffdf, -0x21, 0x100000000000, x1, 400, x2)
+
+inst_51:
+// rs2_val == 35184372088832,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x7; op2val:0x200000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffffdffffffffff9, -0x7, 0x200000000000, x1, 408, x2)
+
+inst_52:
+// rs2_val == 140737488355328, rs1_val == -32769
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x8001; op2val:0x800000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffff7fffffff7fff, -0x8001, 0x800000000000, x1, 416, x2)
+
+inst_53:
+// rs2_val == 281474976710656, rs1_val == 6148914691236517205
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x1000000000000
+TEST_CR_OP( c.sub, x10, x11, 0x5554555555555555, 0x5555555555555555, 0x1000000000000, x1, 424, x2)
+
+inst_54:
+// rs2_val == 562949953421312, rs1_val == -268435457
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x10000001; op2val:0x2000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xfffdffffefffffff, -0x10000001, 0x2000000000000, x1, 432, x2)
+
+inst_55:
+// rs2_val == 1125899906842624,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x800000000000000; op2val:0x4000000000000
+TEST_CR_OP( c.sub, x10, x11, 0x7fc000000000000, 0x800000000000000, 0x4000000000000, x1, 440, x2)
+
+inst_56:
+// rs2_val == 2251799813685248, rs1_val == 128
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x80; op2val:0x8000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xfff8000000000080, 0x80, 0x8000000000000, x1, 448, x2)
+
+inst_57:
+// rs2_val == 4503599627370496, rs1_val == 67108864
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4000000; op2val:0x10000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xfff0000004000000, 0x4000000, 0x10000000000000, x1, 456, x2)
+
+inst_58:
+// rs2_val == 9007199254740992, rs1_val == -4398046511105
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x40000000001; op2val:0x20000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffdffbffffffffff, -0x40000000001, 0x20000000000000, x1, 464, x2)
+
+inst_59:
+// rs2_val == 18014398509481984, rs1_val == 8796093022208
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x80000000000; op2val:0x40000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffc0080000000000, 0x80000000000, 0x40000000000000, x1, 472, x2)
+
+inst_60:
+// rs2_val == 36028797018963968,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x20000001; op2val:0x80000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xff7fffffdfffffff, -0x20000001, 0x80000000000000, x1, 480, x2)
+
+inst_61:
+// rs2_val == 72057594037927936, rs1_val == -562949953421313
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x2000000000001; op2val:0x100000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xfefdffffffffffff, -0x2000000000001, 0x100000000000000, x1, 488, x2)
+
+inst_62:
+// rs2_val == 144115188075855872, rs1_val == 4194304
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x400000; op2val:0x200000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xfe00000000400000, 0x400000, 0x200000000000000, x1, 496, x2)
+
+inst_63:
+// rs2_val == 288230376151711744,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x400000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xa6aaaaaaaaaaaaab, -0x5555555555555555, 0x400000000000000, x1, 504, x2)
+
+inst_64:
+// rs2_val == 576460752303423488,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x800000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xf7ffffff4afb0cce, -0xb504f332, 0x800000000000000, x1, 512, x2)
+
+inst_65:
+// rs2_val == 1152921504606846976,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x4000000000000000; op2val:0x1000000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xb000000000000000, -0x4000000000000000, 0x1000000000000000, x1, 520, x2)
+
+inst_66:
+// rs2_val == 2305843009213693952,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2000000000000000
+TEST_CR_OP( c.sub, x10, x11, 0x3555555555555554, 0x5555555555555554, 0x2000000000000000, x1, 528, x2)
+
+inst_67:
+// rs2_val == 4611686018427387904,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x10000000; op2val:0x4000000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xc000000010000000, 0x10000000, 0x4000000000000000, x1, 536, x2)
+
+inst_68:
+// rs2_val == -2, rs1_val == -70368744177665
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x400000000001; op2val:-0x2
+TEST_CR_OP( c.sub, x10, x11, 0xffffc00000000001, -0x400000000001, -0x2, x1, 544, x2)
+
+inst_69:
+// rs2_val == -3, rs1_val == 34359738368
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x800000000; op2val:-0x3
+TEST_CR_OP( c.sub, x10, x11, 0x800000003, 0x800000000, -0x3, x1, 552, x2)
+
+inst_70:
+// rs2_val == -5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4000; op2val:-0x5
+TEST_CR_OP( c.sub, x10, x11, 0x4005, 0x4000, -0x5, x1, 560, x2)
+
+inst_71:
+// rs2_val == -9, rs1_val == 536870912
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x20000000; op2val:-0x9
+TEST_CR_OP( c.sub, x10, x11, 0x20000009, 0x20000000, -0x9, x1, 568, x2)
+
+inst_72:
+// rs2_val == -17, rs1_val == 18014398509481984
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x40000000000000; op2val:-0x11
+TEST_CR_OP( c.sub, x10, x11, 0x40000000000011, 0x40000000000000, -0x11, x1, 576, x2)
+
+inst_73:
+// rs2_val == -33,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xa; op2val:-0x21
+TEST_CR_OP( c.sub, x10, x11, 0x17, -0xa, -0x21, x1, 584, x2)
+
+inst_74:
+// rs2_val == -65,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x80000000000; op2val:-0x41
+TEST_CR_OP( c.sub, x10, x11, 0x80000000041, 0x80000000000, -0x41, x1, 592, x2)
+
+inst_75:
+// rs2_val == -257, rs1_val == -2097153
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x200001; op2val:-0x101
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffe00100, -0x200001, -0x101, x1, 600, x2)
+
+inst_76:
+// rs2_val == -513, rs1_val == 549755813888
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x8000000000; op2val:-0x201
+TEST_CR_OP( c.sub, x10, x11, 0x8000000201, 0x8000000000, -0x201, x1, 608, x2)
+
+inst_77:
+// rs2_val == -1025,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x200001; op2val:-0x401
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffe00400, -0x200001, -0x401, x1, 616, x2)
+
+inst_78:
+// rs2_val == -2049,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x801
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555d56, 0x5555555555555555, -0x801, x1, 624, x2)
+
+inst_79:
+// rs2_val == -4097, rs1_val == -288230376151711745
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x400000000000001; op2val:-0x1001
+TEST_CR_OP( c.sub, x10, x11, 0xfc00000000001000, -0x400000000000001, -0x1001, x1, 632, x2)
+
+inst_80:
+// rs2_val == -8193, rs1_val == 8589934592
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x200000000; op2val:-0x2001
+TEST_CR_OP( c.sub, x10, x11, 0x200002001, 0x200000000, -0x2001, x1, 640, x2)
+
+inst_81:
+// rs2_val == -16385, rs1_val == 2
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:-0x4001
+TEST_CR_OP( c.sub, x10, x11, 0x4003, 0x2, -0x4001, x1, 648, x2)
+
+inst_82:
+// rs2_val == -32769,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x8001
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb8ccf, -0xb504f332, -0x8001, x1, 656, x2)
+
+inst_83:
+// rs2_val == -65537,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x80000; op2val:-0x10001
+TEST_CR_OP( c.sub, x10, x11, 0x90001, 0x80000, -0x10001, x1, 664, x2)
+
+inst_84:
+// rs2_val == -131073,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x200001; op2val:-0x20001
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffe20000, -0x200001, -0x20001, x1, 672, x2)
+
+inst_85:
+// rs2_val == -262145,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x800000000000000; op2val:-0x40001
+TEST_CR_OP( c.sub, x10, x11, 0x800000000040001, 0x800000000000000, -0x40001, x1, 680, x2)
+
+inst_86:
+// rs2_val == -524289, rs1_val == -1125899906842625
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x4000000000001; op2val:-0x80001
+TEST_CR_OP( c.sub, x10, x11, 0xfffc000000080000, -0x4000000000001, -0x80001, x1, 688, x2)
+
+inst_87:
+// rs2_val == -1048577,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x10000001; op2val:-0x100001
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffff0100000, -0x10000001, -0x100001, x1, 696, x2)
+
+inst_88:
+// rs2_val == -2097153, rs1_val == -134217729
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x8000001; op2val:-0x200001
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffff8200000, -0x8000001, -0x200001, x1, 704, x2)
+
+inst_89:
+// rs2_val == -4194305, rs1_val == 281474976710656
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x1000000000000; op2val:-0x400001
+TEST_CR_OP( c.sub, x10, x11, 0x1000000400001, 0x1000000000000, -0x400001, x1, 712, x2)
+
+inst_90:
+// rs2_val == -16777217,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x9; op2val:-0x1000001
+TEST_CR_OP( c.sub, x10, x11, 0x100000a, 0x9, -0x1000001, x1, 720, x2)
+
+inst_91:
+// rs2_val == -33554433, rs1_val == -9
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x9; op2val:-0x2000001
+TEST_CR_OP( c.sub, x10, x11, 0x1fffff8, -0x9, -0x2000001, x1, 728, x2)
+
+inst_92:
+// rs2_val == -67108865, rs1_val == 68719476736
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x1000000000; op2val:-0x4000001
+TEST_CR_OP( c.sub, x10, x11, 0x1004000001, 0x1000000000, -0x4000001, x1, 736, x2)
+
+inst_93:
+// rs2_val == -134217729, rs1_val == -17
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x11; op2val:-0x8000001
+TEST_CR_OP( c.sub, x10, x11, 0x7fffff0, -0x11, -0x8000001, x1, 744, x2)
+
+inst_94:
+// rs2_val == -268435457,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x10000001
+TEST_CR_OP( c.sub, x10, x11, 0x6666666676666667, 0x6666666666666666, -0x10000001, x1, 752, x2)
+
+inst_95:
+// rs2_val == -536870913, rs1_val == 1152921504606846976
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x1000000000000000; op2val:-0x20000001
+TEST_CR_OP( c.sub, x10, x11, 0x1000000020000001, 0x1000000000000000, -0x20000001, x1, 760, x2)
+
+inst_96:
+// rs2_val == -1073741825, rs1_val == -274877906945
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x4000000001; op2val:-0x40000001
+TEST_CR_OP( c.sub, x10, x11, 0xffffffc040000000, -0x4000000001, -0x40000001, x1, 768, x2)
+
+inst_97:
+// rs2_val == -2147483649,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:-0x80000001
+TEST_CR_OP( c.sub, x10, x11, 0x80000005, 0x4, -0x80000001, x1, 776, x2)
+
+inst_98:
+// rs2_val == -4294967297,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x7; op2val:-0x100000001
+TEST_CR_OP( c.sub, x10, x11, 0x100000008, 0x7, -0x100000001, x1, 784, x2)
+
+inst_99:
+// rs2_val == -8589934593,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x6; op2val:-0x200000001
+TEST_CR_OP( c.sub, x10, x11, 0x1fffffffb, -0x6, -0x200000001, x1, 792, x2)
+
+inst_100:
+// rs2_val == -17179869185, rs1_val == -3
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x3; op2val:-0x400000001
+TEST_CR_OP( c.sub, x10, x11, 0x3fffffffe, -0x3, -0x400000001, x1, 800, x2)
+
+inst_101:
+// rs2_val == -34359738369,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x21; op2val:-0x800000001
+TEST_CR_OP( c.sub, x10, x11, 0x7ffffffe0, -0x21, -0x800000001, x1, 808, x2)
+
+inst_102:
+// rs2_val == -68719476737,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x1000000001
+TEST_CR_OP( c.sub, x10, x11, 0xf4afb0ccf, -0xb504f332, -0x1000000001, x1, 816, x2)
+
+inst_103:
+// rs2_val == -137438953473, rs1_val == -67108865
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x4000001; op2val:-0x2000000001
+TEST_CR_OP( c.sub, x10, x11, 0x1ffc000000, -0x4000001, -0x2000000001, x1, 824, x2)
+
+inst_104:
+// rs2_val == -274877906945, rs1_val == -281474976710657
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x1000000000001; op2val:-0x4000000001
+TEST_CR_OP( c.sub, x10, x11, 0xffff004000000000, -0x1000000000001, -0x4000000001, x1, 832, x2)
+
+inst_105:
+// rs2_val == -549755813889,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x8000000001
+TEST_CR_OP( c.sub, x10, x11, 0x555555d555555556, 0x5555555555555555, -0x8000000001, x1, 840, x2)
+
+inst_106:
+// rs2_val == -1099511627777, rs1_val == 512
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x200; op2val:-0x10000000001
+TEST_CR_OP( c.sub, x10, x11, 0x10000000201, 0x200, -0x10000000001, x1, 848, x2)
+
+inst_107:
+// rs2_val == -2199023255553, rs1_val == -1048577
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x100001; op2val:-0x20000000001
+TEST_CR_OP( c.sub, x10, x11, 0x1fffff00000, -0x100001, -0x20000000001, x1, 856, x2)
+
+inst_108:
+// rs2_val == -4398046511105, rs1_val == 4611686018427387904
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4000000000000000; op2val:-0x40000000001
+TEST_CR_OP( c.sub, x10, x11, 0x4000040000000001, 0x4000000000000000, -0x40000000001, x1, 864, x2)
+
+inst_109:
+// rs2_val == -8796093022209, rs1_val == -1152921504606846977
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:-0x80000000001
+TEST_CR_OP( c.sub, x10, x11, 0xf000080000000000, -0x1000000000000001, -0x80000000001, x1, 872, x2)
+
+inst_110:
+// rs2_val == -17592186044417,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x800000000000000; op2val:-0x100000000001
+TEST_CR_OP( c.sub, x10, x11, 0x800100000000001, 0x800000000000000, -0x100000000001, x1, 880, x2)
+
+inst_111:
+// rs2_val == -35184372088833, rs1_val == -2305843009213693953
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x2000000000000001; op2val:-0x200000000001
+TEST_CR_OP( c.sub, x10, x11, 0xe000200000000000, -0x2000000000000001, -0x200000000001, x1, 888, x2)
+
+inst_112:
+// rs2_val == -70368744177665,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x100000000000; op2val:-0x400000000001
+TEST_CR_OP( c.sub, x10, x11, 0x500000000001, 0x100000000000, -0x400000000001, x1, 896, x2)
+
+inst_113:
+// rs2_val == -140737488355329, rs1_val == 72057594037927936
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x100000000000000; op2val:-0x800000000001
+TEST_CR_OP( c.sub, x10, x11, 0x100800000000001, 0x100000000000000, -0x800000000001, x1, 904, x2)
+
+inst_114:
+// rs2_val == -281474976710657,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x1000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x5556555555555557, 0x5555555555555556, -0x1000000000001, x1, 912, x2)
+
+inst_115:
+// rs2_val == -562949953421313,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:-0x2000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x2000000000004, 0x3, -0x2000000000001, x1, 920, x2)
+
+inst_116:
+// rs2_val == -1125899906842625, rs1_val == 2251799813685248
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x8000000000000; op2val:-0x4000000000001
+TEST_CR_OP( c.sub, x10, x11, 0xc000000000001, 0x8000000000000, -0x4000000000001, x1, 928, x2)
+
+inst_117:
+// rs2_val == -2251799813685249,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:-0x8000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x8000000000001, 0x0, -0x8000000000001, x1, 936, x2)
+
+inst_118:
+// rs2_val == -4503599627370497,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x1000; op2val:-0x10000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x10000000001001, 0x1000, -0x10000000000001, x1, 944, x2)
+
+inst_119:
+// rs2_val == -9007199254740993,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:-0x20000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x20000000000003, 0x2, -0x20000000000001, x1, 952, x2)
+
+inst_120:
+// rs2_val == -18014398509481985,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x40000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x400000b504f335, 0xb504f334, -0x40000000000001, x1, 960, x2)
+
+inst_121:
+// rs2_val == -36028797018963969,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x1000000001; op2val:-0x80000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x7ffff000000000, -0x1000000001, -0x80000000000001, x1, 968, x2)
+
+inst_122:
+// rs2_val == -72057594037927937,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x800000000000000; op2val:-0x100000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x900000000000001, 0x800000000000000, -0x100000000000001, x1, 976, x2)
+
+inst_123:
+// rs2_val == -144115188075855873,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x400000000; op2val:-0x200000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x200000400000001, 0x400000000, -0x200000000000001, x1, 984, x2)
+
+inst_124:
+// rs2_val == -288230376151711745,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x400000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x5955555555555557, 0x5555555555555556, -0x400000000000001, x1, 992, x2)
+
+inst_125:
+// rs2_val == -576460752303423489, rs1_val == 16777216
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x1000000; op2val:-0x800000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x800000001000001, 0x1000000, -0x800000000000001, x1, 1000, x2)
+
+inst_126:
+// rs2_val == -1152921504606846977,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x1000000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x6555555555555556, 0x5555555555555555, -0x1000000000000001, x1, 1008, x2)
+
+inst_127:
+// rs2_val == -2305843009213693953,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:-0x2000000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x2000000000000005, 0x4, -0x2000000000000001, x1, 1016, x2)
+
+inst_128:
+// rs2_val == -4611686018427387905, rs1_val == 32
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x20; op2val:-0x4000000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x4000000000000021, 0x20, -0x4000000000000001, x1, 1024, x2)
+
+inst_129:
+// rs2_val == 6148914691236517205, rs1_val == 1099511627776
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x10000000000; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaabaaaaaaaaab, 0x10000000000, 0x5555555555555555, x1, 1032, x2)
+
+inst_130:
+// rs2_val == -6148914691236517206, rs1_val==3689348814741910323 and rs2_val==-6148914691236517206
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x8888888888888889, 0x3333333333333333, -0x5555555555555556, x1, 1040, x2)
+
+inst_131:
+// rs1_val == 8,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x8; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cd5, 0x8, 0xb504f333, x1, 1048, x2)
+
+inst_132:
+// rs1_val == 16,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x10; op2val:0x20
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffff0, 0x10, 0x20, x1, 1056, x2)
+
+inst_133:
+// rs1_val == 64,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x40; op2val:0x10
+TEST_CR_OP( c.sub, x10, x11, 0x30, 0x40, 0x10, x1, 1064, x2)
+
+inst_134:
+// rs1_val == 256,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x100; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xb504f433, 0x100, -0xb504f333, x1, 1072, x2)
+
+inst_135:
+// rs1_val == 1024,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x400; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x400, 0x400, 0x0, x1, 1080, x2)
+
+inst_136:
+// rs1_val == 8192,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2000; op2val:0x20000000000
+TEST_CR_OP( c.sub, x10, x11, 0xfffffe0000002000, 0x2000, 0x20000000000, x1, 1088, x2)
+
+inst_137:
+// rs1_val == 32768,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x8000; op2val:0x40
+TEST_CR_OP( c.sub, x10, x11, 0x7fc0, 0x8000, 0x40, x1, 1096, x2)
+
+inst_138:
+// rs1_val == 65536,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x10000; op2val:0x400000000
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffc00010000, 0x10000, 0x400000000, x1, 1104, x2)
+
+inst_139:
+// rs1_val == 131072,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x20000; op2val:0x800000000
+TEST_CR_OP( c.sub, x10, x11, 0xfffffff800020000, 0x20000, 0x800000000, x1, 1112, x2)
+
+inst_140:
+// rs1_val == 262144,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x40000; op2val:-0x4000000001
+TEST_CR_OP( c.sub, x10, x11, 0x4000040001, 0x40000, -0x4000000001, x1, 1120, x2)
+
+inst_141:
+// rs1_val == 1048576,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x100000; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x9999999999a9999b, 0x100000, 0x6666666666666665, x1, 1128, x2)
+
+inst_142:
+// rs1_val == 8388608,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x800000; op2val:0x8000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffffff8000800000, 0x800000, 0x8000000000, x1, 1136, x2)
+
+inst_143:
+// rs1_val == 33554432,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2000000; op2val:-0x8000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x8000002000001, 0x2000000, -0x8000000000001, x1, 1144, x2)
+
+inst_144:
+// rs1_val == 134217728,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x8000000; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaab2aaaaab, 0x8000000, 0x5555555555555555, x1, 1152, x2)
+
+inst_145:
+// rs1_val == 1073741824,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x40000000; op2val:-0x4000001
+TEST_CR_OP( c.sub, x10, x11, 0x44000001, 0x40000000, -0x4000001, x1, 1160, x2)
+
+inst_146:
+// rs1_val == 2147483648,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x80000000; op2val:0x80000
+TEST_CR_OP( c.sub, x10, x11, 0x7ff80000, 0x80000000, 0x80000, x1, 1168, x2)
+
+inst_147:
+// rs1_val == 4294967296,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x100000000; op2val:-0x4000001
+TEST_CR_OP( c.sub, x10, x11, 0x104000001, 0x100000000, -0x4000001, x1, 1176, x2)
+
+inst_148:
+// rs1_val == 137438953472,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2000000000; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccccceccccccccd, 0x2000000000, 0x3333333333333333, x1, 1184, x2)
+
+inst_149:
+// rs1_val == 274877906944,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4000000000; op2val:-0x2
+TEST_CR_OP( c.sub, x10, x11, 0x4000000002, 0x4000000000, -0x2, x1, 1192, x2)
+
+inst_150:
+// rs1_val == 2199023255552,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x20000000000; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x1fffffffffd, 0x20000000000, 0x3, x1, 1200, x2)
+
+inst_151:
+// rs1_val == 4398046511104,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x40000000000; op2val:-0x8000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x8040000000001, 0x40000000000, -0x8000000000001, x1, 1208, x2)
+
+inst_152:
+// rs1_val == 70368744177664,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x400000000000; op2val:0x400000000000
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x400000000000, 0x400000000000, x1, 1216, x2)
+
+inst_153:
+// rs1_val == 1125899906842624,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4000000000000; op2val:0x400
+TEST_CR_OP( c.sub, x10, x11, 0x3fffffffffc00, 0x4000000000000, 0x400, x1, 1224, x2)
+
+inst_154:
+// rs1_val == 4503599627370496,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x10000000000000; op2val:0x80000000000
+TEST_CR_OP( c.sub, x10, x11, 0xff80000000000, 0x10000000000000, 0x80000000000, x1, 1232, x2)
+
+inst_155:
+// rs1_val == 9007199254740992,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x20000000000000; op2val:-0x800001
+TEST_CR_OP( c.sub, x10, x11, 0x20000000800001, 0x20000000000000, -0x800001, x1, 1240, x2)
+
+inst_156:
+// rs1_val == 144115188075855872,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x200000000000000; op2val:-0x1000001
+TEST_CR_OP( c.sub, x10, x11, 0x200000001000001, 0x200000000000000, -0x1000001, x1, 1248, x2)
+
+inst_157:
+// rs1_val == 2305843009213693952,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2000000000000000; op2val:-0x20000000000001
+TEST_CR_OP( c.sub, x10, x11, 0x2020000000000001, 0x2000000000000000, -0x20000000000001, x1, 1256, x2)
+
+inst_158:
+// rs1_val == -2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x2; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cca, -0x2, 0xb504f334, x1, 1264, x2)
+
+inst_159:
+// rs1_val == -129,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x81; op2val:0x7
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffff78, -0x81, 0x7, x1, 1272, x2)
+
+inst_160:
+// rs1_val == -257,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x101; op2val:-0x401
+TEST_CR_OP( c.sub, x10, x11, 0x300, -0x101, -0x401, x1, 1280, x2)
+
+inst_161:
+// rs1_val == -513,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x201; op2val:0x10
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffdef, -0x201, 0x10, x1, 1288, x2)
+
+inst_162:
+// rs1_val == -1025,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x401; op2val:0x40000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffbffffffffffbff, -0x401, 0x40000000000000, x1, 1296, x2)
+
+inst_163:
+// rs1_val == -2049,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x801; op2val:0x100000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xfefffffffffff7ff, -0x801, 0x100000000000000, x1, 1304, x2)
+
+inst_164:
+// rs1_val == -4097,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x1001; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffeffd, -0x1001, 0x2, x1, 1312, x2)
+
+inst_165:
+// rs1_val == -8193,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x2001; op2val:-0x1000000000001
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffe000, -0x2001, -0x1000000000001, x1, 1320, x2)
+
+inst_166:
+// rs1_val == -16385,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x4001; op2val:-0x40000000001
+TEST_CR_OP( c.sub, x10, x11, 0x3ffffffc000, -0x4001, -0x40000000001, x1, 1328, x2)
+
+inst_167:
+// rs1_val == -65537,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x10001; op2val:-0x20000001
+TEST_CR_OP( c.sub, x10, x11, 0x1fff0000, -0x10001, -0x20000001, x1, 1336, x2)
+
+inst_168:
+// rs1_val == -131073,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x20001; op2val:-0x100000000000001
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffe0000, -0x20001, -0x100000000000001, x1, 1344, x2)
+
+inst_169:
+// rs1_val == -262145,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x40001; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x999999999995999a, -0x40001, 0x6666666666666665, x1, 1352, x2)
+
+inst_170:
+// rs1_val == -524289,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x80001; op2val:0x7fffffffffffffff
+TEST_CR_OP( c.sub, x10, x11, 0x7ffffffffff80000, -0x80001, 0x7fffffffffffffff, x1, 1360, x2)
+
+inst_171:
+// rs1_val == -4194305,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x400001; op2val:-0x6
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffc00005, -0x400001, -0x6, x1, 1368, x2)
+
+inst_172:
+// rs1_val == -8388609,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x800001; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xb484f331, -0x800001, -0xb504f332, x1, 1376, x2)
+
+inst_173:
+// rs1_val == -1073741825,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x40000001; op2val:0x200000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffffdfffbfffffff, -0x40000001, 0x200000000000, x1, 1384, x2)
+
+inst_174:
+// rs1_val == -17179869185,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x400000001; op2val:0x400000000000000
+TEST_CR_OP( c.sub, x10, x11, 0xfbfffffbffffffff, -0x400000001, 0x400000000000000, x1, 1392, x2)
+
+inst_175:
+// rs1_val == -34359738369,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x800000001; op2val:-0x4000001
+TEST_CR_OP( c.sub, x10, x11, 0xfffffff804000000, -0x800000001, -0x4000001, x1, 1400, x2)
+
+inst_176:
+// rs1_val == -137438953473,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x2000000001; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xffffffdffffffff9, -0x2000000001, 0x6, x1, 1408, x2)
+
+inst_177:
+// rs1_val == -2199023255553,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x20000000001; op2val:-0x10001
+TEST_CR_OP( c.sub, x10, x11, 0xfffffe0000010000, -0x20000000001, -0x10001, x1, 1416, x2)
+
+inst_178:
+// rs1_val == -8796093022209,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x80000000001; op2val:0x80000000000
+TEST_CR_OP( c.sub, x10, x11, 0xffffefffffffffff, -0x80000000001, 0x80000000000, x1, 1424, x2)
+
+inst_179:
+// rs1_val == -17592186044417,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x100000000001; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x5555455555555554, -0x100000000001, -0x5555555555555555, x1, 1432, x2)
+
+inst_180:
+// rs1_val == -140737488355329,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x800000000001; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xffff8000b504f332, -0x800000000001, -0xb504f333, x1, 1440, x2)
+
+inst_181:
+// rs1_val == -9007199254740993,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x20000000000001; op2val:-0x400001
+TEST_CR_OP( c.sub, x10, x11, 0xffe0000000400000, -0x20000000000001, -0x400001, x1, 1448, x2)
+
+inst_182:
+// rs1_val == -18014398509481985,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x40000000000001; op2val:0x100
+TEST_CR_OP( c.sub, x10, x11, 0xffbffffffffffeff, -0x40000000000001, 0x100, x1, 1456, x2)
+
+inst_183:
+// rs1_val == -36028797018963969,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x80000000000001; op2val:-0x21
+TEST_CR_OP( c.sub, x10, x11, 0xff80000000000020, -0x80000000000001, -0x21, x1, 1464, x2)
+
+inst_184:
+// rs1_val == -72057594037927937,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x100000000000001; op2val:-0x401
+TEST_CR_OP( c.sub, x10, x11, 0xff00000000000400, -0x100000000000001, -0x401, x1, 1472, x2)
+
+inst_185:
+// rs1_val == -144115188075855873,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x200000000000001; op2val:0x1000000
+TEST_CR_OP( c.sub, x10, x11, 0xfdfffffffeffffff, -0x200000000000001, 0x1000000, x1, 1480, x2)
+
+inst_186:
+// rs1_val == -576460752303423489,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x800000000000001; op2val:-0x801
+TEST_CR_OP( c.sub, x10, x11, 0xf800000000000800, -0x800000000000001, -0x801, x1, 1488, x2)
+
+inst_187:
+// rs1_val == -4611686018427387905,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x4000000000000001; op2val:0x80000
+TEST_CR_OP( c.sub, x10, x11, 0xbffffffffff7ffff, -0x4000000000000001, 0x80000, x1, 1496, x2)
+
+inst_188:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206 and rs2_val==4
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaa6, -0x5555555555555556, 0x4, x1, 1504, x2)
+
+inst_189:
+// rs1_val==3 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x3, 0x3, x1, 1512, x2)
+
+inst_190:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaae, 0x3, 0x5555555555555555, x1, 1520, x2)
+
+inst_191:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555559, 0x3, -0x5555555555555556, x1, 1528, x2)
+
+inst_192:
+// rs1_val==3 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffe, 0x3, 0x5, x1, 1536, x2)
+
+inst_193:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccd0, 0x3, 0x3333333333333333, x1, 1544, x2)
+
+inst_194:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999d, 0x3, 0x6666666666666666, x1, 1552, x2)
+
+inst_195:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xb504f336, 0x3, -0xb504f333, x1, 1560, x2)
+
+inst_196:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cd0, 0x3, 0xb504f333, x1, 1568, x2)
+
+inst_197:
+// rs1_val==3 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x3, 0x2, x1, 1576, x2)
+
+inst_198:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x3, 0x5555555555555554, x1, 1584, x2)
+
+inst_199:
+// rs1_val==3 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x3, 0x3, 0x0, x1, 1592, x2)
+
+inst_200:
+// rs1_val==3 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, 0x3, 0x4, x1, 1600, x2)
+
+inst_201:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccd1, 0x3, 0x3333333333333332, x1, 1608, x2)
+
+inst_202:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999e, 0x3, 0x6666666666666665, x1, 1616, x2)
+
+inst_203:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cd1, 0x3, 0xb504f332, x1, 1624, x2)
+
+inst_204:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaad, 0x3, 0x5555555555555556, x1, 1632, x2)
+
+inst_205:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555558, 0x3, -0x5555555555555555, x1, 1640, x2)
+
+inst_206:
+// rs1_val==3 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffd, 0x3, 0x6, x1, 1648, x2)
+
+inst_207:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccccccccccf, 0x3, 0x3333333333333334, x1, 1656, x2)
+
+inst_208:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999c, 0x3, 0x6666666666666667, x1, 1664, x2)
+
+inst_209:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xb504f335, 0x3, -0xb504f332, x1, 1672, x2)
+
+inst_210:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0ccf, 0x3, 0xb504f334, x1, 1680, x2)
+
+inst_211:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555552, 0x5555555555555555, 0x3, x1, 1688, x2)
+
+inst_212:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x5555555555555555, 0x5555555555555555, x1, 1696, x2)
+
+inst_213:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555555, -0x5555555555555556, x1, 1704, x2)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555550, 0x5555555555555555, 0x5, x1, 1712, x2)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0x2222222222222222, 0x5555555555555555, 0x3333333333333333, x1, 1720, x2)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeeeeeeeeeef, 0x5555555555555555, 0x6666666666666666, x1, 1728, x2)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x555555560a5a4888, 0x5555555555555555, -0xb504f333, x1, 1736, x2)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x55555554a0506222, 0x5555555555555555, 0xb504f333, x1, 1744, x2)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555553, 0x5555555555555555, 0x2, x1, 1752, x2)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x5555555555555555, 0x5555555555555554, x1, 1760, x2)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x0, x1, 1768, x2)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555551, 0x5555555555555555, 0x4, x1, 1776, x2)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0x2222222222222223, 0x5555555555555555, 0x3333333333333332, x1, 1784, x2)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeeeeeeeeef0, 0x5555555555555555, 0x6666666666666665, x1, 1792, x2)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x55555554a0506223, 0x5555555555555555, 0xb504f332, x1, 1800, x2)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, 0x5555555555555555, 0x5555555555555556, x1, 1808, x2)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555555, -0x5555555555555555, x1, 1816, x2)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x555555555555554f, 0x5555555555555555, 0x6, x1, 1824, x2)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0x2222222222222221, 0x5555555555555555, 0x3333333333333334, x1, 1832, x2)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeeeeeeeeeee, 0x5555555555555555, 0x6666666666666667, x1, 1840, x2)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x555555560a5a4887, 0x5555555555555555, -0xb504f332, x1, 1848, x2)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0x55555554a0506221, 0x5555555555555555, 0xb504f334, x1, 1856, x2)
+
+inst_233:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaa7, -0x5555555555555556, 0x3, x1, 1864, x2)
+
+inst_234:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555555, -0x5555555555555556, 0x5555555555555555, x1, 1872, x2)
+
+inst_235:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x0, -0x5555555555555556, -0x5555555555555556, x1, 1880, x2)
+
+inst_236:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaa5, -0x5555555555555556, 0x5, x1, 1888, x2)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0x7777777777777777, -0x5555555555555556, 0x3333333333333333, x1, 1896, x2)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x4444444444444444, -0x5555555555555556, 0x6666666666666666, x1, 1904, x2)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab5faf9ddd, -0x5555555555555556, -0xb504f333, x1, 1912, x2)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9f5a5b777, -0x5555555555555556, 0xb504f333, x1, 1920, x2)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaa8, -0x5555555555555556, 0x2, x1, 1928, x2)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555556, -0x5555555555555556, 0x5555555555555554, x1, 1936, x2)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x0, x1, 1944, x2)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0x7777777777777778, -0x5555555555555556, 0x3333333333333332, x1, 1952, x2)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x4444444444444445, -0x5555555555555556, 0x6666666666666665, x1, 1960, x2)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9f5a5b778, -0x5555555555555556, 0xb504f332, x1, 1968, x2)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555554, -0x5555555555555556, 0x5555555555555556, x1, 1976, x2)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, -0x5555555555555556, -0x5555555555555555, x1, 1984, x2)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaa4, -0x5555555555555556, 0x6, x1, 1992, x2)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0x7777777777777776, -0x5555555555555556, 0x3333333333333334, x1, 2000, x2)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x4444444444444443, -0x5555555555555556, 0x6666666666666667, x1, 2008, x2)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab5faf9ddc, -0x5555555555555556, -0xb504f332, x1, 2016, x2)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9f5a5b776, -0x5555555555555556, 0xb504f334, x1, 2024, x2)
+
+inst_254:
+// rs1_val==5 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x5, 0x3, x1, 2032, x2)
+
+inst_255:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaab0, 0x5, 0x5555555555555555, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_256:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x555555555555555b, 0x5, -0x5555555555555556, x1, 0, x2)
+
+inst_257:
+// rs1_val==5 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x5, 0x5, x1, 8, x2)
+
+inst_258:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccd2, 0x5, 0x3333333333333333, x1, 16, x2)
+
+inst_259:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999f, 0x5, 0x6666666666666666, x1, 24, x2)
+
+inst_260:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xb504f338, 0x5, -0xb504f333, x1, 32, x2)
+
+inst_261:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cd2, 0x5, 0xb504f333, x1, 40, x2)
+
+inst_262:
+// rs1_val==5 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x3, 0x5, 0x2, x1, 48, x2)
+
+inst_263:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaab1, 0x5, 0x5555555555555554, x1, 56, x2)
+
+inst_264:
+// rs1_val==5 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x5, 0x5, 0x0, x1, 64, x2)
+
+inst_265:
+// rs1_val==5 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x5, 0x4, x1, 72, x2)
+
+inst_266:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccd3, 0x5, 0x3333333333333332, x1, 80, x2)
+
+inst_267:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x99999999999999a0, 0x5, 0x6666666666666665, x1, 88, x2)
+
+inst_268:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cd3, 0x5, 0xb504f332, x1, 96, x2)
+
+inst_269:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x5, 0x5555555555555556, x1, 104, x2)
+
+inst_270:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x555555555555555a, 0x5, -0x5555555555555555, x1, 112, x2)
+
+inst_271:
+// rs1_val==5 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, 0x5, 0x6, x1, 120, x2)
+
+inst_272:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccd1, 0x5, 0x3333333333333334, x1, 128, x2)
+
+inst_273:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999e, 0x5, 0x6666666666666667, x1, 136, x2)
+
+inst_274:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xb504f337, 0x5, -0xb504f332, x1, 144, x2)
+
+inst_275:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cd1, 0x5, 0xb504f334, x1, 152, x2)
+
+inst_276:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333330, 0x3333333333333333, 0x3, x1, 160, x2)
+
+inst_277:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xddddddddddddddde, 0x3333333333333333, 0x5555555555555555, x1, 168, x2)
+
+inst_278:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x333333333333332e, 0x3333333333333333, 0x5, x1, 176, x2)
+
+inst_279:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x3333333333333333, 0x3333333333333333, x1, 184, x2)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccccccccccd, 0x3333333333333333, 0x6666666666666666, x1, 192, x2)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x33333333e8382666, 0x3333333333333333, -0xb504f333, x1, 200, x2)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x333333327e2e4000, 0x3333333333333333, 0xb504f333, x1, 208, x2)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333331, 0x3333333333333333, 0x2, x1, 216, x2)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xdddddddddddddddf, 0x3333333333333333, 0x5555555555555554, x1, 224, x2)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x0, x1, 232, x2)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x333333333333332f, 0x3333333333333333, 0x4, x1, 240, x2)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x3333333333333333, 0x3333333333333332, x1, 248, x2)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccce, 0x3333333333333333, 0x6666666666666665, x1, 256, x2)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x333333327e2e4001, 0x3333333333333333, 0xb504f332, x1, 264, x2)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xdddddddddddddddd, 0x3333333333333333, 0x5555555555555556, x1, 272, x2)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x8888888888888888, 0x3333333333333333, -0x5555555555555555, x1, 280, x2)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x333333333333332d, 0x3333333333333333, 0x6, x1, 288, x2)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, 0x3333333333333333, 0x3333333333333334, x1, 296, x2)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccccccccccc, 0x3333333333333333, 0x6666666666666667, x1, 304, x2)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x33333333e8382665, 0x3333333333333333, -0xb504f332, x1, 312, x2)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0x333333327e2e3fff, 0x3333333333333333, 0xb504f334, x1, 320, x2)
+
+inst_297:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666663, 0x6666666666666666, 0x3, x1, 328, x2)
+
+inst_298:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x1111111111111111, 0x6666666666666666, 0x5555555555555555, x1, 336, x2)
+
+inst_299:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xbbbbbbbbbbbbbbbc, 0x6666666666666666, -0x5555555555555556, x1, 344, x2)
+
+inst_300:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666661, 0x6666666666666666, 0x5, x1, 352, x2)
+
+inst_301:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333333, 0x6666666666666666, 0x3333333333333333, x1, 360, x2)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x6666666666666666, 0x6666666666666666, x1, 368, x2)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x666666671b6b5999, 0x6666666666666666, -0xb504f333, x1, 376, x2)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x66666665b1617333, 0x6666666666666666, 0xb504f333, x1, 384, x2)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666664, 0x6666666666666666, 0x2, x1, 392, x2)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0x1111111111111112, 0x6666666666666666, 0x5555555555555554, x1, 400, x2)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x0, x1, 408, x2)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666662, 0x6666666666666666, 0x4, x1, 416, x2)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333334, 0x6666666666666666, 0x3333333333333332, x1, 424, x2)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x6666666666666666, 0x6666666666666665, x1, 432, x2)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x66666665b1617334, 0x6666666666666666, 0xb504f332, x1, 440, x2)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x1111111111111110, 0x6666666666666666, 0x5555555555555556, x1, 448, x2)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x6666666666666666, -0x5555555555555555, x1, 456, x2)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666660, 0x6666666666666666, 0x6, x1, 464, x2)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333332, 0x6666666666666666, 0x3333333333333334, x1, 472, x2)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, 0x6666666666666666, 0x6666666666666667, x1, 480, x2)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x666666671b6b5998, 0x6666666666666666, -0xb504f332, x1, 488, x2)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0x66666665b1617332, 0x6666666666666666, 0xb504f334, x1, 496, x2)
+
+inst_319:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cca, -0xb504f333, 0x3, x1, 504, x2)
+
+inst_320:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9f5a5b778, -0xb504f333, 0x5555555555555555, x1, 512, x2)
+
+inst_321:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x55555554a0506223, -0xb504f333, -0x5555555555555556, x1, 520, x2)
+
+inst_322:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cc8, -0xb504f333, 0x5, x1, 528, x2)
+
+inst_323:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccc17c7d99a, -0xb504f333, 0x3333333333333333, x1, 536, x2)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x99999998e494a667, -0xb504f333, 0x6666666666666666, x1, 544, x2)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x0, -0xb504f333, -0xb504f333, x1, 552, x2)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe95f6199a, -0xb504f333, 0xb504f333, x1, 560, x2)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0ccb, -0xb504f333, 0x2, x1, 568, x2)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9f5a5b779, -0xb504f333, 0x5555555555555554, x1, 576, x2)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x0, x1, 584, x2)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cc9, -0xb504f333, 0x4, x1, 592, x2)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccc17c7d99b, -0xb504f333, 0x3333333333333332, x1, 600, x2)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x99999998e494a668, -0xb504f333, 0x6666666666666665, x1, 608, x2)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe95f6199b, -0xb504f333, 0xb504f332, x1, 616, x2)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9f5a5b777, -0xb504f333, 0x5555555555555556, x1, 624, x2)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x55555554a0506222, -0xb504f333, -0x5555555555555555, x1, 632, x2)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cc7, -0xb504f333, 0x6, x1, 640, x2)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccc17c7d999, -0xb504f333, 0x3333333333333334, x1, 648, x2)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x99999998e494a666, -0xb504f333, 0x6666666666666667, x1, 656, x2)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, -0xb504f333, -0xb504f332, x1, 664, x2)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe95f61999, -0xb504f333, 0xb504f334, x1, 672, x2)
+
+inst_341:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xb504f330, 0xb504f333, 0x3, x1, 680, x2)
+
+inst_342:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab5faf9dde, 0xb504f333, 0x5555555555555555, x1, 688, x2)
+
+inst_343:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x555555560a5a4889, 0xb504f333, -0x5555555555555556, x1, 696, x2)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xb504f32e, 0xb504f333, 0x5, x1, 704, x2)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccd81d1c000, 0xb504f333, 0x3333333333333333, x1, 712, x2)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x9999999a4e9e8ccd, 0xb504f333, 0x6666666666666666, x1, 720, x2)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x16a09e666, 0xb504f333, -0xb504f333, x1, 728, x2)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0xb504f333, 0xb504f333, x1, 736, x2)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xb504f331, 0xb504f333, 0x2, x1, 744, x2)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab5faf9ddf, 0xb504f333, 0x5555555555555554, x1, 752, x2)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xb504f333, 0xb504f333, 0x0, x1, 760, x2)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xb504f32f, 0xb504f333, 0x4, x1, 768, x2)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccd81d1c001, 0xb504f333, 0x3333333333333332, x1, 776, x2)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x9999999a4e9e8cce, 0xb504f333, 0x6666666666666665, x1, 784, x2)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0xb504f333, 0xb504f332, x1, 792, x2)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab5faf9ddd, 0xb504f333, 0x5555555555555556, x1, 800, x2)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x555555560a5a4888, 0xb504f333, -0x5555555555555555, x1, 808, x2)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xb504f32d, 0xb504f333, 0x6, x1, 816, x2)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccd81d1bfff, 0xb504f333, 0x3333333333333334, x1, 824, x2)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x9999999a4e9e8ccc, 0xb504f333, 0x6666666666666667, x1, 832, x2)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x16a09e665, 0xb504f333, -0xb504f332, x1, 840, x2)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, 0xb504f333, 0xb504f334, x1, 848, x2)
+
+inst_363:
+// rs1_val==2 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, 0x2, 0x3, x1, 856, x2)
+
+inst_364:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaad, 0x2, 0x5555555555555555, x1, 864, x2)
+
+inst_365:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555558, 0x2, -0x5555555555555556, x1, 872, x2)
+
+inst_366:
+// rs1_val==2 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffd, 0x2, 0x5, x1, 880, x2)
+
+inst_367:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccccccccccf, 0x2, 0x3333333333333333, x1, 888, x2)
+
+inst_368:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999c, 0x2, 0x6666666666666666, x1, 896, x2)
+
+inst_369:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xb504f335, 0x2, -0xb504f333, x1, 904, x2)
+
+inst_370:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0ccf, 0x2, 0xb504f333, x1, 912, x2)
+
+inst_371:
+// rs1_val==2 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x2, 0x2, x1, 920, x2)
+
+inst_372:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaae, 0x2, 0x5555555555555554, x1, 928, x2)
+
+inst_373:
+// rs1_val==2 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x2, 0x0, x1, 936, x2)
+
+inst_374:
+// rs1_val==2 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffe, 0x2, 0x4, x1, 944, x2)
+
+inst_375:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccd0, 0x2, 0x3333333333333332, x1, 952, x2)
+
+inst_376:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999d, 0x2, 0x6666666666666665, x1, 960, x2)
+
+inst_377:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cd0, 0x2, 0xb504f332, x1, 968, x2)
+
+inst_378:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaac, 0x2, 0x5555555555555556, x1, 976, x2)
+
+inst_379:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555557, 0x2, -0x5555555555555555, x1, 984, x2)
+
+inst_380:
+// rs1_val==2 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffc, 0x2, 0x6, x1, 992, x2)
+
+inst_381:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccce, 0x2, 0x3333333333333334, x1, 1000, x2)
+
+inst_382:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999b, 0x2, 0x6666666666666667, x1, 1008, x2)
+
+inst_383:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xb504f334, 0x2, -0xb504f332, x1, 1016, x2)
+
+inst_384:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cce, 0x2, 0xb504f334, x1, 1024, x2)
+
+inst_385:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555551, 0x5555555555555554, 0x3, x1, 1032, x2)
+
+inst_386:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, 0x5555555555555554, 0x5555555555555555, x1, 1040, x2)
+
+inst_387:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555554, -0x5555555555555556, x1, 1048, x2)
+
+inst_388:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x555555555555554f, 0x5555555555555554, 0x5, x1, 1056, x2)
+
+inst_389:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0x2222222222222221, 0x5555555555555554, 0x3333333333333333, x1, 1064, x2)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeeeeeeeeeee, 0x5555555555555554, 0x6666666666666666, x1, 1072, x2)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x555555560a5a4887, 0x5555555555555554, -0xb504f333, x1, 1080, x2)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x55555554a0506221, 0x5555555555555554, 0xb504f333, x1, 1088, x2)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555552, 0x5555555555555554, 0x2, x1, 1096, x2)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x5555555555555554, 0x5555555555555554, x1, 1104, x2)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x0, x1, 1112, x2)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555550, 0x5555555555555554, 0x4, x1, 1120, x2)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0x2222222222222222, 0x5555555555555554, 0x3333333333333332, x1, 1128, x2)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeeeeeeeeeef, 0x5555555555555554, 0x6666666666666665, x1, 1136, x2)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x55555554a0506222, 0x5555555555555554, 0xb504f332, x1, 1144, x2)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffe, 0x5555555555555554, 0x5555555555555556, x1, 1152, x2)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5555555555555554, -0x5555555555555555, x1, 1160, x2)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x555555555555554e, 0x5555555555555554, 0x6, x1, 1168, x2)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0x2222222222222220, 0x5555555555555554, 0x3333333333333334, x1, 1176, x2)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeeeeeeeeeed, 0x5555555555555554, 0x6666666666666667, x1, 1184, x2)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x555555560a5a4886, 0x5555555555555554, -0xb504f332, x1, 1192, x2)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0x55555554a0506220, 0x5555555555555554, 0xb504f334, x1, 1200, x2)
+
+inst_407:
+// rs1_val==0 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffd, 0x0, 0x3, x1, 1208, x2)
+
+inst_408:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaab, 0x0, 0x5555555555555555, x1, 1216, x2)
+
+inst_409:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555556, 0x0, -0x5555555555555556, x1, 1224, x2)
+
+inst_410:
+// rs1_val==0 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffb, 0x0, 0x5, x1, 1232, x2)
+
+inst_411:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccccccccccd, 0x0, 0x3333333333333333, x1, 1240, x2)
+
+inst_412:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999a, 0x0, 0x6666666666666666, x1, 1248, x2)
+
+inst_413:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xb504f333, 0x0, -0xb504f333, x1, 1256, x2)
+
+inst_414:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0ccd, 0x0, 0xb504f333, x1, 1264, x2)
+
+inst_415:
+// rs1_val==0 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffe, 0x0, 0x2, x1, 1272, x2)
+
+inst_416:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x555555555555555a, 0x4, -0x5555555555555556, x1, 1280, x2)
+
+inst_417:
+// rs1_val==4 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, 0x4, 0x5, x1, 1288, x2)
+
+inst_418:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccd1, 0x4, 0x3333333333333333, x1, 1296, x2)
+
+inst_419:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999e, 0x4, 0x6666666666666666, x1, 1304, x2)
+
+inst_420:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xb504f337, 0x4, -0xb504f333, x1, 1312, x2)
+
+inst_421:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cd1, 0x4, 0xb504f333, x1, 1320, x2)
+
+inst_422:
+// rs1_val==4 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x4, 0x2, x1, 1328, x2)
+
+inst_423:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaab0, 0x4, 0x5555555555555554, x1, 1336, x2)
+
+inst_424:
+// rs1_val==4 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x4, 0x4, 0x0, x1, 1344, x2)
+
+inst_425:
+// rs1_val==4 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x4, 0x4, x1, 1352, x2)
+
+inst_426:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccd2, 0x4, 0x3333333333333332, x1, 1360, x2)
+
+inst_427:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999f, 0x4, 0x6666666666666665, x1, 1368, x2)
+
+inst_428:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cd2, 0x4, 0xb504f332, x1, 1376, x2)
+
+inst_429:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaae, 0x4, 0x5555555555555556, x1, 1384, x2)
+
+inst_430:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555559, 0x4, -0x5555555555555555, x1, 1392, x2)
+
+inst_431:
+// rs1_val==4 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffe, 0x4, 0x6, x1, 1400, x2)
+
+inst_432:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccd0, 0x4, 0x3333333333333334, x1, 1408, x2)
+
+inst_433:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999d, 0x4, 0x6666666666666667, x1, 1416, x2)
+
+inst_434:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xb504f336, 0x4, -0xb504f332, x1, 1424, x2)
+
+inst_435:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cd0, 0x4, 0xb504f334, x1, 1432, x2)
+
+inst_436:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x333333333333332f, 0x3333333333333332, 0x3, x1, 1440, x2)
+
+inst_437:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xdddddddddddddddd, 0x3333333333333332, 0x5555555555555555, x1, 1448, x2)
+
+inst_438:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x8888888888888888, 0x3333333333333332, -0x5555555555555556, x1, 1456, x2)
+
+inst_439:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x333333333333332d, 0x3333333333333332, 0x5, x1, 1464, x2)
+
+inst_440:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, 0x3333333333333332, 0x3333333333333333, x1, 1472, x2)
+
+inst_441:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccccccccccc, 0x3333333333333332, 0x6666666666666666, x1, 1480, x2)
+
+inst_442:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x33333333e8382665, 0x3333333333333332, -0xb504f333, x1, 1488, x2)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x333333327e2e3fff, 0x3333333333333332, 0xb504f333, x1, 1496, x2)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333330, 0x3333333333333332, 0x2, x1, 1504, x2)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xddddddddddddddde, 0x3333333333333332, 0x5555555555555554, x1, 1512, x2)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x0, x1, 1520, x2)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x333333333333332e, 0x3333333333333332, 0x4, x1, 1528, x2)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x3333333333333332, 0x3333333333333332, x1, 1536, x2)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccccccccccd, 0x3333333333333332, 0x6666666666666665, x1, 1544, x2)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x333333327e2e4000, 0x3333333333333332, 0xb504f332, x1, 1552, x2)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xdddddddddddddddc, 0x3333333333333332, 0x5555555555555556, x1, 1560, x2)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x8888888888888887, 0x3333333333333332, -0x5555555555555555, x1, 1568, x2)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x333333333333332c, 0x3333333333333332, 0x6, x1, 1576, x2)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffe, 0x3333333333333332, 0x3333333333333334, x1, 1584, x2)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccccccccccb, 0x3333333333333332, 0x6666666666666667, x1, 1592, x2)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x33333333e8382664, 0x3333333333333332, -0xb504f332, x1, 1600, x2)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0x333333327e2e3ffe, 0x3333333333333332, 0xb504f334, x1, 1608, x2)
+
+inst_458:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666662, 0x6666666666666665, 0x3, x1, 1616, x2)
+
+inst_459:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x1111111111111110, 0x6666666666666665, 0x5555555555555555, x1, 1624, x2)
+
+inst_460:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x6666666666666665, -0x5555555555555556, x1, 1632, x2)
+
+inst_461:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666660, 0x6666666666666665, 0x5, x1, 1640, x2)
+
+inst_462:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333332, 0x6666666666666665, 0x3333333333333333, x1, 1648, x2)
+
+inst_463:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, 0x6666666666666665, 0x6666666666666666, x1, 1656, x2)
+
+inst_464:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x666666671b6b5998, 0x6666666666666665, -0xb504f333, x1, 1664, x2)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x66666665b1617332, 0x6666666666666665, 0xb504f333, x1, 1672, x2)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666663, 0x6666666666666665, 0x2, x1, 1680, x2)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0x1111111111111111, 0x6666666666666665, 0x5555555555555554, x1, 1688, x2)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x0, x1, 1696, x2)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666661, 0x6666666666666665, 0x4, x1, 1704, x2)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333333, 0x6666666666666665, 0x3333333333333332, x1, 1712, x2)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x6666666666666665, 0x6666666666666665, x1, 1720, x2)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x66666665b1617333, 0x6666666666666665, 0xb504f332, x1, 1728, x2)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x111111111111110f, 0x6666666666666665, 0x5555555555555556, x1, 1736, x2)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xbbbbbbbbbbbbbbba, 0x6666666666666665, -0x5555555555555555, x1, 1744, x2)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x666666666666665f, 0x6666666666666665, 0x6, x1, 1752, x2)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333331, 0x6666666666666665, 0x3333333333333334, x1, 1760, x2)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffe, 0x6666666666666665, 0x6666666666666667, x1, 1768, x2)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x666666671b6b5997, 0x6666666666666665, -0xb504f332, x1, 1776, x2)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0x66666665b1617331, 0x6666666666666665, 0xb504f334, x1, 1784, x2)
+
+inst_480:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xb504f32f, 0xb504f332, 0x3, x1, 1792, x2)
+
+inst_481:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab5faf9ddd, 0xb504f332, 0x5555555555555555, x1, 1800, x2)
+
+inst_482:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x555555560a5a4888, 0xb504f332, -0x5555555555555556, x1, 1808, x2)
+
+inst_483:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xb504f32d, 0xb504f332, 0x5, x1, 1816, x2)
+
+inst_484:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccd81d1bfff, 0xb504f332, 0x3333333333333333, x1, 1824, x2)
+
+inst_485:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x9999999a4e9e8ccc, 0xb504f332, 0x6666666666666666, x1, 1832, x2)
+
+inst_486:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x16a09e665, 0xb504f332, -0xb504f333, x1, 1840, x2)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xffffffffffffffff, 0xb504f332, 0xb504f333, x1, 1848, x2)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xb504f330, 0xb504f332, 0x2, x1, 1856, x2)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab5faf9dde, 0xb504f332, 0x5555555555555554, x1, 1864, x2)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xb504f332, 0xb504f332, 0x0, x1, 1872, x2)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xb504f32e, 0xb504f332, 0x4, x1, 1880, x2)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccd81d1c000, 0xb504f332, 0x3333333333333332, x1, 1888, x2)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x9999999a4e9e8ccd, 0xb504f332, 0x6666666666666665, x1, 1896, x2)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0xb504f332, 0xb504f332, x1, 1904, x2)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab5faf9ddc, 0xb504f332, 0x5555555555555556, x1, 1912, x2)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x555555560a5a4887, 0xb504f332, -0x5555555555555555, x1, 1920, x2)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xb504f32c, 0xb504f332, 0x6, x1, 1928, x2)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccd81d1bffe, 0xb504f332, 0x3333333333333334, x1, 1936, x2)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x9999999a4e9e8ccb, 0xb504f332, 0x6666666666666667, x1, 1944, x2)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x16a09e664, 0xb504f332, -0xb504f332, x1, 1952, x2)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffe, 0xb504f332, 0xb504f334, x1, 1960, x2)
+
+inst_502:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555553, 0x5555555555555556, 0x3, x1, 1968, x2)
+
+inst_503:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x5555555555555556, 0x5555555555555555, x1, 1976, x2)
+
+inst_504:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaac, 0x5555555555555556, -0x5555555555555556, x1, 1984, x2)
+
+inst_505:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555551, 0x5555555555555556, 0x5, x1, 1992, x2)
+
+inst_506:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0x2222222222222223, 0x5555555555555556, 0x3333333333333333, x1, 2000, x2)
+
+inst_507:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeeeeeeeeef0, 0x5555555555555556, 0x6666666666666666, x1, 2008, x2)
+
+inst_508:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x555555560a5a4889, 0x5555555555555556, -0xb504f333, x1, 2016, x2)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x55555554a0506223, 0x5555555555555556, 0xb504f333, x1, 2024, x2)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x2, x1, 2032, x2)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x5555555555555556, 0x5555555555555554, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_3)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x0, x1, 0, x2)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555552, 0x5555555555555556, 0x4, x1, 8, x2)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0x2222222222222224, 0x5555555555555556, 0x3333333333333332, x1, 16, x2)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeeeeeeeeef1, 0x5555555555555556, 0x6666666666666665, x1, 24, x2)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x55555554a0506224, 0x5555555555555556, 0xb504f332, x1, 32, x2)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x5555555555555556, 0x5555555555555556, x1, 40, x2)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555556, -0x5555555555555555, x1, 48, x2)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555550, 0x5555555555555556, 0x6, x1, 56, x2)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0x2222222222222222, 0x5555555555555556, 0x3333333333333334, x1, 64, x2)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0xeeeeeeeeeeeeeeef, 0x5555555555555556, 0x6666666666666667, x1, 72, x2)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x555555560a5a4888, 0x5555555555555556, -0xb504f332, x1, 80, x2)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0x55555554a0506222, 0x5555555555555556, 0xb504f334, x1, 88, x2)
+
+inst_524:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaa8, -0x5555555555555555, 0x3, x1, 96, x2)
+
+inst_525:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555556, -0x5555555555555555, 0x5555555555555555, x1, 104, x2)
+
+inst_526:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x1, -0x5555555555555555, -0x5555555555555556, x1, 112, x2)
+
+inst_527:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaa6, -0x5555555555555555, 0x5, x1, 120, x2)
+
+inst_528:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0x7777777777777778, -0x5555555555555555, 0x3333333333333333, x1, 128, x2)
+
+inst_529:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x4444444444444445, -0x5555555555555555, 0x6666666666666666, x1, 136, x2)
+
+inst_530:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab5faf9dde, -0x5555555555555555, -0xb504f333, x1, 144, x2)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9f5a5b778, -0x5555555555555555, 0xb504f333, x1, 152, x2)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaa9, -0x5555555555555555, 0x2, x1, 160, x2)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555557, -0x5555555555555555, 0x5555555555555554, x1, 168, x2)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x0, x1, 176, x2)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaa7, -0x5555555555555555, 0x4, x1, 184, x2)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0x7777777777777779, -0x5555555555555555, 0x3333333333333332, x1, 192, x2)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x4444444444444446, -0x5555555555555555, 0x6666666666666665, x1, 200, x2)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9f5a5b779, -0x5555555555555555, 0xb504f332, x1, 208, x2)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555555, -0x5555555555555555, 0x5555555555555556, x1, 216, x2)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x0, -0x5555555555555555, -0x5555555555555555, x1, 224, x2)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaa5, -0x5555555555555555, 0x6, x1, 232, x2)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0x7777777777777777, -0x5555555555555555, 0x3333333333333334, x1, 240, x2)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x4444444444444444, -0x5555555555555555, 0x6666666666666667, x1, 248, x2)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab5faf9ddd, -0x5555555555555555, -0xb504f332, x1, 256, x2)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9f5a5b777, -0x5555555555555555, 0xb504f334, x1, 264, x2)
+
+inst_546:
+// rs1_val==6 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x3, 0x6, 0x3, x1, 272, x2)
+
+inst_547:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaab1, 0x6, 0x5555555555555555, x1, 280, x2)
+
+inst_548:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x555555555555555c, 0x6, -0x5555555555555556, x1, 288, x2)
+
+inst_549:
+// rs1_val==6 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x6, 0x5, x1, 296, x2)
+
+inst_550:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccd3, 0x6, 0x3333333333333333, x1, 304, x2)
+
+inst_551:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x99999999999999a0, 0x6, 0x6666666666666666, x1, 312, x2)
+
+inst_552:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xb504f339, 0x6, -0xb504f333, x1, 320, x2)
+
+inst_553:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cd3, 0x6, 0xb504f333, x1, 328, x2)
+
+inst_554:
+// rs1_val==6 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x4, 0x6, 0x2, x1, 336, x2)
+
+inst_555:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaab2, 0x6, 0x5555555555555554, x1, 344, x2)
+
+inst_556:
+// rs1_val==6 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x6, 0x6, 0x0, x1, 352, x2)
+
+inst_557:
+// rs1_val==6 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x6, 0x4, x1, 360, x2)
+
+inst_558:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccd4, 0x6, 0x3333333333333332, x1, 368, x2)
+
+inst_559:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x99999999999999a1, 0x6, 0x6666666666666665, x1, 376, x2)
+
+inst_560:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cd4, 0x6, 0xb504f332, x1, 384, x2)
+
+inst_561:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaab0, 0x6, 0x5555555555555556, x1, 392, x2)
+
+inst_562:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x555555555555555b, 0x6, -0x5555555555555555, x1, 400, x2)
+
+inst_563:
+// rs1_val==6 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x6, 0x6, x1, 408, x2)
+
+inst_564:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccd2, 0x6, 0x3333333333333334, x1, 416, x2)
+
+inst_565:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999f, 0x6, 0x6666666666666667, x1, 424, x2)
+
+inst_566:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xb504f338, 0x6, -0xb504f332, x1, 432, x2)
+
+inst_567:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cd2, 0x6, 0xb504f334, x1, 440, x2)
+
+inst_568:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333331, 0x3333333333333334, 0x3, x1, 448, x2)
+
+inst_569:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xdddddddddddddddf, 0x3333333333333334, 0x5555555555555555, x1, 456, x2)
+
+inst_570:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x888888888888888a, 0x3333333333333334, -0x5555555555555556, x1, 464, x2)
+
+inst_571:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x333333333333332f, 0x3333333333333334, 0x5, x1, 472, x2)
+
+inst_572:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x3333333333333334, 0x3333333333333333, x1, 480, x2)
+
+inst_573:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccce, 0x3333333333333334, 0x6666666666666666, x1, 488, x2)
+
+inst_574:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x33333333e8382667, 0x3333333333333334, -0xb504f333, x1, 496, x2)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x333333327e2e4001, 0x3333333333333334, 0xb504f333, x1, 504, x2)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333332, 0x3333333333333334, 0x2, x1, 512, x2)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xdddddddddddddde0, 0x3333333333333334, 0x5555555555555554, x1, 520, x2)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x0, x1, 528, x2)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333330, 0x3333333333333334, 0x4, x1, 536, x2)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x3333333333333334, 0x3333333333333332, x1, 544, x2)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccccccccccf, 0x3333333333333334, 0x6666666666666665, x1, 552, x2)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x333333327e2e4002, 0x3333333333333334, 0xb504f332, x1, 560, x2)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xddddddddddddddde, 0x3333333333333334, 0x5555555555555556, x1, 568, x2)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x8888888888888889, 0x3333333333333334, -0x5555555555555555, x1, 576, x2)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x333333333333332e, 0x3333333333333334, 0x6, x1, 584, x2)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x3333333333333334, 0x3333333333333334, x1, 592, x2)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccccccccccd, 0x3333333333333334, 0x6666666666666667, x1, 600, x2)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x33333333e8382666, 0x3333333333333334, -0xb504f332, x1, 608, x2)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0x333333327e2e4000, 0x3333333333333334, 0xb504f334, x1, 616, x2)
+
+inst_590:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666664, 0x6666666666666667, 0x3, x1, 624, x2)
+
+inst_591:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x1111111111111112, 0x6666666666666667, 0x5555555555555555, x1, 632, x2)
+
+inst_592:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xbbbbbbbbbbbbbbbd, 0x6666666666666667, -0x5555555555555556, x1, 640, x2)
+
+inst_593:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666662, 0x6666666666666667, 0x5, x1, 648, x2)
+
+inst_594:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333334, 0x6666666666666667, 0x3333333333333333, x1, 656, x2)
+
+inst_595:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x6666666666666667, 0x6666666666666666, x1, 664, x2)
+
+inst_596:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x666666671b6b599a, 0x6666666666666667, -0xb504f333, x1, 672, x2)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x66666665b1617334, 0x6666666666666667, 0xb504f333, x1, 680, x2)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666665, 0x6666666666666667, 0x2, x1, 688, x2)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0x1111111111111113, 0x6666666666666667, 0x5555555555555554, x1, 696, x2)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x0, x1, 704, x2)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666663, 0x6666666666666667, 0x4, x1, 712, x2)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333335, 0x6666666666666667, 0x3333333333333332, x1, 720, x2)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0x6666666666666667, 0x6666666666666665, x1, 728, x2)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x66666665b1617335, 0x6666666666666667, 0xb504f332, x1, 736, x2)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x1111111111111111, 0x6666666666666667, 0x5555555555555556, x1, 744, x2)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xbbbbbbbbbbbbbbbc, 0x6666666666666667, -0x5555555555555555, x1, 752, x2)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0x6666666666666661, 0x6666666666666667, 0x6, x1, 760, x2)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0x3333333333333333, 0x6666666666666667, 0x3333333333333334, x1, 768, x2)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x6666666666666667, 0x6666666666666667, x1, 776, x2)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x666666671b6b5999, 0x6666666666666667, -0xb504f332, x1, 784, x2)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0x66666665b1617333, 0x6666666666666667, 0xb504f334, x1, 792, x2)
+
+inst_612:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0ccb, -0xb504f332, 0x3, x1, 800, x2)
+
+inst_613:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9f5a5b779, -0xb504f332, 0x5555555555555555, x1, 808, x2)
+
+inst_614:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x55555554a0506224, -0xb504f332, -0x5555555555555556, x1, 816, x2)
+
+inst_615:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cc9, -0xb504f332, 0x5, x1, 824, x2)
+
+inst_616:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccc17c7d99b, -0xb504f332, 0x3333333333333333, x1, 832, x2)
+
+inst_617:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x99999998e494a668, -0xb504f332, 0x6666666666666666, x1, 840, x2)
+
+inst_618:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x1, -0xb504f332, -0xb504f333, x1, 848, x2)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe95f6199b, -0xb504f332, 0xb504f333, x1, 856, x2)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0ccc, -0xb504f332, 0x2, x1, 864, x2)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9f5a5b77a, -0xb504f332, 0x5555555555555554, x1, 872, x2)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x0, x1, 880, x2)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cca, -0xb504f332, 0x4, x1, 888, x2)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccc17c7d99c, -0xb504f332, 0x3333333333333332, x1, 896, x2)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x99999998e494a669, -0xb504f332, 0x6666666666666665, x1, 904, x2)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe95f6199c, -0xb504f332, 0xb504f332, x1, 912, x2)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaa9f5a5b778, -0xb504f332, 0x5555555555555556, x1, 920, x2)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x55555554a0506223, -0xb504f332, -0x5555555555555555, x1, 928, x2)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cc8, -0xb504f332, 0x6, x1, 936, x2)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccc17c7d99a, -0xb504f332, 0x3333333333333334, x1, 944, x2)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x99999998e494a667, -0xb504f332, 0x6666666666666667, x1, 952, x2)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x0, -0xb504f332, -0xb504f332, x1, 960, x2)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffe95f6199a, -0xb504f332, 0xb504f334, x1, 968, x2)
+
+inst_634:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0xb504f331, 0xb504f334, 0x3, x1, 976, x2)
+
+inst_635:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab5faf9ddf, 0xb504f334, 0x5555555555555555, x1, 984, x2)
+
+inst_636:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0x555555560a5a488a, 0xb504f334, -0x5555555555555556, x1, 992, x2)
+
+inst_637:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5
+TEST_CR_OP( c.sub, x10, x11, 0xb504f32f, 0xb504f334, 0x5, x1, 1000, x2)
+
+inst_638:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccd81d1c001, 0xb504f334, 0x3333333333333333, x1, 1008, x2)
+
+inst_639:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_CR_OP( c.sub, x10, x11, 0x9999999a4e9e8cce, 0xb504f334, 0x6666666666666666, x1, 1016, x2)
+
+inst_640:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x16a09e667, 0xb504f334, -0xb504f333, x1, 1024, x2)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f333
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0xb504f334, 0xb504f333, x1, 1032, x2)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x2
+TEST_CR_OP( c.sub, x10, x11, 0xb504f332, 0xb504f334, 0x2, x1, 1040, x2)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab5faf9de0, 0xb504f334, 0x5555555555555554, x1, 1048, x2)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0xb504f334, 0xb504f334, 0x0, x1, 1056, x2)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xb504f330, 0xb504f334, 0x4, x1, 1064, x2)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccd81d1c002, 0xb504f334, 0x3333333333333332, x1, 1072, x2)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x9999999a4e9e8ccf, 0xb504f334, 0x6666666666666665, x1, 1080, x2)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x2, 0xb504f334, 0xb504f332, x1, 1088, x2)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaab5faf9dde, 0xb504f334, 0x5555555555555556, x1, 1096, x2)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x555555560a5a4889, 0xb504f334, -0x5555555555555555, x1, 1104, x2)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xb504f32e, 0xb504f334, 0x6, x1, 1112, x2)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccd81d1c000, 0xb504f334, 0x3333333333333334, x1, 1120, x2)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x9999999a4e9e8ccd, 0xb504f334, 0x6666666666666667, x1, 1128, x2)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0x16a09e666, 0xb504f334, -0xb504f332, x1, 1136, x2)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0xb504f334, 0xb504f334, x1, 1144, x2)
+
+inst_656:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555554
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaac, 0x0, 0x5555555555555554, x1, 1152, x2)
+
+inst_657:
+// rs1_val==0 and rs2_val==0,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x0
+TEST_CR_OP( c.sub, x10, x11, 0x0, 0x0, 0x0, x1, 1160, x2)
+
+inst_658:
+// rs1_val==0 and rs2_val==4,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x4
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffc, 0x0, 0x4, x1, 1168, x2)
+
+inst_659:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333332
+TEST_CR_OP( c.sub, x10, x11, 0xccccccccccccccce, 0x0, 0x3333333333333332, x1, 1176, x2)
+
+inst_660:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666665
+TEST_CR_OP( c.sub, x10, x11, 0x999999999999999b, 0x0, 0x6666666666666665, x1, 1184, x2)
+
+inst_661:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0cce, 0x0, 0xb504f332, x1, 1192, x2)
+
+inst_662:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555556
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x0, 0x5555555555555556, x1, 1200, x2)
+
+inst_663:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0x5555555555555555, 0x0, -0x5555555555555555, x1, 1208, x2)
+
+inst_664:
+// rs1_val==0 and rs2_val==6,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x6
+TEST_CR_OP( c.sub, x10, x11, 0xfffffffffffffffa, 0x0, 0x6, x1, 1216, x2)
+
+inst_665:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333334
+TEST_CR_OP( c.sub, x10, x11, 0xcccccccccccccccc, 0x0, 0x3333333333333334, x1, 1224, x2)
+
+inst_666:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666667
+TEST_CR_OP( c.sub, x10, x11, 0x9999999999999999, 0x0, 0x6666666666666667, x1, 1232, x2)
+
+inst_667:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f332
+TEST_CR_OP( c.sub, x10, x11, 0xb504f332, 0x0, -0xb504f332, x1, 1240, x2)
+
+inst_668:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f334
+TEST_CR_OP( c.sub, x10, x11, 0xffffffff4afb0ccc, 0x0, 0xb504f334, x1, 1248, x2)
+
+inst_669:
+// rs1_val==4 and rs2_val==3,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x3
+TEST_CR_OP( c.sub, x10, x11, 0x1, 0x4, 0x3, x1, 1256, x2)
+
+inst_670:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: c.sub; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555555
+TEST_CR_OP( c.sub, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x4, 0x5555555555555555, x1, 1264, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_3:
+ .fill 159*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/csubw-01.S b/riscof/suite/rv64i_m/C/csubw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..d488d3b63d1f5a3588dc578bd56ee743f015ffd8
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/csubw-01.S
@@ -0,0 +1,3429 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 05:22:37 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.subw instruction of the RISC-V C extension for the csubw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*C.*);def TEST_CASE_1=True;",csubw)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x12, rs2==x10, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, rs2_val < 0, rs1_val == -18014398509481985
+// opcode: c.subw; op1:x12; op2:x10; op1val:-0x40000000000001; op2val:-0x8000000000000000
+TEST_CR_OP( c.subw, x12, x10, -0x1, -0x40000000000001, -0x8000000000000000, x1, 0, x2)
+
+inst_1:
+// rs1 == rs2, rs1==x15, rs2==x15, rs2_val == 0, rs1_val == 562949953421312
+// opcode: c.subw; op1:x15; op2:x15; op1val:0x2000000000000; op2val:0x2000000000000
+TEST_CR_OP( c.subw, x15, x15, 0x0, 0x2000000000000, 0x2000000000000, x1, 8, x2)
+
+inst_2:
+// rs1==x14, rs2==x9, rs2_val == (2**(xlen-1)-1), rs2_val > 0, rs2_val == 9223372036854775807, rs1_val == 4194304
+// opcode: c.subw; op1:x14; op2:x9; op1val:0x400000; op2val:0x7fffffffffffffff
+TEST_CR_OP( c.subw, x14, x9, 0x400001, 0x400000, 0x7fffffffffffffff, x1, 16, x2)
+
+inst_3:
+// rs1==x11, rs2==x14, rs2_val == 1,
+// opcode: c.subw; op1:x11; op2:x14; op1val:0x3333333333333334; op2val:0x1
+TEST_CR_OP( c.subw, x11, x14, 0x33333333, 0x3333333333333334, 0x1, x1, 24, x2)
+
+inst_4:
+// rs1==x10, rs2==x12, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808, rs2_val == 4096
+// opcode: c.subw; op1:x10; op2:x12; op1val:-0x8000000000000000; op2val:0x1000
+TEST_CR_OP( c.subw, x10, x12, -0x1000, -0x8000000000000000, 0x1000, x1, 32, x2)
+
+inst_5:
+// rs1==x13, rs2==x11, rs1_val == 0, rs2_val == -288230376151711745
+// opcode: c.subw; op1:x13; op2:x11; op1val:0x0; op2val:-0x400000000000001
+TEST_CR_OP( c.subw, x13, x11, 0x1, 0x0, -0x400000000000001, x1, 40, x2)
+
+inst_6:
+// rs1==x9, rs2==x8, rs1_val == (2**(xlen-1)-1), rs2_val == 6148914691236517205, rs1_val == 9223372036854775807
+// opcode: c.subw; op1:x9; op2:x8; op1val:0x7fffffffffffffff; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x9, x8, -0x55555556, 0x7fffffffffffffff, 0x5555555555555555, x1, 48, x2)
+
+inst_7:
+// rs1==x8, rs2==x13, rs1_val == 1, rs2_val == -4611686018427387905
+// opcode: c.subw; op1:x8; op2:x13; op1val:0x1; op2val:-0x4000000000000001
+TEST_CR_OP( c.subw, x8, x13, 0x2, 0x1, -0x4000000000000001, x1, 56, x2)
+
+inst_8:
+// rs2_val == 2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x8000000000000000; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, -0x2, -0x8000000000000000, 0x2, x1, 64, x2)
+
+inst_9:
+// rs2_val == 4, rs1_val==3689348814741910324 and rs2_val==4
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x33333330, 0x3333333333333334, 0x4, x1, 72, x2)
+
+inst_10:
+// rs2_val == 8,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x1; op2val:0x8
+TEST_CR_OP( c.subw, x10, x11, -0x7, 0x1, 0x8, x1, 80, x2)
+
+inst_11:
+// rs2_val == 16,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x9; op2val:0x10
+TEST_CR_OP( c.subw, x10, x11, -0x7, 0x9, 0x10, x1, 88, x2)
+
+inst_12:
+// rs2_val == 32, rs1_val == -524289
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x80001; op2val:0x20
+TEST_CR_OP( c.subw, x10, x11, -0x80021, -0x80001, 0x20, x1, 96, x2)
+
+inst_13:
+// rs2_val == 64, rs1_val == -2097153
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x200001; op2val:0x40
+TEST_CR_OP( c.subw, x10, x11, -0x200041, -0x200001, 0x40, x1, 104, x2)
+
+inst_14:
+// rs2_val == 128, rs1_val == 2097152
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x200000; op2val:0x80
+TEST_CR_OP( c.subw, x10, x11, 0x1fff80, 0x200000, 0x80, x1, 112, x2)
+
+inst_15:
+// rs2_val == 256, rs1_val == 16384
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4000; op2val:0x100
+TEST_CR_OP( c.subw, x10, x11, 0x3f00, 0x4000, 0x100, x1, 120, x2)
+
+inst_16:
+// rs2_val == 512, rs1_val == -17
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x11; op2val:0x200
+TEST_CR_OP( c.subw, x10, x11, -0x211, -0x11, 0x200, x1, 128, x2)
+
+inst_17:
+// rs2_val == 1024, rs1_val == 18014398509481984
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x40000000000000; op2val:0x400
+TEST_CR_OP( c.subw, x10, x11, -0x400, 0x40000000000000, 0x400, x1, 136, x2)
+
+inst_18:
+// rs2_val == 2048, rs1_val == -4097
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x1001; op2val:0x800
+TEST_CR_OP( c.subw, x10, x11, -0x1801, -0x1001, 0x800, x1, 144, x2)
+
+inst_19:
+// rs2_val == 8192, rs1_val == -1025
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x401; op2val:0x2000
+TEST_CR_OP( c.subw, x10, x11, -0x2401, -0x401, 0x2000, x1, 152, x2)
+
+inst_20:
+// rs2_val == 16384,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4000
+TEST_CR_OP( c.subw, x10, x11, 0x55551556, 0x5555555555555556, 0x4000, x1, 160, x2)
+
+inst_21:
+// rs2_val == 32768, rs1_val == -1048577
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x100001; op2val:0x8000
+TEST_CR_OP( c.subw, x10, x11, -0x108001, -0x100001, 0x8000, x1, 168, x2)
+
+inst_22:
+// rs2_val == 65536, rs1_val == -6148914691236517206
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x10000
+TEST_CR_OP( c.subw, x10, x11, -0x55565556, -0x5555555555555556, 0x10000, x1, 176, x2)
+
+inst_23:
+// rs2_val == 131072, rs1_val == -1125899906842625
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x4000000000001; op2val:0x20000
+TEST_CR_OP( c.subw, x10, x11, -0x20001, -0x4000000000001, 0x20000, x1, 184, x2)
+
+inst_24:
+// rs2_val == 262144, rs1_val == 1152921504606846976
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x1000000000000000; op2val:0x40000
+TEST_CR_OP( c.subw, x10, x11, -0x40000, 0x1000000000000000, 0x40000, x1, 192, x2)
+
+inst_25:
+// rs2_val == 524288, rs1_val == 65536
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x10000; op2val:0x80000
+TEST_CR_OP( c.subw, x10, x11, -0x70000, 0x10000, 0x80000, x1, 200, x2)
+
+inst_26:
+// rs2_val == 1048576, rs1_val == 140737488355328
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x800000000000; op2val:0x100000
+TEST_CR_OP( c.subw, x10, x11, -0x100000, 0x800000000000, 0x100000, x1, 208, x2)
+
+inst_27:
+// rs2_val == 2097152,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x8000000000000000; op2val:0x200000
+TEST_CR_OP( c.subw, x10, x11, -0x200000, -0x8000000000000000, 0x200000, x1, 216, x2)
+
+inst_28:
+// rs2_val == 4194304, rs1_val == 134217728
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x8000000; op2val:0x400000
+TEST_CR_OP( c.subw, x10, x11, 0x7c00000, 0x8000000, 0x400000, x1, 224, x2)
+
+inst_29:
+// rs2_val == 8388608,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x80001; op2val:0x800000
+TEST_CR_OP( c.subw, x10, x11, -0x880001, -0x80001, 0x800000, x1, 232, x2)
+
+inst_30:
+// rs2_val == 16777216, rs1_val == 4
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x1000000
+TEST_CR_OP( c.subw, x10, x11, -0xfffffc, 0x4, 0x1000000, x1, 240, x2)
+
+inst_31:
+// rs2_val == 33554432, rs1_val == 8192
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2000; op2val:0x2000000
+TEST_CR_OP( c.subw, x10, x11, -0x1ffe000, 0x2000, 0x2000000, x1, 248, x2)
+
+inst_32:
+// rs2_val == 67108864, rs1_val == 288230376151711744
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x400000000000000; op2val:0x4000000
+TEST_CR_OP( c.subw, x10, x11, -0x4000000, 0x400000000000000, 0x4000000, x1, 256, x2)
+
+inst_33:
+// rs2_val == 134217728, rs1_val == -562949953421313
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x2000000000001; op2val:0x8000000
+TEST_CR_OP( c.subw, x10, x11, -0x8000001, -0x2000000000001, 0x8000000, x1, 264, x2)
+
+inst_34:
+// rs2_val == 268435456, rs1_val == 536870912
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x20000000; op2val:0x10000000
+TEST_CR_OP( c.subw, x10, x11, 0x10000000, 0x20000000, 0x10000000, x1, 272, x2)
+
+inst_35:
+// rs2_val == 536870912, rs1_val == -4611686018427387905
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x4000000000000001; op2val:0x20000000
+TEST_CR_OP( c.subw, x10, x11, -0x20000001, -0x4000000000000001, 0x20000000, x1, 280, x2)
+
+inst_36:
+// rs2_val == 1073741824,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x40000000
+TEST_CR_OP( c.subw, x10, x11, 0x26666667, 0x6666666666666667, 0x40000000, x1, 288, x2)
+
+inst_37:
+// rs2_val == 2147483648, rs1_val == -35184372088833
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x200000000001; op2val:0x80000000
+TEST_CR_OP( c.subw, x10, x11, 0x7fffffff, -0x200000000001, 0x80000000, x1, 296, x2)
+
+inst_38:
+// rs2_val == 4294967296, rs1_val == -32769
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x8001; op2val:0x100000000
+TEST_CR_OP( c.subw, x10, x11, -0x8001, -0x8001, 0x100000000, x1, 304, x2)
+
+inst_39:
+// rs2_val == 8589934592,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x200000000
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x0, 0x200000000, x1, 312, x2)
+
+inst_40:
+// rs2_val == 17179869184,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x400000000
+TEST_CR_OP( c.subw, x10, x11, -0x55555555, -0x5555555555555555, 0x400000000, x1, 320, x2)
+
+inst_41:
+// rs2_val == 34359738368, rs1_val == 4096
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x1000; op2val:0x800000000
+TEST_CR_OP( c.subw, x10, x11, 0x1000, 0x1000, 0x800000000, x1, 328, x2)
+
+inst_42:
+// rs2_val == 68719476736, rs1_val == -8589934593
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x200000001; op2val:0x1000000000
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0x200000001, 0x1000000000, x1, 336, x2)
+
+inst_43:
+// rs2_val == 137438953472,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x1; op2val:0x2000000000
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x1, 0x2000000000, x1, 344, x2)
+
+inst_44:
+// rs2_val == 274877906944,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2000000000000; op2val:0x4000000000
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x2000000000000, 0x4000000000, x1, 352, x2)
+
+inst_45:
+// rs2_val == 549755813888, rs1_val == 131072
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x20000; op2val:0x8000000000
+TEST_CR_OP( c.subw, x10, x11, 0x20000, 0x20000, 0x8000000000, x1, 360, x2)
+
+inst_46:
+// rs2_val == 1099511627776, rs1_val == 17592186044416
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x100000000000; op2val:0x10000000000
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x100000000000, 0x10000000000, x1, 368, x2)
+
+inst_47:
+// rs2_val == 2199023255552,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x20000000000
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x0, 0x20000000000, x1, 376, x2)
+
+inst_48:
+// rs2_val == 4398046511104, rs1_val == -1152921504606846977
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:0x40000000000
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0x1000000000000001, 0x40000000000, x1, 384, x2)
+
+inst_49:
+// rs2_val == 8796093022208,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x80000000000
+TEST_CR_OP( c.subw, x10, x11, 0x3, 0x3, 0x80000000000, x1, 392, x2)
+
+inst_50:
+// rs2_val == 17592186044416, rs1_val == -17592186044417
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x100000000001; op2val:0x100000000000
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0x100000000001, 0x100000000000, x1, 400, x2)
+
+inst_51:
+// rs2_val == 35184372088832, rs1_val == 8796093022208
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x80000000000; op2val:0x200000000000
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x80000000000, 0x200000000000, x1, 408, x2)
+
+inst_52:
+// rs2_val == 70368744177664, rs1_val == 274877906944
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4000000000; op2val:0x400000000000
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x4000000000, 0x400000000000, x1, 416, x2)
+
+inst_53:
+// rs2_val == 140737488355328, rs1_val == -137438953473
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x2000000001; op2val:0x800000000000
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0x2000000001, 0x800000000000, x1, 424, x2)
+
+inst_54:
+// rs2_val == 281474976710656,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x800000000000; op2val:0x1000000000000
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x800000000000, 0x1000000000000, x1, 432, x2)
+
+inst_55:
+// rs2_val == 562949953421312, rs1_val == 1024
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x400; op2val:0x2000000000000
+TEST_CR_OP( c.subw, x10, x11, 0x400, 0x400, 0x2000000000000, x1, 440, x2)
+
+inst_56:
+// rs2_val == 1125899906842624, rs1_val == -549755813889
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x8000000001; op2val:0x4000000000000
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0x8000000001, 0x4000000000000, x1, 448, x2)
+
+inst_57:
+// rs2_val == 2251799813685248, rs1_val == -513
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x201; op2val:0x8000000000000
+TEST_CR_OP( c.subw, x10, x11, -0x201, -0x201, 0x8000000000000, x1, 456, x2)
+
+inst_58:
+// rs2_val == 4503599627370496,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x10000000000000
+TEST_CR_OP( c.subw, x10, x11, 0x33333333, 0x3333333333333333, 0x10000000000000, x1, 464, x2)
+
+inst_59:
+// rs2_val == 9007199254740992,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x4000000000000000; op2val:0x20000000000000
+TEST_CR_OP( c.subw, x10, x11, 0x0, -0x4000000000000000, 0x20000000000000, x1, 472, x2)
+
+inst_60:
+// rs2_val == 18014398509481984,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x40000000000000
+TEST_CR_OP( c.subw, x10, x11, 0x33333334, 0x3333333333333334, 0x40000000000000, x1, 480, x2)
+
+inst_61:
+// rs2_val == 36028797018963968, rs1_val == -3
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x3; op2val:0x80000000000000
+TEST_CR_OP( c.subw, x10, x11, -0x3, -0x3, 0x80000000000000, x1, 488, x2)
+
+inst_62:
+// rs2_val == 72057594037927936, rs1_val == 262144
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x40000; op2val:0x100000000000000
+TEST_CR_OP( c.subw, x10, x11, 0x40000, 0x40000, 0x100000000000000, x1, 496, x2)
+
+inst_63:
+// rs2_val == 144115188075855872,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x200000000000000
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0ccc, 0xb504f334, 0x200000000000000, x1, 504, x2)
+
+inst_64:
+// rs2_val == 288230376151711744, rs1_val == 17179869184
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x400000000; op2val:0x400000000000000
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x400000000, 0x400000000000000, x1, 512, x2)
+
+inst_65:
+// rs2_val == 576460752303423488,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x7; op2val:0x800000000000000
+TEST_CR_OP( c.subw, x10, x11, 0x7, 0x7, 0x800000000000000, x1, 520, x2)
+
+inst_66:
+// rs2_val == 1152921504606846976,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x1000000000000000
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x0, 0x1000000000000000, x1, 528, x2)
+
+inst_67:
+// rs2_val == 2305843009213693952, rs1_val == -9007199254740993
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x20000000000001; op2val:0x2000000000000000
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0x20000000000001, 0x2000000000000000, x1, 536, x2)
+
+inst_68:
+// rs2_val == 4611686018427387904, rs1_val == -1099511627777
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x10000000001; op2val:0x4000000000000000
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0x10000000001, 0x4000000000000000, x1, 544, x2)
+
+inst_69:
+// rs2_val == -2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x2
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cd0, -0xb504f332, -0x2, x1, 552, x2)
+
+inst_70:
+// rs2_val == -3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x3
+TEST_CR_OP( c.subw, x10, x11, 0x33333337, 0x3333333333333334, -0x3, x1, 560, x2)
+
+inst_71:
+// rs2_val == -5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4000000000; op2val:-0x5
+TEST_CR_OP( c.subw, x10, x11, 0x5, 0x4000000000, -0x5, x1, 568, x2)
+
+inst_72:
+// rs2_val == -9, rs1_val == -72057594037927937
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x100000000000001; op2val:-0x9
+TEST_CR_OP( c.subw, x10, x11, 0x8, -0x100000000000001, -0x9, x1, 576, x2)
+
+inst_73:
+// rs2_val == -17, rs1_val == -5
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5; op2val:-0x11
+TEST_CR_OP( c.subw, x10, x11, 0xc, -0x5, -0x11, x1, 584, x2)
+
+inst_74:
+// rs2_val == -33,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x400000000000000; op2val:-0x21
+TEST_CR_OP( c.subw, x10, x11, 0x21, 0x400000000000000, -0x21, x1, 592, x2)
+
+inst_75:
+// rs2_val == -65, rs1_val == 2251799813685248
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x8000000000000; op2val:-0x41
+TEST_CR_OP( c.subw, x10, x11, 0x41, 0x8000000000000, -0x41, x1, 600, x2)
+
+inst_76:
+// rs2_val == -129, rs1_val == 1073741824
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x40000000; op2val:-0x81
+TEST_CR_OP( c.subw, x10, x11, 0x40000081, 0x40000000, -0x81, x1, 608, x2)
+
+inst_77:
+// rs2_val == -257,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:-0x101
+TEST_CR_OP( c.subw, x10, x11, 0x104, 0x3, -0x101, x1, 616, x2)
+
+inst_78:
+// rs2_val == -513,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x201
+TEST_CR_OP( c.subw, x10, x11, 0x66666867, 0x6666666666666666, -0x201, x1, 624, x2)
+
+inst_79:
+// rs2_val == -1025,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x40000000000001; op2val:-0x401
+TEST_CR_OP( c.subw, x10, x11, 0x400, -0x40000000000001, -0x401, x1, 632, x2)
+
+inst_80:
+// rs2_val == -2049,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x1; op2val:-0x801
+TEST_CR_OP( c.subw, x10, x11, 0x802, 0x1, -0x801, x1, 640, x2)
+
+inst_81:
+// rs2_val == -4097, rs1_val == 16
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x10; op2val:-0x1001
+TEST_CR_OP( c.subw, x10, x11, 0x1011, 0x10, -0x1001, x1, 648, x2)
+
+inst_82:
+// rs2_val == -8193,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x2001
+TEST_CR_OP( c.subw, x10, x11, 0x66668667, 0x6666666666666666, -0x2001, x1, 656, x2)
+
+inst_83:
+// rs2_val == -16385,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x1001; op2val:-0x4001
+TEST_CR_OP( c.subw, x10, x11, 0x3000, -0x1001, -0x4001, x1, 664, x2)
+
+inst_84:
+// rs2_val == -32769, rs1_val == -8388609
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x800001; op2val:-0x8001
+TEST_CR_OP( c.subw, x10, x11, -0x7f8000, -0x800001, -0x8001, x1, 672, x2)
+
+inst_85:
+// rs2_val == -65537,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x40000000; op2val:-0x10001
+TEST_CR_OP( c.subw, x10, x11, 0x40010001, 0x40000000, -0x10001, x1, 680, x2)
+
+inst_86:
+// rs2_val == -131073,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x9; op2val:-0x20001
+TEST_CR_OP( c.subw, x10, x11, 0x2000a, 0x9, -0x20001, x1, 688, x2)
+
+inst_87:
+// rs2_val == -262145,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x400; op2val:-0x40001
+TEST_CR_OP( c.subw, x10, x11, 0x40401, 0x400, -0x40001, x1, 696, x2)
+
+inst_88:
+// rs2_val == -524289, rs1_val == 576460752303423488
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x800000000000000; op2val:-0x80001
+TEST_CR_OP( c.subw, x10, x11, 0x80001, 0x800000000000000, -0x80001, x1, 704, x2)
+
+inst_89:
+// rs2_val == -1048577, rs1_val == 70368744177664
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x400000000000; op2val:-0x100001
+TEST_CR_OP( c.subw, x10, x11, 0x100001, 0x400000000000, -0x100001, x1, 712, x2)
+
+inst_90:
+// rs2_val == -2097153, rs1_val == 2199023255552
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x20000000000; op2val:-0x200001
+TEST_CR_OP( c.subw, x10, x11, 0x200001, 0x20000000000, -0x200001, x1, 720, x2)
+
+inst_91:
+// rs2_val == -4194305, rs1_val == 4398046511104
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x40000000000; op2val:-0x400001
+TEST_CR_OP( c.subw, x10, x11, 0x400001, 0x40000000000, -0x400001, x1, 728, x2)
+
+inst_92:
+// rs2_val == -8388609,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x800001
+TEST_CR_OP( c.subw, x10, x11, 0x55d55555, 0x5555555555555554, -0x800001, x1, 736, x2)
+
+inst_93:
+// rs2_val == -16777217,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x7; op2val:-0x1000001
+TEST_CR_OP( c.subw, x10, x11, 0xfffffa, -0x7, -0x1000001, x1, 744, x2)
+
+inst_94:
+// rs2_val == -33554433,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x7; op2val:-0x2000001
+TEST_CR_OP( c.subw, x10, x11, 0x1fffffa, -0x7, -0x2000001, x1, 752, x2)
+
+inst_95:
+// rs2_val == -67108865, rs1_val == 36028797018963968
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x80000000000000; op2val:-0x4000001
+TEST_CR_OP( c.subw, x10, x11, 0x4000001, 0x80000000000000, -0x4000001, x1, 760, x2)
+
+inst_96:
+// rs2_val == -134217729, rs1_val == 2147483648
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x80000000; op2val:-0x8000001
+TEST_CR_OP( c.subw, x10, x11, -0x77ffffff, 0x80000000, -0x8000001, x1, 768, x2)
+
+inst_97:
+// rs2_val == -268435457,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x7; op2val:-0x10000001
+TEST_CR_OP( c.subw, x10, x11, 0xffffffa, -0x7, -0x10000001, x1, 776, x2)
+
+inst_98:
+// rs2_val == -536870913, rs1_val == -34359738369
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x800000001; op2val:-0x20000001
+TEST_CR_OP( c.subw, x10, x11, 0x20000000, -0x800000001, -0x20000001, x1, 784, x2)
+
+inst_99:
+// rs2_val == -1073741825, rs1_val == 2
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:-0x40000001
+TEST_CR_OP( c.subw, x10, x11, 0x40000003, 0x2, -0x40000001, x1, 792, x2)
+
+inst_100:
+// rs2_val == -2147483649,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x10; op2val:-0x80000001
+TEST_CR_OP( c.subw, x10, x11, -0x7fffffef, 0x10, -0x80000001, x1, 800, x2)
+
+inst_101:
+// rs2_val == -4294967297, rs1_val == -268435457
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x10000001; op2val:-0x100000001
+TEST_CR_OP( c.subw, x10, x11, -0x10000000, -0x10000001, -0x100000001, x1, 808, x2)
+
+inst_102:
+// rs2_val == -8589934593,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x8000000001; op2val:-0x200000001
+TEST_CR_OP( c.subw, x10, x11, 0x0, -0x8000000001, -0x200000001, x1, 816, x2)
+
+inst_103:
+// rs2_val == -17179869185, rs1_val == -2305843009213693953
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x2000000000000001; op2val:-0x400000001
+TEST_CR_OP( c.subw, x10, x11, 0x0, -0x2000000000000001, -0x400000001, x1, 824, x2)
+
+inst_104:
+// rs2_val == -34359738369, rs1_val == 34359738368
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x800000000; op2val:-0x800000001
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x800000000, -0x800000001, x1, 832, x2)
+
+inst_105:
+// rs2_val == -68719476737, rs1_val == -65537
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x10001; op2val:-0x1000000001
+TEST_CR_OP( c.subw, x10, x11, -0x10000, -0x10001, -0x1000000001, x1, 840, x2)
+
+inst_106:
+// rs2_val == -137438953473, rs1_val == 32
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x20; op2val:-0x2000000001
+TEST_CR_OP( c.subw, x10, x11, 0x21, 0x20, -0x2000000001, x1, 848, x2)
+
+inst_107:
+// rs2_val == -274877906945, rs1_val == -65
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x41; op2val:-0x4000000001
+TEST_CR_OP( c.subw, x10, x11, -0x40, -0x41, -0x4000000001, x1, 856, x2)
+
+inst_108:
+// rs2_val == -549755813889,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:-0x8000000001
+TEST_CR_OP( c.subw, x10, x11, 0x7, 0x6, -0x8000000001, x1, 864, x2)
+
+inst_109:
+// rs2_val == -1099511627777, rs1_val == -131073
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x20001; op2val:-0x10000000001
+TEST_CR_OP( c.subw, x10, x11, -0x20000, -0x20001, -0x10000000001, x1, 872, x2)
+
+inst_110:
+// rs2_val == -2199023255553, rs1_val == -1073741825
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x40000001; op2val:-0x20000000001
+TEST_CR_OP( c.subw, x10, x11, -0x40000000, -0x40000001, -0x20000000001, x1, 880, x2)
+
+inst_111:
+// rs2_val == -4398046511105, rs1_val == 137438953472
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2000000000; op2val:-0x40000000001
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x2000000000, -0x40000000001, x1, 888, x2)
+
+inst_112:
+// rs2_val == -8796093022209,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x100000000001; op2val:-0x80000000001
+TEST_CR_OP( c.subw, x10, x11, 0x0, -0x100000000001, -0x80000000001, x1, 896, x2)
+
+inst_113:
+// rs2_val == -17592186044417,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x11; op2val:-0x100000000001
+TEST_CR_OP( c.subw, x10, x11, -0x10, -0x11, -0x100000000001, x1, 904, x2)
+
+inst_114:
+// rs2_val == -35184372088833,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x800000001; op2val:-0x200000000001
+TEST_CR_OP( c.subw, x10, x11, 0x0, -0x800000001, -0x200000000001, x1, 912, x2)
+
+inst_115:
+// rs2_val == -70368744177665, rs1_val == -536870913
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x20000001; op2val:-0x400000000001
+TEST_CR_OP( c.subw, x10, x11, -0x20000000, -0x20000001, -0x400000000001, x1, 920, x2)
+
+inst_116:
+// rs2_val == -140737488355329,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x1000; op2val:-0x800000000001
+TEST_CR_OP( c.subw, x10, x11, 0x1001, 0x1000, -0x800000000001, x1, 928, x2)
+
+inst_117:
+// rs2_val == -281474976710657,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x11; op2val:-0x1000000000001
+TEST_CR_OP( c.subw, x10, x11, -0x10, -0x11, -0x1000000000001, x1, 936, x2)
+
+inst_118:
+// rs2_val == -562949953421313,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x1000; op2val:-0x2000000000001
+TEST_CR_OP( c.subw, x10, x11, 0x1001, 0x1000, -0x2000000000001, x1, 944, x2)
+
+inst_119:
+// rs2_val == -1125899906842625,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2000000000; op2val:-0x4000000000001
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x2000000000, -0x4000000000001, x1, 952, x2)
+
+inst_120:
+// rs2_val == -2251799813685249,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:-0x8000000000001
+TEST_CR_OP( c.subw, x10, x11, 0x7, 0x6, -0x8000000000001, x1, 960, x2)
+
+inst_121:
+// rs2_val == -4503599627370497,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x7fffffffffffffff; op2val:-0x10000000000001
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x7fffffffffffffff, -0x10000000000001, x1, 968, x2)
+
+inst_122:
+// rs2_val == -9007199254740993, rs1_val == -4398046511105
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x40000000001; op2val:-0x20000000000001
+TEST_CR_OP( c.subw, x10, x11, 0x0, -0x40000000001, -0x20000000000001, x1, 976, x2)
+
+inst_123:
+// rs2_val == -18014398509481985,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x40000; op2val:-0x40000000000001
+TEST_CR_OP( c.subw, x10, x11, 0x40001, 0x40000, -0x40000000000001, x1, 984, x2)
+
+inst_124:
+// rs2_val == -36028797018963969, rs1_val == -140737488355329
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x800000000001; op2val:-0x80000000000001
+TEST_CR_OP( c.subw, x10, x11, 0x0, -0x800000000001, -0x80000000000001, x1, 992, x2)
+
+inst_125:
+// rs2_val == -72057594037927937,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x9; op2val:-0x100000000000001
+TEST_CR_OP( c.subw, x10, x11, 0xa, 0x9, -0x100000000000001, x1, 1000, x2)
+
+inst_126:
+// rs2_val == -144115188075855873, rs1_val == -2147483649
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x80000001; op2val:-0x200000000000001
+TEST_CR_OP( c.subw, x10, x11, -0x80000000, -0x80000001, -0x200000000000001, x1, 1008, x2)
+
+inst_127:
+// rs2_val == -576460752303423489,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:-0x800000000000001
+TEST_CR_OP( c.subw, x10, x11, 0x7, 0x6, -0x800000000000001, x1, 1016, x2)
+
+inst_128:
+// rs2_val == -1152921504606846977, rs1_val == 281474976710656
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x1000000000000; op2val:-0x1000000000000001
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x1000000000000, -0x1000000000000001, x1, 1024, x2)
+
+inst_129:
+// rs2_val == -2305843009213693953,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x800001; op2val:-0x2000000000000001
+TEST_CR_OP( c.subw, x10, x11, -0x800000, -0x800001, -0x2000000000000001, x1, 1032, x2)
+
+inst_130:
+// rs2_val == -6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xa; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x5555554c, -0xa, -0x5555555555555556, x1, 1040, x2)
+
+inst_131:
+// rs1_val == 8,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x8; op2val:0x1000
+TEST_CR_OP( c.subw, x10, x11, -0xff8, 0x8, 0x1000, x1, 1048, x2)
+
+inst_132:
+// rs1_val == 64,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x40; op2val:0x40000000000
+TEST_CR_OP( c.subw, x10, x11, 0x40, 0x40, 0x40000000000, x1, 1056, x2)
+
+inst_133:
+// rs1_val == 128,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x80; op2val:0x4000000
+TEST_CR_OP( c.subw, x10, x11, -0x3ffff80, 0x80, 0x4000000, x1, 1064, x2)
+
+inst_134:
+// rs1_val == 256,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x100; op2val:0x80000000
+TEST_CR_OP( c.subw, x10, x11, -0x7fffff00, 0x100, 0x80000000, x1, 1072, x2)
+
+inst_135:
+// rs1_val == 512,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x200; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x1fc, 0x200, 0x4, x1, 1080, x2)
+
+inst_136:
+// rs1_val == 2048,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x800; op2val:0x40000
+TEST_CR_OP( c.subw, x10, x11, -0x3f800, 0x800, 0x40000, x1, 1088, x2)
+
+inst_137:
+// rs1_val == 32768,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x8000; op2val:-0x8001
+TEST_CR_OP( c.subw, x10, x11, 0x10001, 0x8000, -0x8001, x1, 1096, x2)
+
+inst_138:
+// rs1_val == 524288,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x80000; op2val:-0x80000000000001
+TEST_CR_OP( c.subw, x10, x11, 0x80001, 0x80000, -0x80000000000001, x1, 1104, x2)
+
+inst_139:
+// rs1_val == 1048576,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x100000; op2val:-0x801
+TEST_CR_OP( c.subw, x10, x11, 0x100801, 0x100000, -0x801, x1, 1112, x2)
+
+inst_140:
+// rs1_val == 8388608,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x800000; op2val:-0x100000000001
+TEST_CR_OP( c.subw, x10, x11, 0x800001, 0x800000, -0x100000000001, x1, 1120, x2)
+
+inst_141:
+// rs1_val == 16777216,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x1000000; op2val:-0x8
+TEST_CR_OP( c.subw, x10, x11, 0x1000008, 0x1000000, -0x8, x1, 1128, x2)
+
+inst_142:
+// rs1_val == 33554432,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2000000; op2val:-0x4
+TEST_CR_OP( c.subw, x10, x11, 0x2000004, 0x2000000, -0x4, x1, 1136, x2)
+
+inst_143:
+// rs1_val == 67108864,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4000000; op2val:-0x400000000001
+TEST_CR_OP( c.subw, x10, x11, 0x4000001, 0x4000000, -0x400000000001, x1, 1144, x2)
+
+inst_144:
+// rs1_val == 268435456,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x10000000; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x3afb0cce, 0x10000000, -0xb504f332, x1, 1152, x2)
+
+inst_145:
+// rs1_val == 4294967296,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x100000000; op2val:0x1
+TEST_CR_OP( c.subw, x10, x11, -0x1, 0x100000000, 0x1, x1, 1160, x2)
+
+inst_146:
+// rs1_val == 8589934592,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x200000000; op2val:-0x20001
+TEST_CR_OP( c.subw, x10, x11, 0x20001, 0x200000000, -0x20001, x1, 1168, x2)
+
+inst_147:
+// rs1_val == 68719476736,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x1000000000; op2val:-0x20000001
+TEST_CR_OP( c.subw, x10, x11, 0x20000001, 0x1000000000, -0x20000001, x1, 1176, x2)
+
+inst_148:
+// rs1_val == 549755813888,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x8000000000; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0ccc, 0x8000000000, 0xb504f334, x1, 1184, x2)
+
+inst_149:
+// rs1_val == 1099511627776,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x10000000000; op2val:0x80000000
+TEST_CR_OP( c.subw, x10, x11, -0x80000000, 0x10000000000, 0x80000000, x1, 1192, x2)
+
+inst_150:
+// rs1_val == 35184372088832,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x200000000000; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, -0x5, 0x200000000000, 0x5, x1, 1200, x2)
+
+inst_151:
+// rs1_val == 1125899906842624,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4000000000000; op2val:-0x4000001
+TEST_CR_OP( c.subw, x10, x11, 0x4000001, 0x4000000000000, -0x4000001, x1, 1208, x2)
+
+inst_152:
+// rs1_val == 4503599627370496,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x10000000000000; op2val:-0x4
+TEST_CR_OP( c.subw, x10, x11, 0x4, 0x10000000000000, -0x4, x1, 1216, x2)
+
+inst_153:
+// rs1_val == 9007199254740992,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x20000000000000; op2val:-0x100001
+TEST_CR_OP( c.subw, x10, x11, 0x100001, 0x20000000000000, -0x100001, x1, 1224, x2)
+
+inst_154:
+// rs1_val == 72057594037927936,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x100000000000000; op2val:0x40000000
+TEST_CR_OP( c.subw, x10, x11, -0x40000000, 0x100000000000000, 0x40000000, x1, 1232, x2)
+
+inst_155:
+// rs1_val == 144115188075855872,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x200000000000000; op2val:-0x4000000000000000
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x200000000000000, -0x4000000000000000, x1, 1240, x2)
+
+inst_156:
+// rs1_val == 2305843009213693952,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2000000000000000; op2val:-0x800000000001
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x2000000000000000, -0x800000000001, x1, 1248, x2)
+
+inst_157:
+// rs1_val == 4611686018427387904,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4000000000000000; op2val:-0x1000000000000001
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x4000000000000000, -0x1000000000000001, x1, 1256, x2)
+
+inst_158:
+// rs1_val == -2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x2; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, -0x5, -0x2, 0x3, x1, 1264, x2)
+
+inst_159:
+// rs1_val == -9,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x9; op2val:0x200000000000
+TEST_CR_OP( c.subw, x10, x11, -0x9, -0x9, 0x200000000000, x1, 1272, x2)
+
+inst_160:
+// rs1_val == -33,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x21; op2val:0x4000000000000
+TEST_CR_OP( c.subw, x10, x11, -0x21, -0x21, 0x4000000000000, x1, 1280, x2)
+
+inst_161:
+// rs1_val == -129,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x81; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0d4f, -0x81, -0xb504f332, x1, 1288, x2)
+
+inst_162:
+// rs1_val == -257,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x101; op2val:0x80000000
+TEST_CR_OP( c.subw, x10, x11, 0x7ffffeff, -0x101, 0x80000000, x1, 1296, x2)
+
+inst_163:
+// rs1_val == -2049,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x801; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, -0x803, -0x801, 0x2, x1, 1304, x2)
+
+inst_164:
+// rs1_val == -8193,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x2001; op2val:0x400000000
+TEST_CR_OP( c.subw, x10, x11, -0x2001, -0x2001, 0x400000000, x1, 1312, x2)
+
+inst_165:
+// rs1_val == -16385,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x4001; op2val:0x100
+TEST_CR_OP( c.subw, x10, x11, -0x4101, -0x4001, 0x100, x1, 1320, x2)
+
+inst_166:
+// rs1_val == -262145,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x40001; op2val:-0x40001
+TEST_CR_OP( c.subw, x10, x11, 0x0, -0x40001, -0x40001, x1, 1328, x2)
+
+inst_167:
+// rs1_val == -4194305,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x400001; op2val:0x80000
+TEST_CR_OP( c.subw, x10, x11, -0x480001, -0x400001, 0x80000, x1, 1336, x2)
+
+inst_168:
+// rs1_val == -16777217,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x1000001; op2val:-0x4000001
+TEST_CR_OP( c.subw, x10, x11, 0x3000000, -0x1000001, -0x4000001, x1, 1344, x2)
+
+inst_169:
+// rs1_val == -33554433,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x2000001; op2val:0x4000000
+TEST_CR_OP( c.subw, x10, x11, -0x6000001, -0x2000001, 0x4000000, x1, 1352, x2)
+
+inst_170:
+// rs1_val == -67108865,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x4000001; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, -0x4000001, -0x4000001, 0x0, x1, 1360, x2)
+
+inst_171:
+// rs1_val == -134217729,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x8000001; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, -0x8000005, -0x8000001, 0x4, x1, 1368, x2)
+
+inst_172:
+// rs1_val == -4294967297,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x100000001; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0x100000001, 0x0, x1, 1376, x2)
+
+inst_173:
+// rs1_val == -17179869185,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x400000001; op2val:-0x80000001
+TEST_CR_OP( c.subw, x10, x11, -0x80000000, -0x400000001, -0x80000001, x1, 1384, x2)
+
+inst_174:
+// rs1_val == -68719476737,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x1000000001; op2val:-0x80000001
+TEST_CR_OP( c.subw, x10, x11, -0x80000000, -0x1000000001, -0x80000001, x1, 1392, x2)
+
+inst_175:
+// rs1_val == -274877906945,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x4000000001; op2val:0x1
+TEST_CR_OP( c.subw, x10, x11, -0x2, -0x4000000001, 0x1, x1, 1400, x2)
+
+inst_176:
+// rs1_val == -2199023255553,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x20000000001; op2val:-0x400000000001
+TEST_CR_OP( c.subw, x10, x11, 0x0, -0x20000000001, -0x400000000001, x1, 1408, x2)
+
+inst_177:
+// rs1_val == -8796093022209,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x80000000001; op2val:0x800000000000
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0x80000000001, 0x800000000000, x1, 1416, x2)
+
+inst_178:
+// rs1_val == -70368744177665,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x400000000001; op2val:-0x20000001
+TEST_CR_OP( c.subw, x10, x11, 0x20000000, -0x400000000001, -0x20000001, x1, 1424, x2)
+
+inst_179:
+// rs1_val == -281474976710657,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x1000000000001; op2val:-0x2000001
+TEST_CR_OP( c.subw, x10, x11, 0x2000000, -0x1000000000001, -0x2000001, x1, 1432, x2)
+
+inst_180:
+// rs1_val == -2251799813685249,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x8000000000001; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cce, -0x8000000000001, -0xb504f333, x1, 1440, x2)
+
+inst_181:
+// rs1_val == -4503599627370497,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x10000000000001; op2val:0x200000000000000
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0x10000000000001, 0x200000000000000, x1, 1448, x2)
+
+inst_182:
+// rs1_val == -36028797018963969,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x80000000000001; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, -0x55555555, -0x80000000000001, 0x5555555555555554, x1, 1456, x2)
+
+inst_183:
+// rs1_val == -144115188075855873,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x200000000000001; op2val:0x1000000000000
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0x200000000000001, 0x1000000000000, x1, 1464, x2)
+
+inst_184:
+// rs1_val == -288230376151711745,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x400000000000001; op2val:0x200000000000000
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0x400000000000001, 0x200000000000000, x1, 1472, x2)
+
+inst_185:
+// rs1_val == -576460752303423489,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x800000000000001; op2val:-0x40000001
+TEST_CR_OP( c.subw, x10, x11, 0x40000000, -0x800000000000001, -0x40000001, x1, 1480, x2)
+
+inst_186:
+// rs1_val == 6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2000000000
+TEST_CR_OP( c.subw, x10, x11, 0x55555555, 0x5555555555555555, 0x2000000000, x1, 1488, x2)
+
+inst_187:
+// rs1_val==3 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x3, 0x3, x1, 1496, x2)
+
+inst_188:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x55555552, 0x3, 0x5555555555555555, x1, 1504, x2)
+
+inst_189:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x55555559, 0x3, -0x5555555555555556, x1, 1512, x2)
+
+inst_190:
+// rs1_val==3 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, -0x2, 0x3, 0x5, x1, 1520, x2)
+
+inst_191:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, -0x33333330, 0x3, 0x3333333333333333, x1, 1528, x2)
+
+inst_192:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x66666663, 0x3, 0x6666666666666666, x1, 1536, x2)
+
+inst_193:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cca, 0x3, -0xb504f333, x1, 1544, x2)
+
+inst_194:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cd0, 0x3, 0xb504f333, x1, 1552, x2)
+
+inst_195:
+// rs1_val==3 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x3, 0x2, x1, 1560, x2)
+
+inst_196:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, -0x55555551, 0x3, 0x5555555555555554, x1, 1568, x2)
+
+inst_197:
+// rs1_val==3 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x3, 0x3, 0x0, x1, 1576, x2)
+
+inst_198:
+// rs1_val==3 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, -0x1, 0x3, 0x4, x1, 1584, x2)
+
+inst_199:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, -0x3333332f, 0x3, 0x3333333333333332, x1, 1592, x2)
+
+inst_200:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x66666662, 0x3, 0x6666666666666665, x1, 1600, x2)
+
+inst_201:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cd1, 0x3, 0xb504f332, x1, 1608, x2)
+
+inst_202:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x55555553, 0x3, 0x5555555555555556, x1, 1616, x2)
+
+inst_203:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x55555558, 0x3, -0x5555555555555555, x1, 1624, x2)
+
+inst_204:
+// rs1_val==3 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, -0x3, 0x3, 0x6, x1, 1632, x2)
+
+inst_205:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, -0x33333331, 0x3, 0x3333333333333334, x1, 1640, x2)
+
+inst_206:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x66666664, 0x3, 0x6666666666666667, x1, 1648, x2)
+
+inst_207:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0ccb, 0x3, -0xb504f332, x1, 1656, x2)
+
+inst_208:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0ccf, 0x3, 0xb504f334, x1, 1664, x2)
+
+inst_209:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x55555552, 0x5555555555555555, 0x3, x1, 1672, x2)
+
+inst_210:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x5555555555555555, 0x5555555555555555, x1, 1680, x2)
+
+inst_211:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x55555555, 0x5555555555555555, -0x5555555555555556, x1, 1688, x2)
+
+inst_212:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, 0x55555550, 0x5555555555555555, 0x5, x1, 1696, x2)
+
+inst_213:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, 0x22222222, 0x5555555555555555, 0x3333333333333333, x1, 1704, x2)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x11111111, 0x5555555555555555, 0x6666666666666666, x1, 1712, x2)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0xa5a4888, 0x5555555555555555, -0xb504f333, x1, 1720, x2)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x5faf9dde, 0x5555555555555555, 0xb504f333, x1, 1728, x2)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x55555553, 0x5555555555555555, 0x2, x1, 1736, x2)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x5555555555555555, 0x5555555555555554, x1, 1744, x2)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x55555555, 0x5555555555555555, 0x0, x1, 1752, x2)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x55555551, 0x5555555555555555, 0x4, x1, 1760, x2)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, 0x22222223, 0x5555555555555555, 0x3333333333333332, x1, 1768, x2)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x11111110, 0x5555555555555555, 0x6666666666666665, x1, 1776, x2)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x5faf9ddd, 0x5555555555555555, 0xb504f332, x1, 1784, x2)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x1, 0x5555555555555555, 0x5555555555555556, x1, 1792, x2)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x55555556, 0x5555555555555555, -0x5555555555555555, x1, 1800, x2)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, 0x5555554f, 0x5555555555555555, 0x6, x1, 1808, x2)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, 0x22222221, 0x5555555555555555, 0x3333333333333334, x1, 1816, x2)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x11111112, 0x5555555555555555, 0x6666666666666667, x1, 1824, x2)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0xa5a4887, 0x5555555555555555, -0xb504f332, x1, 1832, x2)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, -0x5faf9ddf, 0x5555555555555555, 0xb504f334, x1, 1840, x2)
+
+inst_231:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, -0x55555559, -0x5555555555555556, 0x3, x1, 1848, x2)
+
+inst_232:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x55555555, -0x5555555555555556, 0x5555555555555555, x1, 1856, x2)
+
+inst_233:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x0, -0x5555555555555556, -0x5555555555555556, x1, 1864, x2)
+
+inst_234:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, -0x5555555b, -0x5555555555555556, 0x5, x1, 1872, x2)
+
+inst_235:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, 0x77777777, -0x5555555555555556, 0x3333333333333333, x1, 1880, x2)
+
+inst_236:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, 0x44444444, -0x5555555555555556, 0x6666666666666666, x1, 1888, x2)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x5faf9ddd, -0x5555555555555556, -0xb504f333, x1, 1896, x2)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0xa5a4889, -0x5555555555555556, 0xb504f333, x1, 1904, x2)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, -0x55555558, -0x5555555555555556, 0x2, x1, 1912, x2)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, 0x55555556, -0x5555555555555556, 0x5555555555555554, x1, 1920, x2)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, -0x55555556, -0x5555555555555556, 0x0, x1, 1928, x2)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, -0x5555555a, -0x5555555555555556, 0x4, x1, 1936, x2)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, 0x77777778, -0x5555555555555556, 0x3333333333333332, x1, 1944, x2)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, 0x44444445, -0x5555555555555556, 0x6666666666666665, x1, 1952, x2)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0xa5a4888, -0x5555555555555556, 0xb504f332, x1, 1960, x2)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x55555554, -0x5555555555555556, 0x5555555555555556, x1, 1968, x2)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0x5555555555555556, -0x5555555555555555, x1, 1976, x2)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, -0x5555555c, -0x5555555555555556, 0x6, x1, 1984, x2)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, 0x77777776, -0x5555555555555556, 0x3333333333333334, x1, 1992, x2)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, 0x44444443, -0x5555555555555556, 0x6666666666666667, x1, 2000, x2)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x5faf9ddc, -0x5555555555555556, -0xb504f332, x1, 2008, x2)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, -0xa5a488a, -0x5555555555555556, 0xb504f334, x1, 2016, x2)
+
+inst_253:
+// rs1_val==5 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x2, 0x5, 0x3, x1, 2024, x2)
+
+inst_254:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x55555550, 0x5, 0x5555555555555555, x1, 2032, x2)
+
+inst_255:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x5555555b, 0x5, -0x5555555555555556, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_256:
+// rs1_val==5 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x5, 0x5, x1, 0, x2)
+
+inst_257:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, -0x3333332e, 0x5, 0x3333333333333333, x1, 8, x2)
+
+inst_258:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x66666661, 0x5, 0x6666666666666666, x1, 16, x2)
+
+inst_259:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cc8, 0x5, -0xb504f333, x1, 24, x2)
+
+inst_260:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cd2, 0x5, 0xb504f333, x1, 32, x2)
+
+inst_261:
+// rs1_val==5 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x3, 0x5, 0x2, x1, 40, x2)
+
+inst_262:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, -0x5555554f, 0x5, 0x5555555555555554, x1, 48, x2)
+
+inst_263:
+// rs1_val==5 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x5, 0x5, 0x0, x1, 56, x2)
+
+inst_264:
+// rs1_val==5 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x5, 0x4, x1, 64, x2)
+
+inst_265:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, -0x3333332d, 0x5, 0x3333333333333332, x1, 72, x2)
+
+inst_266:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x66666660, 0x5, 0x6666666666666665, x1, 80, x2)
+
+inst_267:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cd3, 0x5, 0xb504f332, x1, 88, x2)
+
+inst_268:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x55555551, 0x5, 0x5555555555555556, x1, 96, x2)
+
+inst_269:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x5555555a, 0x5, -0x5555555555555555, x1, 104, x2)
+
+inst_270:
+// rs1_val==5 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, -0x1, 0x5, 0x6, x1, 112, x2)
+
+inst_271:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, -0x3333332f, 0x5, 0x3333333333333334, x1, 120, x2)
+
+inst_272:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x66666662, 0x5, 0x6666666666666667, x1, 128, x2)
+
+inst_273:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cc9, 0x5, -0xb504f332, x1, 136, x2)
+
+inst_274:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cd1, 0x5, 0xb504f334, x1, 144, x2)
+
+inst_275:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x33333330, 0x3333333333333333, 0x3, x1, 152, x2)
+
+inst_276:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x22222222, 0x3333333333333333, 0x5555555555555555, x1, 160, x2)
+
+inst_277:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x77777777, 0x3333333333333333, -0x5555555555555556, x1, 168, x2)
+
+inst_278:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, 0x3333332e, 0x3333333333333333, 0x5, x1, 176, x2)
+
+inst_279:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x3333333333333333, 0x3333333333333333, x1, 184, x2)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x33333333, 0x3333333333333333, 0x6666666666666666, x1, 192, x2)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x17c7d99a, 0x3333333333333333, -0xb504f333, x1, 200, x2)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x7e2e4000, 0x3333333333333333, 0xb504f333, x1, 208, x2)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x33333331, 0x3333333333333333, 0x2, x1, 216, x2)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, -0x22222221, 0x3333333333333333, 0x5555555555555554, x1, 224, x2)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x33333333, 0x3333333333333333, 0x0, x1, 232, x2)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x3333332f, 0x3333333333333333, 0x4, x1, 240, x2)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x3333333333333333, 0x3333333333333332, x1, 248, x2)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x33333332, 0x3333333333333333, 0x6666666666666665, x1, 256, x2)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x7e2e4001, 0x3333333333333333, 0xb504f332, x1, 264, x2)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x22222223, 0x3333333333333333, 0x5555555555555556, x1, 272, x2)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x77777778, 0x3333333333333333, -0x5555555555555555, x1, 280, x2)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, 0x3333332d, 0x3333333333333333, 0x6, x1, 288, x2)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, -0x1, 0x3333333333333333, 0x3333333333333334, x1, 296, x2)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x33333334, 0x3333333333333333, 0x6666666666666667, x1, 304, x2)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x17c7d99b, 0x3333333333333333, -0xb504f332, x1, 312, x2)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, 0x7e2e3fff, 0x3333333333333333, 0xb504f334, x1, 320, x2)
+
+inst_297:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x66666663, 0x6666666666666666, 0x3, x1, 328, x2)
+
+inst_298:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x11111111, 0x6666666666666666, 0x5555555555555555, x1, 336, x2)
+
+inst_299:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x44444444, 0x6666666666666666, -0x5555555555555556, x1, 344, x2)
+
+inst_300:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, 0x66666661, 0x6666666666666666, 0x5, x1, 352, x2)
+
+inst_301:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, 0x33333333, 0x6666666666666666, 0x3333333333333333, x1, 360, x2)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x6666666666666666, 0x6666666666666666, x1, 368, x2)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x1b6b5999, 0x6666666666666666, -0xb504f333, x1, 376, x2)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x4e9e8ccd, 0x6666666666666666, 0xb504f333, x1, 384, x2)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x66666664, 0x6666666666666666, 0x2, x1, 392, x2)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, 0x11111112, 0x6666666666666666, 0x5555555555555554, x1, 400, x2)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x66666666, 0x6666666666666666, 0x0, x1, 408, x2)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x66666662, 0x6666666666666666, 0x4, x1, 416, x2)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, 0x33333334, 0x6666666666666666, 0x3333333333333332, x1, 424, x2)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x6666666666666666, 0x6666666666666665, x1, 432, x2)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x4e9e8ccc, 0x6666666666666666, 0xb504f332, x1, 440, x2)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x11111110, 0x6666666666666666, 0x5555555555555556, x1, 448, x2)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x44444445, 0x6666666666666666, -0x5555555555555555, x1, 456, x2)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, 0x66666660, 0x6666666666666666, 0x6, x1, 464, x2)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, 0x33333332, 0x6666666666666666, 0x3333333333333334, x1, 472, x2)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x1, 0x6666666666666666, 0x6666666666666667, x1, 480, x2)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x1b6b5998, 0x6666666666666666, -0xb504f332, x1, 488, x2)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, -0x4e9e8cce, 0x6666666666666666, 0xb504f334, x1, 496, x2)
+
+inst_319:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cca, -0xb504f333, 0x3, x1, 504, x2)
+
+inst_320:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0xa5a4888, -0xb504f333, 0x5555555555555555, x1, 512, x2)
+
+inst_321:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x5faf9ddd, -0xb504f333, -0x5555555555555556, x1, 520, x2)
+
+inst_322:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cc8, -0xb504f333, 0x5, x1, 528, x2)
+
+inst_323:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, 0x17c7d99a, -0xb504f333, 0x3333333333333333, x1, 536, x2)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x1b6b5999, -0xb504f333, 0x6666666666666666, x1, 544, x2)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x0, -0xb504f333, -0xb504f333, x1, 552, x2)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x6a09e666, -0xb504f333, 0xb504f333, x1, 560, x2)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0ccb, -0xb504f333, 0x2, x1, 568, x2)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, -0xa5a4887, -0xb504f333, 0x5555555555555554, x1, 576, x2)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0ccd, -0xb504f333, 0x0, x1, 584, x2)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cc9, -0xb504f333, 0x4, x1, 592, x2)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, 0x17c7d99b, -0xb504f333, 0x3333333333333332, x1, 600, x2)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x1b6b5998, -0xb504f333, 0x6666666666666665, x1, 608, x2)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x6a09e665, -0xb504f333, 0xb504f332, x1, 616, x2)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0xa5a4889, -0xb504f333, 0x5555555555555556, x1, 624, x2)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x5faf9dde, -0xb504f333, -0x5555555555555555, x1, 632, x2)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cc7, -0xb504f333, 0x6, x1, 640, x2)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, 0x17c7d999, -0xb504f333, 0x3333333333333334, x1, 648, x2)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x1b6b599a, -0xb504f333, 0x6666666666666667, x1, 656, x2)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x1, -0xb504f333, -0xb504f332, x1, 664, x2)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, -0x6a09e667, -0xb504f333, 0xb504f334, x1, 672, x2)
+
+inst_341:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cd0, 0xb504f333, 0x3, x1, 680, x2)
+
+inst_342:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x5faf9dde, 0xb504f333, 0x5555555555555555, x1, 688, x2)
+
+inst_343:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0xa5a4889, 0xb504f333, -0x5555555555555556, x1, 696, x2)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cd2, 0xb504f333, 0x5, x1, 704, x2)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, -0x7e2e4000, 0xb504f333, 0x3333333333333333, x1, 712, x2)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, 0x4e9e8ccd, 0xb504f333, 0x6666666666666666, x1, 720, x2)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x6a09e666, 0xb504f333, -0xb504f333, x1, 728, x2)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0xb504f333, 0xb504f333, x1, 736, x2)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0ccf, 0xb504f333, 0x2, x1, 744, x2)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, 0x5faf9ddf, 0xb504f333, 0x5555555555555554, x1, 752, x2)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0ccd, 0xb504f333, 0x0, x1, 760, x2)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cd1, 0xb504f333, 0x4, x1, 768, x2)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, -0x7e2e3fff, 0xb504f333, 0x3333333333333332, x1, 776, x2)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, 0x4e9e8cce, 0xb504f333, 0x6666666666666665, x1, 784, x2)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0xb504f333, 0xb504f332, x1, 792, x2)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x5faf9ddd, 0xb504f333, 0x5555555555555556, x1, 800, x2)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0xa5a4888, 0xb504f333, -0x5555555555555555, x1, 808, x2)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cd3, 0xb504f333, 0x6, x1, 816, x2)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, -0x7e2e4001, 0xb504f333, 0x3333333333333334, x1, 824, x2)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, 0x4e9e8ccc, 0xb504f333, 0x6666666666666667, x1, 832, x2)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x6a09e665, 0xb504f333, -0xb504f332, x1, 840, x2)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, -0x1, 0xb504f333, 0xb504f334, x1, 848, x2)
+
+inst_363:
+// rs1_val==2 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, -0x1, 0x2, 0x3, x1, 856, x2)
+
+inst_364:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x55555553, 0x2, 0x5555555555555555, x1, 864, x2)
+
+inst_365:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x55555558, 0x2, -0x5555555555555556, x1, 872, x2)
+
+inst_366:
+// rs1_val==2 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, -0x3, 0x2, 0x5, x1, 880, x2)
+
+inst_367:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, -0x33333331, 0x2, 0x3333333333333333, x1, 888, x2)
+
+inst_368:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x66666664, 0x2, 0x6666666666666666, x1, 896, x2)
+
+inst_369:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0ccb, 0x2, -0xb504f333, x1, 904, x2)
+
+inst_370:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0ccf, 0x2, 0xb504f333, x1, 912, x2)
+
+inst_371:
+// rs1_val==2 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x2, 0x2, x1, 920, x2)
+
+inst_372:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, -0x55555552, 0x2, 0x5555555555555554, x1, 928, x2)
+
+inst_373:
+// rs1_val==2 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x2, 0x2, 0x0, x1, 936, x2)
+
+inst_374:
+// rs1_val==2 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, -0x2, 0x2, 0x4, x1, 944, x2)
+
+inst_375:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, -0x33333330, 0x2, 0x3333333333333332, x1, 952, x2)
+
+inst_376:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x66666663, 0x2, 0x6666666666666665, x1, 960, x2)
+
+inst_377:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cd0, 0x2, 0xb504f332, x1, 968, x2)
+
+inst_378:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x55555554, 0x2, 0x5555555555555556, x1, 976, x2)
+
+inst_379:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x55555557, 0x2, -0x5555555555555555, x1, 984, x2)
+
+inst_380:
+// rs1_val==2 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, -0x4, 0x2, 0x6, x1, 992, x2)
+
+inst_381:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, -0x33333332, 0x2, 0x3333333333333334, x1, 1000, x2)
+
+inst_382:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x66666665, 0x2, 0x6666666666666667, x1, 1008, x2)
+
+inst_383:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0ccc, 0x2, -0xb504f332, x1, 1016, x2)
+
+inst_384:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cce, 0x2, 0xb504f334, x1, 1024, x2)
+
+inst_385:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x55555551, 0x5555555555555554, 0x3, x1, 1032, x2)
+
+inst_386:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x1, 0x5555555555555554, 0x5555555555555555, x1, 1040, x2)
+
+inst_387:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x55555556, 0x5555555555555554, -0x5555555555555556, x1, 1048, x2)
+
+inst_388:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, 0x5555554f, 0x5555555555555554, 0x5, x1, 1056, x2)
+
+inst_389:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, 0x22222221, 0x5555555555555554, 0x3333333333333333, x1, 1064, x2)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x11111112, 0x5555555555555554, 0x6666666666666666, x1, 1072, x2)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0xa5a4887, 0x5555555555555554, -0xb504f333, x1, 1080, x2)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x5faf9ddf, 0x5555555555555554, 0xb504f333, x1, 1088, x2)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x55555552, 0x5555555555555554, 0x2, x1, 1096, x2)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x5555555555555554, 0x5555555555555554, x1, 1104, x2)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x55555554, 0x5555555555555554, 0x0, x1, 1112, x2)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x55555550, 0x5555555555555554, 0x4, x1, 1120, x2)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, 0x22222222, 0x5555555555555554, 0x3333333333333332, x1, 1128, x2)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x11111111, 0x5555555555555554, 0x6666666666666665, x1, 1136, x2)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x5faf9dde, 0x5555555555555554, 0xb504f332, x1, 1144, x2)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x2, 0x5555555555555554, 0x5555555555555556, x1, 1152, x2)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x55555557, 0x5555555555555554, -0x5555555555555555, x1, 1160, x2)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, 0x5555554e, 0x5555555555555554, 0x6, x1, 1168, x2)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, 0x22222220, 0x5555555555555554, 0x3333333333333334, x1, 1176, x2)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x11111113, 0x5555555555555554, 0x6666666666666667, x1, 1184, x2)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0xa5a4886, 0x5555555555555554, -0xb504f332, x1, 1192, x2)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, -0x5faf9de0, 0x5555555555555554, 0xb504f334, x1, 1200, x2)
+
+inst_407:
+// rs1_val==0 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, -0x3, 0x0, 0x3, x1, 1208, x2)
+
+inst_408:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x55555555, 0x0, 0x5555555555555555, x1, 1216, x2)
+
+inst_409:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x55555556, 0x0, -0x5555555555555556, x1, 1224, x2)
+
+inst_410:
+// rs1_val==0 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, -0x5, 0x0, 0x5, x1, 1232, x2)
+
+inst_411:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, -0x33333333, 0x0, 0x3333333333333333, x1, 1240, x2)
+
+inst_412:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x66666666, 0x0, 0x6666666666666666, x1, 1248, x2)
+
+inst_413:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0ccd, 0x0, -0xb504f333, x1, 1256, x2)
+
+inst_414:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0ccd, 0x0, 0xb504f333, x1, 1264, x2)
+
+inst_415:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x5555555a, 0x4, -0x5555555555555556, x1, 1272, x2)
+
+inst_416:
+// rs1_val==4 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, -0x1, 0x4, 0x5, x1, 1280, x2)
+
+inst_417:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, -0x3333332f, 0x4, 0x3333333333333333, x1, 1288, x2)
+
+inst_418:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x66666662, 0x4, 0x6666666666666666, x1, 1296, x2)
+
+inst_419:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cc9, 0x4, -0xb504f333, x1, 1304, x2)
+
+inst_420:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cd1, 0x4, 0xb504f333, x1, 1312, x2)
+
+inst_421:
+// rs1_val==4 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x2, 0x4, 0x2, x1, 1320, x2)
+
+inst_422:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, -0x55555550, 0x4, 0x5555555555555554, x1, 1328, x2)
+
+inst_423:
+// rs1_val==4 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x4, 0x4, 0x0, x1, 1336, x2)
+
+inst_424:
+// rs1_val==4 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x4, 0x4, x1, 1344, x2)
+
+inst_425:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, -0x3333332e, 0x4, 0x3333333333333332, x1, 1352, x2)
+
+inst_426:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x66666661, 0x4, 0x6666666666666665, x1, 1360, x2)
+
+inst_427:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cd2, 0x4, 0xb504f332, x1, 1368, x2)
+
+inst_428:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x55555552, 0x4, 0x5555555555555556, x1, 1376, x2)
+
+inst_429:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x55555559, 0x4, -0x5555555555555555, x1, 1384, x2)
+
+inst_430:
+// rs1_val==4 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, -0x2, 0x4, 0x6, x1, 1392, x2)
+
+inst_431:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, -0x33333330, 0x4, 0x3333333333333334, x1, 1400, x2)
+
+inst_432:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x66666663, 0x4, 0x6666666666666667, x1, 1408, x2)
+
+inst_433:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cca, 0x4, -0xb504f332, x1, 1416, x2)
+
+inst_434:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cd0, 0x4, 0xb504f334, x1, 1424, x2)
+
+inst_435:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x3333332f, 0x3333333333333332, 0x3, x1, 1432, x2)
+
+inst_436:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x22222223, 0x3333333333333332, 0x5555555555555555, x1, 1440, x2)
+
+inst_437:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x77777778, 0x3333333333333332, -0x5555555555555556, x1, 1448, x2)
+
+inst_438:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, 0x3333332d, 0x3333333333333332, 0x5, x1, 1456, x2)
+
+inst_439:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, -0x1, 0x3333333333333332, 0x3333333333333333, x1, 1464, x2)
+
+inst_440:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x33333334, 0x3333333333333332, 0x6666666666666666, x1, 1472, x2)
+
+inst_441:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x17c7d99b, 0x3333333333333332, -0xb504f333, x1, 1480, x2)
+
+inst_442:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x7e2e3fff, 0x3333333333333332, 0xb504f333, x1, 1488, x2)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x33333330, 0x3333333333333332, 0x2, x1, 1496, x2)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, -0x22222222, 0x3333333333333332, 0x5555555555555554, x1, 1504, x2)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x33333332, 0x3333333333333332, 0x0, x1, 1512, x2)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x3333332e, 0x3333333333333332, 0x4, x1, 1520, x2)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x3333333333333332, 0x3333333333333332, x1, 1528, x2)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x33333333, 0x3333333333333332, 0x6666666666666665, x1, 1536, x2)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x7e2e4000, 0x3333333333333332, 0xb504f332, x1, 1544, x2)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x22222224, 0x3333333333333332, 0x5555555555555556, x1, 1552, x2)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x77777779, 0x3333333333333332, -0x5555555555555555, x1, 1560, x2)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, 0x3333332c, 0x3333333333333332, 0x6, x1, 1568, x2)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, -0x2, 0x3333333333333332, 0x3333333333333334, x1, 1576, x2)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x33333335, 0x3333333333333332, 0x6666666666666667, x1, 1584, x2)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x17c7d99c, 0x3333333333333332, -0xb504f332, x1, 1592, x2)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, 0x7e2e3ffe, 0x3333333333333332, 0xb504f334, x1, 1600, x2)
+
+inst_457:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x66666662, 0x6666666666666665, 0x3, x1, 1608, x2)
+
+inst_458:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x11111110, 0x6666666666666665, 0x5555555555555555, x1, 1616, x2)
+
+inst_459:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x44444445, 0x6666666666666665, -0x5555555555555556, x1, 1624, x2)
+
+inst_460:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, 0x66666660, 0x6666666666666665, 0x5, x1, 1632, x2)
+
+inst_461:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, 0x33333332, 0x6666666666666665, 0x3333333333333333, x1, 1640, x2)
+
+inst_462:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x1, 0x6666666666666665, 0x6666666666666666, x1, 1648, x2)
+
+inst_463:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x1b6b5998, 0x6666666666666665, -0xb504f333, x1, 1656, x2)
+
+inst_464:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x4e9e8cce, 0x6666666666666665, 0xb504f333, x1, 1664, x2)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x66666663, 0x6666666666666665, 0x2, x1, 1672, x2)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, 0x11111111, 0x6666666666666665, 0x5555555555555554, x1, 1680, x2)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x66666665, 0x6666666666666665, 0x0, x1, 1688, x2)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x66666661, 0x6666666666666665, 0x4, x1, 1696, x2)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, 0x33333333, 0x6666666666666665, 0x3333333333333332, x1, 1704, x2)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x6666666666666665, 0x6666666666666665, x1, 1712, x2)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x4e9e8ccd, 0x6666666666666665, 0xb504f332, x1, 1720, x2)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x1111110f, 0x6666666666666665, 0x5555555555555556, x1, 1728, x2)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x44444446, 0x6666666666666665, -0x5555555555555555, x1, 1736, x2)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, 0x6666665f, 0x6666666666666665, 0x6, x1, 1744, x2)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, 0x33333331, 0x6666666666666665, 0x3333333333333334, x1, 1752, x2)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x2, 0x6666666666666665, 0x6666666666666667, x1, 1760, x2)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x1b6b5997, 0x6666666666666665, -0xb504f332, x1, 1768, x2)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, -0x4e9e8ccf, 0x6666666666666665, 0xb504f334, x1, 1776, x2)
+
+inst_479:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cd1, 0xb504f332, 0x3, x1, 1784, x2)
+
+inst_480:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x5faf9ddd, 0xb504f332, 0x5555555555555555, x1, 1792, x2)
+
+inst_481:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0xa5a4888, 0xb504f332, -0x5555555555555556, x1, 1800, x2)
+
+inst_482:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cd3, 0xb504f332, 0x5, x1, 1808, x2)
+
+inst_483:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, -0x7e2e4001, 0xb504f332, 0x3333333333333333, x1, 1816, x2)
+
+inst_484:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, 0x4e9e8ccc, 0xb504f332, 0x6666666666666666, x1, 1824, x2)
+
+inst_485:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x6a09e665, 0xb504f332, -0xb504f333, x1, 1832, x2)
+
+inst_486:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x1, 0xb504f332, 0xb504f333, x1, 1840, x2)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cd0, 0xb504f332, 0x2, x1, 1848, x2)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, 0x5faf9dde, 0xb504f332, 0x5555555555555554, x1, 1856, x2)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cce, 0xb504f332, 0x0, x1, 1864, x2)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cd2, 0xb504f332, 0x4, x1, 1872, x2)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, -0x7e2e4000, 0xb504f332, 0x3333333333333332, x1, 1880, x2)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, 0x4e9e8ccd, 0xb504f332, 0x6666666666666665, x1, 1888, x2)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0xb504f332, 0xb504f332, x1, 1896, x2)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x5faf9ddc, 0xb504f332, 0x5555555555555556, x1, 1904, x2)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0xa5a4887, 0xb504f332, -0x5555555555555555, x1, 1912, x2)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cd4, 0xb504f332, 0x6, x1, 1920, x2)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, -0x7e2e4002, 0xb504f332, 0x3333333333333334, x1, 1928, x2)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, 0x4e9e8ccb, 0xb504f332, 0x6666666666666667, x1, 1936, x2)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x6a09e664, 0xb504f332, -0xb504f332, x1, 1944, x2)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, -0x2, 0xb504f332, 0xb504f334, x1, 1952, x2)
+
+inst_501:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x55555553, 0x5555555555555556, 0x3, x1, 1960, x2)
+
+inst_502:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x5555555555555556, 0x5555555555555555, x1, 1968, x2)
+
+inst_503:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x55555554, 0x5555555555555556, -0x5555555555555556, x1, 1976, x2)
+
+inst_504:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, 0x55555551, 0x5555555555555556, 0x5, x1, 1984, x2)
+
+inst_505:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, 0x22222223, 0x5555555555555556, 0x3333333333333333, x1, 1992, x2)
+
+inst_506:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x11111110, 0x5555555555555556, 0x6666666666666666, x1, 2000, x2)
+
+inst_507:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0xa5a4889, 0x5555555555555556, -0xb504f333, x1, 2008, x2)
+
+inst_508:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x5faf9ddd, 0x5555555555555556, 0xb504f333, x1, 2016, x2)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x55555554, 0x5555555555555556, 0x2, x1, 2024, x2)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, 0x2, 0x5555555555555556, 0x5555555555555554, x1, 2032, x2)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x55555556, 0x5555555555555556, 0x0, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_3)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x55555552, 0x5555555555555556, 0x4, x1, 0, x2)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, 0x22222224, 0x5555555555555556, 0x3333333333333332, x1, 8, x2)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x1111110f, 0x5555555555555556, 0x6666666666666665, x1, 16, x2)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x5faf9ddc, 0x5555555555555556, 0xb504f332, x1, 24, x2)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x5555555555555556, 0x5555555555555556, x1, 32, x2)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x55555555, 0x5555555555555556, -0x5555555555555555, x1, 40, x2)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, 0x55555550, 0x5555555555555556, 0x6, x1, 48, x2)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, 0x22222222, 0x5555555555555556, 0x3333333333333334, x1, 56, x2)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x11111111, 0x5555555555555556, 0x6666666666666667, x1, 64, x2)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0xa5a4888, 0x5555555555555556, -0xb504f332, x1, 72, x2)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, -0x5faf9dde, 0x5555555555555556, 0xb504f334, x1, 80, x2)
+
+inst_523:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, -0x55555558, -0x5555555555555555, 0x3, x1, 88, x2)
+
+inst_524:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x55555556, -0x5555555555555555, 0x5555555555555555, x1, 96, x2)
+
+inst_525:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x1, -0x5555555555555555, -0x5555555555555556, x1, 104, x2)
+
+inst_526:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, -0x5555555a, -0x5555555555555555, 0x5, x1, 112, x2)
+
+inst_527:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, 0x77777778, -0x5555555555555555, 0x3333333333333333, x1, 120, x2)
+
+inst_528:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, 0x44444445, -0x5555555555555555, 0x6666666666666666, x1, 128, x2)
+
+inst_529:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x5faf9dde, -0x5555555555555555, -0xb504f333, x1, 136, x2)
+
+inst_530:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0xa5a4888, -0x5555555555555555, 0xb504f333, x1, 144, x2)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, -0x55555557, -0x5555555555555555, 0x2, x1, 152, x2)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, 0x55555557, -0x5555555555555555, 0x5555555555555554, x1, 160, x2)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, -0x55555555, -0x5555555555555555, 0x0, x1, 168, x2)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, -0x55555559, -0x5555555555555555, 0x4, x1, 176, x2)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, 0x77777779, -0x5555555555555555, 0x3333333333333332, x1, 184, x2)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, 0x44444446, -0x5555555555555555, 0x6666666666666665, x1, 192, x2)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0xa5a4887, -0x5555555555555555, 0xb504f332, x1, 200, x2)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x55555555, -0x5555555555555555, 0x5555555555555556, x1, 208, x2)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x0, -0x5555555555555555, -0x5555555555555555, x1, 216, x2)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, -0x5555555b, -0x5555555555555555, 0x6, x1, 224, x2)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, 0x77777777, -0x5555555555555555, 0x3333333333333334, x1, 232, x2)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, 0x44444444, -0x5555555555555555, 0x6666666666666667, x1, 240, x2)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x5faf9ddd, -0x5555555555555555, -0xb504f332, x1, 248, x2)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, -0xa5a4889, -0x5555555555555555, 0xb504f334, x1, 256, x2)
+
+inst_545:
+// rs1_val==6 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x3, 0x6, 0x3, x1, 264, x2)
+
+inst_546:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x5555554f, 0x6, 0x5555555555555555, x1, 272, x2)
+
+inst_547:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x5555555c, 0x6, -0x5555555555555556, x1, 280, x2)
+
+inst_548:
+// rs1_val==6 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x6, 0x5, x1, 288, x2)
+
+inst_549:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, -0x3333332d, 0x6, 0x3333333333333333, x1, 296, x2)
+
+inst_550:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x66666660, 0x6, 0x6666666666666666, x1, 304, x2)
+
+inst_551:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cc7, 0x6, -0xb504f333, x1, 312, x2)
+
+inst_552:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cd3, 0x6, 0xb504f333, x1, 320, x2)
+
+inst_553:
+// rs1_val==6 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x4, 0x6, 0x2, x1, 328, x2)
+
+inst_554:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, -0x5555554e, 0x6, 0x5555555555555554, x1, 336, x2)
+
+inst_555:
+// rs1_val==6 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x6, 0x6, 0x0, x1, 344, x2)
+
+inst_556:
+// rs1_val==6 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x2, 0x6, 0x4, x1, 352, x2)
+
+inst_557:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, -0x3333332c, 0x6, 0x3333333333333332, x1, 360, x2)
+
+inst_558:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x6666665f, 0x6, 0x6666666666666665, x1, 368, x2)
+
+inst_559:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cd4, 0x6, 0xb504f332, x1, 376, x2)
+
+inst_560:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x55555550, 0x6, 0x5555555555555556, x1, 384, x2)
+
+inst_561:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x5555555b, 0x6, -0x5555555555555555, x1, 392, x2)
+
+inst_562:
+// rs1_val==6 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x6, 0x6, x1, 400, x2)
+
+inst_563:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, -0x3333332e, 0x6, 0x3333333333333334, x1, 408, x2)
+
+inst_564:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x66666661, 0x6, 0x6666666666666667, x1, 416, x2)
+
+inst_565:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cc8, 0x6, -0xb504f332, x1, 424, x2)
+
+inst_566:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cd2, 0x6, 0xb504f334, x1, 432, x2)
+
+inst_567:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x33333331, 0x3333333333333334, 0x3, x1, 440, x2)
+
+inst_568:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x22222221, 0x3333333333333334, 0x5555555555555555, x1, 448, x2)
+
+inst_569:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x77777776, 0x3333333333333334, -0x5555555555555556, x1, 456, x2)
+
+inst_570:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, 0x3333332f, 0x3333333333333334, 0x5, x1, 464, x2)
+
+inst_571:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x3333333333333334, 0x3333333333333333, x1, 472, x2)
+
+inst_572:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x33333332, 0x3333333333333334, 0x6666666666666666, x1, 480, x2)
+
+inst_573:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x17c7d999, 0x3333333333333334, -0xb504f333, x1, 488, x2)
+
+inst_574:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x7e2e4001, 0x3333333333333334, 0xb504f333, x1, 496, x2)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x33333332, 0x3333333333333334, 0x2, x1, 504, x2)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, -0x22222220, 0x3333333333333334, 0x5555555555555554, x1, 512, x2)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x33333334, 0x3333333333333334, 0x0, x1, 520, x2)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, 0x2, 0x3333333333333334, 0x3333333333333332, x1, 528, x2)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x33333331, 0x3333333333333334, 0x6666666666666665, x1, 536, x2)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x7e2e4002, 0x3333333333333334, 0xb504f332, x1, 544, x2)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x22222222, 0x3333333333333334, 0x5555555555555556, x1, 552, x2)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x77777777, 0x3333333333333334, -0x5555555555555555, x1, 560, x2)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, 0x3333332e, 0x3333333333333334, 0x6, x1, 568, x2)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x3333333333333334, 0x3333333333333334, x1, 576, x2)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x33333333, 0x3333333333333334, 0x6666666666666667, x1, 584, x2)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x17c7d99a, 0x3333333333333334, -0xb504f332, x1, 592, x2)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, 0x7e2e4000, 0x3333333333333334, 0xb504f334, x1, 600, x2)
+
+inst_588:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x66666664, 0x6666666666666667, 0x3, x1, 608, x2)
+
+inst_589:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x11111112, 0x6666666666666667, 0x5555555555555555, x1, 616, x2)
+
+inst_590:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x44444443, 0x6666666666666667, -0x5555555555555556, x1, 624, x2)
+
+inst_591:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, 0x66666662, 0x6666666666666667, 0x5, x1, 632, x2)
+
+inst_592:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, 0x33333334, 0x6666666666666667, 0x3333333333333333, x1, 640, x2)
+
+inst_593:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x6666666666666667, 0x6666666666666666, x1, 648, x2)
+
+inst_594:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x1b6b599a, 0x6666666666666667, -0xb504f333, x1, 656, x2)
+
+inst_595:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x4e9e8ccc, 0x6666666666666667, 0xb504f333, x1, 664, x2)
+
+inst_596:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x66666665, 0x6666666666666667, 0x2, x1, 672, x2)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, 0x11111113, 0x6666666666666667, 0x5555555555555554, x1, 680, x2)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x66666667, 0x6666666666666667, 0x0, x1, 688, x2)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x66666663, 0x6666666666666667, 0x4, x1, 696, x2)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, 0x33333335, 0x6666666666666667, 0x3333333333333332, x1, 704, x2)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, 0x2, 0x6666666666666667, 0x6666666666666665, x1, 712, x2)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x4e9e8ccb, 0x6666666666666667, 0xb504f332, x1, 720, x2)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x11111111, 0x6666666666666667, 0x5555555555555556, x1, 728, x2)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x44444444, 0x6666666666666667, -0x5555555555555555, x1, 736, x2)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, 0x66666661, 0x6666666666666667, 0x6, x1, 744, x2)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, 0x33333333, 0x6666666666666667, 0x3333333333333334, x1, 752, x2)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x6666666666666667, 0x6666666666666667, x1, 760, x2)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x1b6b5999, 0x6666666666666667, -0xb504f332, x1, 768, x2)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, -0x4e9e8ccd, 0x6666666666666667, 0xb504f334, x1, 776, x2)
+
+inst_610:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0ccb, -0xb504f332, 0x3, x1, 784, x2)
+
+inst_611:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0xa5a4887, -0xb504f332, 0x5555555555555555, x1, 792, x2)
+
+inst_612:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x5faf9ddc, -0xb504f332, -0x5555555555555556, x1, 800, x2)
+
+inst_613:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cc9, -0xb504f332, 0x5, x1, 808, x2)
+
+inst_614:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, 0x17c7d99b, -0xb504f332, 0x3333333333333333, x1, 816, x2)
+
+inst_615:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, -0x1b6b5998, -0xb504f332, 0x6666666666666666, x1, 824, x2)
+
+inst_616:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x1, -0xb504f332, -0xb504f333, x1, 832, x2)
+
+inst_617:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, -0x6a09e665, -0xb504f332, 0xb504f333, x1, 840, x2)
+
+inst_618:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0ccc, -0xb504f332, 0x2, x1, 848, x2)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, -0xa5a4886, -0xb504f332, 0x5555555555555554, x1, 856, x2)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cce, -0xb504f332, 0x0, x1, 864, x2)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cca, -0xb504f332, 0x4, x1, 872, x2)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, 0x17c7d99c, -0xb504f332, 0x3333333333333332, x1, 880, x2)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x1b6b5997, -0xb504f332, 0x6666666666666665, x1, 888, x2)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x6a09e664, -0xb504f332, 0xb504f332, x1, 896, x2)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0xa5a4888, -0xb504f332, 0x5555555555555556, x1, 904, x2)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x5faf9ddd, -0xb504f332, -0x5555555555555555, x1, 912, x2)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cc8, -0xb504f332, 0x6, x1, 920, x2)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, 0x17c7d99a, -0xb504f332, 0x3333333333333334, x1, 928, x2)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x1b6b5999, -0xb504f332, 0x6666666666666667, x1, 936, x2)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x0, -0xb504f332, -0xb504f332, x1, 944, x2)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, -0x6a09e666, -0xb504f332, 0xb504f334, x1, 952, x2)
+
+inst_632:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0ccf, 0xb504f334, 0x3, x1, 960, x2)
+
+inst_633:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x5faf9ddf, 0xb504f334, 0x5555555555555555, x1, 968, x2)
+
+inst_634:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0xa5a488a, 0xb504f334, -0x5555555555555556, x1, 976, x2)
+
+inst_635:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cd1, 0xb504f334, 0x5, x1, 984, x2)
+
+inst_636:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_CR_OP( c.subw, x10, x11, -0x7e2e3fff, 0xb504f334, 0x3333333333333333, x1, 992, x2)
+
+inst_637:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_CR_OP( c.subw, x10, x11, 0x4e9e8cce, 0xb504f334, 0x6666666666666666, x1, 1000, x2)
+
+inst_638:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x6a09e667, 0xb504f334, -0xb504f333, x1, 1008, x2)
+
+inst_639:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f333
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0xb504f334, 0xb504f333, x1, 1016, x2)
+
+inst_640:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cce, 0xb504f334, 0x2, x1, 1024, x2)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, 0x5faf9de0, 0xb504f334, 0x5555555555555554, x1, 1032, x2)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0ccc, 0xb504f334, 0x0, x1, 1040, x2)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cd0, 0xb504f334, 0x4, x1, 1048, x2)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, -0x7e2e3ffe, 0xb504f334, 0x3333333333333332, x1, 1056, x2)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, 0x4e9e8ccf, 0xb504f334, 0x6666666666666665, x1, 1064, x2)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x2, 0xb504f334, 0xb504f332, x1, 1072, x2)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, 0x5faf9dde, 0xb504f334, 0x5555555555555556, x1, 1080, x2)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0xa5a4889, 0xb504f334, -0x5555555555555555, x1, 1088, x2)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cd2, 0xb504f334, 0x6, x1, 1096, x2)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, -0x7e2e4000, 0xb504f334, 0x3333333333333334, x1, 1104, x2)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, 0x4e9e8ccd, 0xb504f334, 0x6666666666666667, x1, 1112, x2)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x6a09e666, 0xb504f334, -0xb504f332, x1, 1120, x2)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0xb504f334, 0xb504f334, x1, 1128, x2)
+
+inst_654:
+// rs1_val==0 and rs2_val==2,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x2
+TEST_CR_OP( c.subw, x10, x11, -0x2, 0x0, 0x2, x1, 1136, x2)
+
+inst_655:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555554
+TEST_CR_OP( c.subw, x10, x11, -0x55555554, 0x0, 0x5555555555555554, x1, 1144, x2)
+
+inst_656:
+// rs1_val==0 and rs2_val==0,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x0
+TEST_CR_OP( c.subw, x10, x11, 0x0, 0x0, 0x0, x1, 1152, x2)
+
+inst_657:
+// rs1_val==0 and rs2_val==4,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x4
+TEST_CR_OP( c.subw, x10, x11, -0x4, 0x0, 0x4, x1, 1160, x2)
+
+inst_658:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333332
+TEST_CR_OP( c.subw, x10, x11, -0x33333332, 0x0, 0x3333333333333332, x1, 1168, x2)
+
+inst_659:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666665
+TEST_CR_OP( c.subw, x10, x11, -0x66666665, 0x0, 0x6666666666666665, x1, 1176, x2)
+
+inst_660:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f332
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0cce, 0x0, 0xb504f332, x1, 1184, x2)
+
+inst_661:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555556
+TEST_CR_OP( c.subw, x10, x11, -0x55555556, 0x0, 0x5555555555555556, x1, 1192, x2)
+
+inst_662:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, 0x55555555, 0x0, -0x5555555555555555, x1, 1200, x2)
+
+inst_663:
+// rs1_val==0 and rs2_val==6,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x6
+TEST_CR_OP( c.subw, x10, x11, -0x6, 0x0, 0x6, x1, 1208, x2)
+
+inst_664:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333334
+TEST_CR_OP( c.subw, x10, x11, -0x33333334, 0x0, 0x3333333333333334, x1, 1216, x2)
+
+inst_665:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666667
+TEST_CR_OP( c.subw, x10, x11, -0x66666667, 0x0, 0x6666666666666667, x1, 1224, x2)
+
+inst_666:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f332
+TEST_CR_OP( c.subw, x10, x11, -0x4afb0cce, 0x0, -0xb504f332, x1, 1232, x2)
+
+inst_667:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f334
+TEST_CR_OP( c.subw, x10, x11, 0x4afb0ccc, 0x0, 0xb504f334, x1, 1240, x2)
+
+inst_668:
+// rs1_val==4 and rs2_val==3,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x3
+TEST_CR_OP( c.subw, x10, x11, 0x1, 0x4, 0x3, x1, 1248, x2)
+
+inst_669:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: c.subw; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555555
+TEST_CR_OP( c.subw, x10, x11, -0x55555551, 0x4, 0x5555555555555555, x1, 1256, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_3:
+ .fill 158*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/csw-01.S b/riscof/suite/rv64i_m/C/csw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..ca8cada4fb981a08819defcf98601425305fc88a
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/csw-01.S
@@ -0,0 +1,724 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.sw instruction of the RISC-V C extension for the csw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",csw)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x15, rs2==x13, rs2_val == (-2**(xlen-1)), imm_val == 60, imm_val > 0, rs2_val == -9223372036854775808
+// opcode:c.sw; op1:x15; op2:x13; op2val:-0x8000000000000000; immval:0x3c
+TEST_STORE(x1,x2,0,x15,x13,-0x8000000000000000,0x3c,0,c.sw,0)
+
+inst_1:
+// rs1==x11, rs2==x8, rs2_val == 0, imm_val == 32
+// opcode:c.sw; op1:x11; op2:x8; op2val:0x0; immval:0x20
+TEST_STORE(x1,x2,0,x11,x8,0x0,0x20,8,c.sw,0)
+
+inst_2:
+// rs1==x9, rs2==x10, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807, imm_val == 92
+// opcode:c.sw; op1:x9; op2:x10; op2val:0x7fffffffffffffff; immval:0x5c
+TEST_STORE(x1,x2,0,x9,x10,0x7fffffffffffffff,0x5c,16,c.sw,0)
+
+inst_3:
+// rs1==x14, rs2==x12, rs2_val == 1,
+// opcode:c.sw; op1:x14; op2:x12; op2val:0x1; immval:0x1c
+TEST_STORE(x1,x2,0,x14,x12,0x1,0x1c,24,c.sw,0)
+
+inst_4:
+// rs1==x13, rs2==x15, imm_val == 0, rs2_val == -1099511627777
+// opcode:c.sw; op1:x13; op2:x15; op2val:-0x10000000001; immval:0x0
+TEST_STORE(x1,x2,0,x13,x15,-0x10000000001,0x0,32,c.sw,0)
+
+inst_5:
+// rs1==x12, rs2==x11, rs2_val == 2,
+// opcode:c.sw; op1:x12; op2:x11; op2val:0x2; immval:0xc
+TEST_STORE(x1,x2,0,x12,x11,0x2,0xc,40,c.sw,0)
+
+inst_6:
+// rs1==x10, rs2==x14, rs2_val == 4, imm_val == 108
+// opcode:c.sw; op1:x10; op2:x14; op2val:0x4; immval:0x6c
+TEST_STORE(x1,x2,0,x10,x14,0x4,0x6c,48,c.sw,0)
+
+inst_7:
+// rs1==x8, rs2==x9, rs2_val == 8,
+// opcode:c.sw; op1:x8; op2:x9; op2val:0x8; immval:0x0
+TEST_STORE(x1,x2,0,x8,x9,0x8,0x0,56,c.sw,0)
+
+inst_8:
+// rs2_val == 16,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x10; immval:0xc
+TEST_STORE(x1,x2,0,x10,x11,0x10,0xc,64,c.sw,0)
+
+inst_9:
+// rs2_val == 32, imm_val == 120
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x20; immval:0x78
+TEST_STORE(x1,x2,0,x10,x11,0x20,0x78,72,c.sw,0)
+
+inst_10:
+// rs2_val == 64,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x40; immval:0x4c
+TEST_STORE(x1,x2,0,x10,x11,0x40,0x4c,80,c.sw,0)
+
+inst_11:
+// rs2_val == 128, imm_val == 64
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x80; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,0x80,0x40,88,c.sw,0)
+
+inst_12:
+// rs2_val == 256,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x100; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,0x100,0x40,96,c.sw,0)
+
+inst_13:
+// rs2_val == 512, imm_val == 16
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x200; immval:0x10
+TEST_STORE(x1,x2,0,x10,x11,0x200,0x10,104,c.sw,0)
+
+inst_14:
+// rs2_val == 1024,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x400; immval:0x6c
+TEST_STORE(x1,x2,0,x10,x11,0x400,0x6c,112,c.sw,0)
+
+inst_15:
+// rs2_val == 2048, imm_val == 8
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x800; immval:0x8
+TEST_STORE(x1,x2,0,x10,x11,0x800,0x8,120,c.sw,0)
+
+inst_16:
+// rs2_val == 4096,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x1000; immval:0x20
+TEST_STORE(x1,x2,0,x10,x11,0x1000,0x20,128,c.sw,0)
+
+inst_17:
+// rs2_val == 8192, imm_val == 84
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x2000; immval:0x54
+TEST_STORE(x1,x2,0,x10,x11,0x2000,0x54,136,c.sw,0)
+
+inst_18:
+// rs2_val == 16384,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x4000; immval:0x7c
+TEST_STORE(x1,x2,0,x10,x11,0x4000,0x7c,144,c.sw,0)
+
+inst_19:
+// rs2_val == 32768,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x8000; immval:0x8
+TEST_STORE(x1,x2,0,x10,x11,0x8000,0x8,152,c.sw,0)
+
+inst_20:
+// rs2_val == 65536,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x10000; immval:0x10
+TEST_STORE(x1,x2,0,x10,x11,0x10000,0x10,160,c.sw,0)
+
+inst_21:
+// rs2_val == 131072, imm_val == 4
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x20000; immval:0x4
+TEST_STORE(x1,x2,0,x10,x11,0x20000,0x4,168,c.sw,0)
+
+inst_22:
+// rs2_val == 262144,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x40000; immval:0x30
+TEST_STORE(x1,x2,0,x10,x11,0x40000,0x30,176,c.sw,0)
+
+inst_23:
+// rs2_val == 524288,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x80000; immval:0x3c
+TEST_STORE(x1,x2,0,x10,x11,0x80000,0x3c,184,c.sw,0)
+
+inst_24:
+// rs2_val == 1048576,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x100000; immval:0x1c
+TEST_STORE(x1,x2,0,x10,x11,0x100000,0x1c,192,c.sw,0)
+
+inst_25:
+// rs2_val == 2097152,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x200000; immval:0x34
+TEST_STORE(x1,x2,0,x10,x11,0x200000,0x34,200,c.sw,0)
+
+inst_26:
+// rs2_val == 4194304,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x400000; immval:0x78
+TEST_STORE(x1,x2,0,x10,x11,0x400000,0x78,208,c.sw,0)
+
+inst_27:
+// rs2_val == 8388608,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x800000; immval:0x18
+TEST_STORE(x1,x2,0,x10,x11,0x800000,0x18,216,c.sw,0)
+
+inst_28:
+// rs2_val == 16777216,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x1000000; immval:0x1c
+TEST_STORE(x1,x2,0,x10,x11,0x1000000,0x1c,224,c.sw,0)
+
+inst_29:
+// rs2_val == 33554432,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x2000000; immval:0x3c
+TEST_STORE(x1,x2,0,x10,x11,0x2000000,0x3c,232,c.sw,0)
+
+inst_30:
+// rs2_val == 67108864,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x4000000; immval:0x5c
+TEST_STORE(x1,x2,0,x10,x11,0x4000000,0x5c,240,c.sw,0)
+
+inst_31:
+// rs2_val == 134217728,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x8000000; immval:0x8
+TEST_STORE(x1,x2,0,x10,x11,0x8000000,0x8,248,c.sw,0)
+
+inst_32:
+// rs2_val == 268435456,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x10000000; immval:0x7c
+TEST_STORE(x1,x2,0,x10,x11,0x10000000,0x7c,256,c.sw,0)
+
+inst_33:
+// rs2_val == 536870912,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x20000000; immval:0x24
+TEST_STORE(x1,x2,0,x10,x11,0x20000000,0x24,264,c.sw,0)
+
+inst_34:
+// rs2_val == 1073741824,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x40000000; immval:0x2c
+TEST_STORE(x1,x2,0,x10,x11,0x40000000,0x2c,272,c.sw,0)
+
+inst_35:
+// rs2_val == 2147483648,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x80000000; immval:0x0
+TEST_STORE(x1,x2,0,x10,x11,0x80000000,0x0,280,c.sw,0)
+
+inst_36:
+// rs2_val == 4294967296,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x100000000; immval:0x20
+TEST_STORE(x1,x2,0,x10,x11,0x100000000,0x20,288,c.sw,0)
+
+inst_37:
+// rs2_val == 8589934592, imm_val == 116
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x200000000; immval:0x74
+TEST_STORE(x1,x2,0,x10,x11,0x200000000,0x74,296,c.sw,0)
+
+inst_38:
+// rs2_val == 17179869184,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x400000000; immval:0x18
+TEST_STORE(x1,x2,0,x10,x11,0x400000000,0x18,304,c.sw,0)
+
+inst_39:
+// rs2_val == 34359738368,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x800000000; immval:0x1c
+TEST_STORE(x1,x2,0,x10,x11,0x800000000,0x1c,312,c.sw,0)
+
+inst_40:
+// rs2_val == 68719476736,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x1000000000; immval:0x5c
+TEST_STORE(x1,x2,0,x10,x11,0x1000000000,0x5c,320,c.sw,0)
+
+inst_41:
+// rs2_val == 137438953472,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x2000000000; immval:0x4c
+TEST_STORE(x1,x2,0,x10,x11,0x2000000000,0x4c,328,c.sw,0)
+
+inst_42:
+// rs2_val == 274877906944,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x4000000000; immval:0x74
+TEST_STORE(x1,x2,0,x10,x11,0x4000000000,0x74,336,c.sw,0)
+
+inst_43:
+// rs2_val == 549755813888,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x8000000000; immval:0x4
+TEST_STORE(x1,x2,0,x10,x11,0x8000000000,0x4,344,c.sw,0)
+
+inst_44:
+// rs2_val == 1099511627776,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x10000000000; immval:0x54
+TEST_STORE(x1,x2,0,x10,x11,0x10000000000,0x54,352,c.sw,0)
+
+inst_45:
+// rs2_val == 2199023255552,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x20000000000; immval:0x44
+TEST_STORE(x1,x2,0,x10,x11,0x20000000000,0x44,360,c.sw,0)
+
+inst_46:
+// rs2_val == 4398046511104,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x40000000000; immval:0x34
+TEST_STORE(x1,x2,0,x10,x11,0x40000000000,0x34,368,c.sw,0)
+
+inst_47:
+// rs2_val == 8796093022208,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x80000000000; immval:0x14
+TEST_STORE(x1,x2,0,x10,x11,0x80000000000,0x14,376,c.sw,0)
+
+inst_48:
+// rs2_val == 17592186044416, imm_val == 40
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x100000000000; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,0x100000000000,0x28,384,c.sw,0)
+
+inst_49:
+// rs2_val == 35184372088832,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x200000000000; immval:0x1c
+TEST_STORE(x1,x2,0,x10,x11,0x200000000000,0x1c,392,c.sw,0)
+
+inst_50:
+// rs2_val == 70368744177664,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x400000000000; immval:0x6c
+TEST_STORE(x1,x2,0,x10,x11,0x400000000000,0x6c,400,c.sw,0)
+
+inst_51:
+// rs2_val == 140737488355328,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x800000000000; immval:0x8
+TEST_STORE(x1,x2,0,x10,x11,0x800000000000,0x8,408,c.sw,0)
+
+inst_52:
+// rs2_val == 281474976710656,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x1000000000000; immval:0x10
+TEST_STORE(x1,x2,0,x10,x11,0x1000000000000,0x10,416,c.sw,0)
+
+inst_53:
+// rs2_val == 562949953421312,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x2000000000000; immval:0x4
+TEST_STORE(x1,x2,0,x10,x11,0x2000000000000,0x4,424,c.sw,0)
+
+inst_54:
+// rs2_val == 1125899906842624,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x4000000000000; immval:0x2c
+TEST_STORE(x1,x2,0,x10,x11,0x4000000000000,0x2c,432,c.sw,0)
+
+inst_55:
+// rs2_val == 2251799813685248,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x8000000000000; immval:0x3c
+TEST_STORE(x1,x2,0,x10,x11,0x8000000000000,0x3c,440,c.sw,0)
+
+inst_56:
+// rs2_val == 4503599627370496,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x10000000000000; immval:0x44
+TEST_STORE(x1,x2,0,x10,x11,0x10000000000000,0x44,448,c.sw,0)
+
+inst_57:
+// rs2_val == 9007199254740992,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x20000000000000; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,0x20000000000000,0x40,456,c.sw,0)
+
+inst_58:
+// rs2_val == 18014398509481984,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x40000000000000; immval:0x54
+TEST_STORE(x1,x2,0,x10,x11,0x40000000000000,0x54,464,c.sw,0)
+
+inst_59:
+// rs2_val == 36028797018963968,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x80000000000000; immval:0x24
+TEST_STORE(x1,x2,0,x10,x11,0x80000000000000,0x24,472,c.sw,0)
+
+inst_60:
+// rs2_val == 72057594037927936,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x100000000000000; immval:0x6c
+TEST_STORE(x1,x2,0,x10,x11,0x100000000000000,0x6c,480,c.sw,0)
+
+inst_61:
+// rs2_val == 144115188075855872,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x200000000000000; immval:0x14
+TEST_STORE(x1,x2,0,x10,x11,0x200000000000000,0x14,488,c.sw,0)
+
+inst_62:
+// rs2_val == 288230376151711744,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x400000000000000; immval:0x18
+TEST_STORE(x1,x2,0,x10,x11,0x400000000000000,0x18,496,c.sw,0)
+
+inst_63:
+// rs2_val == 576460752303423488,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x800000000000000; immval:0x48
+TEST_STORE(x1,x2,0,x10,x11,0x800000000000000,0x48,504,c.sw,0)
+
+inst_64:
+// rs2_val == 1152921504606846976,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x1000000000000000; immval:0x10
+TEST_STORE(x1,x2,0,x10,x11,0x1000000000000000,0x10,512,c.sw,0)
+
+inst_65:
+// rs2_val == 2305843009213693952,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x2000000000000000; immval:0x54
+TEST_STORE(x1,x2,0,x10,x11,0x2000000000000000,0x54,520,c.sw,0)
+
+inst_66:
+// rs2_val == 4611686018427387904,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x4000000000000000; immval:0x44
+TEST_STORE(x1,x2,0,x10,x11,0x4000000000000000,0x44,528,c.sw,0)
+
+inst_67:
+// rs2_val == -2,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x2; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,-0x2,0x28,536,c.sw,0)
+
+inst_68:
+// rs2_val == -576460752303423489,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x800000000000001; immval:0x78
+TEST_STORE(x1,x2,0,x10,x11,-0x800000000000001,0x78,544,c.sw,0)
+
+inst_69:
+// rs2_val == -1152921504606846977,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x1000000000000001; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,-0x1000000000000001,0x40,552,c.sw,0)
+
+inst_70:
+// rs2_val == -2305843009213693953,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x2000000000000001; immval:0xc
+TEST_STORE(x1,x2,0,x10,x11,-0x2000000000000001,0xc,560,c.sw,0)
+
+inst_71:
+// rs2_val == -4611686018427387905,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x4000000000000001; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,-0x4000000000000001,0x28,568,c.sw,0)
+
+inst_72:
+// rs2_val == 6148914691236517205,
+// opcode:c.sw; op1:x10; op2:x11; op2val:0x5555555555555555; immval:0x14
+TEST_STORE(x1,x2,0,x10,x11,0x5555555555555555,0x14,576,c.sw,0)
+
+inst_73:
+// rs2_val == -6148914691236517206,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x5555555555555556; immval:0x30
+TEST_STORE(x1,x2,0,x10,x11,-0x5555555555555556,0x30,584,c.sw,0)
+
+inst_74:
+// rs2_val == -3,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x3; immval:0x4c
+TEST_STORE(x1,x2,0,x10,x11,-0x3,0x4c,592,c.sw,0)
+
+inst_75:
+// rs2_val == -5,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x5; immval:0x24
+TEST_STORE(x1,x2,0,x10,x11,-0x5,0x24,600,c.sw,0)
+
+inst_76:
+// rs2_val == -9,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x9; immval:0x1c
+TEST_STORE(x1,x2,0,x10,x11,-0x9,0x1c,608,c.sw,0)
+
+inst_77:
+// rs2_val == -17,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x11; immval:0x30
+TEST_STORE(x1,x2,0,x10,x11,-0x11,0x30,616,c.sw,0)
+
+inst_78:
+// rs2_val == -33,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x21; immval:0x14
+TEST_STORE(x1,x2,0,x10,x11,-0x21,0x14,624,c.sw,0)
+
+inst_79:
+// rs2_val == -65,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x41; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,-0x41,0x28,632,c.sw,0)
+
+inst_80:
+// rs2_val == -129,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x81; immval:0x48
+TEST_STORE(x1,x2,0,x10,x11,-0x81,0x48,640,c.sw,0)
+
+inst_81:
+// rs2_val == -257,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x101; immval:0x34
+TEST_STORE(x1,x2,0,x10,x11,-0x101,0x34,648,c.sw,0)
+
+inst_82:
+// rs2_val == -513,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x201; immval:0x1c
+TEST_STORE(x1,x2,0,x10,x11,-0x201,0x1c,656,c.sw,0)
+
+inst_83:
+// rs2_val == -1025,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x401; immval:0x78
+TEST_STORE(x1,x2,0,x10,x11,-0x401,0x78,664,c.sw,0)
+
+inst_84:
+// rs2_val == -2049,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x801; immval:0x54
+TEST_STORE(x1,x2,0,x10,x11,-0x801,0x54,672,c.sw,0)
+
+inst_85:
+// rs2_val == -4097,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x1001; immval:0x24
+TEST_STORE(x1,x2,0,x10,x11,-0x1001,0x24,680,c.sw,0)
+
+inst_86:
+// rs2_val == -8193,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x2001; immval:0x4c
+TEST_STORE(x1,x2,0,x10,x11,-0x2001,0x4c,688,c.sw,0)
+
+inst_87:
+// rs2_val == -16385,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x4001; immval:0x34
+TEST_STORE(x1,x2,0,x10,x11,-0x4001,0x34,696,c.sw,0)
+
+inst_88:
+// rs2_val == -32769,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x8001; immval:0x6c
+TEST_STORE(x1,x2,0,x10,x11,-0x8001,0x6c,704,c.sw,0)
+
+inst_89:
+// rs2_val == -65537,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x10001; immval:0x4c
+TEST_STORE(x1,x2,0,x10,x11,-0x10001,0x4c,712,c.sw,0)
+
+inst_90:
+// rs2_val == -131073,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x20001; immval:0xc
+TEST_STORE(x1,x2,0,x10,x11,-0x20001,0xc,720,c.sw,0)
+
+inst_91:
+// rs2_val == -262145,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x40001; immval:0x24
+TEST_STORE(x1,x2,0,x10,x11,-0x40001,0x24,728,c.sw,0)
+
+inst_92:
+// rs2_val == -524289,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x80001; immval:0xc
+TEST_STORE(x1,x2,0,x10,x11,-0x80001,0xc,736,c.sw,0)
+
+inst_93:
+// rs2_val == -1048577,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x100001; immval:0x3c
+TEST_STORE(x1,x2,0,x10,x11,-0x100001,0x3c,744,c.sw,0)
+
+inst_94:
+// rs2_val == -2097153,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x200001; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,-0x200001,0x40,752,c.sw,0)
+
+inst_95:
+// rs2_val == -4194305,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x400001; immval:0x20
+TEST_STORE(x1,x2,0,x10,x11,-0x400001,0x20,760,c.sw,0)
+
+inst_96:
+// rs2_val == -8388609,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x800001; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,-0x800001,0x28,768,c.sw,0)
+
+inst_97:
+// rs2_val == -16777217,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x1000001; immval:0x4c
+TEST_STORE(x1,x2,0,x10,x11,-0x1000001,0x4c,776,c.sw,0)
+
+inst_98:
+// rs2_val == -33554433,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x2000001; immval:0x4
+TEST_STORE(x1,x2,0,x10,x11,-0x2000001,0x4,784,c.sw,0)
+
+inst_99:
+// rs2_val == -67108865,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x4000001; immval:0x18
+TEST_STORE(x1,x2,0,x10,x11,-0x4000001,0x18,792,c.sw,0)
+
+inst_100:
+// rs2_val == -134217729,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x8000001; immval:0x48
+TEST_STORE(x1,x2,0,x10,x11,-0x8000001,0x48,800,c.sw,0)
+
+inst_101:
+// rs2_val == -268435457,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x10000001; immval:0x3c
+TEST_STORE(x1,x2,0,x10,x11,-0x10000001,0x3c,808,c.sw,0)
+
+inst_102:
+// rs2_val == -536870913,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x20000001; immval:0x48
+TEST_STORE(x1,x2,0,x10,x11,-0x20000001,0x48,816,c.sw,0)
+
+inst_103:
+// rs2_val == -1073741825,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x40000001; immval:0x74
+TEST_STORE(x1,x2,0,x10,x11,-0x40000001,0x74,824,c.sw,0)
+
+inst_104:
+// rs2_val == -2147483649,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x80000001; immval:0x30
+TEST_STORE(x1,x2,0,x10,x11,-0x80000001,0x30,832,c.sw,0)
+
+inst_105:
+// rs2_val == -4294967297,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x100000001; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,-0x100000001,0x28,840,c.sw,0)
+
+inst_106:
+// rs2_val == -8589934593,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x200000001; immval:0x8
+TEST_STORE(x1,x2,0,x10,x11,-0x200000001,0x8,848,c.sw,0)
+
+inst_107:
+// rs2_val == -17179869185,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x400000001; immval:0xc
+TEST_STORE(x1,x2,0,x10,x11,-0x400000001,0xc,856,c.sw,0)
+
+inst_108:
+// rs2_val == -34359738369,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x800000001; immval:0x3c
+TEST_STORE(x1,x2,0,x10,x11,-0x800000001,0x3c,864,c.sw,0)
+
+inst_109:
+// rs2_val == -68719476737,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x1000000001; immval:0x6c
+TEST_STORE(x1,x2,0,x10,x11,-0x1000000001,0x6c,872,c.sw,0)
+
+inst_110:
+// rs2_val == -137438953473,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x2000000001; immval:0x28
+TEST_STORE(x1,x2,0,x10,x11,-0x2000000001,0x28,880,c.sw,0)
+
+inst_111:
+// rs2_val == -274877906945,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x4000000001; immval:0x34
+TEST_STORE(x1,x2,0,x10,x11,-0x4000000001,0x34,888,c.sw,0)
+
+inst_112:
+// rs2_val == -549755813889,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x8000000001; immval:0x10
+TEST_STORE(x1,x2,0,x10,x11,-0x8000000001,0x10,896,c.sw,0)
+
+inst_113:
+// rs2_val == -2199023255553,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x20000000001; immval:0x8
+TEST_STORE(x1,x2,0,x10,x11,-0x20000000001,0x8,904,c.sw,0)
+
+inst_114:
+// rs2_val == -4398046511105,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x40000000001; immval:0x34
+TEST_STORE(x1,x2,0,x10,x11,-0x40000000001,0x34,912,c.sw,0)
+
+inst_115:
+// rs2_val == -8796093022209,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x80000000001; immval:0x34
+TEST_STORE(x1,x2,0,x10,x11,-0x80000000001,0x34,920,c.sw,0)
+
+inst_116:
+// rs2_val == -17592186044417,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x100000000001; immval:0x3c
+TEST_STORE(x1,x2,0,x10,x11,-0x100000000001,0x3c,928,c.sw,0)
+
+inst_117:
+// rs2_val == -35184372088833,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x200000000001; immval:0x78
+TEST_STORE(x1,x2,0,x10,x11,-0x200000000001,0x78,936,c.sw,0)
+
+inst_118:
+// rs2_val == -70368744177665,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x400000000001; immval:0x18
+TEST_STORE(x1,x2,0,x10,x11,-0x400000000001,0x18,944,c.sw,0)
+
+inst_119:
+// rs2_val == -140737488355329,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x800000000001; immval:0x0
+TEST_STORE(x1,x2,0,x10,x11,-0x800000000001,0x0,952,c.sw,0)
+
+inst_120:
+// rs2_val == -281474976710657,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x1000000000001; immval:0x4c
+TEST_STORE(x1,x2,0,x10,x11,-0x1000000000001,0x4c,960,c.sw,0)
+
+inst_121:
+// rs2_val == -562949953421313,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x2000000000001; immval:0x48
+TEST_STORE(x1,x2,0,x10,x11,-0x2000000000001,0x48,968,c.sw,0)
+
+inst_122:
+// rs2_val == -1125899906842625,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x4000000000001; immval:0x38
+TEST_STORE(x1,x2,0,x10,x11,-0x4000000000001,0x38,976,c.sw,0)
+
+inst_123:
+// rs2_val == -2251799813685249,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x8000000000001; immval:0x40
+TEST_STORE(x1,x2,0,x10,x11,-0x8000000000001,0x40,984,c.sw,0)
+
+inst_124:
+// rs2_val == -4503599627370497,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x10000000000001; immval:0x48
+TEST_STORE(x1,x2,0,x10,x11,-0x10000000000001,0x48,992,c.sw,0)
+
+inst_125:
+// rs2_val == -9007199254740993,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x20000000000001; immval:0x4c
+TEST_STORE(x1,x2,0,x10,x11,-0x20000000000001,0x4c,1000,c.sw,0)
+
+inst_126:
+// rs2_val == -18014398509481985,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x40000000000001; immval:0x74
+TEST_STORE(x1,x2,0,x10,x11,-0x40000000000001,0x74,1008,c.sw,0)
+
+inst_127:
+// rs2_val == -36028797018963969,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x80000000000001; immval:0x54
+TEST_STORE(x1,x2,0,x10,x11,-0x80000000000001,0x54,1016,c.sw,0)
+
+inst_128:
+// rs2_val == -72057594037927937,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x100000000000001; immval:0x20
+TEST_STORE(x1,x2,0,x10,x11,-0x100000000000001,0x20,1024,c.sw,0)
+
+inst_129:
+// rs2_val == -144115188075855873,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x200000000000001; immval:0x30
+TEST_STORE(x1,x2,0,x10,x11,-0x200000000000001,0x30,1032,c.sw,0)
+
+inst_130:
+// rs2_val == -288230376151711745,
+// opcode:c.sw; op1:x10; op2:x11; op2val:-0x400000000000001; immval:0x4
+TEST_STORE(x1,x2,0,x10,x11,-0x400000000000001,0x4,1040,c.sw,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 131*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cswsp-01.S b/riscof/suite/rv64i_m/C/cswsp-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..9afa0ecb94730a885bbecce0a3aa0f4a998d0f81
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cswsp-01.S
@@ -0,0 +1,739 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.swsp instruction of the RISC-V C extension for the cswsp covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cswsp)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs2==x15, rs2_val == (-2**(xlen-1)), imm_val > 0, rs2_val == -9223372036854775808
+// opcode:c.swsp; op1:x2; op2:x15; op2val:-0x8000000000000000; immval:0xfc
+TEST_STORE(x1,x12,0,x2,x15,-0x8000000000000000,0xfc,0,c.swsp,0)
+
+inst_1:
+// rs2==x19, rs2_val == 0,
+// opcode:c.swsp; op1:x2; op2:x19; op2val:0x0; immval:0x28
+TEST_STORE(x1,x12,0,x2,x19,0x0,0x28,8,c.swsp,0)
+
+inst_2:
+// rs2==x3, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807
+// opcode:c.swsp; op1:x2; op2:x3; op2val:0x7fffffffffffffff; immval:0x3c
+TEST_STORE(x1,x12,0,x2,x3,0x7fffffffffffffff,0x3c,16,c.swsp,0)
+
+inst_3:
+// rs2==x5, rs2_val == 1, imm_val == 84
+// opcode:c.swsp; op1:x2; op2:x5; op2val:0x1; immval:0x54
+TEST_STORE(x1,x12,0,x2,x5,0x1,0x54,24,c.swsp,0)
+
+inst_4:
+// rs2==x10, imm_val == 0,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x9; immval:0x0
+TEST_STORE(x1,x12,0,x2,x10,0x9,0x0,32,c.swsp,0)
+
+inst_5:
+// rs2==x13, rs2_val == 2, imm_val == 32
+// opcode:c.swsp; op1:x2; op2:x13; op2val:0x2; immval:0x20
+TEST_STORE(x1,x12,0,x2,x13,0x2,0x20,40,c.swsp,0)
+
+inst_6:
+// rs2==x22, rs2_val == 4,
+// opcode:c.swsp; op1:x2; op2:x22; op2val:0x4; immval:0x34
+TEST_STORE(x1,x12,0,x2,x22,0x4,0x34,48,c.swsp,0)
+
+inst_7:
+// rs2==x4, rs2_val == 8,
+// opcode:c.swsp; op1:x2; op2:x4; op2val:0x8; immval:0x48
+TEST_STORE(x1,x12,0,x2,x4,0x8,0x48,56,c.swsp,0)
+
+inst_8:
+// rs2==x9, rs2_val == 16, imm_val == 220
+// opcode:c.swsp; op1:x2; op2:x9; op2val:0x10; immval:0xdc
+TEST_STORE(x1,x12,0,x2,x9,0x10,0xdc,64,c.swsp,0)
+
+inst_9:
+// rs2==x26, rs2_val == 32, imm_val == 4
+// opcode:c.swsp; op1:x2; op2:x26; op2val:0x20; immval:0x4
+TEST_STORE(x1,x12,0,x2,x26,0x20,0x4,72,c.swsp,0)
+
+inst_10:
+// rs2==x30, rs2_val == 64, imm_val == 16
+// opcode:c.swsp; op1:x2; op2:x30; op2val:0x40; immval:0x10
+TEST_STORE(x1,x12,0,x2,x30,0x40,0x10,80,c.swsp,0)
+
+inst_11:
+// rs2==x29, rs2_val == 128,
+// opcode:c.swsp; op1:x2; op2:x29; op2val:0x80; immval:0x30
+TEST_STORE(x1,x12,0,x2,x29,0x80,0x30,88,c.swsp,0)
+
+inst_12:
+// rs2==x31, rs2_val == 256,
+// opcode:c.swsp; op1:x2; op2:x31; op2val:0x100; immval:0x18
+TEST_STORE(x1,x12,0,x2,x31,0x100,0x18,96,c.swsp,0)
+
+inst_13:
+// rs2==x23, rs2_val == 512, imm_val == 124
+// opcode:c.swsp; op1:x2; op2:x23; op2val:0x200; immval:0x7c
+TEST_STORE(x1,x12,0,x2,x23,0x200,0x7c,104,c.swsp,0)
+
+inst_14:
+// rs2==x14, rs2_val == 1024,
+// opcode:c.swsp; op1:x2; op2:x14; op2val:0x400; immval:0x3c
+TEST_STORE(x1,x12,0,x2,x14,0x400,0x3c,112,c.swsp,0)
+
+inst_15:
+// rs2==x28, rs2_val == 2048,
+// opcode:c.swsp; op1:x2; op2:x28; op2val:0x800; immval:0x10
+TEST_STORE(x1,x12,0,x2,x28,0x800,0x10,120,c.swsp,0)
+
+inst_16:
+// rs2==x8, rs2_val == 4096,
+// opcode:c.swsp; op1:x2; op2:x8; op2val:0x1000; immval:0x14
+TEST_STORE(x1,x12,0,x2,x8,0x1000,0x14,128,c.swsp,0)
+
+inst_17:
+// rs2==x21, rs2_val == 8192,
+// opcode:c.swsp; op1:x2; op2:x21; op2val:0x2000; immval:0x2c
+TEST_STORE(x1,x12,0,x2,x21,0x2000,0x2c,136,c.swsp,0)
+
+inst_18:
+// rs2==x6, rs2_val == 16384, imm_val == 64
+// opcode:c.swsp; op1:x2; op2:x6; op2val:0x4000; immval:0x40
+TEST_STORE(x1,x12,0,x2,x6,0x4000,0x40,144,c.swsp,0)
+
+inst_19:
+// rs2==x11, rs2_val == 32768,
+// opcode:c.swsp; op1:x2; op2:x11; op2val:0x8000; immval:0xfc
+TEST_STORE(x1,x12,0,x2,x11,0x8000,0xfc,152,c.swsp,0)
+
+inst_20:
+// rs2==x25, rs2_val == 65536, imm_val == 168
+// opcode:c.swsp; op1:x2; op2:x25; op2val:0x10000; immval:0xa8
+TEST_STORE(x1,x12,0,x2,x25,0x10000,0xa8,160,c.swsp,0)
+
+inst_21:
+// rs2==x20, rs2_val == 131072,
+// opcode:c.swsp; op1:x2; op2:x20; op2val:0x20000; immval:0xdc
+TEST_STORE(x1,x12,0,x2,x20,0x20000,0xdc,168,c.swsp,0)
+
+inst_22:
+// rs2==x24, rs2_val == 262144,
+// opcode:c.swsp; op1:x2; op2:x24; op2val:0x40000; immval:0xdc
+TEST_STORE(x1,x12,0,x2,x24,0x40000,0xdc,176,c.swsp,0)
+
+inst_23:
+// rs2==x16, rs2_val == 524288,
+// opcode:c.swsp; op1:x2; op2:x16; op2val:0x80000; immval:0x4
+TEST_STORE(x1,x12,0,x2,x16,0x80000,0x4,184,c.swsp,0)
+
+inst_24:
+// rs2==x7, rs2_val == 1048576, imm_val == 188
+// opcode:c.swsp; op1:x2; op2:x7; op2val:0x100000; immval:0xbc
+TEST_STORE(x1,x12,0,x2,x7,0x100000,0xbc,192,c.swsp,0)
+
+inst_25:
+// rs2==x27, rs2_val == 2097152,
+// opcode:c.swsp; op1:x2; op2:x27; op2val:0x200000; immval:0x1c
+TEST_STORE(x1,x12,0,x2,x27,0x200000,0x1c,200,c.swsp,0)
+
+inst_26:
+// rs2==x18, rs2_val == 4194304, imm_val == 8
+// opcode:c.swsp; op1:x2; op2:x18; op2val:0x400000; immval:0x8
+TEST_STORE(x1,x4,0,x2,x18,0x400000,0x8,208,c.swsp,0)
+RVTEST_SIGBASE( x3,signature_x3_0)
+
+inst_27:
+// rs2==x1, rs2_val == 8388608,
+// opcode:c.swsp; op1:x2; op2:x1; op2val:0x800000; immval:0x18
+TEST_STORE(x3,x4,0,x2,x1,0x800000,0x18,0,c.swsp,0)
+
+inst_28:
+// rs2==x17, rs2_val == 16777216, imm_val == 236
+// opcode:c.swsp; op1:x2; op2:x17; op2val:0x1000000; immval:0xec
+TEST_STORE(x3,x4,0,x2,x17,0x1000000,0xec,8,c.swsp,0)
+
+inst_29:
+// rs2==x12, rs2_val == 33554432,
+// opcode:c.swsp; op1:x2; op2:x12; op2val:0x2000000; immval:0x0
+TEST_STORE(x3,x4,0,x2,x12,0x2000000,0x0,16,c.swsp,0)
+
+inst_30:
+// rs2_val == 67108864,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x4000000; immval:0x28
+TEST_STORE(x3,x4,0,x2,x10,0x4000000,0x28,24,c.swsp,0)
+
+inst_31:
+// rs2_val == 134217728,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x8000000; immval:0x7c
+TEST_STORE(x3,x4,0,x2,x10,0x8000000,0x7c,32,c.swsp,0)
+
+inst_32:
+// rs2_val == 268435456,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x10000000; immval:0x48
+TEST_STORE(x3,x4,0,x2,x10,0x10000000,0x48,40,c.swsp,0)
+
+inst_33:
+// rs2_val == 536870912,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x20000000; immval:0xc
+TEST_STORE(x3,x4,0,x2,x10,0x20000000,0xc,48,c.swsp,0)
+
+inst_34:
+// rs2_val == 1073741824,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x40000000; immval:0x54
+TEST_STORE(x3,x4,0,x2,x10,0x40000000,0x54,56,c.swsp,0)
+
+inst_35:
+// rs2_val == 2147483648,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x80000000; immval:0x34
+TEST_STORE(x3,x4,0,x2,x10,0x80000000,0x34,64,c.swsp,0)
+
+inst_36:
+// rs2_val == 4294967296,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x100000000; immval:0x14
+TEST_STORE(x3,x4,0,x2,x10,0x100000000,0x14,72,c.swsp,0)
+
+inst_37:
+// rs2_val == 8589934592,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x200000000; immval:0x38
+TEST_STORE(x3,x4,0,x2,x10,0x200000000,0x38,80,c.swsp,0)
+
+inst_38:
+// rs2_val == 17179869184,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x400000000; immval:0x3c
+TEST_STORE(x3,x4,0,x2,x10,0x400000000,0x3c,88,c.swsp,0)
+
+inst_39:
+// rs2_val == 34359738368, imm_val == 128
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x800000000; immval:0x80
+TEST_STORE(x3,x4,0,x2,x10,0x800000000,0x80,96,c.swsp,0)
+
+inst_40:
+// rs2_val == 68719476736,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x1000000000; immval:0x18
+TEST_STORE(x3,x4,0,x2,x10,0x1000000000,0x18,104,c.swsp,0)
+
+inst_41:
+// rs2_val == 137438953472,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x2000000000; immval:0x4c
+TEST_STORE(x3,x4,0,x2,x10,0x2000000000,0x4c,112,c.swsp,0)
+
+inst_42:
+// rs2_val == 274877906944,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x4000000000; immval:0x28
+TEST_STORE(x3,x4,0,x2,x10,0x4000000000,0x28,120,c.swsp,0)
+
+inst_43:
+// rs2_val == 549755813888,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x8000000000; immval:0x3c
+TEST_STORE(x3,x4,0,x2,x10,0x8000000000,0x3c,128,c.swsp,0)
+
+inst_44:
+// rs2_val == 1099511627776,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x10000000000; immval:0x4
+TEST_STORE(x3,x4,0,x2,x10,0x10000000000,0x4,136,c.swsp,0)
+
+inst_45:
+// rs2_val == 2199023255552,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x20000000000; immval:0x44
+TEST_STORE(x3,x4,0,x2,x10,0x20000000000,0x44,144,c.swsp,0)
+
+inst_46:
+// rs2_val == 4398046511104,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x40000000000; immval:0xbc
+TEST_STORE(x3,x4,0,x2,x10,0x40000000000,0xbc,152,c.swsp,0)
+
+inst_47:
+// rs2_val == 8796093022208,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x80000000000; immval:0x44
+TEST_STORE(x3,x4,0,x2,x10,0x80000000000,0x44,160,c.swsp,0)
+
+inst_48:
+// rs2_val == 17592186044416,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x100000000000; immval:0x44
+TEST_STORE(x3,x4,0,x2,x10,0x100000000000,0x44,168,c.swsp,0)
+
+inst_49:
+// rs2_val == 35184372088832,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x200000000000; immval:0xdc
+TEST_STORE(x3,x4,0,x2,x10,0x200000000000,0xdc,176,c.swsp,0)
+
+inst_50:
+// rs2_val == 70368744177664,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x400000000000; immval:0x28
+TEST_STORE(x3,x4,0,x2,x10,0x400000000000,0x28,184,c.swsp,0)
+
+inst_51:
+// rs2_val == 140737488355328,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x800000000000; immval:0x4
+TEST_STORE(x3,x4,0,x2,x10,0x800000000000,0x4,192,c.swsp,0)
+
+inst_52:
+// rs2_val == 281474976710656,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x1000000000000; immval:0x4
+TEST_STORE(x3,x4,0,x2,x10,0x1000000000000,0x4,200,c.swsp,0)
+
+inst_53:
+// rs2_val == 562949953421312,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x2000000000000; immval:0x30
+TEST_STORE(x3,x4,0,x2,x10,0x2000000000000,0x30,208,c.swsp,0)
+
+inst_54:
+// rs2_val == 1125899906842624,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x4000000000000; immval:0x24
+TEST_STORE(x3,x4,0,x2,x10,0x4000000000000,0x24,216,c.swsp,0)
+
+inst_55:
+// rs2_val == 2251799813685248,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x8000000000000; immval:0x18
+TEST_STORE(x3,x4,0,x2,x10,0x8000000000000,0x18,224,c.swsp,0)
+
+inst_56:
+// rs2_val == 4503599627370496,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x10000000000000; immval:0xec
+TEST_STORE(x3,x4,0,x2,x10,0x10000000000000,0xec,232,c.swsp,0)
+
+inst_57:
+// rs2_val == 9007199254740992,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x20000000000000; immval:0x2c
+TEST_STORE(x3,x4,0,x2,x10,0x20000000000000,0x2c,240,c.swsp,0)
+
+inst_58:
+// rs2_val == 18014398509481984,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x40000000000000; immval:0x24
+TEST_STORE(x3,x4,0,x2,x10,0x40000000000000,0x24,248,c.swsp,0)
+
+inst_59:
+// rs2_val == 36028797018963968,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x80000000000000; immval:0x0
+TEST_STORE(x3,x4,0,x2,x10,0x80000000000000,0x0,256,c.swsp,0)
+
+inst_60:
+// rs2_val == 72057594037927936,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x100000000000000; immval:0x8
+TEST_STORE(x3,x4,0,x2,x10,0x100000000000000,0x8,264,c.swsp,0)
+
+inst_61:
+// rs2_val == 144115188075855872,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x200000000000000; immval:0x34
+TEST_STORE(x3,x4,0,x2,x10,0x200000000000000,0x34,272,c.swsp,0)
+
+inst_62:
+// rs2_val == 288230376151711744,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x400000000000000; immval:0x30
+TEST_STORE(x3,x4,0,x2,x10,0x400000000000000,0x30,280,c.swsp,0)
+
+inst_63:
+// rs2_val == 576460752303423488,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x800000000000000; immval:0x80
+TEST_STORE(x3,x4,0,x2,x10,0x800000000000000,0x80,288,c.swsp,0)
+
+inst_64:
+// rs2_val == 1152921504606846976,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x1000000000000000; immval:0xc
+TEST_STORE(x3,x4,0,x2,x10,0x1000000000000000,0xc,296,c.swsp,0)
+
+inst_65:
+// rs2_val == 2305843009213693952,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x2000000000000000; immval:0x30
+TEST_STORE(x3,x4,0,x2,x10,0x2000000000000000,0x30,304,c.swsp,0)
+
+inst_66:
+// rs2_val == 4611686018427387904,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x4000000000000000; immval:0x8
+TEST_STORE(x3,x4,0,x2,x10,0x4000000000000000,0x8,312,c.swsp,0)
+
+inst_67:
+// rs2_val == -2,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x2; immval:0xc
+TEST_STORE(x3,x4,0,x2,x10,-0x2,0xc,320,c.swsp,0)
+
+inst_68:
+// rs2_val == -3,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x3; immval:0x14
+TEST_STORE(x3,x4,0,x2,x10,-0x3,0x14,328,c.swsp,0)
+
+inst_69:
+// rs2_val == -5,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x5; immval:0x14
+TEST_STORE(x3,x4,0,x2,x10,-0x5,0x14,336,c.swsp,0)
+
+inst_70:
+// rs2_val == -9,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x9; immval:0x8
+TEST_STORE(x3,x4,0,x2,x10,-0x9,0x8,344,c.swsp,0)
+
+inst_71:
+// rs2_val == -576460752303423489, imm_val == 248
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x800000000000001; immval:0xf8
+TEST_STORE(x3,x4,0,x2,x10,-0x800000000000001,0xf8,352,c.swsp,0)
+
+inst_72:
+// rs2_val == -1152921504606846977,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x1000000000000001; immval:0x7c
+TEST_STORE(x3,x4,0,x2,x10,-0x1000000000000001,0x7c,360,c.swsp,0)
+
+inst_73:
+// rs2_val == -2305843009213693953,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x2000000000000001; immval:0x80
+TEST_STORE(x3,x4,0,x2,x10,-0x2000000000000001,0x80,368,c.swsp,0)
+
+inst_74:
+// rs2_val == -4611686018427387905,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x4000000000000001; immval:0x40
+TEST_STORE(x3,x4,0,x2,x10,-0x4000000000000001,0x40,376,c.swsp,0)
+
+inst_75:
+// rs2_val == 6148914691236517205,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x5555555555555555; immval:0x28
+TEST_STORE(x3,x4,0,x2,x10,0x5555555555555555,0x28,384,c.swsp,0)
+
+inst_76:
+// rs2_val == -6148914691236517206,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x5555555555555556; immval:0xf8
+TEST_STORE(x3,x4,0,x2,x10,-0x5555555555555556,0xf8,392,c.swsp,0)
+
+inst_77:
+// imm_val == 244,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:0x10; immval:0xf4
+TEST_STORE(x3,x4,0,x2,x10,0x10,0xf4,400,c.swsp,0)
+
+inst_78:
+// rs2_val == -17,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x11; immval:0x30
+TEST_STORE(x3,x4,0,x2,x10,-0x11,0x30,408,c.swsp,0)
+
+inst_79:
+// rs2_val == -33,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x21; immval:0x10
+TEST_STORE(x3,x4,0,x2,x10,-0x21,0x10,416,c.swsp,0)
+
+inst_80:
+// rs2_val == -65,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x41; immval:0x54
+TEST_STORE(x3,x4,0,x2,x10,-0x41,0x54,424,c.swsp,0)
+
+inst_81:
+// rs2_val == -129,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x81; immval:0x4c
+TEST_STORE(x3,x4,0,x2,x10,-0x81,0x4c,432,c.swsp,0)
+
+inst_82:
+// rs2_val == -257,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x101; immval:0x44
+TEST_STORE(x3,x4,0,x2,x10,-0x101,0x44,440,c.swsp,0)
+
+inst_83:
+// rs2_val == -513,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x201; immval:0x1c
+TEST_STORE(x3,x4,0,x2,x10,-0x201,0x1c,448,c.swsp,0)
+
+inst_84:
+// rs2_val == -1025,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x401; immval:0x0
+TEST_STORE(x3,x4,0,x2,x10,-0x401,0x0,456,c.swsp,0)
+
+inst_85:
+// rs2_val == -2049,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x801; immval:0xc
+TEST_STORE(x3,x4,0,x2,x10,-0x801,0xc,464,c.swsp,0)
+
+inst_86:
+// rs2_val == -4097,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x1001; immval:0x4c
+TEST_STORE(x3,x4,0,x2,x10,-0x1001,0x4c,472,c.swsp,0)
+
+inst_87:
+// rs2_val == -8193,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x2001; immval:0x34
+TEST_STORE(x3,x4,0,x2,x10,-0x2001,0x34,480,c.swsp,0)
+
+inst_88:
+// rs2_val == -16385,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x4001; immval:0x4c
+TEST_STORE(x3,x4,0,x2,x10,-0x4001,0x4c,488,c.swsp,0)
+
+inst_89:
+// rs2_val == -32769,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x8001; immval:0x48
+TEST_STORE(x3,x4,0,x2,x10,-0x8001,0x48,496,c.swsp,0)
+
+inst_90:
+// rs2_val == -65537,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x10001; immval:0xec
+TEST_STORE(x3,x4,0,x2,x10,-0x10001,0xec,504,c.swsp,0)
+
+inst_91:
+// rs2_val == -131073,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x20001; immval:0x54
+TEST_STORE(x3,x4,0,x2,x10,-0x20001,0x54,512,c.swsp,0)
+
+inst_92:
+// rs2_val == -262145,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x40001; immval:0x34
+TEST_STORE(x3,x4,0,x2,x10,-0x40001,0x34,520,c.swsp,0)
+
+inst_93:
+// rs2_val == -524289,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x80001; immval:0x30
+TEST_STORE(x3,x4,0,x2,x10,-0x80001,0x30,528,c.swsp,0)
+
+inst_94:
+// rs2_val == -1048577,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x100001; immval:0xf8
+TEST_STORE(x3,x4,0,x2,x10,-0x100001,0xf8,536,c.swsp,0)
+
+inst_95:
+// rs2_val == -2097153,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x200001; immval:0x38
+TEST_STORE(x3,x4,0,x2,x10,-0x200001,0x38,544,c.swsp,0)
+
+inst_96:
+// rs2_val == -4194305,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x400001; immval:0xfc
+TEST_STORE(x3,x4,0,x2,x10,-0x400001,0xfc,552,c.swsp,0)
+
+inst_97:
+// rs2_val == -8388609,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x800001; immval:0xc
+TEST_STORE(x3,x4,0,x2,x10,-0x800001,0xc,560,c.swsp,0)
+
+inst_98:
+// rs2_val == -16777217,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x1000001; immval:0x24
+TEST_STORE(x3,x4,0,x2,x10,-0x1000001,0x24,568,c.swsp,0)
+
+inst_99:
+// rs2_val == -33554433,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x2000001; immval:0x38
+TEST_STORE(x3,x4,0,x2,x10,-0x2000001,0x38,576,c.swsp,0)
+
+inst_100:
+// rs2_val == -67108865,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x4000001; immval:0x18
+TEST_STORE(x3,x4,0,x2,x10,-0x4000001,0x18,584,c.swsp,0)
+
+inst_101:
+// rs2_val == -134217729,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x8000001; immval:0xdc
+TEST_STORE(x3,x4,0,x2,x10,-0x8000001,0xdc,592,c.swsp,0)
+
+inst_102:
+// rs2_val == -268435457,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x10000001; immval:0x2c
+TEST_STORE(x3,x4,0,x2,x10,-0x10000001,0x2c,600,c.swsp,0)
+
+inst_103:
+// rs2_val == -536870913,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x20000001; immval:0xfc
+TEST_STORE(x3,x4,0,x2,x10,-0x20000001,0xfc,608,c.swsp,0)
+
+inst_104:
+// rs2_val == -1073741825,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x40000001; immval:0x30
+TEST_STORE(x3,x4,0,x2,x10,-0x40000001,0x30,616,c.swsp,0)
+
+inst_105:
+// rs2_val == -2147483649,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x80000001; immval:0xf4
+TEST_STORE(x3,x4,0,x2,x10,-0x80000001,0xf4,624,c.swsp,0)
+
+inst_106:
+// rs2_val == -4294967297,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x100000001; immval:0xf4
+TEST_STORE(x3,x4,0,x2,x10,-0x100000001,0xf4,632,c.swsp,0)
+
+inst_107:
+// rs2_val == -8589934593,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x200000001; immval:0x1c
+TEST_STORE(x3,x4,0,x2,x10,-0x200000001,0x1c,640,c.swsp,0)
+
+inst_108:
+// rs2_val == -17179869185,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x400000001; immval:0xec
+TEST_STORE(x3,x4,0,x2,x10,-0x400000001,0xec,648,c.swsp,0)
+
+inst_109:
+// rs2_val == -34359738369,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x800000001; immval:0x44
+TEST_STORE(x3,x4,0,x2,x10,-0x800000001,0x44,656,c.swsp,0)
+
+inst_110:
+// rs2_val == -68719476737,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x1000000001; immval:0x80
+TEST_STORE(x3,x4,0,x2,x10,-0x1000000001,0x80,664,c.swsp,0)
+
+inst_111:
+// rs2_val == -137438953473,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x2000000001; immval:0x80
+TEST_STORE(x3,x4,0,x2,x10,-0x2000000001,0x80,672,c.swsp,0)
+
+inst_112:
+// rs2_val == -274877906945,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x4000000001; immval:0x14
+TEST_STORE(x3,x4,0,x2,x10,-0x4000000001,0x14,680,c.swsp,0)
+
+inst_113:
+// rs2_val == -549755813889,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x8000000001; immval:0x18
+TEST_STORE(x3,x4,0,x2,x10,-0x8000000001,0x18,688,c.swsp,0)
+
+inst_114:
+// rs2_val == -1099511627777,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x10000000001; immval:0x18
+TEST_STORE(x3,x4,0,x2,x10,-0x10000000001,0x18,696,c.swsp,0)
+
+inst_115:
+// rs2_val == -2199023255553,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x20000000001; immval:0x0
+TEST_STORE(x3,x4,0,x2,x10,-0x20000000001,0x0,704,c.swsp,0)
+
+inst_116:
+// rs2_val == -4398046511105,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x40000000001; immval:0x34
+TEST_STORE(x3,x4,0,x2,x10,-0x40000000001,0x34,712,c.swsp,0)
+
+inst_117:
+// rs2_val == -8796093022209,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x80000000001; immval:0x4
+TEST_STORE(x3,x4,0,x2,x10,-0x80000000001,0x4,720,c.swsp,0)
+
+inst_118:
+// rs2_val == -17592186044417,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x100000000001; immval:0x44
+TEST_STORE(x3,x4,0,x2,x10,-0x100000000001,0x44,728,c.swsp,0)
+
+inst_119:
+// rs2_val == -35184372088833,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x200000000001; immval:0x34
+TEST_STORE(x3,x4,0,x2,x10,-0x200000000001,0x34,736,c.swsp,0)
+
+inst_120:
+// rs2_val == -70368744177665,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x400000000001; immval:0x7c
+TEST_STORE(x3,x4,0,x2,x10,-0x400000000001,0x7c,744,c.swsp,0)
+
+inst_121:
+// rs2_val == -140737488355329,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x800000000001; immval:0xa8
+TEST_STORE(x3,x4,0,x2,x10,-0x800000000001,0xa8,752,c.swsp,0)
+
+inst_122:
+// rs2_val == -281474976710657,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x1000000000001; immval:0xf8
+TEST_STORE(x3,x4,0,x2,x10,-0x1000000000001,0xf8,760,c.swsp,0)
+
+inst_123:
+// rs2_val == -562949953421313,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x2000000000001; immval:0x48
+TEST_STORE(x3,x4,0,x2,x10,-0x2000000000001,0x48,768,c.swsp,0)
+
+inst_124:
+// rs2_val == -1125899906842625,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x4000000000001; immval:0x4c
+TEST_STORE(x3,x4,0,x2,x10,-0x4000000000001,0x4c,776,c.swsp,0)
+
+inst_125:
+// rs2_val == -2251799813685249,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x8000000000001; immval:0x10
+TEST_STORE(x3,x4,0,x2,x10,-0x8000000000001,0x10,784,c.swsp,0)
+
+inst_126:
+// rs2_val == -4503599627370497,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x10000000000001; immval:0x7c
+TEST_STORE(x3,x4,0,x2,x10,-0x10000000000001,0x7c,792,c.swsp,0)
+
+inst_127:
+// rs2_val == -9007199254740993,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x20000000000001; immval:0x48
+TEST_STORE(x3,x4,0,x2,x10,-0x20000000000001,0x48,800,c.swsp,0)
+
+inst_128:
+// rs2_val == -18014398509481985,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x40000000000001; immval:0xa8
+TEST_STORE(x3,x4,0,x2,x10,-0x40000000000001,0xa8,808,c.swsp,0)
+
+inst_129:
+// rs2_val == -36028797018963969,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x80000000000001; immval:0x4c
+TEST_STORE(x3,x4,0,x2,x10,-0x80000000000001,0x4c,816,c.swsp,0)
+
+inst_130:
+// rs2_val == -72057594037927937,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x100000000000001; immval:0xbc
+TEST_STORE(x3,x4,0,x2,x10,-0x100000000000001,0xbc,824,c.swsp,0)
+
+inst_131:
+// rs2_val == -144115188075855873,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x200000000000001; immval:0x2c
+TEST_STORE(x3,x4,0,x2,x10,-0x200000000000001,0x2c,832,c.swsp,0)
+
+inst_132:
+// rs2_val == -288230376151711745,
+// opcode:c.swsp; op1:x2; op2:x10; op2val:-0x400000000000001; immval:0x24
+TEST_STORE(x3,x4,0,x2,x10,-0x400000000000001,0x24,840,c.swsp,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 27*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_0:
+ .fill 106*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/C/cxor-01.S b/riscof/suite/rv64i_m/C/cxor-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..961e973e8ddf80210c82eb683e9188691bfd30c8
--- /dev/null
+++ b/riscof/suite/rv64i_m/C/cxor-01.S
@@ -0,0 +1,3394 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 04:49:48 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64ic.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the c.xor instruction of the RISC-V C extension for the cxor covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IC")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*C.*);def TEST_CASE_1=True;",cxor)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x8, rs2==x14, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, rs2_val < 0, rs1_val == -2049
+// opcode: c.xor; op1:x8; op2:x14; op1val:-0x801; op2val:-0x8000000000000000
+TEST_CR_OP( c.xor, x8, x14, 0x7ffffffffffff7ff, -0x801, -0x8000000000000000, x1, 0, x2)
+
+inst_1:
+// rs1 == rs2, rs1==x13, rs2==x13, rs2_val == 0, rs1_val == 8192
+// opcode: c.xor; op1:x13; op2:x13; op1val:0x2000; op2val:0x2000
+TEST_CR_OP( c.xor, x13, x13, 0x0, 0x2000, 0x2000, x1, 8, x2)
+
+inst_2:
+// rs1==x10, rs2==x15, rs2_val == (2**(xlen-1)-1), rs2_val > 0, rs1_val == -32769, rs2_val == 9223372036854775807
+// opcode: c.xor; op1:x10; op2:x15; op1val:-0x8001; op2val:0x7fffffffffffffff
+TEST_CR_OP( c.xor, x10, x15, 0x8000000000008000, -0x8001, 0x7fffffffffffffff, x1, 16, x2)
+
+inst_3:
+// rs1==x15, rs2==x10, rs2_val == 1, rs1_val == -2199023255553
+// opcode: c.xor; op1:x15; op2:x10; op1val:-0x20000000001; op2val:0x1
+TEST_CR_OP( c.xor, x15, x10, 0xfffffdfffffffffe, -0x20000000001, 0x1, x1, 24, x2)
+
+inst_4:
+// rs1==x14, rs2==x9, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808
+// opcode: c.xor; op1:x14; op2:x9; op1val:-0x8000000000000000; op2val:-0x8000000000000000
+TEST_CR_OP( c.xor, x14, x9, 0x0, -0x8000000000000000, -0x8000000000000000, x1, 32, x2)
+
+inst_5:
+// rs1==x12, rs2==x8, rs1_val == 0, rs1_val==0 and rs2_val==3037000498
+// opcode: c.xor; op1:x12; op2:x8; op1val:0x0; op2val:0xb504f332
+TEST_CR_OP( c.xor, x12, x8, 0xb504f332, 0x0, 0xb504f332, x1, 40, x2)
+
+inst_6:
+// rs1==x11, rs2==x12, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, rs2_val == -513
+// opcode: c.xor; op1:x11; op2:x12; op1val:0x7fffffffffffffff; op2val:-0x201
+TEST_CR_OP( c.xor, x11, x12, 0x8000000000000200, 0x7fffffffffffffff, -0x201, x1, 48, x2)
+
+inst_7:
+// rs1==x9, rs2==x11, rs1_val == 1, rs2_val == 262144
+// opcode: c.xor; op1:x9; op2:x11; op1val:0x1; op2val:0x40000
+TEST_CR_OP( c.xor, x9, x11, 0x40001, 0x1, 0x40000, x1, 56, x2)
+
+inst_8:
+// rs2_val == 2, rs1_val == 137438953472
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2000000000; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x2000000002, 0x2000000000, 0x2, x1, 64, x2)
+
+inst_9:
+// rs2_val == 4, rs1_val==7378697629483820645 and rs2_val==4
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666661, 0x6666666666666665, 0x4, x1, 72, x2)
+
+inst_10:
+// rs2_val == 8, rs1_val == 131072
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x20000; op2val:0x8
+TEST_CR_OP( c.xor, x10, x11, 0x20008, 0x20000, 0x8, x1, 80, x2)
+
+inst_11:
+// rs2_val == 16,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x10
+TEST_CR_OP( c.xor, x10, x11, 0xb504f322, 0xb504f332, 0x10, x1, 88, x2)
+
+inst_12:
+// rs2_val == 32,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x20
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666647, 0x6666666666666667, 0x20, x1, 96, x2)
+
+inst_13:
+// rs2_val == 64, rs1_val == 1048576
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x100000; op2val:0x40
+TEST_CR_OP( c.xor, x10, x11, 0x100040, 0x100000, 0x40, x1, 104, x2)
+
+inst_14:
+// rs2_val == 128, rs1_val == -70368744177665
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x400000000001; op2val:0x80
+TEST_CR_OP( c.xor, x10, x11, 0xffffbfffffffff7f, -0x400000000001, 0x80, x1, 112, x2)
+
+inst_15:
+// rs2_val == 256, rs1_val == -1152921504606846977
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:0x100
+TEST_CR_OP( c.xor, x10, x11, 0xeffffffffffffeff, -0x1000000000000001, 0x100, x1, 120, x2)
+
+inst_16:
+// rs2_val == 512, rs1_val == -34359738369
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x800000001; op2val:0x200
+TEST_CR_OP( c.xor, x10, x11, 0xfffffff7fffffdff, -0x800000001, 0x200, x1, 128, x2)
+
+inst_17:
+// rs2_val == 1024, rs1_val == -18014398509481985
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x40000000000001; op2val:0x400
+TEST_CR_OP( c.xor, x10, x11, 0xffbffffffffffbff, -0x40000000000001, 0x400, x1, 136, x2)
+
+inst_18:
+// rs2_val == 2048, rs1_val == 274877906944
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4000000000; op2val:0x800
+TEST_CR_OP( c.xor, x10, x11, 0x4000000800, 0x4000000000, 0x800, x1, 144, x2)
+
+inst_19:
+// rs2_val == 4096, rs1_val == -281474976710657
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x1000000000001; op2val:0x1000
+TEST_CR_OP( c.xor, x10, x11, 0xfffeffffffffefff, -0x1000000000001, 0x1000, x1, 152, x2)
+
+inst_20:
+// rs2_val == 8192,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x2000
+TEST_CR_OP( c.xor, x10, x11, 0x2000, 0x0, 0x2000, x1, 160, x2)
+
+inst_21:
+// rs2_val == 16384,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x8001; op2val:0x4000
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffffff3fff, -0x8001, 0x4000, x1, 168, x2)
+
+inst_22:
+// rs2_val == 32768, rs1_val == 144115188075855872
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x200000000000000; op2val:0x8000
+TEST_CR_OP( c.xor, x10, x11, 0x200000000008000, 0x200000000000000, 0x8000, x1, 176, x2)
+
+inst_23:
+// rs2_val == 65536, rs1_val == 2305843009213693952
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2000000000000000; op2val:0x10000
+TEST_CR_OP( c.xor, x10, x11, 0x2000000000010000, 0x2000000000000000, 0x10000, x1, 184, x2)
+
+inst_24:
+// rs2_val == 131072, rs1_val == 2
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x20000
+TEST_CR_OP( c.xor, x10, x11, 0x20002, 0x2, 0x20000, x1, 192, x2)
+
+inst_25:
+// rs2_val == 524288, rs1_val == 536870912
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x20000000; op2val:0x80000
+TEST_CR_OP( c.xor, x10, x11, 0x20080000, 0x20000000, 0x80000, x1, 200, x2)
+
+inst_26:
+// rs2_val == 1048576, rs1_val == -4194305
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x400001; op2val:0x100000
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffffafffff, -0x400001, 0x100000, x1, 208, x2)
+
+inst_27:
+// rs2_val == 2097152, rs1_val == 4503599627370496
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x10000000000000; op2val:0x200000
+TEST_CR_OP( c.xor, x10, x11, 0x10000000200000, 0x10000000000000, 0x200000, x1, 216, x2)
+
+inst_28:
+// rs2_val == 4194304,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x801; op2val:0x400000
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffffbff7ff, -0x801, 0x400000, x1, 224, x2)
+
+inst_29:
+// rs2_val == 8388608, rs1_val == -144115188075855873
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x200000000000001; op2val:0x800000
+TEST_CR_OP( c.xor, x10, x11, 0xfdffffffff7fffff, -0x200000000000001, 0x800000, x1, 232, x2)
+
+inst_30:
+// rs2_val == 16777216,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x1000000
+TEST_CR_OP( c.xor, x10, x11, 0x6666666667666666, 0x6666666666666666, 0x1000000, x1, 240, x2)
+
+inst_31:
+// rs2_val == 33554432,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x100000; op2val:0x2000000
+TEST_CR_OP( c.xor, x10, x11, 0x2100000, 0x100000, 0x2000000, x1, 248, x2)
+
+inst_32:
+// rs2_val == 67108864, rs1_val == 65536
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x10000; op2val:0x4000000
+TEST_CR_OP( c.xor, x10, x11, 0x4010000, 0x10000, 0x4000000, x1, 256, x2)
+
+inst_33:
+// rs2_val == 134217728, rs1_val == -72057594037927937
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x100000000000001; op2val:0x8000000
+TEST_CR_OP( c.xor, x10, x11, 0xfefffffff7ffffff, -0x100000000000001, 0x8000000, x1, 264, x2)
+
+inst_34:
+// rs2_val == 268435456,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x10000000
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff5afb0ccd, -0xb504f333, 0x10000000, x1, 272, x2)
+
+inst_35:
+// rs2_val == 536870912, rs1_val == 1125899906842624
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4000000000000; op2val:0x20000000
+TEST_CR_OP( c.xor, x10, x11, 0x4000020000000, 0x4000000000000, 0x20000000, x1, 280, x2)
+
+inst_36:
+// rs2_val == 1073741824, rs1_val == -1048577
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x100001; op2val:0x40000000
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffbfefffff, -0x100001, 0x40000000, x1, 288, x2)
+
+inst_37:
+// rs2_val == 2147483648, rs1_val == 281474976710656
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x1000000000000; op2val:0x80000000
+TEST_CR_OP( c.xor, x10, x11, 0x1000080000000, 0x1000000000000, 0x80000000, x1, 296, x2)
+
+inst_38:
+// rs2_val == 4294967296, rs1_val == 562949953421312
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2000000000000; op2val:0x100000000
+TEST_CR_OP( c.xor, x10, x11, 0x2000100000000, 0x2000000000000, 0x100000000, x1, 304, x2)
+
+inst_39:
+// rs2_val == 8589934592,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x20000000; op2val:0x200000000
+TEST_CR_OP( c.xor, x10, x11, 0x220000000, 0x20000000, 0x200000000, x1, 312, x2)
+
+inst_40:
+// rs2_val == 17179869184, rs1_val == -262145
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x40001; op2val:0x400000000
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffbfffbffff, -0x40001, 0x400000000, x1, 320, x2)
+
+inst_41:
+// rs2_val == 34359738368,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x800000000
+TEST_CR_OP( c.xor, x10, x11, 0x6666666e66666665, 0x6666666666666665, 0x800000000, x1, 328, x2)
+
+inst_42:
+// rs2_val == 68719476736, rs1_val == 1099511627776
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x10000000000; op2val:0x1000000000
+TEST_CR_OP( c.xor, x10, x11, 0x11000000000, 0x10000000000, 0x1000000000, x1, 336, x2)
+
+inst_43:
+// rs2_val == 137438953472, rs1_val == 128
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x80; op2val:0x2000000000
+TEST_CR_OP( c.xor, x10, x11, 0x2000000080, 0x80, 0x2000000000, x1, 344, x2)
+
+inst_44:
+// rs2_val == 274877906944, rs1_val == -16385
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x4001; op2val:0x4000000000
+TEST_CR_OP( c.xor, x10, x11, 0xffffffbfffffbfff, -0x4001, 0x4000000000, x1, 352, x2)
+
+inst_45:
+// rs2_val == 549755813888, rs1_val == -6148914691236517206
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x8000000000
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaa2aaaaaaaaa, -0x5555555555555556, 0x8000000000, x1, 360, x2)
+
+inst_46:
+// rs2_val == 1099511627776,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4000000000; op2val:0x10000000000
+TEST_CR_OP( c.xor, x10, x11, 0x14000000000, 0x4000000000, 0x10000000000, x1, 368, x2)
+
+inst_47:
+// rs2_val == 2199023255552, rs1_val == -4503599627370497
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x10000000000001; op2val:0x20000000000
+TEST_CR_OP( c.xor, x10, x11, 0xffeffdffffffffff, -0x10000000000001, 0x20000000000, x1, 376, x2)
+
+inst_48:
+// rs2_val == 4398046511104, rs1_val == -16777217
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x1000001; op2val:0x40000000000
+TEST_CR_OP( c.xor, x10, x11, 0xfffffbfffeffffff, -0x1000001, 0x40000000000, x1, 384, x2)
+
+inst_49:
+// rs2_val == 8796093022208, rs1_val == -562949953421313
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x2000000000001; op2val:0x80000000000
+TEST_CR_OP( c.xor, x10, x11, 0xfffdf7ffffffffff, -0x2000000000001, 0x80000000000, x1, 392, x2)
+
+inst_50:
+// rs2_val == 17592186044416,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x200000000000000; op2val:0x100000000000
+TEST_CR_OP( c.xor, x10, x11, 0x200100000000000, 0x200000000000000, 0x100000000000, x1, 400, x2)
+
+inst_51:
+// rs2_val == 35184372088832, rs1_val == -17179869185
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x400000001; op2val:0x200000000000
+TEST_CR_OP( c.xor, x10, x11, 0xffffdffbffffffff, -0x400000001, 0x200000000000, x1, 408, x2)
+
+inst_52:
+// rs2_val == 70368744177664,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x400000000000
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaeaaaaaaaaaaa, -0x5555555555555556, 0x400000000000, x1, 416, x2)
+
+inst_53:
+// rs2_val == 140737488355328, rs1_val == 4611686018427387904
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4000000000000000; op2val:0x800000000000
+TEST_CR_OP( c.xor, x10, x11, 0x4000800000000000, 0x4000000000000000, 0x800000000000, x1, 424, x2)
+
+inst_54:
+// rs2_val == 281474976710656,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x1000000000000
+TEST_CR_OP( c.xor, x10, x11, 0x6667666666666667, 0x6666666666666667, 0x1000000000000, x1, 432, x2)
+
+inst_55:
+// rs2_val == 562949953421312, rs1_val == 64
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x40; op2val:0x2000000000000
+TEST_CR_OP( c.xor, x10, x11, 0x2000000000040, 0x40, 0x2000000000000, x1, 440, x2)
+
+inst_56:
+// rs2_val == 1125899906842624, rs1_val == 32
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x20; op2val:0x4000000000000
+TEST_CR_OP( c.xor, x10, x11, 0x4000000000020, 0x20, 0x4000000000000, x1, 448, x2)
+
+inst_57:
+// rs2_val == 2251799813685248,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x1; op2val:0x8000000000000
+TEST_CR_OP( c.xor, x10, x11, 0xfff7ffffffffffff, -0x1, 0x8000000000000, x1, 456, x2)
+
+inst_58:
+// rs2_val == 4503599627370496,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x8001; op2val:0x10000000000000
+TEST_CR_OP( c.xor, x10, x11, 0xffefffffffff7fff, -0x8001, 0x10000000000000, x1, 464, x2)
+
+inst_59:
+// rs2_val == 9007199254740992, rs1_val == -129
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x81; op2val:0x20000000000000
+TEST_CR_OP( c.xor, x10, x11, 0xffdfffffffffff7f, -0x81, 0x20000000000000, x1, 472, x2)
+
+inst_60:
+// rs2_val == 18014398509481984,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x800000001; op2val:0x40000000000000
+TEST_CR_OP( c.xor, x10, x11, 0xffbffff7ffffffff, -0x800000001, 0x40000000000000, x1, 480, x2)
+
+inst_61:
+// rs2_val == 36028797018963968, rs1_val == -65
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x41; op2val:0x80000000000000
+TEST_CR_OP( c.xor, x10, x11, 0xff7fffffffffffbf, -0x41, 0x80000000000000, x1, 488, x2)
+
+inst_62:
+// rs2_val == 72057594037927936, rs1_val == 2251799813685248
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x8000000000000; op2val:0x100000000000000
+TEST_CR_OP( c.xor, x10, x11, 0x108000000000000, 0x8000000000000, 0x100000000000000, x1, 496, x2)
+
+inst_63:
+// rs2_val == 144115188075855872,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x801; op2val:0x200000000000000
+TEST_CR_OP( c.xor, x10, x11, 0xfdfffffffffff7ff, -0x801, 0x200000000000000, x1, 504, x2)
+
+inst_64:
+// rs2_val == 288230376151711744, rs1_val == 262144
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x40000; op2val:0x400000000000000
+TEST_CR_OP( c.xor, x10, x11, 0x400000000040000, 0x40000, 0x400000000000000, x1, 512, x2)
+
+inst_65:
+// rs2_val == 576460752303423488,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x81; op2val:0x800000000000000
+TEST_CR_OP( c.xor, x10, x11, 0xf7ffffffffffff7f, -0x81, 0x800000000000000, x1, 520, x2)
+
+inst_66:
+// rs2_val == 1152921504606846976, rs1_val == -35184372088833
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x200000000001; op2val:0x1000000000000000
+TEST_CR_OP( c.xor, x10, x11, 0xefffdfffffffffff, -0x200000000001, 0x1000000000000000, x1, 528, x2)
+
+inst_67:
+// rs2_val == 2305843009213693952, rs1_val == -131073
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x20001; op2val:0x2000000000000000
+TEST_CR_OP( c.xor, x10, x11, 0xdffffffffffdffff, -0x20001, 0x2000000000000000, x1, 536, x2)
+
+inst_68:
+// rs2_val == 4611686018427387904, rs1_val == -33554433
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x2000001; op2val:0x4000000000000000
+TEST_CR_OP( c.xor, x10, x11, 0xbffffffffdffffff, -0x2000001, 0x4000000000000000, x1, 544, x2)
+
+inst_69:
+// rs2_val == -2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2000000000; op2val:-0x2
+TEST_CR_OP( c.xor, x10, x11, 0xffffffdffffffffe, 0x2000000000, -0x2, x1, 552, x2)
+
+inst_70:
+// rs2_val == -3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x3
+TEST_CR_OP( c.xor, x10, x11, 0xccccccccccccccce, 0x3333333333333333, -0x3, x1, 560, x2)
+
+inst_71:
+// rs2_val == -5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x100001; op2val:-0x5
+TEST_CR_OP( c.xor, x10, x11, 0x100004, -0x100001, -0x5, x1, 568, x2)
+
+inst_72:
+// rs2_val == -9, rs1_val == 2048
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x800; op2val:-0x9
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffff7f7, 0x800, -0x9, x1, 576, x2)
+
+inst_73:
+// rs2_val == -17, rs1_val == -4097
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x1001; op2val:-0x11
+TEST_CR_OP( c.xor, x10, x11, 0x1010, -0x1001, -0x11, x1, 584, x2)
+
+inst_74:
+// rs2_val == -33,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2000000000000; op2val:-0x21
+TEST_CR_OP( c.xor, x10, x11, 0xfffdffffffffffdf, 0x2000000000000, -0x21, x1, 592, x2)
+
+inst_75:
+// rs2_val == -65, rs1_val == -2
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x2; op2val:-0x41
+TEST_CR_OP( c.xor, x10, x11, 0x41, -0x2, -0x41, x1, 600, x2)
+
+inst_76:
+// rs2_val == -129, rs1_val == -513
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x201; op2val:-0x81
+TEST_CR_OP( c.xor, x10, x11, 0x280, -0x201, -0x81, x1, 608, x2)
+
+inst_77:
+// rs2_val == -257,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x101
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0dcb, 0xb504f334, -0x101, x1, 616, x2)
+
+inst_78:
+// rs2_val == -1025,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x401
+TEST_CR_OP( c.xor, x10, x11, 0xccccccccccccc8cc, 0x3333333333333333, -0x401, x1, 624, x2)
+
+inst_79:
+// rs2_val == -2049, rs1_val == -268435457
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x10000001; op2val:-0x801
+TEST_CR_OP( c.xor, x10, x11, 0x10000800, -0x10000001, -0x801, x1, 632, x2)
+
+inst_80:
+// rs2_val == -4097,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:-0x1001
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffffffefff, 0x0, -0x1001, x1, 640, x2)
+
+inst_81:
+// rs2_val == -8193,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2000000000; op2val:-0x2001
+TEST_CR_OP( c.xor, x10, x11, 0xffffffdfffffdfff, 0x2000000000, -0x2001, x1, 648, x2)
+
+inst_82:
+// rs2_val == -16385, rs1_val == 8
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x8; op2val:-0x4001
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffffffbff7, 0x8, -0x4001, x1, 656, x2)
+
+inst_83:
+// rs2_val == -32769,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x20001; op2val:-0x8001
+TEST_CR_OP( c.xor, x10, x11, 0x28000, -0x20001, -0x8001, x1, 664, x2)
+
+inst_84:
+// rs2_val == -65537, rs1_val == -576460752303423489
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x800000000000001; op2val:-0x10001
+TEST_CR_OP( c.xor, x10, x11, 0x800000000010000, -0x800000000000001, -0x10001, x1, 672, x2)
+
+inst_85:
+// rs2_val == -131073,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x2000001; op2val:-0x20001
+TEST_CR_OP( c.xor, x10, x11, 0x2020000, -0x2000001, -0x20001, x1, 680, x2)
+
+inst_86:
+// rs2_val == -262145,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:-0x40001
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffbffff, 0x0, -0x40001, x1, 688, x2)
+
+inst_87:
+// rs2_val == -524289, rs1_val == 4
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:-0x80001
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffff7fffb, 0x4, -0x80001, x1, 696, x2)
+
+inst_88:
+// rs2_val == -1048577,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x100001; op2val:-0x100001
+TEST_CR_OP( c.xor, x10, x11, 0x0, -0x100001, -0x100001, x1, 704, x2)
+
+inst_89:
+// rs2_val == -2097153, rs1_val == -4294967297
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x100000001; op2val:-0x200001
+TEST_CR_OP( c.xor, x10, x11, 0x100200000, -0x100000001, -0x200001, x1, 712, x2)
+
+inst_90:
+// rs2_val == -4194305,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x400001
+TEST_CR_OP( c.xor, x10, x11, 0xb544f331, -0xb504f332, -0x400001, x1, 720, x2)
+
+inst_91:
+// rs2_val == -8388609, rs1_val == -8388609
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x800001; op2val:-0x800001
+TEST_CR_OP( c.xor, x10, x11, 0x0, -0x800001, -0x800001, x1, 728, x2)
+
+inst_92:
+// rs2_val == -16777217, rs1_val == -536870913
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x20000001; op2val:-0x1000001
+TEST_CR_OP( c.xor, x10, x11, 0x21000000, -0x20000001, -0x1000001, x1, 736, x2)
+
+inst_93:
+// rs2_val == -33554433, rs1_val == 36028797018963968
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x80000000000000; op2val:-0x2000001
+TEST_CR_OP( c.xor, x10, x11, 0xff7ffffffdffffff, 0x80000000000000, -0x2000001, x1, 744, x2)
+
+inst_94:
+// rs2_val == -67108865,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:-0x4000001
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffbfffffc, 0x3, -0x4000001, x1, 752, x2)
+
+inst_95:
+// rs2_val == -134217729,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x1; op2val:-0x8000001
+TEST_CR_OP( c.xor, x10, x11, 0x8000000, -0x1, -0x8000001, x1, 760, x2)
+
+inst_96:
+// rs2_val == -268435457,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x800000000000001; op2val:-0x10000001
+TEST_CR_OP( c.xor, x10, x11, 0x800000010000000, -0x800000000000001, -0x10000001, x1, 768, x2)
+
+inst_97:
+// rs2_val == -536870913, rs1_val == 256
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x100; op2val:-0x20000001
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffdffffeff, 0x100, -0x20000001, x1, 776, x2)
+
+inst_98:
+// rs2_val == -1073741825, rs1_val == -8796093022209
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x80000000001; op2val:-0x40000001
+TEST_CR_OP( c.xor, x10, x11, 0x80040000000, -0x80000000001, -0x40000001, x1, 784, x2)
+
+inst_99:
+// rs2_val == -2147483649, rs1_val == 134217728
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x8000000; op2val:-0x80000001
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff77ffffff, 0x8000000, -0x80000001, x1, 792, x2)
+
+inst_100:
+// rs2_val == -4294967297, rs1_val == 4194304
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x400000; op2val:-0x100000001
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffeffbfffff, 0x400000, -0x100000001, x1, 800, x2)
+
+inst_101:
+// rs2_val == -8589934593, rs1_val == 288230376151711744
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x400000000000000; op2val:-0x200000001
+TEST_CR_OP( c.xor, x10, x11, 0xfbfffffdffffffff, 0x400000000000000, -0x200000001, x1, 808, x2)
+
+inst_102:
+// rs2_val == -17179869185, rs1_val == 68719476736
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x1000000000; op2val:-0x400000001
+TEST_CR_OP( c.xor, x10, x11, 0xffffffebffffffff, 0x1000000000, -0x400000001, x1, 816, x2)
+
+inst_103:
+// rs2_val == -34359738369,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x1; op2val:-0x800000001
+TEST_CR_OP( c.xor, x10, x11, 0x800000000, -0x1, -0x800000001, x1, 824, x2)
+
+inst_104:
+// rs2_val == -68719476737,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x10000000000001; op2val:-0x1000000001
+TEST_CR_OP( c.xor, x10, x11, 0x10001000000000, -0x10000000000001, -0x1000000001, x1, 832, x2)
+
+inst_105:
+// rs2_val == -137438953473,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x80000000000000; op2val:-0x2000000001
+TEST_CR_OP( c.xor, x10, x11, 0xff7fffdfffffffff, 0x80000000000000, -0x2000000001, x1, 840, x2)
+
+inst_106:
+// rs2_val == -274877906945,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x4001; op2val:-0x4000000001
+TEST_CR_OP( c.xor, x10, x11, 0x4000004000, -0x4001, -0x4000000001, x1, 848, x2)
+
+inst_107:
+// rs2_val == -549755813889,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x80000000000000; op2val:-0x8000000001
+TEST_CR_OP( c.xor, x10, x11, 0xff7fff7fffffffff, 0x80000000000000, -0x8000000001, x1, 856, x2)
+
+inst_108:
+// rs2_val == -1099511627777, rs1_val == -36028797018963969
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x80000000000001; op2val:-0x10000000001
+TEST_CR_OP( c.xor, x10, x11, 0x80010000000000, -0x80000000000001, -0x10000000001, x1, 864, x2)
+
+inst_109:
+// rs2_val == -2199023255553, rs1_val == 4398046511104
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x40000000000; op2val:-0x20000000001
+TEST_CR_OP( c.xor, x10, x11, 0xfffff9ffffffffff, 0x40000000000, -0x20000000001, x1, 872, x2)
+
+inst_110:
+// rs2_val == -4398046511105, rs1_val == 16384
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4000; op2val:-0x40000000001
+TEST_CR_OP( c.xor, x10, x11, 0xfffffbffffffbfff, 0x4000, -0x40000000001, x1, 880, x2)
+
+inst_111:
+// rs2_val == -8796093022209, rs1_val == -134217729
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x8000001; op2val:-0x80000000001
+TEST_CR_OP( c.xor, x10, x11, 0x80008000000, -0x8000001, -0x80000000001, x1, 888, x2)
+
+inst_112:
+// rs2_val == -17592186044417, rs1_val == -3
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x3; op2val:-0x100000000001
+TEST_CR_OP( c.xor, x10, x11, 0x100000000002, -0x3, -0x100000000001, x1, 896, x2)
+
+inst_113:
+// rs2_val == -35184372088833, rs1_val == 1073741824
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x40000000; op2val:-0x200000000001
+TEST_CR_OP( c.xor, x10, x11, 0xffffdfffbfffffff, 0x40000000, -0x200000000001, x1, 904, x2)
+
+inst_114:
+// rs2_val == -70368744177665,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:-0x400000000001
+TEST_CR_OP( c.xor, x10, x11, 0xffffbffffffffff9, 0x6, -0x400000000001, x1, 912, x2)
+
+inst_115:
+// rs2_val == -140737488355329, rs1_val == 33554432
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2000000; op2val:-0x800000000001
+TEST_CR_OP( c.xor, x10, x11, 0xffff7ffffdffffff, 0x2000000, -0x800000000001, x1, 920, x2)
+
+inst_116:
+// rs2_val == -281474976710657,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2000; op2val:-0x1000000000001
+TEST_CR_OP( c.xor, x10, x11, 0xfffeffffffffdfff, 0x2000, -0x1000000000001, x1, 928, x2)
+
+inst_117:
+// rs2_val == -562949953421313, rs1_val == -1025
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x401; op2val:-0x2000000000001
+TEST_CR_OP( c.xor, x10, x11, 0x2000000000400, -0x401, -0x2000000000001, x1, 936, x2)
+
+inst_118:
+// rs2_val == -1125899906842625,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x20000; op2val:-0x4000000000001
+TEST_CR_OP( c.xor, x10, x11, 0xfffbfffffffdffff, 0x20000, -0x4000000000001, x1, 944, x2)
+
+inst_119:
+// rs2_val == -2251799813685249, rs1_val == 67108864
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4000000; op2val:-0x8000000000001
+TEST_CR_OP( c.xor, x10, x11, 0xfff7fffffbffffff, 0x4000000, -0x8000000000001, x1, 952, x2)
+
+inst_120:
+// rs2_val == -4503599627370497,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x200000000000001; op2val:-0x10000000000001
+TEST_CR_OP( c.xor, x10, x11, 0x210000000000000, -0x200000000000001, -0x10000000000001, x1, 960, x2)
+
+inst_121:
+// rs2_val == -9007199254740993, rs1_val == 35184372088832
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x200000000000; op2val:-0x20000000000001
+TEST_CR_OP( c.xor, x10, x11, 0xffdfdfffffffffff, 0x200000000000, -0x20000000000001, x1, 968, x2)
+
+inst_122:
+// rs2_val == -18014398509481985, rs1_val == -9
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x9; op2val:-0x40000000000001
+TEST_CR_OP( c.xor, x10, x11, 0x40000000000008, -0x9, -0x40000000000001, x1, 976, x2)
+
+inst_123:
+// rs2_val == -36028797018963969,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x8001; op2val:-0x80000000000001
+TEST_CR_OP( c.xor, x10, x11, 0x80000000008000, -0x8001, -0x80000000000001, x1, 984, x2)
+
+inst_124:
+// rs2_val == -72057594037927937, rs1_val == -524289
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x80001; op2val:-0x100000000000001
+TEST_CR_OP( c.xor, x10, x11, 0x100000000080000, -0x80001, -0x100000000000001, x1, 992, x2)
+
+inst_125:
+// rs2_val == -144115188075855873,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4000000000000; op2val:-0x200000000000001
+TEST_CR_OP( c.xor, x10, x11, 0xfdfbffffffffffff, 0x4000000000000, -0x200000000000001, x1, 1000, x2)
+
+inst_126:
+// rs2_val == -288230376151711745,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2000000000000; op2val:-0x400000000000001
+TEST_CR_OP( c.xor, x10, x11, 0xfbfdffffffffffff, 0x2000000000000, -0x400000000000001, x1, 1008, x2)
+
+inst_127:
+// rs2_val == -576460752303423489, rs1_val == 18014398509481984
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x40000000000000; op2val:-0x800000000000001
+TEST_CR_OP( c.xor, x10, x11, 0xf7bfffffffffffff, 0x40000000000000, -0x800000000000001, x1, 1016, x2)
+
+inst_128:
+// rs2_val == -1152921504606846977, rs1_val == -140737488355329
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x800000000001; op2val:-0x1000000000000001
+TEST_CR_OP( c.xor, x10, x11, 0x1000800000000000, -0x800000000001, -0x1000000000000001, x1, 1024, x2)
+
+inst_129:
+// rs2_val == -2305843009213693953, rs1_val == 512
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x200; op2val:-0x2000000000000001
+TEST_CR_OP( c.xor, x10, x11, 0xdffffffffffffdff, 0x200, -0x2000000000000001, x1, 1032, x2)
+
+inst_130:
+// rs2_val == -4611686018427387905,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xa; op2val:-0x4000000000000001
+TEST_CR_OP( c.xor, x10, x11, 0x4000000000000009, -0xa, -0x4000000000000001, x1, 1040, x2)
+
+inst_131:
+// rs2_val == 6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x200000000001; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaa8aaaaaaaaaaa, -0x200000000001, 0x5555555555555555, x1, 1048, x2)
+
+inst_132:
+// rs2_val == -6148914691236517206, rs1_val == 4294967296
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x100000000; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaabaaaaaaaa, 0x100000000, -0x5555555555555556, x1, 1056, x2)
+
+inst_133:
+// rs1_val == 16,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x10; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555545, 0x10, 0x5555555555555555, x1, 1064, x2)
+
+inst_134:
+// rs1_val == 1024,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x400; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x400, 0x400, 0x0, x1, 1072, x2)
+
+inst_135:
+// rs1_val == 4096,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x1000; op2val:-0x9
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffffffeff7, 0x1000, -0x9, x1, 1080, x2)
+
+inst_136:
+// rs1_val == 32768,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x8000; op2val:0x1000000000000
+TEST_CR_OP( c.xor, x10, x11, 0x1000000008000, 0x8000, 0x1000000000000, x1, 1088, x2)
+
+inst_137:
+// rs1_val == 524288,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x80000; op2val:-0x7
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffff7fff9, 0x80000, -0x7, x1, 1096, x2)
+
+inst_138:
+// rs1_val == 2097152,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x200000; op2val:-0x10000001
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffefdfffff, 0x200000, -0x10000001, x1, 1104, x2)
+
+inst_139:
+// rs1_val == 8388608,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x800000; op2val:-0xa
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffff7ffff6, 0x800000, -0xa, x1, 1112, x2)
+
+inst_140:
+// rs1_val == 16777216,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x1000000; op2val:-0x2000000001
+TEST_CR_OP( c.xor, x10, x11, 0xffffffdffeffffff, 0x1000000, -0x2000000001, x1, 1120, x2)
+
+inst_141:
+// rs1_val == 268435456,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x10000000; op2val:-0x8000001
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffe7ffffff, 0x10000000, -0x8000001, x1, 1128, x2)
+
+inst_142:
+// rs1_val == 2147483648,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x80000000; op2val:0x1000000000
+TEST_CR_OP( c.xor, x10, x11, 0x1080000000, 0x80000000, 0x1000000000, x1, 1136, x2)
+
+inst_143:
+// rs1_val == 8589934592,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x200000000; op2val:-0x4000001
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffdfbffffff, 0x200000000, -0x4000001, x1, 1144, x2)
+
+inst_144:
+// rs1_val == 17179869184,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x400000000; op2val:0x7fffffffffffffff
+TEST_CR_OP( c.xor, x10, x11, 0x7ffffffbffffffff, 0x400000000, 0x7fffffffffffffff, x1, 1152, x2)
+
+inst_145:
+// rs1_val == 34359738368,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x800000000; op2val:-0x10000001
+TEST_CR_OP( c.xor, x10, x11, 0xfffffff7efffffff, 0x800000000, -0x10000001, x1, 1160, x2)
+
+inst_146:
+// rs1_val == 549755813888,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x8000000000; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x333333b333333334, 0x8000000000, 0x3333333333333334, x1, 1168, x2)
+
+inst_147:
+// rs1_val == 2199023255552,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x20000000000; op2val:-0x6
+TEST_CR_OP( c.xor, x10, x11, 0xfffffdfffffffffa, 0x20000000000, -0x6, x1, 1176, x2)
+
+inst_148:
+// rs1_val == 8796093022208,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x80000000000; op2val:-0x40000000001
+TEST_CR_OP( c.xor, x10, x11, 0xfffff3ffffffffff, 0x80000000000, -0x40000000001, x1, 1184, x2)
+
+inst_149:
+// rs1_val == 17592186044416,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x100000000000; op2val:-0x10000000001
+TEST_CR_OP( c.xor, x10, x11, 0xffffeeffffffffff, 0x100000000000, -0x10000000001, x1, 1192, x2)
+
+inst_150:
+// rs1_val == 70368744177664,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x400000000000; op2val:0x1
+TEST_CR_OP( c.xor, x10, x11, 0x400000000001, 0x400000000000, 0x1, x1, 1200, x2)
+
+inst_151:
+// rs1_val == 140737488355328,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x800000000000; op2val:0x400000000
+TEST_CR_OP( c.xor, x10, x11, 0x800400000000, 0x800000000000, 0x400000000, x1, 1208, x2)
+
+inst_152:
+// rs1_val == 9007199254740992,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x20000000000000; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x6646666666666665, 0x20000000000000, 0x6666666666666665, x1, 1216, x2)
+
+inst_153:
+// rs1_val == 72057594037927936,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x100000000000000; op2val:0x80
+TEST_CR_OP( c.xor, x10, x11, 0x100000000000080, 0x100000000000000, 0x80, x1, 1224, x2)
+
+inst_154:
+// rs1_val == 576460752303423488,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x800000000000000; op2val:0x1000000
+TEST_CR_OP( c.xor, x10, x11, 0x800000001000000, 0x800000000000000, 0x1000000, x1, 1232, x2)
+
+inst_155:
+// rs1_val == 1152921504606846976,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x1000000000000000; op2val:0x400
+TEST_CR_OP( c.xor, x10, x11, 0x1000000000000400, 0x1000000000000000, 0x400, x1, 1240, x2)
+
+inst_156:
+// rs1_val == -5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5; op2val:-0x9
+TEST_CR_OP( c.xor, x10, x11, 0xc, -0x5, -0x9, x1, 1248, x2)
+
+inst_157:
+// rs1_val == -17,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x11; op2val:-0x40001
+TEST_CR_OP( c.xor, x10, x11, 0x40010, -0x11, -0x40001, x1, 1256, x2)
+
+inst_158:
+// rs1_val == -33,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x21; op2val:-0x5
+TEST_CR_OP( c.xor, x10, x11, 0x24, -0x21, -0x5, x1, 1264, x2)
+
+inst_159:
+// rs1_val == -257,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x101; op2val:0x400000000000
+TEST_CR_OP( c.xor, x10, x11, 0xffffbffffffffeff, -0x101, 0x400000000000, x1, 1272, x2)
+
+inst_160:
+// rs1_val == -8193,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x2001; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffffffdfff, -0x2001, 0x0, x1, 1280, x2)
+
+inst_161:
+// rs1_val == -65537,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x10001; op2val:-0x10000000001
+TEST_CR_OP( c.xor, x10, x11, 0x10000010000, -0x10001, -0x10000000001, x1, 1288, x2)
+
+inst_162:
+// rs1_val == -2097153,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x200001; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccccceccccc, -0x200001, 0x3333333333333333, x1, 1296, x2)
+
+inst_163:
+// rs1_val == -67108865,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x4000001; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaeaaaaaa, -0x4000001, 0x5555555555555555, x1, 1304, x2)
+
+inst_164:
+// rs1_val == -1073741825,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x40000001; op2val:0x800000000
+TEST_CR_OP( c.xor, x10, x11, 0xfffffff7bfffffff, -0x40000001, 0x800000000, x1, 1312, x2)
+
+inst_165:
+// rs1_val == -2147483649,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x80000001; op2val:0x4000000000000
+TEST_CR_OP( c.xor, x10, x11, 0xfffbffff7fffffff, -0x80000001, 0x4000000000000, x1, 1320, x2)
+
+inst_166:
+// rs1_val == -8589934593,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x200000001; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffdffffffff, -0x200000001, 0x0, x1, 1328, x2)
+
+inst_167:
+// rs1_val == -68719476737,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x1000000001; op2val:0x1
+TEST_CR_OP( c.xor, x10, x11, 0xffffffeffffffffe, -0x1000000001, 0x1, x1, 1336, x2)
+
+inst_168:
+// rs1_val == -137438953473,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x2000000001; op2val:0x8000000000000
+TEST_CR_OP( c.xor, x10, x11, 0xfff7ffdfffffffff, -0x2000000001, 0x8000000000000, x1, 1344, x2)
+
+inst_169:
+// rs1_val == -274877906945,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x4000000001; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xffffffbffffffffb, -0x4000000001, 0x4, x1, 1352, x2)
+
+inst_170:
+// rs1_val == -549755813889,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x8000000001; op2val:-0x8000000001
+TEST_CR_OP( c.xor, x10, x11, 0x0, -0x8000000001, -0x8000000001, x1, 1360, x2)
+
+inst_171:
+// rs1_val == -1099511627777,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x10000000001; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xfffffefffffffff9, -0x10000000001, 0x6, x1, 1368, x2)
+
+inst_172:
+// rs1_val == -4398046511105,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x40000000001; op2val:0x400
+TEST_CR_OP( c.xor, x10, x11, 0xfffffbfffffffbff, -0x40000000001, 0x400, x1, 1376, x2)
+
+inst_173:
+// rs1_val == -17592186044417,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x100000000001; op2val:-0x10000000001
+TEST_CR_OP( c.xor, x10, x11, 0x110000000000, -0x100000000001, -0x10000000001, x1, 1384, x2)
+
+inst_174:
+// rs1_val == -1125899906842625,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x4000000000001; op2val:-0x20000000001
+TEST_CR_OP( c.xor, x10, x11, 0x4020000000000, -0x4000000000001, -0x20000000001, x1, 1392, x2)
+
+inst_175:
+// rs1_val == -2251799813685249,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x8000000000001; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x555d555555555555, -0x8000000000001, -0x5555555555555556, x1, 1400, x2)
+
+inst_176:
+// rs1_val == -9007199254740993,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x20000000000001; op2val:0x1000000000
+TEST_CR_OP( c.xor, x10, x11, 0xffdfffefffffffff, -0x20000000000001, 0x1000000000, x1, 1408, x2)
+
+inst_177:
+// rs1_val == -288230376151711745,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x400000000000001; op2val:-0x20000000000001
+TEST_CR_OP( c.xor, x10, x11, 0x420000000000000, -0x400000000000001, -0x20000000000001, x1, 1416, x2)
+
+inst_178:
+// rs1_val == -2305843009213693953,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x2000000000000001; op2val:0x4000000000000000
+TEST_CR_OP( c.xor, x10, x11, 0x9fffffffffffffff, -0x2000000000000001, 0x4000000000000000, x1, 1424, x2)
+
+inst_179:
+// rs1_val == -4611686018427387905,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x4000000000000001; op2val:-0x80000000001
+TEST_CR_OP( c.xor, x10, x11, 0x4000080000000000, -0x4000000000000001, -0x80000000001, x1, 1432, x2)
+
+inst_180:
+// rs1_val == 6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x20000
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555575555, 0x5555555555555555, 0x20000, x1, 1440, x2)
+
+inst_181:
+// rs1_val==3 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x3, 0x3, x1, 1448, x2)
+
+inst_182:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555556, 0x3, 0x5555555555555555, x1, 1456, x2)
+
+inst_183:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x3, -0x5555555555555556, x1, 1464, x2)
+
+inst_184:
+// rs1_val==3 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x3, 0x5, x1, 1472, x2)
+
+inst_185:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333330, 0x3, 0x3333333333333333, x1, 1480, x2)
+
+inst_186:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666665, 0x3, 0x6666666666666666, x1, 1488, x2)
+
+inst_187:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0cce, 0x3, -0xb504f333, x1, 1496, x2)
+
+inst_188:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xb504f330, 0x3, 0xb504f333, x1, 1504, x2)
+
+inst_189:
+// rs1_val==3 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x3, 0x2, x1, 1512, x2)
+
+inst_190:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555557, 0x3, 0x5555555555555554, x1, 1520, x2)
+
+inst_191:
+// rs1_val==3 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x3, 0x0, x1, 1528, x2)
+
+inst_192:
+// rs1_val==3 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0x3, 0x4, x1, 1536, x2)
+
+inst_193:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333331, 0x3, 0x3333333333333332, x1, 1544, x2)
+
+inst_194:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666666, 0x3, 0x6666666666666665, x1, 1552, x2)
+
+inst_195:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xb504f331, 0x3, 0xb504f332, x1, 1560, x2)
+
+inst_196:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555555, 0x3, 0x5555555555555556, x1, 1568, x2)
+
+inst_197:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaa8, 0x3, -0x5555555555555555, x1, 1576, x2)
+
+inst_198:
+// rs1_val==3 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x5, 0x3, 0x6, x1, 1584, x2)
+
+inst_199:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333337, 0x3, 0x3333333333333334, x1, 1592, x2)
+
+inst_200:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666664, 0x3, 0x6666666666666667, x1, 1600, x2)
+
+inst_201:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0ccd, 0x3, -0xb504f332, x1, 1608, x2)
+
+inst_202:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0xb504f337, 0x3, 0xb504f334, x1, 1616, x2)
+
+inst_203:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555556, 0x5555555555555555, 0x3, x1, 1624, x2)
+
+inst_204:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x5555555555555555, 0x5555555555555555, x1, 1632, x2)
+
+inst_205:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffffffffff, 0x5555555555555555, -0x5555555555555556, x1, 1640, x2)
+
+inst_206:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555550, 0x5555555555555555, 0x5, x1, 1648, x2)
+
+inst_207:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666666, 0x5555555555555555, 0x3333333333333333, x1, 1656, x2)
+
+inst_208:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333333, 0x5555555555555555, 0x6666666666666666, x1, 1664, x2)
+
+inst_209:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5998, 0x5555555555555555, -0xb504f333, x1, 1672, x2)
+
+inst_210:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a666, 0x5555555555555555, 0xb504f333, x1, 1680, x2)
+
+inst_211:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555557, 0x5555555555555555, 0x2, x1, 1688, x2)
+
+inst_212:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x5555555555555555, 0x5555555555555554, x1, 1696, x2)
+
+inst_213:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x0, x1, 1704, x2)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555551, 0x5555555555555555, 0x4, x1, 1712, x2)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666667, 0x5555555555555555, 0x3333333333333332, x1, 1720, x2)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333330, 0x5555555555555555, 0x6666666666666665, x1, 1728, x2)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a667, 0x5555555555555555, 0xb504f332, x1, 1736, x2)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x5555555555555555, 0x5555555555555556, x1, 1744, x2)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffe, 0x5555555555555555, -0x5555555555555555, x1, 1752, x2)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555553, 0x5555555555555555, 0x6, x1, 1760, x2)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666661, 0x5555555555555555, 0x3333333333333334, x1, 1768, x2)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333332, 0x5555555555555555, 0x6666666666666667, x1, 1776, x2)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae599b, 0x5555555555555555, -0xb504f332, x1, 1784, x2)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a661, 0x5555555555555555, 0xb504f334, x1, 1792, x2)
+
+inst_225:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaa9, -0x5555555555555556, 0x3, x1, 1800, x2)
+
+inst_226:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffffffffff, -0x5555555555555556, 0x5555555555555555, x1, 1808, x2)
+
+inst_227:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x0, -0x5555555555555556, -0x5555555555555556, x1, 1816, x2)
+
+inst_228:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555556, 0x5, x1, 1824, x2)
+
+inst_229:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x9999999999999999, -0x5555555555555556, 0x3333333333333333, x1, 1832, x2)
+
+inst_230:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccccccccccc, -0x5555555555555556, 0x6666666666666666, x1, 1840, x2)
+
+inst_231:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a667, -0x5555555555555556, -0xb504f333, x1, 1848, x2)
+
+inst_232:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5999, -0x5555555555555556, 0xb504f333, x1, 1856, x2)
+
+inst_233:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaa8, -0x5555555555555556, 0x2, x1, 1864, x2)
+
+inst_234:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffe, -0x5555555555555556, 0x5555555555555554, x1, 1872, x2)
+
+inst_235:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x0, x1, 1880, x2)
+
+inst_236:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x4, x1, 1888, x2)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x9999999999999998, -0x5555555555555556, 0x3333333333333332, x1, 1896, x2)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccccccccccf, -0x5555555555555556, 0x6666666666666665, x1, 1904, x2)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5998, -0x5555555555555556, 0xb504f332, x1, 1912, x2)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffc, -0x5555555555555556, 0x5555555555555556, x1, 1920, x2)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x1, -0x5555555555555556, -0x5555555555555555, x1, 1928, x2)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaac, -0x5555555555555556, 0x6, x1, 1936, x2)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x999999999999999e, -0x5555555555555556, 0x3333333333333334, x1, 1944, x2)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccccccccccd, -0x5555555555555556, 0x6666666666666667, x1, 1952, x2)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a664, -0x5555555555555556, -0xb504f332, x1, 1960, x2)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae599e, -0x5555555555555556, 0xb504f334, x1, 1968, x2)
+
+inst_247:
+// rs1_val==5 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x5, 0x3, x1, 1976, x2)
+
+inst_248:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555550, 0x5, 0x5555555555555555, x1, 1984, x2)
+
+inst_249:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x5, -0x5555555555555556, x1, 1992, x2)
+
+inst_250:
+// rs1_val==5 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x5, 0x5, x1, 2000, x2)
+
+inst_251:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333336, 0x5, 0x3333333333333333, x1, 2008, x2)
+
+inst_252:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666663, 0x5, 0x6666666666666666, x1, 2016, x2)
+
+inst_253:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0cc8, 0x5, -0xb504f333, x1, 2024, x2)
+
+inst_254:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xb504f336, 0x5, 0xb504f333, x1, 2032, x2)
+
+inst_255:
+// rs1_val==5 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0x5, 0x2, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_256:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555551, 0x5, 0x5555555555555554, x1, 0, x2)
+
+inst_257:
+// rs1_val==5 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x5, 0x5, 0x0, x1, 8, x2)
+
+inst_258:
+// rs1_val==5 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x5, 0x4, x1, 16, x2)
+
+inst_259:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333337, 0x5, 0x3333333333333332, x1, 24, x2)
+
+inst_260:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666660, 0x5, 0x6666666666666665, x1, 32, x2)
+
+inst_261:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xb504f337, 0x5, 0xb504f332, x1, 40, x2)
+
+inst_262:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555553, 0x5, 0x5555555555555556, x1, 48, x2)
+
+inst_263:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaae, 0x5, -0x5555555555555555, x1, 56, x2)
+
+inst_264:
+// rs1_val==5 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x5, 0x6, x1, 64, x2)
+
+inst_265:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333331, 0x5, 0x3333333333333334, x1, 72, x2)
+
+inst_266:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666662, 0x5, 0x6666666666666667, x1, 80, x2)
+
+inst_267:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0ccb, 0x5, -0xb504f332, x1, 88, x2)
+
+inst_268:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0xb504f331, 0x5, 0xb504f334, x1, 96, x2)
+
+inst_269:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333330, 0x3333333333333333, 0x3, x1, 104, x2)
+
+inst_270:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666666, 0x3333333333333333, 0x5555555555555555, x1, 112, x2)
+
+inst_271:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x9999999999999999, 0x3333333333333333, -0x5555555555555556, x1, 120, x2)
+
+inst_272:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333336, 0x3333333333333333, 0x5, x1, 128, x2)
+
+inst_273:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x3333333333333333, 0x3333333333333333, x1, 136, x2)
+
+inst_274:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555555, 0x3333333333333333, 0x6666666666666666, x1, 144, x2)
+
+inst_275:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc79c83ffe, 0x3333333333333333, -0xb504f333, x1, 152, x2)
+
+inst_276:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c000, 0x3333333333333333, 0xb504f333, x1, 160, x2)
+
+inst_277:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333331, 0x3333333333333333, 0x2, x1, 168, x2)
+
+inst_278:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666667, 0x3333333333333333, 0x5555555555555554, x1, 176, x2)
+
+inst_279:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x0, x1, 184, x2)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333337, 0x3333333333333333, 0x4, x1, 192, x2)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x3333333333333333, 0x3333333333333332, x1, 200, x2)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555556, 0x3333333333333333, 0x6666666666666665, x1, 208, x2)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c001, 0x3333333333333333, 0xb504f332, x1, 216, x2)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666665, 0x3333333333333333, 0x5555555555555556, x1, 224, x2)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x9999999999999998, 0x3333333333333333, -0x5555555555555555, x1, 232, x2)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333335, 0x3333333333333333, 0x6, x1, 240, x2)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0x3333333333333333, 0x3333333333333334, x1, 248, x2)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555554, 0x3333333333333333, 0x6666666666666667, x1, 256, x2)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc79c83ffd, 0x3333333333333333, -0xb504f332, x1, 264, x2)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c007, 0x3333333333333333, 0xb504f334, x1, 272, x2)
+
+inst_291:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666665, 0x6666666666666666, 0x3, x1, 280, x2)
+
+inst_292:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333333, 0x6666666666666666, 0x5555555555555555, x1, 288, x2)
+
+inst_293:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccccccccccc, 0x6666666666666666, -0x5555555555555556, x1, 296, x2)
+
+inst_294:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666663, 0x6666666666666666, 0x5, x1, 304, x2)
+
+inst_295:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555555, 0x6666666666666666, 0x3333333333333333, x1, 312, x2)
+
+inst_296:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x6666666666666666, 0x6666666666666666, x1, 320, x2)
+
+inst_297:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x999999992c9d6aab, 0x6666666666666666, -0xb504f333, x1, 328, x2)
+
+inst_298:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629555, 0x6666666666666666, 0xb504f333, x1, 336, x2)
+
+inst_299:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666664, 0x6666666666666666, 0x2, x1, 344, x2)
+
+inst_300:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333332, 0x6666666666666666, 0x5555555555555554, x1, 352, x2)
+
+inst_301:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x0, x1, 360, x2)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666662, 0x6666666666666666, 0x4, x1, 368, x2)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555554, 0x6666666666666666, 0x3333333333333332, x1, 376, x2)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x6666666666666666, 0x6666666666666665, x1, 384, x2)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629554, 0x6666666666666666, 0xb504f332, x1, 392, x2)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333330, 0x6666666666666666, 0x5555555555555556, x1, 400, x2)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccccccccccd, 0x6666666666666666, -0x5555555555555555, x1, 408, x2)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666660, 0x6666666666666666, 0x6, x1, 416, x2)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555552, 0x6666666666666666, 0x3333333333333334, x1, 424, x2)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x6666666666666666, 0x6666666666666667, x1, 432, x2)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x999999992c9d6aa8, 0x6666666666666666, -0xb504f332, x1, 440, x2)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629552, 0x6666666666666666, 0xb504f334, x1, 448, x2)
+
+inst_313:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0cce, -0xb504f333, 0x3, x1, 456, x2)
+
+inst_314:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5998, -0xb504f333, 0x5555555555555555, x1, 464, x2)
+
+inst_315:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a667, -0xb504f333, -0x5555555555555556, x1, 472, x2)
+
+inst_316:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0cc8, -0xb504f333, 0x5, x1, 480, x2)
+
+inst_317:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc79c83ffe, -0xb504f333, 0x3333333333333333, x1, 488, x2)
+
+inst_318:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x999999992c9d6aab, -0xb504f333, 0x6666666666666666, x1, 496, x2)
+
+inst_319:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x0, -0xb504f333, -0xb504f333, x1, 504, x2)
+
+inst_320:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffe, -0xb504f333, 0xb504f333, x1, 512, x2)
+
+inst_321:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0ccf, -0xb504f333, 0x2, x1, 520, x2)
+
+inst_322:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5999, -0xb504f333, 0x5555555555555554, x1, 528, x2)
+
+inst_323:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x0, x1, 536, x2)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0cc9, -0xb504f333, 0x4, x1, 544, x2)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc79c83fff, -0xb504f333, 0x3333333333333332, x1, 552, x2)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x999999992c9d6aa8, -0xb504f333, 0x6666666666666665, x1, 560, x2)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffffffffff, -0xb504f333, 0xb504f332, x1, 568, x2)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae599b, -0xb504f333, 0x5555555555555556, x1, 576, x2)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a666, -0xb504f333, -0x5555555555555555, x1, 584, x2)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0ccb, -0xb504f333, 0x6, x1, 592, x2)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc79c83ff9, -0xb504f333, 0x3333333333333334, x1, 600, x2)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x999999992c9d6aaa, -0xb504f333, 0x6666666666666667, x1, 608, x2)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x3, -0xb504f333, -0xb504f332, x1, 616, x2)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffff9, -0xb504f333, 0xb504f334, x1, 624, x2)
+
+inst_335:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xb504f330, 0xb504f333, 0x3, x1, 632, x2)
+
+inst_336:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a666, 0xb504f333, 0x5555555555555555, x1, 640, x2)
+
+inst_337:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5999, 0xb504f333, -0x5555555555555556, x1, 648, x2)
+
+inst_338:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xb504f336, 0xb504f333, 0x5, x1, 656, x2)
+
+inst_339:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c000, 0xb504f333, 0x3333333333333333, x1, 664, x2)
+
+inst_340:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629555, 0xb504f333, 0x6666666666666666, x1, 672, x2)
+
+inst_341:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffe, 0xb504f333, -0xb504f333, x1, 680, x2)
+
+inst_342:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0xb504f333, 0xb504f333, x1, 688, x2)
+
+inst_343:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xb504f331, 0xb504f333, 0x2, x1, 696, x2)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a667, 0xb504f333, 0x5555555555555554, x1, 704, x2)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xb504f333, 0xb504f333, 0x0, x1, 712, x2)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xb504f337, 0xb504f333, 0x4, x1, 720, x2)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c001, 0xb504f333, 0x3333333333333332, x1, 728, x2)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629556, 0xb504f333, 0x6666666666666665, x1, 736, x2)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0xb504f333, 0xb504f332, x1, 744, x2)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a665, 0xb504f333, 0x5555555555555556, x1, 752, x2)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5998, 0xb504f333, -0x5555555555555555, x1, 760, x2)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xb504f335, 0xb504f333, 0x6, x1, 768, x2)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c007, 0xb504f333, 0x3333333333333334, x1, 776, x2)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629554, 0xb504f333, 0x6666666666666667, x1, 784, x2)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffd, 0xb504f333, -0xb504f332, x1, 792, x2)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0xb504f333, 0xb504f334, x1, 800, x2)
+
+inst_357:
+// rs1_val==2 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x2, 0x3, x1, 808, x2)
+
+inst_358:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555557, 0x2, 0x5555555555555555, x1, 816, x2)
+
+inst_359:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaa8, 0x2, -0x5555555555555556, x1, 824, x2)
+
+inst_360:
+// rs1_val==2 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0x2, 0x5, x1, 832, x2)
+
+inst_361:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333331, 0x2, 0x3333333333333333, x1, 840, x2)
+
+inst_362:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666664, 0x2, 0x6666666666666666, x1, 848, x2)
+
+inst_363:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0ccf, 0x2, -0xb504f333, x1, 856, x2)
+
+inst_364:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xb504f331, 0x2, 0xb504f333, x1, 864, x2)
+
+inst_365:
+// rs1_val==2 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x2, 0x2, x1, 872, x2)
+
+inst_366:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555556, 0x2, 0x5555555555555554, x1, 880, x2)
+
+inst_367:
+// rs1_val==2 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x2, 0x0, x1, 888, x2)
+
+inst_368:
+// rs1_val==2 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x2, 0x4, x1, 896, x2)
+
+inst_369:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333330, 0x2, 0x3333333333333332, x1, 904, x2)
+
+inst_370:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666667, 0x2, 0x6666666666666665, x1, 912, x2)
+
+inst_371:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xb504f330, 0x2, 0xb504f332, x1, 920, x2)
+
+inst_372:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555554, 0x2, 0x5555555555555556, x1, 928, x2)
+
+inst_373:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x2, -0x5555555555555555, x1, 936, x2)
+
+inst_374:
+// rs1_val==2 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x4, 0x2, 0x6, x1, 944, x2)
+
+inst_375:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333336, 0x2, 0x3333333333333334, x1, 952, x2)
+
+inst_376:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666665, 0x2, 0x6666666666666667, x1, 960, x2)
+
+inst_377:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0ccc, 0x2, -0xb504f332, x1, 968, x2)
+
+inst_378:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x2; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0xb504f336, 0x2, 0xb504f334, x1, 976, x2)
+
+inst_379:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555557, 0x5555555555555554, 0x3, x1, 984, x2)
+
+inst_380:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x5555555555555554, 0x5555555555555555, x1, 992, x2)
+
+inst_381:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffe, 0x5555555555555554, -0x5555555555555556, x1, 1000, x2)
+
+inst_382:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555551, 0x5555555555555554, 0x5, x1, 1008, x2)
+
+inst_383:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666667, 0x5555555555555554, 0x3333333333333333, x1, 1016, x2)
+
+inst_384:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333332, 0x5555555555555554, 0x6666666666666666, x1, 1024, x2)
+
+inst_385:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5999, 0x5555555555555554, -0xb504f333, x1, 1032, x2)
+
+inst_386:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a667, 0x5555555555555554, 0xb504f333, x1, 1040, x2)
+
+inst_387:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x2, x1, 1048, x2)
+
+inst_388:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x5555555555555554, 0x5555555555555554, x1, 1056, x2)
+
+inst_389:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x0, x1, 1064, x2)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555550, 0x5555555555555554, 0x4, x1, 1072, x2)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666666, 0x5555555555555554, 0x3333333333333332, x1, 1080, x2)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333331, 0x5555555555555554, 0x6666666666666665, x1, 1088, x2)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a666, 0x5555555555555554, 0xb504f332, x1, 1096, x2)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x5555555555555554, 0x5555555555555556, x1, 1104, x2)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffffffffff, 0x5555555555555554, -0x5555555555555555, x1, 1112, x2)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555552, 0x5555555555555554, 0x6, x1, 1120, x2)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666660, 0x5555555555555554, 0x3333333333333334, x1, 1128, x2)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333333, 0x5555555555555554, 0x6666666666666667, x1, 1136, x2)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae599a, 0x5555555555555554, -0xb504f332, x1, 1144, x2)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a660, 0x5555555555555554, 0xb504f334, x1, 1152, x2)
+
+inst_401:
+// rs1_val==0 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x0, 0x3, x1, 1160, x2)
+
+inst_402:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555555, 0x0, 0x5555555555555555, x1, 1168, x2)
+
+inst_403:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x0, -0x5555555555555556, x1, 1176, x2)
+
+inst_404:
+// rs1_val==0 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x5, 0x0, 0x5, x1, 1184, x2)
+
+inst_405:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333333, 0x0, 0x3333333333333333, x1, 1192, x2)
+
+inst_406:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666666, 0x0, 0x6666666666666666, x1, 1200, x2)
+
+inst_407:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0ccd, 0x0, -0xb504f333, x1, 1208, x2)
+
+inst_408:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaae, 0x4, -0x5555555555555556, x1, 1216, x2)
+
+inst_409:
+// rs1_val==4 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x4, 0x5, x1, 1224, x2)
+
+inst_410:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333337, 0x4, 0x3333333333333333, x1, 1232, x2)
+
+inst_411:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666662, 0x4, 0x6666666666666666, x1, 1240, x2)
+
+inst_412:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0cc9, 0x4, -0xb504f333, x1, 1248, x2)
+
+inst_413:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xb504f337, 0x4, 0xb504f333, x1, 1256, x2)
+
+inst_414:
+// rs1_val==4 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x4, 0x2, x1, 1264, x2)
+
+inst_415:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555550, 0x4, 0x5555555555555554, x1, 1272, x2)
+
+inst_416:
+// rs1_val==4 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x4, 0x4, 0x0, x1, 1280, x2)
+
+inst_417:
+// rs1_val==4 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x4, 0x4, x1, 1288, x2)
+
+inst_418:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333336, 0x4, 0x3333333333333332, x1, 1296, x2)
+
+inst_419:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666661, 0x4, 0x6666666666666665, x1, 1304, x2)
+
+inst_420:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xb504f336, 0x4, 0xb504f332, x1, 1312, x2)
+
+inst_421:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555552, 0x4, 0x5555555555555556, x1, 1320, x2)
+
+inst_422:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x4, -0x5555555555555555, x1, 1328, x2)
+
+inst_423:
+// rs1_val==4 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x4, 0x6, x1, 1336, x2)
+
+inst_424:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333330, 0x4, 0x3333333333333334, x1, 1344, x2)
+
+inst_425:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666663, 0x4, 0x6666666666666667, x1, 1352, x2)
+
+inst_426:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0cca, 0x4, -0xb504f332, x1, 1360, x2)
+
+inst_427:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0xb504f330, 0x4, 0xb504f334, x1, 1368, x2)
+
+inst_428:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333331, 0x3333333333333332, 0x3, x1, 1376, x2)
+
+inst_429:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666667, 0x3333333333333332, 0x5555555555555555, x1, 1384, x2)
+
+inst_430:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x9999999999999998, 0x3333333333333332, -0x5555555555555556, x1, 1392, x2)
+
+inst_431:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333337, 0x3333333333333332, 0x5, x1, 1400, x2)
+
+inst_432:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x3333333333333332, 0x3333333333333333, x1, 1408, x2)
+
+inst_433:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555554, 0x3333333333333332, 0x6666666666666666, x1, 1416, x2)
+
+inst_434:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc79c83fff, 0x3333333333333332, -0xb504f333, x1, 1424, x2)
+
+inst_435:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c001, 0x3333333333333332, 0xb504f333, x1, 1432, x2)
+
+inst_436:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333330, 0x3333333333333332, 0x2, x1, 1440, x2)
+
+inst_437:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666666, 0x3333333333333332, 0x5555555555555554, x1, 1448, x2)
+
+inst_438:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x0, x1, 1456, x2)
+
+inst_439:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333336, 0x3333333333333332, 0x4, x1, 1464, x2)
+
+inst_440:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x3333333333333332, 0x3333333333333332, x1, 1472, x2)
+
+inst_441:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555557, 0x3333333333333332, 0x6666666666666665, x1, 1480, x2)
+
+inst_442:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c000, 0x3333333333333332, 0xb504f332, x1, 1488, x2)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666664, 0x3333333333333332, 0x5555555555555556, x1, 1496, x2)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x9999999999999999, 0x3333333333333332, -0x5555555555555555, x1, 1504, x2)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333334, 0x3333333333333332, 0x6, x1, 1512, x2)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x3333333333333332, 0x3333333333333334, x1, 1520, x2)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555555, 0x3333333333333332, 0x6666666666666667, x1, 1528, x2)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc79c83ffc, 0x3333333333333332, -0xb504f332, x1, 1536, x2)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c006, 0x3333333333333332, 0xb504f334, x1, 1544, x2)
+
+inst_450:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666666, 0x6666666666666665, 0x3, x1, 1552, x2)
+
+inst_451:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333330, 0x6666666666666665, 0x5555555555555555, x1, 1560, x2)
+
+inst_452:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccccccccccf, 0x6666666666666665, -0x5555555555555556, x1, 1568, x2)
+
+inst_453:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666660, 0x6666666666666665, 0x5, x1, 1576, x2)
+
+inst_454:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555556, 0x6666666666666665, 0x3333333333333333, x1, 1584, x2)
+
+inst_455:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x6666666666666665, 0x6666666666666666, x1, 1592, x2)
+
+inst_456:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x999999992c9d6aa8, 0x6666666666666665, -0xb504f333, x1, 1600, x2)
+
+inst_457:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629556, 0x6666666666666665, 0xb504f333, x1, 1608, x2)
+
+inst_458:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x2, x1, 1616, x2)
+
+inst_459:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333331, 0x6666666666666665, 0x5555555555555554, x1, 1624, x2)
+
+inst_460:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x0, x1, 1632, x2)
+
+inst_461:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555557, 0x6666666666666665, 0x3333333333333332, x1, 1640, x2)
+
+inst_462:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x6666666666666665, 0x6666666666666665, x1, 1648, x2)
+
+inst_463:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629557, 0x6666666666666665, 0xb504f332, x1, 1656, x2)
+
+inst_464:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333333, 0x6666666666666665, 0x5555555555555556, x1, 1664, x2)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xccccccccccccccce, 0x6666666666666665, -0x5555555555555555, x1, 1672, x2)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666663, 0x6666666666666665, 0x6, x1, 1680, x2)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555551, 0x6666666666666665, 0x3333333333333334, x1, 1688, x2)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x6666666666666665, 0x6666666666666667, x1, 1696, x2)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x999999992c9d6aab, 0x6666666666666665, -0xb504f332, x1, 1704, x2)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629551, 0x6666666666666665, 0xb504f334, x1, 1712, x2)
+
+inst_471:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xb504f331, 0xb504f332, 0x3, x1, 1720, x2)
+
+inst_472:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a667, 0xb504f332, 0x5555555555555555, x1, 1728, x2)
+
+inst_473:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5998, 0xb504f332, -0x5555555555555556, x1, 1736, x2)
+
+inst_474:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xb504f337, 0xb504f332, 0x5, x1, 1744, x2)
+
+inst_475:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c001, 0xb504f332, 0x3333333333333333, x1, 1752, x2)
+
+inst_476:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629554, 0xb504f332, 0x6666666666666666, x1, 1760, x2)
+
+inst_477:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffffffffff, 0xb504f332, -0xb504f333, x1, 1768, x2)
+
+inst_478:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0xb504f332, 0xb504f333, x1, 1776, x2)
+
+inst_479:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xb504f330, 0xb504f332, 0x2, x1, 1784, x2)
+
+inst_480:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a666, 0xb504f332, 0x5555555555555554, x1, 1792, x2)
+
+inst_481:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xb504f332, 0xb504f332, 0x0, x1, 1800, x2)
+
+inst_482:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xb504f336, 0xb504f332, 0x4, x1, 1808, x2)
+
+inst_483:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c000, 0xb504f332, 0x3333333333333332, x1, 1816, x2)
+
+inst_484:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629557, 0xb504f332, 0x6666666666666665, x1, 1824, x2)
+
+inst_485:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0xb504f332, 0xb504f332, x1, 1832, x2)
+
+inst_486:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a664, 0xb504f332, 0x5555555555555556, x1, 1840, x2)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5999, 0xb504f332, -0x5555555555555555, x1, 1848, x2)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xb504f334, 0xb504f332, 0x6, x1, 1856, x2)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c006, 0xb504f332, 0x3333333333333334, x1, 1864, x2)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629555, 0xb504f332, 0x6666666666666667, x1, 1872, x2)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffc, 0xb504f332, -0xb504f332, x1, 1880, x2)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0xb504f332, 0xb504f334, x1, 1888, x2)
+
+inst_493:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555555, 0x5555555555555556, 0x3, x1, 1896, x2)
+
+inst_494:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x5555555555555556, 0x5555555555555555, x1, 1904, x2)
+
+inst_495:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffc, 0x5555555555555556, -0x5555555555555556, x1, 1912, x2)
+
+inst_496:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555553, 0x5555555555555556, 0x5, x1, 1920, x2)
+
+inst_497:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666665, 0x5555555555555556, 0x3333333333333333, x1, 1928, x2)
+
+inst_498:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333330, 0x5555555555555556, 0x6666666666666666, x1, 1936, x2)
+
+inst_499:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae599b, 0x5555555555555556, -0xb504f333, x1, 1944, x2)
+
+inst_500:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a665, 0x5555555555555556, 0xb504f333, x1, 1952, x2)
+
+inst_501:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x2, x1, 1960, x2)
+
+inst_502:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x5555555555555556, 0x5555555555555554, x1, 1968, x2)
+
+inst_503:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x0, x1, 1976, x2)
+
+inst_504:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555552, 0x5555555555555556, 0x4, x1, 1984, x2)
+
+inst_505:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666664, 0x5555555555555556, 0x3333333333333332, x1, 1992, x2)
+
+inst_506:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333333, 0x5555555555555556, 0x6666666666666665, x1, 2000, x2)
+
+inst_507:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a664, 0x5555555555555556, 0xb504f332, x1, 2008, x2)
+
+inst_508:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x5555555555555556, 0x5555555555555556, x1, 2016, x2)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffd, 0x5555555555555556, -0x5555555555555555, x1, 2024, x2)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555550, 0x5555555555555556, 0x6, x1, 2032, x2)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666662, 0x5555555555555556, 0x3333333333333334, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_3)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333331, 0x5555555555555556, 0x6666666666666667, x1, 0, x2)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5998, 0x5555555555555556, -0xb504f332, x1, 8, x2)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a662, 0x5555555555555556, 0xb504f334, x1, 16, x2)
+
+inst_515:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaa8, -0x5555555555555555, 0x3, x1, 24, x2)
+
+inst_516:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffe, -0x5555555555555555, 0x5555555555555555, x1, 32, x2)
+
+inst_517:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x1, -0x5555555555555555, -0x5555555555555556, x1, 40, x2)
+
+inst_518:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaae, -0x5555555555555555, 0x5, x1, 48, x2)
+
+inst_519:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x9999999999999998, -0x5555555555555555, 0x3333333333333333, x1, 56, x2)
+
+inst_520:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccccccccccd, -0x5555555555555555, 0x6666666666666666, x1, 64, x2)
+
+inst_521:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a666, -0x5555555555555555, -0xb504f333, x1, 72, x2)
+
+inst_522:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5998, -0x5555555555555555, 0xb504f333, x1, 80, x2)
+
+inst_523:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaa9, -0x5555555555555555, 0x2, x1, 88, x2)
+
+inst_524:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0xffffffffffffffff, -0x5555555555555555, 0x5555555555555554, x1, 96, x2)
+
+inst_525:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x0, x1, 104, x2)
+
+inst_526:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x4, x1, 112, x2)
+
+inst_527:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x9999999999999999, -0x5555555555555555, 0x3333333333333332, x1, 120, x2)
+
+inst_528:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0xccccccccccccccce, -0x5555555555555555, 0x6666666666666665, x1, 128, x2)
+
+inst_529:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5999, -0x5555555555555555, 0xb504f332, x1, 136, x2)
+
+inst_530:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffd, -0x5555555555555555, 0x5555555555555556, x1, 144, x2)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x0, -0x5555555555555555, -0x5555555555555555, x1, 152, x2)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaad, -0x5555555555555555, 0x6, x1, 160, x2)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x999999999999999f, -0x5555555555555555, 0x3333333333333334, x1, 168, x2)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccccccccccc, -0x5555555555555555, 0x6666666666666667, x1, 176, x2)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a665, -0x5555555555555555, -0xb504f332, x1, 184, x2)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae599f, -0x5555555555555555, 0xb504f334, x1, 192, x2)
+
+inst_537:
+// rs1_val==6 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x5, 0x6, 0x3, x1, 200, x2)
+
+inst_538:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555553, 0x6, 0x5555555555555555, x1, 208, x2)
+
+inst_539:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaac, 0x6, -0x5555555555555556, x1, 216, x2)
+
+inst_540:
+// rs1_val==6 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x3, 0x6, 0x5, x1, 224, x2)
+
+inst_541:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333335, 0x6, 0x3333333333333333, x1, 232, x2)
+
+inst_542:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666660, 0x6, 0x6666666666666666, x1, 240, x2)
+
+inst_543:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0ccb, 0x6, -0xb504f333, x1, 248, x2)
+
+inst_544:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xb504f335, 0x6, 0xb504f333, x1, 256, x2)
+
+inst_545:
+// rs1_val==6 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x4, 0x6, 0x2, x1, 264, x2)
+
+inst_546:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555552, 0x6, 0x5555555555555554, x1, 272, x2)
+
+inst_547:
+// rs1_val==6 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x6, 0x0, x1, 280, x2)
+
+inst_548:
+// rs1_val==6 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x6, 0x4, x1, 288, x2)
+
+inst_549:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333334, 0x6, 0x3333333333333332, x1, 296, x2)
+
+inst_550:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666663, 0x6, 0x6666666666666665, x1, 304, x2)
+
+inst_551:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xb504f334, 0x6, 0xb504f332, x1, 312, x2)
+
+inst_552:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555550, 0x6, 0x5555555555555556, x1, 320, x2)
+
+inst_553:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaad, 0x6, -0x5555555555555555, x1, 328, x2)
+
+inst_554:
+// rs1_val==6 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x6, 0x6, x1, 336, x2)
+
+inst_555:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333332, 0x6, 0x3333333333333334, x1, 344, x2)
+
+inst_556:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666661, 0x6, 0x6666666666666667, x1, 352, x2)
+
+inst_557:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0cc8, 0x6, -0xb504f332, x1, 360, x2)
+
+inst_558:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0xb504f332, 0x6, 0xb504f334, x1, 368, x2)
+
+inst_559:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333337, 0x3333333333333334, 0x3, x1, 376, x2)
+
+inst_560:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666661, 0x3333333333333334, 0x5555555555555555, x1, 384, x2)
+
+inst_561:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x999999999999999e, 0x3333333333333334, -0x5555555555555556, x1, 392, x2)
+
+inst_562:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333331, 0x3333333333333334, 0x5, x1, 400, x2)
+
+inst_563:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0x3333333333333334, 0x3333333333333333, x1, 408, x2)
+
+inst_564:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555552, 0x3333333333333334, 0x6666666666666666, x1, 416, x2)
+
+inst_565:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc79c83ff9, 0x3333333333333334, -0xb504f333, x1, 424, x2)
+
+inst_566:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c007, 0x3333333333333334, 0xb504f333, x1, 432, x2)
+
+inst_567:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333336, 0x3333333333333334, 0x2, x1, 440, x2)
+
+inst_568:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666660, 0x3333333333333334, 0x5555555555555554, x1, 448, x2)
+
+inst_569:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x0, x1, 456, x2)
+
+inst_570:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333330, 0x3333333333333334, 0x4, x1, 464, x2)
+
+inst_571:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x3333333333333334, 0x3333333333333332, x1, 472, x2)
+
+inst_572:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555551, 0x3333333333333334, 0x6666666666666665, x1, 480, x2)
+
+inst_573:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c006, 0x3333333333333334, 0xb504f332, x1, 488, x2)
+
+inst_574:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666662, 0x3333333333333334, 0x5555555555555556, x1, 496, x2)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x999999999999999f, 0x3333333333333334, -0x5555555555555555, x1, 504, x2)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333332, 0x3333333333333334, 0x6, x1, 512, x2)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x3333333333333334, 0x3333333333333334, x1, 520, x2)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555553, 0x3333333333333334, 0x6666666666666667, x1, 528, x2)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc79c83ffa, 0x3333333333333334, -0xb504f332, x1, 536, x2)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c000, 0x3333333333333334, 0xb504f334, x1, 544, x2)
+
+inst_581:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666664, 0x6666666666666667, 0x3, x1, 552, x2)
+
+inst_582:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333332, 0x6666666666666667, 0x5555555555555555, x1, 560, x2)
+
+inst_583:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccccccccccd, 0x6666666666666667, -0x5555555555555556, x1, 568, x2)
+
+inst_584:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666662, 0x6666666666666667, 0x5, x1, 576, x2)
+
+inst_585:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555554, 0x6666666666666667, 0x3333333333333333, x1, 584, x2)
+
+inst_586:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x1, 0x6666666666666667, 0x6666666666666666, x1, 592, x2)
+
+inst_587:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x999999992c9d6aaa, 0x6666666666666667, -0xb504f333, x1, 600, x2)
+
+inst_588:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629554, 0x6666666666666667, 0xb504f333, x1, 608, x2)
+
+inst_589:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666665, 0x6666666666666667, 0x2, x1, 616, x2)
+
+inst_590:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333333, 0x6666666666666667, 0x5555555555555554, x1, 624, x2)
+
+inst_591:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x0, x1, 632, x2)
+
+inst_592:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666663, 0x6666666666666667, 0x4, x1, 640, x2)
+
+inst_593:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555555, 0x6666666666666667, 0x3333333333333332, x1, 648, x2)
+
+inst_594:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x6666666666666667, 0x6666666666666665, x1, 656, x2)
+
+inst_595:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629555, 0x6666666666666667, 0xb504f332, x1, 664, x2)
+
+inst_596:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333331, 0x6666666666666667, 0x5555555555555556, x1, 672, x2)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccccccccccc, 0x6666666666666667, -0x5555555555555555, x1, 680, x2)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666661, 0x6666666666666667, 0x6, x1, 688, x2)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555553, 0x6666666666666667, 0x3333333333333334, x1, 696, x2)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x6666666666666667, 0x6666666666666667, x1, 704, x2)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x999999992c9d6aa9, 0x6666666666666667, -0xb504f332, x1, 712, x2)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629553, 0x6666666666666667, 0xb504f334, x1, 720, x2)
+
+inst_603:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0ccd, -0xb504f332, 0x3, x1, 728, x2)
+
+inst_604:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae599b, -0xb504f332, 0x5555555555555555, x1, 736, x2)
+
+inst_605:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a664, -0xb504f332, -0x5555555555555556, x1, 744, x2)
+
+inst_606:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0ccb, -0xb504f332, 0x5, x1, 752, x2)
+
+inst_607:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc79c83ffd, -0xb504f332, 0x3333333333333333, x1, 760, x2)
+
+inst_608:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x999999992c9d6aa8, -0xb504f332, 0x6666666666666666, x1, 768, x2)
+
+inst_609:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x3, -0xb504f332, -0xb504f333, x1, 776, x2)
+
+inst_610:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffd, -0xb504f332, 0xb504f333, x1, 784, x2)
+
+inst_611:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0ccc, -0xb504f332, 0x2, x1, 792, x2)
+
+inst_612:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae599a, -0xb504f332, 0x5555555555555554, x1, 800, x2)
+
+inst_613:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x0, x1, 808, x2)
+
+inst_614:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0cca, -0xb504f332, 0x4, x1, 816, x2)
+
+inst_615:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc79c83ffc, -0xb504f332, 0x3333333333333332, x1, 824, x2)
+
+inst_616:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x999999992c9d6aab, -0xb504f332, 0x6666666666666665, x1, 832, x2)
+
+inst_617:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffc, -0xb504f332, 0xb504f332, x1, 840, x2)
+
+inst_618:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae5998, -0xb504f332, 0x5555555555555556, x1, 848, x2)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a665, -0xb504f332, -0x5555555555555555, x1, 856, x2)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0cc8, -0xb504f332, 0x6, x1, 864, x2)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0xcccccccc79c83ffa, -0xb504f332, 0x3333333333333334, x1, 872, x2)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x999999992c9d6aa9, -0xb504f332, 0x6666666666666667, x1, 880, x2)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x0, -0xb504f332, -0xb504f332, x1, 888, x2)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffa, -0xb504f332, 0xb504f334, x1, 896, x2)
+
+inst_625:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0xb504f337, 0xb504f334, 0x3, x1, 904, x2)
+
+inst_626:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a661, 0xb504f334, 0x5555555555555555, x1, 912, x2)
+
+inst_627:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae599e, 0xb504f334, -0x5555555555555556, x1, 920, x2)
+
+inst_628:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5
+TEST_CR_OP( c.xor, x10, x11, 0xb504f331, 0xb504f334, 0x5, x1, 928, x2)
+
+inst_629:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c007, 0xb504f334, 0x3333333333333333, x1, 936, x2)
+
+inst_630:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629552, 0xb504f334, 0x6666666666666666, x1, 944, x2)
+
+inst_631:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffff9, 0xb504f334, -0xb504f333, x1, 952, x2)
+
+inst_632:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0xb504f334, 0xb504f333, x1, 960, x2)
+
+inst_633:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0xb504f336, 0xb504f334, 0x2, x1, 968, x2)
+
+inst_634:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a660, 0xb504f334, 0x5555555555555554, x1, 976, x2)
+
+inst_635:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0xb504f334, 0xb504f334, 0x0, x1, 984, x2)
+
+inst_636:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0xb504f330, 0xb504f334, 0x4, x1, 992, x2)
+
+inst_637:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c006, 0xb504f334, 0x3333333333333332, x1, 1000, x2)
+
+inst_638:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629551, 0xb504f334, 0x6666666666666665, x1, 1008, x2)
+
+inst_639:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0xb504f334, 0xb504f332, x1, 1016, x2)
+
+inst_640:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x55555555e051a662, 0xb504f334, 0x5555555555555556, x1, 1024, x2)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaa1fae599f, 0xb504f334, -0x5555555555555555, x1, 1032, x2)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0xb504f332, 0xb504f334, 0x6, x1, 1040, x2)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x333333338637c000, 0xb504f334, 0x3333333333333334, x1, 1048, x2)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x66666666d3629553, 0xb504f334, 0x6666666666666667, x1, 1056, x2)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xfffffffffffffffa, 0xb504f334, -0xb504f332, x1, 1064, x2)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0xb504f334, 0xb504f334, x1, 1072, x2)
+
+inst_647:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f333
+TEST_CR_OP( c.xor, x10, x11, 0xb504f333, 0x0, 0xb504f333, x1, 1080, x2)
+
+inst_648:
+// rs1_val==0 and rs2_val==2,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x2
+TEST_CR_OP( c.xor, x10, x11, 0x2, 0x0, 0x2, x1, 1088, x2)
+
+inst_649:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555554
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555554, 0x0, 0x5555555555555554, x1, 1096, x2)
+
+inst_650:
+// rs1_val==0 and rs2_val==0,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x0
+TEST_CR_OP( c.xor, x10, x11, 0x0, 0x0, 0x0, x1, 1104, x2)
+
+inst_651:
+// rs1_val==0 and rs2_val==4,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x4
+TEST_CR_OP( c.xor, x10, x11, 0x4, 0x0, 0x4, x1, 1112, x2)
+
+inst_652:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333332
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333332, 0x0, 0x3333333333333332, x1, 1120, x2)
+
+inst_653:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666665
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666665, 0x0, 0x6666666666666665, x1, 1128, x2)
+
+inst_654:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555556
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555556, 0x0, 0x5555555555555556, x1, 1136, x2)
+
+inst_655:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0xaaaaaaaaaaaaaaab, 0x0, -0x5555555555555555, x1, 1144, x2)
+
+inst_656:
+// rs1_val==0 and rs2_val==6,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x6
+TEST_CR_OP( c.xor, x10, x11, 0x6, 0x0, 0x6, x1, 1152, x2)
+
+inst_657:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333334
+TEST_CR_OP( c.xor, x10, x11, 0x3333333333333334, 0x0, 0x3333333333333334, x1, 1160, x2)
+
+inst_658:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666667
+TEST_CR_OP( c.xor, x10, x11, 0x6666666666666667, 0x0, 0x6666666666666667, x1, 1168, x2)
+
+inst_659:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f332
+TEST_CR_OP( c.xor, x10, x11, 0xffffffff4afb0cce, 0x0, -0xb504f332, x1, 1176, x2)
+
+inst_660:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x0; op2val:0xb504f334
+TEST_CR_OP( c.xor, x10, x11, 0xb504f334, 0x0, 0xb504f334, x1, 1184, x2)
+
+inst_661:
+// rs1_val==4 and rs2_val==3,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x3
+TEST_CR_OP( c.xor, x10, x11, 0x7, 0x4, 0x3, x1, 1192, x2)
+
+inst_662:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: c.xor; op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555555
+TEST_CR_OP( c.xor, x10, x11, 0x5555555555555551, 0x4, 0x5555555555555555, x1, 1200, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_3:
+ .fill 151*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/ADDIW.S b/riscof/suite/rv64i_m/I/ADDIW.S
deleted file mode 100644
index c99b0d2834b4ad93015e7e01da4d3cc5b99bf406..0000000000000000000000000000000000000000
--- a/riscof/suite/rv64i_m/I/ADDIW.S
+++ /dev/null
@@ -1,148 +0,0 @@
-# RISC-V Compliance Test RV64I-ADDIW-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV64I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction ADDIW.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV64I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x0000000000000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*64.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",addiw)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_IMM_OP(addiw, x3, x4, 0, 0x0, 0x0, x2, 0, x31)
- TEST_IMM_OP(addiw, x8, x9, 0x1, 0x0, 0x1, x2, 8, x31)
- TEST_IMM_OP(addiw, x11, x12, 0xffffffffffffffff, 0x0, -0x1, x2, 16, x31)
- TEST_IMM_OP(addiw, x13, x14, 0x7ff, 0x0, 0x7ff, x2, 24, x31)
- TEST_IMM_OP(addiw, x15, x16, 0xfffffffffffff800, 0x0, 0x800, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_IMM_OP(addiw, x17, x18, 0x1, 0x1, 0x0, x2, 0, x31)
- TEST_IMM_OP(addiw, x19, x20, 0x2, 0x1, 0x1, x2, 8, x31)
- TEST_IMM_OP(addiw, x21, x22, 0, 0x1, -0x1, x2, 16, x31)
- TEST_IMM_OP(addiw, x23, x24, 0x800, 0x1, 0x7ff, x2, 24, x31)
- TEST_IMM_OP(addiw, x25, x26, 0xfffffffffffff801, 0x1, 0x800, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_IMM_OP(addiw, x27, x28, 0xffffffffffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_IMM_OP(addiw, x29, x30, 0, -0x1, 0x1, x2, 8, x31)
- TEST_IMM_OP(addiw, x21, x3, 0xfffffffffffffffe, -0x1, -0x1, x2, 16, x31)
- TEST_IMM_OP(addiw, x4, x8, 0x7fe, -0x1, 0x7ff, x2, 24, x31)
- TEST_IMM_OP(addiw, x9, x11, 0xfffffffffffff7ff, -0x1, 0x800, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_IMM_OP(addiw, x12, x13, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x2, 0, x31)
- TEST_IMM_OP(addiw, x14, x15, 0, 0x7fffffffffffffff, 0x1, x2, 8, x31)
- TEST_IMM_OP(addiw, x16, x17, 0xfffffffffffffffe, 0x7fffffffffffffff, -0x1, x2, 16, x31)
- TEST_IMM_OP(addiw, x18, x19, 0x7fe, 0x7fffffffffffffff, 0x7ff, x2, 24, x31)
- TEST_IMM_OP(addiw, x20, x21, 0xfffffffffffff7ff, 0x7fffffffffffffff, 0x800, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_IMM_OP(addiw, x22, x23, 0, 0x8000000000000000, 0x0, x2, 0, x31)
- TEST_IMM_OP(addiw, x24, x25, 0x1, 0x8000000000000000, 0x1, x2, 8, x31)
- TEST_IMM_OP(addiw, x26, x27, 0xffffffffffffffff, 0x8000000000000000, -0x1, x2, 16, x31)
- TEST_IMM_OP(addiw, x28, x29, 0x7ff, 0x8000000000000000, 0x7ff, x2, 24, x31)
- TEST_IMM_OP(addiw, x30, x21, 0xfffffffffffff800, 0x8000000000000000, 0x800, x2, 32, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-
-test_1_res:
- .fill 5, 8, -1
-test_2_res:
- .fill 5, 8, -1
-test_3_res:
- .fill 5, 8, -1
-test_4_res:
- .fill 5, 8, -1
-test_5_res:
- .fill 5, 8, -1
-test_6_res:
- .fill 5, 8, -1
-test_7_res:
- .fill 5, 8, -1
-test_8_res:
- .fill 5, 8, -1
-test_9_res:
- .fill 5, 8, -1
-test_10_res:
- .fill 5, 8, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/ADDW.S b/riscof/suite/rv64i_m/I/ADDW.S
deleted file mode 100644
index 247d0d79860ddc16129bb8b17d76eedd59e974c3..0000000000000000000000000000000000000000
--- a/riscof/suite/rv64i_m/I/ADDW.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV64I-ADDW-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV64I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction ADDW.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV64I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x0000000000000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*64.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",addw)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_RR_SRC2(addw, x3, x4, 0, 0x0, 0x0, x2, 0, x31)
- TEST_RR_SRC2(addw, x8, x9, 0x1, 0x0, 0x1, x2, 8, x31)
- TEST_RR_SRC2(addw, x11, x12, 0xffffffffffffffff, 0x0, -0x1, x2, 16, x31)
- TEST_RR_SRC2(addw, x13, x14, 0xffffffffffffffff, 0x0, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(addw, x15, x16, 0, 0x0, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_RR_SRC2(addw, x17, x18, 0x1, 0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(addw, x19, x20, 0x2, 0x1, 0x1, x2, 8, x31)
- TEST_RR_SRC2(addw, x21, x22, 0, 0x1, -0x1, x2, 16, x31)
- TEST_RR_SRC2(addw, x23, x24, 0, 0x1, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(addw, x25, x26, 0x1, 0x1, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_RR_SRC2(addw, x27, x28, 0xffffffffffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(addw, x29, x30, 0, -0x1, 0x1, x2, 8, x31)
- TEST_RR_SRC2(addw, x21, x3, 0xfffffffffffffffe, -0x1, -0x1, x2, 16, x31)
- TEST_RR_SRC2(addw, x4, x8, 0xfffffffffffffffe, -0x1, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(addw, x9, x11, 0xffffffffffffffff, -0x1, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_SRC2(addw, x12, x13, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x2, 0, x31)
- TEST_RR_SRC2(addw, x14, x15, 0, 0x7fffffffffffffff, 0x1, x2, 8, x31)
- TEST_RR_SRC2(addw, x16, x17, 0xfffffffffffffffe, 0x7fffffffffffffff, -0x1, x2, 16, x31)
- TEST_RR_SRC2(addw, x18, x19, 0xfffffffffffffffe, 0x7fffffffffffffff, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(addw, x20, x21, 0xffffffffffffffff, 0x7fffffffffffffff, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_RR_SRC2(addw, x22, x23, 0, 0x8000000000000000, 0x0, x2, 0, x31)
- TEST_RR_SRC2(addw, x24, x25, 0x1, 0x8000000000000000, 0x1, x2, 8, x31)
- TEST_RR_SRC2(addw, x26, x27, 0xffffffffffffffff, 0x8000000000000000, -0x1, x2, 16, x31)
- TEST_RR_SRC2(addw, x28, x29, 0xffffffffffffffff, 0x8000000000000000, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(addw, x30, x21, 0, 0x8000000000000000, 0x8000000000000000, x2, 32, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 8, -1
-test_2_res:
- .fill 5, 8, -1
-test_3_res:
- .fill 5, 8, -1
-test_4_res:
- .fill 5, 8, -1
-test_5_res:
- .fill 5, 8, -1
-test_6_res:
- .fill 5, 8, -1
-test_7_res:
- .fill 5, 8, -1
-test_8_res:
- .fill 5, 8, -1
-test_9_res:
- .fill 5, 8, -1
-test_10_res:
- .fill 5, 8, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/SLLIW.S b/riscof/suite/rv64i_m/I/SLLIW.S
deleted file mode 100644
index 54aa0004f2e77f37e776e6eee92f661f93db72af..0000000000000000000000000000000000000000
--- a/riscof/suite/rv64i_m/I/SLLIW.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV64I-SLLIW-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV64I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction SLLIW.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV64I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x0000000000000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*64.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",slliw)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_IMM_OP(slliw, x3, x4, 0, 0x0, 0x0, x2, 0, x31)
- TEST_IMM_OP(slliw, x8, x9, 0, 0x0, 0x1, x2, 8, x31)
- TEST_IMM_OP(slliw, x11, x12, 0, 0x0, 0xf, x2, 16, x31)
- TEST_IMM_OP(slliw, x13, x14, 0, 0x0, 0x10, x2, 24, x31)
- TEST_IMM_OP(slliw, x15, x16, 0, 0x0, 0x1f, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_IMM_OP(slliw, x17, x18, 0x1, 0x1, 0x0, x2, 0, x31)
- TEST_IMM_OP(slliw, x19, x20, 0x2, 0x1, 0x1, x2, 8, x31)
- TEST_IMM_OP(slliw, x21, x22, 0x8000, 0x1, 0xf, x2, 16, x31)
- TEST_IMM_OP(slliw, x23, x24, 0x10000, 0x1, 0x10, x2, 24, x31)
- TEST_IMM_OP(slliw, x25, x26, 0xffffffff80000000, 0x1, 0x1f, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_IMM_OP(slliw, x27, x28, 0xffffffffffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_IMM_OP(slliw, x29, x30, 0xfffffffffffffffe, -0x1, 0x1, x2, 8, x31)
- TEST_IMM_OP(slliw, x21, x3, 0xffffffffffff8000, -0x1, 0xf, x2, 16, x31)
- TEST_IMM_OP(slliw, x4, x8, 0xffffffffffff0000, -0x1, 0x10, x2, 24, x31)
- TEST_IMM_OP(slliw, x9, x11, 0xffffffff80000000, -0x1, 0x1f, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_IMM_OP(slliw, x12, x13, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x2, 0, x31)
- TEST_IMM_OP(slliw, x14, x15, 0xfffffffffffffffe, 0x7fffffffffffffff, 0x1, x2, 8, x31)
- TEST_IMM_OP(slliw, x16, x17, 0xffffffffffff8000, 0x7fffffffffffffff, 0xf, x2, 16, x31)
- TEST_IMM_OP(slliw, x18, x19, 0xffffffffffff0000, 0x7fffffffffffffff, 0x10, x2, 24, x31)
- TEST_IMM_OP(slliw, x20, x21, 0xffffffff80000000, 0x7fffffffffffffff, 0x1f, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_IMM_OP(slliw, x22, x23, 0, 0x8000000000000000, 0x0, x2, 0, x31)
- TEST_IMM_OP(slliw, x24, x25, 0, 0x8000000000000000, 0x1, x2, 8, x31)
- TEST_IMM_OP(slliw, x26, x27, 0, 0x8000000000000000, 0xf, x2, 16, x31)
- TEST_IMM_OP(slliw, x28, x29, 0, 0x8000000000000000, 0x10, x2, 24, x31)
- TEST_IMM_OP(slliw, x30, x21, 0, 0x8000000000000000, 0x1f, x2, 32, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 8, -1
-test_2_res:
- .fill 5, 8, -1
-test_3_res:
- .fill 5, 8, -1
-test_4_res:
- .fill 5, 8, -1
-test_5_res:
- .fill 5, 8, -1
-test_6_res:
- .fill 5, 8, -1
-test_7_res:
- .fill 5, 8, -1
-test_8_res:
- .fill 5, 8, -1
-test_9_res:
- .fill 5, 8, -1
-test_10_res:
- .fill 5, 8, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/SLLW.S b/riscof/suite/rv64i_m/I/SLLW.S
deleted file mode 100644
index f11a2b4db98d1d7efb103e62092fa1c2a47de5e8..0000000000000000000000000000000000000000
--- a/riscof/suite/rv64i_m/I/SLLW.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV64I-SLLW-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV64I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction SLLW.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV64I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x0000000000000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*64.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",sllw)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_RR_SRC2(sllw, x3, x4, 0, 0x0, 0x0, x2, 0, x31)
- TEST_RR_SRC2(sllw, x8, x9, 0, 0x0, 0x1, x2, 8, x31)
- TEST_RR_SRC2(sllw, x11, x12, 0, 0x0, -0x1, x2, 16, x31)
- TEST_RR_SRC2(sllw, x13, x14, 0, 0x0, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(sllw, x15, x16, 0, 0x0, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_RR_SRC2(sllw, x17, x18, 0x1, 0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(sllw, x19, x20, 0x2, 0x1, 0x1, x2, 8, x31)
- TEST_RR_SRC2(sllw, x21, x22, 0xffffffff80000000, 0x1, -0x1, x2, 16, x31)
- TEST_RR_SRC2(sllw, x23, x24, 0xffffffff80000000, 0x1, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(sllw, x25, x26, 0x1, 0x1, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_RR_SRC2(sllw, x27, x28, 0xffffffffffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(sllw, x29, x30, 0xfffffffffffffffe, -0x1, 0x1, x2, 8, x31)
- TEST_RR_SRC2(sllw, x21, x3, 0xffffffff80000000, -0x1, -0x1, x2, 16, x31)
- TEST_RR_SRC2(sllw, x4, x8, 0xffffffff80000000, -0x1, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(sllw, x9, x11, 0xffffffffffffffff, -0x1, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_SRC2(sllw, x12, x13, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x2, 0, x31)
- TEST_RR_SRC2(sllw, x14, x15, 0xfffffffffffffffe, 0x7fffffffffffffff, 0x1, x2, 8, x31)
- TEST_RR_SRC2(sllw, x16, x17, 0xffffffff80000000, 0x7fffffffffffffff, -0x1, x2, 16, x31)
- TEST_RR_SRC2(sllw, x18, x19, 0xffffffff80000000, 0x7fffffffffffffff, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(sllw, x20, x21, 0xffffffffffffffff, 0x7fffffffffffffff, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_RR_SRC2(sllw, x22, x23, 0, 0x8000000000000000, 0x0, x2, 0, x31)
- TEST_RR_SRC2(sllw, x24, x25, 0, 0x8000000000000000, 0x1, x2, 8, x31)
- TEST_RR_SRC2(sllw, x26, x27, 0, 0x8000000000000000, -0x1, x2, 16, x31)
- TEST_RR_SRC2(sllw, x28, x29, 0, 0x8000000000000000, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(sllw, x30, x21, 0, 0x8000000000000000, 0x8000000000000000, x2, 32, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 8, -1
-test_2_res:
- .fill 5, 8, -1
-test_3_res:
- .fill 5, 8, -1
-test_4_res:
- .fill 5, 8, -1
-test_5_res:
- .fill 5, 8, -1
-test_6_res:
- .fill 5, 8, -1
-test_7_res:
- .fill 5, 8, -1
-test_8_res:
- .fill 5, 8, -1
-test_9_res:
- .fill 5, 8, -1
-test_10_res:
- .fill 5, 8, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/SRAIW.S b/riscof/suite/rv64i_m/I/SRAIW.S
deleted file mode 100644
index 24dbab29e777fbcfe7f970776eab32cd266ebc84..0000000000000000000000000000000000000000
--- a/riscof/suite/rv64i_m/I/SRAIW.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV64I-SRAIW-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV64I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction SRAIW.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV64I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x0000000000000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*64.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",sraiw)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_IMM_OP(sraiw, x3, x4, 0, 0x0, 0x0, x2, 0, x31)
- TEST_IMM_OP(sraiw, x8, x9, 0, 0x0, 0x1, x2, 8, x31)
- TEST_IMM_OP(sraiw, x11, x12, 0, 0x0, 0xf, x2, 16, x31)
- TEST_IMM_OP(sraiw, x13, x14, 0, 0x0, 0x10, x2, 24, x31)
- TEST_IMM_OP(sraiw, x15, x16, 0, 0x0, 0x1f, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_IMM_OP(sraiw, x17, x18, 0x1, 0x1, 0x0, x2, 0, x31)
- TEST_IMM_OP(sraiw, x19, x20, 0, 0x1, 0x1, x2, 8, x31)
- TEST_IMM_OP(sraiw, x21, x22, 0, 0x1, 0xf, x2, 16, x31)
- TEST_IMM_OP(sraiw, x23, x24, 0, 0x1, 0x10, x2, 24, x31)
- TEST_IMM_OP(sraiw, x25, x26, 0, 0x1, 0x1f, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_IMM_OP(sraiw, x27, x28, 0xffffffffffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_IMM_OP(sraiw, x29, x30, 0xffffffffffffffff, -0x1, 0x1, x2, 8, x31)
- TEST_IMM_OP(sraiw, x21, x3, 0xffffffffffffffff, -0x1, 0xf, x2, 16, x31)
- TEST_IMM_OP(sraiw, x4, x8, 0xffffffffffffffff, -0x1, 0x10, x2, 24, x31)
- TEST_IMM_OP(sraiw, x9, x11, 0xffffffffffffffff, -0x1, 0x1f, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_IMM_OP(sraiw, x12, x13, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x2, 0, x31)
- TEST_IMM_OP(sraiw, x14, x15, 0xffffffffffffffff, 0x7fffffffffffffff, 0x1, x2, 8, x31)
- TEST_IMM_OP(sraiw, x16, x17, 0xffffffffffffffff, 0x7fffffffffffffff, 0xf, x2, 16, x31)
- TEST_IMM_OP(sraiw, x18, x19, 0xffffffffffffffff, 0x7fffffffffffffff, 0x10, x2, 24, x31)
- TEST_IMM_OP(sraiw, x20, x21, 0xffffffffffffffff, 0x7fffffffffffffff, 0x1f, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_IMM_OP(sraiw, x22, x23, 0, 0x8000000000000000, 0x0, x2, 0, x31)
- TEST_IMM_OP(sraiw, x24, x25, 0, 0x8000000000000000, 0x1, x2, 8, x31)
- TEST_IMM_OP(sraiw, x26, x27, 0, 0x8000000000000000, 0xf, x2, 16, x31)
- TEST_IMM_OP(sraiw, x28, x29, 0, 0x8000000000000000, 0x10, x2, 24, x31)
- TEST_IMM_OP(sraiw, x30, x21, 0, 0x8000000000000000, 0x1f, x2, 32, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 8, -1
-test_2_res:
- .fill 5, 8, -1
-test_3_res:
- .fill 5, 8, -1
-test_4_res:
- .fill 5, 8, -1
-test_5_res:
- .fill 5, 8, -1
-test_6_res:
- .fill 5, 8, -1
-test_7_res:
- .fill 5, 8, -1
-test_8_res:
- .fill 5, 8, -1
-test_9_res:
- .fill 5, 8, -1
-test_10_res:
- .fill 5, 8, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/SRAW.S b/riscof/suite/rv64i_m/I/SRAW.S
deleted file mode 100644
index 702011b1c92d0500d4b46b76f31f737bb5bba041..0000000000000000000000000000000000000000
--- a/riscof/suite/rv64i_m/I/SRAW.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV64I-SRAW-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV64I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction SRAW.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV64I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x0000000000000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*64.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",sraw)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_RR_SRC2(sraw, x3, x4, 0, 0x0, 0x0, x2, 0, x31)
- TEST_RR_SRC2(sraw, x8, x9, 0, 0x0, 0x1, x2, 8, x31)
- TEST_RR_SRC2(sraw, x11, x12, 0, 0x0, -0x1, x2, 16, x31)
- TEST_RR_SRC2(sraw, x13, x14, 0, 0x0, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(sraw, x15, x16, 0, 0x0, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_RR_SRC2(sraw, x17, x18, 0x1, 0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(sraw, x19, x20, 0, 0x1, 0x1, x2, 8, x31)
- TEST_RR_SRC2(sraw, x21, x22, 0, 0x1, -0x1, x2, 16, x31)
- TEST_RR_SRC2(sraw, x23, x24, 0, 0x1, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(sraw, x25, x26, 0x1, 0x1, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_RR_SRC2(sraw, x27, x28, 0xffffffffffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(sraw, x29, x30, 0xffffffffffffffff, -0x1, 0x1, x2, 8, x31)
- TEST_RR_SRC2(sraw, x21, x3, 0xffffffffffffffff, -0x1, -0x1, x2, 16, x31)
- TEST_RR_SRC2(sraw, x4, x8, 0xffffffffffffffff, -0x1, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(sraw, x9, x11, 0xffffffffffffffff, -0x1, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_SRC2(sraw, x12, x13, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x2, 0, x31)
- TEST_RR_SRC2(sraw, x14, x15, 0xffffffffffffffff, 0x7fffffffffffffff, 0x1, x2, 8, x31)
- TEST_RR_SRC2(sraw, x16, x17, 0xffffffffffffffff, 0x7fffffffffffffff, -0x1, x2, 16, x31)
- TEST_RR_SRC2(sraw, x18, x19, 0xffffffffffffffff, 0x7fffffffffffffff, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(sraw, x20, x21, 0xffffffffffffffff, 0x7fffffffffffffff, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_RR_SRC2(sraw, x22, x23, 0, 0x8000000000000000, 0x0, x2, 0, x31)
- TEST_RR_SRC2(sraw, x24, x25, 0, 0x8000000000000000, 0x1, x2, 8, x31)
- TEST_RR_SRC2(sraw, x26, x27, 0, 0x8000000000000000, -0x1, x2, 16, x31)
- TEST_RR_SRC2(sraw, x28, x29, 0, 0x8000000000000000, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(sraw, x30, x21, 0, 0x8000000000000000, 0x8000000000000000, x2, 32, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 8, -1
-test_2_res:
- .fill 5, 8, -1
-test_3_res:
- .fill 5, 8, -1
-test_4_res:
- .fill 5, 8, -1
-test_5_res:
- .fill 5, 8, -1
-test_6_res:
- .fill 5, 8, -1
-test_7_res:
- .fill 5, 8, -1
-test_8_res:
- .fill 5, 8, -1
-test_9_res:
- .fill 5, 8, -1
-test_10_res:
- .fill 5, 8, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/SRLIW.S b/riscof/suite/rv64i_m/I/SRLIW.S
deleted file mode 100644
index 6397e674d43d65fa8dfc11af485c69c5b33df163..0000000000000000000000000000000000000000
--- a/riscof/suite/rv64i_m/I/SRLIW.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV64I-SRLIW-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV64I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction SRLIW.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV64I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x0000000000000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*64.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",srliw)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_IMM_OP(srliw, x3, x4, 0, 0x0, 0x0, x2, 0, x31)
- TEST_IMM_OP(srliw, x8, x9, 0, 0x0, 0x1, x2, 8, x31)
- TEST_IMM_OP(srliw, x11, x12, 0, 0x0, 0xf, x2, 16, x31)
- TEST_IMM_OP(srliw, x13, x14, 0, 0x0, 0x10, x2, 24, x31)
- TEST_IMM_OP(srliw, x15, x16, 0, 0x0, 0x1f, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_IMM_OP(srliw, x17, x18, 0x1, 0x1, 0x0, x2, 0, x31)
- TEST_IMM_OP(srliw, x19, x20, 0, 0x1, 0x1, x2, 8, x31)
- TEST_IMM_OP(srliw, x21, x22, 0, 0x1, 0xf, x2, 16, x31)
- TEST_IMM_OP(srliw, x23, x24, 0, 0x1, 0x10, x2, 24, x31)
- TEST_IMM_OP(srliw, x25, x26, 0, 0x1, 0x1f, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_IMM_OP(srliw, x27, x28, 0xffffffffffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_IMM_OP(srliw, x29, x30, 0x7fffffff, -0x1, 0x1, x2, 8, x31)
- TEST_IMM_OP(srliw, x21, x3, 0x1ffff, -0x1, 0xf, x2, 16, x31)
- TEST_IMM_OP(srliw, x4, x8, 0xffff, -0x1, 0x10, x2, 24, x31)
- TEST_IMM_OP(srliw, x9, x11, 0x1, -0x1, 0x1f, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_IMM_OP(srliw, x12, x13, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x2, 0, x31)
- TEST_IMM_OP(srliw, x14, x15, 0x7fffffff, 0x7fffffffffffffff, 0x1, x2, 8, x31)
- TEST_IMM_OP(srliw, x16, x17, 0x1ffff, 0x7fffffffffffffff, 0xf, x2, 16, x31)
- TEST_IMM_OP(srliw, x18, x19, 0xffff, 0x7fffffffffffffff, 0x10, x2, 24, x31)
- TEST_IMM_OP(srliw, x20, x21, 0x1, 0x7fffffffffffffff, 0x1f, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_IMM_OP(srliw, x22, x23, 0, 0x8000000000000000, 0x0, x2, 0, x31)
- TEST_IMM_OP(srliw, x24, x25, 0, 0x8000000000000000, 0x1, x2, 8, x31)
- TEST_IMM_OP(srliw, x26, x27, 0, 0x8000000000000000, 0xf, x2, 16, x31)
- TEST_IMM_OP(srliw, x28, x29, 0, 0x8000000000000000, 0x10, x2, 24, x31)
- TEST_IMM_OP(srliw, x30, x21, 0, 0x8000000000000000, 0x1f, x2, 32, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 8, -1
-test_2_res:
- .fill 5, 8, -1
-test_3_res:
- .fill 5, 8, -1
-test_4_res:
- .fill 5, 8, -1
-test_5_res:
- .fill 5, 8, -1
-test_6_res:
- .fill 5, 8, -1
-test_7_res:
- .fill 5, 8, -1
-test_8_res:
- .fill 5, 8, -1
-test_9_res:
- .fill 5, 8, -1
-test_10_res:
- .fill 5, 8, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/SRLW.S b/riscof/suite/rv64i_m/I/SRLW.S
deleted file mode 100644
index f8cde19c3e68952e0e5ad1d0c8ea6d6db769f8a8..0000000000000000000000000000000000000000
--- a/riscof/suite/rv64i_m/I/SRLW.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV64I-SRLW-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV64I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction SRLW.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV64I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x0000000000000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*64.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",srlw)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_RR_SRC2(srlw, x3, x4, 0, 0x0, 0x0, x2, 0, x31)
- TEST_RR_SRC2(srlw, x8, x9, 0, 0x0, 0x1, x2, 8, x31)
- TEST_RR_SRC2(srlw, x11, x12, 0, 0x0, -0x1, x2, 16, x31)
- TEST_RR_SRC2(srlw, x13, x14, 0, 0x0, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(srlw, x15, x16, 0, 0x0, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_RR_SRC2(srlw, x17, x18, 0x1, 0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(srlw, x19, x20, 0, 0x1, 0x1, x2, 8, x31)
- TEST_RR_SRC2(srlw, x21, x22, 0, 0x1, -0x1, x2, 16, x31)
- TEST_RR_SRC2(srlw, x23, x24, 0, 0x1, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(srlw, x25, x26, 0x1, 0x1, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_RR_SRC2(srlw, x27, x28, 0xffffffffffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(srlw, x29, x30, 0x7fffffff, -0x1, 0x1, x2, 8, x31)
- TEST_RR_SRC2(srlw, x21, x3, 0x1, -0x1, -0x1, x2, 16, x31)
- TEST_RR_SRC2(srlw, x4, x8, 0x1, -0x1, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(srlw, x9, x11, 0xffffffffffffffff, -0x1, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_SRC2(srlw, x12, x13, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x2, 0, x31)
- TEST_RR_SRC2(srlw, x14, x15, 0x7fffffff, 0x7fffffffffffffff, 0x1, x2, 8, x31)
- TEST_RR_SRC2(srlw, x16, x17, 0x1, 0x7fffffffffffffff, -0x1, x2, 16, x31)
- TEST_RR_SRC2(srlw, x18, x19, 0x1, 0x7fffffffffffffff, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(srlw, x20, x21, 0xffffffffffffffff, 0x7fffffffffffffff, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_RR_SRC2(srlw, x22, x23, 0, 0x8000000000000000, 0x0, x2, 0, x31)
- TEST_RR_SRC2(srlw, x24, x25, 0, 0x8000000000000000, 0x1, x2, 8, x31)
- TEST_RR_SRC2(srlw, x26, x27, 0, 0x8000000000000000, -0x1, x2, 16, x31)
- TEST_RR_SRC2(srlw, x28, x29, 0, 0x8000000000000000, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(srlw, x30, x21, 0, 0x8000000000000000, 0x8000000000000000, x2, 32, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 8, -1
-test_2_res:
- .fill 5, 8, -1
-test_3_res:
- .fill 5, 8, -1
-test_4_res:
- .fill 5, 8, -1
-test_5_res:
- .fill 5, 8, -1
-test_6_res:
- .fill 5, 8, -1
-test_7_res:
- .fill 5, 8, -1
-test_8_res:
- .fill 5, 8, -1
-test_9_res:
- .fill 5, 8, -1
-test_10_res:
- .fill 5, 8, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/SUBW.S b/riscof/suite/rv64i_m/I/SUBW.S
deleted file mode 100644
index 9c8188f216c952b8e8cbcd57b60fc33ea3ca06d0..0000000000000000000000000000000000000000
--- a/riscof/suite/rv64i_m/I/SUBW.S
+++ /dev/null
@@ -1,147 +0,0 @@
-# RISC-V Compliance Test RV64I-SUBW-01
-#
-# Copyright (c) 2018, Imperas Software Ltd.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# * Neither the name of the Imperas Software Ltd. nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Specification: RV64I Base Integer Instruction Set, Version 2.0
-# Description: Testing instruction SUBW.
-
-#include "compliance_test.h"
-#include "compliance_model.h"
-
-RVTEST_ISA("RV64I")
-
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
-
-
- RVMODEL_IO_INIT
- RVMODEL_IO_ASSERT_GPR_EQ(x31, x0, 0x0000000000000000)
- RVMODEL_IO_WRITE_STR(x31, "Test Begin\n")
-
-#ifdef TEST_CASE_1
- RVTEST_CASE(1,"// check ISA:=regex(.*64.*); check ISA:=regex(.*I.*); def TEST_CASE_1=True",subw)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
-
- # address for test results
- la x2, test_1_res
-
- TEST_RR_SRC2(subw, x3, x4, 0, 0x0, 0x0, x2, 0, x31)
- TEST_RR_SRC2(subw, x8, x9, 0xffffffffffffffff, 0x0, 0x1, x2, 8, x31)
- TEST_RR_SRC2(subw, x11, x12, 0x1, 0x0, -0x1, x2, 16, x31)
- TEST_RR_SRC2(subw, x13, x14, 0x1, 0x0, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(subw, x15, x16, 0, 0x0, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
-
- # address for test results
- la x2, test_2_res
-
- TEST_RR_SRC2(subw, x17, x18, 0x1, 0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(subw, x19, x20, 0, 0x1, 0x1, x2, 8, x31)
- TEST_RR_SRC2(subw, x21, x22, 0x2, 0x1, -0x1, x2, 16, x31)
- TEST_RR_SRC2(subw, x23, x24, 0x2, 0x1, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(subw, x25, x26, 0x1, 0x1, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
-
- # address for test results
- la x2, test_3_res
-
- TEST_RR_SRC2(subw, x27, x28, 0xffffffffffffffff, -0x1, 0x0, x2, 0, x31)
- TEST_RR_SRC2(subw, x29, x30, 0xfffffffffffffffe, -0x1, 0x1, x2, 8, x31)
- TEST_RR_SRC2(subw, x21, x3, 0, -0x1, -0x1, x2, 16, x31)
- TEST_RR_SRC2(subw, x4, x8, 0, -0x1, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(subw, x9, x11, 0xffffffffffffffff, -0x1, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
-
- # address for test results
- la x2, test_4_res
-
- TEST_RR_SRC2(subw, x12, x13, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x2, 0, x31)
- TEST_RR_SRC2(subw, x14, x15, 0xfffffffffffffffe, 0x7fffffffffffffff, 0x1, x2, 8, x31)
- TEST_RR_SRC2(subw, x16, x17, 0, 0x7fffffffffffffff, -0x1, x2, 16, x31)
- TEST_RR_SRC2(subw, x18, x19, 0, 0x7fffffffffffffff, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(subw, x20, x21, 0xffffffffffffffff, 0x7fffffffffffffff, 0x8000000000000000, x2, 32, x31)
-
- # ---------------------------------------------------------------------------------------------
-
- RVMODEL_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
-
- # address for test results
- la x2, test_5_res
-
- TEST_RR_SRC2(subw, x22, x23, 0, 0x8000000000000000, 0x0, x2, 0, x31)
- TEST_RR_SRC2(subw, x24, x25, 0xffffffffffffffff, 0x8000000000000000, 0x1, x2, 8, x31)
- TEST_RR_SRC2(subw, x26, x27, 0x1, 0x8000000000000000, -0x1, x2, 16, x31)
- TEST_RR_SRC2(subw, x28, x29, 0x1, 0x8000000000000000, 0x7fffffffffffffff, x2, 24, x31)
- TEST_RR_SRC2(subw, x30, x21, 0, 0x8000000000000000, 0x8000000000000000, x2, 32, x31)
-
- RVMODEL_IO_WRITE_STR(x31, "Test End\n")
-
- # ---------------------------------------------------------------------------------------------
-
- #endif
- RVMODEL_HALT
-
-RVTEST_CODE_END
-
-# Input data section.
- .data
-
-# Output data section.
-RVMODEL_DATA_BEGIN
-test_1_res:
- .fill 5, 8, -1
-test_2_res:
- .fill 5, 8, -1
-test_3_res:
- .fill 5, 8, -1
-test_4_res:
- .fill 5, 8, -1
-test_5_res:
- .fill 5, 8, -1
-test_6_res:
- .fill 5, 8, -1
-test_7_res:
- .fill 5, 8, -1
-test_8_res:
- .fill 5, 8, -1
-test_9_res:
- .fill 5, 8, -1
-test_10_res:
- .fill 5, 8, -1
-
-RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/add-01.S b/riscof/suite/rv64i_m/I/add-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..e93d0d0b90247f44667493da8eef86450a2948f4
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/add-01.S
@@ -0,0 +1,3479 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the add instruction of the RISC-V I extension for the add covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",add)
+
+RVTEST_SIGBASE( x8,signature_x8_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x0, rs2==x0, rd==x20, rs1_val > 0 and rs2_val > 0, rs1_val == 4, rs1_val==4 and rs2_val==6148914691236517206, rs1_val != rs2_val
+// opcode: add ; op1:x0; op2:x0; dest:x20; op1val:0x0; op2val:0x0
+TEST_RR_OP(add, x20, x0, x0, 0x0, 0x0, 0x0, x8, 0, x16)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x2, rs2==x26, rd==x26, rs1_val > 0 and rs2_val < 0, rs2_val == -1073741825
+// opcode: add ; op1:x2; op2:x26; dest:x26; op1val:0x5; op2val:-0x40000001
+TEST_RR_OP(add, x26, x2, x26, 0xffffffffc0000004, 0x5, -0x40000001, x8, 8, x16)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x22, rs2==x22, rd==x22, rs1_val < 0 and rs2_val < 0, rs1_val == -8388609
+// opcode: add ; op1:x22; op2:x22; dest:x22; op1val:-0x800001; op2val:-0x800001
+TEST_RR_OP(add, x22, x22, x22, 0xfffffffffefffffe, -0x800001, -0x800001, x8, 16, x16)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x26, rs2==x6, rd==x10, rs1_val < 0 and rs2_val > 0, rs1_val == -65, rs2_val == 36028797018963968
+// opcode: add ; op1:x26; op2:x6; dest:x10; op1val:-0x41; op2val:0x80000000000000
+TEST_RR_OP(add, x10, x26, x6, 0x7fffffffffffbf, -0x41, 0x80000000000000, x8, 24, x16)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x27, rs2==x23, rd==x27, rs1_val == rs2_val, rs2_val == 64, rs1_val == 64
+// opcode: add ; op1:x27; op2:x23; dest:x27; op1val:0x40; op2val:0x40
+TEST_RR_OP(add, x27, x27, x23, 0x80, 0x40, 0x40, x8, 32, x16)
+
+inst_5:
+// rs1==x20, rs2==x3, rd==x2, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808
+// opcode: add ; op1:x20; op2:x3; dest:x2; op1val:0x6666666666666665; op2val:-0x8000000000000000
+TEST_RR_OP(add, x2, x20, x3, 0xe666666666666665, 0x6666666666666665, -0x8000000000000000, x8, 40, x16)
+
+inst_6:
+// rs1==x13, rs2==x30, rd==x14, rs2_val == 0, rs1_val == 1
+// opcode: add ; op1:x13; op2:x30; dest:x14; op1val:0x1; op2val:0x0
+TEST_RR_OP(add, x14, x13, x30, 0x1, 0x1, 0x0, x8, 48, x16)
+
+inst_7:
+// rs1==x6, rs2==x10, rd==x7, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807, rs1_val == 131072
+// opcode: add ; op1:x6; op2:x10; dest:x7; op1val:0x20000; op2val:0x7fffffffffffffff
+TEST_RR_OP(add, x7, x6, x10, 0x800000000001ffff, 0x20000, 0x7fffffffffffffff, x8, 56, x16)
+
+inst_8:
+// rs1==x9, rs2==x25, rd==x1, rs2_val == 1, rs1_val == 268435456
+// opcode: add ; op1:x9; op2:x25; dest:x1; op1val:0x10000000; op2val:0x1
+TEST_RR_OP(add, x1, x9, x25, 0x10000001, 0x10000000, 0x1, x8, 64, x16)
+
+inst_9:
+// rs1==x14, rs2==x31, rd==x5, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808, rs2_val == -257
+// opcode: add ; op1:x14; op2:x31; dest:x5; op1val:-0x8000000000000000; op2val:-0x101
+TEST_RR_OP(add, x5, x14, x31, 0x7ffffffffffffeff, -0x8000000000000000, -0x101, x8, 72, x16)
+
+inst_10:
+// rs1==x29, rs2==x1, rd==x19, rs1_val == 0, rs2_val == 8796093022208
+// opcode: add ; op1:x29; op2:x1; dest:x19; op1val:0x0; op2val:0x80000000000
+TEST_RR_OP(add, x19, x29, x1, 0x80000000000, 0x0, 0x80000000000, x8, 80, x16)
+
+inst_11:
+// rs1==x15, rs2==x11, rd==x21, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, rs2_val == -65537
+// opcode: add ; op1:x15; op2:x11; dest:x21; op1val:0x7fffffffffffffff; op2val:-0x10001
+TEST_RR_OP(add, x21, x15, x11, 0x7ffffffffffefffe, 0x7fffffffffffffff, -0x10001, x8, 88, x16)
+
+inst_12:
+// rs1==x3, rs2==x7, rd==x9, rs2_val == 2, rs1_val == -5
+// opcode: add ; op1:x3; op2:x7; dest:x9; op1val:-0x5; op2val:0x2
+TEST_RR_OP(add, x9, x3, x7, 0xfffffffffffffffd, -0x5, 0x2, x8, 96, x16)
+
+inst_13:
+// rs1==x21, rs2==x27, rd==x6, rs2_val == 4, rs1_val == 2305843009213693952
+// opcode: add ; op1:x21; op2:x27; dest:x6; op1val:0x2000000000000000; op2val:0x4
+TEST_RR_OP(add, x6, x21, x27, 0x2000000000000004, 0x2000000000000000, 0x4, x8, 104, x16)
+
+inst_14:
+// rs1==x30, rs2==x13, rd==x23, rs2_val == 8, rs1_val == 137438953472
+// opcode: add ; op1:x30; op2:x13; dest:x23; op1val:0x2000000000; op2val:0x8
+TEST_RR_OP(add, x23, x30, x13, 0x2000000008, 0x2000000000, 0x8, x8, 112, x16)
+
+inst_15:
+// rs1==x10, rs2==x19, rd==x24, rs2_val == 16, rs1_val == -9007199254740993
+// opcode: add ; op1:x10; op2:x19; dest:x24; op1val:-0x20000000000001; op2val:0x10
+TEST_RR_OP(add, x24, x10, x19, 0xffe000000000000f, -0x20000000000001, 0x10, x8, 120, x16)
+
+inst_16:
+// rs1==x1, rs2==x9, rd==x30, rs2_val == 32,
+// opcode: add ; op1:x1; op2:x9; dest:x30; op1val:0x0; op2val:0x20
+TEST_RR_OP(add, x30, x1, x9, 0x20, 0x0, 0x20, x8, 128, x16)
+
+inst_17:
+// rs1==x12, rs2==x4, rd==x13, rs2_val == 128, rs1_val == 576460752303423488
+// opcode: add ; op1:x12; op2:x4; dest:x13; op1val:0x800000000000000; op2val:0x80
+TEST_RR_OP(add, x13, x12, x4, 0x800000000000080, 0x800000000000000, 0x80, x8, 136, x16)
+
+inst_18:
+// rs1==x18, rs2==x17, rd==x0, rs2_val == 256,
+// opcode: add ; op1:x18; op2:x17; dest:x0; op1val:0x1; op2val:0x100
+TEST_RR_OP(add, x0, x18, x17, 0, 0x1, 0x100, x8, 144, x16)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_19:
+// rs1==x19, rs2==x15, rd==x16, rs2_val == 512, rs1_val == 65536
+// opcode: add ; op1:x19; op2:x15; dest:x16; op1val:0x10000; op2val:0x200
+TEST_RR_OP(add, x16, x19, x15, 0x10200, 0x10000, 0x200, x1, 0, x6)
+
+inst_20:
+// rs1==x28, rs2==x20, rd==x4, rs2_val == 1024,
+// opcode: add ; op1:x28; op2:x20; dest:x4; op1val:0x5; op2val:0x400
+TEST_RR_OP(add, x4, x28, x20, 0x405, 0x5, 0x400, x1, 8, x6)
+
+inst_21:
+// rs1==x8, rs2==x28, rd==x12, rs2_val == 2048, rs1_val == -32769
+// opcode: add ; op1:x8; op2:x28; dest:x12; op1val:-0x8001; op2val:0x800
+TEST_RR_OP(add, x12, x8, x28, 0xffffffffffff87ff, -0x8001, 0x800, x1, 16, x6)
+
+inst_22:
+// rs1==x16, rs2==x5, rd==x11, rs2_val == 4096, rs1_val == 2251799813685248
+// opcode: add ; op1:x16; op2:x5; dest:x11; op1val:0x8000000000000; op2val:0x1000
+TEST_RR_OP(add, x11, x16, x5, 0x8000000001000, 0x8000000000000, 0x1000, x1, 24, x6)
+
+inst_23:
+// rs1==x4, rs2==x24, rd==x29, rs2_val == 8192,
+// opcode: add ; op1:x4; op2:x24; dest:x29; op1val:-0xb504f332; op2val:0x2000
+TEST_RR_OP(add, x29, x4, x24, 0xffffffff4afb2cce, -0xb504f332, 0x2000, x1, 32, x6)
+
+inst_24:
+// rs1==x11, rs2==x29, rd==x3, rs2_val == 16384, rs1_val == -9
+// opcode: add ; op1:x11; op2:x29; dest:x3; op1val:-0x9; op2val:0x4000
+TEST_RR_OP(add, x3, x11, x29, 0x3ff7, -0x9, 0x4000, x1, 40, x6)
+
+inst_25:
+// rs1==x7, rs2==x12, rd==x15, rs2_val == 32768,
+// opcode: add ; op1:x7; op2:x12; dest:x15; op1val:0x4; op2val:0x8000
+TEST_RR_OP(add, x15, x7, x12, 0x8004, 0x4, 0x8000, x1, 48, x6)
+
+inst_26:
+// rs1==x17, rs2==x16, rd==x31, rs2_val == 65536,
+// opcode: add ; op1:x17; op2:x16; dest:x31; op1val:-0x4; op2val:0x10000
+TEST_RR_OP(add, x31, x17, x16, 0xfffc, -0x4, 0x10000, x1, 56, x6)
+
+inst_27:
+// rs1==x31, rs2==x18, rd==x17, rs2_val == 131072,
+// opcode: add ; op1:x31; op2:x18; dest:x17; op1val:-0x8000000000000000; op2val:0x20000
+TEST_RR_OP(add, x17, x31, x18, 0x8000000000020000, -0x8000000000000000, 0x20000, x1, 64, x6)
+
+inst_28:
+// rs1==x5, rs2==x21, rd==x8, rs2_val == 262144,
+// opcode: add ; op1:x5; op2:x21; dest:x8; op1val:0x5; op2val:0x40000
+TEST_RR_OP(add, x8, x5, x21, 0x40005, 0x5, 0x40000, x1, 72, x6)
+
+inst_29:
+// rs1==x24, rs2==x2, rd==x18, rs2_val == 524288, rs1_val == -536870913
+// opcode: add ; op1:x24; op2:x2; dest:x18; op1val:-0x20000001; op2val:0x80000
+TEST_RR_OP(add, x18, x24, x2, 0xffffffffe007ffff, -0x20000001, 0x80000, x1, 80, x6)
+
+inst_30:
+// rs1==x23, rs2==x14, rd==x25, rs2_val == 1048576,
+// opcode: add ; op1:x23; op2:x14; dest:x25; op1val:0x5; op2val:0x100000
+TEST_RR_OP(add, x25, x23, x14, 0x100005, 0x5, 0x100000, x1, 88, x6)
+
+inst_31:
+// rs1==x25, rs2==x8, rd==x28, rs2_val == 2097152, rs1_val == -262145
+// opcode: add ; op1:x25; op2:x8; dest:x28; op1val:-0x40001; op2val:0x200000
+TEST_RR_OP(add, x28, x25, x8, 0x1bffff, -0x40001, 0x200000, x1, 96, x6)
+
+inst_32:
+// rs2_val == 4194304, rs1_val == 8
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0x400000
+TEST_RR_OP(add, x12, x10, x11, 0x400008, 0x8, 0x400000, x1, 104, x6)
+
+inst_33:
+// rs2_val == 8388608, rs1_val == -16777217
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0x800000
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffff7fffff, -0x1000001, 0x800000, x1, 112, x6)
+
+inst_34:
+// rs2_val == 16777216, rs1_val == -2251799813685249
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:0x1000000
+TEST_RR_OP(add, x12, x10, x11, 0xfff8000000ffffff, -0x8000000000001, 0x1000000, x1, 120, x6)
+
+inst_35:
+// rs2_val == 33554432, rs1_val == 2199023255552
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:0x2000000
+TEST_RR_OP(add, x12, x10, x11, 0x20002000000, 0x20000000000, 0x2000000, x1, 128, x6)
+
+inst_36:
+// rs2_val == 67108864,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0x4000000
+TEST_RR_OP(add, x12, x10, x11, 0x3fbffff, -0x40001, 0x4000000, x1, 136, x6)
+
+inst_37:
+// rs2_val == 134217728, rs1_val == 2147483648
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0x8000000
+TEST_RR_OP(add, x12, x10, x11, 0x88000000, 0x80000000, 0x8000000, x1, 144, x6)
+
+inst_38:
+// rs2_val == 268435456, rs1_val == 1073741824
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x10000000
+TEST_RR_OP(add, x12, x10, x11, 0x50000000, 0x40000000, 0x10000000, x1, 152, x6)
+
+inst_39:
+// rs2_val == 536870912, rs1_val == 16
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x20000000
+TEST_RR_OP(add, x12, x10, x11, 0x20000010, 0x10, 0x20000000, x1, 160, x6)
+
+inst_40:
+// rs2_val == 1073741824,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x40000000
+TEST_RR_OP(add, x12, x10, x11, 0x3333333373333334, 0x3333333333333334, 0x40000000, x1, 168, x6)
+
+inst_41:
+// rs2_val == 2147483648, rs1_val == 549755813888
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0x80000000
+TEST_RR_OP(add, x12, x10, x11, 0x8080000000, 0x8000000000, 0x80000000, x1, 176, x6)
+
+inst_42:
+// rs2_val == 4294967296, rs1_val == 35184372088832
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:0x100000000
+TEST_RR_OP(add, x12, x10, x11, 0x200100000000, 0x200000000000, 0x100000000, x1, 184, x6)
+
+inst_43:
+// rs2_val == 8589934592, rs1_val == 8192
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0x200000000
+TEST_RR_OP(add, x12, x10, x11, 0x200002000, 0x2000, 0x200000000, x1, 192, x6)
+
+inst_44:
+// rs2_val == 17179869184, rs1_val == -8589934593
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:0x400000000
+TEST_RR_OP(add, x12, x10, x11, 0x1ffffffff, -0x200000001, 0x400000000, x1, 200, x6)
+
+inst_45:
+// rs2_val == 34359738368,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0x800000000
+TEST_RR_OP(add, x12, x10, x11, 0x800002000, 0x2000, 0x800000000, x1, 208, x6)
+
+inst_46:
+// rs2_val == 68719476736, rs1_val == 36028797018963968
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:0x1000000000
+TEST_RR_OP(add, x12, x10, x11, 0x80001000000000, 0x80000000000000, 0x1000000000, x1, 216, x6)
+
+inst_47:
+// rs2_val == 137438953472,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:0x2000000000
+TEST_RR_OP(add, x12, x10, x11, 0x1dffffffff, -0x200000001, 0x2000000000, x1, 224, x6)
+
+inst_48:
+// rs2_val == 274877906944, rs1_val == 6148914691236517205
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x4000000000
+TEST_RR_OP(add, x12, x10, x11, 0x5555559555555555, 0x5555555555555555, 0x4000000000, x1, 232, x6)
+
+inst_49:
+// rs2_val == 549755813888, rs1_val == 8388608
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x8000000000
+TEST_RR_OP(add, x12, x10, x11, 0x8000800000, 0x800000, 0x8000000000, x1, 240, x6)
+
+inst_50:
+// rs2_val == 1099511627776, rs1_val == -274877906945
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0x10000000000
+TEST_RR_OP(add, x12, x10, x11, 0xbfffffffff, -0x4000000001, 0x10000000000, x1, 248, x6)
+
+inst_51:
+// rs2_val == 2199023255552, rs1_val == -33
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x20000000000
+TEST_RR_OP(add, x12, x10, x11, 0x1ffffffffdf, -0x21, 0x20000000000, x1, 256, x6)
+
+inst_52:
+// rs2_val == 4398046511104, rs1_val == 4194304
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x40000000000
+TEST_RR_OP(add, x12, x10, x11, 0x40000400000, 0x400000, 0x40000000000, x1, 264, x6)
+
+inst_53:
+// rs2_val == 17592186044416, rs1_val == 1099511627776
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x100000000000
+TEST_RR_OP(add, x12, x10, x11, 0x110000000000, 0x10000000000, 0x100000000000, x1, 272, x6)
+
+inst_54:
+// rs2_val == 35184372088832, rs1_val == 134217728
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x200000000000
+TEST_RR_OP(add, x12, x10, x11, 0x200008000000, 0x8000000, 0x200000000000, x1, 280, x6)
+
+inst_55:
+// rs2_val == 70368744177664, rs1_val == 72057594037927936
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:0x400000000000
+TEST_RR_OP(add, x12, x10, x11, 0x100400000000000, 0x100000000000000, 0x400000000000, x1, 288, x6)
+
+inst_56:
+// rs2_val == 140737488355328, rs1_val == 562949953421312
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:0x800000000000
+TEST_RR_OP(add, x12, x10, x11, 0x2800000000000, 0x2000000000000, 0x800000000000, x1, 296, x6)
+
+inst_57:
+// rs2_val == 281474976710656, rs1_val == -4503599627370497
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:0x1000000000000
+TEST_RR_OP(add, x12, x10, x11, 0xfff0ffffffffffff, -0x10000000000001, 0x1000000000000, x1, 304, x6)
+
+inst_58:
+// rs2_val == 562949953421312,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:0x2000000000000
+TEST_RR_OP(add, x12, x10, x11, 0xfff1ffffffffffff, -0x10000000000001, 0x2000000000000, x1, 312, x6)
+
+inst_59:
+// rs2_val == 1125899906842624, rs1_val == -2147483649
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:0x4000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x3ffff7fffffff, -0x80000001, 0x4000000000000, x1, 320, x6)
+
+inst_60:
+// rs2_val == 2251799813685248,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0x8000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x8000000002000, 0x2000, 0x8000000000000, x1, 328, x6)
+
+inst_61:
+// rs2_val == 4503599627370496,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:0x10000000000000
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffffffffff, -0x10000000000001, 0x10000000000000, x1, 336, x6)
+
+inst_62:
+// rs2_val == 9007199254740992, rs1_val == 524288
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0x20000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x20000000080000, 0x80000, 0x20000000000000, x1, 344, x6)
+
+inst_63:
+// rs2_val == 18014398509481984, rs1_val == -2
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x40000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x3ffffffffffffe, -0x2, 0x40000000000000, x1, 352, x6)
+
+inst_64:
+// rs2_val == 72057594037927936, rs1_val == -524289
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x100000000000000
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffff7ffff, -0x80001, 0x100000000000000, x1, 360, x6)
+
+inst_65:
+// rs2_val == 144115188075855872, rs1_val == 1152921504606846976
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:0x200000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x1200000000000000, 0x1000000000000000, 0x200000000000000, x1, 368, x6)
+
+inst_66:
+// rs2_val == 288230376151711744,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x8; op2val:0x400000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x3fffffffffffff8, -0x8, 0x400000000000000, x1, 376, x6)
+
+inst_67:
+// rs2_val == 576460752303423488,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x800000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x800000000000004, 0x4, 0x800000000000000, x1, 384, x6)
+
+inst_68:
+// rs2_val == 1152921504606846976,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x1000000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x7666666666666667, 0x6666666666666667, 0x1000000000000000, x1, 392, x6)
+
+inst_69:
+// rs2_val == 2305843009213693952,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x2000000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x1ffffffffff7ffff, -0x80001, 0x2000000000000000, x1, 400, x6)
+
+inst_70:
+// rs2_val == 4611686018427387904,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x4000000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x7333333333333333, 0x3333333333333333, 0x4000000000000000, x1, 408, x6)
+
+inst_71:
+// rs2_val == -2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x2
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffffffffe, 0x0, -0x2, x1, 416, x6)
+
+inst_72:
+// rs2_val == -3, rs1_val == -1125899906842625
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:-0x3
+TEST_RR_OP(add, x12, x10, x11, 0xfffbfffffffffffc, -0x4000000000001, -0x3, x1, 424, x6)
+
+inst_73:
+// rs2_val == -5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555551, 0x5555555555555556, -0x5, x1, 432, x6)
+
+inst_74:
+// rs2_val == -9, rs1_val == -268435457
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:-0x9
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffeffffff6, -0x10000001, -0x9, x1, 440, x6)
+
+inst_75:
+// rs2_val == -17,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x1; op2val:-0x11
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffffffffee, -0x1, -0x11, x1, 448, x6)
+
+inst_76:
+// rs2_val == -33, rs1_val == -1152921504606846977
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:-0x21
+TEST_RR_OP(add, x12, x10, x11, 0xefffffffffffffde, -0x1000000000000001, -0x21, x1, 456, x6)
+
+inst_77:
+// rs2_val == -65,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:-0x41
+TEST_RR_OP(add, x12, x10, x11, 0x1ffffffffffbf, 0x2000000000000, -0x41, x1, 464, x6)
+
+inst_78:
+// rs2_val == -129,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x81
+TEST_RR_OP(add, x12, x10, x11, 0xb504f2b1, 0xb504f332, -0x81, x1, 472, x6)
+
+inst_79:
+// rs2_val == -513, rs1_val == 32
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x201
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffffffe1f, 0x20, -0x201, x1, 480, x6)
+
+inst_80:
+// rs2_val == -1025,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x401
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffffffc1f, 0x20, -0x401, x1, 488, x6)
+
+inst_81:
+// rs2_val == -2049, rs1_val == 256
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x801
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffffff8ff, 0x100, -0x801, x1, 496, x6)
+
+inst_82:
+// rs2_val == -4097,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:-0x1001
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffff7effe, -0x80001, -0x1001, x1, 504, x6)
+
+inst_83:
+// rs2_val == -8193,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:-0x2001
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffffdfff, 0x1000000000000000, -0x2001, x1, 512, x6)
+
+inst_84:
+// rs2_val == -16385,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x4001
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffffffc003, 0x4, -0x4001, x1, 520, x6)
+
+inst_85:
+// rs2_val == -32769,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:-0x8001
+TEST_RR_OP(add, x12, x10, x11, 0xefffffffffff7ffe, -0x1000000000000001, -0x8001, x1, 528, x6)
+
+inst_86:
+// rs2_val == -131073, rs1_val == -65537
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x20001
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffffcfffe, -0x10001, -0x20001, x1, 536, x6)
+
+inst_87:
+// rs2_val == -262145,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:-0x40001
+TEST_RR_OP(add, x12, x10, x11, 0x3bffff, 0x400000, -0x40001, x1, 544, x6)
+
+inst_88:
+// rs2_val == -524289,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:-0x80001
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffef7fffe, -0x1000001, -0x80001, x1, 552, x6)
+
+inst_89:
+// rs2_val == -1048577,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffffffffffff; op2val:-0x100001
+TEST_RR_OP(add, x12, x10, x11, 0x7fffffffffeffffe, 0x7fffffffffffffff, -0x100001, x1, 560, x6)
+
+inst_90:
+// rs2_val == -2097153, rs1_val == -70368744177665
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:-0x200001
+TEST_RR_OP(add, x12, x10, x11, 0xffffbfffffdffffe, -0x400000000001, -0x200001, x1, 568, x6)
+
+inst_91:
+// rs2_val == -4194305, rs1_val == -36028797018963969
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:-0x400001
+TEST_RR_OP(add, x12, x10, x11, 0xff7fffffffbffffe, -0x80000000000001, -0x400001, x1, 576, x6)
+
+inst_92:
+// rs2_val == -8388609, rs1_val == 1048576
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:-0x800001
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffff8fffff, 0x100000, -0x800001, x1, 584, x6)
+
+inst_93:
+// rs2_val == -16777217, rs1_val == 140737488355328
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:-0x1000001
+TEST_RR_OP(add, x12, x10, x11, 0x7ffffeffffff, 0x800000000000, -0x1000001, x1, 592, x6)
+
+inst_94:
+// rs2_val == -33554433, rs1_val == -17592186044417
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:-0x2000001
+TEST_RR_OP(add, x12, x10, x11, 0xffffeffffdfffffe, -0x100000000001, -0x2000001, x1, 600, x6)
+
+inst_95:
+// rs2_val == -67108865,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:-0x4000001
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffc00ffff, 0x10000, -0x4000001, x1, 608, x6)
+
+inst_96:
+// rs2_val == -134217729,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x4; op2val:-0x8000001
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffff7fffffb, -0x4, -0x8000001, x1, 616, x6)
+
+inst_97:
+// rs2_val == -268435457,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:-0x10000001
+TEST_RR_OP(add, x12, x10, x11, 0x7fffefffffff, 0x800000000000, -0x10000001, x1, 624, x6)
+
+inst_98:
+// rs2_val == -536870913,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:-0x20000001
+TEST_RR_OP(add, x12, x10, x11, 0x1fffffffdfffffff, 0x2000000000000000, -0x20000001, x1, 632, x6)
+
+inst_99:
+// rs2_val == -2147483649, rs1_val == -4194305
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:-0x80000001
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff7fbffffe, -0x400001, -0x80000001, x1, 640, x6)
+
+inst_100:
+// rs2_val == -4294967297, rs1_val == 9007199254740992
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:-0x100000001
+TEST_RR_OP(add, x12, x10, x11, 0x1ffffeffffffff, 0x20000000000000, -0x100000001, x1, 648, x6)
+
+inst_101:
+// rs2_val == -8589934593,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:-0x200000001
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffe003fffff, 0x400000, -0x200000001, x1, 656, x6)
+
+inst_102:
+// rs2_val == -17179869185, rs1_val == -144115188075855873
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:-0x400000001
+TEST_RR_OP(add, x12, x10, x11, 0xfdfffffbfffffffe, -0x200000000000001, -0x400000001, x1, 664, x6)
+
+inst_103:
+// rs2_val == -34359738369, rs1_val == 274877906944
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:-0x800000001
+TEST_RR_OP(add, x12, x10, x11, 0x37ffffffff, 0x4000000000, -0x800000001, x1, 672, x6)
+
+inst_104:
+// rs2_val == -68719476737,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x1000000001
+TEST_RR_OP(add, x12, x10, x11, 0xffffffef4afb0ccc, -0xb504f333, -0x1000000001, x1, 680, x6)
+
+inst_105:
+// rs2_val == -137438953473,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x2000000001
+TEST_RR_OP(add, x12, x10, x11, 0xffffffdffffefffe, -0x10001, -0x2000000001, x1, 688, x6)
+
+inst_106:
+// rs2_val == -274877906945,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:-0x4000000001
+TEST_RR_OP(add, x12, x10, x11, 0xffffffbfffffffbe, -0x41, -0x4000000001, x1, 696, x6)
+
+inst_107:
+// rs2_val == -549755813889,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x8000000001
+TEST_RR_OP(add, x12, x10, x11, 0xffffff8000000003, 0x4, -0x8000000001, x1, 704, x6)
+
+inst_108:
+// rs2_val == -1099511627777,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:-0x10000000001
+TEST_RR_OP(add, x12, x10, x11, 0xffffff000000003f, 0x40, -0x10000000001, x1, 712, x6)
+
+inst_109:
+// rs2_val == -2199023255553,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:-0x20000000001
+TEST_RR_OP(add, x12, x10, x11, 0xffeffdfffffffffe, -0x10000000000001, -0x20000000001, x1, 720, x6)
+
+inst_110:
+// rs2_val == -4398046511105,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x40000000001
+TEST_RR_OP(add, x12, x10, x11, 0xfffffc0000000004, 0x5, -0x40000000001, x1, 728, x6)
+
+inst_111:
+// rs2_val == -8796093022209, rs1_val == -8796093022209
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:-0x80000000001
+TEST_RR_OP(add, x12, x10, x11, 0xffffeffffffffffe, -0x80000000001, -0x80000000001, x1, 736, x6)
+
+inst_112:
+// rs2_val == -17592186044417,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:-0x100000000001
+TEST_RR_OP(add, x12, x10, x11, 0xfffff0000000000f, 0x10, -0x100000000001, x1, 744, x6)
+
+inst_113:
+// rs2_val == -35184372088833, rs1_val == -137438953473
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:-0x200000000001
+TEST_RR_OP(add, x12, x10, x11, 0xffffdfdffffffffe, -0x2000000001, -0x200000000001, x1, 752, x6)
+
+inst_114:
+// rs2_val == -70368744177665, rs1_val == 1024
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:-0x400000000001
+TEST_RR_OP(add, x12, x10, x11, 0xffffc000000003ff, 0x400, -0x400000000001, x1, 760, x6)
+
+inst_115:
+// rs2_val == -140737488355329, rs1_val == 67108864
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:-0x800000000001
+TEST_RR_OP(add, x12, x10, x11, 0xffff800003ffffff, 0x4000000, -0x800000000001, x1, 768, x6)
+
+inst_116:
+// rs2_val == -281474976710657,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:-0x1000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xffff003fffffffff, 0x4000000000, -0x1000000000001, x1, 776, x6)
+
+inst_117:
+// rs2_val == -562949953421313,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:-0x2000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xfffe000000001fff, 0x2000, -0x2000000000001, x1, 784, x6)
+
+inst_118:
+// rs2_val == -1125899906842625,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:-0x4000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xfffc003fffffffff, 0x4000000000, -0x4000000000001, x1, 792, x6)
+
+inst_119:
+// rs2_val == -2251799813685249,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:-0x8000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xfff7ffffdffffffe, -0x20000001, -0x8000000000001, x1, 800, x6)
+
+inst_120:
+// rs2_val == -4503599627370497,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:-0x10000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xfff000ffffffffff, 0x10000000000, -0x10000000000001, x1, 808, x6)
+
+inst_121:
+// rs2_val == -9007199254740993,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x20000000000001
+TEST_RR_OP(add, x12, x10, x11, 0x5535555555555553, 0x5555555555555554, -0x20000000000001, x1, 816, x6)
+
+inst_122:
+// rs2_val == -18014398509481985,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x40000000000001
+TEST_RR_OP(add, x12, x10, x11, 0x5515555555555554, 0x5555555555555555, -0x40000000000001, x1, 824, x6)
+
+inst_123:
+// rs2_val == -36028797018963969,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:-0x80000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xff7ffffffff7fffe, -0x80001, -0x80000000000001, x1, 832, x6)
+
+inst_124:
+// rs2_val == -72057594037927937,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x100000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xff00000000000004, 0x5, -0x100000000000001, x1, 840, x6)
+
+inst_125:
+// rs2_val == -144115188075855873,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x200000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xa8aaaaaaaaaaaaaa, -0x5555555555555555, -0x200000000000001, x1, 848, x6)
+
+inst_126:
+// rs2_val == -288230376151711745,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x400000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xfbffffffffffffff, 0x0, -0x400000000000001, x1, 856, x6)
+
+inst_127:
+// rs2_val == -576460752303423489,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x800000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xf7ffffffffffffde, -0x21, -0x800000000000001, x1, 864, x6)
+
+inst_128:
+// rs2_val == -1152921504606846977,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x1000000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xf00000000000001f, 0x20, -0x1000000000000001, x1, 872, x6)
+
+inst_129:
+// rs2_val == -2305843009213693953,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x2000000000000001
+TEST_RR_OP(add, x12, x10, x11, 0x8aaaaaaaaaaaaaaa, -0x5555555555555555, -0x2000000000000001, x1, 880, x6)
+
+inst_130:
+// rs2_val == -4611686018427387905, rs1_val == 512
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:-0x4000000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xc0000000000001ff, 0x200, -0x4000000000000001, x1, 888, x6)
+
+inst_131:
+// rs2_val == 6148914691236517205, rs1_val==7378697629483820646 and rs2_val==6148914691236517205
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x6666666666666666, 0x5555555555555555, x1, 896, x6)
+
+inst_132:
+// rs2_val == -6148914691236517206, rs1_val == 18014398509481984
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaeaaaaaaaaaaaaa, 0x40000000000000, -0x5555555555555556, x1, 904, x6)
+
+inst_133:
+// rs1_val == 2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x10000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x10000000000002, 0x2, 0x10000000000000, x1, 912, x6)
+
+inst_134:
+// rs1_val == 128,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0x10000000000
+TEST_RR_OP(add, x12, x10, x11, 0x10000000080, 0x80, 0x10000000000, x1, 920, x6)
+
+inst_135:
+// rs1_val == 2048,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x80000001
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff800007ff, 0x800, -0x80000001, x1, 928, x6)
+
+inst_136:
+// rs1_val == 4096,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x4000000
+TEST_RR_OP(add, x12, x10, x11, 0x4001000, 0x1000, 0x4000000, x1, 936, x6)
+
+inst_137:
+// rs1_val == 16384,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:-0x100001
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffff03fff, 0x4000, -0x100001, x1, 944, x6)
+
+inst_138:
+// rs1_val == 32768,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x6
+TEST_RR_OP(add, x12, x10, x11, 0x7ffa, 0x8000, -0x6, x1, 952, x6)
+
+inst_139:
+// rs1_val == 262144,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:-0x40000001
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffc003ffff, 0x40000, -0x40000001, x1, 960, x6)
+
+inst_140:
+// rs1_val == 2097152,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0xb524f334, 0x200000, 0xb504f334, x1, 968, x6)
+
+inst_141:
+// rs1_val == 16777216,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:-0x4001
+TEST_RR_OP(add, x12, x10, x11, 0xffbfff, 0x1000000, -0x4001, x1, 976, x6)
+
+inst_142:
+// rs1_val == 33554432,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:-0x80000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xff80000001ffffff, 0x2000000, -0x80000000000001, x1, 984, x6)
+
+inst_143:
+// rs1_val == 536870912,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x80
+TEST_RR_OP(add, x12, x10, x11, 0x20000080, 0x20000000, 0x80, x1, 992, x6)
+
+inst_144:
+// rs1_val == 4294967296,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:-0x8000000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x8000000100000000, 0x100000000, -0x8000000000000000, x1, 1000, x6)
+
+inst_145:
+// rs1_val == 8589934592,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:0x4000000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x4000000200000000, 0x200000000, 0x4000000000000000, x1, 1008, x6)
+
+inst_146:
+// rs1_val == 17179869184,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:0x80000
+TEST_RR_OP(add, x12, x10, x11, 0x400080000, 0x400000000, 0x80000, x1, 1016, x6)
+
+inst_147:
+// rs1_val == 34359738368,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:0x20000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x20000800000000, 0x800000000, 0x20000000000000, x1, 1024, x6)
+
+inst_148:
+// rs1_val == 68719476736,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:-0x10000001
+TEST_RR_OP(add, x12, x10, x11, 0xfefffffff, 0x1000000000, -0x10000001, x1, 1032, x6)
+
+inst_149:
+// rs1_val == 4398046511104,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:0x200
+TEST_RR_OP(add, x12, x10, x11, 0x40000000200, 0x40000000000, 0x200, x1, 1040, x6)
+
+inst_150:
+// rs1_val == 8796093022208,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:0x4000000
+TEST_RR_OP(add, x12, x10, x11, 0x80004000000, 0x80000000000, 0x4000000, x1, 1048, x6)
+
+inst_151:
+// rs1_val == 17592186044416,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:0x80000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x80100000000000, 0x100000000000, 0x80000000000000, x1, 1056, x6)
+
+inst_152:
+// rs1_val == 70368744177664,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:0x800000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x800400000000000, 0x400000000000, 0x800000000000000, x1, 1064, x6)
+
+inst_153:
+// rs1_val == 281474976710656,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0x40
+TEST_RR_OP(add, x12, x10, x11, 0x1000000000040, 0x1000000000000, 0x40, x1, 1072, x6)
+
+inst_154:
+// rs1_val == 1125899906842624,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:0x400000
+TEST_RR_OP(add, x12, x10, x11, 0x4000000400000, 0x4000000000000, 0x400000, x1, 1080, x6)
+
+inst_155:
+// rs1_val == 4503599627370496,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:0x40
+TEST_RR_OP(add, x12, x10, x11, 0x10000000000040, 0x10000000000000, 0x40, x1, 1088, x6)
+
+inst_156:
+// rs1_val == 144115188075855872,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:-0x10000001
+TEST_RR_OP(add, x12, x10, x11, 0x1ffffffefffffff, 0x200000000000000, -0x10000001, x1, 1096, x6)
+
+inst_157:
+// rs1_val == 288230376151711744,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x5955555555555554, 0x400000000000000, 0x5555555555555554, x1, 1104, x6)
+
+inst_158:
+// rs1_val == 4611686018427387904,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x4000000000000000, 0x4000000000000000, 0x0, x1, 1112, x6)
+
+inst_159:
+// rs1_val == -3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0x6
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffffffff7, -0x3, -0x6, x1, 1120, x6)
+
+inst_160:
+// rs1_val == -17,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:0x4000000
+TEST_RR_OP(add, x12, x10, x11, 0x3ffffef, -0x11, 0x4000000, x1, 1128, x6)
+
+inst_161:
+// rs1_val == -129,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffffffff7f, -0x81, 0x0, x1, 1136, x6)
+
+inst_162:
+// rs1_val == -257,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x200
+TEST_RR_OP(add, x12, x10, x11, 0xff, -0x101, 0x200, x1, 1144, x6)
+
+inst_163:
+// rs1_val == -513,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:-0x4000001
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffbfffdfe, -0x201, -0x4000001, x1, 1152, x6)
+
+inst_164:
+// rs1_val == -1025,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:-0x5
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffffffbfa, -0x401, -0x5, x1, 1160, x6)
+
+inst_165:
+// rs1_val == -2049,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333332b31, -0x801, 0x3333333333333332, x1, 1168, x6)
+
+inst_166:
+// rs1_val == -4097,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:-0x200001
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffffdfeffe, -0x1001, -0x200001, x1, 1176, x6)
+
+inst_167:
+// rs1_val == -8193,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:-0x4000000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xbfffffffffffdffe, -0x2001, -0x4000000000000001, x1, 1184, x6)
+
+inst_168:
+// rs1_val == -16385,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:-0x100001
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffffefbffe, -0x4001, -0x100001, x1, 1192, x6)
+
+inst_169:
+// rs1_val == -131073,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x8
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffffe0007, -0x20001, 0x8, x1, 1200, x6)
+
+inst_170:
+// rs1_val == -1048577,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666566664, -0x100001, 0x6666666666666665, x1, 1208, x6)
+
+inst_171:
+// rs1_val == -2097153,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:-0x80000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xff7fffffffdffffe, -0x200001, -0x80000000000001, x1, 1216, x6)
+
+inst_172:
+// rs1_val == -33554433,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x4000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x3fffffdffffff, -0x2000001, 0x4000000000000, x1, 1224, x6)
+
+inst_173:
+// rs1_val == -67108865,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x8000000
+TEST_RR_OP(add, x12, x10, x11, 0x3ffffff, -0x4000001, 0x8000000, x1, 1232, x6)
+
+inst_174:
+// rs1_val == -134217729,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x1000000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xeffffffff7fffffe, -0x8000001, -0x1000000000000001, x1, 1240, x6)
+
+inst_175:
+// rs1_val == -1073741825,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x4000000
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffc3ffffff, -0x40000001, 0x4000000, x1, 1248, x6)
+
+inst_176:
+// rs1_val == -4294967297,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:-0x200000000001
+TEST_RR_OP(add, x12, x10, x11, 0xffffdffefffffffe, -0x100000001, -0x200000000001, x1, 1256, x6)
+
+inst_177:
+// rs1_val == -17179869185,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:-0x20000000000001
+TEST_RR_OP(add, x12, x10, x11, 0xffdffffbfffffffe, -0x400000001, -0x20000000000001, x1, 1264, x6)
+
+inst_178:
+// rs1_val == -34359738369,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:0x400000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x3fffff7ffffffff, -0x800000001, 0x400000000000000, x1, 1272, x6)
+
+inst_179:
+// rs1_val == -68719476737,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:-0x4
+TEST_RR_OP(add, x12, x10, x11, 0xffffffeffffffffb, -0x1000000001, -0x4, x1, 1280, x6)
+
+inst_180:
+// rs1_val == -549755813889,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:0x10000000000
+TEST_RR_OP(add, x12, x10, x11, 0x7fffffffff, -0x8000000001, 0x10000000000, x1, 1288, x6)
+
+inst_181:
+// rs1_val == -1099511627777,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:0x2000
+TEST_RR_OP(add, x12, x10, x11, 0xffffff0000001fff, -0x10000000001, 0x2000, x1, 1296, x6)
+
+inst_182:
+// rs1_val == -2199023255553,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:0x10000000000
+TEST_RR_OP(add, x12, x10, x11, 0xfffffeffffffffff, -0x20000000001, 0x10000000000, x1, 1304, x6)
+
+inst_183:
+// rs1_val == -4398046511105,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:-0x40000000001
+TEST_RR_OP(add, x12, x10, x11, 0xfffff7fffffffffe, -0x40000000001, -0x40000000001, x1, 1312, x6)
+
+inst_184:
+// rs1_val == -35184372088833,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:-0x8001
+TEST_RR_OP(add, x12, x10, x11, 0xffffdfffffff7ffe, -0x200000000001, -0x8001, x1, 1320, x6)
+
+inst_185:
+// rs1_val == -140737488355329,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:0x20000000000000
+TEST_RR_OP(add, x12, x10, x11, 0x1f7fffffffffff, -0x800000000001, 0x20000000000000, x1, 1328, x6)
+
+inst_186:
+// rs1_val == -281474976710657,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:-0x800000001
+TEST_RR_OP(add, x12, x10, x11, 0xfffefff7fffffffe, -0x1000000000001, -0x800000001, x1, 1336, x6)
+
+inst_187:
+// rs1_val == -562949953421313,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xfffe0000b504f332, -0x2000000000001, 0xb504f333, x1, 1344, x6)
+
+inst_188:
+// rs1_val == -18014398509481985,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:-0x3
+TEST_RR_OP(add, x12, x10, x11, 0xffbffffffffffffc, -0x40000000000001, -0x3, x1, 1352, x6)
+
+inst_189:
+// rs1_val == -72057594037927937,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:-0x801
+TEST_RR_OP(add, x12, x10, x11, 0xfefffffffffff7fe, -0x100000000000001, -0x801, x1, 1360, x6)
+
+inst_190:
+// rs1_val == -288230376151711745,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000000001; op2val:0x1000000000000000
+TEST_RR_OP(add, x12, x10, x11, 0xbffffffffffffff, -0x400000000000001, 0x1000000000000000, x1, 1368, x6)
+
+inst_191:
+// rs1_val == -576460752303423489,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xf8000000b504f331, -0x800000000000001, 0xb504f332, x1, 1376, x6)
+
+inst_192:
+// rs1_val == -2305843009213693953,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:0x800000000000000
+TEST_RR_OP(add, x12, x10, x11, 0xe7ffffffffffffff, -0x2000000000000001, 0x800000000000000, x1, 1384, x6)
+
+inst_193:
+// rs1_val == -4611686018427387905,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:-0x401
+TEST_RR_OP(add, x12, x10, x11, 0xbffffffffffffbfe, -0x4000000000000001, -0x401, x1, 1392, x6)
+
+inst_194:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206 and rs2_val==0
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x0, x1, 1400, x6)
+
+inst_195:
+// rs1_val==3 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x6, 0x3, 0x3, x1, 1408, x6)
+
+inst_196:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555558, 0x3, 0x5555555555555555, x1, 1416, x6)
+
+inst_197:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaad, 0x3, -0x5555555555555556, x1, 1424, x6)
+
+inst_198:
+// rs1_val==3 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x8, 0x3, 0x5, x1, 1432, x6)
+
+inst_199:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333336, 0x3, 0x3333333333333333, x1, 1440, x6)
+
+inst_200:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666669, 0x3, 0x6666666666666666, x1, 1448, x6)
+
+inst_201:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd0, 0x3, -0xb504f333, x1, 1456, x6)
+
+inst_202:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xb504f336, 0x3, 0xb504f333, x1, 1464, x6)
+
+inst_203:
+// rs1_val==3 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x5, 0x3, 0x2, x1, 1472, x6)
+
+inst_204:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555557, 0x3, 0x5555555555555554, x1, 1480, x6)
+
+inst_205:
+// rs1_val==3 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x3, 0x3, 0x0, x1, 1488, x6)
+
+inst_206:
+// rs1_val==3 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x7, 0x3, 0x4, x1, 1496, x6)
+
+inst_207:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333335, 0x3, 0x3333333333333332, x1, 1504, x6)
+
+inst_208:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666668, 0x3, 0x6666666666666665, x1, 1512, x6)
+
+inst_209:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xb504f335, 0x3, 0xb504f332, x1, 1520, x6)
+
+inst_210:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555559, 0x3, 0x5555555555555556, x1, 1528, x6)
+
+inst_211:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaae, 0x3, -0x5555555555555555, x1, 1536, x6)
+
+inst_212:
+// rs1_val==3 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x9, 0x3, 0x6, x1, 1544, x6)
+
+inst_213:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333337, 0x3, 0x3333333333333334, x1, 1552, x6)
+
+inst_214:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666a, 0x3, 0x6666666666666667, x1, 1560, x6)
+
+inst_215:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd1, 0x3, -0xb504f332, x1, 1568, x6)
+
+inst_216:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0xb504f337, 0x3, 0xb504f334, x1, 1576, x6)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555558, 0x5555555555555555, 0x3, x1, 1584, x6)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555555, 0x5555555555555555, x1, 1592, x6)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffffffffff, 0x5555555555555555, -0x5555555555555556, x1, 1600, x6)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x555555555555555a, 0x5555555555555555, 0x5, x1, 1608, x6)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888888, 0x5555555555555555, 0x3333333333333333, x1, 1616, x6)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x5555555555555555, 0x6666666666666666, x1, 1624, x6)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x55555554a0506222, 0x5555555555555555, -0xb504f333, x1, 1632, x6)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4888, 0x5555555555555555, 0xb504f333, x1, 1640, x6)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555557, 0x5555555555555555, 0x2, x1, 1648, x6)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5555555555555555, 0x5555555555555554, x1, 1656, x6)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x0, x1, 1664, x6)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555559, 0x5555555555555555, 0x4, x1, 1672, x6)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888887, 0x5555555555555555, 0x3333333333333332, x1, 1680, x6)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbba, 0x5555555555555555, 0x6666666666666665, x1, 1688, x6)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4887, 0x5555555555555555, 0xb504f332, x1, 1696, x6)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555555, 0x5555555555555556, x1, 1704, x6)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x0, 0x5555555555555555, -0x5555555555555555, x1, 1712, x6)
+
+inst_234:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x555555555555555b, 0x5555555555555555, 0x6, x1, 1720, x6)
+
+inst_235:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888889, 0x5555555555555555, 0x3333333333333334, x1, 1728, x6)
+
+inst_236:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbbc, 0x5555555555555555, 0x6666666666666667, x1, 1736, x6)
+
+inst_237:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x55555554a0506223, 0x5555555555555555, -0xb504f332, x1, 1744, x6)
+
+inst_238:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4889, 0x5555555555555555, 0xb504f334, x1, 1752, x6)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaad, -0x5555555555555556, 0x3, x1, 1760, x6)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffffffffff, -0x5555555555555556, 0x5555555555555555, x1, 1768, x6)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555554, -0x5555555555555556, -0x5555555555555556, x1, 1776, x6)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555556, 0x5, x1, 1784, x6)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddddddddddd, -0x5555555555555556, 0x3333333333333333, x1, 1792, x6)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x1111111111111110, -0x5555555555555556, 0x6666666666666666, x1, 1800, x6)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaa9f5a5b777, -0x5555555555555556, -0xb504f333, x1, 1808, x6)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab5faf9ddd, -0x5555555555555556, 0xb504f333, x1, 1816, x6)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaac, -0x5555555555555556, 0x2, x1, 1824, x6)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffffffffe, -0x5555555555555556, 0x5555555555555554, x1, 1832, x6)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x4, x1, 1840, x6)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddddddddddc, -0x5555555555555556, 0x3333333333333332, x1, 1848, x6)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x111111111111110f, -0x5555555555555556, 0x6666666666666665, x1, 1856, x6)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab5faf9ddc, -0x5555555555555556, 0xb504f332, x1, 1864, x6)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x0, -0x5555555555555556, 0x5555555555555556, x1, 1872, x6)
+
+inst_254:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555555, -0x5555555555555556, -0x5555555555555555, x1, 1880, x6)
+
+inst_255:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaab0, -0x5555555555555556, 0x6, x1, 1888, x6)
+
+inst_256:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0xddddddddddddddde, -0x5555555555555556, 0x3333333333333334, x1, 1896, x6)
+
+inst_257:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x1111111111111111, -0x5555555555555556, 0x6666666666666667, x1, 1904, x6)
+
+inst_258:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaa9f5a5b778, -0x5555555555555556, -0xb504f332, x1, 1912, x6)
+
+inst_259:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab5faf9dde, -0x5555555555555556, 0xb504f334, x1, 1920, x6)
+
+inst_260:
+// rs1_val==5 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x8, 0x5, 0x3, x1, 1928, x6)
+
+inst_261:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x555555555555555a, 0x5, 0x5555555555555555, x1, 1936, x6)
+
+inst_262:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x5, -0x5555555555555556, x1, 1944, x6)
+
+inst_263:
+// rs1_val==5 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xa, 0x5, 0x5, x1, 1952, x6)
+
+inst_264:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333338, 0x5, 0x3333333333333333, x1, 1960, x6)
+
+inst_265:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666b, 0x5, 0x6666666666666666, x1, 1968, x6)
+
+inst_266:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd2, 0x5, -0xb504f333, x1, 1976, x6)
+
+inst_267:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xb504f338, 0x5, 0xb504f333, x1, 1984, x6)
+
+inst_268:
+// rs1_val==5 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x7, 0x5, 0x2, x1, 1992, x6)
+
+inst_269:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555559, 0x5, 0x5555555555555554, x1, 2000, x6)
+
+inst_270:
+// rs1_val==5 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x5, 0x5, 0x0, x1, 2008, x6)
+
+inst_271:
+// rs1_val==5 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x9, 0x5, 0x4, x1, 2016, x6)
+
+inst_272:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333337, 0x5, 0x3333333333333332, x1, 2024, x6)
+
+inst_273:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666a, 0x5, 0x6666666666666665, x1, 2032, x6)
+
+inst_274:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xb504f337, 0x5, 0xb504f332, x1, 2040, x6)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_275:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x555555555555555b, 0x5, 0x5555555555555556, x1, 0, x6)
+
+inst_276:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaab0, 0x5, -0x5555555555555555, x1, 8, x6)
+
+inst_277:
+// rs1_val==5 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xb, 0x5, 0x6, x1, 16, x6)
+
+inst_278:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333339, 0x5, 0x3333333333333334, x1, 24, x6)
+
+inst_279:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666c, 0x5, 0x6666666666666667, x1, 32, x6)
+
+inst_280:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd3, 0x5, -0xb504f332, x1, 40, x6)
+
+inst_281:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0xb504f339, 0x5, 0xb504f334, x1, 48, x6)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333336, 0x3333333333333333, 0x3, x1, 56, x6)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888888, 0x3333333333333333, 0x5555555555555555, x1, 64, x6)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddddddddddd, 0x3333333333333333, -0x5555555555555556, x1, 72, x6)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333338, 0x3333333333333333, 0x5, x1, 80, x6)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666666, 0x3333333333333333, 0x3333333333333333, x1, 88, x6)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x9999999999999999, 0x3333333333333333, 0x6666666666666666, x1, 96, x6)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x333333327e2e4000, 0x3333333333333333, -0xb504f333, x1, 104, x6)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382666, 0x3333333333333333, 0xb504f333, x1, 112, x6)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333335, 0x3333333333333333, 0x2, x1, 120, x6)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888887, 0x3333333333333333, 0x5555555555555554, x1, 128, x6)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x0, x1, 136, x6)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333337, 0x3333333333333333, 0x4, x1, 144, x6)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666665, 0x3333333333333333, 0x3333333333333332, x1, 152, x6)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x9999999999999998, 0x3333333333333333, 0x6666666666666665, x1, 160, x6)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382665, 0x3333333333333333, 0xb504f332, x1, 168, x6)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888889, 0x3333333333333333, 0x5555555555555556, x1, 176, x6)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xddddddddddddddde, 0x3333333333333333, -0x5555555555555555, x1, 184, x6)
+
+inst_299:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333339, 0x3333333333333333, 0x6, x1, 192, x6)
+
+inst_300:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666667, 0x3333333333333333, 0x3333333333333334, x1, 200, x6)
+
+inst_301:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x999999999999999a, 0x3333333333333333, 0x6666666666666667, x1, 208, x6)
+
+inst_302:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x333333327e2e4001, 0x3333333333333333, -0xb504f332, x1, 216, x6)
+
+inst_303:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382667, 0x3333333333333333, 0xb504f334, x1, 224, x6)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666669, 0x6666666666666666, 0x3, x1, 232, x6)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x1111111111111110, 0x6666666666666666, -0x5555555555555556, x1, 240, x6)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666b, 0x6666666666666666, 0x5, x1, 248, x6)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x9999999999999999, 0x6666666666666666, 0x3333333333333333, x1, 256, x6)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccccccccccc, 0x6666666666666666, 0x6666666666666666, x1, 264, x6)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x66666665b1617333, 0x6666666666666666, -0xb504f333, x1, 272, x6)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b5999, 0x6666666666666666, 0xb504f333, x1, 280, x6)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666668, 0x6666666666666666, 0x2, x1, 288, x6)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbba, 0x6666666666666666, 0x5555555555555554, x1, 296, x6)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x0, x1, 304, x6)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666a, 0x6666666666666666, 0x4, x1, 312, x6)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x9999999999999998, 0x6666666666666666, 0x3333333333333332, x1, 320, x6)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccccccccccb, 0x6666666666666666, 0x6666666666666665, x1, 328, x6)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b5998, 0x6666666666666666, 0xb504f332, x1, 336, x6)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbbc, 0x6666666666666666, 0x5555555555555556, x1, 344, x6)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x1111111111111111, 0x6666666666666666, -0x5555555555555555, x1, 352, x6)
+
+inst_320:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666c, 0x6666666666666666, 0x6, x1, 360, x6)
+
+inst_321:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x999999999999999a, 0x6666666666666666, 0x3333333333333334, x1, 368, x6)
+
+inst_322:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccccccccccd, 0x6666666666666666, 0x6666666666666667, x1, 376, x6)
+
+inst_323:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x66666665b1617334, 0x6666666666666666, -0xb504f332, x1, 384, x6)
+
+inst_324:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b599a, 0x6666666666666666, 0xb504f334, x1, 392, x6)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd0, -0xb504f333, 0x3, x1, 400, x6)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x55555554a0506222, -0xb504f333, 0x5555555555555555, x1, 408, x6)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaa9f5a5b777, -0xb504f333, -0x5555555555555556, x1, 416, x6)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd2, -0xb504f333, 0x5, x1, 424, x6)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x333333327e2e4000, -0xb504f333, 0x3333333333333333, x1, 432, x6)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x66666665b1617333, -0xb504f333, 0x6666666666666666, x1, 440, x6)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffe95f6199a, -0xb504f333, -0xb504f333, x1, 448, x6)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x0, -0xb504f333, 0xb504f333, x1, 456, x6)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0ccf, -0xb504f333, 0x2, x1, 464, x6)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x55555554a0506221, -0xb504f333, 0x5555555555555554, x1, 472, x6)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x0, x1, 480, x6)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd1, -0xb504f333, 0x4, x1, 488, x6)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x333333327e2e3fff, -0xb504f333, 0x3333333333333332, x1, 496, x6)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x66666665b1617332, -0xb504f333, 0x6666666666666665, x1, 504, x6)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffffffffff, -0xb504f333, 0xb504f332, x1, 512, x6)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x55555554a0506223, -0xb504f333, 0x5555555555555556, x1, 520, x6)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaa9f5a5b778, -0xb504f333, -0x5555555555555555, x1, 528, x6)
+
+inst_342:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd3, -0xb504f333, 0x6, x1, 536, x6)
+
+inst_343:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x333333327e2e4001, -0xb504f333, 0x3333333333333334, x1, 544, x6)
+
+inst_344:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x66666665b1617334, -0xb504f333, 0x6666666666666667, x1, 552, x6)
+
+inst_345:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffe95f6199b, -0xb504f333, -0xb504f332, x1, 560, x6)
+
+inst_346:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x1, -0xb504f333, 0xb504f334, x1, 568, x6)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xb504f336, 0xb504f333, 0x3, x1, 576, x6)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4888, 0xb504f333, 0x5555555555555555, x1, 584, x6)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab5faf9ddd, 0xb504f333, -0x5555555555555556, x1, 592, x6)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xb504f338, 0xb504f333, 0x5, x1, 600, x6)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382666, 0xb504f333, 0x3333333333333333, x1, 608, x6)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b5999, 0xb504f333, 0x6666666666666666, x1, 616, x6)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x0, 0xb504f333, -0xb504f333, x1, 624, x6)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x16a09e666, 0xb504f333, 0xb504f333, x1, 632, x6)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xb504f335, 0xb504f333, 0x2, x1, 640, x6)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4887, 0xb504f333, 0x5555555555555554, x1, 648, x6)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xb504f333, 0xb504f333, 0x0, x1, 656, x6)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xb504f337, 0xb504f333, 0x4, x1, 664, x6)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382665, 0xb504f333, 0x3333333333333332, x1, 672, x6)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b5998, 0xb504f333, 0x6666666666666665, x1, 680, x6)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x16a09e665, 0xb504f333, 0xb504f332, x1, 688, x6)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4889, 0xb504f333, 0x5555555555555556, x1, 696, x6)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab5faf9dde, 0xb504f333, -0x5555555555555555, x1, 704, x6)
+
+inst_364:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xb504f339, 0xb504f333, 0x6, x1, 712, x6)
+
+inst_365:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382667, 0xb504f333, 0x3333333333333334, x1, 720, x6)
+
+inst_366:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b599a, 0xb504f333, 0x6666666666666667, x1, 728, x6)
+
+inst_367:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x1, 0xb504f333, -0xb504f332, x1, 736, x6)
+
+inst_368:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x16a09e667, 0xb504f333, 0xb504f334, x1, 744, x6)
+
+inst_369:
+// rs1_val==2 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x5, 0x2, 0x3, x1, 752, x6)
+
+inst_370:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555557, 0x2, 0x5555555555555555, x1, 760, x6)
+
+inst_371:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaac, 0x2, -0x5555555555555556, x1, 768, x6)
+
+inst_372:
+// rs1_val==2 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x7, 0x2, 0x5, x1, 776, x6)
+
+inst_373:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333335, 0x2, 0x3333333333333333, x1, 784, x6)
+
+inst_374:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666668, 0x2, 0x6666666666666666, x1, 792, x6)
+
+inst_375:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0ccf, 0x2, -0xb504f333, x1, 800, x6)
+
+inst_376:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xb504f335, 0x2, 0xb504f333, x1, 808, x6)
+
+inst_377:
+// rs1_val==2 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x4, 0x2, 0x2, x1, 816, x6)
+
+inst_378:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555556, 0x2, 0x5555555555555554, x1, 824, x6)
+
+inst_379:
+// rs1_val==2 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x2, 0x2, 0x0, x1, 832, x6)
+
+inst_380:
+// rs1_val==2 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x6, 0x2, 0x4, x1, 840, x6)
+
+inst_381:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333334, 0x2, 0x3333333333333332, x1, 848, x6)
+
+inst_382:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666667, 0x2, 0x6666666666666665, x1, 856, x6)
+
+inst_383:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xb504f334, 0x2, 0xb504f332, x1, 864, x6)
+
+inst_384:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555558, 0x2, 0x5555555555555556, x1, 872, x6)
+
+inst_385:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaad, 0x2, -0x5555555555555555, x1, 880, x6)
+
+inst_386:
+// rs1_val==2 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x8, 0x2, 0x6, x1, 888, x6)
+
+inst_387:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333336, 0x2, 0x3333333333333334, x1, 896, x6)
+
+inst_388:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666669, 0x2, 0x6666666666666667, x1, 904, x6)
+
+inst_389:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd0, 0x2, -0xb504f332, x1, 912, x6)
+
+inst_390:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0xb504f336, 0x2, 0xb504f334, x1, 920, x6)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555557, 0x5555555555555554, 0x3, x1, 928, x6)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5555555555555554, 0x5555555555555555, x1, 936, x6)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffffffffffe, 0x5555555555555554, -0x5555555555555556, x1, 944, x6)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555559, 0x5555555555555554, 0x5, x1, 952, x6)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888887, 0x5555555555555554, 0x3333333333333333, x1, 960, x6)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbba, 0x5555555555555554, 0x6666666666666666, x1, 968, x6)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x55555554a0506221, 0x5555555555555554, -0xb504f333, x1, 976, x6)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4887, 0x5555555555555554, 0xb504f333, x1, 984, x6)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x2, x1, 992, x6)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaa8, 0x5555555555555554, 0x5555555555555554, x1, 1000, x6)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x0, x1, 1008, x6)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555558, 0x5555555555555554, 0x4, x1, 1016, x6)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888886, 0x5555555555555554, 0x3333333333333332, x1, 1024, x6)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbb9, 0x5555555555555554, 0x6666666666666665, x1, 1032, x6)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4886, 0x5555555555555554, 0xb504f332, x1, 1040, x6)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555554, 0x5555555555555556, x1, 1048, x6)
+
+inst_407:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffffffffff, 0x5555555555555554, -0x5555555555555555, x1, 1056, x6)
+
+inst_408:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x555555555555555a, 0x5555555555555554, 0x6, x1, 1064, x6)
+
+inst_409:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888888, 0x5555555555555554, 0x3333333333333334, x1, 1072, x6)
+
+inst_410:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x5555555555555554, 0x6666666666666667, x1, 1080, x6)
+
+inst_411:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x55555554a0506222, 0x5555555555555554, -0xb504f332, x1, 1088, x6)
+
+inst_412:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4888, 0x5555555555555554, 0xb504f334, x1, 1096, x6)
+
+inst_413:
+// rs1_val==0 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x3, 0x0, 0x3, x1, 1104, x6)
+
+inst_414:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555555, 0x0, 0x5555555555555555, x1, 1112, x6)
+
+inst_415:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x0, -0x5555555555555556, x1, 1120, x6)
+
+inst_416:
+// rs1_val==0 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x5, 0x0, 0x5, x1, 1128, x6)
+
+inst_417:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333333, 0x0, 0x3333333333333333, x1, 1136, x6)
+
+inst_418:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666666, 0x0, 0x6666666666666666, x1, 1144, x6)
+
+inst_419:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0ccd, 0x0, -0xb504f333, x1, 1152, x6)
+
+inst_420:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xb504f333, 0x0, 0xb504f333, x1, 1160, x6)
+
+inst_421:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cce, 0x0, -0xb504f332, x1, 1168, x6)
+
+inst_422:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0xb504f334, 0x0, 0xb504f334, x1, 1176, x6)
+
+inst_423:
+// rs1_val==4 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x7, 0x4, 0x3, x1, 1184, x6)
+
+inst_424:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555559, 0x4, 0x5555555555555555, x1, 1192, x6)
+
+inst_425:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaae, 0x4, -0x5555555555555556, x1, 1200, x6)
+
+inst_426:
+// rs1_val==4 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x9, 0x4, 0x5, x1, 1208, x6)
+
+inst_427:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333337, 0x4, 0x3333333333333333, x1, 1216, x6)
+
+inst_428:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666a, 0x4, 0x6666666666666666, x1, 1224, x6)
+
+inst_429:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd1, 0x4, -0xb504f333, x1, 1232, x6)
+
+inst_430:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xb504f337, 0x4, 0xb504f333, x1, 1240, x6)
+
+inst_431:
+// rs1_val==4 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x6, 0x4, 0x2, x1, 1248, x6)
+
+inst_432:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555558, 0x4, 0x5555555555555554, x1, 1256, x6)
+
+inst_433:
+// rs1_val==4 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x4, 0x4, 0x0, x1, 1264, x6)
+
+inst_434:
+// rs1_val==4 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x8, 0x4, 0x4, x1, 1272, x6)
+
+inst_435:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333336, 0x4, 0x3333333333333332, x1, 1280, x6)
+
+inst_436:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666669, 0x4, 0x6666666666666665, x1, 1288, x6)
+
+inst_437:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xb504f336, 0x4, 0xb504f332, x1, 1296, x6)
+
+inst_438:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x4, -0x5555555555555555, x1, 1304, x6)
+
+inst_439:
+// rs1_val==4 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xa, 0x4, 0x6, x1, 1312, x6)
+
+inst_440:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333338, 0x4, 0x3333333333333334, x1, 1320, x6)
+
+inst_441:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666b, 0x4, 0x6666666666666667, x1, 1328, x6)
+
+inst_442:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd2, 0x4, -0xb504f332, x1, 1336, x6)
+
+inst_443:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0xb504f338, 0x4, 0xb504f334, x1, 1344, x6)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333335, 0x3333333333333332, 0x3, x1, 1352, x6)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888887, 0x3333333333333332, 0x5555555555555555, x1, 1360, x6)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddddddddddc, 0x3333333333333332, -0x5555555555555556, x1, 1368, x6)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333337, 0x3333333333333332, 0x5, x1, 1376, x6)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666665, 0x3333333333333332, 0x3333333333333333, x1, 1384, x6)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x9999999999999998, 0x3333333333333332, 0x6666666666666666, x1, 1392, x6)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x333333327e2e3fff, 0x3333333333333332, -0xb504f333, x1, 1400, x6)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382665, 0x3333333333333332, 0xb504f333, x1, 1408, x6)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333334, 0x3333333333333332, 0x2, x1, 1416, x6)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888886, 0x3333333333333332, 0x5555555555555554, x1, 1424, x6)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x0, x1, 1432, x6)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333336, 0x3333333333333332, 0x4, x1, 1440, x6)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666664, 0x3333333333333332, 0x3333333333333332, x1, 1448, x6)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x9999999999999997, 0x3333333333333332, 0x6666666666666665, x1, 1456, x6)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382664, 0x3333333333333332, 0xb504f332, x1, 1464, x6)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888888, 0x3333333333333332, 0x5555555555555556, x1, 1472, x6)
+
+inst_460:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddddddddddd, 0x3333333333333332, -0x5555555555555555, x1, 1480, x6)
+
+inst_461:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333338, 0x3333333333333332, 0x6, x1, 1488, x6)
+
+inst_462:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666666, 0x3333333333333332, 0x3333333333333334, x1, 1496, x6)
+
+inst_463:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x9999999999999999, 0x3333333333333332, 0x6666666666666667, x1, 1504, x6)
+
+inst_464:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x333333327e2e4000, 0x3333333333333332, -0xb504f332, x1, 1512, x6)
+
+inst_465:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382666, 0x3333333333333332, 0xb504f334, x1, 1520, x6)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666668, 0x6666666666666665, 0x3, x1, 1528, x6)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbba, 0x6666666666666665, 0x5555555555555555, x1, 1536, x6)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x111111111111110f, 0x6666666666666665, -0x5555555555555556, x1, 1544, x6)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666a, 0x6666666666666665, 0x5, x1, 1552, x6)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x9999999999999998, 0x6666666666666665, 0x3333333333333333, x1, 1560, x6)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccccccccccb, 0x6666666666666665, 0x6666666666666666, x1, 1568, x6)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x66666665b1617332, 0x6666666666666665, -0xb504f333, x1, 1576, x6)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b5998, 0x6666666666666665, 0xb504f333, x1, 1584, x6)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x2, x1, 1592, x6)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbb9, 0x6666666666666665, 0x5555555555555554, x1, 1600, x6)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x0, x1, 1608, x6)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666669, 0x6666666666666665, 0x4, x1, 1616, x6)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x9999999999999997, 0x6666666666666665, 0x3333333333333332, x1, 1624, x6)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0xccccccccccccccca, 0x6666666666666665, 0x6666666666666665, x1, 1632, x6)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b5997, 0x6666666666666665, 0xb504f332, x1, 1640, x6)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x6666666666666665, 0x5555555555555556, x1, 1648, x6)
+
+inst_482:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x1111111111111110, 0x6666666666666665, -0x5555555555555555, x1, 1656, x6)
+
+inst_483:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666b, 0x6666666666666665, 0x6, x1, 1664, x6)
+
+inst_484:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x9999999999999999, 0x6666666666666665, 0x3333333333333334, x1, 1672, x6)
+
+inst_485:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccccccccccc, 0x6666666666666665, 0x6666666666666667, x1, 1680, x6)
+
+inst_486:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x66666665b1617333, 0x6666666666666665, -0xb504f332, x1, 1688, x6)
+
+inst_487:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b5999, 0x6666666666666665, 0xb504f334, x1, 1696, x6)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xb504f335, 0xb504f332, 0x3, x1, 1704, x6)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4887, 0xb504f332, 0x5555555555555555, x1, 1712, x6)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab5faf9ddc, 0xb504f332, -0x5555555555555556, x1, 1720, x6)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xb504f337, 0xb504f332, 0x5, x1, 1728, x6)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382665, 0xb504f332, 0x3333333333333333, x1, 1736, x6)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b5998, 0xb504f332, 0x6666666666666666, x1, 1744, x6)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffffffffff, 0xb504f332, -0xb504f333, x1, 1752, x6)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x16a09e665, 0xb504f332, 0xb504f333, x1, 1760, x6)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xb504f334, 0xb504f332, 0x2, x1, 1768, x6)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4886, 0xb504f332, 0x5555555555555554, x1, 1776, x6)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xb504f332, 0xb504f332, 0x0, x1, 1784, x6)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xb504f336, 0xb504f332, 0x4, x1, 1792, x6)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382664, 0xb504f332, 0x3333333333333332, x1, 1800, x6)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b5997, 0xb504f332, 0x6666666666666665, x1, 1808, x6)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x16a09e664, 0xb504f332, 0xb504f332, x1, 1816, x6)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4888, 0xb504f332, 0x5555555555555556, x1, 1824, x6)
+
+inst_504:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab5faf9ddd, 0xb504f332, -0x5555555555555555, x1, 1832, x6)
+
+inst_505:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xb504f338, 0xb504f332, 0x6, x1, 1840, x6)
+
+inst_506:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382666, 0xb504f332, 0x3333333333333334, x1, 1848, x6)
+
+inst_507:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b5999, 0xb504f332, 0x6666666666666667, x1, 1856, x6)
+
+inst_508:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x0, 0xb504f332, -0xb504f332, x1, 1864, x6)
+
+inst_509:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x16a09e666, 0xb504f332, 0xb504f334, x1, 1872, x6)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555559, 0x5555555555555556, 0x3, x1, 1880, x6)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555556, 0x5555555555555555, x1, 1888, x6)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x0, 0x5555555555555556, -0x5555555555555556, x1, 1896, x6)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x555555555555555b, 0x5555555555555556, 0x5, x1, 1904, x6)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888889, 0x5555555555555556, 0x3333333333333333, x1, 1912, x6)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbbc, 0x5555555555555556, 0x6666666666666666, x1, 1920, x6)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x55555554a0506223, 0x5555555555555556, -0xb504f333, x1, 1928, x6)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4889, 0x5555555555555556, 0xb504f333, x1, 1936, x6)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555558, 0x5555555555555556, 0x2, x1, 1944, x6)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555556, 0x5555555555555554, x1, 1952, x6)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x0, x1, 1960, x6)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x555555555555555a, 0x5555555555555556, 0x4, x1, 1968, x6)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888888, 0x5555555555555556, 0x3333333333333332, x1, 1976, x6)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x5555555555555556, 0x6666666666666665, x1, 1984, x6)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4888, 0x5555555555555556, 0xb504f332, x1, 1992, x6)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaac, 0x5555555555555556, 0x5555555555555556, x1, 2000, x6)
+
+inst_526:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x1, 0x5555555555555556, -0x5555555555555555, x1, 2008, x6)
+
+inst_527:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x555555555555555c, 0x5555555555555556, 0x6, x1, 2016, x6)
+
+inst_528:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x888888888888888a, 0x5555555555555556, 0x3333333333333334, x1, 2024, x6)
+
+inst_529:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbbd, 0x5555555555555556, 0x6666666666666667, x1, 2032, x6)
+
+inst_530:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x55555554a0506224, 0x5555555555555556, -0xb504f332, x1, 2040, x6)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_531:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a488a, 0x5555555555555556, 0xb504f334, x1, 0, x6)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaae, -0x5555555555555555, 0x3, x1, 8, x6)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x0, -0x5555555555555555, 0x5555555555555555, x1, 16, x6)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555555, -0x5555555555555555, -0x5555555555555556, x1, 24, x6)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaab0, -0x5555555555555555, 0x5, x1, 32, x6)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0xddddddddddddddde, -0x5555555555555555, 0x3333333333333333, x1, 40, x6)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x1111111111111111, -0x5555555555555555, 0x6666666666666666, x1, 48, x6)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaa9f5a5b778, -0x5555555555555555, -0xb504f333, x1, 56, x6)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab5faf9dde, -0x5555555555555555, 0xb504f333, x1, 64, x6)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaad, -0x5555555555555555, 0x2, x1, 72, x6)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffffffffff, -0x5555555555555555, 0x5555555555555554, x1, 80, x6)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x0, x1, 88, x6)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x4, x1, 96, x6)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddddddddddd, -0x5555555555555555, 0x3333333333333332, x1, 104, x6)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x1111111111111110, -0x5555555555555555, 0x6666666666666665, x1, 112, x6)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab5faf9ddd, -0x5555555555555555, 0xb504f332, x1, 120, x6)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x1, -0x5555555555555555, 0x5555555555555556, x1, 128, x6)
+
+inst_548:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555556, -0x5555555555555555, -0x5555555555555555, x1, 136, x6)
+
+inst_549:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaab1, -0x5555555555555555, 0x6, x1, 144, x6)
+
+inst_550:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddddddddddf, -0x5555555555555555, 0x3333333333333334, x1, 152, x6)
+
+inst_551:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x1111111111111112, -0x5555555555555555, 0x6666666666666667, x1, 160, x6)
+
+inst_552:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaa9f5a5b779, -0x5555555555555555, -0xb504f332, x1, 168, x6)
+
+inst_553:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab5faf9ddf, -0x5555555555555555, 0xb504f334, x1, 176, x6)
+
+inst_554:
+// rs1_val==6 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x9, 0x6, 0x3, x1, 184, x6)
+
+inst_555:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x555555555555555b, 0x6, 0x5555555555555555, x1, 192, x6)
+
+inst_556:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaab0, 0x6, -0x5555555555555556, x1, 200, x6)
+
+inst_557:
+// rs1_val==6 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xb, 0x6, 0x5, x1, 208, x6)
+
+inst_558:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333339, 0x6, 0x3333333333333333, x1, 216, x6)
+
+inst_559:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666c, 0x6, 0x6666666666666666, x1, 224, x6)
+
+inst_560:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd3, 0x6, -0xb504f333, x1, 232, x6)
+
+inst_561:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xb504f339, 0x6, 0xb504f333, x1, 240, x6)
+
+inst_562:
+// rs1_val==6 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x8, 0x6, 0x2, x1, 248, x6)
+
+inst_563:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x555555555555555a, 0x6, 0x5555555555555554, x1, 256, x6)
+
+inst_564:
+// rs1_val==6 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x6, 0x6, 0x0, x1, 264, x6)
+
+inst_565:
+// rs1_val==6 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xa, 0x6, 0x4, x1, 272, x6)
+
+inst_566:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333338, 0x6, 0x3333333333333332, x1, 280, x6)
+
+inst_567:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666b, 0x6, 0x6666666666666665, x1, 288, x6)
+
+inst_568:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xb504f338, 0x6, 0xb504f332, x1, 296, x6)
+
+inst_569:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x555555555555555c, 0x6, 0x5555555555555556, x1, 304, x6)
+
+inst_570:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaab1, 0x6, -0x5555555555555555, x1, 312, x6)
+
+inst_571:
+// rs1_val==6 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xc, 0x6, 0x6, x1, 320, x6)
+
+inst_572:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x333333333333333a, 0x6, 0x3333333333333334, x1, 328, x6)
+
+inst_573:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666d, 0x6, 0x6666666666666667, x1, 336, x6)
+
+inst_574:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd4, 0x6, -0xb504f332, x1, 344, x6)
+
+inst_575:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0xb504f33a, 0x6, 0xb504f334, x1, 352, x6)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333337, 0x3333333333333334, 0x3, x1, 360, x6)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888889, 0x3333333333333334, 0x5555555555555555, x1, 368, x6)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xddddddddddddddde, 0x3333333333333334, -0x5555555555555556, x1, 376, x6)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333339, 0x3333333333333334, 0x5, x1, 384, x6)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666667, 0x3333333333333334, 0x3333333333333333, x1, 392, x6)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x999999999999999a, 0x3333333333333334, 0x6666666666666666, x1, 400, x6)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x333333327e2e4001, 0x3333333333333334, -0xb504f333, x1, 408, x6)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382667, 0x3333333333333334, 0xb504f333, x1, 416, x6)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333336, 0x3333333333333334, 0x2, x1, 424, x6)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x8888888888888888, 0x3333333333333334, 0x5555555555555554, x1, 432, x6)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x0, x1, 440, x6)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333338, 0x3333333333333334, 0x4, x1, 448, x6)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666666, 0x3333333333333334, 0x3333333333333332, x1, 456, x6)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x9999999999999999, 0x3333333333333334, 0x6666666666666665, x1, 464, x6)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382666, 0x3333333333333334, 0xb504f332, x1, 472, x6)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x888888888888888a, 0x3333333333333334, 0x5555555555555556, x1, 480, x6)
+
+inst_592:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xdddddddddddddddf, 0x3333333333333334, -0x5555555555555555, x1, 488, x6)
+
+inst_593:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x333333333333333a, 0x3333333333333334, 0x6, x1, 496, x6)
+
+inst_594:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666668, 0x3333333333333334, 0x3333333333333334, x1, 504, x6)
+
+inst_595:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x999999999999999b, 0x3333333333333334, 0x6666666666666667, x1, 512, x6)
+
+inst_596:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x333333327e2e4002, 0x3333333333333334, -0xb504f332, x1, 520, x6)
+
+inst_597:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382668, 0x3333333333333334, 0xb504f334, x1, 528, x6)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666a, 0x6666666666666667, 0x3, x1, 536, x6)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbbc, 0x6666666666666667, 0x5555555555555555, x1, 544, x6)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x1111111111111111, 0x6666666666666667, -0x5555555555555556, x1, 552, x6)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666c, 0x6666666666666667, 0x5, x1, 560, x6)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x999999999999999a, 0x6666666666666667, 0x3333333333333333, x1, 568, x6)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccccccccccd, 0x6666666666666667, 0x6666666666666666, x1, 576, x6)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x66666665b1617334, 0x6666666666666667, -0xb504f333, x1, 584, x6)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b599a, 0x6666666666666667, 0xb504f333, x1, 592, x6)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666669, 0x6666666666666667, 0x2, x1, 600, x6)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x6666666666666667, 0x5555555555555554, x1, 608, x6)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x0, x1, 616, x6)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666b, 0x6666666666666667, 0x4, x1, 624, x6)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x9999999999999999, 0x6666666666666667, 0x3333333333333332, x1, 632, x6)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0xcccccccccccccccc, 0x6666666666666667, 0x6666666666666665, x1, 640, x6)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b5999, 0x6666666666666667, 0xb504f332, x1, 648, x6)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xbbbbbbbbbbbbbbbd, 0x6666666666666667, 0x5555555555555556, x1, 656, x6)
+
+inst_614:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x1111111111111112, 0x6666666666666667, -0x5555555555555555, x1, 664, x6)
+
+inst_615:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x666666666666666d, 0x6666666666666667, 0x6, x1, 672, x6)
+
+inst_616:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x999999999999999b, 0x6666666666666667, 0x3333333333333334, x1, 680, x6)
+
+inst_617:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0xccccccccccccccce, 0x6666666666666667, 0x6666666666666667, x1, 688, x6)
+
+inst_618:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x66666665b1617335, 0x6666666666666667, -0xb504f332, x1, 696, x6)
+
+inst_619:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b599b, 0x6666666666666667, 0xb504f334, x1, 704, x6)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd1, -0xb504f332, 0x3, x1, 712, x6)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x55555554a0506223, -0xb504f332, 0x5555555555555555, x1, 720, x6)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaa9f5a5b778, -0xb504f332, -0x5555555555555556, x1, 728, x6)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd3, -0xb504f332, 0x5, x1, 736, x6)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x333333327e2e4001, -0xb504f332, 0x3333333333333333, x1, 744, x6)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x66666665b1617334, -0xb504f332, 0x6666666666666666, x1, 752, x6)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffe95f6199b, -0xb504f332, -0xb504f333, x1, 760, x6)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x1, -0xb504f332, 0xb504f333, x1, 768, x6)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd0, -0xb504f332, 0x2, x1, 776, x6)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x55555554a0506222, -0xb504f332, 0x5555555555555554, x1, 784, x6)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x0, x1, 792, x6)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd2, -0xb504f332, 0x4, x1, 800, x6)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x333333327e2e4000, -0xb504f332, 0x3333333333333332, x1, 808, x6)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x66666665b1617333, -0xb504f332, 0x6666666666666665, x1, 816, x6)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x0, -0xb504f332, 0xb504f332, x1, 824, x6)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x55555554a0506224, -0xb504f332, 0x5555555555555556, x1, 832, x6)
+
+inst_636:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaa9f5a5b779, -0xb504f332, -0x5555555555555555, x1, 840, x6)
+
+inst_637:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xffffffff4afb0cd4, -0xb504f332, 0x6, x1, 848, x6)
+
+inst_638:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x333333327e2e4002, -0xb504f332, 0x3333333333333334, x1, 856, x6)
+
+inst_639:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x66666665b1617335, -0xb504f332, 0x6666666666666667, x1, 864, x6)
+
+inst_640:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xfffffffe95f6199c, -0xb504f332, -0xb504f332, x1, 872, x6)
+
+inst_641:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x2, -0xb504f332, 0xb504f334, x1, 880, x6)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3
+TEST_RR_OP(add, x12, x10, x11, 0xb504f337, 0xb504f334, 0x3, x1, 888, x6)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4889, 0xb504f334, 0x5555555555555555, x1, 896, x6)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab5faf9dde, 0xb504f334, -0x5555555555555556, x1, 904, x6)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5
+TEST_RR_OP(add, x12, x10, x11, 0xb504f339, 0xb504f334, 0x5, x1, 912, x6)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382667, 0xb504f334, 0x3333333333333333, x1, 920, x6)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b599a, 0xb504f334, 0x6666666666666666, x1, 928, x6)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x1, 0xb504f334, -0xb504f333, x1, 936, x6)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f333
+TEST_RR_OP(add, x12, x10, x11, 0x16a09e667, 0xb504f334, 0xb504f333, x1, 944, x6)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0xb504f336, 0xb504f334, 0x2, x1, 952, x6)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a4888, 0xb504f334, 0x5555555555555554, x1, 960, x6)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0xb504f334, 0xb504f334, 0x0, x1, 968, x6)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0xb504f338, 0xb504f334, 0x4, x1, 976, x6)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382666, 0xb504f334, 0x3333333333333332, x1, 984, x6)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b5999, 0xb504f334, 0x6666666666666665, x1, 992, x6)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x16a09e666, 0xb504f334, 0xb504f332, x1, 1000, x6)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x555555560a5a488a, 0xb504f334, 0x5555555555555556, x1, 1008, x6)
+
+inst_658:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaab5faf9ddf, 0xb504f334, -0x5555555555555555, x1, 1016, x6)
+
+inst_659:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0xb504f33a, 0xb504f334, 0x6, x1, 1024, x6)
+
+inst_660:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x33333333e8382668, 0xb504f334, 0x3333333333333334, x1, 1032, x6)
+
+inst_661:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x666666671b6b599b, 0xb504f334, 0x6666666666666667, x1, 1040, x6)
+
+inst_662:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0x2, 0xb504f334, -0xb504f332, x1, 1048, x6)
+
+inst_663:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f334
+TEST_RR_OP(add, x12, x10, x11, 0x16a09e668, 0xb504f334, 0xb504f334, x1, 1056, x6)
+
+inst_664:
+// rs1_val==0 and rs2_val==2,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(add, x12, x10, x11, 0x2, 0x0, 0x2, x1, 1064, x6)
+
+inst_665:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555554
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555554, 0x0, 0x5555555555555554, x1, 1072, x6)
+
+inst_666:
+// rs1_val==0 and rs2_val==0,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(add, x12, x10, x11, 0x0, 0x0, 0x0, x1, 1080, x6)
+
+inst_667:
+// rs1_val==0 and rs2_val==4,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(add, x12, x10, x11, 0x4, 0x0, 0x4, x1, 1088, x6)
+
+inst_668:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333332
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333332, 0x0, 0x3333333333333332, x1, 1096, x6)
+
+inst_669:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666665
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666665, 0x0, 0x6666666666666665, x1, 1104, x6)
+
+inst_670:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f332
+TEST_RR_OP(add, x12, x10, x11, 0xb504f332, 0x0, 0xb504f332, x1, 1112, x6)
+
+inst_671:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x5555555555555556, 0x0, 0x5555555555555556, x1, 1120, x6)
+
+inst_672:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555555
+TEST_RR_OP(add, x12, x10, x11, 0xaaaaaaaaaaaaaaab, 0x0, -0x5555555555555555, x1, 1128, x6)
+
+inst_673:
+// rs1_val==0 and rs2_val==6,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(add, x12, x10, x11, 0x6, 0x0, 0x6, x1, 1136, x6)
+
+inst_674:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333334
+TEST_RR_OP(add, x12, x10, x11, 0x3333333333333334, 0x0, 0x3333333333333334, x1, 1144, x6)
+
+inst_675:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666667
+TEST_RR_OP(add, x12, x10, x11, 0x6666666666666667, 0x0, 0x6666666666666667, x1, 1152, x6)
+
+inst_676:
+// rs1_val > 0 and rs2_val > 0, rs1_val == 4, rs1_val==4 and rs2_val==6148914691236517206, rs1_val != rs2_val
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555556
+TEST_RR_OP(add, x12, x10, x11, 0x555555555555555a, 0x4, 0x5555555555555556, x1, 1160, x6)
+
+inst_677:
+// rs1_val < 0 and rs2_val < 0, rs1_val == -8388609
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:-0x4
+TEST_RR_OP(add, x12, x10, x11, 0xffffffffff7ffffb, -0x800001, -0x4, x1, 1168, x6)
+
+inst_678:
+// rs2_val == 256,
+// opcode: add ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x100
+TEST_RR_OP(add, x12, x10, x11, 0x101, 0x1, 0x100, x1, 1176, x6)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x8_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x8_1:
+ .fill 19*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 148*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/addi-01.S b/riscof/suite/rv64i_m/I/addi-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..f400147eddd6ef0302704643284a9c94f05c31ff
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/addi-01.S
@@ -0,0 +1,3179 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the addi instruction of the RISC-V I extension for the addi covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",addi)
+
+RVTEST_SIGBASE( x16,signature_x16_1)
+
+inst_0:
+// rs1 == rd, rs1==x19, rd==x19, imm_val == (-2**(12-1)), imm_val == -2048, rs1_val != imm_val, rs1_val == -4097, rs1_val < 0 and imm_val < 0
+// opcode: addi ; op1:x19; dest:x19; op1val:-0x1001; immval:-0x800
+TEST_IMM_OP( addi, x19, x19, 0xffffffffffffe7ff, -0x1001, -0x800, x16, 0, x18)
+
+inst_1:
+// rs1 != rd, rs1==x1, rd==x15, imm_val == 0, rs1_val == -65537
+// opcode: addi ; op1:x1; dest:x15; op1val:-0x10001; immval:0x0
+TEST_IMM_OP( addi, x15, x1, 0xfffffffffffeffff, -0x10001, 0x0, x16, 8, x18)
+
+inst_2:
+// rs1==x22, rd==x12, imm_val == (2**(12-1)-1), rs1_val > 0 and imm_val > 0, imm_val == 2047, rs1_val == 4194304
+// opcode: addi ; op1:x22; dest:x12; op1val:0x400000; immval:0x7ff
+TEST_IMM_OP( addi, x12, x22, 0x4007ff, 0x400000, 0x7ff, x16, 16, x18)
+
+inst_3:
+// rs1==x26, rd==x10, imm_val == 1, rs1_val == 18014398509481984
+// opcode: addi ; op1:x26; dest:x10; op1val:0x40000000000000; immval:0x1
+TEST_IMM_OP( addi, x10, x26, 0x40000000000001, 0x40000000000000, 0x1, x16, 24, x18)
+
+inst_4:
+// rs1==x17, rd==x21, rs1_val == (-2**(xlen-1)), imm_val == -129, rs1_val == -9223372036854775808
+// opcode: addi ; op1:x17; dest:x21; op1val:-0x8000000000000000; immval:-0x81
+TEST_IMM_OP( addi, x21, x17, 0x7fffffffffffff7f, -0x8000000000000000, -0x81, x16, 32, x18)
+
+inst_5:
+// rs1==x30, rd==x25, rs1_val == 0, rs1_val==0 and imm_val==4, imm_val == 4
+// opcode: addi ; op1:x30; dest:x25; op1val:0x0; immval:0x4
+TEST_IMM_OP( addi, x25, x30, 0x4, 0x0, 0x4, x16, 40, x18)
+
+inst_6:
+// rs1==x0, rd==x24, rs1_val == (2**(xlen-1)-1), imm_val == -513, rs1_val > 0 and imm_val < 0, rs1_val == 9223372036854775807
+// opcode: addi ; op1:x0; dest:x24; op1val:0x0; immval:-0x201
+TEST_IMM_OP( addi, x24, x0, 0xfffffffffffffdff, 0x0, -0x201, x16, 48, x18)
+
+inst_7:
+// rs1==x14, rd==x30, rs1_val == 1,
+// opcode: addi ; op1:x14; dest:x30; op1val:0x1; immval:0x333
+TEST_IMM_OP( addi, x30, x14, 0x334, 0x1, 0x333, x16, 56, x18)
+
+inst_8:
+// rs1==x6, rd==x4, rs1_val == imm_val,
+// opcode: addi ; op1:x6; dest:x4; op1val:0x7; immval:0x7
+TEST_IMM_OP( addi, x4, x6, 0xe, 0x7, 0x7, x16, 64, x18)
+
+inst_9:
+// rs1==x21, rd==x8, rs1_val < 0 and imm_val > 0, rs1_val == -281474976710657
+// opcode: addi ; op1:x21; dest:x8; op1val:-0x1000000000001; immval:0x665
+TEST_IMM_OP( addi, x8, x21, 0xffff000000000664, -0x1000000000001, 0x665, x16, 72, x18)
+
+inst_10:
+// rs1==x10, rd==x13, imm_val == 2, rs1_val == 131072
+// opcode: addi ; op1:x10; dest:x13; op1val:0x20000; immval:0x2
+TEST_IMM_OP( addi, x13, x10, 0x20002, 0x20000, 0x2, x16, 80, x18)
+
+inst_11:
+// rs1==x25, rd==x22, imm_val == 8, rs1_val == -36028797018963969
+// opcode: addi ; op1:x25; dest:x22; op1val:-0x80000000000001; immval:0x8
+TEST_IMM_OP( addi, x22, x25, 0xff80000000000007, -0x80000000000001, 0x8, x16, 88, x18)
+
+inst_12:
+// rs1==x27, rd==x9, imm_val == 16, rs1_val == -8388609
+// opcode: addi ; op1:x27; dest:x9; op1val:-0x800001; immval:0x10
+TEST_IMM_OP( addi, x9, x27, 0xffffffffff80000f, -0x800001, 0x10, x16, 96, x18)
+
+inst_13:
+// rs1==x28, rd==x5, imm_val == 32, rs1_val == -18014398509481985
+// opcode: addi ; op1:x28; dest:x5; op1val:-0x40000000000001; immval:0x20
+TEST_IMM_OP( addi, x5, x28, 0xffc000000000001f, -0x40000000000001, 0x20, x16, 104, x18)
+
+inst_14:
+// rs1==x2, rd==x6, imm_val == 64, rs1_val == 17592186044416
+// opcode: addi ; op1:x2; dest:x6; op1val:0x100000000000; immval:0x40
+TEST_IMM_OP( addi, x6, x2, 0x100000000040, 0x100000000000, 0x40, x16, 112, x18)
+
+inst_15:
+// rs1==x9, rd==x11, imm_val == 128, rs1_val == 33554432
+// opcode: addi ; op1:x9; dest:x11; op1val:0x2000000; immval:0x80
+TEST_IMM_OP( addi, x11, x9, 0x2000080, 0x2000000, 0x80, x16, 120, x18)
+
+inst_16:
+// rs1==x11, rd==x20, imm_val == 256,
+// opcode: addi ; op1:x11; dest:x20; op1val:0x5555555555555554; immval:0x100
+TEST_IMM_OP( addi, x20, x11, 0x5555555555555654, 0x5555555555555554, 0x100, x16, 128, x18)
+
+inst_17:
+// rs1==x7, rd==x26, imm_val == 512, rs1_val == -4398046511105
+// opcode: addi ; op1:x7; dest:x26; op1val:-0x40000000001; immval:0x200
+TEST_IMM_OP( addi, x26, x7, 0xfffffc00000001ff, -0x40000000001, 0x200, x16, 136, x18)
+
+inst_18:
+// rs1==x13, rd==x0, imm_val == 1024, rs1_val == -17
+// opcode: addi ; op1:x13; dest:x0; op1val:-0x11; immval:0x400
+TEST_IMM_OP( addi, x0, x13, 0, -0x11, 0x400, x16, 144, x18)
+
+inst_19:
+// rs1==x29, rd==x28, imm_val == -2, rs1_val == -2147483649
+// opcode: addi ; op1:x29; dest:x28; op1val:-0x80000001; immval:-0x2
+TEST_IMM_OP( addi, x28, x29, 0xffffffff7ffffffd, -0x80000001, -0x2, x16, 152, x18)
+
+inst_20:
+// rs1==x24, rd==x2, imm_val == -3, rs1_val == -134217729
+// opcode: addi ; op1:x24; dest:x2; op1val:-0x8000001; immval:-0x3
+TEST_IMM_OP( addi, x2, x24, 0xfffffffff7fffffc, -0x8000001, -0x3, x16, 160, x18)
+
+inst_21:
+// rs1==x3, rd==x17, imm_val == -5, rs1_val == 536870912
+// opcode: addi ; op1:x3; dest:x17; op1val:0x20000000; immval:-0x5
+TEST_IMM_OP( addi, x17, x3, 0x1ffffffb, 0x20000000, -0x5, x16, 168, x18)
+
+inst_22:
+// rs1==x15, rd==x18, imm_val == -9,
+// opcode: addi ; op1:x15; dest:x18; op1val:0x6666666666666666; immval:-0x9
+TEST_IMM_OP( addi, x18, x15, 0x666666666666665d, 0x6666666666666666, -0x9, x16, 176, x6)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_23:
+// rs1==x23, rd==x14, imm_val == -17, rs1_val == 4
+// opcode: addi ; op1:x23; dest:x14; op1val:0x4; immval:-0x11
+TEST_IMM_OP( addi, x14, x23, 0xfffffffffffffff3, 0x4, -0x11, x2, 0, x6)
+
+inst_24:
+// rs1==x16, rd==x29, imm_val == -33, rs1_val == -8796093022209
+// opcode: addi ; op1:x16; dest:x29; op1val:-0x80000000001; immval:-0x21
+TEST_IMM_OP( addi, x29, x16, 0xfffff7ffffffffde, -0x80000000001, -0x21, x2, 8, x6)
+
+inst_25:
+// rs1==x18, rd==x3, imm_val == -65, rs1_val == -65
+// opcode: addi ; op1:x18; dest:x3; op1val:-0x41; immval:-0x41
+TEST_IMM_OP( addi, x3, x18, 0xffffffffffffff7e, -0x41, -0x41, x2, 16, x6)
+
+inst_26:
+// rs1==x12, rd==x7, imm_val == -257, rs1_val == -268435457
+// opcode: addi ; op1:x12; dest:x7; op1val:-0x10000001; immval:-0x101
+TEST_IMM_OP( addi, x7, x12, 0xffffffffeffffefe, -0x10000001, -0x101, x2, 24, x6)
+
+inst_27:
+// rs1==x20, rd==x16, imm_val == -1025,
+// opcode: addi ; op1:x20; dest:x16; op1val:-0x1; immval:-0x401
+TEST_IMM_OP( addi, x16, x20, 0xfffffffffffffbfe, -0x1, -0x401, x2, 32, x6)
+
+inst_28:
+// rs1==x5, rd==x31, imm_val == 1365, rs1_val == -129
+// opcode: addi ; op1:x5; dest:x31; op1val:-0x81; immval:0x555
+TEST_IMM_OP( addi, x31, x5, 0x4d4, -0x81, 0x555, x2, 40, x6)
+
+inst_29:
+// rs1==x4, rd==x27, imm_val == -1366, rs1_val == 262144
+// opcode: addi ; op1:x4; dest:x27; op1val:0x40000; immval:-0x556
+TEST_IMM_OP( addi, x27, x4, 0x3faaa, 0x40000, -0x556, x2, 48, x6)
+
+inst_30:
+// rs1==x31, rd==x23, rs1_val == 2,
+// opcode: addi ; op1:x31; dest:x23; op1val:0x2; immval:-0x11
+TEST_IMM_OP( addi, x23, x31, 0xfffffffffffffff1, 0x2, -0x11, x2, 56, x6)
+
+inst_31:
+// rs1==x8, rd==x1, rs1_val == 8,
+// opcode: addi ; op1:x8; dest:x1; op1val:0x8; immval:0x667
+TEST_IMM_OP( addi, x1, x8, 0x66f, 0x8, 0x667, x2, 64, x6)
+
+inst_32:
+// rs1_val == 16,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x10; immval:-0x7
+TEST_IMM_OP( addi, x11, x10, 0x9, 0x10, -0x7, x2, 72, x6)
+
+inst_33:
+// rs1_val == 32,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x20; immval:0x40
+TEST_IMM_OP( addi, x11, x10, 0x60, 0x20, 0x40, x2, 80, x6)
+
+inst_34:
+// rs1_val == 64,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x40; immval:0x40
+TEST_IMM_OP( addi, x11, x10, 0x80, 0x40, 0x40, x2, 88, x6)
+
+inst_35:
+// rs1_val == 128,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x80; immval:-0x201
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffe7f, 0x80, -0x201, x2, 96, x6)
+
+inst_36:
+// rs1_val == 256,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x100; immval:-0x8
+TEST_IMM_OP( addi, x11, x10, 0xf8, 0x100, -0x8, x2, 104, x6)
+
+inst_37:
+// rs1_val == 512,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x200; immval:0x8
+TEST_IMM_OP( addi, x11, x10, 0x208, 0x200, 0x8, x2, 112, x6)
+
+inst_38:
+// rs1_val == 1024,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x400; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x406, 0x400, 0x6, x2, 120, x6)
+
+inst_39:
+// rs1_val == 2048,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x800; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x800, 0x800, 0x0, x2, 128, x6)
+
+inst_40:
+// rs1_val == 4096,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x1000; immval:-0x1
+TEST_IMM_OP( addi, x11, x10, 0xfff, 0x1000, -0x1, x2, 136, x6)
+
+inst_41:
+// rs1_val == 8192,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2000; immval:-0x800
+TEST_IMM_OP( addi, x11, x10, 0x1800, 0x2000, -0x800, x2, 144, x6)
+
+inst_42:
+// rs1_val == 16384,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4000; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x4002, 0x4000, 0x2, x2, 152, x6)
+
+inst_43:
+// rs1_val == 32768,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x8000; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x8004, 0x8000, 0x4, x2, 160, x6)
+
+inst_44:
+// rs1_val == 65536,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x10000; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x10005, 0x10000, 0x5, x2, 168, x6)
+
+inst_45:
+// rs1_val == 524288,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x80000; immval:0x400
+TEST_IMM_OP( addi, x11, x10, 0x80400, 0x80000, 0x400, x2, 176, x6)
+
+inst_46:
+// rs1_val == 1048576,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x100000; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x10002e, 0x100000, 0x2e, x2, 184, x6)
+
+inst_47:
+// rs1_val == 2097152,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x200000; immval:-0x81
+TEST_IMM_OP( addi, x11, x10, 0x1fff7f, 0x200000, -0x81, x2, 192, x6)
+
+inst_48:
+// rs1_val == 8388608,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x800000; immval:0x80
+TEST_IMM_OP( addi, x11, x10, 0x800080, 0x800000, 0x80, x2, 200, x6)
+
+inst_49:
+// rs1_val == 16777216,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x1000000; immval:-0x21
+TEST_IMM_OP( addi, x11, x10, 0xffffdf, 0x1000000, -0x21, x2, 208, x6)
+
+inst_50:
+// rs1_val == 67108864,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4000000; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x4000004, 0x4000000, 0x4, x2, 216, x6)
+
+inst_51:
+// rs1_val == 134217728,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x8000000; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x7ffffd4, 0x8000000, -0x2c, x2, 224, x6)
+
+inst_52:
+// rs1_val == 268435456,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x10000000; immval:-0x11
+TEST_IMM_OP( addi, x11, x10, 0xfffffef, 0x10000000, -0x11, x2, 232, x6)
+
+inst_53:
+// rs1_val == 1073741824,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x40000000; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x40000000, 0x40000000, 0x0, x2, 240, x6)
+
+inst_54:
+// rs1_val == 2147483648,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x80000000; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x80000005, 0x80000000, 0x5, x2, 248, x6)
+
+inst_55:
+// rs1_val == 4294967296,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x100000000; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffaaa, 0x100000000, -0x556, x2, 256, x6)
+
+inst_56:
+// rs1_val == 8589934592,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x200000000; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x200000004, 0x200000000, 0x4, x2, 264, x6)
+
+inst_57:
+// rs1_val == 17179869184,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x400000000; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x400000004, 0x400000000, 0x4, x2, 272, x6)
+
+inst_58:
+// rs1_val == 34359738368,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x800000000; immval:-0x800
+TEST_IMM_OP( addi, x11, x10, 0x7fffff800, 0x800000000, -0x800, x2, 280, x6)
+
+inst_59:
+// rs1_val == 68719476736,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x1000000000; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x1000000665, 0x1000000000, 0x665, x2, 288, x6)
+
+inst_60:
+// rs1_val == 137438953472,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2000000000; immval:0x1
+TEST_IMM_OP( addi, x11, x10, 0x2000000001, 0x2000000000, 0x1, x2, 296, x6)
+
+inst_61:
+// rs1_val == 274877906944,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4000000000; immval:0x80
+TEST_IMM_OP( addi, x11, x10, 0x4000000080, 0x4000000000, 0x80, x2, 304, x6)
+
+inst_62:
+// rs1_val == 549755813888,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x8000000000; immval:-0x8
+TEST_IMM_OP( addi, x11, x10, 0x7ffffffff8, 0x8000000000, -0x8, x2, 312, x6)
+
+inst_63:
+// rs1_val == 1099511627776,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x10000000000; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x1000000002e, 0x10000000000, 0x2e, x2, 320, x6)
+
+inst_64:
+// rs1_val == 2199023255552,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x20000000000; immval:-0x101
+TEST_IMM_OP( addi, x11, x10, 0x1fffffffeff, 0x20000000000, -0x101, x2, 328, x6)
+
+inst_65:
+// rs1_val == 4398046511104,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x40000000000; immval:0x200
+TEST_IMM_OP( addi, x11, x10, 0x40000000200, 0x40000000000, 0x200, x2, 336, x6)
+
+inst_66:
+// rs1_val == 8796093022208,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x80000000000; immval:0x8
+TEST_IMM_OP( addi, x11, x10, 0x80000000008, 0x80000000000, 0x8, x2, 344, x6)
+
+inst_67:
+// rs1_val == 35184372088832,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x200000000000; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x200000000002, 0x200000000000, 0x2, x2, 352, x6)
+
+inst_68:
+// rs1_val == 70368744177664,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x400000000000; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x400000000554, 0x400000000000, 0x554, x2, 360, x6)
+
+inst_69:
+// rs1_val == 140737488355328,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x800000000000; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x800000000004, 0x800000000000, 0x4, x2, 368, x6)
+
+inst_70:
+// rs1_val == 281474976710656,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x1000000000000; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x100000000002d, 0x1000000000000, 0x2d, x2, 376, x6)
+
+inst_71:
+// rs1_val == 562949953421312,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2000000000000; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x2000000000332, 0x2000000000000, 0x332, x2, 384, x6)
+
+inst_72:
+// rs1_val == 1125899906842624,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4000000000000; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x4000000000555, 0x4000000000000, 0x555, x2, 392, x6)
+
+inst_73:
+// rs1_val == 2251799813685248,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x8000000000000; immval:0x9
+TEST_IMM_OP( addi, x11, x10, 0x8000000000009, 0x8000000000000, 0x9, x2, 400, x6)
+
+inst_74:
+// rs1_val == 4503599627370496,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x10000000000000; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x10000000000000, 0x10000000000000, 0x0, x2, 408, x6)
+
+inst_75:
+// rs1_val == 9007199254740992,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x20000000000000; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x20000000000554, 0x20000000000000, 0x554, x2, 416, x6)
+
+inst_76:
+// rs1_val == 36028797018963968,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x80000000000000; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x80000000000000, 0x80000000000000, 0x0, x2, 424, x6)
+
+inst_77:
+// rs1_val == 72057594037927936,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x100000000000000; immval:-0x201
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffdff, 0x100000000000000, -0x201, x2, 432, x6)
+
+inst_78:
+// rs1_val == 144115188075855872,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x200000000000000; immval:-0x800
+TEST_IMM_OP( addi, x11, x10, 0x1fffffffffff800, 0x200000000000000, -0x800, x2, 440, x6)
+
+inst_79:
+// rs1_val == 288230376151711744,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x400000000000000; immval:0x80
+TEST_IMM_OP( addi, x11, x10, 0x400000000000080, 0x400000000000000, 0x80, x2, 448, x6)
+
+inst_80:
+// rs1_val == 576460752303423488,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x800000000000000; immval:-0x81
+TEST_IMM_OP( addi, x11, x10, 0x7ffffffffffff7f, 0x800000000000000, -0x81, x2, 456, x6)
+
+inst_81:
+// rs1_val == 1152921504606846976,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x1000000000000000; immval:-0x1
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffff, 0x1000000000000000, -0x1, x2, 464, x6)
+
+inst_82:
+// rs1_val == 2305843009213693952,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2000000000000000; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x2000000000000002, 0x2000000000000000, 0x2, x2, 472, x6)
+
+inst_83:
+// rs1_val == 4611686018427387904,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4000000000000000; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x4000000000000555, 0x4000000000000000, 0x555, x2, 480, x6)
+
+inst_84:
+// rs1_val == -2,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x2; immval:-0x2
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffffc, -0x2, -0x2, x2, 488, x6)
+
+inst_85:
+// rs1_val == -3,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x3; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x2, -0x3, 0x5, x2, 496, x6)
+
+inst_86:
+// rs1_val == -5,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x660, -0x5, 0x665, x2, 504, x6)
+
+inst_87:
+// rs1_val == -9,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x9; immval:-0x201
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffdf6, -0x9, -0x201, x2, 512, x6)
+
+inst_88:
+// rs1_val == -33,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x21; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xd, -0x21, 0x2e, x2, 520, x6)
+
+inst_89:
+// rs1_val == -257,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x101; immval:0x10
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffff0f, -0x101, 0x10, x2, 528, x6)
+
+inst_90:
+// rs1_val == -513,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x201; immval:-0x8
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffdf7, -0x201, -0x8, x2, 536, x6)
+
+inst_91:
+// rs1_val == -1025,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x401; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x266, -0x401, 0x667, x2, 544, x6)
+
+inst_92:
+// rs1_val == -2049,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x801; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffff802, -0x801, 0x3, x2, 552, x6)
+
+inst_93:
+// rs1_val == -8193,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x2001; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffdfd2, -0x2001, -0x2d, x2, 560, x6)
+
+inst_94:
+// rs1_val == -16385,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x4001; immval:0x400
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffc3ff, -0x4001, 0x400, x2, 568, x6)
+
+inst_95:
+// rs1_val == -32769,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x8001; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffff8664, -0x8001, 0x665, x2, 576, x6)
+
+inst_96:
+// rs1_val == -131073,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x20001; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffdfaa9, -0x20001, -0x556, x2, 584, x6)
+
+inst_97:
+// rs1_val == -262145,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x40001; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffc0004, -0x40001, 0x5, x2, 592, x6)
+
+inst_98:
+// rs1_val == -524289,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x80001; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffff80333, -0x80001, 0x334, x2, 600, x6)
+
+inst_99:
+// rs1_val == -1048577,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x100001; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffff00004, -0x100001, 0x5, x2, 608, x6)
+
+inst_100:
+// rs1_val == -2097153,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x200001; immval:-0x11
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffdfffee, -0x200001, -0x11, x2, 616, x6)
+
+inst_101:
+// rs1_val == -4194305,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x400001; immval:0x7ff
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffc007fe, -0x400001, 0x7ff, x2, 624, x6)
+
+inst_102:
+// rs1_val == -16777217,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x1000001; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffefffaa9, -0x1000001, -0x556, x2, 632, x6)
+
+inst_103:
+// rs1_val == -33554433,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x2000001; immval:-0x2
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffdfffffd, -0x2000001, -0x2, x2, 640, x6)
+
+inst_104:
+// rs1_val == -67108865,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x4000001; immval:0x80
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffc00007f, -0x4000001, 0x80, x2, 648, x6)
+
+inst_105:
+// rs1_val == -536870913,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x20000001; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xffffffffdfffffff, -0x20000001, 0x0, x2, 656, x6)
+
+inst_106:
+// rs1_val == -1073741825,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x40000001; immval:-0x1
+TEST_IMM_OP( addi, x11, x10, 0xffffffffbffffffe, -0x40000001, -0x1, x2, 664, x6)
+
+inst_107:
+// rs1_val == -4294967297,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x100000001; immval:-0xa
+TEST_IMM_OP( addi, x11, x10, 0xfffffffefffffff5, -0x100000001, -0xa, x2, 672, x6)
+
+inst_108:
+// rs1_val == -8589934593,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x200000001; immval:-0x3
+TEST_IMM_OP( addi, x11, x10, 0xfffffffdfffffffc, -0x200000001, -0x3, x2, 680, x6)
+
+inst_109:
+// rs1_val == -17179869185,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x400000001; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xfffffffc00000004, -0x400000001, 0x5, x2, 688, x6)
+
+inst_110:
+// rs1_val == -34359738369,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x800000001; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xfffffff800000333, -0x800000001, 0x334, x2, 696, x6)
+
+inst_111:
+// rs1_val == -68719476737,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x1000000001; immval:-0x101
+TEST_IMM_OP( addi, x11, x10, 0xffffffeffffffefe, -0x1000000001, -0x101, x2, 704, x6)
+
+inst_112:
+// rs1_val == -137438953473,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x2000000001; immval:0x40
+TEST_IMM_OP( addi, x11, x10, 0xffffffe00000003f, -0x2000000001, 0x40, x2, 712, x6)
+
+inst_113:
+// rs1_val == -274877906945,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x4000000001; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffbfffffffd3, -0x4000000001, -0x2c, x2, 720, x6)
+
+inst_114:
+// rs1_val == -549755813889,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x8000000001; immval:-0x201
+TEST_IMM_OP( addi, x11, x10, 0xffffff7ffffffdfe, -0x8000000001, -0x201, x2, 728, x6)
+
+inst_115:
+// rs1_val == -1099511627777,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x10000000001; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xffffff000000002d, -0x10000000001, 0x2e, x2, 736, x6)
+
+inst_116:
+// rs1_val == -2199023255553,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x20000000001; immval:-0x81
+TEST_IMM_OP( addi, x11, x10, 0xfffffdffffffff7e, -0x20000000001, -0x81, x2, 744, x6)
+
+inst_117:
+// rs1_val == -17592186044417,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x100000000001; immval:0x7ff
+TEST_IMM_OP( addi, x11, x10, 0xfffff000000007fe, -0x100000000001, 0x7ff, x2, 752, x6)
+
+inst_118:
+// rs1_val == -35184372088833,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x200000000001; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xffffe00000000554, -0x200000000001, 0x555, x2, 760, x6)
+
+inst_119:
+// rs1_val == -70368744177665,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x400000000001; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xffffc00000000002, -0x400000000001, 0x3, x2, 768, x6)
+
+inst_120:
+// rs1_val == -140737488355329,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x800000000001; immval:-0x800
+TEST_IMM_OP( addi, x11, x10, 0xffff7ffffffff7ff, -0x800000000001, -0x800, x2, 776, x6)
+
+inst_121:
+// rs1_val == -562949953421313,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x2000000000001; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xfffe000000000666, -0x2000000000001, 0x667, x2, 784, x6)
+
+inst_122:
+// rs1_val == -1125899906842625,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x4000000000001; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xfffc000000000003, -0x4000000000001, 0x4, x2, 792, x6)
+
+inst_123:
+// rs1_val == -2251799813685249,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x8000000000001; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xfff7ffffffffffd2, -0x8000000000001, -0x2d, x2, 800, x6)
+
+inst_124:
+// rs1_val == -4503599627370497,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x10000000000001; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xfff0000000000332, -0x10000000000001, 0x333, x2, 808, x6)
+
+inst_125:
+// rs1_val == -9007199254740993,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x20000000000001; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xffe0000000000554, -0x20000000000001, 0x555, x2, 816, x6)
+
+inst_126:
+// rs1_val == -72057594037927937,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x100000000000001; immval:-0x2
+TEST_IMM_OP( addi, x11, x10, 0xfefffffffffffffd, -0x100000000000001, -0x2, x2, 824, x6)
+
+inst_127:
+// rs1_val == -144115188075855873,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x200000000000001; immval:0x400
+TEST_IMM_OP( addi, x11, x10, 0xfe000000000003ff, -0x200000000000001, 0x400, x2, 832, x6)
+
+inst_128:
+// rs1_val == -288230376151711745,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x400000000000001; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xfbffffffffffffff, -0x400000000000001, 0x0, x2, 840, x6)
+
+inst_129:
+// rs1_val == -576460752303423489,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x800000000000001; immval:-0x81
+TEST_IMM_OP( addi, x11, x10, 0xf7ffffffffffff7e, -0x800000000000001, -0x81, x2, 848, x6)
+
+inst_130:
+// rs1_val == -1152921504606846977,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x1000000000000001; immval:0x10
+TEST_IMM_OP( addi, x11, x10, 0xf00000000000000f, -0x1000000000000001, 0x10, x2, 856, x6)
+
+inst_131:
+// rs1_val == -2305843009213693953,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x2000000000000001; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xe000000000000002, -0x2000000000000001, 0x3, x2, 864, x6)
+
+inst_132:
+// rs1_val == -4611686018427387905,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x4000000000000001; immval:-0x201
+TEST_IMM_OP( addi, x11, x10, 0xbffffffffffffdfe, -0x4000000000000001, -0x201, x2, 872, x6)
+
+inst_133:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205 and imm_val==6
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x555555555555555b, 0x5555555555555555, 0x6, x2, 880, x6)
+
+inst_134:
+// rs1_val == -6148914691236517206,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x8
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaab2, -0x5555555555555556, 0x8, x2, 888, x6)
+
+inst_135:
+// rs1_val==3 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x6, 0x3, 0x3, x2, 896, x6)
+
+inst_136:
+// rs1_val==3 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x558, 0x3, 0x555, x2, 904, x6)
+
+inst_137:
+// rs1_val==3 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffaad, 0x3, -0x556, x2, 912, x6)
+
+inst_138:
+// rs1_val==3 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x8, 0x3, 0x5, x2, 920, x6)
+
+inst_139:
+// rs1_val==3 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x336, 0x3, 0x333, x2, 928, x6)
+
+inst_140:
+// rs1_val==3 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x669, 0x3, 0x666, x2, 936, x6)
+
+inst_141:
+// rs1_val==3 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffffd6, 0x3, -0x2d, x2, 944, x6)
+
+inst_142:
+// rs1_val==3 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x30, 0x3, 0x2d, x2, 952, x6)
+
+inst_143:
+// rs1_val==3 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x5, 0x3, 0x2, x2, 960, x6)
+
+inst_144:
+// rs1_val==3 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x557, 0x3, 0x554, x2, 968, x6)
+
+inst_145:
+// rs1_val==3 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x3, 0x3, 0x0, x2, 976, x6)
+
+inst_146:
+// rs1_val==3 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x7, 0x3, 0x4, x2, 984, x6)
+
+inst_147:
+// rs1_val==3 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x335, 0x3, 0x332, x2, 992, x6)
+
+inst_148:
+// rs1_val==3 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x668, 0x3, 0x665, x2, 1000, x6)
+
+inst_149:
+// rs1_val==3 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x2f, 0x3, 0x2c, x2, 1008, x6)
+
+inst_150:
+// rs1_val==3 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x559, 0x3, 0x556, x2, 1016, x6)
+
+inst_151:
+// rs1_val==3 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffaae, 0x3, -0x555, x2, 1024, x6)
+
+inst_152:
+// rs1_val==3 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x9, 0x3, 0x6, x2, 1032, x6)
+
+inst_153:
+// rs1_val==3 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x337, 0x3, 0x334, x2, 1040, x6)
+
+inst_154:
+// rs1_val==3 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x66a, 0x3, 0x667, x2, 1048, x6)
+
+inst_155:
+// rs1_val==3 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffffd7, 0x3, -0x2c, x2, 1056, x6)
+
+inst_156:
+// rs1_val==3 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x31, 0x3, 0x2e, x2, 1064, x6)
+
+inst_157:
+// rs1_val==6148914691236517205 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555558, 0x5555555555555555, 0x3, x2, 1072, x6)
+
+inst_158:
+// rs1_val==6148914691236517205 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555aaa, 0x5555555555555555, 0x555, x2, 1080, x6)
+
+inst_159:
+// rs1_val==6148914691236517205 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x5555555555554fff, 0x5555555555555555, -0x556, x2, 1088, x6)
+
+inst_160:
+// rs1_val==6148914691236517205 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x555555555555555a, 0x5555555555555555, 0x5, x2, 1096, x6)
+
+inst_161:
+// rs1_val==6148914691236517205 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555888, 0x5555555555555555, 0x333, x2, 1104, x6)
+
+inst_162:
+// rs1_val==6148914691236517205 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555bbb, 0x5555555555555555, 0x666, x2, 1112, x6)
+
+inst_163:
+// rs1_val==6148914691236517205 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555528, 0x5555555555555555, -0x2d, x2, 1120, x6)
+
+inst_164:
+// rs1_val==6148914691236517205 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555582, 0x5555555555555555, 0x2d, x2, 1128, x6)
+
+inst_165:
+// rs1_val==6148914691236517205 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555557, 0x5555555555555555, 0x2, x2, 1136, x6)
+
+inst_166:
+// rs1_val==6148914691236517205 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555aa9, 0x5555555555555555, 0x554, x2, 1144, x6)
+
+inst_167:
+// rs1_val==6148914691236517205 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555555, 0x5555555555555555, 0x0, x2, 1152, x6)
+
+inst_168:
+// rs1_val==6148914691236517205 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555559, 0x5555555555555555, 0x4, x2, 1160, x6)
+
+inst_169:
+// rs1_val==6148914691236517205 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555887, 0x5555555555555555, 0x332, x2, 1168, x6)
+
+inst_170:
+// rs1_val==6148914691236517205 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555bba, 0x5555555555555555, 0x665, x2, 1176, x6)
+
+inst_171:
+// rs1_val==6148914691236517205 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555581, 0x5555555555555555, 0x2c, x2, 1184, x6)
+
+inst_172:
+// rs1_val==6148914691236517205 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555aab, 0x5555555555555555, 0x556, x2, 1192, x6)
+
+inst_173:
+// rs1_val==6148914691236517205 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555000, 0x5555555555555555, -0x555, x2, 1200, x6)
+
+inst_174:
+// rs1_val==6148914691236517205 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555889, 0x5555555555555555, 0x334, x2, 1208, x6)
+
+inst_175:
+// rs1_val==6148914691236517205 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555bbc, 0x5555555555555555, 0x667, x2, 1216, x6)
+
+inst_176:
+// rs1_val==6148914691236517205 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555529, 0x5555555555555555, -0x2c, x2, 1224, x6)
+
+inst_177:
+// rs1_val==6148914691236517205 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555583, 0x5555555555555555, 0x2e, x2, 1232, x6)
+
+inst_178:
+// rs1_val==-6148914691236517206 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaaad, -0x5555555555555556, 0x3, x2, 1240, x6)
+
+inst_179:
+// rs1_val==-6148914691236517206 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaafff, -0x5555555555555556, 0x555, x2, 1248, x6)
+
+inst_180:
+// rs1_val==-6148914691236517206 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaa554, -0x5555555555555556, -0x556, x2, 1256, x6)
+
+inst_181:
+// rs1_val==-6148914691236517206 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555556, 0x5, x2, 1264, x6)
+
+inst_182:
+// rs1_val==-6148914691236517206 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaddd, -0x5555555555555556, 0x333, x2, 1272, x6)
+
+inst_183:
+// rs1_val==-6148914691236517206 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaab110, -0x5555555555555556, 0x666, x2, 1280, x6)
+
+inst_184:
+// rs1_val==-6148914691236517206 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaa7d, -0x5555555555555556, -0x2d, x2, 1288, x6)
+
+inst_185:
+// rs1_val==-6148914691236517206 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaad7, -0x5555555555555556, 0x2d, x2, 1296, x6)
+
+inst_186:
+// rs1_val==-6148914691236517206 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaaac, -0x5555555555555556, 0x2, x2, 1304, x6)
+
+inst_187:
+// rs1_val==-6148914691236517206 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaffe, -0x5555555555555556, 0x554, x2, 1312, x6)
+
+inst_188:
+// rs1_val==-6148914691236517206 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x0, x2, 1320, x6)
+
+inst_189:
+// rs1_val==-6148914691236517206 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x4, x2, 1328, x6)
+
+inst_190:
+// rs1_val==-6148914691236517206 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaddc, -0x5555555555555556, 0x332, x2, 1336, x6)
+
+inst_191:
+// rs1_val==-6148914691236517206 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaab10f, -0x5555555555555556, 0x665, x2, 1344, x6)
+
+inst_192:
+// rs1_val==-6148914691236517206 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaad6, -0x5555555555555556, 0x2c, x2, 1352, x6)
+
+inst_193:
+// rs1_val==-6148914691236517206 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaab000, -0x5555555555555556, 0x556, x2, 1360, x6)
+
+inst_194:
+// rs1_val==-6148914691236517206 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaa555, -0x5555555555555556, -0x555, x2, 1368, x6)
+
+inst_195:
+// rs1_val==-6148914691236517206 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaab0, -0x5555555555555556, 0x6, x2, 1376, x6)
+
+inst_196:
+// rs1_val==-6148914691236517206 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaadde, -0x5555555555555556, 0x334, x2, 1384, x6)
+
+inst_197:
+// rs1_val==-6148914691236517206 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaab111, -0x5555555555555556, 0x667, x2, 1392, x6)
+
+inst_198:
+// rs1_val==-6148914691236517206 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaa7e, -0x5555555555555556, -0x2c, x2, 1400, x6)
+
+inst_199:
+// rs1_val==-6148914691236517206 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaad8, -0x5555555555555556, 0x2e, x2, 1408, x6)
+
+inst_200:
+// rs1_val==5 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x8, 0x5, 0x3, x2, 1416, x6)
+
+inst_201:
+// rs1_val==5 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x55a, 0x5, 0x555, x2, 1424, x6)
+
+inst_202:
+// rs1_val==5 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffaaf, 0x5, -0x556, x2, 1432, x6)
+
+inst_203:
+// rs1_val==5 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xa, 0x5, 0x5, x2, 1440, x6)
+
+inst_204:
+// rs1_val==5 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x338, 0x5, 0x333, x2, 1448, x6)
+
+inst_205:
+// rs1_val==5 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x66b, 0x5, 0x666, x2, 1456, x6)
+
+inst_206:
+// rs1_val==5 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffffd8, 0x5, -0x2d, x2, 1464, x6)
+
+inst_207:
+// rs1_val==5 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x32, 0x5, 0x2d, x2, 1472, x6)
+
+inst_208:
+// rs1_val==5 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x7, 0x5, 0x2, x2, 1480, x6)
+
+inst_209:
+// rs1_val==5 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x559, 0x5, 0x554, x2, 1488, x6)
+
+inst_210:
+// rs1_val==5 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x5, 0x5, 0x0, x2, 1496, x6)
+
+inst_211:
+// rs1_val==5 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x9, 0x5, 0x4, x2, 1504, x6)
+
+inst_212:
+// rs1_val==5 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x337, 0x5, 0x332, x2, 1512, x6)
+
+inst_213:
+// rs1_val==5 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x66a, 0x5, 0x665, x2, 1520, x6)
+
+inst_214:
+// rs1_val==5 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x31, 0x5, 0x2c, x2, 1528, x6)
+
+inst_215:
+// rs1_val==5 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x55b, 0x5, 0x556, x2, 1536, x6)
+
+inst_216:
+// rs1_val==5 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffab0, 0x5, -0x555, x2, 1544, x6)
+
+inst_217:
+// rs1_val==5 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xb, 0x5, 0x6, x2, 1552, x6)
+
+inst_218:
+// rs1_val==5 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x339, 0x5, 0x334, x2, 1560, x6)
+
+inst_219:
+// rs1_val==5 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x66c, 0x5, 0x667, x2, 1568, x6)
+
+inst_220:
+// rs1_val==5 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffffd9, 0x5, -0x2c, x2, 1576, x6)
+
+inst_221:
+// rs1_val==5 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x33, 0x5, 0x2e, x2, 1584, x6)
+
+inst_222:
+// rs1_val==3689348814741910323 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333336, 0x3333333333333333, 0x3, x2, 1592, x6)
+
+inst_223:
+// rs1_val==3689348814741910323 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333888, 0x3333333333333333, 0x555, x2, 1600, x6)
+
+inst_224:
+// rs1_val==3689348814741910323 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x3333333333332ddd, 0x3333333333333333, -0x556, x2, 1608, x6)
+
+inst_225:
+// rs1_val==3689348814741910323 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333338, 0x3333333333333333, 0x5, x2, 1616, x6)
+
+inst_226:
+// rs1_val==3689348814741910323 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333666, 0x3333333333333333, 0x333, x2, 1624, x6)
+
+inst_227:
+// rs1_val==3689348814741910323 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333999, 0x3333333333333333, 0x666, x2, 1632, x6)
+
+inst_228:
+// rs1_val==3689348814741910323 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333306, 0x3333333333333333, -0x2d, x2, 1640, x6)
+
+inst_229:
+// rs1_val==3689348814741910323 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333360, 0x3333333333333333, 0x2d, x2, 1648, x6)
+
+inst_230:
+// rs1_val==3689348814741910323 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333335, 0x3333333333333333, 0x2, x2, 1656, x6)
+
+inst_231:
+// rs1_val==3689348814741910323 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333887, 0x3333333333333333, 0x554, x2, 1664, x6)
+
+inst_232:
+// rs1_val==3689348814741910323 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333333, 0x3333333333333333, 0x0, x2, 1672, x6)
+
+inst_233:
+// rs1_val==3689348814741910323 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333337, 0x3333333333333333, 0x4, x2, 1680, x6)
+
+inst_234:
+// rs1_val==3689348814741910323 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333665, 0x3333333333333333, 0x332, x2, 1688, x6)
+
+inst_235:
+// rs1_val==3689348814741910323 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333998, 0x3333333333333333, 0x665, x2, 1696, x6)
+
+inst_236:
+// rs1_val==3689348814741910323 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x333333333333335f, 0x3333333333333333, 0x2c, x2, 1704, x6)
+
+inst_237:
+// rs1_val==3689348814741910323 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333889, 0x3333333333333333, 0x556, x2, 1712, x6)
+
+inst_238:
+// rs1_val==3689348814741910323 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x3333333333332dde, 0x3333333333333333, -0x555, x2, 1720, x6)
+
+inst_239:
+// rs1_val==3689348814741910323 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333339, 0x3333333333333333, 0x6, x2, 1728, x6)
+
+inst_240:
+// rs1_val==3689348814741910323 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333667, 0x3333333333333333, 0x334, x2, 1736, x6)
+
+inst_241:
+// rs1_val==3689348814741910323 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x333333333333399a, 0x3333333333333333, 0x667, x2, 1744, x6)
+
+inst_242:
+// rs1_val==3689348814741910323 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333307, 0x3333333333333333, -0x2c, x2, 1752, x6)
+
+inst_243:
+// rs1_val==3689348814741910323 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333361, 0x3333333333333333, 0x2e, x2, 1760, x6)
+
+inst_244:
+// rs1_val==7378697629483820646 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666669, 0x6666666666666666, 0x3, x2, 1768, x6)
+
+inst_245:
+// rs1_val==7378697629483820646 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666bbb, 0x6666666666666666, 0x555, x2, 1776, x6)
+
+inst_246:
+// rs1_val==7378697629483820646 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666110, 0x6666666666666666, -0x556, x2, 1784, x6)
+
+inst_247:
+// rs1_val==7378697629483820646 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x666666666666666b, 0x6666666666666666, 0x5, x2, 1792, x6)
+
+inst_248:
+// rs1_val==7378697629483820646 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666999, 0x6666666666666666, 0x333, x2, 1800, x6)
+
+inst_249:
+// rs1_val==7378697629483820646 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666ccc, 0x6666666666666666, 0x666, x2, 1808, x6)
+
+inst_250:
+// rs1_val==7378697629483820646 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666639, 0x6666666666666666, -0x2d, x2, 1816, x6)
+
+inst_251:
+// rs1_val==7378697629483820646 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666693, 0x6666666666666666, 0x2d, x2, 1824, x6)
+
+inst_252:
+// rs1_val==7378697629483820646 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666668, 0x6666666666666666, 0x2, x2, 1832, x6)
+
+inst_253:
+// rs1_val==7378697629483820646 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666bba, 0x6666666666666666, 0x554, x2, 1840, x6)
+
+inst_254:
+// rs1_val==7378697629483820646 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666666, 0x6666666666666666, 0x0, x2, 1848, x6)
+
+inst_255:
+// rs1_val==7378697629483820646 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x666666666666666a, 0x6666666666666666, 0x4, x2, 1856, x6)
+
+inst_256:
+// rs1_val==7378697629483820646 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666998, 0x6666666666666666, 0x332, x2, 1864, x6)
+
+inst_257:
+// rs1_val==7378697629483820646 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666ccb, 0x6666666666666666, 0x665, x2, 1872, x6)
+
+inst_258:
+// rs1_val==7378697629483820646 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666692, 0x6666666666666666, 0x2c, x2, 1880, x6)
+
+inst_259:
+// rs1_val==7378697629483820646 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666bbc, 0x6666666666666666, 0x556, x2, 1888, x6)
+
+inst_260:
+// rs1_val==7378697629483820646 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666111, 0x6666666666666666, -0x555, x2, 1896, x6)
+
+inst_261:
+// rs1_val==7378697629483820646 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x666666666666666c, 0x6666666666666666, 0x6, x2, 1904, x6)
+
+inst_262:
+// rs1_val==7378697629483820646 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x666666666666699a, 0x6666666666666666, 0x334, x2, 1912, x6)
+
+inst_263:
+// rs1_val==7378697629483820646 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666ccd, 0x6666666666666666, 0x667, x2, 1920, x6)
+
+inst_264:
+// rs1_val==7378697629483820646 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x666666666666663a, 0x6666666666666666, -0x2c, x2, 1928, x6)
+
+inst_265:
+// rs1_val==7378697629483820646 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666694, 0x6666666666666666, 0x2e, x2, 1936, x6)
+
+inst_266:
+// rs1_val==-3037000499 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cd0, -0xb504f333, 0x3, x2, 1944, x6)
+
+inst_267:
+// rs1_val==-3037000499 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1222, -0xb504f333, 0x555, x2, 1952, x6)
+
+inst_268:
+// rs1_val==-3037000499 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0777, -0xb504f333, -0x556, x2, 1960, x6)
+
+inst_269:
+// rs1_val==-3037000499 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cd2, -0xb504f333, 0x5, x2, 1968, x6)
+
+inst_270:
+// rs1_val==-3037000499 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1000, -0xb504f333, 0x333, x2, 1976, x6)
+
+inst_271:
+// rs1_val==-3037000499 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1333, -0xb504f333, 0x666, x2, 1984, x6)
+
+inst_272:
+// rs1_val==-3037000499 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0ca0, -0xb504f333, -0x2d, x2, 1992, x6)
+
+inst_273:
+// rs1_val==-3037000499 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cfa, -0xb504f333, 0x2d, x2, 2000, x6)
+
+inst_274:
+// rs1_val==-3037000499 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0ccf, -0xb504f333, 0x2, x2, 2008, x6)
+
+inst_275:
+// rs1_val==-3037000499 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1221, -0xb504f333, 0x554, x2, 2016, x6)
+
+inst_276:
+// rs1_val==-3037000499 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0ccd, -0xb504f333, 0x0, x2, 2024, x6)
+
+inst_277:
+// rs1_val==-3037000499 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cd1, -0xb504f333, 0x4, x2, 2032, x6)
+
+inst_278:
+// rs1_val==-3037000499 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0fff, -0xb504f333, 0x332, x2, 2040, x6)
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_279:
+// rs1_val==-3037000499 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1332, -0xb504f333, 0x665, x2, 0, x6)
+
+inst_280:
+// rs1_val==-3037000499 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cf9, -0xb504f333, 0x2c, x2, 8, x6)
+
+inst_281:
+// rs1_val==-3037000499 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1223, -0xb504f333, 0x556, x2, 16, x6)
+
+inst_282:
+// rs1_val==-3037000499 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0778, -0xb504f333, -0x555, x2, 24, x6)
+
+inst_283:
+// rs1_val==-3037000499 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cd3, -0xb504f333, 0x6, x2, 32, x6)
+
+inst_284:
+// rs1_val==-3037000499 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1001, -0xb504f333, 0x334, x2, 40, x6)
+
+inst_285:
+// rs1_val==-3037000499 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1334, -0xb504f333, 0x667, x2, 48, x6)
+
+inst_286:
+// rs1_val==-3037000499 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0ca1, -0xb504f333, -0x2c, x2, 56, x6)
+
+inst_287:
+// rs1_val==-3037000499 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cfb, -0xb504f333, 0x2e, x2, 64, x6)
+
+inst_288:
+// rs1_val==3037000499 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xb504f336, 0xb504f333, 0x3, x2, 72, x6)
+
+inst_289:
+// rs1_val==3037000499 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xb504f888, 0xb504f333, 0x555, x2, 80, x6)
+
+inst_290:
+// rs1_val==3037000499 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xb504eddd, 0xb504f333, -0x556, x2, 88, x6)
+
+inst_291:
+// rs1_val==3037000499 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xb504f338, 0xb504f333, 0x5, x2, 96, x6)
+
+inst_292:
+// rs1_val==3037000499 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xb504f666, 0xb504f333, 0x333, x2, 104, x6)
+
+inst_293:
+// rs1_val==3037000499 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xb504f999, 0xb504f333, 0x666, x2, 112, x6)
+
+inst_294:
+// rs1_val==3037000499 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xb504f306, 0xb504f333, -0x2d, x2, 120, x6)
+
+inst_295:
+// rs1_val==3037000499 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xb504f360, 0xb504f333, 0x2d, x2, 128, x6)
+
+inst_296:
+// rs1_val==3037000499 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xb504f335, 0xb504f333, 0x2, x2, 136, x6)
+
+inst_297:
+// rs1_val==3037000499 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xb504f887, 0xb504f333, 0x554, x2, 144, x6)
+
+inst_298:
+// rs1_val==3037000499 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xb504f333, 0xb504f333, 0x0, x2, 152, x6)
+
+inst_299:
+// rs1_val==3037000499 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xb504f337, 0xb504f333, 0x4, x2, 160, x6)
+
+inst_300:
+// rs1_val==3037000499 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xb504f665, 0xb504f333, 0x332, x2, 168, x6)
+
+inst_301:
+// rs1_val==3037000499 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xb504f998, 0xb504f333, 0x665, x2, 176, x6)
+
+inst_302:
+// rs1_val==3037000499 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xb504f35f, 0xb504f333, 0x2c, x2, 184, x6)
+
+inst_303:
+// rs1_val==3037000499 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xb504f889, 0xb504f333, 0x556, x2, 192, x6)
+
+inst_304:
+// rs1_val==3037000499 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xb504edde, 0xb504f333, -0x555, x2, 200, x6)
+
+inst_305:
+// rs1_val==3037000499 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xb504f339, 0xb504f333, 0x6, x2, 208, x6)
+
+inst_306:
+// rs1_val==3037000499 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xb504f667, 0xb504f333, 0x334, x2, 216, x6)
+
+inst_307:
+// rs1_val==3037000499 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xb504f99a, 0xb504f333, 0x667, x2, 224, x6)
+
+inst_308:
+// rs1_val==3037000499 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xb504f307, 0xb504f333, -0x2c, x2, 232, x6)
+
+inst_309:
+// rs1_val==3037000499 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xb504f361, 0xb504f333, 0x2e, x2, 240, x6)
+
+inst_310:
+// rs1_val==2 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x5, 0x2, 0x3, x2, 248, x6)
+
+inst_311:
+// rs1_val==2 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x557, 0x2, 0x555, x2, 256, x6)
+
+inst_312:
+// rs1_val==2 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffaac, 0x2, -0x556, x2, 264, x6)
+
+inst_313:
+// rs1_val==2 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x7, 0x2, 0x5, x2, 272, x6)
+
+inst_314:
+// rs1_val==2 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x335, 0x2, 0x333, x2, 280, x6)
+
+inst_315:
+// rs1_val==2 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x668, 0x2, 0x666, x2, 288, x6)
+
+inst_316:
+// rs1_val==2 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffffd5, 0x2, -0x2d, x2, 296, x6)
+
+inst_317:
+// rs1_val==2 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x2f, 0x2, 0x2d, x2, 304, x6)
+
+inst_318:
+// rs1_val==2 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x4, 0x2, 0x2, x2, 312, x6)
+
+inst_319:
+// rs1_val==2 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x556, 0x2, 0x554, x2, 320, x6)
+
+inst_320:
+// rs1_val==2 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x2, 0x2, 0x0, x2, 328, x6)
+
+inst_321:
+// rs1_val==2 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x6, 0x2, 0x4, x2, 336, x6)
+
+inst_322:
+// rs1_val==2 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x334, 0x2, 0x332, x2, 344, x6)
+
+inst_323:
+// rs1_val==2 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x667, 0x2, 0x665, x2, 352, x6)
+
+inst_324:
+// rs1_val==2 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x2e, 0x2, 0x2c, x2, 360, x6)
+
+inst_325:
+// rs1_val==2 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x558, 0x2, 0x556, x2, 368, x6)
+
+inst_326:
+// rs1_val==2 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffaad, 0x2, -0x555, x2, 376, x6)
+
+inst_327:
+// rs1_val==2 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x8, 0x2, 0x6, x2, 384, x6)
+
+inst_328:
+// rs1_val==2 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x336, 0x2, 0x334, x2, 392, x6)
+
+inst_329:
+// rs1_val==2 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x669, 0x2, 0x667, x2, 400, x6)
+
+inst_330:
+// rs1_val==2 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffffd6, 0x2, -0x2c, x2, 408, x6)
+
+inst_331:
+// rs1_val==2 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x2; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x30, 0x2, 0x2e, x2, 416, x6)
+
+inst_332:
+// rs1_val==6148914691236517204 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555557, 0x5555555555555554, 0x3, x2, 424, x6)
+
+inst_333:
+// rs1_val==6148914691236517204 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555aa9, 0x5555555555555554, 0x555, x2, 432, x6)
+
+inst_334:
+// rs1_val==6148914691236517204 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x5555555555554ffe, 0x5555555555555554, -0x556, x2, 440, x6)
+
+inst_335:
+// rs1_val==6148914691236517204 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555559, 0x5555555555555554, 0x5, x2, 448, x6)
+
+inst_336:
+// rs1_val==6148914691236517204 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555887, 0x5555555555555554, 0x333, x2, 456, x6)
+
+inst_337:
+// rs1_val==6148914691236517204 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555bba, 0x5555555555555554, 0x666, x2, 464, x6)
+
+inst_338:
+// rs1_val==6148914691236517204 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555527, 0x5555555555555554, -0x2d, x2, 472, x6)
+
+inst_339:
+// rs1_val==6148914691236517204 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555581, 0x5555555555555554, 0x2d, x2, 480, x6)
+
+inst_340:
+// rs1_val==6148914691236517204 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555556, 0x5555555555555554, 0x2, x2, 488, x6)
+
+inst_341:
+// rs1_val==6148914691236517204 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555aa8, 0x5555555555555554, 0x554, x2, 496, x6)
+
+inst_342:
+// rs1_val==6148914691236517204 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555554, 0x5555555555555554, 0x0, x2, 504, x6)
+
+inst_343:
+// rs1_val==6148914691236517204 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555558, 0x5555555555555554, 0x4, x2, 512, x6)
+
+inst_344:
+// rs1_val==6148914691236517204 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555886, 0x5555555555555554, 0x332, x2, 520, x6)
+
+inst_345:
+// rs1_val==6148914691236517204 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555bb9, 0x5555555555555554, 0x665, x2, 528, x6)
+
+inst_346:
+// rs1_val==6148914691236517204 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555580, 0x5555555555555554, 0x2c, x2, 536, x6)
+
+inst_347:
+// rs1_val==6148914691236517204 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555aaa, 0x5555555555555554, 0x556, x2, 544, x6)
+
+inst_348:
+// rs1_val==6148914691236517204 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x5555555555554fff, 0x5555555555555554, -0x555, x2, 552, x6)
+
+inst_349:
+// rs1_val==6148914691236517204 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x555555555555555a, 0x5555555555555554, 0x6, x2, 560, x6)
+
+inst_350:
+// rs1_val==6148914691236517204 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555888, 0x5555555555555554, 0x334, x2, 568, x6)
+
+inst_351:
+// rs1_val==6148914691236517204 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555bbb, 0x5555555555555554, 0x667, x2, 576, x6)
+
+inst_352:
+// rs1_val==6148914691236517204 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555528, 0x5555555555555554, -0x2c, x2, 584, x6)
+
+inst_353:
+// rs1_val==6148914691236517204 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555582, 0x5555555555555554, 0x2e, x2, 592, x6)
+
+inst_354:
+// rs1_val==0 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x3, 0x0, 0x3, x2, 600, x6)
+
+inst_355:
+// rs1_val==0 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x555, 0x0, 0x555, x2, 608, x6)
+
+inst_356:
+// rs1_val==0 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffaaa, 0x0, -0x556, x2, 616, x6)
+
+inst_357:
+// rs1_val==0 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x5, 0x0, 0x5, x2, 624, x6)
+
+inst_358:
+// rs1_val==0 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x333, 0x0, 0x333, x2, 632, x6)
+
+inst_359:
+// rs1_val==0 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x666, 0x0, 0x666, x2, 640, x6)
+
+inst_360:
+// rs1_val==0 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffffd3, 0x0, -0x2d, x2, 648, x6)
+
+inst_361:
+// rs1_val==0 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x2d, 0x0, 0x2d, x2, 656, x6)
+
+inst_362:
+// rs1_val==6148914691236517206 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555582, 0x5555555555555556, 0x2c, x2, 664, x6)
+
+inst_363:
+// rs1_val==6148914691236517206 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555aac, 0x5555555555555556, 0x556, x2, 672, x6)
+
+inst_364:
+// rs1_val==6148914691236517206 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555001, 0x5555555555555556, -0x555, x2, 680, x6)
+
+inst_365:
+// rs1_val==6148914691236517206 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x555555555555555c, 0x5555555555555556, 0x6, x2, 688, x6)
+
+inst_366:
+// rs1_val==6148914691236517206 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x555555555555588a, 0x5555555555555556, 0x334, x2, 696, x6)
+
+inst_367:
+// rs1_val==6148914691236517206 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555bbd, 0x5555555555555556, 0x667, x2, 704, x6)
+
+inst_368:
+// rs1_val==6148914691236517206 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x555555555555552a, 0x5555555555555556, -0x2c, x2, 712, x6)
+
+inst_369:
+// rs1_val==6148914691236517206 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555584, 0x5555555555555556, 0x2e, x2, 720, x6)
+
+inst_370:
+// rs1_val==-6148914691236517205 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaaae, -0x5555555555555555, 0x3, x2, 728, x6)
+
+inst_371:
+// rs1_val==-6148914691236517205 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaab000, -0x5555555555555555, 0x555, x2, 736, x6)
+
+inst_372:
+// rs1_val==-6148914691236517205 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaa555, -0x5555555555555555, -0x556, x2, 744, x6)
+
+inst_373:
+// rs1_val==-6148914691236517205 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaab0, -0x5555555555555555, 0x5, x2, 752, x6)
+
+inst_374:
+// rs1_val==-6148914691236517205 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaadde, -0x5555555555555555, 0x333, x2, 760, x6)
+
+inst_375:
+// rs1_val==-6148914691236517205 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaab111, -0x5555555555555555, 0x666, x2, 768, x6)
+
+inst_376:
+// rs1_val==-6148914691236517205 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaa7e, -0x5555555555555555, -0x2d, x2, 776, x6)
+
+inst_377:
+// rs1_val==-6148914691236517205 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaad8, -0x5555555555555555, 0x2d, x2, 784, x6)
+
+inst_378:
+// rs1_val==-6148914691236517205 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaaad, -0x5555555555555555, 0x2, x2, 792, x6)
+
+inst_379:
+// rs1_val==-6148914691236517205 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaafff, -0x5555555555555555, 0x554, x2, 800, x6)
+
+inst_380:
+// rs1_val==-6148914691236517205 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x0, x2, 808, x6)
+
+inst_381:
+// rs1_val==-6148914691236517205 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x4, x2, 816, x6)
+
+inst_382:
+// rs1_val==-6148914691236517205 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaddd, -0x5555555555555555, 0x332, x2, 824, x6)
+
+inst_383:
+// rs1_val==-6148914691236517205 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaab110, -0x5555555555555555, 0x665, x2, 832, x6)
+
+inst_384:
+// rs1_val==-6148914691236517205 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaad7, -0x5555555555555555, 0x2c, x2, 840, x6)
+
+inst_385:
+// rs1_val==-6148914691236517205 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaab001, -0x5555555555555555, 0x556, x2, 848, x6)
+
+inst_386:
+// rs1_val==-6148914691236517205 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaa556, -0x5555555555555555, -0x555, x2, 856, x6)
+
+inst_387:
+// rs1_val==-6148914691236517205 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaab1, -0x5555555555555555, 0x6, x2, 864, x6)
+
+inst_388:
+// rs1_val==-6148914691236517205 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaddf, -0x5555555555555555, 0x334, x2, 872, x6)
+
+inst_389:
+// rs1_val==-6148914691236517205 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaab112, -0x5555555555555555, 0x667, x2, 880, x6)
+
+inst_390:
+// rs1_val==-6148914691236517205 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaa7f, -0x5555555555555555, -0x2c, x2, 888, x6)
+
+inst_391:
+// rs1_val==-6148914691236517205 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xaaaaaaaaaaaaaad9, -0x5555555555555555, 0x2e, x2, 896, x6)
+
+inst_392:
+// rs1_val==6 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x9, 0x6, 0x3, x2, 904, x6)
+
+inst_393:
+// rs1_val==6 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x55b, 0x6, 0x555, x2, 912, x6)
+
+inst_394:
+// rs1_val==6 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffab0, 0x6, -0x556, x2, 920, x6)
+
+inst_395:
+// rs1_val==6 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xb, 0x6, 0x5, x2, 928, x6)
+
+inst_396:
+// rs1_val==6 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x339, 0x6, 0x333, x2, 936, x6)
+
+inst_397:
+// rs1_val==6 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x66c, 0x6, 0x666, x2, 944, x6)
+
+inst_398:
+// rs1_val==6 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffffd9, 0x6, -0x2d, x2, 952, x6)
+
+inst_399:
+// rs1_val==6 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x33, 0x6, 0x2d, x2, 960, x6)
+
+inst_400:
+// rs1_val==6 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x8, 0x6, 0x2, x2, 968, x6)
+
+inst_401:
+// rs1_val==6 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x55a, 0x6, 0x554, x2, 976, x6)
+
+inst_402:
+// rs1_val==6 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x6, 0x6, 0x0, x2, 984, x6)
+
+inst_403:
+// rs1_val==6 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xa, 0x6, 0x4, x2, 992, x6)
+
+inst_404:
+// rs1_val==6 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x338, 0x6, 0x332, x2, 1000, x6)
+
+inst_405:
+// rs1_val==6 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x66b, 0x6, 0x665, x2, 1008, x6)
+
+inst_406:
+// rs1_val==6 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x32, 0x6, 0x2c, x2, 1016, x6)
+
+inst_407:
+// rs1_val==6 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x55c, 0x6, 0x556, x2, 1024, x6)
+
+inst_408:
+// rs1_val==6 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffab1, 0x6, -0x555, x2, 1032, x6)
+
+inst_409:
+// rs1_val==6 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xc, 0x6, 0x6, x2, 1040, x6)
+
+inst_410:
+// rs1_val==6 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x33a, 0x6, 0x334, x2, 1048, x6)
+
+inst_411:
+// rs1_val==6 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x66d, 0x6, 0x667, x2, 1056, x6)
+
+inst_412:
+// rs1_val==6 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffffda, 0x6, -0x2c, x2, 1064, x6)
+
+inst_413:
+// rs1_val==6 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x34, 0x6, 0x2e, x2, 1072, x6)
+
+inst_414:
+// rs1_val==3689348814741910324 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333337, 0x3333333333333334, 0x3, x2, 1080, x6)
+
+inst_415:
+// rs1_val==3689348814741910324 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333889, 0x3333333333333334, 0x555, x2, 1088, x6)
+
+inst_416:
+// rs1_val==3689348814741910324 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x3333333333332dde, 0x3333333333333334, -0x556, x2, 1096, x6)
+
+inst_417:
+// rs1_val==3689348814741910324 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333339, 0x3333333333333334, 0x5, x2, 1104, x6)
+
+inst_418:
+// rs1_val==3689348814741910324 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333667, 0x3333333333333334, 0x333, x2, 1112, x6)
+
+inst_419:
+// rs1_val==3689348814741910324 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x333333333333399a, 0x3333333333333334, 0x666, x2, 1120, x6)
+
+inst_420:
+// rs1_val==3689348814741910324 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333307, 0x3333333333333334, -0x2d, x2, 1128, x6)
+
+inst_421:
+// rs1_val==3689348814741910324 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333361, 0x3333333333333334, 0x2d, x2, 1136, x6)
+
+inst_422:
+// rs1_val==3689348814741910324 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333336, 0x3333333333333334, 0x2, x2, 1144, x6)
+
+inst_423:
+// rs1_val==3689348814741910324 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333888, 0x3333333333333334, 0x554, x2, 1152, x6)
+
+inst_424:
+// rs1_val==3689348814741910324 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333334, 0x3333333333333334, 0x0, x2, 1160, x6)
+
+inst_425:
+// rs1_val==3689348814741910324 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333338, 0x3333333333333334, 0x4, x2, 1168, x6)
+
+inst_426:
+// rs1_val==3689348814741910324 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333666, 0x3333333333333334, 0x332, x2, 1176, x6)
+
+inst_427:
+// rs1_val==3689348814741910324 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333999, 0x3333333333333334, 0x665, x2, 1184, x6)
+
+inst_428:
+// rs1_val==3689348814741910324 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333360, 0x3333333333333334, 0x2c, x2, 1192, x6)
+
+inst_429:
+// rs1_val==3689348814741910324 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x333333333333388a, 0x3333333333333334, 0x556, x2, 1200, x6)
+
+inst_430:
+// rs1_val==3689348814741910324 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x3333333333332ddf, 0x3333333333333334, -0x555, x2, 1208, x6)
+
+inst_431:
+// rs1_val==3689348814741910324 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x333333333333333a, 0x3333333333333334, 0x6, x2, 1216, x6)
+
+inst_432:
+// rs1_val==3689348814741910324 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333668, 0x3333333333333334, 0x334, x2, 1224, x6)
+
+inst_433:
+// rs1_val==3689348814741910324 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x333333333333399b, 0x3333333333333334, 0x667, x2, 1232, x6)
+
+inst_434:
+// rs1_val==3689348814741910324 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333308, 0x3333333333333334, -0x2c, x2, 1240, x6)
+
+inst_435:
+// rs1_val==3689348814741910324 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333362, 0x3333333333333334, 0x2e, x2, 1248, x6)
+
+inst_436:
+// rs1_val==7378697629483820647 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x666666666666666a, 0x6666666666666667, 0x3, x2, 1256, x6)
+
+inst_437:
+// rs1_val==7378697629483820647 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666bbc, 0x6666666666666667, 0x555, x2, 1264, x6)
+
+inst_438:
+// rs1_val==7378697629483820647 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666111, 0x6666666666666667, -0x556, x2, 1272, x6)
+
+inst_439:
+// rs1_val==7378697629483820647 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x666666666666666c, 0x6666666666666667, 0x5, x2, 1280, x6)
+
+inst_440:
+// rs1_val==7378697629483820647 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x666666666666699a, 0x6666666666666667, 0x333, x2, 1288, x6)
+
+inst_441:
+// rs1_val==7378697629483820647 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666ccd, 0x6666666666666667, 0x666, x2, 1296, x6)
+
+inst_442:
+// rs1_val==7378697629483820647 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x666666666666663a, 0x6666666666666667, -0x2d, x2, 1304, x6)
+
+inst_443:
+// rs1_val==7378697629483820647 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666694, 0x6666666666666667, 0x2d, x2, 1312, x6)
+
+inst_444:
+// rs1_val==7378697629483820647 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666669, 0x6666666666666667, 0x2, x2, 1320, x6)
+
+inst_445:
+// rs1_val==7378697629483820647 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666bbb, 0x6666666666666667, 0x554, x2, 1328, x6)
+
+inst_446:
+// rs1_val==7378697629483820647 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666667, 0x6666666666666667, 0x0, x2, 1336, x6)
+
+inst_447:
+// rs1_val==7378697629483820647 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x666666666666666b, 0x6666666666666667, 0x4, x2, 1344, x6)
+
+inst_448:
+// rs1_val==7378697629483820647 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666999, 0x6666666666666667, 0x332, x2, 1352, x6)
+
+inst_449:
+// rs1_val==7378697629483820647 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666ccc, 0x6666666666666667, 0x665, x2, 1360, x6)
+
+inst_450:
+// rs1_val==7378697629483820647 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666693, 0x6666666666666667, 0x2c, x2, 1368, x6)
+
+inst_451:
+// rs1_val==7378697629483820647 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666bbd, 0x6666666666666667, 0x556, x2, 1376, x6)
+
+inst_452:
+// rs1_val==7378697629483820647 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666112, 0x6666666666666667, -0x555, x2, 1384, x6)
+
+inst_453:
+// rs1_val==7378697629483820647 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x666666666666666d, 0x6666666666666667, 0x6, x2, 1392, x6)
+
+inst_454:
+// rs1_val==7378697629483820647 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x666666666666699b, 0x6666666666666667, 0x334, x2, 1400, x6)
+
+inst_455:
+// rs1_val==7378697629483820647 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666cce, 0x6666666666666667, 0x667, x2, 1408, x6)
+
+inst_456:
+// rs1_val==7378697629483820647 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x666666666666663b, 0x6666666666666667, -0x2c, x2, 1416, x6)
+
+inst_457:
+// rs1_val==7378697629483820647 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666695, 0x6666666666666667, 0x2e, x2, 1424, x6)
+
+inst_458:
+// rs1_val==-3037000498 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cd1, -0xb504f332, 0x3, x2, 1432, x6)
+
+inst_459:
+// rs1_val==-3037000498 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1223, -0xb504f332, 0x555, x2, 1440, x6)
+
+inst_460:
+// rs1_val==-3037000498 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0778, -0xb504f332, -0x556, x2, 1448, x6)
+
+inst_461:
+// rs1_val==-3037000498 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cd3, -0xb504f332, 0x5, x2, 1456, x6)
+
+inst_462:
+// rs1_val==-3037000498 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1001, -0xb504f332, 0x333, x2, 1464, x6)
+
+inst_463:
+// rs1_val==-3037000498 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1334, -0xb504f332, 0x666, x2, 1472, x6)
+
+inst_464:
+// rs1_val==-3037000498 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0ca1, -0xb504f332, -0x2d, x2, 1480, x6)
+
+inst_465:
+// rs1_val==-3037000498 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cfb, -0xb504f332, 0x2d, x2, 1488, x6)
+
+inst_466:
+// rs1_val==-3037000498 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cd0, -0xb504f332, 0x2, x2, 1496, x6)
+
+inst_467:
+// rs1_val==-3037000498 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1222, -0xb504f332, 0x554, x2, 1504, x6)
+
+inst_468:
+// rs1_val==-3037000498 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cce, -0xb504f332, 0x0, x2, 1512, x6)
+
+inst_469:
+// rs1_val==-3037000498 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cd2, -0xb504f332, 0x4, x2, 1520, x6)
+
+inst_470:
+// rs1_val==-3037000498 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1000, -0xb504f332, 0x332, x2, 1528, x6)
+
+inst_471:
+// rs1_val==-3037000498 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1333, -0xb504f332, 0x665, x2, 1536, x6)
+
+inst_472:
+// rs1_val==-3037000498 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cfa, -0xb504f332, 0x2c, x2, 1544, x6)
+
+inst_473:
+// rs1_val==-3037000498 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1224, -0xb504f332, 0x556, x2, 1552, x6)
+
+inst_474:
+// rs1_val==-3037000498 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0779, -0xb504f332, -0x555, x2, 1560, x6)
+
+inst_475:
+// rs1_val==-3037000498 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cd4, -0xb504f332, 0x6, x2, 1568, x6)
+
+inst_476:
+// rs1_val==-3037000498 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1002, -0xb504f332, 0x334, x2, 1576, x6)
+
+inst_477:
+// rs1_val==-3037000498 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb1335, -0xb504f332, 0x667, x2, 1584, x6)
+
+inst_478:
+// rs1_val==-3037000498 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0ca2, -0xb504f332, -0x2c, x2, 1592, x6)
+
+inst_479:
+// rs1_val==-3037000498 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xffffffff4afb0cfc, -0xb504f332, 0x2e, x2, 1600, x6)
+
+inst_480:
+// rs1_val==3037000500 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xb504f337, 0xb504f334, 0x3, x2, 1608, x6)
+
+inst_481:
+// rs1_val==3037000500 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xb504f889, 0xb504f334, 0x555, x2, 1616, x6)
+
+inst_482:
+// rs1_val==3037000500 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xb504edde, 0xb504f334, -0x556, x2, 1624, x6)
+
+inst_483:
+// rs1_val==3037000500 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xb504f339, 0xb504f334, 0x5, x2, 1632, x6)
+
+inst_484:
+// rs1_val==3037000500 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xb504f667, 0xb504f334, 0x333, x2, 1640, x6)
+
+inst_485:
+// rs1_val==3037000500 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xb504f99a, 0xb504f334, 0x666, x2, 1648, x6)
+
+inst_486:
+// rs1_val==3037000500 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xb504f307, 0xb504f334, -0x2d, x2, 1656, x6)
+
+inst_487:
+// rs1_val==3037000500 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xb504f361, 0xb504f334, 0x2d, x2, 1664, x6)
+
+inst_488:
+// rs1_val==3037000500 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xb504f336, 0xb504f334, 0x2, x2, 1672, x6)
+
+inst_489:
+// rs1_val==3037000500 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xb504f888, 0xb504f334, 0x554, x2, 1680, x6)
+
+inst_490:
+// rs1_val==3037000500 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xb504f334, 0xb504f334, 0x0, x2, 1688, x6)
+
+inst_491:
+// rs1_val==3037000500 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xb504f338, 0xb504f334, 0x4, x2, 1696, x6)
+
+inst_492:
+// rs1_val==3037000500 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xb504f666, 0xb504f334, 0x332, x2, 1704, x6)
+
+inst_493:
+// rs1_val==3037000500 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xb504f999, 0xb504f334, 0x665, x2, 1712, x6)
+
+inst_494:
+// rs1_val==3037000500 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xb504f360, 0xb504f334, 0x2c, x2, 1720, x6)
+
+inst_495:
+// rs1_val==3037000500 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xb504f88a, 0xb504f334, 0x556, x2, 1728, x6)
+
+inst_496:
+// rs1_val==3037000500 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xb504eddf, 0xb504f334, -0x555, x2, 1736, x6)
+
+inst_497:
+// rs1_val==3037000500 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xb504f33a, 0xb504f334, 0x6, x2, 1744, x6)
+
+inst_498:
+// rs1_val==3037000500 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xb504f668, 0xb504f334, 0x334, x2, 1752, x6)
+
+inst_499:
+// rs1_val==3037000500 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xb504f99b, 0xb504f334, 0x667, x2, 1760, x6)
+
+inst_500:
+// rs1_val==3037000500 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xb504f308, 0xb504f334, -0x2c, x2, 1768, x6)
+
+inst_501:
+// rs1_val==3037000500 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xb504f362, 0xb504f334, 0x2e, x2, 1776, x6)
+
+inst_502:
+// rs1_val==0 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x2, 0x0, 0x2, x2, 1784, x6)
+
+inst_503:
+// rs1_val==0 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x554, 0x0, 0x554, x2, 1792, x6)
+
+inst_504:
+// rs1_val==0 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x0, 0x0, 0x0, x2, 1800, x6)
+
+inst_505:
+// rs1_val==0 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x332, 0x0, 0x332, x2, 1808, x6)
+
+inst_506:
+// rs1_val==0 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x665, 0x0, 0x665, x2, 1816, x6)
+
+inst_507:
+// rs1_val==0 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x2c, 0x0, 0x2c, x2, 1824, x6)
+
+inst_508:
+// rs1_val==0 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x556, 0x0, 0x556, x2, 1832, x6)
+
+inst_509:
+// rs1_val==0 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffaab, 0x0, -0x555, x2, 1840, x6)
+
+inst_510:
+// rs1_val==0 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x6, 0x0, 0x6, x2, 1848, x6)
+
+inst_511:
+// rs1_val==0 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x334, 0x0, 0x334, x2, 1856, x6)
+
+inst_512:
+// rs1_val==0 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x667, 0x0, 0x667, x2, 1864, x6)
+
+inst_513:
+// rs1_val==0 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffffd4, 0x0, -0x2c, x2, 1872, x6)
+
+inst_514:
+// rs1_val==0 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x0; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x2e, 0x0, 0x2e, x2, 1880, x6)
+
+inst_515:
+// rs1_val==4 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x7, 0x4, 0x3, x2, 1888, x6)
+
+inst_516:
+// rs1_val==4 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x559, 0x4, 0x555, x2, 1896, x6)
+
+inst_517:
+// rs1_val==4 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffaae, 0x4, -0x556, x2, 1904, x6)
+
+inst_518:
+// rs1_val==4 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x9, 0x4, 0x5, x2, 1912, x6)
+
+inst_519:
+// rs1_val==4 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x337, 0x4, 0x333, x2, 1920, x6)
+
+inst_520:
+// rs1_val==4 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x66a, 0x4, 0x666, x2, 1928, x6)
+
+inst_521:
+// rs1_val==4 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffffd7, 0x4, -0x2d, x2, 1936, x6)
+
+inst_522:
+// rs1_val==4 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x31, 0x4, 0x2d, x2, 1944, x6)
+
+inst_523:
+// rs1_val==4 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x6, 0x4, 0x2, x2, 1952, x6)
+
+inst_524:
+// rs1_val==4 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x558, 0x4, 0x554, x2, 1960, x6)
+
+inst_525:
+// rs1_val==4 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x4, 0x4, 0x0, x2, 1968, x6)
+
+inst_526:
+// rs1_val==4 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x8, 0x4, 0x4, x2, 1976, x6)
+
+inst_527:
+// rs1_val==4 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x336, 0x4, 0x332, x2, 1984, x6)
+
+inst_528:
+// rs1_val==4 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x669, 0x4, 0x665, x2, 1992, x6)
+
+inst_529:
+// rs1_val==4 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x30, 0x4, 0x2c, x2, 2000, x6)
+
+inst_530:
+// rs1_val==4 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x55a, 0x4, 0x556, x2, 2008, x6)
+
+inst_531:
+// rs1_val==4 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xfffffffffffffaaf, 0x4, -0x555, x2, 2016, x6)
+
+inst_532:
+// rs1_val==4 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xa, 0x4, 0x6, x2, 2024, x6)
+
+inst_533:
+// rs1_val==4 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x338, 0x4, 0x334, x2, 2032, x6)
+
+inst_534:
+// rs1_val==4 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x66b, 0x4, 0x667, x2, 2040, x6)
+RVTEST_SIGBASE( x2,signature_x2_2)
+
+inst_535:
+// rs1_val==4 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xffffffffffffffd8, 0x4, -0x2c, x2, 0, x6)
+
+inst_536:
+// rs1_val==4 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x4; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x32, 0x4, 0x2e, x2, 8, x6)
+
+inst_537:
+// rs1_val==3689348814741910322 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333335, 0x3333333333333332, 0x3, x2, 16, x6)
+
+inst_538:
+// rs1_val==3689348814741910322 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333887, 0x3333333333333332, 0x555, x2, 24, x6)
+
+inst_539:
+// rs1_val==3689348814741910322 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x3333333333332ddc, 0x3333333333333332, -0x556, x2, 32, x6)
+
+inst_540:
+// rs1_val==3689348814741910322 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333337, 0x3333333333333332, 0x5, x2, 40, x6)
+
+inst_541:
+// rs1_val==3689348814741910322 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333665, 0x3333333333333332, 0x333, x2, 48, x6)
+
+inst_542:
+// rs1_val==3689348814741910322 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333998, 0x3333333333333332, 0x666, x2, 56, x6)
+
+inst_543:
+// rs1_val==3689348814741910322 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333305, 0x3333333333333332, -0x2d, x2, 64, x6)
+
+inst_544:
+// rs1_val==3689348814741910322 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x333333333333335f, 0x3333333333333332, 0x2d, x2, 72, x6)
+
+inst_545:
+// rs1_val==3689348814741910322 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333334, 0x3333333333333332, 0x2, x2, 80, x6)
+
+inst_546:
+// rs1_val==3689348814741910322 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333886, 0x3333333333333332, 0x554, x2, 88, x6)
+
+inst_547:
+// rs1_val==3689348814741910322 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333332, 0x3333333333333332, 0x0, x2, 96, x6)
+
+inst_548:
+// rs1_val==3689348814741910322 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333336, 0x3333333333333332, 0x4, x2, 104, x6)
+
+inst_549:
+// rs1_val==3689348814741910322 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333664, 0x3333333333333332, 0x332, x2, 112, x6)
+
+inst_550:
+// rs1_val==3689348814741910322 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333997, 0x3333333333333332, 0x665, x2, 120, x6)
+
+inst_551:
+// rs1_val==3689348814741910322 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x333333333333335e, 0x3333333333333332, 0x2c, x2, 128, x6)
+
+inst_552:
+// rs1_val==3689348814741910322 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333888, 0x3333333333333332, 0x556, x2, 136, x6)
+
+inst_553:
+// rs1_val==3689348814741910322 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x3333333333332ddd, 0x3333333333333332, -0x555, x2, 144, x6)
+
+inst_554:
+// rs1_val==3689348814741910322 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333338, 0x3333333333333332, 0x6, x2, 152, x6)
+
+inst_555:
+// rs1_val==3689348814741910322 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333666, 0x3333333333333332, 0x334, x2, 160, x6)
+
+inst_556:
+// rs1_val==3689348814741910322 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333999, 0x3333333333333332, 0x667, x2, 168, x6)
+
+inst_557:
+// rs1_val==3689348814741910322 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333306, 0x3333333333333332, -0x2c, x2, 176, x6)
+
+inst_558:
+// rs1_val==3689348814741910322 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x3333333333333360, 0x3333333333333332, 0x2e, x2, 184, x6)
+
+inst_559:
+// rs1_val==7378697629483820645 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666668, 0x6666666666666665, 0x3, x2, 192, x6)
+
+inst_560:
+// rs1_val==7378697629483820645 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666bba, 0x6666666666666665, 0x555, x2, 200, x6)
+
+inst_561:
+// rs1_val==7378697629483820645 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x666666666666610f, 0x6666666666666665, -0x556, x2, 208, x6)
+
+inst_562:
+// rs1_val==7378697629483820645 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x666666666666666a, 0x6666666666666665, 0x5, x2, 216, x6)
+
+inst_563:
+// rs1_val==7378697629483820645 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666998, 0x6666666666666665, 0x333, x2, 224, x6)
+
+inst_564:
+// rs1_val==7378697629483820645 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666ccb, 0x6666666666666665, 0x666, x2, 232, x6)
+
+inst_565:
+// rs1_val==7378697629483820645 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666638, 0x6666666666666665, -0x2d, x2, 240, x6)
+
+inst_566:
+// rs1_val==7378697629483820645 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666692, 0x6666666666666665, 0x2d, x2, 248, x6)
+
+inst_567:
+// rs1_val==7378697629483820645 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666667, 0x6666666666666665, 0x2, x2, 256, x6)
+
+inst_568:
+// rs1_val==7378697629483820645 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666bb9, 0x6666666666666665, 0x554, x2, 264, x6)
+
+inst_569:
+// rs1_val==7378697629483820645 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666665, 0x6666666666666665, 0x0, x2, 272, x6)
+
+inst_570:
+// rs1_val==7378697629483820645 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666669, 0x6666666666666665, 0x4, x2, 280, x6)
+
+inst_571:
+// rs1_val==7378697629483820645 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666997, 0x6666666666666665, 0x332, x2, 288, x6)
+
+inst_572:
+// rs1_val==7378697629483820645 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666cca, 0x6666666666666665, 0x665, x2, 296, x6)
+
+inst_573:
+// rs1_val==7378697629483820645 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666691, 0x6666666666666665, 0x2c, x2, 304, x6)
+
+inst_574:
+// rs1_val==7378697629483820645 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666bbb, 0x6666666666666665, 0x556, x2, 312, x6)
+
+inst_575:
+// rs1_val==7378697629483820645 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666110, 0x6666666666666665, -0x555, x2, 320, x6)
+
+inst_576:
+// rs1_val==7378697629483820645 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0x666666666666666b, 0x6666666666666665, 0x6, x2, 328, x6)
+
+inst_577:
+// rs1_val==7378697629483820645 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666999, 0x6666666666666665, 0x334, x2, 336, x6)
+
+inst_578:
+// rs1_val==7378697629483820645 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666ccc, 0x6666666666666665, 0x667, x2, 344, x6)
+
+inst_579:
+// rs1_val==7378697629483820645 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666639, 0x6666666666666665, -0x2c, x2, 352, x6)
+
+inst_580:
+// rs1_val==7378697629483820645 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0x6666666666666693, 0x6666666666666665, 0x2e, x2, 360, x6)
+
+inst_581:
+// rs1_val==3037000498 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0xb504f335, 0xb504f332, 0x3, x2, 368, x6)
+
+inst_582:
+// rs1_val==3037000498 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0xb504f887, 0xb504f332, 0x555, x2, 376, x6)
+
+inst_583:
+// rs1_val==3037000498 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0xb504eddc, 0xb504f332, -0x556, x2, 384, x6)
+
+inst_584:
+// rs1_val==3037000498 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0xb504f337, 0xb504f332, 0x5, x2, 392, x6)
+
+inst_585:
+// rs1_val==3037000498 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0xb504f665, 0xb504f332, 0x333, x2, 400, x6)
+
+inst_586:
+// rs1_val==3037000498 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0xb504f998, 0xb504f332, 0x666, x2, 408, x6)
+
+inst_587:
+// rs1_val==3037000498 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0xb504f305, 0xb504f332, -0x2d, x2, 416, x6)
+
+inst_588:
+// rs1_val==3037000498 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0xb504f35f, 0xb504f332, 0x2d, x2, 424, x6)
+
+inst_589:
+// rs1_val==3037000498 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0xb504f334, 0xb504f332, 0x2, x2, 432, x6)
+
+inst_590:
+// rs1_val==3037000498 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0xb504f886, 0xb504f332, 0x554, x2, 440, x6)
+
+inst_591:
+// rs1_val==3037000498 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0xb504f332, 0xb504f332, 0x0, x2, 448, x6)
+
+inst_592:
+// rs1_val==3037000498 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0xb504f336, 0xb504f332, 0x4, x2, 456, x6)
+
+inst_593:
+// rs1_val==3037000498 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0xb504f664, 0xb504f332, 0x332, x2, 464, x6)
+
+inst_594:
+// rs1_val==3037000498 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0xb504f997, 0xb504f332, 0x665, x2, 472, x6)
+
+inst_595:
+// rs1_val==3037000498 and imm_val==44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2c
+TEST_IMM_OP( addi, x11, x10, 0xb504f35e, 0xb504f332, 0x2c, x2, 480, x6)
+
+inst_596:
+// rs1_val==3037000498 and imm_val==1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x556
+TEST_IMM_OP( addi, x11, x10, 0xb504f888, 0xb504f332, 0x556, x2, 488, x6)
+
+inst_597:
+// rs1_val==3037000498 and imm_val==-1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x555
+TEST_IMM_OP( addi, x11, x10, 0xb504eddd, 0xb504f332, -0x555, x2, 496, x6)
+
+inst_598:
+// rs1_val==3037000498 and imm_val==6,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x6
+TEST_IMM_OP( addi, x11, x10, 0xb504f338, 0xb504f332, 0x6, x2, 504, x6)
+
+inst_599:
+// rs1_val==3037000498 and imm_val==820,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x334
+TEST_IMM_OP( addi, x11, x10, 0xb504f666, 0xb504f332, 0x334, x2, 512, x6)
+
+inst_600:
+// rs1_val==3037000498 and imm_val==1639,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x667
+TEST_IMM_OP( addi, x11, x10, 0xb504f999, 0xb504f332, 0x667, x2, 520, x6)
+
+inst_601:
+// rs1_val==3037000498 and imm_val==-44,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x2c
+TEST_IMM_OP( addi, x11, x10, 0xb504f306, 0xb504f332, -0x2c, x2, 528, x6)
+
+inst_602:
+// rs1_val==3037000498 and imm_val==46,
+// opcode: addi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2e
+TEST_IMM_OP( addi, x11, x10, 0xb504f360, 0xb504f332, 0x2e, x2, 536, x6)
+
+inst_603:
+// rs1_val==6148914691236517206 and imm_val==3,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x3
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555559, 0x5555555555555556, 0x3, x2, 544, x6)
+
+inst_604:
+// rs1_val==6148914691236517206 and imm_val==1365,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x555
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555aab, 0x5555555555555556, 0x555, x2, 552, x6)
+
+inst_605:
+// rs1_val==6148914691236517206 and imm_val==-1366,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x556
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555000, 0x5555555555555556, -0x556, x2, 560, x6)
+
+inst_606:
+// rs1_val==6148914691236517206 and imm_val==5,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x5
+TEST_IMM_OP( addi, x11, x10, 0x555555555555555b, 0x5555555555555556, 0x5, x2, 568, x6)
+
+inst_607:
+// rs1_val==6148914691236517206 and imm_val==819,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x333
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555889, 0x5555555555555556, 0x333, x2, 576, x6)
+
+inst_608:
+// rs1_val==6148914691236517206 and imm_val==1638,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x666
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555bbc, 0x5555555555555556, 0x666, x2, 584, x6)
+
+inst_609:
+// rs1_val==6148914691236517206 and imm_val==-45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x2d
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555529, 0x5555555555555556, -0x2d, x2, 592, x6)
+
+inst_610:
+// rs1_val==6148914691236517206 and imm_val==45,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2d
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555583, 0x5555555555555556, 0x2d, x2, 600, x6)
+
+inst_611:
+// rs1_val==6148914691236517206 and imm_val==2,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555558, 0x5555555555555556, 0x2, x2, 608, x6)
+
+inst_612:
+// rs1_val==6148914691236517206 and imm_val==1364,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x554
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555aaa, 0x5555555555555556, 0x554, x2, 616, x6)
+
+inst_613:
+// rs1_val==6148914691236517206 and imm_val==0,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x0
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555556, 0x5555555555555556, 0x0, x2, 624, x6)
+
+inst_614:
+// rs1_val==6148914691236517206 and imm_val==4,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x4
+TEST_IMM_OP( addi, x11, x10, 0x555555555555555a, 0x5555555555555556, 0x4, x2, 632, x6)
+
+inst_615:
+// rs1_val==6148914691236517206 and imm_val==818,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x332
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555888, 0x5555555555555556, 0x332, x2, 640, x6)
+
+inst_616:
+// rs1_val==6148914691236517206 and imm_val==1637,
+// opcode: addi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x665
+TEST_IMM_OP( addi, x11, x10, 0x5555555555555bbb, 0x5555555555555556, 0x665, x2, 648, x6)
+
+inst_617:
+// rs1_val == (2**(xlen-1)-1), imm_val == -513, rs1_val > 0 and imm_val < 0, rs1_val == 9223372036854775807
+// opcode: addi ; op1:x10; dest:x11; op1val:0x7fffffffffffffff; immval:-0x201
+TEST_IMM_OP( addi, x11, x10, 0x7ffffffffffffdfe, 0x7fffffffffffffff, -0x201, x2, 656, x6)
+
+inst_618:
+// imm_val == 1024, rs1_val == -17
+// opcode: addi ; op1:x10; dest:x11; op1val:-0x11; immval:0x400
+TEST_IMM_OP( addi, x11, x10, 0x3ef, -0x11, 0x400, x2, 664, x6)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x16_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x16_1:
+ .fill 23*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_2:
+ .fill 84*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/addiw-01.S b/riscof/suite/rv64i_m/I/addiw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..f6c3dbf9262970e1c9151ccf1fa08f2e870bfcca
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/addiw-01.S
@@ -0,0 +1,3209 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the addiw instruction of the RISC-V I extension for the addiw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*);def TEST_CASE_1=True;",addiw)
+
+RVTEST_SIGBASE( x15,signature_x15_1)
+
+inst_0:
+// rs1 == rd, rs1==x17, rd==x17, imm_val == (-2**(12-1)), imm_val == -2048, rs1_val != imm_val, rs1_val < 0 and imm_val < 0, rs1_val == -6148914691236517206
+// opcode: addiw ; op1:x17; dest:x17; op1val:-0x5555555555555556; immval:-0x800
+TEST_IMM_OP( addiw, x17, x17, -0x55555d56, -0x5555555555555556, -0x800, x15, 0, x5)
+
+inst_1:
+// rs1 != rd, rs1==x2, rd==x20, imm_val == 0, rs1_val == -536870913
+// opcode: addiw ; op1:x2; dest:x20; op1val:-0x20000001; immval:0x0
+TEST_IMM_OP( addiw, x20, x2, -0x20000001, -0x20000001, 0x0, x15, 8, x5)
+
+inst_2:
+// rs1==x20, rd==x16, imm_val == (2**(12-1)-1), rs1_val < 0 and imm_val > 0, imm_val == 2047
+// opcode: addiw ; op1:x20; dest:x16; op1val:-0x4000000000000000; immval:0x7ff
+TEST_IMM_OP( addiw, x16, x20, 0x7ff, -0x4000000000000000, 0x7ff, x15, 16, x5)
+
+inst_3:
+// rs1==x26, rd==x29, imm_val == 1, rs1_val > 0 and imm_val > 0
+// opcode: addiw ; op1:x26; dest:x29; op1val:0x5555555555555556; immval:0x1
+TEST_IMM_OP( addiw, x29, x26, 0x55555557, 0x5555555555555556, 0x1, x15, 24, x5)
+
+inst_4:
+// rs1==x8, rd==x27, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808
+// opcode: addiw ; op1:x8; dest:x27; op1val:-0x8000000000000000; immval:0x333
+TEST_IMM_OP( addiw, x27, x8, 0x333, -0x8000000000000000, 0x333, x15, 32, x5)
+
+inst_5:
+// rs1==x18, rd==x25, rs1_val == 0, rs1_val==0 and imm_val==-1366, imm_val == -1366
+// opcode: addiw ; op1:x18; dest:x25; op1val:0x0; immval:-0x556
+TEST_IMM_OP( addiw, x25, x18, -0x556, 0x0, -0x556, x15, 40, x5)
+
+inst_6:
+// rs1==x7, rd==x6, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807
+// opcode: addiw ; op1:x7; dest:x6; op1val:0x7fffffffffffffff; immval:0x7
+TEST_IMM_OP( addiw, x6, x7, 0x6, 0x7fffffffffffffff, 0x7, x15, 48, x5)
+
+inst_7:
+// rs1==x10, rd==x0, rs1_val == 1,
+// opcode: addiw ; op1:x10; dest:x0; op1val:0x1; immval:0x6
+TEST_IMM_OP( addiw, x0, x10, 0, 0x1, 0x6, x15, 56, x5)
+
+inst_8:
+// rs1==x27, rd==x9, rs1_val == imm_val, imm_val == 8, rs1_val == 8
+// opcode: addiw ; op1:x27; dest:x9; op1val:0x8; immval:0x8
+TEST_IMM_OP( addiw, x9, x27, 0x10, 0x8, 0x8, x15, 64, x5)
+
+inst_9:
+// rs1==x6, rd==x31, rs1_val > 0 and imm_val < 0,
+// opcode: addiw ; op1:x6; dest:x31; op1val:0x7; immval:-0x400
+TEST_IMM_OP( addiw, x31, x6, -0x3f9, 0x7, -0x400, x15, 72, x5)
+
+inst_10:
+// rs1==x0, rd==x22, imm_val == 2, rs1_val == 4294967296
+// opcode: addiw ; op1:x0; dest:x22; op1val:0x0; immval:0x2
+TEST_IMM_OP( addiw, x22, x0, 0x2, 0x0, 0x2, x15, 80, x5)
+
+inst_11:
+// rs1==x16, rd==x7, imm_val == 4, rs1_val == -2
+// opcode: addiw ; op1:x16; dest:x7; op1val:-0x2; immval:0x4
+TEST_IMM_OP( addiw, x7, x16, 0x2, -0x2, 0x4, x15, 88, x5)
+
+inst_12:
+// rs1==x19, rd==x21, imm_val == 16, rs1_val == 4
+// opcode: addiw ; op1:x19; dest:x21; op1val:0x4; immval:0x10
+TEST_IMM_OP( addiw, x21, x19, 0x14, 0x4, 0x10, x15, 96, x5)
+
+inst_13:
+// rs1==x1, rd==x4, imm_val == 32, rs1_val == -562949953421313
+// opcode: addiw ; op1:x1; dest:x4; op1val:-0x2000000000001; immval:0x20
+TEST_IMM_OP( addiw, x4, x1, 0x1f, -0x2000000000001, 0x20, x15, 104, x5)
+
+inst_14:
+// rs1==x13, rd==x23, imm_val == 64, rs1_val == 16384
+// opcode: addiw ; op1:x13; dest:x23; op1val:0x4000; immval:0x40
+TEST_IMM_OP( addiw, x23, x13, 0x4040, 0x4000, 0x40, x15, 112, x5)
+
+inst_15:
+// rs1==x29, rd==x13, imm_val == 128,
+// opcode: addiw ; op1:x29; dest:x13; op1val:-0x4000000000000000; immval:0x80
+TEST_IMM_OP( addiw, x13, x29, 0x80, -0x4000000000000000, 0x80, x15, 120, x5)
+
+inst_16:
+// rs1==x24, rd==x12, imm_val == 256,
+// opcode: addiw ; op1:x24; dest:x12; op1val:-0x7; immval:0x100
+TEST_IMM_OP( addiw, x12, x24, 0xf9, -0x7, 0x100, x15, 128, x5)
+
+inst_17:
+// rs1==x31, rd==x10, imm_val == 512, rs1_val == -8796093022209
+// opcode: addiw ; op1:x31; dest:x10; op1val:-0x80000000001; immval:0x200
+TEST_IMM_OP( addiw, x10, x31, 0x1ff, -0x80000000001, 0x200, x15, 136, x5)
+
+inst_18:
+// rs1==x11, rd==x3, imm_val == 1024,
+// opcode: addiw ; op1:x11; dest:x3; op1val:0xb504f332; immval:0x400
+TEST_IMM_OP( addiw, x3, x11, -0x4afb08ce, 0xb504f332, 0x400, x15, 144, x5)
+
+inst_19:
+// rs1==x9, rd==x14, imm_val == -2, rs1_val == 4503599627370496
+// opcode: addiw ; op1:x9; dest:x14; op1val:0x10000000000000; immval:-0x2
+TEST_IMM_OP( addiw, x14, x9, -0x2, 0x10000000000000, -0x2, x15, 152, x5)
+
+inst_20:
+// rs1==x14, rd==x26, imm_val == -3, rs1_val == 1073741824
+// opcode: addiw ; op1:x14; dest:x26; op1val:0x40000000; immval:-0x3
+TEST_IMM_OP( addiw, x26, x14, 0x3ffffffd, 0x40000000, -0x3, x15, 160, x7)
+
+inst_21:
+// rs1==x28, rd==x5, imm_val == -5,
+// opcode: addiw ; op1:x28; dest:x5; op1val:0x0; immval:-0x5
+TEST_IMM_OP( addiw, x5, x28, -0x5, 0x0, -0x5, x15, 168, x7)
+RVTEST_SIGBASE( x6,signature_x6_0)
+
+inst_22:
+// rs1==x25, rd==x18, imm_val == -9, rs1_val == -2147483649
+// opcode: addiw ; op1:x25; dest:x18; op1val:-0x80000001; immval:-0x9
+TEST_IMM_OP( addiw, x18, x25, 0x7ffffff6, -0x80000001, -0x9, x6, 0, x7)
+
+inst_23:
+// rs1==x4, rd==x19, imm_val == -17, rs1_val == -36028797018963969
+// opcode: addiw ; op1:x4; dest:x19; op1val:-0x80000000000001; immval:-0x11
+TEST_IMM_OP( addiw, x19, x4, -0x12, -0x80000000000001, -0x11, x6, 8, x7)
+
+inst_24:
+// rs1==x30, rd==x2, imm_val == -33, rs1_val == -1048577
+// opcode: addiw ; op1:x30; dest:x2; op1val:-0x100001; immval:-0x21
+TEST_IMM_OP( addiw, x2, x30, -0x100022, -0x100001, -0x21, x6, 16, x7)
+
+inst_25:
+// rs1==x21, rd==x15, imm_val == -65, rs1_val == -288230376151711745
+// opcode: addiw ; op1:x21; dest:x15; op1val:-0x400000000000001; immval:-0x41
+TEST_IMM_OP( addiw, x15, x21, -0x42, -0x400000000000001, -0x41, x6, 24, x7)
+
+inst_26:
+// rs1==x3, rd==x8, imm_val == -129,
+// opcode: addiw ; op1:x3; dest:x8; op1val:-0x8000000000000000; immval:-0x81
+TEST_IMM_OP( addiw, x8, x3, -0x81, -0x8000000000000000, -0x81, x6, 32, x7)
+
+inst_27:
+// rs1==x12, rd==x30, imm_val == -257,
+// opcode: addiw ; op1:x12; dest:x30; op1val:0x3333333333333334; immval:-0x101
+TEST_IMM_OP( addiw, x30, x12, 0x33333233, 0x3333333333333334, -0x101, x6, 40, x7)
+
+inst_28:
+// rs1==x15, rd==x11, imm_val == -513, rs1_val == 4194304
+// opcode: addiw ; op1:x15; dest:x11; op1val:0x400000; immval:-0x201
+TEST_IMM_OP( addiw, x11, x15, 0x3ffdff, 0x400000, -0x201, x6, 48, x7)
+
+inst_29:
+// rs1==x23, rd==x24, imm_val == -1025,
+// opcode: addiw ; op1:x23; dest:x24; op1val:-0xa; immval:-0x401
+TEST_IMM_OP( addiw, x24, x23, -0x40b, -0xa, -0x401, x6, 56, x7)
+
+inst_30:
+// rs1==x5, rd==x28, imm_val == 1365, rs1_val==-6148914691236517206 and imm_val==1365
+// opcode: addiw ; op1:x5; dest:x28; op1val:-0x5555555555555556; immval:0x555
+TEST_IMM_OP( addiw, x28, x5, -0x55555001, -0x5555555555555556, 0x555, x6, 64, x7)
+
+inst_31:
+// rs1==x22, rd==x1, rs1_val == 2, rs1_val==2 and imm_val==819
+// opcode: addiw ; op1:x22; dest:x1; op1val:0x2; immval:0x333
+TEST_IMM_OP( addiw, x1, x22, 0x335, 0x2, 0x333, x6, 72, x7)
+
+inst_32:
+// rs1_val == 16,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x10; immval:0x9
+TEST_IMM_OP( addiw, x11, x10, 0x19, 0x10, 0x9, x6, 80, x7)
+
+inst_33:
+// rs1_val == 32,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x20; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x24, 0x20, 0x4, x6, 88, x7)
+
+inst_34:
+// rs1_val == 64,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x40; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x594, 0x40, 0x554, x6, 96, x7)
+
+inst_35:
+// rs1_val == 128,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x80; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x80, 0x80, 0x0, x6, 104, x7)
+
+inst_36:
+// rs1_val == 256,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x100; immval:0x8
+TEST_IMM_OP( addiw, x11, x10, 0x108, 0x100, 0x8, x6, 112, x7)
+
+inst_37:
+// rs1_val == 512,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x200; immval:0x3ff
+TEST_IMM_OP( addiw, x11, x10, 0x5ff, 0x200, 0x3ff, x6, 120, x7)
+
+inst_38:
+// rs1_val == 1024,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x400; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x42e, 0x400, 0x2e, x6, 128, x7)
+
+inst_39:
+// rs1_val == 2048,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x800; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0xb34, 0x800, 0x334, x6, 136, x7)
+
+inst_40:
+// rs1_val == 4096,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x1000; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x1555, 0x1000, 0x555, x6, 144, x7)
+
+inst_41:
+// rs1_val == 8192,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2000; immval:0x80
+TEST_IMM_OP( addiw, x11, x10, 0x2080, 0x2000, 0x80, x6, 152, x7)
+
+inst_42:
+// rs1_val == 32768,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x8000; immval:0x80
+TEST_IMM_OP( addiw, x11, x10, 0x8080, 0x8000, 0x80, x6, 160, x7)
+
+inst_43:
+// rs1_val == 65536,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x10000; immval:-0x7
+TEST_IMM_OP( addiw, x11, x10, 0xfff9, 0x10000, -0x7, x6, 168, x7)
+
+inst_44:
+// rs1_val == 131072,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x20000; immval:0x7
+TEST_IMM_OP( addiw, x11, x10, 0x20007, 0x20000, 0x7, x6, 176, x7)
+
+inst_45:
+// rs1_val == 262144,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x40000; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x3ffd4, 0x40000, -0x2c, x6, 184, x7)
+
+inst_46:
+// rs1_val == 524288,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x80000; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x80665, 0x80000, 0x665, x6, 192, x7)
+
+inst_47:
+// rs1_val == 1048576,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x100000; immval:-0x9
+TEST_IMM_OP( addiw, x11, x10, 0xffff7, 0x100000, -0x9, x6, 200, x7)
+
+inst_48:
+// rs1_val == 2097152,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x200000; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x200002, 0x200000, 0x2, x6, 208, x7)
+
+inst_49:
+// rs1_val == 8388608,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x800000; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x800004, 0x800000, 0x4, x6, 216, x7)
+
+inst_50:
+// rs1_val == 16777216,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x1000000; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x1000003, 0x1000000, 0x3, x6, 224, x7)
+
+inst_51:
+// rs1_val == 33554432,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2000000; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x2000666, 0x2000000, 0x666, x6, 232, x7)
+
+inst_52:
+// rs1_val == 67108864,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4000000; immval:0x20
+TEST_IMM_OP( addiw, x11, x10, 0x4000020, 0x4000000, 0x20, x6, 240, x7)
+
+inst_53:
+// rs1_val == 134217728,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x8000000; immval:0x9
+TEST_IMM_OP( addiw, x11, x10, 0x8000009, 0x8000000, 0x9, x6, 248, x7)
+
+inst_54:
+// rs1_val == 268435456,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x10000000; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x10000004, 0x10000000, 0x4, x6, 256, x7)
+
+inst_55:
+// rs1_val == 536870912,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x20000000; immval:-0x7
+TEST_IMM_OP( addiw, x11, x10, 0x1ffffff9, 0x20000000, -0x7, x6, 264, x7)
+
+inst_56:
+// rs1_val == 2147483648,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x80000000; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, -0x7ffffccc, 0x80000000, 0x334, x6, 272, x7)
+
+inst_57:
+// rs1_val == 8589934592,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x200000000; immval:0x9
+TEST_IMM_OP( addiw, x11, x10, 0x9, 0x200000000, 0x9, x6, 280, x7)
+
+inst_58:
+// rs1_val == 17179869184,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x400000000; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x2d, 0x400000000, -0x2d, x6, 288, x7)
+
+inst_59:
+// rs1_val == 34359738368,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x800000000; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x5, 0x800000000, 0x5, x6, 296, x7)
+
+inst_60:
+// rs1_val == 68719476736,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x1000000000; immval:-0x6
+TEST_IMM_OP( addiw, x11, x10, -0x6, 0x1000000000, -0x6, x6, 304, x7)
+
+inst_61:
+// rs1_val == 137438953472,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2000000000; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x2d, 0x2000000000, -0x2d, x6, 312, x7)
+
+inst_62:
+// rs1_val == 274877906944,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4000000000; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x4, 0x4000000000, 0x4, x6, 320, x7)
+
+inst_63:
+// rs1_val == 549755813888,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x8000000000; immval:0x100
+TEST_IMM_OP( addiw, x11, x10, 0x100, 0x8000000000, 0x100, x6, 328, x7)
+
+inst_64:
+// rs1_val == 1099511627776,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x10000000000; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x6, 0x10000000000, 0x6, x6, 336, x7)
+
+inst_65:
+// rs1_val == 2199023255552,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x20000000000; immval:-0x3
+TEST_IMM_OP( addiw, x11, x10, -0x3, 0x20000000000, -0x3, x6, 344, x7)
+
+inst_66:
+// rs1_val == 4398046511104,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x40000000000; immval:-0xa
+TEST_IMM_OP( addiw, x11, x10, -0xa, 0x40000000000, -0xa, x6, 352, x7)
+
+inst_67:
+// rs1_val == 8796093022208,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x80000000000; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x5, 0x80000000000, 0x5, x6, 360, x7)
+
+inst_68:
+// rs1_val == 17592186044416,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x100000000000; immval:-0x6
+TEST_IMM_OP( addiw, x11, x10, -0x6, 0x100000000000, -0x6, x6, 368, x7)
+
+inst_69:
+// rs1_val == 35184372088832,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x200000000000; immval:-0x4
+TEST_IMM_OP( addiw, x11, x10, -0x4, 0x200000000000, -0x4, x6, 376, x7)
+
+inst_70:
+// rs1_val == 70368744177664,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x400000000000; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x334, 0x400000000000, 0x334, x6, 384, x7)
+
+inst_71:
+// rs1_val == 140737488355328,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x800000000000; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x555, 0x800000000000, 0x555, x6, 392, x7)
+
+inst_72:
+// rs1_val == 281474976710656,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x1000000000000; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x2c, 0x1000000000000, 0x2c, x6, 400, x7)
+
+inst_73:
+// rs1_val == 562949953421312,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2000000000000; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x4, 0x2000000000000, 0x4, x6, 408, x7)
+
+inst_74:
+// rs1_val == 1125899906842624,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4000000000000; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x667, 0x4000000000000, 0x667, x6, 416, x7)
+
+inst_75:
+// rs1_val == 2251799813685248,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x8000000000000; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x332, 0x8000000000000, 0x332, x6, 424, x7)
+
+inst_76:
+// rs1_val == 9007199254740992,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x20000000000000; immval:-0x9
+TEST_IMM_OP( addiw, x11, x10, -0x9, 0x20000000000000, -0x9, x6, 432, x7)
+
+inst_77:
+// rs1_val == 18014398509481984,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x40000000000000; immval:-0x3
+TEST_IMM_OP( addiw, x11, x10, -0x3, 0x40000000000000, -0x3, x6, 440, x7)
+
+inst_78:
+// rs1_val == 36028797018963968,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x80000000000000; immval:-0x4
+TEST_IMM_OP( addiw, x11, x10, -0x4, 0x80000000000000, -0x4, x6, 448, x7)
+
+inst_79:
+// rs1_val == 72057594037927936,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x100000000000000; immval:0x8
+TEST_IMM_OP( addiw, x11, x10, 0x8, 0x100000000000000, 0x8, x6, 456, x7)
+
+inst_80:
+// rs1_val == 144115188075855872,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x200000000000000; immval:-0x8
+TEST_IMM_OP( addiw, x11, x10, -0x8, 0x200000000000000, -0x8, x6, 464, x7)
+
+inst_81:
+// rs1_val == 288230376151711744,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x400000000000000; immval:0x1
+TEST_IMM_OP( addiw, x11, x10, 0x1, 0x400000000000000, 0x1, x6, 472, x7)
+
+inst_82:
+// rs1_val == 576460752303423488,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x800000000000000; immval:0x1
+TEST_IMM_OP( addiw, x11, x10, 0x1, 0x800000000000000, 0x1, x6, 480, x7)
+
+inst_83:
+// rs1_val == 1152921504606846976,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x1000000000000000; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x2, 0x1000000000000000, 0x2, x6, 488, x7)
+
+inst_84:
+// rs1_val == 2305843009213693952,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2000000000000000; immval:0x8
+TEST_IMM_OP( addiw, x11, x10, 0x8, 0x2000000000000000, 0x8, x6, 496, x7)
+
+inst_85:
+// rs1_val == 4611686018427387904,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4000000000000000; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x334, 0x4000000000000000, 0x334, x6, 504, x7)
+
+inst_86:
+// rs1_val == -3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x3; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x551, -0x3, 0x554, x6, 512, x7)
+
+inst_87:
+// rs1_val == -5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5; immval:-0x6
+TEST_IMM_OP( addiw, x11, x10, -0xb, -0x5, -0x6, x6, 520, x7)
+
+inst_88:
+// rs1_val == -9,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x9; immval:-0x6
+TEST_IMM_OP( addiw, x11, x10, -0xf, -0x9, -0x6, x6, 528, x7)
+
+inst_89:
+// rs1_val == -17,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x11; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x1b, -0x11, 0x2c, x6, 536, x7)
+
+inst_90:
+// rs1_val == -33,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x21; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x313, -0x21, 0x334, x6, 544, x7)
+
+inst_91:
+// rs1_val == -65,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x41; immval:-0x101
+TEST_IMM_OP( addiw, x11, x10, -0x142, -0x41, -0x101, x6, 552, x7)
+
+inst_92:
+// rs1_val == -129,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x81; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x54, -0x81, 0x2d, x6, 560, x7)
+
+inst_93:
+// rs1_val == -257,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x101; immval:0x200
+TEST_IMM_OP( addiw, x11, x10, 0xff, -0x101, 0x200, x6, 568, x7)
+
+inst_94:
+// rs1_val == -513,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x201; immval:-0xa
+TEST_IMM_OP( addiw, x11, x10, -0x20b, -0x201, -0xa, x6, 576, x7)
+
+inst_95:
+// rs1_val == -1025,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x401; immval:-0x8
+TEST_IMM_OP( addiw, x11, x10, -0x409, -0x401, -0x8, x6, 584, x7)
+
+inst_96:
+// rs1_val == -2049,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x801; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, -0x7fd, -0x801, 0x4, x6, 592, x7)
+
+inst_97:
+// rs1_val == -4097,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x1001; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, -0x99b, -0x1001, 0x666, x6, 600, x7)
+
+inst_98:
+// rs1_val == -8193,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x2001; immval:-0x401
+TEST_IMM_OP( addiw, x11, x10, -0x2402, -0x2001, -0x401, x6, 608, x7)
+
+inst_99:
+// rs1_val == -16385,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x4001; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, -0x3ccf, -0x4001, 0x332, x6, 616, x7)
+
+inst_100:
+// rs1_val == -32769,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x8001; immval:0x80
+TEST_IMM_OP( addiw, x11, x10, -0x7f81, -0x8001, 0x80, x6, 624, x7)
+
+inst_101:
+// rs1_val == -65537,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x10001; immval:-0x101
+TEST_IMM_OP( addiw, x11, x10, -0x10102, -0x10001, -0x101, x6, 632, x7)
+
+inst_102:
+// rs1_val == -131073,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x20001; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, -0x1ffff, -0x20001, 0x2, x6, 640, x7)
+
+inst_103:
+// rs1_val == -262145,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x40001; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, -0x40557, -0x40001, -0x556, x6, 648, x7)
+
+inst_104:
+// rs1_val == -524289,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x80001; immval:-0x8
+TEST_IMM_OP( addiw, x11, x10, -0x80009, -0x80001, -0x8, x6, 656, x7)
+
+inst_105:
+// rs1_val == -2097153,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x200001; immval:-0x8
+TEST_IMM_OP( addiw, x11, x10, -0x200009, -0x200001, -0x8, x6, 664, x7)
+
+inst_106:
+// rs1_val == -4194305,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x400001; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, -0x3fffff, -0x400001, 0x2, x6, 672, x7)
+
+inst_107:
+// rs1_val == -8388609,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x800001; immval:0x400
+TEST_IMM_OP( addiw, x11, x10, -0x7ffc01, -0x800001, 0x400, x6, 680, x7)
+
+inst_108:
+// rs1_val == -16777217,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x1000001; immval:-0x7
+TEST_IMM_OP( addiw, x11, x10, -0x1000008, -0x1000001, -0x7, x6, 688, x7)
+
+inst_109:
+// rs1_val == -33554433,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x2000001; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x200002d, -0x2000001, -0x2c, x6, 696, x7)
+
+inst_110:
+// rs1_val == -67108865,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x4000001; immval:-0x800
+TEST_IMM_OP( addiw, x11, x10, -0x4000801, -0x4000001, -0x800, x6, 704, x7)
+
+inst_111:
+// rs1_val == -134217729,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x8000001; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, -0x7fffaad, -0x8000001, 0x554, x6, 712, x7)
+
+inst_112:
+// rs1_val == -268435457,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x10000001; immval:0x3ff
+TEST_IMM_OP( addiw, x11, x10, -0xffffc02, -0x10000001, 0x3ff, x6, 720, x7)
+
+inst_113:
+// rs1_val == -1073741825,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x40000001; immval:0x40
+TEST_IMM_OP( addiw, x11, x10, -0x3fffffc1, -0x40000001, 0x40, x6, 728, x7)
+
+inst_114:
+// rs1_val == -4294967297,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x100000001; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x2e, -0x100000001, -0x2d, x6, 736, x7)
+
+inst_115:
+// rs1_val == -8589934593,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x200000001; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x4, -0x200000001, 0x5, x6, 744, x7)
+
+inst_116:
+// rs1_val == -17179869185,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x400000001; immval:-0x7
+TEST_IMM_OP( addiw, x11, x10, -0x8, -0x400000001, -0x7, x6, 752, x7)
+
+inst_117:
+// rs1_val == -34359738369,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x800000001; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x555, -0x800000001, 0x556, x6, 760, x7)
+
+inst_118:
+// rs1_val == -68719476737,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x1000000001; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, -0x1, -0x1000000001, 0x0, x6, 768, x7)
+
+inst_119:
+// rs1_val == -137438953473,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x2000000001; immval:0x10
+TEST_IMM_OP( addiw, x11, x10, 0xf, -0x2000000001, 0x10, x6, 776, x7)
+
+inst_120:
+// rs1_val == -274877906945,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x4000000001; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x5, -0x4000000001, 0x6, x6, 784, x7)
+
+inst_121:
+// rs1_val == -549755813889,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x8000000001; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x2, -0x8000000001, 0x3, x6, 792, x7)
+
+inst_122:
+// rs1_val == -1099511627777,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x10000000001; immval:0x200
+TEST_IMM_OP( addiw, x11, x10, 0x1ff, -0x10000000001, 0x200, x6, 800, x7)
+
+inst_123:
+// rs1_val == -2199023255553,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x20000000001; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x666, -0x20000000001, 0x667, x6, 808, x7)
+
+inst_124:
+// rs1_val == -4398046511105,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x40000000001; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x3, -0x40000000001, 0x4, x6, 816, x7)
+
+inst_125:
+// rs1_val == -17592186044417,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x100000000001; immval:-0x2
+TEST_IMM_OP( addiw, x11, x10, -0x3, -0x100000000001, -0x2, x6, 824, x7)
+
+inst_126:
+// rs1_val == -35184372088833,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x200000000001; immval:0x3ff
+TEST_IMM_OP( addiw, x11, x10, 0x3fe, -0x200000000001, 0x3ff, x6, 832, x7)
+
+inst_127:
+// rs1_val == -70368744177665,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x400000000001; immval:0x80
+TEST_IMM_OP( addiw, x11, x10, 0x7f, -0x400000000001, 0x80, x6, 840, x7)
+
+inst_128:
+// rs1_val == -140737488355329,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x800000000001; immval:-0x41
+TEST_IMM_OP( addiw, x11, x10, -0x42, -0x800000000001, -0x41, x6, 848, x7)
+
+inst_129:
+// rs1_val == -281474976710657,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x1000000000001; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, -0x1, -0x1000000000001, 0x0, x6, 856, x7)
+
+inst_130:
+// rs1_val == -1125899906842625,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x4000000000001; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x2, -0x4000000000001, 0x3, x6, 864, x7)
+
+inst_131:
+// rs1_val == -2251799813685249,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x8000000000001; immval:-0x800
+TEST_IMM_OP( addiw, x11, x10, -0x801, -0x8000000000001, -0x800, x6, 872, x7)
+
+inst_132:
+// rs1_val == -4503599627370497,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x10000000000001; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x2d, -0x10000000000001, -0x2c, x6, 880, x7)
+
+inst_133:
+// rs1_val == -9007199254740993,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x20000000000001; immval:-0x11
+TEST_IMM_OP( addiw, x11, x10, -0x12, -0x20000000000001, -0x11, x6, 888, x7)
+
+inst_134:
+// rs1_val == -18014398509481985,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x40000000000001; immval:0x20
+TEST_IMM_OP( addiw, x11, x10, 0x1f, -0x40000000000001, 0x20, x6, 896, x7)
+
+inst_135:
+// rs1_val == -72057594037927937,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x100000000000001; immval:0x400
+TEST_IMM_OP( addiw, x11, x10, 0x3ff, -0x100000000000001, 0x400, x6, 904, x7)
+
+inst_136:
+// rs1_val == -144115188075855873,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x200000000000001; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x666, -0x200000000000001, 0x667, x6, 912, x7)
+
+inst_137:
+// rs1_val == -576460752303423489,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x800000000000001; immval:-0x2
+TEST_IMM_OP( addiw, x11, x10, -0x3, -0x800000000000001, -0x2, x6, 920, x7)
+
+inst_138:
+// rs1_val == -1152921504606846977,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x1000000000000001; immval:-0x11
+TEST_IMM_OP( addiw, x11, x10, -0x12, -0x1000000000000001, -0x11, x6, 928, x7)
+
+inst_139:
+// rs1_val == -2305843009213693953,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x2000000000000001; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x2e, -0x2000000000000001, -0x2d, x6, 936, x7)
+
+inst_140:
+// rs1_val == -4611686018427387905,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x4000000000000001; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, -0x1, -0x4000000000000001, 0x0, x6, 944, x7)
+
+inst_141:
+// rs1_val == 6148914691236517205,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x81
+TEST_IMM_OP( addiw, x11, x10, 0x555554d4, 0x5555555555555555, -0x81, x6, 952, x7)
+
+inst_142:
+// rs1_val==3 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x6, 0x3, 0x3, x6, 960, x7)
+
+inst_143:
+// rs1_val==3 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x558, 0x3, 0x555, x6, 968, x7)
+
+inst_144:
+// rs1_val==3 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, -0x553, 0x3, -0x556, x6, 976, x7)
+
+inst_145:
+// rs1_val==3 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x8, 0x3, 0x5, x6, 984, x7)
+
+inst_146:
+// rs1_val==3 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x336, 0x3, 0x333, x6, 992, x7)
+
+inst_147:
+// rs1_val==3 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x669, 0x3, 0x666, x6, 1000, x7)
+
+inst_148:
+// rs1_val==3 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x2a, 0x3, -0x2d, x6, 1008, x7)
+
+inst_149:
+// rs1_val==3 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x30, 0x3, 0x2d, x6, 1016, x7)
+
+inst_150:
+// rs1_val==3 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x5, 0x3, 0x2, x6, 1024, x7)
+
+inst_151:
+// rs1_val==3 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x557, 0x3, 0x554, x6, 1032, x7)
+
+inst_152:
+// rs1_val==3 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x3, 0x3, 0x0, x6, 1040, x7)
+
+inst_153:
+// rs1_val==3 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x7, 0x3, 0x4, x6, 1048, x7)
+
+inst_154:
+// rs1_val==3 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x335, 0x3, 0x332, x6, 1056, x7)
+
+inst_155:
+// rs1_val==3 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x668, 0x3, 0x665, x6, 1064, x7)
+
+inst_156:
+// rs1_val==3 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x2f, 0x3, 0x2c, x6, 1072, x7)
+
+inst_157:
+// rs1_val==3 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x559, 0x3, 0x556, x6, 1080, x7)
+
+inst_158:
+// rs1_val==3 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, -0x552, 0x3, -0x555, x6, 1088, x7)
+
+inst_159:
+// rs1_val==3 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x9, 0x3, 0x6, x6, 1096, x7)
+
+inst_160:
+// rs1_val==3 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x337, 0x3, 0x334, x6, 1104, x7)
+
+inst_161:
+// rs1_val==3 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x66a, 0x3, 0x667, x6, 1112, x7)
+
+inst_162:
+// rs1_val==3 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x29, 0x3, -0x2c, x6, 1120, x7)
+
+inst_163:
+// rs1_val==3 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x31, 0x3, 0x2e, x6, 1128, x7)
+
+inst_164:
+// rs1_val==6148914691236517205 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x55555558, 0x5555555555555555, 0x3, x6, 1136, x7)
+
+inst_165:
+// rs1_val==6148914691236517205 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x55555aaa, 0x5555555555555555, 0x555, x6, 1144, x7)
+
+inst_166:
+// rs1_val==6148914691236517205 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, 0x55554fff, 0x5555555555555555, -0x556, x6, 1152, x7)
+
+inst_167:
+// rs1_val==6148914691236517205 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x5555555a, 0x5555555555555555, 0x5, x6, 1160, x7)
+
+inst_168:
+// rs1_val==6148914691236517205 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x55555888, 0x5555555555555555, 0x333, x6, 1168, x7)
+
+inst_169:
+// rs1_val==6148914691236517205 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x55555bbb, 0x5555555555555555, 0x666, x6, 1176, x7)
+
+inst_170:
+// rs1_val==6148914691236517205 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x55555528, 0x5555555555555555, -0x2d, x6, 1184, x7)
+
+inst_171:
+// rs1_val==6148914691236517205 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x55555582, 0x5555555555555555, 0x2d, x6, 1192, x7)
+
+inst_172:
+// rs1_val==6148914691236517205 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x55555557, 0x5555555555555555, 0x2, x6, 1200, x7)
+
+inst_173:
+// rs1_val==6148914691236517205 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x55555aa9, 0x5555555555555555, 0x554, x6, 1208, x7)
+
+inst_174:
+// rs1_val==6148914691236517205 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x55555555, 0x5555555555555555, 0x0, x6, 1216, x7)
+
+inst_175:
+// rs1_val==6148914691236517205 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x55555559, 0x5555555555555555, 0x4, x6, 1224, x7)
+
+inst_176:
+// rs1_val==6148914691236517205 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x55555887, 0x5555555555555555, 0x332, x6, 1232, x7)
+
+inst_177:
+// rs1_val==6148914691236517205 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x55555bba, 0x5555555555555555, 0x665, x6, 1240, x7)
+
+inst_178:
+// rs1_val==6148914691236517205 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x55555581, 0x5555555555555555, 0x2c, x6, 1248, x7)
+
+inst_179:
+// rs1_val==6148914691236517205 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x55555aab, 0x5555555555555555, 0x556, x6, 1256, x7)
+
+inst_180:
+// rs1_val==6148914691236517205 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, 0x55555000, 0x5555555555555555, -0x555, x6, 1264, x7)
+
+inst_181:
+// rs1_val==6148914691236517205 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x5555555b, 0x5555555555555555, 0x6, x6, 1272, x7)
+
+inst_182:
+// rs1_val==6148914691236517205 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x55555889, 0x5555555555555555, 0x334, x6, 1280, x7)
+
+inst_183:
+// rs1_val==6148914691236517205 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x55555bbc, 0x5555555555555555, 0x667, x6, 1288, x7)
+
+inst_184:
+// rs1_val==6148914691236517205 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x55555529, 0x5555555555555555, -0x2c, x6, 1296, x7)
+
+inst_185:
+// rs1_val==6148914691236517205 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x55555583, 0x5555555555555555, 0x2e, x6, 1304, x7)
+
+inst_186:
+// rs1_val==-6148914691236517206 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, -0x55555553, -0x5555555555555556, 0x3, x6, 1312, x7)
+
+inst_187:
+// rs1_val==-6148914691236517206 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, -0x55555aac, -0x5555555555555556, -0x556, x6, 1320, x7)
+
+inst_188:
+// rs1_val==-6148914691236517206 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, -0x55555551, -0x5555555555555556, 0x5, x6, 1328, x7)
+
+inst_189:
+// rs1_val==-6148914691236517206 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, -0x55555223, -0x5555555555555556, 0x333, x6, 1336, x7)
+
+inst_190:
+// rs1_val==-6148914691236517206 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, -0x55554ef0, -0x5555555555555556, 0x666, x6, 1344, x7)
+
+inst_191:
+// rs1_val==-6148914691236517206 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x55555583, -0x5555555555555556, -0x2d, x6, 1352, x7)
+
+inst_192:
+// rs1_val==-6148914691236517206 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x55555529, -0x5555555555555556, 0x2d, x6, 1360, x7)
+
+inst_193:
+// rs1_val==-6148914691236517206 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, -0x55555554, -0x5555555555555556, 0x2, x6, 1368, x7)
+
+inst_194:
+// rs1_val==-6148914691236517206 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, -0x55555002, -0x5555555555555556, 0x554, x6, 1376, x7)
+
+inst_195:
+// rs1_val==-6148914691236517206 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, -0x55555556, -0x5555555555555556, 0x0, x6, 1384, x7)
+
+inst_196:
+// rs1_val==-6148914691236517206 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, -0x55555552, -0x5555555555555556, 0x4, x6, 1392, x7)
+
+inst_197:
+// rs1_val==-6148914691236517206 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, -0x55555224, -0x5555555555555556, 0x332, x6, 1400, x7)
+
+inst_198:
+// rs1_val==-6148914691236517206 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, -0x55554ef1, -0x5555555555555556, 0x665, x6, 1408, x7)
+
+inst_199:
+// rs1_val==-6148914691236517206 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x5555552a, -0x5555555555555556, 0x2c, x6, 1416, x7)
+
+inst_200:
+// rs1_val==-6148914691236517206 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, -0x55555000, -0x5555555555555556, 0x556, x6, 1424, x7)
+
+inst_201:
+// rs1_val==-6148914691236517206 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, -0x55555aab, -0x5555555555555556, -0x555, x6, 1432, x7)
+
+inst_202:
+// rs1_val==-6148914691236517206 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, -0x55555550, -0x5555555555555556, 0x6, x6, 1440, x7)
+
+inst_203:
+// rs1_val==-6148914691236517206 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, -0x55555222, -0x5555555555555556, 0x334, x6, 1448, x7)
+
+inst_204:
+// rs1_val==-6148914691236517206 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, -0x55554eef, -0x5555555555555556, 0x667, x6, 1456, x7)
+
+inst_205:
+// rs1_val==-6148914691236517206 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x55555582, -0x5555555555555556, -0x2c, x6, 1464, x7)
+
+inst_206:
+// rs1_val==-6148914691236517206 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, -0x55555528, -0x5555555555555556, 0x2e, x6, 1472, x7)
+
+inst_207:
+// rs1_val==5 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x8, 0x5, 0x3, x6, 1480, x7)
+
+inst_208:
+// rs1_val==5 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x55a, 0x5, 0x555, x6, 1488, x7)
+
+inst_209:
+// rs1_val==5 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, -0x551, 0x5, -0x556, x6, 1496, x7)
+
+inst_210:
+// rs1_val==5 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0xa, 0x5, 0x5, x6, 1504, x7)
+
+inst_211:
+// rs1_val==5 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x338, 0x5, 0x333, x6, 1512, x7)
+
+inst_212:
+// rs1_val==5 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x66b, 0x5, 0x666, x6, 1520, x7)
+
+inst_213:
+// rs1_val==5 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x28, 0x5, -0x2d, x6, 1528, x7)
+
+inst_214:
+// rs1_val==5 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x32, 0x5, 0x2d, x6, 1536, x7)
+
+inst_215:
+// rs1_val==5 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x7, 0x5, 0x2, x6, 1544, x7)
+
+inst_216:
+// rs1_val==5 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x559, 0x5, 0x554, x6, 1552, x7)
+
+inst_217:
+// rs1_val==5 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x5, 0x5, 0x0, x6, 1560, x7)
+
+inst_218:
+// rs1_val==5 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x9, 0x5, 0x4, x6, 1568, x7)
+
+inst_219:
+// rs1_val==5 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x337, 0x5, 0x332, x6, 1576, x7)
+
+inst_220:
+// rs1_val==5 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x66a, 0x5, 0x665, x6, 1584, x7)
+
+inst_221:
+// rs1_val==5 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x31, 0x5, 0x2c, x6, 1592, x7)
+
+inst_222:
+// rs1_val==5 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x55b, 0x5, 0x556, x6, 1600, x7)
+
+inst_223:
+// rs1_val==5 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, -0x550, 0x5, -0x555, x6, 1608, x7)
+
+inst_224:
+// rs1_val==5 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0xb, 0x5, 0x6, x6, 1616, x7)
+
+inst_225:
+// rs1_val==5 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x339, 0x5, 0x334, x6, 1624, x7)
+
+inst_226:
+// rs1_val==5 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x66c, 0x5, 0x667, x6, 1632, x7)
+
+inst_227:
+// rs1_val==5 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x27, 0x5, -0x2c, x6, 1640, x7)
+
+inst_228:
+// rs1_val==5 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x33, 0x5, 0x2e, x6, 1648, x7)
+
+inst_229:
+// rs1_val==3689348814741910323 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x33333336, 0x3333333333333333, 0x3, x6, 1656, x7)
+
+inst_230:
+// rs1_val==3689348814741910323 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x33333888, 0x3333333333333333, 0x555, x6, 1664, x7)
+
+inst_231:
+// rs1_val==3689348814741910323 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, 0x33332ddd, 0x3333333333333333, -0x556, x6, 1672, x7)
+
+inst_232:
+// rs1_val==3689348814741910323 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x33333338, 0x3333333333333333, 0x5, x6, 1680, x7)
+
+inst_233:
+// rs1_val==3689348814741910323 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x33333666, 0x3333333333333333, 0x333, x6, 1688, x7)
+
+inst_234:
+// rs1_val==3689348814741910323 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x33333999, 0x3333333333333333, 0x666, x6, 1696, x7)
+
+inst_235:
+// rs1_val==3689348814741910323 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x33333306, 0x3333333333333333, -0x2d, x6, 1704, x7)
+
+inst_236:
+// rs1_val==3689348814741910323 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x33333360, 0x3333333333333333, 0x2d, x6, 1712, x7)
+
+inst_237:
+// rs1_val==3689348814741910323 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x33333335, 0x3333333333333333, 0x2, x6, 1720, x7)
+
+inst_238:
+// rs1_val==3689348814741910323 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x33333887, 0x3333333333333333, 0x554, x6, 1728, x7)
+
+inst_239:
+// rs1_val==3689348814741910323 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x33333333, 0x3333333333333333, 0x0, x6, 1736, x7)
+
+inst_240:
+// rs1_val==3689348814741910323 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x33333337, 0x3333333333333333, 0x4, x6, 1744, x7)
+
+inst_241:
+// rs1_val==3689348814741910323 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x33333665, 0x3333333333333333, 0x332, x6, 1752, x7)
+
+inst_242:
+// rs1_val==3689348814741910323 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x33333998, 0x3333333333333333, 0x665, x6, 1760, x7)
+
+inst_243:
+// rs1_val==3689348814741910323 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x3333335f, 0x3333333333333333, 0x2c, x6, 1768, x7)
+
+inst_244:
+// rs1_val==3689348814741910323 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x33333889, 0x3333333333333333, 0x556, x6, 1776, x7)
+
+inst_245:
+// rs1_val==3689348814741910323 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, 0x33332dde, 0x3333333333333333, -0x555, x6, 1784, x7)
+
+inst_246:
+// rs1_val==3689348814741910323 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x33333339, 0x3333333333333333, 0x6, x6, 1792, x7)
+
+inst_247:
+// rs1_val==3689348814741910323 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x33333667, 0x3333333333333333, 0x334, x6, 1800, x7)
+
+inst_248:
+// rs1_val==3689348814741910323 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x3333399a, 0x3333333333333333, 0x667, x6, 1808, x7)
+
+inst_249:
+// rs1_val==3689348814741910323 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x33333307, 0x3333333333333333, -0x2c, x6, 1816, x7)
+
+inst_250:
+// rs1_val==3689348814741910323 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x33333361, 0x3333333333333333, 0x2e, x6, 1824, x7)
+
+inst_251:
+// rs1_val==7378697629483820646 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x66666669, 0x6666666666666666, 0x3, x6, 1832, x7)
+
+inst_252:
+// rs1_val==7378697629483820646 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x66666bbb, 0x6666666666666666, 0x555, x6, 1840, x7)
+
+inst_253:
+// rs1_val==7378697629483820646 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, 0x66666110, 0x6666666666666666, -0x556, x6, 1848, x7)
+
+inst_254:
+// rs1_val==7378697629483820646 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x6666666b, 0x6666666666666666, 0x5, x6, 1856, x7)
+
+inst_255:
+// rs1_val==7378697629483820646 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x66666999, 0x6666666666666666, 0x333, x6, 1864, x7)
+
+inst_256:
+// rs1_val==7378697629483820646 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x66666ccc, 0x6666666666666666, 0x666, x6, 1872, x7)
+
+inst_257:
+// rs1_val==7378697629483820646 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x66666639, 0x6666666666666666, -0x2d, x6, 1880, x7)
+
+inst_258:
+// rs1_val==7378697629483820646 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x66666693, 0x6666666666666666, 0x2d, x6, 1888, x7)
+
+inst_259:
+// rs1_val==7378697629483820646 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x66666668, 0x6666666666666666, 0x2, x6, 1896, x7)
+
+inst_260:
+// rs1_val==7378697629483820646 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x66666bba, 0x6666666666666666, 0x554, x6, 1904, x7)
+
+inst_261:
+// rs1_val==7378697629483820646 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x66666666, 0x6666666666666666, 0x0, x6, 1912, x7)
+
+inst_262:
+// rs1_val==7378697629483820646 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x6666666a, 0x6666666666666666, 0x4, x6, 1920, x7)
+
+inst_263:
+// rs1_val==7378697629483820646 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x66666998, 0x6666666666666666, 0x332, x6, 1928, x7)
+
+inst_264:
+// rs1_val==7378697629483820646 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x66666ccb, 0x6666666666666666, 0x665, x6, 1936, x7)
+
+inst_265:
+// rs1_val==7378697629483820646 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x66666692, 0x6666666666666666, 0x2c, x6, 1944, x7)
+
+inst_266:
+// rs1_val==7378697629483820646 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x66666bbc, 0x6666666666666666, 0x556, x6, 1952, x7)
+
+inst_267:
+// rs1_val==7378697629483820646 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, 0x66666111, 0x6666666666666666, -0x555, x6, 1960, x7)
+
+inst_268:
+// rs1_val==7378697629483820646 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x6666666c, 0x6666666666666666, 0x6, x6, 1968, x7)
+
+inst_269:
+// rs1_val==7378697629483820646 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x6666699a, 0x6666666666666666, 0x334, x6, 1976, x7)
+
+inst_270:
+// rs1_val==7378697629483820646 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x66666ccd, 0x6666666666666666, 0x667, x6, 1984, x7)
+
+inst_271:
+// rs1_val==7378697629483820646 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x6666663a, 0x6666666666666666, -0x2c, x6, 1992, x7)
+
+inst_272:
+// rs1_val==7378697629483820646 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x66666694, 0x6666666666666666, 0x2e, x6, 2000, x7)
+
+inst_273:
+// rs1_val==-3037000499 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cd0, -0xb504f333, 0x3, x6, 2008, x7)
+
+inst_274:
+// rs1_val==-3037000499 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1222, -0xb504f333, 0x555, x6, 2016, x7)
+
+inst_275:
+// rs1_val==-3037000499 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0777, -0xb504f333, -0x556, x6, 2024, x7)
+
+inst_276:
+// rs1_val==-3037000499 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cd2, -0xb504f333, 0x5, x6, 2032, x7)
+
+inst_277:
+// rs1_val==-3037000499 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1000, -0xb504f333, 0x333, x6, 2040, x7)
+RVTEST_SIGBASE( x6,signature_x6_1)
+
+inst_278:
+// rs1_val==-3037000499 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1333, -0xb504f333, 0x666, x6, 0, x7)
+
+inst_279:
+// rs1_val==-3037000499 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0ca0, -0xb504f333, -0x2d, x6, 8, x7)
+
+inst_280:
+// rs1_val==-3037000499 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cfa, -0xb504f333, 0x2d, x6, 16, x7)
+
+inst_281:
+// rs1_val==-3037000499 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0ccf, -0xb504f333, 0x2, x6, 24, x7)
+
+inst_282:
+// rs1_val==-3037000499 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1221, -0xb504f333, 0x554, x6, 32, x7)
+
+inst_283:
+// rs1_val==-3037000499 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0ccd, -0xb504f333, 0x0, x6, 40, x7)
+
+inst_284:
+// rs1_val==-3037000499 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cd1, -0xb504f333, 0x4, x6, 48, x7)
+
+inst_285:
+// rs1_val==-3037000499 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0fff, -0xb504f333, 0x332, x6, 56, x7)
+
+inst_286:
+// rs1_val==-3037000499 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1332, -0xb504f333, 0x665, x6, 64, x7)
+
+inst_287:
+// rs1_val==-3037000499 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cf9, -0xb504f333, 0x2c, x6, 72, x7)
+
+inst_288:
+// rs1_val==-3037000499 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1223, -0xb504f333, 0x556, x6, 80, x7)
+
+inst_289:
+// rs1_val==-3037000499 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0778, -0xb504f333, -0x555, x6, 88, x7)
+
+inst_290:
+// rs1_val==-3037000499 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cd3, -0xb504f333, 0x6, x6, 96, x7)
+
+inst_291:
+// rs1_val==-3037000499 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1001, -0xb504f333, 0x334, x6, 104, x7)
+
+inst_292:
+// rs1_val==-3037000499 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1334, -0xb504f333, 0x667, x6, 112, x7)
+
+inst_293:
+// rs1_val==-3037000499 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0ca1, -0xb504f333, -0x2c, x6, 120, x7)
+
+inst_294:
+// rs1_val==-3037000499 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cfb, -0xb504f333, 0x2e, x6, 128, x7)
+
+inst_295:
+// rs1_val==3037000499 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cca, 0xb504f333, 0x3, x6, 136, x7)
+
+inst_296:
+// rs1_val==3037000499 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0778, 0xb504f333, 0x555, x6, 144, x7)
+
+inst_297:
+// rs1_val==3037000499 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, -0x4afb1223, 0xb504f333, -0x556, x6, 152, x7)
+
+inst_298:
+// rs1_val==3037000499 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cc8, 0xb504f333, 0x5, x6, 160, x7)
+
+inst_299:
+// rs1_val==3037000499 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, -0x4afb099a, 0xb504f333, 0x333, x6, 168, x7)
+
+inst_300:
+// rs1_val==3037000499 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0667, 0xb504f333, 0x666, x6, 176, x7)
+
+inst_301:
+// rs1_val==3037000499 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cfa, 0xb504f333, -0x2d, x6, 184, x7)
+
+inst_302:
+// rs1_val==3037000499 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0ca0, 0xb504f333, 0x2d, x6, 192, x7)
+
+inst_303:
+// rs1_val==3037000499 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0ccb, 0xb504f333, 0x2, x6, 200, x7)
+
+inst_304:
+// rs1_val==3037000499 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0779, 0xb504f333, 0x554, x6, 208, x7)
+
+inst_305:
+// rs1_val==3037000499 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0ccd, 0xb504f333, 0x0, x6, 216, x7)
+
+inst_306:
+// rs1_val==3037000499 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cc9, 0xb504f333, 0x4, x6, 224, x7)
+
+inst_307:
+// rs1_val==3037000499 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, -0x4afb099b, 0xb504f333, 0x332, x6, 232, x7)
+
+inst_308:
+// rs1_val==3037000499 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0668, 0xb504f333, 0x665, x6, 240, x7)
+
+inst_309:
+// rs1_val==3037000499 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0ca1, 0xb504f333, 0x2c, x6, 248, x7)
+
+inst_310:
+// rs1_val==3037000499 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0777, 0xb504f333, 0x556, x6, 256, x7)
+
+inst_311:
+// rs1_val==3037000499 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, -0x4afb1222, 0xb504f333, -0x555, x6, 264, x7)
+
+inst_312:
+// rs1_val==3037000499 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cc7, 0xb504f333, 0x6, x6, 272, x7)
+
+inst_313:
+// rs1_val==3037000499 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0999, 0xb504f333, 0x334, x6, 280, x7)
+
+inst_314:
+// rs1_val==3037000499 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0666, 0xb504f333, 0x667, x6, 288, x7)
+
+inst_315:
+// rs1_val==3037000499 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cf9, 0xb504f333, -0x2c, x6, 296, x7)
+
+inst_316:
+// rs1_val==3037000499 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0c9f, 0xb504f333, 0x2e, x6, 304, x7)
+
+inst_317:
+// rs1_val==2 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x5, 0x2, 0x3, x6, 312, x7)
+
+inst_318:
+// rs1_val==2 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x557, 0x2, 0x555, x6, 320, x7)
+
+inst_319:
+// rs1_val==2 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, -0x554, 0x2, -0x556, x6, 328, x7)
+
+inst_320:
+// rs1_val==2 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x7, 0x2, 0x5, x6, 336, x7)
+
+inst_321:
+// rs1_val==2 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x668, 0x2, 0x666, x6, 344, x7)
+
+inst_322:
+// rs1_val==2 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x2b, 0x2, -0x2d, x6, 352, x7)
+
+inst_323:
+// rs1_val==2 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x2f, 0x2, 0x2d, x6, 360, x7)
+
+inst_324:
+// rs1_val==2 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x4, 0x2, 0x2, x6, 368, x7)
+
+inst_325:
+// rs1_val==2 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x556, 0x2, 0x554, x6, 376, x7)
+
+inst_326:
+// rs1_val==2 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x2, 0x2, 0x0, x6, 384, x7)
+
+inst_327:
+// rs1_val==2 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x6, 0x2, 0x4, x6, 392, x7)
+
+inst_328:
+// rs1_val==2 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x334, 0x2, 0x332, x6, 400, x7)
+
+inst_329:
+// rs1_val==2 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x667, 0x2, 0x665, x6, 408, x7)
+
+inst_330:
+// rs1_val==2 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x2e, 0x2, 0x2c, x6, 416, x7)
+
+inst_331:
+// rs1_val==2 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x558, 0x2, 0x556, x6, 424, x7)
+
+inst_332:
+// rs1_val==2 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, -0x553, 0x2, -0x555, x6, 432, x7)
+
+inst_333:
+// rs1_val==2 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x8, 0x2, 0x6, x6, 440, x7)
+
+inst_334:
+// rs1_val==2 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x336, 0x2, 0x334, x6, 448, x7)
+
+inst_335:
+// rs1_val==2 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x669, 0x2, 0x667, x6, 456, x7)
+
+inst_336:
+// rs1_val==2 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x2a, 0x2, -0x2c, x6, 464, x7)
+
+inst_337:
+// rs1_val==2 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x2; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x30, 0x2, 0x2e, x6, 472, x7)
+
+inst_338:
+// rs1_val==6148914691236517204 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x55555557, 0x5555555555555554, 0x3, x6, 480, x7)
+
+inst_339:
+// rs1_val==6148914691236517204 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x55555aa9, 0x5555555555555554, 0x555, x6, 488, x7)
+
+inst_340:
+// rs1_val==6148914691236517204 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, 0x55554ffe, 0x5555555555555554, -0x556, x6, 496, x7)
+
+inst_341:
+// rs1_val==6148914691236517204 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x55555559, 0x5555555555555554, 0x5, x6, 504, x7)
+
+inst_342:
+// rs1_val==6148914691236517204 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x55555887, 0x5555555555555554, 0x333, x6, 512, x7)
+
+inst_343:
+// rs1_val==6148914691236517204 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x55555bba, 0x5555555555555554, 0x666, x6, 520, x7)
+
+inst_344:
+// rs1_val==6148914691236517204 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x55555527, 0x5555555555555554, -0x2d, x6, 528, x7)
+
+inst_345:
+// rs1_val==6148914691236517204 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x55555581, 0x5555555555555554, 0x2d, x6, 536, x7)
+
+inst_346:
+// rs1_val==6148914691236517204 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x55555556, 0x5555555555555554, 0x2, x6, 544, x7)
+
+inst_347:
+// rs1_val==6148914691236517204 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x55555aa8, 0x5555555555555554, 0x554, x6, 552, x7)
+
+inst_348:
+// rs1_val==6148914691236517204 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x55555554, 0x5555555555555554, 0x0, x6, 560, x7)
+
+inst_349:
+// rs1_val==6148914691236517204 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x55555558, 0x5555555555555554, 0x4, x6, 568, x7)
+
+inst_350:
+// rs1_val==6148914691236517204 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x55555886, 0x5555555555555554, 0x332, x6, 576, x7)
+
+inst_351:
+// rs1_val==6148914691236517204 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x55555bb9, 0x5555555555555554, 0x665, x6, 584, x7)
+
+inst_352:
+// rs1_val==6148914691236517204 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x55555580, 0x5555555555555554, 0x2c, x6, 592, x7)
+
+inst_353:
+// rs1_val==6148914691236517204 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x55555aaa, 0x5555555555555554, 0x556, x6, 600, x7)
+
+inst_354:
+// rs1_val==6148914691236517204 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, 0x55554fff, 0x5555555555555554, -0x555, x6, 608, x7)
+
+inst_355:
+// rs1_val==6148914691236517204 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x5555555a, 0x5555555555555554, 0x6, x6, 616, x7)
+
+inst_356:
+// rs1_val==6148914691236517204 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x55555888, 0x5555555555555554, 0x334, x6, 624, x7)
+
+inst_357:
+// rs1_val==6148914691236517204 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x55555bbb, 0x5555555555555554, 0x667, x6, 632, x7)
+
+inst_358:
+// rs1_val==6148914691236517204 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x55555528, 0x5555555555555554, -0x2c, x6, 640, x7)
+
+inst_359:
+// rs1_val==6148914691236517204 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x55555582, 0x5555555555555554, 0x2e, x6, 648, x7)
+
+inst_360:
+// rs1_val==0 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x3, 0x0, 0x3, x6, 656, x7)
+
+inst_361:
+// rs1_val==0 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x555, 0x0, 0x555, x6, 664, x7)
+
+inst_362:
+// rs1_val==0 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x5, 0x0, 0x5, x6, 672, x7)
+
+inst_363:
+// rs1_val==0 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x333, 0x0, 0x333, x6, 680, x7)
+
+inst_364:
+// rs1_val==0 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x666, 0x0, 0x666, x6, 688, x7)
+
+inst_365:
+// rs1_val==0 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x2d, 0x0, -0x2d, x6, 696, x7)
+
+inst_366:
+// rs1_val==0 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x2d, 0x0, 0x2d, x6, 704, x7)
+
+inst_367:
+// rs1_val==0 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x2, 0x0, 0x2, x6, 712, x7)
+
+inst_368:
+// rs1_val==6148914691236517206 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x55555582, 0x5555555555555556, 0x2c, x6, 720, x7)
+
+inst_369:
+// rs1_val==6148914691236517206 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x55555aac, 0x5555555555555556, 0x556, x6, 728, x7)
+
+inst_370:
+// rs1_val==6148914691236517206 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, 0x55555001, 0x5555555555555556, -0x555, x6, 736, x7)
+
+inst_371:
+// rs1_val==6148914691236517206 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x5555555c, 0x5555555555555556, 0x6, x6, 744, x7)
+
+inst_372:
+// rs1_val==6148914691236517206 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x5555588a, 0x5555555555555556, 0x334, x6, 752, x7)
+
+inst_373:
+// rs1_val==6148914691236517206 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x55555bbd, 0x5555555555555556, 0x667, x6, 760, x7)
+
+inst_374:
+// rs1_val==6148914691236517206 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x5555552a, 0x5555555555555556, -0x2c, x6, 768, x7)
+
+inst_375:
+// rs1_val==6148914691236517206 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x55555584, 0x5555555555555556, 0x2e, x6, 776, x7)
+
+inst_376:
+// rs1_val==-6148914691236517205 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, -0x55555552, -0x5555555555555555, 0x3, x6, 784, x7)
+
+inst_377:
+// rs1_val==-6148914691236517205 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, -0x55555000, -0x5555555555555555, 0x555, x6, 792, x7)
+
+inst_378:
+// rs1_val==-6148914691236517205 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, -0x55555aab, -0x5555555555555555, -0x556, x6, 800, x7)
+
+inst_379:
+// rs1_val==-6148914691236517205 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, -0x55555550, -0x5555555555555555, 0x5, x6, 808, x7)
+
+inst_380:
+// rs1_val==-6148914691236517205 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, -0x55555222, -0x5555555555555555, 0x333, x6, 816, x7)
+
+inst_381:
+// rs1_val==-6148914691236517205 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, -0x55554eef, -0x5555555555555555, 0x666, x6, 824, x7)
+
+inst_382:
+// rs1_val==-6148914691236517205 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x55555582, -0x5555555555555555, -0x2d, x6, 832, x7)
+
+inst_383:
+// rs1_val==-6148914691236517205 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x55555528, -0x5555555555555555, 0x2d, x6, 840, x7)
+
+inst_384:
+// rs1_val==-6148914691236517205 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, -0x55555553, -0x5555555555555555, 0x2, x6, 848, x7)
+
+inst_385:
+// rs1_val==-6148914691236517205 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, -0x55555001, -0x5555555555555555, 0x554, x6, 856, x7)
+
+inst_386:
+// rs1_val==-6148914691236517205 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, -0x55555555, -0x5555555555555555, 0x0, x6, 864, x7)
+
+inst_387:
+// rs1_val==-6148914691236517205 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, -0x55555551, -0x5555555555555555, 0x4, x6, 872, x7)
+
+inst_388:
+// rs1_val==-6148914691236517205 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, -0x55555223, -0x5555555555555555, 0x332, x6, 880, x7)
+
+inst_389:
+// rs1_val==-6148914691236517205 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, -0x55554ef0, -0x5555555555555555, 0x665, x6, 888, x7)
+
+inst_390:
+// rs1_val==-6148914691236517205 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x55555529, -0x5555555555555555, 0x2c, x6, 896, x7)
+
+inst_391:
+// rs1_val==-6148914691236517205 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, -0x55554fff, -0x5555555555555555, 0x556, x6, 904, x7)
+
+inst_392:
+// rs1_val==-6148914691236517205 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, -0x55555aaa, -0x5555555555555555, -0x555, x6, 912, x7)
+
+inst_393:
+// rs1_val==-6148914691236517205 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, -0x5555554f, -0x5555555555555555, 0x6, x6, 920, x7)
+
+inst_394:
+// rs1_val==-6148914691236517205 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, -0x55555221, -0x5555555555555555, 0x334, x6, 928, x7)
+
+inst_395:
+// rs1_val==-6148914691236517205 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, -0x55554eee, -0x5555555555555555, 0x667, x6, 936, x7)
+
+inst_396:
+// rs1_val==-6148914691236517205 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x55555581, -0x5555555555555555, -0x2c, x6, 944, x7)
+
+inst_397:
+// rs1_val==-6148914691236517205 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, -0x55555527, -0x5555555555555555, 0x2e, x6, 952, x7)
+
+inst_398:
+// rs1_val==6 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x9, 0x6, 0x3, x6, 960, x7)
+
+inst_399:
+// rs1_val==6 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x55b, 0x6, 0x555, x6, 968, x7)
+
+inst_400:
+// rs1_val==6 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, -0x550, 0x6, -0x556, x6, 976, x7)
+
+inst_401:
+// rs1_val==6 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0xb, 0x6, 0x5, x6, 984, x7)
+
+inst_402:
+// rs1_val==6 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x339, 0x6, 0x333, x6, 992, x7)
+
+inst_403:
+// rs1_val==6 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x66c, 0x6, 0x666, x6, 1000, x7)
+
+inst_404:
+// rs1_val==6 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x27, 0x6, -0x2d, x6, 1008, x7)
+
+inst_405:
+// rs1_val==6 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x33, 0x6, 0x2d, x6, 1016, x7)
+
+inst_406:
+// rs1_val==6 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x8, 0x6, 0x2, x6, 1024, x7)
+
+inst_407:
+// rs1_val==6 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x55a, 0x6, 0x554, x6, 1032, x7)
+
+inst_408:
+// rs1_val==6 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x6, 0x6, 0x0, x6, 1040, x7)
+
+inst_409:
+// rs1_val==6 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0xa, 0x6, 0x4, x6, 1048, x7)
+
+inst_410:
+// rs1_val==6 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x338, 0x6, 0x332, x6, 1056, x7)
+
+inst_411:
+// rs1_val==6 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x66b, 0x6, 0x665, x6, 1064, x7)
+
+inst_412:
+// rs1_val==6 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x32, 0x6, 0x2c, x6, 1072, x7)
+
+inst_413:
+// rs1_val==6 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x55c, 0x6, 0x556, x6, 1080, x7)
+
+inst_414:
+// rs1_val==6 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, -0x54f, 0x6, -0x555, x6, 1088, x7)
+
+inst_415:
+// rs1_val==6 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0xc, 0x6, 0x6, x6, 1096, x7)
+
+inst_416:
+// rs1_val==6 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x33a, 0x6, 0x334, x6, 1104, x7)
+
+inst_417:
+// rs1_val==6 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x66d, 0x6, 0x667, x6, 1112, x7)
+
+inst_418:
+// rs1_val==6 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x26, 0x6, -0x2c, x6, 1120, x7)
+
+inst_419:
+// rs1_val==6 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x34, 0x6, 0x2e, x6, 1128, x7)
+
+inst_420:
+// rs1_val==3689348814741910324 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x33333337, 0x3333333333333334, 0x3, x6, 1136, x7)
+
+inst_421:
+// rs1_val==3689348814741910324 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x33333889, 0x3333333333333334, 0x555, x6, 1144, x7)
+
+inst_422:
+// rs1_val==3689348814741910324 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, 0x33332dde, 0x3333333333333334, -0x556, x6, 1152, x7)
+
+inst_423:
+// rs1_val==3689348814741910324 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x33333339, 0x3333333333333334, 0x5, x6, 1160, x7)
+
+inst_424:
+// rs1_val==3689348814741910324 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x33333667, 0x3333333333333334, 0x333, x6, 1168, x7)
+
+inst_425:
+// rs1_val==3689348814741910324 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x3333399a, 0x3333333333333334, 0x666, x6, 1176, x7)
+
+inst_426:
+// rs1_val==3689348814741910324 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x33333307, 0x3333333333333334, -0x2d, x6, 1184, x7)
+
+inst_427:
+// rs1_val==3689348814741910324 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x33333361, 0x3333333333333334, 0x2d, x6, 1192, x7)
+
+inst_428:
+// rs1_val==3689348814741910324 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x33333336, 0x3333333333333334, 0x2, x6, 1200, x7)
+
+inst_429:
+// rs1_val==3689348814741910324 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x33333888, 0x3333333333333334, 0x554, x6, 1208, x7)
+
+inst_430:
+// rs1_val==3689348814741910324 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x33333334, 0x3333333333333334, 0x0, x6, 1216, x7)
+
+inst_431:
+// rs1_val==3689348814741910324 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x33333338, 0x3333333333333334, 0x4, x6, 1224, x7)
+
+inst_432:
+// rs1_val==3689348814741910324 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x33333666, 0x3333333333333334, 0x332, x6, 1232, x7)
+
+inst_433:
+// rs1_val==3689348814741910324 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x33333999, 0x3333333333333334, 0x665, x6, 1240, x7)
+
+inst_434:
+// rs1_val==3689348814741910324 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x33333360, 0x3333333333333334, 0x2c, x6, 1248, x7)
+
+inst_435:
+// rs1_val==3689348814741910324 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x3333388a, 0x3333333333333334, 0x556, x6, 1256, x7)
+
+inst_436:
+// rs1_val==3689348814741910324 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, 0x33332ddf, 0x3333333333333334, -0x555, x6, 1264, x7)
+
+inst_437:
+// rs1_val==3689348814741910324 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x3333333a, 0x3333333333333334, 0x6, x6, 1272, x7)
+
+inst_438:
+// rs1_val==3689348814741910324 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x33333668, 0x3333333333333334, 0x334, x6, 1280, x7)
+
+inst_439:
+// rs1_val==3689348814741910324 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x3333399b, 0x3333333333333334, 0x667, x6, 1288, x7)
+
+inst_440:
+// rs1_val==3689348814741910324 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x33333308, 0x3333333333333334, -0x2c, x6, 1296, x7)
+
+inst_441:
+// rs1_val==3689348814741910324 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x33333362, 0x3333333333333334, 0x2e, x6, 1304, x7)
+
+inst_442:
+// rs1_val==7378697629483820647 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x6666666a, 0x6666666666666667, 0x3, x6, 1312, x7)
+
+inst_443:
+// rs1_val==7378697629483820647 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x66666bbc, 0x6666666666666667, 0x555, x6, 1320, x7)
+
+inst_444:
+// rs1_val==7378697629483820647 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, 0x66666111, 0x6666666666666667, -0x556, x6, 1328, x7)
+
+inst_445:
+// rs1_val==7378697629483820647 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x6666666c, 0x6666666666666667, 0x5, x6, 1336, x7)
+
+inst_446:
+// rs1_val==7378697629483820647 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x6666699a, 0x6666666666666667, 0x333, x6, 1344, x7)
+
+inst_447:
+// rs1_val==7378697629483820647 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x66666ccd, 0x6666666666666667, 0x666, x6, 1352, x7)
+
+inst_448:
+// rs1_val==7378697629483820647 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x6666663a, 0x6666666666666667, -0x2d, x6, 1360, x7)
+
+inst_449:
+// rs1_val==7378697629483820647 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x66666694, 0x6666666666666667, 0x2d, x6, 1368, x7)
+
+inst_450:
+// rs1_val==7378697629483820647 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x66666669, 0x6666666666666667, 0x2, x6, 1376, x7)
+
+inst_451:
+// rs1_val==7378697629483820647 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x66666bbb, 0x6666666666666667, 0x554, x6, 1384, x7)
+
+inst_452:
+// rs1_val==7378697629483820647 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x66666667, 0x6666666666666667, 0x0, x6, 1392, x7)
+
+inst_453:
+// rs1_val==7378697629483820647 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x6666666b, 0x6666666666666667, 0x4, x6, 1400, x7)
+
+inst_454:
+// rs1_val==7378697629483820647 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x66666999, 0x6666666666666667, 0x332, x6, 1408, x7)
+
+inst_455:
+// rs1_val==7378697629483820647 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x66666ccc, 0x6666666666666667, 0x665, x6, 1416, x7)
+
+inst_456:
+// rs1_val==7378697629483820647 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x66666693, 0x6666666666666667, 0x2c, x6, 1424, x7)
+
+inst_457:
+// rs1_val==7378697629483820647 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x66666bbd, 0x6666666666666667, 0x556, x6, 1432, x7)
+
+inst_458:
+// rs1_val==7378697629483820647 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, 0x66666112, 0x6666666666666667, -0x555, x6, 1440, x7)
+
+inst_459:
+// rs1_val==7378697629483820647 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x6666666d, 0x6666666666666667, 0x6, x6, 1448, x7)
+
+inst_460:
+// rs1_val==7378697629483820647 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x6666699b, 0x6666666666666667, 0x334, x6, 1456, x7)
+
+inst_461:
+// rs1_val==7378697629483820647 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x66666cce, 0x6666666666666667, 0x667, x6, 1464, x7)
+
+inst_462:
+// rs1_val==7378697629483820647 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x6666663b, 0x6666666666666667, -0x2c, x6, 1472, x7)
+
+inst_463:
+// rs1_val==7378697629483820647 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x66666695, 0x6666666666666667, 0x2e, x6, 1480, x7)
+
+inst_464:
+// rs1_val==-3037000498 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cd1, -0xb504f332, 0x3, x6, 1488, x7)
+
+inst_465:
+// rs1_val==-3037000498 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1223, -0xb504f332, 0x555, x6, 1496, x7)
+
+inst_466:
+// rs1_val==-3037000498 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0778, -0xb504f332, -0x556, x6, 1504, x7)
+
+inst_467:
+// rs1_val==-3037000498 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cd3, -0xb504f332, 0x5, x6, 1512, x7)
+
+inst_468:
+// rs1_val==-3037000498 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1001, -0xb504f332, 0x333, x6, 1520, x7)
+
+inst_469:
+// rs1_val==-3037000498 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1334, -0xb504f332, 0x666, x6, 1528, x7)
+
+inst_470:
+// rs1_val==-3037000498 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0ca1, -0xb504f332, -0x2d, x6, 1536, x7)
+
+inst_471:
+// rs1_val==-3037000498 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cfb, -0xb504f332, 0x2d, x6, 1544, x7)
+
+inst_472:
+// rs1_val==-3037000498 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cd0, -0xb504f332, 0x2, x6, 1552, x7)
+
+inst_473:
+// rs1_val==-3037000498 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1222, -0xb504f332, 0x554, x6, 1560, x7)
+
+inst_474:
+// rs1_val==-3037000498 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cce, -0xb504f332, 0x0, x6, 1568, x7)
+
+inst_475:
+// rs1_val==-3037000498 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cd2, -0xb504f332, 0x4, x6, 1576, x7)
+
+inst_476:
+// rs1_val==-3037000498 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1000, -0xb504f332, 0x332, x6, 1584, x7)
+
+inst_477:
+// rs1_val==-3037000498 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1333, -0xb504f332, 0x665, x6, 1592, x7)
+
+inst_478:
+// rs1_val==-3037000498 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cfa, -0xb504f332, 0x2c, x6, 1600, x7)
+
+inst_479:
+// rs1_val==-3037000498 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1224, -0xb504f332, 0x556, x6, 1608, x7)
+
+inst_480:
+// rs1_val==-3037000498 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0779, -0xb504f332, -0x555, x6, 1616, x7)
+
+inst_481:
+// rs1_val==-3037000498 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cd4, -0xb504f332, 0x6, x6, 1624, x7)
+
+inst_482:
+// rs1_val==-3037000498 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1002, -0xb504f332, 0x334, x6, 1632, x7)
+
+inst_483:
+// rs1_val==-3037000498 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x4afb1335, -0xb504f332, 0x667, x6, 1640, x7)
+
+inst_484:
+// rs1_val==-3037000498 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0ca2, -0xb504f332, -0x2c, x6, 1648, x7)
+
+inst_485:
+// rs1_val==-3037000498 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x4afb0cfc, -0xb504f332, 0x2e, x6, 1656, x7)
+
+inst_486:
+// rs1_val==3037000500 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cc9, 0xb504f334, 0x3, x6, 1664, x7)
+
+inst_487:
+// rs1_val==3037000500 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0777, 0xb504f334, 0x555, x6, 1672, x7)
+
+inst_488:
+// rs1_val==3037000500 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, -0x4afb1222, 0xb504f334, -0x556, x6, 1680, x7)
+
+inst_489:
+// rs1_val==3037000500 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cc7, 0xb504f334, 0x5, x6, 1688, x7)
+
+inst_490:
+// rs1_val==3037000500 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0999, 0xb504f334, 0x333, x6, 1696, x7)
+
+inst_491:
+// rs1_val==3037000500 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0666, 0xb504f334, 0x666, x6, 1704, x7)
+
+inst_492:
+// rs1_val==3037000500 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cf9, 0xb504f334, -0x2d, x6, 1712, x7)
+
+inst_493:
+// rs1_val==3037000500 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0c9f, 0xb504f334, 0x2d, x6, 1720, x7)
+
+inst_494:
+// rs1_val==3037000500 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cca, 0xb504f334, 0x2, x6, 1728, x7)
+
+inst_495:
+// rs1_val==3037000500 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0778, 0xb504f334, 0x554, x6, 1736, x7)
+
+inst_496:
+// rs1_val==3037000500 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0ccc, 0xb504f334, 0x0, x6, 1744, x7)
+
+inst_497:
+// rs1_val==3037000500 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cc8, 0xb504f334, 0x4, x6, 1752, x7)
+
+inst_498:
+// rs1_val==3037000500 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, -0x4afb099a, 0xb504f334, 0x332, x6, 1760, x7)
+
+inst_499:
+// rs1_val==3037000500 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0667, 0xb504f334, 0x665, x6, 1768, x7)
+
+inst_500:
+// rs1_val==3037000500 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0ca0, 0xb504f334, 0x2c, x6, 1776, x7)
+
+inst_501:
+// rs1_val==3037000500 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0776, 0xb504f334, 0x556, x6, 1784, x7)
+
+inst_502:
+// rs1_val==3037000500 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, -0x4afb1221, 0xb504f334, -0x555, x6, 1792, x7)
+
+inst_503:
+// rs1_val==3037000500 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cc6, 0xb504f334, 0x6, x6, 1800, x7)
+
+inst_504:
+// rs1_val==3037000500 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0998, 0xb504f334, 0x334, x6, 1808, x7)
+
+inst_505:
+// rs1_val==3037000500 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0665, 0xb504f334, 0x667, x6, 1816, x7)
+
+inst_506:
+// rs1_val==3037000500 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cf8, 0xb504f334, -0x2c, x6, 1824, x7)
+
+inst_507:
+// rs1_val==3037000500 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0c9e, 0xb504f334, 0x2e, x6, 1832, x7)
+
+inst_508:
+// rs1_val==0 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x554, 0x0, 0x554, x6, 1840, x7)
+
+inst_509:
+// rs1_val==0 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x0, 0x0, 0x0, x6, 1848, x7)
+
+inst_510:
+// rs1_val==0 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x4, 0x0, 0x4, x6, 1856, x7)
+
+inst_511:
+// rs1_val==0 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x332, 0x0, 0x332, x6, 1864, x7)
+
+inst_512:
+// rs1_val==0 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x665, 0x0, 0x665, x6, 1872, x7)
+
+inst_513:
+// rs1_val==0 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x2c, 0x0, 0x2c, x6, 1880, x7)
+
+inst_514:
+// rs1_val==0 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x556, 0x0, 0x556, x6, 1888, x7)
+
+inst_515:
+// rs1_val==0 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, -0x555, 0x0, -0x555, x6, 1896, x7)
+
+inst_516:
+// rs1_val==0 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x6, 0x0, 0x6, x6, 1904, x7)
+
+inst_517:
+// rs1_val==0 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x334, 0x0, 0x334, x6, 1912, x7)
+
+inst_518:
+// rs1_val==0 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x667, 0x0, 0x667, x6, 1920, x7)
+
+inst_519:
+// rs1_val==0 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x2c, 0x0, -0x2c, x6, 1928, x7)
+
+inst_520:
+// rs1_val==0 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x0; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x2e, 0x0, 0x2e, x6, 1936, x7)
+
+inst_521:
+// rs1_val==4 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x7, 0x4, 0x3, x6, 1944, x7)
+
+inst_522:
+// rs1_val==4 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x559, 0x4, 0x555, x6, 1952, x7)
+
+inst_523:
+// rs1_val==4 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, -0x552, 0x4, -0x556, x6, 1960, x7)
+
+inst_524:
+// rs1_val==4 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x9, 0x4, 0x5, x6, 1968, x7)
+
+inst_525:
+// rs1_val==4 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x337, 0x4, 0x333, x6, 1976, x7)
+
+inst_526:
+// rs1_val==4 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x66a, 0x4, 0x666, x6, 1984, x7)
+
+inst_527:
+// rs1_val==4 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x29, 0x4, -0x2d, x6, 1992, x7)
+
+inst_528:
+// rs1_val==4 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x31, 0x4, 0x2d, x6, 2000, x7)
+
+inst_529:
+// rs1_val==4 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x6, 0x4, 0x2, x6, 2008, x7)
+
+inst_530:
+// rs1_val==4 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x558, 0x4, 0x554, x6, 2016, x7)
+
+inst_531:
+// rs1_val==4 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x4, 0x4, 0x0, x6, 2024, x7)
+
+inst_532:
+// rs1_val==4 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x8, 0x4, 0x4, x6, 2032, x7)
+
+inst_533:
+// rs1_val==4 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x336, 0x4, 0x332, x6, 2040, x7)
+RVTEST_SIGBASE( x6,signature_x6_2)
+
+inst_534:
+// rs1_val==4 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x669, 0x4, 0x665, x6, 0, x7)
+
+inst_535:
+// rs1_val==4 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x30, 0x4, 0x2c, x6, 8, x7)
+
+inst_536:
+// rs1_val==4 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x55a, 0x4, 0x556, x6, 16, x7)
+
+inst_537:
+// rs1_val==4 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, -0x551, 0x4, -0x555, x6, 24, x7)
+
+inst_538:
+// rs1_val==4 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0xa, 0x4, 0x6, x6, 32, x7)
+
+inst_539:
+// rs1_val==4 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x338, 0x4, 0x334, x6, 40, x7)
+
+inst_540:
+// rs1_val==4 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x66b, 0x4, 0x667, x6, 48, x7)
+
+inst_541:
+// rs1_val==4 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x28, 0x4, -0x2c, x6, 56, x7)
+
+inst_542:
+// rs1_val==4 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x4; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x32, 0x4, 0x2e, x6, 64, x7)
+
+inst_543:
+// rs1_val==3689348814741910322 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x33333335, 0x3333333333333332, 0x3, x6, 72, x7)
+
+inst_544:
+// rs1_val==3689348814741910322 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x33333887, 0x3333333333333332, 0x555, x6, 80, x7)
+
+inst_545:
+// rs1_val==3689348814741910322 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, 0x33332ddc, 0x3333333333333332, -0x556, x6, 88, x7)
+
+inst_546:
+// rs1_val==3689348814741910322 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x33333337, 0x3333333333333332, 0x5, x6, 96, x7)
+
+inst_547:
+// rs1_val==3689348814741910322 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x33333665, 0x3333333333333332, 0x333, x6, 104, x7)
+
+inst_548:
+// rs1_val==3689348814741910322 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x33333998, 0x3333333333333332, 0x666, x6, 112, x7)
+
+inst_549:
+// rs1_val==3689348814741910322 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x33333305, 0x3333333333333332, -0x2d, x6, 120, x7)
+
+inst_550:
+// rs1_val==3689348814741910322 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x3333335f, 0x3333333333333332, 0x2d, x6, 128, x7)
+
+inst_551:
+// rs1_val==3689348814741910322 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x33333334, 0x3333333333333332, 0x2, x6, 136, x7)
+
+inst_552:
+// rs1_val==3689348814741910322 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x33333886, 0x3333333333333332, 0x554, x6, 144, x7)
+
+inst_553:
+// rs1_val==3689348814741910322 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x33333332, 0x3333333333333332, 0x0, x6, 152, x7)
+
+inst_554:
+// rs1_val==3689348814741910322 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x33333336, 0x3333333333333332, 0x4, x6, 160, x7)
+
+inst_555:
+// rs1_val==3689348814741910322 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x33333664, 0x3333333333333332, 0x332, x6, 168, x7)
+
+inst_556:
+// rs1_val==3689348814741910322 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x33333997, 0x3333333333333332, 0x665, x6, 176, x7)
+
+inst_557:
+// rs1_val==3689348814741910322 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x3333335e, 0x3333333333333332, 0x2c, x6, 184, x7)
+
+inst_558:
+// rs1_val==3689348814741910322 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x33333888, 0x3333333333333332, 0x556, x6, 192, x7)
+
+inst_559:
+// rs1_val==3689348814741910322 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, 0x33332ddd, 0x3333333333333332, -0x555, x6, 200, x7)
+
+inst_560:
+// rs1_val==3689348814741910322 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x33333338, 0x3333333333333332, 0x6, x6, 208, x7)
+
+inst_561:
+// rs1_val==3689348814741910322 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x33333666, 0x3333333333333332, 0x334, x6, 216, x7)
+
+inst_562:
+// rs1_val==3689348814741910322 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x33333999, 0x3333333333333332, 0x667, x6, 224, x7)
+
+inst_563:
+// rs1_val==3689348814741910322 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x33333306, 0x3333333333333332, -0x2c, x6, 232, x7)
+
+inst_564:
+// rs1_val==3689348814741910322 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x33333360, 0x3333333333333332, 0x2e, x6, 240, x7)
+
+inst_565:
+// rs1_val==7378697629483820645 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x66666668, 0x6666666666666665, 0x3, x6, 248, x7)
+
+inst_566:
+// rs1_val==7378697629483820645 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x66666bba, 0x6666666666666665, 0x555, x6, 256, x7)
+
+inst_567:
+// rs1_val==7378697629483820645 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, 0x6666610f, 0x6666666666666665, -0x556, x6, 264, x7)
+
+inst_568:
+// rs1_val==7378697629483820645 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x6666666a, 0x6666666666666665, 0x5, x6, 272, x7)
+
+inst_569:
+// rs1_val==7378697629483820645 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x66666998, 0x6666666666666665, 0x333, x6, 280, x7)
+
+inst_570:
+// rs1_val==7378697629483820645 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x66666ccb, 0x6666666666666665, 0x666, x6, 288, x7)
+
+inst_571:
+// rs1_val==7378697629483820645 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x66666638, 0x6666666666666665, -0x2d, x6, 296, x7)
+
+inst_572:
+// rs1_val==7378697629483820645 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x66666692, 0x6666666666666665, 0x2d, x6, 304, x7)
+
+inst_573:
+// rs1_val==7378697629483820645 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x66666667, 0x6666666666666665, 0x2, x6, 312, x7)
+
+inst_574:
+// rs1_val==7378697629483820645 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x66666bb9, 0x6666666666666665, 0x554, x6, 320, x7)
+
+inst_575:
+// rs1_val==7378697629483820645 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x66666665, 0x6666666666666665, 0x0, x6, 328, x7)
+
+inst_576:
+// rs1_val==7378697629483820645 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x66666669, 0x6666666666666665, 0x4, x6, 336, x7)
+
+inst_577:
+// rs1_val==7378697629483820645 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x66666997, 0x6666666666666665, 0x332, x6, 344, x7)
+
+inst_578:
+// rs1_val==7378697629483820645 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x66666cca, 0x6666666666666665, 0x665, x6, 352, x7)
+
+inst_579:
+// rs1_val==7378697629483820645 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x66666691, 0x6666666666666665, 0x2c, x6, 360, x7)
+
+inst_580:
+// rs1_val==7378697629483820645 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, 0x66666bbb, 0x6666666666666665, 0x556, x6, 368, x7)
+
+inst_581:
+// rs1_val==7378697629483820645 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, 0x66666110, 0x6666666666666665, -0x555, x6, 376, x7)
+
+inst_582:
+// rs1_val==7378697629483820645 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x6666666b, 0x6666666666666665, 0x6, x6, 384, x7)
+
+inst_583:
+// rs1_val==7378697629483820645 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, 0x66666999, 0x6666666666666665, 0x334, x6, 392, x7)
+
+inst_584:
+// rs1_val==7378697629483820645 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, 0x66666ccc, 0x6666666666666665, 0x667, x6, 400, x7)
+
+inst_585:
+// rs1_val==7378697629483820645 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, 0x66666639, 0x6666666666666665, -0x2c, x6, 408, x7)
+
+inst_586:
+// rs1_val==7378697629483820645 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, 0x66666693, 0x6666666666666665, 0x2e, x6, 416, x7)
+
+inst_587:
+// rs1_val==3037000498 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0ccb, 0xb504f332, 0x3, x6, 424, x7)
+
+inst_588:
+// rs1_val==3037000498 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0779, 0xb504f332, 0x555, x6, 432, x7)
+
+inst_589:
+// rs1_val==3037000498 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, -0x4afb1224, 0xb504f332, -0x556, x6, 440, x7)
+
+inst_590:
+// rs1_val==3037000498 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cc9, 0xb504f332, 0x5, x6, 448, x7)
+
+inst_591:
+// rs1_val==3037000498 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, -0x4afb099b, 0xb504f332, 0x333, x6, 456, x7)
+
+inst_592:
+// rs1_val==3037000498 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0668, 0xb504f332, 0x666, x6, 464, x7)
+
+inst_593:
+// rs1_val==3037000498 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cfb, 0xb504f332, -0x2d, x6, 472, x7)
+
+inst_594:
+// rs1_val==3037000498 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0ca1, 0xb504f332, 0x2d, x6, 480, x7)
+
+inst_595:
+// rs1_val==3037000498 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0ccc, 0xb504f332, 0x2, x6, 488, x7)
+
+inst_596:
+// rs1_val==3037000498 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, -0x4afb077a, 0xb504f332, 0x554, x6, 496, x7)
+
+inst_597:
+// rs1_val==3037000498 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cce, 0xb504f332, 0x0, x6, 504, x7)
+
+inst_598:
+// rs1_val==3037000498 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cca, 0xb504f332, 0x4, x6, 512, x7)
+
+inst_599:
+// rs1_val==3037000498 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, -0x4afb099c, 0xb504f332, 0x332, x6, 520, x7)
+
+inst_600:
+// rs1_val==3037000498 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0669, 0xb504f332, 0x665, x6, 528, x7)
+
+inst_601:
+// rs1_val==3037000498 and imm_val==44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0ca2, 0xb504f332, 0x2c, x6, 536, x7)
+
+inst_602:
+// rs1_val==3037000498 and imm_val==1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x556
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0778, 0xb504f332, 0x556, x6, 544, x7)
+
+inst_603:
+// rs1_val==3037000498 and imm_val==-1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x555
+TEST_IMM_OP( addiw, x11, x10, -0x4afb1223, 0xb504f332, -0x555, x6, 552, x7)
+
+inst_604:
+// rs1_val==3037000498 and imm_val==6,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cc8, 0xb504f332, 0x6, x6, 560, x7)
+
+inst_605:
+// rs1_val==3037000498 and imm_val==820,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x334
+TEST_IMM_OP( addiw, x11, x10, -0x4afb099a, 0xb504f332, 0x334, x6, 568, x7)
+
+inst_606:
+// rs1_val==3037000498 and imm_val==1639,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x667
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0667, 0xb504f332, 0x667, x6, 576, x7)
+
+inst_607:
+// rs1_val==3037000498 and imm_val==-44,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x2c
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0cfa, 0xb504f332, -0x2c, x6, 584, x7)
+
+inst_608:
+// rs1_val==3037000498 and imm_val==46,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2e
+TEST_IMM_OP( addiw, x11, x10, -0x4afb0ca0, 0xb504f332, 0x2e, x6, 592, x7)
+
+inst_609:
+// rs1_val==6148914691236517206 and imm_val==3,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x3
+TEST_IMM_OP( addiw, x11, x10, 0x55555559, 0x5555555555555556, 0x3, x6, 600, x7)
+
+inst_610:
+// rs1_val==6148914691236517206 and imm_val==1365,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x555
+TEST_IMM_OP( addiw, x11, x10, 0x55555aab, 0x5555555555555556, 0x555, x6, 608, x7)
+
+inst_611:
+// rs1_val==6148914691236517206 and imm_val==-1366,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x556
+TEST_IMM_OP( addiw, x11, x10, 0x55555000, 0x5555555555555556, -0x556, x6, 616, x7)
+
+inst_612:
+// rs1_val==6148914691236517206 and imm_val==5,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x5
+TEST_IMM_OP( addiw, x11, x10, 0x5555555b, 0x5555555555555556, 0x5, x6, 624, x7)
+
+inst_613:
+// rs1_val==6148914691236517206 and imm_val==819,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x333
+TEST_IMM_OP( addiw, x11, x10, 0x55555889, 0x5555555555555556, 0x333, x6, 632, x7)
+
+inst_614:
+// rs1_val==6148914691236517206 and imm_val==1638,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x666
+TEST_IMM_OP( addiw, x11, x10, 0x55555bbc, 0x5555555555555556, 0x666, x6, 640, x7)
+
+inst_615:
+// rs1_val==6148914691236517206 and imm_val==-45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x55555529, 0x5555555555555556, -0x2d, x6, 648, x7)
+
+inst_616:
+// rs1_val==6148914691236517206 and imm_val==45,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2d
+TEST_IMM_OP( addiw, x11, x10, 0x55555583, 0x5555555555555556, 0x2d, x6, 656, x7)
+
+inst_617:
+// rs1_val==6148914691236517206 and imm_val==2,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x55555558, 0x5555555555555556, 0x2, x6, 664, x7)
+
+inst_618:
+// rs1_val==6148914691236517206 and imm_val==1364,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x554
+TEST_IMM_OP( addiw, x11, x10, 0x55555aaa, 0x5555555555555556, 0x554, x6, 672, x7)
+
+inst_619:
+// rs1_val==6148914691236517206 and imm_val==0,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x0
+TEST_IMM_OP( addiw, x11, x10, 0x55555556, 0x5555555555555556, 0x0, x6, 680, x7)
+
+inst_620:
+// rs1_val==6148914691236517206 and imm_val==4,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x4
+TEST_IMM_OP( addiw, x11, x10, 0x5555555a, 0x5555555555555556, 0x4, x6, 688, x7)
+
+inst_621:
+// rs1_val==6148914691236517206 and imm_val==818,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x332
+TEST_IMM_OP( addiw, x11, x10, 0x55555888, 0x5555555555555556, 0x332, x6, 696, x7)
+
+inst_622:
+// rs1_val==6148914691236517206 and imm_val==1637,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x665
+TEST_IMM_OP( addiw, x11, x10, 0x55555bbb, 0x5555555555555556, 0x665, x6, 704, x7)
+
+inst_623:
+// rs1_val == 1,
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x1; immval:0x6
+TEST_IMM_OP( addiw, x11, x10, 0x7, 0x1, 0x6, x6, 712, x7)
+
+inst_624:
+// imm_val == 2, rs1_val == 4294967296
+// opcode: addiw ; op1:x10; dest:x11; op1val:0x100000000; immval:0x2
+TEST_IMM_OP( addiw, x11, x10, 0x2, 0x100000000, 0x2, x6, 720, x7)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x15_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x15_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x6_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x6_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x6_2:
+ .fill 91*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/addw-01.S b/riscof/suite/rv64i_m/I/addw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..6dd56e1cd506c24b6776145f7ccc5c5ddaf3e743
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/addw-01.S
@@ -0,0 +1,3474 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the addw instruction of the RISC-V I extension for the addw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*);def TEST_CASE_1=True;",addw)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x21, rs2==x21, rd==x3, rs1_val > 0 and rs2_val > 0, rs2_val == 8796093022208, rs1_val != rs2_val, rs1_val == 8589934592
+// opcode: addw ; op1:x21; op2:x21; dest:x3; op1val:0x200000000; op2val:0x200000000
+TEST_RR_OP(addw, x3, x21, x21, 0x0, 0x200000000, 0x200000000, x1, 0, x6)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x5, rs2==x16, rd==x16, rs1_val > 0 and rs2_val < 0, rs1_val == 32, rs2_val == -65537
+// opcode: addw ; op1:x5; op2:x16; dest:x16; op1val:0x20; op2val:-0x10001
+TEST_RR_OP(addw, x16, x5, x16, -0xffe1, 0x20, -0x10001, x1, 8, x6)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x7, rs2==x7, rd==x7, rs1_val < 0 and rs2_val < 0, rs1_val == -549755813889
+// opcode: addw ; op1:x7; op2:x7; dest:x7; op1val:-0x8000000001; op2val:-0x8000000001
+TEST_RR_OP(addw, x7, x7, x7, -0x2, -0x8000000001, -0x8000000001, x1, 16, x6)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x29, rs2==x11, rd==x4, rs1_val < 0 and rs2_val > 0, rs1_val == -16385, rs2_val == 1125899906842624
+// opcode: addw ; op1:x29; op2:x11; dest:x4; op1val:-0x4001; op2val:0x4000000000000
+TEST_RR_OP(addw, x4, x29, x11, -0x4001, -0x4001, 0x4000000000000, x1, 24, x6)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x23, rs2==x8, rd==x23, rs1_val == rs2_val, rs2_val == -140737488355329, rs1_val == -140737488355329
+// opcode: addw ; op1:x23; op2:x8; dest:x23; op1val:-0x800000000001; op2val:-0x800000000001
+TEST_RR_OP(addw, x23, x23, x8, -0x2, -0x800000000001, -0x800000000001, x1, 32, x6)
+
+inst_5:
+// rs1==x26, rs2==x28, rd==x13, rs2_val == (-2**(xlen-1)), rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, rs2_val == -9223372036854775808
+// opcode: addw ; op1:x26; op2:x28; dest:x13; op1val:0x7fffffffffffffff; op2val:-0x8000000000000000
+TEST_RR_OP(addw, x13, x26, x28, -0x1, 0x7fffffffffffffff, -0x8000000000000000, x1, 40, x6)
+
+inst_6:
+// rs1==x9, rs2==x30, rd==x19, rs2_val == 0,
+// opcode: addw ; op1:x9; op2:x30; dest:x19; op1val:0x200000000; op2val:0x0
+TEST_RR_OP(addw, x19, x9, x30, 0x0, 0x200000000, 0x0, x1, 48, x6)
+
+inst_7:
+// rs1==x8, rs2==x18, rd==x27, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807
+// opcode: addw ; op1:x8; op2:x18; dest:x27; op1val:0x3333333333333332; op2val:0x7fffffffffffffff
+TEST_RR_OP(addw, x27, x8, x18, 0x33333331, 0x3333333333333332, 0x7fffffffffffffff, x1, 56, x6)
+
+inst_8:
+// rs1==x18, rs2==x22, rd==x8, rs2_val == 1, rs1_val == -268435457
+// opcode: addw ; op1:x18; op2:x22; dest:x8; op1val:-0x10000001; op2val:0x1
+TEST_RR_OP(addw, x8, x18, x22, -0x10000000, -0x10000001, 0x1, x1, 64, x6)
+
+inst_9:
+// rs1==x13, rs2==x20, rd==x0, rs1_val == (-2**(xlen-1)), rs2_val == 8192, rs1_val == -9223372036854775808
+// opcode: addw ; op1:x13; op2:x20; dest:x0; op1val:-0x8000000000000000; op2val:0x2000
+TEST_RR_OP(addw, x0, x13, x20, 0, -0x8000000000000000, 0x2000, x1, 72, x6)
+
+inst_10:
+// rs1==x30, rs2==x24, rd==x28, rs1_val == 0, rs2_val == 33554432
+// opcode: addw ; op1:x30; op2:x24; dest:x28; op1val:0x0; op2val:0x2000000
+TEST_RR_OP(addw, x28, x30, x24, 0x2000000, 0x0, 0x2000000, x1, 80, x6)
+
+inst_11:
+// rs1==x17, rs2==x0, rd==x22, rs1_val == 1, rs2_val == -4194305
+// opcode: addw ; op1:x17; op2:x0; dest:x22; op1val:0x1; op2val:0x0
+TEST_RR_OP(addw, x22, x17, x0, 0x1, 0x1, 0x0, x1, 88, x6)
+
+inst_12:
+// rs1==x0, rs2==x4, rd==x2, rs2_val == 2, rs1_val == 2305843009213693952
+// opcode: addw ; op1:x0; op2:x4; dest:x2; op1val:0x0; op2val:0x2
+TEST_RR_OP(addw, x2, x0, x4, 0x2, 0x0, 0x2, x1, 96, x6)
+
+inst_13:
+// rs1==x28, rs2==x14, rd==x21, rs2_val == 4, rs1_val == 134217728
+// opcode: addw ; op1:x28; op2:x14; dest:x21; op1val:0x8000000; op2val:0x4
+TEST_RR_OP(addw, x21, x28, x14, 0x8000004, 0x8000000, 0x4, x1, 104, x6)
+
+inst_14:
+// rs1==x4, rs2==x31, rd==x10, rs2_val == 8, rs1_val == 576460752303423488
+// opcode: addw ; op1:x4; op2:x31; dest:x10; op1val:0x800000000000000; op2val:0x8
+TEST_RR_OP(addw, x10, x4, x31, 0x8, 0x800000000000000, 0x8, x1, 112, x6)
+
+inst_15:
+// rs1==x20, rs2==x25, rd==x31, rs2_val == 16,
+// opcode: addw ; op1:x20; op2:x25; dest:x31; op1val:-0xb504f333; op2val:0x10
+TEST_RR_OP(addw, x31, x20, x25, 0x4afb0cdd, -0xb504f333, 0x10, x1, 120, x6)
+
+inst_16:
+// rs1==x19, rs2==x3, rd==x25, rs2_val == 32, rs1_val == -2049
+// opcode: addw ; op1:x19; op2:x3; dest:x25; op1val:-0x801; op2val:0x20
+TEST_RR_OP(addw, x25, x19, x3, -0x7e1, -0x801, 0x20, x1, 128, x8)
+
+inst_17:
+// rs1==x10, rs2==x17, rd==x24, rs2_val == 64, rs1_val == -4097
+// opcode: addw ; op1:x10; op2:x17; dest:x24; op1val:-0x1001; op2val:0x40
+TEST_RR_OP(addw, x24, x10, x17, -0xfc1, -0x1001, 0x40, x1, 136, x8)
+
+inst_18:
+// rs1==x15, rs2==x13, rd==x14, rs2_val == 128, rs1_val == 274877906944
+// opcode: addw ; op1:x15; op2:x13; dest:x14; op1val:0x4000000000; op2val:0x80
+TEST_RR_OP(addw, x14, x15, x13, 0x80, 0x4000000000, 0x80, x1, 144, x8)
+RVTEST_SIGBASE( x7,signature_x7_0)
+
+inst_19:
+// rs1==x3, rs2==x1, rd==x26, rs2_val == 256,
+// opcode: addw ; op1:x3; op2:x1; dest:x26; op1val:-0xa; op2val:0x100
+TEST_RR_OP(addw, x26, x3, x1, 0xf6, -0xa, 0x100, x7, 0, x8)
+
+inst_20:
+// rs1==x1, rs2==x2, rd==x29, rs2_val == 512, rs1_val == 17179869184
+// opcode: addw ; op1:x1; op2:x2; dest:x29; op1val:0x400000000; op2val:0x200
+TEST_RR_OP(addw, x29, x1, x2, 0x200, 0x400000000, 0x200, x7, 8, x8)
+
+inst_21:
+// rs1==x14, rs2==x5, rd==x18, rs2_val == 1024,
+// opcode: addw ; op1:x14; op2:x5; dest:x18; op1val:0x5; op2val:0x400
+TEST_RR_OP(addw, x18, x14, x5, 0x405, 0x5, 0x400, x7, 16, x8)
+
+inst_22:
+// rs1==x27, rs2==x26, rd==x20, rs2_val == 2048, rs1_val == 2048
+// opcode: addw ; op1:x27; op2:x26; dest:x20; op1val:0x800; op2val:0x800
+TEST_RR_OP(addw, x20, x27, x26, 0x1000, 0x800, 0x800, x7, 24, x8)
+
+inst_23:
+// rs1==x24, rs2==x29, rd==x12, rs2_val == 4096, rs1_val == -70368744177665
+// opcode: addw ; op1:x24; op2:x29; dest:x12; op1val:-0x400000000001; op2val:0x1000
+TEST_RR_OP(addw, x12, x24, x29, 0xfff, -0x400000000001, 0x1000, x7, 32, x8)
+
+inst_24:
+// rs1==x12, rs2==x6, rd==x1, rs2_val == 16384, rs1_val == -513
+// opcode: addw ; op1:x12; op2:x6; dest:x1; op1val:-0x201; op2val:0x4000
+TEST_RR_OP(addw, x1, x12, x6, 0x3dff, -0x201, 0x4000, x7, 40, x8)
+
+inst_25:
+// rs1==x22, rs2==x9, rd==x5, rs2_val == 32768,
+// opcode: addw ; op1:x22; op2:x9; dest:x5; op1val:-0x6; op2val:0x8000
+TEST_RR_OP(addw, x5, x22, x9, 0x7ffa, -0x6, 0x8000, x7, 48, x8)
+
+inst_26:
+// rs1==x11, rs2==x19, rd==x9, rs2_val == 65536,
+// opcode: addw ; op1:x11; op2:x19; dest:x9; op1val:0x3333333333333332; op2val:0x10000
+TEST_RR_OP(addw, x9, x11, x19, 0x33343332, 0x3333333333333332, 0x10000, x7, 56, x8)
+
+inst_27:
+// rs1==x31, rs2==x27, rd==x17, rs2_val == 131072,
+// opcode: addw ; op1:x31; op2:x27; dest:x17; op1val:0x6666666666666667; op2val:0x20000
+TEST_RR_OP(addw, x17, x31, x27, 0x66686667, 0x6666666666666667, 0x20000, x7, 64, x8)
+
+inst_28:
+// rs1==x2, rs2==x12, rd==x11, rs2_val == 262144, rs1_val == -2199023255553
+// opcode: addw ; op1:x2; op2:x12; dest:x11; op1val:-0x20000000001; op2val:0x40000
+TEST_RR_OP(addw, x11, x2, x12, 0x3ffff, -0x20000000001, 0x40000, x7, 72, x8)
+
+inst_29:
+// rs1==x16, rs2==x23, rd==x30, rs2_val == 524288, rs1_val == -32769
+// opcode: addw ; op1:x16; op2:x23; dest:x30; op1val:-0x8001; op2val:0x80000
+TEST_RR_OP(addw, x30, x16, x23, 0x77fff, -0x8001, 0x80000, x7, 80, x8)
+
+inst_30:
+// rs1==x25, rs2==x10, rd==x6, rs2_val == 1048576,
+// opcode: addw ; op1:x25; op2:x10; dest:x6; op1val:0x1; op2val:0x100000
+TEST_RR_OP(addw, x6, x25, x10, 0x100001, 0x1, 0x100000, x7, 88, x8)
+
+inst_31:
+// rs1==x6, rs2_val == 2097152, rs1_val == -17
+// opcode: addw ; op1:x6; op2:x4; dest:x11; op1val:-0x11; op2val:0x200000
+TEST_RR_OP(addw, x11, x6, x4, 0x1fffef, -0x11, 0x200000, x7, 96, x8)
+
+inst_32:
+// rs2==x15, rs2_val == 4194304, rs1_val == -9
+// opcode: addw ; op1:x23; op2:x15; dest:x14; op1val:-0x9; op2val:0x400000
+TEST_RR_OP(addw, x14, x23, x15, 0x3ffff7, -0x9, 0x400000, x7, 104, x1)
+
+inst_33:
+// rd==x15, rs2_val == 8388608, rs1_val == -576460752303423489
+// opcode: addw ; op1:x9; op2:x19; dest:x15; op1val:-0x800000000000001; op2val:0x800000
+TEST_RR_OP(addw, x15, x9, x19, 0x7fffff, -0x800000000000001, 0x800000, x7, 112, x1)
+
+inst_34:
+// rs2_val == 16777216,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x1000000
+TEST_RR_OP(addw, x12, x10, x11, 0x67666666, 0x6666666666666666, 0x1000000, x7, 120, x1)
+
+inst_35:
+// rs2_val == 67108864, rs1_val == 8388608
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x4000000
+TEST_RR_OP(addw, x12, x10, x11, 0x4800000, 0x800000, 0x4000000, x7, 128, x1)
+
+inst_36:
+// rs2_val == 134217728,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x8; op2val:0x8000000
+TEST_RR_OP(addw, x12, x10, x11, 0x7fffff8, -0x8, 0x8000000, x7, 136, x1)
+
+inst_37:
+// rs2_val == 268435456,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x10000000
+TEST_RR_OP(addw, x12, x10, x11, 0xfff7fff, -0x8001, 0x10000000, x7, 144, x1)
+
+inst_38:
+// rs2_val == 536870912, rs1_val == 2147483648
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0x20000000
+TEST_RR_OP(addw, x12, x10, x11, -0x60000000, 0x80000000, 0x20000000, x7, 152, x1)
+
+inst_39:
+// rs2_val == 1073741824, rs1_val == -1152921504606846977
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:0x40000000
+TEST_RR_OP(addw, x12, x10, x11, 0x3fffffff, -0x1000000000000001, 0x40000000, x7, 160, x1)
+
+inst_40:
+// rs2_val == 2147483648, rs1_val == 524288
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0x80000000
+TEST_RR_OP(addw, x12, x10, x11, -0x7ff80000, 0x80000, 0x80000000, x7, 168, x1)
+
+inst_41:
+// rs2_val == 4294967296, rs1_val == -257
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x100000000
+TEST_RR_OP(addw, x12, x10, x11, -0x101, -0x101, 0x100000000, x7, 176, x1)
+
+inst_42:
+// rs2_val == 8589934592,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0x200000000
+TEST_RR_OP(addw, x12, x10, x11, -0x80000000, 0x80000000, 0x200000000, x7, 184, x1)
+
+inst_43:
+// rs2_val == 17179869184,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x7; op2val:0x400000000
+TEST_RR_OP(addw, x12, x10, x11, -0x7, -0x7, 0x400000000, x7, 192, x1)
+
+inst_44:
+// rs2_val == 34359738368,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x800000000
+TEST_RR_OP(addw, x12, x10, x11, -0x8001, -0x8001, 0x800000000, x7, 200, x1)
+
+inst_45:
+// rs2_val == 68719476736, rs1_val == 288230376151711744
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:0x1000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x0, 0x400000000000000, 0x1000000000, x7, 208, x1)
+
+inst_46:
+// rs2_val == 137438953472, rs1_val == 4
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x4, 0x4, 0x2000000000, x7, 216, x1)
+
+inst_47:
+// rs2_val == 274877906944, rs1_val == 131072
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0x4000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x20000, 0x20000, 0x4000000000, x7, 224, x1)
+
+inst_48:
+// rs2_val == 549755813888, rs1_val == 281474976710656
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0x8000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x0, 0x1000000000000, 0x8000000000, x7, 232, x1)
+
+inst_49:
+// rs2_val == 1099511627776, rs1_val == 33554432
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x10000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x2000000, 0x2000000, 0x10000000000, x7, 240, x1)
+
+inst_50:
+// rs2_val == 2199023255552, rs1_val == 9007199254740992
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:0x20000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x0, 0x20000000000000, 0x20000000000, x7, 248, x1)
+
+inst_51:
+// rs2_val == 4398046511104,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:0x40000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x1, -0x20000000001, 0x40000000000, x7, 256, x1)
+
+inst_52:
+// rs2_val == 17592186044416, rs1_val == -2
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x100000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x2, -0x2, 0x100000000000, x7, 264, x1)
+
+inst_53:
+// rs2_val == 35184372088832,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x200000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x8001, -0x8001, 0x200000000000, x7, 272, x1)
+
+inst_54:
+// rs2_val == 70368744177664,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:0x400000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x20, 0x20, 0x400000000000, x7, 280, x1)
+
+inst_55:
+// rs2_val == 140737488355328, rs1_val == 2097152
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0x800000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x200000, 0x200000, 0x800000000000, x7, 288, x1)
+
+inst_56:
+// rs2_val == 281474976710656,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x1000000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x4, 0x4, 0x1000000000000, x7, 296, x1)
+
+inst_57:
+// rs2_val == 562949953421312, rs1_val == -8589934593
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:0x2000000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x1, -0x200000001, 0x2000000000000, x7, 304, x1)
+
+inst_58:
+// rs2_val == 2251799813685248, rs1_val == 268435456
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x8000000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x10000000, 0x10000000, 0x8000000000000, x7, 312, x1)
+
+inst_59:
+// rs2_val == 4503599627370496,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0x10000000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x200000, 0x200000, 0x10000000000000, x7, 320, x1)
+
+inst_60:
+// rs2_val == 9007199254740992, rs1_val == -67108865
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x20000000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x4000001, -0x4000001, 0x20000000000000, x7, 328, x1)
+
+inst_61:
+// rs2_val == 18014398509481984, rs1_val == -262145
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0x40000000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x40001, -0x40001, 0x40000000000000, x7, 336, x1)
+
+inst_62:
+// rs2_val == 36028797018963968, rs1_val == -129
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x80000000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x81, -0x81, 0x80000000000000, x7, 344, x1)
+
+inst_63:
+// rs2_val == 72057594037927936, rs1_val == 562949953421312
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:0x100000000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x0, 0x2000000000000, 0x100000000000000, x7, 352, x1)
+
+inst_64:
+// rs2_val == 144115188075855872, rs1_val == 18014398509481984
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:0x200000000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x0, 0x40000000000000, 0x200000000000000, x7, 360, x1)
+
+inst_65:
+// rs2_val == 288230376151711744, rs1_val == -524289
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x400000000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x80001, -0x80001, 0x400000000000000, x7, 368, x1)
+
+inst_66:
+// rs2_val == 576460752303423488, rs1_val == 67108864
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x800000000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x4000000, 0x4000000, 0x800000000000000, x7, 376, x1)
+
+inst_67:
+// rs2_val == 1152921504606846976,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x1000000000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x201, -0x201, 0x1000000000000000, x7, 384, x1)
+
+inst_68:
+// rs2_val == 2305843009213693952,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0x2000000000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x200000, 0x200000, 0x2000000000000000, x7, 392, x1)
+
+inst_69:
+// rs2_val == 4611686018427387904, rs1_val == -8388609
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x4000000000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x800001, -0x800001, 0x4000000000000000, x7, 400, x1)
+
+inst_70:
+// rs2_val == -2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:-0x2
+TEST_RR_OP(addw, x12, x10, x11, -0x2, 0x800000000000000, -0x2, x7, 408, x1)
+
+inst_71:
+// rs2_val == -3, rs1_val == 4398046511104
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:-0x3
+TEST_RR_OP(addw, x12, x10, x11, -0x3, 0x40000000000, -0x3, x7, 416, x1)
+
+inst_72:
+// rs2_val == -5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5
+TEST_RR_OP(addw, x12, x10, x11, -0x5, 0x0, -0x5, x7, 424, x1)
+
+inst_73:
+// rs2_val == -9, rs1_val == -8796093022209
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:-0x9
+TEST_RR_OP(addw, x12, x10, x11, -0xa, -0x80000000001, -0x9, x7, 432, x1)
+
+inst_74:
+// rs2_val == -17,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:-0x11
+TEST_RR_OP(addw, x12, x10, x11, -0x92, -0x81, -0x11, x7, 440, x1)
+
+inst_75:
+// rs2_val == -33,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:-0x21
+TEST_RR_OP(addw, x12, x10, x11, 0x7fffffdf, 0x80000000, -0x21, x7, 448, x1)
+
+inst_76:
+// rs2_val == -65,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x41
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0c8d, -0xb504f332, -0x41, x7, 456, x1)
+
+inst_77:
+// rs2_val == -129,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0x81
+TEST_RR_OP(addw, x12, x10, x11, -0x83, -0x2, -0x81, x7, 464, x1)
+
+inst_78:
+// rs2_val == -257,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0x101
+TEST_RR_OP(addw, x12, x10, x11, -0x103, -0x2, -0x101, x7, 472, x1)
+
+inst_79:
+// rs2_val == -513,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:-0x201
+TEST_RR_OP(addw, x12, x10, x11, 0x7fdff, 0x80000, -0x201, x7, 480, x1)
+
+inst_80:
+// rs2_val == -1025, rs1_val == -137438953473
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:-0x401
+TEST_RR_OP(addw, x12, x10, x11, -0x402, -0x2000000001, -0x401, x7, 488, x1)
+
+inst_81:
+// rs2_val == -2049,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x801
+TEST_RR_OP(addw, x12, x10, x11, -0x7fb, 0x6, -0x801, x7, 496, x1)
+
+inst_82:
+// rs2_val == -4097,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x1001
+TEST_RR_OP(addw, x12, x10, x11, -0xffd, 0x4, -0x1001, x7, 504, x1)
+
+inst_83:
+// rs2_val == -8193,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:-0x2001
+TEST_RR_OP(addw, x12, x10, x11, -0x2001, 0x20000000000000, -0x2001, x7, 512, x1)
+
+inst_84:
+// rs2_val == -16385, rs1_val == 16777216
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:-0x4001
+TEST_RR_OP(addw, x12, x10, x11, 0xffbfff, 0x1000000, -0x4001, x7, 520, x1)
+
+inst_85:
+// rs2_val == -32769, rs1_val == 2199023255552
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:-0x8001
+TEST_RR_OP(addw, x12, x10, x11, -0x8001, 0x20000000000, -0x8001, x7, 528, x1)
+
+inst_86:
+// rs2_val == -131073,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:-0x20001
+TEST_RR_OP(addw, x12, x10, x11, -0x20002, -0x200000001, -0x20001, x7, 536, x1)
+
+inst_87:
+// rs2_val == -262145,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x8; op2val:-0x40001
+TEST_RR_OP(addw, x12, x10, x11, -0x40009, -0x8, -0x40001, x7, 544, x1)
+
+inst_88:
+// rs2_val == -524289,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x6; op2val:-0x80001
+TEST_RR_OP(addw, x12, x10, x11, -0x80007, -0x6, -0x80001, x7, 552, x1)
+
+inst_89:
+// rs2_val == -1048577,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x100001
+TEST_RR_OP(addw, x12, x10, x11, -0xff801, 0x800, -0x100001, x7, 560, x1)
+
+inst_90:
+// rs2_val == -2097153, rs1_val == -2097153
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:-0x200001
+TEST_RR_OP(addw, x12, x10, x11, -0x400002, -0x200001, -0x200001, x7, 568, x1)
+
+inst_91:
+// rs2_val == -8388609, rs1_val == 256
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x800001
+TEST_RR_OP(addw, x12, x10, x11, -0x7fff01, 0x100, -0x800001, x7, 576, x1)
+
+inst_92:
+// rs2_val == -16777217, rs1_val == 512
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:-0x1000001
+TEST_RR_OP(addw, x12, x10, x11, -0xfffe01, 0x200, -0x1000001, x7, 584, x1)
+
+inst_93:
+// rs2_val == -33554433, rs1_val == 8192
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:-0x2000001
+TEST_RR_OP(addw, x12, x10, x11, -0x1ffe001, 0x2000, -0x2000001, x7, 592, x1)
+
+inst_94:
+// rs2_val == -67108865, rs1_val == -9007199254740993
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:-0x4000001
+TEST_RR_OP(addw, x12, x10, x11, -0x4000002, -0x20000000000001, -0x4000001, x7, 600, x1)
+
+inst_95:
+// rs2_val == -134217729, rs1_val == -17179869185
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:-0x8000001
+TEST_RR_OP(addw, x12, x10, x11, -0x8000002, -0x400000001, -0x8000001, x7, 608, x1)
+
+inst_96:
+// rs2_val == -268435457, rs1_val == 1099511627776
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:-0x10000001
+TEST_RR_OP(addw, x12, x10, x11, -0x10000001, 0x10000000000, -0x10000001, x7, 616, x1)
+
+inst_97:
+// rs2_val == -536870913,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:-0x20000001
+TEST_RR_OP(addw, x12, x10, x11, -0x20000001, 0x20000000000000, -0x20000001, x7, 624, x1)
+
+inst_98:
+// rs2_val == -1073741825,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:-0x40000001
+TEST_RR_OP(addw, x12, x10, x11, -0x40000000, 0x1, -0x40000001, x7, 632, x1)
+
+inst_99:
+// rs2_val == -2147483649,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x80000001
+TEST_RR_OP(addw, x12, x10, x11, 0x7fffffff, 0x0, -0x80000001, x7, 640, x1)
+
+inst_100:
+// rs2_val == -4294967297, rs1_val == -4194305
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:-0x100000001
+TEST_RR_OP(addw, x12, x10, x11, -0x400002, -0x400001, -0x100000001, x7, 648, x1)
+
+inst_101:
+// rs2_val == -8589934593, rs1_val == 2
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x200000001
+TEST_RR_OP(addw, x12, x10, x11, 0x1, 0x2, -0x200000001, x7, 656, x1)
+
+inst_102:
+// rs2_val == -17179869185,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x400000001
+TEST_RR_OP(addw, x12, x10, x11, 0x2, 0x3, -0x400000001, x7, 664, x1)
+
+inst_103:
+// rs2_val == -34359738369,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x800000001
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cce, 0xb504f333, -0x800000001, x7, 672, x1)
+
+inst_104:
+// rs2_val == -68719476737, rs1_val == -8193
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:-0x1000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x2002, -0x2001, -0x1000000001, x7, 680, x1)
+
+inst_105:
+// rs2_val == -137438953473,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:-0x2000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x2, -0x2000000001, -0x2000000001, x7, 688, x1)
+
+inst_106:
+// rs2_val == -274877906945, rs1_val == -134217729
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x4000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x8000002, -0x8000001, -0x4000000001, x7, 696, x1)
+
+inst_107:
+// rs2_val == -549755813889, rs1_val == -1073741825
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:-0x8000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x40000002, -0x40000001, -0x8000000001, x7, 704, x1)
+
+inst_108:
+// rs2_val == -1099511627777, rs1_val == -6148914691236517206
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x10000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x55555557, -0x5555555555555556, -0x10000000001, x7, 712, x1)
+
+inst_109:
+// rs2_val == -2199023255553, rs1_val == 1048576
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:-0x20000000001
+TEST_RR_OP(addw, x12, x10, x11, 0xfffff, 0x100000, -0x20000000001, x7, 720, x1)
+
+inst_110:
+// rs2_val == -4398046511105, rs1_val == 4194304
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:-0x40000000001
+TEST_RR_OP(addw, x12, x10, x11, 0x3fffff, 0x400000, -0x40000000001, x7, 728, x1)
+
+inst_111:
+// rs2_val == -8796093022209, rs1_val == 4611686018427387904
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:-0x80000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x1, 0x4000000000000000, -0x80000000001, x7, 736, x1)
+
+inst_112:
+// rs2_val == -17592186044417,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:-0x100000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x1, 0x2000000000000000, -0x100000000001, x7, 744, x1)
+
+inst_113:
+// rs2_val == -35184372088833,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x200000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x1, 0x0, -0x200000000001, x7, 752, x1)
+
+inst_114:
+// rs2_val == -70368744177665,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x400000000001
+TEST_RR_OP(addw, x12, x10, x11, 0x5, 0x6, -0x400000000001, x7, 760, x1)
+
+inst_115:
+// rs2_val == -281474976710657, rs1_val == 68719476736
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:-0x1000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x1, 0x1000000000, -0x1000000000001, x7, 768, x1)
+
+inst_116:
+// rs2_val == -562949953421313,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:-0x2000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x1, 0x1000000000000, -0x2000000000001, x7, 776, x1)
+
+inst_117:
+// rs2_val == -1125899906842625,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x4000000000001
+TEST_RR_OP(addw, x12, x10, x11, 0x55555555, 0x5555555555555556, -0x4000000000001, x7, 784, x1)
+
+inst_118:
+// rs2_val == -2251799813685249,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:-0x8000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x2, -0x400000000001, -0x8000000000001, x7, 792, x1)
+
+inst_119:
+// rs2_val == -4503599627370497,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x10000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x1, 0x0, -0x10000000000001, x7, 800, x1)
+
+inst_120:
+// rs2_val == -9007199254740993,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x20000000000001
+TEST_RR_OP(addw, x12, x10, x11, 0x1f, 0x20, -0x20000000000001, x7, 808, x1)
+
+inst_121:
+// rs2_val == -18014398509481985,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x40000000000001
+TEST_RR_OP(addw, x12, x10, x11, 0x66666664, 0x6666666666666665, -0x40000000000001, x7, 816, x1)
+
+inst_122:
+// rs2_val == -36028797018963969, rs1_val == -5
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:-0x80000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x6, -0x5, -0x80000000000001, x7, 824, x1)
+
+inst_123:
+// rs2_val == -72057594037927937,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x100000000000001
+TEST_RR_OP(addw, x12, x10, x11, 0x55555553, 0x5555555555555554, -0x100000000000001, x7, 832, x1)
+
+inst_124:
+// rs2_val == -144115188075855873,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0x200000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x3, -0x2, -0x200000000000001, x7, 840, x1)
+
+inst_125:
+// rs2_val == -288230376151711745,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:-0x400000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x1, 0x1000000000, -0x400000000000001, x7, 848, x1)
+
+inst_126:
+// rs2_val == -576460752303423489, rs1_val == -33
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x800000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x22, -0x21, -0x800000000000001, x7, 856, x1)
+
+inst_127:
+// rs2_val == -1152921504606846977,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:-0x1000000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0xa, -0x9, -0x1000000000000001, x7, 864, x1)
+
+inst_128:
+// rs2_val == -2305843009213693953,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:-0x2000000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x1, 0x400000000, -0x2000000000000001, x7, 872, x1)
+
+inst_129:
+// rs2_val == -4611686018427387905,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x4000000000000001
+TEST_RR_OP(addw, x12, x10, x11, 0x1ffff, 0x20000, -0x4000000000000001, x7, 880, x1)
+
+inst_130:
+// rs2_val == 6148914691236517205, rs1_val == 34359738368
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x55555555, 0x800000000, 0x5555555555555555, x7, 888, x1)
+
+inst_131:
+// rs2_val == -6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x55554d56, 0x800, -0x5555555555555556, x7, 896, x1)
+
+inst_132:
+// rs1_val == 8,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0x7fffffffffffffff
+TEST_RR_OP(addw, x12, x10, x11, 0x7, 0x8, 0x7fffffffffffffff, x7, 904, x1)
+
+inst_133:
+// rs1_val == 16,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x12, 0x10, 0x2, x7, 912, x1)
+
+inst_134:
+// rs1_val == 64,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x55555596, 0x40, 0x5555555555555556, x7, 920, x1)
+
+inst_135:
+// rs1_val == 128,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0x400
+TEST_RR_OP(addw, x12, x10, x11, 0x480, 0x80, 0x400, x7, 928, x1)
+
+inst_136:
+// rs1_val == 1024,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:-0x200000000000001
+TEST_RR_OP(addw, x12, x10, x11, 0x3ff, 0x400, -0x200000000000001, x7, 936, x1)
+
+inst_137:
+// rs1_val == 4096,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x800000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x1000, 0x1000, 0x800000000000, x7, 944, x1)
+
+inst_138:
+// rs1_val == 16384,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:-0x10000001
+TEST_RR_OP(addw, x12, x10, x11, -0xfffc001, 0x4000, -0x10000001, x7, 952, x1)
+
+inst_139:
+// rs1_val == 32768,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:0x1
+TEST_RR_OP(addw, x12, x10, x11, 0x8001, 0x8000, 0x1, x7, 960, x1)
+
+inst_140:
+// rs1_val == 65536,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x10003, 0x10000, 0x3, x7, 968, x1)
+
+inst_141:
+// rs1_val == 262144,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0x200000000
+TEST_RR_OP(addw, x12, x10, x11, 0x40000, 0x40000, 0x200000000, x7, 976, x1)
+
+inst_142:
+// rs1_val == 536870912,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:-0x100000000000001
+TEST_RR_OP(addw, x12, x10, x11, 0x1fffffff, 0x20000000, -0x100000000000001, x7, 984, x1)
+
+inst_143:
+// rs1_val == 1073741824,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:-0x40000000001
+TEST_RR_OP(addw, x12, x10, x11, 0x3fffffff, 0x40000000, -0x40000000001, x7, 992, x1)
+
+inst_144:
+// rs1_val == 4294967296,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, 0x55555554, 0x100000000, 0x5555555555555554, x7, 1000, x1)
+
+inst_145:
+// rs1_val == 137438953472,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x2, 0x2000000000, 0x2, x7, 1008, x1)
+
+inst_146:
+// rs1_val == 549755813888,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0x1000000000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x0, 0x8000000000, 0x1000000000000000, x7, 1016, x1)
+
+inst_147:
+// rs1_val == 8796093022208,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:0x10000000
+TEST_RR_OP(addw, x12, x10, x11, 0x10000000, 0x80000000000, 0x10000000, x7, 1024, x1)
+
+inst_148:
+// rs1_val == 17592186044416,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, 0x33333332, 0x100000000000, 0x3333333333333332, x7, 1032, x1)
+
+inst_149:
+// rs1_val == 35184372088832,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x4, 0x200000000000, 0x4, x7, 1040, x1)
+
+inst_150:
+// rs1_val == 70368744177664,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:-0x201
+TEST_RR_OP(addw, x12, x10, x11, -0x201, 0x400000000000, -0x201, x7, 1048, x1)
+
+inst_151:
+// rs1_val == 140737488355328,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:-0x11
+TEST_RR_OP(addw, x12, x10, x11, -0x11, 0x800000000000, -0x11, x7, 1056, x1)
+
+inst_152:
+// rs1_val == 1125899906842624,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, 0x33333334, 0x4000000000000, 0x3333333333333334, x7, 1064, x1)
+
+inst_153:
+// rs1_val == 2251799813685248,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:-0x200000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x1, 0x8000000000000, -0x200000000000001, x7, 1072, x1)
+
+inst_154:
+// rs1_val == 4503599627370496,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:0x80
+TEST_RR_OP(addw, x12, x10, x11, 0x80, 0x10000000000000, 0x80, x7, 1080, x1)
+
+inst_155:
+// rs1_val == 36028797018963968,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:0x20000
+TEST_RR_OP(addw, x12, x10, x11, 0x20000, 0x80000000000000, 0x20000, x7, 1088, x1)
+
+inst_156:
+// rs1_val == 72057594037927936,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:0x9
+TEST_RR_OP(addw, x12, x10, x11, 0x9, 0x100000000000000, 0x9, x7, 1096, x1)
+
+inst_157:
+// rs1_val == 144115188075855872,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:0x400000000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x0, 0x200000000000000, 0x400000000000000, x7, 1104, x1)
+
+inst_158:
+// rs1_val == 1152921504606846976,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, 0x33333334, 0x1000000000000000, 0x3333333333333334, x7, 1112, x1)
+
+inst_159:
+// rs1_val == -3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0x2000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x4, -0x3, -0x2000000000001, x7, 1120, x1)
+
+inst_160:
+// rs1_val == -65,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x80
+TEST_RR_OP(addw, x12, x10, x11, 0x3f, -0x41, 0x80, x7, 1128, x1)
+
+inst_161:
+// rs1_val == -1025,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, 0x55555153, -0x401, 0x5555555555555554, x7, 1136, x1)
+
+inst_162:
+// rs1_val == -65537,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x2000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x10002, -0x10001, -0x2000000001, x7, 1144, x1)
+
+inst_163:
+// rs1_val == -131073,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:-0x9
+TEST_RR_OP(addw, x12, x10, x11, -0x2000a, -0x20001, -0x9, x7, 1152, x1)
+
+inst_164:
+// rs1_val == -1048577,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:-0x1000001
+TEST_RR_OP(addw, x12, x10, x11, -0x1100002, -0x100001, -0x1000001, x7, 1160, x1)
+
+inst_165:
+// rs1_val == -16777217,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0x1000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x1000001, -0x1000001, 0x1000000000, x7, 1168, x1)
+
+inst_166:
+// rs1_val == -33554433,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, 0x31333331, -0x2000001, 0x3333333333333332, x7, 1176, x1)
+
+inst_167:
+// rs1_val == -536870913,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, -0x1fffffff, -0x20000001, 0x2, x7, 1184, x1)
+
+inst_168:
+// rs1_val == -2147483649,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:0x80000000
+TEST_RR_OP(addw, x12, x10, x11, -0x1, -0x80000001, 0x80000000, x7, 1192, x1)
+
+inst_169:
+// rs1_val == -4294967297,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:0x40000000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x1, -0x100000001, 0x40000000000000, x7, 1200, x1)
+
+inst_170:
+// rs1_val == -34359738369,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:0x800000000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x1, -0x800000001, 0x800000000000000, x7, 1208, x1)
+
+inst_171:
+// rs1_val == -68719476737,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:0x200000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x1, -0x1000000001, 0x200000000000, x7, 1216, x1)
+
+inst_172:
+// rs1_val == -274877906945,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0x40
+TEST_RR_OP(addw, x12, x10, x11, 0x3f, -0x4000000001, 0x40, x7, 1224, x1)
+
+inst_173:
+// rs1_val == -1099511627777,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:-0x4000000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x2, -0x10000000001, -0x4000000000000001, x7, 1232, x1)
+
+inst_174:
+// rs1_val == -4398046511105,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:0x1000
+TEST_RR_OP(addw, x12, x10, x11, 0xfff, -0x40000000001, 0x1000, x7, 1240, x1)
+
+inst_175:
+// rs1_val == -17592186044417,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:-0x20000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x2, -0x100000000001, -0x20000000000001, x7, 1248, x1)
+
+inst_176:
+// rs1_val == -35184372088833,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:0x8000000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x1, -0x200000000001, 0x8000000000000, x7, 1256, x1)
+
+inst_177:
+// rs1_val == -281474976710657,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x2, -0x1000000000001, 0x3, x7, 1264, x1)
+
+inst_178:
+// rs1_val == -562949953421313,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:0x40000000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x1, -0x2000000000001, 0x40000000000000, x7, 1272, x1)
+
+inst_179:
+// rs1_val == -1125899906842625,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:0x40000000000
+TEST_RR_OP(addw, x12, x10, x11, -0x1, -0x4000000000001, 0x40000000000, x7, 1280, x1)
+
+inst_180:
+// rs1_val == -2251799813685249,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:-0x40000000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x2, -0x8000000000001, -0x40000000000001, x7, 1288, x1)
+
+inst_181:
+// rs1_val == -4503599627370497,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:0x2000000
+TEST_RR_OP(addw, x12, x10, x11, 0x1ffffff, -0x10000000000001, 0x2000000, x7, 1296, x1)
+
+inst_182:
+// rs1_val == -18014398509481985,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:-0x4000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x2, -0x40000000000001, -0x4000000001, x7, 1304, x1)
+
+inst_183:
+// rs1_val == -36028797018963969,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:-0x9
+TEST_RR_OP(addw, x12, x10, x11, -0xa, -0x80000000000001, -0x9, x7, 1312, x1)
+
+inst_184:
+// rs1_val == -72057594037927937,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x55555557, -0x100000000000001, -0x5555555555555556, x7, 1320, x1)
+
+inst_185:
+// rs1_val == -144115188075855873,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:0x40000000
+TEST_RR_OP(addw, x12, x10, x11, 0x3fffffff, -0x200000000000001, 0x40000000, x7, 1328, x1)
+
+inst_186:
+// rs1_val == -288230376151711745,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000000001; op2val:-0x400000000001
+TEST_RR_OP(addw, x12, x10, x11, -0x2, -0x400000000000001, -0x400000000001, x7, 1336, x1)
+
+inst_187:
+// rs1_val == -2305843009213693953,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x3, -0x2000000000000001, 0x4, x7, 1344, x1)
+
+inst_188:
+// rs1_val == -4611686018427387905,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x5, -0x4000000000000001, 0x6, x7, 1352, x1)
+
+inst_189:
+// rs1_val == 6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x800000000001
+TEST_RR_OP(addw, x12, x10, x11, 0x55555554, 0x5555555555555555, -0x800000000001, x7, 1360, x1)
+
+inst_190:
+// rs1_val==3 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x6, 0x3, 0x3, x7, 1368, x1)
+
+inst_191:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x55555558, 0x3, 0x5555555555555555, x7, 1376, x1)
+
+inst_192:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x55555553, 0x3, -0x5555555555555556, x7, 1384, x1)
+
+inst_193:
+// rs1_val==3 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x8, 0x3, 0x5, x7, 1392, x1)
+
+inst_194:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, 0x33333336, 0x3, 0x3333333333333333, x7, 1400, x1)
+
+inst_195:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, 0x66666669, 0x3, 0x6666666666666666, x7, 1408, x1)
+
+inst_196:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd0, 0x3, -0xb504f333, x7, 1416, x1)
+
+inst_197:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cca, 0x3, 0xb504f333, x7, 1424, x1)
+
+inst_198:
+// rs1_val==3 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x5, 0x3, 0x2, x7, 1432, x1)
+
+inst_199:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, 0x55555557, 0x3, 0x5555555555555554, x7, 1440, x1)
+
+inst_200:
+// rs1_val==3 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x3, 0x3, 0x0, x7, 1448, x1)
+
+inst_201:
+// rs1_val==3 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x7, 0x3, 0x4, x7, 1456, x1)
+
+inst_202:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, 0x33333335, 0x3, 0x3333333333333332, x7, 1464, x1)
+
+inst_203:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, 0x66666668, 0x3, 0x6666666666666665, x7, 1472, x1)
+
+inst_204:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0ccb, 0x3, 0xb504f332, x7, 1480, x1)
+
+inst_205:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x55555559, 0x3, 0x5555555555555556, x7, 1488, x1)
+
+inst_206:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x55555552, 0x3, -0x5555555555555555, x7, 1496, x1)
+
+inst_207:
+// rs1_val==3 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x9, 0x3, 0x6, x7, 1504, x1)
+
+inst_208:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, 0x33333337, 0x3, 0x3333333333333334, x7, 1512, x1)
+
+inst_209:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666a, 0x3, 0x6666666666666667, x7, 1520, x1)
+
+inst_210:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd1, 0x3, -0xb504f332, x7, 1528, x1)
+
+inst_211:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc9, 0x3, 0xb504f334, x7, 1536, x1)
+
+inst_212:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x55555558, 0x5555555555555555, 0x3, x7, 1544, x1)
+
+inst_213:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x55555556, 0x5555555555555555, 0x5555555555555555, x7, 1552, x1)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x1, 0x5555555555555555, -0x5555555555555556, x7, 1560, x1)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x5555555a, 0x5555555555555555, 0x5, x7, 1568, x1)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, -0x77777778, 0x5555555555555555, 0x3333333333333333, x7, 1576, x1)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, -0x44444445, 0x5555555555555555, 0x6666666666666666, x7, 1584, x1)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x5faf9dde, 0x5555555555555555, -0xb504f333, x7, 1592, x1)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4888, 0x5555555555555555, 0xb504f333, x7, 1600, x1)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x55555557, 0x5555555555555555, 0x2, x7, 1608, x1)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, -0x55555557, 0x5555555555555555, 0x5555555555555554, x7, 1616, x1)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x55555555, 0x5555555555555555, 0x0, x7, 1624, x1)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x55555559, 0x5555555555555555, 0x4, x7, 1632, x1)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, -0x77777779, 0x5555555555555555, 0x3333333333333332, x7, 1640, x1)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, -0x44444446, 0x5555555555555555, 0x6666666666666665, x7, 1648, x1)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4887, 0x5555555555555555, 0xb504f332, x7, 1656, x1)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x55555555, 0x5555555555555555, 0x5555555555555556, x7, 1664, x1)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x0, 0x5555555555555555, -0x5555555555555555, x7, 1672, x1)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x5555555b, 0x5555555555555555, 0x6, x7, 1680, x1)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, -0x77777777, 0x5555555555555555, 0x3333333333333334, x7, 1688, x1)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, -0x44444444, 0x5555555555555555, 0x6666666666666667, x7, 1696, x1)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x5faf9ddd, 0x5555555555555555, -0xb504f332, x7, 1704, x1)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4889, 0x5555555555555555, 0xb504f334, x7, 1712, x1)
+
+inst_234:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, -0x55555553, -0x5555555555555556, 0x3, x7, 1720, x1)
+
+inst_235:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x1, -0x5555555555555556, 0x5555555555555555, x7, 1728, x1)
+
+inst_236:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x55555554, -0x5555555555555556, -0x5555555555555556, x7, 1736, x1)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, -0x55555551, -0x5555555555555556, 0x5, x7, 1744, x1)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, -0x22222223, -0x5555555555555556, 0x3333333333333333, x7, 1752, x1)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, 0x11111110, -0x5555555555555556, 0x6666666666666666, x7, 1760, x1)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0xa5a4889, -0x5555555555555556, -0xb504f333, x7, 1768, x1)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x5faf9ddd, -0x5555555555555556, 0xb504f333, x7, 1776, x1)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, -0x55555554, -0x5555555555555556, 0x2, x7, 1784, x1)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, -0x2, -0x5555555555555556, 0x5555555555555554, x7, 1792, x1)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, -0x55555556, -0x5555555555555556, 0x0, x7, 1800, x1)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, -0x55555552, -0x5555555555555556, 0x4, x7, 1808, x1)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, -0x22222224, -0x5555555555555556, 0x3333333333333332, x7, 1816, x1)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, 0x1111110f, -0x5555555555555556, 0x6666666666666665, x7, 1824, x1)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x5faf9ddc, -0x5555555555555556, 0xb504f332, x7, 1832, x1)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x0, -0x5555555555555556, 0x5555555555555556, x7, 1840, x1)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x55555555, -0x5555555555555556, -0x5555555555555555, x7, 1848, x1)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, -0x55555550, -0x5555555555555556, 0x6, x7, 1856, x1)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, -0x22222222, -0x5555555555555556, 0x3333333333333334, x7, 1864, x1)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, 0x11111111, -0x5555555555555556, 0x6666666666666667, x7, 1872, x1)
+
+inst_254:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0xa5a4888, -0x5555555555555556, -0xb504f332, x7, 1880, x1)
+
+inst_255:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, 0x5faf9dde, -0x5555555555555556, 0xb504f334, x7, 1888, x1)
+
+inst_256:
+// rs1_val==5 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x8, 0x5, 0x3, x7, 1896, x1)
+
+inst_257:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x5555555a, 0x5, 0x5555555555555555, x7, 1904, x1)
+
+inst_258:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x55555551, 0x5, -0x5555555555555556, x7, 1912, x1)
+
+inst_259:
+// rs1_val==5 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0xa, 0x5, 0x5, x7, 1920, x1)
+
+inst_260:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, 0x33333338, 0x5, 0x3333333333333333, x7, 1928, x1)
+
+inst_261:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666b, 0x5, 0x6666666666666666, x7, 1936, x1)
+
+inst_262:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd2, 0x5, -0xb504f333, x7, 1944, x1)
+
+inst_263:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc8, 0x5, 0xb504f333, x7, 1952, x1)
+
+inst_264:
+// rs1_val==5 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x7, 0x5, 0x2, x7, 1960, x1)
+
+inst_265:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, 0x55555559, 0x5, 0x5555555555555554, x7, 1968, x1)
+
+inst_266:
+// rs1_val==5 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x5, 0x5, 0x0, x7, 1976, x1)
+
+inst_267:
+// rs1_val==5 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x9, 0x5, 0x4, x7, 1984, x1)
+
+inst_268:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, 0x33333337, 0x5, 0x3333333333333332, x7, 1992, x1)
+
+inst_269:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666a, 0x5, 0x6666666666666665, x7, 2000, x1)
+
+inst_270:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc9, 0x5, 0xb504f332, x7, 2008, x1)
+
+inst_271:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x5555555b, 0x5, 0x5555555555555556, x7, 2016, x1)
+
+inst_272:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x55555550, 0x5, -0x5555555555555555, x7, 2024, x1)
+
+inst_273:
+// rs1_val==5 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0xb, 0x5, 0x6, x7, 2032, x1)
+
+inst_274:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, 0x33333339, 0x5, 0x3333333333333334, x7, 2040, x1)
+RVTEST_SIGBASE( x7,signature_x7_1)
+
+inst_275:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666c, 0x5, 0x6666666666666667, x7, 0, x1)
+
+inst_276:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd3, 0x5, -0xb504f332, x7, 8, x1)
+
+inst_277:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc7, 0x5, 0xb504f334, x7, 16, x1)
+
+inst_278:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x33333336, 0x3333333333333333, 0x3, x7, 24, x1)
+
+inst_279:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x77777778, 0x3333333333333333, 0x5555555555555555, x7, 32, x1)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x22222223, 0x3333333333333333, -0x5555555555555556, x7, 40, x1)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x33333338, 0x3333333333333333, 0x5, x7, 48, x1)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, 0x66666666, 0x3333333333333333, 0x3333333333333333, x7, 56, x1)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, -0x66666667, 0x3333333333333333, 0x6666666666666666, x7, 64, x1)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x7e2e4000, 0x3333333333333333, -0xb504f333, x7, 72, x1)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d99a, 0x3333333333333333, 0xb504f333, x7, 80, x1)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x33333335, 0x3333333333333333, 0x2, x7, 88, x1)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, -0x77777779, 0x3333333333333333, 0x5555555555555554, x7, 96, x1)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x33333333, 0x3333333333333333, 0x0, x7, 104, x1)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x33333337, 0x3333333333333333, 0x4, x7, 112, x1)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, 0x66666665, 0x3333333333333333, 0x3333333333333332, x7, 120, x1)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, -0x66666668, 0x3333333333333333, 0x6666666666666665, x7, 128, x1)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d99b, 0x3333333333333333, 0xb504f332, x7, 136, x1)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x77777777, 0x3333333333333333, 0x5555555555555556, x7, 144, x1)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x22222222, 0x3333333333333333, -0x5555555555555555, x7, 152, x1)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x33333339, 0x3333333333333333, 0x6, x7, 160, x1)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, 0x66666667, 0x3333333333333333, 0x3333333333333334, x7, 168, x1)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, -0x66666666, 0x3333333333333333, 0x6666666666666667, x7, 176, x1)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x7e2e4001, 0x3333333333333333, -0xb504f332, x7, 184, x1)
+
+inst_299:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d999, 0x3333333333333333, 0xb504f334, x7, 192, x1)
+
+inst_300:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x66666669, 0x6666666666666666, 0x3, x7, 200, x1)
+
+inst_301:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x44444445, 0x6666666666666666, 0x5555555555555555, x7, 208, x1)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x11111110, 0x6666666666666666, -0x5555555555555556, x7, 216, x1)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666b, 0x6666666666666666, 0x5, x7, 224, x1)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, -0x66666667, 0x6666666666666666, 0x3333333333333333, x7, 232, x1)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, -0x33333334, 0x6666666666666666, 0x6666666666666666, x7, 240, x1)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x4e9e8ccd, 0x6666666666666666, -0xb504f333, x7, 248, x1)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b5999, 0x6666666666666666, 0xb504f333, x7, 256, x1)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x66666668, 0x6666666666666666, 0x2, x7, 264, x1)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, -0x44444446, 0x6666666666666666, 0x5555555555555554, x7, 272, x1)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x66666666, 0x6666666666666666, 0x0, x7, 280, x1)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666a, 0x6666666666666666, 0x4, x7, 288, x1)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, -0x66666668, 0x6666666666666666, 0x3333333333333332, x7, 296, x1)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, -0x33333335, 0x6666666666666666, 0x6666666666666665, x7, 304, x1)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b5998, 0x6666666666666666, 0xb504f332, x7, 312, x1)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x44444444, 0x6666666666666666, 0x5555555555555556, x7, 320, x1)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x11111111, 0x6666666666666666, -0x5555555555555555, x7, 328, x1)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666c, 0x6666666666666666, 0x6, x7, 336, x1)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, -0x66666666, 0x6666666666666666, 0x3333333333333334, x7, 344, x1)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, -0x33333333, 0x6666666666666666, 0x6666666666666667, x7, 352, x1)
+
+inst_320:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x4e9e8ccc, 0x6666666666666666, -0xb504f332, x7, 360, x1)
+
+inst_321:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b599a, 0x6666666666666666, 0xb504f334, x7, 368, x1)
+
+inst_322:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd0, -0xb504f333, 0x3, x7, 376, x1)
+
+inst_323:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x5faf9dde, -0xb504f333, 0x5555555555555555, x7, 384, x1)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0xa5a4889, -0xb504f333, -0x5555555555555556, x7, 392, x1)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd2, -0xb504f333, 0x5, x7, 400, x1)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, 0x7e2e4000, -0xb504f333, 0x3333333333333333, x7, 408, x1)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, -0x4e9e8ccd, -0xb504f333, 0x6666666666666666, x7, 416, x1)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x6a09e666, -0xb504f333, -0xb504f333, x7, 424, x1)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x0, -0xb504f333, 0xb504f333, x7, 432, x1)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0ccf, -0xb504f333, 0x2, x7, 440, x1)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, -0x5faf9ddf, -0xb504f333, 0x5555555555555554, x7, 448, x1)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0ccd, -0xb504f333, 0x0, x7, 456, x1)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd1, -0xb504f333, 0x4, x7, 464, x1)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, 0x7e2e3fff, -0xb504f333, 0x3333333333333332, x7, 472, x1)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, -0x4e9e8cce, -0xb504f333, 0x6666666666666665, x7, 480, x1)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x1, -0xb504f333, 0xb504f332, x7, 488, x1)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x5faf9ddd, -0xb504f333, 0x5555555555555556, x7, 496, x1)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0xa5a4888, -0xb504f333, -0x5555555555555555, x7, 504, x1)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd3, -0xb504f333, 0x6, x7, 512, x1)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, 0x7e2e4001, -0xb504f333, 0x3333333333333334, x7, 520, x1)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, -0x4e9e8ccc, -0xb504f333, 0x6666666666666667, x7, 528, x1)
+
+inst_342:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x6a09e665, -0xb504f333, -0xb504f332, x7, 536, x1)
+
+inst_343:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, 0x1, -0xb504f333, 0xb504f334, x7, 544, x1)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cca, 0xb504f333, 0x3, x7, 552, x1)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4888, 0xb504f333, 0x5555555555555555, x7, 560, x1)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x5faf9ddd, 0xb504f333, -0x5555555555555556, x7, 568, x1)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc8, 0xb504f333, 0x5, x7, 576, x1)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d99a, 0xb504f333, 0x3333333333333333, x7, 584, x1)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b5999, 0xb504f333, 0x6666666666666666, x7, 592, x1)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x0, 0xb504f333, -0xb504f333, x7, 600, x1)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x6a09e666, 0xb504f333, 0xb504f333, x7, 608, x1)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0ccb, 0xb504f333, 0x2, x7, 616, x1)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4887, 0xb504f333, 0x5555555555555554, x7, 624, x1)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0ccd, 0xb504f333, 0x0, x7, 632, x1)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc9, 0xb504f333, 0x4, x7, 640, x1)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d99b, 0xb504f333, 0x3333333333333332, x7, 648, x1)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b5998, 0xb504f333, 0x6666666666666665, x7, 656, x1)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x6a09e665, 0xb504f333, 0xb504f332, x7, 664, x1)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4889, 0xb504f333, 0x5555555555555556, x7, 672, x1)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x5faf9dde, 0xb504f333, -0x5555555555555555, x7, 680, x1)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc7, 0xb504f333, 0x6, x7, 688, x1)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d999, 0xb504f333, 0x3333333333333334, x7, 696, x1)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b599a, 0xb504f333, 0x6666666666666667, x7, 704, x1)
+
+inst_364:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x1, 0xb504f333, -0xb504f332, x7, 712, x1)
+
+inst_365:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, 0x6a09e667, 0xb504f333, 0xb504f334, x7, 720, x1)
+
+inst_366:
+// rs1_val==2 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x5, 0x2, 0x3, x7, 728, x1)
+
+inst_367:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x55555557, 0x2, 0x5555555555555555, x7, 736, x1)
+
+inst_368:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x55555554, 0x2, -0x5555555555555556, x7, 744, x1)
+
+inst_369:
+// rs1_val==2 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x7, 0x2, 0x5, x7, 752, x1)
+
+inst_370:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, 0x33333335, 0x2, 0x3333333333333333, x7, 760, x1)
+
+inst_371:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, 0x66666668, 0x2, 0x6666666666666666, x7, 768, x1)
+
+inst_372:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0ccf, 0x2, -0xb504f333, x7, 776, x1)
+
+inst_373:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0ccb, 0x2, 0xb504f333, x7, 784, x1)
+
+inst_374:
+// rs1_val==2 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x4, 0x2, 0x2, x7, 792, x1)
+
+inst_375:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, 0x55555556, 0x2, 0x5555555555555554, x7, 800, x1)
+
+inst_376:
+// rs1_val==2 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x2, 0x2, 0x0, x7, 808, x1)
+
+inst_377:
+// rs1_val==2 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x6, 0x2, 0x4, x7, 816, x1)
+
+inst_378:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, 0x33333334, 0x2, 0x3333333333333332, x7, 824, x1)
+
+inst_379:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, 0x66666667, 0x2, 0x6666666666666665, x7, 832, x1)
+
+inst_380:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0ccc, 0x2, 0xb504f332, x7, 840, x1)
+
+inst_381:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x55555558, 0x2, 0x5555555555555556, x7, 848, x1)
+
+inst_382:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x55555553, 0x2, -0x5555555555555555, x7, 856, x1)
+
+inst_383:
+// rs1_val==2 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x8, 0x2, 0x6, x7, 864, x1)
+
+inst_384:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, 0x33333336, 0x2, 0x3333333333333334, x7, 872, x1)
+
+inst_385:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, 0x66666669, 0x2, 0x6666666666666667, x7, 880, x1)
+
+inst_386:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd0, 0x2, -0xb504f332, x7, 888, x1)
+
+inst_387:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cca, 0x2, 0xb504f334, x7, 896, x1)
+
+inst_388:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x55555557, 0x5555555555555554, 0x3, x7, 904, x1)
+
+inst_389:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x55555557, 0x5555555555555554, 0x5555555555555555, x7, 912, x1)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x2, 0x5555555555555554, -0x5555555555555556, x7, 920, x1)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x55555559, 0x5555555555555554, 0x5, x7, 928, x1)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, -0x77777779, 0x5555555555555554, 0x3333333333333333, x7, 936, x1)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, -0x44444446, 0x5555555555555554, 0x6666666666666666, x7, 944, x1)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x5faf9ddf, 0x5555555555555554, -0xb504f333, x7, 952, x1)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4887, 0x5555555555555554, 0xb504f333, x7, 960, x1)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x55555556, 0x5555555555555554, 0x2, x7, 968, x1)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, -0x55555558, 0x5555555555555554, 0x5555555555555554, x7, 976, x1)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x55555554, 0x5555555555555554, 0x0, x7, 984, x1)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x55555558, 0x5555555555555554, 0x4, x7, 992, x1)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, -0x7777777a, 0x5555555555555554, 0x3333333333333332, x7, 1000, x1)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, -0x44444447, 0x5555555555555554, 0x6666666666666665, x7, 1008, x1)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4886, 0x5555555555555554, 0xb504f332, x7, 1016, x1)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x55555556, 0x5555555555555554, 0x5555555555555556, x7, 1024, x1)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x1, 0x5555555555555554, -0x5555555555555555, x7, 1032, x1)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x5555555a, 0x5555555555555554, 0x6, x7, 1040, x1)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, -0x77777778, 0x5555555555555554, 0x3333333333333334, x7, 1048, x1)
+
+inst_407:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, -0x44444445, 0x5555555555555554, 0x6666666666666667, x7, 1056, x1)
+
+inst_408:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x5faf9dde, 0x5555555555555554, -0xb504f332, x7, 1064, x1)
+
+inst_409:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4888, 0x5555555555555554, 0xb504f334, x7, 1072, x1)
+
+inst_410:
+// rs1_val==0 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x3, 0x0, 0x3, x7, 1080, x1)
+
+inst_411:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x55555555, 0x0, 0x5555555555555555, x7, 1088, x1)
+
+inst_412:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x55555556, 0x0, -0x5555555555555556, x7, 1096, x1)
+
+inst_413:
+// rs1_val==0 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x5, 0x0, 0x5, x7, 1104, x1)
+
+inst_414:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, 0x33333333, 0x0, 0x3333333333333333, x7, 1112, x1)
+
+inst_415:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, 0x66666666, 0x0, 0x6666666666666666, x7, 1120, x1)
+
+inst_416:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0ccd, 0x0, -0xb504f333, x7, 1128, x1)
+
+inst_417:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0ccd, 0x0, 0xb504f333, x7, 1136, x1)
+
+inst_418:
+// rs1_val==0 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x2, 0x0, 0x2, x7, 1144, x1)
+
+inst_419:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cce, 0x0, -0xb504f332, x7, 1152, x1)
+
+inst_420:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0ccc, 0x0, 0xb504f334, x7, 1160, x1)
+
+inst_421:
+// rs1_val==4 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x7, 0x4, 0x3, x7, 1168, x1)
+
+inst_422:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x55555559, 0x4, 0x5555555555555555, x7, 1176, x1)
+
+inst_423:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x55555552, 0x4, -0x5555555555555556, x7, 1184, x1)
+
+inst_424:
+// rs1_val==4 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x9, 0x4, 0x5, x7, 1192, x1)
+
+inst_425:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, 0x33333337, 0x4, 0x3333333333333333, x7, 1200, x1)
+
+inst_426:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666a, 0x4, 0x6666666666666666, x7, 1208, x1)
+
+inst_427:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd1, 0x4, -0xb504f333, x7, 1216, x1)
+
+inst_428:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc9, 0x4, 0xb504f333, x7, 1224, x1)
+
+inst_429:
+// rs1_val==4 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x6, 0x4, 0x2, x7, 1232, x1)
+
+inst_430:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, 0x55555558, 0x4, 0x5555555555555554, x7, 1240, x1)
+
+inst_431:
+// rs1_val==4 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x4, 0x4, 0x0, x7, 1248, x1)
+
+inst_432:
+// rs1_val==4 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x8, 0x4, 0x4, x7, 1256, x1)
+
+inst_433:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, 0x33333336, 0x4, 0x3333333333333332, x7, 1264, x1)
+
+inst_434:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, 0x66666669, 0x4, 0x6666666666666665, x7, 1272, x1)
+
+inst_435:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cca, 0x4, 0xb504f332, x7, 1280, x1)
+
+inst_436:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x5555555a, 0x4, 0x5555555555555556, x7, 1288, x1)
+
+inst_437:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x55555551, 0x4, -0x5555555555555555, x7, 1296, x1)
+
+inst_438:
+// rs1_val==4 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0xa, 0x4, 0x6, x7, 1304, x1)
+
+inst_439:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, 0x33333338, 0x4, 0x3333333333333334, x7, 1312, x1)
+
+inst_440:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666b, 0x4, 0x6666666666666667, x7, 1320, x1)
+
+inst_441:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd2, 0x4, -0xb504f332, x7, 1328, x1)
+
+inst_442:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc8, 0x4, 0xb504f334, x7, 1336, x1)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x33333335, 0x3333333333333332, 0x3, x7, 1344, x1)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x77777779, 0x3333333333333332, 0x5555555555555555, x7, 1352, x1)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x22222224, 0x3333333333333332, -0x5555555555555556, x7, 1360, x1)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x33333337, 0x3333333333333332, 0x5, x7, 1368, x1)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, 0x66666665, 0x3333333333333332, 0x3333333333333333, x7, 1376, x1)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, -0x66666668, 0x3333333333333332, 0x6666666666666666, x7, 1384, x1)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x7e2e3fff, 0x3333333333333332, -0xb504f333, x7, 1392, x1)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d99b, 0x3333333333333332, 0xb504f333, x7, 1400, x1)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x33333334, 0x3333333333333332, 0x2, x7, 1408, x1)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, -0x7777777a, 0x3333333333333332, 0x5555555555555554, x7, 1416, x1)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x33333332, 0x3333333333333332, 0x0, x7, 1424, x1)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x33333336, 0x3333333333333332, 0x4, x7, 1432, x1)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, 0x66666664, 0x3333333333333332, 0x3333333333333332, x7, 1440, x1)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, -0x66666669, 0x3333333333333332, 0x6666666666666665, x7, 1448, x1)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d99c, 0x3333333333333332, 0xb504f332, x7, 1456, x1)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x77777778, 0x3333333333333332, 0x5555555555555556, x7, 1464, x1)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x22222223, 0x3333333333333332, -0x5555555555555555, x7, 1472, x1)
+
+inst_460:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x33333338, 0x3333333333333332, 0x6, x7, 1480, x1)
+
+inst_461:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, 0x66666666, 0x3333333333333332, 0x3333333333333334, x7, 1488, x1)
+
+inst_462:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, -0x66666667, 0x3333333333333332, 0x6666666666666667, x7, 1496, x1)
+
+inst_463:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x7e2e4000, 0x3333333333333332, -0xb504f332, x7, 1504, x1)
+
+inst_464:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d99a, 0x3333333333333332, 0xb504f334, x7, 1512, x1)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x66666668, 0x6666666666666665, 0x3, x7, 1520, x1)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x44444446, 0x6666666666666665, 0x5555555555555555, x7, 1528, x1)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x1111110f, 0x6666666666666665, -0x5555555555555556, x7, 1536, x1)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666a, 0x6666666666666665, 0x5, x7, 1544, x1)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, -0x66666668, 0x6666666666666665, 0x3333333333333333, x7, 1552, x1)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, -0x33333335, 0x6666666666666665, 0x6666666666666666, x7, 1560, x1)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x4e9e8cce, 0x6666666666666665, -0xb504f333, x7, 1568, x1)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b5998, 0x6666666666666665, 0xb504f333, x7, 1576, x1)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x66666667, 0x6666666666666665, 0x2, x7, 1584, x1)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, -0x44444447, 0x6666666666666665, 0x5555555555555554, x7, 1592, x1)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x66666665, 0x6666666666666665, 0x0, x7, 1600, x1)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x66666669, 0x6666666666666665, 0x4, x7, 1608, x1)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, -0x66666669, 0x6666666666666665, 0x3333333333333332, x7, 1616, x1)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, -0x33333336, 0x6666666666666665, 0x6666666666666665, x7, 1624, x1)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b5997, 0x6666666666666665, 0xb504f332, x7, 1632, x1)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x44444445, 0x6666666666666665, 0x5555555555555556, x7, 1640, x1)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x11111110, 0x6666666666666665, -0x5555555555555555, x7, 1648, x1)
+
+inst_482:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666b, 0x6666666666666665, 0x6, x7, 1656, x1)
+
+inst_483:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, -0x66666667, 0x6666666666666665, 0x3333333333333334, x7, 1664, x1)
+
+inst_484:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, -0x33333334, 0x6666666666666665, 0x6666666666666667, x7, 1672, x1)
+
+inst_485:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x4e9e8ccd, 0x6666666666666665, -0xb504f332, x7, 1680, x1)
+
+inst_486:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b5999, 0x6666666666666665, 0xb504f334, x7, 1688, x1)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0ccb, 0xb504f332, 0x3, x7, 1696, x1)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4887, 0xb504f332, 0x5555555555555555, x7, 1704, x1)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x5faf9ddc, 0xb504f332, -0x5555555555555556, x7, 1712, x1)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc9, 0xb504f332, 0x5, x7, 1720, x1)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d99b, 0xb504f332, 0x3333333333333333, x7, 1728, x1)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b5998, 0xb504f332, 0x6666666666666666, x7, 1736, x1)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x1, 0xb504f332, -0xb504f333, x7, 1744, x1)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x6a09e665, 0xb504f332, 0xb504f333, x7, 1752, x1)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0ccc, 0xb504f332, 0x2, x7, 1760, x1)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4886, 0xb504f332, 0x5555555555555554, x7, 1768, x1)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cce, 0xb504f332, 0x0, x7, 1776, x1)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cca, 0xb504f332, 0x4, x7, 1784, x1)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d99c, 0xb504f332, 0x3333333333333332, x7, 1792, x1)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b5997, 0xb504f332, 0x6666666666666665, x7, 1800, x1)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x6a09e664, 0xb504f332, 0xb504f332, x7, 1808, x1)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4888, 0xb504f332, 0x5555555555555556, x7, 1816, x1)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x5faf9ddd, 0xb504f332, -0x5555555555555555, x7, 1824, x1)
+
+inst_504:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc8, 0xb504f332, 0x6, x7, 1832, x1)
+
+inst_505:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d99a, 0xb504f332, 0x3333333333333334, x7, 1840, x1)
+
+inst_506:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b5999, 0xb504f332, 0x6666666666666667, x7, 1848, x1)
+
+inst_507:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x0, 0xb504f332, -0xb504f332, x7, 1856, x1)
+
+inst_508:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, 0x6a09e666, 0xb504f332, 0xb504f334, x7, 1864, x1)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x55555559, 0x5555555555555556, 0x3, x7, 1872, x1)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x55555555, 0x5555555555555556, 0x5555555555555555, x7, 1880, x1)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x0, 0x5555555555555556, -0x5555555555555556, x7, 1888, x1)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x5555555b, 0x5555555555555556, 0x5, x7, 1896, x1)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, -0x77777777, 0x5555555555555556, 0x3333333333333333, x7, 1904, x1)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, -0x44444444, 0x5555555555555556, 0x6666666666666666, x7, 1912, x1)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x5faf9ddd, 0x5555555555555556, -0xb504f333, x7, 1920, x1)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4889, 0x5555555555555556, 0xb504f333, x7, 1928, x1)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x55555558, 0x5555555555555556, 0x2, x7, 1936, x1)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, -0x55555556, 0x5555555555555556, 0x5555555555555554, x7, 1944, x1)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x55555556, 0x5555555555555556, 0x0, x7, 1952, x1)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x5555555a, 0x5555555555555556, 0x4, x7, 1960, x1)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, -0x77777778, 0x5555555555555556, 0x3333333333333332, x7, 1968, x1)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, -0x44444445, 0x5555555555555556, 0x6666666666666665, x7, 1976, x1)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4888, 0x5555555555555556, 0xb504f332, x7, 1984, x1)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x55555554, 0x5555555555555556, 0x5555555555555556, x7, 1992, x1)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x1, 0x5555555555555556, -0x5555555555555555, x7, 2000, x1)
+
+inst_526:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x5555555c, 0x5555555555555556, 0x6, x7, 2008, x1)
+
+inst_527:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, -0x77777776, 0x5555555555555556, 0x3333333333333334, x7, 2016, x1)
+
+inst_528:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, -0x44444443, 0x5555555555555556, 0x6666666666666667, x7, 2024, x1)
+
+inst_529:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x5faf9ddc, 0x5555555555555556, -0xb504f332, x7, 2032, x1)
+
+inst_530:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a488a, 0x5555555555555556, 0xb504f334, x7, 2040, x1)
+RVTEST_SIGBASE( x7,signature_x7_2)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, -0x55555552, -0x5555555555555555, 0x3, x7, 0, x1)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x0, -0x5555555555555555, 0x5555555555555555, x7, 8, x1)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x55555555, -0x5555555555555555, -0x5555555555555556, x7, 16, x1)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, -0x55555550, -0x5555555555555555, 0x5, x7, 24, x1)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, -0x22222222, -0x5555555555555555, 0x3333333333333333, x7, 32, x1)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, 0x11111111, -0x5555555555555555, 0x6666666666666666, x7, 40, x1)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0xa5a4888, -0x5555555555555555, -0xb504f333, x7, 48, x1)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x5faf9dde, -0x5555555555555555, 0xb504f333, x7, 56, x1)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, -0x55555553, -0x5555555555555555, 0x2, x7, 64, x1)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, -0x1, -0x5555555555555555, 0x5555555555555554, x7, 72, x1)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, -0x55555555, -0x5555555555555555, 0x0, x7, 80, x1)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, -0x55555551, -0x5555555555555555, 0x4, x7, 88, x1)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, -0x22222223, -0x5555555555555555, 0x3333333333333332, x7, 96, x1)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, 0x11111110, -0x5555555555555555, 0x6666666666666665, x7, 104, x1)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x5faf9ddd, -0x5555555555555555, 0xb504f332, x7, 112, x1)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x1, -0x5555555555555555, 0x5555555555555556, x7, 120, x1)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x55555556, -0x5555555555555555, -0x5555555555555555, x7, 128, x1)
+
+inst_548:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, -0x5555554f, -0x5555555555555555, 0x6, x7, 136, x1)
+
+inst_549:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, -0x22222221, -0x5555555555555555, 0x3333333333333334, x7, 144, x1)
+
+inst_550:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, 0x11111112, -0x5555555555555555, 0x6666666666666667, x7, 152, x1)
+
+inst_551:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0xa5a4887, -0x5555555555555555, -0xb504f332, x7, 160, x1)
+
+inst_552:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, 0x5faf9ddf, -0x5555555555555555, 0xb504f334, x7, 168, x1)
+
+inst_553:
+// rs1_val==6 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x9, 0x6, 0x3, x7, 176, x1)
+
+inst_554:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x5555555b, 0x6, 0x5555555555555555, x7, 184, x1)
+
+inst_555:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x55555550, 0x6, -0x5555555555555556, x7, 192, x1)
+
+inst_556:
+// rs1_val==6 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0xb, 0x6, 0x5, x7, 200, x1)
+
+inst_557:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, 0x33333339, 0x6, 0x3333333333333333, x7, 208, x1)
+
+inst_558:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666c, 0x6, 0x6666666666666666, x7, 216, x1)
+
+inst_559:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd3, 0x6, -0xb504f333, x7, 224, x1)
+
+inst_560:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc7, 0x6, 0xb504f333, x7, 232, x1)
+
+inst_561:
+// rs1_val==6 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x8, 0x6, 0x2, x7, 240, x1)
+
+inst_562:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, 0x5555555a, 0x6, 0x5555555555555554, x7, 248, x1)
+
+inst_563:
+// rs1_val==6 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x6, 0x6, 0x0, x7, 256, x1)
+
+inst_564:
+// rs1_val==6 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0xa, 0x6, 0x4, x7, 264, x1)
+
+inst_565:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, 0x33333338, 0x6, 0x3333333333333332, x7, 272, x1)
+
+inst_566:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666b, 0x6, 0x6666666666666665, x7, 280, x1)
+
+inst_567:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc8, 0x6, 0xb504f332, x7, 288, x1)
+
+inst_568:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x5555555c, 0x6, 0x5555555555555556, x7, 296, x1)
+
+inst_569:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x5555554f, 0x6, -0x5555555555555555, x7, 304, x1)
+
+inst_570:
+// rs1_val==6 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0xc, 0x6, 0x6, x7, 312, x1)
+
+inst_571:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, 0x3333333a, 0x6, 0x3333333333333334, x7, 320, x1)
+
+inst_572:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666d, 0x6, 0x6666666666666667, x7, 328, x1)
+
+inst_573:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd4, 0x6, -0xb504f332, x7, 336, x1)
+
+inst_574:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc6, 0x6, 0xb504f334, x7, 344, x1)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x33333337, 0x3333333333333334, 0x3, x7, 352, x1)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x77777777, 0x3333333333333334, 0x5555555555555555, x7, 360, x1)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x22222222, 0x3333333333333334, -0x5555555555555556, x7, 368, x1)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x33333339, 0x3333333333333334, 0x5, x7, 376, x1)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, 0x66666667, 0x3333333333333334, 0x3333333333333333, x7, 384, x1)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, -0x66666666, 0x3333333333333334, 0x6666666666666666, x7, 392, x1)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x7e2e4001, 0x3333333333333334, -0xb504f333, x7, 400, x1)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d999, 0x3333333333333334, 0xb504f333, x7, 408, x1)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x33333336, 0x3333333333333334, 0x2, x7, 416, x1)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, -0x77777778, 0x3333333333333334, 0x5555555555555554, x7, 424, x1)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x33333334, 0x3333333333333334, 0x0, x7, 432, x1)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x33333338, 0x3333333333333334, 0x4, x7, 440, x1)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, 0x66666666, 0x3333333333333334, 0x3333333333333332, x7, 448, x1)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, -0x66666667, 0x3333333333333334, 0x6666666666666665, x7, 456, x1)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d99a, 0x3333333333333334, 0xb504f332, x7, 464, x1)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x77777776, 0x3333333333333334, 0x5555555555555556, x7, 472, x1)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x22222221, 0x3333333333333334, -0x5555555555555555, x7, 480, x1)
+
+inst_592:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x3333333a, 0x3333333333333334, 0x6, x7, 488, x1)
+
+inst_593:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, 0x66666668, 0x3333333333333334, 0x3333333333333334, x7, 496, x1)
+
+inst_594:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, -0x66666665, 0x3333333333333334, 0x6666666666666667, x7, 504, x1)
+
+inst_595:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x7e2e4002, 0x3333333333333334, -0xb504f332, x7, 512, x1)
+
+inst_596:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d998, 0x3333333333333334, 0xb504f334, x7, 520, x1)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666a, 0x6666666666666667, 0x3, x7, 528, x1)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x44444444, 0x6666666666666667, 0x5555555555555555, x7, 536, x1)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x11111111, 0x6666666666666667, -0x5555555555555556, x7, 544, x1)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666c, 0x6666666666666667, 0x5, x7, 552, x1)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, -0x66666666, 0x6666666666666667, 0x3333333333333333, x7, 560, x1)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, -0x33333333, 0x6666666666666667, 0x6666666666666666, x7, 568, x1)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x4e9e8ccc, 0x6666666666666667, -0xb504f333, x7, 576, x1)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b599a, 0x6666666666666667, 0xb504f333, x7, 584, x1)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x66666669, 0x6666666666666667, 0x2, x7, 592, x1)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, -0x44444445, 0x6666666666666667, 0x5555555555555554, x7, 600, x1)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x66666667, 0x6666666666666667, 0x0, x7, 608, x1)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666b, 0x6666666666666667, 0x4, x7, 616, x1)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, -0x66666667, 0x6666666666666667, 0x3333333333333332, x7, 624, x1)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, -0x33333334, 0x6666666666666667, 0x6666666666666665, x7, 632, x1)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b5999, 0x6666666666666667, 0xb504f332, x7, 640, x1)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x44444443, 0x6666666666666667, 0x5555555555555556, x7, 648, x1)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x11111112, 0x6666666666666667, -0x5555555555555555, x7, 656, x1)
+
+inst_614:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x6666666d, 0x6666666666666667, 0x6, x7, 664, x1)
+
+inst_615:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, -0x66666665, 0x6666666666666667, 0x3333333333333334, x7, 672, x1)
+
+inst_616:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, -0x33333332, 0x6666666666666667, 0x6666666666666667, x7, 680, x1)
+
+inst_617:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x4e9e8ccb, 0x6666666666666667, -0xb504f332, x7, 688, x1)
+
+inst_618:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b599b, 0x6666666666666667, 0xb504f334, x7, 696, x1)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd1, -0xb504f332, 0x3, x7, 704, x1)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x5faf9ddd, -0xb504f332, 0x5555555555555555, x7, 712, x1)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0xa5a4888, -0xb504f332, -0x5555555555555556, x7, 720, x1)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd3, -0xb504f332, 0x5, x7, 728, x1)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, 0x7e2e4001, -0xb504f332, 0x3333333333333333, x7, 736, x1)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, -0x4e9e8ccc, -0xb504f332, 0x6666666666666666, x7, 744, x1)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, -0x6a09e665, -0xb504f332, -0xb504f333, x7, 752, x1)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x1, -0xb504f332, 0xb504f333, x7, 760, x1)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd0, -0xb504f332, 0x2, x7, 768, x1)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, -0x5faf9dde, -0xb504f332, 0x5555555555555554, x7, 776, x1)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cce, -0xb504f332, 0x0, x7, 784, x1)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd2, -0xb504f332, 0x4, x7, 792, x1)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, 0x7e2e4000, -0xb504f332, 0x3333333333333332, x7, 800, x1)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, -0x4e9e8ccd, -0xb504f332, 0x6666666666666665, x7, 808, x1)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x0, -0xb504f332, 0xb504f332, x7, 816, x1)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, -0x5faf9ddc, -0xb504f332, 0x5555555555555556, x7, 824, x1)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0xa5a4887, -0xb504f332, -0x5555555555555555, x7, 832, x1)
+
+inst_636:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0cd4, -0xb504f332, 0x6, x7, 840, x1)
+
+inst_637:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, 0x7e2e4002, -0xb504f332, 0x3333333333333334, x7, 848, x1)
+
+inst_638:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, -0x4e9e8ccb, -0xb504f332, 0x6666666666666667, x7, 856, x1)
+
+inst_639:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x6a09e664, -0xb504f332, -0xb504f332, x7, 864, x1)
+
+inst_640:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, 0x2, -0xb504f332, 0xb504f334, x7, 872, x1)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc9, 0xb504f334, 0x3, x7, 880, x1)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4889, 0xb504f334, 0x5555555555555555, x7, 888, x1)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x5faf9dde, 0xb504f334, -0x5555555555555556, x7, 896, x1)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc7, 0xb504f334, 0x5, x7, 904, x1)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d999, 0xb504f334, 0x3333333333333333, x7, 912, x1)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b599a, 0xb504f334, 0x6666666666666666, x7, 920, x1)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x1, 0xb504f334, -0xb504f333, x7, 928, x1)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x6a09e667, 0xb504f334, 0xb504f333, x7, 936, x1)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x2
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cca, 0xb504f334, 0x2, x7, 944, x1)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a4888, 0xb504f334, 0x5555555555555554, x7, 952, x1)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0ccc, 0xb504f334, 0x0, x7, 960, x1)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc8, 0xb504f334, 0x4, x7, 968, x1)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d99a, 0xb504f334, 0x3333333333333332, x7, 976, x1)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b5999, 0xb504f334, 0x6666666666666665, x7, 984, x1)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x6a09e666, 0xb504f334, 0xb504f332, x7, 992, x1)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0xa5a488a, 0xb504f334, 0x5555555555555556, x7, 1000, x1)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, 0x5faf9ddf, 0xb504f334, -0x5555555555555555, x7, 1008, x1)
+
+inst_658:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cc6, 0xb504f334, 0x6, x7, 1016, x1)
+
+inst_659:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, -0x17c7d998, 0xb504f334, 0x3333333333333334, x7, 1024, x1)
+
+inst_660:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, 0x1b6b599b, 0xb504f334, 0x6666666666666667, x7, 1032, x1)
+
+inst_661:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, 0x2, 0xb504f334, -0xb504f332, x7, 1040, x1)
+
+inst_662:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f334
+TEST_RR_OP(addw, x12, x10, x11, 0x6a09e668, 0xb504f334, 0xb504f334, x7, 1048, x1)
+
+inst_663:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555554
+TEST_RR_OP(addw, x12, x10, x11, 0x55555554, 0x0, 0x5555555555555554, x7, 1056, x1)
+
+inst_664:
+// rs1_val==0 and rs2_val==0,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(addw, x12, x10, x11, 0x0, 0x0, 0x0, x7, 1064, x1)
+
+inst_665:
+// rs1_val==0 and rs2_val==4,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(addw, x12, x10, x11, 0x4, 0x0, 0x4, x7, 1072, x1)
+
+inst_666:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333332
+TEST_RR_OP(addw, x12, x10, x11, 0x33333332, 0x0, 0x3333333333333332, x7, 1080, x1)
+
+inst_667:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666665
+TEST_RR_OP(addw, x12, x10, x11, 0x66666665, 0x0, 0x6666666666666665, x7, 1088, x1)
+
+inst_668:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f332
+TEST_RR_OP(addw, x12, x10, x11, -0x4afb0cce, 0x0, 0xb504f332, x7, 1096, x1)
+
+inst_669:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555556
+TEST_RR_OP(addw, x12, x10, x11, 0x55555556, 0x0, 0x5555555555555556, x7, 1104, x1)
+
+inst_670:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555555
+TEST_RR_OP(addw, x12, x10, x11, -0x55555555, 0x0, -0x5555555555555555, x7, 1112, x1)
+
+inst_671:
+// rs1_val==0 and rs2_val==6,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(addw, x12, x10, x11, 0x6, 0x0, 0x6, x7, 1120, x1)
+
+inst_672:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333334
+TEST_RR_OP(addw, x12, x10, x11, 0x33333334, 0x0, 0x3333333333333334, x7, 1128, x1)
+
+inst_673:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666667
+TEST_RR_OP(addw, x12, x10, x11, 0x66666667, 0x0, 0x6666666666666667, x7, 1136, x1)
+
+inst_674:
+// rs1_val > 0 and rs2_val > 0, rs2_val == 8796093022208, rs1_val != rs2_val, rs1_val == 8589934592
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:0x80000000000
+TEST_RR_OP(addw, x12, x10, x11, 0x0, 0x200000000, 0x80000000000, x7, 1144, x1)
+
+inst_675:
+// rs1_val < 0 and rs2_val < 0, rs1_val == -549755813889
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:-0xb504f333
+TEST_RR_OP(addw, x12, x10, x11, 0x4afb0ccc, -0x8000000001, -0xb504f333, x7, 1152, x1)
+
+inst_676:
+// rs1_val == (-2**(xlen-1)), rs2_val == 8192, rs1_val == -9223372036854775808
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000000000; op2val:0x2000
+TEST_RR_OP(addw, x12, x10, x11, 0x2000, -0x8000000000000000, 0x2000, x7, 1160, x1)
+
+inst_677:
+// rs1_val == 1, rs2_val == -4194305
+// opcode: addw ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:-0x400001
+TEST_RR_OP(addw, x12, x10, x11, -0x400000, 0x1, -0x400001, x7, 1168, x1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 19*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_2:
+ .fill 147*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/and-01.S b/riscof/suite/rv64i_m/I/and-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..2a3f2c0e16a9dc6b84b7e7feeb6a99c751199fcf
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/and-01.S
@@ -0,0 +1,3469 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the and instruction of the RISC-V I extension for the and covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",and)
+
+RVTEST_SIGBASE( x13,signature_x13_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x7, rs2==x7, rd==x21, rs1_val > 0 and rs2_val > 0, rs2_val == 134217728, rs1_val == 64, rs1_val != rs2_val
+// opcode: and ; op1:x7; op2:x7; dest:x21; op1val:0x40; op2val:0x40
+TEST_RR_OP(and, x21, x7, x7, 0x40, 0x40, 0x40, x13, 0, x16)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x19, rs2==x11, rd==x11, rs1_val > 0 and rs2_val < 0, rs1_val == 4, rs2_val == -65537
+// opcode: and ; op1:x19; op2:x11; dest:x11; op1val:0x4; op2val:-0x10001
+TEST_RR_OP(and, x11, x19, x11, 0x4, 0x4, -0x10001, x13, 8, x16)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x27, rs2==x27, rd==x27, rs1_val < 0 and rs2_val < 0, rs2_val == -134217729, rs1_val == -274877906945
+// opcode: and ; op1:x27; op2:x27; dest:x27; op1val:-0x4000000001; op2val:-0x4000000001
+TEST_RR_OP(and, x27, x27, x27, 0xffffffbfffffffff, -0x4000000001, -0x4000000001, x13, 16, x16)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x20, rs2==x23, rd==x14, rs1_val < 0 and rs2_val > 0, rs1_val == -134217729, rs2_val == 562949953421312
+// opcode: and ; op1:x20; op2:x23; dest:x14; op1val:-0x8000001; op2val:0x2000000000000
+TEST_RR_OP(and, x14, x20, x23, 0x2000000000000, -0x8000001, 0x2000000000000, x13, 24, x16)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x17, rs2==x18, rd==x17, rs1_val == rs2_val,
+// opcode: and ; op1:x17; op2:x18; dest:x17; op1val:-0x4000000000000000; op2val:-0x4000000000000000
+TEST_RR_OP(and, x17, x17, x18, 0xc000000000000000, -0x4000000000000000, -0x4000000000000000, x13, 32, x16)
+
+inst_5:
+// rs1==x18, rs2==x29, rd==x24, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, rs1_val == -144115188075855873
+// opcode: and ; op1:x18; op2:x29; dest:x24; op1val:-0x200000000000001; op2val:-0x8000000000000000
+TEST_RR_OP(and, x24, x18, x29, 0x8000000000000000, -0x200000000000001, -0x8000000000000000, x13, 40, x16)
+
+inst_6:
+// rs1==x28, rs2==x5, rd==x25, rs2_val == 0, rs1_val == 2147483648
+// opcode: and ; op1:x28; op2:x5; dest:x25; op1val:0x80000000; op2val:0x0
+TEST_RR_OP(and, x25, x28, x5, 0x0, 0x80000000, 0x0, x13, 48, x16)
+
+inst_7:
+// rs1==x15, rs2==x3, rd==x22, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807, rs1_val == 65536
+// opcode: and ; op1:x15; op2:x3; dest:x22; op1val:0x10000; op2val:0x7fffffffffffffff
+TEST_RR_OP(and, x22, x15, x3, 0x10000, 0x10000, 0x7fffffffffffffff, x13, 56, x16)
+
+inst_8:
+// rs1==x0, rs2==x19, rd==x23, rs2_val == 1, rs1_val == 33554432
+// opcode: and ; op1:x0; op2:x19; dest:x23; op1val:0x0; op2val:0x1
+TEST_RR_OP(and, x23, x0, x19, 0x0, 0x0, 0x1, x13, 64, x16)
+
+inst_9:
+// rs1==x21, rs2==x17, rd==x28, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808, rs2_val == 2
+// opcode: and ; op1:x21; op2:x17; dest:x28; op1val:-0x8000000000000000; op2val:0x2
+TEST_RR_OP(and, x28, x21, x17, 0x0, -0x8000000000000000, 0x2, x13, 72, x16)
+
+inst_10:
+// rs1==x2, rs2==x10, rd==x7, rs1_val == 0, rs2_val == 274877906944
+// opcode: and ; op1:x2; op2:x10; dest:x7; op1val:0x0; op2val:0x4000000000
+TEST_RR_OP(and, x7, x2, x10, 0x0, 0x0, 0x4000000000, x13, 80, x16)
+
+inst_11:
+// rs1==x1, rs2==x12, rd==x6, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, rs2_val == 256
+// opcode: and ; op1:x1; op2:x12; dest:x6; op1val:0x7fffffffffffffff; op2val:0x100
+TEST_RR_OP(and, x6, x1, x12, 0x100, 0x7fffffffffffffff, 0x100, x13, 88, x16)
+
+inst_12:
+// rs1==x10, rs2==x21, rd==x3, rs1_val == 1, rs2_val == -140737488355329
+// opcode: and ; op1:x10; op2:x21; dest:x3; op1val:0x1; op2val:-0x800000000001
+TEST_RR_OP(and, x3, x10, x21, 0x1, 0x1, -0x800000000001, x13, 96, x16)
+
+inst_13:
+// rs1==x12, rs2==x9, rd==x8, rs2_val == 4, rs1_val==3 and rs2_val==4
+// opcode: and ; op1:x12; op2:x9; dest:x8; op1val:0x3; op2val:0x4
+TEST_RR_OP(and, x8, x12, x9, 0x0, 0x3, 0x4, x13, 104, x16)
+
+inst_14:
+// rs1==x9, rs2==x8, rd==x0, rs2_val == 8,
+// opcode: and ; op1:x9; op2:x8; dest:x0; op1val:-0x4000000000000000; op2val:0x8
+TEST_RR_OP(and, x0, x9, x8, 0, -0x4000000000000000, 0x8, x13, 112, x16)
+
+inst_15:
+// rs1==x25, rs2==x4, rd==x2, rs2_val == 16, rs1_val == 4611686018427387904
+// opcode: and ; op1:x25; op2:x4; dest:x2; op1val:0x4000000000000000; op2val:0x10
+TEST_RR_OP(and, x2, x25, x4, 0x0, 0x4000000000000000, 0x10, x13, 120, x16)
+
+inst_16:
+// rs1==x14, rs2==x6, rd==x5, rs2_val == 32,
+// opcode: and ; op1:x14; op2:x6; dest:x5; op1val:-0x8000001; op2val:0x20
+TEST_RR_OP(and, x5, x14, x6, 0x20, -0x8000001, 0x20, x13, 128, x16)
+
+inst_17:
+// rs1==x31, rs2==x1, rd==x4, rs2_val == 64,
+// opcode: and ; op1:x31; op2:x1; dest:x4; op1val:0x3333333333333332; op2val:0x40
+TEST_RR_OP(and, x4, x31, x1, 0x0, 0x3333333333333332, 0x40, x13, 136, x16)
+
+inst_18:
+// rs1==x23, rs2==x28, rd==x16, rs2_val == 128, rs1_val == -1125899906842625
+// opcode: and ; op1:x23; op2:x28; dest:x16; op1val:-0x4000000000001; op2val:0x80
+TEST_RR_OP(and, x16, x23, x28, 0x80, -0x4000000000001, 0x80, x13, 144, x17)
+RVTEST_SIGBASE( x7,signature_x7_0)
+
+inst_19:
+// rs1==x5, rs2==x16, rd==x18, rs2_val == 512, rs1_val == 16777216
+// opcode: and ; op1:x5; op2:x16; dest:x18; op1val:0x1000000; op2val:0x200
+TEST_RR_OP(and, x18, x5, x16, 0x0, 0x1000000, 0x200, x7, 0, x17)
+
+inst_20:
+// rs1==x3, rs2==x15, rd==x29, rs2_val == 1024, rs1_val == 536870912
+// opcode: and ; op1:x3; op2:x15; dest:x29; op1val:0x20000000; op2val:0x400
+TEST_RR_OP(and, x29, x3, x15, 0x0, 0x20000000, 0x400, x7, 8, x17)
+
+inst_21:
+// rs1==x4, rs2==x2, rd==x9, rs2_val == 2048, rs1_val == -1073741825
+// opcode: and ; op1:x4; op2:x2; dest:x9; op1val:-0x40000001; op2val:0x800
+TEST_RR_OP(and, x9, x4, x2, 0x800, -0x40000001, 0x800, x7, 16, x17)
+
+inst_22:
+// rs1==x22, rs2==x26, rd==x10, rs2_val == 4096, rs1_val == 6148914691236517205
+// opcode: and ; op1:x22; op2:x26; dest:x10; op1val:0x5555555555555555; op2val:0x1000
+TEST_RR_OP(and, x10, x22, x26, 0x1000, 0x5555555555555555, 0x1000, x7, 24, x17)
+
+inst_23:
+// rs1==x24, rs2==x20, rd==x1, rs2_val == 8192, rs1_val == 4194304
+// opcode: and ; op1:x24; op2:x20; dest:x1; op1val:0x400000; op2val:0x2000
+TEST_RR_OP(and, x1, x24, x20, 0x0, 0x400000, 0x2000, x7, 32, x17)
+
+inst_24:
+// rs1==x11, rs2==x30, rd==x31, rs2_val == 16384, rs1_val == 1073741824
+// opcode: and ; op1:x11; op2:x30; dest:x31; op1val:0x40000000; op2val:0x4000
+TEST_RR_OP(and, x31, x11, x30, 0x0, 0x40000000, 0x4000, x7, 40, x17)
+
+inst_25:
+// rs1==x29, rs2==x24, rd==x12, rs2_val == 32768, rs1_val == 32768
+// opcode: and ; op1:x29; op2:x24; dest:x12; op1val:0x8000; op2val:0x8000
+TEST_RR_OP(and, x12, x29, x24, 0x8000, 0x8000, 0x8000, x7, 48, x17)
+
+inst_26:
+// rs1==x16, rs2==x14, rd==x30, rs2_val == 65536,
+// opcode: and ; op1:x16; op2:x14; dest:x30; op1val:-0x7; op2val:0x10000
+TEST_RR_OP(and, x30, x16, x14, 0x10000, -0x7, 0x10000, x7, 56, x17)
+
+inst_27:
+// rs1==x26, rs2==x22, rd==x15, rs2_val == 131072, rs1_val == -1048577
+// opcode: and ; op1:x26; op2:x22; dest:x15; op1val:-0x100001; op2val:0x20000
+TEST_RR_OP(and, x15, x26, x22, 0x20000, -0x100001, 0x20000, x7, 64, x17)
+
+inst_28:
+// rs1==x13, rs2==x25, rd==x19, rs2_val == 262144, rs1_val == -1152921504606846977
+// opcode: and ; op1:x13; op2:x25; dest:x19; op1val:-0x1000000000000001; op2val:0x40000
+TEST_RR_OP(and, x19, x13, x25, 0x40000, -0x1000000000000001, 0x40000, x7, 72, x17)
+
+inst_29:
+// rs1==x8, rs2==x0, rd==x20, rs2_val == 524288, rs1_val == 18014398509481984
+// opcode: and ; op1:x8; op2:x0; dest:x20; op1val:0x40000000000000; op2val:0x0
+TEST_RR_OP(and, x20, x8, x0, 0x0, 0x40000000000000, 0x0, x7, 80, x17)
+
+inst_30:
+// rs1==x30, rs2==x31, rd==x13, rs2_val == 1048576,
+// opcode: and ; op1:x30; op2:x31; dest:x13; op1val:0x0; op2val:0x100000
+TEST_RR_OP(and, x13, x30, x31, 0x0, 0x0, 0x100000, x7, 88, x17)
+
+inst_31:
+// rs1==x6, rs2==x13, rd==x26, rs2_val == 2097152, rs1_val == -65537
+// opcode: and ; op1:x6; op2:x13; dest:x26; op1val:-0x10001; op2val:0x200000
+TEST_RR_OP(and, x26, x6, x13, 0x200000, -0x10001, 0x200000, x7, 96, x17)
+
+inst_32:
+// rs2_val == 4194304, rs1_val == -137438953473
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:0x400000
+TEST_RR_OP(and, x12, x10, x11, 0x400000, -0x2000000001, 0x400000, x7, 104, x1)
+
+inst_33:
+// rs2_val == 8388608, rs1_val == -72057594037927937
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:0x800000
+TEST_RR_OP(and, x12, x10, x11, 0x800000, -0x100000000000001, 0x800000, x7, 112, x1)
+
+inst_34:
+// rs2_val == 16777216, rs1_val == 524288
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0x1000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x80000, 0x1000000, x7, 120, x1)
+
+inst_35:
+// rs2_val == 33554432,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0x2000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x80000000, 0x2000000, x7, 128, x1)
+
+inst_36:
+// rs2_val == 67108864, rs1_val == 131072
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0x4000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x20000, 0x4000000, x7, 136, x1)
+
+inst_37:
+// rs2_val == 268435456,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x10000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5, 0x10000000, x7, 144, x1)
+
+inst_38:
+// rs2_val == 536870912, rs1_val == -9007199254740993
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:0x20000000
+TEST_RR_OP(and, x12, x10, x11, 0x20000000, -0x20000000000001, 0x20000000, x7, 152, x1)
+
+inst_39:
+// rs2_val == 1073741824, rs1_val == 17179869184
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:0x40000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x400000000, 0x40000000, x7, 160, x1)
+
+inst_40:
+// rs2_val == 2147483648,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x80000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x80000000, x7, 168, x1)
+
+inst_41:
+// rs2_val == 4294967296,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x100000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x6, 0x100000000, x7, 176, x1)
+
+inst_42:
+// rs2_val == 8589934592, rs1_val == -262145
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0x200000000
+TEST_RR_OP(and, x12, x10, x11, 0x200000000, -0x40001, 0x200000000, x7, 184, x1)
+
+inst_43:
+// rs2_val == 17179869184,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x400000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0x400000000, x7, 192, x1)
+
+inst_44:
+// rs2_val == 34359738368, rs1_val == 137438953472
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:0x800000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2000000000, 0x800000000, x7, 200, x1)
+
+inst_45:
+// rs2_val == 68719476736, rs1_val == -2199023255553
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:0x1000000000
+TEST_RR_OP(and, x12, x10, x11, 0x1000000000, -0x20000000001, 0x1000000000, x7, 208, x1)
+
+inst_46:
+// rs2_val == 137438953472, rs1_val == 140737488355328
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:0x2000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x800000000000, 0x2000000000, x7, 216, x1)
+
+inst_47:
+// rs2_val == 549755813888,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0x8000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x80000000, 0x8000000000, x7, 224, x1)
+
+inst_48:
+// rs2_val == 1099511627776,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x10000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x6, 0x10000000000, x7, 232, x1)
+
+inst_49:
+// rs2_val == 2199023255552, rs1_val == -524289
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x20000000000
+TEST_RR_OP(and, x12, x10, x11, 0x20000000000, -0x80001, 0x20000000000, x7, 240, x1)
+
+inst_50:
+// rs2_val == 4398046511104,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x40000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x400000, 0x40000000000, x7, 248, x1)
+
+inst_51:
+// rs2_val == 8796093022208,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x80000000000
+TEST_RR_OP(and, x12, x10, x11, 0x80000000000, -0x10001, 0x80000000000, x7, 256, x1)
+
+inst_52:
+// rs2_val == 17592186044416,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0x100000000000
+TEST_RR_OP(and, x12, x10, x11, 0x100000000000, -0x40001, 0x100000000000, x7, 264, x1)
+
+inst_53:
+// rs2_val == 35184372088832,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4; op2val:0x200000000000
+TEST_RR_OP(and, x12, x10, x11, 0x200000000000, -0x4, 0x200000000000, x7, 272, x1)
+
+inst_54:
+// rs2_val == 70368744177664,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x7; op2val:0x400000000000
+TEST_RR_OP(and, x12, x10, x11, 0x400000000000, -0x7, 0x400000000000, x7, 280, x1)
+
+inst_55:
+// rs2_val == 140737488355328, rs1_val == 576460752303423488
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:0x800000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x800000000000000, 0x800000000000, x7, 288, x1)
+
+inst_56:
+// rs2_val == 281474976710656, rs1_val == 1125899906842624
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:0x1000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4000000000000, 0x1000000000000, x7, 296, x1)
+
+inst_57:
+// rs2_val == 1125899906842624,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0x4000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x4000000000000, -0x4000000001, 0x4000000000000, x7, 304, x1)
+
+inst_58:
+// rs2_val == 2251799813685248, rs1_val == 2305843009213693952
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:0x8000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2000000000000000, 0x8000000000000, x7, 312, x1)
+
+inst_59:
+// rs2_val == 4503599627370496,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:0x10000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x10000000000000, -0x20000000000001, 0x10000000000000, x7, 320, x1)
+
+inst_60:
+// rs2_val == 9007199254740992, rs1_val == -17179869185
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:0x20000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x20000000000000, -0x400000001, 0x20000000000000, x7, 328, x1)
+
+inst_61:
+// rs2_val == 18014398509481984,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x40000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x40000000000000, -0xb504f333, 0x40000000000000, x7, 336, x1)
+
+inst_62:
+// rs2_val == 36028797018963968, rs1_val == 562949953421312
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:0x80000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2000000000000, 0x80000000000000, x7, 344, x1)
+
+inst_63:
+// rs2_val == 72057594037927936,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x100000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x100000000000000, -0x80001, 0x100000000000000, x7, 352, x1)
+
+inst_64:
+// rs2_val == 144115188075855872,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4; op2val:0x200000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x200000000000000, -0x4, 0x200000000000000, x7, 360, x1)
+
+inst_65:
+// rs2_val == 288230376151711744,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:0x400000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4000000000000000, 0x400000000000000, x7, 368, x1)
+
+inst_66:
+// rs2_val == 576460752303423488, rs1_val == 70368744177664
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:0x800000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x400000000000, 0x800000000000000, x7, 376, x1)
+
+inst_67:
+// rs2_val == 1152921504606846976,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x1000000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x1000000000000000, -0xb504f332, 0x1000000000000000, x7, 384, x1)
+
+inst_68:
+// rs2_val == 2305843009213693952, rs1_val == -16385
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x2000000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x2000000000000000, -0x4001, 0x2000000000000000, x7, 392, x1)
+
+inst_69:
+// rs2_val == 4611686018427387904, rs1_val == -576460752303423489
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:0x4000000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x4000000000000000, -0x800000000000001, 0x4000000000000000, x7, 400, x1)
+
+inst_70:
+// rs2_val == -2, rs1_val == 4398046511104
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:-0x2
+TEST_RR_OP(and, x12, x10, x11, 0x40000000000, 0x40000000000, -0x2, x7, 408, x1)
+
+inst_71:
+// rs2_val == -3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x3
+TEST_RR_OP(and, x12, x10, x11, 0x5555555555555554, 0x5555555555555554, -0x3, x7, 416, x1)
+
+inst_72:
+// rs2_val == -5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5
+TEST_RR_OP(and, x12, x10, x11, 0x5555555555555550, 0x5555555555555554, -0x5, x7, 424, x1)
+
+inst_73:
+// rs2_val == -9, rs1_val == -65
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:-0x9
+TEST_RR_OP(and, x12, x10, x11, 0xffffffffffffffb7, -0x41, -0x9, x7, 432, x1)
+
+inst_74:
+// rs2_val == -17,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:-0x11
+TEST_RR_OP(and, x12, x10, x11, 0xfffbffffffffffef, -0x4000000000001, -0x11, x7, 440, x1)
+
+inst_75:
+// rs2_val == -33,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:-0x21
+TEST_RR_OP(and, x12, x10, x11, 0x4000000000000000, 0x4000000000000000, -0x21, x7, 448, x1)
+
+inst_76:
+// rs2_val == -65,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x41
+TEST_RR_OP(and, x12, x10, x11, 0x8000, 0x8000, -0x41, x7, 456, x1)
+
+inst_77:
+// rs2_val == -129, rs1_val == -4097
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:-0x81
+TEST_RR_OP(and, x12, x10, x11, 0xffffffffffffef7f, -0x1001, -0x81, x7, 464, x1)
+
+inst_78:
+// rs2_val == -257,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:-0x101
+TEST_RR_OP(and, x12, x10, x11, 0x400000000, 0x400000000, -0x101, x7, 472, x1)
+
+inst_79:
+// rs2_val == -513,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4; op2val:-0x201
+TEST_RR_OP(and, x12, x10, x11, 0xfffffffffffffdfc, -0x4, -0x201, x7, 480, x1)
+
+inst_80:
+// rs2_val == -1025, rs1_val == -5
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:-0x401
+TEST_RR_OP(and, x12, x10, x11, 0xfffffffffffffbfb, -0x5, -0x401, x7, 488, x1)
+
+inst_81:
+// rs2_val == -2049, rs1_val == 2097152
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:-0x801
+TEST_RR_OP(and, x12, x10, x11, 0x200000, 0x200000, -0x801, x7, 496, x1)
+
+inst_82:
+// rs2_val == -4097,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:-0x1001
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x1, -0x1001, x7, 504, x1)
+
+inst_83:
+// rs2_val == -8193, rs1_val == -36028797018963969
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:-0x2001
+TEST_RR_OP(and, x12, x10, x11, 0xff7fffffffffdfff, -0x80000000000001, -0x2001, x7, 512, x1)
+
+inst_84:
+// rs2_val == -16385, rs1_val == 36028797018963968
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:-0x4001
+TEST_RR_OP(and, x12, x10, x11, 0x80000000000000, 0x80000000000000, -0x4001, x7, 520, x1)
+
+inst_85:
+// rs2_val == -32769, rs1_val == 2
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x8001
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, -0x8001, x7, 528, x1)
+
+inst_86:
+// rs2_val == -131073, rs1_val == 16
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:-0x20001
+TEST_RR_OP(and, x12, x10, x11, 0x10, 0x10, -0x20001, x7, 536, x1)
+
+inst_87:
+// rs2_val == -262145,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:-0x40001
+TEST_RR_OP(and, x12, x10, x11, 0x20000000, 0x20000000, -0x40001, x7, 544, x1)
+
+inst_88:
+// rs2_val == -524289,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4; op2val:-0x80001
+TEST_RR_OP(and, x12, x10, x11, 0xfffffffffff7fffc, -0x4, -0x80001, x7, 552, x1)
+
+inst_89:
+// rs2_val == -1048577, rs1_val == 9007199254740992
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:-0x100001
+TEST_RR_OP(and, x12, x10, x11, 0x20000000000000, 0x20000000000000, -0x100001, x7, 560, x1)
+
+inst_90:
+// rs2_val == -2097153,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:-0x200001
+TEST_RR_OP(and, x12, x10, x11, 0x40000000000000, 0x40000000000000, -0x200001, x7, 568, x1)
+
+inst_91:
+// rs2_val == -4194305, rs1_val == -68719476737
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:-0x400001
+TEST_RR_OP(and, x12, x10, x11, 0xffffffefffbfffff, -0x1000000001, -0x400001, x7, 576, x1)
+
+inst_92:
+// rs2_val == -8388609, rs1_val == 128
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:-0x800001
+TEST_RR_OP(and, x12, x10, x11, 0x80, 0x80, -0x800001, x7, 584, x1)
+
+inst_93:
+// rs2_val == -16777217,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x1000001
+TEST_RR_OP(and, x12, x10, x11, 0x5555555554555556, 0x5555555555555556, -0x1000001, x7, 592, x1)
+
+inst_94:
+// rs2_val == -33554433, rs1_val == -549755813889
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:-0x2000001
+TEST_RR_OP(and, x12, x10, x11, 0xffffff7ffdffffff, -0x8000000001, -0x2000001, x7, 600, x1)
+
+inst_95:
+// rs2_val == -67108865,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:-0x4000001
+TEST_RR_OP(and, x12, x10, x11, 0xffffffdffbffffff, -0x2000000001, -0x4000001, x7, 608, x1)
+
+inst_96:
+// rs2_val == -268435457, rs1_val == 8192
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:-0x10000001
+TEST_RR_OP(and, x12, x10, x11, 0x2000, 0x2000, -0x10000001, x7, 616, x1)
+
+inst_97:
+// rs2_val == -536870913,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:-0x20000001
+TEST_RR_OP(and, x12, x10, x11, 0x40, 0x40, -0x20000001, x7, 624, x1)
+
+inst_98:
+// rs2_val == -1073741825, rs1_val == 256
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x40000001
+TEST_RR_OP(and, x12, x10, x11, 0x100, 0x100, -0x40000001, x7, 632, x1)
+
+inst_99:
+// rs2_val == -2147483649, rs1_val == 4294967296
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:-0x80000001
+TEST_RR_OP(and, x12, x10, x11, 0x100000000, 0x100000000, -0x80000001, x7, 640, x1)
+
+inst_100:
+// rs2_val == -4294967297,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x100000001
+TEST_RR_OP(and, x12, x10, x11, 0xfffffffe4afb0cce, -0xb504f332, -0x100000001, x7, 648, x1)
+
+inst_101:
+// rs2_val == -8589934593, rs1_val == -16777217
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:-0x200000001
+TEST_RR_OP(and, x12, x10, x11, 0xfffffffdfeffffff, -0x1000001, -0x200000001, x7, 656, x1)
+
+inst_102:
+// rs2_val == -17179869185, rs1_val == -32769
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:-0x400000001
+TEST_RR_OP(and, x12, x10, x11, 0xfffffffbffff7fff, -0x8001, -0x400000001, x7, 664, x1)
+
+inst_103:
+// rs2_val == -34359738369, rs1_val == 8796093022208
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:-0x800000001
+TEST_RR_OP(and, x12, x10, x11, 0x80000000000, 0x80000000000, -0x800000001, x7, 672, x1)
+
+inst_104:
+// rs2_val == -68719476737, rs1_val == -281474976710657
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:-0x1000000001
+TEST_RR_OP(and, x12, x10, x11, 0xfffeffefffffffff, -0x1000000000001, -0x1000000001, x7, 680, x1)
+
+inst_105:
+// rs2_val == -137438953473, rs1_val == -34359738369
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:-0x2000000001
+TEST_RR_OP(and, x12, x10, x11, 0xffffffd7ffffffff, -0x800000001, -0x2000000001, x7, 688, x1)
+
+inst_106:
+// rs2_val == -274877906945,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x4000000001
+TEST_RR_OP(and, x12, x10, x11, 0x5555551555555555, 0x5555555555555555, -0x4000000001, x7, 696, x1)
+
+inst_107:
+// rs2_val == -549755813889,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x8000000001
+TEST_RR_OP(and, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, -0x8000000001, x7, 704, x1)
+
+inst_108:
+// rs2_val == -1099511627777,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x10000000001
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, -0x10000000001, x7, 712, x1)
+
+inst_109:
+// rs2_val == -2199023255553,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:-0x20000000001
+TEST_RR_OP(and, x12, x10, x11, 0x40000000, 0x40000000, -0x20000000001, x7, 720, x1)
+
+inst_110:
+// rs2_val == -4398046511105,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:-0x40000000001
+TEST_RR_OP(and, x12, x10, x11, 0x100000000, 0x100000000, -0x40000000001, x7, 728, x1)
+
+inst_111:
+// rs2_val == -8796093022209,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x9; op2val:-0x80000000001
+TEST_RR_OP(and, x12, x10, x11, 0x9, 0x9, -0x80000000001, x7, 736, x1)
+
+inst_112:
+// rs2_val == -17592186044417,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:-0x100000000001
+TEST_RR_OP(and, x12, x10, x11, 0x400000000000, 0x400000000000, -0x100000000001, x7, 744, x1)
+
+inst_113:
+// rs2_val == -35184372088833, rs1_val == 274877906944
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:-0x200000000001
+TEST_RR_OP(and, x12, x10, x11, 0x4000000000, 0x4000000000, -0x200000000001, x7, 752, x1)
+
+inst_114:
+// rs2_val == -70368744177665,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:-0x400000000001
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x400000000000, -0x400000000001, x7, 760, x1)
+
+inst_115:
+// rs2_val == -281474976710657, rs1_val == -131073
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:-0x1000000000001
+TEST_RR_OP(and, x12, x10, x11, 0xfffefffffffdffff, -0x20001, -0x1000000000001, x7, 768, x1)
+
+inst_116:
+// rs2_val == -562949953421313, rs1_val == -1025
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:-0x2000000000001
+TEST_RR_OP(and, x12, x10, x11, 0xfffdfffffffffbff, -0x401, -0x2000000000001, x7, 776, x1)
+
+inst_117:
+// rs2_val == -1125899906842625,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x4000000000001
+TEST_RR_OP(and, x12, x10, x11, 0xfffbffff4afb0cce, -0xb504f332, -0x4000000000001, x7, 784, x1)
+
+inst_118:
+// rs2_val == -2251799813685249, rs1_val == -2049
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:-0x8000000000001
+TEST_RR_OP(and, x12, x10, x11, 0xfff7fffffffff7ff, -0x801, -0x8000000000001, x7, 792, x1)
+
+inst_119:
+// rs2_val == -4503599627370497,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x10000000000001
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, -0x10000000000001, x7, 800, x1)
+
+inst_120:
+// rs2_val == -9007199254740993,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffffffffffff; op2val:-0x20000000000001
+TEST_RR_OP(and, x12, x10, x11, 0x7fdfffffffffffff, 0x7fffffffffffffff, -0x20000000000001, x7, 808, x1)
+
+inst_121:
+// rs2_val == -18014398509481985,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:-0x40000000000001
+TEST_RR_OP(and, x12, x10, x11, 0xffbffffffffffbff, -0x401, -0x40000000000001, x7, 816, x1)
+
+inst_122:
+// rs2_val == -36028797018963969,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:-0x80000000000001
+TEST_RR_OP(and, x12, x10, x11, 0x40000000000000, 0x40000000000000, -0x80000000000001, x7, 824, x1)
+
+inst_123:
+// rs2_val == -72057594037927937,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:-0x100000000000001
+TEST_RR_OP(and, x12, x10, x11, 0xfeffffffffffffbf, -0x41, -0x100000000000001, x7, 832, x1)
+
+inst_124:
+// rs2_val == -144115188075855873,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:-0x200000000000001
+TEST_RR_OP(and, x12, x10, x11, 0xfddfffffffffffff, -0x20000000000001, -0x200000000000001, x7, 840, x1)
+
+inst_125:
+// rs2_val == -288230376151711745, rs1_val == 4503599627370496
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:-0x400000000000001
+TEST_RR_OP(and, x12, x10, x11, 0x10000000000000, 0x10000000000000, -0x400000000000001, x7, 848, x1)
+
+inst_126:
+// rs2_val == -576460752303423489, rs1_val == 2199023255552
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:-0x800000000000001
+TEST_RR_OP(and, x12, x10, x11, 0x20000000000, 0x20000000000, -0x800000000000001, x7, 856, x1)
+
+inst_127:
+// rs2_val == -1152921504606846977,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:-0x1000000000000001
+TEST_RR_OP(and, x12, x10, x11, 0xeffffffffffff7ff, -0x801, -0x1000000000000001, x7, 864, x1)
+
+inst_128:
+// rs2_val == -2305843009213693953,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:-0x2000000000000001
+TEST_RR_OP(and, x12, x10, x11, 0xdffbffffffffffff, -0x4000000000001, -0x2000000000000001, x7, 872, x1)
+
+inst_129:
+// rs2_val == -4611686018427387905,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000000; op2val:-0x4000000000000001
+TEST_RR_OP(and, x12, x10, x11, 0x8000000000000000, -0x4000000000000000, -0x4000000000000001, x7, 880, x1)
+
+inst_130:
+// rs2_val == 6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x40000000, 0x40000000, 0x5555555555555555, x7, 888, x1)
+
+inst_131:
+// rs2_val == -6148914691236517206, rs1_val == -8796093022209
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaa2aaaaaaaaaa, -0x80000000001, -0x5555555555555556, x7, 896, x1)
+
+inst_132:
+// rs1_val == 8,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x8, 0x8, -0xb504f332, x7, 904, x1)
+
+inst_133:
+// rs1_val == 32,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x2
+TEST_RR_OP(and, x12, x10, x11, 0x20, 0x20, -0x2, x7, 912, x1)
+
+inst_134:
+// rs1_val == 512,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:0x800000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x200, 0x800000000, x7, 920, x1)
+
+inst_135:
+// rs1_val == 1024,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:0x100000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x400, 0x100000000, x7, 928, x1)
+
+inst_136:
+// rs1_val == 2048,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:0x100000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x800, 0x100000000000, x7, 936, x1)
+
+inst_137:
+// rs1_val == 4096,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x1000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x1000, 0x1000000000, x7, 944, x1)
+
+inst_138:
+// rs1_val == 16384,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:0x20
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4000, 0x20, x7, 952, x1)
+
+inst_139:
+// rs1_val == 262144,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:-0x10000000000001
+TEST_RR_OP(and, x12, x10, x11, 0x40000, 0x40000, -0x10000000000001, x7, 960, x1)
+
+inst_140:
+// rs1_val == 1048576,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:-0x80000000001
+TEST_RR_OP(and, x12, x10, x11, 0x100000, 0x100000, -0x80000000001, x7, 968, x1)
+
+inst_141:
+// rs1_val == 8388608,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x40000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x800000, 0x40000000000000, x7, 976, x1)
+
+inst_142:
+// rs1_val == 67108864,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x4000000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4000000, 0x4000000000000000, x7, 984, x1)
+
+inst_143:
+// rs1_val == 134217728,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x8000000, 0x8000000, -0x5555555555555556, x7, 992, x1)
+
+inst_144:
+// rs1_val == 268435456,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x80000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x10000000, 0x80000, x7, 1000, x1)
+
+inst_145:
+// rs1_val == 8589934592,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:-0x81
+TEST_RR_OP(and, x12, x10, x11, 0x200000000, 0x200000000, -0x81, x7, 1008, x1)
+
+inst_146:
+// rs1_val == 34359738368,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:-0x400000000001
+TEST_RR_OP(and, x12, x10, x11, 0x800000000, 0x800000000, -0x400000000001, x7, 1016, x1)
+
+inst_147:
+// rs1_val == 68719476736,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:0x2000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x1000000000, 0x2000000, x7, 1024, x1)
+
+inst_148:
+// rs1_val == 549755813888,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0x1000000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x8000000000, 0x1000000000000000, x7, 1032, x1)
+
+inst_149:
+// rs1_val == 1099511627776,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x100
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x10000000000, 0x100, x7, 1040, x1)
+
+inst_150:
+// rs1_val == 17592186044416,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:-0x4000000000001
+TEST_RR_OP(and, x12, x10, x11, 0x100000000000, 0x100000000000, -0x4000000000001, x7, 1048, x1)
+
+inst_151:
+// rs1_val == 35184372088832,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:0x7
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x200000000000, 0x7, x7, 1056, x1)
+
+inst_152:
+// rs1_val == 281474976710656,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0x4000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x1000000000000, 0x4000000, x7, 1064, x1)
+
+inst_153:
+// rs1_val == 2251799813685248,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:0x8000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x8000000000000, 0x8000000, x7, 1072, x1)
+
+inst_154:
+// rs1_val == 72057594037927936,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x100000000000000, -0x5555555555555555, x7, 1080, x1)
+
+inst_155:
+// rs1_val == 144115188075855872,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:0x8000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x200000000000000, 0x8000000000000, x7, 1088, x1)
+
+inst_156:
+// rs1_val == 288230376151711744,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:-0x5
+TEST_RR_OP(and, x12, x10, x11, 0x400000000000000, 0x400000000000000, -0x5, x7, 1096, x1)
+
+inst_157:
+// rs1_val == 1152921504606846976,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:-0x4000000000001
+TEST_RR_OP(and, x12, x10, x11, 0x1000000000000000, 0x1000000000000000, -0x4000000000001, x7, 1104, x1)
+
+inst_158:
+// rs1_val == -2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0x40000000000001
+TEST_RR_OP(and, x12, x10, x11, 0xffbffffffffffffe, -0x2, -0x40000000000001, x7, 1112, x1)
+
+inst_159:
+// rs1_val == -3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0x2000000001
+TEST_RR_OP(and, x12, x10, x11, 0xffffffdffffffffd, -0x3, -0x2000000001, x7, 1120, x1)
+
+inst_160:
+// rs1_val == -9,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x6666666666666665, -0x9, 0x6666666666666665, x7, 1128, x1)
+
+inst_161:
+// rs1_val == -17,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:0x80000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x80000000000000, -0x11, 0x80000000000000, x7, 1136, x1)
+
+inst_162:
+// rs1_val == -33,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x6666666666666646, -0x21, 0x6666666666666666, x7, 1144, x1)
+
+inst_163:
+// rs1_val == -129,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x100000000000
+TEST_RR_OP(and, x12, x10, x11, 0x100000000000, -0x81, 0x100000000000, x7, 1152, x1)
+
+inst_164:
+// rs1_val == -257,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:-0x40000001
+TEST_RR_OP(and, x12, x10, x11, 0xffffffffbffffeff, -0x101, -0x40000001, x7, 1160, x1)
+
+inst_165:
+// rs1_val == -513,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:-0x400001
+TEST_RR_OP(and, x12, x10, x11, 0xffffffffffbffdff, -0x201, -0x400001, x7, 1168, x1)
+
+inst_166:
+// rs1_val == -8193,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:-0x800000001
+TEST_RR_OP(and, x12, x10, x11, 0xfffffff7ffffdfff, -0x2001, -0x800000001, x7, 1176, x1)
+
+inst_167:
+// rs1_val == -2097153,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:-0x8001
+TEST_RR_OP(and, x12, x10, x11, 0xffffffffffdf7fff, -0x200001, -0x8001, x7, 1184, x1)
+
+inst_168:
+// rs1_val == -4194305,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0x400
+TEST_RR_OP(and, x12, x10, x11, 0x400, -0x400001, 0x400, x7, 1192, x1)
+
+inst_169:
+// rs1_val == -8388609,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x100
+TEST_RR_OP(and, x12, x10, x11, 0x100, -0x800001, 0x100, x7, 1200, x1)
+
+inst_170:
+// rs1_val == -33554433,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:-0x8001
+TEST_RR_OP(and, x12, x10, x11, 0xfffffffffdff7fff, -0x2000001, -0x8001, x7, 1208, x1)
+
+inst_171:
+// rs1_val == -67108865,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:-0x20001
+TEST_RR_OP(and, x12, x10, x11, 0xfffffffffbfdffff, -0x4000001, -0x20001, x7, 1216, x1)
+
+inst_172:
+// rs1_val == -268435457,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x10000001, 0x0, x7, 1224, x1)
+
+inst_173:
+// rs1_val == -536870913,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x200000
+TEST_RR_OP(and, x12, x10, x11, 0x200000, -0x20000001, 0x200000, x7, 1232, x1)
+
+inst_174:
+// rs1_val == -2147483649,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:0x80
+TEST_RR_OP(and, x12, x10, x11, 0x80, -0x80000001, 0x80, x7, 1240, x1)
+
+inst_175:
+// rs1_val == -4294967297,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:-0x2000000001
+TEST_RR_OP(and, x12, x10, x11, 0xffffffdeffffffff, -0x100000001, -0x2000000001, x7, 1248, x1)
+
+inst_176:
+// rs1_val == -8589934593,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:0x4000
+TEST_RR_OP(and, x12, x10, x11, 0x4000, -0x200000001, 0x4000, x7, 1256, x1)
+
+inst_177:
+// rs1_val == -1099511627777,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0x10000000001, 0x4, x7, 1264, x1)
+
+inst_178:
+// rs1_val == -4398046511105,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:-0x1
+TEST_RR_OP(and, x12, x10, x11, 0xfffffbffffffffff, -0x40000000001, -0x1, x7, 1272, x1)
+
+inst_179:
+// rs1_val == -17592186044417,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:-0x40000000000001
+TEST_RR_OP(and, x12, x10, x11, 0xffbfefffffffffff, -0x100000000001, -0x40000000000001, x7, 1280, x1)
+
+inst_180:
+// rs1_val == -35184372088833,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:0x1000000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x1000000000000000, -0x200000000001, 0x1000000000000000, x7, 1288, x1)
+
+inst_181:
+// rs1_val == -70368744177665,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:0x100000000
+TEST_RR_OP(and, x12, x10, x11, 0x100000000, -0x400000000001, 0x100000000, x7, 1296, x1)
+
+inst_182:
+// rs1_val == -140737488355329,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:0x400000000000
+TEST_RR_OP(and, x12, x10, x11, 0x400000000000, -0x800000000001, 0x400000000000, x7, 1304, x1)
+
+inst_183:
+// rs1_val == -562949953421313,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:0x40000
+TEST_RR_OP(and, x12, x10, x11, 0x40000, -0x2000000000001, 0x40000, x7, 1312, x1)
+
+inst_184:
+// rs1_val == -2251799813685249,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:0x2000000
+TEST_RR_OP(and, x12, x10, x11, 0x2000000, -0x8000000000001, 0x2000000, x7, 1320, x1)
+
+inst_185:
+// rs1_val == -4503599627370497,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:-0x2000000001
+TEST_RR_OP(and, x12, x10, x11, 0xffefffdfffffffff, -0x10000000000001, -0x2000000001, x7, 1328, x1)
+
+inst_186:
+// rs1_val == -18014398509481985,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:-0x100000000000001
+TEST_RR_OP(and, x12, x10, x11, 0xfebfffffffffffff, -0x40000000000001, -0x100000000000001, x7, 1336, x1)
+
+inst_187:
+// rs1_val == -288230376151711745,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000000001; op2val:0x400000000
+TEST_RR_OP(and, x12, x10, x11, 0x400000000, -0x400000000000001, 0x400000000, x7, 1344, x1)
+
+inst_188:
+// rs1_val == -2305843009213693953,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:-0x20000001
+TEST_RR_OP(and, x12, x10, x11, 0xdfffffffdfffffff, -0x2000000000000001, -0x20000001, x7, 1352, x1)
+
+inst_189:
+// rs1_val == -4611686018427387905,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:0x4000000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x4000000000000001, 0x4000000000000000, x7, 1360, x1)
+
+inst_190:
+// rs1_val == -6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x100000000000000
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x5555555555555556, 0x100000000000000, x7, 1368, x1)
+
+inst_191:
+// rs1_val==3 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x3, 0x3, x7, 1376, x1)
+
+inst_192:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x3, 0x5555555555555555, x7, 1384, x1)
+
+inst_193:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, -0x5555555555555556, x7, 1392, x1)
+
+inst_194:
+// rs1_val==3 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x3, 0x5, x7, 1400, x1)
+
+inst_195:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x3, 0x3333333333333333, x7, 1408, x1)
+
+inst_196:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, 0x6666666666666666, x7, 1416, x1)
+
+inst_197:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x3, -0xb504f333, x7, 1424, x1)
+
+inst_198:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x3, 0xb504f333, x7, 1432, x1)
+
+inst_199:
+// rs1_val==3 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, 0x2, x7, 1440, x1)
+
+inst_200:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3, 0x5555555555555554, x7, 1448, x1)
+
+inst_201:
+// rs1_val==3 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3, 0x0, x7, 1456, x1)
+
+inst_202:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, 0x3333333333333332, x7, 1464, x1)
+
+inst_203:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x3, 0x6666666666666665, x7, 1472, x1)
+
+inst_204:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, 0xb504f332, x7, 1480, x1)
+
+inst_205:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, 0x5555555555555556, x7, 1488, x1)
+
+inst_206:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x3, -0x5555555555555555, x7, 1496, x1)
+
+inst_207:
+// rs1_val==3 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, 0x6, x7, 1504, x1)
+
+inst_208:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3, 0x3333333333333334, x7, 1512, x1)
+
+inst_209:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x3, 0x6666666666666667, x7, 1520, x1)
+
+inst_210:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3, -0xb504f332, x7, 1528, x1)
+
+inst_211:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3, 0xb504f334, x7, 1536, x1)
+
+inst_212:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x5555555555555555, 0x3, x7, 1544, x1)
+
+inst_213:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x5555555555555555, x7, 1552, x1)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5555555555555555, -0x5555555555555556, x7, 1560, x1)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x5555555555555555, 0x5, x7, 1568, x1)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111111, 0x5555555555555555, 0x3333333333333333, x7, 1576, x1)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444444, 0x5555555555555555, 0x6666666666666666, x7, 1584, x1)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x5555555540510445, 0x5555555555555555, -0xb504f333, x7, 1592, x1)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x15045111, 0x5555555555555555, 0xb504f333, x7, 1600, x1)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5555555555555555, 0x2, x7, 1608, x1)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x5555555555555554, 0x5555555555555555, 0x5555555555555554, x7, 1616, x1)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5555555555555555, 0x0, x7, 1624, x1)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5555555555555555, 0x4, x7, 1632, x1)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111110, 0x5555555555555555, 0x3333333333333332, x7, 1640, x1)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444445, 0x5555555555555555, 0x6666666666666665, x7, 1648, x1)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x15045110, 0x5555555555555555, 0xb504f332, x7, 1656, x1)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x5555555555555554, 0x5555555555555555, 0x5555555555555556, x7, 1664, x1)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x5555555555555555, -0x5555555555555555, x7, 1672, x1)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5555555555555555, 0x6, x7, 1680, x1)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111114, 0x5555555555555555, 0x3333333333333334, x7, 1688, x1)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444445, 0x5555555555555555, 0x6666666666666667, x7, 1696, x1)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x5555555540510444, 0x5555555555555555, -0xb504f332, x7, 1704, x1)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x15045114, 0x5555555555555555, 0xb504f334, x7, 1712, x1)
+
+inst_234:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x5555555555555556, 0x3, x7, 1720, x1)
+
+inst_235:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x5555555555555556, 0x5555555555555555, x7, 1728, x1)
+
+inst_236:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, -0x5555555555555556, x7, 1736, x1)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x5555555555555556, 0x5, x7, 1744, x1)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, -0x5555555555555556, 0x3333333333333333, x7, 1752, x1)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, -0x5555555555555556, 0x6666666666666666, x7, 1760, x1)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaa0aaa0888, -0x5555555555555556, -0xb504f333, x7, 1768, x1)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0xa000a222, -0x5555555555555556, 0xb504f333, x7, 1776, x1)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x5555555555555556, 0x2, x7, 1784, x1)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x5555555555555556, 0x5555555555555554, x7, 1792, x1)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x5555555555555556, 0x0, x7, 1800, x1)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x5555555555555556, 0x4, x7, 1808, x1)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, -0x5555555555555556, 0x3333333333333332, x7, 1816, x1)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222220, -0x5555555555555556, 0x6666666666666665, x7, 1824, x1)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0xa000a222, -0x5555555555555556, 0xb504f332, x7, 1832, x1)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x5555555555555556, 0x5555555555555556, x7, 1840, x1)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, -0x5555555555555555, x7, 1848, x1)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x5555555555555556, 0x6, x7, 1856, x1)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222220, -0x5555555555555556, 0x3333333333333334, x7, 1864, x1)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, -0x5555555555555556, 0x6666666666666667, x7, 1872, x1)
+
+inst_254:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaa0aaa088a, -0x5555555555555556, -0xb504f332, x7, 1880, x1)
+
+inst_255:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0xa000a220, -0x5555555555555556, 0xb504f334, x7, 1888, x1)
+
+inst_256:
+// rs1_val==5 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x5, 0x3, x7, 1896, x1)
+
+inst_257:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x5, 0x5555555555555555, x7, 1904, x1)
+
+inst_258:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5, -0x5555555555555556, x7, 1912, x1)
+
+inst_259:
+// rs1_val==5 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x5, 0x5, x7, 1920, x1)
+
+inst_260:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x5, 0x3333333333333333, x7, 1928, x1)
+
+inst_261:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0x6666666666666666, x7, 1936, x1)
+
+inst_262:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x5, -0xb504f333, x7, 1944, x1)
+
+inst_263:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x5, 0xb504f333, x7, 1952, x1)
+
+inst_264:
+// rs1_val==5 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5, 0x2, x7, 1960, x1)
+
+inst_265:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0x5555555555555554, x7, 1968, x1)
+
+inst_266:
+// rs1_val==5 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5, 0x0, x7, 1976, x1)
+
+inst_267:
+// rs1_val==5 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0x4, x7, 1984, x1)
+
+inst_268:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5, 0x3333333333333332, x7, 1992, x1)
+
+inst_269:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x5, 0x6666666666666665, x7, 2000, x1)
+
+inst_270:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5, 0xb504f332, x7, 2008, x1)
+
+inst_271:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0x5555555555555556, x7, 2016, x1)
+
+inst_272:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x5, -0x5555555555555555, x7, 2024, x1)
+
+inst_273:
+// rs1_val==5 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0x6, x7, 2032, x1)
+
+inst_274:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0x3333333333333334, x7, 2040, x1)
+RVTEST_SIGBASE( x7,signature_x7_1)
+
+inst_275:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x5, 0x6666666666666667, x7, 0, x1)
+
+inst_276:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, -0xb504f332, x7, 8, x1)
+
+inst_277:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5, 0xb504f334, x7, 16, x1)
+
+inst_278:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x3333333333333333, 0x3, x7, 24, x1)
+
+inst_279:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111111, 0x3333333333333333, 0x5555555555555555, x7, 32, x1)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, 0x3333333333333333, -0x5555555555555556, x7, 40, x1)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x3333333333333333, 0x5, x7, 48, x1)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x3333333333333333, x7, 56, x1)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, 0x3333333333333333, 0x6666666666666666, x7, 64, x1)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x3333333302330001, 0x3333333333333333, -0xb504f333, x7, 72, x1)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x31003333, 0x3333333333333333, 0xb504f333, x7, 80, x1)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3333333333333333, 0x2, x7, 88, x1)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111110, 0x3333333333333333, 0x5555555555555554, x7, 96, x1)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3333333333333333, 0x0, x7, 104, x1)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3333333333333333, 0x4, x7, 112, x1)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x3333333333333332, 0x3333333333333333, 0x3333333333333332, x7, 120, x1)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222221, 0x3333333333333333, 0x6666666666666665, x7, 128, x1)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x31003332, 0x3333333333333333, 0xb504f332, x7, 136, x1)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111112, 0x3333333333333333, 0x5555555555555556, x7, 144, x1)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222223, 0x3333333333333333, -0x5555555555555555, x7, 152, x1)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3333333333333333, 0x6, x7, 160, x1)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x3333333333333330, 0x3333333333333333, 0x3333333333333334, x7, 168, x1)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222223, 0x3333333333333333, 0x6666666666666667, x7, 176, x1)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x3333333302330002, 0x3333333333333333, -0xb504f332, x7, 184, x1)
+
+inst_299:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x31003330, 0x3333333333333333, 0xb504f334, x7, 192, x1)
+
+inst_300:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6666666666666666, 0x3, x7, 200, x1)
+
+inst_301:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444444, 0x6666666666666666, 0x5555555555555555, x7, 208, x1)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, 0x6666666666666666, -0x5555555555555556, x7, 216, x1)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6666666666666666, 0x5, x7, 224, x1)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, 0x6666666666666666, 0x3333333333333333, x7, 232, x1)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x6666666666666666, x7, 240, x1)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x6666666642620444, 0x6666666666666666, -0xb504f333, x7, 248, x1)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x24046222, 0x6666666666666666, 0xb504f333, x7, 256, x1)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6666666666666666, 0x2, x7, 264, x1)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444444, 0x6666666666666666, 0x5555555555555554, x7, 272, x1)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x6666666666666666, 0x0, x7, 280, x1)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6666666666666666, 0x4, x7, 288, x1)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, 0x6666666666666666, 0x3333333333333332, x7, 296, x1)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x6666666666666664, 0x6666666666666666, 0x6666666666666665, x7, 304, x1)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x24046222, 0x6666666666666666, 0xb504f332, x7, 312, x1)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444446, 0x6666666666666666, 0x5555555555555556, x7, 320, x1)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, 0x6666666666666666, -0x5555555555555555, x7, 328, x1)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x6666666666666666, 0x6, x7, 336, x1)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222224, 0x6666666666666666, 0x3333333333333334, x7, 344, x1)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x6666666666666667, x7, 352, x1)
+
+inst_320:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x6666666642620446, 0x6666666666666666, -0xb504f332, x7, 360, x1)
+
+inst_321:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x24046224, 0x6666666666666666, 0xb504f334, x7, 368, x1)
+
+inst_322:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x1, -0xb504f333, 0x3, x7, 376, x1)
+
+inst_323:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x5555555540510445, -0xb504f333, 0x5555555555555555, x7, 384, x1)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaa0aaa0888, -0xb504f333, -0x5555555555555556, x7, 392, x1)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x5, -0xb504f333, 0x5, x7, 400, x1)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x3333333302330001, -0xb504f333, 0x3333333333333333, x7, 408, x1)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x6666666642620444, -0xb504f333, 0x6666666666666666, x7, 416, x1)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, -0xb504f333, x7, 424, x1)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x1, -0xb504f333, 0xb504f333, x7, 432, x1)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0xb504f333, 0x2, x7, 440, x1)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x5555555540510444, -0xb504f333, 0x5555555555555554, x7, 448, x1)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0xb504f333, 0x0, x7, 456, x1)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb504f333, 0x4, x7, 464, x1)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x3333333302330000, -0xb504f333, 0x3333333333333332, x7, 472, x1)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x6666666642620445, -0xb504f333, 0x6666666666666665, x7, 480, x1)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0xb504f333, 0xb504f332, x7, 488, x1)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x5555555540510444, -0xb504f333, 0x5555555555555556, x7, 496, x1)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaa0aaa0889, -0xb504f333, -0x5555555555555555, x7, 504, x1)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb504f333, 0x6, x7, 512, x1)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x3333333302330004, -0xb504f333, 0x3333333333333334, x7, 520, x1)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x6666666642620445, -0xb504f333, 0x6666666666666667, x7, 528, x1)
+
+inst_342:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0xffffffff4afb0ccc, -0xb504f333, -0xb504f332, x7, 536, x1)
+
+inst_343:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb504f333, 0xb504f334, x7, 544, x1)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0xb504f333, 0x3, x7, 552, x1)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x15045111, 0xb504f333, 0x5555555555555555, x7, 560, x1)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0xa000a222, 0xb504f333, -0x5555555555555556, x7, 568, x1)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0xb504f333, 0x5, x7, 576, x1)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x31003333, 0xb504f333, 0x3333333333333333, x7, 584, x1)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x24046222, 0xb504f333, 0x6666666666666666, x7, 592, x1)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0xb504f333, -0xb504f333, x7, 600, x1)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0xb504f333, 0xb504f333, 0xb504f333, x7, 608, x1)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0xb504f333, 0x2, x7, 616, x1)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x15045110, 0xb504f333, 0x5555555555555554, x7, 624, x1)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb504f333, 0x0, x7, 632, x1)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb504f333, 0x4, x7, 640, x1)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x31003332, 0xb504f333, 0x3333333333333332, x7, 648, x1)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x24046221, 0xb504f333, 0x6666666666666665, x7, 656, x1)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0xb504f332, 0xb504f333, 0xb504f332, x7, 664, x1)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x15045112, 0xb504f333, 0x5555555555555556, x7, 672, x1)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0xa000a223, 0xb504f333, -0x5555555555555555, x7, 680, x1)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0xb504f333, 0x6, x7, 688, x1)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x31003330, 0xb504f333, 0x3333333333333334, x7, 696, x1)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x24046223, 0xb504f333, 0x6666666666666667, x7, 704, x1)
+
+inst_364:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0xb504f333, -0xb504f332, x7, 712, x1)
+
+inst_365:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0xb504f330, 0xb504f333, 0xb504f334, x7, 720, x1)
+
+inst_366:
+// rs1_val==2 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x3, x7, 728, x1)
+
+inst_367:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x5555555555555555, x7, 736, x1)
+
+inst_368:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, -0x5555555555555556, x7, 744, x1)
+
+inst_369:
+// rs1_val==2 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x5, x7, 752, x1)
+
+inst_370:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x3333333333333333, x7, 760, x1)
+
+inst_371:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x6666666666666666, x7, 768, x1)
+
+inst_372:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, -0xb504f333, x7, 776, x1)
+
+inst_373:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0xb504f333, x7, 784, x1)
+
+inst_374:
+// rs1_val==2 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x2, x7, 792, x1)
+
+inst_375:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x5555555555555554, x7, 800, x1)
+
+inst_376:
+// rs1_val==2 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x0, x7, 808, x1)
+
+inst_377:
+// rs1_val==2 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x4, x7, 816, x1)
+
+inst_378:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x3333333333333332, x7, 824, x1)
+
+inst_379:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x6666666666666665, x7, 832, x1)
+
+inst_380:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0xb504f332, x7, 840, x1)
+
+inst_381:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x5555555555555556, x7, 848, x1)
+
+inst_382:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, -0x5555555555555555, x7, 856, x1)
+
+inst_383:
+// rs1_val==2 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x6, x7, 864, x1)
+
+inst_384:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0x3333333333333334, x7, 872, x1)
+
+inst_385:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, 0x6666666666666667, x7, 880, x1)
+
+inst_386:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x2, -0xb504f332, x7, 888, x1)
+
+inst_387:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2, 0xb504f334, x7, 896, x1)
+
+inst_388:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5555555555555554, 0x3, x7, 904, x1)
+
+inst_389:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x5555555555555555, x7, 912, x1)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5555555555555554, -0x5555555555555556, x7, 920, x1)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5555555555555554, 0x5, x7, 928, x1)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111110, 0x5555555555555554, 0x3333333333333333, x7, 936, x1)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444444, 0x5555555555555554, 0x6666666666666666, x7, 944, x1)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x5555555540510444, 0x5555555555555554, -0xb504f333, x7, 952, x1)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x15045110, 0x5555555555555554, 0xb504f333, x7, 960, x1)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5555555555555554, 0x2, x7, 968, x1)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x5555555555555554, x7, 976, x1)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5555555555555554, 0x0, x7, 984, x1)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5555555555555554, 0x4, x7, 992, x1)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111110, 0x5555555555555554, 0x3333333333333332, x7, 1000, x1)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444444, 0x5555555555555554, 0x6666666666666665, x7, 1008, x1)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x15045110, 0x5555555555555554, 0xb504f332, x7, 1016, x1)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x5555555555555556, x7, 1024, x1)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5555555555555554, -0x5555555555555555, x7, 1032, x1)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5555555555555554, 0x6, x7, 1040, x1)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111114, 0x5555555555555554, 0x3333333333333334, x7, 1048, x1)
+
+inst_407:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444444, 0x5555555555555554, 0x6666666666666667, x7, 1056, x1)
+
+inst_408:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x5555555540510444, 0x5555555555555554, -0xb504f332, x7, 1064, x1)
+
+inst_409:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x15045114, 0x5555555555555554, 0xb504f334, x7, 1072, x1)
+
+inst_410:
+// rs1_val==0 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x3, x7, 1080, x1)
+
+inst_411:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x5555555555555555, x7, 1088, x1)
+
+inst_412:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, -0x5555555555555556, x7, 1096, x1)
+
+inst_413:
+// rs1_val==0 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x5, x7, 1104, x1)
+
+inst_414:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x3333333333333333, x7, 1112, x1)
+
+inst_415:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x6666666666666666, x7, 1120, x1)
+
+inst_416:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, -0xb504f333, x7, 1128, x1)
+
+inst_417:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0xb504f333, x7, 1136, x1)
+
+inst_418:
+// rs1_val==0 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x2, x7, 1144, x1)
+
+inst_419:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, -0xb504f332, x7, 1152, x1)
+
+inst_420:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0xb504f334, x7, 1160, x1)
+
+inst_421:
+// rs1_val==4 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0x3, x7, 1168, x1)
+
+inst_422:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x5555555555555555, x7, 1176, x1)
+
+inst_423:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, -0x5555555555555556, x7, 1184, x1)
+
+inst_424:
+// rs1_val==4 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x5, x7, 1192, x1)
+
+inst_425:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0x3333333333333333, x7, 1200, x1)
+
+inst_426:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x6666666666666666, x7, 1208, x1)
+
+inst_427:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, -0xb504f333, x7, 1216, x1)
+
+inst_428:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0xb504f333, x7, 1224, x1)
+
+inst_429:
+// rs1_val==4 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0x2, x7, 1232, x1)
+
+inst_430:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x5555555555555554, x7, 1240, x1)
+
+inst_431:
+// rs1_val==4 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0x0, x7, 1248, x1)
+
+inst_432:
+// rs1_val==4 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x4, x7, 1256, x1)
+
+inst_433:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0x3333333333333332, x7, 1264, x1)
+
+inst_434:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x6666666666666665, x7, 1272, x1)
+
+inst_435:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, 0xb504f332, x7, 1280, x1)
+
+inst_436:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x5555555555555556, x7, 1288, x1)
+
+inst_437:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x4, -0x5555555555555555, x7, 1296, x1)
+
+inst_438:
+// rs1_val==4 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x6, x7, 1304, x1)
+
+inst_439:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x3333333333333334, x7, 1312, x1)
+
+inst_440:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0x6666666666666667, x7, 1320, x1)
+
+inst_441:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, -0xb504f332, x7, 1328, x1)
+
+inst_442:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x4, 0xb504f334, x7, 1336, x1)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3333333333333332, 0x3, x7, 1344, x1)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111110, 0x3333333333333332, 0x5555555555555555, x7, 1352, x1)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, 0x3333333333333332, -0x5555555555555556, x7, 1360, x1)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3333333333333332, 0x5, x7, 1368, x1)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x3333333333333333, x7, 1376, x1)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, 0x3333333333333332, 0x6666666666666666, x7, 1384, x1)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x3333333302330000, 0x3333333333333332, -0xb504f333, x7, 1392, x1)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x31003332, 0x3333333333333332, 0xb504f333, x7, 1400, x1)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3333333333333332, 0x2, x7, 1408, x1)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111110, 0x3333333333333332, 0x5555555555555554, x7, 1416, x1)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3333333333333332, 0x0, x7, 1424, x1)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3333333333333332, 0x4, x7, 1432, x1)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x3333333333333332, x7, 1440, x1)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222220, 0x3333333333333332, 0x6666666666666665, x7, 1448, x1)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x31003332, 0x3333333333333332, 0xb504f332, x7, 1456, x1)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111112, 0x3333333333333332, 0x5555555555555556, x7, 1464, x1)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, 0x3333333333333332, -0x5555555555555555, x7, 1472, x1)
+
+inst_460:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x3333333333333332, 0x6, x7, 1480, x1)
+
+inst_461:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x3333333333333330, 0x3333333333333332, 0x3333333333333334, x7, 1488, x1)
+
+inst_462:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, 0x3333333333333332, 0x6666666666666667, x7, 1496, x1)
+
+inst_463:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x3333333302330002, 0x3333333333333332, -0xb504f332, x7, 1504, x1)
+
+inst_464:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x31003330, 0x3333333333333332, 0xb504f334, x7, 1512, x1)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x1, 0x6666666666666665, 0x3, x7, 1520, x1)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444445, 0x6666666666666665, 0x5555555555555555, x7, 1528, x1)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222220, 0x6666666666666665, -0x5555555555555556, x7, 1536, x1)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x6666666666666665, 0x5, x7, 1544, x1)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222221, 0x6666666666666665, 0x3333333333333333, x7, 1552, x1)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x6666666666666664, 0x6666666666666665, 0x6666666666666666, x7, 1560, x1)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x6666666642620445, 0x6666666666666665, -0xb504f333, x7, 1568, x1)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x24046221, 0x6666666666666665, 0xb504f333, x7, 1576, x1)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x6666666666666665, 0x2, x7, 1584, x1)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444444, 0x6666666666666665, 0x5555555555555554, x7, 1592, x1)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x6666666666666665, 0x0, x7, 1600, x1)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6666666666666665, 0x4, x7, 1608, x1)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222220, 0x6666666666666665, 0x3333333333333332, x7, 1616, x1)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x6666666666666665, x7, 1624, x1)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x24046220, 0x6666666666666665, 0xb504f332, x7, 1632, x1)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444444, 0x6666666666666665, 0x5555555555555556, x7, 1640, x1)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222221, 0x6666666666666665, -0x5555555555555555, x7, 1648, x1)
+
+inst_482:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6666666666666665, 0x6, x7, 1656, x1)
+
+inst_483:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222224, 0x6666666666666665, 0x3333333333333334, x7, 1664, x1)
+
+inst_484:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x6666666666666667, x7, 1672, x1)
+
+inst_485:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x6666666642620444, 0x6666666666666665, -0xb504f332, x7, 1680, x1)
+
+inst_486:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x24046224, 0x6666666666666665, 0xb504f334, x7, 1688, x1)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0xb504f332, 0x3, x7, 1696, x1)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x15045110, 0xb504f332, 0x5555555555555555, x7, 1704, x1)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0xa000a222, 0xb504f332, -0x5555555555555556, x7, 1712, x1)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb504f332, 0x5, x7, 1720, x1)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x31003332, 0xb504f332, 0x3333333333333333, x7, 1728, x1)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x24046222, 0xb504f332, 0x6666666666666666, x7, 1736, x1)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb504f332, -0xb504f333, x7, 1744, x1)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0xb504f332, 0xb504f332, 0xb504f333, x7, 1752, x1)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0xb504f332, 0x2, x7, 1760, x1)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x15045110, 0xb504f332, 0x5555555555555554, x7, 1768, x1)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb504f332, 0x0, x7, 1776, x1)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb504f332, 0x4, x7, 1784, x1)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x31003332, 0xb504f332, 0x3333333333333332, x7, 1792, x1)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x24046220, 0xb504f332, 0x6666666666666665, x7, 1800, x1)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0xb504f332, 0xb504f332, 0xb504f332, x7, 1808, x1)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x15045112, 0xb504f332, 0x5555555555555556, x7, 1816, x1)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0xa000a222, 0xb504f332, -0x5555555555555555, x7, 1824, x1)
+
+inst_504:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0xb504f332, 0x6, x7, 1832, x1)
+
+inst_505:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x31003330, 0xb504f332, 0x3333333333333334, x7, 1840, x1)
+
+inst_506:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x24046222, 0xb504f332, 0x6666666666666667, x7, 1848, x1)
+
+inst_507:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0xb504f332, -0xb504f332, x7, 1856, x1)
+
+inst_508:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0xb504f330, 0xb504f332, 0xb504f334, x7, 1864, x1)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x5555555555555556, 0x3, x7, 1872, x1)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x5555555555555555, x7, 1880, x1)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x5555555555555556, -0x5555555555555556, x7, 1888, x1)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5555555555555556, 0x5, x7, 1896, x1)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111112, 0x5555555555555556, 0x3333333333333333, x7, 1904, x1)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444446, 0x5555555555555556, 0x6666666666666666, x7, 1912, x1)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x5555555540510444, 0x5555555555555556, -0xb504f333, x7, 1920, x1)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x15045112, 0x5555555555555556, 0xb504f333, x7, 1928, x1)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x5555555555555556, 0x2, x7, 1936, x1)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x5555555555555554, x7, 1944, x1)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x5555555555555556, 0x0, x7, 1952, x1)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x5555555555555556, 0x4, x7, 1960, x1)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111112, 0x5555555555555556, 0x3333333333333332, x7, 1968, x1)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444444, 0x5555555555555556, 0x6666666666666665, x7, 1976, x1)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x15045112, 0x5555555555555556, 0xb504f332, x7, 1984, x1)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x5555555555555556, x7, 1992, x1)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x5555555555555556, -0x5555555555555555, x7, 2000, x1)
+
+inst_526:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x5555555555555556, 0x6, x7, 2008, x1)
+
+inst_527:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111114, 0x5555555555555556, 0x3333333333333334, x7, 2016, x1)
+
+inst_528:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444446, 0x5555555555555556, 0x6666666666666667, x7, 2024, x1)
+
+inst_529:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x5555555540510446, 0x5555555555555556, -0xb504f332, x7, 2032, x1)
+
+inst_530:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x15045114, 0x5555555555555556, 0xb504f334, x7, 2040, x1)
+RVTEST_SIGBASE( x7,signature_x7_2)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x3, -0x5555555555555555, 0x3, x7, 0, x1)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x1, -0x5555555555555555, 0x5555555555555555, x7, 8, x1)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555555, -0x5555555555555556, x7, 16, x1)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x1, -0x5555555555555555, 0x5, x7, 24, x1)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222223, -0x5555555555555555, 0x3333333333333333, x7, 32, x1)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, -0x5555555555555555, 0x6666666666666666, x7, 40, x1)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaa0aaa0889, -0x5555555555555555, -0xb504f333, x7, 48, x1)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0xa000a223, -0x5555555555555555, 0xb504f333, x7, 56, x1)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x5555555555555555, 0x2, x7, 64, x1)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x5555555555555555, 0x5555555555555554, x7, 72, x1)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x5555555555555555, 0x0, x7, 80, x1)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x5555555555555555, 0x4, x7, 88, x1)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, -0x5555555555555555, 0x3333333333333332, x7, 96, x1)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222221, -0x5555555555555555, 0x6666666666666665, x7, 104, x1)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0xa000a222, -0x5555555555555555, 0xb504f332, x7, 112, x1)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x5555555555555555, 0x5555555555555556, x7, 120, x1)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, -0x5555555555555555, x7, 128, x1)
+
+inst_548:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0x5555555555555555, 0x6, x7, 136, x1)
+
+inst_549:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222220, -0x5555555555555555, 0x3333333333333334, x7, 144, x1)
+
+inst_550:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222223, -0x5555555555555555, 0x6666666666666667, x7, 152, x1)
+
+inst_551:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaa0aaa088a, -0x5555555555555555, -0xb504f332, x7, 160, x1)
+
+inst_552:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0xa000a220, -0x5555555555555555, 0xb504f334, x7, 168, x1)
+
+inst_553:
+// rs1_val==6 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, 0x3, x7, 176, x1)
+
+inst_554:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0x5555555555555555, x7, 184, x1)
+
+inst_555:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, -0x5555555555555556, x7, 192, x1)
+
+inst_556:
+// rs1_val==6 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0x5, x7, 200, x1)
+
+inst_557:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, 0x3333333333333333, x7, 208, x1)
+
+inst_558:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x6, 0x6666666666666666, x7, 216, x1)
+
+inst_559:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, -0xb504f333, x7, 224, x1)
+
+inst_560:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, 0xb504f333, x7, 232, x1)
+
+inst_561:
+// rs1_val==6 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, 0x2, x7, 240, x1)
+
+inst_562:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0x5555555555555554, x7, 248, x1)
+
+inst_563:
+// rs1_val==6 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x6, 0x0, x7, 256, x1)
+
+inst_564:
+// rs1_val==6 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0x4, x7, 264, x1)
+
+inst_565:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, 0x3333333333333332, x7, 272, x1)
+
+inst_566:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0x6666666666666665, x7, 280, x1)
+
+inst_567:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, 0xb504f332, x7, 288, x1)
+
+inst_568:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x6, 0x5555555555555556, x7, 296, x1)
+
+inst_569:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6, -0x5555555555555555, x7, 304, x1)
+
+inst_570:
+// rs1_val==6 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x6, 0x6, x7, 312, x1)
+
+inst_571:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0x3333333333333334, x7, 320, x1)
+
+inst_572:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x6, 0x6666666666666667, x7, 328, x1)
+
+inst_573:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x6, -0xb504f332, x7, 336, x1)
+
+inst_574:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6, 0xb504f334, x7, 344, x1)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3333333333333334, 0x3, x7, 352, x1)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111114, 0x3333333333333334, 0x5555555555555555, x7, 360, x1)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222220, 0x3333333333333334, -0x5555555555555556, x7, 368, x1)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x3333333333333334, 0x5, x7, 376, x1)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x3333333333333330, 0x3333333333333334, 0x3333333333333333, x7, 384, x1)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222224, 0x3333333333333334, 0x6666666666666666, x7, 392, x1)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x3333333302330004, 0x3333333333333334, -0xb504f333, x7, 400, x1)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x31003330, 0x3333333333333334, 0xb504f333, x7, 408, x1)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3333333333333334, 0x2, x7, 416, x1)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111114, 0x3333333333333334, 0x5555555555555554, x7, 424, x1)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x3333333333333334, 0x0, x7, 432, x1)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x3333333333333334, 0x4, x7, 440, x1)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x3333333333333330, 0x3333333333333334, 0x3333333333333332, x7, 448, x1)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222224, 0x3333333333333334, 0x6666666666666665, x7, 456, x1)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x31003330, 0x3333333333333334, 0xb504f332, x7, 464, x1)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x1111111111111114, 0x3333333333333334, 0x5555555555555556, x7, 472, x1)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222220, 0x3333333333333334, -0x5555555555555555, x7, 480, x1)
+
+inst_592:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x3333333333333334, 0x6, x7, 488, x1)
+
+inst_593:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x3333333333333334, x7, 496, x1)
+
+inst_594:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222224, 0x3333333333333334, 0x6666666666666667, x7, 504, x1)
+
+inst_595:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x3333333302330004, 0x3333333333333334, -0xb504f332, x7, 512, x1)
+
+inst_596:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x31003334, 0x3333333333333334, 0xb504f334, x7, 520, x1)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x3, 0x6666666666666667, 0x3, x7, 528, x1)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444445, 0x6666666666666667, 0x5555555555555555, x7, 536, x1)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, 0x6666666666666667, -0x5555555555555556, x7, 544, x1)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x5, 0x6666666666666667, 0x5, x7, 552, x1)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222223, 0x6666666666666667, 0x3333333333333333, x7, 560, x1)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x6666666666666666, 0x6666666666666667, 0x6666666666666666, x7, 568, x1)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x6666666642620445, 0x6666666666666667, -0xb504f333, x7, 576, x1)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x24046223, 0x6666666666666667, 0xb504f333, x7, 584, x1)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, 0x6666666666666667, 0x2, x7, 592, x1)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444444, 0x6666666666666667, 0x5555555555555554, x7, 600, x1)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x6666666666666667, 0x0, x7, 608, x1)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0x6666666666666667, 0x4, x7, 616, x1)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222222, 0x6666666666666667, 0x3333333333333332, x7, 624, x1)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x6666666666666665, 0x6666666666666667, 0x6666666666666665, x7, 632, x1)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x24046222, 0x6666666666666667, 0xb504f332, x7, 640, x1)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x4444444444444446, 0x6666666666666667, 0x5555555555555556, x7, 648, x1)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222223, 0x6666666666666667, -0x5555555555555555, x7, 656, x1)
+
+inst_614:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x6, 0x6666666666666667, 0x6, x7, 664, x1)
+
+inst_615:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x2222222222222224, 0x6666666666666667, 0x3333333333333334, x7, 672, x1)
+
+inst_616:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x6666666666666667, x7, 680, x1)
+
+inst_617:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x6666666642620446, 0x6666666666666667, -0xb504f332, x7, 688, x1)
+
+inst_618:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x24046224, 0x6666666666666667, 0xb504f334, x7, 696, x1)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0xb504f332, 0x3, x7, 704, x1)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x5555555540510444, -0xb504f332, 0x5555555555555555, x7, 712, x1)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaa0aaa088a, -0xb504f332, -0x5555555555555556, x7, 720, x1)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb504f332, 0x5, x7, 728, x1)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x3333333302330002, -0xb504f332, 0x3333333333333333, x7, 736, x1)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x6666666642620446, -0xb504f332, 0x6666666666666666, x7, 744, x1)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0xffffffff4afb0ccc, -0xb504f332, -0xb504f333, x7, 752, x1)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0xb504f332, 0xb504f333, x7, 760, x1)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0xb504f332, 0x2, x7, 768, x1)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x5555555540510444, -0xb504f332, 0x5555555555555554, x7, 776, x1)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0xb504f332, 0x0, x7, 784, x1)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb504f332, 0x4, x7, 792, x1)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x3333333302330002, -0xb504f332, 0x3333333333333332, x7, 800, x1)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x6666666642620444, -0xb504f332, 0x6666666666666665, x7, 808, x1)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x2, -0xb504f332, 0xb504f332, x7, 816, x1)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x5555555540510446, -0xb504f332, 0x5555555555555556, x7, 824, x1)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0xaaaaaaaa0aaa088a, -0xb504f332, -0x5555555555555555, x7, 832, x1)
+
+inst_636:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x6, -0xb504f332, 0x6, x7, 840, x1)
+
+inst_637:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x3333333302330004, -0xb504f332, 0x3333333333333334, x7, 848, x1)
+
+inst_638:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x6666666642620446, -0xb504f332, 0x6666666666666667, x7, 856, x1)
+
+inst_639:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0xffffffff4afb0cce, -0xb504f332, -0xb504f332, x7, 864, x1)
+
+inst_640:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0x4, -0xb504f332, 0xb504f334, x7, 872, x1)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb504f334, 0x3, x7, 880, x1)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x15045114, 0xb504f334, 0x5555555555555555, x7, 888, x1)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0xa000a220, 0xb504f334, -0x5555555555555556, x7, 896, x1)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0xb504f334, 0x5, x7, 904, x1)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_RR_OP(and, x12, x10, x11, 0x31003330, 0xb504f334, 0x3333333333333333, x7, 912, x1)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_RR_OP(and, x12, x10, x11, 0x24046224, 0xb504f334, 0x6666666666666666, x7, 920, x1)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0xb504f334, -0xb504f333, x7, 928, x1)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f333
+TEST_RR_OP(and, x12, x10, x11, 0xb504f330, 0xb504f334, 0xb504f333, x7, 936, x1)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x2
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb504f334, 0x2, x7, 944, x1)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x15045114, 0xb504f334, 0x5555555555555554, x7, 952, x1)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0xb504f334, 0x0, x7, 960, x1)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0xb504f334, 0x4, x7, 968, x1)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x31003330, 0xb504f334, 0x3333333333333332, x7, 976, x1)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x24046224, 0xb504f334, 0x6666666666666665, x7, 984, x1)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0xb504f330, 0xb504f334, 0xb504f332, x7, 992, x1)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x15045114, 0xb504f334, 0x5555555555555556, x7, 1000, x1)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0xa000a220, 0xb504f334, -0x5555555555555555, x7, 1008, x1)
+
+inst_658:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0xb504f334, 0x6, x7, 1016, x1)
+
+inst_659:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x31003334, 0xb504f334, 0x3333333333333334, x7, 1024, x1)
+
+inst_660:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x24046224, 0xb504f334, 0x6666666666666667, x7, 1032, x1)
+
+inst_661:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x4, 0xb504f334, -0xb504f332, x7, 1040, x1)
+
+inst_662:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f334
+TEST_RR_OP(and, x12, x10, x11, 0xb504f334, 0xb504f334, 0xb504f334, x7, 1048, x1)
+
+inst_663:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555554
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x5555555555555554, x7, 1056, x1)
+
+inst_664:
+// rs1_val==0 and rs2_val==0,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x0, x7, 1064, x1)
+
+inst_665:
+// rs1_val==0 and rs2_val==4,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x4, x7, 1072, x1)
+
+inst_666:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333332
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x3333333333333332, x7, 1080, x1)
+
+inst_667:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666665
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x6666666666666665, x7, 1088, x1)
+
+inst_668:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f332
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0xb504f332, x7, 1096, x1)
+
+inst_669:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555556
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x5555555555555556, x7, 1104, x1)
+
+inst_670:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555555
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, -0x5555555555555555, x7, 1112, x1)
+
+inst_671:
+// rs1_val==0 and rs2_val==6,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x6, x7, 1120, x1)
+
+inst_672:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333334
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x3333333333333334, x7, 1128, x1)
+
+inst_673:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666667
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x0, 0x6666666666666667, x7, 1136, x1)
+
+inst_674:
+// rs1_val < 0 and rs2_val < 0, rs2_val == -134217729, rs1_val == -274877906945
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:-0x8000001
+TEST_RR_OP(and, x12, x10, x11, 0xffffffbff7ffffff, -0x4000000001, -0x8000001, x7, 1144, x1)
+
+inst_675:
+// rs2_val == 1, rs1_val == 33554432
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x1
+TEST_RR_OP(and, x12, x10, x11, 0x0, 0x2000000, 0x1, x7, 1152, x1)
+
+inst_676:
+// rs2_val == 8,
+// opcode: and ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000000; op2val:0x8
+TEST_RR_OP(and, x12, x10, x11, 0x0, -0x4000000000000000, 0x8, x7, 1160, x1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x13_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x13_1:
+ .fill 19*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_2:
+ .fill 146*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/andi-01.S b/riscof/suite/rv64i_m/I/andi-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..bcaaca9ee31f1f87a79389f89518e0a6bd55ffe3
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/andi-01.S
@@ -0,0 +1,3179 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the andi instruction of the RISC-V I extension for the andi covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",andi)
+
+RVTEST_SIGBASE( x5,signature_x5_1)
+
+inst_0:
+// rs1 == rd, rs1==x18, rd==x18, imm_val == (-2**(12-1)), imm_val == -2048, rs1_val != imm_val, rs1_val < 0 and imm_val < 0, rs1_val == -257
+// opcode: andi ; op1:x18; dest:x18; op1val:-0x101; immval:-0x800
+TEST_IMM_OP( andi, x18, x18, 0xfffffffffffff800, -0x101, -0x800, x5, 0, x11)
+
+inst_1:
+// rs1 != rd, rs1==x8, rd==x17, imm_val == 0, rs1_val == -65537
+// opcode: andi ; op1:x8; dest:x17; op1val:-0x10001; immval:0x0
+TEST_IMM_OP( andi, x17, x8, 0x0, -0x10001, 0x0, x5, 8, x11)
+
+inst_2:
+// rs1==x19, rd==x10, imm_val == (2**(12-1)-1), rs1_val == 1024, rs1_val > 0 and imm_val > 0, imm_val == 2047
+// opcode: andi ; op1:x19; dest:x10; op1val:0x400; immval:0x7ff
+TEST_IMM_OP( andi, x10, x19, 0x400, 0x400, 0x7ff, x5, 16, x11)
+
+inst_3:
+// rs1==x20, rd==x1, imm_val == 1, rs1_val == 4096
+// opcode: andi ; op1:x20; dest:x1; op1val:0x1000; immval:0x1
+TEST_IMM_OP( andi, x1, x20, 0x0, 0x1000, 0x1, x5, 24, x11)
+
+inst_4:
+// rs1==x22, rd==x31, rs1_val == (-2**(xlen-1)), rs1_val < 0 and imm_val > 0, rs1_val == -9223372036854775808
+// opcode: andi ; op1:x22; dest:x31; op1val:-0x8000000000000000; immval:0x554
+TEST_IMM_OP( andi, x31, x22, 0x0, -0x8000000000000000, 0x554, x5, 32, x11)
+
+inst_5:
+// rs1==x3, rd==x24, rs1_val == 0, rs1_val==0 and imm_val==45
+// opcode: andi ; op1:x3; dest:x24; op1val:0x0; immval:0x2d
+TEST_IMM_OP( andi, x24, x3, 0x0, 0x0, 0x2d, x5, 40, x11)
+
+inst_6:
+// rs1==x6, rd==x2, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, imm_val == 512
+// opcode: andi ; op1:x6; dest:x2; op1val:0x7fffffffffffffff; immval:0x200
+TEST_IMM_OP( andi, x2, x6, 0x200, 0x7fffffffffffffff, 0x200, x5, 48, x11)
+
+inst_7:
+// rs1==x1, rd==x7, rs1_val == 1, rs1_val > 0 and imm_val < 0, imm_val == -33
+// opcode: andi ; op1:x1; dest:x7; op1val:0x1; immval:-0x21
+TEST_IMM_OP( andi, x7, x1, 0x1, 0x1, -0x21, x5, 56, x11)
+
+inst_8:
+// rs1==x31, rd==x29, rs1_val == imm_val, rs1_val==0 and imm_val==0
+// opcode: andi ; op1:x31; dest:x29; op1val:0x0; immval:0x0
+TEST_IMM_OP( andi, x29, x31, 0x0, 0x0, 0x0, x5, 64, x11)
+
+inst_9:
+// rs1==x23, rd==x26, imm_val == 2, rs1_val == -17
+// opcode: andi ; op1:x23; dest:x26; op1val:-0x11; immval:0x2
+TEST_IMM_OP( andi, x26, x23, 0x2, -0x11, 0x2, x5, 72, x11)
+
+inst_10:
+// rs1==x9, rd==x27, imm_val == 4,
+// opcode: andi ; op1:x9; dest:x27; op1val:0x1000; immval:0x4
+TEST_IMM_OP( andi, x27, x9, 0x0, 0x1000, 0x4, x5, 80, x11)
+
+inst_11:
+// rs1==x2, rd==x20, imm_val == 8, rs1_val == -288230376151711745
+// opcode: andi ; op1:x2; dest:x20; op1val:-0x400000000000001; immval:0x8
+TEST_IMM_OP( andi, x20, x2, 0x8, -0x400000000000001, 0x8, x5, 88, x11)
+
+inst_12:
+// rs1==x13, rd==x21, imm_val == 16, rs1_val == 2199023255552
+// opcode: andi ; op1:x13; dest:x21; op1val:0x20000000000; immval:0x10
+TEST_IMM_OP( andi, x21, x13, 0x0, 0x20000000000, 0x10, x5, 96, x11)
+
+inst_13:
+// rs1==x15, rd==x28, imm_val == 32, rs1_val == 16
+// opcode: andi ; op1:x15; dest:x28; op1val:0x10; immval:0x20
+TEST_IMM_OP( andi, x28, x15, 0x0, 0x10, 0x20, x5, 104, x11)
+
+inst_14:
+// rs1==x21, rd==x30, imm_val == 64,
+// opcode: andi ; op1:x21; dest:x30; op1val:0x7fffffffffffffff; immval:0x40
+TEST_IMM_OP( andi, x30, x21, 0x40, 0x7fffffffffffffff, 0x40, x5, 112, x11)
+
+inst_15:
+// rs1==x30, rd==x13, imm_val == 128, rs1_val == -4194305
+// opcode: andi ; op1:x30; dest:x13; op1val:-0x400001; immval:0x80
+TEST_IMM_OP( andi, x13, x30, 0x80, -0x400001, 0x80, x5, 120, x11)
+
+inst_16:
+// rs1==x26, rd==x22, imm_val == 256, rs1_val == 1125899906842624
+// opcode: andi ; op1:x26; dest:x22; op1val:0x4000000000000; immval:0x100
+TEST_IMM_OP( andi, x22, x26, 0x0, 0x4000000000000, 0x100, x5, 128, x11)
+
+inst_17:
+// rs1==x29, rd==x4, imm_val == 1024,
+// opcode: andi ; op1:x29; dest:x4; op1val:0x6666666666666665; immval:0x400
+TEST_IMM_OP( andi, x4, x29, 0x400, 0x6666666666666665, 0x400, x5, 136, x11)
+
+inst_18:
+// rs1==x25, rd==x0, imm_val == -2,
+// opcode: andi ; op1:x25; dest:x0; op1val:0x5555555555555554; immval:-0x2
+TEST_IMM_OP( andi, x0, x25, 0, 0x5555555555555554, -0x2, x5, 144, x11)
+
+inst_19:
+// rs1==x12, rd==x23, imm_val == -3, rs1_val == 137438953472
+// opcode: andi ; op1:x12; dest:x23; op1val:0x2000000000; immval:-0x3
+TEST_IMM_OP( andi, x23, x12, 0x2000000000, 0x2000000000, -0x3, x5, 152, x11)
+
+inst_20:
+// rs1==x24, rd==x6, imm_val == -5, rs1_val == -2199023255553
+// opcode: andi ; op1:x24; dest:x6; op1val:-0x20000000001; immval:-0x5
+TEST_IMM_OP( andi, x6, x24, 0xfffffdfffffffffb, -0x20000000001, -0x5, x5, 160, x2)
+
+inst_21:
+// rs1==x7, rd==x11, imm_val == -9,
+// opcode: andi ; op1:x7; dest:x11; op1val:0x6666666666666665; immval:-0x9
+TEST_IMM_OP( andi, x11, x7, 0x6666666666666665, 0x6666666666666665, -0x9, x5, 168, x2)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_22:
+// rs1==x28, rd==x25, imm_val == -17, rs1_val == 6148914691236517205
+// opcode: andi ; op1:x28; dest:x25; op1val:0x5555555555555555; immval:-0x11
+TEST_IMM_OP( andi, x25, x28, 0x5555555555555545, 0x5555555555555555, -0x11, x1, 0, x2)
+
+inst_23:
+// rs1==x27, rd==x5, imm_val == -65, rs1_val == 8
+// opcode: andi ; op1:x27; dest:x5; op1val:0x8; immval:-0x41
+TEST_IMM_OP( andi, x5, x27, 0x8, 0x8, -0x41, x1, 8, x2)
+
+inst_24:
+// rs1==x16, rd==x19, imm_val == -129, rs1_val == -4398046511105
+// opcode: andi ; op1:x16; dest:x19; op1val:-0x40000000001; immval:-0x81
+TEST_IMM_OP( andi, x19, x16, 0xfffffbffffffff7f, -0x40000000001, -0x81, x1, 16, x2)
+
+inst_25:
+// rs1==x10, rd==x3, imm_val == -257, rs1_val == 4611686018427387904
+// opcode: andi ; op1:x10; dest:x3; op1val:0x4000000000000000; immval:-0x101
+TEST_IMM_OP( andi, x3, x10, 0x4000000000000000, 0x4000000000000000, -0x101, x1, 24, x2)
+
+inst_26:
+// rs1==x0, rd==x16, imm_val == -513, rs1_val == -262145
+// opcode: andi ; op1:x0; dest:x16; op1val:0x0; immval:-0x201
+TEST_IMM_OP( andi, x16, x0, 0x0, 0x0, -0x201, x1, 32, x2)
+
+inst_27:
+// rs1==x17, rd==x9, imm_val == -1025,
+// opcode: andi ; op1:x17; dest:x9; op1val:0x3333333333333332; immval:-0x401
+TEST_IMM_OP( andi, x9, x17, 0x3333333333333332, 0x3333333333333332, -0x401, x1, 40, x2)
+
+inst_28:
+// rs1==x14, rd==x12, imm_val == 1365, rs1_val==3037000500 and imm_val==1365
+// opcode: andi ; op1:x14; dest:x12; op1val:0xb504f334; immval:0x555
+TEST_IMM_OP( andi, x12, x14, 0x114, 0xb504f334, 0x555, x1, 48, x2)
+
+inst_29:
+// rs1==x5, rd==x15, imm_val == -1366, rs1_val == -18014398509481985
+// opcode: andi ; op1:x5; dest:x15; op1val:-0x40000000000001; immval:-0x556
+TEST_IMM_OP( andi, x15, x5, 0xffbffffffffffaaa, -0x40000000000001, -0x556, x1, 56, x2)
+
+inst_30:
+// rs1==x11, rd==x8, rs1_val == 2, rs1_val==2 and imm_val==-1365
+// opcode: andi ; op1:x11; dest:x8; op1val:0x2; immval:-0x555
+TEST_IMM_OP( andi, x8, x11, 0x2, 0x2, -0x555, x1, 64, x2)
+
+inst_31:
+// rs1==x4, rd==x14, rs1_val == 4,
+// opcode: andi ; op1:x4; dest:x14; op1val:0x4; immval:-0x800
+TEST_IMM_OP( andi, x14, x4, 0x0, 0x4, -0x800, x1, 72, x2)
+
+inst_32:
+// rs1_val == 32,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x20; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x20, 0x555, x1, 80, x2)
+
+inst_33:
+// rs1_val == 64,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x40; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x40, 0x0, x1, 88, x2)
+
+inst_34:
+// rs1_val == 128,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x80; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x80, 0x666, x1, 96, x2)
+
+inst_35:
+// rs1_val == 256,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x100; immval:-0xa
+TEST_IMM_OP( andi, x11, x10, 0x100, 0x100, -0xa, x1, 104, x2)
+
+inst_36:
+// rs1_val == 512,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x200; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x200, 0x2, x1, 112, x2)
+
+inst_37:
+// rs1_val == 2048,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x800; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x800, 0x800, -0x556, x1, 120, x2)
+
+inst_38:
+// rs1_val == 8192,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2000; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2000, 0x333, x1, 128, x2)
+
+inst_39:
+// rs1_val == 16384,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4000; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4000, 0x554, x1, 136, x2)
+
+inst_40:
+// rs1_val == 32768,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x8000; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x8000, 0x556, x1, 144, x2)
+
+inst_41:
+// rs1_val == 65536,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x10000; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x10000, 0x2, x1, 152, x2)
+
+inst_42:
+// rs1_val == 131072,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x20000; immval:-0x3
+TEST_IMM_OP( andi, x11, x10, 0x20000, 0x20000, -0x3, x1, 160, x2)
+
+inst_43:
+// rs1_val == 262144,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x40000; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x40000, 0x0, x1, 168, x2)
+
+inst_44:
+// rs1_val == 524288,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x80000; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x80000, 0x0, x1, 176, x2)
+
+inst_45:
+// rs1_val == 1048576,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x100000; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x100000, 0x100000, -0x2c, x1, 184, x2)
+
+inst_46:
+// rs1_val == 2097152,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x200000; immval:-0x5
+TEST_IMM_OP( andi, x11, x10, 0x200000, 0x200000, -0x5, x1, 192, x2)
+
+inst_47:
+// rs1_val == 4194304,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x400000; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x400000, 0x6, x1, 200, x2)
+
+inst_48:
+// rs1_val == 8388608,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x800000; immval:-0x2
+TEST_IMM_OP( andi, x11, x10, 0x800000, 0x800000, -0x2, x1, 208, x2)
+
+inst_49:
+// rs1_val == 16777216,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x1000000; immval:-0x9
+TEST_IMM_OP( andi, x11, x10, 0x1000000, 0x1000000, -0x9, x1, 216, x2)
+
+inst_50:
+// rs1_val == 33554432,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2000000; immval:0x7
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2000000, 0x7, x1, 224, x2)
+
+inst_51:
+// rs1_val == 67108864,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4000000; immval:0x7
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4000000, 0x7, x1, 232, x2)
+
+inst_52:
+// rs1_val == 134217728,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x8000000; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x8000000, 0x555, x1, 240, x2)
+
+inst_53:
+// rs1_val == 268435456,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x10000000; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x10000000, 0x554, x1, 248, x2)
+
+inst_54:
+// rs1_val == 536870912,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x20000000; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x20000000, 0x333, x1, 256, x2)
+
+inst_55:
+// rs1_val == 1073741824,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x40000000; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x40000000, 0x40000000, -0x555, x1, 264, x2)
+
+inst_56:
+// rs1_val == 2147483648,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x80000000; immval:-0x7
+TEST_IMM_OP( andi, x11, x10, 0x80000000, 0x80000000, -0x7, x1, 272, x2)
+
+inst_57:
+// rs1_val == 4294967296,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x100000000; immval:0x80
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x100000000, 0x80, x1, 280, x2)
+
+inst_58:
+// rs1_val == 8589934592,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x200000000; immval:0x9
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x200000000, 0x9, x1, 288, x2)
+
+inst_59:
+// rs1_val == 17179869184,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x400000000; immval:-0x3
+TEST_IMM_OP( andi, x11, x10, 0x400000000, 0x400000000, -0x3, x1, 296, x2)
+
+inst_60:
+// rs1_val == 34359738368,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x800000000; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x800000000, 0x4, x1, 304, x2)
+
+inst_61:
+// rs1_val == 68719476736,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x1000000000; immval:-0x3
+TEST_IMM_OP( andi, x11, x10, 0x1000000000, 0x1000000000, -0x3, x1, 312, x2)
+
+inst_62:
+// rs1_val == 274877906944,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4000000000; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4000000000, 0x0, x1, 320, x2)
+
+inst_63:
+// rs1_val == 549755813888,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x8000000000; immval:0x10
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x8000000000, 0x10, x1, 328, x2)
+
+inst_64:
+// rs1_val == 1099511627776,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x10000000000; immval:0x3ff
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x10000000000, 0x3ff, x1, 336, x2)
+
+inst_65:
+// rs1_val == 4398046511104,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x40000000000; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x40000000000, 0x40000000000, -0x555, x1, 344, x2)
+
+inst_66:
+// rs1_val == 8796093022208,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x80000000000; immval:0x40
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x80000000000, 0x40, x1, 352, x2)
+
+inst_67:
+// rs1_val == 17592186044416,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x100000000000; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x100000000000, 0x100000000000, -0x2c, x1, 360, x2)
+
+inst_68:
+// rs1_val == 35184372088832,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x200000000000; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x200000000000, 0x667, x1, 368, x2)
+
+inst_69:
+// rs1_val == 70368744177664,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x400000000000; immval:0x7
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x400000000000, 0x7, x1, 376, x2)
+
+inst_70:
+// rs1_val == 140737488355328,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x800000000000; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x800000000000, 0x555, x1, 384, x2)
+
+inst_71:
+// rs1_val == 281474976710656,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x1000000000000; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x1000000000000, 0x3, x1, 392, x2)
+
+inst_72:
+// rs1_val == 562949953421312,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2000000000000; immval:-0x4
+TEST_IMM_OP( andi, x11, x10, 0x2000000000000, 0x2000000000000, -0x4, x1, 400, x2)
+
+inst_73:
+// rs1_val == 2251799813685248,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x8000000000000; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x8000000000000, 0x5, x1, 408, x2)
+
+inst_74:
+// rs1_val == 4503599627370496,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x10000000000000; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x10000000000000, 0x333, x1, 416, x2)
+
+inst_75:
+// rs1_val == 9007199254740992,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x20000000000000; immval:0x8
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x20000000000000, 0x8, x1, 424, x2)
+
+inst_76:
+// rs1_val == 18014398509481984,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x40000000000000; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x40000000000000, 0x0, x1, 432, x2)
+
+inst_77:
+// rs1_val == 36028797018963968,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x80000000000000; immval:-0x400
+TEST_IMM_OP( andi, x11, x10, 0x80000000000000, 0x80000000000000, -0x400, x1, 440, x2)
+
+inst_78:
+// rs1_val == 72057594037927936,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x100000000000000; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x100000000000000, 0x0, x1, 448, x2)
+
+inst_79:
+// rs1_val == 144115188075855872,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x200000000000000; immval:-0xa
+TEST_IMM_OP( andi, x11, x10, 0x200000000000000, 0x200000000000000, -0xa, x1, 456, x2)
+
+inst_80:
+// rs1_val == 288230376151711744,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x400000000000000; immval:0x400
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x400000000000000, 0x400, x1, 464, x2)
+
+inst_81:
+// rs1_val == 576460752303423488,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x800000000000000; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x800000000000000, 0x2, x1, 472, x2)
+
+inst_82:
+// rs1_val == 1152921504606846976,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x1000000000000000; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x1000000000000000, 0x1000000000000000, -0x556, x1, 480, x2)
+
+inst_83:
+// rs1_val == 2305843009213693952,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2000000000000000; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2000000000000000, 0x667, x1, 488, x2)
+
+inst_84:
+// rs1_val == -2,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x2; immval:0x7
+TEST_IMM_OP( andi, x11, x10, 0x6, -0x2, 0x7, x1, 496, x2)
+
+inst_85:
+// rs1_val == -3,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x3; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x330, -0x3, 0x332, x1, 504, x2)
+
+inst_86:
+// rs1_val == -5,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x5, 0x4, x1, 512, x2)
+
+inst_87:
+// rs1_val == -9,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x9; immval:0x7
+TEST_IMM_OP( andi, x11, x10, 0x7, -0x9, 0x7, x1, 520, x2)
+
+inst_88:
+// rs1_val == -33,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x21; immval:-0x4
+TEST_IMM_OP( andi, x11, x10, 0xffffffffffffffdc, -0x21, -0x4, x1, 528, x2)
+
+inst_89:
+// rs1_val == -65,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x41; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x626, -0x41, 0x666, x1, 536, x2)
+
+inst_90:
+// rs1_val == -129,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x81; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x81, 0x0, x1, 544, x2)
+
+inst_91:
+// rs1_val == -513,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x201; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x467, -0x201, 0x667, x1, 552, x2)
+
+inst_92:
+// rs1_val == -1025,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x401; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x401, 0x2, x1, 560, x2)
+
+inst_93:
+// rs1_val == -2049,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x801; immval:0x7
+TEST_IMM_OP( andi, x11, x10, 0x7, -0x801, 0x7, x1, 568, x2)
+
+inst_94:
+// rs1_val == -4097,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x1001; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x1001, 0x0, x1, 576, x2)
+
+inst_95:
+// rs1_val == -8193,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x2001; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, -0x2001, 0x5, x1, 584, x2)
+
+inst_96:
+// rs1_val == -16385,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x4001; immval:0x3ff
+TEST_IMM_OP( andi, x11, x10, 0x3ff, -0x4001, 0x3ff, x1, 592, x2)
+
+inst_97:
+// rs1_val == -32769,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x8001; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x8001, 0x0, x1, 600, x2)
+
+inst_98:
+// rs1_val == -131073,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x20001; immval:-0x7
+TEST_IMM_OP( andi, x11, x10, 0xfffffffffffdfff9, -0x20001, -0x7, x1, 608, x2)
+
+inst_99:
+// rs1_val == -524289,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x80001; immval:-0x3
+TEST_IMM_OP( andi, x11, x10, 0xfffffffffff7fffd, -0x80001, -0x3, x1, 616, x2)
+
+inst_100:
+// rs1_val == -1048577,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x100001; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x334, -0x100001, 0x334, x1, 624, x2)
+
+inst_101:
+// rs1_val == -2097153,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x200001; immval:-0xa
+TEST_IMM_OP( andi, x11, x10, 0xffffffffffdffff6, -0x200001, -0xa, x1, 632, x2)
+
+inst_102:
+// rs1_val == -8388609,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x800001; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x800001, 0x2, x1, 640, x2)
+
+inst_103:
+// rs1_val == -16777217,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x1000001; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x1000001, 0x0, x1, 648, x2)
+
+inst_104:
+// rs1_val == -33554433,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x2000001; immval:0x8
+TEST_IMM_OP( andi, x11, x10, 0x8, -0x2000001, 0x8, x1, 656, x2)
+
+inst_105:
+// rs1_val == -67108865,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x4000001; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x332, -0x4000001, 0x332, x1, 664, x2)
+
+inst_106:
+// rs1_val == -134217729,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x8000001; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xfffffffff7ffffd3, -0x8000001, -0x2d, x1, 672, x2)
+
+inst_107:
+// rs1_val == -268435457,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x10000001; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, -0x10000001, 0x5, x1, 680, x2)
+
+inst_108:
+// rs1_val == -536870913,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x20000001; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x20000001, 0x0, x1, 688, x2)
+
+inst_109:
+// rs1_val == -1073741825,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x40000001; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xffffffffbfffffd3, -0x40000001, -0x2d, x1, 696, x2)
+
+inst_110:
+// rs1_val == -2147483649,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x80000001; immval:0x3ff
+TEST_IMM_OP( andi, x11, x10, 0x3ff, -0x80000001, 0x3ff, x1, 704, x2)
+
+inst_111:
+// rs1_val == -4294967297,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x100000001; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x6, -0x100000001, 0x6, x1, 712, x2)
+
+inst_112:
+// rs1_val == -8589934593,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x200000001; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x556, -0x200000001, 0x556, x1, 720, x2)
+
+inst_113:
+// rs1_val == -17179869185,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x400000001; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xfffffffbfffffaaa, -0x400000001, -0x556, x1, 728, x2)
+
+inst_114:
+// rs1_val == -34359738369,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x800000001; immval:0x20
+TEST_IMM_OP( andi, x11, x10, 0x20, -0x800000001, 0x20, x1, 736, x2)
+
+inst_115:
+// rs1_val == -68719476737,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x1000000001; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xffffffefffffffd3, -0x1000000001, -0x2d, x1, 744, x2)
+
+inst_116:
+// rs1_val == -137438953473,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x2000000001; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, -0x2000000001, 0x4, x1, 752, x2)
+
+inst_117:
+// rs1_val == -274877906945,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x4000000001; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x2d, -0x4000000001, 0x2d, x1, 760, x2)
+
+inst_118:
+// rs1_val == -549755813889,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x8000000001; immval:0x20
+TEST_IMM_OP( andi, x11, x10, 0x20, -0x8000000001, 0x20, x1, 768, x2)
+
+inst_119:
+// rs1_val == -1099511627777,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x10000000001; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xfffffeffffffffd4, -0x10000000001, -0x2c, x1, 776, x2)
+
+inst_120:
+// rs1_val == -8796093022209,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x80000000001; immval:-0x5
+TEST_IMM_OP( andi, x11, x10, 0xfffff7fffffffffb, -0x80000000001, -0x5, x1, 784, x2)
+
+inst_121:
+// rs1_val == -17592186044417,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x100000000001; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xffffefffffffffd4, -0x100000000001, -0x2c, x1, 792, x2)
+
+inst_122:
+// rs1_val == -35184372088833,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x200000000001; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xffffdfffffffffd4, -0x200000000001, -0x2c, x1, 800, x2)
+
+inst_123:
+// rs1_val == -70368744177665,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x400000000001; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x2c, -0x400000000001, 0x2c, x1, 808, x2)
+
+inst_124:
+// rs1_val == -140737488355329,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x800000000001; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x555, -0x800000000001, 0x555, x1, 816, x2)
+
+inst_125:
+// rs1_val == -281474976710657,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x1000000000001; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x334, -0x1000000000001, 0x334, x1, 824, x2)
+
+inst_126:
+// rs1_val == -562949953421313,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x2000000000001; immval:-0x41
+TEST_IMM_OP( andi, x11, x10, 0xfffdffffffffffbf, -0x2000000000001, -0x41, x1, 832, x2)
+
+inst_127:
+// rs1_val == -1125899906842625,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x4000000000001; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xfffbffffffffffd4, -0x4000000000001, -0x2c, x1, 840, x2)
+
+inst_128:
+// rs1_val == -2251799813685249,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x8000000000001; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xfff7ffffffffffd4, -0x8000000000001, -0x2c, x1, 848, x2)
+
+inst_129:
+// rs1_val == -4503599627370497,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x10000000000001; immval:-0x401
+TEST_IMM_OP( andi, x11, x10, 0xffeffffffffffbff, -0x10000000000001, -0x401, x1, 856, x2)
+
+inst_130:
+// rs1_val == -9007199254740993,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x20000000000001; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xffdfffffffffffd3, -0x20000000000001, -0x2d, x1, 864, x2)
+
+inst_131:
+// rs1_val == -36028797018963969,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x80000000000001; immval:-0x5
+TEST_IMM_OP( andi, x11, x10, 0xff7ffffffffffffb, -0x80000000000001, -0x5, x1, 872, x2)
+
+inst_132:
+// rs1_val == -72057594037927937,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x100000000000001; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x332, -0x100000000000001, 0x332, x1, 880, x2)
+
+inst_133:
+// rs1_val == -144115188075855873,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x200000000000001; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x3, -0x200000000000001, 0x3, x1, 888, x2)
+
+inst_134:
+// rs1_val == -576460752303423489,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x800000000000001; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x800000000000001, 0x0, x1, 896, x2)
+
+inst_135:
+// rs1_val == -1152921504606846977,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x1000000000000001; immval:0x80
+TEST_IMM_OP( andi, x11, x10, 0x80, -0x1000000000000001, 0x80, x1, 904, x2)
+
+inst_136:
+// rs1_val == -2305843009213693953,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x2000000000000001; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, -0x2000000000000001, 0x4, x1, 912, x2)
+
+inst_137:
+// rs1_val == -4611686018427387905,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x4000000000000001; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x556, -0x4000000000000001, 0x556, x1, 920, x2)
+
+inst_138:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206 and imm_val==0
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x5555555555555556, 0x0, x1, 928, x2)
+
+inst_139:
+// rs1_val==3 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x3, 0x3, x1, 936, x2)
+
+inst_140:
+// rs1_val==3 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x3, 0x555, x1, 944, x2)
+
+inst_141:
+// rs1_val==3 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, -0x556, x1, 952, x2)
+
+inst_142:
+// rs1_val==3 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x3, 0x5, x1, 960, x2)
+
+inst_143:
+// rs1_val==3 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x3, 0x333, x1, 968, x2)
+
+inst_144:
+// rs1_val==3 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, 0x666, x1, 976, x2)
+
+inst_145:
+// rs1_val==3 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x3, -0x2d, x1, 984, x2)
+
+inst_146:
+// rs1_val==3 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x3, 0x2d, x1, 992, x2)
+
+inst_147:
+// rs1_val==3 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, 0x2, x1, 1000, x2)
+
+inst_148:
+// rs1_val==3 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3, 0x554, x1, 1008, x2)
+
+inst_149:
+// rs1_val==3 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3, 0x0, x1, 1016, x2)
+
+inst_150:
+// rs1_val==3 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3, 0x4, x1, 1024, x2)
+
+inst_151:
+// rs1_val==3 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, 0x332, x1, 1032, x2)
+
+inst_152:
+// rs1_val==3 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x3, 0x665, x1, 1040, x2)
+
+inst_153:
+// rs1_val==3 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3, 0x2c, x1, 1048, x2)
+
+inst_154:
+// rs1_val==3 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, 0x556, x1, 1056, x2)
+
+inst_155:
+// rs1_val==3 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x3, -0x555, x1, 1064, x2)
+
+inst_156:
+// rs1_val==3 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, 0x6, x1, 1072, x2)
+
+inst_157:
+// rs1_val==3 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3, 0x334, x1, 1080, x2)
+
+inst_158:
+// rs1_val==3 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x3, 0x667, x1, 1088, x2)
+
+inst_159:
+// rs1_val==3 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3, -0x2c, x1, 1096, x2)
+
+inst_160:
+// rs1_val==3 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3, 0x2e, x1, 1104, x2)
+
+inst_161:
+// rs1_val==6148914691236517205 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x5555555555555555, 0x3, x1, 1112, x2)
+
+inst_162:
+// rs1_val==6148914691236517205 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x555, 0x5555555555555555, 0x555, x1, 1120, x2)
+
+inst_163:
+// rs1_val==6148914691236517205 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x5555555555555000, 0x5555555555555555, -0x556, x1, 1128, x2)
+
+inst_164:
+// rs1_val==6148914691236517205 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x5555555555555555, 0x5, x1, 1136, x2)
+
+inst_165:
+// rs1_val==6148914691236517205 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x111, 0x5555555555555555, 0x333, x1, 1144, x2)
+
+inst_166:
+// rs1_val==6148914691236517205 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x5555555555555555, 0x666, x1, 1152, x2)
+
+inst_167:
+// rs1_val==6148914691236517205 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x5555555555555551, 0x5555555555555555, -0x2d, x1, 1160, x2)
+
+inst_168:
+// rs1_val==6148914691236517205 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x5555555555555555, 0x2d, x1, 1168, x2)
+
+inst_169:
+// rs1_val==6148914691236517205 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5555555555555555, 0x2, x1, 1176, x2)
+
+inst_170:
+// rs1_val==6148914691236517205 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x5555555555555555, 0x554, x1, 1184, x2)
+
+inst_171:
+// rs1_val==6148914691236517205 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5555555555555555, 0x0, x1, 1192, x2)
+
+inst_172:
+// rs1_val==6148914691236517205 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555555, 0x4, x1, 1200, x2)
+
+inst_173:
+// rs1_val==6148914691236517205 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x110, 0x5555555555555555, 0x332, x1, 1208, x2)
+
+inst_174:
+// rs1_val==6148914691236517205 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x445, 0x5555555555555555, 0x665, x1, 1216, x2)
+
+inst_175:
+// rs1_val==6148914691236517205 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555555, 0x2c, x1, 1224, x2)
+
+inst_176:
+// rs1_val==6148914691236517205 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x5555555555555555, 0x556, x1, 1232, x2)
+
+inst_177:
+// rs1_val==6148914691236517205 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x5555555555555001, 0x5555555555555555, -0x555, x1, 1240, x2)
+
+inst_178:
+// rs1_val==6148914691236517205 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555555, 0x6, x1, 1248, x2)
+
+inst_179:
+// rs1_val==6148914691236517205 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x114, 0x5555555555555555, 0x334, x1, 1256, x2)
+
+inst_180:
+// rs1_val==6148914691236517205 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x445, 0x5555555555555555, 0x667, x1, 1264, x2)
+
+inst_181:
+// rs1_val==6148914691236517205 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x5555555555555554, 0x5555555555555555, -0x2c, x1, 1272, x2)
+
+inst_182:
+// rs1_val==6148914691236517205 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555555, 0x2e, x1, 1280, x2)
+
+inst_183:
+// rs1_val==-6148914691236517206 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x5555555555555556, 0x3, x1, 1288, x2)
+
+inst_184:
+// rs1_val==-6148914691236517206 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x5555555555555556, 0x555, x1, 1296, x2)
+
+inst_185:
+// rs1_val==-6148914691236517206 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, -0x556, x1, 1304, x2)
+
+inst_186:
+// rs1_val==-6148914691236517206 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x5555555555555556, 0x5, x1, 1312, x2)
+
+inst_187:
+// rs1_val==-6148914691236517206 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x222, -0x5555555555555556, 0x333, x1, 1320, x2)
+
+inst_188:
+// rs1_val==-6148914691236517206 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x222, -0x5555555555555556, 0x666, x1, 1328, x2)
+
+inst_189:
+// rs1_val==-6148914691236517206 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaaaaaaaaaa82, -0x5555555555555556, -0x2d, x1, 1336, x2)
+
+inst_190:
+// rs1_val==-6148914691236517206 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x28, -0x5555555555555556, 0x2d, x1, 1344, x2)
+
+inst_191:
+// rs1_val==-6148914691236517206 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x5555555555555556, 0x2, x1, 1352, x2)
+
+inst_192:
+// rs1_val==-6148914691236517206 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x5555555555555556, 0x554, x1, 1360, x2)
+
+inst_193:
+// rs1_val==-6148914691236517206 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x5555555555555556, 0x4, x1, 1368, x2)
+
+inst_194:
+// rs1_val==-6148914691236517206 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x222, -0x5555555555555556, 0x332, x1, 1376, x2)
+
+inst_195:
+// rs1_val==-6148914691236517206 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x220, -0x5555555555555556, 0x665, x1, 1384, x2)
+
+inst_196:
+// rs1_val==-6148914691236517206 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x28, -0x5555555555555556, 0x2c, x1, 1392, x2)
+
+inst_197:
+// rs1_val==-6148914691236517206 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x5555555555555556, 0x556, x1, 1400, x2)
+
+inst_198:
+// rs1_val==-6148914691236517206 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, -0x555, x1, 1408, x2)
+
+inst_199:
+// rs1_val==-6148914691236517206 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x5555555555555556, 0x6, x1, 1416, x2)
+
+inst_200:
+// rs1_val==-6148914691236517206 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x220, -0x5555555555555556, 0x334, x1, 1424, x2)
+
+inst_201:
+// rs1_val==-6148914691236517206 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x222, -0x5555555555555556, 0x667, x1, 1432, x2)
+
+inst_202:
+// rs1_val==-6148914691236517206 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaaaaaaaaaa80, -0x5555555555555556, -0x2c, x1, 1440, x2)
+
+inst_203:
+// rs1_val==-6148914691236517206 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x2a, -0x5555555555555556, 0x2e, x1, 1448, x2)
+
+inst_204:
+// rs1_val==5 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x5, 0x3, x1, 1456, x2)
+
+inst_205:
+// rs1_val==5 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x5, 0x555, x1, 1464, x2)
+
+inst_206:
+// rs1_val==5 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5, -0x556, x1, 1472, x2)
+
+inst_207:
+// rs1_val==5 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x5, 0x5, x1, 1480, x2)
+
+inst_208:
+// rs1_val==5 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x5, 0x333, x1, 1488, x2)
+
+inst_209:
+// rs1_val==5 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x666, x1, 1496, x2)
+
+inst_210:
+// rs1_val==5 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x5, -0x2d, x1, 1504, x2)
+
+inst_211:
+// rs1_val==5 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x5, 0x2d, x1, 1512, x2)
+
+inst_212:
+// rs1_val==5 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5, 0x2, x1, 1520, x2)
+
+inst_213:
+// rs1_val==5 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x554, x1, 1528, x2)
+
+inst_214:
+// rs1_val==5 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5, 0x0, x1, 1536, x2)
+
+inst_215:
+// rs1_val==5 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x4, x1, 1544, x2)
+
+inst_216:
+// rs1_val==5 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5, 0x332, x1, 1552, x2)
+
+inst_217:
+// rs1_val==5 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x5, 0x665, x1, 1560, x2)
+
+inst_218:
+// rs1_val==5 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x2c, x1, 1568, x2)
+
+inst_219:
+// rs1_val==5 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x556, x1, 1576, x2)
+
+inst_220:
+// rs1_val==5 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x5, -0x555, x1, 1584, x2)
+
+inst_221:
+// rs1_val==5 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x6, x1, 1592, x2)
+
+inst_222:
+// rs1_val==5 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x334, x1, 1600, x2)
+
+inst_223:
+// rs1_val==5 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x5, 0x667, x1, 1608, x2)
+
+inst_224:
+// rs1_val==5 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, -0x2c, x1, 1616, x2)
+
+inst_225:
+// rs1_val==5 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5, 0x2e, x1, 1624, x2)
+
+inst_226:
+// rs1_val==3689348814741910323 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x3333333333333333, 0x3, x1, 1632, x2)
+
+inst_227:
+// rs1_val==3689348814741910323 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x111, 0x3333333333333333, 0x555, x1, 1640, x2)
+
+inst_228:
+// rs1_val==3689348814741910323 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x3333333333333222, 0x3333333333333333, -0x556, x1, 1648, x2)
+
+inst_229:
+// rs1_val==3689348814741910323 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x3333333333333333, 0x5, x1, 1656, x2)
+
+inst_230:
+// rs1_val==3689348814741910323 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x333, 0x3333333333333333, 0x333, x1, 1664, x2)
+
+inst_231:
+// rs1_val==3689348814741910323 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x222, 0x3333333333333333, 0x666, x1, 1672, x2)
+
+inst_232:
+// rs1_val==3689348814741910323 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x3333333333333313, 0x3333333333333333, -0x2d, x1, 1680, x2)
+
+inst_233:
+// rs1_val==3689348814741910323 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x21, 0x3333333333333333, 0x2d, x1, 1688, x2)
+
+inst_234:
+// rs1_val==3689348814741910323 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3333333333333333, 0x2, x1, 1696, x2)
+
+inst_235:
+// rs1_val==3689348814741910323 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x110, 0x3333333333333333, 0x554, x1, 1704, x2)
+
+inst_236:
+// rs1_val==3689348814741910323 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3333333333333333, 0x0, x1, 1712, x2)
+
+inst_237:
+// rs1_val==3689348814741910323 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3333333333333333, 0x4, x1, 1720, x2)
+
+inst_238:
+// rs1_val==3689348814741910323 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x332, 0x3333333333333333, 0x332, x1, 1728, x2)
+
+inst_239:
+// rs1_val==3689348814741910323 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x221, 0x3333333333333333, 0x665, x1, 1736, x2)
+
+inst_240:
+// rs1_val==3689348814741910323 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x20, 0x3333333333333333, 0x2c, x1, 1744, x2)
+
+inst_241:
+// rs1_val==3689348814741910323 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x112, 0x3333333333333333, 0x556, x1, 1752, x2)
+
+inst_242:
+// rs1_val==3689348814741910323 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x3333333333333223, 0x3333333333333333, -0x555, x1, 1760, x2)
+
+inst_243:
+// rs1_val==3689348814741910323 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3333333333333333, 0x6, x1, 1768, x2)
+
+inst_244:
+// rs1_val==3689348814741910323 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x330, 0x3333333333333333, 0x334, x1, 1776, x2)
+
+inst_245:
+// rs1_val==3689348814741910323 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x223, 0x3333333333333333, 0x667, x1, 1784, x2)
+
+inst_246:
+// rs1_val==3689348814741910323 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x3333333333333310, 0x3333333333333333, -0x2c, x1, 1792, x2)
+
+inst_247:
+// rs1_val==3689348814741910323 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x22, 0x3333333333333333, 0x2e, x1, 1800, x2)
+
+inst_248:
+// rs1_val==7378697629483820646 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6666666666666666, 0x3, x1, 1808, x2)
+
+inst_249:
+// rs1_val==7378697629483820646 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x6666666666666666, 0x555, x1, 1816, x2)
+
+inst_250:
+// rs1_val==7378697629483820646 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x6666666666666222, 0x6666666666666666, -0x556, x1, 1824, x2)
+
+inst_251:
+// rs1_val==7378697629483820646 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6666666666666666, 0x5, x1, 1832, x2)
+
+inst_252:
+// rs1_val==7378697629483820646 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x222, 0x6666666666666666, 0x333, x1, 1840, x2)
+
+inst_253:
+// rs1_val==7378697629483820646 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x666, 0x6666666666666666, 0x666, x1, 1848, x2)
+
+inst_254:
+// rs1_val==7378697629483820646 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x6666666666666642, 0x6666666666666666, -0x2d, x1, 1856, x2)
+
+inst_255:
+// rs1_val==7378697629483820646 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x6666666666666666, 0x2d, x1, 1864, x2)
+
+inst_256:
+// rs1_val==7378697629483820646 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6666666666666666, 0x2, x1, 1872, x2)
+
+inst_257:
+// rs1_val==7378697629483820646 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x6666666666666666, 0x554, x1, 1880, x2)
+
+inst_258:
+// rs1_val==7378697629483820646 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x6666666666666666, 0x0, x1, 1888, x2)
+
+inst_259:
+// rs1_val==7378697629483820646 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6666666666666666, 0x4, x1, 1896, x2)
+
+inst_260:
+// rs1_val==7378697629483820646 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x222, 0x6666666666666666, 0x332, x1, 1904, x2)
+
+inst_261:
+// rs1_val==7378697629483820646 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x664, 0x6666666666666666, 0x665, x1, 1912, x2)
+
+inst_262:
+// rs1_val==7378697629483820646 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x6666666666666666, 0x2c, x1, 1920, x2)
+
+inst_263:
+// rs1_val==7378697629483820646 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x446, 0x6666666666666666, 0x556, x1, 1928, x2)
+
+inst_264:
+// rs1_val==7378697629483820646 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x6666666666666222, 0x6666666666666666, -0x555, x1, 1936, x2)
+
+inst_265:
+// rs1_val==7378697629483820646 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x6666666666666666, 0x6, x1, 1944, x2)
+
+inst_266:
+// rs1_val==7378697629483820646 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x224, 0x6666666666666666, 0x334, x1, 1952, x2)
+
+inst_267:
+// rs1_val==7378697629483820646 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x666, 0x6666666666666666, 0x667, x1, 1960, x2)
+
+inst_268:
+// rs1_val==7378697629483820646 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x6666666666666644, 0x6666666666666666, -0x2c, x1, 1968, x2)
+
+inst_269:
+// rs1_val==7378697629483820646 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x26, 0x6666666666666666, 0x2e, x1, 1976, x2)
+
+inst_270:
+// rs1_val==-3037000499 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x1, -0xb504f333, 0x3, x1, 1984, x2)
+
+inst_271:
+// rs1_val==-3037000499 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x445, -0xb504f333, 0x555, x1, 1992, x2)
+
+inst_272:
+// rs1_val==-3037000499 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xffffffff4afb0888, -0xb504f333, -0x556, x1, 2000, x2)
+
+inst_273:
+// rs1_val==-3037000499 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, -0xb504f333, 0x5, x1, 2008, x2)
+
+inst_274:
+// rs1_val==-3037000499 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x1, -0xb504f333, 0x333, x1, 2016, x2)
+
+inst_275:
+// rs1_val==-3037000499 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x444, -0xb504f333, 0x666, x1, 2024, x2)
+
+inst_276:
+// rs1_val==-3037000499 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xffffffff4afb0cc1, -0xb504f333, -0x2d, x1, 2032, x2)
+
+inst_277:
+// rs1_val==-3037000499 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0xd, -0xb504f333, 0x2d, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_278:
+// rs1_val==-3037000499 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, -0xb504f333, 0x2, x1, 0, x2)
+
+inst_279:
+// rs1_val==-3037000499 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x444, -0xb504f333, 0x554, x1, 8, x2)
+
+inst_280:
+// rs1_val==-3037000499 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0xb504f333, 0x0, x1, 16, x2)
+
+inst_281:
+// rs1_val==-3037000499 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, -0xb504f333, 0x4, x1, 24, x2)
+
+inst_282:
+// rs1_val==-3037000499 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x0, -0xb504f333, 0x332, x1, 32, x2)
+
+inst_283:
+// rs1_val==-3037000499 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x445, -0xb504f333, 0x665, x1, 40, x2)
+
+inst_284:
+// rs1_val==-3037000499 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0xc, -0xb504f333, 0x2c, x1, 48, x2)
+
+inst_285:
+// rs1_val==-3037000499 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x444, -0xb504f333, 0x556, x1, 56, x2)
+
+inst_286:
+// rs1_val==-3037000499 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xffffffff4afb0889, -0xb504f333, -0x555, x1, 64, x2)
+
+inst_287:
+// rs1_val==-3037000499 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, -0xb504f333, 0x6, x1, 72, x2)
+
+inst_288:
+// rs1_val==-3037000499 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x4, -0xb504f333, 0x334, x1, 80, x2)
+
+inst_289:
+// rs1_val==-3037000499 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x445, -0xb504f333, 0x667, x1, 88, x2)
+
+inst_290:
+// rs1_val==-3037000499 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xffffffff4afb0cc4, -0xb504f333, -0x2c, x1, 96, x2)
+
+inst_291:
+// rs1_val==-3037000499 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0xc, -0xb504f333, 0x2e, x1, 104, x2)
+
+inst_292:
+// rs1_val==3037000499 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x3, 0xb504f333, 0x3, x1, 112, x2)
+
+inst_293:
+// rs1_val==3037000499 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x111, 0xb504f333, 0x555, x1, 120, x2)
+
+inst_294:
+// rs1_val==3037000499 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xb504f222, 0xb504f333, -0x556, x1, 128, x2)
+
+inst_295:
+// rs1_val==3037000499 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x1, 0xb504f333, 0x5, x1, 136, x2)
+
+inst_296:
+// rs1_val==3037000499 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x333, 0xb504f333, 0x333, x1, 144, x2)
+
+inst_297:
+// rs1_val==3037000499 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x222, 0xb504f333, 0x666, x1, 152, x2)
+
+inst_298:
+// rs1_val==3037000499 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xb504f313, 0xb504f333, -0x2d, x1, 160, x2)
+
+inst_299:
+// rs1_val==3037000499 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x21, 0xb504f333, 0x2d, x1, 168, x2)
+
+inst_300:
+// rs1_val==3037000499 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0xb504f333, 0x2, x1, 176, x2)
+
+inst_301:
+// rs1_val==3037000499 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x110, 0xb504f333, 0x554, x1, 184, x2)
+
+inst_302:
+// rs1_val==3037000499 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb504f333, 0x0, x1, 192, x2)
+
+inst_303:
+// rs1_val==3037000499 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb504f333, 0x4, x1, 200, x2)
+
+inst_304:
+// rs1_val==3037000499 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x332, 0xb504f333, 0x332, x1, 208, x2)
+
+inst_305:
+// rs1_val==3037000499 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x221, 0xb504f333, 0x665, x1, 216, x2)
+
+inst_306:
+// rs1_val==3037000499 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x20, 0xb504f333, 0x2c, x1, 224, x2)
+
+inst_307:
+// rs1_val==3037000499 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x112, 0xb504f333, 0x556, x1, 232, x2)
+
+inst_308:
+// rs1_val==3037000499 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xb504f223, 0xb504f333, -0x555, x1, 240, x2)
+
+inst_309:
+// rs1_val==3037000499 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, 0xb504f333, 0x6, x1, 248, x2)
+
+inst_310:
+// rs1_val==3037000499 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x330, 0xb504f333, 0x334, x1, 256, x2)
+
+inst_311:
+// rs1_val==3037000499 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x223, 0xb504f333, 0x667, x1, 264, x2)
+
+inst_312:
+// rs1_val==3037000499 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xb504f310, 0xb504f333, -0x2c, x1, 272, x2)
+
+inst_313:
+// rs1_val==3037000499 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x22, 0xb504f333, 0x2e, x1, 280, x2)
+
+inst_314:
+// rs1_val==2 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x3, x1, 288, x2)
+
+inst_315:
+// rs1_val==2 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x555, x1, 296, x2)
+
+inst_316:
+// rs1_val==2 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, -0x556, x1, 304, x2)
+
+inst_317:
+// rs1_val==2 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x5, x1, 312, x2)
+
+inst_318:
+// rs1_val==2 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x333, x1, 320, x2)
+
+inst_319:
+// rs1_val==2 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x666, x1, 328, x2)
+
+inst_320:
+// rs1_val==2 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, -0x2d, x1, 336, x2)
+
+inst_321:
+// rs1_val==2 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x2d, x1, 344, x2)
+
+inst_322:
+// rs1_val==2 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x2, x1, 352, x2)
+
+inst_323:
+// rs1_val==2 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x554, x1, 360, x2)
+
+inst_324:
+// rs1_val==2 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x0, x1, 368, x2)
+
+inst_325:
+// rs1_val==2 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x4, x1, 376, x2)
+
+inst_326:
+// rs1_val==2 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x332, x1, 384, x2)
+
+inst_327:
+// rs1_val==2 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x665, x1, 392, x2)
+
+inst_328:
+// rs1_val==2 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x2c, x1, 400, x2)
+
+inst_329:
+// rs1_val==2 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x556, x1, 408, x2)
+
+inst_330:
+// rs1_val==2 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x6, x1, 416, x2)
+
+inst_331:
+// rs1_val==2 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, 0x334, x1, 424, x2)
+
+inst_332:
+// rs1_val==2 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x667, x1, 432, x2)
+
+inst_333:
+// rs1_val==2 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x2, -0x2c, x1, 440, x2)
+
+inst_334:
+// rs1_val==2 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x2; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x2, 0x2e, x1, 448, x2)
+
+inst_335:
+// rs1_val==6148914691236517204 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5555555555555554, 0x3, x1, 456, x2)
+
+inst_336:
+// rs1_val==6148914691236517204 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x5555555555555554, 0x555, x1, 464, x2)
+
+inst_337:
+// rs1_val==6148914691236517204 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x5555555555555000, 0x5555555555555554, -0x556, x1, 472, x2)
+
+inst_338:
+// rs1_val==6148914691236517204 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555554, 0x5, x1, 480, x2)
+
+inst_339:
+// rs1_val==6148914691236517204 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x110, 0x5555555555555554, 0x333, x1, 488, x2)
+
+inst_340:
+// rs1_val==6148914691236517204 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x5555555555555554, 0x666, x1, 496, x2)
+
+inst_341:
+// rs1_val==6148914691236517204 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x5555555555555550, 0x5555555555555554, -0x2d, x1, 504, x2)
+
+inst_342:
+// rs1_val==6148914691236517204 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555554, 0x2d, x1, 512, x2)
+
+inst_343:
+// rs1_val==6148914691236517204 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5555555555555554, 0x2, x1, 520, x2)
+
+inst_344:
+// rs1_val==6148914691236517204 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x5555555555555554, 0x554, x1, 528, x2)
+
+inst_345:
+// rs1_val==6148914691236517204 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5555555555555554, 0x0, x1, 536, x2)
+
+inst_346:
+// rs1_val==6148914691236517204 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555554, 0x4, x1, 544, x2)
+
+inst_347:
+// rs1_val==6148914691236517204 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x110, 0x5555555555555554, 0x332, x1, 552, x2)
+
+inst_348:
+// rs1_val==6148914691236517204 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x5555555555555554, 0x665, x1, 560, x2)
+
+inst_349:
+// rs1_val==6148914691236517204 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555554, 0x2c, x1, 568, x2)
+
+inst_350:
+// rs1_val==6148914691236517204 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x5555555555555554, 0x556, x1, 576, x2)
+
+inst_351:
+// rs1_val==6148914691236517204 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x5555555555555000, 0x5555555555555554, -0x555, x1, 584, x2)
+
+inst_352:
+// rs1_val==6148914691236517204 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555554, 0x6, x1, 592, x2)
+
+inst_353:
+// rs1_val==6148914691236517204 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x114, 0x5555555555555554, 0x334, x1, 600, x2)
+
+inst_354:
+// rs1_val==6148914691236517204 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x5555555555555554, 0x667, x1, 608, x2)
+
+inst_355:
+// rs1_val==6148914691236517204 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x5555555555555554, 0x5555555555555554, -0x2c, x1, 616, x2)
+
+inst_356:
+// rs1_val==6148914691236517204 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555554, 0x2e, x1, 624, x2)
+
+inst_357:
+// rs1_val==0 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x3, x1, 632, x2)
+
+inst_358:
+// rs1_val==0 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x555, x1, 640, x2)
+
+inst_359:
+// rs1_val==0 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, -0x556, x1, 648, x2)
+
+inst_360:
+// rs1_val==0 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x5, x1, 656, x2)
+
+inst_361:
+// rs1_val==0 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x333, x1, 664, x2)
+
+inst_362:
+// rs1_val==0 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x666, x1, 672, x2)
+
+inst_363:
+// rs1_val==6148914691236517206 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555556, 0x2c, x1, 680, x2)
+
+inst_364:
+// rs1_val==6148914691236517206 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x556, 0x5555555555555556, 0x556, x1, 688, x2)
+
+inst_365:
+// rs1_val==6148914691236517206 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x5555555555555002, 0x5555555555555556, -0x555, x1, 696, x2)
+
+inst_366:
+// rs1_val==6148914691236517206 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x5555555555555556, 0x6, x1, 704, x2)
+
+inst_367:
+// rs1_val==6148914691236517206 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x114, 0x5555555555555556, 0x334, x1, 712, x2)
+
+inst_368:
+// rs1_val==6148914691236517206 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x446, 0x5555555555555556, 0x667, x1, 720, x2)
+
+inst_369:
+// rs1_val==6148914691236517206 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x5555555555555554, 0x5555555555555556, -0x2c, x1, 728, x2)
+
+inst_370:
+// rs1_val==6148914691236517206 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x5555555555555556, 0x2e, x1, 736, x2)
+
+inst_371:
+// rs1_val==-6148914691236517205 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x3, -0x5555555555555555, 0x3, x1, 744, x2)
+
+inst_372:
+// rs1_val==-6148914691236517205 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x1, -0x5555555555555555, 0x555, x1, 752, x2)
+
+inst_373:
+// rs1_val==-6148914691236517205 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaaaaaaaaaaaa, -0x5555555555555555, -0x556, x1, 760, x2)
+
+inst_374:
+// rs1_val==-6148914691236517205 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x1, -0x5555555555555555, 0x5, x1, 768, x2)
+
+inst_375:
+// rs1_val==-6148914691236517205 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x223, -0x5555555555555555, 0x333, x1, 776, x2)
+
+inst_376:
+// rs1_val==-6148914691236517205 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x222, -0x5555555555555555, 0x666, x1, 784, x2)
+
+inst_377:
+// rs1_val==-6148914691236517205 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaaaaaaaaaa83, -0x5555555555555555, -0x2d, x1, 792, x2)
+
+inst_378:
+// rs1_val==-6148914691236517205 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x29, -0x5555555555555555, 0x2d, x1, 800, x2)
+
+inst_379:
+// rs1_val==-6148914691236517205 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x5555555555555555, 0x2, x1, 808, x2)
+
+inst_380:
+// rs1_val==-6148914691236517205 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x5555555555555555, 0x554, x1, 816, x2)
+
+inst_381:
+// rs1_val==-6148914691236517205 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x5555555555555555, 0x0, x1, 824, x2)
+
+inst_382:
+// rs1_val==-6148914691236517205 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, -0x5555555555555555, 0x4, x1, 832, x2)
+
+inst_383:
+// rs1_val==-6148914691236517205 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x222, -0x5555555555555555, 0x332, x1, 840, x2)
+
+inst_384:
+// rs1_val==-6148914691236517205 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x221, -0x5555555555555555, 0x665, x1, 848, x2)
+
+inst_385:
+// rs1_val==-6148914691236517205 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x28, -0x5555555555555555, 0x2c, x1, 856, x2)
+
+inst_386:
+// rs1_val==-6148914691236517205 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x5555555555555555, 0x556, x1, 864, x2)
+
+inst_387:
+// rs1_val==-6148914691236517205 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, -0x555, x1, 872, x2)
+
+inst_388:
+// rs1_val==-6148914691236517205 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, -0x5555555555555555, 0x6, x1, 880, x2)
+
+inst_389:
+// rs1_val==-6148914691236517205 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x220, -0x5555555555555555, 0x334, x1, 888, x2)
+
+inst_390:
+// rs1_val==-6148914691236517205 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x223, -0x5555555555555555, 0x667, x1, 896, x2)
+
+inst_391:
+// rs1_val==-6148914691236517205 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xaaaaaaaaaaaaaa80, -0x5555555555555555, -0x2c, x1, 904, x2)
+
+inst_392:
+// rs1_val==-6148914691236517205 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x2a, -0x5555555555555555, 0x2e, x1, 912, x2)
+
+inst_393:
+// rs1_val==6 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, 0x3, x1, 920, x2)
+
+inst_394:
+// rs1_val==6 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x555, x1, 928, x2)
+
+inst_395:
+// rs1_val==6 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, -0x556, x1, 936, x2)
+
+inst_396:
+// rs1_val==6 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x5, x1, 944, x2)
+
+inst_397:
+// rs1_val==6 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, 0x333, x1, 952, x2)
+
+inst_398:
+// rs1_val==6 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x6, 0x666, x1, 960, x2)
+
+inst_399:
+// rs1_val==6 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, -0x2d, x1, 968, x2)
+
+inst_400:
+// rs1_val==6 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x2d, x1, 976, x2)
+
+inst_401:
+// rs1_val==6 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, 0x2, x1, 984, x2)
+
+inst_402:
+// rs1_val==6 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x554, x1, 992, x2)
+
+inst_403:
+// rs1_val==6 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x6, 0x0, x1, 1000, x2)
+
+inst_404:
+// rs1_val==6 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x4, x1, 1008, x2)
+
+inst_405:
+// rs1_val==6 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, 0x332, x1, 1016, x2)
+
+inst_406:
+// rs1_val==6 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x665, x1, 1024, x2)
+
+inst_407:
+// rs1_val==6 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x2c, x1, 1032, x2)
+
+inst_408:
+// rs1_val==6 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x6, 0x556, x1, 1040, x2)
+
+inst_409:
+// rs1_val==6 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6, -0x555, x1, 1048, x2)
+
+inst_410:
+// rs1_val==6 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x6, 0x6, x1, 1056, x2)
+
+inst_411:
+// rs1_val==6 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, 0x334, x1, 1064, x2)
+
+inst_412:
+// rs1_val==6 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x6, 0x667, x1, 1072, x2)
+
+inst_413:
+// rs1_val==6 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6, -0x2c, x1, 1080, x2)
+
+inst_414:
+// rs1_val==6 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x6, 0x2e, x1, 1088, x2)
+
+inst_415:
+// rs1_val==3689348814741910324 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3333333333333334, 0x3, x1, 1096, x2)
+
+inst_416:
+// rs1_val==3689348814741910324 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x114, 0x3333333333333334, 0x555, x1, 1104, x2)
+
+inst_417:
+// rs1_val==3689348814741910324 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x3333333333333220, 0x3333333333333334, -0x556, x1, 1112, x2)
+
+inst_418:
+// rs1_val==3689348814741910324 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x3333333333333334, 0x5, x1, 1120, x2)
+
+inst_419:
+// rs1_val==3689348814741910324 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x330, 0x3333333333333334, 0x333, x1, 1128, x2)
+
+inst_420:
+// rs1_val==3689348814741910324 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x224, 0x3333333333333334, 0x666, x1, 1136, x2)
+
+inst_421:
+// rs1_val==3689348814741910324 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x3333333333333310, 0x3333333333333334, -0x2d, x1, 1144, x2)
+
+inst_422:
+// rs1_val==3689348814741910324 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x3333333333333334, 0x2d, x1, 1152, x2)
+
+inst_423:
+// rs1_val==3689348814741910324 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3333333333333334, 0x2, x1, 1160, x2)
+
+inst_424:
+// rs1_val==3689348814741910324 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x114, 0x3333333333333334, 0x554, x1, 1168, x2)
+
+inst_425:
+// rs1_val==3689348814741910324 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3333333333333334, 0x0, x1, 1176, x2)
+
+inst_426:
+// rs1_val==3689348814741910324 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x3333333333333334, 0x4, x1, 1184, x2)
+
+inst_427:
+// rs1_val==3689348814741910324 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x330, 0x3333333333333334, 0x332, x1, 1192, x2)
+
+inst_428:
+// rs1_val==3689348814741910324 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x224, 0x3333333333333334, 0x665, x1, 1200, x2)
+
+inst_429:
+// rs1_val==3689348814741910324 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x3333333333333334, 0x2c, x1, 1208, x2)
+
+inst_430:
+// rs1_val==3689348814741910324 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x114, 0x3333333333333334, 0x556, x1, 1216, x2)
+
+inst_431:
+// rs1_val==3689348814741910324 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x3333333333333220, 0x3333333333333334, -0x555, x1, 1224, x2)
+
+inst_432:
+// rs1_val==3689348814741910324 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x3333333333333334, 0x6, x1, 1232, x2)
+
+inst_433:
+// rs1_val==3689348814741910324 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x334, 0x3333333333333334, 0x334, x1, 1240, x2)
+
+inst_434:
+// rs1_val==3689348814741910324 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x224, 0x3333333333333334, 0x667, x1, 1248, x2)
+
+inst_435:
+// rs1_val==3689348814741910324 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x3333333333333314, 0x3333333333333334, -0x2c, x1, 1256, x2)
+
+inst_436:
+// rs1_val==3689348814741910324 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x3333333333333334, 0x2e, x1, 1264, x2)
+
+inst_437:
+// rs1_val==7378697629483820647 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x3, 0x6666666666666667, 0x3, x1, 1272, x2)
+
+inst_438:
+// rs1_val==7378697629483820647 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x445, 0x6666666666666667, 0x555, x1, 1280, x2)
+
+inst_439:
+// rs1_val==7378697629483820647 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x6666666666666222, 0x6666666666666667, -0x556, x1, 1288, x2)
+
+inst_440:
+// rs1_val==7378697629483820647 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x6666666666666667, 0x5, x1, 1296, x2)
+
+inst_441:
+// rs1_val==7378697629483820647 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x223, 0x6666666666666667, 0x333, x1, 1304, x2)
+
+inst_442:
+// rs1_val==7378697629483820647 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x666, 0x6666666666666667, 0x666, x1, 1312, x2)
+
+inst_443:
+// rs1_val==7378697629483820647 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x6666666666666643, 0x6666666666666667, -0x2d, x1, 1320, x2)
+
+inst_444:
+// rs1_val==7378697629483820647 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x25, 0x6666666666666667, 0x2d, x1, 1328, x2)
+
+inst_445:
+// rs1_val==7378697629483820647 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x6666666666666667, 0x2, x1, 1336, x2)
+
+inst_446:
+// rs1_val==7378697629483820647 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x6666666666666667, 0x554, x1, 1344, x2)
+
+inst_447:
+// rs1_val==7378697629483820647 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x6666666666666667, 0x0, x1, 1352, x2)
+
+inst_448:
+// rs1_val==7378697629483820647 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6666666666666667, 0x4, x1, 1360, x2)
+
+inst_449:
+// rs1_val==7378697629483820647 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x222, 0x6666666666666667, 0x332, x1, 1368, x2)
+
+inst_450:
+// rs1_val==7378697629483820647 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x665, 0x6666666666666667, 0x665, x1, 1376, x2)
+
+inst_451:
+// rs1_val==7378697629483820647 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x6666666666666667, 0x2c, x1, 1384, x2)
+
+inst_452:
+// rs1_val==7378697629483820647 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x446, 0x6666666666666667, 0x556, x1, 1392, x2)
+
+inst_453:
+// rs1_val==7378697629483820647 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x6666666666666223, 0x6666666666666667, -0x555, x1, 1400, x2)
+
+inst_454:
+// rs1_val==7378697629483820647 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x6, 0x6666666666666667, 0x6, x1, 1408, x2)
+
+inst_455:
+// rs1_val==7378697629483820647 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x224, 0x6666666666666667, 0x334, x1, 1416, x2)
+
+inst_456:
+// rs1_val==7378697629483820647 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x667, 0x6666666666666667, 0x667, x1, 1424, x2)
+
+inst_457:
+// rs1_val==7378697629483820647 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x6666666666666644, 0x6666666666666667, -0x2c, x1, 1432, x2)
+
+inst_458:
+// rs1_val==7378697629483820647 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x26, 0x6666666666666667, 0x2e, x1, 1440, x2)
+
+inst_459:
+// rs1_val==-3037000498 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, -0xb504f332, 0x3, x1, 1448, x2)
+
+inst_460:
+// rs1_val==-3037000498 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x444, -0xb504f332, 0x555, x1, 1456, x2)
+
+inst_461:
+// rs1_val==-3037000498 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xffffffff4afb088a, -0xb504f332, -0x556, x1, 1464, x2)
+
+inst_462:
+// rs1_val==-3037000498 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, -0xb504f332, 0x5, x1, 1472, x2)
+
+inst_463:
+// rs1_val==-3037000498 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x2, -0xb504f332, 0x333, x1, 1480, x2)
+
+inst_464:
+// rs1_val==-3037000498 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x446, -0xb504f332, 0x666, x1, 1488, x2)
+
+inst_465:
+// rs1_val==-3037000498 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xffffffff4afb0cc2, -0xb504f332, -0x2d, x1, 1496, x2)
+
+inst_466:
+// rs1_val==-3037000498 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0xc, -0xb504f332, 0x2d, x1, 1504, x2)
+
+inst_467:
+// rs1_val==-3037000498 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, -0xb504f332, 0x2, x1, 1512, x2)
+
+inst_468:
+// rs1_val==-3037000498 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x444, -0xb504f332, 0x554, x1, 1520, x2)
+
+inst_469:
+// rs1_val==-3037000498 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, -0xb504f332, 0x0, x1, 1528, x2)
+
+inst_470:
+// rs1_val==-3037000498 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, -0xb504f332, 0x4, x1, 1536, x2)
+
+inst_471:
+// rs1_val==-3037000498 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x2, -0xb504f332, 0x332, x1, 1544, x2)
+
+inst_472:
+// rs1_val==-3037000498 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x444, -0xb504f332, 0x665, x1, 1552, x2)
+
+inst_473:
+// rs1_val==-3037000498 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0xc, -0xb504f332, 0x2c, x1, 1560, x2)
+
+inst_474:
+// rs1_val==-3037000498 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x446, -0xb504f332, 0x556, x1, 1568, x2)
+
+inst_475:
+// rs1_val==-3037000498 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xffffffff4afb088a, -0xb504f332, -0x555, x1, 1576, x2)
+
+inst_476:
+// rs1_val==-3037000498 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x6, -0xb504f332, 0x6, x1, 1584, x2)
+
+inst_477:
+// rs1_val==-3037000498 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x4, -0xb504f332, 0x334, x1, 1592, x2)
+
+inst_478:
+// rs1_val==-3037000498 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x446, -0xb504f332, 0x667, x1, 1600, x2)
+
+inst_479:
+// rs1_val==-3037000498 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xffffffff4afb0cc4, -0xb504f332, -0x2c, x1, 1608, x2)
+
+inst_480:
+// rs1_val==-3037000498 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0xe, -0xb504f332, 0x2e, x1, 1616, x2)
+
+inst_481:
+// rs1_val==3037000500 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb504f334, 0x3, x1, 1624, x2)
+
+inst_482:
+// rs1_val==3037000500 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xb504f220, 0xb504f334, -0x556, x1, 1632, x2)
+
+inst_483:
+// rs1_val==3037000500 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0xb504f334, 0x5, x1, 1640, x2)
+
+inst_484:
+// rs1_val==3037000500 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x330, 0xb504f334, 0x333, x1, 1648, x2)
+
+inst_485:
+// rs1_val==3037000500 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x224, 0xb504f334, 0x666, x1, 1656, x2)
+
+inst_486:
+// rs1_val==3037000500 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xb504f310, 0xb504f334, -0x2d, x1, 1664, x2)
+
+inst_487:
+// rs1_val==3037000500 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x24, 0xb504f334, 0x2d, x1, 1672, x2)
+
+inst_488:
+// rs1_val==3037000500 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb504f334, 0x2, x1, 1680, x2)
+
+inst_489:
+// rs1_val==3037000500 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x114, 0xb504f334, 0x554, x1, 1688, x2)
+
+inst_490:
+// rs1_val==3037000500 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb504f334, 0x0, x1, 1696, x2)
+
+inst_491:
+// rs1_val==3037000500 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0xb504f334, 0x4, x1, 1704, x2)
+
+inst_492:
+// rs1_val==3037000500 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x330, 0xb504f334, 0x332, x1, 1712, x2)
+
+inst_493:
+// rs1_val==3037000500 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x224, 0xb504f334, 0x665, x1, 1720, x2)
+
+inst_494:
+// rs1_val==3037000500 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x24, 0xb504f334, 0x2c, x1, 1728, x2)
+
+inst_495:
+// rs1_val==3037000500 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x114, 0xb504f334, 0x556, x1, 1736, x2)
+
+inst_496:
+// rs1_val==3037000500 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xb504f220, 0xb504f334, -0x555, x1, 1744, x2)
+
+inst_497:
+// rs1_val==3037000500 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0xb504f334, 0x6, x1, 1752, x2)
+
+inst_498:
+// rs1_val==3037000500 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x334, 0xb504f334, 0x334, x1, 1760, x2)
+
+inst_499:
+// rs1_val==3037000500 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x224, 0xb504f334, 0x667, x1, 1768, x2)
+
+inst_500:
+// rs1_val==3037000500 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xb504f314, 0xb504f334, -0x2c, x1, 1776, x2)
+
+inst_501:
+// rs1_val==0 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, -0x2d, x1, 1784, x2)
+
+inst_502:
+// rs1_val==3037000500 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x24, 0xb504f334, 0x2e, x1, 1792, x2)
+
+inst_503:
+// rs1_val==0 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x2, x1, 1800, x2)
+
+inst_504:
+// rs1_val==0 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x554, x1, 1808, x2)
+
+inst_505:
+// rs1_val==0 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x4, x1, 1816, x2)
+
+inst_506:
+// rs1_val==0 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x332, x1, 1824, x2)
+
+inst_507:
+// rs1_val==0 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x665, x1, 1832, x2)
+
+inst_508:
+// rs1_val==0 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x2c, x1, 1840, x2)
+
+inst_509:
+// rs1_val==0 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x556, x1, 1848, x2)
+
+inst_510:
+// rs1_val==0 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, -0x555, x1, 1856, x2)
+
+inst_511:
+// rs1_val==0 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x6, x1, 1864, x2)
+
+inst_512:
+// rs1_val==0 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x334, x1, 1872, x2)
+
+inst_513:
+// rs1_val==0 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x667, x1, 1880, x2)
+
+inst_514:
+// rs1_val==0 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, -0x2c, x1, 1888, x2)
+
+inst_515:
+// rs1_val==0 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x0; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x0, 0x2e, x1, 1896, x2)
+
+inst_516:
+// rs1_val==4 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, 0x3, x1, 1904, x2)
+
+inst_517:
+// rs1_val==4 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x555, x1, 1912, x2)
+
+inst_518:
+// rs1_val==4 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, -0x556, x1, 1920, x2)
+
+inst_519:
+// rs1_val==4 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x5, x1, 1928, x2)
+
+inst_520:
+// rs1_val==4 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, 0x333, x1, 1936, x2)
+
+inst_521:
+// rs1_val==4 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x666, x1, 1944, x2)
+
+inst_522:
+// rs1_val==4 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, -0x2d, x1, 1952, x2)
+
+inst_523:
+// rs1_val==4 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x2d, x1, 1960, x2)
+
+inst_524:
+// rs1_val==4 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, 0x2, x1, 1968, x2)
+
+inst_525:
+// rs1_val==4 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x554, x1, 1976, x2)
+
+inst_526:
+// rs1_val==4 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, 0x0, x1, 1984, x2)
+
+inst_527:
+// rs1_val==4 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x4, x1, 1992, x2)
+
+inst_528:
+// rs1_val==4 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, 0x332, x1, 2000, x2)
+
+inst_529:
+// rs1_val==4 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x665, x1, 2008, x2)
+
+inst_530:
+// rs1_val==4 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x2c, x1, 2016, x2)
+
+inst_531:
+// rs1_val==4 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x556, x1, 2024, x2)
+
+inst_532:
+// rs1_val==4 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x4, -0x555, x1, 2032, x2)
+
+inst_533:
+// rs1_val==4 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x6, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_534:
+// rs1_val==4 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x334, x1, 0, x2)
+
+inst_535:
+// rs1_val==4 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x667, x1, 8, x2)
+
+inst_536:
+// rs1_val==4 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, -0x2c, x1, 16, x2)
+
+inst_537:
+// rs1_val==4 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x4; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x4, 0x2e, x1, 24, x2)
+
+inst_538:
+// rs1_val==3689348814741910322 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3333333333333332, 0x3, x1, 32, x2)
+
+inst_539:
+// rs1_val==3689348814741910322 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x110, 0x3333333333333332, 0x555, x1, 40, x2)
+
+inst_540:
+// rs1_val==3689348814741910322 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x3333333333333222, 0x3333333333333332, -0x556, x1, 48, x2)
+
+inst_541:
+// rs1_val==3689348814741910322 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3333333333333332, 0x5, x1, 56, x2)
+
+inst_542:
+// rs1_val==3689348814741910322 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x332, 0x3333333333333332, 0x333, x1, 64, x2)
+
+inst_543:
+// rs1_val==3689348814741910322 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x222, 0x3333333333333332, 0x666, x1, 72, x2)
+
+inst_544:
+// rs1_val==3689348814741910322 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x3333333333333312, 0x3333333333333332, -0x2d, x1, 80, x2)
+
+inst_545:
+// rs1_val==3689348814741910322 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x20, 0x3333333333333332, 0x2d, x1, 88, x2)
+
+inst_546:
+// rs1_val==3689348814741910322 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3333333333333332, 0x2, x1, 96, x2)
+
+inst_547:
+// rs1_val==3689348814741910322 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x110, 0x3333333333333332, 0x554, x1, 104, x2)
+
+inst_548:
+// rs1_val==3689348814741910322 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3333333333333332, 0x0, x1, 112, x2)
+
+inst_549:
+// rs1_val==3689348814741910322 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x3333333333333332, 0x4, x1, 120, x2)
+
+inst_550:
+// rs1_val==3689348814741910322 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x332, 0x3333333333333332, 0x332, x1, 128, x2)
+
+inst_551:
+// rs1_val==3689348814741910322 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x220, 0x3333333333333332, 0x665, x1, 136, x2)
+
+inst_552:
+// rs1_val==3689348814741910322 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x20, 0x3333333333333332, 0x2c, x1, 144, x2)
+
+inst_553:
+// rs1_val==3689348814741910322 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x112, 0x3333333333333332, 0x556, x1, 152, x2)
+
+inst_554:
+// rs1_val==3689348814741910322 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x3333333333333222, 0x3333333333333332, -0x555, x1, 160, x2)
+
+inst_555:
+// rs1_val==3689348814741910322 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x3333333333333332, 0x6, x1, 168, x2)
+
+inst_556:
+// rs1_val==3689348814741910322 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x330, 0x3333333333333332, 0x334, x1, 176, x2)
+
+inst_557:
+// rs1_val==3689348814741910322 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x222, 0x3333333333333332, 0x667, x1, 184, x2)
+
+inst_558:
+// rs1_val==3689348814741910322 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x3333333333333310, 0x3333333333333332, -0x2c, x1, 192, x2)
+
+inst_559:
+// rs1_val==3689348814741910322 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x22, 0x3333333333333332, 0x2e, x1, 200, x2)
+
+inst_560:
+// rs1_val==7378697629483820645 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x1, 0x6666666666666665, 0x3, x1, 208, x2)
+
+inst_561:
+// rs1_val==7378697629483820645 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x445, 0x6666666666666665, 0x555, x1, 216, x2)
+
+inst_562:
+// rs1_val==7378697629483820645 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x6666666666666220, 0x6666666666666665, -0x556, x1, 224, x2)
+
+inst_563:
+// rs1_val==7378697629483820645 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x5, 0x6666666666666665, 0x5, x1, 232, x2)
+
+inst_564:
+// rs1_val==7378697629483820645 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x221, 0x6666666666666665, 0x333, x1, 240, x2)
+
+inst_565:
+// rs1_val==7378697629483820645 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x664, 0x6666666666666665, 0x666, x1, 248, x2)
+
+inst_566:
+// rs1_val==7378697629483820645 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x6666666666666641, 0x6666666666666665, -0x2d, x1, 256, x2)
+
+inst_567:
+// rs1_val==7378697629483820645 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x25, 0x6666666666666665, 0x2d, x1, 264, x2)
+
+inst_568:
+// rs1_val==7378697629483820645 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x6666666666666665, 0x2, x1, 272, x2)
+
+inst_569:
+// rs1_val==7378697629483820645 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x6666666666666665, 0x554, x1, 280, x2)
+
+inst_570:
+// rs1_val==7378697629483820645 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x6666666666666665, 0x0, x1, 288, x2)
+
+inst_571:
+// rs1_val==7378697629483820645 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6666666666666665, 0x4, x1, 296, x2)
+
+inst_572:
+// rs1_val==7378697629483820645 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x220, 0x6666666666666665, 0x332, x1, 304, x2)
+
+inst_573:
+// rs1_val==7378697629483820645 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x665, 0x6666666666666665, 0x665, x1, 312, x2)
+
+inst_574:
+// rs1_val==7378697629483820645 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x6666666666666665, 0x2c, x1, 320, x2)
+
+inst_575:
+// rs1_val==7378697629483820645 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x6666666666666665, 0x556, x1, 328, x2)
+
+inst_576:
+// rs1_val==7378697629483820645 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0x6666666666666221, 0x6666666666666665, -0x555, x1, 336, x2)
+
+inst_577:
+// rs1_val==7378697629483820645 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x6666666666666665, 0x6, x1, 344, x2)
+
+inst_578:
+// rs1_val==7378697629483820645 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x224, 0x6666666666666665, 0x334, x1, 352, x2)
+
+inst_579:
+// rs1_val==7378697629483820645 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x665, 0x6666666666666665, 0x667, x1, 360, x2)
+
+inst_580:
+// rs1_val==7378697629483820645 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0x6666666666666644, 0x6666666666666665, -0x2c, x1, 368, x2)
+
+inst_581:
+// rs1_val==7378697629483820645 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x24, 0x6666666666666665, 0x2e, x1, 376, x2)
+
+inst_582:
+// rs1_val==3037000498 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, 0xb504f332, 0x3, x1, 384, x2)
+
+inst_583:
+// rs1_val==3037000498 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x110, 0xb504f332, 0x555, x1, 392, x2)
+
+inst_584:
+// rs1_val==3037000498 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0xb504f222, 0xb504f332, -0x556, x1, 400, x2)
+
+inst_585:
+// rs1_val==3037000498 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb504f332, 0x5, x1, 408, x2)
+
+inst_586:
+// rs1_val==3037000498 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x332, 0xb504f332, 0x333, x1, 416, x2)
+
+inst_587:
+// rs1_val==3037000498 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x222, 0xb504f332, 0x666, x1, 424, x2)
+
+inst_588:
+// rs1_val==3037000498 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0xb504f312, 0xb504f332, -0x2d, x1, 432, x2)
+
+inst_589:
+// rs1_val==3037000498 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x20, 0xb504f332, 0x2d, x1, 440, x2)
+
+inst_590:
+// rs1_val==3037000498 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0xb504f332, 0x2, x1, 448, x2)
+
+inst_591:
+// rs1_val==3037000498 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x110, 0xb504f332, 0x554, x1, 456, x2)
+
+inst_592:
+// rs1_val==3037000498 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb504f332, 0x0, x1, 464, x2)
+
+inst_593:
+// rs1_val==3037000498 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x0, 0xb504f332, 0x4, x1, 472, x2)
+
+inst_594:
+// rs1_val==3037000498 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x332, 0xb504f332, 0x332, x1, 480, x2)
+
+inst_595:
+// rs1_val==3037000498 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x220, 0xb504f332, 0x665, x1, 488, x2)
+
+inst_596:
+// rs1_val==3037000498 and imm_val==44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2c
+TEST_IMM_OP( andi, x11, x10, 0x20, 0xb504f332, 0x2c, x1, 496, x2)
+
+inst_597:
+// rs1_val==3037000498 and imm_val==1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x556
+TEST_IMM_OP( andi, x11, x10, 0x112, 0xb504f332, 0x556, x1, 504, x2)
+
+inst_598:
+// rs1_val==3037000498 and imm_val==-1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x555
+TEST_IMM_OP( andi, x11, x10, 0xb504f222, 0xb504f332, -0x555, x1, 512, x2)
+
+inst_599:
+// rs1_val==3037000498 and imm_val==6,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x6
+TEST_IMM_OP( andi, x11, x10, 0x2, 0xb504f332, 0x6, x1, 520, x2)
+
+inst_600:
+// rs1_val==3037000498 and imm_val==820,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x334
+TEST_IMM_OP( andi, x11, x10, 0x330, 0xb504f332, 0x334, x1, 528, x2)
+
+inst_601:
+// rs1_val==3037000498 and imm_val==1639,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x667
+TEST_IMM_OP( andi, x11, x10, 0x222, 0xb504f332, 0x667, x1, 536, x2)
+
+inst_602:
+// rs1_val==3037000498 and imm_val==-44,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x2c
+TEST_IMM_OP( andi, x11, x10, 0xb504f310, 0xb504f332, -0x2c, x1, 544, x2)
+
+inst_603:
+// rs1_val==3037000498 and imm_val==46,
+// opcode: andi ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2e
+TEST_IMM_OP( andi, x11, x10, 0x22, 0xb504f332, 0x2e, x1, 552, x2)
+
+inst_604:
+// rs1_val==6148914691236517206 and imm_val==3,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x3
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x5555555555555556, 0x3, x1, 560, x2)
+
+inst_605:
+// rs1_val==6148914691236517206 and imm_val==1365,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x555
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x5555555555555556, 0x555, x1, 568, x2)
+
+inst_606:
+// rs1_val==6148914691236517206 and imm_val==-1366,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x556
+TEST_IMM_OP( andi, x11, x10, 0x5555555555555002, 0x5555555555555556, -0x556, x1, 576, x2)
+
+inst_607:
+// rs1_val==6148914691236517206 and imm_val==5,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x5
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555556, 0x5, x1, 584, x2)
+
+inst_608:
+// rs1_val==6148914691236517206 and imm_val==819,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x333
+TEST_IMM_OP( andi, x11, x10, 0x112, 0x5555555555555556, 0x333, x1, 592, x2)
+
+inst_609:
+// rs1_val==6148914691236517206 and imm_val==1638,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x666
+TEST_IMM_OP( andi, x11, x10, 0x446, 0x5555555555555556, 0x666, x1, 600, x2)
+
+inst_610:
+// rs1_val==6148914691236517206 and imm_val==-45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x2d
+TEST_IMM_OP( andi, x11, x10, 0x5555555555555552, 0x5555555555555556, -0x2d, x1, 608, x2)
+
+inst_611:
+// rs1_val==6148914691236517206 and imm_val==45,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2d
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555556, 0x2d, x1, 616, x2)
+
+inst_612:
+// rs1_val==6148914691236517206 and imm_val==2,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2
+TEST_IMM_OP( andi, x11, x10, 0x2, 0x5555555555555556, 0x2, x1, 624, x2)
+
+inst_613:
+// rs1_val==6148914691236517206 and imm_val==1364,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x554
+TEST_IMM_OP( andi, x11, x10, 0x554, 0x5555555555555556, 0x554, x1, 632, x2)
+
+inst_614:
+// rs1_val==6148914691236517206 and imm_val==0,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x0
+TEST_IMM_OP( andi, x11, x10, 0x0, 0x5555555555555556, 0x0, x1, 640, x2)
+
+inst_615:
+// rs1_val==6148914691236517206 and imm_val==4,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x4
+TEST_IMM_OP( andi, x11, x10, 0x4, 0x5555555555555556, 0x4, x1, 648, x2)
+
+inst_616:
+// rs1_val==6148914691236517206 and imm_val==818,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x332
+TEST_IMM_OP( andi, x11, x10, 0x112, 0x5555555555555556, 0x332, x1, 656, x2)
+
+inst_617:
+// rs1_val==6148914691236517206 and imm_val==1637,
+// opcode: andi ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x665
+TEST_IMM_OP( andi, x11, x10, 0x444, 0x5555555555555556, 0x665, x1, 664, x2)
+
+inst_618:
+// imm_val == -513, rs1_val == -262145
+// opcode: andi ; op1:x10; dest:x11; op1val:-0x40001; immval:-0x201
+TEST_IMM_OP( andi, x11, x10, 0xfffffffffffbfdff, -0x40001, -0x201, x1, 672, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x5_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 85*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/auipc-01.S b/riscof/suite/rv64i_m/I/auipc-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..b6b7dde4289c069fb590a67fb2775708879d189e
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/auipc-01.S
@@ -0,0 +1,389 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the auipc instruction of the RISC-V I extension for the auipc covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",auipc)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rd==x20, imm_val == 0, imm_val==0
+// opcode: auipc ; dest:x20; immval:0x0
+TEST_AUIPC(auipc, x20, 0x0, 0x0, x2, 0, x6)
+
+inst_1:
+// rd==x18, imm_val > 0, imm_val == 1048063
+// opcode: auipc ; dest:x18; immval:0xffdff
+TEST_AUIPC(auipc, x18, -0x201000, 0xffdff, x2, 8, x6)
+
+inst_2:
+// rd==x7, imm_val == ((2**20)-1),
+// opcode: auipc ; dest:x7; immval:0xfffff
+TEST_AUIPC(auipc, x7, -0x1000, 0xfffff, x2, 16, x6)
+
+inst_3:
+// rd==x23, imm_val==3,
+// opcode: auipc ; dest:x23; immval:0x3
+TEST_AUIPC(auipc, x23, 0x3000, 0x3, x2, 24, x6)
+
+inst_4:
+// rd==x8, imm_val==349525, imm_val == 349525
+// opcode: auipc ; dest:x8; immval:0x55555
+TEST_AUIPC(auipc, x8, 0x55555000, 0x55555, x2, 32, x6)
+
+inst_5:
+// rd==x15, imm_val==699050, imm_val == 699050
+// opcode: auipc ; dest:x15; immval:0xaaaaa
+TEST_AUIPC(auipc, x15, -0x55556000, 0xaaaaa, x2, 40, x6)
+
+inst_6:
+// rd==x1, imm_val==5,
+// opcode: auipc ; dest:x1; immval:0x5
+TEST_AUIPC(auipc, x1, 0x5000, 0x5, x2, 48, x6)
+
+inst_7:
+// rd==x11, imm_val==209715,
+// opcode: auipc ; dest:x11; immval:0x33333
+TEST_AUIPC(auipc, x11, 0x33333000, 0x33333, x2, 56, x6)
+
+inst_8:
+// rd==x10, imm_val==419430,
+// opcode: auipc ; dest:x10; immval:0x66666
+TEST_AUIPC(auipc, x10, 0x66666000, 0x66666, x2, 64, x6)
+
+inst_9:
+// rd==x19, imm_val==724,
+// opcode: auipc ; dest:x19; immval:0x2d4
+TEST_AUIPC(auipc, x19, 0x2d4000, 0x2d4, x2, 72, x6)
+
+inst_10:
+// rd==x27, imm_val==1023,
+// opcode: auipc ; dest:x27; immval:0x3ff
+TEST_AUIPC(auipc, x27, 0x3ff000, 0x3ff, x2, 80, x6)
+
+inst_11:
+// rd==x26, imm_val==2, imm_val == 2
+// opcode: auipc ; dest:x26; immval:0x2
+TEST_AUIPC(auipc, x26, 0x2000, 0x2, x2, 88, x6)
+
+inst_12:
+// rd==x30, imm_val==349524,
+// opcode: auipc ; dest:x30; immval:0x55554
+TEST_AUIPC(auipc, x30, 0x55554000, 0x55554, x2, 96, x6)
+
+inst_13:
+// rd==x3, imm_val==699049,
+// opcode: auipc ; dest:x3; immval:0xaaaa9
+TEST_AUIPC(auipc, x3, -0x55557000, 0xaaaa9, x2, 104, x6)
+
+inst_14:
+// rd==x0, imm_val==4, imm_val == 4
+// opcode: auipc ; dest:x0; immval:0x4
+TEST_AUIPC(auipc, x0, 0, 0x4, x2, 112, x6)
+
+inst_15:
+// rd==x21, imm_val==209714,
+// opcode: auipc ; dest:x21; immval:0x33332
+TEST_AUIPC(auipc, x21, 0x33332000, 0x33332, x2, 120, x6)
+
+inst_16:
+// rd==x12, imm_val==419429,
+// opcode: auipc ; dest:x12; immval:0x66665
+TEST_AUIPC(auipc, x12, 0x66665000, 0x66665, x2, 128, x6)
+
+inst_17:
+// rd==x16, imm_val==723,
+// opcode: auipc ; dest:x16; immval:0x2d3
+TEST_AUIPC(auipc, x16, 0x2d3000, 0x2d3, x2, 136, x6)
+
+inst_18:
+// rd==x9, imm_val==1022,
+// opcode: auipc ; dest:x9; immval:0x3fe
+TEST_AUIPC(auipc, x9, 0x3fe000, 0x3fe, x2, 144, x6)
+
+inst_19:
+// rd==x4, imm_val==349526,
+// opcode: auipc ; dest:x4; immval:0x55556
+TEST_AUIPC(auipc, x4, 0x55556000, 0x55556, x2, 152, x6)
+
+inst_20:
+// rd==x13, imm_val==699051,
+// opcode: auipc ; dest:x13; immval:0xaaaab
+TEST_AUIPC(auipc, x13, -0x55555000, 0xaaaab, x2, 160, x6)
+
+inst_21:
+// rd==x31, imm_val==6,
+// opcode: auipc ; dest:x31; immval:0x6
+TEST_AUIPC(auipc, x31, 0x6000, 0x6, x2, 168, x6)
+
+inst_22:
+// rd==x24, imm_val==209716,
+// opcode: auipc ; dest:x24; immval:0x33334
+TEST_AUIPC(auipc, x24, 0x33334000, 0x33334, x2, 176, x6)
+
+inst_23:
+// rd==x17, imm_val==419431,
+// opcode: auipc ; dest:x17; immval:0x66667
+TEST_AUIPC(auipc, x17, 0x66667000, 0x66667, x2, 184, x6)
+
+inst_24:
+// rd==x14, imm_val==725,
+// opcode: auipc ; dest:x14; immval:0x2d5
+TEST_AUIPC(auipc, x14, 0x2d5000, 0x2d5, x2, 192, x6)
+
+inst_25:
+// rd==x22, imm_val==1, imm_val == 1
+// opcode: auipc ; dest:x22; immval:0x1
+TEST_AUIPC(auipc, x22, 0x1000, 0x1, x2, 200, x6)
+
+inst_26:
+// rd==x5, imm_val==1024, imm_val == 1024
+// opcode: auipc ; dest:x5; immval:0x400
+TEST_AUIPC(auipc, x5, 0x400000, 0x400, x2, 208, x6)
+
+inst_27:
+// rd==x29, imm_val == 8,
+// opcode: auipc ; dest:x29; immval:0x8
+TEST_AUIPC(auipc, x29, 0x8000, 0x8, x2, 216, x6)
+
+inst_28:
+// rd==x28, imm_val == 16,
+// opcode: auipc ; dest:x28; immval:0x10
+TEST_AUIPC(auipc, x28, 0x10000, 0x10, x2, 224, x3)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_29:
+// rd==x6, imm_val == 32,
+// opcode: auipc ; dest:x6; immval:0x20
+TEST_AUIPC(auipc, x6, 0x20000, 0x20, x1, 0, x3)
+
+inst_30:
+// rd==x2, imm_val == 64,
+// opcode: auipc ; dest:x2; immval:0x40
+TEST_AUIPC(auipc, x2, 0x40000, 0x40, x1, 8, x3)
+
+inst_31:
+// rd==x25, imm_val == 983039,
+// opcode: auipc ; dest:x25; immval:0xeffff
+TEST_AUIPC(auipc, x25, -0x10001000, 0xeffff, x1, 16, x3)
+
+inst_32:
+// imm_val == 917503,
+// opcode: auipc ; dest:x10; immval:0xdffff
+TEST_AUIPC(auipc, x10, -0x20001000, 0xdffff, x1, 24, x3)
+
+inst_33:
+// imm_val == 786431,
+// opcode: auipc ; dest:x10; immval:0xbffff
+TEST_AUIPC(auipc, x10, -0x40001000, 0xbffff, x1, 32, x3)
+
+inst_34:
+// imm_val == 524287,
+// opcode: auipc ; dest:x10; immval:0x7ffff
+TEST_AUIPC(auipc, x10, 0x7ffff000, 0x7ffff, x1, 40, x3)
+
+inst_35:
+// imm_val == 128,
+// opcode: auipc ; dest:x10; immval:0x80
+TEST_AUIPC(auipc, x10, 0x80000, 0x80, x1, 48, x3)
+
+inst_36:
+// imm_val == 256,
+// opcode: auipc ; dest:x10; immval:0x100
+TEST_AUIPC(auipc, x10, 0x100000, 0x100, x1, 56, x3)
+
+inst_37:
+// imm_val == 512,
+// opcode: auipc ; dest:x10; immval:0x200
+TEST_AUIPC(auipc, x10, 0x200000, 0x200, x1, 64, x3)
+
+inst_38:
+// imm_val == 2048,
+// opcode: auipc ; dest:x10; immval:0x800
+TEST_AUIPC(auipc, x10, 0x800000, 0x800, x1, 72, x3)
+
+inst_39:
+// imm_val == 4096,
+// opcode: auipc ; dest:x10; immval:0x1000
+TEST_AUIPC(auipc, x10, 0x1000000, 0x1000, x1, 80, x3)
+
+inst_40:
+// imm_val == 8192,
+// opcode: auipc ; dest:x10; immval:0x2000
+TEST_AUIPC(auipc, x10, 0x2000000, 0x2000, x1, 88, x3)
+
+inst_41:
+// imm_val == 16384,
+// opcode: auipc ; dest:x10; immval:0x4000
+TEST_AUIPC(auipc, x10, 0x4000000, 0x4000, x1, 96, x3)
+
+inst_42:
+// imm_val == 32768,
+// opcode: auipc ; dest:x10; immval:0x8000
+TEST_AUIPC(auipc, x10, 0x8000000, 0x8000, x1, 104, x3)
+
+inst_43:
+// imm_val == 65536,
+// opcode: auipc ; dest:x10; immval:0x10000
+TEST_AUIPC(auipc, x10, 0x10000000, 0x10000, x1, 112, x3)
+
+inst_44:
+// imm_val == 131072,
+// opcode: auipc ; dest:x10; immval:0x20000
+TEST_AUIPC(auipc, x10, 0x20000000, 0x20000, x1, 120, x3)
+
+inst_45:
+// imm_val == 262144,
+// opcode: auipc ; dest:x10; immval:0x40000
+TEST_AUIPC(auipc, x10, 0x40000000, 0x40000, x1, 128, x3)
+
+inst_46:
+// imm_val == 524288,
+// opcode: auipc ; dest:x10; immval:0x80000
+TEST_AUIPC(auipc, x10, -0x80000000, 0x80000, x1, 136, x3)
+
+inst_47:
+// imm_val == 1048574,
+// opcode: auipc ; dest:x10; immval:0xffffe
+TEST_AUIPC(auipc, x10, -0x2000, 0xffffe, x1, 144, x3)
+
+inst_48:
+// imm_val == 1048573,
+// opcode: auipc ; dest:x10; immval:0xffffd
+TEST_AUIPC(auipc, x10, -0x3000, 0xffffd, x1, 152, x3)
+
+inst_49:
+// imm_val == 1048571,
+// opcode: auipc ; dest:x10; immval:0xffffb
+TEST_AUIPC(auipc, x10, -0x5000, 0xffffb, x1, 160, x3)
+
+inst_50:
+// imm_val == 1048567,
+// opcode: auipc ; dest:x10; immval:0xffff7
+TEST_AUIPC(auipc, x10, -0x9000, 0xffff7, x1, 168, x3)
+
+inst_51:
+// imm_val == 1048559,
+// opcode: auipc ; dest:x10; immval:0xfffef
+TEST_AUIPC(auipc, x10, -0x11000, 0xfffef, x1, 176, x3)
+
+inst_52:
+// imm_val == 1048543,
+// opcode: auipc ; dest:x10; immval:0xfffdf
+TEST_AUIPC(auipc, x10, -0x21000, 0xfffdf, x1, 184, x3)
+
+inst_53:
+// imm_val == 1048511,
+// opcode: auipc ; dest:x10; immval:0xfffbf
+TEST_AUIPC(auipc, x10, -0x41000, 0xfffbf, x1, 192, x3)
+
+inst_54:
+// imm_val == 1048447,
+// opcode: auipc ; dest:x10; immval:0xfff7f
+TEST_AUIPC(auipc, x10, -0x81000, 0xfff7f, x1, 200, x3)
+
+inst_55:
+// imm_val == 1048319,
+// opcode: auipc ; dest:x10; immval:0xffeff
+TEST_AUIPC(auipc, x10, -0x101000, 0xffeff, x1, 208, x3)
+
+inst_56:
+// imm_val == 1047551,
+// opcode: auipc ; dest:x10; immval:0xffbff
+TEST_AUIPC(auipc, x10, -0x401000, 0xffbff, x1, 216, x3)
+
+inst_57:
+// imm_val == 1046527,
+// opcode: auipc ; dest:x10; immval:0xff7ff
+TEST_AUIPC(auipc, x10, -0x801000, 0xff7ff, x1, 224, x3)
+
+inst_58:
+// imm_val == 1044479,
+// opcode: auipc ; dest:x10; immval:0xfefff
+TEST_AUIPC(auipc, x10, -0x1001000, 0xfefff, x1, 232, x3)
+
+inst_59:
+// imm_val == 1040383,
+// opcode: auipc ; dest:x10; immval:0xfdfff
+TEST_AUIPC(auipc, x10, -0x2001000, 0xfdfff, x1, 240, x3)
+
+inst_60:
+// imm_val == 1032191,
+// opcode: auipc ; dest:x10; immval:0xfbfff
+TEST_AUIPC(auipc, x10, -0x4001000, 0xfbfff, x1, 248, x3)
+
+inst_61:
+// imm_val == 1015807,
+// opcode: auipc ; dest:x10; immval:0xf7fff
+TEST_AUIPC(auipc, x10, -0x8001000, 0xf7fff, x1, 256, x3)
+
+inst_62:
+// imm_val==4, imm_val == 4
+// opcode: auipc ; dest:x10; immval:0x4
+TEST_AUIPC(auipc, x10, 0x4000, 0x4, x1, 264, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 29*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 34*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/beq-01.S b/riscof/suite/rv64i_m/I/beq-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..8fcf47968fa6c80bcd0dfebe70e3e91a60baeb51
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/beq-01.S
@@ -0,0 +1,3479 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the beq instruction of the RISC-V I extension for the beq covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",beq)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x19, rs2==x12, rs1_val > 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs2_val == 274877906944
+// opcode: beq, op1:x19; op2:x12; op1val:0x6; op2val:0x4000000000; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x6, x19, x12, 0x6, 0x4000000000, 0x0, 3f, x1, 0,0)
+
+inst_1:
+// rs1 == rs2, rs1==x10, rs2==x10, rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs2_val == -2305843009213693953, rs1_val == 6148914691236517205, rs1_val > rs2_val and imm_val < 0 and imm_val & 0x03 == 0
+// opcode: beq, op1:x10; op2:x10; op1val:0x5555555555555555; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x6, x10, x10, 0x5555555555555555, 0x5555555555555555, 0x4, 1b, x1, 8,0)
+
+inst_2:
+// rs1==x29, rs2==x2, rs1_val < 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs1_val < rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs1_val == -9223372036854775808, rs2_val == -140737488355329
+// opcode: beq, op1:x29; op2:x2; op1val:-0x8000000000000000; op2val:-0x800000000001; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x6, x29, x2, -0x8000000000000000, -0x800000000001, 0x400, 1b, x1, 16,0)
+
+inst_3:
+// rs1==x4, rs2==x24, rs1_val < 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val < rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs1_val == -524289
+// opcode: beq, op1:x4; op2:x24; op1val:-0x80001; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x6, x4, x24, -0x80001, 0x3, 0x8, 3f, x1, 24,0)
+
+inst_4:
+// rs1==x14, rs2==x25, rs1_val == rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs1_val==-3037000499 and rs2_val==-3037000499
+// opcode: beq, op1:x14; op2:x25; op1val:-0xb504f333; op2val:-0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x6, x14, x25, -0xb504f333, -0xb504f333, 0x80, 3f, x1, 32,0)
+
+inst_5:
+// rs1==x27, rs2==x20, rs1_val == rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs2_val == -70368744177665, rs1_val == -70368744177665
+// opcode: beq, op1:x27; op2:x20; op1val:-0x400000000001; op2val:-0x400000000001; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x6, x27, x20, -0x400000000001, -0x400000000001, 0x8, 1b, x1, 40,0)
+
+inst_6:
+// rs1==x20, rs2==x27, rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == -4097
+// opcode: beq, op1:x20; op2:x27; op1val:0x6; op2val:-0x1001; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x6, x20, x27, 0x6, -0x1001, 0x40, 3f, x1, 48,0)
+
+inst_7:
+// rs1==x17, rs2==x28, rs2_val == 1, rs1_val == 256
+// opcode: beq, op1:x17; op2:x28; op1val:0x100; op2val:0x1; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x6, x17, x28, 0x100, 0x1, 0x400, 3f, x1, 56,0)
+
+inst_8:
+// rs1==x7, rs2==x14, rs2_val == 2, rs1_val==6148914691236517205 and rs2_val==2
+// opcode: beq, op1:x7; op2:x14; op1val:0x5555555555555555; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x6, x7, x14, 0x5555555555555555, 0x2, 0x4, 3f, x1, 64,0)
+
+inst_9:
+// rs1==x3, rs2==x9, rs2_val == 4, rs1_val == -4097
+// opcode: beq, op1:x3; op2:x9; op1val:-0x1001; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x6, x3, x9, -0x1001, 0x4, 0x0, 1b, x1, 72,0)
+
+inst_10:
+// rs1==x23, rs2==x26, rs2_val == 8, rs1_val == -1048577
+// opcode: beq, op1:x23; op2:x26; op1val:-0x100001; op2val:0x8; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x6, x23, x26, -0x100001, 0x8, 0x400, 1b, x1, 80,0)
+
+inst_11:
+// rs1==x25, rs2==x30, rs2_val == 16, rs1_val == -549755813889
+// opcode: beq, op1:x25; op2:x30; op1val:-0x8000000001; op2val:0x10; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x6, x25, x30, -0x8000000001, 0x10, 0x400, 1b, x1, 88,0)
+
+inst_12:
+// rs1==x12, rs2==x4, rs2_val == 32, rs1_val == 16
+// opcode: beq, op1:x12; op2:x4; op1val:0x10; op2val:0x20; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x6, x12, x4, 0x10, 0x20, 0x80, 3f, x1, 96,0)
+
+inst_13:
+// rs1==x5, rs2==x16, rs2_val == 64, rs1_val == -1025
+// opcode: beq, op1:x5; op2:x16; op1val:-0x401; op2val:0x40; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x6, x5, x16, -0x401, 0x40, 0x400, 1b, x1, 104,0)
+
+inst_14:
+// rs1==x11, rs2==x19, rs2_val == 128, rs1_val == -3
+// opcode: beq, op1:x11; op2:x19; op1val:-0x3; op2val:0x80; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x6, x11, x19, -0x3, 0x80, 0x400, 1b, x1, 112,0)
+
+inst_15:
+// rs1==x24, rs2==x22, rs2_val == 256,
+// opcode: beq, op1:x24; op2:x22; op1val:0x6; op2val:0x100; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x6, x24, x22, 0x6, 0x100, 0x10, 3f, x1, 120,0)
+
+inst_16:
+// rs1==x16, rs2==x13, rs2_val == 512, rs1_val == 1073741824
+// opcode: beq, op1:x16; op2:x13; op1val:0x40000000; op2val:0x200; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x6, x16, x13, 0x40000000, 0x200, 0x20, 3f, x1, 128,0)
+
+inst_17:
+// rs1==x18, rs2==x31, rs2_val == 1024,
+// opcode: beq, op1:x18; op2:x31; op1val:0x6666666666666667; op2val:0x400; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x6, x18, x31, 0x6666666666666667, 0x400, 0x0, 1b, x1, 136,0)
+
+inst_18:
+// rs1==x31, rs2==x21, rs2_val == 2048,
+// opcode: beq, op1:x31; op2:x21; op1val:0xb504f333; op2val:0x800; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x6, x31, x21, 0xb504f333, 0x800, 0x2, 3f, x1, 144,0)
+
+inst_19:
+// rs1==x30, rs2==x5, rs2_val == 4096, rs1_val == -8796093022209
+// opcode: beq, op1:x30; op2:x5; op1val:-0x80000000001; op2val:0x1000; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x30, x5, -0x80000000001, 0x1000, 0x100, 3f, x1, 152,0)
+
+inst_20:
+// rs1==x2, rs2==x0, rs2_val == 8192,
+// opcode: beq, op1:x2; op2:x0; op1val:-0x8000000000000000; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x2, x0, -0x8000000000000000, 0x0, 0x4, 1b, x1, 160,0)
+
+inst_21:
+// rs1==x8, rs2==x11, rs2_val == 16384, rs1_val == -2251799813685249
+// opcode: beq, op1:x8; op2:x11; op1val:-0x8000000000001; op2val:0x4000; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x8, x11, -0x8000000000001, 0x4000, 0x0, 3f, x1, 168,0)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_22:
+// rs1==x21, rs2==x23, rs2_val == 32768, rs1_val == 1
+// opcode: beq, op1:x21; op2:x23; op1val:0x1; op2val:0x8000; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x21, x23, 0x1, 0x8000, 0x0, 1b, x2, 0,0)
+
+inst_23:
+// rs1==x13, rs2==x6, rs2_val == 65536, rs1_val == -1152921504606846977
+// opcode: beq, op1:x13; op2:x6; op1val:-0x1000000000000001; op2val:0x10000; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x13, x6, -0x1000000000000001, 0x10000, 0x556, 1b, x2, 8,0)
+
+inst_24:
+// rs1==x6, rs2==x3, rs2_val == 131072, rs1_val == 1099511627776
+// opcode: beq, op1:x6; op2:x3; op1val:0x10000000000; op2val:0x20000; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x6, x3, 0x10000000000, 0x20000, 0x40, 3f, x2, 16,0)
+
+inst_25:
+// rs1==x22, rs2==x29, rs2_val == 262144, rs1_val == 36028797018963968
+// opcode: beq, op1:x22; op2:x29; op1val:0x80000000000000; op2val:0x40000; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x22, x29, 0x80000000000000, 0x40000, 0x8, 1b, x2, 24,0)
+
+inst_26:
+// rs1==x26, rs2==x15, rs2_val == 524288, rs1_val == -4194305
+// opcode: beq, op1:x26; op2:x15; op1val:-0x400001; op2val:0x80000; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x26, x15, -0x400001, 0x80000, 0x20, 3f, x2, 32,0)
+
+inst_27:
+// rs1==x28, rs2==x7, rs2_val == 1048576, rs1_val == 512
+// opcode: beq, op1:x28; op2:x7; op1val:0x200; op2val:0x100000; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x28, x7, 0x200, 0x100000, 0x556, 1b, x2, 40,0)
+
+inst_28:
+// rs1==x9, rs2==x17, rs2_val == 2097152, rs1_val == 4
+// opcode: beq, op1:x9; op2:x17; op1val:0x4; op2val:0x200000; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x9, x17, 0x4, 0x200000, 0x400, 1b, x2, 48,0)
+
+inst_29:
+// rs1==x1, rs2==x8, rs2_val == 4194304,
+// opcode: beq, op1:x1; op2:x8; op1val:-0x8000000001; op2val:0x400000; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x1, x8, -0x8000000001, 0x400000, 0x400, 3f, x2, 56,0)
+
+inst_30:
+// rs1==x0, rs2==x18, rs2_val == 8388608, rs1_val == 137438953472
+// opcode: beq, op1:x0; op2:x18; op1val:0x0; op2val:0x800000; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x0, x18, 0x0, 0x800000, 0x2, 3f, x2, 64,0)
+
+inst_31:
+// rs1==x15, rs2==x1, rs2_val == 16777216, rs1_val == 32768
+// opcode: beq, op1:x15; op2:x1; op1val:0x8000; op2val:0x1000000; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x15, x1, 0x8000, 0x1000000, 0x10, 3f, x2, 72,0)
+
+inst_32:
+// rs2_val == 33554432, rs1_val == -1099511627777
+// opcode: beq, op1:x10; op2:x11; op1val:-0x10000000001; op2val:0x2000000; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x10000000001, 0x2000000, 0x6, 3f, x2, 80,0)
+
+inst_33:
+// rs2_val == 67108864, rs1_val == -36028797018963969
+// opcode: beq, op1:x10; op2:x11; op1val:-0x80000000000001; op2val:0x4000000; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x80000000000001, 0x4000000, 0x400, 3f, x2, 88,0)
+
+inst_34:
+// rs2_val == 134217728,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x8000000; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x8000000, 0x2, 1b, x2, 96,0)
+
+inst_35:
+// rs2_val == 268435456, rs1_val == -2147483649
+// opcode: beq, op1:x10; op2:x11; op1val:-0x80000001; op2val:0x10000000; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x80000001, 0x10000000, 0x8, 3f, x2, 104,0)
+
+inst_36:
+// rs2_val == 536870912,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x20000000; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x20000000, 0x4, 1b, x2, 112,0)
+
+inst_37:
+// rs2_val == 1073741824, rs1_val == 17179869184
+// opcode: beq, op1:x10; op2:x11; op1val:0x400000000; op2val:0x40000000; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x400000000, 0x40000000, 0x0, 1b, x2, 120,0)
+
+inst_38:
+// rs2_val == 2147483648, rs1_val == 8388608
+// opcode: beq, op1:x10; op2:x11; op1val:0x800000; op2val:0x80000000; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x800000, 0x80000000, 0x2, 1b, x2, 128,0)
+
+inst_39:
+// rs2_val == 4294967296, rs1_val == -513
+// opcode: beq, op1:x10; op2:x11; op1val:-0x201; op2val:0x100000000; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x201, 0x100000000, 0x200, 3f, x2, 136,0)
+
+inst_40:
+// rs2_val == 8589934592,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x7; op2val:0x200000000; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x7, 0x200000000, 0x400, 1b, x2, 144,0)
+
+inst_41:
+// rs2_val == 17179869184,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x8000000001; op2val:0x400000000; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x8000000001, 0x400000000, 0xa, 1b, x2, 152,0)
+
+inst_42:
+// rs2_val == 34359738368,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x800000000; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x800000000, 0x80, 3f, x2, 160,0)
+
+inst_43:
+// rs2_val == 68719476736, rs1_val == -4398046511105
+// opcode: beq, op1:x10; op2:x11; op1val:-0x40000000001; op2val:0x1000000000; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x40000000001, 0x1000000000, 0x556, 1b, x2, 168,0)
+
+inst_44:
+// rs2_val == 137438953472,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x100001; op2val:0x2000000000; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x100001, 0x2000000000, 0x20, 3f, x2, 176,0)
+
+inst_45:
+// rs2_val == 549755813888, rs1_val == 34359738368
+// opcode: beq, op1:x10; op2:x11; op1val:0x800000000; op2val:0x8000000000; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x800000000, 0x8000000000, 0x20, 3f, x2, 184,0)
+
+inst_46:
+// rs2_val == 1099511627776, rs1_val == 8796093022208
+// opcode: beq, op1:x10; op2:x11; op1val:0x80000000000; op2val:0x10000000000; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x80000000000, 0x10000000000, 0x8, 1b, x2, 192,0)
+
+inst_47:
+// rs2_val == 2199023255552, rs1_val == -257
+// opcode: beq, op1:x10; op2:x11; op1val:-0x101; op2val:0x20000000000; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x101, 0x20000000000, 0x400, 1b, x2, 200,0)
+
+inst_48:
+// rs2_val == 4398046511104, rs1_val == 9007199254740992
+// opcode: beq, op1:x10; op2:x11; op1val:0x20000000000000; op2val:0x40000000000; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x20000000000000, 0x40000000000, 0x20, 3f, x2, 208,0)
+
+inst_49:
+// rs2_val == 8796093022208,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x80000000000; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x80000000000, 0xa, 1b, x2, 216,0)
+
+inst_50:
+// rs2_val == 17592186044416, rs1_val == -129
+// opcode: beq, op1:x10; op2:x11; op1val:-0x81; op2val:0x100000000000; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x81, 0x100000000000, 0x6, 3f, x2, 224,0)
+
+inst_51:
+// rs2_val == 35184372088832,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x200000000000; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x200000000000, 0x6, 3f, x2, 232,0)
+
+inst_52:
+// rs2_val == 70368744177664,
+// opcode: beq, op1:x10; op2:x11; op1val:0x10000000000; op2val:0x400000000000; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x10000000000, 0x400000000000, 0x400, 3f, x2, 240,0)
+
+inst_53:
+// rs2_val == 140737488355328, rs1_val == -274877906945
+// opcode: beq, op1:x10; op2:x11; op1val:-0x4000000001; op2val:0x800000000000; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x4000000001, 0x800000000000, 0x100, 3f, x2, 248,0)
+
+inst_54:
+// rs2_val == 281474976710656, rs1_val == -4611686018427387905
+// opcode: beq, op1:x10; op2:x11; op1val:-0x4000000000000001; op2val:0x1000000000000; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x4000000000000001, 0x1000000000000, 0x0, 1b, x2, 256,0)
+
+inst_55:
+// rs2_val == 562949953421312, rs1_val == -72057594037927937
+// opcode: beq, op1:x10; op2:x11; op1val:-0x100000000000001; op2val:0x2000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x100000000000001, 0x2000000000000, 0x4, 3f, x2, 264,0)
+
+inst_56:
+// rs2_val == 1125899906842624, rs1_val == -67108865
+// opcode: beq, op1:x10; op2:x11; op1val:-0x4000001; op2val:0x4000000000000; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x4000001, 0x4000000000000, 0x10, 3f, x2, 272,0)
+
+inst_57:
+// rs2_val == 2251799813685248, rs1_val == -16777217
+// opcode: beq, op1:x10; op2:x11; op1val:-0x1000001; op2val:0x8000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x1000001, 0x8000000000000, 0x6, 1b, x2, 280,0)
+
+inst_58:
+// rs2_val == 4503599627370496, rs1_val == -4294967297
+// opcode: beq, op1:x10; op2:x11; op1val:-0x100000001; op2val:0x10000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x100000001, 0x10000000000000, 0x4, 3f, x2, 288,0)
+
+inst_59:
+// rs2_val == 9007199254740992,
+// opcode: beq, op1:x10; op2:x11; op1val:0x40000000; op2val:0x20000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x40000000, 0x20000000000000, 0x8, 3f, x2, 296,0)
+
+inst_60:
+// rs2_val == 18014398509481984,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x40000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x40000000000000, 0x4, 1b, x2, 304,0)
+
+inst_61:
+// rs2_val == 36028797018963968, rs1_val == 33554432
+// opcode: beq, op1:x10; op2:x11; op1val:0x2000000; op2val:0x80000000000000; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2000000, 0x80000000000000, 0x0, 1b, x2, 312,0)
+
+inst_62:
+// rs2_val == 72057594037927936,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:0x100000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x1000000000000001, 0x100000000000000, 0x4, 3f, x2, 320,0)
+
+inst_63:
+// rs2_val == 144115188075855872, rs1_val == 65536
+// opcode: beq, op1:x10; op2:x11; op1val:0x10000; op2val:0x200000000000000; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x10000, 0x200000000000000, 0x400, 3f, x2, 328,0)
+
+inst_64:
+// rs2_val == 288230376151711744,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x400000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x400000000000000, 0x8, 3f, x2, 336,0)
+
+inst_65:
+// rs2_val == 576460752303423488, rs1_val == 8192
+// opcode: beq, op1:x10; op2:x11; op1val:0x2000; op2val:0x800000000000000; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2000, 0x800000000000000, 0x2, 3f, x2, 344,0)
+
+inst_66:
+// rs2_val == 1152921504606846976,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x8000000000001; op2val:0x1000000000000000; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x8000000000001, 0x1000000000000000, 0x100, 3f, x2, 352,0)
+
+inst_67:
+// rs2_val == 2305843009213693952,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x4000000000000000; op2val:0x2000000000000000; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x4000000000000000, 0x2000000000000000, 0xa, 1b, x2, 360,0)
+
+inst_68:
+// rs2_val == 4611686018427387904,
+// opcode: beq, op1:x10; op2:x11; op1val:0x8000; op2val:0x4000000000000000; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x8000, 0x4000000000000000, 0x20, 3f, x2, 368,0)
+
+inst_69:
+// rs2_val == -9223372036854775808,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:-0x8000000000000000; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, -0x8000000000000000, 0x40, 3f, x2, 376,0)
+
+inst_70:
+// rs2_val == -2, rs1_val == 288230376151711744
+// opcode: beq, op1:x10; op2:x11; op1val:0x400000000000000; op2val:-0x2; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x400000000000000, -0x2, 0x6, 1b, x2, 384,0)
+
+inst_71:
+// rs2_val == -3, rs1_val == -131073
+// opcode: beq, op1:x10; op2:x11; op1val:-0x20001; op2val:-0x3; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x20001, -0x3, 0x4, 3f, x2, 392,0)
+
+inst_72:
+// rs2_val == -5,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, -0x5, 0x4, 1b, x2, 400,0)
+
+inst_73:
+// rs2_val == -9,
+// opcode: beq, op1:x10; op2:x11; op1val:0x80000000000; op2val:-0x9; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x80000000000, -0x9, 0x200, 3f, x2, 408,0)
+
+inst_74:
+// rs2_val == -17,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:-0x11; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x1000000000000001, -0x11, 0x4, 1b, x2, 416,0)
+
+inst_75:
+// rs2_val == -33, rs1_val == -16385
+// opcode: beq, op1:x10; op2:x11; op1val:-0x4001; op2val:-0x21; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x4001, -0x21, 0x40, 3f, x2, 424,0)
+
+inst_76:
+// rs2_val == -65, rs1_val == -281474976710657
+// opcode: beq, op1:x10; op2:x11; op1val:-0x1000000000001; op2val:-0x41; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x1000000000001, -0x41, 0x556, 1b, x2, 432,0)
+
+inst_77:
+// rs2_val == -129, rs1_val == -9
+// opcode: beq, op1:x10; op2:x11; op1val:-0x9; op2val:-0x81; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x9, -0x81, 0x8, 1b, x2, 440,0)
+
+inst_78:
+// rs2_val == -257,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x101; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, -0x101, 0x200, 3f, x2, 448,0)
+
+inst_79:
+// rs2_val == -513,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x80001; op2val:-0x201; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x80001, -0x201, 0x400, 3f, x2, 456,0)
+
+inst_80:
+// rs2_val == -1025,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x401; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, -0x401, 0x2, 3f, x2, 464,0)
+
+inst_81:
+// rs2_val == -2049,
+// opcode: beq, op1:x10; op2:x11; op1val:0x800000; op2val:-0x801; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x800000, -0x801, 0x4, 1b, x2, 472,0)
+
+inst_82:
+// rs2_val == -8193,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:-0x2001; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, -0x2001, 0x400, 3f, x2, 480,0)
+
+inst_83:
+// rs2_val == -16385, rs1_val == -1125899906842625
+// opcode: beq, op1:x10; op2:x11; op1val:-0x4000000000001; op2val:-0x4001; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x4000000000001, -0x4001, 0x0, 1b, x2, 488,0)
+
+inst_84:
+// rs2_val == -32769,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x400001; op2val:-0x8001; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x400001, -0x8001, 0x2, 3f, x2, 496,0)
+
+inst_85:
+// rs2_val == -65537, rs1_val == -268435457
+// opcode: beq, op1:x10; op2:x11; op1val:-0x10000001; op2val:-0x10001; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x10000001, -0x10001, 0x6, 1b, x2, 504,0)
+
+inst_86:
+// rs2_val == -131073,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x4000000000001; op2val:-0x20001; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x4000000000001, -0x20001, 0x80, 3f, x2, 512,0)
+
+inst_87:
+// rs2_val == -262145,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x40001; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, -0x40001, 0x400, 3f, x2, 520,0)
+
+inst_88:
+// rs2_val == -524289,
+// opcode: beq, op1:x10; op2:x11; op1val:0x1; op2val:-0x80001; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x1, -0x80001, 0x400, 1b, x2, 528,0)
+
+inst_89:
+// rs2_val == -1048577,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:-0x100001; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, -0x100001, 0x80, 3f, x2, 536,0)
+
+inst_90:
+// rs2_val == -2097153,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x200001; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, -0x200001, 0x0, 1b, x2, 544,0)
+
+inst_91:
+// rs2_val == -4194305, rs1_val == 576460752303423488
+// opcode: beq, op1:x10; op2:x11; op1val:0x800000000000000; op2val:-0x400001; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x800000000000000, -0x400001, 0x400, 1b, x2, 552,0)
+
+inst_92:
+// rs2_val == -8388609,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x400000000001; op2val:-0x800001; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x400000000001, -0x800001, 0x556, 1b, x2, 560,0)
+
+inst_93:
+// rs2_val == -16777217,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x7; op2val:-0x1000001; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x7, -0x1000001, 0x2, 3f, x2, 568,0)
+
+inst_94:
+// rs2_val == -33554433, rs1_val == -32769
+// opcode: beq, op1:x10; op2:x11; op1val:-0x8001; op2val:-0x2000001; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x8001, -0x2000001, 0x556, 1b, x2, 576,0)
+
+inst_95:
+// rs2_val == -67108865, rs1_val == 2048
+// opcode: beq, op1:x10; op2:x11; op1val:0x800; op2val:-0x4000001; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x800, -0x4000001, 0x8, 3f, x2, 584,0)
+
+inst_96:
+// rs2_val == -134217729, rs1_val == 524288
+// opcode: beq, op1:x10; op2:x11; op1val:0x80000; op2val:-0x8000001; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x80000, -0x8000001, 0x8, 3f, x2, 592,0)
+
+inst_97:
+// rs2_val == -268435457,
+// opcode: beq, op1:x10; op2:x11; op1val:0x800000; op2val:-0x10000001; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x800000, -0x10000001, 0x6, 1b, x2, 600,0)
+
+inst_98:
+// rs2_val == -536870913, rs1_val == -262145
+// opcode: beq, op1:x10; op2:x11; op1val:-0x40001; op2val:-0x20000001; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x40001, -0x20000001, 0x8, 3f, x2, 608,0)
+
+inst_99:
+// rs2_val == -1073741825, rs1_val == -33554433
+// opcode: beq, op1:x10; op2:x11; op1val:-0x2000001; op2val:-0x40000001; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x2000001, -0x40000001, 0x40, 3f, x2, 616,0)
+
+inst_100:
+// rs2_val == -2147483649, rs1_val == -288230376151711745
+// opcode: beq, op1:x10; op2:x11; op1val:-0x400000000000001; op2val:-0x80000001; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x400000000000001, -0x80000001, 0x20, 3f, x2, 624,0)
+
+inst_101:
+// rs2_val == -4294967297, rs1_val == 2199023255552
+// opcode: beq, op1:x10; op2:x11; op1val:0x20000000000; op2val:-0x100000001; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x20000000000, -0x100000001, 0x400, 3f, x2, 632,0)
+
+inst_102:
+// rs2_val == -8589934593, rs1_val == -65537
+// opcode: beq, op1:x10; op2:x11; op1val:-0x10001; op2val:-0x200000001; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x10001, -0x200000001, 0x2, 1b, x2, 640,0)
+
+inst_103:
+// rs2_val == -17179869185,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x7; op2val:-0x400000001; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x7, -0x400000001, 0x4, 3f, x2, 648,0)
+
+inst_104:
+// rs2_val == -34359738369,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x4000001; op2val:-0x800000001; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x4000001, -0x800000001, 0x8, 1b, x2, 656,0)
+
+inst_105:
+// rs2_val == -68719476737,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:-0x1000000001; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, -0x1000000001, 0x40, 3f, x2, 664,0)
+
+inst_106:
+// rs2_val == -137438953473,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x1000001; op2val:-0x2000000001; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x1000001, -0x2000000001, 0x40, 3f, x2, 672,0)
+
+inst_107:
+// rs2_val == -274877906945,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x3; op2val:-0x4000000001; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x3, -0x4000000001, 0xa, 1b, x2, 680,0)
+
+inst_108:
+// rs2_val == -549755813889,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x8; op2val:-0x8000000001; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x8, -0x8000000001, 0x2, 1b, x2, 688,0)
+
+inst_109:
+// rs2_val == -1099511627777,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x20001; op2val:-0x10000000001; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x20001, -0x10000000001, 0x400, 1b, x2, 696,0)
+
+inst_110:
+// rs2_val == -2199023255553, rs1_val == -140737488355329
+// opcode: beq, op1:x10; op2:x11; op1val:-0x800000000001; op2val:-0x20000000001; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x800000000001, -0x20000000001, 0x80, 3f, x2, 704,0)
+
+inst_111:
+// rs2_val == -4398046511105,
+// opcode: beq, op1:x10; op2:x11; op1val:0x10000; op2val:-0x40000000001; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x10000, -0x40000000001, 0x100, 3f, x2, 712,0)
+
+inst_112:
+// rs2_val == -8796093022209,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:-0x80000000001; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, -0x80000000001, 0x8, 1b, x2, 720,0)
+
+inst_113:
+// rs2_val == -17592186044417,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x10000000001; op2val:-0x100000000001; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x10000000001, -0x100000000001, 0x10, 3f, x2, 728,0)
+
+inst_114:
+// rs2_val == -35184372088833,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x4000001; op2val:-0x200000000001; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x4000001, -0x200000000001, 0x556, 1b, x2, 736,0)
+
+inst_115:
+// rs2_val == -281474976710657,
+// opcode: beq, op1:x10; op2:x11; op1val:0x80000; op2val:-0x1000000000001; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x80000, -0x1000000000001, 0x2, 1b, x2, 744,0)
+
+inst_116:
+// rs2_val == -562949953421313,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x2000000000001; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, -0x2000000000001, 0x8, 3f, x2, 752,0)
+
+inst_117:
+// rs2_val == -1125899906842625,
+// opcode: beq, op1:x10; op2:x11; op1val:0x9; op2val:-0x4000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x9, -0x4000000000001, 0x0, 3f, x2, 760,0)
+
+inst_118:
+// rs2_val == -2251799813685249,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x4000000000000001; op2val:-0x8000000000001; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x4000000000000001, -0x8000000000001, 0x6, 1b, x2, 768,0)
+
+inst_119:
+// rs2_val == -4503599627370497,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x9; op2val:-0x10000000000001; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x9, -0x10000000000001, 0x4, 1b, x2, 776,0)
+
+inst_120:
+// rs2_val == -9007199254740993,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xa; op2val:-0x20000000000001; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xa, -0x20000000000001, 0x556, 1b, x2, 784,0)
+
+inst_121:
+// rs2_val == -18014398509481985, rs1_val == 140737488355328
+// opcode: beq, op1:x10; op2:x11; op1val:0x800000000000; op2val:-0x40000000000001; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x800000000000, -0x40000000000001, 0x8, 3f, x2, 792,0)
+
+inst_122:
+// rs2_val == -36028797018963969,
+// opcode: beq, op1:x10; op2:x11; op1val:0x10000; op2val:-0x80000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x10000, -0x80000000000001, 0x0, 1b, x2, 800,0)
+
+inst_123:
+// rs2_val == -72057594037927937, rs1_val == -5
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5; op2val:-0x100000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5, -0x100000000000001, 0x0, 3f, x2, 808,0)
+
+inst_124:
+// rs2_val == -144115188075855873,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x8000000000000000; op2val:-0x200000000000001; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x8000000000000000, -0x200000000000001, 0x4, 1b, x2, 816,0)
+
+inst_125:
+// rs2_val == -288230376151711745,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x81; op2val:-0x400000000000001; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x81, -0x400000000000001, 0x556, 1b, x2, 824,0)
+
+inst_126:
+// rs2_val == -576460752303423489, rs1_val == 4611686018427387904
+// opcode: beq, op1:x10; op2:x11; op1val:0x4000000000000000; op2val:-0x800000000000001; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4000000000000000, -0x800000000000001, 0x556, 1b, x2, 832,0)
+
+inst_127:
+// rs2_val == -1152921504606846977, rs1_val == -17592186044417
+// opcode: beq, op1:x10; op2:x11; op1val:-0x100000000001; op2val:-0x1000000000000001; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x100000000001, -0x1000000000000001, 0x80, 3f, x2, 840,0)
+
+inst_128:
+// rs2_val == -4611686018427387905,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2000; op2val:-0x4000000000000001; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2000, -0x4000000000000001, 0x100, 3f, x2, 848,0)
+
+inst_129:
+// rs2_val == 9223372036854775807,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x4000000000000001; op2val:0x7fffffffffffffff; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x4000000000000001, 0x7fffffffffffffff, 0xa, 1b, x2, 856,0)
+
+inst_130:
+// rs2_val == 6148914691236517205, rs1_val == -137438953473
+// opcode: beq, op1:x10; op2:x11; op1val:-0x2000000001; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x2000000001, 0x5555555555555555, 0x0, 3f, x2, 864,0)
+
+inst_131:
+// rs2_val == -6148914691236517206, rs1_val==6148914691236517205 and rs2_val==-6148914691236517206
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, -0x5555555555555556, 0x4, 3f, x2, 872,0)
+
+inst_132:
+// rs1_val == 2, rs1_val==2 and rs2_val==6
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x6, 0x400, 3f, x2, 880,0)
+
+inst_133:
+// rs1_val == 8,
+// opcode: beq, op1:x10; op2:x11; op1val:0x8; op2val:-0x800001; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x8, -0x800001, 0x6, 1b, x2, 888,0)
+
+inst_134:
+// rs1_val == 32,
+// opcode: beq, op1:x10; op2:x11; op1val:0x20; op2val:-0x100001; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x20, -0x100001, 0x80, 3f, x2, 896,0)
+
+inst_135:
+// rs1_val == 64,
+// opcode: beq, op1:x10; op2:x11; op1val:0x40; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x40, 0x3333333333333333, 0x4, 3f, x2, 904,0)
+
+inst_136:
+// rs1_val == 128,
+// opcode: beq, op1:x10; op2:x11; op1val:0x80; op2val:-0x81; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x80, -0x81, 0x10, 3f, x2, 912,0)
+
+inst_137:
+// rs1_val == 1024,
+// opcode: beq, op1:x10; op2:x11; op1val:0x400; op2val:-0x8000000001; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x400, -0x8000000001, 0x2, 1b, x2, 920,0)
+
+inst_138:
+// rs1_val == 4096,
+// opcode: beq, op1:x10; op2:x11; op1val:0x1000; op2val:-0x11; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x1000, -0x11, 0x8, 3f, x2, 928,0)
+
+inst_139:
+// rs1_val == 16384,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4000; op2val:0x4000000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4000, 0x4000000000000000, 0x8, 3f, x2, 936,0)
+
+inst_140:
+// rs1_val == 131072,
+// opcode: beq, op1:x10; op2:x11; op1val:0x20000; op2val:-0x400000001; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x20000, -0x400000001, 0x0, 3f, x2, 944,0)
+
+inst_141:
+// rs1_val == 262144,
+// opcode: beq, op1:x10; op2:x11; op1val:0x40000; op2val:0x20000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x40000, 0x20000000000000, 0x6, 3f, x2, 952,0)
+
+inst_142:
+// rs1_val == 1048576,
+// opcode: beq, op1:x10; op2:x11; op1val:0x100000; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x100000, 0x2, 0x2, 3f, x2, 960,0)
+
+inst_143:
+// rs1_val == 2097152,
+// opcode: beq, op1:x10; op2:x11; op1val:0x200000; op2val:-0x4000000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x200000, -0x4000000000000001, 0x0, 3f, x2, 968,0)
+
+inst_144:
+// rs1_val == 4194304,
+// opcode: beq, op1:x10; op2:x11; op1val:0x400000; op2val:0x10000000000; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x400000, 0x10000000000, 0x100, 3f, x2, 976,0)
+
+inst_145:
+// rs1_val == 16777216,
+// opcode: beq, op1:x10; op2:x11; op1val:0x1000000; op2val:-0x200000000000001; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x1000000, -0x200000000000001, 0x4, 1b, x2, 984,0)
+
+inst_146:
+// rs1_val == 67108864,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4000000; op2val:-0x200000000001; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4000000, -0x200000000001, 0x10, 3f, x2, 992,0)
+
+inst_147:
+// rs1_val == 134217728,
+// opcode: beq, op1:x10; op2:x11; op1val:0x8000000; op2val:0x40000; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x8000000, 0x40000, 0x2, 1b, x2, 1000,0)
+
+inst_148:
+// rs1_val == 268435456,
+// opcode: beq, op1:x10; op2:x11; op1val:0x10000000; op2val:-0x400000000001; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x10000000, -0x400000000001, 0x400, 1b, x2, 1008,0)
+
+inst_149:
+// rs1_val == 536870912,
+// opcode: beq, op1:x10; op2:x11; op1val:0x20000000; op2val:0x1; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x20000000, 0x1, 0x20, 3f, x2, 1016,0)
+
+inst_150:
+// rs1_val == 2147483648,
+// opcode: beq, op1:x10; op2:x11; op1val:0x80000000; op2val:-0x80000000001; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x80000000, -0x80000000001, 0x200, 3f, x2, 1024,0)
+
+inst_151:
+// rs1_val == 4294967296,
+// opcode: beq, op1:x10; op2:x11; op1val:0x100000000; op2val:-0x7; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x100000000, -0x7, 0x10, 3f, x2, 1032,0)
+
+inst_152:
+// rs1_val == 8589934592,
+// opcode: beq, op1:x10; op2:x11; op1val:0x200000000; op2val:-0x1000001; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x200000000, -0x1000001, 0x80, 3f, x2, 1040,0)
+
+inst_153:
+// rs1_val == 68719476736,
+// opcode: beq, op1:x10; op2:x11; op1val:0x1000000000; op2val:0x10000000; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x1000000000, 0x10000000, 0x4, 3f, x2, 1048,0)
+
+inst_154:
+// rs1_val == 274877906944,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4000000000; op2val:-0x100001; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4000000000, -0x100001, 0x20, 3f, x2, 1056,0)
+
+inst_155:
+// rs1_val == 549755813888,
+// opcode: beq, op1:x10; op2:x11; op1val:0x8000000000; op2val:-0x10000000001; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x8000000000, -0x10000000001, 0x4, 3f, x2, 1064,0)
+
+inst_156:
+// rs1_val == 4398046511104,
+// opcode: beq, op1:x10; op2:x11; op1val:0x40000000000; op2val:-0x101; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x40000000000, -0x101, 0x20, 3f, x2, 1072,0)
+
+inst_157:
+// rs1_val == 17592186044416,
+// opcode: beq, op1:x10; op2:x11; op1val:0x100000000000; op2val:-0x40000000001; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x100000000000, -0x40000000001, 0x4, 3f, x2, 1080,0)
+
+inst_158:
+// rs1_val == 35184372088832,
+// opcode: beq, op1:x10; op2:x11; op1val:0x200000000000; op2val:-0x800000001; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x200000000000, -0x800000001, 0x0, 3f, x2, 1088,0)
+
+inst_159:
+// rs1_val == 70368744177664,
+// opcode: beq, op1:x10; op2:x11; op1val:0x400000000000; op2val:0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x400000000000, 0xb504f333, 0x400, 1b, x2, 1096,0)
+
+inst_160:
+// rs1_val == 281474976710656,
+// opcode: beq, op1:x10; op2:x11; op1val:0x1000000000000; op2val:0x1000000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x1000000000000, 0x1000000000000000, 0x6, 3f, x2, 1104,0)
+
+inst_161:
+// rs1_val == 562949953421312,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2000000000000; op2val:0x800000000000; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2000000000000, 0x800000000000, 0x556, 1b, x2, 1112,0)
+
+inst_162:
+// rs1_val == 1125899906842624,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4000000000000; op2val:0x40000000; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4000000000000, 0x40000000, 0x8, 3f, x2, 1120,0)
+
+inst_163:
+// rs1_val == 2251799813685248,
+// opcode: beq, op1:x10; op2:x11; op1val:0x8000000000000; op2val:-0x20001; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x8000000000000, -0x20001, 0x8, 3f, x2, 1128,0)
+
+inst_164:
+// rs1_val == 4503599627370496,
+// opcode: beq, op1:x10; op2:x11; op1val:0x10000000000000; op2val:0x8000000000000; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x10000000000000, 0x8000000000000, 0x556, 1b, x2, 1136,0)
+
+inst_165:
+// rs1_val == 18014398509481984,
+// opcode: beq, op1:x10; op2:x11; op1val:0x40000000000000; op2val:-0x80000000000001; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x40000000000000, -0x80000000000001, 0x8, 3f, x2, 1144,0)
+
+inst_166:
+// rs1_val == 72057594037927936,
+// opcode: beq, op1:x10; op2:x11; op1val:0x100000000000000; op2val:0x80; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x100000000000000, 0x80, 0x20, 3f, x2, 1152,0)
+
+inst_167:
+// rs1_val == 144115188075855872,
+// opcode: beq, op1:x10; op2:x11; op1val:0x200000000000000; op2val:-0x101; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x200000000000000, -0x101, 0x2, 1b, x2, 1160,0)
+
+inst_168:
+// rs1_val == 1152921504606846976,
+// opcode: beq, op1:x10; op2:x11; op1val:0x1000000000000000; op2val:0x4000000; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x1000000000000000, 0x4000000, 0x6, 3f, x2, 1168,0)
+
+inst_169:
+// rs1_val == 2305843009213693952,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2000000000000000; op2val:-0x100000000001; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2000000000000000, -0x100000000001, 0x4, 3f, x2, 1176,0)
+
+inst_170:
+// rs1_val == -2,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x2; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x2, 0x5, 0x2, 3f, x2, 1184,0)
+
+inst_171:
+// rs1_val == -17,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x11; op2val:-0x5; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x11, -0x5, 0x2, 3f, x2, 1192,0)
+
+inst_172:
+// rs1_val == -33,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x21; op2val:0x1000; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x21, 0x1000, 0x40, 3f, x2, 1200,0)
+
+inst_173:
+// rs1_val == -65,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x41; op2val:0x40000000; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x41, 0x40000000, 0x400, 1b, x2, 1208,0)
+
+inst_174:
+// rs1_val == -2049,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x801; op2val:0x20000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x801, 0x20000000000000, 0x4, 1b, x2, 1216,0)
+
+inst_175:
+// rs1_val == -8193,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x2001; op2val:-0x8001; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x2001, -0x8001, 0x2, 1b, x2, 1224,0)
+
+inst_176:
+// rs1_val == -2097153,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x200001; op2val:0x200000000; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x200001, 0x200000000, 0x6, 1b, x2, 1232,0)
+
+inst_177:
+// rs1_val == -8388609,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x800001; op2val:-0x40000001; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x800001, -0x40000001, 0x10, 3f, x2, 1240,0)
+
+inst_178:
+// rs1_val == -134217729,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x8000001; op2val:-0x2000000001; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x8000001, -0x2000000001, 0x556, 1b, x2, 1248,0)
+
+inst_179:
+// rs1_val == -536870913,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x20000001; op2val:0x4000000000; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x20000001, 0x4000000000, 0x6, 3f, x2, 1256,0)
+
+inst_180:
+// rs1_val == -1073741825,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x40000001; op2val:-0x6; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x40000001, -0x6, 0x2, 3f, x2, 1264,0)
+
+inst_181:
+// rs1_val == -8589934593,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x200000001; op2val:-0x8000001; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x200000001, -0x8000001, 0x2, 1b, x2, 1272,0)
+
+inst_182:
+// rs1_val == -17179869185,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x400000001; op2val:-0x80000000000001; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x400000001, -0x80000000000001, 0x200, 3f, x2, 1280,0)
+
+inst_183:
+// rs1_val == -34359738369,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x800000001; op2val:0x10000000; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x800000001, 0x10000000, 0x0, 1b, x2, 1288,0)
+
+inst_184:
+// rs1_val == -68719476737,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x1000000001; op2val:0x8000000000; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x1000000001, 0x8000000000, 0x2, 3f, x2, 1296,0)
+
+inst_185:
+// rs1_val == -2199023255553,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x20000000001; op2val:0x10000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x20000000001, 0x10000000000000, 0x8, 1b, x2, 1304,0)
+
+inst_186:
+// rs1_val == -35184372088833,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x200000000001; op2val:0x4000000; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x200000000001, 0x4000000, 0x20, 3f, x2, 1312,0)
+
+inst_187:
+// rs1_val == -562949953421313,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x2000000000001; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x2000000000001, 0x0, 0x2, 1b, x2, 1320,0)
+
+inst_188:
+// rs1_val == -4503599627370497,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x10000000000001; op2val:0x80000000; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x10000000000001, 0x80000000, 0x10, 3f, x2, 1328,0)
+
+inst_189:
+// rs1_val == -9007199254740993,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x20000000000001; op2val:0x10000000000000; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x20000000000001, 0x10000000000000, 0x80, 3f, x2, 1336,0)
+
+inst_190:
+// rs1_val == -18014398509481985,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x40000000000001; op2val:-0x101; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x40000000000001, -0x101, 0x200, 3f, x2, 1344,0)
+
+inst_191:
+// rs1_val == -144115188075855873,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x200000000000001; op2val:-0x101; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x200000000000001, -0x101, 0x200, 3f, x2, 1352,0)
+
+inst_192:
+// rs1_val == -576460752303423489,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x800000000000001; op2val:-0xb504f332; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x800000000000001, -0xb504f332, 0x80, 3f, x2, 1360,0)
+
+inst_193:
+// rs1_val == -2305843009213693953,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x2000000000000001; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x2000000000000001, 0x6, 0x4, 1b, x2, 1368,0)
+
+inst_194:
+// rs1_val == 9223372036854775807,
+// opcode: beq, op1:x10; op2:x11; op1val:0x7fffffffffffffff; op2val:0x200; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x7fffffffffffffff, 0x200, 0x8, 3f, x2, 1376,0)
+
+inst_195:
+// rs1_val == -6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x100000001; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, -0x100000001, 0x556, 1b, x2, 1384,0)
+
+inst_196:
+// rs1_val==3 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x3; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x3, 0x10, 3f, x2, 1392,0)
+
+inst_197:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x5555555555555555, 0x556, 1b, x2, 1400,0)
+
+inst_198:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555556; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, -0x5555555555555556, 0x200, 3f, x2, 1408,0)
+
+inst_199:
+// rs1_val==3 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x5, 0x6, 3f, x2, 1416,0)
+
+inst_200:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333333; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x3333333333333333, 0x100, 3f, x2, 1424,0)
+
+inst_201:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x6666666666666666, 0x0, 3f, x2, 1432,0)
+
+inst_202:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f333; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, -0xb504f333, 0x20, 3f, x2, 1440,0)
+
+inst_203:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f333; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0xb504f333, 0x10, 3f, x2, 1448,0)
+
+inst_204:
+// rs1_val==3 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x2; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x2, 0x200, 3f, x2, 1456,0)
+
+inst_205:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555554; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x5555555555555554, 0x556, 1b, x2, 1464,0)
+
+inst_206:
+// rs1_val==3 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x0, 0x10, 3f, x2, 1472,0)
+
+inst_207:
+// rs1_val==3 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x4, 0x8, 1b, x2, 1480,0)
+
+inst_208:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x3333333333333332, 0x6, 3f, x2, 1488,0)
+
+inst_209:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666665; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x6666666666666665, 0x8, 1b, x2, 1496,0)
+
+inst_210:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f332; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0xb504f332, 0x40, 3f, x2, 1504,0)
+
+inst_211:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x5555555555555556, 0x556, 1b, x2, 1512,0)
+
+inst_212:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, -0x5555555555555555, 0x2, 3f, x2, 1520,0)
+
+inst_213:
+// rs1_val==3 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x6, 0x6, 3f, x2, 1528,0)
+
+inst_214:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333334; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x3333333333333334, 0x6, 3f, x2, 1536,0)
+
+inst_215:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666667; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0x6666666666666667, 0x20, 3f, x2, 1544,0)
+
+inst_216:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, -0xb504f332, 0x6, 1b, x2, 1552,0)
+
+inst_217:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3, 0xb504f334, 0x400, 1b, x2, 1560,0)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x3, 0x4, 3f, x2, 1568,0)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x4, 3f, x2, 1576,0)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x5, 0x100, 3f, x2, 1584,0)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333333; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x3333333333333333, 0x8, 1b, x2, 1592,0)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666666; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x6666666666666666, 0x40, 3f, x2, 1600,0)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, -0xb504f333, 0x6, 3f, x2, 1608,0)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f333; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0xb504f333, 0xa, 1b, x2, 1616,0)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x5555555555555554, 0x4, 3f, x2, 1624,0)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x0, 0x200, 3f, x2, 1632,0)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x4, 0x0, 3f, x2, 1640,0)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333332; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x3333333333333332, 0x100, 3f, x2, 1648,0)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x6666666666666665, 0x2, 1b, x2, 1656,0)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0xb504f332, 0x20, 3f, x2, 1664,0)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x5555555555555556, 0x556, 1b, x2, 1672,0)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, -0x5555555555555555, 0x2, 1b, x2, 1680,0)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x6, 0x80, 3f, x2, 1688,0)
+
+inst_234:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x3333333333333334, 0x2, 3f, x2, 1696,0)
+
+inst_235:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0x6666666666666667, 0x4, 3f, x2, 1704,0)
+
+inst_236:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, -0xb504f332, 0x6, 1b, x2, 1712,0)
+
+inst_237:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, 0xb504f334, 0x6, 1b, x2, 1720,0)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x3, 0x400, 1b, x2, 1728,0)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x5555555555555555, 0x2, 1b, x2, 1736,0)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, -0x5555555555555556, 0x40, 3f, x2, 1744,0)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x5, 0x556, 1b, x2, 1752,0)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x3333333333333333, 0x0, 1b, x2, 1760,0)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666666; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x6666666666666666, 0x20, 3f, x2, 1768,0)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, -0xb504f333, 0x6, 1b, x2, 1776,0)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0xb504f333, 0x80, 3f, x2, 1784,0)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x2, 0x40, 3f, x2, 1792,0)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x5555555555555554, 0x6, 1b, x2, 1800,0)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x0, 0x6, 1b, x2, 1808,0)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x4, 0x2, 3f, x2, 1816,0)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x3333333333333332, 0x400, 3f, x2, 1824,0)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666665; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x6666666666666665, 0x20, 3f, x2, 1832,0)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0xb504f332, 0x8, 3f, x2, 1840,0)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555556; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x5555555555555556, 0x20, 3f, x2, 1848,0)
+
+inst_254:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555555; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, -0x5555555555555555, 0x20, 3f, x2, 1856,0)
+
+inst_255:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x6, 0x2, 3f, x2, 1864,0)
+
+inst_256:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333334; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x3333333333333334, 0x20, 3f, x2, 1872,0)
+
+inst_257:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0x6666666666666667, 0x6, 3f, x2, 1880,0)
+
+inst_258:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, -0xb504f332, 0x400, 1b, x2, 1888,0)
+
+inst_259:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f334; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555556, 0xb504f334, 0x20, 3f, x2, 1896,0)
+
+inst_260:
+// rs1_val==5 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x3, 0x8, 3f, x2, 1904,0)
+
+inst_261:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x5555555555555555, 0x100, 3f, x2, 1912,0)
+
+inst_262:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, -0x5555555555555556, 0x400, 1b, x2, 1920,0)
+
+inst_263:
+// rs1_val==5 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x5; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x5, 0x200, 3f, x2, 1928,0)
+
+inst_264:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x3333333333333333, 0x4, 3f, x2, 1936,0)
+
+inst_265:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666666; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x6666666666666666, 0x20, 3f, x2, 1944,0)
+
+inst_266:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, -0xb504f333, 0x4, 3f, x2, 1952,0)
+
+inst_267:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0xb504f333, 0x6, 3f, x2, 1960,0)
+
+inst_268:
+// rs1_val==5 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x2; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x2, 0x200, 3f, x2, 1968,0)
+
+inst_269:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x5555555555555554, 0x4, 3f, x2, 1976,0)
+
+inst_270:
+// rs1_val==5 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x0, 0x4, 3f, x2, 1984,0)
+
+inst_271:
+// rs1_val==5 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x4, 0x2, 3f, x2, 1992,0)
+
+inst_272:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x3333333333333332, 0x2, 1b, x2, 2000,0)
+
+inst_273:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666665; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x6666666666666665, 0x556, 1b, x2, 2008,0)
+
+inst_274:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0xb504f332, 0x8, 1b, x2, 2016,0)
+
+inst_275:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x5555555555555556, 0x80, 3f, x2, 2024,0)
+
+inst_276:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555555; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, -0x5555555555555555, 0x40, 3f, x2, 2032,0)
+
+inst_277:
+// rs1_val==5 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x6, 0x20, 3f, x2, 2040,0)
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_278:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333334; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x3333333333333334, 0x10, 3f, x2, 0,0)
+
+inst_279:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0x6666666666666667, 0x4, 3f, x2, 8,0)
+
+inst_280:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, -0xb504f332, 0x400, 3f, x2, 16,0)
+
+inst_281:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f334; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5, 0xb504f334, 0x20, 3f, x2, 24,0)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x3, 0x6, 3f, x2, 32,0)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555555; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x5555555555555555, 0x80, 3f, x2, 40,0)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555556; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, -0x5555555555555556, 0x200, 3f, x2, 48,0)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x5, 0x400, 1b, x2, 56,0)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333333; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x2, 3f, x2, 64,0)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666666; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x6666666666666666, 0x2, 3f, x2, 72,0)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, -0xb504f333, 0x80, 3f, x2, 80,0)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0xb504f333, 0x0, 3f, x2, 88,0)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x2, 0x0, 3f, x2, 96,0)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x5555555555555554, 0x0, 3f, x2, 104,0)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x0, 0xa, 1b, x2, 112,0)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x4, 0x4, 3f, x2, 120,0)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x3333333333333332, 0x400, 3f, x2, 128,0)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x6666666666666665, 0x400, 3f, x2, 136,0)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0xb504f332, 0x556, 1b, x2, 144,0)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x5555555555555556, 0x8, 3f, x2, 152,0)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, -0x5555555555555555, 0x6, 1b, x2, 160,0)
+
+inst_299:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x6, 0x20, 3f, x2, 168,0)
+
+inst_300:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333334; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x3333333333333334, 0x10, 3f, x2, 176,0)
+
+inst_301:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666667; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0x6666666666666667, 0x100, 3f, x2, 184,0)
+
+inst_302:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, -0xb504f332, 0x2, 3f, x2, 192,0)
+
+inst_303:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f334; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333333, 0xb504f334, 0x10, 3f, x2, 200,0)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x3, 0x400, 1b, x2, 208,0)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x5555555555555555, 0x2, 1b, x2, 216,0)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, -0x5555555555555556, 0x40, 3f, x2, 224,0)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x5, 0x2, 1b, x2, 232,0)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333333; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x3333333333333333, 0x10, 3f, x2, 240,0)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666666; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x20, 3f, x2, 248,0)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, -0xb504f333, 0x8, 1b, x2, 256,0)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0xb504f333, 0x0, 3f, x2, 264,0)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x2, 0x8, 3f, x2, 272,0)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x5555555555555554, 0x4, 1b, x2, 280,0)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x0, 0x2, 3f, x2, 288,0)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x4; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x4, 0x100, 3f, x2, 296,0)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333332; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x3333333333333332, 0x4, 1b, x2, 304,0)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x6666666666666665, 0x6, 3f, x2, 312,0)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0xb504f332, 0x20, 3f, x2, 320,0)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x5555555555555556, 0x40, 3f, x2, 328,0)
+
+inst_320:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, -0x5555555555555555, 0x0, 1b, x2, 336,0)
+
+inst_321:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x6, 0x2, 1b, x2, 344,0)
+
+inst_322:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x3333333333333334, 0x8, 3f, x2, 352,0)
+
+inst_323:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0x6666666666666667, 0x8, 3f, x2, 360,0)
+
+inst_324:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, -0xb504f332, 0x0, 3f, x2, 368,0)
+
+inst_325:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666666, 0xb504f334, 0x6, 1b, x2, 376,0)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x3, 0x200, 3f, x2, 384,0)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x5555555555555555, 0x6, 3f, x2, 392,0)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, -0x5555555555555556, 0x8, 1b, x2, 400,0)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x5, 0x10, 3f, x2, 408,0)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333333; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x3333333333333333, 0x2, 3f, x2, 416,0)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666666; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x6666666666666666, 0x2, 1b, x2, 424,0)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0xb504f333, 0x80, 3f, x2, 432,0)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x2, 0x6, 3f, x2, 440,0)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x5555555555555554, 0x6, 1b, x2, 448,0)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x0, 0x10, 3f, x2, 456,0)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x4, 0x8, 1b, x2, 464,0)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x3333333333333332, 0x0, 3f, x2, 472,0)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x6666666666666665, 0x4, 1b, x2, 480,0)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0xb504f332, 0x8, 1b, x2, 488,0)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x5555555555555556, 0x2, 3f, x2, 496,0)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, -0x5555555555555555, 0x0, 3f, x2, 504,0)
+
+inst_342:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x6, 0x100, 3f, x2, 512,0)
+
+inst_343:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x3333333333333334, 0x8, 3f, x2, 520,0)
+
+inst_344:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0x6666666666666667, 0x0, 1b, x2, 528,0)
+
+inst_345:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f332; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, -0xb504f332, 0x100, 3f, x2, 536,0)
+
+inst_346:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f334; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f333, 0xb504f334, 0x4, 3f, x2, 544,0)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x3, 0x2, 3f, x2, 552,0)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x5555555555555555, 0x2, 1b, x2, 560,0)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, -0x5555555555555556, 0x40, 3f, x2, 568,0)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x5, 0x8, 3f, x2, 576,0)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x3333333333333333, 0x6, 3f, x2, 584,0)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666666; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x6666666666666666, 0x10, 3f, x2, 592,0)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f333; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, -0xb504f333, 0x100, 3f, x2, 600,0)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f333; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0xb504f333, 0x40, 3f, x2, 608,0)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x2, 0x4, 3f, x2, 616,0)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x5555555555555554, 0x6, 1b, x2, 624,0)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x0, 0x556, 1b, x2, 632,0)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x4, 0x2, 3f, x2, 640,0)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333332; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x3333333333333332, 0x100, 3f, x2, 648,0)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x6666666666666665, 0x0, 1b, x2, 656,0)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0xb504f332, 0x8, 1b, x2, 664,0)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x5555555555555556, 0x6, 3f, x2, 672,0)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, -0x5555555555555555, 0x100, 3f, x2, 680,0)
+
+inst_364:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x6, 0x2, 1b, x2, 688,0)
+
+inst_365:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x3333333333333334, 0x8, 3f, x2, 696,0)
+
+inst_366:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666667; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0x6666666666666667, 0x200, 3f, x2, 704,0)
+
+inst_367:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f332; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, -0xb504f332, 0xa, 1b, x2, 712,0)
+
+inst_368:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f334; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f333, 0xb504f334, 0x40, 3f, x2, 720,0)
+
+inst_369:
+// rs1_val==2 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x3, 0x20, 3f, x2, 728,0)
+
+inst_370:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555555; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x5555555555555555, 0x80, 3f, x2, 736,0)
+
+inst_371:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555556; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, -0x5555555555555556, 0x20, 3f, x2, 744,0)
+
+inst_372:
+// rs1_val==2 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x5, 0x400, 3f, x2, 752,0)
+
+inst_373:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333333; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x3333333333333333, 0x8, 1b, x2, 760,0)
+
+inst_374:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x6666666666666666, 0x0, 1b, x2, 768,0)
+
+inst_375:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f333; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, -0xb504f333, 0x20, 3f, x2, 776,0)
+
+inst_376:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f333; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0xb504f333, 0x200, 3f, x2, 784,0)
+
+inst_377:
+// rs1_val==2 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x2, 0x8, 3f, x2, 792,0)
+
+inst_378:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x5555555555555554, 0x4, 1b, x2, 800,0)
+
+inst_379:
+// rs1_val==2 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x0, 0x200, 3f, x2, 808,0)
+
+inst_380:
+// rs1_val==2 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x4; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x4, 0x100, 3f, x2, 816,0)
+
+inst_381:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333332; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x3333333333333332, 0x556, 1b, x2, 824,0)
+
+inst_382:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x6666666666666665, 0x6, 1b, x2, 832,0)
+
+inst_383:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0xb504f332, 0x2, 1b, x2, 840,0)
+
+inst_384:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555556; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x5555555555555556, 0x200, 3f, x2, 848,0)
+
+inst_385:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, -0x5555555555555555, 0x0, 3f, x2, 856,0)
+
+inst_386:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x3333333333333334, 0x400, 1b, x2, 864,0)
+
+inst_387:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0x6666666666666667, 0x4, 3f, x2, 872,0)
+
+inst_388:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f332; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, -0xb504f332, 0x40, 3f, x2, 880,0)
+
+inst_389:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2, 0xb504f334, 0x6, 1b, x2, 888,0)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x3, 0x2, 1b, x2, 896,0)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555555; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x5555555555555555, 0x200, 3f, x2, 904,0)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, -0x5555555555555556, 0x400, 3f, x2, 912,0)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x5, 0x556, 1b, x2, 920,0)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x3333333333333333, 0x6, 1b, x2, 928,0)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666666; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x6666666666666666, 0xa, 1b, x2, 936,0)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f333; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, -0xb504f333, 0x100, 3f, x2, 944,0)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0xb504f333, 0x6, 3f, x2, 952,0)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x2, 0x4, 3f, x2, 960,0)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555554; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x8, 1b, x2, 968,0)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x0, 0x556, 1b, x2, 976,0)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x4, 0x80, 3f, x2, 984,0)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333332; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x3333333333333332, 0x10, 3f, x2, 992,0)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666665; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x6666666666666665, 0x20, 3f, x2, 1000,0)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0xb504f332, 0x6, 3f, x2, 1008,0)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555556; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x200, 3f, x2, 1016,0)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555555; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, -0x5555555555555555, 0x40, 3f, x2, 1024,0)
+
+inst_407:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x6, 0x4, 1b, x2, 1032,0)
+
+inst_408:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x3333333333333334, 0x8, 3f, x2, 1040,0)
+
+inst_409:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0x6666666666666667, 0x6, 1b, x2, 1048,0)
+
+inst_410:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f332; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, -0xb504f332, 0x200, 3f, x2, 1056,0)
+
+inst_411:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555554, 0xb504f334, 0x6, 3f, x2, 1064,0)
+
+inst_412:
+// rs1_val==0 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x3, 0x0, 1b, x2, 1072,0)
+
+inst_413:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x5555555555555555, 0x2, 1b, x2, 1080,0)
+
+inst_414:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, -0x5555555555555556, 0x0, 3f, x2, 1088,0)
+
+inst_415:
+// rs1_val==0 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x5, 0x80, 3f, x2, 1096,0)
+
+inst_416:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x3333333333333333, 0x6, 1b, x2, 1104,0)
+
+inst_417:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666666; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x6666666666666666, 0x2, 3f, x2, 1112,0)
+
+inst_418:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f333; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, -0xb504f333, 0xa, 1b, x2, 1120,0)
+
+inst_419:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0xb504f333, 0x6, 1b, x2, 1128,0)
+
+inst_420:
+// rs1_val==0 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x2, 0x2, 3f, x2, 1136,0)
+
+inst_421:
+// rs1_val==4 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x3, 0x2, 1b, x2, 1144,0)
+
+inst_422:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x5555555555555555, 0x4, 3f, x2, 1152,0)
+
+inst_423:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, -0x5555555555555556, 0x556, 1b, x2, 1160,0)
+
+inst_424:
+// rs1_val==4 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x5; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x5, 0xa, 1b, x2, 1168,0)
+
+inst_425:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x3333333333333333, 0x4, 1b, x2, 1176,0)
+
+inst_426:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x6666666666666666, 0x6, 1b, x2, 1184,0)
+
+inst_427:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, -0xb504f333, 0x4, 3f, x2, 1192,0)
+
+inst_428:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0xb504f333, 0x8, 1b, x2, 1200,0)
+
+inst_429:
+// rs1_val==4 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x2, 0x10, 3f, x2, 1208,0)
+
+inst_430:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x5555555555555554, 0x6, 3f, x2, 1216,0)
+
+inst_431:
+// rs1_val==4 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x0, 0xa, 1b, x2, 1224,0)
+
+inst_432:
+// rs1_val==4 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x4, 0x2, 3f, x2, 1232,0)
+
+inst_433:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x3333333333333332, 0x2, 1b, x2, 1240,0)
+
+inst_434:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x6666666666666665, 0x6, 1b, x2, 1248,0)
+
+inst_435:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0xb504f332, 0x556, 1b, x2, 1256,0)
+
+inst_436:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x5555555555555556, 0x400, 1b, x2, 1264,0)
+
+inst_437:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, -0x5555555555555555, 0x8, 3f, x2, 1272,0)
+
+inst_438:
+// rs1_val==4 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x6, 0x4, 1b, x2, 1280,0)
+
+inst_439:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x3333333333333334, 0x4, 1b, x2, 1288,0)
+
+inst_440:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0x6666666666666667, 0x4, 3f, x2, 1296,0)
+
+inst_441:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, -0xb504f332, 0x8, 3f, x2, 1304,0)
+
+inst_442:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f334; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x4, 0xb504f334, 0x2, 3f, x2, 1312,0)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x3, 0x4, 3f, x2, 1320,0)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x5555555555555555, 0x6, 3f, x2, 1328,0)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, -0x5555555555555556, 0x0, 3f, x2, 1336,0)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x5, 0x80, 3f, x2, 1344,0)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333333; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x3333333333333333, 0x20, 3f, x2, 1352,0)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666666; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x6666666666666666, 0x400, 3f, x2, 1360,0)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f333; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, -0xb504f333, 0x10, 3f, x2, 1368,0)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f333; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0xb504f333, 0x20, 3f, x2, 1376,0)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x2, 0x400, 1b, x2, 1384,0)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555554; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x5555555555555554, 0x10, 3f, x2, 1392,0)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x0, 0x8, 1b, x2, 1400,0)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x4, 0x4, 3f, x2, 1408,0)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333332; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x3333333333333332, 0xa, 1b, x2, 1416,0)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x6666666666666665, 0x400, 1b, x2, 1424,0)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0xb504f332, 0x6, 3f, x2, 1432,0)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x5555555555555556, 0x80, 3f, x2, 1440,0)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555555; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, -0x5555555555555555, 0x200, 3f, x2, 1448,0)
+
+inst_460:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x6, 0x100, 3f, x2, 1456,0)
+
+inst_461:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333334; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x3333333333333334, 0x6, 1b, x2, 1464,0)
+
+inst_462:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0x6666666666666667, 0x8, 3f, x2, 1472,0)
+
+inst_463:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, -0xb504f332, 0x6, 3f, x2, 1480,0)
+
+inst_464:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f334; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333332, 0xb504f334, 0x10, 3f, x2, 1488,0)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x3, 0x4, 3f, x2, 1496,0)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x5555555555555555, 0x6, 1b, x2, 1504,0)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, -0x5555555555555556, 0x4, 1b, x2, 1512,0)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x5, 0x400, 1b, x2, 1520,0)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333333; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x3333333333333333, 0x10, 3f, x2, 1528,0)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666666; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x6666666666666666, 0x200, 3f, x2, 1536,0)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, -0xb504f333, 0x0, 3f, x2, 1544,0)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f333; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0xb504f333, 0x556, 1b, x2, 1552,0)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x2, 0xa, 1b, x2, 1560,0)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x5555555555555554, 0x4, 1b, x2, 1568,0)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x0, 0x400, 1b, x2, 1576,0)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x4, 0x6, 1b, x2, 1584,0)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333332; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x3333333333333332, 0x10, 3f, x2, 1592,0)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x2, 3f, x2, 1600,0)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0xb504f332, 0x0, 3f, x2, 1608,0)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x5555555555555556, 0x0, 3f, x2, 1616,0)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, -0x5555555555555555, 0x6, 1b, x2, 1624,0)
+
+inst_482:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x6, 0x40, 3f, x2, 1632,0)
+
+inst_483:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333334; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x3333333333333334, 0x20, 3f, x2, 1640,0)
+
+inst_484:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666667; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0x6666666666666667, 0x10, 3f, x2, 1648,0)
+
+inst_485:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, -0xb504f332, 0x4, 3f, x2, 1656,0)
+
+inst_486:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f334; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666665, 0xb504f334, 0x20, 3f, x2, 1664,0)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x3, 0x200, 3f, x2, 1672,0)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555555; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x5555555555555555, 0x80, 3f, x2, 1680,0)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555556; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, -0x5555555555555556, 0x20, 3f, x2, 1688,0)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x5, 0x40, 3f, x2, 1696,0)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333333; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x3333333333333333, 0x10, 3f, x2, 1704,0)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666666; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x6666666666666666, 0x2, 3f, x2, 1712,0)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, -0xb504f333, 0x4, 1b, x2, 1720,0)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0xb504f333, 0x0, 3f, x2, 1728,0)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x2, 0x556, 1b, x2, 1736,0)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x5555555555555554, 0x0, 1b, x2, 1744,0)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x0, 0x200, 3f, x2, 1752,0)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x4, 0x8, 3f, x2, 1760,0)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x3333333333333332, 0x6, 1b, x2, 1768,0)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x6666666666666665, 0x2, 3f, x2, 1776,0)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0xb504f332, 0x8, 3f, x2, 1784,0)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555556; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x5555555555555556, 0xa, 1b, x2, 1792,0)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555555; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, -0x5555555555555555, 0x10, 3f, x2, 1800,0)
+
+inst_504:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x6, 0x2, 3f, x2, 1808,0)
+
+inst_505:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x3333333333333334, 0x2, 3f, x2, 1816,0)
+
+inst_506:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666667; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0x6666666666666667, 0x400, 3f, x2, 1824,0)
+
+inst_507:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f332; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, -0xb504f332, 0xa, 1b, x2, 1832,0)
+
+inst_508:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f332, 0xb504f334, 0x0, 1b, x2, 1840,0)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x3, 0x400, 1b, x2, 1848,0)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x5555555555555555, 0x4, 1b, x2, 1856,0)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, -0x5555555555555556, 0x2, 1b, x2, 1864,0)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x5, 0x40, 3f, x2, 1872,0)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x3333333333333333, 0x0, 3f, x2, 1880,0)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x6666666666666666, 0x4, 1b, x2, 1888,0)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, -0xb504f333, 0x8, 1b, x2, 1896,0)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0xb504f333, 0x8, 1b, x2, 1904,0)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x2; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x2, 0x200, 3f, x2, 1912,0)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555554; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x200, 3f, x2, 1920,0)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x0; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x0, 0x20, 3f, x2, 1928,0)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x4, 0x20, 3f, x2, 1936,0)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x3333333333333332, 0x2, 1b, x2, 1944,0)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x6666666666666665, 0x400, 1b, x2, 1952,0)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0xb504f332, 0x8, 1b, x2, 1960,0)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555556; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x20, 3f, x2, 1968,0)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, -0x5555555555555555, 0x400, 1b, x2, 1976,0)
+
+inst_526:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x6, 0x40, 3f, x2, 1984,0)
+
+inst_527:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x3333333333333334, 0x4, 3f, x2, 1992,0)
+
+inst_528:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0x6666666666666667, 0x4, 1b, x2, 2000,0)
+
+inst_529:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, -0xb504f332, 0x6, 1b, x2, 2008,0)
+
+inst_530:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f334; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555556, 0xb504f334, 0x8, 1b, x2, 2016,0)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x3, 0x20, 3f, x2, 2024,0)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x5555555555555555, 0x8, 3f, x2, 2032,0)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, -0x5555555555555556, 0x2, 1b, x2, 2040,0)
+RVTEST_SIGBASE( x2,signature_x2_2)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x5, 0x200, 3f, x2, 0,0)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333333; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x3333333333333333, 0xa, 1b, x2, 8,0)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666666; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x6666666666666666, 0xa, 1b, x2, 16,0)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f333; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, -0xb504f333, 0x200, 3f, x2, 24,0)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f333; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0xb504f333, 0xa, 1b, x2, 32,0)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x2, 0x400, 3f, x2, 40,0)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555554; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x5555555555555554, 0x8, 3f, x2, 48,0)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x0, 0x40, 3f, x2, 56,0)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x4, 0x6, 1b, x2, 64,0)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x3333333333333332, 0x8, 3f, x2, 72,0)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x6666666666666665, 0x6, 3f, x2, 80,0)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0xb504f332, 0x6, 1b, x2, 88,0)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x5555555555555556, 0x0, 1b, x2, 96,0)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555555; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, -0x5555555555555555, 0x10, 3f, x2, 104,0)
+
+inst_548:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x6, 0x2, 1b, x2, 112,0)
+
+inst_549:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333334; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x3333333333333334, 0x0, 3f, x2, 120,0)
+
+inst_550:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0x6666666666666667, 0x8, 1b, x2, 128,0)
+
+inst_551:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, -0xb504f332, 0x0, 3f, x2, 136,0)
+
+inst_552:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f334; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x5555555555555555, 0xb504f334, 0x8, 1b, x2, 144,0)
+
+inst_553:
+// rs1_val==6 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x3, 0x4, 1b, x2, 152,0)
+
+inst_554:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x5555555555555555, 0x0, 3f, x2, 160,0)
+
+inst_555:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, -0x5555555555555556, 0x8, 3f, x2, 168,0)
+
+inst_556:
+// rs1_val==6 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x5; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x5, 0x200, 3f, x2, 176,0)
+
+inst_557:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333333; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x3333333333333333, 0x80, 3f, x2, 184,0)
+
+inst_558:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x6666666666666666, 0x4, 1b, x2, 192,0)
+
+inst_559:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, -0xb504f333, 0x400, 3f, x2, 200,0)
+
+inst_560:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f333; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0xb504f333, 0x100, 3f, x2, 208,0)
+
+inst_561:
+// rs1_val==6 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x2, 0x4, 3f, x2, 216,0)
+
+inst_562:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x5555555555555554, 0x2, 1b, x2, 224,0)
+
+inst_563:
+// rs1_val==6 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x0, 0x400, 1b, x2, 232,0)
+
+inst_564:
+// rs1_val==6 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x4, 0x4, 3f, x2, 240,0)
+
+inst_565:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333332; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x3333333333333332, 0x100, 3f, x2, 248,0)
+
+inst_566:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x6666666666666665, 0x400, 1b, x2, 256,0)
+
+inst_567:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0xb504f332, 0x20, 3f, x2, 264,0)
+
+inst_568:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x5555555555555556, 0x0, 1b, x2, 272,0)
+
+inst_569:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, -0x5555555555555555, 0x4, 1b, x2, 280,0)
+
+inst_570:
+// rs1_val==6 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x6; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x6, 0x40, 3f, x2, 288,0)
+
+inst_571:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x3333333333333334, 0x8, 3f, x2, 296,0)
+
+inst_572:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666667; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0x6666666666666667, 0x400, 3f, x2, 304,0)
+
+inst_573:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, -0xb504f332, 0x10, 3f, x2, 312,0)
+
+inst_574:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f334; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6, 0xb504f334, 0x80, 3f, x2, 320,0)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x3, 0x20, 3f, x2, 328,0)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x5555555555555555, 0x2, 1b, x2, 336,0)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555556; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, -0x5555555555555556, 0x20, 3f, x2, 344,0)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x5, 0x10, 3f, x2, 352,0)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333333; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x3333333333333333, 0x2, 1b, x2, 360,0)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666666; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x6666666666666666, 0x556, 1b, x2, 368,0)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, -0xb504f333, 0x0, 1b, x2, 376,0)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f333; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0xb504f333, 0xa, 1b, x2, 384,0)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x2, 0x8, 3f, x2, 392,0)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555554; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x5555555555555554, 0x40, 3f, x2, 400,0)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x0, 0x0, 3f, x2, 408,0)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x4, 0x0, 1b, x2, 416,0)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333332; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x3333333333333332, 0x556, 1b, x2, 424,0)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666665; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x6666666666666665, 0x200, 3f, x2, 432,0)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0xb504f332, 0x4, 1b, x2, 440,0)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x5555555555555556, 0x100, 3f, x2, 448,0)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555555; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, -0x5555555555555555, 0x80, 3f, x2, 456,0)
+
+inst_592:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x6, 0x80, 3f, x2, 464,0)
+
+inst_593:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x8, 1b, x2, 472,0)
+
+inst_594:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666667; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0x6666666666666667, 0x400, 3f, x2, 480,0)
+
+inst_595:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f332; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, -0xb504f332, 0xa, 1b, x2, 488,0)
+
+inst_596:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x3333333333333334, 0xb504f334, 0x6, 3f, x2, 496,0)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x3, 0x2, 1b, x2, 504,0)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x5555555555555555, 0x6, 1b, x2, 512,0)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, -0x5555555555555556, 0x4, 1b, x2, 520,0)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x5, 0x400, 1b, x2, 528,0)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x3333333333333333, 0x4, 3f, x2, 536,0)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x0, 1b, x2, 544,0)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f333; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, -0xb504f333, 0x20, 3f, x2, 552,0)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f333; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0xb504f333, 0x10, 3f, x2, 560,0)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x2, 0x6, 3f, x2, 568,0)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x5555555555555554, 0x2, 1b, x2, 576,0)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x0, 0x2, 1b, x2, 584,0)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x4, 0x2, 1b, x2, 592,0)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333332; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x3333333333333332, 0x100, 3f, x2, 600,0)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x0, 3f, x2, 608,0)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f332; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0xb504f332, 0x200, 3f, x2, 616,0)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x5555555555555556, 0x6, 3f, x2, 624,0)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555555; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, -0x5555555555555555, 0x200, 3f, x2, 632,0)
+
+inst_614:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x6, 0xa, 1b, x2, 640,0)
+
+inst_615:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333334; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x3333333333333334, 0xa, 1b, x2, 648,0)
+
+inst_616:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x8, 1b, x2, 656,0)
+
+inst_617:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, -0xb504f332, 0x2, 3f, x2, 664,0)
+
+inst_618:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f334; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x6666666666666667, 0xb504f334, 0x4, 1b, x2, 672,0)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x3, 0x0, 1b, x2, 680,0)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x5555555555555555, 0x8, 3f, x2, 688,0)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555556; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, -0x5555555555555556, 0x200, 3f, x2, 696,0)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x5, 0x200, 3f, x2, 704,0)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333333; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x3333333333333333, 0x8, 3f, x2, 712,0)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666666; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x6666666666666666, 0x8, 1b, x2, 720,0)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, -0xb504f333, 0x4, 3f, x2, 728,0)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0xb504f333, 0x2, 1b, x2, 736,0)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x2, 0x0, 1b, x2, 744,0)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x5555555555555554, 0x6, 3f, x2, 752,0)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x0, 0x8, 1b, x2, 760,0)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x4, 0x400, 3f, x2, 768,0)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333332; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x3333333333333332, 0x556, 1b, x2, 776,0)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x6666666666666665, 0x0, 3f, x2, 784,0)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0xb504f332, 0x556, 1b, x2, 792,0)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x5555555555555556, 0x8, 3f, x2, 800,0)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, -0x5555555555555555, 0x8, 3f, x2, 808,0)
+
+inst_636:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x6, 0x200, 3f, x2, 816,0)
+
+inst_637:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333334; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x3333333333333334, 0x80, 3f, x2, 824,0)
+
+inst_638:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666667; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0x6666666666666667, 0x2, 3f, x2, 832,0)
+
+inst_639:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f332; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, -0xb504f332, 0x200, 3f, x2, 840,0)
+
+inst_640:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0xb504f332, 0xb504f334, 0x6, 3f, x2, 848,0)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x3, 0x8, 1b, x2, 856,0)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x5555555555555555, 0x0, 3f, x2, 864,0)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, -0x5555555555555556, 0x80, 3f, x2, 872,0)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x5, 0x100, 3f, x2, 880,0)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x3333333333333333, 0x6, 3f, x2, 888,0)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666666; immval:0x10; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x6666666666666666, 0x10, 3f, x2, 896,0)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, -0xb504f333, 0x8, 3f, x2, 904,0)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f333; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0xb504f333, 0x556, 1b, x2, 912,0)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x2; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x2, 0x80, 3f, x2, 920,0)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x5555555555555554, 0x0, 1b, x2, 928,0)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x0, 0x100, 3f, x2, 936,0)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x4, 0x556, 1b, x2, 944,0)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x3333333333333332, 0x400, 1b, x2, 952,0)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x6666666666666665, 0x4, 3f, x2, 960,0)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f332; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0xb504f332, 0x200, 3f, x2, 968,0)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x5555555555555556, 0x100, 3f, x2, 976,0)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, -0x5555555555555555, 0x6, 1b, x2, 984,0)
+
+inst_658:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x6, 0x2, 1b, x2, 992,0)
+
+inst_659:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333334; immval:0x20; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x3333333333333334, 0x20, 3f, x2, 1000,0)
+
+inst_660:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666667; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0x6666666666666667, 0x556, 1b, x2, 1008,0)
+
+inst_661:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f332; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, -0xb504f332, 0x40, 3f, x2, 1016,0)
+
+inst_662:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f334; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0xb504f334, 0xb504f334, 0x200, 3f, x2, 1024,0)
+
+inst_663:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555554; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x5555555555555554, 0x400, 1b, x2, 1032,0)
+
+inst_664:
+// rs1_val==0 and rs2_val==0,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x0, 0x40, 3f, x2, 1040,0)
+
+inst_665:
+// rs1_val==0 and rs2_val==4,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x4, 0x80, 3f, x2, 1048,0)
+
+inst_666:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333332; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x3333333333333332, 0x556, 1b, x2, 1056,0)
+
+inst_667:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666665; immval:0x556; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x6666666666666665, 0x556, 1b, x2, 1064,0)
+
+inst_668:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0xb504f332, 0x4, 1b, x2, 1072,0)
+
+inst_669:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x5555555555555556, 0x2, 3f, x2, 1080,0)
+
+inst_670:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555555; immval:0xa; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, -0x5555555555555555, 0xa, 1b, x2, 1088,0)
+
+inst_671:
+// rs1_val==0 and rs2_val==6,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x6, 0x0, 1b, x2, 1096,0)
+
+inst_672:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333334; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x3333333333333334, 0x200, 3f, x2, 1104,0)
+
+inst_673:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666667; immval:0x80; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0x6666666666666667, 0x80, 3f, x2, 1112,0)
+
+inst_674:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, -0xb504f332, 0x400, 3f, x2, 1120,0)
+
+inst_675:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: beq, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f334; immval:0x200; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x0, 0xb504f334, 0x200, 3f, x2, 1128,0)
+
+inst_676:
+// rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs2_val == -2305843009213693953, rs1_val == 6148914691236517205, rs1_val > rs2_val and imm_val < 0 and imm_val & 0x03 == 0
+// opcode: beq, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x2000000000000001; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x5555555555555555, -0x2000000000000001, 0x4, 1b, x2, 1136,0)
+
+inst_677:
+// rs2_val == 8192,
+// opcode: beq, op1:x10; op2:x11; op1val:-0x8000000000000000; op2val:0x2000; immval:0x4; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, -0x8000000000000000, 0x2000, 0x4, 1b, x2, 1144,0)
+
+inst_678:
+// rs2_val == 8388608, rs1_val == 137438953472
+// opcode: beq, op1:x10; op2:x11; op1val:0x2000000000; op2val:0x800000; immval:0x2; align:0
+TEST_BRANCH_OP(beq, x4, x10, x11, 0x2000000000, 0x800000, 0x2, 3f, x2, 1152,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_2:
+ .fill 145*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/bge-01.S b/riscof/suite/rv64i_m/I/bge-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..6a12eea429147ef8db003999cac746eac2565811
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/bge-01.S
@@ -0,0 +1,3454 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the bge instruction of the RISC-V I extension for the bge covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",bge)
+
+RVTEST_SIGBASE( x18,signature_x18_1)
+
+inst_0:
+// rs1 != rs2, rs1==x27, rs2==x0, rs1_val > 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs2_val == 64, rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs1_val == 4503599627370496
+// opcode: bge, op1:x27; op2:x0; op1val:0x10000000000000; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x21, x27, x0, 0x10000000000000, 0x0, 0x80, 3f, x18, 0,0)
+
+inst_1:
+// rs1 == rs2, rs1==x8, rs2==x8, rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs2_val == -144115188075855873, rs1_val == 8
+// opcode: bge, op1:x8; op2:x8; op1val:0x8; op2val:0x8; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x21, x8, x8, 0x8, 0x8, 0x200, 3f, x18, 8,0)
+
+inst_2:
+// rs1==x2, rs2==x27, rs1_val < 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs1_val < rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs2_val == -5, rs1_val == -4398046511105
+// opcode: bge, op1:x2; op2:x27; op1val:-0x40000000001; op2val:-0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x21, x2, x27, -0x40000000001, -0x5, 0x0, 1b, x18, 16,0)
+
+inst_3:
+// rs1==x28, rs2==x3, rs1_val < 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val == -65, rs2_val == 16777216
+// opcode: bge, op1:x28; op2:x3; op1val:-0x41; op2val:0x1000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x21, x28, x3, -0x41, 0x1000000, 0x4, 1b, x18, 24,0)
+
+inst_4:
+// rs1==x26, rs2==x9, rs1_val == rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == 1024, rs1_val == 1024
+// opcode: bge, op1:x26; op2:x9; op1val:0x400; op2val:0x400; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x21, x26, x9, 0x400, 0x400, 0x8, 3f, x18, 32,0)
+
+inst_5:
+// rs1==x16, rs2==x20, rs1_val == rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs2_val == -4294967297, rs1_val == -4294967297
+// opcode: bge, op1:x16; op2:x20; op1val:-0x100000001; op2val:-0x100000001; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x21, x16, x20, -0x100000001, -0x100000001, 0x8, 1b, x18, 40,0)
+
+inst_6:
+// rs1==x14, rs2==x10, rs1_val > rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs1_val == 70368744177664, rs2_val == -536870913
+// opcode: bge, op1:x14; op2:x10; op1val:0x400000000000; op2val:-0x20000001; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x21, x14, x10, 0x400000000000, -0x20000001, 0x8, 1b, x18, 48,0)
+
+inst_7:
+// rs1==x4, rs2==x16, rs1_val < rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs1_val == -274877906945, rs2_val == -268435457
+// opcode: bge, op1:x4; op2:x16; op1val:-0x4000000001; op2val:-0x10000001; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x21, x4, x16, -0x4000000001, -0x10000001, 0x80, 3f, x18, 56,0)
+
+inst_8:
+// rs1==x25, rs2==x28, rs2_val == 1, rs1_val == 4294967296
+// opcode: bge, op1:x25; op2:x28; op1val:0x100000000; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x21, x25, x28, 0x100000000, 0x1, 0x8, 3f, x18, 64,0)
+
+inst_9:
+// rs1==x5, rs2==x31, rs2_val == 2, rs1_val == -140737488355329
+// opcode: bge, op1:x5; op2:x31; op1val:-0x800000000001; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x21, x5, x31, -0x800000000001, 0x2, 0x4, 1b, x18, 72,0)
+
+inst_10:
+// rs1==x22, rs2==x19, rs2_val == 4, rs1_val == -16385
+// opcode: bge, op1:x22; op2:x19; op1val:-0x4001; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x21, x22, x19, -0x4001, 0x4, 0x6, 1b, x18, 80,0)
+
+inst_11:
+// rs1==x23, rs2==x12, rs2_val == 8,
+// opcode: bge, op1:x23; op2:x12; op1val:-0xb504f333; op2val:0x8; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x21, x23, x12, -0xb504f333, 0x8, 0x80, 3f, x18, 88,0)
+
+inst_12:
+// rs1==x12, rs2==x26, rs2_val == 16, rs1_val == -17179869185
+// opcode: bge, op1:x12; op2:x26; op1val:-0x400000001; op2val:0x10; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x21, x12, x26, -0x400000001, 0x10, 0x4, 1b, x18, 96,0)
+
+inst_13:
+// rs1==x1, rs2==x29, rs2_val == 32,
+// opcode: bge, op1:x1; op2:x29; op1val:0x5; op2val:0x20; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x21, x1, x29, 0x5, 0x20, 0x6, 1b, x18, 104,0)
+
+inst_14:
+// rs1==x30, rs2==x2, rs2_val == 128, rs1_val == -35184372088833
+// opcode: bge, op1:x30; op2:x2; op1val:-0x200000000001; op2val:0x80; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x21, x30, x2, -0x200000000001, 0x80, 0x40, 3f, x18, 112,0)
+
+inst_15:
+// rs1==x9, rs2==x25, rs2_val == 256, rs1_val == 4398046511104
+// opcode: bge, op1:x9; op2:x25; op1val:0x40000000000; op2val:0x100; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x21, x9, x25, 0x40000000000, 0x100, 0x20, 3f, x18, 120,0)
+
+inst_16:
+// rs1==x29, rs2==x15, rs2_val == 512, rs1_val == 17179869184
+// opcode: bge, op1:x29; op2:x15; op1val:0x400000000; op2val:0x200; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x21, x29, x15, 0x400000000, 0x200, 0x2, 1b, x18, 128,0)
+
+inst_17:
+// rs1==x31, rs2==x6, rs2_val == 2048, rs1_val == -2251799813685249
+// opcode: bge, op1:x31; op2:x6; op1val:-0x8000000000001; op2val:0x800; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x21, x31, x6, -0x8000000000001, 0x800, 0x10, 3f, x18, 136,0)
+
+inst_18:
+// rs1==x10, rs2==x30, rs2_val == 4096, rs1_val == 262144
+// opcode: bge, op1:x10; op2:x30; op1val:0x40000; op2val:0x1000; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x21, x10, x30, 0x40000, 0x1000, 0x8, 3f, x18, 144,0)
+
+inst_19:
+// rs1==x0, rs2==x5, rs2_val == 8192, rs1_val == 131072
+// opcode: bge, op1:x0; op2:x5; op1val:0x0; op2val:0x2000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x21, x0, x5, 0x0, 0x2000, 0x400, 1b, x18, 152,0)
+
+inst_20:
+// rs1==x17, rs2==x13, rs2_val == 16384, rs1_val == 2
+// opcode: bge, op1:x17; op2:x13; op1val:0x2; op2val:0x4000; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x21, x17, x13, 0x2, 0x4000, 0x2, 3f, x18, 160,0)
+
+inst_21:
+// rs1==x13, rs2==x1, rs2_val == 32768, rs1_val == 1125899906842624
+// opcode: bge, op1:x13; op2:x1; op1val:0x4000000000000; op2val:0x8000; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x21, x13, x1, 0x4000000000000, 0x8000, 0xa, 1b, x18, 168,0)
+
+inst_22:
+// rs1==x7, rs2==x11, rs2_val == 65536, rs1_val == -262145
+// opcode: bge, op1:x7; op2:x11; op1val:-0x40001; op2val:0x10000; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x21, x7, x11, -0x40001, 0x10000, 0x100, 3f, x18, 176,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_23:
+// rs1==x6, rs2==x22, rs2_val == 131072, rs1_val == -1152921504606846977
+// opcode: bge, op1:x6; op2:x22; op1val:-0x1000000000000001; op2val:0x20000; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x6, x22, -0x1000000000000001, 0x20000, 0x0, 3f, x1, 0,0)
+
+inst_24:
+// rs1==x24, rs2==x21, rs2_val == 262144, rs1_val == 72057594037927936
+// opcode: bge, op1:x24; op2:x21; op1val:0x100000000000000; op2val:0x40000; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x24, x21, 0x100000000000000, 0x40000, 0x2, 3f, x1, 8,0)
+
+inst_25:
+// rs1==x11, rs2==x7, rs2_val == 524288, rs1_val == 2097152
+// opcode: bge, op1:x11; op2:x7; op1val:0x200000; op2val:0x80000; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x11, x7, 0x200000, 0x80000, 0x2, 1b, x1, 16,0)
+
+inst_26:
+// rs1==x19, rs2==x17, rs2_val == 1048576,
+// opcode: bge, op1:x19; op2:x17; op1val:0x20000; op2val:0x100000; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x19, x17, 0x20000, 0x100000, 0xa, 1b, x1, 24,0)
+
+inst_27:
+// rs1==x20, rs2==x23, rs2_val == 2097152,
+// opcode: bge, op1:x20; op2:x23; op1val:0x4000000000000; op2val:0x200000; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x20, x23, 0x4000000000000, 0x200000, 0x0, 3f, x1, 32,0)
+
+inst_28:
+// rs1==x21, rs2==x14, rs2_val == 4194304, rs1_val == 8796093022208
+// opcode: bge, op1:x21; op2:x14; op1val:0x80000000000; op2val:0x400000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x21, x14, 0x80000000000, 0x400000, 0x400, 3f, x1, 40,0)
+
+inst_29:
+// rs1==x3, rs2==x18, rs2_val == 8388608, rs1_val == -18014398509481985
+// opcode: bge, op1:x3; op2:x18; op1val:-0x40000000000001; op2val:0x800000; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x3, x18, -0x40000000000001, 0x800000, 0x2, 3f, x1, 48,0)
+
+inst_30:
+// rs1==x15, rs2==x4, rs2_val == 33554432, rs1_val == -16777217
+// opcode: bge, op1:x15; op2:x4; op1val:-0x1000001; op2val:0x2000000; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x15, x4, -0x1000001, 0x2000000, 0x2, 3f, x1, 56,0)
+
+inst_31:
+// rs1==x18, rs2==x24, rs2_val == 67108864, rs1_val == 4194304
+// opcode: bge, op1:x18; op2:x24; op1val:0x400000; op2val:0x4000000; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x18, x24, 0x400000, 0x4000000, 0x8, 3f, x1, 64,0)
+
+inst_32:
+// rs2_val == 134217728, rs1_val == -513
+// opcode: bge, op1:x10; op2:x11; op1val:-0x201; op2val:0x8000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x201, 0x8000000, 0x4, 3f, x1, 72,0)
+
+inst_33:
+// rs2_val == 268435456,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x10000000; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x10000000, 0x100, 3f, x1, 80,0)
+
+inst_34:
+// rs2_val == 536870912, rs1_val == -137438953473
+// opcode: bge, op1:x10; op2:x11; op1val:-0x2000000001; op2val:0x20000000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x2000000001, 0x20000000, 0x400, 1b, x1, 88,0)
+
+inst_35:
+// rs2_val == 1073741824, rs1_val == 128
+// opcode: bge, op1:x10; op2:x11; op1val:0x80; op2val:0x40000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x80, 0x40000000, 0x4, 3f, x1, 96,0)
+
+inst_36:
+// rs2_val == 2147483648, rs1_val == 256
+// opcode: bge, op1:x10; op2:x11; op1val:0x100; op2val:0x80000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x100, 0x80000000, 0x4, 1b, x1, 104,0)
+
+inst_37:
+// rs2_val == 4294967296, rs1_val == -36028797018963969
+// opcode: bge, op1:x10; op2:x11; op1val:-0x80000000000001; op2val:0x100000000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x80000000000001, 0x100000000, 0x400, 1b, x1, 112,0)
+
+inst_38:
+// rs2_val == 8589934592,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x4000000000000000; op2val:0x200000000; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x4000000000000000, 0x200000000, 0x10, 3f, x1, 120,0)
+
+inst_39:
+// rs2_val == 17179869184, rs1_val == 288230376151711744
+// opcode: bge, op1:x10; op2:x11; op1val:0x400000000000000; op2val:0x400000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x400000000000000, 0x400000000, 0x4, 1b, x1, 128,0)
+
+inst_40:
+// rs2_val == 34359738368,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:0x800000000; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x1000000000000001, 0x800000000, 0x6, 1b, x1, 136,0)
+
+inst_41:
+// rs2_val == 68719476736, rs1_val == -576460752303423489
+// opcode: bge, op1:x10; op2:x11; op1val:-0x800000000000001; op2val:0x1000000000; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x800000000000001, 0x1000000000, 0xa, 1b, x1, 144,0)
+
+inst_42:
+// rs2_val == 137438953472,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x2000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x2000000000, 0x10, 3f, x1, 152,0)
+
+inst_43:
+// rs2_val == 274877906944, rs1_val == -131073
+// opcode: bge, op1:x10; op2:x11; op1val:-0x20001; op2val:0x4000000000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x20001, 0x4000000000, 0x400, 1b, x1, 160,0)
+
+inst_44:
+// rs2_val == 549755813888,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x8000000000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x8000000000, 0x400, 3f, x1, 168,0)
+
+inst_45:
+// rs2_val == 1099511627776,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x400000001; op2val:0x10000000000; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x400000001, 0x10000000000, 0xa, 1b, x1, 176,0)
+
+inst_46:
+// rs2_val == 2199023255552, rs1_val == 1152921504606846976
+// opcode: bge, op1:x10; op2:x11; op1val:0x1000000000000000; op2val:0x20000000000; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x1000000000000000, 0x20000000000, 0x8, 1b, x1, 184,0)
+
+inst_47:
+// rs2_val == 4398046511104,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x40000000000; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x40000000000, 0x556, 1b, x1, 192,0)
+
+inst_48:
+// rs2_val == 8796093022208, rs1_val == 144115188075855872
+// opcode: bge, op1:x10; op2:x11; op1val:0x200000000000000; op2val:0x80000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x200000000000000, 0x80000000000, 0x4, 3f, x1, 200,0)
+
+inst_49:
+// rs2_val == 17592186044416, rs1_val == 536870912
+// opcode: bge, op1:x10; op2:x11; op1val:0x20000000; op2val:0x100000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x20000000, 0x100000000000, 0x2, 3f, x1, 208,0)
+
+inst_50:
+// rs2_val == 35184372088832, rs1_val == -3
+// opcode: bge, op1:x10; op2:x11; op1val:-0x3; op2val:0x200000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x3, 0x200000000000, 0x4, 1b, x1, 216,0)
+
+inst_51:
+// rs2_val == 70368744177664,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x400000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x400000000000, 0x4, 3f, x1, 224,0)
+
+inst_52:
+// rs2_val == 140737488355328,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x800000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x800000000000, 0x4, 1b, x1, 232,0)
+
+inst_53:
+// rs2_val == 281474976710656,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x4001; op2val:0x1000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x4001, 0x1000000000000, 0x4, 1b, x1, 240,0)
+
+inst_54:
+// rs2_val == 562949953421312, rs1_val == -144115188075855873
+// opcode: bge, op1:x10; op2:x11; op1val:-0x200000000000001; op2val:0x2000000000000; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x200000000000001, 0x2000000000000, 0x40, 3f, x1, 248,0)
+
+inst_55:
+// rs2_val == 1125899906842624, rs1_val == 9007199254740992
+// opcode: bge, op1:x10; op2:x11; op1val:0x20000000000000; op2val:0x4000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x20000000000000, 0x4000000000000, 0x6, 1b, x1, 256,0)
+
+inst_56:
+// rs2_val == 2251799813685248, rs1_val == 17592186044416
+// opcode: bge, op1:x10; op2:x11; op1val:0x100000000000; op2val:0x8000000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x100000000000, 0x8000000000000, 0x2, 1b, x1, 264,0)
+
+inst_57:
+// rs2_val == 4503599627370496,
+// opcode: bge, op1:x10; op2:x11; op1val:0x400000000; op2val:0x10000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x400000000, 0x10000000000000, 0x6, 1b, x1, 272,0)
+
+inst_58:
+// rs2_val == 9007199254740992, rs1_val == 524288
+// opcode: bge, op1:x10; op2:x11; op1val:0x80000; op2val:0x20000000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x80000, 0x20000000000000, 0x10, 3f, x1, 280,0)
+
+inst_59:
+// rs2_val == 18014398509481984,
+// opcode: bge, op1:x10; op2:x11; op1val:0x200000; op2val:0x40000000000000; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x200000, 0x40000000000000, 0x556, 1b, x1, 288,0)
+
+inst_60:
+// rs2_val == 36028797018963968, rs1_val == 16
+// opcode: bge, op1:x10; op2:x11; op1val:0x10; op2val:0x80000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x10, 0x80000000000000, 0x8, 1b, x1, 296,0)
+
+inst_61:
+// rs2_val == 72057594037927936,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x100000000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x100000000000000, 0x2, 1b, x1, 304,0)
+
+inst_62:
+// rs2_val == 144115188075855872,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x200000000000000; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x200000000000000, 0x40, 3f, x1, 312,0)
+
+inst_63:
+// rs2_val == 288230376151711744,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x2000000001; op2val:0x400000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x2000000001, 0x400000000000000, 0x4, 1b, x1, 320,0)
+
+inst_64:
+// rs2_val == 576460752303423488, rs1_val == -288230376151711745
+// opcode: bge, op1:x10; op2:x11; op1val:-0x400000000000001; op2val:0x800000000000000; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x400000000000001, 0x800000000000000, 0x556, 1b, x1, 328,0)
+
+inst_65:
+// rs2_val == 1152921504606846976, rs1_val == -6148914691236517206
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x1000000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x1000000000000000, 0x6, 1b, x1, 336,0)
+
+inst_66:
+// rs2_val == 2305843009213693952,
+// opcode: bge, op1:x10; op2:x11; op1val:0x400000000000; op2val:0x2000000000000000; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x400000000000, 0x2000000000000000, 0x556, 1b, x1, 344,0)
+
+inst_67:
+// rs2_val == 4611686018427387904, rs1_val == -2199023255553
+// opcode: bge, op1:x10; op2:x11; op1val:-0x20000000001; op2val:0x4000000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x20000000001, 0x4000000000000000, 0x8, 1b, x1, 352,0)
+
+inst_68:
+// rs2_val == -9223372036854775808,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x4; op2val:-0x8000000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x4, -0x8000000000000000, 0x4, 3f, x1, 360,0)
+
+inst_69:
+// rs2_val == -2,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, -0x2, 0x400, 1b, x1, 368,0)
+
+inst_70:
+// rs2_val == -3,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x1000001; op2val:-0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x1000001, -0x3, 0x8, 3f, x1, 376,0)
+
+inst_71:
+// rs2_val == -9,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x9; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, -0x9, 0x0, 1b, x1, 384,0)
+
+inst_72:
+// rs2_val == -17, rs1_val == 2048
+// opcode: bge, op1:x10; op2:x11; op1val:0x800; op2val:-0x11; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x800, -0x11, 0x4, 3f, x1, 392,0)
+
+inst_73:
+// rs2_val == -33, rs1_val == 134217728
+// opcode: bge, op1:x10; op2:x11; op1val:0x8000000; op2val:-0x21; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x8000000, -0x21, 0x400, 1b, x1, 400,0)
+
+inst_74:
+// rs2_val == -65, rs1_val == 68719476736
+// opcode: bge, op1:x10; op2:x11; op1val:0x1000000000; op2val:-0x41; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x1000000000, -0x41, 0x6, 3f, x1, 408,0)
+
+inst_75:
+// rs2_val == -129,
+// opcode: bge, op1:x10; op2:x11; op1val:0x400000; op2val:-0x81; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x400000, -0x81, 0xa, 1b, x1, 416,0)
+
+inst_76:
+// rs2_val == -257, rs1_val == -268435457
+// opcode: bge, op1:x10; op2:x11; op1val:-0x10000001; op2val:-0x101; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x10000001, -0x101, 0x556, 1b, x1, 424,0)
+
+inst_77:
+// rs2_val == -513,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x201; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, -0x201, 0x2, 3f, x1, 432,0)
+
+inst_78:
+// rs2_val == -1025,
+// opcode: bge, op1:x10; op2:x11; op1val:0x8000000; op2val:-0x401; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x8000000, -0x401, 0x4, 1b, x1, 440,0)
+
+inst_79:
+// rs2_val == -2049,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:-0x801; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, -0x801, 0x556, 1b, x1, 448,0)
+
+inst_80:
+// rs2_val == -4097,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:-0x1001; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x1000000000000001, -0x1001, 0x4, 1b, x1, 456,0)
+
+inst_81:
+// rs2_val == -8193, rs1_val == 1099511627776
+// opcode: bge, op1:x10; op2:x11; op1val:0x10000000000; op2val:-0x2001; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x10000000000, -0x2001, 0x6, 3f, x1, 464,0)
+
+inst_82:
+// rs2_val == -16385, rs1_val == -8388609
+// opcode: bge, op1:x10; op2:x11; op1val:-0x800001; op2val:-0x4001; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x800001, -0x4001, 0x4, 1b, x1, 472,0)
+
+inst_83:
+// rs2_val == -32769, rs1_val == -1125899906842625
+// opcode: bge, op1:x10; op2:x11; op1val:-0x4000000000001; op2val:-0x8001; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x4000000000001, -0x8001, 0x10, 3f, x1, 480,0)
+
+inst_84:
+// rs2_val == -65537,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x10001; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, -0x10001, 0x40, 3f, x1, 488,0)
+
+inst_85:
+// rs2_val == -131073,
+// opcode: bge, op1:x10; op2:x11; op1val:0x400000000000; op2val:-0x20001; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x400000000000, -0x20001, 0x8, 1b, x1, 496,0)
+
+inst_86:
+// rs2_val == -262145,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x40001; op2val:-0x40001; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x40001, -0x40001, 0x6, 1b, x1, 504,0)
+
+inst_87:
+// rs2_val == -524289, rs1_val == -4097
+// opcode: bge, op1:x10; op2:x11; op1val:-0x1001; op2val:-0x80001; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x1001, -0x80001, 0x6, 1b, x1, 512,0)
+
+inst_88:
+// rs2_val == -1048577,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x20000000001; op2val:-0x100001; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x20000000001, -0x100001, 0x4, 1b, x1, 520,0)
+
+inst_89:
+// rs2_val == -2097153, rs1_val == 268435456
+// opcode: bge, op1:x10; op2:x11; op1val:0x10000000; op2val:-0x200001; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x10000000, -0x200001, 0x0, 1b, x1, 528,0)
+
+inst_90:
+// rs2_val == -4194305, rs1_val == 274877906944
+// opcode: bge, op1:x10; op2:x11; op1val:0x4000000000; op2val:-0x400001; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4000000000, -0x400001, 0x6, 1b, x1, 536,0)
+
+inst_91:
+// rs2_val == -8388609, rs1_val == -129
+// opcode: bge, op1:x10; op2:x11; op1val:-0x81; op2val:-0x800001; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x81, -0x800001, 0x80, 3f, x1, 544,0)
+
+inst_92:
+// rs2_val == -16777217, rs1_val == 8192
+// opcode: bge, op1:x10; op2:x11; op1val:0x2000; op2val:-0x1000001; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2000, -0x1000001, 0x80, 3f, x1, 552,0)
+
+inst_93:
+// rs2_val == -33554433, rs1_val == -17
+// opcode: bge, op1:x10; op2:x11; op1val:-0x11; op2val:-0x2000001; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x11, -0x2000001, 0x8, 3f, x1, 560,0)
+
+inst_94:
+// rs2_val == -67108865, rs1_val == 65536
+// opcode: bge, op1:x10; op2:x11; op1val:0x10000; op2val:-0x4000001; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x10000, -0x4000001, 0x6, 1b, x1, 568,0)
+
+inst_95:
+// rs2_val == -134217729, rs1_val == -4194305
+// opcode: bge, op1:x10; op2:x11; op1val:-0x400001; op2val:-0x8000001; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x400001, -0x8000001, 0x8, 3f, x1, 576,0)
+
+inst_96:
+// rs2_val == -1073741825,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x81; op2val:-0x40000001; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x81, -0x40000001, 0x400, 1b, x1, 584,0)
+
+inst_97:
+// rs2_val == -2147483649,
+// opcode: bge, op1:x10; op2:x11; op1val:0x8; op2val:-0x80000001; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x8, -0x80000001, 0x6, 3f, x1, 592,0)
+
+inst_98:
+// rs2_val == -8589934593,
+// opcode: bge, op1:x10; op2:x11; op1val:0x400; op2val:-0x200000001; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x400, -0x200000001, 0x4, 1b, x1, 600,0)
+
+inst_99:
+// rs2_val == -17179869185, rs1_val == 1
+// opcode: bge, op1:x10; op2:x11; op1val:0x1; op2val:-0x400000001; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x1, -0x400000001, 0x0, 3f, x1, 608,0)
+
+inst_100:
+// rs2_val == -34359738369, rs1_val == -524289
+// opcode: bge, op1:x10; op2:x11; op1val:-0x80001; op2val:-0x800000001; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x80001, -0x800000001, 0x6, 3f, x1, 616,0)
+
+inst_101:
+// rs2_val == -68719476737,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x1000000001; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, -0x1000000001, 0x2, 3f, x1, 624,0)
+
+inst_102:
+// rs2_val == -137438953473,
+// opcode: bge, op1:x10; op2:x11; op1val:0x100000000; op2val:-0x2000000001; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x100000000, -0x2000000001, 0x0, 3f, x1, 632,0)
+
+inst_103:
+// rs2_val == -274877906945,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x81; op2val:-0x4000000001; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x81, -0x4000000001, 0x556, 1b, x1, 640,0)
+
+inst_104:
+// rs2_val == -549755813889, rs1_val == 6148914691236517205
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x8000000001; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, -0x8000000001, 0x0, 1b, x1, 648,0)
+
+inst_105:
+// rs2_val == -1099511627777, rs1_val == -1048577
+// opcode: bge, op1:x10; op2:x11; op1val:-0x100001; op2val:-0x10000000001; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x100001, -0x10000000001, 0x2, 3f, x1, 656,0)
+
+inst_106:
+// rs2_val == -2199023255553, rs1_val == 140737488355328
+// opcode: bge, op1:x10; op2:x11; op1val:0x800000000000; op2val:-0x20000000001; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x800000000000, -0x20000000001, 0x4, 1b, x1, 664,0)
+
+inst_107:
+// rs2_val == -4398046511105,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x4000000001; op2val:-0x40000000001; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x4000000001, -0x40000000001, 0x40, 3f, x1, 672,0)
+
+inst_108:
+// rs2_val == -8796093022209,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x800001; op2val:-0x80000000001; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x800001, -0x80000000001, 0x200, 3f, x1, 680,0)
+
+inst_109:
+// rs2_val == -17592186044417, rs1_val == -9007199254740993
+// opcode: bge, op1:x10; op2:x11; op1val:-0x20000000000001; op2val:-0x100000000001; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x20000000000001, -0x100000000001, 0x2, 3f, x1, 688,0)
+
+inst_110:
+// rs2_val == -35184372088833,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x200000000001; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, -0x200000000001, 0x100, 3f, x1, 696,0)
+
+inst_111:
+// rs2_val == -70368744177665,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x800000000000001; op2val:-0x400000000001; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x800000000000001, -0x400000000001, 0x6, 3f, x1, 704,0)
+
+inst_112:
+// rs2_val == -140737488355329, rs1_val == -68719476737
+// opcode: bge, op1:x10; op2:x11; op1val:-0x1000000001; op2val:-0x800000000001; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x1000000001, -0x800000000001, 0x0, 3f, x1, 712,0)
+
+inst_113:
+// rs2_val == -281474976710657,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x1000000000001; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, -0x1000000000001, 0x4, 3f, x1, 720,0)
+
+inst_114:
+// rs2_val == -562949953421313,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:-0x2000000000001; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, -0x2000000000001, 0x8, 1b, x1, 728,0)
+
+inst_115:
+// rs2_val == -1125899906842625,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x8; op2val:-0x4000000000001; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x8, -0x4000000000001, 0x2, 1b, x1, 736,0)
+
+inst_116:
+// rs2_val == -2251799813685249,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x3; op2val:-0x8000000000001; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x3, -0x8000000000001, 0x6, 3f, x1, 744,0)
+
+inst_117:
+// rs2_val == -4503599627370497,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:-0x10000000000001; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, -0x10000000000001, 0x20, 3f, x1, 752,0)
+
+inst_118:
+// rs2_val == -9007199254740993, rs1_val == -1073741825
+// opcode: bge, op1:x10; op2:x11; op1val:-0x40000001; op2val:-0x20000000000001; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x40000001, -0x20000000000001, 0x400, 3f, x1, 760,0)
+
+inst_119:
+// rs2_val == -18014398509481985,
+// opcode: bge, op1:x10; op2:x11; op1val:0x40000; op2val:-0x40000000000001; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x40000, -0x40000000000001, 0x400, 3f, x1, 768,0)
+
+inst_120:
+// rs2_val == -36028797018963969,
+// opcode: bge, op1:x10; op2:x11; op1val:0x7; op2val:-0x80000000000001; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x7, -0x80000000000001, 0x4, 1b, x1, 776,0)
+
+inst_121:
+// rs2_val == -72057594037927937,
+// opcode: bge, op1:x10; op2:x11; op1val:0x80000000000; op2val:-0x100000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x80000000000, -0x100000000000001, 0x0, 1b, x1, 784,0)
+
+inst_122:
+// rs2_val == -288230376151711745,
+// opcode: bge, op1:x10; op2:x11; op1val:0x8; op2val:-0x400000000000001; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x8, -0x400000000000001, 0x2, 3f, x1, 792,0)
+
+inst_123:
+// rs2_val == -576460752303423489, rs1_val == 4
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:-0x800000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, -0x800000000000001, 0x0, 3f, x1, 800,0)
+
+inst_124:
+// rs2_val == -1152921504606846977,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x8000000000001; op2val:-0x1000000000000001; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x8000000000001, -0x1000000000000001, 0x200, 3f, x1, 808,0)
+
+inst_125:
+// rs2_val == -2305843009213693953,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:-0x2000000000000001; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, -0x2000000000000001, 0xa, 1b, x1, 816,0)
+
+inst_126:
+// rs2_val == -4611686018427387905, rs1_val == -549755813889
+// opcode: bge, op1:x10; op2:x11; op1val:-0x8000000001; op2val:-0x4000000000000001; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x8000000001, -0x4000000000000001, 0x20, 3f, x1, 824,0)
+
+inst_127:
+// rs2_val == 9223372036854775807,
+// opcode: bge, op1:x10; op2:x11; op1val:0x10; op2val:0x7fffffffffffffff; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x10, 0x7fffffffffffffff, 0x200, 3f, x1, 832,0)
+
+inst_128:
+// rs2_val == 6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x20000000; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x20000000, 0x5555555555555555, 0x0, 3f, x1, 840,0)
+
+inst_129:
+// rs2_val == -6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x200000; op2val:-0x5555555555555556; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x200000, -0x5555555555555556, 0xa, 1b, x1, 848,0)
+
+inst_130:
+// rs1_val == 32,
+// opcode: bge, op1:x10; op2:x11; op1val:0x20; op2val:0x200000000; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x20, 0x200000000, 0x10, 3f, x1, 856,0)
+
+inst_131:
+// rs1_val == 64,
+// opcode: bge, op1:x10; op2:x11; op1val:0x40; op2val:0x20000; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x40, 0x20000, 0x8, 1b, x1, 864,0)
+
+inst_132:
+// rs1_val == 512,
+// opcode: bge, op1:x10; op2:x11; op1val:0x200; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x200, 0x3333333333333333, 0x400, 1b, x1, 872,0)
+
+inst_133:
+// rs1_val == 4096,
+// opcode: bge, op1:x10; op2:x11; op1val:0x1000; op2val:0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x1000, 0x5555555555555556, 0x8, 3f, x1, 880,0)
+
+inst_134:
+// rs1_val == 16384,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4000; op2val:-0x200001; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4000, -0x200001, 0x6, 1b, x1, 888,0)
+
+inst_135:
+// rs1_val == 32768,
+// opcode: bge, op1:x10; op2:x11; op1val:0x8000; op2val:0x100000; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x8000, 0x100000, 0x6, 1b, x1, 896,0)
+
+inst_136:
+// rs1_val == 1048576,
+// opcode: bge, op1:x10; op2:x11; op1val:0x100000; op2val:-0x1000001; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x100000, -0x1000001, 0x10, 3f, x1, 904,0)
+
+inst_137:
+// rs1_val == 8388608,
+// opcode: bge, op1:x10; op2:x11; op1val:0x800000; op2val:0x5555555555555556; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x800000, 0x5555555555555556, 0xa, 1b, x1, 912,0)
+
+inst_138:
+// rs1_val == 16777216,
+// opcode: bge, op1:x10; op2:x11; op1val:0x1000000; op2val:0x800000; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x1000000, 0x800000, 0x8, 3f, x1, 920,0)
+
+inst_139:
+// rs1_val == 33554432,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2000000; op2val:-0x3; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2000000, -0x3, 0x20, 3f, x1, 928,0)
+
+inst_140:
+// rs1_val == 67108864,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4000000; op2val:-0x4000000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4000000, -0x4000000000000000, 0x6, 1b, x1, 936,0)
+
+inst_141:
+// rs1_val == 1073741824,
+// opcode: bge, op1:x10; op2:x11; op1val:0x40000000; op2val:0x3333333333333332; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x40000000, 0x3333333333333332, 0x10, 3f, x1, 944,0)
+
+inst_142:
+// rs1_val == 2147483648,
+// opcode: bge, op1:x10; op2:x11; op1val:0x80000000; op2val:-0x4000001; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x80000000, -0x4000001, 0x4, 3f, x1, 952,0)
+
+inst_143:
+// rs1_val == 8589934592,
+// opcode: bge, op1:x10; op2:x11; op1val:0x200000000; op2val:-0x1001; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x200000000, -0x1001, 0x0, 1b, x1, 960,0)
+
+inst_144:
+// rs1_val == 34359738368,
+// opcode: bge, op1:x10; op2:x11; op1val:0x800000000; op2val:0x80000000000; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x800000000, 0x80000000000, 0x0, 3f, x1, 968,0)
+
+inst_145:
+// rs1_val == 137438953472,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2000000000; op2val:0x20000000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2000000000, 0x20000000, 0x400, 3f, x1, 976,0)
+
+inst_146:
+// rs1_val == 549755813888,
+// opcode: bge, op1:x10; op2:x11; op1val:0x8000000000; op2val:-0x21; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x8000000000, -0x21, 0x4, 3f, x1, 984,0)
+
+inst_147:
+// rs1_val == 2199023255552,
+// opcode: bge, op1:x10; op2:x11; op1val:0x20000000000; op2val:0x200000000000000; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x20000000000, 0x200000000000000, 0x40, 3f, x1, 992,0)
+
+inst_148:
+// rs1_val == 35184372088832,
+// opcode: bge, op1:x10; op2:x11; op1val:0x200000000000; op2val:0x4000000000; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x200000000000, 0x4000000000, 0x556, 1b, x1, 1000,0)
+
+inst_149:
+// rs1_val == 281474976710656,
+// opcode: bge, op1:x10; op2:x11; op1val:0x1000000000000; op2val:0x100000; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x1000000000000, 0x100000, 0x556, 1b, x1, 1008,0)
+
+inst_150:
+// rs1_val == 562949953421312,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2000000000000; op2val:0x10000000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2000000000000, 0x10000000, 0x400, 3f, x1, 1016,0)
+
+inst_151:
+// rs1_val == 2251799813685248,
+// opcode: bge, op1:x10; op2:x11; op1val:0x8000000000000; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x8000000000000, 0x6666666666666665, 0x0, 1b, x1, 1024,0)
+
+inst_152:
+// rs1_val == 18014398509481984,
+// opcode: bge, op1:x10; op2:x11; op1val:0x40000000000000; op2val:0x7fffffffffffffff; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x40000000000000, 0x7fffffffffffffff, 0x200, 3f, x1, 1032,0)
+
+inst_153:
+// rs1_val == 36028797018963968,
+// opcode: bge, op1:x10; op2:x11; op1val:0x80000000000000; op2val:0x3333333333333334; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x80000000000000, 0x3333333333333334, 0x200, 3f, x1, 1040,0)
+
+inst_154:
+// rs1_val == 576460752303423488,
+// opcode: bge, op1:x10; op2:x11; op1val:0x800000000000000; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x800000000000000, 0x4, 0x4, 3f, x1, 1048,0)
+
+inst_155:
+// rs1_val == 2305843009213693952,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2000000000000000; op2val:-0x101; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2000000000000000, -0x101, 0x400, 3f, x1, 1056,0)
+
+inst_156:
+// rs1_val == 4611686018427387904,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4000000000000000; op2val:-0x80000000000001; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4000000000000000, -0x80000000000001, 0x4, 3f, x1, 1064,0)
+
+inst_157:
+// rs1_val == -9223372036854775808,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x8000000000000000; op2val:-0x401; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x8000000000000000, -0x401, 0x20, 3f, x1, 1072,0)
+
+inst_158:
+// rs1_val == -2,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x2; op2val:0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x2, 0xb504f332, 0x20, 3f, x1, 1080,0)
+
+inst_159:
+// rs1_val == -5,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5; op2val:-0x1000000000000001; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5, -0x1000000000000001, 0x200, 3f, x1, 1088,0)
+
+inst_160:
+// rs1_val == -9,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x9; op2val:0x5555555555555555; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x9, 0x5555555555555555, 0xa, 1b, x1, 1096,0)
+
+inst_161:
+// rs1_val == -33,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x21; op2val:0x2000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x21, 0x2000000000000, 0x4, 1b, x1, 1104,0)
+
+inst_162:
+// rs1_val == -257,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x101; op2val:-0x800000000001; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x101, -0x800000000001, 0xa, 1b, x1, 1112,0)
+
+inst_163:
+// rs1_val == -1025,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x401; op2val:0x2000000000; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x401, 0x2000000000, 0x80, 3f, x1, 1120,0)
+
+inst_164:
+// rs1_val == -2049,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x801; op2val:-0x10000000000001; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x801, -0x10000000000001, 0x2, 1b, x1, 1128,0)
+
+inst_165:
+// rs1_val == -8193,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x2001; op2val:-0x101; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x2001, -0x101, 0x8, 3f, x1, 1136,0)
+
+inst_166:
+// rs1_val == -32769,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x8001; op2val:0x200000; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x8001, 0x200000, 0x556, 1b, x1, 1144,0)
+
+inst_167:
+// rs1_val == -65537,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x10001; op2val:-0x2000001; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x10001, -0x2000001, 0x100, 3f, x1, 1152,0)
+
+inst_168:
+// rs1_val == -2097153,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x200001; op2val:-0xa; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x200001, -0xa, 0x40, 3f, x1, 1160,0)
+
+inst_169:
+// rs1_val == -33554433,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x2000001; op2val:-0x21; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x2000001, -0x21, 0x20, 3f, x1, 1168,0)
+
+inst_170:
+// rs1_val == -67108865,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x4000001; op2val:0x40000000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x4000001, 0x40000000000000, 0x2, 3f, x1, 1176,0)
+
+inst_171:
+// rs1_val == -134217729,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x8000001; op2val:-0xa; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x8000001, -0xa, 0x0, 3f, x1, 1184,0)
+
+inst_172:
+// rs1_val == -536870913,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x20000001; op2val:0x800000000; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x20000001, 0x800000000, 0x10, 3f, x1, 1192,0)
+
+inst_173:
+// rs1_val == -2147483649,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x80000001; op2val:0x100000000000; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x80000001, 0x100000000000, 0x0, 1b, x1, 1200,0)
+
+inst_174:
+// rs1_val == -8589934593,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x200000001; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x200000001, 0x3, 0x80, 3f, x1, 1208,0)
+
+inst_175:
+// rs1_val == -34359738369,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x800000001; op2val:-0x20000000001; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x800000001, -0x20000000001, 0x40, 3f, x1, 1216,0)
+
+inst_176:
+// rs1_val == -1099511627777,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x10000000001; op2val:-0x101; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x10000000001, -0x101, 0x100, 3f, x1, 1224,0)
+
+inst_177:
+// rs1_val == -8796093022209,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x80000000001; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x80000000001, 0x4, 0x2, 3f, x1, 1232,0)
+
+inst_178:
+// rs1_val == -17592186044417,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x100000000001; op2val:0x4000000; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x100000000001, 0x4000000, 0x0, 1b, x1, 1240,0)
+
+inst_179:
+// rs1_val == -70368744177665,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x400000000001; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x400000000001, 0x5, 0x556, 1b, x1, 1248,0)
+
+inst_180:
+// rs1_val == -281474976710657,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x1000000000001; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x1000000000001, 0x3, 0x400, 3f, x1, 1256,0)
+
+inst_181:
+// rs1_val == -562949953421313,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x2000000000001; op2val:0x6666666666666665; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x2000000000001, 0x6666666666666665, 0x80, 3f, x1, 1264,0)
+
+inst_182:
+// rs1_val == -4503599627370497,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x10000000000001; op2val:-0xb504f332; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x10000000000001, -0xb504f332, 0xa, 1b, x1, 1272,0)
+
+inst_183:
+// rs1_val == -72057594037927937,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x100000000000001; op2val:0x20; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x100000000000001, 0x20, 0x2, 1b, x1, 1280,0)
+
+inst_184:
+// rs1_val == -2305843009213693953,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x2000000000000001; op2val:-0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x2000000000000001, -0x5555555555555556, 0x6, 3f, x1, 1288,0)
+
+inst_185:
+// rs1_val == -4611686018427387905,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x4000000000000001; op2val:0x800000000; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x4000000000000001, 0x800000000, 0x6, 1b, x1, 1296,0)
+
+inst_186:
+// rs1_val == 9223372036854775807,
+// opcode: bge, op1:x10; op2:x11; op1val:0x7fffffffffffffff; op2val:-0x80001; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x7fffffffffffffff, -0x80001, 0x4, 3f, x1, 1304,0)
+
+inst_187:
+// rs1_val==3 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x3, 0x20, 3f, x1, 1312,0)
+
+inst_188:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x5555555555555555, 0x556, 1b, x1, 1320,0)
+
+inst_189:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, -0x5555555555555556, 0x400, 1b, x1, 1328,0)
+
+inst_190:
+// rs1_val==3 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x5, 0x40, 3f, x1, 1336,0)
+
+inst_191:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333333; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x3333333333333333, 0x10, 3f, x1, 1344,0)
+
+inst_192:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666666; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x6666666666666666, 0x200, 3f, x1, 1352,0)
+
+inst_193:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f333; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, -0xb504f333, 0x20, 3f, x1, 1360,0)
+
+inst_194:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0xb504f333, 0x80, 3f, x1, 1368,0)
+
+inst_195:
+// rs1_val==3 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x2, 0x400, 1b, x1, 1376,0)
+
+inst_196:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555554; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x5555555555555554, 0x40, 3f, x1, 1384,0)
+
+inst_197:
+// rs1_val==3 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x0, 0x556, 1b, x1, 1392,0)
+
+inst_198:
+// rs1_val==3 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x4, 0x556, 1b, x1, 1400,0)
+
+inst_199:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x3333333333333332, 0x6, 1b, x1, 1408,0)
+
+inst_200:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x6666666666666665, 0x4, 1b, x1, 1416,0)
+
+inst_201:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f332; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0xb504f332, 0x100, 3f, x1, 1424,0)
+
+inst_202:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x5555555555555556, 0x2, 1b, x1, 1432,0)
+
+inst_203:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555555; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, -0x5555555555555555, 0x40, 3f, x1, 1440,0)
+
+inst_204:
+// rs1_val==3 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x6, 0x20, 3f, x1, 1448,0)
+
+inst_205:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333334; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x3333333333333334, 0x0, 3f, x1, 1456,0)
+
+inst_206:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666667; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0x6666666666666667, 0x2, 3f, x1, 1464,0)
+
+inst_207:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, -0xb504f332, 0x4, 1b, x1, 1472,0)
+
+inst_208:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f334; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3, 0xb504f334, 0x40, 3f, x1, 1480,0)
+
+inst_209:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x3, 0x10, 3f, x1, 1488,0)
+
+inst_210:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x400, 1b, x1, 1496,0)
+
+inst_211:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, -0x5555555555555556, 0x400, 1b, x1, 1504,0)
+
+inst_212:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x5, 0x8, 1b, x1, 1512,0)
+
+inst_213:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x3333333333333333, 0x400, 3f, x1, 1520,0)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x6666666666666666, 0x0, 1b, x1, 1528,0)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, -0xb504f333, 0x2, 1b, x1, 1536,0)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0xb504f333, 0x4, 3f, x1, 1544,0)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x2, 0x40, 3f, x1, 1552,0)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555554; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x5555555555555554, 0x8, 1b, x1, 1560,0)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x0, 0x4, 1b, x1, 1568,0)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x4, 0xa, 1b, x1, 1576,0)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x3333333333333332, 0x2, 3f, x1, 1584,0)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666665; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x6666666666666665, 0x8, 1b, x1, 1592,0)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0xb504f332, 0x0, 1b, x1, 1600,0)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x5555555555555556, 0x2, 3f, x1, 1608,0)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, -0x5555555555555555, 0x8, 1b, x1, 1616,0)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x6, 0x0, 3f, x1, 1624,0)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333334; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x3333333333333334, 0x20, 3f, x1, 1632,0)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0x6666666666666667, 0x8, 1b, x1, 1640,0)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, -0xb504f332, 0x4, 1b, x1, 1648,0)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f334; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555555, 0xb504f334, 0x556, 1b, x1, 1656,0)
+
+inst_231:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x3, 0x200, 3f, x1, 1664,0)
+
+inst_232:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x5555555555555555, 0x0, 3f, x1, 1672,0)
+
+inst_233:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, -0x5555555555555556, 0x0, 3f, x1, 1680,0)
+
+inst_234:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x5, 0x2, 1b, x1, 1688,0)
+
+inst_235:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333333; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x3333333333333333, 0x556, 1b, x1, 1696,0)
+
+inst_236:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666666; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x6666666666666666, 0x2, 1b, x1, 1704,0)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f333; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, -0xb504f333, 0x556, 1b, x1, 1712,0)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0xb504f333, 0x4, 3f, x1, 1720,0)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x2, 0x400, 3f, x1, 1728,0)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555554; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x5555555555555554, 0x400, 3f, x1, 1736,0)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x0, 0x40, 3f, x1, 1744,0)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x4, 0x4, 1b, x1, 1752,0)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x3333333333333332, 0x400, 1b, x1, 1760,0)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x6666666666666665, 0x0, 1b, x1, 1768,0)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0xb504f332, 0x2, 1b, x1, 1776,0)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x5555555555555556, 0x4, 3f, x1, 1784,0)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, -0x5555555555555555, 0x100, 3f, x1, 1792,0)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x6, 0x2, 3f, x1, 1800,0)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x3333333333333334, 0x400, 1b, x1, 1808,0)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666667; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0x6666666666666667, 0x2, 3f, x1, 1816,0)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, -0xb504f332, 0x0, 3f, x1, 1824,0)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f334; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555556, 0xb504f334, 0x200, 3f, x1, 1832,0)
+
+inst_253:
+// rs1_val==5 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x3, 0x8, 1b, x1, 1840,0)
+
+inst_254:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x5555555555555555, 0x4, 1b, x1, 1848,0)
+
+inst_255:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, -0x5555555555555556, 0x556, 1b, x1, 1856,0)
+
+inst_256:
+// rs1_val==5 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x5, 0x2, 1b, x1, 1864,0)
+
+inst_257:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x3333333333333333, 0x6, 3f, x1, 1872,0)
+
+inst_258:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666666; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x6666666666666666, 0x40, 3f, x1, 1880,0)
+
+inst_259:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f333; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, -0xb504f333, 0x10, 3f, x1, 1888,0)
+
+inst_260:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0xb504f333, 0x2, 3f, x1, 1896,0)
+
+inst_261:
+// rs1_val==5 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x2, 0x8, 1b, x1, 1904,0)
+
+inst_262:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555554; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x5555555555555554, 0x400, 3f, x1, 1912,0)
+
+inst_263:
+// rs1_val==5 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x0, 0x4, 3f, x1, 1920,0)
+
+inst_264:
+// rs1_val==5 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x4, 0x6, 3f, x1, 1928,0)
+
+inst_265:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333332; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x3333333333333332, 0x40, 3f, x1, 1936,0)
+
+inst_266:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666665; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x6666666666666665, 0x10, 3f, x1, 1944,0)
+
+inst_267:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f332; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0xb504f332, 0x200, 3f, x1, 1952,0)
+
+inst_268:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x5555555555555556, 0x80, 3f, x1, 1960,0)
+
+inst_269:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, -0x5555555555555555, 0x2, 3f, x1, 1968,0)
+
+inst_270:
+// rs1_val==5 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x6, 0x200, 3f, x1, 1976,0)
+
+inst_271:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x3333333333333334, 0x8, 3f, x1, 1984,0)
+
+inst_272:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666667; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0x6666666666666667, 0x40, 3f, x1, 1992,0)
+
+inst_273:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f332; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, -0xb504f332, 0xa, 1b, x1, 2000,0)
+
+inst_274:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f334; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5, 0xb504f334, 0x40, 3f, x1, 2008,0)
+
+inst_275:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x3, 0x2, 1b, x1, 2016,0)
+
+inst_276:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555555; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x5555555555555555, 0x10, 3f, x1, 2024,0)
+
+inst_277:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, -0x5555555555555556, 0x100, 3f, x1, 2032,0)
+
+inst_278:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x5, 0x556, 1b, x1, 2040,0)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_279:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x6, 3f, x1, 0,0)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666666; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x6666666666666666, 0x556, 1b, x1, 8,0)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, -0xb504f333, 0x80, 3f, x1, 16,0)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0xb504f333, 0x6, 3f, x1, 24,0)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x2, 0x80, 3f, x1, 32,0)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555554; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x5555555555555554, 0x80, 3f, x1, 40,0)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x0, 0x0, 1b, x1, 48,0)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x4, 0x80, 3f, x1, 56,0)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333332; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x3333333333333332, 0x100, 3f, x1, 64,0)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x6666666666666665, 0x6, 1b, x1, 72,0)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0xb504f332, 0x8, 1b, x1, 80,0)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x5555555555555556, 0x4, 3f, x1, 88,0)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, -0x5555555555555555, 0x556, 1b, x1, 96,0)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x6, 0x100, 3f, x1, 104,0)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x3333333333333334, 0x4, 3f, x1, 112,0)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666667; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0x6666666666666667, 0x100, 3f, x1, 120,0)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f332; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, -0xb504f332, 0x80, 3f, x1, 128,0)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f334; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333333, 0xb504f334, 0x4, 3f, x1, 136,0)
+
+inst_297:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x3, 0x40, 3f, x1, 144,0)
+
+inst_298:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x5555555555555555, 0x2, 1b, x1, 152,0)
+
+inst_299:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, -0x5555555555555556, 0x8, 3f, x1, 160,0)
+
+inst_300:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x5, 0x100, 3f, x1, 168,0)
+
+inst_301:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333333; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x3333333333333333, 0x200, 3f, x1, 176,0)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666666; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x8, 3f, x1, 184,0)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f333; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, -0xb504f333, 0x556, 1b, x1, 192,0)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0xb504f333, 0x80, 3f, x1, 200,0)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x2, 0x8, 3f, x1, 208,0)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x5555555555555554, 0x0, 3f, x1, 216,0)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x0, 0xa, 1b, x1, 224,0)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x4, 0x400, 3f, x1, 232,0)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x3333333333333332, 0x0, 1b, x1, 240,0)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x6666666666666665, 0x6, 1b, x1, 248,0)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0xb504f332, 0x2, 1b, x1, 256,0)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x5555555555555556, 0x4, 1b, x1, 264,0)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, -0x5555555555555555, 0x0, 3f, x1, 272,0)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x6, 0x4, 1b, x1, 280,0)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333334; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x3333333333333334, 0x20, 3f, x1, 288,0)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0x6666666666666667, 0x4, 3f, x1, 296,0)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, -0xb504f332, 0x8, 1b, x1, 304,0)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f334; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666666, 0xb504f334, 0x200, 3f, x1, 312,0)
+
+inst_319:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x3, 0x556, 1b, x1, 320,0)
+
+inst_320:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x5555555555555555, 0x0, 1b, x1, 328,0)
+
+inst_321:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555556; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, -0x5555555555555556, 0x10, 3f, x1, 336,0)
+
+inst_322:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x5, 0x8, 3f, x1, 344,0)
+
+inst_323:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x3333333333333333, 0x400, 1b, x1, 352,0)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x6666666666666666, 0x4, 1b, x1, 360,0)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, -0xb504f333, 0x80, 3f, x1, 368,0)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0xb504f333, 0x0, 1b, x1, 376,0)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x2, 0x2, 1b, x1, 384,0)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555554; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x5555555555555554, 0x400, 3f, x1, 392,0)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x0, 0x80, 3f, x1, 400,0)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x4, 0x20, 3f, x1, 408,0)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x3333333333333332, 0x0, 1b, x1, 416,0)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x6666666666666665, 0x2, 3f, x1, 424,0)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0xb504f332, 0x6, 1b, x1, 432,0)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x5555555555555556, 0x4, 3f, x1, 440,0)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555555; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, -0x5555555555555555, 0x20, 3f, x1, 448,0)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x6, 0x400, 3f, x1, 456,0)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333334; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x3333333333333334, 0x0, 3f, x1, 464,0)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0x6666666666666667, 0x0, 1b, x1, 472,0)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, -0xb504f332, 0x0, 1b, x1, 480,0)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f333, 0xb504f334, 0x400, 1b, x1, 488,0)
+
+inst_341:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x3, 0x400, 1b, x1, 496,0)
+
+inst_342:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555555; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x5555555555555555, 0x200, 3f, x1, 504,0)
+
+inst_343:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, -0x5555555555555556, 0x40, 3f, x1, 512,0)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x5, 0x20, 3f, x1, 520,0)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333333; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x3333333333333333, 0x2, 1b, x1, 528,0)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666666; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x6666666666666666, 0x20, 3f, x1, 536,0)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, -0xb504f333, 0x4, 1b, x1, 544,0)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0xb504f333, 0x0, 1b, x1, 552,0)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x2, 0x100, 3f, x1, 560,0)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555554; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x5555555555555554, 0x400, 3f, x1, 568,0)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x0, 0x6, 3f, x1, 576,0)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x4; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x4, 0x200, 3f, x1, 584,0)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333332; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x3333333333333332, 0x200, 3f, x1, 592,0)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666665; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x6666666666666665, 0x20, 3f, x1, 600,0)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f332; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0xb504f332, 0xa, 1b, x1, 608,0)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x5555555555555556, 0x80, 3f, x1, 616,0)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555555; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, -0x5555555555555555, 0x20, 3f, x1, 624,0)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x6, 0xa, 1b, x1, 632,0)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333334; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x3333333333333334, 0x40, 3f, x1, 640,0)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666667; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0x6666666666666667, 0x200, 3f, x1, 648,0)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, -0xb504f332, 0x4, 1b, x1, 656,0)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f334; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f333, 0xb504f334, 0x100, 3f, x1, 664,0)
+
+inst_363:
+// rs1_val==2 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x3, 0xa, 1b, x1, 672,0)
+
+inst_364:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x5555555555555555, 0x2, 1b, x1, 680,0)
+
+inst_365:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, -0x5555555555555556, 0x8, 3f, x1, 688,0)
+
+inst_366:
+// rs1_val==2 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x5, 0x10, 3f, x1, 696,0)
+
+inst_367:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333333; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x3333333333333333, 0x2, 3f, x1, 704,0)
+
+inst_368:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666666; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x6666666666666666, 0x20, 3f, x1, 712,0)
+
+inst_369:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, -0xb504f333, 0x6, 1b, x1, 720,0)
+
+inst_370:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0xb504f333, 0x400, 1b, x1, 728,0)
+
+inst_371:
+// rs1_val==2 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x2, 0x6, 3f, x1, 736,0)
+
+inst_372:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555554; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x5555555555555554, 0x80, 3f, x1, 744,0)
+
+inst_373:
+// rs1_val==2 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x0, 0x6, 3f, x1, 752,0)
+
+inst_374:
+// rs1_val==2 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x4, 0x0, 1b, x1, 760,0)
+
+inst_375:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x3333333333333332, 0x400, 1b, x1, 768,0)
+
+inst_376:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666665; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x6666666666666665, 0x10, 3f, x1, 776,0)
+
+inst_377:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0xb504f332, 0x2, 3f, x1, 784,0)
+
+inst_378:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x5555555555555556, 0x100, 3f, x1, 792,0)
+
+inst_379:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, -0x5555555555555555, 0x6, 3f, x1, 800,0)
+
+inst_380:
+// rs1_val==2 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x6, 0x10, 3f, x1, 808,0)
+
+inst_381:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333334; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x3333333333333334, 0x100, 3f, x1, 816,0)
+
+inst_382:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666667; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0x6666666666666667, 0x40, 3f, x1, 824,0)
+
+inst_383:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, -0xb504f332, 0x6, 1b, x1, 832,0)
+
+inst_384:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f334; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x2, 0xb504f334, 0x4, 1b, x1, 840,0)
+
+inst_385:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x3, 0x4, 3f, x1, 848,0)
+
+inst_386:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x5555555555555555, 0x4, 3f, x1, 856,0)
+
+inst_387:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555556; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, -0x5555555555555556, 0x20, 3f, x1, 864,0)
+
+inst_388:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x5, 0x4, 3f, x1, 872,0)
+
+inst_389:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x3333333333333333, 0x6, 1b, x1, 880,0)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x6666666666666666, 0x4, 3f, x1, 888,0)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, -0xb504f333, 0x0, 1b, x1, 896,0)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0xb504f333, 0x0, 1b, x1, 904,0)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x2, 0x20, 3f, x1, 912,0)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555554; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x400, 1b, x1, 920,0)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x0, 0x10, 3f, x1, 928,0)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x4, 0x0, 1b, x1, 936,0)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x3333333333333332, 0x6, 3f, x1, 944,0)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666665; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x6666666666666665, 0x40, 3f, x1, 952,0)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0xb504f332, 0x6, 1b, x1, 960,0)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x400, 3f, x1, 968,0)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, -0x5555555555555555, 0x100, 3f, x1, 976,0)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x6, 0x10, 3f, x1, 984,0)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333334; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x3333333333333334, 0xa, 1b, x1, 992,0)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0x6666666666666667, 0x0, 1b, x1, 1000,0)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f332; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, -0xb504f332, 0x40, 3f, x1, 1008,0)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555554, 0xb504f334, 0x0, 1b, x1, 1016,0)
+
+inst_407:
+// rs1_val==0 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x3, 0x6, 3f, x1, 1024,0)
+
+inst_408:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555555; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x5555555555555555, 0x200, 3f, x1, 1032,0)
+
+inst_409:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, -0x5555555555555556, 0x2, 3f, x1, 1040,0)
+
+inst_410:
+// rs1_val==0 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x5, 0x6, 3f, x1, 1048,0)
+
+inst_411:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333333; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x3333333333333333, 0x40, 3f, x1, 1056,0)
+
+inst_412:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666666; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x6666666666666666, 0xa, 1b, x1, 1064,0)
+
+inst_413:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, -0xb504f333, 0x0, 1b, x1, 1072,0)
+
+inst_414:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0xb504f333, 0x0, 3f, x1, 1080,0)
+
+inst_415:
+// rs1_val==0 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x2, 0x8, 3f, x1, 1088,0)
+
+inst_416:
+// rs1_val==4 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x3, 0x8, 3f, x1, 1096,0)
+
+inst_417:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x5555555555555555, 0x4, 3f, x1, 1104,0)
+
+inst_418:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, -0x5555555555555556, 0x400, 1b, x1, 1112,0)
+
+inst_419:
+// rs1_val==4 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x5, 0x80, 3f, x1, 1120,0)
+
+inst_420:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x3333333333333333, 0x6, 3f, x1, 1128,0)
+
+inst_421:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666666; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x6666666666666666, 0x80, 3f, x1, 1136,0)
+
+inst_422:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, -0xb504f333, 0x4, 1b, x1, 1144,0)
+
+inst_423:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0xb504f333, 0x400, 3f, x1, 1152,0)
+
+inst_424:
+// rs1_val==4 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x2, 0x40, 3f, x1, 1160,0)
+
+inst_425:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555554; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x5555555555555554, 0x8, 1b, x1, 1168,0)
+
+inst_426:
+// rs1_val==4 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x0, 0x4, 3f, x1, 1176,0)
+
+inst_427:
+// rs1_val==4 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x4, 0x0, 3f, x1, 1184,0)
+
+inst_428:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333332; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x3333333333333332, 0x4, 1b, x1, 1192,0)
+
+inst_429:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666665; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x6666666666666665, 0xa, 1b, x1, 1200,0)
+
+inst_430:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0xb504f332, 0x8, 1b, x1, 1208,0)
+
+inst_431:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555556; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x5555555555555556, 0x10, 3f, x1, 1216,0)
+
+inst_432:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, -0x5555555555555555, 0x400, 1b, x1, 1224,0)
+
+inst_433:
+// rs1_val==4 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x6, 0x4, 3f, x1, 1232,0)
+
+inst_434:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x3333333333333334, 0x400, 1b, x1, 1240,0)
+
+inst_435:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0x6666666666666667, 0x0, 1b, x1, 1248,0)
+
+inst_436:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, -0xb504f332, 0x8, 3f, x1, 1256,0)
+
+inst_437:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x4, 0xb504f334, 0x400, 3f, x1, 1264,0)
+
+inst_438:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x3, 0x6, 1b, x1, 1272,0)
+
+inst_439:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x5555555555555555, 0x2, 1b, x1, 1280,0)
+
+inst_440:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, -0x5555555555555556, 0x556, 1b, x1, 1288,0)
+
+inst_441:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x5, 0xa, 1b, x1, 1296,0)
+
+inst_442:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x3333333333333333, 0x0, 1b, x1, 1304,0)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666666; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x6666666666666666, 0x200, 3f, x1, 1312,0)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, -0xb504f333, 0x80, 3f, x1, 1320,0)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0xb504f333, 0x8, 3f, x1, 1328,0)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x2, 0x0, 1b, x1, 1336,0)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x5555555555555554, 0x2, 3f, x1, 1344,0)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x0, 0x80, 3f, x1, 1352,0)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x4, 0x556, 1b, x1, 1360,0)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333332; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x4, 3f, x1, 1368,0)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x6666666666666665, 0x0, 1b, x1, 1376,0)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f332; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0xb504f332, 0x80, 3f, x1, 1384,0)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x5555555555555556, 0x4, 3f, x1, 1392,0)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, -0x5555555555555555, 0x2, 3f, x1, 1400,0)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x6, 0x80, 3f, x1, 1408,0)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x3333333333333334, 0x400, 1b, x1, 1416,0)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0x6666666666666667, 0x4, 3f, x1, 1424,0)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f332; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, -0xb504f332, 0x80, 3f, x1, 1432,0)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f334; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333332, 0xb504f334, 0x2, 1b, x1, 1440,0)
+
+inst_460:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x3, 0x2, 3f, x1, 1448,0)
+
+inst_461:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555555; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x5555555555555555, 0x80, 3f, x1, 1456,0)
+
+inst_462:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, -0x5555555555555556, 0x4, 1b, x1, 1464,0)
+
+inst_463:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x5, 0x10, 3f, x1, 1472,0)
+
+inst_464:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333333; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x3333333333333333, 0x2, 1b, x1, 1480,0)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x6666666666666666, 0x6, 3f, x1, 1488,0)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f333; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, -0xb504f333, 0x40, 3f, x1, 1496,0)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0xb504f333, 0x4, 1b, x1, 1504,0)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x2, 0x2, 1b, x1, 1512,0)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x5555555555555554, 0x6, 1b, x1, 1520,0)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x0, 0x200, 3f, x1, 1528,0)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x4, 0xa, 1b, x1, 1536,0)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x3333333333333332, 0x6, 1b, x1, 1544,0)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x6, 3f, x1, 1552,0)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f332; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0xb504f332, 0xa, 1b, x1, 1560,0)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x5555555555555556, 0x0, 1b, x1, 1568,0)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555555; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, -0x5555555555555555, 0x80, 3f, x1, 1576,0)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x6, 0x0, 3f, x1, 1584,0)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333334; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x3333333333333334, 0x20, 3f, x1, 1592,0)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666667; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0x6666666666666667, 0x400, 3f, x1, 1600,0)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, -0xb504f332, 0x400, 3f, x1, 1608,0)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f334; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666665, 0xb504f334, 0x10, 3f, x1, 1616,0)
+
+inst_482:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x3, 0x80, 3f, x1, 1624,0)
+
+inst_483:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x5555555555555555, 0x6, 1b, x1, 1632,0)
+
+inst_484:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, -0x5555555555555556, 0x100, 3f, x1, 1640,0)
+
+inst_485:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x5, 0x6, 1b, x1, 1648,0)
+
+inst_486:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x3333333333333333, 0x6, 1b, x1, 1656,0)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666666; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x6666666666666666, 0x556, 1b, x1, 1664,0)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, -0xb504f333, 0x0, 1b, x1, 1672,0)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0xb504f333, 0x2, 3f, x1, 1680,0)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x2, 0x400, 1b, x1, 1688,0)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x5555555555555554, 0x2, 1b, x1, 1696,0)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x0, 0x4, 3f, x1, 1704,0)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x4, 0x0, 1b, x1, 1712,0)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x3333333333333332, 0x8, 1b, x1, 1720,0)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x6666666666666665, 0x400, 1b, x1, 1728,0)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0xb504f332, 0x400, 3f, x1, 1736,0)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x5555555555555556, 0x2, 3f, x1, 1744,0)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, -0x5555555555555555, 0x2, 1b, x1, 1752,0)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x6, 0x10, 3f, x1, 1760,0)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333334; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x3333333333333334, 0x100, 3f, x1, 1768,0)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666667; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0x6666666666666667, 0x100, 3f, x1, 1776,0)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f332; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, -0xb504f332, 0x80, 3f, x1, 1784,0)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f334; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f332, 0xb504f334, 0x556, 1b, x1, 1792,0)
+
+inst_504:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x3, 0x100, 3f, x1, 1800,0)
+
+inst_505:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x5555555555555555, 0x400, 3f, x1, 1808,0)
+
+inst_506:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555556; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, -0x5555555555555556, 0x200, 3f, x1, 1816,0)
+
+inst_507:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x5, 0x40, 3f, x1, 1824,0)
+
+inst_508:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x3333333333333333, 0x6, 1b, x1, 1832,0)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x6666666666666666, 0x6, 1b, x1, 1840,0)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f333; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, -0xb504f333, 0x100, 3f, x1, 1848,0)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0xb504f333, 0x0, 3f, x1, 1856,0)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x2, 0xa, 1b, x1, 1864,0)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x0, 3f, x1, 1872,0)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x0, 0x200, 3f, x1, 1880,0)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x4, 0x2, 3f, x1, 1888,0)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333332; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x3333333333333332, 0x10, 3f, x1, 1896,0)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x6666666666666665, 0x2, 3f, x1, 1904,0)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0xb504f332, 0x6, 3f, x1, 1912,0)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x4, 3f, x1, 1920,0)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, -0x5555555555555555, 0x2, 1b, x1, 1928,0)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x6, 0x100, 3f, x1, 1936,0)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x3333333333333334, 0x400, 3f, x1, 1944,0)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666667; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0x6666666666666667, 0x10, 3f, x1, 1952,0)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f332; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, -0xb504f332, 0x80, 3f, x1, 1960,0)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x5555555555555556, 0xb504f334, 0x0, 1b, x1, 1968,0)
+
+inst_526:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x3, 0x8, 1b, x1, 1976,0)
+
+inst_527:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x5555555555555555, 0x6, 1b, x1, 1984,0)
+
+inst_528:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, -0x5555555555555556, 0x4, 1b, x1, 1992,0)
+
+inst_529:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x5, 0xa, 1b, x1, 2000,0)
+
+inst_530:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333333; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x3333333333333333, 0x2, 1b, x1, 2008,0)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666666; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x6666666666666666, 0x20, 3f, x1, 2016,0)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f333; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, -0xb504f333, 0x40, 3f, x1, 2024,0)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f333; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0xb504f333, 0x40, 3f, x1, 2032,0)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x2, 0x400, 1b, x1, 2040,0)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x5555555555555554, 0x2, 1b, x1, 0,0)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x0, 0x80, 3f, x1, 8,0)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x4, 0x0, 3f, x1, 16,0)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333332; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x3333333333333332, 0x556, 1b, x1, 24,0)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x6666666666666665, 0x0, 1b, x1, 32,0)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0xb504f332, 0x10, 3f, x1, 40,0)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x5555555555555556, 0x6, 1b, x1, 48,0)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555555; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, -0x5555555555555555, 0xa, 1b, x1, 56,0)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x6, 0x4, 3f, x1, 64,0)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x3333333333333334, 0x400, 1b, x1, 72,0)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666667; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0x6666666666666667, 0x2, 3f, x1, 80,0)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, -0xb504f332, 0x10, 3f, x1, 88,0)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f334; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0x5555555555555555, 0xb504f334, 0x4, 3f, x1, 96,0)
+
+inst_548:
+// rs1_val==6 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x3, 0x4, 1b, x1, 104,0)
+
+inst_549:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x5555555555555555, 0x0, 3f, x1, 112,0)
+
+inst_550:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, -0x5555555555555556, 0x556, 1b, x1, 120,0)
+
+inst_551:
+// rs1_val==6 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x5, 0x0, 1b, x1, 128,0)
+
+inst_552:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x3333333333333333, 0x0, 3f, x1, 136,0)
+
+inst_553:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666666; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x6666666666666666, 0x200, 3f, x1, 144,0)
+
+inst_554:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, -0xb504f333, 0x0, 1b, x1, 152,0)
+
+inst_555:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0xb504f333, 0x6, 1b, x1, 160,0)
+
+inst_556:
+// rs1_val==6 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x2, 0x10, 3f, x1, 168,0)
+
+inst_557:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555554; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x5555555555555554, 0x20, 3f, x1, 176,0)
+
+inst_558:
+// rs1_val==6 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x0, 0x8, 3f, x1, 184,0)
+
+inst_559:
+// rs1_val==6 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x4, 0x8, 1b, x1, 192,0)
+
+inst_560:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x3333333333333332, 0x8, 3f, x1, 200,0)
+
+inst_561:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x6666666666666665, 0x4, 3f, x1, 208,0)
+
+inst_562:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0xb504f332, 0x2, 1b, x1, 216,0)
+
+inst_563:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x5555555555555556, 0x6, 3f, x1, 224,0)
+
+inst_564:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, -0x5555555555555555, 0x0, 3f, x1, 232,0)
+
+inst_565:
+// rs1_val==6 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x6, 0x8, 1b, x1, 240,0)
+
+inst_566:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x3333333333333334, 0x4, 1b, x1, 248,0)
+
+inst_567:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666667; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0x6666666666666667, 0x556, 1b, x1, 256,0)
+
+inst_568:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, -0xb504f332, 0x0, 3f, x1, 264,0)
+
+inst_569:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6, 0xb504f334, 0x6, 3f, x1, 272,0)
+
+inst_570:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x3, 0x0, 1b, x1, 280,0)
+
+inst_571:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x5555555555555555, 0x556, 1b, x1, 288,0)
+
+inst_572:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, -0x5555555555555556, 0x4, 1b, x1, 296,0)
+
+inst_573:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x5, 0x556, 1b, x1, 304,0)
+
+inst_574:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x3333333333333333, 0x0, 3f, x1, 312,0)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666666; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x6666666666666666, 0x400, 3f, x1, 320,0)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, -0xb504f333, 0x8, 1b, x1, 328,0)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0xb504f333, 0x4, 3f, x1, 336,0)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x2, 0x2, 3f, x1, 344,0)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555554; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x5555555555555554, 0x20, 3f, x1, 352,0)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x0, 0x0, 3f, x1, 360,0)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x4, 0x40, 3f, x1, 368,0)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333332; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x3333333333333332, 0x556, 1b, x1, 376,0)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x6666666666666665, 0x4, 3f, x1, 384,0)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0xb504f332, 0x400, 3f, x1, 392,0)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x5555555555555556, 0x4, 3f, x1, 400,0)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555555; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, -0x5555555555555555, 0x20, 3f, x1, 408,0)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x6, 0x10, 3f, x1, 416,0)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333334; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x3333333333333334, 0xa, 1b, x1, 424,0)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666667; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0x6666666666666667, 0x200, 3f, x1, 432,0)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, -0xb504f332, 0x4, 1b, x1, 440,0)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x3333333333333334, 0xb504f334, 0x400, 1b, x1, 448,0)
+
+inst_592:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x3, 0x8, 3f, x1, 456,0)
+
+inst_593:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x5555555555555555, 0x0, 3f, x1, 464,0)
+
+inst_594:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, -0x5555555555555556, 0x400, 3f, x1, 472,0)
+
+inst_595:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x5, 0x8, 1b, x1, 480,0)
+
+inst_596:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333333; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x3333333333333333, 0x8, 3f, x1, 488,0)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666666; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x20, 3f, x1, 496,0)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, -0xb504f333, 0x2, 1b, x1, 504,0)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f333; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0xb504f333, 0x10, 3f, x1, 512,0)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x2, 0x2, 1b, x1, 520,0)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555554; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x5555555555555554, 0x200, 3f, x1, 528,0)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x0, 0x0, 3f, x1, 536,0)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x4, 0x0, 1b, x1, 544,0)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333332; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x3333333333333332, 0x556, 1b, x1, 552,0)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x2, 1b, x1, 560,0)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0xb504f332, 0x8, 3f, x1, 568,0)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x5555555555555556, 0x556, 1b, x1, 576,0)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, -0x5555555555555555, 0x0, 3f, x1, 584,0)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x6, 0x100, 3f, x1, 592,0)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333334; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x3333333333333334, 0x6, 1b, x1, 600,0)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666667; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0x6666666666666667, 0xa, 1b, x1, 608,0)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, -0xb504f332, 0x8, 3f, x1, 616,0)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f334; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x6666666666666667, 0xb504f334, 0x10, 3f, x1, 624,0)
+
+inst_614:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x3, 0xa, 1b, x1, 632,0)
+
+inst_615:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x5555555555555555, 0x2, 1b, x1, 640,0)
+
+inst_616:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555556; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, -0x5555555555555556, 0x200, 3f, x1, 648,0)
+
+inst_617:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x5, 0x4, 1b, x1, 656,0)
+
+inst_618:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333333; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x3333333333333333, 0x20, 3f, x1, 664,0)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666666; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x6666666666666666, 0x10, 3f, x1, 672,0)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f333; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, -0xb504f333, 0x100, 3f, x1, 680,0)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0xb504f333, 0x2, 3f, x1, 688,0)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x2, 0x6, 1b, x1, 696,0)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555554; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x5555555555555554, 0x400, 1b, x1, 704,0)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x0, 0x8, 3f, x1, 712,0)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x4, 0xa, 1b, x1, 720,0)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x3333333333333332, 0x2, 1b, x1, 728,0)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x6666666666666665, 0x0, 3f, x1, 736,0)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0xb504f332, 0x2, 3f, x1, 744,0)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x5555555555555556, 0x100, 3f, x1, 752,0)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, -0x5555555555555555, 0x4, 1b, x1, 760,0)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x6, 0x4, 3f, x1, 768,0)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x3333333333333334, 0x400, 1b, x1, 776,0)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666667; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0x6666666666666667, 0x20, 3f, x1, 784,0)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, -0xb504f332, 0x4, 1b, x1, 792,0)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f334; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, -0xb504f332, 0xb504f334, 0x2, 1b, x1, 800,0)
+
+inst_636:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x3, 0xa, 1b, x1, 808,0)
+
+inst_637:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x5555555555555555, 0x0, 1b, x1, 816,0)
+
+inst_638:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, -0x5555555555555556, 0x2, 3f, x1, 824,0)
+
+inst_639:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5; immval:0x20; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x5, 0x20, 3f, x1, 832,0)
+
+inst_640:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333333; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x3333333333333333, 0x8, 3f, x1, 840,0)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666666; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x6666666666666666, 0x200, 3f, x1, 848,0)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, -0xb504f333, 0x2, 3f, x1, 856,0)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f333; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0xb504f333, 0x10, 3f, x1, 864,0)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x2, 0x2, 1b, x1, 872,0)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x5555555555555554, 0x0, 1b, x1, 880,0)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x0, 0x200, 3f, x1, 888,0)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x4, 0x556, 1b, x1, 896,0)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x3333333333333332, 0x2, 3f, x1, 904,0)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666665; immval:0x100; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x6666666666666665, 0x100, 3f, x1, 912,0)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0xb504f332, 0x10, 3f, x1, 920,0)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x5555555555555556, 0x8, 1b, x1, 928,0)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, -0x5555555555555555, 0x556, 1b, x1, 936,0)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x6, 0x8, 3f, x1, 944,0)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x3333333333333334, 0x8, 3f, x1, 952,0)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666667; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0x6666666666666667, 0x80, 3f, x1, 960,0)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, -0xb504f332, 0x556, 1b, x1, 968,0)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f334; immval:0x10; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0xb504f334, 0xb504f334, 0x10, 3f, x1, 976,0)
+
+inst_658:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555554; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x5555555555555554, 0x80, 3f, x1, 984,0)
+
+inst_659:
+// rs1_val==0 and rs2_val==0,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x0, 0x400, 3f, x1, 992,0)
+
+inst_660:
+// rs1_val==0 and rs2_val==4,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x4, 0x0, 1b, x1, 1000,0)
+
+inst_661:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333332; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x3333333333333332, 0x200, 3f, x1, 1008,0)
+
+inst_662:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666665; immval:0x40; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x6666666666666665, 0x40, 3f, x1, 1016,0)
+
+inst_663:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0xb504f332, 0x8, 1b, x1, 1024,0)
+
+inst_664:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x5555555555555556, 0x0, 1b, x1, 1032,0)
+
+inst_665:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, -0x5555555555555555, 0x400, 1b, x1, 1040,0)
+
+inst_666:
+// rs1_val==0 and rs2_val==6,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x6, 0x0, 1b, x1, 1048,0)
+
+inst_667:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333334; immval:0x6; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x3333333333333334, 0x6, 3f, x1, 1056,0)
+
+inst_668:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666667; immval:0x556; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0x6666666666666667, 0x556, 1b, x1, 1064,0)
+
+inst_669:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, -0xb504f332, 0x4, 1b, x1, 1072,0)
+
+inst_670:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: bge, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f334; immval:0x8; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x0, 0xb504f334, 0x8, 3f, x1, 1080,0)
+
+inst_671:
+// rs1_val > 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs2_val == 64, rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs1_val == 4503599627370496
+// opcode: bge, op1:x10; op2:x11; op1val:0x10000000000000; op2val:0x40; immval:0x80; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x10000000000000, 0x40, 0x80, 3f, x1, 1088,0)
+
+inst_672:
+// rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs2_val == -144115188075855873, rs1_val == 8
+// opcode: bge, op1:x10; op2:x11; op1val:0x8; op2val:-0x200000000000001; immval:0x200; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x8, -0x200000000000001, 0x200, 3f, x1, 1096,0)
+
+inst_673:
+// rs2_val == 8192, rs1_val == 131072
+// opcode: bge, op1:x10; op2:x11; op1val:0x20000; op2val:0x2000; immval:0x400; align:0
+TEST_BRANCH_OP(bge, x2, x10, x11, 0x20000, 0x2000, 0x400, 1b, x1, 1104,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x18_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x18_1:
+ .fill 23*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 139*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/bgeu-01.S b/riscof/suite/rv64i_m/I/bgeu-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..693d404e213ca11867cc886743c3b4c5ae1e82a6
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/bgeu-01.S
@@ -0,0 +1,4194 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the bgeu instruction of the RISC-V I extension for the bgeu covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",bgeu)
+
+RVTEST_SIGBASE( x6,signature_x6_1)
+
+inst_0:
+// rs1 != rs2, rs1==x9, rs2==x29, rs1_val > 0 and rs2_val > 0, rs1_val > 0 and rs2_val > 0 and rs1_val < rs2_val and imm_val < 0 , rs2_val == 18446744073709551359
+// opcode: bgeu, op1:x9; op2:x29; op1val:0x6666666666666665; op2val:0xfffffffffffffeff; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x10, x9, x29, 0x6666666666666665, 0xfffffffffffffeff, 0x556, 1b, x6, 0,0)
+
+inst_1:
+// rs1 == rs2, rs1==x31, rs2==x31, rs1_val > 0 and rs2_val > 0 and rs1_val == rs2_val and imm_val > 0,
+// opcode: bgeu, op1:x31; op2:x31; op1val:0xb; op2val:0xb; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x10, x31, x31, 0xb, 0xb, 0x200, 3f, x6, 8,0)
+
+inst_2:
+// rs1==x15, rs2==x24, rs1_val > 0 and rs2_val > 0 and rs1_val == rs2_val and imm_val < 0, rs1_val==3689348814741910323 and rs2_val==3689348814741910323
+// opcode: bgeu, op1:x15; op2:x24; op1val:0x3333333333333333; op2val:0x3333333333333333; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x10, x15, x24, 0x3333333333333333, 0x3333333333333333, 0x2, 1b, x6, 16,0)
+
+inst_3:
+// rs1==x29, rs2==x30, rs1_val > 0 and rs2_val > 0 and rs1_val > rs2_val and imm_val > 0 , rs1_val == 18446744073709535231, rs2_val == 18446462598732840959
+// opcode: bgeu, op1:x29; op2:x30; op1val:0xffffffffffffbfff; op2val:0xfffeffffffffffff; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x10, x29, x30, 0xffffffffffffbfff, 0xfffeffffffffffff, 0x80, 3f, x6, 24,0)
+
+inst_4:
+// rs1==x8, rs2==x19, rs1_val > 0 and rs2_val > 0 and rs1_val > rs2_val and imm_val < 0 , rs1_val == 18446743523953737727, rs2_val == 576460752303423488
+// opcode: bgeu, op1:x8; op2:x19; op1val:0xffffff7fffffffff; op2val:0x800000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x10, x8, x19, 0xffffff7fffffffff, 0x800000000000000, 0x4, 1b, x6, 32,0)
+
+inst_5:
+// rs1==x26, rs2==x7, rs1_val > 0 and rs2_val > 0 and rs1_val < rs2_val and imm_val > 0 , rs1_val == 1, rs2_val == 17592186044416
+// opcode: bgeu, op1:x26; op2:x7; op1val:0x1; op2val:0x100000000000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x10, x26, x7, 0x1, 0x100000000000, 0x6, 3f, x6, 40,0)
+
+inst_6:
+// rs1==x16, rs2==x0, rs2_val == 1, rs1_val == 18446744073705357311
+// opcode: bgeu, op1:x16; op2:x0; op1val:0xffffffffffbfffff; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x10, x16, x0, 0xffffffffffbfffff, 0x0, 0x556, 1b, x6, 48,0)
+
+inst_7:
+// rs1==x1, rs2==x26, rs2_val == 2, rs1_val == 68719476736
+// opcode: bgeu, op1:x1; op2:x26; op1val:0x1000000000; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x10, x1, x26, 0x1000000000, 0x2, 0x400, 3f, x6, 56,0)
+
+inst_8:
+// rs1==x4, rs2==x9, rs2_val == 4, rs1_val == 18446744073709549567
+// opcode: bgeu, op1:x4; op2:x9; op1val:0xfffffffffffff7ff; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x10, x4, x9, 0xfffffffffffff7ff, 0x4, 0x0, 1b, x6, 64,0)
+
+inst_9:
+// rs1==x14, rs2==x5, rs2_val == 8, rs1_val == 8589934592
+// opcode: bgeu, op1:x14; op2:x5; op1val:0x200000000; op2val:0x8; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x10, x14, x5, 0x200000000, 0x8, 0x100, 3f, x6, 72,0)
+
+inst_10:
+// rs1==x17, rs2==x8, rs2_val == 16, rs1_val == 17179869184
+// opcode: bgeu, op1:x17; op2:x8; op1val:0x400000000; op2val:0x10; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x10, x17, x8, 0x400000000, 0x10, 0x20, 3f, x6, 80,0)
+
+inst_11:
+// rs1==x28, rs2==x15, rs2_val == 32,
+// opcode: bgeu, op1:x28; op2:x15; op1val:0x0; op2val:0x20; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x10, x28, x15, 0x0, 0x20, 0x2, 3f, x6, 88,0)
+
+inst_12:
+// rs1==x7, rs2==x16, rs2_val == 64, rs1_val == 36028797018963968
+// opcode: bgeu, op1:x7; op2:x16; op1val:0x80000000000000; op2val:0x40; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x10, x7, x16, 0x80000000000000, 0x40, 0x20, 3f, x6, 96,0)
+
+inst_13:
+// rs1==x27, rs2==x17, rs2_val == 128, rs1_val == 1048576
+// opcode: bgeu, op1:x27; op2:x17; op1val:0x100000; op2val:0x80; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x10, x27, x17, 0x100000, 0x80, 0x200, 3f, x6, 104,0)
+
+inst_14:
+// rs1==x20, rs2==x18, rs2_val == 256, rs1_val == 18444492273895866367
+// opcode: bgeu, op1:x20; op2:x18; op1val:0xfff7ffffffffffff; op2val:0x100; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x10, x20, x18, 0xfff7ffffffffffff, 0x100, 0x20, 3f, x6, 112,0)
+
+inst_15:
+// rs1==x11, rs2==x2, rs2_val == 512,
+// opcode: bgeu, op1:x11; op2:x2; op1val:0x80000000000000; op2val:0x200; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x10, x11, x2, 0x80000000000000, 0x200, 0x2, 3f, x6, 120,0)
+
+inst_16:
+// rs1==x21, rs2==x25, rs2_val == 1024, rs1_val == 18437736874454810623
+// opcode: bgeu, op1:x21; op2:x25; op1val:0xffdfffffffffffff; op2val:0x400; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x10, x21, x25, 0xffdfffffffffffff, 0x400, 0x40, 3f, x6, 128,0)
+
+inst_17:
+// rs1==x3, rs2==x28, rs2_val == 2048,
+// opcode: bgeu, op1:x3; op2:x28; op1val:0x1000000000; op2val:0x800; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x10, x3, x28, 0x1000000000, 0x800, 0x6, 1b, x6, 136,0)
+
+inst_18:
+// rs1==x18, rs2==x20, rs2_val == 4096, rs1_val == 18446744073709420543
+// opcode: bgeu, op1:x18; op2:x20; op1val:0xfffffffffffdffff; op2val:0x1000; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x10, x18, x20, 0xfffffffffffdffff, 0x1000, 0x8, 1b, x6, 144,0)
+
+inst_19:
+// rs1==x13, rs2==x14, rs2_val == 8192, rs1_val == 70368744177664
+// opcode: bgeu, op1:x13; op2:x14; op1val:0x400000000000; op2val:0x2000; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x10, x13, x14, 0x400000000000, 0x2000, 0x4, 3f, x6, 152,0)
+
+inst_20:
+// rs1==x0, rs2==x12, rs2_val == 16384,
+// opcode: bgeu, op1:x0; op2:x12; op1val:0x0; op2val:0x4000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x10, x0, x12, 0x0, 0x4000, 0x6, 3f, x6, 160,0)
+
+inst_21:
+// rs1==x19, rs2==x23, rs2_val == 32768, rs1_val == 4096
+// opcode: bgeu, op1:x19; op2:x23; op1val:0x1000; op2val:0x8000; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x19, x23, 0x1000, 0x8000, 0x80, 3f, x6, 168,0)
+RVTEST_SIGBASE( x7,signature_x7_0)
+
+inst_22:
+// rs1==x24, rs2==x27, rs2_val == 65536,
+// opcode: bgeu, op1:x24; op2:x27; op1val:0xfffffffffffff7ff; op2val:0x10000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x24, x27, 0xfffffffffffff7ff, 0x10000, 0x0, 1b, x7, 0,0)
+
+inst_23:
+// rs1==x30, rs2==x3, rs2_val == 131072, rs1_val == 536870912
+// opcode: bgeu, op1:x30; op2:x3; op1val:0x20000000; op2val:0x20000; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x30, x3, 0x20000000, 0x20000, 0x4, 3f, x7, 8,0)
+
+inst_24:
+// rs1==x22, rs2==x11, rs2_val == 262144,
+// opcode: bgeu, op1:x22; op2:x11; op1val:0x13; op2val:0x40000; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x22, x11, 0x13, 0x40000, 0x10, 3f, x7, 16,0)
+
+inst_25:
+// rs1==x6, rs2==x21, rs2_val == 524288, rs1_val == 18446744056529682431
+// opcode: bgeu, op1:x6; op2:x21; op1val:0xfffffffbffffffff; op2val:0x80000; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x6, x21, 0xfffffffbffffffff, 0x80000, 0x8, 1b, x7, 24,0)
+
+inst_26:
+// rs1==x5, rs2==x13, rs2_val == 1048576,
+// opcode: bgeu, op1:x5; op2:x13; op1val:0xffffffffffbfffff; op2val:0x100000; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x5, x13, 0xffffffffffbfffff, 0x100000, 0x400, 1b, x7, 32,0)
+
+inst_27:
+// rs1==x23, rs2==x22, rs2_val == 2097152, rs1_val == 18446708889337462783
+// opcode: bgeu, op1:x23; op2:x22; op1val:0xffffdfffffffffff; op2val:0x200000; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x23, x22, 0xffffdfffffffffff, 0x200000, 0x8, 3f, x7, 40,0)
+
+inst_28:
+// rs1==x10, rs2==x4, rs2_val == 4194304, rs1_val == 18446741874686296063
+// opcode: bgeu, op1:x10; op2:x4; op1val:0xfffffdffffffffff; op2val:0x400000; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x4, 0xfffffdffffffffff, 0x400000, 0x10, 3f, x7, 48,0)
+
+inst_29:
+// rs1==x12, rs2==x10, rs2_val == 8388608, rs1_val == 262144
+// opcode: bgeu, op1:x12; op2:x10; op1val:0x40000; op2val:0x800000; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x12, x10, 0x40000, 0x800000, 0x2, 1b, x7, 56,0)
+
+inst_30:
+// rs1==x2, rs2==x6, rs2_val == 16777216, rs1_val == 18446744073709543423
+// opcode: bgeu, op1:x2; op2:x6; op1val:0xffffffffffffdfff; op2val:0x1000000; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x2, x6, 0xffffffffffffdfff, 0x1000000, 0x100, 3f, x7, 64,0)
+
+inst_31:
+// rs1==x25, rs2==x1, rs2_val == 33554432,
+// opcode: bgeu, op1:x25; op2:x1; op1val:0xf; op2val:0x2000000; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x25, x1, 0xf, 0x2000000, 0x556, 1b, x7, 72,0)
+
+inst_32:
+// rs2_val == 67108864,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x4000000; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x4000000, 0x4, 3f, x7, 80,0)
+
+inst_33:
+// rs2_val == 134217728, rs1_val == 6148914691236517205
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x8000000; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x8000000, 0x20, 3f, x7, 88,0)
+
+inst_34:
+// rs2_val == 268435456,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x10000000; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x10000000, 0x400, 1b, x7, 96,0)
+
+inst_35:
+// rs2_val == 536870912,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x400000000000; op2val:0x20000000; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x400000000000, 0x20000000, 0x400, 1b, x7, 104,0)
+
+inst_36:
+// rs2_val == 1073741824,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x40000000; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x40000000, 0xa, 1b, x7, 112,0)
+
+inst_37:
+// rs2_val == 2147483648,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x7; op2val:0x80000000; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x7, 0x80000000, 0x4, 1b, x7, 120,0)
+
+inst_38:
+// rs2_val == 4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffffbfffff; op2val:0x100000000; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffffbfffff, 0x100000000, 0x10, 3f, x7, 128,0)
+
+inst_39:
+// rs2_val == 8589934592, rs1_val == 18446462598732840959
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffeffffffffffff; op2val:0x200000000; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffeffffffffffff, 0x200000000, 0x2, 1b, x7, 136,0)
+
+inst_40:
+// rs2_val == 17179869184, rs1_val == 35184372088832
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x200000000000; op2val:0x400000000; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x200000000000, 0x400000000, 0x400, 3f, x7, 144,0)
+
+inst_41:
+// rs2_val == 34359738368, rs1_val == 18446673704965373951
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffbfffffffffff; op2val:0x800000000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffbfffffffffff, 0x800000000, 0x6, 3f, x7, 152,0)
+
+inst_42:
+// rs2_val == 68719476736, rs1_val == 137438953472
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2000000000; op2val:0x1000000000; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2000000000, 0x1000000000, 0x556, 1b, x7, 160,0)
+
+inst_43:
+// rs2_val == 137438953472, rs1_val == 288230376151711744
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x400000000000000; op2val:0x2000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x400000000000000, 0x2000000000, 0x2, 3f, x7, 168,0)
+
+inst_44:
+// rs2_val == 274877906944, rs1_val == 18446744073441116159
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffefffffff; op2val:0x4000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffefffffff, 0x4000000000, 0x2, 1b, x7, 176,0)
+
+inst_45:
+// rs2_val == 549755813888, rs1_val == 18446744073709551551
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffffffffbf; op2val:0x8000000000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffffffffbf, 0x8000000000, 0x0, 3f, x7, 184,0)
+
+inst_46:
+// rs2_val == 1099511627776, rs1_val == 18446744073642442751
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffbffffff; op2val:0x10000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffbffffff, 0x10000000000, 0x2, 3f, x7, 192,0)
+
+inst_47:
+// rs2_val == 2199023255552, rs1_val == 12297829382473034410
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x20000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x20000000000, 0x10, 3f, x7, 200,0)
+
+inst_48:
+// rs2_val == 4398046511104, rs1_val == 134217728
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x8000000; op2val:0x40000000000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x8000000, 0x40000000000, 0x200, 3f, x7, 208,0)
+
+inst_49:
+// rs2_val == 8796093022208,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1000; op2val:0x80000000000; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1000, 0x80000000000, 0x80, 3f, x7, 216,0)
+
+inst_50:
+// rs2_val == 35184372088832,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x400000000000000; op2val:0x200000000000; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x400000000000000, 0x200000000000, 0x40, 3f, x7, 224,0)
+
+inst_51:
+// rs2_val == 70368744177664, rs1_val == 4294967296
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x400000000000; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x400000000000, 0x100, 3f, x7, 232,0)
+
+inst_52:
+// rs2_val == 140737488355328,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x800000000000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x800000000000, 0x0, 3f, x7, 240,0)
+
+inst_53:
+// rs2_val == 281474976710656,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x9; op2val:0x1000000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x9, 0x1000000000000, 0x10, 3f, x7, 248,0)
+
+inst_54:
+// rs2_val == 562949953421312, rs1_val == 17870283321406128127
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xf7ffffffffffffff; op2val:0x2000000000000; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xf7ffffffffffffff, 0x2000000000000, 0xa, 1b, x7, 256,0)
+
+inst_55:
+// rs2_val == 1125899906842624, rs1_val == 9223372036854775807
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x7fffffffffffffff; op2val:0x4000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x7fffffffffffffff, 0x4000000000000, 0x6, 1b, x7, 264,0)
+
+inst_56:
+// rs2_val == 2251799813685248, rs1_val == 4503599627370496
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000000000000; op2val:0x8000000000000; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x10000000000000, 0x8000000000000, 0x400, 3f, x7, 272,0)
+
+inst_57:
+// rs2_val == 4503599627370496,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2000000000; op2val:0x10000000000000; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2000000000, 0x10000000000000, 0x40, 3f, x7, 280,0)
+
+inst_58:
+// rs2_val == 9007199254740992,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x20000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x20000000000000, 0x8, 1b, x7, 288,0)
+
+inst_59:
+// rs2_val == 18014398509481984,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffdfffffffffff; op2val:0x40000000000000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffdfffffffffff, 0x40000000000000, 0x200, 3f, x7, 296,0)
+
+inst_60:
+// rs2_val == 36028797018963968, rs1_val == 18446744073709027327
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffff7ffff; op2val:0x80000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffff7ffff, 0x80000000000000, 0x6, 1b, x7, 304,0)
+
+inst_61:
+// rs2_val == 72057594037927936, rs1_val == 18446744073709551613
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffffffffd; op2val:0x100000000000000; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffffffffd, 0x100000000000000, 0x556, 1b, x7, 312,0)
+
+inst_62:
+// rs2_val == 144115188075855872,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x200000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x200000000000000, 0x8, 1b, x7, 320,0)
+
+inst_63:
+// rs2_val == 288230376151711744,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x400000000000000; op2val:0x400000000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x400000000000000, 0x400000000000000, 0x10, 3f, x7, 328,0)
+
+inst_64:
+// rs2_val == 1152921504606846976, rs1_val == 4611686018427387904
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4000000000000000; op2val:0x1000000000000000; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4000000000000000, 0x1000000000000000, 0x400, 3f, x7, 336,0)
+
+inst_65:
+// rs2_val == 2305843009213693952, rs1_val == 18446603336221196287
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffff7fffffffffff; op2val:0x2000000000000000; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffff7fffffffffff, 0x2000000000000000, 0x556, 1b, x7, 344,0)
+
+inst_66:
+// rs2_val == 4611686018427387904, rs1_val == 18446742974197923839
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffeffffffffff; op2val:0x4000000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffeffffffffff, 0x4000000000000000, 0x6, 3f, x7, 352,0)
+
+inst_67:
+// rs2_val == 9223372036854775808, rs1_val == 1125899906842624
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4000000000000; op2val:0x8000000000000000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4000000000000, 0x8000000000000000, 0x0, 1b, x7, 360,0)
+
+inst_68:
+// rs2_val == 18446744073709551614,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2000000000; op2val:0xfffffffffffffffe; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2000000000, 0xfffffffffffffffe, 0x10, 3f, x7, 368,0)
+
+inst_69:
+// rs2_val == 18446744073709551613,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x400000000000000; op2val:0xfffffffffffffffd; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x400000000000000, 0xfffffffffffffffd, 0x8, 3f, x7, 376,0)
+
+inst_70:
+// rs2_val == 18446744073709551611, rs1_val == 18446744073575333887
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffff7ffffff; op2val:0xfffffffffffffffb; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffff7ffffff, 0xfffffffffffffffb, 0x20, 3f, x7, 384,0)
+
+inst_71:
+// rs2_val == 18446744073709551607,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4000000000000000; op2val:0xfffffffffffffff7; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4000000000000000, 0xfffffffffffffff7, 0x2, 3f, x7, 392,0)
+
+inst_72:
+// rs2_val == 18446744073709551599, rs1_val == 1073741824
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x40000000; op2val:0xffffffffffffffef; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x40000000, 0xffffffffffffffef, 0x20, 3f, x7, 400,0)
+
+inst_73:
+// rs2_val == 18446744073709551583, rs1_val == 2199023255552
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x20000000000; op2val:0xffffffffffffffdf; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x20000000000, 0xffffffffffffffdf, 0x200, 3f, x7, 408,0)
+
+inst_74:
+// rs2_val == 18446744073709551551,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x7; op2val:0xffffffffffffffbf; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x7, 0xffffffffffffffbf, 0x556, 1b, x7, 416,0)
+
+inst_75:
+// rs2_val == 18446744073709551487,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffffffbfff; op2val:0xffffffffffffff7f; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffffffbfff, 0xffffffffffffff7f, 0x40, 3f, x7, 424,0)
+
+inst_76:
+// rs2_val == 18446744073709551103,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xfffffffffffffdff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0xfffffffffffffdff, 0x2, 1b, x7, 432,0)
+
+inst_77:
+// rs2_val == 18446744073709550591,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xfffffffffffffbff; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0xfffffffffffffbff, 0x40, 3f, x7, 440,0)
+
+inst_78:
+// rs2_val == 18446744073709549567,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xfffffffffffff7ff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0xfffffffffffff7ff, 0x0, 1b, x7, 448,0)
+
+inst_79:
+// rs2_val == 18446744073709547519,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffbffffff; op2val:0xffffffffffffefff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffbffffff, 0xffffffffffffefff, 0x0, 3f, x7, 456,0)
+
+inst_80:
+// rs2_val == 18446744073709543423, rs1_val == 18158513697557839871
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfbffffffffffffff; op2val:0xffffffffffffdfff; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfbffffffffffffff, 0xffffffffffffdfff, 0xa, 1b, x7, 464,0)
+
+inst_81:
+// rs2_val == 18446744073709535231, rs1_val == 67108864
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4000000; op2val:0xffffffffffffbfff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4000000, 0xffffffffffffbfff, 0x8, 1b, x7, 472,0)
+
+inst_82:
+// rs2_val == 18446744073709518847, rs1_val == 18446744004990074879
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffefffffffff; op2val:0xffffffffffff7fff; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffefffffffff, 0xffffffffffff7fff, 0x400, 3f, x7, 480,0)
+
+inst_83:
+// rs2_val == 18446744073709486079,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffffdffff; op2val:0xfffffffffffeffff; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffffdffff, 0xfffffffffffeffff, 0xa, 1b, x7, 488,0)
+
+inst_84:
+// rs2_val == 18446744073709420543,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xf7ffffffffffffff; op2val:0xfffffffffffdffff; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xf7ffffffffffffff, 0xfffffffffffdffff, 0x20, 3f, x7, 496,0)
+
+inst_85:
+// rs2_val == 18446744073709289471,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x9; op2val:0xfffffffffffbffff; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x9, 0xfffffffffffbffff, 0x20, 3f, x7, 504,0)
+
+inst_86:
+// rs2_val == 18446744073709027327,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xfffffffffff7ffff; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0xfffffffffff7ffff, 0x400, 3f, x7, 512,0)
+
+inst_87:
+// rs2_val == 18446744073708503039, rs1_val == 18446744073709551599
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffffffffef; op2val:0xffffffffffefffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffffffffef, 0xffffffffffefffff, 0x0, 1b, x7, 520,0)
+
+inst_88:
+// rs2_val == 18446744073707454463,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xffffffffffdfffff; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0xffffffffffdfffff, 0x80, 3f, x7, 528,0)
+
+inst_89:
+// rs2_val == 18446744073705357311,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffefffffff; op2val:0xffffffffffbfffff; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffefffffff, 0xffffffffffbfffff, 0x4, 3f, x7, 536,0)
+
+inst_90:
+// rs2_val == 18446744073701163007,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffffffdfff; op2val:0xffffffffff7fffff; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffffffdfff, 0xffffffffff7fffff, 0x4, 1b, x7, 544,0)
+
+inst_91:
+// rs2_val == 18446744073692774399,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xfffffffffeffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0xfffffffffeffffff, 0x6, 1b, x7, 552,0)
+
+inst_92:
+// rs2_val == 18446744073675997183,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffdffffffffff; op2val:0xfffffffffdffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffdffffffffff, 0xfffffffffdffffff, 0x2, 3f, x7, 560,0)
+
+inst_93:
+// rs2_val == 18446744073642442751, rs1_val == 9007199254740992
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x20000000000000; op2val:0xfffffffffbffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x20000000000000, 0xfffffffffbffffff, 0x6, 1b, x7, 568,0)
+
+inst_94:
+// rs2_val == 18446744073575333887, rs1_val == 18446744039349813247
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffff7ffffffff; op2val:0xfffffffff7ffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffff7ffffffff, 0xfffffffff7ffffff, 0x6, 3f, x7, 576,0)
+
+inst_95:
+// rs2_val == 18446744073441116159,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x200000000000; op2val:0xffffffffefffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x200000000000, 0xffffffffefffffff, 0x0, 3f, x7, 584,0)
+
+inst_96:
+// rs2_val == 18446744073172680703,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xffffffffdfffffff; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0xffffffffdfffffff, 0x40, 3f, x7, 592,0)
+
+inst_97:
+// rs2_val == 18446744072635809791, rs1_val == 18446744073709551359
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffffffeff; op2val:0xffffffffbfffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffffffeff, 0xffffffffbfffffff, 0x400, 3f, x7, 600,0)
+
+inst_98:
+// rs2_val == 18446744071562067967,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffdfffffffffff; op2val:0xffffffff7fffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffdfffffffffff, 0xffffffff7fffffff, 0x0, 3f, x7, 608,0)
+
+inst_99:
+// rs2_val == 18446744069414584319,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffff7ffff; op2val:0xfffffffeffffffff; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffff7ffff, 0xfffffffeffffffff, 0x200, 3f, x7, 616,0)
+
+inst_100:
+// rs2_val == 18446744065119617023,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xfffffffdffffffff; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0xfffffffdffffffff, 0x80, 3f, x7, 624,0)
+
+inst_101:
+// rs2_val == 18446744056529682431,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1000; op2val:0xfffffffbffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1000, 0xfffffffbffffffff, 0x400, 3f, x7, 632,0)
+
+inst_102:
+// rs2_val == 18446744039349813247,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffff7fffffffff; op2val:0xfffffff7ffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffff7fffffffff, 0xfffffff7ffffffff, 0x400, 3f, x7, 640,0)
+
+inst_103:
+// rs2_val == 18446744004990074879, rs1_val == 65536
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000; op2val:0xffffffefffffffff; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x10000, 0xffffffefffffffff, 0x100, 3f, x7, 648,0)
+
+inst_104:
+// rs2_val == 18446743936270598143,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x11; op2val:0xffffffdfffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x11, 0xffffffdfffffffff, 0x0, 1b, x7, 656,0)
+
+inst_105:
+// rs2_val == 18446743798831644671,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xf7ffffffffffffff; op2val:0xffffffbfffffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xf7ffffffffffffff, 0xffffffbfffffffff, 0x8, 3f, x7, 664,0)
+
+inst_106:
+// rs2_val == 18446743523953737727, rs1_val == 524288
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x80000; op2val:0xffffff7fffffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x80000, 0xffffff7fffffffff, 0x6, 1b, x7, 672,0)
+
+inst_107:
+// rs2_val == 18446742974197923839, rs1_val == 13835058055282163711
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xbfffffffffffffff; op2val:0xfffffeffffffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xbfffffffffffffff, 0xfffffeffffffffff, 0x8, 1b, x7, 680,0)
+
+inst_108:
+// rs2_val == 18446741874686296063, rs1_val == 8
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x8; op2val:0xfffffdffffffffff; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x8, 0xfffffdffffffffff, 0x200, 3f, x7, 688,0)
+
+inst_109:
+// rs2_val == 18446739675663040511,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xfffffbffffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0xfffffbffffffffff, 0x0, 3f, x7, 696,0)
+
+inst_110:
+// rs2_val == 18446735277616529407,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xfffff7ffffffffff; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0xfffff7ffffffffff, 0xa, 1b, x7, 704,0)
+
+inst_111:
+// rs2_val == 18446726481523507199, rs1_val == 128
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x80; op2val:0xffffefffffffffff; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x80, 0xffffefffffffffff, 0x556, 1b, x7, 712,0)
+
+inst_112:
+// rs2_val == 18446708889337462783,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xffffdfffffffffff; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0xffffdfffffffffff, 0x80, 3f, x7, 720,0)
+
+inst_113:
+// rs2_val == 18446673704965373951,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffffdffff; op2val:0xffffbfffffffffff; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffffdffff, 0xffffbfffffffffff, 0x10, 3f, x7, 728,0)
+
+inst_114:
+// rs2_val == 18446603336221196287, rs1_val == 18446735277616529407
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffff7ffffffffff; op2val:0xffff7fffffffffff; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffff7ffffffffff, 0xffff7fffffffffff, 0x20, 3f, x7, 736,0)
+
+inst_115:
+// rs2_val == 18446181123756130303, rs1_val == 17592186044416
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000000; op2val:0xfffdffffffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000000, 0xfffdffffffffffff, 0x0, 3f, x7, 744,0)
+
+inst_116:
+// rs2_val == 18445618173802708991,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xfffbffffffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0xfffbffffffffffff, 0x2, 1b, x7, 752,0)
+
+inst_117:
+// rs2_val == 18444492273895866367,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xfff7ffffffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0xfff7ffffffffffff, 0x400, 1b, x7, 760,0)
+
+inst_118:
+// rs2_val == 18442240474082181119,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffbffffff; op2val:0xffefffffffffffff; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffbffffff, 0xffefffffffffffff, 0x20, 3f, x7, 768,0)
+
+inst_119:
+// rs2_val == 18437736874454810623,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffffdffff; op2val:0xffdfffffffffffff; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffffdffff, 0xffdfffffffffffff, 0x556, 1b, x7, 776,0)
+
+inst_120:
+// rs2_val == 18428729675200069631, rs1_val == 18374686479671623679
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfeffffffffffffff; op2val:0xffbfffffffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfeffffffffffffff, 0xffbfffffffffffff, 0x400, 1b, x7, 784,0)
+
+inst_121:
+// rs2_val == 18410715276690587647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb; op2val:0xff7fffffffffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb, 0xff7fffffffffffff, 0x6, 1b, x7, 792,0)
+
+inst_122:
+// rs2_val == 18374686479671623679,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffbffffffff; op2val:0xfeffffffffffffff; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffbffffffff, 0xfeffffffffffffff, 0x556, 1b, x7, 800,0)
+
+inst_123:
+// rs2_val == 18302628885633695743, rs1_val == 144115188075855872
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x200000000000000; op2val:0xfdffffffffffffff; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x200000000000000, 0xfdffffffffffffff, 0x20, 3f, x7, 808,0)
+
+inst_124:
+// rs2_val == 18158513697557839871,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffeffffffffffff; op2val:0xfbffffffffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffeffffffffffff, 0xfbffffffffffffff, 0x0, 3f, x7, 816,0)
+
+inst_125:
+// rs2_val == 17870283321406128127, rs1_val == 18302628885633695743
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfdffffffffffffff; op2val:0xf7ffffffffffffff; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfdffffffffffffff, 0xf7ffffffffffffff, 0x200, 3f, x7, 824,0)
+
+inst_126:
+// rs2_val == 17293822569102704639, rs1_val == 512
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x200; op2val:0xefffffffffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x200, 0xefffffffffffffff, 0x2, 1b, x7, 832,0)
+
+inst_127:
+// rs2_val == 16140901064495857663, rs1_val == 18446181123756130303
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffdffffffffffff; op2val:0xdfffffffffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffdffffffffffff, 0xdfffffffffffffff, 0x2, 3f, x7, 840,0)
+
+inst_128:
+// rs2_val == 13835058055282163711,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfeffffffffffffff; op2val:0xbfffffffffffffff; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfeffffffffffffff, 0xbfffffffffffffff, 0x40, 3f, x7, 848,0)
+
+inst_129:
+// rs2_val == 9223372036854775807,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffff7ffffffffff; op2val:0x7fffffffffffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffff7ffffffffff, 0x7fffffffffffffff, 0x4, 1b, x7, 856,0)
+
+inst_130:
+// rs2_val == 6148914691236517205, rs1_val == 2147483648
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x80000000; op2val:0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x80000000, 0x5555555555555555, 0x556, 1b, x7, 864,0)
+
+inst_131:
+// rs2_val == 12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffffffffef; op2val:0xaaaaaaaaaaaaaaaa; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffffffffef, 0xaaaaaaaaaaaaaaaa, 0x200, 3f, x7, 872,0)
+
+inst_132:
+// rs1_val == 2, rs1_val==2 and rs2_val==3037000499
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0xb504f333, 0x6, 3f, x7, 880,0)
+
+inst_133:
+// rs1_val == 4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x100000000000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x100000000000, 0x200, 3f, x7, 888,0)
+
+inst_134:
+// rs1_val == 16,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10; op2val:0x40000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x10, 0x40000, 0x6, 3f, x7, 896,0)
+
+inst_135:
+// rs1_val == 32,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x20; op2val:0xf7ffffffffffffff; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x20, 0xf7ffffffffffffff, 0x40, 3f, x7, 904,0)
+
+inst_136:
+// rs1_val == 64,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x40; op2val:0x20000000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x40, 0x20000000, 0x0, 3f, x7, 912,0)
+
+inst_137:
+// rs1_val == 256,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100; op2val:0x10000000000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100, 0x10000000000, 0x200, 3f, x7, 920,0)
+
+inst_138:
+// rs1_val == 1024,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x400; op2val:0x800; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x400, 0x800, 0xa, 1b, x7, 928,0)
+
+inst_139:
+// rs1_val == 2048,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x800; op2val:0xffffbfffffffffff; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x800, 0xffffbfffffffffff, 0x10, 3f, x7, 936,0)
+
+inst_140:
+// rs1_val == 8192,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2000; op2val:0xfdffffffffffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2000, 0xfdffffffffffffff, 0x4, 1b, x7, 944,0)
+
+inst_141:
+// rs1_val == 16384,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4000; op2val:0xffffffbfffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4000, 0xffffffbfffffffff, 0x0, 1b, x7, 952,0)
+
+inst_142:
+// rs1_val == 32768,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x8000; op2val:0xffffffff7fffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x8000, 0xffffffff7fffffff, 0x0, 1b, x7, 960,0)
+
+inst_143:
+// rs1_val == 131072,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x20000; op2val:0x80000000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x20000, 0x80000000, 0x200, 3f, x7, 968,0)
+
+inst_144:
+// rs1_val == 2097152,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x200000; op2val:0xffffffffffefffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x200000, 0xffffffffffefffff, 0x6, 1b, x7, 976,0)
+
+inst_145:
+// rs1_val == 4194304,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x400000; op2val:0xffffffffffffffef; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x400000, 0xffffffffffffffef, 0x400, 3f, x7, 984,0)
+
+inst_146:
+// rs1_val == 8388608,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x800000; op2val:0x200000000; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x800000, 0x200000000, 0x20, 3f, x7, 992,0)
+
+inst_147:
+// rs1_val == 16777216,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1000000; op2val:0x20000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1000000, 0x20000, 0x6, 3f, x7, 1000,0)
+
+inst_148:
+// rs1_val == 33554432,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2000000; op2val:0xfffff7ffffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2000000, 0xfffff7ffffffffff, 0x0, 3f, x7, 1008,0)
+
+inst_149:
+// rs1_val == 268435456,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000000; op2val:0xfffffffdffffffff; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x10000000, 0xfffffffdffffffff, 0x10, 3f, x7, 1016,0)
+
+inst_150:
+// rs1_val == 34359738368,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x800000000; op2val:0x800000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x800000000, 0x800000000000000, 0x8, 1b, x7, 1024,0)
+
+inst_151:
+// rs1_val == 274877906944,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4000000000; op2val:0xffffffffffdfffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4000000000, 0xffffffffffdfffff, 0x2, 3f, x7, 1032,0)
+
+inst_152:
+// rs1_val == 549755813888,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x8000000000; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x8000000000, 0x6666666666666666, 0x6, 3f, x7, 1040,0)
+
+inst_153:
+// rs1_val == 1099511627776,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x10000000000; op2val:0x2000000000000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x10000000000, 0x2000000000000, 0x0, 1b, x7, 1048,0)
+
+inst_154:
+// rs1_val == 4398046511104,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x40000000000; op2val:0x80000000000; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x40000000000, 0x80000000000, 0x8, 1b, x7, 1056,0)
+
+inst_155:
+// rs1_val == 8796093022208,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x80000000000; op2val:0x200; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x80000000000, 0x200, 0x4, 3f, x7, 1064,0)
+
+inst_156:
+// rs1_val == 140737488355328,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x800000000000; op2val:0xaaaaaaaaaaaaaaa9; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x800000000000, 0xaaaaaaaaaaaaaaa9, 0x4, 1b, x7, 1072,0)
+
+inst_157:
+// rs1_val == 281474976710656,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1000000000000; op2val:0xb504f333; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1000000000000, 0xb504f333, 0x100, 3f, x7, 1080,0)
+
+inst_158:
+// rs1_val == 562949953421312,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2000000000000; op2val:0xc; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2000000000000, 0xc, 0x2, 1b, x7, 1088,0)
+
+inst_159:
+// rs1_val == 2251799813685248,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x8000000000000; op2val:0xd; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x8000000000000, 0xd, 0x100, 3f, x7, 1096,0)
+
+inst_160:
+// rs1_val == 18014398509481984,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x40000000000000; op2val:0xffffffefffffffff; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x40000000000000, 0xffffffefffffffff, 0x556, 1b, x7, 1104,0)
+
+inst_161:
+// rs1_val == 72057594037927936,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000000000; op2val:0xaaaaaaaaaaaaaaab; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000000000, 0xaaaaaaaaaaaaaaab, 0x200, 3f, x7, 1112,0)
+
+inst_162:
+// rs1_val == 576460752303423488,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x800000000000000; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x800000000000000, 0x3333333333333333, 0x400, 3f, x7, 1120,0)
+
+inst_163:
+// rs1_val == 1152921504606846976,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1000000000000000; op2val:0xfffffffbffffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1000000000000000, 0xfffffffbffffffff, 0x4, 1b, x7, 1128,0)
+
+inst_164:
+// rs1_val == 2305843009213693952,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2000000000000000; op2val:0x1; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2000000000000000, 0x1, 0x0, 3f, x7, 1136,0)
+
+inst_165:
+// rs1_val == 9223372036854775808,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x8000000000000000; op2val:0x7; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x8000000000000000, 0x7, 0x2, 3f, x7, 1144,0)
+
+inst_166:
+// rs1_val == 18446744073709551614,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffffffffe; op2val:0xffffffffdfffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffffffffe, 0xffffffffdfffffff, 0x400, 3f, x7, 1152,0)
+
+inst_167:
+// rs1_val == 18446744073709551611,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffffffffb; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffffffffb, 0x0, 0x4, 1b, x7, 1160,0)
+
+inst_168:
+// rs1_val == 18446744073709551607,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffffffff7; op2val:0xffff7fffffffffff; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffffffff7, 0xffff7fffffffffff, 0x100, 3f, x7, 1168,0)
+
+inst_169:
+// rs1_val == 18446744073709551583,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffffffffdf; op2val:0x40000000000; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffffffffdf, 0x40000000000, 0x556, 1b, x7, 1176,0)
+
+inst_170:
+// rs1_val == 18446744073709551487,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffffffff7f; op2val:0xfeffffffffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffffffff7f, 0xfeffffffffffffff, 0x2, 1b, x7, 1184,0)
+
+inst_171:
+// rs1_val == 18446744073709551103,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffffffdff; op2val:0xfffffeffffffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffffffdff, 0xfffffeffffffffff, 0x4, 1b, x7, 1192,0)
+
+inst_172:
+// rs1_val == 18446744073709550591,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffffffbff; op2val:0xf7ffffffffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffffffbff, 0xf7ffffffffffffff, 0x2, 3f, x7, 1200,0)
+
+inst_173:
+// rs1_val == 18446744073709547519,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffffffefff; op2val:0x200000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffffffefff, 0x200000000000, 0x2, 1b, x7, 1208,0)
+
+inst_174:
+// rs1_val == 18446744073709518847,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffffff7fff; op2val:0x2000000000; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffffff7fff, 0x2000000000, 0x8, 3f, x7, 1216,0)
+
+inst_175:
+// rs1_val == 18446744073709486079,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffffeffff; op2val:0x8000000000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffffeffff, 0x8000000000, 0x200, 3f, x7, 1224,0)
+
+inst_176:
+// rs1_val == 18446744073709289471,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffffbffff; op2val:0x4000000; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffffbffff, 0x4000000, 0x80, 3f, x7, 1232,0)
+
+inst_177:
+// rs1_val == 18446744073708503039,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffffefffff; op2val:0xffff7fffffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffffefffff, 0xffff7fffffffffff, 0x2, 3f, x7, 1240,0)
+
+inst_178:
+// rs1_val == 18446744073707454463,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffffdfffff; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffffdfffff, 0x3, 0x8, 3f, x7, 1248,0)
+
+inst_179:
+// rs1_val == 18446744073701163007,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffff7fffff; op2val:0x9; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffff7fffff, 0x9, 0x200, 3f, x7, 1256,0)
+
+inst_180:
+// rs1_val == 18446744073692774399,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffeffffff; op2val:0x100000000000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffeffffff, 0x100000000000, 0x0, 3f, x7, 1264,0)
+
+inst_181:
+// rs1_val == 18446744073675997183,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffffdffffff; op2val:0x5555555555555556; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffffdffffff, 0x5555555555555556, 0x200, 3f, x7, 1272,0)
+
+inst_182:
+// rs1_val == 18446744073172680703,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffdfffffff; op2val:0x10000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffdfffffff, 0x10000, 0x6, 3f, x7, 1280,0)
+
+inst_183:
+// rs1_val == 18446744072635809791,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffffbfffffff; op2val:0xffffffffffefffff; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffffbfffffff, 0xffffffffffefffff, 0x556, 1b, x7, 1288,0)
+
+inst_184:
+// rs1_val == 18446744071562067967,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff7fffffff; op2val:0xffff7fffffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff7fffffff, 0xffff7fffffffffff, 0x0, 1b, x7, 1296,0)
+
+inst_185:
+// rs1_val == 18446744069414584319,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffeffffffff; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffeffffffff, 0x0, 0x4, 1b, x7, 1304,0)
+
+inst_186:
+// rs1_val == 18446744065119617023,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffffdffffffff; op2val:0xfffffffffffffffe; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffffdffffffff, 0xfffffffffffffffe, 0x2, 1b, x7, 1312,0)
+
+inst_187:
+// rs1_val == 18446743936270598143,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffdfffffffff; op2val:0xffffffffffffff7f; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffdfffffffff, 0xffffffffffffff7f, 0xa, 1b, x7, 1320,0)
+
+inst_188:
+// rs1_val == 18446743798831644671,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffbfffffffff; op2val:0x2000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffbfffffffff, 0x2000, 0x200, 3f, x7, 1328,0)
+
+inst_189:
+// rs1_val == 18446739675663040511,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffffbffffffffff; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffffbffffffffff, 0x2, 0x556, 1b, x7, 1336,0)
+
+inst_190:
+// rs1_val == 18446726481523507199,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffefffffffffff; op2val:0xffffdfffffffffff; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffefffffffffff, 0xffffdfffffffffff, 0x100, 3f, x7, 1344,0)
+
+inst_191:
+// rs1_val == 18445618173802708991,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xfffbffffffffffff; op2val:0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xfffbffffffffffff, 0x5555555555555555, 0x556, 1b, x7, 1352,0)
+
+inst_192:
+// rs1_val == 18442240474082181119,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffefffffffffffff; op2val:0xfffffffffdffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffefffffffffffff, 0xfffffffffdffffff, 0x400, 3f, x7, 1360,0)
+
+inst_193:
+// rs1_val == 18428729675200069631,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffbfffffffffffff; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffbfffffffffffff, 0x5, 0x8, 1b, x7, 1368,0)
+
+inst_194:
+// rs1_val == 18410715276690587647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xff7fffffffffffff; op2val:0x200000000; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xff7fffffffffffff, 0x200000000, 0x8, 3f, x7, 1376,0)
+
+inst_195:
+// rs1_val == 17293822569102704639,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xefffffffffffffff; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xefffffffffffffff, 0x4, 0x40, 3f, x7, 1384,0)
+
+inst_196:
+// rs1_val == 16140901064495857663,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xdfffffffffffffff; op2val:0x2000000000; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xdfffffffffffffff, 0x2000000000, 0x100, 3f, x7, 1392,0)
+
+inst_197:
+// rs1_val==3 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x3, 0x80, 3f, x7, 1400,0)
+
+inst_198:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x5555555555555555, 0x0, 1b, x7, 1408,0)
+
+inst_199:
+// rs1_val==3 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xaaaaaaaaaaaaaaaa; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0xaaaaaaaaaaaaaaaa, 0x80, 3f, x7, 1416,0)
+
+inst_200:
+// rs1_val==3 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x5, 0x10, 3f, x7, 1424,0)
+
+inst_201:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x3333333333333333, 0x6, 3f, x7, 1432,0)
+
+inst_202:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666666; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x6666666666666666, 0x100, 3f, x7, 1440,0)
+
+inst_203:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0xb504f333, 0x400, 1b, x7, 1448,0)
+
+inst_204:
+// rs1_val==3 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x0, 0x4, 3f, x7, 1456,0)
+
+inst_205:
+// rs1_val==3 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x100000000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x100000000, 0x200, 3f, x7, 1464,0)
+
+inst_206:
+// rs1_val==3 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x2, 0x6, 3f, x7, 1472,0)
+
+inst_207:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x5555555555555554, 0x4, 3f, x7, 1480,0)
+
+inst_208:
+// rs1_val==3 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xaaaaaaaaaaaaaaa9; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0xaaaaaaaaaaaaaaa9, 0x4, 3f, x7, 1488,0)
+
+inst_209:
+// rs1_val==3 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x4; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x4, 0x200, 3f, x7, 1496,0)
+
+inst_210:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333332; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x3333333333333332, 0x40, 3f, x7, 1504,0)
+
+inst_211:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666665; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x6666666666666665, 0x100, 3f, x7, 1512,0)
+
+inst_212:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0xb504f332, 0x556, 1b, x7, 1520,0)
+
+inst_213:
+// rs1_val==3 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xffffffff; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0xffffffff, 0x200, 3f, x7, 1528,0)
+
+inst_214:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555556; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x5555555555555556, 0xa, 1b, x7, 1536,0)
+
+inst_215:
+// rs1_val==3 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xaaaaaaaaaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0xaaaaaaaaaaaaaaab, 0x4, 3f, x7, 1544,0)
+
+inst_216:
+// rs1_val==3 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x6, 0x6, 1b, x7, 1552,0)
+
+inst_217:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x3333333333333334, 0x400, 3f, x7, 1560,0)
+
+inst_218:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x6666666666666667, 0x8, 3f, x7, 1568,0)
+
+inst_219:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0xb504f334, 0x400, 1b, x7, 1576,0)
+
+inst_220:
+// rs1_val==3 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x1; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x1, 0x2, 3f, x7, 1584,0)
+
+inst_221:
+// rs1_val==3 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3; op2val:0x100000001; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3, 0x100000001, 0x2, 1b, x7, 1592,0)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x3, 0x0, 1b, x7, 1600,0)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555555; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x80, 3f, x7, 1608,0)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xaaaaaaaaaaaaaaaa; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0xaaaaaaaaaaaaaaaa, 0x6, 3f, x7, 1616,0)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x5, 0x0, 3f, x7, 1624,0)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333333; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x3333333333333333, 0x8, 1b, x7, 1632,0)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x6666666666666666, 0x0, 3f, x7, 1640,0)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f333; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0xb504f333, 0x556, 1b, x7, 1648,0)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x0, 0x40, 3f, x7, 1656,0)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x100000000; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x100000000, 0x4, 1b, x7, 1664,0)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x2, 0x4, 1b, x7, 1672,0)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555554; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x5555555555555554, 0x400, 1b, x7, 1680,0)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xaaaaaaaaaaaaaaa9; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0xaaaaaaaaaaaaaaa9, 0x2, 1b, x7, 1688,0)
+
+inst_234:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x4, 0x100, 3f, x7, 1696,0)
+
+inst_235:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x3333333333333332, 0x0, 1b, x7, 1704,0)
+
+inst_236:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x6666666666666665, 0x4, 1b, x7, 1712,0)
+
+inst_237:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0xb504f332, 0x20, 3f, x7, 1720,0)
+
+inst_238:
+// rs1_val==6148914691236517205 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0xffffffff, 0x2, 1b, x7, 1728,0)
+
+inst_239:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555556; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x5555555555555556, 0x200, 3f, x7, 1736,0)
+
+inst_240:
+// rs1_val==6148914691236517205 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xaaaaaaaaaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0xaaaaaaaaaaaaaaab, 0x4, 3f, x7, 1744,0)
+
+inst_241:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x6, 0xa, 1b, x7, 1752,0)
+
+inst_242:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333334; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x3333333333333334, 0x0, 1b, x7, 1760,0)
+
+inst_243:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x6666666666666667, 0x6, 1b, x7, 1768,0)
+
+inst_244:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f334; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0xb504f334, 0x20, 3f, x7, 1776,0)
+
+inst_245:
+// rs1_val==6148914691236517205 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x1; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x1, 0xa, 1b, x7, 1784,0)
+
+inst_246:
+// rs1_val==6148914691236517205 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x100000001; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555555, 0x100000001, 0x0, 1b, x7, 1792,0)
+
+inst_247:
+// rs1_val==12297829382473034410 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x3, 0x8, 1b, x7, 1800,0)
+
+inst_248:
+// rs1_val==12297829382473034410 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555555, 0x2, 3f, x7, 1808,0)
+
+inst_249:
+// rs1_val==12297829382473034410 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xaaaaaaaaaaaaaaaa; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xaaaaaaaaaaaaaaaa, 0x6, 3f, x7, 1816,0)
+
+inst_250:
+// rs1_val==12297829382473034410 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5, 0x2, 1b, x7, 1824,0)
+
+inst_251:
+// rs1_val==12297829382473034410 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x3333333333333333; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x3333333333333333, 0x80, 3f, x7, 1832,0)
+
+inst_252:
+// rs1_val==12297829382473034410 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x6666666666666666; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x6666666666666666, 0x20, 3f, x7, 1840,0)
+
+inst_253:
+// rs1_val==12297829382473034410 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xb504f333, 0x80, 3f, x7, 1848,0)
+
+inst_254:
+// rs1_val==12297829382473034410 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x0, 0x6, 3f, x7, 1856,0)
+
+inst_255:
+// rs1_val==12297829382473034410 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x100000000; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x100000000, 0x400, 1b, x7, 1864,0)
+
+inst_256:
+// rs1_val==12297829382473034410 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x2, 0x100, 3f, x7, 1872,0)
+
+inst_257:
+// rs1_val==12297829382473034410 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x5555555555555554; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555554, 0x400, 3f, x7, 1880,0)
+
+inst_258:
+// rs1_val==12297829382473034410 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xaaaaaaaaaaaaaaa9; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xaaaaaaaaaaaaaaa9, 0xa, 1b, x7, 1888,0)
+
+inst_259:
+// rs1_val==12297829382473034410 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x4, 0x8, 1b, x7, 1896,0)
+
+inst_260:
+// rs1_val==12297829382473034410 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x3333333333333332; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x3333333333333332, 0x80, 3f, x7, 1904,0)
+
+inst_261:
+// rs1_val==12297829382473034410 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x6666666666666665, 0x4, 1b, x7, 1912,0)
+
+inst_262:
+// rs1_val==12297829382473034410 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xb504f332, 0x556, 1b, x7, 1920,0)
+
+inst_263:
+// rs1_val==12297829382473034410 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xffffffff, 0x0, 1b, x7, 1928,0)
+
+inst_264:
+// rs1_val==12297829382473034410 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555556, 0x100, 3f, x7, 1936,0)
+
+inst_265:
+// rs1_val==12297829382473034410 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xaaaaaaaaaaaaaaab; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xaaaaaaaaaaaaaaab, 0x0, 1b, x7, 1944,0)
+
+inst_266:
+// rs1_val==12297829382473034410 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x6, 0x20, 3f, x7, 1952,0)
+
+inst_267:
+// rs1_val==12297829382473034410 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x3333333333333334, 0x4, 3f, x7, 1960,0)
+
+inst_268:
+// rs1_val==12297829382473034410 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x6666666666666667; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x6666666666666667, 0x2, 3f, x7, 1968,0)
+
+inst_269:
+// rs1_val==12297829382473034410 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xb504f334, 0x400, 1b, x7, 1976,0)
+
+inst_270:
+// rs1_val==12297829382473034410 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x1; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x1, 0x556, 1b, x7, 1984,0)
+
+inst_271:
+// rs1_val==12297829382473034410 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x100000001; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x100000001, 0x20, 3f, x7, 1992,0)
+
+inst_272:
+// rs1_val==5 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x3, 0x4, 3f, x7, 2000,0)
+
+inst_273:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x5555555555555555, 0x2, 1b, x7, 2008,0)
+
+inst_274:
+// rs1_val==5 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xaaaaaaaaaaaaaaaa; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0xaaaaaaaaaaaaaaaa, 0x400, 3f, x7, 2016,0)
+
+inst_275:
+// rs1_val==5 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x5, 0x2, 3f, x7, 2024,0)
+
+inst_276:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x3333333333333333, 0x6, 1b, x7, 2032,0)
+
+inst_277:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666666; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x6666666666666666, 0x8, 1b, x7, 2040,0)
+RVTEST_SIGBASE( x7,signature_x7_1)
+
+inst_278:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0xb504f333, 0x6, 1b, x7, 0,0)
+
+inst_279:
+// rs1_val==5 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x0, 0x4, 1b, x7, 8,0)
+
+inst_280:
+// rs1_val==5 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x100000000; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x100000000, 0x40, 3f, x7, 16,0)
+
+inst_281:
+// rs1_val==5 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x2, 0x2, 3f, x7, 24,0)
+
+inst_282:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555554; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x5555555555555554, 0x10, 3f, x7, 32,0)
+
+inst_283:
+// rs1_val==5 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xaaaaaaaaaaaaaaa9; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0xaaaaaaaaaaaaaaa9, 0x4, 1b, x7, 40,0)
+
+inst_284:
+// rs1_val==5 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x4; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x4, 0x200, 3f, x7, 48,0)
+
+inst_285:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333332; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x3333333333333332, 0x20, 3f, x7, 56,0)
+
+inst_286:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666665; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x6666666666666665, 0x556, 1b, x7, 64,0)
+
+inst_287:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0xb504f332, 0x2, 3f, x7, 72,0)
+
+inst_288:
+// rs1_val==5 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xffffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0xffffffff, 0x6, 1b, x7, 80,0)
+
+inst_289:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x5555555555555556, 0x0, 3f, x7, 88,0)
+
+inst_290:
+// rs1_val==5 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xaaaaaaaaaaaaaaab; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0xaaaaaaaaaaaaaaab, 0x400, 3f, x7, 96,0)
+
+inst_291:
+// rs1_val==5 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x6; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x6, 0x556, 1b, x7, 104,0)
+
+inst_292:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333334; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x3333333333333334, 0x6, 3f, x7, 112,0)
+
+inst_293:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666667; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x6666666666666667, 0x400, 3f, x7, 120,0)
+
+inst_294:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f334; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0xb504f334, 0x2, 3f, x7, 128,0)
+
+inst_295:
+// rs1_val==5 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x1, 0x8, 1b, x7, 136,0)
+
+inst_296:
+// rs1_val==5 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5; op2val:0x100000001; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5, 0x100000001, 0x6, 1b, x7, 144,0)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x3, 0x400, 3f, x7, 152,0)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x5555555555555555, 0x4, 3f, x7, 160,0)
+
+inst_299:
+// rs1_val==3689348814741910323 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xaaaaaaaaaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0xaaaaaaaaaaaaaaaa, 0x0, 3f, x7, 168,0)
+
+inst_300:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x5, 0x4, 1b, x7, 176,0)
+
+inst_301:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666666; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x6666666666666666, 0x556, 1b, x7, 184,0)
+
+inst_302:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f333; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0xb504f333, 0x100, 3f, x7, 192,0)
+
+inst_303:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x0, 0xa, 1b, x7, 200,0)
+
+inst_304:
+// rs1_val==3689348814741910323 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x100000000; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x100000000, 0x80, 3f, x7, 208,0)
+
+inst_305:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x2, 0x6, 3f, x7, 216,0)
+
+inst_306:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555554; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x5555555555555554, 0x20, 3f, x7, 224,0)
+
+inst_307:
+// rs1_val==3689348814741910323 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xaaaaaaaaaaaaaaa9; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0xaaaaaaaaaaaaaaa9, 0x200, 3f, x7, 232,0)
+
+inst_308:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x4; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x4, 0x100, 3f, x7, 240,0)
+
+inst_309:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333332; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x3333333333333332, 0x200, 3f, x7, 248,0)
+
+inst_310:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x6666666666666665, 0x400, 1b, x7, 256,0)
+
+inst_311:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f332; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0xb504f332, 0x40, 3f, x7, 264,0)
+
+inst_312:
+// rs1_val==3689348814741910323 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xffffffff; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0xffffffff, 0x40, 3f, x7, 272,0)
+
+inst_313:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x5555555555555556, 0x4, 3f, x7, 280,0)
+
+inst_314:
+// rs1_val==3689348814741910323 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xaaaaaaaaaaaaaaab; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0xaaaaaaaaaaaaaaab, 0xa, 1b, x7, 288,0)
+
+inst_315:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x6, 0x2, 1b, x7, 296,0)
+
+inst_316:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333334; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x3333333333333334, 0xa, 1b, x7, 304,0)
+
+inst_317:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x6666666666666667, 0x4, 3f, x7, 312,0)
+
+inst_318:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f334; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0xb504f334, 0x100, 3f, x7, 320,0)
+
+inst_319:
+// rs1_val==3689348814741910323 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x1; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x1, 0x20, 3f, x7, 328,0)
+
+inst_320:
+// rs1_val==3689348814741910323 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x100000001; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333333, 0x100000001, 0x400, 3f, x7, 336,0)
+
+inst_321:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x3, 0x556, 1b, x7, 344,0)
+
+inst_322:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x5555555555555555, 0x100, 3f, x7, 352,0)
+
+inst_323:
+// rs1_val==7378697629483820646 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xaaaaaaaaaaaaaaaa; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0xaaaaaaaaaaaaaaaa, 0x40, 3f, x7, 360,0)
+
+inst_324:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x5, 0x556, 1b, x7, 368,0)
+
+inst_325:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x3333333333333333, 0x6, 1b, x7, 376,0)
+
+inst_326:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666666; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x10, 3f, x7, 384,0)
+
+inst_327:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0xb504f333, 0x400, 1b, x7, 392,0)
+
+inst_328:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x0, 0x2, 3f, x7, 400,0)
+
+inst_329:
+// rs1_val==7378697629483820646 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x100000000; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x100000000, 0x10, 3f, x7, 408,0)
+
+inst_330:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x2, 0x400, 3f, x7, 416,0)
+
+inst_331:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555554; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x5555555555555554, 0x40, 3f, x7, 424,0)
+
+inst_332:
+// rs1_val==7378697629483820646 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xaaaaaaaaaaaaaaa9; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0xaaaaaaaaaaaaaaa9, 0x20, 3f, x7, 432,0)
+
+inst_333:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x4, 0x10, 3f, x7, 440,0)
+
+inst_334:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333332; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x3333333333333332, 0x4, 3f, x7, 448,0)
+
+inst_335:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x6666666666666665, 0x2, 1b, x7, 456,0)
+
+inst_336:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0xb504f332, 0x0, 3f, x7, 464,0)
+
+inst_337:
+// rs1_val==7378697629483820646 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0xffffffff, 0x0, 1b, x7, 472,0)
+
+inst_338:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x5555555555555556, 0x6, 3f, x7, 480,0)
+
+inst_339:
+// rs1_val==7378697629483820646 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xaaaaaaaaaaaaaaab; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0xaaaaaaaaaaaaaaab, 0x10, 3f, x7, 488,0)
+
+inst_340:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x6, 0x100, 3f, x7, 496,0)
+
+inst_341:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x3333333333333334, 0x4, 3f, x7, 504,0)
+
+inst_342:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666667; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x6666666666666667, 0x80, 3f, x7, 512,0)
+
+inst_343:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0xb504f334, 0x0, 3f, x7, 520,0)
+
+inst_344:
+// rs1_val==7378697629483820646 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x1, 0x8, 3f, x7, 528,0)
+
+inst_345:
+// rs1_val==7378697629483820646 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x100000001; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666666, 0x100000001, 0x100, 3f, x7, 536,0)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x3, 0x400, 1b, x7, 544,0)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x5555555555555555, 0x6, 1b, x7, 552,0)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xaaaaaaaaaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0xaaaaaaaaaaaaaaaa, 0x0, 1b, x7, 560,0)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x5, 0x2, 3f, x7, 568,0)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x3333333333333333, 0x4, 1b, x7, 576,0)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x6666666666666666, 0x0, 3f, x7, 584,0)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f333; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0xb504f333, 0x10, 3f, x7, 592,0)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x0, 0x4, 1b, x7, 600,0)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x100000000; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x100000000, 0x556, 1b, x7, 608,0)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x2, 0x400, 3f, x7, 616,0)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555554; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x5555555555555554, 0x40, 3f, x7, 624,0)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xaaaaaaaaaaaaaaa9; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0xaaaaaaaaaaaaaaa9, 0x6, 3f, x7, 632,0)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x4; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x4, 0x100, 3f, x7, 640,0)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x3333333333333332, 0x8, 3f, x7, 648,0)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666665; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x6666666666666665, 0x8, 3f, x7, 656,0)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0xb504f332, 0x10, 3f, x7, 664,0)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xffffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0xffffffff, 0x8, 3f, x7, 672,0)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555556; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x5555555555555556, 0x10, 3f, x7, 680,0)
+
+inst_364:
+// rs1_val==3037000499 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xaaaaaaaaaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0xaaaaaaaaaaaaaaab, 0x4, 1b, x7, 688,0)
+
+inst_365:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x6, 0x20, 3f, x7, 696,0)
+
+inst_366:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x3333333333333334, 0x2, 3f, x7, 704,0)
+
+inst_367:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666667; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x6666666666666667, 0x556, 1b, x7, 712,0)
+
+inst_368:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f334; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0xb504f334, 0x20, 3f, x7, 720,0)
+
+inst_369:
+// rs1_val==3037000499 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x1; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x1, 0x556, 1b, x7, 728,0)
+
+inst_370:
+// rs1_val==3037000499 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x100000001; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f333, 0x100000001, 0x20, 3f, x7, 736,0)
+
+inst_371:
+// rs1_val==0 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x3, 0x80, 3f, x7, 744,0)
+
+inst_372:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x5555555555555555, 0x2, 3f, x7, 752,0)
+
+inst_373:
+// rs1_val==0 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xaaaaaaaaaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x4, 3f, x7, 760,0)
+
+inst_374:
+// rs1_val==0 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x5; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x5, 0x200, 3f, x7, 768,0)
+
+inst_375:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x3333333333333333, 0x4, 1b, x7, 776,0)
+
+inst_376:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666666; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x6666666666666666, 0x20, 3f, x7, 784,0)
+
+inst_377:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0xb504f333, 0x400, 3f, x7, 792,0)
+
+inst_378:
+// rs1_val==0 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x0, 0x6, 1b, x7, 800,0)
+
+inst_379:
+// rs1_val==0 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x100000000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x100000000, 0x200, 3f, x7, 808,0)
+
+inst_380:
+// rs1_val==0 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x2; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x2, 0x200, 3f, x7, 816,0)
+
+inst_381:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555554; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x5555555555555554, 0x400, 3f, x7, 824,0)
+
+inst_382:
+// rs1_val==0 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xaaaaaaaaaaaaaaa9; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x0, 3f, x7, 832,0)
+
+inst_383:
+// rs1_val==0 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x4, 0x4, 3f, x7, 840,0)
+
+inst_384:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333332; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x3333333333333332, 0x20, 3f, x7, 848,0)
+
+inst_385:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666665; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x6666666666666665, 0x200, 3f, x7, 856,0)
+
+inst_386:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f332; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0xb504f332, 0x100, 3f, x7, 864,0)
+
+inst_387:
+// rs1_val==0 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xffffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0xffffffff, 0x6, 1b, x7, 872,0)
+
+inst_388:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x5555555555555556, 0x80, 3f, x7, 880,0)
+
+inst_389:
+// rs1_val==0 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xaaaaaaaaaaaaaaab; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x400, 3f, x7, 888,0)
+
+inst_390:
+// rs1_val==0 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x6, 0x6, 3f, x7, 896,0)
+
+inst_391:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x3333333333333334, 0x4, 3f, x7, 904,0)
+
+inst_392:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666667; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x6666666666666667, 0x20, 3f, x7, 912,0)
+
+inst_393:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f334; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0xb504f334, 0x100, 3f, x7, 920,0)
+
+inst_394:
+// rs1_val==0 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x1; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x1, 0x10, 3f, x7, 928,0)
+
+inst_395:
+// rs1_val==0 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x0; op2val:0x100000001; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x0, 0x100000001, 0x200, 3f, x7, 936,0)
+
+inst_396:
+// rs1_val==4294967296 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x3, 0x8, 1b, x7, 944,0)
+
+inst_397:
+// rs1_val==4294967296 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x5555555555555555, 0x556, 1b, x7, 952,0)
+
+inst_398:
+// rs1_val==4294967296 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xaaaaaaaaaaaaaaaa; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0xaaaaaaaaaaaaaaaa, 0x80, 3f, x7, 960,0)
+
+inst_399:
+// rs1_val==4294967296 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x5, 0x0, 1b, x7, 968,0)
+
+inst_400:
+// rs1_val==4294967296 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x3333333333333333; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x3333333333333333, 0x80, 3f, x7, 976,0)
+
+inst_401:
+// rs1_val==4294967296 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x6666666666666666; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x6666666666666666, 0x400, 3f, x7, 984,0)
+
+inst_402:
+// rs1_val==4294967296 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0xb504f333, 0x8, 1b, x7, 992,0)
+
+inst_403:
+// rs1_val==4294967296 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x0, 0x6, 3f, x7, 1000,0)
+
+inst_404:
+// rs1_val==4294967296 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x100000000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x100000000, 0x6, 1b, x7, 1008,0)
+
+inst_405:
+// rs1_val==4294967296 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x2, 0x100, 3f, x7, 1016,0)
+
+inst_406:
+// rs1_val==4294967296 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x5555555555555554; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x5555555555555554, 0xa, 1b, x7, 1024,0)
+
+inst_407:
+// rs1_val==4294967296 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xaaaaaaaaaaaaaaa9; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0xaaaaaaaaaaaaaaa9, 0x200, 3f, x7, 1032,0)
+
+inst_408:
+// rs1_val==4294967296 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x4, 0x8, 1b, x7, 1040,0)
+
+inst_409:
+// rs1_val==4294967296 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x3333333333333332; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x3333333333333332, 0x556, 1b, x7, 1048,0)
+
+inst_410:
+// rs1_val==4294967296 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x6666666666666665; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x6666666666666665, 0x80, 3f, x7, 1056,0)
+
+inst_411:
+// rs1_val==4294967296 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0xb504f332, 0x10, 3f, x7, 1064,0)
+
+inst_412:
+// rs1_val==4294967296 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xffffffff; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0xffffffff, 0x200, 3f, x7, 1072,0)
+
+inst_413:
+// rs1_val==4294967296 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x5555555555555556, 0x80, 3f, x7, 1080,0)
+
+inst_414:
+// rs1_val==4294967296 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xaaaaaaaaaaaaaaab; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0xaaaaaaaaaaaaaaab, 0x20, 3f, x7, 1088,0)
+
+inst_415:
+// rs1_val==4294967296 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x6, 0x6, 1b, x7, 1096,0)
+
+inst_416:
+// rs1_val==4294967296 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x3333333333333334; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x3333333333333334, 0x100, 3f, x7, 1104,0)
+
+inst_417:
+// rs1_val==4294967296 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x6666666666666667, 0x6, 3f, x7, 1112,0)
+
+inst_418:
+// rs1_val==4294967296 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xb504f334; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0xb504f334, 0x2, 1b, x7, 1120,0)
+
+inst_419:
+// rs1_val==4294967296 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x1, 0x8, 1b, x7, 1128,0)
+
+inst_420:
+// rs1_val==4294967296 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x100000001; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000000, 0x100000001, 0x8, 1b, x7, 1136,0)
+
+inst_421:
+// rs1_val==2 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x3, 0x4, 1b, x7, 1144,0)
+
+inst_422:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x5555555555555555, 0x0, 1b, x7, 1152,0)
+
+inst_423:
+// rs1_val==2 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xaaaaaaaaaaaaaaaa; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0xaaaaaaaaaaaaaaaa, 0x8, 1b, x7, 1160,0)
+
+inst_424:
+// rs1_val==2 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x5, 0x400, 1b, x7, 1168,0)
+
+inst_425:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x3333333333333333, 0x6, 3f, x7, 1176,0)
+
+inst_426:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666666; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x6666666666666666, 0x400, 1b, x7, 1184,0)
+
+inst_427:
+// rs1_val==2 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x0, 0x8, 1b, x7, 1192,0)
+
+inst_428:
+// rs1_val==2 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x100000000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x100000000, 0x6, 3f, x7, 1200,0)
+
+inst_429:
+// rs1_val==2 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x2, 0x2, 3f, x7, 1208,0)
+
+inst_430:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x5555555555555554, 0x6, 1b, x7, 1216,0)
+
+inst_431:
+// rs1_val==2 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xaaaaaaaaaaaaaaa9; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0xaaaaaaaaaaaaaaa9, 0x2, 1b, x7, 1224,0)
+
+inst_432:
+// rs1_val==2 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x4, 0x40, 3f, x7, 1232,0)
+
+inst_433:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x3333333333333332, 0x8, 3f, x7, 1240,0)
+
+inst_434:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666665; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x6666666666666665, 0x556, 1b, x7, 1248,0)
+
+inst_435:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0xb504f332, 0x10, 3f, x7, 1256,0)
+
+inst_436:
+// rs1_val==2 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xffffffff; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0xffffffff, 0x10, 3f, x7, 1264,0)
+
+inst_437:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x5555555555555556, 0x8, 1b, x7, 1272,0)
+
+inst_438:
+// rs1_val==2 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xaaaaaaaaaaaaaaab; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0xaaaaaaaaaaaaaaab, 0x100, 3f, x7, 1280,0)
+
+inst_439:
+// rs1_val==2 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x6, 0x6, 3f, x7, 1288,0)
+
+inst_440:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x3333333333333334, 0x2, 3f, x7, 1296,0)
+
+inst_441:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666667; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x6666666666666667, 0x556, 1b, x7, 1304,0)
+
+inst_442:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f334; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0xb504f334, 0x2, 1b, x7, 1312,0)
+
+inst_443:
+// rs1_val==2 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x1; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x1, 0x4, 3f, x7, 1320,0)
+
+inst_444:
+// rs1_val==2 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x2; op2val:0x100000001; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x2, 0x100000001, 0x80, 3f, x7, 1328,0)
+
+inst_445:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x3, 0x10, 3f, x7, 1336,0)
+
+inst_446:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555555; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x5555555555555555, 0x10, 3f, x7, 1344,0)
+
+inst_447:
+// rs1_val==6148914691236517204 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xaaaaaaaaaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0xaaaaaaaaaaaaaaaa, 0x2, 3f, x7, 1352,0)
+
+inst_448:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x5, 0x6, 3f, x7, 1360,0)
+
+inst_449:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x3333333333333333, 0x0, 3f, x7, 1368,0)
+
+inst_450:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x6666666666666666, 0x6, 3f, x7, 1376,0)
+
+inst_451:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0xb504f333, 0x6, 3f, x7, 1384,0)
+
+inst_452:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x0, 0x6, 1b, x7, 1392,0)
+
+inst_453:
+// rs1_val==6148914691236517204 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x100000000; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x100000000, 0x40, 3f, x7, 1400,0)
+
+inst_454:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x2, 0x400, 1b, x7, 1408,0)
+
+inst_455:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x2, 1b, x7, 1416,0)
+
+inst_456:
+// rs1_val==6148914691236517204 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xaaaaaaaaaaaaaaa9; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0xaaaaaaaaaaaaaaa9, 0x8, 1b, x7, 1424,0)
+
+inst_457:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x4, 0x6, 1b, x7, 1432,0)
+
+inst_458:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333332; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x3333333333333332, 0x4, 3f, x7, 1440,0)
+
+inst_459:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666665; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x6666666666666665, 0x200, 3f, x7, 1448,0)
+
+inst_460:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0xb504f332, 0x4, 1b, x7, 1456,0)
+
+inst_461:
+// rs1_val==6148914691236517204 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xffffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0xffffffff, 0x8, 3f, x7, 1464,0)
+
+inst_462:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x556, 1b, x7, 1472,0)
+
+inst_463:
+// rs1_val==6148914691236517204 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xaaaaaaaaaaaaaaab; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0xaaaaaaaaaaaaaaab, 0x556, 1b, x7, 1480,0)
+
+inst_464:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x6, 0x0, 3f, x7, 1488,0)
+
+inst_465:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x3333333333333334, 0x4, 1b, x7, 1496,0)
+
+inst_466:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666667; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x6666666666666667, 0x20, 3f, x7, 1504,0)
+
+inst_467:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f334; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0xb504f334, 0x4, 1b, x7, 1512,0)
+
+inst_468:
+// rs1_val==6148914691236517204 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x1; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x1, 0xa, 1b, x7, 1520,0)
+
+inst_469:
+// rs1_val==6148914691236517204 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x100000001; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555554, 0x100000001, 0x0, 3f, x7, 1528,0)
+
+inst_470:
+// rs1_val==12297829382473034409 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x3, 0x80, 3f, x7, 1536,0)
+
+inst_471:
+// rs1_val==12297829382473034409 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5555555555555555, 0x6, 3f, x7, 1544,0)
+
+inst_472:
+// rs1_val==12297829382473034409 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xaaaaaaaaaaaaaaaa; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xaaaaaaaaaaaaaaaa, 0x20, 3f, x7, 1552,0)
+
+inst_473:
+// rs1_val==12297829382473034409 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5, 0x0, 1b, x7, 1560,0)
+
+inst_474:
+// rs1_val==12297829382473034409 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x3333333333333333, 0x0, 3f, x7, 1568,0)
+
+inst_475:
+// rs1_val==12297829382473034409 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x6666666666666666; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x6666666666666666, 0x80, 3f, x7, 1576,0)
+
+inst_476:
+// rs1_val==12297829382473034409 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xb504f333, 0x4, 3f, x7, 1584,0)
+
+inst_477:
+// rs1_val==12297829382473034409 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x0, 0x8, 1b, x7, 1592,0)
+
+inst_478:
+// rs1_val==12297829382473034409 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x100000000; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x100000000, 0x0, 1b, x7, 1600,0)
+
+inst_479:
+// rs1_val==12297829382473034409 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x2, 0x400, 3f, x7, 1608,0)
+
+inst_480:
+// rs1_val==12297829382473034409 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x5555555555555554; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5555555555555554, 0x200, 3f, x7, 1616,0)
+
+inst_481:
+// rs1_val==12297829382473034409 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xaaaaaaaaaaaaaaa9; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xaaaaaaaaaaaaaaa9, 0x40, 3f, x7, 1624,0)
+
+inst_482:
+// rs1_val==12297829382473034409 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x4; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x4, 0x200, 3f, x7, 1632,0)
+
+inst_483:
+// rs1_val==12297829382473034409 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x3333333333333332, 0x400, 3f, x7, 1640,0)
+
+inst_484:
+// rs1_val==12297829382473034409 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x6666666666666665; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x6666666666666665, 0x8, 3f, x7, 1648,0)
+
+inst_485:
+// rs1_val==12297829382473034409 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xb504f332; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xb504f332, 0x100, 3f, x7, 1656,0)
+
+inst_486:
+// rs1_val==12297829382473034409 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xffffffff; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xffffffff, 0x10, 3f, x7, 1664,0)
+
+inst_487:
+// rs1_val==12297829382473034409 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5555555555555556, 0x6, 3f, x7, 1672,0)
+
+inst_488:
+// rs1_val==12297829382473034409 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xaaaaaaaaaaaaaaab; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xaaaaaaaaaaaaaaab, 0x6, 3f, x7, 1680,0)
+
+inst_489:
+// rs1_val==12297829382473034409 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x6, 0xa, 1b, x7, 1688,0)
+
+inst_490:
+// rs1_val==12297829382473034409 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x3333333333333334; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x3333333333333334, 0x100, 3f, x7, 1696,0)
+
+inst_491:
+// rs1_val==12297829382473034409 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x6666666666666667; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x6666666666666667, 0x20, 3f, x7, 1704,0)
+
+inst_492:
+// rs1_val==12297829382473034409 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xb504f334; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xb504f334, 0x40, 3f, x7, 1712,0)
+
+inst_493:
+// rs1_val==12297829382473034409 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x1, 0x8, 1b, x7, 1720,0)
+
+inst_494:
+// rs1_val==12297829382473034409 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x100000001; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x100000001, 0x8, 3f, x7, 1728,0)
+
+inst_495:
+// rs1_val==4 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x3, 0x4, 1b, x7, 1736,0)
+
+inst_496:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x5555555555555555, 0x2, 1b, x7, 1744,0)
+
+inst_497:
+// rs1_val==4 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xaaaaaaaaaaaaaaaa; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0xaaaaaaaaaaaaaaaa, 0x400, 1b, x7, 1752,0)
+
+inst_498:
+// rs1_val==4 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x5, 0x400, 1b, x7, 1760,0)
+
+inst_499:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333333; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x3333333333333333, 0x80, 3f, x7, 1768,0)
+
+inst_500:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666666; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x6666666666666666, 0x200, 3f, x7, 1776,0)
+
+inst_501:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0xb504f333, 0x6, 3f, x7, 1784,0)
+
+inst_502:
+// rs1_val==4 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x0, 0x100, 3f, x7, 1792,0)
+
+inst_503:
+// rs1_val==4 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x100000000; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x100000000, 0x40, 3f, x7, 1800,0)
+
+inst_504:
+// rs1_val==4 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x2; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x2, 0x80, 3f, x7, 1808,0)
+
+inst_505:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555554; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x5555555555555554, 0x80, 3f, x7, 1816,0)
+
+inst_506:
+// rs1_val==4 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xaaaaaaaaaaaaaaa9; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0xaaaaaaaaaaaaaaa9, 0x556, 1b, x7, 1824,0)
+
+inst_507:
+// rs1_val==4 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x4, 0x0, 1b, x7, 1832,0)
+
+inst_508:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333332; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x3333333333333332, 0xa, 1b, x7, 1840,0)
+
+inst_509:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x6666666666666665, 0x0, 3f, x7, 1848,0)
+
+inst_510:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0xb504f332, 0x556, 1b, x7, 1856,0)
+
+inst_511:
+// rs1_val==4 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xffffffff; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0xffffffff, 0x10, 3f, x7, 1864,0)
+
+inst_512:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x5555555555555556, 0x6, 1b, x7, 1872,0)
+
+inst_513:
+// rs1_val==4 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xaaaaaaaaaaaaaaab; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0xaaaaaaaaaaaaaaab, 0x8, 3f, x7, 1880,0)
+
+inst_514:
+// rs1_val==4 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x6, 0x80, 3f, x7, 1888,0)
+
+inst_515:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333334; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x3333333333333334, 0xa, 1b, x7, 1896,0)
+
+inst_516:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x6666666666666667, 0x0, 1b, x7, 1904,0)
+
+inst_517:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f334; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0xb504f334, 0x20, 3f, x7, 1912,0)
+
+inst_518:
+// rs1_val==4 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x1; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x1, 0x4, 1b, x7, 1920,0)
+
+inst_519:
+// rs1_val==4 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x4; op2val:0x100000001; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x4, 0x100000001, 0x20, 3f, x7, 1928,0)
+
+inst_520:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x3, 0x4, 1b, x7, 1936,0)
+
+inst_521:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x5555555555555555, 0x6, 1b, x7, 1944,0)
+
+inst_522:
+// rs1_val==3689348814741910322 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xaaaaaaaaaaaaaaaa; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0xaaaaaaaaaaaaaaaa, 0x20, 3f, x7, 1952,0)
+
+inst_523:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x5, 0x8, 3f, x7, 1960,0)
+
+inst_524:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333333; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x3333333333333333, 0x80, 3f, x7, 1968,0)
+
+inst_525:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666666; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x6666666666666666, 0x40, 3f, x7, 1976,0)
+
+inst_526:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0xb504f333, 0x2, 1b, x7, 1984,0)
+
+inst_527:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x0, 0x100, 3f, x7, 1992,0)
+
+inst_528:
+// rs1_val==3689348814741910322 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x100000000; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x100000000, 0x400, 1b, x7, 2000,0)
+
+inst_529:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x2, 0x2, 3f, x7, 2008,0)
+
+inst_530:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555554; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x5555555555555554, 0x80, 3f, x7, 2016,0)
+
+inst_531:
+// rs1_val==3689348814741910322 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xaaaaaaaaaaaaaaa9; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0xaaaaaaaaaaaaaaa9, 0x20, 3f, x7, 2024,0)
+
+inst_532:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x4, 0x80, 3f, x7, 2032,0)
+
+inst_533:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x0, 1b, x7, 2040,0)
+RVTEST_SIGBASE( x7,signature_x7_2)
+
+inst_534:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x6666666666666665, 0x400, 1b, x7, 0,0)
+
+inst_535:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0xb504f332, 0x4, 1b, x7, 8,0)
+
+inst_536:
+// rs1_val==3689348814741910322 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xffffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0xffffffff, 0x6, 3f, x7, 16,0)
+
+inst_537:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555556; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x5555555555555556, 0x200, 3f, x7, 24,0)
+
+inst_538:
+// rs1_val==3689348814741910322 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xaaaaaaaaaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0xaaaaaaaaaaaaaaab, 0x2, 1b, x7, 32,0)
+
+inst_539:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x6, 0x4, 1b, x7, 40,0)
+
+inst_540:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333334; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x3333333333333334, 0x10, 3f, x7, 48,0)
+
+inst_541:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666667; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x6666666666666667, 0x40, 3f, x7, 56,0)
+
+inst_542:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f334; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0xb504f334, 0x100, 3f, x7, 64,0)
+
+inst_543:
+// rs1_val==3689348814741910322 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x1, 0x8, 1b, x7, 72,0)
+
+inst_544:
+// rs1_val==3689348814741910322 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x100000001; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333332, 0x100000001, 0xa, 1b, x7, 80,0)
+
+inst_545:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x3, 0x4, 1b, x7, 88,0)
+
+inst_546:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x5555555555555555, 0x2, 1b, x7, 96,0)
+
+inst_547:
+// rs1_val==7378697629483820645 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xaaaaaaaaaaaaaaaa; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0xaaaaaaaaaaaaaaaa, 0xa, 1b, x7, 104,0)
+
+inst_548:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x5, 0x400, 1b, x7, 112,0)
+
+inst_549:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333333; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x3333333333333333, 0x8, 1b, x7, 120,0)
+
+inst_550:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x6666666666666666, 0x6, 3f, x7, 128,0)
+
+inst_551:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0xb504f333, 0x8, 3f, x7, 136,0)
+
+inst_552:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x0, 0x2, 1b, x7, 144,0)
+
+inst_553:
+// rs1_val==7378697629483820645 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x100000000; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x100000000, 0x4, 1b, x7, 152,0)
+
+inst_554:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x2, 0x4, 1b, x7, 160,0)
+
+inst_555:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x5555555555555554, 0x0, 3f, x7, 168,0)
+
+inst_556:
+// rs1_val==7378697629483820645 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xaaaaaaaaaaaaaaa9; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0xaaaaaaaaaaaaaaa9, 0x80, 3f, x7, 176,0)
+
+inst_557:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x4, 0x2, 1b, x7, 184,0)
+
+inst_558:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x3333333333333332, 0x2, 1b, x7, 192,0)
+
+inst_559:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666665; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x556, 1b, x7, 200,0)
+
+inst_560:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0xb504f332, 0x8, 1b, x7, 208,0)
+
+inst_561:
+// rs1_val==7378697629483820645 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xffffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0xffffffff, 0x8, 1b, x7, 216,0)
+
+inst_562:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x5555555555555556, 0x8, 3f, x7, 224,0)
+
+inst_563:
+// rs1_val==7378697629483820645 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xaaaaaaaaaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0xaaaaaaaaaaaaaaab, 0x4, 3f, x7, 232,0)
+
+inst_564:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x6, 0x200, 3f, x7, 240,0)
+
+inst_565:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x3333333333333334, 0x2, 3f, x7, 248,0)
+
+inst_566:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666667; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x6666666666666667, 0x100, 3f, x7, 256,0)
+
+inst_567:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0xb504f334, 0x400, 1b, x7, 264,0)
+
+inst_568:
+// rs1_val==7378697629483820645 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x1; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x1, 0x556, 1b, x7, 272,0)
+
+inst_569:
+// rs1_val==7378697629483820645 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x100000001; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666665, 0x100000001, 0x0, 3f, x7, 280,0)
+
+inst_570:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x3, 0x40, 3f, x7, 288,0)
+
+inst_571:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x5555555555555555, 0x556, 1b, x7, 296,0)
+
+inst_572:
+// rs1_val==3037000498 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xaaaaaaaaaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0xaaaaaaaaaaaaaaaa, 0x4, 1b, x7, 304,0)
+
+inst_573:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x5, 0x400, 3f, x7, 312,0)
+
+inst_574:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x3333333333333333, 0x6, 1b, x7, 320,0)
+
+inst_575:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x6666666666666666, 0x4, 1b, x7, 328,0)
+
+inst_576:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0xb504f333, 0x2, 3f, x7, 336,0)
+
+inst_577:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x0, 0x0, 1b, x7, 344,0)
+
+inst_578:
+// rs1_val==3037000498 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x100000000; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x100000000, 0x10, 3f, x7, 352,0)
+
+inst_579:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x2, 0x400, 1b, x7, 360,0)
+
+inst_580:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555554; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x5555555555555554, 0x100, 3f, x7, 368,0)
+
+inst_581:
+// rs1_val==3037000498 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xaaaaaaaaaaaaaaa9; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0xaaaaaaaaaaaaaaa9, 0x8, 1b, x7, 376,0)
+
+inst_582:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x4, 0x8, 3f, x7, 384,0)
+
+inst_583:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x3333333333333332, 0x8, 3f, x7, 392,0)
+
+inst_584:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666665; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x6666666666666665, 0x8, 1b, x7, 400,0)
+
+inst_585:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f332; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0xb504f332, 0x200, 3f, x7, 408,0)
+
+inst_586:
+// rs1_val==3037000498 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xffffffff; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0xffffffff, 0x200, 3f, x7, 416,0)
+
+inst_587:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555556; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x5555555555555556, 0x20, 3f, x7, 424,0)
+
+inst_588:
+// rs1_val==3037000498 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xaaaaaaaaaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0xaaaaaaaaaaaaaaab, 0x4, 1b, x7, 432,0)
+
+inst_589:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x6, 0x4, 3f, x7, 440,0)
+
+inst_590:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x3333333333333334, 0x2, 1b, x7, 448,0)
+
+inst_591:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666667; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x6666666666666667, 0x100, 3f, x7, 456,0)
+
+inst_592:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0xb504f334, 0x0, 3f, x7, 464,0)
+
+inst_593:
+// rs1_val==3037000498 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x1; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x1, 0x40, 3f, x7, 472,0)
+
+inst_594:
+// rs1_val==3037000498 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x100000001; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f332, 0x100000001, 0x4, 3f, x7, 480,0)
+
+inst_595:
+// rs1_val==4294967295 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x3, 0x2, 1b, x7, 488,0)
+
+inst_596:
+// rs1_val==4294967295 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x5555555555555555, 0x100, 3f, x7, 496,0)
+
+inst_597:
+// rs1_val==4294967295 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xaaaaaaaaaaaaaaaa; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0xaaaaaaaaaaaaaaaa, 0x400, 1b, x7, 504,0)
+
+inst_598:
+// rs1_val==4294967295 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x5, 0x2, 1b, x7, 512,0)
+
+inst_599:
+// rs1_val==4294967295 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x3333333333333333, 0x400, 3f, x7, 520,0)
+
+inst_600:
+// rs1_val==4294967295 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x6666666666666666; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x6666666666666666, 0x200, 3f, x7, 528,0)
+
+inst_601:
+// rs1_val==4294967295 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xb504f333; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0xb504f333, 0x20, 3f, x7, 536,0)
+
+inst_602:
+// rs1_val==4294967295 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x0, 0x4, 3f, x7, 544,0)
+
+inst_603:
+// rs1_val==4294967295 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x100000000; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x100000000, 0x556, 1b, x7, 552,0)
+
+inst_604:
+// rs1_val==4294967295 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x2, 0xa, 1b, x7, 560,0)
+
+inst_605:
+// rs1_val==4294967295 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x5555555555555554, 0x0, 3f, x7, 568,0)
+
+inst_606:
+// rs1_val==4294967295 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xaaaaaaaaaaaaaaa9; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0xaaaaaaaaaaaaaaa9, 0x100, 3f, x7, 576,0)
+
+inst_607:
+// rs1_val==4294967295 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x4, 0x6, 1b, x7, 584,0)
+
+inst_608:
+// rs1_val==4294967295 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x3333333333333332; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x3333333333333332, 0x4, 1b, x7, 592,0)
+
+inst_609:
+// rs1_val==4294967295 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x6666666666666665; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x6666666666666665, 0x10, 3f, x7, 600,0)
+
+inst_610:
+// rs1_val==4294967295 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0xb504f332, 0x0, 3f, x7, 608,0)
+
+inst_611:
+// rs1_val==4294967295 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xffffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0xffffffff, 0x8, 1b, x7, 616,0)
+
+inst_612:
+// rs1_val==4294967295 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x5555555555555556; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x5555555555555556, 0x20, 3f, x7, 624,0)
+
+inst_613:
+// rs1_val==4294967295 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xaaaaaaaaaaaaaaab; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0xaaaaaaaaaaaaaaab, 0x10, 3f, x7, 632,0)
+
+inst_614:
+// rs1_val==4294967295 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x6, 0x400, 1b, x7, 640,0)
+
+inst_615:
+// rs1_val==4294967295 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x3333333333333334, 0x8, 1b, x7, 648,0)
+
+inst_616:
+// rs1_val==4294967295 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x6666666666666667, 0x8, 1b, x7, 656,0)
+
+inst_617:
+// rs1_val==4294967295 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xb504f334; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0xb504f334, 0x200, 3f, x7, 664,0)
+
+inst_618:
+// rs1_val==4294967295 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x1; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x1, 0x4, 3f, x7, 672,0)
+
+inst_619:
+// rs1_val==4294967295 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x100000001; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xffffffff, 0x100000001, 0x4, 3f, x7, 680,0)
+
+inst_620:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x3, 0x400, 1b, x7, 688,0)
+
+inst_621:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555555; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x5555555555555555, 0x80, 3f, x7, 696,0)
+
+inst_622:
+// rs1_val==6148914691236517206 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xaaaaaaaaaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0xaaaaaaaaaaaaaaaa, 0x0, 1b, x7, 704,0)
+
+inst_623:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x5, 0x8, 1b, x7, 712,0)
+
+inst_624:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x3333333333333333, 0x400, 1b, x7, 720,0)
+
+inst_625:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666666; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x6666666666666666, 0xa, 1b, x7, 728,0)
+
+inst_626:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0xb504f333, 0x4, 3f, x7, 736,0)
+
+inst_627:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x0, 0x80, 3f, x7, 744,0)
+
+inst_628:
+// rs1_val==6148914691236517206 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x100000000; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x100000000, 0x20, 3f, x7, 752,0)
+
+inst_629:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x2; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x2, 0x200, 3f, x7, 760,0)
+
+inst_630:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555554; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x80, 3f, x7, 768,0)
+
+inst_631:
+// rs1_val==6148914691236517206 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xaaaaaaaaaaaaaaa9; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0xaaaaaaaaaaaaaaa9, 0x6, 1b, x7, 776,0)
+
+inst_632:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x4, 0x10, 3f, x7, 784,0)
+
+inst_633:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x3333333333333332, 0x400, 3f, x7, 792,0)
+
+inst_634:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x6666666666666665, 0x4, 1b, x7, 800,0)
+
+inst_635:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f332; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0xb504f332, 0xa, 1b, x7, 808,0)
+
+inst_636:
+// rs1_val==6148914691236517206 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0xffffffff, 0x2, 3f, x7, 816,0)
+
+inst_637:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x0, 1b, x7, 824,0)
+
+inst_638:
+// rs1_val==6148914691236517206 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xaaaaaaaaaaaaaaab; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0xaaaaaaaaaaaaaaab, 0xa, 1b, x7, 832,0)
+
+inst_639:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x6, 0x400, 1b, x7, 840,0)
+
+inst_640:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333334; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x3333333333333334, 0x10, 3f, x7, 848,0)
+
+inst_641:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666667; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x6666666666666667, 0x200, 3f, x7, 856,0)
+
+inst_642:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f334; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0xb504f334, 0x20, 3f, x7, 864,0)
+
+inst_643:
+// rs1_val==6148914691236517206 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x1; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x1, 0x6, 3f, x7, 872,0)
+
+inst_644:
+// rs1_val==6148914691236517206 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x100000001; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x5555555555555556, 0x100000001, 0x2, 3f, x7, 880,0)
+
+inst_645:
+// rs1_val==12297829382473034411 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x3, 0x6, 3f, x7, 888,0)
+
+inst_646:
+// rs1_val==12297829382473034411 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555555, 0x8, 1b, x7, 896,0)
+
+inst_647:
+// rs1_val==12297829382473034411 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xaaaaaaaaaaaaaaaa; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0xaaaaaaaaaaaaaaaa, 0x6, 3f, x7, 904,0)
+
+inst_648:
+// rs1_val==12297829382473034411 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5, 0x8, 1b, x7, 912,0)
+
+inst_649:
+// rs1_val==12297829382473034411 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x3333333333333333; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x3333333333333333, 0x556, 1b, x7, 920,0)
+
+inst_650:
+// rs1_val==12297829382473034411 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x6666666666666666; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x6666666666666666, 0x2, 1b, x7, 928,0)
+
+inst_651:
+// rs1_val==12297829382473034411 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0xb504f333, 0x8, 3f, x7, 936,0)
+
+inst_652:
+// rs1_val==12297829382473034411 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x0, 0x80, 3f, x7, 944,0)
+
+inst_653:
+// rs1_val==12297829382473034411 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x100000000; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x100000000, 0x556, 1b, x7, 952,0)
+
+inst_654:
+// rs1_val==12297829382473034411 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x2, 0x400, 1b, x7, 960,0)
+
+inst_655:
+// rs1_val==12297829382473034411 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x5555555555555554; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555554, 0x8, 3f, x7, 968,0)
+
+inst_656:
+// rs1_val==12297829382473034411 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xaaaaaaaaaaaaaaa9; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0xaaaaaaaaaaaaaaa9, 0x0, 3f, x7, 976,0)
+
+inst_657:
+// rs1_val==12297829382473034411 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x4, 0x4, 1b, x7, 984,0)
+
+inst_658:
+// rs1_val==12297829382473034411 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x3333333333333332, 0x400, 3f, x7, 992,0)
+
+inst_659:
+// rs1_val==12297829382473034411 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x6666666666666665; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x6666666666666665, 0x80, 3f, x7, 1000,0)
+
+inst_660:
+// rs1_val==12297829382473034411 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0xb504f332, 0x4, 3f, x7, 1008,0)
+
+inst_661:
+// rs1_val==12297829382473034411 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xffffffff; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0xffffffff, 0x100, 3f, x7, 1016,0)
+
+inst_662:
+// rs1_val==12297829382473034411 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555556, 0x2, 3f, x7, 1024,0)
+
+inst_663:
+// rs1_val==12297829382473034411 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xaaaaaaaaaaaaaaab; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0xaaaaaaaaaaaaaaab, 0x40, 3f, x7, 1032,0)
+
+inst_664:
+// rs1_val==12297829382473034411 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x6, 0x0, 3f, x7, 1040,0)
+
+inst_665:
+// rs1_val==12297829382473034411 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x3333333333333334, 0x2, 3f, x7, 1048,0)
+
+inst_666:
+// rs1_val==12297829382473034411 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x6666666666666667, 0x0, 3f, x7, 1056,0)
+
+inst_667:
+// rs1_val==12297829382473034411 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xb504f334; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0xb504f334, 0x556, 1b, x7, 1064,0)
+
+inst_668:
+// rs1_val==12297829382473034411 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x1, 0x8, 1b, x7, 1072,0)
+
+inst_669:
+// rs1_val==12297829382473034411 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x100000001; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xaaaaaaaaaaaaaaab, 0x100000001, 0xa, 1b, x7, 1080,0)
+
+inst_670:
+// rs1_val==6 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x3, 0x400, 1b, x7, 1088,0)
+
+inst_671:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555555; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x5555555555555555, 0x40, 3f, x7, 1096,0)
+
+inst_672:
+// rs1_val==6 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xaaaaaaaaaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0xaaaaaaaaaaaaaaaa, 0x0, 3f, x7, 1104,0)
+
+inst_673:
+// rs1_val==6 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x5, 0x40, 3f, x7, 1112,0)
+
+inst_674:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333333; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x3333333333333333, 0x80, 3f, x7, 1120,0)
+
+inst_675:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666666; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x6666666666666666, 0x8, 3f, x7, 1128,0)
+
+inst_676:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f333; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0xb504f333, 0x20, 3f, x7, 1136,0)
+
+inst_677:
+// rs1_val==6 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x0, 0x2, 1b, x7, 1144,0)
+
+inst_678:
+// rs1_val==6 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x100000000; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x100000000, 0xa, 1b, x7, 1152,0)
+
+inst_679:
+// rs1_val==6 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x2, 0x10, 3f, x7, 1160,0)
+
+inst_680:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x5555555555555554, 0x6, 1b, x7, 1168,0)
+
+inst_681:
+// rs1_val==6 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xaaaaaaaaaaaaaaa9; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0xaaaaaaaaaaaaaaa9, 0x200, 3f, x7, 1176,0)
+
+inst_682:
+// rs1_val==6 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x4, 0x400, 1b, x7, 1184,0)
+
+inst_683:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x3333333333333332, 0x2, 1b, x7, 1192,0)
+
+inst_684:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666665; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x6666666666666665, 0xa, 1b, x7, 1200,0)
+
+inst_685:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0xb504f332, 0x4, 3f, x7, 1208,0)
+
+inst_686:
+// rs1_val==6 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xffffffff; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0xffffffff, 0x10, 3f, x7, 1216,0)
+
+inst_687:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x5555555555555556, 0x40, 3f, x7, 1224,0)
+
+inst_688:
+// rs1_val==6 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xaaaaaaaaaaaaaaab; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0xaaaaaaaaaaaaaaab, 0x6, 3f, x7, 1232,0)
+
+inst_689:
+// rs1_val==6 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x6, 0x8, 1b, x7, 1240,0)
+
+inst_690:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x3333333333333334, 0x400, 3f, x7, 1248,0)
+
+inst_691:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666667; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x6666666666666667, 0xa, 1b, x7, 1256,0)
+
+inst_692:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f334; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0xb504f334, 0x556, 1b, x7, 1264,0)
+
+inst_693:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x5555555555555555, 0x8, 3f, x7, 1272,0)
+
+inst_694:
+// rs1_val==3689348814741910324 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xaaaaaaaaaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0xaaaaaaaaaaaaaaaa, 0x4, 1b, x7, 1280,0)
+
+inst_695:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x5, 0x6, 3f, x7, 1288,0)
+
+inst_696:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x3333333333333333, 0x400, 3f, x7, 1296,0)
+
+inst_697:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x6666666666666666, 0x0, 3f, x7, 1304,0)
+
+inst_698:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f333; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0xb504f333, 0x200, 3f, x7, 1312,0)
+
+inst_699:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x0, 0x80, 3f, x7, 1320,0)
+
+inst_700:
+// rs1_val==3689348814741910324 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x100000000; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x100000000, 0x4, 3f, x7, 1328,0)
+
+inst_701:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x2, 0x556, 1b, x7, 1336,0)
+
+inst_702:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x5555555555555554, 0x0, 1b, x7, 1344,0)
+
+inst_703:
+// rs1_val==3689348814741910324 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xaaaaaaaaaaaaaaa9; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0xaaaaaaaaaaaaaaa9, 0x0, 1b, x7, 1352,0)
+
+inst_704:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x4, 0x400, 3f, x7, 1360,0)
+
+inst_705:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x3333333333333332, 0x400, 1b, x7, 1368,0)
+
+inst_706:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x6666666666666665, 0x4, 3f, x7, 1376,0)
+
+inst_707:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0xb504f332, 0x8, 3f, x7, 1384,0)
+
+inst_708:
+// rs1_val==3689348814741910324 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xffffffff; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0xffffffff, 0x80, 3f, x7, 1392,0)
+
+inst_709:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x5555555555555556, 0x400, 1b, x7, 1400,0)
+
+inst_710:
+// rs1_val==3689348814741910324 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xaaaaaaaaaaaaaaab; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0xaaaaaaaaaaaaaaab, 0x8, 1b, x7, 1408,0)
+
+inst_711:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x6, 0x4, 1b, x7, 1416,0)
+
+inst_712:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x2, 3f, x7, 1424,0)
+
+inst_713:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x6666666666666667, 0x6, 3f, x7, 1432,0)
+
+inst_714:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f334; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0xb504f334, 0xa, 1b, x7, 1440,0)
+
+inst_715:
+// rs1_val==3689348814741910324 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x1; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x1, 0x40, 3f, x7, 1448,0)
+
+inst_716:
+// rs1_val==3689348814741910324 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x100000001; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x100000001, 0x2, 3f, x7, 1456,0)
+
+inst_717:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x3, 0x2, 3f, x7, 1464,0)
+
+inst_718:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555555; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x5555555555555555, 0x10, 3f, x7, 1472,0)
+
+inst_719:
+// rs1_val==7378697629483820647 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xaaaaaaaaaaaaaaaa; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0xaaaaaaaaaaaaaaaa, 0x10, 3f, x7, 1480,0)
+
+inst_720:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x5, 0x200, 3f, x7, 1488,0)
+
+inst_721:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333333; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x3333333333333333, 0x40, 3f, x7, 1496,0)
+
+inst_722:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x0, 1b, x7, 1504,0)
+
+inst_723:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f333; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0xb504f333, 0x200, 3f, x7, 1512,0)
+
+inst_724:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x0, 0x40, 3f, x7, 1520,0)
+
+inst_725:
+// rs1_val==7378697629483820647 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x100000000; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x100000000, 0x40, 3f, x7, 1528,0)
+
+inst_726:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x2, 0x400, 3f, x7, 1536,0)
+
+inst_727:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x5555555555555554, 0x0, 3f, x7, 1544,0)
+
+inst_728:
+// rs1_val==7378697629483820647 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xaaaaaaaaaaaaaaa9; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0xaaaaaaaaaaaaaaa9, 0x0, 3f, x7, 1552,0)
+
+inst_729:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x4, 0x10, 3f, x7, 1560,0)
+
+inst_730:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333332; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x3333333333333332, 0x200, 3f, x7, 1568,0)
+
+inst_731:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666665; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x6666666666666665, 0xa, 1b, x7, 1576,0)
+
+inst_732:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f332; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0xb504f332, 0x40, 3f, x7, 1584,0)
+
+inst_733:
+// rs1_val==7378697629483820647 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xffffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0xffffffff, 0x6, 3f, x7, 1592,0)
+
+inst_734:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x5555555555555556, 0x0, 3f, x7, 1600,0)
+
+inst_735:
+// rs1_val==7378697629483820647 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xaaaaaaaaaaaaaaab; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0xaaaaaaaaaaaaaaab, 0x20, 3f, x7, 1608,0)
+
+inst_736:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x6, 0x4, 1b, x7, 1616,0)
+
+inst_737:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x3333333333333334, 0x2, 3f, x7, 1624,0)
+
+inst_738:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x8, 1b, x7, 1632,0)
+
+inst_739:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0xb504f334, 0x0, 1b, x7, 1640,0)
+
+inst_740:
+// rs1_val==7378697629483820647 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x1, 0x8, 1b, x7, 1648,0)
+
+inst_741:
+// rs1_val==7378697629483820647 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x100000001; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6666666666666667, 0x100000001, 0x6, 1b, x7, 1656,0)
+
+inst_742:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x3, 0x6, 3f, x7, 1664,0)
+
+inst_743:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x5555555555555555, 0x4, 1b, x7, 1672,0)
+
+inst_744:
+// rs1_val==3037000500 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xaaaaaaaaaaaaaaaa; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0xaaaaaaaaaaaaaaaa, 0x8, 3f, x7, 1680,0)
+
+inst_745:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x5, 0x2, 1b, x7, 1688,0)
+
+inst_746:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x3333333333333333, 0x0, 1b, x7, 1696,0)
+
+inst_747:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666666; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x6666666666666666, 0x8, 3f, x7, 1704,0)
+
+inst_748:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0xb504f333, 0x2, 1b, x7, 1712,0)
+
+inst_749:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x0, 0x6, 1b, x7, 1720,0)
+
+inst_750:
+// rs1_val==3037000500 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x100000000; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x100000000, 0x400, 1b, x7, 1728,0)
+
+inst_751:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x2, 0x2, 1b, x7, 1736,0)
+
+inst_752:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x5555555555555554, 0x0, 1b, x7, 1744,0)
+
+inst_753:
+// rs1_val==3037000500 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xaaaaaaaaaaaaaaa9; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0xaaaaaaaaaaaaaaa9, 0x4, 1b, x7, 1752,0)
+
+inst_754:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x4, 0x4, 1b, x7, 1760,0)
+
+inst_755:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x3333333333333332, 0x6, 3f, x7, 1768,0)
+
+inst_756:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x6666666666666665, 0x2, 1b, x7, 1776,0)
+
+inst_757:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0xb504f332, 0x4, 1b, x7, 1784,0)
+
+inst_758:
+// rs1_val==3037000500 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xffffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0xffffffff, 0x6, 3f, x7, 1792,0)
+
+inst_759:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x5555555555555556, 0x2, 3f, x7, 1800,0)
+
+inst_760:
+// rs1_val==3037000500 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xaaaaaaaaaaaaaaab; immval:0x100; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0xaaaaaaaaaaaaaaab, 0x100, 3f, x7, 1808,0)
+
+inst_761:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x6, 0x556, 1b, x7, 1816,0)
+
+inst_762:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x3333333333333334, 0x2, 1b, x7, 1824,0)
+
+inst_763:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666667; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x6666666666666667, 0x20, 3f, x7, 1832,0)
+
+inst_764:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f334; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0xb504f334, 0x10, 3f, x7, 1840,0)
+
+inst_765:
+// rs1_val==3037000500 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x1, 0x8, 1b, x7, 1848,0)
+
+inst_766:
+// rs1_val==3037000500 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x100000001; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0xb504f334, 0x100000001, 0x8, 3f, x7, 1856,0)
+
+inst_767:
+// rs1_val==1 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x3, 0x6, 1b, x7, 1864,0)
+
+inst_768:
+// rs1_val==1 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x5555555555555555, 0x4, 3f, x7, 1872,0)
+
+inst_769:
+// rs1_val==1 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xaaaaaaaaaaaaaaaa; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0xaaaaaaaaaaaaaaaa, 0x8, 1b, x7, 1880,0)
+
+inst_770:
+// rs1_val==1 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x5, 0x4, 1b, x7, 1888,0)
+
+inst_771:
+// rs1_val==1 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x3333333333333333, 0x6, 3f, x7, 1896,0)
+
+inst_772:
+// rs1_val==1 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x6666666666666666; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x6666666666666666, 0x2, 3f, x7, 1904,0)
+
+inst_773:
+// rs1_val==1 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0xb504f333, 0x4, 3f, x7, 1912,0)
+
+inst_774:
+// rs1_val==1 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x0, 0x4, 1b, x7, 1920,0)
+
+inst_775:
+// rs1_val==1 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x100000000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x100000000, 0x6, 3f, x7, 1928,0)
+
+inst_776:
+// rs1_val==1 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x2; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x2, 0x40, 3f, x7, 1936,0)
+
+inst_777:
+// rs1_val==1 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x5555555555555554; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x5555555555555554, 0x20, 3f, x7, 1944,0)
+
+inst_778:
+// rs1_val==1 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xaaaaaaaaaaaaaaa9; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0xaaaaaaaaaaaaaaa9, 0x400, 1b, x7, 1952,0)
+
+inst_779:
+// rs1_val==1 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x4, 0x8, 3f, x7, 1960,0)
+
+inst_780:
+// rs1_val==1 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x3333333333333332; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x3333333333333332, 0x20, 3f, x7, 1968,0)
+
+inst_781:
+// rs1_val==1 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x6666666666666665, 0x6, 3f, x7, 1976,0)
+
+inst_782:
+// rs1_val==1 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xb504f332; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0xb504f332, 0x80, 3f, x7, 1984,0)
+
+inst_783:
+// rs1_val==1 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xffffffff; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0xffffffff, 0xa, 1b, x7, 1992,0)
+
+inst_784:
+// rs1_val==1 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x5555555555555556, 0x2, 1b, x7, 2000,0)
+
+inst_785:
+// rs1_val==1 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xaaaaaaaaaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0xaaaaaaaaaaaaaaab, 0x2, 3f, x7, 2008,0)
+
+inst_786:
+// rs1_val==1 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x6, 0x2, 3f, x7, 2016,0)
+
+inst_787:
+// rs1_val==1 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x3333333333333334; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x3333333333333334, 0x0, 1b, x7, 2024,0)
+
+inst_788:
+// rs1_val==1 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x6666666666666667; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x6666666666666667, 0x10, 3f, x7, 2032,0)
+
+inst_789:
+// rs1_val==1 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0xb504f334, 0x400, 3f, x7, 2040,0)
+RVTEST_SIGBASE( x7,signature_x7_3)
+
+inst_790:
+// rs1_val==1 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x1; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x1, 0x200, 3f, x7, 0,0)
+
+inst_791:
+// rs1_val==1 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x1; op2val:0x100000001; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x1, 0x100000001, 0x200, 3f, x7, 8,0)
+
+inst_792:
+// rs1_val==4294967297 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x3, 0x8, 1b, x7, 16,0)
+
+inst_793:
+// rs1_val==4294967297 and rs2_val==6148914691236517205,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x5555555555555555, 0x6, 1b, x7, 24,0)
+
+inst_794:
+// rs1_val==4294967297 and rs2_val==12297829382473034410,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xaaaaaaaaaaaaaaaa; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0xaaaaaaaaaaaaaaaa, 0xa, 1b, x7, 32,0)
+
+inst_795:
+// rs1_val==4294967297 and rs2_val==5,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x5; immval:0xa; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x5, 0xa, 1b, x7, 40,0)
+
+inst_796:
+// rs1_val==4294967297 and rs2_val==3689348814741910323,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x3333333333333333; immval:0x20; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x3333333333333333, 0x20, 3f, x7, 48,0)
+
+inst_797:
+// rs1_val==4294967297 and rs2_val==7378697629483820646,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x6666666666666666; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x6666666666666666, 0x10, 3f, x7, 56,0)
+
+inst_798:
+// rs1_val==4294967297 and rs2_val==3037000499,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0xb504f333, 0x8, 1b, x7, 64,0)
+
+inst_799:
+// rs1_val==4294967297 and rs2_val==0,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x0, 0x4, 1b, x7, 72,0)
+
+inst_800:
+// rs1_val==4294967297 and rs2_val==4294967296,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x100000000; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x100000000, 0x200, 3f, x7, 80,0)
+
+inst_801:
+// rs1_val==4294967297 and rs2_val==2,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x2, 0x2, 1b, x7, 88,0)
+
+inst_802:
+// rs1_val==4294967297 and rs2_val==6148914691236517204,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x5555555555555554, 0x2, 1b, x7, 96,0)
+
+inst_803:
+// rs1_val==4294967297 and rs2_val==12297829382473034409,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xaaaaaaaaaaaaaaa9; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0xaaaaaaaaaaaaaaa9, 0x2, 3f, x7, 104,0)
+
+inst_804:
+// rs1_val==4294967297 and rs2_val==4,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x4, 0x40, 3f, x7, 112,0)
+
+inst_805:
+// rs1_val==4294967297 and rs2_val==3689348814741910322,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x3333333333333332; immval:0x80; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x3333333333333332, 0x80, 3f, x7, 120,0)
+
+inst_806:
+// rs1_val==4294967297 and rs2_val==7378697629483820645,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x6666666666666665; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x6666666666666665, 0x200, 3f, x7, 128,0)
+
+inst_807:
+// rs1_val==4294967297 and rs2_val==3037000498,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0xb504f332, 0x8, 3f, x7, 136,0)
+
+inst_808:
+// rs1_val==4294967297 and rs2_val==4294967295,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xffffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0xffffffff, 0x6, 3f, x7, 144,0)
+
+inst_809:
+// rs1_val==4294967297 and rs2_val==6148914691236517206,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x5555555555555556, 0x400, 1b, x7, 152,0)
+
+inst_810:
+// rs1_val==4294967297 and rs2_val==12297829382473034411,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xaaaaaaaaaaaaaaab; immval:0x10; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0xaaaaaaaaaaaaaaab, 0x10, 3f, x7, 160,0)
+
+inst_811:
+// rs1_val==4294967297 and rs2_val==6,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x6, 0x4, 1b, x7, 168,0)
+
+inst_812:
+// rs1_val==4294967297 and rs2_val==3689348814741910324,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x3333333333333334; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x3333333333333334, 0x200, 3f, x7, 176,0)
+
+inst_813:
+// rs1_val==4294967297 and rs2_val==7378697629483820647,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x6666666666666667, 0x0, 1b, x7, 184,0)
+
+inst_814:
+// rs1_val==4294967297 and rs2_val==3037000500,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0xb504f334, 0x6, 3f, x7, 192,0)
+
+inst_815:
+// rs1_val==4294967297 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x1; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x1, 0x6, 1b, x7, 200,0)
+
+inst_816:
+// rs1_val==4294967297 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x100000001; immval:0x2; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x100000001, 0x100000001, 0x2, 1b, x7, 208,0)
+
+inst_817:
+// rs1_val==6 and rs2_val==1,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x1; immval:0x40; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x1, 0x40, 3f, x7, 216,0)
+
+inst_818:
+// rs1_val==6 and rs2_val==4294967297,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x6; op2val:0x100000001; immval:0x556; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x6, 0x100000001, 0x556, 1b, x7, 224,0)
+
+inst_819:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x3333333333333334, 0x3, 0x200, 3f, x7, 232,0)
+
+inst_820:
+// rs2_val == 16384,
+// opcode: bgeu, op1:x10; op2:x11; op1val:0x80000000000000; op2val:0x4000; immval:0x6; align:0
+TEST_BRANCH_OP(bgeu, x8, x10, x11, 0x80000000000000, 0x4000, 0x6, 3f, x7, 240,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x6_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x6_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_2:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_3:
+ .fill 31*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/blt-01.S b/riscof/suite/rv64i_m/I/blt-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..7f325791f3541745e45f4eaf4817755d6db6b250
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/blt-01.S
@@ -0,0 +1,3454 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the blt instruction of the RISC-V I extension for the blt covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",blt)
+
+RVTEST_SIGBASE( x4,signature_x4_1)
+
+inst_0:
+// rs1 != rs2, rs1==x8, rs2==x17, rs1_val > 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val==5 and rs2_val==6148914691236517205, rs2_val == 6148914691236517205
+// opcode: blt, op1:x8; op2:x17; op1val:0x5; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x19, x8, x17, 0x5, 0x5555555555555555, 0x0, 3f, x4, 0,0)
+
+inst_1:
+// rs1 == rs2, rs1==x7, rs2==x7, rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs2_val == -274877906945, rs1_val == 256, rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0
+// opcode: blt, op1:x7; op2:x7; op1val:0x100; op2val:0x100; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x19, x7, x7, 0x100, 0x100, 0x80, 3f, x4, 8,0)
+
+inst_2:
+// rs1==x28, rs2==x18, rs1_val < 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs2_val == -4611686018427387905, rs1_val == -18014398509481985
+// opcode: blt, op1:x28; op2:x18; op1val:-0x40000000000001; op2val:-0x4000000000000001; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x19, x28, x18, -0x40000000000001, -0x4000000000000001, 0x4, 3f, x4, 16,0)
+
+inst_3:
+// rs1==x22, rs2==x0, rs1_val < 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val < rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs2_val == 16777216, rs1_val == -17179869185
+// opcode: blt, op1:x22; op2:x0; op1val:-0x400000001; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x19, x22, x0, -0x400000001, 0x0, 0x400, 1b, x4, 24,0)
+
+inst_4:
+// rs1==x2, rs2==x27, rs1_val == rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == -9223372036854775808, rs1_val == -9223372036854775808
+// opcode: blt, op1:x2; op2:x27; op1val:-0x8000000000000000; op2val:-0x8000000000000000; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x19, x2, x27, -0x8000000000000000, -0x8000000000000000, 0x200, 3f, x4, 32,0)
+
+inst_5:
+// rs1==x0, rs2==x5, rs1_val == rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs1_val==0 and rs2_val==0
+// opcode: blt, op1:x0; op2:x5; op1val:0x0; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x19, x0, x5, 0x0, 0x0, 0x8, 1b, x4, 40,0)
+
+inst_6:
+// rs1==x1, rs2==x10, rs1_val > rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs1_val == 32, rs2_val == -513
+// opcode: blt, op1:x1; op2:x10; op1val:0x20; op2val:-0x201; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x19, x1, x10, 0x20, -0x201, 0x8, 1b, x4, 48,0)
+
+inst_7:
+// rs1==x29, rs2==x6, rs1_val < rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs1_val == -2147483649
+// opcode: blt, op1:x29; op2:x6; op1val:-0x80000001; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x19, x29, x6, -0x80000001, 0x0, 0x8, 3f, x4, 56,0)
+
+inst_8:
+// rs1==x13, rs2==x8, rs2_val == 1, rs1_val == -144115188075855873
+// opcode: blt, op1:x13; op2:x8; op1val:-0x200000000000001; op2val:0x1; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x19, x13, x8, -0x200000000000001, 0x1, 0x4, 1b, x4, 64,0)
+
+inst_9:
+// rs1==x5, rs2==x3, rs2_val == 2, rs1_val==-3037000499 and rs2_val==2
+// opcode: blt, op1:x5; op2:x3; op1val:-0xb504f333; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x19, x5, x3, -0xb504f333, 0x2, 0x556, 1b, x4, 72,0)
+
+inst_10:
+// rs1==x6, rs2==x14, rs2_val == 4, rs1_val == 2147483648
+// opcode: blt, op1:x6; op2:x14; op1val:0x80000000; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x19, x6, x14, 0x80000000, 0x4, 0x0, 3f, x4, 80,0)
+
+inst_11:
+// rs1==x24, rs2==x31, rs2_val == 8,
+// opcode: blt, op1:x24; op2:x31; op1val:-0xb504f333; op2val:0x8; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x19, x24, x31, -0xb504f333, 0x8, 0x556, 1b, x4, 88,0)
+
+inst_12:
+// rs1==x31, rs2==x30, rs2_val == 16, rs1_val == 140737488355328
+// opcode: blt, op1:x31; op2:x30; op1val:0x800000000000; op2val:0x10; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x19, x31, x30, 0x800000000000, 0x10, 0x8, 1b, x4, 96,0)
+
+inst_13:
+// rs1==x18, rs2==x15, rs2_val == 32, rs1_val == 2305843009213693952
+// opcode: blt, op1:x18; op2:x15; op1val:0x2000000000000000; op2val:0x20; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x19, x18, x15, 0x2000000000000000, 0x20, 0x556, 1b, x4, 104,0)
+
+inst_14:
+// rs1==x26, rs2==x2, rs2_val == 64,
+// opcode: blt, op1:x26; op2:x2; op1val:-0x7; op2val:0x40; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x19, x26, x2, -0x7, 0x40, 0x200, 3f, x4, 112,0)
+
+inst_15:
+// rs1==x14, rs2==x20, rs2_val == 128, rs1_val == 288230376151711744
+// opcode: blt, op1:x14; op2:x20; op1val:0x400000000000000; op2val:0x80; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x19, x14, x20, 0x400000000000000, 0x80, 0x6, 1b, x4, 120,0)
+
+inst_16:
+// rs1==x17, rs2==x11, rs2_val == 256, rs1_val == -1048577
+// opcode: blt, op1:x17; op2:x11; op1val:-0x100001; op2val:0x100; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x19, x17, x11, -0x100001, 0x100, 0x4, 1b, x4, 128,0)
+
+inst_17:
+// rs1==x27, rs2==x29, rs2_val == 512, rs1_val == 134217728
+// opcode: blt, op1:x27; op2:x29; op1val:0x8000000; op2val:0x200; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x19, x27, x29, 0x8000000, 0x200, 0x4, 3f, x4, 136,0)
+
+inst_18:
+// rs1==x11, rs2==x1, rs2_val == 1024, rs1_val == 2
+// opcode: blt, op1:x11; op2:x1; op1val:0x2; op2val:0x400; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x19, x11, x1, 0x2, 0x400, 0x40, 3f, x4, 144,0)
+
+inst_19:
+// rs1==x10, rs2==x26, rs2_val == 2048, rs1_val == -1125899906842625
+// opcode: blt, op1:x10; op2:x26; op1val:-0x4000000000001; op2val:0x800; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x19, x10, x26, -0x4000000000001, 0x800, 0xa, 1b, x4, 152,0)
+
+inst_20:
+// rs1==x23, rs2==x24, rs2_val == 4096, rs1_val == 524288
+// opcode: blt, op1:x23; op2:x24; op1val:0x80000; op2val:0x1000; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x19, x23, x24, 0x80000, 0x1000, 0x100, 3f, x4, 160,0)
+
+inst_21:
+// rs1==x20, rs2==x13, rs2_val == 8192, rs1_val == 72057594037927936
+// opcode: blt, op1:x20; op2:x13; op1val:0x100000000000000; op2val:0x2000; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x19, x20, x13, 0x100000000000000, 0x2000, 0x8, 3f, x4, 168,0)
+
+inst_22:
+// rs1==x12, rs2==x9, rs2_val == 16384, rs1_val == 35184372088832
+// opcode: blt, op1:x12; op2:x9; op1val:0x200000000000; op2val:0x4000; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x19, x12, x9, 0x200000000000, 0x4000, 0x6, 3f, x4, 176,0)
+
+inst_23:
+// rs1==x16, rs2==x25, rs2_val == 32768,
+// opcode: blt, op1:x16; op2:x25; op1val:0x2; op2val:0x8000; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x19, x16, x25, 0x2, 0x8000, 0x20, 3f, x4, 184,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_24:
+// rs1==x3, rs2==x16, rs2_val == 65536,
+// opcode: blt, op1:x3; op2:x16; op1val:0x3; op2val:0x10000; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x3, x16, 0x3, 0x10000, 0x10, 3f, x1, 0,0)
+
+inst_25:
+// rs1==x4, rs2==x12, rs2_val == 131072, rs1_val == 4096
+// opcode: blt, op1:x4; op2:x12; op1val:0x1000; op2val:0x20000; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x4, x12, 0x1000, 0x20000, 0x6, 1b, x1, 8,0)
+
+inst_26:
+// rs1==x19, rs2==x4, rs2_val == 262144,
+// opcode: blt, op1:x19; op2:x4; op1val:0x0; op2val:0x40000; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x19, x4, 0x0, 0x40000, 0x40, 3f, x1, 16,0)
+
+inst_27:
+// rs1==x25, rs2==x28, rs2_val == 524288, rs1_val == 34359738368
+// opcode: blt, op1:x25; op2:x28; op1val:0x800000000; op2val:0x80000; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x25, x28, 0x800000000, 0x80000, 0x8, 1b, x1, 24,0)
+
+inst_28:
+// rs1==x21, rs2==x22, rs2_val == 1048576, rs1_val == -4294967297
+// opcode: blt, op1:x21; op2:x22; op1val:-0x100000001; op2val:0x100000; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x21, x22, -0x100000001, 0x100000, 0xa, 1b, x1, 32,0)
+
+inst_29:
+// rs1==x9, rs2==x21, rs2_val == 2097152,
+// opcode: blt, op1:x9; op2:x21; op1val:0x3333333333333334; op2val:0x200000; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x9, x21, 0x3333333333333334, 0x200000, 0x556, 1b, x1, 40,0)
+
+inst_30:
+// rs1==x30, rs2==x19, rs2_val == 4194304,
+// opcode: blt, op1:x30; op2:x19; op1val:-0x80000001; op2val:0x400000; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x30, x19, -0x80000001, 0x400000, 0x400, 3f, x1, 48,0)
+
+inst_31:
+// rs1==x15, rs2==x23, rs2_val == 8388608, rs1_val == 4
+// opcode: blt, op1:x15; op2:x23; op1val:0x4; op2val:0x800000; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x15, x23, 0x4, 0x800000, 0x556, 1b, x1, 56,0)
+
+inst_32:
+// rs2_val == 33554432, rs1_val == 6148914691236517205
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2000000; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x2000000, 0x400, 1b, x1, 64,0)
+
+inst_33:
+// rs2_val == 67108864, rs1_val == -36028797018963969
+// opcode: blt, op1:x10; op2:x11; op1val:-0x80000000000001; op2val:0x4000000; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x80000000000001, 0x4000000, 0x2, 3f, x1, 72,0)
+
+inst_34:
+// rs2_val == 134217728, rs1_val == 17592186044416
+// opcode: blt, op1:x10; op2:x11; op1val:0x100000000000; op2val:0x8000000; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x100000000000, 0x8000000, 0x0, 3f, x1, 80,0)
+
+inst_35:
+// rs2_val == 268435456,
+// opcode: blt, op1:x10; op2:x11; op1val:0x20; op2val:0x10000000; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x20, 0x10000000, 0x10, 3f, x1, 88,0)
+
+inst_36:
+// rs2_val == 536870912, rs1_val == -65537
+// opcode: blt, op1:x10; op2:x11; op1val:-0x10001; op2val:0x20000000; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x10001, 0x20000000, 0x6, 3f, x1, 96,0)
+
+inst_37:
+// rs2_val == 1073741824, rs1_val == -1073741825
+// opcode: blt, op1:x10; op2:x11; op1val:-0x40000001; op2val:0x40000000; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x40000001, 0x40000000, 0x100, 3f, x1, 104,0)
+
+inst_38:
+// rs2_val == 2147483648, rs1_val == 536870912
+// opcode: blt, op1:x10; op2:x11; op1val:0x20000000; op2val:0x80000000; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x20000000, 0x80000000, 0x0, 3f, x1, 112,0)
+
+inst_39:
+// rs2_val == 4294967296, rs1_val == -6148914691236517206
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x100000000; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x100000000, 0x2, 1b, x1, 120,0)
+
+inst_40:
+// rs2_val == 8589934592,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x200000000; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x200000000, 0x10, 3f, x1, 128,0)
+
+inst_41:
+// rs2_val == 17179869184, rs1_val == -9007199254740993
+// opcode: blt, op1:x10; op2:x11; op1val:-0x20000000000001; op2val:0x400000000; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x20000000000001, 0x400000000, 0x2, 3f, x1, 136,0)
+
+inst_42:
+// rs2_val == 34359738368,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x800000000; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x800000000, 0x100, 3f, x1, 144,0)
+
+inst_43:
+// rs2_val == 68719476736, rs1_val == -8796093022209
+// opcode: blt, op1:x10; op2:x11; op1val:-0x80000000001; op2val:0x1000000000; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x80000000001, 0x1000000000, 0x400, 3f, x1, 152,0)
+
+inst_44:
+// rs2_val == 137438953472,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x2000000000; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x2000000000, 0x0, 3f, x1, 160,0)
+
+inst_45:
+// rs2_val == 274877906944, rs1_val == -70368744177665
+// opcode: blt, op1:x10; op2:x11; op1val:-0x400000000001; op2val:0x4000000000; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x400000000001, 0x4000000000, 0x556, 1b, x1, 168,0)
+
+inst_46:
+// rs2_val == 549755813888, rs1_val == 2097152
+// opcode: blt, op1:x10; op2:x11; op1val:0x200000; op2val:0x8000000000; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x200000, 0x8000000000, 0x0, 1b, x1, 176,0)
+
+inst_47:
+// rs2_val == 1099511627776, rs1_val == 64
+// opcode: blt, op1:x10; op2:x11; op1val:0x40; op2val:0x10000000000; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x40, 0x10000000000, 0x6, 1b, x1, 184,0)
+
+inst_48:
+// rs2_val == 2199023255552, rs1_val == -2199023255553
+// opcode: blt, op1:x10; op2:x11; op1val:-0x20000000001; op2val:0x20000000000; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x20000000001, 0x20000000000, 0xa, 1b, x1, 192,0)
+
+inst_49:
+// rs2_val == 4398046511104, rs1_val == 576460752303423488
+// opcode: blt, op1:x10; op2:x11; op1val:0x800000000000000; op2val:0x40000000000; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x800000000000000, 0x40000000000, 0x20, 3f, x1, 200,0)
+
+inst_50:
+// rs2_val == 8796093022208, rs1_val == -34359738369
+// opcode: blt, op1:x10; op2:x11; op1val:-0x800000001; op2val:0x80000000000; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x800000001, 0x80000000000, 0x4, 1b, x1, 208,0)
+
+inst_51:
+// rs2_val == 17592186044416, rs1_val == -16777217
+// opcode: blt, op1:x10; op2:x11; op1val:-0x1000001; op2val:0x100000000000; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x1000001, 0x100000000000, 0x400, 1b, x1, 216,0)
+
+inst_52:
+// rs2_val == 35184372088832, rs1_val == -281474976710657
+// opcode: blt, op1:x10; op2:x11; op1val:-0x1000000000001; op2val:0x200000000000; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x1000000000001, 0x200000000000, 0x20, 3f, x1, 224,0)
+
+inst_53:
+// rs2_val == 70368744177664, rs1_val == -268435457
+// opcode: blt, op1:x10; op2:x11; op1val:-0x10000001; op2val:0x400000000000; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x10000001, 0x400000000000, 0x6, 1b, x1, 232,0)
+
+inst_54:
+// rs2_val == 140737488355328, rs1_val == 70368744177664
+// opcode: blt, op1:x10; op2:x11; op1val:0x400000000000; op2val:0x800000000000; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x400000000000, 0x800000000000, 0x8, 3f, x1, 240,0)
+
+inst_55:
+// rs2_val == 281474976710656,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2000000000000000; op2val:0x1000000000000; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2000000000000000, 0x1000000000000, 0x0, 1b, x1, 248,0)
+
+inst_56:
+// rs2_val == 562949953421312, rs1_val == -131073
+// opcode: blt, op1:x10; op2:x11; op1val:-0x20001; op2val:0x2000000000000; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x20001, 0x2000000000000, 0x100, 3f, x1, 256,0)
+
+inst_57:
+// rs2_val == 1125899906842624, rs1_val == -68719476737
+// opcode: blt, op1:x10; op2:x11; op1val:-0x1000000001; op2val:0x4000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x1000000001, 0x4000000000000, 0x8, 3f, x1, 264,0)
+
+inst_58:
+// rs2_val == 2251799813685248,
+// opcode: blt, op1:x10; op2:x11; op1val:0x40; op2val:0x8000000000000; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x40, 0x8000000000000, 0x2, 3f, x1, 272,0)
+
+inst_59:
+// rs2_val == 4503599627370496, rs1_val == 549755813888
+// opcode: blt, op1:x10; op2:x11; op1val:0x8000000000; op2val:0x10000000000000; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x8000000000, 0x10000000000000, 0x100, 3f, x1, 280,0)
+
+inst_60:
+// rs2_val == 9007199254740992, rs1_val == -65
+// opcode: blt, op1:x10; op2:x11; op1val:-0x41; op2val:0x20000000000000; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x41, 0x20000000000000, 0x400, 3f, x1, 288,0)
+
+inst_61:
+// rs2_val == 18014398509481984,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x40000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x40000000000000, 0x8, 1b, x1, 296,0)
+
+inst_62:
+// rs2_val == 36028797018963968, rs1_val == 18014398509481984
+// opcode: blt, op1:x10; op2:x11; op1val:0x40000000000000; op2val:0x80000000000000; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x40000000000000, 0x80000000000000, 0x10, 3f, x1, 304,0)
+
+inst_63:
+// rs2_val == 72057594037927936, rs1_val == -129
+// opcode: blt, op1:x10; op2:x11; op1val:-0x81; op2val:0x100000000000000; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x81, 0x100000000000000, 0x0, 3f, x1, 312,0)
+
+inst_64:
+// rs2_val == 144115188075855872,
+// opcode: blt, op1:x10; op2:x11; op1val:0x40; op2val:0x200000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x40, 0x200000000000000, 0x8, 1b, x1, 320,0)
+
+inst_65:
+// rs2_val == 288230376151711744, rs1_val == -2305843009213693953
+// opcode: blt, op1:x10; op2:x11; op1val:-0x2000000000000001; op2val:0x400000000000000; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x2000000000000001, 0x400000000000000, 0x10, 3f, x1, 328,0)
+
+inst_66:
+// rs2_val == 576460752303423488,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x800000001; op2val:0x800000000000000; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x800000001, 0x800000000000000, 0x0, 1b, x1, 336,0)
+
+inst_67:
+// rs2_val == 1152921504606846976, rs1_val == -536870913
+// opcode: blt, op1:x10; op2:x11; op1val:-0x20000001; op2val:0x1000000000000000; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x20000001, 0x1000000000000000, 0x40, 3f, x1, 344,0)
+
+inst_68:
+// rs2_val == 2305843009213693952,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x20000001; op2val:0x2000000000000000; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x20000001, 0x2000000000000000, 0x40, 3f, x1, 352,0)
+
+inst_69:
+// rs2_val == 4611686018427387904, rs1_val == -562949953421313
+// opcode: blt, op1:x10; op2:x11; op1val:-0x2000000000001; op2val:0x4000000000000000; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x2000000000001, 0x4000000000000000, 0x2, 3f, x1, 360,0)
+
+inst_70:
+// rs2_val == -2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x800000000000; op2val:-0x2; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x800000000000, -0x2, 0x8, 1b, x1, 368,0)
+
+inst_71:
+// rs2_val == -3, rs1_val == 1125899906842624
+// opcode: blt, op1:x10; op2:x11; op1val:0x4000000000000; op2val:-0x3; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4000000000000, -0x3, 0x400, 1b, x1, 376,0)
+
+inst_72:
+// rs2_val == -5, rs1_val == 262144
+// opcode: blt, op1:x10; op2:x11; op1val:0x40000; op2val:-0x5; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x40000, -0x5, 0x4, 3f, x1, 384,0)
+
+inst_73:
+// rs2_val == -9,
+// opcode: blt, op1:x10; op2:x11; op1val:0x400000000000; op2val:-0x9; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x400000000000, -0x9, 0x6, 1b, x1, 392,0)
+
+inst_74:
+// rs2_val == -17,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:-0x11; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, -0x11, 0x200, 3f, x1, 400,0)
+
+inst_75:
+// rs2_val == -33,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:-0x21; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, -0x21, 0x80, 3f, x1, 408,0)
+
+inst_76:
+// rs2_val == -65, rs1_val == 512
+// opcode: blt, op1:x10; op2:x11; op1val:0x200; op2val:-0x41; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x200, -0x41, 0x0, 1b, x1, 416,0)
+
+inst_77:
+// rs2_val == -129, rs1_val == -140737488355329
+// opcode: blt, op1:x10; op2:x11; op1val:-0x800000000001; op2val:-0x81; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x800000000001, -0x81, 0x6, 1b, x1, 424,0)
+
+inst_78:
+// rs2_val == -257, rs1_val == 36028797018963968
+// opcode: blt, op1:x10; op2:x11; op1val:0x80000000000000; op2val:-0x101; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x80000000000000, -0x101, 0x6, 1b, x1, 432,0)
+
+inst_79:
+// rs2_val == -1025, rs1_val == 67108864
+// opcode: blt, op1:x10; op2:x11; op1val:0x4000000; op2val:-0x401; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4000000, -0x401, 0x6, 1b, x1, 440,0)
+
+inst_80:
+// rs2_val == -2049,
+// opcode: blt, op1:x10; op2:x11; op1val:0x80000000000000; op2val:-0x801; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x80000000000000, -0x801, 0x40, 3f, x1, 448,0)
+
+inst_81:
+// rs2_val == -4097,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x20000000001; op2val:-0x1001; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x20000000001, -0x1001, 0x10, 3f, x1, 456,0)
+
+inst_82:
+// rs2_val == -8193,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:-0x2001; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, -0x2001, 0x80, 3f, x1, 464,0)
+
+inst_83:
+// rs2_val == -16385, rs1_val == -17592186044417
+// opcode: blt, op1:x10; op2:x11; op1val:-0x100000000001; op2val:-0x4001; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x100000000001, -0x4001, 0x20, 3f, x1, 472,0)
+
+inst_84:
+// rs2_val == -32769, rs1_val == 144115188075855872
+// opcode: blt, op1:x10; op2:x11; op1val:0x200000000000000; op2val:-0x8001; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x200000000000000, -0x8001, 0x10, 3f, x1, 480,0)
+
+inst_85:
+// rs2_val == -65537, rs1_val == -576460752303423489
+// opcode: blt, op1:x10; op2:x11; op1val:-0x800000000000001; op2val:-0x10001; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x800000000000001, -0x10001, 0x556, 1b, x1, 488,0)
+
+inst_86:
+// rs2_val == -131073,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x20000001; op2val:-0x20001; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x20000001, -0x20001, 0x8, 3f, x1, 496,0)
+
+inst_87:
+// rs2_val == -262145,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x1000000000001; op2val:-0x40001; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x1000000000001, -0x40001, 0x6, 1b, x1, 504,0)
+
+inst_88:
+// rs2_val == -524289,
+// opcode: blt, op1:x10; op2:x11; op1val:0x8000000000; op2val:-0x80001; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x8000000000, -0x80001, 0x4, 1b, x1, 512,0)
+
+inst_89:
+// rs2_val == -1048577,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x4000000000000000; op2val:-0x100001; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x4000000000000000, -0x100001, 0x2, 1b, x1, 520,0)
+
+inst_90:
+// rs2_val == -2097153,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x10001; op2val:-0x200001; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x10001, -0x200001, 0x100, 3f, x1, 528,0)
+
+inst_91:
+// rs2_val == -4194305, rs1_val == -8193
+// opcode: blt, op1:x10; op2:x11; op1val:-0x2001; op2val:-0x400001; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x2001, -0x400001, 0x6, 3f, x1, 536,0)
+
+inst_92:
+// rs2_val == -8388609,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:-0x800001; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, -0x800001, 0x400, 3f, x1, 544,0)
+
+inst_93:
+// rs2_val == -16777217,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x6; op2val:-0x1000001; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x6, -0x1000001, 0x20, 3f, x1, 552,0)
+
+inst_94:
+// rs2_val == -33554433, rs1_val == 8796093022208
+// opcode: blt, op1:x10; op2:x11; op1val:0x80000000000; op2val:-0x2000001; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x80000000000, -0x2000001, 0xa, 1b, x1, 560,0)
+
+inst_95:
+// rs2_val == -67108865,
+// opcode: blt, op1:x10; op2:x11; op1val:0x20; op2val:-0x4000001; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x20, -0x4000001, 0xa, 1b, x1, 568,0)
+
+inst_96:
+// rs2_val == -134217729, rs1_val == -274877906945
+// opcode: blt, op1:x10; op2:x11; op1val:-0x4000000001; op2val:-0x8000001; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x4000000001, -0x8000001, 0x200, 3f, x1, 576,0)
+
+inst_97:
+// rs2_val == -268435457, rs1_val == 68719476736
+// opcode: blt, op1:x10; op2:x11; op1val:0x1000000000; op2val:-0x10000001; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x1000000000, -0x10000001, 0x4, 1b, x1, 584,0)
+
+inst_98:
+// rs2_val == -536870913,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:-0x20000001; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, -0x20000001, 0x8, 1b, x1, 592,0)
+
+inst_99:
+// rs2_val == -1073741825, rs1_val == 1048576
+// opcode: blt, op1:x10; op2:x11; op1val:0x100000; op2val:-0x40000001; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x100000, -0x40000001, 0x40, 3f, x1, 600,0)
+
+inst_100:
+// rs2_val == -2147483649,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:-0x80000001; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, -0x80000001, 0x556, 1b, x1, 608,0)
+
+inst_101:
+// rs2_val == -4294967297,
+// opcode: blt, op1:x10; op2:x11; op1val:0x40000; op2val:-0x100000001; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x40000, -0x100000001, 0x200, 3f, x1, 616,0)
+
+inst_102:
+// rs2_val == -8589934593,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xa; op2val:-0x200000001; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xa, -0x200000001, 0x10, 3f, x1, 624,0)
+
+inst_103:
+// rs2_val == -17179869185, rs1_val == -9
+// opcode: blt, op1:x10; op2:x11; op1val:-0x9; op2val:-0x400000001; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x9, -0x400000001, 0x6, 3f, x1, 632,0)
+
+inst_104:
+// rs2_val == -34359738369,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x2001; op2val:-0x800000001; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x2001, -0x800000001, 0x2, 1b, x1, 640,0)
+
+inst_105:
+// rs2_val == -68719476737,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x1000000001; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, -0x1000000001, 0xa, 1b, x1, 648,0)
+
+inst_106:
+// rs2_val == -137438953473,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4000000; op2val:-0x2000000001; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4000000, -0x2000000001, 0x2, 1b, x1, 656,0)
+
+inst_107:
+// rs2_val == -549755813889,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x100001; op2val:-0x8000000001; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x100001, -0x8000000001, 0x200, 3f, x1, 664,0)
+
+inst_108:
+// rs2_val == -1099511627777,
+// opcode: blt, op1:x10; op2:x11; op1val:0x200000000000000; op2val:-0x10000000001; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x200000000000000, -0x10000000001, 0x200, 3f, x1, 672,0)
+
+inst_109:
+// rs2_val == -2199023255553,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x20000000001; op2val:-0x20000000001; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x20000000001, -0x20000000001, 0x0, 1b, x1, 680,0)
+
+inst_110:
+// rs2_val == -4398046511105,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x40000000001; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, -0x40000000001, 0x20, 3f, x1, 688,0)
+
+inst_111:
+// rs2_val == -8796093022209,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x800000001; op2val:-0x80000000001; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x800000001, -0x80000000001, 0x4, 1b, x1, 696,0)
+
+inst_112:
+// rs2_val == -17592186044417,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x100000000001; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, -0x100000000001, 0x10, 3f, x1, 704,0)
+
+inst_113:
+// rs2_val == -35184372088833,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x800000001; op2val:-0x200000000001; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x800000001, -0x200000000001, 0x0, 1b, x1, 712,0)
+
+inst_114:
+// rs2_val == -70368744177665,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x400000000001; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, -0x400000000001, 0x400, 3f, x1, 720,0)
+
+inst_115:
+// rs2_val == -140737488355329, rs1_val == 1
+// opcode: blt, op1:x10; op2:x11; op1val:0x1; op2val:-0x800000000001; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x1, -0x800000000001, 0x400, 1b, x1, 728,0)
+
+inst_116:
+// rs2_val == -281474976710657,
+// opcode: blt, op1:x10; op2:x11; op1val:0x80000000000; op2val:-0x1000000000001; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x80000000000, -0x1000000000001, 0x8, 3f, x1, 736,0)
+
+inst_117:
+// rs2_val == -562949953421313,
+// opcode: blt, op1:x10; op2:x11; op1val:0x800000000; op2val:-0x2000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x800000000, -0x2000000000001, 0x0, 1b, x1, 744,0)
+
+inst_118:
+// rs2_val == -1125899906842625, rs1_val == 562949953421312
+// opcode: blt, op1:x10; op2:x11; op1val:0x2000000000000; op2val:-0x4000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2000000000000, -0x4000000000001, 0x0, 3f, x1, 752,0)
+
+inst_119:
+// rs2_val == -2251799813685249,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x100001; op2val:-0x8000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x100001, -0x8000000000001, 0x0, 3f, x1, 760,0)
+
+inst_120:
+// rs2_val == -4503599627370497, rs1_val == -524289
+// opcode: blt, op1:x10; op2:x11; op1val:-0x80001; op2val:-0x10000000000001; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x80001, -0x10000000000001, 0x6, 3f, x1, 768,0)
+
+inst_121:
+// rs2_val == -9007199254740993,
+// opcode: blt, op1:x10; op2:x11; op1val:0x80000000000; op2val:-0x20000000000001; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x80000000000, -0x20000000000001, 0x6, 3f, x1, 776,0)
+
+inst_122:
+// rs2_val == -18014398509481985,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:-0x40000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, -0x40000000000001, 0x0, 1b, x1, 784,0)
+
+inst_123:
+// rs2_val == -36028797018963969, rs1_val == 2251799813685248
+// opcode: blt, op1:x10; op2:x11; op1val:0x8000000000000; op2val:-0x80000000000001; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x8000000000000, -0x80000000000001, 0x556, 1b, x1, 792,0)
+
+inst_124:
+// rs2_val == -72057594037927937,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x100000000000001; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, -0x100000000000001, 0x556, 1b, x1, 800,0)
+
+inst_125:
+// rs2_val == -144115188075855873, rs1_val == -134217729
+// opcode: blt, op1:x10; op2:x11; op1val:-0x8000001; op2val:-0x200000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x8000001, -0x200000000000001, 0x0, 3f, x1, 808,0)
+
+inst_126:
+// rs2_val == -288230376151711745,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x1000000001; op2val:-0x400000000000001; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x1000000001, -0x400000000000001, 0x2, 3f, x1, 816,0)
+
+inst_127:
+// rs2_val == -576460752303423489, rs1_val == 1099511627776
+// opcode: blt, op1:x10; op2:x11; op1val:0x10000000000; op2val:-0x800000000000001; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x10000000000, -0x800000000000001, 0xa, 1b, x1, 824,0)
+
+inst_128:
+// rs2_val == -1152921504606846977,
+// opcode: blt, op1:x10; op2:x11; op1val:0x100000; op2val:-0x1000000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x100000, -0x1000000000000001, 0x0, 1b, x1, 832,0)
+
+inst_129:
+// rs2_val == -2305843009213693953, rs1_val == 1152921504606846976
+// opcode: blt, op1:x10; op2:x11; op1val:0x1000000000000000; op2val:-0x2000000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x1000000000000000, -0x2000000000000001, 0x0, 3f, x1, 840,0)
+
+inst_130:
+// rs2_val == 9223372036854775807,
+// opcode: blt, op1:x10; op2:x11; op1val:0x40000; op2val:0x7fffffffffffffff; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x40000, 0x7fffffffffffffff, 0x40, 3f, x1, 848,0)
+
+inst_131:
+// rs2_val == -6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x80001; op2val:-0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x80001, -0x5555555555555556, 0x400, 1b, x1, 856,0)
+
+inst_132:
+// rs1_val == 8,
+// opcode: blt, op1:x10; op2:x11; op1val:0x8; op2val:-0x4000000000001; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x8, -0x4000000000001, 0x4, 3f, x1, 864,0)
+
+inst_133:
+// rs1_val == 16,
+// opcode: blt, op1:x10; op2:x11; op1val:0x10; op2val:0x800000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x10, 0x800000000000000, 0x6, 1b, x1, 872,0)
+
+inst_134:
+// rs1_val == 128,
+// opcode: blt, op1:x10; op2:x11; op1val:0x80; op2val:0x100000000; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x80, 0x100000000, 0x10, 3f, x1, 880,0)
+
+inst_135:
+// rs1_val == 1024,
+// opcode: blt, op1:x10; op2:x11; op1val:0x400; op2val:0x2000000000000; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x400, 0x2000000000000, 0xa, 1b, x1, 888,0)
+
+inst_136:
+// rs1_val == 2048,
+// opcode: blt, op1:x10; op2:x11; op1val:0x800; op2val:0x1000000000000000; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x800, 0x1000000000000000, 0x10, 3f, x1, 896,0)
+
+inst_137:
+// rs1_val == 8192,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2000; op2val:0x40; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2000, 0x40, 0x20, 3f, x1, 904,0)
+
+inst_138:
+// rs1_val == 16384,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4000; op2val:-0x21; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4000, -0x21, 0x40, 3f, x1, 912,0)
+
+inst_139:
+// rs1_val == 32768,
+// opcode: blt, op1:x10; op2:x11; op1val:0x8000; op2val:0x1000000000000000; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x8000, 0x1000000000000000, 0x10, 3f, x1, 920,0)
+
+inst_140:
+// rs1_val == 65536,
+// opcode: blt, op1:x10; op2:x11; op1val:0x10000; op2val:-0x7; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x10000, -0x7, 0x4, 3f, x1, 928,0)
+
+inst_141:
+// rs1_val == 131072,
+// opcode: blt, op1:x10; op2:x11; op1val:0x20000; op2val:0x200000000000000; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x20000, 0x200000000000000, 0x100, 3f, x1, 936,0)
+
+inst_142:
+// rs1_val == 4194304,
+// opcode: blt, op1:x10; op2:x11; op1val:0x400000; op2val:0x800; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x400000, 0x800, 0x0, 1b, x1, 944,0)
+
+inst_143:
+// rs1_val == 8388608,
+// opcode: blt, op1:x10; op2:x11; op1val:0x800000; op2val:0x10; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x800000, 0x10, 0x40, 3f, x1, 952,0)
+
+inst_144:
+// rs1_val == 16777216,
+// opcode: blt, op1:x10; op2:x11; op1val:0x1000000; op2val:0x2000000; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x1000000, 0x2000000, 0x556, 1b, x1, 960,0)
+
+inst_145:
+// rs1_val == 33554432,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2000000; op2val:0x2000000000000; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2000000, 0x2000000000000, 0x2, 3f, x1, 968,0)
+
+inst_146:
+// rs1_val == 268435456,
+// opcode: blt, op1:x10; op2:x11; op1val:0x10000000; op2val:-0x20000001; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x10000000, -0x20000001, 0x2, 3f, x1, 976,0)
+
+inst_147:
+// rs1_val == 1073741824,
+// opcode: blt, op1:x10; op2:x11; op1val:0x40000000; op2val:-0x100001; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x40000000, -0x100001, 0x2, 1b, x1, 984,0)
+
+inst_148:
+// rs1_val == 4294967296,
+// opcode: blt, op1:x10; op2:x11; op1val:0x100000000; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x100000000, 0x2, 0x6, 1b, x1, 992,0)
+
+inst_149:
+// rs1_val == 8589934592,
+// opcode: blt, op1:x10; op2:x11; op1val:0x200000000; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x200000000, 0x0, 0x556, 1b, x1, 1000,0)
+
+inst_150:
+// rs1_val == 17179869184,
+// opcode: blt, op1:x10; op2:x11; op1val:0x400000000; op2val:-0x8000000000001; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x400000000, -0x8000000000001, 0x6, 1b, x1, 1008,0)
+
+inst_151:
+// rs1_val == 137438953472,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2000000000; op2val:0x20000; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2000000000, 0x20000, 0x400, 3f, x1, 1016,0)
+
+inst_152:
+// rs1_val == 274877906944,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4000000000; op2val:-0x101; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4000000000, -0x101, 0x4, 1b, x1, 1024,0)
+
+inst_153:
+// rs1_val == 2199023255552,
+// opcode: blt, op1:x10; op2:x11; op1val:0x20000000000; op2val:-0x8000000001; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x20000000000, -0x8000000001, 0x80, 3f, x1, 1032,0)
+
+inst_154:
+// rs1_val == 4398046511104,
+// opcode: blt, op1:x10; op2:x11; op1val:0x40000000000; op2val:-0x800000000001; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x40000000000, -0x800000000001, 0x6, 3f, x1, 1040,0)
+
+inst_155:
+// rs1_val == 281474976710656,
+// opcode: blt, op1:x10; op2:x11; op1val:0x1000000000000; op2val:0x20000; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x1000000000000, 0x20000, 0x2, 3f, x1, 1048,0)
+
+inst_156:
+// rs1_val == 4503599627370496,
+// opcode: blt, op1:x10; op2:x11; op1val:0x10000000000000; op2val:-0x40000000000001; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x10000000000000, -0x40000000000001, 0x8, 1b, x1, 1056,0)
+
+inst_157:
+// rs1_val == 9007199254740992,
+// opcode: blt, op1:x10; op2:x11; op1val:0x20000000000000; op2val:0x1000000; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x20000000000000, 0x1000000, 0x4, 1b, x1, 1064,0)
+
+inst_158:
+// rs1_val == 4611686018427387904,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4000000000000000; op2val:-0x800000001; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4000000000000000, -0x800000001, 0x200, 3f, x1, 1072,0)
+
+inst_159:
+// rs1_val == -2,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x2; op2val:-0x1000000000001; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x2, -0x1000000000001, 0x4, 1b, x1, 1080,0)
+
+inst_160:
+// rs1_val == -3,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x3; op2val:0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x3, 0x5555555555555556, 0x80, 3f, x1, 1088,0)
+
+inst_161:
+// rs1_val == -5,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5; op2val:0x80000000; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5, 0x80000000, 0x2, 3f, x1, 1096,0)
+
+inst_162:
+// rs1_val == -17,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x11; op2val:-0x800000001; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x11, -0x800000001, 0x2, 1b, x1, 1104,0)
+
+inst_163:
+// rs1_val == -33,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x21; op2val:0x2000; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x21, 0x2000, 0x100, 3f, x1, 1112,0)
+
+inst_164:
+// rs1_val == -257,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x101; op2val:-0x8; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x101, -0x8, 0x200, 3f, x1, 1120,0)
+
+inst_165:
+// rs1_val == -513,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x201; op2val:-0x800001; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x201, -0x800001, 0x0, 1b, x1, 1128,0)
+
+inst_166:
+// rs1_val == -1025,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x401; op2val:0x2000000000000; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x401, 0x2000000000000, 0x20, 3f, x1, 1136,0)
+
+inst_167:
+// rs1_val == -2049,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x801; op2val:0x20; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x801, 0x20, 0x6, 1b, x1, 1144,0)
+
+inst_168:
+// rs1_val == -4097,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x1001; op2val:0x800000; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x1001, 0x800000, 0xa, 1b, x1, 1152,0)
+
+inst_169:
+// rs1_val == -16385,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x4001; op2val:0x200000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x4001, 0x200000000000000, 0x6, 1b, x1, 1160,0)
+
+inst_170:
+// rs1_val == -32769,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x8001; op2val:-0x80000000001; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x8001, -0x80000000001, 0x100, 3f, x1, 1168,0)
+
+inst_171:
+// rs1_val == -262145,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x40001; op2val:0x20000; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x40001, 0x20000, 0x40, 3f, x1, 1176,0)
+
+inst_172:
+// rs1_val == -2097153,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x200001; op2val:0x40000; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x200001, 0x40000, 0x400, 1b, x1, 1184,0)
+
+inst_173:
+// rs1_val == -4194305,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x400001; op2val:0x10000; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x400001, 0x10000, 0x400, 3f, x1, 1192,0)
+
+inst_174:
+// rs1_val == -8388609,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x800001; op2val:0x10; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x800001, 0x10, 0x556, 1b, x1, 1200,0)
+
+inst_175:
+// rs1_val == -33554433,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x2000001; op2val:-0x401; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x2000001, -0x401, 0x400, 3f, x1, 1208,0)
+
+inst_176:
+// rs1_val == -67108865,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x4000001; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x4000001, 0x4, 0x6, 1b, x1, 1216,0)
+
+inst_177:
+// rs1_val == -8589934593,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x200000001; op2val:0x400000; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x200000001, 0x400000, 0x80, 3f, x1, 1224,0)
+
+inst_178:
+// rs1_val == -137438953473,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x2000000001; op2val:0x4000000; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x2000000001, 0x4000000, 0x40, 3f, x1, 1232,0)
+
+inst_179:
+// rs1_val == -549755813889,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x8000000001; op2val:0x100000000000000; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x8000000001, 0x100000000000000, 0x20, 3f, x1, 1240,0)
+
+inst_180:
+// rs1_val == -1099511627777,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x10000000001; op2val:-0x1001; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x10000000001, -0x1001, 0x2, 3f, x1, 1248,0)
+
+inst_181:
+// rs1_val == -4398046511105,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x40000000001; op2val:0x5555555555555554; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x40000000001, 0x5555555555555554, 0xa, 1b, x1, 1256,0)
+
+inst_182:
+// rs1_val == -35184372088833,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x200000000001; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x200000000001, 0x5, 0x6, 3f, x1, 1264,0)
+
+inst_183:
+// rs1_val == -2251799813685249,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x8000000000001; op2val:-0x400000000001; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x8000000000001, -0x400000000001, 0x4, 3f, x1, 1272,0)
+
+inst_184:
+// rs1_val == -4503599627370497,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x10000000000001; op2val:0x6666666666666667; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x10000000000001, 0x6666666666666667, 0x556, 1b, x1, 1280,0)
+
+inst_185:
+// rs1_val == -72057594037927937,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x100000000000001; op2val:-0x20000000000001; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x100000000000001, -0x20000000000001, 0x2, 3f, x1, 1288,0)
+
+inst_186:
+// rs1_val == -288230376151711745,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x400000000000001; op2val:-0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x400000000000001, -0x5555555555555555, 0x2, 1b, x1, 1296,0)
+
+inst_187:
+// rs1_val == -1152921504606846977,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:-0x200000001; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x1000000000000001, -0x200000001, 0x20, 3f, x1, 1304,0)
+
+inst_188:
+// rs1_val == -4611686018427387905,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x4000000000000001; op2val:0x5555555555555555; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x4000000000000001, 0x5555555555555555, 0xa, 1b, x1, 1312,0)
+
+inst_189:
+// rs1_val == 9223372036854775807,
+// opcode: blt, op1:x10; op2:x11; op1val:0x7fffffffffffffff; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x7fffffffffffffff, 0x5, 0x4, 3f, x1, 1320,0)
+
+inst_190:
+// rs1_val==3 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x3, 0x2, 1b, x1, 1328,0)
+
+inst_191:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x5555555555555555, 0x0, 3f, x1, 1336,0)
+
+inst_192:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, -0x5555555555555556, 0x0, 1b, x1, 1344,0)
+
+inst_193:
+// rs1_val==3 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x5, 0x80, 3f, x1, 1352,0)
+
+inst_194:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x3333333333333333, 0x400, 3f, x1, 1360,0)
+
+inst_195:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666666; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x6666666666666666, 0x2, 3f, x1, 1368,0)
+
+inst_196:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, -0xb504f333, 0x6, 3f, x1, 1376,0)
+
+inst_197:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0xb504f333, 0x0, 3f, x1, 1384,0)
+
+inst_198:
+// rs1_val==3 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x2; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x2, 0x200, 3f, x1, 1392,0)
+
+inst_199:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x5555555555555554, 0x2, 1b, x1, 1400,0)
+
+inst_200:
+// rs1_val==3 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x0, 0x400, 1b, x1, 1408,0)
+
+inst_201:
+// rs1_val==3 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x4, 0x8, 1b, x1, 1416,0)
+
+inst_202:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333332; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x3333333333333332, 0x20, 3f, x1, 1424,0)
+
+inst_203:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666665; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x6666666666666665, 0x40, 3f, x1, 1432,0)
+
+inst_204:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0xb504f332, 0x556, 1b, x1, 1440,0)
+
+inst_205:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x5555555555555556, 0x40, 3f, x1, 1448,0)
+
+inst_206:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, -0x5555555555555555, 0x556, 1b, x1, 1456,0)
+
+inst_207:
+// rs1_val==3 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x6, 0x80, 3f, x1, 1464,0)
+
+inst_208:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x3333333333333334, 0x2, 1b, x1, 1472,0)
+
+inst_209:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666667; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0x6666666666666667, 0x2, 1b, x1, 1480,0)
+
+inst_210:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, -0xb504f332, 0x4, 1b, x1, 1488,0)
+
+inst_211:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f334; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3, 0xb504f334, 0xa, 1b, x1, 1496,0)
+
+inst_212:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x3, 0x2, 1b, x1, 1504,0)
+
+inst_213:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x8, 3f, x1, 1512,0)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, -0x5555555555555556, 0x6, 3f, x1, 1520,0)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x5, 0x100, 3f, x1, 1528,0)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x3333333333333333, 0x0, 1b, x1, 1536,0)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666666; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x6666666666666666, 0x400, 3f, x1, 1544,0)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, -0xb504f333, 0x80, 3f, x1, 1552,0)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0xb504f333, 0x2, 1b, x1, 1560,0)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x2, 0x6, 1b, x1, 1568,0)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555554; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x5555555555555554, 0x100, 3f, x1, 1576,0)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x0, 0x200, 3f, x1, 1584,0)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x4, 0x6, 1b, x1, 1592,0)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333332; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x3333333333333332, 0x80, 3f, x1, 1600,0)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666665; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x6666666666666665, 0x10, 3f, x1, 1608,0)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0xb504f332, 0x400, 1b, x1, 1616,0)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x5555555555555556, 0x400, 1b, x1, 1624,0)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555555; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, -0x5555555555555555, 0x10, 3f, x1, 1632,0)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x6, 0x200, 3f, x1, 1640,0)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333334; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x3333333333333334, 0x40, 3f, x1, 1648,0)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0x6666666666666667, 0x6, 1b, x1, 1656,0)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, -0xb504f332, 0x400, 1b, x1, 1664,0)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f334; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555555, 0xb504f334, 0x80, 3f, x1, 1672,0)
+
+inst_234:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x3, 0x2, 3f, x1, 1680,0)
+
+inst_235:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x5555555555555555, 0x6, 1b, x1, 1688,0)
+
+inst_236:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, -0x5555555555555556, 0x80, 3f, x1, 1696,0)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x5, 0x2, 3f, x1, 1704,0)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x3333333333333333, 0x400, 1b, x1, 1712,0)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666666; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x6666666666666666, 0x400, 1b, x1, 1720,0)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, -0xb504f333, 0x400, 3f, x1, 1728,0)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f333; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0xb504f333, 0xa, 1b, x1, 1736,0)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x2, 0x8, 1b, x1, 1744,0)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555554; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x5555555555555554, 0x556, 1b, x1, 1752,0)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x0, 0x10, 3f, x1, 1760,0)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x4, 0x556, 1b, x1, 1768,0)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333332; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x3333333333333332, 0x80, 3f, x1, 1776,0)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x6666666666666665, 0x2, 1b, x1, 1784,0)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0xb504f332, 0x10, 3f, x1, 1792,0)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x5555555555555556, 0x400, 1b, x1, 1800,0)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555555; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, -0x5555555555555555, 0x40, 3f, x1, 1808,0)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x6, 0x10, 3f, x1, 1816,0)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333334; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x3333333333333334, 0x10, 3f, x1, 1824,0)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666667; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0x6666666666666667, 0x2, 3f, x1, 1832,0)
+
+inst_254:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, -0xb504f332, 0x556, 1b, x1, 1840,0)
+
+inst_255:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f334; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555556, 0xb504f334, 0x2, 1b, x1, 1848,0)
+
+inst_256:
+// rs1_val==5 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x3, 0x400, 3f, x1, 1856,0)
+
+inst_257:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, -0x5555555555555556, 0x2, 3f, x1, 1864,0)
+
+inst_258:
+// rs1_val==5 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x5, 0x6, 3f, x1, 1872,0)
+
+inst_259:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x3333333333333333, 0x4, 1b, x1, 1880,0)
+
+inst_260:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x6666666666666666, 0x6, 3f, x1, 1888,0)
+
+inst_261:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, -0xb504f333, 0x6, 3f, x1, 1896,0)
+
+inst_262:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0xb504f333, 0x0, 1b, x1, 1904,0)
+
+inst_263:
+// rs1_val==5 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x2, 0x8, 1b, x1, 1912,0)
+
+inst_264:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x5555555555555554, 0x6, 3f, x1, 1920,0)
+
+inst_265:
+// rs1_val==5 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x0, 0x556, 1b, x1, 1928,0)
+
+inst_266:
+// rs1_val==5 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x4, 0x4, 1b, x1, 1936,0)
+
+inst_267:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333332; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x3333333333333332, 0x80, 3f, x1, 1944,0)
+
+inst_268:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x6666666666666665, 0x6, 3f, x1, 1952,0)
+
+inst_269:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0xb504f332, 0x556, 1b, x1, 1960,0)
+
+inst_270:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x5555555555555556, 0x100, 3f, x1, 1968,0)
+
+inst_271:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, -0x5555555555555555, 0x0, 1b, x1, 1976,0)
+
+inst_272:
+// rs1_val==5 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x6, 0x200, 3f, x1, 1984,0)
+
+inst_273:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333334; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x3333333333333334, 0xa, 1b, x1, 1992,0)
+
+inst_274:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0x6666666666666667, 0x4, 1b, x1, 2000,0)
+
+inst_275:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, -0xb504f332, 0x0, 1b, x1, 2008,0)
+
+inst_276:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5, 0xb504f334, 0x0, 3f, x1, 2016,0)
+
+inst_277:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x3, 0xa, 1b, x1, 2024,0)
+
+inst_278:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555555; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x5555555555555555, 0x10, 3f, x1, 2032,0)
+
+inst_279:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, -0x5555555555555556, 0x6, 1b, x1, 2040,0)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x5, 0x4, 3f, x1, 0,0)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333333; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x10, 3f, x1, 8,0)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x6666666666666666, 0x6, 1b, x1, 16,0)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, -0xb504f333, 0x6, 1b, x1, 24,0)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0xb504f333, 0x6, 3f, x1, 32,0)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x2, 0x556, 1b, x1, 40,0)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555554; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x5555555555555554, 0x400, 3f, x1, 48,0)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x0, 0x556, 1b, x1, 56,0)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x4, 0x10, 3f, x1, 64,0)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333332; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x3333333333333332, 0xa, 1b, x1, 72,0)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x6666666666666665, 0x4, 1b, x1, 80,0)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0xb504f332, 0x400, 1b, x1, 88,0)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555556; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x5555555555555556, 0xa, 1b, x1, 96,0)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, -0x5555555555555555, 0x400, 3f, x1, 104,0)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x6, 0x2, 1b, x1, 112,0)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333334; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x3333333333333334, 0x80, 3f, x1, 120,0)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0x6666666666666667, 0x4, 3f, x1, 128,0)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, -0xb504f332, 0x10, 3f, x1, 136,0)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f334; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333333, 0xb504f334, 0x4, 1b, x1, 144,0)
+
+inst_299:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x3, 0x0, 1b, x1, 152,0)
+
+inst_300:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x5555555555555555, 0x8, 3f, x1, 160,0)
+
+inst_301:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, -0x5555555555555556, 0x556, 1b, x1, 168,0)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x5, 0xa, 1b, x1, 176,0)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x3333333333333333, 0x0, 3f, x1, 184,0)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x4, 3f, x1, 192,0)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, -0xb504f333, 0x0, 3f, x1, 200,0)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f333; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0xb504f333, 0x100, 3f, x1, 208,0)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x2, 0x400, 1b, x1, 216,0)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555554; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x5555555555555554, 0x10, 3f, x1, 224,0)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x0, 0x4, 1b, x1, 232,0)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x4, 0x4, 3f, x1, 240,0)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x3333333333333332, 0x8, 3f, x1, 248,0)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x6666666666666665, 0x400, 1b, x1, 256,0)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f332; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0xb504f332, 0x40, 3f, x1, 264,0)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555556; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x5555555555555556, 0x200, 3f, x1, 272,0)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, -0x5555555555555555, 0x556, 1b, x1, 280,0)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x6, 0x400, 1b, x1, 288,0)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333334; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x3333333333333334, 0x0, 1b, x1, 296,0)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0x6666666666666667, 0x6, 1b, x1, 304,0)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, -0xb504f332, 0x6, 1b, x1, 312,0)
+
+inst_320:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f334; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666666, 0xb504f334, 0x4, 3f, x1, 320,0)
+
+inst_321:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x3, 0x200, 3f, x1, 328,0)
+
+inst_322:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x5555555555555555, 0x0, 3f, x1, 336,0)
+
+inst_323:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, -0x5555555555555556, 0x4, 3f, x1, 344,0)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x5, 0x40, 3f, x1, 352,0)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333333; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x3333333333333333, 0x556, 1b, x1, 360,0)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666666; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x6666666666666666, 0x8, 1b, x1, 368,0)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, -0xb504f333, 0x2, 1b, x1, 376,0)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f333; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0xb504f333, 0xa, 1b, x1, 384,0)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x5555555555555554, 0x6, 1b, x1, 392,0)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x0, 0xa, 1b, x1, 400,0)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x4, 0x2, 1b, x1, 408,0)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333332; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x3333333333333332, 0x100, 3f, x1, 416,0)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x6666666666666665, 0x2, 1b, x1, 424,0)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f332; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0xb504f332, 0x80, 3f, x1, 432,0)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x5555555555555556, 0x556, 1b, x1, 440,0)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555555; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, -0x5555555555555555, 0xa, 1b, x1, 448,0)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x6, 0x0, 3f, x1, 456,0)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x3333333333333334, 0x4, 3f, x1, 464,0)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666667; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0x6666666666666667, 0x556, 1b, x1, 472,0)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f332; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, -0xb504f332, 0x80, 3f, x1, 480,0)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f334; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f333, 0xb504f334, 0x40, 3f, x1, 488,0)
+
+inst_342:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x3, 0x556, 1b, x1, 496,0)
+
+inst_343:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x5555555555555555, 0x8, 3f, x1, 504,0)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, -0x5555555555555556, 0x4, 3f, x1, 512,0)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x5, 0x400, 3f, x1, 520,0)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333333; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x3333333333333333, 0x2, 1b, x1, 528,0)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x6666666666666666, 0x0, 1b, x1, 536,0)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, -0xb504f333, 0x8, 3f, x1, 544,0)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f333; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0xb504f333, 0x200, 3f, x1, 552,0)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x2, 0x400, 1b, x1, 560,0)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x5555555555555554, 0x6, 1b, x1, 568,0)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x0, 0x4, 1b, x1, 576,0)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x4, 0x2, 3f, x1, 584,0)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x3333333333333332, 0x6, 3f, x1, 592,0)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666665; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x6666666666666665, 0x200, 3f, x1, 600,0)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0xb504f332, 0x8, 3f, x1, 608,0)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x5555555555555556, 0x80, 3f, x1, 616,0)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, -0x5555555555555555, 0x2, 3f, x1, 624,0)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x6, 0x20, 3f, x1, 632,0)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333334; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x3333333333333334, 0x80, 3f, x1, 640,0)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0x6666666666666667, 0x6, 1b, x1, 648,0)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, -0xb504f332, 0x20, 3f, x1, 656,0)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f333, 0xb504f334, 0x400, 1b, x1, 664,0)
+
+inst_364:
+// rs1_val==2 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x3, 0x2, 1b, x1, 672,0)
+
+inst_365:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x5555555555555555, 0x8, 3f, x1, 680,0)
+
+inst_366:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, -0x5555555555555556, 0x2, 1b, x1, 688,0)
+
+inst_367:
+// rs1_val==2 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x5; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x5, 0x20, 3f, x1, 696,0)
+
+inst_368:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x3333333333333333, 0x6, 1b, x1, 704,0)
+
+inst_369:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x6666666666666666, 0x4, 1b, x1, 712,0)
+
+inst_370:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f333; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, -0xb504f333, 0x556, 1b, x1, 720,0)
+
+inst_371:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0xb504f333, 0x400, 1b, x1, 728,0)
+
+inst_372:
+// rs1_val==2 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x2, 0x400, 3f, x1, 736,0)
+
+inst_373:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x5555555555555554, 0x0, 3f, x1, 744,0)
+
+inst_374:
+// rs1_val==2 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x0, 0x2, 1b, x1, 752,0)
+
+inst_375:
+// rs1_val==2 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x4, 0x0, 3f, x1, 760,0)
+
+inst_376:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333332; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x3333333333333332, 0x20, 3f, x1, 768,0)
+
+inst_377:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x6666666666666665, 0x6, 3f, x1, 776,0)
+
+inst_378:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0xb504f332, 0x6, 1b, x1, 784,0)
+
+inst_379:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555556; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x5555555555555556, 0xa, 1b, x1, 792,0)
+
+inst_380:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, -0x5555555555555555, 0x400, 3f, x1, 800,0)
+
+inst_381:
+// rs1_val==2 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x6, 0x0, 3f, x1, 808,0)
+
+inst_382:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x3333333333333334, 0x8, 3f, x1, 816,0)
+
+inst_383:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666667; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0x6666666666666667, 0x400, 3f, x1, 824,0)
+
+inst_384:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, -0xb504f332, 0x400, 1b, x1, 832,0)
+
+inst_385:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x2, 0xb504f334, 0x400, 1b, x1, 840,0)
+
+inst_386:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x3, 0x80, 3f, x1, 848,0)
+
+inst_387:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555555; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x5555555555555555, 0x20, 3f, x1, 856,0)
+
+inst_388:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, -0x5555555555555556, 0x4, 3f, x1, 864,0)
+
+inst_389:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x5, 0x8, 1b, x1, 872,0)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333333; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x3333333333333333, 0x556, 1b, x1, 880,0)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x6666666666666666, 0x4, 3f, x1, 888,0)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f333; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, -0xb504f333, 0x556, 1b, x1, 896,0)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0xb504f333, 0x4, 3f, x1, 904,0)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x2, 0x0, 3f, x1, 912,0)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x4, 3f, x1, 920,0)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x0, 0x100, 3f, x1, 928,0)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x4, 0xa, 1b, x1, 936,0)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333332; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x3333333333333332, 0x4, 1b, x1, 944,0)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666665; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x6666666666666665, 0xa, 1b, x1, 952,0)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0xb504f332, 0x6, 3f, x1, 960,0)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x400, 3f, x1, 968,0)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, -0x5555555555555555, 0x400, 1b, x1, 976,0)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x6, 0x200, 3f, x1, 984,0)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333334; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x3333333333333334, 0x100, 3f, x1, 992,0)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0x6666666666666667, 0x0, 3f, x1, 1000,0)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, -0xb504f332, 0x4, 1b, x1, 1008,0)
+
+inst_407:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f334; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555554, 0xb504f334, 0x10, 3f, x1, 1016,0)
+
+inst_408:
+// rs1_val==0 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x3, 0x200, 3f, x1, 1024,0)
+
+inst_409:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555555; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x5555555555555555, 0x40, 3f, x1, 1032,0)
+
+inst_410:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, -0x5555555555555556, 0x0, 3f, x1, 1040,0)
+
+inst_411:
+// rs1_val==0 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x5, 0x4, 1b, x1, 1048,0)
+
+inst_412:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x3333333333333333, 0x400, 3f, x1, 1056,0)
+
+inst_413:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666666; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x6666666666666666, 0x8, 3f, x1, 1064,0)
+
+inst_414:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, -0xb504f333, 0x400, 3f, x1, 1072,0)
+
+inst_415:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0xb504f333, 0x4, 1b, x1, 1080,0)
+
+inst_416:
+// rs1_val==4 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x3, 0x80, 3f, x1, 1088,0)
+
+inst_417:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x5555555555555555, 0x4, 1b, x1, 1096,0)
+
+inst_418:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, -0x5555555555555556, 0x40, 3f, x1, 1104,0)
+
+inst_419:
+// rs1_val==4 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x5; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x5, 0xa, 1b, x1, 1112,0)
+
+inst_420:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333333; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x3333333333333333, 0x8, 3f, x1, 1120,0)
+
+inst_421:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x6666666666666666, 0x6, 3f, x1, 1128,0)
+
+inst_422:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, -0xb504f333, 0x0, 1b, x1, 1136,0)
+
+inst_423:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0xb504f333, 0x4, 3f, x1, 1144,0)
+
+inst_424:
+// rs1_val==4 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x2, 0x556, 1b, x1, 1152,0)
+
+inst_425:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x5555555555555554, 0x6, 3f, x1, 1160,0)
+
+inst_426:
+// rs1_val==4 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x0, 0x8, 1b, x1, 1168,0)
+
+inst_427:
+// rs1_val==4 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x4, 0x2, 1b, x1, 1176,0)
+
+inst_428:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x3333333333333332, 0x6, 1b, x1, 1184,0)
+
+inst_429:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x6666666666666665, 0x400, 1b, x1, 1192,0)
+
+inst_430:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0xb504f332, 0x400, 3f, x1, 1200,0)
+
+inst_431:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555556; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x5555555555555556, 0x20, 3f, x1, 1208,0)
+
+inst_432:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555555; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, -0x5555555555555555, 0x40, 3f, x1, 1216,0)
+
+inst_433:
+// rs1_val==4 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x6, 0x100, 3f, x1, 1224,0)
+
+inst_434:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333334; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x3333333333333334, 0x556, 1b, x1, 1232,0)
+
+inst_435:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0x6666666666666667, 0x0, 3f, x1, 1240,0)
+
+inst_436:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, -0xb504f332, 0x6, 3f, x1, 1248,0)
+
+inst_437:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f334; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x4, 0xb504f334, 0x80, 3f, x1, 1256,0)
+
+inst_438:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x3, 0x8, 3f, x1, 1264,0)
+
+inst_439:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555555; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x5555555555555555, 0x10, 3f, x1, 1272,0)
+
+inst_440:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, -0x5555555555555556, 0x100, 3f, x1, 1280,0)
+
+inst_441:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x5, 0x0, 1b, x1, 1288,0)
+
+inst_442:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333333; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x3333333333333333, 0xa, 1b, x1, 1296,0)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666666; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x6666666666666666, 0x100, 3f, x1, 1304,0)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, -0xb504f333, 0x0, 3f, x1, 1312,0)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0xb504f333, 0x80, 3f, x1, 1320,0)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x2, 0x6, 3f, x1, 1328,0)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x5555555555555554, 0x6, 1b, x1, 1336,0)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x0, 0x2, 3f, x1, 1344,0)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x4, 0x2, 1b, x1, 1352,0)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333332; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x10, 3f, x1, 1360,0)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x6666666666666665, 0x2, 3f, x1, 1368,0)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0xb504f332, 0x2, 3f, x1, 1376,0)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x5555555555555556, 0x4, 3f, x1, 1384,0)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, -0x5555555555555555, 0x4, 3f, x1, 1392,0)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x6, 0x0, 1b, x1, 1400,0)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333334; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x3333333333333334, 0x6, 3f, x1, 1408,0)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666667; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0x6666666666666667, 0x200, 3f, x1, 1416,0)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, -0xb504f332, 0x400, 3f, x1, 1424,0)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f334; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333332, 0xb504f334, 0x4, 3f, x1, 1432,0)
+
+inst_460:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x3, 0x400, 1b, x1, 1440,0)
+
+inst_461:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x5555555555555555, 0x8, 1b, x1, 1448,0)
+
+inst_462:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, -0x5555555555555556, 0x556, 1b, x1, 1456,0)
+
+inst_463:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x5, 0x556, 1b, x1, 1464,0)
+
+inst_464:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333333; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x3333333333333333, 0x2, 1b, x1, 1472,0)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666666; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x6666666666666666, 0x100, 3f, x1, 1480,0)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, -0xb504f333, 0x4, 3f, x1, 1488,0)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0xb504f333, 0x4, 3f, x1, 1496,0)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x2, 0x4, 1b, x1, 1504,0)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555554; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x5555555555555554, 0x8, 3f, x1, 1512,0)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x0, 0x556, 1b, x1, 1520,0)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x4, 0x0, 1b, x1, 1528,0)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x3333333333333332, 0x0, 1b, x1, 1536,0)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x4, 3f, x1, 1544,0)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0xb504f332, 0x8, 1b, x1, 1552,0)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x5555555555555556, 0x6, 3f, x1, 1560,0)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, -0x5555555555555555, 0x4, 1b, x1, 1568,0)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x6, 0x10, 3f, x1, 1576,0)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333334; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x3333333333333334, 0x20, 3f, x1, 1584,0)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0x6666666666666667, 0x6, 1b, x1, 1592,0)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, -0xb504f332, 0x4, 1b, x1, 1600,0)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f334; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666665, 0xb504f334, 0x8, 1b, x1, 1608,0)
+
+inst_482:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x3, 0x400, 3f, x1, 1616,0)
+
+inst_483:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555555; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x5555555555555555, 0x20, 3f, x1, 1624,0)
+
+inst_484:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, -0x5555555555555556, 0x40, 3f, x1, 1632,0)
+
+inst_485:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x5, 0x6, 1b, x1, 1640,0)
+
+inst_486:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x3333333333333333, 0x6, 3f, x1, 1648,0)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666666; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x6666666666666666, 0x2, 3f, x1, 1656,0)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, -0xb504f333, 0x400, 1b, x1, 1664,0)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0xb504f333, 0x4, 3f, x1, 1672,0)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x2, 0x400, 1b, x1, 1680,0)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555554; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x5555555555555554, 0x556, 1b, x1, 1688,0)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x0, 0x400, 3f, x1, 1696,0)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x4, 0x2, 3f, x1, 1704,0)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x3333333333333332, 0x2, 3f, x1, 1712,0)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x6666666666666665, 0x0, 1b, x1, 1720,0)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f332; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0xb504f332, 0xa, 1b, x1, 1728,0)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x5555555555555556, 0x40, 3f, x1, 1736,0)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555555; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, -0x5555555555555555, 0x200, 3f, x1, 1744,0)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x6, 0x400, 1b, x1, 1752,0)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333334; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x3333333333333334, 0x0, 1b, x1, 1760,0)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0x6666666666666667, 0x4, 3f, x1, 1768,0)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, -0xb504f332, 0x0, 1b, x1, 1776,0)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f332, 0xb504f334, 0x400, 3f, x1, 1784,0)
+
+inst_504:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x3, 0x80, 3f, x1, 1792,0)
+
+inst_505:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555555; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x5555555555555555, 0x40, 3f, x1, 1800,0)
+
+inst_506:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, -0x5555555555555556, 0x400, 1b, x1, 1808,0)
+
+inst_507:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x5, 0x2, 3f, x1, 1816,0)
+
+inst_508:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333333; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x3333333333333333, 0x2, 1b, x1, 1824,0)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666666; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x6666666666666666, 0x2, 1b, x1, 1832,0)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f333; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, -0xb504f333, 0x100, 3f, x1, 1840,0)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f333; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0xb504f333, 0x100, 3f, x1, 1848,0)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x2, 0x8, 1b, x1, 1856,0)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555554; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x100, 3f, x1, 1864,0)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x0; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x0, 0x20, 3f, x1, 1872,0)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x4, 0x20, 3f, x1, 1880,0)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333332; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x3333333333333332, 0xa, 1b, x1, 1888,0)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x6666666666666665, 0x4, 1b, x1, 1896,0)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0xb504f332, 0x0, 1b, x1, 1904,0)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x6, 1b, x1, 1912,0)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, -0x5555555555555555, 0x6, 1b, x1, 1920,0)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x6, 0x4, 1b, x1, 1928,0)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333334; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x3333333333333334, 0x80, 3f, x1, 1936,0)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0x6666666666666667, 0x6, 1b, x1, 1944,0)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, -0xb504f332, 0x8, 3f, x1, 1952,0)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f334; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x5555555555555556, 0xb504f334, 0x556, 1b, x1, 1960,0)
+
+inst_526:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x3, 0x8, 1b, x1, 1968,0)
+
+inst_527:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x5555555555555555, 0x400, 1b, x1, 1976,0)
+
+inst_528:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, -0x5555555555555556, 0x0, 1b, x1, 1984,0)
+
+inst_529:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x5, 0x2, 1b, x1, 1992,0)
+
+inst_530:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333333; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x3333333333333333, 0x200, 3f, x1, 2000,0)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666666; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x6666666666666666, 0xa, 1b, x1, 2008,0)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, -0xb504f333, 0x0, 1b, x1, 2016,0)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f333; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0xb504f333, 0x10, 3f, x1, 2024,0)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x2, 0x4, 3f, x1, 2032,0)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555554; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x5555555555555554, 0x40, 3f, x1, 2040,0)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x0, 0x100, 3f, x1, 0,0)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x4, 0x8, 3f, x1, 8,0)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333332; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x3333333333333332, 0x40, 3f, x1, 16,0)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x6666666666666665, 0x0, 1b, x1, 24,0)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f332; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0xb504f332, 0x40, 3f, x1, 32,0)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x5555555555555556, 0x40, 3f, x1, 40,0)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, -0x5555555555555555, 0x100, 3f, x1, 48,0)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x6, 0xa, 1b, x1, 56,0)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333334; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x3333333333333334, 0x80, 3f, x1, 64,0)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666667; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0x6666666666666667, 0x80, 3f, x1, 72,0)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, -0xb504f332, 0x556, 1b, x1, 80,0)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f334; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x5555555555555555, 0xb504f334, 0x8, 1b, x1, 88,0)
+
+inst_548:
+// rs1_val==6 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x3, 0x2, 3f, x1, 96,0)
+
+inst_549:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x5555555555555555, 0x8, 1b, x1, 104,0)
+
+inst_550:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, -0x5555555555555556, 0x80, 3f, x1, 112,0)
+
+inst_551:
+// rs1_val==6 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x5; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x5, 0xa, 1b, x1, 120,0)
+
+inst_552:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x3333333333333333, 0x4, 3f, x1, 128,0)
+
+inst_553:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666666; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x6666666666666666, 0x40, 3f, x1, 136,0)
+
+inst_554:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, -0xb504f333, 0x400, 1b, x1, 144,0)
+
+inst_555:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0xb504f333, 0x80, 3f, x1, 152,0)
+
+inst_556:
+// rs1_val==6 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x2, 0x10, 3f, x1, 160,0)
+
+inst_557:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555554; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x5555555555555554, 0x100, 3f, x1, 168,0)
+
+inst_558:
+// rs1_val==6 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x0, 0x2, 3f, x1, 176,0)
+
+inst_559:
+// rs1_val==6 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x4, 0x20, 3f, x1, 184,0)
+
+inst_560:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x3333333333333332, 0x0, 3f, x1, 192,0)
+
+inst_561:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x6666666666666665, 0x2, 1b, x1, 200,0)
+
+inst_562:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f332; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0xb504f332, 0x80, 3f, x1, 208,0)
+
+inst_563:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555556; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x5555555555555556, 0x20, 3f, x1, 216,0)
+
+inst_564:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, -0x5555555555555555, 0x6, 1b, x1, 224,0)
+
+inst_565:
+// rs1_val==6 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x6, 0x2, 3f, x1, 232,0)
+
+inst_566:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x3333333333333334, 0x8, 1b, x1, 240,0)
+
+inst_567:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666667; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0x6666666666666667, 0xa, 1b, x1, 248,0)
+
+inst_568:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, -0xb504f332, 0x4, 1b, x1, 256,0)
+
+inst_569:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f334; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6, 0xb504f334, 0x556, 1b, x1, 264,0)
+
+inst_570:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x3, 0x100, 3f, x1, 272,0)
+
+inst_571:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555555; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x5555555555555555, 0x80, 3f, x1, 280,0)
+
+inst_572:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, -0x5555555555555556, 0x8, 3f, x1, 288,0)
+
+inst_573:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x5, 0x8, 3f, x1, 296,0)
+
+inst_574:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x3333333333333333, 0x4, 1b, x1, 304,0)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x6666666666666666, 0x4, 1b, x1, 312,0)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, -0xb504f333, 0x6, 3f, x1, 320,0)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0xb504f333, 0x8, 3f, x1, 328,0)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x2, 0x100, 3f, x1, 336,0)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555554; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x5555555555555554, 0x556, 1b, x1, 344,0)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x0, 0x40, 3f, x1, 352,0)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x4, 0x4, 3f, x1, 360,0)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333332; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x3333333333333332, 0x4, 3f, x1, 368,0)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666665; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x6666666666666665, 0x40, 3f, x1, 376,0)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0xb504f332, 0x400, 3f, x1, 384,0)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555556; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x5555555555555556, 0x200, 3f, x1, 392,0)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, -0x5555555555555555, 0x100, 3f, x1, 400,0)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x6, 0x556, 1b, x1, 408,0)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x8, 3f, x1, 416,0)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666667; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0x6666666666666667, 0x80, 3f, x1, 424,0)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, -0xb504f332, 0x10, 3f, x1, 432,0)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f334; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x3333333333333334, 0xb504f334, 0x2, 3f, x1, 440,0)
+
+inst_592:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x3, 0x200, 3f, x1, 448,0)
+
+inst_593:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x5555555555555555, 0x400, 3f, x1, 456,0)
+
+inst_594:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, -0x5555555555555556, 0x8, 1b, x1, 464,0)
+
+inst_595:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x5, 0x80, 3f, x1, 472,0)
+
+inst_596:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x3333333333333333, 0x4, 3f, x1, 480,0)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666666; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x200, 3f, x1, 488,0)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, -0xb504f333, 0x6, 3f, x1, 496,0)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0xb504f333, 0x4, 3f, x1, 504,0)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x2, 0x100, 3f, x1, 512,0)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555554; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x5555555555555554, 0x400, 1b, x1, 520,0)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x0, 0x2, 3f, x1, 528,0)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x4, 0x20, 3f, x1, 536,0)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x3333333333333332, 0x6, 1b, x1, 544,0)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666665; immval:0x40; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x40, 3f, x1, 552,0)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0xb504f332, 0x556, 1b, x1, 560,0)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x5555555555555556, 0x8, 3f, x1, 568,0)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555555; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, -0x5555555555555555, 0xa, 1b, x1, 576,0)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x6, 0x2, 3f, x1, 584,0)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333334; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x3333333333333334, 0x20, 3f, x1, 592,0)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666667; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x2, 1b, x1, 600,0)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, -0xb504f332, 0x20, 3f, x1, 608,0)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f334; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x6666666666666667, 0xb504f334, 0x20, 3f, x1, 616,0)
+
+inst_614:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x3, 0x4, 3f, x1, 624,0)
+
+inst_615:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555555; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x5555555555555555, 0x20, 3f, x1, 632,0)
+
+inst_616:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, -0x5555555555555556, 0x8, 3f, x1, 640,0)
+
+inst_617:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x5, 0x10, 3f, x1, 648,0)
+
+inst_618:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333333; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x3333333333333333, 0x10, 3f, x1, 656,0)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x6666666666666666, 0x0, 1b, x1, 664,0)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, -0xb504f333, 0x0, 1b, x1, 672,0)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0xb504f333, 0x400, 1b, x1, 680,0)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x2, 0x4, 3f, x1, 688,0)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x5555555555555554, 0x4, 3f, x1, 696,0)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x0, 0x10, 3f, x1, 704,0)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x4, 0x10, 3f, x1, 712,0)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x3333333333333332, 0x0, 3f, x1, 720,0)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666665; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x6666666666666665, 0x100, 3f, x1, 728,0)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0xb504f332, 0x6, 3f, x1, 736,0)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x5555555555555556, 0x556, 1b, x1, 744,0)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, -0x5555555555555555, 0x0, 1b, x1, 752,0)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x6, 0x0, 3f, x1, 760,0)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x3333333333333334, 0x2, 3f, x1, 768,0)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0x6666666666666667, 0x0, 3f, x1, 776,0)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, -0xb504f332, 0x4, 1b, x1, 784,0)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f334; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0xb504f332, 0xb504f334, 0x100, 3f, x1, 792,0)
+
+inst_636:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x3, 0x20, 3f, x1, 800,0)
+
+inst_637:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x5555555555555555, 0x100, 3f, x1, 808,0)
+
+inst_638:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, -0x5555555555555556, 0x8, 3f, x1, 816,0)
+
+inst_639:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x5, 0x4, 3f, x1, 824,0)
+
+inst_640:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x3333333333333333, 0x400, 3f, x1, 832,0)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x6666666666666666, 0x6, 1b, x1, 840,0)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, -0xb504f333, 0x2, 1b, x1, 848,0)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0xb504f333, 0x2, 1b, x1, 856,0)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x2; immval:0x20; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x2, 0x20, 3f, x1, 864,0)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555554; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x5555555555555554, 0x100, 3f, x1, 872,0)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x0, 0x6, 1b, x1, 880,0)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x4, 0x8, 1b, x1, 888,0)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333332; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x3333333333333332, 0x4, 3f, x1, 896,0)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666665; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x6666666666666665, 0x8, 1b, x1, 904,0)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0xb504f332, 0x4, 1b, x1, 912,0)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x5555555555555556, 0x4, 3f, x1, 920,0)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, -0x5555555555555555, 0x0, 3f, x1, 928,0)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x6, 0x4, 3f, x1, 936,0)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x3333333333333334, 0x400, 1b, x1, 944,0)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0x6666666666666667, 0x0, 1b, x1, 952,0)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, -0xb504f332, 0x10, 3f, x1, 960,0)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f334; immval:0x556; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0xb504f334, 0xb504f334, 0x556, 1b, x1, 968,0)
+
+inst_658:
+// rs1_val==0 and rs2_val==2,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x2, 0x10, 3f, x1, 976,0)
+
+inst_659:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x5555555555555554, 0x4, 1b, x1, 984,0)
+
+inst_660:
+// rs1_val==0 and rs2_val==4,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x4, 0x8, 3f, x1, 992,0)
+
+inst_661:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x3333333333333332, 0x6, 3f, x1, 1000,0)
+
+inst_662:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666665; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x6666666666666665, 0xa, 1b, x1, 1008,0)
+
+inst_663:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0xb504f332, 0x10, 3f, x1, 1016,0)
+
+inst_664:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x5555555555555556, 0x4, 3f, x1, 1024,0)
+
+inst_665:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, -0x5555555555555555, 0x0, 1b, x1, 1032,0)
+
+inst_666:
+// rs1_val==0 and rs2_val==6,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x6; immval:0xa; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x6, 0xa, 1b, x1, 1040,0)
+
+inst_667:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333334; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x3333333333333334, 0x100, 3f, x1, 1048,0)
+
+inst_668:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666667; immval:0x200; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x6666666666666667, 0x200, 3f, x1, 1056,0)
+
+inst_669:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, -0xb504f332, 0x4, 3f, x1, 1064,0)
+
+inst_670:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f334; immval:0x100; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0xb504f334, 0x100, 3f, x1, 1072,0)
+
+inst_671:
+// rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs2_val == -274877906945, rs1_val == 256, rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0
+// opcode: blt, op1:x10; op2:x11; op1val:0x100; op2val:-0x4000000001; immval:0x80; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x100, -0x4000000001, 0x80, 3f, x1, 1080,0)
+
+inst_672:
+// rs1_val < 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val < rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs2_val == 16777216, rs1_val == -17179869185
+// opcode: blt, op1:x10; op2:x11; op1val:-0x400000001; op2val:0x1000000; immval:0x400; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, -0x400000001, 0x1000000, 0x400, 1b, x1, 1088,0)
+
+inst_673:
+// rs1_val == rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs1_val==0 and rs2_val==0
+// opcode: blt, op1:x10; op2:x11; op1val:0x0; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(blt, x2, x10, x11, 0x0, 0x0, 0x8, 1b, x1, 1096,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x4_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_1:
+ .fill 24*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 138*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/bltu-01.S b/riscof/suite/rv64i_m/I/bltu-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..cdb984f6e66d39259ad5e2d815dc2905d784dc36
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/bltu-01.S
@@ -0,0 +1,4159 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the bltu instruction of the RISC-V I extension for the bltu covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",bltu)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x9, rs2==x15, rs1_val > 0 and rs2_val > 0, rs1_val == 18446743523953737727, rs2_val == 18446744073709543423, rs1_val > 0 and rs2_val > 0 and rs1_val < rs2_val and imm_val > 0
+// opcode: bltu, op1:x9; op2:x15; op1val:0xffffff7fffffffff; op2val:0xffffffffffffdfff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x18, x9, x15, 0xffffff7fffffffff, 0xffffffffffffdfff, 0x4, 3f, x1, 0,0)
+
+inst_1:
+// rs1 == rs2, rs1==x23, rs2==x23, rs1_val > 0 and rs2_val > 0 and rs1_val == rs2_val and imm_val > 0, rs1_val == 18446744073709551614, rs2_val == 18446744073709551614
+// opcode: bltu, op1:x23; op2:x23; op1val:0xfffffffffffffffe; op2val:0xfffffffffffffffe; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x18, x23, x23, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x10, 3f, x1, 8,0)
+
+inst_2:
+// rs1==x13, rs2==x7, rs1_val > 0 and rs2_val > 0 and rs1_val == rs2_val and imm_val < 0, rs1_val==3037000498 and rs2_val==3037000498
+// opcode: bltu, op1:x13; op2:x7; op1val:0xb504f332; op2val:0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x18, x13, x7, 0xb504f332, 0xb504f332, 0x6, 1b, x1, 16,0)
+
+inst_3:
+// rs1==x29, rs2==x4, rs1_val > 0 and rs2_val > 0 and rs1_val > rs2_val and imm_val > 0 , rs1_val == 18446744073709551613, rs2_val == 524288
+// opcode: bltu, op1:x29; op2:x4; op1val:0xfffffffffffffffd; op2val:0x80000; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x18, x29, x4, 0xfffffffffffffffd, 0x80000, 0x20, 3f, x1, 24,0)
+
+inst_4:
+// rs1==x2, rs2==x24, rs1_val > 0 and rs2_val > 0 and rs1_val > rs2_val and imm_val < 0 , rs1_val == 8388608, rs2_val == 2097152
+// opcode: bltu, op1:x2; op2:x24; op1val:0x800000; op2val:0x200000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x18, x2, x24, 0x800000, 0x200000, 0x6, 1b, x1, 32,0)
+
+inst_5:
+// rs1==x6, rs2==x0, rs1_val > 0 and rs2_val > 0 and rs1_val < rs2_val and imm_val < 0 , rs1_val == 128, rs2_val == 13835058055282163711
+// opcode: bltu, op1:x6; op2:x0; op1val:0x80; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x18, x6, x0, 0x80, 0x0, 0xa, 1b, x1, 40,0)
+
+inst_6:
+// rs1==x30, rs2==x31, rs2_val == 1, rs1_val == 18446744073575333887
+// opcode: bltu, op1:x30; op2:x31; op1val:0xfffffffff7ffffff; op2val:0x1; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x18, x30, x31, 0xfffffffff7ffffff, 0x1, 0x4, 1b, x1, 48,0)
+
+inst_7:
+// rs1==x8, rs2==x13, rs2_val == 2, rs1_val == 18446744073709551611
+// opcode: bltu, op1:x8; op2:x13; op1val:0xfffffffffffffffb; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x18, x8, x13, 0xfffffffffffffffb, 0x2, 0x6, 1b, x1, 56,0)
+
+inst_8:
+// rs1==x24, rs2==x21, rs2_val == 4, rs1_val == 281474976710656
+// opcode: bltu, op1:x24; op2:x21; op1val:0x1000000000000; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x18, x24, x21, 0x1000000000000, 0x4, 0x20, 3f, x1, 64,0)
+
+inst_9:
+// rs1==x21, rs2==x28, rs2_val == 8, rs1_val == 33554432
+// opcode: bltu, op1:x21; op2:x28; op1val:0x2000000; op2val:0x8; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x18, x21, x28, 0x2000000, 0x8, 0x6, 1b, x1, 72,0)
+
+inst_10:
+// rs1==x7, rs2==x10, rs2_val == 16, rs1_val == 18446744073709550591
+// opcode: bltu, op1:x7; op2:x10; op1val:0xfffffffffffffbff; op2val:0x10; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x18, x7, x10, 0xfffffffffffffbff, 0x10, 0x40, 3f, x1, 80,0)
+
+inst_11:
+// rs1==x12, rs2==x30, rs2_val == 32, rs1_val == 18446744073709551607
+// opcode: bltu, op1:x12; op2:x30; op1val:0xfffffffffffffff7; op2val:0x20; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x18, x12, x30, 0xfffffffffffffff7, 0x20, 0x2, 3f, x1, 88,0)
+
+inst_12:
+// rs1==x20, rs2==x27, rs2_val == 64, rs1_val == 18446744056529682431
+// opcode: bltu, op1:x20; op2:x27; op1val:0xfffffffbffffffff; op2val:0x40; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x18, x20, x27, 0xfffffffbffffffff, 0x40, 0x200, 3f, x1, 96,0)
+
+inst_13:
+// rs1==x19, rs2==x26, rs2_val == 128, rs1_val == 4294967296
+// opcode: bltu, op1:x19; op2:x26; op1val:0x100000000; op2val:0x80; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x18, x19, x26, 0x100000000, 0x80, 0x400, 3f, x1, 104,0)
+
+inst_14:
+// rs1==x17, rs2==x3, rs2_val == 256, rs1_val == 4
+// opcode: bltu, op1:x17; op2:x3; op1val:0x4; op2val:0x100; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x18, x17, x3, 0x4, 0x100, 0x4, 3f, x1, 112,0)
+
+inst_15:
+// rs1==x27, rs2==x29, rs2_val == 512,
+// opcode: bltu, op1:x27; op2:x29; op1val:0x13; op2val:0x200; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x18, x27, x29, 0x13, 0x200, 0x4, 1b, x1, 120,0)
+
+inst_16:
+// rs1==x15, rs2==x17, rs2_val == 1024, rs1_val == 256
+// opcode: bltu, op1:x15; op2:x17; op1val:0x100; op2val:0x400; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x18, x15, x17, 0x100, 0x400, 0x400, 3f, x1, 128,0)
+
+inst_17:
+// rs1==x28, rs2==x19, rs2_val == 2048, rs1_val == 18446744073709551599
+// opcode: bltu, op1:x28; op2:x19; op1val:0xffffffffffffffef; op2val:0x800; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x18, x28, x19, 0xffffffffffffffef, 0x800, 0x4, 3f, x1, 136,0)
+
+inst_18:
+// rs1==x16, rs2==x2, rs2_val == 4096, rs1_val == 576460752303423488
+// opcode: bltu, op1:x16; op2:x2; op1val:0x800000000000000; op2val:0x1000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x18, x16, x2, 0x800000000000000, 0x1000, 0x400, 3f, x1, 144,0)
+
+inst_19:
+// rs1==x26, rs2==x8, rs2_val == 8192, rs1_val == 9223372036854775807
+// opcode: bltu, op1:x26; op2:x8; op1val:0x7fffffffffffffff; op2val:0x2000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x18, x26, x8, 0x7fffffffffffffff, 0x2000, 0x2, 1b, x1, 152,0)
+
+inst_20:
+// rs1==x3, rs2==x12, rs2_val == 16384, rs1_val == 18446744071562067967
+// opcode: bltu, op1:x3; op2:x12; op1val:0xffffffff7fffffff; op2val:0x4000; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x18, x3, x12, 0xffffffff7fffffff, 0x4000, 0x4, 3f, x1, 160,0)
+
+inst_21:
+// rs1==x31, rs2==x16, rs2_val == 32768,
+// opcode: bltu, op1:x31; op2:x16; op1val:0x3333333333333332; op2val:0x8000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x18, x31, x16, 0x3333333333333332, 0x8000, 0x400, 3f, x1, 168,0)
+
+inst_22:
+// rs1==x5, rs2==x11, rs2_val == 65536,
+// opcode: bltu, op1:x5; op2:x11; op1val:0x4; op2val:0x10000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x18, x5, x11, 0x4, 0x10000, 0x400, 3f, x1, 176,0)
+
+inst_23:
+// rs1==x0, rs2==x6, rs2_val == 131072, rs1_val == 18446673704965373951
+// opcode: bltu, op1:x0; op2:x6; op1val:0x0; op2val:0x20000; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x18, x0, x6, 0x0, 0x20000, 0xa, 1b, x1, 184,0)
+
+inst_24:
+// rs1==x4, rs2==x14, rs2_val == 262144,
+// opcode: bltu, op1:x4; op2:x14; op1val:0x3333333333333332; op2val:0x40000; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x18, x4, x14, 0x3333333333333332, 0x40000, 0x200, 3f, x1, 192,0)
+
+inst_25:
+// rs1==x22, rs2==x18, rs2_val == 1048576, rs1_val == 2251799813685248
+// opcode: bltu, op1:x22; op2:x18; op1val:0x8000000000000; op2val:0x100000; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x22, x18, 0x8000000000000, 0x100000, 0x10, 3f, x1, 200,0)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_26:
+// rs1==x1, rs2==x5, rs2_val == 4194304, rs1_val == 13835058055282163711
+// opcode: bltu, op1:x1; op2:x5; op1val:0xbfffffffffffffff; op2val:0x400000; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x1, x5, 0xbfffffffffffffff, 0x400000, 0xa, 1b, x2, 0,0)
+
+inst_27:
+// rs1==x11, rs2==x25, rs2_val == 8388608,
+// opcode: bltu, op1:x11; op2:x25; op1val:0x4; op2val:0x800000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x11, x25, 0x4, 0x800000, 0x6, 1b, x2, 8,0)
+
+inst_28:
+// rs1==x14, rs2==x9, rs2_val == 16777216,
+// opcode: bltu, op1:x14; op2:x9; op1val:0x6666666666666665; op2val:0x1000000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x14, x9, 0x6666666666666665, 0x1000000, 0x2, 3f, x2, 16,0)
+
+inst_29:
+// rs1==x25, rs2==x20, rs2_val == 33554432, rs1_val == 18446744065119617023
+// opcode: bltu, op1:x25; op2:x20; op1val:0xfffffffdffffffff; op2val:0x2000000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x25, x20, 0xfffffffdffffffff, 0x2000000, 0x400, 1b, x2, 24,0)
+
+inst_30:
+// rs1==x18, rs2==x22, rs2_val == 67108864, rs1_val == 262144
+// opcode: bltu, op1:x18; op2:x22; op1val:0x40000; op2val:0x4000000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x18, x22, 0x40000, 0x4000000, 0x6, 3f, x2, 32,0)
+
+inst_31:
+// rs1==x10, rs2==x1, rs2_val == 134217728, rs1_val == 1
+// opcode: bltu, op1:x10; op2:x1; op1val:0x1; op2val:0x8000000; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x1, 0x1, 0x8000000, 0x0, 1b, x2, 40,0)
+
+inst_32:
+// rs2_val == 268435456,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffffffff7; op2val:0x10000000; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffffffff7, 0x10000000, 0x556, 1b, x2, 48,0)
+
+inst_33:
+// rs2_val == 536870912, rs1_val == 17179869184
+// opcode: bltu, op1:x10; op2:x11; op1val:0x400000000; op2val:0x20000000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x400000000, 0x20000000, 0x6, 3f, x2, 56,0)
+
+inst_34:
+// rs2_val == 1073741824, rs1_val == 18446744073701163007
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffff7fffff; op2val:0x40000000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffff7fffff, 0x40000000, 0x6, 3f, x2, 64,0)
+
+inst_35:
+// rs2_val == 2147483648,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x80000000; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x80000000, 0x20, 3f, x2, 72,0)
+
+inst_36:
+// rs2_val == 4294967296, rs1_val == 6148914691236517205, rs1_val==6148914691236517205 and rs2_val==4294967296
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x100000000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x100000000, 0x400, 3f, x2, 80,0)
+
+inst_37:
+// rs2_val == 8589934592, rs1_val == 18446744073675997183
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffdffffff; op2val:0x200000000; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffdffffff, 0x200000000, 0x0, 1b, x2, 88,0)
+
+inst_38:
+// rs2_val == 17179869184,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x400000000; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x400000000, 0x10, 3f, x2, 96,0)
+
+inst_39:
+// rs2_val == 34359738368, rs1_val == 18446603336221196287
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffff7fffffffffff; op2val:0x800000000; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffff7fffffffffff, 0x800000000, 0x8, 1b, x2, 104,0)
+
+inst_40:
+// rs2_val == 68719476736, rs1_val == 1152921504606846976
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1000000000000000; op2val:0x1000000000; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1000000000000000, 0x1000000000, 0x80, 3f, x2, 112,0)
+
+inst_41:
+// rs2_val == 137438953472,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffffffffff; op2val:0x2000000000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffffffffff, 0x2000000000, 0x6, 1b, x2, 120,0)
+
+inst_42:
+// rs2_val == 274877906944,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffffffffb; op2val:0x4000000000; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffffffffb, 0x4000000000, 0x20, 3f, x2, 128,0)
+
+inst_43:
+// rs2_val == 549755813888,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x9; op2val:0x8000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x9, 0x8000000000, 0x10, 3f, x2, 136,0)
+
+inst_44:
+// rs2_val == 1099511627776, rs1_val == 18446744073705357311
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffffbfffff; op2val:0x10000000000; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffffbfffff, 0x10000000000, 0x100, 3f, x2, 144,0)
+
+inst_45:
+// rs2_val == 2199023255552, rs1_val == 268435456
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000000; op2val:0x20000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x10000000, 0x20000000000, 0x4, 3f, x2, 152,0)
+
+inst_46:
+// rs2_val == 4398046511104,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x40000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x40000000000, 0x2, 3f, x2, 160,0)
+
+inst_47:
+// rs2_val == 8796093022208, rs1_val == 18446742974197923839
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffeffffffffff; op2val:0x80000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffeffffffffff, 0x80000000000, 0x2, 3f, x2, 168,0)
+
+inst_48:
+// rs2_val == 17592186044416,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xd; op2val:0x100000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xd, 0x100000000000, 0x10, 3f, x2, 176,0)
+
+inst_49:
+// rs2_val == 35184372088832, rs1_val == 64
+// opcode: bltu, op1:x10; op2:x11; op1val:0x40; op2val:0x200000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x40, 0x200000000000, 0x2, 3f, x2, 184,0)
+
+inst_50:
+// rs2_val == 70368744177664, rs1_val == 65536
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000; op2val:0x400000000000; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x10000, 0x400000000000, 0xa, 1b, x2, 192,0)
+
+inst_51:
+// rs2_val == 140737488355328,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x800000000000; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x800000000000, 0x100, 3f, x2, 200,0)
+
+inst_52:
+// rs2_val == 281474976710656, rs1_val == 131072
+// opcode: bltu, op1:x10; op2:x11; op1val:0x20000; op2val:0x1000000000000; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x20000, 0x1000000000000, 0x200, 3f, x2, 208,0)
+
+inst_53:
+// rs2_val == 562949953421312,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffbffffffff; op2val:0x2000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffbffffffff, 0x2000000000000, 0x6, 1b, x2, 216,0)
+
+inst_54:
+// rs2_val == 1125899906842624, rs1_val == 72057594037927936
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000000000; op2val:0x4000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000000000, 0x4000000000000, 0x4, 1b, x2, 224,0)
+
+inst_55:
+// rs2_val == 2251799813685248, rs1_val == 18446744073709551487
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffffffff7f; op2val:0x8000000000000; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffffffff7f, 0x8000000000000, 0x80, 3f, x2, 232,0)
+
+inst_56:
+// rs2_val == 4503599627370496,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x800000; op2val:0x10000000000000; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x800000, 0x10000000000000, 0x20, 3f, x2, 240,0)
+
+inst_57:
+// rs2_val == 9007199254740992, rs1_val == 524288
+// opcode: bltu, op1:x10; op2:x11; op1val:0x80000; op2val:0x20000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x80000, 0x20000000000000, 0x8, 1b, x2, 248,0)
+
+inst_58:
+// rs2_val == 18014398509481984,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x40000000000000; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x40000000000000, 0x200, 3f, x2, 256,0)
+
+inst_59:
+// rs2_val == 36028797018963968, rs1_val == 18446744073709547519
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffffffefff; op2val:0x80000000000000; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffffffefff, 0x80000000000000, 0x40, 3f, x2, 264,0)
+
+inst_60:
+// rs2_val == 72057594037927936, rs1_val == 18446462598732840959
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffeffffffffffff; op2val:0x100000000000000; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffeffffffffffff, 0x100000000000000, 0x20, 3f, x2, 272,0)
+
+inst_61:
+// rs2_val == 144115188075855872,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffffffffd; op2val:0x200000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffffffffd, 0x200000000000000, 0x4, 3f, x2, 280,0)
+
+inst_62:
+// rs2_val == 288230376151711744, rs1_val == 18014398509481984
+// opcode: bltu, op1:x10; op2:x11; op1val:0x40000000000000; op2val:0x400000000000000; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x40000000000000, 0x400000000000000, 0x200, 3f, x2, 288,0)
+
+inst_63:
+// rs2_val == 576460752303423488, rs1_val == 18446744073709518847
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffffff7fff; op2val:0x800000000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffffff7fff, 0x800000000000000, 0x10, 3f, x2, 296,0)
+
+inst_64:
+// rs2_val == 1152921504606846976,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x9; op2val:0x1000000000000000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x9, 0x1000000000000000, 0x6, 1b, x2, 304,0)
+
+inst_65:
+// rs2_val == 2305843009213693952,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2000000000000000; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x2000000000000000, 0x0, 3f, x2, 312,0)
+
+inst_66:
+// rs2_val == 4611686018427387904, rs1_val == 18446744073709420543
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffffdffff; op2val:0x4000000000000000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffffdffff, 0x4000000000000000, 0x400, 1b, x2, 320,0)
+
+inst_67:
+// rs2_val == 9223372036854775808,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x40000000000000; op2val:0x8000000000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x40000000000000, 0x8000000000000000, 0x10, 3f, x2, 328,0)
+
+inst_68:
+// rs2_val == 18446744073709551613,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffffffbff; op2val:0xfffffffffffffffd; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffffffbff, 0xfffffffffffffffd, 0x4, 1b, x2, 336,0)
+
+inst_69:
+// rs2_val == 18446744073709551611,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffdffffff; op2val:0xfffffffffffffffb; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffdffffff, 0xfffffffffffffffb, 0x0, 3f, x2, 344,0)
+
+inst_70:
+// rs2_val == 18446744073709551607, rs1_val == 18446744073709551359
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffffffeff; op2val:0xfffffffffffffff7; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffffffeff, 0xfffffffffffffff7, 0x2, 1b, x2, 352,0)
+
+inst_71:
+// rs2_val == 18446744073709551599,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x800000; op2val:0xffffffffffffffef; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x800000, 0xffffffffffffffef, 0x556, 1b, x2, 360,0)
+
+inst_72:
+// rs2_val == 18446744073709551583,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x80; op2val:0xffffffffffffffdf; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x80, 0xffffffffffffffdf, 0x10, 3f, x2, 368,0)
+
+inst_73:
+// rs2_val == 18446744073709551551, rs1_val == 2048
+// opcode: bltu, op1:x10; op2:x11; op1val:0x800; op2val:0xffffffffffffffbf; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x800, 0xffffffffffffffbf, 0x8, 1b, x2, 376,0)
+
+inst_74:
+// rs2_val == 18446744073709551487,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xffffffffffffff7f; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0xffffffffffffff7f, 0x20, 3f, x2, 384,0)
+
+inst_75:
+// rs2_val == 18446744073709551359,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffffffffe; op2val:0xfffffffffffffeff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffffffffe, 0xfffffffffffffeff, 0x400, 3f, x2, 392,0)
+
+inst_76:
+// rs2_val == 18446744073709551103, rs1_val == 18445618173802708991
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffbffffffffffff; op2val:0xfffffffffffffdff; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffbffffffffffff, 0xfffffffffffffdff, 0xa, 1b, x2, 400,0)
+
+inst_77:
+// rs2_val == 18446744073709550591,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xfffffffffffffbff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0xfffffffffffffbff, 0x400, 3f, x2, 408,0)
+
+inst_78:
+// rs2_val == 18446744073709549567, rs1_val == 2
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xfffffffffffff7ff; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0xfffffffffffff7ff, 0x556, 1b, x2, 416,0)
+
+inst_79:
+// rs2_val == 18446744073709547519, rs1_val == 18446744073441116159
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffefffffff; op2val:0xffffffffffffefff; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffefffffff, 0xffffffffffffefff, 0x556, 1b, x2, 424,0)
+
+inst_80:
+// rs2_val == 18446744073709535231, rs1_val == 18446744072635809791
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffbfffffff; op2val:0xffffffffffffbfff; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffbfffffff, 0xffffffffffffbfff, 0x8, 3f, x2, 432,0)
+
+inst_81:
+// rs2_val == 18446744073709518847, rs1_val == 1125899906842624
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4000000000000; op2val:0xffffffffffff7fff; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4000000000000, 0xffffffffffff7fff, 0x100, 3f, x2, 440,0)
+
+inst_82:
+// rs2_val == 18446744073709486079,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000000000; op2val:0xfffffffffffeffff; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000000000, 0xfffffffffffeffff, 0x8, 3f, x2, 448,0)
+
+inst_83:
+// rs2_val == 18446744073709420543,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xfffffffffffdffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0xfffffffffffdffff, 0x4, 3f, x2, 456,0)
+
+inst_84:
+// rs2_val == 18446744073709289471,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffbfffffffffff; op2val:0xfffffffffffbffff; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffbfffffffffff, 0xfffffffffffbffff, 0x6, 1b, x2, 464,0)
+
+inst_85:
+// rs2_val == 18446744073709027327, rs1_val == 18446744039349813247
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffff7ffffffff; op2val:0xfffffffffff7ffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffff7ffffffff, 0xfffffffffff7ffff, 0x2, 1b, x2, 472,0)
+
+inst_86:
+// rs2_val == 18446744073708503039, rs1_val == 16
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10; op2val:0xffffffffffefffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x10, 0xffffffffffefffff, 0x4, 1b, x2, 480,0)
+
+inst_87:
+// rs2_val == 18446744073707454463,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xffffffffffdfffff; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0xffffffffffdfffff, 0x40, 3f, x2, 488,0)
+
+inst_88:
+// rs2_val == 18446744073705357311, rs1_val == 18437736874454810623
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffdfffffffffffff; op2val:0xffffffffffbfffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffdfffffffffffff, 0xffffffffffbfffff, 0x4, 1b, x2, 496,0)
+
+inst_89:
+// rs2_val == 18446744073701163007,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xffffffffff7fffff; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0xffffffffff7fffff, 0xa, 1b, x2, 504,0)
+
+inst_90:
+// rs2_val == 18446744073692774399, rs1_val == 18446739675663040511
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffbffffffffff; op2val:0xfffffffffeffffff; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffbffffffffff, 0xfffffffffeffffff, 0x100, 3f, x2, 512,0)
+
+inst_91:
+// rs2_val == 18446744073675997183, rs1_val == 18446744073709289471
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffffbffff; op2val:0xfffffffffdffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffffbffff, 0xfffffffffdffffff, 0x6, 3f, x2, 520,0)
+
+inst_92:
+// rs2_val == 18446744073642442751,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xfffffffffbffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0xfffffffffbffffff, 0x2, 1b, x2, 528,0)
+
+inst_93:
+// rs2_val == 18446744073575333887,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xfffffffff7ffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0xfffffffff7ffffff, 0x4, 1b, x2, 536,0)
+
+inst_94:
+// rs2_val == 18446744073441116159, rs1_val == 1048576
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000; op2val:0xffffffffefffffff; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000, 0xffffffffefffffff, 0x80, 3f, x2, 544,0)
+
+inst_95:
+// rs2_val == 18446744073172680703,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xf; op2val:0xffffffffdfffffff; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xf, 0xffffffffdfffffff, 0x80, 3f, x2, 552,0)
+
+inst_96:
+// rs2_val == 18446744072635809791,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x9; op2val:0xffffffffbfffffff; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x9, 0xffffffffbfffffff, 0x556, 1b, x2, 560,0)
+
+inst_97:
+// rs2_val == 18446744071562067967,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffdfffffffffffff; op2val:0xffffffff7fffffff; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffdfffffffffffff, 0xffffffff7fffffff, 0x556, 1b, x2, 568,0)
+
+inst_98:
+// rs2_val == 18446744069414584319, rs1_val == 18446744073709535231
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffffffbfff; op2val:0xfffffffeffffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffffffbfff, 0xfffffffeffffffff, 0x6, 3f, x2, 576,0)
+
+inst_99:
+// rs2_val == 18446744065119617023,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1000000000000; op2val:0xfffffffdffffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1000000000000, 0xfffffffdffffffff, 0x8, 3f, x2, 584,0)
+
+inst_100:
+// rs2_val == 18446744056529682431, rs1_val == 18446744069414584319
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffeffffffff; op2val:0xfffffffbffffffff; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffeffffffff, 0xfffffffbffffffff, 0x10, 3f, x2, 592,0)
+
+inst_101:
+// rs2_val == 18446744039349813247,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xfffffff7ffffffff; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0xfffffff7ffffffff, 0x10, 3f, x2, 600,0)
+
+inst_102:
+// rs2_val == 18446744004990074879,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x800; op2val:0xffffffefffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x800, 0xffffffefffffffff, 0x2, 3f, x2, 608,0)
+
+inst_103:
+// rs2_val == 18446743936270598143, rs1_val == 32
+// opcode: bltu, op1:x10; op2:x11; op1val:0x20; op2val:0xffffffdfffffffff; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x20, 0xffffffdfffffffff, 0x100, 3f, x2, 616,0)
+
+inst_104:
+// rs2_val == 18446743798831644671, rs1_val == 18446735277616529407
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffff7ffffffffff; op2val:0xffffffbfffffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffff7ffffffffff, 0xffffffbfffffffff, 0x4, 3f, x2, 624,0)
+
+inst_105:
+// rs2_val == 18446743523953737727, rs1_val == 17870283321406128127
+// opcode: bltu, op1:x10; op2:x11; op1val:0xf7ffffffffffffff; op2val:0xffffff7fffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xf7ffffffffffffff, 0xffffff7fffffffff, 0x0, 1b, x2, 632,0)
+
+inst_106:
+// rs2_val == 18446742974197923839, rs1_val == 18446744073709027327
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffff7ffff; op2val:0xfffffeffffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffff7ffff, 0xfffffeffffffffff, 0x0, 1b, x2, 640,0)
+
+inst_107:
+// rs2_val == 18446741874686296063,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xfffffdffffffffff; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0xfffffdffffffffff, 0x40, 3f, x2, 648,0)
+
+inst_108:
+// rs2_val == 18446739675663040511, rs1_val == 35184372088832
+// opcode: bltu, op1:x10; op2:x11; op1val:0x200000000000; op2val:0xfffffbffffffffff; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x200000000000, 0xfffffbffffffffff, 0xa, 1b, x2, 656,0)
+
+inst_109:
+// rs2_val == 18446735277616529407,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xfffff7ffffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0xfffff7ffffffffff, 0x400, 1b, x2, 664,0)
+
+inst_110:
+// rs2_val == 18446726481523507199,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xffffefffffffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0xffffefffffffffff, 0x4, 1b, x2, 672,0)
+
+inst_111:
+// rs2_val == 18446708889337462783, rs1_val == 17293822569102704639
+// opcode: bltu, op1:x10; op2:x11; op1val:0xefffffffffffffff; op2val:0xffffdfffffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xefffffffffffffff, 0xffffdfffffffffff, 0x400, 1b, x2, 680,0)
+
+inst_112:
+// rs2_val == 18446673704965373951,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1000000000000; op2val:0xffffbfffffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1000000000000, 0xffffbfffffffffff, 0x2, 3f, x2, 688,0)
+
+inst_113:
+// rs2_val == 18446603336221196287, rs1_val == 137438953472
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2000000000; op2val:0xffff7fffffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2000000000, 0xffff7fffffffffff, 0x2, 3f, x2, 696,0)
+
+inst_114:
+// rs2_val == 18446462598732840959,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000; op2val:0xfffeffffffffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000, 0xfffeffffffffffff, 0x4, 1b, x2, 704,0)
+
+inst_115:
+// rs2_val == 18446181123756130303, rs1_val == 2305843009213693952
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2000000000000000; op2val:0xfffdffffffffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2000000000000000, 0xfffdffffffffffff, 0x4, 1b, x2, 712,0)
+
+inst_116:
+// rs2_val == 18445618173802708991,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffbffffffffff; op2val:0xfffbffffffffffff; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffbffffffffff, 0xfffbffffffffffff, 0x80, 3f, x2, 720,0)
+
+inst_117:
+// rs2_val == 18444492273895866367, rs1_val == 18158513697557839871
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfbffffffffffffff; op2val:0xfff7ffffffffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfbffffffffffffff, 0xfff7ffffffffffff, 0x8, 1b, x2, 728,0)
+
+inst_118:
+// rs2_val == 18442240474082181119, rs1_val == 18446744073709549567
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffffff7ff; op2val:0xffefffffffffffff; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffffff7ff, 0xffefffffffffffff, 0x556, 1b, x2, 736,0)
+
+inst_119:
+// rs2_val == 18437736874454810623, rs1_val == 4611686018427387904
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4000000000000000; op2val:0xffdfffffffffffff; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4000000000000000, 0xffdfffffffffffff, 0x100, 3f, x2, 744,0)
+
+inst_120:
+// rs2_val == 18428729675200069631,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffbffffffffffff; op2val:0xffbfffffffffffff; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffbffffffffffff, 0xffbfffffffffffff, 0x10, 3f, x2, 752,0)
+
+inst_121:
+// rs2_val == 18410715276690587647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffeffffffff; op2val:0xff7fffffffffffff; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffeffffffff, 0xff7fffffffffffff, 0x556, 1b, x2, 760,0)
+
+inst_122:
+// rs2_val == 18374686479671623679,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffffffbfff; op2val:0xfeffffffffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffffffbfff, 0xfeffffffffffffff, 0x400, 1b, x2, 768,0)
+
+inst_123:
+// rs2_val == 18302628885633695743,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x400000000; op2val:0xfdffffffffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x400000000, 0xfdffffffffffffff, 0x0, 3f, x2, 776,0)
+
+inst_124:
+// rs2_val == 18158513697557839871,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xfbffffffffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0xfbffffffffffffff, 0x0, 1b, x2, 784,0)
+
+inst_125:
+// rs2_val == 17870283321406128127,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xf7ffffffffffffff; op2val:0xf7ffffffffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xf7ffffffffffffff, 0xf7ffffffffffffff, 0x0, 3f, x2, 792,0)
+
+inst_126:
+// rs2_val == 17293822569102704639,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffffffefff; op2val:0xefffffffffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffffffefff, 0xefffffffffffffff, 0x400, 3f, x2, 800,0)
+
+inst_127:
+// rs2_val == 16140901064495857663,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff7fffffff; op2val:0xdfffffffffffffff; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff7fffffff, 0xdfffffffffffffff, 0x20, 3f, x2, 808,0)
+
+inst_128:
+// rs2_val == 9223372036854775807, rs1_val == 2199023255552
+// opcode: bltu, op1:x10; op2:x11; op1val:0x20000000000; op2val:0x7fffffffffffffff; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x20000000000, 0x7fffffffffffffff, 0x100, 3f, x2, 816,0)
+
+inst_129:
+// rs2_val == 6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffffffffb; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffffffffb, 0x5555555555555555, 0x0, 1b, x2, 824,0)
+
+inst_130:
+// rs2_val == 12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x40000; op2val:0xaaaaaaaaaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x40000, 0xaaaaaaaaaaaaaaaa, 0x4, 3f, x2, 832,0)
+
+inst_131:
+// rs1_val == 8,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x8; op2val:0x20000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x8, 0x20000000000, 0x2, 3f, x2, 840,0)
+
+inst_132:
+// rs1_val == 512,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x200; op2val:0x13; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x200, 0x13, 0x6, 3f, x2, 848,0)
+
+inst_133:
+// rs1_val == 1024,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x400; op2val:0xffffffffffffffbf; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x400, 0xffffffffffffffbf, 0x6, 1b, x2, 856,0)
+
+inst_134:
+// rs1_val == 4096,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1000; op2val:0xff7fffffffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1000, 0xff7fffffffffffff, 0x2, 3f, x2, 864,0)
+
+inst_135:
+// rs1_val == 8192,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2000; op2val:0xffefffffffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2000, 0xffefffffffffffff, 0x0, 1b, x2, 872,0)
+
+inst_136:
+// rs1_val == 16384,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4000; op2val:0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4000, 0x5555555555555556, 0x8, 3f, x2, 880,0)
+
+inst_137:
+// rs1_val == 32768,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x8000; op2val:0xffdfffffffffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x8000, 0xffdfffffffffffff, 0x8, 3f, x2, 888,0)
+
+inst_138:
+// rs1_val == 2097152,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x200000; op2val:0xfdffffffffffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x200000, 0xfdffffffffffffff, 0x8, 3f, x2, 896,0)
+
+inst_139:
+// rs1_val == 4194304,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x400000; op2val:0x200; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x400000, 0x200, 0x4, 3f, x2, 904,0)
+
+inst_140:
+// rs1_val == 16777216,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1000000; op2val:0x800000000; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1000000, 0x800000000, 0x80, 3f, x2, 912,0)
+
+inst_141:
+// rs1_val == 67108864,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4000000; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4000000, 0x4, 0x8, 3f, x2, 920,0)
+
+inst_142:
+// rs1_val == 134217728,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x8000000; op2val:0xbfffffffffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x8000000, 0xbfffffffffffffff, 0x400, 1b, x2, 928,0)
+
+inst_143:
+// rs1_val == 536870912,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x20000000; op2val:0xfffffffffffff7ff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x20000000, 0xfffffffffffff7ff, 0x4, 1b, x2, 936,0)
+
+inst_144:
+// rs1_val == 1073741824,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x40000000; op2val:0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x40000000, 0x5555555555555556, 0x556, 1b, x2, 944,0)
+
+inst_145:
+// rs1_val == 2147483648,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x80000000; op2val:0xa; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x80000000, 0xa, 0x4, 1b, x2, 952,0)
+
+inst_146:
+// rs1_val == 8589934592,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x200000000; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x200000000, 0x4, 0x20, 3f, x2, 960,0)
+
+inst_147:
+// rs1_val == 34359738368,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x800000000; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x800000000, 0x4, 0x80, 3f, x2, 968,0)
+
+inst_148:
+// rs1_val == 68719476736,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1000000000; op2val:0xffdfffffffffffff; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1000000000, 0xffdfffffffffffff, 0x556, 1b, x2, 976,0)
+
+inst_149:
+// rs1_val == 274877906944,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4000000000; op2val:0xffffffffffffffbf; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4000000000, 0xffffffffffffffbf, 0x8, 1b, x2, 984,0)
+
+inst_150:
+// rs1_val == 549755813888,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x8000000000; op2val:0xaaaaaaaaaaaaaaab; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x8000000000, 0xaaaaaaaaaaaaaaab, 0x8, 3f, x2, 992,0)
+
+inst_151:
+// rs1_val == 1099511627776,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000000000; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x10000000000, 0x6, 0x400, 1b, x2, 1000,0)
+
+inst_152:
+// rs1_val == 4398046511104,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x40000000000; op2val:0x2000000000000; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x40000000000, 0x2000000000000, 0x40, 3f, x2, 1008,0)
+
+inst_153:
+// rs1_val == 8796093022208,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x80000000000; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x80000000000, 0x0, 0x6, 1b, x2, 1016,0)
+
+inst_154:
+// rs1_val == 17592186044416,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000000; op2val:0xbfffffffffffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000000, 0xbfffffffffffffff, 0x4, 3f, x2, 1024,0)
+
+inst_155:
+// rs1_val == 70368744177664,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x400000000000; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x400000000000, 0x0, 0x400, 1b, x2, 1032,0)
+
+inst_156:
+// rs1_val == 140737488355328,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x800000000000; op2val:0x7; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x800000000000, 0x7, 0x10, 3f, x2, 1040,0)
+
+inst_157:
+// rs1_val == 562949953421312,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2000000000000; op2val:0x8000000000; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2000000000000, 0x8000000000, 0x0, 3f, x2, 1048,0)
+
+inst_158:
+// rs1_val == 4503599627370496,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x10000000000000; op2val:0xfffffffffffffdff; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x10000000000000, 0xfffffffffffffdff, 0xa, 1b, x2, 1056,0)
+
+inst_159:
+// rs1_val == 9007199254740992,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x20000000000000; op2val:0x40; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x20000000000000, 0x40, 0x80, 3f, x2, 1064,0)
+
+inst_160:
+// rs1_val == 36028797018963968,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x80000000000000; op2val:0x6666666666666665; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x80000000000000, 0x6666666666666665, 0x80, 3f, x2, 1072,0)
+
+inst_161:
+// rs1_val == 144115188075855872,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x200000000000000; op2val:0x6666666666666667; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x200000000000000, 0x6666666666666667, 0x80, 3f, x2, 1080,0)
+
+inst_162:
+// rs1_val == 288230376151711744,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x400000000000000; op2val:0x2000000000000; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x400000000000000, 0x2000000000000, 0xa, 1b, x2, 1088,0)
+
+inst_163:
+// rs1_val == 9223372036854775808,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x8000000000000000; op2val:0x80; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x8000000000000000, 0x80, 0x0, 3f, x2, 1096,0)
+
+inst_164:
+// rs1_val == 18446744073709551583,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffffffffdf; op2val:0xfffffffffdffffff; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffffffffdf, 0xfffffffffdffffff, 0x20, 3f, x2, 1104,0)
+
+inst_165:
+// rs1_val == 18446744073709551551,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffffffffbf; op2val:0xffffffffffffff7f; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffffffffbf, 0xffffffffffffff7f, 0x2, 1b, x2, 1112,0)
+
+inst_166:
+// rs1_val == 18446744073709551103,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffffffdff; op2val:0x200000000000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffffffdff, 0x200000000000, 0x6, 3f, x2, 1120,0)
+
+inst_167:
+// rs1_val == 18446744073709543423,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffffffdfff; op2val:0x1; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffffffdfff, 0x1, 0x0, 3f, x2, 1128,0)
+
+inst_168:
+// rs1_val == 18446744073709486079,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffffeffff; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffffeffff, 0x3, 0x0, 1b, x2, 1136,0)
+
+inst_169:
+// rs1_val == 18446744073708503039,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffffefffff; op2val:0x400000000; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffffefffff, 0x400000000, 0x4, 1b, x2, 1144,0)
+
+inst_170:
+// rs1_val == 18446744073707454463,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffffdfffff; op2val:0xfffffdffffffffff; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffffdfffff, 0xfffffdffffffffff, 0x40, 3f, x2, 1152,0)
+
+inst_171:
+// rs1_val == 18446744073692774399,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffeffffff; op2val:0xffffffffbfffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffeffffff, 0xffffffffbfffffff, 0x4, 1b, x2, 1160,0)
+
+inst_172:
+// rs1_val == 18446744073642442751,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffbffffff; op2val:0xffbfffffffffffff; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffbffffff, 0xffbfffffffffffff, 0x200, 3f, x2, 1168,0)
+
+inst_173:
+// rs1_val == 18446744073172680703,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffffdfffffff; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffffdfffffff, 0x5, 0x8, 1b, x2, 1176,0)
+
+inst_174:
+// rs1_val == 18446744004990074879,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffefffffffff; op2val:0xffffffdfffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffefffffffff, 0xffffffdfffffffff, 0x400, 3f, x2, 1184,0)
+
+inst_175:
+// rs1_val == 18446743936270598143,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffdfffffffff; op2val:0xfffffffffffffeff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffdfffffffff, 0xfffffffffffffeff, 0x0, 1b, x2, 1192,0)
+
+inst_176:
+// rs1_val == 18446743798831644671,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffbfffffffff; op2val:0x4000000000; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffbfffffffff, 0x4000000000, 0x556, 1b, x2, 1200,0)
+
+inst_177:
+// rs1_val == 18446741874686296063,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffdffffffffff; op2val:0xffffffffffffffdf; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffdffffffffff, 0xffffffffffffffdf, 0x2, 3f, x2, 1208,0)
+
+inst_178:
+// rs1_val == 18446726481523507199,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffefffffffffff; op2val:0xfdffffffffffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffefffffffffff, 0xfdffffffffffffff, 0x4, 3f, x2, 1216,0)
+
+inst_179:
+// rs1_val == 18446708889337462783,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffdfffffffffff; op2val:0xaaaaaaaaaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffdfffffffffff, 0xaaaaaaaaaaaaaaaa, 0x2, 3f, x2, 1224,0)
+
+inst_180:
+// rs1_val == 18446181123756130303,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffdffffffffffff; op2val:0x1000000; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffdffffffffffff, 0x1000000, 0x556, 1b, x2, 1232,0)
+
+inst_181:
+// rs1_val == 18444492273895866367,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfff7ffffffffffff; op2val:0xaaaaaaaaaaaaaaa9; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfff7ffffffffffff, 0xaaaaaaaaaaaaaaa9, 0x80, 3f, x2, 1240,0)
+
+inst_182:
+// rs1_val == 18442240474082181119,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffefffffffffffff; op2val:0xfffffdffffffffff; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffefffffffffffff, 0xfffffdffffffffff, 0x200, 3f, x2, 1248,0)
+
+inst_183:
+// rs1_val == 18428729675200069631,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffbfffffffffffff; op2val:0x100000000000; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffbfffffffffffff, 0x100000000000, 0x100, 3f, x2, 1256,0)
+
+inst_184:
+// rs1_val == 18410715276690587647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xff7fffffffffffff; op2val:0xfffffbffffffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xff7fffffffffffff, 0xfffffbffffffffff, 0x4, 3f, x2, 1264,0)
+
+inst_185:
+// rs1_val == 18374686479671623679,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfeffffffffffffff; op2val:0xfffffdffffffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfeffffffffffffff, 0xfffffdffffffffff, 0x8, 3f, x2, 1272,0)
+
+inst_186:
+// rs1_val == 18302628885633695743,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfdffffffffffffff; op2val:0xffffffffffffbfff; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfdffffffffffffff, 0xffffffffffffbfff, 0x200, 3f, x2, 1280,0)
+
+inst_187:
+// rs1_val == 16140901064495857663,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xdfffffffffffffff; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xdfffffffffffffff, 0x5, 0x4, 1b, x2, 1288,0)
+
+inst_188:
+// rs1_val == 12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xfdffffffffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xfdffffffffffffff, 0x2, 3f, x2, 1296,0)
+
+inst_189:
+// rs1_val==3 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x3, 0x2, 1b, x2, 1304,0)
+
+inst_190:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x5555555555555555, 0x8, 3f, x2, 1312,0)
+
+inst_191:
+// rs1_val==3 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xaaaaaaaaaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0xaaaaaaaaaaaaaaaa, 0x4, 3f, x2, 1320,0)
+
+inst_192:
+// rs1_val==3 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x5, 0x400, 3f, x2, 1328,0)
+
+inst_193:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x3333333333333333, 0x4, 1b, x2, 1336,0)
+
+inst_194:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x6666666666666666, 0x4, 1b, x2, 1344,0)
+
+inst_195:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f333; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0xb504f333, 0xa, 1b, x2, 1352,0)
+
+inst_196:
+// rs1_val==3 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x0, 0x2, 1b, x2, 1360,0)
+
+inst_197:
+// rs1_val==3 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x100000000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x100000000, 0x2, 1b, x2, 1368,0)
+
+inst_198:
+// rs1_val==3 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x2, 0x100, 3f, x2, 1376,0)
+
+inst_199:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555554; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x5555555555555554, 0x8, 3f, x2, 1384,0)
+
+inst_200:
+// rs1_val==3 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xaaaaaaaaaaaaaaa9; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0xaaaaaaaaaaaaaaa9, 0x8, 1b, x2, 1392,0)
+
+inst_201:
+// rs1_val==3 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x4, 0x6, 3f, x2, 1400,0)
+
+inst_202:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x3333333333333332, 0x6, 3f, x2, 1408,0)
+
+inst_203:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x6666666666666665, 0x400, 1b, x2, 1416,0)
+
+inst_204:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0xb504f332, 0x400, 1b, x2, 1424,0)
+
+inst_205:
+// rs1_val==3 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xffffffff; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0xffffffff, 0x556, 1b, x2, 1432,0)
+
+inst_206:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x5555555555555556, 0x6, 1b, x2, 1440,0)
+
+inst_207:
+// rs1_val==3 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xaaaaaaaaaaaaaaab; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0xaaaaaaaaaaaaaaab, 0x80, 3f, x2, 1448,0)
+
+inst_208:
+// rs1_val==3 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x6, 0x4, 1b, x2, 1456,0)
+
+inst_209:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333334; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x3333333333333334, 0x0, 1b, x2, 1464,0)
+
+inst_210:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x6666666666666667, 0x8, 3f, x2, 1472,0)
+
+inst_211:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0xb504f334, 0x6, 1b, x2, 1480,0)
+
+inst_212:
+// rs1_val==3 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x1; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x1, 0x100, 3f, x2, 1488,0)
+
+inst_213:
+// rs1_val==3 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3; op2val:0x100000001; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3, 0x100000001, 0x4, 1b, x2, 1496,0)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x3, 0x0, 3f, x2, 1504,0)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555555; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x5555555555555555, 0xa, 1b, x2, 1512,0)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xaaaaaaaaaaaaaaaa; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0xaaaaaaaaaaaaaaaa, 0x400, 1b, x2, 1520,0)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x5, 0x0, 1b, x2, 1528,0)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333333; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x3333333333333333, 0x80, 3f, x2, 1536,0)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x6666666666666666, 0x6, 1b, x2, 1544,0)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0xb504f333, 0x0, 1b, x2, 1552,0)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x0, 0x2, 1b, x2, 1560,0)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x2, 0x4, 1b, x2, 1568,0)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555554; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x5555555555555554, 0x40, 3f, x2, 1576,0)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xaaaaaaaaaaaaaaa9; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0xaaaaaaaaaaaaaaa9, 0x6, 1b, x2, 1584,0)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x4, 0x0, 3f, x2, 1592,0)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x3333333333333332, 0x2, 3f, x2, 1600,0)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x6666666666666665, 0x400, 1b, x2, 1608,0)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0xb504f332, 0x4, 3f, x2, 1616,0)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xffffffff; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0xffffffff, 0x20, 3f, x2, 1624,0)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x5555555555555556, 0x4, 1b, x2, 1632,0)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xaaaaaaaaaaaaaaab; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0xaaaaaaaaaaaaaaab, 0x8, 3f, x2, 1640,0)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x6, 0x6, 1b, x2, 1648,0)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x3333333333333334, 0x4, 1b, x2, 1656,0)
+
+inst_234:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x6666666666666667, 0x6, 1b, x2, 1664,0)
+
+inst_235:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f334; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0xb504f334, 0x40, 3f, x2, 1672,0)
+
+inst_236:
+// rs1_val==6148914691236517205 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x1; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x1, 0x0, 3f, x2, 1680,0)
+
+inst_237:
+// rs1_val==6148914691236517205 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x100000001; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555555, 0x100000001, 0x0, 1b, x2, 1688,0)
+
+inst_238:
+// rs1_val==12297829382473034410 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x3; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x3, 0x100, 3f, x2, 1696,0)
+
+inst_239:
+// rs1_val==12297829382473034410 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555555, 0x556, 1b, x2, 1704,0)
+
+inst_240:
+// rs1_val==12297829382473034410 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xaaaaaaaaaaaaaaaa; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xaaaaaaaaaaaaaaaa, 0xa, 1b, x2, 1712,0)
+
+inst_241:
+// rs1_val==12297829382473034410 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5, 0x10, 3f, x2, 1720,0)
+
+inst_242:
+// rs1_val==12297829382473034410 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x3333333333333333, 0x4, 3f, x2, 1728,0)
+
+inst_243:
+// rs1_val==12297829382473034410 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x6666666666666666; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x6666666666666666, 0x400, 3f, x2, 1736,0)
+
+inst_244:
+// rs1_val==12297829382473034410 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xb504f333, 0x0, 3f, x2, 1744,0)
+
+inst_245:
+// rs1_val==12297829382473034410 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x0, 0x556, 1b, x2, 1752,0)
+
+inst_246:
+// rs1_val==12297829382473034410 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x100000000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x100000000, 0x6, 3f, x2, 1760,0)
+
+inst_247:
+// rs1_val==12297829382473034410 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x2, 0x400, 1b, x2, 1768,0)
+
+inst_248:
+// rs1_val==12297829382473034410 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555554, 0x2, 1b, x2, 1776,0)
+
+inst_249:
+// rs1_val==12297829382473034410 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xaaaaaaaaaaaaaaa9; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xaaaaaaaaaaaaaaa9, 0x4, 3f, x2, 1784,0)
+
+inst_250:
+// rs1_val==12297829382473034410 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x4, 0x2, 1b, x2, 1792,0)
+
+inst_251:
+// rs1_val==12297829382473034410 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x3333333333333332; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x3333333333333332, 0x4, 1b, x2, 1800,0)
+
+inst_252:
+// rs1_val==12297829382473034410 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x6666666666666665; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x6666666666666665, 0x200, 3f, x2, 1808,0)
+
+inst_253:
+// rs1_val==12297829382473034410 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xb504f332, 0x10, 3f, x2, 1816,0)
+
+inst_254:
+// rs1_val==12297829382473034410 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xffffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xffffffff, 0x4, 3f, x2, 1824,0)
+
+inst_255:
+// rs1_val==12297829382473034410 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555556, 0x400, 1b, x2, 1832,0)
+
+inst_256:
+// rs1_val==12297829382473034410 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xaaaaaaaaaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xaaaaaaaaaaaaaaab, 0x2, 1b, x2, 1840,0)
+
+inst_257:
+// rs1_val==12297829382473034410 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x6; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x6, 0x556, 1b, x2, 1848,0)
+
+inst_258:
+// rs1_val==12297829382473034410 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x3333333333333334; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x3333333333333334, 0x200, 3f, x2, 1856,0)
+
+inst_259:
+// rs1_val==12297829382473034410 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x6666666666666667; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x6666666666666667, 0x556, 1b, x2, 1864,0)
+
+inst_260:
+// rs1_val==12297829382473034410 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0xb504f334, 0x400, 3f, x2, 1872,0)
+
+inst_261:
+// rs1_val==12297829382473034410 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x1, 0x8, 1b, x2, 1880,0)
+
+inst_262:
+// rs1_val==12297829382473034410 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x100000001; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x100000001, 0x100, 3f, x2, 1888,0)
+
+inst_263:
+// rs1_val==5 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x3, 0x0, 3f, x2, 1896,0)
+
+inst_264:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x5555555555555555, 0x2, 3f, x2, 1904,0)
+
+inst_265:
+// rs1_val==5 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xaaaaaaaaaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0xaaaaaaaaaaaaaaaa, 0x2, 3f, x2, 1912,0)
+
+inst_266:
+// rs1_val==5 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x5, 0x0, 3f, x2, 1920,0)
+
+inst_267:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x3333333333333333, 0x4, 1b, x2, 1928,0)
+
+inst_268:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666666; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x6666666666666666, 0x100, 3f, x2, 1936,0)
+
+inst_269:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0xb504f333, 0x6, 1b, x2, 1944,0)
+
+inst_270:
+// rs1_val==5 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x0, 0x4, 1b, x2, 1952,0)
+
+inst_271:
+// rs1_val==5 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x100000000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x100000000, 0x6, 3f, x2, 1960,0)
+
+inst_272:
+// rs1_val==5 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x2; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x2, 0x20, 3f, x2, 1968,0)
+
+inst_273:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x5555555555555554, 0x2, 1b, x2, 1976,0)
+
+inst_274:
+// rs1_val==5 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xaaaaaaaaaaaaaaa9; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0xaaaaaaaaaaaaaaa9, 0x0, 3f, x2, 1984,0)
+
+inst_275:
+// rs1_val==5 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x4, 0x2, 3f, x2, 1992,0)
+
+inst_276:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x3333333333333332, 0x8, 3f, x2, 2000,0)
+
+inst_277:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666665; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x6666666666666665, 0x200, 3f, x2, 2008,0)
+
+inst_278:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0xb504f332, 0x0, 1b, x2, 2016,0)
+
+inst_279:
+// rs1_val==5 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0xffffffff, 0x0, 1b, x2, 2024,0)
+
+inst_280:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x5555555555555556, 0x100, 3f, x2, 2032,0)
+
+inst_281:
+// rs1_val==5 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xaaaaaaaaaaaaaaab; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0xaaaaaaaaaaaaaaab, 0x100, 3f, x2, 2040,0)
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_282:
+// rs1_val==5 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x6, 0x80, 3f, x2, 0,0)
+
+inst_283:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333334; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x3333333333333334, 0x200, 3f, x2, 8,0)
+
+inst_284:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666667; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x6666666666666667, 0x80, 3f, x2, 16,0)
+
+inst_285:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0xb504f334, 0x0, 1b, x2, 24,0)
+
+inst_286:
+// rs1_val==5 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x1; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x1, 0x6, 3f, x2, 32,0)
+
+inst_287:
+// rs1_val==5 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5; op2val:0x100000001; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5, 0x100000001, 0x2, 3f, x2, 40,0)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x3, 0x400, 3f, x2, 48,0)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x5555555555555555, 0x400, 1b, x2, 56,0)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xaaaaaaaaaaaaaaaa; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0xaaaaaaaaaaaaaaaa, 0x40, 3f, x2, 64,0)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x5, 0xa, 1b, x2, 72,0)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333333; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x40, 3f, x2, 80,0)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666666; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x6666666666666666, 0x8, 3f, x2, 88,0)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0xb504f333, 0x0, 3f, x2, 96,0)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x0, 0x4, 3f, x2, 104,0)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x100000000; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x100000000, 0x4, 1b, x2, 112,0)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x2, 0x556, 1b, x2, 120,0)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x5555555555555554, 0x0, 3f, x2, 128,0)
+
+inst_299:
+// rs1_val==3689348814741910323 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xaaaaaaaaaaaaaaa9; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0xaaaaaaaaaaaaaaa9, 0x400, 1b, x2, 136,0)
+
+inst_300:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x4, 0x2, 1b, x2, 144,0)
+
+inst_301:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333332; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x3333333333333332, 0x10, 3f, x2, 152,0)
+
+inst_302:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x6666666666666665, 0x400, 3f, x2, 160,0)
+
+inst_303:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0xb504f332, 0x2, 3f, x2, 168,0)
+
+inst_304:
+// rs1_val==3689348814741910323 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0xffffffff, 0x2, 1b, x2, 176,0)
+
+inst_305:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x5555555555555556, 0x2, 1b, x2, 184,0)
+
+inst_306:
+// rs1_val==3689348814741910323 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xaaaaaaaaaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0xaaaaaaaaaaaaaaab, 0x2, 1b, x2, 192,0)
+
+inst_307:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x6, 0x200, 3f, x2, 200,0)
+
+inst_308:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x3333333333333334, 0x2, 1b, x2, 208,0)
+
+inst_309:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666667; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x6666666666666667, 0x556, 1b, x2, 216,0)
+
+inst_310:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0xb504f334, 0x6, 3f, x2, 224,0)
+
+inst_311:
+// rs1_val==3689348814741910323 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x1; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x1, 0x40, 3f, x2, 232,0)
+
+inst_312:
+// rs1_val==3689348814741910323 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x100000001; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333333, 0x100000001, 0x40, 3f, x2, 240,0)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x3, 0xa, 1b, x2, 248,0)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x5555555555555555, 0x6, 1b, x2, 256,0)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xaaaaaaaaaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0xaaaaaaaaaaaaaaaa, 0x4, 1b, x2, 264,0)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x5, 0x6, 1b, x2, 272,0)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x3333333333333333, 0x6, 1b, x2, 280,0)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666666; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x400, 1b, x2, 288,0)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0xb504f333, 0x0, 1b, x2, 296,0)
+
+inst_320:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x0, 0x40, 3f, x2, 304,0)
+
+inst_321:
+// rs1_val==7378697629483820646 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x100000000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x100000000, 0x2, 1b, x2, 312,0)
+
+inst_322:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x2, 0x2, 3f, x2, 320,0)
+
+inst_323:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555554; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x5555555555555554, 0xa, 1b, x2, 328,0)
+
+inst_324:
+// rs1_val==7378697629483820646 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xaaaaaaaaaaaaaaa9; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0xaaaaaaaaaaaaaaa9, 0x2, 1b, x2, 336,0)
+
+inst_325:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x4, 0x80, 3f, x2, 344,0)
+
+inst_326:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x3333333333333332, 0x400, 3f, x2, 352,0)
+
+inst_327:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x6666666666666665, 0x400, 1b, x2, 360,0)
+
+inst_328:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0xb504f332, 0x4, 1b, x2, 368,0)
+
+inst_329:
+// rs1_val==7378697629483820646 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xffffffff; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0xffffffff, 0xa, 1b, x2, 376,0)
+
+inst_330:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555556; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x5555555555555556, 0xa, 1b, x2, 384,0)
+
+inst_331:
+// rs1_val==7378697629483820646 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xaaaaaaaaaaaaaaab; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0xaaaaaaaaaaaaaaab, 0x10, 3f, x2, 392,0)
+
+inst_332:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x6, 0x2, 1b, x2, 400,0)
+
+inst_333:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333334; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x3333333333333334, 0x6, 3f, x2, 408,0)
+
+inst_334:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666667; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x6666666666666667, 0xa, 1b, x2, 416,0)
+
+inst_335:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0xb504f334, 0x0, 1b, x2, 424,0)
+
+inst_336:
+// rs1_val==7378697629483820646 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x1; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x1, 0x20, 3f, x2, 432,0)
+
+inst_337:
+// rs1_val==7378697629483820646 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x100000001; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666666, 0x100000001, 0x4, 3f, x2, 440,0)
+
+inst_338:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x3, 0x556, 1b, x2, 448,0)
+
+inst_339:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x5555555555555555, 0x6, 1b, x2, 456,0)
+
+inst_340:
+// rs1_val==3037000499 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xaaaaaaaaaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0xaaaaaaaaaaaaaaaa, 0x0, 1b, x2, 464,0)
+
+inst_341:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x5, 0x556, 1b, x2, 472,0)
+
+inst_342:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333333; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x3333333333333333, 0x8, 3f, x2, 480,0)
+
+inst_343:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x6666666666666666, 0x4, 1b, x2, 488,0)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0xb504f333, 0x0, 1b, x2, 496,0)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x0, 0x10, 3f, x2, 504,0)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x100000000; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x100000000, 0x8, 3f, x2, 512,0)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x2, 0x4, 3f, x2, 520,0)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555554; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x5555555555555554, 0x80, 3f, x2, 528,0)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xaaaaaaaaaaaaaaa9; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0xaaaaaaaaaaaaaaa9, 0x4, 1b, x2, 536,0)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x4, 0x20, 3f, x2, 544,0)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333332; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x3333333333333332, 0x40, 3f, x2, 552,0)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666665; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x6666666666666665, 0x556, 1b, x2, 560,0)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f332; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0xb504f332, 0xa, 1b, x2, 568,0)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xffffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0xffffffff, 0x6, 3f, x2, 576,0)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x5555555555555556, 0x0, 1b, x2, 584,0)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xaaaaaaaaaaaaaaab; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0xaaaaaaaaaaaaaaab, 0x400, 3f, x2, 592,0)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x6, 0x400, 1b, x2, 600,0)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333334; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x3333333333333334, 0x6, 3f, x2, 608,0)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x6666666666666667, 0x0, 3f, x2, 616,0)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0xb504f334, 0x0, 1b, x2, 624,0)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x1, 0x8, 3f, x2, 632,0)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x100000001; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f333, 0x100000001, 0x556, 1b, x2, 640,0)
+
+inst_363:
+// rs1_val==0 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x3, 0x2, 3f, x2, 648,0)
+
+inst_364:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x5555555555555555, 0x100, 3f, x2, 656,0)
+
+inst_365:
+// rs1_val==0 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xaaaaaaaaaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x2, 1b, x2, 664,0)
+
+inst_366:
+// rs1_val==0 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x5, 0x8, 1b, x2, 672,0)
+
+inst_367:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x3333333333333333, 0x0, 3f, x2, 680,0)
+
+inst_368:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666666; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x6666666666666666, 0x40, 3f, x2, 688,0)
+
+inst_369:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0xb504f333, 0x8, 3f, x2, 696,0)
+
+inst_370:
+// rs1_val==0 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x0, 0x8, 1b, x2, 704,0)
+
+inst_371:
+// rs1_val==0 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x100000000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x100000000, 0x2, 1b, x2, 712,0)
+
+inst_372:
+// rs1_val==0 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x2, 0x0, 1b, x2, 720,0)
+
+inst_373:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555554; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x5555555555555554, 0x556, 1b, x2, 728,0)
+
+inst_374:
+// rs1_val==0 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xaaaaaaaaaaaaaaa9; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x400, 3f, x2, 736,0)
+
+inst_375:
+// rs1_val==0 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x4, 0xa, 1b, x2, 744,0)
+
+inst_376:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x3333333333333332, 0x6, 3f, x2, 752,0)
+
+inst_377:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x6666666666666665, 0x6, 1b, x2, 760,0)
+
+inst_378:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0xb504f332, 0x0, 1b, x2, 768,0)
+
+inst_379:
+// rs1_val==0 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xffffffff; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0xffffffff, 0x100, 3f, x2, 776,0)
+
+inst_380:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x5555555555555556, 0x400, 1b, x2, 784,0)
+
+inst_381:
+// rs1_val==0 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xaaaaaaaaaaaaaaab; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0xa, 1b, x2, 792,0)
+
+inst_382:
+// rs1_val==0 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x6, 0x6, 1b, x2, 800,0)
+
+inst_383:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333334; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x3333333333333334, 0x6, 1b, x2, 808,0)
+
+inst_384:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x6666666666666667, 0x8, 1b, x2, 816,0)
+
+inst_385:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f334; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0xb504f334, 0x40, 3f, x2, 824,0)
+
+inst_386:
+// rs1_val==0 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x1; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x1, 0x2, 1b, x2, 832,0)
+
+inst_387:
+// rs1_val==0 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x0; op2val:0x100000001; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x0, 0x100000001, 0x4, 1b, x2, 840,0)
+
+inst_388:
+// rs1_val==4294967296 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x3, 0x20, 3f, x2, 848,0)
+
+inst_389:
+// rs1_val==4294967296 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x5555555555555555, 0x0, 3f, x2, 856,0)
+
+inst_390:
+// rs1_val==4294967296 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xaaaaaaaaaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0xaaaaaaaaaaaaaaaa, 0x4, 3f, x2, 864,0)
+
+inst_391:
+// rs1_val==4294967296 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x5, 0x0, 3f, x2, 872,0)
+
+inst_392:
+// rs1_val==4294967296 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x3333333333333333, 0x4, 3f, x2, 880,0)
+
+inst_393:
+// rs1_val==4294967296 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x6666666666666666, 0x4, 3f, x2, 888,0)
+
+inst_394:
+// rs1_val==4294967296 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0xb504f333, 0x2, 1b, x2, 896,0)
+
+inst_395:
+// rs1_val==4294967296 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x0, 0x6, 3f, x2, 904,0)
+
+inst_396:
+// rs1_val==4294967296 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x100000000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x100000000, 0x400, 1b, x2, 912,0)
+
+inst_397:
+// rs1_val==4294967296 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x2; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x2, 0x80, 3f, x2, 920,0)
+
+inst_398:
+// rs1_val==4294967296 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x5555555555555554, 0x0, 3f, x2, 928,0)
+
+inst_399:
+// rs1_val==4294967296 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xaaaaaaaaaaaaaaa9; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0xaaaaaaaaaaaaaaa9, 0x40, 3f, x2, 936,0)
+
+inst_400:
+// rs1_val==4294967296 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x4, 0x0, 3f, x2, 944,0)
+
+inst_401:
+// rs1_val==4294967296 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x3333333333333332; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x3333333333333332, 0x20, 3f, x2, 952,0)
+
+inst_402:
+// rs1_val==4294967296 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x6666666666666665; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x6666666666666665, 0x8, 3f, x2, 960,0)
+
+inst_403:
+// rs1_val==4294967296 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0xb504f332, 0x0, 1b, x2, 968,0)
+
+inst_404:
+// rs1_val==4294967296 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0xffffffff, 0x2, 3f, x2, 976,0)
+
+inst_405:
+// rs1_val==4294967296 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x5555555555555556, 0x6, 3f, x2, 984,0)
+
+inst_406:
+// rs1_val==4294967296 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xaaaaaaaaaaaaaaab; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0xaaaaaaaaaaaaaaab, 0x10, 3f, x2, 992,0)
+
+inst_407:
+// rs1_val==4294967296 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x6, 0x6, 3f, x2, 1000,0)
+
+inst_408:
+// rs1_val==4294967296 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x3333333333333334; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x3333333333333334, 0x0, 3f, x2, 1008,0)
+
+inst_409:
+// rs1_val==4294967296 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x6666666666666667, 0x6, 1b, x2, 1016,0)
+
+inst_410:
+// rs1_val==4294967296 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0xb504f334; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0xb504f334, 0x10, 3f, x2, 1024,0)
+
+inst_411:
+// rs1_val==4294967296 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x1; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x1, 0x0, 3f, x2, 1032,0)
+
+inst_412:
+// rs1_val==4294967296 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000000; op2val:0x100000001; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000000, 0x100000001, 0x200, 3f, x2, 1040,0)
+
+inst_413:
+// rs1_val==2 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x3; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x3, 0x556, 1b, x2, 1048,0)
+
+inst_414:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x5555555555555555, 0x8, 3f, x2, 1056,0)
+
+inst_415:
+// rs1_val==2 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xaaaaaaaaaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0xaaaaaaaaaaaaaaaa, 0x4, 3f, x2, 1064,0)
+
+inst_416:
+// rs1_val==2 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x5, 0x8, 3f, x2, 1072,0)
+
+inst_417:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x3333333333333333, 0x0, 3f, x2, 1080,0)
+
+inst_418:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x6666666666666666, 0x6, 1b, x2, 1088,0)
+
+inst_419:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0xb504f333, 0x4, 3f, x2, 1096,0)
+
+inst_420:
+// rs1_val==2 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x0, 0x8, 1b, x2, 1104,0)
+
+inst_421:
+// rs1_val==2 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x100000000; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x100000000, 0x2, 1b, x2, 1112,0)
+
+inst_422:
+// rs1_val==2 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x2, 0x0, 1b, x2, 1120,0)
+
+inst_423:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555554; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x5555555555555554, 0x80, 3f, x2, 1128,0)
+
+inst_424:
+// rs1_val==2 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xaaaaaaaaaaaaaaa9; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0xaaaaaaaaaaaaaaa9, 0x200, 3f, x2, 1136,0)
+
+inst_425:
+// rs1_val==2 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x4; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x4, 0x100, 3f, x2, 1144,0)
+
+inst_426:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333332; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x3333333333333332, 0x4, 3f, x2, 1152,0)
+
+inst_427:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666665; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x6666666666666665, 0x40, 3f, x2, 1160,0)
+
+inst_428:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0xb504f332, 0x400, 3f, x2, 1168,0)
+
+inst_429:
+// rs1_val==2 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xffffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0xffffffff, 0x6, 1b, x2, 1176,0)
+
+inst_430:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x5555555555555556, 0x80, 3f, x2, 1184,0)
+
+inst_431:
+// rs1_val==2 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xaaaaaaaaaaaaaaab; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0xaaaaaaaaaaaaaaab, 0x80, 3f, x2, 1192,0)
+
+inst_432:
+// rs1_val==2 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x6, 0x100, 3f, x2, 1200,0)
+
+inst_433:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x3333333333333334, 0x8, 1b, x2, 1208,0)
+
+inst_434:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x6666666666666667, 0x0, 1b, x2, 1216,0)
+
+inst_435:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f334; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0xb504f334, 0x40, 3f, x2, 1224,0)
+
+inst_436:
+// rs1_val==2 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x1; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x1, 0x2, 3f, x2, 1232,0)
+
+inst_437:
+// rs1_val==2 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x2; op2val:0x100000001; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x2, 0x100000001, 0x4, 3f, x2, 1240,0)
+
+inst_438:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x3, 0xa, 1b, x2, 1248,0)
+
+inst_439:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x5555555555555555, 0x400, 1b, x2, 1256,0)
+
+inst_440:
+// rs1_val==6148914691236517204 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xaaaaaaaaaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0xaaaaaaaaaaaaaaaa, 0x0, 1b, x2, 1264,0)
+
+inst_441:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x5, 0x0, 1b, x2, 1272,0)
+
+inst_442:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x3333333333333333, 0x400, 3f, x2, 1280,0)
+
+inst_443:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x6666666666666666, 0x6, 3f, x2, 1288,0)
+
+inst_444:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0xb504f333, 0x400, 1b, x2, 1296,0)
+
+inst_445:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x0, 0x8, 1b, x2, 1304,0)
+
+inst_446:
+// rs1_val==6148914691236517204 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x100000000; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x100000000, 0x10, 3f, x2, 1312,0)
+
+inst_447:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x2, 0x8, 3f, x2, 1320,0)
+
+inst_448:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555554; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x80, 3f, x2, 1328,0)
+
+inst_449:
+// rs1_val==6148914691236517204 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xaaaaaaaaaaaaaaa9; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0xaaaaaaaaaaaaaaa9, 0x80, 3f, x2, 1336,0)
+
+inst_450:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x4, 0x80, 3f, x2, 1344,0)
+
+inst_451:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x3333333333333332, 0x0, 3f, x2, 1352,0)
+
+inst_452:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666665; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x6666666666666665, 0x20, 3f, x2, 1360,0)
+
+inst_453:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0xb504f332, 0x400, 1b, x2, 1368,0)
+
+inst_454:
+// rs1_val==6148914691236517204 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xffffffff; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0xffffffff, 0x100, 3f, x2, 1376,0)
+
+inst_455:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x40, 3f, x2, 1384,0)
+
+inst_456:
+// rs1_val==6148914691236517204 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xaaaaaaaaaaaaaaab; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0xaaaaaaaaaaaaaaab, 0xa, 1b, x2, 1392,0)
+
+inst_457:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x6, 0x400, 1b, x2, 1400,0)
+
+inst_458:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333334; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x3333333333333334, 0x40, 3f, x2, 1408,0)
+
+inst_459:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x6666666666666667, 0x6, 1b, x2, 1416,0)
+
+inst_460:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f334; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0xb504f334, 0x2, 3f, x2, 1424,0)
+
+inst_461:
+// rs1_val==6148914691236517204 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x1; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x1, 0x2, 1b, x2, 1432,0)
+
+inst_462:
+// rs1_val==6148914691236517204 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x100000001; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555554, 0x100000001, 0x80, 3f, x2, 1440,0)
+
+inst_463:
+// rs1_val==12297829382473034409 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x3, 0xa, 1b, x2, 1448,0)
+
+inst_464:
+// rs1_val==12297829382473034409 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x5555555555555555; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5555555555555555, 0x200, 3f, x2, 1456,0)
+
+inst_465:
+// rs1_val==12297829382473034409 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xaaaaaaaaaaaaaaaa; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xaaaaaaaaaaaaaaaa, 0x6, 3f, x2, 1464,0)
+
+inst_466:
+// rs1_val==12297829382473034409 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5, 0x556, 1b, x2, 1472,0)
+
+inst_467:
+// rs1_val==12297829382473034409 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x3333333333333333; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x3333333333333333, 0xa, 1b, x2, 1480,0)
+
+inst_468:
+// rs1_val==12297829382473034409 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x6666666666666666; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x6666666666666666, 0x400, 1b, x2, 1488,0)
+
+inst_469:
+// rs1_val==12297829382473034409 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xb504f333, 0x4, 3f, x2, 1496,0)
+
+inst_470:
+// rs1_val==12297829382473034409 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x0, 0x6, 3f, x2, 1504,0)
+
+inst_471:
+// rs1_val==12297829382473034409 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x100000000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x100000000, 0x400, 3f, x2, 1512,0)
+
+inst_472:
+// rs1_val==12297829382473034409 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x2; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x2, 0x80, 3f, x2, 1520,0)
+
+inst_473:
+// rs1_val==12297829382473034409 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5555555555555554, 0x2, 1b, x2, 1528,0)
+
+inst_474:
+// rs1_val==12297829382473034409 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xaaaaaaaaaaaaaaa9; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xaaaaaaaaaaaaaaa9, 0x0, 1b, x2, 1536,0)
+
+inst_475:
+// rs1_val==12297829382473034409 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x4, 0x0, 1b, x2, 1544,0)
+
+inst_476:
+// rs1_val==12297829382473034409 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x3333333333333332, 0x6, 1b, x2, 1552,0)
+
+inst_477:
+// rs1_val==12297829382473034409 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x6666666666666665, 0x2, 1b, x2, 1560,0)
+
+inst_478:
+// rs1_val==12297829382473034409 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xb504f332, 0x20, 3f, x2, 1568,0)
+
+inst_479:
+// rs1_val==12297829382473034409 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xffffffff; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xffffffff, 0x20, 3f, x2, 1576,0)
+
+inst_480:
+// rs1_val==12297829382473034409 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5555555555555556, 0x8, 1b, x2, 1584,0)
+
+inst_481:
+// rs1_val==12297829382473034409 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xaaaaaaaaaaaaaaab; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xaaaaaaaaaaaaaaab, 0x8, 1b, x2, 1592,0)
+
+inst_482:
+// rs1_val==12297829382473034409 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x6, 0x6, 3f, x2, 1600,0)
+
+inst_483:
+// rs1_val==12297829382473034409 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x3333333333333334, 0x400, 1b, x2, 1608,0)
+
+inst_484:
+// rs1_val==12297829382473034409 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x6666666666666667, 0x6, 3f, x2, 1616,0)
+
+inst_485:
+// rs1_val==12297829382473034409 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0xb504f334, 0x400, 1b, x2, 1624,0)
+
+inst_486:
+// rs1_val==12297829382473034409 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x1; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x1, 0x200, 3f, x2, 1632,0)
+
+inst_487:
+// rs1_val==12297829382473034409 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x100000001; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x100000001, 0x20, 3f, x2, 1640,0)
+
+inst_488:
+// rs1_val==4 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x3, 0x0, 1b, x2, 1648,0)
+
+inst_489:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x5555555555555555, 0x8, 1b, x2, 1656,0)
+
+inst_490:
+// rs1_val==4 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xaaaaaaaaaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0xaaaaaaaaaaaaaaaa, 0x2, 1b, x2, 1664,0)
+
+inst_491:
+// rs1_val==4 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x5, 0x0, 3f, x2, 1672,0)
+
+inst_492:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x3333333333333333, 0x6, 3f, x2, 1680,0)
+
+inst_493:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x6666666666666666, 0x4, 1b, x2, 1688,0)
+
+inst_494:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f333; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0xb504f333, 0xa, 1b, x2, 1696,0)
+
+inst_495:
+// rs1_val==4 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x0, 0x400, 3f, x2, 1704,0)
+
+inst_496:
+// rs1_val==4 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x100000000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x100000000, 0x6, 1b, x2, 1712,0)
+
+inst_497:
+// rs1_val==4 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x2, 0x4, 3f, x2, 1720,0)
+
+inst_498:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x5555555555555554, 0x2, 3f, x2, 1728,0)
+
+inst_499:
+// rs1_val==4 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xaaaaaaaaaaaaaaa9; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0xaaaaaaaaaaaaaaa9, 0x0, 3f, x2, 1736,0)
+
+inst_500:
+// rs1_val==4 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x4, 0x0, 1b, x2, 1744,0)
+
+inst_501:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333332; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x3333333333333332, 0x10, 3f, x2, 1752,0)
+
+inst_502:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666665; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x6666666666666665, 0x556, 1b, x2, 1760,0)
+
+inst_503:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0xb504f332, 0x400, 1b, x2, 1768,0)
+
+inst_504:
+// rs1_val==4 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xffffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0xffffffff, 0x8, 1b, x2, 1776,0)
+
+inst_505:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x5555555555555556, 0x4, 3f, x2, 1784,0)
+
+inst_506:
+// rs1_val==4 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xaaaaaaaaaaaaaaab; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0xaaaaaaaaaaaaaaab, 0x556, 1b, x2, 1792,0)
+
+inst_507:
+// rs1_val==4 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x6, 0x8, 3f, x2, 1800,0)
+
+inst_508:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x3333333333333334, 0x4, 3f, x2, 1808,0)
+
+inst_509:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666667; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x6666666666666667, 0x400, 1b, x2, 1816,0)
+
+inst_510:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f334; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0xb504f334, 0x8, 3f, x2, 1824,0)
+
+inst_511:
+// rs1_val==4 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x1; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x1, 0x20, 3f, x2, 1832,0)
+
+inst_512:
+// rs1_val==4 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x4; op2val:0x100000001; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x4, 0x100000001, 0x20, 3f, x2, 1840,0)
+
+inst_513:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x3, 0x200, 3f, x2, 1848,0)
+
+inst_514:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x5555555555555555, 0x2, 1b, x2, 1856,0)
+
+inst_515:
+// rs1_val==3689348814741910322 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xaaaaaaaaaaaaaaaa; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0xaaaaaaaaaaaaaaaa, 0x200, 3f, x2, 1864,0)
+
+inst_516:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x5, 0x8, 1b, x2, 1872,0)
+
+inst_517:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333333; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x3333333333333333, 0x10, 3f, x2, 1880,0)
+
+inst_518:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666666; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x6666666666666666, 0x20, 3f, x2, 1888,0)
+
+inst_519:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f333; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0xb504f333, 0x200, 3f, x2, 1896,0)
+
+inst_520:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x0, 0x556, 1b, x2, 1904,0)
+
+inst_521:
+// rs1_val==3689348814741910322 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x100000000; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x100000000, 0x10, 3f, x2, 1912,0)
+
+inst_522:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x2, 0x10, 3f, x2, 1920,0)
+
+inst_523:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x5555555555555554, 0x2, 3f, x2, 1928,0)
+
+inst_524:
+// rs1_val==3689348814741910322 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xaaaaaaaaaaaaaaa9; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0xaaaaaaaaaaaaaaa9, 0x6, 1b, x2, 1936,0)
+
+inst_525:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x4, 0x400, 3f, x2, 1944,0)
+
+inst_526:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333332; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x10, 3f, x2, 1952,0)
+
+inst_527:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666665; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x6666666666666665, 0xa, 1b, x2, 1960,0)
+
+inst_528:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0xb504f332, 0x20, 3f, x2, 1968,0)
+
+inst_529:
+// rs1_val==3689348814741910322 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0xffffffff, 0x0, 3f, x2, 1976,0)
+
+inst_530:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x5555555555555556, 0x556, 1b, x2, 1984,0)
+
+inst_531:
+// rs1_val==3689348814741910322 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xaaaaaaaaaaaaaaab; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0xaaaaaaaaaaaaaaab, 0x40, 3f, x2, 1992,0)
+
+inst_532:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x6, 0x6, 1b, x2, 2000,0)
+
+inst_533:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x3333333333333334, 0x8, 3f, x2, 2008,0)
+
+inst_534:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x6666666666666667, 0x0, 3f, x2, 2016,0)
+
+inst_535:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0xb504f334, 0x0, 3f, x2, 2024,0)
+
+inst_536:
+// rs1_val==3689348814741910322 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x1; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x1, 0x8, 3f, x2, 2032,0)
+
+inst_537:
+// rs1_val==3689348814741910322 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x100000001; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333332, 0x100000001, 0x8, 3f, x2, 2040,0)
+RVTEST_SIGBASE( x2,signature_x2_2)
+
+inst_538:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x3, 0x20, 3f, x2, 0,0)
+
+inst_539:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x5555555555555555, 0x8, 3f, x2, 8,0)
+
+inst_540:
+// rs1_val==7378697629483820645 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xaaaaaaaaaaaaaaaa; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0xaaaaaaaaaaaaaaaa, 0x8, 3f, x2, 16,0)
+
+inst_541:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x5, 0x2, 3f, x2, 24,0)
+
+inst_542:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x3333333333333333, 0x400, 3f, x2, 32,0)
+
+inst_543:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666666; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x6666666666666666, 0x8, 3f, x2, 40,0)
+
+inst_544:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0xb504f333, 0x4, 3f, x2, 48,0)
+
+inst_545:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x0, 0x2, 3f, x2, 56,0)
+
+inst_546:
+// rs1_val==7378697629483820645 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x100000000; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x100000000, 0x8, 3f, x2, 64,0)
+
+inst_547:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x2, 0x400, 1b, x2, 72,0)
+
+inst_548:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x5555555555555554, 0x4, 1b, x2, 80,0)
+
+inst_549:
+// rs1_val==7378697629483820645 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xaaaaaaaaaaaaaaa9; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0xaaaaaaaaaaaaaaa9, 0x400, 1b, x2, 88,0)
+
+inst_550:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x4, 0x4, 1b, x2, 96,0)
+
+inst_551:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333332; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x3333333333333332, 0x556, 1b, x2, 104,0)
+
+inst_552:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x400, 1b, x2, 112,0)
+
+inst_553:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f332; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0xb504f332, 0x200, 3f, x2, 120,0)
+
+inst_554:
+// rs1_val==7378697629483820645 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0xffffffff, 0x2, 1b, x2, 128,0)
+
+inst_555:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x5555555555555556, 0x6, 3f, x2, 136,0)
+
+inst_556:
+// rs1_val==7378697629483820645 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xaaaaaaaaaaaaaaab; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0xaaaaaaaaaaaaaaab, 0x6, 1b, x2, 144,0)
+
+inst_557:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x6, 0x556, 1b, x2, 152,0)
+
+inst_558:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333334; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x3333333333333334, 0x20, 3f, x2, 160,0)
+
+inst_559:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666667; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x6666666666666667, 0x10, 3f, x2, 168,0)
+
+inst_560:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0xb504f334, 0x0, 1b, x2, 176,0)
+
+inst_561:
+// rs1_val==7378697629483820645 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x1; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x1, 0x556, 1b, x2, 184,0)
+
+inst_562:
+// rs1_val==7378697629483820645 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x100000001; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666665, 0x100000001, 0x400, 3f, x2, 192,0)
+
+inst_563:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x3, 0x8, 3f, x2, 200,0)
+
+inst_564:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555555; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x5555555555555555, 0x10, 3f, x2, 208,0)
+
+inst_565:
+// rs1_val==3037000498 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xaaaaaaaaaaaaaaaa; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0xaaaaaaaaaaaaaaaa, 0x8, 1b, x2, 216,0)
+
+inst_566:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x5, 0x8, 3f, x2, 224,0)
+
+inst_567:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x3333333333333333, 0x6, 3f, x2, 232,0)
+
+inst_568:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666666; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x6666666666666666, 0x80, 3f, x2, 240,0)
+
+inst_569:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0xb504f333, 0x400, 3f, x2, 248,0)
+
+inst_570:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x0, 0x400, 3f, x2, 256,0)
+
+inst_571:
+// rs1_val==3037000498 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x100000000; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x100000000, 0x40, 3f, x2, 264,0)
+
+inst_572:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x2, 0xa, 1b, x2, 272,0)
+
+inst_573:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x5555555555555554, 0x6, 1b, x2, 280,0)
+
+inst_574:
+// rs1_val==3037000498 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xaaaaaaaaaaaaaaa9; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0xaaaaaaaaaaaaaaa9, 0x8, 3f, x2, 288,0)
+
+inst_575:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x4, 0x556, 1b, x2, 296,0)
+
+inst_576:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333332; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x3333333333333332, 0xa, 1b, x2, 304,0)
+
+inst_577:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x6666666666666665, 0x6, 1b, x2, 312,0)
+
+inst_578:
+// rs1_val==3037000498 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xffffffff; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0xffffffff, 0x4, 1b, x2, 320,0)
+
+inst_579:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x5555555555555556, 0x0, 1b, x2, 328,0)
+
+inst_580:
+// rs1_val==3037000498 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xaaaaaaaaaaaaaaab; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0xaaaaaaaaaaaaaaab, 0x20, 3f, x2, 336,0)
+
+inst_581:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x6, 0x0, 3f, x2, 344,0)
+
+inst_582:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333334; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x3333333333333334, 0x6, 1b, x2, 352,0)
+
+inst_583:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666667; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x6666666666666667, 0x80, 3f, x2, 360,0)
+
+inst_584:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0xb504f334, 0x6, 3f, x2, 368,0)
+
+inst_585:
+// rs1_val==3037000498 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x1; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x1, 0x6, 3f, x2, 376,0)
+
+inst_586:
+// rs1_val==3037000498 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x100000001; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f332, 0x100000001, 0x4, 1b, x2, 384,0)
+
+inst_587:
+// rs1_val==4294967295 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x3, 0x6, 3f, x2, 392,0)
+
+inst_588:
+// rs1_val==4294967295 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x5555555555555555; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x5555555555555555, 0x40, 3f, x2, 400,0)
+
+inst_589:
+// rs1_val==4294967295 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xaaaaaaaaaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0xaaaaaaaaaaaaaaaa, 0x4, 3f, x2, 408,0)
+
+inst_590:
+// rs1_val==4294967295 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x5, 0x80, 3f, x2, 416,0)
+
+inst_591:
+// rs1_val==4294967295 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x3333333333333333; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x3333333333333333, 0x556, 1b, x2, 424,0)
+
+inst_592:
+// rs1_val==4294967295 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x6666666666666666; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x6666666666666666, 0x40, 3f, x2, 432,0)
+
+inst_593:
+// rs1_val==4294967295 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0xb504f333, 0x0, 1b, x2, 440,0)
+
+inst_594:
+// rs1_val==4294967295 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x0, 0x4, 3f, x2, 448,0)
+
+inst_595:
+// rs1_val==4294967295 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x100000000; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x100000000, 0x4, 3f, x2, 456,0)
+
+inst_596:
+// rs1_val==4294967295 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x2, 0x2, 3f, x2, 464,0)
+
+inst_597:
+// rs1_val==4294967295 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x5555555555555554; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x5555555555555554, 0x100, 3f, x2, 472,0)
+
+inst_598:
+// rs1_val==4294967295 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xaaaaaaaaaaaaaaa9; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0xaaaaaaaaaaaaaaa9, 0x0, 1b, x2, 480,0)
+
+inst_599:
+// rs1_val==4294967295 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x4, 0x8, 1b, x2, 488,0)
+
+inst_600:
+// rs1_val==4294967295 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x3333333333333332, 0x0, 3f, x2, 496,0)
+
+inst_601:
+// rs1_val==4294967295 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x6666666666666665, 0x6, 3f, x2, 504,0)
+
+inst_602:
+// rs1_val==4294967295 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0xb504f332, 0x20, 3f, x2, 512,0)
+
+inst_603:
+// rs1_val==4294967295 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0xffffffff, 0x2, 1b, x2, 520,0)
+
+inst_604:
+// rs1_val==4294967295 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x5555555555555556, 0x4, 3f, x2, 528,0)
+
+inst_605:
+// rs1_val==4294967295 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xaaaaaaaaaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0xaaaaaaaaaaaaaaab, 0x2, 1b, x2, 536,0)
+
+inst_606:
+// rs1_val==4294967295 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x6, 0x100, 3f, x2, 544,0)
+
+inst_607:
+// rs1_val==4294967295 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x3333333333333334; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x3333333333333334, 0x200, 3f, x2, 552,0)
+
+inst_608:
+// rs1_val==4294967295 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x6666666666666667, 0x4, 1b, x2, 560,0)
+
+inst_609:
+// rs1_val==4294967295 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0xb504f334; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0xb504f334, 0x8, 3f, x2, 568,0)
+
+inst_610:
+// rs1_val==4294967295 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x1; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x1, 0x0, 1b, x2, 576,0)
+
+inst_611:
+// rs1_val==4294967295 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffffff; op2val:0x100000001; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffffff, 0x100000001, 0x6, 1b, x2, 584,0)
+
+inst_612:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x3, 0x0, 1b, x2, 592,0)
+
+inst_613:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x5555555555555555, 0x2, 3f, x2, 600,0)
+
+inst_614:
+// rs1_val==6148914691236517206 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xaaaaaaaaaaaaaaaa; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0xaaaaaaaaaaaaaaaa, 0x20, 3f, x2, 608,0)
+
+inst_615:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x5, 0x100, 3f, x2, 616,0)
+
+inst_616:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333333; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x3333333333333333, 0x200, 3f, x2, 624,0)
+
+inst_617:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666666; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x6666666666666666, 0xa, 1b, x2, 632,0)
+
+inst_618:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0xb504f333, 0x80, 3f, x2, 640,0)
+
+inst_619:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x0, 0x200, 3f, x2, 648,0)
+
+inst_620:
+// rs1_val==6148914691236517206 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x100000000; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x100000000, 0x6, 3f, x2, 656,0)
+
+inst_621:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x2, 0x4, 1b, x2, 664,0)
+
+inst_622:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x4, 3f, x2, 672,0)
+
+inst_623:
+// rs1_val==6148914691236517206 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xaaaaaaaaaaaaaaa9; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0xaaaaaaaaaaaaaaa9, 0x2, 3f, x2, 680,0)
+
+inst_624:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x4, 0x0, 1b, x2, 688,0)
+
+inst_625:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333332; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x3333333333333332, 0x20, 3f, x2, 696,0)
+
+inst_626:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666665; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x6666666666666665, 0x40, 3f, x2, 704,0)
+
+inst_627:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f332; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0xb504f332, 0x200, 3f, x2, 712,0)
+
+inst_628:
+// rs1_val==6148914691236517206 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xffffffff; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0xffffffff, 0x8, 1b, x2, 720,0)
+
+inst_629:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x4, 3f, x2, 728,0)
+
+inst_630:
+// rs1_val==6148914691236517206 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xaaaaaaaaaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0xaaaaaaaaaaaaaaab, 0x2, 1b, x2, 736,0)
+
+inst_631:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x6, 0x400, 1b, x2, 744,0)
+
+inst_632:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333334; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x3333333333333334, 0x100, 3f, x2, 752,0)
+
+inst_633:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x6666666666666667, 0x8, 3f, x2, 760,0)
+
+inst_634:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0xb504f334, 0x0, 3f, x2, 768,0)
+
+inst_635:
+// rs1_val==6148914691236517206 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x1; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x1, 0x400, 3f, x2, 776,0)
+
+inst_636:
+// rs1_val==6148914691236517206 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x100000001; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x5555555555555556, 0x100000001, 0x4, 3f, x2, 784,0)
+
+inst_637:
+// rs1_val==12297829382473034411 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x3, 0x0, 1b, x2, 792,0)
+
+inst_638:
+// rs1_val==12297829382473034411 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555555, 0x2, 3f, x2, 800,0)
+
+inst_639:
+// rs1_val==12297829382473034411 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xaaaaaaaaaaaaaaaa; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0xaaaaaaaaaaaaaaaa, 0x8, 3f, x2, 808,0)
+
+inst_640:
+// rs1_val==12297829382473034411 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5, 0x400, 1b, x2, 816,0)
+
+inst_641:
+// rs1_val==12297829382473034411 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x3333333333333333, 0x400, 3f, x2, 824,0)
+
+inst_642:
+// rs1_val==12297829382473034411 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x6666666666666666; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x6666666666666666, 0x8, 1b, x2, 832,0)
+
+inst_643:
+// rs1_val==12297829382473034411 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0xb504f333, 0x4, 1b, x2, 840,0)
+
+inst_644:
+// rs1_val==12297829382473034411 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x0; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x0, 0x0, 3f, x2, 848,0)
+
+inst_645:
+// rs1_val==12297829382473034411 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x100000000; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x100000000, 0x20, 3f, x2, 856,0)
+
+inst_646:
+// rs1_val==12297829382473034411 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x2, 0x10, 3f, x2, 864,0)
+
+inst_647:
+// rs1_val==12297829382473034411 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x5555555555555554; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555554, 0x556, 1b, x2, 872,0)
+
+inst_648:
+// rs1_val==12297829382473034411 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xaaaaaaaaaaaaaaa9; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0xaaaaaaaaaaaaaaa9, 0x2, 1b, x2, 880,0)
+
+inst_649:
+// rs1_val==12297829382473034411 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x4, 0x10, 3f, x2, 888,0)
+
+inst_650:
+// rs1_val==12297829382473034411 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x3333333333333332; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x3333333333333332, 0x200, 3f, x2, 896,0)
+
+inst_651:
+// rs1_val==12297829382473034411 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x6666666666666665; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x6666666666666665, 0x400, 1b, x2, 904,0)
+
+inst_652:
+// rs1_val==12297829382473034411 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xb504f332; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0xb504f332, 0x200, 3f, x2, 912,0)
+
+inst_653:
+// rs1_val==12297829382473034411 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0xffffffff, 0x400, 1b, x2, 920,0)
+
+inst_654:
+// rs1_val==12297829382473034411 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555556, 0x6, 1b, x2, 928,0)
+
+inst_655:
+// rs1_val==12297829382473034411 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xaaaaaaaaaaaaaaab; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0xaaaaaaaaaaaaaaab, 0x8, 1b, x2, 936,0)
+
+inst_656:
+// rs1_val==12297829382473034411 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x6, 0x8, 3f, x2, 944,0)
+
+inst_657:
+// rs1_val==12297829382473034411 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x3333333333333334, 0x2, 3f, x2, 952,0)
+
+inst_658:
+// rs1_val==12297829382473034411 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x6666666666666667; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x6666666666666667, 0x100, 3f, x2, 960,0)
+
+inst_659:
+// rs1_val==12297829382473034411 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0xb504f334; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0xb504f334, 0x40, 3f, x2, 968,0)
+
+inst_660:
+// rs1_val==12297829382473034411 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x1; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x1, 0x2, 3f, x2, 976,0)
+
+inst_661:
+// rs1_val==12297829382473034411 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xaaaaaaaaaaaaaaab; op2val:0x100000001; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xaaaaaaaaaaaaaaab, 0x100000001, 0x8, 1b, x2, 984,0)
+
+inst_662:
+// rs1_val==6 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x3, 0x6, 1b, x2, 992,0)
+
+inst_663:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x5555555555555555, 0x4, 3f, x2, 1000,0)
+
+inst_664:
+// rs1_val==6 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xaaaaaaaaaaaaaaaa; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0xaaaaaaaaaaaaaaaa, 0x0, 3f, x2, 1008,0)
+
+inst_665:
+// rs1_val==6 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x5; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x5, 0x10, 3f, x2, 1016,0)
+
+inst_666:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333333; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x3333333333333333, 0x80, 3f, x2, 1024,0)
+
+inst_667:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666666; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x6666666666666666, 0x400, 1b, x2, 1032,0)
+
+inst_668:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f333; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0xb504f333, 0xa, 1b, x2, 1040,0)
+
+inst_669:
+// rs1_val==6 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x0, 0x80, 3f, x2, 1048,0)
+
+inst_670:
+// rs1_val==6 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x100000000; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x100000000, 0x400, 1b, x2, 1056,0)
+
+inst_671:
+// rs1_val==6 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x2, 0x6, 1b, x2, 1064,0)
+
+inst_672:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x5555555555555554, 0x4, 3f, x2, 1072,0)
+
+inst_673:
+// rs1_val==6 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xaaaaaaaaaaaaaaa9; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0xaaaaaaaaaaaaaaa9, 0x2, 3f, x2, 1080,0)
+
+inst_674:
+// rs1_val==6 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x4, 0x2, 3f, x2, 1088,0)
+
+inst_675:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333332; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x3333333333333332, 0x100, 3f, x2, 1096,0)
+
+inst_676:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x6666666666666665, 0x6, 3f, x2, 1104,0)
+
+inst_677:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0xb504f332, 0x10, 3f, x2, 1112,0)
+
+inst_678:
+// rs1_val==6 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0xffffffff, 0x0, 1b, x2, 1120,0)
+
+inst_679:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x5555555555555556, 0x2, 3f, x2, 1128,0)
+
+inst_680:
+// rs1_val==6 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xaaaaaaaaaaaaaaab; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0xaaaaaaaaaaaaaaab, 0x400, 3f, x2, 1136,0)
+
+inst_681:
+// rs1_val==6 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x6; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x6, 0x556, 1b, x2, 1144,0)
+
+inst_682:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333334; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x3333333333333334, 0xa, 1b, x2, 1152,0)
+
+inst_683:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666667; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x6666666666666667, 0x400, 3f, x2, 1160,0)
+
+inst_684:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f334; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0xb504f334, 0xa, 1b, x2, 1168,0)
+
+inst_685:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555555; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x5555555555555555, 0x40, 3f, x2, 1176,0)
+
+inst_686:
+// rs1_val==3689348814741910324 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xaaaaaaaaaaaaaaaa; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0xaaaaaaaaaaaaaaaa, 0x4, 1b, x2, 1184,0)
+
+inst_687:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x5, 0x4, 1b, x2, 1192,0)
+
+inst_688:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333333; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x3333333333333333, 0x200, 3f, x2, 1200,0)
+
+inst_689:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666666; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x6666666666666666, 0x2, 1b, x2, 1208,0)
+
+inst_690:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0xb504f333, 0x400, 1b, x2, 1216,0)
+
+inst_691:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x0, 0x10, 3f, x2, 1224,0)
+
+inst_692:
+// rs1_val==3689348814741910324 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x100000000; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x100000000, 0x10, 3f, x2, 1232,0)
+
+inst_693:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x2, 0x556, 1b, x2, 1240,0)
+
+inst_694:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555554; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x5555555555555554, 0x556, 1b, x2, 1248,0)
+
+inst_695:
+// rs1_val==3689348814741910324 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xaaaaaaaaaaaaaaa9; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0xaaaaaaaaaaaaaaa9, 0x8, 1b, x2, 1256,0)
+
+inst_696:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x4, 0x20, 3f, x2, 1264,0)
+
+inst_697:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x3333333333333332, 0x2, 1b, x2, 1272,0)
+
+inst_698:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x6666666666666665, 0x4, 1b, x2, 1280,0)
+
+inst_699:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0xb504f332, 0x556, 1b, x2, 1288,0)
+
+inst_700:
+// rs1_val==3689348814741910324 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xffffffff; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0xffffffff, 0x0, 1b, x2, 1296,0)
+
+inst_701:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x5555555555555556, 0x100, 3f, x2, 1304,0)
+
+inst_702:
+// rs1_val==3689348814741910324 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xaaaaaaaaaaaaaaab; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0xaaaaaaaaaaaaaaab, 0x6, 3f, x2, 1312,0)
+
+inst_703:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x6, 0x400, 3f, x2, 1320,0)
+
+inst_704:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333334; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x100, 3f, x2, 1328,0)
+
+inst_705:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666667; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x6666666666666667, 0x200, 3f, x2, 1336,0)
+
+inst_706:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f334; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0xb504f334, 0x400, 1b, x2, 1344,0)
+
+inst_707:
+// rs1_val==3689348814741910324 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x1; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x1, 0x20, 3f, x2, 1352,0)
+
+inst_708:
+// rs1_val==3689348814741910324 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x100000001; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x100000001, 0x400, 3f, x2, 1360,0)
+
+inst_709:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x3, 0x100, 3f, x2, 1368,0)
+
+inst_710:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x5555555555555555, 0x6, 3f, x2, 1376,0)
+
+inst_711:
+// rs1_val==7378697629483820647 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xaaaaaaaaaaaaaaaa; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0xaaaaaaaaaaaaaaaa, 0x8, 3f, x2, 1384,0)
+
+inst_712:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x5, 0x2, 3f, x2, 1392,0)
+
+inst_713:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x3333333333333333, 0x0, 1b, x2, 1400,0)
+
+inst_714:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666666; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x556, 1b, x2, 1408,0)
+
+inst_715:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0xb504f333, 0x2, 1b, x2, 1416,0)
+
+inst_716:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x0, 0x400, 1b, x2, 1424,0)
+
+inst_717:
+// rs1_val==7378697629483820647 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x100000000; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x100000000, 0x4, 1b, x2, 1432,0)
+
+inst_718:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x2, 0x10, 3f, x2, 1440,0)
+
+inst_719:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x5555555555555554, 0x2, 3f, x2, 1448,0)
+
+inst_720:
+// rs1_val==7378697629483820647 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xaaaaaaaaaaaaaaa9; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0xaaaaaaaaaaaaaaa9, 0x6, 3f, x2, 1456,0)
+
+inst_721:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x4, 0x0, 1b, x2, 1464,0)
+
+inst_722:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x3333333333333332, 0x0, 3f, x2, 1472,0)
+
+inst_723:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x6, 3f, x2, 1480,0)
+
+inst_724:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f332; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0xb504f332, 0x100, 3f, x2, 1488,0)
+
+inst_725:
+// rs1_val==7378697629483820647 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xffffffff; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0xffffffff, 0x2, 1b, x2, 1496,0)
+
+inst_726:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x5555555555555556, 0x0, 1b, x2, 1504,0)
+
+inst_727:
+// rs1_val==7378697629483820647 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xaaaaaaaaaaaaaaab; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0xaaaaaaaaaaaaaaab, 0x2, 1b, x2, 1512,0)
+
+inst_728:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x6, 0x400, 3f, x2, 1520,0)
+
+inst_729:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x3333333333333334, 0x400, 3f, x2, 1528,0)
+
+inst_730:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x6, 1b, x2, 1536,0)
+
+inst_731:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f334; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0xb504f334, 0x8, 3f, x2, 1544,0)
+
+inst_732:
+// rs1_val==7378697629483820647 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x1; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x1, 0x400, 3f, x2, 1552,0)
+
+inst_733:
+// rs1_val==7378697629483820647 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x100000001; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6666666666666667, 0x100000001, 0x10, 3f, x2, 1560,0)
+
+inst_734:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x3, 0x4, 1b, x2, 1568,0)
+
+inst_735:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x5555555555555555, 0x400, 3f, x2, 1576,0)
+
+inst_736:
+// rs1_val==3037000500 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xaaaaaaaaaaaaaaaa; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0xaaaaaaaaaaaaaaaa, 0x10, 3f, x2, 1584,0)
+
+inst_737:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x5, 0x400, 3f, x2, 1592,0)
+
+inst_738:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333333; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x3333333333333333, 0x10, 3f, x2, 1600,0)
+
+inst_739:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x6666666666666666, 0x0, 1b, x2, 1608,0)
+
+inst_740:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f333; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0xb504f333, 0x556, 1b, x2, 1616,0)
+
+inst_741:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x0, 0x2, 1b, x2, 1624,0)
+
+inst_742:
+// rs1_val==3037000500 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x100000000; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x100000000, 0x10, 3f, x2, 1632,0)
+
+inst_743:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x2, 0x4, 3f, x2, 1640,0)
+
+inst_744:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x5555555555555554, 0x0, 1b, x2, 1648,0)
+
+inst_745:
+// rs1_val==3037000500 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xaaaaaaaaaaaaaaa9; immval:0x80; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0xaaaaaaaaaaaaaaa9, 0x80, 3f, x2, 1656,0)
+
+inst_746:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x4, 0x8, 1b, x2, 1664,0)
+
+inst_747:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x3333333333333332, 0x400, 3f, x2, 1672,0)
+
+inst_748:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x6666666666666665, 0x6, 1b, x2, 1680,0)
+
+inst_749:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0xb504f332, 0x4, 3f, x2, 1688,0)
+
+inst_750:
+// rs1_val==3037000500 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xffffffff; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0xffffffff, 0x6, 1b, x2, 1696,0)
+
+inst_751:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x5555555555555556, 0x0, 1b, x2, 1704,0)
+
+inst_752:
+// rs1_val==3037000500 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xaaaaaaaaaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0xaaaaaaaaaaaaaaab, 0x4, 3f, x2, 1712,0)
+
+inst_753:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x6, 0x2, 1b, x2, 1720,0)
+
+inst_754:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333334; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x3333333333333334, 0x100, 3f, x2, 1728,0)
+
+inst_755:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x6666666666666667, 0x0, 1b, x2, 1736,0)
+
+inst_756:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f334; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0xb504f334, 0x4, 1b, x2, 1744,0)
+
+inst_757:
+// rs1_val==3037000500 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x1; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x1, 0x100, 3f, x2, 1752,0)
+
+inst_758:
+// rs1_val==3037000500 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x100000001; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xb504f334, 0x100000001, 0x556, 1b, x2, 1760,0)
+
+inst_759:
+// rs1_val==1 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x3, 0x400, 3f, x2, 1768,0)
+
+inst_760:
+// rs1_val==1 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x5555555555555555, 0x2, 3f, x2, 1776,0)
+
+inst_761:
+// rs1_val==1 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xaaaaaaaaaaaaaaaa; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0xaaaaaaaaaaaaaaaa, 0x200, 3f, x2, 1784,0)
+
+inst_762:
+// rs1_val==1 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x5, 0x0, 3f, x2, 1792,0)
+
+inst_763:
+// rs1_val==1 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x3333333333333333, 0x0, 1b, x2, 1800,0)
+
+inst_764:
+// rs1_val==1 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x6666666666666666; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x6666666666666666, 0x4, 3f, x2, 1808,0)
+
+inst_765:
+// rs1_val==1 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0xb504f333, 0x8, 3f, x2, 1816,0)
+
+inst_766:
+// rs1_val==1 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x0, 0x8, 3f, x2, 1824,0)
+
+inst_767:
+// rs1_val==1 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x100000000; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x100000000, 0x0, 3f, x2, 1832,0)
+
+inst_768:
+// rs1_val==1 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x2; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x2, 0x20, 3f, x2, 1840,0)
+
+inst_769:
+// rs1_val==1 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x5555555555555554, 0x2, 3f, x2, 1848,0)
+
+inst_770:
+// rs1_val==1 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xaaaaaaaaaaaaaaa9; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0xaaaaaaaaaaaaaaa9, 0x20, 3f, x2, 1856,0)
+
+inst_771:
+// rs1_val==1 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x4, 0x10, 3f, x2, 1864,0)
+
+inst_772:
+// rs1_val==1 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x3333333333333332, 0x8, 1b, x2, 1872,0)
+
+inst_773:
+// rs1_val==1 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x6666666666666665, 0x2, 1b, x2, 1880,0)
+
+inst_774:
+// rs1_val==1 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0xb504f332, 0x4, 3f, x2, 1888,0)
+
+inst_775:
+// rs1_val==1 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0xffffffff, 0x400, 3f, x2, 1896,0)
+
+inst_776:
+// rs1_val==1 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x5555555555555556; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x5555555555555556, 0x10, 3f, x2, 1904,0)
+
+inst_777:
+// rs1_val==1 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xaaaaaaaaaaaaaaab; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0xaaaaaaaaaaaaaaab, 0x4, 3f, x2, 1912,0)
+
+inst_778:
+// rs1_val==1 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x6, 0x100, 3f, x2, 1920,0)
+
+inst_779:
+// rs1_val==1 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x3333333333333334, 0x400, 3f, x2, 1928,0)
+
+inst_780:
+// rs1_val==1 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x6666666666666667; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x6666666666666667, 0x10, 3f, x2, 1936,0)
+
+inst_781:
+// rs1_val==1 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0xb504f334; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0xb504f334, 0x4, 1b, x2, 1944,0)
+
+inst_782:
+// rs1_val==1 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x1; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x1, 0x40, 3f, x2, 1952,0)
+
+inst_783:
+// rs1_val==1 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x1; op2val:0x100000001; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x1, 0x100000001, 0x2, 3f, x2, 1960,0)
+
+inst_784:
+// rs1_val==4294967297 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x3, 0x0, 3f, x2, 1968,0)
+
+inst_785:
+// rs1_val==4294967297 and rs2_val==6148914691236517205,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x5555555555555555; immval:0x200; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x5555555555555555, 0x200, 3f, x2, 1976,0)
+
+inst_786:
+// rs1_val==4294967297 and rs2_val==12297829382473034410,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xaaaaaaaaaaaaaaaa; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0xaaaaaaaaaaaaaaaa, 0x2, 3f, x2, 1984,0)
+
+inst_787:
+// rs1_val==4294967297 and rs2_val==5,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x5, 0x4, 3f, x2, 1992,0)
+
+inst_788:
+// rs1_val==4294967297 and rs2_val==3689348814741910323,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x3333333333333333; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x3333333333333333, 0x556, 1b, x2, 2000,0)
+
+inst_789:
+// rs1_val==4294967297 and rs2_val==7378697629483820646,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x6666666666666666; immval:0x100; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x6666666666666666, 0x100, 3f, x2, 2008,0)
+
+inst_790:
+// rs1_val==4294967297 and rs2_val==3037000499,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xb504f333; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0xb504f333, 0x40, 3f, x2, 2016,0)
+
+inst_791:
+// rs1_val==4294967297 and rs2_val==0,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x0, 0x8, 1b, x2, 2024,0)
+
+inst_792:
+// rs1_val==4294967297 and rs2_val==4294967296,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x100000000; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x100000000, 0x40, 3f, x2, 2032,0)
+
+inst_793:
+// rs1_val==4294967297 and rs2_val==2,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x2, 0x0, 3f, x2, 2040,0)
+RVTEST_SIGBASE( x2,signature_x2_3)
+
+inst_794:
+// rs1_val==4294967297 and rs2_val==6148914691236517204,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x5555555555555554; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x5555555555555554, 0x20, 3f, x2, 0,0)
+
+inst_795:
+// rs1_val==4294967297 and rs2_val==12297829382473034409,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xaaaaaaaaaaaaaaa9; immval:0x8; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0xaaaaaaaaaaaaaaa9, 0x8, 1b, x2, 8,0)
+
+inst_796:
+// rs1_val==4294967297 and rs2_val==4,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x4, 0x400, 1b, x2, 16,0)
+
+inst_797:
+// rs1_val==4294967297 and rs2_val==3689348814741910322,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x3333333333333332; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x3333333333333332, 0xa, 1b, x2, 24,0)
+
+inst_798:
+// rs1_val==4294967297 and rs2_val==7378697629483820645,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x6666666666666665; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x6666666666666665, 0x556, 1b, x2, 32,0)
+
+inst_799:
+// rs1_val==4294967297 and rs2_val==3037000498,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0xb504f332, 0x4, 1b, x2, 40,0)
+
+inst_800:
+// rs1_val==4294967297 and rs2_val==4294967295,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xffffffff; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0xffffffff, 0x556, 1b, x2, 48,0)
+
+inst_801:
+// rs1_val==4294967297 and rs2_val==6148914691236517206,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x5555555555555556, 0x40, 3f, x2, 56,0)
+
+inst_802:
+// rs1_val==4294967297 and rs2_val==12297829382473034411,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xaaaaaaaaaaaaaaab; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0xaaaaaaaaaaaaaaab, 0x6, 1b, x2, 64,0)
+
+inst_803:
+// rs1_val==4294967297 and rs2_val==6,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x6; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x6, 0x2, 1b, x2, 72,0)
+
+inst_804:
+// rs1_val==4294967297 and rs2_val==3689348814741910324,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x3333333333333334; immval:0x20; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x3333333333333334, 0x20, 3f, x2, 80,0)
+
+inst_805:
+// rs1_val==4294967297 and rs2_val==7378697629483820647,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x6666666666666667; immval:0x556; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x6666666666666667, 0x556, 1b, x2, 88,0)
+
+inst_806:
+// rs1_val==4294967297 and rs2_val==3037000500,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0xb504f334, 0x0, 1b, x2, 96,0)
+
+inst_807:
+// rs1_val==4294967297 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x1; immval:0x4; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x1, 0x4, 3f, x2, 104,0)
+
+inst_808:
+// rs1_val==4294967297 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x100000001; op2val:0x100000001; immval:0x2; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x100000001, 0x100000001, 0x2, 1b, x2, 112,0)
+
+inst_809:
+// rs1_val==6 and rs2_val==1,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x1; immval:0x0; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x1, 0x0, 1b, x2, 120,0)
+
+inst_810:
+// rs1_val==6 and rs2_val==4294967297,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x6; op2val:0x100000001; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x6, 0x100000001, 0xa, 1b, x2, 128,0)
+
+inst_811:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: bltu, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0x3333333333333334, 0x3, 0x6, 3f, x2, 136,0)
+
+inst_812:
+// rs1_val > 0 and rs2_val > 0 and rs1_val == rs2_val and imm_val > 0, rs1_val == 18446744073709551614, rs2_val == 18446744073709551614
+// opcode: bltu, op1:x10; op2:x11; op1val:0xfffffffffffffffe; op2val:0xfffffffffffffffe; immval:0x10; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x10, 3f, x2, 144,0)
+
+inst_813:
+// rs2_val == 131072, rs1_val == 18446673704965373951
+// opcode: bltu, op1:x10; op2:x11; op1val:0xffffbfffffffffff; op2val:0x20000; immval:0xa; align:0
+TEST_BRANCH_OP(bltu, x3, x10, x11, 0xffffbfffffffffff, 0x20000, 0xa, 1b, x2, 152,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 26*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_2:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_3:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/bne-01.S b/riscof/suite/rv64i_m/I/bne-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..0d29237fa3b48f8b0a0ccb7f694290e676185dc5
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/bne-01.S
@@ -0,0 +1,3474 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the bne instruction of the RISC-V I extension for the bne covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",bne)
+
+RVTEST_SIGBASE( x12,signature_x12_1)
+
+inst_0:
+// rs1 != rs2, rs1==x25, rs2==x19, rs1_val > 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val == 9223372036854775807, rs2_val == 562949953421312, rs1_val > rs2_val and imm_val > 0 and imm_val & 0x03 == 0
+// opcode: bne, op1:x25; op2:x19; op1val:0x7fffffffffffffff; op2val:0x2000000000000; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x6, x25, x19, 0x7fffffffffffffff, 0x2000000000000, 0x40, 3f, x12, 0,0)
+
+inst_1:
+// rs1 == rs2, rs1==x3, rs2==x3, rs1_val > 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs1_val == 72057594037927936
+// opcode: bne, op1:x3; op2:x3; op1val:0x100000000000000; op2val:0x100000000000000; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x6, x3, x3, 0x100000000000000, 0x100000000000000, 0x80, 3f, x12, 8,0)
+
+inst_2:
+// rs1==x10, rs2==x14, rs1_val < 0 and rs2_val < 0 and imm_val & 0x03 == 0, rs2_val == -4398046511105, rs1_val == -2199023255553
+// opcode: bne, op1:x10; op2:x14; op1val:-0x20000000001; op2val:-0x40000000001; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x6, x10, x14, -0x20000000001, -0x40000000001, 0x4, 3f, x12, 16,0)
+
+inst_3:
+// rs1==x21, rs2==x25, rs1_val < 0 and rs2_val > 0 and imm_val & 0x03 == 0, rs1_val < rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == 274877906944, rs1_val == -6148914691236517206
+// opcode: bne, op1:x21; op2:x25; op1val:-0x5555555555555556; op2val:0x4000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x6, x21, x25, -0x5555555555555556, 0x4000000000, 0x10, 3f, x12, 24,0)
+
+inst_4:
+// rs1==x1, rs2==x24, rs1_val == rs2_val and imm_val > 0 and imm_val & 0x03 == 0, rs2_val == -8796093022209, rs1_val == -8796093022209
+// opcode: bne, op1:x1; op2:x24; op1val:-0x80000000001; op2val:-0x80000000001; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x6, x1, x24, -0x80000000001, -0x80000000001, 0x8, 3f, x12, 32,0)
+
+inst_5:
+// rs1==x18, rs2==x9, rs1_val == rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs2_val == 70368744177664, rs1_val == 70368744177664
+// opcode: bne, op1:x18; op2:x9; op1val:0x400000000000; op2val:0x400000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x6, x18, x9, 0x400000000000, 0x400000000000, 0x4, 1b, x12, 40,0)
+
+inst_6:
+// rs1==x26, rs2==x17, rs1_val > rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs1_val==7378697629483820645 and rs2_val==6148914691236517204
+// opcode: bne, op1:x26; op2:x17; op1val:0x6666666666666665; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x6, x26, x17, 0x6666666666666665, 0x5555555555555554, 0x0, 1b, x12, 48,0)
+
+inst_7:
+// rs1==x7, rs2==x0, rs1_val < rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs2_val == 1073741824
+// opcode: bne, op1:x7; op2:x0; op1val:0x6; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x6, x7, x0, 0x6, 0x0, 0x4, 1b, x12, 56,0)
+
+inst_8:
+// rs1==x15, rs2==x22, rs2_val == 1,
+// opcode: bne, op1:x15; op2:x22; op1val:0x6666666666666667; op2val:0x1; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x6, x15, x22, 0x6666666666666667, 0x1, 0x100, 3f, x12, 64,0)
+
+inst_9:
+// rs1==x0, rs2==x8, rs2_val == 2, rs1_val == 35184372088832
+// opcode: bne, op1:x0; op2:x8; op1val:0x0; op2val:0x2; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x6, x0, x8, 0x0, 0x2, 0x20, 3f, x12, 72,0)
+
+inst_10:
+// rs1==x19, rs2==x5, rs2_val == 4, rs1_val == 4194304
+// opcode: bne, op1:x19; op2:x5; op1val:0x400000; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x6, x19, x5, 0x400000, 0x4, 0x400, 3f, x12, 80,0)
+
+inst_11:
+// rs1==x22, rs2==x4, rs2_val == 8, rs1_val == -9007199254740993
+// opcode: bne, op1:x22; op2:x4; op1val:-0x20000000000001; op2val:0x8; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x6, x22, x4, -0x20000000000001, 0x8, 0x0, 3f, x12, 88,0)
+
+inst_12:
+// rs1==x2, rs2==x23, rs2_val == 16, rs1_val == -549755813889
+// opcode: bne, op1:x2; op2:x23; op1val:-0x8000000001; op2val:0x10; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x6, x2, x23, -0x8000000001, 0x10, 0x10, 3f, x12, 96,0)
+
+inst_13:
+// rs1==x24, rs2==x15, rs2_val == 32, rs1_val == -1048577
+// opcode: bne, op1:x24; op2:x15; op1val:-0x100001; op2val:0x20; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x6, x24, x15, -0x100001, 0x20, 0x400, 3f, x12, 104,0)
+
+inst_14:
+// rs1==x29, rs2==x30, rs2_val == 64,
+// opcode: bne, op1:x29; op2:x30; op1val:0x6; op2val:0x40; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x6, x29, x30, 0x6, 0x40, 0x2, 3f, x12, 112,0)
+
+inst_15:
+// rs1==x28, rs2==x1, rs2_val == 128,
+// opcode: bne, op1:x28; op2:x1; op1val:-0xb504f333; op2val:0x80; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x6, x28, x1, -0xb504f333, 0x80, 0x400, 1b, x12, 120,0)
+
+inst_16:
+// rs1==x27, rs2==x29, rs2_val == 256,
+// opcode: bne, op1:x27; op2:x29; op1val:-0x8; op2val:0x100; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x6, x27, x29, -0x8, 0x100, 0x8, 3f, x12, 128,0)
+
+inst_17:
+// rs1==x13, rs2==x7, rs2_val == 512, rs1_val == -536870913
+// opcode: bne, op1:x13; op2:x7; op1val:-0x20000001; op2val:0x200; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x6, x13, x7, -0x20000001, 0x200, 0x8, 3f, x12, 136,0)
+
+inst_18:
+// rs1==x30, rs2==x2, rs2_val == 1024, rs1_val == -1125899906842625
+// opcode: bne, op1:x30; op2:x2; op1val:-0x4000000000001; op2val:0x400; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x6, x30, x2, -0x4000000000001, 0x400, 0x556, 1b, x12, 144,0)
+
+inst_19:
+// rs1==x14, rs2==x28, rs2_val == 2048,
+// opcode: bne, op1:x14; op2:x28; op1val:-0x20000000000001; op2val:0x800; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x6, x14, x28, -0x20000000000001, 0x800, 0x400, 3f, x12, 152,0)
+
+inst_20:
+// rs1==x4, rs2==x21, rs2_val == 4096, rs1_val == 2305843009213693952
+// opcode: bne, op1:x4; op2:x21; op1val:0x2000000000000000; op2val:0x1000; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x6, x4, x21, 0x2000000000000000, 0x1000, 0x556, 1b, x12, 160,0)
+
+inst_21:
+// rs1==x11, rs2==x18, rs2_val == 8192, rs1_val == -1073741825
+// opcode: bne, op1:x11; op2:x18; op1val:-0x40000001; op2val:0x2000; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x6, x11, x18, -0x40000001, 0x2000, 0x2, 3f, x12, 168,0)
+
+inst_22:
+// rs1==x20, rs2==x10, rs2_val == 16384, rs1_val == 268435456
+// opcode: bne, op1:x20; op2:x10; op1val:0x10000000; op2val:0x4000; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x6, x20, x10, 0x10000000, 0x4000, 0x400, 1b, x12, 176,0)
+
+inst_23:
+// rs1==x8, rs2==x6, rs2_val == 32768, rs1_val == -17179869185
+// opcode: bne, op1:x8; op2:x6; op1val:-0x400000001; op2val:0x8000; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x8, x6, -0x400000001, 0x8000, 0x2, 3f, x12, 184,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_24:
+// rs1==x6, rs2==x12, rs2_val == 65536, rs1_val == 1125899906842624
+// opcode: bne, op1:x6; op2:x12; op1val:0x4000000000000; op2val:0x10000; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x6, x12, 0x4000000000000, 0x10000, 0x6, 1b, x1, 0,0)
+
+inst_25:
+// rs1==x23, rs2==x16, rs2_val == 131072,
+// opcode: bne, op1:x23; op2:x16; op1val:0x5; op2val:0x20000; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x23, x16, 0x5, 0x20000, 0x100, 3f, x1, 8,0)
+
+inst_26:
+// rs1==x9, rs2==x31, rs2_val == 262144, rs1_val == 4398046511104
+// opcode: bne, op1:x9; op2:x31; op1val:0x40000000000; op2val:0x40000; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x9, x31, 0x40000000000, 0x40000, 0x200, 3f, x1, 16,0)
+
+inst_27:
+// rs1==x16, rs2==x26, rs2_val == 524288, rs1_val == -4611686018427387905
+// opcode: bne, op1:x16; op2:x26; op1val:-0x4000000000000001; op2val:0x80000; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x16, x26, -0x4000000000000001, 0x80000, 0x80, 3f, x1, 24,0)
+
+inst_28:
+// rs1==x17, rs2==x27, rs2_val == 1048576, rs1_val == -2305843009213693953
+// opcode: bne, op1:x17; op2:x27; op1val:-0x2000000000000001; op2val:0x100000; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x17, x27, -0x2000000000000001, 0x100000, 0x10, 3f, x1, 32,0)
+
+inst_29:
+// rs1==x5, rs2==x11, rs2_val == 2097152, rs1_val == -67108865
+// opcode: bne, op1:x5; op2:x11; op1val:-0x4000001; op2val:0x200000; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x5, x11, -0x4000001, 0x200000, 0x8, 1b, x1, 40,0)
+
+inst_30:
+// rs1==x12, rs2==x20, rs2_val == 4194304, rs1_val == 1024
+// opcode: bne, op1:x12; op2:x20; op1val:0x400; op2val:0x400000; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x12, x20, 0x400, 0x400000, 0xa, 1b, x1, 48,0)
+
+inst_31:
+// rs1==x31, rs2==x13, rs2_val == 8388608, rs1_val == 67108864
+// opcode: bne, op1:x31; op2:x13; op1val:0x4000000; op2val:0x800000; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x31, x13, 0x4000000, 0x800000, 0x0, 1b, x1, 56,0)
+
+inst_32:
+// rs2_val == 16777216, rs1_val == -268435457
+// opcode: bne, op1:x10; op2:x11; op1val:-0x10000001; op2val:0x1000000; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x10000001, 0x1000000, 0x80, 3f, x1, 64,0)
+
+inst_33:
+// rs2_val == 33554432,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4000000000000; op2val:0x2000000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4000000000000, 0x2000000, 0x4, 1b, x1, 72,0)
+
+inst_34:
+// rs2_val == 67108864,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x80000000001; op2val:0x4000000; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x80000000001, 0x4000000, 0x556, 1b, x1, 80,0)
+
+inst_35:
+// rs2_val == 134217728, rs1_val == -3
+// opcode: bne, op1:x10; op2:x11; op1val:-0x3; op2val:0x8000000; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x3, 0x8000000, 0x0, 3f, x1, 88,0)
+
+inst_36:
+// rs2_val == 268435456,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x4000000000001; op2val:0x10000000; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x4000000000001, 0x10000000, 0x80, 3f, x1, 96,0)
+
+inst_37:
+// rs2_val == 536870912,
+// opcode: bne, op1:x10; op2:x11; op1val:0x400000000000; op2val:0x20000000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x400000000000, 0x20000000, 0x4, 1b, x1, 104,0)
+
+inst_38:
+// rs2_val == 2147483648, rs1_val == -1152921504606846977
+// opcode: bne, op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:0x80000000; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x1000000000000001, 0x80000000, 0xa, 1b, x1, 112,0)
+
+inst_39:
+// rs2_val == 4294967296, rs1_val == 8796093022208
+// opcode: bne, op1:x10; op2:x11; op1val:0x80000000000; op2val:0x100000000; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x80000000000, 0x100000000, 0x0, 1b, x1, 120,0)
+
+inst_40:
+// rs2_val == 8589934592, rs1_val == -131073
+// opcode: bne, op1:x10; op2:x11; op1val:-0x20001; op2val:0x200000000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x20001, 0x200000000, 0x4, 3f, x1, 128,0)
+
+inst_41:
+// rs2_val == 17179869184, rs1_val == -9223372036854775808
+// opcode: bne, op1:x10; op2:x11; op1val:-0x8000000000000000; op2val:0x400000000; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x8000000000000000, 0x400000000, 0x20, 3f, x1, 136,0)
+
+inst_42:
+// rs2_val == 34359738368, rs1_val == 274877906944
+// opcode: bne, op1:x10; op2:x11; op1val:0x4000000000; op2val:0x800000000; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4000000000, 0x800000000, 0x2, 1b, x1, 144,0)
+
+inst_43:
+// rs2_val == 68719476736, rs1_val == -5
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5; op2val:0x1000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5, 0x1000000000, 0x10, 3f, x1, 152,0)
+
+inst_44:
+// rs2_val == 137438953472,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x2000000000, 0x2, 3f, x1, 160,0)
+
+inst_45:
+// rs2_val == 549755813888,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x8000000000; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x8000000000, 0x0, 1b, x1, 168,0)
+
+inst_46:
+// rs2_val == 1099511627776,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x1; op2val:0x10000000000; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x1, 0x10000000000, 0x40, 3f, x1, 176,0)
+
+inst_47:
+// rs2_val == 2199023255552, rs1_val == 1073741824
+// opcode: bne, op1:x10; op2:x11; op1val:0x40000000; op2val:0x20000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x40000000, 0x20000000000, 0x4, 1b, x1, 184,0)
+
+inst_48:
+// rs2_val == 4398046511104, rs1_val == -1025
+// opcode: bne, op1:x10; op2:x11; op1val:-0x401; op2val:0x40000000000; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x401, 0x40000000000, 0x0, 1b, x1, 192,0)
+
+inst_49:
+// rs2_val == 8796093022208,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x80000000000; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x80000000000, 0xa, 1b, x1, 200,0)
+
+inst_50:
+// rs2_val == 17592186044416, rs1_val == 8388608
+// opcode: bne, op1:x10; op2:x11; op1val:0x800000; op2val:0x100000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x800000, 0x100000000000, 0x4, 3f, x1, 208,0)
+
+inst_51:
+// rs2_val == 35184372088832, rs1_val == -2251799813685249
+// opcode: bne, op1:x10; op2:x11; op1val:-0x8000000000001; op2val:0x200000000000; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x8000000000001, 0x200000000000, 0x100, 3f, x1, 216,0)
+
+inst_52:
+// rs2_val == 140737488355328,
+// opcode: bne, op1:x10; op2:x11; op1val:0x100000000000000; op2val:0x800000000000; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x100000000000000, 0x800000000000, 0x200, 3f, x1, 224,0)
+
+inst_53:
+// rs2_val == 281474976710656, rs1_val == 281474976710656
+// opcode: bne, op1:x10; op2:x11; op1val:0x1000000000000; op2val:0x1000000000000; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x1000000000000, 0x1000000000000, 0x400, 1b, x1, 232,0)
+
+inst_54:
+// rs2_val == 1125899906842624,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x4000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x4000000000000, 0x4, 3f, x1, 240,0)
+
+inst_55:
+// rs2_val == 2251799813685248, rs1_val == 4611686018427387904
+// opcode: bne, op1:x10; op2:x11; op1val:0x4000000000000000; op2val:0x8000000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4000000000000000, 0x8000000000000, 0x10, 3f, x1, 248,0)
+
+inst_56:
+// rs2_val == 4503599627370496, rs1_val == 524288
+// opcode: bne, op1:x10; op2:x11; op1val:0x80000; op2val:0x10000000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x80000, 0x10000000000000, 0x4, 3f, x1, 256,0)
+
+inst_57:
+// rs2_val == 9007199254740992, rs1_val == -36028797018963969
+// opcode: bne, op1:x10; op2:x11; op1val:-0x80000000000001; op2val:0x20000000000000; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x80000000000001, 0x20000000000000, 0x0, 3f, x1, 264,0)
+
+inst_58:
+// rs2_val == 18014398509481984, rs1_val == 134217728
+// opcode: bne, op1:x10; op2:x11; op1val:0x8000000; op2val:0x40000000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x8000000, 0x40000000000000, 0x10, 3f, x1, 272,0)
+
+inst_59:
+// rs2_val == 36028797018963968, rs1_val == 2097152
+// opcode: bne, op1:x10; op2:x11; op1val:0x200000; op2val:0x80000000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x200000, 0x80000000000000, 0x2, 1b, x1, 280,0)
+
+inst_60:
+// rs2_val == 72057594037927936,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x100000000000000; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x100000000000000, 0x556, 1b, x1, 288,0)
+
+inst_61:
+// rs2_val == 144115188075855872,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x200000000000000; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x200000000000000, 0x10, 3f, x1, 296,0)
+
+inst_62:
+// rs2_val == 288230376151711744, rs1_val == 16
+// opcode: bne, op1:x10; op2:x11; op1val:0x10; op2val:0x400000000000000; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x10, 0x400000000000000, 0x100, 3f, x1, 304,0)
+
+inst_63:
+// rs2_val == 576460752303423488,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x800000000000000; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x800000000000000, 0x200, 3f, x1, 312,0)
+
+inst_64:
+// rs2_val == 1152921504606846976, rs1_val == 32768
+// opcode: bne, op1:x10; op2:x11; op1val:0x8000; op2val:0x1000000000000000; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x8000, 0x1000000000000000, 0x400, 3f, x1, 320,0)
+
+inst_65:
+// rs2_val == 2305843009213693952, rs1_val == 9007199254740992
+// opcode: bne, op1:x10; op2:x11; op1val:0x20000000000000; op2val:0x2000000000000000; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x20000000000000, 0x2000000000000000, 0x8, 3f, x1, 328,0)
+
+inst_66:
+// rs2_val == 4611686018427387904, rs1_val == 6148914691236517205
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4000000000000000; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x4000000000000000, 0x2, 3f, x1, 336,0)
+
+inst_67:
+// rs2_val == -9223372036854775808, rs1_val == -65
+// opcode: bne, op1:x10; op2:x11; op1val:-0x41; op2val:-0x8000000000000000; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x41, -0x8000000000000000, 0x200, 3f, x1, 344,0)
+
+inst_68:
+// rs2_val == -2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:-0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, -0x2, 0x4, 3f, x1, 352,0)
+
+inst_69:
+// rs2_val == -3, rs1_val == -524289
+// opcode: bne, op1:x10; op2:x11; op1val:-0x80001; op2val:-0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x80001, -0x3, 0x400, 1b, x1, 360,0)
+
+inst_70:
+// rs2_val == -5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, -0x5, 0x556, 1b, x1, 368,0)
+
+inst_71:
+// rs2_val == -9, rs1_val == 262144
+// opcode: bne, op1:x10; op2:x11; op1val:0x40000; op2val:-0x9; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x40000, -0x9, 0xa, 1b, x1, 376,0)
+
+inst_72:
+// rs2_val == -17, rs1_val == 2251799813685248
+// opcode: bne, op1:x10; op2:x11; op1val:0x8000000000000; op2val:-0x11; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x8000000000000, -0x11, 0x400, 1b, x1, 384,0)
+
+inst_73:
+// rs2_val == -33,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x80001; op2val:-0x21; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x80001, -0x21, 0x80, 3f, x1, 392,0)
+
+inst_74:
+// rs2_val == -65, rs1_val == 1
+// opcode: bne, op1:x10; op2:x11; op1val:0x1; op2val:-0x41; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x1, -0x41, 0x556, 1b, x1, 400,0)
+
+inst_75:
+// rs2_val == -129, rs1_val == 549755813888
+// opcode: bne, op1:x10; op2:x11; op1val:0x8000000000; op2val:-0x81; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x8000000000, -0x81, 0x100, 3f, x1, 408,0)
+
+inst_76:
+// rs2_val == -257, rs1_val == 4294967296
+// opcode: bne, op1:x10; op2:x11; op1val:0x100000000; op2val:-0x101; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x100000000, -0x101, 0x4, 3f, x1, 416,0)
+
+inst_77:
+// rs2_val == -513, rs1_val == 512
+// opcode: bne, op1:x10; op2:x11; op1val:0x200; op2val:-0x201; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x200, -0x201, 0x40, 3f, x1, 424,0)
+
+inst_78:
+// rs2_val == -1025, rs1_val == 2
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:-0x401; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, -0x401, 0x8, 3f, x1, 432,0)
+
+inst_79:
+// rs2_val == -2049,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x3; op2val:-0x801; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x3, -0x801, 0x0, 1b, x1, 440,0)
+
+inst_80:
+// rs2_val == -4097, rs1_val == 17179869184
+// opcode: bne, op1:x10; op2:x11; op1val:0x400000000; op2val:-0x1001; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x400000000, -0x1001, 0x10, 3f, x1, 448,0)
+
+inst_81:
+// rs2_val == -8193,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x2001; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, -0x2001, 0x80, 3f, x1, 456,0)
+
+inst_82:
+// rs2_val == -16385, rs1_val == -2147483649
+// opcode: bne, op1:x10; op2:x11; op1val:-0x80000001; op2val:-0x4001; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x80000001, -0x4001, 0x2, 1b, x1, 464,0)
+
+inst_83:
+// rs2_val == -32769, rs1_val == -257
+// opcode: bne, op1:x10; op2:x11; op1val:-0x101; op2val:-0x8001; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x101, -0x8001, 0x6, 1b, x1, 472,0)
+
+inst_84:
+// rs2_val == -65537,
+// opcode: bne, op1:x10; op2:x11; op1val:0x8000000000000; op2val:-0x10001; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x8000000000000, -0x10001, 0x10, 3f, x1, 480,0)
+
+inst_85:
+// rs2_val == -131073, rs1_val == 4
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:-0x20001; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, -0x20001, 0x100, 3f, x1, 488,0)
+
+inst_86:
+// rs2_val == -262145,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:-0x40001; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, -0x40001, 0x400, 3f, x1, 496,0)
+
+inst_87:
+// rs2_val == -524289,
+// opcode: bne, op1:x10; op2:x11; op1val:0x1; op2val:-0x80001; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x1, -0x80001, 0x20, 3f, x1, 504,0)
+
+inst_88:
+// rs2_val == -1048577,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x8; op2val:-0x100001; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x8, -0x100001, 0x20, 3f, x1, 512,0)
+
+inst_89:
+// rs2_val == -2097153,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0x200001; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, -0x200001, 0x80, 3f, x1, 520,0)
+
+inst_90:
+// rs2_val == -4194305, rs1_val == 16384
+// opcode: bne, op1:x10; op2:x11; op1val:0x4000; op2val:-0x400001; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4000, -0x400001, 0x10, 3f, x1, 528,0)
+
+inst_91:
+// rs2_val == -8388609,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4000000000000000; op2val:-0x800001; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4000000000000000, -0x800001, 0x10, 3f, x1, 536,0)
+
+inst_92:
+// rs2_val == -16777217,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:-0x1000001; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, -0x1000001, 0x400, 1b, x1, 544,0)
+
+inst_93:
+// rs2_val == -33554433, rs1_val == -8193
+// opcode: bne, op1:x10; op2:x11; op1val:-0x2001; op2val:-0x2000001; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x2001, -0x2000001, 0x2, 3f, x1, 552,0)
+
+inst_94:
+// rs2_val == -67108865,
+// opcode: bne, op1:x10; op2:x11; op1val:0x100000000000000; op2val:-0x4000001; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x100000000000000, -0x4000001, 0x6, 3f, x1, 560,0)
+
+inst_95:
+// rs2_val == -134217729,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x8000001; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, -0x8000001, 0x556, 1b, x1, 568,0)
+
+inst_96:
+// rs2_val == -268435457,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x10000001; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, -0x10000001, 0x2, 3f, x1, 576,0)
+
+inst_97:
+// rs2_val == -536870913,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2000000000000000; op2val:-0x20000001; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2000000000000000, -0x20000001, 0x400, 3f, x1, 584,0)
+
+inst_98:
+// rs2_val == -1073741825, rs1_val == 1152921504606846976
+// opcode: bne, op1:x10; op2:x11; op1val:0x1000000000000000; op2val:-0x40000001; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x1000000000000000, -0x40000001, 0x400, 1b, x1, 592,0)
+
+inst_99:
+// rs2_val == -2147483649, rs1_val == -70368744177665
+// opcode: bne, op1:x10; op2:x11; op1val:-0x400000000001; op2val:-0x80000001; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x400000000001, -0x80000001, 0x4, 3f, x1, 600,0)
+
+inst_100:
+// rs2_val == -4294967297,
+// opcode: bne, op1:x10; op2:x11; op1val:0x8000000; op2val:-0x100000001; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x8000000, -0x100000001, 0x2, 1b, x1, 608,0)
+
+inst_101:
+// rs2_val == -8589934593,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x200000001; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, -0x200000001, 0x8, 3f, x1, 616,0)
+
+inst_102:
+// rs2_val == -17179869185,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0x400000001; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, -0x400000001, 0x4, 1b, x1, 624,0)
+
+inst_103:
+// rs2_val == -34359738369,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x800000001; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, -0x800000001, 0x4, 3f, x1, 632,0)
+
+inst_104:
+// rs2_val == -68719476737,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0x1000000001; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, -0x1000000001, 0x200, 3f, x1, 640,0)
+
+inst_105:
+// rs2_val == -137438953473,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x2000000001; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, -0x2000000001, 0x20, 3f, x1, 648,0)
+
+inst_106:
+// rs2_val == -274877906945,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x8000000001; op2val:-0x4000000001; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x8000000001, -0x4000000001, 0x2, 3f, x1, 656,0)
+
+inst_107:
+// rs2_val == -549755813889,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x4; op2val:-0x8000000001; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x4, -0x8000000001, 0x100, 3f, x1, 664,0)
+
+inst_108:
+// rs2_val == -1099511627777,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x4000000000001; op2val:-0x10000000001; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x4000000000001, -0x10000000001, 0x200, 3f, x1, 672,0)
+
+inst_109:
+// rs2_val == -2199023255553,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x1000000000000001; op2val:-0x20000000001; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x1000000000000001, -0x20000000001, 0x200, 3f, x1, 680,0)
+
+inst_110:
+// rs2_val == -17592186044417,
+// opcode: bne, op1:x10; op2:x11; op1val:0x200; op2val:-0x100000000001; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x200, -0x100000000001, 0x0, 1b, x1, 688,0)
+
+inst_111:
+// rs2_val == -35184372088833, rs1_val == -72057594037927937
+// opcode: bne, op1:x10; op2:x11; op1val:-0x100000000000001; op2val:-0x200000000001; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x100000000000001, -0x200000000001, 0x4, 3f, x1, 696,0)
+
+inst_112:
+// rs2_val == -70368744177665, rs1_val == 256
+// opcode: bne, op1:x10; op2:x11; op1val:0x100; op2val:-0x400000000001; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x100, -0x400000000001, 0x8, 1b, x1, 704,0)
+
+inst_113:
+// rs2_val == -140737488355329,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x800000000001; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, -0x800000000001, 0x0, 1b, x1, 712,0)
+
+inst_114:
+// rs2_val == -281474976710657,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x101; op2val:-0x1000000000001; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x101, -0x1000000000001, 0x200, 3f, x1, 720,0)
+
+inst_115:
+// rs2_val == -562949953421313,
+// opcode: bne, op1:x10; op2:x11; op1val:0x400000; op2val:-0x2000000000001; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x400000, -0x2000000000001, 0x6, 1b, x1, 728,0)
+
+inst_116:
+// rs2_val == -1125899906842625,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x4000000000001; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, -0x4000000000001, 0x400, 3f, x1, 736,0)
+
+inst_117:
+// rs2_val == -2251799813685249, rs1_val == 16777216
+// opcode: bne, op1:x10; op2:x11; op1val:0x1000000; op2val:-0x8000000000001; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x1000000, -0x8000000000001, 0x556, 1b, x1, 744,0)
+
+inst_118:
+// rs2_val == -4503599627370497,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:-0x10000000000001; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, -0x10000000000001, 0x80, 3f, x1, 752,0)
+
+inst_119:
+// rs2_val == -9007199254740993,
+// opcode: bne, op1:x10; op2:x11; op1val:0x1000000000000; op2val:-0x20000000000001; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x1000000000000, -0x20000000000001, 0x2, 1b, x1, 760,0)
+
+inst_120:
+// rs2_val == -18014398509481985,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x4000001; op2val:-0x40000000000001; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x4000001, -0x40000000000001, 0x80, 3f, x1, 768,0)
+
+inst_121:
+// rs2_val == -36028797018963969,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x80000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, -0x80000000000001, 0x0, 3f, x1, 776,0)
+
+inst_122:
+// rs2_val == -72057594037927937, rs1_val == 32
+// opcode: bne, op1:x10; op2:x11; op1val:0x20; op2val:-0x100000000000001; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x20, -0x100000000000001, 0x8, 1b, x1, 784,0)
+
+inst_123:
+// rs2_val == -144115188075855873,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x3; op2val:-0x200000000000001; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x3, -0x200000000000001, 0x400, 3f, x1, 792,0)
+
+inst_124:
+// rs2_val == -288230376151711745,
+// opcode: bne, op1:x10; op2:x11; op1val:0x10; op2val:-0x400000000000001; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x10, -0x400000000000001, 0x0, 1b, x1, 800,0)
+
+inst_125:
+// rs2_val == -576460752303423489,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x800000000000001; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, -0x800000000000001, 0x10, 3f, x1, 808,0)
+
+inst_126:
+// rs2_val == -1152921504606846977,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x1000000000000001; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, -0x1000000000000001, 0x6, 1b, x1, 816,0)
+
+inst_127:
+// rs2_val == -2305843009213693953, rs1_val == -274877906945
+// opcode: bne, op1:x10; op2:x11; op1val:-0x4000000001; op2val:-0x2000000000000001; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x4000000001, -0x2000000000000001, 0x400, 3f, x1, 824,0)
+
+inst_128:
+// rs2_val == -4611686018427387905,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x7; op2val:-0x4000000000000001; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x7, -0x4000000000000001, 0x6, 1b, x1, 832,0)
+
+inst_129:
+// rs2_val == 9223372036854775807,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x80000001; op2val:0x7fffffffffffffff; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x80000001, 0x7fffffffffffffff, 0x400, 3f, x1, 840,0)
+
+inst_130:
+// rs2_val == 6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x4000001; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x4000001, 0x5555555555555555, 0x0, 1b, x1, 848,0)
+
+inst_131:
+// rs2_val == -6148914691236517206, rs1_val==6 and rs2_val==-6148914691236517206
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, -0x5555555555555556, 0x2, 3f, x1, 856,0)
+
+inst_132:
+// rs1_val == 8,
+// opcode: bne, op1:x10; op2:x11; op1val:0x8; op2val:-0x4000000000000000; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x8, -0x4000000000000000, 0x0, 3f, x1, 864,0)
+
+inst_133:
+// rs1_val == 64,
+// opcode: bne, op1:x10; op2:x11; op1val:0x40; op2val:0x10000000000000; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x40, 0x10000000000000, 0x400, 3f, x1, 872,0)
+
+inst_134:
+// rs1_val == 128,
+// opcode: bne, op1:x10; op2:x11; op1val:0x80; op2val:0x80000; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x80, 0x80000, 0x100, 3f, x1, 880,0)
+
+inst_135:
+// rs1_val == 2048,
+// opcode: bne, op1:x10; op2:x11; op1val:0x800; op2val:0x40000; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x800, 0x40000, 0x2, 3f, x1, 888,0)
+
+inst_136:
+// rs1_val == 4096,
+// opcode: bne, op1:x10; op2:x11; op1val:0x1000; op2val:0x6666666666666666; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x1000, 0x6666666666666666, 0x20, 3f, x1, 896,0)
+
+inst_137:
+// rs1_val == 8192,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2000; op2val:0x800000000000000; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2000, 0x800000000000000, 0x20, 3f, x1, 904,0)
+
+inst_138:
+// rs1_val == 65536,
+// opcode: bne, op1:x10; op2:x11; op1val:0x10000; op2val:-0x20000000000001; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x10000, -0x20000000000001, 0x200, 3f, x1, 912,0)
+
+inst_139:
+// rs1_val == 131072,
+// opcode: bne, op1:x10; op2:x11; op1val:0x20000; op2val:0x3333333333333333; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x20000, 0x3333333333333333, 0x8, 3f, x1, 920,0)
+
+inst_140:
+// rs1_val == 1048576,
+// opcode: bne, op1:x10; op2:x11; op1val:0x100000; op2val:0x4000; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x100000, 0x4000, 0x6, 1b, x1, 928,0)
+
+inst_141:
+// rs1_val == 33554432,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2000000; op2val:0x4000000000; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2000000, 0x4000000000, 0x6, 1b, x1, 936,0)
+
+inst_142:
+// rs1_val == 536870912,
+// opcode: bne, op1:x10; op2:x11; op1val:0x20000000; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x20000000, 0x6666666666666667, 0x6, 3f, x1, 944,0)
+
+inst_143:
+// rs1_val == 2147483648,
+// opcode: bne, op1:x10; op2:x11; op1val:0x80000000; op2val:-0x8000001; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x80000000, -0x8000001, 0x6, 1b, x1, 952,0)
+
+inst_144:
+// rs1_val == 8589934592,
+// opcode: bne, op1:x10; op2:x11; op1val:0x200000000; op2val:0x100000000000; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x200000000, 0x100000000000, 0x8, 1b, x1, 960,0)
+
+inst_145:
+// rs1_val == 34359738368,
+// opcode: bne, op1:x10; op2:x11; op1val:0x800000000; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x800000000, 0x0, 0x8, 1b, x1, 968,0)
+
+inst_146:
+// rs1_val == 68719476736,
+// opcode: bne, op1:x10; op2:x11; op1val:0x1000000000; op2val:0x20000000000; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x1000000000, 0x20000000000, 0x400, 3f, x1, 976,0)
+
+inst_147:
+// rs1_val == 137438953472,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2000000000; op2val:0x8; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2000000000, 0x8, 0x200, 3f, x1, 984,0)
+
+inst_148:
+// rs1_val == 1099511627776,
+// opcode: bne, op1:x10; op2:x11; op1val:0x10000000000; op2val:0x2000000000000; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x10000000000, 0x2000000000000, 0x80, 3f, x1, 992,0)
+
+inst_149:
+// rs1_val == 2199023255552,
+// opcode: bne, op1:x10; op2:x11; op1val:0x20000000000; op2val:-0x8001; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x20000000000, -0x8001, 0x20, 3f, x1, 1000,0)
+
+inst_150:
+// rs1_val == 17592186044416,
+// opcode: bne, op1:x10; op2:x11; op1val:0x100000000000; op2val:-0x2000000000000001; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x100000000000, -0x2000000000000001, 0xa, 1b, x1, 1008,0)
+
+inst_151:
+// rs1_val == 140737488355328,
+// opcode: bne, op1:x10; op2:x11; op1val:0x800000000000; op2val:0x2000000; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x800000000000, 0x2000000, 0x0, 3f, x1, 1016,0)
+
+inst_152:
+// rs1_val == 562949953421312,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2000000000000; op2val:-0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2000000000000, -0x5555555555555556, 0x4, 3f, x1, 1024,0)
+
+inst_153:
+// rs1_val == 4503599627370496,
+// opcode: bne, op1:x10; op2:x11; op1val:0x10000000000000; op2val:-0x100000000000001; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x10000000000000, -0x100000000000001, 0x8, 1b, x1, 1032,0)
+
+inst_154:
+// rs1_val == 18014398509481984,
+// opcode: bne, op1:x10; op2:x11; op1val:0x40000000000000; op2val:0x7fffffffffffffff; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x40000000000000, 0x7fffffffffffffff, 0x40, 3f, x1, 1040,0)
+
+inst_155:
+// rs1_val == 36028797018963968,
+// opcode: bne, op1:x10; op2:x11; op1val:0x80000000000000; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x80000000000000, 0xb504f333, 0x8, 1b, x1, 1048,0)
+
+inst_156:
+// rs1_val == 144115188075855872,
+// opcode: bne, op1:x10; op2:x11; op1val:0x200000000000000; op2val:-0x1000000000001; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x200000000000000, -0x1000000000001, 0x6, 1b, x1, 1056,0)
+
+inst_157:
+// rs1_val == 288230376151711744,
+// opcode: bne, op1:x10; op2:x11; op1val:0x400000000000000; op2val:-0x40000000000001; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x400000000000000, -0x40000000000001, 0x80, 3f, x1, 1064,0)
+
+inst_158:
+// rs1_val == 576460752303423488,
+// opcode: bne, op1:x10; op2:x11; op1val:0x800000000000000; op2val:0x20000000; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x800000000000000, 0x20000000, 0x0, 1b, x1, 1072,0)
+
+inst_159:
+// rs1_val == -2,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x2; op2val:-0x401; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x2, -0x401, 0x6, 3f, x1, 1080,0)
+
+inst_160:
+// rs1_val == -9,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x9; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x9, 0x5, 0x4, 1b, x1, 1088,0)
+
+inst_161:
+// rs1_val == -17,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x11; op2val:0x800000000; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x11, 0x800000000, 0x10, 3f, x1, 1096,0)
+
+inst_162:
+// rs1_val == -33,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x21; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x21, 0x5, 0x8, 3f, x1, 1104,0)
+
+inst_163:
+// rs1_val == -129,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x81; op2val:0x800000000000000; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x81, 0x800000000000000, 0x556, 1b, x1, 1112,0)
+
+inst_164:
+// rs1_val == -513,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x201; op2val:0x400000000; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x201, 0x400000000, 0xa, 1b, x1, 1120,0)
+
+inst_165:
+// rs1_val == -2049,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x801; op2val:0x3333333333333334; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x801, 0x3333333333333334, 0x0, 3f, x1, 1128,0)
+
+inst_166:
+// rs1_val == -4097,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x1001; op2val:-0x800000001; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x1001, -0x800000001, 0x8, 3f, x1, 1136,0)
+
+inst_167:
+// rs1_val == -16385,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x4001; op2val:-0x400000000001; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x4001, -0x400000000001, 0x6, 1b, x1, 1144,0)
+
+inst_168:
+// rs1_val == -32769,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x8001; op2val:-0x1; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x8001, -0x1, 0x556, 1b, x1, 1152,0)
+
+inst_169:
+// rs1_val == -65537,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x10001; op2val:-0x8001; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x10001, -0x8001, 0x400, 1b, x1, 1160,0)
+
+inst_170:
+// rs1_val == -262145,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x40001; op2val:-0x401; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x40001, -0x401, 0x200, 3f, x1, 1168,0)
+
+inst_171:
+// rs1_val == -2097153,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x200001; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x200001, 0x5555555555555555, 0x2, 1b, x1, 1176,0)
+
+inst_172:
+// rs1_val == -4194305,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x400001; op2val:-0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x400001, -0xb504f332, 0x0, 1b, x1, 1184,0)
+
+inst_173:
+// rs1_val == -8388609,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x800001; op2val:-0x200000001; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x800001, -0x200000001, 0x80, 3f, x1, 1192,0)
+
+inst_174:
+// rs1_val == -16777217,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x1000001; op2val:-0x41; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x1000001, -0x41, 0x40, 3f, x1, 1200,0)
+
+inst_175:
+// rs1_val == -33554433,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x2000001; op2val:0x80; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x2000001, 0x80, 0x100, 3f, x1, 1208,0)
+
+inst_176:
+// rs1_val == -134217729,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x8000001; op2val:0x200000; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x8000001, 0x200000, 0x556, 1b, x1, 1216,0)
+
+inst_177:
+// rs1_val == -4294967297,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x100000001; op2val:-0x40000000001; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x100000001, -0x40000000001, 0x8, 3f, x1, 1224,0)
+
+inst_178:
+// rs1_val == -8589934593,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x200000001; op2val:0x3333333333333333; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x200000001, 0x3333333333333333, 0x0, 1b, x1, 1232,0)
+
+inst_179:
+// rs1_val == -34359738369,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x800000001; op2val:0x40000; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x800000001, 0x40000, 0x400, 3f, x1, 1240,0)
+
+inst_180:
+// rs1_val == -68719476737,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x1000000001; op2val:0x800000000; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x1000000001, 0x800000000, 0x8, 3f, x1, 1248,0)
+
+inst_181:
+// rs1_val == -137438953473,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x2000000001; op2val:0x2000; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x2000000001, 0x2000, 0x8, 3f, x1, 1256,0)
+
+inst_182:
+// rs1_val == -1099511627777,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x10000000001; op2val:-0x4; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x10000000001, -0x4, 0x10, 3f, x1, 1264,0)
+
+inst_183:
+// rs1_val == -4398046511105,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x40000000001; op2val:0x8000000000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x40000000001, 0x8000000000, 0x4, 1b, x1, 1272,0)
+
+inst_184:
+// rs1_val == -17592186044417,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x100000000001; op2val:-0x800001; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x100000000001, -0x800001, 0x2, 3f, x1, 1280,0)
+
+inst_185:
+// rs1_val == -35184372088833,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x200000000001; op2val:0x20000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x200000000001, 0x20000, 0x4, 1b, x1, 1288,0)
+
+inst_186:
+// rs1_val == -140737488355329,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x800000000001; op2val:-0x40000001; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x800000000001, -0x40000001, 0x40, 3f, x1, 1296,0)
+
+inst_187:
+// rs1_val == -281474976710657,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x1000000000001; op2val:-0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x1000000000001, -0x5, 0x4, 1b, x1, 1304,0)
+
+inst_188:
+// rs1_val == -562949953421313,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x2000000000001; op2val:-0x20001; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x2000000000001, -0x20001, 0x400, 3f, x1, 1312,0)
+
+inst_189:
+// rs1_val == -4503599627370497,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x10000000000001; op2val:0x4000; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x10000000000001, 0x4000, 0xa, 1b, x1, 1320,0)
+
+inst_190:
+// rs1_val == -18014398509481985,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x40000000000001; op2val:-0x10000000000001; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x40000000000001, -0x10000000000001, 0x8, 3f, x1, 1328,0)
+
+inst_191:
+// rs1_val == -144115188075855873,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x200000000000001; op2val:-0x41; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x200000000000001, -0x41, 0x2, 3f, x1, 1336,0)
+
+inst_192:
+// rs1_val == -288230376151711745,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x400000000000001; op2val:0x0; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x400000000000001, 0x0, 0x20, 3f, x1, 1344,0)
+
+inst_193:
+// rs1_val == -576460752303423489,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x800000000000001; op2val:0x10000; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x800000000000001, 0x10000, 0x8, 3f, x1, 1352,0)
+
+inst_194:
+// rs1_val==3 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x3; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x3, 0x40, 3f, x1, 1360,0)
+
+inst_195:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555555; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x5555555555555555, 0x10, 3f, x1, 1368,0)
+
+inst_196:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555556; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, -0x5555555555555556, 0x10, 3f, x1, 1376,0)
+
+inst_197:
+// rs1_val==3 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x5; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x5, 0x200, 3f, x1, 1384,0)
+
+inst_198:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333333; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x3333333333333333, 0xa, 1b, x1, 1392,0)
+
+inst_199:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x6666666666666666, 0x0, 3f, x1, 1400,0)
+
+inst_200:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, -0xb504f333, 0x0, 1b, x1, 1408,0)
+
+inst_201:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0xb504f333, 0x4, 3f, x1, 1416,0)
+
+inst_202:
+// rs1_val==3 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x2, 0x8, 3f, x1, 1424,0)
+
+inst_203:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x5555555555555554, 0x2, 3f, x1, 1432,0)
+
+inst_204:
+// rs1_val==3 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x0; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x0, 0x100, 3f, x1, 1440,0)
+
+inst_205:
+// rs1_val==3 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x4, 0x4, 1b, x1, 1448,0)
+
+inst_206:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x3333333333333332, 0x400, 3f, x1, 1456,0)
+
+inst_207:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666665; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x6666666666666665, 0x40, 3f, x1, 1464,0)
+
+inst_208:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f332; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0xb504f332, 0xa, 1b, x1, 1472,0)
+
+inst_209:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x5555555555555556, 0x8, 3f, x1, 1480,0)
+
+inst_210:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:-0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, -0x5555555555555555, 0x4, 1b, x1, 1488,0)
+
+inst_211:
+// rs1_val==3 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x6, 0x20, 3f, x1, 1496,0)
+
+inst_212:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x3333333333333334; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x3333333333333334, 0x40, 3f, x1, 1504,0)
+
+inst_213:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0x6666666666666667, 0x4, 3f, x1, 1512,0)
+
+inst_214:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:-0xb504f332; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, -0xb504f332, 0x100, 3f, x1, 1520,0)
+
+inst_215:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3; op2val:0xb504f334; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3, 0xb504f334, 0x10, 3f, x1, 1528,0)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x3, 0x556, 1b, x1, 1536,0)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555555; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x200, 3f, x1, 1544,0)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, -0x5555555555555556, 0x2, 1b, x1, 1552,0)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x5, 0x400, 3f, x1, 1560,0)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333333; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x3333333333333333, 0x100, 3f, x1, 1568,0)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x6666666666666666, 0x0, 3f, x1, 1576,0)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f333; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, -0xb504f333, 0x40, 3f, x1, 1584,0)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0xb504f333, 0x4, 3f, x1, 1592,0)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x2, 0x10, 3f, x1, 1600,0)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555554; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x5555555555555554, 0x8, 3f, x1, 1608,0)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x0, 0x2, 3f, x1, 1616,0)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x4, 0x2, 3f, x1, 1624,0)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x3333333333333332, 0x2, 1b, x1, 1632,0)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x6666666666666665, 0x0, 1b, x1, 1640,0)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0xb504f332, 0x6, 3f, x1, 1648,0)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x5555555555555556, 0x556, 1b, x1, 1656,0)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, -0x5555555555555555, 0x4, 1b, x1, 1664,0)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x6, 0x80, 3f, x1, 1672,0)
+
+inst_234:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x3333333333333334, 0x2, 1b, x1, 1680,0)
+
+inst_235:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0x6666666666666667; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0x6666666666666667, 0x40, 3f, x1, 1688,0)
+
+inst_236:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:-0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, -0xb504f332, 0x400, 1b, x1, 1696,0)
+
+inst_237:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555555; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555555, 0xb504f334, 0x6, 1b, x1, 1704,0)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x3, 0x10, 3f, x1, 1712,0)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x5555555555555555, 0x100, 3f, x1, 1720,0)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, -0x5555555555555556, 0x40, 3f, x1, 1728,0)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x5, 0x200, 3f, x1, 1736,0)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x3333333333333333, 0x4, 3f, x1, 1744,0)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666666; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x6666666666666666, 0x20, 3f, x1, 1752,0)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, -0xb504f333, 0x4, 3f, x1, 1760,0)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f333; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0xb504f333, 0x10, 3f, x1, 1768,0)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x2; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x2, 0x20, 3f, x1, 1776,0)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x5555555555555554, 0x6, 1b, x1, 1784,0)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x0, 0x556, 1b, x1, 1792,0)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x4, 0x6, 1b, x1, 1800,0)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x3333333333333332, 0x2, 3f, x1, 1808,0)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x6666666666666665, 0x2, 1b, x1, 1816,0)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0xb504f332, 0x20, 3f, x1, 1824,0)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x5555555555555556, 0x100, 3f, x1, 1832,0)
+
+inst_254:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0x5555555555555555; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, -0x5555555555555555, 0x10, 3f, x1, 1840,0)
+
+inst_255:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x6, 0x4, 3f, x1, 1848,0)
+
+inst_256:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x3333333333333334, 0x400, 1b, x1, 1856,0)
+
+inst_257:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0x6666666666666667, 0x8, 3f, x1, 1864,0)
+
+inst_258:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:-0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, -0xb504f332, 0x8, 3f, x1, 1872,0)
+
+inst_259:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555556; op2val:0xb504f334; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555556, 0xb504f334, 0x2, 3f, x1, 1880,0)
+
+inst_260:
+// rs1_val==5 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x3, 0x8, 1b, x1, 1888,0)
+
+inst_261:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555555; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x5555555555555555, 0x80, 3f, x1, 1896,0)
+
+inst_262:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555556; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, -0x5555555555555556, 0x20, 3f, x1, 1904,0)
+
+inst_263:
+// rs1_val==5 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x5; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x5, 0x400, 1b, x1, 1912,0)
+
+inst_264:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333333; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x3333333333333333, 0x20, 3f, x1, 1920,0)
+
+inst_265:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x6666666666666666, 0x0, 1b, x1, 1928,0)
+
+inst_266:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, -0xb504f333, 0x4, 3f, x1, 1936,0)
+
+inst_267:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0xb504f333, 0x400, 1b, x1, 1944,0)
+
+inst_268:
+// rs1_val==5 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x2; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x2, 0x400, 3f, x1, 1952,0)
+
+inst_269:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x5555555555555554, 0x2, 1b, x1, 1960,0)
+
+inst_270:
+// rs1_val==5 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x0; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x0, 0x8, 1b, x1, 1968,0)
+
+inst_271:
+// rs1_val==5 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x4; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x4, 0x200, 3f, x1, 1976,0)
+
+inst_272:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333332; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x3333333333333332, 0x6, 3f, x1, 1984,0)
+
+inst_273:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x6666666666666665, 0x6, 1b, x1, 1992,0)
+
+inst_274:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f332; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0xb504f332, 0x80, 3f, x1, 2000,0)
+
+inst_275:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x5555555555555556, 0x0, 1b, x1, 2008,0)
+
+inst_276:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:-0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, -0x5555555555555555, 0x4, 3f, x1, 2016,0)
+
+inst_277:
+// rs1_val==5 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x6, 0x8, 1b, x1, 2024,0)
+
+inst_278:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x3333333333333334; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x3333333333333334, 0x20, 3f, x1, 2032,0)
+
+inst_279:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0x6666666666666667, 0x6, 1b, x1, 2040,0)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_280:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:-0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, -0xb504f332, 0x8, 3f, x1, 0,0)
+
+inst_281:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5, 0xb504f334, 0x0, 1b, x1, 8,0)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x3, 0x4, 1b, x1, 16,0)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555555; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x5555555555555555, 0xa, 1b, x1, 24,0)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, -0x5555555555555556, 0x2, 3f, x1, 32,0)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x5, 0x100, 3f, x1, 40,0)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x400, 3f, x1, 48,0)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x6666666666666666, 0x0, 3f, x1, 56,0)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, -0xb504f333, 0x400, 3f, x1, 64,0)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0xb504f333, 0x400, 1b, x1, 72,0)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x2, 0x8, 3f, x1, 80,0)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x5555555555555554, 0x4, 1b, x1, 88,0)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x0, 0x556, 1b, x1, 96,0)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x4, 0x10, 3f, x1, 104,0)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333332; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x3333333333333332, 0x10, 3f, x1, 112,0)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666665; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x6666666666666665, 0x40, 3f, x1, 120,0)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0xb504f332, 0x400, 1b, x1, 128,0)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x5555555555555556, 0x556, 1b, x1, 136,0)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, -0x5555555555555555, 0x2, 1b, x1, 144,0)
+
+inst_299:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x6, 0x400, 3f, x1, 152,0)
+
+inst_300:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x3333333333333334; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x3333333333333334, 0xa, 1b, x1, 160,0)
+
+inst_301:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0x6666666666666667; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0x6666666666666667, 0x10, 3f, x1, 168,0)
+
+inst_302:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:-0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, -0xb504f332, 0x10, 3f, x1, 176,0)
+
+inst_303:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333333; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333333, 0xb504f334, 0x0, 3f, x1, 184,0)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x3, 0xa, 1b, x1, 192,0)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x5555555555555555, 0x4, 3f, x1, 200,0)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, -0x5555555555555556, 0x80, 3f, x1, 208,0)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x5, 0x80, 3f, x1, 216,0)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333333; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x3333333333333333, 0xa, 1b, x1, 224,0)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666666; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x2, 1b, x1, 232,0)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f333; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, -0xb504f333, 0x400, 1b, x1, 240,0)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0xb504f333, 0x8, 1b, x1, 248,0)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x2, 0x2, 1b, x1, 256,0)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555554; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x5555555555555554, 0x10, 3f, x1, 264,0)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x0; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x0, 0xa, 1b, x1, 272,0)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x4, 0x10, 3f, x1, 280,0)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x3333333333333332, 0x400, 1b, x1, 288,0)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666665; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x6666666666666665, 0x20, 3f, x1, 296,0)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0xb504f332, 0x6, 1b, x1, 304,0)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x5555555555555556, 0x100, 3f, x1, 312,0)
+
+inst_320:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, -0x5555555555555555, 0x0, 1b, x1, 320,0)
+
+inst_321:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x6, 0x8, 3f, x1, 328,0)
+
+inst_322:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x3333333333333334, 0x4, 3f, x1, 336,0)
+
+inst_323:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0x6666666666666667, 0x6, 1b, x1, 344,0)
+
+inst_324:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:-0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, -0xb504f332, 0x8, 1b, x1, 352,0)
+
+inst_325:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666666; op2val:0xb504f334; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666666, 0xb504f334, 0x2, 3f, x1, 360,0)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x3, 0x400, 3f, x1, 368,0)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x5555555555555555, 0x556, 1b, x1, 376,0)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555556; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, -0x5555555555555556, 0x20, 3f, x1, 384,0)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x5, 0x2, 3f, x1, 392,0)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333333; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x3333333333333333, 0x10, 3f, x1, 400,0)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666666; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x6666666666666666, 0x400, 3f, x1, 408,0)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, -0xb504f333, 0x8, 3f, x1, 416,0)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0xb504f333, 0x80, 3f, x1, 424,0)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x2; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x2, 0x6, 3f, x1, 432,0)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x5555555555555554, 0x6, 3f, x1, 440,0)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x0, 0x400, 1b, x1, 448,0)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x4, 0x556, 1b, x1, 456,0)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x3333333333333332, 0x8, 3f, x1, 464,0)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x6666666666666665, 0x6, 1b, x1, 472,0)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f332; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0xb504f332, 0x40, 3f, x1, 480,0)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x5555555555555556, 0x400, 1b, x1, 488,0)
+
+inst_342:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0x5555555555555555; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, -0x5555555555555555, 0x10, 3f, x1, 496,0)
+
+inst_343:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x6, 0x8, 1b, x1, 504,0)
+
+inst_344:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x3333333333333334, 0x4, 1b, x1, 512,0)
+
+inst_345:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0x6666666666666667, 0x0, 3f, x1, 520,0)
+
+inst_346:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:-0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, -0xb504f332, 0x0, 1b, x1, 528,0)
+
+inst_347:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f333; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f333, 0xb504f334, 0x6, 1b, x1, 536,0)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x3, 0x40, 3f, x1, 544,0)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x5555555555555555, 0x4, 1b, x1, 552,0)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555556; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, -0x5555555555555556, 0xa, 1b, x1, 560,0)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x5, 0x40, 3f, x1, 568,0)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333333; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x3333333333333333, 0x100, 3f, x1, 576,0)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666666; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x6666666666666666, 0x2, 3f, x1, 584,0)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f333; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, -0xb504f333, 0x40, 3f, x1, 592,0)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0xb504f333, 0x4, 3f, x1, 600,0)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x2; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x2, 0x556, 1b, x1, 608,0)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x5555555555555554, 0x2, 1b, x1, 616,0)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x0, 0x40, 3f, x1, 624,0)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x4, 0x6, 3f, x1, 632,0)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x3333333333333332, 0x8, 3f, x1, 640,0)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x6666666666666665, 0x2, 1b, x1, 648,0)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0xb504f332, 0x556, 1b, x1, 656,0)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x5555555555555556, 0x556, 1b, x1, 664,0)
+
+inst_364:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, -0x5555555555555555, 0x8, 3f, x1, 672,0)
+
+inst_365:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x6, 0x6, 3f, x1, 680,0)
+
+inst_366:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x3333333333333334; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x3333333333333334, 0x80, 3f, x1, 688,0)
+
+inst_367:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0x6666666666666667; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0x6666666666666667, 0x80, 3f, x1, 696,0)
+
+inst_368:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:-0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, -0xb504f332, 0x400, 1b, x1, 704,0)
+
+inst_369:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f333; op2val:0xb504f334; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f333, 0xb504f334, 0x100, 3f, x1, 712,0)
+
+inst_370:
+// rs1_val==2 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x3, 0x2, 3f, x1, 720,0)
+
+inst_371:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x5555555555555555, 0x8, 3f, x1, 728,0)
+
+inst_372:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, -0x5555555555555556, 0x6, 1b, x1, 736,0)
+
+inst_373:
+// rs1_val==2 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x5, 0x4, 3f, x1, 744,0)
+
+inst_374:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333333; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x3333333333333333, 0x8, 3f, x1, 752,0)
+
+inst_375:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666666; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x6666666666666666, 0x8, 1b, x1, 760,0)
+
+inst_376:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f333; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, -0xb504f333, 0x20, 3f, x1, 768,0)
+
+inst_377:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f333; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0xb504f333, 0x556, 1b, x1, 776,0)
+
+inst_378:
+// rs1_val==2 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x2, 0x0, 1b, x1, 784,0)
+
+inst_379:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555554; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x5555555555555554, 0x20, 3f, x1, 792,0)
+
+inst_380:
+// rs1_val==2 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x0; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x0, 0x20, 3f, x1, 800,0)
+
+inst_381:
+// rs1_val==2 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x4, 0x20, 3f, x1, 808,0)
+
+inst_382:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x3333333333333332, 0x8, 3f, x1, 816,0)
+
+inst_383:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x6666666666666665, 0x6, 1b, x1, 824,0)
+
+inst_384:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f332; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0xb504f332, 0xa, 1b, x1, 832,0)
+
+inst_385:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x5555555555555556, 0x2, 3f, x1, 840,0)
+
+inst_386:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:-0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, -0x5555555555555555, 0x8, 3f, x1, 848,0)
+
+inst_387:
+// rs1_val==2 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x6, 0x8, 1b, x1, 856,0)
+
+inst_388:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x3333333333333334; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x3333333333333334, 0x2, 3f, x1, 864,0)
+
+inst_389:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0x6666666666666667, 0x4, 1b, x1, 872,0)
+
+inst_390:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:-0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, -0xb504f332, 0x400, 3f, x1, 880,0)
+
+inst_391:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x2; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x2, 0xb504f334, 0x0, 3f, x1, 888,0)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x3, 0x2, 3f, x1, 896,0)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555555; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x5555555555555555, 0x10, 3f, x1, 904,0)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, -0x5555555555555556, 0x2, 3f, x1, 912,0)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x5, 0x40, 3f, x1, 920,0)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x3333333333333333, 0x400, 1b, x1, 928,0)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666666; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x6666666666666666, 0x80, 3f, x1, 936,0)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f333; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, -0xb504f333, 0x80, 3f, x1, 944,0)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f333; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0xb504f333, 0x556, 1b, x1, 952,0)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x2; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x2, 0x10, 3f, x1, 960,0)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555554; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x4, 1b, x1, 968,0)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x0; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x0, 0x10, 3f, x1, 976,0)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x4; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x4, 0x2, 3f, x1, 984,0)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333332; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x3333333333333332, 0x20, 3f, x1, 992,0)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x6666666666666665, 0x0, 1b, x1, 1000,0)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0xb504f332, 0x20, 3f, x1, 1008,0)
+
+inst_407:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x5555555555555556; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x20, 3f, x1, 1016,0)
+
+inst_408:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, -0x5555555555555555, 0x6, 1b, x1, 1024,0)
+
+inst_409:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x6, 0x4, 1b, x1, 1032,0)
+
+inst_410:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x3333333333333334; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x3333333333333334, 0x0, 1b, x1, 1040,0)
+
+inst_411:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0x6666666666666667, 0x8, 1b, x1, 1048,0)
+
+inst_412:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:-0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, -0xb504f332, 0x8, 3f, x1, 1056,0)
+
+inst_413:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555554; op2val:0xb504f334; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555554, 0xb504f334, 0xa, 1b, x1, 1064,0)
+
+inst_414:
+// rs1_val==0 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x3, 0x4, 1b, x1, 1072,0)
+
+inst_415:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555555; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x5555555555555555, 0xa, 1b, x1, 1080,0)
+
+inst_416:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, -0x5555555555555556, 0x0, 1b, x1, 1088,0)
+
+inst_417:
+// rs1_val==0 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x5; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x5, 0x20, 3f, x1, 1096,0)
+
+inst_418:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x3333333333333333, 0x6, 1b, x1, 1104,0)
+
+inst_419:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666666; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x6666666666666666, 0x10, 3f, x1, 1112,0)
+
+inst_420:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, -0xb504f333, 0x8, 1b, x1, 1120,0)
+
+inst_421:
+// rs1_val==4 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x3; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x3, 0x40, 3f, x1, 1128,0)
+
+inst_422:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x5555555555555555, 0x8, 1b, x1, 1136,0)
+
+inst_423:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, -0x5555555555555556, 0x6, 3f, x1, 1144,0)
+
+inst_424:
+// rs1_val==4 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x5, 0x4, 3f, x1, 1152,0)
+
+inst_425:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x3333333333333333, 0x6, 1b, x1, 1160,0)
+
+inst_426:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666666; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x6666666666666666, 0x20, 3f, x1, 1168,0)
+
+inst_427:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, -0xb504f333, 0x2, 1b, x1, 1176,0)
+
+inst_428:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0xb504f333, 0x0, 1b, x1, 1184,0)
+
+inst_429:
+// rs1_val==4 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x2, 0x8, 3f, x1, 1192,0)
+
+inst_430:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555554; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x5555555555555554, 0x40, 3f, x1, 1200,0)
+
+inst_431:
+// rs1_val==4 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x0, 0x6, 3f, x1, 1208,0)
+
+inst_432:
+// rs1_val==4 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x4; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x4, 0x556, 1b, x1, 1216,0)
+
+inst_433:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333332; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x3333333333333332, 0x80, 3f, x1, 1224,0)
+
+inst_434:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x6666666666666665, 0x6, 3f, x1, 1232,0)
+
+inst_435:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0xb504f332, 0x6, 1b, x1, 1240,0)
+
+inst_436:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x5555555555555556, 0x4, 1b, x1, 1248,0)
+
+inst_437:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:-0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, -0x5555555555555555, 0x6, 1b, x1, 1256,0)
+
+inst_438:
+// rs1_val==4 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x6, 0x0, 3f, x1, 1264,0)
+
+inst_439:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x3333333333333334, 0x4, 3f, x1, 1272,0)
+
+inst_440:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0x6666666666666667; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0x6666666666666667, 0x556, 1b, x1, 1280,0)
+
+inst_441:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:-0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, -0xb504f332, 0x20, 3f, x1, 1288,0)
+
+inst_442:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x4; op2val:0xb504f334; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x4, 0xb504f334, 0x80, 3f, x1, 1296,0)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x3, 0x400, 1b, x1, 1304,0)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555555; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x5555555555555555, 0x8, 3f, x1, 1312,0)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, -0x5555555555555556, 0x4, 3f, x1, 1320,0)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x5, 0x4, 3f, x1, 1328,0)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x3333333333333333, 0x4, 3f, x1, 1336,0)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x6666666666666666, 0x6, 1b, x1, 1344,0)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, -0xb504f333, 0x6, 3f, x1, 1352,0)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f333; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0xb504f333, 0xa, 1b, x1, 1360,0)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x2, 0x100, 3f, x1, 1368,0)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555554; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x5555555555555554, 0xa, 1b, x1, 1376,0)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x0; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x0, 0x4, 3f, x1, 1384,0)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x4; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x4, 0x10, 3f, x1, 1392,0)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333332; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x200, 3f, x1, 1400,0)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666665; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x6666666666666665, 0x8, 1b, x1, 1408,0)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f332; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0xb504f332, 0x4, 3f, x1, 1416,0)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x5555555555555556, 0x4, 3f, x1, 1424,0)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, -0x5555555555555555, 0x400, 1b, x1, 1432,0)
+
+inst_460:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x6, 0x20, 3f, x1, 1440,0)
+
+inst_461:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x3333333333333334, 0x4, 3f, x1, 1448,0)
+
+inst_462:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0x6666666666666667; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0x6666666666666667, 0x556, 1b, x1, 1456,0)
+
+inst_463:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:-0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, -0xb504f332, 0x8, 3f, x1, 1464,0)
+
+inst_464:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333332; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333332, 0xb504f334, 0x0, 1b, x1, 1472,0)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x3, 0xa, 1b, x1, 1480,0)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555555; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x5555555555555555, 0x556, 1b, x1, 1488,0)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, -0x5555555555555556, 0x2, 3f, x1, 1496,0)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x5, 0x2, 1b, x1, 1504,0)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333333; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x3333333333333333, 0x2, 1b, x1, 1512,0)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666666; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x6666666666666666, 0x40, 3f, x1, 1520,0)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, -0xb504f333, 0x6, 1b, x1, 1528,0)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0xb504f333, 0x0, 1b, x1, 1536,0)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x2, 0x4, 3f, x1, 1544,0)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x0; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x0, 0x80, 3f, x1, 1552,0)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x4; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x4, 0x8, 1b, x1, 1560,0)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x3333333333333332, 0x8, 3f, x1, 1568,0)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666665; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x4, 1b, x1, 1576,0)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0xb504f332, 0x0, 1b, x1, 1584,0)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x5555555555555556, 0x8, 3f, x1, 1592,0)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, -0x5555555555555555, 0x6, 3f, x1, 1600,0)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x6, 0x80, 3f, x1, 1608,0)
+
+inst_482:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x3333333333333334, 0x8, 1b, x1, 1616,0)
+
+inst_483:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0x6666666666666667, 0x6, 1b, x1, 1624,0)
+
+inst_484:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:-0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, -0xb504f332, 0x2, 3f, x1, 1632,0)
+
+inst_485:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666665; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666665, 0xb504f334, 0x6, 1b, x1, 1640,0)
+
+inst_486:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x3, 0x8, 3f, x1, 1648,0)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555555; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x5555555555555555, 0xa, 1b, x1, 1656,0)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, -0x5555555555555556, 0x6, 1b, x1, 1664,0)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x5, 0x8, 1b, x1, 1672,0)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x3333333333333333, 0x6, 1b, x1, 1680,0)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666666; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x6666666666666666, 0x80, 3f, x1, 1688,0)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, -0xb504f333, 0x4, 1b, x1, 1696,0)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0xb504f333, 0x8, 1b, x1, 1704,0)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x2; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x2, 0x8, 1b, x1, 1712,0)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555554; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x5555555555555554, 0x20, 3f, x1, 1720,0)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x0, 0x556, 1b, x1, 1728,0)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x4; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x4, 0x0, 3f, x1, 1736,0)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x3333333333333332, 0x0, 3f, x1, 1744,0)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666665; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x6666666666666665, 0xa, 1b, x1, 1752,0)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f332; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0xb504f332, 0x556, 1b, x1, 1760,0)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x5555555555555556, 0x4, 3f, x1, 1768,0)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0x5555555555555555; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, -0x5555555555555555, 0x80, 3f, x1, 1776,0)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x6, 0x10, 3f, x1, 1784,0)
+
+inst_504:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x3333333333333334; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x3333333333333334, 0x100, 3f, x1, 1792,0)
+
+inst_505:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0x6666666666666667; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0x6666666666666667, 0x100, 3f, x1, 1800,0)
+
+inst_506:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:-0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, -0xb504f332, 0x8, 1b, x1, 1808,0)
+
+inst_507:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f332; op2val:0xb504f334; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f332, 0xb504f334, 0x4, 3f, x1, 1816,0)
+
+inst_508:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x3, 0x0, 3f, x1, 1824,0)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x5555555555555555, 0x2, 3f, x1, 1832,0)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555556; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, -0x5555555555555556, 0x100, 3f, x1, 1840,0)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x5, 0x0, 3f, x1, 1848,0)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x3333333333333333, 0x4, 3f, x1, 1856,0)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666666; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x6666666666666666, 0x400, 3f, x1, 1864,0)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, -0xb504f333, 0x4, 3f, x1, 1872,0)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0xb504f333, 0x6, 1b, x1, 1880,0)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x2, 0x2, 3f, x1, 1888,0)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555554; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x400, 3f, x1, 1896,0)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x0, 0x200, 3f, x1, 1904,0)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x4; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x4, 0x4, 3f, x1, 1912,0)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x3333333333333332, 0x8, 1b, x1, 1920,0)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666665; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x6666666666666665, 0x6, 3f, x1, 1928,0)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0xb504f332, 0x20, 3f, x1, 1936,0)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x5555555555555556; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x4, 1b, x1, 1944,0)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, -0x5555555555555555, 0x400, 1b, x1, 1952,0)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x6, 0x556, 1b, x1, 1960,0)
+
+inst_526:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x3333333333333334, 0x4, 1b, x1, 1968,0)
+
+inst_527:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0x6666666666666667; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0x6666666666666667, 0x4, 3f, x1, 1976,0)
+
+inst_528:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:-0xb504f332; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, -0xb504f332, 0x0, 3f, x1, 1984,0)
+
+inst_529:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x5555555555555556; op2val:0xb504f334; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x5555555555555556, 0xb504f334, 0x4, 3f, x1, 1992,0)
+
+inst_530:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x3, 0x4, 3f, x1, 2000,0)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555555; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x5555555555555555, 0x0, 3f, x1, 2008,0)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555556; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, -0x5555555555555556, 0x80, 3f, x1, 2016,0)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x5, 0x556, 1b, x1, 2024,0)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333333; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x3333333333333333, 0x80, 3f, x1, 2032,0)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666666; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x6666666666666666, 0x0, 1b, x1, 2040,0)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f333; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, -0xb504f333, 0x6, 1b, x1, 0,0)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f333; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0xb504f333, 0x10, 3f, x1, 8,0)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x2; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x2, 0x80, 3f, x1, 16,0)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x5555555555555554, 0x0, 1b, x1, 24,0)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x0; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x0, 0x400, 1b, x1, 32,0)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x4; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x4, 0x80, 3f, x1, 40,0)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x3333333333333332, 0x0, 3f, x1, 48,0)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666665; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x6666666666666665, 0x8, 1b, x1, 56,0)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0xb504f332, 0x2, 3f, x1, 64,0)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x5555555555555556, 0x6, 3f, x1, 72,0)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, -0x5555555555555555, 0x100, 3f, x1, 80,0)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x6, 0x80, 3f, x1, 88,0)
+
+inst_548:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x3333333333333334; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x3333333333333334, 0x0, 3f, x1, 96,0)
+
+inst_549:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666665; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x6666666666666665, 0x8, 1b, x1, 104,0)
+
+inst_550:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0x6666666666666667; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0x6666666666666667, 0x10, 3f, x1, 112,0)
+
+inst_551:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:-0xb504f332; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, -0xb504f332, 0x8, 3f, x1, 120,0)
+
+inst_552:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:-0x5555555555555555; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0x5555555555555555, 0xb504f334, 0x0, 1b, x1, 128,0)
+
+inst_553:
+// rs1_val==6 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x3; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x3, 0x8, 1b, x1, 136,0)
+
+inst_554:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x5555555555555555, 0x100, 3f, x1, 144,0)
+
+inst_555:
+// rs1_val==6 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x5; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x5, 0x2, 1b, x1, 152,0)
+
+inst_556:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333333; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x3333333333333333, 0x40, 3f, x1, 160,0)
+
+inst_557:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x6666666666666666, 0x6, 1b, x1, 168,0)
+
+inst_558:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, -0xb504f333, 0x4, 3f, x1, 176,0)
+
+inst_559:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f333; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0xb504f333, 0x100, 3f, x1, 184,0)
+
+inst_560:
+// rs1_val==6 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x2, 0x100, 3f, x1, 192,0)
+
+inst_561:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555554; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x5555555555555554, 0x200, 3f, x1, 200,0)
+
+inst_562:
+// rs1_val==6 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x0; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x0, 0x6, 3f, x1, 208,0)
+
+inst_563:
+// rs1_val==6 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x4; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x4, 0x400, 3f, x1, 216,0)
+
+inst_564:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333332; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x3333333333333332, 0x0, 3f, x1, 224,0)
+
+inst_565:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666665; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x6666666666666665, 0x2, 1b, x1, 232,0)
+
+inst_566:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0xb504f332, 0x2, 3f, x1, 240,0)
+
+inst_567:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x5555555555555556; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x5555555555555556, 0x8, 1b, x1, 248,0)
+
+inst_568:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:-0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, -0x5555555555555555, 0x6, 3f, x1, 256,0)
+
+inst_569:
+// rs1_val==6 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x6; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x6, 0x80, 3f, x1, 264,0)
+
+inst_570:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x3333333333333334, 0x8, 3f, x1, 272,0)
+
+inst_571:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x6666666666666667; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x6666666666666667, 0x6, 1b, x1, 280,0)
+
+inst_572:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:-0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, -0xb504f332, 0x6, 1b, x1, 288,0)
+
+inst_573:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0xb504f334; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0xb504f334, 0x40, 3f, x1, 296,0)
+
+inst_574:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x3, 0x2, 3f, x1, 304,0)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x5555555555555555, 0x400, 3f, x1, 312,0)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555556; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, -0x5555555555555556, 0x400, 1b, x1, 320,0)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x5, 0x40, 3f, x1, 328,0)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333333; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x3333333333333333, 0x400, 3f, x1, 336,0)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666666; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x6666666666666666, 0x8, 3f, x1, 344,0)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, -0xb504f333, 0x4, 3f, x1, 352,0)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0xb504f333, 0x0, 3f, x1, 360,0)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x2; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x2, 0x100, 3f, x1, 368,0)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555554; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x5555555555555554, 0x0, 1b, x1, 376,0)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x0, 0x2, 1b, x1, 384,0)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x4, 0x20, 3f, x1, 392,0)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333332; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x3333333333333332, 0x4, 3f, x1, 400,0)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x6666666666666665, 0x0, 1b, x1, 408,0)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f332; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0xb504f332, 0x20, 3f, x1, 416,0)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x5555555555555556; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x5555555555555556, 0x200, 3f, x1, 424,0)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0x5555555555555555; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, -0x5555555555555555, 0x200, 3f, x1, 432,0)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x6, 0x0, 3f, x1, 440,0)
+
+inst_592:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x3333333333333334; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x40, 3f, x1, 448,0)
+
+inst_593:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0x6666666666666667; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0x6666666666666667, 0xa, 1b, x1, 456,0)
+
+inst_594:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:-0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, -0xb504f332, 0x6, 3f, x1, 464,0)
+
+inst_595:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x3333333333333334; op2val:0xb504f334; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x3333333333333334, 0xb504f334, 0x0, 1b, x1, 472,0)
+
+inst_596:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x3, 0x200, 3f, x1, 480,0)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555555; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x5555555555555555, 0x4, 1b, x1, 488,0)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555556; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, -0x5555555555555556, 0x40, 3f, x1, 496,0)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x5, 0x0, 3f, x1, 504,0)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333333; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x3333333333333333, 0x6, 1b, x1, 512,0)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666666; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x6, 1b, x1, 520,0)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f333; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, -0xb504f333, 0xa, 1b, x1, 528,0)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f333; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0xb504f333, 0x0, 1b, x1, 536,0)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x2; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x2, 0x4, 1b, x1, 544,0)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555554; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x5555555555555554, 0x2, 1b, x1, 552,0)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x0; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x0, 0x2, 3f, x1, 560,0)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x4; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x4, 0x6, 3f, x1, 568,0)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333332; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x3333333333333332, 0x2, 1b, x1, 576,0)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666665; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x200, 3f, x1, 584,0)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0xb504f332, 0x400, 3f, x1, 592,0)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x5555555555555556; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x5555555555555556, 0x2, 1b, x1, 600,0)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0x5555555555555555; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, -0x5555555555555555, 0x100, 3f, x1, 608,0)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x6, 0x556, 1b, x1, 616,0)
+
+inst_614:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x3333333333333334; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x3333333333333334, 0x80, 3f, x1, 624,0)
+
+inst_615:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0x6666666666666667; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x20, 3f, x1, 632,0)
+
+inst_616:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:-0xb504f332; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, -0xb504f332, 0x6, 1b, x1, 640,0)
+
+inst_617:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x6666666666666667; op2val:0xb504f334; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6666666666666667, 0xb504f334, 0x200, 3f, x1, 648,0)
+
+inst_618:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x3, 0x20, 3f, x1, 656,0)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555555; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x5555555555555555, 0x400, 1b, x1, 664,0)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555556; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, -0x5555555555555556, 0x556, 1b, x1, 672,0)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x5, 0x8, 3f, x1, 680,0)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333333; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x3333333333333333, 0x556, 1b, x1, 688,0)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666666; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x6666666666666666, 0x556, 1b, x1, 696,0)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, -0xb504f333, 0x8, 3f, x1, 704,0)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f333; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0xb504f333, 0x4, 1b, x1, 712,0)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x2; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x2, 0xa, 1b, x1, 720,0)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555554; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x5555555555555554, 0x200, 3f, x1, 728,0)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x0; immval:0x556; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x0, 0x556, 1b, x1, 736,0)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x4; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x4, 0x20, 3f, x1, 744,0)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333332; immval:0x80; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x3333333333333332, 0x80, 3f, x1, 752,0)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666665; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x6666666666666665, 0x0, 1b, x1, 760,0)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0xb504f332, 0x400, 1b, x1, 768,0)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x5555555555555556; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x5555555555555556, 0x10, 3f, x1, 776,0)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0x5555555555555555; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, -0x5555555555555555, 0x200, 3f, x1, 784,0)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x6, 0x8, 3f, x1, 792,0)
+
+inst_636:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x3333333333333334; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x3333333333333334, 0x4, 3f, x1, 800,0)
+
+inst_637:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0x6666666666666667; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0x6666666666666667, 0x8, 3f, x1, 808,0)
+
+inst_638:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:-0xb504f332; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, -0xb504f332, 0x400, 1b, x1, 816,0)
+
+inst_639:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:-0xb504f332; op2val:0xb504f334; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, -0xb504f332, 0xb504f334, 0x20, 3f, x1, 824,0)
+
+inst_640:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x3, 0x6, 1b, x1, 832,0)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555555; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x5555555555555555, 0x6, 1b, x1, 840,0)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555556; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, -0x5555555555555556, 0x0, 1b, x1, 848,0)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x5, 0x100, 3f, x1, 856,0)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333333; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x3333333333333333, 0x20, 3f, x1, 864,0)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666666; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x6666666666666666, 0xa, 1b, x1, 872,0)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f333; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, -0xb504f333, 0x40, 3f, x1, 880,0)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f333; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0xb504f333, 0x2, 3f, x1, 888,0)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x2; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x2, 0x0, 3f, x1, 896,0)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555554; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x5555555555555554, 0x6, 3f, x1, 904,0)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x0; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x0, 0x200, 3f, x1, 912,0)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x4; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x4, 0xa, 1b, x1, 920,0)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333332; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x3333333333333332, 0xa, 1b, x1, 928,0)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666665; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x6666666666666665, 0x8, 3f, x1, 936,0)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f332; immval:0x10; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0xb504f332, 0x10, 3f, x1, 944,0)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x5555555555555556; immval:0xa; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x5555555555555556, 0xa, 1b, x1, 952,0)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0x5555555555555555; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, -0x5555555555555555, 0x2, 1b, x1, 960,0)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x6, 0x100, 3f, x1, 968,0)
+
+inst_658:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x3333333333333334; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x3333333333333334, 0x400, 3f, x1, 976,0)
+
+inst_659:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0x6666666666666667; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0x6666666666666667, 0x100, 3f, x1, 984,0)
+
+inst_660:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:-0xb504f332; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, -0xb504f332, 0x100, 3f, x1, 992,0)
+
+inst_661:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0xb504f334; op2val:0xb504f334; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0xb504f334, 0xb504f334, 0x100, 3f, x1, 1000,0)
+
+inst_662:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f333; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0xb504f333, 0x8, 1b, x1, 1008,0)
+
+inst_663:
+// rs1_val==0 and rs2_val==2,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x2; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x2, 0x2, 1b, x1, 1016,0)
+
+inst_664:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555554; immval:0x100; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x5555555555555554, 0x100, 3f, x1, 1024,0)
+
+inst_665:
+// rs1_val==0 and rs2_val==0,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x0; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x0, 0x40, 3f, x1, 1032,0)
+
+inst_666:
+// rs1_val==0 and rs2_val==4,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x4; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x4, 0x40, 3f, x1, 1040,0)
+
+inst_667:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333332; immval:0x400; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x3333333333333332, 0x400, 3f, x1, 1048,0)
+
+inst_668:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f332; immval:0x2; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0xb504f332, 0x2, 3f, x1, 1056,0)
+
+inst_669:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x5555555555555556; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x5555555555555556, 0x6, 1b, x1, 1064,0)
+
+inst_670:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0x5555555555555555; immval:0x200; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, -0x5555555555555555, 0x200, 3f, x1, 1072,0)
+
+inst_671:
+// rs1_val==0 and rs2_val==6,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x6; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x6, 0x20, 3f, x1, 1080,0)
+
+inst_672:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x3333333333333334; immval:0x8; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x3333333333333334, 0x8, 1b, x1, 1088,0)
+
+inst_673:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0x6666666666666667; immval:0x0; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0x6666666666666667, 0x0, 3f, x1, 1096,0)
+
+inst_674:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:-0xb504f332; immval:0x40; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, -0xb504f332, 0x40, 3f, x1, 1104,0)
+
+inst_675:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: bne, op1:x10; op2:x11; op1val:0x0; op2val:0xb504f334; immval:0x6; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x0, 0xb504f334, 0x6, 1b, x1, 1112,0)
+
+inst_676:
+// rs1_val < rs2_val and imm_val < 0 and imm_val & 0x03 == 0, rs2_val == 1073741824
+// opcode: bne, op1:x10; op2:x11; op1val:0x6; op2val:0x40000000; immval:0x4; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x6, 0x40000000, 0x4, 1b, x1, 1120,0)
+
+inst_677:
+// rs2_val == 2, rs1_val == 35184372088832
+// opcode: bne, op1:x10; op2:x11; op1val:0x200000000000; op2val:0x2; immval:0x20; align:0
+TEST_BRANCH_OP(bne, x2, x10, x11, 0x200000000000, 0x2, 0x20, 3f, x1, 1128,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x12_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x12_1:
+ .fill 24*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 142*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/fence-01.S b/riscof/suite/rv64i_m/I/fence-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..432c60629291bc7f11737bb64a93329f28c1a0b9
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/fence-01.S
@@ -0,0 +1,63 @@
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the fence instruction of the RISC-V I extension.
+//
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",fence)
+
+la x9,rvtest_data_store
+li x8, 0xffffffff
+li x7, 0xaaaaaaaa
+
+sw x8, 0(x9)
+sw x7, 4(x9)
+
+fence
+
+lw x3, 0(x9)
+lw x4, 4(x9)
+
+la x9, signature_x9_1
+
+sw x4, 0(x9)
+sw x3, 4(x9)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+.align 4
+rvtest_data_store:
+.word 0xbabecafe
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+signature_x9_1:
+ .fill 2,4,0xdeadbeef
+
+#ifdef rvtest_gpr_save
+gpr_save:
+ .fill 32*(XLEN/32), 4, 0xdeadbeef
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/jal-01.S b/riscof/suite/rv64i_m/I/jal-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..cae9b1cba197d607c3f6ccf39ab9931555090f5c
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/jal-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.0
+// timestamp : Fri Dec 4 15:23:49 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the jal instruction of the RISC-V I extension for the jal covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",jal)
+
+RVTEST_SIGBASE( x7,signature_x7_1)
+
+inst_0:
+// rd==x15, imm_val < 0,
+// opcode: jal; dest:x15; immval:0x4; align:0
+TEST_JAL_OP(x12, x15, 0x4, 1b, x7, 0,0)
+
+inst_1:
+// rd==x0, imm_val > 0,
+// opcode: jal; dest:x0; immval:0x10000; align:0
+TEST_JAL_OP(x12, x0, 0x10000, 3f, x7, 8,0)
+
+inst_2:
+// rd==x10, imm_val == (-(2**(18))),
+// opcode: jal; dest:x10; immval:0x40000; align:0
+TEST_JAL_OP(x12, x10, 0x40000, 1b, x7, 16,0)
+
+inst_3:
+// rd==x31, imm_val == ((2**(18))),
+// opcode: jal; dest:x31; immval:0x40000; align:0
+TEST_JAL_OP(x12, x31, 0x40000, 3f, x7, 24,0)
+
+inst_4:
+// rd==x14,
+// opcode: jal; dest:x14; immval:0x0; align:0
+TEST_JAL_OP(x12, x14, 0x0, 3f, x7, 32,0)
+
+inst_5:
+// rd==x24,
+// opcode: jal; dest:x24; immval:0x0; align:0
+TEST_JAL_OP(x12, x24, 0x0, 3f, x7, 40,0)
+
+inst_6:
+// rd==x18,
+// opcode: jal; dest:x18; immval:0x0; align:0
+TEST_JAL_OP(x12, x18, 0x0, 3f, x7, 48,0)
+
+inst_7:
+// rd==x6,
+// opcode: jal; dest:x6; immval:0x0; align:0
+TEST_JAL_OP(x12, x6, 0x0, 3f, x7, 56,0)
+
+inst_8:
+// rd==x22,
+// opcode: jal; dest:x22; immval:0x0; align:0
+TEST_JAL_OP(x12, x22, 0x0, 3f, x7, 64,0)
+
+inst_9:
+// rd==x26,
+// opcode: jal; dest:x26; immval:0x0; align:0
+TEST_JAL_OP(x12, x26, 0x0, 3f, x7, 72,0)
+
+inst_10:
+// rd==x21,
+// opcode: jal; dest:x21; immval:0x0; align:0
+TEST_JAL_OP(x12, x21, 0x0, 3f, x7, 80,0)
+
+inst_11:
+// rd==x30,
+// opcode: jal; dest:x30; immval:0x0; align:0
+TEST_JAL_OP(x12, x30, 0x0, 3f, x7, 88,0)
+
+inst_12:
+// rd==x27,
+// opcode: jal; dest:x27; immval:0x0; align:0
+TEST_JAL_OP(x12, x27, 0x0, 3f, x7, 96,0)
+
+inst_13:
+// rd==x23,
+// opcode: jal; dest:x23; immval:0x0; align:0
+TEST_JAL_OP(x12, x23, 0x0, 3f, x7, 104,0)
+
+inst_14:
+// rd==x5,
+// opcode: jal; dest:x5; immval:0x0; align:0
+TEST_JAL_OP(x12, x5, 0x0, 3f, x7, 112,0)
+
+inst_15:
+// rd==x9,
+// opcode: jal; dest:x9; immval:0x0; align:0
+TEST_JAL_OP(x12, x9, 0x0, 3f, x7, 120,0)
+
+inst_16:
+// rd==x3,
+// opcode: jal; dest:x3; immval:0x0; align:0
+TEST_JAL_OP(x12, x3, 0x0, 3f, x7, 128,0)
+
+inst_17:
+// rd==x4,
+// opcode: jal; dest:x4; immval:0x0; align:0
+TEST_JAL_OP(x12, x4, 0x0, 3f, x7, 136,0)
+
+inst_18:
+// rd==x2,
+// opcode: jal; dest:x2; immval:0x0; align:0
+TEST_JAL_OP(x12, x2, 0x0, 3f, x7, 144,0)
+
+inst_19:
+// rd==x13,
+// opcode: jal; dest:x13; immval:0x0; align:0
+TEST_JAL_OP(x12, x13, 0x0, 3f, x7, 152,0)
+
+inst_20:
+// rd==x1,
+// opcode: jal; dest:x1; immval:0x0; align:0
+TEST_JAL_OP(x12, x1, 0x0, 3f, x7, 160,0)
+
+inst_21:
+// rd==x11,
+// opcode: jal; dest:x11; immval:0x0; align:0
+TEST_JAL_OP(x12, x11, 0x0, 3f, x7, 168,0)
+
+inst_22:
+// rd==x8,
+// opcode: jal; dest:x8; immval:0x0; align:0
+TEST_JAL_OP(x12, x8, 0x0, 3f, x7, 176,0)
+
+inst_23:
+// rd==x29,
+// opcode: jal; dest:x29; immval:0x0; align:0
+TEST_JAL_OP(x12, x29, 0x0, 3f, x7, 184,0)
+
+inst_24:
+// rd==x16,
+// opcode: jal; dest:x16; immval:0x0; align:0
+TEST_JAL_OP(x12, x16, 0x0, 3f, x7, 192,0)
+
+inst_25:
+// rd==x17,
+// opcode: jal; dest:x17; immval:0x0; align:0
+TEST_JAL_OP(x12, x17, 0x0, 3f, x7, 200,0)
+
+inst_26:
+// rd==x20,
+// opcode: jal; dest:x20; immval:0x0; align:0
+TEST_JAL_OP(x12, x20, 0x0, 3f, x7, 208,0)
+
+inst_27:
+// rd==x25,
+// opcode: jal; dest:x25; immval:0x0; align:0
+TEST_JAL_OP(x12, x25, 0x0, 3f, x7, 216,0)
+
+inst_28:
+// rd==x12,
+// opcode: jal; dest:x12; immval:0x0; align:0
+TEST_JAL_OP(x2, x12, 0x0, 3f, x7, 224,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_29:
+// rd==x7,
+// opcode: jal; dest:x7; immval:0x0; align:0
+TEST_JAL_OP(x2, x7, 0x0, 3f, x1, 0,0)
+
+inst_30:
+// rd==x28,
+// opcode: jal; dest:x28; immval:0x0; align:0
+TEST_JAL_OP(x2, x28, 0x0, 3f, x1, 8,0)
+
+inst_31:
+// rd==x19,
+// opcode: jal; dest:x19; immval:0x0; align:0
+TEST_JAL_OP(x2, x19, 0x0, 3f, x1, 16,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x7_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_1:
+ .fill 29*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 3*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/jalr-01.S b/riscof/suite/rv64i_m/I/jalr-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..2d981159bc175e61f160043af3a7b9e19c09de81
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/jalr-01.S
@@ -0,0 +1,239 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the jalr instruction of the RISC-V I extension for the jalr covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",jalr)
+
+RVTEST_SIGBASE( x4,signature_x4_1)
+
+inst_0:
+// rs1 == rd, rs1==x25, rd==x25, imm_val > 0,
+// opcode: jalr; op1:x25; dest:x25; immval:0x7; align:0
+TEST_JALR_OP(x8, x25, x25, 0x7, x4, 0,0)
+
+inst_1:
+// rs1 != rd, rs1==x19, rd==x7, imm_val < 0,
+// opcode: jalr; op1:x19; dest:x7; immval:-0xa; align:0
+TEST_JALR_OP(x8, x7, x19, -0xa, x4, 8,0)
+
+inst_2:
+// rs1==x2, rd==x21, imm_val == 1,
+// opcode: jalr; op1:x2; dest:x21; immval:0x1; align:0
+TEST_JALR_OP(x8, x21, x2, 0x1, x4, 16,0)
+
+inst_3:
+// rs1==x30, rd==x23, imm_val == 2,
+// opcode: jalr; op1:x30; dest:x23; immval:0x2; align:0
+TEST_JALR_OP(x8, x23, x30, 0x2, x4, 24,0)
+
+inst_4:
+// rs1==x7, rd==x9, imm_val == 4,
+// opcode: jalr; op1:x7; dest:x9; immval:0x4; align:0
+TEST_JALR_OP(x8, x9, x7, 0x4, x4, 32,0)
+
+inst_5:
+// rs1==x14, rd==x24, imm_val == 8,
+// opcode: jalr; op1:x14; dest:x24; immval:0x8; align:0
+TEST_JALR_OP(x8, x24, x14, 0x8, x4, 40,0)
+
+inst_6:
+// rs1==x15, rd==x3, imm_val == 16,
+// opcode: jalr; op1:x15; dest:x3; immval:0x10; align:0
+TEST_JALR_OP(x8, x3, x15, 0x10, x4, 48,0)
+
+inst_7:
+// rs1==x11, rd==x30, imm_val == 32,
+// opcode: jalr; op1:x11; dest:x30; immval:0x20; align:0
+TEST_JALR_OP(x8, x30, x11, 0x20, x4, 56,0)
+
+inst_8:
+// rs1==x29, rd==x31, imm_val == 64,
+// opcode: jalr; op1:x29; dest:x31; immval:0x40; align:0
+TEST_JALR_OP(x8, x31, x29, 0x40, x4, 64,0)
+
+inst_9:
+// rs1==x5, rd==x16, imm_val == 128,
+// opcode: jalr; op1:x5; dest:x16; immval:0x80; align:0
+TEST_JALR_OP(x8, x16, x5, 0x80, x4, 72,0)
+
+inst_10:
+// rs1==x28, rd==x29, imm_val == 256,
+// opcode: jalr; op1:x28; dest:x29; immval:0x100; align:0
+TEST_JALR_OP(x8, x29, x28, 0x100, x4, 80,0)
+
+inst_11:
+// rs1==x12, rd==x20, imm_val == 512,
+// opcode: jalr; op1:x12; dest:x20; immval:0x200; align:0
+TEST_JALR_OP(x8, x20, x12, 0x200, x4, 88,0)
+
+inst_12:
+// rs1==x9, rd==x22, imm_val == 1024,
+// opcode: jalr; op1:x9; dest:x22; immval:0x400; align:0
+TEST_JALR_OP(x8, x22, x9, 0x400, x4, 96,0)
+
+inst_13:
+// rs1==x13, rd==x6, imm_val == -2048,
+// opcode: jalr; op1:x13; dest:x6; immval:-0x800; align:0
+TEST_JALR_OP(x8, x6, x13, -0x800, x4, 104,0)
+
+inst_14:
+// rs1==x27, rd==x19, imm_val == -2,
+// opcode: jalr; op1:x27; dest:x19; immval:-0x2; align:0
+TEST_JALR_OP(x8, x19, x27, -0x2, x4, 112,0)
+
+inst_15:
+// rs1==x6, rd==x17, imm_val == -3,
+// opcode: jalr; op1:x6; dest:x17; immval:-0x3; align:0
+TEST_JALR_OP(x8, x17, x6, -0x3, x4, 120,0)
+
+inst_16:
+// rs1==x1, rd==x26, imm_val == -5,
+// opcode: jalr; op1:x1; dest:x26; immval:-0x5; align:0
+TEST_JALR_OP(x8, x26, x1, -0x5, x4, 128,0)
+
+inst_17:
+// rs1==x10, rd==x8, imm_val == -9,
+// opcode: jalr; op1:x10; dest:x8; immval:-0x9; align:0
+TEST_JALR_OP(x7, x8, x10, -0x9, x4, 136,0)
+RVTEST_SIGBASE( x6,signature_x6_0)
+
+inst_18:
+// rs1==x23, rd==x13, imm_val == -17,
+// opcode: jalr; op1:x23; dest:x13; immval:-0x11; align:0
+TEST_JALR_OP(x7, x13, x23, -0x11, x6, 0,0)
+
+inst_19:
+// rs1==x22, rd==x15, imm_val == -33,
+// opcode: jalr; op1:x22; dest:x15; immval:-0x21; align:0
+TEST_JALR_OP(x7, x15, x22, -0x21, x6, 8,0)
+
+inst_20:
+// rs1==x3, rd==x11, imm_val == -65,
+// opcode: jalr; op1:x3; dest:x11; immval:-0x41; align:0
+TEST_JALR_OP(x7, x11, x3, -0x41, x6, 16,0)
+
+inst_21:
+// rs1==x31, rd==x28, imm_val == -129,
+// opcode: jalr; op1:x31; dest:x28; immval:-0x81; align:0
+TEST_JALR_OP(x7, x28, x31, -0x81, x6, 24,0)
+
+inst_22:
+// rs1==x24, rd==x14, imm_val == -257,
+// opcode: jalr; op1:x24; dest:x14; immval:-0x101; align:0
+TEST_JALR_OP(x7, x14, x24, -0x101, x6, 32,0)
+
+inst_23:
+// rs1==x21, rd==x12, imm_val == -513,
+// opcode: jalr; op1:x21; dest:x12; immval:-0x201; align:0
+TEST_JALR_OP(x7, x12, x21, -0x201, x6, 40,0)
+
+inst_24:
+// rs1==x4, rd==x0, imm_val == -1025,
+// opcode: jalr; op1:x4; dest:x0; immval:-0x401; align:0
+TEST_JALR_OP(x7, x0, x4, -0x401, x6, 48,0)
+
+inst_25:
+// rs1==x8, rd==x4, imm_val == 2047,
+// opcode: jalr; op1:x8; dest:x4; immval:0x7ff; align:0
+TEST_JALR_OP(x7, x4, x8, 0x7ff, x6, 56,0)
+
+inst_26:
+// rs1==x20, rd==x18, imm_val == 1365,
+// opcode: jalr; op1:x20; dest:x18; immval:0x555; align:0
+TEST_JALR_OP(x7, x18, x20, 0x555, x6, 64,0)
+
+inst_27:
+// rs1==x18, rd==x2, imm_val == -1366,
+// opcode: jalr; op1:x18; dest:x2; immval:-0x556; align:0
+TEST_JALR_OP(x7, x2, x18, -0x556, x6, 72,0)
+
+inst_28:
+// rs1==x17, rd==x5,
+// opcode: jalr; op1:x17; dest:x5; immval:-0x800; align:0
+TEST_JALR_OP(x7, x5, x17, -0x800, x6, 80,0)
+
+inst_29:
+// rs1==x16, rd==x27,
+// opcode: jalr; op1:x16; dest:x27; immval:-0x800; align:0
+TEST_JALR_OP(x7, x27, x16, -0x800, x6, 88,0)
+
+inst_30:
+// rs1==x26, rd==x1,
+// opcode: jalr; op1:x26; dest:x1; immval:-0x800; align:0
+TEST_JALR_OP(x7, x1, x26, -0x800, x6, 96,0)
+
+inst_31:
+// rd==x10,
+// opcode: jalr; op1:x24; dest:x10; immval:-0x800; align:0
+TEST_JALR_OP(x7, x10, x24, -0x800, x6, 104,0)
+
+inst_32:
+// imm_val == -1025,
+// opcode: jalr; op1:x10; dest:x11; immval:-0x401; align:0
+TEST_JALR_OP(x7, x11, x10, -0x401, x6, 112,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x4_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_1:
+ .fill 18*(XLEN/32),4,0xdeadbeef
+
+
+signature_x6_0:
+ .fill 15*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/lb-align-01.S b/riscof/suite/rv64i_m/I/lb-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..14db86699af705d47b641fad8d68ed287d606c9a
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/lb-align-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the lb instruction of the RISC-V I extension for the lb-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",lb-align)
+
+RVTEST_SIGBASE( x26,signature_x26_1)
+
+inst_0:
+// rs1 == rd, rs1==x8, rd==x8, ea_align == 0 and (imm_val % 4) == 0, imm_val < 0
+// opcode:lb op1:x8; dest:x8; immval:-0x8; align:0
+TEST_LOAD(x26,x28,0,x8,x8,-0x8,0,lb,0)
+
+inst_1:
+// rs1 != rd, rs1==x31, rd==x27, ea_align == 0 and (imm_val % 4) == 1,
+// opcode:lb op1:x31; dest:x27; immval:-0x3; align:0
+TEST_LOAD(x26,x28,0,x31,x27,-0x3,8,lb,0)
+
+inst_2:
+// rs1==x13, rd==x3, ea_align == 0 and (imm_val % 4) == 2,
+// opcode:lb op1:x13; dest:x3; immval:-0x556; align:0
+TEST_LOAD(x26,x28,0,x13,x3,-0x556,16,lb,0)
+
+inst_3:
+// rs1==x27, rd==x31, ea_align == 0 and (imm_val % 4) == 3, imm_val > 0
+// opcode:lb op1:x27; dest:x31; immval:0x7ff; align:0
+TEST_LOAD(x26,x28,0,x27,x31,0x7ff,24,lb,0)
+
+inst_4:
+// rs1==x15, rd==x17, ea_align == 2 and (imm_val % 4) == 0,
+// opcode:lb op1:x15; dest:x17; immval:0x4; align:2
+TEST_LOAD(x26,x28,0,x15,x17,0x4,32,lb,2)
+
+inst_5:
+// rs1==x25, rd==x12, ea_align == 2 and (imm_val % 4) == 1,
+// opcode:lb op1:x25; dest:x12; immval:0x555; align:2
+TEST_LOAD(x26,x28,0,x25,x12,0x555,40,lb,2)
+
+inst_6:
+// rs1==x3, rd==x6, ea_align == 2 and (imm_val % 4) == 2,
+// opcode:lb op1:x3; dest:x6; immval:-0x556; align:2
+TEST_LOAD(x26,x28,0,x3,x6,-0x556,48,lb,2)
+
+inst_7:
+// rs1==x23, rd==x1, ea_align == 2 and (imm_val % 4) == 3,
+// opcode:lb op1:x23; dest:x1; immval:-0x201; align:2
+TEST_LOAD(x26,x28,0,x23,x1,-0x201,56,lb,2)
+
+inst_8:
+// rs1==x5, rd==x20, ea_align == 1 and (imm_val % 4) == 0,
+// opcode:lb op1:x5; dest:x20; immval:0x400; align:1
+TEST_LOAD(x26,x28,0,x5,x20,0x400,64,lb,1)
+
+inst_9:
+// rs1==x17, rd==x18, ea_align == 1 and (imm_val % 4) == 1,
+// opcode:lb op1:x17; dest:x18; immval:0x555; align:1
+TEST_LOAD(x26,x28,0,x17,x18,0x555,72,lb,1)
+
+inst_10:
+// rs1==x6, rd==x4, imm_val == 0,
+// opcode:lb op1:x6; dest:x4; immval:0x0; align:0
+TEST_LOAD(x26,x28,0,x6,x4,0x0,80,lb,0)
+
+inst_11:
+// rs1==x22, rd==x29, ea_align == 1 and (imm_val % 4) == 2,
+// opcode:lb op1:x22; dest:x29; immval:-0x2; align:1
+TEST_LOAD(x26,x28,0,x22,x29,-0x2,88,lb,1)
+
+inst_12:
+// rs1==x21, rd==x14, ea_align == 1 and (imm_val % 4) == 3,
+// opcode:lb op1:x21; dest:x14; immval:-0x81; align:1
+TEST_LOAD(x26,x28,0,x21,x14,-0x81,96,lb,1)
+
+inst_13:
+// rs1==x2, rd==x19, ea_align == 3 and (imm_val % 4) == 0,
+// opcode:lb op1:x2; dest:x19; immval:0x0; align:3
+TEST_LOAD(x26,x28,0,x2,x19,0x0,104,lb,3)
+
+inst_14:
+// rs1==x4, rd==x10, ea_align == 3 and (imm_val % 4) == 1,
+// opcode:lb op1:x4; dest:x10; immval:-0x7; align:3
+TEST_LOAD(x26,x28,0,x4,x10,-0x7,112,lb,3)
+
+inst_15:
+// rs1==x18, rd==x23, ea_align == 3 and (imm_val % 4) == 2,
+// opcode:lb op1:x18; dest:x23; immval:-0x2; align:3
+TEST_LOAD(x26,x28,0,x18,x23,-0x2,120,lb,3)
+
+inst_16:
+// rs1==x7, rd==x13, ea_align == 3 and (imm_val % 4) == 3,
+// opcode:lb op1:x7; dest:x13; immval:0x7ff; align:3
+TEST_LOAD(x26,x28,0,x7,x13,0x7ff,128,lb,3)
+
+inst_17:
+// rs1==x11, rd==x24,
+// opcode:lb op1:x11; dest:x24; immval:-0x800; align:0
+TEST_LOAD(x26,x28,0,x11,x24,-0x800,136,lb,0)
+
+inst_18:
+// rs1==x9, rd==x16,
+// opcode:lb op1:x9; dest:x16; immval:-0x800; align:0
+TEST_LOAD(x26,x28,0,x9,x16,-0x800,144,lb,0)
+RVTEST_SIGBASE( x3,signature_x3_0)
+
+inst_19:
+// rs1==x16, rd==x15,
+// opcode:lb op1:x16; dest:x15; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x16,x15,-0x800,0,lb,0)
+
+inst_20:
+// rs1==x24, rd==x21,
+// opcode:lb op1:x24; dest:x21; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x24,x21,-0x800,8,lb,0)
+
+inst_21:
+// rs1==x29, rd==x11,
+// opcode:lb op1:x29; dest:x11; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x29,x11,-0x800,16,lb,0)
+
+inst_22:
+// rs1==x28, rd==x26,
+// opcode:lb op1:x28; dest:x26; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x28,x26,-0x800,24,lb,0)
+
+inst_23:
+// rs1==x1, rd==x0,
+// opcode:lb op1:x1; dest:x0; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x1,x0,-0x800,32,lb,0)
+
+inst_24:
+// rs1==x19, rd==x2,
+// opcode:lb op1:x19; dest:x2; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x19,x2,-0x800,40,lb,0)
+
+inst_25:
+// rs1==x12, rd==x7,
+// opcode:lb op1:x12; dest:x7; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x12,x7,-0x800,48,lb,0)
+
+inst_26:
+// rs1==x10, rd==x9,
+// opcode:lb op1:x10; dest:x9; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x10,x9,-0x800,56,lb,0)
+
+inst_27:
+// rs1==x30, rd==x25,
+// opcode:lb op1:x30; dest:x25; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x30,x25,-0x800,64,lb,0)
+
+inst_28:
+// rs1==x26, rd==x28,
+// opcode:lb op1:x26; dest:x28; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x26,x28,-0x800,72,lb,0)
+
+inst_29:
+// rs1==x20, rd==x22,
+// opcode:lb op1:x20; dest:x22; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x20,x22,-0x800,80,lb,0)
+
+inst_30:
+// rs1==x14, rd==x30,
+// opcode:lb op1:x14; dest:x30; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x14,x30,-0x800,88,lb,0)
+
+inst_31:
+// rd==x5,
+// opcode:lb op1:x9; dest:x5; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x9,x5,-0x800,96,lb,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x26_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x26_1:
+ .fill 19*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_0:
+ .fill 13*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/lbu-align-01.S b/riscof/suite/rv64i_m/I/lbu-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..cce1a112d6cc5290c64a9a4911ff509ff3caf68c
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/lbu-align-01.S
@@ -0,0 +1,239 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the lbu instruction of the RISC-V I extension for the lbu-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",lbu-align)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rs1 == rd, rs1==x10, rd==x10, ea_align == 0 and (imm_val % 4) == 0, imm_val == 0
+// opcode:lbu op1:x10; dest:x10; immval:0x0; align:0
+TEST_LOAD(x2,x3,0,x10,x10,0x0,0,lbu,0)
+
+inst_1:
+// rs1 != rd, rs1==x5, rd==x27, ea_align == 0 and (imm_val % 4) == 1, imm_val > 0
+// opcode:lbu op1:x5; dest:x27; immval:0x555; align:0
+TEST_LOAD(x2,x3,0,x5,x27,0x555,8,lbu,0)
+
+inst_2:
+// rs1==x17, rd==x30, ea_align == 0 and (imm_val % 4) == 2,
+// opcode:lbu op1:x17; dest:x30; immval:0x6; align:0
+TEST_LOAD(x2,x3,0,x17,x30,0x6,16,lbu,0)
+
+inst_3:
+// rs1==x20, rd==x1, ea_align == 0 and (imm_val % 4) == 3,
+// opcode:lbu op1:x20; dest:x1; immval:0x3; align:0
+TEST_LOAD(x2,x3,0,x20,x1,0x3,24,lbu,0)
+
+inst_4:
+// rs1==x28, rd==x31, ea_align == 2 and (imm_val % 4) == 0,
+// opcode:lbu op1:x28; dest:x31; immval:0x0; align:2
+TEST_LOAD(x2,x3,0,x28,x31,0x0,32,lbu,2)
+
+inst_5:
+// rs1==x15, rd==x25, ea_align == 2 and (imm_val % 4) == 1,
+// opcode:lbu op1:x15; dest:x25; immval:0x1; align:2
+TEST_LOAD(x2,x3,0,x15,x25,0x1,40,lbu,2)
+
+inst_6:
+// rs1==x18, rd==x29, ea_align == 2 and (imm_val % 4) == 2,
+// opcode:lbu op1:x18; dest:x29; immval:0x2; align:2
+TEST_LOAD(x2,x3,0,x18,x29,0x2,48,lbu,2)
+
+inst_7:
+// rs1==x26, rd==x16, ea_align == 2 and (imm_val % 4) == 3,
+// opcode:lbu op1:x26; dest:x16; immval:0x3ff; align:2
+TEST_LOAD(x2,x3,0,x26,x16,0x3ff,56,lbu,2)
+
+inst_8:
+// rs1==x30, rd==x12, ea_align == 1 and (imm_val % 4) == 0,
+// opcode:lbu op1:x30; dest:x12; immval:0x100; align:1
+TEST_LOAD(x2,x3,0,x30,x12,0x100,64,lbu,1)
+
+inst_9:
+// rs1==x4, rd==x8, ea_align == 1 and (imm_val % 4) == 1,
+// opcode:lbu op1:x4; dest:x8; immval:0x5; align:1
+TEST_LOAD(x2,x3,0,x4,x8,0x5,72,lbu,1)
+
+inst_10:
+// rs1==x14, rd==x22, imm_val < 0,
+// opcode:lbu op1:x14; dest:x22; immval:-0x556; align:0
+TEST_LOAD(x2,x3,0,x14,x22,-0x556,80,lbu,0)
+
+inst_11:
+// rs1==x12, rd==x18, ea_align == 1 and (imm_val % 4) == 2,
+// opcode:lbu op1:x12; dest:x18; immval:-0xa; align:1
+TEST_LOAD(x2,x3,0,x12,x18,-0xa,88,lbu,1)
+
+inst_12:
+// rs1==x11, rd==x15, ea_align == 1 and (imm_val % 4) == 3,
+// opcode:lbu op1:x11; dest:x15; immval:-0x21; align:1
+TEST_LOAD(x2,x3,0,x11,x15,-0x21,96,lbu,1)
+
+inst_13:
+// rs1==x24, rd==x17, ea_align == 3 and (imm_val % 4) == 0,
+// opcode:lbu op1:x24; dest:x17; immval:0x40; align:3
+TEST_LOAD(x2,x3,0,x24,x17,0x40,104,lbu,3)
+
+inst_14:
+// rs1==x16, rd==x23, ea_align == 3 and (imm_val % 4) == 1,
+// opcode:lbu op1:x16; dest:x23; immval:0x1; align:3
+TEST_LOAD(x2,x3,0,x16,x23,0x1,112,lbu,3)
+
+inst_15:
+// rs1==x1, rd==x11, ea_align == 3 and (imm_val % 4) == 2,
+// opcode:lbu op1:x1; dest:x11; immval:-0x2; align:3
+TEST_LOAD(x2,x3,0,x1,x11,-0x2,120,lbu,3)
+
+inst_16:
+// rs1==x23, rd==x0, ea_align == 3 and (imm_val % 4) == 3,
+// opcode:lbu op1:x23; dest:x0; immval:-0x1; align:3
+TEST_LOAD(x2,x3,0,x23,x0,-0x1,128,lbu,3)
+
+inst_17:
+// rs1==x25, rd==x21,
+// opcode:lbu op1:x25; dest:x21; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x25,x21,-0x800,136,lbu,0)
+
+inst_18:
+// rs1==x13, rd==x19,
+// opcode:lbu op1:x13; dest:x19; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x13,x19,-0x800,144,lbu,0)
+
+inst_19:
+// rs1==x21, rd==x4,
+// opcode:lbu op1:x21; dest:x4; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x21,x4,-0x800,152,lbu,0)
+
+inst_20:
+// rs1==x31, rd==x14,
+// opcode:lbu op1:x31; dest:x14; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x31,x14,-0x800,160,lbu,0)
+
+inst_21:
+// rs1==x22, rd==x6,
+// opcode:lbu op1:x22; dest:x6; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x22,x6,-0x800,168,lbu,0)
+
+inst_22:
+// rs1==x9, rd==x3,
+// opcode:lbu op1:x9; dest:x3; immval:-0x800; align:0
+TEST_LOAD(x2,x4,0,x9,x3,-0x800,176,lbu,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_23:
+// rs1==x27, rd==x2,
+// opcode:lbu op1:x27; dest:x2; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x27,x2,-0x800,0,lbu,0)
+
+inst_24:
+// rs1==x2, rd==x13,
+// opcode:lbu op1:x2; dest:x13; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x2,x13,-0x800,8,lbu,0)
+
+inst_25:
+// rs1==x6, rd==x9,
+// opcode:lbu op1:x6; dest:x9; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x6,x9,-0x800,16,lbu,0)
+
+inst_26:
+// rs1==x29, rd==x28,
+// opcode:lbu op1:x29; dest:x28; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x29,x28,-0x800,24,lbu,0)
+
+inst_27:
+// rs1==x3, rd==x20,
+// opcode:lbu op1:x3; dest:x20; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x3,x20,-0x800,32,lbu,0)
+
+inst_28:
+// rs1==x7, rd==x5,
+// opcode:lbu op1:x7; dest:x5; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x7,x5,-0x800,40,lbu,0)
+
+inst_29:
+// rs1==x19, rd==x24,
+// opcode:lbu op1:x19; dest:x24; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x19,x24,-0x800,48,lbu,0)
+
+inst_30:
+// rs1==x8, rd==x26,
+// opcode:lbu op1:x8; dest:x26; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x8,x26,-0x800,56,lbu,0)
+
+inst_31:
+// rd==x7,
+// opcode:lbu op1:x22; dest:x7; immval:-0x800; align:0
+TEST_LOAD(x1,x4,0,x22,x7,-0x800,64,lbu,0)
+
+inst_32:
+// ea_align == 3 and (imm_val % 4) == 3,
+// opcode:lbu op1:x10; dest:x11; immval:-0x1; align:3
+TEST_LOAD(x1,x4,0,x10,x11,-0x1,72,lbu,3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 23*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 10*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/ld-align-01.S b/riscof/suite/rv64i_m/I/ld-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..40c9e26ed999576e6b19ad944b857e28b75104eb
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/ld-align-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the ld instruction of the RISC-V I extension for the ld-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*);def TEST_CASE_1=True;",ld-align)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 == rd, rs1==x27, rd==x27, ea_align == 0 and (imm_val % 8) == 0, imm_val > 0
+// opcode:ld op1:x27; dest:x27; immval:0x40; align:0
+TEST_LOAD(x1,x10,0,x27,x27,0x40,0,ld,0)
+
+inst_1:
+// rs1 != rd, rs1==x25, rd==x18, ea_align == 0 and (imm_val % 8) == 1,
+// opcode:ld op1:x25; dest:x18; immval:0x1; align:0
+TEST_LOAD(x1,x10,0,x25,x18,0x1,8,ld,0)
+
+inst_2:
+// rs1==x16, rd==x30, ea_align == 0 and (imm_val % 8) == 2, imm_val < 0
+// opcode:ld op1:x16; dest:x30; immval:-0x6; align:0
+TEST_LOAD(x1,x10,0,x16,x30,-0x6,16,ld,0)
+
+inst_3:
+// rs1==x9, rd==x12, ea_align == 0 and (imm_val % 8) == 3,
+// opcode:ld op1:x9; dest:x12; immval:0x3; align:0
+TEST_LOAD(x1,x10,0,x9,x12,0x3,24,ld,0)
+
+inst_4:
+// rs1==x14, rd==x23, ea_align == 0 and (imm_val % 8) == 4,
+// opcode:ld op1:x14; dest:x23; immval:0x4; align:0
+TEST_LOAD(x1,x10,0,x14,x23,0x4,32,ld,0)
+
+inst_5:
+// rs1==x23, rd==x26, imm_val == 0,
+// opcode:ld op1:x23; dest:x26; immval:0x0; align:0
+TEST_LOAD(x1,x10,0,x23,x26,0x0,40,ld,0)
+
+inst_6:
+// rs1==x3, rd==x2, ea_align == 0 and (imm_val % 8) == 5,
+// opcode:ld op1:x3; dest:x2; immval:0x5; align:0
+TEST_LOAD(x1,x10,0,x3,x2,0x5,48,ld,0)
+
+inst_7:
+// rs1==x17, rd==x25, ea_align == 0 and (imm_val % 8) == 6,
+// opcode:ld op1:x17; dest:x25; immval:-0x2; align:0
+TEST_LOAD(x1,x10,0,x17,x25,-0x2,56,ld,0)
+
+inst_8:
+// rs1==x5, rd==x8, ea_align == 0 and (imm_val % 8) == 7,
+// opcode:ld op1:x5; dest:x8; immval:-0x21; align:0
+TEST_LOAD(x1,x10,0,x5,x8,-0x21,64,ld,0)
+
+inst_9:
+// rs1==x31, rd==x24,
+// opcode:ld op1:x31; dest:x24; immval:-0x800; align:0
+TEST_LOAD(x1,x10,0,x31,x24,-0x800,72,ld,0)
+
+inst_10:
+// rs1==x2, rd==x17,
+// opcode:ld op1:x2; dest:x17; immval:-0x800; align:0
+TEST_LOAD(x1,x10,0,x2,x17,-0x800,80,ld,0)
+
+inst_11:
+// rs1==x28, rd==x7,
+// opcode:ld op1:x28; dest:x7; immval:-0x800; align:0
+TEST_LOAD(x1,x10,0,x28,x7,-0x800,88,ld,0)
+
+inst_12:
+// rs1==x8, rd==x5,
+// opcode:ld op1:x8; dest:x5; immval:-0x800; align:0
+TEST_LOAD(x1,x10,0,x8,x5,-0x800,96,ld,0)
+
+inst_13:
+// rs1==x26, rd==x15,
+// opcode:ld op1:x26; dest:x15; immval:-0x800; align:0
+TEST_LOAD(x1,x10,0,x26,x15,-0x800,104,ld,0)
+
+inst_14:
+// rs1==x6, rd==x4,
+// opcode:ld op1:x6; dest:x4; immval:-0x800; align:0
+TEST_LOAD(x1,x10,0,x6,x4,-0x800,112,ld,0)
+
+inst_15:
+// rs1==x20, rd==x19,
+// opcode:ld op1:x20; dest:x19; immval:-0x800; align:0
+TEST_LOAD(x1,x10,0,x20,x19,-0x800,120,ld,0)
+
+inst_16:
+// rs1==x12, rd==x11,
+// opcode:ld op1:x12; dest:x11; immval:-0x800; align:0
+TEST_LOAD(x1,x10,0,x12,x11,-0x800,128,ld,0)
+
+inst_17:
+// rs1==x19, rd==x31,
+// opcode:ld op1:x19; dest:x31; immval:-0x800; align:0
+TEST_LOAD(x1,x10,0,x19,x31,-0x800,136,ld,0)
+
+inst_18:
+// rs1==x22, rd==x0,
+// opcode:ld op1:x22; dest:x0; immval:-0x800; align:0
+TEST_LOAD(x1,x10,0,x22,x0,-0x800,144,ld,0)
+
+inst_19:
+// rs1==x7, rd==x3,
+// opcode:ld op1:x7; dest:x3; immval:-0x800; align:0
+TEST_LOAD(x1,x10,0,x7,x3,-0x800,152,ld,0)
+
+inst_20:
+// rs1==x11, rd==x6,
+// opcode:ld op1:x11; dest:x6; immval:-0x800; align:0
+TEST_LOAD(x1,x10,0,x11,x6,-0x800,160,ld,0)
+
+inst_21:
+// rs1==x15, rd==x21,
+// opcode:ld op1:x15; dest:x21; immval:-0x800; align:0
+TEST_LOAD(x1,x10,0,x15,x21,-0x800,168,ld,0)
+
+inst_22:
+// rs1==x24, rd==x20,
+// opcode:ld op1:x24; dest:x20; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x24,x20,-0x800,176,ld,0)
+
+inst_23:
+// rs1==x29, rd==x13,
+// opcode:ld op1:x29; dest:x13; immval:-0x800; align:0
+TEST_LOAD(x1,x3,0,x29,x13,-0x800,184,ld,0)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_24:
+// rs1==x10, rd==x22,
+// opcode:ld op1:x10; dest:x22; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x10,x22,-0x800,0,ld,0)
+
+inst_25:
+// rs1==x1, rd==x28,
+// opcode:ld op1:x1; dest:x28; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x1,x28,-0x800,8,ld,0)
+
+inst_26:
+// rs1==x21, rd==x29,
+// opcode:ld op1:x21; dest:x29; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x21,x29,-0x800,16,ld,0)
+
+inst_27:
+// rs1==x18, rd==x16,
+// opcode:ld op1:x18; dest:x16; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x18,x16,-0x800,24,ld,0)
+
+inst_28:
+// rs1==x4, rd==x14,
+// opcode:ld op1:x4; dest:x14; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x4,x14,-0x800,32,ld,0)
+
+inst_29:
+// rs1==x30, rd==x10,
+// opcode:ld op1:x30; dest:x10; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x30,x10,-0x800,40,ld,0)
+
+inst_30:
+// rs1==x13, rd==x9,
+// opcode:ld op1:x13; dest:x9; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x13,x9,-0x800,48,ld,0)
+
+inst_31:
+// rd==x1,
+// opcode:ld op1:x8; dest:x1; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x8,x1,-0x800,56,ld,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 24*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 8*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/lh-align-01.S b/riscof/suite/rv64i_m/I/lh-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..cb06454bfab94a5f2e8e88143da8a7186c8f663b
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/lh-align-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the lh instruction of the RISC-V I extension for the lh-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",lh-align)
+
+RVTEST_SIGBASE( x9,signature_x9_1)
+
+inst_0:
+// rs1 == rd, rs1==x13, rd==x13, ea_align == 0 and (imm_val % 4) == 0, imm_val < 0
+// opcode:lh op1:x13; dest:x13; immval:-0x800; align:0
+TEST_LOAD(x9,x12,0,x13,x13,-0x800,0,lh,0)
+
+inst_1:
+// rs1 != rd, rs1==x4, rd==x17, ea_align == 0 and (imm_val % 4) == 1, imm_val > 0
+// opcode:lh op1:x4; dest:x17; immval:0x555; align:0
+TEST_LOAD(x9,x12,0,x4,x17,0x555,8,lh,0)
+
+inst_2:
+// rs1==x23, rd==x10, ea_align == 0 and (imm_val % 4) == 2,
+// opcode:lh op1:x23; dest:x10; immval:0x6; align:0
+TEST_LOAD(x9,x12,0,x23,x10,0x6,16,lh,0)
+
+inst_3:
+// rs1==x1, rd==x26, ea_align == 0 and (imm_val % 4) == 3,
+// opcode:lh op1:x1; dest:x26; immval:0x7ff; align:0
+TEST_LOAD(x9,x12,0,x1,x26,0x7ff,24,lh,0)
+
+inst_4:
+// rs1==x30, rd==x25, ea_align == 2 and (imm_val % 4) == 0,
+// opcode:lh op1:x30; dest:x25; immval:0x40; align:2
+TEST_LOAD(x9,x12,0,x30,x25,0x40,32,lh,2)
+
+inst_5:
+// rs1==x20, rd==x18, imm_val == 0,
+// opcode:lh op1:x20; dest:x18; immval:0x0; align:0
+TEST_LOAD(x9,x12,0,x20,x18,0x0,40,lh,0)
+
+inst_6:
+// rs1==x5, rd==x4, ea_align == 2 and (imm_val % 4) == 1,
+// opcode:lh op1:x5; dest:x4; immval:0x1; align:2
+TEST_LOAD(x9,x12,0,x5,x4,0x1,48,lh,2)
+
+inst_7:
+// rs1==x19, rd==x23, ea_align == 2 and (imm_val % 4) == 2,
+// opcode:lh op1:x19; dest:x23; immval:0x6; align:2
+TEST_LOAD(x9,x12,0,x19,x23,0x6,56,lh,2)
+
+inst_8:
+// rs1==x7, rd==x31, ea_align == 2 and (imm_val % 4) == 3,
+// opcode:lh op1:x7; dest:x31; immval:0x7ff; align:2
+TEST_LOAD(x9,x12,0,x7,x31,0x7ff,64,lh,2)
+
+inst_9:
+// rs1==x8, rd==x27,
+// opcode:lh op1:x8; dest:x27; immval:-0x800; align:0
+TEST_LOAD(x9,x12,0,x8,x27,-0x800,72,lh,0)
+
+inst_10:
+// rs1==x11, rd==x15,
+// opcode:lh op1:x11; dest:x15; immval:-0x800; align:0
+TEST_LOAD(x9,x12,0,x11,x15,-0x800,80,lh,0)
+
+inst_11:
+// rs1==x29, rd==x21,
+// opcode:lh op1:x29; dest:x21; immval:-0x800; align:0
+TEST_LOAD(x9,x12,0,x29,x21,-0x800,88,lh,0)
+
+inst_12:
+// rs1==x28, rd==x0,
+// opcode:lh op1:x28; dest:x0; immval:-0x800; align:0
+TEST_LOAD(x9,x12,0,x28,x0,-0x800,96,lh,0)
+
+inst_13:
+// rs1==x18, rd==x6,
+// opcode:lh op1:x18; dest:x6; immval:-0x800; align:0
+TEST_LOAD(x9,x12,0,x18,x6,-0x800,104,lh,0)
+
+inst_14:
+// rs1==x2, rd==x20,
+// opcode:lh op1:x2; dest:x20; immval:-0x800; align:0
+TEST_LOAD(x9,x12,0,x2,x20,-0x800,112,lh,0)
+
+inst_15:
+// rs1==x31, rd==x7,
+// opcode:lh op1:x31; dest:x7; immval:-0x800; align:0
+TEST_LOAD(x9,x12,0,x31,x7,-0x800,120,lh,0)
+
+inst_16:
+// rs1==x10, rd==x24,
+// opcode:lh op1:x10; dest:x24; immval:-0x800; align:0
+TEST_LOAD(x9,x12,0,x10,x24,-0x800,128,lh,0)
+
+inst_17:
+// rs1==x14, rd==x3,
+// opcode:lh op1:x14; dest:x3; immval:-0x800; align:0
+TEST_LOAD(x9,x12,0,x14,x3,-0x800,136,lh,0)
+
+inst_18:
+// rs1==x3, rd==x5,
+// opcode:lh op1:x3; dest:x5; immval:-0x800; align:0
+TEST_LOAD(x9,x4,0,x3,x5,-0x800,144,lh,0)
+
+inst_19:
+// rs1==x26, rd==x12,
+// opcode:lh op1:x26; dest:x12; immval:-0x800; align:0
+TEST_LOAD(x9,x4,0,x26,x12,-0x800,152,lh,0)
+RVTEST_SIGBASE( x3,signature_x3_0)
+
+inst_20:
+// rs1==x6, rd==x16,
+// opcode:lh op1:x6; dest:x16; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x6,x16,-0x800,0,lh,0)
+
+inst_21:
+// rs1==x9, rd==x1,
+// opcode:lh op1:x9; dest:x1; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x9,x1,-0x800,8,lh,0)
+
+inst_22:
+// rs1==x25, rd==x22,
+// opcode:lh op1:x25; dest:x22; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x25,x22,-0x800,16,lh,0)
+
+inst_23:
+// rs1==x15, rd==x9,
+// opcode:lh op1:x15; dest:x9; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x15,x9,-0x800,24,lh,0)
+
+inst_24:
+// rs1==x12, rd==x19,
+// opcode:lh op1:x12; dest:x19; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x12,x19,-0x800,32,lh,0)
+
+inst_25:
+// rs1==x16, rd==x2,
+// opcode:lh op1:x16; dest:x2; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x16,x2,-0x800,40,lh,0)
+
+inst_26:
+// rs1==x24, rd==x8,
+// opcode:lh op1:x24; dest:x8; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x24,x8,-0x800,48,lh,0)
+
+inst_27:
+// rs1==x22, rd==x28,
+// opcode:lh op1:x22; dest:x28; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x22,x28,-0x800,56,lh,0)
+
+inst_28:
+// rs1==x17, rd==x14,
+// opcode:lh op1:x17; dest:x14; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x17,x14,-0x800,64,lh,0)
+
+inst_29:
+// rs1==x21, rd==x11,
+// opcode:lh op1:x21; dest:x11; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x21,x11,-0x800,72,lh,0)
+
+inst_30:
+// rs1==x27, rd==x29,
+// opcode:lh op1:x27; dest:x29; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x27,x29,-0x800,80,lh,0)
+
+inst_31:
+// rd==x30,
+// opcode:lh op1:x16; dest:x30; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x16,x30,-0x800,88,lh,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x9_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x9_1:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_0:
+ .fill 12*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/lhu-align-01.S b/riscof/suite/rv64i_m/I/lhu-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..c66e966522d0ece0c377294f5d13328e46c5a756
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/lhu-align-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the lhu instruction of the RISC-V I extension for the lhu-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",lhu-align)
+
+RVTEST_SIGBASE( x7,signature_x7_1)
+
+inst_0:
+// rs1 == rd, rs1==x17, rd==x17, ea_align == 0 and (imm_val % 4) == 0, imm_val < 0
+// opcode:lhu op1:x17; dest:x17; immval:-0x8; align:0
+TEST_LOAD(x7,x10,0,x17,x17,-0x8,0,lhu,0)
+
+inst_1:
+// rs1 != rd, rs1==x3, rd==x15, ea_align == 0 and (imm_val % 4) == 1,
+// opcode:lhu op1:x3; dest:x15; immval:-0x3; align:0
+TEST_LOAD(x7,x10,0,x3,x15,-0x3,8,lhu,0)
+
+inst_2:
+// rs1==x5, rd==x29, ea_align == 0 and (imm_val % 4) == 2, imm_val > 0
+// opcode:lhu op1:x5; dest:x29; immval:0x6; align:0
+TEST_LOAD(x7,x10,0,x5,x29,0x6,16,lhu,0)
+
+inst_3:
+// rs1==x8, rd==x30, ea_align == 0 and (imm_val % 4) == 3,
+// opcode:lhu op1:x8; dest:x30; immval:-0x41; align:0
+TEST_LOAD(x7,x10,0,x8,x30,-0x41,24,lhu,0)
+
+inst_4:
+// rs1==x19, rd==x8, ea_align == 2 and (imm_val % 4) == 0, imm_val == 0
+// opcode:lhu op1:x19; dest:x8; immval:0x0; align:2
+TEST_LOAD(x7,x10,0,x19,x8,0x0,32,lhu,2)
+
+inst_5:
+// rs1==x9, rd==x2, ea_align == 2 and (imm_val % 4) == 1,
+// opcode:lhu op1:x9; dest:x2; immval:0x1; align:2
+TEST_LOAD(x7,x10,0,x9,x2,0x1,40,lhu,2)
+
+inst_6:
+// rs1==x4, rd==x9, ea_align == 2 and (imm_val % 4) == 2,
+// opcode:lhu op1:x4; dest:x9; immval:-0x2; align:2
+TEST_LOAD(x7,x10,0,x4,x9,-0x2,48,lhu,2)
+
+inst_7:
+// rs1==x16, rd==x24, ea_align == 2 and (imm_val % 4) == 3,
+// opcode:lhu op1:x16; dest:x24; immval:-0x1; align:2
+TEST_LOAD(x7,x10,0,x16,x24,-0x1,56,lhu,2)
+
+inst_8:
+// rs1==x24, rd==x26,
+// opcode:lhu op1:x24; dest:x26; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x24,x26,-0x800,64,lhu,0)
+
+inst_9:
+// rs1==x18, rd==x0,
+// opcode:lhu op1:x18; dest:x0; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x18,x0,-0x800,72,lhu,0)
+
+inst_10:
+// rs1==x31, rd==x14,
+// opcode:lhu op1:x31; dest:x14; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x31,x14,-0x800,80,lhu,0)
+
+inst_11:
+// rs1==x14, rd==x27,
+// opcode:lhu op1:x14; dest:x27; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x14,x27,-0x800,88,lhu,0)
+
+inst_12:
+// rs1==x29, rd==x5,
+// opcode:lhu op1:x29; dest:x5; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x29,x5,-0x800,96,lhu,0)
+
+inst_13:
+// rs1==x1, rd==x25,
+// opcode:lhu op1:x1; dest:x25; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x1,x25,-0x800,104,lhu,0)
+
+inst_14:
+// rs1==x6, rd==x11,
+// opcode:lhu op1:x6; dest:x11; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x6,x11,-0x800,112,lhu,0)
+
+inst_15:
+// rs1==x30, rd==x21,
+// opcode:lhu op1:x30; dest:x21; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x30,x21,-0x800,120,lhu,0)
+
+inst_16:
+// rs1==x23, rd==x20,
+// opcode:lhu op1:x23; dest:x20; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x23,x20,-0x800,128,lhu,0)
+
+inst_17:
+// rs1==x11, rd==x22,
+// opcode:lhu op1:x11; dest:x22; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x11,x22,-0x800,136,lhu,0)
+
+inst_18:
+// rs1==x22, rd==x19,
+// opcode:lhu op1:x22; dest:x19; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x22,x19,-0x800,144,lhu,0)
+
+inst_19:
+// rs1==x20, rd==x6,
+// opcode:lhu op1:x20; dest:x6; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x20,x6,-0x800,152,lhu,0)
+
+inst_20:
+// rs1==x15, rd==x3,
+// opcode:lhu op1:x15; dest:x3; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x15,x3,-0x800,160,lhu,0)
+
+inst_21:
+// rs1==x27, rd==x4,
+// opcode:lhu op1:x27; dest:x4; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x27,x4,-0x800,168,lhu,0)
+
+inst_22:
+// rs1==x13, rd==x28,
+// opcode:lhu op1:x13; dest:x28; immval:-0x800; align:0
+TEST_LOAD(x7,x10,0,x13,x28,-0x800,176,lhu,0)
+RVTEST_SIGBASE( x3,signature_x3_0)
+
+inst_23:
+// rs1==x2, rd==x23,
+// opcode:lhu op1:x2; dest:x23; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x2,x23,-0x800,0,lhu,0)
+
+inst_24:
+// rs1==x26, rd==x31,
+// opcode:lhu op1:x26; dest:x31; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x26,x31,-0x800,8,lhu,0)
+
+inst_25:
+// rs1==x21, rd==x13,
+// opcode:lhu op1:x21; dest:x13; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x21,x13,-0x800,16,lhu,0)
+
+inst_26:
+// rs1==x7, rd==x16,
+// opcode:lhu op1:x7; dest:x16; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x7,x16,-0x800,24,lhu,0)
+
+inst_27:
+// rs1==x25, rd==x18,
+// opcode:lhu op1:x25; dest:x18; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x25,x18,-0x800,32,lhu,0)
+
+inst_28:
+// rs1==x10, rd==x7,
+// opcode:lhu op1:x10; dest:x7; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x10,x7,-0x800,40,lhu,0)
+
+inst_29:
+// rs1==x12, rd==x1,
+// opcode:lhu op1:x12; dest:x1; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x12,x1,-0x800,48,lhu,0)
+
+inst_30:
+// rs1==x28, rd==x10,
+// opcode:lhu op1:x28; dest:x10; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x28,x10,-0x800,56,lhu,0)
+
+inst_31:
+// rd==x12,
+// opcode:lhu op1:x2; dest:x12; immval:-0x800; align:0
+TEST_LOAD(x3,x4,0,x2,x12,-0x800,64,lhu,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x7_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_1:
+ .fill 23*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_0:
+ .fill 9*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/lui-01.S b/riscof/suite/rv64i_m/I/lui-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..4e7e823405916188a7f1f34dc0b220a4c951f6f5
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/lui-01.S
@@ -0,0 +1,389 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the lui instruction of the RISC-V I extension for the lui covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",lui)
+
+RVTEST_SIGBASE( x13,signature_x13_1)
+
+inst_0:
+// rd==x2, imm_val == 0, imm_val==0
+// opcode: lui ; dest:x2; immval:0x0
+TEST_CASE(x22, x2, 0x0, x13, 0, lui x2,0x0)
+
+inst_1:
+// rd==x11, imm_val > 0, imm_val==724
+// opcode: lui ; dest:x11; immval:0x2d4
+TEST_CASE(x22, x11, 0x2d4000, x13, 8, lui x11,0x2d4)
+
+inst_2:
+// rd==x12, imm_val == ((2**20)-1),
+// opcode: lui ; dest:x12; immval:0xfffff
+TEST_CASE(x22, x12, -0x1000, x13, 16, lui x12,0xfffff)
+
+inst_3:
+// rd==x1, imm_val==3,
+// opcode: lui ; dest:x1; immval:0x3
+TEST_CASE(x22, x1, 0x3000, x13, 24, lui x1,0x3)
+
+inst_4:
+// rd==x24, imm_val==349525, imm_val == 349525
+// opcode: lui ; dest:x24; immval:0x55555
+TEST_CASE(x22, x24, 0x55555000, x13, 32, lui x24,0x55555)
+
+inst_5:
+// rd==x3, imm_val==699050, imm_val == 699050
+// opcode: lui ; dest:x3; immval:0xaaaaa
+TEST_CASE(x22, x3, -0x55556000, x13, 40, lui x3,0xaaaaa)
+
+inst_6:
+// rd==x4, imm_val==5,
+// opcode: lui ; dest:x4; immval:0x5
+TEST_CASE(x22, x4, 0x5000, x13, 48, lui x4,0x5)
+
+inst_7:
+// rd==x15, imm_val==209715,
+// opcode: lui ; dest:x15; immval:0x33333
+TEST_CASE(x22, x15, 0x33333000, x13, 56, lui x15,0x33333)
+
+inst_8:
+// rd==x16, imm_val==419430,
+// opcode: lui ; dest:x16; immval:0x66666
+TEST_CASE(x22, x16, 0x66666000, x13, 64, lui x16,0x66666)
+
+inst_9:
+// rd==x23, imm_val==1023,
+// opcode: lui ; dest:x23; immval:0x3ff
+TEST_CASE(x22, x23, 0x3ff000, x13, 72, lui x23,0x3ff)
+
+inst_10:
+// rd==x31, imm_val==2, imm_val == 2
+// opcode: lui ; dest:x31; immval:0x2
+TEST_CASE(x22, x31, 0x2000, x13, 80, lui x31,0x2)
+
+inst_11:
+// rd==x30, imm_val==349524,
+// opcode: lui ; dest:x30; immval:0x55554
+TEST_CASE(x22, x30, 0x55554000, x13, 88, lui x30,0x55554)
+
+inst_12:
+// rd==x28, imm_val==699049,
+// opcode: lui ; dest:x28; immval:0xaaaa9
+TEST_CASE(x22, x28, -0x55557000, x13, 96, lui x28,0xaaaa9)
+
+inst_13:
+// rd==x10, imm_val==4, imm_val == 4
+// opcode: lui ; dest:x10; immval:0x4
+TEST_CASE(x22, x10, 0x4000, x13, 104, lui x10,0x4)
+
+inst_14:
+// rd==x19, imm_val==209714,
+// opcode: lui ; dest:x19; immval:0x33332
+TEST_CASE(x22, x19, 0x33332000, x13, 112, lui x19,0x33332)
+
+inst_15:
+// rd==x20, imm_val==419429,
+// opcode: lui ; dest:x20; immval:0x66665
+TEST_CASE(x22, x20, 0x66665000, x13, 120, lui x20,0x66665)
+
+inst_16:
+// rd==x9, imm_val==723,
+// opcode: lui ; dest:x9; immval:0x2d3
+TEST_CASE(x22, x9, 0x2d3000, x13, 128, lui x9,0x2d3)
+
+inst_17:
+// rd==x27, imm_val==1022,
+// opcode: lui ; dest:x27; immval:0x3fe
+TEST_CASE(x22, x27, 0x3fe000, x13, 136, lui x27,0x3fe)
+
+inst_18:
+// rd==x6, imm_val==349526,
+// opcode: lui ; dest:x6; immval:0x55556
+TEST_CASE(x22, x6, 0x55556000, x13, 144, lui x6,0x55556)
+
+inst_19:
+// rd==x8, imm_val==699051,
+// opcode: lui ; dest:x8; immval:0xaaaab
+TEST_CASE(x22, x8, -0x55555000, x13, 152, lui x8,0xaaaab)
+
+inst_20:
+// rd==x7, imm_val==6,
+// opcode: lui ; dest:x7; immval:0x6
+TEST_CASE(x22, x7, 0x6000, x13, 160, lui x7,0x6)
+
+inst_21:
+// rd==x5, imm_val==209716,
+// opcode: lui ; dest:x5; immval:0x33334
+TEST_CASE(x22, x5, 0x33334000, x13, 168, lui x5,0x33334)
+
+inst_22:
+// rd==x18, imm_val==419431,
+// opcode: lui ; dest:x18; immval:0x66667
+TEST_CASE(x22, x18, 0x66667000, x13, 176, lui x18,0x66667)
+
+inst_23:
+// rd==x14, imm_val==725,
+// opcode: lui ; dest:x14; immval:0x2d5
+TEST_CASE(x22, x14, 0x2d5000, x13, 184, lui x14,0x2d5)
+
+inst_24:
+// rd==x21, imm_val==1, imm_val == 1
+// opcode: lui ; dest:x21; immval:0x1
+TEST_CASE(x22, x21, 0x1000, x13, 192, lui x21,0x1)
+
+inst_25:
+// rd==x26, imm_val==1024, imm_val == 1024
+// opcode: lui ; dest:x26; immval:0x400
+TEST_CASE(x22, x26, 0x400000, x13, 200, lui x26,0x400)
+
+inst_26:
+// rd==x17, imm_val == 8,
+// opcode: lui ; dest:x17; immval:0x8
+TEST_CASE(x22, x17, 0x8000, x13, 208, lui x17,0x8)
+
+inst_27:
+// rd==x25, imm_val == 16,
+// opcode: lui ; dest:x25; immval:0x10
+TEST_CASE(x2, x25, 0x10000, x13, 216, lui x25,0x10)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_28:
+// rd==x22, imm_val == 32,
+// opcode: lui ; dest:x22; immval:0x20
+TEST_CASE(x2, x22, 0x20000, x1, 0, lui x22,0x20)
+
+inst_29:
+// rd==x0, imm_val == 64,
+// opcode: lui ; dest:x0; immval:0x40
+TEST_CASE(x2, x0, 0, x1, 8, lui x0,0x40)
+
+inst_30:
+// rd==x29, imm_val == 128,
+// opcode: lui ; dest:x29; immval:0x80
+TEST_CASE(x2, x29, 0x80000, x1, 16, lui x29,0x80)
+
+inst_31:
+// rd==x13, imm_val == 983039,
+// opcode: lui ; dest:x13; immval:0xeffff
+TEST_CASE(x2, x13, -0x10001000, x1, 24, lui x13,0xeffff)
+
+inst_32:
+// imm_val == 917503,
+// opcode: lui ; dest:x10; immval:0xdffff
+TEST_CASE(x2, x10, -0x20001000, x1, 32, lui x10,0xdffff)
+
+inst_33:
+// imm_val == 786431,
+// opcode: lui ; dest:x10; immval:0xbffff
+TEST_CASE(x2, x10, -0x40001000, x1, 40, lui x10,0xbffff)
+
+inst_34:
+// imm_val == 524287,
+// opcode: lui ; dest:x10; immval:0x7ffff
+TEST_CASE(x2, x10, 0x7ffff000, x1, 48, lui x10,0x7ffff)
+
+inst_35:
+// imm_val == 256,
+// opcode: lui ; dest:x10; immval:0x100
+TEST_CASE(x2, x10, 0x100000, x1, 56, lui x10,0x100)
+
+inst_36:
+// imm_val == 512,
+// opcode: lui ; dest:x10; immval:0x200
+TEST_CASE(x2, x10, 0x200000, x1, 64, lui x10,0x200)
+
+inst_37:
+// imm_val == 2048,
+// opcode: lui ; dest:x10; immval:0x800
+TEST_CASE(x2, x10, 0x800000, x1, 72, lui x10,0x800)
+
+inst_38:
+// imm_val == 4096,
+// opcode: lui ; dest:x10; immval:0x1000
+TEST_CASE(x2, x10, 0x1000000, x1, 80, lui x10,0x1000)
+
+inst_39:
+// imm_val == 8192,
+// opcode: lui ; dest:x10; immval:0x2000
+TEST_CASE(x2, x10, 0x2000000, x1, 88, lui x10,0x2000)
+
+inst_40:
+// imm_val == 16384,
+// opcode: lui ; dest:x10; immval:0x4000
+TEST_CASE(x2, x10, 0x4000000, x1, 96, lui x10,0x4000)
+
+inst_41:
+// imm_val == 32768,
+// opcode: lui ; dest:x10; immval:0x8000
+TEST_CASE(x2, x10, 0x8000000, x1, 104, lui x10,0x8000)
+
+inst_42:
+// imm_val == 65536,
+// opcode: lui ; dest:x10; immval:0x10000
+TEST_CASE(x2, x10, 0x10000000, x1, 112, lui x10,0x10000)
+
+inst_43:
+// imm_val == 131072,
+// opcode: lui ; dest:x10; immval:0x20000
+TEST_CASE(x2, x10, 0x20000000, x1, 120, lui x10,0x20000)
+
+inst_44:
+// imm_val == 262144,
+// opcode: lui ; dest:x10; immval:0x40000
+TEST_CASE(x2, x10, 0x40000000, x1, 128, lui x10,0x40000)
+
+inst_45:
+// imm_val == 524288,
+// opcode: lui ; dest:x10; immval:0x80000
+TEST_CASE(x2, x10, -0x80000000, x1, 136, lui x10,0x80000)
+
+inst_46:
+// imm_val == 1048574,
+// opcode: lui ; dest:x10; immval:0xffffe
+TEST_CASE(x2, x10, -0x2000, x1, 144, lui x10,0xffffe)
+
+inst_47:
+// imm_val == 1048573,
+// opcode: lui ; dest:x10; immval:0xffffd
+TEST_CASE(x2, x10, -0x3000, x1, 152, lui x10,0xffffd)
+
+inst_48:
+// imm_val == 1048571,
+// opcode: lui ; dest:x10; immval:0xffffb
+TEST_CASE(x2, x10, -0x5000, x1, 160, lui x10,0xffffb)
+
+inst_49:
+// imm_val == 1048567,
+// opcode: lui ; dest:x10; immval:0xffff7
+TEST_CASE(x2, x10, -0x9000, x1, 168, lui x10,0xffff7)
+
+inst_50:
+// imm_val == 1048559,
+// opcode: lui ; dest:x10; immval:0xfffef
+TEST_CASE(x2, x10, -0x11000, x1, 176, lui x10,0xfffef)
+
+inst_51:
+// imm_val == 1048543,
+// opcode: lui ; dest:x10; immval:0xfffdf
+TEST_CASE(x2, x10, -0x21000, x1, 184, lui x10,0xfffdf)
+
+inst_52:
+// imm_val == 1048511,
+// opcode: lui ; dest:x10; immval:0xfffbf
+TEST_CASE(x2, x10, -0x41000, x1, 192, lui x10,0xfffbf)
+
+inst_53:
+// imm_val == 1048447,
+// opcode: lui ; dest:x10; immval:0xfff7f
+TEST_CASE(x2, x10, -0x81000, x1, 200, lui x10,0xfff7f)
+
+inst_54:
+// imm_val == 1048319,
+// opcode: lui ; dest:x10; immval:0xffeff
+TEST_CASE(x2, x10, -0x101000, x1, 208, lui x10,0xffeff)
+
+inst_55:
+// imm_val == 1048063,
+// opcode: lui ; dest:x10; immval:0xffdff
+TEST_CASE(x2, x10, -0x201000, x1, 216, lui x10,0xffdff)
+
+inst_56:
+// imm_val == 1047551,
+// opcode: lui ; dest:x10; immval:0xffbff
+TEST_CASE(x2, x10, -0x401000, x1, 224, lui x10,0xffbff)
+
+inst_57:
+// imm_val == 1046527,
+// opcode: lui ; dest:x10; immval:0xff7ff
+TEST_CASE(x2, x10, -0x801000, x1, 232, lui x10,0xff7ff)
+
+inst_58:
+// imm_val == 1044479,
+// opcode: lui ; dest:x10; immval:0xfefff
+TEST_CASE(x2, x10, -0x1001000, x1, 240, lui x10,0xfefff)
+
+inst_59:
+// imm_val == 1040383,
+// opcode: lui ; dest:x10; immval:0xfdfff
+TEST_CASE(x2, x10, -0x2001000, x1, 248, lui x10,0xfdfff)
+
+inst_60:
+// imm_val == 1032191,
+// opcode: lui ; dest:x10; immval:0xfbfff
+TEST_CASE(x2, x10, -0x4001000, x1, 256, lui x10,0xfbfff)
+
+inst_61:
+// imm_val == 1015807,
+// opcode: lui ; dest:x10; immval:0xf7fff
+TEST_CASE(x2, x10, -0x8001000, x1, 264, lui x10,0xf7fff)
+
+inst_62:
+// imm_val == 64,
+// opcode: lui ; dest:x10; immval:0x40
+TEST_CASE(x2, x10, 0x40000, x1, 272, lui x10,0x40)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x13_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x13_1:
+ .fill 28*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 35*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/lw-align-01.S b/riscof/suite/rv64i_m/I/lw-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..8ed5a6697f130e9c46f3570c0cace7485d25e325
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/lw-align-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the lw instruction of the RISC-V I extension for the lw-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",lw-align)
+
+RVTEST_SIGBASE( x9,signature_x9_1)
+
+inst_0:
+// rs1 == rd, rs1==x26, rd==x26, ea_align == 0 and (imm_val % 4) == 0, imm_val < 0
+// opcode:lw op1:x26; dest:x26; immval:-0x400; align:0
+TEST_LOAD(x9,x14,0,x26,x26,-0x400,0,lw,0)
+
+inst_1:
+// rs1 != rd, rs1==x24, rd==x15, ea_align == 0 and (imm_val % 4) == 1, imm_val > 0
+// opcode:lw op1:x24; dest:x15; immval:0x9; align:0
+TEST_LOAD(x9,x14,0,x24,x15,0x9,8,lw,0)
+
+inst_2:
+// rs1==x3, rd==x12, ea_align == 0 and (imm_val % 4) == 2,
+// opcode:lw op1:x3; dest:x12; immval:0x6; align:0
+TEST_LOAD(x9,x14,0,x3,x12,0x6,16,lw,0)
+
+inst_3:
+// rs1==x13, rd==x27, ea_align == 0 and (imm_val % 4) == 3,
+// opcode:lw op1:x13; dest:x27; immval:-0x5; align:0
+TEST_LOAD(x9,x14,0,x13,x27,-0x5,24,lw,0)
+
+inst_4:
+// rs1==x29, rd==x5, imm_val == 0,
+// opcode:lw op1:x29; dest:x5; immval:0x0; align:0
+TEST_LOAD(x9,x14,0,x29,x5,0x0,32,lw,0)
+
+inst_5:
+// rs1==x10, rd==x31,
+// opcode:lw op1:x10; dest:x31; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x10,x31,-0x800,40,lw,0)
+
+inst_6:
+// rs1==x18, rd==x21,
+// opcode:lw op1:x18; dest:x21; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x18,x21,-0x800,48,lw,0)
+
+inst_7:
+// rs1==x7, rd==x0,
+// opcode:lw op1:x7; dest:x0; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x7,x0,-0x800,56,lw,0)
+
+inst_8:
+// rs1==x23, rd==x4,
+// opcode:lw op1:x23; dest:x4; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x23,x4,-0x800,64,lw,0)
+
+inst_9:
+// rs1==x1, rd==x6,
+// opcode:lw op1:x1; dest:x6; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x1,x6,-0x800,72,lw,0)
+
+inst_10:
+// rs1==x6, rd==x30,
+// opcode:lw op1:x6; dest:x30; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x6,x30,-0x800,80,lw,0)
+
+inst_11:
+// rs1==x31, rd==x19,
+// opcode:lw op1:x31; dest:x19; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x31,x19,-0x800,88,lw,0)
+
+inst_12:
+// rs1==x19, rd==x24,
+// opcode:lw op1:x19; dest:x24; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x19,x24,-0x800,96,lw,0)
+
+inst_13:
+// rs1==x2, rd==x28,
+// opcode:lw op1:x2; dest:x28; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x2,x28,-0x800,104,lw,0)
+
+inst_14:
+// rs1==x11, rd==x2,
+// opcode:lw op1:x11; dest:x2; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x11,x2,-0x800,112,lw,0)
+
+inst_15:
+// rs1==x16, rd==x23,
+// opcode:lw op1:x16; dest:x23; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x16,x23,-0x800,120,lw,0)
+
+inst_16:
+// rs1==x27, rd==x16,
+// opcode:lw op1:x27; dest:x16; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x27,x16,-0x800,128,lw,0)
+
+inst_17:
+// rs1==x17, rd==x3,
+// opcode:lw op1:x17; dest:x3; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x17,x3,-0x800,136,lw,0)
+
+inst_18:
+// rs1==x12, rd==x7,
+// opcode:lw op1:x12; dest:x7; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x12,x7,-0x800,144,lw,0)
+
+inst_19:
+// rs1==x15, rd==x8,
+// opcode:lw op1:x15; dest:x8; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x15,x8,-0x800,152,lw,0)
+
+inst_20:
+// rs1==x30, rd==x1,
+// opcode:lw op1:x30; dest:x1; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x30,x1,-0x800,160,lw,0)
+
+inst_21:
+// rs1==x20, rd==x17,
+// opcode:lw op1:x20; dest:x17; immval:-0x800; align:0
+TEST_LOAD(x9,x14,0,x20,x17,-0x800,168,lw,0)
+
+inst_22:
+// rs1==x28, rd==x13,
+// opcode:lw op1:x28; dest:x13; immval:-0x800; align:0
+TEST_LOAD(x9,x2,0,x28,x13,-0x800,176,lw,0)
+
+inst_23:
+// rs1==x25, rd==x14,
+// opcode:lw op1:x25; dest:x14; immval:-0x800; align:0
+TEST_LOAD(x9,x2,0,x25,x14,-0x800,184,lw,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_24:
+// rs1==x21, rd==x20,
+// opcode:lw op1:x21; dest:x20; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x21,x20,-0x800,0,lw,0)
+
+inst_25:
+// rs1==x9, rd==x11,
+// opcode:lw op1:x9; dest:x11; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x9,x11,-0x800,8,lw,0)
+
+inst_26:
+// rs1==x14, rd==x29,
+// opcode:lw op1:x14; dest:x29; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x14,x29,-0x800,16,lw,0)
+
+inst_27:
+// rs1==x22, rd==x9,
+// opcode:lw op1:x22; dest:x9; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x22,x9,-0x800,24,lw,0)
+
+inst_28:
+// rs1==x8, rd==x22,
+// opcode:lw op1:x8; dest:x22; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x8,x22,-0x800,32,lw,0)
+
+inst_29:
+// rs1==x4, rd==x25,
+// opcode:lw op1:x4; dest:x25; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x4,x25,-0x800,40,lw,0)
+
+inst_30:
+// rs1==x5, rd==x10,
+// opcode:lw op1:x5; dest:x10; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x5,x10,-0x800,48,lw,0)
+
+inst_31:
+// rd==x18,
+// opcode:lw op1:x5; dest:x18; immval:-0x800; align:0
+TEST_LOAD(x1,x2,0,x5,x18,-0x800,56,lw,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x9_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x9_1:
+ .fill 24*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 8*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/lwu-align-01.S b/riscof/suite/rv64i_m/I/lwu-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..773502ffb783420eb2f628d00e74567a2e7fe16d
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/lwu-align-01.S
@@ -0,0 +1,234 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the lwu instruction of the RISC-V I extension for the lwu-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*);def TEST_CASE_1=True;",lwu-align)
+
+RVTEST_SIGBASE( x14,signature_x14_1)
+
+inst_0:
+// rs1 == rd, rs1==x26, rd==x26, ea_align == 0 and (imm_val % 4) == 0, imm_val > 0
+// opcode:lwu op1:x26; dest:x26; immval:0x200; align:0
+TEST_LOAD(x14,x25,0,x26,x26,0x200,0,lwu,0)
+
+inst_1:
+// rs1 != rd, rs1==x17, rd==x29, ea_align == 0 and (imm_val % 4) == 1, imm_val < 0
+// opcode:lwu op1:x17; dest:x29; immval:-0x7; align:0
+TEST_LOAD(x14,x25,0,x17,x29,-0x7,8,lwu,0)
+
+inst_2:
+// rs1==x13, rd==x6, ea_align == 0 and (imm_val % 4) == 2,
+// opcode:lwu op1:x13; dest:x6; immval:-0x2; align:0
+TEST_LOAD(x14,x25,0,x13,x6,-0x2,16,lwu,0)
+
+inst_3:
+// rs1==x11, rd==x21, ea_align == 0 and (imm_val % 4) == 3,
+// opcode:lwu op1:x11; dest:x21; immval:-0x21; align:0
+TEST_LOAD(x14,x25,0,x11,x21,-0x21,24,lwu,0)
+
+inst_4:
+// rs1==x7, rd==x8, imm_val == 0,
+// opcode:lwu op1:x7; dest:x8; immval:0x0; align:0
+TEST_LOAD(x14,x25,0,x7,x8,0x0,32,lwu,0)
+
+inst_5:
+// rs1==x30, rd==x4,
+// opcode:lwu op1:x30; dest:x4; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x30,x4,-0x800,40,lwu,0)
+
+inst_6:
+// rs1==x1, rd==x0,
+// opcode:lwu op1:x1; dest:x0; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x1,x0,-0x800,48,lwu,0)
+
+inst_7:
+// rs1==x22, rd==x20,
+// opcode:lwu op1:x22; dest:x20; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x22,x20,-0x800,56,lwu,0)
+
+inst_8:
+// rs1==x9, rd==x2,
+// opcode:lwu op1:x9; dest:x2; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x9,x2,-0x800,64,lwu,0)
+
+inst_9:
+// rs1==x28, rd==x23,
+// opcode:lwu op1:x28; dest:x23; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x28,x23,-0x800,72,lwu,0)
+
+inst_10:
+// rs1==x24, rd==x11,
+// opcode:lwu op1:x24; dest:x11; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x24,x11,-0x800,80,lwu,0)
+
+inst_11:
+// rs1==x3, rd==x15,
+// opcode:lwu op1:x3; dest:x15; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x3,x15,-0x800,88,lwu,0)
+
+inst_12:
+// rs1==x8, rd==x24,
+// opcode:lwu op1:x8; dest:x24; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x8,x24,-0x800,96,lwu,0)
+
+inst_13:
+// rs1==x4, rd==x7,
+// opcode:lwu op1:x4; dest:x7; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x4,x7,-0x800,104,lwu,0)
+
+inst_14:
+// rs1==x2, rd==x18,
+// opcode:lwu op1:x2; dest:x18; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x2,x18,-0x800,112,lwu,0)
+
+inst_15:
+// rs1==x10, rd==x3,
+// opcode:lwu op1:x10; dest:x3; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x10,x3,-0x800,120,lwu,0)
+
+inst_16:
+// rs1==x29, rd==x9,
+// opcode:lwu op1:x29; dest:x9; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x29,x9,-0x800,128,lwu,0)
+
+inst_17:
+// rs1==x12, rd==x10,
+// opcode:lwu op1:x12; dest:x10; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x12,x10,-0x800,136,lwu,0)
+
+inst_18:
+// rs1==x23, rd==x19,
+// opcode:lwu op1:x23; dest:x19; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x23,x19,-0x800,144,lwu,0)
+
+inst_19:
+// rs1==x5, rd==x30,
+// opcode:lwu op1:x5; dest:x30; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x5,x30,-0x800,152,lwu,0)
+
+inst_20:
+// rs1==x16, rd==x13,
+// opcode:lwu op1:x16; dest:x13; immval:-0x800; align:0
+TEST_LOAD(x14,x25,0,x16,x13,-0x800,160,lwu,0)
+
+inst_21:
+// rs1==x6, rd==x31,
+// opcode:lwu op1:x6; dest:x31; immval:-0x800; align:0
+TEST_LOAD(x14,x3,0,x6,x31,-0x800,168,lwu,0)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_22:
+// rs1==x15, rd==x14,
+// opcode:lwu op1:x15; dest:x14; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x15,x14,-0x800,0,lwu,0)
+
+inst_23:
+// rs1==x27, rd==x25,
+// opcode:lwu op1:x27; dest:x25; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x27,x25,-0x800,8,lwu,0)
+
+inst_24:
+// rs1==x31, rd==x12,
+// opcode:lwu op1:x31; dest:x12; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x31,x12,-0x800,16,lwu,0)
+
+inst_25:
+// rs1==x18, rd==x27,
+// opcode:lwu op1:x18; dest:x27; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x18,x27,-0x800,24,lwu,0)
+
+inst_26:
+// rs1==x20, rd==x16,
+// opcode:lwu op1:x20; dest:x16; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x20,x16,-0x800,32,lwu,0)
+
+inst_27:
+// rs1==x19, rd==x28,
+// opcode:lwu op1:x19; dest:x28; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x19,x28,-0x800,40,lwu,0)
+
+inst_28:
+// rs1==x21, rd==x17,
+// opcode:lwu op1:x21; dest:x17; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x21,x17,-0x800,48,lwu,0)
+
+inst_29:
+// rs1==x25, rd==x22,
+// opcode:lwu op1:x25; dest:x22; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x25,x22,-0x800,56,lwu,0)
+
+inst_30:
+// rs1==x14, rd==x1,
+// opcode:lwu op1:x14; dest:x1; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x14,x1,-0x800,64,lwu,0)
+
+inst_31:
+// rd==x5,
+// opcode:lwu op1:x8; dest:x5; immval:-0x800; align:0
+TEST_LOAD(x2,x3,0,x8,x5,-0x800,72,lwu,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x14_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x14_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 10*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/or-01.S b/riscof/suite/rv64i_m/I/or-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..ade2b31da2ff7566c1be52473f4136276db19728
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/or-01.S
@@ -0,0 +1,3479 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the or instruction of the RISC-V I extension for the or covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",or)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x0, rs2==x0, rd==x28, rs1_val > 0 and rs2_val > 0, rs1_val == 134217728, rs1_val != rs2_val, rs2_val == 6148914691236517205
+// opcode: or ; op1:x0; op2:x0; dest:x28; op1val:0x0; op2val:0x0
+TEST_RR_OP(or, x28, x0, x0, 0x0, 0x0, 0x0, x1, 0, x3)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x21, rs2==x8, rd==x8, rs1_val > 0 and rs2_val < 0, rs2_val == -9, rs1_val == 140737488355328
+// opcode: or ; op1:x21; op2:x8; dest:x8; op1val:0x800000000000; op2val:-0x9
+TEST_RR_OP(or, x8, x21, x8, 0xfffffffffffffff7, 0x800000000000, -0x9, x1, 8, x3)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x11, rs2==x11, rd==x11, rs1_val < 0 and rs2_val < 0, rs2_val == -1125899906842625
+// opcode: or ; op1:x11; op2:x11; dest:x11; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(or, x11, x11, x11, 0xffffffff4afb0ccd, -0xb504f333, -0xb504f333, x1, 16, x3)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x15, rs2==x5, rd==x10, rs1_val < 0 and rs2_val > 0, rs1_val == -262145, rs2_val == 288230376151711744
+// opcode: or ; op1:x15; op2:x5; dest:x10; op1val:-0x40001; op2val:0x400000000000000
+TEST_RR_OP(or, x10, x15, x5, 0xfffffffffffbffff, -0x40001, 0x400000000000000, x1, 24, x3)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x7, rs2==x17, rd==x7, rs1_val == rs2_val, rs1_val==3689348814741910323 and rs2_val==3689348814741910323
+// opcode: or ; op1:x7; op2:x17; dest:x7; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_RR_OP(or, x7, x7, x17, 0x3333333333333333, 0x3333333333333333, 0x3333333333333333, x1, 32, x3)
+
+inst_5:
+// rs1==x4, rs2==x26, rd==x14, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, rs1_val == 4294967296
+// opcode: or ; op1:x4; op2:x26; dest:x14; op1val:0x100000000; op2val:-0x8000000000000000
+TEST_RR_OP(or, x14, x4, x26, 0x8000000100000000, 0x100000000, -0x8000000000000000, x1, 40, x3)
+
+inst_6:
+// rs1==x14, rs2==x18, rd==x25, rs2_val == 0, rs1_val == 4, rs1_val==4 and rs2_val==0
+// opcode: or ; op1:x14; op2:x18; dest:x25; op1val:0x4; op2val:0x0
+TEST_RR_OP(or, x25, x14, x18, 0x4, 0x4, 0x0, x1, 48, x3)
+
+inst_7:
+// rs1==x10, rs2==x12, rd==x2, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807, rs1_val == 2
+// opcode: or ; op1:x10; op2:x12; dest:x2; op1val:0x2; op2val:0x7fffffffffffffff
+TEST_RR_OP(or, x2, x10, x12, 0x7fffffffffffffff, 0x2, 0x7fffffffffffffff, x1, 56, x3)
+
+inst_8:
+// rs1==x24, rs2==x19, rd==x27, rs2_val == 1, rs1_val == 17592186044416
+// opcode: or ; op1:x24; op2:x19; dest:x27; op1val:0x100000000000; op2val:0x1
+TEST_RR_OP(or, x27, x24, x19, 0x100000000001, 0x100000000000, 0x1, x1, 64, x3)
+
+inst_9:
+// rs1==x31, rs2==x22, rd==x21, rs1_val == (-2**(xlen-1)), rs2_val == -524289, rs1_val == -9223372036854775808
+// opcode: or ; op1:x31; op2:x22; dest:x21; op1val:-0x8000000000000000; op2val:-0x80001
+TEST_RR_OP(or, x21, x31, x22, 0xfffffffffff7ffff, -0x8000000000000000, -0x80001, x1, 72, x3)
+
+inst_10:
+// rs1==x20, rs2==x25, rd==x17, rs1_val == 0, rs2_val == 256
+// opcode: or ; op1:x20; op2:x25; dest:x17; op1val:0x0; op2val:0x100
+TEST_RR_OP(or, x17, x20, x25, 0x100, 0x0, 0x100, x1, 80, x3)
+
+inst_11:
+// rs1==x29, rs2==x9, rd==x26, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, rs2_val == -4398046511105
+// opcode: or ; op1:x29; op2:x9; dest:x26; op1val:0x7fffffffffffffff; op2val:-0x40000000001
+TEST_RR_OP(or, x26, x29, x9, 0xffffffffffffffff, 0x7fffffffffffffff, -0x40000000001, x1, 88, x3)
+
+inst_12:
+// rs1==x28, rs2==x15, rd==x16, rs1_val == 1, rs2_val == -2097153
+// opcode: or ; op1:x28; op2:x15; dest:x16; op1val:0x1; op2val:-0x200001
+TEST_RR_OP(or, x16, x28, x15, 0xffffffffffdfffff, 0x1, -0x200001, x1, 96, x3)
+
+inst_13:
+// rs1==x13, rs2==x27, rd==x30, rs2_val == 2, rs1_val==-3037000499 and rs2_val==2
+// opcode: or ; op1:x13; op2:x27; dest:x30; op1val:-0xb504f333; op2val:0x2
+TEST_RR_OP(or, x30, x13, x27, 0xffffffff4afb0ccf, -0xb504f333, 0x2, x1, 104, x3)
+
+inst_14:
+// rs1==x9, rs2==x3, rd==x0, rs2_val == 4, rs1_val == 8192
+// opcode: or ; op1:x9; op2:x3; dest:x0; op1val:0x2000; op2val:0x4
+TEST_RR_OP(or, x0, x9, x3, 0, 0x2000, 0x4, x1, 112, x14)
+RVTEST_SIGBASE( x11,signature_x11_0)
+
+inst_15:
+// rs1==x16, rs2==x10, rd==x9, rs2_val == 8,
+// opcode: or ; op1:x16; op2:x10; dest:x9; op1val:0x5555555555555556; op2val:0x8
+TEST_RR_OP(or, x9, x16, x10, 0x555555555555555e, 0x5555555555555556, 0x8, x11, 0, x14)
+
+inst_16:
+// rs1==x18, rs2==x4, rd==x13, rs2_val == 16, rs1_val == 2305843009213693952
+// opcode: or ; op1:x18; op2:x4; dest:x13; op1val:0x2000000000000000; op2val:0x10
+TEST_RR_OP(or, x13, x18, x4, 0x2000000000000010, 0x2000000000000000, 0x10, x11, 8, x14)
+
+inst_17:
+// rs1==x17, rs2==x28, rd==x3, rs2_val == 32, rs1_val == -18014398509481985
+// opcode: or ; op1:x17; op2:x28; dest:x3; op1val:-0x40000000000001; op2val:0x20
+TEST_RR_OP(or, x3, x17, x28, 0xffbfffffffffffff, -0x40000000000001, 0x20, x11, 16, x14)
+
+inst_18:
+// rs1==x25, rs2==x13, rd==x19, rs2_val == 64, rs1_val == 8796093022208
+// opcode: or ; op1:x25; op2:x13; dest:x19; op1val:0x80000000000; op2val:0x40
+TEST_RR_OP(or, x19, x25, x13, 0x80000000040, 0x80000000000, 0x40, x11, 24, x14)
+
+inst_19:
+// rs1==x5, rs2==x30, rd==x29, rs2_val == 128, rs1_val == 576460752303423488
+// opcode: or ; op1:x5; op2:x30; dest:x29; op1val:0x800000000000000; op2val:0x80
+TEST_RR_OP(or, x29, x5, x30, 0x800000000000080, 0x800000000000000, 0x80, x11, 32, x14)
+
+inst_20:
+// rs1==x19, rs2==x31, rd==x24, rs2_val == 512, rs1_val == 35184372088832
+// opcode: or ; op1:x19; op2:x31; dest:x24; op1val:0x200000000000; op2val:0x200
+TEST_RR_OP(or, x24, x19, x31, 0x200000000200, 0x200000000000, 0x200, x11, 40, x14)
+
+inst_21:
+// rs1==x12, rs2==x7, rd==x23, rs2_val == 1024, rs1_val == -144115188075855873
+// opcode: or ; op1:x12; op2:x7; dest:x23; op1val:-0x200000000000001; op2val:0x400
+TEST_RR_OP(or, x23, x12, x7, 0xfdffffffffffffff, -0x200000000000001, 0x400, x11, 48, x14)
+
+inst_22:
+// rs1==x3, rs2==x21, rd==x31, rs2_val == 2048, rs1_val == -288230376151711745
+// opcode: or ; op1:x3; op2:x21; dest:x31; op1val:-0x400000000000001; op2val:0x800
+TEST_RR_OP(or, x31, x3, x21, 0xfbffffffffffffff, -0x400000000000001, 0x800, x11, 56, x14)
+
+inst_23:
+// rs1==x23, rs2==x24, rd==x12, rs2_val == 4096,
+// opcode: or ; op1:x23; op2:x24; dest:x12; op1val:0x80000000000; op2val:0x1000
+TEST_RR_OP(or, x12, x23, x24, 0x80000001000, 0x80000000000, 0x1000, x11, 64, x14)
+
+inst_24:
+// rs1==x22, rs2==x29, rd==x4, rs2_val == 8192,
+// opcode: or ; op1:x22; op2:x29; dest:x4; op1val:0x2000; op2val:0x2000
+TEST_RR_OP(or, x4, x22, x29, 0x2000, 0x2000, 0x2000, x11, 72, x14)
+
+inst_25:
+// rs1==x30, rs2==x1, rd==x18, rs2_val == 16384,
+// opcode: or ; op1:x30; op2:x1; dest:x18; op1val:0x80000000000; op2val:0x4000
+TEST_RR_OP(or, x18, x30, x1, 0x80000004000, 0x80000000000, 0x4000, x11, 80, x14)
+
+inst_26:
+// rs1==x6, rs2==x20, rd==x1, rs2_val == 32768, rs1_val == -17
+// opcode: or ; op1:x6; op2:x20; dest:x1; op1val:-0x11; op2val:0x8000
+TEST_RR_OP(or, x1, x6, x20, 0xffffffffffffffef, -0x11, 0x8000, x11, 88, x14)
+
+inst_27:
+// rs1==x8, rs2==x23, rd==x5, rs2_val == 65536,
+// opcode: or ; op1:x8; op2:x23; dest:x5; op1val:0x80000000000; op2val:0x10000
+TEST_RR_OP(or, x5, x8, x23, 0x80000010000, 0x80000000000, 0x10000, x11, 96, x14)
+
+inst_28:
+// rs1==x27, rs2==x2, rd==x6, rs2_val == 131072, rs1_val == -32769
+// opcode: or ; op1:x27; op2:x2; dest:x6; op1val:-0x8001; op2val:0x20000
+TEST_RR_OP(or, x6, x27, x2, 0xffffffffffff7fff, -0x8001, 0x20000, x11, 104, x14)
+
+inst_29:
+// rs1==x26, rs2==x6, rd==x20, rs2_val == 262144, rs1_val == -4194305
+// opcode: or ; op1:x26; op2:x6; dest:x20; op1val:-0x400001; op2val:0x40000
+TEST_RR_OP(or, x20, x26, x6, 0xffffffffffbfffff, -0x400001, 0x40000, x11, 112, x4)
+RVTEST_SIGBASE( x3,signature_x3_0)
+
+inst_30:
+// rs1==x2, rs2==x14, rd==x22, rs2_val == 524288,
+// opcode: or ; op1:x2; op2:x14; dest:x22; op1val:0x9; op2val:0x80000
+TEST_RR_OP(or, x22, x2, x14, 0x80009, 0x9, 0x80000, x3, 0, x4)
+
+inst_31:
+// rs1==x1, rs2==x16, rd==x15, rs2_val == 1048576,
+// opcode: or ; op1:x1; op2:x16; dest:x15; op1val:-0xb504f332; op2val:0x100000
+TEST_RR_OP(or, x15, x1, x16, 0xffffffff4afb0cce, -0xb504f332, 0x100000, x3, 8, x4)
+
+inst_32:
+// rs2_val == 2097152, rs1_val == 549755813888
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0x200000
+TEST_RR_OP(or, x12, x10, x11, 0x8000200000, 0x8000000000, 0x200000, x3, 16, x4)
+
+inst_33:
+// rs2_val == 4194304, rs1_val == 32768
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:0x400000
+TEST_RR_OP(or, x12, x10, x11, 0x408000, 0x8000, 0x400000, x3, 24, x4)
+
+inst_34:
+// rs2_val == 8388608, rs1_val == 137438953472
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:0x800000
+TEST_RR_OP(or, x12, x10, x11, 0x2000800000, 0x2000000000, 0x800000, x3, 32, x4)
+
+inst_35:
+// rs2_val == 16777216,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x9; op2val:0x1000000
+TEST_RR_OP(or, x12, x10, x11, 0x1000009, 0x9, 0x1000000, x3, 40, x4)
+
+inst_36:
+// rs2_val == 33554432,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0x2000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffbffff, -0x40001, 0x2000000, x3, 48, x4)
+
+inst_37:
+// rs2_val == 67108864, rs1_val == 1024
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:0x4000000
+TEST_RR_OP(or, x12, x10, x11, 0x4000400, 0x400, 0x4000000, x3, 56, x4)
+
+inst_38:
+// rs2_val == 134217728, rs1_val == -4611686018427387905
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:0x8000000
+TEST_RR_OP(or, x12, x10, x11, 0xbfffffffffffffff, -0x4000000000000001, 0x8000000, x3, 64, x4)
+
+inst_39:
+// rs2_val == 268435456,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x10000000
+TEST_RR_OP(or, x12, x10, x11, 0x10000004, 0x4, 0x10000000, x3, 72, x4)
+
+inst_40:
+// rs2_val == 536870912, rs1_val == 33554432
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x20000000
+TEST_RR_OP(or, x12, x10, x11, 0x22000000, 0x2000000, 0x20000000, x3, 80, x4)
+
+inst_41:
+// rs2_val == 1073741824,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000000000; op2val:0x40000000
+TEST_RR_OP(or, x12, x10, x11, 0x8000000040000000, -0x8000000000000000, 0x40000000, x3, 88, x4)
+
+inst_42:
+// rs2_val == 2147483648,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000000; op2val:0x80000000
+TEST_RR_OP(or, x12, x10, x11, 0xc000000080000000, -0x4000000000000000, 0x80000000, x3, 96, x4)
+
+inst_43:
+// rs2_val == 4294967296, rs1_val == 64
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0x100000000
+TEST_RR_OP(or, x12, x10, x11, 0x100000040, 0x40, 0x100000000, x3, 104, x4)
+
+inst_44:
+// rs2_val == 8589934592, rs1_val == -8388609
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x200000000
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffff7fffff, -0x800001, 0x200000000, x3, 112, x4)
+
+inst_45:
+// rs2_val == 17179869184, rs1_val == -2049
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x400000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffff7ff, -0x801, 0x400000000, x3, 120, x4)
+
+inst_46:
+// rs2_val == 34359738368, rs1_val == 72057594037927936
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:0x800000000
+TEST_RR_OP(or, x12, x10, x11, 0x100000800000000, 0x100000000000000, 0x800000000, x3, 128, x4)
+
+inst_47:
+// rs2_val == 68719476736,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x1000000000
+TEST_RR_OP(or, x12, x10, x11, 0x1000000000, 0x0, 0x1000000000, x3, 136, x4)
+
+inst_48:
+// rs2_val == 137438953472,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:0x2000000000
+TEST_RR_OP(or, x12, x10, x11, 0xffbfffffffffffff, -0x40000000000001, 0x2000000000, x3, 144, x4)
+
+inst_49:
+// rs2_val == 274877906944,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x4000000000
+TEST_RR_OP(or, x12, x10, x11, 0x4008000000, 0x8000000, 0x4000000000, x3, 152, x4)
+
+inst_50:
+// rs2_val == 549755813888, rs1_val == -8193
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x8000000000
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffdfff, -0x2001, 0x8000000000, x3, 160, x4)
+
+inst_51:
+// rs2_val == 1099511627776,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:0x10000000000
+TEST_RR_OP(or, x12, x10, x11, 0x90000000000, 0x80000000000, 0x10000000000, x3, 168, x4)
+
+inst_52:
+// rs2_val == 2199023255552, rs1_val == -268435457
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x20000000000
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffefffffff, -0x10000001, 0x20000000000, x3, 176, x4)
+
+inst_53:
+// rs2_val == 4398046511104, rs1_val == 1099511627776
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x40000000000
+TEST_RR_OP(or, x12, x10, x11, 0x50000000000, 0x10000000000, 0x40000000000, x3, 184, x4)
+
+inst_54:
+// rs2_val == 8796093022208, rs1_val == -8589934593
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:0x80000000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffdffffffff, -0x200000001, 0x80000000000, x3, 192, x4)
+
+inst_55:
+// rs2_val == 17592186044416,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x100000000000
+TEST_RR_OP(or, x12, x10, x11, 0x100000000003, 0x3, 0x100000000000, x3, 200, x4)
+
+inst_56:
+// rs2_val == 35184372088832,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0x200000000000
+TEST_RR_OP(or, x12, x10, x11, 0x200000002000, 0x2000, 0x200000000000, x3, 208, x4)
+
+inst_57:
+// rs2_val == 70368744177664, rs1_val == -65
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x400000000000
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffbf, -0x41, 0x400000000000, x3, 216, x4)
+
+inst_58:
+// rs2_val == 140737488355328,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffffffffffff; op2val:0x800000000000
+TEST_RR_OP(or, x12, x10, x11, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x800000000000, x3, 224, x4)
+
+inst_59:
+// rs2_val == 281474976710656, rs1_val == 16777216
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0x1000000000000
+TEST_RR_OP(or, x12, x10, x11, 0x1000001000000, 0x1000000, 0x1000000000000, x3, 232, x4)
+
+inst_60:
+// rs2_val == 562949953421312, rs1_val == -65537
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x2000000000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffeffff, -0x10001, 0x2000000000000, x3, 240, x4)
+
+inst_61:
+// rs2_val == 1125899906842624,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x4000000000000
+TEST_RR_OP(or, x12, x10, x11, 0x40000b504f332, 0xb504f332, 0x4000000000000, x3, 248, x4)
+
+inst_62:
+// rs2_val == 2251799813685248, rs1_val == -2251799813685249
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:0x8000000000000
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x8000000000001, 0x8000000000000, x3, 256, x4)
+
+inst_63:
+// rs2_val == 4503599627370496,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:0x10000000000000
+TEST_RR_OP(or, x12, x10, x11, 0xbfffffffffffffff, -0x4000000000000001, 0x10000000000000, x3, 264, x4)
+
+inst_64:
+// rs2_val == 9007199254740992,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0x20000000000000
+TEST_RR_OP(or, x12, x10, x11, 0x20008000000000, 0x8000000000, 0x20000000000000, x3, 272, x4)
+
+inst_65:
+// rs2_val == 18014398509481984, rs1_val == -16385
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x40000000000000
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffbfff, -0x4001, 0x40000000000000, x3, 280, x4)
+
+inst_66:
+// rs2_val == 36028797018963968,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x80000000000000
+TEST_RR_OP(or, x12, x10, x11, 0x80000002000000, 0x2000000, 0x80000000000000, x3, 288, x4)
+
+inst_67:
+// rs2_val == 72057594037927936,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x100000000000000
+TEST_RR_OP(or, x12, x10, x11, 0xabaaaaaaaaaaaaab, -0x5555555555555555, 0x100000000000000, x3, 296, x4)
+
+inst_68:
+// rs2_val == 144115188075855872,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x200000000000000
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x200000000000000, x3, 304, x4)
+
+inst_69:
+// rs2_val == 576460752303423488,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x800000000000000
+TEST_RR_OP(or, x12, x10, x11, 0x800000000000002, 0x2, 0x800000000000000, x3, 312, x4)
+
+inst_70:
+// rs2_val == 1152921504606846976, rs1_val == -4398046511105
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:0x1000000000000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffbffffffffff, -0x40000000001, 0x1000000000000000, x3, 320, x4)
+
+inst_71:
+// rs2_val == 2305843009213693952, rs1_val == 6148914691236517205
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x2000000000000000
+TEST_RR_OP(or, x12, x10, x11, 0x7555555555555555, 0x5555555555555555, 0x2000000000000000, x3, 328, x4)
+
+inst_72:
+// rs2_val == 4611686018427387904, rs1_val == 18014398509481984
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:0x4000000000000000
+TEST_RR_OP(or, x12, x10, x11, 0x4040000000000000, 0x40000000000000, 0x4000000000000000, x3, 336, x4)
+
+inst_73:
+// rs2_val == -2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x2
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, 0x3, -0x2, x3, 344, x4)
+
+inst_74:
+// rs2_val == -3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:-0x3
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, 0x7, -0x3, x3, 352, x4)
+
+inst_75:
+// rs2_val == -5, rs1_val == 17179869184
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:-0x5
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffb, 0x400000000, -0x5, x3, 360, x4)
+
+inst_76:
+// rs2_val == -17,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:-0x11
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x400001, -0x11, x3, 368, x4)
+
+inst_77:
+// rs2_val == -33,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:-0x21
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffdf, 0x8000000, -0x21, x3, 376, x4)
+
+inst_78:
+// rs2_val == -65, rs1_val == 70368744177664
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:-0x41
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffbf, 0x400000000000, -0x41, x3, 384, x4)
+
+inst_79:
+// rs2_val == -129, rs1_val == -549755813889
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:-0x81
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x8000000001, -0x81, x3, 392, x4)
+
+inst_80:
+// rs2_val == -257,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000000; op2val:-0x101
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffeff, -0x4000000000000000, -0x101, x3, 400, x4)
+
+inst_81:
+// rs2_val == -513, rs1_val == -70368744177665
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:-0x201
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x400000000001, -0x201, x3, 408, x4)
+
+inst_82:
+// rs2_val == -1025, rs1_val == -137438953473
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:-0x401
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x2000000001, -0x401, x3, 416, x4)
+
+inst_83:
+// rs2_val == -2049, rs1_val == -3
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0x801
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x3, -0x801, x3, 424, x4)
+
+inst_84:
+// rs2_val == -4097,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:-0x1001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x400000000001, -0x1001, x3, 432, x4)
+
+inst_85:
+// rs2_val == -8193, rs1_val == 262144
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:-0x2001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffdfff, 0x40000, -0x2001, x3, 440, x4)
+
+inst_86:
+// rs2_val == -16385,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x4001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffbfff, 0x3333333333333333, -0x4001, x3, 448, x4)
+
+inst_87:
+// rs2_val == -32769,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x8001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffff7fff, -0xb504f333, -0x8001, x3, 456, x4)
+
+inst_88:
+// rs2_val == -65537,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x10001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, 0x5555555555555556, -0x10001, x3, 464, x4)
+
+inst_89:
+// rs2_val == -131073, rs1_val == -1073741825
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:-0x20001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x40000001, -0x20001, x3, 472, x4)
+
+inst_90:
+// rs2_val == -262145,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:-0x40001
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffbffff, 0x80000000000, -0x40001, x3, 480, x4)
+
+inst_91:
+// rs2_val == -1048577,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0x100001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x3, -0x100001, x3, 488, x4)
+
+inst_92:
+// rs2_val == -4194305,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x400001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0xb504f332, -0x400001, x3, 496, x4)
+
+inst_93:
+// rs2_val == -8388609, rs1_val == 144115188075855872
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:-0x800001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffff7fffff, 0x200000000000000, -0x800001, x3, 504, x4)
+
+inst_94:
+// rs2_val == -16777217,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:-0x1000001
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffeffffff, 0x2000000, -0x1000001, x3, 512, x4)
+
+inst_95:
+// rs2_val == -33554433,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x2000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0xb504f333, -0x2000001, x3, 520, x4)
+
+inst_96:
+// rs2_val == -67108865,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x4000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, 0x5555555555555555, -0x4000001, x3, 528, x4)
+
+inst_97:
+// rs2_val == -134217729,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x8000001
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffff7ffffff, 0xb504f333, -0x8000001, x3, 536, x4)
+
+inst_98:
+// rs2_val == -268435457, rs1_val == -524289
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:-0x10000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x80001, -0x10000001, x3, 544, x4)
+
+inst_99:
+// rs2_val == -536870913, rs1_val == -9007199254740993
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:-0x20000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x20000000000001, -0x20000001, x3, 552, x4)
+
+inst_100:
+// rs2_val == -1073741825,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x40000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x10001, -0x40000001, x3, 560, x4)
+
+inst_101:
+// rs2_val == -2147483649,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:-0x80000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7fffffff, 0x2000, -0x80000001, x3, 568, x4)
+
+inst_102:
+// rs2_val == -4294967297, rs1_val == -9
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:-0x100000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x9, -0x100000001, x3, 576, x4)
+
+inst_103:
+// rs2_val == -8589934593,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:-0x200000001
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffdffffffff, 0x7, -0x200000001, x3, 584, x4)
+
+inst_104:
+// rs2_val == -17179869185, rs1_val == 562949953421312
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:-0x400000001
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffbffffffff, 0x2000000000000, -0x400000001, x3, 592, x4)
+
+inst_105:
+// rs2_val == -34359738369, rs1_val == 4194304
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:-0x800000001
+TEST_RR_OP(or, x12, x10, x11, 0xfffffff7ffffffff, 0x400000, -0x800000001, x3, 600, x4)
+
+inst_106:
+// rs2_val == -68719476737,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:-0x1000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffefffffffff, 0x40000000000000, -0x1000000001, x3, 608, x4)
+
+inst_107:
+// rs2_val == -137438953473, rs1_val == 524288
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:-0x2000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffdfffffffff, 0x80000, -0x2000000001, x3, 616, x4)
+
+inst_108:
+// rs2_val == -274877906945,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x4000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffbfffffffff, 0x3333333333333332, -0x4000000001, x3, 624, x4)
+
+inst_109:
+// rs2_val == -549755813889,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:-0x8000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x2000000001, -0x8000000001, x3, 632, x4)
+
+inst_110:
+// rs2_val == -1099511627777,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x10000000001
+TEST_RR_OP(or, x12, x10, x11, 0xfffffeffffffffff, 0x5, -0x10000000001, x3, 640, x4)
+
+inst_111:
+// rs2_val == -2199023255553, rs1_val == 274877906944
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:-0x20000000001
+TEST_RR_OP(or, x12, x10, x11, 0xfffffdffffffffff, 0x4000000000, -0x20000000001, x3, 648, x4)
+
+inst_112:
+// rs2_val == -8796093022209, rs1_val == -129
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:-0x80000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x81, -0x80000000001, x3, 656, x4)
+
+inst_113:
+// rs2_val == -17592186044417,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:-0x100000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffefffffffffff, 0x80000000000, -0x100000000001, x3, 664, x4)
+
+inst_114:
+// rs2_val == -35184372088833,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x200000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffdfffffffffff, 0x5, -0x200000000001, x3, 672, x4)
+
+inst_115:
+// rs2_val == -70368744177665, rs1_val == 1048576
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:-0x400000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffbfffffffffff, 0x100000, -0x400000000001, x3, 680, x4)
+
+inst_116:
+// rs2_val == -140737488355329,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:-0x800000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x40001, -0x800000000001, x3, 688, x4)
+
+inst_117:
+// rs2_val == -281474976710657,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x1000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xfffeffffffffffff, 0x3, -0x1000000000001, x3, 696, x4)
+
+inst_118:
+// rs2_val == -562949953421313,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:-0x2000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xfffdffffffffffff, 0x2000, -0x2000000000001, x3, 704, x4)
+
+inst_119:
+// rs2_val == -2251799813685249,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x8000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xfff7ffffffffffff, 0x4, -0x8000000000001, x3, 712, x4)
+
+inst_120:
+// rs2_val == -4503599627370497,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:-0x10000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffefffffffffffff, 0x80000000000, -0x10000000000001, x3, 720, x4)
+
+inst_121:
+// rs2_val == -9007199254740993,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:-0x20000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffdfffffffffffff, 0x40000, -0x20000000000001, x3, 728, x4)
+
+inst_122:
+// rs2_val == -18014398509481985,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x40000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffbfffffffffffff, 0x4, -0x40000000000001, x3, 736, x4)
+
+inst_123:
+// rs2_val == -36028797018963969,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x80000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xff7fffffffffffff, 0x5, -0x80000000000001, x3, 744, x4)
+
+inst_124:
+// rs2_val == -72057594037927937, rs1_val == -2147483649
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:-0x100000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x80000001, -0x100000000000001, x3, 752, x4)
+
+inst_125:
+// rs2_val == -144115188075855873, rs1_val == 128
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:-0x200000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xfdffffffffffffff, 0x80, -0x200000000000001, x3, 760, x4)
+
+inst_126:
+// rs2_val == -288230376151711745,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x400000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0xb504f333, -0x400000000000001, x3, 768, x4)
+
+inst_127:
+// rs2_val == -576460752303423489,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:-0x800000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xf7ffffffffffffff, 0x100000000, -0x800000000000001, x3, 776, x4)
+
+inst_128:
+// rs2_val == -1152921504606846977, rs1_val == 32
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x1000000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xefffffffffffffff, 0x20, -0x1000000000000001, x3, 784, x4)
+
+inst_129:
+// rs2_val == -2305843009213693953,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:-0x2000000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x80000001, -0x2000000000000001, x3, 792, x4)
+
+inst_130:
+// rs2_val == -4611686018427387905, rs1_val == -513
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:-0x4000000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x201, -0x4000000000000001, x3, 800, x4)
+
+inst_131:
+// rs2_val == -6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaeaaaaaaaa, 0x400000000, -0x5555555555555556, x3, 808, x4)
+
+inst_132:
+// rs1_val == 8,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0x8000000
+TEST_RR_OP(or, x12, x10, x11, 0x8000008, 0x8, 0x8000000, x3, 816, x4)
+
+inst_133:
+// rs1_val == 16,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:-0x800000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xf7ffffffffffffff, 0x10, -0x800000000000001, x3, 824, x4)
+
+inst_134:
+// rs1_val == 256,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x103, 0x100, 0x3, x3, 832, x4)
+
+inst_135:
+// rs1_val == 512,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x205, 0x200, 0x5, x3, 840, x4)
+
+inst_136:
+// rs1_val == 2048,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:0x200000000
+TEST_RR_OP(or, x12, x10, x11, 0x200000800, 0x800, 0x200000000, x3, 848, x4)
+
+inst_137:
+// rs1_val == 4096,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x80000
+TEST_RR_OP(or, x12, x10, x11, 0x81000, 0x1000, 0x80000, x3, 856, x4)
+
+inst_138:
+// rs1_val == 16384,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:0x100000000000
+TEST_RR_OP(or, x12, x10, x11, 0x100000004000, 0x4000, 0x100000000000, x3, 864, x4)
+
+inst_139:
+// rs1_val == 65536,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x800000000000000
+TEST_RR_OP(or, x12, x10, x11, 0x800000000010000, 0x10000, 0x800000000000000, x3, 872, x4)
+
+inst_140:
+// rs1_val == 131072,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x8000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffff7fffffffff, 0x20000, -0x8000000001, x3, 880, x4)
+
+inst_141:
+// rs1_val == 2097152,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:-0x7
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffff9, 0x200000, -0x7, x3, 888, x4)
+
+inst_142:
+// rs1_val == 8388608,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:-0x3
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffd, 0x800000, -0x3, x3, 896, x4)
+
+inst_143:
+// rs1_val == 67108864,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:-0x401
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffbff, 0x4000000, -0x401, x3, 904, x4)
+
+inst_144:
+// rs1_val == 268435456,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x40000
+TEST_RR_OP(or, x12, x10, x11, 0x10040000, 0x10000000, 0x40000, x3, 912, x4)
+
+inst_145:
+// rs1_val == 536870912,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x2000000000000
+TEST_RR_OP(or, x12, x10, x11, 0x2000020000000, 0x20000000, 0x2000000000000, x3, 920, x4)
+
+inst_146:
+// rs1_val == 1073741824,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x800
+TEST_RR_OP(or, x12, x10, x11, 0x40000800, 0x40000000, 0x800, x3, 928, x4)
+
+inst_147:
+// rs1_val == 2147483648,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0x1000000
+TEST_RR_OP(or, x12, x10, x11, 0x81000000, 0x80000000, 0x1000000, x3, 936, x4)
+
+inst_148:
+// rs1_val == 8589934592,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:0x8000000000
+TEST_RR_OP(or, x12, x10, x11, 0x8200000000, 0x200000000, 0x8000000000, x3, 944, x4)
+
+inst_149:
+// rs1_val == 34359738368,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:-0x80000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7fffffff, 0x800000000, -0x80000001, x3, 952, x4)
+
+inst_150:
+// rs1_val == 68719476736,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x1000000003, 0x1000000000, 0x3, x3, 960, x4)
+
+inst_151:
+// rs1_val == 2199023255552,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:-0x40000000001
+TEST_RR_OP(or, x12, x10, x11, 0xfffffbffffffffff, 0x20000000000, -0x40000000001, x3, 968, x4)
+
+inst_152:
+// rs1_val == 4398046511104,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:-0x9
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffff7, 0x40000000000, -0x9, x3, 976, x4)
+
+inst_153:
+// rs1_val == 281474976710656,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0x40000000000000
+TEST_RR_OP(or, x12, x10, x11, 0x41000000000000, 0x1000000000000, 0x40000000000000, x3, 984, x4)
+
+inst_154:
+// rs1_val == 1125899906842624,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x4000000000004, 0x4000000000000, 0x4, x3, 992, x4)
+
+inst_155:
+// rs1_val == 2251799813685248,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:-0x40001
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffbffff, 0x8000000000000, -0x40001, x3, 1000, x4)
+
+inst_156:
+// rs1_val == 4503599627370496,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0x100000b504f334, 0x10000000000000, 0xb504f334, x3, 1008, x4)
+
+inst_157:
+// rs1_val == 9007199254740992,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x20000000000006, 0x20000000000000, 0x6, x3, 1016, x4)
+
+inst_158:
+// rs1_val == 36028797018963968,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:-0xa
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffff6, 0x80000000000000, -0xa, x3, 1024, x4)
+
+inst_159:
+// rs1_val == 288230376151711744,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:0x20000000000000
+TEST_RR_OP(or, x12, x10, x11, 0x420000000000000, 0x400000000000000, 0x20000000000000, x3, 1032, x4)
+
+inst_160:
+// rs1_val == 1152921504606846976,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:-0x8
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffff8, 0x1000000000000000, -0x8, x3, 1040, x4)
+
+inst_161:
+// rs1_val == 4611686018427387904,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:0x2000000000000
+TEST_RR_OP(or, x12, x10, x11, 0x4002000000000000, 0x4000000000000000, 0x2000000000000, x3, 1048, x4)
+
+inst_162:
+// rs1_val == -2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x400
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffe, -0x2, 0x400, x3, 1056, x4)
+
+inst_163:
+// rs1_val == -5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:-0x2001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x5, -0x2001, x3, 1064, x4)
+
+inst_164:
+// rs1_val == -33,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x40
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffdf, -0x21, 0x40, x3, 1072, x4)
+
+inst_165:
+// rs1_val == -257,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x1000000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffeff, -0x101, 0x1000000000, x3, 1080, x4)
+
+inst_166:
+// rs1_val == -1025,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x400000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffbff, -0x401, 0x400000000, x3, 1088, x4)
+
+inst_167:
+// rs1_val == -4097,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x1000000000
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffefff, -0x1001, 0x1000000000, x3, 1096, x4)
+
+inst_168:
+// rs1_val == -131073,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x200000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffdffff, -0x20001, 0x200000000, x3, 1104, x4)
+
+inst_169:
+// rs1_val == -1048577,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x100001, -0xb504f332, x3, 1112, x4)
+
+inst_170:
+// rs1_val == -2097153,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0x80000
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffdfffff, -0x200001, 0x80000, x3, 1120, x4)
+
+inst_171:
+// rs1_val == -16777217,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:-0x4000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x1000001, -0x4000000000001, x3, 1128, x4)
+
+inst_172:
+// rs1_val == -33554433,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x800
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffdffffff, -0x2000001, 0x800, x3, 1136, x4)
+
+inst_173:
+// rs1_val == -67108865,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x40000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffbffffff, -0x4000001, 0x40000, x3, 1144, x4)
+
+inst_174:
+// rs1_val == -134217729,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x80000000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffff7ffffff, -0x8000001, 0x80000000000, x3, 1152, x4)
+
+inst_175:
+// rs1_val == -536870913,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x80000000
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffdfffffff, -0x20000001, 0x80000000, x3, 1160, x4)
+
+inst_176:
+// rs1_val == -4294967297,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:-0x2000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x100000001, -0x2000000000001, x3, 1168, x4)
+
+inst_177:
+// rs1_val == -17179869185,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:0x1
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffbffffffff, -0x400000001, 0x1, x3, 1176, x4)
+
+inst_178:
+// rs1_val == -34359738369,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:0x2000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffff7ffffffff, -0x800000001, 0x2000000, x3, 1184, x4)
+
+inst_179:
+// rs1_val == -68719476737,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:0x2000
+TEST_RR_OP(or, x12, x10, x11, 0xffffffefffffffff, -0x1000000001, 0x2000, x3, 1192, x4)
+
+inst_180:
+// rs1_val == -274877906945,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0x200000
+TEST_RR_OP(or, x12, x10, x11, 0xffffffbfffffffff, -0x4000000001, 0x200000, x3, 1200, x4)
+
+inst_181:
+// rs1_val == -1099511627777,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:0x4000000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffffeffffffffff, -0x10000000001, 0x4000000000, x3, 1208, x4)
+
+inst_182:
+// rs1_val == -2199023255553,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:-0x800000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x20000000001, -0x800000000000001, x3, 1216, x4)
+
+inst_183:
+// rs1_val == -8796093022209,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:0x1000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffff7ffffffffff, -0x80000000001, 0x1000000, x3, 1224, x4)
+
+inst_184:
+// rs1_val == -17592186044417,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:-0xa
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x100000000001, -0xa, x3, 1232, x4)
+
+inst_185:
+// rs1_val == -35184372088833,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:-0x80000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x200000000001, -0x80000000001, x3, 1240, x4)
+
+inst_186:
+// rs1_val == -140737488355329,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:0x9
+TEST_RR_OP(or, x12, x10, x11, 0xffff7fffffffffff, -0x800000000001, 0x9, x3, 1248, x4)
+
+inst_187:
+// rs1_val == -281474976710657,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:0x1
+TEST_RR_OP(or, x12, x10, x11, 0xfffeffffffffffff, -0x1000000000001, 0x1, x3, 1256, x4)
+
+inst_188:
+// rs1_val == -562949953421313,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:0x10
+TEST_RR_OP(or, x12, x10, x11, 0xfffdffffffffffff, -0x2000000000001, 0x10, x3, 1264, x4)
+
+inst_189:
+// rs1_val == -1125899906842625,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:0x400000000000
+TEST_RR_OP(or, x12, x10, x11, 0xfffbffffffffffff, -0x4000000000001, 0x400000000000, x3, 1272, x4)
+
+inst_190:
+// rs1_val == -4503599627370497,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:-0x1000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x10000000000001, -0x1000000000001, x3, 1280, x4)
+
+inst_191:
+// rs1_val == -36028797018963969,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:-0x800000000000001
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x80000000000001, -0x800000000000001, x3, 1288, x4)
+
+inst_192:
+// rs1_val == -72057594037927937,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:0x800
+TEST_RR_OP(or, x12, x10, x11, 0xfeffffffffffffff, -0x100000000000001, 0x800, x3, 1296, x4)
+
+inst_193:
+// rs1_val == -576460752303423489,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0xf7ffffffffffffff, -0x800000000000001, 0x6666666666666665, x3, 1304, x4)
+
+inst_194:
+// rs1_val == -1152921504606846977,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x1000000000000001, -0xb504f332, x3, 1312, x4)
+
+inst_195:
+// rs1_val == -2305843009213693953,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:0x2000000000
+TEST_RR_OP(or, x12, x10, x11, 0xdfffffffffffffff, -0x2000000000000001, 0x2000000000, x3, 1320, x4)
+
+inst_196:
+// rs1_val == -6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xa
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffe, -0x5555555555555556, -0xa, x3, 1328, x4)
+
+inst_197:
+// rs1_val==3 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x3, 0x3, 0x3, x3, 1336, x4)
+
+inst_198:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x3, 0x5555555555555555, x3, 1344, x4)
+
+inst_199:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaab, 0x3, -0x5555555555555556, x3, 1352, x4)
+
+inst_200:
+// rs1_val==3 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x3, 0x5, x3, 1360, x4)
+
+inst_201:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333333, 0x3, 0x3333333333333333, x3, 1368, x4)
+
+inst_202:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x3, 0x6666666666666666, x3, 1376, x4)
+
+inst_203:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccf, 0x3, -0xb504f333, x3, 1384, x4)
+
+inst_204:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xb504f333, 0x3, 0xb504f333, x3, 1392, x4)
+
+inst_205:
+// rs1_val==3 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x3, 0x3, 0x2, x3, 1400, x4)
+
+inst_206:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x3, 0x5555555555555554, x3, 1408, x4)
+
+inst_207:
+// rs1_val==3 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x3, 0x3, 0x0, x3, 1416, x4)
+
+inst_208:
+// rs1_val==3 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x3, 0x4, x3, 1424, x4)
+
+inst_209:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333333, 0x3, 0x3333333333333332, x3, 1432, x4)
+
+inst_210:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x3, 0x6666666666666665, x3, 1440, x4)
+
+inst_211:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xb504f333, 0x3, 0xb504f332, x3, 1448, x4)
+
+inst_212:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x3, 0x5555555555555556, x3, 1456, x4)
+
+inst_213:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaab, 0x3, -0x5555555555555555, x3, 1464, x4)
+
+inst_214:
+// rs1_val==3 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x3, 0x6, x3, 1472, x4)
+
+inst_215:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333337, 0x3, 0x3333333333333334, x3, 1480, x4)
+
+inst_216:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x3, 0x6666666666666667, x3, 1488, x4)
+
+inst_217:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccf, 0x3, -0xb504f332, x3, 1496, x4)
+
+inst_218:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0xb504f337, 0x3, 0xb504f334, x3, 1504, x4)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x5555555555555555, 0x3, x3, 1512, x4)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x5555555555555555, x3, 1520, x4)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, 0x5555555555555555, -0x5555555555555556, x3, 1528, x4)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x5, x3, 1536, x4)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x5555555555555555, 0x3333333333333333, x3, 1544, x4)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x5555555555555555, 0x6666666666666666, x3, 1552, x4)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff5fff5ddd, 0x5555555555555555, -0xb504f333, x3, 1560, x4)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f777, 0x5555555555555555, 0xb504f333, x3, 1568, x4)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x5555555555555555, 0x2, x3, 1576, x4)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x5555555555555554, x3, 1584, x4)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x0, x3, 1592, x4)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x4, x3, 1600, x4)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x5555555555555555, 0x3333333333333332, x3, 1608, x4)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777775, 0x5555555555555555, 0x6666666666666665, x3, 1616, x4)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f777, 0x5555555555555555, 0xb504f332, x3, 1624, x4)
+
+inst_234:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x5555555555555555, 0x5555555555555556, x3, 1632, x4)
+
+inst_235:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, 0x5555555555555555, -0x5555555555555555, x3, 1640, x4)
+
+inst_236:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x5555555555555555, 0x6, x3, 1648, x4)
+
+inst_237:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777775, 0x5555555555555555, 0x3333333333333334, x3, 1656, x4)
+
+inst_238:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x5555555555555555, 0x6666666666666667, x3, 1664, x4)
+
+inst_239:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff5fff5ddf, 0x5555555555555555, -0xb504f332, x3, 1672, x4)
+
+inst_240:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f775, 0x5555555555555555, 0xb504f334, x3, 1680, x4)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555556, 0x3, x3, 1688, x4)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x5555555555555556, 0x5555555555555555, x3, 1696, x4)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, -0x5555555555555556, x3, 1704, x4)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555556, 0x5, x3, 1712, x4)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, -0x5555555555555556, 0x3333333333333333, x3, 1720, x4)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeeeeeeeeeee, -0x5555555555555556, 0x6666666666666666, x3, 1728, x4)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffeafbaeef, -0x5555555555555556, -0xb504f333, x3, 1736, x4)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaabfaefbbb, -0x5555555555555556, 0xb504f333, x3, 1744, x4)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x2, x3, 1752, x4)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffe, -0x5555555555555556, 0x5555555555555554, x3, 1760, x4)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x0, x3, 1768, x4)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x4, x3, 1776, x4)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbbbbbbbbba, -0x5555555555555556, 0x3333333333333332, x3, 1784, x4)
+
+inst_254:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeeeeeeeeeef, -0x5555555555555556, 0x6666666666666665, x3, 1792, x4)
+
+inst_255:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaabfaefbba, -0x5555555555555556, 0xb504f332, x3, 1800, x4)
+
+inst_256:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffe, -0x5555555555555556, 0x5555555555555556, x3, 1808, x4)
+
+inst_257:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555556, -0x5555555555555555, x3, 1816, x4)
+
+inst_258:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x6, x3, 1824, x4)
+
+inst_259:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbbbbbbbbbe, -0x5555555555555556, 0x3333333333333334, x3, 1832, x4)
+
+inst_260:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeeeeeeeeeef, -0x5555555555555556, 0x6666666666666667, x3, 1840, x4)
+
+inst_261:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffeafbaeee, -0x5555555555555556, -0xb504f332, x3, 1848, x4)
+
+inst_262:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaabfaefbbe, -0x5555555555555556, 0xb504f334, x3, 1856, x4)
+
+inst_263:
+// rs1_val==5 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x5, 0x3, x3, 1864, x4)
+
+inst_264:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555555, 0x5, 0x5555555555555555, x3, 1872, x4)
+
+inst_265:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x5, -0x5555555555555556, x3, 1880, x4)
+
+inst_266:
+// rs1_val==5 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x5, 0x5, 0x5, x3, 1888, x4)
+
+inst_267:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333337, 0x5, 0x3333333333333333, x3, 1896, x4)
+
+inst_268:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x5, 0x6666666666666666, x3, 1904, x4)
+
+inst_269:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccd, 0x5, -0xb504f333, x3, 1912, x4)
+
+inst_270:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xb504f337, 0x5, 0xb504f333, x3, 1920, x4)
+
+inst_271:
+// rs1_val==5 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x5, 0x2, x3, 1928, x4)
+
+inst_272:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555555, 0x5, 0x5555555555555554, x3, 1936, x4)
+
+inst_273:
+// rs1_val==5 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x5, 0x5, 0x0, x3, 1944, x4)
+
+inst_274:
+// rs1_val==5 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x5, 0x5, 0x4, x3, 1952, x4)
+
+inst_275:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333337, 0x5, 0x3333333333333332, x3, 1960, x4)
+
+inst_276:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666665, 0x5, 0x6666666666666665, x3, 1968, x4)
+
+inst_277:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xb504f337, 0x5, 0xb504f332, x3, 1976, x4)
+
+inst_278:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x5, 0x5555555555555556, x3, 1984, x4)
+
+inst_279:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x5, -0x5555555555555555, x3, 1992, x4)
+
+inst_280:
+// rs1_val==5 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x5, 0x6, x3, 2000, x4)
+
+inst_281:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333335, 0x5, 0x3333333333333334, x3, 2008, x4)
+
+inst_282:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x5, 0x6666666666666667, x3, 2016, x4)
+
+inst_283:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccf, 0x5, -0xb504f332, x3, 2024, x4)
+
+inst_284:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0xb504f335, 0x5, 0xb504f334, x3, 2032, x4)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x3, x3, 2040, x4)
+RVTEST_SIGBASE( x3,signature_x3_1)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x3333333333333333, 0x5555555555555555, x3, 0, x4)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x3333333333333333, -0x5555555555555556, x3, 8, x4)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333337, 0x3333333333333333, 0x5, x3, 16, x4)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x3333333333333333, 0x6666666666666666, x3, 24, x4)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7bfb3fff, 0x3333333333333333, -0xb504f333, x3, 32, x4)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f333, 0x3333333333333333, 0xb504f333, x3, 40, x4)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x2, x3, 48, x4)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x3333333333333333, 0x5555555555555554, x3, 56, x4)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x0, x3, 64, x4)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333337, 0x3333333333333333, 0x4, x3, 72, x4)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x3333333333333332, x3, 80, x4)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x3333333333333333, 0x6666666666666665, x3, 88, x4)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f333, 0x3333333333333333, 0xb504f332, x3, 96, x4)
+
+inst_299:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x3333333333333333, 0x5555555555555556, x3, 104, x4)
+
+inst_300:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x3333333333333333, -0x5555555555555555, x3, 112, x4)
+
+inst_301:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333337, 0x3333333333333333, 0x6, x3, 120, x4)
+
+inst_302:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333337, 0x3333333333333333, 0x3333333333333334, x3, 128, x4)
+
+inst_303:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x3333333333333333, 0x6666666666666667, x3, 136, x4)
+
+inst_304:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7bfb3fff, 0x3333333333333333, -0xb504f332, x3, 144, x4)
+
+inst_305:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f337, 0x3333333333333333, 0xb504f334, x3, 152, x4)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x3, x3, 160, x4)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x6666666666666666, 0x5555555555555555, x3, 168, x4)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeeeeeeeeeee, 0x6666666666666666, -0x5555555555555556, x3, 176, x4)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x5, x3, 184, x4)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x6666666666666666, 0x3333333333333333, x3, 192, x4)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x6666666666666666, x3, 200, x4)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff6eff6eef, 0x6666666666666666, -0xb504f333, x3, 208, x4)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f777, 0x6666666666666666, 0xb504f333, x3, 216, x4)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x2, x3, 224, x4)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x6666666666666666, 0x5555555555555554, x3, 232, x4)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x0, x3, 240, x4)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x4, x3, 248, x4)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x6666666666666666, 0x3333333333333332, x3, 256, x4)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x6666666666666665, x3, 264, x4)
+
+inst_320:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f776, 0x6666666666666666, 0xb504f332, x3, 272, x4)
+
+inst_321:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x6666666666666666, 0x5555555555555556, x3, 280, x4)
+
+inst_322:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeeeeeeeeeef, 0x6666666666666666, -0x5555555555555555, x3, 288, x4)
+
+inst_323:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x6, x3, 296, x4)
+
+inst_324:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x6666666666666666, 0x3333333333333334, x3, 304, x4)
+
+inst_325:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666666, 0x6666666666666667, x3, 312, x4)
+
+inst_326:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff6eff6eee, 0x6666666666666666, -0xb504f332, x3, 320, x4)
+
+inst_327:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f776, 0x6666666666666666, 0xb504f334, x3, 328, x4)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccf, -0xb504f333, 0x3, x3, 336, x4)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff5fff5ddd, -0xb504f333, 0x5555555555555555, x3, 344, x4)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffeafbaeef, -0xb504f333, -0x5555555555555556, x3, 352, x4)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x5, x3, 360, x4)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7bfb3fff, -0xb504f333, 0x3333333333333333, x3, 368, x4)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff6eff6eef, -0xb504f333, 0x6666666666666666, x3, 376, x4)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, -0xb504f333, x3, 384, x4)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0xb504f333, 0xb504f333, x3, 392, x4)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff5fff5ddd, -0xb504f333, 0x5555555555555554, x3, 400, x4)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x0, x3, 408, x4)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x4, x3, 416, x4)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7bfb3fff, -0xb504f333, 0x3333333333333332, x3, 424, x4)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff6eff6eed, -0xb504f333, 0x6666666666666665, x3, 432, x4)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0xb504f333, 0xb504f332, x3, 440, x4)
+
+inst_342:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff5fff5ddf, -0xb504f333, 0x5555555555555556, x3, 448, x4)
+
+inst_343:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffeafbaeef, -0xb504f333, -0x5555555555555555, x3, 456, x4)
+
+inst_344:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccf, -0xb504f333, 0x6, x3, 464, x4)
+
+inst_345:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7bfb3ffd, -0xb504f333, 0x3333333333333334, x3, 472, x4)
+
+inst_346:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff6eff6eef, -0xb504f333, 0x6666666666666667, x3, 480, x4)
+
+inst_347:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccf, -0xb504f333, -0xb504f332, x3, 488, x4)
+
+inst_348:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffd, -0xb504f333, 0xb504f334, x3, 496, x4)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xb504f333, 0xb504f333, 0x3, x3, 504, x4)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f777, 0xb504f333, 0x5555555555555555, x3, 512, x4)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaabfaefbbb, 0xb504f333, -0x5555555555555556, x3, 520, x4)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xb504f337, 0xb504f333, 0x5, x3, 528, x4)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f333, 0xb504f333, 0x3333333333333333, x3, 536, x4)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f777, 0xb504f333, 0x6666666666666666, x3, 544, x4)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, 0xb504f333, -0xb504f333, x3, 552, x4)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xb504f333, 0xb504f333, 0xb504f333, x3, 560, x4)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0xb504f333, 0xb504f333, 0x2, x3, 568, x4)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f777, 0xb504f333, 0x5555555555555554, x3, 576, x4)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xb504f333, 0xb504f333, 0x0, x3, 584, x4)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xb504f337, 0xb504f333, 0x4, x3, 592, x4)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f333, 0xb504f333, 0x3333333333333332, x3, 600, x4)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f777, 0xb504f333, 0x6666666666666665, x3, 608, x4)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xb504f333, 0xb504f333, 0xb504f332, x3, 616, x4)
+
+inst_364:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f777, 0xb504f333, 0x5555555555555556, x3, 624, x4)
+
+inst_365:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaabfaefbbb, 0xb504f333, -0x5555555555555555, x3, 632, x4)
+
+inst_366:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xb504f337, 0xb504f333, 0x6, x3, 640, x4)
+
+inst_367:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f337, 0xb504f333, 0x3333333333333334, x3, 648, x4)
+
+inst_368:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f777, 0xb504f333, 0x6666666666666667, x3, 656, x4)
+
+inst_369:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, 0xb504f333, -0xb504f332, x3, 664, x4)
+
+inst_370:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0xb504f337, 0xb504f333, 0xb504f334, x3, 672, x4)
+
+inst_371:
+// rs1_val==2 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x3, 0x2, 0x3, x3, 680, x4)
+
+inst_372:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x2, 0x5555555555555555, x3, 688, x4)
+
+inst_373:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x2, -0x5555555555555556, x3, 696, x4)
+
+inst_374:
+// rs1_val==2 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x2, 0x5, x3, 704, x4)
+
+inst_375:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333333, 0x2, 0x3333333333333333, x3, 712, x4)
+
+inst_376:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666666, 0x2, 0x6666666666666666, x3, 720, x4)
+
+inst_377:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccf, 0x2, -0xb504f333, x3, 728, x4)
+
+inst_378:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xb504f333, 0x2, 0xb504f333, x3, 736, x4)
+
+inst_379:
+// rs1_val==2 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x2, 0x2, 0x2, x3, 744, x4)
+
+inst_380:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x2, 0x5555555555555554, x3, 752, x4)
+
+inst_381:
+// rs1_val==2 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x2, 0x2, 0x0, x3, 760, x4)
+
+inst_382:
+// rs1_val==2 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x2, 0x4, x3, 768, x4)
+
+inst_383:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333332, 0x2, 0x3333333333333332, x3, 776, x4)
+
+inst_384:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x2, 0x6666666666666665, x3, 784, x4)
+
+inst_385:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xb504f332, 0x2, 0xb504f332, x3, 792, x4)
+
+inst_386:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x2, 0x5555555555555556, x3, 800, x4)
+
+inst_387:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaab, 0x2, -0x5555555555555555, x3, 808, x4)
+
+inst_388:
+// rs1_val==2 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x2, 0x6, x3, 816, x4)
+
+inst_389:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333336, 0x2, 0x3333333333333334, x3, 824, x4)
+
+inst_390:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x2, 0x6666666666666667, x3, 832, x4)
+
+inst_391:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0cce, 0x2, -0xb504f332, x3, 840, x4)
+
+inst_392:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0xb504f336, 0x2, 0xb504f334, x3, 848, x4)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x5555555555555554, 0x3, x3, 856, x4)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555555, 0x5555555555555554, 0x5555555555555555, x3, 864, x4)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffe, 0x5555555555555554, -0x5555555555555556, x3, 872, x4)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555555, 0x5555555555555554, 0x5, x3, 880, x4)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x5555555555555554, 0x3333333333333333, x3, 888, x4)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x5555555555555554, 0x6666666666666666, x3, 896, x4)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff5fff5ddd, 0x5555555555555554, -0xb504f333, x3, 904, x4)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f777, 0x5555555555555554, 0xb504f333, x3, 912, x4)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x2, x3, 920, x4)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x5555555555555554, x3, 928, x4)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x0, x3, 936, x4)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x4, x3, 944, x4)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x5555555555555554, 0x3333333333333332, x3, 952, x4)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777775, 0x5555555555555554, 0x6666666666666665, x3, 960, x4)
+
+inst_407:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f776, 0x5555555555555554, 0xb504f332, x3, 968, x4)
+
+inst_408:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x5555555555555556, x3, 976, x4)
+
+inst_409:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, 0x5555555555555554, -0x5555555555555555, x3, 984, x4)
+
+inst_410:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x6, x3, 992, x4)
+
+inst_411:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777774, 0x5555555555555554, 0x3333333333333334, x3, 1000, x4)
+
+inst_412:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x5555555555555554, 0x6666666666666667, x3, 1008, x4)
+
+inst_413:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff5fff5dde, 0x5555555555555554, -0xb504f332, x3, 1016, x4)
+
+inst_414:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f774, 0x5555555555555554, 0xb504f334, x3, 1024, x4)
+
+inst_415:
+// rs1_val==0 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x3, 0x0, 0x3, x3, 1032, x4)
+
+inst_416:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555555, 0x0, 0x5555555555555555, x3, 1040, x4)
+
+inst_417:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x0, -0x5555555555555556, x3, 1048, x4)
+
+inst_418:
+// rs1_val==0 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x5, 0x0, 0x5, x3, 1056, x4)
+
+inst_419:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333333, 0x0, 0x3333333333333333, x3, 1064, x4)
+
+inst_420:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666666, 0x0, 0x6666666666666666, x3, 1072, x4)
+
+inst_421:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccd, 0x0, -0xb504f333, x3, 1080, x4)
+
+inst_422:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xb504f333, 0x0, 0xb504f333, x3, 1088, x4)
+
+inst_423:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0cce, 0x0, -0xb504f332, x3, 1096, x4)
+
+inst_424:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0xb504f334, 0x0, 0xb504f334, x3, 1104, x4)
+
+inst_425:
+// rs1_val==4 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x4, 0x3, x3, 1112, x4)
+
+inst_426:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555555, 0x4, 0x5555555555555555, x3, 1120, x4)
+
+inst_427:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaae, 0x4, -0x5555555555555556, x3, 1128, x4)
+
+inst_428:
+// rs1_val==4 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x5, 0x4, 0x5, x3, 1136, x4)
+
+inst_429:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333337, 0x4, 0x3333333333333333, x3, 1144, x4)
+
+inst_430:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666666, 0x4, 0x6666666666666666, x3, 1152, x4)
+
+inst_431:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccd, 0x4, -0xb504f333, x3, 1160, x4)
+
+inst_432:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xb504f337, 0x4, 0xb504f333, x3, 1168, x4)
+
+inst_433:
+// rs1_val==4 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x4, 0x2, x3, 1176, x4)
+
+inst_434:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555554, 0x4, 0x5555555555555554, x3, 1184, x4)
+
+inst_435:
+// rs1_val==4 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x4, 0x4, 0x4, x3, 1192, x4)
+
+inst_436:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333336, 0x4, 0x3333333333333332, x3, 1200, x4)
+
+inst_437:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666665, 0x4, 0x6666666666666665, x3, 1208, x4)
+
+inst_438:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xb504f336, 0x4, 0xb504f332, x3, 1216, x4)
+
+inst_439:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x4, 0x5555555555555556, x3, 1224, x4)
+
+inst_440:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x4, -0x5555555555555555, x3, 1232, x4)
+
+inst_441:
+// rs1_val==4 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x4, 0x6, x3, 1240, x4)
+
+inst_442:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333334, 0x4, 0x3333333333333334, x3, 1248, x4)
+
+inst_443:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x4, 0x6666666666666667, x3, 1256, x4)
+
+inst_444:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0cce, 0x4, -0xb504f332, x3, 1264, x4)
+
+inst_445:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0xb504f334, 0x4, 0xb504f334, x3, 1272, x4)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333333, 0x3333333333333332, 0x3, x3, 1280, x4)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x3333333333333332, 0x5555555555555555, x3, 1288, x4)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbbbbbbbbba, 0x3333333333333332, -0x5555555555555556, x3, 1296, x4)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333337, 0x3333333333333332, 0x5, x3, 1304, x4)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333333, 0x3333333333333332, 0x3333333333333333, x3, 1312, x4)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x3333333333333332, 0x6666666666666666, x3, 1320, x4)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7bfb3fff, 0x3333333333333332, -0xb504f333, x3, 1328, x4)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f333, 0x3333333333333332, 0xb504f333, x3, 1336, x4)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x2, x3, 1344, x4)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x3333333333333332, 0x5555555555555554, x3, 1352, x4)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x0, x3, 1360, x4)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333336, 0x3333333333333332, 0x4, x3, 1368, x4)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x3333333333333332, x3, 1376, x4)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x3333333333333332, 0x6666666666666665, x3, 1384, x4)
+
+inst_460:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f332, 0x3333333333333332, 0xb504f332, x3, 1392, x4)
+
+inst_461:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x3333333333333332, 0x5555555555555556, x3, 1400, x4)
+
+inst_462:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x3333333333333332, -0x5555555555555555, x3, 1408, x4)
+
+inst_463:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333336, 0x3333333333333332, 0x6, x3, 1416, x4)
+
+inst_464:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333336, 0x3333333333333332, 0x3333333333333334, x3, 1424, x4)
+
+inst_465:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x3333333333333332, 0x6666666666666667, x3, 1432, x4)
+
+inst_466:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7bfb3ffe, 0x3333333333333332, -0xb504f332, x3, 1440, x4)
+
+inst_467:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f336, 0x3333333333333332, 0xb504f334, x3, 1448, x4)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x3, x3, 1456, x4)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777775, 0x6666666666666665, 0x5555555555555555, x3, 1464, x4)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeeeeeeeeeef, 0x6666666666666665, -0x5555555555555556, x3, 1472, x4)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x5, x3, 1480, x4)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x6666666666666665, 0x3333333333333333, x3, 1488, x4)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x6666666666666666, x3, 1496, x4)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff6eff6eed, 0x6666666666666665, -0xb504f333, x3, 1504, x4)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f777, 0x6666666666666665, 0xb504f333, x3, 1512, x4)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x2, x3, 1520, x4)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777775, 0x6666666666666665, 0x5555555555555554, x3, 1528, x4)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x0, x3, 1536, x4)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x4, x3, 1544, x4)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x6666666666666665, 0x3333333333333332, x3, 1552, x4)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x6666666666666665, x3, 1560, x4)
+
+inst_482:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f777, 0x6666666666666665, 0xb504f332, x3, 1568, x4)
+
+inst_483:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x6666666666666665, 0x5555555555555556, x3, 1576, x4)
+
+inst_484:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeeeeeeeeeef, 0x6666666666666665, -0x5555555555555555, x3, 1584, x4)
+
+inst_485:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x6, x3, 1592, x4)
+
+inst_486:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777775, 0x6666666666666665, 0x3333333333333334, x3, 1600, x4)
+
+inst_487:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x6666666666666667, x3, 1608, x4)
+
+inst_488:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff6eff6eef, 0x6666666666666665, -0xb504f332, x3, 1616, x4)
+
+inst_489:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f775, 0x6666666666666665, 0xb504f334, x3, 1624, x4)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xb504f333, 0xb504f332, 0x3, x3, 1632, x4)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f777, 0xb504f332, 0x5555555555555555, x3, 1640, x4)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaabfaefbba, 0xb504f332, -0x5555555555555556, x3, 1648, x4)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xb504f337, 0xb504f332, 0x5, x3, 1656, x4)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f333, 0xb504f332, 0x3333333333333333, x3, 1664, x4)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f776, 0xb504f332, 0x6666666666666666, x3, 1672, x4)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, 0xb504f332, -0xb504f333, x3, 1680, x4)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xb504f333, 0xb504f332, 0xb504f333, x3, 1688, x4)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0xb504f332, 0xb504f332, 0x2, x3, 1696, x4)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f776, 0xb504f332, 0x5555555555555554, x3, 1704, x4)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xb504f332, 0xb504f332, 0x0, x3, 1712, x4)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xb504f336, 0xb504f332, 0x4, x3, 1720, x4)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f332, 0xb504f332, 0x3333333333333332, x3, 1728, x4)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f777, 0xb504f332, 0x6666666666666665, x3, 1736, x4)
+
+inst_504:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xb504f332, 0xb504f332, 0xb504f332, x3, 1744, x4)
+
+inst_505:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f776, 0xb504f332, 0x5555555555555556, x3, 1752, x4)
+
+inst_506:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaabfaefbbb, 0xb504f332, -0x5555555555555555, x3, 1760, x4)
+
+inst_507:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xb504f336, 0xb504f332, 0x6, x3, 1768, x4)
+
+inst_508:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f336, 0xb504f332, 0x3333333333333334, x3, 1776, x4)
+
+inst_509:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f777, 0xb504f332, 0x6666666666666667, x3, 1784, x4)
+
+inst_510:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffe, 0xb504f332, -0xb504f332, x3, 1792, x4)
+
+inst_511:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0xb504f336, 0xb504f332, 0xb504f334, x3, 1800, x4)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x5555555555555556, 0x3, x3, 1808, x4)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x5555555555555556, 0x5555555555555555, x3, 1816, x4)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffe, 0x5555555555555556, -0x5555555555555556, x3, 1824, x4)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x5555555555555556, 0x5, x3, 1832, x4)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x5555555555555556, 0x3333333333333333, x3, 1840, x4)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x5555555555555556, 0x6666666666666666, x3, 1848, x4)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff5fff5ddf, 0x5555555555555556, -0xb504f333, x3, 1856, x4)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f777, 0x5555555555555556, 0xb504f333, x3, 1864, x4)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x2, x3, 1872, x4)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x5555555555555554, x3, 1880, x4)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x0, x3, 1888, x4)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x4, x3, 1896, x4)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x5555555555555556, 0x3333333333333332, x3, 1904, x4)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x5555555555555556, 0x6666666666666665, x3, 1912, x4)
+
+inst_526:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f776, 0x5555555555555556, 0xb504f332, x3, 1920, x4)
+
+inst_527:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x5555555555555556, x3, 1928, x4)
+
+inst_528:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, 0x5555555555555556, -0x5555555555555555, x3, 1936, x4)
+
+inst_529:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x6, x3, 1944, x4)
+
+inst_530:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x5555555555555556, 0x3333333333333334, x3, 1952, x4)
+
+inst_531:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x5555555555555556, 0x6666666666666667, x3, 1960, x4)
+
+inst_532:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff5fff5dde, 0x5555555555555556, -0xb504f332, x3, 1968, x4)
+
+inst_533:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f776, 0x5555555555555556, 0xb504f334, x3, 1976, x4)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x3, x3, 1984, x4)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x5555555555555555, 0x5555555555555555, x3, 1992, x4)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, -0x5555555555555556, x3, 2000, x4)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x5, x3, 2008, x4)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, -0x5555555555555555, 0x3333333333333333, x3, 2016, x4)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeeeeeeeeeef, -0x5555555555555555, 0x6666666666666666, x3, 2024, x4)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffeafbaeef, -0x5555555555555555, -0xb504f333, x3, 2032, x4)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaabfaefbbb, -0x5555555555555555, 0xb504f333, x3, 2040, x4)
+RVTEST_SIGBASE( x3,signature_x3_2)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x2, x3, 0, x4)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x5555555555555555, 0x5555555555555554, x3, 8, x4)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x0, x3, 16, x4)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x4, x3, 24, x4)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, -0x5555555555555555, 0x3333333333333332, x3, 32, x4)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeeeeeeeeeef, -0x5555555555555555, 0x6666666666666665, x3, 40, x4)
+
+inst_548:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaabfaefbbb, -0x5555555555555555, 0xb504f332, x3, 48, x4)
+
+inst_549:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0x5555555555555555, 0x5555555555555556, x3, 56, x4)
+
+inst_550:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, -0x5555555555555555, x3, 64, x4)
+
+inst_551:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x6, x3, 72, x4)
+
+inst_552:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbbbbbbbbbf, -0x5555555555555555, 0x3333333333333334, x3, 80, x4)
+
+inst_553:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeeeeeeeeeef, -0x5555555555555555, 0x6666666666666667, x3, 88, x4)
+
+inst_554:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffeafbaeef, -0x5555555555555555, -0xb504f332, x3, 96, x4)
+
+inst_555:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaabfaefbbf, -0x5555555555555555, 0xb504f334, x3, 104, x4)
+
+inst_556:
+// rs1_val==6 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x6, 0x3, x3, 112, x4)
+
+inst_557:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555557, 0x6, 0x5555555555555555, x3, 120, x4)
+
+inst_558:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaae, 0x6, -0x5555555555555556, x3, 128, x4)
+
+inst_559:
+// rs1_val==6 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x7, 0x6, 0x5, x3, 136, x4)
+
+inst_560:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333337, 0x6, 0x3333333333333333, x3, 144, x4)
+
+inst_561:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666666, 0x6, 0x6666666666666666, x3, 152, x4)
+
+inst_562:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccf, 0x6, -0xb504f333, x3, 160, x4)
+
+inst_563:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xb504f337, 0x6, 0xb504f333, x3, 168, x4)
+
+inst_564:
+// rs1_val==6 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x6, 0x2, x3, 176, x4)
+
+inst_565:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x6, 0x5555555555555554, x3, 184, x4)
+
+inst_566:
+// rs1_val==6 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x6, 0x0, x3, 192, x4)
+
+inst_567:
+// rs1_val==6 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x6, 0x4, x3, 200, x4)
+
+inst_568:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333336, 0x6, 0x3333333333333332, x3, 208, x4)
+
+inst_569:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6, 0x6666666666666665, x3, 216, x4)
+
+inst_570:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xb504f336, 0x6, 0xb504f332, x3, 224, x4)
+
+inst_571:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x6, 0x5555555555555556, x3, 232, x4)
+
+inst_572:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x6, -0x5555555555555555, x3, 240, x4)
+
+inst_573:
+// rs1_val==6 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x6, 0x6, x3, 248, x4)
+
+inst_574:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333336, 0x6, 0x3333333333333334, x3, 256, x4)
+
+inst_575:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6, 0x6666666666666667, x3, 264, x4)
+
+inst_576:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0cce, 0x6, -0xb504f332, x3, 272, x4)
+
+inst_577:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0xb504f336, 0x6, 0xb504f334, x3, 280, x4)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333337, 0x3333333333333334, 0x3, x3, 288, x4)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777775, 0x3333333333333334, 0x5555555555555555, x3, 296, x4)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbbbbbbbbbe, 0x3333333333333334, -0x5555555555555556, x3, 304, x4)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333335, 0x3333333333333334, 0x5, x3, 312, x4)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333337, 0x3333333333333334, 0x3333333333333333, x3, 320, x4)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x3333333333333334, 0x6666666666666666, x3, 328, x4)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7bfb3ffd, 0x3333333333333334, -0xb504f333, x3, 336, x4)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f337, 0x3333333333333334, 0xb504f333, x3, 344, x4)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333336, 0x3333333333333334, 0x2, x3, 352, x4)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777774, 0x3333333333333334, 0x5555555555555554, x3, 360, x4)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x0, x3, 368, x4)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x4, x3, 376, x4)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333336, 0x3333333333333334, 0x3333333333333332, x3, 384, x4)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777775, 0x3333333333333334, 0x6666666666666665, x3, 392, x4)
+
+inst_592:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f336, 0x3333333333333334, 0xb504f332, x3, 400, x4)
+
+inst_593:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777776, 0x3333333333333334, 0x5555555555555556, x3, 408, x4)
+
+inst_594:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xbbbbbbbbbbbbbbbf, 0x3333333333333334, -0x5555555555555555, x3, 416, x4)
+
+inst_595:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333336, 0x3333333333333334, 0x6, x3, 424, x4)
+
+inst_596:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x3333333333333334, x3, 432, x4)
+
+inst_597:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x3333333333333334, 0x6666666666666667, x3, 440, x4)
+
+inst_598:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7bfb3ffe, 0x3333333333333334, -0xb504f332, x3, 448, x4)
+
+inst_599:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f334, 0x3333333333333334, 0xb504f334, x3, 456, x4)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x3, x3, 464, x4)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x6666666666666667, 0x5555555555555555, x3, 472, x4)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeeeeeeeeeef, 0x6666666666666667, -0x5555555555555556, x3, 480, x4)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x5, x3, 488, x4)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x6666666666666667, 0x3333333333333333, x3, 496, x4)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x6666666666666666, x3, 504, x4)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff6eff6eef, 0x6666666666666667, -0xb504f333, x3, 512, x4)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f777, 0x6666666666666667, 0xb504f333, x3, 520, x4)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x2, x3, 528, x4)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x6666666666666667, 0x5555555555555554, x3, 536, x4)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x0, x3, 544, x4)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x4, x3, 552, x4)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x6666666666666667, 0x3333333333333332, x3, 560, x4)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x6666666666666665, x3, 568, x4)
+
+inst_614:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f777, 0x6666666666666667, 0xb504f332, x3, 576, x4)
+
+inst_615:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x6666666666666667, 0x5555555555555556, x3, 584, x4)
+
+inst_616:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xeeeeeeeeeeeeeeef, 0x6666666666666667, -0x5555555555555555, x3, 592, x4)
+
+inst_617:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x6, x3, 600, x4)
+
+inst_618:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x7777777777777777, 0x6666666666666667, 0x3333333333333334, x3, 608, x4)
+
+inst_619:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x6666666666666667, x3, 616, x4)
+
+inst_620:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff6eff6eef, 0x6666666666666667, -0xb504f332, x3, 624, x4)
+
+inst_621:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f777, 0x6666666666666667, 0xb504f334, x3, 632, x4)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccf, -0xb504f332, 0x3, x3, 640, x4)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff5fff5ddf, -0xb504f332, 0x5555555555555555, x3, 648, x4)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffeafbaeee, -0xb504f332, -0x5555555555555556, x3, 656, x4)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccf, -0xb504f332, 0x5, x3, 664, x4)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7bfb3fff, -0xb504f332, 0x3333333333333333, x3, 672, x4)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff6eff6eee, -0xb504f332, 0x6666666666666666, x3, 680, x4)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0ccf, -0xb504f332, -0xb504f333, x3, 688, x4)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffffffffff, -0xb504f332, 0xb504f333, x3, 696, x4)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x2, x3, 704, x4)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff5fff5dde, -0xb504f332, 0x5555555555555554, x3, 712, x4)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x0, x3, 720, x4)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x4, x3, 728, x4)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7bfb3ffe, -0xb504f332, 0x3333333333333332, x3, 736, x4)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff6eff6eef, -0xb504f332, 0x6666666666666665, x3, 744, x4)
+
+inst_636:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffe, -0xb504f332, 0xb504f332, x3, 752, x4)
+
+inst_637:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff5fff5dde, -0xb504f332, 0x5555555555555556, x3, 760, x4)
+
+inst_638:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xffffffffeafbaeef, -0xb504f332, -0x5555555555555555, x3, 768, x4)
+
+inst_639:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x6, x3, 776, x4)
+
+inst_640:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff7bfb3ffe, -0xb504f332, 0x3333333333333334, x3, 784, x4)
+
+inst_641:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff6eff6eef, -0xb504f332, 0x6666666666666667, x3, 792, x4)
+
+inst_642:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xffffffff4afb0cce, -0xb504f332, -0xb504f332, x3, 800, x4)
+
+inst_643:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffe, -0xb504f332, 0xb504f334, x3, 808, x4)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3
+TEST_RR_OP(or, x12, x10, x11, 0xb504f337, 0xb504f334, 0x3, x3, 816, x4)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f775, 0xb504f334, 0x5555555555555555, x3, 824, x4)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaabfaefbbe, 0xb504f334, -0x5555555555555556, x3, 832, x4)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5
+TEST_RR_OP(or, x12, x10, x11, 0xb504f335, 0xb504f334, 0x5, x3, 840, x4)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f337, 0xb504f334, 0x3333333333333333, x3, 848, x4)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f776, 0xb504f334, 0x6666666666666666, x3, 856, x4)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffd, 0xb504f334, -0xb504f333, x3, 864, x4)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f333
+TEST_RR_OP(or, x12, x10, x11, 0xb504f337, 0xb504f334, 0xb504f333, x3, 872, x4)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0xb504f336, 0xb504f334, 0x2, x3, 880, x4)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f774, 0xb504f334, 0x5555555555555554, x3, 888, x4)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0xb504f334, 0xb504f334, 0x0, x3, 896, x4)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0xb504f334, 0xb504f334, 0x4, x3, 904, x4)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f336, 0xb504f334, 0x3333333333333332, x3, 912, x4)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f775, 0xb504f334, 0x6666666666666665, x3, 920, x4)
+
+inst_658:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xb504f336, 0xb504f334, 0xb504f332, x3, 928, x4)
+
+inst_659:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x55555555f555f776, 0xb504f334, 0x5555555555555556, x3, 936, x4)
+
+inst_660:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaabfaefbbf, 0xb504f334, -0x5555555555555555, x3, 944, x4)
+
+inst_661:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0xb504f336, 0xb504f334, 0x6, x3, 952, x4)
+
+inst_662:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x33333333b737f334, 0xb504f334, 0x3333333333333334, x3, 960, x4)
+
+inst_663:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x66666666f766f777, 0xb504f334, 0x6666666666666667, x3, 968, x4)
+
+inst_664:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xfffffffffffffffe, 0xb504f334, -0xb504f332, x3, 976, x4)
+
+inst_665:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f334
+TEST_RR_OP(or, x12, x10, x11, 0xb504f334, 0xb504f334, 0xb504f334, x3, 984, x4)
+
+inst_666:
+// rs1_val==0 and rs2_val==2,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(or, x12, x10, x11, 0x2, 0x0, 0x2, x3, 992, x4)
+
+inst_667:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555554
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555554, 0x0, 0x5555555555555554, x3, 1000, x4)
+
+inst_668:
+// rs1_val==0 and rs2_val==0,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(or, x12, x10, x11, 0x0, 0x0, 0x0, x3, 1008, x4)
+
+inst_669:
+// rs1_val==0 and rs2_val==4,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(or, x12, x10, x11, 0x4, 0x0, 0x4, x3, 1016, x4)
+
+inst_670:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333332
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333332, 0x0, 0x3333333333333332, x3, 1024, x4)
+
+inst_671:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666665
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666665, 0x0, 0x6666666666666665, x3, 1032, x4)
+
+inst_672:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f332
+TEST_RR_OP(or, x12, x10, x11, 0xb504f332, 0x0, 0xb504f332, x3, 1040, x4)
+
+inst_673:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555556
+TEST_RR_OP(or, x12, x10, x11, 0x5555555555555556, 0x0, 0x5555555555555556, x3, 1048, x4)
+
+inst_674:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555555
+TEST_RR_OP(or, x12, x10, x11, 0xaaaaaaaaaaaaaaab, 0x0, -0x5555555555555555, x3, 1056, x4)
+
+inst_675:
+// rs1_val==0 and rs2_val==6,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(or, x12, x10, x11, 0x6, 0x0, 0x6, x3, 1064, x4)
+
+inst_676:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333334
+TEST_RR_OP(or, x12, x10, x11, 0x3333333333333334, 0x0, 0x3333333333333334, x3, 1072, x4)
+
+inst_677:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: or ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666667
+TEST_RR_OP(or, x12, x10, x11, 0x6666666666666667, 0x0, 0x6666666666666667, x3, 1080, x4)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 15*(XLEN/32),4,0xdeadbeef
+
+
+signature_x11_0:
+ .fill 15*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_2:
+ .fill 136*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/ori-01.S b/riscof/suite/rv64i_m/I/ori-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..b722462669d1c33eee46113792151ccba4b292ad
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/ori-01.S
@@ -0,0 +1,3194 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the ori instruction of the RISC-V I extension for the ori covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",ori)
+
+RVTEST_SIGBASE( x11,signature_x11_1)
+
+inst_0:
+// rs1 == rd, rs1==x6, rd==x6, imm_val == (-2**(12-1)), imm_val == -2048, rs1_val != imm_val, rs1_val > 0 and imm_val < 0, rs1_val == 8192
+// opcode: ori ; op1:x6; dest:x6; op1val:0x2000; immval:-0x800
+TEST_IMM_OP( ori, x6, x6, 0xfffffffffffff800, 0x2000, -0x800, x11, 0, x9)
+
+inst_1:
+// rs1 != rd, rs1==x28, rd==x2, imm_val == 0, rs1_val == 4, rs1_val==4 and imm_val==0
+// opcode: ori ; op1:x28; dest:x2; op1val:0x4; immval:0x0
+TEST_IMM_OP( ori, x2, x28, 0x4, 0x4, 0x0, x11, 8, x9)
+
+inst_2:
+// rs1==x25, rd==x19, imm_val == (2**(12-1)-1), rs1_val == -2, rs1_val < 0 and imm_val > 0, imm_val == 2047
+// opcode: ori ; op1:x25; dest:x19; op1val:-0x2; immval:0x7ff
+TEST_IMM_OP( ori, x19, x25, 0xffffffffffffffff, -0x2, 0x7ff, x11, 16, x9)
+
+inst_3:
+// rs1==x0, rd==x1, imm_val == 1, rs1_val > 0 and imm_val > 0
+// opcode: ori ; op1:x0; dest:x1; op1val:0x0; immval:0x1
+TEST_IMM_OP( ori, x1, x0, 0x1, 0x0, 0x1, x11, 24, x9)
+
+inst_4:
+// rs1==x4, rd==x7, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808
+// opcode: ori ; op1:x4; dest:x7; op1val:-0x8000000000000000; immval:0x666
+TEST_IMM_OP( ori, x7, x4, 0x8000000000000666, -0x8000000000000000, 0x666, x11, 32, x9)
+
+inst_5:
+// rs1==x29, rd==x8, rs1_val == 0, imm_val == -513
+// opcode: ori ; op1:x29; dest:x8; op1val:0x0; immval:-0x201
+TEST_IMM_OP( ori, x8, x29, 0xfffffffffffffdff, 0x0, -0x201, x11, 40, x9)
+
+inst_6:
+// rs1==x22, rd==x17, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807
+// opcode: ori ; op1:x22; dest:x17; op1val:0x7fffffffffffffff; immval:-0x201
+TEST_IMM_OP( ori, x17, x22, 0xffffffffffffffff, 0x7fffffffffffffff, -0x201, x11, 48, x9)
+
+inst_7:
+// rs1==x17, rd==x10, rs1_val == 1,
+// opcode: ori ; op1:x17; dest:x10; op1val:0x1; immval:-0x6
+TEST_IMM_OP( ori, x10, x17, 0xfffffffffffffffb, 0x1, -0x6, x11, 56, x9)
+
+inst_8:
+// rs1==x5, rd==x30, rs1_val == imm_val, rs1_val==5 and imm_val==5
+// opcode: ori ; op1:x5; dest:x30; op1val:0x5; immval:0x5
+TEST_IMM_OP( ori, x30, x5, 0x5, 0x5, 0x5, x11, 64, x9)
+
+inst_9:
+// rs1==x12, rd==x0, rs1_val < 0 and imm_val < 0, rs1_val == -2097153, imm_val == -9
+// opcode: ori ; op1:x12; dest:x0; op1val:-0x200001; immval:-0x9
+TEST_IMM_OP( ori, x0, x12, 0, -0x200001, -0x9, x11, 72, x9)
+
+inst_10:
+// rs1==x16, rd==x3, imm_val == 2, rs1_val == 9007199254740992
+// opcode: ori ; op1:x16; dest:x3; op1val:0x20000000000000; immval:0x2
+TEST_IMM_OP( ori, x3, x16, 0x20000000000002, 0x20000000000000, 0x2, x11, 80, x9)
+
+inst_11:
+// rs1==x31, rd==x20, imm_val == 4, rs1_val == -65
+// opcode: ori ; op1:x31; dest:x20; op1val:-0x41; immval:0x4
+TEST_IMM_OP( ori, x20, x31, 0xffffffffffffffbf, -0x41, 0x4, x11, 88, x9)
+
+inst_12:
+// rs1==x3, rd==x12, imm_val == 8, rs1_val == 16384
+// opcode: ori ; op1:x3; dest:x12; op1val:0x4000; immval:0x8
+TEST_IMM_OP( ori, x12, x3, 0x4008, 0x4000, 0x8, x11, 96, x9)
+
+inst_13:
+// rs1==x18, rd==x21, imm_val == 16, rs1_val == -281474976710657
+// opcode: ori ; op1:x18; dest:x21; op1val:-0x1000000000001; immval:0x10
+TEST_IMM_OP( ori, x21, x18, 0xfffeffffffffffff, -0x1000000000001, 0x10, x11, 104, x9)
+
+inst_14:
+// rs1==x15, rd==x24, imm_val == 32, rs1_val == 4503599627370496
+// opcode: ori ; op1:x15; dest:x24; op1val:0x10000000000000; immval:0x20
+TEST_IMM_OP( ori, x24, x15, 0x10000000000020, 0x10000000000000, 0x20, x11, 112, x9)
+
+inst_15:
+// rs1==x10, rd==x23, imm_val == 64, rs1_val == -268435457
+// opcode: ori ; op1:x10; dest:x23; op1val:-0x10000001; immval:0x40
+TEST_IMM_OP( ori, x23, x10, 0xffffffffefffffff, -0x10000001, 0x40, x11, 120, x9)
+
+inst_16:
+// rs1==x20, rd==x18, imm_val == 128,
+// opcode: ori ; op1:x20; dest:x18; op1val:-0x8000000000000000; immval:0x80
+TEST_IMM_OP( ori, x18, x20, 0x8000000000000080, -0x8000000000000000, 0x80, x11, 128, x9)
+
+inst_17:
+// rs1==x24, rd==x14, imm_val == 256, rs1_val == 4294967296
+// opcode: ori ; op1:x24; dest:x14; op1val:0x100000000; immval:0x100
+TEST_IMM_OP( ori, x14, x24, 0x100000100, 0x100000000, 0x100, x11, 136, x9)
+
+inst_18:
+// rs1==x26, rd==x29, imm_val == 512, rs1_val == 2199023255552
+// opcode: ori ; op1:x26; dest:x29; op1val:0x20000000000; immval:0x200
+TEST_IMM_OP( ori, x29, x26, 0x20000000200, 0x20000000000, 0x200, x11, 144, x9)
+
+inst_19:
+// rs1==x1, rd==x28, imm_val == 1024, rs1_val == -9007199254740993
+// opcode: ori ; op1:x1; dest:x28; op1val:-0x20000000000001; immval:0x400
+TEST_IMM_OP( ori, x28, x1, 0xffdfffffffffffff, -0x20000000000001, 0x400, x11, 152, x3)
+
+inst_20:
+// rs1==x2, rd==x22, imm_val == -2,
+// opcode: ori ; op1:x2; dest:x22; op1val:0x6666666666666667; immval:-0x2
+TEST_IMM_OP( ori, x22, x2, 0xffffffffffffffff, 0x6666666666666667, -0x2, x11, 160, x3)
+
+inst_21:
+// rs1==x9, rd==x16, imm_val == -3, rs1_val == 33554432
+// opcode: ori ; op1:x9; dest:x16; op1val:0x2000000; immval:-0x3
+TEST_IMM_OP( ori, x16, x9, 0xfffffffffffffffd, 0x2000000, -0x3, x11, 168, x3)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_22:
+// rs1==x13, rd==x26, imm_val == -5,
+// opcode: ori ; op1:x13; dest:x26; op1val:0x7fffffffffffffff; immval:-0x5
+TEST_IMM_OP( ori, x26, x13, 0xffffffffffffffff, 0x7fffffffffffffff, -0x5, x1, 0, x3)
+
+inst_23:
+// rs1==x19, rd==x25, imm_val == -17,
+// opcode: ori ; op1:x19; dest:x25; op1val:0x3333333333333334; immval:-0x11
+TEST_IMM_OP( ori, x25, x19, 0xffffffffffffffff, 0x3333333333333334, -0x11, x1, 8, x3)
+
+inst_24:
+// rs1==x27, rd==x15, imm_val == -33, rs1_val == -262145
+// opcode: ori ; op1:x27; dest:x15; op1val:-0x40001; immval:-0x21
+TEST_IMM_OP( ori, x15, x27, 0xffffffffffffffff, -0x40001, -0x21, x1, 16, x3)
+
+inst_25:
+// rs1==x7, rd==x9, imm_val == -65, rs1_val == 6148914691236517205
+// opcode: ori ; op1:x7; dest:x9; op1val:0x5555555555555555; immval:-0x41
+TEST_IMM_OP( ori, x9, x7, 0xffffffffffffffff, 0x5555555555555555, -0x41, x1, 24, x3)
+
+inst_26:
+// rs1==x30, rd==x4, imm_val == -129, rs1_val == 8589934592
+// opcode: ori ; op1:x30; dest:x4; op1val:0x200000000; immval:-0x81
+TEST_IMM_OP( ori, x4, x30, 0xffffffffffffff7f, 0x200000000, -0x81, x1, 32, x3)
+
+inst_27:
+// rs1==x23, rd==x5, imm_val == -257, rs1_val == -8388609
+// opcode: ori ; op1:x23; dest:x5; op1val:-0x800001; immval:-0x101
+TEST_IMM_OP( ori, x5, x23, 0xffffffffffffffff, -0x800001, -0x101, x1, 40, x3)
+
+inst_28:
+// rs1==x21, rd==x11, imm_val == -1025,
+// opcode: ori ; op1:x21; dest:x11; op1val:0x3; immval:-0x401
+TEST_IMM_OP( ori, x11, x21, 0xfffffffffffffbff, 0x3, -0x401, x1, 48, x3)
+
+inst_29:
+// rs1==x11, rd==x27, imm_val == 1365, rs1_val==0 and imm_val==1365
+// opcode: ori ; op1:x11; dest:x27; op1val:0x0; immval:0x555
+TEST_IMM_OP( ori, x27, x11, 0x555, 0x0, 0x555, x1, 56, x3)
+
+inst_30:
+// rs1==x8, rd==x13, imm_val == -1366, rs1_val == 281474976710656
+// opcode: ori ; op1:x8; dest:x13; op1val:0x1000000000000; immval:-0x556
+TEST_IMM_OP( ori, x13, x8, 0xfffffffffffffaaa, 0x1000000000000, -0x556, x1, 64, x3)
+
+inst_31:
+// rs1==x14, rd==x31, rs1_val == 2,
+// opcode: ori ; op1:x14; dest:x31; op1val:0x2; immval:0x400
+TEST_IMM_OP( ori, x31, x14, 0x402, 0x2, 0x400, x1, 72, x3)
+
+inst_32:
+// rs1_val == 8,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x8; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xc, 0x8, 0x4, x1, 80, x3)
+
+inst_33:
+// rs1_val == 16,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x10; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x676, 0x10, 0x666, x1, 88, x3)
+
+inst_34:
+// rs1_val == 32,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x20; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x2d, 0x20, 0x2d, x1, 96, x3)
+
+inst_35:
+// rs1_val == 64,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x40; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd4, 0x40, -0x2c, x1, 104, x3)
+
+inst_36:
+// rs1_val == 128,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x80; immval:-0x5
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffffb, 0x80, -0x5, x1, 112, x3)
+
+inst_37:
+// rs1_val == 256,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x100; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x104, 0x100, 0x4, x1, 120, x3)
+
+inst_38:
+// rs1_val == 512,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x200; immval:-0x400
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffe00, 0x200, -0x400, x1, 128, x3)
+
+inst_39:
+// rs1_val == 1024,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x400; immval:-0x101
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffeff, 0x400, -0x101, x1, 136, x3)
+
+inst_40:
+// rs1_val == 2048,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x800; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x803, 0x800, 0x3, x1, 144, x3)
+
+inst_41:
+// rs1_val == 4096,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x1000; immval:0x200
+TEST_IMM_OP( ori, x11, x10, 0x1200, 0x1000, 0x200, x1, 152, x3)
+
+inst_42:
+// rs1_val == 32768,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x8000; immval:0x200
+TEST_IMM_OP( ori, x11, x10, 0x8200, 0x8000, 0x200, x1, 160, x3)
+
+inst_43:
+// rs1_val == 65536,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x10000; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x10000, 0x10000, 0x0, x1, 168, x3)
+
+inst_44:
+// rs1_val == 131072,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x20000; immval:-0x2
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffffe, 0x20000, -0x2, x1, 176, x3)
+
+inst_45:
+// rs1_val == 262144,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x40000; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x4002c, 0x40000, 0x2c, x1, 184, x3)
+
+inst_46:
+// rs1_val == 524288,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x80000; immval:-0x5
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffffb, 0x80000, -0x5, x1, 192, x3)
+
+inst_47:
+// rs1_val == 1048576,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x100000; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x100003, 0x100000, 0x3, x1, 200, x3)
+
+inst_48:
+// rs1_val == 2097152,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x200000; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x200005, 0x200000, 0x5, x1, 208, x3)
+
+inst_49:
+// rs1_val == 4194304,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x400000; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x400556, 0x400000, 0x556, x1, 216, x3)
+
+inst_50:
+// rs1_val == 8388608,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x800000; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd4, 0x800000, -0x2c, x1, 224, x3)
+
+inst_51:
+// rs1_val == 16777216,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x1000000; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x100002e, 0x1000000, 0x2e, x1, 232, x3)
+
+inst_52:
+// rs1_val == 67108864,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4000000; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x4000000, 0x4000000, 0x0, x1, 240, x3)
+
+inst_53:
+// rs1_val == 134217728,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x8000000; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x8000333, 0x8000000, 0x333, x1, 248, x3)
+
+inst_54:
+// rs1_val == 268435456,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x10000000; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x10000003, 0x10000000, 0x3, x1, 256, x3)
+
+inst_55:
+// rs1_val == 536870912,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x20000000; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd4, 0x20000000, -0x2c, x1, 264, x3)
+
+inst_56:
+// rs1_val == 1073741824,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x40000000; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x40000002, 0x40000000, 0x2, x1, 272, x3)
+
+inst_57:
+// rs1_val == 2147483648,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x80000000; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd3, 0x80000000, -0x2d, x1, 280, x3)
+
+inst_58:
+// rs1_val == 17179869184,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x400000000; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x400000004, 0x400000000, 0x4, x1, 288, x3)
+
+inst_59:
+// rs1_val == 34359738368,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x800000000; immval:0x40
+TEST_IMM_OP( ori, x11, x10, 0x800000040, 0x800000000, 0x40, x1, 296, x3)
+
+inst_60:
+// rs1_val == 68719476736,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x1000000000; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x1000000332, 0x1000000000, 0x332, x1, 304, x3)
+
+inst_61:
+// rs1_val == 137438953472,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2000000000; immval:-0xa
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff6, 0x2000000000, -0xa, x1, 312, x3)
+
+inst_62:
+// rs1_val == 274877906944,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4000000000; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd3, 0x4000000000, -0x2d, x1, 320, x3)
+
+inst_63:
+// rs1_val == 549755813888,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x8000000000; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x800000002d, 0x8000000000, 0x2d, x1, 328, x3)
+
+inst_64:
+// rs1_val == 1099511627776,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x10000000000; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd3, 0x10000000000, -0x2d, x1, 336, x3)
+
+inst_65:
+// rs1_val == 4398046511104,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x40000000000; immval:-0xa
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff6, 0x40000000000, -0xa, x1, 344, x3)
+
+inst_66:
+// rs1_val == 8796093022208,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x80000000000; immval:-0x41
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffbf, 0x80000000000, -0x41, x1, 352, x3)
+
+inst_67:
+// rs1_val == 17592186044416,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x100000000000; immval:-0x5
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffffb, 0x100000000000, -0x5, x1, 360, x3)
+
+inst_68:
+// rs1_val == 35184372088832,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x200000000000; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x200000000000, 0x200000000000, 0x0, x1, 368, x3)
+
+inst_69:
+// rs1_val == 70368744177664,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x400000000000; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x400000000667, 0x400000000000, 0x667, x1, 376, x3)
+
+inst_70:
+// rs1_val == 140737488355328,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x800000000000; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd4, 0x800000000000, -0x2c, x1, 384, x3)
+
+inst_71:
+// rs1_val == 562949953421312,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2000000000000; immval:0x400
+TEST_IMM_OP( ori, x11, x10, 0x2000000000400, 0x2000000000000, 0x400, x1, 392, x3)
+
+inst_72:
+// rs1_val == 1125899906842624,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4000000000000; immval:0x200
+TEST_IMM_OP( ori, x11, x10, 0x4000000000200, 0x4000000000000, 0x200, x1, 400, x3)
+
+inst_73:
+// rs1_val == 2251799813685248,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x8000000000000; immval:0x9
+TEST_IMM_OP( ori, x11, x10, 0x8000000000009, 0x8000000000000, 0x9, x1, 408, x3)
+
+inst_74:
+// rs1_val == 18014398509481984,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x40000000000000; immval:-0x81
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffff7f, 0x40000000000000, -0x81, x1, 416, x3)
+
+inst_75:
+// rs1_val == 36028797018963968,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x80000000000000; immval:0x7ff
+TEST_IMM_OP( ori, x11, x10, 0x800000000007ff, 0x80000000000000, 0x7ff, x1, 424, x3)
+
+inst_76:
+// rs1_val == 72057594037927936,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x100000000000000; immval:-0x4
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffffc, 0x100000000000000, -0x4, x1, 432, x3)
+
+inst_77:
+// rs1_val == 144115188075855872,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x200000000000000; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x200000000000004, 0x200000000000000, 0x4, x1, 440, x3)
+
+inst_78:
+// rs1_val == 288230376151711744,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x400000000000000; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x400000000000333, 0x400000000000000, 0x333, x1, 448, x3)
+
+inst_79:
+// rs1_val == 576460752303423488,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x800000000000000; immval:-0x4
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffffc, 0x800000000000000, -0x4, x1, 456, x3)
+
+inst_80:
+// rs1_val == 1152921504606846976,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x1000000000000000; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x1000000000000333, 0x1000000000000000, 0x333, x1, 464, x3)
+
+inst_81:
+// rs1_val == 2305843009213693952,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2000000000000000; immval:0x100
+TEST_IMM_OP( ori, x11, x10, 0x2000000000000100, 0x2000000000000000, 0x100, x1, 472, x3)
+
+inst_82:
+// rs1_val == 4611686018427387904,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4000000000000000; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x4000000000000003, 0x4000000000000000, 0x3, x1, 480, x3)
+
+inst_83:
+// rs1_val == -3,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x3; immval:-0x400
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffffd, -0x3, -0x400, x1, 488, x3)
+
+inst_84:
+// rs1_val == -5,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffffb, -0x5, -0x555, x1, 496, x3)
+
+inst_85:
+// rs1_val == -9,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x9; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x9, 0x2d, x1, 504, x3)
+
+inst_86:
+// rs1_val == -17,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x11; immval:0x9
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffef, -0x11, 0x9, x1, 512, x3)
+
+inst_87:
+// rs1_val == -33,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x21; immval:-0x2
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x21, -0x2, x1, 520, x3)
+
+inst_88:
+// rs1_val == -129,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x81; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffff7f, -0x81, 0x332, x1, 528, x3)
+
+inst_89:
+// rs1_val == -257,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x101; immval:-0x7
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x101, -0x7, x1, 536, x3)
+
+inst_90:
+// rs1_val == -513,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x201; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffdff, -0x201, 0x0, x1, 544, x3)
+
+inst_91:
+// rs1_val == -1025,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x401; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffbff, -0x401, 0x0, x1, 552, x3)
+
+inst_92:
+// rs1_val == -2049,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x801; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffff7ff, -0x801, 0x4, x1, 560, x3)
+
+inst_93:
+// rs1_val == -4097,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x1001; immval:-0x1
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x1001, -0x1, x1, 568, x3)
+
+inst_94:
+// rs1_val == -8193,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x2001; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x2001, -0x2c, x1, 576, x3)
+
+inst_95:
+// rs1_val == -16385,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x4001; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffbfff, -0x4001, 0x667, x1, 584, x3)
+
+inst_96:
+// rs1_val == -32769,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x8001; immval:0x9
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffff7fff, -0x8001, 0x9, x1, 592, x3)
+
+inst_97:
+// rs1_val == -65537,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x10001; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffeffff, -0x10001, 0x554, x1, 600, x3)
+
+inst_98:
+// rs1_val == -131073,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x20001; immval:-0x101
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x20001, -0x101, x1, 608, x3)
+
+inst_99:
+// rs1_val == -524289,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x80001; immval:0x200
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffff7ffff, -0x80001, 0x200, x1, 616, x3)
+
+inst_100:
+// rs1_val == -1048577,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x100001; immval:0x40
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffefffff, -0x100001, 0x40, x1, 624, x3)
+
+inst_101:
+// rs1_val == -4194305,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x400001; immval:-0x41
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x400001, -0x41, x1, 632, x3)
+
+inst_102:
+// rs1_val == -16777217,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x1000001; immval:0x100
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffeffffff, -0x1000001, 0x100, x1, 640, x3)
+
+inst_103:
+// rs1_val == -33554433,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x2000001; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffdffffff, -0x2000001, 0x0, x1, 648, x3)
+
+inst_104:
+// rs1_val == -67108865,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x4000001; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffbffffff, -0x4000001, 0x2d, x1, 656, x3)
+
+inst_105:
+// rs1_val == -134217729,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x8000001; immval:-0x8
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x8000001, -0x8, x1, 664, x3)
+
+inst_106:
+// rs1_val == -536870913,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x20000001; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x20000001, -0x556, x1, 672, x3)
+
+inst_107:
+// rs1_val == -1073741825,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x40000001; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xffffffffbfffffff, -0x40000001, 0x0, x1, 680, x3)
+
+inst_108:
+// rs1_val == -2147483649,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x80000001; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xffffffff7fffffff, -0x80000001, 0x0, x1, 688, x3)
+
+inst_109:
+// rs1_val == -4294967297,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x100000001; immval:-0x3
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x100000001, -0x3, x1, 696, x3)
+
+inst_110:
+// rs1_val == -8589934593,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x200000001; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xfffffffdffffffff, -0x200000001, 0x0, x1, 704, x3)
+
+inst_111:
+// rs1_val == -17179869185,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x400000001; immval:-0x9
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x400000001, -0x9, x1, 712, x3)
+
+inst_112:
+// rs1_val == -34359738369,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x800000001; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xfffffff7ffffffff, -0x800000001, 0x4, x1, 720, x3)
+
+inst_113:
+// rs1_val == -68719476737,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x1000000001; immval:0x200
+TEST_IMM_OP( ori, x11, x10, 0xffffffefffffffff, -0x1000000001, 0x200, x1, 728, x3)
+
+inst_114:
+// rs1_val == -137438953473,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x2000000001; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xffffffdfffffffff, -0x2000000001, 0x6, x1, 736, x3)
+
+inst_115:
+// rs1_val == -274877906945,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x4000000001; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xffffffbfffffffff, -0x4000000001, 0x666, x1, 744, x3)
+
+inst_116:
+// rs1_val == -549755813889,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x8000000001; immval:-0x800
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x8000000001, -0x800, x1, 752, x3)
+
+inst_117:
+// rs1_val == -1099511627777,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x10000000001; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xfffffeffffffffff, -0x10000000001, 0x3, x1, 760, x3)
+
+inst_118:
+// rs1_val == -2199023255553,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x20000000001; immval:0x3ff
+TEST_IMM_OP( ori, x11, x10, 0xfffffdffffffffff, -0x20000000001, 0x3ff, x1, 768, x3)
+
+inst_119:
+// rs1_val == -4398046511105,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x40000000001; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xfffffbffffffffff, -0x40000000001, 0x554, x1, 776, x3)
+
+inst_120:
+// rs1_val == -8796093022209,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x80000000001; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xfffff7ffffffffff, -0x80000000001, 0x4, x1, 784, x3)
+
+inst_121:
+// rs1_val == -17592186044417,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x100000000001; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xffffefffffffffff, -0x100000000001, 0x2, x1, 792, x3)
+
+inst_122:
+// rs1_val == -35184372088833,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x200000000001; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x200000000001, -0x556, x1, 800, x3)
+
+inst_123:
+// rs1_val == -70368744177665,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x400000000001; immval:-0x3
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x400000000001, -0x3, x1, 808, x3)
+
+inst_124:
+// rs1_val == -140737488355329,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x800000000001; immval:-0x400
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x800000000001, -0x400, x1, 816, x3)
+
+inst_125:
+// rs1_val == -562949953421313,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x2000000000001; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x2000000000001, -0x2d, x1, 824, x3)
+
+inst_126:
+// rs1_val == -1125899906842625,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x4000000000001; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x4000000000001, -0x555, x1, 832, x3)
+
+inst_127:
+// rs1_val == -2251799813685249,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x8000000000001; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xfff7ffffffffffff, -0x8000000000001, 0x665, x1, 840, x3)
+
+inst_128:
+// rs1_val == -4503599627370497,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x10000000000001; immval:-0x400
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x10000000000001, -0x400, x1, 848, x3)
+
+inst_129:
+// rs1_val == -18014398509481985,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x40000000000001; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xffbfffffffffffff, -0x40000000000001, 0x5, x1, 856, x3)
+
+inst_130:
+// rs1_val == -36028797018963969,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x80000000000001; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xff7fffffffffffff, -0x80000000000001, 0x556, x1, 864, x3)
+
+inst_131:
+// rs1_val == -72057594037927937,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x100000000000001; immval:0x10
+TEST_IMM_OP( ori, x11, x10, 0xfeffffffffffffff, -0x100000000000001, 0x10, x1, 872, x3)
+
+inst_132:
+// rs1_val == -144115188075855873,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x200000000000001; immval:-0x4
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x200000000000001, -0x4, x1, 880, x3)
+
+inst_133:
+// rs1_val == -288230376151711745,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x400000000000001; immval:-0x101
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x400000000000001, -0x101, x1, 888, x3)
+
+inst_134:
+// rs1_val == -576460752303423489,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x800000000000001; immval:0x20
+TEST_IMM_OP( ori, x11, x10, 0xf7ffffffffffffff, -0x800000000000001, 0x20, x1, 896, x3)
+
+inst_135:
+// rs1_val == -1152921504606846977,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x1000000000000001; immval:-0x8
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x1000000000000001, -0x8, x1, 904, x3)
+
+inst_136:
+// rs1_val == -2305843009213693953,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x2000000000000001; immval:0x7
+TEST_IMM_OP( ori, x11, x10, 0xdfffffffffffffff, -0x2000000000000001, 0x7, x1, 912, x3)
+
+inst_137:
+// rs1_val == -4611686018427387905,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x4000000000000001; immval:-0x4
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x4000000000000001, -0x4, x1, 920, x3)
+
+inst_138:
+// rs1_val == -6148914691236517206,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x9
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaab, -0x5555555555555556, 0x9, x1, 928, x3)
+
+inst_139:
+// rs1_val==3 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x3, 0x3, 0x3, x1, 936, x3)
+
+inst_140:
+// rs1_val==3 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x557, 0x3, 0x555, x1, 944, x3)
+
+inst_141:
+// rs1_val==3 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaab, 0x3, -0x556, x1, 952, x3)
+
+inst_142:
+// rs1_val==3 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x3, 0x5, x1, 960, x3)
+
+inst_143:
+// rs1_val==3 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x333, 0x3, 0x333, x1, 968, x3)
+
+inst_144:
+// rs1_val==3 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x3, 0x666, x1, 976, x3)
+
+inst_145:
+// rs1_val==3 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd3, 0x3, -0x2d, x1, 984, x3)
+
+inst_146:
+// rs1_val==3 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x2f, 0x3, 0x2d, x1, 992, x3)
+
+inst_147:
+// rs1_val==3 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x3, 0x3, 0x2, x1, 1000, x3)
+
+inst_148:
+// rs1_val==3 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x557, 0x3, 0x554, x1, 1008, x3)
+
+inst_149:
+// rs1_val==3 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x3, 0x3, 0x0, x1, 1016, x3)
+
+inst_150:
+// rs1_val==3 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x3, 0x4, x1, 1024, x3)
+
+inst_151:
+// rs1_val==3 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x333, 0x3, 0x332, x1, 1032, x3)
+
+inst_152:
+// rs1_val==3 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x3, 0x665, x1, 1040, x3)
+
+inst_153:
+// rs1_val==3 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x2f, 0x3, 0x2c, x1, 1048, x3)
+
+inst_154:
+// rs1_val==3 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x557, 0x3, 0x556, x1, 1056, x3)
+
+inst_155:
+// rs1_val==3 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaab, 0x3, -0x555, x1, 1064, x3)
+
+inst_156:
+// rs1_val==3 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x3, 0x6, x1, 1072, x3)
+
+inst_157:
+// rs1_val==3 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x337, 0x3, 0x334, x1, 1080, x3)
+
+inst_158:
+// rs1_val==3 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x3, 0x667, x1, 1088, x3)
+
+inst_159:
+// rs1_val==3 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd7, 0x3, -0x2c, x1, 1096, x3)
+
+inst_160:
+// rs1_val==3 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x2f, 0x3, 0x2e, x1, 1104, x3)
+
+inst_161:
+// rs1_val==6148914691236517205 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555557, 0x5555555555555555, 0x3, x1, 1112, x3)
+
+inst_162:
+// rs1_val==6148914691236517205 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555555, 0x5555555555555555, 0x555, x1, 1120, x3)
+
+inst_163:
+// rs1_val==6148914691236517205 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, 0x5555555555555555, -0x556, x1, 1128, x3)
+
+inst_164:
+// rs1_val==6148914691236517205 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555555, 0x5555555555555555, 0x5, x1, 1136, x3)
+
+inst_165:
+// rs1_val==6148914691236517205 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555777, 0x5555555555555555, 0x333, x1, 1144, x3)
+
+inst_166:
+// rs1_val==6148914691236517205 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555777, 0x5555555555555555, 0x666, x1, 1152, x3)
+
+inst_167:
+// rs1_val==6148914691236517205 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd7, 0x5555555555555555, -0x2d, x1, 1160, x3)
+
+inst_168:
+// rs1_val==6148914691236517205 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x555555555555557d, 0x5555555555555555, 0x2d, x1, 1168, x3)
+
+inst_169:
+// rs1_val==6148914691236517205 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555557, 0x5555555555555555, 0x2, x1, 1176, x3)
+
+inst_170:
+// rs1_val==6148914691236517205 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555555, 0x5555555555555555, 0x554, x1, 1184, x3)
+
+inst_171:
+// rs1_val==6148914691236517205 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555555, 0x5555555555555555, 0x0, x1, 1192, x3)
+
+inst_172:
+// rs1_val==6148914691236517205 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555555, 0x5555555555555555, 0x4, x1, 1200, x3)
+
+inst_173:
+// rs1_val==6148914691236517205 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555777, 0x5555555555555555, 0x332, x1, 1208, x3)
+
+inst_174:
+// rs1_val==6148914691236517205 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555775, 0x5555555555555555, 0x665, x1, 1216, x3)
+
+inst_175:
+// rs1_val==6148914691236517205 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x555555555555557d, 0x5555555555555555, 0x2c, x1, 1224, x3)
+
+inst_176:
+// rs1_val==6148914691236517205 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555557, 0x5555555555555555, 0x556, x1, 1232, x3)
+
+inst_177:
+// rs1_val==6148914691236517205 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, 0x5555555555555555, -0x555, x1, 1240, x3)
+
+inst_178:
+// rs1_val==6148914691236517205 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555557, 0x5555555555555555, 0x6, x1, 1248, x3)
+
+inst_179:
+// rs1_val==6148914691236517205 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555775, 0x5555555555555555, 0x334, x1, 1256, x3)
+
+inst_180:
+// rs1_val==6148914691236517205 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555777, 0x5555555555555555, 0x667, x1, 1264, x3)
+
+inst_181:
+// rs1_val==6148914691236517205 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd5, 0x5555555555555555, -0x2c, x1, 1272, x3)
+
+inst_182:
+// rs1_val==6148914691236517205 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x555555555555557f, 0x5555555555555555, 0x2e, x1, 1280, x3)
+
+inst_183:
+// rs1_val==-6148914691236517206 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaab, -0x5555555555555556, 0x3, x1, 1288, x3)
+
+inst_184:
+// rs1_val==-6148914691236517206 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaafff, -0x5555555555555556, 0x555, x1, 1296, x3)
+
+inst_185:
+// rs1_val==-6148914691236517206 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaaa, -0x5555555555555556, -0x556, x1, 1304, x3)
+
+inst_186:
+// rs1_val==-6148914691236517206 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555556, 0x5, x1, 1312, x3)
+
+inst_187:
+// rs1_val==-6148914691236517206 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaabbb, -0x5555555555555556, 0x333, x1, 1320, x3)
+
+inst_188:
+// rs1_val==-6148914691236517206 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaeee, -0x5555555555555556, 0x666, x1, 1328, x3)
+
+inst_189:
+// rs1_val==-6148914691236517206 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffffb, -0x5555555555555556, -0x2d, x1, 1336, x3)
+
+inst_190:
+// rs1_val==-6148914691236517206 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555556, 0x2d, x1, 1344, x3)
+
+inst_191:
+// rs1_val==-6148914691236517206 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x2, x1, 1352, x3)
+
+inst_192:
+// rs1_val==-6148914691236517206 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaffe, -0x5555555555555556, 0x554, x1, 1360, x3)
+
+inst_193:
+// rs1_val==-6148914691236517206 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x0, x1, 1368, x3)
+
+inst_194:
+// rs1_val==-6148914691236517206 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x4, x1, 1376, x3)
+
+inst_195:
+// rs1_val==-6148914691236517206 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaabba, -0x5555555555555556, 0x332, x1, 1384, x3)
+
+inst_196:
+// rs1_val==-6148914691236517206 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaeef, -0x5555555555555556, 0x665, x1, 1392, x3)
+
+inst_197:
+// rs1_val==-6148914691236517206 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x2c, x1, 1400, x3)
+
+inst_198:
+// rs1_val==-6148914691236517206 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaffe, -0x5555555555555556, 0x556, x1, 1408, x3)
+
+inst_199:
+// rs1_val==-6148914691236517206 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaab, -0x5555555555555556, -0x555, x1, 1416, x3)
+
+inst_200:
+// rs1_val==-6148914691236517206 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x6, x1, 1424, x3)
+
+inst_201:
+// rs1_val==-6148914691236517206 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaabbe, -0x5555555555555556, 0x334, x1, 1432, x3)
+
+inst_202:
+// rs1_val==-6148914691236517206 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaeef, -0x5555555555555556, 0x667, x1, 1440, x3)
+
+inst_203:
+// rs1_val==-6148914691236517206 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffffe, -0x5555555555555556, -0x2c, x1, 1448, x3)
+
+inst_204:
+// rs1_val==-6148914691236517206 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x2e, x1, 1456, x3)
+
+inst_205:
+// rs1_val==5 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x5, 0x3, x1, 1464, x3)
+
+inst_206:
+// rs1_val==5 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x555, 0x5, 0x555, x1, 1472, x3)
+
+inst_207:
+// rs1_val==5 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaaf, 0x5, -0x556, x1, 1480, x3)
+
+inst_208:
+// rs1_val==5 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x337, 0x5, 0x333, x1, 1488, x3)
+
+inst_209:
+// rs1_val==5 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x5, 0x666, x1, 1496, x3)
+
+inst_210:
+// rs1_val==5 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd7, 0x5, -0x2d, x1, 1504, x3)
+
+inst_211:
+// rs1_val==5 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x2d, 0x5, 0x2d, x1, 1512, x3)
+
+inst_212:
+// rs1_val==5 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x5, 0x2, x1, 1520, x3)
+
+inst_213:
+// rs1_val==5 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x555, 0x5, 0x554, x1, 1528, x3)
+
+inst_214:
+// rs1_val==5 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x5, 0x5, 0x0, x1, 1536, x3)
+
+inst_215:
+// rs1_val==5 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x5, 0x5, 0x4, x1, 1544, x3)
+
+inst_216:
+// rs1_val==5 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x337, 0x5, 0x332, x1, 1552, x3)
+
+inst_217:
+// rs1_val==5 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x665, 0x5, 0x665, x1, 1560, x3)
+
+inst_218:
+// rs1_val==5 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x2d, 0x5, 0x2c, x1, 1568, x3)
+
+inst_219:
+// rs1_val==5 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x557, 0x5, 0x556, x1, 1576, x3)
+
+inst_220:
+// rs1_val==5 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaaf, 0x5, -0x555, x1, 1584, x3)
+
+inst_221:
+// rs1_val==5 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x5, 0x6, x1, 1592, x3)
+
+inst_222:
+// rs1_val==5 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x335, 0x5, 0x334, x1, 1600, x3)
+
+inst_223:
+// rs1_val==5 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x5, 0x667, x1, 1608, x3)
+
+inst_224:
+// rs1_val==5 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd5, 0x5, -0x2c, x1, 1616, x3)
+
+inst_225:
+// rs1_val==5 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x2f, 0x5, 0x2e, x1, 1624, x3)
+
+inst_226:
+// rs1_val==3689348814741910323 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333333, 0x3333333333333333, 0x3, x1, 1632, x3)
+
+inst_227:
+// rs1_val==3689348814741910323 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333777, 0x3333333333333333, 0x555, x1, 1640, x3)
+
+inst_228:
+// rs1_val==3689348814741910323 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffbbb, 0x3333333333333333, -0x556, x1, 1648, x3)
+
+inst_229:
+// rs1_val==3689348814741910323 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333337, 0x3333333333333333, 0x5, x1, 1656, x3)
+
+inst_230:
+// rs1_val==3689348814741910323 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333333, 0x3333333333333333, 0x333, x1, 1664, x3)
+
+inst_231:
+// rs1_val==3689348814741910323 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333777, 0x3333333333333333, 0x666, x1, 1672, x3)
+
+inst_232:
+// rs1_val==3689348814741910323 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff3, 0x3333333333333333, -0x2d, x1, 1680, x3)
+
+inst_233:
+// rs1_val==3689348814741910323 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x333333333333333f, 0x3333333333333333, 0x2d, x1, 1688, x3)
+
+inst_234:
+// rs1_val==3689348814741910323 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333333, 0x3333333333333333, 0x2, x1, 1696, x3)
+
+inst_235:
+// rs1_val==3689348814741910323 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333777, 0x3333333333333333, 0x554, x1, 1704, x3)
+
+inst_236:
+// rs1_val==3689348814741910323 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333333, 0x3333333333333333, 0x0, x1, 1712, x3)
+
+inst_237:
+// rs1_val==3689348814741910323 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333337, 0x3333333333333333, 0x4, x1, 1720, x3)
+
+inst_238:
+// rs1_val==3689348814741910323 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333333, 0x3333333333333333, 0x332, x1, 1728, x3)
+
+inst_239:
+// rs1_val==3689348814741910323 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333777, 0x3333333333333333, 0x665, x1, 1736, x3)
+
+inst_240:
+// rs1_val==3689348814741910323 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x333333333333333f, 0x3333333333333333, 0x2c, x1, 1744, x3)
+
+inst_241:
+// rs1_val==3689348814741910323 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333777, 0x3333333333333333, 0x556, x1, 1752, x3)
+
+inst_242:
+// rs1_val==3689348814741910323 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffbbb, 0x3333333333333333, -0x555, x1, 1760, x3)
+
+inst_243:
+// rs1_val==3689348814741910323 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333337, 0x3333333333333333, 0x6, x1, 1768, x3)
+
+inst_244:
+// rs1_val==3689348814741910323 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333337, 0x3333333333333333, 0x334, x1, 1776, x3)
+
+inst_245:
+// rs1_val==3689348814741910323 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333777, 0x3333333333333333, 0x667, x1, 1784, x3)
+
+inst_246:
+// rs1_val==3689348814741910323 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff7, 0x3333333333333333, -0x2c, x1, 1792, x3)
+
+inst_247:
+// rs1_val==3689348814741910323 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x333333333333333f, 0x3333333333333333, 0x2e, x1, 1800, x3)
+
+inst_248:
+// rs1_val==7378697629483820646 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666666, 0x3, x1, 1808, x3)
+
+inst_249:
+// rs1_val==7378697629483820646 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666777, 0x6666666666666666, 0x555, x1, 1816, x3)
+
+inst_250:
+// rs1_val==7378697629483820646 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffeee, 0x6666666666666666, -0x556, x1, 1824, x3)
+
+inst_251:
+// rs1_val==7378697629483820646 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666666, 0x5, x1, 1832, x3)
+
+inst_252:
+// rs1_val==7378697629483820646 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666777, 0x6666666666666666, 0x333, x1, 1840, x3)
+
+inst_253:
+// rs1_val==7378697629483820646 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666666, 0x6666666666666666, 0x666, x1, 1848, x3)
+
+inst_254:
+// rs1_val==7378697629483820646 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff7, 0x6666666666666666, -0x2d, x1, 1856, x3)
+
+inst_255:
+// rs1_val==7378697629483820646 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x666666666666666f, 0x6666666666666666, 0x2d, x1, 1864, x3)
+
+inst_256:
+// rs1_val==7378697629483820646 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666666, 0x6666666666666666, 0x2, x1, 1872, x3)
+
+inst_257:
+// rs1_val==7378697629483820646 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666776, 0x6666666666666666, 0x554, x1, 1880, x3)
+
+inst_258:
+// rs1_val==7378697629483820646 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666666, 0x6666666666666666, 0x0, x1, 1888, x3)
+
+inst_259:
+// rs1_val==7378697629483820646 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666666, 0x6666666666666666, 0x4, x1, 1896, x3)
+
+inst_260:
+// rs1_val==7378697629483820646 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666776, 0x6666666666666666, 0x332, x1, 1904, x3)
+
+inst_261:
+// rs1_val==7378697629483820646 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666666, 0x665, x1, 1912, x3)
+
+inst_262:
+// rs1_val==7378697629483820646 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x666666666666666e, 0x6666666666666666, 0x2c, x1, 1920, x3)
+
+inst_263:
+// rs1_val==7378697629483820646 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666776, 0x6666666666666666, 0x556, x1, 1928, x3)
+
+inst_264:
+// rs1_val==7378697629483820646 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffeef, 0x6666666666666666, -0x555, x1, 1936, x3)
+
+inst_265:
+// rs1_val==7378697629483820646 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666666, 0x6666666666666666, 0x6, x1, 1944, x3)
+
+inst_266:
+// rs1_val==7378697629483820646 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666776, 0x6666666666666666, 0x334, x1, 1952, x3)
+
+inst_267:
+// rs1_val==7378697629483820646 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666666, 0x667, x1, 1960, x3)
+
+inst_268:
+// rs1_val==7378697629483820646 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff6, 0x6666666666666666, -0x2c, x1, 1968, x3)
+
+inst_269:
+// rs1_val==7378697629483820646 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x666666666666666e, 0x6666666666666666, 0x2e, x1, 1976, x3)
+
+inst_270:
+// rs1_val==-3037000499 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ccf, -0xb504f333, 0x3, x1, 1984, x3)
+
+inst_271:
+// rs1_val==-3037000499 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ddd, -0xb504f333, 0x555, x1, 1992, x3)
+
+inst_272:
+// rs1_val==-3037000499 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffeef, -0xb504f333, -0x556, x1, 2000, x3)
+
+inst_273:
+// rs1_val==-3037000499 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ccd, -0xb504f333, 0x5, x1, 2008, x3)
+
+inst_274:
+// rs1_val==-3037000499 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0fff, -0xb504f333, 0x333, x1, 2016, x3)
+
+inst_275:
+// rs1_val==-3037000499 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0eef, -0xb504f333, 0x666, x1, 2024, x3)
+
+inst_276:
+// rs1_val==-3037000499 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffdf, -0xb504f333, -0x2d, x1, 2032, x3)
+
+inst_277:
+// rs1_val==-3037000499 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ced, -0xb504f333, 0x2d, x1, 2040, x3)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_278:
+// rs1_val==-3037000499 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ccf, -0xb504f333, 0x2, x1, 0, x3)
+
+inst_279:
+// rs1_val==-3037000499 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ddd, -0xb504f333, 0x554, x1, 8, x3)
+
+inst_280:
+// rs1_val==-3037000499 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ccd, -0xb504f333, 0x0, x1, 16, x3)
+
+inst_281:
+// rs1_val==-3037000499 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ccd, -0xb504f333, 0x4, x1, 24, x3)
+
+inst_282:
+// rs1_val==-3037000499 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0fff, -0xb504f333, 0x332, x1, 32, x3)
+
+inst_283:
+// rs1_val==-3037000499 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0eed, -0xb504f333, 0x665, x1, 40, x3)
+
+inst_284:
+// rs1_val==-3037000499 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ced, -0xb504f333, 0x2c, x1, 48, x3)
+
+inst_285:
+// rs1_val==-3037000499 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ddf, -0xb504f333, 0x556, x1, 56, x3)
+
+inst_286:
+// rs1_val==-3037000499 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffeef, -0xb504f333, -0x555, x1, 64, x3)
+
+inst_287:
+// rs1_val==-3037000499 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ccf, -0xb504f333, 0x6, x1, 72, x3)
+
+inst_288:
+// rs1_val==-3037000499 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ffd, -0xb504f333, 0x334, x1, 80, x3)
+
+inst_289:
+// rs1_val==-3037000499 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0eef, -0xb504f333, 0x667, x1, 88, x3)
+
+inst_290:
+// rs1_val==-3037000499 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffdd, -0xb504f333, -0x2c, x1, 96, x3)
+
+inst_291:
+// rs1_val==-3037000499 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0cef, -0xb504f333, 0x2e, x1, 104, x3)
+
+inst_292:
+// rs1_val==3037000499 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xb504f333, 0xb504f333, 0x3, x1, 112, x3)
+
+inst_293:
+// rs1_val==3037000499 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xb504f777, 0xb504f333, 0x555, x1, 120, x3)
+
+inst_294:
+// rs1_val==3037000499 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffbbb, 0xb504f333, -0x556, x1, 128, x3)
+
+inst_295:
+// rs1_val==3037000499 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xb504f337, 0xb504f333, 0x5, x1, 136, x3)
+
+inst_296:
+// rs1_val==3037000499 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xb504f333, 0xb504f333, 0x333, x1, 144, x3)
+
+inst_297:
+// rs1_val==3037000499 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xb504f777, 0xb504f333, 0x666, x1, 152, x3)
+
+inst_298:
+// rs1_val==3037000499 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff3, 0xb504f333, -0x2d, x1, 160, x3)
+
+inst_299:
+// rs1_val==3037000499 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xb504f33f, 0xb504f333, 0x2d, x1, 168, x3)
+
+inst_300:
+// rs1_val==3037000499 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xb504f333, 0xb504f333, 0x2, x1, 176, x3)
+
+inst_301:
+// rs1_val==3037000499 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xb504f777, 0xb504f333, 0x554, x1, 184, x3)
+
+inst_302:
+// rs1_val==3037000499 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xb504f333, 0xb504f333, 0x0, x1, 192, x3)
+
+inst_303:
+// rs1_val==3037000499 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xb504f337, 0xb504f333, 0x4, x1, 200, x3)
+
+inst_304:
+// rs1_val==3037000499 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xb504f333, 0xb504f333, 0x332, x1, 208, x3)
+
+inst_305:
+// rs1_val==3037000499 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xb504f777, 0xb504f333, 0x665, x1, 216, x3)
+
+inst_306:
+// rs1_val==3037000499 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xb504f33f, 0xb504f333, 0x2c, x1, 224, x3)
+
+inst_307:
+// rs1_val==3037000499 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xb504f777, 0xb504f333, 0x556, x1, 232, x3)
+
+inst_308:
+// rs1_val==3037000499 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffbbb, 0xb504f333, -0x555, x1, 240, x3)
+
+inst_309:
+// rs1_val==3037000499 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xb504f337, 0xb504f333, 0x6, x1, 248, x3)
+
+inst_310:
+// rs1_val==3037000499 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xb504f337, 0xb504f333, 0x334, x1, 256, x3)
+
+inst_311:
+// rs1_val==3037000499 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xb504f777, 0xb504f333, 0x667, x1, 264, x3)
+
+inst_312:
+// rs1_val==3037000499 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff7, 0xb504f333, -0x2c, x1, 272, x3)
+
+inst_313:
+// rs1_val==3037000499 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xb504f33f, 0xb504f333, 0x2e, x1, 280, x3)
+
+inst_314:
+// rs1_val==2 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x3, 0x2, 0x3, x1, 288, x3)
+
+inst_315:
+// rs1_val==2 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x557, 0x2, 0x555, x1, 296, x3)
+
+inst_316:
+// rs1_val==2 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaaa, 0x2, -0x556, x1, 304, x3)
+
+inst_317:
+// rs1_val==2 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x2, 0x5, x1, 312, x3)
+
+inst_318:
+// rs1_val==2 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x333, 0x2, 0x333, x1, 320, x3)
+
+inst_319:
+// rs1_val==2 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x666, 0x2, 0x666, x1, 328, x3)
+
+inst_320:
+// rs1_val==2 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd3, 0x2, -0x2d, x1, 336, x3)
+
+inst_321:
+// rs1_val==2 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x2f, 0x2, 0x2d, x1, 344, x3)
+
+inst_322:
+// rs1_val==2 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x2, 0x2, 0x2, x1, 352, x3)
+
+inst_323:
+// rs1_val==2 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x556, 0x2, 0x554, x1, 360, x3)
+
+inst_324:
+// rs1_val==2 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x2, 0x2, 0x0, x1, 368, x3)
+
+inst_325:
+// rs1_val==2 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x2, 0x4, x1, 376, x3)
+
+inst_326:
+// rs1_val==2 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x332, 0x2, 0x332, x1, 384, x3)
+
+inst_327:
+// rs1_val==2 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x2, 0x665, x1, 392, x3)
+
+inst_328:
+// rs1_val==2 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x2e, 0x2, 0x2c, x1, 400, x3)
+
+inst_329:
+// rs1_val==2 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x556, 0x2, 0x556, x1, 408, x3)
+
+inst_330:
+// rs1_val==2 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaab, 0x2, -0x555, x1, 416, x3)
+
+inst_331:
+// rs1_val==2 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x2, 0x6, x1, 424, x3)
+
+inst_332:
+// rs1_val==2 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x336, 0x2, 0x334, x1, 432, x3)
+
+inst_333:
+// rs1_val==2 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x2, 0x667, x1, 440, x3)
+
+inst_334:
+// rs1_val==2 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd6, 0x2, -0x2c, x1, 448, x3)
+
+inst_335:
+// rs1_val==2 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x2; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x2e, 0x2, 0x2e, x1, 456, x3)
+
+inst_336:
+// rs1_val==6148914691236517204 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555557, 0x5555555555555554, 0x3, x1, 464, x3)
+
+inst_337:
+// rs1_val==6148914691236517204 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555555, 0x5555555555555554, 0x555, x1, 472, x3)
+
+inst_338:
+// rs1_val==6148914691236517204 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffffe, 0x5555555555555554, -0x556, x1, 480, x3)
+
+inst_339:
+// rs1_val==6148914691236517204 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555555, 0x5555555555555554, 0x5, x1, 488, x3)
+
+inst_340:
+// rs1_val==6148914691236517204 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555777, 0x5555555555555554, 0x333, x1, 496, x3)
+
+inst_341:
+// rs1_val==6148914691236517204 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555776, 0x5555555555555554, 0x666, x1, 504, x3)
+
+inst_342:
+// rs1_val==6148914691236517204 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd7, 0x5555555555555554, -0x2d, x1, 512, x3)
+
+inst_343:
+// rs1_val==6148914691236517204 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x555555555555557d, 0x5555555555555554, 0x2d, x1, 520, x3)
+
+inst_344:
+// rs1_val==6148914691236517204 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555556, 0x5555555555555554, 0x2, x1, 528, x3)
+
+inst_345:
+// rs1_val==6148914691236517204 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555554, 0x5555555555555554, 0x554, x1, 536, x3)
+
+inst_346:
+// rs1_val==6148914691236517204 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555554, 0x5555555555555554, 0x0, x1, 544, x3)
+
+inst_347:
+// rs1_val==6148914691236517204 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555554, 0x5555555555555554, 0x4, x1, 552, x3)
+
+inst_348:
+// rs1_val==6148914691236517204 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555776, 0x5555555555555554, 0x332, x1, 560, x3)
+
+inst_349:
+// rs1_val==6148914691236517204 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555775, 0x5555555555555554, 0x665, x1, 568, x3)
+
+inst_350:
+// rs1_val==6148914691236517204 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x555555555555557c, 0x5555555555555554, 0x2c, x1, 576, x3)
+
+inst_351:
+// rs1_val==6148914691236517204 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555556, 0x5555555555555554, 0x556, x1, 584, x3)
+
+inst_352:
+// rs1_val==6148914691236517204 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, 0x5555555555555554, -0x555, x1, 592, x3)
+
+inst_353:
+// rs1_val==6148914691236517204 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555556, 0x5555555555555554, 0x6, x1, 600, x3)
+
+inst_354:
+// rs1_val==6148914691236517204 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555774, 0x5555555555555554, 0x334, x1, 608, x3)
+
+inst_355:
+// rs1_val==6148914691236517204 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555777, 0x5555555555555554, 0x667, x1, 616, x3)
+
+inst_356:
+// rs1_val==6148914691236517204 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd4, 0x5555555555555554, -0x2c, x1, 624, x3)
+
+inst_357:
+// rs1_val==6148914691236517204 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x555555555555557e, 0x5555555555555554, 0x2e, x1, 632, x3)
+
+inst_358:
+// rs1_val==0 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x3, 0x0, 0x3, x1, 640, x3)
+
+inst_359:
+// rs1_val==0 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaaa, 0x0, -0x556, x1, 648, x3)
+
+inst_360:
+// rs1_val==0 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x5, 0x0, 0x5, x1, 656, x3)
+
+inst_361:
+// rs1_val==0 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x333, 0x0, 0x333, x1, 664, x3)
+
+inst_362:
+// rs1_val==0 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x666, 0x0, 0x666, x1, 672, x3)
+
+inst_363:
+// rs1_val==0 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd3, 0x0, -0x2d, x1, 680, x3)
+
+inst_364:
+// rs1_val==0 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x2d, 0x0, 0x2d, x1, 688, x3)
+
+inst_365:
+// rs1_val==6148914691236517206 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x555555555555557e, 0x5555555555555556, 0x2c, x1, 696, x3)
+
+inst_366:
+// rs1_val==6148914691236517206 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555556, 0x5555555555555556, 0x556, x1, 704, x3)
+
+inst_367:
+// rs1_val==6148914691236517206 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, 0x5555555555555556, -0x555, x1, 712, x3)
+
+inst_368:
+// rs1_val==6148914691236517206 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555556, 0x5555555555555556, 0x6, x1, 720, x3)
+
+inst_369:
+// rs1_val==6148914691236517206 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555776, 0x5555555555555556, 0x334, x1, 728, x3)
+
+inst_370:
+// rs1_val==6148914691236517206 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555777, 0x5555555555555556, 0x667, x1, 736, x3)
+
+inst_371:
+// rs1_val==6148914691236517206 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd6, 0x5555555555555556, -0x2c, x1, 744, x3)
+
+inst_372:
+// rs1_val==6148914691236517206 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x555555555555557e, 0x5555555555555556, 0x2e, x1, 752, x3)
+
+inst_373:
+// rs1_val==-6148914691236517205 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x3, x1, 760, x3)
+
+inst_374:
+// rs1_val==-6148914691236517205 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaafff, -0x5555555555555555, 0x555, x1, 768, x3)
+
+inst_375:
+// rs1_val==-6148914691236517205 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaab, -0x5555555555555555, -0x556, x1, 776, x3)
+
+inst_376:
+// rs1_val==-6148914691236517205 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x5, x1, 784, x3)
+
+inst_377:
+// rs1_val==-6148914691236517205 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaabbb, -0x5555555555555555, 0x333, x1, 792, x3)
+
+inst_378:
+// rs1_val==-6148914691236517205 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaeef, -0x5555555555555555, 0x666, x1, 800, x3)
+
+inst_379:
+// rs1_val==-6148914691236517205 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffffb, -0x5555555555555555, -0x2d, x1, 808, x3)
+
+inst_380:
+// rs1_val==-6148914691236517205 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x2d, x1, 816, x3)
+
+inst_381:
+// rs1_val==-6148914691236517205 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x2, x1, 824, x3)
+
+inst_382:
+// rs1_val==-6148914691236517205 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaafff, -0x5555555555555555, 0x554, x1, 832, x3)
+
+inst_383:
+// rs1_val==-6148914691236517205 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x0, x1, 840, x3)
+
+inst_384:
+// rs1_val==-6148914691236517205 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x4, x1, 848, x3)
+
+inst_385:
+// rs1_val==-6148914691236517205 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaabbb, -0x5555555555555555, 0x332, x1, 856, x3)
+
+inst_386:
+// rs1_val==-6148914691236517205 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaeef, -0x5555555555555555, 0x665, x1, 864, x3)
+
+inst_387:
+// rs1_val==-6148914691236517205 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x2c, x1, 872, x3)
+
+inst_388:
+// rs1_val==-6148914691236517205 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaafff, -0x5555555555555555, 0x556, x1, 880, x3)
+
+inst_389:
+// rs1_val==-6148914691236517205 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaab, -0x5555555555555555, -0x555, x1, 888, x3)
+
+inst_390:
+// rs1_val==-6148914691236517205 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x6, x1, 896, x3)
+
+inst_391:
+// rs1_val==-6148914691236517205 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaabbf, -0x5555555555555555, 0x334, x1, 904, x3)
+
+inst_392:
+// rs1_val==-6148914691236517205 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaeef, -0x5555555555555555, 0x667, x1, 912, x3)
+
+inst_393:
+// rs1_val==-6148914691236517205 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x5555555555555555, -0x2c, x1, 920, x3)
+
+inst_394:
+// rs1_val==-6148914691236517205 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x2e, x1, 928, x3)
+
+inst_395:
+// rs1_val==6 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x6, 0x3, x1, 936, x3)
+
+inst_396:
+// rs1_val==6 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x557, 0x6, 0x555, x1, 944, x3)
+
+inst_397:
+// rs1_val==6 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaae, 0x6, -0x556, x1, 952, x3)
+
+inst_398:
+// rs1_val==6 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x6, 0x5, x1, 960, x3)
+
+inst_399:
+// rs1_val==6 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x337, 0x6, 0x333, x1, 968, x3)
+
+inst_400:
+// rs1_val==6 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x666, 0x6, 0x666, x1, 976, x3)
+
+inst_401:
+// rs1_val==6 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd7, 0x6, -0x2d, x1, 984, x3)
+
+inst_402:
+// rs1_val==6 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x2f, 0x6, 0x2d, x1, 992, x3)
+
+inst_403:
+// rs1_val==6 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x6, 0x2, x1, 1000, x3)
+
+inst_404:
+// rs1_val==6 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x556, 0x6, 0x554, x1, 1008, x3)
+
+inst_405:
+// rs1_val==6 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x6, 0x0, x1, 1016, x3)
+
+inst_406:
+// rs1_val==6 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x6, 0x4, x1, 1024, x3)
+
+inst_407:
+// rs1_val==6 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x336, 0x6, 0x332, x1, 1032, x3)
+
+inst_408:
+// rs1_val==6 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x6, 0x665, x1, 1040, x3)
+
+inst_409:
+// rs1_val==6 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x2e, 0x6, 0x2c, x1, 1048, x3)
+
+inst_410:
+// rs1_val==6 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x556, 0x6, 0x556, x1, 1056, x3)
+
+inst_411:
+// rs1_val==6 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaaf, 0x6, -0x555, x1, 1064, x3)
+
+inst_412:
+// rs1_val==6 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x6, 0x6, x1, 1072, x3)
+
+inst_413:
+// rs1_val==6 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x336, 0x6, 0x334, x1, 1080, x3)
+
+inst_414:
+// rs1_val==6 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x6, 0x667, x1, 1088, x3)
+
+inst_415:
+// rs1_val==6 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd6, 0x6, -0x2c, x1, 1096, x3)
+
+inst_416:
+// rs1_val==6 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x2e, 0x6, 0x2e, x1, 1104, x3)
+
+inst_417:
+// rs1_val==3689348814741910324 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333337, 0x3333333333333334, 0x3, x1, 1112, x3)
+
+inst_418:
+// rs1_val==3689348814741910324 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333775, 0x3333333333333334, 0x555, x1, 1120, x3)
+
+inst_419:
+// rs1_val==3689348814741910324 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffbbe, 0x3333333333333334, -0x556, x1, 1128, x3)
+
+inst_420:
+// rs1_val==3689348814741910324 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333335, 0x3333333333333334, 0x5, x1, 1136, x3)
+
+inst_421:
+// rs1_val==3689348814741910324 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333337, 0x3333333333333334, 0x333, x1, 1144, x3)
+
+inst_422:
+// rs1_val==3689348814741910324 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333776, 0x3333333333333334, 0x666, x1, 1152, x3)
+
+inst_423:
+// rs1_val==3689348814741910324 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff7, 0x3333333333333334, -0x2d, x1, 1160, x3)
+
+inst_424:
+// rs1_val==3689348814741910324 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x333333333333333d, 0x3333333333333334, 0x2d, x1, 1168, x3)
+
+inst_425:
+// rs1_val==3689348814741910324 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333336, 0x3333333333333334, 0x2, x1, 1176, x3)
+
+inst_426:
+// rs1_val==3689348814741910324 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333774, 0x3333333333333334, 0x554, x1, 1184, x3)
+
+inst_427:
+// rs1_val==3689348814741910324 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333334, 0x3333333333333334, 0x0, x1, 1192, x3)
+
+inst_428:
+// rs1_val==3689348814741910324 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333334, 0x3333333333333334, 0x4, x1, 1200, x3)
+
+inst_429:
+// rs1_val==3689348814741910324 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333336, 0x3333333333333334, 0x332, x1, 1208, x3)
+
+inst_430:
+// rs1_val==3689348814741910324 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333775, 0x3333333333333334, 0x665, x1, 1216, x3)
+
+inst_431:
+// rs1_val==3689348814741910324 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x333333333333333c, 0x3333333333333334, 0x2c, x1, 1224, x3)
+
+inst_432:
+// rs1_val==3689348814741910324 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333776, 0x3333333333333334, 0x556, x1, 1232, x3)
+
+inst_433:
+// rs1_val==3689348814741910324 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffbbf, 0x3333333333333334, -0x555, x1, 1240, x3)
+
+inst_434:
+// rs1_val==3689348814741910324 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333336, 0x3333333333333334, 0x6, x1, 1248, x3)
+
+inst_435:
+// rs1_val==3689348814741910324 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333334, 0x3333333333333334, 0x334, x1, 1256, x3)
+
+inst_436:
+// rs1_val==3689348814741910324 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333777, 0x3333333333333334, 0x667, x1, 1264, x3)
+
+inst_437:
+// rs1_val==3689348814741910324 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff4, 0x3333333333333334, -0x2c, x1, 1272, x3)
+
+inst_438:
+// rs1_val==3689348814741910324 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x333333333333333e, 0x3333333333333334, 0x2e, x1, 1280, x3)
+
+inst_439:
+// rs1_val==7378697629483820647 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666667, 0x3, x1, 1288, x3)
+
+inst_440:
+// rs1_val==7378697629483820647 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666777, 0x6666666666666667, 0x555, x1, 1296, x3)
+
+inst_441:
+// rs1_val==7378697629483820647 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffeef, 0x6666666666666667, -0x556, x1, 1304, x3)
+
+inst_442:
+// rs1_val==7378697629483820647 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666667, 0x5, x1, 1312, x3)
+
+inst_443:
+// rs1_val==7378697629483820647 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666777, 0x6666666666666667, 0x333, x1, 1320, x3)
+
+inst_444:
+// rs1_val==7378697629483820647 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666667, 0x666, x1, 1328, x3)
+
+inst_445:
+// rs1_val==7378697629483820647 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff7, 0x6666666666666667, -0x2d, x1, 1336, x3)
+
+inst_446:
+// rs1_val==7378697629483820647 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x666666666666666f, 0x6666666666666667, 0x2d, x1, 1344, x3)
+
+inst_447:
+// rs1_val==7378697629483820647 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666667, 0x2, x1, 1352, x3)
+
+inst_448:
+// rs1_val==7378697629483820647 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666777, 0x6666666666666667, 0x554, x1, 1360, x3)
+
+inst_449:
+// rs1_val==7378697629483820647 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666667, 0x0, x1, 1368, x3)
+
+inst_450:
+// rs1_val==7378697629483820647 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666667, 0x4, x1, 1376, x3)
+
+inst_451:
+// rs1_val==7378697629483820647 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666777, 0x6666666666666667, 0x332, x1, 1384, x3)
+
+inst_452:
+// rs1_val==7378697629483820647 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666667, 0x665, x1, 1392, x3)
+
+inst_453:
+// rs1_val==7378697629483820647 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x666666666666666f, 0x6666666666666667, 0x2c, x1, 1400, x3)
+
+inst_454:
+// rs1_val==7378697629483820647 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666777, 0x6666666666666667, 0x556, x1, 1408, x3)
+
+inst_455:
+// rs1_val==7378697629483820647 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffeef, 0x6666666666666667, -0x555, x1, 1416, x3)
+
+inst_456:
+// rs1_val==7378697629483820647 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666667, 0x6, x1, 1424, x3)
+
+inst_457:
+// rs1_val==7378697629483820647 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666777, 0x6666666666666667, 0x334, x1, 1432, x3)
+
+inst_458:
+// rs1_val==7378697629483820647 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666667, 0x667, x1, 1440, x3)
+
+inst_459:
+// rs1_val==7378697629483820647 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff7, 0x6666666666666667, -0x2c, x1, 1448, x3)
+
+inst_460:
+// rs1_val==7378697629483820647 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x666666666666666f, 0x6666666666666667, 0x2e, x1, 1456, x3)
+
+inst_461:
+// rs1_val==-3037000498 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ccf, -0xb504f332, 0x3, x1, 1464, x3)
+
+inst_462:
+// rs1_val==-3037000498 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ddf, -0xb504f332, 0x555, x1, 1472, x3)
+
+inst_463:
+// rs1_val==-3037000498 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffeee, -0xb504f332, -0x556, x1, 1480, x3)
+
+inst_464:
+// rs1_val==-3037000498 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ccf, -0xb504f332, 0x5, x1, 1488, x3)
+
+inst_465:
+// rs1_val==-3037000498 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0fff, -0xb504f332, 0x333, x1, 1496, x3)
+
+inst_466:
+// rs1_val==-3037000498 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0eee, -0xb504f332, 0x666, x1, 1504, x3)
+
+inst_467:
+// rs1_val==-3037000498 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffdf, -0xb504f332, -0x2d, x1, 1512, x3)
+
+inst_468:
+// rs1_val==-3037000498 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0cef, -0xb504f332, 0x2d, x1, 1520, x3)
+
+inst_469:
+// rs1_val==-3037000498 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0cce, -0xb504f332, 0x2, x1, 1528, x3)
+
+inst_470:
+// rs1_val==-3037000498 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0dde, -0xb504f332, 0x554, x1, 1536, x3)
+
+inst_471:
+// rs1_val==-3037000498 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0cce, -0xb504f332, 0x0, x1, 1544, x3)
+
+inst_472:
+// rs1_val==-3037000498 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0cce, -0xb504f332, 0x4, x1, 1552, x3)
+
+inst_473:
+// rs1_val==-3037000498 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ffe, -0xb504f332, 0x332, x1, 1560, x3)
+
+inst_474:
+// rs1_val==-3037000498 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0eef, -0xb504f332, 0x665, x1, 1568, x3)
+
+inst_475:
+// rs1_val==-3037000498 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0cee, -0xb504f332, 0x2c, x1, 1576, x3)
+
+inst_476:
+// rs1_val==-3037000498 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0dde, -0xb504f332, 0x556, x1, 1584, x3)
+
+inst_477:
+// rs1_val==-3037000498 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffeef, -0xb504f332, -0x555, x1, 1592, x3)
+
+inst_478:
+// rs1_val==-3037000498 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0cce, -0xb504f332, 0x6, x1, 1600, x3)
+
+inst_479:
+// rs1_val==-3037000498 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0ffe, -0xb504f332, 0x334, x1, 1608, x3)
+
+inst_480:
+// rs1_val==-3037000498 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0eef, -0xb504f332, 0x667, x1, 1616, x3)
+
+inst_481:
+// rs1_val==-3037000498 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffde, -0xb504f332, -0x2c, x1, 1624, x3)
+
+inst_482:
+// rs1_val==-3037000498 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xffffffff4afb0cee, -0xb504f332, 0x2e, x1, 1632, x3)
+
+inst_483:
+// rs1_val==3037000500 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xb504f337, 0xb504f334, 0x3, x1, 1640, x3)
+
+inst_484:
+// rs1_val==3037000500 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xb504f775, 0xb504f334, 0x555, x1, 1648, x3)
+
+inst_485:
+// rs1_val==3037000500 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffbbe, 0xb504f334, -0x556, x1, 1656, x3)
+
+inst_486:
+// rs1_val==3037000500 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xb504f335, 0xb504f334, 0x5, x1, 1664, x3)
+
+inst_487:
+// rs1_val==3037000500 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xb504f337, 0xb504f334, 0x333, x1, 1672, x3)
+
+inst_488:
+// rs1_val==3037000500 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xb504f776, 0xb504f334, 0x666, x1, 1680, x3)
+
+inst_489:
+// rs1_val==3037000500 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff7, 0xb504f334, -0x2d, x1, 1688, x3)
+
+inst_490:
+// rs1_val==3037000500 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xb504f33d, 0xb504f334, 0x2d, x1, 1696, x3)
+
+inst_491:
+// rs1_val==3037000500 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xb504f336, 0xb504f334, 0x2, x1, 1704, x3)
+
+inst_492:
+// rs1_val==3037000500 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xb504f774, 0xb504f334, 0x554, x1, 1712, x3)
+
+inst_493:
+// rs1_val==3037000500 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xb504f334, 0xb504f334, 0x0, x1, 1720, x3)
+
+inst_494:
+// rs1_val==3037000500 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xb504f334, 0xb504f334, 0x4, x1, 1728, x3)
+
+inst_495:
+// rs1_val==3037000500 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xb504f336, 0xb504f334, 0x332, x1, 1736, x3)
+
+inst_496:
+// rs1_val==3037000500 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xb504f775, 0xb504f334, 0x665, x1, 1744, x3)
+
+inst_497:
+// rs1_val==3037000500 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xb504f33c, 0xb504f334, 0x2c, x1, 1752, x3)
+
+inst_498:
+// rs1_val==3037000500 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xb504f776, 0xb504f334, 0x556, x1, 1760, x3)
+
+inst_499:
+// rs1_val==3037000500 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffbbf, 0xb504f334, -0x555, x1, 1768, x3)
+
+inst_500:
+// rs1_val==3037000500 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xb504f336, 0xb504f334, 0x6, x1, 1776, x3)
+
+inst_501:
+// rs1_val==3037000500 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xb504f334, 0xb504f334, 0x334, x1, 1784, x3)
+
+inst_502:
+// rs1_val==3037000500 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xb504f777, 0xb504f334, 0x667, x1, 1792, x3)
+
+inst_503:
+// rs1_val==3037000500 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff4, 0xb504f334, -0x2c, x1, 1800, x3)
+
+inst_504:
+// rs1_val==3037000500 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xb504f33e, 0xb504f334, 0x2e, x1, 1808, x3)
+
+inst_505:
+// rs1_val==0 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x2, 0x0, 0x2, x1, 1816, x3)
+
+inst_506:
+// rs1_val==0 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x554, 0x0, 0x554, x1, 1824, x3)
+
+inst_507:
+// rs1_val==0 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x0, 0x0, 0x0, x1, 1832, x3)
+
+inst_508:
+// rs1_val==0 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x4, 0x0, 0x4, x1, 1840, x3)
+
+inst_509:
+// rs1_val==0 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x332, 0x0, 0x332, x1, 1848, x3)
+
+inst_510:
+// rs1_val==0 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x665, 0x0, 0x665, x1, 1856, x3)
+
+inst_511:
+// rs1_val==0 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x2c, 0x0, 0x2c, x1, 1864, x3)
+
+inst_512:
+// rs1_val==0 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x556, 0x0, 0x556, x1, 1872, x3)
+
+inst_513:
+// rs1_val==0 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaab, 0x0, -0x555, x1, 1880, x3)
+
+inst_514:
+// rs1_val==0 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x0, 0x6, x1, 1888, x3)
+
+inst_515:
+// rs1_val==0 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x334, 0x0, 0x334, x1, 1896, x3)
+
+inst_516:
+// rs1_val==0 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x0, 0x667, x1, 1904, x3)
+
+inst_517:
+// rs1_val==0 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd4, 0x0, -0x2c, x1, 1912, x3)
+
+inst_518:
+// rs1_val==0 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x0; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x2e, 0x0, 0x2e, x1, 1920, x3)
+
+inst_519:
+// rs1_val==4 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x7, 0x4, 0x3, x1, 1928, x3)
+
+inst_520:
+// rs1_val==4 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x555, 0x4, 0x555, x1, 1936, x3)
+
+inst_521:
+// rs1_val==4 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaae, 0x4, -0x556, x1, 1944, x3)
+
+inst_522:
+// rs1_val==4 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x5, 0x4, 0x5, x1, 1952, x3)
+
+inst_523:
+// rs1_val==4 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x337, 0x4, 0x333, x1, 1960, x3)
+
+inst_524:
+// rs1_val==4 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x666, 0x4, 0x666, x1, 1968, x3)
+
+inst_525:
+// rs1_val==4 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd7, 0x4, -0x2d, x1, 1976, x3)
+
+inst_526:
+// rs1_val==4 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x2d, 0x4, 0x2d, x1, 1984, x3)
+
+inst_527:
+// rs1_val==4 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x4, 0x2, x1, 1992, x3)
+
+inst_528:
+// rs1_val==4 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x554, 0x4, 0x554, x1, 2000, x3)
+
+inst_529:
+// rs1_val==4 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x4, 0x4, 0x4, x1, 2008, x3)
+
+inst_530:
+// rs1_val==4 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x336, 0x4, 0x332, x1, 2016, x3)
+
+inst_531:
+// rs1_val==4 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x665, 0x4, 0x665, x1, 2024, x3)
+
+inst_532:
+// rs1_val==4 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x2c, 0x4, 0x2c, x1, 2032, x3)
+
+inst_533:
+// rs1_val==4 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x556, 0x4, 0x556, x1, 2040, x3)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_534:
+// rs1_val==4 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffaaf, 0x4, -0x555, x1, 0, x3)
+
+inst_535:
+// rs1_val==4 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x6, 0x4, 0x6, x1, 8, x3)
+
+inst_536:
+// rs1_val==4 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x334, 0x4, 0x334, x1, 16, x3)
+
+inst_537:
+// rs1_val==4 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x667, 0x4, 0x667, x1, 24, x3)
+
+inst_538:
+// rs1_val==4 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd4, 0x4, -0x2c, x1, 32, x3)
+
+inst_539:
+// rs1_val==4 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x2e, 0x4, 0x2e, x1, 40, x3)
+
+inst_540:
+// rs1_val==3689348814741910322 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333333, 0x3333333333333332, 0x3, x1, 48, x3)
+
+inst_541:
+// rs1_val==3689348814741910322 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333777, 0x3333333333333332, 0x555, x1, 56, x3)
+
+inst_542:
+// rs1_val==3689348814741910322 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffbba, 0x3333333333333332, -0x556, x1, 64, x3)
+
+inst_543:
+// rs1_val==3689348814741910322 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333337, 0x3333333333333332, 0x5, x1, 72, x3)
+
+inst_544:
+// rs1_val==3689348814741910322 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333333, 0x3333333333333332, 0x333, x1, 80, x3)
+
+inst_545:
+// rs1_val==3689348814741910322 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333776, 0x3333333333333332, 0x666, x1, 88, x3)
+
+inst_546:
+// rs1_val==3689348814741910322 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff3, 0x3333333333333332, -0x2d, x1, 96, x3)
+
+inst_547:
+// rs1_val==3689348814741910322 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x333333333333333f, 0x3333333333333332, 0x2d, x1, 104, x3)
+
+inst_548:
+// rs1_val==3689348814741910322 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333332, 0x3333333333333332, 0x2, x1, 112, x3)
+
+inst_549:
+// rs1_val==3689348814741910322 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333776, 0x3333333333333332, 0x554, x1, 120, x3)
+
+inst_550:
+// rs1_val==3689348814741910322 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333332, 0x3333333333333332, 0x0, x1, 128, x3)
+
+inst_551:
+// rs1_val==3689348814741910322 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333336, 0x3333333333333332, 0x4, x1, 136, x3)
+
+inst_552:
+// rs1_val==3689348814741910322 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333332, 0x3333333333333332, 0x332, x1, 144, x3)
+
+inst_553:
+// rs1_val==3689348814741910322 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333777, 0x3333333333333332, 0x665, x1, 152, x3)
+
+inst_554:
+// rs1_val==3689348814741910322 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x333333333333333e, 0x3333333333333332, 0x2c, x1, 160, x3)
+
+inst_555:
+// rs1_val==3689348814741910322 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333776, 0x3333333333333332, 0x556, x1, 168, x3)
+
+inst_556:
+// rs1_val==3689348814741910322 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffbbb, 0x3333333333333332, -0x555, x1, 176, x3)
+
+inst_557:
+// rs1_val==3689348814741910322 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333336, 0x3333333333333332, 0x6, x1, 184, x3)
+
+inst_558:
+// rs1_val==3689348814741910322 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333336, 0x3333333333333332, 0x334, x1, 192, x3)
+
+inst_559:
+// rs1_val==3689348814741910322 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x3333333333333777, 0x3333333333333332, 0x667, x1, 200, x3)
+
+inst_560:
+// rs1_val==3689348814741910322 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff6, 0x3333333333333332, -0x2c, x1, 208, x3)
+
+inst_561:
+// rs1_val==3689348814741910322 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x333333333333333e, 0x3333333333333332, 0x2e, x1, 216, x3)
+
+inst_562:
+// rs1_val==7378697629483820645 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666665, 0x3, x1, 224, x3)
+
+inst_563:
+// rs1_val==7378697629483820645 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666775, 0x6666666666666665, 0x555, x1, 232, x3)
+
+inst_564:
+// rs1_val==7378697629483820645 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffeef, 0x6666666666666665, -0x556, x1, 240, x3)
+
+inst_565:
+// rs1_val==7378697629483820645 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666665, 0x6666666666666665, 0x5, x1, 248, x3)
+
+inst_566:
+// rs1_val==7378697629483820645 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666777, 0x6666666666666665, 0x333, x1, 256, x3)
+
+inst_567:
+// rs1_val==7378697629483820645 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666665, 0x666, x1, 264, x3)
+
+inst_568:
+// rs1_val==7378697629483820645 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff7, 0x6666666666666665, -0x2d, x1, 272, x3)
+
+inst_569:
+// rs1_val==7378697629483820645 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x666666666666666d, 0x6666666666666665, 0x2d, x1, 280, x3)
+
+inst_570:
+// rs1_val==7378697629483820645 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666665, 0x2, x1, 288, x3)
+
+inst_571:
+// rs1_val==7378697629483820645 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666775, 0x6666666666666665, 0x554, x1, 296, x3)
+
+inst_572:
+// rs1_val==7378697629483820645 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666665, 0x6666666666666665, 0x0, x1, 304, x3)
+
+inst_573:
+// rs1_val==7378697629483820645 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666665, 0x6666666666666665, 0x4, x1, 312, x3)
+
+inst_574:
+// rs1_val==7378697629483820645 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666777, 0x6666666666666665, 0x332, x1, 320, x3)
+
+inst_575:
+// rs1_val==7378697629483820645 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666665, 0x6666666666666665, 0x665, x1, 328, x3)
+
+inst_576:
+// rs1_val==7378697629483820645 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0x666666666666666d, 0x6666666666666665, 0x2c, x1, 336, x3)
+
+inst_577:
+// rs1_val==7378697629483820645 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666777, 0x6666666666666665, 0x556, x1, 344, x3)
+
+inst_578:
+// rs1_val==7378697629483820645 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffeef, 0x6666666666666665, -0x555, x1, 352, x3)
+
+inst_579:
+// rs1_val==7378697629483820645 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666665, 0x6, x1, 360, x3)
+
+inst_580:
+// rs1_val==7378697629483820645 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666775, 0x6666666666666665, 0x334, x1, 368, x3)
+
+inst_581:
+// rs1_val==7378697629483820645 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0x6666666666666667, 0x6666666666666665, 0x667, x1, 376, x3)
+
+inst_582:
+// rs1_val==7378697629483820645 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff5, 0x6666666666666665, -0x2c, x1, 384, x3)
+
+inst_583:
+// rs1_val==7378697629483820645 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0x666666666666666f, 0x6666666666666665, 0x2e, x1, 392, x3)
+
+inst_584:
+// rs1_val==3037000498 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0xb504f333, 0xb504f332, 0x3, x1, 400, x3)
+
+inst_585:
+// rs1_val==3037000498 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0xb504f777, 0xb504f332, 0x555, x1, 408, x3)
+
+inst_586:
+// rs1_val==3037000498 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffbba, 0xb504f332, -0x556, x1, 416, x3)
+
+inst_587:
+// rs1_val==3037000498 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0xb504f337, 0xb504f332, 0x5, x1, 424, x3)
+
+inst_588:
+// rs1_val==3037000498 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0xb504f333, 0xb504f332, 0x333, x1, 432, x3)
+
+inst_589:
+// rs1_val==3037000498 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0xb504f776, 0xb504f332, 0x666, x1, 440, x3)
+
+inst_590:
+// rs1_val==3037000498 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff3, 0xb504f332, -0x2d, x1, 448, x3)
+
+inst_591:
+// rs1_val==3037000498 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0xb504f33f, 0xb504f332, 0x2d, x1, 456, x3)
+
+inst_592:
+// rs1_val==3037000498 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0xb504f332, 0xb504f332, 0x2, x1, 464, x3)
+
+inst_593:
+// rs1_val==3037000498 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0xb504f776, 0xb504f332, 0x554, x1, 472, x3)
+
+inst_594:
+// rs1_val==3037000498 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0xb504f332, 0xb504f332, 0x0, x1, 480, x3)
+
+inst_595:
+// rs1_val==3037000498 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0xb504f336, 0xb504f332, 0x4, x1, 488, x3)
+
+inst_596:
+// rs1_val==3037000498 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0xb504f332, 0xb504f332, 0x332, x1, 496, x3)
+
+inst_597:
+// rs1_val==3037000498 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0xb504f777, 0xb504f332, 0x665, x1, 504, x3)
+
+inst_598:
+// rs1_val==3037000498 and imm_val==44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2c
+TEST_IMM_OP( ori, x11, x10, 0xb504f33e, 0xb504f332, 0x2c, x1, 512, x3)
+
+inst_599:
+// rs1_val==3037000498 and imm_val==1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x556
+TEST_IMM_OP( ori, x11, x10, 0xb504f776, 0xb504f332, 0x556, x1, 520, x3)
+
+inst_600:
+// rs1_val==3037000498 and imm_val==-1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x555
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffbbb, 0xb504f332, -0x555, x1, 528, x3)
+
+inst_601:
+// rs1_val==3037000498 and imm_val==6,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x6
+TEST_IMM_OP( ori, x11, x10, 0xb504f336, 0xb504f332, 0x6, x1, 536, x3)
+
+inst_602:
+// rs1_val==3037000498 and imm_val==820,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x334
+TEST_IMM_OP( ori, x11, x10, 0xb504f336, 0xb504f332, 0x334, x1, 544, x3)
+
+inst_603:
+// rs1_val==3037000498 and imm_val==1639,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x667
+TEST_IMM_OP( ori, x11, x10, 0xb504f777, 0xb504f332, 0x667, x1, 552, x3)
+
+inst_604:
+// rs1_val==3037000498 and imm_val==-44,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x2c
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffff6, 0xb504f332, -0x2c, x1, 560, x3)
+
+inst_605:
+// rs1_val==3037000498 and imm_val==46,
+// opcode: ori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2e
+TEST_IMM_OP( ori, x11, x10, 0xb504f33e, 0xb504f332, 0x2e, x1, 568, x3)
+
+inst_606:
+// rs1_val==6148914691236517206 and imm_val==3,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x3
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555557, 0x5555555555555556, 0x3, x1, 576, x3)
+
+inst_607:
+// rs1_val==6148914691236517206 and imm_val==1365,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x555
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555557, 0x5555555555555556, 0x555, x1, 584, x3)
+
+inst_608:
+// rs1_val==6148914691236517206 and imm_val==-1366,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x556
+TEST_IMM_OP( ori, x11, x10, 0xfffffffffffffffe, 0x5555555555555556, -0x556, x1, 592, x3)
+
+inst_609:
+// rs1_val==6148914691236517206 and imm_val==5,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x5
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555557, 0x5555555555555556, 0x5, x1, 600, x3)
+
+inst_610:
+// rs1_val==6148914691236517206 and imm_val==819,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x333
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555777, 0x5555555555555556, 0x333, x1, 608, x3)
+
+inst_611:
+// rs1_val==6148914691236517206 and imm_val==1638,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x666
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555776, 0x5555555555555556, 0x666, x1, 616, x3)
+
+inst_612:
+// rs1_val==6148914691236517206 and imm_val==-45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x2d
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffd7, 0x5555555555555556, -0x2d, x1, 624, x3)
+
+inst_613:
+// rs1_val==6148914691236517206 and imm_val==45,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2d
+TEST_IMM_OP( ori, x11, x10, 0x555555555555557f, 0x5555555555555556, 0x2d, x1, 632, x3)
+
+inst_614:
+// rs1_val==6148914691236517206 and imm_val==2,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555556, 0x5555555555555556, 0x2, x1, 640, x3)
+
+inst_615:
+// rs1_val==6148914691236517206 and imm_val==1364,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x554
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555556, 0x5555555555555556, 0x554, x1, 648, x3)
+
+inst_616:
+// rs1_val==6148914691236517206 and imm_val==0,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x0
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555556, 0x5555555555555556, 0x0, x1, 656, x3)
+
+inst_617:
+// rs1_val==6148914691236517206 and imm_val==4,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x4
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555556, 0x5555555555555556, 0x4, x1, 664, x3)
+
+inst_618:
+// rs1_val==6148914691236517206 and imm_val==818,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x332
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555776, 0x5555555555555556, 0x332, x1, 672, x3)
+
+inst_619:
+// rs1_val==6148914691236517206 and imm_val==1637,
+// opcode: ori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x665
+TEST_IMM_OP( ori, x11, x10, 0x5555555555555777, 0x5555555555555556, 0x665, x1, 680, x3)
+
+inst_620:
+// imm_val == 1, rs1_val > 0 and imm_val > 0
+// opcode: ori ; op1:x10; dest:x11; op1val:0x4; immval:0x1
+TEST_IMM_OP( ori, x11, x10, 0x5, 0x4, 0x1, x1, 688, x3)
+
+inst_621:
+// rs1_val < 0 and imm_val < 0, rs1_val == -2097153, imm_val == -9
+// opcode: ori ; op1:x10; dest:x11; op1val:-0x200001; immval:-0x9
+TEST_IMM_OP( ori, x11, x10, 0xffffffffffffffff, -0x200001, -0x9, x1, 696, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x11_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x11_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 88*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/sb-align-01.S b/riscof/suite/rv64i_m/I/sb-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..7d33accada7320cfa8daddb2096bb0762960985b
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/sb-align-01.S
@@ -0,0 +1,749 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sb instruction of the RISC-V I extension for the sb-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sb-align)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 != rs2, rs1==x12, rs2==x0, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, ea_align == 0 and (imm_val % 4) == 0, imm_val > 0
+// opcode: sb; op1:x12; op2:x0; op2val:0x0; immval:0x4; align:0
+TEST_STORE(x1,x10,0,x12,x0,0x0,0x4,0,sb,0)
+
+inst_1:
+// rs1==x11, rs2==x14, rs2_val == 0, ea_align == 0 and (imm_val % 4) == 1
+// opcode: sb; op1:x11; op2:x14; op2val:0x0; immval:0x555; align:0
+TEST_STORE(x1,x10,0,x11,x14,0x0,0x555,8,sb,0)
+
+inst_2:
+// rs1==x9, rs2==x16, rs2_val == (2**(xlen-1)-1), imm_val < 0, ea_align == 0 and (imm_val % 4) == 2, rs2_val == 9223372036854775807
+// opcode: sb; op1:x9; op2:x16; op2val:0x7fffffffffffffff; immval:-0xa; align:0
+TEST_STORE(x1,x10,0,x9,x16,0x7fffffffffffffff,-0xa,16,sb,0)
+
+inst_3:
+// rs1==x8, rs2==x20, rs2_val == 1,
+// opcode: sb; op1:x8; op2:x20; op2val:0x1; immval:0x10; align:0
+TEST_STORE(x1,x10,0,x8,x20,0x1,0x10,24,sb,0)
+
+inst_4:
+// rs1==x14, rs2==x4, ea_align == 0 and (imm_val % 4) == 3,
+// opcode: sb; op1:x14; op2:x4; op2val:-0x4000000000000000; immval:-0x201; align:0
+TEST_STORE(x1,x10,0,x14,x4,-0x4000000000000000,-0x201,32,sb,0)
+
+inst_5:
+// rs1==x23, rs2==x15, ea_align == 2 and (imm_val % 4) == 0, rs2_val == 274877906944
+// opcode: sb; op1:x23; op2:x15; op2val:0x4000000000; immval:0x400; align:2
+TEST_STORE(x1,x10,0,x23,x15,0x4000000000,0x400,40,sb,2)
+
+inst_6:
+// rs1==x20, rs2==x7, ea_align == 2 and (imm_val % 4) == 1, rs2_val == -536870913
+// opcode: sb; op1:x20; op2:x7; op2val:-0x20000001; immval:0x1; align:2
+TEST_STORE(x1,x10,0,x20,x7,-0x20000001,0x1,48,sb,2)
+
+inst_7:
+// rs1==x16, rs2==x28, ea_align == 2 and (imm_val % 4) == 2, rs2_val == -1048577
+// opcode: sb; op1:x16; op2:x28; op2val:-0x100001; immval:-0xa; align:2
+TEST_STORE(x1,x10,0,x16,x28,-0x100001,-0xa,56,sb,2)
+
+inst_8:
+// rs1==x5, rs2==x22, ea_align == 2 and (imm_val % 4) == 3,
+// opcode: sb; op1:x5; op2:x22; op2val:0x5; immval:0x7; align:2
+TEST_STORE(x1,x10,0,x5,x22,0x5,0x7,64,sb,2)
+
+inst_9:
+// rs1==x24, rs2==x3, ea_align == 1 and (imm_val % 4) == 0, rs2_val == -268435457
+// opcode: sb; op1:x24; op2:x3; op2val:-0x10000001; immval:0x40; align:1
+TEST_STORE(x1,x10,0,x24,x3,-0x10000001,0x40,72,sb,1)
+
+inst_10:
+// rs1==x15, rs2==x19, ea_align == 1 and (imm_val % 4) == 1, rs2_val == -72057594037927937
+// opcode: sb; op1:x15; op2:x19; op2val:-0x100000000000001; immval:0x9; align:1
+TEST_STORE(x1,x10,0,x15,x19,-0x100000000000001,0x9,80,sb,1)
+
+inst_11:
+// rs1==x29, rs2==x26, ea_align == 1 and (imm_val % 4) == 2, rs2_val == 288230376151711744
+// opcode: sb; op1:x29; op2:x26; op2val:0x400000000000000; immval:0x2; align:1
+TEST_STORE(x1,x10,0,x29,x26,0x400000000000000,0x2,88,sb,1)
+
+inst_12:
+// rs1==x17, rs2==x25, ea_align == 1 and (imm_val % 4) == 3, rs2_val == 68719476736
+// opcode: sb; op1:x17; op2:x25; op2val:0x1000000000; immval:-0x5; align:1
+TEST_STORE(x1,x10,0,x17,x25,0x1000000000,-0x5,96,sb,1)
+
+inst_13:
+// rs1==x13, rs2==x21, ea_align == 3 and (imm_val % 4) == 0,
+// opcode: sb; op1:x13; op2:x21; op2val:0x7fffffffffffffff; immval:0x40; align:3
+TEST_STORE(x1,x10,0,x13,x21,0x7fffffffffffffff,0x40,104,sb,3)
+
+inst_14:
+// rs1==x26, rs2==x12, ea_align == 3 and (imm_val % 4) == 1, rs2_val == -1099511627777
+// opcode: sb; op1:x26; op2:x12; op2val:-0x10000000001; immval:0x1; align:3
+TEST_STORE(x1,x10,0,x26,x12,-0x10000000001,0x1,112,sb,3)
+
+inst_15:
+// rs1==x19, rs2==x29, ea_align == 3 and (imm_val % 4) == 2, rs2_val == -17
+// opcode: sb; op1:x19; op2:x29; op2val:-0x11; immval:-0x556; align:3
+TEST_STORE(x1,x10,0,x19,x29,-0x11,-0x556,120,sb,3)
+
+inst_16:
+// rs1==x6, rs2==x18, ea_align == 3 and (imm_val % 4) == 3, rs2_val == -549755813889
+// opcode: sb; op1:x6; op2:x18; op2val:-0x8000000001; immval:-0x11; align:3
+TEST_STORE(x1,x10,0,x6,x18,-0x8000000001,-0x11,128,sb,3)
+
+inst_17:
+// rs1==x4, rs2==x27, imm_val == 0, rs2_val == 134217728
+// opcode: sb; op1:x4; op2:x27; op2val:0x8000000; immval:0x0; align:0
+TEST_STORE(x1,x10,0,x4,x27,0x8000000,0x0,136,sb,0)
+
+inst_18:
+// rs1==x28, rs2==x11, rs2_val == 2,
+// opcode: sb; op1:x28; op2:x11; op2val:0x2; immval:-0x3; align:0
+TEST_STORE(x1,x10,0,x28,x11,0x2,-0x3,144,sb,0)
+
+inst_19:
+// rs1==x2, rs2==x5, rs2_val == 4,
+// opcode: sb; op1:x2; op2:x5; op2val:0x4; immval:0x5; align:0
+TEST_STORE(x1,x10,0,x2,x5,0x4,0x5,152,sb,0)
+
+inst_20:
+// rs1==x27, rs2==x2, rs2_val == 8,
+// opcode: sb; op1:x27; op2:x2; op2val:0x8; immval:0x555; align:0
+TEST_STORE(x1,x4,0,x27,x2,0x8,0x555,160,sb,0)
+
+inst_21:
+// rs1==x3, rs2==x6, rs2_val == 16,
+// opcode: sb; op1:x3; op2:x6; op2val:0x10; immval:-0x3; align:0
+TEST_STORE(x1,x4,0,x3,x6,0x10,-0x3,168,sb,0)
+
+inst_22:
+// rs1==x31, rs2==x8, rs2_val == 32,
+// opcode: sb; op1:x31; op2:x8; op2val:0x20; immval:0x80; align:0
+TEST_STORE(x1,x4,0,x31,x8,0x20,0x80,176,sb,0)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_23:
+// rs1==x7, rs2==x30, rs2_val == 64,
+// opcode: sb; op1:x7; op2:x30; op2val:0x40; immval:-0x2; align:0
+TEST_STORE(x2,x4,0,x7,x30,0x40,-0x2,0,sb,0)
+
+inst_24:
+// rs1==x18, rs2==x9, rs2_val == 128,
+// opcode: sb; op1:x18; op2:x9; op2val:0x80; immval:0x7ff; align:0
+TEST_STORE(x2,x4,0,x18,x9,0x80,0x7ff,8,sb,0)
+
+inst_25:
+// rs1==x22, rs2==x23, rs2_val == 256,
+// opcode: sb; op1:x22; op2:x23; op2val:0x100; immval:-0x11; align:0
+TEST_STORE(x2,x4,0,x22,x23,0x100,-0x11,16,sb,0)
+
+inst_26:
+// rs1==x21, rs2==x17, rs2_val == 512,
+// opcode: sb; op1:x21; op2:x17; op2val:0x200; immval:0x7; align:0
+TEST_STORE(x2,x4,0,x21,x17,0x200,0x7,24,sb,0)
+
+inst_27:
+// rs1==x1, rs2==x24, rs2_val == 1024,
+// opcode: sb; op1:x1; op2:x24; op2val:0x400; immval:0x400; align:0
+TEST_STORE(x2,x4,0,x1,x24,0x400,0x400,32,sb,0)
+
+inst_28:
+// rs1==x25, rs2==x31, rs2_val == 2048,
+// opcode: sb; op1:x25; op2:x31; op2val:0x800; immval:0x80; align:0
+TEST_STORE(x2,x4,0,x25,x31,0x800,0x80,40,sb,0)
+
+inst_29:
+// rs1==x30, rs2==x10, rs2_val == 4096,
+// opcode: sb; op1:x30; op2:x10; op2val:0x1000; immval:0x8; align:0
+TEST_STORE(x2,x4,0,x30,x10,0x1000,0x8,48,sb,0)
+
+inst_30:
+// rs1==x10, rs2==x13, rs2_val == 8192,
+// opcode: sb; op1:x10; op2:x13; op2val:0x2000; immval:-0x6; align:0
+TEST_STORE(x2,x4,0,x10,x13,0x2000,-0x6,56,sb,0)
+
+inst_31:
+// rs2==x1, rs2_val == 16384,
+// opcode: sb; op1:x23; op2:x1; op2val:0x4000; immval:0x5; align:0
+TEST_STORE(x2,x4,0,x23,x1,0x4000,0x5,64,sb,0)
+
+inst_32:
+// rs2_val == 32768,
+// opcode: sb; op1:x10; op2:x11; op2val:0x8000; immval:0x7ff; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x8000,0x7ff,72,sb,0)
+
+inst_33:
+// rs2_val == 65536,
+// opcode: sb; op1:x10; op2:x11; op2val:0x10000; immval:-0x6; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x10000,-0x6,80,sb,0)
+
+inst_34:
+// rs2_val == 131072,
+// opcode: sb; op1:x10; op2:x11; op2val:0x20000; immval:0x100; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x20000,0x100,88,sb,0)
+
+inst_35:
+// rs2_val == 262144,
+// opcode: sb; op1:x10; op2:x11; op2val:0x40000; immval:0x6; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x40000,0x6,96,sb,0)
+
+inst_36:
+// rs2_val == 524288,
+// opcode: sb; op1:x10; op2:x11; op2val:0x80000; immval:0x3ff; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x80000,0x3ff,104,sb,0)
+
+inst_37:
+// rs2_val == 1048576,
+// opcode: sb; op1:x10; op2:x11; op2val:0x100000; immval:0x10; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x100000,0x10,112,sb,0)
+
+inst_38:
+// rs2_val == 2097152,
+// opcode: sb; op1:x10; op2:x11; op2val:0x200000; immval:-0x400; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x200000,-0x400,120,sb,0)
+
+inst_39:
+// rs2_val == 4194304,
+// opcode: sb; op1:x10; op2:x11; op2val:0x400000; immval:-0x2; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x400000,-0x2,128,sb,0)
+
+inst_40:
+// rs2_val == 8388608,
+// opcode: sb; op1:x10; op2:x11; op2val:0x800000; immval:-0x800; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x800000,-0x800,136,sb,0)
+
+inst_41:
+// rs2_val == 16777216,
+// opcode: sb; op1:x10; op2:x11; op2val:0x1000000; immval:-0x11; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x1000000,-0x11,144,sb,0)
+
+inst_42:
+// rs2_val == 33554432,
+// opcode: sb; op1:x10; op2:x11; op2val:0x2000000; immval:-0x2; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x2000000,-0x2,152,sb,0)
+
+inst_43:
+// rs2_val == 67108864,
+// opcode: sb; op1:x10; op2:x11; op2val:0x4000000; immval:-0x21; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x4000000,-0x21,160,sb,0)
+
+inst_44:
+// rs2_val == 268435456,
+// opcode: sb; op1:x10; op2:x11; op2val:0x10000000; immval:0x9; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x10000000,0x9,168,sb,0)
+
+inst_45:
+// rs2_val == 536870912,
+// opcode: sb; op1:x10; op2:x11; op2val:0x20000000; immval:0x200; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x20000000,0x200,176,sb,0)
+
+inst_46:
+// rs2_val == 1073741824,
+// opcode: sb; op1:x10; op2:x11; op2val:0x40000000; immval:-0x9; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x40000000,-0x9,184,sb,0)
+
+inst_47:
+// rs2_val == 2147483648,
+// opcode: sb; op1:x10; op2:x11; op2val:0x80000000; immval:-0x11; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x80000000,-0x11,192,sb,0)
+
+inst_48:
+// rs2_val == 4294967296,
+// opcode: sb; op1:x10; op2:x11; op2val:0x100000000; immval:0x2; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x100000000,0x2,200,sb,0)
+
+inst_49:
+// rs2_val == 8589934592,
+// opcode: sb; op1:x10; op2:x11; op2val:0x200000000; immval:0x5; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x200000000,0x5,208,sb,0)
+
+inst_50:
+// rs2_val == 17179869184,
+// opcode: sb; op1:x10; op2:x11; op2val:0x400000000; immval:0x6; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x400000000,0x6,216,sb,0)
+
+inst_51:
+// rs2_val == 34359738368,
+// opcode: sb; op1:x10; op2:x11; op2val:0x800000000; immval:-0x401; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x800000000,-0x401,224,sb,0)
+
+inst_52:
+// rs2_val == 137438953472,
+// opcode: sb; op1:x10; op2:x11; op2val:0x2000000000; immval:0x20; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x2000000000,0x20,232,sb,0)
+
+inst_53:
+// rs2_val == 549755813888,
+// opcode: sb; op1:x10; op2:x11; op2val:0x8000000000; immval:0x400; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x8000000000,0x400,240,sb,0)
+
+inst_54:
+// rs2_val == 1099511627776,
+// opcode: sb; op1:x10; op2:x11; op2val:0x10000000000; immval:-0x800; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x10000000000,-0x800,248,sb,0)
+
+inst_55:
+// rs2_val == 2199023255552,
+// opcode: sb; op1:x10; op2:x11; op2val:0x20000000000; immval:0x80; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x20000000000,0x80,256,sb,0)
+
+inst_56:
+// rs2_val == 4398046511104,
+// opcode: sb; op1:x10; op2:x11; op2val:0x40000000000; immval:0x7ff; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x40000000000,0x7ff,264,sb,0)
+
+inst_57:
+// rs2_val == 8796093022208,
+// opcode: sb; op1:x10; op2:x11; op2val:0x80000000000; immval:-0x101; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x80000000000,-0x101,272,sb,0)
+
+inst_58:
+// rs2_val == 17592186044416,
+// opcode: sb; op1:x10; op2:x11; op2val:0x100000000000; immval:0x7ff; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x100000000000,0x7ff,280,sb,0)
+
+inst_59:
+// rs2_val == 35184372088832,
+// opcode: sb; op1:x10; op2:x11; op2val:0x200000000000; immval:-0x1; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x200000000000,-0x1,288,sb,0)
+
+inst_60:
+// rs2_val == 70368744177664,
+// opcode: sb; op1:x10; op2:x11; op2val:0x400000000000; immval:0x7ff; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x400000000000,0x7ff,296,sb,0)
+
+inst_61:
+// rs2_val == 140737488355328,
+// opcode: sb; op1:x10; op2:x11; op2val:0x800000000000; immval:-0x11; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x800000000000,-0x11,304,sb,0)
+
+inst_62:
+// rs2_val == 281474976710656,
+// opcode: sb; op1:x10; op2:x11; op2val:0x1000000000000; immval:0x20; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x1000000000000,0x20,312,sb,0)
+
+inst_63:
+// rs2_val == 562949953421312,
+// opcode: sb; op1:x10; op2:x11; op2val:0x2000000000000; immval:-0x6; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x2000000000000,-0x6,320,sb,0)
+
+inst_64:
+// rs2_val == 1125899906842624,
+// opcode: sb; op1:x10; op2:x11; op2val:0x4000000000000; immval:-0x9; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x4000000000000,-0x9,328,sb,0)
+
+inst_65:
+// rs2_val == 2251799813685248,
+// opcode: sb; op1:x10; op2:x11; op2val:0x8000000000000; immval:-0x6; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x8000000000000,-0x6,336,sb,0)
+
+inst_66:
+// rs2_val == 4503599627370496,
+// opcode: sb; op1:x10; op2:x11; op2val:0x10000000000000; immval:-0x201; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x10000000000000,-0x201,344,sb,0)
+
+inst_67:
+// rs2_val == 9007199254740992,
+// opcode: sb; op1:x10; op2:x11; op2val:0x20000000000000; immval:-0x4; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x20000000000000,-0x4,352,sb,0)
+
+inst_68:
+// rs2_val == 18014398509481984,
+// opcode: sb; op1:x10; op2:x11; op2val:0x40000000000000; immval:-0x9; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x40000000000000,-0x9,360,sb,0)
+
+inst_69:
+// rs2_val == 36028797018963968,
+// opcode: sb; op1:x10; op2:x11; op2val:0x80000000000000; immval:-0x556; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x80000000000000,-0x556,368,sb,0)
+
+inst_70:
+// rs2_val == 72057594037927936,
+// opcode: sb; op1:x10; op2:x11; op2val:0x100000000000000; immval:0x1; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x100000000000000,0x1,376,sb,0)
+
+inst_71:
+// rs2_val == -4398046511105,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x40000000001; immval:-0x556; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x40000000001,-0x556,384,sb,0)
+
+inst_72:
+// rs2_val == -8796093022209,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x80000000001; immval:-0x101; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x80000000001,-0x101,392,sb,0)
+
+inst_73:
+// rs2_val == -17592186044417,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x100000000001; immval:0x3; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x100000000001,0x3,400,sb,0)
+
+inst_74:
+// rs2_val == -35184372088833,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x200000000001; immval:-0x201; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x200000000001,-0x201,408,sb,0)
+
+inst_75:
+// rs2_val == -70368744177665,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x400000000001; immval:-0x4; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x400000000001,-0x4,416,sb,0)
+
+inst_76:
+// rs2_val == -140737488355329,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x800000000001; immval:-0x5; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x800000000001,-0x5,424,sb,0)
+
+inst_77:
+// rs2_val == -281474976710657,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x1000000000001; immval:0x1; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x1000000000001,0x1,432,sb,0)
+
+inst_78:
+// rs2_val == -562949953421313,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x2000000000001; immval:0x3ff; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x2000000000001,0x3ff,440,sb,0)
+
+inst_79:
+// rs2_val == -1125899906842625,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x4000000000001; immval:0x9; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x4000000000001,0x9,448,sb,0)
+
+inst_80:
+// rs2_val == -2251799813685249,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x8000000000001; immval:-0x5; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x8000000000001,-0x5,456,sb,0)
+
+inst_81:
+// rs2_val == -4503599627370497,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x10000000000001; immval:-0x1; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x10000000000001,-0x1,464,sb,0)
+
+inst_82:
+// rs2_val == -9007199254740993,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x20000000000001; immval:-0x4; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x20000000000001,-0x4,472,sb,0)
+
+inst_83:
+// rs2_val == -18014398509481985,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x40000000000001; immval:0x10; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x40000000000001,0x10,480,sb,0)
+
+inst_84:
+// rs2_val == -36028797018963969,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x80000000000001; immval:0x555; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x80000000000001,0x555,488,sb,0)
+
+inst_85:
+// rs2_val == -144115188075855873,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x200000000000001; immval:-0x4; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x200000000000001,-0x4,496,sb,0)
+
+inst_86:
+// rs2_val == -288230376151711745,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x400000000000001; immval:-0x556; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x400000000000001,-0x556,504,sb,0)
+
+inst_87:
+// rs2_val == -576460752303423489,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x800000000000001; immval:0x100; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x800000000000001,0x100,512,sb,0)
+
+inst_88:
+// rs2_val == -1152921504606846977,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x1000000000000001; immval:0x40; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x1000000000000001,0x40,520,sb,0)
+
+inst_89:
+// rs2_val == -2305843009213693953,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x2000000000000001; immval:-0x101; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x2000000000000001,-0x101,528,sb,0)
+
+inst_90:
+// rs2_val == -4611686018427387905,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x4000000000000001; immval:0x6; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x4000000000000001,0x6,536,sb,0)
+
+inst_91:
+// rs2_val == 6148914691236517205,
+// opcode: sb; op1:x10; op2:x11; op2val:0x5555555555555555; immval:0x7ff; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x5555555555555555,0x7ff,544,sb,0)
+
+inst_92:
+// rs2_val == -6148914691236517206,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x5555555555555556; immval:-0x8; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x5555555555555556,-0x8,552,sb,0)
+
+inst_93:
+// rs2_val == 144115188075855872,
+// opcode: sb; op1:x10; op2:x11; op2val:0x200000000000000; immval:-0x101; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x200000000000000,-0x101,560,sb,0)
+
+inst_94:
+// rs2_val == 576460752303423488,
+// opcode: sb; op1:x10; op2:x11; op2val:0x800000000000000; immval:0x1; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x800000000000000,0x1,568,sb,0)
+
+inst_95:
+// rs2_val == 1152921504606846976,
+// opcode: sb; op1:x10; op2:x11; op2val:0x1000000000000000; immval:-0x800; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x1000000000000000,-0x800,576,sb,0)
+
+inst_96:
+// rs2_val == 2305843009213693952,
+// opcode: sb; op1:x10; op2:x11; op2val:0x2000000000000000; immval:-0x5; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x2000000000000000,-0x5,584,sb,0)
+
+inst_97:
+// rs2_val == 4611686018427387904,
+// opcode: sb; op1:x10; op2:x11; op2val:0x4000000000000000; immval:0x1; align:0
+TEST_STORE(x2,x4,0,x10,x11,0x4000000000000000,0x1,592,sb,0)
+
+inst_98:
+// rs2_val == -2,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x2; immval:-0xa; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x2,-0xa,600,sb,0)
+
+inst_99:
+// rs2_val == -3,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x3; immval:-0x9; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x3,-0x9,608,sb,0)
+
+inst_100:
+// rs2_val == -5,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x5; immval:0x80; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x5,0x80,616,sb,0)
+
+inst_101:
+// rs2_val == -9,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x9; immval:0x200; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x9,0x200,624,sb,0)
+
+inst_102:
+// rs2_val == -33,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x21; immval:0x20; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x21,0x20,632,sb,0)
+
+inst_103:
+// rs2_val == -65,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x41; immval:-0x400; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x41,-0x400,640,sb,0)
+
+inst_104:
+// rs2_val == -129,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x81; immval:0x3; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x81,0x3,648,sb,0)
+
+inst_105:
+// rs2_val == -257,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x101; immval:-0x556; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x101,-0x556,656,sb,0)
+
+inst_106:
+// rs2_val == -513,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x201; immval:-0x800; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x201,-0x800,664,sb,0)
+
+inst_107:
+// rs2_val == -1025,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x401; immval:0x5; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x401,0x5,672,sb,0)
+
+inst_108:
+// rs2_val == -2049,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x801; immval:0x0; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x801,0x0,680,sb,0)
+
+inst_109:
+// rs2_val == -4097,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x1001; immval:0x1; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x1001,0x1,688,sb,0)
+
+inst_110:
+// rs2_val == -8193,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x2001; immval:0x3ff; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x2001,0x3ff,696,sb,0)
+
+inst_111:
+// rs2_val == -16385,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x4001; immval:0x6; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x4001,0x6,704,sb,0)
+
+inst_112:
+// rs2_val == -32769,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x8001; immval:0x0; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x8001,0x0,712,sb,0)
+
+inst_113:
+// rs2_val == -65537,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x10001; immval:-0x5; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x10001,-0x5,720,sb,0)
+
+inst_114:
+// rs2_val == -131073,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x20001; immval:-0x81; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x20001,-0x81,728,sb,0)
+
+inst_115:
+// rs2_val == -262145,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x40001; immval:-0x201; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x40001,-0x201,736,sb,0)
+
+inst_116:
+// rs2_val == -524289,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x80001; immval:-0x21; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x80001,-0x21,744,sb,0)
+
+inst_117:
+// rs2_val == -2097153,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x200001; immval:-0x556; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x200001,-0x556,752,sb,0)
+
+inst_118:
+// rs2_val == -4194305,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x400001; immval:0x6; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x400001,0x6,760,sb,0)
+
+inst_119:
+// rs2_val == -8388609,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x800001; immval:0x555; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x800001,0x555,768,sb,0)
+
+inst_120:
+// rs2_val == -16777217,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x1000001; immval:-0x401; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x1000001,-0x401,776,sb,0)
+
+inst_121:
+// rs2_val == -33554433,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x2000001; immval:-0x201; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x2000001,-0x201,784,sb,0)
+
+inst_122:
+// rs2_val == -67108865,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x4000001; immval:-0xa; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x4000001,-0xa,792,sb,0)
+
+inst_123:
+// rs2_val == -134217729,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x8000001; immval:-0x2; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x8000001,-0x2,800,sb,0)
+
+inst_124:
+// rs2_val == -1073741825,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x40000001; immval:0x5; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x40000001,0x5,808,sb,0)
+
+inst_125:
+// rs2_val == -2147483649,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x80000001; immval:-0x11; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x80000001,-0x11,816,sb,0)
+
+inst_126:
+// rs2_val == -4294967297,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x100000001; immval:-0x11; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x100000001,-0x11,824,sb,0)
+
+inst_127:
+// rs2_val == -8589934593,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x200000001; immval:-0x81; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x200000001,-0x81,832,sb,0)
+
+inst_128:
+// rs2_val == -17179869185,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x400000001; immval:-0x101; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x400000001,-0x101,840,sb,0)
+
+inst_129:
+// rs2_val == -34359738369,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x800000001; immval:-0xa; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x800000001,-0xa,848,sb,0)
+
+inst_130:
+// rs2_val == -68719476737,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x1000000001; immval:-0x800; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x1000000001,-0x800,856,sb,0)
+
+inst_131:
+// rs2_val == -137438953473,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x2000000001; immval:0x10; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x2000000001,0x10,864,sb,0)
+
+inst_132:
+// rs2_val == -274877906945,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x4000000001; immval:0x20; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x4000000001,0x20,872,sb,0)
+
+inst_133:
+// rs2_val == -2199023255553,
+// opcode: sb; op1:x10; op2:x11; op2val:-0x20000000001; immval:0x1; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x20000000001,0x1,880,sb,0)
+
+inst_134:
+// rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, ea_align == 0 and (imm_val % 4) == 0, imm_val > 0
+// opcode: sb; op1:x10; op2:x11; op2val:-0x8000000000000000; immval:0x4; align:0
+TEST_STORE(x2,x4,0,x10,x11,-0x8000000000000000,0x4,888,sb,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 23*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 112*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/sd-align-01.S b/riscof/suite/rv64i_m/I/sd-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..df36a3486c99dbd200ec7d361528f04eb1d7ce4f
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/sd-align-01.S
@@ -0,0 +1,734 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sd instruction of the RISC-V I extension for the sd-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*);def TEST_CASE_1=True;",sd-align)
+
+RVTEST_SIGBASE( x23,signature_x23_1)
+
+inst_0:
+// rs1 != rs2, rs1==x7, rs2==x25, rs2_val == (-2**(xlen-1)), ea_align == 0 and (imm_val % 8) == 6, rs2_val == -9223372036854775808, imm_val < 0
+// opcode: sd; op1:x7; op2:x25; op2val:-0x8000000000000000; immval:-0xa; align:0
+TEST_STORE(x23,x2,0,x7,x25,-0x8000000000000000,-0xa,0,sd,0)
+
+inst_1:
+// rs1==x28, rs2==x1, rs2_val == 0, ea_align == 0 and (imm_val % 8) == 0
+// opcode: sd; op1:x28; op2:x1; op2val:0x0; immval:-0x800; align:0
+TEST_STORE(x23,x2,0,x28,x1,0x0,-0x800,8,sd,0)
+
+inst_2:
+// rs1==x24, rs2==x14, rs2_val == (2**(xlen-1)-1), imm_val > 0, rs2_val == 9223372036854775807
+// opcode: sd; op1:x24; op2:x14; op2val:0x7fffffffffffffff; immval:0x8; align:0
+TEST_STORE(x23,x2,0,x24,x14,0x7fffffffffffffff,0x8,16,sd,0)
+
+inst_3:
+// rs1==x29, rs2==x15, rs2_val == 1, ea_align == 0 and (imm_val % 8) == 4
+// opcode: sd; op1:x29; op2:x15; op2val:0x1; immval:0x4; align:0
+TEST_STORE(x23,x2,0,x29,x15,0x1,0x4,24,sd,0)
+
+inst_4:
+// rs1==x10, rs2==x6, ea_align == 0 and (imm_val % 8) == 1, rs2_val == 524288
+// opcode: sd; op1:x10; op2:x6; op2val:0x80000; immval:0x9; align:0
+TEST_STORE(x23,x2,0,x10,x6,0x80000,0x9,32,sd,0)
+
+inst_5:
+// rs1==x1, rs2==x13, ea_align == 0 and (imm_val % 8) == 2, rs2_val == -2305843009213693953
+// opcode: sd; op1:x1; op2:x13; op2val:-0x2000000000000001; immval:-0x556; align:0
+TEST_STORE(x23,x2,0,x1,x13,-0x2000000000000001,-0x556,40,sd,0)
+
+inst_6:
+// rs1==x26, rs2==x5, ea_align == 0 and (imm_val % 8) == 3, rs2_val == -1048577
+// opcode: sd; op1:x26; op2:x5; op2val:-0x100001; immval:-0x5; align:0
+TEST_STORE(x23,x2,0,x26,x5,-0x100001,-0x5,48,sd,0)
+
+inst_7:
+// rs1==x9, rs2==x19, ea_align == 0 and (imm_val % 8) == 5, rs2_val == 536870912
+// opcode: sd; op1:x9; op2:x19; op2val:0x20000000; immval:0x5; align:0
+TEST_STORE(x23,x2,0,x9,x19,0x20000000,0x5,56,sd,0)
+
+inst_8:
+// rs1==x6, rs2==x17, ea_align == 0 and (imm_val % 8) == 7, rs2_val == 131072
+// opcode: sd; op1:x6; op2:x17; op2val:0x20000; immval:0x7ff; align:0
+TEST_STORE(x23,x2,0,x6,x17,0x20000,0x7ff,64,sd,0)
+
+inst_9:
+// rs1==x18, rs2==x11, imm_val == 0, rs2_val == 4194304
+// opcode: sd; op1:x18; op2:x11; op2val:0x400000; immval:0x0; align:0
+TEST_STORE(x23,x2,0,x18,x11,0x400000,0x0,72,sd,0)
+
+inst_10:
+// rs1==x14, rs2==x28, rs2_val == 2,
+// opcode: sd; op1:x14; op2:x28; op2val:0x2; immval:0x8; align:0
+TEST_STORE(x23,x2,0,x14,x28,0x2,0x8,80,sd,0)
+
+inst_11:
+// rs1==x22, rs2==x30, rs2_val == 4,
+// opcode: sd; op1:x22; op2:x30; op2val:0x4; immval:-0x7; align:0
+TEST_STORE(x23,x2,0,x22,x30,0x4,-0x7,88,sd,0)
+
+inst_12:
+// rs1==x4, rs2==x18, rs2_val == 8,
+// opcode: sd; op1:x4; op2:x18; op2val:0x8; immval:-0x2; align:0
+TEST_STORE(x23,x2,0,x4,x18,0x8,-0x2,96,sd,0)
+
+inst_13:
+// rs1==x11, rs2==x21, rs2_val == 16,
+// opcode: sd; op1:x11; op2:x21; op2val:0x10; immval:-0x556; align:0
+TEST_STORE(x23,x2,0,x11,x21,0x10,-0x556,104,sd,0)
+
+inst_14:
+// rs1==x16, rs2==x29, rs2_val == 32,
+// opcode: sd; op1:x16; op2:x29; op2val:0x20; immval:0x8; align:0
+TEST_STORE(x23,x2,0,x16,x29,0x20,0x8,112,sd,0)
+
+inst_15:
+// rs1==x3, rs2==x22, rs2_val == 64,
+// opcode: sd; op1:x3; op2:x22; op2val:0x40; immval:0x9; align:0
+TEST_STORE(x23,x2,0,x3,x22,0x40,0x9,120,sd,0)
+
+inst_16:
+// rs1==x12, rs2==x8, rs2_val == 128,
+// opcode: sd; op1:x12; op2:x8; op2val:0x80; immval:-0x5; align:0
+TEST_STORE(x23,x2,0,x12,x8,0x80,-0x5,128,sd,0)
+
+inst_17:
+// rs1==x13, rs2==x31, rs2_val == 256,
+// opcode: sd; op1:x13; op2:x31; op2val:0x100; immval:0x555; align:0
+TEST_STORE(x23,x2,0,x13,x31,0x100,0x555,136,sd,0)
+
+inst_18:
+// rs1==x30, rs2==x12, rs2_val == 512,
+// opcode: sd; op1:x30; op2:x12; op2val:0x200; immval:0x200; align:0
+TEST_STORE(x23,x6,0,x30,x12,0x200,0x200,144,sd,0)
+
+inst_19:
+// rs1==x20, rs2==x2, rs2_val == 1024,
+// opcode: sd; op1:x20; op2:x2; op2val:0x400; immval:-0x3; align:0
+TEST_STORE(x23,x6,0,x20,x2,0x400,-0x3,152,sd,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_20:
+// rs1==x19, rs2==x7, rs2_val == 2048,
+// opcode: sd; op1:x19; op2:x7; op2val:0x800; immval:0x4; align:0
+TEST_STORE(x1,x6,0,x19,x7,0x800,0x4,0,sd,0)
+
+inst_21:
+// rs1==x2, rs2==x4, rs2_val == 4096,
+// opcode: sd; op1:x2; op2:x4; op2val:0x1000; immval:-0x201; align:0
+TEST_STORE(x1,x6,0,x2,x4,0x1000,-0x201,8,sd,0)
+
+inst_22:
+// rs1==x25, rs2==x0, rs2_val == 8192,
+// opcode: sd; op1:x25; op2:x0; op2val:0x0; immval:-0x2; align:0
+TEST_STORE(x1,x6,0,x25,x0,0x0,-0x2,16,sd,0)
+
+inst_23:
+// rs1==x8, rs2==x3, rs2_val == 16384,
+// opcode: sd; op1:x8; op2:x3; op2val:0x4000; immval:-0x8; align:0
+TEST_STORE(x1,x6,0,x8,x3,0x4000,-0x8,24,sd,0)
+
+inst_24:
+// rs1==x15, rs2==x20, rs2_val == 32768,
+// opcode: sd; op1:x15; op2:x20; op2val:0x8000; immval:-0x1; align:0
+TEST_STORE(x1,x6,0,x15,x20,0x8000,-0x1,32,sd,0)
+
+inst_25:
+// rs1==x5, rs2==x24, rs2_val == 65536,
+// opcode: sd; op1:x5; op2:x24; op2val:0x10000; immval:0x10; align:0
+TEST_STORE(x1,x6,0,x5,x24,0x10000,0x10,40,sd,0)
+
+inst_26:
+// rs1==x17, rs2==x27, rs2_val == 262144,
+// opcode: sd; op1:x17; op2:x27; op2val:0x40000; immval:0x0; align:0
+TEST_STORE(x1,x6,0,x17,x27,0x40000,0x0,48,sd,0)
+
+inst_27:
+// rs1==x23, rs2==x9, rs2_val == 1048576,
+// opcode: sd; op1:x23; op2:x9; op2val:0x100000; immval:0x3ff; align:0
+TEST_STORE(x1,x6,0,x23,x9,0x100000,0x3ff,56,sd,0)
+
+inst_28:
+// rs1==x27, rs2==x26, rs2_val == 2097152,
+// opcode: sd; op1:x27; op2:x26; op2val:0x200000; immval:-0x9; align:0
+TEST_STORE(x1,x6,0,x27,x26,0x200000,-0x9,64,sd,0)
+
+inst_29:
+// rs1==x31, rs2==x10, rs2_val == 8388608,
+// opcode: sd; op1:x31; op2:x10; op2val:0x800000; immval:0x9; align:0
+TEST_STORE(x1,x6,0,x31,x10,0x800000,0x9,72,sd,0)
+
+inst_30:
+// rs1==x21, rs2==x23, rs2_val == 16777216,
+// opcode: sd; op1:x21; op2:x23; op2val:0x1000000; immval:0x0; align:0
+TEST_STORE(x1,x6,0,x21,x23,0x1000000,0x0,80,sd,0)
+
+inst_31:
+// rs2==x16, rs2_val == 33554432,
+// opcode: sd; op1:x11; op2:x16; op2val:0x2000000; immval:0x100; align:0
+TEST_STORE(x1,x6,0,x11,x16,0x2000000,0x100,88,sd,0)
+
+inst_32:
+// rs2_val == 67108864,
+// opcode: sd; op1:x10; op2:x11; op2val:0x4000000; immval:-0x21; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x4000000,-0x21,96,sd,0)
+
+inst_33:
+// rs2_val == 134217728,
+// opcode: sd; op1:x10; op2:x11; op2val:0x8000000; immval:-0x7; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x8000000,-0x7,104,sd,0)
+
+inst_34:
+// rs2_val == 268435456,
+// opcode: sd; op1:x10; op2:x11; op2val:0x10000000; immval:0x3ff; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x10000000,0x3ff,112,sd,0)
+
+inst_35:
+// rs2_val == 1073741824,
+// opcode: sd; op1:x10; op2:x11; op2val:0x40000000; immval:-0x400; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x40000000,-0x400,120,sd,0)
+
+inst_36:
+// rs2_val == 2147483648,
+// opcode: sd; op1:x10; op2:x11; op2val:0x80000000; immval:-0x401; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x80000000,-0x401,128,sd,0)
+
+inst_37:
+// rs2_val == 4294967296,
+// opcode: sd; op1:x10; op2:x11; op2val:0x100000000; immval:-0x800; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x100000000,-0x800,136,sd,0)
+
+inst_38:
+// rs2_val == 8589934592,
+// opcode: sd; op1:x10; op2:x11; op2val:0x200000000; immval:-0x81; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x200000000,-0x81,144,sd,0)
+
+inst_39:
+// rs2_val == 17179869184,
+// opcode: sd; op1:x10; op2:x11; op2val:0x400000000; immval:-0x6; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x400000000,-0x6,152,sd,0)
+
+inst_40:
+// rs2_val == 34359738368,
+// opcode: sd; op1:x10; op2:x11; op2val:0x800000000; immval:-0x81; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x800000000,-0x81,160,sd,0)
+
+inst_41:
+// rs2_val == 68719476736,
+// opcode: sd; op1:x10; op2:x11; op2val:0x1000000000; immval:-0x201; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x1000000000,-0x201,168,sd,0)
+
+inst_42:
+// rs2_val == 137438953472,
+// opcode: sd; op1:x10; op2:x11; op2val:0x2000000000; immval:-0x556; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x2000000000,-0x556,176,sd,0)
+
+inst_43:
+// rs2_val == 274877906944,
+// opcode: sd; op1:x10; op2:x11; op2val:0x4000000000; immval:-0x8; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x4000000000,-0x8,184,sd,0)
+
+inst_44:
+// rs2_val == 549755813888,
+// opcode: sd; op1:x10; op2:x11; op2val:0x8000000000; immval:0x3ff; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x8000000000,0x3ff,192,sd,0)
+
+inst_45:
+// rs2_val == 1099511627776,
+// opcode: sd; op1:x10; op2:x11; op2val:0x10000000000; immval:0x9; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x10000000000,0x9,200,sd,0)
+
+inst_46:
+// rs2_val == 2199023255552,
+// opcode: sd; op1:x10; op2:x11; op2val:0x20000000000; immval:0x80; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x20000000000,0x80,208,sd,0)
+
+inst_47:
+// rs2_val == 4398046511104,
+// opcode: sd; op1:x10; op2:x11; op2val:0x40000000000; immval:-0x400; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x40000000000,-0x400,216,sd,0)
+
+inst_48:
+// rs2_val == 8796093022208,
+// opcode: sd; op1:x10; op2:x11; op2val:0x80000000000; immval:-0x800; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x80000000000,-0x800,224,sd,0)
+
+inst_49:
+// rs2_val == 17592186044416,
+// opcode: sd; op1:x10; op2:x11; op2val:0x100000000000; immval:0x1; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x100000000000,0x1,232,sd,0)
+
+inst_50:
+// rs2_val == 35184372088832,
+// opcode: sd; op1:x10; op2:x11; op2val:0x200000000000; immval:0x4; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x200000000000,0x4,240,sd,0)
+
+inst_51:
+// rs2_val == 70368744177664,
+// opcode: sd; op1:x10; op2:x11; op2val:0x400000000000; immval:0x3; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x400000000000,0x3,248,sd,0)
+
+inst_52:
+// rs2_val == 140737488355328,
+// opcode: sd; op1:x10; op2:x11; op2val:0x800000000000; immval:0x40; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x800000000000,0x40,256,sd,0)
+
+inst_53:
+// rs2_val == 281474976710656,
+// opcode: sd; op1:x10; op2:x11; op2val:0x1000000000000; immval:-0x1; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x1000000000000,-0x1,264,sd,0)
+
+inst_54:
+// rs2_val == 562949953421312,
+// opcode: sd; op1:x10; op2:x11; op2val:0x2000000000000; immval:-0x11; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x2000000000000,-0x11,272,sd,0)
+
+inst_55:
+// rs2_val == 1125899906842624,
+// opcode: sd; op1:x10; op2:x11; op2val:0x4000000000000; immval:-0x11; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x4000000000000,-0x11,280,sd,0)
+
+inst_56:
+// rs2_val == 2251799813685248,
+// opcode: sd; op1:x10; op2:x11; op2val:0x8000000000000; immval:-0x4; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x8000000000000,-0x4,288,sd,0)
+
+inst_57:
+// rs2_val == 4503599627370496,
+// opcode: sd; op1:x10; op2:x11; op2val:0x10000000000000; immval:-0x400; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x10000000000000,-0x400,296,sd,0)
+
+inst_58:
+// rs2_val == 9007199254740992,
+// opcode: sd; op1:x10; op2:x11; op2val:0x20000000000000; immval:0x10; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x20000000000000,0x10,304,sd,0)
+
+inst_59:
+// rs2_val == 18014398509481984,
+// opcode: sd; op1:x10; op2:x11; op2val:0x40000000000000; immval:0x3ff; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x40000000000000,0x3ff,312,sd,0)
+
+inst_60:
+// rs2_val == 36028797018963968,
+// opcode: sd; op1:x10; op2:x11; op2val:0x80000000000000; immval:0x10; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x80000000000000,0x10,320,sd,0)
+
+inst_61:
+// rs2_val == 72057594037927936,
+// opcode: sd; op1:x10; op2:x11; op2val:0x100000000000000; immval:-0x4; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x100000000000000,-0x4,328,sd,0)
+
+inst_62:
+// rs2_val == 144115188075855872,
+// opcode: sd; op1:x10; op2:x11; op2val:0x200000000000000; immval:0x0; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x200000000000000,0x0,336,sd,0)
+
+inst_63:
+// rs2_val == 288230376151711744,
+// opcode: sd; op1:x10; op2:x11; op2val:0x400000000000000; immval:0x400; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x400000000000000,0x400,344,sd,0)
+
+inst_64:
+// rs2_val == 576460752303423488,
+// opcode: sd; op1:x10; op2:x11; op2val:0x800000000000000; immval:0x7ff; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x800000000000000,0x7ff,352,sd,0)
+
+inst_65:
+// rs2_val == 1152921504606846976,
+// opcode: sd; op1:x10; op2:x11; op2val:0x1000000000000000; immval:0x6; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x1000000000000000,0x6,360,sd,0)
+
+inst_66:
+// rs2_val == 2305843009213693952,
+// opcode: sd; op1:x10; op2:x11; op2val:0x2000000000000000; immval:0x9; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x2000000000000000,0x9,368,sd,0)
+
+inst_67:
+// rs2_val == 4611686018427387904,
+// opcode: sd; op1:x10; op2:x11; op2val:0x4000000000000000; immval:-0x81; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x4000000000000000,-0x81,376,sd,0)
+
+inst_68:
+// rs2_val == -1125899906842625,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x4000000000001; immval:0x555; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x4000000000001,0x555,384,sd,0)
+
+inst_69:
+// rs2_val == -2251799813685249,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x8000000000001; immval:0x40; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x8000000000001,0x40,392,sd,0)
+
+inst_70:
+// rs2_val == -4503599627370497,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x10000000000001; immval:0x3; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x10000000000001,0x3,400,sd,0)
+
+inst_71:
+// rs2_val == -9007199254740993,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x20000000000001; immval:0x0; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x20000000000001,0x0,408,sd,0)
+
+inst_72:
+// rs2_val == -18014398509481985,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x40000000000001; immval:-0x41; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x40000000000001,-0x41,416,sd,0)
+
+inst_73:
+// rs2_val == -36028797018963969,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x80000000000001; immval:0x200; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x80000000000001,0x200,424,sd,0)
+
+inst_74:
+// rs2_val == -72057594037927937,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x100000000000001; immval:0x10; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x100000000000001,0x10,432,sd,0)
+
+inst_75:
+// rs2_val == -144115188075855873,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x200000000000001; immval:-0x401; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x200000000000001,-0x401,440,sd,0)
+
+inst_76:
+// rs2_val == -288230376151711745,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x400000000000001; immval:-0x556; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x400000000000001,-0x556,448,sd,0)
+
+inst_77:
+// rs2_val == -576460752303423489,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x800000000000001; immval:0x2; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x800000000000001,0x2,456,sd,0)
+
+inst_78:
+// rs2_val == -1152921504606846977,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x1000000000000001; immval:-0x21; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x1000000000000001,-0x21,464,sd,0)
+
+inst_79:
+// rs2_val == -4611686018427387905,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x4000000000000001; immval:0x3ff; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x4000000000000001,0x3ff,472,sd,0)
+
+inst_80:
+// rs2_val == 6148914691236517205,
+// opcode: sd; op1:x10; op2:x11; op2val:0x5555555555555555; immval:-0x7; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x5555555555555555,-0x7,480,sd,0)
+
+inst_81:
+// rs2_val == -6148914691236517206,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x5555555555555556; immval:0x0; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x5555555555555556,0x0,488,sd,0)
+
+inst_82:
+// rs2_val == -2,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x2; immval:0x3ff; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x2,0x3ff,496,sd,0)
+
+inst_83:
+// rs2_val == -3,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x3; immval:-0x400; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x3,-0x400,504,sd,0)
+
+inst_84:
+// rs2_val == -5,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x5; immval:0x400; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x5,0x400,512,sd,0)
+
+inst_85:
+// rs2_val == -9,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x9; immval:-0x41; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x9,-0x41,520,sd,0)
+
+inst_86:
+// rs2_val == -17,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x11; immval:0x100; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x11,0x100,528,sd,0)
+
+inst_87:
+// rs2_val == -33,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x21; immval:0x20; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x21,0x20,536,sd,0)
+
+inst_88:
+// rs2_val == -65,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x41; immval:-0x7; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x41,-0x7,544,sd,0)
+
+inst_89:
+// rs2_val == -129,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x81; immval:0x3ff; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x81,0x3ff,552,sd,0)
+
+inst_90:
+// rs2_val == -257,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x101; immval:0x10; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x101,0x10,560,sd,0)
+
+inst_91:
+// rs2_val == -513,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x201; immval:0x5; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x201,0x5,568,sd,0)
+
+inst_92:
+// rs2_val == -1025,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x401; immval:0x3; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x401,0x3,576,sd,0)
+
+inst_93:
+// rs2_val == -2049,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x801; immval:-0x6; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x801,-0x6,584,sd,0)
+
+inst_94:
+// rs2_val == -4097,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x1001; immval:-0x5; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x1001,-0x5,592,sd,0)
+
+inst_95:
+// rs2_val == -8193,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x2001; immval:-0x3; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x2001,-0x3,600,sd,0)
+
+inst_96:
+// rs2_val == -16385,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x4001; immval:0x40; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x4001,0x40,608,sd,0)
+
+inst_97:
+// rs2_val == -32769,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x8001; immval:-0x8; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x8001,-0x8,616,sd,0)
+
+inst_98:
+// rs2_val == -65537,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x10001; immval:-0x6; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x10001,-0x6,624,sd,0)
+
+inst_99:
+// rs2_val == -131073,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x20001; immval:-0x21; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x20001,-0x21,632,sd,0)
+
+inst_100:
+// rs2_val == -262145,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x40001; immval:-0x4; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x40001,-0x4,640,sd,0)
+
+inst_101:
+// rs2_val == -524289,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x80001; immval:0x5; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x80001,0x5,648,sd,0)
+
+inst_102:
+// rs2_val == -2097153,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x200001; immval:-0x101; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x200001,-0x101,656,sd,0)
+
+inst_103:
+// rs2_val == -4194305,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x400001; immval:-0x556; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x400001,-0x556,664,sd,0)
+
+inst_104:
+// rs2_val == -8388609,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x800001; immval:-0x9; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x800001,-0x9,672,sd,0)
+
+inst_105:
+// rs2_val == -16777217,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x1000001; immval:-0x800; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x1000001,-0x800,680,sd,0)
+
+inst_106:
+// rs2_val == -33554433,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x2000001; immval:0x400; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x2000001,0x400,688,sd,0)
+
+inst_107:
+// rs2_val == -67108865,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x4000001; immval:-0x11; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x4000001,-0x11,696,sd,0)
+
+inst_108:
+// rs2_val == -134217729,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x8000001; immval:-0x11; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x8000001,-0x11,704,sd,0)
+
+inst_109:
+// rs2_val == -268435457,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x10000001; immval:0x2; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x10000001,0x2,712,sd,0)
+
+inst_110:
+// rs2_val == -536870913,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x20000001; immval:-0x101; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x20000001,-0x101,720,sd,0)
+
+inst_111:
+// rs2_val == -1073741825,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x40000001; immval:0x555; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x40000001,0x555,728,sd,0)
+
+inst_112:
+// rs2_val == -2147483649,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x80000001; immval:-0x101; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x80000001,-0x101,736,sd,0)
+
+inst_113:
+// rs2_val == -4294967297,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x100000001; immval:0x0; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x100000001,0x0,744,sd,0)
+
+inst_114:
+// rs2_val == -8589934593,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x200000001; immval:-0x81; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x200000001,-0x81,752,sd,0)
+
+inst_115:
+// rs2_val == -17179869185,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x400000001; immval:0x80; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x400000001,0x80,760,sd,0)
+
+inst_116:
+// rs2_val == -34359738369,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x800000001; immval:0x0; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x800000001,0x0,768,sd,0)
+
+inst_117:
+// rs2_val == -68719476737,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x1000000001; immval:0x10; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x1000000001,0x10,776,sd,0)
+
+inst_118:
+// rs2_val == -137438953473,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x2000000001; immval:0x9; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x2000000001,0x9,784,sd,0)
+
+inst_119:
+// rs2_val == -274877906945,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x4000000001; immval:-0x81; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x4000000001,-0x81,792,sd,0)
+
+inst_120:
+// rs2_val == -549755813889,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x8000000001; immval:-0x5; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x8000000001,-0x5,800,sd,0)
+
+inst_121:
+// rs2_val == -1099511627777,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x10000000001; immval:0x555; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x10000000001,0x555,808,sd,0)
+
+inst_122:
+// rs2_val == -2199023255553,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x20000000001; immval:-0x7; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x20000000001,-0x7,816,sd,0)
+
+inst_123:
+// rs2_val == -4398046511105,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x40000000001; immval:-0x401; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x40000000001,-0x401,824,sd,0)
+
+inst_124:
+// rs2_val == -8796093022209,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x80000000001; immval:-0x9; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x80000000001,-0x9,832,sd,0)
+
+inst_125:
+// rs2_val == -17592186044417,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x100000000001; immval:0x40; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x100000000001,0x40,840,sd,0)
+
+inst_126:
+// rs2_val == -35184372088833,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x200000000001; immval:0x8; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x200000000001,0x8,848,sd,0)
+
+inst_127:
+// rs2_val == -70368744177665,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x400000000001; immval:-0x1; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x400000000001,-0x1,856,sd,0)
+
+inst_128:
+// rs2_val == -140737488355329,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x800000000001; immval:0x80; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x800000000001,0x80,864,sd,0)
+
+inst_129:
+// rs2_val == -281474976710657,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x1000000000001; immval:0x9; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x1000000000001,0x9,872,sd,0)
+
+inst_130:
+// rs2_val == -562949953421313,
+// opcode: sd; op1:x10; op2:x11; op2val:-0x2000000000001; immval:0x6; align:0
+TEST_STORE(x1,x6,0,x10,x11,-0x2000000000001,0x6,880,sd,0)
+
+inst_131:
+// rs2_val == 8192,
+// opcode: sd; op1:x10; op2:x11; op2val:0x2000; immval:-0x2; align:0
+TEST_STORE(x1,x6,0,x10,x11,0x2000,-0x2,888,sd,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x23_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x23_1:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 112*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/sh-align-01.S b/riscof/suite/rv64i_m/I/sh-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..15ee818ff7eeb447544e85625bc5bc4d5bdb5aeb
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/sh-align-01.S
@@ -0,0 +1,739 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sh instruction of the RISC-V I extension for the sh-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sh-align)
+
+RVTEST_SIGBASE( x7,signature_x7_1)
+
+inst_0:
+// rs1 != rs2, rs1==x29, rs2==x10, rs2_val == (-2**(xlen-1)), imm_val > 0, rs2_val == -9223372036854775808, ea_align == 0 and (imm_val % 4) == 2
+// opcode: sh; op1:x29; op2:x10; op2val:-0x8000000000000000; immval:0x2; align:0
+TEST_STORE(x7,x9,0,x29,x10,-0x8000000000000000,0x2,0,sh,0)
+
+inst_1:
+// rs1==x28, rs2==x14, rs2_val == 0, ea_align == 0 and (imm_val % 4) == 1
+// opcode: sh; op1:x28; op2:x14; op2val:0x0; immval:0x9; align:0
+TEST_STORE(x7,x9,0,x28,x14,0x0,0x9,8,sh,0)
+
+inst_2:
+// rs1==x16, rs2==x8, rs2_val == (2**(xlen-1)-1), ea_align == 0 and (imm_val % 4) == 0, rs2_val == 9223372036854775807
+// opcode: sh; op1:x16; op2:x8; op2val:0x7fffffffffffffff; immval:0x80; align:0
+TEST_STORE(x7,x9,0,x16,x8,0x7fffffffffffffff,0x80,16,sh,0)
+
+inst_3:
+// rs1==x31, rs2==x16, rs2_val == 1,
+// opcode: sh; op1:x31; op2:x16; op2val:0x1; immval:0x5; align:0
+TEST_STORE(x7,x9,0,x31,x16,0x1,0x5,24,sh,0)
+
+inst_4:
+// rs1==x1, rs2==x0, ea_align == 0 and (imm_val % 4) == 3, rs2_val == -2
+// opcode: sh; op1:x1; op2:x0; op2val:0x0; immval:0x7ff; align:0
+TEST_STORE(x7,x9,0,x1,x0,0x0,0x7ff,32,sh,0)
+
+inst_5:
+// rs1==x2, rs2==x15, ea_align == 2 and (imm_val % 4) == 0, rs2_val == -4398046511105
+// opcode: sh; op1:x2; op2:x15; op2val:-0x40000000001; immval:0x100; align:2
+TEST_STORE(x7,x9,0,x2,x15,-0x40000000001,0x100,40,sh,2)
+
+inst_6:
+// rs1==x6, rs2==x5, ea_align == 2 and (imm_val % 4) == 1, imm_val < 0
+// opcode: sh; op1:x6; op2:x5; op2val:-0x8000000000000000; immval:-0x3; align:2
+TEST_STORE(x7,x9,0,x6,x5,-0x8000000000000000,-0x3,48,sh,2)
+
+inst_7:
+// rs1==x10, rs2==x2, ea_align == 2 and (imm_val % 4) == 2, rs2_val == 2199023255552
+// opcode: sh; op1:x10; op2:x2; op2val:0x20000000000; immval:0x6; align:2
+TEST_STORE(x7,x9,0,x10,x2,0x20000000000,0x6,56,sh,2)
+
+inst_8:
+// rs1==x3, rs2==x25, ea_align == 2 and (imm_val % 4) == 3, rs2_val == 9007199254740992
+// opcode: sh; op1:x3; op2:x25; op2val:0x20000000000000; immval:0x7ff; align:2
+TEST_STORE(x7,x9,0,x3,x25,0x20000000000000,0x7ff,64,sh,2)
+
+inst_9:
+// rs1==x24, rs2==x26, imm_val == 0, rs2_val == 8589934592
+// opcode: sh; op1:x24; op2:x26; op2val:0x200000000; immval:0x0; align:0
+TEST_STORE(x7,x9,0,x24,x26,0x200000000,0x0,72,sh,0)
+
+inst_10:
+// rs1==x15, rs2==x23, rs2_val == 2,
+// opcode: sh; op1:x15; op2:x23; op2val:0x2; immval:0x200; align:0
+TEST_STORE(x7,x9,0,x15,x23,0x2,0x200,80,sh,0)
+
+inst_11:
+// rs1==x27, rs2==x3, rs2_val == 4,
+// opcode: sh; op1:x27; op2:x3; op2val:0x4; immval:-0xa; align:0
+TEST_STORE(x7,x9,0,x27,x3,0x4,-0xa,88,sh,0)
+
+inst_12:
+// rs1==x13, rs2==x30, rs2_val == 8,
+// opcode: sh; op1:x13; op2:x30; op2val:0x8; immval:-0x9; align:0
+TEST_STORE(x7,x9,0,x13,x30,0x8,-0x9,96,sh,0)
+
+inst_13:
+// rs1==x14, rs2==x6, rs2_val == 16,
+// opcode: sh; op1:x14; op2:x6; op2val:0x10; immval:0x10; align:0
+TEST_STORE(x7,x9,0,x14,x6,0x10,0x10,104,sh,0)
+
+inst_14:
+// rs1==x30, rs2==x17, rs2_val == 32,
+// opcode: sh; op1:x30; op2:x17; op2val:0x20; immval:-0x81; align:0
+TEST_STORE(x7,x9,0,x30,x17,0x20,-0x81,112,sh,0)
+
+inst_15:
+// rs1==x19, rs2==x22, rs2_val == 64,
+// opcode: sh; op1:x19; op2:x22; op2val:0x40; immval:-0x401; align:0
+TEST_STORE(x7,x9,0,x19,x22,0x40,-0x401,120,sh,0)
+
+inst_16:
+// rs1==x12, rs2==x11, rs2_val == 128,
+// opcode: sh; op1:x12; op2:x11; op2val:0x80; immval:0x5; align:0
+TEST_STORE(x7,x9,0,x12,x11,0x80,0x5,128,sh,0)
+
+inst_17:
+// rs1==x26, rs2==x1, rs2_val == 256,
+// opcode: sh; op1:x26; op2:x1; op2val:0x100; immval:-0x11; align:0
+TEST_STORE(x7,x9,0,x26,x1,0x100,-0x11,136,sh,0)
+
+inst_18:
+// rs1==x8, rs2==x20, rs2_val == 512,
+// opcode: sh; op1:x8; op2:x20; op2val:0x200; immval:-0x800; align:0
+TEST_STORE(x7,x9,0,x8,x20,0x200,-0x800,144,sh,0)
+
+inst_19:
+// rs1==x4, rs2==x31, rs2_val == 1024,
+// opcode: sh; op1:x4; op2:x31; op2val:0x400; immval:0x20; align:0
+TEST_STORE(x7,x9,0,x4,x31,0x400,0x20,152,sh,0)
+
+inst_20:
+// rs1==x23, rs2==x18, rs2_val == 2048,
+// opcode: sh; op1:x23; op2:x18; op2val:0x800; immval:0x0; align:0
+TEST_STORE(x7,x2,0,x23,x18,0x800,0x0,160,sh,0)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_21:
+// rs1==x9, rs2==x12, rs2_val == 4096,
+// opcode: sh; op1:x9; op2:x12; op2val:0x1000; immval:0x9; align:0
+TEST_STORE(x1,x2,0,x9,x12,0x1000,0x9,0,sh,0)
+
+inst_22:
+// rs1==x18, rs2==x4, rs2_val == 8192,
+// opcode: sh; op1:x18; op2:x4; op2val:0x2000; immval:0x200; align:0
+TEST_STORE(x1,x2,0,x18,x4,0x2000,0x200,8,sh,0)
+
+inst_23:
+// rs1==x20, rs2==x27, rs2_val == 16384,
+// opcode: sh; op1:x20; op2:x27; op2val:0x4000; immval:0x40; align:0
+TEST_STORE(x1,x2,0,x20,x27,0x4000,0x40,16,sh,0)
+
+inst_24:
+// rs1==x7, rs2==x21, rs2_val == 32768,
+// opcode: sh; op1:x7; op2:x21; op2val:0x8000; immval:0x0; align:0
+TEST_STORE(x1,x2,0,x7,x21,0x8000,0x0,24,sh,0)
+
+inst_25:
+// rs1==x25, rs2==x9, rs2_val == 65536,
+// opcode: sh; op1:x25; op2:x9; op2val:0x10000; immval:-0xa; align:0
+TEST_STORE(x1,x2,0,x25,x9,0x10000,-0xa,32,sh,0)
+
+inst_26:
+// rs1==x21, rs2==x19, rs2_val == 131072,
+// opcode: sh; op1:x21; op2:x19; op2val:0x20000; immval:-0x3; align:0
+TEST_STORE(x1,x2,0,x21,x19,0x20000,-0x3,40,sh,0)
+
+inst_27:
+// rs1==x22, rs2==x29, rs2_val == 262144,
+// opcode: sh; op1:x22; op2:x29; op2val:0x40000; immval:-0x201; align:0
+TEST_STORE(x1,x2,0,x22,x29,0x40000,-0x201,48,sh,0)
+
+inst_28:
+// rs1==x17, rs2==x7, rs2_val == 524288,
+// opcode: sh; op1:x17; op2:x7; op2val:0x80000; immval:-0x8; align:0
+TEST_STORE(x1,x2,0,x17,x7,0x80000,-0x8,56,sh,0)
+
+inst_29:
+// rs1==x5, rs2==x13, rs2_val == 1048576,
+// opcode: sh; op1:x5; op2:x13; op2val:0x100000; immval:-0x3; align:0
+TEST_STORE(x1,x2,0,x5,x13,0x100000,-0x3,64,sh,0)
+
+inst_30:
+// rs1==x11, rs2==x24, rs2_val == 2097152,
+// opcode: sh; op1:x11; op2:x24; op2val:0x200000; immval:-0x21; align:0
+TEST_STORE(x1,x2,0,x11,x24,0x200000,-0x21,72,sh,0)
+
+inst_31:
+// rs2==x28, rs2_val == 4194304,
+// opcode: sh; op1:x12; op2:x28; op2val:0x400000; immval:-0x8; align:0
+TEST_STORE(x1,x2,0,x12,x28,0x400000,-0x8,80,sh,0)
+
+inst_32:
+// rs2_val == 8388608,
+// opcode: sh; op1:x10; op2:x11; op2val:0x800000; immval:0x20; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x800000,0x20,88,sh,0)
+
+inst_33:
+// rs2_val == 16777216,
+// opcode: sh; op1:x10; op2:x11; op2val:0x1000000; immval:0x6; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x1000000,0x6,96,sh,0)
+
+inst_34:
+// rs2_val == 33554432,
+// opcode: sh; op1:x10; op2:x11; op2val:0x2000000; immval:0x400; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x2000000,0x400,104,sh,0)
+
+inst_35:
+// rs2_val == 67108864,
+// opcode: sh; op1:x10; op2:x11; op2val:0x4000000; immval:0x7; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x4000000,0x7,112,sh,0)
+
+inst_36:
+// rs2_val == 134217728,
+// opcode: sh; op1:x10; op2:x11; op2val:0x8000000; immval:0x200; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x8000000,0x200,120,sh,0)
+
+inst_37:
+// rs2_val == 268435456,
+// opcode: sh; op1:x10; op2:x11; op2val:0x10000000; immval:0x1; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x10000000,0x1,128,sh,0)
+
+inst_38:
+// rs2_val == 536870912,
+// opcode: sh; op1:x10; op2:x11; op2val:0x20000000; immval:-0x800; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x20000000,-0x800,136,sh,0)
+
+inst_39:
+// rs2_val == 1073741824,
+// opcode: sh; op1:x10; op2:x11; op2val:0x40000000; immval:-0x41; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x40000000,-0x41,144,sh,0)
+
+inst_40:
+// rs2_val == 2147483648,
+// opcode: sh; op1:x10; op2:x11; op2val:0x80000000; immval:0x5; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x80000000,0x5,152,sh,0)
+
+inst_41:
+// rs2_val == 4294967296,
+// opcode: sh; op1:x10; op2:x11; op2val:0x100000000; immval:0x7; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x100000000,0x7,160,sh,0)
+
+inst_42:
+// rs2_val == 17179869184,
+// opcode: sh; op1:x10; op2:x11; op2val:0x400000000; immval:0x7ff; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x400000000,0x7ff,168,sh,0)
+
+inst_43:
+// rs2_val == 34359738368,
+// opcode: sh; op1:x10; op2:x11; op2val:0x800000000; immval:-0x400; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x800000000,-0x400,176,sh,0)
+
+inst_44:
+// rs2_val == 68719476736,
+// opcode: sh; op1:x10; op2:x11; op2val:0x1000000000; immval:0x100; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x1000000000,0x100,184,sh,0)
+
+inst_45:
+// rs2_val == 137438953472,
+// opcode: sh; op1:x10; op2:x11; op2val:0x2000000000; immval:-0x401; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x2000000000,-0x401,192,sh,0)
+
+inst_46:
+// rs2_val == 274877906944,
+// opcode: sh; op1:x10; op2:x11; op2val:0x4000000000; immval:0x0; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x4000000000,0x0,200,sh,0)
+
+inst_47:
+// rs2_val == 549755813888,
+// opcode: sh; op1:x10; op2:x11; op2val:0x8000000000; immval:0x4; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x8000000000,0x4,208,sh,0)
+
+inst_48:
+// rs2_val == 1099511627776,
+// opcode: sh; op1:x10; op2:x11; op2val:0x10000000000; immval:-0x4; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x10000000000,-0x4,216,sh,0)
+
+inst_49:
+// rs2_val == 4398046511104,
+// opcode: sh; op1:x10; op2:x11; op2val:0x40000000000; immval:-0x1; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x40000000000,-0x1,224,sh,0)
+
+inst_50:
+// rs2_val == 8796093022208,
+// opcode: sh; op1:x10; op2:x11; op2val:0x80000000000; immval:-0x201; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x80000000000,-0x201,232,sh,0)
+
+inst_51:
+// rs2_val == 17592186044416,
+// opcode: sh; op1:x10; op2:x11; op2val:0x100000000000; immval:-0x201; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x100000000000,-0x201,240,sh,0)
+
+inst_52:
+// rs2_val == 35184372088832,
+// opcode: sh; op1:x10; op2:x11; op2val:0x200000000000; immval:0x20; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x200000000000,0x20,248,sh,0)
+
+inst_53:
+// rs2_val == 70368744177664,
+// opcode: sh; op1:x10; op2:x11; op2val:0x400000000000; immval:0x1; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x400000000000,0x1,256,sh,0)
+
+inst_54:
+// rs2_val == 140737488355328,
+// opcode: sh; op1:x10; op2:x11; op2val:0x800000000000; immval:-0x5; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x800000000000,-0x5,264,sh,0)
+
+inst_55:
+// rs2_val == 281474976710656,
+// opcode: sh; op1:x10; op2:x11; op2val:0x1000000000000; immval:0x20; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x1000000000000,0x20,272,sh,0)
+
+inst_56:
+// rs2_val == 562949953421312,
+// opcode: sh; op1:x10; op2:x11; op2val:0x2000000000000; immval:-0x81; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x2000000000000,-0x81,280,sh,0)
+
+inst_57:
+// rs2_val == 1125899906842624,
+// opcode: sh; op1:x10; op2:x11; op2val:0x4000000000000; immval:-0x101; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x4000000000000,-0x101,288,sh,0)
+
+inst_58:
+// rs2_val == 2251799813685248,
+// opcode: sh; op1:x10; op2:x11; op2val:0x8000000000000; immval:0x40; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x8000000000000,0x40,296,sh,0)
+
+inst_59:
+// rs2_val == 4503599627370496,
+// opcode: sh; op1:x10; op2:x11; op2val:0x10000000000000; immval:0x3; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x10000000000000,0x3,304,sh,0)
+
+inst_60:
+// rs2_val == 18014398509481984,
+// opcode: sh; op1:x10; op2:x11; op2val:0x40000000000000; immval:0x7; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x40000000000000,0x7,312,sh,0)
+
+inst_61:
+// rs2_val == 36028797018963968,
+// opcode: sh; op1:x10; op2:x11; op2val:0x80000000000000; immval:0x9; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x80000000000000,0x9,320,sh,0)
+
+inst_62:
+// rs2_val == 72057594037927936,
+// opcode: sh; op1:x10; op2:x11; op2val:0x100000000000000; immval:0x20; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x100000000000000,0x20,328,sh,0)
+
+inst_63:
+// rs2_val == 144115188075855872,
+// opcode: sh; op1:x10; op2:x11; op2val:0x200000000000000; immval:0x0; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x200000000000000,0x0,336,sh,0)
+
+inst_64:
+// rs2_val == 288230376151711744,
+// opcode: sh; op1:x10; op2:x11; op2val:0x400000000000000; immval:0x400; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x400000000000000,0x400,344,sh,0)
+
+inst_65:
+// rs2_val == 576460752303423488,
+// opcode: sh; op1:x10; op2:x11; op2val:0x800000000000000; immval:-0xa; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x800000000000000,-0xa,352,sh,0)
+
+inst_66:
+// rs2_val == 1152921504606846976,
+// opcode: sh; op1:x10; op2:x11; op2val:0x1000000000000000; immval:-0x556; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x1000000000000000,-0x556,360,sh,0)
+
+inst_67:
+// rs2_val == 2305843009213693952,
+// opcode: sh; op1:x10; op2:x11; op2val:0x2000000000000000; immval:0x10; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x2000000000000000,0x10,368,sh,0)
+
+inst_68:
+// rs2_val == 4611686018427387904,
+// opcode: sh; op1:x10; op2:x11; op2val:0x4000000000000000; immval:0x2; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x4000000000000000,0x2,376,sh,0)
+
+inst_69:
+// rs2_val == -1125899906842625,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x4000000000001; immval:0x40; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x4000000000001,0x40,384,sh,0)
+
+inst_70:
+// rs2_val == -2251799813685249,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x8000000000001; immval:0x2; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x8000000000001,0x2,392,sh,0)
+
+inst_71:
+// rs2_val == -4503599627370497,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x10000000000001; immval:-0x400; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x10000000000001,-0x400,400,sh,0)
+
+inst_72:
+// rs2_val == -9007199254740993,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x20000000000001; immval:-0x401; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x20000000000001,-0x401,408,sh,0)
+
+inst_73:
+// rs2_val == -18014398509481985,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x40000000000001; immval:0x3ff; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x40000000000001,0x3ff,416,sh,0)
+
+inst_74:
+// rs2_val == -36028797018963969,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x80000000000001; immval:-0x1; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x80000000000001,-0x1,424,sh,0)
+
+inst_75:
+// rs2_val == -72057594037927937,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x100000000000001; immval:-0x101; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x100000000000001,-0x101,432,sh,0)
+
+inst_76:
+// rs2_val == -144115188075855873,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x200000000000001; immval:-0x9; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x200000000000001,-0x9,440,sh,0)
+
+inst_77:
+// rs2_val == -288230376151711745,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x400000000000001; immval:-0x3; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x400000000000001,-0x3,448,sh,0)
+
+inst_78:
+// rs2_val == -576460752303423489,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x800000000000001; immval:-0x556; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x800000000000001,-0x556,456,sh,0)
+
+inst_79:
+// rs2_val == -1152921504606846977,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x1000000000000001; immval:-0x7; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x1000000000000001,-0x7,464,sh,0)
+
+inst_80:
+// rs2_val == -2305843009213693953,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x2000000000000001; immval:0x3; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x2000000000000001,0x3,472,sh,0)
+
+inst_81:
+// rs2_val == -4611686018427387905,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x4000000000000001; immval:-0x3; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x4000000000000001,-0x3,480,sh,0)
+
+inst_82:
+// rs2_val == 6148914691236517205,
+// opcode: sh; op1:x10; op2:x11; op2val:0x5555555555555555; immval:0x100; align:0
+TEST_STORE(x1,x2,0,x10,x11,0x5555555555555555,0x100,488,sh,0)
+
+inst_83:
+// rs2_val == -6148914691236517206,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x5555555555555556; immval:0x5; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x5555555555555556,0x5,496,sh,0)
+
+inst_84:
+// rs2_val == -3,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x3; immval:-0x6; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x3,-0x6,504,sh,0)
+
+inst_85:
+// rs2_val == -5,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x5; immval:-0x800; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x5,-0x800,512,sh,0)
+
+inst_86:
+// rs2_val == -9,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x9; immval:0x80; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x9,0x80,520,sh,0)
+
+inst_87:
+// rs2_val == -17,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x11; immval:-0x800; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x11,-0x800,528,sh,0)
+
+inst_88:
+// rs2_val == -33,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x21; immval:0x40; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x21,0x40,536,sh,0)
+
+inst_89:
+// rs2_val == -65,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x41; immval:-0x4; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x41,-0x4,544,sh,0)
+
+inst_90:
+// rs2_val == -129,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x81; immval:0x3; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x81,0x3,552,sh,0)
+
+inst_91:
+// rs2_val == -257,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x101; immval:-0x7; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x101,-0x7,560,sh,0)
+
+inst_92:
+// rs2_val == -513,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x201; immval:0x3ff; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x201,0x3ff,568,sh,0)
+
+inst_93:
+// rs2_val == -1025,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x401; immval:-0x400; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x401,-0x400,576,sh,0)
+
+inst_94:
+// rs2_val == -2049,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x801; immval:0x555; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x801,0x555,584,sh,0)
+
+inst_95:
+// rs2_val == -4097,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x1001; immval:0x9; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x1001,0x9,592,sh,0)
+
+inst_96:
+// rs2_val == -8193,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x2001; immval:0x80; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x2001,0x80,600,sh,0)
+
+inst_97:
+// rs2_val == -16385,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x4001; immval:0x555; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x4001,0x555,608,sh,0)
+
+inst_98:
+// rs2_val == -32769,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x8001; immval:-0xa; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x8001,-0xa,616,sh,0)
+
+inst_99:
+// rs2_val == -65537,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x10001; immval:-0x800; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x10001,-0x800,624,sh,0)
+
+inst_100:
+// rs2_val == -131073,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x20001; immval:-0x41; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x20001,-0x41,632,sh,0)
+
+inst_101:
+// rs2_val == -262145,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x40001; immval:0x20; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x40001,0x20,640,sh,0)
+
+inst_102:
+// rs2_val == -524289,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x80001; immval:-0x8; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x80001,-0x8,648,sh,0)
+
+inst_103:
+// rs2_val == -1048577,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x100001; immval:0x555; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x100001,0x555,656,sh,0)
+
+inst_104:
+// rs2_val == -2097153,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x200001; immval:0x3; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x200001,0x3,664,sh,0)
+
+inst_105:
+// rs2_val == -4194305,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x400001; immval:0x5; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x400001,0x5,672,sh,0)
+
+inst_106:
+// rs2_val == -8388609,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x800001; immval:0x3; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x800001,0x3,680,sh,0)
+
+inst_107:
+// rs2_val == -16777217,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x1000001; immval:-0x41; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x1000001,-0x41,688,sh,0)
+
+inst_108:
+// rs2_val == -33554433,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x2000001; immval:-0x800; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x2000001,-0x800,696,sh,0)
+
+inst_109:
+// rs2_val == -67108865,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x4000001; immval:0x6; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x4000001,0x6,704,sh,0)
+
+inst_110:
+// rs2_val == -134217729,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x8000001; immval:0x1; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x8000001,0x1,712,sh,0)
+
+inst_111:
+// rs2_val == -268435457,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x10000001; immval:0x3ff; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x10000001,0x3ff,720,sh,0)
+
+inst_112:
+// rs2_val == -536870913,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x20000001; immval:-0x2; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x20000001,-0x2,728,sh,0)
+
+inst_113:
+// rs2_val == -1073741825,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x40000001; immval:0x2; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x40000001,0x2,736,sh,0)
+
+inst_114:
+// rs2_val == -2147483649,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x80000001; immval:-0x4; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x80000001,-0x4,744,sh,0)
+
+inst_115:
+// rs2_val == -4294967297,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x100000001; immval:0x200; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x100000001,0x200,752,sh,0)
+
+inst_116:
+// rs2_val == -8589934593,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x200000001; immval:0x7; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x200000001,0x7,760,sh,0)
+
+inst_117:
+// rs2_val == -17179869185,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x400000001; immval:0x0; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x400000001,0x0,768,sh,0)
+
+inst_118:
+// rs2_val == -34359738369,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x800000001; immval:-0x41; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x800000001,-0x41,776,sh,0)
+
+inst_119:
+// rs2_val == -68719476737,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x1000000001; immval:-0x3; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x1000000001,-0x3,784,sh,0)
+
+inst_120:
+// rs2_val == -137438953473,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x2000000001; immval:-0x400; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x2000000001,-0x400,792,sh,0)
+
+inst_121:
+// rs2_val == -274877906945,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x4000000001; immval:0x3ff; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x4000000001,0x3ff,800,sh,0)
+
+inst_122:
+// rs2_val == -549755813889,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x8000000001; immval:-0x9; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x8000000001,-0x9,808,sh,0)
+
+inst_123:
+// rs2_val == -1099511627777,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x10000000001; immval:-0x401; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x10000000001,-0x401,816,sh,0)
+
+inst_124:
+// rs2_val == -2199023255553,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x20000000001; immval:0x5; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x20000000001,0x5,824,sh,0)
+
+inst_125:
+// rs2_val == -8796093022209,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x80000000001; immval:0x8; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x80000000001,0x8,832,sh,0)
+
+inst_126:
+// rs2_val == -17592186044417,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x100000000001; immval:-0x401; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x100000000001,-0x401,840,sh,0)
+
+inst_127:
+// rs2_val == -35184372088833,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x200000000001; immval:-0xa; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x200000000001,-0xa,848,sh,0)
+
+inst_128:
+// rs2_val == -70368744177665,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x400000000001; immval:0x80; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x400000000001,0x80,856,sh,0)
+
+inst_129:
+// rs2_val == -140737488355329,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x800000000001; immval:-0x9; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x800000000001,-0x9,864,sh,0)
+
+inst_130:
+// rs2_val == -281474976710657,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x1000000000001; immval:0x6; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x1000000000001,0x6,872,sh,0)
+
+inst_131:
+// rs2_val == -562949953421313,
+// opcode: sh; op1:x10; op2:x11; op2val:-0x2000000000001; immval:0x200; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x2000000000001,0x200,880,sh,0)
+
+inst_132:
+// ea_align == 0 and (imm_val % 4) == 3, rs2_val == -2
+// opcode: sh; op1:x10; op2:x11; op2val:-0x2; immval:0x7ff; align:0
+TEST_STORE(x1,x2,0,x10,x11,-0x2,0x7ff,888,sh,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x7_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_1:
+ .fill 21*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 112*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/sll-01.S b/riscof/suite/rv64i_m/I/sll-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..35cfd168dec64cb0fc825047ba2135ba9eec573d
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/sll-01.S
@@ -0,0 +1,839 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sll instruction of the RISC-V i extension for the sll covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64i")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sll)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x22, rs2==x22, rd==x6, rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == -274877906945
+// opcode: sll ; op1:x22; op2:x22; dest:x6; op1val:-0x4000000001; op2val:-0x4000000001
+TEST_RR_OP(sll, x6, x22, x22, 0x8000000000000000, -0x4000000001, -0x4000000001, x1, 0, x19)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x31, rs2==x7, rd==x7, rs1_val > 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == 1024
+// opcode: sll ; op1:x31; op2:x7; dest:x7; op1val:0x400; op2val:0xd
+TEST_RR_OP(sll, x7, x31, x7, 0x800000, 0x400, 0xd, x1, 8, x19)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x26, rs2==x26, rd==x26, rs1_val < 0 and rs2_val == 0,
+// opcode: sll ; op1:x26; op2:x26; dest:x26; op1val:-0xa; op2val:-0xa
+TEST_RR_OP(sll, x26, x26, x26, 0xfd80000000000000, -0xa, -0xa, x1, 16, x19)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x15, rs2==x28, rd==x20, rs1_val > 0 and rs2_val == 0, rs1_val == 17592186044416
+// opcode: sll ; op1:x15; op2:x28; dest:x20; op1val:0x100000000000; op2val:0x0
+TEST_RR_OP(sll, x20, x15, x28, 0x100000000000, 0x100000000000, 0x0, x1, 24, x19)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x12, rs2==x10, rd==x12, rs1_val == rs2_val and rs2_val > 0 and rs2_val < xlen, rs1_val == 1 and rs2_val >= 0 and rs2_val < xlen, rs1_val == 1, rs2_val == 1
+// opcode: sll ; op1:x12; op2:x10; dest:x12; op1val:0x1; op2val:0x1
+TEST_RR_OP(sll, x12, x12, x10, 0x2, 0x1, 0x1, x1, 32, x19)
+
+inst_5:
+// rs1==x21, rs2==x27, rd==x10, rs1_val == (-2**(xlen-1)) and rs2_val >= 0 and rs2_val < xlen, rs1_val == -9223372036854775808
+// opcode: sll ; op1:x21; op2:x27; dest:x10; op1val:-0x8000000000000000; op2val:0xe
+TEST_RR_OP(sll, x10, x21, x27, 0x0, -0x8000000000000000, 0xe, x1, 40, x19)
+
+inst_6:
+// rs1==x6, rs2==x25, rd==x17, rs1_val == 0 and rs2_val >= 0 and rs2_val < xlen, rs2_val == 59, rs1_val==0
+// opcode: sll ; op1:x6; op2:x25; dest:x17; op1val:0x0; op2val:0x3b
+TEST_RR_OP(sll, x17, x6, x25, 0x0, 0x0, 0x3b, x1, 48, x19)
+
+inst_7:
+// rs1==x24, rs2==x11, rd==x23, rs1_val == (2**(xlen-1)-1) and rs2_val >= 0 and rs2_val < xlen, rs1_val == 9223372036854775807, rs2_val == 31
+// opcode: sll ; op1:x24; op2:x11; dest:x23; op1val:0x7fffffffffffffff; op2val:0x1f
+TEST_RR_OP(sll, x23, x24, x11, 0xffffffff80000000, 0x7fffffffffffffff, 0x1f, x1, 56, x19)
+
+inst_8:
+// rs1==x4, rs2==x24, rd==x2, rs1_val == 2, rs1_val==2
+// opcode: sll ; op1:x4; op2:x24; dest:x2; op1val:0x2; op2val:0x9
+TEST_RR_OP(sll, x2, x4, x24, 0x400, 0x2, 0x9, x1, 64, x19)
+
+inst_9:
+// rs1==x2, rs2==x17, rd==x4, rs1_val == 4, rs1_val==4
+// opcode: sll ; op1:x2; op2:x17; dest:x4; op1val:0x4; op2val:0xb
+TEST_RR_OP(sll, x4, x2, x17, 0x2000, 0x4, 0xb, x1, 72, x19)
+
+inst_10:
+// rs1==x8, rs2==x5, rd==x11, rs1_val == 8, rs2_val == 16
+// opcode: sll ; op1:x8; op2:x5; dest:x11; op1val:0x8; op2val:0x10
+TEST_RR_OP(sll, x11, x8, x5, 0x80000, 0x8, 0x10, x1, 80, x19)
+
+inst_11:
+// rs1==x18, rs2==x4, rd==x16, rs1_val == 16,
+// opcode: sll ; op1:x18; op2:x4; dest:x16; op1val:0x10; op2val:0x1
+TEST_RR_OP(sll, x16, x18, x4, 0x20, 0x10, 0x1, x1, 88, x19)
+
+inst_12:
+// rs1==x3, rs2==x20, rd==x22, rs1_val == 32,
+// opcode: sll ; op1:x3; op2:x20; dest:x22; op1val:0x20; op2val:0xf
+TEST_RR_OP(sll, x22, x3, x20, 0x100000, 0x20, 0xf, x1, 96, x19)
+
+inst_13:
+// rs1==x5, rs2==x6, rd==x28, rs1_val == 64,
+// opcode: sll ; op1:x5; op2:x6; dest:x28; op1val:0x40; op2val:0x3
+TEST_RR_OP(sll, x28, x5, x6, 0x200, 0x40, 0x3, x1, 104, x19)
+
+inst_14:
+// rs1==x11, rs2==x8, rd==x25, rs1_val == 128,
+// opcode: sll ; op1:x11; op2:x8; dest:x25; op1val:0x80; op2val:0xd
+TEST_RR_OP(sll, x25, x11, x8, 0x100000, 0x80, 0xd, x1, 112, x19)
+
+inst_15:
+// rs1==x13, rs2==x2, rd==x14, rs1_val == 256,
+// opcode: sll ; op1:x13; op2:x2; dest:x14; op1val:0x100; op2val:0x3f
+TEST_RR_OP(sll, x14, x13, x2, 0x0, 0x100, 0x3f, x1, 120, x19)
+
+inst_16:
+// rs1==x9, rs2==x12, rd==x30, rs1_val == 512,
+// opcode: sll ; op1:x9; op2:x12; dest:x30; op1val:0x200; op2val:0x11
+TEST_RR_OP(sll, x30, x9, x12, 0x4000000, 0x200, 0x11, x1, 128, x19)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_17:
+// rs1==x27, rs2==x31, rd==x21, rs1_val == 2048,
+// opcode: sll ; op1:x27; op2:x31; dest:x21; op1val:0x800; op2val:0x0
+TEST_RR_OP(sll, x21, x27, x31, 0x800, 0x800, 0x0, x2, 0, x4)
+
+inst_18:
+// rs1==x20, rs2==x23, rd==x3, rs1_val == 4096,
+// opcode: sll ; op1:x20; op2:x23; dest:x3; op1val:0x1000; op2val:0x1f
+TEST_RR_OP(sll, x3, x20, x23, 0x80000000000, 0x1000, 0x1f, x2, 8, x4)
+
+inst_19:
+// rs1==x25, rs2==x19, rd==x5, rs1_val == 8192,
+// opcode: sll ; op1:x25; op2:x19; dest:x5; op1val:0x2000; op2val:0xb
+TEST_RR_OP(sll, x5, x25, x19, 0x1000000, 0x2000, 0xb, x2, 16, x4)
+
+inst_20:
+// rs1==x10, rs2==x29, rd==x1, rs1_val == 16384,
+// opcode: sll ; op1:x10; op2:x29; dest:x1; op1val:0x4000; op2val:0x9
+TEST_RR_OP(sll, x1, x10, x29, 0x800000, 0x4000, 0x9, x2, 24, x4)
+
+inst_21:
+// rs1==x1, rs2==x18, rd==x19, rs1_val == 32768,
+// opcode: sll ; op1:x1; op2:x18; dest:x19; op1val:0x8000; op2val:0x0
+TEST_RR_OP(sll, x19, x1, x18, 0x8000, 0x8000, 0x0, x2, 32, x4)
+
+inst_22:
+// rs1==x29, rs2==x30, rd==x31, rs1_val == 65536,
+// opcode: sll ; op1:x29; op2:x30; dest:x31; op1val:0x10000; op2val:0x1
+TEST_RR_OP(sll, x31, x29, x30, 0x20000, 0x10000, 0x1, x2, 40, x4)
+
+inst_23:
+// rs1==x28, rs2==x0, rd==x15, rs1_val == 131072, rs2_val == 2
+// opcode: sll ; op1:x28; op2:x0; dest:x15; op1val:0x20000; op2val:0x0
+TEST_RR_OP(sll, x15, x28, x0, 0x20000, 0x20000, 0x0, x2, 48, x4)
+
+inst_24:
+// rs1==x30, rs2==x21, rd==x27, rs1_val == 262144,
+// opcode: sll ; op1:x30; op2:x21; dest:x27; op1val:0x40000; op2val:0xf
+TEST_RR_OP(sll, x27, x30, x21, 0x200000000, 0x40000, 0xf, x2, 56, x4)
+
+inst_25:
+// rs1==x16, rs2==x14, rd==x29, rs1_val == 524288,
+// opcode: sll ; op1:x16; op2:x14; dest:x29; op1val:0x80000; op2val:0x2
+TEST_RR_OP(sll, x29, x16, x14, 0x200000, 0x80000, 0x2, x2, 64, x4)
+
+inst_26:
+// rs1==x23, rs2==x9, rd==x0, rs1_val == 1048576,
+// opcode: sll ; op1:x23; op2:x9; dest:x0; op1val:0x100000; op2val:0x2
+TEST_RR_OP(sll, x0, x23, x9, 0, 0x100000, 0x2, x2, 72, x4)
+
+inst_27:
+// rs1==x17, rs2==x1, rd==x18, rs1_val == 2097152,
+// opcode: sll ; op1:x17; op2:x1; dest:x18; op1val:0x200000; op2val:0x3f
+TEST_RR_OP(sll, x18, x17, x1, 0x0, 0x200000, 0x3f, x2, 80, x4)
+
+inst_28:
+// rs1==x19, rs2==x15, rd==x24, rs1_val == 4194304,
+// opcode: sll ; op1:x19; op2:x15; dest:x24; op1val:0x400000; op2val:0x3f
+TEST_RR_OP(sll, x24, x19, x15, 0x0, 0x400000, 0x3f, x2, 88, x4)
+
+inst_29:
+// rs1==x14, rs2==x13, rd==x8, rs1_val == 8388608,
+// opcode: sll ; op1:x14; op2:x13; dest:x8; op1val:0x800000; op2val:0x13
+TEST_RR_OP(sll, x8, x14, x13, 0x40000000000, 0x800000, 0x13, x2, 96, x4)
+
+inst_30:
+// rs1==x0, rs2==x3, rd==x13, rs1_val == 16777216, rs2_val == 32
+// opcode: sll ; op1:x0; op2:x3; dest:x13; op1val:0x0; op2val:0x20
+TEST_RR_OP(sll, x13, x0, x3, 0x0, 0x0, 0x20, x2, 104, x4)
+
+inst_31:
+// rs1==x7, rs2==x16, rd==x9, rs1_val == 33554432,
+// opcode: sll ; op1:x7; op2:x16; dest:x9; op1val:0x2000000; op2val:0xd
+TEST_RR_OP(sll, x9, x7, x16, 0x4000000000, 0x2000000, 0xd, x2, 112, x4)
+
+inst_32:
+// rs1_val == 67108864,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x3f
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x4000000, 0x3f, x2, 120, x4)
+
+inst_33:
+// rs1_val == 134217728,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x3
+TEST_RR_OP(sll, x12, x10, x11, 0x40000000, 0x8000000, 0x3, x2, 128, x4)
+
+inst_34:
+// rs1_val == 268435456, rs2_val == 4
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x4
+TEST_RR_OP(sll, x12, x10, x11, 0x100000000, 0x10000000, 0x4, x2, 136, x4)
+
+inst_35:
+// rs1_val == 536870912,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x3b
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x20000000, 0x3b, x2, 144, x4)
+
+inst_36:
+// rs1_val == 1073741824,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x6
+TEST_RR_OP(sll, x12, x10, x11, 0x1000000000, 0x40000000, 0x6, x2, 152, x4)
+
+inst_37:
+// rs1_val == 2147483648, rs2_val == 8
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0x8
+TEST_RR_OP(sll, x12, x10, x11, 0x8000000000, 0x80000000, 0x8, x2, 160, x4)
+
+inst_38:
+// rs1_val == 4294967296,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x12
+TEST_RR_OP(sll, x12, x10, x11, 0x4000000000000, 0x100000000, 0x12, x2, 168, x4)
+
+inst_39:
+// rs1_val == 8589934592,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:0x9
+TEST_RR_OP(sll, x12, x10, x11, 0x40000000000, 0x200000000, 0x9, x2, 176, x4)
+
+inst_40:
+// rs1_val == 17179869184,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:0x20
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x400000000, 0x20, x2, 184, x4)
+
+inst_41:
+// rs1_val == 34359738368,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:0x1
+TEST_RR_OP(sll, x12, x10, x11, 0x1000000000, 0x800000000, 0x1, x2, 192, x4)
+
+inst_42:
+// rs1_val == 68719476736,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:0xd
+TEST_RR_OP(sll, x12, x10, x11, 0x2000000000000, 0x1000000000, 0xd, x2, 200, x4)
+
+inst_43:
+// rs1_val == 137438953472, rs2_val == 42
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:0x2a
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x2000000000, 0x2a, x2, 208, x4)
+
+inst_44:
+// rs1_val == 274877906944,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:0x20
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x4000000000, 0x20, x2, 216, x4)
+
+inst_45:
+// rs1_val == 549755813888,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0x11
+TEST_RR_OP(sll, x12, x10, x11, 0x100000000000000, 0x8000000000, 0x11, x2, 224, x4)
+
+inst_46:
+// rs1_val == 1099511627776,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x2
+TEST_RR_OP(sll, x12, x10, x11, 0x40000000000, 0x10000000000, 0x2, x2, 232, x4)
+
+inst_47:
+// rs1_val == 2199023255552, rs2_val == 61
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:0x3d
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x20000000000, 0x3d, x2, 240, x4)
+
+inst_48:
+// rs1_val == 4398046511104,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:0xc
+TEST_RR_OP(sll, x12, x10, x11, 0x40000000000000, 0x40000000000, 0xc, x2, 248, x4)
+
+inst_49:
+// rs1_val == 8796093022208,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:0x2
+TEST_RR_OP(sll, x12, x10, x11, 0x200000000000, 0x80000000000, 0x2, x2, 256, x4)
+
+inst_50:
+// rs1_val == 35184372088832,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:0x1f
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x200000000000, 0x1f, x2, 264, x4)
+
+inst_51:
+// rs1_val == 70368744177664,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:0x9
+TEST_RR_OP(sll, x12, x10, x11, 0x80000000000000, 0x400000000000, 0x9, x2, 272, x4)
+
+inst_52:
+// rs1_val == 140737488355328,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:0x20
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x800000000000, 0x20, x2, 280, x4)
+
+inst_53:
+// rs1_val == 281474976710656,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0x3d
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x1000000000000, 0x3d, x2, 288, x4)
+
+inst_54:
+// rs1_val == 562949953421312,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:0x1
+TEST_RR_OP(sll, x12, x10, x11, 0x4000000000000, 0x2000000000000, 0x1, x2, 296, x4)
+
+inst_55:
+// rs1_val == 1125899906842624,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:0x3f
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x4000000000000, 0x3f, x2, 304, x4)
+
+inst_56:
+// rs1_val == 2251799813685248,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:0x0
+TEST_RR_OP(sll, x12, x10, x11, 0x8000000000000, 0x8000000000000, 0x0, x2, 312, x4)
+
+inst_57:
+// rs1_val == 4503599627370496,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:0x2
+TEST_RR_OP(sll, x12, x10, x11, 0x40000000000000, 0x10000000000000, 0x2, x2, 320, x4)
+
+inst_58:
+// rs1_val == 9007199254740992,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:0x3
+TEST_RR_OP(sll, x12, x10, x11, 0x100000000000000, 0x20000000000000, 0x3, x2, 328, x4)
+
+inst_59:
+// rs1_val == 18014398509481984,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:0xc
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x40000000000000, 0xc, x2, 336, x4)
+
+inst_60:
+// rs1_val == 36028797018963968,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:0x3b
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x80000000000000, 0x3b, x2, 344, x4)
+
+inst_61:
+// rs1_val == 72057594037927936,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:0xd
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x100000000000000, 0xd, x2, 352, x4)
+
+inst_62:
+// rs1_val == 144115188075855872,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:0x3b
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x200000000000000, 0x3b, x2, 360, x4)
+
+inst_63:
+// rs1_val == 288230376151711744,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:0x12
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x400000000000000, 0x12, x2, 368, x4)
+
+inst_64:
+// rs1_val == 576460752303423488,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:0x2a
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x800000000000000, 0x2a, x2, 376, x4)
+
+inst_65:
+// rs1_val == 1152921504606846976,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:0x2
+TEST_RR_OP(sll, x12, x10, x11, 0x4000000000000000, 0x1000000000000000, 0x2, x2, 384, x4)
+
+inst_66:
+// rs1_val == 2305843009213693952,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:0xf
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x2000000000000000, 0xf, x2, 392, x4)
+
+inst_67:
+// rs1_val == 4611686018427387904,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:0x3
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x4000000000000000, 0x3, x2, 400, x4)
+
+inst_68:
+// rs1_val == -2,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x10
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffffffe0000, -0x2, 0x10, x2, 408, x4)
+
+inst_69:
+// rs1_val == -3,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0x0
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffffffffffd, -0x3, 0x0, x2, 416, x4)
+
+inst_70:
+// rs1_val == -5,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0x1f
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffd80000000, -0x5, 0x1f, x2, 424, x4)
+
+inst_71:
+// rs1_val == -9,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x20
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffff700000000, -0x9, 0x20, x2, 432, x4)
+
+inst_72:
+// rs1_val == -17,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:0x13
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffffff780000, -0x11, 0x13, x2, 440, x4)
+
+inst_73:
+// rs1_val == -33,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x3f
+TEST_RR_OP(sll, x12, x10, x11, 0x8000000000000000, -0x21, 0x3f, x2, 448, x4)
+
+inst_74:
+// rs1_val == -65,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0xc
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffffffbf000, -0x41, 0xc, x2, 456, x4)
+
+inst_75:
+// rs1_val == -129,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x20
+TEST_RR_OP(sll, x12, x10, x11, 0xffffff7f00000000, -0x81, 0x20, x2, 464, x4)
+
+inst_76:
+// rs1_val == -257,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x4
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffffffffeff0, -0x101, 0x4, x2, 472, x4)
+
+inst_77:
+// rs1_val == -513,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x1f
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffeff80000000, -0x201, 0x1f, x2, 480, x4)
+
+inst_78:
+// rs1_val == -1025,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x4
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffffffffbff0, -0x401, 0x4, x2, 488, x4)
+
+inst_79:
+// rs1_val == -2049,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x8
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffffff7ff00, -0x801, 0x8, x2, 496, x4)
+
+inst_80:
+// rs1_val == -4097,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x4
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffffffefff0, -0x1001, 0x4, x2, 504, x4)
+
+inst_81:
+// rs1_val == -8193, rs2_val == 55
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x37
+TEST_RR_OP(sll, x12, x10, x11, 0xff80000000000000, -0x2001, 0x37, x2, 512, x4)
+
+inst_82:
+// rs1_val == -16385,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0xf
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffffdfff8000, -0x4001, 0xf, x2, 520, x4)
+
+inst_83:
+// rs1_val == -32769,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0xc
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffff7fff000, -0x8001, 0xc, x2, 528, x4)
+
+inst_84:
+// rs1_val == -65537,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x37
+TEST_RR_OP(sll, x12, x10, x11, 0xff80000000000000, -0x10001, 0x37, x2, 536, x4)
+
+inst_85:
+// rs1_val == -131073, rs2_val == 62
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x3e
+TEST_RR_OP(sll, x12, x10, x11, 0xc000000000000000, -0x20001, 0x3e, x2, 544, x4)
+
+inst_86:
+// rs1_val == -262145,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0x7
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffffdffff80, -0x40001, 0x7, x2, 552, x4)
+
+inst_87:
+// rs1_val == -524289, rs2_val == 21
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x15
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffeffffe00000, -0x80001, 0x15, x2, 560, x4)
+
+inst_88:
+// rs1_val == -1048577,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x2a
+TEST_RR_OP(sll, x12, x10, x11, 0xbffffc0000000000, -0x100001, 0x2a, x2, 568, x4)
+
+inst_89:
+// rs1_val == -36028797018963969,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:0x1f
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffff80000000, -0x80000000000001, 0x1f, x2, 576, x4)
+
+inst_90:
+// rs1_val == -72057594037927937,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:0x3d
+TEST_RR_OP(sll, x12, x10, x11, 0xe000000000000000, -0x100000000000001, 0x3d, x2, 584, x4)
+
+inst_91:
+// rs1_val == -144115188075855873, rs2_val == 47
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:0x2f
+TEST_RR_OP(sll, x12, x10, x11, 0xffff800000000000, -0x200000000000001, 0x2f, x2, 592, x4)
+
+inst_92:
+// rs1_val == -288230376151711745,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000000001; op2val:0x8
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffffffffff00, -0x400000000000001, 0x8, x2, 600, x4)
+
+inst_93:
+// rs1_val == -576460752303423489,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:0x2f
+TEST_RR_OP(sll, x12, x10, x11, 0xffff800000000000, -0x800000000000001, 0x2f, x2, 608, x4)
+
+inst_94:
+// rs1_val == -1152921504606846977,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:0xd
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffffffffe000, -0x1000000000000001, 0xd, x2, 616, x4)
+
+inst_95:
+// rs1_val == -2305843009213693953,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:0x12
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffffffc0000, -0x2000000000000001, 0x12, x2, 624, x4)
+
+inst_96:
+// rs1_val == -4611686018427387905,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:0x3d
+TEST_RR_OP(sll, x12, x10, x11, 0xe000000000000000, -0x4000000000000001, 0x3d, x2, 632, x4)
+
+inst_97:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3
+TEST_RR_OP(sll, x12, x10, x11, 0xaaaaaaaaaaaaaaa8, 0x5555555555555555, 0x3, x2, 640, x4)
+
+inst_98:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x2
+TEST_RR_OP(sll, x12, x10, x11, 0xaaaaaaaaaaaaaaa8, -0x5555555555555556, 0x2, x2, 648, x4)
+
+inst_99:
+// rs1_val==3,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(sll, x12, x10, x11, 0xc0, 0x3, 0x6, x2, 656, x4)
+
+inst_100:
+// rs1_val==5,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2a
+TEST_RR_OP(sll, x12, x10, x11, 0x140000000000, 0x5, 0x2a, x2, 664, x4)
+
+inst_101:
+// rs1_val==3689348814741910323,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x1
+TEST_RR_OP(sll, x12, x10, x11, 0x6666666666666666, 0x3333333333333333, 0x1, x2, 672, x4)
+
+inst_102:
+// rs1_val==7378697629483820646,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3
+TEST_RR_OP(sll, x12, x10, x11, 0x3333333333333330, 0x6666666666666666, 0x3, x2, 680, x4)
+
+inst_103:
+// rs1_val==-3037000499,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xe
+TEST_RR_OP(sll, x12, x10, x11, 0xffffd2bec3334000, -0xb504f333, 0xe, x2, 688, x4)
+
+inst_104:
+// rs1_val==3037000499,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x4
+TEST_RR_OP(sll, x12, x10, x11, 0xb504f3330, 0xb504f333, 0x4, x2, 696, x4)
+
+inst_105:
+// rs1_val==6148914691236517204,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5
+TEST_RR_OP(sll, x12, x10, x11, 0xaaaaaaaaaaaaaa80, 0x5555555555555554, 0x5, x2, 704, x4)
+
+inst_106:
+// rs1_val==3689348814741910322,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3f
+TEST_RR_OP(sll, x12, x10, x11, 0x0, 0x3333333333333332, 0x3f, x2, 712, x4)
+
+inst_107:
+// rs1_val==7378697629483820645,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x12
+TEST_RR_OP(sll, x12, x10, x11, 0x9999999999940000, 0x6666666666666665, 0x12, x2, 720, x4)
+
+inst_108:
+// rs1_val==3037000498,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x20
+TEST_RR_OP(sll, x12, x10, x11, 0xb504f33200000000, 0xb504f332, 0x20, x2, 728, x4)
+
+inst_109:
+// rs1_val==6148914691236517206,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x2
+TEST_RR_OP(sll, x12, x10, x11, 0x5555555555555558, 0x5555555555555556, 0x2, x2, 736, x4)
+
+inst_110:
+// rs1_val==-6148914691236517205,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6
+TEST_RR_OP(sll, x12, x10, x11, 0xaaaaaaaaaaaaaac0, -0x5555555555555555, 0x6, x2, 744, x4)
+
+inst_111:
+// rs1_val==6,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3b
+TEST_RR_OP(sll, x12, x10, x11, 0x3000000000000000, 0x6, 0x3b, x2, 752, x4)
+
+inst_112:
+// rs1_val==3689348814741910324,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x10
+TEST_RR_OP(sll, x12, x10, x11, 0x3333333333340000, 0x3333333333333334, 0x10, x2, 760, x4)
+
+inst_113:
+// rs1_val==7378697629483820647,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x2a
+TEST_RR_OP(sll, x12, x10, x11, 0x99999c0000000000, 0x6666666666666667, 0x2a, x2, 768, x4)
+
+inst_114:
+// rs1_val==-3037000498,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x2f
+TEST_RR_OP(sll, x12, x10, x11, 0x8667000000000000, -0xb504f332, 0x2f, x2, 776, x4)
+
+inst_115:
+// rs1_val==3037000500,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x7
+TEST_RR_OP(sll, x12, x10, x11, 0x5a82799a00, 0xb504f334, 0x7, x2, 784, x4)
+
+inst_116:
+// rs1_val == -2097153,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0x7
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffffefffff80, -0x200001, 0x7, x2, 792, x4)
+
+inst_117:
+// rs1_val == -4194305,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0xb
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffdfffff800, -0x400001, 0xb, x2, 800, x4)
+
+inst_118:
+// rs1_val == -8388609,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x2f
+TEST_RR_OP(sll, x12, x10, x11, 0xffff800000000000, -0x800001, 0x2f, x2, 808, x4)
+
+inst_119:
+// rs1_val == -16777217,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0x11
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffdfffffe0000, -0x1000001, 0x11, x2, 816, x4)
+
+inst_120:
+// rs1_val == -33554433,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x0
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffffdffffff, -0x2000001, 0x0, x2, 824, x4)
+
+inst_121:
+// rs1_val == -67108865,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x37
+TEST_RR_OP(sll, x12, x10, x11, 0xff80000000000000, -0x4000001, 0x37, x2, 832, x4)
+
+inst_122:
+// rs1_val == -134217729,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x2
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffffdffffffc, -0x8000001, 0x2, x2, 840, x4)
+
+inst_123:
+// rs1_val == -268435457,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x1f
+TEST_RR_OP(sll, x12, x10, x11, 0xf7ffffff80000000, -0x10000001, 0x1f, x2, 848, x4)
+
+inst_124:
+// rs1_val == -536870913,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x3
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffefffffff8, -0x20000001, 0x3, x2, 856, x4)
+
+inst_125:
+// rs1_val == -1073741825,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x3f
+TEST_RR_OP(sll, x12, x10, x11, 0x8000000000000000, -0x40000001, 0x3f, x2, 864, x4)
+
+inst_126:
+// rs1_val == -2147483649,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:0x6
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffdfffffffc0, -0x80000001, 0x6, x2, 872, x4)
+
+inst_127:
+// rs1_val == -4294967297,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:0x3e
+TEST_RR_OP(sll, x12, x10, x11, 0xc000000000000000, -0x100000001, 0x3e, x2, 880, x4)
+
+inst_128:
+// rs1_val == -8589934593,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:0xb
+TEST_RR_OP(sll, x12, x10, x11, 0xffffeffffffff800, -0x200000001, 0xb, x2, 888, x4)
+
+inst_129:
+// rs1_val == -17179869185,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:0xf
+TEST_RR_OP(sll, x12, x10, x11, 0xfffdffffffff8000, -0x400000001, 0xf, x2, 896, x4)
+
+inst_130:
+// rs1_val == -34359738369,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:0x3
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffbffffffff8, -0x800000001, 0x3, x2, 904, x4)
+
+inst_131:
+// rs1_val == -68719476737,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:0x37
+TEST_RR_OP(sll, x12, x10, x11, 0xff80000000000000, -0x1000000001, 0x37, x2, 912, x4)
+
+inst_132:
+// rs1_val == -137438953473,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:0x9
+TEST_RR_OP(sll, x12, x10, x11, 0xffffbffffffffe00, -0x2000000001, 0x9, x2, 920, x4)
+
+inst_133:
+// rs1_val == -549755813889,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:0xe
+TEST_RR_OP(sll, x12, x10, x11, 0xffdfffffffffc000, -0x8000000001, 0xe, x2, 928, x4)
+
+inst_134:
+// rs1_val == -1099511627777,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:0x2a
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffc0000000000, -0x10000000001, 0x2a, x2, 936, x4)
+
+inst_135:
+// rs1_val == -2199023255553,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:0x7
+TEST_RR_OP(sll, x12, x10, x11, 0xfffeffffffffff80, -0x20000000001, 0x7, x2, 944, x4)
+
+inst_136:
+// rs1_val == -4398046511105,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:0x6
+TEST_RR_OP(sll, x12, x10, x11, 0xfffeffffffffffc0, -0x40000000001, 0x6, x2, 952, x4)
+
+inst_137:
+// rs1_val == -8796093022209,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:0xb
+TEST_RR_OP(sll, x12, x10, x11, 0xffbffffffffff800, -0x80000000001, 0xb, x2, 960, x4)
+
+inst_138:
+// rs1_val == -17592186044417,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:0x20
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffff00000000, -0x100000000001, 0x20, x2, 968, x4)
+
+inst_139:
+// rs1_val == -35184372088833,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:0x1
+TEST_RR_OP(sll, x12, x10, x11, 0xffffbffffffffffe, -0x200000000001, 0x1, x2, 976, x4)
+
+inst_140:
+// rs1_val == -70368744177665,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:0x2
+TEST_RR_OP(sll, x12, x10, x11, 0xfffefffffffffffc, -0x400000000001, 0x2, x2, 984, x4)
+
+inst_141:
+// rs1_val == -140737488355329,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:0xe
+TEST_RR_OP(sll, x12, x10, x11, 0xdfffffffffffc000, -0x800000000001, 0xe, x2, 992, x4)
+
+inst_142:
+// rs1_val == -281474976710657,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:0x5
+TEST_RR_OP(sll, x12, x10, x11, 0xffdfffffffffffe0, -0x1000000000001, 0x5, x2, 1000, x4)
+
+inst_143:
+// rs1_val == -562949953421313,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:0xe
+TEST_RR_OP(sll, x12, x10, x11, 0x7fffffffffffc000, -0x2000000000001, 0xe, x2, 1008, x4)
+
+inst_144:
+// rs1_val == -1125899906842625,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:0x11
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffffffe0000, -0x4000000000001, 0x11, x2, 1016, x4)
+
+inst_145:
+// rs1_val == -2251799813685249,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:0x37
+TEST_RR_OP(sll, x12, x10, x11, 0xff80000000000000, -0x8000000000001, 0x37, x2, 1024, x4)
+
+inst_146:
+// rs1_val == -4503599627370497,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:0x10
+TEST_RR_OP(sll, x12, x10, x11, 0xffffffffffff0000, -0x10000000000001, 0x10, x2, 1032, x4)
+
+inst_147:
+// rs1_val == -9007199254740993,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:0x13
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffffff80000, -0x20000000000001, 0x13, x2, 1040, x4)
+
+inst_148:
+// rs1_val == -18014398509481985,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:0xa
+TEST_RR_OP(sll, x12, x10, x11, 0xfffffffffffffc00, -0x40000000000001, 0xa, x2, 1048, x4)
+
+inst_149:
+// rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == -274877906945
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0xa
+TEST_RR_OP(sll, x12, x10, x11, 0xfffefffffffffc00, -0x4000000001, 0xa, x2, 1056, x4)
+
+inst_150:
+// rs1_val == 131072, rs2_val == 2
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0x2
+TEST_RR_OP(sll, x12, x10, x11, 0x80000, 0x20000, 0x2, x2, 1064, x4)
+
+inst_151:
+// rs1_val == 1048576,
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0x2
+TEST_RR_OP(sll, x12, x10, x11, 0x400000, 0x100000, 0x2, x2, 1072, x4)
+
+inst_152:
+// rs1_val == 16777216, rs2_val == 32
+// opcode: sll ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0x20
+TEST_RR_OP(sll, x12, x10, x11, 0x100000000000000, 0x1000000, 0x20, x2, 1080, x4)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 17*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 136*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/slli-01.S b/riscof/suite/rv64i_m/I/slli-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..117d5b9a8ab18ebc54cac7f763716cbfcaf752e5
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/slli-01.S
@@ -0,0 +1,829 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the slli instruction of the RISC-V I extension for the slli covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",slli)
+
+RVTEST_SIGBASE( x3,signature_x3_1)
+
+inst_0:
+// rs1 == rd, rs1==x5, rd==x5, rs1_val < 0 and imm_val > 0 and imm_val < xlen, rs1_val == -257
+// opcode: slli ; op1:x5; dest:x5; op1val:-0x101; immval:0xf
+TEST_IMM_OP( slli, x5, x5, 0xffffffffff7f8000, -0x101, 0xf, x3, 0, x17)
+
+inst_1:
+// rs1 != rd, rs1==x8, rd==x13, rs1_val > 0 and imm_val > 0 and imm_val < xlen, rs1_val==4, rs1_val == 4
+// opcode: slli ; op1:x8; dest:x13; op1val:0x4; immval:0xe
+TEST_IMM_OP( slli, x13, x8, 0x10000, 0x4, 0xe, x3, 8, x17)
+
+inst_2:
+// rs1==x29, rd==x21, rs1_val < 0 and imm_val == 0, rs1_val == -9
+// opcode: slli ; op1:x29; dest:x21; op1val:-0x9; immval:0x0
+TEST_IMM_OP( slli, x21, x29, 0xfffffffffffffff7, -0x9, 0x0, x3, 16, x17)
+
+inst_3:
+// rs1==x28, rd==x16, rs1_val > 0 and imm_val == 0,
+// opcode: slli ; op1:x28; dest:x16; op1val:0x4; immval:0x0
+TEST_IMM_OP( slli, x16, x28, 0x4, 0x4, 0x0, x3, 24, x17)
+
+inst_4:
+// rs1==x15, rd==x10, rs1_val < 0 and imm_val == (xlen-1), rs1_val == -536870913
+// opcode: slli ; op1:x15; dest:x10; op1val:-0x20000001; immval:0x3f
+TEST_IMM_OP( slli, x10, x15, 0x8000000000000000, -0x20000001, 0x3f, x3, 32, x17)
+
+inst_5:
+// rs1==x19, rd==x12, rs1_val > 0 and imm_val == (xlen-1), rs1_val == 4503599627370496
+// opcode: slli ; op1:x19; dest:x12; op1val:0x10000000000000; immval:0x3f
+TEST_IMM_OP( slli, x12, x19, 0x0, 0x10000000000000, 0x3f, x3, 40, x17)
+
+inst_6:
+// rs1==x22, rd==x8, rs1_val == imm_val and imm_val > 0 and imm_val < xlen, imm_val == 2, rs1_val == 2, rs1_val==2
+// opcode: slli ; op1:x22; dest:x8; op1val:0x2; immval:0x2
+TEST_IMM_OP( slli, x8, x22, 0x8, 0x2, 0x2, x3, 48, x17)
+
+inst_7:
+// rs1==x6, rd==x7, rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < xlen, rs1_val == -9223372036854775808
+// opcode: slli ; op1:x6; dest:x7; op1val:-0x8000000000000000; immval:0xb
+TEST_IMM_OP( slli, x7, x6, 0x0, -0x8000000000000000, 0xb, x3, 56, x17)
+
+inst_8:
+// rs1==x27, rd==x24, rs1_val == 0 and imm_val >= 0 and imm_val < xlen, rs1_val==0
+// opcode: slli ; op1:x27; dest:x24; op1val:0x0; immval:0xf
+TEST_IMM_OP( slli, x24, x27, 0x0, 0x0, 0xf, x3, 64, x17)
+
+inst_9:
+// rs1==x23, rd==x11, rs1_val == (2**(xlen-1)-1) and imm_val >= 0 and imm_val < xlen, rs1_val == 9223372036854775807
+// opcode: slli ; op1:x23; dest:x11; op1val:0x7fffffffffffffff; immval:0x7
+TEST_IMM_OP( slli, x11, x23, 0xffffffffffffff80, 0x7fffffffffffffff, 0x7, x3, 72, x17)
+
+inst_10:
+// rs1==x14, rd==x9, rs1_val == 1 and imm_val >= 0 and imm_val < xlen, rs1_val == 1, imm_val == 59
+// opcode: slli ; op1:x14; dest:x9; op1val:0x1; immval:0x3b
+TEST_IMM_OP( slli, x9, x14, 0x800000000000000, 0x1, 0x3b, x3, 80, x17)
+
+inst_11:
+// rs1==x26, rd==x14, rs1_val == 8, imm_val == 47
+// opcode: slli ; op1:x26; dest:x14; op1val:0x8; immval:0x2f
+TEST_IMM_OP( slli, x14, x26, 0x4000000000000, 0x8, 0x2f, x3, 88, x17)
+
+inst_12:
+// rs1==x7, rd==x0, rs1_val == 16,
+// opcode: slli ; op1:x7; dest:x0; op1val:0x10; immval:0xe
+TEST_IMM_OP( slli, x0, x7, 0, 0x10, 0xe, x3, 96, x17)
+
+inst_13:
+// rs1==x30, rd==x18, rs1_val == 32,
+// opcode: slli ; op1:x30; dest:x18; op1val:0x20; immval:0x5
+TEST_IMM_OP( slli, x18, x30, 0x400, 0x20, 0x5, x3, 104, x17)
+
+inst_14:
+// rs1==x24, rd==x28, rs1_val == 64,
+// opcode: slli ; op1:x24; dest:x28; op1val:0x40; immval:0x2f
+TEST_IMM_OP( slli, x28, x24, 0x20000000000000, 0x40, 0x2f, x3, 112, x17)
+
+inst_15:
+// rs1==x4, rd==x1, rs1_val == 128,
+// opcode: slli ; op1:x4; dest:x1; op1val:0x80; immval:0x12
+TEST_IMM_OP( slli, x1, x4, 0x2000000, 0x80, 0x12, x3, 120, x17)
+
+inst_16:
+// rs1==x10, rd==x25, rs1_val == 256, imm_val == 61
+// opcode: slli ; op1:x10; dest:x25; op1val:0x100; immval:0x3d
+TEST_IMM_OP( slli, x25, x10, 0x0, 0x100, 0x3d, x3, 128, x17)
+
+inst_17:
+// rs1==x16, rd==x19, rs1_val == 512, imm_val == 31
+// opcode: slli ; op1:x16; dest:x19; op1val:0x200; immval:0x1f
+TEST_IMM_OP( slli, x19, x16, 0x10000000000, 0x200, 0x1f, x3, 136, x17)
+
+inst_18:
+// rs1==x2, rd==x31, rs1_val == 1024,
+// opcode: slli ; op1:x2; dest:x31; op1val:0x400; immval:0xa
+TEST_IMM_OP( slli, x31, x2, 0x100000, 0x400, 0xa, x3, 144, x17)
+RVTEST_SIGBASE( x5,signature_x5_0)
+
+inst_19:
+// rs1==x1, rd==x4, rs1_val == 2048,
+// opcode: slli ; op1:x1; dest:x4; op1val:0x800; immval:0x1f
+TEST_IMM_OP( slli, x4, x1, 0x40000000000, 0x800, 0x1f, x5, 0, x7)
+
+inst_20:
+// rs1==x3, rd==x29, rs1_val == 4096,
+// opcode: slli ; op1:x3; dest:x29; op1val:0x1000; immval:0x0
+TEST_IMM_OP( slli, x29, x3, 0x1000, 0x1000, 0x0, x5, 8, x7)
+
+inst_21:
+// rs1==x25, rd==x6, rs1_val == 8192,
+// opcode: slli ; op1:x25; dest:x6; op1val:0x2000; immval:0xa
+TEST_IMM_OP( slli, x6, x25, 0x800000, 0x2000, 0xa, x5, 16, x7)
+
+inst_22:
+// rs1==x12, rd==x23, rs1_val == 16384,
+// opcode: slli ; op1:x12; dest:x23; op1val:0x4000; immval:0x9
+TEST_IMM_OP( slli, x23, x12, 0x800000, 0x4000, 0x9, x5, 24, x7)
+
+inst_23:
+// rs1==x21, rd==x3, rs1_val == 32768,
+// opcode: slli ; op1:x21; dest:x3; op1val:0x8000; immval:0xc
+TEST_IMM_OP( slli, x3, x21, 0x8000000, 0x8000, 0xc, x5, 32, x7)
+
+inst_24:
+// rs1==x9, rd==x17, rs1_val == 65536,
+// opcode: slli ; op1:x9; dest:x17; op1val:0x10000; immval:0x3b
+TEST_IMM_OP( slli, x17, x9, 0x0, 0x10000, 0x3b, x5, 40, x7)
+
+inst_25:
+// rs1==x13, rd==x15, rs1_val == 131072,
+// opcode: slli ; op1:x13; dest:x15; op1val:0x20000; immval:0xe
+TEST_IMM_OP( slli, x15, x13, 0x80000000, 0x20000, 0xe, x5, 48, x7)
+
+inst_26:
+// rs1==x11, rd==x22, rs1_val == 262144,
+// opcode: slli ; op1:x11; dest:x22; op1val:0x40000; immval:0x13
+TEST_IMM_OP( slli, x22, x11, 0x2000000000, 0x40000, 0x13, x5, 56, x7)
+
+inst_27:
+// rs1==x20, rd==x26, rs1_val == 524288,
+// opcode: slli ; op1:x20; dest:x26; op1val:0x80000; immval:0x7
+TEST_IMM_OP( slli, x26, x20, 0x4000000, 0x80000, 0x7, x5, 64, x7)
+
+inst_28:
+// rs1==x31, rd==x2, rs1_val == 1048576,
+// opcode: slli ; op1:x31; dest:x2; op1val:0x100000; immval:0x12
+TEST_IMM_OP( slli, x2, x31, 0x4000000000, 0x100000, 0x12, x5, 72, x7)
+
+inst_29:
+// rs1==x17, rd==x20, rs1_val == 2097152,
+// opcode: slli ; op1:x17; dest:x20; op1val:0x200000; immval:0xc
+TEST_IMM_OP( slli, x20, x17, 0x200000000, 0x200000, 0xc, x5, 80, x7)
+
+inst_30:
+// rs1==x0, rd==x27, rs1_val == 4194304,
+// opcode: slli ; op1:x0; dest:x27; op1val:0x0; immval:0x1f
+TEST_IMM_OP( slli, x27, x0, 0x0, 0x0, 0x1f, x5, 88, x7)
+
+inst_31:
+// rs1==x18, rd==x30, rs1_val == 8388608,
+// opcode: slli ; op1:x18; dest:x30; op1val:0x800000; immval:0x9
+TEST_IMM_OP( slli, x30, x18, 0x100000000, 0x800000, 0x9, x5, 96, x7)
+
+inst_32:
+// rs1_val == 16777216,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x1000000; immval:0xe
+TEST_IMM_OP( slli, x11, x10, 0x4000000000, 0x1000000, 0xe, x5, 104, x7)
+
+inst_33:
+// rs1_val == 33554432,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x2000000; immval:0x7
+TEST_IMM_OP( slli, x11, x10, 0x100000000, 0x2000000, 0x7, x5, 112, x7)
+
+inst_34:
+// rs1_val == 67108864,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x4000000; immval:0x0
+TEST_IMM_OP( slli, x11, x10, 0x4000000, 0x4000000, 0x0, x5, 120, x7)
+
+inst_35:
+// rs1_val == 134217728,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x8000000; immval:0x3f
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x8000000, 0x3f, x5, 128, x7)
+
+inst_36:
+// rs1_val == 268435456,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x10000000; immval:0x11
+TEST_IMM_OP( slli, x11, x10, 0x200000000000, 0x10000000, 0x11, x5, 136, x7)
+
+inst_37:
+// rs1_val == 536870912,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x20000000; immval:0xa
+TEST_IMM_OP( slli, x11, x10, 0x8000000000, 0x20000000, 0xa, x5, 144, x7)
+
+inst_38:
+// rs1_val == 1073741824,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x40000000; immval:0x11
+TEST_IMM_OP( slli, x11, x10, 0x800000000000, 0x40000000, 0x11, x5, 152, x7)
+
+inst_39:
+// rs1_val == 2147483648, imm_val == 8
+// opcode: slli ; op1:x10; dest:x11; op1val:0x80000000; immval:0x8
+TEST_IMM_OP( slli, x11, x10, 0x8000000000, 0x80000000, 0x8, x5, 160, x7)
+
+inst_40:
+// rs1_val == 4294967296,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x100000000; immval:0xa
+TEST_IMM_OP( slli, x11, x10, 0x40000000000, 0x100000000, 0xa, x5, 168, x7)
+
+inst_41:
+// rs1_val == 8589934592, imm_val == 21
+// opcode: slli ; op1:x10; dest:x11; op1val:0x200000000; immval:0x15
+TEST_IMM_OP( slli, x11, x10, 0x40000000000000, 0x200000000, 0x15, x5, 176, x7)
+
+inst_42:
+// rs1_val == 17179869184,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x400000000; immval:0x7
+TEST_IMM_OP( slli, x11, x10, 0x20000000000, 0x400000000, 0x7, x5, 184, x7)
+
+inst_43:
+// rs1_val == 34359738368, imm_val == 55
+// opcode: slli ; op1:x10; dest:x11; op1val:0x800000000; immval:0x37
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x800000000, 0x37, x5, 192, x7)
+
+inst_44:
+// rs1_val == 68719476736,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x1000000000; immval:0xf
+TEST_IMM_OP( slli, x11, x10, 0x8000000000000, 0x1000000000, 0xf, x5, 200, x7)
+
+inst_45:
+// rs1_val == 137438953472,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x2000000000; immval:0x15
+TEST_IMM_OP( slli, x11, x10, 0x400000000000000, 0x2000000000, 0x15, x5, 208, x7)
+
+inst_46:
+// rs1_val == 274877906944, imm_val == 42
+// opcode: slli ; op1:x10; dest:x11; op1val:0x4000000000; immval:0x2a
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x4000000000, 0x2a, x5, 216, x7)
+
+inst_47:
+// rs1_val == 549755813888,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x8000000000; immval:0x3
+TEST_IMM_OP( slli, x11, x10, 0x40000000000, 0x8000000000, 0x3, x5, 224, x7)
+
+inst_48:
+// rs1_val == 1099511627776,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x10000000000; immval:0x3f
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x10000000000, 0x3f, x5, 232, x7)
+
+inst_49:
+// rs1_val == 2199023255552,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x20000000000; immval:0x11
+TEST_IMM_OP( slli, x11, x10, 0x400000000000000, 0x20000000000, 0x11, x5, 240, x7)
+
+inst_50:
+// rs1_val == 4398046511104,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x40000000000; immval:0x7
+TEST_IMM_OP( slli, x11, x10, 0x2000000000000, 0x40000000000, 0x7, x5, 248, x7)
+
+inst_51:
+// rs1_val == 8796093022208,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x80000000000; immval:0x13
+TEST_IMM_OP( slli, x11, x10, 0x4000000000000000, 0x80000000000, 0x13, x5, 256, x7)
+
+inst_52:
+// rs1_val == 17592186044416,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x100000000000; immval:0x2f
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x100000000000, 0x2f, x5, 264, x7)
+
+inst_53:
+// rs1_val == 35184372088832, imm_val == 62
+// opcode: slli ; op1:x10; dest:x11; op1val:0x200000000000; immval:0x3e
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x200000000000, 0x3e, x5, 272, x7)
+
+inst_54:
+// rs1_val == 70368744177664,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x400000000000; immval:0x9
+TEST_IMM_OP( slli, x11, x10, 0x80000000000000, 0x400000000000, 0x9, x5, 280, x7)
+
+inst_55:
+// rs1_val == 140737488355328,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x800000000000; immval:0x15
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x800000000000, 0x15, x5, 288, x7)
+
+inst_56:
+// rs1_val == 281474976710656, imm_val == 1
+// opcode: slli ; op1:x10; dest:x11; op1val:0x1000000000000; immval:0x1
+TEST_IMM_OP( slli, x11, x10, 0x2000000000000, 0x1000000000000, 0x1, x5, 296, x7)
+
+inst_57:
+// rs1_val == 562949953421312, imm_val == 4
+// opcode: slli ; op1:x10; dest:x11; op1val:0x2000000000000; immval:0x4
+TEST_IMM_OP( slli, x11, x10, 0x20000000000000, 0x2000000000000, 0x4, x5, 304, x7)
+
+inst_58:
+// rs1_val == 1125899906842624,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x4000000000000; immval:0x1
+TEST_IMM_OP( slli, x11, x10, 0x8000000000000, 0x4000000000000, 0x1, x5, 312, x7)
+
+inst_59:
+// rs1_val == 2251799813685248,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x8000000000000; immval:0x6
+TEST_IMM_OP( slli, x11, x10, 0x200000000000000, 0x8000000000000, 0x6, x5, 320, x7)
+
+inst_60:
+// rs1_val == 9007199254740992,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x20000000000000; immval:0xc
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x20000000000000, 0xc, x5, 328, x7)
+
+inst_61:
+// rs1_val == 18014398509481984,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x40000000000000; immval:0x3f
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x40000000000000, 0x3f, x5, 336, x7)
+
+inst_62:
+// rs1_val == 36028797018963968,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x80000000000000; immval:0x2
+TEST_IMM_OP( slli, x11, x10, 0x200000000000000, 0x80000000000000, 0x2, x5, 344, x7)
+
+inst_63:
+// rs1_val == 72057594037927936,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x100000000000000; immval:0xf
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x100000000000000, 0xf, x5, 352, x7)
+
+inst_64:
+// rs1_val == 144115188075855872,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x200000000000000; immval:0x5
+TEST_IMM_OP( slli, x11, x10, 0x4000000000000000, 0x200000000000000, 0x5, x5, 360, x7)
+
+inst_65:
+// rs1_val == 288230376151711744,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x400000000000000; immval:0x2f
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x400000000000000, 0x2f, x5, 368, x7)
+
+inst_66:
+// rs1_val == 576460752303423488,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x800000000000000; immval:0x13
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x800000000000000, 0x13, x5, 376, x7)
+
+inst_67:
+// rs1_val == 1152921504606846976,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x1000000000000000; immval:0x15
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x1000000000000000, 0x15, x5, 384, x7)
+
+inst_68:
+// rs1_val == 2305843009213693952,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x2000000000000000; immval:0x1
+TEST_IMM_OP( slli, x11, x10, 0x4000000000000000, 0x2000000000000000, 0x1, x5, 392, x7)
+
+inst_69:
+// rs1_val == 4611686018427387904,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x4000000000000000; immval:0x3b
+TEST_IMM_OP( slli, x11, x10, 0x0, 0x4000000000000000, 0x3b, x5, 400, x7)
+
+inst_70:
+// rs1_val == -2,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x2; immval:0x37
+TEST_IMM_OP( slli, x11, x10, 0xff00000000000000, -0x2, 0x37, x5, 408, x7)
+
+inst_71:
+// rs1_val == -3,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x3; immval:0x13
+TEST_IMM_OP( slli, x11, x10, 0xffffffffffe80000, -0x3, 0x13, x5, 416, x7)
+
+inst_72:
+// rs1_val == -5,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x5; immval:0x3b
+TEST_IMM_OP( slli, x11, x10, 0xd800000000000000, -0x5, 0x3b, x5, 424, x7)
+
+inst_73:
+// rs1_val == -17,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x11; immval:0x12
+TEST_IMM_OP( slli, x11, x10, 0xffffffffffbc0000, -0x11, 0x12, x5, 432, x7)
+
+inst_74:
+// rs1_val == -33,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x21; immval:0x3f
+TEST_IMM_OP( slli, x11, x10, 0x8000000000000000, -0x21, 0x3f, x5, 440, x7)
+
+inst_75:
+// rs1_val == -65,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x41; immval:0x13
+TEST_IMM_OP( slli, x11, x10, 0xfffffffffdf80000, -0x41, 0x13, x5, 448, x7)
+
+inst_76:
+// rs1_val == -129,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x81; immval:0x3b
+TEST_IMM_OP( slli, x11, x10, 0xf800000000000000, -0x81, 0x3b, x5, 456, x7)
+
+inst_77:
+// rs1_val == -513,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x201; immval:0x12
+TEST_IMM_OP( slli, x11, x10, 0xfffffffff7fc0000, -0x201, 0x12, x5, 464, x7)
+
+inst_78:
+// rs1_val == -1025,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x401; immval:0x3e
+TEST_IMM_OP( slli, x11, x10, 0xc000000000000000, -0x401, 0x3e, x5, 472, x7)
+
+inst_79:
+// rs1_val == -2049,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x801; immval:0x1
+TEST_IMM_OP( slli, x11, x10, 0xffffffffffffeffe, -0x801, 0x1, x5, 480, x7)
+
+inst_80:
+// rs1_val == -4097,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x1001; immval:0x1f
+TEST_IMM_OP( slli, x11, x10, 0xfffff7ff80000000, -0x1001, 0x1f, x5, 488, x7)
+
+inst_81:
+// rs1_val == -8193,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x2001; immval:0x2
+TEST_IMM_OP( slli, x11, x10, 0xffffffffffff7ffc, -0x2001, 0x2, x5, 496, x7)
+
+inst_82:
+// rs1_val == -16385,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x4001; immval:0xc
+TEST_IMM_OP( slli, x11, x10, 0xfffffffffbfff000, -0x4001, 0xc, x5, 504, x7)
+
+inst_83:
+// rs1_val == -32769,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x8001; immval:0xd
+TEST_IMM_OP( slli, x11, x10, 0xffffffffefffe000, -0x8001, 0xd, x5, 512, x7)
+
+inst_84:
+// rs1_val == -65537,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x10001; immval:0x2
+TEST_IMM_OP( slli, x11, x10, 0xfffffffffffbfffc, -0x10001, 0x2, x5, 520, x7)
+
+inst_85:
+// rs1_val == -131073,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x20001; immval:0x3d
+TEST_IMM_OP( slli, x11, x10, 0xe000000000000000, -0x20001, 0x3d, x5, 528, x7)
+
+inst_86:
+// rs1_val == -262145,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x40001; immval:0x3f
+TEST_IMM_OP( slli, x11, x10, 0x8000000000000000, -0x40001, 0x3f, x5, 536, x7)
+
+inst_87:
+// rs1_val == -524289,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x80001; immval:0xc
+TEST_IMM_OP( slli, x11, x10, 0xffffffff7ffff000, -0x80001, 0xc, x5, 544, x7)
+
+inst_88:
+// rs1_val == -1048577,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x100001; immval:0xe
+TEST_IMM_OP( slli, x11, x10, 0xfffffffbffffc000, -0x100001, 0xe, x5, 552, x7)
+
+inst_89:
+// rs1_val == -2097153,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x200001; immval:0x3f
+TEST_IMM_OP( slli, x11, x10, 0x8000000000000000, -0x200001, 0x3f, x5, 560, x7)
+
+inst_90:
+// rs1_val == -9007199254740993,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x20000000000001; immval:0xf
+TEST_IMM_OP( slli, x11, x10, 0xffffffffffff8000, -0x20000000000001, 0xf, x5, 568, x7)
+
+inst_91:
+// rs1_val == -18014398509481985,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x40000000000001; immval:0x3e
+TEST_IMM_OP( slli, x11, x10, 0xc000000000000000, -0x40000000000001, 0x3e, x5, 576, x7)
+
+inst_92:
+// rs1_val == -36028797018963969,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x80000000000001; immval:0x3
+TEST_IMM_OP( slli, x11, x10, 0xfbfffffffffffff8, -0x80000000000001, 0x3, x5, 584, x7)
+
+inst_93:
+// rs1_val == -72057594037927937,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x100000000000001; immval:0xc
+TEST_IMM_OP( slli, x11, x10, 0xfffffffffffff000, -0x100000000000001, 0xc, x5, 592, x7)
+
+inst_94:
+// rs1_val == -144115188075855873,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x200000000000001; immval:0x0
+TEST_IMM_OP( slli, x11, x10, 0xfdffffffffffffff, -0x200000000000001, 0x0, x5, 600, x7)
+
+inst_95:
+// rs1_val == -288230376151711745,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x400000000000001; immval:0x3
+TEST_IMM_OP( slli, x11, x10, 0xdffffffffffffff8, -0x400000000000001, 0x3, x5, 608, x7)
+
+inst_96:
+// rs1_val == -576460752303423489,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x800000000000001; immval:0x2
+TEST_IMM_OP( slli, x11, x10, 0xdffffffffffffffc, -0x800000000000001, 0x2, x5, 616, x7)
+
+inst_97:
+// rs1_val == -1152921504606846977,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x1000000000000001; immval:0x4
+TEST_IMM_OP( slli, x11, x10, 0xfffffffffffffff0, -0x1000000000000001, 0x4, x5, 624, x7)
+
+inst_98:
+// rs1_val == -2305843009213693953, imm_val == 16
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x2000000000000001; immval:0x10
+TEST_IMM_OP( slli, x11, x10, 0xffffffffffff0000, -0x2000000000000001, 0x10, x5, 632, x7)
+
+inst_99:
+// rs1_val == -4611686018427387905,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x4000000000000001; immval:0x3e
+TEST_IMM_OP( slli, x11, x10, 0xc000000000000000, -0x4000000000000001, 0x3e, x5, 640, x7)
+
+inst_100:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode: slli ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2
+TEST_IMM_OP( slli, x11, x10, 0x5555555555555554, 0x5555555555555555, 0x2, x5, 648, x7)
+
+inst_101:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2
+TEST_IMM_OP( slli, x11, x10, 0xaaaaaaaaaaaaaaa8, -0x5555555555555556, 0x2, x5, 656, x7)
+
+inst_102:
+// rs1_val==3,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x3; immval:0x10
+TEST_IMM_OP( slli, x11, x10, 0x30000, 0x3, 0x10, x5, 664, x7)
+
+inst_103:
+// rs1_val==5,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x5; immval:0x3b
+TEST_IMM_OP( slli, x11, x10, 0x2800000000000000, 0x5, 0x3b, x5, 672, x7)
+
+inst_104:
+// rs1_val==3689348814741910323,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2a
+TEST_IMM_OP( slli, x11, x10, 0xcccccc0000000000, 0x3333333333333333, 0x2a, x5, 680, x7)
+
+inst_105:
+// rs1_val==7378697629483820646,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0xa
+TEST_IMM_OP( slli, x11, x10, 0x9999999999999800, 0x6666666666666666, 0xa, x5, 688, x7)
+
+inst_106:
+// rs1_val==-3037000499,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x3b
+TEST_IMM_OP( slli, x11, x10, 0x6800000000000000, -0xb504f333, 0x3b, x5, 696, x7)
+
+inst_107:
+// rs1_val==3037000499,
+// opcode: slli ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x9
+TEST_IMM_OP( slli, x11, x10, 0x16a09e66600, 0xb504f333, 0x9, x5, 704, x7)
+
+inst_108:
+// rs1_val==6148914691236517204,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x10
+TEST_IMM_OP( slli, x11, x10, 0x5555555555540000, 0x5555555555555554, 0x10, x5, 712, x7)
+
+inst_109:
+// rs1_val==3689348814741910322,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x37
+TEST_IMM_OP( slli, x11, x10, 0x9900000000000000, 0x3333333333333332, 0x37, x5, 720, x7)
+
+inst_110:
+// rs1_val==7378697629483820645,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x3e
+TEST_IMM_OP( slli, x11, x10, 0x4000000000000000, 0x6666666666666665, 0x3e, x5, 728, x7)
+
+inst_111:
+// rs1_val==3037000498,
+// opcode: slli ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x13
+TEST_IMM_OP( slli, x11, x10, 0x5a82799900000, 0xb504f332, 0x13, x5, 736, x7)
+
+inst_112:
+// rs1_val==6148914691236517206,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x12
+TEST_IMM_OP( slli, x11, x10, 0x5555555555580000, 0x5555555555555556, 0x12, x5, 744, x7)
+
+inst_113:
+// rs1_val==-6148914691236517205,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0xf
+TEST_IMM_OP( slli, x11, x10, 0x5555555555558000, -0x5555555555555555, 0xf, x5, 752, x7)
+
+inst_114:
+// rs1_val==6,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x6; immval:0x7
+TEST_IMM_OP( slli, x11, x10, 0x300, 0x6, 0x7, x5, 760, x7)
+
+inst_115:
+// rs1_val==3689348814741910324,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x7
+TEST_IMM_OP( slli, x11, x10, 0x9999999999999a00, 0x3333333333333334, 0x7, x5, 768, x7)
+
+inst_116:
+// rs1_val==7378697629483820647, imm_val == 32
+// opcode: slli ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x20
+TEST_IMM_OP( slli, x11, x10, 0x6666666700000000, 0x6666666666666667, 0x20, x5, 776, x7)
+
+inst_117:
+// rs1_val==-3037000498,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x8
+TEST_IMM_OP( slli, x11, x10, 0xffffff4afb0cce00, -0xb504f332, 0x8, x5, 784, x7)
+
+inst_118:
+// rs1_val == -4194305,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x400001; immval:0x6
+TEST_IMM_OP( slli, x11, x10, 0xffffffffefffffc0, -0x400001, 0x6, x5, 792, x7)
+
+inst_119:
+// rs1_val==3037000500,
+// opcode: slli ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x3e
+TEST_IMM_OP( slli, x11, x10, 0x0, 0xb504f334, 0x3e, x5, 800, x7)
+
+inst_120:
+// rs1_val == -8388609,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x800001; immval:0x37
+TEST_IMM_OP( slli, x11, x10, 0xff80000000000000, -0x800001, 0x37, x5, 808, x7)
+
+inst_121:
+// rs1_val == -16777217,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x1000001; immval:0x2a
+TEST_IMM_OP( slli, x11, x10, 0xfffffc0000000000, -0x1000001, 0x2a, x5, 816, x7)
+
+inst_122:
+// rs1_val == -33554433,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x2000001; immval:0x11
+TEST_IMM_OP( slli, x11, x10, 0xfffffbfffffe0000, -0x2000001, 0x11, x5, 824, x7)
+
+inst_123:
+// rs1_val == -67108865,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x4000001; immval:0x8
+TEST_IMM_OP( slli, x11, x10, 0xfffffffbffffff00, -0x4000001, 0x8, x5, 832, x7)
+
+inst_124:
+// rs1_val == -134217729,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x8000001; immval:0x0
+TEST_IMM_OP( slli, x11, x10, 0xfffffffff7ffffff, -0x8000001, 0x0, x5, 840, x7)
+
+inst_125:
+// rs1_val == -268435457,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x10000001; immval:0xb
+TEST_IMM_OP( slli, x11, x10, 0xffffff7ffffff800, -0x10000001, 0xb, x5, 848, x7)
+
+inst_126:
+// rs1_val == -1073741825,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x40000001; immval:0x9
+TEST_IMM_OP( slli, x11, x10, 0xffffff7ffffffe00, -0x40000001, 0x9, x5, 856, x7)
+
+inst_127:
+// rs1_val == -2147483649,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x80000001; immval:0x2
+TEST_IMM_OP( slli, x11, x10, 0xfffffffdfffffffc, -0x80000001, 0x2, x5, 864, x7)
+
+inst_128:
+// rs1_val == -4294967297,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x100000001; immval:0x37
+TEST_IMM_OP( slli, x11, x10, 0xff80000000000000, -0x100000001, 0x37, x5, 872, x7)
+
+inst_129:
+// rs1_val == -8589934593,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x200000001; immval:0x7
+TEST_IMM_OP( slli, x11, x10, 0xfffffeffffffff80, -0x200000001, 0x7, x5, 880, x7)
+
+inst_130:
+// rs1_val == -17179869185,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x400000001; immval:0x4
+TEST_IMM_OP( slli, x11, x10, 0xffffffbffffffff0, -0x400000001, 0x4, x5, 888, x7)
+
+inst_131:
+// rs1_val == -34359738369,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x800000001; immval:0x3
+TEST_IMM_OP( slli, x11, x10, 0xffffffbffffffff8, -0x800000001, 0x3, x5, 896, x7)
+
+inst_132:
+// rs1_val == -68719476737,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x1000000001; immval:0x3e
+TEST_IMM_OP( slli, x11, x10, 0xc000000000000000, -0x1000000001, 0x3e, x5, 904, x7)
+
+inst_133:
+// rs1_val == -137438953473,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x2000000001; immval:0xd
+TEST_IMM_OP( slli, x11, x10, 0xfffbffffffffe000, -0x2000000001, 0xd, x5, 912, x7)
+
+inst_134:
+// rs1_val == -274877906945,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x4000000001; immval:0x6
+TEST_IMM_OP( slli, x11, x10, 0xffffefffffffffc0, -0x4000000001, 0x6, x5, 920, x7)
+
+inst_135:
+// rs1_val == -549755813889,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x8000000001; immval:0x2a
+TEST_IMM_OP( slli, x11, x10, 0xfffffc0000000000, -0x8000000001, 0x2a, x5, 928, x7)
+
+inst_136:
+// rs1_val == -1099511627777,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x10000000001; immval:0x7
+TEST_IMM_OP( slli, x11, x10, 0xffff7fffffffff80, -0x10000000001, 0x7, x5, 936, x7)
+
+inst_137:
+// rs1_val == -2199023255553,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x20000000001; immval:0x3f
+TEST_IMM_OP( slli, x11, x10, 0x8000000000000000, -0x20000000001, 0x3f, x5, 944, x7)
+
+inst_138:
+// rs1_val == -4398046511105,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x40000000001; immval:0x3d
+TEST_IMM_OP( slli, x11, x10, 0xe000000000000000, -0x40000000001, 0x3d, x5, 952, x7)
+
+inst_139:
+// rs1_val == -8796093022209,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x80000000001; immval:0x3b
+TEST_IMM_OP( slli, x11, x10, 0xf800000000000000, -0x80000000001, 0x3b, x5, 960, x7)
+
+inst_140:
+// rs1_val == -17592186044417,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x100000000001; immval:0x3
+TEST_IMM_OP( slli, x11, x10, 0xffff7ffffffffff8, -0x100000000001, 0x3, x5, 968, x7)
+
+inst_141:
+// rs1_val == -35184372088833,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x200000000001; immval:0x12
+TEST_IMM_OP( slli, x11, x10, 0x7ffffffffffc0000, -0x200000000001, 0x12, x5, 976, x7)
+
+inst_142:
+// rs1_val == -70368744177665,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x400000000001; immval:0x13
+TEST_IMM_OP( slli, x11, x10, 0xfffffffffff80000, -0x400000000001, 0x13, x5, 984, x7)
+
+inst_143:
+// rs1_val == -140737488355329,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x800000000001; immval:0x10
+TEST_IMM_OP( slli, x11, x10, 0x7fffffffffff0000, -0x800000000001, 0x10, x5, 992, x7)
+
+inst_144:
+// rs1_val == -281474976710657,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x1000000000001; immval:0x5
+TEST_IMM_OP( slli, x11, x10, 0xffdfffffffffffe0, -0x1000000000001, 0x5, x5, 1000, x7)
+
+inst_145:
+// rs1_val == -562949953421313,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x2000000000001; immval:0x3b
+TEST_IMM_OP( slli, x11, x10, 0xf800000000000000, -0x2000000000001, 0x3b, x5, 1008, x7)
+
+inst_146:
+// rs1_val == -1125899906842625,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x4000000000001; immval:0x6
+TEST_IMM_OP( slli, x11, x10, 0xfeffffffffffffc0, -0x4000000000001, 0x6, x5, 1016, x7)
+
+inst_147:
+// rs1_val == -2251799813685249,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x8000000000001; immval:0xd
+TEST_IMM_OP( slli, x11, x10, 0xffffffffffffe000, -0x8000000000001, 0xd, x5, 1024, x7)
+
+inst_148:
+// rs1_val == -4503599627370497,
+// opcode: slli ; op1:x10; dest:x11; op1val:-0x10000000000001; immval:0x2
+TEST_IMM_OP( slli, x11, x10, 0xffbffffffffffffc, -0x10000000000001, 0x2, x5, 1032, x7)
+
+inst_149:
+// rs1_val == 16,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x10; immval:0xe
+TEST_IMM_OP( slli, x11, x10, 0x40000, 0x10, 0xe, x5, 1040, x7)
+
+inst_150:
+// rs1_val == 4194304,
+// opcode: slli ; op1:x10; dest:x11; op1val:0x400000; immval:0x1f
+TEST_IMM_OP( slli, x11, x10, 0x20000000000000, 0x400000, 0x1f, x5, 1048, x7)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x3_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_1:
+ .fill 19*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_0:
+ .fill 132*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/slliw-01.S b/riscof/suite/rv64i_m/I/slliw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..b68df990919d6f8c6613264f1d5076ac981cbf6e
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/slliw-01.S
@@ -0,0 +1,824 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the slliw instruction of the RISC-V I extension for the slliw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*);def TEST_CASE_1=True;",slliw)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 == rd, rs1==x10, rd==x10, rs1_val < 0 and imm_val > 0 and imm_val < 32, rs1_val == -262145
+// opcode: slliw ; op1:x10; dest:x10; op1val:-0x40001; immval:0x6
+TEST_IMM_OP( slliw, x10, x10, -0x1000040, -0x40001, 0x6, x1, 0, x4)
+
+inst_1:
+// rs1 != rd, rs1==x28, rd==x27, rs1_val > 0 and imm_val > 0 and imm_val < 32, imm_val == 23, rs1_val==6
+// opcode: slliw ; op1:x28; dest:x27; op1val:0x6; immval:0x17
+TEST_IMM_OP( slliw, x27, x28, 0x3000000, 0x6, 0x17, x1, 8, x4)
+
+inst_2:
+// rs1==x14, rd==x12, rs1_val < 0 and imm_val == 0, rs1_val == -4294967297
+// opcode: slliw ; op1:x14; dest:x12; op1val:-0x100000001; immval:0x0
+TEST_IMM_OP( slliw, x12, x14, -0x1, -0x100000001, 0x0, x1, 16, x4)
+
+inst_3:
+// rs1==x11, rd==x30, rs1_val > 0 and imm_val == 0, rs1_val == 36028797018963968
+// opcode: slliw ; op1:x11; dest:x30; op1val:0x80000000000000; immval:0x0
+TEST_IMM_OP( slliw, x30, x11, 0x0, 0x80000000000000, 0x0, x1, 24, x4)
+
+inst_4:
+// rs1==x16, rd==x2, rs1_val < 0 and imm_val == 31, rs1_val == -4503599627370497
+// opcode: slliw ; op1:x16; dest:x2; op1val:-0x10000000000001; immval:0x1f
+TEST_IMM_OP( slliw, x2, x16, -0x80000000, -0x10000000000001, 0x1f, x1, 32, x4)
+
+inst_5:
+// rs1==x31, rd==x20, rs1_val > 0 and imm_val == 31, rs1_val == 70368744177664
+// opcode: slliw ; op1:x31; dest:x20; op1val:0x400000000000; immval:0x1f
+TEST_IMM_OP( slliw, x20, x31, 0x0, 0x400000000000, 0x1f, x1, 40, x4)
+
+inst_6:
+// rs1==x30, rd==x15, rs1_val == imm_val and imm_val > 0 and imm_val < 32, rs1_val==5
+// opcode: slliw ; op1:x30; dest:x15; op1val:0x5; immval:0x5
+TEST_IMM_OP( slliw, x15, x30, 0xa0, 0x5, 0x5, x1, 48, x4)
+
+inst_7:
+// rs1==x3, rd==x7, rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < 32, imm_val == 29, rs1_val == -9223372036854775808
+// opcode: slliw ; op1:x3; dest:x7; op1val:-0x8000000000000000; immval:0x1d
+TEST_IMM_OP( slliw, x7, x3, 0x0, -0x8000000000000000, 0x1d, x1, 56, x4)
+
+inst_8:
+// rs1==x25, rd==x16, rs1_val == 0 and imm_val >= 0 and imm_val < 32, rs1_val==0
+// opcode: slliw ; op1:x25; dest:x16; op1val:0x0; immval:0x11
+TEST_IMM_OP( slliw, x16, x25, 0x0, 0x0, 0x11, x1, 64, x4)
+
+inst_9:
+// rs1==x13, rd==x23, rs1_val == (2**(xlen-1)-1) and imm_val >= 0 and imm_val < 32, rs1_val == 9223372036854775807, imm_val == 4
+// opcode: slliw ; op1:x13; dest:x23; op1val:0x7fffffffffffffff; immval:0x4
+TEST_IMM_OP( slliw, x23, x13, -0x10, 0x7fffffffffffffff, 0x4, x1, 72, x4)
+
+inst_10:
+// rs1==x12, rd==x19, rs1_val == 1 and imm_val >= 0 and imm_val < 32, rs1_val == 1
+// opcode: slliw ; op1:x12; dest:x19; op1val:0x1; immval:0x17
+TEST_IMM_OP( slliw, x19, x12, 0x800000, 0x1, 0x17, x1, 80, x4)
+
+inst_11:
+// rs1==x7, rd==x29, rs1_val == 2, imm_val == 27, rs1_val==2
+// opcode: slliw ; op1:x7; dest:x29; op1val:0x2; immval:0x1b
+TEST_IMM_OP( slliw, x29, x7, 0x10000000, 0x2, 0x1b, x1, 88, x4)
+
+inst_12:
+// rs1==x0, rd==x14, rs1_val == 4, rs1_val==4
+// opcode: slliw ; op1:x0; dest:x14; op1val:0x0; immval:0x0
+TEST_IMM_OP( slliw, x14, x0, 0x0, 0x0, 0x0, x1, 96, x4)
+
+inst_13:
+// rs1==x17, rd==x31, rs1_val == 8,
+// opcode: slliw ; op1:x17; dest:x31; op1val:0x8; immval:0x7
+TEST_IMM_OP( slliw, x31, x17, 0x400, 0x8, 0x7, x1, 104, x4)
+
+inst_14:
+// rs1==x20, rd==x9, rs1_val == 16,
+// opcode: slliw ; op1:x20; dest:x9; op1val:0x10; immval:0x7
+TEST_IMM_OP( slliw, x9, x20, 0x800, 0x10, 0x7, x1, 112, x4)
+
+inst_15:
+// rs1==x29, rd==x26, rs1_val == 32, imm_val == 21
+// opcode: slliw ; op1:x29; dest:x26; op1val:0x20; immval:0x15
+TEST_IMM_OP( slliw, x26, x29, 0x4000000, 0x20, 0x15, x1, 120, x4)
+
+inst_16:
+// rs1==x18, rd==x8, rs1_val == 64,
+// opcode: slliw ; op1:x18; dest:x8; op1val:0x40; immval:0xb
+TEST_IMM_OP( slliw, x8, x18, 0x20000, 0x40, 0xb, x1, 128, x4)
+
+inst_17:
+// rs1==x2, rd==x5, rs1_val == 128,
+// opcode: slliw ; op1:x2; dest:x5; op1val:0x80; immval:0x6
+TEST_IMM_OP( slliw, x5, x2, 0x2000, 0x80, 0x6, x1, 136, x4)
+
+inst_18:
+// rs1==x23, rd==x17, rs1_val == 256,
+// opcode: slliw ; op1:x23; dest:x17; op1val:0x100; immval:0xe
+TEST_IMM_OP( slliw, x17, x23, 0x400000, 0x100, 0xe, x1, 144, x4)
+
+inst_19:
+// rs1==x21, rd==x28, rs1_val == 512,
+// opcode: slliw ; op1:x21; dest:x28; op1val:0x200; immval:0xe
+TEST_IMM_OP( slliw, x28, x21, 0x800000, 0x200, 0xe, x1, 152, x4)
+
+inst_20:
+// rs1==x24, rd==x6, rs1_val == 1024,
+// opcode: slliw ; op1:x24; dest:x6; op1val:0x400; immval:0x4
+TEST_IMM_OP( slliw, x6, x24, 0x4000, 0x400, 0x4, x1, 160, x4)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_21:
+// rs1==x8, rd==x4, rs1_val == 2048,
+// opcode: slliw ; op1:x8; dest:x4; op1val:0x800; immval:0x12
+TEST_IMM_OP( slliw, x4, x8, 0x20000000, 0x800, 0x12, x2, 0, x7)
+
+inst_22:
+// rs1==x19, rd==x13, rs1_val == 4096,
+// opcode: slliw ; op1:x19; dest:x13; op1val:0x1000; immval:0x15
+TEST_IMM_OP( slliw, x13, x19, 0x0, 0x1000, 0x15, x2, 8, x7)
+
+inst_23:
+// rs1==x9, rd==x0, rs1_val == 8192, imm_val == 1
+// opcode: slliw ; op1:x9; dest:x0; op1val:0x2000; immval:0x1
+TEST_IMM_OP( slliw, x0, x9, 0, 0x2000, 0x1, x2, 16, x7)
+
+inst_24:
+// rs1==x1, rd==x25, rs1_val == 16384, imm_val == 8
+// opcode: slliw ; op1:x1; dest:x25; op1val:0x4000; immval:0x8
+TEST_IMM_OP( slliw, x25, x1, 0x400000, 0x4000, 0x8, x2, 24, x7)
+
+inst_25:
+// rs1==x6, rd==x22, rs1_val == 32768,
+// opcode: slliw ; op1:x6; dest:x22; op1val:0x8000; immval:0x1d
+TEST_IMM_OP( slliw, x22, x6, 0x0, 0x8000, 0x1d, x2, 32, x7)
+
+inst_26:
+// rs1==x22, rd==x24, rs1_val == 65536,
+// opcode: slliw ; op1:x22; dest:x24; op1val:0x10000; immval:0x12
+TEST_IMM_OP( slliw, x24, x22, 0x0, 0x10000, 0x12, x2, 40, x7)
+
+inst_27:
+// rs1==x26, rd==x18, rs1_val == 131072, imm_val == 15
+// opcode: slliw ; op1:x26; dest:x18; op1val:0x20000; immval:0xf
+TEST_IMM_OP( slliw, x18, x26, 0x0, 0x20000, 0xf, x2, 48, x7)
+
+inst_28:
+// rs1==x4, rd==x1, rs1_val == 262144,
+// opcode: slliw ; op1:x4; dest:x1; op1val:0x40000; immval:0x12
+TEST_IMM_OP( slliw, x1, x4, 0x0, 0x40000, 0x12, x2, 56, x7)
+
+inst_29:
+// rs1==x27, rd==x11, rs1_val == 524288,
+// opcode: slliw ; op1:x27; dest:x11; op1val:0x80000; immval:0xc
+TEST_IMM_OP( slliw, x11, x27, -0x80000000, 0x80000, 0xc, x2, 64, x7)
+
+inst_30:
+// rs1==x15, rd==x21, rs1_val == 1048576,
+// opcode: slliw ; op1:x15; dest:x21; op1val:0x100000; immval:0x8
+TEST_IMM_OP( slliw, x21, x15, 0x10000000, 0x100000, 0x8, x2, 72, x7)
+
+inst_31:
+// rs1==x5, rd==x3, rs1_val == 2097152,
+// opcode: slliw ; op1:x5; dest:x3; op1val:0x200000; immval:0xc
+TEST_IMM_OP( slliw, x3, x5, 0x0, 0x200000, 0xc, x2, 80, x7)
+
+inst_32:
+// rs1_val == 4194304,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x400000; immval:0x9
+TEST_IMM_OP( slliw, x11, x10, -0x80000000, 0x400000, 0x9, x2, 88, x7)
+
+inst_33:
+// rs1_val == 8388608, imm_val == 16
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x800000; immval:0x10
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x800000, 0x10, x2, 96, x7)
+
+inst_34:
+// rs1_val == 16777216,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x1000000; immval:0x11
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x1000000, 0x11, x2, 104, x7)
+
+inst_35:
+// rs1_val == 33554432,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x2000000; immval:0x11
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x2000000, 0x11, x2, 112, x7)
+
+inst_36:
+// rs1_val == 67108864,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x4000000; immval:0x3
+TEST_IMM_OP( slliw, x11, x10, 0x20000000, 0x4000000, 0x3, x2, 120, x7)
+
+inst_37:
+// rs1_val == 134217728,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x8000000; immval:0xd
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x8000000, 0xd, x2, 128, x7)
+
+inst_38:
+// rs1_val == 268435456, imm_val == 2
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x10000000; immval:0x2
+TEST_IMM_OP( slliw, x11, x10, 0x40000000, 0x10000000, 0x2, x2, 136, x7)
+
+inst_39:
+// rs1_val == 536870912,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x20000000; immval:0x1d
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x20000000, 0x1d, x2, 144, x7)
+
+inst_40:
+// rs1_val == 1073741824,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x40000000; immval:0x1f
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x40000000, 0x1f, x2, 152, x7)
+
+inst_41:
+// rs1_val == 2147483648,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x80000000; immval:0x3
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x80000000, 0x3, x2, 160, x7)
+
+inst_42:
+// rs1_val == 4294967296,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x100000000; immval:0x12
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x100000000, 0x12, x2, 168, x7)
+
+inst_43:
+// rs1_val == 8589934592,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x200000000; immval:0xb
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x200000000, 0xb, x2, 176, x7)
+
+inst_44:
+// rs1_val == 17179869184,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x400000000; immval:0x15
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x400000000, 0x15, x2, 184, x7)
+
+inst_45:
+// rs1_val == 34359738368,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x800000000; immval:0x3
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x800000000, 0x3, x2, 192, x7)
+
+inst_46:
+// rs1_val == 68719476736,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x1000000000; immval:0x1b
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x1000000000, 0x1b, x2, 200, x7)
+
+inst_47:
+// rs1_val == 137438953472,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x2000000000; immval:0x1
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x2000000000, 0x1, x2, 208, x7)
+
+inst_48:
+// rs1_val == 274877906944,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x4000000000; immval:0x2
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x4000000000, 0x2, x2, 216, x7)
+
+inst_49:
+// rs1_val == 549755813888,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x8000000000; immval:0x1d
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x8000000000, 0x1d, x2, 224, x7)
+
+inst_50:
+// rs1_val == 1099511627776,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x10000000000; immval:0x0
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x10000000000, 0x0, x2, 232, x7)
+
+inst_51:
+// rs1_val == 2199023255552,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x20000000000; immval:0xd
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x20000000000, 0xd, x2, 240, x7)
+
+inst_52:
+// rs1_val == 4398046511104,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x40000000000; immval:0x6
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x40000000000, 0x6, x2, 248, x7)
+
+inst_53:
+// rs1_val == 8796093022208,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x80000000000; immval:0x7
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x80000000000, 0x7, x2, 256, x7)
+
+inst_54:
+// rs1_val == 17592186044416,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x100000000000; immval:0x9
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x100000000000, 0x9, x2, 264, x7)
+
+inst_55:
+// rs1_val == 35184372088832,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x200000000000; immval:0x15
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x200000000000, 0x15, x2, 272, x7)
+
+inst_56:
+// rs1_val == 140737488355328,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x800000000000; immval:0x4
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x800000000000, 0x4, x2, 280, x7)
+
+inst_57:
+// rs1_val == 281474976710656,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x1000000000000; immval:0x17
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x1000000000000, 0x17, x2, 288, x7)
+
+inst_58:
+// rs1_val == 562949953421312,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x2000000000000; immval:0x9
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x2000000000000, 0x9, x2, 296, x7)
+
+inst_59:
+// rs1_val == 1125899906842624,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x4000000000000; immval:0x1f
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x4000000000000, 0x1f, x2, 304, x7)
+
+inst_60:
+// rs1_val == 2251799813685248,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x8000000000000; immval:0xf
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x8000000000000, 0xf, x2, 312, x7)
+
+inst_61:
+// rs1_val == 4503599627370496,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x10000000000000; immval:0x1f
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x10000000000000, 0x1f, x2, 320, x7)
+
+inst_62:
+// rs1_val == 9007199254740992,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x20000000000000; immval:0x8
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x20000000000000, 0x8, x2, 328, x7)
+
+inst_63:
+// rs1_val == 18014398509481984,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x40000000000000; immval:0x2
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x40000000000000, 0x2, x2, 336, x7)
+
+inst_64:
+// rs1_val == 72057594037927936,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x100000000000000; immval:0xb
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x100000000000000, 0xb, x2, 344, x7)
+
+inst_65:
+// rs1_val == 144115188075855872,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x200000000000000; immval:0x5
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x200000000000000, 0x5, x2, 352, x7)
+
+inst_66:
+// rs1_val == 288230376151711744,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x400000000000000; immval:0x13
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x400000000000000, 0x13, x2, 360, x7)
+
+inst_67:
+// rs1_val == 576460752303423488, imm_val == 30
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x800000000000000; immval:0x1e
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x800000000000000, 0x1e, x2, 368, x7)
+
+inst_68:
+// rs1_val == 1152921504606846976,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x1000000000000000; immval:0x1
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x1000000000000000, 0x1, x2, 376, x7)
+
+inst_69:
+// rs1_val == 2305843009213693952,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x2000000000000000; immval:0x1f
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x2000000000000000, 0x1f, x2, 384, x7)
+
+inst_70:
+// rs1_val == 4611686018427387904,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x4000000000000000; immval:0xe
+TEST_IMM_OP( slliw, x11, x10, 0x0, 0x4000000000000000, 0xe, x2, 392, x7)
+
+inst_71:
+// rs1_val == -2,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x2; immval:0x1e
+TEST_IMM_OP( slliw, x11, x10, -0x80000000, -0x2, 0x1e, x2, 400, x7)
+
+inst_72:
+// rs1_val == -3,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x3; immval:0x17
+TEST_IMM_OP( slliw, x11, x10, -0x1800000, -0x3, 0x17, x2, 408, x7)
+
+inst_73:
+// rs1_val == -5,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x5; immval:0x5
+TEST_IMM_OP( slliw, x11, x10, -0xa0, -0x5, 0x5, x2, 416, x7)
+
+inst_74:
+// rs1_val == -9,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x9; immval:0x3
+TEST_IMM_OP( slliw, x11, x10, -0x48, -0x9, 0x3, x2, 424, x7)
+
+inst_75:
+// rs1_val == -17,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x11; immval:0x2
+TEST_IMM_OP( slliw, x11, x10, -0x44, -0x11, 0x2, x2, 432, x7)
+
+inst_76:
+// rs1_val == -33,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x21; immval:0x15
+TEST_IMM_OP( slliw, x11, x10, -0x4200000, -0x21, 0x15, x2, 440, x7)
+
+inst_77:
+// rs1_val == -65,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x41; immval:0x7
+TEST_IMM_OP( slliw, x11, x10, -0x2080, -0x41, 0x7, x2, 448, x7)
+
+inst_78:
+// rs1_val == -129,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x81; immval:0x4
+TEST_IMM_OP( slliw, x11, x10, -0x810, -0x81, 0x4, x2, 456, x7)
+
+inst_79:
+// rs1_val == -257,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x101; immval:0x6
+TEST_IMM_OP( slliw, x11, x10, -0x4040, -0x101, 0x6, x2, 464, x7)
+
+inst_80:
+// rs1_val == -513,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x201; immval:0x8
+TEST_IMM_OP( slliw, x11, x10, -0x20100, -0x201, 0x8, x2, 472, x7)
+
+inst_81:
+// rs1_val == -1025,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x401; immval:0xc
+TEST_IMM_OP( slliw, x11, x10, -0x401000, -0x401, 0xc, x2, 480, x7)
+
+inst_82:
+// rs1_val == -2049,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x801; immval:0x2
+TEST_IMM_OP( slliw, x11, x10, -0x2004, -0x801, 0x2, x2, 488, x7)
+
+inst_83:
+// rs1_val == -4097,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x1001; immval:0xc
+TEST_IMM_OP( slliw, x11, x10, -0x1001000, -0x1001, 0xc, x2, 496, x7)
+
+inst_84:
+// rs1_val == -8193,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x2001; immval:0xf
+TEST_IMM_OP( slliw, x11, x10, -0x10008000, -0x2001, 0xf, x2, 504, x7)
+
+inst_85:
+// rs1_val == -16385, imm_val == 10
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x4001; immval:0xa
+TEST_IMM_OP( slliw, x11, x10, -0x1000400, -0x4001, 0xa, x2, 512, x7)
+
+inst_86:
+// rs1_val == -32769,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x8001; immval:0x15
+TEST_IMM_OP( slliw, x11, x10, -0x200000, -0x8001, 0x15, x2, 520, x7)
+
+inst_87:
+// rs1_val == -9007199254740993,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x20000000000001; immval:0x11
+TEST_IMM_OP( slliw, x11, x10, -0x20000, -0x20000000000001, 0x11, x2, 528, x7)
+
+inst_88:
+// rs1_val == -18014398509481985,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x40000000000001; immval:0x9
+TEST_IMM_OP( slliw, x11, x10, -0x200, -0x40000000000001, 0x9, x2, 536, x7)
+
+inst_89:
+// rs1_val == -36028797018963969,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x80000000000001; immval:0xe
+TEST_IMM_OP( slliw, x11, x10, -0x4000, -0x80000000000001, 0xe, x2, 544, x7)
+
+inst_90:
+// rs1_val == -72057594037927937,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x100000000000001; immval:0x1b
+TEST_IMM_OP( slliw, x11, x10, -0x8000000, -0x100000000000001, 0x1b, x2, 552, x7)
+
+inst_91:
+// rs1_val == -144115188075855873,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x200000000000001; immval:0x1d
+TEST_IMM_OP( slliw, x11, x10, -0x20000000, -0x200000000000001, 0x1d, x2, 560, x7)
+
+inst_92:
+// rs1_val == -288230376151711745,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x400000000000001; immval:0x1
+TEST_IMM_OP( slliw, x11, x10, -0x2, -0x400000000000001, 0x1, x2, 568, x7)
+
+inst_93:
+// rs1_val == -576460752303423489,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x800000000000001; immval:0x1
+TEST_IMM_OP( slliw, x11, x10, -0x2, -0x800000000000001, 0x1, x2, 576, x7)
+
+inst_94:
+// rs1_val == -1152921504606846977,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x1000000000000001; immval:0x11
+TEST_IMM_OP( slliw, x11, x10, -0x20000, -0x1000000000000001, 0x11, x2, 584, x7)
+
+inst_95:
+// rs1_val == -2305843009213693953,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x2000000000000001; immval:0x10
+TEST_IMM_OP( slliw, x11, x10, -0x10000, -0x2000000000000001, 0x10, x2, 592, x7)
+
+inst_96:
+// rs1_val == -4611686018427387905,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x4000000000000001; immval:0x0
+TEST_IMM_OP( slliw, x11, x10, -0x1, -0x4000000000000001, 0x0, x2, 600, x7)
+
+inst_97:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x4
+TEST_IMM_OP( slliw, x11, x10, 0x55555550, 0x5555555555555555, 0x4, x2, 608, x7)
+
+inst_98:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x15
+TEST_IMM_OP( slliw, x11, x10, 0x55400000, -0x5555555555555556, 0x15, x2, 616, x7)
+
+inst_99:
+// rs1_val==3,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x3; immval:0xd
+TEST_IMM_OP( slliw, x11, x10, 0x6000, 0x3, 0xd, x2, 624, x7)
+
+inst_100:
+// rs1_val==3689348814741910323,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x0
+TEST_IMM_OP( slliw, x11, x10, 0x33333333, 0x3333333333333333, 0x0, x2, 632, x7)
+
+inst_101:
+// rs1_val==7378697629483820646,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x15
+TEST_IMM_OP( slliw, x11, x10, -0x33400000, 0x6666666666666666, 0x15, x2, 640, x7)
+
+inst_102:
+// rs1_val==-3037000499,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x3
+TEST_IMM_OP( slliw, x11, x10, 0x57d86668, -0xb504f333, 0x3, x2, 648, x7)
+
+inst_103:
+// rs1_val==3037000499,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x1
+TEST_IMM_OP( slliw, x11, x10, 0x6a09e666, 0xb504f333, 0x1, x2, 656, x7)
+
+inst_104:
+// rs1_val==6148914691236517204,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x5
+TEST_IMM_OP( slliw, x11, x10, -0x55555580, 0x5555555555555554, 0x5, x2, 664, x7)
+
+inst_105:
+// rs1_val==3689348814741910322,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0xd
+TEST_IMM_OP( slliw, x11, x10, 0x66664000, 0x3333333333333332, 0xd, x2, 672, x7)
+
+inst_106:
+// rs1_val==7378697629483820645,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0xf
+TEST_IMM_OP( slliw, x11, x10, 0x33328000, 0x6666666666666665, 0xf, x2, 680, x7)
+
+inst_107:
+// rs1_val==3037000498,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x3
+TEST_IMM_OP( slliw, x11, x10, -0x57d86670, 0xb504f332, 0x3, x2, 688, x7)
+
+inst_108:
+// rs1_val==6148914691236517206,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x11
+TEST_IMM_OP( slliw, x11, x10, -0x55540000, 0x5555555555555556, 0x11, x2, 696, x7)
+
+inst_109:
+// rs1_val==-6148914691236517205,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x1d
+TEST_IMM_OP( slliw, x11, x10, 0x60000000, -0x5555555555555555, 0x1d, x2, 704, x7)
+
+inst_110:
+// rs1_val==3689348814741910324,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x13
+TEST_IMM_OP( slliw, x11, x10, -0x66600000, 0x3333333333333334, 0x13, x2, 712, x7)
+
+inst_111:
+// rs1_val==7378697629483820647,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x0
+TEST_IMM_OP( slliw, x11, x10, 0x66666667, 0x6666666666666667, 0x0, x2, 720, x7)
+
+inst_112:
+// rs1_val==-3037000498,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x1
+TEST_IMM_OP( slliw, x11, x10, -0x6a09e664, -0xb504f332, 0x1, x2, 728, x7)
+
+inst_113:
+// rs1_val==3037000500,
+// opcode: slliw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0xa
+TEST_IMM_OP( slliw, x11, x10, 0x13ccd000, 0xb504f334, 0xa, x2, 736, x7)
+
+inst_114:
+// rs1_val == -65537,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x10001; immval:0x1d
+TEST_IMM_OP( slliw, x11, x10, -0x20000000, -0x10001, 0x1d, x2, 744, x7)
+
+inst_115:
+// rs1_val == -131073,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x20001; immval:0x1e
+TEST_IMM_OP( slliw, x11, x10, -0x40000000, -0x20001, 0x1e, x2, 752, x7)
+
+inst_116:
+// rs1_val == -524289,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x80001; immval:0x6
+TEST_IMM_OP( slliw, x11, x10, -0x2000040, -0x80001, 0x6, x2, 760, x7)
+
+inst_117:
+// rs1_val == -1048577,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x100001; immval:0xd
+TEST_IMM_OP( slliw, x11, x10, -0x2000, -0x100001, 0xd, x2, 768, x7)
+
+inst_118:
+// rs1_val == -2097153,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x200001; immval:0x1b
+TEST_IMM_OP( slliw, x11, x10, -0x8000000, -0x200001, 0x1b, x2, 776, x7)
+
+inst_119:
+// rs1_val == -4194305,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x400001; immval:0x17
+TEST_IMM_OP( slliw, x11, x10, -0x800000, -0x400001, 0x17, x2, 784, x7)
+
+inst_120:
+// rs1_val == -8388609,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x800001; immval:0x4
+TEST_IMM_OP( slliw, x11, x10, -0x8000010, -0x800001, 0x4, x2, 792, x7)
+
+inst_121:
+// rs1_val == -16777217,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x1000001; immval:0xa
+TEST_IMM_OP( slliw, x11, x10, -0x400, -0x1000001, 0xa, x2, 800, x7)
+
+inst_122:
+// rs1_val == -33554433,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x2000001; immval:0x1b
+TEST_IMM_OP( slliw, x11, x10, -0x8000000, -0x2000001, 0x1b, x2, 808, x7)
+
+inst_123:
+// rs1_val == -67108865,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x4000001; immval:0xc
+TEST_IMM_OP( slliw, x11, x10, -0x1000, -0x4000001, 0xc, x2, 816, x7)
+
+inst_124:
+// rs1_val == -134217729,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x8000001; immval:0xc
+TEST_IMM_OP( slliw, x11, x10, -0x1000, -0x8000001, 0xc, x2, 824, x7)
+
+inst_125:
+// rs1_val == -268435457,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x10000001; immval:0xf
+TEST_IMM_OP( slliw, x11, x10, -0x8000, -0x10000001, 0xf, x2, 832, x7)
+
+inst_126:
+// rs1_val == -536870913,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x20000001; immval:0x1
+TEST_IMM_OP( slliw, x11, x10, -0x40000002, -0x20000001, 0x1, x2, 840, x7)
+
+inst_127:
+// rs1_val == -1073741825,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x40000001; immval:0x10
+TEST_IMM_OP( slliw, x11, x10, -0x10000, -0x40000001, 0x10, x2, 848, x7)
+
+inst_128:
+// rs1_val == -2147483649,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x80000001; immval:0x1b
+TEST_IMM_OP( slliw, x11, x10, -0x8000000, -0x80000001, 0x1b, x2, 856, x7)
+
+inst_129:
+// rs1_val == -8589934593,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x200000001; immval:0x13
+TEST_IMM_OP( slliw, x11, x10, -0x80000, -0x200000001, 0x13, x2, 864, x7)
+
+inst_130:
+// rs1_val == -17179869185,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x400000001; immval:0x12
+TEST_IMM_OP( slliw, x11, x10, -0x40000, -0x400000001, 0x12, x2, 872, x7)
+
+inst_131:
+// rs1_val == -34359738369,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x800000001; immval:0xb
+TEST_IMM_OP( slliw, x11, x10, -0x800, -0x800000001, 0xb, x2, 880, x7)
+
+inst_132:
+// rs1_val == -68719476737,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x1000000001; immval:0x3
+TEST_IMM_OP( slliw, x11, x10, -0x8, -0x1000000001, 0x3, x2, 888, x7)
+
+inst_133:
+// rs1_val == -137438953473,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x2000000001; immval:0xc
+TEST_IMM_OP( slliw, x11, x10, -0x1000, -0x2000000001, 0xc, x2, 896, x7)
+
+inst_134:
+// rs1_val == -274877906945,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x4000000001; immval:0x4
+TEST_IMM_OP( slliw, x11, x10, -0x10, -0x4000000001, 0x4, x2, 904, x7)
+
+inst_135:
+// rs1_val == -549755813889,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x8000000001; immval:0x10
+TEST_IMM_OP( slliw, x11, x10, -0x10000, -0x8000000001, 0x10, x2, 912, x7)
+
+inst_136:
+// rs1_val == -1099511627777,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x10000000001; immval:0x7
+TEST_IMM_OP( slliw, x11, x10, -0x80, -0x10000000001, 0x7, x2, 920, x7)
+
+inst_137:
+// rs1_val == -2199023255553,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x20000000001; immval:0x1f
+TEST_IMM_OP( slliw, x11, x10, -0x80000000, -0x20000000001, 0x1f, x2, 928, x7)
+
+inst_138:
+// rs1_val == -4398046511105,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x40000000001; immval:0x11
+TEST_IMM_OP( slliw, x11, x10, -0x20000, -0x40000000001, 0x11, x2, 936, x7)
+
+inst_139:
+// rs1_val == -8796093022209,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x80000000001; immval:0x17
+TEST_IMM_OP( slliw, x11, x10, -0x800000, -0x80000000001, 0x17, x2, 944, x7)
+
+inst_140:
+// rs1_val == -17592186044417,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x100000000001; immval:0x9
+TEST_IMM_OP( slliw, x11, x10, -0x200, -0x100000000001, 0x9, x2, 952, x7)
+
+inst_141:
+// rs1_val == -35184372088833,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x200000000001; immval:0x1
+TEST_IMM_OP( slliw, x11, x10, -0x2, -0x200000000001, 0x1, x2, 960, x7)
+
+inst_142:
+// rs1_val == -70368744177665,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x400000000001; immval:0x0
+TEST_IMM_OP( slliw, x11, x10, -0x1, -0x400000000001, 0x0, x2, 968, x7)
+
+inst_143:
+// rs1_val == -140737488355329,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x800000000001; immval:0x3
+TEST_IMM_OP( slliw, x11, x10, -0x8, -0x800000000001, 0x3, x2, 976, x7)
+
+inst_144:
+// rs1_val == -281474976710657,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x1000000000001; immval:0x1e
+TEST_IMM_OP( slliw, x11, x10, -0x40000000, -0x1000000000001, 0x1e, x2, 984, x7)
+
+inst_145:
+// rs1_val == -562949953421313,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x2000000000001; immval:0x1b
+TEST_IMM_OP( slliw, x11, x10, -0x8000000, -0x2000000000001, 0x1b, x2, 992, x7)
+
+inst_146:
+// rs1_val == -1125899906842625,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x4000000000001; immval:0xb
+TEST_IMM_OP( slliw, x11, x10, -0x800, -0x4000000000001, 0xb, x2, 1000, x7)
+
+inst_147:
+// rs1_val == -2251799813685249,
+// opcode: slliw ; op1:x10; dest:x11; op1val:-0x8000000000001; immval:0x11
+TEST_IMM_OP( slliw, x11, x10, -0x20000, -0x8000000000001, 0x11, x2, 1008, x7)
+
+inst_148:
+// rs1_val == 4, rs1_val==4
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x4; immval:0x0
+TEST_IMM_OP( slliw, x11, x10, 0x4, 0x4, 0x0, x2, 1016, x7)
+
+inst_149:
+// rs1_val == 8192, imm_val == 1
+// opcode: slliw ; op1:x10; dest:x11; op1val:0x2000; immval:0x1
+TEST_IMM_OP( slliw, x11, x10, 0x4000, 0x2000, 0x1, x2, 1024, x7)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 21*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 129*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/sllw-01.S b/riscof/suite/rv64i_m/I/sllw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..a0b776707bba7e4fec71b8fb445f96d2a6a749fa
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/sllw-01.S
@@ -0,0 +1,839 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sllw instruction of the RISC-V i extension for the sllw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64i")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*);def TEST_CASE_1=True;",sllw)
+
+RVTEST_SIGBASE( x4,signature_x4_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x7, rs2==x7, rd==x14, rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == -140737488355329, rs2_val == 15
+// opcode: sllw ; op1:x7; op2:x7; dest:x14; op1val:-0x800000000001; op2val:-0x800000000001
+TEST_RR_OP(sllw, x14, x7, x7, -0x80000000, -0x800000000001, -0x800000000001, x4, 0, x13)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x27, rs2==x30, rd==x30, rs1_val > 0 and rs2_val > 0 and rs2_val < xlen, rs2_val == 23, rs1_val == 288230376151711744
+// opcode: sllw ; op1:x27; op2:x30; dest:x30; op1val:0x400000000000000; op2val:0x17
+TEST_RR_OP(sllw, x30, x27, x30, 0x0, 0x400000000000000, 0x17, x4, 8, x13)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x5, rs2==x5, rd==x5, rs1_val < 0 and rs2_val == 0,
+// opcode: sllw ; op1:x5; op2:x5; dest:x5; op1val:-0x6; op2val:-0x6
+TEST_RR_OP(sllw, x5, x5, x5, -0x18000000, -0x6, -0x6, x4, 16, x13)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x18, rs2==x15, rd==x22, rs1_val > 0 and rs2_val == 0, rs1_val == 268435456
+// opcode: sllw ; op1:x18; op2:x15; dest:x22; op1val:0x10000000; op2val:0x0
+TEST_RR_OP(sllw, x22, x18, x15, 0x10000000, 0x10000000, 0x0, x4, 24, x13)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x26, rs2==x22, rd==x26, rs1_val == rs2_val and rs2_val > 0 and rs2_val < xlen, rs1_val==5
+// opcode: sllw ; op1:x26; op2:x22; dest:x26; op1val:0x5; op2val:0x5
+TEST_RR_OP(sllw, x26, x26, x22, 0xa0, 0x5, 0x5, x4, 32, x13)
+
+inst_5:
+// rs1==x14, rs2==x23, rd==x29, rs1_val == (-2**(xlen-1)) and rs2_val >= 0 and rs2_val < xlen, rs1_val == -9223372036854775808, rs2_val == 2
+// opcode: sllw ; op1:x14; op2:x23; dest:x29; op1val:-0x8000000000000000; op2val:0x2
+TEST_RR_OP(sllw, x29, x14, x23, 0x0, -0x8000000000000000, 0x2, x4, 40, x13)
+
+inst_6:
+// rs1==x12, rs2==x14, rd==x9, rs1_val == 0 and rs2_val >= 0 and rs2_val < xlen, rs1_val==0
+// opcode: sllw ; op1:x12; op2:x14; dest:x9; op1val:0x0; op2val:0x11
+TEST_RR_OP(sllw, x9, x12, x14, 0x0, 0x0, 0x11, x4, 48, x13)
+
+inst_7:
+// rs1==x10, rs2==x0, rd==x1, rs1_val == (2**(xlen-1)-1) and rs2_val >= 0 and rs2_val < xlen, rs1_val == 9223372036854775807
+// opcode: sllw ; op1:x10; op2:x0; dest:x1; op1val:0x7fffffffffffffff; op2val:0x0
+TEST_RR_OP(sllw, x1, x10, x0, -0x1, 0x7fffffffffffffff, 0x0, x4, 56, x13)
+
+inst_8:
+// rs1==x31, rs2==x8, rd==x19, rs1_val == 1 and rs2_val >= 0 and rs2_val < xlen, rs1_val == 1, rs2_val == 21
+// opcode: sllw ; op1:x31; op2:x8; dest:x19; op1val:0x1; op2val:0x15
+TEST_RR_OP(sllw, x19, x31, x8, 0x200000, 0x1, 0x15, x4, 64, x13)
+
+inst_9:
+// rs1==x23, rs2==x27, rd==x17, rs1_val == 2, rs1_val==2
+// opcode: sllw ; op1:x23; op2:x27; dest:x17; op1val:0x2; op2val:0x17
+TEST_RR_OP(sllw, x17, x23, x27, 0x1000000, 0x2, 0x17, x4, 72, x13)
+
+inst_10:
+// rs1==x17, rs2==x26, rd==x25, rs1_val == 4, rs2_val == 8, rs1_val==4
+// opcode: sllw ; op1:x17; op2:x26; dest:x25; op1val:0x4; op2val:0x8
+TEST_RR_OP(sllw, x25, x17, x26, 0x400, 0x4, 0x8, x4, 80, x13)
+
+inst_11:
+// rs1==x11, rs2==x12, rd==x16, rs1_val == 8,
+// opcode: sllw ; op1:x11; op2:x12; dest:x16; op1val:0x8; op2val:0x0
+TEST_RR_OP(sllw, x16, x11, x12, 0x8, 0x8, 0x0, x4, 88, x13)
+
+inst_12:
+// rs1==x24, rs2==x3, rd==x27, rs1_val == 16,
+// opcode: sllw ; op1:x24; op2:x3; dest:x27; op1val:0x10; op2val:0x0
+TEST_RR_OP(sllw, x27, x24, x3, 0x10, 0x10, 0x0, x4, 96, x13)
+
+inst_13:
+// rs1==x16, rs2==x10, rd==x7, rs1_val == 32,
+// opcode: sllw ; op1:x16; op2:x10; dest:x7; op1val:0x20; op2val:0x2
+TEST_RR_OP(sllw, x7, x16, x10, 0x80, 0x20, 0x2, x4, 104, x13)
+
+inst_14:
+// rs1==x2, rs2==x1, rd==x0, rs1_val == 64,
+// opcode: sllw ; op1:x2; op2:x1; dest:x0; op1val:0x40; op2val:0x11
+TEST_RR_OP(sllw, x0, x2, x1, 0, 0x40, 0x11, x4, 112, x13)
+
+inst_15:
+// rs1==x28, rs2==x21, rd==x6, rs1_val == 128,
+// opcode: sllw ; op1:x28; op2:x21; dest:x6; op1val:0x80; op2val:0x0
+TEST_RR_OP(sllw, x6, x28, x21, 0x80, 0x80, 0x0, x4, 120, x13)
+RVTEST_SIGBASE( x5,signature_x5_0)
+
+inst_16:
+// rs1==x8, rs2==x17, rd==x13, rs1_val == 256,
+// opcode: sllw ; op1:x8; op2:x17; dest:x13; op1val:0x100; op2val:0x6
+TEST_RR_OP(sllw, x13, x8, x17, 0x4000, 0x100, 0x6, x5, 0, x7)
+
+inst_17:
+// rs1==x21, rs2==x13, rd==x20, rs1_val == 512,
+// opcode: sllw ; op1:x21; op2:x13; dest:x20; op1val:0x200; op2val:0x3
+TEST_RR_OP(sllw, x20, x21, x13, 0x1000, 0x200, 0x3, x5, 8, x7)
+
+inst_18:
+// rs1==x25, rs2==x28, rd==x18, rs1_val == 1024,
+// opcode: sllw ; op1:x25; op2:x28; dest:x18; op1val:0x400; op2val:0x8
+TEST_RR_OP(sllw, x18, x25, x28, 0x40000, 0x400, 0x8, x5, 16, x7)
+
+inst_19:
+// rs1==x15, rs2==x11, rd==x2, rs1_val == 2048, rs2_val == 1
+// opcode: sllw ; op1:x15; op2:x11; dest:x2; op1val:0x800; op2val:0x1
+TEST_RR_OP(sllw, x2, x15, x11, 0x1000, 0x800, 0x1, x5, 24, x7)
+
+inst_20:
+// rs1==x19, rs2==x9, rd==x28, rs1_val == 4096,
+// opcode: sllw ; op1:x19; op2:x9; dest:x28; op1val:0x1000; op2val:0x9
+TEST_RR_OP(sllw, x28, x19, x9, 0x200000, 0x1000, 0x9, x5, 32, x7)
+
+inst_21:
+// rs1==x6, rs2==x20, rd==x31, rs1_val == 8192,
+// opcode: sllw ; op1:x6; op2:x20; dest:x31; op1val:0x2000; op2val:0x12
+TEST_RR_OP(sllw, x31, x6, x20, -0x80000000, 0x2000, 0x12, x5, 40, x7)
+
+inst_22:
+// rs1==x1, rs2==x16, rd==x3, rs1_val == 16384,
+// opcode: sllw ; op1:x1; op2:x16; dest:x3; op1val:0x4000; op2val:0x8
+TEST_RR_OP(sllw, x3, x1, x16, 0x400000, 0x4000, 0x8, x5, 48, x7)
+
+inst_23:
+// rs1==x13, rs2==x29, rd==x11, rs1_val == 32768,
+// opcode: sllw ; op1:x13; op2:x29; dest:x11; op1val:0x8000; op2val:0xd
+TEST_RR_OP(sllw, x11, x13, x29, 0x10000000, 0x8000, 0xd, x5, 56, x7)
+
+inst_24:
+// rs1==x22, rs2==x2, rd==x10, rs1_val == 65536,
+// opcode: sllw ; op1:x22; op2:x2; dest:x10; op1val:0x10000; op2val:0x0
+TEST_RR_OP(sllw, x10, x22, x2, 0x10000, 0x10000, 0x0, x5, 64, x7)
+
+inst_25:
+// rs1==x3, rs2==x19, rd==x4, rs1_val == 131072, rs2_val == 10
+// opcode: sllw ; op1:x3; op2:x19; dest:x4; op1val:0x20000; op2val:0xa
+TEST_RR_OP(sllw, x4, x3, x19, 0x8000000, 0x20000, 0xa, x5, 72, x7)
+
+inst_26:
+// rs1==x20, rs2==x6, rd==x8, rs1_val == 262144,
+// opcode: sllw ; op1:x20; op2:x6; dest:x8; op1val:0x40000; op2val:0x5
+TEST_RR_OP(sllw, x8, x20, x6, 0x800000, 0x40000, 0x5, x5, 80, x7)
+
+inst_27:
+// rs1==x9, rs2==x31, rd==x12, rs1_val == 524288, rs2_val == 27
+// opcode: sllw ; op1:x9; op2:x31; dest:x12; op1val:0x80000; op2val:0x1b
+TEST_RR_OP(sllw, x12, x9, x31, 0x0, 0x80000, 0x1b, x5, 88, x7)
+
+inst_28:
+// rs1==x30, rs2==x4, rd==x24, rs1_val == 1048576, rs2_val == 4
+// opcode: sllw ; op1:x30; op2:x4; dest:x24; op1val:0x100000; op2val:0x4
+TEST_RR_OP(sllw, x24, x30, x4, 0x1000000, 0x100000, 0x4, x5, 96, x7)
+
+inst_29:
+// rs1==x29, rs2==x25, rd==x23, rs1_val == 2097152,
+// opcode: sllw ; op1:x29; op2:x25; dest:x23; op1val:0x200000; op2val:0x8
+TEST_RR_OP(sllw, x23, x29, x25, 0x20000000, 0x200000, 0x8, x5, 104, x7)
+
+inst_30:
+// rs1==x0, rs2==x24, rd==x21, rs1_val == 4194304,
+// opcode: sllw ; op1:x0; op2:x24; dest:x21; op1val:0x0; op2val:0x6
+TEST_RR_OP(sllw, x21, x0, x24, 0x0, 0x0, 0x6, x5, 112, x7)
+
+inst_31:
+// rs1==x4, rs2==x18, rd==x15, rs1_val == 8388608,
+// opcode: sllw ; op1:x4; op2:x18; dest:x15; op1val:0x800000; op2val:0x15
+TEST_RR_OP(sllw, x15, x4, x18, 0x0, 0x800000, 0x15, x5, 120, x7)
+
+inst_32:
+// rs1_val == 16777216,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0xb
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x1000000, 0xb, x5, 128, x7)
+
+inst_33:
+// rs1_val == 33554432,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x15
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x2000000, 0x15, x5, 136, x7)
+
+inst_34:
+// rs1_val == 67108864,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x12
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x4000000, 0x12, x5, 144, x7)
+
+inst_35:
+// rs1_val == 134217728,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0xe
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x8000000, 0xe, x5, 152, x7)
+
+inst_36:
+// rs1_val == 536870912, rs2_val == 29
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x1d
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x20000000, 0x1d, x5, 160, x7)
+
+inst_37:
+// rs1_val == 1073741824,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0xe
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x40000000, 0xe, x5, 168, x7)
+
+inst_38:
+// rs1_val == 2147483648,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0x12
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x80000000, 0x12, x5, 176, x7)
+
+inst_39:
+// rs1_val == 4294967296,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x13
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x100000000, 0x13, x5, 184, x7)
+
+inst_40:
+// rs1_val == 8589934592,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:0x1f
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x200000000, 0x1f, x5, 192, x7)
+
+inst_41:
+// rs1_val == 17179869184,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:0x1b
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x400000000, 0x1b, x5, 200, x7)
+
+inst_42:
+// rs1_val == 34359738368,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:0x17
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x800000000, 0x17, x5, 208, x7)
+
+inst_43:
+// rs1_val == 68719476736,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:0x9
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x1000000000, 0x9, x5, 216, x7)
+
+inst_44:
+// rs1_val == 137438953472,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:0x1
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x2000000000, 0x1, x5, 224, x7)
+
+inst_45:
+// rs1_val == 274877906944,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:0x0
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x4000000000, 0x0, x5, 232, x7)
+
+inst_46:
+// rs1_val == 549755813888,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0x8
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x8000000000, 0x8, x5, 240, x7)
+
+inst_47:
+// rs1_val == 1099511627776,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x8
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x10000000000, 0x8, x5, 248, x7)
+
+inst_48:
+// rs1_val == 2199023255552,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:0x0
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x20000000000, 0x0, x5, 256, x7)
+
+inst_49:
+// rs1_val == 4398046511104,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:0xb
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x40000000000, 0xb, x5, 264, x7)
+
+inst_50:
+// rs1_val == 8796093022208,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:0x4
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x80000000000, 0x4, x5, 272, x7)
+
+inst_51:
+// rs1_val == 17592186044416,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:0x6
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x100000000000, 0x6, x5, 280, x7)
+
+inst_52:
+// rs1_val == 35184372088832,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:0xc
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x200000000000, 0xc, x5, 288, x7)
+
+inst_53:
+// rs1_val == 70368744177664,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:0xd
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x400000000000, 0xd, x5, 296, x7)
+
+inst_54:
+// rs1_val == 140737488355328, rs2_val == 30
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:0x1e
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x800000000000, 0x1e, x5, 304, x7)
+
+inst_55:
+// rs1_val == 281474976710656,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0x1
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x1000000000000, 0x1, x5, 312, x7)
+
+inst_56:
+// rs1_val == 562949953421312,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:0xe
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x2000000000000, 0xe, x5, 320, x7)
+
+inst_57:
+// rs1_val == 1125899906842624,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:0x15
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x4000000000000, 0x15, x5, 328, x7)
+
+inst_58:
+// rs1_val == 2251799813685248,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:0xb
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x8000000000000, 0xb, x5, 336, x7)
+
+inst_59:
+// rs1_val == 4503599627370496, rs2_val == 16
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:0x10
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x10000000000000, 0x10, x5, 344, x7)
+
+inst_60:
+// rs1_val == 9007199254740992,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:0x13
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x20000000000000, 0x13, x5, 352, x7)
+
+inst_61:
+// rs1_val == 18014398509481984,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:0x11
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x40000000000000, 0x11, x5, 360, x7)
+
+inst_62:
+// rs1_val == 36028797018963968,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:0x8
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x80000000000000, 0x8, x5, 368, x7)
+
+inst_63:
+// rs1_val == 72057594037927936,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:0x11
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x100000000000000, 0x11, x5, 376, x7)
+
+inst_64:
+// rs1_val == 144115188075855872,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:0x1
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x200000000000000, 0x1, x5, 384, x7)
+
+inst_65:
+// rs1_val == 576460752303423488,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:0x6
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x800000000000000, 0x6, x5, 392, x7)
+
+inst_66:
+// rs1_val == 1152921504606846976,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:0x13
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x1000000000000000, 0x13, x5, 400, x7)
+
+inst_67:
+// rs1_val == 2305843009213693952,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:0xa
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x2000000000000000, 0xa, x5, 408, x7)
+
+inst_68:
+// rs1_val == 4611686018427387904,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:0x1f
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x4000000000000000, 0x1f, x5, 416, x7)
+
+inst_69:
+// rs1_val == -2,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0xd
+TEST_RR_OP(sllw, x12, x10, x11, -0x4000, -0x2, 0xd, x5, 424, x7)
+
+inst_70:
+// rs1_val == -3,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0xd
+TEST_RR_OP(sllw, x12, x10, x11, -0x6000, -0x3, 0xd, x5, 432, x7)
+
+inst_71:
+// rs1_val == -5,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0xd
+TEST_RR_OP(sllw, x12, x10, x11, -0xa000, -0x5, 0xd, x5, 440, x7)
+
+inst_72:
+// rs1_val == -9,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x3
+TEST_RR_OP(sllw, x12, x10, x11, -0x48, -0x9, 0x3, x5, 448, x7)
+
+inst_73:
+// rs1_val == -17,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:0x4
+TEST_RR_OP(sllw, x12, x10, x11, -0x110, -0x11, 0x4, x5, 456, x7)
+
+inst_74:
+// rs1_val == -33,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x7
+TEST_RR_OP(sllw, x12, x10, x11, -0x1080, -0x21, 0x7, x5, 464, x7)
+
+inst_75:
+// rs1_val == -65,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x7
+TEST_RR_OP(sllw, x12, x10, x11, -0x2080, -0x41, 0x7, x5, 472, x7)
+
+inst_76:
+// rs1_val == -129,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x12
+TEST_RR_OP(sllw, x12, x10, x11, -0x2040000, -0x81, 0x12, x5, 480, x7)
+
+inst_77:
+// rs1_val == -257,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x8
+TEST_RR_OP(sllw, x12, x10, x11, -0x10100, -0x101, 0x8, x5, 488, x7)
+
+inst_78:
+// rs1_val == -513,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x6
+TEST_RR_OP(sllw, x12, x10, x11, -0x8040, -0x201, 0x6, x5, 496, x7)
+
+inst_79:
+// rs1_val == -1025,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x2
+TEST_RR_OP(sllw, x12, x10, x11, -0x1004, -0x401, 0x2, x5, 504, x7)
+
+inst_80:
+// rs1_val == -2049,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x1e
+TEST_RR_OP(sllw, x12, x10, x11, -0x40000000, -0x801, 0x1e, x5, 512, x7)
+
+inst_81:
+// rs1_val == -4097,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x5
+TEST_RR_OP(sllw, x12, x10, x11, -0x20020, -0x1001, 0x5, x5, 520, x7)
+
+inst_82:
+// rs1_val == -8193,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x5
+TEST_RR_OP(sllw, x12, x10, x11, -0x40020, -0x2001, 0x5, x5, 528, x7)
+
+inst_83:
+// rs1_val == -16385,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x7
+TEST_RR_OP(sllw, x12, x10, x11, -0x200080, -0x4001, 0x7, x5, 536, x7)
+
+inst_84:
+// rs1_val == -32769,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x13
+TEST_RR_OP(sllw, x12, x10, x11, -0x80000, -0x8001, 0x13, x5, 544, x7)
+
+inst_85:
+// rs1_val == -65537,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x11
+TEST_RR_OP(sllw, x12, x10, x11, -0x20000, -0x10001, 0x11, x5, 552, x7)
+
+inst_86:
+// rs1_val == -131073,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x1d
+TEST_RR_OP(sllw, x12, x10, x11, -0x20000000, -0x20001, 0x1d, x5, 560, x7)
+
+inst_87:
+// rs1_val == -262145,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0x8
+TEST_RR_OP(sllw, x12, x10, x11, -0x4000100, -0x40001, 0x8, x5, 568, x7)
+
+inst_88:
+// rs1_val == -36028797018963969,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:0x6
+TEST_RR_OP(sllw, x12, x10, x11, -0x40, -0x80000000000001, 0x6, x5, 576, x7)
+
+inst_89:
+// rs1_val == -72057594037927937,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:0x17
+TEST_RR_OP(sllw, x12, x10, x11, -0x800000, -0x100000000000001, 0x17, x5, 584, x7)
+
+inst_90:
+// rs1_val == -144115188075855873,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:0x1b
+TEST_RR_OP(sllw, x12, x10, x11, -0x8000000, -0x200000000000001, 0x1b, x5, 592, x7)
+
+inst_91:
+// rs1_val == -288230376151711745,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000000001; op2val:0x7
+TEST_RR_OP(sllw, x12, x10, x11, -0x80, -0x400000000000001, 0x7, x5, 600, x7)
+
+inst_92:
+// rs1_val == -576460752303423489,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:0xd
+TEST_RR_OP(sllw, x12, x10, x11, -0x2000, -0x800000000000001, 0xd, x5, 608, x7)
+
+inst_93:
+// rs1_val == -1152921504606846977,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:0x1d
+TEST_RR_OP(sllw, x12, x10, x11, -0x20000000, -0x1000000000000001, 0x1d, x5, 616, x7)
+
+inst_94:
+// rs1_val == -2305843009213693953,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:0x1f
+TEST_RR_OP(sllw, x12, x10, x11, -0x80000000, -0x2000000000000001, 0x1f, x5, 624, x7)
+
+inst_95:
+// rs1_val == -4611686018427387905,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:0x13
+TEST_RR_OP(sllw, x12, x10, x11, -0x80000, -0x4000000000000001, 0x13, x5, 632, x7)
+
+inst_96:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x2
+TEST_RR_OP(sllw, x12, x10, x11, 0x55555554, 0x5555555555555555, 0x2, x5, 640, x7)
+
+inst_97:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xf
+TEST_RR_OP(sllw, x12, x10, x11, 0x55550000, -0x5555555555555556, 0xf, x5, 648, x7)
+
+inst_98:
+// rs1_val==3,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x17
+TEST_RR_OP(sllw, x12, x10, x11, 0x1800000, 0x3, 0x17, x5, 656, x7)
+
+inst_99:
+// rs1_val==3689348814741910323,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x13
+TEST_RR_OP(sllw, x12, x10, x11, -0x66680000, 0x3333333333333333, 0x13, x5, 664, x7)
+
+inst_100:
+// rs1_val==7378697629483820646,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x11
+TEST_RR_OP(sllw, x12, x10, x11, -0x33340000, 0x6666666666666666, 0x11, x5, 672, x7)
+
+inst_101:
+// rs1_val==-3037000499,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x1b
+TEST_RR_OP(sllw, x12, x10, x11, 0x68000000, -0xb504f333, 0x1b, x5, 680, x7)
+
+inst_102:
+// rs1_val==3037000499,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x4
+TEST_RR_OP(sllw, x12, x10, x11, 0x504f3330, 0xb504f333, 0x4, x5, 688, x7)
+
+inst_103:
+// rs1_val==6148914691236517204,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x1
+TEST_RR_OP(sllw, x12, x10, x11, -0x55555558, 0x5555555555555554, 0x1, x5, 696, x7)
+
+inst_104:
+// rs1_val==3689348814741910322,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xe
+TEST_RR_OP(sllw, x12, x10, x11, -0x33338000, 0x3333333333333332, 0xe, x5, 704, x7)
+
+inst_105:
+// rs1_val==7378697629483820645,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x4
+TEST_RR_OP(sllw, x12, x10, x11, 0x66666650, 0x6666666666666665, 0x4, x5, 712, x7)
+
+inst_106:
+// rs1_val==3037000498,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x11
+TEST_RR_OP(sllw, x12, x10, x11, -0x199c0000, 0xb504f332, 0x11, x5, 720, x7)
+
+inst_107:
+// rs1_val==6148914691236517206,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x1
+TEST_RR_OP(sllw, x12, x10, x11, -0x55555554, 0x5555555555555556, 0x1, x5, 728, x7)
+
+inst_108:
+// rs1_val==-6148914691236517205,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x10
+TEST_RR_OP(sllw, x12, x10, x11, -0x55550000, -0x5555555555555555, 0x10, x5, 736, x7)
+
+inst_109:
+// rs1_val==6,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x1f
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0x6, 0x1f, x5, 744, x7)
+
+inst_110:
+// rs1_val==3689348814741910324,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xa
+TEST_RR_OP(sllw, x12, x10, x11, -0x33333000, 0x3333333333333334, 0xa, x5, 752, x7)
+
+inst_111:
+// rs1_val==7378697629483820647,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x1d
+TEST_RR_OP(sllw, x12, x10, x11, -0x20000000, 0x6666666666666667, 0x1d, x5, 760, x7)
+
+inst_112:
+// rs1_val==-3037000498,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3
+TEST_RR_OP(sllw, x12, x10, x11, 0x57d86670, -0xb504f332, 0x3, x5, 768, x7)
+
+inst_113:
+// rs1_val==3037000500,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x1f
+TEST_RR_OP(sllw, x12, x10, x11, 0x0, 0xb504f334, 0x1f, x5, 776, x7)
+
+inst_114:
+// rs1_val == -524289,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x11
+TEST_RR_OP(sllw, x12, x10, x11, -0x20000, -0x80001, 0x11, x5, 784, x7)
+
+inst_115:
+// rs1_val == -1048577,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x15
+TEST_RR_OP(sllw, x12, x10, x11, -0x200000, -0x100001, 0x15, x5, 792, x7)
+
+inst_116:
+// rs1_val == -2097153,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0x12
+TEST_RR_OP(sllw, x12, x10, x11, -0x40000, -0x200001, 0x12, x5, 800, x7)
+
+inst_117:
+// rs1_val == -4194305,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0x12
+TEST_RR_OP(sllw, x12, x10, x11, -0x40000, -0x400001, 0x12, x5, 808, x7)
+
+inst_118:
+// rs1_val == -8388609,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x1
+TEST_RR_OP(sllw, x12, x10, x11, -0x1000002, -0x800001, 0x1, x5, 816, x7)
+
+inst_119:
+// rs1_val == -16777217,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0x0
+TEST_RR_OP(sllw, x12, x10, x11, -0x1000001, -0x1000001, 0x0, x5, 824, x7)
+
+inst_120:
+// rs1_val == -33554433,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0xd
+TEST_RR_OP(sllw, x12, x10, x11, -0x2000, -0x2000001, 0xd, x5, 832, x7)
+
+inst_121:
+// rs1_val == -67108865,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x15
+TEST_RR_OP(sllw, x12, x10, x11, -0x200000, -0x4000001, 0x15, x5, 840, x7)
+
+inst_122:
+// rs1_val == -134217729,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x4
+TEST_RR_OP(sllw, x12, x10, x11, 0x7ffffff0, -0x8000001, 0x4, x5, 848, x7)
+
+inst_123:
+// rs1_val == -268435457,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0xd
+TEST_RR_OP(sllw, x12, x10, x11, -0x2000, -0x10000001, 0xd, x5, 856, x7)
+
+inst_124:
+// rs1_val == -536870913,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x11
+TEST_RR_OP(sllw, x12, x10, x11, -0x20000, -0x20000001, 0x11, x5, 864, x7)
+
+inst_125:
+// rs1_val == -1073741825,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0xa
+TEST_RR_OP(sllw, x12, x10, x11, -0x400, -0x40000001, 0xa, x5, 872, x7)
+
+inst_126:
+// rs1_val == -2147483649,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:0x3
+TEST_RR_OP(sllw, x12, x10, x11, -0x8, -0x80000001, 0x3, x5, 880, x7)
+
+inst_127:
+// rs1_val == -4294967297,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:0x9
+TEST_RR_OP(sllw, x12, x10, x11, -0x200, -0x100000001, 0x9, x5, 888, x7)
+
+inst_128:
+// rs1_val == -8589934593,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:0x9
+TEST_RR_OP(sllw, x12, x10, x11, -0x200, -0x200000001, 0x9, x5, 896, x7)
+
+inst_129:
+// rs1_val == -17179869185,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:0x1b
+TEST_RR_OP(sllw, x12, x10, x11, -0x8000000, -0x400000001, 0x1b, x5, 904, x7)
+
+inst_130:
+// rs1_val == -34359738369,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:0x17
+TEST_RR_OP(sllw, x12, x10, x11, -0x800000, -0x800000001, 0x17, x5, 912, x7)
+
+inst_131:
+// rs1_val == -68719476737,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:0x2
+TEST_RR_OP(sllw, x12, x10, x11, -0x4, -0x1000000001, 0x2, x5, 920, x7)
+
+inst_132:
+// rs1_val == -137438953473,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:0x17
+TEST_RR_OP(sllw, x12, x10, x11, -0x800000, -0x2000000001, 0x17, x5, 928, x7)
+
+inst_133:
+// rs1_val == -274877906945,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0xd
+TEST_RR_OP(sllw, x12, x10, x11, -0x2000, -0x4000000001, 0xd, x5, 936, x7)
+
+inst_134:
+// rs1_val == -549755813889,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:0x5
+TEST_RR_OP(sllw, x12, x10, x11, -0x20, -0x8000000001, 0x5, x5, 944, x7)
+
+inst_135:
+// rs1_val == -1099511627777,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:0x6
+TEST_RR_OP(sllw, x12, x10, x11, -0x40, -0x10000000001, 0x6, x5, 952, x7)
+
+inst_136:
+// rs1_val == -2199023255553,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:0xc
+TEST_RR_OP(sllw, x12, x10, x11, -0x1000, -0x20000000001, 0xc, x5, 960, x7)
+
+inst_137:
+// rs1_val == -4398046511105,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:0x7
+TEST_RR_OP(sllw, x12, x10, x11, -0x80, -0x40000000001, 0x7, x5, 968, x7)
+
+inst_138:
+// rs1_val == -8796093022209,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:0x17
+TEST_RR_OP(sllw, x12, x10, x11, -0x800000, -0x80000000001, 0x17, x5, 976, x7)
+
+inst_139:
+// rs1_val == -17592186044417,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:0x1f
+TEST_RR_OP(sllw, x12, x10, x11, -0x80000000, -0x100000000001, 0x1f, x5, 984, x7)
+
+inst_140:
+// rs1_val == -35184372088833,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:0x4
+TEST_RR_OP(sllw, x12, x10, x11, -0x10, -0x200000000001, 0x4, x5, 992, x7)
+
+inst_141:
+// rs1_val == -70368744177665,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:0x1d
+TEST_RR_OP(sllw, x12, x10, x11, -0x20000000, -0x400000000001, 0x1d, x5, 1000, x7)
+
+inst_142:
+// rs1_val == -281474976710657,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:0x10
+TEST_RR_OP(sllw, x12, x10, x11, -0x10000, -0x1000000000001, 0x10, x5, 1008, x7)
+
+inst_143:
+// rs1_val == -562949953421313,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:0x6
+TEST_RR_OP(sllw, x12, x10, x11, -0x40, -0x2000000000001, 0x6, x5, 1016, x7)
+
+inst_144:
+// rs1_val == -1125899906842625,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:0xd
+TEST_RR_OP(sllw, x12, x10, x11, -0x2000, -0x4000000000001, 0xd, x5, 1024, x7)
+
+inst_145:
+// rs1_val == -2251799813685249,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:0x1
+TEST_RR_OP(sllw, x12, x10, x11, -0x2, -0x8000000000001, 0x1, x5, 1032, x7)
+
+inst_146:
+// rs1_val == -4503599627370497,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:0x12
+TEST_RR_OP(sllw, x12, x10, x11, -0x40000, -0x10000000000001, 0x12, x5, 1040, x7)
+
+inst_147:
+// rs1_val == -9007199254740993,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:0x1e
+TEST_RR_OP(sllw, x12, x10, x11, -0x40000000, -0x20000000000001, 0x1e, x5, 1048, x7)
+
+inst_148:
+// rs1_val == -18014398509481985,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:0xe
+TEST_RR_OP(sllw, x12, x10, x11, -0x4000, -0x40000000000001, 0xe, x5, 1056, x7)
+
+inst_149:
+// rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == -140737488355329, rs2_val == 15
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:0xf
+TEST_RR_OP(sllw, x12, x10, x11, -0x8000, -0x800000000001, 0xf, x5, 1064, x7)
+
+inst_150:
+// rs1_val == (2**(xlen-1)-1) and rs2_val >= 0 and rs2_val < xlen, rs1_val == 9223372036854775807
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffffffffffff; op2val:0x17
+TEST_RR_OP(sllw, x12, x10, x11, -0x800000, 0x7fffffffffffffff, 0x17, x5, 1072, x7)
+
+inst_151:
+// rs1_val == 64,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0x11
+TEST_RR_OP(sllw, x12, x10, x11, 0x800000, 0x40, 0x11, x5, 1080, x7)
+
+inst_152:
+// rs1_val == 4194304,
+// opcode: sllw ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x6
+TEST_RR_OP(sllw, x12, x10, x11, 0x10000000, 0x400000, 0x6, x5, 1088, x7)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x4_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_1:
+ .fill 16*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_0:
+ .fill 137*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/slt-01.S b/riscof/suite/rv64i_m/I/slt-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..ee2060a8885a7b29209a44cf24c2fc1b4586143d
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/slt-01.S
@@ -0,0 +1,3464 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the slt instruction of the RISC-V I extension for the slt covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",slt)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x13, rs2==x13, rd==x5, rs1_val > 0 and rs2_val > 0, rs1_val == 134217728, rs1_val != rs2_val, rs2_val == 144115188075855872
+// opcode: slt ; op1:x13; op2:x13; dest:x5; op1val:0x8000000; op2val:0x8000000
+TEST_RR_OP(slt, x5, x13, x13, 0x0, 0x8000000, 0x8000000, x1, 0, x14)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x11, rs2==x26, rd==x26, rs1_val > 0 and rs2_val < 0, rs1_val == 4611686018427387904
+// opcode: slt ; op1:x11; op2:x26; dest:x26; op1val:0x4000000000000000; op2val:-0xb504f333
+TEST_RR_OP(slt, x26, x11, x26, 0x0, 0x4000000000000000, -0xb504f333, x1, 8, x14)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x12, rs2==x12, rd==x12, rs1_val < 0 and rs2_val < 0, rs1_val == -4503599627370497, rs2_val == -1025
+// opcode: slt ; op1:x12; op2:x12; dest:x12; op1val:-0x10000000000001; op2val:-0x10000000000001
+TEST_RR_OP(slt, x12, x12, x12, 0x0, -0x10000000000001, -0x10000000000001, x1, 16, x14)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x27, rs2==x15, rd==x7, rs1_val < 0 and rs2_val > 0, rs2_val == 1, rs1_val == -34359738369
+// opcode: slt ; op1:x27; op2:x15; dest:x7; op1val:-0x800000001; op2val:0x1
+TEST_RR_OP(slt, x7, x27, x15, 0x1, -0x800000001, 0x1, x1, 24, x14)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x17, rs2==x5, rd==x17, rs1_val == rs2_val, rs1_val == 4398046511104, rs2_val == 4398046511104
+// opcode: slt ; op1:x17; op2:x5; dest:x17; op1val:0x40000000000; op2val:0x40000000000
+TEST_RR_OP(slt, x17, x17, x5, 0x0, 0x40000000000, 0x40000000000, x1, 32, x14)
+
+inst_5:
+// rs1==x15, rs2==x0, rd==x13, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, rs1_val == -4294967297
+// opcode: slt ; op1:x15; op2:x0; dest:x13; op1val:-0x100000001; op2val:0x0
+TEST_RR_OP(slt, x13, x15, x0, 0x1, -0x100000001, 0x0, x1, 40, x14)
+
+inst_6:
+// rs1==x3, rs2==x24, rd==x30, rs2_val == 0, rs1_val == -17592186044417
+// opcode: slt ; op1:x3; op2:x24; dest:x30; op1val:-0x100000000001; op2val:0x0
+TEST_RR_OP(slt, x30, x3, x24, 0x1, -0x100000000001, 0x0, x1, 48, x14)
+
+inst_7:
+// rs1==x26, rs2==x2, rd==x24, rs2_val == (2**(xlen-1)-1), rs1_val == 34359738368, rs2_val == 9223372036854775807
+// opcode: slt ; op1:x26; op2:x2; dest:x24; op1val:0x800000000; op2val:0x7fffffffffffffff
+TEST_RR_OP(slt, x24, x26, x2, 0x1, 0x800000000, 0x7fffffffffffffff, x1, 56, x14)
+
+inst_8:
+// rs1==x21, rs2==x9, rd==x20, rs1_val == (-2**(xlen-1)), rs2_val == -140737488355329, rs1_val == -9223372036854775808
+// opcode: slt ; op1:x21; op2:x9; dest:x20; op1val:-0x8000000000000000; op2val:-0x800000000001
+TEST_RR_OP(slt, x20, x21, x9, 0x1, -0x8000000000000000, -0x800000000001, x1, 64, x14)
+
+inst_9:
+// rs1==x7, rs2==x21, rd==x31, rs1_val == 0,
+// opcode: slt ; op1:x7; op2:x21; dest:x31; op1val:0x0; op2val:-0x4
+TEST_RR_OP(slt, x31, x7, x21, 0x0, 0x0, -0x4, x1, 72, x14)
+
+inst_10:
+// rs1==x30, rs2==x3, rd==x8, rs1_val == (2**(xlen-1)-1), rs2_val == 8, rs1_val == 9223372036854775807
+// opcode: slt ; op1:x30; op2:x3; dest:x8; op1val:0x7fffffffffffffff; op2val:0x8
+TEST_RR_OP(slt, x8, x30, x3, 0x0, 0x7fffffffffffffff, 0x8, x1, 80, x14)
+
+inst_11:
+// rs1==x6, rs2==x29, rd==x2, rs1_val == 1, rs2_val == -68719476737
+// opcode: slt ; op1:x6; op2:x29; dest:x2; op1val:0x1; op2val:-0x1000000001
+TEST_RR_OP(slt, x2, x6, x29, 0x0, 0x1, -0x1000000001, x1, 88, x14)
+
+inst_12:
+// rs1==x18, rs2==x19, rd==x10, rs2_val == 2, rs1_val == 8
+// opcode: slt ; op1:x18; op2:x19; dest:x10; op1val:0x8; op2val:0x2
+TEST_RR_OP(slt, x10, x18, x19, 0x0, 0x8, 0x2, x1, 96, x14)
+
+inst_13:
+// rs1==x8, rs2==x18, rd==x25, rs2_val == 4, rs1_val == 4294967296
+// opcode: slt ; op1:x8; op2:x18; dest:x25; op1val:0x100000000; op2val:0x4
+TEST_RR_OP(slt, x25, x8, x18, 0x0, 0x100000000, 0x4, x1, 104, x14)
+
+inst_14:
+// rs1==x2, rs2==x16, rd==x11, rs2_val == 16,
+// opcode: slt ; op1:x2; op2:x16; dest:x11; op1val:0x0; op2val:0x10
+TEST_RR_OP(slt, x11, x2, x16, 0x1, 0x0, 0x10, x1, 112, x14)
+
+inst_15:
+// rs1==x28, rs2==x31, rd==x18, rs2_val == 32, rs1_val == 562949953421312
+// opcode: slt ; op1:x28; op2:x31; dest:x18; op1val:0x2000000000000; op2val:0x20
+TEST_RR_OP(slt, x18, x28, x31, 0x0, 0x2000000000000, 0x20, x1, 120, x14)
+
+inst_16:
+// rs1==x4, rs2==x17, rd==x9, rs2_val == 64, rs1_val == 17179869184
+// opcode: slt ; op1:x4; op2:x17; dest:x9; op1val:0x400000000; op2val:0x40
+TEST_RR_OP(slt, x9, x4, x17, 0x0, 0x400000000, 0x40, x1, 128, x14)
+
+inst_17:
+// rs1==x0, rs2==x23, rd==x16, rs2_val == 128, rs1_val == -3
+// opcode: slt ; op1:x0; op2:x23; dest:x16; op1val:0x0; op2val:0x80
+TEST_RR_OP(slt, x16, x0, x23, 0x1, 0x0, 0x80, x1, 136, x13)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_18:
+// rs1==x14, rs2==x4, rd==x19, rs2_val == 256,
+// opcode: slt ; op1:x14; op2:x4; dest:x19; op1val:0x5555555555555556; op2val:0x100
+TEST_RR_OP(slt, x19, x14, x4, 0x0, 0x5555555555555556, 0x100, x2, 0, x13)
+
+inst_19:
+// rs1==x1, rs2==x22, rd==x28, rs2_val == 512,
+// opcode: slt ; op1:x1; op2:x22; dest:x28; op1val:0x5; op2val:0x200
+TEST_RR_OP(slt, x28, x1, x22, 0x1, 0x5, 0x200, x2, 8, x13)
+
+inst_20:
+// rs1==x25, rs2==x20, rd==x22, rs2_val == 1024, rs1_val == -8796093022209
+// opcode: slt ; op1:x25; op2:x20; dest:x22; op1val:-0x80000000001; op2val:0x400
+TEST_RR_OP(slt, x22, x25, x20, 0x1, -0x80000000001, 0x400, x2, 16, x13)
+
+inst_21:
+// rs1==x29, rs2==x10, rd==x6, rs2_val == 2048, rs1_val == -2305843009213693953
+// opcode: slt ; op1:x29; op2:x10; dest:x6; op1val:-0x2000000000000001; op2val:0x800
+TEST_RR_OP(slt, x6, x29, x10, 0x1, -0x2000000000000001, 0x800, x2, 24, x13)
+
+inst_22:
+// rs1==x19, rs2==x1, rd==x29, rs2_val == 4096, rs1_val == 2097152
+// opcode: slt ; op1:x19; op2:x1; dest:x29; op1val:0x200000; op2val:0x1000
+TEST_RR_OP(slt, x29, x19, x1, 0x0, 0x200000, 0x1000, x2, 32, x13)
+
+inst_23:
+// rs1==x10, rs2==x28, rd==x4, rs2_val == 8192, rs1_val == -274877906945
+// opcode: slt ; op1:x10; op2:x28; dest:x4; op1val:-0x4000000001; op2val:0x2000
+TEST_RR_OP(slt, x4, x10, x28, 0x1, -0x4000000001, 0x2000, x2, 40, x13)
+
+inst_24:
+// rs1==x22, rs2==x30, rd==x15, rs2_val == 16384,
+// opcode: slt ; op1:x22; op2:x30; dest:x15; op1val:-0x10000000000001; op2val:0x4000
+TEST_RR_OP(slt, x15, x22, x30, 0x1, -0x10000000000001, 0x4000, x2, 48, x13)
+
+inst_25:
+// rs1==x5, rs2==x7, rd==x21, rs2_val == 32768, rs1_val == 2199023255552
+// opcode: slt ; op1:x5; op2:x7; dest:x21; op1val:0x20000000000; op2val:0x8000
+TEST_RR_OP(slt, x21, x5, x7, 0x0, 0x20000000000, 0x8000, x2, 56, x13)
+
+inst_26:
+// rs1==x20, rs2==x27, rd==x23, rs2_val == 65536,
+// opcode: slt ; op1:x20; op2:x27; dest:x23; op1val:0x5555555555555556; op2val:0x10000
+TEST_RR_OP(slt, x23, x20, x27, 0x0, 0x5555555555555556, 0x10000, x2, 64, x13)
+
+inst_27:
+// rs1==x23, rs2==x6, rd==x1, rs2_val == 131072, rs1_val == -2097153
+// opcode: slt ; op1:x23; op2:x6; dest:x1; op1val:-0x200001; op2val:0x20000
+TEST_RR_OP(slt, x1, x23, x6, 0x1, -0x200001, 0x20000, x2, 72, x13)
+
+inst_28:
+// rs1==x31, rs2==x25, rd==x14, rs2_val == 262144, rs1_val == -1025
+// opcode: slt ; op1:x31; op2:x25; dest:x14; op1val:-0x401; op2val:0x40000
+TEST_RR_OP(slt, x14, x31, x25, 0x1, -0x401, 0x40000, x2, 80, x13)
+
+inst_29:
+// rs1==x16, rs2==x8, rd==x0, rs2_val == 524288,
+// opcode: slt ; op1:x16; op2:x8; dest:x0; op1val:-0xb504f333; op2val:0x80000
+TEST_RR_OP(slt, x0, x16, x8, 0, -0xb504f333, 0x80000, x2, 88, x13)
+
+inst_30:
+// rs1==x9, rs2==x14, rd==x27, rs2_val == 1048576, rs1_val == 262144
+// opcode: slt ; op1:x9; op2:x14; dest:x27; op1val:0x40000; op2val:0x100000
+TEST_RR_OP(slt, x27, x9, x14, 0x1, 0x40000, 0x100000, x2, 96, x13)
+
+inst_31:
+// rs1==x24, rs2==x11, rd==x3, rs2_val == 2097152,
+// opcode: slt ; op1:x24; op2:x11; dest:x3; op1val:0x6; op2val:0x200000
+TEST_RR_OP(slt, x3, x24, x11, 0x1, 0x6, 0x200000, x2, 104, x13)
+
+inst_32:
+// rs2_val == 4194304,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:0x400000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x7, 0x400000, x2, 112, x13)
+
+inst_33:
+// rs2_val == 8388608, rs1_val == 1099511627776
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x800000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x10000000000, 0x800000, x2, 120, x13)
+
+inst_34:
+// rs2_val == 16777216, rs1_val == -1048577
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x1000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x100001, 0x1000000, x2, 128, x13)
+
+inst_35:
+// rs2_val == 33554432, rs1_val == 268435456
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x2000000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x10000000, 0x2000000, x2, 136, x13)
+
+inst_36:
+// rs2_val == 67108864,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x4000000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, 0x4000000, x2, 144, x13)
+
+inst_37:
+// rs2_val == 134217728,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:0x8000000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x20000000000, 0x8000000, x2, 152, x13)
+
+inst_38:
+// rs2_val == 268435456, rs1_val == -1152921504606846977
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:0x10000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x1000000000000001, 0x10000000, x2, 160, x13)
+
+inst_39:
+// rs2_val == 536870912, rs1_val == -144115188075855873
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:0x20000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x200000000000001, 0x20000000, x2, 168, x13)
+
+inst_40:
+// rs2_val == 1073741824,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000000; op2val:0x40000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x4000000000000000, 0x40000000, x2, 176, x13)
+
+inst_41:
+// rs2_val == 2147483648,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:0x80000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x200000000000001, 0x80000000, x2, 184, x13)
+
+inst_42:
+// rs2_val == 4294967296, rs1_val == -549755813889
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:0x100000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x8000000001, 0x100000000, x2, 192, x13)
+
+inst_43:
+// rs2_val == 8589934592,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x200000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x200000000, x2, 200, x13)
+
+inst_44:
+// rs2_val == 17179869184, rs1_val == -36028797018963969
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:0x400000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x80000000000001, 0x400000000, x2, 208, x13)
+
+inst_45:
+// rs2_val == 34359738368, rs1_val == -17179869185
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:0x800000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x400000001, 0x800000000, x2, 216, x13)
+
+inst_46:
+// rs2_val == 68719476736, rs1_val == 4096
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x1000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x1000, 0x1000000000, x2, 224, x13)
+
+inst_47:
+// rs2_val == 137438953472, rs1_val == 1024
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:0x2000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x400, 0x2000000000, x2, 232, x13)
+
+inst_48:
+// rs2_val == 274877906944, rs1_val == 4
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x4000000000, x2, 240, x13)
+
+inst_49:
+// rs2_val == 549755813888, rs1_val == -67108865
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x8000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x4000001, 0x8000000000, x2, 248, x13)
+
+inst_50:
+// rs2_val == 1099511627776, rs1_val == 18014398509481984
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:0x10000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x40000000000000, 0x10000000000, x2, 256, x13)
+
+inst_51:
+// rs2_val == 2199023255552, rs1_val == -9
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x20000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x9, 0x20000000000, x2, 264, x13)
+
+inst_52:
+// rs2_val == 8796093022208, rs1_val == 33554432
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x80000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2000000, 0x80000000000, x2, 272, x13)
+
+inst_53:
+// rs2_val == 17592186044416, rs1_val == -72057594037927937
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:0x100000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x100000000000001, 0x100000000000, x2, 280, x13)
+
+inst_54:
+// rs2_val == 35184372088832, rs1_val == -5
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0x200000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5, 0x200000000000, x2, 288, x13)
+
+inst_55:
+// rs2_val == 70368744177664, rs1_val == 70368744177664
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:0x400000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x400000000000, 0x400000000000, x2, 296, x13)
+
+inst_56:
+// rs2_val == 140737488355328,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:0x800000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x100000000001, 0x800000000000, x2, 304, x13)
+
+inst_57:
+// rs2_val == 281474976710656,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:0x1000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x40000000000000, 0x1000000000000, x2, 312, x13)
+
+inst_58:
+// rs2_val == 562949953421312, rs1_val == -70368744177665
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:0x2000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x400000000001, 0x2000000000000, x2, 320, x13)
+
+inst_59:
+// rs2_val == 1125899906842624,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:0x4000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x80000000000001, 0x4000000000000, x2, 328, x13)
+
+inst_60:
+// rs2_val == 2251799813685248,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:0x8000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x100000001, 0x8000000000000, x2, 336, x13)
+
+inst_61:
+// rs2_val == 4503599627370496,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:0x10000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x400000000, 0x10000000000000, x2, 344, x13)
+
+inst_62:
+// rs2_val == 9007199254740992, rs1_val == -8589934593
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:0x20000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x200000001, 0x20000000000000, x2, 352, x13)
+
+inst_63:
+// rs2_val == 18014398509481984, rs1_val == -8193
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x40000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x2001, 0x40000000000000, x2, 360, x13)
+
+inst_64:
+// rs2_val == 36028797018963968, rs1_val == 2305843009213693952
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:0x80000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2000000000000000, 0x80000000000000, x2, 368, x13)
+
+inst_65:
+// rs2_val == 72057594037927936, rs1_val == -562949953421313
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:0x100000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x2000000000001, 0x100000000000000, x2, 376, x13)
+
+inst_66:
+// rs2_val == 288230376151711744,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0x400000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x3, 0x400000000000000, x2, 384, x13)
+
+inst_67:
+// rs2_val == 576460752303423488, rs1_val == -6148914691236517206
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x800000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x800000000000000, x2, 392, x13)
+
+inst_68:
+// rs2_val == 1152921504606846976, rs1_val == -33554433
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x1000000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x2000001, 0x1000000000000000, x2, 400, x13)
+
+inst_69:
+// rs2_val == 2305843009213693952,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2000000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x2000000000000000, x2, 408, x13)
+
+inst_70:
+// rs2_val == 4611686018427387904, rs1_val == -1073741825
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x4000000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x40000001, 0x4000000000000000, x2, 416, x13)
+
+inst_71:
+// rs2_val == -2, rs1_val == -281474976710657
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:-0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x1000000000001, -0x2, x2, 424, x13)
+
+inst_72:
+// rs2_val == -3, rs1_val == -2251799813685249
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:-0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x8000000000001, -0x3, x2, 432, x13)
+
+inst_73:
+// rs2_val == -5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, -0x5, x2, 440, x13)
+
+inst_74:
+// rs2_val == -9, rs1_val == -4611686018427387905
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:-0x9
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x4000000000000001, -0x9, x2, 448, x13)
+
+inst_75:
+// rs2_val == -17, rs1_val == -9007199254740993
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:-0x11
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x20000000000001, -0x11, x2, 456, x13)
+
+inst_76:
+// rs2_val == -33,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:-0x21
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x401, -0x21, x2, 464, x13)
+
+inst_77:
+// rs2_val == -65, rs1_val == 16
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:-0x41
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x10, -0x41, x2, 472, x13)
+
+inst_78:
+// rs2_val == -129, rs1_val == 2048
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x81
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x800, -0x81, x2, 480, x13)
+
+inst_79:
+// rs2_val == -257,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x101
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, -0x101, x2, 488, x13)
+
+inst_80:
+// rs2_val == -513,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:-0x201
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x10000000, -0x201, x2, 496, x13)
+
+inst_81:
+// rs2_val == -2049, rs1_val == -65537
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x801
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x10001, -0x801, x2, 504, x13)
+
+inst_82:
+// rs2_val == -4097, rs1_val == -524289
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:-0x1001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x80001, -0x1001, x2, 512, x13)
+
+inst_83:
+// rs2_val == -8193,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:-0x2001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x2000000000000001, -0x2001, x2, 520, x13)
+
+inst_84:
+// rs2_val == -16385, rs1_val == 35184372088832
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:-0x4001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x200000000000, -0x4001, x2, 528, x13)
+
+inst_85:
+// rs2_val == -32769,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:-0x8001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x8, -0x8001, x2, 536, x13)
+
+inst_86:
+// rs2_val == -65537,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x9; op2val:-0x10001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x9, -0x10001, x2, 544, x13)
+
+inst_87:
+// rs2_val == -131073, rs1_val == 288230376151711744
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:-0x20001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x400000000000000, -0x20001, x2, 552, x13)
+
+inst_88:
+// rs2_val == -262145,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:-0x40001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x200000001, -0x40001, x2, 560, x13)
+
+inst_89:
+// rs2_val == -524289,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x80001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, -0x80001, x2, 568, x13)
+
+inst_90:
+// rs2_val == -1048577,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000000; op2val:-0x100001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x4000000000000000, -0x100001, x2, 576, x13)
+
+inst_91:
+// rs2_val == -2097153,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:-0x200001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x40000001, -0x200001, x2, 584, x13)
+
+inst_92:
+// rs2_val == -4194305, rs1_val == 1125899906842624
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:-0x400001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4000000000000, -0x400001, x2, 592, x13)
+
+inst_93:
+// rs2_val == -8388609,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:-0x800001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x7, -0x800001, x2, 600, x13)
+
+inst_94:
+// rs2_val == -16777217,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:-0x1000001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x100000001, -0x1000001, x2, 608, x13)
+
+inst_95:
+// rs2_val == -33554433,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:-0x2000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x5, -0x2000001, x2, 616, x13)
+
+inst_96:
+// rs2_val == -67108865,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x4000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, -0x4000001, x2, 624, x13)
+
+inst_97:
+// rs2_val == -134217729,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000000; op2val:-0x8000001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x4000000000000000, -0x8000001, x2, 632, x13)
+
+inst_98:
+// rs2_val == -268435457, rs1_val == 1152921504606846976
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:-0x10000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x1000000000000000, -0x10000001, x2, 640, x13)
+
+inst_99:
+// rs2_val == -536870913, rs1_val == 256
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x20000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x100, -0x20000001, x2, 648, x13)
+
+inst_100:
+// rs2_val == -1073741825,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:-0x40000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x20000000000, -0x40000001, x2, 656, x13)
+
+inst_101:
+// rs2_val == -2147483649, rs1_val == -17
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:-0x80000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x11, -0x80000001, x2, 664, x13)
+
+inst_102:
+// rs2_val == -4294967297, rs1_val == -262145
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:-0x100000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x40001, -0x100000001, x2, 672, x13)
+
+inst_103:
+// rs2_val == -8589934593, rs1_val == 1073741824
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:-0x200000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x40000000, -0x200000001, x2, 680, x13)
+
+inst_104:
+// rs2_val == -17179869185,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:-0x400000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x9, -0x400000001, x2, 688, x13)
+
+inst_105:
+// rs2_val == -34359738369, rs1_val == 4503599627370496
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:-0x800000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x10000000000000, -0x800000001, x2, 696, x13)
+
+inst_106:
+// rs2_val == -137438953473,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x2000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, -0x2000000001, x2, 704, x13)
+
+inst_107:
+// rs2_val == -274877906945,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:-0x4000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x80000000000001, -0x4000000001, x2, 712, x13)
+
+inst_108:
+// rs2_val == -549755813889, rs1_val == 17592186044416
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:-0x8000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x100000000000, -0x8000000001, x2, 720, x13)
+
+inst_109:
+// rs2_val == -1099511627777,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:-0x10000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x100000000000, -0x10000000001, x2, 728, x13)
+
+inst_110:
+// rs2_val == -2199023255553, rs1_val == -513
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:-0x20000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x201, -0x20000000001, x2, 736, x13)
+
+inst_111:
+// rs2_val == -4398046511105,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x40000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x0, -0x40000000001, x2, 744, x13)
+
+inst_112:
+// rs2_val == -8796093022209,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:-0x80000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x4000001, -0x80000000001, x2, 752, x13)
+
+inst_113:
+// rs2_val == -17592186044417,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:-0x100000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2000000000000000, -0x100000000001, x2, 760, x13)
+
+inst_114:
+// rs2_val == -35184372088833,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:-0x200000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x4000000000000001, -0x200000000001, x2, 768, x13)
+
+inst_115:
+// rs2_val == -70368744177665, rs1_val == 8192
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:-0x400000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2000, -0x400000000001, x2, 776, x13)
+
+inst_116:
+// rs2_val == -281474976710657,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x1000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, -0x1000000000001, x2, 784, x13)
+
+inst_117:
+// rs2_val == -562949953421313,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:-0x2000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x1000000000000001, -0x2000000000001, x2, 792, x13)
+
+inst_118:
+// rs2_val == -1125899906842625,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4; op2val:-0x4000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x4, -0x4000000000001, x2, 800, x13)
+
+inst_119:
+// rs2_val == -2251799813685249,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:-0x8000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x4000001, -0x8000000000001, x2, 808, x13)
+
+inst_120:
+// rs2_val == -4503599627370497,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x10000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, -0x10000000000001, x2, 816, x13)
+
+inst_121:
+// rs2_val == -9007199254740993,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:-0x20000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x9, -0x20000000000001, x2, 824, x13)
+
+inst_122:
+// rs2_val == -18014398509481985,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:-0x40000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x10000000000, -0x40000000000001, x2, 832, x13)
+
+inst_123:
+// rs2_val == -36028797018963969, rs1_val == 2251799813685248
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:-0x80000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x8000000000000, -0x80000000000001, x2, 840, x13)
+
+inst_124:
+// rs2_val == -72057594037927937, rs1_val == -576460752303423489
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:-0x100000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x800000000000001, -0x100000000000001, x2, 848, x13)
+
+inst_125:
+// rs2_val == -144115188075855873,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:-0x200000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x7, -0x200000000000001, x2, 856, x13)
+
+inst_126:
+// rs2_val == -288230376151711745,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:-0x400000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x1, -0x400000000000001, x2, 864, x13)
+
+inst_127:
+// rs2_val == -576460752303423489, rs1_val == -1125899906842625
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:-0x800000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x4000000000001, -0x800000000000001, x2, 872, x13)
+
+inst_128:
+// rs2_val == -1152921504606846977,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:-0x1000000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x10000000, -0x1000000000000001, x2, 880, x13)
+
+inst_129:
+// rs2_val == -2305843009213693953,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:-0x2000000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x1, -0x2000000000000001, x2, 888, x13)
+
+inst_130:
+// rs2_val == -4611686018427387905, rs1_val == 65536
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:-0x4000000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x10000, -0x4000000000000001, x2, 896, x13)
+
+inst_131:
+// rs2_val == 6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x8000000001, 0x5555555555555555, x2, 904, x13)
+
+inst_132:
+// rs2_val == -6148914691236517206, rs1_val == -288230376151711745
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000000001; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x400000000000001, -0x5555555555555556, x2, 912, x13)
+
+inst_133:
+// rs1_val == 2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x100000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x100000000000000, x2, 920, x13)
+
+inst_134:
+// rs1_val == 32,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x4001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x20, -0x4001, x2, 928, x13)
+
+inst_135:
+// rs1_val == 64,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x40, 0x5, x2, 936, x13)
+
+inst_136:
+// rs1_val == 128,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:-0x200000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x80, -0x200000000001, x2, 944, x13)
+
+inst_137:
+// rs1_val == 512,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:-0x4000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x200, -0x4000000000001, x2, 952, x13)
+
+inst_138:
+// rs1_val == 16384,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4000, -0xb504f333, x2, 960, x13)
+
+inst_139:
+// rs1_val == 32768,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x200000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x8000, -0x200000001, x2, 968, x13)
+
+inst_140:
+// rs1_val == 131072,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0x100000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x20000, 0x100000000, x2, 976, x13)
+
+inst_141:
+// rs1_val == 524288,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:-0x1000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x80000, -0x1000000000001, x2, 984, x13)
+
+inst_142:
+// rs1_val == 1048576,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0x1000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x100000, 0x1000000000, x2, 992, x13)
+
+inst_143:
+// rs1_val == 4194304,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:-0x400001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x400000, -0x400001, x2, 1000, x13)
+
+inst_144:
+// rs1_val == 8388608,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x800000, 0x3, x2, 1008, x13)
+
+inst_145:
+// rs1_val == 16777216,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0x20000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x1000000, 0x20000000000000, x2, 1016, x13)
+
+inst_146:
+// rs1_val == 67108864,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x400000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4000000, 0x400000000000, x2, 1024, x13)
+
+inst_147:
+// rs1_val == 536870912,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:-0x40000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x20000000, -0x40000000000001, x2, 1032, x13)
+
+inst_148:
+// rs1_val == 2147483648,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:-0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x80000000, -0x4, x2, 1040, x13)
+
+inst_149:
+// rs1_val == 8589934592,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:0x8
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x200000000, 0x8, x2, 1048, x13)
+
+inst_150:
+// rs1_val == 68719476736,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:0x4000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x1000000000, 0x4000000000, x2, 1056, x13)
+
+inst_151:
+// rs1_val == 137438953472,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:-0x4001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2000000000, -0x4001, x2, 1064, x13)
+
+inst_152:
+// rs1_val == 274877906944,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:-0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4000000000, -0x3, x2, 1072, x13)
+
+inst_153:
+// rs1_val == 549755813888,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:-0x200000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x8000000000, -0x200000001, x2, 1080, x13)
+
+inst_154:
+// rs1_val == 8796093022208,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x80000000000, 0x3333333333333334, x2, 1088, x13)
+
+inst_155:
+// rs1_val == 140737488355328,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:0x400000000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x800000000000, 0x400000000, x2, 1096, x13)
+
+inst_156:
+// rs1_val == 281474976710656,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0x20000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x1000000000000, 0x20000, x2, 1104, x13)
+
+inst_157:
+// rs1_val == 9007199254740992,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:0x1000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x20000000000000, 0x1000, x2, 1112, x13)
+
+inst_158:
+// rs1_val == 36028797018963968,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x80000000000000, 0x5555555555555556, x2, 1120, x13)
+
+inst_159:
+// rs1_val == 72057594037927936,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:0x40000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x100000000000000, 0x40000000000000, x2, 1128, x13)
+
+inst_160:
+// rs1_val == 144115188075855872,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:0x1000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x200000000000000, 0x1000000000000, x2, 1136, x13)
+
+inst_161:
+// rs1_val == 576460752303423488,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x800000000000000, 0x4, x2, 1144, x13)
+
+inst_162:
+// rs1_val == -2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0x4000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x2, -0x4000000000001, x2, 1152, x13)
+
+inst_163:
+// rs1_val == -33,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x21, 0x2, x2, 1160, x13)
+
+inst_164:
+// rs1_val == -65,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:-0x7
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x41, -0x7, x2, 1168, x13)
+
+inst_165:
+// rs1_val == -129,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x81, 0x5555555555555554, x2, 1176, x13)
+
+inst_166:
+// rs1_val == -257,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x101, 0x0, x2, 1184, x13)
+
+inst_167:
+// rs1_val == -2049,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:-0x9
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x801, -0x9, x2, 1192, x13)
+
+inst_168:
+// rs1_val == -4097,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:-0x40001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x1001, -0x40001, x2, 1200, x13)
+
+inst_169:
+// rs1_val == -16385,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x10000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x4001, 0x10000000000000, x2, 1208, x13)
+
+inst_170:
+// rs1_val == -32769,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:-0x40000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x8001, -0x40000000001, x2, 1216, x13)
+
+inst_171:
+// rs1_val == -131073,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:-0x20000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x20001, -0x20000000001, x2, 1224, x13)
+
+inst_172:
+// rs1_val == -4194305,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0x80
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x400001, 0x80, x2, 1232, x13)
+
+inst_173:
+// rs1_val == -8388609,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x40
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x800001, 0x40, x2, 1240, x13)
+
+inst_174:
+// rs1_val == -16777217,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0x40
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x1000001, 0x40, x2, 1248, x13)
+
+inst_175:
+// rs1_val == -134217729,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x20000000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x8000001, -0x20000000000001, x2, 1256, x13)
+
+inst_176:
+// rs1_val == -268435457,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x80000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x10000001, 0x80000000000, x2, 1264, x13)
+
+inst_177:
+// rs1_val == -536870913,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x800000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x20000001, 0x800000000000000, x2, 1272, x13)
+
+inst_178:
+// rs1_val == -2147483649,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:0x800000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x80000001, 0x800000, x2, 1280, x13)
+
+inst_179:
+// rs1_val == -68719476737,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:-0x10000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x1000000001, -0x10000000001, x2, 1288, x13)
+
+inst_180:
+// rs1_val == -137438953473,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:0x100
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x2000000001, 0x100, x2, 1296, x13)
+
+inst_181:
+// rs1_val == -1099511627777,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:-0x10001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x10000000001, -0x10001, x2, 1304, x13)
+
+inst_182:
+// rs1_val == -2199023255553,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:-0x800000001
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x20000000001, -0x800000001, x2, 1312, x13)
+
+inst_183:
+// rs1_val == -4398046511105,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:0x1000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x40000000001, 0x1000000000000, x2, 1320, x13)
+
+inst_184:
+// rs1_val == -35184372088833,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x200000000001, 0xb504f332, x2, 1328, x13)
+
+inst_185:
+// rs1_val == -140737488355329,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x800000000001, 0x2, x2, 1336, x13)
+
+inst_186:
+// rs1_val == -18014398509481985,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:-0x4000000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x40000000000001, -0x4000000000000000, x2, 1344, x13)
+
+inst_187:
+// rs1_val == 6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x20000000001
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, -0x20000000001, x2, 1352, x13)
+
+inst_188:
+// rs1_val==3 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, 0x3, x2, 1360, x13)
+
+inst_189:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x5555555555555555, x2, 1368, x13)
+
+inst_190:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, -0x5555555555555556, x2, 1376, x13)
+
+inst_191:
+// rs1_val==3 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x5, x2, 1384, x13)
+
+inst_192:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x3333333333333333, x2, 1392, x13)
+
+inst_193:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x6666666666666666, x2, 1400, x13)
+
+inst_194:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, -0xb504f333, x2, 1408, x13)
+
+inst_195:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0xb504f333, x2, 1416, x13)
+
+inst_196:
+// rs1_val==3 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, 0x2, x2, 1424, x13)
+
+inst_197:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x5555555555555554, x2, 1432, x13)
+
+inst_198:
+// rs1_val==3 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, 0x0, x2, 1440, x13)
+
+inst_199:
+// rs1_val==3 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x4, x2, 1448, x13)
+
+inst_200:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x3333333333333332, x2, 1456, x13)
+
+inst_201:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x6666666666666665, x2, 1464, x13)
+
+inst_202:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0xb504f332, x2, 1472, x13)
+
+inst_203:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x5555555555555556, x2, 1480, x13)
+
+inst_204:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, -0x5555555555555555, x2, 1488, x13)
+
+inst_205:
+// rs1_val==3 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x6, x2, 1496, x13)
+
+inst_206:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x3333333333333334, x2, 1504, x13)
+
+inst_207:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0x6666666666666667, x2, 1512, x13)
+
+inst_208:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3, -0xb504f332, x2, 1520, x13)
+
+inst_209:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3, 0xb504f334, x2, 1528, x13)
+
+inst_210:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0x3, x2, 1536, x13)
+
+inst_211:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0x5555555555555555, x2, 1544, x13)
+
+inst_212:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, -0x5555555555555556, x2, 1552, x13)
+
+inst_213:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0x5, x2, 1560, x13)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0x3333333333333333, x2, 1568, x13)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5555555555555555, 0x6666666666666666, x2, 1576, x13)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, -0xb504f333, x2, 1584, x13)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0xb504f333, x2, 1592, x13)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0x2, x2, 1600, x13)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0x5555555555555554, x2, 1608, x13)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0x0, x2, 1616, x13)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0x4, x2, 1624, x13)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0x3333333333333332, x2, 1632, x13)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5555555555555555, 0x6666666666666665, x2, 1640, x13)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0xb504f332, x2, 1648, x13)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5555555555555555, 0x5555555555555556, x2, 1656, x13)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, -0x5555555555555555, x2, 1664, x13)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0x6, x2, 1672, x13)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0x3333333333333334, x2, 1680, x13)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5555555555555555, 0x6666666666666667, x2, 1688, x13)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, -0xb504f332, x2, 1696, x13)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555555, 0xb504f334, x2, 1704, x13)
+
+inst_232:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x3, x2, 1712, x13)
+
+inst_233:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x5555555555555555, x2, 1720, x13)
+
+inst_234:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x5555555555555556, -0x5555555555555556, x2, 1728, x13)
+
+inst_235:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x5, x2, 1736, x13)
+
+inst_236:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x3333333333333333, x2, 1744, x13)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x6666666666666666, x2, 1752, x13)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, -0xb504f333, x2, 1760, x13)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0xb504f333, x2, 1768, x13)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x2, x2, 1776, x13)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x5555555555555554, x2, 1784, x13)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x0, x2, 1792, x13)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x4, x2, 1800, x13)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x3333333333333332, x2, 1808, x13)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x6666666666666665, x2, 1816, x13)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0xb504f332, x2, 1824, x13)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x5555555555555556, x2, 1832, x13)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, -0x5555555555555555, x2, 1840, x13)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x6, x2, 1848, x13)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x3333333333333334, x2, 1856, x13)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0x6666666666666667, x2, 1864, x13)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, -0xb504f332, x2, 1872, x13)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555556, 0xb504f334, x2, 1880, x13)
+
+inst_254:
+// rs1_val==5 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, 0x3, x2, 1888, x13)
+
+inst_255:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x5555555555555555, x2, 1896, x13)
+
+inst_256:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, -0x5555555555555556, x2, 1904, x13)
+
+inst_257:
+// rs1_val==5 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, 0x5, x2, 1912, x13)
+
+inst_258:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x3333333333333333, x2, 1920, x13)
+
+inst_259:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x6666666666666666, x2, 1928, x13)
+
+inst_260:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, -0xb504f333, x2, 1936, x13)
+
+inst_261:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0xb504f333, x2, 1944, x13)
+
+inst_262:
+// rs1_val==5 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, 0x2, x2, 1952, x13)
+
+inst_263:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x5555555555555554, x2, 1960, x13)
+
+inst_264:
+// rs1_val==5 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, 0x0, x2, 1968, x13)
+
+inst_265:
+// rs1_val==5 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, 0x4, x2, 1976, x13)
+
+inst_266:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x3333333333333332, x2, 1984, x13)
+
+inst_267:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x6666666666666665, x2, 1992, x13)
+
+inst_268:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0xb504f332, x2, 2000, x13)
+
+inst_269:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x5555555555555556, x2, 2008, x13)
+
+inst_270:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, -0x5555555555555555, x2, 2016, x13)
+
+inst_271:
+// rs1_val==5 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x6, x2, 2024, x13)
+
+inst_272:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x3333333333333334, x2, 2032, x13)
+
+inst_273:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0x6666666666666667, x2, 2040, x13)
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_274:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5, -0xb504f332, x2, 0, x13)
+
+inst_275:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5, 0xb504f334, x2, 8, x13)
+
+inst_276:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, 0x3, x2, 16, x13)
+
+inst_277:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333333, 0x5555555555555555, x2, 24, x13)
+
+inst_278:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, -0x5555555555555556, x2, 32, x13)
+
+inst_279:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, 0x5, x2, 40, x13)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, 0x3333333333333333, x2, 48, x13)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333333, 0x6666666666666666, x2, 56, x13)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, -0xb504f333, x2, 64, x13)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, 0xb504f333, x2, 72, x13)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, 0x2, x2, 80, x13)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333333, 0x5555555555555554, x2, 88, x13)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, 0x0, x2, 96, x13)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, 0x4, x2, 104, x13)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, 0x3333333333333332, x2, 112, x13)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333333, 0x6666666666666665, x2, 120, x13)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, 0xb504f332, x2, 128, x13)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333333, 0x5555555555555556, x2, 136, x13)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, -0x5555555555555555, x2, 144, x13)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, 0x6, x2, 152, x13)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333333, 0x3333333333333334, x2, 160, x13)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333333, 0x6666666666666667, x2, 168, x13)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, -0xb504f332, x2, 176, x13)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333333, 0xb504f334, x2, 184, x13)
+
+inst_298:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x3, x2, 192, x13)
+
+inst_299:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x5555555555555555, x2, 200, x13)
+
+inst_300:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, -0x5555555555555556, x2, 208, x13)
+
+inst_301:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x5, x2, 216, x13)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x3333333333333333, x2, 224, x13)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x6666666666666666, x2, 232, x13)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, -0xb504f333, x2, 240, x13)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0xb504f333, x2, 248, x13)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x2, x2, 256, x13)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x5555555555555554, x2, 264, x13)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x0, x2, 272, x13)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x4, x2, 280, x13)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x3333333333333332, x2, 288, x13)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x6666666666666665, x2, 296, x13)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0xb504f332, x2, 304, x13)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x5555555555555556, x2, 312, x13)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, -0x5555555555555555, x2, 320, x13)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x6, x2, 328, x13)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0x3333333333333334, x2, 336, x13)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6666666666666666, 0x6666666666666667, x2, 344, x13)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, -0xb504f332, x2, 352, x13)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666666, 0xb504f334, x2, 360, x13)
+
+inst_320:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x3, x2, 368, x13)
+
+inst_321:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x5555555555555555, x2, 376, x13)
+
+inst_322:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb504f333, -0x5555555555555556, x2, 384, x13)
+
+inst_323:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x5, x2, 392, x13)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x3333333333333333, x2, 400, x13)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x6666666666666666, x2, 408, x13)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb504f333, -0xb504f333, x2, 416, x13)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0xb504f333, x2, 424, x13)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x2, x2, 432, x13)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x5555555555555554, x2, 440, x13)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x0, x2, 448, x13)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x4, x2, 456, x13)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x3333333333333332, x2, 464, x13)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x6666666666666665, x2, 472, x13)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0xb504f332, x2, 480, x13)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x5555555555555556, x2, 488, x13)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb504f333, -0x5555555555555555, x2, 496, x13)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x6, x2, 504, x13)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x3333333333333334, x2, 512, x13)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x6666666666666667, x2, 520, x13)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, -0xb504f332, x2, 528, x13)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0xb504f334, x2, 536, x13)
+
+inst_342:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f333, 0x3, x2, 544, x13)
+
+inst_343:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f333, 0x5555555555555555, x2, 552, x13)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f333, -0x5555555555555556, x2, 560, x13)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f333, 0x5, x2, 568, x13)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f333, 0x3333333333333333, x2, 576, x13)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f333, 0x6666666666666666, x2, 584, x13)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f333, -0xb504f333, x2, 592, x13)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f333, 0xb504f333, x2, 600, x13)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f333, 0x2, x2, 608, x13)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f333, 0x5555555555555554, x2, 616, x13)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f333, 0x0, x2, 624, x13)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f333, 0x4, x2, 632, x13)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f333, 0x3333333333333332, x2, 640, x13)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f333, 0x6666666666666665, x2, 648, x13)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f333, 0xb504f332, x2, 656, x13)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f333, 0x5555555555555556, x2, 664, x13)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f333, -0x5555555555555555, x2, 672, x13)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f333, 0x6, x2, 680, x13)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f333, 0x3333333333333334, x2, 688, x13)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f333, 0x6666666666666667, x2, 696, x13)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f333, -0xb504f332, x2, 704, x13)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f333, 0xb504f334, x2, 712, x13)
+
+inst_364:
+// rs1_val==2 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x3, x2, 720, x13)
+
+inst_365:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x5555555555555555, x2, 728, x13)
+
+inst_366:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2, -0x5555555555555556, x2, 736, x13)
+
+inst_367:
+// rs1_val==2 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x5, x2, 744, x13)
+
+inst_368:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x3333333333333333, x2, 752, x13)
+
+inst_369:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x6666666666666666, x2, 760, x13)
+
+inst_370:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2, -0xb504f333, x2, 768, x13)
+
+inst_371:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0xb504f333, x2, 776, x13)
+
+inst_372:
+// rs1_val==2 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2, 0x2, x2, 784, x13)
+
+inst_373:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x5555555555555554, x2, 792, x13)
+
+inst_374:
+// rs1_val==2 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2, 0x0, x2, 800, x13)
+
+inst_375:
+// rs1_val==2 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x4, x2, 808, x13)
+
+inst_376:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x3333333333333332, x2, 816, x13)
+
+inst_377:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x6666666666666665, x2, 824, x13)
+
+inst_378:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0xb504f332, x2, 832, x13)
+
+inst_379:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x5555555555555556, x2, 840, x13)
+
+inst_380:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2, -0x5555555555555555, x2, 848, x13)
+
+inst_381:
+// rs1_val==2 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x6, x2, 856, x13)
+
+inst_382:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x3333333333333334, x2, 864, x13)
+
+inst_383:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0x6666666666666667, x2, 872, x13)
+
+inst_384:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x2, -0xb504f332, x2, 880, x13)
+
+inst_385:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x2, 0xb504f334, x2, 888, x13)
+
+inst_386:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, 0x3, x2, 896, x13)
+
+inst_387:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5555555555555554, 0x5555555555555555, x2, 904, x13)
+
+inst_388:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, -0x5555555555555556, x2, 912, x13)
+
+inst_389:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, 0x5, x2, 920, x13)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, 0x3333333333333333, x2, 928, x13)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5555555555555554, 0x6666666666666666, x2, 936, x13)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, -0xb504f333, x2, 944, x13)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, 0xb504f333, x2, 952, x13)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, 0x2, x2, 960, x13)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, 0x5555555555555554, x2, 968, x13)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, 0x0, x2, 976, x13)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, 0x4, x2, 984, x13)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, 0x3333333333333332, x2, 992, x13)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5555555555555554, 0x6666666666666665, x2, 1000, x13)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, 0xb504f332, x2, 1008, x13)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5555555555555554, 0x5555555555555556, x2, 1016, x13)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, -0x5555555555555555, x2, 1024, x13)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, 0x6, x2, 1032, x13)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, 0x3333333333333334, x2, 1040, x13)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5555555555555554, 0x6666666666666667, x2, 1048, x13)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, -0xb504f332, x2, 1056, x13)
+
+inst_407:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555554, 0xb504f334, x2, 1064, x13)
+
+inst_408:
+// rs1_val==0 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x3, x2, 1072, x13)
+
+inst_409:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x5555555555555555, x2, 1080, x13)
+
+inst_410:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x0, -0x5555555555555556, x2, 1088, x13)
+
+inst_411:
+// rs1_val==0 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x5, x2, 1096, x13)
+
+inst_412:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x3333333333333333, x2, 1104, x13)
+
+inst_413:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x6666666666666666, x2, 1112, x13)
+
+inst_414:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x0, -0xb504f333, x2, 1120, x13)
+
+inst_415:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0xb504f333, x2, 1128, x13)
+
+inst_416:
+// rs1_val==0 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x2, x2, 1136, x13)
+
+inst_417:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x0, -0xb504f332, x2, 1144, x13)
+
+inst_418:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0xb504f334, x2, 1152, x13)
+
+inst_419:
+// rs1_val==4 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, 0x3, x2, 1160, x13)
+
+inst_420:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x5555555555555555, x2, 1168, x13)
+
+inst_421:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, -0x5555555555555556, x2, 1176, x13)
+
+inst_422:
+// rs1_val==4 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x5, x2, 1184, x13)
+
+inst_423:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x3333333333333333, x2, 1192, x13)
+
+inst_424:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x6666666666666666, x2, 1200, x13)
+
+inst_425:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, -0xb504f333, x2, 1208, x13)
+
+inst_426:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0xb504f333, x2, 1216, x13)
+
+inst_427:
+// rs1_val==4 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, 0x2, x2, 1224, x13)
+
+inst_428:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x5555555555555554, x2, 1232, x13)
+
+inst_429:
+// rs1_val==4 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, 0x0, x2, 1240, x13)
+
+inst_430:
+// rs1_val==4 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, 0x4, x2, 1248, x13)
+
+inst_431:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x3333333333333332, x2, 1256, x13)
+
+inst_432:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x6666666666666665, x2, 1264, x13)
+
+inst_433:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0xb504f332, x2, 1272, x13)
+
+inst_434:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x5555555555555556, x2, 1280, x13)
+
+inst_435:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, -0x5555555555555555, x2, 1288, x13)
+
+inst_436:
+// rs1_val==4 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x6, x2, 1296, x13)
+
+inst_437:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x3333333333333334, x2, 1304, x13)
+
+inst_438:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0x6666666666666667, x2, 1312, x13)
+
+inst_439:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x4, -0xb504f332, x2, 1320, x13)
+
+inst_440:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x4, 0xb504f334, x2, 1328, x13)
+
+inst_441:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, 0x3, x2, 1336, x13)
+
+inst_442:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333332, 0x5555555555555555, x2, 1344, x13)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, -0x5555555555555556, x2, 1352, x13)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, 0x5, x2, 1360, x13)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333332, 0x3333333333333333, x2, 1368, x13)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333332, 0x6666666666666666, x2, 1376, x13)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, -0xb504f333, x2, 1384, x13)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, 0xb504f333, x2, 1392, x13)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, 0x2, x2, 1400, x13)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333332, 0x5555555555555554, x2, 1408, x13)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, 0x0, x2, 1416, x13)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, 0x4, x2, 1424, x13)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, 0x3333333333333332, x2, 1432, x13)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333332, 0x6666666666666665, x2, 1440, x13)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, 0xb504f332, x2, 1448, x13)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333332, 0x5555555555555556, x2, 1456, x13)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, -0x5555555555555555, x2, 1464, x13)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, 0x6, x2, 1472, x13)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333332, 0x3333333333333334, x2, 1480, x13)
+
+inst_460:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333332, 0x6666666666666667, x2, 1488, x13)
+
+inst_461:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, -0xb504f332, x2, 1496, x13)
+
+inst_462:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333332, 0xb504f334, x2, 1504, x13)
+
+inst_463:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0x3, x2, 1512, x13)
+
+inst_464:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0x5555555555555555, x2, 1520, x13)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, -0x5555555555555556, x2, 1528, x13)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0x5, x2, 1536, x13)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0x3333333333333333, x2, 1544, x13)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6666666666666665, 0x6666666666666666, x2, 1552, x13)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, -0xb504f333, x2, 1560, x13)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0xb504f333, x2, 1568, x13)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0x2, x2, 1576, x13)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0x5555555555555554, x2, 1584, x13)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0x0, x2, 1592, x13)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0x4, x2, 1600, x13)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0x3333333333333332, x2, 1608, x13)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0x6666666666666665, x2, 1616, x13)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0xb504f332, x2, 1624, x13)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0x5555555555555556, x2, 1632, x13)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, -0x5555555555555555, x2, 1640, x13)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0x6, x2, 1648, x13)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0x3333333333333334, x2, 1656, x13)
+
+inst_482:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6666666666666665, 0x6666666666666667, x2, 1664, x13)
+
+inst_483:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, -0xb504f332, x2, 1672, x13)
+
+inst_484:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666665, 0xb504f334, x2, 1680, x13)
+
+inst_485:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f332, 0x3, x2, 1688, x13)
+
+inst_486:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f332, 0x5555555555555555, x2, 1696, x13)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f332, -0x5555555555555556, x2, 1704, x13)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f332, 0x5, x2, 1712, x13)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f332, 0x3333333333333333, x2, 1720, x13)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f332, 0x6666666666666666, x2, 1728, x13)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f332, -0xb504f333, x2, 1736, x13)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f332, 0xb504f333, x2, 1744, x13)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f332, 0x2, x2, 1752, x13)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f332, 0x5555555555555554, x2, 1760, x13)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f332, 0x0, x2, 1768, x13)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f332, 0x4, x2, 1776, x13)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f332, 0x3333333333333332, x2, 1784, x13)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f332, 0x6666666666666665, x2, 1792, x13)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f332, 0xb504f332, x2, 1800, x13)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f332, 0x5555555555555556, x2, 1808, x13)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f332, -0x5555555555555555, x2, 1816, x13)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f332, 0x6, x2, 1824, x13)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f332, 0x3333333333333334, x2, 1832, x13)
+
+inst_504:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f332, 0x6666666666666667, x2, 1840, x13)
+
+inst_505:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f332, -0xb504f332, x2, 1848, x13)
+
+inst_506:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f332, 0xb504f334, x2, 1856, x13)
+
+inst_507:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0x3, x2, 1864, x13)
+
+inst_508:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0x5555555555555555, x2, 1872, x13)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, -0x5555555555555556, x2, 1880, x13)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0x5, x2, 1888, x13)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0x3333333333333333, x2, 1896, x13)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5555555555555556, 0x6666666666666666, x2, 1904, x13)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, -0xb504f333, x2, 1912, x13)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0xb504f333, x2, 1920, x13)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0x2, x2, 1928, x13)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0x5555555555555554, x2, 1936, x13)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0x0, x2, 1944, x13)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0x4, x2, 1952, x13)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0x3333333333333332, x2, 1960, x13)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5555555555555556, 0x6666666666666665, x2, 1968, x13)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0xb504f332, x2, 1976, x13)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0x5555555555555556, x2, 1984, x13)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, -0x5555555555555555, x2, 1992, x13)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0x6, x2, 2000, x13)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0x3333333333333334, x2, 2008, x13)
+
+inst_526:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x5555555555555556, 0x6666666666666667, x2, 2016, x13)
+
+inst_527:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, -0xb504f332, x2, 2024, x13)
+
+inst_528:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x5555555555555556, 0xb504f334, x2, 2032, x13)
+
+inst_529:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x3, x2, 2040, x13)
+RVTEST_SIGBASE( x2,signature_x2_2)
+
+inst_530:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x5555555555555555, x2, 0, x13)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x5555555555555555, -0x5555555555555556, x2, 8, x13)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x5, x2, 16, x13)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x3333333333333333, x2, 24, x13)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x6666666666666666, x2, 32, x13)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, -0xb504f333, x2, 40, x13)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0xb504f333, x2, 48, x13)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x2, x2, 56, x13)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x5555555555555554, x2, 64, x13)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x0, x2, 72, x13)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x4, x2, 80, x13)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x3333333333333332, x2, 88, x13)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x6666666666666665, x2, 96, x13)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0xb504f332, x2, 104, x13)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x5555555555555556, x2, 112, x13)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x5555555555555555, -0x5555555555555555, x2, 120, x13)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x6, x2, 128, x13)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x3333333333333334, x2, 136, x13)
+
+inst_548:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0x6666666666666667, x2, 144, x13)
+
+inst_549:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, -0xb504f332, x2, 152, x13)
+
+inst_550:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x5555555555555555, 0xb504f334, x2, 160, x13)
+
+inst_551:
+// rs1_val==6 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, 0x3, x2, 168, x13)
+
+inst_552:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x5555555555555555, x2, 176, x13)
+
+inst_553:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, -0x5555555555555556, x2, 184, x13)
+
+inst_554:
+// rs1_val==6 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, 0x5, x2, 192, x13)
+
+inst_555:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x3333333333333333, x2, 200, x13)
+
+inst_556:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x6666666666666666, x2, 208, x13)
+
+inst_557:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, -0xb504f333, x2, 216, x13)
+
+inst_558:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0xb504f333, x2, 224, x13)
+
+inst_559:
+// rs1_val==6 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, 0x2, x2, 232, x13)
+
+inst_560:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x5555555555555554, x2, 240, x13)
+
+inst_561:
+// rs1_val==6 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, 0x0, x2, 248, x13)
+
+inst_562:
+// rs1_val==6 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, 0x4, x2, 256, x13)
+
+inst_563:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x3333333333333332, x2, 264, x13)
+
+inst_564:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x6666666666666665, x2, 272, x13)
+
+inst_565:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0xb504f332, x2, 280, x13)
+
+inst_566:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x5555555555555556, x2, 288, x13)
+
+inst_567:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, -0x5555555555555555, x2, 296, x13)
+
+inst_568:
+// rs1_val==6 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, 0x6, x2, 304, x13)
+
+inst_569:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x3333333333333334, x2, 312, x13)
+
+inst_570:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0x6666666666666667, x2, 320, x13)
+
+inst_571:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6, -0xb504f332, x2, 328, x13)
+
+inst_572:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x6, 0xb504f334, x2, 336, x13)
+
+inst_573:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, 0x3, x2, 344, x13)
+
+inst_574:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333334, 0x5555555555555555, x2, 352, x13)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, -0x5555555555555556, x2, 360, x13)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, 0x5, x2, 368, x13)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, 0x3333333333333333, x2, 376, x13)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333334, 0x6666666666666666, x2, 384, x13)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, -0xb504f333, x2, 392, x13)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, 0xb504f333, x2, 400, x13)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, 0x2, x2, 408, x13)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333334, 0x5555555555555554, x2, 416, x13)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, 0x0, x2, 424, x13)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, 0x4, x2, 432, x13)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, 0x3333333333333332, x2, 440, x13)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333334, 0x6666666666666665, x2, 448, x13)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, 0xb504f332, x2, 456, x13)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333334, 0x5555555555555556, x2, 464, x13)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, -0x5555555555555555, x2, 472, x13)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, 0x6, x2, 480, x13)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, 0x3333333333333334, x2, 488, x13)
+
+inst_592:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x3333333333333334, 0x6666666666666667, x2, 496, x13)
+
+inst_593:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, -0xb504f332, x2, 504, x13)
+
+inst_594:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x3333333333333334, 0xb504f334, x2, 512, x13)
+
+inst_595:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x3, x2, 520, x13)
+
+inst_596:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x5555555555555555, x2, 528, x13)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, -0x5555555555555556, x2, 536, x13)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x5, x2, 544, x13)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x3333333333333333, x2, 552, x13)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x6666666666666666, x2, 560, x13)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, -0xb504f333, x2, 568, x13)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0xb504f333, x2, 576, x13)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x2, x2, 584, x13)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x5555555555555554, x2, 592, x13)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x0, x2, 600, x13)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x4, x2, 608, x13)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x3333333333333332, x2, 616, x13)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x6666666666666665, x2, 624, x13)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0xb504f332, x2, 632, x13)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x5555555555555556, x2, 640, x13)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, -0x5555555555555555, x2, 648, x13)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x6, x2, 656, x13)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x3333333333333334, x2, 664, x13)
+
+inst_614:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0x6666666666666667, x2, 672, x13)
+
+inst_615:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, -0xb504f332, x2, 680, x13)
+
+inst_616:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x6666666666666667, 0xb504f334, x2, 688, x13)
+
+inst_617:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x3, x2, 696, x13)
+
+inst_618:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x5555555555555555, x2, 704, x13)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb504f332, -0x5555555555555556, x2, 712, x13)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x5, x2, 720, x13)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x3333333333333333, x2, 728, x13)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x6666666666666666, x2, 736, x13)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb504f332, -0xb504f333, x2, 744, x13)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0xb504f333, x2, 752, x13)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x2, x2, 760, x13)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x5555555555555554, x2, 768, x13)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x0, x2, 776, x13)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x4, x2, 784, x13)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x3333333333333332, x2, 792, x13)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x6666666666666665, x2, 800, x13)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0xb504f332, x2, 808, x13)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x5555555555555556, x2, 816, x13)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb504f332, -0x5555555555555555, x2, 824, x13)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x6, x2, 832, x13)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x3333333333333334, x2, 840, x13)
+
+inst_636:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0x6666666666666667, x2, 848, x13)
+
+inst_637:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0xb504f332, -0xb504f332, x2, 856, x13)
+
+inst_638:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f332, 0xb504f334, x2, 864, x13)
+
+inst_639:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, 0x3, x2, 872, x13)
+
+inst_640:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f334, 0x5555555555555555, x2, 880, x13)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, -0x5555555555555556, x2, 888, x13)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, 0x5, x2, 896, x13)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f334, 0x3333333333333333, x2, 904, x13)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f334, 0x6666666666666666, x2, 912, x13)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, -0xb504f333, x2, 920, x13)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f333
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, 0xb504f333, x2, 928, x13)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x2
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, 0x2, x2, 936, x13)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f334, 0x5555555555555554, x2, 944, x13)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, 0x0, x2, 952, x13)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, 0x4, x2, 960, x13)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f334, 0x3333333333333332, x2, 968, x13)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f334, 0x6666666666666665, x2, 976, x13)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, 0xb504f332, x2, 984, x13)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f334, 0x5555555555555556, x2, 992, x13)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, -0x5555555555555555, x2, 1000, x13)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, 0x6, x2, 1008, x13)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f334, 0x3333333333333334, x2, 1016, x13)
+
+inst_658:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0xb504f334, 0x6666666666666667, x2, 1024, x13)
+
+inst_659:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, -0xb504f332, x2, 1032, x13)
+
+inst_660:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f334
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0xb504f334, 0xb504f334, x2, 1040, x13)
+
+inst_661:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555554
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x5555555555555554, x2, 1048, x13)
+
+inst_662:
+// rs1_val==0 and rs2_val==0,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x0, 0x0, x2, 1056, x13)
+
+inst_663:
+// rs1_val==0 and rs2_val==4,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x4, x2, 1064, x13)
+
+inst_664:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x3333333333333332, x2, 1072, x13)
+
+inst_665:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666665
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x6666666666666665, x2, 1080, x13)
+
+inst_666:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f332
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0xb504f332, x2, 1088, x13)
+
+inst_667:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555556
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x5555555555555556, x2, 1096, x13)
+
+inst_668:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555555
+TEST_RR_OP(slt, x12, x10, x11, 0x0, 0x0, -0x5555555555555555, x2, 1104, x13)
+
+inst_669:
+// rs1_val==0 and rs2_val==6,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x6, x2, 1112, x13)
+
+inst_670:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333334
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x3333333333333334, x2, 1120, x13)
+
+inst_671:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666667
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x0, 0x6666666666666667, x2, 1128, x13)
+
+inst_672:
+// rs1_val > 0 and rs2_val > 0, rs1_val == 134217728, rs1_val != rs2_val, rs2_val == 144115188075855872
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x200000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, 0x8000000, 0x200000000000000, x2, 1136, x13)
+
+inst_673:
+// rs1_val < 0 and rs2_val < 0, rs1_val == -4503599627370497, rs2_val == -1025
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:-0x401
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0x10000000000001, -0x401, x2, 1144, x13)
+
+inst_674:
+// rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, rs1_val == -4294967297
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:-0x8000000000000000
+TEST_RR_OP(slt, x12, x10, x11, 0x0, -0x100000001, -0x8000000000000000, x2, 1152, x13)
+
+inst_675:
+// rs2_val == 524288,
+// opcode: slt ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x80000
+TEST_RR_OP(slt, x12, x10, x11, 0x1, -0xb504f333, 0x80000, x2, 1160, x13)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 18*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_2:
+ .fill 146*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/slti-01.S b/riscof/suite/rv64i_m/I/slti-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..c2bca6e62eb936edf095a37f1653ccf642e18c73
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/slti-01.S
@@ -0,0 +1,3169 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the slti instruction of the RISC-V I extension for the slti covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",slti)
+
+RVTEST_SIGBASE( x20,signature_x20_1)
+
+inst_0:
+// rs1 == rd, rs1==x18, rd==x18, imm_val == (-2**(12-1)), imm_val == -2048, rs1_val != imm_val, rs1_val < 0 and imm_val < 0, rs1_val == -2199023255553
+// opcode: slti ; op1:x18; dest:x18; op1val:-0x20000000001; immval:-0x800
+TEST_IMM_OP( slti, x18, x18, 0x1, -0x20000000001, -0x800, x20, 0, x19)
+
+inst_1:
+// rs1 != rd, rs1==x2, rd==x23, imm_val == 0, rs1_val == -2
+// opcode: slti ; op1:x2; dest:x23; op1val:-0x2; immval:0x0
+TEST_IMM_OP( slti, x23, x2, 0x1, -0x2, 0x0, x20, 8, x19)
+
+inst_2:
+// rs1==x7, rd==x6, imm_val == (2**(12-1)-1), rs1_val == -576460752303423489, rs1_val < 0 and imm_val > 0, imm_val == 2047
+// opcode: slti ; op1:x7; dest:x6; op1val:-0x800000000000001; immval:0x7ff
+TEST_IMM_OP( slti, x6, x7, 0x1, -0x800000000000001, 0x7ff, x20, 16, x19)
+
+inst_3:
+// rs1==x5, rd==x11, imm_val == 1, rs1_val == 4398046511104, rs1_val > 0 and imm_val > 0
+// opcode: slti ; op1:x5; dest:x11; op1val:0x40000000000; immval:0x1
+TEST_IMM_OP( slti, x11, x5, 0x0, 0x40000000000, 0x1, x20, 24, x19)
+
+inst_4:
+// rs1==x10, rd==x26, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808
+// opcode: slti ; op1:x10; dest:x26; op1val:-0x8000000000000000; immval:-0x7
+TEST_IMM_OP( slti, x26, x10, 0x1, -0x8000000000000000, -0x7, x20, 32, x19)
+
+inst_5:
+// rs1==x15, rd==x17, rs1_val == 0, imm_val == -65
+// opcode: slti ; op1:x15; dest:x17; op1val:0x0; immval:-0x41
+TEST_IMM_OP( slti, x17, x15, 0x0, 0x0, -0x41, x20, 40, x19)
+
+inst_6:
+// rs1==x0, rd==x5, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807
+// opcode: slti ; op1:x0; dest:x5; op1val:0x0; immval:0x0
+TEST_IMM_OP( slti, x5, x0, 0x0, 0x0, 0x0, x20, 48, x19)
+
+inst_7:
+// rs1==x9, rd==x29, rs1_val == 1, imm_val == 2
+// opcode: slti ; op1:x9; dest:x29; op1val:0x1; immval:0x2
+TEST_IMM_OP( slti, x29, x9, 0x1, 0x1, 0x2, x20, 56, x19)
+
+inst_8:
+// rs1==x24, rd==x16, rs1_val == imm_val, rs1_val==0 and imm_val==0
+// opcode: slti ; op1:x24; dest:x16; op1val:0x0; immval:0x0
+TEST_IMM_OP( slti, x16, x24, 0x0, 0x0, 0x0, x20, 64, x19)
+
+inst_9:
+// rs1==x1, rd==x15, rs1_val > 0 and imm_val < 0, imm_val == -257, rs1_val == 1073741824
+// opcode: slti ; op1:x1; dest:x15; op1val:0x40000000; immval:-0x101
+TEST_IMM_OP( slti, x15, x1, 0x0, 0x40000000, -0x101, x20, 72, x19)
+
+inst_10:
+// rs1==x28, rd==x12, imm_val == 4, rs1_val==-6148914691236517206 and imm_val==4, rs1_val == -6148914691236517206
+// opcode: slti ; op1:x28; dest:x12; op1val:-0x5555555555555556; immval:0x4
+TEST_IMM_OP( slti, x12, x28, 0x1, -0x5555555555555556, 0x4, x20, 80, x19)
+
+inst_11:
+// rs1==x26, rd==x31, imm_val == 8, rs1_val == 137438953472
+// opcode: slti ; op1:x26; dest:x31; op1val:0x2000000000; immval:0x8
+TEST_IMM_OP( slti, x31, x26, 0x0, 0x2000000000, 0x8, x20, 88, x19)
+
+inst_12:
+// rs1==x3, rd==x25, imm_val == 16, rs1_val == 549755813888
+// opcode: slti ; op1:x3; dest:x25; op1val:0x8000000000; immval:0x10
+TEST_IMM_OP( slti, x25, x3, 0x0, 0x8000000000, 0x10, x20, 96, x19)
+
+inst_13:
+// rs1==x25, rd==x28, imm_val == 32, rs1_val == -1152921504606846977
+// opcode: slti ; op1:x25; dest:x28; op1val:-0x1000000000000001; immval:0x20
+TEST_IMM_OP( slti, x28, x25, 0x1, -0x1000000000000001, 0x20, x20, 104, x19)
+
+inst_14:
+// rs1==x16, rd==x2, imm_val == 64, rs1_val == 1125899906842624
+// opcode: slti ; op1:x16; dest:x2; op1val:0x4000000000000; immval:0x40
+TEST_IMM_OP( slti, x2, x16, 0x0, 0x4000000000000, 0x40, x20, 112, x19)
+
+inst_15:
+// rs1==x6, rd==x4, imm_val == 128,
+// opcode: slti ; op1:x6; dest:x4; op1val:0x5555555555555556; immval:0x80
+TEST_IMM_OP( slti, x4, x6, 0x0, 0x5555555555555556, 0x80, x20, 120, x19)
+
+inst_16:
+// rs1==x13, rd==x9, imm_val == 256, rs1_val == 562949953421312
+// opcode: slti ; op1:x13; dest:x9; op1val:0x2000000000000; immval:0x100
+TEST_IMM_OP( slti, x9, x13, 0x0, 0x2000000000000, 0x100, x20, 128, x19)
+
+inst_17:
+// rs1==x27, rd==x10, imm_val == 512, rs1_val == -16385
+// opcode: slti ; op1:x27; dest:x10; op1val:-0x4001; immval:0x200
+TEST_IMM_OP( slti, x10, x27, 0x1, -0x4001, 0x200, x20, 136, x19)
+
+inst_18:
+// rs1==x21, rd==x14, imm_val == 1024, rs1_val == 8388608
+// opcode: slti ; op1:x21; dest:x14; op1val:0x800000; immval:0x400
+TEST_IMM_OP( slti, x14, x21, 0x0, 0x800000, 0x400, x20, 144, x19)
+
+inst_19:
+// rs1==x8, rd==x24, imm_val == -2,
+// opcode: slti ; op1:x8; dest:x24; op1val:0x7; immval:-0x2
+TEST_IMM_OP( slti, x24, x8, 0x0, 0x7, -0x2, x20, 152, x19)
+
+inst_20:
+// rs1==x29, rd==x27, imm_val == -3, rs1_val == -1073741825
+// opcode: slti ; op1:x29; dest:x27; op1val:-0x40000001; immval:-0x3
+TEST_IMM_OP( slti, x27, x29, 0x1, -0x40000001, -0x3, x20, 160, x5)
+
+inst_21:
+// rs1==x4, rd==x19, imm_val == -5, rs1_val == 36028797018963968
+// opcode: slti ; op1:x4; dest:x19; op1val:0x80000000000000; immval:-0x5
+TEST_IMM_OP( slti, x19, x4, 0x0, 0x80000000000000, -0x5, x20, 168, x5)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_22:
+// rs1==x12, rd==x0, imm_val == -9,
+// opcode: slti ; op1:x12; dest:x0; op1val:-0xa; immval:-0x9
+TEST_IMM_OP( slti, x0, x12, 0, -0xa, -0x9, x2, 0, x5)
+
+inst_23:
+// rs1==x22, rd==x1, imm_val == -17, rs1_val == -32769
+// opcode: slti ; op1:x22; dest:x1; op1val:-0x8001; immval:-0x11
+TEST_IMM_OP( slti, x1, x22, 0x1, -0x8001, -0x11, x2, 8, x5)
+
+inst_24:
+// rs1==x14, rd==x30, imm_val == -33, rs1_val == 4194304
+// opcode: slti ; op1:x14; dest:x30; op1val:0x400000; immval:-0x21
+TEST_IMM_OP( slti, x30, x14, 0x0, 0x400000, -0x21, x2, 16, x5)
+
+inst_25:
+// rs1==x11, rd==x22, imm_val == -129, rs1_val == 1099511627776
+// opcode: slti ; op1:x11; dest:x22; op1val:0x10000000000; immval:-0x81
+TEST_IMM_OP( slti, x22, x11, 0x0, 0x10000000000, -0x81, x2, 24, x5)
+
+inst_26:
+// rs1==x30, rd==x7, imm_val == -513, rs1_val == -562949953421313
+// opcode: slti ; op1:x30; dest:x7; op1val:-0x2000000000001; immval:-0x201
+TEST_IMM_OP( slti, x7, x30, 0x1, -0x2000000000001, -0x201, x2, 32, x5)
+
+inst_27:
+// rs1==x19, rd==x21, imm_val == -1025, rs1_val == -281474976710657
+// opcode: slti ; op1:x19; dest:x21; op1val:-0x1000000000001; immval:-0x401
+TEST_IMM_OP( slti, x21, x19, 0x1, -0x1000000000001, -0x401, x2, 40, x5)
+
+inst_28:
+// rs1==x20, rd==x8, imm_val == 1365, rs1_val==5 and imm_val==1365
+// opcode: slti ; op1:x20; dest:x8; op1val:0x5; immval:0x555
+TEST_IMM_OP( slti, x8, x20, 0x1, 0x5, 0x555, x2, 48, x5)
+
+inst_29:
+// rs1==x17, rd==x20, imm_val == -1366, rs1_val == -4097
+// opcode: slti ; op1:x17; dest:x20; op1val:-0x1001; immval:-0x556
+TEST_IMM_OP( slti, x20, x17, 0x1, -0x1001, -0x556, x2, 56, x5)
+
+inst_30:
+// rs1==x23, rd==x13, rs1_val == 2,
+// opcode: slti ; op1:x23; dest:x13; op1val:0x2; immval:-0x800
+TEST_IMM_OP( slti, x13, x23, 0x0, 0x2, -0x800, x2, 64, x5)
+
+inst_31:
+// rs1==x31, rd==x3, rs1_val == 4,
+// opcode: slti ; op1:x31; dest:x3; op1val:0x4; immval:-0x81
+TEST_IMM_OP( slti, x3, x31, 0x0, 0x4, -0x81, x2, 72, x5)
+
+inst_32:
+// rs1_val == 8,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x8; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x8, 0x2c, x2, 80, x5)
+
+inst_33:
+// rs1_val == 16,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x10; immval:-0x800
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x10, -0x800, x2, 88, x5)
+
+inst_34:
+// rs1_val == 32,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x20; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x20, 0x2d, x2, 96, x5)
+
+inst_35:
+// rs1_val == 64,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x40; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x40, 0x555, x2, 104, x5)
+
+inst_36:
+// rs1_val == 128,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x80; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x80, -0x556, x2, 112, x5)
+
+inst_37:
+// rs1_val == 256,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x100; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x100, 0x5, x2, 120, x5)
+
+inst_38:
+// rs1_val == 512,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x200; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x200, 0x6, x2, 128, x5)
+
+inst_39:
+// rs1_val == 1024,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x400; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x400, 0x555, x2, 136, x5)
+
+inst_40:
+// rs1_val == 2048,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x800; immval:0x40
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x800, 0x40, x2, 144, x5)
+
+inst_41:
+// rs1_val == 4096,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x1000; immval:-0x7
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x1000, -0x7, x2, 152, x5)
+
+inst_42:
+// rs1_val == 8192,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2000; immval:-0x7
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2000, -0x7, x2, 160, x5)
+
+inst_43:
+// rs1_val == 16384,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4000; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4000, 0x665, x2, 168, x5)
+
+inst_44:
+// rs1_val == 32768,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x8000; immval:-0x400
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x8000, -0x400, x2, 176, x5)
+
+inst_45:
+// rs1_val == 65536,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x10000; immval:-0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x10000, -0x6, x2, 184, x5)
+
+inst_46:
+// rs1_val == 131072,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x20000; immval:-0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x20000, -0x2, x2, 192, x5)
+
+inst_47:
+// rs1_val == 262144,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x40000; immval:0x7
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x40000, 0x7, x2, 200, x5)
+
+inst_48:
+// rs1_val == 524288,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x80000; immval:-0x21
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x80000, -0x21, x2, 208, x5)
+
+inst_49:
+// rs1_val == 1048576,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x100000; immval:0x80
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x100000, 0x80, x2, 216, x5)
+
+inst_50:
+// rs1_val == 2097152,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x200000; immval:-0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x200000, -0x5, x2, 224, x5)
+
+inst_51:
+// rs1_val == 16777216,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x1000000; immval:-0x1
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x1000000, -0x1, x2, 232, x5)
+
+inst_52:
+// rs1_val == 33554432,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2000000; immval:-0x9
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2000000, -0x9, x2, 240, x5)
+
+inst_53:
+// rs1_val == 67108864,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4000000; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4000000, 0x0, x2, 248, x5)
+
+inst_54:
+// rs1_val == 134217728,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x8000000; immval:0x8
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x8000000, 0x8, x2, 256, x5)
+
+inst_55:
+// rs1_val == 268435456,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x10000000; immval:-0x81
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x10000000, -0x81, x2, 264, x5)
+
+inst_56:
+// rs1_val == 536870912,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x20000000; immval:0x40
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x20000000, 0x40, x2, 272, x5)
+
+inst_57:
+// rs1_val == 2147483648,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x80000000; immval:0x7ff
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x80000000, 0x7ff, x2, 280, x5)
+
+inst_58:
+// rs1_val == 4294967296,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x100000000; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x100000000, -0x555, x2, 288, x5)
+
+inst_59:
+// rs1_val == 8589934592,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x200000000; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x200000000, 0x6, x2, 296, x5)
+
+inst_60:
+// rs1_val == 17179869184,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x400000000; immval:-0x1
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x400000000, -0x1, x2, 304, x5)
+
+inst_61:
+// rs1_val == 34359738368,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x800000000; immval:-0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x800000000, -0x2, x2, 312, x5)
+
+inst_62:
+// rs1_val == 68719476736,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x1000000000; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x1000000000, 0x554, x2, 320, x5)
+
+inst_63:
+// rs1_val == 274877906944,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4000000000; immval:-0x400
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4000000000, -0x400, x2, 328, x5)
+
+inst_64:
+// rs1_val == 2199023255552,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x20000000000; immval:-0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x20000000000, -0x6, x2, 336, x5)
+
+inst_65:
+// rs1_val == 8796093022208,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x80000000000; immval:-0x800
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x80000000000, -0x800, x2, 344, x5)
+
+inst_66:
+// rs1_val == 17592186044416,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x100000000000; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x100000000000, 0x0, x2, 352, x5)
+
+inst_67:
+// rs1_val == 35184372088832,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x200000000000; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x200000000000, -0x2d, x2, 360, x5)
+
+inst_68:
+// rs1_val == 70368744177664,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x400000000000; immval:-0xa
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x400000000000, -0xa, x2, 368, x5)
+
+inst_69:
+// rs1_val == 140737488355328,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x800000000000; immval:0x20
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x800000000000, 0x20, x2, 376, x5)
+
+inst_70:
+// rs1_val == 281474976710656,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x1000000000000; immval:-0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x1000000000000, -0x6, x2, 384, x5)
+
+inst_71:
+// rs1_val == 2251799813685248,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x8000000000000; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x8000000000000, -0x2c, x2, 392, x5)
+
+inst_72:
+// rs1_val == 4503599627370496,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x10000000000000; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x10000000000000, 0x2, x2, 400, x5)
+
+inst_73:
+// rs1_val == 9007199254740992,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x20000000000000; immval:-0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x20000000000000, -0x4, x2, 408, x5)
+
+inst_74:
+// rs1_val == 18014398509481984,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x40000000000000; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x40000000000000, 0x6, x2, 416, x5)
+
+inst_75:
+// rs1_val == 72057594037927936,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x100000000000000; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x100000000000000, -0x556, x2, 424, x5)
+
+inst_76:
+// rs1_val == 144115188075855872,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x200000000000000; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x200000000000000, 0x556, x2, 432, x5)
+
+inst_77:
+// rs1_val == 288230376151711744,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x400000000000000; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x400000000000000, -0x556, x2, 440, x5)
+
+inst_78:
+// rs1_val == 576460752303423488,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x800000000000000; immval:-0x101
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x800000000000000, -0x101, x2, 448, x5)
+
+inst_79:
+// rs1_val == 1152921504606846976,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x1000000000000000; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x1000000000000000, 0x333, x2, 456, x5)
+
+inst_80:
+// rs1_val == 2305843009213693952,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2000000000000000; immval:0x80
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2000000000000000, 0x80, x2, 464, x5)
+
+inst_81:
+// rs1_val == 4611686018427387904,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4000000000000000; immval:-0x81
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4000000000000000, -0x81, x2, 472, x5)
+
+inst_82:
+// rs1_val == -3,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x3; immval:-0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, -0x3, -0x6, x2, 480, x5)
+
+inst_83:
+// rs1_val == -5,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5; immval:-0x800
+TEST_IMM_OP( slti, x11, x10, 0x0, -0x5, -0x800, x2, 488, x5)
+
+inst_84:
+// rs1_val == -9,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x9; immval:-0x8
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x9, -0x8, x2, 496, x5)
+
+inst_85:
+// rs1_val == -17,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x11; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x11, 0x554, x2, 504, x5)
+
+inst_86:
+// rs1_val == -33,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x21; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x21, 0x333, x2, 512, x5)
+
+inst_87:
+// rs1_val == -65,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x41; immval:-0x101
+TEST_IMM_OP( slti, x11, x10, 0x0, -0x41, -0x101, x2, 520, x5)
+
+inst_88:
+// rs1_val == -129,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x81; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, -0x81, -0x556, x2, 528, x5)
+
+inst_89:
+// rs1_val == -257,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x101; immval:-0x7
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x101, -0x7, x2, 536, x5)
+
+inst_90:
+// rs1_val == -513,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x201; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x201, 0x3, x2, 544, x5)
+
+inst_91:
+// rs1_val == -1025,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x401; immval:0x7
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x401, 0x7, x2, 552, x5)
+
+inst_92:
+// rs1_val == -2049,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x801; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x801, 0x5, x2, 560, x5)
+
+inst_93:
+// rs1_val == -8193,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x2001; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x2001, 0x3, x2, 568, x5)
+
+inst_94:
+// rs1_val == -65537,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x10001; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x10001, 0x667, x2, 576, x5)
+
+inst_95:
+// rs1_val == -131073,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x20001; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x20001, 0x5, x2, 584, x5)
+
+inst_96:
+// rs1_val == -262145,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x40001; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x40001, 0x4, x2, 592, x5)
+
+inst_97:
+// rs1_val == -524289,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x80001; immval:-0x7
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x80001, -0x7, x2, 600, x5)
+
+inst_98:
+// rs1_val == -1048577,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x100001; immval:0x9
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x100001, 0x9, x2, 608, x5)
+
+inst_99:
+// rs1_val == -2097153,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x200001; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x200001, 0x333, x2, 616, x5)
+
+inst_100:
+// rs1_val == -4194305,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x400001; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x400001, 0x3, x2, 624, x5)
+
+inst_101:
+// rs1_val == -8388609,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x800001; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x800001, 0x5, x2, 632, x5)
+
+inst_102:
+// rs1_val == -16777217,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x1000001; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x1000001, -0x2d, x2, 640, x5)
+
+inst_103:
+// rs1_val == -33554433,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x2000001; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x2000001, 0x332, x2, 648, x5)
+
+inst_104:
+// rs1_val == -67108865,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x4000001; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x4000001, 0x4, x2, 656, x5)
+
+inst_105:
+// rs1_val == -134217729,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x8000001; immval:0x80
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x8000001, 0x80, x2, 664, x5)
+
+inst_106:
+// rs1_val == -268435457,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x10000001; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x10000001, 0x3, x2, 672, x5)
+
+inst_107:
+// rs1_val == -536870913,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x20000001; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x20000001, 0x556, x2, 680, x5)
+
+inst_108:
+// rs1_val == -2147483649,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x80000001; immval:0x400
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x80000001, 0x400, x2, 688, x5)
+
+inst_109:
+// rs1_val == -4294967297,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x100000001; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x100000001, 0x5, x2, 696, x5)
+
+inst_110:
+// rs1_val == -8589934593,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x200000001; immval:-0x9
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x200000001, -0x9, x2, 704, x5)
+
+inst_111:
+// rs1_val == -17179869185,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x400000001; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x400000001, 0x4, x2, 712, x5)
+
+inst_112:
+// rs1_val == -34359738369,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x800000001; immval:0x20
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x800000001, 0x20, x2, 720, x5)
+
+inst_113:
+// rs1_val == -68719476737,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x1000000001; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x1000000001, 0x332, x2, 728, x5)
+
+inst_114:
+// rs1_val == -137438953473,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x2000000001; immval:0x7ff
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x2000000001, 0x7ff, x2, 736, x5)
+
+inst_115:
+// rs1_val == -274877906945,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x4000000001; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x4000000001, 0x667, x2, 744, x5)
+
+inst_116:
+// rs1_val == -549755813889,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x8000000001; immval:-0xa
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x8000000001, -0xa, x2, 752, x5)
+
+inst_117:
+// rs1_val == -1099511627777,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x10000000001; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x10000000001, 0x6, x2, 760, x5)
+
+inst_118:
+// rs1_val == -4398046511105,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x40000000001; immval:-0x800
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x40000000001, -0x800, x2, 768, x5)
+
+inst_119:
+// rs1_val == -8796093022209,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x80000000001; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x80000000001, 0x333, x2, 776, x5)
+
+inst_120:
+// rs1_val == -17592186044417,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x100000000001; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x100000000001, 0x2, x2, 784, x5)
+
+inst_121:
+// rs1_val == -35184372088833,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x200000000001; immval:0x7
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x200000000001, 0x7, x2, 792, x5)
+
+inst_122:
+// rs1_val == -70368744177665,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x400000000001; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x400000000001, 0x556, x2, 800, x5)
+
+inst_123:
+// rs1_val == -140737488355329,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x800000000001; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x800000000001, 0x556, x2, 808, x5)
+
+inst_124:
+// rs1_val == -1125899906842625,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x4000000000001; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x4000000000001, 0x2, x2, 816, x5)
+
+inst_125:
+// rs1_val == -2251799813685249,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x8000000000001; immval:-0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x8000000000001, -0x5, x2, 824, x5)
+
+inst_126:
+// rs1_val == -4503599627370497,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x10000000000001; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x10000000000001, -0x556, x2, 832, x5)
+
+inst_127:
+// rs1_val == -9007199254740993,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x20000000000001; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x20000000000001, -0x2c, x2, 840, x5)
+
+inst_128:
+// rs1_val == -18014398509481985,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x40000000000001; immval:-0x81
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x40000000000001, -0x81, x2, 848, x5)
+
+inst_129:
+// rs1_val == -36028797018963969,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x80000000000001; immval:-0x400
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x80000000000001, -0x400, x2, 856, x5)
+
+inst_130:
+// rs1_val == -72057594037927937,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x100000000000001; immval:0x7
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x100000000000001, 0x7, x2, 864, x5)
+
+inst_131:
+// rs1_val == -144115188075855873,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x200000000000001; immval:-0x800
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x200000000000001, -0x800, x2, 872, x5)
+
+inst_132:
+// rs1_val == -288230376151711745,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x400000000000001; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x400000000000001, 0x2e, x2, 880, x5)
+
+inst_133:
+// rs1_val == -2305843009213693953,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x2000000000000001; immval:-0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x2000000000000001, -0x6, x2, 888, x5)
+
+inst_134:
+// rs1_val == -4611686018427387905,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x4000000000000001; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x4000000000000001, -0x555, x2, 896, x5)
+
+inst_135:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205 and imm_val==819
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x333, x2, 904, x5)
+
+inst_136:
+// rs1_val==3 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, 0x3, x2, 912, x5)
+
+inst_137:
+// rs1_val==3 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x555, x2, 920, x5)
+
+inst_138:
+// rs1_val==3 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, -0x556, x2, 928, x5)
+
+inst_139:
+// rs1_val==3 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x5, x2, 936, x5)
+
+inst_140:
+// rs1_val==3 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x333, x2, 944, x5)
+
+inst_141:
+// rs1_val==3 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x666, x2, 952, x5)
+
+inst_142:
+// rs1_val==3 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, -0x2d, x2, 960, x5)
+
+inst_143:
+// rs1_val==3 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x2d, x2, 968, x5)
+
+inst_144:
+// rs1_val==3 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, 0x2, x2, 976, x5)
+
+inst_145:
+// rs1_val==3 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x554, x2, 984, x5)
+
+inst_146:
+// rs1_val==3 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, 0x0, x2, 992, x5)
+
+inst_147:
+// rs1_val==3 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x4, x2, 1000, x5)
+
+inst_148:
+// rs1_val==3 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x332, x2, 1008, x5)
+
+inst_149:
+// rs1_val==3 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x665, x2, 1016, x5)
+
+inst_150:
+// rs1_val==3 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x2c, x2, 1024, x5)
+
+inst_151:
+// rs1_val==3 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x556, x2, 1032, x5)
+
+inst_152:
+// rs1_val==3 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, -0x555, x2, 1040, x5)
+
+inst_153:
+// rs1_val==3 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x6, x2, 1048, x5)
+
+inst_154:
+// rs1_val==3 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x334, x2, 1056, x5)
+
+inst_155:
+// rs1_val==3 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x667, x2, 1064, x5)
+
+inst_156:
+// rs1_val==3 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3, -0x2c, x2, 1072, x5)
+
+inst_157:
+// rs1_val==3 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x3, 0x2e, x2, 1080, x5)
+
+inst_158:
+// rs1_val==6148914691236517205 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x3, x2, 1088, x5)
+
+inst_159:
+// rs1_val==6148914691236517205 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x555, x2, 1096, x5)
+
+inst_160:
+// rs1_val==6148914691236517205 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, -0x556, x2, 1104, x5)
+
+inst_161:
+// rs1_val==6148914691236517205 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x5, x2, 1112, x5)
+
+inst_162:
+// rs1_val==6148914691236517205 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x666, x2, 1120, x5)
+
+inst_163:
+// rs1_val==6148914691236517205 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, -0x2d, x2, 1128, x5)
+
+inst_164:
+// rs1_val==6148914691236517205 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x2d, x2, 1136, x5)
+
+inst_165:
+// rs1_val==6148914691236517205 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x2, x2, 1144, x5)
+
+inst_166:
+// rs1_val==6148914691236517205 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x554, x2, 1152, x5)
+
+inst_167:
+// rs1_val==6148914691236517205 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x0, x2, 1160, x5)
+
+inst_168:
+// rs1_val==6148914691236517205 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x4, x2, 1168, x5)
+
+inst_169:
+// rs1_val==6148914691236517205 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x332, x2, 1176, x5)
+
+inst_170:
+// rs1_val==6148914691236517205 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x665, x2, 1184, x5)
+
+inst_171:
+// rs1_val==6148914691236517205 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x2c, x2, 1192, x5)
+
+inst_172:
+// rs1_val==6148914691236517205 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x556, x2, 1200, x5)
+
+inst_173:
+// rs1_val==6148914691236517205 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, -0x555, x2, 1208, x5)
+
+inst_174:
+// rs1_val==6148914691236517205 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x6, x2, 1216, x5)
+
+inst_175:
+// rs1_val==6148914691236517205 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x334, x2, 1224, x5)
+
+inst_176:
+// rs1_val==6148914691236517205 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x667, x2, 1232, x5)
+
+inst_177:
+// rs1_val==6148914691236517205 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, -0x2c, x2, 1240, x5)
+
+inst_178:
+// rs1_val==6148914691236517205 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555555, 0x2e, x2, 1248, x5)
+
+inst_179:
+// rs1_val==-6148914691236517206 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x3, x2, 1256, x5)
+
+inst_180:
+// rs1_val==-6148914691236517206 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x555, x2, 1264, x5)
+
+inst_181:
+// rs1_val==-6148914691236517206 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, -0x556, x2, 1272, x5)
+
+inst_182:
+// rs1_val==-6148914691236517206 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x5, x2, 1280, x5)
+
+inst_183:
+// rs1_val==-6148914691236517206 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x333, x2, 1288, x5)
+
+inst_184:
+// rs1_val==-6148914691236517206 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x666, x2, 1296, x5)
+
+inst_185:
+// rs1_val==-6148914691236517206 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, -0x2d, x2, 1304, x5)
+
+inst_186:
+// rs1_val==-6148914691236517206 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x2d, x2, 1312, x5)
+
+inst_187:
+// rs1_val==-6148914691236517206 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x2, x2, 1320, x5)
+
+inst_188:
+// rs1_val==-6148914691236517206 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x554, x2, 1328, x5)
+
+inst_189:
+// rs1_val==-6148914691236517206 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x0, x2, 1336, x5)
+
+inst_190:
+// rs1_val==-6148914691236517206 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x332, x2, 1344, x5)
+
+inst_191:
+// rs1_val==-6148914691236517206 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x665, x2, 1352, x5)
+
+inst_192:
+// rs1_val==-6148914691236517206 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x2c, x2, 1360, x5)
+
+inst_193:
+// rs1_val==-6148914691236517206 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x556, x2, 1368, x5)
+
+inst_194:
+// rs1_val==-6148914691236517206 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, -0x555, x2, 1376, x5)
+
+inst_195:
+// rs1_val==-6148914691236517206 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x6, x2, 1384, x5)
+
+inst_196:
+// rs1_val==-6148914691236517206 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x334, x2, 1392, x5)
+
+inst_197:
+// rs1_val==-6148914691236517206 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x667, x2, 1400, x5)
+
+inst_198:
+// rs1_val==-6148914691236517206 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, -0x2c, x2, 1408, x5)
+
+inst_199:
+// rs1_val==-6148914691236517206 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555556, 0x2e, x2, 1416, x5)
+
+inst_200:
+// rs1_val==5 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, 0x3, x2, 1424, x5)
+
+inst_201:
+// rs1_val==5 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, -0x556, x2, 1432, x5)
+
+inst_202:
+// rs1_val==5 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, 0x5, x2, 1440, x5)
+
+inst_203:
+// rs1_val==5 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x333, x2, 1448, x5)
+
+inst_204:
+// rs1_val==5 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x666, x2, 1456, x5)
+
+inst_205:
+// rs1_val==5 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, -0x2d, x2, 1464, x5)
+
+inst_206:
+// rs1_val==5 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x2d, x2, 1472, x5)
+
+inst_207:
+// rs1_val==5 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, 0x2, x2, 1480, x5)
+
+inst_208:
+// rs1_val==5 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x554, x2, 1488, x5)
+
+inst_209:
+// rs1_val==5 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, 0x0, x2, 1496, x5)
+
+inst_210:
+// rs1_val==5 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, 0x4, x2, 1504, x5)
+
+inst_211:
+// rs1_val==5 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x332, x2, 1512, x5)
+
+inst_212:
+// rs1_val==5 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x665, x2, 1520, x5)
+
+inst_213:
+// rs1_val==5 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x2c, x2, 1528, x5)
+
+inst_214:
+// rs1_val==5 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x556, x2, 1536, x5)
+
+inst_215:
+// rs1_val==5 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, -0x555, x2, 1544, x5)
+
+inst_216:
+// rs1_val==5 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x6, x2, 1552, x5)
+
+inst_217:
+// rs1_val==5 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x334, x2, 1560, x5)
+
+inst_218:
+// rs1_val==5 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x667, x2, 1568, x5)
+
+inst_219:
+// rs1_val==5 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5, -0x2c, x2, 1576, x5)
+
+inst_220:
+// rs1_val==5 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x5, 0x2e, x2, 1584, x5)
+
+inst_221:
+// rs1_val==3689348814741910323 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x3, x2, 1592, x5)
+
+inst_222:
+// rs1_val==3689348814741910323 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x555, x2, 1600, x5)
+
+inst_223:
+// rs1_val==3689348814741910323 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, -0x556, x2, 1608, x5)
+
+inst_224:
+// rs1_val==3689348814741910323 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x5, x2, 1616, x5)
+
+inst_225:
+// rs1_val==3689348814741910323 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x333, x2, 1624, x5)
+
+inst_226:
+// rs1_val==3689348814741910323 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x666, x2, 1632, x5)
+
+inst_227:
+// rs1_val==3689348814741910323 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, -0x2d, x2, 1640, x5)
+
+inst_228:
+// rs1_val==3689348814741910323 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x2d, x2, 1648, x5)
+
+inst_229:
+// rs1_val==3689348814741910323 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x2, x2, 1656, x5)
+
+inst_230:
+// rs1_val==3689348814741910323 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x554, x2, 1664, x5)
+
+inst_231:
+// rs1_val==3689348814741910323 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x0, x2, 1672, x5)
+
+inst_232:
+// rs1_val==3689348814741910323 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x4, x2, 1680, x5)
+
+inst_233:
+// rs1_val==3689348814741910323 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x332, x2, 1688, x5)
+
+inst_234:
+// rs1_val==3689348814741910323 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x665, x2, 1696, x5)
+
+inst_235:
+// rs1_val==3689348814741910323 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x2c, x2, 1704, x5)
+
+inst_236:
+// rs1_val==3689348814741910323 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x556, x2, 1712, x5)
+
+inst_237:
+// rs1_val==3689348814741910323 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, -0x555, x2, 1720, x5)
+
+inst_238:
+// rs1_val==3689348814741910323 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x6, x2, 1728, x5)
+
+inst_239:
+// rs1_val==3689348814741910323 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x334, x2, 1736, x5)
+
+inst_240:
+// rs1_val==3689348814741910323 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x667, x2, 1744, x5)
+
+inst_241:
+// rs1_val==3689348814741910323 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, -0x2c, x2, 1752, x5)
+
+inst_242:
+// rs1_val==3689348814741910323 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333333, 0x2e, x2, 1760, x5)
+
+inst_243:
+// rs1_val==7378697629483820646 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x3, x2, 1768, x5)
+
+inst_244:
+// rs1_val==7378697629483820646 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x555, x2, 1776, x5)
+
+inst_245:
+// rs1_val==7378697629483820646 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, -0x556, x2, 1784, x5)
+
+inst_246:
+// rs1_val==7378697629483820646 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x5, x2, 1792, x5)
+
+inst_247:
+// rs1_val==7378697629483820646 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x333, x2, 1800, x5)
+
+inst_248:
+// rs1_val==7378697629483820646 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x666, x2, 1808, x5)
+
+inst_249:
+// rs1_val==7378697629483820646 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, -0x2d, x2, 1816, x5)
+
+inst_250:
+// rs1_val==7378697629483820646 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x2d, x2, 1824, x5)
+
+inst_251:
+// rs1_val==7378697629483820646 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x2, x2, 1832, x5)
+
+inst_252:
+// rs1_val==7378697629483820646 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x554, x2, 1840, x5)
+
+inst_253:
+// rs1_val==7378697629483820646 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x0, x2, 1848, x5)
+
+inst_254:
+// rs1_val==7378697629483820646 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x4, x2, 1856, x5)
+
+inst_255:
+// rs1_val==7378697629483820646 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x332, x2, 1864, x5)
+
+inst_256:
+// rs1_val==7378697629483820646 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x665, x2, 1872, x5)
+
+inst_257:
+// rs1_val==7378697629483820646 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x2c, x2, 1880, x5)
+
+inst_258:
+// rs1_val==7378697629483820646 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x556, x2, 1888, x5)
+
+inst_259:
+// rs1_val==7378697629483820646 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, -0x555, x2, 1896, x5)
+
+inst_260:
+// rs1_val==7378697629483820646 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x6, x2, 1904, x5)
+
+inst_261:
+// rs1_val==7378697629483820646 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x334, x2, 1912, x5)
+
+inst_262:
+// rs1_val==7378697629483820646 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x667, x2, 1920, x5)
+
+inst_263:
+// rs1_val==7378697629483820646 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, -0x2c, x2, 1928, x5)
+
+inst_264:
+// rs1_val==7378697629483820646 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666666, 0x2e, x2, 1936, x5)
+
+inst_265:
+// rs1_val==-3037000499 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x3, x2, 1944, x5)
+
+inst_266:
+// rs1_val==-3037000499 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x555, x2, 1952, x5)
+
+inst_267:
+// rs1_val==-3037000499 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, -0x556, x2, 1960, x5)
+
+inst_268:
+// rs1_val==-3037000499 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x5, x2, 1968, x5)
+
+inst_269:
+// rs1_val==-3037000499 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x333, x2, 1976, x5)
+
+inst_270:
+// rs1_val==-3037000499 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x666, x2, 1984, x5)
+
+inst_271:
+// rs1_val==-3037000499 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, -0x2d, x2, 1992, x5)
+
+inst_272:
+// rs1_val==-3037000499 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x2d, x2, 2000, x5)
+
+inst_273:
+// rs1_val==-3037000499 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x2, x2, 2008, x5)
+
+inst_274:
+// rs1_val==-3037000499 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x554, x2, 2016, x5)
+
+inst_275:
+// rs1_val==-3037000499 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x0, x2, 2024, x5)
+
+inst_276:
+// rs1_val==-3037000499 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x4, x2, 2032, x5)
+
+inst_277:
+// rs1_val==-3037000499 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x332, x2, 2040, x5)
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_278:
+// rs1_val==-3037000499 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x665, x2, 0, x5)
+
+inst_279:
+// rs1_val==-3037000499 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x2c, x2, 8, x5)
+
+inst_280:
+// rs1_val==-3037000499 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x556, x2, 16, x5)
+
+inst_281:
+// rs1_val==-3037000499 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, -0x555, x2, 24, x5)
+
+inst_282:
+// rs1_val==-3037000499 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x6, x2, 32, x5)
+
+inst_283:
+// rs1_val==-3037000499 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x334, x2, 40, x5)
+
+inst_284:
+// rs1_val==-3037000499 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x667, x2, 48, x5)
+
+inst_285:
+// rs1_val==-3037000499 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, -0x2c, x2, 56, x5)
+
+inst_286:
+// rs1_val==-3037000499 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f333, 0x2e, x2, 64, x5)
+
+inst_287:
+// rs1_val==3037000499 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x3, x2, 72, x5)
+
+inst_288:
+// rs1_val==3037000499 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x555, x2, 80, x5)
+
+inst_289:
+// rs1_val==3037000499 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, -0x556, x2, 88, x5)
+
+inst_290:
+// rs1_val==3037000499 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x5, x2, 96, x5)
+
+inst_291:
+// rs1_val==3037000499 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x333, x2, 104, x5)
+
+inst_292:
+// rs1_val==3037000499 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x666, x2, 112, x5)
+
+inst_293:
+// rs1_val==3037000499 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, -0x2d, x2, 120, x5)
+
+inst_294:
+// rs1_val==3037000499 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x2d, x2, 128, x5)
+
+inst_295:
+// rs1_val==3037000499 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x2, x2, 136, x5)
+
+inst_296:
+// rs1_val==3037000499 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x554, x2, 144, x5)
+
+inst_297:
+// rs1_val==3037000499 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x0, x2, 152, x5)
+
+inst_298:
+// rs1_val==3037000499 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x4, x2, 160, x5)
+
+inst_299:
+// rs1_val==3037000499 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x332, x2, 168, x5)
+
+inst_300:
+// rs1_val==3037000499 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x665, x2, 176, x5)
+
+inst_301:
+// rs1_val==3037000499 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x2c, x2, 184, x5)
+
+inst_302:
+// rs1_val==3037000499 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x556, x2, 192, x5)
+
+inst_303:
+// rs1_val==3037000499 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, -0x555, x2, 200, x5)
+
+inst_304:
+// rs1_val==3037000499 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x6, x2, 208, x5)
+
+inst_305:
+// rs1_val==3037000499 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x334, x2, 216, x5)
+
+inst_306:
+// rs1_val==3037000499 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x667, x2, 224, x5)
+
+inst_307:
+// rs1_val==3037000499 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, -0x2c, x2, 232, x5)
+
+inst_308:
+// rs1_val==3037000499 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f333, 0x2e, x2, 240, x5)
+
+inst_309:
+// rs1_val==2 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x3, x2, 248, x5)
+
+inst_310:
+// rs1_val==2 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x555, x2, 256, x5)
+
+inst_311:
+// rs1_val==2 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2, -0x556, x2, 264, x5)
+
+inst_312:
+// rs1_val==2 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x5, x2, 272, x5)
+
+inst_313:
+// rs1_val==2 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x333, x2, 280, x5)
+
+inst_314:
+// rs1_val==2 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x666, x2, 288, x5)
+
+inst_315:
+// rs1_val==2 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2, -0x2d, x2, 296, x5)
+
+inst_316:
+// rs1_val==2 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x2d, x2, 304, x5)
+
+inst_317:
+// rs1_val==2 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2, 0x2, x2, 312, x5)
+
+inst_318:
+// rs1_val==2 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x554, x2, 320, x5)
+
+inst_319:
+// rs1_val==2 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2, 0x0, x2, 328, x5)
+
+inst_320:
+// rs1_val==2 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x4, x2, 336, x5)
+
+inst_321:
+// rs1_val==2 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x332, x2, 344, x5)
+
+inst_322:
+// rs1_val==2 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x665, x2, 352, x5)
+
+inst_323:
+// rs1_val==2 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x2c, x2, 360, x5)
+
+inst_324:
+// rs1_val==2 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x556, x2, 368, x5)
+
+inst_325:
+// rs1_val==2 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2, -0x555, x2, 376, x5)
+
+inst_326:
+// rs1_val==2 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x6, x2, 384, x5)
+
+inst_327:
+// rs1_val==2 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x334, x2, 392, x5)
+
+inst_328:
+// rs1_val==2 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x667, x2, 400, x5)
+
+inst_329:
+// rs1_val==2 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x2, -0x2c, x2, 408, x5)
+
+inst_330:
+// rs1_val==2 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x2; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x2, 0x2e, x2, 416, x5)
+
+inst_331:
+// rs1_val==6148914691236517204 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x3, x2, 424, x5)
+
+inst_332:
+// rs1_val==6148914691236517204 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x555, x2, 432, x5)
+
+inst_333:
+// rs1_val==6148914691236517204 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, -0x556, x2, 440, x5)
+
+inst_334:
+// rs1_val==6148914691236517204 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x5, x2, 448, x5)
+
+inst_335:
+// rs1_val==6148914691236517204 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x333, x2, 456, x5)
+
+inst_336:
+// rs1_val==6148914691236517204 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x666, x2, 464, x5)
+
+inst_337:
+// rs1_val==6148914691236517204 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, -0x2d, x2, 472, x5)
+
+inst_338:
+// rs1_val==6148914691236517204 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x2d, x2, 480, x5)
+
+inst_339:
+// rs1_val==6148914691236517204 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x2, x2, 488, x5)
+
+inst_340:
+// rs1_val==6148914691236517204 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x554, x2, 496, x5)
+
+inst_341:
+// rs1_val==6148914691236517204 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x0, x2, 504, x5)
+
+inst_342:
+// rs1_val==6148914691236517204 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x4, x2, 512, x5)
+
+inst_343:
+// rs1_val==6148914691236517204 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x332, x2, 520, x5)
+
+inst_344:
+// rs1_val==6148914691236517204 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x665, x2, 528, x5)
+
+inst_345:
+// rs1_val==6148914691236517204 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x2c, x2, 536, x5)
+
+inst_346:
+// rs1_val==6148914691236517204 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x556, x2, 544, x5)
+
+inst_347:
+// rs1_val==6148914691236517204 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, -0x555, x2, 552, x5)
+
+inst_348:
+// rs1_val==6148914691236517204 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x6, x2, 560, x5)
+
+inst_349:
+// rs1_val==6148914691236517204 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x334, x2, 568, x5)
+
+inst_350:
+// rs1_val==6148914691236517204 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x667, x2, 576, x5)
+
+inst_351:
+// rs1_val==6148914691236517204 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, -0x2c, x2, 584, x5)
+
+inst_352:
+// rs1_val==6148914691236517204 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555554, 0x2e, x2, 592, x5)
+
+inst_353:
+// rs1_val==0 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x3, x2, 600, x5)
+
+inst_354:
+// rs1_val==0 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x555, x2, 608, x5)
+
+inst_355:
+// rs1_val==0 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x0, -0x556, x2, 616, x5)
+
+inst_356:
+// rs1_val==0 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x5, x2, 624, x5)
+
+inst_357:
+// rs1_val==0 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x333, x2, 632, x5)
+
+inst_358:
+// rs1_val==0 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x666, x2, 640, x5)
+
+inst_359:
+// rs1_val==0 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x0, -0x2d, x2, 648, x5)
+
+inst_360:
+// rs1_val==0 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x2d, x2, 656, x5)
+
+inst_361:
+// rs1_val==6148914691236517206 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x2c, x2, 664, x5)
+
+inst_362:
+// rs1_val==6148914691236517206 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x556, x2, 672, x5)
+
+inst_363:
+// rs1_val==6148914691236517206 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, -0x555, x2, 680, x5)
+
+inst_364:
+// rs1_val==6148914691236517206 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x6, x2, 688, x5)
+
+inst_365:
+// rs1_val==6148914691236517206 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x334, x2, 696, x5)
+
+inst_366:
+// rs1_val==6148914691236517206 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x667, x2, 704, x5)
+
+inst_367:
+// rs1_val==6148914691236517206 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, -0x2c, x2, 712, x5)
+
+inst_368:
+// rs1_val==6148914691236517206 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x2e, x2, 720, x5)
+
+inst_369:
+// rs1_val==-6148914691236517205 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x3, x2, 728, x5)
+
+inst_370:
+// rs1_val==-6148914691236517205 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x555, x2, 736, x5)
+
+inst_371:
+// rs1_val==-6148914691236517205 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, -0x556, x2, 744, x5)
+
+inst_372:
+// rs1_val==-6148914691236517205 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x5, x2, 752, x5)
+
+inst_373:
+// rs1_val==-6148914691236517205 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x333, x2, 760, x5)
+
+inst_374:
+// rs1_val==-6148914691236517205 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x666, x2, 768, x5)
+
+inst_375:
+// rs1_val==-6148914691236517205 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, -0x2d, x2, 776, x5)
+
+inst_376:
+// rs1_val==-6148914691236517205 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x2d, x2, 784, x5)
+
+inst_377:
+// rs1_val==-6148914691236517205 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x2, x2, 792, x5)
+
+inst_378:
+// rs1_val==-6148914691236517205 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x554, x2, 800, x5)
+
+inst_379:
+// rs1_val==-6148914691236517205 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x0, x2, 808, x5)
+
+inst_380:
+// rs1_val==-6148914691236517205 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x4, x2, 816, x5)
+
+inst_381:
+// rs1_val==-6148914691236517205 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x332, x2, 824, x5)
+
+inst_382:
+// rs1_val==-6148914691236517205 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x665, x2, 832, x5)
+
+inst_383:
+// rs1_val==-6148914691236517205 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x2c, x2, 840, x5)
+
+inst_384:
+// rs1_val==-6148914691236517205 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x556, x2, 848, x5)
+
+inst_385:
+// rs1_val==-6148914691236517205 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, -0x555, x2, 856, x5)
+
+inst_386:
+// rs1_val==-6148914691236517205 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x6, x2, 864, x5)
+
+inst_387:
+// rs1_val==-6148914691236517205 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x334, x2, 872, x5)
+
+inst_388:
+// rs1_val==-6148914691236517205 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x667, x2, 880, x5)
+
+inst_389:
+// rs1_val==-6148914691236517205 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, -0x2c, x2, 888, x5)
+
+inst_390:
+// rs1_val==-6148914691236517205 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, -0x5555555555555555, 0x2e, x2, 896, x5)
+
+inst_391:
+// rs1_val==6 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, 0x3, x2, 904, x5)
+
+inst_392:
+// rs1_val==6 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x555, x2, 912, x5)
+
+inst_393:
+// rs1_val==6 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, -0x556, x2, 920, x5)
+
+inst_394:
+// rs1_val==6 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, 0x5, x2, 928, x5)
+
+inst_395:
+// rs1_val==6 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x333, x2, 936, x5)
+
+inst_396:
+// rs1_val==6 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x666, x2, 944, x5)
+
+inst_397:
+// rs1_val==6 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, -0x2d, x2, 952, x5)
+
+inst_398:
+// rs1_val==6 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x2d, x2, 960, x5)
+
+inst_399:
+// rs1_val==6 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, 0x2, x2, 968, x5)
+
+inst_400:
+// rs1_val==6 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x554, x2, 976, x5)
+
+inst_401:
+// rs1_val==6 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, 0x0, x2, 984, x5)
+
+inst_402:
+// rs1_val==6 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, 0x4, x2, 992, x5)
+
+inst_403:
+// rs1_val==6 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x332, x2, 1000, x5)
+
+inst_404:
+// rs1_val==6 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x665, x2, 1008, x5)
+
+inst_405:
+// rs1_val==6 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x2c, x2, 1016, x5)
+
+inst_406:
+// rs1_val==6 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x556, x2, 1024, x5)
+
+inst_407:
+// rs1_val==6 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, -0x555, x2, 1032, x5)
+
+inst_408:
+// rs1_val==6 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, 0x6, x2, 1040, x5)
+
+inst_409:
+// rs1_val==6 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x334, x2, 1048, x5)
+
+inst_410:
+// rs1_val==6 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x667, x2, 1056, x5)
+
+inst_411:
+// rs1_val==6 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6, -0x2c, x2, 1064, x5)
+
+inst_412:
+// rs1_val==6 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x6, 0x2e, x2, 1072, x5)
+
+inst_413:
+// rs1_val==3689348814741910324 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x3, x2, 1080, x5)
+
+inst_414:
+// rs1_val==3689348814741910324 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x555, x2, 1088, x5)
+
+inst_415:
+// rs1_val==3689348814741910324 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, -0x556, x2, 1096, x5)
+
+inst_416:
+// rs1_val==3689348814741910324 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x5, x2, 1104, x5)
+
+inst_417:
+// rs1_val==3689348814741910324 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x333, x2, 1112, x5)
+
+inst_418:
+// rs1_val==3689348814741910324 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x666, x2, 1120, x5)
+
+inst_419:
+// rs1_val==3689348814741910324 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, -0x2d, x2, 1128, x5)
+
+inst_420:
+// rs1_val==3689348814741910324 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x2d, x2, 1136, x5)
+
+inst_421:
+// rs1_val==3689348814741910324 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x2, x2, 1144, x5)
+
+inst_422:
+// rs1_val==3689348814741910324 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x554, x2, 1152, x5)
+
+inst_423:
+// rs1_val==3689348814741910324 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x0, x2, 1160, x5)
+
+inst_424:
+// rs1_val==3689348814741910324 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x4, x2, 1168, x5)
+
+inst_425:
+// rs1_val==3689348814741910324 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x332, x2, 1176, x5)
+
+inst_426:
+// rs1_val==3689348814741910324 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x665, x2, 1184, x5)
+
+inst_427:
+// rs1_val==3689348814741910324 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x2c, x2, 1192, x5)
+
+inst_428:
+// rs1_val==3689348814741910324 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x556, x2, 1200, x5)
+
+inst_429:
+// rs1_val==3689348814741910324 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, -0x555, x2, 1208, x5)
+
+inst_430:
+// rs1_val==3689348814741910324 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x6, x2, 1216, x5)
+
+inst_431:
+// rs1_val==3689348814741910324 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x334, x2, 1224, x5)
+
+inst_432:
+// rs1_val==3689348814741910324 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x667, x2, 1232, x5)
+
+inst_433:
+// rs1_val==3689348814741910324 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, -0x2c, x2, 1240, x5)
+
+inst_434:
+// rs1_val==3689348814741910324 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333334, 0x2e, x2, 1248, x5)
+
+inst_435:
+// rs1_val==7378697629483820647 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x3, x2, 1256, x5)
+
+inst_436:
+// rs1_val==7378697629483820647 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x555, x2, 1264, x5)
+
+inst_437:
+// rs1_val==7378697629483820647 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, -0x556, x2, 1272, x5)
+
+inst_438:
+// rs1_val==7378697629483820647 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x5, x2, 1280, x5)
+
+inst_439:
+// rs1_val==7378697629483820647 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x333, x2, 1288, x5)
+
+inst_440:
+// rs1_val==7378697629483820647 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x666, x2, 1296, x5)
+
+inst_441:
+// rs1_val==7378697629483820647 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, -0x2d, x2, 1304, x5)
+
+inst_442:
+// rs1_val==7378697629483820647 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x2d, x2, 1312, x5)
+
+inst_443:
+// rs1_val==7378697629483820647 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x2, x2, 1320, x5)
+
+inst_444:
+// rs1_val==7378697629483820647 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x554, x2, 1328, x5)
+
+inst_445:
+// rs1_val==7378697629483820647 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x0, x2, 1336, x5)
+
+inst_446:
+// rs1_val==7378697629483820647 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x4, x2, 1344, x5)
+
+inst_447:
+// rs1_val==7378697629483820647 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x332, x2, 1352, x5)
+
+inst_448:
+// rs1_val==7378697629483820647 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x665, x2, 1360, x5)
+
+inst_449:
+// rs1_val==7378697629483820647 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x2c, x2, 1368, x5)
+
+inst_450:
+// rs1_val==7378697629483820647 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x556, x2, 1376, x5)
+
+inst_451:
+// rs1_val==7378697629483820647 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, -0x555, x2, 1384, x5)
+
+inst_452:
+// rs1_val==7378697629483820647 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x6, x2, 1392, x5)
+
+inst_453:
+// rs1_val==7378697629483820647 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x334, x2, 1400, x5)
+
+inst_454:
+// rs1_val==7378697629483820647 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x667, x2, 1408, x5)
+
+inst_455:
+// rs1_val==7378697629483820647 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, -0x2c, x2, 1416, x5)
+
+inst_456:
+// rs1_val==7378697629483820647 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666667, 0x2e, x2, 1424, x5)
+
+inst_457:
+// rs1_val==-3037000498 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x3, x2, 1432, x5)
+
+inst_458:
+// rs1_val==-3037000498 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x555, x2, 1440, x5)
+
+inst_459:
+// rs1_val==-3037000498 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, -0x556, x2, 1448, x5)
+
+inst_460:
+// rs1_val==-3037000498 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x5, x2, 1456, x5)
+
+inst_461:
+// rs1_val==-3037000498 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x333, x2, 1464, x5)
+
+inst_462:
+// rs1_val==-3037000498 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x666, x2, 1472, x5)
+
+inst_463:
+// rs1_val==-3037000498 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, -0x2d, x2, 1480, x5)
+
+inst_464:
+// rs1_val==-3037000498 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x2d, x2, 1488, x5)
+
+inst_465:
+// rs1_val==-3037000498 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x2, x2, 1496, x5)
+
+inst_466:
+// rs1_val==-3037000498 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x554, x2, 1504, x5)
+
+inst_467:
+// rs1_val==-3037000498 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x0, x2, 1512, x5)
+
+inst_468:
+// rs1_val==-3037000498 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x4, x2, 1520, x5)
+
+inst_469:
+// rs1_val==-3037000498 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x332, x2, 1528, x5)
+
+inst_470:
+// rs1_val==-3037000498 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x665, x2, 1536, x5)
+
+inst_471:
+// rs1_val==-3037000498 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x2c, x2, 1544, x5)
+
+inst_472:
+// rs1_val==-3037000498 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x556, x2, 1552, x5)
+
+inst_473:
+// rs1_val==-3037000498 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, -0x555, x2, 1560, x5)
+
+inst_474:
+// rs1_val==-3037000498 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x6, x2, 1568, x5)
+
+inst_475:
+// rs1_val==-3037000498 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x334, x2, 1576, x5)
+
+inst_476:
+// rs1_val==-3037000498 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x667, x2, 1584, x5)
+
+inst_477:
+// rs1_val==-3037000498 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, -0x2c, x2, 1592, x5)
+
+inst_478:
+// rs1_val==-3037000498 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, -0xb504f332, 0x2e, x2, 1600, x5)
+
+inst_479:
+// rs1_val==3037000500 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x3, x2, 1608, x5)
+
+inst_480:
+// rs1_val==3037000500 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x555, x2, 1616, x5)
+
+inst_481:
+// rs1_val==3037000500 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, -0x556, x2, 1624, x5)
+
+inst_482:
+// rs1_val==3037000500 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x5, x2, 1632, x5)
+
+inst_483:
+// rs1_val==3037000500 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x333, x2, 1640, x5)
+
+inst_484:
+// rs1_val==3037000500 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x666, x2, 1648, x5)
+
+inst_485:
+// rs1_val==3037000500 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, -0x2d, x2, 1656, x5)
+
+inst_486:
+// rs1_val==3037000500 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x2d, x2, 1664, x5)
+
+inst_487:
+// rs1_val==3037000500 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x2, x2, 1672, x5)
+
+inst_488:
+// rs1_val==3037000500 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x554, x2, 1680, x5)
+
+inst_489:
+// rs1_val==3037000500 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x0, x2, 1688, x5)
+
+inst_490:
+// rs1_val==3037000500 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x4, x2, 1696, x5)
+
+inst_491:
+// rs1_val==3037000500 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x332, x2, 1704, x5)
+
+inst_492:
+// rs1_val==3037000500 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x665, x2, 1712, x5)
+
+inst_493:
+// rs1_val==3037000500 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x2c, x2, 1720, x5)
+
+inst_494:
+// rs1_val==3037000500 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x556, x2, 1728, x5)
+
+inst_495:
+// rs1_val==3037000500 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, -0x555, x2, 1736, x5)
+
+inst_496:
+// rs1_val==3037000500 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x6, x2, 1744, x5)
+
+inst_497:
+// rs1_val==3037000500 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x334, x2, 1752, x5)
+
+inst_498:
+// rs1_val==3037000500 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x667, x2, 1760, x5)
+
+inst_499:
+// rs1_val==3037000500 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, -0x2c, x2, 1768, x5)
+
+inst_500:
+// rs1_val==3037000500 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f334, 0x2e, x2, 1776, x5)
+
+inst_501:
+// rs1_val==0 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x2, x2, 1784, x5)
+
+inst_502:
+// rs1_val==0 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x554, x2, 1792, x5)
+
+inst_503:
+// rs1_val==0 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x4, x2, 1800, x5)
+
+inst_504:
+// rs1_val==0 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x332, x2, 1808, x5)
+
+inst_505:
+// rs1_val==0 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x665, x2, 1816, x5)
+
+inst_506:
+// rs1_val==0 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x2c, x2, 1824, x5)
+
+inst_507:
+// rs1_val==0 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x556, x2, 1832, x5)
+
+inst_508:
+// rs1_val==0 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x0, -0x555, x2, 1840, x5)
+
+inst_509:
+// rs1_val==0 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x6, x2, 1848, x5)
+
+inst_510:
+// rs1_val==0 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x334, x2, 1856, x5)
+
+inst_511:
+// rs1_val==0 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x667, x2, 1864, x5)
+
+inst_512:
+// rs1_val==0 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x0, -0x2c, x2, 1872, x5)
+
+inst_513:
+// rs1_val==0 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x0; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x0, 0x2e, x2, 1880, x5)
+
+inst_514:
+// rs1_val==4 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, 0x3, x2, 1888, x5)
+
+inst_515:
+// rs1_val==4 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x555, x2, 1896, x5)
+
+inst_516:
+// rs1_val==4 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, -0x556, x2, 1904, x5)
+
+inst_517:
+// rs1_val==4 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x5, x2, 1912, x5)
+
+inst_518:
+// rs1_val==4 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x333, x2, 1920, x5)
+
+inst_519:
+// rs1_val==4 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x666, x2, 1928, x5)
+
+inst_520:
+// rs1_val==4 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, -0x2d, x2, 1936, x5)
+
+inst_521:
+// rs1_val==4 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x2d, x2, 1944, x5)
+
+inst_522:
+// rs1_val==4 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, 0x2, x2, 1952, x5)
+
+inst_523:
+// rs1_val==4 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x554, x2, 1960, x5)
+
+inst_524:
+// rs1_val==4 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, 0x0, x2, 1968, x5)
+
+inst_525:
+// rs1_val==4 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, 0x4, x2, 1976, x5)
+
+inst_526:
+// rs1_val==4 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x332, x2, 1984, x5)
+
+inst_527:
+// rs1_val==4 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x665, x2, 1992, x5)
+
+inst_528:
+// rs1_val==4 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x2c, x2, 2000, x5)
+
+inst_529:
+// rs1_val==4 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x556, x2, 2008, x5)
+
+inst_530:
+// rs1_val==4 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, -0x555, x2, 2016, x5)
+
+inst_531:
+// rs1_val==4 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x6, x2, 2024, x5)
+
+inst_532:
+// rs1_val==4 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x334, x2, 2032, x5)
+
+inst_533:
+// rs1_val==4 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x667, x2, 2040, x5)
+RVTEST_SIGBASE( x2,signature_x2_2)
+
+inst_534:
+// rs1_val==4 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x4, -0x2c, x2, 0, x5)
+
+inst_535:
+// rs1_val==4 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x4; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x1, 0x4, 0x2e, x2, 8, x5)
+
+inst_536:
+// rs1_val==3689348814741910322 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x3, x2, 16, x5)
+
+inst_537:
+// rs1_val==3689348814741910322 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x555, x2, 24, x5)
+
+inst_538:
+// rs1_val==3689348814741910322 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, -0x556, x2, 32, x5)
+
+inst_539:
+// rs1_val==3689348814741910322 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x5, x2, 40, x5)
+
+inst_540:
+// rs1_val==3689348814741910322 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x333, x2, 48, x5)
+
+inst_541:
+// rs1_val==3689348814741910322 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x666, x2, 56, x5)
+
+inst_542:
+// rs1_val==3689348814741910322 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, -0x2d, x2, 64, x5)
+
+inst_543:
+// rs1_val==3689348814741910322 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x2d, x2, 72, x5)
+
+inst_544:
+// rs1_val==3689348814741910322 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x2, x2, 80, x5)
+
+inst_545:
+// rs1_val==3689348814741910322 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x554, x2, 88, x5)
+
+inst_546:
+// rs1_val==3689348814741910322 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x0, x2, 96, x5)
+
+inst_547:
+// rs1_val==3689348814741910322 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x4, x2, 104, x5)
+
+inst_548:
+// rs1_val==3689348814741910322 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x332, x2, 112, x5)
+
+inst_549:
+// rs1_val==3689348814741910322 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x665, x2, 120, x5)
+
+inst_550:
+// rs1_val==3689348814741910322 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x2c, x2, 128, x5)
+
+inst_551:
+// rs1_val==3689348814741910322 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x556, x2, 136, x5)
+
+inst_552:
+// rs1_val==3689348814741910322 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, -0x555, x2, 144, x5)
+
+inst_553:
+// rs1_val==3689348814741910322 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x6, x2, 152, x5)
+
+inst_554:
+// rs1_val==3689348814741910322 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x334, x2, 160, x5)
+
+inst_555:
+// rs1_val==3689348814741910322 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x667, x2, 168, x5)
+
+inst_556:
+// rs1_val==3689348814741910322 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, -0x2c, x2, 176, x5)
+
+inst_557:
+// rs1_val==3689348814741910322 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x3333333333333332, 0x2e, x2, 184, x5)
+
+inst_558:
+// rs1_val==7378697629483820645 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x3, x2, 192, x5)
+
+inst_559:
+// rs1_val==7378697629483820645 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x555, x2, 200, x5)
+
+inst_560:
+// rs1_val==7378697629483820645 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, -0x556, x2, 208, x5)
+
+inst_561:
+// rs1_val==7378697629483820645 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x5, x2, 216, x5)
+
+inst_562:
+// rs1_val==7378697629483820645 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x333, x2, 224, x5)
+
+inst_563:
+// rs1_val==7378697629483820645 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x666, x2, 232, x5)
+
+inst_564:
+// rs1_val==7378697629483820645 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, -0x2d, x2, 240, x5)
+
+inst_565:
+// rs1_val==7378697629483820645 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x2d, x2, 248, x5)
+
+inst_566:
+// rs1_val==7378697629483820645 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x2, x2, 256, x5)
+
+inst_567:
+// rs1_val==7378697629483820645 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x554, x2, 264, x5)
+
+inst_568:
+// rs1_val==7378697629483820645 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x0, x2, 272, x5)
+
+inst_569:
+// rs1_val==7378697629483820645 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x4, x2, 280, x5)
+
+inst_570:
+// rs1_val==7378697629483820645 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x332, x2, 288, x5)
+
+inst_571:
+// rs1_val==7378697629483820645 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x665, x2, 296, x5)
+
+inst_572:
+// rs1_val==7378697629483820645 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x2c, x2, 304, x5)
+
+inst_573:
+// rs1_val==7378697629483820645 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x556, x2, 312, x5)
+
+inst_574:
+// rs1_val==7378697629483820645 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, -0x555, x2, 320, x5)
+
+inst_575:
+// rs1_val==7378697629483820645 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x6, x2, 328, x5)
+
+inst_576:
+// rs1_val==7378697629483820645 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x334, x2, 336, x5)
+
+inst_577:
+// rs1_val==7378697629483820645 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x667, x2, 344, x5)
+
+inst_578:
+// rs1_val==7378697629483820645 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, -0x2c, x2, 352, x5)
+
+inst_579:
+// rs1_val==7378697629483820645 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x6666666666666665, 0x2e, x2, 360, x5)
+
+inst_580:
+// rs1_val==3037000498 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x3, x2, 368, x5)
+
+inst_581:
+// rs1_val==3037000498 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x555, x2, 376, x5)
+
+inst_582:
+// rs1_val==3037000498 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, -0x556, x2, 384, x5)
+
+inst_583:
+// rs1_val==3037000498 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x5, x2, 392, x5)
+
+inst_584:
+// rs1_val==3037000498 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x333, x2, 400, x5)
+
+inst_585:
+// rs1_val==3037000498 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x666, x2, 408, x5)
+
+inst_586:
+// rs1_val==3037000498 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, -0x2d, x2, 416, x5)
+
+inst_587:
+// rs1_val==3037000498 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x2d, x2, 424, x5)
+
+inst_588:
+// rs1_val==3037000498 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x2, x2, 432, x5)
+
+inst_589:
+// rs1_val==3037000498 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x554, x2, 440, x5)
+
+inst_590:
+// rs1_val==3037000498 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x0, x2, 448, x5)
+
+inst_591:
+// rs1_val==3037000498 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x4, x2, 456, x5)
+
+inst_592:
+// rs1_val==3037000498 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x332, x2, 464, x5)
+
+inst_593:
+// rs1_val==3037000498 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x665, x2, 472, x5)
+
+inst_594:
+// rs1_val==3037000498 and imm_val==44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x2c, x2, 480, x5)
+
+inst_595:
+// rs1_val==3037000498 and imm_val==1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x556, x2, 488, x5)
+
+inst_596:
+// rs1_val==3037000498 and imm_val==-1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, -0x555, x2, 496, x5)
+
+inst_597:
+// rs1_val==3037000498 and imm_val==6,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x6
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x6, x2, 504, x5)
+
+inst_598:
+// rs1_val==3037000498 and imm_val==820,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x334
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x334, x2, 512, x5)
+
+inst_599:
+// rs1_val==3037000498 and imm_val==1639,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x667
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x667, x2, 520, x5)
+
+inst_600:
+// rs1_val==3037000498 and imm_val==-44,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x2c
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, -0x2c, x2, 528, x5)
+
+inst_601:
+// rs1_val==3037000498 and imm_val==46,
+// opcode: slti ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2e
+TEST_IMM_OP( slti, x11, x10, 0x0, 0xb504f332, 0x2e, x2, 536, x5)
+
+inst_602:
+// rs1_val==6148914691236517206 and imm_val==3,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x3
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x3, x2, 544, x5)
+
+inst_603:
+// rs1_val==6148914691236517206 and imm_val==1365,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x555
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x555, x2, 552, x5)
+
+inst_604:
+// rs1_val==6148914691236517206 and imm_val==-1366,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x556
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, -0x556, x2, 560, x5)
+
+inst_605:
+// rs1_val==6148914691236517206 and imm_val==5,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x5
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x5, x2, 568, x5)
+
+inst_606:
+// rs1_val==6148914691236517206 and imm_val==819,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x333
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x333, x2, 576, x5)
+
+inst_607:
+// rs1_val==6148914691236517206 and imm_val==1638,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x666
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x666, x2, 584, x5)
+
+inst_608:
+// rs1_val==6148914691236517206 and imm_val==-45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, -0x2d, x2, 592, x5)
+
+inst_609:
+// rs1_val==6148914691236517206 and imm_val==45,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2d
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x2d, x2, 600, x5)
+
+inst_610:
+// rs1_val==6148914691236517206 and imm_val==2,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x2, x2, 608, x5)
+
+inst_611:
+// rs1_val==6148914691236517206 and imm_val==1364,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x554
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x554, x2, 616, x5)
+
+inst_612:
+// rs1_val==6148914691236517206 and imm_val==0,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x0, x2, 624, x5)
+
+inst_613:
+// rs1_val==6148914691236517206 and imm_val==4,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x4
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x4, x2, 632, x5)
+
+inst_614:
+// rs1_val==6148914691236517206 and imm_val==818,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x332
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x332, x2, 640, x5)
+
+inst_615:
+// rs1_val==6148914691236517206 and imm_val==1637,
+// opcode: slti ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x665
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x5555555555555556, 0x665, x2, 648, x5)
+
+inst_616:
+// rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807
+// opcode: slti ; op1:x10; dest:x11; op1val:0x7fffffffffffffff; immval:0x0
+TEST_IMM_OP( slti, x11, x10, 0x0, 0x7fffffffffffffff, 0x0, x2, 656, x5)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x20_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x20_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_2:
+ .fill 83*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/sltiu-01.S b/riscof/suite/rv64i_m/I/sltiu-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..28d263f690bdfe7641955325a9506ad9564f268a
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/sltiu-01.S
@@ -0,0 +1,3879 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sltiu instruction of the RISC-V I extension for the sltiu covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sltiu)
+
+RVTEST_SIGBASE( x12,signature_x12_1)
+
+inst_0:
+// rs1 == rd, rs1==x17, rd==x17, imm_val == 0,
+// opcode: sltiu ; op1:x17; dest:x17; op1val:0xe; immval:0x0
+TEST_IMM_OP( sltiu, x17, x17, 0x0, 0xe, 0x0, x12, 0, x20)
+
+inst_1:
+// rs1 != rd, rs1==x8, rd==x4, imm_val == (2**(12)-1), rs1_val == 18446744073708503039, rs1_val != imm_val and rs1_val > 0 and imm_val > 0
+// opcode: sltiu ; op1:x8; dest:x4; op1val:0xffffffffffefffff; immval:0xfff
+TEST_IMM_OP( sltiu, x4, x8, 0x1, 0xffffffffffefffff, 0xfff, x12, 8, x20)
+
+inst_2:
+// rs1==x18, rd==x14, imm_val == 1, rs1_val==0 and imm_val==1, rs1_val == 0
+// opcode: sltiu ; op1:x18; dest:x14; op1val:0x0; immval:0x1
+TEST_IMM_OP( sltiu, x14, x18, 0x1, 0x0, 0x1, x12, 16, x20)
+
+inst_3:
+// rs1==x25, rd==x23, rs1_val == (2**(xlen)-1),
+// opcode: sltiu ; op1:x25; dest:x23; op1val:0xffffffffffffffff; immval:0xe
+TEST_IMM_OP( sltiu, x23, x25, 0x0, 0xffffffffffffffff, 0xe, x12, 24, x20)
+
+inst_4:
+// rs1==x30, rd==x15, rs1_val == 1, imm_val == 2047
+// opcode: sltiu ; op1:x30; dest:x15; op1val:0x1; immval:0x7ff
+TEST_IMM_OP( sltiu, x15, x30, 0x1, 0x1, 0x7ff, x12, 32, x20)
+
+inst_5:
+// rs1==x9, rd==x21, rs1_val == imm_val and rs1_val > 0 and imm_val > 0, rs1_val==1 and imm_val==1
+// opcode: sltiu ; op1:x9; dest:x21; op1val:0x1; immval:0x1
+TEST_IMM_OP( sltiu, x21, x9, 0x0, 0x1, 0x1, x12, 40, x20)
+
+inst_6:
+// rs1==x26, rd==x9, imm_val == 2, rs1_val==0 and imm_val==2
+// opcode: sltiu ; op1:x26; dest:x9; op1val:0x0; immval:0x2
+TEST_IMM_OP( sltiu, x9, x26, 0x1, 0x0, 0x2, x12, 48, x20)
+
+inst_7:
+// rs1==x7, rd==x16, imm_val == 4, rs1_val == 18446744073709535231
+// opcode: sltiu ; op1:x7; dest:x16; op1val:0xffffffffffffbfff; immval:0x4
+TEST_IMM_OP( sltiu, x16, x7, 0x0, 0xffffffffffffbfff, 0x4, x12, 56, x20)
+
+inst_8:
+// rs1==x19, rd==x7, imm_val == 8, rs1_val == 34359738368
+// opcode: sltiu ; op1:x19; dest:x7; op1val:0x800000000; immval:0x8
+TEST_IMM_OP( sltiu, x7, x19, 0x0, 0x800000000, 0x8, x12, 64, x20)
+
+inst_9:
+// rs1==x27, rd==x3, imm_val == 16,
+// opcode: sltiu ; op1:x27; dest:x3; op1val:0x0; immval:0x10
+TEST_IMM_OP( sltiu, x3, x27, 0x1, 0x0, 0x10, x12, 72, x20)
+
+inst_10:
+// rs1==x28, rd==x26, imm_val == 32,
+// opcode: sltiu ; op1:x28; dest:x26; op1val:0xffffffffffffffff; immval:0x20
+TEST_IMM_OP( sltiu, x26, x28, 0x0, 0xffffffffffffffff, 0x20, x12, 80, x20)
+
+inst_11:
+// rs1==x13, rd==x30, imm_val == 64, rs1_val == 12297829382473034410, rs1_val==12297829382473034410 and imm_val==64
+// opcode: sltiu ; op1:x13; dest:x30; op1val:0xaaaaaaaaaaaaaaaa; immval:0x40
+TEST_IMM_OP( sltiu, x30, x13, 0x0, 0xaaaaaaaaaaaaaaaa, 0x40, x12, 88, x20)
+
+inst_12:
+// rs1==x16, rd==x0, imm_val == 128, rs1_val == 17179869184
+// opcode: sltiu ; op1:x16; dest:x0; op1val:0x400000000; immval:0x80
+TEST_IMM_OP( sltiu, x0, x16, 0, 0x400000000, 0x80, x12, 96, x20)
+
+inst_13:
+// rs1==x11, rd==x25, imm_val == 256,
+// opcode: sltiu ; op1:x11; dest:x25; op1val:0x400000000; immval:0x100
+TEST_IMM_OP( sltiu, x25, x11, 0x0, 0x400000000, 0x100, x12, 104, x20)
+
+inst_14:
+// rs1==x10, rd==x2, imm_val == 512,
+// opcode: sltiu ; op1:x10; dest:x2; op1val:0xffffffffffffbfff; immval:0x200
+TEST_IMM_OP( sltiu, x2, x10, 0x0, 0xffffffffffffbfff, 0x200, x12, 112, x20)
+
+inst_15:
+// rs1==x31, rd==x8, imm_val == 1024, rs1_val == 13835058055282163711
+// opcode: sltiu ; op1:x31; dest:x8; op1val:0xbfffffffffffffff; immval:0x400
+TEST_IMM_OP( sltiu, x8, x31, 0x0, 0xbfffffffffffffff, 0x400, x12, 120, x20)
+
+inst_16:
+// rs1==x0, rd==x1, imm_val == 2048, rs1_val == 18446744073709549567
+// opcode: sltiu ; op1:x0; dest:x1; op1val:0x0; immval:0x800
+TEST_IMM_OP( sltiu, x1, x0, 0x1, 0x0, 0x800, x12, 128, x20)
+
+inst_17:
+// rs1==x5, rd==x24, imm_val == 4094,
+// opcode: sltiu ; op1:x5; dest:x24; op1val:0x5555555555555556; immval:0xffe
+TEST_IMM_OP( sltiu, x24, x5, 0x1, 0x5555555555555556, 0xffe, x12, 136, x20)
+
+inst_18:
+// rs1==x3, rd==x6, imm_val == 4093, rs1_val == 18446744073709551607
+// opcode: sltiu ; op1:x3; dest:x6; op1val:0xfffffffffffffff7; immval:0xffd
+TEST_IMM_OP( sltiu, x6, x3, 0x1, 0xfffffffffffffff7, 0xffd, x12, 144, x20)
+
+inst_19:
+// rs1==x2, rd==x28, imm_val == 4091, rs1_val == 18446735277616529407
+// opcode: sltiu ; op1:x2; dest:x28; op1val:0xfffff7ffffffffff; immval:0xffb
+TEST_IMM_OP( sltiu, x28, x2, 0x1, 0xfffff7ffffffffff, 0xffb, x12, 152, x3)
+
+inst_20:
+// rs1==x21, rd==x5, imm_val == 4087, rs1_val == 274877906944
+// opcode: sltiu ; op1:x21; dest:x5; op1val:0x4000000000; immval:0xff7
+TEST_IMM_OP( sltiu, x5, x21, 0x1, 0x4000000000, 0xff7, x12, 160, x3)
+
+inst_21:
+// rs1==x22, rd==x27, imm_val == 4079, rs1_val == 18446744073709551359
+// opcode: sltiu ; op1:x22; dest:x27; op1val:0xfffffffffffffeff; immval:0xfef
+TEST_IMM_OP( sltiu, x27, x22, 0x1, 0xfffffffffffffeff, 0xfef, x12, 168, x3)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_22:
+// rs1==x1, rd==x11, imm_val == 4063, rs1_val == 18444492273895866367
+// opcode: sltiu ; op1:x1; dest:x11; op1val:0xfff7ffffffffffff; immval:0xfdf
+TEST_IMM_OP( sltiu, x11, x1, 0x1, 0xfff7ffffffffffff, 0xfdf, x2, 0, x3)
+
+inst_23:
+// rs1==x15, rd==x18, imm_val == 4031, rs1_val == 18446743523953737727
+// opcode: sltiu ; op1:x15; dest:x18; op1val:0xffffff7fffffffff; immval:0xfbf
+TEST_IMM_OP( sltiu, x18, x15, 0x1, 0xffffff7fffffffff, 0xfbf, x2, 8, x3)
+
+inst_24:
+// rs1==x29, rd==x20, imm_val == 3967, rs1_val == 18446744073709543423
+// opcode: sltiu ; op1:x29; dest:x20; op1val:0xffffffffffffdfff; immval:0xf7f
+TEST_IMM_OP( sltiu, x20, x29, 0x1, 0xffffffffffffdfff, 0xf7f, x2, 16, x3)
+
+inst_25:
+// rs1==x4, rd==x29, imm_val == 3839, rs1_val == 18446744073675997183
+// opcode: sltiu ; op1:x4; dest:x29; op1val:0xfffffffffdffffff; immval:0xeff
+TEST_IMM_OP( sltiu, x29, x4, 0x1, 0xfffffffffdffffff, 0xeff, x2, 24, x3)
+
+inst_26:
+// rs1==x23, rd==x22, imm_val == 3583, rs1_val == 1099511627776
+// opcode: sltiu ; op1:x23; dest:x22; op1val:0x10000000000; immval:0xdff
+TEST_IMM_OP( sltiu, x22, x23, 0x1, 0x10000000000, 0xdff, x2, 32, x3)
+
+inst_27:
+// rs1==x6, rd==x19, imm_val == 3071, rs1_val == 4611686018427387904
+// opcode: sltiu ; op1:x6; dest:x19; op1val:0x4000000000000000; immval:0xbff
+TEST_IMM_OP( sltiu, x19, x6, 0x1, 0x4000000000000000, 0xbff, x2, 40, x3)
+
+inst_28:
+// rs1==x14, rd==x12, imm_val == 1365,
+// opcode: sltiu ; op1:x14; dest:x12; op1val:0xffffffffffffbfff; immval:0x555
+TEST_IMM_OP( sltiu, x12, x14, 0x0, 0xffffffffffffbfff, 0x555, x2, 48, x3)
+
+inst_29:
+// rs1==x12, rd==x31, imm_val == 2730, rs1_val==4 and imm_val==2730, rs1_val == 4
+// opcode: sltiu ; op1:x12; dest:x31; op1val:0x4; immval:0xaaa
+TEST_IMM_OP( sltiu, x31, x12, 0x1, 0x4, 0xaaa, x2, 56, x3)
+
+inst_30:
+// rs1==x24, rd==x10, rs1_val == 2, rs1_val==2 and imm_val==62
+// opcode: sltiu ; op1:x24; dest:x10; op1val:0x2; immval:0x3e
+TEST_IMM_OP( sltiu, x10, x24, 0x1, 0x2, 0x3e, x2, 64, x3)
+
+inst_31:
+// rs1==x20, rd==x13, rs1_val == 8,
+// opcode: sltiu ; op1:x20; dest:x13; op1val:0x8; immval:0xa
+TEST_IMM_OP( sltiu, x13, x20, 0x1, 0x8, 0xa, x2, 72, x3)
+
+inst_32:
+// rs1_val == 16,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10; immval:0xc
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10, 0xc, x2, 80, x3)
+
+inst_33:
+// rs1_val == 32,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x20; immval:0xf
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x20, 0xf, x2, 88, x3)
+
+inst_34:
+// rs1_val == 64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x40; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x40, 0x1, x2, 96, x3)
+
+inst_35:
+// rs1_val == 128,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x80; immval:0xd
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x80, 0xd, x2, 104, x3)
+
+inst_36:
+// rs1_val == 256,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100, 0x3, x2, 112, x3)
+
+inst_37:
+// rs1_val == 512,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x200; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x200, 0x3, x2, 120, x3)
+
+inst_38:
+// rs1_val == 1024,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x400; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x400, 0x332, x2, 128, x3)
+
+inst_39:
+// rs1_val == 2048,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x800; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x800, 0x4, x2, 136, x3)
+
+inst_40:
+// rs1_val == 4096,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1000; immval:0xfbf
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1000, 0xfbf, x2, 144, x3)
+
+inst_41:
+// rs1_val == 8192,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2000; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x2000, 0x6, x2, 152, x3)
+
+inst_42:
+// rs1_val == 16384,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4000; immval:0xbff
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4000, 0xbff, x2, 160, x3)
+
+inst_43:
+// rs1_val == 32768,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x8000; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x8000, 0x4, x2, 168, x3)
+
+inst_44:
+// rs1_val == 65536,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000, 0x0, x2, 176, x3)
+
+inst_45:
+// rs1_val == 131072,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x20000; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x20000, 0xaab, x2, 184, x3)
+
+inst_46:
+// rs1_val == 262144,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x40000; immval:0xfff
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x40000, 0xfff, x2, 192, x3)
+
+inst_47:
+// rs1_val == 524288,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x80000; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x80000, 0x3, x2, 200, x3)
+
+inst_48:
+// rs1_val == 1048576,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000, 0x2c, x2, 208, x3)
+
+inst_49:
+// rs1_val == 2097152,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x200000; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x200000, 0x1, x2, 216, x3)
+
+inst_50:
+// rs1_val == 4194304,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x400000; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x400000, 0xaab, x2, 224, x3)
+
+inst_51:
+// rs1_val == 8388608,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x800000; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x800000, 0x555, x2, 232, x3)
+
+inst_52:
+// rs1_val == 16777216,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1000000; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x1000000, 0x2e, x2, 240, x3)
+
+inst_53:
+// rs1_val == 33554432,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2000000; immval:0xffd
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2000000, 0xffd, x2, 248, x3)
+
+inst_54:
+// rs1_val == 67108864,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4000000; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x4000000, 0x666, x2, 256, x3)
+
+inst_55:
+// rs1_val == 134217728,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x8000000; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x8000000, 0x0, x2, 264, x3)
+
+inst_56:
+// rs1_val == 268435456,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000000; immval:0x200
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000000, 0x200, x2, 272, x3)
+
+inst_57:
+// rs1_val == 536870912,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x20000000; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x20000000, 0x40, x2, 280, x3)
+
+inst_58:
+// rs1_val == 1073741824,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x40000000; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x40000000, 0x556, x2, 288, x3)
+
+inst_59:
+// rs1_val == 2147483648,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x80000000; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x80000000, 0x6, x2, 296, x3)
+
+inst_60:
+// rs1_val == 4294967296, rs1_val==4294967296 and imm_val==64
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x40, x2, 304, x3)
+
+inst_61:
+// rs1_val == 8589934592,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x200000000; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x200000000, 0x1, x2, 312, x3)
+
+inst_62:
+// rs1_val == 68719476736,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1000000000; immval:0x7ff
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x1000000000, 0x7ff, x2, 320, x3)
+
+inst_63:
+// rs1_val == 137438953472,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2000000000; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x2000000000, 0x2, x2, 328, x3)
+
+inst_64:
+// rs1_val == 549755813888,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x8000000000; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x8000000000, 0x333, x2, 336, x3)
+
+inst_65:
+// rs1_val == 2199023255552,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x20000000000; immval:0x200
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x20000000000, 0x200, x2, 344, x3)
+
+inst_66:
+// rs1_val == 4398046511104,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x40000000000; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x40000000000, 0x2d, x2, 352, x3)
+
+inst_67:
+// rs1_val == 8796093022208,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x80000000000; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x80000000000, 0x0, x2, 360, x3)
+
+inst_68:
+// rs1_val == 17592186044416,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000000; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x100000000000, 0xaaa, x2, 368, x3)
+
+inst_69:
+// rs1_val == 35184372088832,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x200000000000; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x200000000000, 0x333, x2, 376, x3)
+
+inst_70:
+// rs1_val == 70368744177664,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x400000000000; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x400000000000, 0xaa9, x2, 384, x3)
+
+inst_71:
+// rs1_val == 140737488355328,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x800000000000; immval:0x13
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x800000000000, 0x13, x2, 392, x3)
+
+inst_72:
+// rs1_val == 281474976710656,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1000000000000; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1000000000000, 0xaab, x2, 400, x3)
+
+inst_73:
+// rs1_val == 562949953421312,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2000000000000; immval:0x100
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x2000000000000, 0x100, x2, 408, x3)
+
+inst_74:
+// rs1_val == 1125899906842624,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4000000000000; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x4000000000000, 0x4, x2, 416, x3)
+
+inst_75:
+// rs1_val == 2251799813685248,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x8000000000000; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x8000000000000, 0x2e, x2, 424, x3)
+
+inst_76:
+// rs1_val == 4503599627370496,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x10000000000000; immval:0xd
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x10000000000000, 0xd, x2, 432, x3)
+
+inst_77:
+// rs1_val == 9007199254740992,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x20000000000000; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x20000000000000, 0x1, x2, 440, x3)
+
+inst_78:
+// rs1_val == 18014398509481984,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x40000000000000; immval:0x9
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x40000000000000, 0x9, x2, 448, x3)
+
+inst_79:
+// rs1_val == 36028797018963968,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x80000000000000; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x80000000000000, 0x2, x2, 456, x3)
+
+inst_80:
+// rs1_val == 72057594037927936,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000000000; immval:0xb
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000000000, 0xb, x2, 464, x3)
+
+inst_81:
+// rs1_val == 144115188075855872,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x200000000000000; immval:0xd
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x200000000000000, 0xd, x2, 472, x3)
+
+inst_82:
+// rs1_val == 288230376151711744,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x400000000000000; immval:0xffd
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x400000000000000, 0xffd, x2, 480, x3)
+
+inst_83:
+// rs1_val == 576460752303423488,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x800000000000000; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x800000000000000, 0x3f, x2, 488, x3)
+
+inst_84:
+// rs1_val == 1152921504606846976,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1000000000000000; immval:0x11
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x1000000000000000, 0x11, x2, 496, x3)
+
+inst_85:
+// rs1_val == 2305843009213693952,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2000000000000000; immval:0x400
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x2000000000000000, 0x400, x2, 504, x3)
+
+inst_86:
+// rs1_val == 9223372036854775808,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x8000000000000000; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x8000000000000000, 0x0, x2, 512, x3)
+
+inst_87:
+// rs1_val == 18446744073709551614,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffffffffffe; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffffffffffffe, 0x6, x2, 520, x3)
+
+inst_88:
+// rs1_val == 18446744073709551613,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffffffffffd; immval:0xa
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffffffffffffd, 0xa, x2, 528, x3)
+
+inst_89:
+// rs1_val == 18446744073709551611,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffffffffffb; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffffffffffffb, 0x1, x2, 536, x3)
+
+inst_90:
+// rs1_val == 18446744073709551599,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffffffffffef; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffffffffffef, 0xaa9, x2, 544, x3)
+
+inst_91:
+// rs1_val == 18446744073709551583,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffffffffffdf; immval:0xff7
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xffffffffffffffdf, 0xff7, x2, 552, x3)
+
+inst_92:
+// rs1_val == 18446744073709551551,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffffffffffbf; immval:0x20
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffffffffffbf, 0x20, x2, 560, x3)
+
+inst_93:
+// rs1_val == 18446744073709551487,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffffffffff7f; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffffffffff7f, 0x0, x2, 568, x3)
+
+inst_94:
+// rs1_val == 18446744073709551103,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffffffffdff; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffffffffffdff, 0x0, x2, 576, x3)
+
+inst_95:
+// rs1_val == 18446744073709550591,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffffffffbff; immval:0xffb
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xfffffffffffffbff, 0xffb, x2, 584, x3)
+
+inst_96:
+// rs1_val == 18446744073709547519,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffffffffefff; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffffffffefff, 0x2, x2, 592, x3)
+
+inst_97:
+// rs1_val == 18446744073709518847,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffffffff7fff; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffffffff7fff, 0x5, x2, 600, x3)
+
+inst_98:
+// rs1_val == 18446744073709486079,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffffffeffff; immval:0xfef
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xfffffffffffeffff, 0xfef, x2, 608, x3)
+
+inst_99:
+// rs1_val == 18446744073709420543,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffffffdffff; immval:0xf7f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xfffffffffffdffff, 0xf7f, x2, 616, x3)
+
+inst_100:
+// rs1_val == 18446744073709289471,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffffffbffff; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffffffffbffff, 0x4, x2, 624, x3)
+
+inst_101:
+// rs1_val == 18446744073709027327,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffffff7ffff; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffffffff7ffff, 0x5, x2, 632, x3)
+
+inst_102:
+// rs1_val == 18446744073707454463,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffffffdfffff; immval:0xd
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffffffdfffff, 0xd, x2, 640, x3)
+
+inst_103:
+// rs1_val == 18446744073705357311,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffffffbfffff; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffffffbfffff, 0x3f, x2, 648, x3)
+
+inst_104:
+// rs1_val == 18446744073701163007,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffffff7fffff; immval:0xeff
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xffffffffff7fffff, 0xeff, x2, 656, x3)
+
+inst_105:
+// rs1_val == 18446744073692774399,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffffeffffff; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffffffeffffff, 0x3, x2, 664, x3)
+
+inst_106:
+// rs1_val == 18446744073642442751,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffffbffffff; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffffffbffffff, 0x555, x2, 672, x3)
+
+inst_107:
+// rs1_val == 18446744073575333887,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffff7ffffff; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffffff7ffffff, 0x1, x2, 680, x3)
+
+inst_108:
+// rs1_val == 18446744073441116159,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffffefffffff; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffffefffffff, 0x2d, x2, 688, x3)
+
+inst_109:
+// rs1_val == 18446744073172680703,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffffdfffffff; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffffdfffffff, 0x2, x2, 696, x3)
+
+inst_110:
+// rs1_val == 18446744072635809791,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffffbfffffff; immval:0x7
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffffbfffffff, 0x7, x2, 704, x3)
+
+inst_111:
+// rs1_val == 18446744071562067967,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff7fffffff; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff7fffffff, 0x2d, x2, 712, x3)
+
+inst_112:
+// rs1_val == 18446744069414584319,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffeffffffff; immval:0x80
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffffeffffffff, 0x80, x2, 720, x3)
+
+inst_113:
+// rs1_val == 18446744065119617023,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffdffffffff; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xfffffffdffffffff, 0xaa9, x2, 728, x3)
+
+inst_114:
+// rs1_val == 18446744056529682431,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffbffffffff; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffffbffffffff, 0x2c, x2, 736, x3)
+
+inst_115:
+// rs1_val == 18446744039349813247,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffff7ffffffff; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffff7ffffffff, 0x40, x2, 744, x3)
+
+inst_116:
+// rs1_val == 18446744004990074879,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffefffffffff; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffefffffffff, 0x40, x2, 752, x3)
+
+inst_117:
+// rs1_val == 18446743936270598143,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffdfffffffff; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffdfffffffff, 0x0, x2, 760, x3)
+
+inst_118:
+// rs1_val == 18446743798831644671,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffbfffffffff; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffbfffffffff, 0x2, x2, 768, x3)
+
+inst_119:
+// rs1_val == 18446742974197923839,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffeffffffffff; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffeffffffffff, 0x4, x2, 776, x3)
+
+inst_120:
+// rs1_val == 18446741874686296063,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffdffffffffff; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffdffffffffff, 0x3f, x2, 784, x3)
+
+inst_121:
+// rs1_val == 18446739675663040511,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffbffffffffff; immval:0xc
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffffbffffffffff, 0xc, x2, 792, x3)
+
+inst_122:
+// rs1_val == 18446726481523507199,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffefffffffffff; immval:0x20
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffefffffffffff, 0x20, x2, 800, x3)
+
+inst_123:
+// rs1_val == 18446708889337462783,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffdfffffffffff; immval:0xfdf
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xffffdfffffffffff, 0xfdf, x2, 808, x3)
+
+inst_124:
+// rs1_val == 18446673704965373951,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffbfffffffffff; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffbfffffffffff, 0x2, x2, 816, x3)
+
+inst_125:
+// rs1_val == 18446603336221196287,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffff7fffffffffff; immval:0x800
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xffff7fffffffffff, 0x800, x2, 824, x3)
+
+inst_126:
+// rs1_val == 18446462598732840959,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffeffffffffffff; immval:0x12
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffeffffffffffff, 0x12, x2, 832, x3)
+
+inst_127:
+// rs1_val == 18446181123756130303,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffdffffffffffff; immval:0x12
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfffdffffffffffff, 0x12, x2, 840, x3)
+
+inst_128:
+// rs1_val == 18445618173802708991,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffbffffffffffff; immval:0xfdf
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xfffbffffffffffff, 0xfdf, x2, 848, x3)
+
+inst_129:
+// rs1_val == 18442240474082181119,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffefffffffffffff; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffefffffffffffff, 0x333, x2, 856, x3)
+
+inst_130:
+// rs1_val == 18437736874454810623,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffdfffffffffffff; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffdfffffffffffff, 0x4, x2, 864, x3)
+
+inst_131:
+// rs1_val == 18428729675200069631,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffbfffffffffffff; immval:0xfff
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xffbfffffffffffff, 0xfff, x2, 872, x3)
+
+inst_132:
+// rs1_val == 18410715276690587647,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xff7fffffffffffff; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xff7fffffffffffff, 0x2c, x2, 880, x3)
+
+inst_133:
+// rs1_val == 18374686479671623679,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfeffffffffffffff; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfeffffffffffffff, 0x6, x2, 888, x3)
+
+inst_134:
+// rs1_val == 18302628885633695743,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfdffffffffffffff; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xfdffffffffffffff, 0x555, x2, 896, x3)
+
+inst_135:
+// rs1_val == 18158513697557839871,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfbffffffffffffff; immval:0xeff
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xfbffffffffffffff, 0xeff, x2, 904, x3)
+
+inst_136:
+// rs1_val == 17870283321406128127,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xf7ffffffffffffff; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xf7ffffffffffffff, 0x332, x2, 912, x3)
+
+inst_137:
+// rs1_val == 17293822569102704639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xefffffffffffffff; immval:0x12
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xefffffffffffffff, 0x12, x2, 920, x3)
+
+inst_138:
+// rs1_val == 16140901064495857663,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xdfffffffffffffff; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xdfffffffffffffff, 0x333, x2, 928, x3)
+
+inst_139:
+// rs1_val == 9223372036854775807,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x7fffffffffffffff; immval:0xe
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x7fffffffffffffff, 0xe, x2, 936, x3)
+
+inst_140:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205 and imm_val==3
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x3, x2, 944, x3)
+
+inst_141:
+// rs1_val==3 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3, 0x3, x2, 952, x3)
+
+inst_142:
+// rs1_val==3 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x555, x2, 960, x3)
+
+inst_143:
+// rs1_val==3 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0xaaa, x2, 968, x3)
+
+inst_144:
+// rs1_val==3 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x5, x2, 976, x3)
+
+inst_145:
+// rs1_val==3 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x333, x2, 984, x3)
+
+inst_146:
+// rs1_val==3 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x666, x2, 992, x3)
+
+inst_147:
+// rs1_val==3 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x2d, x2, 1000, x3)
+
+inst_148:
+// rs1_val==3 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3, 0x0, x2, 1008, x3)
+
+inst_149:
+// rs1_val==3 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x3f, x2, 1016, x3)
+
+inst_150:
+// rs1_val==3 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3, 0x2, x2, 1024, x3)
+
+inst_151:
+// rs1_val==3 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x554, x2, 1032, x3)
+
+inst_152:
+// rs1_val==3 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0xaa9, x2, 1040, x3)
+
+inst_153:
+// rs1_val==3 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x4, x2, 1048, x3)
+
+inst_154:
+// rs1_val==3 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x332, x2, 1056, x3)
+
+inst_155:
+// rs1_val==3 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x665, x2, 1064, x3)
+
+inst_156:
+// rs1_val==3 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x2c, x2, 1072, x3)
+
+inst_157:
+// rs1_val==3 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x3e, x2, 1080, x3)
+
+inst_158:
+// rs1_val==3 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x556, x2, 1088, x3)
+
+inst_159:
+// rs1_val==3 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0xaab, x2, 1096, x3)
+
+inst_160:
+// rs1_val==3 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x6, x2, 1104, x3)
+
+inst_161:
+// rs1_val==3 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x334, x2, 1112, x3)
+
+inst_162:
+// rs1_val==3 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x667, x2, 1120, x3)
+
+inst_163:
+// rs1_val==3 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x2e, x2, 1128, x3)
+
+inst_164:
+// rs1_val==3 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3, 0x1, x2, 1136, x3)
+
+inst_165:
+// rs1_val==3 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3, 0x40, x2, 1144, x3)
+
+inst_166:
+// rs1_val==6148914691236517205 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x555, x2, 1152, x3)
+
+inst_167:
+// rs1_val==6148914691236517205 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5555555555555555, 0xaaa, x2, 1160, x3)
+
+inst_168:
+// rs1_val==6148914691236517205 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x5, x2, 1168, x3)
+
+inst_169:
+// rs1_val==6148914691236517205 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x333, x2, 1176, x3)
+
+inst_170:
+// rs1_val==6148914691236517205 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x666, x2, 1184, x3)
+
+inst_171:
+// rs1_val==6148914691236517205 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x2d, x2, 1192, x3)
+
+inst_172:
+// rs1_val==6148914691236517205 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x0, x2, 1200, x3)
+
+inst_173:
+// rs1_val==6148914691236517205 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x3f, x2, 1208, x3)
+
+inst_174:
+// rs1_val==6148914691236517205 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x2, x2, 1216, x3)
+
+inst_175:
+// rs1_val==6148914691236517205 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x554, x2, 1224, x3)
+
+inst_176:
+// rs1_val==6148914691236517205 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5555555555555555, 0xaa9, x2, 1232, x3)
+
+inst_177:
+// rs1_val==6148914691236517205 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x4, x2, 1240, x3)
+
+inst_178:
+// rs1_val==6148914691236517205 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x332, x2, 1248, x3)
+
+inst_179:
+// rs1_val==6148914691236517205 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x665, x2, 1256, x3)
+
+inst_180:
+// rs1_val==6148914691236517205 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x2c, x2, 1264, x3)
+
+inst_181:
+// rs1_val==6148914691236517205 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x3e, x2, 1272, x3)
+
+inst_182:
+// rs1_val==6148914691236517205 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x556, x2, 1280, x3)
+
+inst_183:
+// rs1_val==6148914691236517205 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5555555555555555, 0xaab, x2, 1288, x3)
+
+inst_184:
+// rs1_val==6148914691236517205 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x6, x2, 1296, x3)
+
+inst_185:
+// rs1_val==6148914691236517205 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x334, x2, 1304, x3)
+
+inst_186:
+// rs1_val==6148914691236517205 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x667, x2, 1312, x3)
+
+inst_187:
+// rs1_val==6148914691236517205 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x2e, x2, 1320, x3)
+
+inst_188:
+// rs1_val==6148914691236517205 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x1, x2, 1328, x3)
+
+inst_189:
+// rs1_val==6148914691236517205 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555555, 0x40, x2, 1336, x3)
+
+inst_190:
+// rs1_val==12297829382473034410 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x3, x2, 1344, x3)
+
+inst_191:
+// rs1_val==12297829382473034410 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x555, x2, 1352, x3)
+
+inst_192:
+// rs1_val==12297829382473034410 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaaaaaaaaaaa, 0xaaa, x2, 1360, x3)
+
+inst_193:
+// rs1_val==12297829382473034410 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x5, x2, 1368, x3)
+
+inst_194:
+// rs1_val==12297829382473034410 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x333, x2, 1376, x3)
+
+inst_195:
+// rs1_val==12297829382473034410 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x666, x2, 1384, x3)
+
+inst_196:
+// rs1_val==12297829382473034410 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x2d, x2, 1392, x3)
+
+inst_197:
+// rs1_val==12297829382473034410 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x0, x2, 1400, x3)
+
+inst_198:
+// rs1_val==12297829382473034410 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x3f, x2, 1408, x3)
+
+inst_199:
+// rs1_val==12297829382473034410 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x2, x2, 1416, x3)
+
+inst_200:
+// rs1_val==12297829382473034410 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x554, x2, 1424, x3)
+
+inst_201:
+// rs1_val==12297829382473034410 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaaaaaaaaaaa, 0xaa9, x2, 1432, x3)
+
+inst_202:
+// rs1_val==12297829382473034410 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x4, x2, 1440, x3)
+
+inst_203:
+// rs1_val==12297829382473034410 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x332, x2, 1448, x3)
+
+inst_204:
+// rs1_val==12297829382473034410 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x665, x2, 1456, x3)
+
+inst_205:
+// rs1_val==12297829382473034410 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x2c, x2, 1464, x3)
+
+inst_206:
+// rs1_val==12297829382473034410 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x3e, x2, 1472, x3)
+
+inst_207:
+// rs1_val==12297829382473034410 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x556, x2, 1480, x3)
+
+inst_208:
+// rs1_val==12297829382473034410 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaaaaaaaaaaa, 0xaab, x2, 1488, x3)
+
+inst_209:
+// rs1_val==12297829382473034410 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x6, x2, 1496, x3)
+
+inst_210:
+// rs1_val==12297829382473034410 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x334, x2, 1504, x3)
+
+inst_211:
+// rs1_val==12297829382473034410 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x667, x2, 1512, x3)
+
+inst_212:
+// rs1_val==12297829382473034410 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x2e, x2, 1520, x3)
+
+inst_213:
+// rs1_val==12297829382473034410 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaaa; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaaa, 0x1, x2, 1528, x3)
+
+inst_214:
+// rs1_val==5 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5, 0x3, x2, 1536, x3)
+
+inst_215:
+// rs1_val==5 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x555, x2, 1544, x3)
+
+inst_216:
+// rs1_val==5 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0xaaa, x2, 1552, x3)
+
+inst_217:
+// rs1_val==5 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5, 0x5, x2, 1560, x3)
+
+inst_218:
+// rs1_val==5 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x333, x2, 1568, x3)
+
+inst_219:
+// rs1_val==5 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x666, x2, 1576, x3)
+
+inst_220:
+// rs1_val==5 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x2d, x2, 1584, x3)
+
+inst_221:
+// rs1_val==5 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5, 0x0, x2, 1592, x3)
+
+inst_222:
+// rs1_val==5 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x3f, x2, 1600, x3)
+
+inst_223:
+// rs1_val==5 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5, 0x2, x2, 1608, x3)
+
+inst_224:
+// rs1_val==5 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x554, x2, 1616, x3)
+
+inst_225:
+// rs1_val==5 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0xaa9, x2, 1624, x3)
+
+inst_226:
+// rs1_val==5 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5, 0x4, x2, 1632, x3)
+
+inst_227:
+// rs1_val==5 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x332, x2, 1640, x3)
+
+inst_228:
+// rs1_val==5 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x665, x2, 1648, x3)
+
+inst_229:
+// rs1_val==5 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x2c, x2, 1656, x3)
+
+inst_230:
+// rs1_val==5 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x3e, x2, 1664, x3)
+
+inst_231:
+// rs1_val==5 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x556, x2, 1672, x3)
+
+inst_232:
+// rs1_val==5 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0xaab, x2, 1680, x3)
+
+inst_233:
+// rs1_val==5 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x6, x2, 1688, x3)
+
+inst_234:
+// rs1_val==5 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x334, x2, 1696, x3)
+
+inst_235:
+// rs1_val==5 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x667, x2, 1704, x3)
+
+inst_236:
+// rs1_val==5 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x2e, x2, 1712, x3)
+
+inst_237:
+// rs1_val==5 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5, 0x1, x2, 1720, x3)
+
+inst_238:
+// rs1_val==5 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5, 0x40, x2, 1728, x3)
+
+inst_239:
+// rs1_val==3689348814741910323 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x3, x2, 1736, x3)
+
+inst_240:
+// rs1_val==3689348814741910323 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x555, x2, 1744, x3)
+
+inst_241:
+// rs1_val==3689348814741910323 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3333333333333333, 0xaaa, x2, 1752, x3)
+
+inst_242:
+// rs1_val==3689348814741910323 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x5, x2, 1760, x3)
+
+inst_243:
+// rs1_val==3689348814741910323 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x333, x2, 1768, x3)
+
+inst_244:
+// rs1_val==3689348814741910323 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x666, x2, 1776, x3)
+
+inst_245:
+// rs1_val==3689348814741910323 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x2d, x2, 1784, x3)
+
+inst_246:
+// rs1_val==3689348814741910323 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x0, x2, 1792, x3)
+
+inst_247:
+// rs1_val==3689348814741910323 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x3f, x2, 1800, x3)
+
+inst_248:
+// rs1_val==3689348814741910323 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x2, x2, 1808, x3)
+
+inst_249:
+// rs1_val==3689348814741910323 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x554, x2, 1816, x3)
+
+inst_250:
+// rs1_val==3689348814741910323 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3333333333333333, 0xaa9, x2, 1824, x3)
+
+inst_251:
+// rs1_val==3689348814741910323 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x4, x2, 1832, x3)
+
+inst_252:
+// rs1_val==3689348814741910323 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x332, x2, 1840, x3)
+
+inst_253:
+// rs1_val==3689348814741910323 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x665, x2, 1848, x3)
+
+inst_254:
+// rs1_val==3689348814741910323 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x2c, x2, 1856, x3)
+
+inst_255:
+// rs1_val==3689348814741910323 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x3e, x2, 1864, x3)
+
+inst_256:
+// rs1_val==3689348814741910323 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x556, x2, 1872, x3)
+
+inst_257:
+// rs1_val==3689348814741910323 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3333333333333333, 0xaab, x2, 1880, x3)
+
+inst_258:
+// rs1_val==3689348814741910323 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x6, x2, 1888, x3)
+
+inst_259:
+// rs1_val==3689348814741910323 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x334, x2, 1896, x3)
+
+inst_260:
+// rs1_val==3689348814741910323 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x667, x2, 1904, x3)
+
+inst_261:
+// rs1_val==3689348814741910323 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x2e, x2, 1912, x3)
+
+inst_262:
+// rs1_val==3689348814741910323 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x1, x2, 1920, x3)
+
+inst_263:
+// rs1_val==3689348814741910323 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333333, 0x40, x2, 1928, x3)
+
+inst_264:
+// rs1_val==7378697629483820646 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x3, x2, 1936, x3)
+
+inst_265:
+// rs1_val==7378697629483820646 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x555, x2, 1944, x3)
+
+inst_266:
+// rs1_val==7378697629483820646 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6666666666666666, 0xaaa, x2, 1952, x3)
+
+inst_267:
+// rs1_val==7378697629483820646 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x5, x2, 1960, x3)
+
+inst_268:
+// rs1_val==7378697629483820646 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x333, x2, 1968, x3)
+
+inst_269:
+// rs1_val==7378697629483820646 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x666, x2, 1976, x3)
+
+inst_270:
+// rs1_val==7378697629483820646 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x2d, x2, 1984, x3)
+
+inst_271:
+// rs1_val==7378697629483820646 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x0, x2, 1992, x3)
+
+inst_272:
+// rs1_val==7378697629483820646 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x3f, x2, 2000, x3)
+
+inst_273:
+// rs1_val==7378697629483820646 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x2, x2, 2008, x3)
+
+inst_274:
+// rs1_val==7378697629483820646 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x554, x2, 2016, x3)
+
+inst_275:
+// rs1_val==7378697629483820646 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6666666666666666, 0xaa9, x2, 2024, x3)
+
+inst_276:
+// rs1_val==7378697629483820646 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x4, x2, 2032, x3)
+
+inst_277:
+// rs1_val==7378697629483820646 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x332, x2, 2040, x3)
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_278:
+// rs1_val==7378697629483820646 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x665, x2, 0, x3)
+
+inst_279:
+// rs1_val==7378697629483820646 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x2c, x2, 8, x3)
+
+inst_280:
+// rs1_val==7378697629483820646 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x3e, x2, 16, x3)
+
+inst_281:
+// rs1_val==7378697629483820646 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x556, x2, 24, x3)
+
+inst_282:
+// rs1_val==7378697629483820646 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6666666666666666, 0xaab, x2, 32, x3)
+
+inst_283:
+// rs1_val==7378697629483820646 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x6, x2, 40, x3)
+
+inst_284:
+// rs1_val==7378697629483820646 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x334, x2, 48, x3)
+
+inst_285:
+// rs1_val==7378697629483820646 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x667, x2, 56, x3)
+
+inst_286:
+// rs1_val==7378697629483820646 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x2e, x2, 64, x3)
+
+inst_287:
+// rs1_val==7378697629483820646 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x1, x2, 72, x3)
+
+inst_288:
+// rs1_val==7378697629483820646 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666666, 0x40, x2, 80, x3)
+
+inst_289:
+// rs1_val==3037000499 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x3, x2, 88, x3)
+
+inst_290:
+// rs1_val==3037000499 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x555, x2, 96, x3)
+
+inst_291:
+// rs1_val==3037000499 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb504f333, 0xaaa, x2, 104, x3)
+
+inst_292:
+// rs1_val==3037000499 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x5, x2, 112, x3)
+
+inst_293:
+// rs1_val==3037000499 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x333, x2, 120, x3)
+
+inst_294:
+// rs1_val==3037000499 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x666, x2, 128, x3)
+
+inst_295:
+// rs1_val==3037000499 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x2d, x2, 136, x3)
+
+inst_296:
+// rs1_val==3037000499 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x0, x2, 144, x3)
+
+inst_297:
+// rs1_val==3037000499 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x3f, x2, 152, x3)
+
+inst_298:
+// rs1_val==3037000499 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x2, x2, 160, x3)
+
+inst_299:
+// rs1_val==3037000499 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x554, x2, 168, x3)
+
+inst_300:
+// rs1_val==3037000499 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb504f333, 0xaa9, x2, 176, x3)
+
+inst_301:
+// rs1_val==3037000499 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x4, x2, 184, x3)
+
+inst_302:
+// rs1_val==3037000499 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x332, x2, 192, x3)
+
+inst_303:
+// rs1_val==3037000499 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x665, x2, 200, x3)
+
+inst_304:
+// rs1_val==3037000499 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x2c, x2, 208, x3)
+
+inst_305:
+// rs1_val==3037000499 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x3e, x2, 216, x3)
+
+inst_306:
+// rs1_val==3037000499 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x556, x2, 224, x3)
+
+inst_307:
+// rs1_val==3037000499 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb504f333, 0xaab, x2, 232, x3)
+
+inst_308:
+// rs1_val==3037000499 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x6, x2, 240, x3)
+
+inst_309:
+// rs1_val==3037000499 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x334, x2, 248, x3)
+
+inst_310:
+// rs1_val==3037000499 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x667, x2, 256, x3)
+
+inst_311:
+// rs1_val==3037000499 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x2e, x2, 264, x3)
+
+inst_312:
+// rs1_val==3037000499 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x1, x2, 272, x3)
+
+inst_313:
+// rs1_val==3037000499 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f333, 0x40, x2, 280, x3)
+
+inst_314:
+// rs1_val==0 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x3, x2, 288, x3)
+
+inst_315:
+// rs1_val==0 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x555, x2, 296, x3)
+
+inst_316:
+// rs1_val==0 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0xaaa, x2, 304, x3)
+
+inst_317:
+// rs1_val==0 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x5, x2, 312, x3)
+
+inst_318:
+// rs1_val==0 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x333, x2, 320, x3)
+
+inst_319:
+// rs1_val==0 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x666, x2, 328, x3)
+
+inst_320:
+// rs1_val==0 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x2d, x2, 336, x3)
+
+inst_321:
+// rs1_val==0 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x0, 0x0, x2, 344, x3)
+
+inst_322:
+// rs1_val==0 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x3f, x2, 352, x3)
+
+inst_323:
+// rs1_val==0 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x554, x2, 360, x3)
+
+inst_324:
+// rs1_val==0 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0xaa9, x2, 368, x3)
+
+inst_325:
+// rs1_val==0 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x4, x2, 376, x3)
+
+inst_326:
+// rs1_val==0 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x332, x2, 384, x3)
+
+inst_327:
+// rs1_val==0 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x665, x2, 392, x3)
+
+inst_328:
+// rs1_val==0 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x2c, x2, 400, x3)
+
+inst_329:
+// rs1_val==0 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x3e, x2, 408, x3)
+
+inst_330:
+// rs1_val==0 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x556, x2, 416, x3)
+
+inst_331:
+// rs1_val==0 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0xaab, x2, 424, x3)
+
+inst_332:
+// rs1_val==0 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x6, x2, 432, x3)
+
+inst_333:
+// rs1_val==0 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x334, x2, 440, x3)
+
+inst_334:
+// rs1_val==0 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x667, x2, 448, x3)
+
+inst_335:
+// rs1_val==0 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x2e, x2, 456, x3)
+
+inst_336:
+// rs1_val==0 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x0; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x0, 0x40, x2, 464, x3)
+
+inst_337:
+// rs1_val==4294967296 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x3, x2, 472, x3)
+
+inst_338:
+// rs1_val==4294967296 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x555, x2, 480, x3)
+
+inst_339:
+// rs1_val==4294967296 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x100000000, 0xaaa, x2, 488, x3)
+
+inst_340:
+// rs1_val==4294967296 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x5, x2, 496, x3)
+
+inst_341:
+// rs1_val==4294967296 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x333, x2, 504, x3)
+
+inst_342:
+// rs1_val==4294967296 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x666, x2, 512, x3)
+
+inst_343:
+// rs1_val==4294967296 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x2d, x2, 520, x3)
+
+inst_344:
+// rs1_val==4294967296 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x0, x2, 528, x3)
+
+inst_345:
+// rs1_val==4294967296 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x3f, x2, 536, x3)
+
+inst_346:
+// rs1_val==4294967296 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x2, x2, 544, x3)
+
+inst_347:
+// rs1_val==4294967296 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x554, x2, 552, x3)
+
+inst_348:
+// rs1_val==4294967296 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x100000000, 0xaa9, x2, 560, x3)
+
+inst_349:
+// rs1_val==4294967296 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x4, x2, 568, x3)
+
+inst_350:
+// rs1_val==4294967296 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x332, x2, 576, x3)
+
+inst_351:
+// rs1_val==4294967296 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x665, x2, 584, x3)
+
+inst_352:
+// rs1_val==4294967296 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x2c, x2, 592, x3)
+
+inst_353:
+// rs1_val==4294967296 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x3e, x2, 600, x3)
+
+inst_354:
+// rs1_val==4294967296 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x556, x2, 608, x3)
+
+inst_355:
+// rs1_val==4294967296 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x100000000, 0xaab, x2, 616, x3)
+
+inst_356:
+// rs1_val==4294967296 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x6, x2, 624, x3)
+
+inst_357:
+// rs1_val==4294967296 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x334, x2, 632, x3)
+
+inst_358:
+// rs1_val==4294967296 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x667, x2, 640, x3)
+
+inst_359:
+// rs1_val==4294967296 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x2e, x2, 648, x3)
+
+inst_360:
+// rs1_val==4294967296 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000000; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000000, 0x1, x2, 656, x3)
+
+inst_361:
+// rs1_val==2 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x3, x2, 664, x3)
+
+inst_362:
+// rs1_val==2 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x555, x2, 672, x3)
+
+inst_363:
+// rs1_val==2 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0xaaa, x2, 680, x3)
+
+inst_364:
+// rs1_val==2 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x5, x2, 688, x3)
+
+inst_365:
+// rs1_val==2 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x333, x2, 696, x3)
+
+inst_366:
+// rs1_val==2 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x666, x2, 704, x3)
+
+inst_367:
+// rs1_val==2 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x2d, x2, 712, x3)
+
+inst_368:
+// rs1_val==2 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x2, 0x0, x2, 720, x3)
+
+inst_369:
+// rs1_val==2 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x3f, x2, 728, x3)
+
+inst_370:
+// rs1_val==2 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x2, 0x2, x2, 736, x3)
+
+inst_371:
+// rs1_val==2 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x554, x2, 744, x3)
+
+inst_372:
+// rs1_val==2 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0xaa9, x2, 752, x3)
+
+inst_373:
+// rs1_val==2 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x4, x2, 760, x3)
+
+inst_374:
+// rs1_val==2 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x332, x2, 768, x3)
+
+inst_375:
+// rs1_val==2 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x665, x2, 776, x3)
+
+inst_376:
+// rs1_val==2 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x2c, x2, 784, x3)
+
+inst_377:
+// rs1_val==2 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x556, x2, 792, x3)
+
+inst_378:
+// rs1_val==2 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0xaab, x2, 800, x3)
+
+inst_379:
+// rs1_val==2 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x6, x2, 808, x3)
+
+inst_380:
+// rs1_val==2 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x334, x2, 816, x3)
+
+inst_381:
+// rs1_val==2 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x667, x2, 824, x3)
+
+inst_382:
+// rs1_val==2 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x2e, x2, 832, x3)
+
+inst_383:
+// rs1_val==2 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x2, 0x1, x2, 840, x3)
+
+inst_384:
+// rs1_val==2 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x2; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x2, 0x40, x2, 848, x3)
+
+inst_385:
+// rs1_val==6148914691236517204 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x3, x2, 856, x3)
+
+inst_386:
+// rs1_val==6148914691236517204 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x555, x2, 864, x3)
+
+inst_387:
+// rs1_val==6148914691236517204 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5555555555555554, 0xaaa, x2, 872, x3)
+
+inst_388:
+// rs1_val==6148914691236517204 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x5, x2, 880, x3)
+
+inst_389:
+// rs1_val==6148914691236517204 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x333, x2, 888, x3)
+
+inst_390:
+// rs1_val==6148914691236517204 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x666, x2, 896, x3)
+
+inst_391:
+// rs1_val==6148914691236517204 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x2d, x2, 904, x3)
+
+inst_392:
+// rs1_val==6148914691236517204 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x0, x2, 912, x3)
+
+inst_393:
+// rs1_val==6148914691236517204 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x3f, x2, 920, x3)
+
+inst_394:
+// rs1_val==6148914691236517204 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x2, x2, 928, x3)
+
+inst_395:
+// rs1_val==6148914691236517204 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x554, x2, 936, x3)
+
+inst_396:
+// rs1_val==6148914691236517204 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5555555555555554, 0xaa9, x2, 944, x3)
+
+inst_397:
+// rs1_val==6148914691236517204 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x4, x2, 952, x3)
+
+inst_398:
+// rs1_val==6148914691236517204 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x332, x2, 960, x3)
+
+inst_399:
+// rs1_val==6148914691236517204 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x665, x2, 968, x3)
+
+inst_400:
+// rs1_val==6148914691236517204 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x2c, x2, 976, x3)
+
+inst_401:
+// rs1_val==6148914691236517204 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x3e, x2, 984, x3)
+
+inst_402:
+// rs1_val==6148914691236517204 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x556, x2, 992, x3)
+
+inst_403:
+// rs1_val==6148914691236517204 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5555555555555554, 0xaab, x2, 1000, x3)
+
+inst_404:
+// rs1_val==6148914691236517204 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x6, x2, 1008, x3)
+
+inst_405:
+// rs1_val==6148914691236517204 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x334, x2, 1016, x3)
+
+inst_406:
+// rs1_val==6148914691236517204 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x667, x2, 1024, x3)
+
+inst_407:
+// rs1_val==6148914691236517204 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x2e, x2, 1032, x3)
+
+inst_408:
+// rs1_val==6148914691236517204 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x1, x2, 1040, x3)
+
+inst_409:
+// rs1_val==6148914691236517204 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555554, 0x40, x2, 1048, x3)
+
+inst_410:
+// rs1_val==12297829382473034409 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x3, x2, 1056, x3)
+
+inst_411:
+// rs1_val==12297829382473034409 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x555, x2, 1064, x3)
+
+inst_412:
+// rs1_val==12297829382473034409 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaaaaaaaaaa9, 0xaaa, x2, 1072, x3)
+
+inst_413:
+// rs1_val==12297829382473034409 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x5, x2, 1080, x3)
+
+inst_414:
+// rs1_val==12297829382473034409 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x333, x2, 1088, x3)
+
+inst_415:
+// rs1_val==12297829382473034409 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x666, x2, 1096, x3)
+
+inst_416:
+// rs1_val==12297829382473034409 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x2d, x2, 1104, x3)
+
+inst_417:
+// rs1_val==12297829382473034409 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x0, x2, 1112, x3)
+
+inst_418:
+// rs1_val==12297829382473034409 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x3f, x2, 1120, x3)
+
+inst_419:
+// rs1_val==12297829382473034409 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x2, x2, 1128, x3)
+
+inst_420:
+// rs1_val==12297829382473034409 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x554, x2, 1136, x3)
+
+inst_421:
+// rs1_val==12297829382473034409 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaaaaaaaaaa9, 0xaa9, x2, 1144, x3)
+
+inst_422:
+// rs1_val==12297829382473034409 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x4, x2, 1152, x3)
+
+inst_423:
+// rs1_val==12297829382473034409 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x332, x2, 1160, x3)
+
+inst_424:
+// rs1_val==12297829382473034409 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x665, x2, 1168, x3)
+
+inst_425:
+// rs1_val==12297829382473034409 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x2c, x2, 1176, x3)
+
+inst_426:
+// rs1_val==12297829382473034409 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x3e, x2, 1184, x3)
+
+inst_427:
+// rs1_val==12297829382473034409 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x556, x2, 1192, x3)
+
+inst_428:
+// rs1_val==12297829382473034409 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaaaaaaaaaa9, 0xaab, x2, 1200, x3)
+
+inst_429:
+// rs1_val==12297829382473034409 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x6, x2, 1208, x3)
+
+inst_430:
+// rs1_val==12297829382473034409 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x334, x2, 1216, x3)
+
+inst_431:
+// rs1_val==12297829382473034409 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x667, x2, 1224, x3)
+
+inst_432:
+// rs1_val==12297829382473034409 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x2e, x2, 1232, x3)
+
+inst_433:
+// rs1_val==12297829382473034409 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x1, x2, 1240, x3)
+
+inst_434:
+// rs1_val==12297829382473034409 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaa9; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaa9, 0x40, x2, 1248, x3)
+
+inst_435:
+// rs1_val==4 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x4, 0x3, x2, 1256, x3)
+
+inst_436:
+// rs1_val==4 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x555, x2, 1264, x3)
+
+inst_437:
+// rs1_val==4 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x5, x2, 1272, x3)
+
+inst_438:
+// rs1_val==4 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x333, x2, 1280, x3)
+
+inst_439:
+// rs1_val==4 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x666, x2, 1288, x3)
+
+inst_440:
+// rs1_val==4 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x2d, x2, 1296, x3)
+
+inst_441:
+// rs1_val==4 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x4, 0x0, x2, 1304, x3)
+
+inst_442:
+// rs1_val==4 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x3f, x2, 1312, x3)
+
+inst_443:
+// rs1_val==4 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x4, 0x2, x2, 1320, x3)
+
+inst_444:
+// rs1_val==4 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x554, x2, 1328, x3)
+
+inst_445:
+// rs1_val==4 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0xaa9, x2, 1336, x3)
+
+inst_446:
+// rs1_val==4 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x4, 0x4, x2, 1344, x3)
+
+inst_447:
+// rs1_val==4 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x332, x2, 1352, x3)
+
+inst_448:
+// rs1_val==4 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x665, x2, 1360, x3)
+
+inst_449:
+// rs1_val==4 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x2c, x2, 1368, x3)
+
+inst_450:
+// rs1_val==4 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x3e, x2, 1376, x3)
+
+inst_451:
+// rs1_val==4 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x556, x2, 1384, x3)
+
+inst_452:
+// rs1_val==4 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0xaab, x2, 1392, x3)
+
+inst_453:
+// rs1_val==4 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x6, x2, 1400, x3)
+
+inst_454:
+// rs1_val==4 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x334, x2, 1408, x3)
+
+inst_455:
+// rs1_val==4 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x667, x2, 1416, x3)
+
+inst_456:
+// rs1_val==4 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x2e, x2, 1424, x3)
+
+inst_457:
+// rs1_val==4 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x4, 0x1, x2, 1432, x3)
+
+inst_458:
+// rs1_val==4 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x4; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x4, 0x40, x2, 1440, x3)
+
+inst_459:
+// rs1_val==3689348814741910322 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x3, x2, 1448, x3)
+
+inst_460:
+// rs1_val==3689348814741910322 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x555, x2, 1456, x3)
+
+inst_461:
+// rs1_val==3689348814741910322 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3333333333333332, 0xaaa, x2, 1464, x3)
+
+inst_462:
+// rs1_val==3689348814741910322 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x5, x2, 1472, x3)
+
+inst_463:
+// rs1_val==3689348814741910322 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x333, x2, 1480, x3)
+
+inst_464:
+// rs1_val==3689348814741910322 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x666, x2, 1488, x3)
+
+inst_465:
+// rs1_val==3689348814741910322 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x2d, x2, 1496, x3)
+
+inst_466:
+// rs1_val==3689348814741910322 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x0, x2, 1504, x3)
+
+inst_467:
+// rs1_val==3689348814741910322 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x3f, x2, 1512, x3)
+
+inst_468:
+// rs1_val==3689348814741910322 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x2, x2, 1520, x3)
+
+inst_469:
+// rs1_val==3689348814741910322 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x554, x2, 1528, x3)
+
+inst_470:
+// rs1_val==3689348814741910322 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3333333333333332, 0xaa9, x2, 1536, x3)
+
+inst_471:
+// rs1_val==3689348814741910322 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x4, x2, 1544, x3)
+
+inst_472:
+// rs1_val==3689348814741910322 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x332, x2, 1552, x3)
+
+inst_473:
+// rs1_val==3689348814741910322 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x665, x2, 1560, x3)
+
+inst_474:
+// rs1_val==3689348814741910322 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x2c, x2, 1568, x3)
+
+inst_475:
+// rs1_val==3689348814741910322 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x3e, x2, 1576, x3)
+
+inst_476:
+// rs1_val==3689348814741910322 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x556, x2, 1584, x3)
+
+inst_477:
+// rs1_val==3689348814741910322 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3333333333333332, 0xaab, x2, 1592, x3)
+
+inst_478:
+// rs1_val==3689348814741910322 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x6, x2, 1600, x3)
+
+inst_479:
+// rs1_val==3689348814741910322 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x334, x2, 1608, x3)
+
+inst_480:
+// rs1_val==3689348814741910322 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x667, x2, 1616, x3)
+
+inst_481:
+// rs1_val==3689348814741910322 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x2e, x2, 1624, x3)
+
+inst_482:
+// rs1_val==3689348814741910322 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x1, x2, 1632, x3)
+
+inst_483:
+// rs1_val==3689348814741910322 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333332, 0x40, x2, 1640, x3)
+
+inst_484:
+// rs1_val==7378697629483820645 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x3, x2, 1648, x3)
+
+inst_485:
+// rs1_val==7378697629483820645 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x555, x2, 1656, x3)
+
+inst_486:
+// rs1_val==7378697629483820645 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6666666666666665, 0xaaa, x2, 1664, x3)
+
+inst_487:
+// rs1_val==7378697629483820645 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x5, x2, 1672, x3)
+
+inst_488:
+// rs1_val==7378697629483820645 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x333, x2, 1680, x3)
+
+inst_489:
+// rs1_val==7378697629483820645 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x666, x2, 1688, x3)
+
+inst_490:
+// rs1_val==7378697629483820645 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x2d, x2, 1696, x3)
+
+inst_491:
+// rs1_val==7378697629483820645 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x0, x2, 1704, x3)
+
+inst_492:
+// rs1_val==7378697629483820645 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x3f, x2, 1712, x3)
+
+inst_493:
+// rs1_val==7378697629483820645 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x2, x2, 1720, x3)
+
+inst_494:
+// rs1_val==7378697629483820645 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x554, x2, 1728, x3)
+
+inst_495:
+// rs1_val==7378697629483820645 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6666666666666665, 0xaa9, x2, 1736, x3)
+
+inst_496:
+// rs1_val==7378697629483820645 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x4, x2, 1744, x3)
+
+inst_497:
+// rs1_val==7378697629483820645 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x332, x2, 1752, x3)
+
+inst_498:
+// rs1_val==7378697629483820645 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x665, x2, 1760, x3)
+
+inst_499:
+// rs1_val==7378697629483820645 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x2c, x2, 1768, x3)
+
+inst_500:
+// rs1_val==7378697629483820645 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x3e, x2, 1776, x3)
+
+inst_501:
+// rs1_val==7378697629483820645 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x556, x2, 1784, x3)
+
+inst_502:
+// rs1_val==7378697629483820645 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6666666666666665, 0xaab, x2, 1792, x3)
+
+inst_503:
+// rs1_val==7378697629483820645 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x6, x2, 1800, x3)
+
+inst_504:
+// rs1_val==7378697629483820645 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x334, x2, 1808, x3)
+
+inst_505:
+// rs1_val==7378697629483820645 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x667, x2, 1816, x3)
+
+inst_506:
+// rs1_val==7378697629483820645 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x2e, x2, 1824, x3)
+
+inst_507:
+// rs1_val==7378697629483820645 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x1, x2, 1832, x3)
+
+inst_508:
+// rs1_val==7378697629483820645 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666665, 0x40, x2, 1840, x3)
+
+inst_509:
+// rs1_val==3037000498 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x3, x2, 1848, x3)
+
+inst_510:
+// rs1_val==3037000498 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x555, x2, 1856, x3)
+
+inst_511:
+// rs1_val==3037000498 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb504f332, 0xaaa, x2, 1864, x3)
+
+inst_512:
+// rs1_val==3037000498 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x5, x2, 1872, x3)
+
+inst_513:
+// rs1_val==3037000498 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x333, x2, 1880, x3)
+
+inst_514:
+// rs1_val==3037000498 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x666, x2, 1888, x3)
+
+inst_515:
+// rs1_val==3037000498 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x2d, x2, 1896, x3)
+
+inst_516:
+// rs1_val==3037000498 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x0, x2, 1904, x3)
+
+inst_517:
+// rs1_val==3037000498 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x3f, x2, 1912, x3)
+
+inst_518:
+// rs1_val==3037000498 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x2, x2, 1920, x3)
+
+inst_519:
+// rs1_val==3037000498 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x554, x2, 1928, x3)
+
+inst_520:
+// rs1_val==3037000498 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb504f332, 0xaa9, x2, 1936, x3)
+
+inst_521:
+// rs1_val==3037000498 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x4, x2, 1944, x3)
+
+inst_522:
+// rs1_val==3037000498 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x332, x2, 1952, x3)
+
+inst_523:
+// rs1_val==3037000498 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x665, x2, 1960, x3)
+
+inst_524:
+// rs1_val==3037000498 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x2c, x2, 1968, x3)
+
+inst_525:
+// rs1_val==3037000498 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x3e, x2, 1976, x3)
+
+inst_526:
+// rs1_val==3037000498 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x556, x2, 1984, x3)
+
+inst_527:
+// rs1_val==3037000498 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb504f332, 0xaab, x2, 1992, x3)
+
+inst_528:
+// rs1_val==3037000498 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x6, x2, 2000, x3)
+
+inst_529:
+// rs1_val==3037000498 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x334, x2, 2008, x3)
+
+inst_530:
+// rs1_val==3037000498 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x667, x2, 2016, x3)
+
+inst_531:
+// rs1_val==3037000498 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x2e, x2, 2024, x3)
+
+inst_532:
+// rs1_val==3037000498 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x1, x2, 2032, x3)
+
+inst_533:
+// rs1_val==3037000498 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f332, 0x40, x2, 2040, x3)
+RVTEST_SIGBASE( x2,signature_x2_2)
+
+inst_534:
+// rs1_val==4294967295 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x3, x2, 0, x3)
+
+inst_535:
+// rs1_val==4294967295 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x555, x2, 8, x3)
+
+inst_536:
+// rs1_val==4294967295 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xffffffff, 0xaaa, x2, 16, x3)
+
+inst_537:
+// rs1_val==4294967295 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x5, x2, 24, x3)
+
+inst_538:
+// rs1_val==4294967295 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x333, x2, 32, x3)
+
+inst_539:
+// rs1_val==4294967295 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x666, x2, 40, x3)
+
+inst_540:
+// rs1_val==4294967295 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x2d, x2, 48, x3)
+
+inst_541:
+// rs1_val==4294967295 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x0, x2, 56, x3)
+
+inst_542:
+// rs1_val==4294967295 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x3f, x2, 64, x3)
+
+inst_543:
+// rs1_val==4294967295 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x2, x2, 72, x3)
+
+inst_544:
+// rs1_val==4294967295 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x554, x2, 80, x3)
+
+inst_545:
+// rs1_val==4294967295 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xffffffff, 0xaa9, x2, 88, x3)
+
+inst_546:
+// rs1_val==4294967295 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x4, x2, 96, x3)
+
+inst_547:
+// rs1_val==4294967295 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x332, x2, 104, x3)
+
+inst_548:
+// rs1_val==4294967295 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x665, x2, 112, x3)
+
+inst_549:
+// rs1_val==4294967295 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x2c, x2, 120, x3)
+
+inst_550:
+// rs1_val==4294967295 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x3e, x2, 128, x3)
+
+inst_551:
+// rs1_val==4294967295 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x556, x2, 136, x3)
+
+inst_552:
+// rs1_val==4294967295 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xffffffff, 0xaab, x2, 144, x3)
+
+inst_553:
+// rs1_val==4294967295 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x6, x2, 152, x3)
+
+inst_554:
+// rs1_val==4294967295 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x334, x2, 160, x3)
+
+inst_555:
+// rs1_val==4294967295 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x667, x2, 168, x3)
+
+inst_556:
+// rs1_val==4294967295 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x2e, x2, 176, x3)
+
+inst_557:
+// rs1_val==4294967295 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x1, x2, 184, x3)
+
+inst_558:
+// rs1_val==4294967295 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xffffffff; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xffffffff, 0x40, x2, 192, x3)
+
+inst_559:
+// rs1_val==6148914691236517206 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x3, x2, 200, x3)
+
+inst_560:
+// rs1_val==6148914691236517206 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x555, x2, 208, x3)
+
+inst_561:
+// rs1_val==6148914691236517206 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5555555555555556, 0xaaa, x2, 216, x3)
+
+inst_562:
+// rs1_val==6148914691236517206 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x5, x2, 224, x3)
+
+inst_563:
+// rs1_val==6148914691236517206 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x333, x2, 232, x3)
+
+inst_564:
+// rs1_val==6148914691236517206 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x666, x2, 240, x3)
+
+inst_565:
+// rs1_val==6148914691236517206 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x2d, x2, 248, x3)
+
+inst_566:
+// rs1_val==6148914691236517206 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x0, x2, 256, x3)
+
+inst_567:
+// rs1_val==6148914691236517206 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x3f, x2, 264, x3)
+
+inst_568:
+// rs1_val==6148914691236517206 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x2, x2, 272, x3)
+
+inst_569:
+// rs1_val==6148914691236517206 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x554, x2, 280, x3)
+
+inst_570:
+// rs1_val==6148914691236517206 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5555555555555556, 0xaa9, x2, 288, x3)
+
+inst_571:
+// rs1_val==6148914691236517206 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x4, x2, 296, x3)
+
+inst_572:
+// rs1_val==6148914691236517206 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x332, x2, 304, x3)
+
+inst_573:
+// rs1_val==6148914691236517206 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x665, x2, 312, x3)
+
+inst_574:
+// rs1_val==6148914691236517206 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x2c, x2, 320, x3)
+
+inst_575:
+// rs1_val==6148914691236517206 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x3e, x2, 328, x3)
+
+inst_576:
+// rs1_val==6148914691236517206 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x556, x2, 336, x3)
+
+inst_577:
+// rs1_val==6148914691236517206 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x5555555555555556, 0xaab, x2, 344, x3)
+
+inst_578:
+// rs1_val==6148914691236517206 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x6, x2, 352, x3)
+
+inst_579:
+// rs1_val==6148914691236517206 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x334, x2, 360, x3)
+
+inst_580:
+// rs1_val==6148914691236517206 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x667, x2, 368, x3)
+
+inst_581:
+// rs1_val==6148914691236517206 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x2e, x2, 376, x3)
+
+inst_582:
+// rs1_val==6148914691236517206 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x1, x2, 384, x3)
+
+inst_583:
+// rs1_val==6148914691236517206 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x5555555555555556, 0x40, x2, 392, x3)
+
+inst_584:
+// rs1_val==12297829382473034411 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x3, x2, 400, x3)
+
+inst_585:
+// rs1_val==12297829382473034411 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x555, x2, 408, x3)
+
+inst_586:
+// rs1_val==12297829382473034411 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaaaaaaaaaab, 0xaaa, x2, 416, x3)
+
+inst_587:
+// rs1_val==12297829382473034411 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x5, x2, 424, x3)
+
+inst_588:
+// rs1_val==12297829382473034411 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x333, x2, 432, x3)
+
+inst_589:
+// rs1_val==12297829382473034411 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x666, x2, 440, x3)
+
+inst_590:
+// rs1_val==12297829382473034411 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x2d, x2, 448, x3)
+
+inst_591:
+// rs1_val==12297829382473034411 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x0, x2, 456, x3)
+
+inst_592:
+// rs1_val==12297829382473034411 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x3f, x2, 464, x3)
+
+inst_593:
+// rs1_val==12297829382473034411 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x2, x2, 472, x3)
+
+inst_594:
+// rs1_val==12297829382473034411 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x554, x2, 480, x3)
+
+inst_595:
+// rs1_val==12297829382473034411 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaaaaaaaaaab, 0xaa9, x2, 488, x3)
+
+inst_596:
+// rs1_val==12297829382473034411 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x4, x2, 496, x3)
+
+inst_597:
+// rs1_val==12297829382473034411 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x332, x2, 504, x3)
+
+inst_598:
+// rs1_val==12297829382473034411 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x665, x2, 512, x3)
+
+inst_599:
+// rs1_val==12297829382473034411 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x2c, x2, 520, x3)
+
+inst_600:
+// rs1_val==12297829382473034411 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x3e, x2, 528, x3)
+
+inst_601:
+// rs1_val==12297829382473034411 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x556, x2, 536, x3)
+
+inst_602:
+// rs1_val==12297829382473034411 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xaaaaaaaaaaaaaaab, 0xaab, x2, 544, x3)
+
+inst_603:
+// rs1_val==12297829382473034411 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x6, x2, 552, x3)
+
+inst_604:
+// rs1_val==12297829382473034411 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x334, x2, 560, x3)
+
+inst_605:
+// rs1_val==12297829382473034411 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x667, x2, 568, x3)
+
+inst_606:
+// rs1_val==12297829382473034411 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x2e, x2, 576, x3)
+
+inst_607:
+// rs1_val==12297829382473034411 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x1, x2, 584, x3)
+
+inst_608:
+// rs1_val==12297829382473034411 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xaaaaaaaaaaaaaaab; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xaaaaaaaaaaaaaaab, 0x40, x2, 592, x3)
+
+inst_609:
+// rs1_val==6 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x3, x2, 600, x3)
+
+inst_610:
+// rs1_val==6 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x555, x2, 608, x3)
+
+inst_611:
+// rs1_val==6 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0xaaa, x2, 616, x3)
+
+inst_612:
+// rs1_val==6 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x5, x2, 624, x3)
+
+inst_613:
+// rs1_val==6 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x333, x2, 632, x3)
+
+inst_614:
+// rs1_val==6 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x666, x2, 640, x3)
+
+inst_615:
+// rs1_val==6 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x2d, x2, 648, x3)
+
+inst_616:
+// rs1_val==6 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x0, x2, 656, x3)
+
+inst_617:
+// rs1_val==6 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x3f, x2, 664, x3)
+
+inst_618:
+// rs1_val==6 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x2, x2, 672, x3)
+
+inst_619:
+// rs1_val==6 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x554, x2, 680, x3)
+
+inst_620:
+// rs1_val==6 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0xaa9, x2, 688, x3)
+
+inst_621:
+// rs1_val==6 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x4, x2, 696, x3)
+
+inst_622:
+// rs1_val==6 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x332, x2, 704, x3)
+
+inst_623:
+// rs1_val==6 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x665, x2, 712, x3)
+
+inst_624:
+// rs1_val==6 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x2c, x2, 720, x3)
+
+inst_625:
+// rs1_val==6 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x3e, x2, 728, x3)
+
+inst_626:
+// rs1_val==6 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x556, x2, 736, x3)
+
+inst_627:
+// rs1_val==6 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0xaab, x2, 744, x3)
+
+inst_628:
+// rs1_val==6 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x6, x2, 752, x3)
+
+inst_629:
+// rs1_val==6 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x334, x2, 760, x3)
+
+inst_630:
+// rs1_val==6 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x667, x2, 768, x3)
+
+inst_631:
+// rs1_val==4294967297 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x2d, x2, 776, x3)
+
+inst_632:
+// rs1_val==4294967297 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x0, x2, 784, x3)
+
+inst_633:
+// rs1_val==4294967297 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x3f, x2, 792, x3)
+
+inst_634:
+// rs1_val==4294967297 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x2, x2, 800, x3)
+
+inst_635:
+// rs1_val==4294967297 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x554, x2, 808, x3)
+
+inst_636:
+// rs1_val==4294967297 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x100000001, 0xaa9, x2, 816, x3)
+
+inst_637:
+// rs1_val==4294967297 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x4, x2, 824, x3)
+
+inst_638:
+// rs1_val==4294967297 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x332, x2, 832, x3)
+
+inst_639:
+// rs1_val==4294967297 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x665, x2, 840, x3)
+
+inst_640:
+// rs1_val==4294967297 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x2c, x2, 848, x3)
+
+inst_641:
+// rs1_val==4294967297 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x3e, x2, 856, x3)
+
+inst_642:
+// rs1_val==4294967297 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x556, x2, 864, x3)
+
+inst_643:
+// rs1_val==4294967297 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x100000001, 0xaab, x2, 872, x3)
+
+inst_644:
+// rs1_val==4294967297 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x6, x2, 880, x3)
+
+inst_645:
+// rs1_val==4294967297 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x334, x2, 888, x3)
+
+inst_646:
+// rs1_val==4294967297 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x667, x2, 896, x3)
+
+inst_647:
+// rs1_val==4294967297 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x2e, x2, 904, x3)
+
+inst_648:
+// rs1_val==4294967297 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x1, x2, 912, x3)
+
+inst_649:
+// rs1_val==4294967297 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x40, x2, 920, x3)
+
+inst_650:
+// rs1_val==6 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x2e, x2, 928, x3)
+
+inst_651:
+// rs1_val==6 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6, 0x1, x2, 936, x3)
+
+inst_652:
+// rs1_val==6 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6, 0x40, x2, 944, x3)
+
+inst_653:
+// rs1_val==3689348814741910324 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x3, x2, 952, x3)
+
+inst_654:
+// rs1_val==3689348814741910324 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x555, x2, 960, x3)
+
+inst_655:
+// rs1_val==3689348814741910324 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3333333333333334, 0xaaa, x2, 968, x3)
+
+inst_656:
+// rs1_val==3689348814741910324 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x5, x2, 976, x3)
+
+inst_657:
+// rs1_val==3689348814741910324 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x333, x2, 984, x3)
+
+inst_658:
+// rs1_val==3689348814741910324 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x666, x2, 992, x3)
+
+inst_659:
+// rs1_val==3689348814741910324 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x2d, x2, 1000, x3)
+
+inst_660:
+// rs1_val==3689348814741910324 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x0, x2, 1008, x3)
+
+inst_661:
+// rs1_val==3689348814741910324 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x3f, x2, 1016, x3)
+
+inst_662:
+// rs1_val==3689348814741910324 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x2, x2, 1024, x3)
+
+inst_663:
+// rs1_val==3689348814741910324 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x554, x2, 1032, x3)
+
+inst_664:
+// rs1_val==3689348814741910324 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3333333333333334, 0xaa9, x2, 1040, x3)
+
+inst_665:
+// rs1_val==3689348814741910324 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x4, x2, 1048, x3)
+
+inst_666:
+// rs1_val==3689348814741910324 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x332, x2, 1056, x3)
+
+inst_667:
+// rs1_val==3689348814741910324 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x665, x2, 1064, x3)
+
+inst_668:
+// rs1_val==3689348814741910324 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x2c, x2, 1072, x3)
+
+inst_669:
+// rs1_val==3689348814741910324 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x3e, x2, 1080, x3)
+
+inst_670:
+// rs1_val==3689348814741910324 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x556, x2, 1088, x3)
+
+inst_671:
+// rs1_val==3689348814741910324 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x3333333333333334, 0xaab, x2, 1096, x3)
+
+inst_672:
+// rs1_val==3689348814741910324 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x6, x2, 1104, x3)
+
+inst_673:
+// rs1_val==3689348814741910324 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x334, x2, 1112, x3)
+
+inst_674:
+// rs1_val==3689348814741910324 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x667, x2, 1120, x3)
+
+inst_675:
+// rs1_val==3689348814741910324 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x2e, x2, 1128, x3)
+
+inst_676:
+// rs1_val==3689348814741910324 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x1, x2, 1136, x3)
+
+inst_677:
+// rs1_val==3689348814741910324 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x3333333333333334, 0x40, x2, 1144, x3)
+
+inst_678:
+// rs1_val==7378697629483820647 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x3, x2, 1152, x3)
+
+inst_679:
+// rs1_val==7378697629483820647 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x555, x2, 1160, x3)
+
+inst_680:
+// rs1_val==7378697629483820647 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6666666666666667, 0xaaa, x2, 1168, x3)
+
+inst_681:
+// rs1_val==7378697629483820647 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x5, x2, 1176, x3)
+
+inst_682:
+// rs1_val==7378697629483820647 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x333, x2, 1184, x3)
+
+inst_683:
+// rs1_val==7378697629483820647 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x666, x2, 1192, x3)
+
+inst_684:
+// rs1_val==7378697629483820647 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x2d, x2, 1200, x3)
+
+inst_685:
+// rs1_val==7378697629483820647 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x0, x2, 1208, x3)
+
+inst_686:
+// rs1_val==7378697629483820647 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x3f, x2, 1216, x3)
+
+inst_687:
+// rs1_val==7378697629483820647 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x2, x2, 1224, x3)
+
+inst_688:
+// rs1_val==7378697629483820647 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x554, x2, 1232, x3)
+
+inst_689:
+// rs1_val==7378697629483820647 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6666666666666667, 0xaa9, x2, 1240, x3)
+
+inst_690:
+// rs1_val==7378697629483820647 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x4, x2, 1248, x3)
+
+inst_691:
+// rs1_val==7378697629483820647 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x332, x2, 1256, x3)
+
+inst_692:
+// rs1_val==7378697629483820647 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x665, x2, 1264, x3)
+
+inst_693:
+// rs1_val==7378697629483820647 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x2c, x2, 1272, x3)
+
+inst_694:
+// rs1_val==7378697629483820647 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x3e, x2, 1280, x3)
+
+inst_695:
+// rs1_val==7378697629483820647 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x556, x2, 1288, x3)
+
+inst_696:
+// rs1_val==7378697629483820647 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x6666666666666667, 0xaab, x2, 1296, x3)
+
+inst_697:
+// rs1_val==7378697629483820647 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x6, x2, 1304, x3)
+
+inst_698:
+// rs1_val==7378697629483820647 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x334, x2, 1312, x3)
+
+inst_699:
+// rs1_val==7378697629483820647 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x667, x2, 1320, x3)
+
+inst_700:
+// rs1_val==7378697629483820647 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x2e, x2, 1328, x3)
+
+inst_701:
+// rs1_val==7378697629483820647 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x1, x2, 1336, x3)
+
+inst_702:
+// rs1_val==7378697629483820647 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x6666666666666667, 0x40, x2, 1344, x3)
+
+inst_703:
+// rs1_val==3037000500 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x3, x2, 1352, x3)
+
+inst_704:
+// rs1_val==3037000500 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x555, x2, 1360, x3)
+
+inst_705:
+// rs1_val==3037000500 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb504f334, 0xaaa, x2, 1368, x3)
+
+inst_706:
+// rs1_val==3037000500 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x5, x2, 1376, x3)
+
+inst_707:
+// rs1_val==3037000500 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x333, x2, 1384, x3)
+
+inst_708:
+// rs1_val==3037000500 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x666, x2, 1392, x3)
+
+inst_709:
+// rs1_val==3037000500 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x2d, x2, 1400, x3)
+
+inst_710:
+// rs1_val==3037000500 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x0, x2, 1408, x3)
+
+inst_711:
+// rs1_val==3037000500 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x3f, x2, 1416, x3)
+
+inst_712:
+// rs1_val==3037000500 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x2, x2, 1424, x3)
+
+inst_713:
+// rs1_val==3037000500 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x554, x2, 1432, x3)
+
+inst_714:
+// rs1_val==3037000500 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb504f334, 0xaa9, x2, 1440, x3)
+
+inst_715:
+// rs1_val==3037000500 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x4, x2, 1448, x3)
+
+inst_716:
+// rs1_val==3037000500 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x332, x2, 1456, x3)
+
+inst_717:
+// rs1_val==3037000500 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x665, x2, 1464, x3)
+
+inst_718:
+// rs1_val==3037000500 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x2c, x2, 1472, x3)
+
+inst_719:
+// rs1_val==3037000500 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x3e, x2, 1480, x3)
+
+inst_720:
+// rs1_val==3037000500 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x556, x2, 1488, x3)
+
+inst_721:
+// rs1_val==3037000500 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xb504f334, 0xaab, x2, 1496, x3)
+
+inst_722:
+// rs1_val==3037000500 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x6, x2, 1504, x3)
+
+inst_723:
+// rs1_val==3037000500 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x334, x2, 1512, x3)
+
+inst_724:
+// rs1_val==3037000500 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x667, x2, 1520, x3)
+
+inst_725:
+// rs1_val==3037000500 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x2e, x2, 1528, x3)
+
+inst_726:
+// rs1_val==3037000500 and imm_val==1,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x1
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x1, x2, 1536, x3)
+
+inst_727:
+// rs1_val==3037000500 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0xb504f334, 0x40, x2, 1544, x3)
+
+inst_728:
+// rs1_val==1 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x3, x2, 1552, x3)
+
+inst_729:
+// rs1_val==1 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x555, x2, 1560, x3)
+
+inst_730:
+// rs1_val==1 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0xaaa, x2, 1568, x3)
+
+inst_731:
+// rs1_val==1 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x5, x2, 1576, x3)
+
+inst_732:
+// rs1_val==1 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x333, x2, 1584, x3)
+
+inst_733:
+// rs1_val==1 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x666, x2, 1592, x3)
+
+inst_734:
+// rs1_val==1 and imm_val==45,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x2d
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x2d, x2, 1600, x3)
+
+inst_735:
+// rs1_val==1 and imm_val==0,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x0
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x1, 0x0, x2, 1608, x3)
+
+inst_736:
+// rs1_val==1 and imm_val==63,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x3f
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x3f, x2, 1616, x3)
+
+inst_737:
+// rs1_val==1 and imm_val==2,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x2
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x2, x2, 1624, x3)
+
+inst_738:
+// rs1_val==1 and imm_val==1364,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x554
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x554, x2, 1632, x3)
+
+inst_739:
+// rs1_val==1 and imm_val==2729,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0xaa9
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0xaa9, x2, 1640, x3)
+
+inst_740:
+// rs1_val==1 and imm_val==4,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x4
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x4, x2, 1648, x3)
+
+inst_741:
+// rs1_val==1 and imm_val==818,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x332
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x332, x2, 1656, x3)
+
+inst_742:
+// rs1_val==1 and imm_val==1637,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x665
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x665, x2, 1664, x3)
+
+inst_743:
+// rs1_val==1 and imm_val==44,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x2c
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x2c, x2, 1672, x3)
+
+inst_744:
+// rs1_val==1 and imm_val==62,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x3e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x3e, x2, 1680, x3)
+
+inst_745:
+// rs1_val==1 and imm_val==1366,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x556
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x556, x2, 1688, x3)
+
+inst_746:
+// rs1_val==1 and imm_val==2731,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0xaab
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0xaab, x2, 1696, x3)
+
+inst_747:
+// rs1_val==1 and imm_val==6,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x6
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x6, x2, 1704, x3)
+
+inst_748:
+// rs1_val==1 and imm_val==820,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x334
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x334, x2, 1712, x3)
+
+inst_749:
+// rs1_val==1 and imm_val==1639,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x667
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x667, x2, 1720, x3)
+
+inst_750:
+// rs1_val==1 and imm_val==46,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x2e
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x2e, x2, 1728, x3)
+
+inst_751:
+// rs1_val==1 and imm_val==64,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x1; immval:0x40
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x1, 0x40, x2, 1736, x3)
+
+inst_752:
+// rs1_val==4294967297 and imm_val==3,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x3
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x3, x2, 1744, x3)
+
+inst_753:
+// rs1_val==4294967297 and imm_val==1365,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x555
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x555, x2, 1752, x3)
+
+inst_754:
+// rs1_val==4294967297 and imm_val==2730,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0xaaa
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0x100000001, 0xaaa, x2, 1760, x3)
+
+inst_755:
+// rs1_val==4294967297 and imm_val==5,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x5
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x5, x2, 1768, x3)
+
+inst_756:
+// rs1_val==4294967297 and imm_val==819,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x333
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x333, x2, 1776, x3)
+
+inst_757:
+// rs1_val==4294967297 and imm_val==1638,
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0x100000001; immval:0x666
+TEST_IMM_OP( sltiu, x11, x10, 0x0, 0x100000001, 0x666, x2, 1784, x3)
+
+inst_758:
+// imm_val == 2048, rs1_val == 18446744073709549567
+// opcode: sltiu ; op1:x10; dest:x11; op1val:0xfffffffffffff7ff; immval:0x800
+TEST_IMM_OP( sltiu, x11, x10, 0x1, 0xfffffffffffff7ff, 0x800, x2, 1792, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x12_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x12_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_2:
+ .fill 225*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/sltu-01.S b/riscof/suite/rv64i_m/I/sltu-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..b4edb825eb76ec74a996a48578237502d244bb5b
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/sltu-01.S
@@ -0,0 +1,4189 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sltu instruction of the RISC-V I extension for the sltu covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sltu)
+
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x16, rs2==x16, rd==x4, rs1_val > 0 and rs2_val > 0, rs1_val == 2048, rs1_val != rs2_val and rs1_val > 0 and rs2_val > 0, rs2_val == 16
+// opcode: sltu ; op1:x16; op2:x16; dest:x4; op1val:0x800; op2val:0x800
+TEST_RR_OP(sltu, x4, x16, x16, 0x0, 0x800, 0x800, x1, 0, x19)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x11, rs2==x29, rd==x29, rs1_val == rs2_val and rs1_val > 0 and rs2_val > 0, rs2_val == 18014398509481984, rs1_val == 18014398509481984
+// opcode: sltu ; op1:x11; op2:x29; dest:x29; op1val:0x40000000000000; op2val:0x40000000000000
+TEST_RR_OP(sltu, x29, x11, x29, 0x0, 0x40000000000000, 0x40000000000000, x1, 8, x19)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x12, rs2==x12, rd==x12, rs2_val == 0, rs1_val == 2305843009213693952
+// opcode: sltu ; op1:x12; op2:x12; dest:x12; op1val:0x2000000000000000; op2val:0x2000000000000000
+TEST_RR_OP(sltu, x12, x12, x12, 0x0, 0x2000000000000000, 0x2000000000000000, x1, 16, x19)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x31, rs2==x7, rd==x15, rs2_val == (2**(xlen)-1),
+// opcode: sltu ; op1:x31; op2:x7; dest:x15; op1val:0x6; op2val:0xffffffffffffffff
+TEST_RR_OP(sltu, x15, x31, x7, 0x1, 0x6, 0xffffffffffffffff, x1, 24, x19)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x26, rs2==x17, rd==x26, rs2_val == 1, rs1_val==6148914691236517204 and rs2_val==1
+// opcode: sltu ; op1:x26; op2:x17; dest:x26; op1val:0x5555555555555554; op2val:0x1
+TEST_RR_OP(sltu, x26, x26, x17, 0x0, 0x5555555555555554, 0x1, x1, 32, x19)
+
+inst_5:
+// rs1==x29, rs2==x18, rd==x24, rs1_val == 0, rs1_val==0 and rs2_val==1
+// opcode: sltu ; op1:x29; op2:x18; dest:x24; op1val:0x0; op2val:0x1
+TEST_RR_OP(sltu, x24, x29, x18, 0x1, 0x0, 0x1, x1, 40, x19)
+
+inst_6:
+// rs1==x14, rs2==x22, rd==x25, rs1_val == (2**(xlen)-1), rs2_val == 72057594037927936
+// opcode: sltu ; op1:x14; op2:x22; dest:x25; op1val:0xffffffffffffffff; op2val:0x100000000000000
+TEST_RR_OP(sltu, x25, x14, x22, 0x0, 0xffffffffffffffff, 0x100000000000000, x1, 48, x19)
+
+inst_7:
+// rs1==x0, rs2==x20, rd==x23, rs1_val == 1, rs2_val == 18446742974197923839
+// opcode: sltu ; op1:x0; op2:x20; dest:x23; op1val:0x0; op2val:0xfffffeffffffffff
+TEST_RR_OP(sltu, x23, x0, x20, 0x1, 0x0, 0xfffffeffffffffff, x1, 56, x19)
+
+inst_8:
+// rs1==x10, rs2==x5, rd==x0, rs2_val == 2, rs1_val == 1152921504606846976
+// opcode: sltu ; op1:x10; op2:x5; dest:x0; op1val:0x1000000000000000; op2val:0x2
+TEST_RR_OP(sltu, x0, x10, x5, 0, 0x1000000000000000, 0x2, x1, 64, x19)
+
+inst_9:
+// rs1==x18, rs2==x14, rd==x16, rs2_val == 4, rs1_val == 18446181123756130303
+// opcode: sltu ; op1:x18; op2:x14; dest:x16; op1val:0xfffdffffffffffff; op2val:0x4
+TEST_RR_OP(sltu, x16, x18, x14, 0x0, 0xfffdffffffffffff, 0x4, x1, 72, x19)
+
+inst_10:
+// rs1==x9, rs2==x24, rd==x8, rs2_val == 8,
+// opcode: sltu ; op1:x9; op2:x24; dest:x8; op1val:0x6666666666666665; op2val:0x8
+TEST_RR_OP(sltu, x8, x9, x24, 0x0, 0x6666666666666665, 0x8, x1, 80, x19)
+
+inst_11:
+// rs1==x22, rs2==x9, rd==x31, rs2_val == 32, rs1_val == 36028797018963968
+// opcode: sltu ; op1:x22; op2:x9; dest:x31; op1val:0x80000000000000; op2val:0x20
+TEST_RR_OP(sltu, x31, x22, x9, 0x0, 0x80000000000000, 0x20, x1, 88, x19)
+
+inst_12:
+// rs1==x21, rs2==x13, rd==x2, rs2_val == 64, rs1_val == 18446744073709551359
+// opcode: sltu ; op1:x21; op2:x13; dest:x2; op1val:0xfffffffffffffeff; op2val:0x40
+TEST_RR_OP(sltu, x2, x21, x13, 0x0, 0xfffffffffffffeff, 0x40, x1, 96, x19)
+
+inst_13:
+// rs1==x25, rs2==x30, rd==x5, rs2_val == 128, rs1_val == 18446739675663040511
+// opcode: sltu ; op1:x25; op2:x30; dest:x5; op1val:0xfffffbffffffffff; op2val:0x80
+TEST_RR_OP(sltu, x5, x25, x30, 0x0, 0xfffffbffffffffff, 0x80, x1, 104, x19)
+
+inst_14:
+// rs1==x24, rs2==x4, rd==x11, rs2_val == 256, rs1_val == 144115188075855872
+// opcode: sltu ; op1:x24; op2:x4; dest:x11; op1val:0x200000000000000; op2val:0x100
+TEST_RR_OP(sltu, x11, x24, x4, 0x0, 0x200000000000000, 0x100, x1, 112, x19)
+
+inst_15:
+// rs1==x13, rs2==x10, rd==x27, rs2_val == 512, rs1_val == 17179869184
+// opcode: sltu ; op1:x13; op2:x10; dest:x27; op1val:0x400000000; op2val:0x200
+TEST_RR_OP(sltu, x27, x13, x10, 0x0, 0x400000000, 0x200, x1, 120, x19)
+
+inst_16:
+// rs1==x15, rs2==x6, rd==x3, rs2_val == 1024,
+// opcode: sltu ; op1:x15; op2:x6; dest:x3; op1val:0xfffffffffffffeff; op2val:0x400
+TEST_RR_OP(sltu, x3, x15, x6, 0x0, 0xfffffffffffffeff, 0x400, x1, 128, x19)
+RVTEST_SIGBASE( x16,signature_x16_0)
+
+inst_17:
+// rs1==x17, rs2==x27, rd==x10, rs2_val == 2048,
+// opcode: sltu ; op1:x17; op2:x27; dest:x10; op1val:0xfffdffffffffffff; op2val:0x800
+TEST_RR_OP(sltu, x10, x17, x27, 0x0, 0xfffdffffffffffff, 0x800, x16, 0, x12)
+
+inst_18:
+// rs1==x2, rs2==x28, rd==x1, rs2_val == 4096, rs1_val == 8388608
+// opcode: sltu ; op1:x2; op2:x28; dest:x1; op1val:0x800000; op2val:0x1000
+TEST_RR_OP(sltu, x1, x2, x28, 0x0, 0x800000, 0x1000, x16, 8, x12)
+
+inst_19:
+// rs1==x1, rs2==x26, rd==x28, rs2_val == 8192, rs1_val == 18446744073575333887
+// opcode: sltu ; op1:x1; op2:x26; dest:x28; op1val:0xfffffffff7ffffff; op2val:0x2000
+TEST_RR_OP(sltu, x28, x1, x26, 0x0, 0xfffffffff7ffffff, 0x2000, x16, 16, x12)
+
+inst_20:
+// rs1==x8, rs2==x23, rd==x14, rs2_val == 16384,
+// opcode: sltu ; op1:x8; op2:x23; dest:x14; op1val:0x2000000000000000; op2val:0x4000
+TEST_RR_OP(sltu, x14, x8, x23, 0x0, 0x2000000000000000, 0x4000, x16, 24, x12)
+
+inst_21:
+// rs1==x19, rs2==x2, rd==x20, rs2_val == 32768, rs1_val == 6148914691236517205
+// opcode: sltu ; op1:x19; op2:x2; dest:x20; op1val:0x5555555555555555; op2val:0x8000
+TEST_RR_OP(sltu, x20, x19, x2, 0x0, 0x5555555555555555, 0x8000, x16, 32, x12)
+
+inst_22:
+// rs1==x30, rs2==x21, rd==x9, rs2_val == 65536, rs1_val == 1024
+// opcode: sltu ; op1:x30; op2:x21; dest:x9; op1val:0x400; op2val:0x10000
+TEST_RR_OP(sltu, x9, x30, x21, 0x1, 0x400, 0x10000, x16, 40, x12)
+
+inst_23:
+// rs1==x6, rs2==x0, rd==x21, rs2_val == 131072, rs1_val == 2097152
+// opcode: sltu ; op1:x6; op2:x0; dest:x21; op1val:0x200000; op2val:0x0
+TEST_RR_OP(sltu, x21, x6, x0, 0x0, 0x200000, 0x0, x16, 48, x12)
+
+inst_24:
+// rs1==x27, rs2==x11, rd==x7, rs2_val == 262144, rs1_val == 9007199254740992
+// opcode: sltu ; op1:x27; op2:x11; dest:x7; op1val:0x20000000000000; op2val:0x40000
+TEST_RR_OP(sltu, x7, x27, x11, 0x0, 0x20000000000000, 0x40000, x16, 56, x12)
+
+inst_25:
+// rs1==x20, rs2==x3, rd==x17, rs2_val == 524288, rs1_val == 268435456
+// opcode: sltu ; op1:x20; op2:x3; dest:x17; op1val:0x10000000; op2val:0x80000
+TEST_RR_OP(sltu, x17, x20, x3, 0x0, 0x10000000, 0x80000, x16, 64, x12)
+
+inst_26:
+// rs1==x23, rs2==x31, rd==x22, rs2_val == 1048576, rs1_val == 18428729675200069631
+// opcode: sltu ; op1:x23; op2:x31; dest:x22; op1val:0xffbfffffffffffff; op2val:0x100000
+TEST_RR_OP(sltu, x22, x23, x31, 0x0, 0xffbfffffffffffff, 0x100000, x16, 72, x12)
+
+inst_27:
+// rs1==x28, rs2==x25, rd==x18, rs2_val == 2097152, rs1_val == 33554432
+// opcode: sltu ; op1:x28; op2:x25; dest:x18; op1val:0x2000000; op2val:0x200000
+TEST_RR_OP(sltu, x18, x28, x25, 0x0, 0x2000000, 0x200000, x16, 80, x12)
+
+inst_28:
+// rs1==x5, rs2==x19, rd==x13, rs2_val == 4194304, rs1_val == 12297829382473034410
+// opcode: sltu ; op1:x5; op2:x19; dest:x13; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x400000
+TEST_RR_OP(sltu, x13, x5, x19, 0x0, 0xaaaaaaaaaaaaaaaa, 0x400000, x16, 88, x12)
+
+inst_29:
+// rs1==x7, rs2==x1, rd==x19, rs2_val == 8388608,
+// opcode: sltu ; op1:x7; op2:x1; dest:x19; op1val:0x0; op2val:0x800000
+TEST_RR_OP(sltu, x19, x7, x1, 0x1, 0x0, 0x800000, x16, 96, x12)
+
+inst_30:
+// rs1==x3, rs2==x15, rd==x30, rs2_val == 16777216,
+// opcode: sltu ; op1:x3; op2:x15; dest:x30; op1val:0x13; op2val:0x1000000
+TEST_RR_OP(sltu, x30, x3, x15, 0x1, 0x13, 0x1000000, x16, 104, x12)
+
+inst_31:
+// rs1==x4, rs2==x8, rd==x6, rs2_val == 33554432,
+// opcode: sltu ; op1:x4; op2:x8; dest:x6; op1val:0x11; op2val:0x2000000
+TEST_RR_OP(sltu, x6, x4, x8, 0x1, 0x11, 0x2000000, x16, 112, x12)
+
+inst_32:
+// rs2_val == 67108864, rs1_val == 18445618173802708991
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffbffffffffffff; op2val:0x4000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffbffffffffffff, 0x4000000, x16, 120, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_33:
+// rs2_val == 134217728, rs1_val == 18446744073705357311
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffbfffff; op2val:0x8000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffffbfffff, 0x8000000, x1, 0, x2)
+
+inst_34:
+// rs2_val == 268435456, rs1_val == 18446743798831644671
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffbfffffffff; op2val:0x10000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffbfffffffff, 0x10000000, x1, 8, x2)
+
+inst_35:
+// rs2_val == 536870912, rs1_val == 17293822569102704639
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xefffffffffffffff; op2val:0x20000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xefffffffffffffff, 0x20000000, x1, 16, x2)
+
+inst_36:
+// rs2_val == 1073741824, rs1_val == 18446744073709551487
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffffff7f; op2val:0x40000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffffffff7f, 0x40000000, x1, 24, x2)
+
+inst_37:
+// rs2_val == 2147483648, rs1_val == 18446744073642442751
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffbffffff; op2val:0x80000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffbffffff, 0x80000000, x1, 32, x2)
+
+inst_38:
+// rs2_val == 4294967296, rs1_val == 18446744073709551613
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffffffd; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffffffffd, 0x100000000, x1, 40, x2)
+
+inst_39:
+// rs2_val == 8589934592, rs1_val == 18446744073709289471
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffbffff; op2val:0x200000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffffbffff, 0x200000000, x1, 48, x2)
+
+inst_40:
+// rs2_val == 17179869184, rs1_val == 18446744073675997183
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffdffffff; op2val:0x400000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffdffffff, 0x400000000, x1, 56, x2)
+
+inst_41:
+// rs2_val == 34359738368, rs1_val == 9223372036854775807
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffffffffffff; op2val:0x800000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x7fffffffffffffff, 0x800000000, x1, 64, x2)
+
+inst_42:
+// rs2_val == 68719476736,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:0x1000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x800, 0x1000000000, x1, 72, x2)
+
+inst_43:
+// rs2_val == 137438953472,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x2000000000, x1, 80, x2)
+
+inst_44:
+// rs2_val == 274877906944,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:0x4000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x7, 0x4000000000, x1, 88, x2)
+
+inst_45:
+// rs2_val == 549755813888,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x8000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0x8000000000, x1, 96, x2)
+
+inst_46:
+// rs2_val == 1099511627776,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x10000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x10000000000, x1, 104, x2)
+
+inst_47:
+// rs2_val == 2199023255552,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x20000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x20000000000, x1, 112, x2)
+
+inst_48:
+// rs2_val == 4398046511104, rs1_val == 18437736874454810623
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffdfffffffffffff; op2val:0x40000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffdfffffffffffff, 0x40000000000, x1, 120, x2)
+
+inst_49:
+// rs2_val == 8796093022208, rs1_val == 2199023255552
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:0x80000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x20000000000, 0x80000000000, x1, 128, x2)
+
+inst_50:
+// rs2_val == 17592186044416, rs1_val == 576460752303423488
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:0x100000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x800000000000000, 0x100000000000, x1, 136, x2)
+
+inst_51:
+// rs2_val == 35184372088832, rs1_val == 18446744073709551599
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffffffef; op2val:0x200000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffffffffef, 0x200000000000, x1, 144, x2)
+
+inst_52:
+// rs2_val == 70368744177664, rs1_val == 32
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:0x400000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x20, 0x400000000000, x1, 152, x2)
+
+inst_53:
+// rs2_val == 140737488355328,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x800000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x800000000000, x1, 160, x2)
+
+inst_54:
+// rs2_val == 281474976710656, rs1_val == 18446673704965373951
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffbfffffffffff; op2val:0x1000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffbfffffffffff, 0x1000000000000, x1, 168, x2)
+
+inst_55:
+// rs2_val == 562949953421312,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffffffd; op2val:0x2000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffffffffd, 0x2000000000000, x1, 176, x2)
+
+inst_56:
+// rs2_val == 1125899906842624, rs1_val == 16140901064495857663
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xdfffffffffffffff; op2val:0x4000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xdfffffffffffffff, 0x4000000000000, x1, 184, x2)
+
+inst_57:
+// rs2_val == 2251799813685248, rs1_val == 1048576
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0x8000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000, 0x8000000000000, x1, 192, x2)
+
+inst_58:
+// rs2_val == 4503599627370496, rs1_val == 18446744073709551103
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffffdff; op2val:0x10000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffffffdff, 0x10000000000000, x1, 200, x2)
+
+inst_59:
+// rs2_val == 9007199254740992,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x20000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x20000000000000, x1, 208, x2)
+
+inst_60:
+// rs2_val == 36028797018963968, rs1_val == 288230376151711744
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:0x80000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x400000000000000, 0x80000000000000, x1, 216, x2)
+
+inst_61:
+// rs2_val == 144115188075855872, rs1_val == 18446744073709547519
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffffefff; op2val:0x200000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffffffefff, 0x200000000000000, x1, 224, x2)
+
+inst_62:
+// rs2_val == 288230376151711744, rs1_val == 18374686479671623679
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfeffffffffffffff; op2val:0x400000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfeffffffffffffff, 0x400000000000000, x1, 232, x2)
+
+inst_63:
+// rs2_val == 576460752303423488,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xa; op2val:0x800000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xa, 0x800000000000000, x1, 240, x2)
+
+inst_64:
+// rs2_val == 1152921504606846976, rs1_val == 18446743523953737727
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffff7fffffffff; op2val:0x1000000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffff7fffffffff, 0x1000000000000000, x1, 248, x2)
+
+inst_65:
+// rs2_val == 2305843009213693952, rs1_val == 18446744073692774399
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffeffffff; op2val:0x2000000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffeffffff, 0x2000000000000000, x1, 256, x2)
+
+inst_66:
+// rs2_val == 4611686018427387904, rs1_val == 4611686018427387904
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:0x4000000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x4000000000000000, 0x4000000000000000, x1, 264, x2)
+
+inst_67:
+// rs2_val == 9223372036854775808,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfeffffffffffffff; op2val:0x8000000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfeffffffffffffff, 0x8000000000000000, x1, 272, x2)
+
+inst_68:
+// rs2_val == 18446744073709551614,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xfffffffffffffffe
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xfffffffffffffffe, x1, 280, x2)
+
+inst_69:
+// rs2_val == 18446744073709551613,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xfffffffffffffffd
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555554, 0xfffffffffffffffd, x1, 288, x2)
+
+inst_70:
+// rs2_val == 18446744073709551611,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xfffffffffffffffb
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333333, 0xfffffffffffffffb, x1, 296, x2)
+
+inst_71:
+// rs2_val == 18446744073709551607, rs1_val == 32768
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:0xfffffffffffffff7
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x8000, 0xfffffffffffffff7, x1, 304, x2)
+
+inst_72:
+// rs2_val == 18446744073709551599, rs1_val == 262144
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0xffffffffffffffef
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x40000, 0xffffffffffffffef, x1, 312, x2)
+
+inst_73:
+// rs2_val == 18446744073709551583,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xffffffffffffffdf
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xffffffffffffffdf, x1, 320, x2)
+
+inst_74:
+// rs2_val == 18446744073709551551, rs1_val == 2
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xffffffffffffffbf
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xffffffffffffffbf, x1, 328, x2)
+
+inst_75:
+// rs2_val == 18446744073709551487,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffffeff; op2val:0xffffffffffffff7f
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffffffffffffeff, 0xffffffffffffff7f, x1, 336, x2)
+
+inst_76:
+// rs2_val == 18446744073709551359, rs1_val == 4
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xfffffffffffffeff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xfffffffffffffeff, x1, 344, x2)
+
+inst_77:
+// rs2_val == 18446744073709551103, rs1_val == 274877906944
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:0xfffffffffffffdff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4000000000, 0xfffffffffffffdff, x1, 352, x2)
+
+inst_78:
+// rs2_val == 18446744073709550591, rs1_val == 67108864
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0xfffffffffffffbff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4000000, 0xfffffffffffffbff, x1, 360, x2)
+
+inst_79:
+// rs2_val == 18446744073709549567,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xfffffffffffff7ff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xfffffffffffff7ff, x1, 368, x2)
+
+inst_80:
+// rs2_val == 18446744073709547519,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:0xffffffffffffefff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x400000000000000, 0xffffffffffffefff, x1, 376, x2)
+
+inst_81:
+// rs2_val == 18446744073709543423, rs1_val == 549755813888
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0xffffffffffffdfff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x8000000000, 0xffffffffffffdfff, x1, 384, x2)
+
+inst_82:
+// rs2_val == 18446744073709535231, rs1_val == 18446742974197923839
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffeffffffffff; op2val:0xffffffffffffbfff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffffeffffffffff, 0xffffffffffffbfff, x1, 392, x2)
+
+inst_83:
+// rs2_val == 18446744073709518847, rs1_val == 18446744073709550591
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffffbff; op2val:0xffffffffffff7fff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffffffbff, 0xffffffffffff7fff, x1, 400, x2)
+
+inst_84:
+// rs2_val == 18446744073709486079,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:0xfffffffffffeffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x20000000000000, 0xfffffffffffeffff, x1, 408, x2)
+
+inst_85:
+// rs2_val == 18446744073709420543, rs1_val == 18446744073709543423
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffffdfff; op2val:0xfffffffffffdffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffffffdfff, 0xfffffffffffdffff, x1, 416, x2)
+
+inst_86:
+// rs2_val == 18446744073709289471,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0xfffffffffffbffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2000000, 0xfffffffffffbffff, x1, 424, x2)
+
+inst_87:
+// rs2_val == 18446744073709027327, rs1_val == 65536
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0xfffffffffff7ffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000, 0xfffffffffff7ffff, x1, 432, x2)
+
+inst_88:
+// rs2_val == 18446744073708503039,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffdffffffffffff; op2val:0xffffffffffefffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffdffffffffffff, 0xffffffffffefffff, x1, 440, x2)
+
+inst_89:
+// rs2_val == 18446744073707454463,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0xffffffffffdfffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xaaaaaaaaaaaaaaab, 0xffffffffffdfffff, x1, 448, x2)
+
+inst_90:
+// rs2_val == 18446744073705357311,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:0xffffffffffbfffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4000000000000000, 0xffffffffffbfffff, x1, 456, x2)
+
+inst_91:
+// rs2_val == 18446744073701163007,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffffdff; op2val:0xffffffffff7fffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffffffdff, 0xffffffffff7fffff, x1, 464, x2)
+
+inst_92:
+// rs2_val == 18446744073692774399, rs1_val == 18446741874686296063
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffdffffffffff; op2val:0xfffffffffeffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfffffdffffffffff, 0xfffffffffeffffff, x1, 472, x2)
+
+inst_93:
+// rs2_val == 18446744073675997183, rs1_val == 18446744073709535231
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffffbfff; op2val:0xfffffffffdffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffffffbfff, 0xfffffffffdffffff, x1, 480, x2)
+
+inst_94:
+// rs2_val == 18446744073642442751,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:0xfffffffffbffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x40000000000000, 0xfffffffffbffffff, x1, 488, x2)
+
+inst_95:
+// rs2_val == 18446744073575333887,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffbfffffffffff; op2val:0xfffffffff7ffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffbfffffffffff, 0xfffffffff7ffffff, x1, 496, x2)
+
+inst_96:
+// rs2_val == 18446744073441116159,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:0xffffffffefffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x400000000000000, 0xffffffffefffffff, x1, 504, x2)
+
+inst_97:
+// rs2_val == 18446744073172680703,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:0xffffffffdfffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2000000000000000, 0xffffffffdfffffff, x1, 512, x2)
+
+inst_98:
+// rs2_val == 18446744072635809791,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xffffffffbfffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666665, 0xffffffffbfffffff, x1, 520, x2)
+
+inst_99:
+// rs2_val == 18446744071562067967, rs1_val == 8192
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0xffffffff7fffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2000, 0xffffffff7fffffff, x1, 528, x2)
+
+inst_100:
+// rs2_val == 18446744069414584319, rs1_val == 17870283321406128127
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xf7ffffffffffffff; op2val:0xfffffffeffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xf7ffffffffffffff, 0xfffffffeffffffff, x1, 536, x2)
+
+inst_101:
+// rs2_val == 18446744065119617023,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x12; op2val:0xfffffffdffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x12, 0xfffffffdffffffff, x1, 544, x2)
+
+inst_102:
+// rs2_val == 18446744056529682431,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xfffffffbffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333332, 0xfffffffbffffffff, x1, 552, x2)
+
+inst_103:
+// rs2_val == 18446744039349813247, rs1_val == 16384
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:0xfffffff7ffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4000, 0xfffffff7ffffffff, x1, 560, x2)
+
+inst_104:
+// rs2_val == 18446744004990074879, rs1_val == 18410715276690587647
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xff7fffffffffffff; op2val:0xffffffefffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xff7fffffffffffff, 0xffffffefffffffff, x1, 568, x2)
+
+inst_105:
+// rs2_val == 18446743936270598143,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0xffffffdfffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0xffffffdfffffffff, x1, 576, x2)
+
+inst_106:
+// rs2_val == 18446743798831644671,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xffffffbfffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xffffffbfffffffff, x1, 584, x2)
+
+inst_107:
+// rs2_val == 18446743523953737727,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xffffff7fffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xffffff7fffffffff, x1, 592, x2)
+
+inst_108:
+// rs2_val == 18446741874686296063,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xfffffdffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333332, 0xfffffdffffffffff, x1, 600, x2)
+
+inst_109:
+// rs2_val == 18446739675663040511,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xfffffbffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666666, 0xfffffbffffffffff, x1, 608, x2)
+
+inst_110:
+// rs2_val == 18446735277616529407,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xfffff7ffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333334, 0xfffff7ffffffffff, x1, 616, x2)
+
+inst_111:
+// rs2_val == 18446726481523507199, rs1_val == 524288
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0xffffefffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x80000, 0xffffefffffffffff, x1, 624, x2)
+
+inst_112:
+// rs2_val == 18446708889337462783, rs1_val == 18446744073709551583
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffffffdf; op2val:0xffffdfffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffffffffdf, 0xffffdfffffffffff, x1, 632, x2)
+
+inst_113:
+// rs2_val == 18446673704965373951,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:0xffffbfffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x8000, 0xffffbfffffffffff, x1, 640, x2)
+
+inst_114:
+// rs2_val == 18446603336221196287,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xff7fffffffffffff; op2val:0xffff7fffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xff7fffffffffffff, 0xffff7fffffffffff, x1, 648, x2)
+
+inst_115:
+// rs2_val == 18446462598732840959,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffffdfff; op2val:0xfffeffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffffffdfff, 0xfffeffffffffffff, x1, 656, x2)
+
+inst_116:
+// rs2_val == 18446181123756130303,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x11; op2val:0xfffdffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x11, 0xfffdffffffffffff, x1, 664, x2)
+
+inst_117:
+// rs2_val == 18445618173802708991,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffbfffffffff; op2val:0xfffbffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffbfffffffff, 0xfffbffffffffffff, x1, 672, x2)
+
+inst_118:
+// rs2_val == 18444492273895866367, rs1_val == 18446744056529682431
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffbffffffff; op2val:0xfff7ffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffbffffffff, 0xfff7ffffffffffff, x1, 680, x2)
+
+inst_119:
+// rs2_val == 18442240474082181119,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0xffefffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xaaaaaaaaaaaaaaab, 0xffefffffffffffff, x1, 688, x2)
+
+inst_120:
+// rs2_val == 18437736874454810623,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xffdfffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555556, 0xffdfffffffffffff, x1, 696, x2)
+
+inst_121:
+// rs2_val == 18428729675200069631,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xc; op2val:0xffbfffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xc, 0xffbfffffffffffff, x1, 704, x2)
+
+inst_122:
+// rs2_val == 18410715276690587647, rs1_val == 18302628885633695743
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfdffffffffffffff; op2val:0xff7fffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfdffffffffffffff, 0xff7fffffffffffff, x1, 712, x2)
+
+inst_123:
+// rs2_val == 18374686479671623679,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffffdfff; op2val:0xfeffffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffffffdfff, 0xfeffffffffffffff, x1, 720, x2)
+
+inst_124:
+// rs2_val == 18302628885633695743, rs1_val == 18446744073709551607
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffffff7; op2val:0xfdffffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffffffff7, 0xfdffffffffffffff, x1, 728, x2)
+
+inst_125:
+// rs2_val == 18158513697557839871,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:0xfbffffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4000000000, 0xfbffffffffffffff, x1, 736, x2)
+
+inst_126:
+// rs2_val == 17870283321406128127,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0xf7ffffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x8000000000, 0xf7ffffffffffffff, x1, 744, x2)
+
+inst_127:
+// rs2_val == 17293822569102704639,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xd; op2val:0xefffffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xd, 0xefffffffffffffff, x1, 752, x2)
+
+inst_128:
+// rs2_val == 16140901064495857663,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:0xdfffffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x800, 0xdfffffffffffffff, x1, 760, x2)
+
+inst_129:
+// rs2_val == 13835058055282163711,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0xbfffffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x40000, 0xbfffffffffffffff, x1, 768, x2)
+
+inst_130:
+// rs2_val == 9223372036854775807, rs1_val == 18446744073709518847
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffff7fff; op2val:0x7fffffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffffff7fff, 0x7fffffffffffffff, x1, 776, x2)
+
+inst_131:
+// rs2_val == 6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffffdfff; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffffffdfff, 0x5555555555555555, x1, 784, x2)
+
+inst_132:
+// rs2_val == 12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffffdff; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffffffdff, 0xaaaaaaaaaaaaaaaa, x1, 792, x2)
+
+inst_133:
+// rs1_val == 8,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0x400000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x8, 0x400000000000, x1, 800, x2)
+
+inst_134:
+// rs1_val == 16,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10, 0x3333333333333333, x1, 808, x2)
+
+inst_135:
+// rs1_val == 64,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0x8000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x40, 0x8000000000000, x1, 816, x2)
+
+inst_136:
+// rs1_val == 128,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0xffffffffffbfffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x80, 0xffffffffffbfffff, x1, 824, x2)
+
+inst_137:
+// rs1_val == 256,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:0x20000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100, 0x20000000, x1, 832, x2)
+
+inst_138:
+// rs1_val == 512,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:0x1000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x200, 0x1000000000000, x1, 840, x2)
+
+inst_139:
+// rs1_val == 4096,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0xf7ffffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1000, 0xf7ffffffffffffff, x1, 848, x2)
+
+inst_140:
+// rs1_val == 131072,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0xffffffefffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x20000, 0xffffffefffffffff, x1, 856, x2)
+
+inst_141:
+// rs1_val == 4194304,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x40000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x400000, 0x40000, x1, 864, x2)
+
+inst_142:
+// rs1_val == 16777216,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0xffffffffffffefff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1000000, 0xffffffffffffefff, x1, 872, x2)
+
+inst_143:
+// rs1_val == 134217728,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0xffffffffffffffef
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x8000000, 0xffffffffffffffef, x1, 880, x2)
+
+inst_144:
+// rs1_val == 536870912,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x20000000, 0xaaaaaaaaaaaaaaaa, x1, 888, x2)
+
+inst_145:
+// rs1_val == 1073741824,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x40000000, 0x4, x1, 896, x2)
+
+inst_146:
+// rs1_val == 2147483648,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0x20000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x80000000, 0x20000000, x1, 904, x2)
+
+inst_147:
+// rs1_val == 4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x800000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0x800000000, x1, 912, x2)
+
+inst_148:
+// rs1_val == 8589934592,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:0xfffffeffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x200000000, 0xfffffeffffffffff, x1, 920, x2)
+
+inst_149:
+// rs1_val == 34359738368,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:0x1000000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x800000000, 0x1000000000000000, x1, 928, x2)
+
+inst_150:
+// rs1_val == 68719476736,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:0xd
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x1000000000, 0xd, x1, 936, x2)
+
+inst_151:
+// rs1_val == 137438953472,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:0xffffffffffbfffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2000000000, 0xffffffffffbfffff, x1, 944, x2)
+
+inst_152:
+// rs1_val == 1099511627776,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x2000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x10000000000, 0x2000000, x1, 952, x2)
+
+inst_153:
+// rs1_val == 4398046511104,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:0x100000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x40000000000, 0x100000, x1, 960, x2)
+
+inst_154:
+// rs1_val == 8796093022208,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x80000000000, 0x3333333333333332, x1, 968, x2)
+
+inst_155:
+// rs1_val == 17592186044416,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:0x800
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000000000, 0x800, x1, 976, x2)
+
+inst_156:
+// rs1_val == 35184372088832,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:0x1000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x200000000000, 0x1000000000, x1, 984, x2)
+
+inst_157:
+// rs1_val == 70368744177664,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:0x100000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x400000000000, 0x100000000000, x1, 992, x2)
+
+inst_158:
+// rs1_val == 140737488355328,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:0x800
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x800000000000, 0x800, x1, 1000, x2)
+
+inst_159:
+// rs1_val == 281474976710656,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0xfffeffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1000000000000, 0xfffeffffffffffff, x1, 1008, x2)
+
+inst_160:
+// rs1_val == 562949953421312,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:0xf
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x2000000000000, 0xf, x1, 1016, x2)
+
+inst_161:
+// rs1_val == 1125899906842624,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:0x200000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4000000000000, 0x200000000000000, x1, 1024, x2)
+
+inst_162:
+// rs1_val == 2251799813685248,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:0x100000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x8000000000000, 0x100000, x1, 1032, x2)
+
+inst_163:
+// rs1_val == 4503599627370496,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:0xfffffffffffffdff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x10000000000000, 0xfffffffffffffdff, x1, 1040, x2)
+
+inst_164:
+// rs1_val == 72057594037927936,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:0xfffffdffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000000000, 0xfffffdffffffffff, x1, 1048, x2)
+
+inst_165:
+// rs1_val == 9223372036854775808,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000000; op2val:0x8000000000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x8000000000000000, 0x8000000000000000, x1, 1056, x2)
+
+inst_166:
+// rs1_val == 18446744073709551614,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffffffe; op2val:0x200000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffffffffe, 0x200000000, x1, 1064, x2)
+
+inst_167:
+// rs1_val == 18446744073709551611,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffffffb; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffffffffb, 0x6, x1, 1072, x2)
+
+inst_168:
+// rs1_val == 18446744073709551551,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffffffbf; op2val:0xfffffffffffffffd
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffffffffffbf, 0xfffffffffffffffd, x1, 1080, x2)
+
+inst_169:
+// rs1_val == 18446744073709549567,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffff7ff; op2val:0xffff7fffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffffff7ff, 0xffff7fffffffffff, x1, 1088, x2)
+
+inst_170:
+// rs1_val == 18446744073709486079,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffeffff; op2val:0xfdffffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffffeffff, 0xfdffffffffffffff, x1, 1096, x2)
+
+inst_171:
+// rs1_val == 18446744073709420543,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffffdffff; op2val:0x9
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffffdffff, 0x9, x1, 1104, x2)
+
+inst_172:
+// rs1_val == 18446744073709027327,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffffff7ffff; op2val:0x100000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffffff7ffff, 0x100000, x1, 1112, x2)
+
+inst_173:
+// rs1_val == 18446744073708503039,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffefffff; op2val:0x100
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffffefffff, 0x100, x1, 1120, x2)
+
+inst_174:
+// rs1_val == 18446744073707454463,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffffdfffff; op2val:0x10000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffffdfffff, 0x10000000000, x1, 1128, x2)
+
+inst_175:
+// rs1_val == 18446744073701163007,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffff7fffff; op2val:0xfffdffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffff7fffff, 0xfffdffffffffffff, x1, 1136, x2)
+
+inst_176:
+// rs1_val == 18446744073441116159,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffefffffff; op2val:0xfeffffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffefffffff, 0xfeffffffffffffff, x1, 1144, x2)
+
+inst_177:
+// rs1_val == 18446744073172680703,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffdfffffff; op2val:0x200000000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffffdfffffff, 0x200000000000, x1, 1152, x2)
+
+inst_178:
+// rs1_val == 18446744072635809791,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffffbfffffff; op2val:0xffffffffffefffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffffbfffffff, 0xffffffffffefffff, x1, 1160, x2)
+
+inst_179:
+// rs1_val == 18446744071562067967,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff7fffffff; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffff7fffffff, 0x4, x1, 1168, x2)
+
+inst_180:
+// rs1_val == 18446744069414584319,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffeffffffff; op2val:0x10
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffeffffffff, 0x10, x1, 1176, x2)
+
+inst_181:
+// rs1_val == 18446744065119617023,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffffdffffffff; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffffdffffffff, 0x6, x1, 1184, x2)
+
+inst_182:
+// rs1_val == 18446744039349813247,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffffff7ffffffff; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffffff7ffffffff, 0x6666666666666665, x1, 1192, x2)
+
+inst_183:
+// rs1_val == 18446744004990074879,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffefffffffff; op2val:0x20000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffefffffffff, 0x20000000, x1, 1200, x2)
+
+inst_184:
+// rs1_val == 18446743936270598143,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffdfffffffff; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffdfffffffff, 0xaaaaaaaaaaaaaaa9, x1, 1208, x2)
+
+inst_185:
+// rs1_val == 18446735277616529407,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffff7ffffffffff; op2val:0xff7fffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffff7ffffffffff, 0xff7fffffffffffff, x1, 1216, x2)
+
+inst_186:
+// rs1_val == 18446726481523507199,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffefffffffffff; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffefffffffffff, 0x2, x1, 1224, x2)
+
+inst_187:
+// rs1_val == 18446708889337462783,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffdfffffffffff; op2val:0x200
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffdfffffffffff, 0x200, x1, 1232, x2)
+
+inst_188:
+// rs1_val == 18446603336221196287,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffff7fffffffffff; op2val:0x7
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffff7fffffffffff, 0x7, x1, 1240, x2)
+
+inst_189:
+// rs1_val == 18446462598732840959,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfffeffffffffffff; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfffeffffffffffff, 0xb504f332, x1, 1248, x2)
+
+inst_190:
+// rs1_val == 18444492273895866367,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfff7ffffffffffff; op2val:0xfffffffeffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xfff7ffffffffffff, 0xfffffffeffffffff, x1, 1256, x2)
+
+inst_191:
+// rs1_val == 18442240474082181119,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffefffffffffffff; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffefffffffffffff, 0x2, x1, 1264, x2)
+
+inst_192:
+// rs1_val == 18158513697557839871,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xfbffffffffffffff; op2val:0xf7ffffffffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xfbffffffffffffff, 0xf7ffffffffffffff, x1, 1272, x2)
+
+inst_193:
+// rs1_val == 13835058055282163711,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xbfffffffffffffff; op2val:0xfffffffffffffeff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xbfffffffffffffff, 0xfffffffffffffeff, x1, 1280, x2)
+
+inst_194:
+// rs1_val==3 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3, 0x3, x1, 1288, x2)
+
+inst_195:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x5555555555555555, x1, 1296, x2)
+
+inst_196:
+// rs1_val==3 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xaaaaaaaaaaaaaaaa, x1, 1304, x2)
+
+inst_197:
+// rs1_val==3 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x5, x1, 1312, x2)
+
+inst_198:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x3333333333333333, x1, 1320, x2)
+
+inst_199:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x6666666666666666, x1, 1328, x2)
+
+inst_200:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xb504f333, x1, 1336, x2)
+
+inst_201:
+// rs1_val==3 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3, 0x0, x1, 1344, x2)
+
+inst_202:
+// rs1_val==3 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x100000000, x1, 1352, x2)
+
+inst_203:
+// rs1_val==3 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3, 0x2, x1, 1360, x2)
+
+inst_204:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x5555555555555554, x1, 1368, x2)
+
+inst_205:
+// rs1_val==3 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xaaaaaaaaaaaaaaa9, x1, 1376, x2)
+
+inst_206:
+// rs1_val==3 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x4, x1, 1384, x2)
+
+inst_207:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x3333333333333332, x1, 1392, x2)
+
+inst_208:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x6666666666666665, x1, 1400, x2)
+
+inst_209:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xb504f332, x1, 1408, x2)
+
+inst_210:
+// rs1_val==3 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xffffffff, x1, 1416, x2)
+
+inst_211:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x5555555555555556, x1, 1424, x2)
+
+inst_212:
+// rs1_val==3 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xaaaaaaaaaaaaaaab, x1, 1432, x2)
+
+inst_213:
+// rs1_val==3 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x6, x1, 1440, x2)
+
+inst_214:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x3333333333333334, x1, 1448, x2)
+
+inst_215:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x6666666666666667, x1, 1456, x2)
+
+inst_216:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0xb504f334, x1, 1464, x2)
+
+inst_217:
+// rs1_val==3 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3, 0x1, x1, 1472, x2)
+
+inst_218:
+// rs1_val==3 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3, 0x100000001, x1, 1480, x2)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x3, x1, 1488, x2)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x5555555555555555, x1, 1496, x2)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555555, 0xaaaaaaaaaaaaaaaa, x1, 1504, x2)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x5, x1, 1512, x2)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x3333333333333333, x1, 1520, x2)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555555, 0x6666666666666666, x1, 1528, x2)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0xb504f333, x1, 1536, x2)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x0, x1, 1544, x2)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x100000000, x1, 1552, x2)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x2, x1, 1560, x2)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x5555555555555554, x1, 1568, x2)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555555, 0xaaaaaaaaaaaaaaa9, x1, 1576, x2)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x4, x1, 1584, x2)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x3333333333333332, x1, 1592, x2)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555555, 0x6666666666666665, x1, 1600, x2)
+
+inst_234:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0xb504f332, x1, 1608, x2)
+
+inst_235:
+// rs1_val==6148914691236517205 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0xffffffff, x1, 1616, x2)
+
+inst_236:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555555, 0x5555555555555556, x1, 1624, x2)
+
+inst_237:
+// rs1_val==6148914691236517205 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555555, 0xaaaaaaaaaaaaaaab, x1, 1632, x2)
+
+inst_238:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x6, x1, 1640, x2)
+
+inst_239:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x3333333333333334, x1, 1648, x2)
+
+inst_240:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555555, 0x6666666666666667, x1, 1656, x2)
+
+inst_241:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0xb504f334, x1, 1664, x2)
+
+inst_242:
+// rs1_val==6148914691236517205 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x1, x1, 1672, x2)
+
+inst_243:
+// rs1_val==6148914691236517205 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555555, 0x100000001, x1, 1680, x2)
+
+inst_244:
+// rs1_val==12297829382473034410 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x3, x1, 1688, x2)
+
+inst_245:
+// rs1_val==12297829382473034410 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x5555555555555555, x1, 1696, x2)
+
+inst_246:
+// rs1_val==12297829382473034410 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0xaaaaaaaaaaaaaaaa, x1, 1704, x2)
+
+inst_247:
+// rs1_val==12297829382473034410 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x5, x1, 1712, x2)
+
+inst_248:
+// rs1_val==12297829382473034410 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x3333333333333333, x1, 1720, x2)
+
+inst_249:
+// rs1_val==12297829382473034410 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x6666666666666666, x1, 1728, x2)
+
+inst_250:
+// rs1_val==12297829382473034410 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0xb504f333, x1, 1736, x2)
+
+inst_251:
+// rs1_val==12297829382473034410 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x0, x1, 1744, x2)
+
+inst_252:
+// rs1_val==12297829382473034410 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x100000000, x1, 1752, x2)
+
+inst_253:
+// rs1_val==12297829382473034410 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x2, x1, 1760, x2)
+
+inst_254:
+// rs1_val==12297829382473034410 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x5555555555555554, x1, 1768, x2)
+
+inst_255:
+// rs1_val==12297829382473034410 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0xaaaaaaaaaaaaaaa9, x1, 1776, x2)
+
+inst_256:
+// rs1_val==12297829382473034410 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x4, x1, 1784, x2)
+
+inst_257:
+// rs1_val==12297829382473034410 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x3333333333333332, x1, 1792, x2)
+
+inst_258:
+// rs1_val==12297829382473034410 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x6666666666666665, x1, 1800, x2)
+
+inst_259:
+// rs1_val==12297829382473034410 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0xb504f332, x1, 1808, x2)
+
+inst_260:
+// rs1_val==12297829382473034410 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0xffffffff, x1, 1816, x2)
+
+inst_261:
+// rs1_val==12297829382473034410 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x5555555555555556, x1, 1824, x2)
+
+inst_262:
+// rs1_val==12297829382473034410 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xaaaaaaaaaaaaaaaa, 0xaaaaaaaaaaaaaaab, x1, 1832, x2)
+
+inst_263:
+// rs1_val==12297829382473034410 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x6, x1, 1840, x2)
+
+inst_264:
+// rs1_val==12297829382473034410 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x3333333333333334, x1, 1848, x2)
+
+inst_265:
+// rs1_val==12297829382473034410 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x6666666666666667, x1, 1856, x2)
+
+inst_266:
+// rs1_val==12297829382473034410 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0xb504f334, x1, 1864, x2)
+
+inst_267:
+// rs1_val==12297829382473034410 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x1, x1, 1872, x2)
+
+inst_268:
+// rs1_val==12297829382473034410 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaaa; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaaa, 0x100000001, x1, 1880, x2)
+
+inst_269:
+// rs1_val==5 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5, 0x3, x1, 1888, x2)
+
+inst_270:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x5555555555555555, x1, 1896, x2)
+
+inst_271:
+// rs1_val==5 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xaaaaaaaaaaaaaaaa, x1, 1904, x2)
+
+inst_272:
+// rs1_val==5 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5, 0x5, x1, 1912, x2)
+
+inst_273:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x3333333333333333, x1, 1920, x2)
+
+inst_274:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x6666666666666666, x1, 1928, x2)
+
+inst_275:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xb504f333, x1, 1936, x2)
+
+inst_276:
+// rs1_val==5 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5, 0x0, x1, 1944, x2)
+
+inst_277:
+// rs1_val==5 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x100000000, x1, 1952, x2)
+
+inst_278:
+// rs1_val==5 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5, 0x2, x1, 1960, x2)
+
+inst_279:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x5555555555555554, x1, 1968, x2)
+
+inst_280:
+// rs1_val==5 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xaaaaaaaaaaaaaaa9, x1, 1976, x2)
+
+inst_281:
+// rs1_val==5 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5, 0x4, x1, 1984, x2)
+
+inst_282:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x3333333333333332, x1, 1992, x2)
+
+inst_283:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x6666666666666665, x1, 2000, x2)
+
+inst_284:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xb504f332, x1, 2008, x2)
+
+inst_285:
+// rs1_val==5 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xffffffff, x1, 2016, x2)
+
+inst_286:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x5555555555555556, x1, 2024, x2)
+
+inst_287:
+// rs1_val==5 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xaaaaaaaaaaaaaaab, x1, 2032, x2)
+
+inst_288:
+// rs1_val==5 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x6, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_3)
+
+inst_289:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x3333333333333334, x1, 0, x2)
+
+inst_290:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x6666666666666667, x1, 8, x2)
+
+inst_291:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0xb504f334, x1, 16, x2)
+
+inst_292:
+// rs1_val==5 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5, 0x1, x1, 24, x2)
+
+inst_293:
+// rs1_val==5 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5, 0x100000001, x1, 32, x2)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0x3, x1, 40, x2)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333333, 0x5555555555555555, x1, 48, x2)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333333, 0xaaaaaaaaaaaaaaaa, x1, 56, x2)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0x5, x1, 64, x2)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0x3333333333333333, x1, 72, x2)
+
+inst_299:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333333, 0x6666666666666666, x1, 80, x2)
+
+inst_300:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0xb504f333, x1, 88, x2)
+
+inst_301:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0x0, x1, 96, x2)
+
+inst_302:
+// rs1_val==3689348814741910323 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0x100000000, x1, 104, x2)
+
+inst_303:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0x2, x1, 112, x2)
+
+inst_304:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333333, 0x5555555555555554, x1, 120, x2)
+
+inst_305:
+// rs1_val==3689348814741910323 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333333, 0xaaaaaaaaaaaaaaa9, x1, 128, x2)
+
+inst_306:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0x4, x1, 136, x2)
+
+inst_307:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0x3333333333333332, x1, 144, x2)
+
+inst_308:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333333, 0x6666666666666665, x1, 152, x2)
+
+inst_309:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0xb504f332, x1, 160, x2)
+
+inst_310:
+// rs1_val==3689348814741910323 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0xffffffff, x1, 168, x2)
+
+inst_311:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333333, 0x5555555555555556, x1, 176, x2)
+
+inst_312:
+// rs1_val==3689348814741910323 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333333, 0xaaaaaaaaaaaaaaab, x1, 184, x2)
+
+inst_313:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0x6, x1, 192, x2)
+
+inst_314:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333333, 0x3333333333333334, x1, 200, x2)
+
+inst_315:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333333, 0x6666666666666667, x1, 208, x2)
+
+inst_316:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0xb504f334, x1, 216, x2)
+
+inst_317:
+// rs1_val==3689348814741910323 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0x1, x1, 224, x2)
+
+inst_318:
+// rs1_val==3689348814741910323 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333333, 0x100000001, x1, 232, x2)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x3, x1, 240, x2)
+
+inst_320:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x5555555555555555, x1, 248, x2)
+
+inst_321:
+// rs1_val==7378697629483820646 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666666, 0xaaaaaaaaaaaaaaaa, x1, 256, x2)
+
+inst_322:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x5, x1, 264, x2)
+
+inst_323:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x3333333333333333, x1, 272, x2)
+
+inst_324:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x6666666666666666, x1, 280, x2)
+
+inst_325:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0xb504f333, x1, 288, x2)
+
+inst_326:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x0, x1, 296, x2)
+
+inst_327:
+// rs1_val==7378697629483820646 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x100000000, x1, 304, x2)
+
+inst_328:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x2, x1, 312, x2)
+
+inst_329:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x5555555555555554, x1, 320, x2)
+
+inst_330:
+// rs1_val==7378697629483820646 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666666, 0xaaaaaaaaaaaaaaa9, x1, 328, x2)
+
+inst_331:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x4, x1, 336, x2)
+
+inst_332:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x3333333333333332, x1, 344, x2)
+
+inst_333:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x6666666666666665, x1, 352, x2)
+
+inst_334:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0xb504f332, x1, 360, x2)
+
+inst_335:
+// rs1_val==7378697629483820646 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0xffffffff, x1, 368, x2)
+
+inst_336:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x5555555555555556, x1, 376, x2)
+
+inst_337:
+// rs1_val==7378697629483820646 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666666, 0xaaaaaaaaaaaaaaab, x1, 384, x2)
+
+inst_338:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x6, x1, 392, x2)
+
+inst_339:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x3333333333333334, x1, 400, x2)
+
+inst_340:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666666, 0x6666666666666667, x1, 408, x2)
+
+inst_341:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0xb504f334, x1, 416, x2)
+
+inst_342:
+// rs1_val==7378697629483820646 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x1, x1, 424, x2)
+
+inst_343:
+// rs1_val==7378697629483820646 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666666, 0x100000001, x1, 432, x2)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f333, 0x3, x1, 440, x2)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0x5555555555555555, x1, 448, x2)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0xaaaaaaaaaaaaaaaa, x1, 456, x2)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f333, 0x5, x1, 464, x2)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0x3333333333333333, x1, 472, x2)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0x6666666666666666, x1, 480, x2)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f333, 0xb504f333, x1, 488, x2)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f333, 0x0, x1, 496, x2)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0x100000000, x1, 504, x2)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f333, 0x2, x1, 512, x2)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0x5555555555555554, x1, 520, x2)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0xaaaaaaaaaaaaaaa9, x1, 528, x2)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f333, 0x4, x1, 536, x2)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0x3333333333333332, x1, 544, x2)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0x6666666666666665, x1, 552, x2)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f333, 0xb504f332, x1, 560, x2)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0xffffffff, x1, 568, x2)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0x5555555555555556, x1, 576, x2)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0xaaaaaaaaaaaaaaab, x1, 584, x2)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f333, 0x6, x1, 592, x2)
+
+inst_364:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0x3333333333333334, x1, 600, x2)
+
+inst_365:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0x6666666666666667, x1, 608, x2)
+
+inst_366:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0xb504f334, x1, 616, x2)
+
+inst_367:
+// rs1_val==3037000499 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f333, 0x1, x1, 624, x2)
+
+inst_368:
+// rs1_val==3037000499 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f333, 0x100000001, x1, 632, x2)
+
+inst_369:
+// rs1_val==0 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x3, x1, 640, x2)
+
+inst_370:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x5555555555555555, x1, 648, x2)
+
+inst_371:
+// rs1_val==0 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xaaaaaaaaaaaaaaaa, x1, 656, x2)
+
+inst_372:
+// rs1_val==0 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x5, x1, 664, x2)
+
+inst_373:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x3333333333333333, x1, 672, x2)
+
+inst_374:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x6666666666666666, x1, 680, x2)
+
+inst_375:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xb504f333, x1, 688, x2)
+
+inst_376:
+// rs1_val==0 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x0, 0x0, x1, 696, x2)
+
+inst_377:
+// rs1_val==0 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x100000000, x1, 704, x2)
+
+inst_378:
+// rs1_val==0 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x2, x1, 712, x2)
+
+inst_379:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x5555555555555554, x1, 720, x2)
+
+inst_380:
+// rs1_val==0 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xaaaaaaaaaaaaaaa9, x1, 728, x2)
+
+inst_381:
+// rs1_val==0 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x4, x1, 736, x2)
+
+inst_382:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x3333333333333332, x1, 744, x2)
+
+inst_383:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x6666666666666665, x1, 752, x2)
+
+inst_384:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xb504f332, x1, 760, x2)
+
+inst_385:
+// rs1_val==0 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xffffffff, x1, 768, x2)
+
+inst_386:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x5555555555555556, x1, 776, x2)
+
+inst_387:
+// rs1_val==0 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xaaaaaaaaaaaaaaab, x1, 784, x2)
+
+inst_388:
+// rs1_val==0 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x6, x1, 792, x2)
+
+inst_389:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x3333333333333334, x1, 800, x2)
+
+inst_390:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x6666666666666667, x1, 808, x2)
+
+inst_391:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0xb504f334, x1, 816, x2)
+
+inst_392:
+// rs1_val==0 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x0, 0x100000001, x1, 824, x2)
+
+inst_393:
+// rs1_val==4294967296 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000000, 0x3, x1, 832, x2)
+
+inst_394:
+// rs1_val==4294967296 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0x5555555555555555, x1, 840, x2)
+
+inst_395:
+// rs1_val==4294967296 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0xaaaaaaaaaaaaaaaa, x1, 848, x2)
+
+inst_396:
+// rs1_val==4294967296 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000000, 0x5, x1, 856, x2)
+
+inst_397:
+// rs1_val==4294967296 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0x3333333333333333, x1, 864, x2)
+
+inst_398:
+// rs1_val==4294967296 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0x6666666666666666, x1, 872, x2)
+
+inst_399:
+// rs1_val==4294967296 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000000, 0xb504f333, x1, 880, x2)
+
+inst_400:
+// rs1_val==4294967296 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000000, 0x0, x1, 888, x2)
+
+inst_401:
+// rs1_val==4294967296 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000000, 0x100000000, x1, 896, x2)
+
+inst_402:
+// rs1_val==4294967296 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000000, 0x2, x1, 904, x2)
+
+inst_403:
+// rs1_val==4294967296 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0x5555555555555554, x1, 912, x2)
+
+inst_404:
+// rs1_val==4294967296 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0xaaaaaaaaaaaaaaa9, x1, 920, x2)
+
+inst_405:
+// rs1_val==4294967296 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000000, 0x4, x1, 928, x2)
+
+inst_406:
+// rs1_val==4294967296 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0x3333333333333332, x1, 936, x2)
+
+inst_407:
+// rs1_val==4294967296 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0x6666666666666665, x1, 944, x2)
+
+inst_408:
+// rs1_val==4294967296 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000000, 0xb504f332, x1, 952, x2)
+
+inst_409:
+// rs1_val==4294967296 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000000, 0xffffffff, x1, 960, x2)
+
+inst_410:
+// rs1_val==4294967296 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0x5555555555555556, x1, 968, x2)
+
+inst_411:
+// rs1_val==4294967296 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0xaaaaaaaaaaaaaaab, x1, 976, x2)
+
+inst_412:
+// rs1_val==4294967296 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000000, 0x6, x1, 984, x2)
+
+inst_413:
+// rs1_val==4294967296 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0x3333333333333334, x1, 992, x2)
+
+inst_414:
+// rs1_val==4294967296 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0x6666666666666667, x1, 1000, x2)
+
+inst_415:
+// rs1_val==4294967296 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000000, 0xb504f334, x1, 1008, x2)
+
+inst_416:
+// rs1_val==4294967296 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000000, 0x1, x1, 1016, x2)
+
+inst_417:
+// rs1_val==4294967296 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000000, 0x100000001, x1, 1024, x2)
+
+inst_418:
+// rs1_val==2 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x3, x1, 1032, x2)
+
+inst_419:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x5555555555555555, x1, 1040, x2)
+
+inst_420:
+// rs1_val==2 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xaaaaaaaaaaaaaaaa, x1, 1048, x2)
+
+inst_421:
+// rs1_val==2 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x5, x1, 1056, x2)
+
+inst_422:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x3333333333333333, x1, 1064, x2)
+
+inst_423:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x6666666666666666, x1, 1072, x2)
+
+inst_424:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xb504f333, x1, 1080, x2)
+
+inst_425:
+// rs1_val==2 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x2, 0x0, x1, 1088, x2)
+
+inst_426:
+// rs1_val==2 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x100000000, x1, 1096, x2)
+
+inst_427:
+// rs1_val==2 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x2, 0x2, x1, 1104, x2)
+
+inst_428:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x5555555555555554, x1, 1112, x2)
+
+inst_429:
+// rs1_val==2 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xaaaaaaaaaaaaaaa9, x1, 1120, x2)
+
+inst_430:
+// rs1_val==2 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x4, x1, 1128, x2)
+
+inst_431:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x3333333333333332, x1, 1136, x2)
+
+inst_432:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x6666666666666665, x1, 1144, x2)
+
+inst_433:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xb504f332, x1, 1152, x2)
+
+inst_434:
+// rs1_val==2 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xffffffff, x1, 1160, x2)
+
+inst_435:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x5555555555555556, x1, 1168, x2)
+
+inst_436:
+// rs1_val==2 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xaaaaaaaaaaaaaaab, x1, 1176, x2)
+
+inst_437:
+// rs1_val==2 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x6, x1, 1184, x2)
+
+inst_438:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x3333333333333334, x1, 1192, x2)
+
+inst_439:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x6666666666666667, x1, 1200, x2)
+
+inst_440:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0xb504f334, x1, 1208, x2)
+
+inst_441:
+// rs1_val==2 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x2, 0x1, x1, 1216, x2)
+
+inst_442:
+// rs1_val==2 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x2, 0x100000001, x1, 1224, x2)
+
+inst_443:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0x3, x1, 1232, x2)
+
+inst_444:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555554, 0x5555555555555555, x1, 1240, x2)
+
+inst_445:
+// rs1_val==6148914691236517204 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555554, 0xaaaaaaaaaaaaaaaa, x1, 1248, x2)
+
+inst_446:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0x5, x1, 1256, x2)
+
+inst_447:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0x3333333333333333, x1, 1264, x2)
+
+inst_448:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555554, 0x6666666666666666, x1, 1272, x2)
+
+inst_449:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0xb504f333, x1, 1280, x2)
+
+inst_450:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0x0, x1, 1288, x2)
+
+inst_451:
+// rs1_val==6148914691236517204 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0x100000000, x1, 1296, x2)
+
+inst_452:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0x2, x1, 1304, x2)
+
+inst_453:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0x5555555555555554, x1, 1312, x2)
+
+inst_454:
+// rs1_val==6148914691236517204 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555554, 0xaaaaaaaaaaaaaaa9, x1, 1320, x2)
+
+inst_455:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0x4, x1, 1328, x2)
+
+inst_456:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0x3333333333333332, x1, 1336, x2)
+
+inst_457:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555554, 0x6666666666666665, x1, 1344, x2)
+
+inst_458:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0xb504f332, x1, 1352, x2)
+
+inst_459:
+// rs1_val==6148914691236517204 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0xffffffff, x1, 1360, x2)
+
+inst_460:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555554, 0x5555555555555556, x1, 1368, x2)
+
+inst_461:
+// rs1_val==6148914691236517204 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555554, 0xaaaaaaaaaaaaaaab, x1, 1376, x2)
+
+inst_462:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0x6, x1, 1384, x2)
+
+inst_463:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0x3333333333333334, x1, 1392, x2)
+
+inst_464:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555554, 0x6666666666666667, x1, 1400, x2)
+
+inst_465:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0xb504f334, x1, 1408, x2)
+
+inst_466:
+// rs1_val==6148914691236517204 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555554, 0x100000001, x1, 1416, x2)
+
+inst_467:
+// rs1_val==12297829382473034409 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x3, x1, 1424, x2)
+
+inst_468:
+// rs1_val==12297829382473034409 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x5555555555555555, x1, 1432, x2)
+
+inst_469:
+// rs1_val==12297829382473034409 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xaaaaaaaaaaaaaaa9, 0xaaaaaaaaaaaaaaaa, x1, 1440, x2)
+
+inst_470:
+// rs1_val==12297829382473034409 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x5, x1, 1448, x2)
+
+inst_471:
+// rs1_val==12297829382473034409 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x3333333333333333, x1, 1456, x2)
+
+inst_472:
+// rs1_val==12297829382473034409 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x6666666666666666, x1, 1464, x2)
+
+inst_473:
+// rs1_val==12297829382473034409 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0xb504f333, x1, 1472, x2)
+
+inst_474:
+// rs1_val==12297829382473034409 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x0, x1, 1480, x2)
+
+inst_475:
+// rs1_val==12297829382473034409 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x100000000, x1, 1488, x2)
+
+inst_476:
+// rs1_val==12297829382473034409 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x2, x1, 1496, x2)
+
+inst_477:
+// rs1_val==12297829382473034409 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x5555555555555554, x1, 1504, x2)
+
+inst_478:
+// rs1_val==12297829382473034409 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0xaaaaaaaaaaaaaaa9, x1, 1512, x2)
+
+inst_479:
+// rs1_val==12297829382473034409 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x4, x1, 1520, x2)
+
+inst_480:
+// rs1_val==12297829382473034409 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x3333333333333332, x1, 1528, x2)
+
+inst_481:
+// rs1_val==12297829382473034409 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x6666666666666665, x1, 1536, x2)
+
+inst_482:
+// rs1_val==12297829382473034409 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0xb504f332, x1, 1544, x2)
+
+inst_483:
+// rs1_val==12297829382473034409 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0xffffffff, x1, 1552, x2)
+
+inst_484:
+// rs1_val==12297829382473034409 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x5555555555555556, x1, 1560, x2)
+
+inst_485:
+// rs1_val==12297829382473034409 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xaaaaaaaaaaaaaaa9, 0xaaaaaaaaaaaaaaab, x1, 1568, x2)
+
+inst_486:
+// rs1_val==12297829382473034409 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x6, x1, 1576, x2)
+
+inst_487:
+// rs1_val==12297829382473034409 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x3333333333333334, x1, 1584, x2)
+
+inst_488:
+// rs1_val==12297829382473034409 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x6666666666666667, x1, 1592, x2)
+
+inst_489:
+// rs1_val==12297829382473034409 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0xb504f334, x1, 1600, x2)
+
+inst_490:
+// rs1_val==12297829382473034409 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x1, x1, 1608, x2)
+
+inst_491:
+// rs1_val==12297829382473034409 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaa9; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaa9, 0x100000001, x1, 1616, x2)
+
+inst_492:
+// rs1_val==4 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x4, 0x3, x1, 1624, x2)
+
+inst_493:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x5555555555555555, x1, 1632, x2)
+
+inst_494:
+// rs1_val==4 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xaaaaaaaaaaaaaaaa, x1, 1640, x2)
+
+inst_495:
+// rs1_val==4 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x5, x1, 1648, x2)
+
+inst_496:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x3333333333333333, x1, 1656, x2)
+
+inst_497:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x6666666666666666, x1, 1664, x2)
+
+inst_498:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xb504f333, x1, 1672, x2)
+
+inst_499:
+// rs1_val==4 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x4, 0x0, x1, 1680, x2)
+
+inst_500:
+// rs1_val==4 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x100000000, x1, 1688, x2)
+
+inst_501:
+// rs1_val==4 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x4, 0x2, x1, 1696, x2)
+
+inst_502:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x5555555555555554, x1, 1704, x2)
+
+inst_503:
+// rs1_val==4 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xaaaaaaaaaaaaaaa9, x1, 1712, x2)
+
+inst_504:
+// rs1_val==4 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x4, 0x4, x1, 1720, x2)
+
+inst_505:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x3333333333333332, x1, 1728, x2)
+
+inst_506:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x6666666666666665, x1, 1736, x2)
+
+inst_507:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xb504f332, x1, 1744, x2)
+
+inst_508:
+// rs1_val==4 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xffffffff, x1, 1752, x2)
+
+inst_509:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x5555555555555556, x1, 1760, x2)
+
+inst_510:
+// rs1_val==4 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xaaaaaaaaaaaaaaab, x1, 1768, x2)
+
+inst_511:
+// rs1_val==4 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x6, x1, 1776, x2)
+
+inst_512:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x3333333333333334, x1, 1784, x2)
+
+inst_513:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x6666666666666667, x1, 1792, x2)
+
+inst_514:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0xb504f334, x1, 1800, x2)
+
+inst_515:
+// rs1_val==4 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x4, 0x1, x1, 1808, x2)
+
+inst_516:
+// rs1_val==4 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x4, 0x100000001, x1, 1816, x2)
+
+inst_517:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0x3, x1, 1824, x2)
+
+inst_518:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333332, 0x5555555555555555, x1, 1832, x2)
+
+inst_519:
+// rs1_val==3689348814741910322 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333332, 0xaaaaaaaaaaaaaaaa, x1, 1840, x2)
+
+inst_520:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0x5, x1, 1848, x2)
+
+inst_521:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333332, 0x3333333333333333, x1, 1856, x2)
+
+inst_522:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333332, 0x6666666666666666, x1, 1864, x2)
+
+inst_523:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0xb504f333, x1, 1872, x2)
+
+inst_524:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0x0, x1, 1880, x2)
+
+inst_525:
+// rs1_val==3689348814741910322 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0x100000000, x1, 1888, x2)
+
+inst_526:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0x2, x1, 1896, x2)
+
+inst_527:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333332, 0x5555555555555554, x1, 1904, x2)
+
+inst_528:
+// rs1_val==3689348814741910322 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333332, 0xaaaaaaaaaaaaaaa9, x1, 1912, x2)
+
+inst_529:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0x4, x1, 1920, x2)
+
+inst_530:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0x3333333333333332, x1, 1928, x2)
+
+inst_531:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333332, 0x6666666666666665, x1, 1936, x2)
+
+inst_532:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0xb504f332, x1, 1944, x2)
+
+inst_533:
+// rs1_val==3689348814741910322 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0xffffffff, x1, 1952, x2)
+
+inst_534:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333332, 0x5555555555555556, x1, 1960, x2)
+
+inst_535:
+// rs1_val==3689348814741910322 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333332, 0xaaaaaaaaaaaaaaab, x1, 1968, x2)
+
+inst_536:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0x6, x1, 1976, x2)
+
+inst_537:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333332, 0x3333333333333334, x1, 1984, x2)
+
+inst_538:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333332, 0x6666666666666667, x1, 1992, x2)
+
+inst_539:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0xb504f334, x1, 2000, x2)
+
+inst_540:
+// rs1_val==3689348814741910322 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0x1, x1, 2008, x2)
+
+inst_541:
+// rs1_val==3689348814741910322 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333332, 0x100000001, x1, 2016, x2)
+
+inst_542:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x3, x1, 2024, x2)
+
+inst_543:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x5555555555555555, x1, 2032, x2)
+
+inst_544:
+// rs1_val==7378697629483820645 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666665, 0xaaaaaaaaaaaaaaaa, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_4)
+
+inst_545:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x5, x1, 0, x2)
+
+inst_546:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x3333333333333333, x1, 8, x2)
+
+inst_547:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666665, 0x6666666666666666, x1, 16, x2)
+
+inst_548:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0xb504f333, x1, 24, x2)
+
+inst_549:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x0, x1, 32, x2)
+
+inst_550:
+// rs1_val==7378697629483820645 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x100000000, x1, 40, x2)
+
+inst_551:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x2, x1, 48, x2)
+
+inst_552:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x5555555555555554, x1, 56, x2)
+
+inst_553:
+// rs1_val==7378697629483820645 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666665, 0xaaaaaaaaaaaaaaa9, x1, 64, x2)
+
+inst_554:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x4, x1, 72, x2)
+
+inst_555:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x3333333333333332, x1, 80, x2)
+
+inst_556:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x6666666666666665, x1, 88, x2)
+
+inst_557:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0xb504f332, x1, 96, x2)
+
+inst_558:
+// rs1_val==7378697629483820645 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0xffffffff, x1, 104, x2)
+
+inst_559:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x5555555555555556, x1, 112, x2)
+
+inst_560:
+// rs1_val==7378697629483820645 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666665, 0xaaaaaaaaaaaaaaab, x1, 120, x2)
+
+inst_561:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x6, x1, 128, x2)
+
+inst_562:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x3333333333333334, x1, 136, x2)
+
+inst_563:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666665, 0x6666666666666667, x1, 144, x2)
+
+inst_564:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0xb504f334, x1, 152, x2)
+
+inst_565:
+// rs1_val==7378697629483820645 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x1, x1, 160, x2)
+
+inst_566:
+// rs1_val==7378697629483820645 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666665, 0x100000001, x1, 168, x2)
+
+inst_567:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f332, 0x3, x1, 176, x2)
+
+inst_568:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0x5555555555555555, x1, 184, x2)
+
+inst_569:
+// rs1_val==3037000498 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0xaaaaaaaaaaaaaaaa, x1, 192, x2)
+
+inst_570:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f332, 0x5, x1, 200, x2)
+
+inst_571:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0x3333333333333333, x1, 208, x2)
+
+inst_572:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0x6666666666666666, x1, 216, x2)
+
+inst_573:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0xb504f333, x1, 224, x2)
+
+inst_574:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f332, 0x0, x1, 232, x2)
+
+inst_575:
+// rs1_val==3037000498 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0x100000000, x1, 240, x2)
+
+inst_576:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f332, 0x2, x1, 248, x2)
+
+inst_577:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0x5555555555555554, x1, 256, x2)
+
+inst_578:
+// rs1_val==3037000498 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0xaaaaaaaaaaaaaaa9, x1, 264, x2)
+
+inst_579:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f332, 0x4, x1, 272, x2)
+
+inst_580:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0x3333333333333332, x1, 280, x2)
+
+inst_581:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0x6666666666666665, x1, 288, x2)
+
+inst_582:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f332, 0xb504f332, x1, 296, x2)
+
+inst_583:
+// rs1_val==3037000498 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0xffffffff, x1, 304, x2)
+
+inst_584:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0x5555555555555556, x1, 312, x2)
+
+inst_585:
+// rs1_val==3037000498 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0xaaaaaaaaaaaaaaab, x1, 320, x2)
+
+inst_586:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f332, 0x6, x1, 328, x2)
+
+inst_587:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0x3333333333333334, x1, 336, x2)
+
+inst_588:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0x6666666666666667, x1, 344, x2)
+
+inst_589:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0xb504f334, x1, 352, x2)
+
+inst_590:
+// rs1_val==3037000498 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f332, 0x1, x1, 360, x2)
+
+inst_591:
+// rs1_val==3037000498 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f332, 0x100000001, x1, 368, x2)
+
+inst_592:
+// rs1_val==4294967295 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffff, 0x3, x1, 376, x2)
+
+inst_593:
+// rs1_val==4294967295 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0x5555555555555555, x1, 384, x2)
+
+inst_594:
+// rs1_val==4294967295 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0xaaaaaaaaaaaaaaaa, x1, 392, x2)
+
+inst_595:
+// rs1_val==4294967295 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffff, 0x5, x1, 400, x2)
+
+inst_596:
+// rs1_val==4294967295 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0x3333333333333333, x1, 408, x2)
+
+inst_597:
+// rs1_val==4294967295 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0x6666666666666666, x1, 416, x2)
+
+inst_598:
+// rs1_val==4294967295 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffff, 0xb504f333, x1, 424, x2)
+
+inst_599:
+// rs1_val==4294967295 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffff, 0x0, x1, 432, x2)
+
+inst_600:
+// rs1_val==4294967295 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0x100000000, x1, 440, x2)
+
+inst_601:
+// rs1_val==4294967295 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffff, 0x2, x1, 448, x2)
+
+inst_602:
+// rs1_val==4294967295 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0x5555555555555554, x1, 456, x2)
+
+inst_603:
+// rs1_val==4294967295 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0xaaaaaaaaaaaaaaa9, x1, 464, x2)
+
+inst_604:
+// rs1_val==4294967295 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffff, 0x4, x1, 472, x2)
+
+inst_605:
+// rs1_val==4294967295 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0x3333333333333332, x1, 480, x2)
+
+inst_606:
+// rs1_val==4294967295 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0x6666666666666665, x1, 488, x2)
+
+inst_607:
+// rs1_val==4294967295 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffff, 0xb504f332, x1, 496, x2)
+
+inst_608:
+// rs1_val==4294967295 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffff, 0xffffffff, x1, 504, x2)
+
+inst_609:
+// rs1_val==4294967295 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0x5555555555555556, x1, 512, x2)
+
+inst_610:
+// rs1_val==4294967295 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0xaaaaaaaaaaaaaaab, x1, 520, x2)
+
+inst_611:
+// rs1_val==4294967295 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffff, 0x6, x1, 528, x2)
+
+inst_612:
+// rs1_val==4294967295 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0x3333333333333334, x1, 536, x2)
+
+inst_613:
+// rs1_val==4294967295 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0x6666666666666667, x1, 544, x2)
+
+inst_614:
+// rs1_val==4294967295 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffff, 0xb504f334, x1, 552, x2)
+
+inst_615:
+// rs1_val==4294967295 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xffffffff, 0x1, x1, 560, x2)
+
+inst_616:
+// rs1_val==4294967295 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xffffffff; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xffffffff, 0x100000001, x1, 568, x2)
+
+inst_617:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x3, x1, 576, x2)
+
+inst_618:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x5555555555555555, x1, 584, x2)
+
+inst_619:
+// rs1_val==6148914691236517206 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555556, 0xaaaaaaaaaaaaaaaa, x1, 592, x2)
+
+inst_620:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x5, x1, 600, x2)
+
+inst_621:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x3333333333333333, x1, 608, x2)
+
+inst_622:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555556, 0x6666666666666666, x1, 616, x2)
+
+inst_623:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0xb504f333, x1, 624, x2)
+
+inst_624:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x0, x1, 632, x2)
+
+inst_625:
+// rs1_val==6148914691236517206 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x100000000, x1, 640, x2)
+
+inst_626:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x2, x1, 648, x2)
+
+inst_627:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x5555555555555554, x1, 656, x2)
+
+inst_628:
+// rs1_val==6148914691236517206 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555556, 0xaaaaaaaaaaaaaaa9, x1, 664, x2)
+
+inst_629:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x4, x1, 672, x2)
+
+inst_630:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x3333333333333332, x1, 680, x2)
+
+inst_631:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555556, 0x6666666666666665, x1, 688, x2)
+
+inst_632:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0xb504f332, x1, 696, x2)
+
+inst_633:
+// rs1_val==6148914691236517206 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0xffffffff, x1, 704, x2)
+
+inst_634:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x5555555555555556, x1, 712, x2)
+
+inst_635:
+// rs1_val==6148914691236517206 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555556, 0xaaaaaaaaaaaaaaab, x1, 720, x2)
+
+inst_636:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x6, x1, 728, x2)
+
+inst_637:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x3333333333333334, x1, 736, x2)
+
+inst_638:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x5555555555555556, 0x6666666666666667, x1, 744, x2)
+
+inst_639:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0xb504f334, x1, 752, x2)
+
+inst_640:
+// rs1_val==6148914691236517206 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x1, x1, 760, x2)
+
+inst_641:
+// rs1_val==6148914691236517206 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x5555555555555556, 0x100000001, x1, 768, x2)
+
+inst_642:
+// rs1_val==12297829382473034411 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x3, x1, 776, x2)
+
+inst_643:
+// rs1_val==12297829382473034411 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x5555555555555555, x1, 784, x2)
+
+inst_644:
+// rs1_val==12297829382473034411 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0xaaaaaaaaaaaaaaaa, x1, 792, x2)
+
+inst_645:
+// rs1_val==12297829382473034411 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x5, x1, 800, x2)
+
+inst_646:
+// rs1_val==12297829382473034411 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x3333333333333333, x1, 808, x2)
+
+inst_647:
+// rs1_val==12297829382473034411 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x6666666666666666, x1, 816, x2)
+
+inst_648:
+// rs1_val==12297829382473034411 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0xb504f333, x1, 824, x2)
+
+inst_649:
+// rs1_val==12297829382473034411 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x0, x1, 832, x2)
+
+inst_650:
+// rs1_val==12297829382473034411 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x100000000, x1, 840, x2)
+
+inst_651:
+// rs1_val==12297829382473034411 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x2, x1, 848, x2)
+
+inst_652:
+// rs1_val==12297829382473034411 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x5555555555555554, x1, 856, x2)
+
+inst_653:
+// rs1_val==12297829382473034411 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0xaaaaaaaaaaaaaaa9, x1, 864, x2)
+
+inst_654:
+// rs1_val==12297829382473034411 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x4, x1, 872, x2)
+
+inst_655:
+// rs1_val==12297829382473034411 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x3333333333333332, x1, 880, x2)
+
+inst_656:
+// rs1_val==12297829382473034411 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x6666666666666665, x1, 888, x2)
+
+inst_657:
+// rs1_val==12297829382473034411 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0xb504f332, x1, 896, x2)
+
+inst_658:
+// rs1_val==12297829382473034411 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0xffffffff, x1, 904, x2)
+
+inst_659:
+// rs1_val==12297829382473034411 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x5555555555555556, x1, 912, x2)
+
+inst_660:
+// rs1_val==12297829382473034411 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0xaaaaaaaaaaaaaaab, x1, 920, x2)
+
+inst_661:
+// rs1_val==12297829382473034411 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x6, x1, 928, x2)
+
+inst_662:
+// rs1_val==12297829382473034411 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x3333333333333334, x1, 936, x2)
+
+inst_663:
+// rs1_val==12297829382473034411 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x6666666666666667, x1, 944, x2)
+
+inst_664:
+// rs1_val==12297829382473034411 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0xb504f334, x1, 952, x2)
+
+inst_665:
+// rs1_val==12297829382473034411 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x1, x1, 960, x2)
+
+inst_666:
+// rs1_val==12297829382473034411 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xaaaaaaaaaaaaaaab; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xaaaaaaaaaaaaaaab, 0x100000001, x1, 968, x2)
+
+inst_667:
+// rs1_val==6 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x3, x1, 976, x2)
+
+inst_668:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x5555555555555555, x1, 984, x2)
+
+inst_669:
+// rs1_val==6 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xaaaaaaaaaaaaaaaa, x1, 992, x2)
+
+inst_670:
+// rs1_val==6 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x5, x1, 1000, x2)
+
+inst_671:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x3333333333333333, x1, 1008, x2)
+
+inst_672:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x6666666666666666, x1, 1016, x2)
+
+inst_673:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xb504f333, x1, 1024, x2)
+
+inst_674:
+// rs1_val==6 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x0, x1, 1032, x2)
+
+inst_675:
+// rs1_val==6 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x100000000, x1, 1040, x2)
+
+inst_676:
+// rs1_val==6 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x2, x1, 1048, x2)
+
+inst_677:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x5555555555555554, x1, 1056, x2)
+
+inst_678:
+// rs1_val==6 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xaaaaaaaaaaaaaaa9, x1, 1064, x2)
+
+inst_679:
+// rs1_val==6 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x4, x1, 1072, x2)
+
+inst_680:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x3333333333333332, x1, 1080, x2)
+
+inst_681:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x6666666666666665, x1, 1088, x2)
+
+inst_682:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xb504f332, x1, 1096, x2)
+
+inst_683:
+// rs1_val==6 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xffffffff, x1, 1104, x2)
+
+inst_684:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x5555555555555556, x1, 1112, x2)
+
+inst_685:
+// rs1_val==6 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xaaaaaaaaaaaaaaab, x1, 1120, x2)
+
+inst_686:
+// rs1_val==6 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x6, x1, 1128, x2)
+
+inst_687:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x3333333333333334, x1, 1136, x2)
+
+inst_688:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x6666666666666667, x1, 1144, x2)
+
+inst_689:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0xb504f334, x1, 1152, x2)
+
+inst_690:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333334, 0x5555555555555555, x1, 1160, x2)
+
+inst_691:
+// rs1_val==3689348814741910324 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333334, 0xaaaaaaaaaaaaaaaa, x1, 1168, x2)
+
+inst_692:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0x5, x1, 1176, x2)
+
+inst_693:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0x3333333333333333, x1, 1184, x2)
+
+inst_694:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333334, 0x6666666666666666, x1, 1192, x2)
+
+inst_695:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0xb504f333, x1, 1200, x2)
+
+inst_696:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0x0, x1, 1208, x2)
+
+inst_697:
+// rs1_val==3689348814741910324 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0x100000000, x1, 1216, x2)
+
+inst_698:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0x2, x1, 1224, x2)
+
+inst_699:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333334, 0x5555555555555554, x1, 1232, x2)
+
+inst_700:
+// rs1_val==3689348814741910324 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333334, 0xaaaaaaaaaaaaaaa9, x1, 1240, x2)
+
+inst_701:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0x4, x1, 1248, x2)
+
+inst_702:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0x3333333333333332, x1, 1256, x2)
+
+inst_703:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333334, 0x6666666666666665, x1, 1264, x2)
+
+inst_704:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0xb504f332, x1, 1272, x2)
+
+inst_705:
+// rs1_val==3689348814741910324 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0xffffffff, x1, 1280, x2)
+
+inst_706:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333334, 0x5555555555555556, x1, 1288, x2)
+
+inst_707:
+// rs1_val==3689348814741910324 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333334, 0xaaaaaaaaaaaaaaab, x1, 1296, x2)
+
+inst_708:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0x6, x1, 1304, x2)
+
+inst_709:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0x3333333333333334, x1, 1312, x2)
+
+inst_710:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x3333333333333334, 0x6666666666666667, x1, 1320, x2)
+
+inst_711:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0xb504f334, x1, 1328, x2)
+
+inst_712:
+// rs1_val==3689348814741910324 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0x1, x1, 1336, x2)
+
+inst_713:
+// rs1_val==3689348814741910324 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0x100000001, x1, 1344, x2)
+
+inst_714:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x3, x1, 1352, x2)
+
+inst_715:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x5555555555555555, x1, 1360, x2)
+
+inst_716:
+// rs1_val==7378697629483820647 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666667, 0xaaaaaaaaaaaaaaaa, x1, 1368, x2)
+
+inst_717:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x5, x1, 1376, x2)
+
+inst_718:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x3333333333333333, x1, 1384, x2)
+
+inst_719:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x6666666666666666, x1, 1392, x2)
+
+inst_720:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0xb504f333, x1, 1400, x2)
+
+inst_721:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x0, x1, 1408, x2)
+
+inst_722:
+// rs1_val==7378697629483820647 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x100000000, x1, 1416, x2)
+
+inst_723:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x2, x1, 1424, x2)
+
+inst_724:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x5555555555555554, x1, 1432, x2)
+
+inst_725:
+// rs1_val==7378697629483820647 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666667, 0xaaaaaaaaaaaaaaa9, x1, 1440, x2)
+
+inst_726:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x4, x1, 1448, x2)
+
+inst_727:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x3333333333333332, x1, 1456, x2)
+
+inst_728:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x6666666666666665, x1, 1464, x2)
+
+inst_729:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0xb504f332, x1, 1472, x2)
+
+inst_730:
+// rs1_val==7378697629483820647 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0xffffffff, x1, 1480, x2)
+
+inst_731:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x5555555555555556, x1, 1488, x2)
+
+inst_732:
+// rs1_val==7378697629483820647 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6666666666666667, 0xaaaaaaaaaaaaaaab, x1, 1496, x2)
+
+inst_733:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x6, x1, 1504, x2)
+
+inst_734:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x3333333333333334, x1, 1512, x2)
+
+inst_735:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x6666666666666667, x1, 1520, x2)
+
+inst_736:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0xb504f334, x1, 1528, x2)
+
+inst_737:
+// rs1_val==7378697629483820647 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x1, x1, 1536, x2)
+
+inst_738:
+// rs1_val==7378697629483820647 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6666666666666667, 0x100000001, x1, 1544, x2)
+
+inst_739:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f334, 0x3, x1, 1552, x2)
+
+inst_740:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0x5555555555555555, x1, 1560, x2)
+
+inst_741:
+// rs1_val==3037000500 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0xaaaaaaaaaaaaaaaa, x1, 1568, x2)
+
+inst_742:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f334, 0x5, x1, 1576, x2)
+
+inst_743:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0x3333333333333333, x1, 1584, x2)
+
+inst_744:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0x6666666666666666, x1, 1592, x2)
+
+inst_745:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f334, 0xb504f333, x1, 1600, x2)
+
+inst_746:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f334, 0x0, x1, 1608, x2)
+
+inst_747:
+// rs1_val==3037000500 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0x100000000, x1, 1616, x2)
+
+inst_748:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f334, 0x2, x1, 1624, x2)
+
+inst_749:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0x5555555555555554, x1, 1632, x2)
+
+inst_750:
+// rs1_val==3037000500 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0xaaaaaaaaaaaaaaa9, x1, 1640, x2)
+
+inst_751:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f334, 0x4, x1, 1648, x2)
+
+inst_752:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0x3333333333333332, x1, 1656, x2)
+
+inst_753:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0x6666666666666665, x1, 1664, x2)
+
+inst_754:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f334, 0xb504f332, x1, 1672, x2)
+
+inst_755:
+// rs1_val==3037000500 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0xffffffff, x1, 1680, x2)
+
+inst_756:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0x5555555555555556, x1, 1688, x2)
+
+inst_757:
+// rs1_val==3037000500 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0xaaaaaaaaaaaaaaab, x1, 1696, x2)
+
+inst_758:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f334, 0x6, x1, 1704, x2)
+
+inst_759:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0x3333333333333334, x1, 1712, x2)
+
+inst_760:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0x6666666666666667, x1, 1720, x2)
+
+inst_761:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f334, 0xb504f334, x1, 1728, x2)
+
+inst_762:
+// rs1_val==3037000500 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0xb504f334, 0x1, x1, 1736, x2)
+
+inst_763:
+// rs1_val==3037000500 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0xb504f334, 0x100000001, x1, 1744, x2)
+
+inst_764:
+// rs1_val==1 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x3, x1, 1752, x2)
+
+inst_765:
+// rs1_val==1 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x5555555555555555, x1, 1760, x2)
+
+inst_766:
+// rs1_val==1 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xaaaaaaaaaaaaaaaa, x1, 1768, x2)
+
+inst_767:
+// rs1_val==1 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x5, x1, 1776, x2)
+
+inst_768:
+// rs1_val==1 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x3333333333333333, x1, 1784, x2)
+
+inst_769:
+// rs1_val==1 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x6666666666666666, x1, 1792, x2)
+
+inst_770:
+// rs1_val==1 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xb504f333, x1, 1800, x2)
+
+inst_771:
+// rs1_val==1 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x1, 0x0, x1, 1808, x2)
+
+inst_772:
+// rs1_val==1 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x100000000, x1, 1816, x2)
+
+inst_773:
+// rs1_val==1 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x2, x1, 1824, x2)
+
+inst_774:
+// rs1_val==1 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x5555555555555554, x1, 1832, x2)
+
+inst_775:
+// rs1_val==1 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xaaaaaaaaaaaaaaa9, x1, 1840, x2)
+
+inst_776:
+// rs1_val==1 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x4, x1, 1848, x2)
+
+inst_777:
+// rs1_val==1 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x3333333333333332, x1, 1856, x2)
+
+inst_778:
+// rs1_val==1 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x6666666666666665, x1, 1864, x2)
+
+inst_779:
+// rs1_val==1 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xb504f332, x1, 1872, x2)
+
+inst_780:
+// rs1_val==1 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xffffffff, x1, 1880, x2)
+
+inst_781:
+// rs1_val==1 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x5555555555555556, x1, 1888, x2)
+
+inst_782:
+// rs1_val==1 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xaaaaaaaaaaaaaaab, x1, 1896, x2)
+
+inst_783:
+// rs1_val==1 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x6, x1, 1904, x2)
+
+inst_784:
+// rs1_val==1 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x3333333333333334, x1, 1912, x2)
+
+inst_785:
+// rs1_val==1 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x6666666666666667, x1, 1920, x2)
+
+inst_786:
+// rs1_val==1 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0xb504f334, x1, 1928, x2)
+
+inst_787:
+// rs1_val==1 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x1, 0x1, x1, 1936, x2)
+
+inst_788:
+// rs1_val==1 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x1, 0x100000001, x1, 1944, x2)
+
+inst_789:
+// rs1_val==4294967297 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000001, 0x3, x1, 1952, x2)
+
+inst_790:
+// rs1_val==4294967297 and rs2_val==6148914691236517205,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x5555555555555555
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000001, 0x5555555555555555, x1, 1960, x2)
+
+inst_791:
+// rs1_val==4294967297 and rs2_val==12297829382473034410,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0xaaaaaaaaaaaaaaaa
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000001, 0xaaaaaaaaaaaaaaaa, x1, 1968, x2)
+
+inst_792:
+// rs1_val==4294967297 and rs2_val==5,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x5
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000001, 0x5, x1, 1976, x2)
+
+inst_793:
+// rs1_val==4294967297 and rs2_val==3689348814741910323,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x3333333333333333
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000001, 0x3333333333333333, x1, 1984, x2)
+
+inst_794:
+// rs1_val==4294967297 and rs2_val==7378697629483820646,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x6666666666666666
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000001, 0x6666666666666666, x1, 1992, x2)
+
+inst_795:
+// rs1_val==4294967297 and rs2_val==3037000499,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0xb504f333
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000001, 0xb504f333, x1, 2000, x2)
+
+inst_796:
+// rs1_val==4294967297 and rs2_val==0,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x0
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000001, 0x0, x1, 2008, x2)
+
+inst_797:
+// rs1_val==4294967297 and rs2_val==4294967296,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x100000000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000001, 0x100000000, x1, 2016, x2)
+
+inst_798:
+// rs1_val==4294967297 and rs2_val==2,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000001, 0x2, x1, 2024, x2)
+
+inst_799:
+// rs1_val==4294967297 and rs2_val==6148914691236517204,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x5555555555555554
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000001, 0x5555555555555554, x1, 2032, x2)
+
+inst_800:
+// rs1_val==4294967297 and rs2_val==12297829382473034409,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0xaaaaaaaaaaaaaaa9
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000001, 0xaaaaaaaaaaaaaaa9, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_5)
+
+inst_801:
+// rs1_val==4294967297 and rs2_val==4,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x4
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000001, 0x4, x1, 0, x2)
+
+inst_802:
+// rs1_val==4294967297 and rs2_val==3689348814741910322,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x3333333333333332
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000001, 0x3333333333333332, x1, 8, x2)
+
+inst_803:
+// rs1_val==4294967297 and rs2_val==7378697629483820645,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x6666666666666665
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000001, 0x6666666666666665, x1, 16, x2)
+
+inst_804:
+// rs1_val==4294967297 and rs2_val==3037000498,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0xb504f332
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000001, 0xb504f332, x1, 24, x2)
+
+inst_805:
+// rs1_val==4294967297 and rs2_val==4294967295,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0xffffffff
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000001, 0xffffffff, x1, 32, x2)
+
+inst_806:
+// rs1_val==4294967297 and rs2_val==6148914691236517206,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x5555555555555556
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000001, 0x5555555555555556, x1, 40, x2)
+
+inst_807:
+// rs1_val==4294967297 and rs2_val==12297829382473034411,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0xaaaaaaaaaaaaaaab
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000001, 0xaaaaaaaaaaaaaaab, x1, 48, x2)
+
+inst_808:
+// rs1_val==4294967297 and rs2_val==6,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x6
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000001, 0x6, x1, 56, x2)
+
+inst_809:
+// rs1_val==4294967297 and rs2_val==3689348814741910324,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x3333333333333334
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000001, 0x3333333333333334, x1, 64, x2)
+
+inst_810:
+// rs1_val==4294967297 and rs2_val==7378697629483820647,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x6666666666666667
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x100000001, 0x6666666666666667, x1, 72, x2)
+
+inst_811:
+// rs1_val==4294967297 and rs2_val==3037000500,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0xb504f334
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000001, 0xb504f334, x1, 80, x2)
+
+inst_812:
+// rs1_val==4294967297 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000001, 0x1, x1, 88, x2)
+
+inst_813:
+// rs1_val==4294967297 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x100000001; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x100000001, 0x100000001, x1, 96, x2)
+
+inst_814:
+// rs1_val==6 and rs2_val==1,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x1
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x6, 0x1, x1, 104, x2)
+
+inst_815:
+// rs1_val==6 and rs2_val==4294967297,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x100000001
+TEST_RR_OP(sltu, x12, x10, x11, 0x1, 0x6, 0x100000001, x1, 112, x2)
+
+inst_816:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x3333333333333334, 0x3, x1, 120, x2)
+
+inst_817:
+// rs2_val == 2, rs1_val == 1152921504606846976
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:0x2
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x1000000000000000, 0x2, x1, 128, x2)
+
+inst_818:
+// rs2_val == 131072, rs1_val == 2097152
+// opcode: sltu ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0x20000
+TEST_RR_OP(sltu, x12, x10, x11, 0x0, 0x200000, 0x20000, x1, 136, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x1_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 17*(XLEN/32),4,0xdeadbeef
+
+
+signature_x16_0:
+ .fill 16*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_3:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_4:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_5:
+ .fill 18*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/sra-01.S b/riscof/suite/rv64i_m/I/sra-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..c1855d6f99f6e66f141a29b3ef10c3f63626bbb7
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/sra-01.S
@@ -0,0 +1,844 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sra instruction of the RISC-V i extension for the sra covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64i")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sra)
+
+RVTEST_SIGBASE( x9,signature_x9_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x23, rs2==x23, rd==x7, rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == -34359738369
+// opcode: sra ; op1:x23; op2:x23; dest:x7; op1val:-0x800000001; op2val:-0x800000001
+TEST_RR_OP(sra, x7, x23, x23, -0x1, -0x800000001, -0x800000001, x9, 0, x10)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x15, rs2==x3, rd==x3, rs1_val > 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == 4294967296
+// opcode: sra ; op1:x15; op2:x3; dest:x3; op1val:0x100000000; op2val:0x3
+TEST_RR_OP(sra, x3, x15, x3, 0x20000000, 0x100000000, 0x3, x9, 8, x10)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x4, rs2==x4, rd==x4, rs1_val < 0 and rs2_val == 0, rs1_val == -4294967297
+// opcode: sra ; op1:x4; op2:x4; dest:x4; op1val:-0x100000001; op2val:-0x100000001
+TEST_RR_OP(sra, x4, x4, x4, -0x1, -0x100000001, -0x100000001, x9, 16, x10)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x27, rs2==x24, rd==x30, rs1_val > 0 and rs2_val == 0, rs1_val==3689348814741910323
+// opcode: sra ; op1:x27; op2:x24; dest:x30; op1val:0x3333333333333333; op2val:0x0
+TEST_RR_OP(sra, x30, x27, x24, 0x3333333333333333, 0x3333333333333333, 0x0, x9, 24, x10)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x20, rs2==x18, rd==x20, rs1_val == rs2_val and rs2_val > 0 and rs2_val < xlen, rs1_val == 1 and rs2_val >= 0 and rs2_val < xlen, rs1_val == 1, rs2_val == 1
+// opcode: sra ; op1:x20; op2:x18; dest:x20; op1val:0x1; op2val:0x1
+TEST_RR_OP(sra, x20, x20, x18, 0x0, 0x1, 0x1, x9, 32, x10)
+
+inst_5:
+// rs1==x2, rs2==x15, rd==x24, rs1_val == (-2**(xlen-1)) and rs2_val >= 0 and rs2_val < xlen, rs1_val == -9223372036854775808, rs2_val == 2
+// opcode: sra ; op1:x2; op2:x15; dest:x24; op1val:-0x8000000000000000; op2val:0x2
+TEST_RR_OP(sra, x24, x2, x15, -0x2000000000000000, -0x8000000000000000, 0x2, x9, 40, x10)
+
+inst_6:
+// rs1==x13, rs2==x8, rd==x26, rs1_val == 0 and rs2_val >= 0 and rs2_val < xlen, rs1_val==0
+// opcode: sra ; op1:x13; op2:x8; dest:x26; op1val:0x0; op2val:0xe
+TEST_RR_OP(sra, x26, x13, x8, 0x0, 0x0, 0xe, x9, 48, x10)
+
+inst_7:
+// rs1==x14, rs2==x0, rd==x28, rs1_val == (2**(xlen-1)-1) and rs2_val >= 0 and rs2_val < xlen, rs1_val == 9223372036854775807
+// opcode: sra ; op1:x14; op2:x0; dest:x28; op1val:0x7fffffffffffffff; op2val:0x0
+TEST_RR_OP(sra, x28, x14, x0, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x0, x9, 56, x10)
+
+inst_8:
+// rs1==x25, rs2==x22, rd==x6, rs1_val == 2, rs1_val==2
+// opcode: sra ; op1:x25; op2:x22; dest:x6; op1val:0x2; op2val:0xa
+TEST_RR_OP(sra, x6, x25, x22, 0x0, 0x2, 0xa, x9, 64, x10)
+
+inst_9:
+// rs1==x29, rs2==x12, rd==x18, rs1_val == 4, rs1_val==4
+// opcode: sra ; op1:x29; op2:x12; dest:x18; op1val:0x4; op2val:0x7
+TEST_RR_OP(sra, x18, x29, x12, 0x0, 0x4, 0x7, x9, 72, x10)
+
+inst_10:
+// rs1==x3, rs2==x28, rd==x11, rs1_val == 8,
+// opcode: sra ; op1:x3; op2:x28; dest:x11; op1val:0x8; op2val:0xa
+TEST_RR_OP(sra, x11, x3, x28, 0x0, 0x8, 0xa, x9, 80, x10)
+
+inst_11:
+// rs1==x0, rs2==x16, rd==x8, rs1_val == 16,
+// opcode: sra ; op1:x0; op2:x16; dest:x8; op1val:0x0; op2val:0x6
+TEST_RR_OP(sra, x8, x0, x16, 0x0, 0x0, 0x6, x9, 88, x10)
+
+inst_12:
+// rs1==x24, rs2==x5, rd==x12, rs1_val == 32,
+// opcode: sra ; op1:x24; op2:x5; dest:x12; op1val:0x20; op2val:0x1
+TEST_RR_OP(sra, x12, x24, x5, 0x10, 0x20, 0x1, x9, 96, x10)
+
+inst_13:
+// rs1==x31, rs2==x21, rd==x2, rs1_val == 64, rs2_val == 8
+// opcode: sra ; op1:x31; op2:x21; dest:x2; op1val:0x40; op2val:0x8
+TEST_RR_OP(sra, x2, x31, x21, 0x0, 0x40, 0x8, x9, 104, x10)
+
+inst_14:
+// rs1==x8, rs2==x1, rd==x21, rs1_val == 128,
+// opcode: sra ; op1:x8; op2:x1; dest:x21; op1val:0x80; op2val:0xe
+TEST_RR_OP(sra, x21, x8, x1, 0x0, 0x80, 0xe, x9, 112, x10)
+
+inst_15:
+// rs1==x1, rs2==x30, rd==x14, rs1_val == 256,
+// opcode: sra ; op1:x1; op2:x30; dest:x14; op1val:0x100; op2val:0x3
+TEST_RR_OP(sra, x14, x1, x30, 0x20, 0x100, 0x3, x9, 120, x4)
+
+inst_16:
+// rs1==x16, rs2==x10, rd==x0, rs1_val == 512,
+// opcode: sra ; op1:x16; op2:x10; dest:x0; op1val:0x200; op2val:0xb
+TEST_RR_OP(sra, x0, x16, x10, 0, 0x200, 0xb, x9, 128, x4)
+RVTEST_SIGBASE( x3,signature_x3_0)
+
+inst_17:
+// rs1==x26, rs2==x29, rd==x10, rs1_val == 1024,
+// opcode: sra ; op1:x26; op2:x29; dest:x10; op1val:0x400; op2val:0xe
+TEST_RR_OP(sra, x10, x26, x29, 0x0, 0x400, 0xe, x3, 0, x4)
+
+inst_18:
+// rs1==x9, rs2==x27, rd==x31, rs1_val == 2048, rs2_val == 42
+// opcode: sra ; op1:x9; op2:x27; dest:x31; op1val:0x800; op2val:0x2a
+TEST_RR_OP(sra, x31, x9, x27, 0x0, 0x800, 0x2a, x3, 8, x4)
+
+inst_19:
+// rs1==x22, rs2==x19, rd==x1, rs1_val == 4096, rs2_val == 4
+// opcode: sra ; op1:x22; op2:x19; dest:x1; op1val:0x1000; op2val:0x4
+TEST_RR_OP(sra, x1, x22, x19, 0x100, 0x1000, 0x4, x3, 16, x4)
+
+inst_20:
+// rs1==x17, rs2==x13, rd==x9, rs1_val == 8192,
+// opcode: sra ; op1:x17; op2:x13; dest:x9; op1val:0x2000; op2val:0x9
+TEST_RR_OP(sra, x9, x17, x13, 0x10, 0x2000, 0x9, x3, 24, x4)
+
+inst_21:
+// rs1==x18, rs2==x7, rd==x13, rs1_val == 16384, rs2_val == 31
+// opcode: sra ; op1:x18; op2:x7; dest:x13; op1val:0x4000; op2val:0x1f
+TEST_RR_OP(sra, x13, x18, x7, 0x0, 0x4000, 0x1f, x3, 32, x4)
+
+inst_22:
+// rs1==x7, rs2==x31, rd==x19, rs1_val == 32768,
+// opcode: sra ; op1:x7; op2:x31; dest:x19; op1val:0x8000; op2val:0x9
+TEST_RR_OP(sra, x19, x7, x31, 0x40, 0x8000, 0x9, x3, 40, x4)
+
+inst_23:
+// rs1==x21, rs2==x26, rd==x23, rs1_val == 65536,
+// opcode: sra ; op1:x21; op2:x26; dest:x23; op1val:0x10000; op2val:0x3
+TEST_RR_OP(sra, x23, x21, x26, 0x2000, 0x10000, 0x3, x3, 48, x4)
+
+inst_24:
+// rs1==x10, rs2==x11, rd==x29, rs1_val == 131072,
+// opcode: sra ; op1:x10; op2:x11; dest:x29; op1val:0x20000; op2val:0x3
+TEST_RR_OP(sra, x29, x10, x11, 0x4000, 0x20000, 0x3, x3, 56, x4)
+
+inst_25:
+// rs1==x19, rs2==x2, rd==x27, rs1_val == 262144,
+// opcode: sra ; op1:x19; op2:x2; dest:x27; op1val:0x40000; op2val:0x8
+TEST_RR_OP(sra, x27, x19, x2, 0x400, 0x40000, 0x8, x3, 64, x4)
+
+inst_26:
+// rs1==x12, rs2==x6, rd==x17, rs1_val == 524288,
+// opcode: sra ; op1:x12; op2:x6; dest:x17; op1val:0x80000; op2val:0x7
+TEST_RR_OP(sra, x17, x12, x6, 0x1000, 0x80000, 0x7, x3, 72, x4)
+
+inst_27:
+// rs1==x5, rs2==x14, rd==x22, rs1_val == 1048576, rs2_val == 32
+// opcode: sra ; op1:x5; op2:x14; dest:x22; op1val:0x100000; op2val:0x20
+TEST_RR_OP(sra, x22, x5, x14, 0x0, 0x100000, 0x20, x3, 80, x4)
+
+inst_28:
+// rs1==x6, rs2==x9, rd==x16, rs1_val == 2097152,
+// opcode: sra ; op1:x6; op2:x9; dest:x16; op1val:0x200000; op2val:0x4
+TEST_RR_OP(sra, x16, x6, x9, 0x20000, 0x200000, 0x4, x3, 88, x4)
+
+inst_29:
+// rs1==x30, rs2==x25, rd==x5, rs1_val == 4194304,
+// opcode: sra ; op1:x30; op2:x25; dest:x5; op1val:0x400000; op2val:0x2a
+TEST_RR_OP(sra, x5, x30, x25, 0x0, 0x400000, 0x2a, x3, 96, x4)
+
+inst_30:
+// rs1==x28, rs2==x20, rd==x15, rs1_val == 8388608, rs2_val == 21
+// opcode: sra ; op1:x28; op2:x20; dest:x15; op1val:0x800000; op2val:0x15
+TEST_RR_OP(sra, x15, x28, x20, 0x4, 0x800000, 0x15, x3, 104, x4)
+
+inst_31:
+// rs1==x11, rs2==x17, rd==x25, rs1_val == 16777216,
+// opcode: sra ; op1:x11; op2:x17; dest:x25; op1val:0x1000000; op2val:0x15
+TEST_RR_OP(sra, x25, x11, x17, 0x8, 0x1000000, 0x15, x3, 112, x1)
+
+inst_32:
+// rs1_val == 33554432,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x1f
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x2000000, 0x1f, x3, 120, x1)
+
+inst_33:
+// rs1_val == 67108864, rs2_val == 16
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x10
+TEST_RR_OP(sra, x12, x10, x11, 0x400, 0x4000000, 0x10, x3, 128, x1)
+
+inst_34:
+// rs1_val == 134217728,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x2
+TEST_RR_OP(sra, x12, x10, x11, 0x2000000, 0x8000000, 0x2, x3, 136, x1)
+
+inst_35:
+// rs1_val == 268435456,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0xd
+TEST_RR_OP(sra, x12, x10, x11, 0x8000, 0x10000000, 0xd, x3, 144, x1)
+
+inst_36:
+// rs1_val == 536870912,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x3
+TEST_RR_OP(sra, x12, x10, x11, 0x4000000, 0x20000000, 0x3, x3, 152, x1)
+
+inst_37:
+// rs1_val == 1073741824,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, 0x40000, 0x40000000, 0xc, x3, 160, x1)
+
+inst_38:
+// rs1_val == 2147483648,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0xb
+TEST_RR_OP(sra, x12, x10, x11, 0x100000, 0x80000000, 0xb, x3, 168, x1)
+
+inst_39:
+// rs1_val == 8589934592,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:0xa
+TEST_RR_OP(sra, x12, x10, x11, 0x800000, 0x200000000, 0xa, x3, 176, x1)
+
+inst_40:
+// rs1_val == 17179869184,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:0xe
+TEST_RR_OP(sra, x12, x10, x11, 0x100000, 0x400000000, 0xe, x3, 184, x1)
+
+inst_41:
+// rs1_val == 34359738368,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:0xf
+TEST_RR_OP(sra, x12, x10, x11, 0x100000, 0x800000000, 0xf, x3, 192, x1)
+
+inst_42:
+// rs1_val == 68719476736,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:0x20
+TEST_RR_OP(sra, x12, x10, x11, 0x10, 0x1000000000, 0x20, x3, 200, x1)
+
+inst_43:
+// rs1_val == 137438953472, rs2_val == 47
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:0x2f
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x2000000000, 0x2f, x3, 208, x1)
+
+inst_44:
+// rs1_val == 274877906944,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:0x2a
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x4000000000, 0x2a, x3, 216, x1)
+
+inst_45:
+// rs1_val == 549755813888,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0x10
+TEST_RR_OP(sra, x12, x10, x11, 0x800000, 0x8000000000, 0x10, x3, 224, x1)
+
+inst_46:
+// rs1_val == 1099511627776,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, 0x10000000, 0x10000000000, 0xc, x3, 232, x1)
+
+inst_47:
+// rs1_val == 2199023255552,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:0x2a
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x20000000000, 0x2a, x3, 240, x1)
+
+inst_48:
+// rs1_val == 4398046511104,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:0x5
+TEST_RR_OP(sra, x12, x10, x11, 0x2000000000, 0x40000000000, 0x5, x3, 248, x1)
+
+inst_49:
+// rs1_val == 8796093022208,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:0x8
+TEST_RR_OP(sra, x12, x10, x11, 0x800000000, 0x80000000000, 0x8, x3, 256, x1)
+
+inst_50:
+// rs1_val == 17592186044416, rs2_val == 55
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:0x37
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x100000000000, 0x37, x3, 264, x1)
+
+inst_51:
+// rs1_val == 35184372088832,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:0x37
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x200000000000, 0x37, x3, 272, x1)
+
+inst_52:
+// rs1_val == 70368744177664,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, 0x400000000, 0x400000000000, 0xc, x3, 280, x1)
+
+inst_53:
+// rs1_val == 140737488355328,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:0x2a
+TEST_RR_OP(sra, x12, x10, x11, 0x20, 0x800000000000, 0x2a, x3, 288, x1)
+
+inst_54:
+// rs1_val == 281474976710656,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0x2a
+TEST_RR_OP(sra, x12, x10, x11, 0x40, 0x1000000000000, 0x2a, x3, 296, x1)
+
+inst_55:
+// rs1_val == 562949953421312,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:0xe
+TEST_RR_OP(sra, x12, x10, x11, 0x800000000, 0x2000000000000, 0xe, x3, 304, x1)
+
+inst_56:
+// rs1_val == 1125899906842624,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, 0x4000000000, 0x4000000000000, 0xc, x3, 312, x1)
+
+inst_57:
+// rs1_val == 2251799813685248, rs2_val == 61
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:0x3d
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x8000000000000, 0x3d, x3, 320, x1)
+
+inst_58:
+// rs1_val == 4503599627370496,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, 0x10000000000, 0x10000000000000, 0xc, x3, 328, x1)
+
+inst_59:
+// rs1_val == 9007199254740992,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:0xe
+TEST_RR_OP(sra, x12, x10, x11, 0x8000000000, 0x20000000000000, 0xe, x3, 336, x1)
+
+inst_60:
+// rs1_val == 18014398509481984,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:0x3d
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x40000000000000, 0x3d, x3, 344, x1)
+
+inst_61:
+// rs1_val == 36028797018963968,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:0x15
+TEST_RR_OP(sra, x12, x10, x11, 0x400000000, 0x80000000000000, 0x15, x3, 352, x1)
+
+inst_62:
+// rs1_val == 72057594037927936,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:0x4
+TEST_RR_OP(sra, x12, x10, x11, 0x10000000000000, 0x100000000000000, 0x4, x3, 360, x1)
+
+inst_63:
+// rs1_val == 144115188075855872,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:0x1
+TEST_RR_OP(sra, x12, x10, x11, 0x100000000000000, 0x200000000000000, 0x1, x3, 368, x1)
+
+inst_64:
+// rs1_val == 288230376151711744,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:0x3d
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x400000000000000, 0x3d, x3, 376, x1)
+
+inst_65:
+// rs1_val == 576460752303423488,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:0x3
+TEST_RR_OP(sra, x12, x10, x11, 0x100000000000000, 0x800000000000000, 0x3, x3, 384, x1)
+
+inst_66:
+// rs1_val == 1152921504606846976,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:0x10
+TEST_RR_OP(sra, x12, x10, x11, 0x100000000000, 0x1000000000000000, 0x10, x3, 392, x1)
+
+inst_67:
+// rs1_val == 2305843009213693952,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:0x2f
+TEST_RR_OP(sra, x12, x10, x11, 0x4000, 0x2000000000000000, 0x2f, x3, 400, x1)
+
+inst_68:
+// rs1_val == 4611686018427387904,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:0x12
+TEST_RR_OP(sra, x12, x10, x11, 0x100000000000, 0x4000000000000000, 0x12, x3, 408, x1)
+
+inst_69:
+// rs1_val == -2,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x3d
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x2, 0x3d, x3, 416, x1)
+
+inst_70:
+// rs1_val == -3,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0x10
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x3, 0x10, x3, 424, x1)
+
+inst_71:
+// rs1_val == -5,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0x15
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x5, 0x15, x3, 432, x1)
+
+inst_72:
+// rs1_val == -9,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x2
+TEST_RR_OP(sra, x12, x10, x11, -0x3, -0x9, 0x2, x3, 440, x1)
+
+inst_73:
+// rs1_val == -17,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:0xa
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x11, 0xa, x3, 448, x1)
+
+inst_74:
+// rs1_val == -33,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x20
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x21, 0x20, x3, 456, x1)
+
+inst_75:
+// rs1_val == -65,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x0
+TEST_RR_OP(sra, x12, x10, x11, -0x41, -0x41, 0x0, x3, 464, x1)
+
+inst_76:
+// rs1_val == -129,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x7
+TEST_RR_OP(sra, x12, x10, x11, -0x2, -0x81, 0x7, x3, 472, x1)
+
+inst_77:
+// rs1_val == -257,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x7
+TEST_RR_OP(sra, x12, x10, x11, -0x3, -0x101, 0x7, x3, 480, x1)
+
+inst_78:
+// rs1_val == -513,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x3f
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x201, 0x3f, x3, 488, x1)
+
+inst_79:
+// rs1_val == -1025,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x37
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x401, 0x37, x3, 496, x1)
+
+inst_80:
+// rs1_val == -2049,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x8
+TEST_RR_OP(sra, x12, x10, x11, -0x9, -0x801, 0x8, x3, 504, x1)
+
+inst_81:
+// rs1_val == -4097,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x8
+TEST_RR_OP(sra, x12, x10, x11, -0x11, -0x1001, 0x8, x3, 512, x1)
+
+inst_82:
+// rs1_val == -8193,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x7
+TEST_RR_OP(sra, x12, x10, x11, -0x41, -0x2001, 0x7, x3, 520, x1)
+
+inst_83:
+// rs1_val == -16385,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x3
+TEST_RR_OP(sra, x12, x10, x11, -0x801, -0x4001, 0x3, x3, 528, x1)
+
+inst_84:
+// rs1_val == -32769,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, -0x9, -0x8001, 0xc, x3, 536, x1)
+
+inst_85:
+// rs1_val == -65537, rs2_val == 62
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x3e
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x10001, 0x3e, x3, 544, x1)
+
+inst_86:
+// rs1_val == -131073,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x20
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x20001, 0x20, x3, 552, x1)
+
+inst_87:
+// rs1_val == -262145,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, -0x41, -0x40001, 0xc, x3, 560, x1)
+
+inst_88:
+// rs1_val == -36028797018963969,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:0x6
+TEST_RR_OP(sra, x12, x10, x11, -0x2000000000001, -0x80000000000001, 0x6, x3, 568, x1)
+
+inst_89:
+// rs1_val == -72057594037927937,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:0xe
+TEST_RR_OP(sra, x12, x10, x11, -0x40000000001, -0x100000000000001, 0xe, x3, 576, x1)
+
+inst_90:
+// rs1_val == -144115188075855873,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:0x5
+TEST_RR_OP(sra, x12, x10, x11, -0x10000000000001, -0x200000000000001, 0x5, x3, 584, x1)
+
+inst_91:
+// rs1_val == -288230376151711745,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000000001; op2val:0x2
+TEST_RR_OP(sra, x12, x10, x11, -0x100000000000001, -0x400000000000001, 0x2, x3, 592, x1)
+
+inst_92:
+// rs1_val == -576460752303423489,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:0x7
+TEST_RR_OP(sra, x12, x10, x11, -0x10000000000001, -0x800000000000001, 0x7, x3, 600, x1)
+
+inst_93:
+// rs1_val == -1152921504606846977,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:0x4
+TEST_RR_OP(sra, x12, x10, x11, -0x100000000000001, -0x1000000000000001, 0x4, x3, 608, x1)
+
+inst_94:
+// rs1_val == -2305843009213693953,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:0x3
+TEST_RR_OP(sra, x12, x10, x11, -0x400000000000001, -0x2000000000000001, 0x3, x3, 616, x1)
+
+inst_95:
+// rs1_val == -4611686018427387905,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:0x1
+TEST_RR_OP(sra, x12, x10, x11, -0x2000000000000001, -0x4000000000000001, 0x1, x3, 624, x1)
+
+inst_96:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x9
+TEST_RR_OP(sra, x12, x10, x11, 0x2aaaaaaaaaaaaa, 0x5555555555555555, 0x9, x3, 632, x1)
+
+inst_97:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x7
+TEST_RR_OP(sra, x12, x10, x11, -0xaaaaaaaaaaaaab, -0x5555555555555556, 0x7, x3, 640, x1)
+
+inst_98:
+// rs1_val==3,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x1
+TEST_RR_OP(sra, x12, x10, x11, 0x1, 0x3, 0x1, x3, 648, x1)
+
+inst_99:
+// rs1_val==5,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x20
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x5, 0x20, x3, 656, x1)
+
+inst_100:
+// rs1_val==7378697629483820646,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, 0x6666666666666, 0x6666666666666666, 0xc, x3, 664, x1)
+
+inst_101:
+// rs1_val==-3037000499,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb
+TEST_RR_OP(sra, x12, x10, x11, -0x16a09f, -0xb504f333, 0xb, x3, 672, x1)
+
+inst_102:
+// rs1_val==3037000499,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x1f
+TEST_RR_OP(sra, x12, x10, x11, 0x1, 0xb504f333, 0x1f, x3, 680, x1)
+
+inst_103:
+// rs1_val==6148914691236517204,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x37
+TEST_RR_OP(sra, x12, x10, x11, 0xaa, 0x5555555555555554, 0x37, x3, 688, x1)
+
+inst_104:
+// rs1_val==3689348814741910322,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x20
+TEST_RR_OP(sra, x12, x10, x11, 0x33333333, 0x3333333333333332, 0x20, x3, 696, x1)
+
+inst_105:
+// rs1_val==7378697629483820645,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x9
+TEST_RR_OP(sra, x12, x10, x11, 0x33333333333333, 0x6666666666666665, 0x9, x3, 704, x1)
+
+inst_106:
+// rs1_val==3037000498,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x15
+TEST_RR_OP(sra, x12, x10, x11, 0x5a8, 0xb504f332, 0x15, x3, 712, x1)
+
+inst_107:
+// rs1_val==6148914691236517206,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xe
+TEST_RR_OP(sra, x12, x10, x11, 0x1555555555555, 0x5555555555555556, 0xe, x3, 720, x1)
+
+inst_108:
+// rs1_val==-6148914691236517205,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xe
+TEST_RR_OP(sra, x12, x10, x11, -0x1555555555556, -0x5555555555555555, 0xe, x3, 728, x1)
+
+inst_109:
+// rs1_val==6,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3e
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x6, 0x3e, x3, 736, x1)
+
+inst_110:
+// rs1_val==3689348814741910324,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x12
+TEST_RR_OP(sra, x12, x10, x11, 0xccccccccccc, 0x3333333333333334, 0x12, x3, 744, x1)
+
+inst_111:
+// rs1_val==7378697629483820647,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xe
+TEST_RR_OP(sra, x12, x10, x11, 0x1999999999999, 0x6666666666666667, 0xe, x3, 752, x1)
+
+inst_112:
+// rs1_val==-3037000498,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x11
+TEST_RR_OP(sra, x12, x10, x11, -0x5a83, -0xb504f332, 0x11, x3, 760, x1)
+
+inst_113:
+// rs1_val==3037000500,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x2a
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0xb504f334, 0x2a, x3, 768, x1)
+
+inst_114:
+// rs2_val == 59,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:0x3b
+TEST_RR_OP(sra, x12, x10, x11, -0x2, -0x800000000000001, 0x3b, x3, 776, x1)
+
+inst_115:
+// rs1_val == -524289,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x20
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x80001, 0x20, x3, 784, x1)
+
+inst_116:
+// rs1_val == -1048577,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x11
+TEST_RR_OP(sra, x12, x10, x11, -0x9, -0x100001, 0x11, x3, 792, x1)
+
+inst_117:
+// rs1_val == -2097153,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0x5
+TEST_RR_OP(sra, x12, x10, x11, -0x10001, -0x200001, 0x5, x3, 800, x1)
+
+inst_118:
+// rs1_val == -4194305,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0x20
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x400001, 0x20, x3, 808, x1)
+
+inst_119:
+// rs1_val == -8388609,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, -0x801, -0x800001, 0xc, x3, 816, x1)
+
+inst_120:
+// rs1_val == -16777217,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0xa
+TEST_RR_OP(sra, x12, x10, x11, -0x4001, -0x1000001, 0xa, x3, 824, x1)
+
+inst_121:
+// rs1_val == -33554433,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0xc
+TEST_RR_OP(sra, x12, x10, x11, -0x2001, -0x2000001, 0xc, x3, 832, x1)
+
+inst_122:
+// rs1_val == -67108865,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x3
+TEST_RR_OP(sra, x12, x10, x11, -0x800001, -0x4000001, 0x3, x3, 840, x1)
+
+inst_123:
+// rs1_val == -134217729,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x3d
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x8000001, 0x3d, x3, 848, x1)
+
+inst_124:
+// rs1_val == -268435457,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x11
+TEST_RR_OP(sra, x12, x10, x11, -0x801, -0x10000001, 0x11, x3, 856, x1)
+
+inst_125:
+// rs1_val == -536870913,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x2f
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x20000001, 0x2f, x3, 864, x1)
+
+inst_126:
+// rs1_val == -1073741825,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x9
+TEST_RR_OP(sra, x12, x10, x11, -0x200001, -0x40000001, 0x9, x3, 872, x1)
+
+inst_127:
+// rs1_val == -2147483649,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:0xd
+TEST_RR_OP(sra, x12, x10, x11, -0x40001, -0x80000001, 0xd, x3, 880, x1)
+
+inst_128:
+// rs1_val == -8589934593,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:0xa
+TEST_RR_OP(sra, x12, x10, x11, -0x800001, -0x200000001, 0xa, x3, 888, x1)
+
+inst_129:
+// rs1_val == -17179869185,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:0x3b
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x400000001, 0x3b, x3, 896, x1)
+
+inst_130:
+// rs1_val == -68719476737,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:0xe
+TEST_RR_OP(sra, x12, x10, x11, -0x400001, -0x1000000001, 0xe, x3, 904, x1)
+
+inst_131:
+// rs1_val == -137438953473,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:0x2f
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x2000000001, 0x2f, x3, 912, x1)
+
+inst_132:
+// rs1_val == -274877906945,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0xa
+TEST_RR_OP(sra, x12, x10, x11, -0x10000001, -0x4000000001, 0xa, x3, 920, x1)
+
+inst_133:
+// rs1_val == -549755813889,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:0x37
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x8000000001, 0x37, x3, 928, x1)
+
+inst_134:
+// rs1_val == -1099511627777,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:0x9
+TEST_RR_OP(sra, x12, x10, x11, -0x80000001, -0x10000000001, 0x9, x3, 936, x1)
+
+inst_135:
+// rs1_val == -2199023255553,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:0xd
+TEST_RR_OP(sra, x12, x10, x11, -0x10000001, -0x20000000001, 0xd, x3, 944, x1)
+
+inst_136:
+// rs1_val == -4398046511105,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:0x1f
+TEST_RR_OP(sra, x12, x10, x11, -0x801, -0x40000000001, 0x1f, x3, 952, x1)
+
+inst_137:
+// rs1_val == -8796093022209,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:0x12
+TEST_RR_OP(sra, x12, x10, x11, -0x2000001, -0x80000000001, 0x12, x3, 960, x1)
+
+inst_138:
+// rs1_val == -17592186044417,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:0x7
+TEST_RR_OP(sra, x12, x10, x11, -0x2000000001, -0x100000000001, 0x7, x3, 968, x1)
+
+inst_139:
+// rs1_val == -35184372088833,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:0x1
+TEST_RR_OP(sra, x12, x10, x11, -0x100000000001, -0x200000000001, 0x1, x3, 976, x1)
+
+inst_140:
+// rs1_val == -70368744177665,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:0xf
+TEST_RR_OP(sra, x12, x10, x11, -0x80000001, -0x400000000001, 0xf, x3, 984, x1)
+
+inst_141:
+// rs1_val == -140737488355329,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:0xb
+TEST_RR_OP(sra, x12, x10, x11, -0x1000000001, -0x800000000001, 0xb, x3, 992, x1)
+
+inst_142:
+// rs1_val == -281474976710657,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:0x3
+TEST_RR_OP(sra, x12, x10, x11, -0x200000000001, -0x1000000000001, 0x3, x3, 1000, x1)
+
+inst_143:
+// rs1_val == -562949953421313,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:0x3f
+TEST_RR_OP(sra, x12, x10, x11, -0x1, -0x2000000000001, 0x3f, x3, 1008, x1)
+
+inst_144:
+// rs1_val == -1125899906842625,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:0x7
+TEST_RR_OP(sra, x12, x10, x11, -0x80000000001, -0x4000000000001, 0x7, x3, 1016, x1)
+
+inst_145:
+// rs1_val == -2251799813685249,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:0x1
+TEST_RR_OP(sra, x12, x10, x11, -0x4000000000001, -0x8000000000001, 0x1, x3, 1024, x1)
+
+inst_146:
+// rs1_val == -4503599627370497,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:0xf
+TEST_RR_OP(sra, x12, x10, x11, -0x2000000001, -0x10000000000001, 0xf, x3, 1032, x1)
+
+inst_147:
+// rs1_val == -9007199254740993,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:0xa
+TEST_RR_OP(sra, x12, x10, x11, -0x80000000001, -0x20000000000001, 0xa, x3, 1040, x1)
+
+inst_148:
+// rs1_val == -18014398509481985,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:0xe
+TEST_RR_OP(sra, x12, x10, x11, -0x10000000001, -0x40000000000001, 0xe, x3, 1048, x1)
+
+inst_149:
+// rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == -34359738369
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:0x7
+TEST_RR_OP(sra, x12, x10, x11, -0x10000001, -0x800000001, 0x7, x3, 1056, x1)
+
+inst_150:
+// rs1_val < 0 and rs2_val == 0, rs1_val == -4294967297
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:0x0
+TEST_RR_OP(sra, x12, x10, x11, -0x100000001, -0x100000001, 0x0, x3, 1064, x1)
+
+inst_151:
+// rs1_val == (2**(xlen-1)-1) and rs2_val >= 0 and rs2_val < xlen, rs1_val == 9223372036854775807
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffffffffffff; op2val:0x3
+TEST_RR_OP(sra, x12, x10, x11, 0xfffffffffffffff, 0x7fffffffffffffff, 0x3, x3, 1072, x1)
+
+inst_152:
+// rs1_val == 16,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x6
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x10, 0x6, x3, 1080, x1)
+
+inst_153:
+// rs1_val == 512,
+// opcode: sra ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:0xb
+TEST_RR_OP(sra, x12, x10, x11, 0x0, 0x200, 0xb, x3, 1088, x1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x9_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x9_1:
+ .fill 17*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_0:
+ .fill 137*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/srai-01.S b/riscof/suite/rv64i_m/I/srai-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..cfef280f483f3e23352baaa355741dafb4e007d1
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/srai-01.S
@@ -0,0 +1,834 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the srai instruction of the RISC-V I extension for the srai covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",srai)
+
+RVTEST_SIGBASE( x7,signature_x7_1)
+
+inst_0:
+// rs1 == rd, rs1==x13, rd==x13, rs1_val < 0 and imm_val > 0 and imm_val < xlen, rs1_val == -288230376151711745
+// opcode: srai ; op1:x13; dest:x13; op1val:-0x400000000000001; immval:0x6
+TEST_IMM_OP( srai, x13, x13, -0x10000000000001, -0x400000000000001, 0x6, x7, 0, x9)
+
+inst_1:
+// rs1 != rd, rs1==x6, rd==x2, rs1_val > 0 and imm_val > 0 and imm_val < xlen, rs1_val==4, rs1_val == 4
+// opcode: srai ; op1:x6; dest:x2; op1val:0x4; immval:0xc
+TEST_IMM_OP( srai, x2, x6, 0x0, 0x4, 0xc, x7, 8, x9)
+
+inst_2:
+// rs1==x15, rd==x28, rs1_val < 0 and imm_val == 0,
+// opcode: srai ; op1:x15; dest:x28; op1val:-0xa; immval:0x0
+TEST_IMM_OP( srai, x28, x15, -0xa, -0xa, 0x0, x7, 16, x9)
+
+inst_3:
+// rs1==x18, rd==x30, rs1_val > 0 and imm_val == 0,
+// opcode: srai ; op1:x18; dest:x30; op1val:0x9; immval:0x0
+TEST_IMM_OP( srai, x30, x18, 0x9, 0x9, 0x0, x7, 24, x9)
+
+inst_4:
+// rs1==x30, rd==x29, rs1_val < 0 and imm_val == (xlen-1), rs1_val == -33554433
+// opcode: srai ; op1:x30; dest:x29; op1val:-0x2000001; immval:0x3f
+TEST_IMM_OP( srai, x29, x30, -0x1, -0x2000001, 0x3f, x7, 32, x9)
+
+inst_5:
+// rs1==x27, rd==x15, rs1_val > 0 and imm_val == (xlen-1), rs1_val == 65536
+// opcode: srai ; op1:x27; dest:x15; op1val:0x10000; immval:0x3f
+TEST_IMM_OP( srai, x15, x27, 0x0, 0x10000, 0x3f, x7, 40, x9)
+
+inst_6:
+// rs1==x23, rd==x14, rs1_val == imm_val and imm_val > 0 and imm_val < xlen, rs1_val == 1 and imm_val >= 0 and imm_val < xlen, rs1_val == 1, imm_val == 1
+// opcode: srai ; op1:x23; dest:x14; op1val:0x1; immval:0x1
+TEST_IMM_OP( srai, x14, x23, 0x0, 0x1, 0x1, x7, 48, x9)
+
+inst_7:
+// rs1==x29, rd==x27, rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < xlen, imm_val == 32, rs1_val == -9223372036854775808
+// opcode: srai ; op1:x29; dest:x27; op1val:-0x8000000000000000; immval:0x20
+TEST_IMM_OP( srai, x27, x29, -0x80000000, -0x8000000000000000, 0x20, x7, 56, x9)
+
+inst_8:
+// rs1==x31, rd==x22, rs1_val == 0 and imm_val >= 0 and imm_val < xlen, rs1_val==0
+// opcode: srai ; op1:x31; dest:x22; op1val:0x0; immval:0x7
+TEST_IMM_OP( srai, x22, x31, 0x0, 0x0, 0x7, x7, 64, x9)
+
+inst_9:
+// rs1==x4, rd==x16, rs1_val == (2**(xlen-1)-1) and imm_val >= 0 and imm_val < xlen, rs1_val == 9223372036854775807
+// opcode: srai ; op1:x4; dest:x16; op1val:0x7fffffffffffffff; immval:0xc
+TEST_IMM_OP( srai, x16, x4, 0x7ffffffffffff, 0x7fffffffffffffff, 0xc, x7, 72, x9)
+
+inst_10:
+// rs1==x24, rd==x21, rs1_val == 2, rs1_val==2
+// opcode: srai ; op1:x24; dest:x21; op1val:0x2; immval:0x11
+TEST_IMM_OP( srai, x21, x24, 0x0, 0x2, 0x11, x7, 80, x9)
+
+inst_11:
+// rs1==x20, rd==x0, rs1_val == 8, imm_val == 42
+// opcode: srai ; op1:x20; dest:x0; op1val:0x8; immval:0x2a
+TEST_IMM_OP( srai, x0, x20, 0, 0x8, 0x2a, x7, 88, x9)
+
+inst_12:
+// rs1==x28, rd==x19, rs1_val == 16, imm_val == 31
+// opcode: srai ; op1:x28; dest:x19; op1val:0x10; immval:0x1f
+TEST_IMM_OP( srai, x19, x28, 0x0, 0x10, 0x1f, x7, 96, x9)
+
+inst_13:
+// rs1==x8, rd==x18, rs1_val == 32,
+// opcode: srai ; op1:x8; dest:x18; op1val:0x20; immval:0x3
+TEST_IMM_OP( srai, x18, x8, 0x4, 0x20, 0x3, x7, 104, x9)
+
+inst_14:
+// rs1==x3, rd==x26, rs1_val == 64,
+// opcode: srai ; op1:x3; dest:x26; op1val:0x40; immval:0xb
+TEST_IMM_OP( srai, x26, x3, 0x0, 0x40, 0xb, x7, 112, x9)
+
+inst_15:
+// rs1==x1, rd==x23, rs1_val == 128,
+// opcode: srai ; op1:x1; dest:x23; op1val:0x80; immval:0x12
+TEST_IMM_OP( srai, x23, x1, 0x0, 0x80, 0x12, x7, 120, x9)
+
+inst_16:
+// rs1==x0, rd==x20, rs1_val == 256,
+// opcode: srai ; op1:x0; dest:x20; op1val:0x0; immval:0x12
+TEST_IMM_OP( srai, x20, x0, 0x0, 0x0, 0x12, x7, 128, x9)
+
+inst_17:
+// rs1==x10, rd==x8, rs1_val == 512, imm_val == 21
+// opcode: srai ; op1:x10; dest:x8; op1val:0x200; immval:0x15
+TEST_IMM_OP( srai, x8, x10, 0x0, 0x200, 0x15, x7, 136, x9)
+
+inst_18:
+// rs1==x5, rd==x6, rs1_val == 1024,
+// opcode: srai ; op1:x5; dest:x6; op1val:0x400; immval:0x0
+TEST_IMM_OP( srai, x6, x5, 0x400, 0x400, 0x0, x7, 144, x9)
+
+inst_19:
+// rs1==x12, rd==x10, rs1_val == 2048, imm_val == 2
+// opcode: srai ; op1:x12; dest:x10; op1val:0x800; immval:0x2
+TEST_IMM_OP( srai, x10, x12, 0x200, 0x800, 0x2, x7, 152, x9)
+
+inst_20:
+// rs1==x21, rd==x1, rs1_val == 4096, imm_val == 4
+// opcode: srai ; op1:x21; dest:x1; op1val:0x1000; immval:0x4
+TEST_IMM_OP( srai, x1, x21, 0x100, 0x1000, 0x4, x7, 160, x9)
+
+inst_21:
+// rs1==x11, rd==x5, rs1_val == 8192,
+// opcode: srai ; op1:x11; dest:x5; op1val:0x2000; immval:0x11
+TEST_IMM_OP( srai, x5, x11, 0x0, 0x2000, 0x11, x7, 168, x9)
+
+inst_22:
+// rs1==x2, rd==x17, rs1_val == 16384,
+// opcode: srai ; op1:x2; dest:x17; op1val:0x4000; immval:0xf
+TEST_IMM_OP( srai, x17, x2, 0x0, 0x4000, 0xf, x7, 176, x5)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_23:
+// rs1==x25, rd==x4, rs1_val == 32768,
+// opcode: srai ; op1:x25; dest:x4; op1val:0x8000; immval:0xb
+TEST_IMM_OP( srai, x4, x25, 0x10, 0x8000, 0xb, x1, 0, x5)
+
+inst_24:
+// rs1==x19, rd==x9, rs1_val == 131072,
+// opcode: srai ; op1:x19; dest:x9; op1val:0x20000; immval:0x7
+TEST_IMM_OP( srai, x9, x19, 0x400, 0x20000, 0x7, x1, 8, x5)
+
+inst_25:
+// rs1==x7, rd==x12, rs1_val == 262144,
+// opcode: srai ; op1:x7; dest:x12; op1val:0x40000; immval:0x6
+TEST_IMM_OP( srai, x12, x7, 0x1000, 0x40000, 0x6, x1, 16, x5)
+
+inst_26:
+// rs1==x16, rd==x11, rs1_val == 524288,
+// opcode: srai ; op1:x16; dest:x11; op1val:0x80000; immval:0x13
+TEST_IMM_OP( srai, x11, x16, 0x1, 0x80000, 0x13, x1, 24, x5)
+
+inst_27:
+// rs1==x14, rd==x3, rs1_val == 1048576,
+// opcode: srai ; op1:x14; dest:x3; op1val:0x100000; immval:0x12
+TEST_IMM_OP( srai, x3, x14, 0x4, 0x100000, 0x12, x1, 32, x5)
+
+inst_28:
+// rs1==x9, rd==x31, rs1_val == 2097152,
+// opcode: srai ; op1:x9; dest:x31; op1val:0x200000; immval:0xa
+TEST_IMM_OP( srai, x31, x9, 0x800, 0x200000, 0xa, x1, 40, x5)
+
+inst_29:
+// rs1==x26, rd==x7, rs1_val == 4194304,
+// opcode: srai ; op1:x26; dest:x7; op1val:0x400000; immval:0xa
+TEST_IMM_OP( srai, x7, x26, 0x1000, 0x400000, 0xa, x1, 48, x5)
+
+inst_30:
+// rs1==x22, rd==x25, rs1_val == 8388608,
+// opcode: srai ; op1:x22; dest:x25; op1val:0x800000; immval:0xd
+TEST_IMM_OP( srai, x25, x22, 0x400, 0x800000, 0xd, x1, 56, x5)
+
+inst_31:
+// rs1==x17, rd==x24, rs1_val == 16777216,
+// opcode: srai ; op1:x17; dest:x24; op1val:0x1000000; immval:0x5
+TEST_IMM_OP( srai, x24, x17, 0x80000, 0x1000000, 0x5, x1, 64, x5)
+
+inst_32:
+// rs1_val == 33554432,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x2000000; immval:0x9
+TEST_IMM_OP( srai, x11, x10, 0x10000, 0x2000000, 0x9, x1, 72, x5)
+
+inst_33:
+// rs1_val == 67108864, imm_val == 16
+// opcode: srai ; op1:x10; dest:x11; op1val:0x4000000; immval:0x10
+TEST_IMM_OP( srai, x11, x10, 0x400, 0x4000000, 0x10, x1, 80, x5)
+
+inst_34:
+// rs1_val == 134217728,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x8000000; immval:0xd
+TEST_IMM_OP( srai, x11, x10, 0x4000, 0x8000000, 0xd, x1, 88, x5)
+
+inst_35:
+// rs1_val == 268435456, imm_val == 59
+// opcode: srai ; op1:x10; dest:x11; op1val:0x10000000; immval:0x3b
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x10000000, 0x3b, x1, 96, x5)
+
+inst_36:
+// rs1_val == 536870912,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x20000000; immval:0x9
+TEST_IMM_OP( srai, x11, x10, 0x100000, 0x20000000, 0x9, x1, 104, x5)
+
+inst_37:
+// rs1_val == 1073741824,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x40000000; immval:0xe
+TEST_IMM_OP( srai, x11, x10, 0x10000, 0x40000000, 0xe, x1, 112, x5)
+
+inst_38:
+// rs1_val == 2147483648,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x80000000; immval:0x20
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x80000000, 0x20, x1, 120, x5)
+
+inst_39:
+// rs1_val == 4294967296,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x100000000; immval:0x1f
+TEST_IMM_OP( srai, x11, x10, 0x2, 0x100000000, 0x1f, x1, 128, x5)
+
+inst_40:
+// rs1_val == 8589934592,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x200000000; immval:0xa
+TEST_IMM_OP( srai, x11, x10, 0x800000, 0x200000000, 0xa, x1, 136, x5)
+
+inst_41:
+// rs1_val == 17179869184,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x400000000; immval:0x9
+TEST_IMM_OP( srai, x11, x10, 0x2000000, 0x400000000, 0x9, x1, 144, x5)
+
+inst_42:
+// rs1_val == 34359738368,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x800000000; immval:0xf
+TEST_IMM_OP( srai, x11, x10, 0x100000, 0x800000000, 0xf, x1, 152, x5)
+
+inst_43:
+// rs1_val == 68719476736, imm_val == 62
+// opcode: srai ; op1:x10; dest:x11; op1val:0x1000000000; immval:0x3e
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x1000000000, 0x3e, x1, 160, x5)
+
+inst_44:
+// rs1_val == 137438953472,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x2000000000; immval:0x2
+TEST_IMM_OP( srai, x11, x10, 0x800000000, 0x2000000000, 0x2, x1, 168, x5)
+
+inst_45:
+// rs1_val == 274877906944,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x4000000000; immval:0x1f
+TEST_IMM_OP( srai, x11, x10, 0x80, 0x4000000000, 0x1f, x1, 176, x5)
+
+inst_46:
+// rs1_val == 549755813888,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x8000000000; immval:0x3
+TEST_IMM_OP( srai, x11, x10, 0x1000000000, 0x8000000000, 0x3, x1, 184, x5)
+
+inst_47:
+// rs1_val == 1099511627776,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x10000000000; immval:0x4
+TEST_IMM_OP( srai, x11, x10, 0x1000000000, 0x10000000000, 0x4, x1, 192, x5)
+
+inst_48:
+// rs1_val == 2199023255552,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x20000000000; immval:0xe
+TEST_IMM_OP( srai, x11, x10, 0x8000000, 0x20000000000, 0xe, x1, 200, x5)
+
+inst_49:
+// rs1_val == 4398046511104,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x40000000000; immval:0x4
+TEST_IMM_OP( srai, x11, x10, 0x4000000000, 0x40000000000, 0x4, x1, 208, x5)
+
+inst_50:
+// rs1_val == 8796093022208,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x80000000000; immval:0x5
+TEST_IMM_OP( srai, x11, x10, 0x4000000000, 0x80000000000, 0x5, x1, 216, x5)
+
+inst_51:
+// rs1_val == 17592186044416,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x100000000000; immval:0xf
+TEST_IMM_OP( srai, x11, x10, 0x20000000, 0x100000000000, 0xf, x1, 224, x5)
+
+inst_52:
+// rs1_val == 35184372088832,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x200000000000; immval:0x4
+TEST_IMM_OP( srai, x11, x10, 0x20000000000, 0x200000000000, 0x4, x1, 232, x5)
+
+inst_53:
+// rs1_val == 70368744177664,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x400000000000; immval:0xa
+TEST_IMM_OP( srai, x11, x10, 0x1000000000, 0x400000000000, 0xa, x1, 240, x5)
+
+inst_54:
+// rs1_val == 140737488355328,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x800000000000; immval:0x2a
+TEST_IMM_OP( srai, x11, x10, 0x20, 0x800000000000, 0x2a, x1, 248, x5)
+
+inst_55:
+// rs1_val == 281474976710656,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x1000000000000; immval:0xa
+TEST_IMM_OP( srai, x11, x10, 0x4000000000, 0x1000000000000, 0xa, x1, 256, x5)
+
+inst_56:
+// rs1_val == 562949953421312,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x2000000000000; immval:0x3f
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x2000000000000, 0x3f, x1, 264, x5)
+
+inst_57:
+// rs1_val == 1125899906842624,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x4000000000000; immval:0x3
+TEST_IMM_OP( srai, x11, x10, 0x800000000000, 0x4000000000000, 0x3, x1, 272, x5)
+
+inst_58:
+// rs1_val == 2251799813685248,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x8000000000000; immval:0x4
+TEST_IMM_OP( srai, x11, x10, 0x800000000000, 0x8000000000000, 0x4, x1, 280, x5)
+
+inst_59:
+// rs1_val == 4503599627370496,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x10000000000000; immval:0xf
+TEST_IMM_OP( srai, x11, x10, 0x2000000000, 0x10000000000000, 0xf, x1, 288, x5)
+
+inst_60:
+// rs1_val == 9007199254740992, imm_val == 61
+// opcode: srai ; op1:x10; dest:x11; op1val:0x20000000000000; immval:0x3d
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x20000000000000, 0x3d, x1, 296, x5)
+
+inst_61:
+// rs1_val == 18014398509481984,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x40000000000000; immval:0xe
+TEST_IMM_OP( srai, x11, x10, 0x10000000000, 0x40000000000000, 0xe, x1, 304, x5)
+
+inst_62:
+// rs1_val == 36028797018963968,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x80000000000000; immval:0xa
+TEST_IMM_OP( srai, x11, x10, 0x200000000000, 0x80000000000000, 0xa, x1, 312, x5)
+
+inst_63:
+// rs1_val == 72057594037927936,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x100000000000000; immval:0xa
+TEST_IMM_OP( srai, x11, x10, 0x400000000000, 0x100000000000000, 0xa, x1, 320, x5)
+
+inst_64:
+// rs1_val == 144115188075855872,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x200000000000000; immval:0x2a
+TEST_IMM_OP( srai, x11, x10, 0x8000, 0x200000000000000, 0x2a, x1, 328, x5)
+
+inst_65:
+// rs1_val == 288230376151711744,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x400000000000000; immval:0x4
+TEST_IMM_OP( srai, x11, x10, 0x40000000000000, 0x400000000000000, 0x4, x1, 336, x5)
+
+inst_66:
+// rs1_val == 576460752303423488,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x800000000000000; immval:0xb
+TEST_IMM_OP( srai, x11, x10, 0x1000000000000, 0x800000000000000, 0xb, x1, 344, x5)
+
+inst_67:
+// rs1_val == 1152921504606846976,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x1000000000000000; immval:0x3b
+TEST_IMM_OP( srai, x11, x10, 0x2, 0x1000000000000000, 0x3b, x1, 352, x5)
+
+inst_68:
+// rs1_val == 2305843009213693952,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x2000000000000000; immval:0x3f
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x2000000000000000, 0x3f, x1, 360, x5)
+
+inst_69:
+// rs1_val == 4611686018427387904,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x4000000000000000; immval:0x9
+TEST_IMM_OP( srai, x11, x10, 0x20000000000000, 0x4000000000000000, 0x9, x1, 368, x5)
+
+inst_70:
+// rs1_val == -2,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x2; immval:0x15
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x2, 0x15, x1, 376, x5)
+
+inst_71:
+// rs1_val == -3,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x3; immval:0x2
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x3, 0x2, x1, 384, x5)
+
+inst_72:
+// rs1_val == -5,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x5; immval:0x3d
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x5, 0x3d, x1, 392, x5)
+
+inst_73:
+// rs1_val == -9,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x9; immval:0xd
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x9, 0xd, x1, 400, x5)
+
+inst_74:
+// rs1_val == -17,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x11; immval:0x3f
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x11, 0x3f, x1, 408, x5)
+
+inst_75:
+// rs1_val == -33,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x21; immval:0x7
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x21, 0x7, x1, 416, x5)
+
+inst_76:
+// rs1_val == -65,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x41; immval:0xe
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x41, 0xe, x1, 424, x5)
+
+inst_77:
+// rs1_val == -129,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x81; immval:0x6
+TEST_IMM_OP( srai, x11, x10, -0x3, -0x81, 0x6, x1, 432, x5)
+
+inst_78:
+// rs1_val == -257,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x101; immval:0xc
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x101, 0xc, x1, 440, x5)
+
+inst_79:
+// rs1_val == -513,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x201; immval:0x3
+TEST_IMM_OP( srai, x11, x10, -0x41, -0x201, 0x3, x1, 448, x5)
+
+inst_80:
+// rs1_val == -1025,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x401; immval:0xf
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x401, 0xf, x1, 456, x5)
+
+inst_81:
+// rs1_val == -2049,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x801; immval:0x9
+TEST_IMM_OP( srai, x11, x10, -0x5, -0x801, 0x9, x1, 464, x5)
+
+inst_82:
+// rs1_val == -4097,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x1001; immval:0x3f
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x1001, 0x3f, x1, 472, x5)
+
+inst_83:
+// rs1_val == -8193,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x2001; immval:0x9
+TEST_IMM_OP( srai, x11, x10, -0x11, -0x2001, 0x9, x1, 480, x5)
+
+inst_84:
+// rs1_val == -16385,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x4001; immval:0x3
+TEST_IMM_OP( srai, x11, x10, -0x801, -0x4001, 0x3, x1, 488, x5)
+
+inst_85:
+// rs1_val == -32769,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x8001; immval:0x10
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x8001, 0x10, x1, 496, x5)
+
+inst_86:
+// rs1_val == -65537,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x10001; immval:0x15
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x10001, 0x15, x1, 504, x5)
+
+inst_87:
+// rs1_val == -131073,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x20001; immval:0x5
+TEST_IMM_OP( srai, x11, x10, -0x1001, -0x20001, 0x5, x1, 512, x5)
+
+inst_88:
+// rs1_val == -262145,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x40001; immval:0x1
+TEST_IMM_OP( srai, x11, x10, -0x20001, -0x40001, 0x1, x1, 520, x5)
+
+inst_89:
+// rs1_val == -524289,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x80001; immval:0x3f
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x80001, 0x3f, x1, 528, x5)
+
+inst_90:
+// rs1_val == -1048577, imm_val == 55
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x100001; immval:0x37
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x100001, 0x37, x1, 536, x5)
+
+inst_91:
+// rs1_val == -2097153,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x200001; immval:0x7
+TEST_IMM_OP( srai, x11, x10, -0x4001, -0x200001, 0x7, x1, 544, x5)
+
+inst_92:
+// rs1_val == -9007199254740993,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x20000000000001; immval:0x15
+TEST_IMM_OP( srai, x11, x10, -0x100000001, -0x20000000000001, 0x15, x1, 552, x5)
+
+inst_93:
+// rs1_val == -18014398509481985,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x40000000000001; immval:0x13
+TEST_IMM_OP( srai, x11, x10, -0x800000001, -0x40000000000001, 0x13, x1, 560, x5)
+
+inst_94:
+// rs1_val == -36028797018963969,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x80000000000001; immval:0x15
+TEST_IMM_OP( srai, x11, x10, -0x400000001, -0x80000000000001, 0x15, x1, 568, x5)
+
+inst_95:
+// rs1_val == -72057594037927937,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x100000000000001; immval:0x1f
+TEST_IMM_OP( srai, x11, x10, -0x2000001, -0x100000000000001, 0x1f, x1, 576, x5)
+
+inst_96:
+// rs1_val == -144115188075855873,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x200000000000001; immval:0x3b
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x200000000000001, 0x3b, x1, 584, x5)
+
+inst_97:
+// rs1_val == -576460752303423489,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x800000000000001; immval:0x1f
+TEST_IMM_OP( srai, x11, x10, -0x10000001, -0x800000000000001, 0x1f, x1, 592, x5)
+
+inst_98:
+// rs1_val == -1152921504606846977,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x1000000000000001; immval:0x1
+TEST_IMM_OP( srai, x11, x10, -0x800000000000001, -0x1000000000000001, 0x1, x1, 600, x5)
+
+inst_99:
+// rs1_val == -2305843009213693953,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x2000000000000001; immval:0x20
+TEST_IMM_OP( srai, x11, x10, -0x20000001, -0x2000000000000001, 0x20, x1, 608, x5)
+
+inst_100:
+// rs1_val == -4611686018427387905,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x4000000000000001; immval:0x13
+TEST_IMM_OP( srai, x11, x10, -0x80000000001, -0x4000000000000001, 0x13, x1, 616, x5)
+
+inst_101:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode: srai ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x12
+TEST_IMM_OP( srai, x11, x10, 0x155555555555, 0x5555555555555555, 0x12, x1, 624, x5)
+
+inst_102:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x1f
+TEST_IMM_OP( srai, x11, x10, -0xaaaaaaab, -0x5555555555555556, 0x1f, x1, 632, x5)
+
+inst_103:
+// rs1_val==3,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x3; immval:0x2a
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x3, 0x2a, x1, 640, x5)
+
+inst_104:
+// rs1_val==5,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x5; immval:0x3e
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x5, 0x3e, x1, 648, x5)
+
+inst_105:
+// rs1_val==3689348814741910323,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x4
+TEST_IMM_OP( srai, x11, x10, 0x333333333333333, 0x3333333333333333, 0x4, x1, 656, x5)
+
+inst_106:
+// rs1_val==7378697629483820646,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2
+TEST_IMM_OP( srai, x11, x10, 0x1999999999999999, 0x6666666666666666, 0x2, x1, 664, x5)
+
+inst_107:
+// rs1_val==-3037000499,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0xb
+TEST_IMM_OP( srai, x11, x10, -0x16a09f, -0xb504f333, 0xb, x1, 672, x5)
+
+inst_108:
+// rs1_val==3037000499,
+// opcode: srai ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x12
+TEST_IMM_OP( srai, x11, x10, 0x2d41, 0xb504f333, 0x12, x1, 680, x5)
+
+inst_109:
+// rs1_val==6148914691236517204,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0xc
+TEST_IMM_OP( srai, x11, x10, 0x5555555555555, 0x5555555555555554, 0xc, x1, 688, x5)
+
+inst_110:
+// rs1_val==3689348814741910322,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x13
+TEST_IMM_OP( srai, x11, x10, 0x66666666666, 0x3333333333333332, 0x13, x1, 696, x5)
+
+inst_111:
+// rs1_val==7378697629483820645,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x1
+TEST_IMM_OP( srai, x11, x10, 0x3333333333333332, 0x6666666666666665, 0x1, x1, 704, x5)
+
+inst_112:
+// rs1_val==3037000498,
+// opcode: srai ; op1:x10; dest:x11; op1val:0xb504f332; immval:0xa
+TEST_IMM_OP( srai, x11, x10, 0x2d413c, 0xb504f332, 0xa, x1, 712, x5)
+
+inst_113:
+// rs1_val==6148914691236517206,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0xc
+TEST_IMM_OP( srai, x11, x10, 0x5555555555555, 0x5555555555555556, 0xc, x1, 720, x5)
+
+inst_114:
+// rs1_val==-6148914691236517205,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x3
+TEST_IMM_OP( srai, x11, x10, -0xaaaaaaaaaaaaaab, -0x5555555555555555, 0x3, x1, 728, x5)
+
+inst_115:
+// rs1_val==6,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x6; immval:0x15
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x6, 0x15, x1, 736, x5)
+
+inst_116:
+// rs1_val==3689348814741910324,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0xf
+TEST_IMM_OP( srai, x11, x10, 0x666666666666, 0x3333333333333334, 0xf, x1, 744, x5)
+
+inst_117:
+// rs1_val==7378697629483820647,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0xa
+TEST_IMM_OP( srai, x11, x10, 0x19999999999999, 0x6666666666666667, 0xa, x1, 752, x5)
+
+inst_118:
+// rs1_val==-3037000498,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0xb
+TEST_IMM_OP( srai, x11, x10, -0x16a09f, -0xb504f332, 0xb, x1, 760, x5)
+
+inst_119:
+// rs1_val==3037000500, imm_val == 8
+// opcode: srai ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x8
+TEST_IMM_OP( srai, x11, x10, 0xb504f3, 0xb504f334, 0x8, x1, 768, x5)
+
+inst_120:
+// imm_val == 47, rs1_val == -35184372088833
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x200000000001; immval:0x2f
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x200000000001, 0x2f, x1, 776, x5)
+
+inst_121:
+// rs1_val == -4194305,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x400001; immval:0x2a
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x400001, 0x2a, x1, 784, x5)
+
+inst_122:
+// rs1_val == -8388609,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x800001; immval:0xd
+TEST_IMM_OP( srai, x11, x10, -0x401, -0x800001, 0xd, x1, 792, x5)
+
+inst_123:
+// rs1_val == -16777217,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x1000001; immval:0x1
+TEST_IMM_OP( srai, x11, x10, -0x800001, -0x1000001, 0x1, x1, 800, x5)
+
+inst_124:
+// rs1_val == -67108865,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x4000001; immval:0xc
+TEST_IMM_OP( srai, x11, x10, -0x4001, -0x4000001, 0xc, x1, 808, x5)
+
+inst_125:
+// rs1_val == -134217729,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x8000001; immval:0x7
+TEST_IMM_OP( srai, x11, x10, -0x100001, -0x8000001, 0x7, x1, 816, x5)
+
+inst_126:
+// rs1_val == -268435457,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x10000001; immval:0x4
+TEST_IMM_OP( srai, x11, x10, -0x1000001, -0x10000001, 0x4, x1, 824, x5)
+
+inst_127:
+// rs1_val == -536870913,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x20000001; immval:0x3b
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x20000001, 0x3b, x1, 832, x5)
+
+inst_128:
+// rs1_val == -1073741825,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x40000001; immval:0x20
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x40000001, 0x20, x1, 840, x5)
+
+inst_129:
+// rs1_val == -2147483649,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x80000001; immval:0x9
+TEST_IMM_OP( srai, x11, x10, -0x400001, -0x80000001, 0x9, x1, 848, x5)
+
+inst_130:
+// rs1_val == -4294967297,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x100000001; immval:0x4
+TEST_IMM_OP( srai, x11, x10, -0x10000001, -0x100000001, 0x4, x1, 856, x5)
+
+inst_131:
+// rs1_val == -8589934593,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x200000001; immval:0xc
+TEST_IMM_OP( srai, x11, x10, -0x200001, -0x200000001, 0xc, x1, 864, x5)
+
+inst_132:
+// rs1_val == -17179869185,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x400000001; immval:0x2f
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x400000001, 0x2f, x1, 872, x5)
+
+inst_133:
+// rs1_val == -34359738369,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x800000001; immval:0x11
+TEST_IMM_OP( srai, x11, x10, -0x40001, -0x800000001, 0x11, x1, 880, x5)
+
+inst_134:
+// rs1_val == -68719476737,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x1000000001; immval:0xf
+TEST_IMM_OP( srai, x11, x10, -0x200001, -0x1000000001, 0xf, x1, 888, x5)
+
+inst_135:
+// rs1_val == -137438953473,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x2000000001; immval:0x13
+TEST_IMM_OP( srai, x11, x10, -0x40001, -0x2000000001, 0x13, x1, 896, x5)
+
+inst_136:
+// rs1_val == -274877906945,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x4000000001; immval:0x3
+TEST_IMM_OP( srai, x11, x10, -0x800000001, -0x4000000001, 0x3, x1, 904, x5)
+
+inst_137:
+// rs1_val == -549755813889,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x8000000001; immval:0xe
+TEST_IMM_OP( srai, x11, x10, -0x2000001, -0x8000000001, 0xe, x1, 912, x5)
+
+inst_138:
+// rs1_val == -1099511627777,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x10000000001; immval:0x1
+TEST_IMM_OP( srai, x11, x10, -0x8000000001, -0x10000000001, 0x1, x1, 920, x5)
+
+inst_139:
+// rs1_val == -2199023255553,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x20000000001; immval:0x5
+TEST_IMM_OP( srai, x11, x10, -0x1000000001, -0x20000000001, 0x5, x1, 928, x5)
+
+inst_140:
+// rs1_val == -4398046511105,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x40000000001; immval:0x8
+TEST_IMM_OP( srai, x11, x10, -0x400000001, -0x40000000001, 0x8, x1, 936, x5)
+
+inst_141:
+// rs1_val == -8796093022209,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x80000000001; immval:0x6
+TEST_IMM_OP( srai, x11, x10, -0x2000000001, -0x80000000001, 0x6, x1, 944, x5)
+
+inst_142:
+// rs1_val == -17592186044417,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x100000000001; immval:0x9
+TEST_IMM_OP( srai, x11, x10, -0x800000001, -0x100000000001, 0x9, x1, 952, x5)
+
+inst_143:
+// rs1_val == -70368744177665,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x400000000001; immval:0x8
+TEST_IMM_OP( srai, x11, x10, -0x4000000001, -0x400000000001, 0x8, x1, 960, x5)
+
+inst_144:
+// rs1_val == -140737488355329,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x800000000001; immval:0x2
+TEST_IMM_OP( srai, x11, x10, -0x200000000001, -0x800000000001, 0x2, x1, 968, x5)
+
+inst_145:
+// rs1_val == -281474976710657,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x1000000000001; immval:0x1f
+TEST_IMM_OP( srai, x11, x10, -0x20001, -0x1000000000001, 0x1f, x1, 976, x5)
+
+inst_146:
+// rs1_val == -562949953421313,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x2000000000001; immval:0x3b
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x2000000000001, 0x3b, x1, 984, x5)
+
+inst_147:
+// rs1_val == -1125899906842625,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x4000000000001; immval:0x37
+TEST_IMM_OP( srai, x11, x10, -0x1, -0x4000000000001, 0x37, x1, 992, x5)
+
+inst_148:
+// rs1_val == -2251799813685249,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x8000000000001; immval:0x3
+TEST_IMM_OP( srai, x11, x10, -0x1000000000001, -0x8000000000001, 0x3, x1, 1000, x5)
+
+inst_149:
+// rs1_val == -4503599627370497,
+// opcode: srai ; op1:x10; dest:x11; op1val:-0x10000000000001; immval:0x13
+TEST_IMM_OP( srai, x11, x10, -0x200000001, -0x10000000000001, 0x13, x1, 1008, x5)
+
+inst_150:
+// rs1_val == 8, imm_val == 42
+// opcode: srai ; op1:x10; dest:x11; op1val:0x8; immval:0x2a
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x8, 0x2a, x1, 1016, x5)
+
+inst_151:
+// rs1_val == 256,
+// opcode: srai ; op1:x10; dest:x11; op1val:0x100; immval:0x12
+TEST_IMM_OP( srai, x11, x10, 0x0, 0x100, 0x12, x1, 1024, x5)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x7_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x7_1:
+ .fill 23*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 129*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/sraiw-01.S b/riscof/suite/rv64i_m/I/sraiw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..b44bd16dac31f353e32219e5cf1bbd95321ec887
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/sraiw-01.S
@@ -0,0 +1,834 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sraiw instruction of the RISC-V I extension for the sraiw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*);def TEST_CASE_1=True;",sraiw)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rs1 == rd, rs1==x5, rd==x5, rs1_val < 0 and imm_val > 0 and imm_val < 32, imm_val == 23, rs1_val == -513
+// opcode: sraiw ; op1:x5; dest:x5; op1val:-0x201; immval:0x17
+TEST_IMM_OP( sraiw, x5, x5, -0x1, -0x201, 0x17, x2, 0, x8)
+
+inst_1:
+// rs1 != rd, rs1==x12, rd==x24, rs1_val > 0 and imm_val > 0 and imm_val < 32, rs1_val == 4294967296
+// opcode: sraiw ; op1:x12; dest:x24; op1val:0x100000000; immval:0x11
+TEST_IMM_OP( sraiw, x24, x12, 0x0, 0x100000000, 0x11, x2, 8, x8)
+
+inst_2:
+// rs1==x20, rd==x18, rs1_val < 0 and imm_val == 0, rs1_val == -549755813889
+// opcode: sraiw ; op1:x20; dest:x18; op1val:-0x8000000001; immval:0x0
+TEST_IMM_OP( sraiw, x18, x20, -0x1, -0x8000000001, 0x0, x2, 16, x8)
+
+inst_3:
+// rs1==x15, rd==x6, rs1_val > 0 and imm_val == 0, rs1_val == 17592186044416
+// opcode: sraiw ; op1:x15; dest:x6; op1val:0x100000000000; immval:0x0
+TEST_IMM_OP( sraiw, x6, x15, 0x0, 0x100000000000, 0x0, x2, 24, x8)
+
+inst_4:
+// rs1==x29, rd==x13, rs1_val < 0 and imm_val == 31,
+// opcode: sraiw ; op1:x29; dest:x13; op1val:-0xa; immval:0x1f
+TEST_IMM_OP( sraiw, x13, x29, -0x1, -0xa, 0x1f, x2, 32, x8)
+
+inst_5:
+// rs1==x24, rd==x30, rs1_val > 0 and imm_val == 31,
+// opcode: sraiw ; op1:x24; dest:x30; op1val:0x100000000000; immval:0x1f
+TEST_IMM_OP( sraiw, x30, x24, 0x0, 0x100000000000, 0x1f, x2, 40, x8)
+
+inst_6:
+// rs1==x28, rd==x16, rs1_val == imm_val and imm_val > 0 and imm_val < 32, rs1_val==3
+// opcode: sraiw ; op1:x28; dest:x16; op1val:0x3; immval:0x3
+TEST_IMM_OP( sraiw, x16, x28, 0x0, 0x3, 0x3, x2, 48, x8)
+
+inst_7:
+// rs1==x16, rd==x9, rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < 32, rs1_val == -9223372036854775808
+// opcode: sraiw ; op1:x16; dest:x9; op1val:-0x8000000000000000; immval:0x11
+TEST_IMM_OP( sraiw, x9, x16, 0x0, -0x8000000000000000, 0x11, x2, 56, x8)
+
+inst_8:
+// rs1==x30, rd==x10, rs1_val == 0 and imm_val >= 0 and imm_val < 32, rs1_val==0
+// opcode: sraiw ; op1:x30; dest:x10; op1val:0x0; immval:0xe
+TEST_IMM_OP( sraiw, x10, x30, 0x0, 0x0, 0xe, x2, 64, x8)
+
+inst_9:
+// rs1==x0, rd==x20, rs1_val == (2**(xlen-1)-1) and imm_val >= 0 and imm_val < 32, imm_val == 27, rs1_val == 9223372036854775807
+// opcode: sraiw ; op1:x0; dest:x20; op1val:0x0; immval:0x1b
+TEST_IMM_OP( sraiw, x20, x0, 0x0, 0x0, 0x1b, x2, 72, x8)
+
+inst_10:
+// rs1==x27, rd==x29, rs1_val == 1 and imm_val >= 0 and imm_val < 32, rs1_val == 1, imm_val == 8
+// opcode: sraiw ; op1:x27; dest:x29; op1val:0x1; immval:0x8
+TEST_IMM_OP( sraiw, x29, x27, 0x0, 0x1, 0x8, x2, 80, x8)
+
+inst_11:
+// rs1==x13, rd==x26, rs1_val == 2, imm_val == 15, rs1_val==2
+// opcode: sraiw ; op1:x13; dest:x26; op1val:0x2; immval:0xf
+TEST_IMM_OP( sraiw, x26, x13, 0x0, 0x2, 0xf, x2, 88, x8)
+
+inst_12:
+// rs1==x7, rd==x17, rs1_val == 4, rs1_val==4, imm_val == 30
+// opcode: sraiw ; op1:x7; dest:x17; op1val:0x4; immval:0x1e
+TEST_IMM_OP( sraiw, x17, x7, 0x0, 0x4, 0x1e, x2, 96, x8)
+
+inst_13:
+// rs1==x14, rd==x7, rs1_val == 8,
+// opcode: sraiw ; op1:x14; dest:x7; op1val:0x8; immval:0x9
+TEST_IMM_OP( sraiw, x7, x14, 0x0, 0x8, 0x9, x2, 104, x8)
+
+inst_14:
+// rs1==x23, rd==x1, rs1_val == 16,
+// opcode: sraiw ; op1:x23; dest:x1; op1val:0x10; immval:0x13
+TEST_IMM_OP( sraiw, x1, x23, 0x0, 0x10, 0x13, x2, 112, x8)
+
+inst_15:
+// rs1==x3, rd==x11, rs1_val == 32, imm_val == 1
+// opcode: sraiw ; op1:x3; dest:x11; op1val:0x20; immval:0x1
+TEST_IMM_OP( sraiw, x11, x3, 0x10, 0x20, 0x1, x2, 120, x8)
+
+inst_16:
+// rs1==x1, rd==x25, rs1_val == 64, imm_val == 29
+// opcode: sraiw ; op1:x1; dest:x25; op1val:0x40; immval:0x1d
+TEST_IMM_OP( sraiw, x25, x1, 0x0, 0x40, 0x1d, x2, 128, x8)
+
+inst_17:
+// rs1==x6, rd==x14, rs1_val == 128,
+// opcode: sraiw ; op1:x6; dest:x14; op1val:0x80; immval:0x1d
+TEST_IMM_OP( sraiw, x14, x6, 0x0, 0x80, 0x1d, x2, 136, x8)
+
+inst_18:
+// rs1==x26, rd==x22, rs1_val == 256, imm_val == 10
+// opcode: sraiw ; op1:x26; dest:x22; op1val:0x100; immval:0xa
+TEST_IMM_OP( sraiw, x22, x26, 0x0, 0x100, 0xa, x2, 144, x8)
+
+inst_19:
+// rs1==x17, rd==x23, rs1_val == 512,
+// opcode: sraiw ; op1:x17; dest:x23; op1val:0x200; immval:0x7
+TEST_IMM_OP( sraiw, x23, x17, 0x4, 0x200, 0x7, x2, 152, x8)
+
+inst_20:
+// rs1==x21, rd==x3, rs1_val == 1024,
+// opcode: sraiw ; op1:x21; dest:x3; op1val:0x400; immval:0xa
+TEST_IMM_OP( sraiw, x3, x21, 0x1, 0x400, 0xa, x2, 160, x8)
+
+inst_21:
+// rs1==x11, rd==x4, rs1_val == 2048,
+// opcode: sraiw ; op1:x11; dest:x4; op1val:0x800; immval:0x0
+TEST_IMM_OP( sraiw, x4, x11, 0x800, 0x800, 0x0, x2, 168, x8)
+
+inst_22:
+// rs1==x18, rd==x28, rs1_val == 4096, imm_val == 4
+// opcode: sraiw ; op1:x18; dest:x28; op1val:0x1000; immval:0x4
+TEST_IMM_OP( sraiw, x28, x18, 0x100, 0x1000, 0x4, x2, 176, x3)
+
+inst_23:
+// rs1==x4, rd==x0, rs1_val == 8192,
+// opcode: sraiw ; op1:x4; dest:x0; op1val:0x2000; immval:0x1d
+TEST_IMM_OP( sraiw, x0, x4, 0, 0x2000, 0x1d, x2, 184, x3)
+
+inst_24:
+// rs1==x8, rd==x15, rs1_val == 16384,
+// opcode: sraiw ; op1:x8; dest:x15; op1val:0x4000; immval:0x8
+TEST_IMM_OP( sraiw, x15, x8, 0x40, 0x4000, 0x8, x2, 192, x3)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_25:
+// rs1==x2, rd==x12, rs1_val == 32768,
+// opcode: sraiw ; op1:x2; dest:x12; op1val:0x8000; immval:0x1d
+TEST_IMM_OP( sraiw, x12, x2, 0x0, 0x8000, 0x1d, x1, 0, x3)
+
+inst_26:
+// rs1==x22, rd==x31, rs1_val == 65536,
+// opcode: sraiw ; op1:x22; dest:x31; op1val:0x10000; immval:0xc
+TEST_IMM_OP( sraiw, x31, x22, 0x10, 0x10000, 0xc, x1, 8, x3)
+
+inst_27:
+// rs1==x19, rd==x21, rs1_val == 131072,
+// opcode: sraiw ; op1:x19; dest:x21; op1val:0x20000; immval:0xe
+TEST_IMM_OP( sraiw, x21, x19, 0x8, 0x20000, 0xe, x1, 16, x3)
+
+inst_28:
+// rs1==x31, rd==x27, rs1_val == 262144,
+// opcode: sraiw ; op1:x31; dest:x27; op1val:0x40000; immval:0x7
+TEST_IMM_OP( sraiw, x27, x31, 0x800, 0x40000, 0x7, x1, 24, x3)
+
+inst_29:
+// rs1==x10, rd==x8, rs1_val == 524288, imm_val == 2
+// opcode: sraiw ; op1:x10; dest:x8; op1val:0x80000; immval:0x2
+TEST_IMM_OP( sraiw, x8, x10, 0x20000, 0x80000, 0x2, x1, 32, x3)
+
+inst_30:
+// rs1==x25, rd==x19, rs1_val == 1048576,
+// opcode: sraiw ; op1:x25; dest:x19; op1val:0x100000; immval:0x7
+TEST_IMM_OP( sraiw, x19, x25, 0x2000, 0x100000, 0x7, x1, 40, x3)
+
+inst_31:
+// rs1==x9, rd==x2, rs1_val == 2097152,
+// opcode: sraiw ; op1:x9; dest:x2; op1val:0x200000; immval:0xb
+TEST_IMM_OP( sraiw, x2, x9, 0x400, 0x200000, 0xb, x1, 48, x3)
+
+inst_32:
+// rs1_val == 4194304,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x400000; immval:0x1d
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x400000, 0x1d, x1, 56, x3)
+
+inst_33:
+// rs1_val == 8388608,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x800000; immval:0xa
+TEST_IMM_OP( sraiw, x11, x10, 0x2000, 0x800000, 0xa, x1, 64, x3)
+
+inst_34:
+// rs1_val == 16777216,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x1000000; immval:0x6
+TEST_IMM_OP( sraiw, x11, x10, 0x40000, 0x1000000, 0x6, x1, 72, x3)
+
+inst_35:
+// rs1_val == 33554432,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x2000000; immval:0x6
+TEST_IMM_OP( sraiw, x11, x10, 0x80000, 0x2000000, 0x6, x1, 80, x3)
+
+inst_36:
+// rs1_val == 67108864,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x4000000; immval:0x1b
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x4000000, 0x1b, x1, 88, x3)
+
+inst_37:
+// rs1_val == 134217728,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x8000000; immval:0xc
+TEST_IMM_OP( sraiw, x11, x10, 0x8000, 0x8000000, 0xc, x1, 96, x3)
+
+inst_38:
+// rs1_val == 268435456,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x10000000; immval:0x5
+TEST_IMM_OP( sraiw, x11, x10, 0x800000, 0x10000000, 0x5, x1, 104, x3)
+
+inst_39:
+// rs1_val == 536870912,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x20000000; immval:0x3
+TEST_IMM_OP( sraiw, x11, x10, 0x4000000, 0x20000000, 0x3, x1, 112, x3)
+
+inst_40:
+// rs1_val == 1073741824,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x40000000; immval:0x1b
+TEST_IMM_OP( sraiw, x11, x10, 0x8, 0x40000000, 0x1b, x1, 120, x3)
+
+inst_41:
+// rs1_val == 2147483648,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x80000000; immval:0xb
+TEST_IMM_OP( sraiw, x11, x10, -0x100000, 0x80000000, 0xb, x1, 128, x3)
+
+inst_42:
+// rs1_val == 8589934592, imm_val == 21
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x200000000; immval:0x15
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x200000000, 0x15, x1, 136, x3)
+
+inst_43:
+// rs1_val == 17179869184,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x400000000; immval:0x8
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x400000000, 0x8, x1, 144, x3)
+
+inst_44:
+// rs1_val == 34359738368,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x800000000; immval:0xc
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x800000000, 0xc, x1, 152, x3)
+
+inst_45:
+// rs1_val == 68719476736,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x1000000000; immval:0x1
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x1000000000, 0x1, x1, 160, x3)
+
+inst_46:
+// rs1_val == 137438953472,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x2000000000; immval:0x1f
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x2000000000, 0x1f, x1, 168, x3)
+
+inst_47:
+// rs1_val == 274877906944,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x4000000000; immval:0xd
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x4000000000, 0xd, x1, 176, x3)
+
+inst_48:
+// rs1_val == 549755813888,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x8000000000; immval:0xf
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x8000000000, 0xf, x1, 184, x3)
+
+inst_49:
+// rs1_val == 1099511627776,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x10000000000; immval:0x4
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x10000000000, 0x4, x1, 192, x3)
+
+inst_50:
+// rs1_val == 2199023255552,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x20000000000; immval:0xc
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x20000000000, 0xc, x1, 200, x3)
+
+inst_51:
+// rs1_val == 4398046511104,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x40000000000; immval:0x7
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x40000000000, 0x7, x1, 208, x3)
+
+inst_52:
+// rs1_val == 8796093022208,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x80000000000; immval:0x1b
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x80000000000, 0x1b, x1, 216, x3)
+
+inst_53:
+// rs1_val == 35184372088832,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x200000000000; immval:0x17
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x200000000000, 0x17, x1, 224, x3)
+
+inst_54:
+// rs1_val == 70368744177664,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x400000000000; immval:0x1
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x400000000000, 0x1, x1, 232, x3)
+
+inst_55:
+// rs1_val == 140737488355328,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x800000000000; immval:0xc
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x800000000000, 0xc, x1, 240, x3)
+
+inst_56:
+// rs1_val == 281474976710656,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x1000000000000; immval:0x12
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x1000000000000, 0x12, x1, 248, x3)
+
+inst_57:
+// rs1_val == 562949953421312,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x2000000000000; immval:0x1
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x2000000000000, 0x1, x1, 256, x3)
+
+inst_58:
+// rs1_val == 1125899906842624,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x4000000000000; immval:0x9
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x4000000000000, 0x9, x1, 264, x3)
+
+inst_59:
+// rs1_val == 2251799813685248,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x8000000000000; immval:0x1e
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x8000000000000, 0x1e, x1, 272, x3)
+
+inst_60:
+// rs1_val == 4503599627370496,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x10000000000000; immval:0x9
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x10000000000000, 0x9, x1, 280, x3)
+
+inst_61:
+// rs1_val == 9007199254740992,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x20000000000000; immval:0x8
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x20000000000000, 0x8, x1, 288, x3)
+
+inst_62:
+// rs1_val == 18014398509481984,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x40000000000000; immval:0x1b
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x40000000000000, 0x1b, x1, 296, x3)
+
+inst_63:
+// rs1_val == 36028797018963968,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x80000000000000; immval:0xc
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x80000000000000, 0xc, x1, 304, x3)
+
+inst_64:
+// rs1_val == 72057594037927936,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x100000000000000; immval:0x8
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x100000000000000, 0x8, x1, 312, x3)
+
+inst_65:
+// rs1_val == 144115188075855872,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x200000000000000; immval:0x5
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x200000000000000, 0x5, x1, 320, x3)
+
+inst_66:
+// rs1_val == 288230376151711744, imm_val == 16
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x400000000000000; immval:0x10
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x400000000000000, 0x10, x1, 328, x3)
+
+inst_67:
+// rs1_val == 576460752303423488,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x800000000000000; immval:0xb
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x800000000000000, 0xb, x1, 336, x3)
+
+inst_68:
+// rs1_val == 1152921504606846976,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x1000000000000000; immval:0x1d
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x1000000000000000, 0x1d, x1, 344, x3)
+
+inst_69:
+// rs1_val == 2305843009213693952,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x2000000000000000; immval:0xf
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x2000000000000000, 0xf, x1, 352, x3)
+
+inst_70:
+// rs1_val == 4611686018427387904,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x4000000000000000; immval:0x5
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x4000000000000000, 0x5, x1, 360, x3)
+
+inst_71:
+// rs1_val == -2,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x2; immval:0x17
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x2, 0x17, x1, 368, x3)
+
+inst_72:
+// rs1_val == -3,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x3; immval:0x11
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x3, 0x11, x1, 376, x3)
+
+inst_73:
+// rs1_val == -5,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x5; immval:0x2
+TEST_IMM_OP( sraiw, x11, x10, -0x2, -0x5, 0x2, x1, 384, x3)
+
+inst_74:
+// rs1_val == -9,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x9; immval:0x1f
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x9, 0x1f, x1, 392, x3)
+
+inst_75:
+// rs1_val == -17,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x11; immval:0x13
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x11, 0x13, x1, 400, x3)
+
+inst_76:
+// rs1_val == -33,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x21; immval:0xc
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x21, 0xc, x1, 408, x3)
+
+inst_77:
+// rs1_val == -65,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x41; immval:0x6
+TEST_IMM_OP( sraiw, x11, x10, -0x2, -0x41, 0x6, x1, 416, x3)
+
+inst_78:
+// rs1_val == -129,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x81; immval:0x5
+TEST_IMM_OP( sraiw, x11, x10, -0x5, -0x81, 0x5, x1, 424, x3)
+
+inst_79:
+// rs1_val == -257,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x101; immval:0x6
+TEST_IMM_OP( sraiw, x11, x10, -0x5, -0x101, 0x6, x1, 432, x3)
+
+inst_80:
+// rs1_val == -1025,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x401; immval:0x1f
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x401, 0x1f, x1, 440, x3)
+
+inst_81:
+// rs1_val == -2049,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x801; immval:0x1b
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x801, 0x1b, x1, 448, x3)
+
+inst_82:
+// rs1_val == -4097,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x1001; immval:0xc
+TEST_IMM_OP( sraiw, x11, x10, -0x2, -0x1001, 0xc, x1, 456, x3)
+
+inst_83:
+// rs1_val == -8193,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x2001; immval:0x1e
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x2001, 0x1e, x1, 464, x3)
+
+inst_84:
+// rs1_val == -16385,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x4001; immval:0x6
+TEST_IMM_OP( sraiw, x11, x10, -0x101, -0x4001, 0x6, x1, 472, x3)
+
+inst_85:
+// rs1_val == -32769,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x8001; immval:0xa
+TEST_IMM_OP( sraiw, x11, x10, -0x21, -0x8001, 0xa, x1, 480, x3)
+
+inst_86:
+// rs1_val == -65537,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x10001; immval:0x3
+TEST_IMM_OP( sraiw, x11, x10, -0x2001, -0x10001, 0x3, x1, 488, x3)
+
+inst_87:
+// rs1_val == -131073,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x20001; immval:0x11
+TEST_IMM_OP( sraiw, x11, x10, -0x2, -0x20001, 0x11, x1, 496, x3)
+
+inst_88:
+// rs1_val == -262145,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x40001; immval:0x4
+TEST_IMM_OP( sraiw, x11, x10, -0x4001, -0x40001, 0x4, x1, 504, x3)
+
+inst_89:
+// rs1_val == -9007199254740993,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x20000000000001; immval:0x7
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x20000000000001, 0x7, x1, 512, x3)
+
+inst_90:
+// rs1_val == -18014398509481985,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x40000000000001; immval:0xc
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x40000000000001, 0xc, x1, 520, x3)
+
+inst_91:
+// rs1_val == -36028797018963969,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x80000000000001; immval:0x4
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x80000000000001, 0x4, x1, 528, x3)
+
+inst_92:
+// rs1_val == -72057594037927937,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x100000000000001; immval:0x5
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x100000000000001, 0x5, x1, 536, x3)
+
+inst_93:
+// rs1_val == -144115188075855873,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x200000000000001; immval:0x5
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x200000000000001, 0x5, x1, 544, x3)
+
+inst_94:
+// rs1_val == -288230376151711745,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x400000000000001; immval:0xe
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x400000000000001, 0xe, x1, 552, x3)
+
+inst_95:
+// rs1_val == -576460752303423489,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x800000000000001; immval:0x6
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x800000000000001, 0x6, x1, 560, x3)
+
+inst_96:
+// rs1_val == -1152921504606846977,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x1000000000000001; immval:0x12
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x1000000000000001, 0x12, x1, 568, x3)
+
+inst_97:
+// rs1_val == -2305843009213693953,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x2000000000000001; immval:0x1
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x2000000000000001, 0x1, x1, 576, x3)
+
+inst_98:
+// rs1_val == -4611686018427387905,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x4000000000000001; immval:0xa
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x4000000000000001, 0xa, x1, 584, x3)
+
+inst_99:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0xf
+TEST_IMM_OP( sraiw, x11, x10, 0xaaaa, 0x5555555555555555, 0xf, x1, 592, x3)
+
+inst_100:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x4
+TEST_IMM_OP( sraiw, x11, x10, -0x5555556, -0x5555555555555556, 0x4, x1, 600, x3)
+
+inst_101:
+// rs1_val==5,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x5; immval:0x12
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x5, 0x12, x1, 608, x3)
+
+inst_102:
+// rs1_val==3689348814741910323,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x10
+TEST_IMM_OP( sraiw, x11, x10, 0x3333, 0x3333333333333333, 0x10, x1, 616, x3)
+
+inst_103:
+// rs1_val==7378697629483820646,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x9
+TEST_IMM_OP( sraiw, x11, x10, 0x333333, 0x6666666666666666, 0x9, x1, 624, x3)
+
+inst_104:
+// rs1_val==-3037000499,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x10
+TEST_IMM_OP( sraiw, x11, x10, 0x4afb, -0xb504f333, 0x10, x1, 632, x3)
+
+inst_105:
+// rs1_val==3037000499,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x7
+TEST_IMM_OP( sraiw, x11, x10, -0x95f61a, 0xb504f333, 0x7, x1, 640, x3)
+
+inst_106:
+// rs1_val==6148914691236517204,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x1d
+TEST_IMM_OP( sraiw, x11, x10, 0x2, 0x5555555555555554, 0x1d, x1, 648, x3)
+
+inst_107:
+// rs1_val==3689348814741910322,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0xe
+TEST_IMM_OP( sraiw, x11, x10, 0xcccc, 0x3333333333333332, 0xe, x1, 656, x3)
+
+inst_108:
+// rs1_val==7378697629483820645,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x8
+TEST_IMM_OP( sraiw, x11, x10, 0x666666, 0x6666666666666665, 0x8, x1, 664, x3)
+
+inst_109:
+// rs1_val==3037000498,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0xc
+TEST_IMM_OP( sraiw, x11, x10, -0x4afb1, 0xb504f332, 0xc, x1, 672, x3)
+
+inst_110:
+// rs1_val==6148914691236517206,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x6
+TEST_IMM_OP( sraiw, x11, x10, 0x1555555, 0x5555555555555556, 0x6, x1, 680, x3)
+
+inst_111:
+// rs1_val==-6148914691236517205,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x1b
+TEST_IMM_OP( sraiw, x11, x10, -0xb, -0x5555555555555555, 0x1b, x1, 688, x3)
+
+inst_112:
+// rs1_val==6,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x6; immval:0xb
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x6, 0xb, x1, 696, x3)
+
+inst_113:
+// rs1_val==3689348814741910324,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x1d
+TEST_IMM_OP( sraiw, x11, x10, 0x1, 0x3333333333333334, 0x1d, x1, 704, x3)
+
+inst_114:
+// rs1_val==7378697629483820647,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x6
+TEST_IMM_OP( sraiw, x11, x10, 0x1999999, 0x6666666666666667, 0x6, x1, 712, x3)
+
+inst_115:
+// rs1_val==-3037000498,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x9
+TEST_IMM_OP( sraiw, x11, x10, 0x257d86, -0xb504f332, 0x9, x1, 720, x3)
+
+inst_116:
+// rs1_val==3037000500,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x1d
+TEST_IMM_OP( sraiw, x11, x10, -0x3, 0xb504f334, 0x1d, x1, 728, x3)
+
+inst_117:
+// rs1_val == -524289,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x80001; immval:0x1f
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x80001, 0x1f, x1, 736, x3)
+
+inst_118:
+// rs1_val == -1048577,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x100001; immval:0x6
+TEST_IMM_OP( sraiw, x11, x10, -0x4001, -0x100001, 0x6, x1, 744, x3)
+
+inst_119:
+// rs1_val == -2097153,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x200001; immval:0x2
+TEST_IMM_OP( sraiw, x11, x10, -0x80001, -0x200001, 0x2, x1, 752, x3)
+
+inst_120:
+// rs1_val == -4194305,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x400001; immval:0x1f
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x400001, 0x1f, x1, 760, x3)
+
+inst_121:
+// rs1_val == -8388609,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x800001; immval:0x4
+TEST_IMM_OP( sraiw, x11, x10, -0x80001, -0x800001, 0x4, x1, 768, x3)
+
+inst_122:
+// rs1_val == -16777217,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x1000001; immval:0x1d
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x1000001, 0x1d, x1, 776, x3)
+
+inst_123:
+// rs1_val == -33554433,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x2000001; immval:0x10
+TEST_IMM_OP( sraiw, x11, x10, -0x201, -0x2000001, 0x10, x1, 784, x3)
+
+inst_124:
+// rs1_val == -67108865,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x4000001; immval:0x7
+TEST_IMM_OP( sraiw, x11, x10, -0x80001, -0x4000001, 0x7, x1, 792, x3)
+
+inst_125:
+// rs1_val == -134217729,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x8000001; immval:0x3
+TEST_IMM_OP( sraiw, x11, x10, -0x1000001, -0x8000001, 0x3, x1, 800, x3)
+
+inst_126:
+// rs1_val == -268435457,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x10000001; immval:0x4
+TEST_IMM_OP( sraiw, x11, x10, -0x1000001, -0x10000001, 0x4, x1, 808, x3)
+
+inst_127:
+// rs1_val == -536870913,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x20000001; immval:0x6
+TEST_IMM_OP( sraiw, x11, x10, -0x800001, -0x20000001, 0x6, x1, 816, x3)
+
+inst_128:
+// rs1_val == -1073741825,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x40000001; immval:0xe
+TEST_IMM_OP( sraiw, x11, x10, -0x10001, -0x40000001, 0xe, x1, 824, x3)
+
+inst_129:
+// rs1_val == -2147483649,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x80000001; immval:0xb
+TEST_IMM_OP( sraiw, x11, x10, 0xfffff, -0x80000001, 0xb, x1, 832, x3)
+
+inst_130:
+// rs1_val == -4294967297,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x100000001; immval:0x12
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x100000001, 0x12, x1, 840, x3)
+
+inst_131:
+// rs1_val == -8589934593,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x200000001; immval:0x11
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x200000001, 0x11, x1, 848, x3)
+
+inst_132:
+// rs1_val == -17179869185,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x400000001; immval:0xf
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x400000001, 0xf, x1, 856, x3)
+
+inst_133:
+// rs1_val == -34359738369,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x800000001; immval:0xc
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x800000001, 0xc, x1, 864, x3)
+
+inst_134:
+// rs1_val == -68719476737,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x1000000001; immval:0x7
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x1000000001, 0x7, x1, 872, x3)
+
+inst_135:
+// rs1_val == -137438953473,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x2000000001; immval:0xa
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x2000000001, 0xa, x1, 880, x3)
+
+inst_136:
+// rs1_val == -274877906945,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x4000000001; immval:0x1d
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x4000000001, 0x1d, x1, 888, x3)
+
+inst_137:
+// rs1_val == -1099511627777,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x10000000001; immval:0x8
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x10000000001, 0x8, x1, 896, x3)
+
+inst_138:
+// rs1_val == -2199023255553,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x20000000001; immval:0x4
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x20000000001, 0x4, x1, 904, x3)
+
+inst_139:
+// rs1_val == -4398046511105,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x40000000001; immval:0x11
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x40000000001, 0x11, x1, 912, x3)
+
+inst_140:
+// rs1_val == -8796093022209,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x80000000001; immval:0x1f
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x80000000001, 0x1f, x1, 920, x3)
+
+inst_141:
+// rs1_val == -17592186044417,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x100000000001; immval:0x1b
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x100000000001, 0x1b, x1, 928, x3)
+
+inst_142:
+// rs1_val == -35184372088833,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x200000000001; immval:0x1d
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x200000000001, 0x1d, x1, 936, x3)
+
+inst_143:
+// rs1_val == -70368744177665,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x400000000001; immval:0x4
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x400000000001, 0x4, x1, 944, x3)
+
+inst_144:
+// rs1_val == -140737488355329,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x800000000001; immval:0x1
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x800000000001, 0x1, x1, 952, x3)
+
+inst_145:
+// rs1_val == -281474976710657,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x1000000000001; immval:0xe
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x1000000000001, 0xe, x1, 960, x3)
+
+inst_146:
+// rs1_val == -562949953421313,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x2000000000001; immval:0xd
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x2000000000001, 0xd, x1, 968, x3)
+
+inst_147:
+// rs1_val == -1125899906842625,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x4000000000001; immval:0x2
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x4000000000001, 0x2, x1, 976, x3)
+
+inst_148:
+// rs1_val == -2251799813685249,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x8000000000001; immval:0x1d
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x8000000000001, 0x1d, x1, 984, x3)
+
+inst_149:
+// rs1_val == -4503599627370497,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:-0x10000000000001; immval:0xf
+TEST_IMM_OP( sraiw, x11, x10, -0x1, -0x10000000000001, 0xf, x1, 992, x3)
+
+inst_150:
+// rs1_val == (2**(xlen-1)-1) and imm_val >= 0 and imm_val < 32, imm_val == 27, rs1_val == 9223372036854775807
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x7fffffffffffffff; immval:0x1b
+TEST_IMM_OP( sraiw, x11, x10, -0x1, 0x7fffffffffffffff, 0x1b, x1, 1000, x3)
+
+inst_151:
+// rs1_val == 8192,
+// opcode: sraiw ; op1:x10; dest:x11; op1val:0x2000; immval:0x1d
+TEST_IMM_OP( sraiw, x11, x10, 0x0, 0x2000, 0x1d, x1, 1008, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 25*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 127*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/sraw-01.S b/riscof/suite/rv64i_m/I/sraw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..5438ba759dc9bded77b3df0dee4595db04fbcb2b
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/sraw-01.S
@@ -0,0 +1,844 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sraw instruction of the RISC-V i extension for the sraw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64i")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*);def TEST_CASE_1=True;",sraw)
+
+RVTEST_SIGBASE( x3,signature_x3_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x13, rs2==x13, rd==x2, rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == -257, rs2_val == 1
+// opcode: sraw ; op1:x13; op2:x13; dest:x2; op1val:-0x101; op2val:-0x101
+TEST_RR_OP(sraw, x2, x13, x13, -0x1, -0x101, -0x101, x3, 0, x14)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x5, rs2==x15, rd==x15, rs1_val > 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == 4096
+// opcode: sraw ; op1:x5; op2:x15; dest:x15; op1val:0x1000; op2val:0x1f
+TEST_RR_OP(sraw, x15, x5, x15, 0x0, 0x1000, 0x1f, x3, 8, x14)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x6, rs2==x6, rd==x6, rs1_val < 0 and rs2_val == 0, rs1_val == -131073
+// opcode: sraw ; op1:x6; op2:x6; dest:x6; op1val:-0x20001; op2val:-0x20001
+TEST_RR_OP(sraw, x6, x6, x6, -0x1, -0x20001, -0x20001, x3, 16, x14)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x25, rs2==x26, rd==x13, rs1_val > 0 and rs2_val == 0, rs1_val == 524288
+// opcode: sraw ; op1:x25; op2:x26; dest:x13; op1val:0x80000; op2val:0x0
+TEST_RR_OP(sraw, x13, x25, x26, 0x80000, 0x80000, 0x0, x3, 24, x14)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x23, rs2==x11, rd==x23, rs1_val == rs2_val and rs2_val > 0 and rs2_val < xlen,
+// opcode: sraw ; op1:x23; op2:x11; dest:x23; op1val:0x9; op2val:0x9
+TEST_RR_OP(sraw, x23, x23, x11, 0x0, 0x9, 0x9, x3, 32, x14)
+
+inst_5:
+// rs1==x9, rs2==x18, rd==x0, rs1_val == (-2**(xlen-1)) and rs2_val >= 0 and rs2_val < xlen, rs1_val == -9223372036854775808
+// opcode: sraw ; op1:x9; op2:x18; dest:x0; op1val:-0x8000000000000000; op2val:0xe
+TEST_RR_OP(sraw, x0, x9, x18, 0, -0x8000000000000000, 0xe, x3, 40, x14)
+
+inst_6:
+// rs1==x11, rs2==x27, rd==x9, rs1_val == 0 and rs2_val >= 0 and rs2_val < xlen, rs1_val==0
+// opcode: sraw ; op1:x11; op2:x27; dest:x9; op1val:0x0; op2val:0x13
+TEST_RR_OP(sraw, x9, x11, x27, 0x0, 0x0, 0x13, x3, 48, x14)
+
+inst_7:
+// rs1==x30, rs2==x12, rd==x8, rs1_val == (2**(xlen-1)-1) and rs2_val >= 0 and rs2_val < xlen, rs1_val == 9223372036854775807, rs2_val == 21
+// opcode: sraw ; op1:x30; op2:x12; dest:x8; op1val:0x7fffffffffffffff; op2val:0x15
+TEST_RR_OP(sraw, x8, x30, x12, -0x1, 0x7fffffffffffffff, 0x15, x3, 56, x14)
+
+inst_8:
+// rs1==x29, rs2==x7, rd==x21, rs1_val == 1 and rs2_val >= 0 and rs2_val < xlen, rs1_val == 1
+// opcode: sraw ; op1:x29; op2:x7; dest:x21; op1val:0x1; op2val:0x0
+TEST_RR_OP(sraw, x21, x29, x7, 0x1, 0x1, 0x0, x3, 64, x14)
+
+inst_9:
+// rs1==x0, rs2==x24, rd==x5, rs1_val == 2, rs1_val==2, rs2_val == 10
+// opcode: sraw ; op1:x0; op2:x24; dest:x5; op1val:0x0; op2val:0xa
+TEST_RR_OP(sraw, x5, x0, x24, 0x0, 0x0, 0xa, x3, 72, x14)
+
+inst_10:
+// rs1==x19, rs2==x22, rd==x27, rs1_val == 4, rs1_val==4
+// opcode: sraw ; op1:x19; op2:x22; dest:x27; op1val:0x4; op2val:0x13
+TEST_RR_OP(sraw, x27, x19, x22, 0x0, 0x4, 0x13, x3, 80, x14)
+
+inst_11:
+// rs1==x17, rs2==x4, rd==x1, rs1_val == 8,
+// opcode: sraw ; op1:x17; op2:x4; dest:x1; op1val:0x8; op2val:0x9
+TEST_RR_OP(sraw, x1, x17, x4, 0x0, 0x8, 0x9, x3, 88, x14)
+
+inst_12:
+// rs1==x1, rs2==x25, rd==x31, rs1_val == 16, rs2_val == 23
+// opcode: sraw ; op1:x1; op2:x25; dest:x31; op1val:0x10; op2val:0x17
+TEST_RR_OP(sraw, x31, x1, x25, 0x0, 0x10, 0x17, x3, 96, x14)
+
+inst_13:
+// rs1==x10, rs2==x9, rd==x30, rs1_val == 32, rs2_val == 15
+// opcode: sraw ; op1:x10; op2:x9; dest:x30; op1val:0x20; op2val:0xf
+TEST_RR_OP(sraw, x30, x10, x9, 0x0, 0x20, 0xf, x3, 104, x14)
+
+inst_14:
+// rs1==x16, rs2==x23, rd==x26, rs1_val == 64,
+// opcode: sraw ; op1:x16; op2:x23; dest:x26; op1val:0x40; op2val:0x17
+TEST_RR_OP(sraw, x26, x16, x23, 0x0, 0x40, 0x17, x3, 112, x14)
+
+inst_15:
+// rs1==x21, rs2==x8, rd==x28, rs1_val == 128, rs2_val == 4
+// opcode: sraw ; op1:x21; op2:x8; dest:x28; op1val:0x80; op2val:0x4
+TEST_RR_OP(sraw, x28, x21, x8, 0x8, 0x80, 0x4, x3, 120, x9)
+RVTEST_SIGBASE( x6,signature_x6_0)
+
+inst_16:
+// rs1==x20, rs2==x16, rd==x24, rs1_val == 256,
+// opcode: sraw ; op1:x20; op2:x16; dest:x24; op1val:0x100; op2val:0xd
+TEST_RR_OP(sraw, x24, x20, x16, 0x0, 0x100, 0xd, x6, 0, x9)
+
+inst_17:
+// rs1==x27, rs2==x2, rd==x17, rs1_val == 512,
+// opcode: sraw ; op1:x27; op2:x2; dest:x17; op1val:0x200; op2val:0xe
+TEST_RR_OP(sraw, x17, x27, x2, 0x0, 0x200, 0xe, x6, 8, x9)
+
+inst_18:
+// rs1==x15, rs2==x10, rd==x22, rs1_val == 1024,
+// opcode: sraw ; op1:x15; op2:x10; dest:x22; op1val:0x400; op2val:0x5
+TEST_RR_OP(sraw, x22, x15, x10, 0x20, 0x400, 0x5, x6, 16, x9)
+
+inst_19:
+// rs1==x7, rs2==x30, rd==x11, rs1_val == 2048,
+// opcode: sraw ; op1:x7; op2:x30; dest:x11; op1val:0x800; op2val:0xa
+TEST_RR_OP(sraw, x11, x7, x30, 0x2, 0x800, 0xa, x6, 24, x9)
+
+inst_20:
+// rs1==x28, rs2==x1, rd==x25, rs1_val == 8192, rs2_val == 27
+// opcode: sraw ; op1:x28; op2:x1; dest:x25; op1val:0x2000; op2val:0x1b
+TEST_RR_OP(sraw, x25, x28, x1, 0x0, 0x2000, 0x1b, x6, 32, x9)
+
+inst_21:
+// rs1==x31, rs2==x0, rd==x12, rs1_val == 16384, rs2_val == 2
+// opcode: sraw ; op1:x31; op2:x0; dest:x12; op1val:0x4000; op2val:0x0
+TEST_RR_OP(sraw, x12, x31, x0, 0x4000, 0x4000, 0x0, x6, 40, x9)
+
+inst_22:
+// rs1==x22, rs2==x29, rd==x20, rs1_val == 32768,
+// opcode: sraw ; op1:x22; op2:x29; dest:x20; op1val:0x8000; op2val:0xb
+TEST_RR_OP(sraw, x20, x22, x29, 0x10, 0x8000, 0xb, x6, 48, x9)
+
+inst_23:
+// rs1==x14, rs2==x28, rd==x3, rs1_val == 65536, rs2_val == 16
+// opcode: sraw ; op1:x14; op2:x28; dest:x3; op1val:0x10000; op2val:0x10
+TEST_RR_OP(sraw, x3, x14, x28, 0x1, 0x10000, 0x10, x6, 56, x9)
+
+inst_24:
+// rs1==x3, rs2==x21, rd==x29, rs1_val == 131072,
+// opcode: sraw ; op1:x3; op2:x21; dest:x29; op1val:0x20000; op2val:0x13
+TEST_RR_OP(sraw, x29, x3, x21, 0x0, 0x20000, 0x13, x6, 64, x9)
+
+inst_25:
+// rs1==x24, rs2==x20, rd==x14, rs1_val == 262144,
+// opcode: sraw ; op1:x24; op2:x20; dest:x14; op1val:0x40000; op2val:0x10
+TEST_RR_OP(sraw, x14, x24, x20, 0x4, 0x40000, 0x10, x6, 72, x9)
+
+inst_26:
+// rs1==x2, rs2==x19, rd==x10, rs1_val == 1048576, rs2_val == 29
+// opcode: sraw ; op1:x2; op2:x19; dest:x10; op1val:0x100000; op2val:0x1d
+TEST_RR_OP(sraw, x10, x2, x19, 0x0, 0x100000, 0x1d, x6, 80, x9)
+
+inst_27:
+// rs1==x18, rs2==x14, rd==x16, rs1_val == 2097152,
+// opcode: sraw ; op1:x18; op2:x14; dest:x16; op1val:0x200000; op2val:0xe
+TEST_RR_OP(sraw, x16, x18, x14, 0x80, 0x200000, 0xe, x6, 88, x9)
+
+inst_28:
+// rs1==x12, rs2==x17, rd==x18, rs1_val == 4194304,
+// opcode: sraw ; op1:x12; op2:x17; dest:x18; op1val:0x400000; op2val:0x12
+TEST_RR_OP(sraw, x18, x12, x17, 0x10, 0x400000, 0x12, x6, 96, x9)
+
+inst_29:
+// rs1==x8, rs2==x5, rd==x4, rs1_val == 8388608,
+// opcode: sraw ; op1:x8; op2:x5; dest:x4; op1val:0x800000; op2val:0xd
+TEST_RR_OP(sraw, x4, x8, x5, 0x400, 0x800000, 0xd, x6, 104, x9)
+
+inst_30:
+// rs1==x4, rs2==x31, rd==x7, rs1_val == 16777216,
+// opcode: sraw ; op1:x4; op2:x31; dest:x7; op1val:0x1000000; op2val:0x9
+TEST_RR_OP(sraw, x7, x4, x31, 0x8000, 0x1000000, 0x9, x6, 112, x9)
+
+inst_31:
+// rs1==x26, rs2==x3, rd==x19, rs1_val == 33554432, rs2_val == 8
+// opcode: sraw ; op1:x26; op2:x3; dest:x19; op1val:0x2000000; op2val:0x8
+TEST_RR_OP(sraw, x19, x26, x3, 0x20000, 0x2000000, 0x8, x6, 120, x9)
+
+inst_32:
+// rs1_val == 67108864, rs2_val == 30
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x1e
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x4000000, 0x1e, x6, 128, x1)
+
+inst_33:
+// rs1_val == 134217728,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0xc
+TEST_RR_OP(sraw, x12, x10, x11, 0x8000, 0x8000000, 0xc, x6, 136, x1)
+
+inst_34:
+// rs1_val == 268435456,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x1e
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x10000000, 0x1e, x6, 144, x1)
+
+inst_35:
+// rs1_val == 536870912,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x0
+TEST_RR_OP(sraw, x12, x10, x11, 0x20000000, 0x20000000, 0x0, x6, 152, x1)
+
+inst_36:
+// rs1_val == 1073741824,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x1e
+TEST_RR_OP(sraw, x12, x10, x11, 0x1, 0x40000000, 0x1e, x6, 160, x1)
+
+inst_37:
+// rs1_val == 2147483648,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0xd
+TEST_RR_OP(sraw, x12, x10, x11, -0x40000, 0x80000000, 0xd, x6, 168, x1)
+
+inst_38:
+// rs1_val == 4294967296,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x4
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x100000000, 0x4, x6, 176, x1)
+
+inst_39:
+// rs1_val == 8589934592,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:0x11
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x200000000, 0x11, x6, 184, x1)
+
+inst_40:
+// rs1_val == 17179869184,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:0x4
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x400000000, 0x4, x6, 192, x1)
+
+inst_41:
+// rs1_val == 34359738368,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:0xa
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x800000000, 0xa, x6, 200, x1)
+
+inst_42:
+// rs1_val == 68719476736,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:0x5
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x1000000000, 0x5, x6, 208, x1)
+
+inst_43:
+// rs1_val == 137438953472,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:0x1f
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x2000000000, 0x1f, x6, 216, x1)
+
+inst_44:
+// rs1_val == 274877906944,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:0xa
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x4000000000, 0xa, x6, 224, x1)
+
+inst_45:
+// rs1_val == 549755813888,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0x1e
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x8000000000, 0x1e, x6, 232, x1)
+
+inst_46:
+// rs1_val == 1099511627776,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x1
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x10000000000, 0x1, x6, 240, x1)
+
+inst_47:
+// rs1_val == 2199023255552,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:0x1
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x20000000000, 0x1, x6, 248, x1)
+
+inst_48:
+// rs1_val == 4398046511104,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:0x4
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x40000000000, 0x4, x6, 256, x1)
+
+inst_49:
+// rs1_val == 8796093022208,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:0x2
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x80000000000, 0x2, x6, 264, x1)
+
+inst_50:
+// rs1_val == 17592186044416,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:0x9
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x100000000000, 0x9, x6, 272, x1)
+
+inst_51:
+// rs1_val == 35184372088832,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:0x1f
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x200000000000, 0x1f, x6, 280, x1)
+
+inst_52:
+// rs1_val == 70368744177664,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:0x17
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x400000000000, 0x17, x6, 288, x1)
+
+inst_53:
+// rs1_val == 140737488355328,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:0x6
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x800000000000, 0x6, x6, 296, x1)
+
+inst_54:
+// rs1_val == 281474976710656,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0xc
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x1000000000000, 0xc, x6, 304, x1)
+
+inst_55:
+// rs1_val == 562949953421312,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:0xb
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x2000000000000, 0xb, x6, 312, x1)
+
+inst_56:
+// rs1_val == 1125899906842624,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:0x8
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x4000000000000, 0x8, x6, 320, x1)
+
+inst_57:
+// rs1_val == 2251799813685248,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:0xc
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x8000000000000, 0xc, x6, 328, x1)
+
+inst_58:
+// rs1_val == 4503599627370496,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:0x1b
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x10000000000000, 0x1b, x6, 336, x1)
+
+inst_59:
+// rs1_val == 9007199254740992,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:0x0
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x20000000000000, 0x0, x6, 344, x1)
+
+inst_60:
+// rs1_val == 18014398509481984,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:0x1d
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x40000000000000, 0x1d, x6, 352, x1)
+
+inst_61:
+// rs1_val == 36028797018963968,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:0x1d
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x80000000000000, 0x1d, x6, 360, x1)
+
+inst_62:
+// rs1_val == 72057594037927936,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:0x17
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x100000000000000, 0x17, x6, 368, x1)
+
+inst_63:
+// rs1_val == 144115188075855872,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:0x17
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x200000000000000, 0x17, x6, 376, x1)
+
+inst_64:
+// rs1_val == 288230376151711744,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:0xa
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x400000000000000, 0xa, x6, 384, x1)
+
+inst_65:
+// rs1_val == 576460752303423488,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:0xa
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x800000000000000, 0xa, x6, 392, x1)
+
+inst_66:
+// rs1_val == 1152921504606846976,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:0x5
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x1000000000000000, 0x5, x6, 400, x1)
+
+inst_67:
+// rs1_val == 2305843009213693952,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:0x3
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x2000000000000000, 0x3, x6, 408, x1)
+
+inst_68:
+// rs1_val == 4611686018427387904,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:0x6
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x4000000000000000, 0x6, x6, 416, x1)
+
+inst_69:
+// rs1_val == -2,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x1f
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x2, 0x1f, x6, 424, x1)
+
+inst_70:
+// rs1_val == -3,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0xa
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x3, 0xa, x6, 432, x1)
+
+inst_71:
+// rs1_val == -5,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0x1f
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x5, 0x1f, x6, 440, x1)
+
+inst_72:
+// rs1_val == -9,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x8
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x9, 0x8, x6, 448, x1)
+
+inst_73:
+// rs1_val == -17,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:0xd
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x11, 0xd, x6, 456, x1)
+
+inst_74:
+// rs1_val == -33,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x15
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x21, 0x15, x6, 464, x1)
+
+inst_75:
+// rs1_val == -65,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x15
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x41, 0x15, x6, 472, x1)
+
+inst_76:
+// rs1_val == -129,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x2
+TEST_RR_OP(sraw, x12, x10, x11, -0x21, -0x81, 0x2, x6, 480, x1)
+
+inst_77:
+// rs1_val == -513,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x9
+TEST_RR_OP(sraw, x12, x10, x11, -0x2, -0x201, 0x9, x6, 488, x1)
+
+inst_78:
+// rs1_val == -1025,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x15
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x401, 0x15, x6, 496, x1)
+
+inst_79:
+// rs1_val == -2049,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x17
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x801, 0x17, x6, 504, x1)
+
+inst_80:
+// rs1_val == -4097,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x4
+TEST_RR_OP(sraw, x12, x10, x11, -0x101, -0x1001, 0x4, x6, 512, x1)
+
+inst_81:
+// rs1_val == -8193,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x5
+TEST_RR_OP(sraw, x12, x10, x11, -0x101, -0x2001, 0x5, x6, 520, x1)
+
+inst_82:
+// rs1_val == -16385,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x0
+TEST_RR_OP(sraw, x12, x10, x11, -0x4001, -0x4001, 0x0, x6, 528, x1)
+
+inst_83:
+// rs1_val == -32769,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x7
+TEST_RR_OP(sraw, x12, x10, x11, -0x101, -0x8001, 0x7, x6, 536, x1)
+
+inst_84:
+// rs1_val == -65537,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x1f
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x10001, 0x1f, x6, 544, x1)
+
+inst_85:
+// rs1_val == -262145,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0xb
+TEST_RR_OP(sraw, x12, x10, x11, -0x81, -0x40001, 0xb, x6, 552, x1)
+
+inst_86:
+// rs1_val == -524289,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x6
+TEST_RR_OP(sraw, x12, x10, x11, -0x2001, -0x80001, 0x6, x6, 560, x1)
+
+inst_87:
+// rs1_val == -1048577,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x5
+TEST_RR_OP(sraw, x12, x10, x11, -0x8001, -0x100001, 0x5, x6, 568, x1)
+
+inst_88:
+// rs1_val == -36028797018963969,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:0xb
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x80000000000001, 0xb, x6, 576, x1)
+
+inst_89:
+// rs1_val == -72057594037927937,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:0x17
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x100000000000001, 0x17, x6, 584, x1)
+
+inst_90:
+// rs1_val == -144115188075855873,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:0x10
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x200000000000001, 0x10, x6, 592, x1)
+
+inst_91:
+// rs1_val == -288230376151711745,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000000001; op2val:0x11
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x400000000000001, 0x11, x6, 600, x1)
+
+inst_92:
+// rs1_val == -576460752303423489,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:0x0
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x800000000000001, 0x0, x6, 608, x1)
+
+inst_93:
+// rs1_val == -1152921504606846977,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:0x0
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x1000000000000001, 0x0, x6, 616, x1)
+
+inst_94:
+// rs1_val == -2305843009213693953,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:0x1d
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x2000000000000001, 0x1d, x6, 624, x1)
+
+inst_95:
+// rs1_val == -4611686018427387905,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:0x7
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x4000000000000001, 0x7, x6, 632, x1)
+
+inst_96:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x7
+TEST_RR_OP(sraw, x12, x10, x11, 0xaaaaaa, 0x5555555555555555, 0x7, x6, 640, x1)
+
+inst_97:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x9
+TEST_RR_OP(sraw, x12, x10, x11, -0x2aaaab, -0x5555555555555556, 0x9, x6, 648, x1)
+
+inst_98:
+// rs1_val==3,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x12
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x3, 0x12, x6, 656, x1)
+
+inst_99:
+// rs1_val==5,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x1
+TEST_RR_OP(sraw, x12, x10, x11, 0x2, 0x5, 0x1, x6, 664, x1)
+
+inst_100:
+// rs1_val==3689348814741910323,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x1d
+TEST_RR_OP(sraw, x12, x10, x11, 0x1, 0x3333333333333333, 0x1d, x6, 672, x1)
+
+inst_101:
+// rs1_val==7378697629483820646,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3
+TEST_RR_OP(sraw, x12, x10, x11, 0xccccccc, 0x6666666666666666, 0x3, x6, 680, x1)
+
+inst_102:
+// rs1_val==-3037000499,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x13
+TEST_RR_OP(sraw, x12, x10, x11, 0x95f, -0xb504f333, 0x13, x6, 688, x1)
+
+inst_103:
+// rs1_val==3037000499,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xc
+TEST_RR_OP(sraw, x12, x10, x11, -0x4afb1, 0xb504f333, 0xc, x6, 696, x1)
+
+inst_104:
+// rs1_val==6148914691236517204,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x1e
+TEST_RR_OP(sraw, x12, x10, x11, 0x1, 0x5555555555555554, 0x1e, x6, 704, x1)
+
+inst_105:
+// rs1_val==3689348814741910322,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x9
+TEST_RR_OP(sraw, x12, x10, x11, 0x199999, 0x3333333333333332, 0x9, x6, 712, x1)
+
+inst_106:
+// rs1_val==7378697629483820645,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x2
+TEST_RR_OP(sraw, x12, x10, x11, 0x19999999, 0x6666666666666665, 0x2, x6, 720, x1)
+
+inst_107:
+// rs1_val==3037000498,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x15
+TEST_RR_OP(sraw, x12, x10, x11, -0x258, 0xb504f332, 0x15, x6, 728, x1)
+
+inst_108:
+// rs1_val==6148914691236517206,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x1e
+TEST_RR_OP(sraw, x12, x10, x11, 0x1, 0x5555555555555556, 0x1e, x6, 736, x1)
+
+inst_109:
+// rs1_val==-6148914691236517205,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xe
+TEST_RR_OP(sraw, x12, x10, x11, -0x15556, -0x5555555555555555, 0xe, x6, 744, x1)
+
+inst_110:
+// rs1_val==6,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xa
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x6, 0xa, x6, 752, x1)
+
+inst_111:
+// rs1_val==3689348814741910324,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xe
+TEST_RR_OP(sraw, x12, x10, x11, 0xcccc, 0x3333333333333334, 0xe, x6, 760, x1)
+
+inst_112:
+// rs1_val==7378697629483820647,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x11
+TEST_RR_OP(sraw, x12, x10, x11, 0x3333, 0x6666666666666667, 0x11, x6, 768, x1)
+
+inst_113:
+// rs1_val==-3037000498,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x4
+TEST_RR_OP(sraw, x12, x10, x11, 0x4afb0cc, -0xb504f332, 0x4, x6, 776, x1)
+
+inst_114:
+// rs1_val==3037000500,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x1d
+TEST_RR_OP(sraw, x12, x10, x11, -0x3, 0xb504f334, 0x1d, x6, 784, x1)
+
+inst_115:
+// rs1_val == -2097153,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0xf
+TEST_RR_OP(sraw, x12, x10, x11, -0x41, -0x200001, 0xf, x6, 792, x1)
+
+inst_116:
+// rs1_val == -4194305,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0xd
+TEST_RR_OP(sraw, x12, x10, x11, -0x201, -0x400001, 0xd, x6, 800, x1)
+
+inst_117:
+// rs1_val == -8388609,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x1e
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x800001, 0x1e, x6, 808, x1)
+
+inst_118:
+// rs1_val == -16777217,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0xe
+TEST_RR_OP(sraw, x12, x10, x11, -0x401, -0x1000001, 0xe, x6, 816, x1)
+
+inst_119:
+// rs1_val == -33554433,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x5
+TEST_RR_OP(sraw, x12, x10, x11, -0x100001, -0x2000001, 0x5, x6, 824, x1)
+
+inst_120:
+// rs1_val == -67108865,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x8
+TEST_RR_OP(sraw, x12, x10, x11, -0x40001, -0x4000001, 0x8, x6, 832, x1)
+
+inst_121:
+// rs1_val == -134217729,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x7
+TEST_RR_OP(sraw, x12, x10, x11, -0x100001, -0x8000001, 0x7, x6, 840, x1)
+
+inst_122:
+// rs1_val == -268435457,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0xb
+TEST_RR_OP(sraw, x12, x10, x11, -0x20001, -0x10000001, 0xb, x6, 848, x1)
+
+inst_123:
+// rs1_val == -536870913,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x11
+TEST_RR_OP(sraw, x12, x10, x11, -0x1001, -0x20000001, 0x11, x6, 856, x1)
+
+inst_124:
+// rs1_val == -1073741825,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x6
+TEST_RR_OP(sraw, x12, x10, x11, -0x1000001, -0x40000001, 0x6, x6, 864, x1)
+
+inst_125:
+// rs1_val == -2147483649,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:0xf
+TEST_RR_OP(sraw, x12, x10, x11, 0xffff, -0x80000001, 0xf, x6, 872, x1)
+
+inst_126:
+// rs1_val == -4294967297,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:0x17
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x100000001, 0x17, x6, 880, x1)
+
+inst_127:
+// rs1_val == -8589934593,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:0x2
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x200000001, 0x2, x6, 888, x1)
+
+inst_128:
+// rs1_val == -17179869185,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:0x17
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x400000001, 0x17, x6, 896, x1)
+
+inst_129:
+// rs1_val == -34359738369,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:0x0
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x800000001, 0x0, x6, 904, x1)
+
+inst_130:
+// rs1_val == -68719476737,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:0x11
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x1000000001, 0x11, x6, 912, x1)
+
+inst_131:
+// rs1_val == -137438953473,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:0x1
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x2000000001, 0x1, x6, 920, x1)
+
+inst_132:
+// rs1_val == -274877906945,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0x1f
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x4000000001, 0x1f, x6, 928, x1)
+
+inst_133:
+// rs1_val == -549755813889,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:0x6
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x8000000001, 0x6, x6, 936, x1)
+
+inst_134:
+// rs1_val == -1099511627777,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:0x1b
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x10000000001, 0x1b, x6, 944, x1)
+
+inst_135:
+// rs1_val == -2199023255553,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:0xa
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x20000000001, 0xa, x6, 952, x1)
+
+inst_136:
+// rs1_val == -4398046511105,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:0x2
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x40000000001, 0x2, x6, 960, x1)
+
+inst_137:
+// rs1_val == -8796093022209,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:0x8
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x80000000001, 0x8, x6, 968, x1)
+
+inst_138:
+// rs1_val == -17592186044417,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:0xd
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x100000000001, 0xd, x6, 976, x1)
+
+inst_139:
+// rs1_val == -35184372088833,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:0xa
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x200000000001, 0xa, x6, 984, x1)
+
+inst_140:
+// rs1_val == -70368744177665,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:0x17
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x400000000001, 0x17, x6, 992, x1)
+
+inst_141:
+// rs1_val == -140737488355329,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:0x12
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x800000000001, 0x12, x6, 1000, x1)
+
+inst_142:
+// rs1_val == -281474976710657,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:0x9
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x1000000000001, 0x9, x6, 1008, x1)
+
+inst_143:
+// rs1_val == -562949953421313,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:0x13
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x2000000000001, 0x13, x6, 1016, x1)
+
+inst_144:
+// rs1_val == -1125899906842625,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:0xa
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x4000000000001, 0xa, x6, 1024, x1)
+
+inst_145:
+// rs1_val == -2251799813685249,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:0x1
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x8000000000001, 0x1, x6, 1032, x1)
+
+inst_146:
+// rs1_val == -4503599627370497,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:0x2
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x10000000000001, 0x2, x6, 1040, x1)
+
+inst_147:
+// rs1_val == -9007199254740993,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:0x1f
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x20000000000001, 0x1f, x6, 1048, x1)
+
+inst_148:
+// rs1_val == -18014398509481985,
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:0x4
+TEST_RR_OP(sraw, x12, x10, x11, -0x1, -0x40000000000001, 0x4, x6, 1056, x1)
+
+inst_149:
+// rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == -257, rs2_val == 1
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x1
+TEST_RR_OP(sraw, x12, x10, x11, -0x81, -0x101, 0x1, x6, 1064, x1)
+
+inst_150:
+// rs1_val < 0 and rs2_val == 0, rs1_val == -131073
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x0
+TEST_RR_OP(sraw, x12, x10, x11, -0x20001, -0x20001, 0x0, x6, 1072, x1)
+
+inst_151:
+// rs1_val == (-2**(xlen-1)) and rs2_val >= 0 and rs2_val < xlen, rs1_val == -9223372036854775808
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000000000; op2val:0xe
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, -0x8000000000000000, 0xe, x6, 1080, x1)
+
+inst_152:
+// rs1_val == 2, rs1_val==2, rs2_val == 10
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xa
+TEST_RR_OP(sraw, x12, x10, x11, 0x0, 0x2, 0xa, x6, 1088, x1)
+
+inst_153:
+// rs1_val == 16384, rs2_val == 2
+// opcode: sraw ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:0x2
+TEST_RR_OP(sraw, x12, x10, x11, 0x1000, 0x4000, 0x2, x6, 1096, x1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x3_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_1:
+ .fill 16*(XLEN/32),4,0xdeadbeef
+
+
+signature_x6_0:
+ .fill 138*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/srl-01.S b/riscof/suite/rv64i_m/I/srl-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..3f4823944ea502bf3af6191e827a4e59405a17d1
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/srl-01.S
@@ -0,0 +1,839 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the srl instruction of the RISC-V i extension for the srl covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64i")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",srl)
+
+RVTEST_SIGBASE( x4,signature_x4_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x2, rs2==x2, rd==x13, rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == -9223372036854775808, rs1_val == (-2**(xlen-1)) and rs2_val >= 0 and rs2_val < xlen
+// opcode: srl ; op1:x2; op2:x2; dest:x13; op1val:-0x8000000000000000; op2val:-0x8000000000000000
+TEST_RR_OP(srl, x13, x2, x2, 0x8000000000000000, -0x8000000000000000, -0x8000000000000000, x4, 0, x14)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x30, rs2==x21, rd==x21, rs1_val > 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == 137438953472
+// opcode: srl ; op1:x30; op2:x21; dest:x21; op1val:0x2000000000; op2val:0x9
+TEST_RR_OP(srl, x21, x30, x21, 0x10000000, 0x2000000000, 0x9, x4, 8, x14)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x29, rs2==x29, rd==x29, rs1_val < 0 and rs2_val == 0, rs1_val == -17179869185
+// opcode: srl ; op1:x29; op2:x29; dest:x29; op1val:-0x400000001; op2val:-0x400000001
+TEST_RR_OP(srl, x29, x29, x29, 0x1, -0x400000001, -0x400000001, x4, 16, x14)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x24, rs2==x9, rd==x2, rs1_val > 0 and rs2_val == 0, rs1_val == 8192
+// opcode: srl ; op1:x24; op2:x9; dest:x2; op1val:0x2000; op2val:0x0
+TEST_RR_OP(srl, x2, x24, x9, 0x2000, 0x2000, 0x0, x4, 24, x14)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x28, rs2==x22, rd==x28, rs1_val == rs2_val and rs2_val > 0 and rs2_val < xlen, rs2_val == 8, rs1_val == 8
+// opcode: srl ; op1:x28; op2:x22; dest:x28; op1val:0x8; op2val:0x8
+TEST_RR_OP(srl, x28, x28, x22, 0x0, 0x8, 0x8, x4, 32, x14)
+
+inst_5:
+// rs1==x27, rs2==x8, rd==x24, rs1_val == 0 and rs2_val >= 0 and rs2_val < xlen, rs1_val==0
+// opcode: srl ; op1:x27; op2:x8; dest:x24; op1val:0x0; op2val:0x3f
+TEST_RR_OP(srl, x24, x27, x8, 0x0, 0x0, 0x3f, x4, 40, x14)
+
+inst_6:
+// rs1==x19, rs2==x24, rd==x27, rs1_val == (2**(xlen-1)-1) and rs2_val >= 0 and rs2_val < xlen, rs1_val == 9223372036854775807
+// opcode: srl ; op1:x19; op2:x24; dest:x27; op1val:0x7fffffffffffffff; op2val:0x9
+TEST_RR_OP(srl, x27, x19, x24, 0x3fffffffffffff, 0x7fffffffffffffff, 0x9, x4, 48, x14)
+
+inst_7:
+// rs1==x13, rs2==x1, rd==x7, rs1_val == 1 and rs2_val >= 0 and rs2_val < xlen, rs1_val == 1, rs2_val == 21
+// opcode: srl ; op1:x13; op2:x1; dest:x7; op1val:0x1; op2val:0x15
+TEST_RR_OP(srl, x7, x13, x1, 0x0, 0x1, 0x15, x4, 56, x14)
+
+inst_8:
+// rs1==x17, rs2==x5, rd==x20, rs1_val == 2, rs1_val==2
+// opcode: srl ; op1:x17; op2:x5; dest:x20; op1val:0x2; op2val:0x5
+TEST_RR_OP(srl, x20, x17, x5, 0x0, 0x2, 0x5, x4, 64, x14)
+
+inst_9:
+// rs1==x15, rs2==x19, rd==x12, rs1_val == 4, rs1_val==4
+// opcode: srl ; op1:x15; op2:x19; dest:x12; op1val:0x4; op2val:0xc
+TEST_RR_OP(srl, x12, x15, x19, 0x0, 0x4, 0xc, x4, 72, x14)
+
+inst_10:
+// rs1==x0, rs2==x11, rd==x6, rs1_val == 16, rs2_val == 59
+// opcode: srl ; op1:x0; op2:x11; dest:x6; op1val:0x0; op2val:0x3b
+TEST_RR_OP(srl, x6, x0, x11, 0x0, 0x0, 0x3b, x4, 80, x14)
+
+inst_11:
+// rs1==x7, rs2==x27, rd==x26, rs1_val == 32, rs2_val == 4
+// opcode: srl ; op1:x7; op2:x27; dest:x26; op1val:0x20; op2val:0x4
+TEST_RR_OP(srl, x26, x7, x27, 0x2, 0x20, 0x4, x4, 88, x14)
+
+inst_12:
+// rs1==x16, rs2==x20, rd==x3, rs1_val == 64, rs2_val == 61
+// opcode: srl ; op1:x16; op2:x20; dest:x3; op1val:0x40; op2val:0x3d
+TEST_RR_OP(srl, x3, x16, x20, 0x0, 0x40, 0x3d, x4, 96, x14)
+
+inst_13:
+// rs1==x9, rs2==x10, rd==x25, rs1_val == 128,
+// opcode: srl ; op1:x9; op2:x10; dest:x25; op1val:0x80; op2val:0xe
+TEST_RR_OP(srl, x25, x9, x10, 0x0, 0x80, 0xe, x4, 104, x14)
+
+inst_14:
+// rs1==x8, rs2==x31, rd==x22, rs1_val == 256, rs2_val == 1
+// opcode: srl ; op1:x8; op2:x31; dest:x22; op1val:0x100; op2val:0x1
+TEST_RR_OP(srl, x22, x8, x31, 0x80, 0x100, 0x1, x4, 112, x14)
+
+inst_15:
+// rs1==x26, rs2==x25, rd==x0, rs1_val == 512,
+// opcode: srl ; op1:x26; op2:x25; dest:x0; op1val:0x200; op2val:0x3f
+TEST_RR_OP(srl, x0, x26, x25, 0, 0x200, 0x3f, x4, 120, x24)
+
+inst_16:
+// rs1==x14, rs2==x13, rd==x31, rs1_val == 1024, rs2_val == 31
+// opcode: srl ; op1:x14; op2:x13; dest:x31; op1val:0x400; op2val:0x1f
+TEST_RR_OP(srl, x31, x14, x13, 0x0, 0x400, 0x1f, x4, 128, x24)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_17:
+// rs1==x6, rs2==x16, rd==x15, rs1_val == 2048,
+// opcode: srl ; op1:x6; op2:x16; dest:x15; op1val:0x800; op2val:0x12
+TEST_RR_OP(srl, x15, x6, x16, 0x0, 0x800, 0x12, x2, 0, x24)
+
+inst_18:
+// rs1==x12, rs2==x0, rd==x14, rs1_val == 4096,
+// opcode: srl ; op1:x12; op2:x0; dest:x14; op1val:0x1000; op2val:0x0
+TEST_RR_OP(srl, x14, x12, x0, 0x1000, 0x1000, 0x0, x2, 8, x24)
+
+inst_19:
+// rs1==x18, rs2==x30, rd==x4, rs1_val == 16384, rs2_val == 47
+// opcode: srl ; op1:x18; op2:x30; dest:x4; op1val:0x4000; op2val:0x2f
+TEST_RR_OP(srl, x4, x18, x30, 0x0, 0x4000, 0x2f, x2, 16, x24)
+
+inst_20:
+// rs1==x11, rs2==x18, rd==x8, rs1_val == 32768,
+// opcode: srl ; op1:x11; op2:x18; dest:x8; op1val:0x8000; op2val:0x3f
+TEST_RR_OP(srl, x8, x11, x18, 0x0, 0x8000, 0x3f, x2, 24, x24)
+
+inst_21:
+// rs1==x25, rs2==x23, rd==x5, rs1_val == 65536,
+// opcode: srl ; op1:x25; op2:x23; dest:x5; op1val:0x10000; op2val:0x3
+TEST_RR_OP(srl, x5, x25, x23, 0x2000, 0x10000, 0x3, x2, 32, x24)
+
+inst_22:
+// rs1==x3, rs2==x14, rd==x19, rs1_val == 131072,
+// opcode: srl ; op1:x3; op2:x14; dest:x19; op1val:0x20000; op2val:0x3
+TEST_RR_OP(srl, x19, x3, x14, 0x4000, 0x20000, 0x3, x2, 40, x24)
+
+inst_23:
+// rs1==x22, rs2==x26, rd==x9, rs1_val == 262144,
+// opcode: srl ; op1:x22; op2:x26; dest:x9; op1val:0x40000; op2val:0x3b
+TEST_RR_OP(srl, x9, x22, x26, 0x0, 0x40000, 0x3b, x2, 48, x24)
+
+inst_24:
+// rs1==x5, rs2==x6, rd==x30, rs1_val == 524288,
+// opcode: srl ; op1:x5; op2:x6; dest:x30; op1val:0x80000; op2val:0x12
+TEST_RR_OP(srl, x30, x5, x6, 0x2, 0x80000, 0x12, x2, 56, x24)
+
+inst_25:
+// rs1==x23, rs2==x3, rd==x16, rs1_val == 1048576,
+// opcode: srl ; op1:x23; op2:x3; dest:x16; op1val:0x100000; op2val:0x11
+TEST_RR_OP(srl, x16, x23, x3, 0x8, 0x100000, 0x11, x2, 64, x24)
+
+inst_26:
+// rs1==x1, rs2==x15, rd==x23, rs1_val == 2097152,
+// opcode: srl ; op1:x1; op2:x15; dest:x23; op1val:0x200000; op2val:0x15
+TEST_RR_OP(srl, x23, x1, x15, 0x1, 0x200000, 0x15, x2, 72, x24)
+
+inst_27:
+// rs1==x10, rs2==x7, rd==x11, rs1_val == 4194304,
+// opcode: srl ; op1:x10; op2:x7; dest:x11; op1val:0x400000; op2val:0xf
+TEST_RR_OP(srl, x11, x10, x7, 0x80, 0x400000, 0xf, x2, 80, x24)
+
+inst_28:
+// rs1==x31, rs2==x28, rd==x10, rs1_val == 8388608,
+// opcode: srl ; op1:x31; op2:x28; dest:x10; op1val:0x800000; op2val:0x9
+TEST_RR_OP(srl, x10, x31, x28, 0x4000, 0x800000, 0x9, x2, 88, x24)
+
+inst_29:
+// rs1==x21, rs2==x4, rd==x17, rs1_val == 16777216,
+// opcode: srl ; op1:x21; op2:x4; dest:x17; op1val:0x1000000; op2val:0x3
+TEST_RR_OP(srl, x17, x21, x4, 0x200000, 0x1000000, 0x3, x2, 96, x24)
+
+inst_30:
+// rs1==x20, rs2==x17, rd==x1, rs1_val == 33554432,
+// opcode: srl ; op1:x20; op2:x17; dest:x1; op1val:0x2000000; op2val:0x4
+TEST_RR_OP(srl, x1, x20, x17, 0x200000, 0x2000000, 0x4, x2, 104, x24)
+
+inst_31:
+// rs1==x4, rs2==x12, rd==x18, rs1_val == 67108864,
+// opcode: srl ; op1:x4; op2:x12; dest:x18; op1val:0x4000000; op2val:0x9
+TEST_RR_OP(srl, x18, x4, x12, 0x20000, 0x4000000, 0x9, x2, 112, x1)
+
+inst_32:
+// rs1_val == 134217728,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x12
+TEST_RR_OP(srl, x12, x10, x11, 0x200, 0x8000000, 0x12, x2, 120, x1)
+
+inst_33:
+// rs1_val == 268435456, rs2_val == 42
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x2a
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x10000000, 0x2a, x2, 128, x1)
+
+inst_34:
+// rs1_val == 536870912,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x2a
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x20000000, 0x2a, x2, 136, x1)
+
+inst_35:
+// rs1_val == 1073741824,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0xe
+TEST_RR_OP(srl, x12, x10, x11, 0x10000, 0x40000000, 0xe, x2, 144, x1)
+
+inst_36:
+// rs1_val == 2147483648,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0xc
+TEST_RR_OP(srl, x12, x10, x11, 0x80000, 0x80000000, 0xc, x2, 152, x1)
+
+inst_37:
+// rs1_val == 4294967296,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x1f
+TEST_RR_OP(srl, x12, x10, x11, 0x2, 0x100000000, 0x1f, x2, 160, x1)
+
+inst_38:
+// rs1_val == 8589934592,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:0x5
+TEST_RR_OP(srl, x12, x10, x11, 0x10000000, 0x200000000, 0x5, x2, 168, x1)
+
+inst_39:
+// rs1_val == 17179869184,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:0x1
+TEST_RR_OP(srl, x12, x10, x11, 0x200000000, 0x400000000, 0x1, x2, 176, x1)
+
+inst_40:
+// rs1_val == 34359738368,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:0x2a
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x800000000, 0x2a, x2, 184, x1)
+
+inst_41:
+// rs1_val == 68719476736,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:0x3f
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x1000000000, 0x3f, x2, 192, x1)
+
+inst_42:
+// rs1_val == 274877906944,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:0x12
+TEST_RR_OP(srl, x12, x10, x11, 0x100000, 0x4000000000, 0x12, x2, 200, x1)
+
+inst_43:
+// rs1_val == 549755813888,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0xe
+TEST_RR_OP(srl, x12, x10, x11, 0x2000000, 0x8000000000, 0xe, x2, 208, x1)
+
+inst_44:
+// rs1_val == 1099511627776,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x1f
+TEST_RR_OP(srl, x12, x10, x11, 0x200, 0x10000000000, 0x1f, x2, 216, x1)
+
+inst_45:
+// rs1_val == 2199023255552,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:0xc
+TEST_RR_OP(srl, x12, x10, x11, 0x20000000, 0x20000000000, 0xc, x2, 224, x1)
+
+inst_46:
+// rs1_val == 4398046511104,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:0x4
+TEST_RR_OP(srl, x12, x10, x11, 0x4000000000, 0x40000000000, 0x4, x2, 232, x1)
+
+inst_47:
+// rs1_val == 8796093022208,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:0xd
+TEST_RR_OP(srl, x12, x10, x11, 0x40000000, 0x80000000000, 0xd, x2, 240, x1)
+
+inst_48:
+// rs1_val == 17592186044416,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:0xc
+TEST_RR_OP(srl, x12, x10, x11, 0x100000000, 0x100000000000, 0xc, x2, 248, x1)
+
+inst_49:
+// rs1_val == 35184372088832,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:0x3b
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x200000000000, 0x3b, x2, 256, x1)
+
+inst_50:
+// rs1_val == 70368744177664,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:0x5
+TEST_RR_OP(srl, x12, x10, x11, 0x20000000000, 0x400000000000, 0x5, x2, 264, x1)
+
+inst_51:
+// rs1_val == 140737488355328,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:0x2a
+TEST_RR_OP(srl, x12, x10, x11, 0x20, 0x800000000000, 0x2a, x2, 272, x1)
+
+inst_52:
+// rs1_val == 281474976710656,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0x0
+TEST_RR_OP(srl, x12, x10, x11, 0x1000000000000, 0x1000000000000, 0x0, x2, 280, x1)
+
+inst_53:
+// rs1_val == 562949953421312,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:0x6
+TEST_RR_OP(srl, x12, x10, x11, 0x80000000000, 0x2000000000000, 0x6, x2, 288, x1)
+
+inst_54:
+// rs1_val == 1125899906842624,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:0x3f
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x4000000000000, 0x3f, x2, 296, x1)
+
+inst_55:
+// rs1_val == 2251799813685248,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:0x13
+TEST_RR_OP(srl, x12, x10, x11, 0x100000000, 0x8000000000000, 0x13, x2, 304, x1)
+
+inst_56:
+// rs1_val == 4503599627370496, rs2_val == 2
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:0x2
+TEST_RR_OP(srl, x12, x10, x11, 0x4000000000000, 0x10000000000000, 0x2, x2, 312, x1)
+
+inst_57:
+// rs1_val == 9007199254740992, rs2_val == 62
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:0x3e
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x20000000000000, 0x3e, x2, 320, x1)
+
+inst_58:
+// rs1_val == 18014398509481984, rs2_val == 16
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:0x10
+TEST_RR_OP(srl, x12, x10, x11, 0x4000000000, 0x40000000000000, 0x10, x2, 328, x1)
+
+inst_59:
+// rs1_val == 36028797018963968,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:0x0
+TEST_RR_OP(srl, x12, x10, x11, 0x80000000000000, 0x80000000000000, 0x0, x2, 336, x1)
+
+inst_60:
+// rs1_val == 72057594037927936,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:0x11
+TEST_RR_OP(srl, x12, x10, x11, 0x8000000000, 0x100000000000000, 0x11, x2, 344, x1)
+
+inst_61:
+// rs1_val == 144115188075855872,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:0xc
+TEST_RR_OP(srl, x12, x10, x11, 0x200000000000, 0x200000000000000, 0xc, x2, 352, x1)
+
+inst_62:
+// rs1_val == 288230376151711744,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:0x13
+TEST_RR_OP(srl, x12, x10, x11, 0x8000000000, 0x400000000000000, 0x13, x2, 360, x1)
+
+inst_63:
+// rs1_val == 576460752303423488,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:0x0
+TEST_RR_OP(srl, x12, x10, x11, 0x800000000000000, 0x800000000000000, 0x0, x2, 368, x1)
+
+inst_64:
+// rs1_val == 1152921504606846976,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:0xd
+TEST_RR_OP(srl, x12, x10, x11, 0x800000000000, 0x1000000000000000, 0xd, x2, 376, x1)
+
+inst_65:
+// rs1_val == 2305843009213693952,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:0x5
+TEST_RR_OP(srl, x12, x10, x11, 0x100000000000000, 0x2000000000000000, 0x5, x2, 384, x1)
+
+inst_66:
+// rs1_val == 4611686018427387904,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:0x3e
+TEST_RR_OP(srl, x12, x10, x11, 0x1, 0x4000000000000000, 0x3e, x2, 392, x1)
+
+inst_67:
+// rs1_val == -2,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x2f
+TEST_RR_OP(srl, x12, x10, x11, 0x1ffff, -0x2, 0x2f, x2, 400, x1)
+
+inst_68:
+// rs1_val == -3,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0x5
+TEST_RR_OP(srl, x12, x10, x11, 0x7ffffffffffffff, -0x3, 0x5, x2, 408, x1)
+
+inst_69:
+// rs1_val == -5,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0x15
+TEST_RR_OP(srl, x12, x10, x11, 0x7ffffffffff, -0x5, 0x15, x2, 416, x1)
+
+inst_70:
+// rs1_val == -9,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x6
+TEST_RR_OP(srl, x12, x10, x11, 0x3ffffffffffffff, -0x9, 0x6, x2, 424, x1)
+
+inst_71:
+// rs1_val == -17,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:0x8
+TEST_RR_OP(srl, x12, x10, x11, 0xffffffffffffff, -0x11, 0x8, x2, 432, x1)
+
+inst_72:
+// rs1_val == -33,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x5
+TEST_RR_OP(srl, x12, x10, x11, 0x7fffffffffffffe, -0x21, 0x5, x2, 440, x1)
+
+inst_73:
+// rs1_val == -65, rs2_val == 55
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x37
+TEST_RR_OP(srl, x12, x10, x11, 0x1ff, -0x41, 0x37, x2, 448, x1)
+
+inst_74:
+// rs1_val == -129,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x6
+TEST_RR_OP(srl, x12, x10, x11, 0x3fffffffffffffd, -0x81, 0x6, x2, 456, x1)
+
+inst_75:
+// rs1_val == -257,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x1
+TEST_RR_OP(srl, x12, x10, x11, 0x7fffffffffffff7f, -0x101, 0x1, x2, 464, x1)
+
+inst_76:
+// rs1_val == -513,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x1
+TEST_RR_OP(srl, x12, x10, x11, 0x7ffffffffffffeff, -0x201, 0x1, x2, 472, x1)
+
+inst_77:
+// rs1_val == -1025,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x11
+TEST_RR_OP(srl, x12, x10, x11, 0x7fffffffffff, -0x401, 0x11, x2, 480, x1)
+
+inst_78:
+// rs1_val == -2049,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0xe
+TEST_RR_OP(srl, x12, x10, x11, 0x3ffffffffffff, -0x801, 0xe, x2, 488, x1)
+
+inst_79:
+// rs1_val == -4097,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x12
+TEST_RR_OP(srl, x12, x10, x11, 0x3fffffffffff, -0x1001, 0x12, x2, 496, x1)
+
+inst_80:
+// rs1_val == -8193,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0xd
+TEST_RR_OP(srl, x12, x10, x11, 0x7fffffffffffe, -0x2001, 0xd, x2, 504, x1)
+
+inst_81:
+// rs1_val == -16385,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x6
+TEST_RR_OP(srl, x12, x10, x11, 0x3fffffffffffeff, -0x4001, 0x6, x2, 512, x1)
+
+inst_82:
+// rs1_val == -32769,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x9
+TEST_RR_OP(srl, x12, x10, x11, 0x7fffffffffffbf, -0x8001, 0x9, x2, 520, x1)
+
+inst_83:
+// rs1_val == -65537,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x6
+TEST_RR_OP(srl, x12, x10, x11, 0x3fffffffffffbff, -0x10001, 0x6, x2, 528, x1)
+
+inst_84:
+// rs1_val == -131073,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x37
+TEST_RR_OP(srl, x12, x10, x11, 0x1ff, -0x20001, 0x37, x2, 536, x1)
+
+inst_85:
+// rs1_val == -262145,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0xf
+TEST_RR_OP(srl, x12, x10, x11, 0x1fffffffffff7, -0x40001, 0xf, x2, 544, x1)
+
+inst_86:
+// rs1_val == -524289,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x1
+TEST_RR_OP(srl, x12, x10, x11, 0x7ffffffffffbffff, -0x80001, 0x1, x2, 552, x1)
+
+inst_87:
+// rs1_val == -1048577,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x9
+TEST_RR_OP(srl, x12, x10, x11, 0x7ffffffffff7ff, -0x100001, 0x9, x2, 560, x1)
+
+inst_88:
+// rs1_val == -36028797018963969,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:0x2
+TEST_RR_OP(srl, x12, x10, x11, 0x3fdfffffffffffff, -0x80000000000001, 0x2, x2, 568, x1)
+
+inst_89:
+// rs1_val == -72057594037927937,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:0xf
+TEST_RR_OP(srl, x12, x10, x11, 0x1fdffffffffff, -0x100000000000001, 0xf, x2, 576, x1)
+
+inst_90:
+// rs1_val == -144115188075855873,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:0x8
+TEST_RR_OP(srl, x12, x10, x11, 0xfdffffffffffff, -0x200000000000001, 0x8, x2, 584, x1)
+
+inst_91:
+// rs1_val == -288230376151711745,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000000001; op2val:0x5
+TEST_RR_OP(srl, x12, x10, x11, 0x7dfffffffffffff, -0x400000000000001, 0x5, x2, 592, x1)
+
+inst_92:
+// rs1_val == -576460752303423489,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:0x2f
+TEST_RR_OP(srl, x12, x10, x11, 0x1efff, -0x800000000000001, 0x2f, x2, 600, x1)
+
+inst_93:
+// rs1_val == -1152921504606846977,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:0x8
+TEST_RR_OP(srl, x12, x10, x11, 0xefffffffffffff, -0x1000000000000001, 0x8, x2, 608, x1)
+
+inst_94:
+// rs1_val == -2305843009213693953,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:0xf
+TEST_RR_OP(srl, x12, x10, x11, 0x1bfffffffffff, -0x2000000000000001, 0xf, x2, 616, x1)
+
+inst_95:
+// rs1_val == -4611686018427387905,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:0x1f
+TEST_RR_OP(srl, x12, x10, x11, 0x17fffffff, -0x4000000000000001, 0x1f, x2, 624, x1)
+
+inst_96:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6
+TEST_RR_OP(srl, x12, x10, x11, 0x155555555555555, 0x5555555555555555, 0x6, x2, 632, x1)
+
+inst_97:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xe
+TEST_RR_OP(srl, x12, x10, x11, 0x2aaaaaaaaaaaa, -0x5555555555555556, 0xe, x2, 640, x1)
+
+inst_98:
+// rs1_val==3,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x11
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x3, 0x11, x2, 648, x1)
+
+inst_99:
+// rs1_val==5,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3e
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x5, 0x3e, x2, 656, x1)
+
+inst_100:
+// rs1_val==3689348814741910323, rs2_val == 32
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x20
+TEST_RR_OP(srl, x12, x10, x11, 0x33333333, 0x3333333333333333, 0x20, x2, 664, x1)
+
+inst_101:
+// rs1_val==7378697629483820646,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5
+TEST_RR_OP(srl, x12, x10, x11, 0x333333333333333, 0x6666666666666666, 0x5, x2, 672, x1)
+
+inst_102:
+// rs1_val==-3037000499,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xc
+TEST_RR_OP(srl, x12, x10, x11, 0xffffffff4afb0, -0xb504f333, 0xc, x2, 680, x1)
+
+inst_103:
+// rs1_val==3037000499,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xc
+TEST_RR_OP(srl, x12, x10, x11, 0xb504f, 0xb504f333, 0xc, x2, 688, x1)
+
+inst_104:
+// rs1_val==6148914691236517204,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xe
+TEST_RR_OP(srl, x12, x10, x11, 0x1555555555555, 0x5555555555555554, 0xe, x2, 696, x1)
+
+inst_105:
+// rs1_val==3689348814741910322,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x10
+TEST_RR_OP(srl, x12, x10, x11, 0x333333333333, 0x3333333333333332, 0x10, x2, 704, x1)
+
+inst_106:
+// rs1_val==7378697629483820645,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x1f
+TEST_RR_OP(srl, x12, x10, x11, 0xcccccccc, 0x6666666666666665, 0x1f, x2, 712, x1)
+
+inst_107:
+// rs1_val==3037000498,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xd
+TEST_RR_OP(srl, x12, x10, x11, 0x5a827, 0xb504f332, 0xd, x2, 720, x1)
+
+inst_108:
+// rs1_val==6148914691236517206,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x1
+TEST_RR_OP(srl, x12, x10, x11, 0x2aaaaaaaaaaaaaab, 0x5555555555555556, 0x1, x2, 728, x1)
+
+inst_109:
+// rs1_val==-6148914691236517205,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5
+TEST_RR_OP(srl, x12, x10, x11, 0x555555555555555, -0x5555555555555555, 0x5, x2, 736, x1)
+
+inst_110:
+// rs1_val==6,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3e
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x6, 0x3e, x2, 744, x1)
+
+inst_111:
+// rs1_val==3689348814741910324,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x1
+TEST_RR_OP(srl, x12, x10, x11, 0x199999999999999a, 0x3333333333333334, 0x1, x2, 752, x1)
+
+inst_112:
+// rs1_val==7378697629483820647,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x2a
+TEST_RR_OP(srl, x12, x10, x11, 0x199999, 0x6666666666666667, 0x2a, x2, 760, x1)
+
+inst_113:
+// rs1_val==-3037000498,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x10
+TEST_RR_OP(srl, x12, x10, x11, 0xffffffff4afb, -0xb504f332, 0x10, x2, 768, x1)
+
+inst_114:
+// rs1_val==3037000500,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x2a
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0xb504f334, 0x2a, x2, 776, x1)
+
+inst_115:
+// rs1_val == -2097153,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0x3b
+TEST_RR_OP(srl, x12, x10, x11, 0x1f, -0x200001, 0x3b, x2, 784, x1)
+
+inst_116:
+// rs1_val == -4194305,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0x12
+TEST_RR_OP(srl, x12, x10, x11, 0x3fffffffffef, -0x400001, 0x12, x2, 792, x1)
+
+inst_117:
+// rs1_val == -8388609,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x3
+TEST_RR_OP(srl, x12, x10, x11, 0x1fffffffffefffff, -0x800001, 0x3, x2, 800, x1)
+
+inst_118:
+// rs1_val == -16777217,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0x5
+TEST_RR_OP(srl, x12, x10, x11, 0x7fffffffff7ffff, -0x1000001, 0x5, x2, 808, x1)
+
+inst_119:
+// rs1_val == -33554433,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0xf
+TEST_RR_OP(srl, x12, x10, x11, 0x1fffffffffbff, -0x2000001, 0xf, x2, 816, x1)
+
+inst_120:
+// rs1_val == -67108865,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x1f
+TEST_RR_OP(srl, x12, x10, x11, 0x1ffffffff, -0x4000001, 0x1f, x2, 824, x1)
+
+inst_121:
+// rs1_val == -134217729,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x12
+TEST_RR_OP(srl, x12, x10, x11, 0x3ffffffffdff, -0x8000001, 0x12, x2, 832, x1)
+
+inst_122:
+// rs1_val == -268435457,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0xa
+TEST_RR_OP(srl, x12, x10, x11, 0x3ffffffffbffff, -0x10000001, 0xa, x2, 840, x1)
+
+inst_123:
+// rs1_val == -536870913,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0xc
+TEST_RR_OP(srl, x12, x10, x11, 0xffffffffdffff, -0x20000001, 0xc, x2, 848, x1)
+
+inst_124:
+// rs1_val == -1073741825,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x20
+TEST_RR_OP(srl, x12, x10, x11, 0xffffffff, -0x40000001, 0x20, x2, 856, x1)
+
+inst_125:
+// rs1_val == -2147483649,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:0x3e
+TEST_RR_OP(srl, x12, x10, x11, 0x3, -0x80000001, 0x3e, x2, 864, x1)
+
+inst_126:
+// rs1_val == -4294967297,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:0x2f
+TEST_RR_OP(srl, x12, x10, x11, 0x1ffff, -0x100000001, 0x2f, x2, 872, x1)
+
+inst_127:
+// rs1_val == -8589934593,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:0x7
+TEST_RR_OP(srl, x12, x10, x11, 0x1fffffffbffffff, -0x200000001, 0x7, x2, 880, x1)
+
+inst_128:
+// rs1_val == -34359738369,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:0xc
+TEST_RR_OP(srl, x12, x10, x11, 0xfffffff7fffff, -0x800000001, 0xc, x2, 888, x1)
+
+inst_129:
+// rs1_val == -68719476737,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:0x1
+TEST_RR_OP(srl, x12, x10, x11, 0x7ffffff7ffffffff, -0x1000000001, 0x1, x2, 896, x1)
+
+inst_130:
+// rs1_val == -137438953473,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:0xb
+TEST_RR_OP(srl, x12, x10, x11, 0x1ffffffbffffff, -0x2000000001, 0xb, x2, 904, x1)
+
+inst_131:
+// rs1_val == -274877906945,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0x20
+TEST_RR_OP(srl, x12, x10, x11, 0xffffffbf, -0x4000000001, 0x20, x2, 912, x1)
+
+inst_132:
+// rs1_val == -549755813889,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:0x15
+TEST_RR_OP(srl, x12, x10, x11, 0x7fffffbffff, -0x8000000001, 0x15, x2, 920, x1)
+
+inst_133:
+// rs1_val == -1099511627777,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:0x3b
+TEST_RR_OP(srl, x12, x10, x11, 0x1f, -0x10000000001, 0x3b, x2, 928, x1)
+
+inst_134:
+// rs1_val == -2199023255553,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:0x2f
+TEST_RR_OP(srl, x12, x10, x11, 0x1ffff, -0x20000000001, 0x2f, x2, 936, x1)
+
+inst_135:
+// rs1_val == -4398046511105,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:0xc
+TEST_RR_OP(srl, x12, x10, x11, 0xfffffbfffffff, -0x40000000001, 0xc, x2, 944, x1)
+
+inst_136:
+// rs1_val == -8796093022209,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:0xd
+TEST_RR_OP(srl, x12, x10, x11, 0x7ffffbfffffff, -0x80000000001, 0xd, x2, 952, x1)
+
+inst_137:
+// rs1_val == -17592186044417,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:0x7
+TEST_RR_OP(srl, x12, x10, x11, 0x1ffffdfffffffff, -0x100000000001, 0x7, x2, 960, x1)
+
+inst_138:
+// rs1_val == -35184372088833,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:0x3f
+TEST_RR_OP(srl, x12, x10, x11, 0x1, -0x200000000001, 0x3f, x2, 968, x1)
+
+inst_139:
+// rs1_val == -70368744177665,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:0x9
+TEST_RR_OP(srl, x12, x10, x11, 0x7fffdfffffffff, -0x400000000001, 0x9, x2, 976, x1)
+
+inst_140:
+// rs1_val == -140737488355329,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:0x5
+TEST_RR_OP(srl, x12, x10, x11, 0x7fffbffffffffff, -0x800000000001, 0x5, x2, 984, x1)
+
+inst_141:
+// rs1_val == -281474976710657,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:0x8
+TEST_RR_OP(srl, x12, x10, x11, 0xfffeffffffffff, -0x1000000000001, 0x8, x2, 992, x1)
+
+inst_142:
+// rs1_val == -562949953421313,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:0xb
+TEST_RR_OP(srl, x12, x10, x11, 0x1fffbfffffffff, -0x2000000000001, 0xb, x2, 1000, x1)
+
+inst_143:
+// rs1_val == -1125899906842625,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:0x4
+TEST_RR_OP(srl, x12, x10, x11, 0xfffbfffffffffff, -0x4000000000001, 0x4, x2, 1008, x1)
+
+inst_144:
+// rs1_val == -2251799813685249,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:0x3b
+TEST_RR_OP(srl, x12, x10, x11, 0x1f, -0x8000000000001, 0x3b, x2, 1016, x1)
+
+inst_145:
+// rs1_val == -4503599627370497,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:0x5
+TEST_RR_OP(srl, x12, x10, x11, 0x7ff7fffffffffff, -0x10000000000001, 0x5, x2, 1024, x1)
+
+inst_146:
+// rs1_val == -9007199254740993,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:0x15
+TEST_RR_OP(srl, x12, x10, x11, 0x7feffffffff, -0x20000000000001, 0x15, x2, 1032, x1)
+
+inst_147:
+// rs1_val == -18014398509481985,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:0x3b
+TEST_RR_OP(srl, x12, x10, x11, 0x1f, -0x40000000000001, 0x3b, x2, 1040, x1)
+
+inst_148:
+// rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val == -9223372036854775808, rs1_val == (-2**(xlen-1)) and rs2_val >= 0 and rs2_val < xlen
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000000000; op2val:0x3f
+TEST_RR_OP(srl, x12, x10, x11, 0x1, -0x8000000000000000, 0x3f, x2, 1048, x1)
+
+inst_149:
+// rs1_val < 0 and rs2_val == 0, rs1_val == -17179869185
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:0x0
+TEST_RR_OP(srl, x12, x10, x11, 0xfffffffbffffffff, -0x400000001, 0x0, x2, 1056, x1)
+
+inst_150:
+// rs1_val == 16, rs2_val == 59
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x3b
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x10, 0x3b, x2, 1064, x1)
+
+inst_151:
+// rs1_val == 512,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:0x3f
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x200, 0x3f, x2, 1072, x1)
+
+inst_152:
+// rs1_val == 4096,
+// opcode: srl ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x1f
+TEST_RR_OP(srl, x12, x10, x11, 0x0, 0x1000, 0x1f, x2, 1080, x1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x4_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_1:
+ .fill 17*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 136*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/srli-01.S b/riscof/suite/rv64i_m/I/srli-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..5ed10d820d902ca2e2e68286afd1125983859ee7
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/srli-01.S
@@ -0,0 +1,839 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the srli instruction of the RISC-V I extension for the srli covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",srli)
+
+RVTEST_SIGBASE( x16,signature_x16_1)
+
+inst_0:
+// rs1 == rd, rs1==x26, rd==x26, rs1_val < 0 and imm_val > 0 and imm_val < xlen, imm_val == 8
+// opcode: srli ; op1:x26; dest:x26; op1val:-0x1; immval:0x8
+TEST_IMM_OP( srli, x26, x26, 0xffffffffffffff, -0x1, 0x8, x16, 0, x20)
+
+inst_1:
+// rs1 != rd, rs1==x25, rd==x0, rs1_val > 0 and imm_val > 0 and imm_val < xlen, rs1_val==3037000499
+// opcode: srli ; op1:x25; dest:x0; op1val:0xb504f333; immval:0xe
+TEST_IMM_OP( srli, x0, x25, 0, 0xb504f333, 0xe, x16, 8, x20)
+
+inst_2:
+// rs1==x21, rd==x6, rs1_val < 0 and imm_val == 0, rs1_val == -137438953473
+// opcode: srli ; op1:x21; dest:x6; op1val:-0x2000000001; immval:0x0
+TEST_IMM_OP( srli, x6, x21, 0xffffffdfffffffff, -0x2000000001, 0x0, x16, 16, x20)
+
+inst_3:
+// rs1==x17, rd==x5, rs1_val > 0 and imm_val == 0, rs1_val==7378697629483820646
+// opcode: srli ; op1:x17; dest:x5; op1val:0x6666666666666666; immval:0x0
+TEST_IMM_OP( srli, x5, x17, 0x6666666666666666, 0x6666666666666666, 0x0, x16, 24, x20)
+
+inst_4:
+// rs1==x30, rd==x24, rs1_val < 0 and imm_val == (xlen-1),
+// opcode: srli ; op1:x30; dest:x24; op1val:-0x8; immval:0x3f
+TEST_IMM_OP( srli, x24, x30, 0x1, -0x8, 0x3f, x16, 32, x20)
+
+inst_5:
+// rs1==x4, rd==x1, rs1_val > 0 and imm_val == (xlen-1), rs1_val == 2251799813685248
+// opcode: srli ; op1:x4; dest:x1; op1val:0x8000000000000; immval:0x3f
+TEST_IMM_OP( srli, x1, x4, 0x0, 0x8000000000000, 0x3f, x16, 40, x20)
+
+inst_6:
+// rs1==x9, rd==x13, rs1_val == imm_val and imm_val > 0 and imm_val < xlen, rs1_val==3
+// opcode: srli ; op1:x9; dest:x13; op1val:0x3; immval:0x3
+TEST_IMM_OP( srli, x13, x9, 0x0, 0x3, 0x3, x16, 48, x20)
+
+inst_7:
+// rs1==x2, rd==x3, rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < xlen, rs1_val == -9223372036854775808
+// opcode: srli ; op1:x2; dest:x3; op1val:-0x8000000000000000; immval:0x9
+TEST_IMM_OP( srli, x3, x2, 0x40000000000000, -0x8000000000000000, 0x9, x16, 56, x20)
+
+inst_8:
+// rs1==x8, rd==x10, rs1_val == 0 and imm_val >= 0 and imm_val < xlen, rs1_val==0
+// opcode: srli ; op1:x8; dest:x10; op1val:0x0; immval:0x3
+TEST_IMM_OP( srli, x10, x8, 0x0, 0x0, 0x3, x16, 64, x20)
+
+inst_9:
+// rs1==x6, rd==x23, rs1_val == (2**(xlen-1)-1) and imm_val >= 0 and imm_val < xlen, rs1_val == 9223372036854775807
+// opcode: srli ; op1:x6; dest:x23; op1val:0x7fffffffffffffff; immval:0xb
+TEST_IMM_OP( srli, x23, x6, 0xfffffffffffff, 0x7fffffffffffffff, 0xb, x16, 72, x20)
+
+inst_10:
+// rs1==x12, rd==x28, rs1_val == 1 and imm_val >= 0 and imm_val < xlen, rs1_val == 1, imm_val == 21
+// opcode: srli ; op1:x12; dest:x28; op1val:0x1; immval:0x15
+TEST_IMM_OP( srli, x28, x12, 0x0, 0x1, 0x15, x16, 80, x20)
+
+inst_11:
+// rs1==x15, rd==x7, rs1_val == 2, imm_val == 59, rs1_val==2
+// opcode: srli ; op1:x15; dest:x7; op1val:0x2; immval:0x3b
+TEST_IMM_OP( srli, x7, x15, 0x0, 0x2, 0x3b, x16, 88, x20)
+
+inst_12:
+// rs1==x11, rd==x15, rs1_val == 4, rs1_val==4
+// opcode: srli ; op1:x11; dest:x15; op1val:0x4; immval:0x3f
+TEST_IMM_OP( srli, x15, x11, 0x0, 0x4, 0x3f, x16, 96, x20)
+
+inst_13:
+// rs1==x19, rd==x9, rs1_val == 8,
+// opcode: srli ; op1:x19; dest:x9; op1val:0x8; immval:0x8
+TEST_IMM_OP( srli, x9, x19, 0x0, 0x8, 0x8, x16, 104, x20)
+
+inst_14:
+// rs1==x28, rd==x25, rs1_val == 16,
+// opcode: srli ; op1:x28; dest:x25; op1val:0x10; immval:0x7
+TEST_IMM_OP( srli, x25, x28, 0x0, 0x10, 0x7, x16, 112, x20)
+
+inst_15:
+// rs1==x27, rd==x31, rs1_val == 32,
+// opcode: srli ; op1:x27; dest:x31; op1val:0x20; immval:0x11
+TEST_IMM_OP( srli, x31, x27, 0x0, 0x20, 0x11, x16, 120, x20)
+
+inst_16:
+// rs1==x14, rd==x21, rs1_val == 64, imm_val == 1
+// opcode: srli ; op1:x14; dest:x21; op1val:0x40; immval:0x1
+TEST_IMM_OP( srli, x21, x14, 0x20, 0x40, 0x1, x16, 128, x20)
+
+inst_17:
+// rs1==x3, rd==x30, rs1_val == 128,
+// opcode: srli ; op1:x3; dest:x30; op1val:0x80; immval:0x5
+TEST_IMM_OP( srli, x30, x3, 0x4, 0x80, 0x5, x16, 136, x20)
+
+inst_18:
+// rs1==x18, rd==x8, rs1_val == 256,
+// opcode: srli ; op1:x18; dest:x8; op1val:0x100; immval:0x8
+TEST_IMM_OP( srli, x8, x18, 0x1, 0x100, 0x8, x16, 144, x20)
+
+inst_19:
+// rs1==x31, rd==x17, rs1_val == 512, imm_val == 47
+// opcode: srli ; op1:x31; dest:x17; op1val:0x200; immval:0x2f
+TEST_IMM_OP( srli, x17, x31, 0x0, 0x200, 0x2f, x16, 152, x6)
+
+inst_20:
+// rs1==x7, rd==x18, rs1_val == 1024,
+// opcode: srli ; op1:x7; dest:x18; op1val:0x400; immval:0x13
+TEST_IMM_OP( srli, x18, x7, 0x0, 0x400, 0x13, x16, 160, x6)
+
+inst_21:
+// rs1==x29, rd==x4, rs1_val == 2048,
+// opcode: srli ; op1:x29; dest:x4; op1val:0x800; immval:0x13
+TEST_IMM_OP( srli, x4, x29, 0x0, 0x800, 0x13, x16, 168, x6)
+RVTEST_SIGBASE( x3,signature_x3_0)
+
+inst_22:
+// rs1==x20, rd==x19, rs1_val == 4096,
+// opcode: srli ; op1:x20; dest:x19; op1val:0x1000; immval:0xc
+TEST_IMM_OP( srli, x19, x20, 0x1, 0x1000, 0xc, x3, 0, x6)
+
+inst_23:
+// rs1==x5, rd==x16, rs1_val == 8192,
+// opcode: srli ; op1:x5; dest:x16; op1val:0x2000; immval:0x1
+TEST_IMM_OP( srli, x16, x5, 0x1000, 0x2000, 0x1, x3, 8, x6)
+
+inst_24:
+// rs1==x1, rd==x14, rs1_val == 16384,
+// opcode: srli ; op1:x1; dest:x14; op1val:0x4000; immval:0x8
+TEST_IMM_OP( srli, x14, x1, 0x40, 0x4000, 0x8, x3, 16, x6)
+
+inst_25:
+// rs1==x10, rd==x2, rs1_val == 32768,
+// opcode: srli ; op1:x10; dest:x2; op1val:0x8000; immval:0x6
+TEST_IMM_OP( srli, x2, x10, 0x200, 0x8000, 0x6, x3, 24, x6)
+
+inst_26:
+// rs1==x16, rd==x20, rs1_val == 65536,
+// opcode: srli ; op1:x16; dest:x20; op1val:0x10000; immval:0x2f
+TEST_IMM_OP( srli, x20, x16, 0x0, 0x10000, 0x2f, x3, 32, x6)
+
+inst_27:
+// rs1==x13, rd==x27, rs1_val == 131072,
+// opcode: srli ; op1:x13; dest:x27; op1val:0x20000; immval:0xf
+TEST_IMM_OP( srli, x27, x13, 0x4, 0x20000, 0xf, x3, 40, x6)
+
+inst_28:
+// rs1==x0, rd==x29, rs1_val == 262144,
+// opcode: srli ; op1:x0; dest:x29; op1val:0x0; immval:0x7
+TEST_IMM_OP( srli, x29, x0, 0x0, 0x0, 0x7, x3, 48, x6)
+
+inst_29:
+// rs1==x24, rd==x11, rs1_val == 524288, imm_val == 42
+// opcode: srli ; op1:x24; dest:x11; op1val:0x80000; immval:0x2a
+TEST_IMM_OP( srli, x11, x24, 0x0, 0x80000, 0x2a, x3, 56, x6)
+
+inst_30:
+// rs1==x23, rd==x22, rs1_val == 1048576, imm_val == 32
+// opcode: srli ; op1:x23; dest:x22; op1val:0x100000; immval:0x20
+TEST_IMM_OP( srli, x22, x23, 0x0, 0x100000, 0x20, x3, 64, x6)
+
+inst_31:
+// rs1==x22, rd==x12, rs1_val == 2097152,
+// opcode: srli ; op1:x22; dest:x12; op1val:0x200000; immval:0x1
+TEST_IMM_OP( srli, x12, x22, 0x100000, 0x200000, 0x1, x3, 72, x6)
+
+inst_32:
+// rs1_val == 4194304,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x400000; immval:0x6
+TEST_IMM_OP( srli, x11, x10, 0x10000, 0x400000, 0x6, x3, 80, x6)
+
+inst_33:
+// rs1_val == 8388608,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x800000; immval:0xd
+TEST_IMM_OP( srli, x11, x10, 0x400, 0x800000, 0xd, x3, 88, x6)
+
+inst_34:
+// rs1_val == 16777216, imm_val == 31
+// opcode: srli ; op1:x10; dest:x11; op1val:0x1000000; immval:0x1f
+TEST_IMM_OP( srli, x11, x10, 0x0, 0x1000000, 0x1f, x3, 96, x6)
+
+inst_35:
+// rs1_val == 33554432,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x2000000; immval:0xb
+TEST_IMM_OP( srli, x11, x10, 0x4000, 0x2000000, 0xb, x3, 104, x6)
+
+inst_36:
+// rs1_val == 67108864,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x4000000; immval:0x1f
+TEST_IMM_OP( srli, x11, x10, 0x0, 0x4000000, 0x1f, x3, 112, x6)
+
+inst_37:
+// rs1_val == 134217728,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x8000000; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x200, 0x8000000, 0x12, x3, 120, x6)
+
+inst_38:
+// rs1_val == 268435456,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x10000000; immval:0x0
+TEST_IMM_OP( srli, x11, x10, 0x10000000, 0x10000000, 0x0, x3, 128, x6)
+
+inst_39:
+// rs1_val == 536870912,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x20000000; immval:0x2a
+TEST_IMM_OP( srli, x11, x10, 0x0, 0x20000000, 0x2a, x3, 136, x6)
+
+inst_40:
+// rs1_val == 1073741824,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x40000000; immval:0x15
+TEST_IMM_OP( srli, x11, x10, 0x200, 0x40000000, 0x15, x3, 144, x6)
+
+inst_41:
+// rs1_val == 2147483648,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x80000000; immval:0xa
+TEST_IMM_OP( srli, x11, x10, 0x200000, 0x80000000, 0xa, x3, 152, x6)
+
+inst_42:
+// rs1_val == 4294967296,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x100000000; immval:0x13
+TEST_IMM_OP( srli, x11, x10, 0x2000, 0x100000000, 0x13, x3, 160, x6)
+
+inst_43:
+// rs1_val == 8589934592,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x200000000; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x8000, 0x200000000, 0x12, x3, 168, x6)
+
+inst_44:
+// rs1_val == 17179869184,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x400000000; immval:0x0
+TEST_IMM_OP( srli, x11, x10, 0x400000000, 0x400000000, 0x0, x3, 176, x6)
+
+inst_45:
+// rs1_val == 34359738368,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x800000000; immval:0x3
+TEST_IMM_OP( srli, x11, x10, 0x100000000, 0x800000000, 0x3, x3, 184, x6)
+
+inst_46:
+// rs1_val == 68719476736,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x1000000000; immval:0xd
+TEST_IMM_OP( srli, x11, x10, 0x800000, 0x1000000000, 0xd, x3, 192, x6)
+
+inst_47:
+// rs1_val == 137438953472,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x2000000000; immval:0x1f
+TEST_IMM_OP( srli, x11, x10, 0x40, 0x2000000000, 0x1f, x3, 200, x6)
+
+inst_48:
+// rs1_val == 274877906944,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x4000000000; immval:0x3b
+TEST_IMM_OP( srli, x11, x10, 0x0, 0x4000000000, 0x3b, x3, 208, x6)
+
+inst_49:
+// rs1_val == 549755813888, imm_val == 4
+// opcode: srli ; op1:x10; dest:x11; op1val:0x8000000000; immval:0x4
+TEST_IMM_OP( srli, x11, x10, 0x800000000, 0x8000000000, 0x4, x3, 216, x6)
+
+inst_50:
+// rs1_val == 1099511627776,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x10000000000; immval:0x15
+TEST_IMM_OP( srli, x11, x10, 0x80000, 0x10000000000, 0x15, x3, 224, x6)
+
+inst_51:
+// rs1_val == 2199023255552,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x20000000000; immval:0x13
+TEST_IMM_OP( srli, x11, x10, 0x400000, 0x20000000000, 0x13, x3, 232, x6)
+
+inst_52:
+// rs1_val == 4398046511104, imm_val == 61
+// opcode: srli ; op1:x10; dest:x11; op1val:0x40000000000; immval:0x3d
+TEST_IMM_OP( srli, x11, x10, 0x0, 0x40000000000, 0x3d, x3, 240, x6)
+
+inst_53:
+// rs1_val == 8796093022208,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x80000000000; immval:0x2a
+TEST_IMM_OP( srli, x11, x10, 0x2, 0x80000000000, 0x2a, x3, 248, x6)
+
+inst_54:
+// rs1_val == 17592186044416,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x100000000000; immval:0x0
+TEST_IMM_OP( srli, x11, x10, 0x100000000000, 0x100000000000, 0x0, x3, 256, x6)
+
+inst_55:
+// rs1_val == 35184372088832,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x200000000000; immval:0x1
+TEST_IMM_OP( srli, x11, x10, 0x100000000000, 0x200000000000, 0x1, x3, 264, x6)
+
+inst_56:
+// rs1_val == 70368744177664,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x400000000000; immval:0xb
+TEST_IMM_OP( srli, x11, x10, 0x800000000, 0x400000000000, 0xb, x3, 272, x6)
+
+inst_57:
+// rs1_val == 140737488355328,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x800000000000; immval:0x3d
+TEST_IMM_OP( srli, x11, x10, 0x0, 0x800000000000, 0x3d, x3, 280, x6)
+
+inst_58:
+// rs1_val == 281474976710656,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x1000000000000; immval:0x2a
+TEST_IMM_OP( srli, x11, x10, 0x40, 0x1000000000000, 0x2a, x3, 288, x6)
+
+inst_59:
+// rs1_val == 562949953421312,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x2000000000000; immval:0x8
+TEST_IMM_OP( srli, x11, x10, 0x20000000000, 0x2000000000000, 0x8, x3, 296, x6)
+
+inst_60:
+// rs1_val == 1125899906842624,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x4000000000000; immval:0x20
+TEST_IMM_OP( srli, x11, x10, 0x40000, 0x4000000000000, 0x20, x3, 304, x6)
+
+inst_61:
+// rs1_val == 4503599627370496,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x10000000000000; immval:0x2a
+TEST_IMM_OP( srli, x11, x10, 0x400, 0x10000000000000, 0x2a, x3, 312, x6)
+
+inst_62:
+// rs1_val == 9007199254740992, imm_val == 62
+// opcode: srli ; op1:x10; dest:x11; op1val:0x20000000000000; immval:0x3e
+TEST_IMM_OP( srli, x11, x10, 0x0, 0x20000000000000, 0x3e, x3, 320, x6)
+
+inst_63:
+// rs1_val == 18014398509481984,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x40000000000000; immval:0xd
+TEST_IMM_OP( srli, x11, x10, 0x20000000000, 0x40000000000000, 0xd, x3, 328, x6)
+
+inst_64:
+// rs1_val == 36028797018963968,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x80000000000000; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x2000000000, 0x80000000000000, 0x12, x3, 336, x6)
+
+inst_65:
+// rs1_val == 72057594037927936,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x100000000000000; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x4000000000, 0x100000000000000, 0x12, x3, 344, x6)
+
+inst_66:
+// rs1_val == 144115188075855872,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x200000000000000; immval:0xd
+TEST_IMM_OP( srli, x11, x10, 0x100000000000, 0x200000000000000, 0xd, x3, 352, x6)
+
+inst_67:
+// rs1_val == 288230376151711744,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x400000000000000; immval:0x6
+TEST_IMM_OP( srli, x11, x10, 0x10000000000000, 0x400000000000000, 0x6, x3, 360, x6)
+
+inst_68:
+// rs1_val == 576460752303423488,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x800000000000000; immval:0x20
+TEST_IMM_OP( srli, x11, x10, 0x8000000, 0x800000000000000, 0x20, x3, 368, x6)
+
+inst_69:
+// rs1_val == 1152921504606846976,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x1000000000000000; immval:0x3
+TEST_IMM_OP( srli, x11, x10, 0x200000000000000, 0x1000000000000000, 0x3, x3, 376, x6)
+
+inst_70:
+// rs1_val == 2305843009213693952,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x2000000000000000; immval:0x3
+TEST_IMM_OP( srli, x11, x10, 0x400000000000000, 0x2000000000000000, 0x3, x3, 384, x6)
+
+inst_71:
+// rs1_val == 4611686018427387904,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x4000000000000000; immval:0xf
+TEST_IMM_OP( srli, x11, x10, 0x800000000000, 0x4000000000000000, 0xf, x3, 392, x6)
+
+inst_72:
+// rs1_val == -2, imm_val == 16
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x2; immval:0x10
+TEST_IMM_OP( srli, x11, x10, 0xffffffffffff, -0x2, 0x10, x3, 400, x6)
+
+inst_73:
+// rs1_val == -3,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x3; immval:0x3d
+TEST_IMM_OP( srli, x11, x10, 0x7, -0x3, 0x3d, x3, 408, x6)
+
+inst_74:
+// rs1_val == -5,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x5; immval:0x3f
+TEST_IMM_OP( srli, x11, x10, 0x1, -0x5, 0x3f, x3, 416, x6)
+
+inst_75:
+// rs1_val == -9,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x9; immval:0x3
+TEST_IMM_OP( srli, x11, x10, 0x1ffffffffffffffe, -0x9, 0x3, x3, 424, x6)
+
+inst_76:
+// rs1_val == -17,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x11; immval:0xc
+TEST_IMM_OP( srli, x11, x10, 0xfffffffffffff, -0x11, 0xc, x3, 432, x6)
+
+inst_77:
+// rs1_val == -33,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x21; immval:0x6
+TEST_IMM_OP( srli, x11, x10, 0x3ffffffffffffff, -0x21, 0x6, x3, 440, x6)
+
+inst_78:
+// rs1_val == -65,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x41; immval:0x5
+TEST_IMM_OP( srli, x11, x10, 0x7fffffffffffffd, -0x41, 0x5, x3, 448, x6)
+
+inst_79:
+// rs1_val == -129,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x81; immval:0xd
+TEST_IMM_OP( srli, x11, x10, 0x7ffffffffffff, -0x81, 0xd, x3, 456, x6)
+
+inst_80:
+// rs1_val == -257,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x101; immval:0x3e
+TEST_IMM_OP( srli, x11, x10, 0x3, -0x101, 0x3e, x3, 464, x6)
+
+inst_81:
+// rs1_val == -513,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x201; immval:0xd
+TEST_IMM_OP( srli, x11, x10, 0x7ffffffffffff, -0x201, 0xd, x3, 472, x6)
+
+inst_82:
+// rs1_val == -1025,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x401; immval:0x9
+TEST_IMM_OP( srli, x11, x10, 0x7ffffffffffffd, -0x401, 0x9, x3, 480, x6)
+
+inst_83:
+// rs1_val == -2049,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x801; immval:0xe
+TEST_IMM_OP( srli, x11, x10, 0x3ffffffffffff, -0x801, 0xe, x3, 488, x6)
+
+inst_84:
+// rs1_val == -4097, imm_val == 55
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x1001; immval:0x37
+TEST_IMM_OP( srli, x11, x10, 0x1ff, -0x1001, 0x37, x3, 496, x6)
+
+inst_85:
+// rs1_val == -8193,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x2001; immval:0x6
+TEST_IMM_OP( srli, x11, x10, 0x3ffffffffffff7f, -0x2001, 0x6, x3, 504, x6)
+
+inst_86:
+// rs1_val == -16385,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x4001; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x3fffffffffff, -0x4001, 0x12, x3, 512, x6)
+
+inst_87:
+// rs1_val == -32769,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x8001; immval:0x0
+TEST_IMM_OP( srli, x11, x10, 0xffffffffffff7fff, -0x8001, 0x0, x3, 520, x6)
+
+inst_88:
+// rs1_val == -65537,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x10001; immval:0xe
+TEST_IMM_OP( srli, x11, x10, 0x3fffffffffffb, -0x10001, 0xe, x3, 528, x6)
+
+inst_89:
+// rs1_val == -131073,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x20001; immval:0x1f
+TEST_IMM_OP( srli, x11, x10, 0x1ffffffff, -0x20001, 0x1f, x3, 536, x6)
+
+inst_90:
+// rs1_val == -9007199254740993,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x20000000000001; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x3ff7ffffffff, -0x20000000000001, 0x12, x3, 544, x6)
+
+inst_91:
+// rs1_val == -18014398509481985,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x40000000000001; immval:0x1f
+TEST_IMM_OP( srli, x11, x10, 0x1ff7fffff, -0x40000000000001, 0x1f, x3, 552, x6)
+
+inst_92:
+// rs1_val == -36028797018963969,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x80000000000001; immval:0x3b
+TEST_IMM_OP( srli, x11, x10, 0x1f, -0x80000000000001, 0x3b, x3, 560, x6)
+
+inst_93:
+// rs1_val == -72057594037927937,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x100000000000001; immval:0x3
+TEST_IMM_OP( srli, x11, x10, 0x1fdfffffffffffff, -0x100000000000001, 0x3, x3, 568, x6)
+
+inst_94:
+// rs1_val == -144115188075855873,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x200000000000001; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x3f7fffffffff, -0x200000000000001, 0x12, x3, 576, x6)
+
+inst_95:
+// rs1_val == -288230376151711745,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x400000000000001; immval:0x8
+TEST_IMM_OP( srli, x11, x10, 0xfbffffffffffff, -0x400000000000001, 0x8, x3, 584, x6)
+
+inst_96:
+// rs1_val == -576460752303423489,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x800000000000001; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x3dffffffffff, -0x800000000000001, 0x12, x3, 592, x6)
+
+inst_97:
+// rs1_val == -1152921504606846977,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x1000000000000001; immval:0xb
+TEST_IMM_OP( srli, x11, x10, 0x1dffffffffffff, -0x1000000000000001, 0xb, x3, 600, x6)
+
+inst_98:
+// rs1_val == -2305843009213693953,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x2000000000000001; immval:0xc
+TEST_IMM_OP( srli, x11, x10, 0xdffffffffffff, -0x2000000000000001, 0xc, x3, 608, x6)
+
+inst_99:
+// rs1_val == -4611686018427387905,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x4000000000000001; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x2fffffffffff, -0x4000000000000001, 0x12, x3, 616, x6)
+
+inst_100:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode: srli ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x9
+TEST_IMM_OP( srli, x11, x10, 0x2aaaaaaaaaaaaa, 0x5555555555555555, 0x9, x3, 624, x6)
+
+inst_101:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x1
+TEST_IMM_OP( srli, x11, x10, 0x5555555555555555, -0x5555555555555556, 0x1, x3, 632, x6)
+
+inst_102:
+// rs1_val==5,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x5; immval:0x13
+TEST_IMM_OP( srli, x11, x10, 0x0, 0x5, 0x13, x3, 640, x6)
+
+inst_103:
+// rs1_val==3689348814741910323,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x20
+TEST_IMM_OP( srli, x11, x10, 0x33333333, 0x3333333333333333, 0x20, x3, 648, x6)
+
+inst_104:
+// rs1_val==-3037000499,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x5
+TEST_IMM_OP( srli, x11, x10, 0x7fffffffa57d866, -0xb504f333, 0x5, x3, 656, x6)
+
+inst_105:
+// rs1_val==6148914691236517204,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x1
+TEST_IMM_OP( srli, x11, x10, 0x2aaaaaaaaaaaaaaa, 0x5555555555555554, 0x1, x3, 664, x6)
+
+inst_106:
+// rs1_val==3689348814741910322,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x7
+TEST_IMM_OP( srli, x11, x10, 0x66666666666666, 0x3333333333333332, 0x7, x3, 672, x6)
+
+inst_107:
+// rs1_val==7378697629483820645,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2f
+TEST_IMM_OP( srli, x11, x10, 0xcccc, 0x6666666666666665, 0x2f, x3, 680, x6)
+
+inst_108:
+// rs1_val==3037000498,
+// opcode: srli ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x15
+TEST_IMM_OP( srli, x11, x10, 0x5a8, 0xb504f332, 0x15, x3, 688, x6)
+
+inst_109:
+// rs1_val==6148914691236517206,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0xb
+TEST_IMM_OP( srli, x11, x10, 0xaaaaaaaaaaaaa, 0x5555555555555556, 0xb, x3, 696, x6)
+
+inst_110:
+// rs1_val==-6148914691236517205,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0xa
+TEST_IMM_OP( srli, x11, x10, 0x2aaaaaaaaaaaaa, -0x5555555555555555, 0xa, x3, 704, x6)
+
+inst_111:
+// rs1_val==6,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x6; immval:0xd
+TEST_IMM_OP( srli, x11, x10, 0x0, 0x6, 0xd, x3, 712, x6)
+
+inst_112:
+// rs1_val==3689348814741910324,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0xe
+TEST_IMM_OP( srli, x11, x10, 0xcccccccccccc, 0x3333333333333334, 0xe, x3, 720, x6)
+
+inst_113:
+// rs1_val==7378697629483820647,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x0
+TEST_IMM_OP( srli, x11, x10, 0x6666666666666667, 0x6666666666666667, 0x0, x3, 728, x6)
+
+inst_114:
+// rs1_val==-3037000498,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x3e
+TEST_IMM_OP( srli, x11, x10, 0x3, -0xb504f332, 0x3e, x3, 736, x6)
+
+inst_115:
+// rs1_val==3037000500,
+// opcode: srli ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x20
+TEST_IMM_OP( srli, x11, x10, 0x0, 0xb504f334, 0x20, x3, 744, x6)
+
+inst_116:
+// imm_val == 2,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x40000000000000; immval:0x2
+TEST_IMM_OP( srli, x11, x10, 0x10000000000000, 0x40000000000000, 0x2, x3, 752, x6)
+
+inst_117:
+// rs1_val == -262145,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x40001; immval:0x2
+TEST_IMM_OP( srli, x11, x10, 0x3ffffffffffeffff, -0x40001, 0x2, x3, 760, x6)
+
+inst_118:
+// rs1_val == -524289,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x80001; immval:0x37
+TEST_IMM_OP( srli, x11, x10, 0x1ff, -0x80001, 0x37, x3, 768, x6)
+
+inst_119:
+// rs1_val == -1048577,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x100001; immval:0x37
+TEST_IMM_OP( srli, x11, x10, 0x1ff, -0x100001, 0x37, x3, 776, x6)
+
+inst_120:
+// rs1_val == -2097153,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x200001; immval:0x3e
+TEST_IMM_OP( srli, x11, x10, 0x3, -0x200001, 0x3e, x3, 784, x6)
+
+inst_121:
+// rs1_val == -4194305,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x400001; immval:0x3b
+TEST_IMM_OP( srli, x11, x10, 0x1f, -0x400001, 0x3b, x3, 792, x6)
+
+inst_122:
+// rs1_val == -8388609,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x800001; immval:0x15
+TEST_IMM_OP( srli, x11, x10, 0x7fffffffffb, -0x800001, 0x15, x3, 800, x6)
+
+inst_123:
+// rs1_val == -16777217,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x1000001; immval:0x1
+TEST_IMM_OP( srli, x11, x10, 0x7fffffffff7fffff, -0x1000001, 0x1, x3, 808, x6)
+
+inst_124:
+// rs1_val == -33554433,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x2000001; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x3fffffffff7f, -0x2000001, 0x12, x3, 816, x6)
+
+inst_125:
+// rs1_val == -67108865,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x4000001; immval:0xa
+TEST_IMM_OP( srli, x11, x10, 0x3ffffffffeffff, -0x4000001, 0xa, x3, 824, x6)
+
+inst_126:
+// rs1_val == -134217729,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x8000001; immval:0x20
+TEST_IMM_OP( srli, x11, x10, 0xffffffff, -0x8000001, 0x20, x3, 832, x6)
+
+inst_127:
+// rs1_val == -268435457,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x10000001; immval:0xc
+TEST_IMM_OP( srli, x11, x10, 0xffffffffeffff, -0x10000001, 0xc, x3, 840, x6)
+
+inst_128:
+// rs1_val == -536870913,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x20000001; immval:0xe
+TEST_IMM_OP( srli, x11, x10, 0x3ffffffff7fff, -0x20000001, 0xe, x3, 848, x6)
+
+inst_129:
+// rs1_val == -1073741825,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x40000001; immval:0x37
+TEST_IMM_OP( srli, x11, x10, 0x1ff, -0x40000001, 0x37, x3, 856, x6)
+
+inst_130:
+// rs1_val == -2147483649,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x80000001; immval:0x1
+TEST_IMM_OP( srli, x11, x10, 0x7fffffffbfffffff, -0x80000001, 0x1, x3, 864, x6)
+
+inst_131:
+// rs1_val == -4294967297,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x100000001; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x3fffffffbfff, -0x100000001, 0x12, x3, 872, x6)
+
+inst_132:
+// rs1_val == -8589934593,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x200000001; immval:0x11
+TEST_IMM_OP( srli, x11, x10, 0x7ffffffeffff, -0x200000001, 0x11, x3, 880, x6)
+
+inst_133:
+// rs1_val == -17179869185,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x400000001; immval:0xe
+TEST_IMM_OP( srli, x11, x10, 0x3ffffffefffff, -0x400000001, 0xe, x3, 888, x6)
+
+inst_134:
+// rs1_val == -34359738369,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x800000001; immval:0x0
+TEST_IMM_OP( srli, x11, x10, 0xfffffff7ffffffff, -0x800000001, 0x0, x3, 896, x6)
+
+inst_135:
+// rs1_val == -68719476737,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x1000000001; immval:0x2
+TEST_IMM_OP( srli, x11, x10, 0x3ffffffbffffffff, -0x1000000001, 0x2, x3, 904, x6)
+
+inst_136:
+// rs1_val == -274877906945,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x4000000001; immval:0x20
+TEST_IMM_OP( srli, x11, x10, 0xffffffbf, -0x4000000001, 0x20, x3, 912, x6)
+
+inst_137:
+// rs1_val == -549755813889,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x8000000001; immval:0xa
+TEST_IMM_OP( srli, x11, x10, 0x3fffffdfffffff, -0x8000000001, 0xa, x3, 920, x6)
+
+inst_138:
+// rs1_val == -1099511627777,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x10000000001; immval:0xd
+TEST_IMM_OP( srli, x11, x10, 0x7fffff7ffffff, -0x10000000001, 0xd, x3, 928, x6)
+
+inst_139:
+// rs1_val == -2199023255553,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x20000000001; immval:0x8
+TEST_IMM_OP( srli, x11, x10, 0xfffffdffffffff, -0x20000000001, 0x8, x3, 936, x6)
+
+inst_140:
+// rs1_val == -4398046511105,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x40000000001; immval:0xb
+TEST_IMM_OP( srli, x11, x10, 0x1fffff7fffffff, -0x40000000001, 0xb, x3, 944, x6)
+
+inst_141:
+// rs1_val == -8796093022209,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x80000000001; immval:0x6
+TEST_IMM_OP( srli, x11, x10, 0x3ffffdfffffffff, -0x80000000001, 0x6, x3, 952, x6)
+
+inst_142:
+// rs1_val == -17592186044417,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x100000000001; immval:0x12
+TEST_IMM_OP( srli, x11, x10, 0x3ffffbffffff, -0x100000000001, 0x12, x3, 960, x6)
+
+inst_143:
+// rs1_val == -35184372088833,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x200000000001; immval:0x3d
+TEST_IMM_OP( srli, x11, x10, 0x7, -0x200000000001, 0x3d, x3, 968, x6)
+
+inst_144:
+// rs1_val == -70368744177665,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x400000000001; immval:0x2a
+TEST_IMM_OP( srli, x11, x10, 0x3fffef, -0x400000000001, 0x2a, x3, 976, x6)
+
+inst_145:
+// rs1_val == -140737488355329,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x800000000001; immval:0x15
+TEST_IMM_OP( srli, x11, x10, 0x7fffbffffff, -0x800000000001, 0x15, x3, 984, x6)
+
+inst_146:
+// rs1_val == -281474976710657,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x1000000000001; immval:0x7
+TEST_IMM_OP( srli, x11, x10, 0x1fffdffffffffff, -0x1000000000001, 0x7, x3, 992, x6)
+
+inst_147:
+// rs1_val == -562949953421313,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x2000000000001; immval:0x3d
+TEST_IMM_OP( srli, x11, x10, 0x7, -0x2000000000001, 0x3d, x3, 1000, x6)
+
+inst_148:
+// rs1_val == -1125899906842625,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x4000000000001; immval:0x5
+TEST_IMM_OP( srli, x11, x10, 0x7ffdfffffffffff, -0x4000000000001, 0x5, x3, 1008, x6)
+
+inst_149:
+// rs1_val == -2251799813685249,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x8000000000001; immval:0xd
+TEST_IMM_OP( srli, x11, x10, 0x7ffbfffffffff, -0x8000000000001, 0xd, x3, 1016, x6)
+
+inst_150:
+// rs1_val == -4503599627370497,
+// opcode: srli ; op1:x10; dest:x11; op1val:-0x10000000000001; immval:0x15
+TEST_IMM_OP( srli, x11, x10, 0x7ff7fffffff, -0x10000000000001, 0x15, x3, 1024, x6)
+
+inst_151:
+// rs1_val > 0 and imm_val > 0 and imm_val < xlen, rs1_val==3037000499
+// opcode: srli ; op1:x10; dest:x11; op1val:0xb504f333; immval:0xe
+TEST_IMM_OP( srli, x11, x10, 0x2d413, 0xb504f333, 0xe, x3, 1032, x6)
+
+inst_152:
+// rs1_val == 262144,
+// opcode: srli ; op1:x10; dest:x11; op1val:0x40000; immval:0x7
+TEST_IMM_OP( srli, x11, x10, 0x800, 0x40000, 0x7, x3, 1040, x6)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x16_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x16_1:
+ .fill 22*(XLEN/32),4,0xdeadbeef
+
+
+signature_x3_0:
+ .fill 131*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/srliw-01.S b/riscof/suite/rv64i_m/I/srliw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..d2d180d695932072ca01eebbba0fa5816cae242a
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/srliw-01.S
@@ -0,0 +1,834 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the srliw instruction of the RISC-V I extension for the srliw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*);def TEST_CASE_1=True;",srliw)
+
+RVTEST_SIGBASE( x12,signature_x12_1)
+
+inst_0:
+// rs1 == rd, rs1==x21, rd==x21, rs1_val < 0 and imm_val > 0 and imm_val < 32, imm_val == 15, rs1_val == -68719476737
+// opcode: srliw ; op1:x21; dest:x21; op1val:-0x1000000001; immval:0xf
+TEST_IMM_OP( srliw, x21, x21, 0x1ffff, -0x1000000001, 0xf, x12, 0, x14)
+
+inst_1:
+// rs1 != rd, rs1==x22, rd==x3, rs1_val > 0 and imm_val > 0 and imm_val < 32, rs1_val==7378697629483820646, imm_val == 8
+// opcode: srliw ; op1:x22; dest:x3; op1val:0x6666666666666666; immval:0x8
+TEST_IMM_OP( srliw, x3, x22, 0x666666, 0x6666666666666666, 0x8, x12, 8, x14)
+
+inst_2:
+// rs1==x11, rd==x4, rs1_val < 0 and imm_val == 0, rs1_val == -16777217
+// opcode: srliw ; op1:x11; dest:x4; op1val:-0x1000001; immval:0x0
+TEST_IMM_OP( srliw, x4, x11, -0x1000001, -0x1000001, 0x0, x12, 16, x14)
+
+inst_3:
+// rs1==x7, rd==x23, rs1_val > 0 and imm_val == 0,
+// opcode: srliw ; op1:x7; dest:x23; op1val:0x6666666666666666; immval:0x0
+TEST_IMM_OP( srliw, x23, x7, 0x66666666, 0x6666666666666666, 0x0, x12, 24, x14)
+
+inst_4:
+// rs1==x31, rd==x17, rs1_val < 0 and imm_val == 31, rs1_val == -36028797018963969
+// opcode: srliw ; op1:x31; dest:x17; op1val:-0x80000000000001; immval:0x1f
+TEST_IMM_OP( srliw, x17, x31, 0x1, -0x80000000000001, 0x1f, x12, 32, x14)
+
+inst_5:
+// rs1==x10, rd==x28, rs1_val > 0 and imm_val == 31, rs1_val == 1099511627776
+// opcode: srliw ; op1:x10; dest:x28; op1val:0x10000000000; immval:0x1f
+TEST_IMM_OP( srliw, x28, x10, 0x0, 0x10000000000, 0x1f, x12, 40, x14)
+
+inst_6:
+// rs1==x24, rd==x9, rs1_val == imm_val and imm_val > 0 and imm_val < 32,
+// opcode: srliw ; op1:x24; dest:x9; op1val:0x9; immval:0x9
+TEST_IMM_OP( srliw, x9, x24, 0x0, 0x9, 0x9, x12, 48, x14)
+
+inst_7:
+// rs1==x20, rd==x0, rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < 32, imm_val == 27, rs1_val == -9223372036854775808
+// opcode: srliw ; op1:x20; dest:x0; op1val:-0x8000000000000000; immval:0x1b
+TEST_IMM_OP( srliw, x0, x20, 0, -0x8000000000000000, 0x1b, x12, 56, x14)
+
+inst_8:
+// rs1==x15, rd==x8, rs1_val == 0 and imm_val >= 0 and imm_val < 32, imm_val == 1, rs1_val==0
+// opcode: srliw ; op1:x15; dest:x8; op1val:0x0; immval:0x1
+TEST_IMM_OP( srliw, x8, x15, 0x0, 0x0, 0x1, x12, 64, x14)
+
+inst_9:
+// rs1==x28, rd==x20, rs1_val == (2**(xlen-1)-1) and imm_val >= 0 and imm_val < 32, rs1_val == 9223372036854775807
+// opcode: srliw ; op1:x28; dest:x20; op1val:0x7fffffffffffffff; immval:0xb
+TEST_IMM_OP( srliw, x20, x28, 0x1fffff, 0x7fffffffffffffff, 0xb, x12, 72, x14)
+
+inst_10:
+// rs1==x23, rd==x19, rs1_val == 1 and imm_val >= 0 and imm_val < 32, rs1_val == 1, imm_val == 10
+// opcode: srliw ; op1:x23; dest:x19; op1val:0x1; immval:0xa
+TEST_IMM_OP( srliw, x19, x23, 0x0, 0x1, 0xa, x12, 80, x14)
+
+inst_11:
+// rs1==x13, rd==x15, rs1_val == 2, rs1_val==2
+// opcode: srliw ; op1:x13; dest:x15; op1val:0x2; immval:0x11
+TEST_IMM_OP( srliw, x15, x13, 0x0, 0x2, 0x11, x12, 88, x14)
+
+inst_12:
+// rs1==x8, rd==x16, rs1_val == 4, rs1_val==4
+// opcode: srliw ; op1:x8; dest:x16; op1val:0x4; immval:0x12
+TEST_IMM_OP( srliw, x16, x8, 0x0, 0x4, 0x12, x12, 96, x14)
+
+inst_13:
+// rs1==x4, rd==x26, rs1_val == 8,
+// opcode: srliw ; op1:x4; dest:x26; op1val:0x8; immval:0x12
+TEST_IMM_OP( srliw, x26, x4, 0x0, 0x8, 0x12, x12, 104, x14)
+
+inst_14:
+// rs1==x2, rd==x29, rs1_val == 16,
+// opcode: srliw ; op1:x2; dest:x29; op1val:0x10; immval:0x11
+TEST_IMM_OP( srliw, x29, x2, 0x0, 0x10, 0x11, x12, 112, x14)
+
+inst_15:
+// rs1==x5, rd==x27, rs1_val == 32,
+// opcode: srliw ; op1:x5; dest:x27; op1val:0x20; immval:0x6
+TEST_IMM_OP( srliw, x27, x5, 0x0, 0x20, 0x6, x12, 120, x14)
+
+inst_16:
+// rs1==x3, rd==x13, rs1_val == 64,
+// opcode: srliw ; op1:x3; dest:x13; op1val:0x40; immval:0xc
+TEST_IMM_OP( srliw, x13, x3, 0x0, 0x40, 0xc, x12, 128, x14)
+
+inst_17:
+// rs1==x9, rd==x31, rs1_val == 128,
+// opcode: srliw ; op1:x9; dest:x31; op1val:0x80; immval:0x12
+TEST_IMM_OP( srliw, x31, x9, 0x0, 0x80, 0x12, x12, 136, x14)
+
+inst_18:
+// rs1==x6, rd==x1, rs1_val == 256,
+// opcode: srliw ; op1:x6; dest:x1; op1val:0x100; immval:0x5
+TEST_IMM_OP( srliw, x1, x6, 0x8, 0x100, 0x5, x12, 144, x14)
+
+inst_19:
+// rs1==x19, rd==x25, rs1_val == 512,
+// opcode: srliw ; op1:x19; dest:x25; op1val:0x200; immval:0x1b
+TEST_IMM_OP( srliw, x25, x19, 0x0, 0x200, 0x1b, x12, 152, x14)
+
+inst_20:
+// rs1==x18, rd==x2, rs1_val == 1024,
+// opcode: srliw ; op1:x18; dest:x2; op1val:0x400; immval:0x9
+TEST_IMM_OP( srliw, x2, x18, 0x2, 0x400, 0x9, x12, 160, x3)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_21:
+// rs1==x14, rd==x7, rs1_val == 2048,
+// opcode: srliw ; op1:x14; dest:x7; op1val:0x800; immval:0x1
+TEST_IMM_OP( srliw, x7, x14, 0x400, 0x800, 0x1, x2, 0, x3)
+
+inst_22:
+// rs1==x30, rd==x22, rs1_val == 4096,
+// opcode: srliw ; op1:x30; dest:x22; op1val:0x1000; immval:0xf
+TEST_IMM_OP( srliw, x22, x30, 0x0, 0x1000, 0xf, x2, 8, x3)
+
+inst_23:
+// rs1==x26, rd==x24, rs1_val == 8192,
+// opcode: srliw ; op1:x26; dest:x24; op1val:0x2000; immval:0x13
+TEST_IMM_OP( srliw, x24, x26, 0x0, 0x2000, 0x13, x2, 16, x3)
+
+inst_24:
+// rs1==x27, rd==x18, rs1_val == 16384, imm_val == 23
+// opcode: srliw ; op1:x27; dest:x18; op1val:0x4000; immval:0x17
+TEST_IMM_OP( srliw, x18, x27, 0x0, 0x4000, 0x17, x2, 24, x3)
+
+inst_25:
+// rs1==x12, rd==x14, rs1_val == 32768,
+// opcode: srliw ; op1:x12; dest:x14; op1val:0x8000; immval:0xc
+TEST_IMM_OP( srliw, x14, x12, 0x8, 0x8000, 0xc, x2, 32, x3)
+
+inst_26:
+// rs1==x17, rd==x30, rs1_val == 65536,
+// opcode: srliw ; op1:x17; dest:x30; op1val:0x10000; immval:0x3
+TEST_IMM_OP( srliw, x30, x17, 0x2000, 0x10000, 0x3, x2, 40, x3)
+
+inst_27:
+// rs1==x16, rd==x12, rs1_val == 131072,
+// opcode: srliw ; op1:x16; dest:x12; op1val:0x20000; immval:0x5
+TEST_IMM_OP( srliw, x12, x16, 0x1000, 0x20000, 0x5, x2, 48, x3)
+
+inst_28:
+// rs1==x29, rd==x6, rs1_val == 262144, imm_val == 29
+// opcode: srliw ; op1:x29; dest:x6; op1val:0x40000; immval:0x1d
+TEST_IMM_OP( srliw, x6, x29, 0x0, 0x40000, 0x1d, x2, 56, x3)
+
+inst_29:
+// rs1==x0, rd==x10, rs1_val == 524288,
+// opcode: srliw ; op1:x0; dest:x10; op1val:0x0; immval:0x1
+TEST_IMM_OP( srliw, x10, x0, 0x0, 0x0, 0x1, x2, 64, x3)
+
+inst_30:
+// rs1==x25, rd==x11, rs1_val == 1048576,
+// opcode: srliw ; op1:x25; dest:x11; op1val:0x100000; immval:0x6
+TEST_IMM_OP( srliw, x11, x25, 0x4000, 0x100000, 0x6, x2, 72, x3)
+
+inst_31:
+// rs1==x1, rd==x5, rs1_val == 2097152,
+// opcode: srliw ; op1:x1; dest:x5; op1val:0x200000; immval:0x6
+TEST_IMM_OP( srliw, x5, x1, 0x8000, 0x200000, 0x6, x2, 80, x3)
+
+inst_32:
+// rs1_val == 4194304,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x400000; immval:0x7
+TEST_IMM_OP( srliw, x11, x10, 0x8000, 0x400000, 0x7, x2, 88, x3)
+
+inst_33:
+// rs1_val == 8388608, imm_val == 21
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x800000; immval:0x15
+TEST_IMM_OP( srliw, x11, x10, 0x4, 0x800000, 0x15, x2, 96, x3)
+
+inst_34:
+// rs1_val == 16777216,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x1000000; immval:0xa
+TEST_IMM_OP( srliw, x11, x10, 0x4000, 0x1000000, 0xa, x2, 104, x3)
+
+inst_35:
+// rs1_val == 33554432,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x2000000; immval:0xa
+TEST_IMM_OP( srliw, x11, x10, 0x8000, 0x2000000, 0xa, x2, 112, x3)
+
+inst_36:
+// rs1_val == 67108864,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x4000000; immval:0x0
+TEST_IMM_OP( srliw, x11, x10, 0x4000000, 0x4000000, 0x0, x2, 120, x3)
+
+inst_37:
+// rs1_val == 134217728,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x8000000; immval:0x15
+TEST_IMM_OP( srliw, x11, x10, 0x40, 0x8000000, 0x15, x2, 128, x3)
+
+inst_38:
+// rs1_val == 268435456,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x10000000; immval:0x15
+TEST_IMM_OP( srliw, x11, x10, 0x80, 0x10000000, 0x15, x2, 136, x3)
+
+inst_39:
+// rs1_val == 536870912,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x20000000; immval:0x8
+TEST_IMM_OP( srliw, x11, x10, 0x200000, 0x20000000, 0x8, x2, 144, x3)
+
+inst_40:
+// rs1_val == 1073741824,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x40000000; immval:0x9
+TEST_IMM_OP( srliw, x11, x10, 0x200000, 0x40000000, 0x9, x2, 152, x3)
+
+inst_41:
+// rs1_val == 2147483648,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x80000000; immval:0xf
+TEST_IMM_OP( srliw, x11, x10, 0x10000, 0x80000000, 0xf, x2, 160, x3)
+
+inst_42:
+// rs1_val == 4294967296,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x100000000; immval:0x11
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x100000000, 0x11, x2, 168, x3)
+
+inst_43:
+// rs1_val == 8589934592,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x200000000; immval:0xa
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x200000000, 0xa, x2, 176, x3)
+
+inst_44:
+// rs1_val == 17179869184,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x400000000; immval:0x6
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x400000000, 0x6, x2, 184, x3)
+
+inst_45:
+// rs1_val == 34359738368,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x800000000; immval:0x1f
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x800000000, 0x1f, x2, 192, x3)
+
+inst_46:
+// rs1_val == 68719476736,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x1000000000; immval:0x8
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x1000000000, 0x8, x2, 200, x3)
+
+inst_47:
+// rs1_val == 137438953472,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x2000000000; immval:0x9
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x2000000000, 0x9, x2, 208, x3)
+
+inst_48:
+// rs1_val == 274877906944,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x4000000000; immval:0x3
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x4000000000, 0x3, x2, 216, x3)
+
+inst_49:
+// rs1_val == 549755813888,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x8000000000; immval:0x15
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x8000000000, 0x15, x2, 224, x3)
+
+inst_50:
+// rs1_val == 2199023255552,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x20000000000; immval:0x1f
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x20000000000, 0x1f, x2, 232, x3)
+
+inst_51:
+// rs1_val == 4398046511104,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x40000000000; immval:0x7
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x40000000000, 0x7, x2, 240, x3)
+
+inst_52:
+// rs1_val == 8796093022208,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x80000000000; immval:0x1
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x80000000000, 0x1, x2, 248, x3)
+
+inst_53:
+// rs1_val == 17592186044416,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x100000000000; immval:0x8
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x100000000000, 0x8, x2, 256, x3)
+
+inst_54:
+// rs1_val == 35184372088832,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x200000000000; immval:0x6
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x200000000000, 0x6, x2, 264, x3)
+
+inst_55:
+// rs1_val == 70368744177664,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x400000000000; immval:0xf
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x400000000000, 0xf, x2, 272, x3)
+
+inst_56:
+// rs1_val == 140737488355328,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x800000000000; immval:0x11
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x800000000000, 0x11, x2, 280, x3)
+
+inst_57:
+// rs1_val == 281474976710656,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x1000000000000; immval:0x15
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x1000000000000, 0x15, x2, 288, x3)
+
+inst_58:
+// rs1_val == 562949953421312,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x2000000000000; immval:0x11
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x2000000000000, 0x11, x2, 296, x3)
+
+inst_59:
+// rs1_val == 1125899906842624,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x4000000000000; immval:0x11
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x4000000000000, 0x11, x2, 304, x3)
+
+inst_60:
+// rs1_val == 2251799813685248, imm_val == 16
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x8000000000000; immval:0x10
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x8000000000000, 0x10, x2, 312, x3)
+
+inst_61:
+// rs1_val == 4503599627370496,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x10000000000000; immval:0x11
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x10000000000000, 0x11, x2, 320, x3)
+
+inst_62:
+// rs1_val == 9007199254740992,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x20000000000000; immval:0x15
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x20000000000000, 0x15, x2, 328, x3)
+
+inst_63:
+// rs1_val == 18014398509481984,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x40000000000000; immval:0x1
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x40000000000000, 0x1, x2, 336, x3)
+
+inst_64:
+// rs1_val == 36028797018963968,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x80000000000000; immval:0x1f
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x80000000000000, 0x1f, x2, 344, x3)
+
+inst_65:
+// rs1_val == 72057594037927936,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x100000000000000; immval:0x13
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x100000000000000, 0x13, x2, 352, x3)
+
+inst_66:
+// rs1_val == 144115188075855872,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x200000000000000; immval:0x1f
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x200000000000000, 0x1f, x2, 360, x3)
+
+inst_67:
+// rs1_val == 288230376151711744,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x400000000000000; immval:0xf
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x400000000000000, 0xf, x2, 368, x3)
+
+inst_68:
+// rs1_val == 576460752303423488,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x800000000000000; immval:0x1
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x800000000000000, 0x1, x2, 376, x3)
+
+inst_69:
+// rs1_val == 1152921504606846976,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x1000000000000000; immval:0x12
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x1000000000000000, 0x12, x2, 384, x3)
+
+inst_70:
+// rs1_val == 2305843009213693952,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x2000000000000000; immval:0x10
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x2000000000000000, 0x10, x2, 392, x3)
+
+inst_71:
+// rs1_val == 4611686018427387904,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x4000000000000000; immval:0x3
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x4000000000000000, 0x3, x2, 400, x3)
+
+inst_72:
+// rs1_val == -2,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x2; immval:0x7
+TEST_IMM_OP( srliw, x11, x10, 0x1ffffff, -0x2, 0x7, x2, 408, x3)
+
+inst_73:
+// rs1_val == -3,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x3; immval:0x0
+TEST_IMM_OP( srliw, x11, x10, -0x3, -0x3, 0x0, x2, 416, x3)
+
+inst_74:
+// rs1_val == -5,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x5; immval:0xa
+TEST_IMM_OP( srliw, x11, x10, 0x3fffff, -0x5, 0xa, x2, 424, x3)
+
+inst_75:
+// rs1_val == -9,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x9; immval:0xa
+TEST_IMM_OP( srliw, x11, x10, 0x3fffff, -0x9, 0xa, x2, 432, x3)
+
+inst_76:
+// rs1_val == -17,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x11; immval:0x7
+TEST_IMM_OP( srliw, x11, x10, 0x1ffffff, -0x11, 0x7, x2, 440, x3)
+
+inst_77:
+// rs1_val == -33,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x21; immval:0xc
+TEST_IMM_OP( srliw, x11, x10, 0xfffff, -0x21, 0xc, x2, 448, x3)
+
+inst_78:
+// rs1_val == -65,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x41; immval:0x11
+TEST_IMM_OP( srliw, x11, x10, 0x7fff, -0x41, 0x11, x2, 456, x3)
+
+inst_79:
+// rs1_val == -129,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x81; immval:0x5
+TEST_IMM_OP( srliw, x11, x10, 0x7fffffb, -0x81, 0x5, x2, 464, x3)
+
+inst_80:
+// rs1_val == -257,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x101; immval:0x1b
+TEST_IMM_OP( srliw, x11, x10, 0x1f, -0x101, 0x1b, x2, 472, x3)
+
+inst_81:
+// rs1_val == -513, imm_val == 2
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x201; immval:0x2
+TEST_IMM_OP( srliw, x11, x10, 0x3fffff7f, -0x201, 0x2, x2, 480, x3)
+
+inst_82:
+// rs1_val == -1025,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x401; immval:0xd
+TEST_IMM_OP( srliw, x11, x10, 0x7ffff, -0x401, 0xd, x2, 488, x3)
+
+inst_83:
+// rs1_val == -2049,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x801; immval:0x1d
+TEST_IMM_OP( srliw, x11, x10, 0x7, -0x801, 0x1d, x2, 496, x3)
+
+inst_84:
+// rs1_val == -4097,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x1001; immval:0x1b
+TEST_IMM_OP( srliw, x11, x10, 0x1f, -0x1001, 0x1b, x2, 504, x3)
+
+inst_85:
+// rs1_val == -8193,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x2001; immval:0x12
+TEST_IMM_OP( srliw, x11, x10, 0x3fff, -0x2001, 0x12, x2, 512, x3)
+
+inst_86:
+// rs1_val == -16385,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x4001; immval:0x7
+TEST_IMM_OP( srliw, x11, x10, 0x1ffff7f, -0x4001, 0x7, x2, 520, x3)
+
+inst_87:
+// rs1_val == -32769,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x8001; immval:0x12
+TEST_IMM_OP( srliw, x11, x10, 0x3fff, -0x8001, 0x12, x2, 528, x3)
+
+inst_88:
+// rs1_val == -65537,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x10001; immval:0xe
+TEST_IMM_OP( srliw, x11, x10, 0x3fffb, -0x10001, 0xe, x2, 536, x3)
+
+inst_89:
+// rs1_val == -131073, imm_val == 30
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x20001; immval:0x1e
+TEST_IMM_OP( srliw, x11, x10, 0x3, -0x20001, 0x1e, x2, 544, x3)
+
+inst_90:
+// rs1_val == -262145,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x40001; immval:0x5
+TEST_IMM_OP( srliw, x11, x10, 0x7ffdfff, -0x40001, 0x5, x2, 552, x3)
+
+inst_91:
+// rs1_val == -9007199254740993,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x20000000000001; immval:0x1f
+TEST_IMM_OP( srliw, x11, x10, 0x1, -0x20000000000001, 0x1f, x2, 560, x3)
+
+inst_92:
+// rs1_val == -18014398509481985,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x40000000000001; immval:0x3
+TEST_IMM_OP( srliw, x11, x10, 0x1fffffff, -0x40000000000001, 0x3, x2, 568, x3)
+
+inst_93:
+// rs1_val == -72057594037927937,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x100000000000001; immval:0x6
+TEST_IMM_OP( srliw, x11, x10, 0x3ffffff, -0x100000000000001, 0x6, x2, 576, x3)
+
+inst_94:
+// rs1_val == -144115188075855873,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x200000000000001; immval:0x1
+TEST_IMM_OP( srliw, x11, x10, 0x7fffffff, -0x200000000000001, 0x1, x2, 584, x3)
+
+inst_95:
+// rs1_val == -288230376151711745,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x400000000000001; immval:0x12
+TEST_IMM_OP( srliw, x11, x10, 0x3fff, -0x400000000000001, 0x12, x2, 592, x3)
+
+inst_96:
+// rs1_val == -576460752303423489,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x800000000000001; immval:0x9
+TEST_IMM_OP( srliw, x11, x10, 0x7fffff, -0x800000000000001, 0x9, x2, 600, x3)
+
+inst_97:
+// rs1_val == -1152921504606846977,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x1000000000000001; immval:0x1b
+TEST_IMM_OP( srliw, x11, x10, 0x1f, -0x1000000000000001, 0x1b, x2, 608, x3)
+
+inst_98:
+// rs1_val == -2305843009213693953,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x2000000000000001; immval:0x5
+TEST_IMM_OP( srliw, x11, x10, 0x7ffffff, -0x2000000000000001, 0x5, x2, 616, x3)
+
+inst_99:
+// rs1_val == -4611686018427387905,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x4000000000000001; immval:0x1f
+TEST_IMM_OP( srliw, x11, x10, 0x1, -0x4000000000000001, 0x1f, x2, 624, x3)
+
+inst_100:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0xf
+TEST_IMM_OP( srliw, x11, x10, 0xaaaa, 0x5555555555555555, 0xf, x2, 632, x3)
+
+inst_101:
+// rs1_val == -6148914691236517206, imm_val == 4, rs1_val==-6148914691236517206
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x4
+TEST_IMM_OP( srliw, x11, x10, 0xaaaaaaa, -0x5555555555555556, 0x4, x2, 640, x3)
+
+inst_102:
+// rs1_val==3,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x3; immval:0x1
+TEST_IMM_OP( srliw, x11, x10, 0x1, 0x3, 0x1, x2, 648, x3)
+
+inst_103:
+// rs1_val==5,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x5; immval:0x12
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x5, 0x12, x2, 656, x3)
+
+inst_104:
+// rs1_val==3689348814741910323,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x1f
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x3333333333333333, 0x1f, x2, 664, x3)
+
+inst_105:
+// rs1_val==-3037000499,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x6
+TEST_IMM_OP( srliw, x11, x10, 0x12bec33, -0xb504f333, 0x6, x2, 672, x3)
+
+inst_106:
+// rs1_val==3037000499,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x1
+TEST_IMM_OP( srliw, x11, x10, 0x5a827999, 0xb504f333, 0x1, x2, 680, x3)
+
+inst_107:
+// rs1_val==6148914691236517204,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x1d
+TEST_IMM_OP( srliw, x11, x10, 0x2, 0x5555555555555554, 0x1d, x2, 688, x3)
+
+inst_108:
+// rs1_val==3689348814741910322,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0xd
+TEST_IMM_OP( srliw, x11, x10, 0x19999, 0x3333333333333332, 0xd, x2, 696, x3)
+
+inst_109:
+// rs1_val==7378697629483820645,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x1
+TEST_IMM_OP( srliw, x11, x10, 0x33333332, 0x6666666666666665, 0x1, x2, 704, x3)
+
+inst_110:
+// rs1_val==3037000498,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2
+TEST_IMM_OP( srliw, x11, x10, 0x2d413ccc, 0xb504f332, 0x2, x2, 712, x3)
+
+inst_111:
+// rs1_val==6148914691236517206,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x7
+TEST_IMM_OP( srliw, x11, x10, 0xaaaaaa, 0x5555555555555556, 0x7, x2, 720, x3)
+
+inst_112:
+// rs1_val==-6148914691236517205,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x9
+TEST_IMM_OP( srliw, x11, x10, 0x555555, -0x5555555555555555, 0x9, x2, 728, x3)
+
+inst_113:
+// rs1_val==6,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x6; immval:0xd
+TEST_IMM_OP( srliw, x11, x10, 0x0, 0x6, 0xd, x2, 736, x3)
+
+inst_114:
+// rs1_val==3689348814741910324,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0xf
+TEST_IMM_OP( srliw, x11, x10, 0x6666, 0x3333333333333334, 0xf, x2, 744, x3)
+
+inst_115:
+// rs1_val==7378697629483820647,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0xb
+TEST_IMM_OP( srliw, x11, x10, 0xccccc, 0x6666666666666667, 0xb, x2, 752, x3)
+
+inst_116:
+// rs1_val==-3037000498,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x4
+TEST_IMM_OP( srliw, x11, x10, 0x4afb0cc, -0xb504f332, 0x4, x2, 760, x3)
+
+inst_117:
+// rs1_val==3037000500,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x1d
+TEST_IMM_OP( srliw, x11, x10, 0x5, 0xb504f334, 0x1d, x2, 768, x3)
+
+inst_118:
+// rs1_val == -524289,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x80001; immval:0xe
+TEST_IMM_OP( srliw, x11, x10, 0x3ffdf, -0x80001, 0xe, x2, 776, x3)
+
+inst_119:
+// rs1_val == -1048577,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x100001; immval:0x12
+TEST_IMM_OP( srliw, x11, x10, 0x3ffb, -0x100001, 0x12, x2, 784, x3)
+
+inst_120:
+// rs1_val == -2097153,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x200001; immval:0xb
+TEST_IMM_OP( srliw, x11, x10, 0x1ffbff, -0x200001, 0xb, x2, 792, x3)
+
+inst_121:
+// rs1_val == -4194305,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x400001; immval:0x1d
+TEST_IMM_OP( srliw, x11, x10, 0x7, -0x400001, 0x1d, x2, 800, x3)
+
+inst_122:
+// rs1_val == -8388609,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x800001; immval:0x2
+TEST_IMM_OP( srliw, x11, x10, 0x3fdfffff, -0x800001, 0x2, x2, 808, x3)
+
+inst_123:
+// rs1_val == -33554433,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x2000001; immval:0x8
+TEST_IMM_OP( srliw, x11, x10, 0xfdffff, -0x2000001, 0x8, x2, 816, x3)
+
+inst_124:
+// rs1_val == -67108865,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x4000001; immval:0x13
+TEST_IMM_OP( srliw, x11, x10, 0x1f7f, -0x4000001, 0x13, x2, 824, x3)
+
+inst_125:
+// rs1_val == -134217729,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x8000001; immval:0xa
+TEST_IMM_OP( srliw, x11, x10, 0x3dffff, -0x8000001, 0xa, x2, 832, x3)
+
+inst_126:
+// rs1_val == -268435457,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x10000001; immval:0xf
+TEST_IMM_OP( srliw, x11, x10, 0x1dfff, -0x10000001, 0xf, x2, 840, x3)
+
+inst_127:
+// rs1_val == -536870913,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x20000001; immval:0x13
+TEST_IMM_OP( srliw, x11, x10, 0x1bff, -0x20000001, 0x13, x2, 848, x3)
+
+inst_128:
+// rs1_val == -1073741825,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x40000001; immval:0xb
+TEST_IMM_OP( srliw, x11, x10, 0x17ffff, -0x40000001, 0xb, x2, 856, x3)
+
+inst_129:
+// rs1_val == -2147483649,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x80000001; immval:0x17
+TEST_IMM_OP( srliw, x11, x10, 0xff, -0x80000001, 0x17, x2, 864, x3)
+
+inst_130:
+// rs1_val == -4294967297,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x100000001; immval:0x9
+TEST_IMM_OP( srliw, x11, x10, 0x7fffff, -0x100000001, 0x9, x2, 872, x3)
+
+inst_131:
+// rs1_val == -8589934593,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x200000001; immval:0x2
+TEST_IMM_OP( srliw, x11, x10, 0x3fffffff, -0x200000001, 0x2, x2, 880, x3)
+
+inst_132:
+// rs1_val == -17179869185,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x400000001; immval:0x4
+TEST_IMM_OP( srliw, x11, x10, 0xfffffff, -0x400000001, 0x4, x2, 888, x3)
+
+inst_133:
+// rs1_val == -34359738369,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x800000001; immval:0x11
+TEST_IMM_OP( srliw, x11, x10, 0x7fff, -0x800000001, 0x11, x2, 896, x3)
+
+inst_134:
+// rs1_val == -137438953473,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x2000000001; immval:0x1b
+TEST_IMM_OP( srliw, x11, x10, 0x1f, -0x2000000001, 0x1b, x2, 904, x3)
+
+inst_135:
+// rs1_val == -274877906945,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x4000000001; immval:0x13
+TEST_IMM_OP( srliw, x11, x10, 0x1fff, -0x4000000001, 0x13, x2, 912, x3)
+
+inst_136:
+// rs1_val == -549755813889,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x8000000001; immval:0x0
+TEST_IMM_OP( srliw, x11, x10, -0x1, -0x8000000001, 0x0, x2, 920, x3)
+
+inst_137:
+// rs1_val == -1099511627777,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x10000000001; immval:0x6
+TEST_IMM_OP( srliw, x11, x10, 0x3ffffff, -0x10000000001, 0x6, x2, 928, x3)
+
+inst_138:
+// rs1_val == -2199023255553,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x20000000001; immval:0x8
+TEST_IMM_OP( srliw, x11, x10, 0xffffff, -0x20000000001, 0x8, x2, 936, x3)
+
+inst_139:
+// rs1_val == -4398046511105,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x40000000001; immval:0x1f
+TEST_IMM_OP( srliw, x11, x10, 0x1, -0x40000000001, 0x1f, x2, 944, x3)
+
+inst_140:
+// rs1_val == -8796093022209,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x80000000001; immval:0x12
+TEST_IMM_OP( srliw, x11, x10, 0x3fff, -0x80000000001, 0x12, x2, 952, x3)
+
+inst_141:
+// rs1_val == -17592186044417,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x100000000001; immval:0x1d
+TEST_IMM_OP( srliw, x11, x10, 0x7, -0x100000000001, 0x1d, x2, 960, x3)
+
+inst_142:
+// rs1_val == -35184372088833,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x200000000001; immval:0x12
+TEST_IMM_OP( srliw, x11, x10, 0x3fff, -0x200000000001, 0x12, x2, 968, x3)
+
+inst_143:
+// rs1_val == -70368744177665,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x400000000001; immval:0x0
+TEST_IMM_OP( srliw, x11, x10, -0x1, -0x400000000001, 0x0, x2, 976, x3)
+
+inst_144:
+// rs1_val == -140737488355329,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x800000000001; immval:0xf
+TEST_IMM_OP( srliw, x11, x10, 0x1ffff, -0x800000000001, 0xf, x2, 984, x3)
+
+inst_145:
+// rs1_val == -281474976710657,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x1000000000001; immval:0x3
+TEST_IMM_OP( srliw, x11, x10, 0x1fffffff, -0x1000000000001, 0x3, x2, 992, x3)
+
+inst_146:
+// rs1_val == -562949953421313,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x2000000000001; immval:0x2
+TEST_IMM_OP( srliw, x11, x10, 0x3fffffff, -0x2000000000001, 0x2, x2, 1000, x3)
+
+inst_147:
+// rs1_val == -1125899906842625,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x4000000000001; immval:0xb
+TEST_IMM_OP( srliw, x11, x10, 0x1fffff, -0x4000000000001, 0xb, x2, 1008, x3)
+
+inst_148:
+// rs1_val == -2251799813685249,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x8000000000001; immval:0xb
+TEST_IMM_OP( srliw, x11, x10, 0x1fffff, -0x8000000000001, 0xb, x2, 1016, x3)
+
+inst_149:
+// rs1_val == -4503599627370497,
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x10000000000001; immval:0x13
+TEST_IMM_OP( srliw, x11, x10, 0x1fff, -0x10000000000001, 0x13, x2, 1024, x3)
+
+inst_150:
+// rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < 32, imm_val == 27, rs1_val == -9223372036854775808
+// opcode: srliw ; op1:x10; dest:x11; op1val:-0x8000000000000000; immval:0x1b
+TEST_IMM_OP( srliw, x11, x10, 0x0, -0x8000000000000000, 0x1b, x2, 1032, x3)
+
+inst_151:
+// rs1_val == 524288,
+// opcode: srliw ; op1:x10; dest:x11; op1val:0x80000; immval:0x1
+TEST_IMM_OP( srliw, x11, x10, 0x40000, 0x80000, 0x1, x2, 1040, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x12_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x12_1:
+ .fill 21*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 131*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/srlw-01.S b/riscof/suite/rv64i_m/I/srlw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..5fe37a83159ad0d803396e61f0cec5e8defbda22
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/srlw-01.S
@@ -0,0 +1,844 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the srlw instruction of the RISC-V i extension for the srlw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64i")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*);def TEST_CASE_1=True;",srlw)
+
+RVTEST_SIGBASE( x8,signature_x8_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x17, rs2==x17, rd==x24, rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val==-3037000499
+// opcode: srlw ; op1:x17; op2:x17; dest:x24; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(srlw, x24, x17, x17, 0x257d8, -0xb504f333, -0xb504f333, x8, 0, x10)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x3, rs2==x12, rd==x12, rs1_val > 0 and rs2_val > 0 and rs2_val < xlen, rs2_val == 2, rs1_val == 288230376151711744
+// opcode: srlw ; op1:x3; op2:x12; dest:x12; op1val:0x400000000000000; op2val:0x2
+TEST_RR_OP(srlw, x12, x3, x12, 0x0, 0x400000000000000, 0x2, x8, 8, x10)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x7, rs2==x7, rd==x7, rs1_val < 0 and rs2_val == 0, rs1_val == -4503599627370497
+// opcode: srlw ; op1:x7; op2:x7; dest:x7; op1val:-0x10000000000001; op2val:-0x10000000000001
+TEST_RR_OP(srlw, x7, x7, x7, 0x1, -0x10000000000001, -0x10000000000001, x8, 16, x10)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x9, rs2==x15, rd==x22, rs1_val > 0 and rs2_val == 0, rs1_val == 140737488355328
+// opcode: srlw ; op1:x9; op2:x15; dest:x22; op1val:0x800000000000; op2val:0x0
+TEST_RR_OP(srlw, x22, x9, x15, 0x0, 0x800000000000, 0x0, x8, 24, x10)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x11, rs2==x4, rd==x11, rs1_val == rs2_val and rs2_val > 0 and rs2_val < xlen,
+// opcode: srlw ; op1:x11; op2:x4; dest:x11; op1val:0x7; op2val:0x7
+TEST_RR_OP(srlw, x11, x11, x4, 0x0, 0x7, 0x7, x8, 32, x10)
+
+inst_5:
+// rs1==x4, rs2==x24, rd==x1, rs1_val == (-2**(xlen-1)) and rs2_val >= 0 and rs2_val < xlen, rs1_val == -9223372036854775808, rs2_val == 15
+// opcode: srlw ; op1:x4; op2:x24; dest:x1; op1val:-0x8000000000000000; op2val:0xf
+TEST_RR_OP(srlw, x1, x4, x24, 0x0, -0x8000000000000000, 0xf, x8, 40, x10)
+
+inst_6:
+// rs1==x2, rs2==x18, rd==x0, rs1_val == 0 and rs2_val >= 0 and rs2_val < xlen, rs1_val==0
+// opcode: srlw ; op1:x2; op2:x18; dest:x0; op1val:0x0; op2val:0x12
+TEST_RR_OP(srlw, x0, x2, x18, 0, 0x0, 0x12, x8, 48, x10)
+
+inst_7:
+// rs1==x21, rs2==x0, rd==x5, rs1_val == (2**(xlen-1)-1) and rs2_val >= 0 and rs2_val < xlen, rs1_val == 9223372036854775807, rs2_val == 27
+// opcode: srlw ; op1:x21; op2:x0; dest:x5; op1val:0x7fffffffffffffff; op2val:0x0
+TEST_RR_OP(srlw, x5, x21, x0, -0x1, 0x7fffffffffffffff, 0x0, x8, 56, x10)
+
+inst_8:
+// rs1==x15, rs2==x9, rd==x21, rs1_val == 1 and rs2_val >= 0 and rs2_val < xlen, rs1_val == 1
+// opcode: srlw ; op1:x15; op2:x9; dest:x21; op1val:0x1; op2val:0x2
+TEST_RR_OP(srlw, x21, x15, x9, 0x0, 0x1, 0x2, x8, 64, x10)
+
+inst_9:
+// rs1==x13, rs2==x30, rd==x6, rs1_val == 2, rs1_val==2
+// opcode: srlw ; op1:x13; op2:x30; dest:x6; op1val:0x2; op2val:0x13
+TEST_RR_OP(srlw, x6, x13, x30, 0x0, 0x2, 0x13, x8, 72, x10)
+
+inst_10:
+// rs1==x22, rs2==x20, rd==x23, rs1_val == 4, rs1_val==4
+// opcode: srlw ; op1:x22; op2:x20; dest:x23; op1val:0x4; op2val:0xe
+TEST_RR_OP(srlw, x23, x22, x20, 0x0, 0x4, 0xe, x8, 80, x10)
+
+inst_11:
+// rs1==x12, rs2==x26, rd==x28, rs1_val == 8,
+// opcode: srlw ; op1:x12; op2:x26; dest:x28; op1val:0x8; op2val:0x12
+TEST_RR_OP(srlw, x28, x12, x26, 0x0, 0x8, 0x12, x8, 88, x10)
+
+inst_12:
+// rs1==x24, rs2==x31, rd==x2, rs1_val == 16,
+// opcode: srlw ; op1:x24; op2:x31; dest:x2; op1val:0x10; op2val:0x12
+TEST_RR_OP(srlw, x2, x24, x31, 0x0, 0x10, 0x12, x8, 96, x10)
+
+inst_13:
+// rs1==x16, rs2==x25, rd==x27, rs1_val == 32, rs2_val == 30
+// opcode: srlw ; op1:x16; op2:x25; dest:x27; op1val:0x20; op2val:0x1e
+TEST_RR_OP(srlw, x27, x16, x25, 0x0, 0x20, 0x1e, x8, 104, x10)
+
+inst_14:
+// rs1==x31, rs2==x1, rd==x15, rs1_val == 64, rs2_val == 8
+// opcode: srlw ; op1:x31; op2:x1; dest:x15; op1val:0x40; op2val:0x8
+TEST_RR_OP(srlw, x15, x31, x1, 0x0, 0x40, 0x8, x8, 112, x10)
+
+inst_15:
+// rs1==x0, rs2==x5, rd==x25, rs1_val == 128,
+// opcode: srlw ; op1:x0; op2:x5; dest:x25; op1val:0x0; op2val:0xd
+TEST_RR_OP(srlw, x25, x0, x5, 0x0, 0x0, 0xd, x8, 120, x10)
+
+inst_16:
+// rs1==x27, rs2==x14, rd==x30, rs1_val == 256,
+// opcode: srlw ; op1:x27; op2:x14; dest:x30; op1val:0x100; op2val:0x1e
+TEST_RR_OP(srlw, x30, x27, x14, 0x0, 0x100, 0x1e, x8, 128, x10)
+
+inst_17:
+// rs1==x6, rs2==x19, rd==x4, rs1_val == 512,
+// opcode: srlw ; op1:x6; op2:x19; dest:x4; op1val:0x200; op2val:0x1b
+TEST_RR_OP(srlw, x4, x6, x19, 0x0, 0x200, 0x1b, x8, 136, x7)
+RVTEST_SIGBASE( x4,signature_x4_0)
+
+inst_18:
+// rs1==x20, rs2==x28, rd==x3, rs1_val == 1024,
+// opcode: srlw ; op1:x20; op2:x28; dest:x3; op1val:0x400; op2val:0x5
+TEST_RR_OP(srlw, x3, x20, x28, 0x20, 0x400, 0x5, x4, 0, x7)
+
+inst_19:
+// rs1==x18, rs2==x11, rd==x31, rs1_val == 2048,
+// opcode: srlw ; op1:x18; op2:x11; dest:x31; op1val:0x800; op2val:0x3
+TEST_RR_OP(srlw, x31, x18, x11, 0x100, 0x800, 0x3, x4, 8, x7)
+
+inst_20:
+// rs1==x30, rs2==x2, rd==x18, rs1_val == 4096,
+// opcode: srlw ; op1:x30; op2:x2; dest:x18; op1val:0x1000; op2val:0xe
+TEST_RR_OP(srlw, x18, x30, x2, 0x0, 0x1000, 0xe, x4, 16, x7)
+
+inst_21:
+// rs1==x19, rs2==x21, rd==x26, rs1_val == 8192,
+// opcode: srlw ; op1:x19; op2:x21; dest:x26; op1val:0x2000; op2val:0x9
+TEST_RR_OP(srlw, x26, x19, x21, 0x10, 0x2000, 0x9, x4, 24, x7)
+
+inst_22:
+// rs1==x1, rs2==x29, rd==x20, rs1_val == 16384,
+// opcode: srlw ; op1:x1; op2:x29; dest:x20; op1val:0x4000; op2val:0x5
+TEST_RR_OP(srlw, x20, x1, x29, 0x200, 0x4000, 0x5, x4, 32, x7)
+
+inst_23:
+// rs1==x25, rs2==x22, rd==x9, rs1_val == 32768,
+// opcode: srlw ; op1:x25; op2:x22; dest:x9; op1val:0x8000; op2val:0x13
+TEST_RR_OP(srlw, x9, x25, x22, 0x0, 0x8000, 0x13, x4, 40, x7)
+
+inst_24:
+// rs1==x5, rs2==x6, rd==x13, rs1_val == 65536,
+// opcode: srlw ; op1:x5; op2:x6; dest:x13; op1val:0x10000; op2val:0xe
+TEST_RR_OP(srlw, x13, x5, x6, 0x4, 0x10000, 0xe, x4, 48, x7)
+
+inst_25:
+// rs1==x26, rs2==x3, rd==x17, rs1_val == 131072,
+// opcode: srlw ; op1:x26; op2:x3; dest:x17; op1val:0x20000; op2val:0x2
+TEST_RR_OP(srlw, x17, x26, x3, 0x8000, 0x20000, 0x2, x4, 56, x7)
+
+inst_26:
+// rs1==x10, rs2==x13, rd==x8, rs1_val == 262144,
+// opcode: srlw ; op1:x10; op2:x13; dest:x8; op1val:0x40000; op2val:0x3
+TEST_RR_OP(srlw, x8, x10, x13, 0x8000, 0x40000, 0x3, x4, 64, x7)
+
+inst_27:
+// rs1==x23, rs2==x10, rd==x16, rs1_val == 524288,
+// opcode: srlw ; op1:x23; op2:x10; dest:x16; op1val:0x80000; op2val:0x1f
+TEST_RR_OP(srlw, x16, x23, x10, 0x0, 0x80000, 0x1f, x4, 72, x7)
+
+inst_28:
+// rs1==x28, rs2==x8, rd==x10, rs1_val == 1048576,
+// opcode: srlw ; op1:x28; op2:x8; dest:x10; op1val:0x100000; op2val:0x5
+TEST_RR_OP(srlw, x10, x28, x8, 0x8000, 0x100000, 0x5, x4, 80, x7)
+
+inst_29:
+// rs1==x8, rs2==x23, rd==x14, rs1_val == 2097152,
+// opcode: srlw ; op1:x8; op2:x23; dest:x14; op1val:0x200000; op2val:0x12
+TEST_RR_OP(srlw, x14, x8, x23, 0x8, 0x200000, 0x12, x4, 88, x7)
+
+inst_30:
+// rs1==x29, rs2==x16, rd==x19, rs1_val == 4194304,
+// opcode: srlw ; op1:x29; op2:x16; dest:x19; op1val:0x400000; op2val:0x3
+TEST_RR_OP(srlw, x19, x29, x16, 0x80000, 0x400000, 0x3, x4, 96, x7)
+
+inst_31:
+// rs1==x14, rs2==x27, rd==x29, rs1_val == 8388608,
+// opcode: srlw ; op1:x14; op2:x27; dest:x29; op1val:0x800000; op2val:0xd
+TEST_RR_OP(srlw, x29, x14, x27, 0x400, 0x800000, 0xd, x4, 104, x7)
+
+inst_32:
+// rs1_val == 16777216,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0x1e
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x1000000, 0x1e, x4, 112, x7)
+
+inst_33:
+// rs1_val == 33554432,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0xc
+TEST_RR_OP(srlw, x12, x10, x11, 0x2000, 0x2000000, 0xc, x4, 120, x1)
+
+inst_34:
+// rs1_val == 67108864,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0xb
+TEST_RR_OP(srlw, x12, x10, x11, 0x8000, 0x4000000, 0xb, x4, 128, x1)
+
+inst_35:
+// rs1_val == 134217728,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x6
+TEST_RR_OP(srlw, x12, x10, x11, 0x200000, 0x8000000, 0x6, x4, 136, x1)
+
+inst_36:
+// rs1_val == 268435456, rs2_val == 4
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x4
+TEST_RR_OP(srlw, x12, x10, x11, 0x1000000, 0x10000000, 0x4, x4, 144, x1)
+
+inst_37:
+// rs1_val == 536870912,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x3
+TEST_RR_OP(srlw, x12, x10, x11, 0x4000000, 0x20000000, 0x3, x4, 152, x1)
+
+inst_38:
+// rs1_val == 1073741824,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x2
+TEST_RR_OP(srlw, x12, x10, x11, 0x10000000, 0x40000000, 0x2, x4, 160, x1)
+
+inst_39:
+// rs1_val == 2147483648,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0xf
+TEST_RR_OP(srlw, x12, x10, x11, 0x10000, 0x80000000, 0xf, x4, 168, x1)
+
+inst_40:
+// rs1_val == 4294967296, rs2_val == 1
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x1
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x100000000, 0x1, x4, 176, x1)
+
+inst_41:
+// rs1_val == 8589934592,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:0x12
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x200000000, 0x12, x4, 184, x1)
+
+inst_42:
+// rs1_val == 17179869184,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:0xb
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x400000000, 0xb, x4, 192, x1)
+
+inst_43:
+// rs1_val == 34359738368,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:0xc
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x800000000, 0xc, x4, 200, x1)
+
+inst_44:
+// rs1_val == 68719476736,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:0x5
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x1000000000, 0x5, x4, 208, x1)
+
+inst_45:
+// rs1_val == 137438953472,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:0x1e
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x2000000000, 0x1e, x4, 216, x1)
+
+inst_46:
+// rs1_val == 274877906944,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:0x1e
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x4000000000, 0x1e, x4, 224, x1)
+
+inst_47:
+// rs1_val == 549755813888,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0x13
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x8000000000, 0x13, x4, 232, x1)
+
+inst_48:
+// rs1_val == 1099511627776,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x12
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x10000000000, 0x12, x4, 240, x1)
+
+inst_49:
+// rs1_val == 2199023255552,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:0x13
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x20000000000, 0x13, x4, 248, x1)
+
+inst_50:
+// rs1_val == 4398046511104,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:0x4
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x40000000000, 0x4, x4, 256, x1)
+
+inst_51:
+// rs1_val == 8796093022208,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:0x0
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x80000000000, 0x0, x4, 264, x1)
+
+inst_52:
+// rs1_val == 17592186044416,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:0xf
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x100000000000, 0xf, x4, 272, x1)
+
+inst_53:
+// rs1_val == 35184372088832,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:0x6
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x200000000000, 0x6, x4, 280, x1)
+
+inst_54:
+// rs1_val == 70368744177664,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:0x5
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x400000000000, 0x5, x4, 288, x1)
+
+inst_55:
+// rs1_val == 281474976710656,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0xe
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x1000000000000, 0xe, x4, 296, x1)
+
+inst_56:
+// rs1_val == 562949953421312,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:0x7
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x2000000000000, 0x7, x4, 304, x1)
+
+inst_57:
+// rs1_val == 1125899906842624, rs2_val == 23
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:0x17
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x4000000000000, 0x17, x4, 312, x1)
+
+inst_58:
+// rs1_val == 2251799813685248, rs2_val == 10
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:0xa
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x8000000000000, 0xa, x4, 320, x1)
+
+inst_59:
+// rs1_val == 4503599627370496,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:0x12
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x10000000000000, 0x12, x4, 328, x1)
+
+inst_60:
+// rs1_val == 9007199254740992,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:0x1
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x20000000000000, 0x1, x4, 336, x1)
+
+inst_61:
+// rs1_val == 18014398509481984,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:0x0
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x40000000000000, 0x0, x4, 344, x1)
+
+inst_62:
+// rs1_val == 36028797018963968,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:0x5
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x80000000000000, 0x5, x4, 352, x1)
+
+inst_63:
+// rs1_val == 72057594037927936,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:0x12
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x100000000000000, 0x12, x4, 360, x1)
+
+inst_64:
+// rs1_val == 144115188075855872,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:0xb
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x200000000000000, 0xb, x4, 368, x1)
+
+inst_65:
+// rs1_val == 576460752303423488,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:0x1f
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x800000000000000, 0x1f, x4, 376, x1)
+
+inst_66:
+// rs1_val == 1152921504606846976,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:0x7
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x1000000000000000, 0x7, x4, 384, x1)
+
+inst_67:
+// rs1_val == 2305843009213693952,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:0x1
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x2000000000000000, 0x1, x4, 392, x1)
+
+inst_68:
+// rs1_val == 4611686018427387904, rs2_val == 16
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:0x10
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x4000000000000000, 0x10, x4, 400, x1)
+
+inst_69:
+// rs1_val == -2,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x6
+TEST_RR_OP(srlw, x12, x10, x11, 0x3ffffff, -0x2, 0x6, x4, 408, x1)
+
+inst_70:
+// rs1_val == -3,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0x1b
+TEST_RR_OP(srlw, x12, x10, x11, 0x1f, -0x3, 0x1b, x4, 416, x1)
+
+inst_71:
+// rs1_val == -5,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:0x13
+TEST_RR_OP(srlw, x12, x10, x11, 0x1fff, -0x5, 0x13, x4, 424, x1)
+
+inst_72:
+// rs1_val == -9,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0xc
+TEST_RR_OP(srlw, x12, x10, x11, 0xfffff, -0x9, 0xc, x4, 432, x1)
+
+inst_73:
+// rs1_val == -17,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:0x4
+TEST_RR_OP(srlw, x12, x10, x11, 0xffffffe, -0x11, 0x4, x4, 440, x1)
+
+inst_74:
+// rs1_val == -33,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x9
+TEST_RR_OP(srlw, x12, x10, x11, 0x7fffff, -0x21, 0x9, x4, 448, x1)
+
+inst_75:
+// rs1_val == -65,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x0
+TEST_RR_OP(srlw, x12, x10, x11, -0x41, -0x41, 0x0, x4, 456, x1)
+
+inst_76:
+// rs1_val == -129, rs2_val == 21
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x15
+TEST_RR_OP(srlw, x12, x10, x11, 0x7ff, -0x81, 0x15, x4, 464, x1)
+
+inst_77:
+// rs1_val == -257,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x1
+TEST_RR_OP(srlw, x12, x10, x11, 0x7fffff7f, -0x101, 0x1, x4, 472, x1)
+
+inst_78:
+// rs1_val == -513,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x9
+TEST_RR_OP(srlw, x12, x10, x11, 0x7ffffe, -0x201, 0x9, x4, 480, x1)
+
+inst_79:
+// rs1_val == -1025,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x2
+TEST_RR_OP(srlw, x12, x10, x11, 0x3ffffeff, -0x401, 0x2, x4, 488, x1)
+
+inst_80:
+// rs1_val == -2049,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x8
+TEST_RR_OP(srlw, x12, x10, x11, 0xfffff7, -0x801, 0x8, x4, 496, x1)
+
+inst_81:
+// rs1_val == -4097,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x13
+TEST_RR_OP(srlw, x12, x10, x11, 0x1fff, -0x1001, 0x13, x4, 504, x1)
+
+inst_82:
+// rs1_val == -8193,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0xc
+TEST_RR_OP(srlw, x12, x10, x11, 0xffffd, -0x2001, 0xc, x4, 512, x1)
+
+inst_83:
+// rs1_val == -16385,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0xe
+TEST_RR_OP(srlw, x12, x10, x11, 0x3fffe, -0x4001, 0xe, x4, 520, x1)
+
+inst_84:
+// rs1_val == -32769,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x1
+TEST_RR_OP(srlw, x12, x10, x11, 0x7fffbfff, -0x8001, 0x1, x4, 528, x1)
+
+inst_85:
+// rs1_val == -65537,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0xf
+TEST_RR_OP(srlw, x12, x10, x11, 0x1fffd, -0x10001, 0xf, x4, 536, x1)
+
+inst_86:
+// rs1_val == -131073,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x12
+TEST_RR_OP(srlw, x12, x10, x11, 0x3fff, -0x20001, 0x12, x4, 544, x1)
+
+inst_87:
+// rs1_val == -262145,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0x1
+TEST_RR_OP(srlw, x12, x10, x11, 0x7ffdffff, -0x40001, 0x1, x4, 552, x1)
+
+inst_88:
+// rs1_val == -524289,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x4
+TEST_RR_OP(srlw, x12, x10, x11, 0xfff7fff, -0x80001, 0x4, x4, 560, x1)
+
+inst_89:
+// rs1_val == -36028797018963969,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:0x1e
+TEST_RR_OP(srlw, x12, x10, x11, 0x3, -0x80000000000001, 0x1e, x4, 568, x1)
+
+inst_90:
+// rs1_val == -72057594037927937, rs2_val == 29
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:0x1d
+TEST_RR_OP(srlw, x12, x10, x11, 0x7, -0x100000000000001, 0x1d, x4, 576, x1)
+
+inst_91:
+// rs1_val == -144115188075855873,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:0x8
+TEST_RR_OP(srlw, x12, x10, x11, 0xffffff, -0x200000000000001, 0x8, x4, 584, x1)
+
+inst_92:
+// rs1_val == -288230376151711745,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000000001; op2val:0x2
+TEST_RR_OP(srlw, x12, x10, x11, 0x3fffffff, -0x400000000000001, 0x2, x4, 592, x1)
+
+inst_93:
+// rs1_val == -576460752303423489,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:0x0
+TEST_RR_OP(srlw, x12, x10, x11, -0x1, -0x800000000000001, 0x0, x4, 600, x1)
+
+inst_94:
+// rs1_val == -1152921504606846977,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:0x9
+TEST_RR_OP(srlw, x12, x10, x11, 0x7fffff, -0x1000000000000001, 0x9, x4, 608, x1)
+
+inst_95:
+// rs1_val == -2305843009213693953,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:0xf
+TEST_RR_OP(srlw, x12, x10, x11, 0x1ffff, -0x2000000000000001, 0xf, x4, 616, x1)
+
+inst_96:
+// rs1_val == -4611686018427387905,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:0x1e
+TEST_RR_OP(srlw, x12, x10, x11, 0x3, -0x4000000000000001, 0x1e, x4, 624, x1)
+
+inst_97:
+// rs1_val == 6148914691236517205, rs1_val==6148914691236517205
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xa
+TEST_RR_OP(srlw, x12, x10, x11, 0x155555, 0x5555555555555555, 0xa, x4, 632, x1)
+
+inst_98:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x13
+TEST_RR_OP(srlw, x12, x10, x11, 0x1555, -0x5555555555555556, 0x13, x4, 640, x1)
+
+inst_99:
+// rs1_val==3,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x17
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x3, 0x17, x4, 648, x1)
+
+inst_100:
+// rs1_val==5,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x1e
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x5, 0x1e, x4, 656, x1)
+
+inst_101:
+// rs1_val==3689348814741910323,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x11
+TEST_RR_OP(srlw, x12, x10, x11, 0x1999, 0x3333333333333333, 0x11, x4, 664, x1)
+
+inst_102:
+// rs1_val==7378697629483820646,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x1b
+TEST_RR_OP(srlw, x12, x10, x11, 0xc, 0x6666666666666666, 0x1b, x4, 672, x1)
+
+inst_103:
+// rs1_val==3037000499,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x8
+TEST_RR_OP(srlw, x12, x10, x11, 0xb504f3, 0xb504f333, 0x8, x4, 680, x1)
+
+inst_104:
+// rs1_val==6148914691236517204,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xc
+TEST_RR_OP(srlw, x12, x10, x11, 0x55555, 0x5555555555555554, 0xc, x4, 688, x1)
+
+inst_105:
+// rs1_val==3689348814741910322,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3
+TEST_RR_OP(srlw, x12, x10, x11, 0x6666666, 0x3333333333333332, 0x3, x4, 696, x1)
+
+inst_106:
+// rs1_val==7378697629483820645,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x2
+TEST_RR_OP(srlw, x12, x10, x11, 0x19999999, 0x6666666666666665, 0x2, x4, 704, x1)
+
+inst_107:
+// rs1_val==3037000498,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x1f
+TEST_RR_OP(srlw, x12, x10, x11, 0x1, 0xb504f332, 0x1f, x4, 712, x1)
+
+inst_108:
+// rs1_val==6148914691236517206,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x9
+TEST_RR_OP(srlw, x12, x10, x11, 0x2aaaaa, 0x5555555555555556, 0x9, x4, 720, x1)
+
+inst_109:
+// rs1_val==-6148914691236517205,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x15
+TEST_RR_OP(srlw, x12, x10, x11, 0x555, -0x5555555555555555, 0x15, x4, 728, x1)
+
+inst_110:
+// rs1_val==6,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xf
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x6, 0xf, x4, 736, x1)
+
+inst_111:
+// rs1_val==3689348814741910324,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x10
+TEST_RR_OP(srlw, x12, x10, x11, 0x3333, 0x3333333333333334, 0x10, x4, 744, x1)
+
+inst_112:
+// rs1_val==7378697629483820647,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x11
+TEST_RR_OP(srlw, x12, x10, x11, 0x3333, 0x6666666666666667, 0x11, x4, 752, x1)
+
+inst_113:
+// rs1_val==-3037000498,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x1f
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, -0xb504f332, 0x1f, x4, 760, x1)
+
+inst_114:
+// rs1_val==3037000500,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x15
+TEST_RR_OP(srlw, x12, x10, x11, 0x5a8, 0xb504f334, 0x15, x4, 768, x1)
+
+inst_115:
+// rs1_val == -1048577,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x6
+TEST_RR_OP(srlw, x12, x10, x11, 0x3ffbfff, -0x100001, 0x6, x4, 776, x1)
+
+inst_116:
+// rs1_val == -2097153,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:0x10
+TEST_RR_OP(srlw, x12, x10, x11, 0xffdf, -0x200001, 0x10, x4, 784, x1)
+
+inst_117:
+// rs1_val == -4194305,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0x15
+TEST_RR_OP(srlw, x12, x10, x11, 0x7fd, -0x400001, 0x15, x4, 792, x1)
+
+inst_118:
+// rs1_val == -8388609,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0xa
+TEST_RR_OP(srlw, x12, x10, x11, 0x3fdfff, -0x800001, 0xa, x4, 800, x1)
+
+inst_119:
+// rs1_val == -16777217,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:0x9
+TEST_RR_OP(srlw, x12, x10, x11, 0x7f7fff, -0x1000001, 0x9, x4, 808, x1)
+
+inst_120:
+// rs1_val == -33554433,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x6
+TEST_RR_OP(srlw, x12, x10, x11, 0x3f7ffff, -0x2000001, 0x6, x4, 816, x1)
+
+inst_121:
+// rs1_val == -67108865,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:0x17
+TEST_RR_OP(srlw, x12, x10, x11, 0x1f7, -0x4000001, 0x17, x4, 824, x1)
+
+inst_122:
+// rs1_val == -134217729,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x2
+TEST_RR_OP(srlw, x12, x10, x11, 0x3dffffff, -0x8000001, 0x2, x4, 832, x1)
+
+inst_123:
+// rs1_val == -268435457,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0xc
+TEST_RR_OP(srlw, x12, x10, x11, 0xeffff, -0x10000001, 0xc, x4, 840, x1)
+
+inst_124:
+// rs1_val == -536870913,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x9
+TEST_RR_OP(srlw, x12, x10, x11, 0x6fffff, -0x20000001, 0x9, x4, 848, x1)
+
+inst_125:
+// rs1_val == -1073741825,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x1f
+TEST_RR_OP(srlw, x12, x10, x11, 0x1, -0x40000001, 0x1f, x4, 856, x1)
+
+inst_126:
+// rs1_val == -2147483649,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:0x8
+TEST_RR_OP(srlw, x12, x10, x11, 0x7fffff, -0x80000001, 0x8, x4, 864, x1)
+
+inst_127:
+// rs1_val == -4294967297,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:0x4
+TEST_RR_OP(srlw, x12, x10, x11, 0xfffffff, -0x100000001, 0x4, x4, 872, x1)
+
+inst_128:
+// rs1_val == -8589934593,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:0x17
+TEST_RR_OP(srlw, x12, x10, x11, 0x1ff, -0x200000001, 0x17, x4, 880, x1)
+
+inst_129:
+// rs1_val == -17179869185,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:0xd
+TEST_RR_OP(srlw, x12, x10, x11, 0x7ffff, -0x400000001, 0xd, x4, 888, x1)
+
+inst_130:
+// rs1_val == -34359738369,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:0x1d
+TEST_RR_OP(srlw, x12, x10, x11, 0x7, -0x800000001, 0x1d, x4, 896, x1)
+
+inst_131:
+// rs1_val == -68719476737,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:0x15
+TEST_RR_OP(srlw, x12, x10, x11, 0x7ff, -0x1000000001, 0x15, x4, 904, x1)
+
+inst_132:
+// rs1_val == -137438953473,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:0x12
+TEST_RR_OP(srlw, x12, x10, x11, 0x3fff, -0x2000000001, 0x12, x4, 912, x1)
+
+inst_133:
+// rs1_val == -274877906945,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0xe
+TEST_RR_OP(srlw, x12, x10, x11, 0x3ffff, -0x4000000001, 0xe, x4, 920, x1)
+
+inst_134:
+// rs1_val == -549755813889,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:0x5
+TEST_RR_OP(srlw, x12, x10, x11, 0x7ffffff, -0x8000000001, 0x5, x4, 928, x1)
+
+inst_135:
+// rs1_val == -1099511627777,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:0x5
+TEST_RR_OP(srlw, x12, x10, x11, 0x7ffffff, -0x10000000001, 0x5, x4, 936, x1)
+
+inst_136:
+// rs1_val == -2199023255553,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:0x15
+TEST_RR_OP(srlw, x12, x10, x11, 0x7ff, -0x20000000001, 0x15, x4, 944, x1)
+
+inst_137:
+// rs1_val == -4398046511105,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:0x15
+TEST_RR_OP(srlw, x12, x10, x11, 0x7ff, -0x40000000001, 0x15, x4, 952, x1)
+
+inst_138:
+// rs1_val == -8796093022209,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:0x10
+TEST_RR_OP(srlw, x12, x10, x11, 0xffff, -0x80000000001, 0x10, x4, 960, x1)
+
+inst_139:
+// rs1_val == -17592186044417,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:0xd
+TEST_RR_OP(srlw, x12, x10, x11, 0x7ffff, -0x100000000001, 0xd, x4, 968, x1)
+
+inst_140:
+// rs1_val == -35184372088833,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:0x1
+TEST_RR_OP(srlw, x12, x10, x11, 0x7fffffff, -0x200000000001, 0x1, x4, 976, x1)
+
+inst_141:
+// rs1_val == -70368744177665,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:0x5
+TEST_RR_OP(srlw, x12, x10, x11, 0x7ffffff, -0x400000000001, 0x5, x4, 984, x1)
+
+inst_142:
+// rs1_val == -140737488355329,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:0x2
+TEST_RR_OP(srlw, x12, x10, x11, 0x3fffffff, -0x800000000001, 0x2, x4, 992, x1)
+
+inst_143:
+// rs1_val == -281474976710657,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:0xe
+TEST_RR_OP(srlw, x12, x10, x11, 0x3ffff, -0x1000000000001, 0xe, x4, 1000, x1)
+
+inst_144:
+// rs1_val == -562949953421313,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:0x1
+TEST_RR_OP(srlw, x12, x10, x11, 0x7fffffff, -0x2000000000001, 0x1, x4, 1008, x1)
+
+inst_145:
+// rs1_val == -1125899906842625,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:0x1e
+TEST_RR_OP(srlw, x12, x10, x11, 0x3, -0x4000000000001, 0x1e, x4, 1016, x1)
+
+inst_146:
+// rs1_val == -2251799813685249,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:0xc
+TEST_RR_OP(srlw, x12, x10, x11, 0xfffff, -0x8000000000001, 0xc, x4, 1024, x1)
+
+inst_147:
+// rs1_val == -9007199254740993,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:0xe
+TEST_RR_OP(srlw, x12, x10, x11, 0x3ffff, -0x20000000000001, 0xe, x4, 1032, x1)
+
+inst_148:
+// rs1_val == -18014398509481985,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:0x9
+TEST_RR_OP(srlw, x12, x10, x11, 0x7fffff, -0x40000000000001, 0x9, x4, 1040, x1)
+
+inst_149:
+// rs1_val < 0 and rs2_val > 0 and rs2_val < xlen, rs1_val==-3037000499
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6
+TEST_RR_OP(srlw, x12, x10, x11, 0x12bec33, -0xb504f333, 0x6, x4, 1048, x1)
+
+inst_150:
+// rs1_val < 0 and rs2_val == 0, rs1_val == -4503599627370497
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:0x0
+TEST_RR_OP(srlw, x12, x10, x11, -0x1, -0x10000000000001, 0x0, x4, 1056, x1)
+
+inst_151:
+// rs1_val == 0 and rs2_val >= 0 and rs2_val < xlen, rs1_val==0
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x12
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x0, 0x12, x4, 1064, x1)
+
+inst_152:
+// rs1_val == (2**(xlen-1)-1) and rs2_val >= 0 and rs2_val < xlen, rs1_val == 9223372036854775807, rs2_val == 27
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffffffffffff; op2val:0x1b
+TEST_RR_OP(srlw, x12, x10, x11, 0x1f, 0x7fffffffffffffff, 0x1b, x4, 1072, x1)
+
+inst_153:
+// rs1_val == 128,
+// opcode: srlw ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0xd
+TEST_RR_OP(srlw, x12, x10, x11, 0x0, 0x80, 0xd, x4, 1080, x1)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x8_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x8_1:
+ .fill 18*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_0:
+ .fill 136*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/sub-01.S b/riscof/suite/rv64i_m/I/sub-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..f7817ba3f9a03e806d08850d4eb49683a036be6f
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/sub-01.S
@@ -0,0 +1,3439 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sub instruction of the RISC-V I extension for the sub covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sub)
+
+RVTEST_SIGBASE( x23,signature_x23_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x21, rs2==x21, rd==x16, rs1_val > 0 and rs2_val > 0, rs1_val != rs2_val, rs2_val == 2, rs1_val == 549755813888
+// opcode: sub ; op1:x21; op2:x21; dest:x16; op1val:0x8000000000; op2val:0x8000000000
+TEST_RR_OP(sub, x16, x21, x21, 0x0, 0x8000000000, 0x8000000000, x23, 0, x28)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x18, rs2==x6, rd==x6, rs1_val > 0 and rs2_val < 0, rs1_val == 1152921504606846976, rs2_val == -562949953421313
+// opcode: sub ; op1:x18; op2:x6; dest:x6; op1val:0x1000000000000000; op2val:-0x2000000000001
+TEST_RR_OP(sub, x6, x18, x6, 0x1002000000000001, 0x1000000000000000, -0x2000000000001, x23, 8, x28)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x11, rs2==x11, rd==x11, rs1_val < 0 and rs2_val < 0, rs1_val == -576460752303423489
+// opcode: sub ; op1:x11; op2:x11; dest:x11; op1val:-0x800000000000001; op2val:-0x800000000000001
+TEST_RR_OP(sub, x11, x11, x11, 0x0, -0x800000000000001, -0x800000000000001, x23, 16, x28)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x2, rs2==x19, rd==x27, rs1_val < 0 and rs2_val > 0, rs2_val == 2048, rs1_val == -2049
+// opcode: sub ; op1:x2; op2:x19; dest:x27; op1val:-0x801; op2val:0x800
+TEST_RR_OP(sub, x27, x2, x19, 0xffffffffffffefff, -0x801, 0x800, x23, 24, x28)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x31, rs2==x20, rd==x31, rs1_val == rs2_val, rs1_val == 0, rs1_val==0 and rs2_val==0, rs2_val == 0
+// opcode: sub ; op1:x31; op2:x20; dest:x31; op1val:0x0; op2val:0x0
+TEST_RR_OP(sub, x31, x31, x20, 0x0, 0x0, 0x0, x23, 32, x28)
+
+inst_5:
+// rs1==x29, rs2==x8, rd==x20, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, rs1_val == -562949953421313
+// opcode: sub ; op1:x29; op2:x8; dest:x20; op1val:-0x2000000000001; op2val:-0x8000000000000000
+TEST_RR_OP(sub, x20, x29, x8, 0x7ffdffffffffffff, -0x2000000000001, -0x8000000000000000, x23, 40, x28)
+
+inst_6:
+// rs1==x8, rs2==x1, rd==x19, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807, rs1_val == -4294967297
+// opcode: sub ; op1:x8; op2:x1; dest:x19; op1val:-0x100000001; op2val:0x7fffffffffffffff
+TEST_RR_OP(sub, x19, x8, x1, 0x7fffffff00000000, -0x100000001, 0x7fffffffffffffff, x23, 48, x28)
+
+inst_7:
+// rs1==x10, rs2==x3, rd==x9, rs2_val == 1, rs1_val == 16
+// opcode: sub ; op1:x10; op2:x3; dest:x9; op1val:0x10; op2val:0x1
+TEST_RR_OP(sub, x9, x10, x3, 0xf, 0x10, 0x1, x23, 56, x28)
+
+inst_8:
+// rs1==x24, rs2==x14, rd==x22, rs1_val == (-2**(xlen-1)), rs2_val == -65, rs1_val == -9223372036854775808
+// opcode: sub ; op1:x24; op2:x14; dest:x22; op1val:-0x8000000000000000; op2val:-0x41
+TEST_RR_OP(sub, x22, x24, x14, 0x8000000000000041, -0x8000000000000000, -0x41, x23, 64, x28)
+
+inst_9:
+// rs1==x1, rs2==x10, rd==x12, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, rs2_val == 67108864
+// opcode: sub ; op1:x1; op2:x10; dest:x12; op1val:0x7fffffffffffffff; op2val:0x4000000
+TEST_RR_OP(sub, x12, x1, x10, 0x7ffffffffbffffff, 0x7fffffffffffffff, 0x4000000, x23, 72, x28)
+
+inst_10:
+// rs1==x22, rs2==x9, rd==x25, rs1_val == 1, rs2_val == 4611686018427387904
+// opcode: sub ; op1:x22; op2:x9; dest:x25; op1val:0x1; op2val:0x4000000000000000
+TEST_RR_OP(sub, x25, x22, x9, 0xc000000000000001, 0x1, 0x4000000000000000, x23, 80, x28)
+
+inst_11:
+// rs1==x13, rs2==x15, rd==x29, rs2_val == 4, rs1_val == 4, rs1_val==4 and rs2_val==4
+// opcode: sub ; op1:x13; op2:x15; dest:x29; op1val:0x4; op2val:0x4
+TEST_RR_OP(sub, x29, x13, x15, 0x0, 0x4, 0x4, x23, 88, x28)
+
+inst_12:
+// rs1==x5, rs2==x13, rd==x10, rs2_val == 8, rs1_val == -4097
+// opcode: sub ; op1:x5; op2:x13; dest:x10; op1val:-0x1001; op2val:0x8
+TEST_RR_OP(sub, x10, x5, x13, 0xffffffffffffeff7, -0x1001, 0x8, x23, 96, x28)
+
+inst_13:
+// rs1==x0, rs2==x5, rd==x7, rs2_val == 16,
+// opcode: sub ; op1:x0; op2:x5; dest:x7; op1val:0x0; op2val:0x10
+TEST_RR_OP(sub, x7, x0, x5, 0xfffffffffffffff0, 0x0, 0x10, x23, 104, x28)
+
+inst_14:
+// rs1==x7, rs2==x22, rd==x4, rs2_val == 32,
+// opcode: sub ; op1:x7; op2:x22; dest:x4; op1val:0x4; op2val:0x20
+TEST_RR_OP(sub, x4, x7, x22, 0xffffffffffffffe4, 0x4, 0x20, x23, 112, x28)
+
+inst_15:
+// rs1==x15, rs2==x17, rd==x26, rs2_val == 64,
+// opcode: sub ; op1:x15; op2:x17; dest:x26; op1val:0xb504f333; op2val:0x40
+TEST_RR_OP(sub, x26, x15, x17, 0xb504f2f3, 0xb504f333, 0x40, x23, 120, x28)
+RVTEST_SIGBASE( x10,signature_x10_0)
+
+inst_16:
+// rs1==x28, rs2==x24, rd==x21, rs2_val == 128, rs1_val == -1125899906842625
+// opcode: sub ; op1:x28; op2:x24; dest:x21; op1val:-0x4000000000001; op2val:0x80
+TEST_RR_OP(sub, x21, x28, x24, 0xfffbffffffffff7f, -0x4000000000001, 0x80, x10, 0, x11)
+
+inst_17:
+// rs1==x6, rs2==x28, rd==x8, rs2_val == 256, rs1_val == 524288
+// opcode: sub ; op1:x6; op2:x28; dest:x8; op1val:0x80000; op2val:0x100
+TEST_RR_OP(sub, x8, x6, x28, 0x7ff00, 0x80000, 0x100, x10, 8, x11)
+
+inst_18:
+// rs1==x9, rs2==x12, rd==x2, rs2_val == 512, rs1_val == 131072
+// opcode: sub ; op1:x9; op2:x12; dest:x2; op1val:0x20000; op2val:0x200
+TEST_RR_OP(sub, x2, x9, x12, 0x1fe00, 0x20000, 0x200, x10, 16, x11)
+
+inst_19:
+// rs1==x4, rs2==x26, rd==x28, rs2_val == 1024, rs1_val == 2305843009213693952
+// opcode: sub ; op1:x4; op2:x26; dest:x28; op1val:0x2000000000000000; op2val:0x400
+TEST_RR_OP(sub, x28, x4, x26, 0x1ffffffffffffc00, 0x2000000000000000, 0x400, x10, 24, x11)
+
+inst_20:
+// rs1==x3, rs2==x29, rd==x30, rs2_val == 4096, rs1_val == 268435456
+// opcode: sub ; op1:x3; op2:x29; dest:x30; op1val:0x10000000; op2val:0x1000
+TEST_RR_OP(sub, x30, x3, x29, 0xffff000, 0x10000000, 0x1000, x10, 32, x11)
+
+inst_21:
+// rs1==x20, rs2==x2, rd==x17, rs2_val == 8192,
+// opcode: sub ; op1:x20; op2:x2; dest:x17; op1val:0x4; op2val:0x2000
+TEST_RR_OP(sub, x17, x20, x2, 0xffffffffffffe004, 0x4, 0x2000, x10, 40, x11)
+
+inst_22:
+// rs1==x26, rs2==x7, rd==x15, rs2_val == 16384,
+// opcode: sub ; op1:x26; op2:x7; dest:x15; op1val:-0x5555555555555555; op2val:0x4000
+TEST_RR_OP(sub, x15, x26, x7, 0xaaaaaaaaaaaa6aab, -0x5555555555555555, 0x4000, x10, 48, x11)
+
+inst_23:
+// rs1==x23, rs2==x31, rd==x0, rs2_val == 32768, rs1_val == -18014398509481985
+// opcode: sub ; op1:x23; op2:x31; dest:x0; op1val:-0x40000000000001; op2val:0x8000
+TEST_RR_OP(sub, x0, x23, x31, 0, -0x40000000000001, 0x8000, x10, 56, x11)
+
+inst_24:
+// rs1==x12, rs2==x30, rd==x1, rs2_val == 65536, rs1_val == 65536
+// opcode: sub ; op1:x12; op2:x30; dest:x1; op1val:0x10000; op2val:0x10000
+TEST_RR_OP(sub, x1, x12, x30, 0x0, 0x10000, 0x10000, x10, 64, x11)
+
+inst_25:
+// rs1==x16, rs2==x23, rd==x13, rs2_val == 131072, rs1_val == 536870912
+// opcode: sub ; op1:x16; op2:x23; dest:x13; op1val:0x20000000; op2val:0x20000
+TEST_RR_OP(sub, x13, x16, x23, 0x1ffe0000, 0x20000000, 0x20000, x10, 72, x11)
+
+inst_26:
+// rs1==x27, rs2==x4, rd==x24, rs2_val == 262144, rs1_val == -1048577
+// opcode: sub ; op1:x27; op2:x4; dest:x24; op1val:-0x100001; op2val:0x40000
+TEST_RR_OP(sub, x24, x27, x4, 0xffffffffffebffff, -0x100001, 0x40000, x10, 80, x11)
+
+inst_27:
+// rs1==x30, rs2==x27, rd==x5, rs2_val == 524288, rs1_val == -134217729
+// opcode: sub ; op1:x30; op2:x27; dest:x5; op1val:-0x8000001; op2val:0x80000
+TEST_RR_OP(sub, x5, x30, x27, 0xfffffffff7f7ffff, -0x8000001, 0x80000, x10, 88, x11)
+
+inst_28:
+// rs1==x17, rs2==x25, rd==x14, rs2_val == 1048576,
+// opcode: sub ; op1:x17; op2:x25; dest:x14; op1val:0x1000000000000000; op2val:0x100000
+TEST_RR_OP(sub, x14, x17, x25, 0xffffffffff00000, 0x1000000000000000, 0x100000, x10, 96, x11)
+
+inst_29:
+// rs1==x25, rs2==x16, rd==x23, rs2_val == 2097152, rs1_val == 8
+// opcode: sub ; op1:x25; op2:x16; dest:x23; op1val:0x8; op2val:0x200000
+TEST_RR_OP(sub, x23, x25, x16, 0xffffffffffe00008, 0x8, 0x200000, x10, 104, x11)
+
+inst_30:
+// rs1==x19, rs2==x0, rd==x18, rs2_val == 4194304, rs1_val == 35184372088832
+// opcode: sub ; op1:x19; op2:x0; dest:x18; op1val:0x200000000000; op2val:0x0
+TEST_RR_OP(sub, x18, x19, x0, 0x200000000000, 0x200000000000, 0x0, x10, 112, x11)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_31:
+// rs1==x14, rs2==x18, rd==x3, rs2_val == 8388608,
+// opcode: sub ; op1:x14; op2:x18; dest:x3; op1val:0x10; op2val:0x800000
+TEST_RR_OP(sub, x3, x14, x18, 0xffffffffff800010, 0x10, 0x800000, x1, 0, x2)
+
+inst_32:
+// rs2_val == 16777216, rs1_val == 33554432
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x1000000
+TEST_RR_OP(sub, x12, x10, x11, 0x1000000, 0x2000000, 0x1000000, x1, 8, x2)
+
+inst_33:
+// rs2_val == 33554432, rs1_val == 8388608
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x2000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffe800000, 0x800000, 0x2000000, x1, 16, x2)
+
+inst_34:
+// rs2_val == 134217728,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x8000000
+TEST_RR_OP(sub, x12, x10, x11, 0x18000000, 0x20000000, 0x8000000, x1, 24, x2)
+
+inst_35:
+// rs2_val == 268435456, rs1_val == 64
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0x10000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffff0000040, 0x40, 0x10000000, x1, 32, x2)
+
+inst_36:
+// rs2_val == 536870912,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x20000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff2afb0ccd, -0xb504f333, 0x20000000, x1, 40, x2)
+
+inst_37:
+// rs2_val == 1073741824, rs1_val == 2097152
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0x40000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffc0200000, 0x200000, 0x40000000, x1, 48, x2)
+
+inst_38:
+// rs2_val == 2147483648, rs1_val == -17592186044417
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:0x80000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffffefff7fffffff, -0x100000000001, 0x80000000, x1, 56, x2)
+
+inst_39:
+// rs2_val == 4294967296,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0x100000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff00020000, 0x20000, 0x100000000, x1, 64, x2)
+
+inst_40:
+// rs2_val == 8589934592,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x200000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffd4afb0cce, -0xb504f332, 0x200000000, x1, 72, x2)
+
+inst_41:
+// rs2_val == 17179869184,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:0x400000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffc00000007, 0x7, 0x400000000, x1, 80, x2)
+
+inst_42:
+// rs2_val == 34359738368,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x800000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffff800000004, 0x4, 0x800000000, x1, 88, x2)
+
+inst_43:
+// rs2_val == 68719476736, rs1_val == 1099511627776
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x1000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xf000000000, 0x10000000000, 0x1000000000, x1, 96, x2)
+
+inst_44:
+// rs2_val == 137438953472, rs1_val == 8589934592
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:0x2000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffe200000000, 0x200000000, 0x2000000000, x1, 104, x2)
+
+inst_45:
+// rs2_val == 274877906944, rs1_val == -549755813889
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:0x4000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffffff3fffffffff, -0x8000000001, 0x4000000000, x1, 112, x2)
+
+inst_46:
+// rs2_val == 549755813888, rs1_val == -1073741825
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x8000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffffff7fbfffffff, -0x40000001, 0x8000000000, x1, 120, x2)
+
+inst_47:
+// rs2_val == 1099511627776,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x10000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffffff0000000005, 0x5, 0x10000000000, x1, 128, x2)
+
+inst_48:
+// rs2_val == 2199023255552,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x20000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffdfffffff7ff, -0x801, 0x20000000000, x1, 136, x2)
+
+inst_49:
+// rs2_val == 4398046511104,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:0x40000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffc0010000000, 0x10000000, 0x40000000000, x1, 144, x2)
+
+inst_50:
+// rs2_val == 8796093022208,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x80000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffff80000000000, 0x0, 0x80000000000, x1, 152, x2)
+
+inst_51:
+// rs2_val == 17592186044416, rs1_val == 8192
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0x100000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffff00000002000, 0x2000, 0x100000000000, x1, 160, x2)
+
+inst_52:
+// rs2_val == 35184372088832,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0x200000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffffe00000002000, 0x2000, 0x200000000000, x1, 168, x2)
+
+inst_53:
+// rs2_val == 70368744177664, rs1_val == 128
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0x400000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffffc00000000080, 0x80, 0x400000000000, x1, 176, x2)
+
+inst_54:
+// rs2_val == 140737488355328,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x800000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffff800000000004, 0x4, 0x800000000000, x1, 184, x2)
+
+inst_55:
+// rs2_val == 281474976710656, rs1_val == -137438953473
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:0x1000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffeffdfffffffff, -0x2000000001, 0x1000000000000, x1, 192, x2)
+
+inst_56:
+// rs2_val == 562949953421312,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x2000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffdffff4afb0cce, -0xb504f332, 0x2000000000000, x1, 200, x2)
+
+inst_57:
+// rs2_val == 1125899906842624, rs1_val == -3
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0x4000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffbfffffffffffd, -0x3, 0x4000000000000, x1, 208, x2)
+
+inst_58:
+// rs2_val == 2251799813685248, rs1_val == -2251799813685249
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:0x8000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffefffffffffffff, -0x8000000000001, 0x8000000000000, x1, 216, x2)
+
+inst_59:
+// rs2_val == 4503599627370496,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x10000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfff0000000000003, 0x3, 0x10000000000000, x1, 224, x2)
+
+inst_60:
+// rs2_val == 9007199254740992, rs1_val == 262144
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0x20000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffe0000000040000, 0x40000, 0x20000000000000, x1, 232, x2)
+
+inst_61:
+// rs2_val == 18014398509481984, rs1_val == -4398046511105
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:0x40000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffbffbffffffffff, -0x40000000001, 0x40000000000000, x1, 240, x2)
+
+inst_62:
+// rs2_val == 36028797018963968,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x80000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xff80000000000005, 0x5, 0x80000000000000, x1, 248, x2)
+
+inst_63:
+// rs2_val == 72057594037927936, rs1_val == 137438953472
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:0x100000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xff00002000000000, 0x2000000000, 0x100000000000000, x1, 256, x2)
+
+inst_64:
+// rs2_val == 144115188075855872,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:0x200000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfe00000000010000, 0x10000, 0x200000000000000, x1, 264, x2)
+
+inst_65:
+// rs2_val == 288230376151711744,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x400000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfc00000000000004, 0x4, 0x400000000000000, x1, 272, x2)
+
+inst_66:
+// rs2_val == 576460752303423488, rs1_val == -281474976710657
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:0x800000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xf7feffffffffffff, -0x1000000000001, 0x800000000000000, x1, 280, x2)
+
+inst_67:
+// rs2_val == 1152921504606846976, rs1_val == -140737488355329
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:0x1000000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xefff7fffffffffff, -0x800000000001, 0x1000000000000000, x1, 288, x2)
+
+inst_68:
+// rs2_val == 2305843009213693952, rs1_val == -68719476737
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:0x2000000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xdfffffefffffffff, -0x1000000001, 0x2000000000000000, x1, 296, x2)
+
+inst_69:
+// rs2_val == -2, rs1_val == -144115188075855873
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:-0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xfe00000000000001, -0x200000000000001, -0x2, x1, 304, x2)
+
+inst_70:
+// rs2_val == -3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x0, -0x3, -0x3, x1, 312, x2)
+
+inst_71:
+// rs2_val == -5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333337, 0x3333333333333332, -0x5, x1, 320, x2)
+
+inst_72:
+// rs2_val == -9, rs1_val == 256
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x9
+TEST_RR_OP(sub, x12, x10, x11, 0x109, 0x100, -0x9, x1, 328, x2)
+
+inst_73:
+// rs2_val == -17, rs1_val == -2305843009213693953
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:-0x11
+TEST_RR_OP(sub, x12, x10, x11, 0xe000000000000010, -0x2000000000000001, -0x11, x1, 336, x2)
+
+inst_74:
+// rs2_val == -33, rs1_val == 17179869184
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:-0x21
+TEST_RR_OP(sub, x12, x10, x11, 0x400000021, 0x400000000, -0x21, x1, 344, x2)
+
+inst_75:
+// rs2_val == -129, rs1_val == -513
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:-0x81
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffe80, -0x201, -0x81, x1, 352, x2)
+
+inst_76:
+// rs2_val == -257,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x101
+TEST_RR_OP(sub, x12, x10, x11, 0x107, 0x6, -0x101, x1, 360, x2)
+
+inst_77:
+// rs2_val == -513, rs1_val == -8589934593
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:-0x201
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe00000200, -0x200000001, -0x201, x1, 368, x2)
+
+inst_78:
+// rs2_val == -1025, rs1_val == 2048
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x401
+TEST_RR_OP(sub, x12, x10, x11, 0xc01, 0x800, -0x401, x1, 376, x2)
+
+inst_79:
+// rs2_val == -2049,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x6; op2val:-0x801
+TEST_RR_OP(sub, x12, x10, x11, 0x7fb, -0x6, -0x801, x1, 384, x2)
+
+inst_80:
+// rs2_val == -4097, rs1_val == 8796093022208
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:-0x1001
+TEST_RR_OP(sub, x12, x10, x11, 0x80000001001, 0x80000000000, -0x1001, x1, 392, x2)
+
+inst_81:
+// rs2_val == -8193,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:-0x2001
+TEST_RR_OP(sub, x12, x10, x11, 0x1000, -0x1001, -0x2001, x1, 400, x2)
+
+inst_82:
+// rs2_val == -16385, rs1_val == 2
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x4001
+TEST_RR_OP(sub, x12, x10, x11, 0x4003, 0x2, -0x4001, x1, 408, x2)
+
+inst_83:
+// rs2_val == -32769,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x7; op2val:-0x8001
+TEST_RR_OP(sub, x12, x10, x11, 0x7ffa, -0x7, -0x8001, x1, 416, x2)
+
+inst_84:
+// rs2_val == -65537, rs1_val == -1025
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:-0x10001
+TEST_RR_OP(sub, x12, x10, x11, 0xfc00, -0x401, -0x10001, x1, 424, x2)
+
+inst_85:
+// rs2_val == -131073, rs1_val == -34359738369
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:-0x20001
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffff800020000, -0x800000001, -0x20001, x1, 432, x2)
+
+inst_86:
+// rs2_val == -262145, rs1_val == 18014398509481984
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:-0x40001
+TEST_RR_OP(sub, x12, x10, x11, 0x40000000040001, 0x40000000000000, -0x40001, x1, 440, x2)
+
+inst_87:
+// rs2_val == -524289,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:-0x80001
+TEST_RR_OP(sub, x12, x10, x11, 0x100001, 0x80000, -0x80001, x1, 448, x2)
+
+inst_88:
+// rs2_val == -1048577,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:-0x100001
+TEST_RR_OP(sub, x12, x10, x11, 0x100008, 0x7, -0x100001, x1, 456, x2)
+
+inst_89:
+// rs2_val == -2097153,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:-0x200001
+TEST_RR_OP(sub, x12, x10, x11, 0x10200001, 0x10000000, -0x200001, x1, 464, x2)
+
+inst_90:
+// rs2_val == -4194305, rs1_val == 4294967296
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:-0x400001
+TEST_RR_OP(sub, x12, x10, x11, 0x100400001, 0x100000000, -0x400001, x1, 472, x2)
+
+inst_91:
+// rs2_val == -8388609, rs1_val == -5
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:-0x800001
+TEST_RR_OP(sub, x12, x10, x11, 0x7ffffc, -0x5, -0x800001, x1, 480, x2)
+
+inst_92:
+// rs2_val == -16777217, rs1_val == 274877906944
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:-0x1000001
+TEST_RR_OP(sub, x12, x10, x11, 0x4001000001, 0x4000000000, -0x1000001, x1, 488, x2)
+
+inst_93:
+// rs2_val == -33554433,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:-0x2000001
+TEST_RR_OP(sub, x12, x10, x11, 0x22000001, 0x20000000, -0x2000001, x1, 496, x2)
+
+inst_94:
+// rs2_val == -67108865, rs1_val == 32
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x4000001
+TEST_RR_OP(sub, x12, x10, x11, 0x4000021, 0x20, -0x4000001, x1, 504, x2)
+
+inst_95:
+// rs2_val == -134217729, rs1_val == -536870913
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:-0x8000001
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffe8000000, -0x20000001, -0x8000001, x1, 512, x2)
+
+inst_96:
+// rs2_val == -268435457,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x10000001
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff5afb0cce, -0xb504f333, -0x10000001, x1, 520, x2)
+
+inst_97:
+// rs2_val == -536870913, rs1_val == 4194304
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:-0x20000001
+TEST_RR_OP(sub, x12, x10, x11, 0x20400001, 0x400000, -0x20000001, x1, 528, x2)
+
+inst_98:
+// rs2_val == -1073741825,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x40000001
+TEST_RR_OP(sub, x12, x10, x11, 0x40000001, 0x0, -0x40000001, x1, 536, x2)
+
+inst_99:
+// rs2_val == -2147483649,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:-0x80000001
+TEST_RR_OP(sub, x12, x10, x11, 0x80000041, 0x40, -0x80000001, x1, 544, x2)
+
+inst_100:
+// rs2_val == -4294967297, rs1_val == -129
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:-0x100000001
+TEST_RR_OP(sub, x12, x10, x11, 0xffffff80, -0x81, -0x100000001, x1, 552, x2)
+
+inst_101:
+// rs2_val == -8589934593, rs1_val == 34359738368
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:-0x200000001
+TEST_RR_OP(sub, x12, x10, x11, 0xa00000001, 0x800000000, -0x200000001, x1, 560, x2)
+
+inst_102:
+// rs2_val == -17179869185,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:-0x400000001
+TEST_RR_OP(sub, x12, x10, x11, 0x3ffffff80, -0x81, -0x400000001, x1, 568, x2)
+
+inst_103:
+// rs2_val == -34359738369, rs1_val == -2
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0x800000001
+TEST_RR_OP(sub, x12, x10, x11, 0x7ffffffff, -0x2, -0x800000001, x1, 576, x2)
+
+inst_104:
+// rs2_val == -68719476737,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:-0x1000000001
+TEST_RR_OP(sub, x12, x10, x11, 0xffff00000, -0x100001, -0x1000000001, x1, 584, x2)
+
+inst_105:
+// rs2_val == -137438953473, rs1_val == 9007199254740992
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:-0x2000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x20002000000001, 0x20000000000000, -0x2000000001, x1, 592, x2)
+
+inst_106:
+// rs2_val == -274877906945, rs1_val == 32768
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x4000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x4000008001, 0x8000, -0x4000000001, x1, 600, x2)
+
+inst_107:
+// rs2_val == -549755813889,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:-0x8000000001
+TEST_RR_OP(sub, x12, x10, x11, 0xffff808000000000, -0x800000000001, -0x8000000001, x1, 608, x2)
+
+inst_108:
+// rs2_val == -1099511627777,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:-0x10000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x20000000001, 0x10000000000, -0x10000000001, x1, 616, x2)
+
+inst_109:
+// rs2_val == -2199023255553,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x20000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x5555575555555555, 0x5555555555555554, -0x20000000001, x1, 624, x2)
+
+inst_110:
+// rs2_val == -4398046511105,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:-0x40000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x40002000001, 0x2000000, -0x40000000001, x1, 632, x2)
+
+inst_111:
+// rs2_val == -8796093022209, rs1_val == 288230376151711744
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:-0x80000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x400080000000001, 0x400000000000000, -0x80000000001, x1, 640, x2)
+
+inst_112:
+// rs2_val == -17592186044417, rs1_val == -33554433
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:-0x100000000001
+TEST_RR_OP(sub, x12, x10, x11, 0xffffe000000, -0x2000001, -0x100000000001, x1, 648, x2)
+
+inst_113:
+// rs2_val == -35184372088833,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x200000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x1fff4afb0ccf, -0xb504f332, -0x200000000001, x1, 656, x2)
+
+inst_114:
+// rs2_val == -70368744177665,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:-0x400000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x3ffe00000000, -0x200000001, -0x400000000001, x1, 664, x2)
+
+inst_115:
+// rs2_val == -140737488355329,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x800000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x7fff4afb0ccf, -0xb504f332, -0x800000000001, x1, 672, x2)
+
+inst_116:
+// rs2_val == -281474976710657,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x1000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x5556555555555557, 0x5555555555555556, -0x1000000000001, x1, 680, x2)
+
+inst_117:
+// rs2_val == -1125899906842625, rs1_val == -70368744177665
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:-0x4000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x3c00000000000, -0x400000000001, -0x4000000000001, x1, 688, x2)
+
+inst_118:
+// rs2_val == -2251799813685249, rs1_val == -268435457
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:-0x8000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x7fffff0000000, -0x10000001, -0x8000000000001, x1, 696, x2)
+
+inst_119:
+// rs2_val == -4503599627370497,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x10000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x10000000000005, 0x4, -0x10000000000001, x1, 704, x2)
+
+inst_120:
+// rs2_val == -9007199254740993,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x20000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x6686666666666666, 0x6666666666666665, -0x20000000000001, x1, 712, x2)
+
+inst_121:
+// rs2_val == -18014398509481985,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x40000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x40000000020001, 0x20000, -0x40000000000001, x1, 720, x2)
+
+inst_122:
+// rs2_val == -36028797018963969,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x80000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x80000000000801, 0x800, -0x80000000000001, x1, 728, x2)
+
+inst_123:
+// rs2_val == -72057594037927937, rs1_val == -17
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:-0x100000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffff0, -0x11, -0x100000000000001, x1, 736, x2)
+
+inst_124:
+// rs2_val == -144115188075855873, rs1_val == -16777217
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:-0x200000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x1ffffffff000000, -0x1000001, -0x200000000000001, x1, 744, x2)
+
+inst_125:
+// rs2_val == -288230376151711745,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x400000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x400000000020001, 0x20000, -0x400000000000001, x1, 752, x2)
+
+inst_126:
+// rs2_val == -576460752303423489,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x800000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x7ffffff4afb0cce, -0xb504f333, -0x800000000000001, x1, 760, x2)
+
+inst_127:
+// rs2_val == -1152921504606846977, rs1_val == -9
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:-0x1000000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffff8, -0x9, -0x1000000000000001, x1, 768, x2)
+
+inst_128:
+// rs2_val == -2305843009213693953,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:-0x2000000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x1ffc000000000000, -0x4000000000001, -0x2000000000000001, x1, 776, x2)
+
+inst_129:
+// rs2_val == -4611686018427387905,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x4000000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x4000000000000005, 0x4, -0x4000000000000001, x1, 784, x2)
+
+inst_130:
+// rs2_val == 6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaab2aaaaaaaab, 0x8000000000, 0x5555555555555555, x1, 792, x2)
+
+inst_131:
+// rs2_val == -6148914691236517206, rs1_val==6148914691236517205 and rs2_val==-6148914691236517206, rs1_val == 6148914691236517205
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555555, -0x5555555555555556, x1, 800, x2)
+
+inst_132:
+// rs1_val == 512,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:-0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x202, 0x200, -0x2, x1, 808, x2)
+
+inst_133:
+// rs1_val == 1024,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:-0x2001
+TEST_RR_OP(sub, x12, x10, x11, 0x2401, 0x400, -0x2001, x1, 816, x2)
+
+inst_134:
+// rs1_val == 4096,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:-0x100000001
+TEST_RR_OP(sub, x12, x10, x11, 0x100001001, 0x1000, -0x100000001, x1, 824, x2)
+
+inst_135:
+// rs1_val == 16384,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:0x10000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffff0004000, 0x4000, 0x10000000, x1, 832, x2)
+
+inst_136:
+// rs1_val == 1048576,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0x20000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xffe0000000100000, 0x100000, 0x20000000000000, x1, 840, x2)
+
+inst_137:
+// rs1_val == 16777216,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:-0x20000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x20001000001, 0x1000000, -0x20000000001, x1, 848, x2)
+
+inst_138:
+// rs1_val == 67108864,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x10
+TEST_RR_OP(sub, x12, x10, x11, 0x3fffff0, 0x4000000, 0x10, x1, 856, x2)
+
+inst_139:
+// rs1_val == 134217728,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:-0x81
+TEST_RR_OP(sub, x12, x10, x11, 0x8000081, 0x8000000, -0x81, x1, 864, x2)
+
+inst_140:
+// rs1_val == 1073741824,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x40000000, 0x40000000, 0x0, x1, 872, x2)
+
+inst_141:
+// rs1_val == 2147483648,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0x400000
+TEST_RR_OP(sub, x12, x10, x11, 0x7fc00000, 0x80000000, 0x400000, x1, 880, x2)
+
+inst_142:
+// rs1_val == 68719476736,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffc, 0x1000000000, 0x4, x1, 888, x2)
+
+inst_143:
+// rs1_val == 2199023255552,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x1fffffffffc, 0x20000000000, 0x4, x1, 896, x2)
+
+inst_144:
+// rs1_val == 4398046511104,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:-0x4001
+TEST_RR_OP(sub, x12, x10, x11, 0x40000004001, 0x40000000000, -0x4001, x1, 904, x2)
+
+inst_145:
+// rs1_val == 17592186044416,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffb, 0x100000000000, 0x5, x1, 912, x2)
+
+inst_146:
+// rs1_val == 70368744177664,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:-0x8
+TEST_RR_OP(sub, x12, x10, x11, 0x400000000008, 0x400000000000, -0x8, x1, 920, x2)
+
+inst_147:
+// rs1_val == 140737488355328,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:-0x201
+TEST_RR_OP(sub, x12, x10, x11, 0x800000000201, 0x800000000000, -0x201, x1, 928, x2)
+
+inst_148:
+// rs1_val == 281474976710656,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0x7
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffff9, 0x1000000000000, 0x7, x1, 936, x2)
+
+inst_149:
+// rs1_val == 562949953421312,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:-0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x2000000000002, 0x2000000000000, -0x2, x1, 944, x2)
+
+inst_150:
+// rs1_val == 1125899906842624,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaeaaaaaaaaaaab, 0x4000000000000, 0x5555555555555555, x1, 952, x2)
+
+inst_151:
+// rs1_val == 2251799813685248,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:-0x200000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x208000000000001, 0x8000000000000, -0x200000000000001, x1, 960, x2)
+
+inst_152:
+// rs1_val == 4503599627370496,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:-0x400000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x410000000000001, 0x10000000000000, -0x400000000000001, x1, 968, x2)
+
+inst_153:
+// rs1_val == 36028797018963968,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:0x40
+TEST_RR_OP(sub, x12, x10, x11, 0x7fffffffffffc0, 0x80000000000000, 0x40, x1, 976, x2)
+
+inst_154:
+// rs1_val == 72057594037927936,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:-0x101
+TEST_RR_OP(sub, x12, x10, x11, 0x100000000000101, 0x100000000000000, -0x101, x1, 984, x2)
+
+inst_155:
+// rs1_val == 144115188075855872,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:0x100
+TEST_RR_OP(sub, x12, x10, x11, 0x1ffffffffffff00, 0x200000000000000, 0x100, x1, 992, x2)
+
+inst_156:
+// rs1_val == 576460752303423488,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:0x200000000
+TEST_RR_OP(sub, x12, x10, x11, 0x7fffffe00000000, 0x800000000000000, 0x200000000, x1, 1000, x2)
+
+inst_157:
+// rs1_val == 4611686018427387904,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:-0x21
+TEST_RR_OP(sub, x12, x10, x11, 0x4000000000000021, 0x4000000000000000, -0x21, x1, 1008, x2)
+
+inst_158:
+// rs1_val == -33,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555535, -0x21, -0x5555555555555556, x1, 1016, x2)
+
+inst_159:
+// rs1_val == -65,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x10000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffeffbf, -0x41, 0x10000, x1, 1024, x2)
+
+inst_160:
+// rs1_val == -257,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:-0x200000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x1fffffffff00, -0x101, -0x200000000001, x1, 1032, x2)
+
+inst_161:
+// rs1_val == -8193,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:-0x1
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffe000, -0x2001, -0x1, x1, 1040, x2)
+
+inst_162:
+// rs1_val == -16385,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffbffd, -0x4001, 0x2, x1, 1048, x2)
+
+inst_163:
+// rs1_val == -32769,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffff7ffd, -0x8001, 0x2, x1, 1056, x2)
+
+inst_164:
+// rs1_val == -65537,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x4000001
+TEST_RR_OP(sub, x12, x10, x11, 0x3ff0000, -0x10001, -0x4000001, x1, 1064, x2)
+
+inst_165:
+// rs1_val == -131073,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:-0x2000000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x1ffffffffffe0000, -0x20001, -0x2000000000000001, x1, 1072, x2)
+
+inst_166:
+// rs1_val == -262145,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:-0x20000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0x1ffffffffc0000, -0x40001, -0x20000000000001, x1, 1080, x2)
+
+inst_167:
+// rs1_val == -524289,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x1000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffef7ffff, -0x80001, 0x1000000, x1, 1088, x2)
+
+inst_168:
+// rs1_val == -2097153,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:-0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffe00001, -0x200001, -0x2, x1, 1096, x2)
+
+inst_169:
+// rs1_val == -4194305,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:-0x1000001
+TEST_RR_OP(sub, x12, x10, x11, 0xc00000, -0x400001, -0x1000001, x1, 1104, x2)
+
+inst_170:
+// rs1_val == -8388609,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffff7fffff, -0x800001, 0x0, x1, 1112, x2)
+
+inst_171:
+// rs1_val == -67108865,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:-0x40000001
+TEST_RR_OP(sub, x12, x10, x11, 0x3c000000, -0x4000001, -0x40000001, x1, 1120, x2)
+
+inst_172:
+// rs1_val == -2147483649,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff7fffffff, -0x80000001, 0x0, x1, 1128, x2)
+
+inst_173:
+// rs1_val == -17179869185,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:-0x7
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffc00000006, -0x400000001, -0x7, x1, 1136, x2)
+
+inst_174:
+// rs1_val == -274877906945,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffbfffffffff, -0x4000000001, 0x0, x1, 1144, x2)
+
+inst_175:
+// rs1_val == -1099511627777,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:0x2000000000000
+TEST_RR_OP(sub, x12, x10, x11, 0xfffdfeffffffffff, -0x10000000001, 0x2000000000000, x1, 1152, x2)
+
+inst_176:
+// rs1_val == -2199023255553,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:-0x800000001
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffe0800000000, -0x20000000001, -0x800000001, x1, 1160, x2)
+
+inst_177:
+// rs1_val == -8796093022209,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:-0x4000001
+TEST_RR_OP(sub, x12, x10, x11, 0xfffff80004000000, -0x80000000001, -0x4000001, x1, 1168, x2)
+
+inst_178:
+// rs1_val == -35184372088833,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:-0x80000001
+TEST_RR_OP(sub, x12, x10, x11, 0xffffe00080000000, -0x200000000001, -0x80000001, x1, 1176, x2)
+
+inst_179:
+// rs1_val == -4503599627370497,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:0x400
+TEST_RR_OP(sub, x12, x10, x11, 0xffeffffffffffbff, -0x10000000000001, 0x400, x1, 1184, x2)
+
+inst_180:
+// rs1_val == -9007199254740993,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:-0xa
+TEST_RR_OP(sub, x12, x10, x11, 0xffe0000000000009, -0x20000000000001, -0xa, x1, 1192, x2)
+
+inst_181:
+// rs1_val == -36028797018963969,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:0x9
+TEST_RR_OP(sub, x12, x10, x11, 0xff7ffffffffffff6, -0x80000000000001, 0x9, x1, 1200, x2)
+
+inst_182:
+// rs1_val == -72057594037927937,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:-0x200000000001
+TEST_RR_OP(sub, x12, x10, x11, 0xff00200000000000, -0x100000000000001, -0x200000000001, x1, 1208, x2)
+
+inst_183:
+// rs1_val == -288230376151711745,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000000001; op2val:-0x400001
+TEST_RR_OP(sub, x12, x10, x11, 0xfc00000000400000, -0x400000000000001, -0x400001, x1, 1216, x2)
+
+inst_184:
+// rs1_val == -1152921504606846977,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:-0x80001
+TEST_RR_OP(sub, x12, x10, x11, 0xf000000000080000, -0x1000000000000001, -0x80001, x1, 1224, x2)
+
+inst_185:
+// rs1_val == -4611686018427387905,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:-0x1000000000000001
+TEST_RR_OP(sub, x12, x10, x11, 0xd000000000000000, -0x4000000000000001, -0x1000000000000001, x1, 1232, x2)
+
+inst_186:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206 and rs2_val==0
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x0, x1, 1240, x2)
+
+inst_187:
+// rs1_val==3 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x3, 0x3, x1, 1248, x2)
+
+inst_188:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaae, 0x3, 0x5555555555555555, x1, 1256, x2)
+
+inst_189:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555559, 0x3, -0x5555555555555556, x1, 1264, x2)
+
+inst_190:
+// rs1_val==3 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffe, 0x3, 0x5, x1, 1272, x2)
+
+inst_191:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccd0, 0x3, 0x3333333333333333, x1, 1280, x2)
+
+inst_192:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999d, 0x3, 0x6666666666666666, x1, 1288, x2)
+
+inst_193:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f336, 0x3, -0xb504f333, x1, 1296, x2)
+
+inst_194:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cd0, 0x3, 0xb504f333, x1, 1304, x2)
+
+inst_195:
+// rs1_val==3 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x3, 0x2, x1, 1312, x2)
+
+inst_196:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x3, 0x5555555555555554, x1, 1320, x2)
+
+inst_197:
+// rs1_val==3 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x3, 0x3, 0x0, x1, 1328, x2)
+
+inst_198:
+// rs1_val==3 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, 0x3, 0x4, x1, 1336, x2)
+
+inst_199:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccd1, 0x3, 0x3333333333333332, x1, 1344, x2)
+
+inst_200:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999e, 0x3, 0x6666666666666665, x1, 1352, x2)
+
+inst_201:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cd1, 0x3, 0xb504f332, x1, 1360, x2)
+
+inst_202:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaad, 0x3, 0x5555555555555556, x1, 1368, x2)
+
+inst_203:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555558, 0x3, -0x5555555555555555, x1, 1376, x2)
+
+inst_204:
+// rs1_val==3 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffd, 0x3, 0x6, x1, 1384, x2)
+
+inst_205:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccccccccccf, 0x3, 0x3333333333333334, x1, 1392, x2)
+
+inst_206:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999c, 0x3, 0x6666666666666667, x1, 1400, x2)
+
+inst_207:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f335, 0x3, -0xb504f332, x1, 1408, x2)
+
+inst_208:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0ccf, 0x3, 0xb504f334, x1, 1416, x2)
+
+inst_209:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555552, 0x5555555555555555, 0x3, x1, 1424, x2)
+
+inst_210:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x5555555555555555, 0x5555555555555555, x1, 1432, x2)
+
+inst_211:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555550, 0x5555555555555555, 0x5, x1, 1440, x2)
+
+inst_212:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0x2222222222222222, 0x5555555555555555, 0x3333333333333333, x1, 1448, x2)
+
+inst_213:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeeeeeeeeeef, 0x5555555555555555, 0x6666666666666666, x1, 1456, x2)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x555555560a5a4888, 0x5555555555555555, -0xb504f333, x1, 1464, x2)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554a0506222, 0x5555555555555555, 0xb504f333, x1, 1472, x2)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555553, 0x5555555555555555, 0x2, x1, 1480, x2)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x5555555555555555, 0x5555555555555554, x1, 1488, x2)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x0, x1, 1496, x2)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555551, 0x5555555555555555, 0x4, x1, 1504, x2)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0x2222222222222223, 0x5555555555555555, 0x3333333333333332, x1, 1512, x2)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeeeeeeeeef0, 0x5555555555555555, 0x6666666666666665, x1, 1520, x2)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554a0506223, 0x5555555555555555, 0xb504f332, x1, 1528, x2)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, 0x5555555555555555, 0x5555555555555556, x1, 1536, x2)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555555, -0x5555555555555555, x1, 1544, x2)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x555555555555554f, 0x5555555555555555, 0x6, x1, 1552, x2)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0x2222222222222221, 0x5555555555555555, 0x3333333333333334, x1, 1560, x2)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeeeeeeeeeee, 0x5555555555555555, 0x6666666666666667, x1, 1568, x2)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x555555560a5a4887, 0x5555555555555555, -0xb504f332, x1, 1576, x2)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554a0506221, 0x5555555555555555, 0xb504f334, x1, 1584, x2)
+
+inst_230:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaa7, -0x5555555555555556, 0x3, x1, 1592, x2)
+
+inst_231:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555555, -0x5555555555555556, 0x5555555555555555, x1, 1600, x2)
+
+inst_232:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x0, -0x5555555555555556, -0x5555555555555556, x1, 1608, x2)
+
+inst_233:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaa5, -0x5555555555555556, 0x5, x1, 1616, x2)
+
+inst_234:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0x7777777777777777, -0x5555555555555556, 0x3333333333333333, x1, 1624, x2)
+
+inst_235:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x4444444444444444, -0x5555555555555556, 0x6666666666666666, x1, 1632, x2)
+
+inst_236:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab5faf9ddd, -0x5555555555555556, -0xb504f333, x1, 1640, x2)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9f5a5b777, -0x5555555555555556, 0xb504f333, x1, 1648, x2)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaa8, -0x5555555555555556, 0x2, x1, 1656, x2)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555556, -0x5555555555555556, 0x5555555555555554, x1, 1664, x2)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaa6, -0x5555555555555556, 0x4, x1, 1672, x2)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0x7777777777777778, -0x5555555555555556, 0x3333333333333332, x1, 1680, x2)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x4444444444444445, -0x5555555555555556, 0x6666666666666665, x1, 1688, x2)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9f5a5b778, -0x5555555555555556, 0xb504f332, x1, 1696, x2)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555554, -0x5555555555555556, 0x5555555555555556, x1, 1704, x2)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, -0x5555555555555556, -0x5555555555555555, x1, 1712, x2)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaa4, -0x5555555555555556, 0x6, x1, 1720, x2)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0x7777777777777776, -0x5555555555555556, 0x3333333333333334, x1, 1728, x2)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x4444444444444443, -0x5555555555555556, 0x6666666666666667, x1, 1736, x2)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab5faf9ddc, -0x5555555555555556, -0xb504f332, x1, 1744, x2)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9f5a5b776, -0x5555555555555556, 0xb504f334, x1, 1752, x2)
+
+inst_251:
+// rs1_val==5 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x5, 0x3, x1, 1760, x2)
+
+inst_252:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaab0, 0x5, 0x5555555555555555, x1, 1768, x2)
+
+inst_253:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x555555555555555b, 0x5, -0x5555555555555556, x1, 1776, x2)
+
+inst_254:
+// rs1_val==5 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x5, 0x5, x1, 1784, x2)
+
+inst_255:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccd2, 0x5, 0x3333333333333333, x1, 1792, x2)
+
+inst_256:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999f, 0x5, 0x6666666666666666, x1, 1800, x2)
+
+inst_257:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f338, 0x5, -0xb504f333, x1, 1808, x2)
+
+inst_258:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cd2, 0x5, 0xb504f333, x1, 1816, x2)
+
+inst_259:
+// rs1_val==5 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x3, 0x5, 0x2, x1, 1824, x2)
+
+inst_260:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaab1, 0x5, 0x5555555555555554, x1, 1832, x2)
+
+inst_261:
+// rs1_val==5 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x5, 0x5, 0x0, x1, 1840, x2)
+
+inst_262:
+// rs1_val==5 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x5, 0x4, x1, 1848, x2)
+
+inst_263:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccd3, 0x5, 0x3333333333333332, x1, 1856, x2)
+
+inst_264:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x99999999999999a0, 0x5, 0x6666666666666665, x1, 1864, x2)
+
+inst_265:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cd3, 0x5, 0xb504f332, x1, 1872, x2)
+
+inst_266:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x5, 0x5555555555555556, x1, 1880, x2)
+
+inst_267:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x555555555555555a, 0x5, -0x5555555555555555, x1, 1888, x2)
+
+inst_268:
+// rs1_val==5 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, 0x5, 0x6, x1, 1896, x2)
+
+inst_269:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccd1, 0x5, 0x3333333333333334, x1, 1904, x2)
+
+inst_270:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999e, 0x5, 0x6666666666666667, x1, 1912, x2)
+
+inst_271:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f337, 0x5, -0xb504f332, x1, 1920, x2)
+
+inst_272:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cd1, 0x5, 0xb504f334, x1, 1928, x2)
+
+inst_273:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333330, 0x3333333333333333, 0x3, x1, 1936, x2)
+
+inst_274:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xddddddddddddddde, 0x3333333333333333, 0x5555555555555555, x1, 1944, x2)
+
+inst_275:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x8888888888888889, 0x3333333333333333, -0x5555555555555556, x1, 1952, x2)
+
+inst_276:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x333333333333332e, 0x3333333333333333, 0x5, x1, 1960, x2)
+
+inst_277:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x3333333333333333, 0x3333333333333333, x1, 1968, x2)
+
+inst_278:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccccccccccd, 0x3333333333333333, 0x6666666666666666, x1, 1976, x2)
+
+inst_279:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x33333333e8382666, 0x3333333333333333, -0xb504f333, x1, 1984, x2)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x333333327e2e4000, 0x3333333333333333, 0xb504f333, x1, 1992, x2)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333331, 0x3333333333333333, 0x2, x1, 2000, x2)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xdddddddddddddddf, 0x3333333333333333, 0x5555555555555554, x1, 2008, x2)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x0, x1, 2016, x2)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x333333333333332f, 0x3333333333333333, 0x4, x1, 2024, x2)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x3333333333333333, 0x3333333333333332, x1, 2032, x2)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccce, 0x3333333333333333, 0x6666666666666665, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x333333327e2e4001, 0x3333333333333333, 0xb504f332, x1, 0, x2)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xdddddddddddddddd, 0x3333333333333333, 0x5555555555555556, x1, 8, x2)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x8888888888888888, 0x3333333333333333, -0x5555555555555555, x1, 16, x2)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x333333333333332d, 0x3333333333333333, 0x6, x1, 24, x2)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, 0x3333333333333333, 0x3333333333333334, x1, 32, x2)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccccccccccc, 0x3333333333333333, 0x6666666666666667, x1, 40, x2)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x33333333e8382665, 0x3333333333333333, -0xb504f332, x1, 48, x2)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0x333333327e2e3fff, 0x3333333333333333, 0xb504f334, x1, 56, x2)
+
+inst_295:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666663, 0x6666666666666666, 0x3, x1, 64, x2)
+
+inst_296:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x1111111111111111, 0x6666666666666666, 0x5555555555555555, x1, 72, x2)
+
+inst_297:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xbbbbbbbbbbbbbbbc, 0x6666666666666666, -0x5555555555555556, x1, 80, x2)
+
+inst_298:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666661, 0x6666666666666666, 0x5, x1, 88, x2)
+
+inst_299:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333333, 0x6666666666666666, 0x3333333333333333, x1, 96, x2)
+
+inst_300:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x6666666666666666, 0x6666666666666666, x1, 104, x2)
+
+inst_301:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x666666671b6b5999, 0x6666666666666666, -0xb504f333, x1, 112, x2)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x66666665b1617333, 0x6666666666666666, 0xb504f333, x1, 120, x2)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666664, 0x6666666666666666, 0x2, x1, 128, x2)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0x1111111111111112, 0x6666666666666666, 0x5555555555555554, x1, 136, x2)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x0, x1, 144, x2)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666662, 0x6666666666666666, 0x4, x1, 152, x2)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333334, 0x6666666666666666, 0x3333333333333332, x1, 160, x2)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x6666666666666666, 0x6666666666666665, x1, 168, x2)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x66666665b1617334, 0x6666666666666666, 0xb504f332, x1, 176, x2)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x1111111111111110, 0x6666666666666666, 0x5555555555555556, x1, 184, x2)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x6666666666666666, -0x5555555555555555, x1, 192, x2)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666660, 0x6666666666666666, 0x6, x1, 200, x2)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333332, 0x6666666666666666, 0x3333333333333334, x1, 208, x2)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, 0x6666666666666666, 0x6666666666666667, x1, 216, x2)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x666666671b6b5998, 0x6666666666666666, -0xb504f332, x1, 224, x2)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0x66666665b1617332, 0x6666666666666666, 0xb504f334, x1, 232, x2)
+
+inst_317:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cca, -0xb504f333, 0x3, x1, 240, x2)
+
+inst_318:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9f5a5b778, -0xb504f333, 0x5555555555555555, x1, 248, x2)
+
+inst_319:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554a0506223, -0xb504f333, -0x5555555555555556, x1, 256, x2)
+
+inst_320:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cc8, -0xb504f333, 0x5, x1, 264, x2)
+
+inst_321:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccc17c7d99a, -0xb504f333, 0x3333333333333333, x1, 272, x2)
+
+inst_322:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x99999998e494a667, -0xb504f333, 0x6666666666666666, x1, 280, x2)
+
+inst_323:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x0, -0xb504f333, -0xb504f333, x1, 288, x2)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe95f6199a, -0xb504f333, 0xb504f333, x1, 296, x2)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0ccb, -0xb504f333, 0x2, x1, 304, x2)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9f5a5b779, -0xb504f333, 0x5555555555555554, x1, 312, x2)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x0, x1, 320, x2)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cc9, -0xb504f333, 0x4, x1, 328, x2)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccc17c7d99b, -0xb504f333, 0x3333333333333332, x1, 336, x2)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x99999998e494a668, -0xb504f333, 0x6666666666666665, x1, 344, x2)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe95f6199b, -0xb504f333, 0xb504f332, x1, 352, x2)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9f5a5b777, -0xb504f333, 0x5555555555555556, x1, 360, x2)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554a0506222, -0xb504f333, -0x5555555555555555, x1, 368, x2)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cc7, -0xb504f333, 0x6, x1, 376, x2)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccc17c7d999, -0xb504f333, 0x3333333333333334, x1, 384, x2)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x99999998e494a666, -0xb504f333, 0x6666666666666667, x1, 392, x2)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, -0xb504f333, -0xb504f332, x1, 400, x2)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe95f61999, -0xb504f333, 0xb504f334, x1, 408, x2)
+
+inst_339:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f330, 0xb504f333, 0x3, x1, 416, x2)
+
+inst_340:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab5faf9dde, 0xb504f333, 0x5555555555555555, x1, 424, x2)
+
+inst_341:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x555555560a5a4889, 0xb504f333, -0x5555555555555556, x1, 432, x2)
+
+inst_342:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f32e, 0xb504f333, 0x5, x1, 440, x2)
+
+inst_343:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccd81d1c000, 0xb504f333, 0x3333333333333333, x1, 448, x2)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999a4e9e8ccd, 0xb504f333, 0x6666666666666666, x1, 456, x2)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x16a09e666, 0xb504f333, -0xb504f333, x1, 464, x2)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0xb504f333, 0xb504f333, x1, 472, x2)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f331, 0xb504f333, 0x2, x1, 480, x2)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab5faf9ddf, 0xb504f333, 0x5555555555555554, x1, 488, x2)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f333, 0xb504f333, 0x0, x1, 496, x2)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f32f, 0xb504f333, 0x4, x1, 504, x2)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccd81d1c001, 0xb504f333, 0x3333333333333332, x1, 512, x2)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999a4e9e8cce, 0xb504f333, 0x6666666666666665, x1, 520, x2)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0xb504f333, 0xb504f332, x1, 528, x2)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab5faf9ddd, 0xb504f333, 0x5555555555555556, x1, 536, x2)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x555555560a5a4888, 0xb504f333, -0x5555555555555555, x1, 544, x2)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f32d, 0xb504f333, 0x6, x1, 552, x2)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccd81d1bfff, 0xb504f333, 0x3333333333333334, x1, 560, x2)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999a4e9e8ccc, 0xb504f333, 0x6666666666666667, x1, 568, x2)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x16a09e665, 0xb504f333, -0xb504f332, x1, 576, x2)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, 0xb504f333, 0xb504f334, x1, 584, x2)
+
+inst_361:
+// rs1_val==2 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, 0x2, 0x3, x1, 592, x2)
+
+inst_362:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaad, 0x2, 0x5555555555555555, x1, 600, x2)
+
+inst_363:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555558, 0x2, -0x5555555555555556, x1, 608, x2)
+
+inst_364:
+// rs1_val==2 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffd, 0x2, 0x5, x1, 616, x2)
+
+inst_365:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccccccccccf, 0x2, 0x3333333333333333, x1, 624, x2)
+
+inst_366:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999c, 0x2, 0x6666666666666666, x1, 632, x2)
+
+inst_367:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f335, 0x2, -0xb504f333, x1, 640, x2)
+
+inst_368:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0ccf, 0x2, 0xb504f333, x1, 648, x2)
+
+inst_369:
+// rs1_val==2 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x2, 0x2, x1, 656, x2)
+
+inst_370:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaae, 0x2, 0x5555555555555554, x1, 664, x2)
+
+inst_371:
+// rs1_val==2 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x2, 0x0, x1, 672, x2)
+
+inst_372:
+// rs1_val==2 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffe, 0x2, 0x4, x1, 680, x2)
+
+inst_373:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccd0, 0x2, 0x3333333333333332, x1, 688, x2)
+
+inst_374:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999d, 0x2, 0x6666666666666665, x1, 696, x2)
+
+inst_375:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cd0, 0x2, 0xb504f332, x1, 704, x2)
+
+inst_376:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaac, 0x2, 0x5555555555555556, x1, 712, x2)
+
+inst_377:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555557, 0x2, -0x5555555555555555, x1, 720, x2)
+
+inst_378:
+// rs1_val==2 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffc, 0x2, 0x6, x1, 728, x2)
+
+inst_379:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccce, 0x2, 0x3333333333333334, x1, 736, x2)
+
+inst_380:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999b, 0x2, 0x6666666666666667, x1, 744, x2)
+
+inst_381:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f334, 0x2, -0xb504f332, x1, 752, x2)
+
+inst_382:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cce, 0x2, 0xb504f334, x1, 760, x2)
+
+inst_383:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555551, 0x5555555555555554, 0x3, x1, 768, x2)
+
+inst_384:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, 0x5555555555555554, 0x5555555555555555, x1, 776, x2)
+
+inst_385:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x5555555555555554, -0x5555555555555556, x1, 784, x2)
+
+inst_386:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x555555555555554f, 0x5555555555555554, 0x5, x1, 792, x2)
+
+inst_387:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0x2222222222222221, 0x5555555555555554, 0x3333333333333333, x1, 800, x2)
+
+inst_388:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeeeeeeeeeee, 0x5555555555555554, 0x6666666666666666, x1, 808, x2)
+
+inst_389:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x555555560a5a4887, 0x5555555555555554, -0xb504f333, x1, 816, x2)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554a0506221, 0x5555555555555554, 0xb504f333, x1, 824, x2)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555552, 0x5555555555555554, 0x2, x1, 832, x2)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x5555555555555554, 0x5555555555555554, x1, 840, x2)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x0, x1, 848, x2)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555550, 0x5555555555555554, 0x4, x1, 856, x2)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0x2222222222222222, 0x5555555555555554, 0x3333333333333332, x1, 864, x2)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeeeeeeeeeef, 0x5555555555555554, 0x6666666666666665, x1, 872, x2)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554a0506222, 0x5555555555555554, 0xb504f332, x1, 880, x2)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffe, 0x5555555555555554, 0x5555555555555556, x1, 888, x2)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x5555555555555554, -0x5555555555555555, x1, 896, x2)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x555555555555554e, 0x5555555555555554, 0x6, x1, 904, x2)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0x2222222222222220, 0x5555555555555554, 0x3333333333333334, x1, 912, x2)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeeeeeeeeeed, 0x5555555555555554, 0x6666666666666667, x1, 920, x2)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x555555560a5a4886, 0x5555555555555554, -0xb504f332, x1, 928, x2)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554a0506220, 0x5555555555555554, 0xb504f334, x1, 936, x2)
+
+inst_405:
+// rs1_val==0 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffd, 0x0, 0x3, x1, 944, x2)
+
+inst_406:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaab, 0x0, 0x5555555555555555, x1, 952, x2)
+
+inst_407:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555556, 0x0, -0x5555555555555556, x1, 960, x2)
+
+inst_408:
+// rs1_val==0 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffb, 0x0, 0x5, x1, 968, x2)
+
+inst_409:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccccccccccd, 0x0, 0x3333333333333333, x1, 976, x2)
+
+inst_410:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999a, 0x0, 0x6666666666666666, x1, 984, x2)
+
+inst_411:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f333, 0x0, -0xb504f333, x1, 992, x2)
+
+inst_412:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f332, 0x0, -0xb504f332, x1, 1000, x2)
+
+inst_413:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0ccc, 0x0, 0xb504f334, x1, 1008, x2)
+
+inst_414:
+// rs1_val==4 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x4, 0x3, x1, 1016, x2)
+
+inst_415:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x4, 0x5555555555555555, x1, 1024, x2)
+
+inst_416:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x555555555555555a, 0x4, -0x5555555555555556, x1, 1032, x2)
+
+inst_417:
+// rs1_val==4 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, 0x4, 0x5, x1, 1040, x2)
+
+inst_418:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccd1, 0x4, 0x3333333333333333, x1, 1048, x2)
+
+inst_419:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999e, 0x4, 0x6666666666666666, x1, 1056, x2)
+
+inst_420:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f337, 0x4, -0xb504f333, x1, 1064, x2)
+
+inst_421:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cd1, 0x4, 0xb504f333, x1, 1072, x2)
+
+inst_422:
+// rs1_val==4 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x4, 0x2, x1, 1080, x2)
+
+inst_423:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaab0, 0x4, 0x5555555555555554, x1, 1088, x2)
+
+inst_424:
+// rs1_val==4 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x4, 0x4, 0x0, x1, 1096, x2)
+
+inst_425:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccd2, 0x4, 0x3333333333333332, x1, 1104, x2)
+
+inst_426:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999f, 0x4, 0x6666666666666665, x1, 1112, x2)
+
+inst_427:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cd2, 0x4, 0xb504f332, x1, 1120, x2)
+
+inst_428:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaae, 0x4, 0x5555555555555556, x1, 1128, x2)
+
+inst_429:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555559, 0x4, -0x5555555555555555, x1, 1136, x2)
+
+inst_430:
+// rs1_val==4 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffe, 0x4, 0x6, x1, 1144, x2)
+
+inst_431:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccd0, 0x4, 0x3333333333333334, x1, 1152, x2)
+
+inst_432:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999d, 0x4, 0x6666666666666667, x1, 1160, x2)
+
+inst_433:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f336, 0x4, -0xb504f332, x1, 1168, x2)
+
+inst_434:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cd0, 0x4, 0xb504f334, x1, 1176, x2)
+
+inst_435:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x333333333333332f, 0x3333333333333332, 0x3, x1, 1184, x2)
+
+inst_436:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xdddddddddddddddd, 0x3333333333333332, 0x5555555555555555, x1, 1192, x2)
+
+inst_437:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x8888888888888888, 0x3333333333333332, -0x5555555555555556, x1, 1200, x2)
+
+inst_438:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x333333333333332d, 0x3333333333333332, 0x5, x1, 1208, x2)
+
+inst_439:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, 0x3333333333333332, 0x3333333333333333, x1, 1216, x2)
+
+inst_440:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccccccccccc, 0x3333333333333332, 0x6666666666666666, x1, 1224, x2)
+
+inst_441:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x33333333e8382665, 0x3333333333333332, -0xb504f333, x1, 1232, x2)
+
+inst_442:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x333333327e2e3fff, 0x3333333333333332, 0xb504f333, x1, 1240, x2)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333330, 0x3333333333333332, 0x2, x1, 1248, x2)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xddddddddddddddde, 0x3333333333333332, 0x5555555555555554, x1, 1256, x2)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x0, x1, 1264, x2)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x333333333333332e, 0x3333333333333332, 0x4, x1, 1272, x2)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x3333333333333332, 0x3333333333333332, x1, 1280, x2)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccccccccccd, 0x3333333333333332, 0x6666666666666665, x1, 1288, x2)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x333333327e2e4000, 0x3333333333333332, 0xb504f332, x1, 1296, x2)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xdddddddddddddddc, 0x3333333333333332, 0x5555555555555556, x1, 1304, x2)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x8888888888888887, 0x3333333333333332, -0x5555555555555555, x1, 1312, x2)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x333333333333332c, 0x3333333333333332, 0x6, x1, 1320, x2)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffe, 0x3333333333333332, 0x3333333333333334, x1, 1328, x2)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccccccccccb, 0x3333333333333332, 0x6666666666666667, x1, 1336, x2)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x33333333e8382664, 0x3333333333333332, -0xb504f332, x1, 1344, x2)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0x333333327e2e3ffe, 0x3333333333333332, 0xb504f334, x1, 1352, x2)
+
+inst_457:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666662, 0x6666666666666665, 0x3, x1, 1360, x2)
+
+inst_458:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x1111111111111110, 0x6666666666666665, 0x5555555555555555, x1, 1368, x2)
+
+inst_459:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xbbbbbbbbbbbbbbbb, 0x6666666666666665, -0x5555555555555556, x1, 1376, x2)
+
+inst_460:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666660, 0x6666666666666665, 0x5, x1, 1384, x2)
+
+inst_461:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333332, 0x6666666666666665, 0x3333333333333333, x1, 1392, x2)
+
+inst_462:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, 0x6666666666666665, 0x6666666666666666, x1, 1400, x2)
+
+inst_463:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x666666671b6b5998, 0x6666666666666665, -0xb504f333, x1, 1408, x2)
+
+inst_464:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x66666665b1617332, 0x6666666666666665, 0xb504f333, x1, 1416, x2)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666663, 0x6666666666666665, 0x2, x1, 1424, x2)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0x1111111111111111, 0x6666666666666665, 0x5555555555555554, x1, 1432, x2)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x0, x1, 1440, x2)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666661, 0x6666666666666665, 0x4, x1, 1448, x2)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333333, 0x6666666666666665, 0x3333333333333332, x1, 1456, x2)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x6666666666666665, 0x6666666666666665, x1, 1464, x2)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x66666665b1617333, 0x6666666666666665, 0xb504f332, x1, 1472, x2)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x111111111111110f, 0x6666666666666665, 0x5555555555555556, x1, 1480, x2)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xbbbbbbbbbbbbbbba, 0x6666666666666665, -0x5555555555555555, x1, 1488, x2)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x666666666666665f, 0x6666666666666665, 0x6, x1, 1496, x2)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333331, 0x6666666666666665, 0x3333333333333334, x1, 1504, x2)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffe, 0x6666666666666665, 0x6666666666666667, x1, 1512, x2)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x666666671b6b5997, 0x6666666666666665, -0xb504f332, x1, 1520, x2)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0x66666665b1617331, 0x6666666666666665, 0xb504f334, x1, 1528, x2)
+
+inst_479:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f32f, 0xb504f332, 0x3, x1, 1536, x2)
+
+inst_480:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab5faf9ddd, 0xb504f332, 0x5555555555555555, x1, 1544, x2)
+
+inst_481:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x555555560a5a4888, 0xb504f332, -0x5555555555555556, x1, 1552, x2)
+
+inst_482:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f32d, 0xb504f332, 0x5, x1, 1560, x2)
+
+inst_483:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccd81d1bfff, 0xb504f332, 0x3333333333333333, x1, 1568, x2)
+
+inst_484:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999a4e9e8ccc, 0xb504f332, 0x6666666666666666, x1, 1576, x2)
+
+inst_485:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x16a09e665, 0xb504f332, -0xb504f333, x1, 1584, x2)
+
+inst_486:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffffffffffff, 0xb504f332, 0xb504f333, x1, 1592, x2)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f330, 0xb504f332, 0x2, x1, 1600, x2)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab5faf9dde, 0xb504f332, 0x5555555555555554, x1, 1608, x2)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f332, 0xb504f332, 0x0, x1, 1616, x2)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f32e, 0xb504f332, 0x4, x1, 1624, x2)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccd81d1c000, 0xb504f332, 0x3333333333333332, x1, 1632, x2)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999a4e9e8ccd, 0xb504f332, 0x6666666666666665, x1, 1640, x2)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0xb504f332, 0xb504f332, x1, 1648, x2)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab5faf9ddc, 0xb504f332, 0x5555555555555556, x1, 1656, x2)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x555555560a5a4887, 0xb504f332, -0x5555555555555555, x1, 1664, x2)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f32c, 0xb504f332, 0x6, x1, 1672, x2)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccd81d1bffe, 0xb504f332, 0x3333333333333334, x1, 1680, x2)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999a4e9e8ccb, 0xb504f332, 0x6666666666666667, x1, 1688, x2)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x16a09e664, 0xb504f332, -0xb504f332, x1, 1696, x2)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffe, 0xb504f332, 0xb504f334, x1, 1704, x2)
+
+inst_501:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555553, 0x5555555555555556, 0x3, x1, 1712, x2)
+
+inst_502:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x5555555555555556, 0x5555555555555555, x1, 1720, x2)
+
+inst_503:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaac, 0x5555555555555556, -0x5555555555555556, x1, 1728, x2)
+
+inst_504:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555551, 0x5555555555555556, 0x5, x1, 1736, x2)
+
+inst_505:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0x2222222222222223, 0x5555555555555556, 0x3333333333333333, x1, 1744, x2)
+
+inst_506:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeeeeeeeeef0, 0x5555555555555556, 0x6666666666666666, x1, 1752, x2)
+
+inst_507:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x555555560a5a4889, 0x5555555555555556, -0xb504f333, x1, 1760, x2)
+
+inst_508:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554a0506223, 0x5555555555555556, 0xb504f333, x1, 1768, x2)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x2, x1, 1776, x2)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x5555555555555556, 0x5555555555555554, x1, 1784, x2)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x0, x1, 1792, x2)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555552, 0x5555555555555556, 0x4, x1, 1800, x2)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0x2222222222222224, 0x5555555555555556, 0x3333333333333332, x1, 1808, x2)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeeeeeeeeef1, 0x5555555555555556, 0x6666666666666665, x1, 1816, x2)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554a0506224, 0x5555555555555556, 0xb504f332, x1, 1824, x2)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x5555555555555556, 0x5555555555555556, x1, 1832, x2)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaab, 0x5555555555555556, -0x5555555555555555, x1, 1840, x2)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555550, 0x5555555555555556, 0x6, x1, 1848, x2)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0x2222222222222222, 0x5555555555555556, 0x3333333333333334, x1, 1856, x2)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0xeeeeeeeeeeeeeeef, 0x5555555555555556, 0x6666666666666667, x1, 1864, x2)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x555555560a5a4888, 0x5555555555555556, -0xb504f332, x1, 1872, x2)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554a0506222, 0x5555555555555556, 0xb504f334, x1, 1880, x2)
+
+inst_523:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaa8, -0x5555555555555555, 0x3, x1, 1888, x2)
+
+inst_524:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555556, -0x5555555555555555, 0x5555555555555555, x1, 1896, x2)
+
+inst_525:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x1, -0x5555555555555555, -0x5555555555555556, x1, 1904, x2)
+
+inst_526:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaa6, -0x5555555555555555, 0x5, x1, 1912, x2)
+
+inst_527:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0x7777777777777778, -0x5555555555555555, 0x3333333333333333, x1, 1920, x2)
+
+inst_528:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x4444444444444445, -0x5555555555555555, 0x6666666666666666, x1, 1928, x2)
+
+inst_529:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab5faf9dde, -0x5555555555555555, -0xb504f333, x1, 1936, x2)
+
+inst_530:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9f5a5b778, -0x5555555555555555, 0xb504f333, x1, 1944, x2)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaa9, -0x5555555555555555, 0x2, x1, 1952, x2)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555557, -0x5555555555555555, 0x5555555555555554, x1, 1960, x2)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x0, x1, 1968, x2)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaa7, -0x5555555555555555, 0x4, x1, 1976, x2)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0x7777777777777779, -0x5555555555555555, 0x3333333333333332, x1, 1984, x2)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x4444444444444446, -0x5555555555555555, 0x6666666666666665, x1, 1992, x2)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9f5a5b779, -0x5555555555555555, 0xb504f332, x1, 2000, x2)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555555, -0x5555555555555555, 0x5555555555555556, x1, 2008, x2)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x0, -0x5555555555555555, -0x5555555555555555, x1, 2016, x2)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaa5, -0x5555555555555555, 0x6, x1, 2024, x2)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0x7777777777777777, -0x5555555555555555, 0x3333333333333334, x1, 2032, x2)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x4444444444444444, -0x5555555555555555, 0x6666666666666667, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab5faf9ddd, -0x5555555555555555, -0xb504f332, x1, 0, x2)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9f5a5b777, -0x5555555555555555, 0xb504f334, x1, 8, x2)
+
+inst_545:
+// rs1_val==6 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x3, 0x6, 0x3, x1, 16, x2)
+
+inst_546:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaab1, 0x6, 0x5555555555555555, x1, 24, x2)
+
+inst_547:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x555555555555555c, 0x6, -0x5555555555555556, x1, 32, x2)
+
+inst_548:
+// rs1_val==6 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x6, 0x5, x1, 40, x2)
+
+inst_549:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccd3, 0x6, 0x3333333333333333, x1, 48, x2)
+
+inst_550:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x99999999999999a0, 0x6, 0x6666666666666666, x1, 56, x2)
+
+inst_551:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f339, 0x6, -0xb504f333, x1, 64, x2)
+
+inst_552:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cd3, 0x6, 0xb504f333, x1, 72, x2)
+
+inst_553:
+// rs1_val==6 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x4, 0x6, 0x2, x1, 80, x2)
+
+inst_554:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaab2, 0x6, 0x5555555555555554, x1, 88, x2)
+
+inst_555:
+// rs1_val==6 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x6, 0x6, 0x0, x1, 96, x2)
+
+inst_556:
+// rs1_val==6 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x6, 0x4, x1, 104, x2)
+
+inst_557:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccd4, 0x6, 0x3333333333333332, x1, 112, x2)
+
+inst_558:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x99999999999999a1, 0x6, 0x6666666666666665, x1, 120, x2)
+
+inst_559:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cd4, 0x6, 0xb504f332, x1, 128, x2)
+
+inst_560:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaab0, 0x6, 0x5555555555555556, x1, 136, x2)
+
+inst_561:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x555555555555555b, 0x6, -0x5555555555555555, x1, 144, x2)
+
+inst_562:
+// rs1_val==6 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x6, 0x6, x1, 152, x2)
+
+inst_563:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccd2, 0x6, 0x3333333333333334, x1, 160, x2)
+
+inst_564:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999f, 0x6, 0x6666666666666667, x1, 168, x2)
+
+inst_565:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f338, 0x6, -0xb504f332, x1, 176, x2)
+
+inst_566:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cd2, 0x6, 0xb504f334, x1, 184, x2)
+
+inst_567:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333331, 0x3333333333333334, 0x3, x1, 192, x2)
+
+inst_568:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xdddddddddddddddf, 0x3333333333333334, 0x5555555555555555, x1, 200, x2)
+
+inst_569:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x888888888888888a, 0x3333333333333334, -0x5555555555555556, x1, 208, x2)
+
+inst_570:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x333333333333332f, 0x3333333333333334, 0x5, x1, 216, x2)
+
+inst_571:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x3333333333333334, 0x3333333333333333, x1, 224, x2)
+
+inst_572:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccce, 0x3333333333333334, 0x6666666666666666, x1, 232, x2)
+
+inst_573:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x33333333e8382667, 0x3333333333333334, -0xb504f333, x1, 240, x2)
+
+inst_574:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x333333327e2e4001, 0x3333333333333334, 0xb504f333, x1, 248, x2)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333332, 0x3333333333333334, 0x2, x1, 256, x2)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xdddddddddddddde0, 0x3333333333333334, 0x5555555555555554, x1, 264, x2)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x0, x1, 272, x2)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333330, 0x3333333333333334, 0x4, x1, 280, x2)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x3333333333333334, 0x3333333333333332, x1, 288, x2)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccccccccccf, 0x3333333333333334, 0x6666666666666665, x1, 296, x2)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x333333327e2e4002, 0x3333333333333334, 0xb504f332, x1, 304, x2)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xddddddddddddddde, 0x3333333333333334, 0x5555555555555556, x1, 312, x2)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x8888888888888889, 0x3333333333333334, -0x5555555555555555, x1, 320, x2)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x333333333333332e, 0x3333333333333334, 0x6, x1, 328, x2)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x3333333333333334, 0x3333333333333334, x1, 336, x2)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccccccccccd, 0x3333333333333334, 0x6666666666666667, x1, 344, x2)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x33333333e8382666, 0x3333333333333334, -0xb504f332, x1, 352, x2)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0x333333327e2e4000, 0x3333333333333334, 0xb504f334, x1, 360, x2)
+
+inst_589:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666664, 0x6666666666666667, 0x3, x1, 368, x2)
+
+inst_590:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x1111111111111112, 0x6666666666666667, 0x5555555555555555, x1, 376, x2)
+
+inst_591:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xbbbbbbbbbbbbbbbd, 0x6666666666666667, -0x5555555555555556, x1, 384, x2)
+
+inst_592:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666662, 0x6666666666666667, 0x5, x1, 392, x2)
+
+inst_593:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333334, 0x6666666666666667, 0x3333333333333333, x1, 400, x2)
+
+inst_594:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0x6666666666666667, 0x6666666666666666, x1, 408, x2)
+
+inst_595:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x666666671b6b599a, 0x6666666666666667, -0xb504f333, x1, 416, x2)
+
+inst_596:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x66666665b1617334, 0x6666666666666667, 0xb504f333, x1, 424, x2)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666665, 0x6666666666666667, 0x2, x1, 432, x2)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0x1111111111111113, 0x6666666666666667, 0x5555555555555554, x1, 440, x2)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x0, x1, 448, x2)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666663, 0x6666666666666667, 0x4, x1, 456, x2)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333335, 0x6666666666666667, 0x3333333333333332, x1, 464, x2)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0x6666666666666667, 0x6666666666666665, x1, 472, x2)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x66666665b1617335, 0x6666666666666667, 0xb504f332, x1, 480, x2)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x1111111111111111, 0x6666666666666667, 0x5555555555555556, x1, 488, x2)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xbbbbbbbbbbbbbbbc, 0x6666666666666667, -0x5555555555555555, x1, 496, x2)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0x6666666666666661, 0x6666666666666667, 0x6, x1, 504, x2)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0x3333333333333333, 0x6666666666666667, 0x3333333333333334, x1, 512, x2)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0x6666666666666667, 0x6666666666666667, x1, 520, x2)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x666666671b6b5999, 0x6666666666666667, -0xb504f332, x1, 528, x2)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0x66666665b1617333, 0x6666666666666667, 0xb504f334, x1, 536, x2)
+
+inst_611:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0ccb, -0xb504f332, 0x3, x1, 544, x2)
+
+inst_612:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9f5a5b779, -0xb504f332, 0x5555555555555555, x1, 552, x2)
+
+inst_613:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554a0506224, -0xb504f332, -0x5555555555555556, x1, 560, x2)
+
+inst_614:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cc9, -0xb504f332, 0x5, x1, 568, x2)
+
+inst_615:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccc17c7d99b, -0xb504f332, 0x3333333333333333, x1, 576, x2)
+
+inst_616:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x99999998e494a668, -0xb504f332, 0x6666666666666666, x1, 584, x2)
+
+inst_617:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x1, -0xb504f332, -0xb504f333, x1, 592, x2)
+
+inst_618:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe95f6199b, -0xb504f332, 0xb504f333, x1, 600, x2)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0ccc, -0xb504f332, 0x2, x1, 608, x2)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9f5a5b77a, -0xb504f332, 0x5555555555555554, x1, 616, x2)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x0, x1, 624, x2)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cca, -0xb504f332, 0x4, x1, 632, x2)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccc17c7d99c, -0xb504f332, 0x3333333333333332, x1, 640, x2)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x99999998e494a669, -0xb504f332, 0x6666666666666665, x1, 648, x2)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe95f6199c, -0xb504f332, 0xb504f332, x1, 656, x2)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaa9f5a5b778, -0xb504f332, 0x5555555555555556, x1, 664, x2)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x55555554a0506223, -0xb504f332, -0x5555555555555555, x1, 672, x2)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cc8, -0xb504f332, 0x6, x1, 680, x2)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccc17c7d99a, -0xb504f332, 0x3333333333333334, x1, 688, x2)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x99999998e494a667, -0xb504f332, 0x6666666666666667, x1, 696, x2)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x0, -0xb504f332, -0xb504f332, x1, 704, x2)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffe95f6199a, -0xb504f332, 0xb504f334, x1, 712, x2)
+
+inst_633:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f331, 0xb504f334, 0x3, x1, 720, x2)
+
+inst_634:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab5faf9ddf, 0xb504f334, 0x5555555555555555, x1, 728, x2)
+
+inst_635:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0x555555560a5a488a, 0xb504f334, -0x5555555555555556, x1, 736, x2)
+
+inst_636:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f32f, 0xb504f334, 0x5, x1, 744, x2)
+
+inst_637:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccd81d1c001, 0xb504f334, 0x3333333333333333, x1, 752, x2)
+
+inst_638:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999a4e9e8cce, 0xb504f334, 0x6666666666666666, x1, 760, x2)
+
+inst_639:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x16a09e667, 0xb504f334, -0xb504f333, x1, 768, x2)
+
+inst_640:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0x1, 0xb504f334, 0xb504f333, x1, 776, x2)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f332, 0xb504f334, 0x2, x1, 784, x2)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab5faf9de0, 0xb504f334, 0x5555555555555554, x1, 792, x2)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x0
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f334, 0xb504f334, 0x0, x1, 800, x2)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f330, 0xb504f334, 0x4, x1, 808, x2)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccd81d1c002, 0xb504f334, 0x3333333333333332, x1, 816, x2)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999a4e9e8ccf, 0xb504f334, 0x6666666666666665, x1, 824, x2)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x2, 0xb504f334, 0xb504f332, x1, 832, x2)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaab5faf9dde, 0xb504f334, 0x5555555555555556, x1, 840, x2)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x555555560a5a4889, 0xb504f334, -0x5555555555555555, x1, 848, x2)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xb504f32e, 0xb504f334, 0x6, x1, 856, x2)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccd81d1c000, 0xb504f334, 0x3333333333333334, x1, 864, x2)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999a4e9e8ccd, 0xb504f334, 0x6666666666666667, x1, 872, x2)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0x16a09e666, 0xb504f334, -0xb504f332, x1, 880, x2)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f334
+TEST_RR_OP(sub, x12, x10, x11, 0x0, 0xb504f334, 0xb504f334, x1, 888, x2)
+
+inst_655:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f333
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0ccd, 0x0, 0xb504f333, x1, 896, x2)
+
+inst_656:
+// rs1_val==0 and rs2_val==2,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffe, 0x0, 0x2, x1, 904, x2)
+
+inst_657:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555554
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaac, 0x0, 0x5555555555555554, x1, 912, x2)
+
+inst_658:
+// rs1_val==0 and rs2_val==4,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffc, 0x0, 0x4, x1, 920, x2)
+
+inst_659:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333332
+TEST_RR_OP(sub, x12, x10, x11, 0xccccccccccccccce, 0x0, 0x3333333333333332, x1, 928, x2)
+
+inst_660:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666665
+TEST_RR_OP(sub, x12, x10, x11, 0x999999999999999b, 0x0, 0x6666666666666665, x1, 936, x2)
+
+inst_661:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f332
+TEST_RR_OP(sub, x12, x10, x11, 0xffffffff4afb0cce, 0x0, 0xb504f332, x1, 944, x2)
+
+inst_662:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555556
+TEST_RR_OP(sub, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x0, 0x5555555555555556, x1, 952, x2)
+
+inst_663:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x5555555555555555, 0x0, -0x5555555555555555, x1, 960, x2)
+
+inst_664:
+// rs1_val==0 and rs2_val==6,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(sub, x12, x10, x11, 0xfffffffffffffffa, 0x0, 0x6, x1, 968, x2)
+
+inst_665:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333334
+TEST_RR_OP(sub, x12, x10, x11, 0xcccccccccccccccc, 0x0, 0x3333333333333334, x1, 976, x2)
+
+inst_666:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666667
+TEST_RR_OP(sub, x12, x10, x11, 0x9999999999999999, 0x0, 0x6666666666666667, x1, 984, x2)
+
+inst_667:
+// rs1_val < 0 and rs2_val < 0, rs1_val == -576460752303423489
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:-0x5555555555555555
+TEST_RR_OP(sub, x12, x10, x11, 0x4d55555555555554, -0x800000000000001, -0x5555555555555555, x1, 992, x2)
+
+inst_668:
+// rs2_val == 32768, rs1_val == -18014398509481985
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:0x8000
+TEST_RR_OP(sub, x12, x10, x11, 0xffbfffffffff7fff, -0x40000000000001, 0x8000, x1, 1000, x2)
+
+inst_669:
+// rs2_val == 4194304, rs1_val == 35184372088832
+// opcode: sub ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:0x400000
+TEST_RR_OP(sub, x12, x10, x11, 0x1fffffc00000, 0x200000000000, 0x400000, x1, 1008, x2)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x23_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x23_1:
+ .fill 16*(XLEN/32),4,0xdeadbeef
+
+
+signature_x10_0:
+ .fill 15*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 127*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/subw-01.S b/riscof/suite/rv64i_m/I/subw-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..0ae8a9952cd0db86f09382bbeba2e538a5ac055d
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/subw-01.S
@@ -0,0 +1,3474 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the subw instruction of the RISC-V I extension for the subw covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*RV64.*I.*);def TEST_CASE_1=True;",subw)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x13, rs2==x13, rd==x15, rs1_val > 0 and rs2_val > 0, rs1_val != rs2_val, rs1_val == 140737488355328
+// opcode: subw ; op1:x13; op2:x13; dest:x15; op1val:0x800000000000; op2val:0x800000000000
+TEST_RR_OP(subw, x15, x13, x13, 0x0, 0x800000000000, 0x800000000000, x2, 0, x3)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x27, rs2==x26, rd==x26, rs1_val > 0 and rs2_val < 0, rs2_val == -17, rs1_val == 32768
+// opcode: subw ; op1:x27; op2:x26; dest:x26; op1val:0x8000; op2val:-0x11
+TEST_RR_OP(subw, x26, x27, x26, 0x8011, 0x8000, -0x11, x2, 8, x3)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x30, rs2==x30, rd==x30, rs1_val < 0 and rs2_val < 0, rs2_val == -65537
+// opcode: subw ; op1:x30; op2:x30; dest:x30; op1val:-0x4; op2val:-0x4
+TEST_RR_OP(subw, x30, x30, x30, 0x0, -0x4, -0x4, x2, 16, x3)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x25, rs2==x17, rd==x13, rs1_val < 0 and rs2_val > 0, rs2_val == 562949953421312
+// opcode: subw ; op1:x25; op2:x17; dest:x13; op1val:-0xb504f332; op2val:0x2000000000000
+TEST_RR_OP(subw, x13, x25, x17, 0x4afb0cce, -0xb504f332, 0x2000000000000, x2, 24, x3)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x0, rs2==x16, rd==x0, rs1_val == rs2_val, rs2_val == -33, rs1_val == -33
+// opcode: subw ; op1:x0; op2:x16; dest:x0; op1val:0x0; op2val:-0x21
+TEST_RR_OP(subw, x0, x0, x16, 0, 0x0, -0x21, x2, 32, x3)
+
+inst_5:
+// rs1==x8, rs2==x21, rd==x31, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, rs1_val == 33554432
+// opcode: subw ; op1:x8; op2:x21; dest:x31; op1val:0x2000000; op2val:-0x8000000000000000
+TEST_RR_OP(subw, x31, x8, x21, 0x2000000, 0x2000000, -0x8000000000000000, x2, 40, x3)
+
+inst_6:
+// rs1==x21, rs2==x11, rd==x18, rs2_val == 0, rs1_val==3 and rs2_val==0
+// opcode: subw ; op1:x21; op2:x11; dest:x18; op1val:0x3; op2val:0x0
+TEST_RR_OP(subw, x18, x21, x11, 0x3, 0x3, 0x0, x2, 48, x3)
+
+inst_7:
+// rs1==x23, rs2==x5, rd==x19, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807
+// opcode: subw ; op1:x23; op2:x5; dest:x19; op1val:0x5; op2val:0x7fffffffffffffff
+TEST_RR_OP(subw, x19, x23, x5, 0x6, 0x5, 0x7fffffffffffffff, x2, 56, x3)
+
+inst_8:
+// rs1==x1, rs2==x24, rd==x20, rs2_val == 1, rs1_val == 0
+// opcode: subw ; op1:x1; op2:x24; dest:x20; op1val:0x0; op2val:0x1
+TEST_RR_OP(subw, x20, x1, x24, -0x1, 0x0, 0x1, x2, 64, x3)
+
+inst_9:
+// rs1==x26, rs2==x4, rd==x14, rs1_val == (-2**(xlen-1)), rs2_val == 4096, rs1_val == -9223372036854775808
+// opcode: subw ; op1:x26; op2:x4; dest:x14; op1val:-0x8000000000000000; op2val:0x1000
+TEST_RR_OP(subw, x14, x26, x4, -0x1000, -0x8000000000000000, 0x1000, x2, 72, x3)
+
+inst_10:
+// rs1==x7, rs2==x9, rd==x12, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, rs2_val == -257
+// opcode: subw ; op1:x7; op2:x9; dest:x12; op1val:0x7fffffffffffffff; op2val:-0x101
+TEST_RR_OP(subw, x12, x7, x9, 0x100, 0x7fffffffffffffff, -0x101, x2, 80, x3)
+
+inst_11:
+// rs1==x22, rs2==x12, rd==x21, rs1_val == 1, rs2_val == 4503599627370496
+// opcode: subw ; op1:x22; op2:x12; dest:x21; op1val:0x1; op2val:0x10000000000000
+TEST_RR_OP(subw, x21, x22, x12, 0x1, 0x1, 0x10000000000000, x2, 88, x3)
+
+inst_12:
+// rs1==x12, rs2==x6, rd==x11, rs2_val == 2, rs1_val == -35184372088833
+// opcode: subw ; op1:x12; op2:x6; dest:x11; op1val:-0x200000000001; op2val:0x2
+TEST_RR_OP(subw, x11, x12, x6, -0x3, -0x200000000001, 0x2, x2, 96, x3)
+
+inst_13:
+// rs1==x24, rs2==x27, rd==x6, rs2_val == 4, rs1_val == 128
+// opcode: subw ; op1:x24; op2:x27; dest:x6; op1val:0x80; op2val:0x4
+TEST_RR_OP(subw, x6, x24, x27, 0x7c, 0x80, 0x4, x2, 104, x3)
+
+inst_14:
+// rs1==x20, rs2==x14, rd==x5, rs2_val == 8, rs1_val == -70368744177665
+// opcode: subw ; op1:x20; op2:x14; dest:x5; op1val:-0x400000000001; op2val:0x8
+TEST_RR_OP(subw, x5, x20, x14, -0x9, -0x400000000001, 0x8, x2, 112, x3)
+
+inst_15:
+// rs1==x16, rs2==x8, rd==x1, rs2_val == 16,
+// opcode: subw ; op1:x16; op2:x8; dest:x1; op1val:0x7fffffffffffffff; op2val:0x10
+TEST_RR_OP(subw, x1, x16, x8, -0x11, 0x7fffffffffffffff, 0x10, x2, 120, x3)
+
+inst_16:
+// rs1==x5, rs2==x7, rd==x10, rs2_val == 32, rs1_val == -576460752303423489
+// opcode: subw ; op1:x5; op2:x7; dest:x10; op1val:-0x800000000000001; op2val:0x20
+TEST_RR_OP(subw, x10, x5, x7, -0x21, -0x800000000000001, 0x20, x2, 128, x3)
+
+inst_17:
+// rs1==x17, rs2==x29, rd==x25, rs2_val == 64,
+// opcode: subw ; op1:x17; op2:x29; dest:x25; op1val:-0xb504f333; op2val:0x40
+TEST_RR_OP(subw, x25, x17, x29, 0x4afb0c8d, -0xb504f333, 0x40, x2, 136, x13)
+RVTEST_SIGBASE( x5,signature_x5_0)
+
+inst_18:
+// rs1==x15, rs2==x1, rd==x8, rs2_val == 128, rs1_val == -262145
+// opcode: subw ; op1:x15; op2:x1; dest:x8; op1val:-0x40001; op2val:0x80
+TEST_RR_OP(subw, x8, x15, x1, -0x40081, -0x40001, 0x80, x5, 0, x13)
+
+inst_19:
+// rs1==x18, rs2==x23, rd==x7, rs2_val == 256, rs1_val == -68719476737
+// opcode: subw ; op1:x18; op2:x23; dest:x7; op1val:-0x1000000001; op2val:0x100
+TEST_RR_OP(subw, x7, x18, x23, -0x101, -0x1000000001, 0x100, x5, 8, x13)
+
+inst_20:
+// rs1==x10, rs2==x3, rd==x16, rs2_val == 512, rs1_val == -33554433
+// opcode: subw ; op1:x10; op2:x3; dest:x16; op1val:-0x2000001; op2val:0x200
+TEST_RR_OP(subw, x16, x10, x3, -0x2000201, -0x2000001, 0x200, x5, 16, x13)
+
+inst_21:
+// rs1==x29, rs2==x22, rd==x4, rs2_val == 1024, rs1_val == 4096
+// opcode: subw ; op1:x29; op2:x22; dest:x4; op1val:0x1000; op2val:0x400
+TEST_RR_OP(subw, x4, x29, x22, 0xc00, 0x1000, 0x400, x5, 24, x13)
+
+inst_22:
+// rs1==x11, rs2==x10, rd==x17, rs2_val == 2048, rs1_val == -268435457
+// opcode: subw ; op1:x11; op2:x10; dest:x17; op1val:-0x10000001; op2val:0x800
+TEST_RR_OP(subw, x17, x11, x10, -0x10000801, -0x10000001, 0x800, x5, 32, x13)
+
+inst_23:
+// rs1==x31, rs2==x18, rd==x2, rs2_val == 8192, rs1_val == 8796093022208
+// opcode: subw ; op1:x31; op2:x18; dest:x2; op1val:0x80000000000; op2val:0x2000
+TEST_RR_OP(subw, x2, x31, x18, -0x2000, 0x80000000000, 0x2000, x5, 40, x13)
+
+inst_24:
+// rs1==x19, rs2==x15, rd==x3, rs2_val == 16384, rs1_val == 2
+// opcode: subw ; op1:x19; op2:x15; dest:x3; op1val:0x2; op2val:0x4000
+TEST_RR_OP(subw, x3, x19, x15, -0x3ffe, 0x2, 0x4000, x5, 48, x13)
+
+inst_25:
+// rs1==x6, rs2==x25, rd==x28, rs2_val == 32768, rs1_val == -288230376151711745
+// opcode: subw ; op1:x6; op2:x25; dest:x28; op1val:-0x400000000000001; op2val:0x8000
+TEST_RR_OP(subw, x28, x6, x25, -0x8001, -0x400000000000001, 0x8000, x5, 56, x13)
+
+inst_26:
+// rs1==x3, rs2==x28, rd==x9, rs2_val == 65536, rs1_val == -9007199254740993
+// opcode: subw ; op1:x3; op2:x28; dest:x9; op1val:-0x20000000000001; op2val:0x10000
+TEST_RR_OP(subw, x9, x3, x28, -0x10001, -0x20000000000001, 0x10000, x5, 64, x13)
+
+inst_27:
+// rs1==x2, rs2==x0, rd==x22, rs2_val == 131072,
+// opcode: subw ; op1:x2; op2:x0; dest:x22; op1val:0x3333333333333332; op2val:0x0
+TEST_RR_OP(subw, x22, x2, x0, 0x33333332, 0x3333333333333332, 0x0, x5, 72, x13)
+
+inst_28:
+// rs1==x14, rs2==x20, rd==x29, rs2_val == 262144, rs1_val == 2147483648
+// opcode: subw ; op1:x14; op2:x20; dest:x29; op1val:0x80000000; op2val:0x40000
+TEST_RR_OP(subw, x29, x14, x20, 0x7ffc0000, 0x80000000, 0x40000, x5, 80, x13)
+
+inst_29:
+// rs1==x28, rs2==x31, rd==x23, rs2_val == 524288, rs1_val == 268435456
+// opcode: subw ; op1:x28; op2:x31; dest:x23; op1val:0x10000000; op2val:0x80000
+TEST_RR_OP(subw, x23, x28, x31, 0xff80000, 0x10000000, 0x80000, x5, 88, x13)
+
+inst_30:
+// rs1==x9, rs2==x19, rd==x24, rs2_val == 1048576,
+// opcode: subw ; op1:x9; op2:x19; dest:x24; op1val:0x1; op2val:0x100000
+TEST_RR_OP(subw, x24, x9, x19, -0xfffff, 0x1, 0x100000, x5, 96, x13)
+
+inst_31:
+// rs1==x4, rs2==x2, rd==x27, rs2_val == 2097152, rs1_val == 17592186044416
+// opcode: subw ; op1:x4; op2:x2; dest:x27; op1val:0x100000000000; op2val:0x200000
+TEST_RR_OP(subw, x27, x4, x2, -0x200000, 0x100000000000, 0x200000, x5, 104, x13)
+
+inst_32:
+// rs2_val == 4194304, rs1_val == 262144
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0x400000
+TEST_RR_OP(subw, x12, x10, x11, -0x3c0000, 0x40000, 0x400000, x5, 112, x13)
+
+inst_33:
+// rs2_val == 8388608, rs1_val == -513
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x800000
+TEST_RR_OP(subw, x12, x10, x11, -0x800201, -0x201, 0x800000, x5, 120, x13)
+
+inst_34:
+// rs2_val == 16777216,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:0x1000000
+TEST_RR_OP(subw, x12, x10, x11, -0x1000000, 0x800000000000, 0x1000000, x5, 128, x13)
+
+inst_35:
+// rs2_val == 33554432, rs1_val == -2147483649
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:0x2000000
+TEST_RR_OP(subw, x12, x10, x11, 0x7dffffff, -0x80000001, 0x2000000, x5, 136, x13)
+
+inst_36:
+// rs2_val == 67108864,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xa; op2val:0x4000000
+TEST_RR_OP(subw, x12, x10, x11, -0x400000a, -0xa, 0x4000000, x5, 144, x13)
+
+inst_37:
+// rs2_val == 134217728, rs1_val == -137438953473
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:0x8000000
+TEST_RR_OP(subw, x12, x10, x11, -0x8000001, -0x2000000001, 0x8000000, x5, 152, x13)
+
+inst_38:
+// rs2_val == 268435456, rs1_val == -17179869185
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:0x10000000
+TEST_RR_OP(subw, x12, x10, x11, -0x10000001, -0x400000001, 0x10000000, x5, 160, x13)
+
+inst_39:
+// rs2_val == 536870912, rs1_val == 16777216
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:0x20000000
+TEST_RR_OP(subw, x12, x10, x11, -0x1f000000, 0x1000000, 0x20000000, x5, 168, x13)
+
+inst_40:
+// rs2_val == 1073741824,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x40000000
+TEST_RR_OP(subw, x12, x10, x11, -0x40000000, 0x0, 0x40000000, x5, 176, x13)
+
+inst_41:
+// rs2_val == 2147483648, rs1_val == -524289
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x80000000
+TEST_RR_OP(subw, x12, x10, x11, 0x7ff7ffff, -0x80001, 0x80000000, x5, 184, x13)
+
+inst_42:
+// rs2_val == 4294967296,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x100000000
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0ccd, -0xb504f333, 0x100000000, x5, 192, x13)
+
+inst_43:
+// rs2_val == 8589934592, rs1_val == 17179869184
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:0x200000000
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x400000000, 0x200000000, x5, 200, x13)
+
+inst_44:
+// rs2_val == 17179869184, rs1_val == 70368744177664
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:0x400000000
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x400000000000, 0x400000000, x5, 208, x13)
+
+inst_45:
+// rs2_val == 34359738368,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:0x800000000
+TEST_RR_OP(subw, x12, x10, x11, -0x1, -0x2000000001, 0x800000000, x5, 216, x13)
+
+inst_46:
+// rs2_val == 68719476736, rs1_val == -144115188075855873
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:0x1000000000
+TEST_RR_OP(subw, x12, x10, x11, -0x1, -0x200000000000001, 0x1000000000, x5, 224, x13)
+
+inst_47:
+// rs2_val == 137438953472,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0x2000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x80, 0x80, 0x2000000000, x5, 232, x13)
+
+inst_48:
+// rs2_val == 274877906944, rs1_val == 549755813888
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:0x4000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x8000000000, 0x4000000000, x5, 240, x13)
+
+inst_49:
+// rs2_val == 549755813888,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:0x8000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x100000000000, 0x8000000000, x5, 248, x13)
+
+inst_50:
+// rs2_val == 1099511627776, rs1_val == -17592186044417
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:0x10000000000
+TEST_RR_OP(subw, x12, x10, x11, -0x1, -0x100000000001, 0x10000000000, x5, 256, x13)
+
+inst_51:
+// rs2_val == 2199023255552,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x20000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x66666666, 0x6666666666666666, 0x20000000000, x5, 264, x13)
+
+inst_52:
+// rs2_val == 4398046511104,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0x40000000000
+TEST_RR_OP(subw, x12, x10, x11, -0x80000000, 0x80000000, 0x40000000000, x5, 272, x13)
+
+inst_53:
+// rs2_val == 8796093022208,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x80000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x2, 0x2, 0x80000000000, x5, 280, x13)
+
+inst_54:
+// rs2_val == 17592186044416, rs1_val == -2049
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x100000000000
+TEST_RR_OP(subw, x12, x10, x11, -0x801, -0x801, 0x100000000000, x5, 288, x13)
+
+inst_55:
+// rs2_val == 35184372088832, rs1_val == 4
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x200000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x4, 0x4, 0x200000000000, x5, 296, x13)
+
+inst_56:
+// rs2_val == 70368744177664,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x400000000000
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cce, 0xb504f332, 0x400000000000, x5, 304, x13)
+
+inst_57:
+// rs2_val == 140737488355328,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x800000000000
+TEST_RR_OP(subw, x12, x10, x11, -0x201, -0x201, 0x800000000000, x5, 312, x13)
+
+inst_58:
+// rs2_val == 281474976710656, rs1_val == 2199023255552
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:0x1000000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x20000000000, 0x1000000000000, x5, 320, x13)
+
+inst_59:
+// rs2_val == 1125899906842624, rs1_val == -1125899906842625
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:0x4000000000000
+TEST_RR_OP(subw, x12, x10, x11, -0x1, -0x4000000000001, 0x4000000000000, x5, 328, x13)
+
+inst_60:
+// rs2_val == 2251799813685248, rs1_val == 512
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:0x8000000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x200, 0x200, 0x8000000000000, x5, 336, x13)
+
+inst_61:
+// rs2_val == 9007199254740992, rs1_val == 4294967296
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x20000000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x100000000, 0x20000000000000, x5, 344, x13)
+
+inst_62:
+// rs2_val == 18014398509481984, rs1_val == 8
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0x40000000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x8, 0x8, 0x40000000000000, x5, 352, x13)
+
+inst_63:
+// rs2_val == 36028797018963968,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x80000000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0ccd, -0xb504f333, 0x80000000000000, x5, 360, x13)
+
+inst_64:
+// rs2_val == 72057594037927936, rs1_val == 4611686018427387904
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:0x100000000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x4000000000000000, 0x100000000000000, x5, 368, x13)
+
+inst_65:
+// rs2_val == 144115188075855872, rs1_val == 6148914691236517205
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x200000000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x55555555, 0x5555555555555555, 0x200000000000000, x5, 376, x13)
+
+inst_66:
+// rs2_val == 288230376151711744,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x400000000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x6, 0x6, 0x400000000000000, x5, 384, x13)
+
+inst_67:
+// rs2_val == 576460752303423488,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x800000000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x2000000, 0x2000000, 0x800000000000000, x5, 392, x13)
+
+inst_68:
+// rs2_val == 1152921504606846976, rs1_val == 16
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x1000000000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x10, 0x10, 0x1000000000000000, x5, 400, x13)
+
+inst_69:
+// rs2_val == 2305843009213693952, rs1_val == -140737488355329
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:0x2000000000000000
+TEST_RR_OP(subw, x12, x10, x11, -0x1, -0x800000000001, 0x2000000000000000, x5, 408, x13)
+
+inst_70:
+// rs2_val == 4611686018427387904,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4000000000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x3, 0x3, 0x4000000000000000, x5, 416, x13)
+
+inst_71:
+// rs2_val == -2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000000000; op2val:-0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x2, -0x8000000000000000, -0x2, x5, 424, x13)
+
+inst_72:
+// rs2_val == -3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffffffffffff; op2val:-0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x2, 0x7fffffffffffffff, -0x3, x5, 432, x13)
+
+inst_73:
+// rs2_val == -5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:-0x5
+TEST_RR_OP(subw, x12, x10, x11, -0x7fffc, -0x80001, -0x5, x5, 440, x13)
+
+inst_74:
+// rs2_val == -9,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x9
+TEST_RR_OP(subw, x12, x10, x11, 0x3333333d, 0x3333333333333334, -0x9, x5, 448, x13)
+
+inst_75:
+// rs2_val == -65,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x41
+TEST_RR_OP(subw, x12, x10, x11, 0x666666a8, 0x6666666666666667, -0x41, x5, 456, x13)
+
+inst_76:
+// rs2_val == -129,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x7; op2val:-0x81
+TEST_RR_OP(subw, x12, x10, x11, 0x7a, -0x7, -0x81, x5, 464, x13)
+
+inst_77:
+// rs2_val == -513, rs1_val == 65536
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:-0x201
+TEST_RR_OP(subw, x12, x10, x11, 0x10201, 0x10000, -0x201, x5, 472, x13)
+
+inst_78:
+// rs2_val == -1025, rs1_val == -4194305
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:-0x401
+TEST_RR_OP(subw, x12, x10, x11, -0x3ffc00, -0x400001, -0x401, x5, 480, x13)
+
+inst_79:
+// rs2_val == -2049, rs1_val == 1152921504606846976
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:-0x801
+TEST_RR_OP(subw, x12, x10, x11, 0x801, 0x1000000000000000, -0x801, x5, 488, x13)
+
+inst_80:
+// rs2_val == -4097, rs1_val == 256
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:-0x1001
+TEST_RR_OP(subw, x12, x10, x11, 0x1101, 0x100, -0x1001, x5, 496, x13)
+
+inst_81:
+// rs2_val == -8193,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x2001
+TEST_RR_OP(subw, x12, x10, x11, 0xa001, 0x8000, -0x2001, x5, 504, x13)
+
+inst_82:
+// rs2_val == -16385, rs1_val == -129
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:-0x4001
+TEST_RR_OP(subw, x12, x10, x11, 0x3f80, -0x81, -0x4001, x5, 512, x13)
+
+inst_83:
+// rs2_val == -32769, rs1_val == 131072
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x8001
+TEST_RR_OP(subw, x12, x10, x11, 0x28001, 0x20000, -0x8001, x5, 520, x13)
+
+inst_84:
+// rs2_val == -131073, rs1_val == -131073
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:-0x20001
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0x20001, -0x20001, x5, 528, x13)
+
+inst_85:
+// rs2_val == -262145,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x40001
+TEST_RR_OP(subw, x12, x10, x11, 0x40004, 0x3, -0x40001, x5, 536, x13)
+
+inst_86:
+// rs2_val == -524289, rs1_val == -5
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:-0x80001
+TEST_RR_OP(subw, x12, x10, x11, 0x7fffc, -0x5, -0x80001, x5, 544, x13)
+
+inst_87:
+// rs2_val == -1048577, rs1_val == 2048
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x100001
+TEST_RR_OP(subw, x12, x10, x11, 0x100801, 0x800, -0x100001, x5, 552, x13)
+
+inst_88:
+// rs2_val == -2097153,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x200001
+TEST_RR_OP(subw, x12, x10, x11, 0x200004, 0x3, -0x200001, x5, 560, x13)
+
+inst_89:
+// rs2_val == -4194305,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:-0x400001
+TEST_RR_OP(subw, x12, x10, x11, 0x3fff80, -0x81, -0x400001, x5, 568, x13)
+
+inst_90:
+// rs2_val == -8388609, rs1_val == -1025
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:-0x800001
+TEST_RR_OP(subw, x12, x10, x11, 0x7ffc00, -0x401, -0x800001, x5, 576, x13)
+
+inst_91:
+// rs2_val == -16777217,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x1000001
+TEST_RR_OP(subw, x12, x10, x11, 0x34333333, 0x3333333333333332, -0x1000001, x5, 584, x13)
+
+inst_92:
+// rs2_val == -33554433, rs1_val == -1048577
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:-0x2000001
+TEST_RR_OP(subw, x12, x10, x11, 0x1f00000, -0x100001, -0x2000001, x5, 592, x13)
+
+inst_93:
+// rs2_val == -67108865,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:-0x4000001
+TEST_RR_OP(subw, x12, x10, x11, 0x4000002, 0x1, -0x4000001, x5, 600, x13)
+
+inst_94:
+// rs2_val == -134217729,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:-0x8000001
+TEST_RR_OP(subw, x12, x10, x11, 0x8000001, 0x4000000000000000, -0x8000001, x5, 608, x13)
+
+inst_95:
+// rs2_val == -268435457,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:-0x10000001
+TEST_RR_OP(subw, x12, x10, x11, 0xfffff80, -0x81, -0x10000001, x5, 616, x13)
+
+inst_96:
+// rs2_val == -536870913, rs1_val == -2
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0x20000001
+TEST_RR_OP(subw, x12, x10, x11, 0x1fffffff, -0x2, -0x20000001, x5, 624, x13)
+
+inst_97:
+// rs2_val == -1073741825,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x40000001
+TEST_RR_OP(subw, x12, x10, x11, 0x40008001, 0x8000, -0x40000001, x5, 632, x13)
+
+inst_98:
+// rs2_val == -2147483649,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x80000001
+TEST_RR_OP(subw, x12, x10, x11, 0x3504f334, 0xb504f333, -0x80000001, x5, 640, x13)
+
+inst_99:
+// rs2_val == -4294967297, rs1_val == -2251799813685249
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:-0x100000001
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0x8000000000001, -0x100000001, x5, 648, x13)
+
+inst_100:
+// rs2_val == -8589934593,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:-0x200000001
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x400000000, -0x200000001, x5, 656, x13)
+
+inst_101:
+// rs2_val == -17179869185, rs1_val == 536870912
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:-0x400000001
+TEST_RR_OP(subw, x12, x10, x11, 0x20000001, 0x20000000, -0x400000001, x5, 664, x13)
+
+inst_102:
+// rs2_val == -34359738369,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x800000001
+TEST_RR_OP(subw, x12, x10, x11, 0x33333334, 0x3333333333333333, -0x800000001, x5, 672, x13)
+
+inst_103:
+// rs2_val == -68719476737, rs1_val == -562949953421313
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:-0x1000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0x2000000000001, -0x1000000001, x5, 680, x13)
+
+inst_104:
+// rs2_val == -137438953473, rs1_val == -65537
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x2000000001
+TEST_RR_OP(subw, x12, x10, x11, -0x10000, -0x10001, -0x2000000001, x5, 688, x13)
+
+inst_105:
+// rs2_val == -274877906945, rs1_val == -34359738369
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:-0x4000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0x800000001, -0x4000000001, x5, 696, x13)
+
+inst_106:
+// rs2_val == -549755813889,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x9; op2val:-0x8000000001
+TEST_RR_OP(subw, x12, x10, x11, 0xa, 0x9, -0x8000000001, x5, 704, x13)
+
+inst_107:
+// rs2_val == -1099511627777,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xa; op2val:-0x10000000001
+TEST_RR_OP(subw, x12, x10, x11, -0x9, -0xa, -0x10000000001, x5, 712, x13)
+
+inst_108:
+// rs2_val == -2199023255553, rs1_val == 576460752303423488
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:-0x20000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x800000000000000, -0x20000000001, x5, 720, x13)
+
+inst_109:
+// rs2_val == -4398046511105,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:-0x40000000001
+TEST_RR_OP(subw, x12, x10, x11, -0x400000, -0x400001, -0x40000000001, x5, 728, x13)
+
+inst_110:
+// rs2_val == -8796093022209,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x80000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x3, 0x2, -0x80000000001, x5, 736, x13)
+
+inst_111:
+// rs2_val == -17592186044417,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:-0x100000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x100000000000, -0x100000000001, x5, 744, x13)
+
+inst_112:
+// rs2_val == -35184372088833, rs1_val == 8388608
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:-0x200000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x800001, 0x800000, -0x200000000001, x5, 752, x13)
+
+inst_113:
+// rs2_val == -70368744177665,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x400000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x0, -0x400000000001, x5, 760, x13)
+
+inst_114:
+// rs2_val == -140737488355329,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:-0x800000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0x20000000000001, -0x800000000001, x5, 768, x13)
+
+inst_115:
+// rs2_val == -281474976710657,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x1; op2val:-0x1000000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0x1, -0x1000000000001, x5, 776, x13)
+
+inst_116:
+// rs2_val == -562949953421313,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x2000000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x55555555, 0x5555555555555554, -0x2000000000001, x5, 784, x13)
+
+inst_117:
+// rs2_val == -1125899906842625,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x4000000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x33333335, 0x3333333333333334, -0x4000000000001, x5, 792, x13)
+
+inst_118:
+// rs2_val == -2251799813685249,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:-0x8000000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x400000000000, -0x8000000000001, x5, 800, x13)
+
+inst_119:
+// rs2_val == -4503599627370497,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x10000000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cce, -0xb504f333, -0x10000000000001, x5, 808, x13)
+
+inst_120:
+// rs2_val == -9007199254740993,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:-0x20000000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x800001, 0x800000, -0x20000000000001, x5, 816, x13)
+
+inst_121:
+// rs2_val == -18014398509481985,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x40000000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x5, 0x4, -0x40000000000001, x5, 824, x13)
+
+inst_122:
+// rs2_val == -36028797018963969,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:-0x80000000000001
+TEST_RR_OP(subw, x12, x10, x11, -0x10000000, -0x10000001, -0x80000000000001, x5, 832, x13)
+
+inst_123:
+// rs2_val == -72057594037927937,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:-0x100000000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x400000000000, -0x100000000000001, x5, 840, x13)
+
+inst_124:
+// rs2_val == -144115188075855873, rs1_val == -2097153
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:-0x200000000000001
+TEST_RR_OP(subw, x12, x10, x11, -0x200000, -0x200001, -0x200000000000001, x5, 848, x13)
+
+inst_125:
+// rs2_val == -288230376151711745,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x400000000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0ccf, -0xb504f332, -0x400000000000001, x5, 856, x13)
+
+inst_126:
+// rs2_val == -576460752303423489, rs1_val == -4503599627370497
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:-0x800000000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0x10000000000001, -0x800000000000001, x5, 864, x13)
+
+inst_127:
+// rs2_val == -1152921504606846977,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xa; op2val:-0x1000000000000001
+TEST_RR_OP(subw, x12, x10, x11, -0x9, -0xa, -0x1000000000000001, x5, 872, x13)
+
+inst_128:
+// rs2_val == -2305843009213693953,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:-0x2000000000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x100000000, -0x2000000000000001, x5, 880, x13)
+
+inst_129:
+// rs2_val == -4611686018427387905,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0x4000000000000001
+TEST_RR_OP(subw, x12, x10, x11, -0x1, -0x2, -0x4000000000000001, x5, 888, x13)
+
+inst_130:
+// rs2_val == 6148914691236517205, rs1_val == -536870913
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x75555556, -0x20000001, 0x5555555555555555, x5, 896, x13)
+
+inst_131:
+// rs2_val == -6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x55555556, 0x4000000000000000, -0x5555555555555556, x5, 904, x13)
+
+inst_132:
+// rs1_val == 32,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:-0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x26, 0x20, -0x6, x5, 912, x13)
+
+inst_133:
+// rs1_val == 64,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0x1000000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x40, 0x40, 0x1000000000000, x5, 920, x13)
+
+inst_134:
+// rs1_val == 1024,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:-0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x403, 0x400, -0x3, x5, 928, x13)
+
+inst_135:
+// rs1_val == 8192,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:-0x81
+TEST_RR_OP(subw, x12, x10, x11, 0x2081, 0x2000, -0x81, x5, 936, x13)
+
+inst_136:
+// rs1_val == 16384,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:-0x20000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x4001, 0x4000, -0x20000000001, x5, 944, x13)
+
+inst_137:
+// rs1_val == 524288,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x665e6667, 0x80000, 0x6666666666666667, x5, 952, x13)
+
+inst_138:
+// rs1_val == 1048576,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0x200000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x100000, 0x100000, 0x200000000000, x5, 960, x13)
+
+inst_139:
+// rs1_val == 2097152,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:0x1
+TEST_RR_OP(subw, x12, x10, x11, 0x1fffff, 0x200000, 0x1, x5, 968, x13)
+
+inst_140:
+// rs1_val == 4194304,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x55155555, 0x400000, 0x5555555555555555, x5, 976, x13)
+
+inst_141:
+// rs1_val == 67108864,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x4000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x4000000, 0x4000000, 0x4000000000, x5, 984, x13)
+
+inst_142:
+// rs1_val == 134217728,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:-0x9
+TEST_RR_OP(subw, x12, x10, x11, 0x8000009, 0x8000000, -0x9, x5, 992, x13)
+
+inst_143:
+// rs1_val == 1073741824,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x200
+TEST_RR_OP(subw, x12, x10, x11, 0x3ffffe00, 0x40000000, 0x200, x5, 1000, x13)
+
+inst_144:
+// rs1_val == 8589934592,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:0x7
+TEST_RR_OP(subw, x12, x10, x11, -0x7, 0x200000000, 0x7, x5, 1008, x13)
+
+inst_145:
+// rs1_val == 34359738368,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:0x10000000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x800000000, 0x10000000000000, x5, 1016, x13)
+
+inst_146:
+// rs1_val == 68719476736,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x55555555, 0x1000000000, -0x5555555555555555, x5, 1024, x13)
+
+inst_147:
+// rs1_val == 137438953472,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:0x7
+TEST_RR_OP(subw, x12, x10, x11, -0x7, 0x2000000000, 0x7, x5, 1032, x13)
+
+inst_148:
+// rs1_val == 274877906944,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000; op2val:0x400
+TEST_RR_OP(subw, x12, x10, x11, -0x400, 0x4000000000, 0x400, x5, 1040, x13)
+
+inst_149:
+// rs1_val == 1099511627776,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x20
+TEST_RR_OP(subw, x12, x10, x11, -0x20, 0x10000000000, 0x20, x5, 1048, x13)
+
+inst_150:
+// rs1_val == 4398046511104,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:-0x20000001
+TEST_RR_OP(subw, x12, x10, x11, 0x20000001, 0x40000000000, -0x20000001, x5, 1056, x13)
+
+inst_151:
+// rs1_val == 35184372088832,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:-0x41
+TEST_RR_OP(subw, x12, x10, x11, 0x41, 0x200000000000, -0x41, x5, 1064, x13)
+
+inst_152:
+// rs1_val == 281474976710656,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:-0x4000000000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x1000000000000, -0x4000000000000001, x5, 1072, x13)
+
+inst_153:
+// rs1_val == 562949953421312,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:-0x401
+TEST_RR_OP(subw, x12, x10, x11, 0x401, 0x2000000000000, -0x401, x5, 1080, x13)
+
+inst_154:
+// rs1_val == 1125899906842624,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:-0x40000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x4000000000000, -0x40000000001, x5, 1088, x13)
+
+inst_155:
+// rs1_val == 2251799813685248,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x66666667, 0x8000000000000, 0x6666666666666667, x5, 1096, x13)
+
+inst_156:
+// rs1_val == 4503599627370496,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:0x40000000
+TEST_RR_OP(subw, x12, x10, x11, -0x40000000, 0x10000000000000, 0x40000000, x5, 1104, x13)
+
+inst_157:
+// rs1_val == 9007199254740992,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:-0x9
+TEST_RR_OP(subw, x12, x10, x11, 0x9, 0x20000000000000, -0x9, x5, 1112, x13)
+
+inst_158:
+// rs1_val == 18014398509481984,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:0x40000000000
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x40000000000000, 0x40000000000, x5, 1120, x13)
+
+inst_159:
+// rs1_val == 36028797018963968,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:-0x400000000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x80000000000000, -0x400000000000001, x5, 1128, x13)
+
+inst_160:
+// rs1_val == 72057594037927936,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:0x40
+TEST_RR_OP(subw, x12, x10, x11, -0x40, 0x100000000000000, 0x40, x5, 1136, x13)
+
+inst_161:
+// rs1_val == 144115188075855872,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:-0x100001
+TEST_RR_OP(subw, x12, x10, x11, 0x100001, 0x200000000000000, -0x100001, x5, 1144, x13)
+
+inst_162:
+// rs1_val == 288230376151711744,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x66666665, 0x400000000000000, 0x6666666666666665, x5, 1152, x13)
+
+inst_163:
+// rs1_val == 2305843009213693952,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:-0x7
+TEST_RR_OP(subw, x12, x10, x11, 0x7, 0x2000000000000000, -0x7, x5, 1160, x13)
+
+inst_164:
+// rs1_val == -3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0x100000000001
+TEST_RR_OP(subw, x12, x10, x11, -0x2, -0x3, -0x100000000001, x5, 1168, x13)
+
+inst_165:
+// rs1_val == -9,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:0x100000
+TEST_RR_OP(subw, x12, x10, x11, -0x100009, -0x9, 0x100000, x5, 1176, x13)
+
+inst_166:
+// rs1_val == -17,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:0x40000
+TEST_RR_OP(subw, x12, x10, x11, -0x40011, -0x11, 0x40000, x5, 1184, x13)
+
+inst_167:
+// rs1_val == -65,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:-0x8001
+TEST_RR_OP(subw, x12, x10, x11, 0x7fc0, -0x41, -0x8001, x5, 1192, x13)
+
+inst_168:
+// rs1_val == -257,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:-0x2000000000000001
+TEST_RR_OP(subw, x12, x10, x11, -0x100, -0x101, -0x2000000000000001, x5, 1200, x13)
+
+inst_169:
+// rs1_val == -4097,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x20
+TEST_RR_OP(subw, x12, x10, x11, -0x1021, -0x1001, 0x20, x5, 1208, x13)
+
+inst_170:
+// rs1_val == -8193,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x1000000
+TEST_RR_OP(subw, x12, x10, x11, -0x1002001, -0x2001, 0x1000000, x5, 1216, x13)
+
+inst_171:
+// rs1_val == -16385,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:-0x10001
+TEST_RR_OP(subw, x12, x10, x11, 0xc000, -0x4001, -0x10001, x5, 1224, x13)
+
+inst_172:
+// rs1_val == -32769,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x2000000
+TEST_RR_OP(subw, x12, x10, x11, -0x2008001, -0x8001, 0x2000000, x5, 1232, x13)
+
+inst_173:
+// rs1_val == -8388609,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:-0x800000001
+TEST_RR_OP(subw, x12, x10, x11, -0x800000, -0x800001, -0x800000001, x5, 1240, x13)
+
+inst_174:
+// rs1_val == -16777217,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:-0x2000000000001
+TEST_RR_OP(subw, x12, x10, x11, -0x1000000, -0x1000001, -0x2000000000001, x5, 1248, x13)
+
+inst_175:
+// rs1_val == -67108865,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:-0x100001
+TEST_RR_OP(subw, x12, x10, x11, -0x3f00000, -0x4000001, -0x100001, x5, 1256, x13)
+
+inst_176:
+// rs1_val == -134217729,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x8000000000000
+TEST_RR_OP(subw, x12, x10, x11, -0x8000001, -0x8000001, 0x8000000000000, x5, 1264, x13)
+
+inst_177:
+// rs1_val == -1073741825,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:-0x800000001
+TEST_RR_OP(subw, x12, x10, x11, -0x40000000, -0x40000001, -0x800000001, x5, 1272, x13)
+
+inst_178:
+// rs1_val == -4294967297,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:-0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x3, -0x100000001, -0x4, x5, 1280, x13)
+
+inst_179:
+// rs1_val == -8589934593,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:-0x4000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0x200000001, -0x4000000001, x5, 1288, x13)
+
+inst_180:
+// rs1_val == -274877906945,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, -0x5, -0x4000000001, 0x4, x5, 1296, x13)
+
+inst_181:
+// rs1_val == -549755813889,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0ccb, -0x8000000001, 0xb504f334, x5, 1304, x13)
+
+inst_182:
+// rs1_val == -1099511627777,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:-0x20000000001
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0x10000000001, -0x20000000001, x5, 1312, x13)
+
+inst_183:
+// rs1_val == -2199023255553,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:0x80000000000
+TEST_RR_OP(subw, x12, x10, x11, -0x1, -0x20000000001, 0x80000000000, x5, 1320, x13)
+
+inst_184:
+// rs1_val == -4398046511105,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0ccb, -0x40000000001, 0xb504f334, x5, 1328, x13)
+
+inst_185:
+// rs1_val == -8796093022209,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:0x2000000000
+TEST_RR_OP(subw, x12, x10, x11, -0x1, -0x80000000001, 0x2000000000, x5, 1336, x13)
+
+inst_186:
+// rs1_val == -281474976710657,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x55555554, -0x1000000000001, -0x5555555555555555, x5, 1344, x13)
+
+inst_187:
+// rs1_val == -18014398509481985,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:0x80000000000000
+TEST_RR_OP(subw, x12, x10, x11, -0x1, -0x40000000000001, 0x80000000000000, x5, 1352, x13)
+
+inst_188:
+// rs1_val == -36028797018963969,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:-0x4000000000000000
+TEST_RR_OP(subw, x12, x10, x11, -0x1, -0x80000000000001, -0x4000000000000000, x5, 1360, x13)
+
+inst_189:
+// rs1_val == -72057594037927937,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, -0x6, -0x100000000000001, 0x5, x5, 1368, x13)
+
+inst_190:
+// rs1_val == -1152921504606846977,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:-0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x4, -0x1000000000000001, -0x5, x5, 1376, x13)
+
+inst_191:
+// rs1_val == -2305843009213693953,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:-0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x5, -0x2000000000000001, -0x6, x5, 1384, x13)
+
+inst_192:
+// rs1_val == -4611686018427387905,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:-0x4001
+TEST_RR_OP(subw, x12, x10, x11, 0x4000, -0x4000000000000001, -0x4001, x5, 1392, x13)
+
+inst_193:
+// rs1_val == -6148914691236517206, rs1_val==-6148914691236517206 and rs2_val==0
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, -0x55555556, -0x5555555555555556, 0x0, x5, 1400, x13)
+
+inst_194:
+// rs1_val==3 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x3, 0x3, x5, 1408, x13)
+
+inst_195:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x55555552, 0x3, 0x5555555555555555, x5, 1416, x13)
+
+inst_196:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x55555559, 0x3, -0x5555555555555556, x5, 1424, x13)
+
+inst_197:
+// rs1_val==3 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, -0x2, 0x3, 0x5, x5, 1432, x13)
+
+inst_198:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, -0x33333330, 0x3, 0x3333333333333333, x5, 1440, x13)
+
+inst_199:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x66666663, 0x3, 0x6666666666666666, x5, 1448, x13)
+
+inst_200:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cca, 0x3, -0xb504f333, x5, 1456, x13)
+
+inst_201:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cd0, 0x3, 0xb504f333, x5, 1464, x13)
+
+inst_202:
+// rs1_val==3 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x3, 0x2, x5, 1472, x13)
+
+inst_203:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, -0x55555551, 0x3, 0x5555555555555554, x5, 1480, x13)
+
+inst_204:
+// rs1_val==3 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, -0x1, 0x3, 0x4, x5, 1488, x13)
+
+inst_205:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, -0x3333332f, 0x3, 0x3333333333333332, x5, 1496, x13)
+
+inst_206:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x66666662, 0x3, 0x6666666666666665, x5, 1504, x13)
+
+inst_207:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cd1, 0x3, 0xb504f332, x5, 1512, x13)
+
+inst_208:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x55555553, 0x3, 0x5555555555555556, x5, 1520, x13)
+
+inst_209:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x55555558, 0x3, -0x5555555555555555, x5, 1528, x13)
+
+inst_210:
+// rs1_val==3 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, -0x3, 0x3, 0x6, x5, 1536, x13)
+
+inst_211:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, -0x33333331, 0x3, 0x3333333333333334, x5, 1544, x13)
+
+inst_212:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x66666664, 0x3, 0x6666666666666667, x5, 1552, x13)
+
+inst_213:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0ccb, 0x3, -0xb504f332, x5, 1560, x13)
+
+inst_214:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0ccf, 0x3, 0xb504f334, x5, 1568, x13)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x55555552, 0x5555555555555555, 0x3, x5, 1576, x13)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x5555555555555555, 0x5555555555555555, x5, 1584, x13)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x55555555, 0x5555555555555555, -0x5555555555555556, x5, 1592, x13)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x55555550, 0x5555555555555555, 0x5, x5, 1600, x13)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, 0x22222222, 0x5555555555555555, 0x3333333333333333, x5, 1608, x13)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x11111111, 0x5555555555555555, 0x6666666666666666, x5, 1616, x13)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0xa5a4888, 0x5555555555555555, -0xb504f333, x5, 1624, x13)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x5faf9dde, 0x5555555555555555, 0xb504f333, x5, 1632, x13)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x55555553, 0x5555555555555555, 0x2, x5, 1640, x13)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x5555555555555555, 0x5555555555555554, x5, 1648, x13)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x55555555, 0x5555555555555555, 0x0, x5, 1656, x13)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x55555551, 0x5555555555555555, 0x4, x5, 1664, x13)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, 0x22222223, 0x5555555555555555, 0x3333333333333332, x5, 1672, x13)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x11111110, 0x5555555555555555, 0x6666666666666665, x5, 1680, x13)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x5faf9ddd, 0x5555555555555555, 0xb504f332, x5, 1688, x13)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x1, 0x5555555555555555, 0x5555555555555556, x5, 1696, x13)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x55555556, 0x5555555555555555, -0x5555555555555555, x5, 1704, x13)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x5555554f, 0x5555555555555555, 0x6, x5, 1712, x13)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, 0x22222221, 0x5555555555555555, 0x3333333333333334, x5, 1720, x13)
+
+inst_234:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x11111112, 0x5555555555555555, 0x6666666666666667, x5, 1728, x13)
+
+inst_235:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0xa5a4887, 0x5555555555555555, -0xb504f332, x5, 1736, x13)
+
+inst_236:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, -0x5faf9ddf, 0x5555555555555555, 0xb504f334, x5, 1744, x13)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, -0x55555559, -0x5555555555555556, 0x3, x5, 1752, x13)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x55555555, -0x5555555555555556, 0x5555555555555555, x5, 1760, x13)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0x5555555555555556, -0x5555555555555556, x5, 1768, x13)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, -0x5555555b, -0x5555555555555556, 0x5, x5, 1776, x13)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, 0x77777777, -0x5555555555555556, 0x3333333333333333, x5, 1784, x13)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, 0x44444444, -0x5555555555555556, 0x6666666666666666, x5, 1792, x13)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x5faf9ddd, -0x5555555555555556, -0xb504f333, x5, 1800, x13)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0xa5a4889, -0x5555555555555556, 0xb504f333, x5, 1808, x13)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, -0x55555558, -0x5555555555555556, 0x2, x5, 1816, x13)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, 0x55555556, -0x5555555555555556, 0x5555555555555554, x5, 1824, x13)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, -0x5555555a, -0x5555555555555556, 0x4, x5, 1832, x13)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, 0x77777778, -0x5555555555555556, 0x3333333333333332, x5, 1840, x13)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, 0x44444445, -0x5555555555555556, 0x6666666666666665, x5, 1848, x13)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0xa5a4888, -0x5555555555555556, 0xb504f332, x5, 1856, x13)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x55555554, -0x5555555555555556, 0x5555555555555556, x5, 1864, x13)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x1, -0x5555555555555556, -0x5555555555555555, x5, 1872, x13)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, -0x5555555c, -0x5555555555555556, 0x6, x5, 1880, x13)
+
+inst_254:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, 0x77777776, -0x5555555555555556, 0x3333333333333334, x5, 1888, x13)
+
+inst_255:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, 0x44444443, -0x5555555555555556, 0x6666666666666667, x5, 1896, x13)
+
+inst_256:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x5faf9ddc, -0x5555555555555556, -0xb504f332, x5, 1904, x13)
+
+inst_257:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, -0xa5a488a, -0x5555555555555556, 0xb504f334, x5, 1912, x13)
+
+inst_258:
+// rs1_val==5 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x2, 0x5, 0x3, x5, 1920, x13)
+
+inst_259:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x55555550, 0x5, 0x5555555555555555, x5, 1928, x13)
+
+inst_260:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x5555555b, 0x5, -0x5555555555555556, x5, 1936, x13)
+
+inst_261:
+// rs1_val==5 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x5, 0x5, x5, 1944, x13)
+
+inst_262:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, -0x3333332e, 0x5, 0x3333333333333333, x5, 1952, x13)
+
+inst_263:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x66666661, 0x5, 0x6666666666666666, x5, 1960, x13)
+
+inst_264:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cc8, 0x5, -0xb504f333, x5, 1968, x13)
+
+inst_265:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cd2, 0x5, 0xb504f333, x5, 1976, x13)
+
+inst_266:
+// rs1_val==5 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x3, 0x5, 0x2, x5, 1984, x13)
+
+inst_267:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, -0x5555554f, 0x5, 0x5555555555555554, x5, 1992, x13)
+
+inst_268:
+// rs1_val==5 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x5, 0x5, 0x0, x5, 2000, x13)
+
+inst_269:
+// rs1_val==5 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x5, 0x4, x5, 2008, x13)
+
+inst_270:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, -0x3333332d, 0x5, 0x3333333333333332, x5, 2016, x13)
+
+inst_271:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x66666660, 0x5, 0x6666666666666665, x5, 2024, x13)
+
+inst_272:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cd3, 0x5, 0xb504f332, x5, 2032, x13)
+
+inst_273:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x55555551, 0x5, 0x5555555555555556, x5, 2040, x13)
+RVTEST_SIGBASE( x5,signature_x5_1)
+
+inst_274:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x5555555a, 0x5, -0x5555555555555555, x5, 0, x13)
+
+inst_275:
+// rs1_val==5 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, -0x1, 0x5, 0x6, x5, 8, x13)
+
+inst_276:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, -0x3333332f, 0x5, 0x3333333333333334, x5, 16, x13)
+
+inst_277:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x66666662, 0x5, 0x6666666666666667, x5, 24, x13)
+
+inst_278:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cc9, 0x5, -0xb504f332, x5, 32, x13)
+
+inst_279:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cd1, 0x5, 0xb504f334, x5, 40, x13)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x33333330, 0x3333333333333333, 0x3, x5, 48, x13)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x22222222, 0x3333333333333333, 0x5555555555555555, x5, 56, x13)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x77777777, 0x3333333333333333, -0x5555555555555556, x5, 64, x13)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x3333332e, 0x3333333333333333, 0x5, x5, 72, x13)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x3333333333333333, 0x3333333333333333, x5, 80, x13)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x33333333, 0x3333333333333333, 0x6666666666666666, x5, 88, x13)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x17c7d99a, 0x3333333333333333, -0xb504f333, x5, 96, x13)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x7e2e4000, 0x3333333333333333, 0xb504f333, x5, 104, x13)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x33333331, 0x3333333333333333, 0x2, x5, 112, x13)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, -0x22222221, 0x3333333333333333, 0x5555555555555554, x5, 120, x13)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x33333333, 0x3333333333333333, 0x0, x5, 128, x13)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x3333332f, 0x3333333333333333, 0x4, x5, 136, x13)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x3333333333333333, 0x3333333333333332, x5, 144, x13)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x33333332, 0x3333333333333333, 0x6666666666666665, x5, 152, x13)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x7e2e4001, 0x3333333333333333, 0xb504f332, x5, 160, x13)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x22222223, 0x3333333333333333, 0x5555555555555556, x5, 168, x13)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x77777778, 0x3333333333333333, -0x5555555555555555, x5, 176, x13)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x3333332d, 0x3333333333333333, 0x6, x5, 184, x13)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, -0x1, 0x3333333333333333, 0x3333333333333334, x5, 192, x13)
+
+inst_299:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x33333334, 0x3333333333333333, 0x6666666666666667, x5, 200, x13)
+
+inst_300:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x17c7d99b, 0x3333333333333333, -0xb504f332, x5, 208, x13)
+
+inst_301:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, 0x7e2e3fff, 0x3333333333333333, 0xb504f334, x5, 216, x13)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x66666663, 0x6666666666666666, 0x3, x5, 224, x13)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x11111111, 0x6666666666666666, 0x5555555555555555, x5, 232, x13)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x44444444, 0x6666666666666666, -0x5555555555555556, x5, 240, x13)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x66666661, 0x6666666666666666, 0x5, x5, 248, x13)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, 0x33333333, 0x6666666666666666, 0x3333333333333333, x5, 256, x13)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x6666666666666666, 0x6666666666666666, x5, 264, x13)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x1b6b5999, 0x6666666666666666, -0xb504f333, x5, 272, x13)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x4e9e8ccd, 0x6666666666666666, 0xb504f333, x5, 280, x13)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x66666664, 0x6666666666666666, 0x2, x5, 288, x13)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, 0x11111112, 0x6666666666666666, 0x5555555555555554, x5, 296, x13)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x66666666, 0x6666666666666666, 0x0, x5, 304, x13)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x66666662, 0x6666666666666666, 0x4, x5, 312, x13)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, 0x33333334, 0x6666666666666666, 0x3333333333333332, x5, 320, x13)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x6666666666666666, 0x6666666666666665, x5, 328, x13)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x4e9e8ccc, 0x6666666666666666, 0xb504f332, x5, 336, x13)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x11111110, 0x6666666666666666, 0x5555555555555556, x5, 344, x13)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x44444445, 0x6666666666666666, -0x5555555555555555, x5, 352, x13)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x66666660, 0x6666666666666666, 0x6, x5, 360, x13)
+
+inst_320:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, 0x33333332, 0x6666666666666666, 0x3333333333333334, x5, 368, x13)
+
+inst_321:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x1, 0x6666666666666666, 0x6666666666666667, x5, 376, x13)
+
+inst_322:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x1b6b5998, 0x6666666666666666, -0xb504f332, x5, 384, x13)
+
+inst_323:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, -0x4e9e8cce, 0x6666666666666666, 0xb504f334, x5, 392, x13)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cca, -0xb504f333, 0x3, x5, 400, x13)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0xa5a4888, -0xb504f333, 0x5555555555555555, x5, 408, x13)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x5faf9ddd, -0xb504f333, -0x5555555555555556, x5, 416, x13)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cc8, -0xb504f333, 0x5, x5, 424, x13)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, 0x17c7d99a, -0xb504f333, 0x3333333333333333, x5, 432, x13)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x1b6b5999, -0xb504f333, 0x6666666666666666, x5, 440, x13)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0xb504f333, -0xb504f333, x5, 448, x13)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x6a09e666, -0xb504f333, 0xb504f333, x5, 456, x13)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0ccb, -0xb504f333, 0x2, x5, 464, x13)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, -0xa5a4887, -0xb504f333, 0x5555555555555554, x5, 472, x13)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0ccd, -0xb504f333, 0x0, x5, 480, x13)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cc9, -0xb504f333, 0x4, x5, 488, x13)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, 0x17c7d99b, -0xb504f333, 0x3333333333333332, x5, 496, x13)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x1b6b5998, -0xb504f333, 0x6666666666666665, x5, 504, x13)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x6a09e665, -0xb504f333, 0xb504f332, x5, 512, x13)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0xa5a4889, -0xb504f333, 0x5555555555555556, x5, 520, x13)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x5faf9dde, -0xb504f333, -0x5555555555555555, x5, 528, x13)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cc7, -0xb504f333, 0x6, x5, 536, x13)
+
+inst_342:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, 0x17c7d999, -0xb504f333, 0x3333333333333334, x5, 544, x13)
+
+inst_343:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x1b6b599a, -0xb504f333, 0x6666666666666667, x5, 552, x13)
+
+inst_344:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x1, -0xb504f333, -0xb504f332, x5, 560, x13)
+
+inst_345:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, -0x6a09e667, -0xb504f333, 0xb504f334, x5, 568, x13)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cd0, 0xb504f333, 0x3, x5, 576, x13)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x5faf9dde, 0xb504f333, 0x5555555555555555, x5, 584, x13)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0xa5a4889, 0xb504f333, -0x5555555555555556, x5, 592, x13)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cd2, 0xb504f333, 0x5, x5, 600, x13)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, -0x7e2e4000, 0xb504f333, 0x3333333333333333, x5, 608, x13)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, 0x4e9e8ccd, 0xb504f333, 0x6666666666666666, x5, 616, x13)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x6a09e666, 0xb504f333, -0xb504f333, x5, 624, x13)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0xb504f333, 0xb504f333, x5, 632, x13)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0ccf, 0xb504f333, 0x2, x5, 640, x13)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, 0x5faf9ddf, 0xb504f333, 0x5555555555555554, x5, 648, x13)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0ccd, 0xb504f333, 0x0, x5, 656, x13)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cd1, 0xb504f333, 0x4, x5, 664, x13)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, -0x7e2e3fff, 0xb504f333, 0x3333333333333332, x5, 672, x13)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, 0x4e9e8cce, 0xb504f333, 0x6666666666666665, x5, 680, x13)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0xb504f333, 0xb504f332, x5, 688, x13)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x5faf9ddd, 0xb504f333, 0x5555555555555556, x5, 696, x13)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0xa5a4888, 0xb504f333, -0x5555555555555555, x5, 704, x13)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cd3, 0xb504f333, 0x6, x5, 712, x13)
+
+inst_364:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, -0x7e2e4001, 0xb504f333, 0x3333333333333334, x5, 720, x13)
+
+inst_365:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, 0x4e9e8ccc, 0xb504f333, 0x6666666666666667, x5, 728, x13)
+
+inst_366:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x6a09e665, 0xb504f333, -0xb504f332, x5, 736, x13)
+
+inst_367:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, -0x1, 0xb504f333, 0xb504f334, x5, 744, x13)
+
+inst_368:
+// rs1_val==2 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, -0x1, 0x2, 0x3, x5, 752, x13)
+
+inst_369:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x55555553, 0x2, 0x5555555555555555, x5, 760, x13)
+
+inst_370:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x55555558, 0x2, -0x5555555555555556, x5, 768, x13)
+
+inst_371:
+// rs1_val==2 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, -0x3, 0x2, 0x5, x5, 776, x13)
+
+inst_372:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, -0x33333331, 0x2, 0x3333333333333333, x5, 784, x13)
+
+inst_373:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x66666664, 0x2, 0x6666666666666666, x5, 792, x13)
+
+inst_374:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0ccb, 0x2, -0xb504f333, x5, 800, x13)
+
+inst_375:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0ccf, 0x2, 0xb504f333, x5, 808, x13)
+
+inst_376:
+// rs1_val==2 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x2, 0x2, x5, 816, x13)
+
+inst_377:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, -0x55555552, 0x2, 0x5555555555555554, x5, 824, x13)
+
+inst_378:
+// rs1_val==2 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x2, 0x2, 0x0, x5, 832, x13)
+
+inst_379:
+// rs1_val==2 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, -0x2, 0x2, 0x4, x5, 840, x13)
+
+inst_380:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, -0x33333330, 0x2, 0x3333333333333332, x5, 848, x13)
+
+inst_381:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x66666663, 0x2, 0x6666666666666665, x5, 856, x13)
+
+inst_382:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cd0, 0x2, 0xb504f332, x5, 864, x13)
+
+inst_383:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x55555554, 0x2, 0x5555555555555556, x5, 872, x13)
+
+inst_384:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x55555557, 0x2, -0x5555555555555555, x5, 880, x13)
+
+inst_385:
+// rs1_val==2 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, -0x4, 0x2, 0x6, x5, 888, x13)
+
+inst_386:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, -0x33333332, 0x2, 0x3333333333333334, x5, 896, x13)
+
+inst_387:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x66666665, 0x2, 0x6666666666666667, x5, 904, x13)
+
+inst_388:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0ccc, 0x2, -0xb504f332, x5, 912, x13)
+
+inst_389:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cce, 0x2, 0xb504f334, x5, 920, x13)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x55555551, 0x5555555555555554, 0x3, x5, 928, x13)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x1, 0x5555555555555554, 0x5555555555555555, x5, 936, x13)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x55555556, 0x5555555555555554, -0x5555555555555556, x5, 944, x13)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x5555554f, 0x5555555555555554, 0x5, x5, 952, x13)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, 0x22222221, 0x5555555555555554, 0x3333333333333333, x5, 960, x13)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x11111112, 0x5555555555555554, 0x6666666666666666, x5, 968, x13)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0xa5a4887, 0x5555555555555554, -0xb504f333, x5, 976, x13)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x5faf9ddf, 0x5555555555555554, 0xb504f333, x5, 984, x13)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x55555552, 0x5555555555555554, 0x2, x5, 992, x13)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x5555555555555554, 0x5555555555555554, x5, 1000, x13)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x55555554, 0x5555555555555554, 0x0, x5, 1008, x13)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x55555550, 0x5555555555555554, 0x4, x5, 1016, x13)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, 0x22222222, 0x5555555555555554, 0x3333333333333332, x5, 1024, x13)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x11111111, 0x5555555555555554, 0x6666666666666665, x5, 1032, x13)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x5faf9dde, 0x5555555555555554, 0xb504f332, x5, 1040, x13)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x2, 0x5555555555555554, 0x5555555555555556, x5, 1048, x13)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x55555557, 0x5555555555555554, -0x5555555555555555, x5, 1056, x13)
+
+inst_407:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x5555554e, 0x5555555555555554, 0x6, x5, 1064, x13)
+
+inst_408:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, 0x22222220, 0x5555555555555554, 0x3333333333333334, x5, 1072, x13)
+
+inst_409:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x11111113, 0x5555555555555554, 0x6666666666666667, x5, 1080, x13)
+
+inst_410:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0xa5a4886, 0x5555555555555554, -0xb504f332, x5, 1088, x13)
+
+inst_411:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, -0x5faf9de0, 0x5555555555555554, 0xb504f334, x5, 1096, x13)
+
+inst_412:
+// rs1_val==0 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, -0x3, 0x0, 0x3, x5, 1104, x13)
+
+inst_413:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x55555555, 0x0, 0x5555555555555555, x5, 1112, x13)
+
+inst_414:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x55555556, 0x0, -0x5555555555555556, x5, 1120, x13)
+
+inst_415:
+// rs1_val==0 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, -0x5, 0x0, 0x5, x5, 1128, x13)
+
+inst_416:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, -0x33333333, 0x0, 0x3333333333333333, x5, 1136, x13)
+
+inst_417:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x66666666, 0x0, 0x6666666666666666, x5, 1144, x13)
+
+inst_418:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0ccd, 0x0, -0xb504f333, x5, 1152, x13)
+
+inst_419:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0ccd, 0x0, 0xb504f333, x5, 1160, x13)
+
+inst_420:
+// rs1_val==0 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, -0x2, 0x0, 0x2, x5, 1168, x13)
+
+inst_421:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cce, 0x0, -0xb504f332, x5, 1176, x13)
+
+inst_422:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0ccc, 0x0, 0xb504f334, x5, 1184, x13)
+
+inst_423:
+// rs1_val==4 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x4, 0x3, x5, 1192, x13)
+
+inst_424:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x55555551, 0x4, 0x5555555555555555, x5, 1200, x13)
+
+inst_425:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x5555555a, 0x4, -0x5555555555555556, x5, 1208, x13)
+
+inst_426:
+// rs1_val==4 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, -0x1, 0x4, 0x5, x5, 1216, x13)
+
+inst_427:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, -0x3333332f, 0x4, 0x3333333333333333, x5, 1224, x13)
+
+inst_428:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x66666662, 0x4, 0x6666666666666666, x5, 1232, x13)
+
+inst_429:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cc9, 0x4, -0xb504f333, x5, 1240, x13)
+
+inst_430:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cd1, 0x4, 0xb504f333, x5, 1248, x13)
+
+inst_431:
+// rs1_val==4 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x2, 0x4, 0x2, x5, 1256, x13)
+
+inst_432:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, -0x55555550, 0x4, 0x5555555555555554, x5, 1264, x13)
+
+inst_433:
+// rs1_val==4 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x4, 0x4, 0x0, x5, 1272, x13)
+
+inst_434:
+// rs1_val==4 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x4, 0x4, x5, 1280, x13)
+
+inst_435:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, -0x3333332e, 0x4, 0x3333333333333332, x5, 1288, x13)
+
+inst_436:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x66666661, 0x4, 0x6666666666666665, x5, 1296, x13)
+
+inst_437:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cd2, 0x4, 0xb504f332, x5, 1304, x13)
+
+inst_438:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x55555552, 0x4, 0x5555555555555556, x5, 1312, x13)
+
+inst_439:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x55555559, 0x4, -0x5555555555555555, x5, 1320, x13)
+
+inst_440:
+// rs1_val==4 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, -0x2, 0x4, 0x6, x5, 1328, x13)
+
+inst_441:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, -0x33333330, 0x4, 0x3333333333333334, x5, 1336, x13)
+
+inst_442:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x66666663, 0x4, 0x6666666666666667, x5, 1344, x13)
+
+inst_443:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cca, 0x4, -0xb504f332, x5, 1352, x13)
+
+inst_444:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cd0, 0x4, 0xb504f334, x5, 1360, x13)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x3333332f, 0x3333333333333332, 0x3, x5, 1368, x13)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x22222223, 0x3333333333333332, 0x5555555555555555, x5, 1376, x13)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x77777778, 0x3333333333333332, -0x5555555555555556, x5, 1384, x13)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x3333332d, 0x3333333333333332, 0x5, x5, 1392, x13)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, -0x1, 0x3333333333333332, 0x3333333333333333, x5, 1400, x13)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x33333334, 0x3333333333333332, 0x6666666666666666, x5, 1408, x13)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x17c7d99b, 0x3333333333333332, -0xb504f333, x5, 1416, x13)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x7e2e3fff, 0x3333333333333332, 0xb504f333, x5, 1424, x13)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x33333330, 0x3333333333333332, 0x2, x5, 1432, x13)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, -0x22222222, 0x3333333333333332, 0x5555555555555554, x5, 1440, x13)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x33333332, 0x3333333333333332, 0x0, x5, 1448, x13)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x3333332e, 0x3333333333333332, 0x4, x5, 1456, x13)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x3333333333333332, 0x3333333333333332, x5, 1464, x13)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x33333333, 0x3333333333333332, 0x6666666666666665, x5, 1472, x13)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x7e2e4000, 0x3333333333333332, 0xb504f332, x5, 1480, x13)
+
+inst_460:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x22222224, 0x3333333333333332, 0x5555555555555556, x5, 1488, x13)
+
+inst_461:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x77777779, 0x3333333333333332, -0x5555555555555555, x5, 1496, x13)
+
+inst_462:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x3333332c, 0x3333333333333332, 0x6, x5, 1504, x13)
+
+inst_463:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, -0x2, 0x3333333333333332, 0x3333333333333334, x5, 1512, x13)
+
+inst_464:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x33333335, 0x3333333333333332, 0x6666666666666667, x5, 1520, x13)
+
+inst_465:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x17c7d99c, 0x3333333333333332, -0xb504f332, x5, 1528, x13)
+
+inst_466:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, 0x7e2e3ffe, 0x3333333333333332, 0xb504f334, x5, 1536, x13)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x66666662, 0x6666666666666665, 0x3, x5, 1544, x13)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x11111110, 0x6666666666666665, 0x5555555555555555, x5, 1552, x13)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x44444445, 0x6666666666666665, -0x5555555555555556, x5, 1560, x13)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x66666660, 0x6666666666666665, 0x5, x5, 1568, x13)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, 0x33333332, 0x6666666666666665, 0x3333333333333333, x5, 1576, x13)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x1, 0x6666666666666665, 0x6666666666666666, x5, 1584, x13)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x1b6b5998, 0x6666666666666665, -0xb504f333, x5, 1592, x13)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x4e9e8cce, 0x6666666666666665, 0xb504f333, x5, 1600, x13)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x66666663, 0x6666666666666665, 0x2, x5, 1608, x13)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, 0x11111111, 0x6666666666666665, 0x5555555555555554, x5, 1616, x13)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x66666665, 0x6666666666666665, 0x0, x5, 1624, x13)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x66666661, 0x6666666666666665, 0x4, x5, 1632, x13)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, 0x33333333, 0x6666666666666665, 0x3333333333333332, x5, 1640, x13)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x6666666666666665, 0x6666666666666665, x5, 1648, x13)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x4e9e8ccd, 0x6666666666666665, 0xb504f332, x5, 1656, x13)
+
+inst_482:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x1111110f, 0x6666666666666665, 0x5555555555555556, x5, 1664, x13)
+
+inst_483:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x44444446, 0x6666666666666665, -0x5555555555555555, x5, 1672, x13)
+
+inst_484:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x6666665f, 0x6666666666666665, 0x6, x5, 1680, x13)
+
+inst_485:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, 0x33333331, 0x6666666666666665, 0x3333333333333334, x5, 1688, x13)
+
+inst_486:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x2, 0x6666666666666665, 0x6666666666666667, x5, 1696, x13)
+
+inst_487:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x1b6b5997, 0x6666666666666665, -0xb504f332, x5, 1704, x13)
+
+inst_488:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, -0x4e9e8ccf, 0x6666666666666665, 0xb504f334, x5, 1712, x13)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cd1, 0xb504f332, 0x3, x5, 1720, x13)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x5faf9ddd, 0xb504f332, 0x5555555555555555, x5, 1728, x13)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0xa5a4888, 0xb504f332, -0x5555555555555556, x5, 1736, x13)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cd3, 0xb504f332, 0x5, x5, 1744, x13)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, -0x7e2e4001, 0xb504f332, 0x3333333333333333, x5, 1752, x13)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, 0x4e9e8ccc, 0xb504f332, 0x6666666666666666, x5, 1760, x13)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x6a09e665, 0xb504f332, -0xb504f333, x5, 1768, x13)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x1, 0xb504f332, 0xb504f333, x5, 1776, x13)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cd0, 0xb504f332, 0x2, x5, 1784, x13)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, 0x5faf9dde, 0xb504f332, 0x5555555555555554, x5, 1792, x13)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cce, 0xb504f332, 0x0, x5, 1800, x13)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cd2, 0xb504f332, 0x4, x5, 1808, x13)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, -0x7e2e4000, 0xb504f332, 0x3333333333333332, x5, 1816, x13)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, 0x4e9e8ccd, 0xb504f332, 0x6666666666666665, x5, 1824, x13)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0xb504f332, 0xb504f332, x5, 1832, x13)
+
+inst_504:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x5faf9ddc, 0xb504f332, 0x5555555555555556, x5, 1840, x13)
+
+inst_505:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0xa5a4887, 0xb504f332, -0x5555555555555555, x5, 1848, x13)
+
+inst_506:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cd4, 0xb504f332, 0x6, x5, 1856, x13)
+
+inst_507:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, -0x7e2e4002, 0xb504f332, 0x3333333333333334, x5, 1864, x13)
+
+inst_508:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, 0x4e9e8ccb, 0xb504f332, 0x6666666666666667, x5, 1872, x13)
+
+inst_509:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x6a09e664, 0xb504f332, -0xb504f332, x5, 1880, x13)
+
+inst_510:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, -0x2, 0xb504f332, 0xb504f334, x5, 1888, x13)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x55555553, 0x5555555555555556, 0x3, x5, 1896, x13)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x5555555555555556, 0x5555555555555555, x5, 1904, x13)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x55555554, 0x5555555555555556, -0x5555555555555556, x5, 1912, x13)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x55555551, 0x5555555555555556, 0x5, x5, 1920, x13)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, 0x22222223, 0x5555555555555556, 0x3333333333333333, x5, 1928, x13)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x11111110, 0x5555555555555556, 0x6666666666666666, x5, 1936, x13)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0xa5a4889, 0x5555555555555556, -0xb504f333, x5, 1944, x13)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x5faf9ddd, 0x5555555555555556, 0xb504f333, x5, 1952, x13)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x55555554, 0x5555555555555556, 0x2, x5, 1960, x13)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, 0x2, 0x5555555555555556, 0x5555555555555554, x5, 1968, x13)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x55555556, 0x5555555555555556, 0x0, x5, 1976, x13)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x55555552, 0x5555555555555556, 0x4, x5, 1984, x13)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, 0x22222224, 0x5555555555555556, 0x3333333333333332, x5, 1992, x13)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x1111110f, 0x5555555555555556, 0x6666666666666665, x5, 2000, x13)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x5faf9ddc, 0x5555555555555556, 0xb504f332, x5, 2008, x13)
+
+inst_526:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x5555555555555556, 0x5555555555555556, x5, 2016, x13)
+
+inst_527:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x55555555, 0x5555555555555556, -0x5555555555555555, x5, 2024, x13)
+
+inst_528:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x55555550, 0x5555555555555556, 0x6, x5, 2032, x13)
+
+inst_529:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, 0x22222222, 0x5555555555555556, 0x3333333333333334, x5, 2040, x13)
+RVTEST_SIGBASE( x5,signature_x5_2)
+
+inst_530:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x11111111, 0x5555555555555556, 0x6666666666666667, x5, 0, x13)
+
+inst_531:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0xa5a4888, 0x5555555555555556, -0xb504f332, x5, 8, x13)
+
+inst_532:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, -0x5faf9dde, 0x5555555555555556, 0xb504f334, x5, 16, x13)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, -0x55555558, -0x5555555555555555, 0x3, x5, 24, x13)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x55555556, -0x5555555555555555, 0x5555555555555555, x5, 32, x13)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x1, -0x5555555555555555, -0x5555555555555556, x5, 40, x13)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, -0x5555555a, -0x5555555555555555, 0x5, x5, 48, x13)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, 0x77777778, -0x5555555555555555, 0x3333333333333333, x5, 56, x13)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, 0x44444445, -0x5555555555555555, 0x6666666666666666, x5, 64, x13)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x5faf9dde, -0x5555555555555555, -0xb504f333, x5, 72, x13)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0xa5a4888, -0x5555555555555555, 0xb504f333, x5, 80, x13)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, -0x55555557, -0x5555555555555555, 0x2, x5, 88, x13)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, 0x55555557, -0x5555555555555555, 0x5555555555555554, x5, 96, x13)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, -0x55555555, -0x5555555555555555, 0x0, x5, 104, x13)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, -0x55555559, -0x5555555555555555, 0x4, x5, 112, x13)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, 0x77777779, -0x5555555555555555, 0x3333333333333332, x5, 120, x13)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, 0x44444446, -0x5555555555555555, 0x6666666666666665, x5, 128, x13)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0xa5a4887, -0x5555555555555555, 0xb504f332, x5, 136, x13)
+
+inst_548:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x55555555, -0x5555555555555555, 0x5555555555555556, x5, 144, x13)
+
+inst_549:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0x5555555555555555, -0x5555555555555555, x5, 152, x13)
+
+inst_550:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, -0x5555555b, -0x5555555555555555, 0x6, x5, 160, x13)
+
+inst_551:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, 0x77777777, -0x5555555555555555, 0x3333333333333334, x5, 168, x13)
+
+inst_552:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, 0x44444444, -0x5555555555555555, 0x6666666666666667, x5, 176, x13)
+
+inst_553:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x5faf9ddd, -0x5555555555555555, -0xb504f332, x5, 184, x13)
+
+inst_554:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, -0xa5a4889, -0x5555555555555555, 0xb504f334, x5, 192, x13)
+
+inst_555:
+// rs1_val==6 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x3, 0x6, 0x3, x5, 200, x13)
+
+inst_556:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x5555554f, 0x6, 0x5555555555555555, x5, 208, x13)
+
+inst_557:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x5555555c, 0x6, -0x5555555555555556, x5, 216, x13)
+
+inst_558:
+// rs1_val==6 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x6, 0x5, x5, 224, x13)
+
+inst_559:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, -0x3333332d, 0x6, 0x3333333333333333, x5, 232, x13)
+
+inst_560:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x66666660, 0x6, 0x6666666666666666, x5, 240, x13)
+
+inst_561:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cc7, 0x6, -0xb504f333, x5, 248, x13)
+
+inst_562:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cd3, 0x6, 0xb504f333, x5, 256, x13)
+
+inst_563:
+// rs1_val==6 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x4, 0x6, 0x2, x5, 264, x13)
+
+inst_564:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, -0x5555554e, 0x6, 0x5555555555555554, x5, 272, x13)
+
+inst_565:
+// rs1_val==6 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x6, 0x6, 0x0, x5, 280, x13)
+
+inst_566:
+// rs1_val==6 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x2, 0x6, 0x4, x5, 288, x13)
+
+inst_567:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, -0x3333332c, 0x6, 0x3333333333333332, x5, 296, x13)
+
+inst_568:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x6666665f, 0x6, 0x6666666666666665, x5, 304, x13)
+
+inst_569:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cd4, 0x6, 0xb504f332, x5, 312, x13)
+
+inst_570:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x55555550, 0x6, 0x5555555555555556, x5, 320, x13)
+
+inst_571:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x5555555b, 0x6, -0x5555555555555555, x5, 328, x13)
+
+inst_572:
+// rs1_val==6 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x6, 0x6, x5, 336, x13)
+
+inst_573:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, -0x3333332e, 0x6, 0x3333333333333334, x5, 344, x13)
+
+inst_574:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x66666661, 0x6, 0x6666666666666667, x5, 352, x13)
+
+inst_575:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cc8, 0x6, -0xb504f332, x5, 360, x13)
+
+inst_576:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cd2, 0x6, 0xb504f334, x5, 368, x13)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x33333331, 0x3333333333333334, 0x3, x5, 376, x13)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x22222221, 0x3333333333333334, 0x5555555555555555, x5, 384, x13)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x77777776, 0x3333333333333334, -0x5555555555555556, x5, 392, x13)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x3333332f, 0x3333333333333334, 0x5, x5, 400, x13)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x3333333333333334, 0x3333333333333333, x5, 408, x13)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x33333332, 0x3333333333333334, 0x6666666666666666, x5, 416, x13)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x17c7d999, 0x3333333333333334, -0xb504f333, x5, 424, x13)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x7e2e4001, 0x3333333333333334, 0xb504f333, x5, 432, x13)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x33333332, 0x3333333333333334, 0x2, x5, 440, x13)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, -0x22222220, 0x3333333333333334, 0x5555555555555554, x5, 448, x13)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x33333334, 0x3333333333333334, 0x0, x5, 456, x13)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x33333330, 0x3333333333333334, 0x4, x5, 464, x13)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, 0x2, 0x3333333333333334, 0x3333333333333332, x5, 472, x13)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x33333331, 0x3333333333333334, 0x6666666666666665, x5, 480, x13)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x7e2e4002, 0x3333333333333334, 0xb504f332, x5, 488, x13)
+
+inst_592:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x22222222, 0x3333333333333334, 0x5555555555555556, x5, 496, x13)
+
+inst_593:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x77777777, 0x3333333333333334, -0x5555555555555555, x5, 504, x13)
+
+inst_594:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x3333332e, 0x3333333333333334, 0x6, x5, 512, x13)
+
+inst_595:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x3333333333333334, 0x3333333333333334, x5, 520, x13)
+
+inst_596:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x33333333, 0x3333333333333334, 0x6666666666666667, x5, 528, x13)
+
+inst_597:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x17c7d99a, 0x3333333333333334, -0xb504f332, x5, 536, x13)
+
+inst_598:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, 0x7e2e4000, 0x3333333333333334, 0xb504f334, x5, 544, x13)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x66666664, 0x6666666666666667, 0x3, x5, 552, x13)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x11111112, 0x6666666666666667, 0x5555555555555555, x5, 560, x13)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x44444443, 0x6666666666666667, -0x5555555555555556, x5, 568, x13)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x66666662, 0x6666666666666667, 0x5, x5, 576, x13)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, 0x33333334, 0x6666666666666667, 0x3333333333333333, x5, 584, x13)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0x6666666666666667, 0x6666666666666666, x5, 592, x13)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x1b6b599a, 0x6666666666666667, -0xb504f333, x5, 600, x13)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x4e9e8ccc, 0x6666666666666667, 0xb504f333, x5, 608, x13)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x66666665, 0x6666666666666667, 0x2, x5, 616, x13)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, 0x11111113, 0x6666666666666667, 0x5555555555555554, x5, 624, x13)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x66666667, 0x6666666666666667, 0x0, x5, 632, x13)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x66666663, 0x6666666666666667, 0x4, x5, 640, x13)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, 0x33333335, 0x6666666666666667, 0x3333333333333332, x5, 648, x13)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, 0x2, 0x6666666666666667, 0x6666666666666665, x5, 656, x13)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x4e9e8ccb, 0x6666666666666667, 0xb504f332, x5, 664, x13)
+
+inst_614:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x11111111, 0x6666666666666667, 0x5555555555555556, x5, 672, x13)
+
+inst_615:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x44444444, 0x6666666666666667, -0x5555555555555555, x5, 680, x13)
+
+inst_616:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x66666661, 0x6666666666666667, 0x6, x5, 688, x13)
+
+inst_617:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, 0x33333333, 0x6666666666666667, 0x3333333333333334, x5, 696, x13)
+
+inst_618:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x6666666666666667, 0x6666666666666667, x5, 704, x13)
+
+inst_619:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x1b6b5999, 0x6666666666666667, -0xb504f332, x5, 712, x13)
+
+inst_620:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, -0x4e9e8ccd, 0x6666666666666667, 0xb504f334, x5, 720, x13)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0ccb, -0xb504f332, 0x3, x5, 728, x13)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0xa5a4887, -0xb504f332, 0x5555555555555555, x5, 736, x13)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x5faf9ddc, -0xb504f332, -0x5555555555555556, x5, 744, x13)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cc9, -0xb504f332, 0x5, x5, 752, x13)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, 0x17c7d99b, -0xb504f332, 0x3333333333333333, x5, 760, x13)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, -0x1b6b5998, -0xb504f332, 0x6666666666666666, x5, 768, x13)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x1, -0xb504f332, -0xb504f333, x5, 776, x13)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, -0x6a09e665, -0xb504f332, 0xb504f333, x5, 784, x13)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0ccc, -0xb504f332, 0x2, x5, 792, x13)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, -0xa5a4886, -0xb504f332, 0x5555555555555554, x5, 800, x13)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cce, -0xb504f332, 0x0, x5, 808, x13)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cca, -0xb504f332, 0x4, x5, 816, x13)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, 0x17c7d99c, -0xb504f332, 0x3333333333333332, x5, 824, x13)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x1b6b5997, -0xb504f332, 0x6666666666666665, x5, 832, x13)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, -0x6a09e664, -0xb504f332, 0xb504f332, x5, 840, x13)
+
+inst_636:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0xa5a4888, -0xb504f332, 0x5555555555555556, x5, 848, x13)
+
+inst_637:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, -0x5faf9ddd, -0xb504f332, -0x5555555555555555, x5, 856, x13)
+
+inst_638:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cc8, -0xb504f332, 0x6, x5, 864, x13)
+
+inst_639:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, 0x17c7d99a, -0xb504f332, 0x3333333333333334, x5, 872, x13)
+
+inst_640:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x1b6b5999, -0xb504f332, 0x6666666666666667, x5, 880, x13)
+
+inst_641:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0xb504f332, -0xb504f332, x5, 888, x13)
+
+inst_642:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, -0x6a09e666, -0xb504f332, 0xb504f334, x5, 896, x13)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0ccf, 0xb504f334, 0x3, x5, 904, x13)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x5faf9ddf, 0xb504f334, 0x5555555555555555, x5, 912, x13)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0xa5a488a, 0xb504f334, -0x5555555555555556, x5, 920, x13)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cd1, 0xb504f334, 0x5, x5, 928, x13)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_RR_OP(subw, x12, x10, x11, -0x7e2e3fff, 0xb504f334, 0x3333333333333333, x5, 936, x13)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_RR_OP(subw, x12, x10, x11, 0x4e9e8cce, 0xb504f334, 0x6666666666666666, x5, 944, x13)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x6a09e667, 0xb504f334, -0xb504f333, x5, 952, x13)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f333
+TEST_RR_OP(subw, x12, x10, x11, 0x1, 0xb504f334, 0xb504f333, x5, 960, x13)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x2
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cce, 0xb504f334, 0x2, x5, 968, x13)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, 0x5faf9de0, 0xb504f334, 0x5555555555555554, x5, 976, x13)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0ccc, 0xb504f334, 0x0, x5, 984, x13)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cd0, 0xb504f334, 0x4, x5, 992, x13)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, -0x7e2e3ffe, 0xb504f334, 0x3333333333333332, x5, 1000, x13)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, 0x4e9e8ccf, 0xb504f334, 0x6666666666666665, x5, 1008, x13)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x2, 0xb504f334, 0xb504f332, x5, 1016, x13)
+
+inst_658:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, 0x5faf9dde, 0xb504f334, 0x5555555555555556, x5, 1024, x13)
+
+inst_659:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0xa5a4889, 0xb504f334, -0x5555555555555555, x5, 1032, x13)
+
+inst_660:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, -0x4afb0cd2, 0xb504f334, 0x6, x5, 1040, x13)
+
+inst_661:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, -0x7e2e4000, 0xb504f334, 0x3333333333333334, x5, 1048, x13)
+
+inst_662:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, 0x4e9e8ccd, 0xb504f334, 0x6666666666666667, x5, 1056, x13)
+
+inst_663:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x6a09e666, 0xb504f334, -0xb504f332, x5, 1064, x13)
+
+inst_664:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f334
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0xb504f334, 0xb504f334, x5, 1072, x13)
+
+inst_665:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555554
+TEST_RR_OP(subw, x12, x10, x11, -0x55555554, 0x0, 0x5555555555555554, x5, 1080, x13)
+
+inst_666:
+// rs1_val==0 and rs2_val==0,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(subw, x12, x10, x11, 0x0, 0x0, 0x0, x5, 1088, x13)
+
+inst_667:
+// rs1_val==0 and rs2_val==4,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(subw, x12, x10, x11, -0x4, 0x0, 0x4, x5, 1096, x13)
+
+inst_668:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333332
+TEST_RR_OP(subw, x12, x10, x11, -0x33333332, 0x0, 0x3333333333333332, x5, 1104, x13)
+
+inst_669:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666665
+TEST_RR_OP(subw, x12, x10, x11, -0x66666665, 0x0, 0x6666666666666665, x5, 1112, x13)
+
+inst_670:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f332
+TEST_RR_OP(subw, x12, x10, x11, 0x4afb0cce, 0x0, 0xb504f332, x5, 1120, x13)
+
+inst_671:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555556
+TEST_RR_OP(subw, x12, x10, x11, -0x55555556, 0x0, 0x5555555555555556, x5, 1128, x13)
+
+inst_672:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555555
+TEST_RR_OP(subw, x12, x10, x11, 0x55555555, 0x0, -0x5555555555555555, x5, 1136, x13)
+
+inst_673:
+// rs1_val==0 and rs2_val==6,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(subw, x12, x10, x11, -0x6, 0x0, 0x6, x5, 1144, x13)
+
+inst_674:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333334
+TEST_RR_OP(subw, x12, x10, x11, -0x33333334, 0x0, 0x3333333333333334, x5, 1152, x13)
+
+inst_675:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666667
+TEST_RR_OP(subw, x12, x10, x11, -0x66666667, 0x0, 0x6666666666666667, x5, 1160, x13)
+
+inst_676:
+// rs1_val == rs2_val, rs2_val == -33, rs1_val == -33
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x21
+TEST_RR_OP(subw, x12, x10, x11, 0x0, -0x21, -0x21, x5, 1168, x13)
+
+inst_677:
+// rs2_val == 131072,
+// opcode: subw ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x20000
+TEST_RR_OP(subw, x12, x10, x11, 0x33313332, 0x3333333333333332, 0x20000, x5, 1176, x13)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 18*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_2:
+ .fill 148*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/sw-align-01.S b/riscof/suite/rv64i_m/I/sw-align-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..02a9b676d98d2bec6642fbcfb72bff0395e48625
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/sw-align-01.S
@@ -0,0 +1,734 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the sw instruction of the RISC-V I extension for the sw-align covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sw-align)
+
+RVTEST_SIGBASE( x5,signature_x5_1)
+
+inst_0:
+// rs1 != rs2, rs1==x11, rs2==x26, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, imm_val < 0, ea_align == 0 and (imm_val % 4) == 0
+// opcode: sw; op1:x11; op2:x26; op2val:-0x8000000000000000; immval:-0x8; align:0
+TEST_STORE(x5,x12,0,x11,x26,-0x8000000000000000,-0x8,0,sw,0)
+
+inst_1:
+// rs1==x7, rs2==x17, rs2_val == 0, imm_val > 0
+// opcode: sw; op1:x7; op2:x17; op2val:0x0; immval:0x200; align:0
+TEST_STORE(x5,x12,0,x7,x17,0x0,0x200,8,sw,0)
+
+inst_2:
+// rs1==x2, rs2==x6, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807
+// opcode: sw; op1:x2; op2:x6; op2val:0x7fffffffffffffff; immval:-0x8; align:0
+TEST_STORE(x5,x12,0,x2,x6,0x7fffffffffffffff,-0x8,16,sw,0)
+
+inst_3:
+// rs1==x15, rs2==x9, rs2_val == 1, ea_align == 0 and (imm_val % 4) == 1
+// opcode: sw; op1:x15; op2:x9; op2val:0x1; immval:0x555; align:0
+TEST_STORE(x5,x12,0,x15,x9,0x1,0x555,24,sw,0)
+
+inst_4:
+// rs1==x17, rs2==x14, ea_align == 0 and (imm_val % 4) == 2, rs2_val == -33
+// opcode: sw; op1:x17; op2:x14; op2val:-0x21; immval:-0x6; align:0
+TEST_STORE(x5,x12,0,x17,x14,-0x21,-0x6,32,sw,0)
+
+inst_5:
+// rs1==x29, rs2==x27, ea_align == 0 and (imm_val % 4) == 3, rs2_val == 144115188075855872
+// opcode: sw; op1:x29; op2:x27; op2val:0x200000000000000; immval:-0x9; align:0
+TEST_STORE(x5,x12,0,x29,x27,0x200000000000000,-0x9,40,sw,0)
+
+inst_6:
+// rs1==x31, rs2==x25, imm_val == 0, rs2_val == 2
+// opcode: sw; op1:x31; op2:x25; op2val:0x2; immval:0x0; align:0
+TEST_STORE(x5,x12,0,x31,x25,0x2,0x0,48,sw,0)
+
+inst_7:
+// rs1==x26, rs2==x19, rs2_val == 4,
+// opcode: sw; op1:x26; op2:x19; op2val:0x4; immval:0x7ff; align:0
+TEST_STORE(x5,x12,0,x26,x19,0x4,0x7ff,56,sw,0)
+
+inst_8:
+// rs1==x24, rs2==x29, rs2_val == 8,
+// opcode: sw; op1:x24; op2:x29; op2val:0x8; immval:-0x11; align:0
+TEST_STORE(x5,x12,0,x24,x29,0x8,-0x11,64,sw,0)
+
+inst_9:
+// rs1==x21, rs2==x1, rs2_val == 16,
+// opcode: sw; op1:x21; op2:x1; op2val:0x10; immval:-0x201; align:0
+TEST_STORE(x5,x12,0,x21,x1,0x10,-0x201,72,sw,0)
+
+inst_10:
+// rs1==x23, rs2==x4, rs2_val == 32,
+// opcode: sw; op1:x23; op2:x4; op2val:0x20; immval:0x0; align:0
+TEST_STORE(x5,x12,0,x23,x4,0x20,0x0,80,sw,0)
+
+inst_11:
+// rs1==x28, rs2==x2, rs2_val == 64,
+// opcode: sw; op1:x28; op2:x2; op2val:0x40; immval:-0x800; align:0
+TEST_STORE(x5,x12,0,x28,x2,0x40,-0x800,88,sw,0)
+
+inst_12:
+// rs1==x3, rs2==x16, rs2_val == 128,
+// opcode: sw; op1:x3; op2:x16; op2val:0x80; immval:0x6; align:0
+TEST_STORE(x5,x12,0,x3,x16,0x80,0x6,96,sw,0)
+
+inst_13:
+// rs1==x14, rs2==x21, rs2_val == 256,
+// opcode: sw; op1:x14; op2:x21; op2val:0x100; immval:-0x101; align:0
+TEST_STORE(x5,x12,0,x14,x21,0x100,-0x101,104,sw,0)
+
+inst_14:
+// rs1==x16, rs2==x10, rs2_val == 512,
+// opcode: sw; op1:x16; op2:x10; op2val:0x200; immval:-0x800; align:0
+TEST_STORE(x5,x12,0,x16,x10,0x200,-0x800,112,sw,0)
+
+inst_15:
+// rs1==x13, rs2==x31, rs2_val == 1024,
+// opcode: sw; op1:x13; op2:x31; op2val:0x400; immval:0x0; align:0
+TEST_STORE(x5,x12,0,x13,x31,0x400,0x0,120,sw,0)
+
+inst_16:
+// rs1==x10, rs2==x8, rs2_val == 2048,
+// opcode: sw; op1:x10; op2:x8; op2val:0x800; immval:-0x1; align:0
+TEST_STORE(x5,x12,0,x10,x8,0x800,-0x1,128,sw,0)
+
+inst_17:
+// rs1==x30, rs2==x28, rs2_val == 4096,
+// opcode: sw; op1:x30; op2:x28; op2val:0x1000; immval:0x555; align:0
+TEST_STORE(x5,x12,0,x30,x28,0x1000,0x555,136,sw,0)
+
+inst_18:
+// rs1==x9, rs2==x20, rs2_val == 8192,
+// opcode: sw; op1:x9; op2:x20; op2val:0x2000; immval:0x80; align:0
+TEST_STORE(x5,x12,0,x9,x20,0x2000,0x80,144,sw,0)
+
+inst_19:
+// rs1==x18, rs2==x23, rs2_val == 16384,
+// opcode: sw; op1:x18; op2:x23; op2val:0x4000; immval:-0x800; align:0
+TEST_STORE(x5,x9,0,x18,x23,0x4000,-0x800,152,sw,0)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_20:
+// rs1==x4, rs2==x3, rs2_val == 32768,
+// opcode: sw; op1:x4; op2:x3; op2val:0x8000; immval:0x5; align:0
+TEST_STORE(x2,x9,0,x4,x3,0x8000,0x5,0,sw,0)
+
+inst_21:
+// rs1==x8, rs2==x12, rs2_val == 65536,
+// opcode: sw; op1:x8; op2:x12; op2val:0x10000; immval:-0x3; align:0
+TEST_STORE(x2,x9,0,x8,x12,0x10000,-0x3,8,sw,0)
+
+inst_22:
+// rs1==x25, rs2==x5, rs2_val == 131072,
+// opcode: sw; op1:x25; op2:x5; op2val:0x20000; immval:0x6; align:0
+TEST_STORE(x2,x9,0,x25,x5,0x20000,0x6,16,sw,0)
+
+inst_23:
+// rs1==x27, rs2==x7, rs2_val == 262144,
+// opcode: sw; op1:x27; op2:x7; op2val:0x40000; immval:-0x6; align:0
+TEST_STORE(x2,x9,0,x27,x7,0x40000,-0x6,24,sw,0)
+
+inst_24:
+// rs1==x22, rs2==x0, rs2_val == 524288,
+// opcode: sw; op1:x22; op2:x0; op2val:0x0; immval:0x4; align:0
+TEST_STORE(x2,x9,0,x22,x0,0x0,0x4,32,sw,0)
+
+inst_25:
+// rs1==x1, rs2==x15, rs2_val == 1048576,
+// opcode: sw; op1:x1; op2:x15; op2val:0x100000; immval:-0x4; align:0
+TEST_STORE(x2,x9,0,x1,x15,0x100000,-0x4,40,sw,0)
+
+inst_26:
+// rs1==x5, rs2==x22, rs2_val == 2097152,
+// opcode: sw; op1:x5; op2:x22; op2val:0x200000; immval:0x4; align:0
+TEST_STORE(x2,x9,0,x5,x22,0x200000,0x4,48,sw,0)
+
+inst_27:
+// rs1==x6, rs2==x24, rs2_val == 4194304,
+// opcode: sw; op1:x6; op2:x24; op2val:0x400000; immval:0x4; align:0
+TEST_STORE(x2,x9,0,x6,x24,0x400000,0x4,56,sw,0)
+
+inst_28:
+// rs1==x12, rs2==x11, rs2_val == 8388608,
+// opcode: sw; op1:x12; op2:x11; op2val:0x800000; immval:-0x401; align:0
+TEST_STORE(x2,x9,0,x12,x11,0x800000,-0x401,64,sw,0)
+
+inst_29:
+// rs1==x20, rs2==x30, rs2_val == 16777216,
+// opcode: sw; op1:x20; op2:x30; op2val:0x1000000; immval:0x9; align:0
+TEST_STORE(x2,x9,0,x20,x30,0x1000000,0x9,72,sw,0)
+
+inst_30:
+// rs1==x19, rs2==x18, rs2_val == 33554432,
+// opcode: sw; op1:x19; op2:x18; op2val:0x2000000; immval:0x20; align:0
+TEST_STORE(x2,x9,0,x19,x18,0x2000000,0x20,80,sw,0)
+
+inst_31:
+// rs2==x13, rs2_val == 67108864,
+// opcode: sw; op1:x7; op2:x13; op2val:0x4000000; immval:0x6; align:0
+TEST_STORE(x2,x9,0,x7,x13,0x4000000,0x6,88,sw,0)
+
+inst_32:
+// rs2_val == 134217728,
+// opcode: sw; op1:x10; op2:x11; op2val:0x8000000; immval:0x7ff; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x8000000,0x7ff,96,sw,0)
+
+inst_33:
+// rs2_val == 268435456,
+// opcode: sw; op1:x10; op2:x11; op2val:0x10000000; immval:0x10; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x10000000,0x10,104,sw,0)
+
+inst_34:
+// rs2_val == 536870912,
+// opcode: sw; op1:x10; op2:x11; op2val:0x20000000; immval:0x2; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x20000000,0x2,112,sw,0)
+
+inst_35:
+// rs2_val == 1073741824,
+// opcode: sw; op1:x10; op2:x11; op2val:0x40000000; immval:-0x800; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x40000000,-0x800,120,sw,0)
+
+inst_36:
+// rs2_val == 2147483648,
+// opcode: sw; op1:x10; op2:x11; op2val:0x80000000; immval:0x20; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x80000000,0x20,128,sw,0)
+
+inst_37:
+// rs2_val == 4294967296,
+// opcode: sw; op1:x10; op2:x11; op2val:0x100000000; immval:-0x400; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x100000000,-0x400,136,sw,0)
+
+inst_38:
+// rs2_val == 8589934592,
+// opcode: sw; op1:x10; op2:x11; op2val:0x200000000; immval:-0x21; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x200000000,-0x21,144,sw,0)
+
+inst_39:
+// rs2_val == 17179869184,
+// opcode: sw; op1:x10; op2:x11; op2val:0x400000000; immval:0x3; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x400000000,0x3,152,sw,0)
+
+inst_40:
+// rs2_val == 34359738368,
+// opcode: sw; op1:x10; op2:x11; op2val:0x800000000; immval:-0x2; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x800000000,-0x2,160,sw,0)
+
+inst_41:
+// rs2_val == 68719476736,
+// opcode: sw; op1:x10; op2:x11; op2val:0x1000000000; immval:-0x41; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x1000000000,-0x41,168,sw,0)
+
+inst_42:
+// rs2_val == 137438953472,
+// opcode: sw; op1:x10; op2:x11; op2val:0x2000000000; immval:-0xa; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x2000000000,-0xa,176,sw,0)
+
+inst_43:
+// rs2_val == 274877906944,
+// opcode: sw; op1:x10; op2:x11; op2val:0x4000000000; immval:0x8; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x4000000000,0x8,184,sw,0)
+
+inst_44:
+// rs2_val == 549755813888,
+// opcode: sw; op1:x10; op2:x11; op2val:0x8000000000; immval:-0x101; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x8000000000,-0x101,192,sw,0)
+
+inst_45:
+// rs2_val == 1099511627776,
+// opcode: sw; op1:x10; op2:x11; op2val:0x10000000000; immval:-0x8; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x10000000000,-0x8,200,sw,0)
+
+inst_46:
+// rs2_val == 2199023255552,
+// opcode: sw; op1:x10; op2:x11; op2val:0x20000000000; immval:-0x11; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x20000000000,-0x11,208,sw,0)
+
+inst_47:
+// rs2_val == 4398046511104,
+// opcode: sw; op1:x10; op2:x11; op2val:0x40000000000; immval:0x6; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x40000000000,0x6,216,sw,0)
+
+inst_48:
+// rs2_val == 8796093022208,
+// opcode: sw; op1:x10; op2:x11; op2val:0x80000000000; immval:-0x4; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x80000000000,-0x4,224,sw,0)
+
+inst_49:
+// rs2_val == 17592186044416,
+// opcode: sw; op1:x10; op2:x11; op2val:0x100000000000; immval:-0x41; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x100000000000,-0x41,232,sw,0)
+
+inst_50:
+// rs2_val == 35184372088832,
+// opcode: sw; op1:x10; op2:x11; op2val:0x200000000000; immval:-0x401; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x200000000000,-0x401,240,sw,0)
+
+inst_51:
+// rs2_val == 70368744177664,
+// opcode: sw; op1:x10; op2:x11; op2val:0x400000000000; immval:-0x401; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x400000000000,-0x401,248,sw,0)
+
+inst_52:
+// rs2_val == 140737488355328,
+// opcode: sw; op1:x10; op2:x11; op2val:0x800000000000; immval:-0x400; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x800000000000,-0x400,256,sw,0)
+
+inst_53:
+// rs2_val == 281474976710656,
+// opcode: sw; op1:x10; op2:x11; op2val:0x1000000000000; immval:0x100; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x1000000000000,0x100,264,sw,0)
+
+inst_54:
+// rs2_val == 562949953421312,
+// opcode: sw; op1:x10; op2:x11; op2val:0x2000000000000; immval:-0x101; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x2000000000000,-0x101,272,sw,0)
+
+inst_55:
+// rs2_val == 1125899906842624,
+// opcode: sw; op1:x10; op2:x11; op2val:0x4000000000000; immval:-0x8; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x4000000000000,-0x8,280,sw,0)
+
+inst_56:
+// rs2_val == 2251799813685248,
+// opcode: sw; op1:x10; op2:x11; op2val:0x8000000000000; immval:0x2; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x8000000000000,0x2,288,sw,0)
+
+inst_57:
+// rs2_val == 4503599627370496,
+// opcode: sw; op1:x10; op2:x11; op2val:0x10000000000000; immval:0x8; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x10000000000000,0x8,296,sw,0)
+
+inst_58:
+// rs2_val == 9007199254740992,
+// opcode: sw; op1:x10; op2:x11; op2val:0x20000000000000; immval:0x10; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x20000000000000,0x10,304,sw,0)
+
+inst_59:
+// rs2_val == 18014398509481984,
+// opcode: sw; op1:x10; op2:x11; op2val:0x40000000000000; immval:0x4; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x40000000000000,0x4,312,sw,0)
+
+inst_60:
+// rs2_val == 36028797018963968,
+// opcode: sw; op1:x10; op2:x11; op2val:0x80000000000000; immval:0x5; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x80000000000000,0x5,320,sw,0)
+
+inst_61:
+// rs2_val == 72057594037927936,
+// opcode: sw; op1:x10; op2:x11; op2val:0x100000000000000; immval:0x0; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x100000000000000,0x0,328,sw,0)
+
+inst_62:
+// rs2_val == 288230376151711744,
+// opcode: sw; op1:x10; op2:x11; op2val:0x400000000000000; immval:-0x4; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x400000000000000,-0x4,336,sw,0)
+
+inst_63:
+// rs2_val == 576460752303423488,
+// opcode: sw; op1:x10; op2:x11; op2val:0x800000000000000; immval:-0x401; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x800000000000000,-0x401,344,sw,0)
+
+inst_64:
+// rs2_val == 1152921504606846976,
+// opcode: sw; op1:x10; op2:x11; op2val:0x1000000000000000; immval:-0x3; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x1000000000000000,-0x3,352,sw,0)
+
+inst_65:
+// rs2_val == 2305843009213693952,
+// opcode: sw; op1:x10; op2:x11; op2val:0x2000000000000000; immval:-0x201; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x2000000000000000,-0x201,360,sw,0)
+
+inst_66:
+// rs2_val == 4611686018427387904,
+// opcode: sw; op1:x10; op2:x11; op2val:0x4000000000000000; immval:0x20; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x4000000000000000,0x20,368,sw,0)
+
+inst_67:
+// rs2_val == -2,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x2; immval:-0x9; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x2,-0x9,376,sw,0)
+
+inst_68:
+// rs2_val == -18014398509481985,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x40000000000001; immval:-0x7; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x40000000000001,-0x7,384,sw,0)
+
+inst_69:
+// rs2_val == -36028797018963969,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x80000000000001; immval:0x7ff; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x80000000000001,0x7ff,392,sw,0)
+
+inst_70:
+// rs2_val == -72057594037927937,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x100000000000001; immval:0x5; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x100000000000001,0x5,400,sw,0)
+
+inst_71:
+// rs2_val == -144115188075855873,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x200000000000001; immval:0x80; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x200000000000001,0x80,408,sw,0)
+
+inst_72:
+// rs2_val == -288230376151711745,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x400000000000001; immval:0x555; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x400000000000001,0x555,416,sw,0)
+
+inst_73:
+// rs2_val == -576460752303423489,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x800000000000001; immval:0x400; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x800000000000001,0x400,424,sw,0)
+
+inst_74:
+// rs2_val == -1152921504606846977,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x1000000000000001; immval:-0x11; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x1000000000000001,-0x11,432,sw,0)
+
+inst_75:
+// rs2_val == -2305843009213693953,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x2000000000000001; immval:-0x81; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x2000000000000001,-0x81,440,sw,0)
+
+inst_76:
+// rs2_val == -4611686018427387905,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x4000000000000001; immval:-0x4; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x4000000000000001,-0x4,448,sw,0)
+
+inst_77:
+// rs2_val == 6148914691236517205,
+// opcode: sw; op1:x10; op2:x11; op2val:0x5555555555555555; immval:-0x81; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x5555555555555555,-0x81,456,sw,0)
+
+inst_78:
+// rs2_val == -6148914691236517206,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x5555555555555556; immval:0x555; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x5555555555555556,0x555,464,sw,0)
+
+inst_79:
+// rs2_val == -3,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x3; immval:0x555; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x3,0x555,472,sw,0)
+
+inst_80:
+// rs2_val == -5,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x5; immval:0x5; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x5,0x5,480,sw,0)
+
+inst_81:
+// rs2_val == -9,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x9; immval:-0x201; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x9,-0x201,488,sw,0)
+
+inst_82:
+// rs2_val == -17,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x11; immval:-0x556; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x11,-0x556,496,sw,0)
+
+inst_83:
+// rs2_val == -65,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x41; immval:0x5; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x41,0x5,504,sw,0)
+
+inst_84:
+// rs2_val == -129,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x81; immval:-0x2; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x81,-0x2,512,sw,0)
+
+inst_85:
+// rs2_val == -257,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x101; immval:-0x556; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x101,-0x556,520,sw,0)
+
+inst_86:
+// rs2_val == -513,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x201; immval:0x4; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x201,0x4,528,sw,0)
+
+inst_87:
+// rs2_val == -1025,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x401; immval:-0xa; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x401,-0xa,536,sw,0)
+
+inst_88:
+// rs2_val == -2049,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x801; immval:0x2; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x801,0x2,544,sw,0)
+
+inst_89:
+// rs2_val == -4097,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x1001; immval:-0x556; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x1001,-0x556,552,sw,0)
+
+inst_90:
+// rs2_val == -8193,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x2001; immval:0x40; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x2001,0x40,560,sw,0)
+
+inst_91:
+// rs2_val == -16385,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x4001; immval:-0x7; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x4001,-0x7,568,sw,0)
+
+inst_92:
+// rs2_val == -32769,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x8001; immval:-0x41; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x8001,-0x41,576,sw,0)
+
+inst_93:
+// rs2_val == -65537,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x10001; immval:-0x400; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x10001,-0x400,584,sw,0)
+
+inst_94:
+// rs2_val == -131073,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x20001; immval:0x5; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x20001,0x5,592,sw,0)
+
+inst_95:
+// rs2_val == -262145,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x40001; immval:0x1; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x40001,0x1,600,sw,0)
+
+inst_96:
+// rs2_val == -524289,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x80001; immval:-0x556; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x80001,-0x556,608,sw,0)
+
+inst_97:
+// rs2_val == -1048577,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x100001; immval:0x200; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x100001,0x200,616,sw,0)
+
+inst_98:
+// rs2_val == -2097153,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x200001; immval:-0x3; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x200001,-0x3,624,sw,0)
+
+inst_99:
+// rs2_val == -4194305,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x400001; immval:0x4; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x400001,0x4,632,sw,0)
+
+inst_100:
+// rs2_val == -8388609,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x800001; immval:-0x4; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x800001,-0x4,640,sw,0)
+
+inst_101:
+// rs2_val == -16777217,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x1000001; immval:0x7; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x1000001,0x7,648,sw,0)
+
+inst_102:
+// rs2_val == -33554433,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x2000001; immval:-0x3; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x2000001,-0x3,656,sw,0)
+
+inst_103:
+// rs2_val == -67108865,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x4000001; immval:-0x5; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x4000001,-0x5,664,sw,0)
+
+inst_104:
+// rs2_val == -134217729,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x8000001; immval:-0x201; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x8000001,-0x201,672,sw,0)
+
+inst_105:
+// rs2_val == -268435457,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x10000001; immval:-0x41; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x10000001,-0x41,680,sw,0)
+
+inst_106:
+// rs2_val == -536870913,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x20000001; immval:-0x556; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x20000001,-0x556,688,sw,0)
+
+inst_107:
+// rs2_val == -1073741825,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x40000001; immval:0x200; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x40000001,0x200,696,sw,0)
+
+inst_108:
+// rs2_val == -2147483649,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x80000001; immval:0x3ff; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x80000001,0x3ff,704,sw,0)
+
+inst_109:
+// rs2_val == -4294967297,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x100000001; immval:-0x201; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x100000001,-0x201,712,sw,0)
+
+inst_110:
+// rs2_val == -8589934593,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x200000001; immval:0x7ff; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x200000001,0x7ff,720,sw,0)
+
+inst_111:
+// rs2_val == -17179869185,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x400000001; immval:0x8; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x400000001,0x8,728,sw,0)
+
+inst_112:
+// rs2_val == -34359738369,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x800000001; immval:-0x7; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x800000001,-0x7,736,sw,0)
+
+inst_113:
+// rs2_val == -68719476737,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x1000000001; immval:0x10; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x1000000001,0x10,744,sw,0)
+
+inst_114:
+// rs2_val == -137438953473,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x2000000001; immval:0x100; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x2000000001,0x100,752,sw,0)
+
+inst_115:
+// rs2_val == -274877906945,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x4000000001; immval:-0x5; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x4000000001,-0x5,760,sw,0)
+
+inst_116:
+// rs2_val == -549755813889,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x8000000001; immval:0x400; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x8000000001,0x400,768,sw,0)
+
+inst_117:
+// rs2_val == -1099511627777,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x10000000001; immval:-0x4; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x10000000001,-0x4,776,sw,0)
+
+inst_118:
+// rs2_val == -2199023255553,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x20000000001; immval:0x2; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x20000000001,0x2,784,sw,0)
+
+inst_119:
+// rs2_val == -4398046511105,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x40000000001; immval:0x80; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x40000000001,0x80,792,sw,0)
+
+inst_120:
+// rs2_val == -8796093022209,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x80000000001; immval:-0x400; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x80000000001,-0x400,800,sw,0)
+
+inst_121:
+// rs2_val == -17592186044417,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x100000000001; immval:0x1; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x100000000001,0x1,808,sw,0)
+
+inst_122:
+// rs2_val == -35184372088833,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x200000000001; immval:-0x1; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x200000000001,-0x1,816,sw,0)
+
+inst_123:
+// rs2_val == -70368744177665,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x400000000001; immval:-0x3; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x400000000001,-0x3,824,sw,0)
+
+inst_124:
+// rs2_val == -140737488355329,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x800000000001; immval:0x9; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x800000000001,0x9,832,sw,0)
+
+inst_125:
+// rs2_val == -281474976710657,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x1000000000001; immval:-0x3; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x1000000000001,-0x3,840,sw,0)
+
+inst_126:
+// rs2_val == -562949953421313,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x2000000000001; immval:0x10; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x2000000000001,0x10,848,sw,0)
+
+inst_127:
+// rs2_val == -1125899906842625,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x4000000000001; immval:0x3; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x4000000000001,0x3,856,sw,0)
+
+inst_128:
+// rs2_val == -2251799813685249,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x8000000000001; immval:0x7; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x8000000000001,0x7,864,sw,0)
+
+inst_129:
+// rs2_val == -4503599627370497,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x10000000000001; immval:-0x81; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x10000000000001,-0x81,872,sw,0)
+
+inst_130:
+// rs2_val == -9007199254740993,
+// opcode: sw; op1:x10; op2:x11; op2val:-0x20000000000001; immval:0x2; align:0
+TEST_STORE(x2,x9,0,x10,x11,-0x20000000000001,0x2,880,sw,0)
+
+inst_131:
+// rs2_val == 524288,
+// opcode: sw; op1:x10; op2:x11; op2val:0x80000; immval:0x4; align:0
+TEST_STORE(x2,x9,0,x10,x11,0x80000,0x4,888,sw,0)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x5_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x5_1:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 112*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/xor-01.S b/riscof/suite/rv64i_m/I/xor-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..3b8912e1eed72c8b5bc1fddae2ccceeb63bc3a7e
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/xor-01.S
@@ -0,0 +1,3464 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the xor instruction of the RISC-V I extension for the xor covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",xor)
+
+RVTEST_SIGBASE( x9,signature_x9_1)
+
+inst_0:
+// rs1 == rs2 != rd, rs1==x19, rs2==x19, rd==x12, rs1_val > 0 and rs2_val > 0, rs2_val == 576460752303423488, rs1_val == 18014398509481984, rs1_val != rs2_val
+// opcode: xor ; op1:x19; op2:x19; dest:x12; op1val:0x40000000000000; op2val:0x40000000000000
+TEST_RR_OP(xor, x12, x19, x19, 0x0, 0x40000000000000, 0x40000000000000, x9, 0, x5)
+
+inst_1:
+// rs2 == rd != rs1, rs1==x28, rs2==x2, rd==x2, rs1_val > 0 and rs2_val < 0, rs2_val == -2199023255553
+// opcode: xor ; op1:x28; op2:x2; dest:x2; op1val:0x5; op2val:-0x20000000001
+TEST_RR_OP(xor, x2, x28, x2, 0xfffffdfffffffffa, 0x5, -0x20000000001, x9, 8, x5)
+
+inst_2:
+// rs1 == rs2 == rd, rs1==x31, rs2==x31, rd==x31, rs1_val < 0 and rs2_val < 0, rs1_val == -17179869185, rs2_val == -1025
+// opcode: xor ; op1:x31; op2:x31; dest:x31; op1val:-0x400000001; op2val:-0x400000001
+TEST_RR_OP(xor, x31, x31, x31, 0x0, -0x400000001, -0x400000001, x9, 16, x5)
+
+inst_3:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x11, rs2==x25, rd==x10, rs1_val < 0 and rs2_val > 0, rs1_val == -1048577, rs2_val == 36028797018963968
+// opcode: xor ; op1:x11; op2:x25; dest:x10; op1val:-0x100001; op2val:0x80000000000000
+TEST_RR_OP(xor, x10, x11, x25, 0xff7fffffffefffff, -0x100001, 0x80000000000000, x9, 24, x5)
+
+inst_4:
+// rs1 == rd != rs2, rs1==x17, rs2==x20, rd==x17, rs1_val == rs2_val, rs2_val == 134217728, rs1_val == 134217728
+// opcode: xor ; op1:x17; op2:x20; dest:x17; op1val:0x8000000; op2val:0x8000000
+TEST_RR_OP(xor, x17, x17, x20, 0x0, 0x8000000, 0x8000000, x9, 32, x5)
+
+inst_5:
+// rs1==x24, rs2==x22, rd==x3, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808
+// opcode: xor ; op1:x24; op2:x22; dest:x3; op1val:0x5; op2val:-0x8000000000000000
+TEST_RR_OP(xor, x3, x24, x22, 0x8000000000000005, 0x5, -0x8000000000000000, x9, 40, x5)
+
+inst_6:
+// rs1==x8, rs2==x3, rd==x22, rs2_val == 0, rs1_val==2 and rs2_val==0, rs1_val == 2
+// opcode: xor ; op1:x8; op2:x3; dest:x22; op1val:0x2; op2val:0x0
+TEST_RR_OP(xor, x22, x8, x3, 0x2, 0x2, 0x0, x9, 48, x5)
+
+inst_7:
+// rs1==x10, rs2==x14, rd==x24, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807, rs1_val == -72057594037927937
+// opcode: xor ; op1:x10; op2:x14; dest:x24; op1val:-0x100000000000001; op2val:0x7fffffffffffffff
+TEST_RR_OP(xor, x24, x10, x14, 0x8100000000000000, -0x100000000000001, 0x7fffffffffffffff, x9, 56, x5)
+
+inst_8:
+// rs1==x2, rs2==x4, rd==x15, rs2_val == 1, rs1_val == -281474976710657
+// opcode: xor ; op1:x2; op2:x4; dest:x15; op1val:-0x1000000000001; op2val:0x1
+TEST_RR_OP(xor, x15, x2, x4, 0xfffefffffffffffe, -0x1000000000001, 0x1, x9, 64, x5)
+
+inst_9:
+// rs1==x21, rs2==x29, rd==x23, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808, rs2_val == 4
+// opcode: xor ; op1:x21; op2:x29; dest:x23; op1val:-0x8000000000000000; op2val:0x4
+TEST_RR_OP(xor, x23, x21, x29, 0x8000000000000004, -0x8000000000000000, 0x4, x9, 72, x5)
+
+inst_10:
+// rs1==x0, rs2==x7, rd==x11, rs1_val == 0, rs2_val == -16385
+// opcode: xor ; op1:x0; op2:x7; dest:x11; op1val:0x0; op2val:-0x4001
+TEST_RR_OP(xor, x11, x0, x7, 0xffffffffffffbfff, 0x0, -0x4001, x9, 80, x5)
+
+inst_11:
+// rs1==x18, rs2==x16, rd==x0, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807
+// opcode: xor ; op1:x18; op2:x16; dest:x0; op1val:0x7fffffffffffffff; op2val:0x7
+TEST_RR_OP(xor, x0, x18, x16, 0, 0x7fffffffffffffff, 0x7, x9, 88, x5)
+
+inst_12:
+// rs1==x25, rs2==x27, rd==x14, rs1_val == 1, rs2_val == 8388608
+// opcode: xor ; op1:x25; op2:x27; dest:x14; op1val:0x1; op2val:0x800000
+TEST_RR_OP(xor, x14, x25, x27, 0x800001, 0x1, 0x800000, x9, 96, x5)
+
+inst_13:
+// rs1==x30, rs2==x23, rd==x29, rs2_val == 2, rs1_val == 137438953472
+// opcode: xor ; op1:x30; op2:x23; dest:x29; op1val:0x2000000000; op2val:0x2
+TEST_RR_OP(xor, x29, x30, x23, 0x2000000002, 0x2000000000, 0x2, x9, 104, x5)
+
+inst_14:
+// rs1==x6, rs2==x1, rd==x28, rs2_val == 8,
+// opcode: xor ; op1:x6; op2:x1; dest:x28; op1val:0x6; op2val:0x8
+TEST_RR_OP(xor, x28, x6, x1, 0xe, 0x6, 0x8, x9, 112, x5)
+
+inst_15:
+// rs1==x12, rs2==x5, rd==x19, rs2_val == 16, rs1_val == 1125899906842624
+// opcode: xor ; op1:x12; op2:x5; dest:x19; op1val:0x4000000000000; op2val:0x10
+TEST_RR_OP(xor, x19, x12, x5, 0x4000000000010, 0x4000000000000, 0x10, x9, 120, x11)
+RVTEST_SIGBASE( x2,signature_x2_0)
+
+inst_16:
+// rs1==x20, rs2==x8, rd==x1, rs2_val == 32, rs1_val == -5
+// opcode: xor ; op1:x20; op2:x8; dest:x1; op1val:-0x5; op2val:0x20
+TEST_RR_OP(xor, x1, x20, x8, 0xffffffffffffffdb, -0x5, 0x20, x2, 0, x11)
+
+inst_17:
+// rs1==x1, rs2==x17, rd==x13, rs2_val == 64, rs1_val == 274877906944
+// opcode: xor ; op1:x1; op2:x17; dest:x13; op1val:0x4000000000; op2val:0x40
+TEST_RR_OP(xor, x13, x1, x17, 0x4000000040, 0x4000000000, 0x40, x2, 8, x11)
+
+inst_18:
+// rs1==x7, rs2==x28, rd==x21, rs2_val == 128, rs1_val == -16777217
+// opcode: xor ; op1:x7; op2:x28; dest:x21; op1val:-0x1000001; op2val:0x80
+TEST_RR_OP(xor, x21, x7, x28, 0xfffffffffeffff7f, -0x1000001, 0x80, x2, 16, x11)
+
+inst_19:
+// rs1==x14, rs2==x9, rd==x7, rs2_val == 256, rs1_val == -36028797018963969
+// opcode: xor ; op1:x14; op2:x9; dest:x7; op1val:-0x80000000000001; op2val:0x100
+TEST_RR_OP(xor, x7, x14, x9, 0xff7ffffffffffeff, -0x80000000000001, 0x100, x2, 24, x11)
+
+inst_20:
+// rs1==x4, rs2==x21, rd==x25, rs2_val == 512,
+// opcode: xor ; op1:x4; op2:x21; dest:x25; op1val:0x4000000000; op2val:0x200
+TEST_RR_OP(xor, x25, x4, x21, 0x4000000200, 0x4000000000, 0x200, x2, 32, x11)
+
+inst_21:
+// rs1==x22, rs2==x0, rd==x5, rs2_val == 1024, rs1_val == 524288
+// opcode: xor ; op1:x22; op2:x0; dest:x5; op1val:0x80000; op2val:0x0
+TEST_RR_OP(xor, x5, x22, x0, 0x80000, 0x80000, 0x0, x2, 40, x11)
+
+inst_22:
+// rs1==x5, rs2==x30, rd==x4, rs2_val == 2048, rs1_val == 512
+// opcode: xor ; op1:x5; op2:x30; dest:x4; op1val:0x200; op2val:0x800
+TEST_RR_OP(xor, x4, x5, x30, 0xa00, 0x200, 0x800, x2, 48, x11)
+
+inst_23:
+// rs1==x16, rs2==x15, rd==x30, rs2_val == 4096,
+// opcode: xor ; op1:x16; op2:x15; dest:x30; op1val:0x7; op2val:0x1000
+TEST_RR_OP(xor, x30, x16, x15, 0x1007, 0x7, 0x1000, x2, 56, x11)
+
+inst_24:
+// rs1==x13, rs2==x12, rd==x16, rs2_val == 8192, rs1_val == 268435456
+// opcode: xor ; op1:x13; op2:x12; dest:x16; op1val:0x10000000; op2val:0x2000
+TEST_RR_OP(xor, x16, x13, x12, 0x10002000, 0x10000000, 0x2000, x2, 64, x11)
+
+inst_25:
+// rs1==x15, rs2==x10, rd==x9, rs2_val == 16384,
+// opcode: xor ; op1:x15; op2:x10; dest:x9; op1val:-0x8; op2val:0x4000
+TEST_RR_OP(xor, x9, x15, x10, 0xffffffffffffbff8, -0x8, 0x4000, x2, 72, x11)
+
+inst_26:
+// rs1==x29, rs2==x6, rd==x18, rs2_val == 32768, rs1_val == 16777216
+// opcode: xor ; op1:x29; op2:x6; dest:x18; op1val:0x1000000; op2val:0x8000
+TEST_RR_OP(xor, x18, x29, x6, 0x1008000, 0x1000000, 0x8000, x2, 80, x11)
+
+inst_27:
+// rs1==x27, rs2==x24, rd==x6, rs2_val == 65536,
+// opcode: xor ; op1:x27; op2:x24; dest:x6; op1val:0x6; op2val:0x10000
+TEST_RR_OP(xor, x6, x27, x24, 0x10006, 0x6, 0x10000, x2, 88, x11)
+
+inst_28:
+// rs1==x3, rs2==x26, rd==x8, rs2_val == 131072,
+// opcode: xor ; op1:x3; op2:x26; dest:x8; op1val:0x6666666666666665; op2val:0x20000
+TEST_RR_OP(xor, x8, x3, x26, 0x6666666666646665, 0x6666666666666665, 0x20000, x2, 96, x11)
+
+inst_29:
+// rs1==x26, rs2==x18, rd==x27, rs2_val == 262144, rs1_val == -67108865
+// opcode: xor ; op1:x26; op2:x18; dest:x27; op1val:-0x4000001; op2val:0x40000
+TEST_RR_OP(xor, x27, x26, x18, 0xfffffffffbfbffff, -0x4000001, 0x40000, x2, 104, x3)
+
+inst_30:
+// rs1==x9, rs2==x11, rd==x26, rs2_val == 524288, rs1_val == -131073
+// opcode: xor ; op1:x9; op2:x11; dest:x26; op1val:-0x20001; op2val:0x80000
+TEST_RR_OP(xor, x26, x9, x11, 0xfffffffffff5ffff, -0x20001, 0x80000, x2, 112, x3)
+
+inst_31:
+// rs1==x23, rs2==x13, rd==x20, rs2_val == 1048576, rs1_val == -2097153
+// opcode: xor ; op1:x23; op2:x13; dest:x20; op1val:-0x200001; op2val:0x100000
+TEST_RR_OP(xor, x20, x23, x13, 0xffffffffffcfffff, -0x200001, 0x100000, x2, 120, x3)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_32:
+// rs2_val == 2097152, rs1_val == 1152921504606846976
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:0x200000
+TEST_RR_OP(xor, x12, x10, x11, 0x1000000000200000, 0x1000000000000000, 0x200000, x1, 0, x3)
+
+inst_33:
+// rs2_val == 4194304, rs1_val == -4398046511105
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:0x400000
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffbffffbfffff, -0x40000000001, 0x400000, x1, 8, x3)
+
+inst_34:
+// rs2_val == 16777216,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x1000000
+TEST_RR_OP(xor, x12, x10, x11, 0x1000000, 0x0, 0x1000000, x1, 16, x3)
+
+inst_35:
+// rs2_val == 33554432, rs1_val == 4096
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:0x2000000
+TEST_RR_OP(xor, x12, x10, x11, 0x2001000, 0x1000, 0x2000000, x1, 24, x3)
+
+inst_36:
+// rs2_val == 67108864, rs1_val == 72057594037927936
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000000; op2val:0x4000000
+TEST_RR_OP(xor, x12, x10, x11, 0x100000004000000, 0x100000000000000, 0x4000000, x1, 32, x3)
+
+inst_37:
+// rs2_val == 268435456, rs1_val == 33554432
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x10000000
+TEST_RR_OP(xor, x12, x10, x11, 0x12000000, 0x2000000, 0x10000000, x1, 40, x3)
+
+inst_38:
+// rs2_val == 536870912, rs1_val == -8193
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x20000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffdfffdfff, -0x2001, 0x20000000, x1, 48, x3)
+
+inst_39:
+// rs2_val == 1073741824, rs1_val == 34359738368
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:0x40000000
+TEST_RR_OP(xor, x12, x10, x11, 0x840000000, 0x800000000, 0x40000000, x1, 56, x3)
+
+inst_40:
+// rs2_val == 2147483648, rs1_val == -549755813889
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:0x80000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffff7f7fffffff, -0x8000000001, 0x80000000, x1, 64, x3)
+
+inst_41:
+// rs2_val == 4294967296, rs1_val == 288230376151711744
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:0x100000000
+TEST_RR_OP(xor, x12, x10, x11, 0x400000100000000, 0x400000000000000, 0x100000000, x1, 72, x3)
+
+inst_42:
+// rs2_val == 8589934592, rs1_val == 32
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:0x200000000
+TEST_RR_OP(xor, x12, x10, x11, 0x200000020, 0x20, 0x200000000, x1, 80, x3)
+
+inst_43:
+// rs2_val == 17179869184, rs1_val == -513
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x400000000
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffbfffffdff, -0x201, 0x400000000, x1, 88, x3)
+
+inst_44:
+// rs2_val == 34359738368, rs1_val == -274877906945
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0x800000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffb7ffffffff, -0x4000000001, 0x800000000, x1, 96, x3)
+
+inst_45:
+// rs2_val == 68719476736,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0x1000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffafffffffff, -0x4000000001, 0x1000000000, x1, 104, x3)
+
+inst_46:
+// rs2_val == 137438953472, rs1_val == -65
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x2000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffdfffffffbf, -0x41, 0x2000000000, x1, 112, x3)
+
+inst_47:
+// rs2_val == 274877906944, rs1_val == -137438953473
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:0x4000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffff9fffffffff, -0x2000000001, 0x4000000000, x1, 120, x3)
+
+inst_48:
+// rs2_val == 549755813888, rs1_val == -33
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x8000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffff7fffffffdf, -0x21, 0x8000000000, x1, 128, x3)
+
+inst_49:
+// rs2_val == 1099511627776, rs1_val == -17592186044417
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:0x10000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffeeffffffffff, -0x100000000001, 0x10000000000, x1, 136, x3)
+
+inst_50:
+// rs2_val == 2199023255552, rs1_val == 131072
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0x20000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x20000020000, 0x20000, 0x20000000000, x1, 144, x3)
+
+inst_51:
+// rs2_val == 4398046511104, rs1_val == 8192
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:0x40000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x40000002000, 0x2000, 0x40000000000, x1, 152, x3)
+
+inst_52:
+// rs2_val == 8796093022208, rs1_val == 281474976710656
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:0x80000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x1080000000000, 0x1000000000000, 0x80000000000, x1, 160, x3)
+
+inst_53:
+// rs2_val == 17592186044416, rs1_val == -129
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x100000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffefffffffff7f, -0x81, 0x100000000000, x1, 168, x3)
+
+inst_54:
+// rs2_val == 35184372088832,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:0x200000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffdfffffffff7f, -0x81, 0x200000000000, x1, 176, x3)
+
+inst_55:
+// rs2_val == 70368744177664,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x400000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffbfffffffdfff, -0x2001, 0x400000000000, x1, 184, x3)
+
+inst_56:
+// rs2_val == 140737488355328,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x800000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffff7fffffefffff, -0x100001, 0x800000000000, x1, 192, x3)
+
+inst_57:
+// rs2_val == 281474976710656, rs1_val == -4294967297
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:0x1000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xfffefffeffffffff, -0x100000001, 0x1000000000000, x1, 200, x3)
+
+inst_58:
+// rs2_val == 562949953421312, rs1_val == 256
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:0x2000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x2000000000100, 0x100, 0x2000000000000, x1, 208, x3)
+
+inst_59:
+// rs2_val == 1125899906842624,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x4000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xfffbffff4afb0ccd, -0xb504f333, 0x4000000000000, x1, 216, x3)
+
+inst_60:
+// rs2_val == 2251799813685248, rs1_val == -4194305
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:0x8000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xfff7ffffffbfffff, -0x400001, 0x8000000000000, x1, 224, x3)
+
+inst_61:
+// rs2_val == 4503599627370496, rs1_val == 4
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x10000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x10000000000004, 0x4, 0x10000000000000, x1, 232, x3)
+
+inst_62:
+// rs2_val == 9007199254740992,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:0x20000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x20002000000000, 0x2000000000, 0x20000000000000, x1, 240, x3)
+
+inst_63:
+// rs2_val == 18014398509481984,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x40000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x5515555555555554, 0x5555555555555554, 0x40000000000000, x1, 248, x3)
+
+inst_64:
+// rs2_val == 72057594037927936, rs1_val == -1073741825
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:0x100000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xfeffffffbfffffff, -0x40000001, 0x100000000000000, x1, 256, x3)
+
+inst_65:
+// rs2_val == 144115188075855872, rs1_val == -2
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x200000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xfdfffffffffffffe, -0x2, 0x200000000000000, x1, 264, x3)
+
+inst_66:
+// rs2_val == 288230376151711744,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x400000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x400000000000004, 0x4, 0x400000000000000, x1, 272, x3)
+
+inst_67:
+// rs2_val == 1152921504606846976,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x1000000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x1000000000000003, 0x3, 0x1000000000000000, x1, 280, x3)
+
+inst_68:
+// rs2_val == 2305843009213693952,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x2000000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xdfffffff4afb0ccd, -0xb504f333, 0x2000000000000000, x1, 288, x3)
+
+inst_69:
+// rs2_val == 4611686018427387904,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:0x4000000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xbfffffffffffffdf, -0x21, 0x4000000000000000, x1, 296, x3)
+
+inst_70:
+// rs2_val == -2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:-0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffdfe, 0x200, -0x2, x1, 304, x3)
+
+inst_71:
+// rs2_val == -3, rs1_val == 6148914691236517205
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaa8, 0x5555555555555555, -0x3, x1, 312, x3)
+
+inst_72:
+// rs2_val == -5, rs1_val == -68719476737
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:-0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x1000000004, -0x1000000001, -0x5, x1, 320, x3)
+
+inst_73:
+// rs2_val == -9,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x9
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffff3, 0x4, -0x9, x1, 328, x3)
+
+inst_74:
+// rs2_val == -17, rs1_val == 144115188075855872
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:-0x11
+TEST_RR_OP(xor, x12, x10, x11, 0xfdffffffffffffef, 0x200000000000000, -0x11, x1, 336, x3)
+
+inst_75:
+// rs2_val == -33,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:-0x21
+TEST_RR_OP(xor, x12, x10, x11, 0x1000000000020, -0x1000000000001, -0x21, x1, 344, x3)
+
+inst_76:
+// rs2_val == -65, rs1_val == 9007199254740992
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:-0x41
+TEST_RR_OP(xor, x12, x10, x11, 0xffdfffffffffffbf, 0x20000000000000, -0x41, x1, 352, x3)
+
+inst_77:
+// rs2_val == -129, rs1_val == -6148914691236517206
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x81
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555555555d5, -0x5555555555555556, -0x81, x1, 360, x3)
+
+inst_78:
+// rs2_val == -257, rs1_val == 1073741824
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:-0x101
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffbffffeff, 0x40000000, -0x101, x1, 368, x3)
+
+inst_79:
+// rs2_val == -513,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x201
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaa8aa, 0x5555555555555555, -0x201, x1, 376, x3)
+
+inst_80:
+// rs2_val == -2049,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x801
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffff7fb, 0x4, -0x801, x1, 384, x3)
+
+inst_81:
+// rs2_val == -4097,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x1001
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555554554, -0x5555555555555555, -0x1001, x1, 392, x3)
+
+inst_82:
+// rs2_val == -8193,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x2001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffffdffd, 0x2, -0x2001, x1, 400, x3)
+
+inst_83:
+// rs2_val == -32769,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x8001
+TEST_RR_OP(xor, x12, x10, x11, 0x555555555555d555, -0x5555555555555556, -0x8001, x1, 408, x3)
+
+inst_84:
+// rs2_val == -65537, rs1_val == 4611686018427387904
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:-0x10001
+TEST_RR_OP(xor, x12, x10, x11, 0xbffffffffffeffff, 0x4000000000000000, -0x10001, x1, 416, x3)
+
+inst_85:
+// rs2_val == -131073, rs1_val == 2097152
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:-0x20001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffddffff, 0x200000, -0x20001, x1, 424, x3)
+
+inst_86:
+// rs2_val == -262145,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x400001; op2val:-0x40001
+TEST_RR_OP(xor, x12, x10, x11, 0x440000, -0x400001, -0x40001, x1, 432, x3)
+
+inst_87:
+// rs2_val == -524289,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x80001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4af30ccc, 0xb504f333, -0x80001, x1, 440, x3)
+
+inst_88:
+// rs2_val == -1048577, rs1_val == -18014398509481985
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000000001; op2val:-0x100001
+TEST_RR_OP(xor, x12, x10, x11, 0x40000000100000, -0x40000000000001, -0x100001, x1, 448, x3)
+
+inst_89:
+// rs2_val == -2097153, rs1_val == -536870913
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:-0x200001
+TEST_RR_OP(xor, x12, x10, x11, 0x20200000, -0x20000001, -0x200001, x1, 456, x3)
+
+inst_90:
+// rs2_val == -4194305, rs1_val == 549755813888
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000; op2val:-0x400001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffff7fffbfffff, 0x8000000000, -0x400001, x1, 464, x3)
+
+inst_91:
+// rs2_val == -8388609,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:-0x800001
+TEST_RR_OP(xor, x12, x10, x11, 0x40800000, -0x40000001, -0x800001, x1, 472, x3)
+
+inst_92:
+// rs2_val == -16777217, rs1_val == 4294967296
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:-0x1000001
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffefeffffff, 0x100000000, -0x1000001, x1, 480, x3)
+
+inst_93:
+// rs2_val == -33554433,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:-0x2000001
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffdfffffe, 0x1, -0x2000001, x1, 488, x3)
+
+inst_94:
+// rs2_val == -67108865,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x4000001
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffbfffffc, 0x3, -0x4000001, x1, 496, x3)
+
+inst_95:
+// rs2_val == -134217729,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x8000001
+TEST_RR_OP(xor, x12, x10, x11, 0xbd04f332, -0xb504f333, -0x8000001, x1, 504, x3)
+
+inst_96:
+// rs2_val == -268435457, rs1_val == 140737488355328
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:-0x10000001
+TEST_RR_OP(xor, x12, x10, x11, 0xffff7fffefffffff, 0x800000000000, -0x10000001, x1, 512, x3)
+
+inst_97:
+// rs2_val == -536870913, rs1_val == 32768
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x20000001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffdfff7fff, 0x8000, -0x20000001, x1, 520, x3)
+
+inst_98:
+// rs2_val == -1073741825,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:-0x40000001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffbff7ffff, 0x80000, -0x40000001, x1, 528, x3)
+
+inst_99:
+// rs2_val == -2147483649,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x80000001
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555d5555555, -0x5555555555555556, -0x80000001, x1, 536, x3)
+
+inst_100:
+// rs2_val == -4294967297,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:-0x100000001
+TEST_RR_OP(xor, x12, x10, x11, 0xfffefffeffffffff, 0x1000000000000, -0x100000001, x1, 544, x3)
+
+inst_101:
+// rs2_val == -8589934593, rs1_val == 8589934592
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:-0x200000001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffffffff, 0x200000000, -0x200000001, x1, 552, x3)
+
+inst_102:
+// rs2_val == -17179869185,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:-0x400000001
+TEST_RR_OP(xor, x12, x10, x11, 0x8400000000, -0x8000000001, -0x400000001, x1, 560, x3)
+
+inst_103:
+// rs2_val == -34359738369,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000000000; op2val:-0x800000001
+TEST_RR_OP(xor, x12, x10, x11, 0x7ffffff7ffffffff, -0x8000000000000000, -0x800000001, x1, 568, x3)
+
+inst_104:
+// rs2_val == -68719476737, rs1_val == -144115188075855873
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:-0x1000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x200001000000000, -0x200000000000001, -0x1000000001, x1, 576, x3)
+
+inst_105:
+// rs2_val == -137438953473, rs1_val == 8
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:-0x2000000001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffdffffffff7, 0x8, -0x2000000001, x1, 584, x3)
+
+inst_106:
+// rs2_val == -274877906945, rs1_val == -32769
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:-0x4000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x4000008000, -0x8001, -0x4000000001, x1, 592, x3)
+
+inst_107:
+// rs2_val == -549755813889, rs1_val == -16385
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:-0x8000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x8000004000, -0x4001, -0x8000000001, x1, 600, x3)
+
+inst_108:
+// rs2_val == -1099511627777,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000000000; op2val:-0x10000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x7ffffeffffffffff, -0x8000000000000000, -0x10000000001, x1, 608, x3)
+
+inst_109:
+// rs2_val == -4398046511105,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:-0x40000000001
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffbfffdffffff, 0x2000000, -0x40000000001, x1, 616, x3)
+
+inst_110:
+// rs2_val == -8796093022209,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x80000000001
+TEST_RR_OP(xor, x12, x10, x11, 0xfffff7fffffffffc, 0x3, -0x80000000001, x1, 624, x3)
+
+inst_111:
+// rs2_val == -17592186044417,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:-0x100000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x200100000000000, -0x200000000000001, -0x100000000001, x1, 632, x3)
+
+inst_112:
+// rs2_val == -35184372088833,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x200000000001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffdfffffffffff, 0x0, -0x200000000001, x1, 640, x3)
+
+inst_113:
+// rs2_val == -70368744177665, rs1_val == -257
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:-0x400000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x400000000100, -0x101, -0x400000000001, x1, 648, x3)
+
+inst_114:
+// rs2_val == -140737488355329,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x800000000001
+TEST_RR_OP(xor, x12, x10, x11, 0xcccc4ccccccccccb, 0x3333333333333334, -0x800000000001, x1, 656, x3)
+
+inst_115:
+// rs2_val == -281474976710657,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:-0x1000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0xfffefffffffdffff, 0x20000, -0x1000000000001, x1, 664, x3)
+
+inst_116:
+// rs2_val == -562949953421313,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:-0x2000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x2040000000000, -0x40000000001, -0x2000000000001, x1, 672, x3)
+
+inst_117:
+// rs2_val == -1125899906842625,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:-0x4000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x4000000000200, -0x201, -0x4000000000001, x1, 680, x3)
+
+inst_118:
+// rs2_val == -2251799813685249,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x8000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0xaaa2aaaaaaaaaaaa, 0x5555555555555555, -0x8000000000001, x1, 688, x3)
+
+inst_119:
+// rs2_val == -4503599627370497, rs1_val == 2199023255552
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000; op2val:-0x10000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0xffeffdffffffffff, 0x20000000000, -0x10000000000001, x1, 696, x3)
+
+inst_120:
+// rs2_val == -9007199254740993, rs1_val == 262144
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:-0x20000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0xffdffffffffbffff, 0x40000, -0x20000000000001, x1, 704, x3)
+
+inst_121:
+// rs2_val == -18014398509481985, rs1_val == -2049
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:-0x40000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x40000000000800, -0x801, -0x40000000000001, x1, 712, x3)
+
+inst_122:
+// rs2_val == -36028797018963969,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x1; op2val:-0x80000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0xff7ffffffffffffe, 0x1, -0x80000000000001, x1, 720, x3)
+
+inst_123:
+// rs2_val == -72057594037927937,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:-0x100000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x100000040000000, -0x40000001, -0x100000000000001, x1, 728, x3)
+
+inst_124:
+// rs2_val == -144115188075855873,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x7; op2val:-0x200000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x200000000000006, -0x7, -0x200000000000001, x1, 736, x3)
+
+inst_125:
+// rs2_val == -288230376151711745,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x400000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0xfbfffffffffffffb, 0x4, -0x400000000000001, x1, 744, x3)
+
+inst_126:
+// rs2_val == -576460752303423489,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x6; op2val:-0x800000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x800000000000005, -0x6, -0x800000000000001, x1, 752, x3)
+
+inst_127:
+// rs2_val == -1152921504606846977, rs1_val == 36028797018963968
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:-0x1000000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0xef7fffffffffffff, 0x80000000000000, -0x1000000000000001, x1, 760, x3)
+
+inst_128:
+// rs2_val == -2305843009213693953,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:-0x2000000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x2000001000000000, -0x1000000001, -0x2000000000000001, x1, 768, x3)
+
+inst_129:
+// rs2_val == -4611686018427387905,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x4000000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x40000000b504f332, -0xb504f333, -0x4000000000000001, x1, 776, x3)
+
+inst_130:
+// rs2_val == 6148914691236517205, rs1_val==3 and rs2_val==6148914691236517205
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555556, 0x3, 0x5555555555555555, x1, 784, x3)
+
+inst_131:
+// rs2_val == -6148914691236517206, rs1_val==4 and rs2_val==-6148914691236517206
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaae, 0x4, -0x5555555555555556, x1, 792, x3)
+
+inst_132:
+// rs1_val == 16,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x10; op2val:0x100000000
+TEST_RR_OP(xor, x12, x10, x11, 0x100000010, 0x10, 0x100000000, x1, 800, x3)
+
+inst_133:
+// rs1_val == 64,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:0x7
+TEST_RR_OP(xor, x12, x10, x11, 0x47, 0x40, 0x7, x1, 808, x3)
+
+inst_134:
+// rs1_val == 128,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:-0x200000001
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffdffffff7f, 0x80, -0x200000001, x1, 816, x3)
+
+inst_135:
+// rs1_val == 1024,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:0x40000
+TEST_RR_OP(xor, x12, x10, x11, 0x40400, 0x400, 0x40000, x1, 824, x3)
+
+inst_136:
+// rs1_val == 2048,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333b34, 0x800, 0x3333333333333334, x1, 832, x3)
+
+inst_137:
+// rs1_val == 16384,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:-0x40001
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffbbfff, 0x4000, -0x40001, x1, 840, x3)
+
+inst_138:
+// rs1_val == 65536,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:-0x8001
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffe7fff, 0x10000, -0x8001, x1, 848, x3)
+
+inst_139:
+// rs1_val == 1048576,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:-0x401
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffeffbff, 0x100000, -0x401, x1, 856, x3)
+
+inst_140:
+// rs1_val == 4194304,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:-0x1000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0xfffeffffffbfffff, 0x400000, -0x1000000000001, x1, 864, x3)
+
+inst_141:
+// rs1_val == 8388608,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:-0x2001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffff7fdfff, 0x800000, -0x2001, x1, 872, x3)
+
+inst_142:
+// rs1_val == 67108864,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x800000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x800000004000000, 0x4000000, 0x800000000000000, x1, 880, x3)
+
+inst_143:
+// rs1_val == 536870912,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555575555555, 0x20000000, 0x5555555555555555, x1, 888, x3)
+
+inst_144:
+// rs1_val == 2147483648,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:0x40000
+TEST_RR_OP(xor, x12, x10, x11, 0x80040000, 0x80000000, 0x40000, x1, 896, x3)
+
+inst_145:
+// rs1_val == 17179869184,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:-0x41
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffbffffffbf, 0x400000000, -0x41, x1, 904, x3)
+
+inst_146:
+// rs1_val == 68719476736,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffef4afb0ccd, 0x1000000000, -0xb504f333, x1, 912, x3)
+
+inst_147:
+// rs1_val == 1099511627776,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x100000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x110000000000, 0x10000000000, 0x100000000000, x1, 920, x3)
+
+inst_148:
+// rs1_val == 4398046511104,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:0x10000000
+TEST_RR_OP(xor, x12, x10, x11, 0x40010000000, 0x40000000000, 0x10000000, x1, 928, x3)
+
+inst_149:
+// rs1_val == 8796093022208,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:0x20000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xa0000000000, 0x80000000000, 0x20000000000, x1, 936, x3)
+
+inst_150:
+// rs1_val == 17592186044416,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:-0x400001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffefffffbfffff, 0x100000000000, -0x400001, x1, 944, x3)
+
+inst_151:
+// rs1_val == 35184372088832,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:-0x40000001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffdfffbfffffff, 0x200000000000, -0x40000001, x1, 952, x3)
+
+inst_152:
+// rs1_val == 70368744177664,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:0x20000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x20400000000000, 0x400000000000, 0x20000000000000, x1, 960, x3)
+
+inst_153:
+// rs1_val == 562949953421312,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:0x4000000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x4002000000000000, 0x2000000000000, 0x4000000000000000, x1, 968, x3)
+
+inst_154:
+// rs1_val == 2251799813685248,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:0x80000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x88000000000000, 0x8000000000000, 0x80000000000000, x1, 976, x3)
+
+inst_155:
+// rs1_val == 4503599627370496,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:0x200000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x10200000000000, 0x10000000000000, 0x200000000000, x1, 984, x3)
+
+inst_156:
+// rs1_val == 576460752303423488,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:-0x40001
+TEST_RR_OP(xor, x12, x10, x11, 0xf7fffffffffbffff, 0x800000000000000, -0x40001, x1, 992, x3)
+
+inst_157:
+// rs1_val == 2305843009213693952,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:0x8000
+TEST_RR_OP(xor, x12, x10, x11, 0x2000000000008000, 0x2000000000000000, 0x8000, x1, 1000, x3)
+
+inst_158:
+// rs1_val == -3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:0x10
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffffffed, -0x3, 0x10, x1, 1008, x3)
+
+inst_159:
+// rs1_val == -9,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:-0x1000001
+TEST_RR_OP(xor, x12, x10, x11, 0x1000008, -0x9, -0x1000001, x1, 1016, x3)
+
+inst_160:
+// rs1_val == -17,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:0x100000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffefffef, -0x11, 0x100000, x1, 1024, x3)
+
+inst_161:
+// rs1_val == -1025,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x401; op2val:0x4000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffbffffffbff, -0x401, 0x4000000000, x1, 1032, x3)
+
+inst_162:
+// rs1_val == -4097,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffffeffb, -0x1001, 0x4, x1, 1040, x3)
+
+inst_163:
+// rs1_val == -65537,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afa0ccd, -0x10001, 0xb504f332, x1, 1048, x3)
+
+inst_164:
+// rs1_val == -262145,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0x1
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffbfffe, -0x40001, 0x1, x1, 1056, x3)
+
+inst_165:
+// rs1_val == -524289,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x2000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xfffdfffffff7ffff, -0x80001, 0x2000000000000, x1, 1064, x3)
+
+inst_166:
+// rs1_val == -8388609,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:0x200000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffff5fffff, -0x800001, 0x200000, x1, 1072, x3)
+
+inst_167:
+// rs1_val == -33554433,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:0x20000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffdffffffdffffff, -0x2000001, 0x20000000000000, x1, 1080, x3)
+
+inst_168:
+// rs1_val == -134217729,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:0x800000000
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffff7f7ffffff, -0x8000001, 0x800000000, x1, 1088, x3)
+
+inst_169:
+// rs1_val == -268435457,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x7fffffffffffffff
+TEST_RR_OP(xor, x12, x10, x11, 0x8000000010000000, -0x10000001, 0x7fffffffffffffff, x1, 1096, x3)
+
+inst_170:
+// rs1_val == -2147483649,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:0x8000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff7fff7fff, -0x80000001, 0x8000, x1, 1104, x3)
+
+inst_171:
+// rs1_val == -8589934593,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:-0x4000000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x3ffffffdffffffff, -0x200000001, -0x4000000000000000, x1, 1112, x3)
+
+inst_172:
+// rs1_val == -34359738369,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffff7ffffffff, -0x800000001, 0x0, x1, 1120, x3)
+
+inst_173:
+// rs1_val == -1099511627777,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:-0x8000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x18000000000, -0x10000000001, -0x8000000001, x1, 1128, x3)
+
+inst_174:
+// rs1_val == -2199023255553,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:0x40
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffdffffffffbf, -0x20000000001, 0x40, x1, 1136, x3)
+
+inst_175:
+// rs1_val == -8796093022209,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x800b504f332, -0x80000000001, -0xb504f333, x1, 1144, x3)
+
+inst_176:
+// rs1_val == -35184372088833,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:-0x80000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x80200000000000, -0x200000000001, -0x80000000000001, x1, 1152, x3)
+
+inst_177:
+// rs1_val == -70368744177665,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaeaaaaaaaaaab, -0x400000000001, 0x5555555555555554, x1, 1160, x3)
+
+inst_178:
+// rs1_val == -140737488355329,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x999919999999999a, -0x800000000001, 0x6666666666666665, x1, 1168, x3)
+
+inst_179:
+// rs1_val == -562949953421313,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:0x2000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffffffff, -0x2000000000001, 0x2000000000000, x1, 1176, x3)
+
+inst_180:
+// rs1_val == -1125899906842625,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:-0x401
+TEST_RR_OP(xor, x12, x10, x11, 0x4000000000400, -0x4000000000001, -0x401, x1, 1184, x3)
+
+inst_181:
+// rs1_val == -2251799813685249,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:0x800000000000
+TEST_RR_OP(xor, x12, x10, x11, 0xfff77fffffffffff, -0x8000000000001, 0x800000000000, x1, 1192, x3)
+
+inst_182:
+// rs1_val == -4503599627370497,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xffefffffffffffff, -0x10000000000001, 0x0, x1, 1200, x3)
+
+inst_183:
+// rs1_val == -9007199254740993,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:-0x80001
+TEST_RR_OP(xor, x12, x10, x11, 0x20000000080000, -0x20000000000001, -0x80001, x1, 1208, x3)
+
+inst_184:
+// rs1_val == -288230376151711745,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000000001; op2val:-0x2000000000001
+TEST_RR_OP(xor, x12, x10, x11, 0x402000000000000, -0x400000000000001, -0x2000000000001, x1, 1216, x3)
+
+inst_185:
+// rs1_val == -576460752303423489,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:-0x20001
+TEST_RR_OP(xor, x12, x10, x11, 0x800000000020000, -0x800000000000001, -0x20001, x1, 1224, x3)
+
+inst_186:
+// rs1_val == -1152921504606846977,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xefffffffffffffff, -0x1000000000000001, 0x0, x1, 1232, x3)
+
+inst_187:
+// rs1_val == -2305843009213693953,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0xeccccccccccccccb, -0x2000000000000001, 0x3333333333333334, x1, 1240, x3)
+
+inst_188:
+// rs1_val == -4611686018427387905,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:0x20
+TEST_RR_OP(xor, x12, x10, x11, 0xbfffffffffffffdf, -0x4000000000000001, 0x20, x1, 1248, x3)
+
+inst_189:
+// rs1_val==3 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x3, 0x3, x1, 1256, x3)
+
+inst_190:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x3, -0x5555555555555556, x1, 1264, x3)
+
+inst_191:
+// rs1_val==3 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x3, 0x5, x1, 1272, x3)
+
+inst_192:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333330, 0x3, 0x3333333333333333, x1, 1280, x3)
+
+inst_193:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666665, 0x3, 0x6666666666666666, x1, 1288, x3)
+
+inst_194:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0cce, 0x3, -0xb504f333, x1, 1296, x3)
+
+inst_195:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f330, 0x3, 0xb504f333, x1, 1304, x3)
+
+inst_196:
+// rs1_val==3 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x3, 0x2, x1, 1312, x3)
+
+inst_197:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555557, 0x3, 0x5555555555555554, x1, 1320, x3)
+
+inst_198:
+// rs1_val==3 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x3, 0x0, x1, 1328, x3)
+
+inst_199:
+// rs1_val==3 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0x3, 0x4, x1, 1336, x3)
+
+inst_200:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333331, 0x3, 0x3333333333333332, x1, 1344, x3)
+
+inst_201:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666666, 0x3, 0x6666666666666665, x1, 1352, x3)
+
+inst_202:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f331, 0x3, 0xb504f332, x1, 1360, x3)
+
+inst_203:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555555, 0x3, 0x5555555555555556, x1, 1368, x3)
+
+inst_204:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaa8, 0x3, -0x5555555555555555, x1, 1376, x3)
+
+inst_205:
+// rs1_val==3 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x5, 0x3, 0x6, x1, 1384, x3)
+
+inst_206:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333337, 0x3, 0x3333333333333334, x1, 1392, x3)
+
+inst_207:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666664, 0x3, 0x6666666666666667, x1, 1400, x3)
+
+inst_208:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0ccd, 0x3, -0xb504f332, x1, 1408, x3)
+
+inst_209:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f337, 0x3, 0xb504f334, x1, 1416, x3)
+
+inst_210:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555556, 0x5555555555555555, 0x3, x1, 1424, x3)
+
+inst_211:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x5555555555555555, 0x5555555555555555, x1, 1432, x3)
+
+inst_212:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffffffff, 0x5555555555555555, -0x5555555555555556, x1, 1440, x3)
+
+inst_213:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555550, 0x5555555555555555, 0x5, x1, 1448, x3)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666666, 0x5555555555555555, 0x3333333333333333, x1, 1456, x3)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333333, 0x5555555555555555, 0x6666666666666666, x1, 1464, x3)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5998, 0x5555555555555555, -0xb504f333, x1, 1472, x3)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a666, 0x5555555555555555, 0xb504f333, x1, 1480, x3)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555557, 0x5555555555555555, 0x2, x1, 1488, x3)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x5555555555555555, 0x5555555555555554, x1, 1496, x3)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555555, 0x5555555555555555, 0x0, x1, 1504, x3)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555551, 0x5555555555555555, 0x4, x1, 1512, x3)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666667, 0x5555555555555555, 0x3333333333333332, x1, 1520, x3)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333330, 0x5555555555555555, 0x6666666666666665, x1, 1528, x3)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a667, 0x5555555555555555, 0xb504f332, x1, 1536, x3)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x5555555555555555, 0x5555555555555556, x1, 1544, x3)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffe, 0x5555555555555555, -0x5555555555555555, x1, 1552, x3)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555553, 0x5555555555555555, 0x6, x1, 1560, x3)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666661, 0x5555555555555555, 0x3333333333333334, x1, 1568, x3)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333332, 0x5555555555555555, 0x6666666666666667, x1, 1576, x3)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae599b, 0x5555555555555555, -0xb504f332, x1, 1584, x3)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a661, 0x5555555555555555, 0xb504f334, x1, 1592, x3)
+
+inst_232:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaa9, -0x5555555555555556, 0x3, x1, 1600, x3)
+
+inst_233:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffffffff, -0x5555555555555556, 0x5555555555555555, x1, 1608, x3)
+
+inst_234:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x0, -0x5555555555555556, -0x5555555555555556, x1, 1616, x3)
+
+inst_235:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555556, 0x5, x1, 1624, x3)
+
+inst_236:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x9999999999999999, -0x5555555555555556, 0x3333333333333333, x1, 1632, x3)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccccccccccc, -0x5555555555555556, 0x6666666666666666, x1, 1640, x3)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a667, -0x5555555555555556, -0xb504f333, x1, 1648, x3)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5999, -0x5555555555555556, 0xb504f333, x1, 1656, x3)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaa8, -0x5555555555555556, 0x2, x1, 1664, x3)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffe, -0x5555555555555556, 0x5555555555555554, x1, 1672, x3)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x0, x1, 1680, x3)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x4, x1, 1688, x3)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x9999999999999998, -0x5555555555555556, 0x3333333333333332, x1, 1696, x3)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccccccccccf, -0x5555555555555556, 0x6666666666666665, x1, 1704, x3)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5998, -0x5555555555555556, 0xb504f332, x1, 1712, x3)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffc, -0x5555555555555556, 0x5555555555555556, x1, 1720, x3)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x1, -0x5555555555555556, -0x5555555555555555, x1, 1728, x3)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaac, -0x5555555555555556, 0x6, x1, 1736, x3)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x999999999999999e, -0x5555555555555556, 0x3333333333333334, x1, 1744, x3)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccccccccccd, -0x5555555555555556, 0x6666666666666667, x1, 1752, x3)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a664, -0x5555555555555556, -0xb504f332, x1, 1760, x3)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae599e, -0x5555555555555556, 0xb504f334, x1, 1768, x3)
+
+inst_254:
+// rs1_val==5 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x5, 0x3, x1, 1776, x3)
+
+inst_255:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555550, 0x5, 0x5555555555555555, x1, 1784, x3)
+
+inst_256:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x5, -0x5555555555555556, x1, 1792, x3)
+
+inst_257:
+// rs1_val==5 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x5, 0x5, x1, 1800, x3)
+
+inst_258:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333336, 0x5, 0x3333333333333333, x1, 1808, x3)
+
+inst_259:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666663, 0x5, 0x6666666666666666, x1, 1816, x3)
+
+inst_260:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0cc8, 0x5, -0xb504f333, x1, 1824, x3)
+
+inst_261:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f336, 0x5, 0xb504f333, x1, 1832, x3)
+
+inst_262:
+// rs1_val==5 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0x5, 0x2, x1, 1840, x3)
+
+inst_263:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555551, 0x5, 0x5555555555555554, x1, 1848, x3)
+
+inst_264:
+// rs1_val==5 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x5, 0x5, 0x0, x1, 1856, x3)
+
+inst_265:
+// rs1_val==5 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x5, 0x4, x1, 1864, x3)
+
+inst_266:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333337, 0x5, 0x3333333333333332, x1, 1872, x3)
+
+inst_267:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666660, 0x5, 0x6666666666666665, x1, 1880, x3)
+
+inst_268:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f337, 0x5, 0xb504f332, x1, 1888, x3)
+
+inst_269:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555553, 0x5, 0x5555555555555556, x1, 1896, x3)
+
+inst_270:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaae, 0x5, -0x5555555555555555, x1, 1904, x3)
+
+inst_271:
+// rs1_val==5 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x5, 0x6, x1, 1912, x3)
+
+inst_272:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333331, 0x5, 0x3333333333333334, x1, 1920, x3)
+
+inst_273:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666662, 0x5, 0x6666666666666667, x1, 1928, x3)
+
+inst_274:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0ccb, 0x5, -0xb504f332, x1, 1936, x3)
+
+inst_275:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f331, 0x5, 0xb504f334, x1, 1944, x3)
+
+inst_276:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333330, 0x3333333333333333, 0x3, x1, 1952, x3)
+
+inst_277:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666666, 0x3333333333333333, 0x5555555555555555, x1, 1960, x3)
+
+inst_278:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x9999999999999999, 0x3333333333333333, -0x5555555555555556, x1, 1968, x3)
+
+inst_279:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333336, 0x3333333333333333, 0x5, x1, 1976, x3)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x3333333333333333, 0x3333333333333333, x1, 1984, x3)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555555, 0x3333333333333333, 0x6666666666666666, x1, 1992, x3)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc79c83ffe, 0x3333333333333333, -0xb504f333, x1, 2000, x3)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c000, 0x3333333333333333, 0xb504f333, x1, 2008, x3)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333331, 0x3333333333333333, 0x2, x1, 2016, x3)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666667, 0x3333333333333333, 0x5555555555555554, x1, 2024, x3)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333333, 0x3333333333333333, 0x0, x1, 2032, x3)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333337, 0x3333333333333333, 0x4, x1, 2040, x3)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x3333333333333333, 0x3333333333333332, x1, 0, x3)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555556, 0x3333333333333333, 0x6666666666666665, x1, 8, x3)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c001, 0x3333333333333333, 0xb504f332, x1, 16, x3)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666665, 0x3333333333333333, 0x5555555555555556, x1, 24, x3)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x9999999999999998, 0x3333333333333333, -0x5555555555555555, x1, 32, x3)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333335, 0x3333333333333333, 0x6, x1, 40, x3)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0x3333333333333333, 0x3333333333333334, x1, 48, x3)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555554, 0x3333333333333333, 0x6666666666666667, x1, 56, x3)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc79c83ffd, 0x3333333333333333, -0xb504f332, x1, 64, x3)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c007, 0x3333333333333333, 0xb504f334, x1, 72, x3)
+
+inst_298:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666665, 0x6666666666666666, 0x3, x1, 80, x3)
+
+inst_299:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333333, 0x6666666666666666, 0x5555555555555555, x1, 88, x3)
+
+inst_300:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccccccccccc, 0x6666666666666666, -0x5555555555555556, x1, 96, x3)
+
+inst_301:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666663, 0x6666666666666666, 0x5, x1, 104, x3)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555555, 0x6666666666666666, 0x3333333333333333, x1, 112, x3)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x6666666666666666, 0x6666666666666666, x1, 120, x3)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x999999992c9d6aab, 0x6666666666666666, -0xb504f333, x1, 128, x3)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629555, 0x6666666666666666, 0xb504f333, x1, 136, x3)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666664, 0x6666666666666666, 0x2, x1, 144, x3)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333332, 0x6666666666666666, 0x5555555555555554, x1, 152, x3)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666666, 0x6666666666666666, 0x0, x1, 160, x3)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666662, 0x6666666666666666, 0x4, x1, 168, x3)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555554, 0x6666666666666666, 0x3333333333333332, x1, 176, x3)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x6666666666666666, 0x6666666666666665, x1, 184, x3)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629554, 0x6666666666666666, 0xb504f332, x1, 192, x3)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333330, 0x6666666666666666, 0x5555555555555556, x1, 200, x3)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccccccccccd, 0x6666666666666666, -0x5555555555555555, x1, 208, x3)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666660, 0x6666666666666666, 0x6, x1, 216, x3)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555552, 0x6666666666666666, 0x3333333333333334, x1, 224, x3)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x6666666666666666, 0x6666666666666667, x1, 232, x3)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x999999992c9d6aa8, 0x6666666666666666, -0xb504f332, x1, 240, x3)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629552, 0x6666666666666666, 0xb504f334, x1, 248, x3)
+
+inst_320:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0cce, -0xb504f333, 0x3, x1, 256, x3)
+
+inst_321:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5998, -0xb504f333, 0x5555555555555555, x1, 264, x3)
+
+inst_322:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a667, -0xb504f333, -0x5555555555555556, x1, 272, x3)
+
+inst_323:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0cc8, -0xb504f333, 0x5, x1, 280, x3)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc79c83ffe, -0xb504f333, 0x3333333333333333, x1, 288, x3)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x999999992c9d6aab, -0xb504f333, 0x6666666666666666, x1, 296, x3)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x0, -0xb504f333, -0xb504f333, x1, 304, x3)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffe, -0xb504f333, 0xb504f333, x1, 312, x3)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0ccf, -0xb504f333, 0x2, x1, 320, x3)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5999, -0xb504f333, 0x5555555555555554, x1, 328, x3)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0ccd, -0xb504f333, 0x0, x1, 336, x3)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0cc9, -0xb504f333, 0x4, x1, 344, x3)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc79c83fff, -0xb504f333, 0x3333333333333332, x1, 352, x3)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x999999992c9d6aa8, -0xb504f333, 0x6666666666666665, x1, 360, x3)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffffffff, -0xb504f333, 0xb504f332, x1, 368, x3)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae599b, -0xb504f333, 0x5555555555555556, x1, 376, x3)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a666, -0xb504f333, -0x5555555555555555, x1, 384, x3)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0ccb, -0xb504f333, 0x6, x1, 392, x3)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc79c83ff9, -0xb504f333, 0x3333333333333334, x1, 400, x3)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x999999992c9d6aaa, -0xb504f333, 0x6666666666666667, x1, 408, x3)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x3, -0xb504f333, -0xb504f332, x1, 416, x3)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffff9, -0xb504f333, 0xb504f334, x1, 424, x3)
+
+inst_342:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f330, 0xb504f333, 0x3, x1, 432, x3)
+
+inst_343:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a666, 0xb504f333, 0x5555555555555555, x1, 440, x3)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5999, 0xb504f333, -0x5555555555555556, x1, 448, x3)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f336, 0xb504f333, 0x5, x1, 456, x3)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c000, 0xb504f333, 0x3333333333333333, x1, 464, x3)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629555, 0xb504f333, 0x6666666666666666, x1, 472, x3)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffe, 0xb504f333, -0xb504f333, x1, 480, x3)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0xb504f333, 0xb504f333, x1, 488, x3)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f331, 0xb504f333, 0x2, x1, 496, x3)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a667, 0xb504f333, 0x5555555555555554, x1, 504, x3)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f333, 0xb504f333, 0x0, x1, 512, x3)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f337, 0xb504f333, 0x4, x1, 520, x3)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c001, 0xb504f333, 0x3333333333333332, x1, 528, x3)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629556, 0xb504f333, 0x6666666666666665, x1, 536, x3)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0xb504f333, 0xb504f332, x1, 544, x3)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a665, 0xb504f333, 0x5555555555555556, x1, 552, x3)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5998, 0xb504f333, -0x5555555555555555, x1, 560, x3)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f335, 0xb504f333, 0x6, x1, 568, x3)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c007, 0xb504f333, 0x3333333333333334, x1, 576, x3)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629554, 0xb504f333, 0x6666666666666667, x1, 584, x3)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffd, 0xb504f333, -0xb504f332, x1, 592, x3)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0xb504f333, 0xb504f334, x1, 600, x3)
+
+inst_364:
+// rs1_val==2 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x2, 0x3, x1, 608, x3)
+
+inst_365:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555557, 0x2, 0x5555555555555555, x1, 616, x3)
+
+inst_366:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaa8, 0x2, -0x5555555555555556, x1, 624, x3)
+
+inst_367:
+// rs1_val==2 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0x2, 0x5, x1, 632, x3)
+
+inst_368:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333331, 0x2, 0x3333333333333333, x1, 640, x3)
+
+inst_369:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666664, 0x2, 0x6666666666666666, x1, 648, x3)
+
+inst_370:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0ccf, 0x2, -0xb504f333, x1, 656, x3)
+
+inst_371:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f331, 0x2, 0xb504f333, x1, 664, x3)
+
+inst_372:
+// rs1_val==2 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x2, 0x2, x1, 672, x3)
+
+inst_373:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555556, 0x2, 0x5555555555555554, x1, 680, x3)
+
+inst_374:
+// rs1_val==2 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x2, 0x4, x1, 688, x3)
+
+inst_375:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333330, 0x2, 0x3333333333333332, x1, 696, x3)
+
+inst_376:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666667, 0x2, 0x6666666666666665, x1, 704, x3)
+
+inst_377:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f330, 0x2, 0xb504f332, x1, 712, x3)
+
+inst_378:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555554, 0x2, 0x5555555555555556, x1, 720, x3)
+
+inst_379:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaa9, 0x2, -0x5555555555555555, x1, 728, x3)
+
+inst_380:
+// rs1_val==2 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x4, 0x2, 0x6, x1, 736, x3)
+
+inst_381:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333336, 0x2, 0x3333333333333334, x1, 744, x3)
+
+inst_382:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666665, 0x2, 0x6666666666666667, x1, 752, x3)
+
+inst_383:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0ccc, 0x2, -0xb504f332, x1, 760, x3)
+
+inst_384:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f336, 0x2, 0xb504f334, x1, 768, x3)
+
+inst_385:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555557, 0x5555555555555554, 0x3, x1, 776, x3)
+
+inst_386:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x5555555555555554, 0x5555555555555555, x1, 784, x3)
+
+inst_387:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffe, 0x5555555555555554, -0x5555555555555556, x1, 792, x3)
+
+inst_388:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555551, 0x5555555555555554, 0x5, x1, 800, x3)
+
+inst_389:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666667, 0x5555555555555554, 0x3333333333333333, x1, 808, x3)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333332, 0x5555555555555554, 0x6666666666666666, x1, 816, x3)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5999, 0x5555555555555554, -0xb504f333, x1, 824, x3)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a667, 0x5555555555555554, 0xb504f333, x1, 832, x3)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555556, 0x5555555555555554, 0x2, x1, 840, x3)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x5555555555555554, 0x5555555555555554, x1, 848, x3)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555554, 0x5555555555555554, 0x0, x1, 856, x3)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555550, 0x5555555555555554, 0x4, x1, 864, x3)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666666, 0x5555555555555554, 0x3333333333333332, x1, 872, x3)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333331, 0x5555555555555554, 0x6666666666666665, x1, 880, x3)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a666, 0x5555555555555554, 0xb504f332, x1, 888, x3)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x5555555555555554, 0x5555555555555556, x1, 896, x3)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffffffff, 0x5555555555555554, -0x5555555555555555, x1, 904, x3)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555552, 0x5555555555555554, 0x6, x1, 912, x3)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666660, 0x5555555555555554, 0x3333333333333334, x1, 920, x3)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333333, 0x5555555555555554, 0x6666666666666667, x1, 928, x3)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae599a, 0x5555555555555554, -0xb504f332, x1, 936, x3)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a660, 0x5555555555555554, 0xb504f334, x1, 944, x3)
+
+inst_407:
+// rs1_val==0 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x0, 0x3, x1, 952, x3)
+
+inst_408:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555555, 0x0, 0x5555555555555555, x1, 960, x3)
+
+inst_409:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaaa, 0x0, -0x5555555555555556, x1, 968, x3)
+
+inst_410:
+// rs1_val==0 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x5, 0x0, 0x5, x1, 976, x3)
+
+inst_411:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333333, 0x0, 0x3333333333333333, x1, 984, x3)
+
+inst_412:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666666, 0x0, 0x6666666666666666, x1, 992, x3)
+
+inst_413:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0ccd, 0x0, -0xb504f333, x1, 1000, x3)
+
+inst_414:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f333, 0x0, 0xb504f333, x1, 1008, x3)
+
+inst_415:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0cce, 0x0, -0xb504f332, x1, 1016, x3)
+
+inst_416:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f334, 0x0, 0xb504f334, x1, 1024, x3)
+
+inst_417:
+// rs1_val==4 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0x4, 0x3, x1, 1032, x3)
+
+inst_418:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555551, 0x4, 0x5555555555555555, x1, 1040, x3)
+
+inst_419:
+// rs1_val==4 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x4, 0x5, x1, 1048, x3)
+
+inst_420:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333337, 0x4, 0x3333333333333333, x1, 1056, x3)
+
+inst_421:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666662, 0x4, 0x6666666666666666, x1, 1064, x3)
+
+inst_422:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0cc9, 0x4, -0xb504f333, x1, 1072, x3)
+
+inst_423:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f337, 0x4, 0xb504f333, x1, 1080, x3)
+
+inst_424:
+// rs1_val==4 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x4, 0x2, x1, 1088, x3)
+
+inst_425:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555550, 0x4, 0x5555555555555554, x1, 1096, x3)
+
+inst_426:
+// rs1_val==4 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x4, 0x4, 0x0, x1, 1104, x3)
+
+inst_427:
+// rs1_val==4 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x4, 0x4, x1, 1112, x3)
+
+inst_428:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333336, 0x4, 0x3333333333333332, x1, 1120, x3)
+
+inst_429:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666661, 0x4, 0x6666666666666665, x1, 1128, x3)
+
+inst_430:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f336, 0x4, 0xb504f332, x1, 1136, x3)
+
+inst_431:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555552, 0x4, 0x5555555555555556, x1, 1144, x3)
+
+inst_432:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, 0x4, -0x5555555555555555, x1, 1152, x3)
+
+inst_433:
+// rs1_val==4 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x4, 0x6, x1, 1160, x3)
+
+inst_434:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333330, 0x4, 0x3333333333333334, x1, 1168, x3)
+
+inst_435:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666663, 0x4, 0x6666666666666667, x1, 1176, x3)
+
+inst_436:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0cca, 0x4, -0xb504f332, x1, 1184, x3)
+
+inst_437:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f330, 0x4, 0xb504f334, x1, 1192, x3)
+
+inst_438:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333331, 0x3333333333333332, 0x3, x1, 1200, x3)
+
+inst_439:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666667, 0x3333333333333332, 0x5555555555555555, x1, 1208, x3)
+
+inst_440:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x9999999999999998, 0x3333333333333332, -0x5555555555555556, x1, 1216, x3)
+
+inst_441:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333337, 0x3333333333333332, 0x5, x1, 1224, x3)
+
+inst_442:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x3333333333333332, 0x3333333333333333, x1, 1232, x3)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555554, 0x3333333333333332, 0x6666666666666666, x1, 1240, x3)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc79c83fff, 0x3333333333333332, -0xb504f333, x1, 1248, x3)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c001, 0x3333333333333332, 0xb504f333, x1, 1256, x3)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333330, 0x3333333333333332, 0x2, x1, 1264, x3)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666666, 0x3333333333333332, 0x5555555555555554, x1, 1272, x3)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333332, 0x3333333333333332, 0x0, x1, 1280, x3)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333336, 0x3333333333333332, 0x4, x1, 1288, x3)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x3333333333333332, 0x3333333333333332, x1, 1296, x3)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555557, 0x3333333333333332, 0x6666666666666665, x1, 1304, x3)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c000, 0x3333333333333332, 0xb504f332, x1, 1312, x3)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666664, 0x3333333333333332, 0x5555555555555556, x1, 1320, x3)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x9999999999999999, 0x3333333333333332, -0x5555555555555555, x1, 1328, x3)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333334, 0x3333333333333332, 0x6, x1, 1336, x3)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x3333333333333332, 0x3333333333333334, x1, 1344, x3)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555555, 0x3333333333333332, 0x6666666666666667, x1, 1352, x3)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc79c83ffc, 0x3333333333333332, -0xb504f332, x1, 1360, x3)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c006, 0x3333333333333332, 0xb504f334, x1, 1368, x3)
+
+inst_460:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666666, 0x6666666666666665, 0x3, x1, 1376, x3)
+
+inst_461:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333330, 0x6666666666666665, 0x5555555555555555, x1, 1384, x3)
+
+inst_462:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccccccccccf, 0x6666666666666665, -0x5555555555555556, x1, 1392, x3)
+
+inst_463:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666660, 0x6666666666666665, 0x5, x1, 1400, x3)
+
+inst_464:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555556, 0x6666666666666665, 0x3333333333333333, x1, 1408, x3)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x6666666666666665, 0x6666666666666666, x1, 1416, x3)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x999999992c9d6aa8, 0x6666666666666665, -0xb504f333, x1, 1424, x3)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629556, 0x6666666666666665, 0xb504f333, x1, 1432, x3)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666667, 0x6666666666666665, 0x2, x1, 1440, x3)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333331, 0x6666666666666665, 0x5555555555555554, x1, 1448, x3)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666665, 0x6666666666666665, 0x0, x1, 1456, x3)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666661, 0x6666666666666665, 0x4, x1, 1464, x3)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555557, 0x6666666666666665, 0x3333333333333332, x1, 1472, x3)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x6666666666666665, 0x6666666666666665, x1, 1480, x3)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629557, 0x6666666666666665, 0xb504f332, x1, 1488, x3)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333333, 0x6666666666666665, 0x5555555555555556, x1, 1496, x3)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xccccccccccccccce, 0x6666666666666665, -0x5555555555555555, x1, 1504, x3)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666663, 0x6666666666666665, 0x6, x1, 1512, x3)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555551, 0x6666666666666665, 0x3333333333333334, x1, 1520, x3)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x6666666666666665, 0x6666666666666667, x1, 1528, x3)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x999999992c9d6aab, 0x6666666666666665, -0xb504f332, x1, 1536, x3)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629551, 0x6666666666666665, 0xb504f334, x1, 1544, x3)
+
+inst_482:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f331, 0xb504f332, 0x3, x1, 1552, x3)
+
+inst_483:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a667, 0xb504f332, 0x5555555555555555, x1, 1560, x3)
+
+inst_484:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5998, 0xb504f332, -0x5555555555555556, x1, 1568, x3)
+
+inst_485:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f337, 0xb504f332, 0x5, x1, 1576, x3)
+
+inst_486:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c001, 0xb504f332, 0x3333333333333333, x1, 1584, x3)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629554, 0xb504f332, 0x6666666666666666, x1, 1592, x3)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffffffff, 0xb504f332, -0xb504f333, x1, 1600, x3)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0xb504f332, 0xb504f333, x1, 1608, x3)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f330, 0xb504f332, 0x2, x1, 1616, x3)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a666, 0xb504f332, 0x5555555555555554, x1, 1624, x3)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f332, 0xb504f332, 0x0, x1, 1632, x3)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f336, 0xb504f332, 0x4, x1, 1640, x3)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c000, 0xb504f332, 0x3333333333333332, x1, 1648, x3)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629557, 0xb504f332, 0x6666666666666665, x1, 1656, x3)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0xb504f332, 0xb504f332, x1, 1664, x3)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a664, 0xb504f332, 0x5555555555555556, x1, 1672, x3)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5999, 0xb504f332, -0x5555555555555555, x1, 1680, x3)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f334, 0xb504f332, 0x6, x1, 1688, x3)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c006, 0xb504f332, 0x3333333333333334, x1, 1696, x3)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629555, 0xb504f332, 0x6666666666666667, x1, 1704, x3)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffc, 0xb504f332, -0xb504f332, x1, 1712, x3)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0xb504f332, 0xb504f334, x1, 1720, x3)
+
+inst_504:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555555, 0x5555555555555556, 0x3, x1, 1728, x3)
+
+inst_505:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x5555555555555556, 0x5555555555555555, x1, 1736, x3)
+
+inst_506:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffc, 0x5555555555555556, -0x5555555555555556, x1, 1744, x3)
+
+inst_507:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555553, 0x5555555555555556, 0x5, x1, 1752, x3)
+
+inst_508:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666665, 0x5555555555555556, 0x3333333333333333, x1, 1760, x3)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333330, 0x5555555555555556, 0x6666666666666666, x1, 1768, x3)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae599b, 0x5555555555555556, -0xb504f333, x1, 1776, x3)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a665, 0x5555555555555556, 0xb504f333, x1, 1784, x3)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555554, 0x5555555555555556, 0x2, x1, 1792, x3)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x5555555555555556, 0x5555555555555554, x1, 1800, x3)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555556, 0x5555555555555556, 0x0, x1, 1808, x3)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555552, 0x5555555555555556, 0x4, x1, 1816, x3)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666664, 0x5555555555555556, 0x3333333333333332, x1, 1824, x3)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333333, 0x5555555555555556, 0x6666666666666665, x1, 1832, x3)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a664, 0x5555555555555556, 0xb504f332, x1, 1840, x3)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x5555555555555556, 0x5555555555555556, x1, 1848, x3)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffd, 0x5555555555555556, -0x5555555555555555, x1, 1856, x3)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555550, 0x5555555555555556, 0x6, x1, 1864, x3)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666662, 0x5555555555555556, 0x3333333333333334, x1, 1872, x3)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333331, 0x5555555555555556, 0x6666666666666667, x1, 1880, x3)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5998, 0x5555555555555556, -0xb504f332, x1, 1888, x3)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a662, 0x5555555555555556, 0xb504f334, x1, 1896, x3)
+
+inst_526:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaa8, -0x5555555555555555, 0x3, x1, 1904, x3)
+
+inst_527:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffe, -0x5555555555555555, 0x5555555555555555, x1, 1912, x3)
+
+inst_528:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x1, -0x5555555555555555, -0x5555555555555556, x1, 1920, x3)
+
+inst_529:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaae, -0x5555555555555555, 0x5, x1, 1928, x3)
+
+inst_530:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x9999999999999998, -0x5555555555555555, 0x3333333333333333, x1, 1936, x3)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccccccccccd, -0x5555555555555555, 0x6666666666666666, x1, 1944, x3)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a666, -0x5555555555555555, -0xb504f333, x1, 1952, x3)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5998, -0x5555555555555555, 0xb504f333, x1, 1960, x3)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaa9, -0x5555555555555555, 0x2, x1, 1968, x3)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffffffff, -0x5555555555555555, 0x5555555555555554, x1, 1976, x3)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x0, x1, 1984, x3)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x4, x1, 1992, x3)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x9999999999999999, -0x5555555555555555, 0x3333333333333332, x1, 2000, x3)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0xccccccccccccccce, -0x5555555555555555, 0x6666666666666665, x1, 2008, x3)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5999, -0x5555555555555555, 0xb504f332, x1, 2016, x3)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffd, -0x5555555555555555, 0x5555555555555556, x1, 2024, x3)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x0, -0x5555555555555555, -0x5555555555555555, x1, 2032, x3)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaad, -0x5555555555555555, 0x6, x1, 2040, x3)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x999999999999999f, -0x5555555555555555, 0x3333333333333334, x1, 0, x3)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccccccccccc, -0x5555555555555555, 0x6666666666666667, x1, 8, x3)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a665, -0x5555555555555555, -0xb504f332, x1, 16, x3)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae599f, -0x5555555555555555, 0xb504f334, x1, 24, x3)
+
+inst_548:
+// rs1_val==6 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x5, 0x6, 0x3, x1, 32, x3)
+
+inst_549:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555553, 0x6, 0x5555555555555555, x1, 40, x3)
+
+inst_550:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaac, 0x6, -0x5555555555555556, x1, 48, x3)
+
+inst_551:
+// rs1_val==6 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x3, 0x6, 0x5, x1, 56, x3)
+
+inst_552:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333335, 0x6, 0x3333333333333333, x1, 64, x3)
+
+inst_553:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666660, 0x6, 0x6666666666666666, x1, 72, x3)
+
+inst_554:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0ccb, 0x6, -0xb504f333, x1, 80, x3)
+
+inst_555:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f335, 0x6, 0xb504f333, x1, 88, x3)
+
+inst_556:
+// rs1_val==6 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x4, 0x6, 0x2, x1, 96, x3)
+
+inst_557:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555552, 0x6, 0x5555555555555554, x1, 104, x3)
+
+inst_558:
+// rs1_val==6 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x6, 0x0, x1, 112, x3)
+
+inst_559:
+// rs1_val==6 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x6, 0x4, x1, 120, x3)
+
+inst_560:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333334, 0x6, 0x3333333333333332, x1, 128, x3)
+
+inst_561:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666663, 0x6, 0x6666666666666665, x1, 136, x3)
+
+inst_562:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f334, 0x6, 0xb504f332, x1, 144, x3)
+
+inst_563:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555550, 0x6, 0x5555555555555556, x1, 152, x3)
+
+inst_564:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaad, 0x6, -0x5555555555555555, x1, 160, x3)
+
+inst_565:
+// rs1_val==6 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x6, 0x6, x1, 168, x3)
+
+inst_566:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333332, 0x6, 0x3333333333333334, x1, 176, x3)
+
+inst_567:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666661, 0x6, 0x6666666666666667, x1, 184, x3)
+
+inst_568:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0cc8, 0x6, -0xb504f332, x1, 192, x3)
+
+inst_569:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f332, 0x6, 0xb504f334, x1, 200, x3)
+
+inst_570:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333337, 0x3333333333333334, 0x3, x1, 208, x3)
+
+inst_571:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666661, 0x3333333333333334, 0x5555555555555555, x1, 216, x3)
+
+inst_572:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x999999999999999e, 0x3333333333333334, -0x5555555555555556, x1, 224, x3)
+
+inst_573:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333331, 0x3333333333333334, 0x5, x1, 232, x3)
+
+inst_574:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0x3333333333333334, 0x3333333333333333, x1, 240, x3)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555552, 0x3333333333333334, 0x6666666666666666, x1, 248, x3)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc79c83ff9, 0x3333333333333334, -0xb504f333, x1, 256, x3)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c007, 0x3333333333333334, 0xb504f333, x1, 264, x3)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333336, 0x3333333333333334, 0x2, x1, 272, x3)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666660, 0x3333333333333334, 0x5555555555555554, x1, 280, x3)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333334, 0x3333333333333334, 0x0, x1, 288, x3)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333330, 0x3333333333333334, 0x4, x1, 296, x3)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x3333333333333334, 0x3333333333333332, x1, 304, x3)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555551, 0x3333333333333334, 0x6666666666666665, x1, 312, x3)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c006, 0x3333333333333334, 0xb504f332, x1, 320, x3)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666662, 0x3333333333333334, 0x5555555555555556, x1, 328, x3)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x999999999999999f, 0x3333333333333334, -0x5555555555555555, x1, 336, x3)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333332, 0x3333333333333334, 0x6, x1, 344, x3)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x3333333333333334, 0x3333333333333334, x1, 352, x3)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555553, 0x3333333333333334, 0x6666666666666667, x1, 360, x3)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc79c83ffa, 0x3333333333333334, -0xb504f332, x1, 368, x3)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c000, 0x3333333333333334, 0xb504f334, x1, 376, x3)
+
+inst_592:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666664, 0x6666666666666667, 0x3, x1, 384, x3)
+
+inst_593:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333332, 0x6666666666666667, 0x5555555555555555, x1, 392, x3)
+
+inst_594:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccccccccccd, 0x6666666666666667, -0x5555555555555556, x1, 400, x3)
+
+inst_595:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666662, 0x6666666666666667, 0x5, x1, 408, x3)
+
+inst_596:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555554, 0x6666666666666667, 0x3333333333333333, x1, 416, x3)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x1, 0x6666666666666667, 0x6666666666666666, x1, 424, x3)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x999999992c9d6aaa, 0x6666666666666667, -0xb504f333, x1, 432, x3)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629554, 0x6666666666666667, 0xb504f333, x1, 440, x3)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666665, 0x6666666666666667, 0x2, x1, 448, x3)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333333, 0x6666666666666667, 0x5555555555555554, x1, 456, x3)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666667, 0x6666666666666667, 0x0, x1, 464, x3)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666663, 0x6666666666666667, 0x4, x1, 472, x3)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555555, 0x6666666666666667, 0x3333333333333332, x1, 480, x3)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x6666666666666667, 0x6666666666666665, x1, 488, x3)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629555, 0x6666666666666667, 0xb504f332, x1, 496, x3)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333331, 0x6666666666666667, 0x5555555555555556, x1, 504, x3)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccccccccccc, 0x6666666666666667, -0x5555555555555555, x1, 512, x3)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666661, 0x6666666666666667, 0x6, x1, 520, x3)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555553, 0x6666666666666667, 0x3333333333333334, x1, 528, x3)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x6666666666666667, 0x6666666666666667, x1, 536, x3)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x999999992c9d6aa9, 0x6666666666666667, -0xb504f332, x1, 544, x3)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629553, 0x6666666666666667, 0xb504f334, x1, 552, x3)
+
+inst_614:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0ccd, -0xb504f332, 0x3, x1, 560, x3)
+
+inst_615:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae599b, -0xb504f332, 0x5555555555555555, x1, 568, x3)
+
+inst_616:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a664, -0xb504f332, -0x5555555555555556, x1, 576, x3)
+
+inst_617:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0ccb, -0xb504f332, 0x5, x1, 584, x3)
+
+inst_618:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc79c83ffd, -0xb504f332, 0x3333333333333333, x1, 592, x3)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x999999992c9d6aa8, -0xb504f332, 0x6666666666666666, x1, 600, x3)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x3, -0xb504f332, -0xb504f333, x1, 608, x3)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffd, -0xb504f332, 0xb504f333, x1, 616, x3)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0ccc, -0xb504f332, 0x2, x1, 624, x3)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae599a, -0xb504f332, 0x5555555555555554, x1, 632, x3)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0cce, -0xb504f332, 0x0, x1, 640, x3)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0cca, -0xb504f332, 0x4, x1, 648, x3)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc79c83ffc, -0xb504f332, 0x3333333333333332, x1, 656, x3)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x999999992c9d6aab, -0xb504f332, 0x6666666666666665, x1, 664, x3)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffc, -0xb504f332, 0xb504f332, x1, 672, x3)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae5998, -0xb504f332, 0x5555555555555556, x1, 680, x3)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a665, -0xb504f332, -0x5555555555555555, x1, 688, x3)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffff4afb0cc8, -0xb504f332, 0x6, x1, 696, x3)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0xcccccccc79c83ffa, -0xb504f332, 0x3333333333333334, x1, 704, x3)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x999999992c9d6aa9, -0xb504f332, 0x6666666666666667, x1, 712, x3)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x0, -0xb504f332, -0xb504f332, x1, 720, x3)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffa, -0xb504f332, 0xb504f334, x1, 728, x3)
+
+inst_636:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f337, 0xb504f334, 0x3, x1, 736, x3)
+
+inst_637:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a661, 0xb504f334, 0x5555555555555555, x1, 744, x3)
+
+inst_638:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae599e, 0xb504f334, -0x5555555555555556, x1, 752, x3)
+
+inst_639:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f331, 0xb504f334, 0x5, x1, 760, x3)
+
+inst_640:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c007, 0xb504f334, 0x3333333333333333, x1, 768, x3)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629552, 0xb504f334, 0x6666666666666666, x1, 776, x3)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffff9, 0xb504f334, -0xb504f333, x1, 784, x3)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f333
+TEST_RR_OP(xor, x12, x10, x11, 0x7, 0xb504f334, 0xb504f333, x1, 792, x3)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f336, 0xb504f334, 0x2, x1, 800, x3)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a660, 0xb504f334, 0x5555555555555554, x1, 808, x3)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f334, 0xb504f334, 0x0, x1, 816, x3)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f330, 0xb504f334, 0x4, x1, 824, x3)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c006, 0xb504f334, 0x3333333333333332, x1, 832, x3)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629551, 0xb504f334, 0x6666666666666665, x1, 840, x3)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0xb504f334, 0xb504f332, x1, 848, x3)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x55555555e051a662, 0xb504f334, 0x5555555555555556, x1, 856, x3)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaa1fae599f, 0xb504f334, -0x5555555555555555, x1, 864, x3)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f332, 0xb504f334, 0x6, x1, 872, x3)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x333333338637c000, 0xb504f334, 0x3333333333333334, x1, 880, x3)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x66666666d3629553, 0xb504f334, 0x6666666666666667, x1, 888, x3)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xfffffffffffffffa, 0xb504f334, -0xb504f332, x1, 896, x3)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f334
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0xb504f334, 0xb504f334, x1, 904, x3)
+
+inst_658:
+// rs1_val==0 and rs2_val==2,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(xor, x12, x10, x11, 0x2, 0x0, 0x2, x1, 912, x3)
+
+inst_659:
+// rs1_val==0 and rs2_val==6148914691236517204,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555554
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555554, 0x0, 0x5555555555555554, x1, 920, x3)
+
+inst_660:
+// rs1_val==0 and rs2_val==0,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(xor, x12, x10, x11, 0x0, 0x0, 0x0, x1, 928, x3)
+
+inst_661:
+// rs1_val==0 and rs2_val==4,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(xor, x12, x10, x11, 0x4, 0x0, 0x4, x1, 936, x3)
+
+inst_662:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333332
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333332, 0x0, 0x3333333333333332, x1, 944, x3)
+
+inst_663:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666665
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666665, 0x0, 0x6666666666666665, x1, 952, x3)
+
+inst_664:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f332
+TEST_RR_OP(xor, x12, x10, x11, 0xb504f332, 0x0, 0xb504f332, x1, 960, x3)
+
+inst_665:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555556
+TEST_RR_OP(xor, x12, x10, x11, 0x5555555555555556, 0x0, 0x5555555555555556, x1, 968, x3)
+
+inst_666:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555555
+TEST_RR_OP(xor, x12, x10, x11, 0xaaaaaaaaaaaaaaab, 0x0, -0x5555555555555555, x1, 976, x3)
+
+inst_667:
+// rs1_val==0 and rs2_val==6,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(xor, x12, x10, x11, 0x6, 0x0, 0x6, x1, 984, x3)
+
+inst_668:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333334
+TEST_RR_OP(xor, x12, x10, x11, 0x3333333333333334, 0x0, 0x3333333333333334, x1, 992, x3)
+
+inst_669:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666667
+TEST_RR_OP(xor, x12, x10, x11, 0x6666666666666667, 0x0, 0x6666666666666667, x1, 1000, x3)
+
+inst_670:
+// rs1_val > 0 and rs2_val > 0, rs2_val == 576460752303423488, rs1_val == 18014398509481984, rs1_val != rs2_val
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:0x800000000000000
+TEST_RR_OP(xor, x12, x10, x11, 0x840000000000000, 0x40000000000000, 0x800000000000000, x1, 1008, x3)
+
+inst_671:
+// rs1_val < 0 and rs2_val < 0, rs1_val == -17179869185, rs2_val == -1025
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:-0x400000001; op2val:-0x401
+TEST_RR_OP(xor, x12, x10, x11, 0x400000400, -0x400000001, -0x401, x1, 1016, x3)
+
+inst_672:
+// rs1_val == 0, rs2_val == -16385
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x4001
+TEST_RR_OP(xor, x12, x10, x11, 0xffffffffffffbfff, 0x0, -0x4001, x1, 1024, x3)
+
+inst_673:
+// rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x7fffffffffffffff; op2val:0x7
+TEST_RR_OP(xor, x12, x10, x11, 0x7ffffffffffffff8, 0x7fffffffffffffff, 0x7, x1, 1032, x3)
+
+inst_674:
+// rs2_val == 1024, rs1_val == 524288
+// opcode: xor ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:0x400
+TEST_RR_OP(xor, x12, x10, x11, 0x80400, 0x80000, 0x400, x1, 1040, x3)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x9_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x9_1:
+ .fill 16*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_0:
+ .fill 16*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x1_2:
+ .fill 131*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/I/xori-01.S b/riscof/suite/rv64i_m/I/xori-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..a27f3fa1e15e5681f1a2f1a2291ade3eda7d3a8f
--- /dev/null
+++ b/riscof/suite/rv64i_m/I/xori-01.S
@@ -0,0 +1,3204 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 03:45:17 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64i.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the xori instruction of the RISC-V I extension for the xori covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64I")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",xori)
+
+RVTEST_SIGBASE( x2,signature_x2_1)
+
+inst_0:
+// rs1 == rd, rs1==x9, rd==x9, imm_val == (-2**(12-1)), imm_val == -2048, rs1_val != imm_val, rs1_val == 4, rs1_val > 0 and imm_val < 0
+// opcode: xori ; op1:x9; dest:x9; op1val:0x4; immval:-0x800
+TEST_IMM_OP( xori, x9, x9, 0xfffffffffffff804, 0x4, -0x800, x2, 0, x3)
+
+inst_1:
+// rs1 != rd, rs1==x25, rd==x19, imm_val == 0, rs1_val == -134217729
+// opcode: xori ; op1:x25; dest:x19; op1val:-0x8000001; immval:0x0
+TEST_IMM_OP( xori, x19, x25, 0xfffffffff7ffffff, -0x8000001, 0x0, x2, 8, x3)
+
+inst_2:
+// rs1==x13, rd==x12, imm_val == (2**(12-1)-1), rs1_val > 0 and imm_val > 0, imm_val == 2047
+// opcode: xori ; op1:x13; dest:x12; op1val:0x3; immval:0x7ff
+TEST_IMM_OP( xori, x12, x13, 0x7fc, 0x3, 0x7ff, x2, 16, x3)
+
+inst_3:
+// rs1==x16, rd==x13, imm_val == 1, rs1_val < 0 and imm_val > 0
+// opcode: xori ; op1:x16; dest:x13; op1val:-0x5555555555555555; immval:0x1
+TEST_IMM_OP( xori, x13, x16, 0xaaaaaaaaaaaaaaaa, -0x5555555555555555, 0x1, x2, 24, x3)
+
+inst_4:
+// rs1==x4, rd==x14, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808, imm_val == -9, rs1_val < 0 and imm_val < 0
+// opcode: xori ; op1:x4; dest:x14; op1val:-0x8000000000000000; immval:-0x9
+TEST_IMM_OP( xori, x14, x4, 0x7ffffffffffffff7, -0x8000000000000000, -0x9, x2, 32, x3)
+
+inst_5:
+// rs1==x29, rd==x23, rs1_val == 0, rs1_val == imm_val, rs1_val==0 and imm_val==0
+// opcode: xori ; op1:x29; dest:x23; op1val:0x0; immval:0x0
+TEST_IMM_OP( xori, x23, x29, 0x0, 0x0, 0x0, x2, 40, x3)
+
+inst_6:
+// rs1==x28, rd==x21, rs1_val == (2**(xlen-1)-1), rs1_val == 9223372036854775807, imm_val == 2
+// opcode: xori ; op1:x28; dest:x21; op1val:0x7fffffffffffffff; immval:0x2
+TEST_IMM_OP( xori, x21, x28, 0x7ffffffffffffffd, 0x7fffffffffffffff, 0x2, x2, 48, x3)
+
+inst_7:
+// rs1==x22, rd==x4, rs1_val == 1,
+// opcode: xori ; op1:x22; dest:x4; op1val:0x1; immval:0x666
+TEST_IMM_OP( xori, x4, x22, 0x667, 0x1, 0x666, x2, 56, x3)
+
+inst_8:
+// rs1==x11, rd==x31, imm_val == 4, rs1_val == 32768
+// opcode: xori ; op1:x11; dest:x31; op1val:0x8000; immval:0x4
+TEST_IMM_OP( xori, x31, x11, 0x8004, 0x8000, 0x4, x2, 64, x3)
+
+inst_9:
+// rs1==x17, rd==x6, imm_val == 8, rs1_val == -257
+// opcode: xori ; op1:x17; dest:x6; op1val:-0x101; immval:0x8
+TEST_IMM_OP( xori, x6, x17, 0xfffffffffffffef7, -0x101, 0x8, x2, 72, x3)
+
+inst_10:
+// rs1==x12, rd==x15, imm_val == 16,
+// opcode: xori ; op1:x12; dest:x15; op1val:-0xa; immval:0x10
+TEST_IMM_OP( xori, x15, x12, 0xffffffffffffffe6, -0xa, 0x10, x2, 80, x3)
+
+inst_11:
+// rs1==x27, rd==x22, imm_val == 32, rs1_val == -4398046511105
+// opcode: xori ; op1:x27; dest:x22; op1val:-0x40000000001; immval:0x20
+TEST_IMM_OP( xori, x22, x27, 0xfffffbffffffffdf, -0x40000000001, 0x20, x2, 88, x3)
+
+inst_12:
+// rs1==x18, rd==x1, imm_val == 64, rs1_val == 1073741824
+// opcode: xori ; op1:x18; dest:x1; op1val:0x40000000; immval:0x40
+TEST_IMM_OP( xori, x1, x18, 0x40000040, 0x40000000, 0x40, x2, 96, x3)
+
+inst_13:
+// rs1==x7, rd==x26, imm_val == 128, rs1_val == -2049
+// opcode: xori ; op1:x7; dest:x26; op1val:-0x801; immval:0x80
+TEST_IMM_OP( xori, x26, x7, 0xfffffffffffff77f, -0x801, 0x80, x2, 104, x3)
+
+inst_14:
+// rs1==x30, rd==x20, imm_val == 256, rs1_val == -70368744177665
+// opcode: xori ; op1:x30; dest:x20; op1val:-0x400000000001; immval:0x100
+TEST_IMM_OP( xori, x20, x30, 0xffffbffffffffeff, -0x400000000001, 0x100, x2, 112, x3)
+
+inst_15:
+// rs1==x6, rd==x11, imm_val == 512, rs1_val == 34359738368
+// opcode: xori ; op1:x6; dest:x11; op1val:0x800000000; immval:0x200
+TEST_IMM_OP( xori, x11, x6, 0x800000200, 0x800000000, 0x200, x2, 120, x3)
+
+inst_16:
+// rs1==x10, rd==x29, imm_val == 1024,
+// opcode: xori ; op1:x10; dest:x29; op1val:-0xb504f332; immval:0x400
+TEST_IMM_OP( xori, x29, x10, 0xffffffff4afb08ce, -0xb504f332, 0x400, x2, 128, x3)
+
+inst_17:
+// rs1==x21, rd==x10, imm_val == -2, rs1_val == -67108865
+// opcode: xori ; op1:x21; dest:x10; op1val:-0x4000001; immval:-0x2
+TEST_IMM_OP( xori, x10, x21, 0x4000001, -0x4000001, -0x2, x2, 136, x3)
+
+inst_18:
+// rs1==x24, rd==x28, imm_val == -3, rs1_val == 2251799813685248
+// opcode: xori ; op1:x24; dest:x28; op1val:0x8000000000000; immval:-0x3
+TEST_IMM_OP( xori, x28, x24, 0xfff7fffffffffffd, 0x8000000000000, -0x3, x2, 144, x3)
+
+inst_19:
+// rs1==x5, rd==x27, imm_val == -5, rs1_val == -2
+// opcode: xori ; op1:x5; dest:x27; op1val:-0x2; immval:-0x5
+TEST_IMM_OP( xori, x27, x5, 0x5, -0x2, -0x5, x2, 152, x6)
+RVTEST_SIGBASE( x4,signature_x4_0)
+
+inst_20:
+// rs1==x1, rd==x16, imm_val == -17,
+// opcode: xori ; op1:x1; dest:x16; op1val:0x5; immval:-0x11
+TEST_IMM_OP( xori, x16, x1, 0xffffffffffffffea, 0x5, -0x11, x4, 0, x6)
+
+inst_21:
+// rs1==x19, rd==x17, imm_val == -33,
+// opcode: xori ; op1:x19; dest:x17; op1val:-0x400000000001; immval:-0x21
+TEST_IMM_OP( xori, x17, x19, 0x400000000020, -0x400000000001, -0x21, x4, 8, x6)
+
+inst_22:
+// rs1==x0, rd==x5, imm_val == -65, rs1_val == -8589934593
+// opcode: xori ; op1:x0; dest:x5; op1val:0x0; immval:-0x41
+TEST_IMM_OP( xori, x5, x0, 0xffffffffffffffbf, 0x0, -0x41, x4, 16, x6)
+
+inst_23:
+// rs1==x3, rd==x25, imm_val == -129, rs1_val == 2305843009213693952
+// opcode: xori ; op1:x3; dest:x25; op1val:0x2000000000000000; immval:-0x81
+TEST_IMM_OP( xori, x25, x3, 0xdfffffffffffff7f, 0x2000000000000000, -0x81, x4, 24, x6)
+
+inst_24:
+// rs1==x31, rd==x8, imm_val == -257, rs1_val == -2147483649
+// opcode: xori ; op1:x31; dest:x8; op1val:-0x80000001; immval:-0x101
+TEST_IMM_OP( xori, x8, x31, 0x80000100, -0x80000001, -0x101, x4, 32, x6)
+
+inst_25:
+// rs1==x14, rd==x24, imm_val == -513,
+// opcode: xori ; op1:x14; dest:x24; op1val:0x3333333333333334; immval:-0x201
+TEST_IMM_OP( xori, x24, x14, 0xcccccccccccccecb, 0x3333333333333334, -0x201, x4, 40, x6)
+
+inst_26:
+// rs1==x2, rd==x18, imm_val == -1025, rs1_val == -2251799813685249
+// opcode: xori ; op1:x2; dest:x18; op1val:-0x8000000000001; immval:-0x401
+TEST_IMM_OP( xori, x18, x2, 0x8000000000400, -0x8000000000001, -0x401, x4, 48, x6)
+
+inst_27:
+// rs1==x8, rd==x30, imm_val == 1365,
+// opcode: xori ; op1:x8; dest:x30; op1val:-0x400000000001; immval:0x555
+TEST_IMM_OP( xori, x30, x8, 0xffffbffffffffaaa, -0x400000000001, 0x555, x4, 56, x6)
+
+inst_28:
+// rs1==x15, rd==x3, imm_val == -1366, rs1_val == 17179869184
+// opcode: xori ; op1:x15; dest:x3; op1val:0x400000000; immval:-0x556
+TEST_IMM_OP( xori, x3, x15, 0xfffffffbfffffaaa, 0x400000000, -0x556, x4, 64, x6)
+
+inst_29:
+// rs1==x20, rd==x2, rs1_val == 2,
+// opcode: xori ; op1:x20; dest:x2; op1val:0x2; immval:-0x201
+TEST_IMM_OP( xori, x2, x20, 0xfffffffffffffdfd, 0x2, -0x201, x4, 72, x6)
+
+inst_30:
+// rs1==x26, rd==x0, rs1_val == 8,
+// opcode: xori ; op1:x26; dest:x0; op1val:0x8; immval:0x1
+TEST_IMM_OP( xori, x0, x26, 0, 0x8, 0x1, x4, 80, x6)
+
+inst_31:
+// rs1==x23, rd==x7, rs1_val == 16,
+// opcode: xori ; op1:x23; dest:x7; op1val:0x10; immval:-0x41
+TEST_IMM_OP( xori, x7, x23, 0xffffffffffffffaf, 0x10, -0x41, x4, 88, x6)
+
+inst_32:
+// rs1_val == 32,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x20; immval:-0x81
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffff5f, 0x20, -0x81, x4, 96, x6)
+
+inst_33:
+// rs1_val == 64,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x40; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x626, 0x40, 0x666, x4, 104, x6)
+
+inst_34:
+// rs1_val == 128,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x80; immval:-0x400
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffc80, 0x80, -0x400, x4, 112, x6)
+
+inst_35:
+// rs1_val == 256,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x100; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x102, 0x100, 0x2, x4, 120, x6)
+
+inst_36:
+// rs1_val == 512,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x200; immval:-0x9
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffdf7, 0x200, -0x9, x4, 128, x6)
+
+inst_37:
+// rs1_val == 1024,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x400; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x266, 0x400, 0x666, x4, 136, x6)
+
+inst_38:
+// rs1_val == 2048,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x800; immval:0x40
+TEST_IMM_OP( xori, x11, x10, 0x840, 0x800, 0x40, x4, 144, x6)
+
+inst_39:
+// rs1_val == 4096,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x1000; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x1555, 0x1000, 0x555, x4, 152, x6)
+
+inst_40:
+// rs1_val == 8192,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2000; immval:-0xa
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffdff6, 0x2000, -0xa, x4, 160, x6)
+
+inst_41:
+// rs1_val == 16384,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4000; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x4556, 0x4000, 0x556, x4, 168, x6)
+
+inst_42:
+// rs1_val == 65536,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x10000; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x1002c, 0x10000, 0x2c, x4, 176, x6)
+
+inst_43:
+// rs1_val == 131072,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x20000; immval:-0x2
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffdfffe, 0x20000, -0x2, x4, 184, x6)
+
+inst_44:
+// rs1_val == 262144,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x40000; immval:0x7
+TEST_IMM_OP( xori, x11, x10, 0x40007, 0x40000, 0x7, x4, 192, x6)
+
+inst_45:
+// rs1_val == 524288,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x80000; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x80334, 0x80000, 0x334, x4, 200, x6)
+
+inst_46:
+// rs1_val == 1048576,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x100000; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x100004, 0x100000, 0x4, x4, 208, x6)
+
+inst_47:
+// rs1_val == 2097152,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x200000; immval:-0x5
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffdffffb, 0x200000, -0x5, x4, 216, x6)
+
+inst_48:
+// rs1_val == 4194304,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x400000; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x400000, 0x400000, 0x0, x4, 224, x6)
+
+inst_49:
+// rs1_val == 8388608,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x800000; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x800334, 0x800000, 0x334, x4, 232, x6)
+
+inst_50:
+// rs1_val == 16777216,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x1000000; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x1000004, 0x1000000, 0x4, x4, 240, x6)
+
+inst_51:
+// rs1_val == 33554432,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2000000; immval:0x10
+TEST_IMM_OP( xori, x11, x10, 0x2000010, 0x2000000, 0x10, x4, 248, x6)
+
+inst_52:
+// rs1_val == 67108864,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4000000; immval:-0x401
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffbfffbff, 0x4000000, -0x401, x4, 256, x6)
+
+inst_53:
+// rs1_val == 134217728,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x8000000; immval:0x9
+TEST_IMM_OP( xori, x11, x10, 0x8000009, 0x8000000, 0x9, x4, 264, x6)
+
+inst_54:
+// rs1_val == 268435456,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x10000000; immval:-0x201
+TEST_IMM_OP( xori, x11, x10, 0xffffffffeffffdff, 0x10000000, -0x201, x4, 272, x6)
+
+inst_55:
+// rs1_val == 536870912,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x20000000; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x20000555, 0x20000000, 0x555, x4, 280, x6)
+
+inst_56:
+// rs1_val == 2147483648,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x80000000; immval:-0x41
+TEST_IMM_OP( xori, x11, x10, 0xffffffff7fffffbf, 0x80000000, -0x41, x4, 288, x6)
+
+inst_57:
+// rs1_val == 4294967296,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x100000000; immval:-0x201
+TEST_IMM_OP( xori, x11, x10, 0xfffffffefffffdff, 0x100000000, -0x201, x4, 296, x6)
+
+inst_58:
+// rs1_val == 8589934592,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x200000000; immval:-0x81
+TEST_IMM_OP( xori, x11, x10, 0xfffffffdffffff7f, 0x200000000, -0x81, x4, 304, x6)
+
+inst_59:
+// rs1_val == 68719476736,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x1000000000; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x1000000004, 0x1000000000, 0x4, x4, 312, x6)
+
+inst_60:
+// rs1_val == 137438953472,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2000000000; immval:0x8
+TEST_IMM_OP( xori, x11, x10, 0x2000000008, 0x2000000000, 0x8, x4, 320, x6)
+
+inst_61:
+// rs1_val == 274877906944,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4000000000; immval:-0x41
+TEST_IMM_OP( xori, x11, x10, 0xffffffbfffffffbf, 0x4000000000, -0x41, x4, 328, x6)
+
+inst_62:
+// rs1_val == 549755813888,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x8000000000; immval:0x40
+TEST_IMM_OP( xori, x11, x10, 0x8000000040, 0x8000000000, 0x40, x4, 336, x6)
+
+inst_63:
+// rs1_val == 1099511627776,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x10000000000; immval:0x10
+TEST_IMM_OP( xori, x11, x10, 0x10000000010, 0x10000000000, 0x10, x4, 344, x6)
+
+inst_64:
+// rs1_val == 2199023255552,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x20000000000; immval:0x400
+TEST_IMM_OP( xori, x11, x10, 0x20000000400, 0x20000000000, 0x400, x4, 352, x6)
+
+inst_65:
+// rs1_val == 4398046511104,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x40000000000; immval:0x7
+TEST_IMM_OP( xori, x11, x10, 0x40000000007, 0x40000000000, 0x7, x4, 360, x6)
+
+inst_66:
+// rs1_val == 8796093022208,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x80000000000; immval:0x1
+TEST_IMM_OP( xori, x11, x10, 0x80000000001, 0x80000000000, 0x1, x4, 368, x6)
+
+inst_67:
+// rs1_val == 17592186044416,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x100000000000; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x10000000002e, 0x100000000000, 0x2e, x4, 376, x6)
+
+inst_68:
+// rs1_val == 35184372088832,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x200000000000; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x200000000004, 0x200000000000, 0x4, x4, 384, x6)
+
+inst_69:
+// rs1_val == 70368744177664,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x400000000000; immval:0x200
+TEST_IMM_OP( xori, x11, x10, 0x400000000200, 0x400000000000, 0x200, x4, 392, x6)
+
+inst_70:
+// rs1_val == 140737488355328,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x800000000000; immval:-0x1
+TEST_IMM_OP( xori, x11, x10, 0xffff7fffffffffff, 0x800000000000, -0x1, x4, 400, x6)
+
+inst_71:
+// rs1_val == 281474976710656,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x1000000000000; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x1000000000000, 0x1000000000000, 0x0, x4, 408, x6)
+
+inst_72:
+// rs1_val == 562949953421312,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2000000000000; immval:0x7
+TEST_IMM_OP( xori, x11, x10, 0x2000000000007, 0x2000000000000, 0x7, x4, 416, x6)
+
+inst_73:
+// rs1_val == 1125899906842624,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4000000000000; immval:-0x3
+TEST_IMM_OP( xori, x11, x10, 0xfffbfffffffffffd, 0x4000000000000, -0x3, x4, 424, x6)
+
+inst_74:
+// rs1_val == 4503599627370496,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x10000000000000; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x10000000000000, 0x10000000000000, 0x0, x4, 432, x6)
+
+inst_75:
+// rs1_val == 9007199254740992,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x20000000000000; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x20000000000006, 0x20000000000000, 0x6, x4, 440, x6)
+
+inst_76:
+// rs1_val == 18014398509481984,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x40000000000000; immval:0x9
+TEST_IMM_OP( xori, x11, x10, 0x40000000000009, 0x40000000000000, 0x9, x4, 448, x6)
+
+inst_77:
+// rs1_val == 36028797018963968,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x80000000000000; immval:0x10
+TEST_IMM_OP( xori, x11, x10, 0x80000000000010, 0x80000000000000, 0x10, x4, 456, x6)
+
+inst_78:
+// rs1_val == 72057594037927936,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x100000000000000; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x100000000000555, 0x100000000000000, 0x555, x4, 464, x6)
+
+inst_79:
+// rs1_val == 144115188075855872,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x200000000000000; immval:-0x3
+TEST_IMM_OP( xori, x11, x10, 0xfdfffffffffffffd, 0x200000000000000, -0x3, x4, 472, x6)
+
+inst_80:
+// rs1_val == 288230376151711744,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x400000000000000; immval:-0x41
+TEST_IMM_OP( xori, x11, x10, 0xfbffffffffffffbf, 0x400000000000000, -0x41, x4, 480, x6)
+
+inst_81:
+// rs1_val == 576460752303423488,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x800000000000000; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x800000000000000, 0x800000000000000, 0x0, x4, 488, x6)
+
+inst_82:
+// rs1_val == 1152921504606846976,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x1000000000000000; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x1000000000000002, 0x1000000000000000, 0x2, x4, 496, x6)
+
+inst_83:
+// rs1_val == 4611686018427387904,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4000000000000000; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x4000000000000333, 0x4000000000000000, 0x333, x4, 504, x6)
+
+inst_84:
+// rs1_val == -3,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x3; immval:0x8
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffff5, -0x3, 0x8, x4, 512, x6)
+
+inst_85:
+// rs1_val == -5,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffff9, -0x5, 0x2, x4, 520, x6)
+
+inst_86:
+// rs1_val == -9,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x9; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffff4, -0x9, 0x3, x4, 528, x6)
+
+inst_87:
+// rs1_val == -17,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x11; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffffc2, -0x11, 0x2d, x4, 536, x6)
+
+inst_88:
+// rs1_val == -33,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x21; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffff3, -0x21, 0x2c, x4, 544, x6)
+
+inst_89:
+// rs1_val == -65,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x41; immval:-0x6
+TEST_IMM_OP( xori, x11, x10, 0x45, -0x41, -0x6, x4, 552, x6)
+
+inst_90:
+// rs1_val == -129,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x81; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffff7c, -0x81, 0x3, x4, 560, x6)
+
+inst_91:
+// rs1_val == -513,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x201; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffdff, -0x201, 0x0, x4, 568, x6)
+
+inst_92:
+// rs1_val == -1025,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x401; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffea9, -0x401, 0x556, x4, 576, x6)
+
+inst_93:
+// rs1_val == -4097,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x1001; immval:-0x5
+TEST_IMM_OP( xori, x11, x10, 0x1004, -0x1001, -0x5, x4, 584, x6)
+
+inst_94:
+// rs1_val == -8193,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x2001; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x202b, -0x2001, -0x2c, x4, 592, x6)
+
+inst_95:
+// rs1_val == -16385,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x4001; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffbaa9, -0x4001, 0x556, x4, 600, x6)
+
+inst_96:
+// rs1_val == -32769,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x8001; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffff7ffa, -0x8001, 0x5, x4, 608, x6)
+
+inst_97:
+// rs1_val == -65537,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x10001; immval:0x8
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffefff7, -0x10001, 0x8, x4, 616, x6)
+
+inst_98:
+// rs1_val == -131073,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x20001; immval:0x200
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffdfdff, -0x20001, 0x200, x4, 624, x6)
+
+inst_99:
+// rs1_val == -262145,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x40001; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffbfaab, -0x40001, 0x554, x4, 632, x6)
+
+inst_100:
+// rs1_val == -524289,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x80001; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffff7fffd, -0x80001, 0x2, x4, 640, x6)
+
+inst_101:
+// rs1_val == -1048577,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x100001; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0x100554, -0x100001, -0x555, x4, 648, x6)
+
+inst_102:
+// rs1_val == -2097153,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x200001; immval:-0x11
+TEST_IMM_OP( xori, x11, x10, 0x200010, -0x200001, -0x11, x4, 656, x6)
+
+inst_103:
+// rs1_val == -4194305,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x400001; immval:0x40
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffbfffbf, -0x400001, 0x40, x4, 664, x6)
+
+inst_104:
+// rs1_val == -8388609,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x800001; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xffffffffff7ffffc, -0x800001, 0x3, x4, 672, x6)
+
+inst_105:
+// rs1_val == -16777217,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x1000001; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x100002b, -0x1000001, -0x2c, x4, 680, x6)
+
+inst_106:
+// rs1_val == -33554433,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x2000001; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x200002b, -0x2000001, -0x2c, x4, 688, x6)
+
+inst_107:
+// rs1_val == -268435457,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x10000001; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xffffffffeffffaa9, -0x10000001, 0x556, x4, 696, x6)
+
+inst_108:
+// rs1_val == -536870913,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x20000001; immval:-0x41
+TEST_IMM_OP( xori, x11, x10, 0x20000040, -0x20000001, -0x41, x4, 704, x6)
+
+inst_109:
+// rs1_val == -1073741825,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x40000001; immval:-0x4
+TEST_IMM_OP( xori, x11, x10, 0x40000003, -0x40000001, -0x4, x4, 712, x6)
+
+inst_110:
+// rs1_val == -4294967297,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x100000001; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xfffffffefffffccd, -0x100000001, 0x332, x4, 720, x6)
+
+inst_111:
+// rs1_val == -17179869185,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x400000001; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0x400000555, -0x400000001, -0x556, x4, 728, x6)
+
+inst_112:
+// rs1_val == -34359738369,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x800000001; immval:-0x6
+TEST_IMM_OP( xori, x11, x10, 0x800000005, -0x800000001, -0x6, x4, 736, x6)
+
+inst_113:
+// rs1_val == -68719476737,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x1000000001; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x100000002b, -0x1000000001, -0x2c, x4, 744, x6)
+
+inst_114:
+// rs1_val == -137438953473,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x2000000001; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xffffffdffffffaaa, -0x2000000001, 0x555, x4, 752, x6)
+
+inst_115:
+// rs1_val == -274877906945,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x4000000001; immval:0x100
+TEST_IMM_OP( xori, x11, x10, 0xffffffbffffffeff, -0x4000000001, 0x100, x4, 760, x6)
+
+inst_116:
+// rs1_val == -549755813889,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x8000000001; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffff7fffffffd3, -0x8000000001, 0x2c, x4, 768, x6)
+
+inst_117:
+// rs1_val == -1099511627777,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x10000000001; immval:0x80
+TEST_IMM_OP( xori, x11, x10, 0xfffffeffffffff7f, -0x10000000001, 0x80, x4, 776, x6)
+
+inst_118:
+// rs1_val == -2199023255553,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x20000000001; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xfffffdffffffffff, -0x20000000001, 0x0, x4, 784, x6)
+
+inst_119:
+// rs1_val == -8796093022209,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x80000000001; immval:0x1
+TEST_IMM_OP( xori, x11, x10, 0xfffff7fffffffffe, -0x80000000001, 0x1, x4, 792, x6)
+
+inst_120:
+// rs1_val == -17592186044417,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x100000000001; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xffffeffffffffff9, -0x100000000001, 0x6, x4, 800, x6)
+
+inst_121:
+// rs1_val == -35184372088833,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x200000000001; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xffffdffffffffffd, -0x200000000001, 0x2, x4, 808, x6)
+
+inst_122:
+// rs1_val == -140737488355329,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x800000000001; immval:-0x800
+TEST_IMM_OP( xori, x11, x10, 0x8000000007ff, -0x800000000001, -0x800, x4, 816, x6)
+
+inst_123:
+// rs1_val == -281474976710657,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x1000000000001; immval:0x20
+TEST_IMM_OP( xori, x11, x10, 0xfffeffffffffffdf, -0x1000000000001, 0x20, x4, 824, x6)
+
+inst_124:
+// rs1_val == -562949953421313,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x2000000000001; immval:0x40
+TEST_IMM_OP( xori, x11, x10, 0xfffdffffffffffbf, -0x2000000000001, 0x40, x4, 832, x6)
+
+inst_125:
+// rs1_val == -1125899906842625,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x4000000000001; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xfffbffffffffffff, -0x4000000000001, 0x0, x4, 840, x6)
+
+inst_126:
+// rs1_val == -4503599627370497,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x10000000000001; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xffeffffffffffff9, -0x10000000000001, 0x6, x4, 848, x6)
+
+inst_127:
+// rs1_val == -9007199254740993,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x20000000000001; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xffdffffffffffffb, -0x20000000000001, 0x4, x4, 856, x6)
+
+inst_128:
+// rs1_val == -18014398509481985,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x40000000000001; immval:0x200
+TEST_IMM_OP( xori, x11, x10, 0xffbffffffffffdff, -0x40000000000001, 0x200, x4, 864, x6)
+
+inst_129:
+// rs1_val == -36028797018963969,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x80000000000001; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xff7fffffffffffff, -0x80000000000001, 0x0, x4, 872, x6)
+
+inst_130:
+// rs1_val == -72057594037927937,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x100000000000001; immval:0x7ff
+TEST_IMM_OP( xori, x11, x10, 0xfefffffffffff800, -0x100000000000001, 0x7ff, x4, 880, x6)
+
+inst_131:
+// rs1_val == -144115188075855873,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x200000000000001; immval:-0x41
+TEST_IMM_OP( xori, x11, x10, 0x200000000000040, -0x200000000000001, -0x41, x4, 888, x6)
+
+inst_132:
+// rs1_val == -288230376151711745,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x400000000000001; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xfbfffffffffffffb, -0x400000000000001, 0x4, x4, 896, x6)
+
+inst_133:
+// rs1_val == -576460752303423489,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x800000000000001; immval:-0xa
+TEST_IMM_OP( xori, x11, x10, 0x800000000000009, -0x800000000000001, -0xa, x4, 904, x6)
+
+inst_134:
+// rs1_val == -1152921504606846977,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x1000000000000001; immval:-0x21
+TEST_IMM_OP( xori, x11, x10, 0x1000000000000020, -0x1000000000000001, -0x21, x4, 912, x6)
+
+inst_135:
+// rs1_val == -2305843009213693953,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x2000000000000001; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xdffffffffffffaab, -0x2000000000000001, 0x554, x4, 920, x6)
+
+inst_136:
+// rs1_val == -4611686018427387905,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x4000000000000001; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xbfffffffffffffff, -0x4000000000000001, 0x0, x4, 928, x6)
+
+inst_137:
+// rs1_val == 6148914691236517205,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x7
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555552, 0x5555555555555555, 0x7, x4, 936, x6)
+
+inst_138:
+// rs1_val == -6148914691236517206,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x21
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555575, -0x5555555555555556, -0x21, x4, 944, x6)
+
+inst_139:
+// rs1_val==3 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x0, 0x3, 0x3, x4, 952, x6)
+
+inst_140:
+// rs1_val==3 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x556, 0x3, 0x555, x4, 960, x6)
+
+inst_141:
+// rs1_val==3 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffaa9, 0x3, -0x556, x4, 968, x6)
+
+inst_142:
+// rs1_val==3 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x6, 0x3, 0x5, x4, 976, x6)
+
+inst_143:
+// rs1_val==3 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x330, 0x3, 0x333, x4, 984, x6)
+
+inst_144:
+// rs1_val==3 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x665, 0x3, 0x666, x4, 992, x6)
+
+inst_145:
+// rs1_val==3 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffffd0, 0x3, -0x2d, x4, 1000, x6)
+
+inst_146:
+// rs1_val==3 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x2e, 0x3, 0x2d, x4, 1008, x6)
+
+inst_147:
+// rs1_val==3 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x1, 0x3, 0x2, x4, 1016, x6)
+
+inst_148:
+// rs1_val==3 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x557, 0x3, 0x554, x4, 1024, x6)
+
+inst_149:
+// rs1_val==3 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x3, 0x3, 0x0, x4, 1032, x6)
+
+inst_150:
+// rs1_val==3 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x7, 0x3, 0x4, x4, 1040, x6)
+
+inst_151:
+// rs1_val==3 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x331, 0x3, 0x332, x4, 1048, x6)
+
+inst_152:
+// rs1_val==3 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x666, 0x3, 0x665, x4, 1056, x6)
+
+inst_153:
+// rs1_val==3 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x2f, 0x3, 0x2c, x4, 1064, x6)
+
+inst_154:
+// rs1_val==3 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x555, 0x3, 0x556, x4, 1072, x6)
+
+inst_155:
+// rs1_val==3 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffaa8, 0x3, -0x555, x4, 1080, x6)
+
+inst_156:
+// rs1_val==3 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x5, 0x3, 0x6, x4, 1088, x6)
+
+inst_157:
+// rs1_val==3 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x337, 0x3, 0x334, x4, 1096, x6)
+
+inst_158:
+// rs1_val==3 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x664, 0x3, 0x667, x4, 1104, x6)
+
+inst_159:
+// rs1_val==3 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffffd7, 0x3, -0x2c, x4, 1112, x6)
+
+inst_160:
+// rs1_val==3 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x2d, 0x3, 0x2e, x4, 1120, x6)
+
+inst_161:
+// rs1_val==6148914691236517205 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555556, 0x5555555555555555, 0x3, x4, 1128, x6)
+
+inst_162:
+// rs1_val==6148914691236517205 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555000, 0x5555555555555555, 0x555, x4, 1136, x6)
+
+inst_163:
+// rs1_val==6148914691236517205 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaafff, 0x5555555555555555, -0x556, x4, 1144, x6)
+
+inst_164:
+// rs1_val==6148914691236517205 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555550, 0x5555555555555555, 0x5, x4, 1152, x6)
+
+inst_165:
+// rs1_val==6148914691236517205 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555666, 0x5555555555555555, 0x333, x4, 1160, x6)
+
+inst_166:
+// rs1_val==6148914691236517205 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555333, 0x5555555555555555, 0x666, x4, 1168, x6)
+
+inst_167:
+// rs1_val==6148914691236517205 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaa86, 0x5555555555555555, -0x2d, x4, 1176, x6)
+
+inst_168:
+// rs1_val==6148914691236517205 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555578, 0x5555555555555555, 0x2d, x4, 1184, x6)
+
+inst_169:
+// rs1_val==6148914691236517205 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555557, 0x5555555555555555, 0x2, x4, 1192, x6)
+
+inst_170:
+// rs1_val==6148914691236517205 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555001, 0x5555555555555555, 0x554, x4, 1200, x6)
+
+inst_171:
+// rs1_val==6148914691236517205 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555555, 0x5555555555555555, 0x0, x4, 1208, x6)
+
+inst_172:
+// rs1_val==6148914691236517205 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555551, 0x5555555555555555, 0x4, x4, 1216, x6)
+
+inst_173:
+// rs1_val==6148914691236517205 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555667, 0x5555555555555555, 0x332, x4, 1224, x6)
+
+inst_174:
+// rs1_val==6148914691236517205 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555330, 0x5555555555555555, 0x665, x4, 1232, x6)
+
+inst_175:
+// rs1_val==6148914691236517205 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555579, 0x5555555555555555, 0x2c, x4, 1240, x6)
+
+inst_176:
+// rs1_val==6148914691236517205 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555003, 0x5555555555555555, 0x556, x4, 1248, x6)
+
+inst_177:
+// rs1_val==6148914691236517205 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaffe, 0x5555555555555555, -0x555, x4, 1256, x6)
+
+inst_178:
+// rs1_val==6148914691236517205 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555553, 0x5555555555555555, 0x6, x4, 1264, x6)
+
+inst_179:
+// rs1_val==6148914691236517205 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555661, 0x5555555555555555, 0x334, x4, 1272, x6)
+
+inst_180:
+// rs1_val==6148914691236517205 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555332, 0x5555555555555555, 0x667, x4, 1280, x6)
+
+inst_181:
+// rs1_val==6148914691236517205 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaa81, 0x5555555555555555, -0x2c, x4, 1288, x6)
+
+inst_182:
+// rs1_val==6148914691236517205 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555555; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x555555555555557b, 0x5555555555555555, 0x2e, x4, 1296, x6)
+
+inst_183:
+// rs1_val==-6148914691236517206 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaaa9, -0x5555555555555556, 0x3, x4, 1304, x6)
+
+inst_184:
+// rs1_val==-6148914691236517206 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaafff, -0x5555555555555556, 0x555, x4, 1312, x6)
+
+inst_185:
+// rs1_val==-6148914691236517206 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555000, -0x5555555555555556, -0x556, x4, 1320, x6)
+
+inst_186:
+// rs1_val==-6148914691236517206 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555556, 0x5, x4, 1328, x6)
+
+inst_187:
+// rs1_val==-6148914691236517206 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaa999, -0x5555555555555556, 0x333, x4, 1336, x6)
+
+inst_188:
+// rs1_val==-6148914691236517206 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaccc, -0x5555555555555556, 0x666, x4, 1344, x6)
+
+inst_189:
+// rs1_val==-6148914691236517206 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555579, -0x5555555555555556, -0x2d, x4, 1352, x6)
+
+inst_190:
+// rs1_val==-6148914691236517206 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaa87, -0x5555555555555556, 0x2d, x4, 1360, x6)
+
+inst_191:
+// rs1_val==-6148914691236517206 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaaa8, -0x5555555555555556, 0x2, x4, 1368, x6)
+
+inst_192:
+// rs1_val==-6148914691236517206 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaffe, -0x5555555555555556, 0x554, x4, 1376, x6)
+
+inst_193:
+// rs1_val==-6148914691236517206 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaaaa, -0x5555555555555556, 0x0, x4, 1384, x6)
+
+inst_194:
+// rs1_val==-6148914691236517206 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaaae, -0x5555555555555556, 0x4, x4, 1392, x6)
+
+inst_195:
+// rs1_val==-6148914691236517206 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaa998, -0x5555555555555556, 0x332, x4, 1400, x6)
+
+inst_196:
+// rs1_val==-6148914691236517206 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaccf, -0x5555555555555556, 0x665, x4, 1408, x6)
+
+inst_197:
+// rs1_val==-6148914691236517206 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaa86, -0x5555555555555556, 0x2c, x4, 1416, x6)
+
+inst_198:
+// rs1_val==-6148914691236517206 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaffc, -0x5555555555555556, 0x556, x4, 1424, x6)
+
+inst_199:
+// rs1_val==-6148914691236517206 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555001, -0x5555555555555556, -0x555, x4, 1432, x6)
+
+inst_200:
+// rs1_val==-6148914691236517206 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaaac, -0x5555555555555556, 0x6, x4, 1440, x6)
+
+inst_201:
+// rs1_val==-6148914691236517206 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaa99e, -0x5555555555555556, 0x334, x4, 1448, x6)
+
+inst_202:
+// rs1_val==-6148914691236517206 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaccd, -0x5555555555555556, 0x667, x4, 1456, x6)
+
+inst_203:
+// rs1_val==-6148914691236517206 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x555555555555557e, -0x5555555555555556, -0x2c, x4, 1464, x6)
+
+inst_204:
+// rs1_val==-6148914691236517206 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555556; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaa84, -0x5555555555555556, 0x2e, x4, 1472, x6)
+
+inst_205:
+// rs1_val==5 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x6, 0x5, 0x3, x4, 1480, x6)
+
+inst_206:
+// rs1_val==5 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x550, 0x5, 0x555, x4, 1488, x6)
+
+inst_207:
+// rs1_val==5 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffaaf, 0x5, -0x556, x4, 1496, x6)
+
+inst_208:
+// rs1_val==5 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x0, 0x5, 0x5, x4, 1504, x6)
+
+inst_209:
+// rs1_val==5 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x336, 0x5, 0x333, x4, 1512, x6)
+
+inst_210:
+// rs1_val==5 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x663, 0x5, 0x666, x4, 1520, x6)
+
+inst_211:
+// rs1_val==5 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffffd6, 0x5, -0x2d, x4, 1528, x6)
+
+inst_212:
+// rs1_val==5 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x28, 0x5, 0x2d, x4, 1536, x6)
+
+inst_213:
+// rs1_val==5 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x7, 0x5, 0x2, x4, 1544, x6)
+
+inst_214:
+// rs1_val==5 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x551, 0x5, 0x554, x4, 1552, x6)
+
+inst_215:
+// rs1_val==5 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x5, 0x5, 0x0, x4, 1560, x6)
+
+inst_216:
+// rs1_val==5 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x1, 0x5, 0x4, x4, 1568, x6)
+
+inst_217:
+// rs1_val==5 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x337, 0x5, 0x332, x4, 1576, x6)
+
+inst_218:
+// rs1_val==5 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x660, 0x5, 0x665, x4, 1584, x6)
+
+inst_219:
+// rs1_val==5 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x29, 0x5, 0x2c, x4, 1592, x6)
+
+inst_220:
+// rs1_val==5 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x553, 0x5, 0x556, x4, 1600, x6)
+
+inst_221:
+// rs1_val==5 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffaae, 0x5, -0x555, x4, 1608, x6)
+
+inst_222:
+// rs1_val==5 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x3, 0x5, 0x6, x4, 1616, x6)
+
+inst_223:
+// rs1_val==5 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x331, 0x5, 0x334, x4, 1624, x6)
+
+inst_224:
+// rs1_val==5 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x662, 0x5, 0x667, x4, 1632, x6)
+
+inst_225:
+// rs1_val==5 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffffd1, 0x5, -0x2c, x4, 1640, x6)
+
+inst_226:
+// rs1_val==5 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x2b, 0x5, 0x2e, x4, 1648, x6)
+
+inst_227:
+// rs1_val==3689348814741910323 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333330, 0x3333333333333333, 0x3, x4, 1656, x6)
+
+inst_228:
+// rs1_val==3689348814741910323 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333666, 0x3333333333333333, 0x555, x4, 1664, x6)
+
+inst_229:
+// rs1_val==3689348814741910323 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xccccccccccccc999, 0x3333333333333333, -0x556, x4, 1672, x6)
+
+inst_230:
+// rs1_val==3689348814741910323 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333336, 0x3333333333333333, 0x5, x4, 1680, x6)
+
+inst_231:
+// rs1_val==3689348814741910323 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333000, 0x3333333333333333, 0x333, x4, 1688, x6)
+
+inst_232:
+// rs1_val==3689348814741910323 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333555, 0x3333333333333333, 0x666, x4, 1696, x6)
+
+inst_233:
+// rs1_val==3689348814741910323 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xcccccccccccccce0, 0x3333333333333333, -0x2d, x4, 1704, x6)
+
+inst_234:
+// rs1_val==3689348814741910323 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x333333333333331e, 0x3333333333333333, 0x2d, x4, 1712, x6)
+
+inst_235:
+// rs1_val==3689348814741910323 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333331, 0x3333333333333333, 0x2, x4, 1720, x6)
+
+inst_236:
+// rs1_val==3689348814741910323 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333667, 0x3333333333333333, 0x554, x4, 1728, x6)
+
+inst_237:
+// rs1_val==3689348814741910323 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333333, 0x3333333333333333, 0x0, x4, 1736, x6)
+
+inst_238:
+// rs1_val==3689348814741910323 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333337, 0x3333333333333333, 0x4, x4, 1744, x6)
+
+inst_239:
+// rs1_val==3689348814741910323 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333001, 0x3333333333333333, 0x332, x4, 1752, x6)
+
+inst_240:
+// rs1_val==3689348814741910323 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333556, 0x3333333333333333, 0x665, x4, 1760, x6)
+
+inst_241:
+// rs1_val==3689348814741910323 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x333333333333331f, 0x3333333333333333, 0x2c, x4, 1768, x6)
+
+inst_242:
+// rs1_val==3689348814741910323 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333665, 0x3333333333333333, 0x556, x4, 1776, x6)
+
+inst_243:
+// rs1_val==3689348814741910323 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xccccccccccccc998, 0x3333333333333333, -0x555, x4, 1784, x6)
+
+inst_244:
+// rs1_val==3689348814741910323 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333335, 0x3333333333333333, 0x6, x4, 1792, x6)
+
+inst_245:
+// rs1_val==3689348814741910323 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333007, 0x3333333333333333, 0x334, x4, 1800, x6)
+
+inst_246:
+// rs1_val==3689348814741910323 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333554, 0x3333333333333333, 0x667, x4, 1808, x6)
+
+inst_247:
+// rs1_val==3689348814741910323 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xcccccccccccccce7, 0x3333333333333333, -0x2c, x4, 1816, x6)
+
+inst_248:
+// rs1_val==3689348814741910323 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333333; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x333333333333331d, 0x3333333333333333, 0x2e, x4, 1824, x6)
+
+inst_249:
+// rs1_val==7378697629483820646 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666665, 0x6666666666666666, 0x3, x4, 1832, x6)
+
+inst_250:
+// rs1_val==7378697629483820646 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666333, 0x6666666666666666, 0x555, x4, 1840, x6)
+
+inst_251:
+// rs1_val==7378697629483820646 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0x9999999999999ccc, 0x6666666666666666, -0x556, x4, 1848, x6)
+
+inst_252:
+// rs1_val==7378697629483820646 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666663, 0x6666666666666666, 0x5, x4, 1856, x6)
+
+inst_253:
+// rs1_val==7378697629483820646 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666555, 0x6666666666666666, 0x333, x4, 1864, x6)
+
+inst_254:
+// rs1_val==7378697629483820646 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666000, 0x6666666666666666, 0x666, x4, 1872, x6)
+
+inst_255:
+// rs1_val==7378697629483820646 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0x99999999999999b5, 0x6666666666666666, -0x2d, x4, 1880, x6)
+
+inst_256:
+// rs1_val==7378697629483820646 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x666666666666664b, 0x6666666666666666, 0x2d, x4, 1888, x6)
+
+inst_257:
+// rs1_val==7378697629483820646 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666664, 0x6666666666666666, 0x2, x4, 1896, x6)
+
+inst_258:
+// rs1_val==7378697629483820646 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666332, 0x6666666666666666, 0x554, x4, 1904, x6)
+
+inst_259:
+// rs1_val==7378697629483820646 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666666, 0x6666666666666666, 0x0, x4, 1912, x6)
+
+inst_260:
+// rs1_val==7378697629483820646 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666662, 0x6666666666666666, 0x4, x4, 1920, x6)
+
+inst_261:
+// rs1_val==7378697629483820646 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666554, 0x6666666666666666, 0x332, x4, 1928, x6)
+
+inst_262:
+// rs1_val==7378697629483820646 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666003, 0x6666666666666666, 0x665, x4, 1936, x6)
+
+inst_263:
+// rs1_val==7378697629483820646 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x666666666666664a, 0x6666666666666666, 0x2c, x4, 1944, x6)
+
+inst_264:
+// rs1_val==7378697629483820646 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666330, 0x6666666666666666, 0x556, x4, 1952, x6)
+
+inst_265:
+// rs1_val==7378697629483820646 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0x9999999999999ccd, 0x6666666666666666, -0x555, x4, 1960, x6)
+
+inst_266:
+// rs1_val==7378697629483820646 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666660, 0x6666666666666666, 0x6, x4, 1968, x6)
+
+inst_267:
+// rs1_val==7378697629483820646 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666552, 0x6666666666666666, 0x334, x4, 1976, x6)
+
+inst_268:
+// rs1_val==7378697629483820646 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666001, 0x6666666666666666, 0x667, x4, 1984, x6)
+
+inst_269:
+// rs1_val==7378697629483820646 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x99999999999999b2, 0x6666666666666666, -0x2c, x4, 1992, x6)
+
+inst_270:
+// rs1_val==7378697629483820646 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666666; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666648, 0x6666666666666666, 0x2e, x4, 2000, x6)
+
+inst_271:
+// rs1_val==-3037000499 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0cce, -0xb504f333, 0x3, x4, 2008, x6)
+
+inst_272:
+// rs1_val==-3037000499 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0998, -0xb504f333, 0x555, x4, 2016, x6)
+
+inst_273:
+// rs1_val==-3037000499 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xb504f667, -0xb504f333, -0x556, x4, 2024, x6)
+
+inst_274:
+// rs1_val==-3037000499 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0cc8, -0xb504f333, 0x5, x4, 2032, x6)
+
+inst_275:
+// rs1_val==-3037000499 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ffe, -0xb504f333, 0x333, x4, 2040, x6)
+RVTEST_SIGBASE( x4,signature_x4_1)
+
+inst_276:
+// rs1_val==-3037000499 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0aab, -0xb504f333, 0x666, x4, 0, x6)
+
+inst_277:
+// rs1_val==-3037000499 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xb504f31e, -0xb504f333, -0x2d, x4, 8, x6)
+
+inst_278:
+// rs1_val==-3037000499 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ce0, -0xb504f333, 0x2d, x4, 16, x6)
+
+inst_279:
+// rs1_val==-3037000499 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ccf, -0xb504f333, 0x2, x4, 24, x6)
+
+inst_280:
+// rs1_val==-3037000499 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0999, -0xb504f333, 0x554, x4, 32, x6)
+
+inst_281:
+// rs1_val==-3037000499 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ccd, -0xb504f333, 0x0, x4, 40, x6)
+
+inst_282:
+// rs1_val==-3037000499 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0cc9, -0xb504f333, 0x4, x4, 48, x6)
+
+inst_283:
+// rs1_val==-3037000499 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0fff, -0xb504f333, 0x332, x4, 56, x6)
+
+inst_284:
+// rs1_val==-3037000499 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0aa8, -0xb504f333, 0x665, x4, 64, x6)
+
+inst_285:
+// rs1_val==-3037000499 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ce1, -0xb504f333, 0x2c, x4, 72, x6)
+
+inst_286:
+// rs1_val==-3037000499 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb099b, -0xb504f333, 0x556, x4, 80, x6)
+
+inst_287:
+// rs1_val==-3037000499 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xb504f666, -0xb504f333, -0x555, x4, 88, x6)
+
+inst_288:
+// rs1_val==-3037000499 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ccb, -0xb504f333, 0x6, x4, 96, x6)
+
+inst_289:
+// rs1_val==-3037000499 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ff9, -0xb504f333, 0x334, x4, 104, x6)
+
+inst_290:
+// rs1_val==-3037000499 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0aaa, -0xb504f333, 0x667, x4, 112, x6)
+
+inst_291:
+// rs1_val==-3037000499 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xb504f319, -0xb504f333, -0x2c, x4, 120, x6)
+
+inst_292:
+// rs1_val==-3037000499 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f333; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ce3, -0xb504f333, 0x2e, x4, 128, x6)
+
+inst_293:
+// rs1_val==3037000499 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xb504f330, 0xb504f333, 0x3, x4, 136, x6)
+
+inst_294:
+// rs1_val==3037000499 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xb504f666, 0xb504f333, 0x555, x4, 144, x6)
+
+inst_295:
+// rs1_val==3037000499 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0999, 0xb504f333, -0x556, x4, 152, x6)
+
+inst_296:
+// rs1_val==3037000499 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xb504f336, 0xb504f333, 0x5, x4, 160, x6)
+
+inst_297:
+// rs1_val==3037000499 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xb504f000, 0xb504f333, 0x333, x4, 168, x6)
+
+inst_298:
+// rs1_val==3037000499 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xb504f555, 0xb504f333, 0x666, x4, 176, x6)
+
+inst_299:
+// rs1_val==3037000499 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ce0, 0xb504f333, -0x2d, x4, 184, x6)
+
+inst_300:
+// rs1_val==3037000499 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xb504f31e, 0xb504f333, 0x2d, x4, 192, x6)
+
+inst_301:
+// rs1_val==3037000499 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xb504f331, 0xb504f333, 0x2, x4, 200, x6)
+
+inst_302:
+// rs1_val==3037000499 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xb504f667, 0xb504f333, 0x554, x4, 208, x6)
+
+inst_303:
+// rs1_val==3037000499 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xb504f333, 0xb504f333, 0x0, x4, 216, x6)
+
+inst_304:
+// rs1_val==3037000499 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xb504f337, 0xb504f333, 0x4, x4, 224, x6)
+
+inst_305:
+// rs1_val==3037000499 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xb504f001, 0xb504f333, 0x332, x4, 232, x6)
+
+inst_306:
+// rs1_val==3037000499 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xb504f556, 0xb504f333, 0x665, x4, 240, x6)
+
+inst_307:
+// rs1_val==3037000499 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xb504f31f, 0xb504f333, 0x2c, x4, 248, x6)
+
+inst_308:
+// rs1_val==3037000499 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xb504f665, 0xb504f333, 0x556, x4, 256, x6)
+
+inst_309:
+// rs1_val==3037000499 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0998, 0xb504f333, -0x555, x4, 264, x6)
+
+inst_310:
+// rs1_val==3037000499 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xb504f335, 0xb504f333, 0x6, x4, 272, x6)
+
+inst_311:
+// rs1_val==3037000499 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xb504f007, 0xb504f333, 0x334, x4, 280, x6)
+
+inst_312:
+// rs1_val==3037000499 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xb504f554, 0xb504f333, 0x667, x4, 288, x6)
+
+inst_313:
+// rs1_val==3037000499 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ce7, 0xb504f333, -0x2c, x4, 296, x6)
+
+inst_314:
+// rs1_val==3037000499 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f333; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xb504f31d, 0xb504f333, 0x2e, x4, 304, x6)
+
+inst_315:
+// rs1_val==2 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x1, 0x2, 0x3, x4, 312, x6)
+
+inst_316:
+// rs1_val==2 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x557, 0x2, 0x555, x4, 320, x6)
+
+inst_317:
+// rs1_val==2 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffaa8, 0x2, -0x556, x4, 328, x6)
+
+inst_318:
+// rs1_val==2 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x7, 0x2, 0x5, x4, 336, x6)
+
+inst_319:
+// rs1_val==2 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x331, 0x2, 0x333, x4, 344, x6)
+
+inst_320:
+// rs1_val==2 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x664, 0x2, 0x666, x4, 352, x6)
+
+inst_321:
+// rs1_val==2 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffffd1, 0x2, -0x2d, x4, 360, x6)
+
+inst_322:
+// rs1_val==2 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x2f, 0x2, 0x2d, x4, 368, x6)
+
+inst_323:
+// rs1_val==2 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x0, 0x2, 0x2, x4, 376, x6)
+
+inst_324:
+// rs1_val==2 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x556, 0x2, 0x554, x4, 384, x6)
+
+inst_325:
+// rs1_val==2 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x2, 0x2, 0x0, x4, 392, x6)
+
+inst_326:
+// rs1_val==2 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x6, 0x2, 0x4, x4, 400, x6)
+
+inst_327:
+// rs1_val==2 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x330, 0x2, 0x332, x4, 408, x6)
+
+inst_328:
+// rs1_val==2 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x667, 0x2, 0x665, x4, 416, x6)
+
+inst_329:
+// rs1_val==2 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x2e, 0x2, 0x2c, x4, 424, x6)
+
+inst_330:
+// rs1_val==2 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x554, 0x2, 0x556, x4, 432, x6)
+
+inst_331:
+// rs1_val==2 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffaa9, 0x2, -0x555, x4, 440, x6)
+
+inst_332:
+// rs1_val==2 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x4, 0x2, 0x6, x4, 448, x6)
+
+inst_333:
+// rs1_val==2 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x336, 0x2, 0x334, x4, 456, x6)
+
+inst_334:
+// rs1_val==2 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x665, 0x2, 0x667, x4, 464, x6)
+
+inst_335:
+// rs1_val==2 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffffd6, 0x2, -0x2c, x4, 472, x6)
+
+inst_336:
+// rs1_val==2 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x2; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x2c, 0x2, 0x2e, x4, 480, x6)
+
+inst_337:
+// rs1_val==6148914691236517204 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555557, 0x5555555555555554, 0x3, x4, 488, x6)
+
+inst_338:
+// rs1_val==6148914691236517204 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555001, 0x5555555555555554, 0x555, x4, 496, x6)
+
+inst_339:
+// rs1_val==6148914691236517204 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaffe, 0x5555555555555554, -0x556, x4, 504, x6)
+
+inst_340:
+// rs1_val==6148914691236517204 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555551, 0x5555555555555554, 0x5, x4, 512, x6)
+
+inst_341:
+// rs1_val==6148914691236517204 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555667, 0x5555555555555554, 0x333, x4, 520, x6)
+
+inst_342:
+// rs1_val==6148914691236517204 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555332, 0x5555555555555554, 0x666, x4, 528, x6)
+
+inst_343:
+// rs1_val==6148914691236517204 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaa87, 0x5555555555555554, -0x2d, x4, 536, x6)
+
+inst_344:
+// rs1_val==6148914691236517204 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555579, 0x5555555555555554, 0x2d, x4, 544, x6)
+
+inst_345:
+// rs1_val==6148914691236517204 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555556, 0x5555555555555554, 0x2, x4, 552, x6)
+
+inst_346:
+// rs1_val==6148914691236517204 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555000, 0x5555555555555554, 0x554, x4, 560, x6)
+
+inst_347:
+// rs1_val==6148914691236517204 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555554, 0x5555555555555554, 0x0, x4, 568, x6)
+
+inst_348:
+// rs1_val==6148914691236517204 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555550, 0x5555555555555554, 0x4, x4, 576, x6)
+
+inst_349:
+// rs1_val==6148914691236517204 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555666, 0x5555555555555554, 0x332, x4, 584, x6)
+
+inst_350:
+// rs1_val==6148914691236517204 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555331, 0x5555555555555554, 0x665, x4, 592, x6)
+
+inst_351:
+// rs1_val==6148914691236517204 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555578, 0x5555555555555554, 0x2c, x4, 600, x6)
+
+inst_352:
+// rs1_val==6148914691236517204 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555002, 0x5555555555555554, 0x556, x4, 608, x6)
+
+inst_353:
+// rs1_val==6148914691236517204 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaafff, 0x5555555555555554, -0x555, x4, 616, x6)
+
+inst_354:
+// rs1_val==6148914691236517204 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555552, 0x5555555555555554, 0x6, x4, 624, x6)
+
+inst_355:
+// rs1_val==6148914691236517204 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555660, 0x5555555555555554, 0x334, x4, 632, x6)
+
+inst_356:
+// rs1_val==6148914691236517204 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555333, 0x5555555555555554, 0x667, x4, 640, x6)
+
+inst_357:
+// rs1_val==6148914691236517204 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaa80, 0x5555555555555554, -0x2c, x4, 648, x6)
+
+inst_358:
+// rs1_val==6148914691236517204 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555554; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x555555555555557a, 0x5555555555555554, 0x2e, x4, 656, x6)
+
+inst_359:
+// rs1_val==0 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x3, 0x0, 0x3, x4, 664, x6)
+
+inst_360:
+// rs1_val==0 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x555, 0x0, 0x555, x4, 672, x6)
+
+inst_361:
+// rs1_val==0 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffaaa, 0x0, -0x556, x4, 680, x6)
+
+inst_362:
+// rs1_val==0 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x5, 0x0, 0x5, x4, 688, x6)
+
+inst_363:
+// rs1_val==0 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x333, 0x0, 0x333, x4, 696, x6)
+
+inst_364:
+// rs1_val==0 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x666, 0x0, 0x666, x4, 704, x6)
+
+inst_365:
+// rs1_val==0 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffffd3, 0x0, -0x2d, x4, 712, x6)
+
+inst_366:
+// rs1_val==0 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x2d, 0x0, 0x2d, x4, 720, x6)
+
+inst_367:
+// rs1_val==6148914691236517206 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x555555555555557a, 0x5555555555555556, 0x2c, x4, 728, x6)
+
+inst_368:
+// rs1_val==6148914691236517206 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555000, 0x5555555555555556, 0x556, x4, 736, x6)
+
+inst_369:
+// rs1_val==6148914691236517206 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaffd, 0x5555555555555556, -0x555, x4, 744, x6)
+
+inst_370:
+// rs1_val==6148914691236517206 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555550, 0x5555555555555556, 0x6, x4, 752, x6)
+
+inst_371:
+// rs1_val==6148914691236517206 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555662, 0x5555555555555556, 0x334, x4, 760, x6)
+
+inst_372:
+// rs1_val==6148914691236517206 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555331, 0x5555555555555556, 0x667, x4, 768, x6)
+
+inst_373:
+// rs1_val==6148914691236517206 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaa82, 0x5555555555555556, -0x2c, x4, 776, x6)
+
+inst_374:
+// rs1_val==6148914691236517206 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555578, 0x5555555555555556, 0x2e, x4, 784, x6)
+
+inst_375:
+// rs1_val==-6148914691236517205 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaaa8, -0x5555555555555555, 0x3, x4, 792, x6)
+
+inst_376:
+// rs1_val==-6148914691236517205 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaffe, -0x5555555555555555, 0x555, x4, 800, x6)
+
+inst_377:
+// rs1_val==-6148914691236517205 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555001, -0x5555555555555555, -0x556, x4, 808, x6)
+
+inst_378:
+// rs1_val==-6148914691236517205 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaaae, -0x5555555555555555, 0x5, x4, 816, x6)
+
+inst_379:
+// rs1_val==-6148914691236517205 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaa998, -0x5555555555555555, 0x333, x4, 824, x6)
+
+inst_380:
+// rs1_val==-6148914691236517205 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaccd, -0x5555555555555555, 0x666, x4, 832, x6)
+
+inst_381:
+// rs1_val==-6148914691236517205 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555578, -0x5555555555555555, -0x2d, x4, 840, x6)
+
+inst_382:
+// rs1_val==-6148914691236517205 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaa86, -0x5555555555555555, 0x2d, x4, 848, x6)
+
+inst_383:
+// rs1_val==-6148914691236517205 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaaa9, -0x5555555555555555, 0x2, x4, 856, x6)
+
+inst_384:
+// rs1_val==-6148914691236517205 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaafff, -0x5555555555555555, 0x554, x4, 864, x6)
+
+inst_385:
+// rs1_val==-6148914691236517205 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaaab, -0x5555555555555555, 0x0, x4, 872, x6)
+
+inst_386:
+// rs1_val==-6148914691236517205 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaaaf, -0x5555555555555555, 0x4, x4, 880, x6)
+
+inst_387:
+// rs1_val==-6148914691236517205 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaa999, -0x5555555555555555, 0x332, x4, 888, x6)
+
+inst_388:
+// rs1_val==-6148914691236517205 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaacce, -0x5555555555555555, 0x665, x4, 896, x6)
+
+inst_389:
+// rs1_val==-6148914691236517205 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaa87, -0x5555555555555555, 0x2c, x4, 904, x6)
+
+inst_390:
+// rs1_val==-6148914691236517205 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaffd, -0x5555555555555555, 0x556, x4, 912, x6)
+
+inst_391:
+// rs1_val==-6148914691236517205 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555000, -0x5555555555555555, -0x555, x4, 920, x6)
+
+inst_392:
+// rs1_val==-6148914691236517205 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaaad, -0x5555555555555555, 0x6, x4, 928, x6)
+
+inst_393:
+// rs1_val==-6148914691236517205 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaa99f, -0x5555555555555555, 0x334, x4, 936, x6)
+
+inst_394:
+// rs1_val==-6148914691236517205 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaccc, -0x5555555555555555, 0x667, x4, 944, x6)
+
+inst_395:
+// rs1_val==-6148914691236517205 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x555555555555557f, -0x5555555555555555, -0x2c, x4, 952, x6)
+
+inst_396:
+// rs1_val==-6148914691236517205 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x5555555555555555; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaa85, -0x5555555555555555, 0x2e, x4, 960, x6)
+
+inst_397:
+// rs1_val==6 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x5, 0x6, 0x3, x4, 968, x6)
+
+inst_398:
+// rs1_val==6 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x553, 0x6, 0x555, x4, 976, x6)
+
+inst_399:
+// rs1_val==6 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffaac, 0x6, -0x556, x4, 984, x6)
+
+inst_400:
+// rs1_val==6 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x3, 0x6, 0x5, x4, 992, x6)
+
+inst_401:
+// rs1_val==6 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x335, 0x6, 0x333, x4, 1000, x6)
+
+inst_402:
+// rs1_val==6 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x660, 0x6, 0x666, x4, 1008, x6)
+
+inst_403:
+// rs1_val==6 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffffd5, 0x6, -0x2d, x4, 1016, x6)
+
+inst_404:
+// rs1_val==6 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x2b, 0x6, 0x2d, x4, 1024, x6)
+
+inst_405:
+// rs1_val==6 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x4, 0x6, 0x2, x4, 1032, x6)
+
+inst_406:
+// rs1_val==6 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x552, 0x6, 0x554, x4, 1040, x6)
+
+inst_407:
+// rs1_val==6 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x6, 0x6, 0x0, x4, 1048, x6)
+
+inst_408:
+// rs1_val==6 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x2, 0x6, 0x4, x4, 1056, x6)
+
+inst_409:
+// rs1_val==6 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x334, 0x6, 0x332, x4, 1064, x6)
+
+inst_410:
+// rs1_val==6 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x663, 0x6, 0x665, x4, 1072, x6)
+
+inst_411:
+// rs1_val==6 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x2a, 0x6, 0x2c, x4, 1080, x6)
+
+inst_412:
+// rs1_val==6 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x550, 0x6, 0x556, x4, 1088, x6)
+
+inst_413:
+// rs1_val==6 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffaad, 0x6, -0x555, x4, 1096, x6)
+
+inst_414:
+// rs1_val==6 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x0, 0x6, 0x6, x4, 1104, x6)
+
+inst_415:
+// rs1_val==6 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x332, 0x6, 0x334, x4, 1112, x6)
+
+inst_416:
+// rs1_val==6 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x661, 0x6, 0x667, x4, 1120, x6)
+
+inst_417:
+// rs1_val==6 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffffd2, 0x6, -0x2c, x4, 1128, x6)
+
+inst_418:
+// rs1_val==6 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x28, 0x6, 0x2e, x4, 1136, x6)
+
+inst_419:
+// rs1_val==3689348814741910324 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333337, 0x3333333333333334, 0x3, x4, 1144, x6)
+
+inst_420:
+// rs1_val==3689348814741910324 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333661, 0x3333333333333334, 0x555, x4, 1152, x6)
+
+inst_421:
+// rs1_val==3689348814741910324 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xccccccccccccc99e, 0x3333333333333334, -0x556, x4, 1160, x6)
+
+inst_422:
+// rs1_val==3689348814741910324 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333331, 0x3333333333333334, 0x5, x4, 1168, x6)
+
+inst_423:
+// rs1_val==3689348814741910324 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333007, 0x3333333333333334, 0x333, x4, 1176, x6)
+
+inst_424:
+// rs1_val==3689348814741910324 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333552, 0x3333333333333334, 0x666, x4, 1184, x6)
+
+inst_425:
+// rs1_val==3689348814741910324 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xcccccccccccccce7, 0x3333333333333334, -0x2d, x4, 1192, x6)
+
+inst_426:
+// rs1_val==3689348814741910324 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333319, 0x3333333333333334, 0x2d, x4, 1200, x6)
+
+inst_427:
+// rs1_val==3689348814741910324 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333336, 0x3333333333333334, 0x2, x4, 1208, x6)
+
+inst_428:
+// rs1_val==3689348814741910324 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333660, 0x3333333333333334, 0x554, x4, 1216, x6)
+
+inst_429:
+// rs1_val==3689348814741910324 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333334, 0x3333333333333334, 0x0, x4, 1224, x6)
+
+inst_430:
+// rs1_val==3689348814741910324 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333330, 0x3333333333333334, 0x4, x4, 1232, x6)
+
+inst_431:
+// rs1_val==3689348814741910324 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333006, 0x3333333333333334, 0x332, x4, 1240, x6)
+
+inst_432:
+// rs1_val==3689348814741910324 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333551, 0x3333333333333334, 0x665, x4, 1248, x6)
+
+inst_433:
+// rs1_val==3689348814741910324 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333318, 0x3333333333333334, 0x2c, x4, 1256, x6)
+
+inst_434:
+// rs1_val==3689348814741910324 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333662, 0x3333333333333334, 0x556, x4, 1264, x6)
+
+inst_435:
+// rs1_val==3689348814741910324 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xccccccccccccc99f, 0x3333333333333334, -0x555, x4, 1272, x6)
+
+inst_436:
+// rs1_val==3689348814741910324 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333332, 0x3333333333333334, 0x6, x4, 1280, x6)
+
+inst_437:
+// rs1_val==3689348814741910324 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333000, 0x3333333333333334, 0x334, x4, 1288, x6)
+
+inst_438:
+// rs1_val==3689348814741910324 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333553, 0x3333333333333334, 0x667, x4, 1296, x6)
+
+inst_439:
+// rs1_val==3689348814741910324 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xcccccccccccccce0, 0x3333333333333334, -0x2c, x4, 1304, x6)
+
+inst_440:
+// rs1_val==3689348814741910324 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333334; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x333333333333331a, 0x3333333333333334, 0x2e, x4, 1312, x6)
+
+inst_441:
+// rs1_val==7378697629483820647 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666664, 0x6666666666666667, 0x3, x4, 1320, x6)
+
+inst_442:
+// rs1_val==7378697629483820647 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666332, 0x6666666666666667, 0x555, x4, 1328, x6)
+
+inst_443:
+// rs1_val==7378697629483820647 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0x9999999999999ccd, 0x6666666666666667, -0x556, x4, 1336, x6)
+
+inst_444:
+// rs1_val==7378697629483820647 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666662, 0x6666666666666667, 0x5, x4, 1344, x6)
+
+inst_445:
+// rs1_val==7378697629483820647 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666554, 0x6666666666666667, 0x333, x4, 1352, x6)
+
+inst_446:
+// rs1_val==7378697629483820647 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666001, 0x6666666666666667, 0x666, x4, 1360, x6)
+
+inst_447:
+// rs1_val==7378697629483820647 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0x99999999999999b4, 0x6666666666666667, -0x2d, x4, 1368, x6)
+
+inst_448:
+// rs1_val==7378697629483820647 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x666666666666664a, 0x6666666666666667, 0x2d, x4, 1376, x6)
+
+inst_449:
+// rs1_val==7378697629483820647 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666665, 0x6666666666666667, 0x2, x4, 1384, x6)
+
+inst_450:
+// rs1_val==7378697629483820647 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666333, 0x6666666666666667, 0x554, x4, 1392, x6)
+
+inst_451:
+// rs1_val==7378697629483820647 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666667, 0x6666666666666667, 0x0, x4, 1400, x6)
+
+inst_452:
+// rs1_val==7378697629483820647 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666663, 0x6666666666666667, 0x4, x4, 1408, x6)
+
+inst_453:
+// rs1_val==7378697629483820647 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666555, 0x6666666666666667, 0x332, x4, 1416, x6)
+
+inst_454:
+// rs1_val==7378697629483820647 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666002, 0x6666666666666667, 0x665, x4, 1424, x6)
+
+inst_455:
+// rs1_val==7378697629483820647 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x666666666666664b, 0x6666666666666667, 0x2c, x4, 1432, x6)
+
+inst_456:
+// rs1_val==7378697629483820647 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666331, 0x6666666666666667, 0x556, x4, 1440, x6)
+
+inst_457:
+// rs1_val==7378697629483820647 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0x9999999999999ccc, 0x6666666666666667, -0x555, x4, 1448, x6)
+
+inst_458:
+// rs1_val==7378697629483820647 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666661, 0x6666666666666667, 0x6, x4, 1456, x6)
+
+inst_459:
+// rs1_val==7378697629483820647 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666553, 0x6666666666666667, 0x334, x4, 1464, x6)
+
+inst_460:
+// rs1_val==7378697629483820647 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666000, 0x6666666666666667, 0x667, x4, 1472, x6)
+
+inst_461:
+// rs1_val==7378697629483820647 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x99999999999999b3, 0x6666666666666667, -0x2c, x4, 1480, x6)
+
+inst_462:
+// rs1_val==7378697629483820647 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666667; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666649, 0x6666666666666667, 0x2e, x4, 1488, x6)
+
+inst_463:
+// rs1_val==-3037000498 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ccd, -0xb504f332, 0x3, x4, 1496, x6)
+
+inst_464:
+// rs1_val==-3037000498 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb099b, -0xb504f332, 0x555, x4, 1504, x6)
+
+inst_465:
+// rs1_val==-3037000498 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xb504f664, -0xb504f332, -0x556, x4, 1512, x6)
+
+inst_466:
+// rs1_val==-3037000498 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ccb, -0xb504f332, 0x5, x4, 1520, x6)
+
+inst_467:
+// rs1_val==-3037000498 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ffd, -0xb504f332, 0x333, x4, 1528, x6)
+
+inst_468:
+// rs1_val==-3037000498 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0aa8, -0xb504f332, 0x666, x4, 1536, x6)
+
+inst_469:
+// rs1_val==-3037000498 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xb504f31d, -0xb504f332, -0x2d, x4, 1544, x6)
+
+inst_470:
+// rs1_val==-3037000498 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ce3, -0xb504f332, 0x2d, x4, 1552, x6)
+
+inst_471:
+// rs1_val==-3037000498 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ccc, -0xb504f332, 0x2, x4, 1560, x6)
+
+inst_472:
+// rs1_val==-3037000498 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb099a, -0xb504f332, 0x554, x4, 1568, x6)
+
+inst_473:
+// rs1_val==-3037000498 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0cce, -0xb504f332, 0x0, x4, 1576, x6)
+
+inst_474:
+// rs1_val==-3037000498 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0cca, -0xb504f332, 0x4, x4, 1584, x6)
+
+inst_475:
+// rs1_val==-3037000498 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ffc, -0xb504f332, 0x332, x4, 1592, x6)
+
+inst_476:
+// rs1_val==-3037000498 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0aab, -0xb504f332, 0x665, x4, 1600, x6)
+
+inst_477:
+// rs1_val==-3037000498 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ce2, -0xb504f332, 0x2c, x4, 1608, x6)
+
+inst_478:
+// rs1_val==-3037000498 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0998, -0xb504f332, 0x556, x4, 1616, x6)
+
+inst_479:
+// rs1_val==-3037000498 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xb504f665, -0xb504f332, -0x555, x4, 1624, x6)
+
+inst_480:
+// rs1_val==-3037000498 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0cc8, -0xb504f332, 0x6, x4, 1632, x6)
+
+inst_481:
+// rs1_val==-3037000498 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ffa, -0xb504f332, 0x334, x4, 1640, x6)
+
+inst_482:
+// rs1_val==-3037000498 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0aa9, -0xb504f332, 0x667, x4, 1648, x6)
+
+inst_483:
+// rs1_val==-3037000498 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xb504f31a, -0xb504f332, -0x2c, x4, 1656, x6)
+
+inst_484:
+// rs1_val==-3037000498 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:-0xb504f332; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ce0, -0xb504f332, 0x2e, x4, 1664, x6)
+
+inst_485:
+// rs1_val==3037000500 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xb504f337, 0xb504f334, 0x3, x4, 1672, x6)
+
+inst_486:
+// rs1_val==3037000500 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xb504f661, 0xb504f334, 0x555, x4, 1680, x6)
+
+inst_487:
+// rs1_val==3037000500 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb099e, 0xb504f334, -0x556, x4, 1688, x6)
+
+inst_488:
+// rs1_val==3037000500 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xb504f331, 0xb504f334, 0x5, x4, 1696, x6)
+
+inst_489:
+// rs1_val==3037000500 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xb504f007, 0xb504f334, 0x333, x4, 1704, x6)
+
+inst_490:
+// rs1_val==3037000500 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xb504f552, 0xb504f334, 0x666, x4, 1712, x6)
+
+inst_491:
+// rs1_val==3037000500 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ce7, 0xb504f334, -0x2d, x4, 1720, x6)
+
+inst_492:
+// rs1_val==3037000500 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xb504f319, 0xb504f334, 0x2d, x4, 1728, x6)
+
+inst_493:
+// rs1_val==3037000500 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xb504f336, 0xb504f334, 0x2, x4, 1736, x6)
+
+inst_494:
+// rs1_val==3037000500 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xb504f660, 0xb504f334, 0x554, x4, 1744, x6)
+
+inst_495:
+// rs1_val==3037000500 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xb504f334, 0xb504f334, 0x0, x4, 1752, x6)
+
+inst_496:
+// rs1_val==3037000500 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xb504f330, 0xb504f334, 0x4, x4, 1760, x6)
+
+inst_497:
+// rs1_val==3037000500 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xb504f006, 0xb504f334, 0x332, x4, 1768, x6)
+
+inst_498:
+// rs1_val==3037000500 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xb504f551, 0xb504f334, 0x665, x4, 1776, x6)
+
+inst_499:
+// rs1_val==3037000500 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xb504f318, 0xb504f334, 0x2c, x4, 1784, x6)
+
+inst_500:
+// rs1_val==3037000500 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xb504f662, 0xb504f334, 0x556, x4, 1792, x6)
+
+inst_501:
+// rs1_val==3037000500 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb099f, 0xb504f334, -0x555, x4, 1800, x6)
+
+inst_502:
+// rs1_val==3037000500 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xb504f332, 0xb504f334, 0x6, x4, 1808, x6)
+
+inst_503:
+// rs1_val==3037000500 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xb504f000, 0xb504f334, 0x334, x4, 1816, x6)
+
+inst_504:
+// rs1_val==3037000500 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xb504f553, 0xb504f334, 0x667, x4, 1824, x6)
+
+inst_505:
+// rs1_val==3037000500 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ce0, 0xb504f334, -0x2c, x4, 1832, x6)
+
+inst_506:
+// rs1_val==3037000500 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f334; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xb504f31a, 0xb504f334, 0x2e, x4, 1840, x6)
+
+inst_507:
+// rs1_val==0 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x2, 0x0, 0x2, x4, 1848, x6)
+
+inst_508:
+// rs1_val==0 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x554, 0x0, 0x554, x4, 1856, x6)
+
+inst_509:
+// rs1_val==0 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x4, 0x0, 0x4, x4, 1864, x6)
+
+inst_510:
+// rs1_val==0 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x332, 0x0, 0x332, x4, 1872, x6)
+
+inst_511:
+// rs1_val==0 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x665, 0x0, 0x665, x4, 1880, x6)
+
+inst_512:
+// rs1_val==0 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x2c, 0x0, 0x2c, x4, 1888, x6)
+
+inst_513:
+// rs1_val==0 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x556, 0x0, 0x556, x4, 1896, x6)
+
+inst_514:
+// rs1_val==0 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffaab, 0x0, -0x555, x4, 1904, x6)
+
+inst_515:
+// rs1_val==0 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x6, 0x0, 0x6, x4, 1912, x6)
+
+inst_516:
+// rs1_val==0 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x334, 0x0, 0x334, x4, 1920, x6)
+
+inst_517:
+// rs1_val==0 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x667, 0x0, 0x667, x4, 1928, x6)
+
+inst_518:
+// rs1_val==0 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffffd4, 0x0, -0x2c, x4, 1936, x6)
+
+inst_519:
+// rs1_val==0 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x0; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x2e, 0x0, 0x2e, x4, 1944, x6)
+
+inst_520:
+// rs1_val==4 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x7, 0x4, 0x3, x4, 1952, x6)
+
+inst_521:
+// rs1_val==4 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x551, 0x4, 0x555, x4, 1960, x6)
+
+inst_522:
+// rs1_val==4 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffaae, 0x4, -0x556, x4, 1968, x6)
+
+inst_523:
+// rs1_val==4 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x1, 0x4, 0x5, x4, 1976, x6)
+
+inst_524:
+// rs1_val==4 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x337, 0x4, 0x333, x4, 1984, x6)
+
+inst_525:
+// rs1_val==4 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x662, 0x4, 0x666, x4, 1992, x6)
+
+inst_526:
+// rs1_val==4 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffffd7, 0x4, -0x2d, x4, 2000, x6)
+
+inst_527:
+// rs1_val==4 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x29, 0x4, 0x2d, x4, 2008, x6)
+
+inst_528:
+// rs1_val==4 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x6, 0x4, 0x2, x4, 2016, x6)
+
+inst_529:
+// rs1_val==4 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x550, 0x4, 0x554, x4, 2024, x6)
+
+inst_530:
+// rs1_val==4 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x4, 0x4, 0x0, x4, 2032, x6)
+
+inst_531:
+// rs1_val==4 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x0, 0x4, 0x4, x4, 2040, x6)
+RVTEST_SIGBASE( x4,signature_x4_2)
+
+inst_532:
+// rs1_val==4 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x336, 0x4, 0x332, x4, 0, x6)
+
+inst_533:
+// rs1_val==4 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x661, 0x4, 0x665, x4, 8, x6)
+
+inst_534:
+// rs1_val==4 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x28, 0x4, 0x2c, x4, 16, x6)
+
+inst_535:
+// rs1_val==4 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x552, 0x4, 0x556, x4, 24, x6)
+
+inst_536:
+// rs1_val==4 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xfffffffffffffaaf, 0x4, -0x555, x4, 32, x6)
+
+inst_537:
+// rs1_val==4 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x2, 0x4, 0x6, x4, 40, x6)
+
+inst_538:
+// rs1_val==4 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x330, 0x4, 0x334, x4, 48, x6)
+
+inst_539:
+// rs1_val==4 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x663, 0x4, 0x667, x4, 56, x6)
+
+inst_540:
+// rs1_val==4 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffffffffffd0, 0x4, -0x2c, x4, 64, x6)
+
+inst_541:
+// rs1_val==4 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x4; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x2a, 0x4, 0x2e, x4, 72, x6)
+
+inst_542:
+// rs1_val==3689348814741910322 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333331, 0x3333333333333332, 0x3, x4, 80, x6)
+
+inst_543:
+// rs1_val==3689348814741910322 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333667, 0x3333333333333332, 0x555, x4, 88, x6)
+
+inst_544:
+// rs1_val==3689348814741910322 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xccccccccccccc998, 0x3333333333333332, -0x556, x4, 96, x6)
+
+inst_545:
+// rs1_val==3689348814741910322 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333337, 0x3333333333333332, 0x5, x4, 104, x6)
+
+inst_546:
+// rs1_val==3689348814741910322 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333001, 0x3333333333333332, 0x333, x4, 112, x6)
+
+inst_547:
+// rs1_val==3689348814741910322 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333554, 0x3333333333333332, 0x666, x4, 120, x6)
+
+inst_548:
+// rs1_val==3689348814741910322 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xcccccccccccccce1, 0x3333333333333332, -0x2d, x4, 128, x6)
+
+inst_549:
+// rs1_val==3689348814741910322 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x333333333333331f, 0x3333333333333332, 0x2d, x4, 136, x6)
+
+inst_550:
+// rs1_val==3689348814741910322 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333330, 0x3333333333333332, 0x2, x4, 144, x6)
+
+inst_551:
+// rs1_val==3689348814741910322 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333666, 0x3333333333333332, 0x554, x4, 152, x6)
+
+inst_552:
+// rs1_val==3689348814741910322 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333332, 0x3333333333333332, 0x0, x4, 160, x6)
+
+inst_553:
+// rs1_val==3689348814741910322 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333336, 0x3333333333333332, 0x4, x4, 168, x6)
+
+inst_554:
+// rs1_val==3689348814741910322 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333000, 0x3333333333333332, 0x332, x4, 176, x6)
+
+inst_555:
+// rs1_val==3689348814741910322 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333557, 0x3333333333333332, 0x665, x4, 184, x6)
+
+inst_556:
+// rs1_val==3689348814741910322 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x333333333333331e, 0x3333333333333332, 0x2c, x4, 192, x6)
+
+inst_557:
+// rs1_val==3689348814741910322 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333664, 0x3333333333333332, 0x556, x4, 200, x6)
+
+inst_558:
+// rs1_val==3689348814741910322 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xccccccccccccc999, 0x3333333333333332, -0x555, x4, 208, x6)
+
+inst_559:
+// rs1_val==3689348814741910322 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333334, 0x3333333333333332, 0x6, x4, 216, x6)
+
+inst_560:
+// rs1_val==3689348814741910322 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333006, 0x3333333333333332, 0x334, x4, 224, x6)
+
+inst_561:
+// rs1_val==3689348814741910322 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x3333333333333555, 0x3333333333333332, 0x667, x4, 232, x6)
+
+inst_562:
+// rs1_val==3689348814741910322 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xcccccccccccccce6, 0x3333333333333332, -0x2c, x4, 240, x6)
+
+inst_563:
+// rs1_val==3689348814741910322 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x3333333333333332; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x333333333333331c, 0x3333333333333332, 0x2e, x4, 248, x6)
+
+inst_564:
+// rs1_val==7378697629483820645 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666666, 0x6666666666666665, 0x3, x4, 256, x6)
+
+inst_565:
+// rs1_val==7378697629483820645 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666330, 0x6666666666666665, 0x555, x4, 264, x6)
+
+inst_566:
+// rs1_val==7378697629483820645 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0x9999999999999ccf, 0x6666666666666665, -0x556, x4, 272, x6)
+
+inst_567:
+// rs1_val==7378697629483820645 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666660, 0x6666666666666665, 0x5, x4, 280, x6)
+
+inst_568:
+// rs1_val==7378697629483820645 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666556, 0x6666666666666665, 0x333, x4, 288, x6)
+
+inst_569:
+// rs1_val==7378697629483820645 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666003, 0x6666666666666665, 0x666, x4, 296, x6)
+
+inst_570:
+// rs1_val==7378697629483820645 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0x99999999999999b6, 0x6666666666666665, -0x2d, x4, 304, x6)
+
+inst_571:
+// rs1_val==7378697629483820645 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666648, 0x6666666666666665, 0x2d, x4, 312, x6)
+
+inst_572:
+// rs1_val==7378697629483820645 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666667, 0x6666666666666665, 0x2, x4, 320, x6)
+
+inst_573:
+// rs1_val==7378697629483820645 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666331, 0x6666666666666665, 0x554, x4, 328, x6)
+
+inst_574:
+// rs1_val==7378697629483820645 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666665, 0x6666666666666665, 0x0, x4, 336, x6)
+
+inst_575:
+// rs1_val==7378697629483820645 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666661, 0x6666666666666665, 0x4, x4, 344, x6)
+
+inst_576:
+// rs1_val==7378697629483820645 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666557, 0x6666666666666665, 0x332, x4, 352, x6)
+
+inst_577:
+// rs1_val==7378697629483820645 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666000, 0x6666666666666665, 0x665, x4, 360, x6)
+
+inst_578:
+// rs1_val==7378697629483820645 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666649, 0x6666666666666665, 0x2c, x4, 368, x6)
+
+inst_579:
+// rs1_val==7378697629483820645 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666333, 0x6666666666666665, 0x556, x4, 376, x6)
+
+inst_580:
+// rs1_val==7378697629483820645 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0x9999999999999cce, 0x6666666666666665, -0x555, x4, 384, x6)
+
+inst_581:
+// rs1_val==7378697629483820645 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666663, 0x6666666666666665, 0x6, x4, 392, x6)
+
+inst_582:
+// rs1_val==7378697629483820645 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666551, 0x6666666666666665, 0x334, x4, 400, x6)
+
+inst_583:
+// rs1_val==7378697629483820645 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0x6666666666666002, 0x6666666666666665, 0x667, x4, 408, x6)
+
+inst_584:
+// rs1_val==7378697629483820645 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0x99999999999999b1, 0x6666666666666665, -0x2c, x4, 416, x6)
+
+inst_585:
+// rs1_val==7378697629483820645 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x6666666666666665; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0x666666666666664b, 0x6666666666666665, 0x2e, x4, 424, x6)
+
+inst_586:
+// rs1_val==3037000498 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0xb504f331, 0xb504f332, 0x3, x4, 432, x6)
+
+inst_587:
+// rs1_val==3037000498 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0xb504f667, 0xb504f332, 0x555, x4, 440, x6)
+
+inst_588:
+// rs1_val==3037000498 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0998, 0xb504f332, -0x556, x4, 448, x6)
+
+inst_589:
+// rs1_val==3037000498 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0xb504f337, 0xb504f332, 0x5, x4, 456, x6)
+
+inst_590:
+// rs1_val==3037000498 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0xb504f001, 0xb504f332, 0x333, x4, 464, x6)
+
+inst_591:
+// rs1_val==3037000498 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0xb504f554, 0xb504f332, 0x666, x4, 472, x6)
+
+inst_592:
+// rs1_val==3037000498 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ce1, 0xb504f332, -0x2d, x4, 480, x6)
+
+inst_593:
+// rs1_val==3037000498 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0xb504f31f, 0xb504f332, 0x2d, x4, 488, x6)
+
+inst_594:
+// rs1_val==3037000498 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0xb504f330, 0xb504f332, 0x2, x4, 496, x6)
+
+inst_595:
+// rs1_val==3037000498 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0xb504f666, 0xb504f332, 0x554, x4, 504, x6)
+
+inst_596:
+// rs1_val==3037000498 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0xb504f332, 0xb504f332, 0x0, x4, 512, x6)
+
+inst_597:
+// rs1_val==3037000498 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0xb504f336, 0xb504f332, 0x4, x4, 520, x6)
+
+inst_598:
+// rs1_val==3037000498 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0xb504f000, 0xb504f332, 0x332, x4, 528, x6)
+
+inst_599:
+// rs1_val==3037000498 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0xb504f557, 0xb504f332, 0x665, x4, 536, x6)
+
+inst_600:
+// rs1_val==3037000498 and imm_val==44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2c
+TEST_IMM_OP( xori, x11, x10, 0xb504f31e, 0xb504f332, 0x2c, x4, 544, x6)
+
+inst_601:
+// rs1_val==3037000498 and imm_val==1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x556
+TEST_IMM_OP( xori, x11, x10, 0xb504f664, 0xb504f332, 0x556, x4, 552, x6)
+
+inst_602:
+// rs1_val==3037000498 and imm_val==-1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x555
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0999, 0xb504f332, -0x555, x4, 560, x6)
+
+inst_603:
+// rs1_val==3037000498 and imm_val==6,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x6
+TEST_IMM_OP( xori, x11, x10, 0xb504f334, 0xb504f332, 0x6, x4, 568, x6)
+
+inst_604:
+// rs1_val==3037000498 and imm_val==820,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x334
+TEST_IMM_OP( xori, x11, x10, 0xb504f006, 0xb504f332, 0x334, x4, 576, x6)
+
+inst_605:
+// rs1_val==3037000498 and imm_val==1639,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x667
+TEST_IMM_OP( xori, x11, x10, 0xb504f555, 0xb504f332, 0x667, x4, 584, x6)
+
+inst_606:
+// rs1_val==3037000498 and imm_val==-44,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:-0x2c
+TEST_IMM_OP( xori, x11, x10, 0xffffffff4afb0ce6, 0xb504f332, -0x2c, x4, 592, x6)
+
+inst_607:
+// rs1_val==3037000498 and imm_val==46,
+// opcode: xori ; op1:x10; dest:x11; op1val:0xb504f332; immval:0x2e
+TEST_IMM_OP( xori, x11, x10, 0xb504f31c, 0xb504f332, 0x2e, x4, 600, x6)
+
+inst_608:
+// rs1_val==6148914691236517206 and imm_val==3,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x3
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555555, 0x5555555555555556, 0x3, x4, 608, x6)
+
+inst_609:
+// rs1_val==6148914691236517206 and imm_val==1365,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x555
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555003, 0x5555555555555556, 0x555, x4, 616, x6)
+
+inst_610:
+// rs1_val==6148914691236517206 and imm_val==-1366,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x556
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaffc, 0x5555555555555556, -0x556, x4, 624, x6)
+
+inst_611:
+// rs1_val==6148914691236517206 and imm_val==5,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x5
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555553, 0x5555555555555556, 0x5, x4, 632, x6)
+
+inst_612:
+// rs1_val==6148914691236517206 and imm_val==819,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x333
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555665, 0x5555555555555556, 0x333, x4, 640, x6)
+
+inst_613:
+// rs1_val==6148914691236517206 and imm_val==1638,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x666
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555330, 0x5555555555555556, 0x666, x4, 648, x6)
+
+inst_614:
+// rs1_val==6148914691236517206 and imm_val==-45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:-0x2d
+TEST_IMM_OP( xori, x11, x10, 0xaaaaaaaaaaaaaa85, 0x5555555555555556, -0x2d, x4, 656, x6)
+
+inst_615:
+// rs1_val==6148914691236517206 and imm_val==45,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2d
+TEST_IMM_OP( xori, x11, x10, 0x555555555555557b, 0x5555555555555556, 0x2d, x4, 664, x6)
+
+inst_616:
+// rs1_val==6148914691236517206 and imm_val==2,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x2
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555554, 0x5555555555555556, 0x2, x4, 672, x6)
+
+inst_617:
+// rs1_val==6148914691236517206 and imm_val==1364,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x554
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555002, 0x5555555555555556, 0x554, x4, 680, x6)
+
+inst_618:
+// rs1_val==6148914691236517206 and imm_val==0,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x0
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555556, 0x5555555555555556, 0x0, x4, 688, x6)
+
+inst_619:
+// rs1_val==6148914691236517206 and imm_val==4,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x4
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555552, 0x5555555555555556, 0x4, x4, 696, x6)
+
+inst_620:
+// rs1_val==6148914691236517206 and imm_val==818,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x332
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555664, 0x5555555555555556, 0x332, x4, 704, x6)
+
+inst_621:
+// rs1_val==6148914691236517206 and imm_val==1637,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x5555555555555556; immval:0x665
+TEST_IMM_OP( xori, x11, x10, 0x5555555555555333, 0x5555555555555556, 0x665, x4, 712, x6)
+
+inst_622:
+// imm_val == -65, rs1_val == -8589934593
+// opcode: xori ; op1:x10; dest:x11; op1val:-0x200000001; immval:-0x41
+TEST_IMM_OP( xori, x11, x10, 0x200000040, -0x200000001, -0x41, x4, 720, x6)
+
+inst_623:
+// rs1_val == 8,
+// opcode: xori ; op1:x10; dest:x11; op1val:0x8; immval:0x1
+TEST_IMM_OP( xori, x11, x10, 0x9, 0x8, 0x1, x4, 728, x6)
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+signature_x2_0:
+ .fill 0*(XLEN/32),4,0xdeadbeef
+
+
+signature_x2_1:
+ .fill 20*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_0:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_1:
+ .fill 256*(XLEN/32),4,0xdeadbeef
+
+
+signature_x4_2:
+ .fill 92*(XLEN/32),4,0xdeadbeef
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64DS-01.S b/riscof/suite/rv64i_m/K_unratified/AES64DS-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..14139dfa60458a6e3ed70672d45dc674dd05e812
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64DS-01.S
@@ -0,0 +1,1838 @@
+// RISC-V Architectural Validation Test AES64DS-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64ds'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64ds)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64ds)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x396b70537c4476ad), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x396b70537c4476ad, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x1d185a3bcd13c6dd), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x1d185a3bcd13c6dd, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xd0d66f3612bdcafe), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0xd0d66f3612bdcafe, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xe0b76e34d9e84e59), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0xe0b76e34d9e84e59, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x480548727ccfd792), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x480548727ccfd792, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x981a7cfdfdde161b), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x981a7cfdfdde161b, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xd4f863198f124c33), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0xd4f863198f124c33, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x6f8c046b11e06e1f), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0x6f8c046b11e06e1f, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x7f4c7c43777da757), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x7f4c7c43777da757, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x18212786efbb8b32), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0x18212786efbb8b32, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x7d7d5252527d7d09), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x7d7d5252527d7d09, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x7d7d5252527d7d6a), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0x7d7d5252527d7d6a, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x7d7d5252527d7d30), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x7d7d5252527d7d30, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x7d7d5252527d7dbf), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0x7d7d5252527d7dbf, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x7d7d5252527d7d7c), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0x7d7d5252527d7d7c, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x7d7d5252527d7d54), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x7d7d5252527d7d54, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x7d7d5252527d7d72), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x7d7d5252527d7d72, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x7d7d5252527d7d3a), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x7d7d5252527d7d3a, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x7d7d0952527d7d52), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x7d7d0952527d7d52, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x7d6b6a52527d7d52), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0x7d6b6a52527d7d52, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x7df43052527d7d52), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x7df43052527d7d52, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x7defbf52527d7d52), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0x7defbf52527d7d52, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x7d617c52527d7d52), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0x7d617c52527d7d52, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x7d265452527d7d52), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0x7d265452527d7d52, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x7d637252527d7d52), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0x7d637252527d7d52, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x7d213a52527d7d52), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0x7d213a52527d7d52, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x7d0c5252527d7d52), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x7d0c5252527d7d52, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x7d7d5252527d6b52), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0x7d7d5252527d6b52, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x7d7d5252527df452), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0x7d7d5252527df452, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x7d7d5252527def52), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x7d7d5252527def52, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x7d7d5252527d6152), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0x7d7d5252527d6152, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x7d7d5252527d2652), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x7d7d5252527d2652, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x7d7d5252527d6352), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x7d7d5252527d6352, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x7d7d5252527d2152), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x7d7d5252527d2152, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x7d7d5252527d0c52), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x7d7d5252527d0c52, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x7d7d5252527d7d52), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x7d7d5252527d7d52, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x7d7d5252527d7d52), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x7d7d5252527d7d52, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x7d7d5252527d7d52), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x7d7d5252527d7d52, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x7d7d5252527d7d52), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0x7d7d5252527d7d52, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x7d7d5252527d7d52), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x7d7d5252527d7d52, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x7d7d5252527d7d52), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0x7d7d5252527d7d52, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x7d7d5252527d7d52), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x7d7d5252527d7d52, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x7d7d5209527d7d52), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0x7d7d5209527d7d52, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x6b7d526a527d7d52), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x6b7d526a527d7d52, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xf47d5230527d7d52), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0xf47d5230527d7d52, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xef7d52bf527d7d52), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0xef7d52bf527d7d52, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x617d527c527d7d52), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x617d527c527d7d52, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x267d5254527d7d52), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x267d5254527d7d52, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x637d5272527d7d52), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x637d5272527d7d52, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x217d523a527d7d52), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x217d523a527d7d52, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0c7d5252527d7d52), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0x0c7d5252527d7d52, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x7d7d5252526b7d52), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x7d7d5252526b7d52, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x7d7d525252f47d52), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0x7d7d525252f47d52, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x7d7d525252ef7d52), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0x7d7d525252ef7d52, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x7d7d525252617d52), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0x7d7d525252617d52, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x7d7d525252267d52), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0x7d7d525252267d52, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x7d7d525252637d52), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0x7d7d525252637d52, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x7d7d525252217d52), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x7d7d525252217d52, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x7d7d5252520c7d52), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0x7d7d5252520c7d52, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x7d7d5252527d7d52), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0x7d7d5252527d7d52, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x7d7d5252527d7d52), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x7d7d5252527d7d52, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x7d7d5252527d7d52), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0x7d7d5252527d7d52, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x7d7d5252527d7d52), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x7d7d5252527d7d52, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x7d7d5252527d7d52), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x7d7d5252527d7d52, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x7d7d5252527d7d52), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x7d7d5252527d7d52, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x7d7d5252527d7d52), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x7d7d5252527d7d52, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x7d7d5252097d7d52), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x7d7d5252097d7d52, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x7d7d52526a7d7d52), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x7d7d52526a7d7d52, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x7d7d5252307d7d52), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x7d7d5252307d7d52, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x7d7d5252bf7d7d52), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0x7d7d5252bf7d7d52, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x7d7d52527c7d7d52), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x7d7d52527c7d7d52, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x7d7d5252547d7d52), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0x7d7d5252547d7d52, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x7d7d5252727d7d52), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x7d7d5252727d7d52, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x7d7d52523a7d7d52), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0x7d7d52523a7d7d52, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x7d7d5252527d7d52), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x7d7d5252527d7d52, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x52527d7d7d52520c), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0x52527d7d7d52520c, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x52527d7d7d525221), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0x52527d7d7d525221, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x52527d7d7d525263), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x52527d7d7d525263, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x52527d7d7d525226), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x52527d7d7d525226, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x52527d7d7d525261), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x52527d7d7d525261, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x52527d7d7d5252ef), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x52527d7d7d5252ef, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x52527d7d7d5252f4), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0x52527d7d7d5252f4, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x52527d7d7d52526b), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x52527d7d7d52526b, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x52520c7d7d52527d), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0x52520c7d7d52527d, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x523a217d7d52527d), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0x523a217d7d52527d, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x5272637d7d52527d), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0x5272637d7d52527d, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x5254267d7d52527d), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0x5254267d7d52527d, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x527c617d7d52527d), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0x527c617d7d52527d, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x52bfef7d7d52527d), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x52bfef7d7d52527d, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x5230f47d7d52527d), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0x5230f47d7d52527d, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x526a6b7d7d52527d), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0x526a6b7d7d52527d, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x52097d7d7d52527d), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x52097d7d7d52527d, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x52527d7d7d523a7d), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0x52527d7d7d523a7d, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x52527d7d7d52727d), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x52527d7d7d52727d, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x52527d7d7d52547d), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x52527d7d7d52547d, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x52527d7d7d527c7d), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x52527d7d7d527c7d, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x52527d7d7d52bf7d), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x52527d7d7d52bf7d, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x52527d7d7d52307d), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x52527d7d7d52307d, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x52527d7d7d526a7d), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x52527d7d7d526a7d, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x52527d7d7d52097d), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x52527d7d7d52097d, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x52527d7d7d52527d), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0x52527d7d7d52527d, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x52527d7d7d52527d), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x52527d7d7d52527d, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x52527d7d7d52527d), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0x52527d7d7d52527d, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x52527d7d7d52527d), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x52527d7d7d52527d, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x52527d7d7d52527d), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0x52527d7d7d52527d, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x52527d7d7d52527d), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x52527d7d7d52527d, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x52527d7d7d52527d), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0x52527d7d7d52527d, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x52527d0c7d52527d), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0x52527d0c7d52527d, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x3a527d217d52527d), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x3a527d217d52527d, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x72527d637d52527d), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x72527d637d52527d, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x54527d267d52527d), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x54527d267d52527d, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x7c527d617d52527d), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x7c527d617d52527d, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xbf527def7d52527d), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0xbf527def7d52527d, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x30527df47d52527d), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x30527df47d52527d, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x6a527d6b7d52527d), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0x6a527d6b7d52527d, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x09527d7d7d52527d), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0x09527d7d7d52527d, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x52527d7d7d3a527d), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0x52527d7d7d3a527d, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x52527d7d7d72527d), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0x52527d7d7d72527d, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x52527d7d7d54527d), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0x52527d7d7d54527d, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x52527d7d7d7c527d), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x52527d7d7d7c527d, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x52527d7d7dbf527d), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0x52527d7d7dbf527d, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x52527d7d7d30527d), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0x52527d7d7d30527d, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x52527d7d7d6a527d), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x52527d7d7d6a527d, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x52527d7d7d09527d), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0x52527d7d7d09527d, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x52527d7d7d52527d), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x52527d7d7d52527d, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x52527d7d7d52527d), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x52527d7d7d52527d, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x52527d7d7d52527d), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x52527d7d7d52527d, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x52527d7d7d52527d), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x52527d7d7d52527d, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x52527d7d7d52527d), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x52527d7d7d52527d, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x52527d7d7d52527d), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x52527d7d7d52527d, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x52527d7d7d52527d), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x52527d7d7d52527d, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x52527d7d0c52527d), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0x52527d7d0c52527d, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x52527d7d2152527d), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x52527d7d2152527d, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x52527d7d6352527d), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0x52527d7d6352527d, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x52527d7d2652527d), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x52527d7d2652527d, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x52527d7d6152527d), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0x52527d7d6152527d, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x52527d7def52527d), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x52527d7def52527d, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x52527d7df452527d), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0x52527d7df452527d, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x52527d7d6b52527d), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0x52527d7d6b52527d, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x52527d7d7d52527d), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x52527d7d7d52527d, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x5252525252525209), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x5252525252525209, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x525252525252526a), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x525252525252526a, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x5252525252525230), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x5252525252525230, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x52525252525252bf), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0x52525252525252bf, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x525252525252527c), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x525252525252527c, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x5252525252525254), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0x5252525252525254, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x5252525252525272), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0x5252525252525272, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x525252525252523a), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0x525252525252523a, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x5252095252525252), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0x5252095252525252, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x52526a5252525252), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0x52526a5252525252, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x5252305252525252), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x5252305252525252, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x5252bf5252525252), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0x5252bf5252525252, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x52527c5252525252), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0x52527c5252525252, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x5252545252525252), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x5252545252525252, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x5252725252525252), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0x5252725252525252, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x52523a5252525252), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x52523a5252525252, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x5252525252525252), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x5252525252525252, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x5252525252525252), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x5252525252525252, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x5252525252525252), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x5252525252525252, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x5252525252525252), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x5252525252525252, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x5252525252525252), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x5252525252525252, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x5252525252525252), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x5252525252525252, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x5252525252525252), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0x5252525252525252, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x5252525252525252), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x5252525252525252, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x5252525252525252), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0x5252525252525252, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x5252525252525252), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x5252525252525252, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x5252525252525252), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0x5252525252525252, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x5252525252525252), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x5252525252525252, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x5252525252525252), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0x5252525252525252, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x5252525252525252), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0x5252525252525252, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x5252525252525252), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x5252525252525252, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x5252525252525252), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x5252525252525252, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x5252520952525252), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x5252520952525252, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x5252526a52525252), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x5252526a52525252, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x5252523052525252), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0x5252523052525252, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x525252bf52525252), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x525252bf52525252, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x5252527c52525252), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0x5252527c52525252, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x5252525452525252), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0x5252525452525252, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x5252527252525252), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0x5252527252525252, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x5252523a52525252), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0x5252523a52525252, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x5252525252525252), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0x5252525252525252, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x5252525252525252), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x5252525252525252, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x5252525252525252), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0x5252525252525252, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x5252525252525252), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0x5252525252525252, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x5252525252525252), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x5252525252525252, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x5252525252525252), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0x5252525252525252, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x5252525252525252), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x5252525252525252, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x5252525252525252), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x5252525252525252, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x5252525252525252), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x5252525252525252, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x5252525252525252), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x5252525252525252, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x5252525252525252), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x5252525252525252, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x5252525252525252), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x5252525252525252, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x5252525252525252), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x5252525252525252, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x5252525252525252), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0x5252525252525252, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x5252525252525252), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x5252525252525252, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x5252525252525252), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0x5252525252525252, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x5252525209525252), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x5252525209525252, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x525252526a525252), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0x525252526a525252, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x5252525230525252), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x5252525230525252, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x52525252bf525252), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0x52525252bf525252, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x525252527c525252), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0x525252527c525252, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x5252525254525252), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x5252525254525252, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x5252525272525252), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x5252525272525252, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x525252523a525252), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x525252523a525252, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x5252525252525252), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x5252525252525252, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x52527d7d7d52520c), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0x52527d7d7d52520c, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x52527d7d7d525221), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x52527d7d7d525221, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x52527d7d7d525263), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0x52527d7d7d525263, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x52527d7d7d525226), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0x52527d7d7d525226, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x52527d7d7d525261), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0x52527d7d7d525261, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x52527d7d7d5252ef), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0x52527d7d7d5252ef, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x52527d7d7d5252f4), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0x52527d7d7d5252f4, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x52527d7d7d52526b), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x52527d7d7d52526b, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x52520c7d7d52527d), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0x52520c7d7d52527d, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x5252217d7d52527d), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0x5252217d7d52527d, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x5252637d7d52527d), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x5252637d7d52527d, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x5252267d7d52527d), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0x5252267d7d52527d, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x5252617d7d52527d), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x5252617d7d52527d, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x5252ef7d7d52527d), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x5252ef7d7d52527d, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x5252f47d7d52527d), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x5252f47d7d52527d, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x52526b7d7d52527d), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x52526b7d7d52527d, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x52527d7d7d52527d), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x52527d7d7d52527d, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x52527d7d7d52527d), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x52527d7d7d52527d, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x52527d7d7d52527d), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x52527d7d7d52527d, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x52527d7d7d52527d), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0x52527d7d7d52527d, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x52527d7d7d52527d), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x52527d7d7d52527d, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x52527d7d7d52527d), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0x52527d7d7d52527d, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x52527d7d7d52527d), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x52527d7d7d52527d, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x52527d7d7d52527d), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0x52527d7d7d52527d, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x52527d7d7d52527d), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x52527d7d7d52527d, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x52527d7d7d52527d), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0x52527d7d7d52527d, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x52527d7d7d52527d), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0x52527d7d7d52527d, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x52527d7d7d52527d), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x52527d7d7d52527d, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x52527d7d7d52527d), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x52527d7d7d52527d, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x52527d7d7d52527d), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x52527d7d7d52527d, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x52527d7d7d52527d), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x52527d7d7d52527d, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x52527d7d7d52527d), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0x52527d7d7d52527d, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x52527d0c7d52527d), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x52527d0c7d52527d, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x52527d217d52527d), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0x52527d217d52527d, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x52527d637d52527d), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0x52527d637d52527d, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x52527d267d52527d), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0x52527d267d52527d, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x52527d617d52527d), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0x52527d617d52527d, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x52527def7d52527d), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0x52527def7d52527d, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x52527df47d52527d), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x52527df47d52527d, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x52527d6b7d52527d), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0x52527d6b7d52527d, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x52527d7d7d52527d), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0x52527d7d7d52527d, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x52527d7d7d52527d), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x52527d7d7d52527d, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x52527d7d7d52527d), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0x52527d7d7d52527d, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x52527d7d7d52527d), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x52527d7d7d52527d, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x52527d7d7d52527d), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x52527d7d7d52527d, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x52527d7d7d52527d), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x52527d7d7d52527d, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x52527d7d7d52527d), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x52527d7d7d52527d, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x52527d7d7d52527d), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x52527d7d7d52527d, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x52527d7d7d52527d), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x52527d7d7d52527d, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x52527d7d7d52527d), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x52527d7d7d52527d, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x52527d7d7d52527d), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0x52527d7d7d52527d, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x52527d7d7d52527d), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x52527d7d7d52527d, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x52527d7d7d52527d), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0x52527d7d7d52527d, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x52527d7d7d52527d), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x52527d7d7d52527d, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x52527d7d7d52527d), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0x52527d7d7d52527d, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x52527d7d7d52527d), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x52527d7d7d52527d, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x52527d7d0c52527d), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0x52527d7d0c52527d, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x52527d7d2152527d), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0x52527d7d2152527d, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x52527d7d6352527d), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x52527d7d6352527d, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x52527d7d2652527d), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x52527d7d2652527d, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x52527d7d6152527d), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x52527d7d6152527d, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x52527d7def52527d), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x52527d7def52527d, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x52527d7df452527d), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0x52527d7df452527d, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x52527d7d6b52527d), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x52527d7d6b52527d, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x52527d7d7d52527d), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0x52527d7d7d52527d, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x396b2786ef447632), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(aes64ds, x23, x25, x25, 0x396b2786ef447632, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(aes64ds, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x52526f36125252fe), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(aes64ds, x25, x7, x0, 0x52526f36125252fe, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0xe0b7525252e84e52), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(aes64ds, x26, x0, x22, 0xe0b7525252e84e52, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64DS-02.S b/riscof/suite/rv64i_m/K_unratified/AES64DS-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..e22cd5f12a9b88407724e4a0bef73b21525b129e
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64DS-02.S
@@ -0,0 +1,1728 @@
+// RISC-V Architectural Validation Test AES64DS-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64ds'.
+// Using dataset: sbox64
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64ds)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64ds)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox64
+ // result rd:x1(0x7d7d5252527d7d52), rs1:x31(0x0000000000000000), rs2:x16(0xffffffffffffffff)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x7d7d5252527d7d52, 0x0, 0xffffffffffffffff, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox64
+ // result rd:x2(0x0c0c0909090c0c09), rs1:x30(0x0101010101010101), rs2:x15(0xfefefefefefefefe)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x0c0c0909090c0c09, 0x101010101010101, 0xfefefefefefefefe, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox64
+ // result rd:x3(0x21216a6a6a21216a), rs1:x29(0x0202020202020202), rs2:x14(0xfdfdfdfdfdfdfdfd)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x21216a6a6a21216a, 0x202020202020202, 0xfdfdfdfdfdfdfdfd, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox64
+ // result rd:x4(0x5555d5d5d55555d5), rs1:x28(0x0303030303030303), rs2:x13(0xfcfcfcfcfcfcfcfc)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x5555d5d5d55555d5, 0x303030303030303, 0xfcfcfcfcfcfcfcfc, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox64
+ // result rd:x5(0x6363303030636330), rs1:x27(0x0404040404040404), rs2:x12(0xfbfbfbfbfbfbfbfb)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x6363303030636330, 0x404040404040404, 0xfbfbfbfbfbfbfbfb, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox64
+ // result rd:x6(0x1414363636141436), rs1:x26(0x0505050505050505), rs2:x11(0xfafafafafafafafa)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x1414363636141436, 0x505050505050505, 0xfafafafafafafafa, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox64
+ // result rd:x7(0x6969a5a5a56969a5), rs1:x25(0x0606060606060606), rs2:x10(0xf9f9f9f9f9f9f9f9)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x6969a5a5a56969a5, 0x606060606060606, 0xf9f9f9f9f9f9f9f9, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox64
+ // result rd:x8(0xe1e1383838e1e138), rs1:x24(0x0707070707070707), rs2:x9(0xf8f8f8f8f8f8f8f8)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0xe1e1383838e1e138, 0x707070707070707, 0xf8f8f8f8f8f8f8f8, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox64
+ // result rd:x9(0x2626bfbfbf2626bf), rs1:x23(0x0808080808080808), rs2:x8(0xf7f7f7f7f7f7f7f7)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x2626bfbfbf2626bf, 0x808080808080808, 0xf7f7f7f7f7f7f7f7, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox64
+ // result rd:x10(0xd6d6404040d6d640), rs1:x22(0x0909090909090909), rs2:x7(0xf6f6f6f6f6f6f6f6)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0xd6d6404040d6d640, 0x909090909090909, 0xf6f6f6f6f6f6f6f6, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox64
+ // result rd:x11(0x7777a3a3a37777a3), rs1:x21(0x0a0a0a0a0a0a0a0a), rs2:x6(0xf5f5f5f5f5f5f5f5)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x7777a3a3a37777a3, 0xa0a0a0a0a0a0a0a, 0xf5f5f5f5f5f5f5f5, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox64
+ // result rd:x12(0xbaba9e9e9ebaba9e), rs1:x20(0x0b0b0b0b0b0b0b0b), rs2:x5(0xf4f4f4f4f4f4f4f4)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0xbaba9e9e9ebaba9e, 0xb0b0b0b0b0b0b0b, 0xf4f4f4f4f4f4f4f4, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox64
+ // result rd:x13(0x7e7e8181817e7e81), rs1:x19(0x0c0c0c0c0c0c0c0c), rs2:x4(0xf3f3f3f3f3f3f3f3)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x7e7e8181817e7e81, 0xc0c0c0c0c0c0c0c, 0xf3f3f3f3f3f3f3f3, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox64
+ // result rd:x14(0x0404f3f3f30404f3), rs1:x18(0x0d0d0d0d0d0d0d0d), rs2:x3(0xf2f2f2f2f2f2f2f2)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0x0404f3f3f30404f3, 0xd0d0d0d0d0d0d0d, 0xf2f2f2f2f2f2f2f2, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox64
+ // result rd:x15(0x2b2bd7d7d72b2bd7), rs1:x17(0x0e0e0e0e0e0e0e0e), rs2:x2(0xf1f1f1f1f1f1f1f1)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0x2b2bd7d7d72b2bd7, 0xe0e0e0e0e0e0e0e, 0xf1f1f1f1f1f1f1f1, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox64
+ // result rd:x16(0x1717fbfbfb1717fb), rs1:x16(0x0f0f0f0f0f0f0f0f), rs2:x1(0xf0f0f0f0f0f0f0f0)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x1717fbfbfb1717fb, 0xf0f0f0f0f0f0f0f, 0xf0f0f0f0f0f0f0f0, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox64
+ // result rd:x17(0x61617c7c7c61617c), rs1:x15(0x1010101010101010), rs2:x31(0xefefefefefefefef)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x61617c7c7c61617c, 0x1010101010101010, 0xefefefefefefefef, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox64
+ // result rd:x18(0x9999e3e3e39999e3), rs1:x14(0x1111111111111111), rs2:x30(0xeeeeeeeeeeeeeeee)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x9999e3e3e39999e3, 0x1111111111111111, 0xeeeeeeeeeeeeeeee, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox64
+ // result rd:x19(0x5353393939535339), rs1:x13(0x1212121212121212), rs2:x29(0xedededededededed)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x5353393939535339, 0x1212121212121212, 0xedededededededed, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox64
+ // result rd:x20(0x8383828282838382), rs1:x12(0x1313131313131313), rs2:x28(0xecececececececec)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0x8383828282838382, 0x1313131313131313, 0xecececececececec, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox64
+ // result rd:x21(0x3c3c9b9b9b3c3c9b), rs1:x11(0x1414141414141414), rs2:x27(0xebebebebebebebeb)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x3c3c9b9b9b3c3c9b, 0x1414141414141414, 0xebebebebebebebeb, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox64
+ // result rd:x22(0xbbbb2f2f2fbbbb2f), rs1:x10(0x1515151515151515), rs2:x26(0xeaeaeaeaeaeaeaea)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0xbbbb2f2f2fbbbb2f, 0x1515151515151515, 0xeaeaeaeaeaeaeaea, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox64
+ // result rd:x23(0xebebffffffebebff), rs1:x9(0x1616161616161616), rs2:x25(0xe9e9e9e9e9e9e9e9)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0xebebffffffebebff, 0x1616161616161616, 0xe9e9e9e9e9e9e9e9, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox64
+ // result rd:x24(0xc8c8878787c8c887), rs1:x8(0x1717171717171717), rs2:x24(0xe8e8e8e8e8e8e8e8)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0xc8c8878787c8c887, 0x1717171717171717, 0xe8e8e8e8e8e8e8e8, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox64
+ // result rd:x25(0xb0b0343434b0b034), rs1:x7(0x1818181818181818), rs2:x23(0xe7e7e7e7e7e7e7e7)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0xb0b0343434b0b034, 0x1818181818181818, 0xe7e7e7e7e7e7e7e7, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox64
+ // result rd:x26(0xf5f58e8e8ef5f58e), rs1:x6(0x1919191919191919), rs2:x22(0xe6e6e6e6e6e6e6e6)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0xf5f58e8e8ef5f58e, 0x1919191919191919, 0xe6e6e6e6e6e6e6e6, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox64
+ // result rd:x27(0x2a2a4343432a2a43), rs1:x5(0x1a1a1a1a1a1a1a1a), rs2:x21(0xe5e5e5e5e5e5e5e5)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x2a2a4343432a2a43, 0x1a1a1a1a1a1a1a1a, 0xe5e5e5e5e5e5e5e5, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox64
+ // result rd:x28(0xaeae444444aeae44), rs1:x4(0x1b1b1b1b1b1b1b1b), rs2:x20(0xe4e4e4e4e4e4e4e4)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0xaeae444444aeae44, 0x1b1b1b1b1b1b1b1b, 0xe4e4e4e4e4e4e4e4, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox64
+ // result rd:x29(0x4d4dc4c4c44d4dc4), rs1:x3(0x1c1c1c1c1c1c1c1c), rs2:x19(0xe3e3e3e3e3e3e3e3)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0x4d4dc4c4c44d4dc4, 0x1c1c1c1c1c1c1c1c, 0xe3e3e3e3e3e3e3e3, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox64
+ // result rd:x30(0x3b3bdedede3b3bde), rs1:x2(0x1d1d1d1d1d1d1d1d), rs2:x18(0xe2e2e2e2e2e2e2e2)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x3b3bdedede3b3bde, 0x1d1d1d1d1d1d1d1d, 0xe2e2e2e2e2e2e2e2, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox64
+ // result rd:x31(0xe0e0e9e9e9e0e0e9), rs1:x1(0x1e1e1e1e1e1e1e1e), rs2:x17(0xe1e1e1e1e1e1e1e1)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0xe0e0e9e9e9e0e0e9, 0x1e1e1e1e1e1e1e1e, 0xe1e1e1e1e1e1e1e1, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox64
+ // result rd:x1(0xa0a0cbcbcba0a0cb), rs1:x31(0x1f1f1f1f1f1f1f1f), rs2:x16(0xe0e0e0e0e0e0e0e0)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0xa0a0cbcbcba0a0cb, 0x1f1f1f1f1f1f1f1f, 0xe0e0e0e0e0e0e0e0, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox64
+ // result rd:x2(0xefef545454efef54), rs1:x30(0x2020202020202020), rs2:x15(0xdfdfdfdfdfdfdfdf)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0xefef545454efef54, 0x2020202020202020, 0xdfdfdfdfdfdfdfdf, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox64
+ // result rd:x3(0x9c9c7b7b7b9c9c7b), rs1:x29(0x2121212121212121), rs2:x14(0xdededededededede)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x9c9c7b7b7b9c9c7b, 0x2121212121212121, 0xdededededededede, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox64
+ // result rd:x4(0xc9c9949494c9c994), rs1:x28(0x2222222222222222), rs2:x13(0xdddddddddddddddd)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0xc9c9949494c9c994, 0x2222222222222222, 0xdddddddddddddddd, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox64
+ // result rd:x5(0x9393323232939332), rs1:x27(0x2323232323232323), rs2:x12(0xdcdcdcdcdcdcdcdc)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x9393323232939332, 0x2323232323232323, 0xdcdcdcdcdcdcdcdc, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox64
+ // result rd:x6(0x9f9fa6a6a69f9fa6), rs1:x26(0x2424242424242424), rs2:x11(0xdbdbdbdbdbdbdbdb)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x9f9fa6a6a69f9fa6, 0x2424242424242424, 0xdbdbdbdbdbdbdbdb, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox64
+ // result rd:x7(0x7a7ac2c2c27a7ac2), rs1:x25(0x2525252525252525), rs2:x10(0xdadadadadadadada)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x7a7ac2c2c27a7ac2, 0x2525252525252525, 0xdadadadadadadada, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox64
+ // result rd:x8(0xe5e5232323e5e523), rs1:x24(0x2626262626262626), rs2:x9(0xd9d9d9d9d9d9d9d9)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0xe5e5232323e5e523, 0x2626262626262626, 0xd9d9d9d9d9d9d9d9, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox64
+ // result rd:x9(0x2d2d3d3d3d2d2d3d), rs1:x23(0x2727272727272727), rs2:x8(0xd8d8d8d8d8d8d8d8)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x2d2d3d3d3d2d2d3d, 0x2727272727272727, 0xd8d8d8d8d8d8d8d8, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox64
+ // result rd:x10(0x0d0deeeeee0d0dee), rs1:x22(0x2828282828282828), rs2:x7(0xd7d7d7d7d7d7d7d7)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0x0d0deeeeee0d0dee, 0x2828282828282828, 0xd7d7d7d7d7d7d7d7, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox64
+ // result rd:x11(0x4a4a4c4c4c4a4a4c), rs1:x21(0x2929292929292929), rs2:x6(0xd6d6d6d6d6d6d6d6)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x4a4a4c4c4c4a4a4c, 0x2929292929292929, 0xd6d6d6d6d6d6d6d6, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox64
+ // result rd:x12(0xb5b5959595b5b595), rs1:x20(0x2a2a2a2a2a2a2a2a), rs2:x5(0xd5d5d5d5d5d5d5d5)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0xb5b5959595b5b595, 0x2a2a2a2a2a2a2a2a, 0xd5d5d5d5d5d5d5d5, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox64
+ // result rd:x13(0x19190b0b0b19190b), rs1:x19(0x2b2b2b2b2b2b2b2b), rs2:x4(0xd4d4d4d4d4d4d4d4)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x19190b0b0b19190b, 0x2b2b2b2b2b2b2b2b, 0xd4d4d4d4d4d4d4d4, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox64
+ // result rd:x14(0xa9a9424242a9a942), rs1:x18(0x2c2c2c2c2c2c2c2c), rs2:x3(0xd3d3d3d3d3d3d3d3)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0xa9a9424242a9a942, 0x2c2c2c2c2c2c2c2c, 0xd3d3d3d3d3d3d3d3, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox64
+ // result rd:x15(0x7f7ffafafa7f7ffa), rs1:x17(0x2d2d2d2d2d2d2d2d), rs2:x2(0xd2d2d2d2d2d2d2d2)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0x7f7ffafafa7f7ffa, 0x2d2d2d2d2d2d2d2d, 0xd2d2d2d2d2d2d2d2, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox64
+ // result rd:x16(0x5151c3c3c35151c3), rs1:x16(0x2e2e2e2e2e2e2e2e), rs2:x1(0xd1d1d1d1d1d1d1d1)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x5151c3c3c35151c3, 0x2e2e2e2e2e2e2e2e, 0xd1d1d1d1d1d1d1d1, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox64
+ // result rd:x17(0x60604e4e4e60604e), rs1:x15(0x2f2f2f2f2f2f2f2f), rs2:x31(0xd0d0d0d0d0d0d0d0)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x60604e4e4e60604e, 0x2f2f2f2f2f2f2f2f, 0xd0d0d0d0d0d0d0d0, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox64
+ // result rd:x18(0x5f5f0808085f5f08), rs1:x14(0x3030303030303030), rs2:x30(0xcfcfcfcfcfcfcfcf)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x5f5f0808085f5f08, 0x3030303030303030, 0xcfcfcfcfcfcfcfcf, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox64
+ // result rd:x19(0xecec2e2e2eecec2e), rs1:x13(0x3131313131313131), rs2:x29(0xcececececececece)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0xecec2e2e2eecec2e, 0x3131313131313131, 0xcececececececece, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox64
+ // result rd:x20(0x8080a1a1a18080a1), rs1:x12(0x3232323232323232), rs2:x28(0xcdcdcdcdcdcdcdcd)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0x8080a1a1a18080a1, 0x3232323232323232, 0xcdcdcdcdcdcdcdcd, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox64
+ // result rd:x21(0x2727666666272766), rs1:x11(0x3333333333333333), rs2:x27(0xcccccccccccccccc)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x2727666666272766, 0x3333333333333333, 0xcccccccccccccccc, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox64
+ // result rd:x22(0x5959282828595928), rs1:x10(0x3434343434343434), rs2:x26(0xcbcbcbcbcbcbcbcb)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0x5959282828595928, 0x3434343434343434, 0xcbcbcbcbcbcbcbcb, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox64
+ // result rd:x23(0x1010d9d9d91010d9), rs1:x9(0x3535353535353535), rs2:x25(0xcacacacacacacaca)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0x1010d9d9d91010d9, 0x3535353535353535, 0xcacacacacacacaca, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox64
+ // result rd:x24(0x1212242424121224), rs1:x8(0x3636363636363636), rs2:x24(0xc9c9c9c9c9c9c9c9)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0x1212242424121224, 0x3636363636363636, 0xc9c9c9c9c9c9c9c9, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox64
+ // result rd:x25(0xb1b1b2b2b2b1b1b2), rs1:x7(0x3737373737373737), rs2:x23(0xc8c8c8c8c8c8c8c8)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0xb1b1b2b2b2b1b1b2, 0x3737373737373737, 0xc8c8c8c8c8c8c8c8, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox64
+ // result rd:x26(0x3131767676313176), rs1:x6(0x3838383838383838), rs2:x22(0xc7c7c7c7c7c7c7c7)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0x3131767676313176, 0x3838383838383838, 0xc7c7c7c7c7c7c7c7, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox64
+ // result rd:x27(0xc7c75b5b5bc7c75b), rs1:x5(0x3939393939393939), rs2:x21(0xc6c6c6c6c6c6c6c6)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0xc7c75b5b5bc7c75b, 0x3939393939393939, 0xc6c6c6c6c6c6c6c6, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox64
+ // result rd:x28(0x0707a2a2a20707a2), rs1:x4(0x3a3a3a3a3a3a3a3a), rs2:x20(0xc5c5c5c5c5c5c5c5)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0x0707a2a2a20707a2, 0x3a3a3a3a3a3a3a3a, 0xc5c5c5c5c5c5c5c5, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox64
+ // result rd:x29(0x8888494949888849), rs1:x3(0x3b3b3b3b3b3b3b3b), rs2:x19(0xc4c4c4c4c4c4c4c4)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0x8888494949888849, 0x3b3b3b3b3b3b3b3b, 0xc4c4c4c4c4c4c4c4, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox64
+ // result rd:x30(0x33336d6d6d33336d), rs1:x2(0x3c3c3c3c3c3c3c3c), rs2:x18(0xc3c3c3c3c3c3c3c3)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x33336d6d6d33336d, 0x3c3c3c3c3c3c3c3c, 0xc3c3c3c3c3c3c3c3, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox64
+ // result rd:x31(0xa8a88b8b8ba8a88b), rs1:x1(0x3d3d3d3d3d3d3d3d), rs2:x17(0xc2c2c2c2c2c2c2c2)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0xa8a88b8b8ba8a88b, 0x3d3d3d3d3d3d3d3d, 0xc2c2c2c2c2c2c2c2, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox64
+ // result rd:x1(0xddddd1d1d1ddddd1), rs1:x31(0x3e3e3e3e3e3e3e3e), rs2:x16(0xc1c1c1c1c1c1c1c1)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0xddddd1d1d1ddddd1, 0x3e3e3e3e3e3e3e3e, 0xc1c1c1c1c1c1c1c1, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox64
+ // result rd:x2(0x1f1f2525251f1f25), rs1:x30(0x3f3f3f3f3f3f3f3f), rs2:x15(0xc0c0c0c0c0c0c0c0)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x1f1f2525251f1f25, 0x3f3f3f3f3f3f3f3f, 0xc0c0c0c0c0c0c0c0, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox64
+ // result rd:x3(0xf4f4727272f4f472), rs1:x29(0x4040404040404040), rs2:x14(0xbfbfbfbfbfbfbfbf)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0xf4f4727272f4f472, 0x4040404040404040, 0xbfbfbfbfbfbfbfbf, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox64
+ // result rd:x4(0x5a5af8f8f85a5af8), rs1:x28(0x4141414141414141), rs2:x13(0xbebebebebebebebe)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x5a5af8f8f85a5af8, 0x4141414141414141, 0xbebebebebebebebe, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox64
+ // result rd:x5(0xcdcdf6f6f6cdcdf6), rs1:x27(0x4242424242424242), rs2:x12(0xbdbdbdbdbdbdbdbd)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0xcdcdf6f6f6cdcdf6, 0x4242424242424242, 0xbdbdbdbdbdbdbdbd, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox64
+ // result rd:x6(0x7878646464787864), rs1:x26(0x4343434343434343), rs2:x11(0xbcbcbcbcbcbcbcbc)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x7878646464787864, 0x4343434343434343, 0xbcbcbcbcbcbcbcbc, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox64
+ // result rd:x7(0xfefe868686fefe86), rs1:x25(0x4444444444444444), rs2:x10(0xbbbbbbbbbbbbbbbb)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0xfefe868686fefe86, 0x4444444444444444, 0xbbbbbbbbbbbbbbbb, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox64
+ // result rd:x8(0xc0c0686868c0c068), rs1:x24(0x4545454545454545), rs2:x9(0xbabababababababa)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0xc0c0686868c0c068, 0x4545454545454545, 0xbabababababababa, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox64
+ // result rd:x9(0xdbdb989898dbdb98), rs1:x23(0x4646464646464646), rs2:x8(0xb9b9b9b9b9b9b9b9)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0xdbdb989898dbdb98, 0x4646464646464646, 0xb9b9b9b9b9b9b9b9, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox64
+ // result rd:x10(0x9a9a1616169a9a16), rs1:x22(0x4747474747474747), rs2:x7(0xb8b8b8b8b8b8b8b8)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0x9a9a1616169a9a16, 0x4747474747474747, 0xb8b8b8b8b8b8b8b8, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox64
+ // result rd:x11(0x2020d4d4d42020d4), rs1:x21(0x4848484848484848), rs2:x6(0xb7b7b7b7b7b7b7b7)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x2020d4d4d42020d4, 0x4848484848484848, 0xb7b7b7b7b7b7b7b7, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox64
+ // result rd:x12(0x7979a4a4a47979a4), rs1:x20(0x4949494949494949), rs2:x5(0xb6b6b6b6b6b6b6b6)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0x7979a4a4a47979a4, 0x4949494949494949, 0xb6b6b6b6b6b6b6b6, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox64
+ // result rd:x13(0xd2d25c5c5cd2d25c), rs1:x19(0x4a4a4a4a4a4a4a4a), rs2:x4(0xb5b5b5b5b5b5b5b5)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0xd2d25c5c5cd2d25c, 0x4a4a4a4a4a4a4a4a, 0xb5b5b5b5b5b5b5b5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox64
+ // result rd:x14(0xc6c6ccccccc6c6cc), rs1:x18(0x4b4b4b4b4b4b4b4b), rs2:x3(0xb4b4b4b4b4b4b4b4)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0xc6c6ccccccc6c6cc, 0x4b4b4b4b4b4b4b4b, 0xb4b4b4b4b4b4b4b4, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox64
+ // result rd:x15(0x4b4b5d5d5d4b4b5d), rs1:x17(0x4c4c4c4c4c4c4c4c), rs2:x2(0xb3b3b3b3b3b3b3b3)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0x4b4b5d5d5d4b4b5d, 0x4c4c4c4c4c4c4c4c, 0xb3b3b3b3b3b3b3b3, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox64
+ // result rd:x16(0x3e3e6565653e3e65), rs1:x16(0x4d4d4d4d4d4d4d4d), rs2:x1(0xb2b2b2b2b2b2b2b2)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x3e3e6565653e3e65, 0x4d4d4d4d4d4d4d4d, 0xb2b2b2b2b2b2b2b2, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox64
+ // result rd:x17(0x5656b6b6b65656b6), rs1:x15(0x4e4e4e4e4e4e4e4e), rs2:x31(0xb1b1b1b1b1b1b1b1)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x5656b6b6b65656b6, 0x4e4e4e4e4e4e4e4e, 0xb1b1b1b1b1b1b1b1, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox64
+ // result rd:x18(0xfcfc929292fcfc92), rs1:x14(0x4f4f4f4f4f4f4f4f), rs2:x30(0xb0b0b0b0b0b0b0b0)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0xfcfc929292fcfc92, 0x4f4f4f4f4f4f4f4f, 0xb0b0b0b0b0b0b0b0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox64
+ // result rd:x19(0x1b1b6c6c6c1b1b6c), rs1:x13(0x5050505050505050), rs2:x29(0xafafafafafafafaf)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x1b1b6c6c6c1b1b6c, 0x5050505050505050, 0xafafafafafafafaf, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox64
+ // result rd:x20(0xbebe707070bebe70), rs1:x12(0x5151515151515151), rs2:x28(0xaeaeaeaeaeaeaeae)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0xbebe707070bebe70, 0x5151515151515151, 0xaeaeaeaeaeaeaeae, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox64
+ // result rd:x21(0x1818484848181848), rs1:x11(0x5252525252525252), rs2:x27(0xadadadadadadadad)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x1818484848181848, 0x5252525252525252, 0xadadadadadadadad, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox64
+ // result rd:x22(0xaaaa505050aaaa50), rs1:x10(0x5353535353535353), rs2:x26(0xacacacacacacacac)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0xaaaa505050aaaa50, 0x5353535353535353, 0xacacacacacacacac, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox64
+ // result rd:x23(0x0e0efdfdfd0e0efd), rs1:x9(0x5454545454545454), rs2:x25(0xabababababababab)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0x0e0efdfdfd0e0efd, 0x5454545454545454, 0xabababababababab, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox64
+ // result rd:x24(0x6262ededed6262ed), rs1:x8(0x5555555555555555), rs2:x24(0xaaaaaaaaaaaaaaaa)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0x6262ededed6262ed, 0x5555555555555555, 0xaaaaaaaaaaaaaaaa, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox64
+ // result rd:x25(0xb7b7b9b9b9b7b7b9), rs1:x7(0x5656565656565656), rs2:x23(0xa9a9a9a9a9a9a9a9)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0xb7b7b9b9b9b7b7b9, 0x5656565656565656, 0xa9a9a9a9a9a9a9a9, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox64
+ // result rd:x26(0x6f6fdadada6f6fda), rs1:x6(0x5757575757575757), rs2:x22(0xa8a8a8a8a8a8a8a8)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0x6f6fdadada6f6fda, 0x5757575757575757, 0xa8a8a8a8a8a8a8a8, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox64
+ // result rd:x27(0x89895e5e5e89895e), rs1:x5(0x5858585858585858), rs2:x21(0xa7a7a7a7a7a7a7a7)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x89895e5e5e89895e, 0x5858585858585858, 0xa7a7a7a7a7a7a7a7, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox64
+ // result rd:x28(0xc5c5151515c5c515), rs1:x4(0x5959595959595959), rs2:x20(0xa6a6a6a6a6a6a6a6)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0xc5c5151515c5c515, 0x5959595959595959, 0xa6a6a6a6a6a6a6a6, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox64
+ // result rd:x29(0x2929464646292946), rs1:x3(0x5a5a5a5a5a5a5a5a), rs2:x19(0xa5a5a5a5a5a5a5a5)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0x2929464646292946, 0x5a5a5a5a5a5a5a5a, 0xa5a5a5a5a5a5a5a5, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox64
+ // result rd:x30(0x1d1d5757571d1d57), rs1:x2(0x5b5b5b5b5b5b5b5b), rs2:x18(0xa4a4a4a4a4a4a4a4)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x1d1d5757571d1d57, 0x5b5b5b5b5b5b5b5b, 0xa4a4a4a4a4a4a4a4, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox64
+ // result rd:x31(0x7171a7a7a77171a7), rs1:x1(0x5c5c5c5c5c5c5c5c), rs2:x17(0xa3a3a3a3a3a3a3a3)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0x7171a7a7a77171a7, 0x5c5c5c5c5c5c5c5c, 0xa3a3a3a3a3a3a3a3, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox64
+ // result rd:x1(0x1a1a8d8d8d1a1a8d), rs1:x31(0x5d5d5d5d5d5d5d5d), rs2:x16(0xa2a2a2a2a2a2a2a2)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x1a1a8d8d8d1a1a8d, 0x5d5d5d5d5d5d5d5d, 0xa2a2a2a2a2a2a2a2, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox64
+ // result rd:x2(0xf1f19d9d9df1f19d), rs1:x30(0x5e5e5e5e5e5e5e5e), rs2:x15(0xa1a1a1a1a1a1a1a1)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0xf1f19d9d9df1f19d, 0x5e5e5e5e5e5e5e5e, 0xa1a1a1a1a1a1a1a1, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox64
+ // result rd:x3(0x4747848484474784), rs1:x29(0x5f5f5f5f5f5f5f5f), rs2:x14(0xa0a0a0a0a0a0a0a0)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x4747848484474784, 0x5f5f5f5f5f5f5f5f, 0xa0a0a0a0a0a0a0a0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox64
+ // result rd:x4(0x6e6e9090906e6e90), rs1:x28(0x6060606060606060), rs2:x13(0x9f9f9f9f9f9f9f9f)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x6e6e9090906e6e90, 0x6060606060606060, 0x9f9f9f9f9f9f9f9f, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox64
+ // result rd:x5(0xdfdfd8d8d8dfdfd8), rs1:x27(0x6161616161616161), rs2:x12(0x9e9e9e9e9e9e9e9e)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0xdfdfd8d8d8dfdfd8, 0x6161616161616161, 0x9e9e9e9e9e9e9e9e, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox64
+ // result rd:x6(0x7575ababab7575ab), rs1:x26(0x6262626262626262), rs2:x11(0x9d9d9d9d9d9d9d9d)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x7575ababab7575ab, 0x6262626262626262, 0x9d9d9d9d9d9d9d9d, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox64
+ // result rd:x7(0x1c1c0000001c1c00), rs1:x25(0x6363636363636363), rs2:x10(0x9c9c9c9c9c9c9c9c)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x1c1c0000001c1c00, 0x6363636363636363, 0x9c9c9c9c9c9c9c9c, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox64
+ // result rd:x8(0xe8e88c8c8ce8e88c), rs1:x24(0x6464646464646464), rs2:x9(0x9b9b9b9b9b9b9b9b)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0xe8e88c8c8ce8e88c, 0x6464646464646464, 0x9b9b9b9b9b9b9b9b, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox64
+ // result rd:x9(0x3737bcbcbc3737bc), rs1:x23(0x6565656565656565), rs2:x8(0x9a9a9a9a9a9a9a9a)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x3737bcbcbc3737bc, 0x6565656565656565, 0x9a9a9a9a9a9a9a9a, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox64
+ // result rd:x10(0xf9f9d3d3d3f9f9d3), rs1:x22(0x6666666666666666), rs2:x7(0x9999999999999999)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0xf9f9d3d3d3f9f9d3, 0x6666666666666666, 0x9999999999999999, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox64
+ // result rd:x11(0xe2e20a0a0ae2e20a), rs1:x21(0x6767676767676767), rs2:x6(0x9898989898989898)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0xe2e20a0a0ae2e20a, 0x6767676767676767, 0x9898989898989898, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox64
+ // result rd:x12(0x8585f7f7f78585f7), rs1:x20(0x6868686868686868), rs2:x5(0x9797979797979797)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0x8585f7f7f78585f7, 0x6868686868686868, 0x9797979797979797, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox64
+ // result rd:x13(0x3535e4e4e43535e4), rs1:x19(0x6969696969696969), rs2:x4(0x9696969696969696)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x3535e4e4e43535e4, 0x6969696969696969, 0x9696969696969696, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox64
+ // result rd:x14(0xadad585858adad58), rs1:x18(0x6a6a6a6a6a6a6a6a), rs2:x3(0x9595959595959595)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0xadad585858adad58, 0x6a6a6a6a6a6a6a6a, 0x9595959595959595, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox64
+ // result rd:x15(0xe7e7050505e7e705), rs1:x17(0x6b6b6b6b6b6b6b6b), rs2:x2(0x9494949494949494)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0xe7e7050505e7e705, 0x6b6b6b6b6b6b6b6b, 0x9494949494949494, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox64
+ // result rd:x16(0x2222b8b8b82222b8), rs1:x16(0x6c6c6c6c6c6c6c6c), rs2:x1(0x9393939393939393)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x2222b8b8b82222b8, 0x6c6c6c6c6c6c6c6c, 0x9393939393939393, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox64
+ // result rd:x17(0x7474b3b3b37474b3), rs1:x15(0x6d6d6d6d6d6d6d6d), rs2:x31(0x9292929292929292)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x7474b3b3b37474b3, 0x6d6d6d6d6d6d6d6d, 0x9292929292929292, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox64
+ // result rd:x18(0xacac454545acac45), rs1:x14(0x6e6e6e6e6e6e6e6e), rs2:x30(0x9191919191919191)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0xacac454545acac45, 0x6e6e6e6e6e6e6e6e, 0x9191919191919191, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox64
+ // result rd:x19(0x9696060606969606), rs1:x13(0x6f6f6f6f6f6f6f6f), rs2:x29(0x9090909090909090)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x9696060606969606, 0x6f6f6f6f6f6f6f6f, 0x9090909090909090, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox64
+ // result rd:x20(0x7373d0d0d07373d0), rs1:x12(0x7070707070707070), rs2:x28(0x8f8f8f8f8f8f8f8f)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0x7373d0d0d07373d0, 0x7070707070707070, 0x8f8f8f8f8f8f8f8f, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox64
+ // result rd:x21(0xe6e62c2c2ce6e62c), rs1:x11(0x7171717171717171), rs2:x27(0x8e8e8e8e8e8e8e8e)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0xe6e62c2c2ce6e62c, 0x7171717171717171, 0x8e8e8e8e8e8e8e8e, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox64
+ // result rd:x22(0xb4b41e1e1eb4b41e), rs1:x10(0x7272727272727272), rs2:x26(0x8d8d8d8d8d8d8d8d)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0xb4b41e1e1eb4b41e, 0x7272727272727272, 0x8d8d8d8d8d8d8d8d, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox64
+ // result rd:x23(0xf0f08f8f8ff0f08f), rs1:x9(0x7373737373737373), rs2:x25(0x8c8c8c8c8c8c8c8c)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0xf0f08f8f8ff0f08f, 0x7373737373737373, 0x8c8c8c8c8c8c8c8c, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox64
+ // result rd:x24(0xcececacacacececa), rs1:x8(0x7474747474747474), rs2:x24(0x8b8b8b8b8b8b8b8b)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0xcececacacacececa, 0x7474747474747474, 0x8b8b8b8b8b8b8b8b, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox64
+ // result rd:x25(0xcfcf3f3f3fcfcf3f), rs1:x7(0x7575757575757575), rs2:x23(0x8a8a8a8a8a8a8a8a)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0xcfcf3f3f3fcfcf3f, 0x7575757575757575, 0x8a8a8a8a8a8a8a8a, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox64
+ // result rd:x26(0xf2f20f0f0ff2f20f), rs1:x6(0x7676767676767676), rs2:x22(0x8989898989898989)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0xf2f20f0f0ff2f20f, 0x7676767676767676, 0x8989898989898989, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox64
+ // result rd:x27(0x9797020202979702), rs1:x5(0x7777777777777777), rs2:x21(0x8888888888888888)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x9797020202979702, 0x7777777777777777, 0x8888888888888888, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox64
+ // result rd:x28(0xeaeac1c1c1eaeac1), rs1:x4(0x7878787878787878), rs2:x20(0x8787878787878787)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0xeaeac1c1c1eaeac1, 0x7878787878787878, 0x8787878787878787, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox64
+ // result rd:x29(0xdcdcafafafdcdcaf), rs1:x3(0x7979797979797979), rs2:x19(0x8686868686868686)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0xdcdcafafafdcdcaf, 0x7979797979797979, 0x8686868686868686, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox64
+ // result rd:x30(0x6767bdbdbd6767bd), rs1:x2(0x7a7a7a7a7a7a7a7a), rs2:x18(0x8585858585858585)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x6767bdbdbd6767bd, 0x7a7a7a7a7a7a7a7a, 0x8585858585858585, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox64
+ // result rd:x31(0x4f4f0303034f4f03), rs1:x1(0x7b7b7b7b7b7b7b7b), rs2:x17(0x8484848484848484)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0x4f4f0303034f4f03, 0x7b7b7b7b7b7b7b7b, 0x8484848484848484, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox64
+ // result rd:x1(0x4141010101414101), rs1:x31(0x7c7c7c7c7c7c7c7c), rs2:x16(0x8383838383838383)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x4141010101414101, 0x7c7c7c7c7c7c7c7c, 0x8383838383838383, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox64
+ // result rd:x2(0x1111131313111113), rs1:x30(0x7d7d7d7d7d7d7d7d), rs2:x15(0x8282828282828282)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x1111131313111113, 0x7d7d7d7d7d7d7d7d, 0x8282828282828282, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox64
+ // result rd:x3(0x91918a8a8a91918a), rs1:x29(0x7e7e7e7e7e7e7e7e), rs2:x14(0x8181818181818181)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x91918a8a8a91918a, 0x7e7e7e7e7e7e7e7e, 0x8181818181818181, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox64
+ // result rd:x4(0x3a3a6b6b6b3a3a6b), rs1:x28(0x7f7f7f7f7f7f7f7f), rs2:x13(0x8080808080808080)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x3a3a6b6b6b3a3a6b, 0x7f7f7f7f7f7f7f7f, 0x8080808080808080, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox64
+ // result rd:x5(0x6b6b3a3a3a6b6b3a), rs1:x27(0x8080808080808080), rs2:x12(0x7f7f7f7f7f7f7f7f)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x6b6b3a3a3a6b6b3a, 0x8080808080808080, 0x7f7f7f7f7f7f7f7f, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox64
+ // result rd:x6(0x8a8a9191918a8a91), rs1:x26(0x8181818181818181), rs2:x11(0x7e7e7e7e7e7e7e7e)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x8a8a9191918a8a91, 0x8181818181818181, 0x7e7e7e7e7e7e7e7e, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox64
+ // result rd:x7(0x1313111111131311), rs1:x25(0x8282828282828282), rs2:x10(0x7d7d7d7d7d7d7d7d)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x1313111111131311, 0x8282828282828282, 0x7d7d7d7d7d7d7d7d, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox64
+ // result rd:x8(0x0101414141010141), rs1:x24(0x8383838383838383), rs2:x9(0x7c7c7c7c7c7c7c7c)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0x0101414141010141, 0x8383838383838383, 0x7c7c7c7c7c7c7c7c, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox64
+ // result rd:x9(0x03034f4f4f03034f), rs1:x23(0x8484848484848484), rs2:x8(0x7b7b7b7b7b7b7b7b)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x03034f4f4f03034f, 0x8484848484848484, 0x7b7b7b7b7b7b7b7b, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox64
+ // result rd:x10(0xbdbd676767bdbd67), rs1:x22(0x8585858585858585), rs2:x7(0x7a7a7a7a7a7a7a7a)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0xbdbd676767bdbd67, 0x8585858585858585, 0x7a7a7a7a7a7a7a7a, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox64
+ // result rd:x11(0xafafdcdcdcafafdc), rs1:x21(0x8686868686868686), rs2:x6(0x7979797979797979)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0xafafdcdcdcafafdc, 0x8686868686868686, 0x7979797979797979, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox64
+ // result rd:x12(0xc1c1eaeaeac1c1ea), rs1:x20(0x8787878787878787), rs2:x5(0x7878787878787878)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0xc1c1eaeaeac1c1ea, 0x8787878787878787, 0x7878787878787878, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox64
+ // result rd:x13(0x0202979797020297), rs1:x19(0x8888888888888888), rs2:x4(0x7777777777777777)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x0202979797020297, 0x8888888888888888, 0x7777777777777777, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox64
+ // result rd:x14(0x0f0ff2f2f20f0ff2), rs1:x18(0x8989898989898989), rs2:x3(0x7676767676767676)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0x0f0ff2f2f20f0ff2, 0x8989898989898989, 0x7676767676767676, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox64
+ // result rd:x15(0x3f3fcfcfcf3f3fcf), rs1:x17(0x8a8a8a8a8a8a8a8a), rs2:x2(0x7575757575757575)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0x3f3fcfcfcf3f3fcf, 0x8a8a8a8a8a8a8a8a, 0x7575757575757575, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox64
+ // result rd:x16(0xcacacecececacace), rs1:x16(0x8b8b8b8b8b8b8b8b), rs2:x1(0x7474747474747474)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0xcacacecececacace, 0x8b8b8b8b8b8b8b8b, 0x7474747474747474, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox64
+ // result rd:x17(0x8f8ff0f0f08f8ff0), rs1:x15(0x8c8c8c8c8c8c8c8c), rs2:x31(0x7373737373737373)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0x8f8ff0f0f08f8ff0, 0x8c8c8c8c8c8c8c8c, 0x7373737373737373, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox64
+ // result rd:x18(0x1e1eb4b4b41e1eb4), rs1:x14(0x8d8d8d8d8d8d8d8d), rs2:x30(0x7272727272727272)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x1e1eb4b4b41e1eb4, 0x8d8d8d8d8d8d8d8d, 0x7272727272727272, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox64
+ // result rd:x19(0x2c2ce6e6e62c2ce6), rs1:x13(0x8e8e8e8e8e8e8e8e), rs2:x29(0x7171717171717171)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x2c2ce6e6e62c2ce6, 0x8e8e8e8e8e8e8e8e, 0x7171717171717171, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox64
+ // result rd:x20(0xd0d0737373d0d073), rs1:x12(0x8f8f8f8f8f8f8f8f), rs2:x28(0x7070707070707070)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0xd0d0737373d0d073, 0x8f8f8f8f8f8f8f8f, 0x7070707070707070, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox64
+ // result rd:x21(0x0606969696060696), rs1:x11(0x9090909090909090), rs2:x27(0x6f6f6f6f6f6f6f6f)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x0606969696060696, 0x9090909090909090, 0x6f6f6f6f6f6f6f6f, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox64
+ // result rd:x22(0x4545acacac4545ac), rs1:x10(0x9191919191919191), rs2:x26(0x6e6e6e6e6e6e6e6e)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0x4545acacac4545ac, 0x9191919191919191, 0x6e6e6e6e6e6e6e6e, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox64
+ // result rd:x23(0xb3b3747474b3b374), rs1:x9(0x9292929292929292), rs2:x25(0x6d6d6d6d6d6d6d6d)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0xb3b3747474b3b374, 0x9292929292929292, 0x6d6d6d6d6d6d6d6d, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox64
+ // result rd:x24(0xb8b8222222b8b822), rs1:x8(0x9393939393939393), rs2:x24(0x6c6c6c6c6c6c6c6c)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0xb8b8222222b8b822, 0x9393939393939393, 0x6c6c6c6c6c6c6c6c, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox64
+ // result rd:x25(0x0505e7e7e70505e7), rs1:x7(0x9494949494949494), rs2:x23(0x6b6b6b6b6b6b6b6b)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0x0505e7e7e70505e7, 0x9494949494949494, 0x6b6b6b6b6b6b6b6b, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox64
+ // result rd:x26(0x5858adadad5858ad), rs1:x6(0x9595959595959595), rs2:x22(0x6a6a6a6a6a6a6a6a)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0x5858adadad5858ad, 0x9595959595959595, 0x6a6a6a6a6a6a6a6a, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox64
+ // result rd:x27(0xe4e4353535e4e435), rs1:x5(0x9696969696969696), rs2:x21(0x6969696969696969)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0xe4e4353535e4e435, 0x9696969696969696, 0x6969696969696969, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox64
+ // result rd:x28(0xf7f7858585f7f785), rs1:x4(0x9797979797979797), rs2:x20(0x6868686868686868)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0xf7f7858585f7f785, 0x9797979797979797, 0x6868686868686868, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox64
+ // result rd:x29(0x0a0ae2e2e20a0ae2), rs1:x3(0x9898989898989898), rs2:x19(0x6767676767676767)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0x0a0ae2e2e20a0ae2, 0x9898989898989898, 0x6767676767676767, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox64
+ // result rd:x30(0xd3d3f9f9f9d3d3f9), rs1:x2(0x9999999999999999), rs2:x18(0x6666666666666666)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0xd3d3f9f9f9d3d3f9, 0x9999999999999999, 0x6666666666666666, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox64
+ // result rd:x31(0xbcbc373737bcbc37), rs1:x1(0x9a9a9a9a9a9a9a9a), rs2:x17(0x6565656565656565)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0xbcbc373737bcbc37, 0x9a9a9a9a9a9a9a9a, 0x6565656565656565, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox64
+ // result rd:x1(0x8c8ce8e8e88c8ce8), rs1:x31(0x9b9b9b9b9b9b9b9b), rs2:x16(0x6464646464646464)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x8c8ce8e8e88c8ce8, 0x9b9b9b9b9b9b9b9b, 0x6464646464646464, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox64
+ // result rd:x2(0x00001c1c1c00001c), rs1:x30(0x9c9c9c9c9c9c9c9c), rs2:x15(0x6363636363636363)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x00001c1c1c00001c, 0x9c9c9c9c9c9c9c9c, 0x6363636363636363, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox64
+ // result rd:x3(0xabab757575abab75), rs1:x29(0x9d9d9d9d9d9d9d9d), rs2:x14(0x6262626262626262)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0xabab757575abab75, 0x9d9d9d9d9d9d9d9d, 0x6262626262626262, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox64
+ // result rd:x4(0xd8d8dfdfdfd8d8df), rs1:x28(0x9e9e9e9e9e9e9e9e), rs2:x13(0x6161616161616161)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0xd8d8dfdfdfd8d8df, 0x9e9e9e9e9e9e9e9e, 0x6161616161616161, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox64
+ // result rd:x5(0x90906e6e6e90906e), rs1:x27(0x9f9f9f9f9f9f9f9f), rs2:x12(0x6060606060606060)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x90906e6e6e90906e, 0x9f9f9f9f9f9f9f9f, 0x6060606060606060, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox64
+ // result rd:x6(0x8484474747848447), rs1:x26(0xa0a0a0a0a0a0a0a0), rs2:x11(0x5f5f5f5f5f5f5f5f)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x8484474747848447, 0xa0a0a0a0a0a0a0a0, 0x5f5f5f5f5f5f5f5f, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox64
+ // result rd:x7(0x9d9df1f1f19d9df1), rs1:x25(0xa1a1a1a1a1a1a1a1), rs2:x10(0x5e5e5e5e5e5e5e5e)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x9d9df1f1f19d9df1, 0xa1a1a1a1a1a1a1a1, 0x5e5e5e5e5e5e5e5e, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox64
+ // result rd:x8(0x8d8d1a1a1a8d8d1a), rs1:x24(0xa2a2a2a2a2a2a2a2), rs2:x9(0x5d5d5d5d5d5d5d5d)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0x8d8d1a1a1a8d8d1a, 0xa2a2a2a2a2a2a2a2, 0x5d5d5d5d5d5d5d5d, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox64
+ // result rd:x9(0xa7a7717171a7a771), rs1:x23(0xa3a3a3a3a3a3a3a3), rs2:x8(0x5c5c5c5c5c5c5c5c)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0xa7a7717171a7a771, 0xa3a3a3a3a3a3a3a3, 0x5c5c5c5c5c5c5c5c, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox64
+ // result rd:x10(0x57571d1d1d57571d), rs1:x22(0xa4a4a4a4a4a4a4a4), rs2:x7(0x5b5b5b5b5b5b5b5b)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0x57571d1d1d57571d, 0xa4a4a4a4a4a4a4a4, 0x5b5b5b5b5b5b5b5b, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox64
+ // result rd:x11(0x4646292929464629), rs1:x21(0xa5a5a5a5a5a5a5a5), rs2:x6(0x5a5a5a5a5a5a5a5a)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x4646292929464629, 0xa5a5a5a5a5a5a5a5, 0x5a5a5a5a5a5a5a5a, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox64
+ // result rd:x12(0x1515c5c5c51515c5), rs1:x20(0xa6a6a6a6a6a6a6a6), rs2:x5(0x5959595959595959)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0x1515c5c5c51515c5, 0xa6a6a6a6a6a6a6a6, 0x5959595959595959, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox64
+ // result rd:x13(0x5e5e8989895e5e89), rs1:x19(0xa7a7a7a7a7a7a7a7), rs2:x4(0x5858585858585858)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x5e5e8989895e5e89, 0xa7a7a7a7a7a7a7a7, 0x5858585858585858, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox64
+ // result rd:x14(0xdada6f6f6fdada6f), rs1:x18(0xa8a8a8a8a8a8a8a8), rs2:x3(0x5757575757575757)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0xdada6f6f6fdada6f, 0xa8a8a8a8a8a8a8a8, 0x5757575757575757, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox64
+ // result rd:x15(0xb9b9b7b7b7b9b9b7), rs1:x17(0xa9a9a9a9a9a9a9a9), rs2:x2(0x5656565656565656)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0xb9b9b7b7b7b9b9b7, 0xa9a9a9a9a9a9a9a9, 0x5656565656565656, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox64
+ // result rd:x16(0xeded626262eded62), rs1:x16(0xaaaaaaaaaaaaaaaa), rs2:x1(0x5555555555555555)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0xeded626262eded62, 0xaaaaaaaaaaaaaaaa, 0x5555555555555555, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox64
+ // result rd:x17(0xfdfd0e0e0efdfd0e), rs1:x15(0xabababababababab), rs2:x31(0x5454545454545454)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0xfdfd0e0e0efdfd0e, 0xabababababababab, 0x5454545454545454, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox64
+ // result rd:x18(0x5050aaaaaa5050aa), rs1:x14(0xacacacacacacacac), rs2:x30(0x5353535353535353)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x5050aaaaaa5050aa, 0xacacacacacacacac, 0x5353535353535353, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox64
+ // result rd:x19(0x4848181818484818), rs1:x13(0xadadadadadadadad), rs2:x29(0x5252525252525252)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x4848181818484818, 0xadadadadadadadad, 0x5252525252525252, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox64
+ // result rd:x20(0x7070bebebe7070be), rs1:x12(0xaeaeaeaeaeaeaeae), rs2:x28(0x5151515151515151)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0x7070bebebe7070be, 0xaeaeaeaeaeaeaeae, 0x5151515151515151, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox64
+ // result rd:x21(0x6c6c1b1b1b6c6c1b), rs1:x11(0xafafafafafafafaf), rs2:x27(0x5050505050505050)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x6c6c1b1b1b6c6c1b, 0xafafafafafafafaf, 0x5050505050505050, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox64
+ // result rd:x22(0x9292fcfcfc9292fc), rs1:x10(0xb0b0b0b0b0b0b0b0), rs2:x26(0x4f4f4f4f4f4f4f4f)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0x9292fcfcfc9292fc, 0xb0b0b0b0b0b0b0b0, 0x4f4f4f4f4f4f4f4f, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox64
+ // result rd:x23(0xb6b6565656b6b656), rs1:x9(0xb1b1b1b1b1b1b1b1), rs2:x25(0x4e4e4e4e4e4e4e4e)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0xb6b6565656b6b656, 0xb1b1b1b1b1b1b1b1, 0x4e4e4e4e4e4e4e4e, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox64
+ // result rd:x24(0x65653e3e3e65653e), rs1:x8(0xb2b2b2b2b2b2b2b2), rs2:x24(0x4d4d4d4d4d4d4d4d)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0x65653e3e3e65653e, 0xb2b2b2b2b2b2b2b2, 0x4d4d4d4d4d4d4d4d, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox64
+ // result rd:x25(0x5d5d4b4b4b5d5d4b), rs1:x7(0xb3b3b3b3b3b3b3b3), rs2:x23(0x4c4c4c4c4c4c4c4c)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0x5d5d4b4b4b5d5d4b, 0xb3b3b3b3b3b3b3b3, 0x4c4c4c4c4c4c4c4c, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox64
+ // result rd:x26(0xccccc6c6c6ccccc6), rs1:x6(0xb4b4b4b4b4b4b4b4), rs2:x22(0x4b4b4b4b4b4b4b4b)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0xccccc6c6c6ccccc6, 0xb4b4b4b4b4b4b4b4, 0x4b4b4b4b4b4b4b4b, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox64
+ // result rd:x27(0x5c5cd2d2d25c5cd2), rs1:x5(0xb5b5b5b5b5b5b5b5), rs2:x21(0x4a4a4a4a4a4a4a4a)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x5c5cd2d2d25c5cd2, 0xb5b5b5b5b5b5b5b5, 0x4a4a4a4a4a4a4a4a, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox64
+ // result rd:x28(0xa4a4797979a4a479), rs1:x4(0xb6b6b6b6b6b6b6b6), rs2:x20(0x4949494949494949)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0xa4a4797979a4a479, 0xb6b6b6b6b6b6b6b6, 0x4949494949494949, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox64
+ // result rd:x29(0xd4d4202020d4d420), rs1:x3(0xb7b7b7b7b7b7b7b7), rs2:x19(0x4848484848484848)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0xd4d4202020d4d420, 0xb7b7b7b7b7b7b7b7, 0x4848484848484848, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox64
+ // result rd:x30(0x16169a9a9a16169a), rs1:x2(0xb8b8b8b8b8b8b8b8), rs2:x18(0x4747474747474747)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x16169a9a9a16169a, 0xb8b8b8b8b8b8b8b8, 0x4747474747474747, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox64
+ // result rd:x31(0x9898dbdbdb9898db), rs1:x1(0xb9b9b9b9b9b9b9b9), rs2:x17(0x4646464646464646)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0x9898dbdbdb9898db, 0xb9b9b9b9b9b9b9b9, 0x4646464646464646, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox64
+ // result rd:x1(0x6868c0c0c06868c0), rs1:x31(0xbabababababababa), rs2:x16(0x4545454545454545)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x6868c0c0c06868c0, 0xbabababababababa, 0x4545454545454545, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox64
+ // result rd:x2(0x8686fefefe8686fe), rs1:x30(0xbbbbbbbbbbbbbbbb), rs2:x15(0x4444444444444444)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0x8686fefefe8686fe, 0xbbbbbbbbbbbbbbbb, 0x4444444444444444, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox64
+ // result rd:x3(0x6464787878646478), rs1:x29(0xbcbcbcbcbcbcbcbc), rs2:x14(0x4343434343434343)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x6464787878646478, 0xbcbcbcbcbcbcbcbc, 0x4343434343434343, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox64
+ // result rd:x4(0xf6f6cdcdcdf6f6cd), rs1:x28(0xbdbdbdbdbdbdbdbd), rs2:x13(0x4242424242424242)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0xf6f6cdcdcdf6f6cd, 0xbdbdbdbdbdbdbdbd, 0x4242424242424242, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox64
+ // result rd:x5(0xf8f85a5a5af8f85a), rs1:x27(0xbebebebebebebebe), rs2:x12(0x4141414141414141)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0xf8f85a5a5af8f85a, 0xbebebebebebebebe, 0x4141414141414141, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox64
+ // result rd:x6(0x7272f4f4f47272f4), rs1:x26(0xbfbfbfbfbfbfbfbf), rs2:x11(0x4040404040404040)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x7272f4f4f47272f4, 0xbfbfbfbfbfbfbfbf, 0x4040404040404040, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox64
+ // result rd:x7(0x25251f1f1f25251f), rs1:x25(0xc0c0c0c0c0c0c0c0), rs2:x10(0x3f3f3f3f3f3f3f3f)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x25251f1f1f25251f, 0xc0c0c0c0c0c0c0c0, 0x3f3f3f3f3f3f3f3f, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox64
+ // result rd:x8(0xd1d1ddddddd1d1dd), rs1:x24(0xc1c1c1c1c1c1c1c1), rs2:x9(0x3e3e3e3e3e3e3e3e)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0xd1d1ddddddd1d1dd, 0xc1c1c1c1c1c1c1c1, 0x3e3e3e3e3e3e3e3e, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox64
+ // result rd:x9(0x8b8ba8a8a88b8ba8), rs1:x23(0xc2c2c2c2c2c2c2c2), rs2:x8(0x3d3d3d3d3d3d3d3d)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0x8b8ba8a8a88b8ba8, 0xc2c2c2c2c2c2c2c2, 0x3d3d3d3d3d3d3d3d, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox64
+ // result rd:x10(0x6d6d3333336d6d33), rs1:x22(0xc3c3c3c3c3c3c3c3), rs2:x7(0x3c3c3c3c3c3c3c3c)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0x6d6d3333336d6d33, 0xc3c3c3c3c3c3c3c3, 0x3c3c3c3c3c3c3c3c, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox64
+ // result rd:x11(0x4949888888494988), rs1:x21(0xc4c4c4c4c4c4c4c4), rs2:x6(0x3b3b3b3b3b3b3b3b)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0x4949888888494988, 0xc4c4c4c4c4c4c4c4, 0x3b3b3b3b3b3b3b3b, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox64
+ // result rd:x12(0xa2a2070707a2a207), rs1:x20(0xc5c5c5c5c5c5c5c5), rs2:x5(0x3a3a3a3a3a3a3a3a)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0xa2a2070707a2a207, 0xc5c5c5c5c5c5c5c5, 0x3a3a3a3a3a3a3a3a, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox64
+ // result rd:x13(0x5b5bc7c7c75b5bc7), rs1:x19(0xc6c6c6c6c6c6c6c6), rs2:x4(0x3939393939393939)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x5b5bc7c7c75b5bc7, 0xc6c6c6c6c6c6c6c6, 0x3939393939393939, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox64
+ // result rd:x14(0x7676313131767631), rs1:x18(0xc7c7c7c7c7c7c7c7), rs2:x3(0x3838383838383838)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0x7676313131767631, 0xc7c7c7c7c7c7c7c7, 0x3838383838383838, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox64
+ // result rd:x15(0xb2b2b1b1b1b2b2b1), rs1:x17(0xc8c8c8c8c8c8c8c8), rs2:x2(0x3737373737373737)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0xb2b2b1b1b1b2b2b1, 0xc8c8c8c8c8c8c8c8, 0x3737373737373737, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox64
+ // result rd:x16(0x2424121212242412), rs1:x16(0xc9c9c9c9c9c9c9c9), rs2:x1(0x3636363636363636)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x2424121212242412, 0xc9c9c9c9c9c9c9c9, 0x3636363636363636, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox64
+ // result rd:x17(0xd9d9101010d9d910), rs1:x15(0xcacacacacacacaca), rs2:x31(0x3535353535353535)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0xd9d9101010d9d910, 0xcacacacacacacaca, 0x3535353535353535, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox64
+ // result rd:x18(0x2828595959282859), rs1:x14(0xcbcbcbcbcbcbcbcb), rs2:x30(0x3434343434343434)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x2828595959282859, 0xcbcbcbcbcbcbcbcb, 0x3434343434343434, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox64
+ // result rd:x19(0x6666272727666627), rs1:x13(0xcccccccccccccccc), rs2:x29(0x3333333333333333)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x6666272727666627, 0xcccccccccccccccc, 0x3333333333333333, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox64
+ // result rd:x20(0xa1a1808080a1a180), rs1:x12(0xcdcdcdcdcdcdcdcd), rs2:x28(0x3232323232323232)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0xa1a1808080a1a180, 0xcdcdcdcdcdcdcdcd, 0x3232323232323232, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox64
+ // result rd:x21(0x2e2eececec2e2eec), rs1:x11(0xcececececececece), rs2:x27(0x3131313131313131)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x2e2eececec2e2eec, 0xcececececececece, 0x3131313131313131, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox64
+ // result rd:x22(0x08085f5f5f08085f), rs1:x10(0xcfcfcfcfcfcfcfcf), rs2:x26(0x3030303030303030)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0x08085f5f5f08085f, 0xcfcfcfcfcfcfcfcf, 0x3030303030303030, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox64
+ // result rd:x23(0x4e4e6060604e4e60), rs1:x9(0xd0d0d0d0d0d0d0d0), rs2:x25(0x2f2f2f2f2f2f2f2f)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0x4e4e6060604e4e60, 0xd0d0d0d0d0d0d0d0, 0x2f2f2f2f2f2f2f2f, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox64
+ // result rd:x24(0xc3c3515151c3c351), rs1:x8(0xd1d1d1d1d1d1d1d1), rs2:x24(0x2e2e2e2e2e2e2e2e)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0xc3c3515151c3c351, 0xd1d1d1d1d1d1d1d1, 0x2e2e2e2e2e2e2e2e, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox64
+ // result rd:x25(0xfafa7f7f7ffafa7f), rs1:x7(0xd2d2d2d2d2d2d2d2), rs2:x23(0x2d2d2d2d2d2d2d2d)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0xfafa7f7f7ffafa7f, 0xd2d2d2d2d2d2d2d2, 0x2d2d2d2d2d2d2d2d, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox64
+ // result rd:x26(0x4242a9a9a94242a9), rs1:x6(0xd3d3d3d3d3d3d3d3), rs2:x22(0x2c2c2c2c2c2c2c2c)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0x4242a9a9a94242a9, 0xd3d3d3d3d3d3d3d3, 0x2c2c2c2c2c2c2c2c, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox64
+ // result rd:x27(0x0b0b1919190b0b19), rs1:x5(0xd4d4d4d4d4d4d4d4), rs2:x21(0x2b2b2b2b2b2b2b2b)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x0b0b1919190b0b19, 0xd4d4d4d4d4d4d4d4, 0x2b2b2b2b2b2b2b2b, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox64
+ // result rd:x28(0x9595b5b5b59595b5), rs1:x4(0xd5d5d5d5d5d5d5d5), rs2:x20(0x2a2a2a2a2a2a2a2a)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0x9595b5b5b59595b5, 0xd5d5d5d5d5d5d5d5, 0x2a2a2a2a2a2a2a2a, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox64
+ // result rd:x29(0x4c4c4a4a4a4c4c4a), rs1:x3(0xd6d6d6d6d6d6d6d6), rs2:x19(0x2929292929292929)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0x4c4c4a4a4a4c4c4a, 0xd6d6d6d6d6d6d6d6, 0x2929292929292929, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox64
+ // result rd:x30(0xeeee0d0d0deeee0d), rs1:x2(0xd7d7d7d7d7d7d7d7), rs2:x18(0x2828282828282828)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0xeeee0d0d0deeee0d, 0xd7d7d7d7d7d7d7d7, 0x2828282828282828, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox64
+ // result rd:x31(0x3d3d2d2d2d3d3d2d), rs1:x1(0xd8d8d8d8d8d8d8d8), rs2:x17(0x2727272727272727)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0x3d3d2d2d2d3d3d2d, 0xd8d8d8d8d8d8d8d8, 0x2727272727272727, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox64
+ // result rd:x1(0x2323e5e5e52323e5), rs1:x31(0xd9d9d9d9d9d9d9d9), rs2:x16(0x2626262626262626)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x2323e5e5e52323e5, 0xd9d9d9d9d9d9d9d9, 0x2626262626262626, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox64
+ // result rd:x2(0xc2c27a7a7ac2c27a), rs1:x30(0xdadadadadadadada), rs2:x15(0x2525252525252525)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0xc2c27a7a7ac2c27a, 0xdadadadadadadada, 0x2525252525252525, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox64
+ // result rd:x3(0xa6a69f9f9fa6a69f), rs1:x29(0xdbdbdbdbdbdbdbdb), rs2:x14(0x2424242424242424)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0xa6a69f9f9fa6a69f, 0xdbdbdbdbdbdbdbdb, 0x2424242424242424, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox64
+ // result rd:x4(0x3232939393323293), rs1:x28(0xdcdcdcdcdcdcdcdc), rs2:x13(0x2323232323232323)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x3232939393323293, 0xdcdcdcdcdcdcdcdc, 0x2323232323232323, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox64
+ // result rd:x5(0x9494c9c9c99494c9), rs1:x27(0xdddddddddddddddd), rs2:x12(0x2222222222222222)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0x9494c9c9c99494c9, 0xdddddddddddddddd, 0x2222222222222222, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox64
+ // result rd:x6(0x7b7b9c9c9c7b7b9c), rs1:x26(0xdededededededede), rs2:x11(0x2121212121212121)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x7b7b9c9c9c7b7b9c, 0xdededededededede, 0x2121212121212121, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox64
+ // result rd:x7(0x5454efefef5454ef), rs1:x25(0xdfdfdfdfdfdfdfdf), rs2:x10(0x2020202020202020)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x5454efefef5454ef, 0xdfdfdfdfdfdfdfdf, 0x2020202020202020, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox64
+ // result rd:x8(0xcbcba0a0a0cbcba0), rs1:x24(0xe0e0e0e0e0e0e0e0), rs2:x9(0x1f1f1f1f1f1f1f1f)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0xcbcba0a0a0cbcba0, 0xe0e0e0e0e0e0e0e0, 0x1f1f1f1f1f1f1f1f, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox64
+ // result rd:x9(0xe9e9e0e0e0e9e9e0), rs1:x23(0xe1e1e1e1e1e1e1e1), rs2:x8(0x1e1e1e1e1e1e1e1e)
+ TEST_RR_OP(aes64ds, x9, x23, x8, 0xe9e9e0e0e0e9e9e0, 0xe1e1e1e1e1e1e1e1, 0x1e1e1e1e1e1e1e1e, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox64
+ // result rd:x10(0xdede3b3b3bdede3b), rs1:x22(0xe2e2e2e2e2e2e2e2), rs2:x7(0x1d1d1d1d1d1d1d1d)
+ TEST_RR_OP(aes64ds, x10, x22, x7, 0xdede3b3b3bdede3b, 0xe2e2e2e2e2e2e2e2, 0x1d1d1d1d1d1d1d1d, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox64
+ // result rd:x11(0xc4c44d4d4dc4c44d), rs1:x21(0xe3e3e3e3e3e3e3e3), rs2:x6(0x1c1c1c1c1c1c1c1c)
+ TEST_RR_OP(aes64ds, x11, x21, x6, 0xc4c44d4d4dc4c44d, 0xe3e3e3e3e3e3e3e3, 0x1c1c1c1c1c1c1c1c, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox64
+ // result rd:x12(0x4444aeaeae4444ae), rs1:x20(0xe4e4e4e4e4e4e4e4), rs2:x5(0x1b1b1b1b1b1b1b1b)
+ TEST_RR_OP(aes64ds, x12, x20, x5, 0x4444aeaeae4444ae, 0xe4e4e4e4e4e4e4e4, 0x1b1b1b1b1b1b1b1b, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox64
+ // result rd:x13(0x43432a2a2a43432a), rs1:x19(0xe5e5e5e5e5e5e5e5), rs2:x4(0x1a1a1a1a1a1a1a1a)
+ TEST_RR_OP(aes64ds, x13, x19, x4, 0x43432a2a2a43432a, 0xe5e5e5e5e5e5e5e5, 0x1a1a1a1a1a1a1a1a, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox64
+ // result rd:x14(0x8e8ef5f5f58e8ef5), rs1:x18(0xe6e6e6e6e6e6e6e6), rs2:x3(0x1919191919191919)
+ TEST_RR_OP(aes64ds, x14, x18, x3, 0x8e8ef5f5f58e8ef5, 0xe6e6e6e6e6e6e6e6, 0x1919191919191919, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox64
+ // result rd:x15(0x3434b0b0b03434b0), rs1:x17(0xe7e7e7e7e7e7e7e7), rs2:x2(0x1818181818181818)
+ TEST_RR_OP(aes64ds, x15, x17, x2, 0x3434b0b0b03434b0, 0xe7e7e7e7e7e7e7e7, 0x1818181818181818, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox64
+ // result rd:x16(0x8787c8c8c88787c8), rs1:x16(0xe8e8e8e8e8e8e8e8), rs2:x1(0x1717171717171717)
+ TEST_RR_OP(aes64ds, x16, x16, x1, 0x8787c8c8c88787c8, 0xe8e8e8e8e8e8e8e8, 0x1717171717171717, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox64
+ // result rd:x17(0xffffebebebffffeb), rs1:x15(0xe9e9e9e9e9e9e9e9), rs2:x31(0x1616161616161616)
+ TEST_RR_OP(aes64ds, x17, x15, x31, 0xffffebebebffffeb, 0xe9e9e9e9e9e9e9e9, 0x1616161616161616, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox64
+ // result rd:x18(0x2f2fbbbbbb2f2fbb), rs1:x14(0xeaeaeaeaeaeaeaea), rs2:x30(0x1515151515151515)
+ TEST_RR_OP(aes64ds, x18, x14, x30, 0x2f2fbbbbbb2f2fbb, 0xeaeaeaeaeaeaeaea, 0x1515151515151515, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox64
+ // result rd:x19(0x9b9b3c3c3c9b9b3c), rs1:x13(0xebebebebebebebeb), rs2:x29(0x1414141414141414)
+ TEST_RR_OP(aes64ds, x19, x13, x29, 0x9b9b3c3c3c9b9b3c, 0xebebebebebebebeb, 0x1414141414141414, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox64
+ // result rd:x20(0x8282838383828283), rs1:x12(0xecececececececec), rs2:x28(0x1313131313131313)
+ TEST_RR_OP(aes64ds, x20, x12, x28, 0x8282838383828283, 0xecececececececec, 0x1313131313131313, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox64
+ // result rd:x21(0x3939535353393953), rs1:x11(0xedededededededed), rs2:x27(0x1212121212121212)
+ TEST_RR_OP(aes64ds, x21, x11, x27, 0x3939535353393953, 0xedededededededed, 0x1212121212121212, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox64
+ // result rd:x22(0xe3e3999999e3e399), rs1:x10(0xeeeeeeeeeeeeeeee), rs2:x26(0x1111111111111111)
+ TEST_RR_OP(aes64ds, x22, x10, x26, 0xe3e3999999e3e399, 0xeeeeeeeeeeeeeeee, 0x1111111111111111, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox64
+ // result rd:x23(0x7c7c6161617c7c61), rs1:x9(0xefefefefefefefef), rs2:x25(0x1010101010101010)
+ TEST_RR_OP(aes64ds, x23, x9, x25, 0x7c7c6161617c7c61, 0xefefefefefefefef, 0x1010101010101010, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox64
+ // result rd:x24(0xfbfb171717fbfb17), rs1:x8(0xf0f0f0f0f0f0f0f0), rs2:x24(0x0f0f0f0f0f0f0f0f)
+ TEST_RR_OP(aes64ds, x24, x8, x24, 0xfbfb171717fbfb17, 0xf0f0f0f0f0f0f0f0, 0xf0f0f0f0f0f0f0f, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox64
+ // result rd:x25(0xd7d72b2b2bd7d72b), rs1:x7(0xf1f1f1f1f1f1f1f1), rs2:x23(0x0e0e0e0e0e0e0e0e)
+ TEST_RR_OP(aes64ds, x25, x7, x23, 0xd7d72b2b2bd7d72b, 0xf1f1f1f1f1f1f1f1, 0xe0e0e0e0e0e0e0e, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox64
+ // result rd:x26(0xf3f3040404f3f304), rs1:x6(0xf2f2f2f2f2f2f2f2), rs2:x22(0x0d0d0d0d0d0d0d0d)
+ TEST_RR_OP(aes64ds, x26, x6, x22, 0xf3f3040404f3f304, 0xf2f2f2f2f2f2f2f2, 0xd0d0d0d0d0d0d0d, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox64
+ // result rd:x27(0x81817e7e7e81817e), rs1:x5(0xf3f3f3f3f3f3f3f3), rs2:x21(0x0c0c0c0c0c0c0c0c)
+ TEST_RR_OP(aes64ds, x27, x5, x21, 0x81817e7e7e81817e, 0xf3f3f3f3f3f3f3f3, 0xc0c0c0c0c0c0c0c, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox64
+ // result rd:x28(0x9e9ebababa9e9eba), rs1:x4(0xf4f4f4f4f4f4f4f4), rs2:x20(0x0b0b0b0b0b0b0b0b)
+ TEST_RR_OP(aes64ds, x28, x4, x20, 0x9e9ebababa9e9eba, 0xf4f4f4f4f4f4f4f4, 0xb0b0b0b0b0b0b0b, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox64
+ // result rd:x29(0xa3a3777777a3a377), rs1:x3(0xf5f5f5f5f5f5f5f5), rs2:x19(0x0a0a0a0a0a0a0a0a)
+ TEST_RR_OP(aes64ds, x29, x3, x19, 0xa3a3777777a3a377, 0xf5f5f5f5f5f5f5f5, 0xa0a0a0a0a0a0a0a, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox64
+ // result rd:x30(0x4040d6d6d64040d6), rs1:x2(0xf6f6f6f6f6f6f6f6), rs2:x18(0x0909090909090909)
+ TEST_RR_OP(aes64ds, x30, x2, x18, 0x4040d6d6d64040d6, 0xf6f6f6f6f6f6f6f6, 0x909090909090909, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox64
+ // result rd:x31(0xbfbf262626bfbf26), rs1:x1(0xf7f7f7f7f7f7f7f7), rs2:x17(0x0808080808080808)
+ TEST_RR_OP(aes64ds, x31, x1, x17, 0xbfbf262626bfbf26, 0xf7f7f7f7f7f7f7f7, 0x808080808080808, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox64
+ // result rd:x1(0x3838e1e1e13838e1), rs1:x31(0xf8f8f8f8f8f8f8f8), rs2:x16(0x0707070707070707)
+ TEST_RR_OP(aes64ds, x1, x31, x16, 0x3838e1e1e13838e1, 0xf8f8f8f8f8f8f8f8, 0x707070707070707, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox64
+ // result rd:x2(0xa5a5696969a5a569), rs1:x30(0xf9f9f9f9f9f9f9f9), rs2:x15(0x0606060606060606)
+ TEST_RR_OP(aes64ds, x2, x30, x15, 0xa5a5696969a5a569, 0xf9f9f9f9f9f9f9f9, 0x606060606060606, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox64
+ // result rd:x3(0x3636141414363614), rs1:x29(0xfafafafafafafafa), rs2:x14(0x0505050505050505)
+ TEST_RR_OP(aes64ds, x3, x29, x14, 0x3636141414363614, 0xfafafafafafafafa, 0x505050505050505, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox64
+ // result rd:x4(0x3030636363303063), rs1:x28(0xfbfbfbfbfbfbfbfb), rs2:x13(0x0404040404040404)
+ TEST_RR_OP(aes64ds, x4, x28, x13, 0x3030636363303063, 0xfbfbfbfbfbfbfbfb, 0x404040404040404, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox64
+ // result rd:x5(0xd5d5555555d5d555), rs1:x27(0xfcfcfcfcfcfcfcfc), rs2:x12(0x0303030303030303)
+ TEST_RR_OP(aes64ds, x5, x27, x12, 0xd5d5555555d5d555, 0xfcfcfcfcfcfcfcfc, 0x303030303030303, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox64
+ // result rd:x6(0x6a6a2121216a6a21), rs1:x26(0xfdfdfdfdfdfdfdfd), rs2:x11(0x0202020202020202)
+ TEST_RR_OP(aes64ds, x6, x26, x11, 0x6a6a2121216a6a21, 0xfdfdfdfdfdfdfdfd, 0x202020202020202, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox64
+ // result rd:x7(0x09090c0c0c09090c), rs1:x25(0xfefefefefefefefe), rs2:x10(0x0101010101010101)
+ TEST_RR_OP(aes64ds, x7, x25, x10, 0x09090c0c0c09090c, 0xfefefefefefefefe, 0x101010101010101, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox64
+ // result rd:x8(0x52527d7d7d52527d), rs1:x24(0xffffffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64ds, x8, x24, x9, 0x52527d7d7d52527d, 0xffffffffffffffff, 0x0, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64DSM-01.S b/riscof/suite/rv64i_m/K_unratified/AES64DSM-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..2c9bddf5d4f40b664a25d3c0257b877ac612f439
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64DSM-01.S
@@ -0,0 +1,1838 @@
+// RISC-V Architectural Validation Test AES64DSM-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64dsm'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64dsm)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64dsm)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x06fbad2157078033), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0x06fbad2157078033, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x3ff7b01c7616ec49), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x3ff7b01c7616ec49, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x5ce65db8b3c046ae), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0x5ce65db8b3c046ae, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x3846acdfa5757e88), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0x3846acdfa5757e88, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xdeba302326da7a70), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0xdeba302326da7a70, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xf4af164eeee4597d), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0xf4af164eeee4597d, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x6fd974947e0462fa), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0x6fd974947e0462fa, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x50603884062462c0), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0x50603884062462c0, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x677a7c6d31aa0e6f), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0x677a7c6d31aa0e6f, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xf7cde34101c5a48d), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0xf7cde34101c5a48d, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x9fc1b0eeed5d749f), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0x9fc1b0eeed5d749f, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x9fc1b0ee7d9c22fb), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0x9fc1b0ee7d9c22fb, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x9fc1b0ee75539eda), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0x9fc1b0ee75539eda, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x9fc1b0eeebc205c1), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0x9fc1b0eeebc205c1, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x9fc1b0eef762843f), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0x9fc1b0eef762843f, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x9fc1b0eed4b1f794), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0x9fc1b0eed4b1f794, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x9fc1b0ee9524fa6b), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0x9fc1b0ee9524fa6b, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x9fc1b0ee3b21c4b6), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0x9fc1b0ee3b21c4b6, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x5d749fedee9fc1b0), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0x5d749fedee9fc1b0, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x3ae67183ee9fc1b0), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0x3ae67183ee9fc1b0, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0xfea17ecaee9fc1b0), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0xfea17ecaee9fc1b0, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0xacb890fbee9fc1b0), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0xacb890fbee9fc1b0, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x9e2cfb7bee9fc1b0), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0x9e2cfb7bee9fc1b0, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x04d89716ee9fc1b0), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0x04d89716ee9fc1b0, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0xca4eb903ee9fc1b0), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0xca4eb903ee9fc1b0, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0xabc184daee9fc1b0), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0xabc184daee9fc1b0, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x4b5986e5ee9fc1b0), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0x4b5986e5ee9fc1b0, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x9fc1b0ee1039053a), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0x9fc1b0ee1039053a, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x9fc1b0ee5132fe14), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0x9fc1b0ee5132fe14, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x9fc1b0eefef17ce1), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0x9fc1b0eefef17ce1, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x9fc1b0ee62636974), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0x9fc1b0ee62636974, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x9fc1b0ee2c2aeeb3), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0x9fc1b0ee2c2aeeb3, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x9fc1b0ee78717562), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x9fc1b0ee78717562, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x9fc1b0ee0f15c482), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0x9fc1b0ee0f15c482, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x9fc1b0eee54b5986), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0x9fc1b0eee54b5986, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x9fc1b0eeee9fc1b0), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0x9fc1b0eeee9fc1b0, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x9fc1b0eeee9fc1b0), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0x9fc1b0eeee9fc1b0, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x9fc1b0eeee9fc1b0), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0x9fc1b0eeee9fc1b0, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x9fc1b0eeee9fc1b0), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0x9fc1b0eeee9fc1b0, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x9fc1b0eeee9fc1b0), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0x9fc1b0eeee9fc1b0, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x9fc1b0eeee9fc1b0), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0x9fc1b0eeee9fc1b0, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x9fc1b0eeee9fc1b0), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0x9fc1b0eeee9fc1b0, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x9c0305c1ee9fc1b0), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0x9c0305c1ee9fc1b0, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xc848ad03ee9fc1b0), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0xc848ad03ee9fc1b0, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x3ba95029ee9fc1b0), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0x3ba95029ee9fc1b0, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x27cd64f1ee9fc1b0), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0x27cd64f1ee9fc1b0, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x2ef8799dee9fc1b0), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0x2ef8799dee9fc1b0, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x8aec447fee9fc1b0), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0x8aec447fee9fc1b0, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x50a81ddbee9fc1b0), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0x50a81ddbee9fc1b0, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x4f4d5462ee9fc1b0), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0x4f4d5462ee9fc1b0, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x07f7bb3aee9fc1b0), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0x07f7bb3aee9fc1b0, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x9fc1b0ee485b4b4e), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0x9fc1b0ee485b4b4e, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x9fc1b0ee43a0650f), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0x9fc1b0ee43a0650f, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x9fc1b0ee802290a0), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0x9fc1b0ee802290a0, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x9fc1b0ee1237053c), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0x9fc1b0ee1237053c, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x9fc1b0ee5bb0c272), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0x9fc1b0ee5bb0c272, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x9fc1b0ee002b1326), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0x9fc1b0ee002b1326, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x9fc1b0ee649af351), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0x9fc1b0ee649af351, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x9fc1b0ee3a07f7bb), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0x9fc1b0ee3a07f7bb, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x9fc1b0eeee9fc1b0), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0x9fc1b0eeee9fc1b0, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x9fc1b0eeee9fc1b0), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0x9fc1b0eeee9fc1b0, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x9fc1b0eeee9fc1b0), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0x9fc1b0eeee9fc1b0, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x9fc1b0eeee9fc1b0), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0x9fc1b0eeee9fc1b0, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x9fc1b0eeee9fc1b0), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x9fc1b0eeee9fc1b0, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x9fc1b0eeee9fc1b0), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0x9fc1b0eeee9fc1b0, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x9fc1b0eeee9fc1b0), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0x9fc1b0eeee9fc1b0, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x9fc1b0eec19c0305), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0x9fc1b0eec19c0305, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x9fc1b0eea50cc253), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0x9fc1b0eea50cc253, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x9fc1b0ee84040def), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0x9fc1b0ee84040def, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x9fc1b0ee9f9a9c74), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0x9fc1b0ee9f9a9c74, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x9fc1b0ee61863cf5), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0x9fc1b0ee61863cf5, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x9fc1b0eecaa5ef86), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0x9fc1b0eecaa5ef86, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x9fc1b0ee35e47a8b), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0x9fc1b0ee35e47a8b, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x9fc1b0eee84a7fb5), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0x9fc1b0eee84a7fb5, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x9fc1b0eeee9fc1b0), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0x9fc1b0eeee9fc1b0, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xb0ee9fc1f7bb3a07), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0xb0ee9fc1f7bb3a07, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xb0ee9fc1f351649a), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0xb0ee9fc1f351649a, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xb0ee9fc11326002b), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0xb0ee9fc11326002b, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xb0ee9fc1c2725bb0), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0xb0ee9fc1c2725bb0, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xb0ee9fc1053c1237), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0xb0ee9fc1053c1237, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xb0ee9fc190a08022), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0xb0ee9fc190a08022, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xb0ee9fc1650f43a0), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0xb0ee9fc1650f43a0, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xb0ee9fc14b4e485b), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0xb0ee9fc14b4e485b, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xbb3a07f7c1b0ee9f), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0xbb3a07f7c1b0ee9f, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x54624f4dc1b0ee9f), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0x54624f4dc1b0ee9f, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x1ddb50a8c1b0ee9f), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0x1ddb50a8c1b0ee9f, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x447f8aecc1b0ee9f), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0x447f8aecc1b0ee9f, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x799d2ef8c1b0ee9f), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0x799d2ef8c1b0ee9f, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x64f127cdc1b0ee9f), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0x64f127cdc1b0ee9f, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x50293ba9c1b0ee9f), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0x50293ba9c1b0ee9f, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xad03c848c1b0ee9f), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0xad03c848c1b0ee9f, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x05c19c03c1b0ee9f), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0x05c19c03c1b0ee9f, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xb0ee9fc17fb5e84a), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0xb0ee9fc17fb5e84a, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xb0ee9fc17a8b35e4), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0xb0ee9fc17a8b35e4, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xb0ee9fc1ef86caa5), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0xb0ee9fc1ef86caa5, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xb0ee9fc13cf56186), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0xb0ee9fc13cf56186, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xb0ee9fc19c749f9a), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0xb0ee9fc19c749f9a, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xb0ee9fc10def8404), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0xb0ee9fc10def8404, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xb0ee9fc1c253a50c), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0xb0ee9fc1c253a50c, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xb0ee9fc10305c19c), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0xb0ee9fc10305c19c, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xb0ee9fc1c1b0ee9f), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0xb0ee9fc1c1b0ee9f, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xb0ee9fc1c1b0ee9f), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0xb0ee9fc1c1b0ee9f, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xb0ee9fc1c1b0ee9f), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0xb0ee9fc1c1b0ee9f, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xb0ee9fc1c1b0ee9f), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0xb0ee9fc1c1b0ee9f, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xb0ee9fc1c1b0ee9f), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0xb0ee9fc1c1b0ee9f, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xb0ee9fc1c1b0ee9f), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0xb0ee9fc1c1b0ee9f, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xb0ee9fc1c1b0ee9f), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0xb0ee9fc1c1b0ee9f, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x86e54b59c1b0ee9f), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0x86e54b59c1b0ee9f, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x84daabc1c1b0ee9f), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0x84daabc1c1b0ee9f, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xb903ca4ec1b0ee9f), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0xb903ca4ec1b0ee9f, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x971604d8c1b0ee9f), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0x971604d8c1b0ee9f, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfb7b9e2cc1b0ee9f), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0xfb7b9e2cc1b0ee9f, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x90fbacb8c1b0ee9f), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0x90fbacb8c1b0ee9f, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x7ecafea1c1b0ee9f), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0x7ecafea1c1b0ee9f, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x71833ae6c1b0ee9f), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0x71833ae6c1b0ee9f, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x9fed5d74c1b0ee9f), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0x9fed5d74c1b0ee9f, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xb0ee9fc1c4b63b21), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0xb0ee9fc1c4b63b21, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xb0ee9fc1fa6b9524), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0xb0ee9fc1fa6b9524, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xb0ee9fc1f794d4b1), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0xb0ee9fc1f794d4b1, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xb0ee9fc1843ff762), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0xb0ee9fc1843ff762, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xb0ee9fc105c1ebc2), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0xb0ee9fc105c1ebc2, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xb0ee9fc19eda7553), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0xb0ee9fc19eda7553, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xb0ee9fc122fb7d9c), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0xb0ee9fc122fb7d9c, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xb0ee9fc1749fed5d), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0xb0ee9fc1749fed5d, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xb0ee9fc1c1b0ee9f), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0xb0ee9fc1c1b0ee9f, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xb0ee9fc1c1b0ee9f), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0xb0ee9fc1c1b0ee9f, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xb0ee9fc1c1b0ee9f), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0xb0ee9fc1c1b0ee9f, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xb0ee9fc1c1b0ee9f), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0xb0ee9fc1c1b0ee9f, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xb0ee9fc1c1b0ee9f), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0xb0ee9fc1c1b0ee9f, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xb0ee9fc1c1b0ee9f), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0xb0ee9fc1c1b0ee9f, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xb0ee9fc1c1b0ee9f), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0xb0ee9fc1c1b0ee9f, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xb0ee9fc15986e54b), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0xb0ee9fc15986e54b, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xb0ee9fc1c4820f15), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0xb0ee9fc1c4820f15, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xb0ee9fc175627871), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0xb0ee9fc175627871, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xb0ee9fc1eeb32c2a), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0xb0ee9fc1eeb32c2a, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xb0ee9fc169746263), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0xb0ee9fc169746263, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xb0ee9fc17ce1fef1), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0xb0ee9fc17ce1fef1, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xb0ee9fc1fe145132), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0xb0ee9fc1fe145132, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xb0ee9fc1053a1039), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0xb0ee9fc1053a1039, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xb0ee9fc1c1b0ee9f), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0xb0ee9fc1c1b0ee9f, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x525252525190e77d), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0x525252525190e77d, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x52525252c151b119), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0x52525252c151b119, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x52525252c99e0d38), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0x52525252c99e0d38, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x52525252570f9623), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0x52525252570f9623, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x525252524baf17dd), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0x525252524baf17dd, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x52525252687c6476), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0x52525252687c6476, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x5252525229e96989), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0x5252525229e96989, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x5252525287ec5754), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0x5252525287ec5754, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x90e77d5152525252), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0x90e77d5152525252, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x51b119c152525252), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0x51b119c152525252, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x9e0d38c952525252), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0x9e0d38c952525252, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0f96235752525252), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0x0f96235752525252, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0xaf17dd4b52525252), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0xaf17dd4b52525252, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x7c64766852525252), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0x7c64766852525252, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0xe969892952525252), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0xe969892952525252, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0xec57548752525252), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0xec57548752525252, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x5252525252525252), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x5252525252525252, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x5252525252525252), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0x5252525252525252, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x5252525252525252), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0x5252525252525252, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x5252525252525252), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0x5252525252525252, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x5252525252525252), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0x5252525252525252, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x5252525252525252), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0x5252525252525252, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x5252525252525252), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0x5252525252525252, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x5252525252525252), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0x5252525252525252, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x5252525252525252), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0x5252525252525252, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x5252525252525252), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0x5252525252525252, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x5252525252525252), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0x5252525252525252, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x5252525252525252), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0x5252525252525252, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x5252525252525252), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0x5252525252525252, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x5252525252525252), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0x5252525252525252, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x5252525252525252), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0x5252525252525252, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x5252525252525252), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0x5252525252525252, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x5190e77d52525252), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0x5190e77d52525252, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0xc151b11952525252), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0xc151b11952525252, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0xc99e0d3852525252), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0xc99e0d3852525252, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x570f962352525252), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0x570f962352525252, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x4baf17dd52525252), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0x4baf17dd52525252, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x687c647652525252), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0x687c647652525252, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x29e9698952525252), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0x29e9698952525252, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x87ec575452525252), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0x87ec575452525252, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x5252525252525252), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0x5252525252525252, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x5252525252525252), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0x5252525252525252, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x5252525252525252), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0x5252525252525252, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x5252525252525252), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0x5252525252525252, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x5252525252525252), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0x5252525252525252, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x5252525252525252), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0x5252525252525252, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x5252525252525252), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0x5252525252525252, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x5252525252525252), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x5252525252525252, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x5252525252525252), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0x5252525252525252, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x5252525252525252), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0x5252525252525252, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x5252525252525252), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0x5252525252525252, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x5252525252525252), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0x5252525252525252, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x5252525252525252), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0x5252525252525252, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x5252525252525252), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0x5252525252525252, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x5252525252525252), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0x5252525252525252, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x5252525252525252), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0x5252525252525252, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x525252527d5190e7), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0x525252527d5190e7, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x5252525219c151b1), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0x5252525219c151b1, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x5252525238c99e0d), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0x5252525238c99e0d, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x5252525223570f96), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0x5252525223570f96, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x52525252dd4baf17), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0x52525252dd4baf17, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x5252525276687c64), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0x5252525276687c64, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x525252528929e969), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0x525252528929e969, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x525252525487ec57), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0x525252525487ec57, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x5252525252525252), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0x5252525252525252, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xb0ee9fc1f7bb3a07), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0xb0ee9fc1f7bb3a07, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xb0ee9fc1f351649a), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0xb0ee9fc1f351649a, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xb0ee9fc11326002b), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0xb0ee9fc11326002b, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xb0ee9fc1c2725bb0), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0xb0ee9fc1c2725bb0, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xb0ee9fc1053c1237), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0xb0ee9fc1053c1237, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xb0ee9fc190a08022), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0xb0ee9fc190a08022, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xb0ee9fc1650f43a0), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0xb0ee9fc1650f43a0, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xb0ee9fc14b4e485b), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0xb0ee9fc14b4e485b, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xbb3a07f7c1b0ee9f), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0xbb3a07f7c1b0ee9f, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x51649af3c1b0ee9f), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0x51649af3c1b0ee9f, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x26002b13c1b0ee9f), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0x26002b13c1b0ee9f, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x725bb0c2c1b0ee9f), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0x725bb0c2c1b0ee9f, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x3c123705c1b0ee9f), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0x3c123705c1b0ee9f, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xa0802290c1b0ee9f), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0xa0802290c1b0ee9f, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x0f43a065c1b0ee9f), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0x0f43a065c1b0ee9f, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x4e485b4bc1b0ee9f), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0x4e485b4bc1b0ee9f, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xb0ee9fc1c1b0ee9f), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0xb0ee9fc1c1b0ee9f, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xb0ee9fc1c1b0ee9f), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0xb0ee9fc1c1b0ee9f, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xb0ee9fc1c1b0ee9f), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0xb0ee9fc1c1b0ee9f, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xb0ee9fc1c1b0ee9f), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0xb0ee9fc1c1b0ee9f, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xb0ee9fc1c1b0ee9f), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0xb0ee9fc1c1b0ee9f, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xb0ee9fc1c1b0ee9f), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0xb0ee9fc1c1b0ee9f, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xb0ee9fc1c1b0ee9f), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0xb0ee9fc1c1b0ee9f, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xb0ee9fc1c1b0ee9f), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0xb0ee9fc1c1b0ee9f, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xb0ee9fc1c1b0ee9f), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0xb0ee9fc1c1b0ee9f, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xb0ee9fc1c1b0ee9f), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0xb0ee9fc1c1b0ee9f, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xb0ee9fc1c1b0ee9f), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0xb0ee9fc1c1b0ee9f, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xb0ee9fc1c1b0ee9f), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0xb0ee9fc1c1b0ee9f, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xb0ee9fc1c1b0ee9f), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0xb0ee9fc1c1b0ee9f, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xb0ee9fc1c1b0ee9f), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0xb0ee9fc1c1b0ee9f, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xb0ee9fc1c1b0ee9f), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0xb0ee9fc1c1b0ee9f, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xb0ee9fc1c1b0ee9f), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0xb0ee9fc1c1b0ee9f, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x86e54b59c1b0ee9f), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0x86e54b59c1b0ee9f, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x820f15c4c1b0ee9f), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0x820f15c4c1b0ee9f, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x62787175c1b0ee9f), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0x62787175c1b0ee9f, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xb32c2aeec1b0ee9f), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0xb32c2aeec1b0ee9f, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x74626369c1b0ee9f), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0x74626369c1b0ee9f, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xe1fef17cc1b0ee9f), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0xe1fef17cc1b0ee9f, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x145132fec1b0ee9f), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0x145132fec1b0ee9f, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x3a103905c1b0ee9f), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0x3a103905c1b0ee9f, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xb0ee9fc1c1b0ee9f), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0xb0ee9fc1c1b0ee9f, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xb0ee9fc1c1b0ee9f), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0xb0ee9fc1c1b0ee9f, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xb0ee9fc1c1b0ee9f), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0xb0ee9fc1c1b0ee9f, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xb0ee9fc1c1b0ee9f), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0xb0ee9fc1c1b0ee9f, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xb0ee9fc1c1b0ee9f), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0xb0ee9fc1c1b0ee9f, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xb0ee9fc1c1b0ee9f), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0xb0ee9fc1c1b0ee9f, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xb0ee9fc1c1b0ee9f), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0xb0ee9fc1c1b0ee9f, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xb0ee9fc1c1b0ee9f), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0xb0ee9fc1c1b0ee9f, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xb0ee9fc1c1b0ee9f), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0xb0ee9fc1c1b0ee9f, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xb0ee9fc1c1b0ee9f), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0xb0ee9fc1c1b0ee9f, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xb0ee9fc1c1b0ee9f), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0xb0ee9fc1c1b0ee9f, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xb0ee9fc1c1b0ee9f), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0xb0ee9fc1c1b0ee9f, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xb0ee9fc1c1b0ee9f), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0xb0ee9fc1c1b0ee9f, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xb0ee9fc1c1b0ee9f), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0xb0ee9fc1c1b0ee9f, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xb0ee9fc1c1b0ee9f), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0xb0ee9fc1c1b0ee9f, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xb0ee9fc1c1b0ee9f), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0xb0ee9fc1c1b0ee9f, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xb0ee9fc15986e54b), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0xb0ee9fc15986e54b, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xb0ee9fc1c4820f15), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0xb0ee9fc1c4820f15, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xb0ee9fc175627871), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0xb0ee9fc175627871, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xb0ee9fc1eeb32c2a), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0xb0ee9fc1eeb32c2a, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xb0ee9fc169746263), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0xb0ee9fc169746263, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xb0ee9fc17ce1fef1), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0xb0ee9fc17ce1fef1, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xb0ee9fc1fe145132), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0xb0ee9fc1fe145132, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xb0ee9fc1053a1039), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0xb0ee9fc1053a1039, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xb0ee9fc1c1b0ee9f), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0xb0ee9fc1c1b0ee9f, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x0e7ced6cca1c96af), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(aes64dsm, x23, x25, x25, 0x0e7ced6cca1c96af, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(aes64dsm, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xc97e46a8079984f6), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(aes64dsm, x25, x7, x0, 0xc97e46a8079984f6, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0xb879a432c3b88855), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(aes64dsm, x26, x0, x22, 0xb879a432c3b88855, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64DSM-02.S b/riscof/suite/rv64i_m/K_unratified/AES64DSM-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..1bcbc30b3405bfcd4f4c1d92023bfb1dd0dd9bbf
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64DSM-02.S
@@ -0,0 +1,1728 @@
+// RISC-V Architectural Validation Test AES64DSM-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64dsm'.
+// Using dataset: sbox64
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64dsm)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64dsm)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox64
+ // result rd:x1(0x9fc1b0eeee9fc1b0), rs1:x31(0x0000000000000000), rs2:x16(0xffffffffffffffff)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0x9fc1b0eeee9fc1b0, 0x0, 0xffffffffffffffff, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox64
+ // result rd:x2(0x1218171d1d121817), rs1:x30(0x0101010101010101), rs2:x15(0xfefefefefefefefe)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x1218171d1d121817, 0x101010101010101, 0xfefefefefefefefe, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox64
+ // result rd:x3(0x8016cb5d5d8016cb), rs1:x29(0x0202020202020202), rs2:x14(0xfdfdfdfdfdfdfdfd)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0x8016cb5d5d8016cb, 0x202020202020202, 0xfdfdfdfdfdfdfdfd, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox64
+ // result rd:x4(0x7863f8e3e37863f8), rs1:x28(0x0303030303030303), rs2:x13(0xfcfcfcfcfcfcfcfc)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0x7863f8e3e37863f8, 0x303030303030303, 0xfcfcfcfcfcfcfcfc, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox64
+ // result rd:x5(0x9234c167679234c1), rs1:x27(0x0404040404040404), rs2:x12(0xfbfbfbfbfbfbfbfb)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0x9234c167679234c1, 0x404040404040404, 0xfbfbfbfbfbfbfbfb, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox64
+ // result rd:x6(0xd89cfabebed89cfa), rs1:x26(0x0505050505050505), rs2:x11(0xfafafafafafafafa)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0xd89cfabebed89cfa, 0x505050505050505, 0xfafafafafafafafa, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox64
+ // result rd:x7(0xf7743bb8b8f7743b), rs1:x25(0x0606060606060606), rs2:x10(0xf9f9f9f9f9f9f9f9)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0xf7743bb8b8f7743b, 0x606060606060606, 0xf9f9f9f9f9f9f9f9, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox64
+ // result rd:x8(0x01a8d8717101a8d8), rs1:x24(0x0707070707070707), rs2:x9(0xf8f8f8f8f8f8f8f8)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0x01a8d8717101a8d8, 0x707070707070707, 0xf8f8f8f8f8f8f8f8, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox64
+ // result rd:x9(0x5d74c4eded5d74c4), rs1:x23(0x0808080808080808), rs2:x8(0xf7f7f7f7f7f7f7f7)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0x5d74c4eded5d74c4, 0x808080808080808, 0xf7f7f7f7f7f7f7f7, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox64
+ // result rd:x10(0x8fb8192e2e8fb819), rs1:x22(0x0909090909090909), rs2:x7(0xf6f6f6f6f6f6f6f6)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0x8fb8192e2e8fb819, 0x909090909090909, 0xf6f6f6f6f6f6f6f6, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox64
+ // result rd:x11(0xb90a6ddedeb90a6d), rs1:x21(0x0a0a0a0a0a0a0a0a), rs2:x6(0xf5f5f5f5f5f5f5f5)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0xb90a6ddedeb90a6d, 0xa0a0a0a0a0a0a0a, 0xf5f5f5f5f5f5f5f5, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox64
+ // result rd:x12(0x622a460e0e622a46), rs1:x20(0x0b0b0b0b0b0b0b0b), rs2:x5(0xf4f4f4f4f4f4f4f4)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0x622a460e0e622a46, 0xb0b0b0b0b0b0b0b, 0xf4f4f4f4f4f4f4f4, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox64
+ // result rd:x13(0x4aafb550504aafb5), rs1:x19(0x0c0c0c0c0c0c0c0c), rs2:x4(0xf3f3f3f3f3f3f3f3)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0x4aafb550504aafb5, 0xc0c0c0c0c0c0c0c, 0xf3f3f3f3f3f3f3f3, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox64
+ // result rd:x14(0x00f5f7020200f5f7), rs1:x18(0x0d0d0d0d0d0d0d0d), rs2:x3(0xf2f2f2f2f2f2f2f2)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0x00f5f7020200f5f7, 0xd0d0d0d0d0d0d0d, 0xf2f2f2f2f2f2f2f2, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox64
+ // result rd:x15(0x15f6e90a0a15f6e9), rs1:x17(0x0e0e0e0e0e0e0e0e), rs2:x2(0xf1f1f1f1f1f1f1f1)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0x15f6e90a0a15f6e9, 0xe0e0e0e0e0e0e0e, 0xf1f1f1f1f1f1f1f1, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox64
+ // result rd:x16(0x498aa56666498aa5), rs1:x16(0x0f0f0f0f0f0f0f0f), rs2:x1(0xf0f0f0f0f0f0f0f0)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0x498aa56666498aa5, 0xf0f0f0f0f0f0f0f, 0xf0f0f0f0f0f0f0f0, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox64
+ // result rd:x17(0x2f153208082f1532), rs1:x15(0x1010101010101010), rs2:x31(0xefefefefefefefef)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0x2f153208082f1532, 0x1010101010101010, 0xefefefefefefefef, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox64
+ // result rd:x18(0x9e6ae410109e6ae4), rs1:x14(0x1111111111111111), rs2:x30(0xeeeeeeeeeeeeeeee)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0x9e6ae410109e6ae4, 0x1111111111111111, 0xeeeeeeeeeeeeeeee, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox64
+ // result rd:x19(0x34e05e8a8a34e05e), rs1:x13(0x1212121212121212), rs2:x29(0xedededededededed)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0x34e05e8a8a34e05e, 0x1212121212121212, 0xedededededededed, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox64
+ // result rd:x20(0x8587848686858784), rs1:x12(0x1313131313131313), rs2:x28(0xecececececececec)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0x8587848686858784, 0x1313131313131313, 0xecececececececec, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox64
+ // result rd:x21(0xc396643131c39664), rs1:x11(0x1414141414141414), rs2:x27(0xebebebebebebebeb)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0xc396643131c39664, 0x1414141414141414, 0xebebebebebebebeb, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox64
+ // result rd:x22(0xeedd7a4949eedd7a), rs1:x10(0x1515151515151515), rs2:x26(0xeaeaeaeaeaeaeaea)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0xeedd7a4949eedd7a, 0x1515151515151515, 0xeaeaeaeaeaeaeaea, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox64
+ // result rd:x23(0x93bb87afaf93bb87), rs1:x9(0x1616161616161616), rs2:x25(0xe9e9e9e9e9e9e9e9)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0x93bb87afaf93bb87, 0x1616161616161616, 0xe9e9e9e9e9e9e9e9, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox64
+ // result rd:x24(0x71ef3ea0a071ef3e), rs1:x8(0x1717171717171717), rs2:x24(0xe8e8e8e8e8e8e8e8)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0x71ef3ea0a071ef3e, 0x1717171717171717, 0xe8e8e8e8e8e8e8e8, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox64
+ // result rd:x25(0x8596011212859601), rs1:x7(0x1818181818181818), rs2:x23(0xe7e7e7e7e7e7e7e7)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0x8596011212859601, 0x1818181818181818, 0xe7e7e7e7e7e7e7e7, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox64
+ // result rd:x26(0xf4028f7979f4028f), rs1:x6(0x1919191919191919), rs2:x22(0xe6e6e6e6e6e6e6e6)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0xf4028f7979f4028f, 0x1919191919191919, 0xe6e6e6e6e6e6e6e6, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox64
+ // result rd:x27(0x47952efcfc47952e), rs1:x5(0x1a1a1a1a1a1a1a1a), rs2:x21(0xe5e5e5e5e5e5e5e5)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0x47952efcfc47952e, 0x1a1a1a1a1a1a1a1a, 0xe5e5e5e5e5e5e5e5, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox64
+ // result rd:x28(0xe42b0ec1c1e42b0e), rs1:x4(0x1b1b1b1b1b1b1b1b), rs2:x20(0xe4e4e4e4e4e4e4e4)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0xe42b0ec1c1e42b0e, 0x1b1b1b1b1b1b1b1b, 0xe4e4e4e4e4e4e4e4, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox64
+ // result rd:x29(0x565fdfd6d6565fdf), rs1:x3(0x1c1c1c1c1c1c1c1c), rs2:x19(0xe3e3e3e3e3e3e3e3)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0x565fdfd6d6565fdf, 0x1c1c1c1c1c1c1c1c, 0xe3e3e3e3e3e3e3e3, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox64
+ // result rd:x30(0x5382b667675382b6), rs1:x2(0x1d1d1d1d1d1d1d1d), rs2:x18(0xe2e2e2e2e2e2e2e2)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0x5382b667675382b6, 0x1d1d1d1d1d1d1d1d, 0xe2e2e2e2e2e2e2e2, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox64
+ // result rd:x31(0xd6c4dfcdcdd6c4df), rs1:x1(0x1e1e1e1e1e1e1e1e), rs2:x17(0xe1e1e1e1e1e1e1e1)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0xd6c4dfcdcdd6c4df, 0x1e1e1e1e1e1e1e1e, 0xe1e1e1e1e1e1e1e1, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox64
+ // result rd:x1(0xc117aa7c7cc117aa), rs1:x31(0x1f1f1f1f1f1f1f1f), rs2:x16(0xe0e0e0e0e0e0e0e0)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0xc117aa7c7cc117aa, 0x1f1f1f1f1f1f1f1f, 0xe0e0e0e0e0e0e0e0, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox64
+ // result rd:x2(0x5835e38e8e5835e3), rs1:x30(0x2020202020202020), rs2:x15(0xdfdfdfdfdfdfdfdf)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x5835e38e8e5835e3, 0x2020202020202020, 0xdfdfdfdfdfdfdfdf, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox64
+ // result rd:x3(0xf82d1fcacaf82d1f), rs1:x29(0x2121212121212121), rs2:x14(0xdededededededede)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0xf82d1fcacaf82d1f, 0x2121212121212121, 0xdededededededede, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox64
+ // result rd:x4(0x1ca641fbfb1ca641), rs1:x28(0x2222222222222222), rs2:x13(0xdddddddddddddddd)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0x1ca641fbfb1ca641, 0x2222222222222222, 0xdddddddddddddddd, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox64
+ // result rd:x5(0x7821d980807821d9), rs1:x27(0x2323232323232323), rs2:x12(0xdcdcdcdcdcdcdcdc)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0x7821d980807821d9, 0x2323232323232323, 0xdcdcdcdcdcdcdcdc, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox64
+ // result rd:x6(0x097b304242097b30), rs1:x26(0x2424242424242424), rs2:x11(0xdbdbdbdbdbdbdbdb)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0x097b304242097b30, 0x2424242424242424, 0xdbdbdbdbdbdbdbdb, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox64
+ // result rd:x7(0xc7ac7f1414c7ac7f), rs1:x25(0x2525252525252525), rs2:x10(0xdadadadadadadada)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0xc7ac7f1414c7ac7f, 0x2525252525252525, 0xdadadadadadadada, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox64
+ // result rd:x8(0x47d081161647d081), rs1:x24(0x2626262626262626), rs2:x9(0xd9d9d9d9d9d9d9d9)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0x47d081161647d081, 0x2626262626262626, 0xd9d9d9d9d9d9d9d9, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox64
+ // result rd:x9(0x4d6d5d7d7d4d6d5d), rs1:x23(0x2727272727272727), rs2:x8(0xd8d8d8d8d8d8d8d8)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0x4d6d5d7d7d4d6d5d, 0x2727272727272727, 0xd8d8d8d8d8d8d8d8, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox64
+ // result rd:x10(0x71ac924f4f71ac92), rs1:x22(0x2828282828282828), rs2:x7(0xd7d7d7d7d7d7d7d7)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0x71ac924f4f71ac92, 0x2828282828282828, 0xd7d7d7d7d7d7d7d7, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox64
+ // result rd:x11(0x5e525854545e5258), rs1:x21(0x2929292929292929), rs2:x6(0xd6d6d6d6d6d6d6d6)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0x5e525854545e5258, 0x2929292929292929, 0xd6d6d6d6d6d6d6d6, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox64
+ // result rd:x12(0x7535551515753555), rs1:x20(0x2a2a2a2a2a2a2a2a), rs2:x5(0xd5d5d5d5d5d5d5d5)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0x7535551515753555, 0x2a2a2a2a2a2a2a2a, 0xd5d5d5d5d5d5d5d5, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox64
+ // result rd:x13(0x7551674343755167), rs1:x19(0x2b2b2b2b2b2b2b2b), rs2:x4(0xd4d4d4d4d4d4d4d4)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0x7551674343755167, 0x2b2b2b2b2b2b2b2b, 0xd4d4d4d4d4d4d4d4, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox64
+ // result rd:x14(0xe5280ec3c3e5280e), rs1:x18(0x2c2c2c2c2c2c2c2c), rs2:x3(0xd3d3d3d3d3d3d3d3)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0xe5280ec3c3e5280e, 0x2c2c2c2c2c2c2c2c, 0xd3d3d3d3d3d3d3d3, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox64
+ // result rd:x15(0x4c5dc9d8d84c5dc9), rs1:x17(0x2d2d2d2d2d2d2d2d), rs2:x2(0xd2d2d2d2d2d2d2d2)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0x4c5dc9d8d84c5dc9, 0x2d2d2d2d2d2d2d2d, 0xd2d2d2d2d2d2d2d2, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox64
+ // result rd:x16(0x102f82bdbd102f82), rs1:x16(0x2e2e2e2e2e2e2e2e), rs2:x1(0xd1d1d1d1d1d1d1d1)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0x102f82bdbd102f82, 0x2e2e2e2e2e2e2e2e, 0xd1d1d1d1d1d1d1d1, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox64
+ // result rd:x17(0x84d8aaf6f684d8aa), rs1:x15(0x2f2f2f2f2f2f2f2f), rs2:x31(0xd0d0d0d0d0d0d0d0)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0x84d8aaf6f684d8aa, 0x2f2f2f2f2f2f2f2f, 0xd0d0d0d0d0d0d0d0, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox64
+ // result rd:x18(0xb618e14f4fb618e1), rs1:x14(0x3030303030303030), rs2:x30(0xcfcfcfcfcfcfcfcf)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0xb618e14f4fb618e1, 0x3030303030303030, 0xcfcfcfcfcfcfcfcf, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox64
+ // result rd:x19(0x56c9940b0b56c994), rs1:x13(0x3131313131313131), rs2:x29(0xcececececececece)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0x56c9940b0b56c994, 0x3131313131313131, 0xcececececececece, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox64
+ // result rd:x20(0x4604672525460467), rs1:x12(0x3232323232323232), rs2:x28(0xcdcdcdcdcdcdcdcd)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0x4604672525460467, 0x3232323232323232, 0xcdcdcdcdcdcdcdcd, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox64
+ // result rd:x21(0xba38fb7979ba38fb), rs1:x11(0x3333333333333333), rs2:x27(0xcccccccccccccccc)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0xba38fb7979ba38fb, 0x3333333333333333, 0xcccccccccccccccc, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox64
+ // result rd:x22(0x648615f7f7648615), rs1:x10(0x3434343434343434), rs2:x26(0xcbcbcbcbcbcbcbcb)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0x648615f7f7648615, 0x3434343434343434, 0xcbcbcbcbcbcbcbcb, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox64
+ // result rd:x23(0x901959d0d0901959), rs1:x9(0x3535353535353535), rs2:x25(0xcacacacacacacaca)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0x901959d0d0901959, 0x3535353535353535, 0xcacacacacacacaca, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox64
+ // result rd:x24(0xa6ca90fcfca6ca90), rs1:x8(0x3636363636363636), rs2:x24(0xc9c9c9c9c9c9c9c9)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0xa6ca90fcfca6ca90, 0x3636363636363636, 0xc9c9c9c9c9c9c9c9, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox64
+ // result rd:x25(0xbbbdb8bebebbbdb8), rs1:x7(0x3737373737373737), rs2:x23(0xc8c8c8c8c8c8c8c8)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0xbbbdb8bebebbbdb8, 0x3737373737373737, 0xc8c8c8c8c8c8c8c8, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox64
+ // result rd:x26(0xb836ff7171b836ff), rs1:x6(0x3838383838383838), rs2:x22(0xc7c7c7c7c7c7c7c7)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0xb836ff7171b836ff, 0x3838383838383838, 0xc7c7c7c7c7c7c7c7, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox64
+ // result rd:x27(0xa2813e1d1da2813e), rs1:x5(0x3939393939393939), rs2:x21(0xc6c6c6c6c6c6c6c6)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0xa2813e1d1da2813e, 0x3939393939393939, 0xc6c6c6c6c6c6c6c6, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox64
+ // result rd:x28(0xf4a5510000f4a551), rs1:x4(0x3a3a3a3a3a3a3a3a), rs2:x20(0xc5c5c5c5c5c5c5c5)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0xf4a5510000f4a551, 0x3a3a3a3a3a3a3a3a, 0xc5c5c5c5c5c5c5c5, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox64
+ // result rd:x29(0x38a1f9606038a1f9), rs1:x3(0x3b3b3b3b3b3b3b3b), rs2:x19(0xc4c4c4c4c4c4c4c4)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0x38a1f9606038a1f9, 0x3b3b3b3b3b3b3b3b, 0xc4c4c4c4c4c4c4c4, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox64
+ // result rd:x30(0xec50b20e0eec50b2), rs1:x2(0x3c3c3c3c3c3c3c3c), rs2:x18(0xc3c3c3c3c3c3c3c3)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0xec50b20e0eec50b2, 0x3c3c3c3c3c3c3c3c, 0xc3c3c3c3c3c3c3c3, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox64
+ // result rd:x31(0x6224410707622441), rs1:x1(0x3d3d3d3d3d3d3d3d), rs2:x17(0xc2c2c2c2c2c2c2c2)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0x6224410707622441, 0x3d3d3d3d3d3d3d3d, 0xc2c2c2c2c2c2c2c2, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox64
+ // result rd:x1(0xf5edf9e1e1f5edf9), rs1:x31(0x3e3e3e3e3e3e3e3e), rs2:x16(0xc1c1c1c1c1c1c1c1)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0xf5edf9e1e1f5edf9, 0x3e3e3e3e3e3e3e3e, 0xc1c1c1c1c1c1c1c1, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox64
+ // result rd:x2(0x83f7b9cdcd83f7b9), rs1:x30(0x3f3f3f3f3f3f3f3f), rs2:x15(0xc0c0c0c0c0c0c0c0)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x83f7b9cdcd83f7b9, 0x3f3f3f3f3f3f3f3f, 0xc0c0c0c0c0c0c0c0, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox64
+ // result rd:x3(0xcdda4b5c5ccdda4b), rs1:x29(0x4040404040404040), rs2:x14(0xbfbfbfbfbfbfbfbf)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0xcdda4b5c5ccdda4b, 0x4040404040404040, 0xbfbfbfbfbfbfbfbf, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox64
+ // result rd:x4(0xbbe4194646bbe419), rs1:x28(0x4141414141414141), rs2:x13(0xbebebebebebebebe)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0xbbe4194646bbe419, 0x4141414141414141, 0xbebebebebebebebe, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox64
+ // result rd:x5(0x57216c1a1a57216c), rs1:x27(0x4242424242424242), rs2:x12(0xbdbdbdbdbdbdbdbd)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0x57216c1a1a57216c, 0x4242424242424242, 0xbdbdbdbdbdbdbdbd, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox64
+ // result rd:x6(0x30082c141430082c), rs1:x26(0x4343434343434343), rs2:x11(0xbcbcbcbcbcbcbcbc)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0x30082c141430082c, 0x4343434343434343, 0xbcbcbcbcbcbcbcbc, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox64
+ // result rd:x7(0xf5058d7d7df5058d), rs1:x25(0x4444444444444444), rs2:x10(0xbbbbbbbbbbbbbbbb)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0xf5058d7d7df5058d, 0x4444444444444444, 0xbbbbbbbbbbbbbbbb, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox64
+ // result rd:x8(0x1d56b5fefe1d56b5), rs1:x24(0x4545454545454545), rs2:x9(0xbabababababababa)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0x1d56b5fefe1d56b5, 0x4545454545454545, 0xbabababababababa, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox64
+ // result rd:x9(0x4acc098f8f4acc09), rs1:x23(0x4646464646464646), rs2:x8(0xb9b9b9b9b9b9b9b9)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0x4acc098f8f4acc09, 0x4646464646464646, 0xb9b9b9b9b9b9b9b9, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox64
+ // result rd:x10(0x9f9c1310109f9c13), rs1:x22(0x4747474747474747), rs2:x7(0xb8b8b8b8b8b8b8b8)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0x9f9c1310109f9c13, 0x4747474747474747, 0xb8b8b8b8b8b8b8b8, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox64
+ // result rd:x11(0x2eddda29292eddda), rs1:x21(0x4848484848484848), rs2:x6(0xb7b7b7b7b7b7b7b7)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0x2eddda29292eddda, 0x4848484848484848, 0xb7b7b7b7b7b7b7b7, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox64
+ // result rd:x12(0x81205cfdfd81205c), rs1:x20(0x4949494949494949), rs2:x5(0xb6b6b6b6b6b6b6b6)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0x81205cfdfd81205c, 0x4949494949494949, 0xb6b6b6b6b6b6b6b6, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox64
+ // result rd:x13(0xdbdc555252dbdc55), rs1:x19(0x4a4a4a4a4a4a4a4a), rs2:x4(0xb5b5b5b5b5b5b5b5)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0xdbdc555252dbdc55, 0x4a4a4a4a4a4a4a4a, 0xb5b5b5b5b5b5b5b5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox64
+ // result rd:x14(0xfaeef0e4e4faeef0), rs1:x18(0x4b4b4b4b4b4b4b4b), rs2:x3(0xb4b4b4b4b4b4b4b4)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0xfaeef0e4e4faeef0, 0x4b4b4b4b4b4b4b4b, 0xb4b4b4b4b4b4b4b4, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox64
+ // result rd:x15(0x3f132905053f1329), rs1:x17(0x4c4c4c4c4c4c4c4c), rs2:x2(0xb3b3b3b3b3b3b3b3)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0x3f132905053f1329, 0x4c4c4c4c4c4c4c4c, 0xb3b3b3b3b3b3b3b3, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox64
+ // result rd:x16(0xff49a41212ff49a4), rs1:x16(0x4d4d4d4d4d4d4d4d), rs2:x1(0xb2b2b2b2b2b2b2b2)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0xff49a41212ff49a4, 0x4d4d4d4d4d4d4d4d, 0xb2b2b2b2b2b2b2b2, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox64
+ // result rd:x17(0x20fbc01b1b20fbc0), rs1:x15(0x4e4e4e4e4e4e4e4e), rs2:x31(0xb1b1b1b1b1b1b1b1)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0x20fbc01b1b20fbc0, 0x4e4e4e4e4e4e4e4e, 0xb1b1b1b1b1b1b1b1, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox64
+ // result rd:x18(0x835fed3131835fed), rs1:x14(0x4f4f4f4f4f4f4f4f), rs2:x30(0xb0b0b0b0b0b0b0b0)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0x835fed3131835fed, 0x4f4f4f4f4f4f4f4f, 0xb0b0b0b0b0b0b0b0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox64
+ // result rd:x19(0x32dc45abab32dc45), rs1:x13(0x5050505050505050), rs2:x29(0xafafafafafafafaf)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0x32dc45abab32dc45, 0x5050505050505050, 0xafafafafafafafaf, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox64
+ // result rd:x20(0x2cabe265652cabe2), rs1:x12(0x5151515151515151), rs2:x28(0xaeaeaeaeaeaeaeae)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0x2cabe265652cabe2, 0x5151515151515151, 0xaeaeaeaeaeaeaeae, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox64
+ // result rd:x21(0xe343b31313e343b3), rs1:x11(0x5252525252525252), rs2:x27(0xadadadadadadadad)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0xe343b31313e343b3, 0x5252525252525252, 0xadadadadadadadad, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox64
+ // result rd:x22(0x806f7a9595806f7a), rs1:x10(0x5353535353535353), rs2:x26(0xacacacacacacacac)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0x806f7a9595806f7a, 0x5353535353535353, 0xacacacacacacacac, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox64
+ // result rd:x23(0x12efe11c1c12efe1), rs1:x9(0x5454545454545454), rs2:x25(0xabababababababab)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0x12efe11c1c12efe1, 0x5454545454545454, 0xabababababababab, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox64
+ // result rd:x24(0x6d68e2e7e76d68e2), rs1:x8(0x5555555555555555), rs2:x24(0xaaaaaaaaaaaaaaaa)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0x6d68e2e7e76d68e2, 0x5555555555555555, 0xaaaaaaaaaaaaaaaa, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox64
+ // result rd:x25(0x938f9d8181938f9d), rs1:x7(0x5656565656565656), rs2:x23(0xa9a9a9a9a9a9a9a9)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0x938f9d8181938f9d, 0x5656565656565656, 0xa9a9a9a9a9a9a9a9, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox64
+ // result rd:x26(0xfc8d493838fc8d49), rs1:x6(0x5757575757575757), rs2:x22(0xa8a8a8a8a8a8a8a8)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0xfc8d493838fc8d49, 0x5757575757575757, 0xa8a8a8a8a8a8a8a8, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox64
+ // result rd:x27(0x4df89a2f2f4df89a), rs1:x5(0x5858585858585858), rs2:x21(0xa7a7a7a7a7a7a7a7)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0x4df89a2f2f4df89a, 0x5858585858585858, 0xa7a7a7a7a7a7a7a7, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox64
+ // result rd:x28(0x13a8c3787813a8c3), rs1:x4(0x5959595959595959), rs2:x20(0xa6a6a6a6a6a6a6a6)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0x13a8c3787813a8c3, 0x5959595959595959, 0xa6a6a6a6a6a6a6a6, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox64
+ // result rd:x29(0x508e3fe1e1508e3f), rs1:x3(0x5a5a5a5a5a5a5a5a), rs2:x19(0xa5a5a5a5a5a5a5a5)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0x508e3fe1e1508e3f, 0x5a5a5a5a5a5a5a5a, 0xa5a5a5a5a5a5a5a5, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox64
+ // result rd:x30(0xba2ef06464ba2ef0), rs1:x2(0x5b5b5b5b5b5b5b5b), rs2:x18(0xa4a4a4a4a4a4a4a4)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0xba2ef06464ba2ef0, 0x5b5b5b5b5b5b5b5b, 0xa4a4a4a4a4a4a4a4, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox64
+ // result rd:x31(0xb30465d2d2b30465), rs1:x1(0x5c5c5c5c5c5c5c5c), rs2:x17(0xa3a3a3a3a3a3a3a3)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0xb30465d2d2b30465, 0x5c5c5c5c5c5c5c5c, 0xa3a3a3a3a3a3a3a3, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox64
+ // result rd:x1(0x4570d2e7e74570d2), rs1:x31(0x5d5d5d5d5d5d5d5d), rs2:x16(0xa2a2a2a2a2a2a2a2)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0x4570d2e7e74570d2, 0x5d5d5d5d5d5d5d5d, 0xa2a2a2a2a2a2a2a2, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox64
+ // result rd:x2(0x825aee3636825aee), rs1:x30(0x5e5e5e5e5e5e5e5e), rs2:x15(0xa1a1a1a1a1a1a1a1)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x825aee3636825aee, 0x5e5e5e5e5e5e5e5e, 0xa1a1a1a1a1a1a1a1, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox64
+ // result rd:x3(0xfb6638a5a5fb6638), rs1:x29(0x5f5f5f5f5f5f5f5f), rs2:x14(0xa0a0a0a0a0a0a0a0)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0xfb6638a5a5fb6638, 0x5f5f5f5f5f5f5f5f, 0xa0a0a0a0a0a0a0a0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox64
+ // result rd:x4(0x5cbba245455cbba2), rs1:x28(0x6060606060606060), rs2:x13(0x9f9f9f9f9f9f9f9f)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0x5cbba245455cbba2, 0x6060606060606060, 0x9f9f9f9f9f9f9f9f, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox64
+ // result rd:x5(0xcdc3cac4c4cdc3ca), rs1:x27(0x6161616161616161), rs2:x12(0x9e9e9e9e9e9e9e9e)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0xcdc3cac4c4cdc3ca, 0x6161616161616161, 0x9e9e9e9e9e9e9e9e, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox64
+ // result rd:x6(0x872059fefe872059), rs1:x26(0x6262626262626262), rs2:x11(0x9d9d9d9d9d9d9d9d)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0x872059fefe872059, 0x6262626262626262, 0x9d9d9d9d9d9d9d9d, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox64
+ // result rd:x7(0x546c487070546c48), rs1:x25(0x6363636363636363), rs2:x10(0x9c9c9c9c9c9c9c9c)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0x546c487070546c48, 0x6363636363636363, 0x9c9c9c9c9c9c9c9c, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox64
+ // result rd:x8(0xab63cf0707ab63cf), rs1:x24(0x6464646464646464), rs2:x9(0x9b9b9b9b9b9b9b9b)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0xab63cf0707ab63cf, 0x6464646464646464, 0x9b9b9b9b9b9b9b9b, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox64
+ // result rd:x9(0x202daba6a6202dab), rs1:x23(0x6565656565656565), rs2:x8(0x9a9a9a9a9a9a9a9a)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0x202daba6a6202dab, 0x6565656565656565, 0x9a9a9a9a9a9a9a9a, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox64
+ // result rd:x10(0x05512f7b7b05512f), rs1:x22(0x6666666666666666), rs2:x7(0x9999999999999999)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0x05512f7b7b05512f, 0x6666666666666666, 0x9999999999999999, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox64
+ // result rd:x11(0xa46f4c8787a46f4c), rs1:x21(0x6767676767676767), rs2:x6(0x9898989898989898)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0xa46f4c8787a46f4c, 0x6767676767676767, 0x9898989898989898, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox64
+ // result rd:x12(0xb256c02424b256c0), rs1:x20(0x6868686868686868), rs2:x5(0x9797979797979797)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0xb256c02424b256c0, 0x6868686868686868, 0x9797979797979797, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox64
+ // result rd:x13(0xe55c348d8de55c34), rs1:x19(0x6969696969696969), rs2:x4(0x9696969696969696)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0xe55c348d8de55c34, 0x6969696969696969, 0x9696969696969696, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox64
+ // result rd:x14(0xa55450a1a1a55450), rs1:x18(0x6a6a6a6a6a6a6a6a), rs2:x3(0x9595959595959595)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0xa55450a1a1a55450, 0x6a6a6a6a6a6a6a6a, 0x9595959595959595, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox64
+ // result rd:x15(0x9d427fa0a09d427f), rs1:x17(0x6b6b6b6b6b6b6b6b), rs2:x2(0x9494949494949494)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0x9d427fa0a09d427f, 0x6b6b6b6b6b6b6b6b, 0x9494949494949494, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox64
+ // result rd:x16(0x537cc9e6e6537cc9), rs1:x16(0x6c6c6c6c6c6c6c6c), rs2:x1(0x9393939393939393)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0x537cc9e6e6537cc9, 0x6c6c6c6c6c6c6c6c, 0x9393939393939393, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox64
+ // result rd:x17(0xd045178282d04517), rs1:x15(0x6d6d6d6d6d6d6d6d), rs2:x31(0x9292929292929292)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0xd045178282d04517, 0x6d6d6d6d6d6d6d6d, 0x9292929292929292, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox64
+ // result rd:x18(0xec2505ccccec2505), rs1:x14(0x6e6e6e6e6e6e6e6e), rs2:x30(0x9191919191919191)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0xec2505ccccec2505, 0x6e6e6e6e6e6e6e6e, 0x9191919191919191, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox64
+ // result rd:x19(0xdbe04b7070dbe04b), rs1:x13(0x6f6f6f6f6f6f6f6f), rs2:x29(0x9090909090909090)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0xdbe04b7070dbe04b, 0x6f6f6f6f6f6f6f6f, 0x9090909090909090, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox64
+ // result rd:x20(0x94c9376a6a94c937), rs1:x12(0x7070707070707070), rs2:x28(0x8f8f8f8f8f8f8f8f)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0x94c9376a6a94c937, 0x7070707070707070, 0x8f8f8f8f8f8f8f8f, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox64
+ // result rd:x21(0x6ce3a629296ce3a6), rs1:x11(0x7171717171717171), rs2:x27(0x8e8e8e8e8e8e8e8e)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0x6ce3a629296ce3a6, 0x7171717171717171, 0x8e8e8e8e8e8e8e8e, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox64
+ // result rd:x22(0x652acf8080652acf), rs1:x10(0x7272727272727272), rs2:x26(0x8d8d8d8d8d8d8d8d)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0x652acf8080652acf, 0x7272727272727272, 0x8d8d8d8d8d8d8d8d, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox64
+ // result rd:x23(0xe917966868e91796), rs1:x9(0x7373737373737373), rs2:x25(0x8c8c8c8c8c8c8c8c)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0xe917966868e91796, 0x7373737373737373, 0x8c8c8c8c8c8c8c8c, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox64
+ // result rd:x24(0xd6ded2dadad6ded2), rs1:x8(0x7474747474747474), rs2:x24(0x8b8b8b8b8b8b8b8b)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0xd6ded2dadad6ded2, 0x7474747474747474, 0x8b8b8b8b8b8b8b8b, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox64
+ // result rd:x25(0xd92229d2d2d92229), rs1:x7(0x7575757575757575), rs2:x23(0x8a8a8a8a8a8a8a8a)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0xd92229d2d2d92229, 0x7575757575757575, 0x8a8a8a8a8a8a8a8a, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox64
+ // result rd:x26(0xca2b37d6d6ca2b37), rs1:x6(0x7676767676767676), rs2:x22(0x8989898989898989)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0xca2b37d6d6ca2b37, 0x7676767676767676, 0x8989898989898989, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox64
+ // result rd:x27(0xc4f5516060c4f551), rs1:x5(0x7777777777777777), rs2:x21(0x8888888888888888)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0xc4f5516060c4f551, 0x7777777777777777, 0x8888888888888888, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox64
+ // result rd:x28(0x10463b6d6d10463b), rs1:x4(0x7878787878787878), rs2:x20(0x8787878787878787)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0x10463b6d6d10463b, 0x7878787878787878, 0x8787878787878787, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox64
+ // result rd:x29(0xed0b9e7878ed0b9e), rs1:x3(0x7979797979797979), rs2:x19(0x8686868686868686)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0xed0b9e7878ed0b9e, 0x7979797979797979, 0x8686868686868686, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox64
+ // result rd:x30(0x8d2257f8f88d2257), rs1:x2(0x7a7a7a7a7a7a7a7a), rs2:x18(0x8585858585858585)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0x8d2257f8f88d2257, 0x7a7a7a7a7a7a7a7a, 0x8585858585858585, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox64
+ // result rd:x31(0xfc64b02828fc64b0), rs1:x1(0x7b7b7b7b7b7b7b7b), rs2:x17(0x8484848484848484)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0xfc64b02828fc64b0, 0x7b7b7b7b7b7b7b7b, 0x8484848484848484, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox64
+ // result rd:x1(0xda5a9a1a1ada5a9a), rs1:x31(0x7c7c7c7c7c7c7c7c), rs2:x16(0x8383838383838383)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0xda5a9a1a1ada5a9a, 0x7c7c7c7c7c7c7c7c, 0x8383838383838383, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox64
+ // result rd:x2(0x1d191f1b1b1d191f), rs1:x30(0x7d7d7d7d7d7d7d7d), rs2:x15(0x8282828282828282)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x1d191f1b1b1d191f, 0x7d7d7d7d7d7d7d7d, 0x8282828282828282, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox64
+ // result rd:x3(0xcbfdd0e6e6cbfdd0), rs1:x29(0x7e7e7e7e7e7e7e7e), rs2:x14(0x8181818181818181)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0xcbfdd0e6e6cbfdd0, 0x7e7e7e7e7e7e7e7e, 0x8181818181818181, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox64
+ // result rd:x4(0xc765963434c76596), rs1:x28(0x7f7f7f7f7f7f7f7f), rs2:x13(0x8080808080808080)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0xc765963434c76596, 0x7f7f7f7f7f7f7f7f, 0x8080808080808080, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox64
+ // result rd:x5(0x9634c765659634c7), rs1:x27(0x8080808080808080), rs2:x12(0x7f7f7f7f7f7f7f7f)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0x9634c765659634c7, 0x8080808080808080, 0x7f7f7f7f7f7f7f7f, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox64
+ // result rd:x6(0xd0e6cbfdfdd0e6cb), rs1:x26(0x8181818181818181), rs2:x11(0x7e7e7e7e7e7e7e7e)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0xd0e6cbfdfdd0e6cb, 0x8181818181818181, 0x7e7e7e7e7e7e7e7e, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox64
+ // result rd:x7(0x1f1b1d19191f1b1d), rs1:x25(0x8282828282828282), rs2:x10(0x7d7d7d7d7d7d7d7d)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0x1f1b1d19191f1b1d, 0x8282828282828282, 0x7d7d7d7d7d7d7d7d, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox64
+ // result rd:x8(0x9a1ada5a5a9a1ada), rs1:x24(0x8383838383838383), rs2:x9(0x7c7c7c7c7c7c7c7c)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0x9a1ada5a5a9a1ada, 0x8383838383838383, 0x7c7c7c7c7c7c7c7c, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox64
+ // result rd:x9(0xb028fc6464b028fc), rs1:x23(0x8484848484848484), rs2:x8(0x7b7b7b7b7b7b7b7b)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0xb028fc6464b028fc, 0x8484848484848484, 0x7b7b7b7b7b7b7b7b, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox64
+ // result rd:x10(0x57f88d222257f88d), rs1:x22(0x8585858585858585), rs2:x7(0x7a7a7a7a7a7a7a7a)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0x57f88d222257f88d, 0x8585858585858585, 0x7a7a7a7a7a7a7a7a, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox64
+ // result rd:x11(0x9e78ed0b0b9e78ed), rs1:x21(0x8686868686868686), rs2:x6(0x7979797979797979)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0x9e78ed0b0b9e78ed, 0x8686868686868686, 0x7979797979797979, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox64
+ // result rd:x12(0x3b6d1046463b6d10), rs1:x20(0x8787878787878787), rs2:x5(0x7878787878787878)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0x3b6d1046463b6d10, 0x8787878787878787, 0x7878787878787878, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox64
+ // result rd:x13(0x5160c4f5f55160c4), rs1:x19(0x8888888888888888), rs2:x4(0x7777777777777777)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0x5160c4f5f55160c4, 0x8888888888888888, 0x7777777777777777, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox64
+ // result rd:x14(0x37d6ca2b2b37d6ca), rs1:x18(0x8989898989898989), rs2:x3(0x7676767676767676)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0x37d6ca2b2b37d6ca, 0x8989898989898989, 0x7676767676767676, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox64
+ // result rd:x15(0x29d2d9222229d2d9), rs1:x17(0x8a8a8a8a8a8a8a8a), rs2:x2(0x7575757575757575)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0x29d2d9222229d2d9, 0x8a8a8a8a8a8a8a8a, 0x7575757575757575, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox64
+ // result rd:x16(0xd2dad6deded2dad6), rs1:x16(0x8b8b8b8b8b8b8b8b), rs2:x1(0x7474747474747474)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0xd2dad6deded2dad6, 0x8b8b8b8b8b8b8b8b, 0x7474747474747474, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox64
+ // result rd:x17(0x9668e917179668e9), rs1:x15(0x8c8c8c8c8c8c8c8c), rs2:x31(0x7373737373737373)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0x9668e917179668e9, 0x8c8c8c8c8c8c8c8c, 0x7373737373737373, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox64
+ // result rd:x18(0xcf80652a2acf8065), rs1:x14(0x8d8d8d8d8d8d8d8d), rs2:x30(0x7272727272727272)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0xcf80652a2acf8065, 0x8d8d8d8d8d8d8d8d, 0x7272727272727272, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox64
+ // result rd:x19(0xa6296ce3e3a6296c), rs1:x13(0x8e8e8e8e8e8e8e8e), rs2:x29(0x7171717171717171)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0xa6296ce3e3a6296c, 0x8e8e8e8e8e8e8e8e, 0x7171717171717171, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox64
+ // result rd:x20(0x376a94c9c9376a94), rs1:x12(0x8f8f8f8f8f8f8f8f), rs2:x28(0x7070707070707070)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0x376a94c9c9376a94, 0x8f8f8f8f8f8f8f8f, 0x7070707070707070, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox64
+ // result rd:x21(0x4b70dbe0e04b70db), rs1:x11(0x9090909090909090), rs2:x27(0x6f6f6f6f6f6f6f6f)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0x4b70dbe0e04b70db, 0x9090909090909090, 0x6f6f6f6f6f6f6f6f, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox64
+ // result rd:x22(0x05ccec252505ccec), rs1:x10(0x9191919191919191), rs2:x26(0x6e6e6e6e6e6e6e6e)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0x05ccec252505ccec, 0x9191919191919191, 0x6e6e6e6e6e6e6e6e, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox64
+ // result rd:x23(0x1782d045451782d0), rs1:x9(0x9292929292929292), rs2:x25(0x6d6d6d6d6d6d6d6d)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0x1782d045451782d0, 0x9292929292929292, 0x6d6d6d6d6d6d6d6d, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox64
+ // result rd:x24(0xc9e6537c7cc9e653), rs1:x8(0x9393939393939393), rs2:x24(0x6c6c6c6c6c6c6c6c)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0xc9e6537c7cc9e653, 0x9393939393939393, 0x6c6c6c6c6c6c6c6c, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox64
+ // result rd:x25(0x7fa09d42427fa09d), rs1:x7(0x9494949494949494), rs2:x23(0x6b6b6b6b6b6b6b6b)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0x7fa09d42427fa09d, 0x9494949494949494, 0x6b6b6b6b6b6b6b6b, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox64
+ // result rd:x26(0x50a1a5545450a1a5), rs1:x6(0x9595959595959595), rs2:x22(0x6a6a6a6a6a6a6a6a)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0x50a1a5545450a1a5, 0x9595959595959595, 0x6a6a6a6a6a6a6a6a, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox64
+ // result rd:x27(0x348de55c5c348de5), rs1:x5(0x9696969696969696), rs2:x21(0x6969696969696969)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0x348de55c5c348de5, 0x9696969696969696, 0x6969696969696969, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox64
+ // result rd:x28(0xc024b25656c024b2), rs1:x4(0x9797979797979797), rs2:x20(0x6868686868686868)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0xc024b25656c024b2, 0x9797979797979797, 0x6868686868686868, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox64
+ // result rd:x29(0x4c87a46f6f4c87a4), rs1:x3(0x9898989898989898), rs2:x19(0x6767676767676767)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0x4c87a46f6f4c87a4, 0x9898989898989898, 0x6767676767676767, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox64
+ // result rd:x30(0x2f7b0551512f7b05), rs1:x2(0x9999999999999999), rs2:x18(0x6666666666666666)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0x2f7b0551512f7b05, 0x9999999999999999, 0x6666666666666666, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox64
+ // result rd:x31(0xaba6202d2daba620), rs1:x1(0x9a9a9a9a9a9a9a9a), rs2:x17(0x6565656565656565)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0xaba6202d2daba620, 0x9a9a9a9a9a9a9a9a, 0x6565656565656565, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox64
+ // result rd:x1(0xcf07ab6363cf07ab), rs1:x31(0x9b9b9b9b9b9b9b9b), rs2:x16(0x6464646464646464)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0xcf07ab6363cf07ab, 0x9b9b9b9b9b9b9b9b, 0x6464646464646464, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox64
+ // result rd:x2(0x4870546c6c487054), rs1:x30(0x9c9c9c9c9c9c9c9c), rs2:x15(0x6363636363636363)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x4870546c6c487054, 0x9c9c9c9c9c9c9c9c, 0x6363636363636363, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox64
+ // result rd:x3(0x59fe87202059fe87), rs1:x29(0x9d9d9d9d9d9d9d9d), rs2:x14(0x6262626262626262)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0x59fe87202059fe87, 0x9d9d9d9d9d9d9d9d, 0x6262626262626262, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox64
+ // result rd:x4(0xcac4cdc3c3cac4cd), rs1:x28(0x9e9e9e9e9e9e9e9e), rs2:x13(0x6161616161616161)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0xcac4cdc3c3cac4cd, 0x9e9e9e9e9e9e9e9e, 0x6161616161616161, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox64
+ // result rd:x5(0xa2455cbbbba2455c), rs1:x27(0x9f9f9f9f9f9f9f9f), rs2:x12(0x6060606060606060)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0xa2455cbbbba2455c, 0x9f9f9f9f9f9f9f9f, 0x6060606060606060, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox64
+ // result rd:x6(0x38a5fb666638a5fb), rs1:x26(0xa0a0a0a0a0a0a0a0), rs2:x11(0x5f5f5f5f5f5f5f5f)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0x38a5fb666638a5fb, 0xa0a0a0a0a0a0a0a0, 0x5f5f5f5f5f5f5f5f, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox64
+ // result rd:x7(0xee36825a5aee3682), rs1:x25(0xa1a1a1a1a1a1a1a1), rs2:x10(0x5e5e5e5e5e5e5e5e)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0xee36825a5aee3682, 0xa1a1a1a1a1a1a1a1, 0x5e5e5e5e5e5e5e5e, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox64
+ // result rd:x8(0xd2e7457070d2e745), rs1:x24(0xa2a2a2a2a2a2a2a2), rs2:x9(0x5d5d5d5d5d5d5d5d)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0xd2e7457070d2e745, 0xa2a2a2a2a2a2a2a2, 0x5d5d5d5d5d5d5d5d, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox64
+ // result rd:x9(0x65d2b3040465d2b3), rs1:x23(0xa3a3a3a3a3a3a3a3), rs2:x8(0x5c5c5c5c5c5c5c5c)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0x65d2b3040465d2b3, 0xa3a3a3a3a3a3a3a3, 0x5c5c5c5c5c5c5c5c, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox64
+ // result rd:x10(0xf064ba2e2ef064ba), rs1:x22(0xa4a4a4a4a4a4a4a4), rs2:x7(0x5b5b5b5b5b5b5b5b)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0xf064ba2e2ef064ba, 0xa4a4a4a4a4a4a4a4, 0x5b5b5b5b5b5b5b5b, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox64
+ // result rd:x11(0x3fe1508e8e3fe150), rs1:x21(0xa5a5a5a5a5a5a5a5), rs2:x6(0x5a5a5a5a5a5a5a5a)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0x3fe1508e8e3fe150, 0xa5a5a5a5a5a5a5a5, 0x5a5a5a5a5a5a5a5a, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox64
+ // result rd:x12(0xc37813a8a8c37813), rs1:x20(0xa6a6a6a6a6a6a6a6), rs2:x5(0x5959595959595959)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0xc37813a8a8c37813, 0xa6a6a6a6a6a6a6a6, 0x5959595959595959, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox64
+ // result rd:x13(0x9a2f4df8f89a2f4d), rs1:x19(0xa7a7a7a7a7a7a7a7), rs2:x4(0x5858585858585858)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0x9a2f4df8f89a2f4d, 0xa7a7a7a7a7a7a7a7, 0x5858585858585858, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox64
+ // result rd:x14(0x4938fc8d8d4938fc), rs1:x18(0xa8a8a8a8a8a8a8a8), rs2:x3(0x5757575757575757)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0x4938fc8d8d4938fc, 0xa8a8a8a8a8a8a8a8, 0x5757575757575757, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox64
+ // result rd:x15(0x9d81938f8f9d8193), rs1:x17(0xa9a9a9a9a9a9a9a9), rs2:x2(0x5656565656565656)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0x9d81938f8f9d8193, 0xa9a9a9a9a9a9a9a9, 0x5656565656565656, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox64
+ // result rd:x16(0xe2e76d6868e2e76d), rs1:x16(0xaaaaaaaaaaaaaaaa), rs2:x1(0x5555555555555555)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0xe2e76d6868e2e76d, 0xaaaaaaaaaaaaaaaa, 0x5555555555555555, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox64
+ // result rd:x17(0xe11c12efefe11c12), rs1:x15(0xabababababababab), rs2:x31(0x5454545454545454)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0xe11c12efefe11c12, 0xabababababababab, 0x5454545454545454, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox64
+ // result rd:x18(0x7a95806f6f7a9580), rs1:x14(0xacacacacacacacac), rs2:x30(0x5353535353535353)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0x7a95806f6f7a9580, 0xacacacacacacacac, 0x5353535353535353, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox64
+ // result rd:x19(0xb313e34343b313e3), rs1:x13(0xadadadadadadadad), rs2:x29(0x5252525252525252)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0xb313e34343b313e3, 0xadadadadadadadad, 0x5252525252525252, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox64
+ // result rd:x20(0xe2652cababe2652c), rs1:x12(0xaeaeaeaeaeaeaeae), rs2:x28(0x5151515151515151)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0xe2652cababe2652c, 0xaeaeaeaeaeaeaeae, 0x5151515151515151, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox64
+ // result rd:x21(0x45ab32dcdc45ab32), rs1:x11(0xafafafafafafafaf), rs2:x27(0x5050505050505050)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0x45ab32dcdc45ab32, 0xafafafafafafafaf, 0x5050505050505050, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox64
+ // result rd:x22(0xed31835f5fed3183), rs1:x10(0xb0b0b0b0b0b0b0b0), rs2:x26(0x4f4f4f4f4f4f4f4f)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0xed31835f5fed3183, 0xb0b0b0b0b0b0b0b0, 0x4f4f4f4f4f4f4f4f, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox64
+ // result rd:x23(0xc01b20fbfbc01b20), rs1:x9(0xb1b1b1b1b1b1b1b1), rs2:x25(0x4e4e4e4e4e4e4e4e)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0xc01b20fbfbc01b20, 0xb1b1b1b1b1b1b1b1, 0x4e4e4e4e4e4e4e4e, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox64
+ // result rd:x24(0xa412ff4949a412ff), rs1:x8(0xb2b2b2b2b2b2b2b2), rs2:x24(0x4d4d4d4d4d4d4d4d)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0xa412ff4949a412ff, 0xb2b2b2b2b2b2b2b2, 0x4d4d4d4d4d4d4d4d, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox64
+ // result rd:x25(0x29053f131329053f), rs1:x7(0xb3b3b3b3b3b3b3b3), rs2:x23(0x4c4c4c4c4c4c4c4c)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0x29053f131329053f, 0xb3b3b3b3b3b3b3b3, 0x4c4c4c4c4c4c4c4c, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox64
+ // result rd:x26(0xf0e4faeeeef0e4fa), rs1:x6(0xb4b4b4b4b4b4b4b4), rs2:x22(0x4b4b4b4b4b4b4b4b)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0xf0e4faeeeef0e4fa, 0xb4b4b4b4b4b4b4b4, 0x4b4b4b4b4b4b4b4b, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox64
+ // result rd:x27(0x5552dbdcdc5552db), rs1:x5(0xb5b5b5b5b5b5b5b5), rs2:x21(0x4a4a4a4a4a4a4a4a)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0x5552dbdcdc5552db, 0xb5b5b5b5b5b5b5b5, 0x4a4a4a4a4a4a4a4a, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox64
+ // result rd:x28(0x5cfd8120205cfd81), rs1:x4(0xb6b6b6b6b6b6b6b6), rs2:x20(0x4949494949494949)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0x5cfd8120205cfd81, 0xb6b6b6b6b6b6b6b6, 0x4949494949494949, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox64
+ // result rd:x29(0xda292eddddda292e), rs1:x3(0xb7b7b7b7b7b7b7b7), rs2:x19(0x4848484848484848)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0xda292eddddda292e, 0xb7b7b7b7b7b7b7b7, 0x4848484848484848, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox64
+ // result rd:x30(0x13109f9c9c13109f), rs1:x2(0xb8b8b8b8b8b8b8b8), rs2:x18(0x4747474747474747)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0x13109f9c9c13109f, 0xb8b8b8b8b8b8b8b8, 0x4747474747474747, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox64
+ // result rd:x31(0x098f4acccc098f4a), rs1:x1(0xb9b9b9b9b9b9b9b9), rs2:x17(0x4646464646464646)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0x098f4acccc098f4a, 0xb9b9b9b9b9b9b9b9, 0x4646464646464646, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox64
+ // result rd:x1(0xb5fe1d5656b5fe1d), rs1:x31(0xbabababababababa), rs2:x16(0x4545454545454545)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0xb5fe1d5656b5fe1d, 0xbabababababababa, 0x4545454545454545, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox64
+ // result rd:x2(0x8d7df505058d7df5), rs1:x30(0xbbbbbbbbbbbbbbbb), rs2:x15(0x4444444444444444)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x8d7df505058d7df5, 0xbbbbbbbbbbbbbbbb, 0x4444444444444444, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox64
+ // result rd:x3(0x2c143008082c1430), rs1:x29(0xbcbcbcbcbcbcbcbc), rs2:x14(0x4343434343434343)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0x2c143008082c1430, 0xbcbcbcbcbcbcbcbc, 0x4343434343434343, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox64
+ // result rd:x4(0x6c1a5721216c1a57), rs1:x28(0xbdbdbdbdbdbdbdbd), rs2:x13(0x4242424242424242)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0x6c1a5721216c1a57, 0xbdbdbdbdbdbdbdbd, 0x4242424242424242, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox64
+ // result rd:x5(0x1946bbe4e41946bb), rs1:x27(0xbebebebebebebebe), rs2:x12(0x4141414141414141)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0x1946bbe4e41946bb, 0xbebebebebebebebe, 0x4141414141414141, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox64
+ // result rd:x6(0x4b5ccddada4b5ccd), rs1:x26(0xbfbfbfbfbfbfbfbf), rs2:x11(0x4040404040404040)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0x4b5ccddada4b5ccd, 0xbfbfbfbfbfbfbfbf, 0x4040404040404040, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox64
+ // result rd:x7(0xb9cd83f7f7b9cd83), rs1:x25(0xc0c0c0c0c0c0c0c0), rs2:x10(0x3f3f3f3f3f3f3f3f)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0xb9cd83f7f7b9cd83, 0xc0c0c0c0c0c0c0c0, 0x3f3f3f3f3f3f3f3f, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox64
+ // result rd:x8(0xf9e1f5ededf9e1f5), rs1:x24(0xc1c1c1c1c1c1c1c1), rs2:x9(0x3e3e3e3e3e3e3e3e)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0xf9e1f5ededf9e1f5, 0xc1c1c1c1c1c1c1c1, 0x3e3e3e3e3e3e3e3e, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox64
+ // result rd:x9(0x4107622424410762), rs1:x23(0xc2c2c2c2c2c2c2c2), rs2:x8(0x3d3d3d3d3d3d3d3d)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0x4107622424410762, 0xc2c2c2c2c2c2c2c2, 0x3d3d3d3d3d3d3d3d, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox64
+ // result rd:x10(0xb20eec5050b20eec), rs1:x22(0xc3c3c3c3c3c3c3c3), rs2:x7(0x3c3c3c3c3c3c3c3c)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0xb20eec5050b20eec, 0xc3c3c3c3c3c3c3c3, 0x3c3c3c3c3c3c3c3c, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox64
+ // result rd:x11(0xf96038a1a1f96038), rs1:x21(0xc4c4c4c4c4c4c4c4), rs2:x6(0x3b3b3b3b3b3b3b3b)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0xf96038a1a1f96038, 0xc4c4c4c4c4c4c4c4, 0x3b3b3b3b3b3b3b3b, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox64
+ // result rd:x12(0x5100f4a5a55100f4), rs1:x20(0xc5c5c5c5c5c5c5c5), rs2:x5(0x3a3a3a3a3a3a3a3a)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0x5100f4a5a55100f4, 0xc5c5c5c5c5c5c5c5, 0x3a3a3a3a3a3a3a3a, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox64
+ // result rd:x13(0x3e1da281813e1da2), rs1:x19(0xc6c6c6c6c6c6c6c6), rs2:x4(0x3939393939393939)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0x3e1da281813e1da2, 0xc6c6c6c6c6c6c6c6, 0x3939393939393939, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox64
+ // result rd:x14(0xff71b83636ff71b8), rs1:x18(0xc7c7c7c7c7c7c7c7), rs2:x3(0x3838383838383838)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0xff71b83636ff71b8, 0xc7c7c7c7c7c7c7c7, 0x3838383838383838, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox64
+ // result rd:x15(0xb8bebbbdbdb8bebb), rs1:x17(0xc8c8c8c8c8c8c8c8), rs2:x2(0x3737373737373737)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0xb8bebbbdbdb8bebb, 0xc8c8c8c8c8c8c8c8, 0x3737373737373737, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox64
+ // result rd:x16(0x90fca6caca90fca6), rs1:x16(0xc9c9c9c9c9c9c9c9), rs2:x1(0x3636363636363636)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0x90fca6caca90fca6, 0xc9c9c9c9c9c9c9c9, 0x3636363636363636, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox64
+ // result rd:x17(0x59d090191959d090), rs1:x15(0xcacacacacacacaca), rs2:x31(0x3535353535353535)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0x59d090191959d090, 0xcacacacacacacaca, 0x3535353535353535, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox64
+ // result rd:x18(0x15f764868615f764), rs1:x14(0xcbcbcbcbcbcbcbcb), rs2:x30(0x3434343434343434)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0x15f764868615f764, 0xcbcbcbcbcbcbcbcb, 0x3434343434343434, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox64
+ // result rd:x19(0xfb79ba3838fb79ba), rs1:x13(0xcccccccccccccccc), rs2:x29(0x3333333333333333)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0xfb79ba3838fb79ba, 0xcccccccccccccccc, 0x3333333333333333, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox64
+ // result rd:x20(0x6725460404672546), rs1:x12(0xcdcdcdcdcdcdcdcd), rs2:x28(0x3232323232323232)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0x6725460404672546, 0xcdcdcdcdcdcdcdcd, 0x3232323232323232, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox64
+ // result rd:x21(0x940b56c9c9940b56), rs1:x11(0xcececececececece), rs2:x27(0x3131313131313131)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0x940b56c9c9940b56, 0xcececececececece, 0x3131313131313131, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox64
+ // result rd:x22(0xe14fb61818e14fb6), rs1:x10(0xcfcfcfcfcfcfcfcf), rs2:x26(0x3030303030303030)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0xe14fb61818e14fb6, 0xcfcfcfcfcfcfcfcf, 0x3030303030303030, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox64
+ // result rd:x23(0xaaf684d8d8aaf684), rs1:x9(0xd0d0d0d0d0d0d0d0), rs2:x25(0x2f2f2f2f2f2f2f2f)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0xaaf684d8d8aaf684, 0xd0d0d0d0d0d0d0d0, 0x2f2f2f2f2f2f2f2f, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox64
+ // result rd:x24(0x82bd102f2f82bd10), rs1:x8(0xd1d1d1d1d1d1d1d1), rs2:x24(0x2e2e2e2e2e2e2e2e)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0x82bd102f2f82bd10, 0xd1d1d1d1d1d1d1d1, 0x2e2e2e2e2e2e2e2e, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox64
+ // result rd:x25(0xc9d84c5d5dc9d84c), rs1:x7(0xd2d2d2d2d2d2d2d2), rs2:x23(0x2d2d2d2d2d2d2d2d)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0xc9d84c5d5dc9d84c, 0xd2d2d2d2d2d2d2d2, 0x2d2d2d2d2d2d2d2d, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox64
+ // result rd:x26(0x0ec3e528280ec3e5), rs1:x6(0xd3d3d3d3d3d3d3d3), rs2:x22(0x2c2c2c2c2c2c2c2c)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0x0ec3e528280ec3e5, 0xd3d3d3d3d3d3d3d3, 0x2c2c2c2c2c2c2c2c, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox64
+ // result rd:x27(0x6743755151674375), rs1:x5(0xd4d4d4d4d4d4d4d4), rs2:x21(0x2b2b2b2b2b2b2b2b)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0x6743755151674375, 0xd4d4d4d4d4d4d4d4, 0x2b2b2b2b2b2b2b2b, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox64
+ // result rd:x28(0x5515753535551575), rs1:x4(0xd5d5d5d5d5d5d5d5), rs2:x20(0x2a2a2a2a2a2a2a2a)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0x5515753535551575, 0xd5d5d5d5d5d5d5d5, 0x2a2a2a2a2a2a2a2a, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox64
+ // result rd:x29(0x58545e525258545e), rs1:x3(0xd6d6d6d6d6d6d6d6), rs2:x19(0x2929292929292929)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0x58545e525258545e, 0xd6d6d6d6d6d6d6d6, 0x2929292929292929, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox64
+ // result rd:x30(0x924f71acac924f71), rs1:x2(0xd7d7d7d7d7d7d7d7), rs2:x18(0x2828282828282828)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0x924f71acac924f71, 0xd7d7d7d7d7d7d7d7, 0x2828282828282828, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox64
+ // result rd:x31(0x5d7d4d6d6d5d7d4d), rs1:x1(0xd8d8d8d8d8d8d8d8), rs2:x17(0x2727272727272727)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0x5d7d4d6d6d5d7d4d, 0xd8d8d8d8d8d8d8d8, 0x2727272727272727, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox64
+ // result rd:x1(0x811647d0d0811647), rs1:x31(0xd9d9d9d9d9d9d9d9), rs2:x16(0x2626262626262626)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0x811647d0d0811647, 0xd9d9d9d9d9d9d9d9, 0x2626262626262626, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox64
+ // result rd:x2(0x7f14c7acac7f14c7), rs1:x30(0xdadadadadadadada), rs2:x15(0x2525252525252525)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x7f14c7acac7f14c7, 0xdadadadadadadada, 0x2525252525252525, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox64
+ // result rd:x3(0x3042097b7b304209), rs1:x29(0xdbdbdbdbdbdbdbdb), rs2:x14(0x2424242424242424)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0x3042097b7b304209, 0xdbdbdbdbdbdbdbdb, 0x2424242424242424, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox64
+ // result rd:x4(0xd980782121d98078), rs1:x28(0xdcdcdcdcdcdcdcdc), rs2:x13(0x2323232323232323)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0xd980782121d98078, 0xdcdcdcdcdcdcdcdc, 0x2323232323232323, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox64
+ // result rd:x5(0x41fb1ca6a641fb1c), rs1:x27(0xdddddddddddddddd), rs2:x12(0x2222222222222222)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0x41fb1ca6a641fb1c, 0xdddddddddddddddd, 0x2222222222222222, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox64
+ // result rd:x6(0x1fcaf82d2d1fcaf8), rs1:x26(0xdededededededede), rs2:x11(0x2121212121212121)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0x1fcaf82d2d1fcaf8, 0xdededededededede, 0x2121212121212121, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox64
+ // result rd:x7(0xe38e583535e38e58), rs1:x25(0xdfdfdfdfdfdfdfdf), rs2:x10(0x2020202020202020)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0xe38e583535e38e58, 0xdfdfdfdfdfdfdfdf, 0x2020202020202020, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox64
+ // result rd:x8(0xaa7cc11717aa7cc1), rs1:x24(0xe0e0e0e0e0e0e0e0), rs2:x9(0x1f1f1f1f1f1f1f1f)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0xaa7cc11717aa7cc1, 0xe0e0e0e0e0e0e0e0, 0x1f1f1f1f1f1f1f1f, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox64
+ // result rd:x9(0xdfcdd6c4c4dfcdd6), rs1:x23(0xe1e1e1e1e1e1e1e1), rs2:x8(0x1e1e1e1e1e1e1e1e)
+ TEST_RR_OP(aes64dsm, x9, x23, x8, 0xdfcdd6c4c4dfcdd6, 0xe1e1e1e1e1e1e1e1, 0x1e1e1e1e1e1e1e1e, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox64
+ // result rd:x10(0xb667538282b66753), rs1:x22(0xe2e2e2e2e2e2e2e2), rs2:x7(0x1d1d1d1d1d1d1d1d)
+ TEST_RR_OP(aes64dsm, x10, x22, x7, 0xb667538282b66753, 0xe2e2e2e2e2e2e2e2, 0x1d1d1d1d1d1d1d1d, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox64
+ // result rd:x11(0xdfd6565f5fdfd656), rs1:x21(0xe3e3e3e3e3e3e3e3), rs2:x6(0x1c1c1c1c1c1c1c1c)
+ TEST_RR_OP(aes64dsm, x11, x21, x6, 0xdfd6565f5fdfd656, 0xe3e3e3e3e3e3e3e3, 0x1c1c1c1c1c1c1c1c, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox64
+ // result rd:x12(0x0ec1e42b2b0ec1e4), rs1:x20(0xe4e4e4e4e4e4e4e4), rs2:x5(0x1b1b1b1b1b1b1b1b)
+ TEST_RR_OP(aes64dsm, x12, x20, x5, 0x0ec1e42b2b0ec1e4, 0xe4e4e4e4e4e4e4e4, 0x1b1b1b1b1b1b1b1b, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox64
+ // result rd:x13(0x2efc4795952efc47), rs1:x19(0xe5e5e5e5e5e5e5e5), rs2:x4(0x1a1a1a1a1a1a1a1a)
+ TEST_RR_OP(aes64dsm, x13, x19, x4, 0x2efc4795952efc47, 0xe5e5e5e5e5e5e5e5, 0x1a1a1a1a1a1a1a1a, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox64
+ // result rd:x14(0x8f79f402028f79f4), rs1:x18(0xe6e6e6e6e6e6e6e6), rs2:x3(0x1919191919191919)
+ TEST_RR_OP(aes64dsm, x14, x18, x3, 0x8f79f402028f79f4, 0xe6e6e6e6e6e6e6e6, 0x1919191919191919, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox64
+ // result rd:x15(0x0112859696011285), rs1:x17(0xe7e7e7e7e7e7e7e7), rs2:x2(0x1818181818181818)
+ TEST_RR_OP(aes64dsm, x15, x17, x2, 0x0112859696011285, 0xe7e7e7e7e7e7e7e7, 0x1818181818181818, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox64
+ // result rd:x16(0x3ea071efef3ea071), rs1:x16(0xe8e8e8e8e8e8e8e8), rs2:x1(0x1717171717171717)
+ TEST_RR_OP(aes64dsm, x16, x16, x1, 0x3ea071efef3ea071, 0xe8e8e8e8e8e8e8e8, 0x1717171717171717, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox64
+ // result rd:x17(0x87af93bbbb87af93), rs1:x15(0xe9e9e9e9e9e9e9e9), rs2:x31(0x1616161616161616)
+ TEST_RR_OP(aes64dsm, x17, x15, x31, 0x87af93bbbb87af93, 0xe9e9e9e9e9e9e9e9, 0x1616161616161616, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox64
+ // result rd:x18(0x7a49eedddd7a49ee), rs1:x14(0xeaeaeaeaeaeaeaea), rs2:x30(0x1515151515151515)
+ TEST_RR_OP(aes64dsm, x18, x14, x30, 0x7a49eedddd7a49ee, 0xeaeaeaeaeaeaeaea, 0x1515151515151515, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox64
+ // result rd:x19(0x6431c396966431c3), rs1:x13(0xebebebebebebebeb), rs2:x29(0x1414141414141414)
+ TEST_RR_OP(aes64dsm, x19, x13, x29, 0x6431c396966431c3, 0xebebebebebebebeb, 0x1414141414141414, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox64
+ // result rd:x20(0x8486858787848685), rs1:x12(0xecececececececec), rs2:x28(0x1313131313131313)
+ TEST_RR_OP(aes64dsm, x20, x12, x28, 0x8486858787848685, 0xecececececececec, 0x1313131313131313, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox64
+ // result rd:x21(0x5e8a34e0e05e8a34), rs1:x11(0xedededededededed), rs2:x27(0x1212121212121212)
+ TEST_RR_OP(aes64dsm, x21, x11, x27, 0x5e8a34e0e05e8a34, 0xedededededededed, 0x1212121212121212, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox64
+ // result rd:x22(0xe4109e6a6ae4109e), rs1:x10(0xeeeeeeeeeeeeeeee), rs2:x26(0x1111111111111111)
+ TEST_RR_OP(aes64dsm, x22, x10, x26, 0xe4109e6a6ae4109e, 0xeeeeeeeeeeeeeeee, 0x1111111111111111, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox64
+ // result rd:x23(0x32082f151532082f), rs1:x9(0xefefefefefefefef), rs2:x25(0x1010101010101010)
+ TEST_RR_OP(aes64dsm, x23, x9, x25, 0x32082f151532082f, 0xefefefefefefefef, 0x1010101010101010, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox64
+ // result rd:x24(0xa566498a8aa56649), rs1:x8(0xf0f0f0f0f0f0f0f0), rs2:x24(0x0f0f0f0f0f0f0f0f)
+ TEST_RR_OP(aes64dsm, x24, x8, x24, 0xa566498a8aa56649, 0xf0f0f0f0f0f0f0f0, 0xf0f0f0f0f0f0f0f, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox64
+ // result rd:x25(0xe90a15f6f6e90a15), rs1:x7(0xf1f1f1f1f1f1f1f1), rs2:x23(0x0e0e0e0e0e0e0e0e)
+ TEST_RR_OP(aes64dsm, x25, x7, x23, 0xe90a15f6f6e90a15, 0xf1f1f1f1f1f1f1f1, 0xe0e0e0e0e0e0e0e, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox64
+ // result rd:x26(0xf70200f5f5f70200), rs1:x6(0xf2f2f2f2f2f2f2f2), rs2:x22(0x0d0d0d0d0d0d0d0d)
+ TEST_RR_OP(aes64dsm, x26, x6, x22, 0xf70200f5f5f70200, 0xf2f2f2f2f2f2f2f2, 0xd0d0d0d0d0d0d0d, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox64
+ // result rd:x27(0xb5504aafafb5504a), rs1:x5(0xf3f3f3f3f3f3f3f3), rs2:x21(0x0c0c0c0c0c0c0c0c)
+ TEST_RR_OP(aes64dsm, x27, x5, x21, 0xb5504aafafb5504a, 0xf3f3f3f3f3f3f3f3, 0xc0c0c0c0c0c0c0c, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox64
+ // result rd:x28(0x460e622a2a460e62), rs1:x4(0xf4f4f4f4f4f4f4f4), rs2:x20(0x0b0b0b0b0b0b0b0b)
+ TEST_RR_OP(aes64dsm, x28, x4, x20, 0x460e622a2a460e62, 0xf4f4f4f4f4f4f4f4, 0xb0b0b0b0b0b0b0b, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox64
+ // result rd:x29(0x6ddeb90a0a6ddeb9), rs1:x3(0xf5f5f5f5f5f5f5f5), rs2:x19(0x0a0a0a0a0a0a0a0a)
+ TEST_RR_OP(aes64dsm, x29, x3, x19, 0x6ddeb90a0a6ddeb9, 0xf5f5f5f5f5f5f5f5, 0xa0a0a0a0a0a0a0a, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox64
+ // result rd:x30(0x192e8fb8b8192e8f), rs1:x2(0xf6f6f6f6f6f6f6f6), rs2:x18(0x0909090909090909)
+ TEST_RR_OP(aes64dsm, x30, x2, x18, 0x192e8fb8b8192e8f, 0xf6f6f6f6f6f6f6f6, 0x909090909090909, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox64
+ // result rd:x31(0xc4ed5d7474c4ed5d), rs1:x1(0xf7f7f7f7f7f7f7f7), rs2:x17(0x0808080808080808)
+ TEST_RR_OP(aes64dsm, x31, x1, x17, 0xc4ed5d7474c4ed5d, 0xf7f7f7f7f7f7f7f7, 0x808080808080808, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox64
+ // result rd:x1(0xd87101a8a8d87101), rs1:x31(0xf8f8f8f8f8f8f8f8), rs2:x16(0x0707070707070707)
+ TEST_RR_OP(aes64dsm, x1, x31, x16, 0xd87101a8a8d87101, 0xf8f8f8f8f8f8f8f8, 0x707070707070707, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox64
+ // result rd:x2(0x3bb8f774743bb8f7), rs1:x30(0xf9f9f9f9f9f9f9f9), rs2:x15(0x0606060606060606)
+ TEST_RR_OP(aes64dsm, x2, x30, x15, 0x3bb8f774743bb8f7, 0xf9f9f9f9f9f9f9f9, 0x606060606060606, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox64
+ // result rd:x3(0xfabed89c9cfabed8), rs1:x29(0xfafafafafafafafa), rs2:x14(0x0505050505050505)
+ TEST_RR_OP(aes64dsm, x3, x29, x14, 0xfabed89c9cfabed8, 0xfafafafafafafafa, 0x505050505050505, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox64
+ // result rd:x4(0xc167923434c16792), rs1:x28(0xfbfbfbfbfbfbfbfb), rs2:x13(0x0404040404040404)
+ TEST_RR_OP(aes64dsm, x4, x28, x13, 0xc167923434c16792, 0xfbfbfbfbfbfbfbfb, 0x404040404040404, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox64
+ // result rd:x5(0xf8e3786363f8e378), rs1:x27(0xfcfcfcfcfcfcfcfc), rs2:x12(0x0303030303030303)
+ TEST_RR_OP(aes64dsm, x5, x27, x12, 0xf8e3786363f8e378, 0xfcfcfcfcfcfcfcfc, 0x303030303030303, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox64
+ // result rd:x6(0xcb5d801616cb5d80), rs1:x26(0xfdfdfdfdfdfdfdfd), rs2:x11(0x0202020202020202)
+ TEST_RR_OP(aes64dsm, x6, x26, x11, 0xcb5d801616cb5d80, 0xfdfdfdfdfdfdfdfd, 0x202020202020202, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox64
+ // result rd:x7(0x171d121818171d12), rs1:x25(0xfefefefefefefefe), rs2:x10(0x0101010101010101)
+ TEST_RR_OP(aes64dsm, x7, x25, x10, 0x171d121818171d12, 0xfefefefefefefefe, 0x101010101010101, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox64
+ // result rd:x8(0xb0ee9fc1c1b0ee9f), rs1:x24(0xffffffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64dsm, x8, x24, x9, 0xb0ee9fc1c1b0ee9f, 0xffffffffffffffff, 0x0, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64ES-01.S b/riscof/suite/rv64i_m/K_unratified/AES64ES-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..4a1f4ee5b1827be819926efa5ff4089d218f68fe
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64ES-01.S
@@ -0,0 +1,1838 @@
+// RISC-V Architectural Validation Test AES64ES-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64es'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64es)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64es)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x95d24b559eaf272a), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x95d24b559eaf272a, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xb595ca98e6ff4a78), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0xb595ca98e6ff4a78, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xc242896b13dadbea), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0xc242896b13dadbea, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x52d30fad8f14a51f), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x52d30fad8f14a51f, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x5a7fca09207ea084), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0x5a7fca09207ea084, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x003a0020caa4ab79), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x003a0020caa4ab79, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xf883db4896dd152e), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0xf883db4896dd152e, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x5143c2d2ddf892ba), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0x5143c2d2ddf892ba, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x49a5aea27a168d39), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x49a5aea27a168d39, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xc954d11bca870726), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0xc954d11bca870726, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x631616631616637c), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x631616631616637c, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x63161663d2166377), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x63161663d2166377, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x63161663081663f2), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0x63161663081663f2, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x631616639e166330), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0x631616639e166330, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x63161663df1663ca), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0x63161663df1663ca, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x63161663681663b7), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x63161663681663b7, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x631616630f166309), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x631616630f166309, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x63161663541663cd), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x63161663541663cd, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x63161663bb166363), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0x63161663bb166363, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x63d2166316166363), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0x63d2166316166363, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x6308166316166363), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x6308166316166363, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x639e166316166363), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x639e166316166363, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x63df166316166363), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x63df166316166363, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x6368166316166363), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0x6368166316166363, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x630f166316166363), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0x630f166316166363, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x6354166316166363), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x6354166316166363, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x63bb166316166363), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0x63bb166316166363, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x6316166316166363), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0x6316166316166363, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x6316166316166363), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0x6316166316166363, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x6316166316166363), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0x6316166316166363, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x6316166316166363), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x6316166316166363, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x6316166316166363), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x6316166316166363, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x6316166316166363), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0x6316166316166363, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x6316166316166363), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0x6316166316166363, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x7c16166316166363), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x7c16166316166363, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x7716166316166363), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0x7716166316166363, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0xf216166316166363), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0xf216166316166363, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x3016166316166363), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0x3016166316166363, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0xca16166316166363), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0xca16166316166363, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0xb716166316166363), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0xb716166316166363, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0916166316166363), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x0916166316166363, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0xcd16166316166363), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0xcd16166316166363, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x6316167c16166363), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x6316167c16166363, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x6316167716166363), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0x6316167716166363, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x631616f216166363), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0x631616f216166363, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x6316163016166363), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0x6316163016166363, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x631616ca16166363), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x631616ca16166363, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x631616b716166363), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x631616b716166363, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x6316160916166363), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x6316160916166363, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x631616cd16166363), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0x631616cd16166363, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x6316166316167c63), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0x6316166316167c63, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x6316166316d27763), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x6316166316d27763, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x631616631608f263), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x631616631608f263, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x63161663169e3063), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x63161663169e3063, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x6316166316dfca63), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0x6316166316dfca63, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x631616631668b763), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0x631616631668b763, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x63161663160f0963), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x63161663160f0963, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x631616631654cd63), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0x631616631654cd63, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x6316166316bb6363), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0x6316166316bb6363, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x6316d26316166363), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0x6316d26316166363, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x6316086316166363), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0x6316086316166363, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x63169e6316166363), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x63169e6316166363, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x6316df6316166363), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x6316df6316166363, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x6316686316166363), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0x6316686316166363, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x63160f6316166363), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0x63160f6316166363, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x6316546316166363), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x6316546316166363, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x6316bb6316166363), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0x6316bb6316166363, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x6316166316166363), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x6316166316166363, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x6316166316166363), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0x6316166316166363, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x6316166316166363), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0x6316166316166363, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x6316166316166363), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x6316166316166363, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x6316166316166363), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x6316166316166363, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x6316166316166363), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x6316166316166363, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x6316166316166363), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x6316166316166363, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x6316166316166363), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0x6316166316166363, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x16636316636316bb), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0x16636316636316bb, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x16636316cd631654), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0x16636316cd631654, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x166363160963160f), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x166363160963160f, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x16636316b7631668), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x16636316b7631668, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x16636316ca6316df), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x16636316ca6316df, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x166363163063169e), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0x166363163063169e, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x16636316f2631608), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0x16636316f2631608, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x16636316776316d2), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x16636316776316d2, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x166363167c631616), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x166363167c631616, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x16cd631663631616), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x16cd631663631616, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x1609631663631616), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0x1609631663631616, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x16b7631663631616), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0x16b7631663631616, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x16ca631663631616), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x16ca631663631616, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x1630631663631616), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0x1630631663631616, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x16f2631663631616), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0x16f2631663631616, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x1677631663631616), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0x1677631663631616, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x167c631663631616), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0x167c631663631616, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x1663631663631616), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x1663631663631616, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x1663631663631616), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x1663631663631616, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x1663631663631616), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0x1663631663631616, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x1663631663631616), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0x1663631663631616, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x1663631663631616), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x1663631663631616, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x1663631663631616), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0x1663631663631616, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x1663631663631616), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x1663631663631616, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xbb63631663631616), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0xbb63631663631616, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x5463631663631616), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0x5463631663631616, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x0f63631663631616), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x0f63631663631616, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x6863631663631616), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x6863631663631616, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xdf63631663631616), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0xdf63631663631616, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x9e63631663631616), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x9e63631663631616, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x0863631663631616), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0x0863631663631616, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xd263631663631616), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0xd263631663631616, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x166363bb63631616), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0x166363bb63631616, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x1663635463631616), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x1663635463631616, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x1663630f63631616), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x1663630f63631616, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x1663636863631616), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x1663636863631616, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x166363df63631616), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0x166363df63631616, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x1663639e63631616), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0x1663639e63631616, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x1663630863631616), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x1663630863631616, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x166363d263631616), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x166363d263631616, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x166363166363bb16), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x166363166363bb16, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x1663631663cd5416), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0x1663631663cd5416, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x1663631663090f16), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0x1663631663090f16, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x1663631663b76816), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x1663631663b76816, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x1663631663cadf16), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0x1663631663cadf16, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x1663631663309e16), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0x1663631663309e16, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x1663631663f20816), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0x1663631663f20816, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x166363166377d216), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0x166363166377d216, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x16636316637c1616), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x16636316637c1616, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x1663cd1663631616), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x1663cd1663631616, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x1663091663631616), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0x1663091663631616, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x1663b71663631616), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0x1663b71663631616, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x1663ca1663631616), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x1663ca1663631616, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x1663301663631616), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0x1663301663631616, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x1663f21663631616), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x1663f21663631616, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x1663771663631616), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0x1663771663631616, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x16637c1663631616), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0x16637c1663631616, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x1663631663631616), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x1663631663631616, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x1663631663631616), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x1663631663631616, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x1663631663631616), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x1663631663631616, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x1663631663631616), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x1663631663631616, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x1663631663631616), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0x1663631663631616, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x1663631663631616), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0x1663631663631616, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x1663631663631616), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0x1663631663631616, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x1663631663631616), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x1663631663631616, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x636363636363637c), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x636363636363637c, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x6363636363636377), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x6363636363636377, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x63636363636363f2), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0x63636363636363f2, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x6363636363636330), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0x6363636363636330, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x63636363636363ca), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x63636363636363ca, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x63636363636363b7), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x63636363636363b7, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x6363636363636309), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x6363636363636309, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x63636363636363cd), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0x63636363636363cd, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x6363636363636363), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0x6363636363636363, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x6363636363636363), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x6363636363636363, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x6363636363636363), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0x6363636363636363, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x6363636363636363), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0x6363636363636363, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x6363636363636363), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0x6363636363636363, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x6363636363636363), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0x6363636363636363, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x6363636363636363), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x6363636363636363, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x6363636363636363), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x6363636363636363, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x6363636363636363), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0x6363636363636363, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x6363636363636363), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0x6363636363636363, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x6363636363636363), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x6363636363636363, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x6363636363636363), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0x6363636363636363, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x6363636363636363), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x6363636363636363, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x6363636363636363), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0x6363636363636363, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x6363636363636363), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0x6363636363636363, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x6363636363636363), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x6363636363636363, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x7c63636363636363), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x7c63636363636363, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x7763636363636363), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x7763636363636363, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0xf263636363636363), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0xf263636363636363, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x3063636363636363), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0x3063636363636363, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0xca63636363636363), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0xca63636363636363, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0xb763636363636363), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0xb763636363636363, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0963636363636363), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x0963636363636363, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0xcd63636363636363), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0xcd63636363636363, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x6363637c63636363), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x6363637c63636363, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x6363637763636363), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0x6363637763636363, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x636363f263636363), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0x636363f263636363, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x6363633063636363), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x6363633063636363, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x636363ca63636363), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x636363ca63636363, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x636363b763636363), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x636363b763636363, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x6363630963636363), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0x6363630963636363, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x636363cd63636363), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0x636363cd63636363, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x6363636363637c63), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x6363636363637c63, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x6363636363637763), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0x6363636363637763, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x636363636363f263), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0x636363636363f263, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x6363636363633063), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0x6363636363633063, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x636363636363ca63), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0x636363636363ca63, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x636363636363b763), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x636363636363b763, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x6363636363630963), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x6363636363630963, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x636363636363cd63), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0x636363636363cd63, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x6363636363636363), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0x6363636363636363, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x6363636363636363), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x6363636363636363, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x6363636363636363), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0x6363636363636363, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x6363636363636363), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x6363636363636363, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x6363636363636363), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0x6363636363636363, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x6363636363636363), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0x6363636363636363, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x6363636363636363), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x6363636363636363, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x6363636363636363), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x6363636363636363, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x6363636363636363), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x6363636363636363, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x6363636363636363), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x6363636363636363, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x6363636363636363), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0x6363636363636363, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x6363636363636363), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0x6363636363636363, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x6363636363636363), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0x6363636363636363, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x6363636363636363), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x6363636363636363, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x6363636363636363), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x6363636363636363, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x6363636363636363), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x6363636363636363, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x6363636363636363), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0x6363636363636363, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x16636316636316bb), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0x16636316636316bb, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x1663631663631654), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x1663631663631654, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x166363166363160f), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x166363166363160f, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x1663631663631668), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x1663631663631668, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x16636316636316df), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0x16636316636316df, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x166363166363169e), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0x166363166363169e, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x1663631663631608), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x1663631663631608, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x16636316636316d2), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0x16636316636316d2, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x1663631663631616), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0x1663631663631616, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x1663631663631616), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0x1663631663631616, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x1663631663631616), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0x1663631663631616, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x1663631663631616), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x1663631663631616, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x1663631663631616), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x1663631663631616, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x1663631663631616), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0x1663631663631616, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x1663631663631616), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0x1663631663631616, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x1663631663631616), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x1663631663631616, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x1663631663631616), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0x1663631663631616, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x1663631663631616), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x1663631663631616, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x1663631663631616), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0x1663631663631616, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x1663631663631616), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0x1663631663631616, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x1663631663631616), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x1663631663631616, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x1663631663631616), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x1663631663631616, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x1663631663631616), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x1663631663631616, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x1663631663631616), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x1663631663631616, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xbb63631663631616), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0xbb63631663631616, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x5463631663631616), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0x5463631663631616, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x0f63631663631616), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0x0f63631663631616, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x6863631663631616), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x6863631663631616, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xdf63631663631616), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0xdf63631663631616, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x9e63631663631616), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x9e63631663631616, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x0863631663631616), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0x0863631663631616, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xd263631663631616), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0xd263631663631616, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x166363bb63631616), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x166363bb63631616, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x1663635463631616), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x1663635463631616, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x1663630f63631616), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x1663630f63631616, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x1663636863631616), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0x1663636863631616, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x166363df63631616), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0x166363df63631616, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x1663639e63631616), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x1663639e63631616, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x1663630863631616), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0x1663630863631616, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x166363d263631616), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0x166363d263631616, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x166363166363bb16), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0x166363166363bb16, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x1663631663635416), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0x1663631663635416, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x1663631663630f16), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x1663631663630f16, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x1663631663636816), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x1663631663636816, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x166363166363df16), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0x166363166363df16, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x1663631663639e16), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0x1663631663639e16, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x1663631663630816), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x1663631663630816, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x166363166363d216), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0x166363166363d216, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x1663631663631616), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x1663631663631616, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x1663631663631616), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0x1663631663631616, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x1663631663631616), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0x1663631663631616, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x1663631663631616), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x1663631663631616, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x1663631663631616), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x1663631663631616, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x1663631663631616), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x1663631663631616, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x1663631663631616), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x1663631663631616, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x1663631663631616), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0x1663631663631616, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x1663631663631616), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0x1663631663631616, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x1663631663631616), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0x1663631663631616, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x1663631663631616), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x1663631663631616, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x1663631663631616), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x1663631663631616, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x1663631663631616), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x1663631663631616, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x1663631663631616), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0x1663631663631616, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x1663631663631616), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0x1663631663631616, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x1663631663631616), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x1663631663631616, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x1663631663631616), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x1663631663631616, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0xc9d24b1b9eaf0726), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(aes64es, x23, x25, x25, 0xc9d24b1b9eaf0726, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(aes64es, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xc263636b6363dbea), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(aes64es, x25, x7, x0, 0xc263636b6363dbea, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x63d30f638f146363), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(aes64es, x26, x0, x22, 0x63d30f638f146363, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64ES-02.S b/riscof/suite/rv64i_m/K_unratified/AES64ES-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..2c1a17312161a9af2b6a31c2a11cea2b882ef229
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64ES-02.S
@@ -0,0 +1,1728 @@
+// RISC-V Architectural Validation Test AES64ES-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64es'.
+// Using dataset: sbox64
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64es)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64es)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox64
+ // result rd:x1(0x6316166316166363), rs1:x31(0x0000000000000000), rs2:x16(0xffffffffffffffff)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x6316166316166363, 0x0, 0xffffffffffffffff, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox64
+ // result rd:x2(0x7cbbbb7cbbbb7c7c), rs1:x30(0x0101010101010101), rs2:x15(0xfefefefefefefefe)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0x7cbbbb7cbbbb7c7c, 0x101010101010101, 0xfefefefefefefefe, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox64
+ // result rd:x3(0x7754547754547777), rs1:x29(0x0202020202020202), rs2:x14(0xfdfdfdfdfdfdfdfd)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0x7754547754547777, 0x202020202020202, 0xfdfdfdfdfdfdfdfd, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox64
+ // result rd:x4(0x7bb0b07bb0b07b7b), rs1:x28(0x0303030303030303), rs2:x13(0xfcfcfcfcfcfcfcfc)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x7bb0b07bb0b07b7b, 0x303030303030303, 0xfcfcfcfcfcfcfcfc, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox64
+ // result rd:x5(0xf20f0ff20f0ff2f2), rs1:x27(0x0404040404040404), rs2:x12(0xfbfbfbfbfbfbfbfb)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0xf20f0ff20f0ff2f2, 0x404040404040404, 0xfbfbfbfbfbfbfbfb, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox64
+ // result rd:x6(0x6b2d2d6b2d2d6b6b), rs1:x26(0x0505050505050505), rs2:x11(0xfafafafafafafafa)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x6b2d2d6b2d2d6b6b, 0x505050505050505, 0xfafafafafafafafa, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox64
+ // result rd:x7(0x6f99996f99996f6f), rs1:x25(0x0606060606060606), rs2:x10(0xf9f9f9f9f9f9f9f9)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0x6f99996f99996f6f, 0x606060606060606, 0xf9f9f9f9f9f9f9f9, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox64
+ // result rd:x8(0xc54141c54141c5c5), rs1:x24(0x0707070707070707), rs2:x9(0xf8f8f8f8f8f8f8f8)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0xc54141c54141c5c5, 0x707070707070707, 0xf8f8f8f8f8f8f8f8, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox64
+ // result rd:x9(0x3068683068683030), rs1:x23(0x0808080808080808), rs2:x8(0xf7f7f7f7f7f7f7f7)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x3068683068683030, 0x808080808080808, 0xf7f7f7f7f7f7f7f7, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox64
+ // result rd:x10(0x0142420142420101), rs1:x22(0x0909090909090909), rs2:x7(0xf6f6f6f6f6f6f6f6)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x0142420142420101, 0x909090909090909, 0xf6f6f6f6f6f6f6f6, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox64
+ // result rd:x11(0x67e6e667e6e66767), rs1:x21(0x0a0a0a0a0a0a0a0a), rs2:x6(0xf5f5f5f5f5f5f5f5)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x67e6e667e6e66767, 0xa0a0a0a0a0a0a0a, 0xf5f5f5f5f5f5f5f5, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox64
+ // result rd:x12(0x2bbfbf2bbfbf2b2b), rs1:x20(0x0b0b0b0b0b0b0b0b), rs2:x5(0xf4f4f4f4f4f4f4f4)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x2bbfbf2bbfbf2b2b, 0xb0b0b0b0b0b0b0b, 0xf4f4f4f4f4f4f4f4, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox64
+ // result rd:x13(0xfe0d0dfe0d0dfefe), rs1:x19(0x0c0c0c0c0c0c0c0c), rs2:x4(0xf3f3f3f3f3f3f3f3)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0xfe0d0dfe0d0dfefe, 0xc0c0c0c0c0c0c0c, 0xf3f3f3f3f3f3f3f3, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox64
+ // result rd:x14(0xd78989d78989d7d7), rs1:x18(0x0d0d0d0d0d0d0d0d), rs2:x3(0xf2f2f2f2f2f2f2f2)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0xd78989d78989d7d7, 0xd0d0d0d0d0d0d0d, 0xf2f2f2f2f2f2f2f2, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox64
+ // result rd:x15(0xaba1a1aba1a1abab), rs1:x17(0x0e0e0e0e0e0e0e0e), rs2:x2(0xf1f1f1f1f1f1f1f1)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0xaba1a1aba1a1abab, 0xe0e0e0e0e0e0e0e, 0xf1f1f1f1f1f1f1f1, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox64
+ // result rd:x16(0x768c8c768c8c7676), rs1:x16(0x0f0f0f0f0f0f0f0f), rs2:x1(0xf0f0f0f0f0f0f0f0)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x768c8c768c8c7676, 0xf0f0f0f0f0f0f0f, 0xf0f0f0f0f0f0f0f0, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox64
+ // result rd:x17(0xcadfdfcadfdfcaca), rs1:x15(0x1010101010101010), rs2:x31(0xefefefefefefefef)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0xcadfdfcadfdfcaca, 0x1010101010101010, 0xefefefefefefefef, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox64
+ // result rd:x18(0x8228288228288282), rs1:x14(0x1111111111111111), rs2:x30(0xeeeeeeeeeeeeeeee)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x8228288228288282, 0x1111111111111111, 0xeeeeeeeeeeeeeeee, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox64
+ // result rd:x19(0xc95555c95555c9c9), rs1:x13(0x1212121212121212), rs2:x29(0xedededededededed)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0xc95555c95555c9c9, 0x1212121212121212, 0xedededededededed, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox64
+ // result rd:x20(0x7dcece7dcece7d7d), rs1:x12(0x1313131313131313), rs2:x28(0xecececececececec)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0x7dcece7dcece7d7d, 0x1313131313131313, 0xecececececececec, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox64
+ // result rd:x21(0xfae9e9fae9e9fafa), rs1:x11(0x1414141414141414), rs2:x27(0xebebebebebebebeb)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0xfae9e9fae9e9fafa, 0x1414141414141414, 0xebebebebebebebeb, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox64
+ // result rd:x22(0x5987875987875959), rs1:x10(0x1515151515151515), rs2:x26(0xeaeaeaeaeaeaeaea)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x5987875987875959, 0x1515151515151515, 0xeaeaeaeaeaeaeaea, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox64
+ // result rd:x23(0x471e1e471e1e4747), rs1:x9(0x1616161616161616), rs2:x25(0xe9e9e9e9e9e9e9e9)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x471e1e471e1e4747, 0x1616161616161616, 0xe9e9e9e9e9e9e9e9, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox64
+ // result rd:x24(0xf09b9bf09b9bf0f0), rs1:x8(0x1717171717171717), rs2:x24(0xe8e8e8e8e8e8e8e8)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0xf09b9bf09b9bf0f0, 0x1717171717171717, 0xe8e8e8e8e8e8e8e8, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox64
+ // result rd:x25(0xad9494ad9494adad), rs1:x7(0x1818181818181818), rs2:x23(0xe7e7e7e7e7e7e7e7)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0xad9494ad9494adad, 0x1818181818181818, 0xe7e7e7e7e7e7e7e7, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox64
+ // result rd:x26(0xd48e8ed48e8ed4d4), rs1:x6(0x1919191919191919), rs2:x22(0xe6e6e6e6e6e6e6e6)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0xd48e8ed48e8ed4d4, 0x1919191919191919, 0xe6e6e6e6e6e6e6e6, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox64
+ // result rd:x27(0xa2d9d9a2d9d9a2a2), rs1:x5(0x1a1a1a1a1a1a1a1a), rs2:x21(0xe5e5e5e5e5e5e5e5)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0xa2d9d9a2d9d9a2a2, 0x1a1a1a1a1a1a1a1a, 0xe5e5e5e5e5e5e5e5, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox64
+ // result rd:x28(0xaf6969af6969afaf), rs1:x4(0x1b1b1b1b1b1b1b1b), rs2:x20(0xe4e4e4e4e4e4e4e4)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0xaf6969af6969afaf, 0x1b1b1b1b1b1b1b1b, 0xe4e4e4e4e4e4e4e4, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox64
+ // result rd:x29(0x9c11119c11119c9c), rs1:x3(0x1c1c1c1c1c1c1c1c), rs2:x19(0xe3e3e3e3e3e3e3e3)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0x9c11119c11119c9c, 0x1c1c1c1c1c1c1c1c, 0xe3e3e3e3e3e3e3e3, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox64
+ // result rd:x30(0xa49898a49898a4a4), rs1:x2(0x1d1d1d1d1d1d1d1d), rs2:x18(0xe2e2e2e2e2e2e2e2)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0xa49898a49898a4a4, 0x1d1d1d1d1d1d1d1d, 0xe2e2e2e2e2e2e2e2, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox64
+ // result rd:x31(0x72f8f872f8f87272), rs1:x1(0x1e1e1e1e1e1e1e1e), rs2:x17(0xe1e1e1e1e1e1e1e1)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x72f8f872f8f87272, 0x1e1e1e1e1e1e1e1e, 0xe1e1e1e1e1e1e1e1, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox64
+ // result rd:x1(0xc0e1e1c0e1e1c0c0), rs1:x31(0x1f1f1f1f1f1f1f1f), rs2:x16(0xe0e0e0e0e0e0e0e0)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0xc0e1e1c0e1e1c0c0, 0x1f1f1f1f1f1f1f1f, 0xe0e0e0e0e0e0e0e0, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox64
+ // result rd:x2(0xb79e9eb79e9eb7b7), rs1:x30(0x2020202020202020), rs2:x15(0xdfdfdfdfdfdfdfdf)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0xb79e9eb79e9eb7b7, 0x2020202020202020, 0xdfdfdfdfdfdfdfdf, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox64
+ // result rd:x3(0xfd1d1dfd1d1dfdfd), rs1:x29(0x2121212121212121), rs2:x14(0xdededededededede)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0xfd1d1dfd1d1dfdfd, 0x2121212121212121, 0xdededededededede, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox64
+ // result rd:x4(0x93c1c193c1c19393), rs1:x28(0x2222222222222222), rs2:x13(0xdddddddddddddddd)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x93c1c193c1c19393, 0x2222222222222222, 0xdddddddddddddddd, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox64
+ // result rd:x5(0x2686862686862626), rs1:x27(0x2323232323232323), rs2:x12(0xdcdcdcdcdcdcdcdc)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0x2686862686862626, 0x2323232323232323, 0xdcdcdcdcdcdcdcdc, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox64
+ // result rd:x6(0x36b9b936b9b93636), rs1:x26(0x2424242424242424), rs2:x11(0xdbdbdbdbdbdbdbdb)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x36b9b936b9b93636, 0x2424242424242424, 0xdbdbdbdbdbdbdbdb, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox64
+ // result rd:x7(0x3f57573f57573f3f), rs1:x25(0x2525252525252525), rs2:x10(0xdadadadadadadada)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0x3f57573f57573f3f, 0x2525252525252525, 0xdadadadadadadada, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox64
+ // result rd:x8(0xf73535f73535f7f7), rs1:x24(0x2626262626262626), rs2:x9(0xd9d9d9d9d9d9d9d9)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0xf73535f73535f7f7, 0x2626262626262626, 0xd9d9d9d9d9d9d9d9, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox64
+ // result rd:x9(0xcc6161cc6161cccc), rs1:x23(0x2727272727272727), rs2:x8(0xd8d8d8d8d8d8d8d8)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0xcc6161cc6161cccc, 0x2727272727272727, 0xd8d8d8d8d8d8d8d8, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox64
+ // result rd:x10(0x340e0e340e0e3434), rs1:x22(0x2828282828282828), rs2:x7(0xd7d7d7d7d7d7d7d7)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x340e0e340e0e3434, 0x2828282828282828, 0xd7d7d7d7d7d7d7d7, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox64
+ // result rd:x11(0xa5f6f6a5f6f6a5a5), rs1:x21(0x2929292929292929), rs2:x6(0xd6d6d6d6d6d6d6d6)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0xa5f6f6a5f6f6a5a5, 0x2929292929292929, 0xd6d6d6d6d6d6d6d6, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox64
+ // result rd:x12(0xe50303e50303e5e5), rs1:x20(0x2a2a2a2a2a2a2a2a), rs2:x5(0xd5d5d5d5d5d5d5d5)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0xe50303e50303e5e5, 0x2a2a2a2a2a2a2a2a, 0xd5d5d5d5d5d5d5d5, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox64
+ // result rd:x13(0xf14848f14848f1f1), rs1:x19(0x2b2b2b2b2b2b2b2b), rs2:x4(0xd4d4d4d4d4d4d4d4)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0xf14848f14848f1f1, 0x2b2b2b2b2b2b2b2b, 0xd4d4d4d4d4d4d4d4, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox64
+ // result rd:x14(0x7166667166667171), rs1:x18(0x2c2c2c2c2c2c2c2c), rs2:x3(0xd3d3d3d3d3d3d3d3)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0x7166667166667171, 0x2c2c2c2c2c2c2c2c, 0xd3d3d3d3d3d3d3d3, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox64
+ // result rd:x15(0xd8b5b5d8b5b5d8d8), rs1:x17(0x2d2d2d2d2d2d2d2d), rs2:x2(0xd2d2d2d2d2d2d2d2)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0xd8b5b5d8b5b5d8d8, 0x2d2d2d2d2d2d2d2d, 0xd2d2d2d2d2d2d2d2, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox64
+ // result rd:x16(0x313e3e313e3e3131), rs1:x16(0x2e2e2e2e2e2e2e2e), rs2:x1(0xd1d1d1d1d1d1d1d1)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x313e3e313e3e3131, 0x2e2e2e2e2e2e2e2e, 0xd1d1d1d1d1d1d1d1, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox64
+ // result rd:x17(0x1570701570701515), rs1:x15(0x2f2f2f2f2f2f2f2f), rs2:x31(0xd0d0d0d0d0d0d0d0)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x1570701570701515, 0x2f2f2f2f2f2f2f2f, 0xd0d0d0d0d0d0d0d0, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox64
+ // result rd:x18(0x048a8a048a8a0404), rs1:x14(0x3030303030303030), rs2:x30(0xcfcfcfcfcfcfcfcf)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x048a8a048a8a0404, 0x3030303030303030, 0xcfcfcfcfcfcfcfcf, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox64
+ // result rd:x19(0xc78b8bc78b8bc7c7), rs1:x13(0x3131313131313131), rs2:x29(0xcececececececece)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0xc78b8bc78b8bc7c7, 0x3131313131313131, 0xcececececececece, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox64
+ // result rd:x20(0x23bdbd23bdbd2323), rs1:x12(0x3232323232323232), rs2:x28(0xcdcdcdcdcdcdcdcd)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0x23bdbd23bdbd2323, 0x3232323232323232, 0xcdcdcdcdcdcdcdcd, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox64
+ // result rd:x21(0xc34b4bc34b4bc3c3), rs1:x11(0x3333333333333333), rs2:x27(0xcccccccccccccccc)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0xc34b4bc34b4bc3c3, 0x3333333333333333, 0xcccccccccccccccc, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox64
+ // result rd:x22(0x181f1f181f1f1818), rs1:x10(0x3434343434343434), rs2:x26(0xcbcbcbcbcbcbcbcb)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x181f1f181f1f1818, 0x3434343434343434, 0xcbcbcbcbcbcbcbcb, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox64
+ // result rd:x23(0x9674749674749696), rs1:x9(0x3535353535353535), rs2:x25(0xcacacacacacacaca)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x9674749674749696, 0x3535353535353535, 0xcacacacacacacaca, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox64
+ // result rd:x24(0x05dddd05dddd0505), rs1:x8(0x3636363636363636), rs2:x24(0xc9c9c9c9c9c9c9c9)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0x05dddd05dddd0505, 0x3636363636363636, 0xc9c9c9c9c9c9c9c9, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox64
+ // result rd:x25(0x9ae8e89ae8e89a9a), rs1:x7(0x3737373737373737), rs2:x23(0xc8c8c8c8c8c8c8c8)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0x9ae8e89ae8e89a9a, 0x3737373737373737, 0xc8c8c8c8c8c8c8c8, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox64
+ // result rd:x26(0x07c6c607c6c60707), rs1:x6(0x3838383838383838), rs2:x22(0xc7c7c7c7c7c7c7c7)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x07c6c607c6c60707, 0x3838383838383838, 0xc7c7c7c7c7c7c7c7, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox64
+ // result rd:x27(0x12b4b412b4b41212), rs1:x5(0x3939393939393939), rs2:x21(0xc6c6c6c6c6c6c6c6)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0x12b4b412b4b41212, 0x3939393939393939, 0xc6c6c6c6c6c6c6c6, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox64
+ // result rd:x28(0x80a6a680a6a68080), rs1:x4(0x3a3a3a3a3a3a3a3a), rs2:x20(0xc5c5c5c5c5c5c5c5)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0x80a6a680a6a68080, 0x3a3a3a3a3a3a3a3a, 0xc5c5c5c5c5c5c5c5, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox64
+ // result rd:x29(0xe21c1ce21c1ce2e2), rs1:x3(0x3b3b3b3b3b3b3b3b), rs2:x19(0xc4c4c4c4c4c4c4c4)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0xe21c1ce21c1ce2e2, 0x3b3b3b3b3b3b3b3b, 0xc4c4c4c4c4c4c4c4, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox64
+ // result rd:x30(0xeb2e2eeb2e2eebeb), rs1:x2(0x3c3c3c3c3c3c3c3c), rs2:x18(0xc3c3c3c3c3c3c3c3)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0xeb2e2eeb2e2eebeb, 0x3c3c3c3c3c3c3c3c, 0xc3c3c3c3c3c3c3c3, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox64
+ // result rd:x31(0x2725252725252727), rs1:x1(0x3d3d3d3d3d3d3d3d), rs2:x17(0xc2c2c2c2c2c2c2c2)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x2725252725252727, 0x3d3d3d3d3d3d3d3d, 0xc2c2c2c2c2c2c2c2, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox64
+ // result rd:x1(0xb27878b27878b2b2), rs1:x31(0x3e3e3e3e3e3e3e3e), rs2:x16(0xc1c1c1c1c1c1c1c1)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0xb27878b27878b2b2, 0x3e3e3e3e3e3e3e3e, 0xc1c1c1c1c1c1c1c1, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox64
+ // result rd:x2(0x75baba75baba7575), rs1:x30(0x3f3f3f3f3f3f3f3f), rs2:x15(0xc0c0c0c0c0c0c0c0)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0x75baba75baba7575, 0x3f3f3f3f3f3f3f3f, 0xc0c0c0c0c0c0c0c0, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox64
+ // result rd:x3(0x0908080908080909), rs1:x29(0x4040404040404040), rs2:x14(0xbfbfbfbfbfbfbfbf)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0x0908080908080909, 0x4040404040404040, 0xbfbfbfbfbfbfbfbf, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox64
+ // result rd:x4(0x83aeae83aeae8383), rs1:x28(0x4141414141414141), rs2:x13(0xbebebebebebebebe)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x83aeae83aeae8383, 0x4141414141414141, 0xbebebebebebebebe, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox64
+ // result rd:x5(0x2c7a7a2c7a7a2c2c), rs1:x27(0x4242424242424242), rs2:x12(0xbdbdbdbdbdbdbdbd)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0x2c7a7a2c7a7a2c2c, 0x4242424242424242, 0xbdbdbdbdbdbdbdbd, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox64
+ // result rd:x6(0x1a65651a65651a1a), rs1:x26(0x4343434343434343), rs2:x11(0xbcbcbcbcbcbcbcbc)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x1a65651a65651a1a, 0x4343434343434343, 0xbcbcbcbcbcbcbcbc, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox64
+ // result rd:x7(0x1beaea1beaea1b1b), rs1:x25(0x4444444444444444), rs2:x10(0xbbbbbbbbbbbbbbbb)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0x1beaea1beaea1b1b, 0x4444444444444444, 0xbbbbbbbbbbbbbbbb, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox64
+ // result rd:x8(0x6ef4f46ef4f46e6e), rs1:x24(0x4545454545454545), rs2:x9(0xbabababababababa)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0x6ef4f46ef4f46e6e, 0x4545454545454545, 0xbabababababababa, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox64
+ // result rd:x9(0x5a56565a56565a5a), rs1:x23(0x4646464646464646), rs2:x8(0xb9b9b9b9b9b9b9b9)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x5a56565a56565a5a, 0x4646464646464646, 0xb9b9b9b9b9b9b9b9, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox64
+ // result rd:x10(0xa06c6ca06c6ca0a0), rs1:x22(0x4747474747474747), rs2:x7(0xb8b8b8b8b8b8b8b8)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0xa06c6ca06c6ca0a0, 0x4747474747474747, 0xb8b8b8b8b8b8b8b8, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox64
+ // result rd:x11(0x52a9a952a9a95252), rs1:x21(0x4848484848484848), rs2:x6(0xb7b7b7b7b7b7b7b7)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x52a9a952a9a95252, 0x4848484848484848, 0xb7b7b7b7b7b7b7b7, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox64
+ // result rd:x12(0x3b4e4e3b4e4e3b3b), rs1:x20(0x4949494949494949), rs2:x5(0xb6b6b6b6b6b6b6b6)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x3b4e4e3b4e4e3b3b, 0x4949494949494949, 0xb6b6b6b6b6b6b6b6, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox64
+ // result rd:x13(0xd6d5d5d6d5d5d6d6), rs1:x19(0x4a4a4a4a4a4a4a4a), rs2:x4(0xb5b5b5b5b5b5b5b5)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0xd6d5d5d6d5d5d6d6, 0x4a4a4a4a4a4a4a4a, 0xb5b5b5b5b5b5b5b5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox64
+ // result rd:x14(0xb38d8db38d8db3b3), rs1:x18(0x4b4b4b4b4b4b4b4b), rs2:x3(0xb4b4b4b4b4b4b4b4)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0xb38d8db38d8db3b3, 0x4b4b4b4b4b4b4b4b, 0xb4b4b4b4b4b4b4b4, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox64
+ // result rd:x15(0x296d6d296d6d2929), rs1:x17(0x4c4c4c4c4c4c4c4c), rs2:x2(0xb3b3b3b3b3b3b3b3)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0x296d6d296d6d2929, 0x4c4c4c4c4c4c4c4c, 0xb3b3b3b3b3b3b3b3, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox64
+ // result rd:x16(0xe33737e33737e3e3), rs1:x16(0x4d4d4d4d4d4d4d4d), rs2:x1(0xb2b2b2b2b2b2b2b2)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0xe33737e33737e3e3, 0x4d4d4d4d4d4d4d4d, 0xb2b2b2b2b2b2b2b2, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox64
+ // result rd:x17(0x2fc8c82fc8c82f2f), rs1:x15(0x4e4e4e4e4e4e4e4e), rs2:x31(0xb1b1b1b1b1b1b1b1)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x2fc8c82fc8c82f2f, 0x4e4e4e4e4e4e4e4e, 0xb1b1b1b1b1b1b1b1, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox64
+ // result rd:x18(0x84e7e784e7e78484), rs1:x14(0x4f4f4f4f4f4f4f4f), rs2:x30(0xb0b0b0b0b0b0b0b0)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x84e7e784e7e78484, 0x4f4f4f4f4f4f4f4f, 0xb0b0b0b0b0b0b0b0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox64
+ // result rd:x19(0x5379795379795353), rs1:x13(0x5050505050505050), rs2:x29(0xafafafafafafafaf)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0x5379795379795353, 0x5050505050505050, 0xafafafafafafafaf, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox64
+ // result rd:x20(0xd1e4e4d1e4e4d1d1), rs1:x12(0x5151515151515151), rs2:x28(0xaeaeaeaeaeaeaeae)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0xd1e4e4d1e4e4d1d1, 0x5151515151515151, 0xaeaeaeaeaeaeaeae, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox64
+ // result rd:x21(0x0095950095950000), rs1:x11(0x5252525252525252), rs2:x27(0xadadadadadadadad)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x0095950095950000, 0x5252525252525252, 0xadadadadadadadad, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox64
+ // result rd:x22(0xed9191ed9191eded), rs1:x10(0x5353535353535353), rs2:x26(0xacacacacacacacac)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0xed9191ed9191eded, 0x5353535353535353, 0xacacacacacacacac, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox64
+ // result rd:x23(0x2062622062622020), rs1:x9(0x5454545454545454), rs2:x25(0xabababababababab)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x2062622062622020, 0x5454545454545454, 0xabababababababab, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox64
+ // result rd:x24(0xfcacacfcacacfcfc), rs1:x8(0x5555555555555555), rs2:x24(0xaaaaaaaaaaaaaaaa)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0xfcacacfcacacfcfc, 0x5555555555555555, 0xaaaaaaaaaaaaaaaa, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox64
+ // result rd:x25(0xb1d3d3b1d3d3b1b1), rs1:x7(0x5656565656565656), rs2:x23(0xa9a9a9a9a9a9a9a9)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0xb1d3d3b1d3d3b1b1, 0x5656565656565656, 0xa9a9a9a9a9a9a9a9, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox64
+ // result rd:x26(0x5bc2c25bc2c25b5b), rs1:x6(0x5757575757575757), rs2:x22(0xa8a8a8a8a8a8a8a8)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x5bc2c25bc2c25b5b, 0x5757575757575757, 0xa8a8a8a8a8a8a8a8, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox64
+ // result rd:x27(0x6a5c5c6a5c5c6a6a), rs1:x5(0x5858585858585858), rs2:x21(0xa7a7a7a7a7a7a7a7)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0x6a5c5c6a5c5c6a6a, 0x5858585858585858, 0xa7a7a7a7a7a7a7a7, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox64
+ // result rd:x28(0xcb2424cb2424cbcb), rs1:x4(0x5959595959595959), rs2:x20(0xa6a6a6a6a6a6a6a6)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0xcb2424cb2424cbcb, 0x5959595959595959, 0xa6a6a6a6a6a6a6a6, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox64
+ // result rd:x29(0xbe0606be0606bebe), rs1:x3(0x5a5a5a5a5a5a5a5a), rs2:x19(0xa5a5a5a5a5a5a5a5)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0xbe0606be0606bebe, 0x5a5a5a5a5a5a5a5a, 0xa5a5a5a5a5a5a5a5, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox64
+ // result rd:x30(0x3949493949493939), rs1:x2(0x5b5b5b5b5b5b5b5b), rs2:x18(0xa4a4a4a4a4a4a4a4)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0x3949493949493939, 0x5b5b5b5b5b5b5b5b, 0xa4a4a4a4a4a4a4a4, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox64
+ // result rd:x31(0x4a0a0a4a0a0a4a4a), rs1:x1(0x5c5c5c5c5c5c5c5c), rs2:x17(0xa3a3a3a3a3a3a3a3)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x4a0a0a4a0a0a4a4a, 0x5c5c5c5c5c5c5c5c, 0xa3a3a3a3a3a3a3a3, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox64
+ // result rd:x1(0x4c3a3a4c3a3a4c4c), rs1:x31(0x5d5d5d5d5d5d5d5d), rs2:x16(0xa2a2a2a2a2a2a2a2)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x4c3a3a4c3a3a4c4c, 0x5d5d5d5d5d5d5d5d, 0xa2a2a2a2a2a2a2a2, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox64
+ // result rd:x2(0x5832325832325858), rs1:x30(0x5e5e5e5e5e5e5e5e), rs2:x15(0xa1a1a1a1a1a1a1a1)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0x5832325832325858, 0x5e5e5e5e5e5e5e5e, 0xa1a1a1a1a1a1a1a1, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox64
+ // result rd:x3(0xcfe0e0cfe0e0cfcf), rs1:x29(0x5f5f5f5f5f5f5f5f), rs2:x14(0xa0a0a0a0a0a0a0a0)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0xcfe0e0cfe0e0cfcf, 0x5f5f5f5f5f5f5f5f, 0xa0a0a0a0a0a0a0a0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox64
+ // result rd:x4(0xd0dbdbd0dbdbd0d0), rs1:x28(0x6060606060606060), rs2:x13(0x9f9f9f9f9f9f9f9f)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0xd0dbdbd0dbdbd0d0, 0x6060606060606060, 0x9f9f9f9f9f9f9f9f, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox64
+ // result rd:x5(0xef0b0bef0b0befef), rs1:x27(0x6161616161616161), rs2:x12(0x9e9e9e9e9e9e9e9e)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0xef0b0bef0b0befef, 0x6161616161616161, 0x9e9e9e9e9e9e9e9e, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox64
+ // result rd:x6(0xaa5e5eaa5e5eaaaa), rs1:x26(0x6262626262626262), rs2:x11(0x9d9d9d9d9d9d9d9d)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0xaa5e5eaa5e5eaaaa, 0x6262626262626262, 0x9d9d9d9d9d9d9d9d, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox64
+ // result rd:x7(0xfbdedefbdedefbfb), rs1:x25(0x6363636363636363), rs2:x10(0x9c9c9c9c9c9c9c9c)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0xfbdedefbdedefbfb, 0x6363636363636363, 0x9c9c9c9c9c9c9c9c, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox64
+ // result rd:x8(0x4314144314144343), rs1:x24(0x6464646464646464), rs2:x9(0x9b9b9b9b9b9b9b9b)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0x4314144314144343, 0x6464646464646464, 0x9b9b9b9b9b9b9b9b, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox64
+ // result rd:x9(0x4db8b84db8b84d4d), rs1:x23(0x6565656565656565), rs2:x8(0x9a9a9a9a9a9a9a9a)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x4db8b84db8b84d4d, 0x6565656565656565, 0x9a9a9a9a9a9a9a9a, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox64
+ // result rd:x10(0x33eeee33eeee3333), rs1:x22(0x6666666666666666), rs2:x7(0x9999999999999999)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x33eeee33eeee3333, 0x6666666666666666, 0x9999999999999999, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox64
+ // result rd:x11(0x8546468546468585), rs1:x21(0x6767676767676767), rs2:x6(0x9898989898989898)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x8546468546468585, 0x6767676767676767, 0x9898989898989898, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox64
+ // result rd:x12(0x4588884588884545), rs1:x20(0x6868686868686868), rs2:x5(0x9797979797979797)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x4588884588884545, 0x6868686868686868, 0x9797979797979797, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox64
+ // result rd:x13(0xf99090f99090f9f9), rs1:x19(0x6969696969696969), rs2:x4(0x9696969696969696)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0xf99090f99090f9f9, 0x6969696969696969, 0x9696969696969696, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox64
+ // result rd:x14(0x022a2a022a2a0202), rs1:x18(0x6a6a6a6a6a6a6a6a), rs2:x3(0x9595959595959595)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0x022a2a022a2a0202, 0x6a6a6a6a6a6a6a6a, 0x9595959595959595, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox64
+ // result rd:x15(0x7f22227f22227f7f), rs1:x17(0x6b6b6b6b6b6b6b6b), rs2:x2(0x9494949494949494)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0x7f22227f22227f7f, 0x6b6b6b6b6b6b6b6b, 0x9494949494949494, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox64
+ // result rd:x16(0x50dcdc50dcdc5050), rs1:x16(0x6c6c6c6c6c6c6c6c), rs2:x1(0x9393939393939393)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x50dcdc50dcdc5050, 0x6c6c6c6c6c6c6c6c, 0x9393939393939393, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox64
+ // result rd:x17(0x3c4f4f3c4f4f3c3c), rs1:x15(0x6d6d6d6d6d6d6d6d), rs2:x31(0x9292929292929292)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x3c4f4f3c4f4f3c3c, 0x6d6d6d6d6d6d6d6d, 0x9292929292929292, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox64
+ // result rd:x18(0x9f81819f81819f9f), rs1:x14(0x6e6e6e6e6e6e6e6e), rs2:x30(0x9191919191919191)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x9f81819f81819f9f, 0x6e6e6e6e6e6e6e6e, 0x9191919191919191, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox64
+ // result rd:x19(0xa86060a86060a8a8), rs1:x13(0x6f6f6f6f6f6f6f6f), rs2:x29(0x9090909090909090)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0xa86060a86060a8a8, 0x6f6f6f6f6f6f6f6f, 0x9090909090909090, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox64
+ // result rd:x20(0x5173735173735151), rs1:x12(0x7070707070707070), rs2:x28(0x8f8f8f8f8f8f8f8f)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0x5173735173735151, 0x7070707070707070, 0x8f8f8f8f8f8f8f8f, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox64
+ // result rd:x21(0xa31919a31919a3a3), rs1:x11(0x7171717171717171), rs2:x27(0x8e8e8e8e8e8e8e8e)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0xa31919a31919a3a3, 0x7171717171717171, 0x8e8e8e8e8e8e8e8e, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox64
+ // result rd:x22(0x405d5d405d5d4040), rs1:x10(0x7272727272727272), rs2:x26(0x8d8d8d8d8d8d8d8d)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x405d5d405d5d4040, 0x7272727272727272, 0x8d8d8d8d8d8d8d8d, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox64
+ // result rd:x23(0x8f64648f64648f8f), rs1:x9(0x7373737373737373), rs2:x25(0x8c8c8c8c8c8c8c8c)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x8f64648f64648f8f, 0x7373737373737373, 0x8c8c8c8c8c8c8c8c, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox64
+ // result rd:x24(0x923d3d923d3d9292), rs1:x8(0x7474747474747474), rs2:x24(0x8b8b8b8b8b8b8b8b)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0x923d3d923d3d9292, 0x7474747474747474, 0x8b8b8b8b8b8b8b8b, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox64
+ // result rd:x25(0x9d7e7e9d7e7e9d9d), rs1:x7(0x7575757575757575), rs2:x23(0x8a8a8a8a8a8a8a8a)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0x9d7e7e9d7e7e9d9d, 0x7575757575757575, 0x8a8a8a8a8a8a8a8a, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox64
+ // result rd:x26(0x38a7a738a7a73838), rs1:x6(0x7676767676767676), rs2:x22(0x8989898989898989)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x38a7a738a7a73838, 0x7676767676767676, 0x8989898989898989, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox64
+ // result rd:x27(0xf5c4c4f5c4c4f5f5), rs1:x5(0x7777777777777777), rs2:x21(0x8888888888888888)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0xf5c4c4f5c4c4f5f5, 0x7777777777777777, 0x8888888888888888, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox64
+ // result rd:x28(0xbc1717bc1717bcbc), rs1:x4(0x7878787878787878), rs2:x20(0x8787878787878787)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0xbc1717bc1717bcbc, 0x7878787878787878, 0x8787878787878787, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox64
+ // result rd:x29(0xb64444b64444b6b6), rs1:x3(0x7979797979797979), rs2:x19(0x8686868686868686)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0xb64444b64444b6b6, 0x7979797979797979, 0x8686868686868686, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox64
+ // result rd:x30(0xda9797da9797dada), rs1:x2(0x7a7a7a7a7a7a7a7a), rs2:x18(0x8585858585858585)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0xda9797da9797dada, 0x7a7a7a7a7a7a7a7a, 0x8585858585858585, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox64
+ // result rd:x31(0x215f5f215f5f2121), rs1:x1(0x7b7b7b7b7b7b7b7b), rs2:x17(0x8484848484848484)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x215f5f215f5f2121, 0x7b7b7b7b7b7b7b7b, 0x8484848484848484, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox64
+ // result rd:x1(0x10ecec10ecec1010), rs1:x31(0x7c7c7c7c7c7c7c7c), rs2:x16(0x8383838383838383)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x10ecec10ecec1010, 0x7c7c7c7c7c7c7c7c, 0x8383838383838383, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox64
+ // result rd:x2(0xff1313ff1313ffff), rs1:x30(0x7d7d7d7d7d7d7d7d), rs2:x15(0x8282828282828282)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0xff1313ff1313ffff, 0x7d7d7d7d7d7d7d7d, 0x8282828282828282, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox64
+ // result rd:x3(0xf30c0cf30c0cf3f3), rs1:x29(0x7e7e7e7e7e7e7e7e), rs2:x14(0x8181818181818181)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0xf30c0cf30c0cf3f3, 0x7e7e7e7e7e7e7e7e, 0x8181818181818181, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox64
+ // result rd:x4(0xd2cdcdd2cdcdd2d2), rs1:x28(0x7f7f7f7f7f7f7f7f), rs2:x13(0x8080808080808080)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0xd2cdcdd2cdcdd2d2, 0x7f7f7f7f7f7f7f7f, 0x8080808080808080, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox64
+ // result rd:x5(0xcdd2d2cdd2d2cdcd), rs1:x27(0x8080808080808080), rs2:x12(0x7f7f7f7f7f7f7f7f)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0xcdd2d2cdd2d2cdcd, 0x8080808080808080, 0x7f7f7f7f7f7f7f7f, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox64
+ // result rd:x6(0x0cf3f30cf3f30c0c), rs1:x26(0x8181818181818181), rs2:x11(0x7e7e7e7e7e7e7e7e)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x0cf3f30cf3f30c0c, 0x8181818181818181, 0x7e7e7e7e7e7e7e7e, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox64
+ // result rd:x7(0x13ffff13ffff1313), rs1:x25(0x8282828282828282), rs2:x10(0x7d7d7d7d7d7d7d7d)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0x13ffff13ffff1313, 0x8282828282828282, 0x7d7d7d7d7d7d7d7d, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox64
+ // result rd:x8(0xec1010ec1010ecec), rs1:x24(0x8383838383838383), rs2:x9(0x7c7c7c7c7c7c7c7c)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0xec1010ec1010ecec, 0x8383838383838383, 0x7c7c7c7c7c7c7c7c, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox64
+ // result rd:x9(0x5f21215f21215f5f), rs1:x23(0x8484848484848484), rs2:x8(0x7b7b7b7b7b7b7b7b)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x5f21215f21215f5f, 0x8484848484848484, 0x7b7b7b7b7b7b7b7b, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox64
+ // result rd:x10(0x97dada97dada9797), rs1:x22(0x8585858585858585), rs2:x7(0x7a7a7a7a7a7a7a7a)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x97dada97dada9797, 0x8585858585858585, 0x7a7a7a7a7a7a7a7a, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox64
+ // result rd:x11(0x44b6b644b6b64444), rs1:x21(0x8686868686868686), rs2:x6(0x7979797979797979)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x44b6b644b6b64444, 0x8686868686868686, 0x7979797979797979, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox64
+ // result rd:x12(0x17bcbc17bcbc1717), rs1:x20(0x8787878787878787), rs2:x5(0x7878787878787878)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x17bcbc17bcbc1717, 0x8787878787878787, 0x7878787878787878, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox64
+ // result rd:x13(0xc4f5f5c4f5f5c4c4), rs1:x19(0x8888888888888888), rs2:x4(0x7777777777777777)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0xc4f5f5c4f5f5c4c4, 0x8888888888888888, 0x7777777777777777, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox64
+ // result rd:x14(0xa73838a73838a7a7), rs1:x18(0x8989898989898989), rs2:x3(0x7676767676767676)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0xa73838a73838a7a7, 0x8989898989898989, 0x7676767676767676, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox64
+ // result rd:x15(0x7e9d9d7e9d9d7e7e), rs1:x17(0x8a8a8a8a8a8a8a8a), rs2:x2(0x7575757575757575)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0x7e9d9d7e9d9d7e7e, 0x8a8a8a8a8a8a8a8a, 0x7575757575757575, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox64
+ // result rd:x16(0x3d92923d92923d3d), rs1:x16(0x8b8b8b8b8b8b8b8b), rs2:x1(0x7474747474747474)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x3d92923d92923d3d, 0x8b8b8b8b8b8b8b8b, 0x7474747474747474, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox64
+ // result rd:x17(0x648f8f648f8f6464), rs1:x15(0x8c8c8c8c8c8c8c8c), rs2:x31(0x7373737373737373)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x648f8f648f8f6464, 0x8c8c8c8c8c8c8c8c, 0x7373737373737373, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox64
+ // result rd:x18(0x5d40405d40405d5d), rs1:x14(0x8d8d8d8d8d8d8d8d), rs2:x30(0x7272727272727272)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x5d40405d40405d5d, 0x8d8d8d8d8d8d8d8d, 0x7272727272727272, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox64
+ // result rd:x19(0x19a3a319a3a31919), rs1:x13(0x8e8e8e8e8e8e8e8e), rs2:x29(0x7171717171717171)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0x19a3a319a3a31919, 0x8e8e8e8e8e8e8e8e, 0x7171717171717171, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox64
+ // result rd:x20(0x7351517351517373), rs1:x12(0x8f8f8f8f8f8f8f8f), rs2:x28(0x7070707070707070)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0x7351517351517373, 0x8f8f8f8f8f8f8f8f, 0x7070707070707070, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox64
+ // result rd:x21(0x60a8a860a8a86060), rs1:x11(0x9090909090909090), rs2:x27(0x6f6f6f6f6f6f6f6f)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x60a8a860a8a86060, 0x9090909090909090, 0x6f6f6f6f6f6f6f6f, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox64
+ // result rd:x22(0x819f9f819f9f8181), rs1:x10(0x9191919191919191), rs2:x26(0x6e6e6e6e6e6e6e6e)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x819f9f819f9f8181, 0x9191919191919191, 0x6e6e6e6e6e6e6e6e, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox64
+ // result rd:x23(0x4f3c3c4f3c3c4f4f), rs1:x9(0x9292929292929292), rs2:x25(0x6d6d6d6d6d6d6d6d)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x4f3c3c4f3c3c4f4f, 0x9292929292929292, 0x6d6d6d6d6d6d6d6d, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox64
+ // result rd:x24(0xdc5050dc5050dcdc), rs1:x8(0x9393939393939393), rs2:x24(0x6c6c6c6c6c6c6c6c)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0xdc5050dc5050dcdc, 0x9393939393939393, 0x6c6c6c6c6c6c6c6c, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox64
+ // result rd:x25(0x227f7f227f7f2222), rs1:x7(0x9494949494949494), rs2:x23(0x6b6b6b6b6b6b6b6b)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0x227f7f227f7f2222, 0x9494949494949494, 0x6b6b6b6b6b6b6b6b, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox64
+ // result rd:x26(0x2a02022a02022a2a), rs1:x6(0x9595959595959595), rs2:x22(0x6a6a6a6a6a6a6a6a)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x2a02022a02022a2a, 0x9595959595959595, 0x6a6a6a6a6a6a6a6a, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox64
+ // result rd:x27(0x90f9f990f9f99090), rs1:x5(0x9696969696969696), rs2:x21(0x6969696969696969)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0x90f9f990f9f99090, 0x9696969696969696, 0x6969696969696969, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox64
+ // result rd:x28(0x8845458845458888), rs1:x4(0x9797979797979797), rs2:x20(0x6868686868686868)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0x8845458845458888, 0x9797979797979797, 0x6868686868686868, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox64
+ // result rd:x29(0x4685854685854646), rs1:x3(0x9898989898989898), rs2:x19(0x6767676767676767)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0x4685854685854646, 0x9898989898989898, 0x6767676767676767, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox64
+ // result rd:x30(0xee3333ee3333eeee), rs1:x2(0x9999999999999999), rs2:x18(0x6666666666666666)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0xee3333ee3333eeee, 0x9999999999999999, 0x6666666666666666, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox64
+ // result rd:x31(0xb84d4db84d4db8b8), rs1:x1(0x9a9a9a9a9a9a9a9a), rs2:x17(0x6565656565656565)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0xb84d4db84d4db8b8, 0x9a9a9a9a9a9a9a9a, 0x6565656565656565, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox64
+ // result rd:x1(0x1443431443431414), rs1:x31(0x9b9b9b9b9b9b9b9b), rs2:x16(0x6464646464646464)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x1443431443431414, 0x9b9b9b9b9b9b9b9b, 0x6464646464646464, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox64
+ // result rd:x2(0xdefbfbdefbfbdede), rs1:x30(0x9c9c9c9c9c9c9c9c), rs2:x15(0x6363636363636363)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0xdefbfbdefbfbdede, 0x9c9c9c9c9c9c9c9c, 0x6363636363636363, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox64
+ // result rd:x3(0x5eaaaa5eaaaa5e5e), rs1:x29(0x9d9d9d9d9d9d9d9d), rs2:x14(0x6262626262626262)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0x5eaaaa5eaaaa5e5e, 0x9d9d9d9d9d9d9d9d, 0x6262626262626262, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox64
+ // result rd:x4(0x0befef0befef0b0b), rs1:x28(0x9e9e9e9e9e9e9e9e), rs2:x13(0x6161616161616161)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x0befef0befef0b0b, 0x9e9e9e9e9e9e9e9e, 0x6161616161616161, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox64
+ // result rd:x5(0xdbd0d0dbd0d0dbdb), rs1:x27(0x9f9f9f9f9f9f9f9f), rs2:x12(0x6060606060606060)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0xdbd0d0dbd0d0dbdb, 0x9f9f9f9f9f9f9f9f, 0x6060606060606060, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox64
+ // result rd:x6(0xe0cfcfe0cfcfe0e0), rs1:x26(0xa0a0a0a0a0a0a0a0), rs2:x11(0x5f5f5f5f5f5f5f5f)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0xe0cfcfe0cfcfe0e0, 0xa0a0a0a0a0a0a0a0, 0x5f5f5f5f5f5f5f5f, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox64
+ // result rd:x7(0x3258583258583232), rs1:x25(0xa1a1a1a1a1a1a1a1), rs2:x10(0x5e5e5e5e5e5e5e5e)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0x3258583258583232, 0xa1a1a1a1a1a1a1a1, 0x5e5e5e5e5e5e5e5e, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox64
+ // result rd:x8(0x3a4c4c3a4c4c3a3a), rs1:x24(0xa2a2a2a2a2a2a2a2), rs2:x9(0x5d5d5d5d5d5d5d5d)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0x3a4c4c3a4c4c3a3a, 0xa2a2a2a2a2a2a2a2, 0x5d5d5d5d5d5d5d5d, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox64
+ // result rd:x9(0x0a4a4a0a4a4a0a0a), rs1:x23(0xa3a3a3a3a3a3a3a3), rs2:x8(0x5c5c5c5c5c5c5c5c)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x0a4a4a0a4a4a0a0a, 0xa3a3a3a3a3a3a3a3, 0x5c5c5c5c5c5c5c5c, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox64
+ // result rd:x10(0x4939394939394949), rs1:x22(0xa4a4a4a4a4a4a4a4), rs2:x7(0x5b5b5b5b5b5b5b5b)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x4939394939394949, 0xa4a4a4a4a4a4a4a4, 0x5b5b5b5b5b5b5b5b, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox64
+ // result rd:x11(0x06bebe06bebe0606), rs1:x21(0xa5a5a5a5a5a5a5a5), rs2:x6(0x5a5a5a5a5a5a5a5a)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x06bebe06bebe0606, 0xa5a5a5a5a5a5a5a5, 0x5a5a5a5a5a5a5a5a, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox64
+ // result rd:x12(0x24cbcb24cbcb2424), rs1:x20(0xa6a6a6a6a6a6a6a6), rs2:x5(0x5959595959595959)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x24cbcb24cbcb2424, 0xa6a6a6a6a6a6a6a6, 0x5959595959595959, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox64
+ // result rd:x13(0x5c6a6a5c6a6a5c5c), rs1:x19(0xa7a7a7a7a7a7a7a7), rs2:x4(0x5858585858585858)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0x5c6a6a5c6a6a5c5c, 0xa7a7a7a7a7a7a7a7, 0x5858585858585858, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox64
+ // result rd:x14(0xc25b5bc25b5bc2c2), rs1:x18(0xa8a8a8a8a8a8a8a8), rs2:x3(0x5757575757575757)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0xc25b5bc25b5bc2c2, 0xa8a8a8a8a8a8a8a8, 0x5757575757575757, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox64
+ // result rd:x15(0xd3b1b1d3b1b1d3d3), rs1:x17(0xa9a9a9a9a9a9a9a9), rs2:x2(0x5656565656565656)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0xd3b1b1d3b1b1d3d3, 0xa9a9a9a9a9a9a9a9, 0x5656565656565656, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox64
+ // result rd:x16(0xacfcfcacfcfcacac), rs1:x16(0xaaaaaaaaaaaaaaaa), rs2:x1(0x5555555555555555)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0xacfcfcacfcfcacac, 0xaaaaaaaaaaaaaaaa, 0x5555555555555555, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox64
+ // result rd:x17(0x6220206220206262), rs1:x15(0xabababababababab), rs2:x31(0x5454545454545454)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x6220206220206262, 0xabababababababab, 0x5454545454545454, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox64
+ // result rd:x18(0x91eded91eded9191), rs1:x14(0xacacacacacacacac), rs2:x30(0x5353535353535353)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x91eded91eded9191, 0xacacacacacacacac, 0x5353535353535353, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox64
+ // result rd:x19(0x9500009500009595), rs1:x13(0xadadadadadadadad), rs2:x29(0x5252525252525252)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0x9500009500009595, 0xadadadadadadadad, 0x5252525252525252, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox64
+ // result rd:x20(0xe4d1d1e4d1d1e4e4), rs1:x12(0xaeaeaeaeaeaeaeae), rs2:x28(0x5151515151515151)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0xe4d1d1e4d1d1e4e4, 0xaeaeaeaeaeaeaeae, 0x5151515151515151, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox64
+ // result rd:x21(0x7953537953537979), rs1:x11(0xafafafafafafafaf), rs2:x27(0x5050505050505050)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x7953537953537979, 0xafafafafafafafaf, 0x5050505050505050, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox64
+ // result rd:x22(0xe78484e78484e7e7), rs1:x10(0xb0b0b0b0b0b0b0b0), rs2:x26(0x4f4f4f4f4f4f4f4f)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0xe78484e78484e7e7, 0xb0b0b0b0b0b0b0b0, 0x4f4f4f4f4f4f4f4f, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox64
+ // result rd:x23(0xc82f2fc82f2fc8c8), rs1:x9(0xb1b1b1b1b1b1b1b1), rs2:x25(0x4e4e4e4e4e4e4e4e)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0xc82f2fc82f2fc8c8, 0xb1b1b1b1b1b1b1b1, 0x4e4e4e4e4e4e4e4e, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox64
+ // result rd:x24(0x37e3e337e3e33737), rs1:x8(0xb2b2b2b2b2b2b2b2), rs2:x24(0x4d4d4d4d4d4d4d4d)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0x37e3e337e3e33737, 0xb2b2b2b2b2b2b2b2, 0x4d4d4d4d4d4d4d4d, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox64
+ // result rd:x25(0x6d29296d29296d6d), rs1:x7(0xb3b3b3b3b3b3b3b3), rs2:x23(0x4c4c4c4c4c4c4c4c)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0x6d29296d29296d6d, 0xb3b3b3b3b3b3b3b3, 0x4c4c4c4c4c4c4c4c, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox64
+ // result rd:x26(0x8db3b38db3b38d8d), rs1:x6(0xb4b4b4b4b4b4b4b4), rs2:x22(0x4b4b4b4b4b4b4b4b)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x8db3b38db3b38d8d, 0xb4b4b4b4b4b4b4b4, 0x4b4b4b4b4b4b4b4b, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox64
+ // result rd:x27(0xd5d6d6d5d6d6d5d5), rs1:x5(0xb5b5b5b5b5b5b5b5), rs2:x21(0x4a4a4a4a4a4a4a4a)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0xd5d6d6d5d6d6d5d5, 0xb5b5b5b5b5b5b5b5, 0x4a4a4a4a4a4a4a4a, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox64
+ // result rd:x28(0x4e3b3b4e3b3b4e4e), rs1:x4(0xb6b6b6b6b6b6b6b6), rs2:x20(0x4949494949494949)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0x4e3b3b4e3b3b4e4e, 0xb6b6b6b6b6b6b6b6, 0x4949494949494949, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox64
+ // result rd:x29(0xa95252a95252a9a9), rs1:x3(0xb7b7b7b7b7b7b7b7), rs2:x19(0x4848484848484848)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0xa95252a95252a9a9, 0xb7b7b7b7b7b7b7b7, 0x4848484848484848, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox64
+ // result rd:x30(0x6ca0a06ca0a06c6c), rs1:x2(0xb8b8b8b8b8b8b8b8), rs2:x18(0x4747474747474747)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0x6ca0a06ca0a06c6c, 0xb8b8b8b8b8b8b8b8, 0x4747474747474747, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox64
+ // result rd:x31(0x565a5a565a5a5656), rs1:x1(0xb9b9b9b9b9b9b9b9), rs2:x17(0x4646464646464646)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x565a5a565a5a5656, 0xb9b9b9b9b9b9b9b9, 0x4646464646464646, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox64
+ // result rd:x1(0xf46e6ef46e6ef4f4), rs1:x31(0xbabababababababa), rs2:x16(0x4545454545454545)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0xf46e6ef46e6ef4f4, 0xbabababababababa, 0x4545454545454545, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox64
+ // result rd:x2(0xea1b1bea1b1beaea), rs1:x30(0xbbbbbbbbbbbbbbbb), rs2:x15(0x4444444444444444)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0xea1b1bea1b1beaea, 0xbbbbbbbbbbbbbbbb, 0x4444444444444444, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox64
+ // result rd:x3(0x651a1a651a1a6565), rs1:x29(0xbcbcbcbcbcbcbcbc), rs2:x14(0x4343434343434343)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0x651a1a651a1a6565, 0xbcbcbcbcbcbcbcbc, 0x4343434343434343, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox64
+ // result rd:x4(0x7a2c2c7a2c2c7a7a), rs1:x28(0xbdbdbdbdbdbdbdbd), rs2:x13(0x4242424242424242)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x7a2c2c7a2c2c7a7a, 0xbdbdbdbdbdbdbdbd, 0x4242424242424242, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox64
+ // result rd:x5(0xae8383ae8383aeae), rs1:x27(0xbebebebebebebebe), rs2:x12(0x4141414141414141)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0xae8383ae8383aeae, 0xbebebebebebebebe, 0x4141414141414141, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox64
+ // result rd:x6(0x0809090809090808), rs1:x26(0xbfbfbfbfbfbfbfbf), rs2:x11(0x4040404040404040)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x0809090809090808, 0xbfbfbfbfbfbfbfbf, 0x4040404040404040, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox64
+ // result rd:x7(0xba7575ba7575baba), rs1:x25(0xc0c0c0c0c0c0c0c0), rs2:x10(0x3f3f3f3f3f3f3f3f)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0xba7575ba7575baba, 0xc0c0c0c0c0c0c0c0, 0x3f3f3f3f3f3f3f3f, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox64
+ // result rd:x8(0x78b2b278b2b27878), rs1:x24(0xc1c1c1c1c1c1c1c1), rs2:x9(0x3e3e3e3e3e3e3e3e)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0x78b2b278b2b27878, 0xc1c1c1c1c1c1c1c1, 0x3e3e3e3e3e3e3e3e, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox64
+ // result rd:x9(0x2527272527272525), rs1:x23(0xc2c2c2c2c2c2c2c2), rs2:x8(0x3d3d3d3d3d3d3d3d)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0x2527272527272525, 0xc2c2c2c2c2c2c2c2, 0x3d3d3d3d3d3d3d3d, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox64
+ // result rd:x10(0x2eebeb2eebeb2e2e), rs1:x22(0xc3c3c3c3c3c3c3c3), rs2:x7(0x3c3c3c3c3c3c3c3c)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x2eebeb2eebeb2e2e, 0xc3c3c3c3c3c3c3c3, 0x3c3c3c3c3c3c3c3c, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox64
+ // result rd:x11(0x1ce2e21ce2e21c1c), rs1:x21(0xc4c4c4c4c4c4c4c4), rs2:x6(0x3b3b3b3b3b3b3b3b)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x1ce2e21ce2e21c1c, 0xc4c4c4c4c4c4c4c4, 0x3b3b3b3b3b3b3b3b, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox64
+ // result rd:x12(0xa68080a68080a6a6), rs1:x20(0xc5c5c5c5c5c5c5c5), rs2:x5(0x3a3a3a3a3a3a3a3a)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0xa68080a68080a6a6, 0xc5c5c5c5c5c5c5c5, 0x3a3a3a3a3a3a3a3a, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox64
+ // result rd:x13(0xb41212b41212b4b4), rs1:x19(0xc6c6c6c6c6c6c6c6), rs2:x4(0x3939393939393939)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0xb41212b41212b4b4, 0xc6c6c6c6c6c6c6c6, 0x3939393939393939, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox64
+ // result rd:x14(0xc60707c60707c6c6), rs1:x18(0xc7c7c7c7c7c7c7c7), rs2:x3(0x3838383838383838)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0xc60707c60707c6c6, 0xc7c7c7c7c7c7c7c7, 0x3838383838383838, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox64
+ // result rd:x15(0xe89a9ae89a9ae8e8), rs1:x17(0xc8c8c8c8c8c8c8c8), rs2:x2(0x3737373737373737)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0xe89a9ae89a9ae8e8, 0xc8c8c8c8c8c8c8c8, 0x3737373737373737, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox64
+ // result rd:x16(0xdd0505dd0505dddd), rs1:x16(0xc9c9c9c9c9c9c9c9), rs2:x1(0x3636363636363636)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0xdd0505dd0505dddd, 0xc9c9c9c9c9c9c9c9, 0x3636363636363636, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox64
+ // result rd:x17(0x7496967496967474), rs1:x15(0xcacacacacacacaca), rs2:x31(0x3535353535353535)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x7496967496967474, 0xcacacacacacacaca, 0x3535353535353535, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox64
+ // result rd:x18(0x1f18181f18181f1f), rs1:x14(0xcbcbcbcbcbcbcbcb), rs2:x30(0x3434343434343434)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x1f18181f18181f1f, 0xcbcbcbcbcbcbcbcb, 0x3434343434343434, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox64
+ // result rd:x19(0x4bc3c34bc3c34b4b), rs1:x13(0xcccccccccccccccc), rs2:x29(0x3333333333333333)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0x4bc3c34bc3c34b4b, 0xcccccccccccccccc, 0x3333333333333333, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox64
+ // result rd:x20(0xbd2323bd2323bdbd), rs1:x12(0xcdcdcdcdcdcdcdcd), rs2:x28(0x3232323232323232)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0xbd2323bd2323bdbd, 0xcdcdcdcdcdcdcdcd, 0x3232323232323232, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox64
+ // result rd:x21(0x8bc7c78bc7c78b8b), rs1:x11(0xcececececececece), rs2:x27(0x3131313131313131)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x8bc7c78bc7c78b8b, 0xcececececececece, 0x3131313131313131, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox64
+ // result rd:x22(0x8a04048a04048a8a), rs1:x10(0xcfcfcfcfcfcfcfcf), rs2:x26(0x3030303030303030)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x8a04048a04048a8a, 0xcfcfcfcfcfcfcfcf, 0x3030303030303030, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox64
+ // result rd:x23(0x7015157015157070), rs1:x9(0xd0d0d0d0d0d0d0d0), rs2:x25(0x2f2f2f2f2f2f2f2f)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0x7015157015157070, 0xd0d0d0d0d0d0d0d0, 0x2f2f2f2f2f2f2f2f, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox64
+ // result rd:x24(0x3e31313e31313e3e), rs1:x8(0xd1d1d1d1d1d1d1d1), rs2:x24(0x2e2e2e2e2e2e2e2e)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0x3e31313e31313e3e, 0xd1d1d1d1d1d1d1d1, 0x2e2e2e2e2e2e2e2e, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox64
+ // result rd:x25(0xb5d8d8b5d8d8b5b5), rs1:x7(0xd2d2d2d2d2d2d2d2), rs2:x23(0x2d2d2d2d2d2d2d2d)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0xb5d8d8b5d8d8b5b5, 0xd2d2d2d2d2d2d2d2, 0x2d2d2d2d2d2d2d2d, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox64
+ // result rd:x26(0x6671716671716666), rs1:x6(0xd3d3d3d3d3d3d3d3), rs2:x22(0x2c2c2c2c2c2c2c2c)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x6671716671716666, 0xd3d3d3d3d3d3d3d3, 0x2c2c2c2c2c2c2c2c, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox64
+ // result rd:x27(0x48f1f148f1f14848), rs1:x5(0xd4d4d4d4d4d4d4d4), rs2:x21(0x2b2b2b2b2b2b2b2b)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0x48f1f148f1f14848, 0xd4d4d4d4d4d4d4d4, 0x2b2b2b2b2b2b2b2b, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox64
+ // result rd:x28(0x03e5e503e5e50303), rs1:x4(0xd5d5d5d5d5d5d5d5), rs2:x20(0x2a2a2a2a2a2a2a2a)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0x03e5e503e5e50303, 0xd5d5d5d5d5d5d5d5, 0x2a2a2a2a2a2a2a2a, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox64
+ // result rd:x29(0xf6a5a5f6a5a5f6f6), rs1:x3(0xd6d6d6d6d6d6d6d6), rs2:x19(0x2929292929292929)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0xf6a5a5f6a5a5f6f6, 0xd6d6d6d6d6d6d6d6, 0x2929292929292929, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox64
+ // result rd:x30(0x0e34340e34340e0e), rs1:x2(0xd7d7d7d7d7d7d7d7), rs2:x18(0x2828282828282828)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0x0e34340e34340e0e, 0xd7d7d7d7d7d7d7d7, 0x2828282828282828, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox64
+ // result rd:x31(0x61cccc61cccc6161), rs1:x1(0xd8d8d8d8d8d8d8d8), rs2:x17(0x2727272727272727)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x61cccc61cccc6161, 0xd8d8d8d8d8d8d8d8, 0x2727272727272727, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox64
+ // result rd:x1(0x35f7f735f7f73535), rs1:x31(0xd9d9d9d9d9d9d9d9), rs2:x16(0x2626262626262626)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x35f7f735f7f73535, 0xd9d9d9d9d9d9d9d9, 0x2626262626262626, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox64
+ // result rd:x2(0x573f3f573f3f5757), rs1:x30(0xdadadadadadadada), rs2:x15(0x2525252525252525)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0x573f3f573f3f5757, 0xdadadadadadadada, 0x2525252525252525, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox64
+ // result rd:x3(0xb93636b93636b9b9), rs1:x29(0xdbdbdbdbdbdbdbdb), rs2:x14(0x2424242424242424)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0xb93636b93636b9b9, 0xdbdbdbdbdbdbdbdb, 0x2424242424242424, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox64
+ // result rd:x4(0x8626268626268686), rs1:x28(0xdcdcdcdcdcdcdcdc), rs2:x13(0x2323232323232323)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x8626268626268686, 0xdcdcdcdcdcdcdcdc, 0x2323232323232323, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox64
+ // result rd:x5(0xc19393c19393c1c1), rs1:x27(0xdddddddddddddddd), rs2:x12(0x2222222222222222)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0xc19393c19393c1c1, 0xdddddddddddddddd, 0x2222222222222222, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox64
+ // result rd:x6(0x1dfdfd1dfdfd1d1d), rs1:x26(0xdededededededede), rs2:x11(0x2121212121212121)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x1dfdfd1dfdfd1d1d, 0xdededededededede, 0x2121212121212121, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox64
+ // result rd:x7(0x9eb7b79eb7b79e9e), rs1:x25(0xdfdfdfdfdfdfdfdf), rs2:x10(0x2020202020202020)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0x9eb7b79eb7b79e9e, 0xdfdfdfdfdfdfdfdf, 0x2020202020202020, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox64
+ // result rd:x8(0xe1c0c0e1c0c0e1e1), rs1:x24(0xe0e0e0e0e0e0e0e0), rs2:x9(0x1f1f1f1f1f1f1f1f)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0xe1c0c0e1c0c0e1e1, 0xe0e0e0e0e0e0e0e0, 0x1f1f1f1f1f1f1f1f, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox64
+ // result rd:x9(0xf87272f87272f8f8), rs1:x23(0xe1e1e1e1e1e1e1e1), rs2:x8(0x1e1e1e1e1e1e1e1e)
+ TEST_RR_OP(aes64es, x9, x23, x8, 0xf87272f87272f8f8, 0xe1e1e1e1e1e1e1e1, 0x1e1e1e1e1e1e1e1e, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox64
+ // result rd:x10(0x98a4a498a4a49898), rs1:x22(0xe2e2e2e2e2e2e2e2), rs2:x7(0x1d1d1d1d1d1d1d1d)
+ TEST_RR_OP(aes64es, x10, x22, x7, 0x98a4a498a4a49898, 0xe2e2e2e2e2e2e2e2, 0x1d1d1d1d1d1d1d1d, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox64
+ // result rd:x11(0x119c9c119c9c1111), rs1:x21(0xe3e3e3e3e3e3e3e3), rs2:x6(0x1c1c1c1c1c1c1c1c)
+ TEST_RR_OP(aes64es, x11, x21, x6, 0x119c9c119c9c1111, 0xe3e3e3e3e3e3e3e3, 0x1c1c1c1c1c1c1c1c, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox64
+ // result rd:x12(0x69afaf69afaf6969), rs1:x20(0xe4e4e4e4e4e4e4e4), rs2:x5(0x1b1b1b1b1b1b1b1b)
+ TEST_RR_OP(aes64es, x12, x20, x5, 0x69afaf69afaf6969, 0xe4e4e4e4e4e4e4e4, 0x1b1b1b1b1b1b1b1b, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox64
+ // result rd:x13(0xd9a2a2d9a2a2d9d9), rs1:x19(0xe5e5e5e5e5e5e5e5), rs2:x4(0x1a1a1a1a1a1a1a1a)
+ TEST_RR_OP(aes64es, x13, x19, x4, 0xd9a2a2d9a2a2d9d9, 0xe5e5e5e5e5e5e5e5, 0x1a1a1a1a1a1a1a1a, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox64
+ // result rd:x14(0x8ed4d48ed4d48e8e), rs1:x18(0xe6e6e6e6e6e6e6e6), rs2:x3(0x1919191919191919)
+ TEST_RR_OP(aes64es, x14, x18, x3, 0x8ed4d48ed4d48e8e, 0xe6e6e6e6e6e6e6e6, 0x1919191919191919, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox64
+ // result rd:x15(0x94adad94adad9494), rs1:x17(0xe7e7e7e7e7e7e7e7), rs2:x2(0x1818181818181818)
+ TEST_RR_OP(aes64es, x15, x17, x2, 0x94adad94adad9494, 0xe7e7e7e7e7e7e7e7, 0x1818181818181818, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox64
+ // result rd:x16(0x9bf0f09bf0f09b9b), rs1:x16(0xe8e8e8e8e8e8e8e8), rs2:x1(0x1717171717171717)
+ TEST_RR_OP(aes64es, x16, x16, x1, 0x9bf0f09bf0f09b9b, 0xe8e8e8e8e8e8e8e8, 0x1717171717171717, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox64
+ // result rd:x17(0x1e47471e47471e1e), rs1:x15(0xe9e9e9e9e9e9e9e9), rs2:x31(0x1616161616161616)
+ TEST_RR_OP(aes64es, x17, x15, x31, 0x1e47471e47471e1e, 0xe9e9e9e9e9e9e9e9, 0x1616161616161616, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox64
+ // result rd:x18(0x8759598759598787), rs1:x14(0xeaeaeaeaeaeaeaea), rs2:x30(0x1515151515151515)
+ TEST_RR_OP(aes64es, x18, x14, x30, 0x8759598759598787, 0xeaeaeaeaeaeaeaea, 0x1515151515151515, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox64
+ // result rd:x19(0xe9fafae9fafae9e9), rs1:x13(0xebebebebebebebeb), rs2:x29(0x1414141414141414)
+ TEST_RR_OP(aes64es, x19, x13, x29, 0xe9fafae9fafae9e9, 0xebebebebebebebeb, 0x1414141414141414, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox64
+ // result rd:x20(0xce7d7dce7d7dcece), rs1:x12(0xecececececececec), rs2:x28(0x1313131313131313)
+ TEST_RR_OP(aes64es, x20, x12, x28, 0xce7d7dce7d7dcece, 0xecececececececec, 0x1313131313131313, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox64
+ // result rd:x21(0x55c9c955c9c95555), rs1:x11(0xedededededededed), rs2:x27(0x1212121212121212)
+ TEST_RR_OP(aes64es, x21, x11, x27, 0x55c9c955c9c95555, 0xedededededededed, 0x1212121212121212, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox64
+ // result rd:x22(0x2882822882822828), rs1:x10(0xeeeeeeeeeeeeeeee), rs2:x26(0x1111111111111111)
+ TEST_RR_OP(aes64es, x22, x10, x26, 0x2882822882822828, 0xeeeeeeeeeeeeeeee, 0x1111111111111111, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox64
+ // result rd:x23(0xdfcacadfcacadfdf), rs1:x9(0xefefefefefefefef), rs2:x25(0x1010101010101010)
+ TEST_RR_OP(aes64es, x23, x9, x25, 0xdfcacadfcacadfdf, 0xefefefefefefefef, 0x1010101010101010, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox64
+ // result rd:x24(0x8c76768c76768c8c), rs1:x8(0xf0f0f0f0f0f0f0f0), rs2:x24(0x0f0f0f0f0f0f0f0f)
+ TEST_RR_OP(aes64es, x24, x8, x24, 0x8c76768c76768c8c, 0xf0f0f0f0f0f0f0f0, 0xf0f0f0f0f0f0f0f, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox64
+ // result rd:x25(0xa1ababa1ababa1a1), rs1:x7(0xf1f1f1f1f1f1f1f1), rs2:x23(0x0e0e0e0e0e0e0e0e)
+ TEST_RR_OP(aes64es, x25, x7, x23, 0xa1ababa1ababa1a1, 0xf1f1f1f1f1f1f1f1, 0xe0e0e0e0e0e0e0e, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox64
+ // result rd:x26(0x89d7d789d7d78989), rs1:x6(0xf2f2f2f2f2f2f2f2), rs2:x22(0x0d0d0d0d0d0d0d0d)
+ TEST_RR_OP(aes64es, x26, x6, x22, 0x89d7d789d7d78989, 0xf2f2f2f2f2f2f2f2, 0xd0d0d0d0d0d0d0d, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox64
+ // result rd:x27(0x0dfefe0dfefe0d0d), rs1:x5(0xf3f3f3f3f3f3f3f3), rs2:x21(0x0c0c0c0c0c0c0c0c)
+ TEST_RR_OP(aes64es, x27, x5, x21, 0x0dfefe0dfefe0d0d, 0xf3f3f3f3f3f3f3f3, 0xc0c0c0c0c0c0c0c, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox64
+ // result rd:x28(0xbf2b2bbf2b2bbfbf), rs1:x4(0xf4f4f4f4f4f4f4f4), rs2:x20(0x0b0b0b0b0b0b0b0b)
+ TEST_RR_OP(aes64es, x28, x4, x20, 0xbf2b2bbf2b2bbfbf, 0xf4f4f4f4f4f4f4f4, 0xb0b0b0b0b0b0b0b, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox64
+ // result rd:x29(0xe66767e66767e6e6), rs1:x3(0xf5f5f5f5f5f5f5f5), rs2:x19(0x0a0a0a0a0a0a0a0a)
+ TEST_RR_OP(aes64es, x29, x3, x19, 0xe66767e66767e6e6, 0xf5f5f5f5f5f5f5f5, 0xa0a0a0a0a0a0a0a, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox64
+ // result rd:x30(0x4201014201014242), rs1:x2(0xf6f6f6f6f6f6f6f6), rs2:x18(0x0909090909090909)
+ TEST_RR_OP(aes64es, x30, x2, x18, 0x4201014201014242, 0xf6f6f6f6f6f6f6f6, 0x909090909090909, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox64
+ // result rd:x31(0x6830306830306868), rs1:x1(0xf7f7f7f7f7f7f7f7), rs2:x17(0x0808080808080808)
+ TEST_RR_OP(aes64es, x31, x1, x17, 0x6830306830306868, 0xf7f7f7f7f7f7f7f7, 0x808080808080808, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox64
+ // result rd:x1(0x41c5c541c5c54141), rs1:x31(0xf8f8f8f8f8f8f8f8), rs2:x16(0x0707070707070707)
+ TEST_RR_OP(aes64es, x1, x31, x16, 0x41c5c541c5c54141, 0xf8f8f8f8f8f8f8f8, 0x707070707070707, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox64
+ // result rd:x2(0x996f6f996f6f9999), rs1:x30(0xf9f9f9f9f9f9f9f9), rs2:x15(0x0606060606060606)
+ TEST_RR_OP(aes64es, x2, x30, x15, 0x996f6f996f6f9999, 0xf9f9f9f9f9f9f9f9, 0x606060606060606, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox64
+ // result rd:x3(0x2d6b6b2d6b6b2d2d), rs1:x29(0xfafafafafafafafa), rs2:x14(0x0505050505050505)
+ TEST_RR_OP(aes64es, x3, x29, x14, 0x2d6b6b2d6b6b2d2d, 0xfafafafafafafafa, 0x505050505050505, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox64
+ // result rd:x4(0x0ff2f20ff2f20f0f), rs1:x28(0xfbfbfbfbfbfbfbfb), rs2:x13(0x0404040404040404)
+ TEST_RR_OP(aes64es, x4, x28, x13, 0x0ff2f20ff2f20f0f, 0xfbfbfbfbfbfbfbfb, 0x404040404040404, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox64
+ // result rd:x5(0xb07b7bb07b7bb0b0), rs1:x27(0xfcfcfcfcfcfcfcfc), rs2:x12(0x0303030303030303)
+ TEST_RR_OP(aes64es, x5, x27, x12, 0xb07b7bb07b7bb0b0, 0xfcfcfcfcfcfcfcfc, 0x303030303030303, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox64
+ // result rd:x6(0x5477775477775454), rs1:x26(0xfdfdfdfdfdfdfdfd), rs2:x11(0x0202020202020202)
+ TEST_RR_OP(aes64es, x6, x26, x11, 0x5477775477775454, 0xfdfdfdfdfdfdfdfd, 0x202020202020202, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox64
+ // result rd:x7(0xbb7c7cbb7c7cbbbb), rs1:x25(0xfefefefefefefefe), rs2:x10(0x0101010101010101)
+ TEST_RR_OP(aes64es, x7, x25, x10, 0xbb7c7cbb7c7cbbbb, 0xfefefefefefefefe, 0x101010101010101, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox64
+ // result rd:x8(0x1663631663631616), rs1:x24(0xffffffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64es, x8, x24, x9, 0x1663631663631616, 0xffffffffffffffff, 0x0, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64ESM-01.S b/riscof/suite/rv64i_m/K_unratified/AES64ESM-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..fac9b50a5f65fc36b42cd9486af38a97fb507842
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64ESM-01.S
@@ -0,0 +1,1838 @@
+// RISC-V Architectural Validation Test AES64ESM-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64esm'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64esm)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64esm)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x57053b30d1f1100c), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0x57053b30d1f1100c, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x9da7064eeae61037), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x9da7064eeae61037, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xe93b66d602ab2170), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0xe93b66d602ab2170, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x94e98fd19518fd51), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x94e98fd19518fd51, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x1ad35d7209b87db6), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0x1ad35d7209b87db6, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x5a546e7a0bc4097a), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x5a546e7a0bc4097a, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x6b9d839d8d3bee28), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x6b9d839d8d3bee28, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x4e65d9f01ebf4be7), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x4e65d9f01ebf4be7, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x6486585a24167892), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x6486585a24167892, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x212297c365717008), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x212297c365717008, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x63fc1689dd09965d), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x63fc1689dd09965d, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x63fc16895355598f), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x63fc16895355598f, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x63fc168968a50644), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0x63fc168968a50644, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x63fc168902c6524d), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0x63fc168902c6524d, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x63fc168995ffe9e3), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0x63fc168995ffe9e3, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x63fc1689674023ae), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0x63fc1689674023ae, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x63fc16897057faae), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x63fc16897057faae, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x63fc1689917e6566), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x63fc1689917e6566, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x63fc1689bdfa24ce), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0x63fc1689bdfa24ce, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0xa76f414dfc168963), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0xa76f414dfc168963, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x7dc03497fc168963), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0x7dc03497fc168963, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0xebf79501fc168963), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0xebf79501fc168963, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0xaa755640fc168963), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0xaa755640fc168963, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x1d0094f7fc168963), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0x1d0094f7fc168963, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x7ace3d90fc168963), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0x7ace3d90fc168963, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x2178d0cbfc168963), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x2178d0cbfc168963, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0xcebdfa24fc168963), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0xcebdfa24fc168963, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x63fc1689fc168963), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0x63fc1689fc168963, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x63fc1689fc168963), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0x63fc1689fc168963, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x63fc1689fc168963), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0x63fc1689fc168963, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x63fc1689fc168963), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x63fc1689fc168963, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x63fc1689fc168963), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0x63fc1689fc168963, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x63fc1689fc168963), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x63fc1689fc168963, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x63fc1689fc168963), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0x63fc1689fc168963, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x5ddd0996fc168963), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x5ddd0996fc168963, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x4bc0029dfc168963), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0x4bc0029dfc168963, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x5a548718fc168963), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x5a548718fc168963, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xc50945dafc168963), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0xc50945dafc168963, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x2a1cbf20fc168963), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x2a1cbf20fc168963, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0xd09bc25dfc168963), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0xd09bc25dfc168963, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0xb7427ce3fc168963), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0xb7427ce3fc168963, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x2415b827fc168963), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x2415b827fc168963, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x42e309b7fc168963), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x42e309b7fc168963, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x5fe802a1fc168963), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0x5fe802a1fc168963, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xcb6d87b0fc168963), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0xcb6d87b0fc168963, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x96af452ffc168963), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0x96af452ffc168963, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x8355bfc0fc168963), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0x8355bfc0fc168963, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0428c23afc168963), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x0428c23afc168963, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xdd967c5dfc168963), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0xdd967c5dfc168963, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x8a52b8cefc168963), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0x8a52b8cefc168963, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x63fc1689e309b742), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0x63fc1689e309b742, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x63fc16892c91f69b), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0x63fc16892c91f69b, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x63fc168973bb92d5), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0x63fc168973bb92d5, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x63fc1689274eac1e), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0x63fc1689274eac1e, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x63fc16899c36804a), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0x63fc16899c36804a, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x63fc1689563eb87a), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0x63fc1689563eb87a, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x63fc16898f4e76c4), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x63fc16898f4e76c4, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x63fc1689103c08c8), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0x63fc1689103c08c8, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x63fc1689515765ce), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0x63fc1689515765ce, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xa73885defc168963), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0xa73885defc168963, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x7de22aabfc168963), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0x7de22aabfc168963, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xeb741d0afc168963), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0xeb741d0afc168963, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xaa359fc9fc168963), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0xaa359fc9fc168963, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x1d82ea0bfc168963), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x1d82ea0bfc168963, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x7ae524a2fc168963), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0x7ae524a2fc168963, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x21be924ffc168963), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x21be924ffc168963, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xce515765fc168963), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0xce515765fc168963, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x63fc1689fc168963), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x63fc1689fc168963, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x63fc1689fc168963), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x63fc1689fc168963, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x63fc1689fc168963), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x63fc1689fc168963, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x63fc1689fc168963), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x63fc1689fc168963, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x63fc1689fc168963), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x63fc1689fc168963, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x63fc1689fc168963), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x63fc1689fc168963, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x63fc1689fc168963), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x63fc1689fc168963, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x63fc1689fc168963), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0x63fc1689fc168963, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x168963fc65ce5157), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0x168963fc65ce5157, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x168963fc08c8103c), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0x168963fc08c8103c, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x168963fc76c48f4e), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0x168963fc76c48f4e, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x168963fcb87a563e), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x168963fcb87a563e, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x168963fc804a9c36), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x168963fc804a9c36, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x168963fcac1e274e), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0x168963fcac1e274e, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x168963fc92d573bb), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0x168963fc92d573bb, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x168963fcf69b2c91), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0x168963fcf69b2c91, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x168963fcb742e309), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0x168963fcb742e309, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xb8ce8a528963fc16), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0xb8ce8a528963fc16, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x7c5ddd968963fc16), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0x7c5ddd968963fc16, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xc23a04288963fc16), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0xc23a04288963fc16, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xbfc083558963fc16), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0xbfc083558963fc16, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x452f96af8963fc16), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0x452f96af8963fc16, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x87b0cb6d8963fc16), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0x87b0cb6d8963fc16, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x02a15fe88963fc16), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0x02a15fe88963fc16, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x09b742e38963fc16), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0x09b742e38963fc16, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x168963fc8963fc16), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x168963fc8963fc16, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x168963fc8963fc16), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0x168963fc8963fc16, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x168963fc8963fc16), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x168963fc8963fc16, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x168963fc8963fc16), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0x168963fc8963fc16, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x168963fc8963fc16), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x168963fc8963fc16, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x168963fc8963fc16), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0x168963fc8963fc16, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x168963fc8963fc16), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x168963fc8963fc16, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x5765ce518963fc16), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x5765ce518963fc16, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x924f21be8963fc16), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x924f21be8963fc16, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x24a27ae58963fc16), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x24a27ae58963fc16, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xea0b1d828963fc16), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0xea0b1d828963fc16, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x9fc9aa358963fc16), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x9fc9aa358963fc16, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x1d0aeb748963fc16), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x1d0aeb748963fc16, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x2aab7de28963fc16), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0x2aab7de28963fc16, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x85dea7388963fc16), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0x85dea7388963fc16, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xfa24cebd8963fc16), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0xfa24cebd8963fc16, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xd0cb21788963fc16), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0xd0cb21788963fc16, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x3d907ace8963fc16), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x3d907ace8963fc16, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x94f71d008963fc16), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x94f71d008963fc16, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x5640aa758963fc16), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0x5640aa758963fc16, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x9501ebf78963fc16), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0x9501ebf78963fc16, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x34977dc08963fc16), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0x34977dc08963fc16, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x414da76f8963fc16), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0x414da76f8963fc16, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x168963fc24cebdfa), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0x168963fc24cebdfa, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x168963fc6566917e), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0x168963fc6566917e, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x168963fcfaae7057), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0x168963fcfaae7057, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x168963fc23ae6740), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x168963fc23ae6740, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x168963fce9e395ff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0x168963fce9e395ff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x168963fc524d02c6), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0x168963fc524d02c6, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x168963fc064468a5), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0x168963fc064468a5, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x168963fc598f5355), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0x168963fc598f5355, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x168963fc965ddd09), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x168963fc965ddd09, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xb82724158963fc16), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0xb82724158963fc16, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x7ce3b7428963fc16), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x7ce3b7428963fc16, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xc25dd09b8963fc16), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0xc25dd09b8963fc16, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xbf202a1c8963fc16), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0xbf202a1c8963fc16, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x45dac5098963fc16), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0x45dac5098963fc16, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x87185a548963fc16), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x87185a548963fc16, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x029d4bc08963fc16), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x029d4bc08963fc16, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x09965ddd8963fc16), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x09965ddd8963fc16, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x168963fc8963fc16), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x168963fc8963fc16, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x168963fc8963fc16), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x168963fc8963fc16, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x168963fc8963fc16), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x168963fc8963fc16, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x168963fc8963fc16), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x168963fc8963fc16, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x168963fc8963fc16), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0x168963fc8963fc16, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x168963fc8963fc16), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0x168963fc8963fc16, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x168963fc8963fc16), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0x168963fc8963fc16, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x168963fc8963fc16), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0x168963fc8963fc16, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x63636363427c7c5d), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x63636363427c7c5d, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x636363635f77774b), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x636363635f77774b, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x63636363cbf2f25a), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0x63636363cbf2f25a, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x63636363963030c5), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0x63636363963030c5, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x6363636383caca2a), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0x6363636383caca2a, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x6363636304b7b7d0), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0x6363636304b7b7d0, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x63636363dd0909b7), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0x63636363dd0909b7, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x636363638acdcd24), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0x636363638acdcd24, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x6363636363636363), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0x6363636363636363, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x6363636363636363), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x6363636363636363, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x6363636363636363), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0x6363636363636363, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x6363636363636363), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0x6363636363636363, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x6363636363636363), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0x6363636363636363, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x6363636363636363), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0x6363636363636363, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x6363636363636363), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x6363636363636363, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x6363636363636363), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0x6363636363636363, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x6363636363636363), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x6363636363636363, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x6363636363636363), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0x6363636363636363, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x6363636363636363), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x6363636363636363, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x6363636363636363), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0x6363636363636363, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x6363636363636363), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x6363636363636363, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x6363636363636363), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x6363636363636363, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x6363636363636363), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x6363636363636363, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x6363636363636363), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x6363636363636363, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x5d427c7c63636363), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x5d427c7c63636363, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x4b5f777763636363), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x4b5f777763636363, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x5acbf2f263636363), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x5acbf2f263636363, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0xc596303063636363), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0xc596303063636363, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x2a83caca63636363), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0x2a83caca63636363, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0xd004b7b763636363), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0xd004b7b763636363, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0xb7dd090963636363), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0xb7dd090963636363, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x248acdcd63636363), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x248acdcd63636363, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x427c7c5d63636363), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x427c7c5d63636363, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x5f77774b63636363), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0x5f77774b63636363, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0xcbf2f25a63636363), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0xcbf2f25a63636363, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x963030c563636363), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0x963030c563636363, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x83caca2a63636363), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0x83caca2a63636363, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x04b7b7d063636363), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0x04b7b7d063636363, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0xdd0909b763636363), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0xdd0909b763636363, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x8acdcd2463636363), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0x8acdcd2463636363, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x636363637c7c5d42), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x636363637c7c5d42, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x6363636377774b5f), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0x6363636377774b5f, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x63636363f2f25acb), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0x63636363f2f25acb, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x636363633030c596), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0x636363633030c596, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x63636363caca2a83), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0x63636363caca2a83, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x63636363b7b7d004), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x63636363b7b7d004, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x636363630909b7dd), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0x636363630909b7dd, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x63636363cdcd248a), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x63636363cdcd248a, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x6363636363636363), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0x6363636363636363, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x6363636363636363), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x6363636363636363, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x6363636363636363), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0x6363636363636363, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x6363636363636363), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x6363636363636363, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x6363636363636363), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x6363636363636363, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x6363636363636363), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x6363636363636363, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x6363636363636363), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x6363636363636363, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x6363636363636363), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x6363636363636363, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x6363636363636363), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x6363636363636363, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x6363636363636363), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x6363636363636363, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x6363636363636363), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0x6363636363636363, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x6363636363636363), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0x6363636363636363, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x6363636363636363), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0x6363636363636363, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x6363636363636363), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0x6363636363636363, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x6363636363636363), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x6363636363636363, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x6363636363636363), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x6363636363636363, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x6363636363636363), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0x6363636363636363, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x168963fc65ce5157), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0x168963fc65ce5157, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x168963fc4f21be92), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0x168963fc4f21be92, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x168963fca27ae524), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0x168963fca27ae524, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x168963fc0b1d82ea), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0x168963fc0b1d82ea, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x168963fcc9aa359f), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0x168963fcc9aa359f, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x168963fc0aeb741d), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0x168963fc0aeb741d, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x168963fcab7de22a), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x168963fcab7de22a, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x168963fcdea73885), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0x168963fcdea73885, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x168963fc8963fc16), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0x168963fc8963fc16, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x168963fc8963fc16), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0x168963fc8963fc16, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x168963fc8963fc16), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0x168963fc8963fc16, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x168963fc8963fc16), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x168963fc8963fc16, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x168963fc8963fc16), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0x168963fc8963fc16, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x168963fc8963fc16), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x168963fc8963fc16, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x168963fc8963fc16), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0x168963fc8963fc16, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x168963fc8963fc16), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x168963fc8963fc16, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x168963fc8963fc16), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0x168963fc8963fc16, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x168963fc8963fc16), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x168963fc8963fc16, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x168963fc8963fc16), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x168963fc8963fc16, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x168963fc8963fc16), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x168963fc8963fc16, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x168963fc8963fc16), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x168963fc8963fc16, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x168963fc8963fc16), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x168963fc8963fc16, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x168963fc8963fc16), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x168963fc8963fc16, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x168963fc8963fc16), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x168963fc8963fc16, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x5765ce518963fc16), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0x5765ce518963fc16, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x924f21be8963fc16), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0x924f21be8963fc16, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x24a27ae58963fc16), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0x24a27ae58963fc16, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xea0b1d828963fc16), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0xea0b1d828963fc16, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x9fc9aa358963fc16), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x9fc9aa358963fc16, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x1d0aeb748963fc16), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x1d0aeb748963fc16, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x2aab7de28963fc16), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0x2aab7de28963fc16, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x85dea7388963fc16), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0x85dea7388963fc16, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xfa24cebd8963fc16), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0xfa24cebd8963fc16, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xd0cb21788963fc16), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0xd0cb21788963fc16, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x3d907ace8963fc16), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0x3d907ace8963fc16, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x94f71d008963fc16), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0x94f71d008963fc16, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x5640aa758963fc16), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0x5640aa758963fc16, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x9501ebf78963fc16), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x9501ebf78963fc16, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x34977dc08963fc16), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0x34977dc08963fc16, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x414da76f8963fc16), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0x414da76f8963fc16, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x168963fc24cebdfa), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0x168963fc24cebdfa, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x168963fccb2178d0), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0x168963fccb2178d0, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x168963fc907ace3d), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x168963fc907ace3d, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x168963fcf71d0094), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0x168963fcf71d0094, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x168963fc40aa7556), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x168963fc40aa7556, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x168963fc01ebf795), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0x168963fc01ebf795, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x168963fc977dc034), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x168963fc977dc034, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x168963fc4da76f41), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0x168963fc4da76f41, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x168963fc8963fc16), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x168963fc8963fc16, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x168963fc8963fc16), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x168963fc8963fc16, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x168963fc8963fc16), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x168963fc8963fc16, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x168963fc8963fc16), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x168963fc8963fc16, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x168963fc8963fc16), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x168963fc8963fc16, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x168963fc8963fc16), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x168963fc8963fc16, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x168963fc8963fc16), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x168963fc8963fc16, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x168963fc8963fc16), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0x168963fc8963fc16, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x168963fc8963fc16), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0x168963fc8963fc16, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x168963fc8963fc16), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0x168963fc8963fc16, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x168963fc8963fc16), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0x168963fc8963fc16, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x168963fc8963fc16), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x168963fc8963fc16, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x168963fc8963fc16), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x168963fc8963fc16, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x168963fc8963fc16), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0x168963fc8963fc16, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x168963fc8963fc16), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0x168963fc8963fc16, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x168963fc8963fc16), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0x168963fc8963fc16, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x168963fc8963fc16), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0x168963fc8963fc16, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x3daf29f0e5dd5c74), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(aes64esm, x23, x25, x25, 0x3daf29f0e5dd5c74, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(aes64esm, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x2293cad25b5281b9), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(aes64esm, x25, x7, x0, 0x2293cad25b5281b9, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0xbf747067d7a216f8), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(aes64esm, x26, x0, x22, 0xbf747067d7a216f8, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64ESM-02.S b/riscof/suite/rv64i_m/K_unratified/AES64ESM-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..8366e79ae27a18a47f4713e53ee9ef22287bf629
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64ESM-02.S
@@ -0,0 +1,1728 @@
+// RISC-V Architectural Validation Test AES64ESM-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64esm'.
+// Using dataset: sbox64
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64esm)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64esm)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox64
+ // result rd:x1(0x63fc1689fc168963), rs1:x31(0x0000000000000000), rs2:x16(0xffffffffffffffff)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0x63fc1689fc168963, 0x0, 0xffffffffffffffff, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox64
+ // result rd:x2(0x7c2ebbe92ebbe97c), rs1:x30(0x0101010101010101), rs2:x15(0xfefefefefefefefe)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x7c2ebbe92ebbe97c, 0x101010101010101, 0xfefefefefefefefe, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox64
+ // result rd:x3(0x7712543112543177), rs1:x29(0x0202020202020202), rs2:x14(0xfdfdfdfdfdfdfdfd)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0x7712543112543177, 0x202020202020202, 0xfdfdfdfdfdfdfdfd, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox64
+ // result rd:x4(0x7b3db0f63db0f67b), rs1:x28(0x0303030303030303), rs2:x13(0xfcfcfcfcfcfcfcfc)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x7b3db0f63db0f67b, 0x303030303030303, 0xfcfcfcfcfcfcfcfc, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox64
+ // result rd:x5(0xf2ee0f13ee0f13f2), rs1:x27(0x0404040404040404), rs2:x12(0xfbfbfbfbfbfbfbfb)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0xf2ee0f13ee0f13f2, 0x404040404040404, 0xfbfbfbfbfbfbfbfb, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox64
+ // result rd:x6(0x6ba12de7a12de76b), rs1:x26(0x0505050505050505), rs2:x11(0xfafafafafafafafa)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x6ba12de7a12de76b, 0x505050505050505, 0xfafafafafafafafa, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox64
+ // result rd:x7(0x6f6e99986e99986f), rs1:x25(0x0606060606060606), rs2:x10(0xf9f9f9f9f9f9f9f9)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x6f6e99986e99986f, 0x606060606060606, 0xf9f9f9f9f9f9f9f9, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox64
+ // result rd:x8(0xc55241d65241d6c5), rs1:x24(0x0707070707070707), rs2:x9(0xf8f8f8f8f8f8f8f8)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0xc55241d65241d6c5, 0x707070707070707, 0xf8f8f8f8f8f8f8f8, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox64
+ // result rd:x9(0x30d86880d8688030), rs1:x23(0x0808080808080808), rs2:x8(0xf7f7f7f7f7f7f7f7)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x30d86880d8688030, 0x808080808080808, 0xf7f7f7f7f7f7f7f7, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox64
+ // result rd:x10(0x01c44287c4428701), rs1:x22(0x0909090909090909), rs2:x7(0xf6f6f6f6f6f6f6f6)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x01c44287c4428701, 0x909090909090909, 0xf6f6f6f6f6f6f6f6, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox64
+ // result rd:x11(0x67ffe67effe67e67), rs1:x21(0x0a0a0a0a0a0a0a0a), rs2:x6(0xf5f5f5f5f5f5f5f5)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x67ffe67effe67e67, 0xa0a0a0a0a0a0a0a, 0xf5f5f5f5f5f5f5f5, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox64
+ // result rd:x12(0x2b8cbf188cbf182b), rs1:x20(0x0b0b0b0b0b0b0b0b), rs2:x5(0xf4f4f4f4f4f4f4f4)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x2b8cbf188cbf182b, 0xb0b0b0b0b0b0b0b, 0xf4f4f4f4f4f4f4f4, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox64
+ // result rd:x13(0xfef00d03f00d03fe), rs1:x19(0x0c0c0c0c0c0c0c0c), rs2:x4(0xf3f3f3f3f3f3f3f3)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0xfef00d03f00d03fe, 0xc0c0c0c0c0c0c0c, 0xf3f3f3f3f3f3f3f3, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox64
+ // result rd:x14(0xd735896b35896bd7), rs1:x18(0x0d0d0d0d0d0d0d0d), rs2:x3(0xf2f2f2f2f2f2f2f2)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0xd735896b35896bd7, 0xd0d0d0d0d0d0d0d, 0xf2f2f2f2f2f2f2f2, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox64
+ // result rd:x15(0xabb5a1bfb5a1bfab), rs1:x17(0x0e0e0e0e0e0e0e0e), rs2:x2(0xf1f1f1f1f1f1f1f1)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0xabb5a1bfb5a1bfab, 0xe0e0e0e0e0e0e0e, 0xf1f1f1f1f1f1f1f1, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox64
+ // result rd:x16(0x76638c99638c9976), rs1:x16(0x0f0f0f0f0f0f0f0f), rs2:x1(0xf0f0f0f0f0f0f0f0)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0x76638c99638c9976, 0xf0f0f0f0f0f0f0f, 0xf0f0f0f0f0f0f0f0, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox64
+ // result rd:x17(0xcaf5dfe0f5dfe0ca), rs1:x15(0x1010101010101010), rs2:x31(0xefefefefefefefef)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0xcaf5dfe0f5dfe0ca, 0x1010101010101010, 0xefefefefefefefef, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox64
+ // result rd:x18(0x826728cd6728cd82), rs1:x14(0x1111111111111111), rs2:x30(0xeeeeeeeeeeeeeeee)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x826728cd6728cd82, 0x1111111111111111, 0xeeeeeeeeeeeeeeee, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox64
+ // result rd:x19(0xc97655ea7655eac9), rs1:x13(0x1212121212121212), rs2:x29(0xedededededededed)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0xc97655ea7655eac9, 0x1212121212121212, 0xedededededededed, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox64
+ // result rd:x20(0x7db3ce00b3ce007d), rs1:x12(0x1313131313131313), rs2:x28(0xecececececececec)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0x7db3ce00b3ce007d, 0x1313131313131313, 0xecececececececec, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox64
+ // result rd:x21(0xfacfe9dccfe9dcfa), rs1:x11(0x1414141414141414), rs2:x27(0xebebebebebebebeb)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0xfacfe9dccfe9dcfa, 0x1414141414141414, 0xebebebebebebebeb, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox64
+ // result rd:x22(0x592087fe2087fe59), rs1:x10(0x1515151515151515), rs2:x26(0xeaeaeaeaeaeaeaea)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0x592087fe2087fe59, 0x1515151515151515, 0xeaeaeaeaeaeaeaea, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox64
+ // result rd:x23(0x47ac1ef5ac1ef547), rs1:x9(0x1616161616161616), rs2:x25(0xe9e9e9e9e9e9e9e9)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0x47ac1ef5ac1ef547, 0x1616161616161616, 0xe9e9e9e9e9e9e9e9, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox64
+ // result rd:x24(0xf04d9b264d9b26f0), rs1:x8(0x1717171717171717), rs2:x24(0xe8e8e8e8e8e8e8e8)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0xf04d9b264d9b26f0, 0x1717171717171717, 0xe8e8e8e8e8e8e8e8, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox64
+ // result rd:x25(0xade694dfe694dfad), rs1:x7(0x1818181818181818), rs2:x23(0xe7e7e7e7e7e7e7e7)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0xade694dfe694dfad, 0x1818181818181818, 0xe7e7e7e7e7e7e7e7, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox64
+ // result rd:x26(0xd43a8e603a8e60d4), rs1:x6(0x1919191919191919), rs2:x22(0xe6e6e6e6e6e6e6e6)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0xd43a8e603a8e60d4, 0x1919191919191919, 0xe6e6e6e6e6e6e6e6, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox64
+ // result rd:x27(0xa22fd9542fd954a2), rs1:x5(0x1a1a1a1a1a1a1a1a), rs2:x21(0xe5e5e5e5e5e5e5e5)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0xa22fd9542fd954a2, 0x1a1a1a1a1a1a1a1a, 0xe5e5e5e5e5e5e5e5, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox64
+ // result rd:x28(0xaffe6938fe6938af), rs1:x4(0x1b1b1b1b1b1b1b1b), rs2:x20(0xe4e4e4e4e4e4e4e4)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0xaffe6938fe6938af, 0x1b1b1b1b1b1b1b1b, 0xe4e4e4e4e4e4e4e4, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox64
+ // result rd:x29(0x9c10119d10119d9c), rs1:x3(0x1c1c1c1c1c1c1c1c), rs2:x19(0xe3e3e3e3e3e3e3e3)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0x9c10119d10119d9c, 0x1c1c1c1c1c1c1c1c, 0xe3e3e3e3e3e3e3e3, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox64
+ // result rd:x30(0xa4e098dce098dca4), rs1:x2(0x1d1d1d1d1d1d1d1d), rs2:x18(0xe2e2e2e2e2e2e2e2)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0xa4e098dce098dca4, 0x1d1d1d1d1d1d1d1d, 0xe2e2e2e2e2e2e2e2, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox64
+ // result rd:x31(0x72f7f87df7f87d72), rs1:x1(0x1e1e1e1e1e1e1e1e), rs2:x17(0xe1e1e1e1e1e1e1e1)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x72f7f87df7f87d72, 0x1e1e1e1e1e1e1e1e, 0xe1e1e1e1e1e1e1e1, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox64
+ // result rd:x1(0xc0a3e182a3e182c0), rs1:x31(0x1f1f1f1f1f1f1f1f), rs2:x16(0xe0e0e0e0e0e0e0e0)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0xc0a3e182a3e182c0, 0x1f1f1f1f1f1f1f1f, 0xe0e0e0e0e0e0e0e0, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox64
+ // result rd:x2(0xb7cc9ee5cc9ee5b7), rs1:x30(0x2020202020202020), rs2:x15(0xdfdfdfdfdfdfdfdf)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0xb7cc9ee5cc9ee5b7, 0x2020202020202020, 0xdfdfdfdfdfdfdfdf, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox64
+ // result rd:x3(0xfdc61d26c61d26fd), rs1:x29(0x2121212121212121), rs2:x14(0xdededededededede)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0xfdc61d26c61d26fd, 0x2121212121212121, 0xdededededededede, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox64
+ // result rd:x4(0x9365c13765c13793), rs1:x28(0x2222222222222222), rs2:x13(0xdddddddddddddddd)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x9365c13765c13793, 0x2222222222222222, 0xdddddddddddddddd, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox64
+ // result rd:x5(0x26dd867ddd867d26), rs1:x27(0x2323232323232323), rs2:x12(0xdcdcdcdcdcdcdcdc)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0x26dd867ddd867d26, 0x2323232323232323, 0xdcdcdcdcdcdcdcdc, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox64
+ // result rd:x6(0x36bcb933bcb93336), rs1:x26(0x2424242424242424), rs2:x11(0xdbdbdbdbdbdbdbdb)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x36bcb933bcb93336, 0x2424242424242424, 0xdbdbdbdbdbdbdbdb, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox64
+ // result rd:x7(0x3f8757ef8757ef3f), rs1:x25(0x2525252525252525), rs2:x10(0xdadadadadadadada)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x3f8757ef8757ef3f, 0x2525252525252525, 0xdadadadadadadada, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox64
+ // result rd:x8(0xf7aa3568aa3568f7), rs1:x24(0x2626262626262626), rs2:x9(0xd9d9d9d9d9d9d9d9)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0xf7aa3568aa3568f7, 0x2626262626262626, 0xd9d9d9d9d9d9d9d9, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox64
+ // result rd:x9(0xcc20618d20618dcc), rs1:x23(0x2727272727272727), rs2:x8(0xd8d8d8d8d8d8d8d8)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0xcc20618d20618dcc, 0x2727272727272727, 0xd8d8d8d8d8d8d8d8, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox64
+ // result rd:x10(0x347a0e407a0e4034), rs1:x22(0x2828282828282828), rs2:x7(0xd7d7d7d7d7d7d7d7)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x347a0e407a0e4034, 0x2828282828282828, 0xd7d7d7d7d7d7d7d7, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox64
+ // result rd:x11(0xa550f60350f603a5), rs1:x21(0x2929292929292929), rs2:x6(0xd6d6d6d6d6d6d6d6)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0xa550f60350f603a5, 0x2929292929292929, 0xd6d6d6d6d6d6d6d6, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox64
+ // result rd:x12(0xe5d40332d40332e5), rs1:x20(0x2a2a2a2a2a2a2a2a), rs2:x5(0xd5d5d5d5d5d5d5d5)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0xe5d40332d40332e5, 0x2a2a2a2a2a2a2a2a, 0xd5d5d5d5d5d5d5d5, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox64
+ // result rd:x13(0xf1214898214898f1), rs1:x19(0x2b2b2b2b2b2b2b2b), rs2:x4(0xd4d4d4d4d4d4d4d4)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0xf1214898214898f1, 0x2b2b2b2b2b2b2b2b, 0xd4d4d4d4d4d4d4d4, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox64
+ // result rd:x14(0x7148665f48665f71), rs1:x18(0x2c2c2c2c2c2c2c2c), rs2:x3(0xd3d3d3d3d3d3d3d3)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0x7148665f48665f71, 0x2c2c2c2c2c2c2c2c, 0xd3d3d3d3d3d3d3d3, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox64
+ // result rd:x15(0xd86fb5026fb502d8), rs1:x17(0x2d2d2d2d2d2d2d2d), rs2:x2(0xd2d2d2d2d2d2d2d2)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0xd86fb5026fb502d8, 0x2d2d2d2d2d2d2d2d, 0xd2d2d2d2d2d2d2d2, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox64
+ // result rd:x16(0x31203e2f203e2f31), rs1:x16(0x2e2e2e2e2e2e2e2e), rs2:x1(0xd1d1d1d1d1d1d1d1)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0x31203e2f203e2f31, 0x2e2e2e2e2e2e2e2e, 0xd1d1d1d1d1d1d1d1, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox64
+ // result rd:x17(0x15ba70dfba70df15), rs1:x15(0x2f2f2f2f2f2f2f2f), rs2:x31(0xd0d0d0d0d0d0d0d0)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x15ba70dfba70df15, 0x2f2f2f2f2f2f2f2f, 0xd0d0d0d0d0d0d0d0, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox64
+ // result rd:x18(0x048d8a038d8a0304), rs1:x14(0x3030303030303030), rs2:x30(0xcfcfcfcfcfcfcfcf)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x048d8a038d8a0304, 0x3030303030303030, 0xcfcfcfcfcfcfcfcf, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox64
+ // result rd:x19(0xc7138b5f138b5fc7), rs1:x13(0x3131313131313131), rs2:x29(0xcececececececece)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0xc7138b5f138b5fc7, 0x3131313131313131, 0xcececececececece, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox64
+ // result rd:x20(0x239abd049abd0423), rs1:x12(0x3232323232323232), rs2:x28(0xcdcdcdcdcdcdcdcd)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0x239abd049abd0423, 0x3232323232323232, 0xcdcdcdcdcdcdcdcd, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox64
+ // result rd:x21(0xc3404bc8404bc8c3), rs1:x11(0x3333333333333333), rs2:x27(0xcccccccccccccccc)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0xc3404bc8404bc8c3, 0x3333333333333333, 0xcccccccccccccccc, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox64
+ // result rd:x22(0x18111f16111f1618), rs1:x10(0x3434343434343434), rs2:x26(0xcbcbcbcbcbcbcbcb)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0x18111f16111f1618, 0x3434343434343434, 0xcbcbcbcbcbcbcbcb, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox64
+ // result rd:x23(0x96ab7449ab744996), rs1:x9(0x3535353535353535), rs2:x25(0xcacacacacacacaca)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0x96ab7449ab744996, 0x3535353535353535, 0xcacacacacacacaca, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox64
+ // result rd:x24(0x0576ddae76ddae05), rs1:x8(0x3636363636363636), rs2:x24(0xc9c9c9c9c9c9c9c9)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0x0576ddae76ddae05, 0x3636363636363636, 0xc9c9c9c9c9c9c9c9, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox64
+ // result rd:x25(0x9a0ce87e0ce87e9a), rs1:x7(0x3737373737373737), rs2:x23(0xc8c8c8c8c8c8c8c8)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0x9a0ce87e0ce87e9a, 0x3737373737373737, 0xc8c8c8c8c8c8c8c8, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox64
+ // result rd:x26(0x075fc69e5fc69e07), rs1:x6(0x3838383838383838), rs2:x22(0xc7c7c7c7c7c7c7c7)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x075fc69e5fc69e07, 0x3838383838383838, 0xc7c7c7c7c7c7c7c7, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox64
+ // result rd:x27(0x12e3b445e3b44512), rs1:x5(0x3939393939393939), rs2:x21(0xc6c6c6c6c6c6c6c6)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0x12e3b445e3b44512, 0x3939393939393939, 0xc6c6c6c6c6c6c6c6, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox64
+ // result rd:x28(0x80eaa6cceaa6cc80), rs1:x4(0x3a3a3a3a3a3a3a3a), rs2:x20(0xc5c5c5c5c5c5c5c5)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0x80eaa6cceaa6cc80, 0x3a3a3a3a3a3a3a3a, 0xc5c5c5c5c5c5c5c5, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox64
+ // result rd:x29(0xe2fb1c05fb1c05e2), rs1:x3(0x3b3b3b3b3b3b3b3b), rs2:x19(0xc4c4c4c4c4c4c4c4)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0xe2fb1c05fb1c05e2, 0x3b3b3b3b3b3b3b3b, 0xc4c4c4c4c4c4c4c4, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox64
+ // result rd:x30(0xebbf2e7abf2e7aeb), rs1:x2(0x3c3c3c3c3c3c3c3c), rs2:x18(0xc3c3c3c3c3c3c3c3)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0xebbf2e7abf2e7aeb, 0x3c3c3c3c3c3c3c3c, 0xc3c3c3c3c3c3c3c3, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox64
+ // result rd:x31(0x2721252321252327), rs1:x1(0x3d3d3d3d3d3d3d3d), rs2:x17(0xc2c2c2c2c2c2c2c2)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x2721252321252327, 0x3d3d3d3d3d3d3d3d, 0xc2c2c2c2c2c2c2c2, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox64
+ // result rd:x1(0xb2f7783df7783db2), rs1:x31(0x3e3e3e3e3e3e3e3e), rs2:x16(0xc1c1c1c1c1c1c1c1)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0xb2f7783df7783db2, 0x3e3e3e3e3e3e3e3e, 0xc1c1c1c1c1c1c1c1, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox64
+ // result rd:x2(0x753fbaf03fbaf075), rs1:x30(0x3f3f3f3f3f3f3f3f), rs2:x15(0xc0c0c0c0c0c0c0c0)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x753fbaf03fbaf075, 0x3f3f3f3f3f3f3f3f, 0xc0c0c0c0c0c0c0c0, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox64
+ // result rd:x3(0x090a080b0a080b09), rs1:x29(0x4040404040404040), rs2:x14(0xbfbfbfbfbfbfbfbf)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0x090a080b0a080b09, 0x4040404040404040, 0xbfbfbfbfbfbfbfbf, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox64
+ // result rd:x4(0x83f4aed9f4aed983), rs1:x28(0x4141414141414141), rs2:x13(0xbebebebebebebebe)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x83f4aed9f4aed983, 0x4141414141414141, 0xbebebebebebebebe, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox64
+ // result rd:x5(0x2cd67a80d67a802c), rs1:x27(0x4242424242424242), rs2:x12(0xbdbdbdbdbdbdbdbd)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0x2cd67a80d67a802c, 0x4242424242424242, 0xbdbdbdbdbdbdbdbd, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox64
+ // result rd:x6(0x1a9b65e49b65e41a), rs1:x26(0x4343434343434343), rs2:x11(0xbcbcbcbcbcbcbcbc)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x1a9b65e49b65e41a, 0x4343434343434343, 0xbcbcbcbcbcbcbcbc, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox64
+ // result rd:x7(0x1b13eae213eae21b), rs1:x25(0x4444444444444444), rs2:x10(0xbbbbbbbbbbbbbbbb)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x1b13eae213eae21b, 0x4444444444444444, 0xbbbbbbbbbbbbbbbb, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox64
+ // result rd:x8(0x6edbf441dbf4416e), rs1:x24(0x4545454545454545), rs2:x9(0xbabababababababa)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x6edbf441dbf4416e, 0x4545454545454545, 0xbabababababababa, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox64
+ // result rd:x9(0x5a4e56424e56425a), rs1:x23(0x4646464646464646), rs2:x8(0xb9b9b9b9b9b9b9b9)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x5a4e56424e56425a, 0x4646464646464646, 0xb9b9b9b9b9b9b9b9, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox64
+ // result rd:x10(0xa0ef6c23ef6c23a0), rs1:x22(0x4747474747474747), rs2:x7(0xb8b8b8b8b8b8b8b8)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0xa0ef6c23ef6c23a0, 0x4747474747474747, 0xb8b8b8b8b8b8b8b8, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox64
+ // result rd:x11(0x5244a9bf44a9bf52), rs1:x21(0x4848484848484848), rs2:x6(0xb7b7b7b7b7b7b7b7)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x5244a9bf44a9bf52, 0x4848484848484848, 0xb7b7b7b7b7b7b7b7, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox64
+ // result rd:x12(0x3ba44ed1a44ed13b), rs1:x20(0x4949494949494949), rs2:x5(0xb6b6b6b6b6b6b6b6)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x3ba44ed1a44ed13b, 0x4949494949494949, 0xb6b6b6b6b6b6b6b6, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox64
+ // result rd:x13(0xd6d3d5d0d3d5d0d6), rs1:x19(0x4a4a4a4a4a4a4a4a), rs2:x4(0xb5b5b5b5b5b5b5b5)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0xd6d3d5d0d3d5d0d6, 0x4a4a4a4a4a4a4a4a, 0xb5b5b5b5b5b5b5b5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox64
+ // result rd:x14(0xb3f18dcff18dcfb3), rs1:x18(0x4b4b4b4b4b4b4b4b), rs2:x3(0xb4b4b4b4b4b4b4b4)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0xb3f18dcff18dcfb3, 0x4b4b4b4b4b4b4b4b, 0xb4b4b4b4b4b4b4b4, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox64
+ // result rd:x15(0x29e56da1e56da129), rs1:x17(0x4c4c4c4c4c4c4c4c), rs2:x2(0xb3b3b3b3b3b3b3b3)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0x29e56da1e56da129, 0x4c4c4c4c4c4c4c4c, 0xb3b3b3b3b3b3b3b3, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox64
+ // result rd:x16(0xe3843750843750e3), rs1:x16(0x4d4d4d4d4d4d4d4d), rs2:x1(0xb2b2b2b2b2b2b2b2)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0xe3843750843750e3, 0x4d4d4d4d4d4d4d4d, 0xb2b2b2b2b2b2b2b2, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox64
+ // result rd:x17(0x2f1dc8fa1dc8fa2f), rs1:x15(0x4e4e4e4e4e4e4e4e), rs2:x31(0xb1b1b1b1b1b1b1b1)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x2f1dc8fa1dc8fa2f, 0x4e4e4e4e4e4e4e4e, 0xb1b1b1b1b1b1b1b1, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox64
+ // result rd:x18(0x8421e74221e74284), rs1:x14(0x4f4f4f4f4f4f4f4f), rs2:x30(0xb0b0b0b0b0b0b0b0)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x8421e74221e74284, 0x4f4f4f4f4f4f4f4f, 0xb0b0b0b0b0b0b0b0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox64
+ // result rd:x19(0x532d79072d790753), rs1:x13(0x5050505050505050), rs2:x29(0xafafafafafafafaf)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0x532d79072d790753, 0x5050505050505050, 0xafafafafafafafaf, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox64
+ // result rd:x20(0xd18ee4bb8ee4bbd1), rs1:x12(0x5151515151515151), rs2:x28(0xaeaeaeaeaeaeaeae)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0xd18ee4bb8ee4bbd1, 0x5151515151515151, 0xaeaeaeaeaeaeaeae, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox64
+ // result rd:x21(0x00a49531a4953100), rs1:x11(0x5252525252525252), rs2:x27(0xadadadadadadadad)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0x00a49531a4953100, 0x5252525252525252, 0xadadadadadadadad, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox64
+ // result rd:x22(0xed699115699115ed), rs1:x10(0x5353535353535353), rs2:x26(0xacacacacacacacac)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0xed699115699115ed, 0x5353535353535353, 0xacacacacacacacac, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox64
+ // result rd:x23(0x20e662a4e662a420), rs1:x9(0x5454545454545454), rs2:x25(0xabababababababab)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0x20e662a4e662a420, 0x5454545454545454, 0xabababababababab, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox64
+ // result rd:x24(0xfc0cac5c0cac5cfc), rs1:x8(0x5555555555555555), rs2:x24(0xaaaaaaaaaaaaaaaa)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0xfc0cac5c0cac5cfc, 0x5555555555555555, 0xaaaaaaaaaaaaaaaa, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox64
+ // result rd:x25(0xb117d37517d375b1), rs1:x7(0x5656565656565656), rs2:x23(0xa9a9a9a9a9a9a9a9)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0xb117d37517d375b1, 0x5656565656565656, 0xa9a9a9a9a9a9a9a9, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox64
+ // result rd:x26(0x5bebc272ebc2725b), rs1:x6(0x5757575757575757), rs2:x22(0xa8a8a8a8a8a8a8a8)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x5bebc272ebc2725b, 0x5757575757575757, 0xa8a8a8a8a8a8a8a8, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox64
+ // result rd:x27(0x6a305c06305c066a), rs1:x5(0x5858585858585858), rs2:x21(0xa7a7a7a7a7a7a7a7)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0x6a305c06305c066a, 0x5858585858585858, 0xa7a7a7a7a7a7a7a7, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox64
+ // result rd:x28(0xcbe1240ee1240ecb), rs1:x4(0x5959595959595959), rs2:x20(0xa6a6a6a6a6a6a6a6)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0xcbe1240ee1240ecb, 0x5959595959595959, 0xa6a6a6a6a6a6a6a6, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox64
+ // result rd:x29(0xbe6d06d56d06d5be), rs1:x3(0x5a5a5a5a5a5a5a5a), rs2:x19(0xa5a5a5a5a5a5a5a5)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0xbe6d06d56d06d5be, 0x5a5a5a5a5a5a5a5a, 0xa5a5a5a5a5a5a5a5, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox64
+ // result rd:x30(0x39a949d9a949d939), rs1:x2(0x5b5b5b5b5b5b5b5b), rs2:x18(0xa4a4a4a4a4a4a4a4)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0x39a949d9a949d939, 0x5b5b5b5b5b5b5b5b, 0xa4a4a4a4a4a4a4a4, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox64
+ // result rd:x31(0x4a8a0aca8a0aca4a), rs1:x1(0x5c5c5c5c5c5c5c5c), rs2:x17(0xa3a3a3a3a3a3a3a3)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x4a8a0aca8a0aca4a, 0x5c5c5c5c5c5c5c5c, 0xa3a3a3a3a3a3a3a3, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox64
+ // result rd:x1(0x4cd63aa0d63aa04c), rs1:x31(0x5d5d5d5d5d5d5d5d), rs2:x16(0xa2a2a2a2a2a2a2a2)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0x4cd63aa0d63aa04c, 0x5d5d5d5d5d5d5d5d, 0xa2a2a2a2a2a2a2a2, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox64
+ // result rd:x2(0x58e6328ce6328c58), rs1:x30(0x5e5e5e5e5e5e5e5e), rs2:x15(0xa1a1a1a1a1a1a1a1)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x58e6328ce6328c58, 0x5e5e5e5e5e5e5e5e, 0xa1a1a1a1a1a1a1a1, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox64
+ // result rd:x3(0xcfbee091bee091cf), rs1:x29(0x5f5f5f5f5f5f5f5f), rs2:x14(0xa0a0a0a0a0a0a0a0)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0xcfbee091bee091cf, 0x5f5f5f5f5f5f5f5f, 0xa0a0a0a0a0a0a0a0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox64
+ // result rd:x4(0xd0cddbc6cddbc6d0), rs1:x28(0x6060606060606060), rs2:x13(0x9f9f9f9f9f9f9f9f)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0xd0cddbc6cddbc6d0, 0x6060606060606060, 0x9f9f9f9f9f9f9f9f, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox64
+ // result rd:x5(0xefd80b3cd80b3cef), rs1:x27(0x6161616161616161), rs2:x12(0x9e9e9e9e9e9e9e9e)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0xefd80b3cd80b3cef, 0x6161616161616161, 0x9e9e9e9e9e9e9e9e, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox64
+ // result rd:x6(0xaaad5e59ad5e59aa), rs1:x26(0x6262626262626262), rs2:x11(0x9d9d9d9d9d9d9d9d)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0xaaad5e59ad5e59aa, 0x6262626262626262, 0x9d9d9d9d9d9d9d9d, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox64
+ // result rd:x7(0xfb94deb194deb1fb), rs1:x25(0x6363636363636363), rs2:x10(0x9c9c9c9c9c9c9c9c)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0xfb94deb194deb1fb, 0x6363636363636363, 0x9c9c9c9c9c9c9c9c, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox64
+ // result rd:x8(0x43ba14edba14ed43), rs1:x24(0x6464646464646464), rs2:x9(0x9b9b9b9b9b9b9b9b)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x43ba14edba14ed43, 0x6464646464646464, 0x9b9b9b9b9b9b9b9b, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox64
+ // result rd:x9(0x4d49b8bc49b8bc4d), rs1:x23(0x6565656565656565), rs2:x8(0x9a9a9a9a9a9a9a9a)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x4d49b8bc49b8bc4d, 0x6565656565656565, 0x9a9a9a9a9a9a9a9a, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox64
+ // result rd:x10(0x334fee924fee9233), rs1:x22(0x6666666666666666), rs2:x7(0x9999999999999999)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x334fee924fee9233, 0x6666666666666666, 0x9999999999999999, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox64
+ // result rd:x11(0x85db4618db461885), rs1:x21(0x6767676767676767), rs2:x6(0x9898989898989898)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x85db4618db461885, 0x6767676767676767, 0x9898989898989898, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox64
+ // result rd:x12(0x450988c40988c445), rs1:x20(0x6868686868686868), rs2:x5(0x9797979797979797)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x450988c40988c445, 0x6868686868686868, 0x9797979797979797, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox64
+ // result rd:x13(0xf942902b42902bf9), rs1:x19(0x6969696969696969), rs2:x4(0x9696969696969696)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0xf942902b42902bf9, 0x6969696969696969, 0x9696969696969696, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox64
+ // result rd:x14(0x027a2a527a2a5202), rs1:x18(0x6a6a6a6a6a6a6a6a), rs2:x3(0x9595959595959595)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0x027a2a527a2a5202, 0x6a6a6a6a6a6a6a6a, 0x9595959595959595, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox64
+ // result rd:x15(0x7f9822c59822c57f), rs1:x17(0x6b6b6b6b6b6b6b6b), rs2:x2(0x9494949494949494)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0x7f9822c59822c57f, 0x6b6b6b6b6b6b6b6b, 0x9494949494949494, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox64
+ // result rd:x16(0x50dfdc53dfdc5350), rs1:x16(0x6c6c6c6c6c6c6c6c), rs2:x1(0x9393939393939393)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0x50dfdc53dfdc5350, 0x6c6c6c6c6c6c6c6c, 0x9393939393939393, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox64
+ // result rd:x17(0x3ca94fdaa94fda3c), rs1:x15(0x6d6d6d6d6d6d6d6d), rs2:x31(0x9292929292929292)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x3ca94fdaa94fda3c, 0x6d6d6d6d6d6d6d6d, 0x9292929292929292, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox64
+ // result rd:x18(0x9fbd81a3bd81a39f), rs1:x14(0x6e6e6e6e6e6e6e6e), rs2:x30(0x9191919191919191)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x9fbd81a3bd81a39f, 0x6e6e6e6e6e6e6e6e, 0x9191919191919191, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox64
+ // result rd:x19(0xa8eb6023eb6023a8), rs1:x13(0x6f6f6f6f6f6f6f6f), rs2:x29(0x9090909090909090)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0xa8eb6023eb6023a8, 0x6f6f6f6f6f6f6f6f, 0x9090909090909090, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox64
+ // result rd:x20(0x5137731537731551), rs1:x12(0x7070707070707070), rs2:x28(0x8f8f8f8f8f8f8f8f)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0x5137731537731551, 0x7070707070707070, 0x8f8f8f8f8f8f8f8f, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox64
+ // result rd:x21(0xa37619cc7619cca3), rs1:x11(0x7171717171717171), rs2:x27(0x8e8e8e8e8e8e8e8e)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0xa37619cc7619cca3, 0x7171717171717171, 0x8e8e8e8e8e8e8e8e, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox64
+ // result rd:x22(0x40675d7a675d7a40), rs1:x10(0x7272727272727272), rs2:x26(0x8d8d8d8d8d8d8d8d)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0x40675d7a675d7a40, 0x7272727272727272, 0x8d8d8d8d8d8d8d8d, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox64
+ // result rd:x23(0x8fa96442a964428f), rs1:x9(0x7373737373737373), rs2:x25(0x8c8c8c8c8c8c8c8c)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0x8fa96442a964428f, 0x7373737373737373, 0x8c8c8c8c8c8c8c8c, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox64
+ // result rd:x24(0x92783dd7783dd792), rs1:x8(0x7474747474747474), rs2:x24(0x8b8b8b8b8b8b8b8b)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0x92783dd7783dd792, 0x7474747474747474, 0x8b8b8b8b8b8b8b8b, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox64
+ // result rd:x25(0x9da37e40a37e409d), rs1:x7(0x7575757575757575), rs2:x23(0x8a8a8a8a8a8a8a8a)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0x9da37e40a37e409d, 0x7575757575757575, 0x8a8a8a8a8a8a8a8a, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox64
+ // result rd:x26(0x3882a71d82a71d38), rs1:x6(0x7676767676767676), rs2:x22(0x8989898989898989)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x3882a71d82a71d38, 0x7676767676767676, 0x8989898989898989, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox64
+ // result rd:x27(0xf5a6c497a6c497f5), rs1:x5(0x7777777777777777), rs2:x21(0x8888888888888888)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0xf5a6c497a6c497f5, 0x7777777777777777, 0x8888888888888888, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox64
+ // result rd:x28(0xbc5a17f15a17f1bc), rs1:x4(0x7878787878787878), rs2:x20(0x8787878787878787)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0xbc5a17f15a17f1bc, 0x7878787878787878, 0x8787878787878787, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox64
+ // result rd:x29(0xb6bb4449bb4449b6), rs1:x3(0x7979797979797979), rs2:x19(0x8686868686868686)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0xb6bb4449bb4449b6, 0x7979797979797979, 0x8686868686868686, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox64
+ // result rd:x30(0xda0d97400d9740da), rs1:x2(0x7a7a7a7a7a7a7a7a), rs2:x18(0x8585858585858585)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0xda0d97400d9740da, 0x7a7a7a7a7a7a7a7a, 0x8585858585858585, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox64
+ // result rd:x31(0x21a35fdda35fdd21), rs1:x1(0x7b7b7b7b7b7b7b7b), rs2:x17(0x8484848484848484)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x21a35fdda35fdd21, 0x7b7b7b7b7b7b7b7b, 0x8484848484848484, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox64
+ // result rd:x1(0x100fecf30fecf310), rs1:x31(0x7c7c7c7c7c7c7c7c), rs2:x16(0x8383838383838383)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0x100fecf30fecf310, 0x7c7c7c7c7c7c7c7c, 0x8383838383838383, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox64
+ // result rd:x2(0xffd0133cd0133cff), rs1:x30(0x7d7d7d7d7d7d7d7d), rs2:x15(0x8282828282828282)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0xffd0133cd0133cff, 0x7d7d7d7d7d7d7d7d, 0x8282828282828282, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox64
+ // result rd:x3(0xf3e90c16e90c16f3), rs1:x29(0x7e7e7e7e7e7e7e7e), rs2:x14(0x8181818181818181)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0xf3e90c16e90c16f3, 0x7e7e7e7e7e7e7e7e, 0x8181818181818181, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox64
+ // result rd:x4(0xd2f3cdecf3cdecd2), rs1:x28(0x7f7f7f7f7f7f7f7f), rs2:x13(0x8080808080808080)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0xd2f3cdecf3cdecd2, 0x7f7f7f7f7f7f7f7f, 0x8080808080808080, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox64
+ // result rd:x5(0xcdecd2f3ecd2f3cd), rs1:x27(0x8080808080808080), rs2:x12(0x7f7f7f7f7f7f7f7f)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0xcdecd2f3ecd2f3cd, 0x8080808080808080, 0x7f7f7f7f7f7f7f7f, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox64
+ // result rd:x6(0x0c16f3e916f3e90c), rs1:x26(0x8181818181818181), rs2:x11(0x7e7e7e7e7e7e7e7e)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x0c16f3e916f3e90c, 0x8181818181818181, 0x7e7e7e7e7e7e7e7e, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox64
+ // result rd:x7(0x133cffd03cffd013), rs1:x25(0x8282828282828282), rs2:x10(0x7d7d7d7d7d7d7d7d)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x133cffd03cffd013, 0x8282828282828282, 0x7d7d7d7d7d7d7d7d, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox64
+ // result rd:x8(0xecf3100ff3100fec), rs1:x24(0x8383838383838383), rs2:x9(0x7c7c7c7c7c7c7c7c)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0xecf3100ff3100fec, 0x8383838383838383, 0x7c7c7c7c7c7c7c7c, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox64
+ // result rd:x9(0x5fdd21a3dd21a35f), rs1:x23(0x8484848484848484), rs2:x8(0x7b7b7b7b7b7b7b7b)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x5fdd21a3dd21a35f, 0x8484848484848484, 0x7b7b7b7b7b7b7b7b, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox64
+ // result rd:x10(0x9740da0d40da0d97), rs1:x22(0x8585858585858585), rs2:x7(0x7a7a7a7a7a7a7a7a)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x9740da0d40da0d97, 0x8585858585858585, 0x7a7a7a7a7a7a7a7a, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox64
+ // result rd:x11(0x4449b6bb49b6bb44), rs1:x21(0x8686868686868686), rs2:x6(0x7979797979797979)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x4449b6bb49b6bb44, 0x8686868686868686, 0x7979797979797979, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox64
+ // result rd:x12(0x17f1bc5af1bc5a17), rs1:x20(0x8787878787878787), rs2:x5(0x7878787878787878)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x17f1bc5af1bc5a17, 0x8787878787878787, 0x7878787878787878, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox64
+ // result rd:x13(0xc497f5a697f5a6c4), rs1:x19(0x8888888888888888), rs2:x4(0x7777777777777777)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0xc497f5a697f5a6c4, 0x8888888888888888, 0x7777777777777777, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox64
+ // result rd:x14(0xa71d38821d3882a7), rs1:x18(0x8989898989898989), rs2:x3(0x7676767676767676)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0xa71d38821d3882a7, 0x8989898989898989, 0x7676767676767676, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox64
+ // result rd:x15(0x7e409da3409da37e), rs1:x17(0x8a8a8a8a8a8a8a8a), rs2:x2(0x7575757575757575)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0x7e409da3409da37e, 0x8a8a8a8a8a8a8a8a, 0x7575757575757575, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox64
+ // result rd:x16(0x3dd79278d792783d), rs1:x16(0x8b8b8b8b8b8b8b8b), rs2:x1(0x7474747474747474)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0x3dd79278d792783d, 0x8b8b8b8b8b8b8b8b, 0x7474747474747474, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox64
+ // result rd:x17(0x64428fa9428fa964), rs1:x15(0x8c8c8c8c8c8c8c8c), rs2:x31(0x7373737373737373)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x64428fa9428fa964, 0x8c8c8c8c8c8c8c8c, 0x7373737373737373, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox64
+ // result rd:x18(0x5d7a40677a40675d), rs1:x14(0x8d8d8d8d8d8d8d8d), rs2:x30(0x7272727272727272)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x5d7a40677a40675d, 0x8d8d8d8d8d8d8d8d, 0x7272727272727272, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox64
+ // result rd:x19(0x19cca376cca37619), rs1:x13(0x8e8e8e8e8e8e8e8e), rs2:x29(0x7171717171717171)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0x19cca376cca37619, 0x8e8e8e8e8e8e8e8e, 0x7171717171717171, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox64
+ // result rd:x20(0x7315513715513773), rs1:x12(0x8f8f8f8f8f8f8f8f), rs2:x28(0x7070707070707070)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0x7315513715513773, 0x8f8f8f8f8f8f8f8f, 0x7070707070707070, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox64
+ // result rd:x21(0x6023a8eb23a8eb60), rs1:x11(0x9090909090909090), rs2:x27(0x6f6f6f6f6f6f6f6f)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0x6023a8eb23a8eb60, 0x9090909090909090, 0x6f6f6f6f6f6f6f6f, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox64
+ // result rd:x22(0x81a39fbda39fbd81), rs1:x10(0x9191919191919191), rs2:x26(0x6e6e6e6e6e6e6e6e)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0x81a39fbda39fbd81, 0x9191919191919191, 0x6e6e6e6e6e6e6e6e, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox64
+ // result rd:x23(0x4fda3ca9da3ca94f), rs1:x9(0x9292929292929292), rs2:x25(0x6d6d6d6d6d6d6d6d)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0x4fda3ca9da3ca94f, 0x9292929292929292, 0x6d6d6d6d6d6d6d6d, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox64
+ // result rd:x24(0xdc5350df5350dfdc), rs1:x8(0x9393939393939393), rs2:x24(0x6c6c6c6c6c6c6c6c)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0xdc5350df5350dfdc, 0x9393939393939393, 0x6c6c6c6c6c6c6c6c, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox64
+ // result rd:x25(0x22c57f98c57f9822), rs1:x7(0x9494949494949494), rs2:x23(0x6b6b6b6b6b6b6b6b)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0x22c57f98c57f9822, 0x9494949494949494, 0x6b6b6b6b6b6b6b6b, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox64
+ // result rd:x26(0x2a52027a52027a2a), rs1:x6(0x9595959595959595), rs2:x22(0x6a6a6a6a6a6a6a6a)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x2a52027a52027a2a, 0x9595959595959595, 0x6a6a6a6a6a6a6a6a, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox64
+ // result rd:x27(0x902bf9422bf94290), rs1:x5(0x9696969696969696), rs2:x21(0x6969696969696969)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0x902bf9422bf94290, 0x9696969696969696, 0x6969696969696969, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox64
+ // result rd:x28(0x88c44509c4450988), rs1:x4(0x9797979797979797), rs2:x20(0x6868686868686868)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0x88c44509c4450988, 0x9797979797979797, 0x6868686868686868, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox64
+ // result rd:x29(0x461885db1885db46), rs1:x3(0x9898989898989898), rs2:x19(0x6767676767676767)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0x461885db1885db46, 0x9898989898989898, 0x6767676767676767, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox64
+ // result rd:x30(0xee92334f92334fee), rs1:x2(0x9999999999999999), rs2:x18(0x6666666666666666)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0xee92334f92334fee, 0x9999999999999999, 0x6666666666666666, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox64
+ // result rd:x31(0xb8bc4d49bc4d49b8), rs1:x1(0x9a9a9a9a9a9a9a9a), rs2:x17(0x6565656565656565)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0xb8bc4d49bc4d49b8, 0x9a9a9a9a9a9a9a9a, 0x6565656565656565, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox64
+ // result rd:x1(0x14ed43baed43ba14), rs1:x31(0x9b9b9b9b9b9b9b9b), rs2:x16(0x6464646464646464)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0x14ed43baed43ba14, 0x9b9b9b9b9b9b9b9b, 0x6464646464646464, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox64
+ // result rd:x2(0xdeb1fb94b1fb94de), rs1:x30(0x9c9c9c9c9c9c9c9c), rs2:x15(0x6363636363636363)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0xdeb1fb94b1fb94de, 0x9c9c9c9c9c9c9c9c, 0x6363636363636363, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox64
+ // result rd:x3(0x5e59aaad59aaad5e), rs1:x29(0x9d9d9d9d9d9d9d9d), rs2:x14(0x6262626262626262)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0x5e59aaad59aaad5e, 0x9d9d9d9d9d9d9d9d, 0x6262626262626262, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox64
+ // result rd:x4(0x0b3cefd83cefd80b), rs1:x28(0x9e9e9e9e9e9e9e9e), rs2:x13(0x6161616161616161)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x0b3cefd83cefd80b, 0x9e9e9e9e9e9e9e9e, 0x6161616161616161, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox64
+ // result rd:x5(0xdbc6d0cdc6d0cddb), rs1:x27(0x9f9f9f9f9f9f9f9f), rs2:x12(0x6060606060606060)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0xdbc6d0cdc6d0cddb, 0x9f9f9f9f9f9f9f9f, 0x6060606060606060, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox64
+ // result rd:x6(0xe091cfbe91cfbee0), rs1:x26(0xa0a0a0a0a0a0a0a0), rs2:x11(0x5f5f5f5f5f5f5f5f)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0xe091cfbe91cfbee0, 0xa0a0a0a0a0a0a0a0, 0x5f5f5f5f5f5f5f5f, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox64
+ // result rd:x7(0x328c58e68c58e632), rs1:x25(0xa1a1a1a1a1a1a1a1), rs2:x10(0x5e5e5e5e5e5e5e5e)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x328c58e68c58e632, 0xa1a1a1a1a1a1a1a1, 0x5e5e5e5e5e5e5e5e, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox64
+ // result rd:x8(0x3aa04cd6a04cd63a), rs1:x24(0xa2a2a2a2a2a2a2a2), rs2:x9(0x5d5d5d5d5d5d5d5d)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x3aa04cd6a04cd63a, 0xa2a2a2a2a2a2a2a2, 0x5d5d5d5d5d5d5d5d, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox64
+ // result rd:x9(0x0aca4a8aca4a8a0a), rs1:x23(0xa3a3a3a3a3a3a3a3), rs2:x8(0x5c5c5c5c5c5c5c5c)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x0aca4a8aca4a8a0a, 0xa3a3a3a3a3a3a3a3, 0x5c5c5c5c5c5c5c5c, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox64
+ // result rd:x10(0x49d939a9d939a949), rs1:x22(0xa4a4a4a4a4a4a4a4), rs2:x7(0x5b5b5b5b5b5b5b5b)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x49d939a9d939a949, 0xa4a4a4a4a4a4a4a4, 0x5b5b5b5b5b5b5b5b, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox64
+ // result rd:x11(0x06d5be6dd5be6d06), rs1:x21(0xa5a5a5a5a5a5a5a5), rs2:x6(0x5a5a5a5a5a5a5a5a)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x06d5be6dd5be6d06, 0xa5a5a5a5a5a5a5a5, 0x5a5a5a5a5a5a5a5a, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox64
+ // result rd:x12(0x240ecbe10ecbe124), rs1:x20(0xa6a6a6a6a6a6a6a6), rs2:x5(0x5959595959595959)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x240ecbe10ecbe124, 0xa6a6a6a6a6a6a6a6, 0x5959595959595959, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox64
+ // result rd:x13(0x5c066a30066a305c), rs1:x19(0xa7a7a7a7a7a7a7a7), rs2:x4(0x5858585858585858)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0x5c066a30066a305c, 0xa7a7a7a7a7a7a7a7, 0x5858585858585858, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox64
+ // result rd:x14(0xc2725beb725bebc2), rs1:x18(0xa8a8a8a8a8a8a8a8), rs2:x3(0x5757575757575757)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0xc2725beb725bebc2, 0xa8a8a8a8a8a8a8a8, 0x5757575757575757, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox64
+ // result rd:x15(0xd375b11775b117d3), rs1:x17(0xa9a9a9a9a9a9a9a9), rs2:x2(0x5656565656565656)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0xd375b11775b117d3, 0xa9a9a9a9a9a9a9a9, 0x5656565656565656, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox64
+ // result rd:x16(0xac5cfc0c5cfc0cac), rs1:x16(0xaaaaaaaaaaaaaaaa), rs2:x1(0x5555555555555555)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0xac5cfc0c5cfc0cac, 0xaaaaaaaaaaaaaaaa, 0x5555555555555555, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox64
+ // result rd:x17(0x62a420e6a420e662), rs1:x15(0xabababababababab), rs2:x31(0x5454545454545454)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x62a420e6a420e662, 0xabababababababab, 0x5454545454545454, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox64
+ // result rd:x18(0x9115ed6915ed6991), rs1:x14(0xacacacacacacacac), rs2:x30(0x5353535353535353)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x9115ed6915ed6991, 0xacacacacacacacac, 0x5353535353535353, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox64
+ // result rd:x19(0x953100a43100a495), rs1:x13(0xadadadadadadadad), rs2:x29(0x5252525252525252)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0x953100a43100a495, 0xadadadadadadadad, 0x5252525252525252, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox64
+ // result rd:x20(0xe4bbd18ebbd18ee4), rs1:x12(0xaeaeaeaeaeaeaeae), rs2:x28(0x5151515151515151)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0xe4bbd18ebbd18ee4, 0xaeaeaeaeaeaeaeae, 0x5151515151515151, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox64
+ // result rd:x21(0x7907532d07532d79), rs1:x11(0xafafafafafafafaf), rs2:x27(0x5050505050505050)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0x7907532d07532d79, 0xafafafafafafafaf, 0x5050505050505050, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox64
+ // result rd:x22(0xe7428421428421e7), rs1:x10(0xb0b0b0b0b0b0b0b0), rs2:x26(0x4f4f4f4f4f4f4f4f)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0xe7428421428421e7, 0xb0b0b0b0b0b0b0b0, 0x4f4f4f4f4f4f4f4f, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox64
+ // result rd:x23(0xc8fa2f1dfa2f1dc8), rs1:x9(0xb1b1b1b1b1b1b1b1), rs2:x25(0x4e4e4e4e4e4e4e4e)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0xc8fa2f1dfa2f1dc8, 0xb1b1b1b1b1b1b1b1, 0x4e4e4e4e4e4e4e4e, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox64
+ // result rd:x24(0x3750e38450e38437), rs1:x8(0xb2b2b2b2b2b2b2b2), rs2:x24(0x4d4d4d4d4d4d4d4d)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0x3750e38450e38437, 0xb2b2b2b2b2b2b2b2, 0x4d4d4d4d4d4d4d4d, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox64
+ // result rd:x25(0x6da129e5a129e56d), rs1:x7(0xb3b3b3b3b3b3b3b3), rs2:x23(0x4c4c4c4c4c4c4c4c)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0x6da129e5a129e56d, 0xb3b3b3b3b3b3b3b3, 0x4c4c4c4c4c4c4c4c, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox64
+ // result rd:x26(0x8dcfb3f1cfb3f18d), rs1:x6(0xb4b4b4b4b4b4b4b4), rs2:x22(0x4b4b4b4b4b4b4b4b)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x8dcfb3f1cfb3f18d, 0xb4b4b4b4b4b4b4b4, 0x4b4b4b4b4b4b4b4b, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox64
+ // result rd:x27(0xd5d0d6d3d0d6d3d5), rs1:x5(0xb5b5b5b5b5b5b5b5), rs2:x21(0x4a4a4a4a4a4a4a4a)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0xd5d0d6d3d0d6d3d5, 0xb5b5b5b5b5b5b5b5, 0x4a4a4a4a4a4a4a4a, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox64
+ // result rd:x28(0x4ed13ba4d13ba44e), rs1:x4(0xb6b6b6b6b6b6b6b6), rs2:x20(0x4949494949494949)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0x4ed13ba4d13ba44e, 0xb6b6b6b6b6b6b6b6, 0x4949494949494949, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox64
+ // result rd:x29(0xa9bf5244bf5244a9), rs1:x3(0xb7b7b7b7b7b7b7b7), rs2:x19(0x4848484848484848)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0xa9bf5244bf5244a9, 0xb7b7b7b7b7b7b7b7, 0x4848484848484848, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox64
+ // result rd:x30(0x6c23a0ef23a0ef6c), rs1:x2(0xb8b8b8b8b8b8b8b8), rs2:x18(0x4747474747474747)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0x6c23a0ef23a0ef6c, 0xb8b8b8b8b8b8b8b8, 0x4747474747474747, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox64
+ // result rd:x31(0x56425a4e425a4e56), rs1:x1(0xb9b9b9b9b9b9b9b9), rs2:x17(0x4646464646464646)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x56425a4e425a4e56, 0xb9b9b9b9b9b9b9b9, 0x4646464646464646, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox64
+ // result rd:x1(0xf4416edb416edbf4), rs1:x31(0xbabababababababa), rs2:x16(0x4545454545454545)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0xf4416edb416edbf4, 0xbabababababababa, 0x4545454545454545, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox64
+ // result rd:x2(0xeae21b13e21b13ea), rs1:x30(0xbbbbbbbbbbbbbbbb), rs2:x15(0x4444444444444444)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0xeae21b13e21b13ea, 0xbbbbbbbbbbbbbbbb, 0x4444444444444444, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox64
+ // result rd:x3(0x65e41a9be41a9b65), rs1:x29(0xbcbcbcbcbcbcbcbc), rs2:x14(0x4343434343434343)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0x65e41a9be41a9b65, 0xbcbcbcbcbcbcbcbc, 0x4343434343434343, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox64
+ // result rd:x4(0x7a802cd6802cd67a), rs1:x28(0xbdbdbdbdbdbdbdbd), rs2:x13(0x4242424242424242)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x7a802cd6802cd67a, 0xbdbdbdbdbdbdbdbd, 0x4242424242424242, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox64
+ // result rd:x5(0xaed983f4d983f4ae), rs1:x27(0xbebebebebebebebe), rs2:x12(0x4141414141414141)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0xaed983f4d983f4ae, 0xbebebebebebebebe, 0x4141414141414141, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox64
+ // result rd:x6(0x080b090a0b090a08), rs1:x26(0xbfbfbfbfbfbfbfbf), rs2:x11(0x4040404040404040)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x080b090a0b090a08, 0xbfbfbfbfbfbfbfbf, 0x4040404040404040, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox64
+ // result rd:x7(0xbaf0753ff0753fba), rs1:x25(0xc0c0c0c0c0c0c0c0), rs2:x10(0x3f3f3f3f3f3f3f3f)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0xbaf0753ff0753fba, 0xc0c0c0c0c0c0c0c0, 0x3f3f3f3f3f3f3f3f, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox64
+ // result rd:x8(0x783db2f73db2f778), rs1:x24(0xc1c1c1c1c1c1c1c1), rs2:x9(0x3e3e3e3e3e3e3e3e)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x783db2f73db2f778, 0xc1c1c1c1c1c1c1c1, 0x3e3e3e3e3e3e3e3e, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox64
+ // result rd:x9(0x2523272123272125), rs1:x23(0xc2c2c2c2c2c2c2c2), rs2:x8(0x3d3d3d3d3d3d3d3d)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0x2523272123272125, 0xc2c2c2c2c2c2c2c2, 0x3d3d3d3d3d3d3d3d, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox64
+ // result rd:x10(0x2e7aebbf7aebbf2e), rs1:x22(0xc3c3c3c3c3c3c3c3), rs2:x7(0x3c3c3c3c3c3c3c3c)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x2e7aebbf7aebbf2e, 0xc3c3c3c3c3c3c3c3, 0x3c3c3c3c3c3c3c3c, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox64
+ // result rd:x11(0x1c05e2fb05e2fb1c), rs1:x21(0xc4c4c4c4c4c4c4c4), rs2:x6(0x3b3b3b3b3b3b3b3b)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x1c05e2fb05e2fb1c, 0xc4c4c4c4c4c4c4c4, 0x3b3b3b3b3b3b3b3b, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox64
+ // result rd:x12(0xa6cc80eacc80eaa6), rs1:x20(0xc5c5c5c5c5c5c5c5), rs2:x5(0x3a3a3a3a3a3a3a3a)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0xa6cc80eacc80eaa6, 0xc5c5c5c5c5c5c5c5, 0x3a3a3a3a3a3a3a3a, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox64
+ // result rd:x13(0xb44512e34512e3b4), rs1:x19(0xc6c6c6c6c6c6c6c6), rs2:x4(0x3939393939393939)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0xb44512e34512e3b4, 0xc6c6c6c6c6c6c6c6, 0x3939393939393939, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox64
+ // result rd:x14(0xc69e075f9e075fc6), rs1:x18(0xc7c7c7c7c7c7c7c7), rs2:x3(0x3838383838383838)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0xc69e075f9e075fc6, 0xc7c7c7c7c7c7c7c7, 0x3838383838383838, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox64
+ // result rd:x15(0xe87e9a0c7e9a0ce8), rs1:x17(0xc8c8c8c8c8c8c8c8), rs2:x2(0x3737373737373737)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0xe87e9a0c7e9a0ce8, 0xc8c8c8c8c8c8c8c8, 0x3737373737373737, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox64
+ // result rd:x16(0xddae0576ae0576dd), rs1:x16(0xc9c9c9c9c9c9c9c9), rs2:x1(0x3636363636363636)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0xddae0576ae0576dd, 0xc9c9c9c9c9c9c9c9, 0x3636363636363636, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox64
+ // result rd:x17(0x744996ab4996ab74), rs1:x15(0xcacacacacacacaca), rs2:x31(0x3535353535353535)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x744996ab4996ab74, 0xcacacacacacacaca, 0x3535353535353535, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox64
+ // result rd:x18(0x1f1618111618111f), rs1:x14(0xcbcbcbcbcbcbcbcb), rs2:x30(0x3434343434343434)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x1f1618111618111f, 0xcbcbcbcbcbcbcbcb, 0x3434343434343434, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox64
+ // result rd:x19(0x4bc8c340c8c3404b), rs1:x13(0xcccccccccccccccc), rs2:x29(0x3333333333333333)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0x4bc8c340c8c3404b, 0xcccccccccccccccc, 0x3333333333333333, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox64
+ // result rd:x20(0xbd04239a04239abd), rs1:x12(0xcdcdcdcdcdcdcdcd), rs2:x28(0x3232323232323232)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0xbd04239a04239abd, 0xcdcdcdcdcdcdcdcd, 0x3232323232323232, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox64
+ // result rd:x21(0x8b5fc7135fc7138b), rs1:x11(0xcececececececece), rs2:x27(0x3131313131313131)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0x8b5fc7135fc7138b, 0xcececececececece, 0x3131313131313131, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox64
+ // result rd:x22(0x8a03048d03048d8a), rs1:x10(0xcfcfcfcfcfcfcfcf), rs2:x26(0x3030303030303030)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0x8a03048d03048d8a, 0xcfcfcfcfcfcfcfcf, 0x3030303030303030, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox64
+ // result rd:x23(0x70df15badf15ba70), rs1:x9(0xd0d0d0d0d0d0d0d0), rs2:x25(0x2f2f2f2f2f2f2f2f)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0x70df15badf15ba70, 0xd0d0d0d0d0d0d0d0, 0x2f2f2f2f2f2f2f2f, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox64
+ // result rd:x24(0x3e2f31202f31203e), rs1:x8(0xd1d1d1d1d1d1d1d1), rs2:x24(0x2e2e2e2e2e2e2e2e)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0x3e2f31202f31203e, 0xd1d1d1d1d1d1d1d1, 0x2e2e2e2e2e2e2e2e, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox64
+ // result rd:x25(0xb502d86f02d86fb5), rs1:x7(0xd2d2d2d2d2d2d2d2), rs2:x23(0x2d2d2d2d2d2d2d2d)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0xb502d86f02d86fb5, 0xd2d2d2d2d2d2d2d2, 0x2d2d2d2d2d2d2d2d, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox64
+ // result rd:x26(0x665f71485f714866), rs1:x6(0xd3d3d3d3d3d3d3d3), rs2:x22(0x2c2c2c2c2c2c2c2c)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x665f71485f714866, 0xd3d3d3d3d3d3d3d3, 0x2c2c2c2c2c2c2c2c, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox64
+ // result rd:x27(0x4898f12198f12148), rs1:x5(0xd4d4d4d4d4d4d4d4), rs2:x21(0x2b2b2b2b2b2b2b2b)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0x4898f12198f12148, 0xd4d4d4d4d4d4d4d4, 0x2b2b2b2b2b2b2b2b, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox64
+ // result rd:x28(0x0332e5d432e5d403), rs1:x4(0xd5d5d5d5d5d5d5d5), rs2:x20(0x2a2a2a2a2a2a2a2a)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0x0332e5d432e5d403, 0xd5d5d5d5d5d5d5d5, 0x2a2a2a2a2a2a2a2a, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox64
+ // result rd:x29(0xf603a55003a550f6), rs1:x3(0xd6d6d6d6d6d6d6d6), rs2:x19(0x2929292929292929)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0xf603a55003a550f6, 0xd6d6d6d6d6d6d6d6, 0x2929292929292929, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox64
+ // result rd:x30(0x0e40347a40347a0e), rs1:x2(0xd7d7d7d7d7d7d7d7), rs2:x18(0x2828282828282828)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0x0e40347a40347a0e, 0xd7d7d7d7d7d7d7d7, 0x2828282828282828, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox64
+ // result rd:x31(0x618dcc208dcc2061), rs1:x1(0xd8d8d8d8d8d8d8d8), rs2:x17(0x2727272727272727)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x618dcc208dcc2061, 0xd8d8d8d8d8d8d8d8, 0x2727272727272727, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox64
+ // result rd:x1(0x3568f7aa68f7aa35), rs1:x31(0xd9d9d9d9d9d9d9d9), rs2:x16(0x2626262626262626)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0x3568f7aa68f7aa35, 0xd9d9d9d9d9d9d9d9, 0x2626262626262626, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox64
+ // result rd:x2(0x57ef3f87ef3f8757), rs1:x30(0xdadadadadadadada), rs2:x15(0x2525252525252525)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x57ef3f87ef3f8757, 0xdadadadadadadada, 0x2525252525252525, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox64
+ // result rd:x3(0xb93336bc3336bcb9), rs1:x29(0xdbdbdbdbdbdbdbdb), rs2:x14(0x2424242424242424)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0xb93336bc3336bcb9, 0xdbdbdbdbdbdbdbdb, 0x2424242424242424, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox64
+ // result rd:x4(0x867d26dd7d26dd86), rs1:x28(0xdcdcdcdcdcdcdcdc), rs2:x13(0x2323232323232323)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x867d26dd7d26dd86, 0xdcdcdcdcdcdcdcdc, 0x2323232323232323, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox64
+ // result rd:x5(0xc1379365379365c1), rs1:x27(0xdddddddddddddddd), rs2:x12(0x2222222222222222)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0xc1379365379365c1, 0xdddddddddddddddd, 0x2222222222222222, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox64
+ // result rd:x6(0x1d26fdc626fdc61d), rs1:x26(0xdededededededede), rs2:x11(0x2121212121212121)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x1d26fdc626fdc61d, 0xdededededededede, 0x2121212121212121, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox64
+ // result rd:x7(0x9ee5b7cce5b7cc9e), rs1:x25(0xdfdfdfdfdfdfdfdf), rs2:x10(0x2020202020202020)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0x9ee5b7cce5b7cc9e, 0xdfdfdfdfdfdfdfdf, 0x2020202020202020, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox64
+ // result rd:x8(0xe182c0a382c0a3e1), rs1:x24(0xe0e0e0e0e0e0e0e0), rs2:x9(0x1f1f1f1f1f1f1f1f)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0xe182c0a382c0a3e1, 0xe0e0e0e0e0e0e0e0, 0x1f1f1f1f1f1f1f1f, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox64
+ // result rd:x9(0xf87d72f77d72f7f8), rs1:x23(0xe1e1e1e1e1e1e1e1), rs2:x8(0x1e1e1e1e1e1e1e1e)
+ TEST_RR_OP(aes64esm, x9, x23, x8, 0xf87d72f77d72f7f8, 0xe1e1e1e1e1e1e1e1, 0x1e1e1e1e1e1e1e1e, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox64
+ // result rd:x10(0x98dca4e0dca4e098), rs1:x22(0xe2e2e2e2e2e2e2e2), rs2:x7(0x1d1d1d1d1d1d1d1d)
+ TEST_RR_OP(aes64esm, x10, x22, x7, 0x98dca4e0dca4e098, 0xe2e2e2e2e2e2e2e2, 0x1d1d1d1d1d1d1d1d, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox64
+ // result rd:x11(0x119d9c109d9c1011), rs1:x21(0xe3e3e3e3e3e3e3e3), rs2:x6(0x1c1c1c1c1c1c1c1c)
+ TEST_RR_OP(aes64esm, x11, x21, x6, 0x119d9c109d9c1011, 0xe3e3e3e3e3e3e3e3, 0x1c1c1c1c1c1c1c1c, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox64
+ // result rd:x12(0x6938affe38affe69), rs1:x20(0xe4e4e4e4e4e4e4e4), rs2:x5(0x1b1b1b1b1b1b1b1b)
+ TEST_RR_OP(aes64esm, x12, x20, x5, 0x6938affe38affe69, 0xe4e4e4e4e4e4e4e4, 0x1b1b1b1b1b1b1b1b, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox64
+ // result rd:x13(0xd954a22f54a22fd9), rs1:x19(0xe5e5e5e5e5e5e5e5), rs2:x4(0x1a1a1a1a1a1a1a1a)
+ TEST_RR_OP(aes64esm, x13, x19, x4, 0xd954a22f54a22fd9, 0xe5e5e5e5e5e5e5e5, 0x1a1a1a1a1a1a1a1a, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox64
+ // result rd:x14(0x8e60d43a60d43a8e), rs1:x18(0xe6e6e6e6e6e6e6e6), rs2:x3(0x1919191919191919)
+ TEST_RR_OP(aes64esm, x14, x18, x3, 0x8e60d43a60d43a8e, 0xe6e6e6e6e6e6e6e6, 0x1919191919191919, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox64
+ // result rd:x15(0x94dfade6dfade694), rs1:x17(0xe7e7e7e7e7e7e7e7), rs2:x2(0x1818181818181818)
+ TEST_RR_OP(aes64esm, x15, x17, x2, 0x94dfade6dfade694, 0xe7e7e7e7e7e7e7e7, 0x1818181818181818, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox64
+ // result rd:x16(0x9b26f04d26f04d9b), rs1:x16(0xe8e8e8e8e8e8e8e8), rs2:x1(0x1717171717171717)
+ TEST_RR_OP(aes64esm, x16, x16, x1, 0x9b26f04d26f04d9b, 0xe8e8e8e8e8e8e8e8, 0x1717171717171717, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox64
+ // result rd:x17(0x1ef547acf547ac1e), rs1:x15(0xe9e9e9e9e9e9e9e9), rs2:x31(0x1616161616161616)
+ TEST_RR_OP(aes64esm, x17, x15, x31, 0x1ef547acf547ac1e, 0xe9e9e9e9e9e9e9e9, 0x1616161616161616, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox64
+ // result rd:x18(0x87fe5920fe592087), rs1:x14(0xeaeaeaeaeaeaeaea), rs2:x30(0x1515151515151515)
+ TEST_RR_OP(aes64esm, x18, x14, x30, 0x87fe5920fe592087, 0xeaeaeaeaeaeaeaea, 0x1515151515151515, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox64
+ // result rd:x19(0xe9dcfacfdcfacfe9), rs1:x13(0xebebebebebebebeb), rs2:x29(0x1414141414141414)
+ TEST_RR_OP(aes64esm, x19, x13, x29, 0xe9dcfacfdcfacfe9, 0xebebebebebebebeb, 0x1414141414141414, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox64
+ // result rd:x20(0xce007db3007db3ce), rs1:x12(0xecececececececec), rs2:x28(0x1313131313131313)
+ TEST_RR_OP(aes64esm, x20, x12, x28, 0xce007db3007db3ce, 0xecececececececec, 0x1313131313131313, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox64
+ // result rd:x21(0x55eac976eac97655), rs1:x11(0xedededededededed), rs2:x27(0x1212121212121212)
+ TEST_RR_OP(aes64esm, x21, x11, x27, 0x55eac976eac97655, 0xedededededededed, 0x1212121212121212, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox64
+ // result rd:x22(0x28cd8267cd826728), rs1:x10(0xeeeeeeeeeeeeeeee), rs2:x26(0x1111111111111111)
+ TEST_RR_OP(aes64esm, x22, x10, x26, 0x28cd8267cd826728, 0xeeeeeeeeeeeeeeee, 0x1111111111111111, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox64
+ // result rd:x23(0xdfe0caf5e0caf5df), rs1:x9(0xefefefefefefefef), rs2:x25(0x1010101010101010)
+ TEST_RR_OP(aes64esm, x23, x9, x25, 0xdfe0caf5e0caf5df, 0xefefefefefefefef, 0x1010101010101010, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox64
+ // result rd:x24(0x8c9976639976638c), rs1:x8(0xf0f0f0f0f0f0f0f0), rs2:x24(0x0f0f0f0f0f0f0f0f)
+ TEST_RR_OP(aes64esm, x24, x8, x24, 0x8c9976639976638c, 0xf0f0f0f0f0f0f0f0, 0xf0f0f0f0f0f0f0f, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox64
+ // result rd:x25(0xa1bfabb5bfabb5a1), rs1:x7(0xf1f1f1f1f1f1f1f1), rs2:x23(0x0e0e0e0e0e0e0e0e)
+ TEST_RR_OP(aes64esm, x25, x7, x23, 0xa1bfabb5bfabb5a1, 0xf1f1f1f1f1f1f1f1, 0xe0e0e0e0e0e0e0e, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox64
+ // result rd:x26(0x896bd7356bd73589), rs1:x6(0xf2f2f2f2f2f2f2f2), rs2:x22(0x0d0d0d0d0d0d0d0d)
+ TEST_RR_OP(aes64esm, x26, x6, x22, 0x896bd7356bd73589, 0xf2f2f2f2f2f2f2f2, 0xd0d0d0d0d0d0d0d, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox64
+ // result rd:x27(0x0d03fef003fef00d), rs1:x5(0xf3f3f3f3f3f3f3f3), rs2:x21(0x0c0c0c0c0c0c0c0c)
+ TEST_RR_OP(aes64esm, x27, x5, x21, 0x0d03fef003fef00d, 0xf3f3f3f3f3f3f3f3, 0xc0c0c0c0c0c0c0c, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox64
+ // result rd:x28(0xbf182b8c182b8cbf), rs1:x4(0xf4f4f4f4f4f4f4f4), rs2:x20(0x0b0b0b0b0b0b0b0b)
+ TEST_RR_OP(aes64esm, x28, x4, x20, 0xbf182b8c182b8cbf, 0xf4f4f4f4f4f4f4f4, 0xb0b0b0b0b0b0b0b, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox64
+ // result rd:x29(0xe67e67ff7e67ffe6), rs1:x3(0xf5f5f5f5f5f5f5f5), rs2:x19(0x0a0a0a0a0a0a0a0a)
+ TEST_RR_OP(aes64esm, x29, x3, x19, 0xe67e67ff7e67ffe6, 0xf5f5f5f5f5f5f5f5, 0xa0a0a0a0a0a0a0a, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox64
+ // result rd:x30(0x428701c48701c442), rs1:x2(0xf6f6f6f6f6f6f6f6), rs2:x18(0x0909090909090909)
+ TEST_RR_OP(aes64esm, x30, x2, x18, 0x428701c48701c442, 0xf6f6f6f6f6f6f6f6, 0x909090909090909, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox64
+ // result rd:x31(0x688030d88030d868), rs1:x1(0xf7f7f7f7f7f7f7f7), rs2:x17(0x0808080808080808)
+ TEST_RR_OP(aes64esm, x31, x1, x17, 0x688030d88030d868, 0xf7f7f7f7f7f7f7f7, 0x808080808080808, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox64
+ // result rd:x1(0x41d6c552d6c55241), rs1:x31(0xf8f8f8f8f8f8f8f8), rs2:x16(0x0707070707070707)
+ TEST_RR_OP(aes64esm, x1, x31, x16, 0x41d6c552d6c55241, 0xf8f8f8f8f8f8f8f8, 0x707070707070707, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox64
+ // result rd:x2(0x99986f6e986f6e99), rs1:x30(0xf9f9f9f9f9f9f9f9), rs2:x15(0x0606060606060606)
+ TEST_RR_OP(aes64esm, x2, x30, x15, 0x99986f6e986f6e99, 0xf9f9f9f9f9f9f9f9, 0x606060606060606, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox64
+ // result rd:x3(0x2de76ba1e76ba12d), rs1:x29(0xfafafafafafafafa), rs2:x14(0x0505050505050505)
+ TEST_RR_OP(aes64esm, x3, x29, x14, 0x2de76ba1e76ba12d, 0xfafafafafafafafa, 0x505050505050505, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox64
+ // result rd:x4(0x0f13f2ee13f2ee0f), rs1:x28(0xfbfbfbfbfbfbfbfb), rs2:x13(0x0404040404040404)
+ TEST_RR_OP(aes64esm, x4, x28, x13, 0x0f13f2ee13f2ee0f, 0xfbfbfbfbfbfbfbfb, 0x404040404040404, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox64
+ // result rd:x5(0xb0f67b3df67b3db0), rs1:x27(0xfcfcfcfcfcfcfcfc), rs2:x12(0x0303030303030303)
+ TEST_RR_OP(aes64esm, x5, x27, x12, 0xb0f67b3df67b3db0, 0xfcfcfcfcfcfcfcfc, 0x303030303030303, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox64
+ // result rd:x6(0x5431771231771254), rs1:x26(0xfdfdfdfdfdfdfdfd), rs2:x11(0x0202020202020202)
+ TEST_RR_OP(aes64esm, x6, x26, x11, 0x5431771231771254, 0xfdfdfdfdfdfdfdfd, 0x202020202020202, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox64
+ // result rd:x7(0xbbe97c2ee97c2ebb), rs1:x25(0xfefefefefefefefe), rs2:x10(0x0101010101010101)
+ TEST_RR_OP(aes64esm, x7, x25, x10, 0xbbe97c2ee97c2ebb, 0xfefefefefefefefe, 0x101010101010101, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox64
+ // result rd:x8(0x168963fc8963fc16), rs1:x24(0xffffffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64esm, x8, x24, x9, 0x168963fc8963fc16, 0xffffffffffffffff, 0x0, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64IM-01.S b/riscof/suite/rv64i_m/K_unratified/AES64IM-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..32a86cb08e845784831b144dbeb6c6c4c7aeaf66
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64IM-01.S
@@ -0,0 +1,2714 @@
+// RISC-V Architectural Validation Test AES64IM-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64im'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64im)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64im)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x8bb2dcd8f7741616), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ aes64im x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x8bb2dcd8f7741616)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xcb7a7ee5aba96333), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ aes64im x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xcb7a7ee5aba96333)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x9d2ea52132bc8652), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ aes64im x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x9d2ea52132bc8652)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x448dd25e03ff654c), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ aes64im x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x448dd25e03ff654c)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x9d12bb8144b8dc66), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ aes64im x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x9d12bb8144b8dc66)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x4789d77cd2c75e2c), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ aes64im x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x4789d77cd2c75e2c)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x7fdb61e4a97037ac), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ aes64im x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x7fdb61e4a97037ac)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x3ca634d1d6532499), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ aes64im x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x3ca634d1d6532499)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x28f09eb0c922423b), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ aes64im x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x28f09eb0c922423b)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x25ae6136b27ebb91), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ aes64im x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x25ae6136b27ebb91)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x000000000b0d090e), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ aes64im x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x000000000b0d090e)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x00000000161a121c), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ aes64im x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x00000000161a121c)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x000000002c342438), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ aes64im x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x000000002c342438)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000058684870), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ aes64im x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000058684870)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00000000b0d090e0), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ aes64im x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x00000000b0d090e0)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x000000007bbb3bdb), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ aes64im x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x000000007bbb3bdb)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x00000000f66d76ad), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ aes64im x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x00000000f66d76ad)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00000000f7daec41), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ aes64im x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x00000000f7daec41)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x000000000d090e0b), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ aes64im x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x000000000d090e0b)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x000000001a121c16), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ aes64im x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x000000001a121c16)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x000000003424382c), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ aes64im x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x000000003424382c)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000068487058), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ aes64im x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000068487058)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00000000d090e0b0), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ aes64im x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000d090e0b0)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00000000bb3bdb7b), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ aes64im x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000bb3bdb7b)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x000000006d76adf6), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ aes64im x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x000000006d76adf6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00000000daec41f7), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ aes64im x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x00000000daec41f7)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00000000090e0b0d), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ aes64im x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x00000000090e0b0d)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00000000121c161a), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ aes64im x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x00000000121c161a)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000024382c34), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ aes64im x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000024382c34)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000048705868), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ aes64im x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000048705868)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000090e0b0d0), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ aes64im x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000090e0b0d0)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x000000003bdb7bbb), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ aes64im x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x000000003bdb7bbb)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000076adf66d), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ aes64im x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000076adf66d)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00000000ec41f7da), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ aes64im x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x00000000ec41f7da)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x000000000e0b0d09), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ aes64im x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x000000000e0b0d09)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x000000001c161a12), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ aes64im x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x000000001c161a12)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x00000000382c3424), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ aes64im x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000382c3424)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000070586848), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ aes64im x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000070586848)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x00000000e0b0d090), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ aes64im x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000e0b0d090)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x00000000db7bbb3b), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ aes64im x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000db7bbb3b)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x00000000adf66d76), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ aes64im x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000adf66d76)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000041f7daec), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ aes64im x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000041f7daec)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0b0d090e00000000), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ aes64im x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0b0d090e00000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x161a121c00000000), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ aes64im x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x161a121c00000000)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x2c34243800000000), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ aes64im x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x2c34243800000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x5868487000000000), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ aes64im x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x5868487000000000)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xb0d090e000000000), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ aes64im x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0xb0d090e000000000)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x7bbb3bdb00000000), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ aes64im x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x7bbb3bdb00000000)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xf66d76ad00000000), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ aes64im x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0xf66d76ad00000000)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xf7daec4100000000), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ aes64im x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0xf7daec4100000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0d090e0b00000000), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ aes64im x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0d090e0b00000000)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x1a121c1600000000), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ aes64im x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x1a121c1600000000)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x3424382c00000000), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ aes64im x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x3424382c00000000)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x6848705800000000), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ aes64im x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x6848705800000000)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xd090e0b000000000), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ aes64im x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xd090e0b000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xbb3bdb7b00000000), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ aes64im x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xbb3bdb7b00000000)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x6d76adf600000000), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ aes64im x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x6d76adf600000000)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xdaec41f700000000), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ aes64im x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xdaec41f700000000)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x090e0b0d00000000), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ aes64im x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x090e0b0d00000000)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x121c161a00000000), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ aes64im x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x121c161a00000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x24382c3400000000), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ aes64im x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x24382c3400000000)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x4870586800000000), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ aes64im x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x4870586800000000)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x90e0b0d000000000), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ aes64im x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x90e0b0d000000000)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x3bdb7bbb00000000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ aes64im x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x3bdb7bbb00000000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x76adf66d00000000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ aes64im x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x76adf66d00000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xec41f7da00000000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ aes64im x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xec41f7da00000000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0e0b0d0900000000), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ aes64im x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0e0b0d0900000000)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x1c161a1200000000), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ aes64im x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x1c161a1200000000)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x382c342400000000), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ aes64im x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x382c342400000000)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x7058684800000000), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ aes64im x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x7058684800000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xe0b0d09000000000), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ aes64im x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xe0b0d09000000000)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xdb7bbb3b00000000), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ aes64im x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xdb7bbb3b00000000)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xadf66d7600000000), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ aes64im x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xadf66d7600000000)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x41f7daec00000000), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ aes64im x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x41f7daec00000000)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ aes64im x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfffffffff4f2f6f1), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ aes64im x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xfffffffff4f2f6f1)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xffffffffe9e5ede3), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ aes64im x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xffffffffe9e5ede3)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xffffffffd3cbdbc7), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ aes64im x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xffffffffd3cbdbc7)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xffffffffa797b78f), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ aes64im x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0xffffffffa797b78f)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xffffffff4f2f6f1f), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ aes64im x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0xffffffff4f2f6f1f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xffffffff8444c424), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ aes64im x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xffffffff8444c424)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xffffffff09928952), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ aes64im x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffffffff09928952)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xffffffff082513be), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ aes64im x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xffffffff082513be)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xfffffffff2f6f1f4), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ aes64im x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfffffffff2f6f1f4)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xffffffffe5ede3e9), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ aes64im x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffffffffe5ede3e9)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xffffffffcbdbc7d3), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ aes64im x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xffffffffcbdbc7d3)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xffffffff97b78fa7), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ aes64im x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xffffffff97b78fa7)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xffffffff2f6f1f4f), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ aes64im x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffffffff2f6f1f4f)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xffffffff44c42484), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ aes64im x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffffffff44c42484)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xffffffff92895209), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ aes64im x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xffffffff92895209)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xffffffff2513be08), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ aes64im x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0xffffffff2513be08)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xfffffffff6f1f4f2), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ aes64im x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfffffffff6f1f4f2)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xffffffffede3e9e5), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ aes64im x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xffffffffede3e9e5)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xffffffffdbc7d3cb), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ aes64im x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xffffffffdbc7d3cb)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xffffffffb78fa797), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ aes64im x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xffffffffb78fa797)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xffffffff6f1f4f2f), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ aes64im x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0xffffffff6f1f4f2f)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffffffffc4248444), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ aes64im x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xffffffffc4248444)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xffffffff89520992), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ aes64im x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xffffffff89520992)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xffffffff13be0825), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ aes64im x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xffffffff13be0825)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xfffffffff1f4f2f6), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ aes64im x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffffffff1f4f2f6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xffffffffe3e9e5ed), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ aes64im x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffffffffe3e9e5ed)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xffffffffc7d3cbdb), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ aes64im x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xffffffffc7d3cbdb)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xffffffff8fa797b7), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ aes64im x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffffff8fa797b7)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffffff1f4f2f6f), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ aes64im x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xffffffff1f4f2f6f)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffffffff248444c4), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ aes64im x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xffffffff248444c4)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffffffff52099289), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ aes64im x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0xffffffff52099289)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xffffffffbe082513), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ aes64im x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0xffffffffbe082513)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xf4f2f6f1ffffffff), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ aes64im x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0xf4f2f6f1ffffffff)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xe9e5ede3ffffffff), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ aes64im x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0xe9e5ede3ffffffff)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xd3cbdbc7ffffffff), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ aes64im x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xd3cbdbc7ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xa797b78fffffffff), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ aes64im x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xa797b78fffffffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x4f2f6f1fffffffff), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ aes64im x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x4f2f6f1fffffffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x8444c424ffffffff), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ aes64im x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x8444c424ffffffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x09928952ffffffff), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ aes64im x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x09928952ffffffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x082513beffffffff), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ aes64im x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x082513beffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xf2f6f1f4ffffffff), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ aes64im x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xf2f6f1f4ffffffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xe5ede3e9ffffffff), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ aes64im x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xe5ede3e9ffffffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xcbdbc7d3ffffffff), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ aes64im x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xcbdbc7d3ffffffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x97b78fa7ffffffff), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ aes64im x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x97b78fa7ffffffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x2f6f1f4fffffffff), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ aes64im x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x2f6f1f4fffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x44c42484ffffffff), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ aes64im x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0x44c42484ffffffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x92895209ffffffff), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ aes64im x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0x92895209ffffffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x2513be08ffffffff), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ aes64im x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0x2513be08ffffffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xf6f1f4f2ffffffff), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ aes64im x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xf6f1f4f2ffffffff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xede3e9e5ffffffff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ aes64im x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xede3e9e5ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xdbc7d3cbffffffff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ aes64im x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xdbc7d3cbffffffff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xb78fa797ffffffff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ aes64im x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xb78fa797ffffffff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x6f1f4f2fffffffff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ aes64im x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x6f1f4f2fffffffff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xc4248444ffffffff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ aes64im x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xc4248444ffffffff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x89520992ffffffff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ aes64im x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x89520992ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x13be0825ffffffff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ aes64im x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x13be0825ffffffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xf1f4f2f6ffffffff), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ aes64im x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xf1f4f2f6ffffffff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xe3e9e5edffffffff), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ aes64im x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xe3e9e5edffffffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xc7d3cbdbffffffff), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ aes64im x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xc7d3cbdbffffffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x8fa797b7ffffffff), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ aes64im x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x8fa797b7ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x1f4f2f6fffffffff), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ aes64im x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x1f4f2f6fffffffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x248444c4ffffffff), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ aes64im x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x248444c4ffffffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x52099289ffffffff), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ aes64im x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x52099289ffffffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xbe082513ffffffff), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ aes64im x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xbe082513ffffffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ aes64im x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xffffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x000000000b0d090e), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ aes64im x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x000000000b0d090e)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x00000000161a121c), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ aes64im x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x00000000161a121c)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x000000002c342438), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ aes64im x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x000000002c342438)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000058684870), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ aes64im x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000058684870)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x00000000b0d090e0), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ aes64im x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000b0d090e0)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x000000007bbb3bdb), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ aes64im x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x000000007bbb3bdb)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x00000000f66d76ad), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ aes64im x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000f66d76ad)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x00000000f7daec41), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ aes64im x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000f7daec41)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x000000000d090e0b), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ aes64im x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x000000000d090e0b)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x000000001a121c16), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ aes64im x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x000000001a121c16)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x000000003424382c), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ aes64im x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x000000003424382c)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000068487058), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ aes64im x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000068487058)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x00000000d090e0b0), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ aes64im x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x00000000d090e0b0)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x00000000bb3bdb7b), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ aes64im x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x00000000bb3bdb7b)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x000000006d76adf6), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ aes64im x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x000000006d76adf6)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x00000000daec41f7), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ aes64im x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x00000000daec41f7)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x00000000090e0b0d), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ aes64im x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x00000000090e0b0d)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x00000000121c161a), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ aes64im x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x00000000121c161a)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000024382c34), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ aes64im x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0000000024382c34)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000048705868), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ aes64im x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000000048705868)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000090e0b0d0), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ aes64im x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000090e0b0d0)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x000000003bdb7bbb), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ aes64im x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x000000003bdb7bbb)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000076adf66d), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ aes64im x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000076adf66d)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x00000000ec41f7da), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ aes64im x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000ec41f7da)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x000000000e0b0d09), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ aes64im x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x000000000e0b0d09)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x000000001c161a12), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ aes64im x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x000000001c161a12)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x00000000382c3424), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ aes64im x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x00000000382c3424)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000070586848), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ aes64im x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000070586848)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x00000000e0b0d090), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ aes64im x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x00000000e0b0d090)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x00000000db7bbb3b), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ aes64im x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x00000000db7bbb3b)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x00000000adf66d76), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ aes64im x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x00000000adf66d76)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000041f7daec), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ aes64im x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000041f7daec)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0b0d090e00000000), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ aes64im x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0b0d090e00000000)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x161a121c00000000), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ aes64im x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x161a121c00000000)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x2c34243800000000), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ aes64im x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x2c34243800000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x5868487000000000), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ aes64im x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x5868487000000000)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0xb0d090e000000000), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ aes64im x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xb0d090e000000000)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x7bbb3bdb00000000), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ aes64im x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x7bbb3bdb00000000)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0xf66d76ad00000000), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ aes64im x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xf66d76ad00000000)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0xf7daec4100000000), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ aes64im x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xf7daec4100000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0d090e0b00000000), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ aes64im x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0d090e0b00000000)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x1a121c1600000000), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ aes64im x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x1a121c1600000000)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x3424382c00000000), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ aes64im x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x3424382c00000000)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x6848705800000000), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ aes64im x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x6848705800000000)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0xd090e0b000000000), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ aes64im x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0xd090e0b000000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0xbb3bdb7b00000000), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ aes64im x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xbb3bdb7b00000000)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x6d76adf600000000), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ aes64im x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x6d76adf600000000)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0xdaec41f700000000), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ aes64im x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0xdaec41f700000000)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x090e0b0d00000000), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ aes64im x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x090e0b0d00000000)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x121c161a00000000), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ aes64im x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x121c161a00000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x24382c3400000000), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ aes64im x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x24382c3400000000)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x4870586800000000), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ aes64im x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x4870586800000000)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x90e0b0d000000000), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ aes64im x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x90e0b0d000000000)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x3bdb7bbb00000000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ aes64im x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x3bdb7bbb00000000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x76adf66d00000000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ aes64im x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x76adf66d00000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0xec41f7da00000000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ aes64im x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xec41f7da00000000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0e0b0d0900000000), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ aes64im x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0e0b0d0900000000)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x1c161a1200000000), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ aes64im x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x1c161a1200000000)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x382c342400000000), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ aes64im x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x382c342400000000)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x7058684800000000), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ aes64im x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x7058684800000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0xe0b0d09000000000), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ aes64im x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0xe0b0d09000000000)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0xdb7bbb3b00000000), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ aes64im x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0xdb7bbb3b00000000)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0xadf66d7600000000), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ aes64im x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0xadf66d7600000000)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x41f7daec00000000), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ aes64im x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x41f7daec00000000)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ aes64im x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xfffffffff4f2f6f1), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ aes64im x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfffffffff4f2f6f1)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xffffffffe9e5ede3), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ aes64im x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xffffffffe9e5ede3)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xffffffffd3cbdbc7), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ aes64im x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffffffd3cbdbc7)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xffffffffa797b78f), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ aes64im x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffffffffa797b78f)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xffffffff4f2f6f1f), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ aes64im x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xffffffff4f2f6f1f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xffffffff8444c424), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ aes64im x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xffffffff8444c424)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xffffffff09928952), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ aes64im x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffffffff09928952)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xffffffff082513be), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ aes64im x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffffffff082513be)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xfffffffff2f6f1f4), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ aes64im x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xfffffffff2f6f1f4)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xffffffffe5ede3e9), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ aes64im x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xffffffffe5ede3e9)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xffffffffcbdbc7d3), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ aes64im x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xffffffffcbdbc7d3)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xffffffff97b78fa7), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ aes64im x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xffffffff97b78fa7)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffffffff2f6f1f4f), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ aes64im x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xffffffff2f6f1f4f)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffffffff44c42484), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ aes64im x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xffffffff44c42484)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffffffff92895209), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ aes64im x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xffffffff92895209)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xffffffff2513be08), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ aes64im x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xffffffff2513be08)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xfffffffff6f1f4f2), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ aes64im x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xfffffffff6f1f4f2)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xffffffffede3e9e5), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ aes64im x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xffffffffede3e9e5)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xffffffffdbc7d3cb), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ aes64im x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffffffffdbc7d3cb)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xffffffffb78fa797), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ aes64im x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffffffffb78fa797)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffffff6f1f4f2f), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ aes64im x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xffffffff6f1f4f2f)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffffffc4248444), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ aes64im x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffffffc4248444)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffffff89520992), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ aes64im x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xffffffff89520992)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffffff13be0825), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ aes64im x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xffffffff13be0825)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xfffffffff1f4f2f6), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ aes64im x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xfffffffff1f4f2f6)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xffffffffe3e9e5ed), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ aes64im x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xffffffffe3e9e5ed)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xffffffffc7d3cbdb), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ aes64im x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xffffffffc7d3cbdb)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xffffffff8fa797b7), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ aes64im x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xffffffff8fa797b7)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffff1f4f2f6f), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ aes64im x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0xffffffff1f4f2f6f)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffff248444c4), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ aes64im x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0xffffffff248444c4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffff52099289), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ aes64im x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xffffffff52099289)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xffffffffbe082513), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ aes64im x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffffffffbe082513)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xf4f2f6f1ffffffff), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ aes64im x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xf4f2f6f1ffffffff)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xe9e5ede3ffffffff), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ aes64im x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xe9e5ede3ffffffff)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xd3cbdbc7ffffffff), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ aes64im x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xd3cbdbc7ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xa797b78fffffffff), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ aes64im x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xa797b78fffffffff)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x4f2f6f1fffffffff), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ aes64im x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x4f2f6f1fffffffff)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x8444c424ffffffff), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ aes64im x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x8444c424ffffffff)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x09928952ffffffff), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ aes64im x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x09928952ffffffff)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x082513beffffffff), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ aes64im x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x082513beffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xf2f6f1f4ffffffff), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ aes64im x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0xf2f6f1f4ffffffff)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xe5ede3e9ffffffff), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ aes64im x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xe5ede3e9ffffffff)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xcbdbc7d3ffffffff), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ aes64im x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xcbdbc7d3ffffffff)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x97b78fa7ffffffff), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ aes64im x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x97b78fa7ffffffff)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x2f6f1f4fffffffff), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ aes64im x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x2f6f1f4fffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x44c42484ffffffff), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ aes64im x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x44c42484ffffffff)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x92895209ffffffff), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ aes64im x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x92895209ffffffff)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x2513be08ffffffff), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ aes64im x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x2513be08ffffffff)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xf6f1f4f2ffffffff), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ aes64im x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xf6f1f4f2ffffffff)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xede3e9e5ffffffff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ aes64im x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xede3e9e5ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xdbc7d3cbffffffff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ aes64im x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xdbc7d3cbffffffff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xb78fa797ffffffff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ aes64im x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xb78fa797ffffffff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x6f1f4f2fffffffff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ aes64im x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x6f1f4f2fffffffff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xc4248444ffffffff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ aes64im x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xc4248444ffffffff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x89520992ffffffff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ aes64im x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x89520992ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x13be0825ffffffff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ aes64im x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x13be0825ffffffff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xf1f4f2f6ffffffff), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ aes64im x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0xf1f4f2f6ffffffff)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xe3e9e5edffffffff), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ aes64im x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0xe3e9e5edffffffff)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xc7d3cbdbffffffff), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ aes64im x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0xc7d3cbdbffffffff)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x8fa797b7ffffffff), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ aes64im x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x8fa797b7ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x1f4f2f6fffffffff), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ aes64im x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x1f4f2f6fffffffff)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x248444c4ffffffff), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ aes64im x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x248444c4ffffffff)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x52099289ffffffff), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ aes64im x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x52099289ffffffff)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xbe082513ffffffff), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ aes64im x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xbe082513ffffffff)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ aes64im x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x8bb2dcd8f7741616), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ aes64im x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x8bb2dcd8f7741616)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ aes64im x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x9d2ea52132bc8652), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ aes64im x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x9d2ea52132bc8652)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ aes64im x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64IM-02.S b/riscof/suite/rv64i_m/K_unratified/AES64IM-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..9706c0c36901f99ecacce21302c0b914f6df6775
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64IM-02.S
@@ -0,0 +1,2548 @@
+// RISC-V Architectural Validation Test AES64IM-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64im'.
+// Using dataset: sbox64
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64im)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64im)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with dataset: sbox64
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000000000000000)
+ li x31, 0x0
+ aes64im x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x0000000000000000)
+
+ inst_1:
+ // Test 1: Test with dataset: sbox64
+ // result rd:x2(0x0101010101010101), rs1:x30(0x0101010101010101)
+ li x30, 0x101010101010101
+ aes64im x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x0101010101010101)
+
+ inst_2:
+ // Test 2: Test with dataset: sbox64
+ // result rd:x3(0x0202020202020202), rs1:x29(0x0202020202020202)
+ li x29, 0x202020202020202
+ aes64im x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0202020202020202)
+
+ inst_3:
+ // Test 3: Test with dataset: sbox64
+ // result rd:x4(0x0303030303030303), rs1:x28(0x0303030303030303)
+ li x28, 0x303030303030303
+ aes64im x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0303030303030303)
+
+ inst_4:
+ // Test 4: Test with dataset: sbox64
+ // result rd:x5(0x0404040404040404), rs1:x27(0x0404040404040404)
+ li x27, 0x404040404040404
+ aes64im x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0404040404040404)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with dataset: sbox64
+ // result rd:x6(0x0505050505050505), rs1:x26(0x0505050505050505)
+ li x26, 0x505050505050505
+ aes64im x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0505050505050505)
+
+ inst_6:
+ // Test 6: Test with dataset: sbox64
+ // result rd:x7(0x0606060606060606), rs1:x25(0x0606060606060606)
+ li x25, 0x606060606060606
+ aes64im x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0606060606060606)
+
+ inst_7:
+ // Test 7: Test with dataset: sbox64
+ // result rd:x8(0x0707070707070707), rs1:x24(0x0707070707070707)
+ li x24, 0x707070707070707
+ aes64im x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0707070707070707)
+
+ inst_8:
+ // Test 8: Test with dataset: sbox64
+ // result rd:x9(0x0808080808080808), rs1:x23(0x0808080808080808)
+ li x23, 0x808080808080808
+ aes64im x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0808080808080808)
+
+ inst_9:
+ // Test 9: Test with dataset: sbox64
+ // result rd:x10(0x0909090909090909), rs1:x22(0x0909090909090909)
+ li x22, 0x909090909090909
+ aes64im x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0909090909090909)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with dataset: sbox64
+ // result rd:x11(0x0a0a0a0a0a0a0a0a), rs1:x21(0x0a0a0a0a0a0a0a0a)
+ li x21, 0xa0a0a0a0a0a0a0a
+ aes64im x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0a0a0a0a0a0a0a0a)
+
+ inst_11:
+ // Test 11: Test with dataset: sbox64
+ // result rd:x12(0x0b0b0b0b0b0b0b0b), rs1:x20(0x0b0b0b0b0b0b0b0b)
+ li x20, 0xb0b0b0b0b0b0b0b
+ aes64im x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0b0b0b0b0b0b0b0b)
+
+ inst_12:
+ // Test 12: Test with dataset: sbox64
+ // result rd:x13(0x0c0c0c0c0c0c0c0c), rs1:x19(0x0c0c0c0c0c0c0c0c)
+ li x19, 0xc0c0c0c0c0c0c0c
+ aes64im x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0c0c0c0c0c0c0c0c)
+
+ inst_13:
+ // Test 13: Test with dataset: sbox64
+ // result rd:x14(0x0d0d0d0d0d0d0d0d), rs1:x18(0x0d0d0d0d0d0d0d0d)
+ li x18, 0xd0d0d0d0d0d0d0d
+ aes64im x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0d0d0d0d0d0d0d0d)
+
+ inst_14:
+ // Test 14: Test with dataset: sbox64
+ // result rd:x15(0x0e0e0e0e0e0e0e0e), rs1:x17(0x0e0e0e0e0e0e0e0e)
+ li x17, 0xe0e0e0e0e0e0e0e
+ aes64im x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0e0e0e0e0e0e0e0e)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with dataset: sbox64
+ // result rd:x16(0x0f0f0f0f0f0f0f0f), rs1:x16(0x0f0f0f0f0f0f0f0f)
+ li x16, 0xf0f0f0f0f0f0f0f
+ aes64im x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0f0f0f0f0f0f0f0f)
+
+ inst_16:
+ // Test 16: Test with dataset: sbox64
+ // result rd:x17(0x1010101010101010), rs1:x15(0x1010101010101010)
+ li x15, 0x1010101010101010
+ aes64im x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x1010101010101010)
+
+ inst_17:
+ // Test 17: Test with dataset: sbox64
+ // result rd:x18(0x1111111111111111), rs1:x14(0x1111111111111111)
+ li x14, 0x1111111111111111
+ aes64im x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x1111111111111111)
+
+ inst_18:
+ // Test 18: Test with dataset: sbox64
+ // result rd:x19(0x1212121212121212), rs1:x13(0x1212121212121212)
+ li x13, 0x1212121212121212
+ aes64im x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x1212121212121212)
+
+ inst_19:
+ // Test 19: Test with dataset: sbox64
+ // result rd:x20(0x1313131313131313), rs1:x12(0x1313131313131313)
+ li x12, 0x1313131313131313
+ aes64im x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x1313131313131313)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with dataset: sbox64
+ // result rd:x21(0x1414141414141414), rs1:x11(0x1414141414141414)
+ li x11, 0x1414141414141414
+ aes64im x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x1414141414141414)
+
+ inst_21:
+ // Test 21: Test with dataset: sbox64
+ // result rd:x22(0x1515151515151515), rs1:x10(0x1515151515151515)
+ li x10, 0x1515151515151515
+ aes64im x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x1515151515151515)
+
+ inst_22:
+ // Test 22: Test with dataset: sbox64
+ // result rd:x23(0x1616161616161616), rs1:x9(0x1616161616161616)
+ li x9, 0x1616161616161616
+ aes64im x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x1616161616161616)
+
+ inst_23:
+ // Test 23: Test with dataset: sbox64
+ // result rd:x24(0x1717171717171717), rs1:x8(0x1717171717171717)
+ li x8, 0x1717171717171717
+ aes64im x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x1717171717171717)
+
+ inst_24:
+ // Test 24: Test with dataset: sbox64
+ // result rd:x25(0x1818181818181818), rs1:x7(0x1818181818181818)
+ li x7, 0x1818181818181818
+ aes64im x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x1818181818181818)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with dataset: sbox64
+ // result rd:x26(0x1919191919191919), rs1:x6(0x1919191919191919)
+ li x6, 0x1919191919191919
+ aes64im x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x1919191919191919)
+
+ inst_26:
+ // Test 26: Test with dataset: sbox64
+ // result rd:x27(0x1a1a1a1a1a1a1a1a), rs1:x5(0x1a1a1a1a1a1a1a1a)
+ li x5, 0x1a1a1a1a1a1a1a1a
+ aes64im x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x1a1a1a1a1a1a1a1a)
+
+ inst_27:
+ // Test 27: Test with dataset: sbox64
+ // result rd:x28(0x1b1b1b1b1b1b1b1b), rs1:x4(0x1b1b1b1b1b1b1b1b)
+ li x4, 0x1b1b1b1b1b1b1b1b
+ aes64im x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x1b1b1b1b1b1b1b1b)
+
+ inst_28:
+ // Test 28: Test with dataset: sbox64
+ // result rd:x29(0x1c1c1c1c1c1c1c1c), rs1:x3(0x1c1c1c1c1c1c1c1c)
+ li x3, 0x1c1c1c1c1c1c1c1c
+ aes64im x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x1c1c1c1c1c1c1c1c)
+
+ inst_29:
+ // Test 29: Test with dataset: sbox64
+ // result rd:x30(0x1d1d1d1d1d1d1d1d), rs1:x2(0x1d1d1d1d1d1d1d1d)
+ li x2, 0x1d1d1d1d1d1d1d1d
+ aes64im x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x1d1d1d1d1d1d1d1d)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with dataset: sbox64
+ // result rd:x31(0x1e1e1e1e1e1e1e1e), rs1:x1(0x1e1e1e1e1e1e1e1e)
+ li x1, 0x1e1e1e1e1e1e1e1e
+ aes64im x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x1e1e1e1e1e1e1e1e)
+
+ inst_31:
+ // Test 31: Test with dataset: sbox64
+ // result rd:x1(0x1f1f1f1f1f1f1f1f), rs1:x31(0x1f1f1f1f1f1f1f1f)
+ li x31, 0x1f1f1f1f1f1f1f1f
+ aes64im x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x1f1f1f1f1f1f1f1f)
+
+ inst_32:
+ // Test 32: Test with dataset: sbox64
+ // result rd:x2(0x2020202020202020), rs1:x30(0x2020202020202020)
+ li x30, 0x2020202020202020
+ aes64im x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x2020202020202020)
+
+ inst_33:
+ // Test 33: Test with dataset: sbox64
+ // result rd:x3(0x2121212121212121), rs1:x29(0x2121212121212121)
+ li x29, 0x2121212121212121
+ aes64im x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x2121212121212121)
+
+ inst_34:
+ // Test 34: Test with dataset: sbox64
+ // result rd:x4(0x2222222222222222), rs1:x28(0x2222222222222222)
+ li x28, 0x2222222222222222
+ aes64im x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x2222222222222222)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with dataset: sbox64
+ // result rd:x5(0x2323232323232323), rs1:x27(0x2323232323232323)
+ li x27, 0x2323232323232323
+ aes64im x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x2323232323232323)
+
+ inst_36:
+ // Test 36: Test with dataset: sbox64
+ // result rd:x6(0x2424242424242424), rs1:x26(0x2424242424242424)
+ li x26, 0x2424242424242424
+ aes64im x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x2424242424242424)
+
+ inst_37:
+ // Test 37: Test with dataset: sbox64
+ // result rd:x7(0x2525252525252525), rs1:x25(0x2525252525252525)
+ li x25, 0x2525252525252525
+ aes64im x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x2525252525252525)
+
+ inst_38:
+ // Test 38: Test with dataset: sbox64
+ // result rd:x8(0x2626262626262626), rs1:x24(0x2626262626262626)
+ li x24, 0x2626262626262626
+ aes64im x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x2626262626262626)
+
+ inst_39:
+ // Test 39: Test with dataset: sbox64
+ // result rd:x9(0x2727272727272727), rs1:x23(0x2727272727272727)
+ li x23, 0x2727272727272727
+ aes64im x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x2727272727272727)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with dataset: sbox64
+ // result rd:x10(0x2828282828282828), rs1:x22(0x2828282828282828)
+ li x22, 0x2828282828282828
+ aes64im x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x2828282828282828)
+
+ inst_41:
+ // Test 41: Test with dataset: sbox64
+ // result rd:x11(0x2929292929292929), rs1:x21(0x2929292929292929)
+ li x21, 0x2929292929292929
+ aes64im x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x2929292929292929)
+
+ inst_42:
+ // Test 42: Test with dataset: sbox64
+ // result rd:x12(0x2a2a2a2a2a2a2a2a), rs1:x20(0x2a2a2a2a2a2a2a2a)
+ li x20, 0x2a2a2a2a2a2a2a2a
+ aes64im x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x2a2a2a2a2a2a2a2a)
+
+ inst_43:
+ // Test 43: Test with dataset: sbox64
+ // result rd:x13(0x2b2b2b2b2b2b2b2b), rs1:x19(0x2b2b2b2b2b2b2b2b)
+ li x19, 0x2b2b2b2b2b2b2b2b
+ aes64im x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x2b2b2b2b2b2b2b2b)
+
+ inst_44:
+ // Test 44: Test with dataset: sbox64
+ // result rd:x14(0x2c2c2c2c2c2c2c2c), rs1:x18(0x2c2c2c2c2c2c2c2c)
+ li x18, 0x2c2c2c2c2c2c2c2c
+ aes64im x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x2c2c2c2c2c2c2c2c)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with dataset: sbox64
+ // result rd:x15(0x2d2d2d2d2d2d2d2d), rs1:x17(0x2d2d2d2d2d2d2d2d)
+ li x17, 0x2d2d2d2d2d2d2d2d
+ aes64im x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x2d2d2d2d2d2d2d2d)
+
+ inst_46:
+ // Test 46: Test with dataset: sbox64
+ // result rd:x16(0x2e2e2e2e2e2e2e2e), rs1:x16(0x2e2e2e2e2e2e2e2e)
+ li x16, 0x2e2e2e2e2e2e2e2e
+ aes64im x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x2e2e2e2e2e2e2e2e)
+
+ inst_47:
+ // Test 47: Test with dataset: sbox64
+ // result rd:x17(0x2f2f2f2f2f2f2f2f), rs1:x15(0x2f2f2f2f2f2f2f2f)
+ li x15, 0x2f2f2f2f2f2f2f2f
+ aes64im x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x2f2f2f2f2f2f2f2f)
+
+ inst_48:
+ // Test 48: Test with dataset: sbox64
+ // result rd:x18(0x3030303030303030), rs1:x14(0x3030303030303030)
+ li x14, 0x3030303030303030
+ aes64im x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x3030303030303030)
+
+ inst_49:
+ // Test 49: Test with dataset: sbox64
+ // result rd:x19(0x3131313131313131), rs1:x13(0x3131313131313131)
+ li x13, 0x3131313131313131
+ aes64im x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x3131313131313131)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with dataset: sbox64
+ // result rd:x20(0x3232323232323232), rs1:x12(0x3232323232323232)
+ li x12, 0x3232323232323232
+ aes64im x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x3232323232323232)
+
+ inst_51:
+ // Test 51: Test with dataset: sbox64
+ // result rd:x21(0x3333333333333333), rs1:x11(0x3333333333333333)
+ li x11, 0x3333333333333333
+ aes64im x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x3333333333333333)
+
+ inst_52:
+ // Test 52: Test with dataset: sbox64
+ // result rd:x22(0x3434343434343434), rs1:x10(0x3434343434343434)
+ li x10, 0x3434343434343434
+ aes64im x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x3434343434343434)
+
+ inst_53:
+ // Test 53: Test with dataset: sbox64
+ // result rd:x23(0x3535353535353535), rs1:x9(0x3535353535353535)
+ li x9, 0x3535353535353535
+ aes64im x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x3535353535353535)
+
+ inst_54:
+ // Test 54: Test with dataset: sbox64
+ // result rd:x24(0x3636363636363636), rs1:x8(0x3636363636363636)
+ li x8, 0x3636363636363636
+ aes64im x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x3636363636363636)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with dataset: sbox64
+ // result rd:x25(0x3737373737373737), rs1:x7(0x3737373737373737)
+ li x7, 0x3737373737373737
+ aes64im x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x3737373737373737)
+
+ inst_56:
+ // Test 56: Test with dataset: sbox64
+ // result rd:x26(0x3838383838383838), rs1:x6(0x3838383838383838)
+ li x6, 0x3838383838383838
+ aes64im x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x3838383838383838)
+
+ inst_57:
+ // Test 57: Test with dataset: sbox64
+ // result rd:x27(0x3939393939393939), rs1:x5(0x3939393939393939)
+ li x5, 0x3939393939393939
+ aes64im x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x3939393939393939)
+
+ inst_58:
+ // Test 58: Test with dataset: sbox64
+ // result rd:x28(0x3a3a3a3a3a3a3a3a), rs1:x4(0x3a3a3a3a3a3a3a3a)
+ li x4, 0x3a3a3a3a3a3a3a3a
+ aes64im x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x3a3a3a3a3a3a3a3a)
+
+ inst_59:
+ // Test 59: Test with dataset: sbox64
+ // result rd:x29(0x3b3b3b3b3b3b3b3b), rs1:x3(0x3b3b3b3b3b3b3b3b)
+ li x3, 0x3b3b3b3b3b3b3b3b
+ aes64im x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x3b3b3b3b3b3b3b3b)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with dataset: sbox64
+ // result rd:x30(0x3c3c3c3c3c3c3c3c), rs1:x2(0x3c3c3c3c3c3c3c3c)
+ li x2, 0x3c3c3c3c3c3c3c3c
+ aes64im x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x3c3c3c3c3c3c3c3c)
+
+ inst_61:
+ // Test 61: Test with dataset: sbox64
+ // result rd:x31(0x3d3d3d3d3d3d3d3d), rs1:x1(0x3d3d3d3d3d3d3d3d)
+ li x1, 0x3d3d3d3d3d3d3d3d
+ aes64im x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x3d3d3d3d3d3d3d3d)
+
+ inst_62:
+ // Test 62: Test with dataset: sbox64
+ // result rd:x1(0x3e3e3e3e3e3e3e3e), rs1:x31(0x3e3e3e3e3e3e3e3e)
+ li x31, 0x3e3e3e3e3e3e3e3e
+ aes64im x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x3e3e3e3e3e3e3e3e)
+
+ inst_63:
+ // Test 63: Test with dataset: sbox64
+ // result rd:x2(0x3f3f3f3f3f3f3f3f), rs1:x30(0x3f3f3f3f3f3f3f3f)
+ li x30, 0x3f3f3f3f3f3f3f3f
+ aes64im x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x3f3f3f3f3f3f3f3f)
+
+ inst_64:
+ // Test 64: Test with dataset: sbox64
+ // result rd:x3(0x4040404040404040), rs1:x29(0x4040404040404040)
+ li x29, 0x4040404040404040
+ aes64im x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x4040404040404040)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with dataset: sbox64
+ // result rd:x4(0x4141414141414141), rs1:x28(0x4141414141414141)
+ li x28, 0x4141414141414141
+ aes64im x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x4141414141414141)
+
+ inst_66:
+ // Test 66: Test with dataset: sbox64
+ // result rd:x5(0x4242424242424242), rs1:x27(0x4242424242424242)
+ li x27, 0x4242424242424242
+ aes64im x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x4242424242424242)
+
+ inst_67:
+ // Test 67: Test with dataset: sbox64
+ // result rd:x6(0x4343434343434343), rs1:x26(0x4343434343434343)
+ li x26, 0x4343434343434343
+ aes64im x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x4343434343434343)
+
+ inst_68:
+ // Test 68: Test with dataset: sbox64
+ // result rd:x7(0x4444444444444444), rs1:x25(0x4444444444444444)
+ li x25, 0x4444444444444444
+ aes64im x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x4444444444444444)
+
+ inst_69:
+ // Test 69: Test with dataset: sbox64
+ // result rd:x8(0x4545454545454545), rs1:x24(0x4545454545454545)
+ li x24, 0x4545454545454545
+ aes64im x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x4545454545454545)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with dataset: sbox64
+ // result rd:x9(0x4646464646464646), rs1:x23(0x4646464646464646)
+ li x23, 0x4646464646464646
+ aes64im x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x4646464646464646)
+
+ inst_71:
+ // Test 71: Test with dataset: sbox64
+ // result rd:x10(0x4747474747474747), rs1:x22(0x4747474747474747)
+ li x22, 0x4747474747474747
+ aes64im x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x4747474747474747)
+
+ inst_72:
+ // Test 72: Test with dataset: sbox64
+ // result rd:x11(0x4848484848484848), rs1:x21(0x4848484848484848)
+ li x21, 0x4848484848484848
+ aes64im x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x4848484848484848)
+
+ inst_73:
+ // Test 73: Test with dataset: sbox64
+ // result rd:x12(0x4949494949494949), rs1:x20(0x4949494949494949)
+ li x20, 0x4949494949494949
+ aes64im x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x4949494949494949)
+
+ inst_74:
+ // Test 74: Test with dataset: sbox64
+ // result rd:x13(0x4a4a4a4a4a4a4a4a), rs1:x19(0x4a4a4a4a4a4a4a4a)
+ li x19, 0x4a4a4a4a4a4a4a4a
+ aes64im x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x4a4a4a4a4a4a4a4a)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with dataset: sbox64
+ // result rd:x14(0x4b4b4b4b4b4b4b4b), rs1:x18(0x4b4b4b4b4b4b4b4b)
+ li x18, 0x4b4b4b4b4b4b4b4b
+ aes64im x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x4b4b4b4b4b4b4b4b)
+
+ inst_76:
+ // Test 76: Test with dataset: sbox64
+ // result rd:x15(0x4c4c4c4c4c4c4c4c), rs1:x17(0x4c4c4c4c4c4c4c4c)
+ li x17, 0x4c4c4c4c4c4c4c4c
+ aes64im x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x4c4c4c4c4c4c4c4c)
+
+ inst_77:
+ // Test 77: Test with dataset: sbox64
+ // result rd:x16(0x4d4d4d4d4d4d4d4d), rs1:x16(0x4d4d4d4d4d4d4d4d)
+ li x16, 0x4d4d4d4d4d4d4d4d
+ aes64im x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x4d4d4d4d4d4d4d4d)
+
+ inst_78:
+ // Test 78: Test with dataset: sbox64
+ // result rd:x17(0x4e4e4e4e4e4e4e4e), rs1:x15(0x4e4e4e4e4e4e4e4e)
+ li x15, 0x4e4e4e4e4e4e4e4e
+ aes64im x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x4e4e4e4e4e4e4e4e)
+
+ inst_79:
+ // Test 79: Test with dataset: sbox64
+ // result rd:x18(0x4f4f4f4f4f4f4f4f), rs1:x14(0x4f4f4f4f4f4f4f4f)
+ li x14, 0x4f4f4f4f4f4f4f4f
+ aes64im x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x4f4f4f4f4f4f4f4f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with dataset: sbox64
+ // result rd:x19(0x5050505050505050), rs1:x13(0x5050505050505050)
+ li x13, 0x5050505050505050
+ aes64im x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x5050505050505050)
+
+ inst_81:
+ // Test 81: Test with dataset: sbox64
+ // result rd:x20(0x5151515151515151), rs1:x12(0x5151515151515151)
+ li x12, 0x5151515151515151
+ aes64im x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x5151515151515151)
+
+ inst_82:
+ // Test 82: Test with dataset: sbox64
+ // result rd:x21(0x5252525252525252), rs1:x11(0x5252525252525252)
+ li x11, 0x5252525252525252
+ aes64im x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x5252525252525252)
+
+ inst_83:
+ // Test 83: Test with dataset: sbox64
+ // result rd:x22(0x5353535353535353), rs1:x10(0x5353535353535353)
+ li x10, 0x5353535353535353
+ aes64im x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x5353535353535353)
+
+ inst_84:
+ // Test 84: Test with dataset: sbox64
+ // result rd:x23(0x5454545454545454), rs1:x9(0x5454545454545454)
+ li x9, 0x5454545454545454
+ aes64im x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x5454545454545454)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with dataset: sbox64
+ // result rd:x24(0x5555555555555555), rs1:x8(0x5555555555555555)
+ li x8, 0x5555555555555555
+ aes64im x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x5555555555555555)
+
+ inst_86:
+ // Test 86: Test with dataset: sbox64
+ // result rd:x25(0x5656565656565656), rs1:x7(0x5656565656565656)
+ li x7, 0x5656565656565656
+ aes64im x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x5656565656565656)
+
+ inst_87:
+ // Test 87: Test with dataset: sbox64
+ // result rd:x26(0x5757575757575757), rs1:x6(0x5757575757575757)
+ li x6, 0x5757575757575757
+ aes64im x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x5757575757575757)
+
+ inst_88:
+ // Test 88: Test with dataset: sbox64
+ // result rd:x27(0x5858585858585858), rs1:x5(0x5858585858585858)
+ li x5, 0x5858585858585858
+ aes64im x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x5858585858585858)
+
+ inst_89:
+ // Test 89: Test with dataset: sbox64
+ // result rd:x28(0x5959595959595959), rs1:x4(0x5959595959595959)
+ li x4, 0x5959595959595959
+ aes64im x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x5959595959595959)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with dataset: sbox64
+ // result rd:x29(0x5a5a5a5a5a5a5a5a), rs1:x3(0x5a5a5a5a5a5a5a5a)
+ li x3, 0x5a5a5a5a5a5a5a5a
+ aes64im x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x5a5a5a5a5a5a5a5a)
+
+ inst_91:
+ // Test 91: Test with dataset: sbox64
+ // result rd:x30(0x5b5b5b5b5b5b5b5b), rs1:x2(0x5b5b5b5b5b5b5b5b)
+ li x2, 0x5b5b5b5b5b5b5b5b
+ aes64im x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x5b5b5b5b5b5b5b5b)
+
+ inst_92:
+ // Test 92: Test with dataset: sbox64
+ // result rd:x31(0x5c5c5c5c5c5c5c5c), rs1:x1(0x5c5c5c5c5c5c5c5c)
+ li x1, 0x5c5c5c5c5c5c5c5c
+ aes64im x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x5c5c5c5c5c5c5c5c)
+
+ inst_93:
+ // Test 93: Test with dataset: sbox64
+ // result rd:x1(0x5d5d5d5d5d5d5d5d), rs1:x31(0x5d5d5d5d5d5d5d5d)
+ li x31, 0x5d5d5d5d5d5d5d5d
+ aes64im x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x5d5d5d5d5d5d5d5d)
+
+ inst_94:
+ // Test 94: Test with dataset: sbox64
+ // result rd:x2(0x5e5e5e5e5e5e5e5e), rs1:x30(0x5e5e5e5e5e5e5e5e)
+ li x30, 0x5e5e5e5e5e5e5e5e
+ aes64im x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x5e5e5e5e5e5e5e5e)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with dataset: sbox64
+ // result rd:x3(0x5f5f5f5f5f5f5f5f), rs1:x29(0x5f5f5f5f5f5f5f5f)
+ li x29, 0x5f5f5f5f5f5f5f5f
+ aes64im x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x5f5f5f5f5f5f5f5f)
+
+ inst_96:
+ // Test 96: Test with dataset: sbox64
+ // result rd:x4(0x6060606060606060), rs1:x28(0x6060606060606060)
+ li x28, 0x6060606060606060
+ aes64im x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x6060606060606060)
+
+ inst_97:
+ // Test 97: Test with dataset: sbox64
+ // result rd:x5(0x6161616161616161), rs1:x27(0x6161616161616161)
+ li x27, 0x6161616161616161
+ aes64im x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x6161616161616161)
+
+ inst_98:
+ // Test 98: Test with dataset: sbox64
+ // result rd:x6(0x6262626262626262), rs1:x26(0x6262626262626262)
+ li x26, 0x6262626262626262
+ aes64im x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x6262626262626262)
+
+ inst_99:
+ // Test 99: Test with dataset: sbox64
+ // result rd:x7(0x6363636363636363), rs1:x25(0x6363636363636363)
+ li x25, 0x6363636363636363
+ aes64im x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x6363636363636363)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with dataset: sbox64
+ // result rd:x8(0x6464646464646464), rs1:x24(0x6464646464646464)
+ li x24, 0x6464646464646464
+ aes64im x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x6464646464646464)
+
+ inst_101:
+ // Test 101: Test with dataset: sbox64
+ // result rd:x9(0x6565656565656565), rs1:x23(0x6565656565656565)
+ li x23, 0x6565656565656565
+ aes64im x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x6565656565656565)
+
+ inst_102:
+ // Test 102: Test with dataset: sbox64
+ // result rd:x10(0x6666666666666666), rs1:x22(0x6666666666666666)
+ li x22, 0x6666666666666666
+ aes64im x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x6666666666666666)
+
+ inst_103:
+ // Test 103: Test with dataset: sbox64
+ // result rd:x11(0x6767676767676767), rs1:x21(0x6767676767676767)
+ li x21, 0x6767676767676767
+ aes64im x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x6767676767676767)
+
+ inst_104:
+ // Test 104: Test with dataset: sbox64
+ // result rd:x12(0x6868686868686868), rs1:x20(0x6868686868686868)
+ li x20, 0x6868686868686868
+ aes64im x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x6868686868686868)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with dataset: sbox64
+ // result rd:x13(0x6969696969696969), rs1:x19(0x6969696969696969)
+ li x19, 0x6969696969696969
+ aes64im x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x6969696969696969)
+
+ inst_106:
+ // Test 106: Test with dataset: sbox64
+ // result rd:x14(0x6a6a6a6a6a6a6a6a), rs1:x18(0x6a6a6a6a6a6a6a6a)
+ li x18, 0x6a6a6a6a6a6a6a6a
+ aes64im x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x6a6a6a6a6a6a6a6a)
+
+ inst_107:
+ // Test 107: Test with dataset: sbox64
+ // result rd:x15(0x6b6b6b6b6b6b6b6b), rs1:x17(0x6b6b6b6b6b6b6b6b)
+ li x17, 0x6b6b6b6b6b6b6b6b
+ aes64im x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x6b6b6b6b6b6b6b6b)
+
+ inst_108:
+ // Test 108: Test with dataset: sbox64
+ // result rd:x16(0x6c6c6c6c6c6c6c6c), rs1:x16(0x6c6c6c6c6c6c6c6c)
+ li x16, 0x6c6c6c6c6c6c6c6c
+ aes64im x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x6c6c6c6c6c6c6c6c)
+
+ inst_109:
+ // Test 109: Test with dataset: sbox64
+ // result rd:x17(0x6d6d6d6d6d6d6d6d), rs1:x15(0x6d6d6d6d6d6d6d6d)
+ li x15, 0x6d6d6d6d6d6d6d6d
+ aes64im x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x6d6d6d6d6d6d6d6d)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with dataset: sbox64
+ // result rd:x18(0x6e6e6e6e6e6e6e6e), rs1:x14(0x6e6e6e6e6e6e6e6e)
+ li x14, 0x6e6e6e6e6e6e6e6e
+ aes64im x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x6e6e6e6e6e6e6e6e)
+
+ inst_111:
+ // Test 111: Test with dataset: sbox64
+ // result rd:x19(0x6f6f6f6f6f6f6f6f), rs1:x13(0x6f6f6f6f6f6f6f6f)
+ li x13, 0x6f6f6f6f6f6f6f6f
+ aes64im x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x6f6f6f6f6f6f6f6f)
+
+ inst_112:
+ // Test 112: Test with dataset: sbox64
+ // result rd:x20(0x7070707070707070), rs1:x12(0x7070707070707070)
+ li x12, 0x7070707070707070
+ aes64im x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x7070707070707070)
+
+ inst_113:
+ // Test 113: Test with dataset: sbox64
+ // result rd:x21(0x7171717171717171), rs1:x11(0x7171717171717171)
+ li x11, 0x7171717171717171
+ aes64im x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x7171717171717171)
+
+ inst_114:
+ // Test 114: Test with dataset: sbox64
+ // result rd:x22(0x7272727272727272), rs1:x10(0x7272727272727272)
+ li x10, 0x7272727272727272
+ aes64im x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x7272727272727272)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with dataset: sbox64
+ // result rd:x23(0x7373737373737373), rs1:x9(0x7373737373737373)
+ li x9, 0x7373737373737373
+ aes64im x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x7373737373737373)
+
+ inst_116:
+ // Test 116: Test with dataset: sbox64
+ // result rd:x24(0x7474747474747474), rs1:x8(0x7474747474747474)
+ li x8, 0x7474747474747474
+ aes64im x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x7474747474747474)
+
+ inst_117:
+ // Test 117: Test with dataset: sbox64
+ // result rd:x25(0x7575757575757575), rs1:x7(0x7575757575757575)
+ li x7, 0x7575757575757575
+ aes64im x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x7575757575757575)
+
+ inst_118:
+ // Test 118: Test with dataset: sbox64
+ // result rd:x26(0x7676767676767676), rs1:x6(0x7676767676767676)
+ li x6, 0x7676767676767676
+ aes64im x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x7676767676767676)
+
+ inst_119:
+ // Test 119: Test with dataset: sbox64
+ // result rd:x27(0x7777777777777777), rs1:x5(0x7777777777777777)
+ li x5, 0x7777777777777777
+ aes64im x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x7777777777777777)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with dataset: sbox64
+ // result rd:x28(0x7878787878787878), rs1:x4(0x7878787878787878)
+ li x4, 0x7878787878787878
+ aes64im x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0x7878787878787878)
+
+ inst_121:
+ // Test 121: Test with dataset: sbox64
+ // result rd:x29(0x7979797979797979), rs1:x3(0x7979797979797979)
+ li x3, 0x7979797979797979
+ aes64im x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0x7979797979797979)
+
+ inst_122:
+ // Test 122: Test with dataset: sbox64
+ // result rd:x30(0x7a7a7a7a7a7a7a7a), rs1:x2(0x7a7a7a7a7a7a7a7a)
+ li x2, 0x7a7a7a7a7a7a7a7a
+ aes64im x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0x7a7a7a7a7a7a7a7a)
+
+ inst_123:
+ // Test 123: Test with dataset: sbox64
+ // result rd:x31(0x7b7b7b7b7b7b7b7b), rs1:x1(0x7b7b7b7b7b7b7b7b)
+ li x1, 0x7b7b7b7b7b7b7b7b
+ aes64im x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x7b7b7b7b7b7b7b7b)
+
+ inst_124:
+ // Test 124: Test with dataset: sbox64
+ // result rd:x1(0x7c7c7c7c7c7c7c7c), rs1:x31(0x7c7c7c7c7c7c7c7c)
+ li x31, 0x7c7c7c7c7c7c7c7c
+ aes64im x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x7c7c7c7c7c7c7c7c)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with dataset: sbox64
+ // result rd:x2(0x7d7d7d7d7d7d7d7d), rs1:x30(0x7d7d7d7d7d7d7d7d)
+ li x30, 0x7d7d7d7d7d7d7d7d
+ aes64im x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x7d7d7d7d7d7d7d7d)
+
+ inst_126:
+ // Test 126: Test with dataset: sbox64
+ // result rd:x3(0x7e7e7e7e7e7e7e7e), rs1:x29(0x7e7e7e7e7e7e7e7e)
+ li x29, 0x7e7e7e7e7e7e7e7e
+ aes64im x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x7e7e7e7e7e7e7e7e)
+
+ inst_127:
+ // Test 127: Test with dataset: sbox64
+ // result rd:x4(0x7f7f7f7f7f7f7f7f), rs1:x28(0x7f7f7f7f7f7f7f7f)
+ li x28, 0x7f7f7f7f7f7f7f7f
+ aes64im x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x7f7f7f7f7f7f7f7f)
+
+ inst_128:
+ // Test 128: Test with dataset: sbox64
+ // result rd:x5(0x8080808080808080), rs1:x27(0x8080808080808080)
+ li x27, 0x8080808080808080
+ aes64im x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x8080808080808080)
+
+ inst_129:
+ // Test 129: Test with dataset: sbox64
+ // result rd:x6(0x8181818181818181), rs1:x26(0x8181818181818181)
+ li x26, 0x8181818181818181
+ aes64im x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x8181818181818181)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with dataset: sbox64
+ // result rd:x7(0x8282828282828282), rs1:x25(0x8282828282828282)
+ li x25, 0x8282828282828282
+ aes64im x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x8282828282828282)
+
+ inst_131:
+ // Test 131: Test with dataset: sbox64
+ // result rd:x8(0x8383838383838383), rs1:x24(0x8383838383838383)
+ li x24, 0x8383838383838383
+ aes64im x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x8383838383838383)
+
+ inst_132:
+ // Test 132: Test with dataset: sbox64
+ // result rd:x9(0x8484848484848484), rs1:x23(0x8484848484848484)
+ li x23, 0x8484848484848484
+ aes64im x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x8484848484848484)
+
+ inst_133:
+ // Test 133: Test with dataset: sbox64
+ // result rd:x10(0x8585858585858585), rs1:x22(0x8585858585858585)
+ li x22, 0x8585858585858585
+ aes64im x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x8585858585858585)
+
+ inst_134:
+ // Test 134: Test with dataset: sbox64
+ // result rd:x11(0x8686868686868686), rs1:x21(0x8686868686868686)
+ li x21, 0x8686868686868686
+ aes64im x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x8686868686868686)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with dataset: sbox64
+ // result rd:x12(0x8787878787878787), rs1:x20(0x8787878787878787)
+ li x20, 0x8787878787878787
+ aes64im x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x8787878787878787)
+
+ inst_136:
+ // Test 136: Test with dataset: sbox64
+ // result rd:x13(0x8888888888888888), rs1:x19(0x8888888888888888)
+ li x19, 0x8888888888888888
+ aes64im x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x8888888888888888)
+
+ inst_137:
+ // Test 137: Test with dataset: sbox64
+ // result rd:x14(0x8989898989898989), rs1:x18(0x8989898989898989)
+ li x18, 0x8989898989898989
+ aes64im x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x8989898989898989)
+
+ inst_138:
+ // Test 138: Test with dataset: sbox64
+ // result rd:x15(0x8a8a8a8a8a8a8a8a), rs1:x17(0x8a8a8a8a8a8a8a8a)
+ li x17, 0x8a8a8a8a8a8a8a8a
+ aes64im x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x8a8a8a8a8a8a8a8a)
+
+ inst_139:
+ // Test 139: Test with dataset: sbox64
+ // result rd:x16(0x8b8b8b8b8b8b8b8b), rs1:x16(0x8b8b8b8b8b8b8b8b)
+ li x16, 0x8b8b8b8b8b8b8b8b
+ aes64im x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0x8b8b8b8b8b8b8b8b)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with dataset: sbox64
+ // result rd:x17(0x8c8c8c8c8c8c8c8c), rs1:x15(0x8c8c8c8c8c8c8c8c)
+ li x15, 0x8c8c8c8c8c8c8c8c
+ aes64im x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x8c8c8c8c8c8c8c8c)
+
+ inst_141:
+ // Test 141: Test with dataset: sbox64
+ // result rd:x18(0x8d8d8d8d8d8d8d8d), rs1:x14(0x8d8d8d8d8d8d8d8d)
+ li x14, 0x8d8d8d8d8d8d8d8d
+ aes64im x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x8d8d8d8d8d8d8d8d)
+
+ inst_142:
+ // Test 142: Test with dataset: sbox64
+ // result rd:x19(0x8e8e8e8e8e8e8e8e), rs1:x13(0x8e8e8e8e8e8e8e8e)
+ li x13, 0x8e8e8e8e8e8e8e8e
+ aes64im x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x8e8e8e8e8e8e8e8e)
+
+ inst_143:
+ // Test 143: Test with dataset: sbox64
+ // result rd:x20(0x8f8f8f8f8f8f8f8f), rs1:x12(0x8f8f8f8f8f8f8f8f)
+ li x12, 0x8f8f8f8f8f8f8f8f
+ aes64im x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x8f8f8f8f8f8f8f8f)
+
+ inst_144:
+ // Test 144: Test with dataset: sbox64
+ // result rd:x21(0x9090909090909090), rs1:x11(0x9090909090909090)
+ li x11, 0x9090909090909090
+ aes64im x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x9090909090909090)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with dataset: sbox64
+ // result rd:x22(0x9191919191919191), rs1:x10(0x9191919191919191)
+ li x10, 0x9191919191919191
+ aes64im x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x9191919191919191)
+
+ inst_146:
+ // Test 146: Test with dataset: sbox64
+ // result rd:x23(0x9292929292929292), rs1:x9(0x9292929292929292)
+ li x9, 0x9292929292929292
+ aes64im x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x9292929292929292)
+
+ inst_147:
+ // Test 147: Test with dataset: sbox64
+ // result rd:x24(0x9393939393939393), rs1:x8(0x9393939393939393)
+ li x8, 0x9393939393939393
+ aes64im x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x9393939393939393)
+
+ inst_148:
+ // Test 148: Test with dataset: sbox64
+ // result rd:x25(0x9494949494949494), rs1:x7(0x9494949494949494)
+ li x7, 0x9494949494949494
+ aes64im x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x9494949494949494)
+
+ inst_149:
+ // Test 149: Test with dataset: sbox64
+ // result rd:x26(0x9595959595959595), rs1:x6(0x9595959595959595)
+ li x6, 0x9595959595959595
+ aes64im x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x9595959595959595)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with dataset: sbox64
+ // result rd:x27(0x9696969696969696), rs1:x5(0x9696969696969696)
+ li x5, 0x9696969696969696
+ aes64im x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x9696969696969696)
+
+ inst_151:
+ // Test 151: Test with dataset: sbox64
+ // result rd:x28(0x9797979797979797), rs1:x4(0x9797979797979797)
+ li x4, 0x9797979797979797
+ aes64im x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x9797979797979797)
+
+ inst_152:
+ // Test 152: Test with dataset: sbox64
+ // result rd:x29(0x9898989898989898), rs1:x3(0x9898989898989898)
+ li x3, 0x9898989898989898
+ aes64im x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x9898989898989898)
+
+ inst_153:
+ // Test 153: Test with dataset: sbox64
+ // result rd:x30(0x9999999999999999), rs1:x2(0x9999999999999999)
+ li x2, 0x9999999999999999
+ aes64im x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x9999999999999999)
+
+ inst_154:
+ // Test 154: Test with dataset: sbox64
+ // result rd:x31(0x9a9a9a9a9a9a9a9a), rs1:x1(0x9a9a9a9a9a9a9a9a)
+ li x1, 0x9a9a9a9a9a9a9a9a
+ aes64im x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x9a9a9a9a9a9a9a9a)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with dataset: sbox64
+ // result rd:x1(0x9b9b9b9b9b9b9b9b), rs1:x31(0x9b9b9b9b9b9b9b9b)
+ li x31, 0x9b9b9b9b9b9b9b9b
+ aes64im x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x9b9b9b9b9b9b9b9b)
+
+ inst_156:
+ // Test 156: Test with dataset: sbox64
+ // result rd:x2(0x9c9c9c9c9c9c9c9c), rs1:x30(0x9c9c9c9c9c9c9c9c)
+ li x30, 0x9c9c9c9c9c9c9c9c
+ aes64im x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x9c9c9c9c9c9c9c9c)
+
+ inst_157:
+ // Test 157: Test with dataset: sbox64
+ // result rd:x3(0x9d9d9d9d9d9d9d9d), rs1:x29(0x9d9d9d9d9d9d9d9d)
+ li x29, 0x9d9d9d9d9d9d9d9d
+ aes64im x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x9d9d9d9d9d9d9d9d)
+
+ inst_158:
+ // Test 158: Test with dataset: sbox64
+ // result rd:x4(0x9e9e9e9e9e9e9e9e), rs1:x28(0x9e9e9e9e9e9e9e9e)
+ li x28, 0x9e9e9e9e9e9e9e9e
+ aes64im x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x9e9e9e9e9e9e9e9e)
+
+ inst_159:
+ // Test 159: Test with dataset: sbox64
+ // result rd:x5(0x9f9f9f9f9f9f9f9f), rs1:x27(0x9f9f9f9f9f9f9f9f)
+ li x27, 0x9f9f9f9f9f9f9f9f
+ aes64im x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x9f9f9f9f9f9f9f9f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with dataset: sbox64
+ // result rd:x6(0xa0a0a0a0a0a0a0a0), rs1:x26(0xa0a0a0a0a0a0a0a0)
+ li x26, 0xa0a0a0a0a0a0a0a0
+ aes64im x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xa0a0a0a0a0a0a0a0)
+
+ inst_161:
+ // Test 161: Test with dataset: sbox64
+ // result rd:x7(0xa1a1a1a1a1a1a1a1), rs1:x25(0xa1a1a1a1a1a1a1a1)
+ li x25, 0xa1a1a1a1a1a1a1a1
+ aes64im x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xa1a1a1a1a1a1a1a1)
+
+ inst_162:
+ // Test 162: Test with dataset: sbox64
+ // result rd:x8(0xa2a2a2a2a2a2a2a2), rs1:x24(0xa2a2a2a2a2a2a2a2)
+ li x24, 0xa2a2a2a2a2a2a2a2
+ aes64im x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xa2a2a2a2a2a2a2a2)
+
+ inst_163:
+ // Test 163: Test with dataset: sbox64
+ // result rd:x9(0xa3a3a3a3a3a3a3a3), rs1:x23(0xa3a3a3a3a3a3a3a3)
+ li x23, 0xa3a3a3a3a3a3a3a3
+ aes64im x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xa3a3a3a3a3a3a3a3)
+
+ inst_164:
+ // Test 164: Test with dataset: sbox64
+ // result rd:x10(0xa4a4a4a4a4a4a4a4), rs1:x22(0xa4a4a4a4a4a4a4a4)
+ li x22, 0xa4a4a4a4a4a4a4a4
+ aes64im x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xa4a4a4a4a4a4a4a4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with dataset: sbox64
+ // result rd:x11(0xa5a5a5a5a5a5a5a5), rs1:x21(0xa5a5a5a5a5a5a5a5)
+ li x21, 0xa5a5a5a5a5a5a5a5
+ aes64im x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0xa5a5a5a5a5a5a5a5)
+
+ inst_166:
+ // Test 166: Test with dataset: sbox64
+ // result rd:x12(0xa6a6a6a6a6a6a6a6), rs1:x20(0xa6a6a6a6a6a6a6a6)
+ li x20, 0xa6a6a6a6a6a6a6a6
+ aes64im x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xa6a6a6a6a6a6a6a6)
+
+ inst_167:
+ // Test 167: Test with dataset: sbox64
+ // result rd:x13(0xa7a7a7a7a7a7a7a7), rs1:x19(0xa7a7a7a7a7a7a7a7)
+ li x19, 0xa7a7a7a7a7a7a7a7
+ aes64im x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xa7a7a7a7a7a7a7a7)
+
+ inst_168:
+ // Test 168: Test with dataset: sbox64
+ // result rd:x14(0xa8a8a8a8a8a8a8a8), rs1:x18(0xa8a8a8a8a8a8a8a8)
+ li x18, 0xa8a8a8a8a8a8a8a8
+ aes64im x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xa8a8a8a8a8a8a8a8)
+
+ inst_169:
+ // Test 169: Test with dataset: sbox64
+ // result rd:x15(0xa9a9a9a9a9a9a9a9), rs1:x17(0xa9a9a9a9a9a9a9a9)
+ li x17, 0xa9a9a9a9a9a9a9a9
+ aes64im x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xa9a9a9a9a9a9a9a9)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with dataset: sbox64
+ // result rd:x16(0xaaaaaaaaaaaaaaaa), rs1:x16(0xaaaaaaaaaaaaaaaa)
+ li x16, 0xaaaaaaaaaaaaaaaa
+ aes64im x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0xaaaaaaaaaaaaaaaa)
+
+ inst_171:
+ // Test 171: Test with dataset: sbox64
+ // result rd:x17(0xabababababababab), rs1:x15(0xabababababababab)
+ li x15, 0xabababababababab
+ aes64im x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0xabababababababab)
+
+ inst_172:
+ // Test 172: Test with dataset: sbox64
+ // result rd:x18(0xacacacacacacacac), rs1:x14(0xacacacacacacacac)
+ li x14, 0xacacacacacacacac
+ aes64im x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0xacacacacacacacac)
+
+ inst_173:
+ // Test 173: Test with dataset: sbox64
+ // result rd:x19(0xadadadadadadadad), rs1:x13(0xadadadadadadadad)
+ li x13, 0xadadadadadadadad
+ aes64im x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0xadadadadadadadad)
+
+ inst_174:
+ // Test 174: Test with dataset: sbox64
+ // result rd:x20(0xaeaeaeaeaeaeaeae), rs1:x12(0xaeaeaeaeaeaeaeae)
+ li x12, 0xaeaeaeaeaeaeaeae
+ aes64im x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0xaeaeaeaeaeaeaeae)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with dataset: sbox64
+ // result rd:x21(0xafafafafafafafaf), rs1:x11(0xafafafafafafafaf)
+ li x11, 0xafafafafafafafaf
+ aes64im x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xafafafafafafafaf)
+
+ inst_176:
+ // Test 176: Test with dataset: sbox64
+ // result rd:x22(0xb0b0b0b0b0b0b0b0), rs1:x10(0xb0b0b0b0b0b0b0b0)
+ li x10, 0xb0b0b0b0b0b0b0b0
+ aes64im x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xb0b0b0b0b0b0b0b0)
+
+ inst_177:
+ // Test 177: Test with dataset: sbox64
+ // result rd:x23(0xb1b1b1b1b1b1b1b1), rs1:x9(0xb1b1b1b1b1b1b1b1)
+ li x9, 0xb1b1b1b1b1b1b1b1
+ aes64im x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xb1b1b1b1b1b1b1b1)
+
+ inst_178:
+ // Test 178: Test with dataset: sbox64
+ // result rd:x24(0xb2b2b2b2b2b2b2b2), rs1:x8(0xb2b2b2b2b2b2b2b2)
+ li x8, 0xb2b2b2b2b2b2b2b2
+ aes64im x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xb2b2b2b2b2b2b2b2)
+
+ inst_179:
+ // Test 179: Test with dataset: sbox64
+ // result rd:x25(0xb3b3b3b3b3b3b3b3), rs1:x7(0xb3b3b3b3b3b3b3b3)
+ li x7, 0xb3b3b3b3b3b3b3b3
+ aes64im x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xb3b3b3b3b3b3b3b3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with dataset: sbox64
+ // result rd:x26(0xb4b4b4b4b4b4b4b4), rs1:x6(0xb4b4b4b4b4b4b4b4)
+ li x6, 0xb4b4b4b4b4b4b4b4
+ aes64im x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0xb4b4b4b4b4b4b4b4)
+
+ inst_181:
+ // Test 181: Test with dataset: sbox64
+ // result rd:x27(0xb5b5b5b5b5b5b5b5), rs1:x5(0xb5b5b5b5b5b5b5b5)
+ li x5, 0xb5b5b5b5b5b5b5b5
+ aes64im x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0xb5b5b5b5b5b5b5b5)
+
+ inst_182:
+ // Test 182: Test with dataset: sbox64
+ // result rd:x28(0xb6b6b6b6b6b6b6b6), rs1:x4(0xb6b6b6b6b6b6b6b6)
+ li x4, 0xb6b6b6b6b6b6b6b6
+ aes64im x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0xb6b6b6b6b6b6b6b6)
+
+ inst_183:
+ // Test 183: Test with dataset: sbox64
+ // result rd:x29(0xb7b7b7b7b7b7b7b7), rs1:x3(0xb7b7b7b7b7b7b7b7)
+ li x3, 0xb7b7b7b7b7b7b7b7
+ aes64im x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0xb7b7b7b7b7b7b7b7)
+
+ inst_184:
+ // Test 184: Test with dataset: sbox64
+ // result rd:x30(0xb8b8b8b8b8b8b8b8), rs1:x2(0xb8b8b8b8b8b8b8b8)
+ li x2, 0xb8b8b8b8b8b8b8b8
+ aes64im x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0xb8b8b8b8b8b8b8b8)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with dataset: sbox64
+ // result rd:x31(0xb9b9b9b9b9b9b9b9), rs1:x1(0xb9b9b9b9b9b9b9b9)
+ li x1, 0xb9b9b9b9b9b9b9b9
+ aes64im x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xb9b9b9b9b9b9b9b9)
+
+ inst_186:
+ // Test 186: Test with dataset: sbox64
+ // result rd:x1(0xbabababababababa), rs1:x31(0xbabababababababa)
+ li x31, 0xbabababababababa
+ aes64im x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xbabababababababa)
+
+ inst_187:
+ // Test 187: Test with dataset: sbox64
+ // result rd:x2(0xbbbbbbbbbbbbbbbb), rs1:x30(0xbbbbbbbbbbbbbbbb)
+ li x30, 0xbbbbbbbbbbbbbbbb
+ aes64im x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0xbbbbbbbbbbbbbbbb)
+
+ inst_188:
+ // Test 188: Test with dataset: sbox64
+ // result rd:x3(0xbcbcbcbcbcbcbcbc), rs1:x29(0xbcbcbcbcbcbcbcbc)
+ li x29, 0xbcbcbcbcbcbcbcbc
+ aes64im x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0xbcbcbcbcbcbcbcbc)
+
+ inst_189:
+ // Test 189: Test with dataset: sbox64
+ // result rd:x4(0xbdbdbdbdbdbdbdbd), rs1:x28(0xbdbdbdbdbdbdbdbd)
+ li x28, 0xbdbdbdbdbdbdbdbd
+ aes64im x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0xbdbdbdbdbdbdbdbd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with dataset: sbox64
+ // result rd:x5(0xbebebebebebebebe), rs1:x27(0xbebebebebebebebe)
+ li x27, 0xbebebebebebebebe
+ aes64im x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xbebebebebebebebe)
+
+ inst_191:
+ // Test 191: Test with dataset: sbox64
+ // result rd:x6(0xbfbfbfbfbfbfbfbf), rs1:x26(0xbfbfbfbfbfbfbfbf)
+ li x26, 0xbfbfbfbfbfbfbfbf
+ aes64im x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xbfbfbfbfbfbfbfbf)
+
+ inst_192:
+ // Test 192: Test with dataset: sbox64
+ // result rd:x7(0xc0c0c0c0c0c0c0c0), rs1:x25(0xc0c0c0c0c0c0c0c0)
+ li x25, 0xc0c0c0c0c0c0c0c0
+ aes64im x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xc0c0c0c0c0c0c0c0)
+
+ inst_193:
+ // Test 193: Test with dataset: sbox64
+ // result rd:x8(0xc1c1c1c1c1c1c1c1), rs1:x24(0xc1c1c1c1c1c1c1c1)
+ li x24, 0xc1c1c1c1c1c1c1c1
+ aes64im x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xc1c1c1c1c1c1c1c1)
+
+ inst_194:
+ // Test 194: Test with dataset: sbox64
+ // result rd:x9(0xc2c2c2c2c2c2c2c2), rs1:x23(0xc2c2c2c2c2c2c2c2)
+ li x23, 0xc2c2c2c2c2c2c2c2
+ aes64im x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xc2c2c2c2c2c2c2c2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with dataset: sbox64
+ // result rd:x10(0xc3c3c3c3c3c3c3c3), rs1:x22(0xc3c3c3c3c3c3c3c3)
+ li x22, 0xc3c3c3c3c3c3c3c3
+ aes64im x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xc3c3c3c3c3c3c3c3)
+
+ inst_196:
+ // Test 196: Test with dataset: sbox64
+ // result rd:x11(0xc4c4c4c4c4c4c4c4), rs1:x21(0xc4c4c4c4c4c4c4c4)
+ li x21, 0xc4c4c4c4c4c4c4c4
+ aes64im x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xc4c4c4c4c4c4c4c4)
+
+ inst_197:
+ // Test 197: Test with dataset: sbox64
+ // result rd:x12(0xc5c5c5c5c5c5c5c5), rs1:x20(0xc5c5c5c5c5c5c5c5)
+ li x20, 0xc5c5c5c5c5c5c5c5
+ aes64im x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xc5c5c5c5c5c5c5c5)
+
+ inst_198:
+ // Test 198: Test with dataset: sbox64
+ // result rd:x13(0xc6c6c6c6c6c6c6c6), rs1:x19(0xc6c6c6c6c6c6c6c6)
+ li x19, 0xc6c6c6c6c6c6c6c6
+ aes64im x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xc6c6c6c6c6c6c6c6)
+
+ inst_199:
+ // Test 199: Test with dataset: sbox64
+ // result rd:x14(0xc7c7c7c7c7c7c7c7), rs1:x18(0xc7c7c7c7c7c7c7c7)
+ li x18, 0xc7c7c7c7c7c7c7c7
+ aes64im x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0xc7c7c7c7c7c7c7c7)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with dataset: sbox64
+ // result rd:x15(0xc8c8c8c8c8c8c8c8), rs1:x17(0xc8c8c8c8c8c8c8c8)
+ li x17, 0xc8c8c8c8c8c8c8c8
+ aes64im x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0xc8c8c8c8c8c8c8c8)
+
+ inst_201:
+ // Test 201: Test with dataset: sbox64
+ // result rd:x16(0xc9c9c9c9c9c9c9c9), rs1:x16(0xc9c9c9c9c9c9c9c9)
+ li x16, 0xc9c9c9c9c9c9c9c9
+ aes64im x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0xc9c9c9c9c9c9c9c9)
+
+ inst_202:
+ // Test 202: Test with dataset: sbox64
+ // result rd:x17(0xcacacacacacacaca), rs1:x15(0xcacacacacacacaca)
+ li x15, 0xcacacacacacacaca
+ aes64im x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0xcacacacacacacaca)
+
+ inst_203:
+ // Test 203: Test with dataset: sbox64
+ // result rd:x18(0xcbcbcbcbcbcbcbcb), rs1:x14(0xcbcbcbcbcbcbcbcb)
+ li x14, 0xcbcbcbcbcbcbcbcb
+ aes64im x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0xcbcbcbcbcbcbcbcb)
+
+ inst_204:
+ // Test 204: Test with dataset: sbox64
+ // result rd:x19(0xcccccccccccccccc), rs1:x13(0xcccccccccccccccc)
+ li x13, 0xcccccccccccccccc
+ aes64im x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0xcccccccccccccccc)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with dataset: sbox64
+ // result rd:x20(0xcdcdcdcdcdcdcdcd), rs1:x12(0xcdcdcdcdcdcdcdcd)
+ li x12, 0xcdcdcdcdcdcdcdcd
+ aes64im x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xcdcdcdcdcdcdcdcd)
+
+ inst_206:
+ // Test 206: Test with dataset: sbox64
+ // result rd:x21(0xcececececececece), rs1:x11(0xcececececececece)
+ li x11, 0xcececececececece
+ aes64im x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xcececececececece)
+
+ inst_207:
+ // Test 207: Test with dataset: sbox64
+ // result rd:x22(0xcfcfcfcfcfcfcfcf), rs1:x10(0xcfcfcfcfcfcfcfcf)
+ li x10, 0xcfcfcfcfcfcfcfcf
+ aes64im x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xcfcfcfcfcfcfcfcf)
+
+ inst_208:
+ // Test 208: Test with dataset: sbox64
+ // result rd:x23(0xd0d0d0d0d0d0d0d0), rs1:x9(0xd0d0d0d0d0d0d0d0)
+ li x9, 0xd0d0d0d0d0d0d0d0
+ aes64im x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xd0d0d0d0d0d0d0d0)
+
+ inst_209:
+ // Test 209: Test with dataset: sbox64
+ // result rd:x24(0xd1d1d1d1d1d1d1d1), rs1:x8(0xd1d1d1d1d1d1d1d1)
+ li x8, 0xd1d1d1d1d1d1d1d1
+ aes64im x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xd1d1d1d1d1d1d1d1)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with dataset: sbox64
+ // result rd:x25(0xd2d2d2d2d2d2d2d2), rs1:x7(0xd2d2d2d2d2d2d2d2)
+ li x7, 0xd2d2d2d2d2d2d2d2
+ aes64im x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xd2d2d2d2d2d2d2d2)
+
+ inst_211:
+ // Test 211: Test with dataset: sbox64
+ // result rd:x26(0xd3d3d3d3d3d3d3d3), rs1:x6(0xd3d3d3d3d3d3d3d3)
+ li x6, 0xd3d3d3d3d3d3d3d3
+ aes64im x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xd3d3d3d3d3d3d3d3)
+
+ inst_212:
+ // Test 212: Test with dataset: sbox64
+ // result rd:x27(0xd4d4d4d4d4d4d4d4), rs1:x5(0xd4d4d4d4d4d4d4d4)
+ li x5, 0xd4d4d4d4d4d4d4d4
+ aes64im x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xd4d4d4d4d4d4d4d4)
+
+ inst_213:
+ // Test 213: Test with dataset: sbox64
+ // result rd:x28(0xd5d5d5d5d5d5d5d5), rs1:x4(0xd5d5d5d5d5d5d5d5)
+ li x4, 0xd5d5d5d5d5d5d5d5
+ aes64im x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xd5d5d5d5d5d5d5d5)
+
+ inst_214:
+ // Test 214: Test with dataset: sbox64
+ // result rd:x29(0xd6d6d6d6d6d6d6d6), rs1:x3(0xd6d6d6d6d6d6d6d6)
+ li x3, 0xd6d6d6d6d6d6d6d6
+ aes64im x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xd6d6d6d6d6d6d6d6)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with dataset: sbox64
+ // result rd:x30(0xd7d7d7d7d7d7d7d7), rs1:x2(0xd7d7d7d7d7d7d7d7)
+ li x2, 0xd7d7d7d7d7d7d7d7
+ aes64im x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xd7d7d7d7d7d7d7d7)
+
+ inst_216:
+ // Test 216: Test with dataset: sbox64
+ // result rd:x31(0xd8d8d8d8d8d8d8d8), rs1:x1(0xd8d8d8d8d8d8d8d8)
+ li x1, 0xd8d8d8d8d8d8d8d8
+ aes64im x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xd8d8d8d8d8d8d8d8)
+
+ inst_217:
+ // Test 217: Test with dataset: sbox64
+ // result rd:x1(0xd9d9d9d9d9d9d9d9), rs1:x31(0xd9d9d9d9d9d9d9d9)
+ li x31, 0xd9d9d9d9d9d9d9d9
+ aes64im x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xd9d9d9d9d9d9d9d9)
+
+ inst_218:
+ // Test 218: Test with dataset: sbox64
+ // result rd:x2(0xdadadadadadadada), rs1:x30(0xdadadadadadadada)
+ li x30, 0xdadadadadadadada
+ aes64im x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xdadadadadadadada)
+
+ inst_219:
+ // Test 219: Test with dataset: sbox64
+ // result rd:x3(0xdbdbdbdbdbdbdbdb), rs1:x29(0xdbdbdbdbdbdbdbdb)
+ li x29, 0xdbdbdbdbdbdbdbdb
+ aes64im x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xdbdbdbdbdbdbdbdb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with dataset: sbox64
+ // result rd:x4(0xdcdcdcdcdcdcdcdc), rs1:x28(0xdcdcdcdcdcdcdcdc)
+ li x28, 0xdcdcdcdcdcdcdcdc
+ aes64im x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xdcdcdcdcdcdcdcdc)
+
+ inst_221:
+ // Test 221: Test with dataset: sbox64
+ // result rd:x5(0xdddddddddddddddd), rs1:x27(0xdddddddddddddddd)
+ li x27, 0xdddddddddddddddd
+ aes64im x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xdddddddddddddddd)
+
+ inst_222:
+ // Test 222: Test with dataset: sbox64
+ // result rd:x6(0xdededededededede), rs1:x26(0xdededededededede)
+ li x26, 0xdededededededede
+ aes64im x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xdededededededede)
+
+ inst_223:
+ // Test 223: Test with dataset: sbox64
+ // result rd:x7(0xdfdfdfdfdfdfdfdf), rs1:x25(0xdfdfdfdfdfdfdfdf)
+ li x25, 0xdfdfdfdfdfdfdfdf
+ aes64im x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xdfdfdfdfdfdfdfdf)
+
+ inst_224:
+ // Test 224: Test with dataset: sbox64
+ // result rd:x8(0xe0e0e0e0e0e0e0e0), rs1:x24(0xe0e0e0e0e0e0e0e0)
+ li x24, 0xe0e0e0e0e0e0e0e0
+ aes64im x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xe0e0e0e0e0e0e0e0)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with dataset: sbox64
+ // result rd:x9(0xe1e1e1e1e1e1e1e1), rs1:x23(0xe1e1e1e1e1e1e1e1)
+ li x23, 0xe1e1e1e1e1e1e1e1
+ aes64im x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xe1e1e1e1e1e1e1e1)
+
+ inst_226:
+ // Test 226: Test with dataset: sbox64
+ // result rd:x10(0xe2e2e2e2e2e2e2e2), rs1:x22(0xe2e2e2e2e2e2e2e2)
+ li x22, 0xe2e2e2e2e2e2e2e2
+ aes64im x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xe2e2e2e2e2e2e2e2)
+
+ inst_227:
+ // Test 227: Test with dataset: sbox64
+ // result rd:x11(0xe3e3e3e3e3e3e3e3), rs1:x21(0xe3e3e3e3e3e3e3e3)
+ li x21, 0xe3e3e3e3e3e3e3e3
+ aes64im x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xe3e3e3e3e3e3e3e3)
+
+ inst_228:
+ // Test 228: Test with dataset: sbox64
+ // result rd:x12(0xe4e4e4e4e4e4e4e4), rs1:x20(0xe4e4e4e4e4e4e4e4)
+ li x20, 0xe4e4e4e4e4e4e4e4
+ aes64im x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xe4e4e4e4e4e4e4e4)
+
+ inst_229:
+ // Test 229: Test with dataset: sbox64
+ // result rd:x13(0xe5e5e5e5e5e5e5e5), rs1:x19(0xe5e5e5e5e5e5e5e5)
+ li x19, 0xe5e5e5e5e5e5e5e5
+ aes64im x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xe5e5e5e5e5e5e5e5)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with dataset: sbox64
+ // result rd:x14(0xe6e6e6e6e6e6e6e6), rs1:x18(0xe6e6e6e6e6e6e6e6)
+ li x18, 0xe6e6e6e6e6e6e6e6
+ aes64im x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xe6e6e6e6e6e6e6e6)
+
+ inst_231:
+ // Test 231: Test with dataset: sbox64
+ // result rd:x15(0xe7e7e7e7e7e7e7e7), rs1:x17(0xe7e7e7e7e7e7e7e7)
+ li x17, 0xe7e7e7e7e7e7e7e7
+ aes64im x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xe7e7e7e7e7e7e7e7)
+
+ inst_232:
+ // Test 232: Test with dataset: sbox64
+ // result rd:x16(0xe8e8e8e8e8e8e8e8), rs1:x16(0xe8e8e8e8e8e8e8e8)
+ li x16, 0xe8e8e8e8e8e8e8e8
+ aes64im x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xe8e8e8e8e8e8e8e8)
+
+ inst_233:
+ // Test 233: Test with dataset: sbox64
+ // result rd:x17(0xe9e9e9e9e9e9e9e9), rs1:x15(0xe9e9e9e9e9e9e9e9)
+ li x15, 0xe9e9e9e9e9e9e9e9
+ aes64im x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0xe9e9e9e9e9e9e9e9)
+
+ inst_234:
+ // Test 234: Test with dataset: sbox64
+ // result rd:x18(0xeaeaeaeaeaeaeaea), rs1:x14(0xeaeaeaeaeaeaeaea)
+ li x14, 0xeaeaeaeaeaeaeaea
+ aes64im x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0xeaeaeaeaeaeaeaea)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with dataset: sbox64
+ // result rd:x19(0xebebebebebebebeb), rs1:x13(0xebebebebebebebeb)
+ li x13, 0xebebebebebebebeb
+ aes64im x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xebebebebebebebeb)
+
+ inst_236:
+ // Test 236: Test with dataset: sbox64
+ // result rd:x20(0xecececececececec), rs1:x12(0xecececececececec)
+ li x12, 0xecececececececec
+ aes64im x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xecececececececec)
+
+ inst_237:
+ // Test 237: Test with dataset: sbox64
+ // result rd:x21(0xedededededededed), rs1:x11(0xedededededededed)
+ li x11, 0xedededededededed
+ aes64im x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xedededededededed)
+
+ inst_238:
+ // Test 238: Test with dataset: sbox64
+ // result rd:x22(0xeeeeeeeeeeeeeeee), rs1:x10(0xeeeeeeeeeeeeeeee)
+ li x10, 0xeeeeeeeeeeeeeeee
+ aes64im x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xeeeeeeeeeeeeeeee)
+
+ inst_239:
+ // Test 239: Test with dataset: sbox64
+ // result rd:x23(0xefefefefefefefef), rs1:x9(0xefefefefefefefef)
+ li x9, 0xefefefefefefefef
+ aes64im x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xefefefefefefefef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with dataset: sbox64
+ // result rd:x24(0xf0f0f0f0f0f0f0f0), rs1:x8(0xf0f0f0f0f0f0f0f0)
+ li x8, 0xf0f0f0f0f0f0f0f0
+ aes64im x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xf0f0f0f0f0f0f0f0)
+
+ inst_241:
+ // Test 241: Test with dataset: sbox64
+ // result rd:x25(0xf1f1f1f1f1f1f1f1), rs1:x7(0xf1f1f1f1f1f1f1f1)
+ li x7, 0xf1f1f1f1f1f1f1f1
+ aes64im x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xf1f1f1f1f1f1f1f1)
+
+ inst_242:
+ // Test 242: Test with dataset: sbox64
+ // result rd:x26(0xf2f2f2f2f2f2f2f2), rs1:x6(0xf2f2f2f2f2f2f2f2)
+ li x6, 0xf2f2f2f2f2f2f2f2
+ aes64im x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xf2f2f2f2f2f2f2f2)
+
+ inst_243:
+ // Test 243: Test with dataset: sbox64
+ // result rd:x27(0xf3f3f3f3f3f3f3f3), rs1:x5(0xf3f3f3f3f3f3f3f3)
+ li x5, 0xf3f3f3f3f3f3f3f3
+ aes64im x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xf3f3f3f3f3f3f3f3)
+
+ inst_244:
+ // Test 244: Test with dataset: sbox64
+ // result rd:x28(0xf4f4f4f4f4f4f4f4), rs1:x4(0xf4f4f4f4f4f4f4f4)
+ li x4, 0xf4f4f4f4f4f4f4f4
+ aes64im x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xf4f4f4f4f4f4f4f4)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with dataset: sbox64
+ // result rd:x29(0xf5f5f5f5f5f5f5f5), rs1:x3(0xf5f5f5f5f5f5f5f5)
+ li x3, 0xf5f5f5f5f5f5f5f5
+ aes64im x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0xf5f5f5f5f5f5f5f5)
+
+ inst_246:
+ // Test 246: Test with dataset: sbox64
+ // result rd:x30(0xf6f6f6f6f6f6f6f6), rs1:x2(0xf6f6f6f6f6f6f6f6)
+ li x2, 0xf6f6f6f6f6f6f6f6
+ aes64im x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xf6f6f6f6f6f6f6f6)
+
+ inst_247:
+ // Test 247: Test with dataset: sbox64
+ // result rd:x31(0xf7f7f7f7f7f7f7f7), rs1:x1(0xf7f7f7f7f7f7f7f7)
+ li x1, 0xf7f7f7f7f7f7f7f7
+ aes64im x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xf7f7f7f7f7f7f7f7)
+
+ inst_248:
+ // Test 248: Test with dataset: sbox64
+ // result rd:x1(0xf8f8f8f8f8f8f8f8), rs1:x31(0xf8f8f8f8f8f8f8f8)
+ li x31, 0xf8f8f8f8f8f8f8f8
+ aes64im x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xf8f8f8f8f8f8f8f8)
+
+ inst_249:
+ // Test 249: Test with dataset: sbox64
+ // result rd:x2(0xf9f9f9f9f9f9f9f9), rs1:x30(0xf9f9f9f9f9f9f9f9)
+ li x30, 0xf9f9f9f9f9f9f9f9
+ aes64im x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xf9f9f9f9f9f9f9f9)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with dataset: sbox64
+ // result rd:x3(0xfafafafafafafafa), rs1:x29(0xfafafafafafafafa)
+ li x29, 0xfafafafafafafafa
+ aes64im x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0xfafafafafafafafa)
+
+ inst_251:
+ // Test 251: Test with dataset: sbox64
+ // result rd:x4(0xfbfbfbfbfbfbfbfb), rs1:x28(0xfbfbfbfbfbfbfbfb)
+ li x28, 0xfbfbfbfbfbfbfbfb
+ aes64im x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xfbfbfbfbfbfbfbfb)
+
+ inst_252:
+ // Test 252: Test with dataset: sbox64
+ // result rd:x5(0xfcfcfcfcfcfcfcfc), rs1:x27(0xfcfcfcfcfcfcfcfc)
+ li x27, 0xfcfcfcfcfcfcfcfc
+ aes64im x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xfcfcfcfcfcfcfcfc)
+
+ inst_253:
+ // Test 253: Test with dataset: sbox64
+ // result rd:x6(0xfdfdfdfdfdfdfdfd), rs1:x26(0xfdfdfdfdfdfdfdfd)
+ li x26, 0xfdfdfdfdfdfdfdfd
+ aes64im x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xfdfdfdfdfdfdfdfd)
+
+ inst_254:
+ // Test 254: Test with dataset: sbox64
+ // result rd:x7(0xfefefefefefefefe), rs1:x25(0xfefefefefefefefe)
+ li x25, 0xfefefefefefefefe
+ aes64im x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfefefefefefefefe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with dataset: sbox64
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xffffffffffffffff)
+ li x24, 0xffffffffffffffff
+ aes64im x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffffffffffffffff)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64KS1I-01.S b/riscof/suite/rv64i_m/K_unratified/AES64KS1I-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..47897c35667b9b4a0c75b6468d70bcc027e9495b
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64KS1I-01.S
@@ -0,0 +1,1838 @@
+// RISC-V Architectural Validation Test AES64KS1I-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64ks1i'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64ks1i)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64ks1i)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x55ca542f55ca542f), rs1:x31(0x10fd3dedadea5195), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x55ca542f55ca542f, 0x10fd3dedadea5195, 0x3, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x987aa548987aa548), rs1:x30(0xbd295ce2d2ffbec1), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x987aa548987aa548, 0xbd295ce2d2ffbec1, 0x1, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x6bdd43da6bdd43da), rs1:x29(0xc9649f05a8e1a8bb), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x6bdd43da6bdd43da, 0xc9649f05a8e1a8bb, 0x0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xad9683adad9683ad), rs1:x28(0x3541291848c99fcb), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0xad9683adad9683ad, 0x3541291848c99fcb, 0x3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x09ca3a8009ca3a80), rs1:x27(0x10a24740461d524f), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0x09ca3a8009ca3a80, 0x10a24740461d524f, 0x5, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x20207f8b20207f8b), rs1:x26(0x546b0e54528a10af), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x20207f8b20207f8b, 0x546b0e54528a10af, 0x5, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x488fd317488fd317), rs1:x25(0x73a92fd4e19bfbc3), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x488fd317488fd317, 0x73a92fd4e19bfbc3, 0x1, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xd2134290d2134290), rs1:x24(0x82f6747f707af2c0), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0xd2134290d2134290, 0x82f6747f707af2c0, 0x1, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xa2e6958fa2e6958f), rs1:x23(0xf5adb41aa47d105b), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0xa2e6958fa2e6958f, 0xf5adb41aa47d105b, 0x1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x1b9ed2271b9ed227), rs1:x22(0xdf7f3844121bcc23), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x1b9ed2271b9ed227, 0xdf7f3844121bcc23, 0x5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x6363634363636343), rs1:x21(0x0000000000000001), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x6363634363636343, 0x1, 0x5, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x636363e3636363e3), rs1:x20(0x0000000000000002), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x636363e3636363e3, 0x2, 0x7, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x6363636163636361), rs1:x19(0x0000000000000004), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0x6363636163636361, 0x4, 0x1, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x6363636b6363636b), rs1:x18(0x0000000000000008), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0x6363636b6363636b, 0x8, 0x3, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x6363637363636373), rs1:x17(0x0000000000000010), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0x6363637363636373, 0x10, 0x4, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x6363636263636362), rs1:x16(0x0000000000000020), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0x6363636263636362, 0x20, 0x0, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x6363637863636378), rs1:x15(0x0000000000000040), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x6363637863636378, 0x40, 0x8, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x6363637363636373), rs1:x14(0x0000000000000080), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x6363637363636373, 0x80, 0x4, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x6363636763636367), rs1:x13(0x0000000000000100), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0x6363636763636367, 0x100, 0x2, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x6363636163636361), rs1:x12(0x0000000000000200), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0x6363636163636361, 0x200, 0x1, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x6363636b6363636b), rs1:x11(0x0000000000000400), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0x6363636b6363636b, 0x400, 0x3, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x6363636163636361), rs1:x10(0x0000000000000800), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0x6363636163636361, 0x800, 0x1, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x6363636263636362), rs1:x9(0x0000000000001000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x6363636263636362, 0x1000, 0x0, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x6363636b6363636b), rs1:x8(0x0000000000002000), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0x6363636b6363636b, 0x2000, 0x3, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x6363634363636343), rs1:x7(0x0000000000004000), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0x6363634363636343, 0x4000, 0x5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x6363634363636343), rs1:x6(0x0000000000008000), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x6363634363636343, 0x8000, 0x5, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x6363636163636361), rs1:x5(0x0000000000010000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0x6363636163636361, 0x10000, 0x1, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x6363636163636361), rs1:x4(0x0000000000020000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0x6363636163636361, 0x20000, 0x1, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x6363636163636361), rs1:x3(0x0000000000040000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0x6363636163636361, 0x40000, 0x1, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x6363634363636343), rs1:x2(0x0000000000080000), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0x6363634363636343, 0x80000, 0x5, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x6363634363636343), rs1:x1(0x0000000000100000), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x6363634363636343, 0x100000, 0x5, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x636363e3636363e3), rs1:x31(0x0000000000200000), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x636363e3636363e3, 0x200000, 0x7, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x6363636163636361), rs1:x30(0x0000000000400000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x6363636163636361, 0x400000, 0x1, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x6363636b6363636b), rs1:x29(0x0000000000800000), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x6363636b6363636b, 0x800000, 0x3, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x6363637363636373), rs1:x28(0x0000000001000000), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x6363637363636373, 0x1000000, 0x4, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x6363636263636362), rs1:x27(0x0000000002000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0x6363636263636362, 0x2000000, 0x0, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x6363637863636378), rs1:x26(0x0000000004000000), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x6363637863636378, 0x4000000, 0x8, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x6363637363636373), rs1:x25(0x0000000008000000), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x6363637363636373, 0x8000000, 0x4, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x6363636763636367), rs1:x24(0x0000000010000000), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0x6363636763636367, 0x10000000, 0x2, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x6363636163636361), rs1:x23(0x0000000020000000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x6363636163636361, 0x20000000, 0x1, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x6363636b6363636b), rs1:x22(0x0000000040000000), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x6363636b6363636b, 0x40000000, 0x3, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x6363636163636361), rs1:x21(0x0000000080000000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x6363636163636361, 0x80000000, 0x1, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x7c6363627c636362), rs1:x20(0x0000000100000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x7c6363627c636362, 0x100000000, 0x0, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x7763636b7763636b), rs1:x19(0x0000000200000000), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0x7763636b7763636b, 0x200000000, 0x3, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xf2636343f2636343), rs1:x18(0x0000000400000000), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0xf2636343f2636343, 0x400000000, 0x5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x3063634330636343), rs1:x17(0x0000000800000000), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0x3063634330636343, 0x800000000, 0x5, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xca636361ca636361), rs1:x16(0x0000001000000000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0xca636361ca636361, 0x1000000000, 0x1, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xb7636361b7636361), rs1:x15(0x0000002000000000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0xb7636361b7636361, 0x2000000000, 0x1, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0963636109636361), rs1:x14(0x0000004000000000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x0963636109636361, 0x4000000000, 0x1, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xcd636343cd636343), rs1:x13(0x0000008000000000), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0xcd636343cd636343, 0x8000000000, 0x5, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x6363635c6363635c), rs1:x12(0x0000010000000000), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0x6363635c6363635c, 0x10000000000, 0x5, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x636363f7636363f7), rs1:x11(0x0000020000000000), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0x636363f7636363f7, 0x20000000000, 0x7, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x636363f0636363f0), rs1:x10(0x0000040000000000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0x636363f0636363f0, 0x40000000000, 0x1, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x6363633863636338), rs1:x9(0x0000080000000000), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x6363633863636338, 0x80000000000, 0x3, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x636363da636363da), rs1:x8(0x0000100000000000), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0x636363da636363da, 0x100000000000, 0x4, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x636363b6636363b6), rs1:x7(0x0000200000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0x636363b6636363b6, 0x200000000000, 0x0, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x6363631263636312), rs1:x6(0x0000400000000000), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x6363631263636312, 0x400000000000, 0x8, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x636363dd636363dd), rs1:x5(0x0000800000000000), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0x636363dd636363dd, 0x800000000000, 0x4, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x63637c6763637c67), rs1:x4(0x0001000000000000), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0x63637c6763637c67, 0x1000000000000, 0x2, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x6363776163637761), rs1:x3(0x0002000000000000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0x6363776163637761, 0x2000000000000, 0x1, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x6363f26b6363f26b), rs1:x2(0x0004000000000000), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0x6363f26b6363f26b, 0x4000000000000, 0x3, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x6363306163633061), rs1:x1(0x0008000000000000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x6363306163633061, 0x8000000000000, 0x1, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x6363ca626363ca62), rs1:x31(0x0010000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x6363ca626363ca62, 0x10000000000000, 0x0, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x6363b76b6363b76b), rs1:x30(0x0020000000000000), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x6363b76b6363b76b, 0x20000000000000, 0x3, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x6363094363630943), rs1:x29(0x0040000000000000), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x6363094363630943, 0x40000000000000, 0x5, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x6363cd436363cd43), rs1:x28(0x0080000000000000), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x6363cd436363cd43, 0x80000000000000, 0x5, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x637c6361637c6361), rs1:x27(0x0100000000000000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0x637c6361637c6361, 0x100000000000000, 0x1, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x6377636163776361), rs1:x26(0x0200000000000000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x6377636163776361, 0x200000000000000, 0x1, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x63f2636163f26361), rs1:x25(0x0400000000000000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x63f2636163f26361, 0x400000000000000, 0x1, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x6330634363306343), rs1:x24(0x0800000000000000), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0x6330634363306343, 0x800000000000000, 0x5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x63ca634363ca6343), rs1:x23(0x1000000000000000), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x63ca634363ca6343, 0x1000000000000000, 0x5, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x63b763e363b763e3), rs1:x22(0x2000000000000000), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x63b763e363b763e3, 0x2000000000000000, 0x7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x6309636163096361), rs1:x21(0x4000000000000000), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x6309636163096361, 0x4000000000000000, 0x1, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x63cd636b63cd636b), rs1:x20(0x8000000000000000), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x63cd636b63cd636b, 0x8000000000000000, 0x3, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x6363637363636373), rs1:x19(0x0000000000000000), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0x6363637363636373, 0x0, 0x4, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x1616161716161617), rs1:x18(0xfffffffffffffffe), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0x1616161716161617, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x1616160d1616160d), rs1:x17(0xfffffffffffffffd), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0x1616160d1616160d, 0xfffffffffffffffd, 0x8, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x1616160616161606), rs1:x16(0xfffffffffffffffb), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0x1616160616161606, 0xfffffffffffffffb, 0x4, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x1616161216161612), rs1:x15(0xfffffffffffffff7), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x1616161216161612, 0xfffffffffffffff7, 0x2, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x1616161416161614), rs1:x14(0xffffffffffffffef), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x1616161416161614, 0xffffffffffffffef, 0x1, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x1616161e1616161e), rs1:x13(0xffffffffffffffdf), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0x1616161e1616161e, 0xffffffffffffffdf, 0x3, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x1616161416161614), rs1:x12(0xffffffffffffffbf), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0x1616161416161614, 0xffffffffffffffbf, 0x1, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x1616161716161617), rs1:x11(0xffffffffffffff7f), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0x1616161716161617, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x1616161e1616161e), rs1:x10(0xfffffffffffffeff), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0x1616161e1616161e, 0xfffffffffffffeff, 0x3, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x1616163616161636), rs1:x9(0xfffffffffffffdff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x1616163616161636, 0xfffffffffffffdff, 0x5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x1616163616161636), rs1:x8(0xfffffffffffffbff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0x1616163616161636, 0xfffffffffffffbff, 0x5, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x1616161416161614), rs1:x7(0xfffffffffffff7ff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0x1616161416161614, 0xfffffffffffff7ff, 0x1, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x1616161416161614), rs1:x6(0xffffffffffffefff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x1616161416161614, 0xffffffffffffefff, 0x1, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x1616161416161614), rs1:x5(0xffffffffffffdfff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0x1616161416161614, 0xffffffffffffdfff, 0x1, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x1616163616161636), rs1:x4(0xffffffffffffbfff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0x1616163616161636, 0xffffffffffffbfff, 0x5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x1616163616161636), rs1:x3(0xffffffffffff7fff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0x1616163616161636, 0xffffffffffff7fff, 0x5, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x1616169616161696), rs1:x2(0xfffffffffffeffff), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0x1616169616161696, 0xfffffffffffeffff, 0x7, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x1616161416161614), rs1:x1(0xfffffffffffdffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x1616161416161614, 0xfffffffffffdffff, 0x1, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x1616161e1616161e), rs1:x31(0xfffffffffffbffff), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x1616161e1616161e, 0xfffffffffffbffff, 0x3, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x1616160616161606), rs1:x30(0xfffffffffff7ffff), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x1616160616161606, 0xfffffffffff7ffff, 0x4, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x1616161716161617), rs1:x29(0xffffffffffefffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x1616161716161617, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x1616160d1616160d), rs1:x28(0xffffffffffdfffff), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x1616160d1616160d, 0xffffffffffdfffff, 0x8, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x1616160616161606), rs1:x27(0xffffffffffbfffff), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0x1616160616161606, 0xffffffffffbfffff, 0x4, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x1616161216161612), rs1:x26(0xffffffffff7fffff), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x1616161216161612, 0xffffffffff7fffff, 0x2, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x1616161416161614), rs1:x25(0xfffffffffeffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x1616161416161614, 0xfffffffffeffffff, 0x1, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x1616161e1616161e), rs1:x24(0xfffffffffdffffff), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0x1616161e1616161e, 0xfffffffffdffffff, 0x3, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x1616161416161614), rs1:x23(0xfffffffffbffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x1616161416161614, 0xfffffffffbffffff, 0x1, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x1616161716161617), rs1:x22(0xfffffffff7ffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x1616161716161617, 0xfffffffff7ffffff, 0x0, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x1616161e1616161e), rs1:x21(0xffffffffefffffff), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x1616161e1616161e, 0xffffffffefffffff, 0x3, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x1616163616161636), rs1:x20(0xffffffffdfffffff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x1616163616161636, 0xffffffffdfffffff, 0x5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x1616163616161636), rs1:x19(0xffffffffbfffffff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0x1616163616161636, 0xffffffffbfffffff, 0x5, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x1616161416161614), rs1:x18(0xffffffff7fffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0x1616161416161614, 0xffffffff7fffffff, 0x1, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xbb161614bb161614), rs1:x17(0xfffffffeffffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0xbb161614bb161614, 0xfffffffeffffffff, 0x1, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x5416161454161614), rs1:x16(0xfffffffdffffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0x5416161454161614, 0xfffffffdffffffff, 0x1, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x0f1616360f161636), rs1:x15(0xfffffffbffffffff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x0f1616360f161636, 0xfffffffbffffffff, 0x5, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x6816163668161636), rs1:x14(0xfffffff7ffffffff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x6816163668161636, 0xfffffff7ffffffff, 0x5, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xdf161696df161696), rs1:x13(0xffffffefffffffff), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0xdf161696df161696, 0xffffffefffffffff, 0x7, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x9e1616149e161614), rs1:x12(0xffffffdfffffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0x9e1616149e161614, 0xffffffdfffffffff, 0x1, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x0816161e0816161e), rs1:x11(0xffffffbfffffffff), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0x0816161e0816161e, 0xffffffbfffffffff, 0x3, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xd2161606d2161606), rs1:x10(0xffffff7fffffffff), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0xd2161606d2161606, 0xffffff7fffffffff, 0x4, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x161616ba161616ba), rs1:x9(0xfffffeffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x161616ba161616ba, 0xfffffeffffffffff, 0x0, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x1616164f1616164f), rs1:x8(0xfffffdffffffffff), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0x1616164f1616164f, 0xfffffdffffffffff, 0x8, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x1616161f1616161f), rs1:x7(0xfffffbffffffffff), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0x1616161f1616161f, 0xfffffbffffffffff, 0x4, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x1616166c1616166c), rs1:x6(0xfffff7ffffffffff), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x1616166c1616166c, 0xfffff7ffffffffff, 0x2, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x161616dd161616dd), rs1:x5(0xffffefffffffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0x161616dd161616dd, 0xffffefffffffffff, 0x1, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x1616169616161696), rs1:x4(0xffffdfffffffffff), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0x1616169616161696, 0xffffdfffffffffff, 0x3, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x1616160a1616160a), rs1:x3(0xffffbfffffffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0x1616160a1616160a, 0xffffbfffffffffff, 0x1, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x161616d3161616d3), rs1:x2(0xffff7fffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0x161616d3161616d3, 0xffff7fffffffffff, 0x0, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x1616bb1e1616bb1e), rs1:x1(0xfffeffffffffffff), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x1616bb1e1616bb1e, 0xfffeffffffffffff, 0x3, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x1616543616165436), rs1:x31(0xfffdffffffffffff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x1616543616165436, 0xfffdffffffffffff, 0x5, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x16160f3616160f36), rs1:x30(0xfffbffffffffffff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x16160f3616160f36, 0xfffbffffffffffff, 0x5, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x1616681416166814), rs1:x29(0xfff7ffffffffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x1616681416166814, 0xfff7ffffffffffff, 0x1, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x1616df141616df14), rs1:x28(0xffefffffffffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x1616df141616df14, 0xffefffffffffffff, 0x1, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x16169e1416169e14), rs1:x27(0xffdfffffffffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0x16169e1416169e14, 0xffdfffffffffffff, 0x1, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x1616083616160836), rs1:x26(0xffbfffffffffffff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x1616083616160836, 0xffbfffffffffffff, 0x5, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x1616d2171616d217), rs1:x25(0xff7fffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x1616d2171616d217, 0xff7fffffffffffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x16bb161716bb1617), rs1:x24(0xfeffffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0x16bb161716bb1617, 0xfeffffffffffffff, 0x0, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x1654161716541617), rs1:x23(0xfdffffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x1654161716541617, 0xfdffffffffffffff, 0x0, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x160f1617160f1617), rs1:x22(0xfbffffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x160f1617160f1617, 0xfbffffffffffffff, 0x0, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x1668161716681617), rs1:x21(0xf7ffffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x1668161716681617, 0xf7ffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x16df161716df1617), rs1:x20(0xefffffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x16df161716df1617, 0xefffffffffffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x169e1617169e1617), rs1:x19(0xdfffffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0x169e1617169e1617, 0xdfffffffffffffff, 0x0, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x1608161716081617), rs1:x18(0xbfffffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0x1608161716081617, 0xbfffffffffffffff, 0x0, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x16d2161716d21617), rs1:x17(0x7fffffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0x16d2161716d21617, 0x7fffffffffffffff, 0x0, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x1616161716161617), rs1:x16(0xffffffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0x1616161716161617, 0xffffffffffffffff, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x6363636263636362), rs1:x15(0x0000000000000001), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x6363636263636362, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x6363636263636362), rs1:x14(0x0000000000000002), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x6363636263636362, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x6363636263636362), rs1:x13(0x0000000000000004), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0x6363636263636362, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x6363636263636362), rs1:x12(0x0000000000000008), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0x6363636263636362, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x6363636263636362), rs1:x11(0x0000000000000010), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0x6363636263636362, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x6363636263636362), rs1:x10(0x0000000000000020), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0x6363636263636362, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x6363636263636362), rs1:x9(0x0000000000000040), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x6363636263636362, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x6363636263636362), rs1:x8(0x0000000000000080), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0x6363636263636362, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x6363636263636362), rs1:x7(0x0000000000000100), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0x6363636263636362, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x6363636263636362), rs1:x6(0x0000000000000200), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x6363636263636362, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x6363636263636362), rs1:x5(0x0000000000000400), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0x6363636263636362, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x6363636263636362), rs1:x4(0x0000000000000800), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0x6363636263636362, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x6363636263636362), rs1:x3(0x0000000000001000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0x6363636263636362, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x6363636263636362), rs1:x2(0x0000000000002000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0x6363636263636362, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x6363636263636362), rs1:x1(0x0000000000004000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x6363636263636362, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x6363636263636362), rs1:x31(0x0000000000008000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x6363636263636362, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x6363636263636362), rs1:x30(0x0000000000010000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x6363636263636362, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x6363636263636362), rs1:x29(0x0000000000020000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x6363636263636362, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x6363636263636362), rs1:x28(0x0000000000040000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x6363636263636362, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x6363636263636362), rs1:x27(0x0000000000080000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0x6363636263636362, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x6363636263636362), rs1:x26(0x0000000000100000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x6363636263636362, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x6363636263636362), rs1:x25(0x0000000000200000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x6363636263636362, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x6363636263636362), rs1:x24(0x0000000000400000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0x6363636263636362, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x6363636263636362), rs1:x23(0x0000000000800000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x6363636263636362, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x6363636263636362), rs1:x22(0x0000000001000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x6363636263636362, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x6363636263636362), rs1:x21(0x0000000002000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x6363636263636362, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x6363636263636362), rs1:x20(0x0000000004000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x6363636263636362, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x6363636263636362), rs1:x19(0x0000000008000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0x6363636263636362, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x6363636263636362), rs1:x18(0x0000000010000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0x6363636263636362, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x6363636263636362), rs1:x17(0x0000000020000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0x6363636263636362, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x6363636263636362), rs1:x16(0x0000000040000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0x6363636263636362, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x6363636263636362), rs1:x15(0x0000000080000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x6363636263636362, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x7c6363627c636362), rs1:x14(0x0000000100000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x7c6363627c636362, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x7763636277636362), rs1:x13(0x0000000200000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0x7763636277636362, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0xf2636362f2636362), rs1:x12(0x0000000400000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0xf2636362f2636362, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x3063636230636362), rs1:x11(0x0000000800000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0x3063636230636362, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0xca636362ca636362), rs1:x10(0x0000001000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0xca636362ca636362, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0xb7636362b7636362), rs1:x9(0x0000002000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0xb7636362b7636362, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0963636209636362), rs1:x8(0x0000004000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0x0963636209636362, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0xcd636362cd636362), rs1:x7(0x0000008000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0xcd636362cd636362, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x6363637d6363637d), rs1:x6(0x0000010000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x6363637d6363637d, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x6363637663636376), rs1:x5(0x0000020000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0x6363637663636376, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x636363f3636363f3), rs1:x4(0x0000040000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0x636363f3636363f3, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x6363633163636331), rs1:x3(0x0000080000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0x6363633163636331, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x636363cb636363cb), rs1:x2(0x0000100000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0x636363cb636363cb, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x636363b6636363b6), rs1:x1(0x0000200000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x636363b6636363b6, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x6363630863636308), rs1:x31(0x0000400000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x6363630863636308, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x636363cc636363cc), rs1:x30(0x0000800000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x636363cc636363cc, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x63637c6263637c62), rs1:x29(0x0001000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x63637c6263637c62, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x6363776263637762), rs1:x28(0x0002000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x6363776263637762, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x6363f2626363f262), rs1:x27(0x0004000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0x6363f2626363f262, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x6363306263633062), rs1:x26(0x0008000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x6363306263633062, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x6363ca626363ca62), rs1:x25(0x0010000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x6363ca626363ca62, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x6363b7626363b762), rs1:x24(0x0020000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0x6363b7626363b762, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x6363096263630962), rs1:x23(0x0040000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x6363096263630962, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x6363cd626363cd62), rs1:x22(0x0080000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x6363cd626363cd62, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x637c6362637c6362), rs1:x21(0x0100000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x637c6362637c6362, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x6377636263776362), rs1:x20(0x0200000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x6377636263776362, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x63f2636263f26362), rs1:x19(0x0400000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0x63f2636263f26362, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x6330636263306362), rs1:x18(0x0800000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0x6330636263306362, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x63ca636263ca6362), rs1:x17(0x1000000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0x63ca636263ca6362, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x63b7636263b76362), rs1:x16(0x2000000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0x63b7636263b76362, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x6309636263096362), rs1:x15(0x4000000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x6309636263096362, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x63cd636263cd6362), rs1:x14(0x8000000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x63cd636263cd6362, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x6363636263636362), rs1:x13(0x0000000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0x6363636263636362, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x1616161716161617), rs1:x12(0xfffffffffffffffe), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0x1616161716161617, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x1616161716161617), rs1:x11(0xfffffffffffffffd), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0x1616161716161617, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x1616161716161617), rs1:x10(0xfffffffffffffffb), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0x1616161716161617, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x1616161716161617), rs1:x9(0xfffffffffffffff7), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x1616161716161617, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x1616161716161617), rs1:x8(0xffffffffffffffef), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0x1616161716161617, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x1616161716161617), rs1:x7(0xffffffffffffffdf), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0x1616161716161617, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x1616161716161617), rs1:x6(0xffffffffffffffbf), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x1616161716161617, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x1616161716161617), rs1:x5(0xffffffffffffff7f), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0x1616161716161617, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x1616161716161617), rs1:x4(0xfffffffffffffeff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0x1616161716161617, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x1616161716161617), rs1:x3(0xfffffffffffffdff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0x1616161716161617, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x1616161716161617), rs1:x2(0xfffffffffffffbff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0x1616161716161617, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x1616161716161617), rs1:x1(0xfffffffffffff7ff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x1616161716161617, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x1616161716161617), rs1:x31(0xffffffffffffefff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x1616161716161617, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x1616161716161617), rs1:x30(0xffffffffffffdfff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x1616161716161617, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x1616161716161617), rs1:x29(0xffffffffffffbfff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x1616161716161617, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x1616161716161617), rs1:x28(0xffffffffffff7fff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x1616161716161617, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x1616161716161617), rs1:x27(0xfffffffffffeffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0x1616161716161617, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x1616161716161617), rs1:x26(0xfffffffffffdffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x1616161716161617, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x1616161716161617), rs1:x25(0xfffffffffffbffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x1616161716161617, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x1616161716161617), rs1:x24(0xfffffffffff7ffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0x1616161716161617, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x1616161716161617), rs1:x23(0xffffffffffefffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x1616161716161617, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x1616161716161617), rs1:x22(0xffffffffffdfffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x1616161716161617, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x1616161716161617), rs1:x21(0xffffffffffbfffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x1616161716161617, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x1616161716161617), rs1:x20(0xffffffffff7fffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x1616161716161617, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x1616161716161617), rs1:x19(0xfffffffffeffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0x1616161716161617, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x1616161716161617), rs1:x18(0xfffffffffdffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0x1616161716161617, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x1616161716161617), rs1:x17(0xfffffffffbffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0x1616161716161617, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x1616161716161617), rs1:x16(0xfffffffff7ffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0x1616161716161617, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x1616161716161617), rs1:x15(0xffffffffefffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x1616161716161617, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x1616161716161617), rs1:x14(0xffffffffdfffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x1616161716161617, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x1616161716161617), rs1:x13(0xffffffffbfffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0x1616161716161617, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x1616161716161617), rs1:x12(0xffffffff7fffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0x1616161716161617, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xbb161617bb161617), rs1:x11(0xfffffffeffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0xbb161617bb161617, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x5416161754161617), rs1:x10(0xfffffffdffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0x5416161754161617, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x0f1616170f161617), rs1:x9(0xfffffffbffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x0f1616170f161617, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x6816161768161617), rs1:x8(0xfffffff7ffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0x6816161768161617, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xdf161617df161617), rs1:x7(0xffffffefffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0xdf161617df161617, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x9e1616179e161617), rs1:x6(0xffffffdfffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x9e1616179e161617, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x0816161708161617), rs1:x5(0xffffffbfffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0x0816161708161617, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xd2161617d2161617), rs1:x4(0xffffff7fffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0xd2161617d2161617, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x161616ba161616ba), rs1:x3(0xfffffeffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0x161616ba161616ba, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x1616165516161655), rs1:x2(0xfffffdffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0x1616165516161655, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x1616160e1616160e), rs1:x1(0xfffffbffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x1616160e1616160e, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x1616166916161669), rs1:x31(0xfffff7ffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x1616166916161669, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x161616de161616de), rs1:x30(0xffffefffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x161616de161616de, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x1616169f1616169f), rs1:x29(0xffffdfffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x1616169f1616169f, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x1616160916161609), rs1:x28(0xffffbfffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x1616160916161609, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x161616d3161616d3), rs1:x27(0xffff7fffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0x161616d3161616d3, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x1616bb171616bb17), rs1:x26(0xfffeffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x1616bb171616bb17, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x1616541716165417), rs1:x25(0xfffdffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x1616541716165417, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x16160f1716160f17), rs1:x24(0xfffbffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0x16160f1716160f17, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x1616681716166817), rs1:x23(0xfff7ffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x1616681716166817, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x1616df171616df17), rs1:x22(0xffefffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x1616df171616df17, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x16169e1716169e17), rs1:x21(0xffdfffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x16169e1716169e17, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x1616081716160817), rs1:x20(0xffbfffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x1616081716160817, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x1616d21e1616d21e), rs1:x19(0xff7fffffffffffff), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0x1616d21e1616d21e, 0xff7fffffffffffff, 0x3, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x16bb161416bb1614), rs1:x18(0xfeffffffffffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0x16bb161416bb1614, 0xfeffffffffffffff, 0x1, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x1654161716541617), rs1:x17(0xfdffffffffffffff), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0x1654161716541617, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x160f161e160f161e), rs1:x16(0xfbffffffffffffff), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0x160f161e160f161e, 0xfbffffffffffffff, 0x3, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x1668163616681636), rs1:x15(0xf7ffffffffffffff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x1668163616681636, 0xf7ffffffffffffff, 0x5, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x16df163616df1636), rs1:x14(0xefffffffffffffff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x16df163616df1636, 0xefffffffffffffff, 0x5, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x169e1614169e1614), rs1:x13(0xdfffffffffffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0x169e1614169e1614, 0xdfffffffffffffff, 0x1, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x1608161416081614), rs1:x12(0xbfffffffffffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0x1608161416081614, 0xbfffffffffffffff, 0x1, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x16d2161416d21614), rs1:x11(0x7fffffffffffffff), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0x16d2161416d21614, 0x7fffffffffffffff, 0x1, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x1616163616161636), rs1:x10(0xffffffffffffffff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0x1616163616161636, 0xffffffffffffffff, 0x5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x55ca540755ca5407), rs1:x9(0x10fd3dedadea5195), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x55ca540755ca5407, 0x10fd3dedadea5195, 0x5, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x0, x8, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0x7, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x6bdd43d96bdd43d9), rs1:x7(0xc9649f05a8e1a8bb), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0x6bdd43d96bdd43d9, 0xc9649f05a8e1a8bb, 0x1, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x6363636b6363636b), rs1:x0(0x3541291848c99fcb), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x26, x0, 0x6363636b6363636b, 0x3541291848c99fcb, 0x3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64KS1I-02.S b/riscof/suite/rv64i_m/K_unratified/AES64KS1I-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..410adb91026dfafafef1be59d02c910ae26ff9f6
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64KS1I-02.S
@@ -0,0 +1,1728 @@
+// RISC-V Architectural Validation Test AES64KS1I-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64ks1i'.
+// Using dataset: sbox64
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64ks1i)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64ks1i)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox64
+ // result rd:x1(0x6363636263636362), rs1:x31(0x0000000000000000), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x6363636263636362, 0x0, 0x0, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox64
+ // result rd:x2(0x7c7c7c7e7c7c7c7e), rs1:x30(0x0101010101010101), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x7c7c7c7e7c7c7c7e, 0x101010101010101, 0x1, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox64
+ // result rd:x3(0x7777777377777773), rs1:x29(0x0202020202020202), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x7777777377777773, 0x202020202020202, 0x2, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox64
+ // result rd:x4(0x7b7b7b737b7b7b73), rs1:x28(0x0303030303030303), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x7b7b7b737b7b7b73, 0x303030303030303, 0x3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox64
+ // result rd:x5(0xf2f2f2e2f2f2f2e2), rs1:x27(0x0404040404040404), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0xf2f2f2e2f2f2f2e2, 0x404040404040404, 0x4, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox64
+ // result rd:x6(0x6b6b6b4b6b6b6b4b), rs1:x26(0x0505050505050505), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x6b6b6b4b6b6b6b4b, 0x505050505050505, 0x5, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox64
+ // result rd:x7(0x6f6f6f2f6f6f6f2f), rs1:x25(0x0606060606060606), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x6f6f6f2f6f6f6f2f, 0x606060606060606, 0x6, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox64
+ // result rd:x8(0xc5c5c545c5c5c545), rs1:x24(0x0707070707070707), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0xc5c5c545c5c5c545, 0x707070707070707, 0x7, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox64
+ // result rd:x9(0x3030302b3030302b), rs1:x23(0x0808080808080808), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x3030302b3030302b, 0x808080808080808, 0x8, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox64
+ // result rd:x10(0x0101013701010137), rs1:x22(0x0909090909090909), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x0101013701010137, 0x909090909090909, 0x9, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox64
+ // result rd:x11(0x6767676767676767), rs1:x21(0x0a0a0a0a0a0a0a0a), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x6767676767676767, 0xa0a0a0a0a0a0a0a, 0xa, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox64
+ // result rd:x12(0x2b2b2b292b2b2b29), rs1:x20(0x0b0b0b0b0b0b0b0b), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x2b2b2b292b2b2b29, 0xb0b0b0b0b0b0b0b, 0x1, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox64
+ // result rd:x13(0xfefefefafefefefa), rs1:x19(0x0c0c0c0c0c0c0c0c), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0xfefefefafefefefa, 0xc0c0c0c0c0c0c0c, 0x2, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox64
+ // result rd:x14(0xd7d7d7dfd7d7d7df), rs1:x18(0x0d0d0d0d0d0d0d0d), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0xd7d7d7dfd7d7d7df, 0xd0d0d0d0d0d0d0d, 0x3, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox64
+ // result rd:x15(0xabababbbabababbb), rs1:x17(0x0e0e0e0e0e0e0e0e), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0xabababbbabababbb, 0xe0e0e0e0e0e0e0e, 0x4, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox64
+ // result rd:x16(0x7676765676767656), rs1:x16(0x0f0f0f0f0f0f0f0f), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0x7676765676767656, 0xf0f0f0f0f0f0f0f, 0x5, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox64
+ // result rd:x17(0xcacacacbcacacacb), rs1:x15(0x1010101010101010), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0xcacacacbcacacacb, 0x1010101010101010, 0x0, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox64
+ // result rd:x18(0x8282828082828280), rs1:x14(0x1111111111111111), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x8282828082828280, 0x1111111111111111, 0x1, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox64
+ // result rd:x19(0xc9c9c9cdc9c9c9cd), rs1:x13(0x1212121212121212), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0xc9c9c9cdc9c9c9cd, 0x1212121212121212, 0x2, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox64
+ // result rd:x20(0x7d7d7d757d7d7d75), rs1:x12(0x1313131313131313), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0x7d7d7d757d7d7d75, 0x1313131313131313, 0x3, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox64
+ // result rd:x21(0xfafafaeafafafaea), rs1:x11(0x1414141414141414), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0xfafafaeafafafaea, 0x1414141414141414, 0x4, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox64
+ // result rd:x22(0x5959597959595979), rs1:x10(0x1515151515151515), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0x5959597959595979, 0x1515151515151515, 0x5, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox64
+ // result rd:x23(0x4747470747474707), rs1:x9(0x1616161616161616), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x4747470747474707, 0x1616161616161616, 0x6, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox64
+ // result rd:x24(0xf0f0f070f0f0f070), rs1:x8(0x1717171717171717), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0xf0f0f070f0f0f070, 0x1717171717171717, 0x7, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox64
+ // result rd:x25(0xadadadb6adadadb6), rs1:x7(0x1818181818181818), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0xadadadb6adadadb6, 0x1818181818181818, 0x8, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox64
+ // result rd:x26(0xd4d4d4e2d4d4d4e2), rs1:x6(0x1919191919191919), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0xd4d4d4e2d4d4d4e2, 0x1919191919191919, 0x9, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox64
+ // result rd:x27(0xa2a2a2a2a2a2a2a2), rs1:x5(0x1a1a1a1a1a1a1a1a), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0xa2a2a2a2a2a2a2a2, 0x1a1a1a1a1a1a1a1a, 0xa, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox64
+ // result rd:x28(0xafafafadafafafad), rs1:x4(0x1b1b1b1b1b1b1b1b), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0xafafafadafafafad, 0x1b1b1b1b1b1b1b1b, 0x1, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox64
+ // result rd:x29(0x9c9c9c989c9c9c98), rs1:x3(0x1c1c1c1c1c1c1c1c), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0x9c9c9c989c9c9c98, 0x1c1c1c1c1c1c1c1c, 0x2, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox64
+ // result rd:x30(0xa4a4a4aca4a4a4ac), rs1:x2(0x1d1d1d1d1d1d1d1d), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0xa4a4a4aca4a4a4ac, 0x1d1d1d1d1d1d1d1d, 0x3, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox64
+ // result rd:x31(0x7272726272727262), rs1:x1(0x1e1e1e1e1e1e1e1e), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x7272726272727262, 0x1e1e1e1e1e1e1e1e, 0x4, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox64
+ // result rd:x1(0xc0c0c0e0c0c0c0e0), rs1:x31(0x1f1f1f1f1f1f1f1f), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0xc0c0c0e0c0c0c0e0, 0x1f1f1f1f1f1f1f1f, 0x5, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox64
+ // result rd:x2(0xb7b7b7b6b7b7b7b6), rs1:x30(0x2020202020202020), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0xb7b7b7b6b7b7b7b6, 0x2020202020202020, 0x0, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox64
+ // result rd:x3(0xfdfdfdfffdfdfdff), rs1:x29(0x2121212121212121), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0xfdfdfdfffdfdfdff, 0x2121212121212121, 0x1, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox64
+ // result rd:x4(0x9393939793939397), rs1:x28(0x2222222222222222), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x9393939793939397, 0x2222222222222222, 0x2, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox64
+ // result rd:x5(0x2626262e2626262e), rs1:x27(0x2323232323232323), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0x2626262e2626262e, 0x2323232323232323, 0x3, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox64
+ // result rd:x6(0x3636362636363626), rs1:x26(0x2424242424242424), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x3636362636363626, 0x2424242424242424, 0x4, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox64
+ // result rd:x7(0x3f3f3f1f3f3f3f1f), rs1:x25(0x2525252525252525), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x3f3f3f1f3f3f3f1f, 0x2525252525252525, 0x5, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox64
+ // result rd:x8(0xf7f7f7b7f7f7f7b7), rs1:x24(0x2626262626262626), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0xf7f7f7b7f7f7f7b7, 0x2626262626262626, 0x6, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox64
+ // result rd:x9(0xcccccc4ccccccc4c), rs1:x23(0x2727272727272727), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0xcccccc4ccccccc4c, 0x2727272727272727, 0x7, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox64
+ // result rd:x10(0x3434342f3434342f), rs1:x22(0x2828282828282828), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x3434342f3434342f, 0x2828282828282828, 0x8, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox64
+ // result rd:x11(0xa5a5a593a5a5a593), rs1:x21(0x2929292929292929), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0xa5a5a593a5a5a593, 0x2929292929292929, 0x9, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox64
+ // result rd:x12(0xe5e5e5e5e5e5e5e5), rs1:x20(0x2a2a2a2a2a2a2a2a), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0xe5e5e5e5e5e5e5e5, 0x2a2a2a2a2a2a2a2a, 0xa, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox64
+ // result rd:x13(0xf1f1f1f3f1f1f1f3), rs1:x19(0x2b2b2b2b2b2b2b2b), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0xf1f1f1f3f1f1f1f3, 0x2b2b2b2b2b2b2b2b, 0x1, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox64
+ // result rd:x14(0x7171717571717175), rs1:x18(0x2c2c2c2c2c2c2c2c), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0x7171717571717175, 0x2c2c2c2c2c2c2c2c, 0x2, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox64
+ // result rd:x15(0xd8d8d8d0d8d8d8d0), rs1:x17(0x2d2d2d2d2d2d2d2d), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0xd8d8d8d0d8d8d8d0, 0x2d2d2d2d2d2d2d2d, 0x3, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox64
+ // result rd:x16(0x3131312131313121), rs1:x16(0x2e2e2e2e2e2e2e2e), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0x3131312131313121, 0x2e2e2e2e2e2e2e2e, 0x4, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox64
+ // result rd:x17(0x1515153515151535), rs1:x15(0x2f2f2f2f2f2f2f2f), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x1515153515151535, 0x2f2f2f2f2f2f2f2f, 0x5, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox64
+ // result rd:x18(0x0404040504040405), rs1:x14(0x3030303030303030), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x0404040504040405, 0x3030303030303030, 0x0, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox64
+ // result rd:x19(0xc7c7c7c5c7c7c7c5), rs1:x13(0x3131313131313131), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0xc7c7c7c5c7c7c7c5, 0x3131313131313131, 0x1, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox64
+ // result rd:x20(0x2323232723232327), rs1:x12(0x3232323232323232), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0x2323232723232327, 0x3232323232323232, 0x2, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox64
+ // result rd:x21(0xc3c3c3cbc3c3c3cb), rs1:x11(0x3333333333333333), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0xc3c3c3cbc3c3c3cb, 0x3333333333333333, 0x3, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox64
+ // result rd:x22(0x1818180818181808), rs1:x10(0x3434343434343434), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0x1818180818181808, 0x3434343434343434, 0x4, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox64
+ // result rd:x23(0x969696b6969696b6), rs1:x9(0x3535353535353535), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x969696b6969696b6, 0x3535353535353535, 0x5, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox64
+ // result rd:x24(0x0505054505050545), rs1:x8(0x3636363636363636), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0x0505054505050545, 0x3636363636363636, 0x6, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox64
+ // result rd:x25(0x9a9a9a1a9a9a9a1a), rs1:x7(0x3737373737373737), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0x9a9a9a1a9a9a9a1a, 0x3737373737373737, 0x7, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox64
+ // result rd:x26(0x0707071c0707071c), rs1:x6(0x3838383838383838), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x0707071c0707071c, 0x3838383838383838, 0x8, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox64
+ // result rd:x27(0x1212122412121224), rs1:x5(0x3939393939393939), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0x1212122412121224, 0x3939393939393939, 0x9, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox64
+ // result rd:x28(0x8080808080808080), rs1:x4(0x3a3a3a3a3a3a3a3a), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0x8080808080808080, 0x3a3a3a3a3a3a3a3a, 0xa, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox64
+ // result rd:x29(0xe2e2e2e0e2e2e2e0), rs1:x3(0x3b3b3b3b3b3b3b3b), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0xe2e2e2e0e2e2e2e0, 0x3b3b3b3b3b3b3b3b, 0x1, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox64
+ // result rd:x30(0xebebebefebebebef), rs1:x2(0x3c3c3c3c3c3c3c3c), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0xebebebefebebebef, 0x3c3c3c3c3c3c3c3c, 0x2, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox64
+ // result rd:x31(0x2727272f2727272f), rs1:x1(0x3d3d3d3d3d3d3d3d), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x2727272f2727272f, 0x3d3d3d3d3d3d3d3d, 0x3, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox64
+ // result rd:x1(0xb2b2b2a2b2b2b2a2), rs1:x31(0x3e3e3e3e3e3e3e3e), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0xb2b2b2a2b2b2b2a2, 0x3e3e3e3e3e3e3e3e, 0x4, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox64
+ // result rd:x2(0x7575755575757555), rs1:x30(0x3f3f3f3f3f3f3f3f), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x7575755575757555, 0x3f3f3f3f3f3f3f3f, 0x5, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox64
+ // result rd:x3(0x0909090809090908), rs1:x29(0x4040404040404040), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x0909090809090908, 0x4040404040404040, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox64
+ // result rd:x4(0x8383838183838381), rs1:x28(0x4141414141414141), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x8383838183838381, 0x4141414141414141, 0x1, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox64
+ // result rd:x5(0x2c2c2c282c2c2c28), rs1:x27(0x4242424242424242), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0x2c2c2c282c2c2c28, 0x4242424242424242, 0x2, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox64
+ // result rd:x6(0x1a1a1a121a1a1a12), rs1:x26(0x4343434343434343), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x1a1a1a121a1a1a12, 0x4343434343434343, 0x3, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox64
+ // result rd:x7(0x1b1b1b0b1b1b1b0b), rs1:x25(0x4444444444444444), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x1b1b1b0b1b1b1b0b, 0x4444444444444444, 0x4, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox64
+ // result rd:x8(0x6e6e6e4e6e6e6e4e), rs1:x24(0x4545454545454545), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0x6e6e6e4e6e6e6e4e, 0x4545454545454545, 0x5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox64
+ // result rd:x9(0x5a5a5a1a5a5a5a1a), rs1:x23(0x4646464646464646), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x5a5a5a1a5a5a5a1a, 0x4646464646464646, 0x6, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox64
+ // result rd:x10(0xa0a0a020a0a0a020), rs1:x22(0x4747474747474747), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0xa0a0a020a0a0a020, 0x4747474747474747, 0x7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox64
+ // result rd:x11(0x5252524952525249), rs1:x21(0x4848484848484848), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x5252524952525249, 0x4848484848484848, 0x8, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox64
+ // result rd:x12(0x3b3b3b0d3b3b3b0d), rs1:x20(0x4949494949494949), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x3b3b3b0d3b3b3b0d, 0x4949494949494949, 0x9, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox64
+ // result rd:x13(0xd6d6d6d6d6d6d6d6), rs1:x19(0x4a4a4a4a4a4a4a4a), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0xd6d6d6d6d6d6d6d6, 0x4a4a4a4a4a4a4a4a, 0xa, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox64
+ // result rd:x14(0xb3b3b3b1b3b3b3b1), rs1:x18(0x4b4b4b4b4b4b4b4b), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0xb3b3b3b1b3b3b3b1, 0x4b4b4b4b4b4b4b4b, 0x1, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox64
+ // result rd:x15(0x2929292d2929292d), rs1:x17(0x4c4c4c4c4c4c4c4c), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0x2929292d2929292d, 0x4c4c4c4c4c4c4c4c, 0x2, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox64
+ // result rd:x16(0xe3e3e3ebe3e3e3eb), rs1:x16(0x4d4d4d4d4d4d4d4d), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0xe3e3e3ebe3e3e3eb, 0x4d4d4d4d4d4d4d4d, 0x3, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox64
+ // result rd:x17(0x2f2f2f3f2f2f2f3f), rs1:x15(0x4e4e4e4e4e4e4e4e), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x2f2f2f3f2f2f2f3f, 0x4e4e4e4e4e4e4e4e, 0x4, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox64
+ // result rd:x18(0x848484a4848484a4), rs1:x14(0x4f4f4f4f4f4f4f4f), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x848484a4848484a4, 0x4f4f4f4f4f4f4f4f, 0x5, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox64
+ // result rd:x19(0x5353535253535352), rs1:x13(0x5050505050505050), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0x5353535253535352, 0x5050505050505050, 0x0, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox64
+ // result rd:x20(0xd1d1d1d3d1d1d1d3), rs1:x12(0x5151515151515151), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0xd1d1d1d3d1d1d1d3, 0x5151515151515151, 0x1, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox64
+ // result rd:x21(0x0000000400000004), rs1:x11(0x5252525252525252), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0x0000000400000004, 0x5252525252525252, 0x2, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox64
+ // result rd:x22(0xededede5ededede5), rs1:x10(0x5353535353535353), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0xededede5ededede5, 0x5353535353535353, 0x3, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox64
+ // result rd:x23(0x2020203020202030), rs1:x9(0x5454545454545454), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x2020203020202030, 0x5454545454545454, 0x4, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox64
+ // result rd:x24(0xfcfcfcdcfcfcfcdc), rs1:x8(0x5555555555555555), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0xfcfcfcdcfcfcfcdc, 0x5555555555555555, 0x5, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox64
+ // result rd:x25(0xb1b1b1f1b1b1b1f1), rs1:x7(0x5656565656565656), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0xb1b1b1f1b1b1b1f1, 0x5656565656565656, 0x6, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox64
+ // result rd:x26(0x5b5b5bdb5b5b5bdb), rs1:x6(0x5757575757575757), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x5b5b5bdb5b5b5bdb, 0x5757575757575757, 0x7, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox64
+ // result rd:x27(0x6a6a6a716a6a6a71), rs1:x5(0x5858585858585858), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0x6a6a6a716a6a6a71, 0x5858585858585858, 0x8, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox64
+ // result rd:x28(0xcbcbcbfdcbcbcbfd), rs1:x4(0x5959595959595959), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0xcbcbcbfdcbcbcbfd, 0x5959595959595959, 0x9, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox64
+ // result rd:x29(0xbebebebebebebebe), rs1:x3(0x5a5a5a5a5a5a5a5a), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0xbebebebebebebebe, 0x5a5a5a5a5a5a5a5a, 0xa, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox64
+ // result rd:x30(0x3939393b3939393b), rs1:x2(0x5b5b5b5b5b5b5b5b), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0x3939393b3939393b, 0x5b5b5b5b5b5b5b5b, 0x1, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox64
+ // result rd:x31(0x4a4a4a4e4a4a4a4e), rs1:x1(0x5c5c5c5c5c5c5c5c), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x4a4a4a4e4a4a4a4e, 0x5c5c5c5c5c5c5c5c, 0x2, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox64
+ // result rd:x1(0x4c4c4c444c4c4c44), rs1:x31(0x5d5d5d5d5d5d5d5d), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x4c4c4c444c4c4c44, 0x5d5d5d5d5d5d5d5d, 0x3, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox64
+ // result rd:x2(0x5858584858585848), rs1:x30(0x5e5e5e5e5e5e5e5e), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x5858584858585848, 0x5e5e5e5e5e5e5e5e, 0x4, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox64
+ // result rd:x3(0xcfcfcfefcfcfcfef), rs1:x29(0x5f5f5f5f5f5f5f5f), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0xcfcfcfefcfcfcfef, 0x5f5f5f5f5f5f5f5f, 0x5, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox64
+ // result rd:x4(0xd0d0d0d1d0d0d0d1), rs1:x28(0x6060606060606060), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0xd0d0d0d1d0d0d0d1, 0x6060606060606060, 0x0, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox64
+ // result rd:x5(0xefefefedefefefed), rs1:x27(0x6161616161616161), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0xefefefedefefefed, 0x6161616161616161, 0x1, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox64
+ // result rd:x6(0xaaaaaaaeaaaaaaae), rs1:x26(0x6262626262626262), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0xaaaaaaaeaaaaaaae, 0x6262626262626262, 0x2, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox64
+ // result rd:x7(0xfbfbfbf3fbfbfbf3), rs1:x25(0x6363636363636363), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0xfbfbfbf3fbfbfbf3, 0x6363636363636363, 0x3, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox64
+ // result rd:x8(0x4343435343434353), rs1:x24(0x6464646464646464), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0x4343435343434353, 0x6464646464646464, 0x4, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox64
+ // result rd:x9(0x4d4d4d6d4d4d4d6d), rs1:x23(0x6565656565656565), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x4d4d4d6d4d4d4d6d, 0x6565656565656565, 0x5, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox64
+ // result rd:x10(0x3333337333333373), rs1:x22(0x6666666666666666), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x3333337333333373, 0x6666666666666666, 0x6, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox64
+ // result rd:x11(0x8585850585858505), rs1:x21(0x6767676767676767), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x8585850585858505, 0x6767676767676767, 0x7, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox64
+ // result rd:x12(0x4545455e4545455e), rs1:x20(0x6868686868686868), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x4545455e4545455e, 0x6868686868686868, 0x8, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox64
+ // result rd:x13(0xf9f9f9cff9f9f9cf), rs1:x19(0x6969696969696969), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0xf9f9f9cff9f9f9cf, 0x6969696969696969, 0x9, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox64
+ // result rd:x14(0x0202020202020202), rs1:x18(0x6a6a6a6a6a6a6a6a), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0x0202020202020202, 0x6a6a6a6a6a6a6a6a, 0xa, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox64
+ // result rd:x15(0x7f7f7f7d7f7f7f7d), rs1:x17(0x6b6b6b6b6b6b6b6b), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0x7f7f7f7d7f7f7f7d, 0x6b6b6b6b6b6b6b6b, 0x1, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox64
+ // result rd:x16(0x5050505450505054), rs1:x16(0x6c6c6c6c6c6c6c6c), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0x5050505450505054, 0x6c6c6c6c6c6c6c6c, 0x2, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox64
+ // result rd:x17(0x3c3c3c343c3c3c34), rs1:x15(0x6d6d6d6d6d6d6d6d), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x3c3c3c343c3c3c34, 0x6d6d6d6d6d6d6d6d, 0x3, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox64
+ // result rd:x18(0x9f9f9f8f9f9f9f8f), rs1:x14(0x6e6e6e6e6e6e6e6e), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x9f9f9f8f9f9f9f8f, 0x6e6e6e6e6e6e6e6e, 0x4, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox64
+ // result rd:x19(0xa8a8a888a8a8a888), rs1:x13(0x6f6f6f6f6f6f6f6f), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0xa8a8a888a8a8a888, 0x6f6f6f6f6f6f6f6f, 0x5, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox64
+ // result rd:x20(0x5151515051515150), rs1:x12(0x7070707070707070), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0x5151515051515150, 0x7070707070707070, 0x0, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox64
+ // result rd:x21(0xa3a3a3a1a3a3a3a1), rs1:x11(0x7171717171717171), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0xa3a3a3a1a3a3a3a1, 0x7171717171717171, 0x1, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox64
+ // result rd:x22(0x4040404440404044), rs1:x10(0x7272727272727272), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0x4040404440404044, 0x7272727272727272, 0x2, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox64
+ // result rd:x23(0x8f8f8f878f8f8f87), rs1:x9(0x7373737373737373), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x8f8f8f878f8f8f87, 0x7373737373737373, 0x3, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox64
+ // result rd:x24(0x9292928292929282), rs1:x8(0x7474747474747474), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0x9292928292929282, 0x7474747474747474, 0x4, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox64
+ // result rd:x25(0x9d9d9dbd9d9d9dbd), rs1:x7(0x7575757575757575), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0x9d9d9dbd9d9d9dbd, 0x7575757575757575, 0x5, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox64
+ // result rd:x26(0x3838387838383878), rs1:x6(0x7676767676767676), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x3838387838383878, 0x7676767676767676, 0x6, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox64
+ // result rd:x27(0xf5f5f575f5f5f575), rs1:x5(0x7777777777777777), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0xf5f5f575f5f5f575, 0x7777777777777777, 0x7, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox64
+ // result rd:x28(0xbcbcbca7bcbcbca7), rs1:x4(0x7878787878787878), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0xbcbcbca7bcbcbca7, 0x7878787878787878, 0x8, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox64
+ // result rd:x29(0xb6b6b680b6b6b680), rs1:x3(0x7979797979797979), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0xb6b6b680b6b6b680, 0x7979797979797979, 0x9, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox64
+ // result rd:x30(0xdadadadadadadada), rs1:x2(0x7a7a7a7a7a7a7a7a), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0xdadadadadadadada, 0x7a7a7a7a7a7a7a7a, 0xa, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox64
+ // result rd:x31(0x2121212321212123), rs1:x1(0x7b7b7b7b7b7b7b7b), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x2121212321212123, 0x7b7b7b7b7b7b7b7b, 0x1, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox64
+ // result rd:x1(0x1010101410101014), rs1:x31(0x7c7c7c7c7c7c7c7c), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x1010101410101014, 0x7c7c7c7c7c7c7c7c, 0x2, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox64
+ // result rd:x2(0xfffffff7fffffff7), rs1:x30(0x7d7d7d7d7d7d7d7d), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0xfffffff7fffffff7, 0x7d7d7d7d7d7d7d7d, 0x3, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox64
+ // result rd:x3(0xf3f3f3e3f3f3f3e3), rs1:x29(0x7e7e7e7e7e7e7e7e), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0xf3f3f3e3f3f3f3e3, 0x7e7e7e7e7e7e7e7e, 0x4, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox64
+ // result rd:x4(0xd2d2d2f2d2d2d2f2), rs1:x28(0x7f7f7f7f7f7f7f7f), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0xd2d2d2f2d2d2d2f2, 0x7f7f7f7f7f7f7f7f, 0x5, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox64
+ // result rd:x5(0xcdcdcdcccdcdcdcc), rs1:x27(0x8080808080808080), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0xcdcdcdcccdcdcdcc, 0x8080808080808080, 0x0, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox64
+ // result rd:x6(0x0c0c0c0e0c0c0c0e), rs1:x26(0x8181818181818181), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x0c0c0c0e0c0c0c0e, 0x8181818181818181, 0x1, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox64
+ // result rd:x7(0x1313131713131317), rs1:x25(0x8282828282828282), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x1313131713131317, 0x8282828282828282, 0x2, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox64
+ // result rd:x8(0xececece4ececece4), rs1:x24(0x8383838383838383), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0xececece4ececece4, 0x8383838383838383, 0x3, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox64
+ // result rd:x9(0x5f5f5f4f5f5f5f4f), rs1:x23(0x8484848484848484), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x5f5f5f4f5f5f5f4f, 0x8484848484848484, 0x4, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox64
+ // result rd:x10(0x979797b7979797b7), rs1:x22(0x8585858585858585), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x979797b7979797b7, 0x8585858585858585, 0x5, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox64
+ // result rd:x11(0x4444440444444404), rs1:x21(0x8686868686868686), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x4444440444444404, 0x8686868686868686, 0x6, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox64
+ // result rd:x12(0x1717179717171797), rs1:x20(0x8787878787878787), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x1717179717171797, 0x8787878787878787, 0x7, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox64
+ // result rd:x13(0xc4c4c4dfc4c4c4df), rs1:x19(0x8888888888888888), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0xc4c4c4dfc4c4c4df, 0x8888888888888888, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox64
+ // result rd:x14(0xa7a7a791a7a7a791), rs1:x18(0x8989898989898989), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0xa7a7a791a7a7a791, 0x8989898989898989, 0x9, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox64
+ // result rd:x15(0x7e7e7e7e7e7e7e7e), rs1:x17(0x8a8a8a8a8a8a8a8a), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0x7e7e7e7e7e7e7e7e, 0x8a8a8a8a8a8a8a8a, 0xa, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox64
+ // result rd:x16(0x3d3d3d3f3d3d3d3f), rs1:x16(0x8b8b8b8b8b8b8b8b), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0x3d3d3d3f3d3d3d3f, 0x8b8b8b8b8b8b8b8b, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox64
+ // result rd:x17(0x6464646064646460), rs1:x15(0x8c8c8c8c8c8c8c8c), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x6464646064646460, 0x8c8c8c8c8c8c8c8c, 0x2, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox64
+ // result rd:x18(0x5d5d5d555d5d5d55), rs1:x14(0x8d8d8d8d8d8d8d8d), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x5d5d5d555d5d5d55, 0x8d8d8d8d8d8d8d8d, 0x3, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox64
+ // result rd:x19(0x1919190919191909), rs1:x13(0x8e8e8e8e8e8e8e8e), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0x1919190919191909, 0x8e8e8e8e8e8e8e8e, 0x4, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox64
+ // result rd:x20(0x7373735373737353), rs1:x12(0x8f8f8f8f8f8f8f8f), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0x7373735373737353, 0x8f8f8f8f8f8f8f8f, 0x5, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox64
+ // result rd:x21(0x6060606160606061), rs1:x11(0x9090909090909090), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0x6060606160606061, 0x9090909090909090, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox64
+ // result rd:x22(0x8181818381818183), rs1:x10(0x9191919191919191), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0x8181818381818183, 0x9191919191919191, 0x1, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox64
+ // result rd:x23(0x4f4f4f4b4f4f4f4b), rs1:x9(0x9292929292929292), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x4f4f4f4b4f4f4f4b, 0x9292929292929292, 0x2, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox64
+ // result rd:x24(0xdcdcdcd4dcdcdcd4), rs1:x8(0x9393939393939393), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0xdcdcdcd4dcdcdcd4, 0x9393939393939393, 0x3, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox64
+ // result rd:x25(0x2222223222222232), rs1:x7(0x9494949494949494), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0x2222223222222232, 0x9494949494949494, 0x4, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox64
+ // result rd:x26(0x2a2a2a0a2a2a2a0a), rs1:x6(0x9595959595959595), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x2a2a2a0a2a2a2a0a, 0x9595959595959595, 0x5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox64
+ // result rd:x27(0x909090d0909090d0), rs1:x5(0x9696969696969696), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0x909090d0909090d0, 0x9696969696969696, 0x6, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox64
+ // result rd:x28(0x8888880888888808), rs1:x4(0x9797979797979797), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0x8888880888888808, 0x9797979797979797, 0x7, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox64
+ // result rd:x29(0x4646465d4646465d), rs1:x3(0x9898989898989898), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0x4646465d4646465d, 0x9898989898989898, 0x8, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox64
+ // result rd:x30(0xeeeeeed8eeeeeed8), rs1:x2(0x9999999999999999), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0xeeeeeed8eeeeeed8, 0x9999999999999999, 0x9, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox64
+ // result rd:x31(0xb8b8b8b8b8b8b8b8), rs1:x1(0x9a9a9a9a9a9a9a9a), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0xb8b8b8b8b8b8b8b8, 0x9a9a9a9a9a9a9a9a, 0xa, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox64
+ // result rd:x1(0x1414141614141416), rs1:x31(0x9b9b9b9b9b9b9b9b), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x1414141614141416, 0x9b9b9b9b9b9b9b9b, 0x1, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox64
+ // result rd:x2(0xdedededadedededa), rs1:x30(0x9c9c9c9c9c9c9c9c), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0xdedededadedededa, 0x9c9c9c9c9c9c9c9c, 0x2, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox64
+ // result rd:x3(0x5e5e5e565e5e5e56), rs1:x29(0x9d9d9d9d9d9d9d9d), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x5e5e5e565e5e5e56, 0x9d9d9d9d9d9d9d9d, 0x3, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox64
+ // result rd:x4(0x0b0b0b1b0b0b0b1b), rs1:x28(0x9e9e9e9e9e9e9e9e), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x0b0b0b1b0b0b0b1b, 0x9e9e9e9e9e9e9e9e, 0x4, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox64
+ // result rd:x5(0xdbdbdbfbdbdbdbfb), rs1:x27(0x9f9f9f9f9f9f9f9f), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0xdbdbdbfbdbdbdbfb, 0x9f9f9f9f9f9f9f9f, 0x5, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox64
+ // result rd:x6(0xe0e0e0e1e0e0e0e1), rs1:x26(0xa0a0a0a0a0a0a0a0), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0xe0e0e0e1e0e0e0e1, 0xa0a0a0a0a0a0a0a0, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox64
+ // result rd:x7(0x3232323032323230), rs1:x25(0xa1a1a1a1a1a1a1a1), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x3232323032323230, 0xa1a1a1a1a1a1a1a1, 0x1, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox64
+ // result rd:x8(0x3a3a3a3e3a3a3a3e), rs1:x24(0xa2a2a2a2a2a2a2a2), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0x3a3a3a3e3a3a3a3e, 0xa2a2a2a2a2a2a2a2, 0x2, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox64
+ // result rd:x9(0x0a0a0a020a0a0a02), rs1:x23(0xa3a3a3a3a3a3a3a3), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x0a0a0a020a0a0a02, 0xa3a3a3a3a3a3a3a3, 0x3, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox64
+ // result rd:x10(0x4949495949494959), rs1:x22(0xa4a4a4a4a4a4a4a4), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x4949495949494959, 0xa4a4a4a4a4a4a4a4, 0x4, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox64
+ // result rd:x11(0x0606062606060626), rs1:x21(0xa5a5a5a5a5a5a5a5), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x0606062606060626, 0xa5a5a5a5a5a5a5a5, 0x5, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox64
+ // result rd:x12(0x2424246424242464), rs1:x20(0xa6a6a6a6a6a6a6a6), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x2424246424242464, 0xa6a6a6a6a6a6a6a6, 0x6, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox64
+ // result rd:x13(0x5c5c5cdc5c5c5cdc), rs1:x19(0xa7a7a7a7a7a7a7a7), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0x5c5c5cdc5c5c5cdc, 0xa7a7a7a7a7a7a7a7, 0x7, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox64
+ // result rd:x14(0xc2c2c2d9c2c2c2d9), rs1:x18(0xa8a8a8a8a8a8a8a8), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0xc2c2c2d9c2c2c2d9, 0xa8a8a8a8a8a8a8a8, 0x8, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox64
+ // result rd:x15(0xd3d3d3e5d3d3d3e5), rs1:x17(0xa9a9a9a9a9a9a9a9), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0xd3d3d3e5d3d3d3e5, 0xa9a9a9a9a9a9a9a9, 0x9, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox64
+ // result rd:x16(0xacacacacacacacac), rs1:x16(0xaaaaaaaaaaaaaaaa), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0xacacacacacacacac, 0xaaaaaaaaaaaaaaaa, 0xa, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox64
+ // result rd:x17(0x6262626062626260), rs1:x15(0xabababababababab), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x6262626062626260, 0xabababababababab, 0x1, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox64
+ // result rd:x18(0x9191919591919195), rs1:x14(0xacacacacacacacac), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x9191919591919195, 0xacacacacacacacac, 0x2, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox64
+ // result rd:x19(0x9595959d9595959d), rs1:x13(0xadadadadadadadad), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0x9595959d9595959d, 0xadadadadadadadad, 0x3, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox64
+ // result rd:x20(0xe4e4e4f4e4e4e4f4), rs1:x12(0xaeaeaeaeaeaeaeae), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0xe4e4e4f4e4e4e4f4, 0xaeaeaeaeaeaeaeae, 0x4, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox64
+ // result rd:x21(0x7979795979797959), rs1:x11(0xafafafafafafafaf), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0x7979795979797959, 0xafafafafafafafaf, 0x5, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox64
+ // result rd:x22(0xe7e7e7e6e7e7e7e6), rs1:x10(0xb0b0b0b0b0b0b0b0), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0xe7e7e7e6e7e7e7e6, 0xb0b0b0b0b0b0b0b0, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox64
+ // result rd:x23(0xc8c8c8cac8c8c8ca), rs1:x9(0xb1b1b1b1b1b1b1b1), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0xc8c8c8cac8c8c8ca, 0xb1b1b1b1b1b1b1b1, 0x1, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox64
+ // result rd:x24(0x3737373337373733), rs1:x8(0xb2b2b2b2b2b2b2b2), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0x3737373337373733, 0xb2b2b2b2b2b2b2b2, 0x2, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox64
+ // result rd:x25(0x6d6d6d656d6d6d65), rs1:x7(0xb3b3b3b3b3b3b3b3), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0x6d6d6d656d6d6d65, 0xb3b3b3b3b3b3b3b3, 0x3, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox64
+ // result rd:x26(0x8d8d8d9d8d8d8d9d), rs1:x6(0xb4b4b4b4b4b4b4b4), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x8d8d8d9d8d8d8d9d, 0xb4b4b4b4b4b4b4b4, 0x4, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox64
+ // result rd:x27(0xd5d5d5f5d5d5d5f5), rs1:x5(0xb5b5b5b5b5b5b5b5), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0xd5d5d5f5d5d5d5f5, 0xb5b5b5b5b5b5b5b5, 0x5, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox64
+ // result rd:x28(0x4e4e4e0e4e4e4e0e), rs1:x4(0xb6b6b6b6b6b6b6b6), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0x4e4e4e0e4e4e4e0e, 0xb6b6b6b6b6b6b6b6, 0x6, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox64
+ // result rd:x29(0xa9a9a929a9a9a929), rs1:x3(0xb7b7b7b7b7b7b7b7), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0xa9a9a929a9a9a929, 0xb7b7b7b7b7b7b7b7, 0x7, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox64
+ // result rd:x30(0x6c6c6c776c6c6c77), rs1:x2(0xb8b8b8b8b8b8b8b8), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0x6c6c6c776c6c6c77, 0xb8b8b8b8b8b8b8b8, 0x8, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox64
+ // result rd:x31(0x5656566056565660), rs1:x1(0xb9b9b9b9b9b9b9b9), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x5656566056565660, 0xb9b9b9b9b9b9b9b9, 0x9, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox64
+ // result rd:x1(0xf4f4f4f4f4f4f4f4), rs1:x31(0xbabababababababa), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0xf4f4f4f4f4f4f4f4, 0xbabababababababa, 0xa, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox64
+ // result rd:x2(0xeaeaeae8eaeaeae8), rs1:x30(0xbbbbbbbbbbbbbbbb), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0xeaeaeae8eaeaeae8, 0xbbbbbbbbbbbbbbbb, 0x1, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox64
+ // result rd:x3(0x6565656165656561), rs1:x29(0xbcbcbcbcbcbcbcbc), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x6565656165656561, 0xbcbcbcbcbcbcbcbc, 0x2, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox64
+ // result rd:x4(0x7a7a7a727a7a7a72), rs1:x28(0xbdbdbdbdbdbdbdbd), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x7a7a7a727a7a7a72, 0xbdbdbdbdbdbdbdbd, 0x3, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox64
+ // result rd:x5(0xaeaeaebeaeaeaebe), rs1:x27(0xbebebebebebebebe), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0xaeaeaebeaeaeaebe, 0xbebebebebebebebe, 0x4, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox64
+ // result rd:x6(0x0808082808080828), rs1:x26(0xbfbfbfbfbfbfbfbf), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x0808082808080828, 0xbfbfbfbfbfbfbfbf, 0x5, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox64
+ // result rd:x7(0xbabababbbabababb), rs1:x25(0xc0c0c0c0c0c0c0c0), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0xbabababbbabababb, 0xc0c0c0c0c0c0c0c0, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox64
+ // result rd:x8(0x7878787a7878787a), rs1:x24(0xc1c1c1c1c1c1c1c1), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0x7878787a7878787a, 0xc1c1c1c1c1c1c1c1, 0x1, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox64
+ // result rd:x9(0x2525252125252521), rs1:x23(0xc2c2c2c2c2c2c2c2), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0x2525252125252521, 0xc2c2c2c2c2c2c2c2, 0x2, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox64
+ // result rd:x10(0x2e2e2e262e2e2e26), rs1:x22(0xc3c3c3c3c3c3c3c3), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x2e2e2e262e2e2e26, 0xc3c3c3c3c3c3c3c3, 0x3, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox64
+ // result rd:x11(0x1c1c1c0c1c1c1c0c), rs1:x21(0xc4c4c4c4c4c4c4c4), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x1c1c1c0c1c1c1c0c, 0xc4c4c4c4c4c4c4c4, 0x4, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox64
+ // result rd:x12(0xa6a6a686a6a6a686), rs1:x20(0xc5c5c5c5c5c5c5c5), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0xa6a6a686a6a6a686, 0xc5c5c5c5c5c5c5c5, 0x5, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox64
+ // result rd:x13(0xb4b4b4f4b4b4b4f4), rs1:x19(0xc6c6c6c6c6c6c6c6), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0xb4b4b4f4b4b4b4f4, 0xc6c6c6c6c6c6c6c6, 0x6, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox64
+ // result rd:x14(0xc6c6c646c6c6c646), rs1:x18(0xc7c7c7c7c7c7c7c7), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0xc6c6c646c6c6c646, 0xc7c7c7c7c7c7c7c7, 0x7, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox64
+ // result rd:x15(0xe8e8e8f3e8e8e8f3), rs1:x17(0xc8c8c8c8c8c8c8c8), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0xe8e8e8f3e8e8e8f3, 0xc8c8c8c8c8c8c8c8, 0x8, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox64
+ // result rd:x16(0xddddddebddddddeb), rs1:x16(0xc9c9c9c9c9c9c9c9), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0xddddddebddddddeb, 0xc9c9c9c9c9c9c9c9, 0x9, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox64
+ // result rd:x17(0x7474747474747474), rs1:x15(0xcacacacacacacaca), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x7474747474747474, 0xcacacacacacacaca, 0xa, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox64
+ // result rd:x18(0x1f1f1f1d1f1f1f1d), rs1:x14(0xcbcbcbcbcbcbcbcb), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x1f1f1f1d1f1f1f1d, 0xcbcbcbcbcbcbcbcb, 0x1, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox64
+ // result rd:x19(0x4b4b4b4f4b4b4b4f), rs1:x13(0xcccccccccccccccc), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0x4b4b4b4f4b4b4b4f, 0xcccccccccccccccc, 0x2, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox64
+ // result rd:x20(0xbdbdbdb5bdbdbdb5), rs1:x12(0xcdcdcdcdcdcdcdcd), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0xbdbdbdb5bdbdbdb5, 0xcdcdcdcdcdcdcdcd, 0x3, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox64
+ // result rd:x21(0x8b8b8b9b8b8b8b9b), rs1:x11(0xcececececececece), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0x8b8b8b9b8b8b8b9b, 0xcececececececece, 0x4, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox64
+ // result rd:x22(0x8a8a8aaa8a8a8aaa), rs1:x10(0xcfcfcfcfcfcfcfcf), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0x8a8a8aaa8a8a8aaa, 0xcfcfcfcfcfcfcfcf, 0x5, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox64
+ // result rd:x23(0x7070707170707071), rs1:x9(0xd0d0d0d0d0d0d0d0), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0x7070707170707071, 0xd0d0d0d0d0d0d0d0, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox64
+ // result rd:x24(0x3e3e3e3c3e3e3e3c), rs1:x8(0xd1d1d1d1d1d1d1d1), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0x3e3e3e3c3e3e3e3c, 0xd1d1d1d1d1d1d1d1, 0x1, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox64
+ // result rd:x25(0xb5b5b5b1b5b5b5b1), rs1:x7(0xd2d2d2d2d2d2d2d2), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0xb5b5b5b1b5b5b5b1, 0xd2d2d2d2d2d2d2d2, 0x2, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox64
+ // result rd:x26(0x6666666e6666666e), rs1:x6(0xd3d3d3d3d3d3d3d3), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x6666666e6666666e, 0xd3d3d3d3d3d3d3d3, 0x3, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox64
+ // result rd:x27(0x4848485848484858), rs1:x5(0xd4d4d4d4d4d4d4d4), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0x4848485848484858, 0xd4d4d4d4d4d4d4d4, 0x4, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox64
+ // result rd:x28(0x0303032303030323), rs1:x4(0xd5d5d5d5d5d5d5d5), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0x0303032303030323, 0xd5d5d5d5d5d5d5d5, 0x5, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox64
+ // result rd:x29(0xf6f6f6b6f6f6f6b6), rs1:x3(0xd6d6d6d6d6d6d6d6), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0xf6f6f6b6f6f6f6b6, 0xd6d6d6d6d6d6d6d6, 0x6, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox64
+ // result rd:x30(0x0e0e0e8e0e0e0e8e), rs1:x2(0xd7d7d7d7d7d7d7d7), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0x0e0e0e8e0e0e0e8e, 0xd7d7d7d7d7d7d7d7, 0x7, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox64
+ // result rd:x31(0x6161617a6161617a), rs1:x1(0xd8d8d8d8d8d8d8d8), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x6161617a6161617a, 0xd8d8d8d8d8d8d8d8, 0x8, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox64
+ // result rd:x1(0x3535350335353503), rs1:x31(0xd9d9d9d9d9d9d9d9), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x3535350335353503, 0xd9d9d9d9d9d9d9d9, 0x9, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox64
+ // result rd:x2(0x5757575757575757), rs1:x30(0xdadadadadadadada), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x5757575757575757, 0xdadadadadadadada, 0xa, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox64
+ // result rd:x3(0xb9b9b9bbb9b9b9bb), rs1:x29(0xdbdbdbdbdbdbdbdb), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0xb9b9b9bbb9b9b9bb, 0xdbdbdbdbdbdbdbdb, 0x1, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox64
+ // result rd:x4(0x8686868286868682), rs1:x28(0xdcdcdcdcdcdcdcdc), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x8686868286868682, 0xdcdcdcdcdcdcdcdc, 0x2, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox64
+ // result rd:x5(0xc1c1c1c9c1c1c1c9), rs1:x27(0xdddddddddddddddd), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0xc1c1c1c9c1c1c1c9, 0xdddddddddddddddd, 0x3, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox64
+ // result rd:x6(0x1d1d1d0d1d1d1d0d), rs1:x26(0xdededededededede), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x1d1d1d0d1d1d1d0d, 0xdededededededede, 0x4, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox64
+ // result rd:x7(0x9e9e9ebe9e9e9ebe), rs1:x25(0xdfdfdfdfdfdfdfdf), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0x9e9e9ebe9e9e9ebe, 0xdfdfdfdfdfdfdfdf, 0x5, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox64
+ // result rd:x8(0xe1e1e1e0e1e1e1e0), rs1:x24(0xe0e0e0e0e0e0e0e0), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0xe1e1e1e0e1e1e1e0, 0xe0e0e0e0e0e0e0e0, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox64
+ // result rd:x9(0xf8f8f8faf8f8f8fa), rs1:x23(0xe1e1e1e1e1e1e1e1), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x9, x23, 0xf8f8f8faf8f8f8fa, 0xe1e1e1e1e1e1e1e1, 0x1, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox64
+ // result rd:x10(0x9898989c9898989c), rs1:x22(0xe2e2e2e2e2e2e2e2), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x10, x22, 0x9898989c9898989c, 0xe2e2e2e2e2e2e2e2, 0x2, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox64
+ // result rd:x11(0x1111111911111119), rs1:x21(0xe3e3e3e3e3e3e3e3), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x11, x21, 0x1111111911111119, 0xe3e3e3e3e3e3e3e3, 0x3, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox64
+ // result rd:x12(0x6969697969696979), rs1:x20(0xe4e4e4e4e4e4e4e4), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x12, x20, 0x6969697969696979, 0xe4e4e4e4e4e4e4e4, 0x4, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox64
+ // result rd:x13(0xd9d9d9f9d9d9d9f9), rs1:x19(0xe5e5e5e5e5e5e5e5), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x13, x19, 0xd9d9d9f9d9d9d9f9, 0xe5e5e5e5e5e5e5e5, 0x5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox64
+ // result rd:x14(0x8e8e8ece8e8e8ece), rs1:x18(0xe6e6e6e6e6e6e6e6), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x14, x18, 0x8e8e8ece8e8e8ece, 0xe6e6e6e6e6e6e6e6, 0x6, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox64
+ // result rd:x15(0x9494941494949414), rs1:x17(0xe7e7e7e7e7e7e7e7), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x15, x17, 0x9494941494949414, 0xe7e7e7e7e7e7e7e7, 0x7, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox64
+ // result rd:x16(0x9b9b9b809b9b9b80), rs1:x16(0xe8e8e8e8e8e8e8e8), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x16, x16, 0x9b9b9b809b9b9b80, 0xe8e8e8e8e8e8e8e8, 0x8, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox64
+ // result rd:x17(0x1e1e1e281e1e1e28), rs1:x15(0xe9e9e9e9e9e9e9e9), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x17, x15, 0x1e1e1e281e1e1e28, 0xe9e9e9e9e9e9e9e9, 0x9, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox64
+ // result rd:x18(0x8787878787878787), rs1:x14(0xeaeaeaeaeaeaeaea), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x18, x14, 0x8787878787878787, 0xeaeaeaeaeaeaeaea, 0xa, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox64
+ // result rd:x19(0xe9e9e9ebe9e9e9eb), rs1:x13(0xebebebebebebebeb), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x19, x13, 0xe9e9e9ebe9e9e9eb, 0xebebebebebebebeb, 0x1, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox64
+ // result rd:x20(0xcecececacecececa), rs1:x12(0xecececececececec), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x20, x12, 0xcecececacecececa, 0xecececececececec, 0x2, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox64
+ // result rd:x21(0x5555555d5555555d), rs1:x11(0xedededededededed), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x21, x11, 0x5555555d5555555d, 0xedededededededed, 0x3, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox64
+ // result rd:x22(0x2828283828282838), rs1:x10(0xeeeeeeeeeeeeeeee), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x22, x10, 0x2828283828282838, 0xeeeeeeeeeeeeeeee, 0x4, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox64
+ // result rd:x23(0xdfdfdfffdfdfdfff), rs1:x9(0xefefefefefefefef), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x23, x9, 0xdfdfdfffdfdfdfff, 0xefefefefefefefef, 0x5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox64
+ // result rd:x24(0x8c8c8c8d8c8c8c8d), rs1:x8(0xf0f0f0f0f0f0f0f0), imm:0x0
+ TEST_IMM_OP(aes64ks1i, x24, x8, 0x8c8c8c8d8c8c8c8d, 0xf0f0f0f0f0f0f0f0, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox64
+ // result rd:x25(0xa1a1a1a3a1a1a1a3), rs1:x7(0xf1f1f1f1f1f1f1f1), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x25, x7, 0xa1a1a1a3a1a1a1a3, 0xf1f1f1f1f1f1f1f1, 0x1, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox64
+ // result rd:x26(0x8989898d8989898d), rs1:x6(0xf2f2f2f2f2f2f2f2), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x26, x6, 0x8989898d8989898d, 0xf2f2f2f2f2f2f2f2, 0x2, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox64
+ // result rd:x27(0x0d0d0d050d0d0d05), rs1:x5(0xf3f3f3f3f3f3f3f3), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x27, x5, 0x0d0d0d050d0d0d05, 0xf3f3f3f3f3f3f3f3, 0x3, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox64
+ // result rd:x28(0xbfbfbfafbfbfbfaf), rs1:x4(0xf4f4f4f4f4f4f4f4), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x28, x4, 0xbfbfbfafbfbfbfaf, 0xf4f4f4f4f4f4f4f4, 0x4, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox64
+ // result rd:x29(0xe6e6e6c6e6e6e6c6), rs1:x3(0xf5f5f5f5f5f5f5f5), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x29, x3, 0xe6e6e6c6e6e6e6c6, 0xf5f5f5f5f5f5f5f5, 0x5, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox64
+ // result rd:x30(0x4242420242424202), rs1:x2(0xf6f6f6f6f6f6f6f6), imm:0x6
+ TEST_IMM_OP(aes64ks1i, x30, x2, 0x4242420242424202, 0xf6f6f6f6f6f6f6f6, 0x6, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox64
+ // result rd:x31(0x686868e8686868e8), rs1:x1(0xf7f7f7f7f7f7f7f7), imm:0x7
+ TEST_IMM_OP(aes64ks1i, x31, x1, 0x686868e8686868e8, 0xf7f7f7f7f7f7f7f7, 0x7, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox64
+ // result rd:x1(0x4141415a4141415a), rs1:x31(0xf8f8f8f8f8f8f8f8), imm:0x8
+ TEST_IMM_OP(aes64ks1i, x1, x31, 0x4141415a4141415a, 0xf8f8f8f8f8f8f8f8, 0x8, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox64
+ // result rd:x2(0x999999af999999af), rs1:x30(0xf9f9f9f9f9f9f9f9), imm:0x9
+ TEST_IMM_OP(aes64ks1i, x2, x30, 0x999999af999999af, 0xf9f9f9f9f9f9f9f9, 0x9, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox64
+ // result rd:x3(0x2d2d2d2d2d2d2d2d), rs1:x29(0xfafafafafafafafa), imm:0xa
+ TEST_IMM_OP(aes64ks1i, x3, x29, 0x2d2d2d2d2d2d2d2d, 0xfafafafafafafafa, 0xa, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox64
+ // result rd:x4(0x0f0f0f0d0f0f0f0d), rs1:x28(0xfbfbfbfbfbfbfbfb), imm:0x1
+ TEST_IMM_OP(aes64ks1i, x4, x28, 0x0f0f0f0d0f0f0f0d, 0xfbfbfbfbfbfbfbfb, 0x1, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox64
+ // result rd:x5(0xb0b0b0b4b0b0b0b4), rs1:x27(0xfcfcfcfcfcfcfcfc), imm:0x2
+ TEST_IMM_OP(aes64ks1i, x5, x27, 0xb0b0b0b4b0b0b0b4, 0xfcfcfcfcfcfcfcfc, 0x2, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox64
+ // result rd:x6(0x5454545c5454545c), rs1:x26(0xfdfdfdfdfdfdfdfd), imm:0x3
+ TEST_IMM_OP(aes64ks1i, x6, x26, 0x5454545c5454545c, 0xfdfdfdfdfdfdfdfd, 0x3, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox64
+ // result rd:x7(0xbbbbbbabbbbbbbab), rs1:x25(0xfefefefefefefefe), imm:0x4
+ TEST_IMM_OP(aes64ks1i, x7, x25, 0xbbbbbbabbbbbbbab, 0xfefefefefefefefe, 0x4, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox64
+ // result rd:x8(0x1616163616161636), rs1:x24(0xffffffffffffffff), imm:0x5
+ TEST_IMM_OP(aes64ks1i, x8, x24, 0x1616163616161636, 0xffffffffffffffff, 0x5, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64KS2-01.S b/riscof/suite/rv64i_m/K_unratified/AES64KS2-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..10019ceb9a62808ca7a739bfbeb805734345963b
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64KS2-01.S
@@ -0,0 +1,1838 @@
+// RISC-V Architectural Validation Test AES64KS2-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64ks2'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64ks2)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64ks2)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xdd99c98a02e6f1ce), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0xdd99c98a02e6f1ce, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xecf9f8a319544cb9), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0xecf9f8a319544cb9, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x3be819bab91e6dc5), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0x3be819bab91e6dc5, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xa773fd0fd4dad2db), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0xa773fd0fd4dad2db, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x164359bb422857ef), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0x164359bb422857ef, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x02d41b5b12765c1b), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0x02d41b5b12765c1b, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x0e2199073b60b01f), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0x0e2199073b60b01f, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xe37343c12a17dcc4), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0xe37343c12a17dcc4, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x9a7b563927520adb), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0x9a7b563927520adb, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x6268543c729569d1), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0x6268543c729569d1, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffffffff), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0x00000000ffffffff, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x80000000ffffffff), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0x80000000ffffffff, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x40000000ffffffff), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0x40000000ffffffff, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x20000000ffffffff), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0x20000000ffffffff, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x10000000ffffffff), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0x10000000ffffffff, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x08000000ffffffff), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0x08000000ffffffff, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x04000000ffffffff), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0x04000000ffffffff, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x02000000ffffffff), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0x02000000ffffffff, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x01000000ffffffff), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0x01000000ffffffff, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00800000ffffffff), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0x00800000ffffffff, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00400000ffffffff), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0x00400000ffffffff, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00200000ffffffff), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0x00200000ffffffff, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x00100000ffffffff), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0x00100000ffffffff, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00080000ffffffff), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0x00080000ffffffff, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00040000ffffffff), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0x00040000ffffffff, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x00020000ffffffff), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0x00020000ffffffff, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00010000ffffffff), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0x00010000ffffffff, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00008000ffffffff), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0x00008000ffffffff, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00004000ffffffff), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0x00004000ffffffff, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x00002000ffffffff), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0x00002000ffffffff, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00001000ffffffff), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0x00001000ffffffff, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00000800ffffffff), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0x00000800ffffffff, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00000400ffffffff), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0x00000400ffffffff, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00000200ffffffff), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0x00000200ffffffff, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x00000100ffffffff), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0x00000100ffffffff, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x00000080ffffffff), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0x00000080ffffffff, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x00000040ffffffff), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0x00000040ffffffff, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x00000020ffffffff), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0x00000020ffffffff, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x00000010ffffffff), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0x00000010ffffffff, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x00000008ffffffff), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0x00000008ffffffff, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x00000004ffffffff), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0x00000004ffffffff, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x00000002ffffffff), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0x00000002ffffffff, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000fffffffe), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0x00000000fffffffe, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x800000027ffffffd), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0x800000027ffffffd, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x40000004bffffffb), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0x40000004bffffffb, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x20000008dffffff7), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0x20000008dffffff7, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x10000010efffffef), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0x10000010efffffef, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x08000020f7ffffdf), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0x08000020f7ffffdf, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x04000040fbffffbf), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0x04000040fbffffbf, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x02000080fdffff7f), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0x02000080fdffff7f, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x01000100fefffeff), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0x01000100fefffeff, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x00800200ff7ffdff), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0x00800200ff7ffdff, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x00400400ffbffbff), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0x00400400ffbffbff, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x00200800ffdff7ff), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0x00200800ffdff7ff, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x00101000ffefefff), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0x00101000ffefefff, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x00082000fff7dfff), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0x00082000fff7dfff, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x00044000fffbbfff), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0x00044000fffbbfff, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x00028000fffd7fff), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0x00028000fffd7fff, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffffff), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0x00000000ffffffff, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x00028000fffd7fff), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0x00028000fffd7fff, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x00044000fffbbfff), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0x00044000fffbbfff, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x00082000fff7dfff), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0x00082000fff7dfff, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x00101000ffefefff), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0x00101000ffefefff, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x00200800ffdff7ff), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0x00200800ffdff7ff, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x00400400ffbffbff), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0x00400400ffbffbff, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x00800200ff7ffdff), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0x00800200ff7ffdff, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x01000100fefffeff), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0x01000100fefffeff, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x02000080fdffff7f), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0x02000080fdffff7f, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x04000040fbffffbf), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0x04000040fbffffbf, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x08000020f7ffffdf), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0x08000020f7ffffdf, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x10000010efffffef), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0x10000010efffffef, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x20000008dffffff7), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0x20000008dffffff7, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x40000004bffffffb), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0x40000004bffffffb, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x800000027ffffffd), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0x800000027ffffffd, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x00000001fffffffe), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0x00000001fffffffe, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0xffffffffffffffff, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x7fffffffffffffff), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0x7fffffffffffffff, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xbfffffffffffffff), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0xbfffffffffffffff, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xdfffffffffffffff), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0xdfffffffffffffff, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xefffffffffffffff), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0xefffffffffffffff, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xf7ffffffffffffff), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0xf7ffffffffffffff, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xfbffffffffffffff), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0xfbffffffffffffff, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xfdffffffffffffff), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0xfdffffffffffffff, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xfeffffffffffffff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0xfeffffffffffffff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xff7fffffffffffff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0xff7fffffffffffff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xffbfffffffffffff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0xffbfffffffffffff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xffdfffffffffffff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0xffdfffffffffffff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xffefffffffffffff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0xffefffffffffffff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xfff7ffffffffffff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0xfff7ffffffffffff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xfffbffffffffffff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0xfffbffffffffffff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xfffdffffffffffff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0xfffdffffffffffff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xfffeffffffffffff), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0xfffeffffffffffff, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xffff7fffffffffff), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0xffff7fffffffffff, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xffffbfffffffffff), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0xffffbfffffffffff, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xffffdfffffffffff), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0xffffdfffffffffff, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xffffefffffffffff), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0xffffefffffffffff, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xfffff7ffffffffff), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0xfffff7ffffffffff, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xfffffbffffffffff), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0xfffffbffffffffff, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xfffffdffffffffff), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0xfffffdffffffffff, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xfffffeffffffffff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0xfffffeffffffffff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xffffff7fffffffff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0xffffff7fffffffff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xffffffbfffffffff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0xffffffbfffffffff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xffffffdfffffffff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0xffffffdfffffffff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffffefffffffff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0xffffffefffffffff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xfffffff7ffffffff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0xfffffff7ffffffff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xfffffffbffffffff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0xfffffffbffffffff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xfffffffdffffffff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0xfffffffdffffffff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffffffffe), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0xfffffffffffffffe, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x7ffffffd7ffffffd), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0x7ffffffd7ffffffd, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xbffffffbbffffffb), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0xbffffffbbffffffb, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xdffffff7dffffff7), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0xdffffff7dffffff7, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xefffffefefffffef), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0xefffffefefffffef, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xf7ffffdff7ffffdf), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0xf7ffffdff7ffffdf, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xfbffffbffbffffbf), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0xfbffffbffbffffbf, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xfdffff7ffdffff7f), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0xfdffff7ffdffff7f, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xfefffefffefffeff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0xfefffefffefffeff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xff7ffdffff7ffdff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0xff7ffdffff7ffdff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffbffbffffbffbff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0xffbffbffffbffbff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffdff7ffffdff7ff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0xffdff7ffffdff7ff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffefefffffefefff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0xffefefffffefefff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfff7dffffff7dfff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0xfff7dffffff7dfff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xfffbbffffffbbfff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0xfffbbffffffbbfff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xfffd7ffffffd7fff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0xfffd7ffffffd7fff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0xffffffffffffffff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xfffd7ffffffd7fff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0xfffd7ffffffd7fff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffbbffffffbbfff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0xfffbbffffffbbfff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfff7dffffff7dfff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0xfff7dffffff7dfff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffefefffffefefff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0xffefefffffefefff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffdff7ffffdff7ff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0xffdff7ffffdff7ff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffbffbffffbffbff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0xffbffbffffbffbff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xff7ffdffff7ffdff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0xff7ffdffff7ffdff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xfefffefffefffeff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0xfefffefffefffeff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xfdffff7ffdffff7f), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0xfdffff7ffdffff7f, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfbffffbffbffffbf), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0xfbffffbffbffffbf, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xf7ffffdff7ffffdf), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0xf7ffffdff7ffffdf, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xefffffefefffffef), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0xefffffefefffffef, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xdffffff7dffffff7), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0xdffffff7dffffff7, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xbffffffbbffffffb), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0xbffffffbbffffffb, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x7ffffffd7ffffffd), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0x7ffffffd7ffffffd, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xfffffffefffffffe), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0xfffffffefffffffe, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0x0000000000000000, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0x0000000000000000, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0x0000000000000000, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0x0000000000000000, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0x0000000000000000, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0x0000000000000000, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0x0000000000000000, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0x0000000000000000, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0x0000000000000000, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0x0000000000000000, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0x0000000000000000, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0x0000000000000000, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0x0000000000000000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0x0000000000000000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0x0000000000000000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0x0000000000000000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0x0000000000000000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0x0000000000000000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0x0000000000000000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0x0000000000000000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0x0000000000000000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0x0000000000000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0x0000000000000000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0x0000000000000000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0x0000000000000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0x0000000000000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0x0000000000000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0x0000000000000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0x0000000000000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0x0000000000000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0x0000000000000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0x0000000000000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000100000001), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0x0000000100000001, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000200000002), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0x0000000200000002, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000400000004), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0x0000000400000004, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000800000008), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0x0000000800000008, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000001000000010), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0x0000001000000010, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000002000000020), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0x0000002000000020, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000004000000040), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0x0000004000000040, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000008000000080), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0x0000008000000080, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000010000000100), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0x0000010000000100, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000020000000200), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0x0000020000000200, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000040000000400), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0x0000040000000400, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000080000000800), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0x0000080000000800, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000100000001000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0x0000100000001000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000200000002000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0x0000200000002000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000400000004000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0x0000400000004000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000800000008000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0x0000800000008000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0001000000010000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0x0001000000010000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0002000000020000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0x0002000000020000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0004000000040000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0x0004000000040000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0008000000080000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0x0008000000080000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0010000000100000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0x0010000000100000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0020000000200000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0x0020000000200000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0040000000400000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0x0040000000400000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0080000000800000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0x0080000000800000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0100000001000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0x0100000001000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0200000002000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0x0200000002000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0400000004000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0x0400000004000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0800000008000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0x0800000008000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x1000000010000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0x1000000010000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x2000000020000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0x2000000020000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x4000000040000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0x4000000040000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x8000000080000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0x8000000080000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0xffffffffffffffff, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0xffffffffffffffff, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0xffffffffffffffff, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0xffffffffffffffff, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0xffffffffffffffff, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0xffffffffffffffff, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0xffffffffffffffff, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0xffffffffffffffff, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0xffffffffffffffff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0xffffffffffffffff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0xffffffffffffffff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0xffffffffffffffff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0xffffffffffffffff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0xffffffffffffffff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0xffffffffffffffff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0xffffffffffffffff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0xffffffffffffffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0xffffffffffffffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0xffffffffffffffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0xffffffffffffffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0xffffffffffffffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0xffffffffffffffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0xffffffffffffffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0xffffffffffffffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0xffffffffffffffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0xffffffffffffffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0xffffffffffffffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0xffffffffffffffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0xffffffffffffffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0xffffffffffffffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0xffffffffffffffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0xffffffffffffffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xfffffffefffffffe), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0xfffffffefffffffe, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xfffffffdfffffffd), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0xfffffffdfffffffd, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xfffffffbfffffffb), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0xfffffffbfffffffb, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xfffffff7fffffff7), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0xfffffff7fffffff7, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xffffffefffffffef), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0xffffffefffffffef, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xffffffdfffffffdf), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0xffffffdfffffffdf, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xffffffbfffffffbf), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0xffffffbfffffffbf, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xffffff7fffffff7f), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0xffffff7fffffff7f, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xfffffefffffffeff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0xfffffefffffffeff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xfffffdfffffffdff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0xfffffdfffffffdff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xfffffbfffffffbff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0xfffffbfffffffbff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xfffff7fffffff7ff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0xfffff7fffffff7ff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffffefffffffefff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0xffffefffffffefff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffffdfffffffdfff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0xffffdfffffffdfff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xffffbfffffffbfff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0xffffbfffffffbfff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xffff7fffffff7fff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0xffff7fffffff7fff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xfffefffffffeffff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0xfffefffffffeffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xfffdfffffffdffff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0xfffdfffffffdffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xfffbfffffffbffff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0xfffbfffffffbffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xfff7fffffff7ffff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0xfff7fffffff7ffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffefffffffefffff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0xffefffffffefffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffdfffffffdfffff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0xffdfffffffdfffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xffbfffffffbfffff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0xffbfffffffbfffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xff7fffffff7fffff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0xff7fffffff7fffff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xfefffffffeffffff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0xfefffffffeffffff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xfdfffffffdffffff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0xfdfffffffdffffff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xfbfffffffbffffff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0xfbfffffffbffffff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xf7fffffff7ffffff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0xf7fffffff7ffffff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xefffffffefffffff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0xefffffffefffffff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xdfffffffdfffffff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0xdfffffffdfffffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xbfffffffbfffffff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0xbfffffffbfffffff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x7fffffff7fffffff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0x7fffffff7fffffff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0xffffffffffffffff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x121bcc23cd64f467), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(aes64ks2, x23, x25, x25, 0x121bcc23cd64f467, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(aes64ks2, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xc9649f05c9649f05), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(aes64ks2, x25, x7, x0, 0xc9649f05c9649f05, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x9232d417e19bfbc3), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(aes64ks2, x26, x0, x22, 0x9232d417e19bfbc3, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/AES64KS2-02.S b/riscof/suite/rv64i_m/K_unratified/AES64KS2-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..a9583a23ea8e508db81587486e1a7c76d9b31a16
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/AES64KS2-02.S
@@ -0,0 +1,1728 @@
+// RISC-V Architectural Validation Test AES64KS2-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'aes64ks2'.
+// Using dataset: sbox64
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",aes64ks2)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",aes64ks2)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox64
+ // result rd:x1(0x00000000ffffffff), rs1:x31(0x0000000000000000), rs2:x16(0xffffffffffffffff)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0x00000000ffffffff, 0x0, 0xffffffffffffffff, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox64
+ // result rd:x2(0x01010101ffffffff), rs1:x30(0x0101010101010101), rs2:x15(0xfefefefefefefefe)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0x01010101ffffffff, 0x101010101010101, 0xfefefefefefefefe, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox64
+ // result rd:x3(0x02020202ffffffff), rs1:x29(0x0202020202020202), rs2:x14(0xfdfdfdfdfdfdfdfd)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0x02020202ffffffff, 0x202020202020202, 0xfdfdfdfdfdfdfdfd, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox64
+ // result rd:x4(0x03030303ffffffff), rs1:x28(0x0303030303030303), rs2:x13(0xfcfcfcfcfcfcfcfc)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0x03030303ffffffff, 0x303030303030303, 0xfcfcfcfcfcfcfcfc, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox64
+ // result rd:x5(0x04040404ffffffff), rs1:x27(0x0404040404040404), rs2:x12(0xfbfbfbfbfbfbfbfb)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0x04040404ffffffff, 0x404040404040404, 0xfbfbfbfbfbfbfbfb, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox64
+ // result rd:x6(0x05050505ffffffff), rs1:x26(0x0505050505050505), rs2:x11(0xfafafafafafafafa)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0x05050505ffffffff, 0x505050505050505, 0xfafafafafafafafa, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox64
+ // result rd:x7(0x06060606ffffffff), rs1:x25(0x0606060606060606), rs2:x10(0xf9f9f9f9f9f9f9f9)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0x06060606ffffffff, 0x606060606060606, 0xf9f9f9f9f9f9f9f9, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox64
+ // result rd:x8(0x07070707ffffffff), rs1:x24(0x0707070707070707), rs2:x9(0xf8f8f8f8f8f8f8f8)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0x07070707ffffffff, 0x707070707070707, 0xf8f8f8f8f8f8f8f8, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox64
+ // result rd:x9(0x08080808ffffffff), rs1:x23(0x0808080808080808), rs2:x8(0xf7f7f7f7f7f7f7f7)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0x08080808ffffffff, 0x808080808080808, 0xf7f7f7f7f7f7f7f7, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox64
+ // result rd:x10(0x09090909ffffffff), rs1:x22(0x0909090909090909), rs2:x7(0xf6f6f6f6f6f6f6f6)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0x09090909ffffffff, 0x909090909090909, 0xf6f6f6f6f6f6f6f6, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox64
+ // result rd:x11(0x0a0a0a0affffffff), rs1:x21(0x0a0a0a0a0a0a0a0a), rs2:x6(0xf5f5f5f5f5f5f5f5)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0x0a0a0a0affffffff, 0xa0a0a0a0a0a0a0a, 0xf5f5f5f5f5f5f5f5, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox64
+ // result rd:x12(0x0b0b0b0bffffffff), rs1:x20(0x0b0b0b0b0b0b0b0b), rs2:x5(0xf4f4f4f4f4f4f4f4)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0x0b0b0b0bffffffff, 0xb0b0b0b0b0b0b0b, 0xf4f4f4f4f4f4f4f4, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox64
+ // result rd:x13(0x0c0c0c0cffffffff), rs1:x19(0x0c0c0c0c0c0c0c0c), rs2:x4(0xf3f3f3f3f3f3f3f3)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0x0c0c0c0cffffffff, 0xc0c0c0c0c0c0c0c, 0xf3f3f3f3f3f3f3f3, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox64
+ // result rd:x14(0x0d0d0d0dffffffff), rs1:x18(0x0d0d0d0d0d0d0d0d), rs2:x3(0xf2f2f2f2f2f2f2f2)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0x0d0d0d0dffffffff, 0xd0d0d0d0d0d0d0d, 0xf2f2f2f2f2f2f2f2, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox64
+ // result rd:x15(0x0e0e0e0effffffff), rs1:x17(0x0e0e0e0e0e0e0e0e), rs2:x2(0xf1f1f1f1f1f1f1f1)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0x0e0e0e0effffffff, 0xe0e0e0e0e0e0e0e, 0xf1f1f1f1f1f1f1f1, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox64
+ // result rd:x16(0x0f0f0f0fffffffff), rs1:x16(0x0f0f0f0f0f0f0f0f), rs2:x1(0xf0f0f0f0f0f0f0f0)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0x0f0f0f0fffffffff, 0xf0f0f0f0f0f0f0f, 0xf0f0f0f0f0f0f0f0, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox64
+ // result rd:x17(0x10101010ffffffff), rs1:x15(0x1010101010101010), rs2:x31(0xefefefefefefefef)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0x10101010ffffffff, 0x1010101010101010, 0xefefefefefefefef, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox64
+ // result rd:x18(0x11111111ffffffff), rs1:x14(0x1111111111111111), rs2:x30(0xeeeeeeeeeeeeeeee)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0x11111111ffffffff, 0x1111111111111111, 0xeeeeeeeeeeeeeeee, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox64
+ // result rd:x19(0x12121212ffffffff), rs1:x13(0x1212121212121212), rs2:x29(0xedededededededed)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0x12121212ffffffff, 0x1212121212121212, 0xedededededededed, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox64
+ // result rd:x20(0x13131313ffffffff), rs1:x12(0x1313131313131313), rs2:x28(0xecececececececec)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0x13131313ffffffff, 0x1313131313131313, 0xecececececececec, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox64
+ // result rd:x21(0x14141414ffffffff), rs1:x11(0x1414141414141414), rs2:x27(0xebebebebebebebeb)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0x14141414ffffffff, 0x1414141414141414, 0xebebebebebebebeb, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox64
+ // result rd:x22(0x15151515ffffffff), rs1:x10(0x1515151515151515), rs2:x26(0xeaeaeaeaeaeaeaea)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0x15151515ffffffff, 0x1515151515151515, 0xeaeaeaeaeaeaeaea, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox64
+ // result rd:x23(0x16161616ffffffff), rs1:x9(0x1616161616161616), rs2:x25(0xe9e9e9e9e9e9e9e9)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0x16161616ffffffff, 0x1616161616161616, 0xe9e9e9e9e9e9e9e9, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox64
+ // result rd:x24(0x17171717ffffffff), rs1:x8(0x1717171717171717), rs2:x24(0xe8e8e8e8e8e8e8e8)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0x17171717ffffffff, 0x1717171717171717, 0xe8e8e8e8e8e8e8e8, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox64
+ // result rd:x25(0x18181818ffffffff), rs1:x7(0x1818181818181818), rs2:x23(0xe7e7e7e7e7e7e7e7)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0x18181818ffffffff, 0x1818181818181818, 0xe7e7e7e7e7e7e7e7, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox64
+ // result rd:x26(0x19191919ffffffff), rs1:x6(0x1919191919191919), rs2:x22(0xe6e6e6e6e6e6e6e6)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0x19191919ffffffff, 0x1919191919191919, 0xe6e6e6e6e6e6e6e6, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox64
+ // result rd:x27(0x1a1a1a1affffffff), rs1:x5(0x1a1a1a1a1a1a1a1a), rs2:x21(0xe5e5e5e5e5e5e5e5)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0x1a1a1a1affffffff, 0x1a1a1a1a1a1a1a1a, 0xe5e5e5e5e5e5e5e5, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox64
+ // result rd:x28(0x1b1b1b1bffffffff), rs1:x4(0x1b1b1b1b1b1b1b1b), rs2:x20(0xe4e4e4e4e4e4e4e4)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0x1b1b1b1bffffffff, 0x1b1b1b1b1b1b1b1b, 0xe4e4e4e4e4e4e4e4, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox64
+ // result rd:x29(0x1c1c1c1cffffffff), rs1:x3(0x1c1c1c1c1c1c1c1c), rs2:x19(0xe3e3e3e3e3e3e3e3)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0x1c1c1c1cffffffff, 0x1c1c1c1c1c1c1c1c, 0xe3e3e3e3e3e3e3e3, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox64
+ // result rd:x30(0x1d1d1d1dffffffff), rs1:x2(0x1d1d1d1d1d1d1d1d), rs2:x18(0xe2e2e2e2e2e2e2e2)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0x1d1d1d1dffffffff, 0x1d1d1d1d1d1d1d1d, 0xe2e2e2e2e2e2e2e2, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox64
+ // result rd:x31(0x1e1e1e1effffffff), rs1:x1(0x1e1e1e1e1e1e1e1e), rs2:x17(0xe1e1e1e1e1e1e1e1)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0x1e1e1e1effffffff, 0x1e1e1e1e1e1e1e1e, 0xe1e1e1e1e1e1e1e1, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox64
+ // result rd:x1(0x1f1f1f1fffffffff), rs1:x31(0x1f1f1f1f1f1f1f1f), rs2:x16(0xe0e0e0e0e0e0e0e0)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0x1f1f1f1fffffffff, 0x1f1f1f1f1f1f1f1f, 0xe0e0e0e0e0e0e0e0, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox64
+ // result rd:x2(0x20202020ffffffff), rs1:x30(0x2020202020202020), rs2:x15(0xdfdfdfdfdfdfdfdf)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0x20202020ffffffff, 0x2020202020202020, 0xdfdfdfdfdfdfdfdf, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox64
+ // result rd:x3(0x21212121ffffffff), rs1:x29(0x2121212121212121), rs2:x14(0xdededededededede)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0x21212121ffffffff, 0x2121212121212121, 0xdededededededede, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox64
+ // result rd:x4(0x22222222ffffffff), rs1:x28(0x2222222222222222), rs2:x13(0xdddddddddddddddd)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0x22222222ffffffff, 0x2222222222222222, 0xdddddddddddddddd, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox64
+ // result rd:x5(0x23232323ffffffff), rs1:x27(0x2323232323232323), rs2:x12(0xdcdcdcdcdcdcdcdc)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0x23232323ffffffff, 0x2323232323232323, 0xdcdcdcdcdcdcdcdc, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox64
+ // result rd:x6(0x24242424ffffffff), rs1:x26(0x2424242424242424), rs2:x11(0xdbdbdbdbdbdbdbdb)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0x24242424ffffffff, 0x2424242424242424, 0xdbdbdbdbdbdbdbdb, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox64
+ // result rd:x7(0x25252525ffffffff), rs1:x25(0x2525252525252525), rs2:x10(0xdadadadadadadada)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0x25252525ffffffff, 0x2525252525252525, 0xdadadadadadadada, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox64
+ // result rd:x8(0x26262626ffffffff), rs1:x24(0x2626262626262626), rs2:x9(0xd9d9d9d9d9d9d9d9)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0x26262626ffffffff, 0x2626262626262626, 0xd9d9d9d9d9d9d9d9, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox64
+ // result rd:x9(0x27272727ffffffff), rs1:x23(0x2727272727272727), rs2:x8(0xd8d8d8d8d8d8d8d8)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0x27272727ffffffff, 0x2727272727272727, 0xd8d8d8d8d8d8d8d8, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox64
+ // result rd:x10(0x28282828ffffffff), rs1:x22(0x2828282828282828), rs2:x7(0xd7d7d7d7d7d7d7d7)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0x28282828ffffffff, 0x2828282828282828, 0xd7d7d7d7d7d7d7d7, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox64
+ // result rd:x11(0x29292929ffffffff), rs1:x21(0x2929292929292929), rs2:x6(0xd6d6d6d6d6d6d6d6)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0x29292929ffffffff, 0x2929292929292929, 0xd6d6d6d6d6d6d6d6, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox64
+ // result rd:x12(0x2a2a2a2affffffff), rs1:x20(0x2a2a2a2a2a2a2a2a), rs2:x5(0xd5d5d5d5d5d5d5d5)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0x2a2a2a2affffffff, 0x2a2a2a2a2a2a2a2a, 0xd5d5d5d5d5d5d5d5, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox64
+ // result rd:x13(0x2b2b2b2bffffffff), rs1:x19(0x2b2b2b2b2b2b2b2b), rs2:x4(0xd4d4d4d4d4d4d4d4)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0x2b2b2b2bffffffff, 0x2b2b2b2b2b2b2b2b, 0xd4d4d4d4d4d4d4d4, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox64
+ // result rd:x14(0x2c2c2c2cffffffff), rs1:x18(0x2c2c2c2c2c2c2c2c), rs2:x3(0xd3d3d3d3d3d3d3d3)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0x2c2c2c2cffffffff, 0x2c2c2c2c2c2c2c2c, 0xd3d3d3d3d3d3d3d3, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox64
+ // result rd:x15(0x2d2d2d2dffffffff), rs1:x17(0x2d2d2d2d2d2d2d2d), rs2:x2(0xd2d2d2d2d2d2d2d2)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0x2d2d2d2dffffffff, 0x2d2d2d2d2d2d2d2d, 0xd2d2d2d2d2d2d2d2, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox64
+ // result rd:x16(0x2e2e2e2effffffff), rs1:x16(0x2e2e2e2e2e2e2e2e), rs2:x1(0xd1d1d1d1d1d1d1d1)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0x2e2e2e2effffffff, 0x2e2e2e2e2e2e2e2e, 0xd1d1d1d1d1d1d1d1, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox64
+ // result rd:x17(0x2f2f2f2fffffffff), rs1:x15(0x2f2f2f2f2f2f2f2f), rs2:x31(0xd0d0d0d0d0d0d0d0)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0x2f2f2f2fffffffff, 0x2f2f2f2f2f2f2f2f, 0xd0d0d0d0d0d0d0d0, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox64
+ // result rd:x18(0x30303030ffffffff), rs1:x14(0x3030303030303030), rs2:x30(0xcfcfcfcfcfcfcfcf)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0x30303030ffffffff, 0x3030303030303030, 0xcfcfcfcfcfcfcfcf, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox64
+ // result rd:x19(0x31313131ffffffff), rs1:x13(0x3131313131313131), rs2:x29(0xcececececececece)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0x31313131ffffffff, 0x3131313131313131, 0xcececececececece, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox64
+ // result rd:x20(0x32323232ffffffff), rs1:x12(0x3232323232323232), rs2:x28(0xcdcdcdcdcdcdcdcd)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0x32323232ffffffff, 0x3232323232323232, 0xcdcdcdcdcdcdcdcd, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox64
+ // result rd:x21(0x33333333ffffffff), rs1:x11(0x3333333333333333), rs2:x27(0xcccccccccccccccc)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0x33333333ffffffff, 0x3333333333333333, 0xcccccccccccccccc, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox64
+ // result rd:x22(0x34343434ffffffff), rs1:x10(0x3434343434343434), rs2:x26(0xcbcbcbcbcbcbcbcb)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0x34343434ffffffff, 0x3434343434343434, 0xcbcbcbcbcbcbcbcb, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox64
+ // result rd:x23(0x35353535ffffffff), rs1:x9(0x3535353535353535), rs2:x25(0xcacacacacacacaca)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0x35353535ffffffff, 0x3535353535353535, 0xcacacacacacacaca, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox64
+ // result rd:x24(0x36363636ffffffff), rs1:x8(0x3636363636363636), rs2:x24(0xc9c9c9c9c9c9c9c9)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0x36363636ffffffff, 0x3636363636363636, 0xc9c9c9c9c9c9c9c9, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox64
+ // result rd:x25(0x37373737ffffffff), rs1:x7(0x3737373737373737), rs2:x23(0xc8c8c8c8c8c8c8c8)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0x37373737ffffffff, 0x3737373737373737, 0xc8c8c8c8c8c8c8c8, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox64
+ // result rd:x26(0x38383838ffffffff), rs1:x6(0x3838383838383838), rs2:x22(0xc7c7c7c7c7c7c7c7)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0x38383838ffffffff, 0x3838383838383838, 0xc7c7c7c7c7c7c7c7, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox64
+ // result rd:x27(0x39393939ffffffff), rs1:x5(0x3939393939393939), rs2:x21(0xc6c6c6c6c6c6c6c6)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0x39393939ffffffff, 0x3939393939393939, 0xc6c6c6c6c6c6c6c6, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox64
+ // result rd:x28(0x3a3a3a3affffffff), rs1:x4(0x3a3a3a3a3a3a3a3a), rs2:x20(0xc5c5c5c5c5c5c5c5)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0x3a3a3a3affffffff, 0x3a3a3a3a3a3a3a3a, 0xc5c5c5c5c5c5c5c5, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox64
+ // result rd:x29(0x3b3b3b3bffffffff), rs1:x3(0x3b3b3b3b3b3b3b3b), rs2:x19(0xc4c4c4c4c4c4c4c4)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0x3b3b3b3bffffffff, 0x3b3b3b3b3b3b3b3b, 0xc4c4c4c4c4c4c4c4, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox64
+ // result rd:x30(0x3c3c3c3cffffffff), rs1:x2(0x3c3c3c3c3c3c3c3c), rs2:x18(0xc3c3c3c3c3c3c3c3)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0x3c3c3c3cffffffff, 0x3c3c3c3c3c3c3c3c, 0xc3c3c3c3c3c3c3c3, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox64
+ // result rd:x31(0x3d3d3d3dffffffff), rs1:x1(0x3d3d3d3d3d3d3d3d), rs2:x17(0xc2c2c2c2c2c2c2c2)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0x3d3d3d3dffffffff, 0x3d3d3d3d3d3d3d3d, 0xc2c2c2c2c2c2c2c2, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox64
+ // result rd:x1(0x3e3e3e3effffffff), rs1:x31(0x3e3e3e3e3e3e3e3e), rs2:x16(0xc1c1c1c1c1c1c1c1)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0x3e3e3e3effffffff, 0x3e3e3e3e3e3e3e3e, 0xc1c1c1c1c1c1c1c1, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox64
+ // result rd:x2(0x3f3f3f3fffffffff), rs1:x30(0x3f3f3f3f3f3f3f3f), rs2:x15(0xc0c0c0c0c0c0c0c0)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0x3f3f3f3fffffffff, 0x3f3f3f3f3f3f3f3f, 0xc0c0c0c0c0c0c0c0, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox64
+ // result rd:x3(0x40404040ffffffff), rs1:x29(0x4040404040404040), rs2:x14(0xbfbfbfbfbfbfbfbf)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0x40404040ffffffff, 0x4040404040404040, 0xbfbfbfbfbfbfbfbf, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox64
+ // result rd:x4(0x41414141ffffffff), rs1:x28(0x4141414141414141), rs2:x13(0xbebebebebebebebe)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0x41414141ffffffff, 0x4141414141414141, 0xbebebebebebebebe, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox64
+ // result rd:x5(0x42424242ffffffff), rs1:x27(0x4242424242424242), rs2:x12(0xbdbdbdbdbdbdbdbd)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0x42424242ffffffff, 0x4242424242424242, 0xbdbdbdbdbdbdbdbd, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox64
+ // result rd:x6(0x43434343ffffffff), rs1:x26(0x4343434343434343), rs2:x11(0xbcbcbcbcbcbcbcbc)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0x43434343ffffffff, 0x4343434343434343, 0xbcbcbcbcbcbcbcbc, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox64
+ // result rd:x7(0x44444444ffffffff), rs1:x25(0x4444444444444444), rs2:x10(0xbbbbbbbbbbbbbbbb)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0x44444444ffffffff, 0x4444444444444444, 0xbbbbbbbbbbbbbbbb, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox64
+ // result rd:x8(0x45454545ffffffff), rs1:x24(0x4545454545454545), rs2:x9(0xbabababababababa)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0x45454545ffffffff, 0x4545454545454545, 0xbabababababababa, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox64
+ // result rd:x9(0x46464646ffffffff), rs1:x23(0x4646464646464646), rs2:x8(0xb9b9b9b9b9b9b9b9)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0x46464646ffffffff, 0x4646464646464646, 0xb9b9b9b9b9b9b9b9, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox64
+ // result rd:x10(0x47474747ffffffff), rs1:x22(0x4747474747474747), rs2:x7(0xb8b8b8b8b8b8b8b8)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0x47474747ffffffff, 0x4747474747474747, 0xb8b8b8b8b8b8b8b8, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox64
+ // result rd:x11(0x48484848ffffffff), rs1:x21(0x4848484848484848), rs2:x6(0xb7b7b7b7b7b7b7b7)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0x48484848ffffffff, 0x4848484848484848, 0xb7b7b7b7b7b7b7b7, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox64
+ // result rd:x12(0x49494949ffffffff), rs1:x20(0x4949494949494949), rs2:x5(0xb6b6b6b6b6b6b6b6)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0x49494949ffffffff, 0x4949494949494949, 0xb6b6b6b6b6b6b6b6, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox64
+ // result rd:x13(0x4a4a4a4affffffff), rs1:x19(0x4a4a4a4a4a4a4a4a), rs2:x4(0xb5b5b5b5b5b5b5b5)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0x4a4a4a4affffffff, 0x4a4a4a4a4a4a4a4a, 0xb5b5b5b5b5b5b5b5, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox64
+ // result rd:x14(0x4b4b4b4bffffffff), rs1:x18(0x4b4b4b4b4b4b4b4b), rs2:x3(0xb4b4b4b4b4b4b4b4)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0x4b4b4b4bffffffff, 0x4b4b4b4b4b4b4b4b, 0xb4b4b4b4b4b4b4b4, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox64
+ // result rd:x15(0x4c4c4c4cffffffff), rs1:x17(0x4c4c4c4c4c4c4c4c), rs2:x2(0xb3b3b3b3b3b3b3b3)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0x4c4c4c4cffffffff, 0x4c4c4c4c4c4c4c4c, 0xb3b3b3b3b3b3b3b3, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox64
+ // result rd:x16(0x4d4d4d4dffffffff), rs1:x16(0x4d4d4d4d4d4d4d4d), rs2:x1(0xb2b2b2b2b2b2b2b2)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0x4d4d4d4dffffffff, 0x4d4d4d4d4d4d4d4d, 0xb2b2b2b2b2b2b2b2, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox64
+ // result rd:x17(0x4e4e4e4effffffff), rs1:x15(0x4e4e4e4e4e4e4e4e), rs2:x31(0xb1b1b1b1b1b1b1b1)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0x4e4e4e4effffffff, 0x4e4e4e4e4e4e4e4e, 0xb1b1b1b1b1b1b1b1, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox64
+ // result rd:x18(0x4f4f4f4fffffffff), rs1:x14(0x4f4f4f4f4f4f4f4f), rs2:x30(0xb0b0b0b0b0b0b0b0)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0x4f4f4f4fffffffff, 0x4f4f4f4f4f4f4f4f, 0xb0b0b0b0b0b0b0b0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox64
+ // result rd:x19(0x50505050ffffffff), rs1:x13(0x5050505050505050), rs2:x29(0xafafafafafafafaf)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0x50505050ffffffff, 0x5050505050505050, 0xafafafafafafafaf, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox64
+ // result rd:x20(0x51515151ffffffff), rs1:x12(0x5151515151515151), rs2:x28(0xaeaeaeaeaeaeaeae)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0x51515151ffffffff, 0x5151515151515151, 0xaeaeaeaeaeaeaeae, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox64
+ // result rd:x21(0x52525252ffffffff), rs1:x11(0x5252525252525252), rs2:x27(0xadadadadadadadad)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0x52525252ffffffff, 0x5252525252525252, 0xadadadadadadadad, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox64
+ // result rd:x22(0x53535353ffffffff), rs1:x10(0x5353535353535353), rs2:x26(0xacacacacacacacac)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0x53535353ffffffff, 0x5353535353535353, 0xacacacacacacacac, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox64
+ // result rd:x23(0x54545454ffffffff), rs1:x9(0x5454545454545454), rs2:x25(0xabababababababab)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0x54545454ffffffff, 0x5454545454545454, 0xabababababababab, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox64
+ // result rd:x24(0x55555555ffffffff), rs1:x8(0x5555555555555555), rs2:x24(0xaaaaaaaaaaaaaaaa)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0x55555555ffffffff, 0x5555555555555555, 0xaaaaaaaaaaaaaaaa, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox64
+ // result rd:x25(0x56565656ffffffff), rs1:x7(0x5656565656565656), rs2:x23(0xa9a9a9a9a9a9a9a9)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0x56565656ffffffff, 0x5656565656565656, 0xa9a9a9a9a9a9a9a9, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox64
+ // result rd:x26(0x57575757ffffffff), rs1:x6(0x5757575757575757), rs2:x22(0xa8a8a8a8a8a8a8a8)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0x57575757ffffffff, 0x5757575757575757, 0xa8a8a8a8a8a8a8a8, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox64
+ // result rd:x27(0x58585858ffffffff), rs1:x5(0x5858585858585858), rs2:x21(0xa7a7a7a7a7a7a7a7)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0x58585858ffffffff, 0x5858585858585858, 0xa7a7a7a7a7a7a7a7, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox64
+ // result rd:x28(0x59595959ffffffff), rs1:x4(0x5959595959595959), rs2:x20(0xa6a6a6a6a6a6a6a6)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0x59595959ffffffff, 0x5959595959595959, 0xa6a6a6a6a6a6a6a6, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox64
+ // result rd:x29(0x5a5a5a5affffffff), rs1:x3(0x5a5a5a5a5a5a5a5a), rs2:x19(0xa5a5a5a5a5a5a5a5)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0x5a5a5a5affffffff, 0x5a5a5a5a5a5a5a5a, 0xa5a5a5a5a5a5a5a5, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox64
+ // result rd:x30(0x5b5b5b5bffffffff), rs1:x2(0x5b5b5b5b5b5b5b5b), rs2:x18(0xa4a4a4a4a4a4a4a4)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0x5b5b5b5bffffffff, 0x5b5b5b5b5b5b5b5b, 0xa4a4a4a4a4a4a4a4, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox64
+ // result rd:x31(0x5c5c5c5cffffffff), rs1:x1(0x5c5c5c5c5c5c5c5c), rs2:x17(0xa3a3a3a3a3a3a3a3)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0x5c5c5c5cffffffff, 0x5c5c5c5c5c5c5c5c, 0xa3a3a3a3a3a3a3a3, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox64
+ // result rd:x1(0x5d5d5d5dffffffff), rs1:x31(0x5d5d5d5d5d5d5d5d), rs2:x16(0xa2a2a2a2a2a2a2a2)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0x5d5d5d5dffffffff, 0x5d5d5d5d5d5d5d5d, 0xa2a2a2a2a2a2a2a2, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox64
+ // result rd:x2(0x5e5e5e5effffffff), rs1:x30(0x5e5e5e5e5e5e5e5e), rs2:x15(0xa1a1a1a1a1a1a1a1)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0x5e5e5e5effffffff, 0x5e5e5e5e5e5e5e5e, 0xa1a1a1a1a1a1a1a1, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox64
+ // result rd:x3(0x5f5f5f5fffffffff), rs1:x29(0x5f5f5f5f5f5f5f5f), rs2:x14(0xa0a0a0a0a0a0a0a0)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0x5f5f5f5fffffffff, 0x5f5f5f5f5f5f5f5f, 0xa0a0a0a0a0a0a0a0, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox64
+ // result rd:x4(0x60606060ffffffff), rs1:x28(0x6060606060606060), rs2:x13(0x9f9f9f9f9f9f9f9f)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0x60606060ffffffff, 0x6060606060606060, 0x9f9f9f9f9f9f9f9f, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox64
+ // result rd:x5(0x61616161ffffffff), rs1:x27(0x6161616161616161), rs2:x12(0x9e9e9e9e9e9e9e9e)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0x61616161ffffffff, 0x6161616161616161, 0x9e9e9e9e9e9e9e9e, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox64
+ // result rd:x6(0x62626262ffffffff), rs1:x26(0x6262626262626262), rs2:x11(0x9d9d9d9d9d9d9d9d)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0x62626262ffffffff, 0x6262626262626262, 0x9d9d9d9d9d9d9d9d, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox64
+ // result rd:x7(0x63636363ffffffff), rs1:x25(0x6363636363636363), rs2:x10(0x9c9c9c9c9c9c9c9c)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0x63636363ffffffff, 0x6363636363636363, 0x9c9c9c9c9c9c9c9c, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox64
+ // result rd:x8(0x64646464ffffffff), rs1:x24(0x6464646464646464), rs2:x9(0x9b9b9b9b9b9b9b9b)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0x64646464ffffffff, 0x6464646464646464, 0x9b9b9b9b9b9b9b9b, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox64
+ // result rd:x9(0x65656565ffffffff), rs1:x23(0x6565656565656565), rs2:x8(0x9a9a9a9a9a9a9a9a)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0x65656565ffffffff, 0x6565656565656565, 0x9a9a9a9a9a9a9a9a, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox64
+ // result rd:x10(0x66666666ffffffff), rs1:x22(0x6666666666666666), rs2:x7(0x9999999999999999)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0x66666666ffffffff, 0x6666666666666666, 0x9999999999999999, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox64
+ // result rd:x11(0x67676767ffffffff), rs1:x21(0x6767676767676767), rs2:x6(0x9898989898989898)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0x67676767ffffffff, 0x6767676767676767, 0x9898989898989898, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox64
+ // result rd:x12(0x68686868ffffffff), rs1:x20(0x6868686868686868), rs2:x5(0x9797979797979797)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0x68686868ffffffff, 0x6868686868686868, 0x9797979797979797, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox64
+ // result rd:x13(0x69696969ffffffff), rs1:x19(0x6969696969696969), rs2:x4(0x9696969696969696)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0x69696969ffffffff, 0x6969696969696969, 0x9696969696969696, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox64
+ // result rd:x14(0x6a6a6a6affffffff), rs1:x18(0x6a6a6a6a6a6a6a6a), rs2:x3(0x9595959595959595)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0x6a6a6a6affffffff, 0x6a6a6a6a6a6a6a6a, 0x9595959595959595, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox64
+ // result rd:x15(0x6b6b6b6bffffffff), rs1:x17(0x6b6b6b6b6b6b6b6b), rs2:x2(0x9494949494949494)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0x6b6b6b6bffffffff, 0x6b6b6b6b6b6b6b6b, 0x9494949494949494, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox64
+ // result rd:x16(0x6c6c6c6cffffffff), rs1:x16(0x6c6c6c6c6c6c6c6c), rs2:x1(0x9393939393939393)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0x6c6c6c6cffffffff, 0x6c6c6c6c6c6c6c6c, 0x9393939393939393, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox64
+ // result rd:x17(0x6d6d6d6dffffffff), rs1:x15(0x6d6d6d6d6d6d6d6d), rs2:x31(0x9292929292929292)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0x6d6d6d6dffffffff, 0x6d6d6d6d6d6d6d6d, 0x9292929292929292, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox64
+ // result rd:x18(0x6e6e6e6effffffff), rs1:x14(0x6e6e6e6e6e6e6e6e), rs2:x30(0x9191919191919191)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0x6e6e6e6effffffff, 0x6e6e6e6e6e6e6e6e, 0x9191919191919191, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox64
+ // result rd:x19(0x6f6f6f6fffffffff), rs1:x13(0x6f6f6f6f6f6f6f6f), rs2:x29(0x9090909090909090)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0x6f6f6f6fffffffff, 0x6f6f6f6f6f6f6f6f, 0x9090909090909090, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox64
+ // result rd:x20(0x70707070ffffffff), rs1:x12(0x7070707070707070), rs2:x28(0x8f8f8f8f8f8f8f8f)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0x70707070ffffffff, 0x7070707070707070, 0x8f8f8f8f8f8f8f8f, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox64
+ // result rd:x21(0x71717171ffffffff), rs1:x11(0x7171717171717171), rs2:x27(0x8e8e8e8e8e8e8e8e)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0x71717171ffffffff, 0x7171717171717171, 0x8e8e8e8e8e8e8e8e, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox64
+ // result rd:x22(0x72727272ffffffff), rs1:x10(0x7272727272727272), rs2:x26(0x8d8d8d8d8d8d8d8d)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0x72727272ffffffff, 0x7272727272727272, 0x8d8d8d8d8d8d8d8d, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox64
+ // result rd:x23(0x73737373ffffffff), rs1:x9(0x7373737373737373), rs2:x25(0x8c8c8c8c8c8c8c8c)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0x73737373ffffffff, 0x7373737373737373, 0x8c8c8c8c8c8c8c8c, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox64
+ // result rd:x24(0x74747474ffffffff), rs1:x8(0x7474747474747474), rs2:x24(0x8b8b8b8b8b8b8b8b)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0x74747474ffffffff, 0x7474747474747474, 0x8b8b8b8b8b8b8b8b, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox64
+ // result rd:x25(0x75757575ffffffff), rs1:x7(0x7575757575757575), rs2:x23(0x8a8a8a8a8a8a8a8a)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0x75757575ffffffff, 0x7575757575757575, 0x8a8a8a8a8a8a8a8a, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox64
+ // result rd:x26(0x76767676ffffffff), rs1:x6(0x7676767676767676), rs2:x22(0x8989898989898989)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0x76767676ffffffff, 0x7676767676767676, 0x8989898989898989, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox64
+ // result rd:x27(0x77777777ffffffff), rs1:x5(0x7777777777777777), rs2:x21(0x8888888888888888)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0x77777777ffffffff, 0x7777777777777777, 0x8888888888888888, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox64
+ // result rd:x28(0x78787878ffffffff), rs1:x4(0x7878787878787878), rs2:x20(0x8787878787878787)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0x78787878ffffffff, 0x7878787878787878, 0x8787878787878787, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox64
+ // result rd:x29(0x79797979ffffffff), rs1:x3(0x7979797979797979), rs2:x19(0x8686868686868686)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0x79797979ffffffff, 0x7979797979797979, 0x8686868686868686, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox64
+ // result rd:x30(0x7a7a7a7affffffff), rs1:x2(0x7a7a7a7a7a7a7a7a), rs2:x18(0x8585858585858585)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0x7a7a7a7affffffff, 0x7a7a7a7a7a7a7a7a, 0x8585858585858585, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox64
+ // result rd:x31(0x7b7b7b7bffffffff), rs1:x1(0x7b7b7b7b7b7b7b7b), rs2:x17(0x8484848484848484)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0x7b7b7b7bffffffff, 0x7b7b7b7b7b7b7b7b, 0x8484848484848484, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox64
+ // result rd:x1(0x7c7c7c7cffffffff), rs1:x31(0x7c7c7c7c7c7c7c7c), rs2:x16(0x8383838383838383)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0x7c7c7c7cffffffff, 0x7c7c7c7c7c7c7c7c, 0x8383838383838383, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox64
+ // result rd:x2(0x7d7d7d7dffffffff), rs1:x30(0x7d7d7d7d7d7d7d7d), rs2:x15(0x8282828282828282)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0x7d7d7d7dffffffff, 0x7d7d7d7d7d7d7d7d, 0x8282828282828282, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox64
+ // result rd:x3(0x7e7e7e7effffffff), rs1:x29(0x7e7e7e7e7e7e7e7e), rs2:x14(0x8181818181818181)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0x7e7e7e7effffffff, 0x7e7e7e7e7e7e7e7e, 0x8181818181818181, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox64
+ // result rd:x4(0x7f7f7f7fffffffff), rs1:x28(0x7f7f7f7f7f7f7f7f), rs2:x13(0x8080808080808080)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0x7f7f7f7fffffffff, 0x7f7f7f7f7f7f7f7f, 0x8080808080808080, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox64
+ // result rd:x5(0x80808080ffffffff), rs1:x27(0x8080808080808080), rs2:x12(0x7f7f7f7f7f7f7f7f)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0x80808080ffffffff, 0x8080808080808080, 0x7f7f7f7f7f7f7f7f, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox64
+ // result rd:x6(0x81818181ffffffff), rs1:x26(0x8181818181818181), rs2:x11(0x7e7e7e7e7e7e7e7e)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0x81818181ffffffff, 0x8181818181818181, 0x7e7e7e7e7e7e7e7e, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox64
+ // result rd:x7(0x82828282ffffffff), rs1:x25(0x8282828282828282), rs2:x10(0x7d7d7d7d7d7d7d7d)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0x82828282ffffffff, 0x8282828282828282, 0x7d7d7d7d7d7d7d7d, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox64
+ // result rd:x8(0x83838383ffffffff), rs1:x24(0x8383838383838383), rs2:x9(0x7c7c7c7c7c7c7c7c)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0x83838383ffffffff, 0x8383838383838383, 0x7c7c7c7c7c7c7c7c, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox64
+ // result rd:x9(0x84848484ffffffff), rs1:x23(0x8484848484848484), rs2:x8(0x7b7b7b7b7b7b7b7b)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0x84848484ffffffff, 0x8484848484848484, 0x7b7b7b7b7b7b7b7b, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox64
+ // result rd:x10(0x85858585ffffffff), rs1:x22(0x8585858585858585), rs2:x7(0x7a7a7a7a7a7a7a7a)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0x85858585ffffffff, 0x8585858585858585, 0x7a7a7a7a7a7a7a7a, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox64
+ // result rd:x11(0x86868686ffffffff), rs1:x21(0x8686868686868686), rs2:x6(0x7979797979797979)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0x86868686ffffffff, 0x8686868686868686, 0x7979797979797979, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox64
+ // result rd:x12(0x87878787ffffffff), rs1:x20(0x8787878787878787), rs2:x5(0x7878787878787878)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0x87878787ffffffff, 0x8787878787878787, 0x7878787878787878, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox64
+ // result rd:x13(0x88888888ffffffff), rs1:x19(0x8888888888888888), rs2:x4(0x7777777777777777)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0x88888888ffffffff, 0x8888888888888888, 0x7777777777777777, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox64
+ // result rd:x14(0x89898989ffffffff), rs1:x18(0x8989898989898989), rs2:x3(0x7676767676767676)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0x89898989ffffffff, 0x8989898989898989, 0x7676767676767676, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox64
+ // result rd:x15(0x8a8a8a8affffffff), rs1:x17(0x8a8a8a8a8a8a8a8a), rs2:x2(0x7575757575757575)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0x8a8a8a8affffffff, 0x8a8a8a8a8a8a8a8a, 0x7575757575757575, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox64
+ // result rd:x16(0x8b8b8b8bffffffff), rs1:x16(0x8b8b8b8b8b8b8b8b), rs2:x1(0x7474747474747474)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0x8b8b8b8bffffffff, 0x8b8b8b8b8b8b8b8b, 0x7474747474747474, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox64
+ // result rd:x17(0x8c8c8c8cffffffff), rs1:x15(0x8c8c8c8c8c8c8c8c), rs2:x31(0x7373737373737373)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0x8c8c8c8cffffffff, 0x8c8c8c8c8c8c8c8c, 0x7373737373737373, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox64
+ // result rd:x18(0x8d8d8d8dffffffff), rs1:x14(0x8d8d8d8d8d8d8d8d), rs2:x30(0x7272727272727272)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0x8d8d8d8dffffffff, 0x8d8d8d8d8d8d8d8d, 0x7272727272727272, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox64
+ // result rd:x19(0x8e8e8e8effffffff), rs1:x13(0x8e8e8e8e8e8e8e8e), rs2:x29(0x7171717171717171)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0x8e8e8e8effffffff, 0x8e8e8e8e8e8e8e8e, 0x7171717171717171, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox64
+ // result rd:x20(0x8f8f8f8fffffffff), rs1:x12(0x8f8f8f8f8f8f8f8f), rs2:x28(0x7070707070707070)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0x8f8f8f8fffffffff, 0x8f8f8f8f8f8f8f8f, 0x7070707070707070, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox64
+ // result rd:x21(0x90909090ffffffff), rs1:x11(0x9090909090909090), rs2:x27(0x6f6f6f6f6f6f6f6f)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0x90909090ffffffff, 0x9090909090909090, 0x6f6f6f6f6f6f6f6f, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox64
+ // result rd:x22(0x91919191ffffffff), rs1:x10(0x9191919191919191), rs2:x26(0x6e6e6e6e6e6e6e6e)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0x91919191ffffffff, 0x9191919191919191, 0x6e6e6e6e6e6e6e6e, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox64
+ // result rd:x23(0x92929292ffffffff), rs1:x9(0x9292929292929292), rs2:x25(0x6d6d6d6d6d6d6d6d)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0x92929292ffffffff, 0x9292929292929292, 0x6d6d6d6d6d6d6d6d, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox64
+ // result rd:x24(0x93939393ffffffff), rs1:x8(0x9393939393939393), rs2:x24(0x6c6c6c6c6c6c6c6c)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0x93939393ffffffff, 0x9393939393939393, 0x6c6c6c6c6c6c6c6c, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox64
+ // result rd:x25(0x94949494ffffffff), rs1:x7(0x9494949494949494), rs2:x23(0x6b6b6b6b6b6b6b6b)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0x94949494ffffffff, 0x9494949494949494, 0x6b6b6b6b6b6b6b6b, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox64
+ // result rd:x26(0x95959595ffffffff), rs1:x6(0x9595959595959595), rs2:x22(0x6a6a6a6a6a6a6a6a)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0x95959595ffffffff, 0x9595959595959595, 0x6a6a6a6a6a6a6a6a, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox64
+ // result rd:x27(0x96969696ffffffff), rs1:x5(0x9696969696969696), rs2:x21(0x6969696969696969)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0x96969696ffffffff, 0x9696969696969696, 0x6969696969696969, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox64
+ // result rd:x28(0x97979797ffffffff), rs1:x4(0x9797979797979797), rs2:x20(0x6868686868686868)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0x97979797ffffffff, 0x9797979797979797, 0x6868686868686868, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox64
+ // result rd:x29(0x98989898ffffffff), rs1:x3(0x9898989898989898), rs2:x19(0x6767676767676767)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0x98989898ffffffff, 0x9898989898989898, 0x6767676767676767, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox64
+ // result rd:x30(0x99999999ffffffff), rs1:x2(0x9999999999999999), rs2:x18(0x6666666666666666)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0x99999999ffffffff, 0x9999999999999999, 0x6666666666666666, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox64
+ // result rd:x31(0x9a9a9a9affffffff), rs1:x1(0x9a9a9a9a9a9a9a9a), rs2:x17(0x6565656565656565)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0x9a9a9a9affffffff, 0x9a9a9a9a9a9a9a9a, 0x6565656565656565, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox64
+ // result rd:x1(0x9b9b9b9bffffffff), rs1:x31(0x9b9b9b9b9b9b9b9b), rs2:x16(0x6464646464646464)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0x9b9b9b9bffffffff, 0x9b9b9b9b9b9b9b9b, 0x6464646464646464, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox64
+ // result rd:x2(0x9c9c9c9cffffffff), rs1:x30(0x9c9c9c9c9c9c9c9c), rs2:x15(0x6363636363636363)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0x9c9c9c9cffffffff, 0x9c9c9c9c9c9c9c9c, 0x6363636363636363, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox64
+ // result rd:x3(0x9d9d9d9dffffffff), rs1:x29(0x9d9d9d9d9d9d9d9d), rs2:x14(0x6262626262626262)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0x9d9d9d9dffffffff, 0x9d9d9d9d9d9d9d9d, 0x6262626262626262, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox64
+ // result rd:x4(0x9e9e9e9effffffff), rs1:x28(0x9e9e9e9e9e9e9e9e), rs2:x13(0x6161616161616161)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0x9e9e9e9effffffff, 0x9e9e9e9e9e9e9e9e, 0x6161616161616161, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox64
+ // result rd:x5(0x9f9f9f9fffffffff), rs1:x27(0x9f9f9f9f9f9f9f9f), rs2:x12(0x6060606060606060)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0x9f9f9f9fffffffff, 0x9f9f9f9f9f9f9f9f, 0x6060606060606060, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox64
+ // result rd:x6(0xa0a0a0a0ffffffff), rs1:x26(0xa0a0a0a0a0a0a0a0), rs2:x11(0x5f5f5f5f5f5f5f5f)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0xa0a0a0a0ffffffff, 0xa0a0a0a0a0a0a0a0, 0x5f5f5f5f5f5f5f5f, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox64
+ // result rd:x7(0xa1a1a1a1ffffffff), rs1:x25(0xa1a1a1a1a1a1a1a1), rs2:x10(0x5e5e5e5e5e5e5e5e)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0xa1a1a1a1ffffffff, 0xa1a1a1a1a1a1a1a1, 0x5e5e5e5e5e5e5e5e, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox64
+ // result rd:x8(0xa2a2a2a2ffffffff), rs1:x24(0xa2a2a2a2a2a2a2a2), rs2:x9(0x5d5d5d5d5d5d5d5d)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0xa2a2a2a2ffffffff, 0xa2a2a2a2a2a2a2a2, 0x5d5d5d5d5d5d5d5d, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox64
+ // result rd:x9(0xa3a3a3a3ffffffff), rs1:x23(0xa3a3a3a3a3a3a3a3), rs2:x8(0x5c5c5c5c5c5c5c5c)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0xa3a3a3a3ffffffff, 0xa3a3a3a3a3a3a3a3, 0x5c5c5c5c5c5c5c5c, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox64
+ // result rd:x10(0xa4a4a4a4ffffffff), rs1:x22(0xa4a4a4a4a4a4a4a4), rs2:x7(0x5b5b5b5b5b5b5b5b)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0xa4a4a4a4ffffffff, 0xa4a4a4a4a4a4a4a4, 0x5b5b5b5b5b5b5b5b, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox64
+ // result rd:x11(0xa5a5a5a5ffffffff), rs1:x21(0xa5a5a5a5a5a5a5a5), rs2:x6(0x5a5a5a5a5a5a5a5a)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0xa5a5a5a5ffffffff, 0xa5a5a5a5a5a5a5a5, 0x5a5a5a5a5a5a5a5a, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox64
+ // result rd:x12(0xa6a6a6a6ffffffff), rs1:x20(0xa6a6a6a6a6a6a6a6), rs2:x5(0x5959595959595959)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0xa6a6a6a6ffffffff, 0xa6a6a6a6a6a6a6a6, 0x5959595959595959, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox64
+ // result rd:x13(0xa7a7a7a7ffffffff), rs1:x19(0xa7a7a7a7a7a7a7a7), rs2:x4(0x5858585858585858)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0xa7a7a7a7ffffffff, 0xa7a7a7a7a7a7a7a7, 0x5858585858585858, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox64
+ // result rd:x14(0xa8a8a8a8ffffffff), rs1:x18(0xa8a8a8a8a8a8a8a8), rs2:x3(0x5757575757575757)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0xa8a8a8a8ffffffff, 0xa8a8a8a8a8a8a8a8, 0x5757575757575757, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox64
+ // result rd:x15(0xa9a9a9a9ffffffff), rs1:x17(0xa9a9a9a9a9a9a9a9), rs2:x2(0x5656565656565656)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0xa9a9a9a9ffffffff, 0xa9a9a9a9a9a9a9a9, 0x5656565656565656, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox64
+ // result rd:x16(0xaaaaaaaaffffffff), rs1:x16(0xaaaaaaaaaaaaaaaa), rs2:x1(0x5555555555555555)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0xaaaaaaaaffffffff, 0xaaaaaaaaaaaaaaaa, 0x5555555555555555, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox64
+ // result rd:x17(0xababababffffffff), rs1:x15(0xabababababababab), rs2:x31(0x5454545454545454)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0xababababffffffff, 0xabababababababab, 0x5454545454545454, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox64
+ // result rd:x18(0xacacacacffffffff), rs1:x14(0xacacacacacacacac), rs2:x30(0x5353535353535353)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0xacacacacffffffff, 0xacacacacacacacac, 0x5353535353535353, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox64
+ // result rd:x19(0xadadadadffffffff), rs1:x13(0xadadadadadadadad), rs2:x29(0x5252525252525252)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0xadadadadffffffff, 0xadadadadadadadad, 0x5252525252525252, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox64
+ // result rd:x20(0xaeaeaeaeffffffff), rs1:x12(0xaeaeaeaeaeaeaeae), rs2:x28(0x5151515151515151)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0xaeaeaeaeffffffff, 0xaeaeaeaeaeaeaeae, 0x5151515151515151, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox64
+ // result rd:x21(0xafafafafffffffff), rs1:x11(0xafafafafafafafaf), rs2:x27(0x5050505050505050)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0xafafafafffffffff, 0xafafafafafafafaf, 0x5050505050505050, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox64
+ // result rd:x22(0xb0b0b0b0ffffffff), rs1:x10(0xb0b0b0b0b0b0b0b0), rs2:x26(0x4f4f4f4f4f4f4f4f)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0xb0b0b0b0ffffffff, 0xb0b0b0b0b0b0b0b0, 0x4f4f4f4f4f4f4f4f, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox64
+ // result rd:x23(0xb1b1b1b1ffffffff), rs1:x9(0xb1b1b1b1b1b1b1b1), rs2:x25(0x4e4e4e4e4e4e4e4e)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0xb1b1b1b1ffffffff, 0xb1b1b1b1b1b1b1b1, 0x4e4e4e4e4e4e4e4e, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox64
+ // result rd:x24(0xb2b2b2b2ffffffff), rs1:x8(0xb2b2b2b2b2b2b2b2), rs2:x24(0x4d4d4d4d4d4d4d4d)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0xb2b2b2b2ffffffff, 0xb2b2b2b2b2b2b2b2, 0x4d4d4d4d4d4d4d4d, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox64
+ // result rd:x25(0xb3b3b3b3ffffffff), rs1:x7(0xb3b3b3b3b3b3b3b3), rs2:x23(0x4c4c4c4c4c4c4c4c)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0xb3b3b3b3ffffffff, 0xb3b3b3b3b3b3b3b3, 0x4c4c4c4c4c4c4c4c, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox64
+ // result rd:x26(0xb4b4b4b4ffffffff), rs1:x6(0xb4b4b4b4b4b4b4b4), rs2:x22(0x4b4b4b4b4b4b4b4b)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0xb4b4b4b4ffffffff, 0xb4b4b4b4b4b4b4b4, 0x4b4b4b4b4b4b4b4b, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox64
+ // result rd:x27(0xb5b5b5b5ffffffff), rs1:x5(0xb5b5b5b5b5b5b5b5), rs2:x21(0x4a4a4a4a4a4a4a4a)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0xb5b5b5b5ffffffff, 0xb5b5b5b5b5b5b5b5, 0x4a4a4a4a4a4a4a4a, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox64
+ // result rd:x28(0xb6b6b6b6ffffffff), rs1:x4(0xb6b6b6b6b6b6b6b6), rs2:x20(0x4949494949494949)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0xb6b6b6b6ffffffff, 0xb6b6b6b6b6b6b6b6, 0x4949494949494949, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox64
+ // result rd:x29(0xb7b7b7b7ffffffff), rs1:x3(0xb7b7b7b7b7b7b7b7), rs2:x19(0x4848484848484848)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0xb7b7b7b7ffffffff, 0xb7b7b7b7b7b7b7b7, 0x4848484848484848, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox64
+ // result rd:x30(0xb8b8b8b8ffffffff), rs1:x2(0xb8b8b8b8b8b8b8b8), rs2:x18(0x4747474747474747)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0xb8b8b8b8ffffffff, 0xb8b8b8b8b8b8b8b8, 0x4747474747474747, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox64
+ // result rd:x31(0xb9b9b9b9ffffffff), rs1:x1(0xb9b9b9b9b9b9b9b9), rs2:x17(0x4646464646464646)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0xb9b9b9b9ffffffff, 0xb9b9b9b9b9b9b9b9, 0x4646464646464646, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox64
+ // result rd:x1(0xbabababaffffffff), rs1:x31(0xbabababababababa), rs2:x16(0x4545454545454545)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0xbabababaffffffff, 0xbabababababababa, 0x4545454545454545, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox64
+ // result rd:x2(0xbbbbbbbbffffffff), rs1:x30(0xbbbbbbbbbbbbbbbb), rs2:x15(0x4444444444444444)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0xbbbbbbbbffffffff, 0xbbbbbbbbbbbbbbbb, 0x4444444444444444, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox64
+ // result rd:x3(0xbcbcbcbcffffffff), rs1:x29(0xbcbcbcbcbcbcbcbc), rs2:x14(0x4343434343434343)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0xbcbcbcbcffffffff, 0xbcbcbcbcbcbcbcbc, 0x4343434343434343, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox64
+ // result rd:x4(0xbdbdbdbdffffffff), rs1:x28(0xbdbdbdbdbdbdbdbd), rs2:x13(0x4242424242424242)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0xbdbdbdbdffffffff, 0xbdbdbdbdbdbdbdbd, 0x4242424242424242, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox64
+ // result rd:x5(0xbebebebeffffffff), rs1:x27(0xbebebebebebebebe), rs2:x12(0x4141414141414141)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0xbebebebeffffffff, 0xbebebebebebebebe, 0x4141414141414141, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox64
+ // result rd:x6(0xbfbfbfbfffffffff), rs1:x26(0xbfbfbfbfbfbfbfbf), rs2:x11(0x4040404040404040)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0xbfbfbfbfffffffff, 0xbfbfbfbfbfbfbfbf, 0x4040404040404040, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox64
+ // result rd:x7(0xc0c0c0c0ffffffff), rs1:x25(0xc0c0c0c0c0c0c0c0), rs2:x10(0x3f3f3f3f3f3f3f3f)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0xc0c0c0c0ffffffff, 0xc0c0c0c0c0c0c0c0, 0x3f3f3f3f3f3f3f3f, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox64
+ // result rd:x8(0xc1c1c1c1ffffffff), rs1:x24(0xc1c1c1c1c1c1c1c1), rs2:x9(0x3e3e3e3e3e3e3e3e)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0xc1c1c1c1ffffffff, 0xc1c1c1c1c1c1c1c1, 0x3e3e3e3e3e3e3e3e, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox64
+ // result rd:x9(0xc2c2c2c2ffffffff), rs1:x23(0xc2c2c2c2c2c2c2c2), rs2:x8(0x3d3d3d3d3d3d3d3d)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0xc2c2c2c2ffffffff, 0xc2c2c2c2c2c2c2c2, 0x3d3d3d3d3d3d3d3d, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox64
+ // result rd:x10(0xc3c3c3c3ffffffff), rs1:x22(0xc3c3c3c3c3c3c3c3), rs2:x7(0x3c3c3c3c3c3c3c3c)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0xc3c3c3c3ffffffff, 0xc3c3c3c3c3c3c3c3, 0x3c3c3c3c3c3c3c3c, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox64
+ // result rd:x11(0xc4c4c4c4ffffffff), rs1:x21(0xc4c4c4c4c4c4c4c4), rs2:x6(0x3b3b3b3b3b3b3b3b)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0xc4c4c4c4ffffffff, 0xc4c4c4c4c4c4c4c4, 0x3b3b3b3b3b3b3b3b, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox64
+ // result rd:x12(0xc5c5c5c5ffffffff), rs1:x20(0xc5c5c5c5c5c5c5c5), rs2:x5(0x3a3a3a3a3a3a3a3a)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0xc5c5c5c5ffffffff, 0xc5c5c5c5c5c5c5c5, 0x3a3a3a3a3a3a3a3a, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox64
+ // result rd:x13(0xc6c6c6c6ffffffff), rs1:x19(0xc6c6c6c6c6c6c6c6), rs2:x4(0x3939393939393939)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0xc6c6c6c6ffffffff, 0xc6c6c6c6c6c6c6c6, 0x3939393939393939, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox64
+ // result rd:x14(0xc7c7c7c7ffffffff), rs1:x18(0xc7c7c7c7c7c7c7c7), rs2:x3(0x3838383838383838)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0xc7c7c7c7ffffffff, 0xc7c7c7c7c7c7c7c7, 0x3838383838383838, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox64
+ // result rd:x15(0xc8c8c8c8ffffffff), rs1:x17(0xc8c8c8c8c8c8c8c8), rs2:x2(0x3737373737373737)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0xc8c8c8c8ffffffff, 0xc8c8c8c8c8c8c8c8, 0x3737373737373737, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox64
+ // result rd:x16(0xc9c9c9c9ffffffff), rs1:x16(0xc9c9c9c9c9c9c9c9), rs2:x1(0x3636363636363636)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0xc9c9c9c9ffffffff, 0xc9c9c9c9c9c9c9c9, 0x3636363636363636, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox64
+ // result rd:x17(0xcacacacaffffffff), rs1:x15(0xcacacacacacacaca), rs2:x31(0x3535353535353535)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0xcacacacaffffffff, 0xcacacacacacacaca, 0x3535353535353535, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox64
+ // result rd:x18(0xcbcbcbcbffffffff), rs1:x14(0xcbcbcbcbcbcbcbcb), rs2:x30(0x3434343434343434)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0xcbcbcbcbffffffff, 0xcbcbcbcbcbcbcbcb, 0x3434343434343434, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox64
+ // result rd:x19(0xccccccccffffffff), rs1:x13(0xcccccccccccccccc), rs2:x29(0x3333333333333333)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0xccccccccffffffff, 0xcccccccccccccccc, 0x3333333333333333, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox64
+ // result rd:x20(0xcdcdcdcdffffffff), rs1:x12(0xcdcdcdcdcdcdcdcd), rs2:x28(0x3232323232323232)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0xcdcdcdcdffffffff, 0xcdcdcdcdcdcdcdcd, 0x3232323232323232, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox64
+ // result rd:x21(0xcecececeffffffff), rs1:x11(0xcececececececece), rs2:x27(0x3131313131313131)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0xcecececeffffffff, 0xcececececececece, 0x3131313131313131, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox64
+ // result rd:x22(0xcfcfcfcfffffffff), rs1:x10(0xcfcfcfcfcfcfcfcf), rs2:x26(0x3030303030303030)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0xcfcfcfcfffffffff, 0xcfcfcfcfcfcfcfcf, 0x3030303030303030, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox64
+ // result rd:x23(0xd0d0d0d0ffffffff), rs1:x9(0xd0d0d0d0d0d0d0d0), rs2:x25(0x2f2f2f2f2f2f2f2f)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0xd0d0d0d0ffffffff, 0xd0d0d0d0d0d0d0d0, 0x2f2f2f2f2f2f2f2f, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox64
+ // result rd:x24(0xd1d1d1d1ffffffff), rs1:x8(0xd1d1d1d1d1d1d1d1), rs2:x24(0x2e2e2e2e2e2e2e2e)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0xd1d1d1d1ffffffff, 0xd1d1d1d1d1d1d1d1, 0x2e2e2e2e2e2e2e2e, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox64
+ // result rd:x25(0xd2d2d2d2ffffffff), rs1:x7(0xd2d2d2d2d2d2d2d2), rs2:x23(0x2d2d2d2d2d2d2d2d)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0xd2d2d2d2ffffffff, 0xd2d2d2d2d2d2d2d2, 0x2d2d2d2d2d2d2d2d, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox64
+ // result rd:x26(0xd3d3d3d3ffffffff), rs1:x6(0xd3d3d3d3d3d3d3d3), rs2:x22(0x2c2c2c2c2c2c2c2c)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0xd3d3d3d3ffffffff, 0xd3d3d3d3d3d3d3d3, 0x2c2c2c2c2c2c2c2c, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox64
+ // result rd:x27(0xd4d4d4d4ffffffff), rs1:x5(0xd4d4d4d4d4d4d4d4), rs2:x21(0x2b2b2b2b2b2b2b2b)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0xd4d4d4d4ffffffff, 0xd4d4d4d4d4d4d4d4, 0x2b2b2b2b2b2b2b2b, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox64
+ // result rd:x28(0xd5d5d5d5ffffffff), rs1:x4(0xd5d5d5d5d5d5d5d5), rs2:x20(0x2a2a2a2a2a2a2a2a)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0xd5d5d5d5ffffffff, 0xd5d5d5d5d5d5d5d5, 0x2a2a2a2a2a2a2a2a, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox64
+ // result rd:x29(0xd6d6d6d6ffffffff), rs1:x3(0xd6d6d6d6d6d6d6d6), rs2:x19(0x2929292929292929)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0xd6d6d6d6ffffffff, 0xd6d6d6d6d6d6d6d6, 0x2929292929292929, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox64
+ // result rd:x30(0xd7d7d7d7ffffffff), rs1:x2(0xd7d7d7d7d7d7d7d7), rs2:x18(0x2828282828282828)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0xd7d7d7d7ffffffff, 0xd7d7d7d7d7d7d7d7, 0x2828282828282828, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox64
+ // result rd:x31(0xd8d8d8d8ffffffff), rs1:x1(0xd8d8d8d8d8d8d8d8), rs2:x17(0x2727272727272727)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0xd8d8d8d8ffffffff, 0xd8d8d8d8d8d8d8d8, 0x2727272727272727, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox64
+ // result rd:x1(0xd9d9d9d9ffffffff), rs1:x31(0xd9d9d9d9d9d9d9d9), rs2:x16(0x2626262626262626)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0xd9d9d9d9ffffffff, 0xd9d9d9d9d9d9d9d9, 0x2626262626262626, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox64
+ // result rd:x2(0xdadadadaffffffff), rs1:x30(0xdadadadadadadada), rs2:x15(0x2525252525252525)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0xdadadadaffffffff, 0xdadadadadadadada, 0x2525252525252525, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox64
+ // result rd:x3(0xdbdbdbdbffffffff), rs1:x29(0xdbdbdbdbdbdbdbdb), rs2:x14(0x2424242424242424)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0xdbdbdbdbffffffff, 0xdbdbdbdbdbdbdbdb, 0x2424242424242424, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox64
+ // result rd:x4(0xdcdcdcdcffffffff), rs1:x28(0xdcdcdcdcdcdcdcdc), rs2:x13(0x2323232323232323)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0xdcdcdcdcffffffff, 0xdcdcdcdcdcdcdcdc, 0x2323232323232323, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox64
+ // result rd:x5(0xddddddddffffffff), rs1:x27(0xdddddddddddddddd), rs2:x12(0x2222222222222222)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0xddddddddffffffff, 0xdddddddddddddddd, 0x2222222222222222, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox64
+ // result rd:x6(0xdedededeffffffff), rs1:x26(0xdededededededede), rs2:x11(0x2121212121212121)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0xdedededeffffffff, 0xdededededededede, 0x2121212121212121, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox64
+ // result rd:x7(0xdfdfdfdfffffffff), rs1:x25(0xdfdfdfdfdfdfdfdf), rs2:x10(0x2020202020202020)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0xdfdfdfdfffffffff, 0xdfdfdfdfdfdfdfdf, 0x2020202020202020, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox64
+ // result rd:x8(0xe0e0e0e0ffffffff), rs1:x24(0xe0e0e0e0e0e0e0e0), rs2:x9(0x1f1f1f1f1f1f1f1f)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0xe0e0e0e0ffffffff, 0xe0e0e0e0e0e0e0e0, 0x1f1f1f1f1f1f1f1f, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox64
+ // result rd:x9(0xe1e1e1e1ffffffff), rs1:x23(0xe1e1e1e1e1e1e1e1), rs2:x8(0x1e1e1e1e1e1e1e1e)
+ TEST_RR_OP(aes64ks2, x9, x23, x8, 0xe1e1e1e1ffffffff, 0xe1e1e1e1e1e1e1e1, 0x1e1e1e1e1e1e1e1e, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox64
+ // result rd:x10(0xe2e2e2e2ffffffff), rs1:x22(0xe2e2e2e2e2e2e2e2), rs2:x7(0x1d1d1d1d1d1d1d1d)
+ TEST_RR_OP(aes64ks2, x10, x22, x7, 0xe2e2e2e2ffffffff, 0xe2e2e2e2e2e2e2e2, 0x1d1d1d1d1d1d1d1d, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox64
+ // result rd:x11(0xe3e3e3e3ffffffff), rs1:x21(0xe3e3e3e3e3e3e3e3), rs2:x6(0x1c1c1c1c1c1c1c1c)
+ TEST_RR_OP(aes64ks2, x11, x21, x6, 0xe3e3e3e3ffffffff, 0xe3e3e3e3e3e3e3e3, 0x1c1c1c1c1c1c1c1c, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox64
+ // result rd:x12(0xe4e4e4e4ffffffff), rs1:x20(0xe4e4e4e4e4e4e4e4), rs2:x5(0x1b1b1b1b1b1b1b1b)
+ TEST_RR_OP(aes64ks2, x12, x20, x5, 0xe4e4e4e4ffffffff, 0xe4e4e4e4e4e4e4e4, 0x1b1b1b1b1b1b1b1b, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox64
+ // result rd:x13(0xe5e5e5e5ffffffff), rs1:x19(0xe5e5e5e5e5e5e5e5), rs2:x4(0x1a1a1a1a1a1a1a1a)
+ TEST_RR_OP(aes64ks2, x13, x19, x4, 0xe5e5e5e5ffffffff, 0xe5e5e5e5e5e5e5e5, 0x1a1a1a1a1a1a1a1a, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox64
+ // result rd:x14(0xe6e6e6e6ffffffff), rs1:x18(0xe6e6e6e6e6e6e6e6), rs2:x3(0x1919191919191919)
+ TEST_RR_OP(aes64ks2, x14, x18, x3, 0xe6e6e6e6ffffffff, 0xe6e6e6e6e6e6e6e6, 0x1919191919191919, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox64
+ // result rd:x15(0xe7e7e7e7ffffffff), rs1:x17(0xe7e7e7e7e7e7e7e7), rs2:x2(0x1818181818181818)
+ TEST_RR_OP(aes64ks2, x15, x17, x2, 0xe7e7e7e7ffffffff, 0xe7e7e7e7e7e7e7e7, 0x1818181818181818, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox64
+ // result rd:x16(0xe8e8e8e8ffffffff), rs1:x16(0xe8e8e8e8e8e8e8e8), rs2:x1(0x1717171717171717)
+ TEST_RR_OP(aes64ks2, x16, x16, x1, 0xe8e8e8e8ffffffff, 0xe8e8e8e8e8e8e8e8, 0x1717171717171717, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox64
+ // result rd:x17(0xe9e9e9e9ffffffff), rs1:x15(0xe9e9e9e9e9e9e9e9), rs2:x31(0x1616161616161616)
+ TEST_RR_OP(aes64ks2, x17, x15, x31, 0xe9e9e9e9ffffffff, 0xe9e9e9e9e9e9e9e9, 0x1616161616161616, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox64
+ // result rd:x18(0xeaeaeaeaffffffff), rs1:x14(0xeaeaeaeaeaeaeaea), rs2:x30(0x1515151515151515)
+ TEST_RR_OP(aes64ks2, x18, x14, x30, 0xeaeaeaeaffffffff, 0xeaeaeaeaeaeaeaea, 0x1515151515151515, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox64
+ // result rd:x19(0xebebebebffffffff), rs1:x13(0xebebebebebebebeb), rs2:x29(0x1414141414141414)
+ TEST_RR_OP(aes64ks2, x19, x13, x29, 0xebebebebffffffff, 0xebebebebebebebeb, 0x1414141414141414, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox64
+ // result rd:x20(0xececececffffffff), rs1:x12(0xecececececececec), rs2:x28(0x1313131313131313)
+ TEST_RR_OP(aes64ks2, x20, x12, x28, 0xececececffffffff, 0xecececececececec, 0x1313131313131313, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox64
+ // result rd:x21(0xededededffffffff), rs1:x11(0xedededededededed), rs2:x27(0x1212121212121212)
+ TEST_RR_OP(aes64ks2, x21, x11, x27, 0xededededffffffff, 0xedededededededed, 0x1212121212121212, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox64
+ // result rd:x22(0xeeeeeeeeffffffff), rs1:x10(0xeeeeeeeeeeeeeeee), rs2:x26(0x1111111111111111)
+ TEST_RR_OP(aes64ks2, x22, x10, x26, 0xeeeeeeeeffffffff, 0xeeeeeeeeeeeeeeee, 0x1111111111111111, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox64
+ // result rd:x23(0xefefefefffffffff), rs1:x9(0xefefefefefefefef), rs2:x25(0x1010101010101010)
+ TEST_RR_OP(aes64ks2, x23, x9, x25, 0xefefefefffffffff, 0xefefefefefefefef, 0x1010101010101010, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox64
+ // result rd:x24(0xf0f0f0f0ffffffff), rs1:x8(0xf0f0f0f0f0f0f0f0), rs2:x24(0x0f0f0f0f0f0f0f0f)
+ TEST_RR_OP(aes64ks2, x24, x8, x24, 0xf0f0f0f0ffffffff, 0xf0f0f0f0f0f0f0f0, 0xf0f0f0f0f0f0f0f, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox64
+ // result rd:x25(0xf1f1f1f1ffffffff), rs1:x7(0xf1f1f1f1f1f1f1f1), rs2:x23(0x0e0e0e0e0e0e0e0e)
+ TEST_RR_OP(aes64ks2, x25, x7, x23, 0xf1f1f1f1ffffffff, 0xf1f1f1f1f1f1f1f1, 0xe0e0e0e0e0e0e0e, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox64
+ // result rd:x26(0xf2f2f2f2ffffffff), rs1:x6(0xf2f2f2f2f2f2f2f2), rs2:x22(0x0d0d0d0d0d0d0d0d)
+ TEST_RR_OP(aes64ks2, x26, x6, x22, 0xf2f2f2f2ffffffff, 0xf2f2f2f2f2f2f2f2, 0xd0d0d0d0d0d0d0d, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox64
+ // result rd:x27(0xf3f3f3f3ffffffff), rs1:x5(0xf3f3f3f3f3f3f3f3), rs2:x21(0x0c0c0c0c0c0c0c0c)
+ TEST_RR_OP(aes64ks2, x27, x5, x21, 0xf3f3f3f3ffffffff, 0xf3f3f3f3f3f3f3f3, 0xc0c0c0c0c0c0c0c, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox64
+ // result rd:x28(0xf4f4f4f4ffffffff), rs1:x4(0xf4f4f4f4f4f4f4f4), rs2:x20(0x0b0b0b0b0b0b0b0b)
+ TEST_RR_OP(aes64ks2, x28, x4, x20, 0xf4f4f4f4ffffffff, 0xf4f4f4f4f4f4f4f4, 0xb0b0b0b0b0b0b0b, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox64
+ // result rd:x29(0xf5f5f5f5ffffffff), rs1:x3(0xf5f5f5f5f5f5f5f5), rs2:x19(0x0a0a0a0a0a0a0a0a)
+ TEST_RR_OP(aes64ks2, x29, x3, x19, 0xf5f5f5f5ffffffff, 0xf5f5f5f5f5f5f5f5, 0xa0a0a0a0a0a0a0a, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox64
+ // result rd:x30(0xf6f6f6f6ffffffff), rs1:x2(0xf6f6f6f6f6f6f6f6), rs2:x18(0x0909090909090909)
+ TEST_RR_OP(aes64ks2, x30, x2, x18, 0xf6f6f6f6ffffffff, 0xf6f6f6f6f6f6f6f6, 0x909090909090909, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox64
+ // result rd:x31(0xf7f7f7f7ffffffff), rs1:x1(0xf7f7f7f7f7f7f7f7), rs2:x17(0x0808080808080808)
+ TEST_RR_OP(aes64ks2, x31, x1, x17, 0xf7f7f7f7ffffffff, 0xf7f7f7f7f7f7f7f7, 0x808080808080808, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox64
+ // result rd:x1(0xf8f8f8f8ffffffff), rs1:x31(0xf8f8f8f8f8f8f8f8), rs2:x16(0x0707070707070707)
+ TEST_RR_OP(aes64ks2, x1, x31, x16, 0xf8f8f8f8ffffffff, 0xf8f8f8f8f8f8f8f8, 0x707070707070707, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox64
+ // result rd:x2(0xf9f9f9f9ffffffff), rs1:x30(0xf9f9f9f9f9f9f9f9), rs2:x15(0x0606060606060606)
+ TEST_RR_OP(aes64ks2, x2, x30, x15, 0xf9f9f9f9ffffffff, 0xf9f9f9f9f9f9f9f9, 0x606060606060606, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox64
+ // result rd:x3(0xfafafafaffffffff), rs1:x29(0xfafafafafafafafa), rs2:x14(0x0505050505050505)
+ TEST_RR_OP(aes64ks2, x3, x29, x14, 0xfafafafaffffffff, 0xfafafafafafafafa, 0x505050505050505, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox64
+ // result rd:x4(0xfbfbfbfbffffffff), rs1:x28(0xfbfbfbfbfbfbfbfb), rs2:x13(0x0404040404040404)
+ TEST_RR_OP(aes64ks2, x4, x28, x13, 0xfbfbfbfbffffffff, 0xfbfbfbfbfbfbfbfb, 0x404040404040404, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox64
+ // result rd:x5(0xfcfcfcfcffffffff), rs1:x27(0xfcfcfcfcfcfcfcfc), rs2:x12(0x0303030303030303)
+ TEST_RR_OP(aes64ks2, x5, x27, x12, 0xfcfcfcfcffffffff, 0xfcfcfcfcfcfcfcfc, 0x303030303030303, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox64
+ // result rd:x6(0xfdfdfdfdffffffff), rs1:x26(0xfdfdfdfdfdfdfdfd), rs2:x11(0x0202020202020202)
+ TEST_RR_OP(aes64ks2, x6, x26, x11, 0xfdfdfdfdffffffff, 0xfdfdfdfdfdfdfdfd, 0x202020202020202, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox64
+ // result rd:x7(0xfefefefeffffffff), rs1:x25(0xfefefefefefefefe), rs2:x10(0x0101010101010101)
+ TEST_RR_OP(aes64ks2, x7, x25, x10, 0xfefefefeffffffff, 0xfefefefefefefefe, 0x101010101010101, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox64
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xffffffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(aes64ks2, x8, x24, x9, 0xffffffffffffffff, 0xffffffffffffffff, 0x0, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/ANDN-01.S b/riscof/suite/rv64i_m/K_unratified/ANDN-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..ff657c5754d9ec6bc6af5292a1c12094159333d9
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/ANDN-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test ANDN-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'andn'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",andn)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",andn)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",andn)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x008005a9ade01194), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(andn, x1, x31, x16, 0x008005a9ade01194, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x080048e05282ae80), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(andn, x2, x30, x15, 0x080048e05282ae80, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x49008b008881083b), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(andn, x3, x29, x14, 0x49008b008881083b, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x0440000808400408), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(andn, x4, x28, x13, 0x0440000808400408, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x0080410004154240), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(andn, x5, x27, x12, 0x0080410004154240, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x44490814108200a0), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(andn, x6, x26, x11, 0x44490814108200a0, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x42a806c4a1126000), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(andn, x7, x25, x10, 0x42a806c4a1126000, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x0292607a501a5240), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(andn, x8, x24, x9, 0x0292607a501a5240, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x4084a0182400001a), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(andn, x9, x23, x8, 0x4084a0182400001a, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xcf02000012118c22), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(andn, x10, x22, x7, 0xcf02000012118c22, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(andn, x11, x21, x6, 0x0000000000000000, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(andn, x12, x20, x5, 0x0000000000000000, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(andn, x13, x19, x4, 0x0000000000000000, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(andn, x14, x18, x3, 0x0000000000000000, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(andn, x15, x17, x2, 0x0000000000000000, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(andn, x16, x16, x1, 0x0000000000000000, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(andn, x17, x15, x31, 0x0000000000000000, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(andn, x18, x14, x30, 0x0000000000000000, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(andn, x19, x13, x29, 0x0000000000000000, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(andn, x20, x12, x28, 0x0000000000000000, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(andn, x21, x11, x27, 0x0000000000000000, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(andn, x22, x10, x26, 0x0000000000000000, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(andn, x23, x9, x25, 0x0000000000000000, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(andn, x24, x8, x24, 0x0000000000000000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(andn, x25, x7, x23, 0x0000000000000000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(andn, x26, x6, x22, 0x0000000000000000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(andn, x27, x5, x21, 0x0000000000000000, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(andn, x28, x4, x20, 0x0000000000000000, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(andn, x29, x3, x19, 0x0000000000000000, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(andn, x30, x2, x18, 0x0000000000000000, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(andn, x31, x1, x17, 0x0000000000000000, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(andn, x1, x31, x16, 0x0000000000000000, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(andn, x2, x30, x15, 0x0000000000000000, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(andn, x3, x29, x14, 0x0000000000000000, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(andn, x4, x28, x13, 0x0000000000000000, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(andn, x5, x27, x12, 0x0000000000000000, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(andn, x6, x26, x11, 0x0000000000000000, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(andn, x7, x25, x10, 0x0000000000000000, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(andn, x8, x24, x9, 0x0000000000000000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(andn, x9, x23, x8, 0x0000000000000000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(andn, x10, x22, x7, 0x0000000000000000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(andn, x11, x21, x6, 0x0000000000000000, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000100000000), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(andn, x12, x20, x5, 0x0000000100000000, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(andn, x13, x19, x4, 0x0000000000000000, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(andn, x14, x18, x3, 0x0000000000000000, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(andn, x15, x17, x2, 0x0000000000000000, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(andn, x16, x16, x1, 0x0000000000000000, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(andn, x17, x15, x31, 0x0000000000000000, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(andn, x18, x14, x30, 0x0000000000000000, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(andn, x19, x13, x29, 0x0000000000000000, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(andn, x20, x12, x28, 0x0000000000000000, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(andn, x21, x11, x27, 0x0000000000000000, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(andn, x22, x10, x26, 0x0000000000000000, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(andn, x23, x9, x25, 0x0000000000000000, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(andn, x24, x8, x24, 0x0000000000000000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(andn, x25, x7, x23, 0x0000000000000000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(andn, x26, x6, x22, 0x0000000000000000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(andn, x27, x5, x21, 0x0000000000000000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(andn, x28, x4, x20, 0x0000000000000000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(andn, x29, x3, x19, 0x0000000000000000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(andn, x30, x2, x18, 0x0000000000000000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(andn, x31, x1, x17, 0x0000000000000000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(andn, x1, x31, x16, 0x0000000000000000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(andn, x2, x30, x15, 0x0000000000000000, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(andn, x3, x29, x14, 0x0000000000000000, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(andn, x4, x28, x13, 0x0000000000000000, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(andn, x5, x27, x12, 0x0000000000000000, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(andn, x6, x26, x11, 0x0000000000000000, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(andn, x7, x25, x10, 0x0000000000000000, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(andn, x8, x24, x9, 0x0000000000000000, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(andn, x9, x23, x8, 0x0000000000000000, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(andn, x10, x22, x7, 0x0000000000000000, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(andn, x11, x21, x6, 0x0000000000000000, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(andn, x12, x20, x5, 0x0000000000000000, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(andn, x13, x19, x4, 0x0000000000000000, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffffffffe), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(andn, x14, x18, x3, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x7ffffffffffffffd), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(andn, x15, x17, x2, 0x7ffffffffffffffd, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xbffffffffffffffb), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(andn, x16, x16, x1, 0xbffffffffffffffb, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xdffffffffffffff7), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(andn, x17, x15, x31, 0xdffffffffffffff7, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xefffffffffffffef), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(andn, x18, x14, x30, 0xefffffffffffffef, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xf7ffffffffffffdf), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(andn, x19, x13, x29, 0xf7ffffffffffffdf, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xfbffffffffffffbf), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(andn, x20, x12, x28, 0xfbffffffffffffbf, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xfdffffffffffff7f), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(andn, x21, x11, x27, 0xfdffffffffffff7f, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xfefffffffffffeff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(andn, x22, x10, x26, 0xfefffffffffffeff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xff7ffffffffffdff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(andn, x23, x9, x25, 0xff7ffffffffffdff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xffbffffffffffbff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(andn, x24, x8, x24, 0xffbffffffffffbff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xffdffffffffff7ff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(andn, x25, x7, x23, 0xffdffffffffff7ff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xffefffffffffefff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(andn, x26, x6, x22, 0xffefffffffffefff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xfff7ffffffffdfff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(andn, x27, x5, x21, 0xfff7ffffffffdfff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xfffbffffffffbfff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(andn, x28, x4, x20, 0xfffbffffffffbfff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xfffdffffffff7fff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(andn, x29, x3, x19, 0xfffdffffffff7fff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xfffefffffffeffff), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(andn, x30, x2, x18, 0xfffefffffffeffff, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xffff7ffffffdffff), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(andn, x31, x1, x17, 0xffff7ffffffdffff, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xffffbffffffbffff), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(andn, x1, x31, x16, 0xffffbffffffbffff, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xffffdffffff7ffff), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(andn, x2, x30, x15, 0xffffdffffff7ffff, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xffffefffffefffff), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(andn, x3, x29, x14, 0xffffefffffefffff, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xfffff7ffffdfffff), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(andn, x4, x28, x13, 0xfffff7ffffdfffff, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xfffffbffffbfffff), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(andn, x5, x27, x12, 0xfffffbffffbfffff, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xfffffdffff7fffff), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(andn, x6, x26, x11, 0xfffffdffff7fffff, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xfffffefffeffffff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(andn, x7, x25, x10, 0xfffffefffeffffff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xffffff7ffdffffff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(andn, x8, x24, x9, 0xffffff7ffdffffff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xffffffbffbffffff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(andn, x9, x23, x8, 0xffffffbffbffffff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xffffffdff7ffffff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(andn, x10, x22, x7, 0xffffffdff7ffffff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffffefefffffff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(andn, x11, x21, x6, 0xffffffefefffffff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xfffffff7dfffffff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(andn, x12, x20, x5, 0xfffffff7dfffffff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xfffffffbbfffffff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(andn, x13, x19, x4, 0xfffffffbbfffffff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xfffffffd7fffffff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(andn, x14, x18, x3, 0xfffffffd7fffffff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xfffffffeffffffff), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(andn, x15, x17, x2, 0xfffffffeffffffff, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xfffffffd7fffffff), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(andn, x16, x16, x1, 0xfffffffd7fffffff, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfffffffbbfffffff), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(andn, x17, x15, x31, 0xfffffffbbfffffff, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfffffff7dfffffff), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(andn, x18, x14, x30, 0xfffffff7dfffffff, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffefefffffff), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(andn, x19, x13, x29, 0xffffffefefffffff, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffdff7ffffff), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(andn, x20, x12, x28, 0xffffffdff7ffffff, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffbffbffffff), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(andn, x21, x11, x27, 0xffffffbffbffffff, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffff7ffdffffff), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(andn, x22, x10, x26, 0xffffff7ffdffffff, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xfffffefffeffffff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(andn, x23, x9, x25, 0xfffffefffeffffff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xfffffdffff7fffff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(andn, x24, x8, x24, 0xfffffdffff7fffff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfffffbffffbfffff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(andn, x25, x7, x23, 0xfffffbffffbfffff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfffff7ffffdfffff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(andn, x26, x6, x22, 0xfffff7ffffdfffff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffefffffefffff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(andn, x27, x5, x21, 0xffffefffffefffff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffdffffff7ffff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(andn, x28, x4, x20, 0xffffdffffff7ffff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffbffffffbffff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(andn, x29, x3, x19, 0xffffbffffffbffff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffff7ffffffdffff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(andn, x30, x2, x18, 0xffff7ffffffdffff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xfffefffffffeffff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(andn, x31, x1, x17, 0xfffefffffffeffff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xfffdffffffff7fff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(andn, x1, x31, x16, 0xfffdffffffff7fff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffbffffffffbfff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(andn, x2, x30, x15, 0xfffbffffffffbfff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfff7ffffffffdfff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(andn, x3, x29, x14, 0xfff7ffffffffdfff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffefffffffffefff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(andn, x4, x28, x13, 0xffefffffffffefff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffdffffffffff7ff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(andn, x5, x27, x12, 0xffdffffffffff7ff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffbffffffffffbff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(andn, x6, x26, x11, 0xffbffffffffffbff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xff7ffffffffffdff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(andn, x7, x25, x10, 0xff7ffffffffffdff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xfefffffffffffeff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(andn, x8, x24, x9, 0xfefffffffffffeff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xfdffffffffffff7f), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(andn, x9, x23, x8, 0xfdffffffffffff7f, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfbffffffffffffbf), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(andn, x10, x22, x7, 0xfbffffffffffffbf, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xf7ffffffffffffdf), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(andn, x11, x21, x6, 0xf7ffffffffffffdf, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xefffffffffffffef), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(andn, x12, x20, x5, 0xefffffffffffffef, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xdffffffffffffff7), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(andn, x13, x19, x4, 0xdffffffffffffff7, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xbffffffffffffffb), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(andn, x14, x18, x3, 0xbffffffffffffffb, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x7ffffffffffffffd), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(andn, x15, x17, x2, 0x7ffffffffffffffd, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xfffffffffffffffe), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(andn, x16, x16, x1, 0xfffffffffffffffe, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000001), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(andn, x17, x15, x31, 0x0000000000000001, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000002), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(andn, x18, x14, x30, 0x0000000000000002, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000004), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(andn, x19, x13, x29, 0x0000000000000004, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000008), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(andn, x20, x12, x28, 0x0000000000000008, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000010), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(andn, x21, x11, x27, 0x0000000000000010, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000020), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(andn, x22, x10, x26, 0x0000000000000020, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000040), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(andn, x23, x9, x25, 0x0000000000000040, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000080), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(andn, x24, x8, x24, 0x0000000000000080, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000100), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(andn, x25, x7, x23, 0x0000000000000100, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000200), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(andn, x26, x6, x22, 0x0000000000000200, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000400), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(andn, x27, x5, x21, 0x0000000000000400, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000800), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(andn, x28, x4, x20, 0x0000000000000800, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000001000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(andn, x29, x3, x19, 0x0000000000001000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000002000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(andn, x30, x2, x18, 0x0000000000002000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000004000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(andn, x31, x1, x17, 0x0000000000004000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000008000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(andn, x1, x31, x16, 0x0000000000008000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000010000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(andn, x2, x30, x15, 0x0000000000010000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000020000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(andn, x3, x29, x14, 0x0000000000020000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000040000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(andn, x4, x28, x13, 0x0000000000040000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000080000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(andn, x5, x27, x12, 0x0000000000080000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000100000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(andn, x6, x26, x11, 0x0000000000100000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000200000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(andn, x7, x25, x10, 0x0000000000200000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000400000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(andn, x8, x24, x9, 0x0000000000400000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000800000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(andn, x9, x23, x8, 0x0000000000800000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000001000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(andn, x10, x22, x7, 0x0000000001000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000002000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(andn, x11, x21, x6, 0x0000000002000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000004000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(andn, x12, x20, x5, 0x0000000004000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000008000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(andn, x13, x19, x4, 0x0000000008000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000010000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(andn, x14, x18, x3, 0x0000000010000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000020000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(andn, x15, x17, x2, 0x0000000020000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000040000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(andn, x16, x16, x1, 0x0000000040000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000080000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(andn, x17, x15, x31, 0x0000000080000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000100000000), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(andn, x18, x14, x30, 0x0000000100000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000200000000), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(andn, x19, x13, x29, 0x0000000200000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000400000000), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(andn, x20, x12, x28, 0x0000000400000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000800000000), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(andn, x21, x11, x27, 0x0000000800000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000001000000000), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(andn, x22, x10, x26, 0x0000001000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000002000000000), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(andn, x23, x9, x25, 0x0000002000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000004000000000), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(andn, x24, x8, x24, 0x0000004000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000008000000000), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(andn, x25, x7, x23, 0x0000008000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000010000000000), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(andn, x26, x6, x22, 0x0000010000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000020000000000), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(andn, x27, x5, x21, 0x0000020000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000040000000000), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(andn, x28, x4, x20, 0x0000040000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000080000000000), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(andn, x29, x3, x19, 0x0000080000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000100000000000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(andn, x30, x2, x18, 0x0000100000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000200000000000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(andn, x31, x1, x17, 0x0000200000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000400000000000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(andn, x1, x31, x16, 0x0000400000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000800000000000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(andn, x2, x30, x15, 0x0000800000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0001000000000000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(andn, x3, x29, x14, 0x0001000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0002000000000000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(andn, x4, x28, x13, 0x0002000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0004000000000000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(andn, x5, x27, x12, 0x0004000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0008000000000000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(andn, x6, x26, x11, 0x0008000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0010000000000000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(andn, x7, x25, x10, 0x0010000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0020000000000000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(andn, x8, x24, x9, 0x0020000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0040000000000000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(andn, x9, x23, x8, 0x0040000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0080000000000000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(andn, x10, x22, x7, 0x0080000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0100000000000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(andn, x11, x21, x6, 0x0100000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0200000000000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(andn, x12, x20, x5, 0x0200000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0400000000000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(andn, x13, x19, x4, 0x0400000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0800000000000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(andn, x14, x18, x3, 0x0800000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x1000000000000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(andn, x15, x17, x2, 0x1000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x2000000000000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(andn, x16, x16, x1, 0x2000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x4000000000000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(andn, x17, x15, x31, 0x4000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x8000000000000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(andn, x18, x14, x30, 0x8000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(andn, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffffffffe), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(andn, x20, x12, x28, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xfffffffffffffffd), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(andn, x21, x11, x27, 0xfffffffffffffffd, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffffffb), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(andn, x22, x10, x26, 0xfffffffffffffffb, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffffff7), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(andn, x23, x9, x25, 0xfffffffffffffff7, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffef), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(andn, x24, x8, x24, 0xffffffffffffffef, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffdf), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(andn, x25, x7, x23, 0xffffffffffffffdf, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffbf), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(andn, x26, x6, x22, 0xffffffffffffffbf, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffff7f), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(andn, x27, x5, x21, 0xffffffffffffff7f, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffffeff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(andn, x28, x4, x20, 0xfffffffffffffeff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xfffffffffffffdff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(andn, x29, x3, x19, 0xfffffffffffffdff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffffbff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(andn, x30, x2, x18, 0xfffffffffffffbff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffff7ff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(andn, x31, x1, x17, 0xfffffffffffff7ff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffefff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(andn, x1, x31, x16, 0xffffffffffffefff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffdfff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(andn, x2, x30, x15, 0xffffffffffffdfff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffbfff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(andn, x3, x29, x14, 0xffffffffffffbfff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffff7fff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(andn, x4, x28, x13, 0xffffffffffff7fff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffffeffff), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(andn, x5, x27, x12, 0xfffffffffffeffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffffdffff), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(andn, x6, x26, x11, 0xfffffffffffdffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffffbffff), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(andn, x7, x25, x10, 0xfffffffffffbffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffff7ffff), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(andn, x8, x24, x9, 0xfffffffffff7ffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffefffff), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(andn, x9, x23, x8, 0xffffffffffefffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffdfffff), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(andn, x10, x22, x7, 0xffffffffffdfffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffbfffff), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(andn, x11, x21, x6, 0xffffffffffbfffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffffffff7fffff), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(andn, x12, x20, x5, 0xffffffffff7fffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xfffffffffeffffff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(andn, x13, x19, x4, 0xfffffffffeffffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffdffffff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(andn, x14, x18, x3, 0xfffffffffdffffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffbffffff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(andn, x15, x17, x2, 0xfffffffffbffffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xfffffffff7ffffff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(andn, x16, x16, x1, 0xfffffffff7ffffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffffefffffff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(andn, x17, x15, x31, 0xffffffffefffffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffffdfffffff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(andn, x18, x14, x30, 0xffffffffdfffffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffffbfffffff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(andn, x19, x13, x29, 0xffffffffbfffffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xffffffff7fffffff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(andn, x20, x12, x28, 0xffffffff7fffffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xfffffffeffffffff), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(andn, x21, x11, x27, 0xfffffffeffffffff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xfffffffdffffffff), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(andn, x22, x10, x26, 0xfffffffdffffffff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xfffffffbffffffff), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(andn, x23, x9, x25, 0xfffffffbffffffff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xfffffff7ffffffff), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(andn, x24, x8, x24, 0xfffffff7ffffffff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xffffffefffffffff), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(andn, x25, x7, x23, 0xffffffefffffffff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xffffffdfffffffff), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(andn, x26, x6, x22, 0xffffffdfffffffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xffffffbfffffffff), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(andn, x27, x5, x21, 0xffffffbfffffffff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xffffff7fffffffff), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(andn, x28, x4, x20, 0xffffff7fffffffff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xfffffeffffffffff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(andn, x29, x3, x19, 0xfffffeffffffffff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xfffffdffffffffff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(andn, x30, x2, x18, 0xfffffdffffffffff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xfffffbffffffffff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(andn, x31, x1, x17, 0xfffffbffffffffff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xfffff7ffffffffff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(andn, x1, x31, x16, 0xfffff7ffffffffff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffffefffffffffff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(andn, x2, x30, x15, 0xffffefffffffffff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffffdfffffffffff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(andn, x3, x29, x14, 0xffffdfffffffffff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xffffbfffffffffff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(andn, x4, x28, x13, 0xffffbfffffffffff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xffff7fffffffffff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(andn, x5, x27, x12, 0xffff7fffffffffff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xfffeffffffffffff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(andn, x6, x26, x11, 0xfffeffffffffffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xfffdffffffffffff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(andn, x7, x25, x10, 0xfffdffffffffffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xfffbffffffffffff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(andn, x8, x24, x9, 0xfffbffffffffffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xfff7ffffffffffff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(andn, x9, x23, x8, 0xfff7ffffffffffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffefffffffffffff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(andn, x10, x22, x7, 0xffefffffffffffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffdfffffffffffff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(andn, x11, x21, x6, 0xffdfffffffffffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xffbfffffffffffff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(andn, x12, x20, x5, 0xffbfffffffffffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xff7fffffffffffff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(andn, x13, x19, x4, 0xff7fffffffffffff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xfeffffffffffffff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(andn, x14, x18, x3, 0xfeffffffffffffff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xfdffffffffffffff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(andn, x15, x17, x2, 0xfdffffffffffffff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xfbffffffffffffff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(andn, x16, x16, x1, 0xfbffffffffffffff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xf7ffffffffffffff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(andn, x17, x15, x31, 0xf7ffffffffffffff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xefffffffffffffff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(andn, x18, x14, x30, 0xefffffffffffffff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xdfffffffffffffff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(andn, x19, x13, x29, 0xdfffffffffffffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xbfffffffffffffff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(andn, x20, x12, x28, 0xbfffffffffffffff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x7fffffffffffffff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(andn, x21, x11, x27, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(andn, x22, x10, x26, 0xffffffffffffffff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x0000000000000000), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(andn, x23, x25, x25, 0x0000000000000000, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(andn, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xc9649f05a8e1a8bb), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(andn, x25, x7, x0, 0xc9649f05a8e1a8bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(andn, x26, x0, x22, 0x0000000000000000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/CLMUL-01.S b/riscof/suite/rv64i_m/K_unratified/CLMUL-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..cc777d24db4f5e4a13a759c37a9502b91d7130cc
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/CLMUL-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test CLMUL-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'clmul'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",clmul)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",clmul)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",clmul)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x4158d0b31156fc1f), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(clmul, x1, x31, x16, 0x4158d0b31156fc1f, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x37d11d4118b8791b), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(clmul, x2, x30, x15, 0x37d11d4118b8791b, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x9cfab0e5acbe9540), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(clmul, x3, x29, x14, 0x9cfab0e5acbe9540, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x4fa718af378b221d), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(clmul, x4, x28, x13, 0x4fa718af378b221d, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xffab8fef45f9b3f5), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(clmul, x5, x27, x12, 0xffab8fef45f9b3f5, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xffab8fef45f9b3f5), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(clmul, x6, x26, x11, 0xffab8fef45f9b3f5, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x4fa718af378b221d), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(clmul, x7, x25, x10, 0x4fa718af378b221d, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x9cfab0e5acbe9540), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(clmul, x8, x24, x9, 0x9cfab0e5acbe9540, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x37d11d4118b8791b), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(clmul, x9, x23, x8, 0x37d11d4118b8791b, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x4158d0b31156fc1f), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(clmul, x10, x22, x7, 0x4158d0b31156fc1f, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(clmul, x11, x21, x6, 0xffffffffffffffff, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0xfffffffffffffffe), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(clmul, x12, x20, x5, 0xfffffffffffffffe, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0xfffffffffffffffc), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(clmul, x13, x19, x4, 0xfffffffffffffffc, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffffffff8), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(clmul, x14, x18, x3, 0xfffffffffffffff8, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffffffff0), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(clmul, x15, x17, x2, 0xfffffffffffffff0, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffe0), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(clmul, x16, x16, x1, 0xffffffffffffffe0, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffc0), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(clmul, x17, x15, x31, 0xffffffffffffffc0, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffff80), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(clmul, x18, x14, x30, 0xffffffffffffff80, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffff00), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(clmul, x19, x13, x29, 0xffffffffffffff00, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffffffe00), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(clmul, x20, x12, x28, 0xfffffffffffffe00, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0xfffffffffffffc00), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(clmul, x21, x11, x27, 0xfffffffffffffc00, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffff800), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(clmul, x22, x10, x26, 0xfffffffffffff800, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffff000), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(clmul, x23, x9, x25, 0xfffffffffffff000, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffe000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(clmul, x24, x8, x24, 0xffffffffffffe000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffc000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(clmul, x25, x7, x23, 0xffffffffffffc000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffff8000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(clmul, x26, x6, x22, 0xffffffffffff8000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffff0000), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(clmul, x27, x5, x21, 0xffffffffffff0000, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffe0000), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(clmul, x28, x4, x20, 0xfffffffffffe0000, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0xfffffffffffc0000), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(clmul, x29, x3, x19, 0xfffffffffffc0000, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffff80000), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(clmul, x30, x2, x18, 0xfffffffffff80000, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffff00000), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(clmul, x31, x1, x17, 0xfffffffffff00000, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffe00000), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(clmul, x1, x31, x16, 0xffffffffffe00000, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffc00000), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(clmul, x2, x30, x15, 0xffffffffffc00000, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0xffffffffff800000), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(clmul, x3, x29, x14, 0xffffffffff800000, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0xffffffffff000000), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(clmul, x4, x28, x13, 0xffffffffff000000, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffe000000), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(clmul, x5, x27, x12, 0xfffffffffe000000, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffc000000), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(clmul, x6, x26, x11, 0xfffffffffc000000, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xfffffffff8000000), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(clmul, x7, x25, x10, 0xfffffffff8000000, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0xfffffffff0000000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(clmul, x8, x24, x9, 0xfffffffff0000000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0xffffffffe0000000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(clmul, x9, x23, x8, 0xffffffffe0000000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0xffffffffc0000000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(clmul, x10, x22, x7, 0xffffffffc0000000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0xffffffff80000000), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(clmul, x11, x21, x6, 0xffffffff80000000, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0xffffffff00000000), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(clmul, x12, x20, x5, 0xffffffff00000000, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xfffffffe00000000), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(clmul, x13, x19, x4, 0xfffffffe00000000, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xfffffffc00000000), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(clmul, x14, x18, x3, 0xfffffffc00000000, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xfffffff800000000), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(clmul, x15, x17, x2, 0xfffffff800000000, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xfffffff000000000), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(clmul, x16, x16, x1, 0xfffffff000000000, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xffffffe000000000), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(clmul, x17, x15, x31, 0xffffffe000000000, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xffffffc000000000), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(clmul, x18, x14, x30, 0xffffffc000000000, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xffffff8000000000), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(clmul, x19, x13, x29, 0xffffff8000000000, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xffffff0000000000), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(clmul, x20, x12, x28, 0xffffff0000000000, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xfffffe0000000000), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(clmul, x21, x11, x27, 0xfffffe0000000000, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xfffffc0000000000), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(clmul, x22, x10, x26, 0xfffffc0000000000, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xfffff80000000000), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(clmul, x23, x9, x25, 0xfffff80000000000, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xfffff00000000000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(clmul, x24, x8, x24, 0xfffff00000000000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xffffe00000000000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(clmul, x25, x7, x23, 0xffffe00000000000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xffffc00000000000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(clmul, x26, x6, x22, 0xffffc00000000000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xffff800000000000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(clmul, x27, x5, x21, 0xffff800000000000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xffff000000000000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(clmul, x28, x4, x20, 0xffff000000000000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xfffe000000000000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(clmul, x29, x3, x19, 0xfffe000000000000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xfffc000000000000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(clmul, x30, x2, x18, 0xfffc000000000000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xfff8000000000000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(clmul, x31, x1, x17, 0xfff8000000000000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xfff0000000000000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(clmul, x1, x31, x16, 0xfff0000000000000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xffe0000000000000), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(clmul, x2, x30, x15, 0xffe0000000000000, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xffc0000000000000), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(clmul, x3, x29, x14, 0xffc0000000000000, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xff80000000000000), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(clmul, x4, x28, x13, 0xff80000000000000, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xff00000000000000), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(clmul, x5, x27, x12, 0xff00000000000000, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xfe00000000000000), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(clmul, x6, x26, x11, 0xfe00000000000000, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xfc00000000000000), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(clmul, x7, x25, x10, 0xfc00000000000000, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xf800000000000000), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(clmul, x8, x24, x9, 0xf800000000000000, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xf000000000000000), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(clmul, x9, x23, x8, 0xf000000000000000, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xe000000000000000), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(clmul, x10, x22, x7, 0xe000000000000000, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xc000000000000000), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(clmul, x11, x21, x6, 0xc000000000000000, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x8000000000000000), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(clmul, x12, x20, x5, 0x8000000000000000, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(clmul, x13, x19, x4, 0x0000000000000000, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(clmul, x14, x18, x3, 0x0000000000000000, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x8000000000000000), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(clmul, x15, x17, x2, 0x8000000000000000, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xc000000000000000), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(clmul, x16, x16, x1, 0xc000000000000000, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xe000000000000000), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(clmul, x17, x15, x31, 0xe000000000000000, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xf000000000000000), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(clmul, x18, x14, x30, 0xf000000000000000, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xf800000000000000), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(clmul, x19, x13, x29, 0xf800000000000000, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xfc00000000000000), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(clmul, x20, x12, x28, 0xfc00000000000000, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xfe00000000000000), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(clmul, x21, x11, x27, 0xfe00000000000000, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xff00000000000000), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(clmul, x22, x10, x26, 0xff00000000000000, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xff80000000000000), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(clmul, x23, x9, x25, 0xff80000000000000, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xffc0000000000000), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(clmul, x24, x8, x24, 0xffc0000000000000, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xffe0000000000000), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(clmul, x25, x7, x23, 0xffe0000000000000, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xfff0000000000000), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(clmul, x26, x6, x22, 0xfff0000000000000, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xfff8000000000000), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(clmul, x27, x5, x21, 0xfff8000000000000, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xfffc000000000000), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(clmul, x28, x4, x20, 0xfffc000000000000, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xfffe000000000000), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(clmul, x29, x3, x19, 0xfffe000000000000, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xffff000000000000), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(clmul, x30, x2, x18, 0xffff000000000000, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xffff800000000000), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(clmul, x31, x1, x17, 0xffff800000000000, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xffffc00000000000), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(clmul, x1, x31, x16, 0xffffc00000000000, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xffffe00000000000), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(clmul, x2, x30, x15, 0xffffe00000000000, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xfffff00000000000), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(clmul, x3, x29, x14, 0xfffff00000000000, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xfffff80000000000), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(clmul, x4, x28, x13, 0xfffff80000000000, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xfffffc0000000000), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(clmul, x5, x27, x12, 0xfffffc0000000000, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xfffffe0000000000), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(clmul, x6, x26, x11, 0xfffffe0000000000, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xffffff0000000000), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(clmul, x7, x25, x10, 0xffffff0000000000, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xffffff8000000000), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(clmul, x8, x24, x9, 0xffffff8000000000, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xffffffc000000000), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(clmul, x9, x23, x8, 0xffffffc000000000, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xffffffe000000000), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(clmul, x10, x22, x7, 0xffffffe000000000, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xfffffff000000000), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(clmul, x11, x21, x6, 0xfffffff000000000, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xfffffff800000000), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(clmul, x12, x20, x5, 0xfffffff800000000, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xfffffffc00000000), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(clmul, x13, x19, x4, 0xfffffffc00000000, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xfffffffe00000000), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(clmul, x14, x18, x3, 0xfffffffe00000000, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xffffffff00000000), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(clmul, x15, x17, x2, 0xffffffff00000000, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xffffffff80000000), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(clmul, x16, x16, x1, 0xffffffff80000000, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xffffffffc0000000), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(clmul, x17, x15, x31, 0xffffffffc0000000, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xffffffffe0000000), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(clmul, x18, x14, x30, 0xffffffffe0000000, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfffffffff0000000), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(clmul, x19, x13, x29, 0xfffffffff0000000, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xfffffffff8000000), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(clmul, x20, x12, x28, 0xfffffffff8000000, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xfffffffffc000000), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(clmul, x21, x11, x27, 0xfffffffffc000000, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffe000000), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(clmul, x22, x10, x26, 0xfffffffffe000000, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffffff000000), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(clmul, x23, x9, x25, 0xffffffffff000000, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffffffff800000), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(clmul, x24, x8, x24, 0xffffffffff800000, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffc00000), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(clmul, x25, x7, x23, 0xffffffffffc00000, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffe00000), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(clmul, x26, x6, x22, 0xffffffffffe00000, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xfffffffffff00000), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(clmul, x27, x5, x21, 0xfffffffffff00000, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffff80000), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(clmul, x28, x4, x20, 0xfffffffffff80000, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xfffffffffffc0000), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(clmul, x29, x3, x19, 0xfffffffffffc0000, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffe0000), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(clmul, x30, x2, x18, 0xfffffffffffe0000, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffff0000), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(clmul, x31, x1, x17, 0xffffffffffff0000, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffff8000), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(clmul, x1, x31, x16, 0xffffffffffff8000, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffc000), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(clmul, x2, x30, x15, 0xffffffffffffc000, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffe000), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(clmul, x3, x29, x14, 0xffffffffffffe000, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfffffffffffff000), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(clmul, x4, x28, x13, 0xfffffffffffff000, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffffff800), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(clmul, x5, x27, x12, 0xfffffffffffff800, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffffffc00), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(clmul, x6, x26, x11, 0xfffffffffffffc00, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffffffe00), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(clmul, x7, x25, x10, 0xfffffffffffffe00, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffff00), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(clmul, x8, x24, x9, 0xffffffffffffff00, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffff80), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(clmul, x9, x23, x8, 0xffffffffffffff80, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffc0), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(clmul, x10, x22, x7, 0xffffffffffffffc0, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffe0), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(clmul, x11, x21, x6, 0xffffffffffffffe0, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xfffffffffffffff0), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(clmul, x12, x20, x5, 0xfffffffffffffff0, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xfffffffffffffff8), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(clmul, x13, x19, x4, 0xfffffffffffffff8, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffffffffc), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(clmul, x14, x18, x3, 0xfffffffffffffffc, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffffffffe), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(clmul, x15, x17, x2, 0xfffffffffffffffe, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(clmul, x16, x16, x1, 0xffffffffffffffff, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(clmul, x17, x15, x31, 0x0000000000000000, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(clmul, x18, x14, x30, 0x0000000000000000, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(clmul, x19, x13, x29, 0x0000000000000000, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(clmul, x20, x12, x28, 0x0000000000000000, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(clmul, x21, x11, x27, 0x0000000000000000, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(clmul, x22, x10, x26, 0x0000000000000000, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(clmul, x23, x9, x25, 0x0000000000000000, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(clmul, x24, x8, x24, 0x0000000000000000, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(clmul, x25, x7, x23, 0x0000000000000000, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(clmul, x26, x6, x22, 0x0000000000000000, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(clmul, x27, x5, x21, 0x0000000000000000, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(clmul, x28, x4, x20, 0x0000000000000000, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(clmul, x29, x3, x19, 0x0000000000000000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(clmul, x30, x2, x18, 0x0000000000000000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(clmul, x31, x1, x17, 0x0000000000000000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(clmul, x1, x31, x16, 0x0000000000000000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(clmul, x2, x30, x15, 0x0000000000000000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(clmul, x3, x29, x14, 0x0000000000000000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(clmul, x4, x28, x13, 0x0000000000000000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(clmul, x5, x27, x12, 0x0000000000000000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(clmul, x6, x26, x11, 0x0000000000000000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(clmul, x7, x25, x10, 0x0000000000000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(clmul, x8, x24, x9, 0x0000000000000000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(clmul, x9, x23, x8, 0x0000000000000000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(clmul, x10, x22, x7, 0x0000000000000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(clmul, x11, x21, x6, 0x0000000000000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(clmul, x12, x20, x5, 0x0000000000000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(clmul, x13, x19, x4, 0x0000000000000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(clmul, x14, x18, x3, 0x0000000000000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(clmul, x15, x17, x2, 0x0000000000000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(clmul, x16, x16, x1, 0x0000000000000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(clmul, x17, x15, x31, 0x0000000000000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(clmul, x18, x14, x30, 0x0000000000000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(clmul, x19, x13, x29, 0x0000000000000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(clmul, x20, x12, x28, 0x0000000000000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(clmul, x21, x11, x27, 0x0000000000000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(clmul, x22, x10, x26, 0x0000000000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(clmul, x23, x9, x25, 0x0000000000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(clmul, x24, x8, x24, 0x0000000000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(clmul, x25, x7, x23, 0x0000000000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(clmul, x26, x6, x22, 0x0000000000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(clmul, x27, x5, x21, 0x0000000000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(clmul, x28, x4, x20, 0x0000000000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(clmul, x29, x3, x19, 0x0000000000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(clmul, x30, x2, x18, 0x0000000000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(clmul, x31, x1, x17, 0x0000000000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(clmul, x1, x31, x16, 0x0000000000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(clmul, x2, x30, x15, 0x0000000000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(clmul, x3, x29, x14, 0x0000000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(clmul, x4, x28, x13, 0x0000000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(clmul, x5, x27, x12, 0x0000000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(clmul, x6, x26, x11, 0x0000000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(clmul, x7, x25, x10, 0x0000000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(clmul, x8, x24, x9, 0x0000000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(clmul, x9, x23, x8, 0x0000000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(clmul, x10, x22, x7, 0x0000000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(clmul, x11, x21, x6, 0x0000000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(clmul, x12, x20, x5, 0x0000000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(clmul, x13, x19, x4, 0x0000000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(clmul, x14, x18, x3, 0x0000000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(clmul, x15, x17, x2, 0x0000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(clmul, x16, x16, x1, 0x0000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(clmul, x17, x15, x31, 0x0000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(clmul, x18, x14, x30, 0x0000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(clmul, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(clmul, x20, x12, x28, 0x0000000000000000, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(clmul, x21, x11, x27, 0x0000000000000000, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(clmul, x22, x10, x26, 0x0000000000000000, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(clmul, x23, x9, x25, 0x0000000000000000, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(clmul, x24, x8, x24, 0x0000000000000000, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(clmul, x25, x7, x23, 0x0000000000000000, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(clmul, x26, x6, x22, 0x0000000000000000, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(clmul, x27, x5, x21, 0x0000000000000000, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(clmul, x28, x4, x20, 0x0000000000000000, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(clmul, x29, x3, x19, 0x0000000000000000, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(clmul, x30, x2, x18, 0x0000000000000000, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(clmul, x31, x1, x17, 0x0000000000000000, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(clmul, x1, x31, x16, 0x0000000000000000, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(clmul, x2, x30, x15, 0x0000000000000000, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(clmul, x3, x29, x14, 0x0000000000000000, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(clmul, x4, x28, x13, 0x0000000000000000, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(clmul, x5, x27, x12, 0x0000000000000000, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(clmul, x6, x26, x11, 0x0000000000000000, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(clmul, x7, x25, x10, 0x0000000000000000, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(clmul, x8, x24, x9, 0x0000000000000000, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(clmul, x9, x23, x8, 0x0000000000000000, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(clmul, x10, x22, x7, 0x0000000000000000, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(clmul, x11, x21, x6, 0x0000000000000000, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(clmul, x12, x20, x5, 0x0000000000000000, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(clmul, x13, x19, x4, 0x0000000000000000, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(clmul, x14, x18, x3, 0x0000000000000000, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(clmul, x15, x17, x2, 0x0000000000000000, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(clmul, x16, x16, x1, 0x0000000000000000, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(clmul, x17, x15, x31, 0x0000000000000000, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(clmul, x18, x14, x30, 0x0000000000000000, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(clmul, x19, x13, x29, 0x0000000000000000, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(clmul, x20, x12, x28, 0x0000000000000000, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(clmul, x21, x11, x27, 0x0000000000000000, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(clmul, x22, x10, x26, 0x0000000000000000, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(clmul, x23, x9, x25, 0x0000000000000000, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(clmul, x24, x8, x24, 0x0000000000000000, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(clmul, x25, x7, x23, 0x0000000000000000, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(clmul, x26, x6, x22, 0x0000000000000000, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(clmul, x27, x5, x21, 0x0000000000000000, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(clmul, x28, x4, x20, 0x0000000000000000, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(clmul, x29, x3, x19, 0x0000000000000000, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(clmul, x30, x2, x18, 0x0000000000000000, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(clmul, x31, x1, x17, 0x0000000000000000, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(clmul, x1, x31, x16, 0x0000000000000000, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(clmul, x2, x30, x15, 0x0000000000000000, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(clmul, x3, x29, x14, 0x0000000000000000, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(clmul, x4, x28, x13, 0x0000000000000000, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(clmul, x5, x27, x12, 0x0000000000000000, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(clmul, x6, x26, x11, 0x0000000000000000, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(clmul, x7, x25, x10, 0x0000000000000000, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(clmul, x8, x24, x9, 0x0000000000000000, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(clmul, x9, x23, x8, 0x0000000000000000, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(clmul, x10, x22, x7, 0x0000000000000000, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(clmul, x11, x21, x6, 0x0000000000000000, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(clmul, x12, x20, x5, 0x0000000000000000, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(clmul, x13, x19, x4, 0x0000000000000000, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(clmul, x14, x18, x3, 0x0000000000000000, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(clmul, x15, x17, x2, 0x0000000000000000, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(clmul, x16, x16, x1, 0x0000000000000000, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(clmul, x17, x15, x31, 0x0000000000000000, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(clmul, x18, x14, x30, 0x0000000000000000, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(clmul, x19, x13, x29, 0x0000000000000000, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(clmul, x20, x12, x28, 0x0000000000000000, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(clmul, x21, x11, x27, 0x0000000000000000, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(clmul, x22, x10, x26, 0x0000000000000000, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x0104014550500405), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(clmul, x23, x25, x25, 0x0104014550500405, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(clmul, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x0000000000000000), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(clmul, x25, x7, x0, 0x0000000000000000, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(clmul, x26, x0, x22, 0x0000000000000000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/CLMULH-01.S b/riscof/suite/rv64i_m/K_unratified/CLMULH-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..86a95152ab771a5926e9fd0d991e40ec9a1e5073
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/CLMULH-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test CLMULH-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'clmulh'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",clmulh)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",clmulh)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",clmulh)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x0dbcc1bf2c8ef9fe), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x0dbcc1bf2c8ef9fe, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x6fae1a6f5949a08c), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x6fae1a6f5949a08c, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x656144b050e5dd35), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x656144b050e5dd35, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x08ee2eeaf280313a), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x08ee2eeaf280313a, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x0566b47765bb7522), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x0566b47765bb7522, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x0566b47765bb7522), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x0566b47765bb7522, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x08ee2eeaf280313a), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x08ee2eeaf280313a, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x656144b050e5dd35), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x656144b050e5dd35, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x6fae1a6f5949a08c), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x6fae1a6f5949a08c, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x0dbcc1bf2c8ef9fe), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x0dbcc1bf2c8ef9fe, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x0000000000000000, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x0000000000000000, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000002), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x0000000000000002, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000006), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x0000000000000006, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x000000000000000e), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x000000000000000e, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x000000000000001e), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x000000000000001e, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x000000000000003e), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x000000000000003e, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x000000000000007e), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x000000000000007e, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x00000000000000fe), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(clmulh, x19, x13, x29, 0x00000000000000fe, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x00000000000001fe), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(clmulh, x20, x12, x28, 0x00000000000001fe, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x00000000000003fe), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(clmulh, x21, x11, x27, 0x00000000000003fe, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x00000000000007fe), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(clmulh, x22, x10, x26, 0x00000000000007fe, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000ffe), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(clmulh, x23, x9, x25, 0x0000000000000ffe, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000001ffe), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(clmulh, x24, x8, x24, 0x0000000000001ffe, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000000003ffe), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(clmulh, x25, x7, x23, 0x0000000000003ffe, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000007ffe), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(clmulh, x26, x6, x22, 0x0000000000007ffe, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x000000000000fffe), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(clmulh, x27, x5, x21, 0x000000000000fffe, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x000000000001fffe), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(clmulh, x28, x4, x20, 0x000000000001fffe, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x000000000003fffe), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(clmulh, x29, x3, x19, 0x000000000003fffe, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x000000000007fffe), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(clmulh, x30, x2, x18, 0x000000000007fffe, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x00000000000ffffe), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(clmulh, x31, x1, x17, 0x00000000000ffffe, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x00000000001ffffe), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x00000000001ffffe, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x00000000003ffffe), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x00000000003ffffe, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x00000000007ffffe), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x00000000007ffffe, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000000fffffe), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x0000000000fffffe, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000001fffffe), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x0000000001fffffe, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000003fffffe), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x0000000003fffffe, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000007fffffe), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x0000000007fffffe, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x000000000ffffffe), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x000000000ffffffe, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x000000001ffffffe), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x000000001ffffffe, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x000000003ffffffe), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x000000003ffffffe, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x000000007ffffffe), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x000000007ffffffe, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x00000000fffffffe), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x00000000fffffffe, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x00000001fffffffe), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x00000001fffffffe, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x00000003fffffffe), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x00000003fffffffe, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x00000007fffffffe), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x00000007fffffffe, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000ffffffffe), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x0000000ffffffffe, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000001ffffffffe), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x0000001ffffffffe, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000003ffffffffe), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x0000003ffffffffe, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000007ffffffffe), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(clmulh, x19, x13, x29, 0x0000007ffffffffe, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x000000fffffffffe), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(clmulh, x20, x12, x28, 0x000000fffffffffe, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x000001fffffffffe), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(clmulh, x21, x11, x27, 0x000001fffffffffe, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x000003fffffffffe), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(clmulh, x22, x10, x26, 0x000003fffffffffe, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x000007fffffffffe), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(clmulh, x23, x9, x25, 0x000007fffffffffe, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x00000ffffffffffe), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(clmulh, x24, x8, x24, 0x00000ffffffffffe, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x00001ffffffffffe), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(clmulh, x25, x7, x23, 0x00001ffffffffffe, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x00003ffffffffffe), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(clmulh, x26, x6, x22, 0x00003ffffffffffe, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x00007ffffffffffe), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(clmulh, x27, x5, x21, 0x00007ffffffffffe, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000fffffffffffe), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(clmulh, x28, x4, x20, 0x0000fffffffffffe, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0001fffffffffffe), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(clmulh, x29, x3, x19, 0x0001fffffffffffe, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0003fffffffffffe), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(clmulh, x30, x2, x18, 0x0003fffffffffffe, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0007fffffffffffe), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(clmulh, x31, x1, x17, 0x0007fffffffffffe, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x000ffffffffffffe), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x000ffffffffffffe, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x001ffffffffffffe), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x001ffffffffffffe, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x003ffffffffffffe), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x003ffffffffffffe, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x007ffffffffffffe), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x007ffffffffffffe, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x00fffffffffffffe), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x00fffffffffffffe, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x01fffffffffffffe), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x01fffffffffffffe, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x03fffffffffffffe), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x03fffffffffffffe, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x07fffffffffffffe), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x07fffffffffffffe, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0ffffffffffffffe), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x0ffffffffffffffe, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x1ffffffffffffffe), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x1ffffffffffffffe, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x3ffffffffffffffe), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x3ffffffffffffffe, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x7ffffffffffffffe), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x7ffffffffffffffe, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x0000000000000000, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x0000000000000000, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x7ffffffffffffffe), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x7ffffffffffffffe, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x3ffffffffffffffe), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x3ffffffffffffffe, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x1ffffffffffffffe), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x1ffffffffffffffe, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x0ffffffffffffffe), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x0ffffffffffffffe, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x07fffffffffffffe), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(clmulh, x19, x13, x29, 0x07fffffffffffffe, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x03fffffffffffffe), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(clmulh, x20, x12, x28, 0x03fffffffffffffe, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x01fffffffffffffe), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(clmulh, x21, x11, x27, 0x01fffffffffffffe, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00fffffffffffffe), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(clmulh, x22, x10, x26, 0x00fffffffffffffe, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x007ffffffffffffe), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(clmulh, x23, x9, x25, 0x007ffffffffffffe, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x003ffffffffffffe), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(clmulh, x24, x8, x24, 0x003ffffffffffffe, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x001ffffffffffffe), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(clmulh, x25, x7, x23, 0x001ffffffffffffe, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x000ffffffffffffe), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(clmulh, x26, x6, x22, 0x000ffffffffffffe, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x0007fffffffffffe), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(clmulh, x27, x5, x21, 0x0007fffffffffffe, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x0003fffffffffffe), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(clmulh, x28, x4, x20, 0x0003fffffffffffe, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x0001fffffffffffe), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(clmulh, x29, x3, x19, 0x0001fffffffffffe, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x0000fffffffffffe), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(clmulh, x30, x2, x18, 0x0000fffffffffffe, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00007ffffffffffe), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(clmulh, x31, x1, x17, 0x00007ffffffffffe, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00003ffffffffffe), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x00003ffffffffffe, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00001ffffffffffe), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x00001ffffffffffe, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000ffffffffffe), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x00000ffffffffffe, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x000007fffffffffe), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x000007fffffffffe, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x000003fffffffffe), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x000003fffffffffe, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x000001fffffffffe), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x000001fffffffffe, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x000000fffffffffe), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x000000fffffffffe, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x0000007ffffffffe), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x0000007ffffffffe, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x0000003ffffffffe), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x0000003ffffffffe, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x0000001ffffffffe), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x0000001ffffffffe, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x0000000ffffffffe), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x0000000ffffffffe, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000007fffffffe), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x00000007fffffffe, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000003fffffffe), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x00000003fffffffe, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000001fffffffe), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x00000001fffffffe, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000fffffffe), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x00000000fffffffe, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x000000007ffffffe), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x000000007ffffffe, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x000000003ffffffe), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x000000003ffffffe, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x000000001ffffffe), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x000000001ffffffe, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x000000000ffffffe), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(clmulh, x19, x13, x29, 0x000000000ffffffe, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x0000000007fffffe), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(clmulh, x20, x12, x28, 0x0000000007fffffe, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x0000000003fffffe), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(clmulh, x21, x11, x27, 0x0000000003fffffe, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x0000000001fffffe), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(clmulh, x22, x10, x26, 0x0000000001fffffe, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x0000000000fffffe), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(clmulh, x23, x9, x25, 0x0000000000fffffe, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000000007ffffe), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(clmulh, x24, x8, x24, 0x00000000007ffffe, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x00000000003ffffe), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(clmulh, x25, x7, x23, 0x00000000003ffffe, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x00000000001ffffe), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(clmulh, x26, x6, x22, 0x00000000001ffffe, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x00000000000ffffe), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(clmulh, x27, x5, x21, 0x00000000000ffffe, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x000000000007fffe), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(clmulh, x28, x4, x20, 0x000000000007fffe, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x000000000003fffe), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(clmulh, x29, x3, x19, 0x000000000003fffe, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x000000000001fffe), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(clmulh, x30, x2, x18, 0x000000000001fffe, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x000000000000fffe), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(clmulh, x31, x1, x17, 0x000000000000fffe, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x0000000000007ffe), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x0000000000007ffe, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x0000000000003ffe), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x0000000000003ffe, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x0000000000001ffe), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x0000000000001ffe, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000ffe), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x0000000000000ffe, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x00000000000007fe), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x00000000000007fe, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x00000000000003fe), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x00000000000003fe, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x00000000000001fe), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x00000000000001fe, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x00000000000000fe), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x00000000000000fe, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x000000000000007e), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x000000000000007e, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x000000000000003e), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x000000000000003e, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x000000000000001e), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x000000000000001e, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x000000000000000e), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x000000000000000e, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000006), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x0000000000000006, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000002), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x0000000000000002, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x0000000000000000, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x0000000000000000, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x0000000000000000, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x0000000000000000, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(clmulh, x19, x13, x29, 0x0000000000000000, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(clmulh, x20, x12, x28, 0x0000000000000000, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(clmulh, x21, x11, x27, 0x0000000000000000, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(clmulh, x22, x10, x26, 0x0000000000000000, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(clmulh, x23, x9, x25, 0x0000000000000000, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(clmulh, x24, x8, x24, 0x0000000000000000, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(clmulh, x25, x7, x23, 0x0000000000000000, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(clmulh, x26, x6, x22, 0x0000000000000000, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(clmulh, x27, x5, x21, 0x0000000000000000, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(clmulh, x28, x4, x20, 0x0000000000000000, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(clmulh, x29, x3, x19, 0x0000000000000000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(clmulh, x30, x2, x18, 0x0000000000000000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(clmulh, x31, x1, x17, 0x0000000000000000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x0000000000000000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x0000000000000000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x0000000000000000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x0000000000000000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x0000000000000000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x0000000000000000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x0000000000000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x0000000000000000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x0000000000000000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x0000000000000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x0000000000000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x0000000000000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x0000000000000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x0000000000000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x0000000000000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x0000000000000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x0000000000000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x0000000000000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(clmulh, x19, x13, x29, 0x0000000000000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(clmulh, x20, x12, x28, 0x0000000000000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(clmulh, x21, x11, x27, 0x0000000000000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(clmulh, x22, x10, x26, 0x0000000000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(clmulh, x23, x9, x25, 0x0000000000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(clmulh, x24, x8, x24, 0x0000000000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(clmulh, x25, x7, x23, 0x0000000000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(clmulh, x26, x6, x22, 0x0000000000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(clmulh, x27, x5, x21, 0x0000000000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(clmulh, x28, x4, x20, 0x0000000000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(clmulh, x29, x3, x19, 0x0000000000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(clmulh, x30, x2, x18, 0x0000000000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(clmulh, x31, x1, x17, 0x0000000000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x0000000000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x0000000000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x0000000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x0000000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x0000000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x0000000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x0000000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x0000000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x0000000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x0000000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x0000000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x0000000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x0000000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x0000000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x0000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x0000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x0000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x0000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(clmulh, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(clmulh, x20, x12, x28, 0x0000000000000000, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(clmulh, x21, x11, x27, 0x0000000000000000, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(clmulh, x22, x10, x26, 0x0000000000000000, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(clmulh, x23, x9, x25, 0x0000000000000000, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(clmulh, x24, x8, x24, 0x0000000000000000, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(clmulh, x25, x7, x23, 0x0000000000000000, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(clmulh, x26, x6, x22, 0x0000000000000000, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(clmulh, x27, x5, x21, 0x0000000000000000, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(clmulh, x28, x4, x20, 0x0000000000000000, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(clmulh, x29, x3, x19, 0x0000000000000000, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(clmulh, x30, x2, x18, 0x0000000000000000, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(clmulh, x31, x1, x17, 0x0000000000000000, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x0000000000000000, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x0000000000000000, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x0000000000000000, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x0000000000000000, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x0000000000000000, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x0000000000000000, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x0000000000000000, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x0000000000000000, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x0000000000000000, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x0000000000000000, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x0000000000000000, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x0000000000000000, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x0000000000000000, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x0000000000000000, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x0000000000000000, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x0000000000000000, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x0000000000000000, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x0000000000000000, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(clmulh, x19, x13, x29, 0x0000000000000000, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(clmulh, x20, x12, x28, 0x0000000000000000, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(clmulh, x21, x11, x27, 0x0000000000000000, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(clmulh, x22, x10, x26, 0x0000000000000000, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(clmulh, x23, x9, x25, 0x0000000000000000, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(clmulh, x24, x8, x24, 0x0000000000000000, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(clmulh, x25, x7, x23, 0x0000000000000000, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(clmulh, x26, x6, x22, 0x0000000000000000, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(clmulh, x27, x5, x21, 0x0000000000000000, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(clmulh, x28, x4, x20, 0x0000000000000000, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(clmulh, x29, x3, x19, 0x0000000000000000, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(clmulh, x30, x2, x18, 0x0000000000000000, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(clmulh, x31, x1, x17, 0x0000000000000000, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(clmulh, x1, x31, x16, 0x0000000000000000, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(clmulh, x2, x30, x15, 0x0000000000000000, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(clmulh, x3, x29, x14, 0x0000000000000000, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(clmulh, x4, x28, x13, 0x0000000000000000, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(clmulh, x5, x27, x12, 0x0000000000000000, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(clmulh, x6, x26, x11, 0x0000000000000000, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(clmulh, x7, x25, x10, 0x0000000000000000, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(clmulh, x8, x24, x9, 0x0000000000000000, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(clmulh, x9, x23, x8, 0x0000000000000000, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(clmulh, x10, x22, x7, 0x0000000000000000, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(clmulh, x11, x21, x6, 0x0000000000000000, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(clmulh, x12, x20, x5, 0x0000000000000000, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(clmulh, x13, x19, x4, 0x0000000000000000, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(clmulh, x14, x18, x3, 0x0000000000000000, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(clmulh, x15, x17, x2, 0x0000000000000000, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(clmulh, x16, x16, x1, 0x0000000000000000, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(clmulh, x17, x15, x31, 0x0000000000000000, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(clmulh, x18, x14, x30, 0x0000000000000000, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(clmulh, x19, x13, x29, 0x0000000000000000, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(clmulh, x20, x12, x28, 0x0000000000000000, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(clmulh, x21, x11, x27, 0x0000000000000000, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(clmulh, x22, x10, x26, 0x0000000000000000, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x5155155505401010), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(clmulh, x23, x25, x25, 0x5155155505401010, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(clmulh, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x0000000000000000), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(clmulh, x25, x7, x0, 0x0000000000000000, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(clmulh, x26, x0, x22, 0x0000000000000000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/ORN-01.S b/riscof/suite/rv64i_m/K_unratified/ORN-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..fb28056bd120dc0c3c4d9e8ce22c6dba0b353f15
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/ORN-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test ORN-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'orn'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",orn)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",orn)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",orn)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x30fdffffedee73dd), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(orn, x1, x31, x16, 0x30fdffffedee73dd, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xbf7b5fe7dbffffe5), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(orn, x2, x30, x15, 0xbf7b5fe7dbffffe5, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xfd6d9f85afe5adbf), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(orn, x3, x29, x14, 0xfd6d9f85afe5adbf, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xbd57f93b5eed9fff), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(orn, x4, x28, x13, 0xbd57f93b5eed9fff, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xbbb6f7ebef7dff5f), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(orn, x5, x27, x12, 0xbbb6f7ebef7dff5f, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xff7fbefffbeabdbf), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(orn, x6, x26, x11, 0xff7fbefffbeabdbf, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xfbbffff7f7bffbf7), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(orn, x7, x25, x10, 0xfbbffff7f7bffbf7, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xb6ff74ff777ef7c4), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(orn, x8, x24, x9, 0xb6ff74ff777ef7c4, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xf7ffb71fad7d517f), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(orn, x9, x23, x8, 0xf7ffb71fad7d517f, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xff7ffa56521fee6b), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(orn, x10, x22, x7, 0xff7ffa56521fee6b, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000001), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(orn, x11, x21, x6, 0x0000000000000001, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x8000000000000002), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(orn, x12, x20, x5, 0x8000000000000002, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x4000000000000004), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(orn, x13, x19, x4, 0x4000000000000004, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x2000000000000008), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(orn, x14, x18, x3, 0x2000000000000008, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x1000000000000010), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(orn, x15, x17, x2, 0x1000000000000010, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0800000000000020), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(orn, x16, x16, x1, 0x0800000000000020, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0400000000000040), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(orn, x17, x15, x31, 0x0400000000000040, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0200000000000080), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(orn, x18, x14, x30, 0x0200000000000080, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0100000000000100), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(orn, x19, x13, x29, 0x0100000000000100, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0080000000000200), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(orn, x20, x12, x28, 0x0080000000000200, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0040000000000400), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(orn, x21, x11, x27, 0x0040000000000400, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0020000000000800), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(orn, x22, x10, x26, 0x0020000000000800, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0010000000001000), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(orn, x23, x9, x25, 0x0010000000001000, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0008000000002000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(orn, x24, x8, x24, 0x0008000000002000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0004000000004000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(orn, x25, x7, x23, 0x0004000000004000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0002000000008000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(orn, x26, x6, x22, 0x0002000000008000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0001000000010000), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(orn, x27, x5, x21, 0x0001000000010000, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000800000020000), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(orn, x28, x4, x20, 0x0000800000020000, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000400000040000), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(orn, x29, x3, x19, 0x0000400000040000, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000200000080000), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(orn, x30, x2, x18, 0x0000200000080000, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000100000100000), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(orn, x31, x1, x17, 0x0000100000100000, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000080000200000), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(orn, x1, x31, x16, 0x0000080000200000, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000040000400000), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(orn, x2, x30, x15, 0x0000040000400000, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000020000800000), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(orn, x3, x29, x14, 0x0000020000800000, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000010001000000), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(orn, x4, x28, x13, 0x0000010001000000, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000008002000000), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(orn, x5, x27, x12, 0x0000008002000000, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000004004000000), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(orn, x6, x26, x11, 0x0000004004000000, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000002008000000), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(orn, x7, x25, x10, 0x0000002008000000, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000001010000000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(orn, x8, x24, x9, 0x0000001010000000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000820000000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(orn, x9, x23, x8, 0x0000000820000000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000440000000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(orn, x10, x22, x7, 0x0000000440000000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000280000000), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(orn, x11, x21, x6, 0x0000000280000000, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000100000000), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(orn, x12, x20, x5, 0x0000000100000000, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000280000000), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(orn, x13, x19, x4, 0x0000000280000000, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000440000000), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(orn, x14, x18, x3, 0x0000000440000000, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000820000000), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(orn, x15, x17, x2, 0x0000000820000000, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000001010000000), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(orn, x16, x16, x1, 0x0000001010000000, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000002008000000), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(orn, x17, x15, x31, 0x0000002008000000, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000004004000000), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(orn, x18, x14, x30, 0x0000004004000000, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000008002000000), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(orn, x19, x13, x29, 0x0000008002000000, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000010001000000), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(orn, x20, x12, x28, 0x0000010001000000, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000020000800000), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(orn, x21, x11, x27, 0x0000020000800000, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000040000400000), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(orn, x22, x10, x26, 0x0000040000400000, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000080000200000), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(orn, x23, x9, x25, 0x0000080000200000, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000100000100000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(orn, x24, x8, x24, 0x0000100000100000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000200000080000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(orn, x25, x7, x23, 0x0000200000080000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000400000040000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(orn, x26, x6, x22, 0x0000400000040000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000800000020000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(orn, x27, x5, x21, 0x0000800000020000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0001000000010000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(orn, x28, x4, x20, 0x0001000000010000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0002000000008000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(orn, x29, x3, x19, 0x0002000000008000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0004000000004000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(orn, x30, x2, x18, 0x0004000000004000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0008000000002000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(orn, x31, x1, x17, 0x0008000000002000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0010000000001000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(orn, x1, x31, x16, 0x0010000000001000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0020000000000800), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(orn, x2, x30, x15, 0x0020000000000800, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0040000000000400), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(orn, x3, x29, x14, 0x0040000000000400, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0080000000000200), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(orn, x4, x28, x13, 0x0080000000000200, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0100000000000100), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(orn, x5, x27, x12, 0x0100000000000100, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0200000000000080), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(orn, x6, x26, x11, 0x0200000000000080, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0400000000000040), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(orn, x7, x25, x10, 0x0400000000000040, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0800000000000020), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(orn, x8, x24, x9, 0x0800000000000020, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x1000000000000010), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(orn, x9, x23, x8, 0x1000000000000010, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x2000000000000008), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(orn, x10, x22, x7, 0x2000000000000008, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x4000000000000004), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(orn, x11, x21, x6, 0x4000000000000004, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x8000000000000002), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(orn, x12, x20, x5, 0x8000000000000002, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000001), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(orn, x13, x19, x4, 0x0000000000000001, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(orn, x14, x18, x3, 0xffffffffffffffff, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(orn, x15, x17, x2, 0xffffffffffffffff, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(orn, x16, x16, x1, 0xffffffffffffffff, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(orn, x17, x15, x31, 0xffffffffffffffff, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(orn, x18, x14, x30, 0xffffffffffffffff, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(orn, x19, x13, x29, 0xffffffffffffffff, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(orn, x20, x12, x28, 0xffffffffffffffff, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(orn, x21, x11, x27, 0xffffffffffffffff, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(orn, x22, x10, x26, 0xffffffffffffffff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(orn, x23, x9, x25, 0xffffffffffffffff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(orn, x24, x8, x24, 0xffffffffffffffff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(orn, x25, x7, x23, 0xffffffffffffffff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(orn, x26, x6, x22, 0xffffffffffffffff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(orn, x27, x5, x21, 0xffffffffffffffff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(orn, x28, x4, x20, 0xffffffffffffffff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(orn, x29, x3, x19, 0xffffffffffffffff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(orn, x30, x2, x18, 0xffffffffffffffff, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(orn, x31, x1, x17, 0xffffffffffffffff, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(orn, x1, x31, x16, 0xffffffffffffffff, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(orn, x2, x30, x15, 0xffffffffffffffff, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(orn, x3, x29, x14, 0xffffffffffffffff, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(orn, x4, x28, x13, 0xffffffffffffffff, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(orn, x5, x27, x12, 0xffffffffffffffff, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(orn, x6, x26, x11, 0xffffffffffffffff, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(orn, x7, x25, x10, 0xffffffffffffffff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(orn, x8, x24, x9, 0xffffffffffffffff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(orn, x9, x23, x8, 0xffffffffffffffff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(orn, x10, x22, x7, 0xffffffffffffffff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(orn, x11, x21, x6, 0xffffffffffffffff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(orn, x12, x20, x5, 0xffffffffffffffff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(orn, x13, x19, x4, 0xffffffffffffffff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(orn, x14, x18, x3, 0xffffffffffffffff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xfffffffeffffffff), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(orn, x15, x17, x2, 0xfffffffeffffffff, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(orn, x16, x16, x1, 0xffffffffffffffff, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(orn, x17, x15, x31, 0xffffffffffffffff, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(orn, x18, x14, x30, 0xffffffffffffffff, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(orn, x19, x13, x29, 0xffffffffffffffff, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(orn, x20, x12, x28, 0xffffffffffffffff, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(orn, x21, x11, x27, 0xffffffffffffffff, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(orn, x22, x10, x26, 0xffffffffffffffff, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(orn, x23, x9, x25, 0xffffffffffffffff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(orn, x24, x8, x24, 0xffffffffffffffff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(orn, x25, x7, x23, 0xffffffffffffffff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(orn, x26, x6, x22, 0xffffffffffffffff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(orn, x27, x5, x21, 0xffffffffffffffff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(orn, x28, x4, x20, 0xffffffffffffffff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(orn, x29, x3, x19, 0xffffffffffffffff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(orn, x30, x2, x18, 0xffffffffffffffff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(orn, x31, x1, x17, 0xffffffffffffffff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(orn, x1, x31, x16, 0xffffffffffffffff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(orn, x2, x30, x15, 0xffffffffffffffff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(orn, x3, x29, x14, 0xffffffffffffffff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(orn, x4, x28, x13, 0xffffffffffffffff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(orn, x5, x27, x12, 0xffffffffffffffff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(orn, x6, x26, x11, 0xffffffffffffffff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(orn, x7, x25, x10, 0xffffffffffffffff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(orn, x8, x24, x9, 0xffffffffffffffff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(orn, x9, x23, x8, 0xffffffffffffffff, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(orn, x10, x22, x7, 0xffffffffffffffff, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(orn, x11, x21, x6, 0xffffffffffffffff, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(orn, x12, x20, x5, 0xffffffffffffffff, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(orn, x13, x19, x4, 0xffffffffffffffff, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(orn, x14, x18, x3, 0xffffffffffffffff, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(orn, x15, x17, x2, 0xffffffffffffffff, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(orn, x16, x16, x1, 0xffffffffffffffff, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(orn, x17, x15, x31, 0xffffffffffffffff, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(orn, x18, x14, x30, 0xffffffffffffffff, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(orn, x19, x13, x29, 0xffffffffffffffff, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(orn, x20, x12, x28, 0xffffffffffffffff, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(orn, x21, x11, x27, 0xffffffffffffffff, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(orn, x22, x10, x26, 0xffffffffffffffff, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(orn, x23, x9, x25, 0xffffffffffffffff, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(orn, x24, x8, x24, 0xffffffffffffffff, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(orn, x25, x7, x23, 0xffffffffffffffff, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(orn, x26, x6, x22, 0xffffffffffffffff, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(orn, x27, x5, x21, 0xffffffffffffffff, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(orn, x28, x4, x20, 0xffffffffffffffff, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(orn, x29, x3, x19, 0xffffffffffffffff, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(orn, x30, x2, x18, 0xffffffffffffffff, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(orn, x31, x1, x17, 0xffffffffffffffff, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(orn, x1, x31, x16, 0xffffffffffffffff, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(orn, x2, x30, x15, 0xffffffffffffffff, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(orn, x3, x29, x14, 0xffffffffffffffff, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(orn, x4, x28, x13, 0xffffffffffffffff, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(orn, x5, x27, x12, 0xffffffffffffffff, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(orn, x6, x26, x11, 0xffffffffffffffff, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(orn, x7, x25, x10, 0xffffffffffffffff, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(orn, x8, x24, x9, 0xffffffffffffffff, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(orn, x9, x23, x8, 0xffffffffffffffff, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(orn, x10, x22, x7, 0xffffffffffffffff, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(orn, x11, x21, x6, 0xffffffffffffffff, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(orn, x12, x20, x5, 0xffffffffffffffff, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(orn, x13, x19, x4, 0xffffffffffffffff, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(orn, x14, x18, x3, 0xffffffffffffffff, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(orn, x15, x17, x2, 0xffffffffffffffff, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(orn, x16, x16, x1, 0xffffffffffffffff, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(orn, x17, x15, x31, 0xffffffffffffffff, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(orn, x18, x14, x30, 0xffffffffffffffff, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(orn, x19, x13, x29, 0xffffffffffffffff, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(orn, x20, x12, x28, 0xffffffffffffffff, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(orn, x21, x11, x27, 0xffffffffffffffff, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(orn, x22, x10, x26, 0xffffffffffffffff, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(orn, x23, x9, x25, 0xffffffffffffffff, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(orn, x24, x8, x24, 0xffffffffffffffff, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(orn, x25, x7, x23, 0xffffffffffffffff, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(orn, x26, x6, x22, 0xffffffffffffffff, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(orn, x27, x5, x21, 0xffffffffffffffff, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(orn, x28, x4, x20, 0xffffffffffffffff, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(orn, x29, x3, x19, 0xffffffffffffffff, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(orn, x30, x2, x18, 0xffffffffffffffff, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(orn, x31, x1, x17, 0xffffffffffffffff, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(orn, x1, x31, x16, 0xffffffffffffffff, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(orn, x2, x30, x15, 0xffffffffffffffff, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(orn, x3, x29, x14, 0xffffffffffffffff, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(orn, x4, x28, x13, 0xffffffffffffffff, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(orn, x5, x27, x12, 0xffffffffffffffff, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(orn, x6, x26, x11, 0xffffffffffffffff, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(orn, x7, x25, x10, 0xffffffffffffffff, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(orn, x8, x24, x9, 0xffffffffffffffff, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(orn, x9, x23, x8, 0xffffffffffffffff, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(orn, x10, x22, x7, 0xffffffffffffffff, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(orn, x11, x21, x6, 0xffffffffffffffff, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(orn, x12, x20, x5, 0xffffffffffffffff, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(orn, x13, x19, x4, 0xffffffffffffffff, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(orn, x14, x18, x3, 0xffffffffffffffff, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(orn, x15, x17, x2, 0xffffffffffffffff, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(orn, x16, x16, x1, 0xffffffffffffffff, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(orn, x17, x15, x31, 0xffffffffffffffff, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(orn, x18, x14, x30, 0xffffffffffffffff, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(orn, x19, x13, x29, 0xffffffffffffffff, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(orn, x20, x12, x28, 0xffffffffffffffff, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(orn, x21, x11, x27, 0xffffffffffffffff, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(orn, x22, x10, x26, 0xffffffffffffffff, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(orn, x23, x9, x25, 0xffffffffffffffff, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(orn, x24, x8, x24, 0xffffffffffffffff, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(orn, x25, x7, x23, 0xffffffffffffffff, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(orn, x26, x6, x22, 0xffffffffffffffff, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(orn, x27, x5, x21, 0xffffffffffffffff, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(orn, x28, x4, x20, 0xffffffffffffffff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(orn, x29, x3, x19, 0xffffffffffffffff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(orn, x30, x2, x18, 0xffffffffffffffff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(orn, x31, x1, x17, 0xffffffffffffffff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(orn, x1, x31, x16, 0xffffffffffffffff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(orn, x2, x30, x15, 0xffffffffffffffff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(orn, x3, x29, x14, 0xffffffffffffffff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(orn, x4, x28, x13, 0xffffffffffffffff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(orn, x5, x27, x12, 0xffffffffffffffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(orn, x6, x26, x11, 0xffffffffffffffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(orn, x7, x25, x10, 0xffffffffffffffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(orn, x8, x24, x9, 0xffffffffffffffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(orn, x9, x23, x8, 0xffffffffffffffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(orn, x10, x22, x7, 0xffffffffffffffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(orn, x11, x21, x6, 0xffffffffffffffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(orn, x12, x20, x5, 0xffffffffffffffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(orn, x13, x19, x4, 0xffffffffffffffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(orn, x14, x18, x3, 0xffffffffffffffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(orn, x15, x17, x2, 0xffffffffffffffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(orn, x16, x16, x1, 0xffffffffffffffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(orn, x17, x15, x31, 0xffffffffffffffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(orn, x18, x14, x30, 0xffffffffffffffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(orn, x19, x13, x29, 0xffffffffffffffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(orn, x20, x12, x28, 0xffffffffffffffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(orn, x21, x11, x27, 0xffffffffffffffff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(orn, x22, x10, x26, 0xffffffffffffffff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(orn, x23, x9, x25, 0xffffffffffffffff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(orn, x24, x8, x24, 0xffffffffffffffff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(orn, x25, x7, x23, 0xffffffffffffffff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(orn, x26, x6, x22, 0xffffffffffffffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(orn, x27, x5, x21, 0xffffffffffffffff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(orn, x28, x4, x20, 0xffffffffffffffff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(orn, x29, x3, x19, 0xffffffffffffffff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(orn, x30, x2, x18, 0xffffffffffffffff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(orn, x31, x1, x17, 0xffffffffffffffff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(orn, x1, x31, x16, 0xffffffffffffffff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(orn, x2, x30, x15, 0xffffffffffffffff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(orn, x3, x29, x14, 0xffffffffffffffff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(orn, x4, x28, x13, 0xffffffffffffffff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(orn, x5, x27, x12, 0xffffffffffffffff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(orn, x6, x26, x11, 0xffffffffffffffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(orn, x7, x25, x10, 0xffffffffffffffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(orn, x8, x24, x9, 0xffffffffffffffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(orn, x9, x23, x8, 0xffffffffffffffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(orn, x10, x22, x7, 0xffffffffffffffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(orn, x11, x21, x6, 0xffffffffffffffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(orn, x12, x20, x5, 0xffffffffffffffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(orn, x13, x19, x4, 0xffffffffffffffff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(orn, x14, x18, x3, 0xffffffffffffffff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(orn, x15, x17, x2, 0xffffffffffffffff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(orn, x16, x16, x1, 0xffffffffffffffff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(orn, x17, x15, x31, 0xffffffffffffffff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(orn, x18, x14, x30, 0xffffffffffffffff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(orn, x19, x13, x29, 0xffffffffffffffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(orn, x20, x12, x28, 0xffffffffffffffff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(orn, x21, x11, x27, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(orn, x22, x10, x26, 0xffffffffffffffff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0xffffffffffffffff), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(orn, x23, x25, x25, 0xffffffffffffffff, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(orn, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(orn, x25, x7, x0, 0xffffffffffffffff, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x8c56d02b1e64043c), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(orn, x26, x0, x22, 0x8c56d02b1e64043c, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/PACK-01.S b/riscof/suite/rv64i_m/K_unratified/PACK-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..f678b5deb851713cf92f9cd22f497f39fed8c0af
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/PACK-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test PACK-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'pack'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",pack)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",pack)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",pack)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x121bcc23adea5195), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(pack, x1, x31, x16, 0x121bcc23adea5195, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xa47d105bd2ffbec1), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(pack, x2, x30, x15, 0xa47d105bd2ffbec1, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x707af2c0a8e1a8bb), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(pack, x3, x29, x14, 0x707af2c0a8e1a8bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xe19bfbc348c99fcb), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(pack, x4, x28, x13, 0xe19bfbc348c99fcb, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x528a10af461d524f), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(pack, x5, x27, x12, 0x528a10af461d524f, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x461d524f528a10af), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(pack, x6, x26, x11, 0x461d524f528a10af, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x48c99fcbe19bfbc3), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(pack, x7, x25, x10, 0x48c99fcbe19bfbc3, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xa8e1a8bb707af2c0), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(pack, x8, x24, x9, 0xa8e1a8bb707af2c0, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xd2ffbec1a47d105b), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(pack, x9, x23, x8, 0xd2ffbec1a47d105b, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xadea5195121bcc23), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(pack, x10, x22, x7, 0xadea5195121bcc23, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0xffffffff00000001), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(pack, x11, x21, x6, 0xffffffff00000001, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0xffffffff00000002), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(pack, x12, x20, x5, 0xffffffff00000002, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0xffffffff00000004), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(pack, x13, x19, x4, 0xffffffff00000004, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0xffffffff00000008), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(pack, x14, x18, x3, 0xffffffff00000008, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0xffffffff00000010), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(pack, x15, x17, x2, 0xffffffff00000010, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0xffffffff00000020), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(pack, x16, x16, x1, 0xffffffff00000020, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0xffffffff00000040), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(pack, x17, x15, x31, 0xffffffff00000040, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xffffffff00000080), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(pack, x18, x14, x30, 0xffffffff00000080, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0xffffffff00000100), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(pack, x19, x13, x29, 0xffffffff00000100, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0xffffffff00000200), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(pack, x20, x12, x28, 0xffffffff00000200, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0xffffffff00000400), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(pack, x21, x11, x27, 0xffffffff00000400, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0xffffffff00000800), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(pack, x22, x10, x26, 0xffffffff00000800, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0xffffffff00001000), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(pack, x23, x9, x25, 0xffffffff00001000, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0xffffffff00002000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(pack, x24, x8, x24, 0xffffffff00002000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0xffffffff00004000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(pack, x25, x7, x23, 0xffffffff00004000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0xffffffff00008000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(pack, x26, x6, x22, 0xffffffff00008000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0xffffffff00010000), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(pack, x27, x5, x21, 0xffffffff00010000, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0xffffffff00020000), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(pack, x28, x4, x20, 0xffffffff00020000, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0xffffffff00040000), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(pack, x29, x3, x19, 0xffffffff00040000, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0xffffffff00080000), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(pack, x30, x2, x18, 0xffffffff00080000, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0xffffffff00100000), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(pack, x31, x1, x17, 0xffffffff00100000, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0xffffffff00200000), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(pack, x1, x31, x16, 0xffffffff00200000, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0xffffffff00400000), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(pack, x2, x30, x15, 0xffffffff00400000, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0xffffffff00800000), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(pack, x3, x29, x14, 0xffffffff00800000, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0xffffffff01000000), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(pack, x4, x28, x13, 0xffffffff01000000, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0xffffffff02000000), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(pack, x5, x27, x12, 0xffffffff02000000, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0xffffffff04000000), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(pack, x6, x26, x11, 0xffffffff04000000, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xffffffff08000000), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(pack, x7, x25, x10, 0xffffffff08000000, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0xffffffff10000000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(pack, x8, x24, x9, 0xffffffff10000000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0xffffffff20000000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(pack, x9, x23, x8, 0xffffffff20000000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0xffffffff40000000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(pack, x10, x22, x7, 0xffffffff40000000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0xffffffff80000000), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(pack, x11, x21, x6, 0xffffffff80000000, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0xffffffff00000000), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(pack, x12, x20, x5, 0xffffffff00000000, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x7fffffff00000000), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(pack, x13, x19, x4, 0x7fffffff00000000, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xbfffffff00000000), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(pack, x14, x18, x3, 0xbfffffff00000000, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xdfffffff00000000), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(pack, x15, x17, x2, 0xdfffffff00000000, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xefffffff00000000), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(pack, x16, x16, x1, 0xefffffff00000000, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xf7ffffff00000000), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(pack, x17, x15, x31, 0xf7ffffff00000000, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xfbffffff00000000), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(pack, x18, x14, x30, 0xfbffffff00000000, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xfdffffff00000000), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(pack, x19, x13, x29, 0xfdffffff00000000, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xfeffffff00000000), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(pack, x20, x12, x28, 0xfeffffff00000000, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xff7fffff00000000), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(pack, x21, x11, x27, 0xff7fffff00000000, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xffbfffff00000000), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(pack, x22, x10, x26, 0xffbfffff00000000, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xffdfffff00000000), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(pack, x23, x9, x25, 0xffdfffff00000000, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xffefffff00000000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(pack, x24, x8, x24, 0xffefffff00000000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xfff7ffff00000000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(pack, x25, x7, x23, 0xfff7ffff00000000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xfffbffff00000000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(pack, x26, x6, x22, 0xfffbffff00000000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xfffdffff00000000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(pack, x27, x5, x21, 0xfffdffff00000000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xfffeffff00000000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(pack, x28, x4, x20, 0xfffeffff00000000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xffff7fff00000000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(pack, x29, x3, x19, 0xffff7fff00000000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xffffbfff00000000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(pack, x30, x2, x18, 0xffffbfff00000000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xffffdfff00000000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(pack, x31, x1, x17, 0xffffdfff00000000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xffffefff00000000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(pack, x1, x31, x16, 0xffffefff00000000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xfffff7ff00000000), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(pack, x2, x30, x15, 0xfffff7ff00000000, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xfffffbff00000000), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(pack, x3, x29, x14, 0xfffffbff00000000, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xfffffdff00000000), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(pack, x4, x28, x13, 0xfffffdff00000000, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xfffffeff00000000), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(pack, x5, x27, x12, 0xfffffeff00000000, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xffffff7f00000000), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(pack, x6, x26, x11, 0xffffff7f00000000, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xffffffbf00000000), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(pack, x7, x25, x10, 0xffffffbf00000000, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xffffffdf00000000), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(pack, x8, x24, x9, 0xffffffdf00000000, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xffffffef00000000), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(pack, x9, x23, x8, 0xffffffef00000000, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xfffffff700000000), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(pack, x10, x22, x7, 0xfffffff700000000, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xfffffffb00000000), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(pack, x11, x21, x6, 0xfffffffb00000000, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xfffffffd00000000), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(pack, x12, x20, x5, 0xfffffffd00000000, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xfffffffe00000000), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(pack, x13, x19, x4, 0xfffffffe00000000, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x00000000fffffffe), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(pack, x14, x18, x3, 0x00000000fffffffe, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000000fffffffd), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(pack, x15, x17, x2, 0x00000000fffffffd, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000000fffffffb), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(pack, x16, x16, x1, 0x00000000fffffffb, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000000fffffff7), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(pack, x17, x15, x31, 0x00000000fffffff7, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000000ffffffef), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(pack, x18, x14, x30, 0x00000000ffffffef, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000000ffffffdf), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(pack, x19, x13, x29, 0x00000000ffffffdf, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000000ffffffbf), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(pack, x20, x12, x28, 0x00000000ffffffbf, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffff7f), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(pack, x21, x11, x27, 0x00000000ffffff7f, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000000fffffeff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(pack, x22, x10, x26, 0x00000000fffffeff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000fffffdff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(pack, x23, x9, x25, 0x00000000fffffdff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000fffffbff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(pack, x24, x8, x24, 0x00000000fffffbff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000fffff7ff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(pack, x25, x7, x23, 0x00000000fffff7ff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000ffffefff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(pack, x26, x6, x22, 0x00000000ffffefff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffdfff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(pack, x27, x5, x21, 0x00000000ffffdfff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffbfff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(pack, x28, x4, x20, 0x00000000ffffbfff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000ffff7fff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(pack, x29, x3, x19, 0x00000000ffff7fff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000fffeffff), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(pack, x30, x2, x18, 0x00000000fffeffff, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000fffdffff), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(pack, x31, x1, x17, 0x00000000fffdffff, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000fffbffff), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(pack, x1, x31, x16, 0x00000000fffbffff, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000fff7ffff), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(pack, x2, x30, x15, 0x00000000fff7ffff, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffefffff), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(pack, x3, x29, x14, 0x00000000ffefffff, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffdfffff), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(pack, x4, x28, x13, 0x00000000ffdfffff, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffbfffff), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(pack, x5, x27, x12, 0x00000000ffbfffff, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000ff7fffff), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(pack, x6, x26, x11, 0x00000000ff7fffff, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000feffffff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(pack, x7, x25, x10, 0x00000000feffffff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000fdffffff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(pack, x8, x24, x9, 0x00000000fdffffff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000fbffffff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(pack, x9, x23, x8, 0x00000000fbffffff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000f7ffffff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(pack, x10, x22, x7, 0x00000000f7ffffff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000efffffff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(pack, x11, x21, x6, 0x00000000efffffff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000dfffffff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(pack, x12, x20, x5, 0x00000000dfffffff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000bfffffff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(pack, x13, x19, x4, 0x00000000bfffffff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x000000007fffffff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(pack, x14, x18, x3, 0x000000007fffffff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(pack, x15, x17, x2, 0x00000000ffffffff, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x80000000ffffffff), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(pack, x16, x16, x1, 0x80000000ffffffff, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x40000000ffffffff), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(pack, x17, x15, x31, 0x40000000ffffffff, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x20000000ffffffff), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(pack, x18, x14, x30, 0x20000000ffffffff, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x10000000ffffffff), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(pack, x19, x13, x29, 0x10000000ffffffff, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x08000000ffffffff), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(pack, x20, x12, x28, 0x08000000ffffffff, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x04000000ffffffff), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(pack, x21, x11, x27, 0x04000000ffffffff, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x02000000ffffffff), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(pack, x22, x10, x26, 0x02000000ffffffff, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x01000000ffffffff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(pack, x23, x9, x25, 0x01000000ffffffff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00800000ffffffff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(pack, x24, x8, x24, 0x00800000ffffffff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x00400000ffffffff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(pack, x25, x7, x23, 0x00400000ffffffff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x00200000ffffffff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(pack, x26, x6, x22, 0x00200000ffffffff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x00100000ffffffff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(pack, x27, x5, x21, 0x00100000ffffffff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x00080000ffffffff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(pack, x28, x4, x20, 0x00080000ffffffff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x00040000ffffffff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(pack, x29, x3, x19, 0x00040000ffffffff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x00020000ffffffff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(pack, x30, x2, x18, 0x00020000ffffffff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x00010000ffffffff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(pack, x31, x1, x17, 0x00010000ffffffff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x00008000ffffffff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(pack, x1, x31, x16, 0x00008000ffffffff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x00004000ffffffff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(pack, x2, x30, x15, 0x00004000ffffffff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x00002000ffffffff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(pack, x3, x29, x14, 0x00002000ffffffff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x00001000ffffffff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(pack, x4, x28, x13, 0x00001000ffffffff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x00000800ffffffff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(pack, x5, x27, x12, 0x00000800ffffffff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x00000400ffffffff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(pack, x6, x26, x11, 0x00000400ffffffff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x00000200ffffffff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(pack, x7, x25, x10, 0x00000200ffffffff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x00000100ffffffff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(pack, x8, x24, x9, 0x00000100ffffffff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00000080ffffffff), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(pack, x9, x23, x8, 0x00000080ffffffff, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x00000040ffffffff), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(pack, x10, x22, x7, 0x00000040ffffffff, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x00000020ffffffff), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(pack, x11, x21, x6, 0x00000020ffffffff, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x00000010ffffffff), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(pack, x12, x20, x5, 0x00000010ffffffff, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x00000008ffffffff), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(pack, x13, x19, x4, 0x00000008ffffffff, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x00000004ffffffff), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(pack, x14, x18, x3, 0x00000004ffffffff, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x00000002ffffffff), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(pack, x15, x17, x2, 0x00000002ffffffff, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x00000001ffffffff), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(pack, x16, x16, x1, 0x00000001ffffffff, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000001), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(pack, x17, x15, x31, 0x0000000000000001, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000002), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(pack, x18, x14, x30, 0x0000000000000002, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000004), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(pack, x19, x13, x29, 0x0000000000000004, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000008), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(pack, x20, x12, x28, 0x0000000000000008, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000010), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(pack, x21, x11, x27, 0x0000000000000010, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000020), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(pack, x22, x10, x26, 0x0000000000000020, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000040), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(pack, x23, x9, x25, 0x0000000000000040, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000080), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(pack, x24, x8, x24, 0x0000000000000080, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000100), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(pack, x25, x7, x23, 0x0000000000000100, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000200), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(pack, x26, x6, x22, 0x0000000000000200, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000400), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(pack, x27, x5, x21, 0x0000000000000400, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000800), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(pack, x28, x4, x20, 0x0000000000000800, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000001000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(pack, x29, x3, x19, 0x0000000000001000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000002000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(pack, x30, x2, x18, 0x0000000000002000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000004000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(pack, x31, x1, x17, 0x0000000000004000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000008000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(pack, x1, x31, x16, 0x0000000000008000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000010000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(pack, x2, x30, x15, 0x0000000000010000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000020000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(pack, x3, x29, x14, 0x0000000000020000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000040000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(pack, x4, x28, x13, 0x0000000000040000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000080000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(pack, x5, x27, x12, 0x0000000000080000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000100000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(pack, x6, x26, x11, 0x0000000000100000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000200000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(pack, x7, x25, x10, 0x0000000000200000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000400000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(pack, x8, x24, x9, 0x0000000000400000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000800000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(pack, x9, x23, x8, 0x0000000000800000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000001000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(pack, x10, x22, x7, 0x0000000001000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000002000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(pack, x11, x21, x6, 0x0000000002000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000004000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(pack, x12, x20, x5, 0x0000000004000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000008000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(pack, x13, x19, x4, 0x0000000008000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000010000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(pack, x14, x18, x3, 0x0000000010000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000020000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(pack, x15, x17, x2, 0x0000000020000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000040000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(pack, x16, x16, x1, 0x0000000040000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000080000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(pack, x17, x15, x31, 0x0000000080000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(pack, x18, x14, x30, 0x0000000000000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(pack, x19, x13, x29, 0x0000000000000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(pack, x20, x12, x28, 0x0000000000000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(pack, x21, x11, x27, 0x0000000000000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(pack, x22, x10, x26, 0x0000000000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(pack, x23, x9, x25, 0x0000000000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(pack, x24, x8, x24, 0x0000000000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(pack, x25, x7, x23, 0x0000000000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(pack, x26, x6, x22, 0x0000000000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(pack, x27, x5, x21, 0x0000000000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(pack, x28, x4, x20, 0x0000000000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(pack, x29, x3, x19, 0x0000000000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(pack, x30, x2, x18, 0x0000000000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(pack, x31, x1, x17, 0x0000000000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(pack, x1, x31, x16, 0x0000000000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(pack, x2, x30, x15, 0x0000000000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(pack, x3, x29, x14, 0x0000000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(pack, x4, x28, x13, 0x0000000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(pack, x5, x27, x12, 0x0000000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(pack, x6, x26, x11, 0x0000000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(pack, x7, x25, x10, 0x0000000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(pack, x8, x24, x9, 0x0000000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(pack, x9, x23, x8, 0x0000000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(pack, x10, x22, x7, 0x0000000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(pack, x11, x21, x6, 0x0000000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(pack, x12, x20, x5, 0x0000000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(pack, x13, x19, x4, 0x0000000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(pack, x14, x18, x3, 0x0000000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(pack, x15, x17, x2, 0x0000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(pack, x16, x16, x1, 0x0000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(pack, x17, x15, x31, 0x0000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(pack, x18, x14, x30, 0x0000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(pack, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x00000000fffffffe), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(pack, x20, x12, x28, 0x00000000fffffffe, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x00000000fffffffd), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(pack, x21, x11, x27, 0x00000000fffffffd, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x00000000fffffffb), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(pack, x22, x10, x26, 0x00000000fffffffb, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x00000000fffffff7), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(pack, x23, x9, x25, 0x00000000fffffff7, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x00000000ffffffef), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(pack, x24, x8, x24, 0x00000000ffffffef, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x00000000ffffffdf), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(pack, x25, x7, x23, 0x00000000ffffffdf, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x00000000ffffffbf), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(pack, x26, x6, x22, 0x00000000ffffffbf, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffff7f), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(pack, x27, x5, x21, 0x00000000ffffff7f, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x00000000fffffeff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(pack, x28, x4, x20, 0x00000000fffffeff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x00000000fffffdff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(pack, x29, x3, x19, 0x00000000fffffdff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x00000000fffffbff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(pack, x30, x2, x18, 0x00000000fffffbff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x00000000fffff7ff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(pack, x31, x1, x17, 0x00000000fffff7ff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x00000000ffffefff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(pack, x1, x31, x16, 0x00000000ffffefff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x00000000ffffdfff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(pack, x2, x30, x15, 0x00000000ffffdfff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffffbfff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(pack, x3, x29, x14, 0x00000000ffffbfff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffff7fff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(pack, x4, x28, x13, 0x00000000ffff7fff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x00000000fffeffff), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(pack, x5, x27, x12, 0x00000000fffeffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x00000000fffdffff), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(pack, x6, x26, x11, 0x00000000fffdffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x00000000fffbffff), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(pack, x7, x25, x10, 0x00000000fffbffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x00000000fff7ffff), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(pack, x8, x24, x9, 0x00000000fff7ffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x00000000ffefffff), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(pack, x9, x23, x8, 0x00000000ffefffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffdfffff), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(pack, x10, x22, x7, 0x00000000ffdfffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffbfffff), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(pack, x11, x21, x6, 0x00000000ffbfffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x00000000ff7fffff), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(pack, x12, x20, x5, 0x00000000ff7fffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x00000000feffffff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(pack, x13, x19, x4, 0x00000000feffffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x00000000fdffffff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(pack, x14, x18, x3, 0x00000000fdffffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x00000000fbffffff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(pack, x15, x17, x2, 0x00000000fbffffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x00000000f7ffffff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(pack, x16, x16, x1, 0x00000000f7ffffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x00000000efffffff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(pack, x17, x15, x31, 0x00000000efffffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x00000000dfffffff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(pack, x18, x14, x30, 0x00000000dfffffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x00000000bfffffff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(pack, x19, x13, x29, 0x00000000bfffffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x000000007fffffff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(pack, x20, x12, x28, 0x000000007fffffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(pack, x21, x11, x27, 0x00000000ffffffff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(pack, x22, x10, x26, 0x00000000ffffffff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x00000000ffffffff), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(pack, x23, x9, x25, 0x00000000ffffffff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x00000000ffffffff), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(pack, x24, x8, x24, 0x00000000ffffffff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x00000000ffffffff), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(pack, x25, x7, x23, 0x00000000ffffffff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x00000000ffffffff), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(pack, x26, x6, x22, 0x00000000ffffffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffffff), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(pack, x27, x5, x21, 0x00000000ffffffff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffffff), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(pack, x28, x4, x20, 0x00000000ffffffff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x00000000ffffffff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(pack, x29, x3, x19, 0x00000000ffffffff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x00000000ffffffff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(pack, x30, x2, x18, 0x00000000ffffffff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x00000000ffffffff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(pack, x31, x1, x17, 0x00000000ffffffff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x00000000ffffffff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(pack, x1, x31, x16, 0x00000000ffffffff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x00000000ffffffff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(pack, x2, x30, x15, 0x00000000ffffffff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffffffff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(pack, x3, x29, x14, 0x00000000ffffffff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffffffff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(pack, x4, x28, x13, 0x00000000ffffffff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffffffff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(pack, x5, x27, x12, 0x00000000ffffffff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x00000000ffffffff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(pack, x6, x26, x11, 0x00000000ffffffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x00000000ffffffff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(pack, x7, x25, x10, 0x00000000ffffffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x00000000ffffffff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(pack, x8, x24, x9, 0x00000000ffffffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x00000000ffffffff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(pack, x9, x23, x8, 0x00000000ffffffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffffffff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(pack, x10, x22, x7, 0x00000000ffffffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffffffff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(pack, x11, x21, x6, 0x00000000ffffffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x00000000ffffffff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(pack, x12, x20, x5, 0x00000000ffffffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x00000000ffffffff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(pack, x13, x19, x4, 0x00000000ffffffff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x00000000ffffffff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(pack, x14, x18, x3, 0x00000000ffffffff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(pack, x15, x17, x2, 0x00000000ffffffff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(pack, x16, x16, x1, 0x00000000ffffffff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x00000000ffffffff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(pack, x17, x15, x31, 0x00000000ffffffff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x00000000ffffffff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(pack, x18, x14, x30, 0x00000000ffffffff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x00000000ffffffff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(pack, x19, x13, x29, 0x00000000ffffffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x00000000ffffffff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(pack, x20, x12, x28, 0x00000000ffffffff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(pack, x21, x11, x27, 0x00000000ffffffff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(pack, x22, x10, x26, 0x00000000ffffffff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x121bcc23121bcc23), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(pack, x23, x25, x25, 0x121bcc23121bcc23, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(pack, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x00000000a8e1a8bb), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(pack, x25, x7, x0, 0x00000000a8e1a8bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0xe19bfbc300000000), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(pack, x26, x0, x22, 0xe19bfbc300000000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/PACKH-01.S b/riscof/suite/rv64i_m/K_unratified/PACKH-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..10dc6c2a336a5ea48b29ca05e2ac71a4d8254083
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/PACKH-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test PACKH-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'packh'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",packh)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",packh)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",packh)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x0000000000002395), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(packh, x1, x31, x16, 0x0000000000002395, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x0000000000005bc1), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(packh, x2, x30, x15, 0x0000000000005bc1, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x000000000000c0bb), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(packh, x3, x29, x14, 0x000000000000c0bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x000000000000c3cb), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(packh, x4, x28, x13, 0x000000000000c3cb, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x000000000000af4f), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(packh, x5, x27, x12, 0x000000000000af4f, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x0000000000004faf), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(packh, x6, x26, x11, 0x0000000000004faf, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x000000000000cbc3), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(packh, x7, x25, x10, 0x000000000000cbc3, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x000000000000bbc0), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(packh, x8, x24, x9, 0x000000000000bbc0, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x000000000000c15b), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(packh, x9, x23, x8, 0x000000000000c15b, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x0000000000009523), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(packh, x10, x22, x7, 0x0000000000009523, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x000000000000ff01), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(packh, x11, x21, x6, 0x000000000000ff01, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x000000000000ff02), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(packh, x12, x20, x5, 0x000000000000ff02, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x000000000000ff04), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(packh, x13, x19, x4, 0x000000000000ff04, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x000000000000ff08), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(packh, x14, x18, x3, 0x000000000000ff08, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x000000000000ff10), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(packh, x15, x17, x2, 0x000000000000ff10, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x000000000000ff20), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(packh, x16, x16, x1, 0x000000000000ff20, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x000000000000ff40), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(packh, x17, x15, x31, 0x000000000000ff40, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x000000000000ff80), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(packh, x18, x14, x30, 0x000000000000ff80, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x000000000000ff00), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(packh, x19, x13, x29, 0x000000000000ff00, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x000000000000ff00), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(packh, x20, x12, x28, 0x000000000000ff00, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x000000000000ff00), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(packh, x21, x11, x27, 0x000000000000ff00, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x000000000000ff00), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(packh, x22, x10, x26, 0x000000000000ff00, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x000000000000ff00), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(packh, x23, x9, x25, 0x000000000000ff00, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x000000000000ff00), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(packh, x24, x8, x24, 0x000000000000ff00, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x000000000000ff00), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(packh, x25, x7, x23, 0x000000000000ff00, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x000000000000ff00), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(packh, x26, x6, x22, 0x000000000000ff00, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x000000000000ff00), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(packh, x27, x5, x21, 0x000000000000ff00, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x000000000000ff00), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(packh, x28, x4, x20, 0x000000000000ff00, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x000000000000ff00), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(packh, x29, x3, x19, 0x000000000000ff00, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x000000000000ff00), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(packh, x30, x2, x18, 0x000000000000ff00, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x000000000000ff00), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(packh, x31, x1, x17, 0x000000000000ff00, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x000000000000ff00), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(packh, x1, x31, x16, 0x000000000000ff00, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x000000000000ff00), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(packh, x2, x30, x15, 0x000000000000ff00, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x000000000000ff00), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(packh, x3, x29, x14, 0x000000000000ff00, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x000000000000ff00), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(packh, x4, x28, x13, 0x000000000000ff00, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x000000000000ff00), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(packh, x5, x27, x12, 0x000000000000ff00, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x000000000000ff00), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(packh, x6, x26, x11, 0x000000000000ff00, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x000000000000ff00), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(packh, x7, x25, x10, 0x000000000000ff00, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x000000000000ff00), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(packh, x8, x24, x9, 0x000000000000ff00, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x000000000000ff00), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(packh, x9, x23, x8, 0x000000000000ff00, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x000000000000ff00), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(packh, x10, x22, x7, 0x000000000000ff00, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x000000000000ff00), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(packh, x11, x21, x6, 0x000000000000ff00, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x000000000000ff00), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(packh, x12, x20, x5, 0x000000000000ff00, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x000000000000ff00), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(packh, x13, x19, x4, 0x000000000000ff00, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x000000000000ff00), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(packh, x14, x18, x3, 0x000000000000ff00, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x000000000000ff00), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(packh, x15, x17, x2, 0x000000000000ff00, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x000000000000ff00), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(packh, x16, x16, x1, 0x000000000000ff00, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x000000000000ff00), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(packh, x17, x15, x31, 0x000000000000ff00, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x000000000000ff00), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(packh, x18, x14, x30, 0x000000000000ff00, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x000000000000ff00), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(packh, x19, x13, x29, 0x000000000000ff00, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x000000000000ff00), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(packh, x20, x12, x28, 0x000000000000ff00, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x000000000000ff00), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(packh, x21, x11, x27, 0x000000000000ff00, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x000000000000ff00), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(packh, x22, x10, x26, 0x000000000000ff00, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x000000000000ff00), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(packh, x23, x9, x25, 0x000000000000ff00, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x000000000000ff00), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(packh, x24, x8, x24, 0x000000000000ff00, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x000000000000ff00), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(packh, x25, x7, x23, 0x000000000000ff00, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x000000000000ff00), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(packh, x26, x6, x22, 0x000000000000ff00, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x000000000000ff00), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(packh, x27, x5, x21, 0x000000000000ff00, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x000000000000ff00), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(packh, x28, x4, x20, 0x000000000000ff00, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x000000000000ff00), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(packh, x29, x3, x19, 0x000000000000ff00, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x000000000000ff00), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(packh, x30, x2, x18, 0x000000000000ff00, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x000000000000ff00), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(packh, x31, x1, x17, 0x000000000000ff00, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x000000000000ff00), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(packh, x1, x31, x16, 0x000000000000ff00, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x000000000000ff00), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(packh, x2, x30, x15, 0x000000000000ff00, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x000000000000ff00), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(packh, x3, x29, x14, 0x000000000000ff00, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x000000000000ff00), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(packh, x4, x28, x13, 0x000000000000ff00, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x000000000000ff00), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(packh, x5, x27, x12, 0x000000000000ff00, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000007f00), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(packh, x6, x26, x11, 0x0000000000007f00, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x000000000000bf00), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(packh, x7, x25, x10, 0x000000000000bf00, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x000000000000df00), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(packh, x8, x24, x9, 0x000000000000df00, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x000000000000ef00), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(packh, x9, x23, x8, 0x000000000000ef00, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x000000000000f700), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(packh, x10, x22, x7, 0x000000000000f700, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x000000000000fb00), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(packh, x11, x21, x6, 0x000000000000fb00, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x000000000000fd00), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(packh, x12, x20, x5, 0x000000000000fd00, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x000000000000fe00), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(packh, x13, x19, x4, 0x000000000000fe00, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x00000000000000fe), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packh, x14, x18, x3, 0x00000000000000fe, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000000000000fd), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(packh, x15, x17, x2, 0x00000000000000fd, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000000000000fb), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(packh, x16, x16, x1, 0x00000000000000fb, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000000000000f7), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(packh, x17, x15, x31, 0x00000000000000f7, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000000000000ef), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(packh, x18, x14, x30, 0x00000000000000ef, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000000000000df), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(packh, x19, x13, x29, 0x00000000000000df, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000000000000bf), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(packh, x20, x12, x28, 0x00000000000000bf, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x000000000000007f), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(packh, x21, x11, x27, 0x000000000000007f, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000000000000ff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(packh, x22, x10, x26, 0x00000000000000ff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000000000ff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(packh, x23, x9, x25, 0x00000000000000ff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000000000ff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(packh, x24, x8, x24, 0x00000000000000ff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000000000ff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(packh, x25, x7, x23, 0x00000000000000ff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000000000ff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(packh, x26, x6, x22, 0x00000000000000ff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000000000ff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(packh, x27, x5, x21, 0x00000000000000ff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000000000ff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(packh, x28, x4, x20, 0x00000000000000ff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000000000ff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(packh, x29, x3, x19, 0x00000000000000ff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000000000ff), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(packh, x30, x2, x18, 0x00000000000000ff, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000000000ff), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(packh, x31, x1, x17, 0x00000000000000ff, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000000000ff), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(packh, x1, x31, x16, 0x00000000000000ff, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000000000ff), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(packh, x2, x30, x15, 0x00000000000000ff, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000000000ff), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(packh, x3, x29, x14, 0x00000000000000ff, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000000000ff), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(packh, x4, x28, x13, 0x00000000000000ff, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000000000ff), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(packh, x5, x27, x12, 0x00000000000000ff, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000000000ff), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(packh, x6, x26, x11, 0x00000000000000ff, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000000000ff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(packh, x7, x25, x10, 0x00000000000000ff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000000000ff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(packh, x8, x24, x9, 0x00000000000000ff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000000000ff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(packh, x9, x23, x8, 0x00000000000000ff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000000000ff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(packh, x10, x22, x7, 0x00000000000000ff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000000000ff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(packh, x11, x21, x6, 0x00000000000000ff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000000000ff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(packh, x12, x20, x5, 0x00000000000000ff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000000000ff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(packh, x13, x19, x4, 0x00000000000000ff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000000000000ff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(packh, x14, x18, x3, 0x00000000000000ff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000000000ff), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(packh, x15, x17, x2, 0x00000000000000ff, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000000000ff), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(packh, x16, x16, x1, 0x00000000000000ff, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x00000000000000ff), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(packh, x17, x15, x31, 0x00000000000000ff, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x00000000000000ff), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(packh, x18, x14, x30, 0x00000000000000ff, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x00000000000000ff), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(packh, x19, x13, x29, 0x00000000000000ff, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x00000000000000ff), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(packh, x20, x12, x28, 0x00000000000000ff, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x00000000000000ff), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(packh, x21, x11, x27, 0x00000000000000ff, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x00000000000000ff), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(packh, x22, x10, x26, 0x00000000000000ff, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x00000000000000ff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(packh, x23, x9, x25, 0x00000000000000ff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000000000000ff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(packh, x24, x8, x24, 0x00000000000000ff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x00000000000000ff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(packh, x25, x7, x23, 0x00000000000000ff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x00000000000000ff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(packh, x26, x6, x22, 0x00000000000000ff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x00000000000000ff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(packh, x27, x5, x21, 0x00000000000000ff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x00000000000000ff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(packh, x28, x4, x20, 0x00000000000000ff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x00000000000000ff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(packh, x29, x3, x19, 0x00000000000000ff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x00000000000000ff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(packh, x30, x2, x18, 0x00000000000000ff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x00000000000000ff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(packh, x31, x1, x17, 0x00000000000000ff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x00000000000000ff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(packh, x1, x31, x16, 0x00000000000000ff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x00000000000000ff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(packh, x2, x30, x15, 0x00000000000000ff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x00000000000000ff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(packh, x3, x29, x14, 0x00000000000000ff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x00000000000000ff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(packh, x4, x28, x13, 0x00000000000000ff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x00000000000000ff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(packh, x5, x27, x12, 0x00000000000000ff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x00000000000000ff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(packh, x6, x26, x11, 0x00000000000000ff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x00000000000000ff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(packh, x7, x25, x10, 0x00000000000000ff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x00000000000000ff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(packh, x8, x24, x9, 0x00000000000000ff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00000000000080ff), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(packh, x9, x23, x8, 0x00000000000080ff, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x00000000000040ff), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(packh, x10, x22, x7, 0x00000000000040ff, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x00000000000020ff), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(packh, x11, x21, x6, 0x00000000000020ff, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x00000000000010ff), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(packh, x12, x20, x5, 0x00000000000010ff, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x00000000000008ff), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(packh, x13, x19, x4, 0x00000000000008ff, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x00000000000004ff), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(packh, x14, x18, x3, 0x00000000000004ff, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x00000000000002ff), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(packh, x15, x17, x2, 0x00000000000002ff, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x00000000000001ff), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(packh, x16, x16, x1, 0x00000000000001ff, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000001), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packh, x17, x15, x31, 0x0000000000000001, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000002), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packh, x18, x14, x30, 0x0000000000000002, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000004), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packh, x19, x13, x29, 0x0000000000000004, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000008), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packh, x20, x12, x28, 0x0000000000000008, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000010), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packh, x21, x11, x27, 0x0000000000000010, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000020), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packh, x22, x10, x26, 0x0000000000000020, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000040), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packh, x23, x9, x25, 0x0000000000000040, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000080), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packh, x24, x8, x24, 0x0000000000000080, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packh, x25, x7, x23, 0x0000000000000000, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packh, x26, x6, x22, 0x0000000000000000, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packh, x27, x5, x21, 0x0000000000000000, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packh, x28, x4, x20, 0x0000000000000000, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packh, x29, x3, x19, 0x0000000000000000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packh, x30, x2, x18, 0x0000000000000000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packh, x31, x1, x17, 0x0000000000000000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packh, x1, x31, x16, 0x0000000000000000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packh, x2, x30, x15, 0x0000000000000000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packh, x3, x29, x14, 0x0000000000000000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packh, x4, x28, x13, 0x0000000000000000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packh, x5, x27, x12, 0x0000000000000000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packh, x6, x26, x11, 0x0000000000000000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packh, x7, x25, x10, 0x0000000000000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packh, x8, x24, x9, 0x0000000000000000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packh, x9, x23, x8, 0x0000000000000000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packh, x10, x22, x7, 0x0000000000000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packh, x11, x21, x6, 0x0000000000000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packh, x12, x20, x5, 0x0000000000000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packh, x13, x19, x4, 0x0000000000000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packh, x14, x18, x3, 0x0000000000000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packh, x15, x17, x2, 0x0000000000000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packh, x16, x16, x1, 0x0000000000000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packh, x17, x15, x31, 0x0000000000000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packh, x18, x14, x30, 0x0000000000000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packh, x19, x13, x29, 0x0000000000000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packh, x20, x12, x28, 0x0000000000000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packh, x21, x11, x27, 0x0000000000000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packh, x22, x10, x26, 0x0000000000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packh, x23, x9, x25, 0x0000000000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packh, x24, x8, x24, 0x0000000000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packh, x25, x7, x23, 0x0000000000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packh, x26, x6, x22, 0x0000000000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packh, x27, x5, x21, 0x0000000000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packh, x28, x4, x20, 0x0000000000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packh, x29, x3, x19, 0x0000000000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packh, x30, x2, x18, 0x0000000000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packh, x31, x1, x17, 0x0000000000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packh, x1, x31, x16, 0x0000000000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packh, x2, x30, x15, 0x0000000000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packh, x3, x29, x14, 0x0000000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packh, x4, x28, x13, 0x0000000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packh, x5, x27, x12, 0x0000000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packh, x6, x26, x11, 0x0000000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packh, x7, x25, x10, 0x0000000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packh, x8, x24, x9, 0x0000000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packh, x9, x23, x8, 0x0000000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packh, x10, x22, x7, 0x0000000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packh, x11, x21, x6, 0x0000000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packh, x12, x20, x5, 0x0000000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packh, x13, x19, x4, 0x0000000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packh, x14, x18, x3, 0x0000000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packh, x15, x17, x2, 0x0000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packh, x16, x16, x1, 0x0000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packh, x17, x15, x31, 0x0000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packh, x18, x14, x30, 0x0000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packh, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x00000000000000fe), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packh, x20, x12, x28, 0x00000000000000fe, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x00000000000000fd), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packh, x21, x11, x27, 0x00000000000000fd, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x00000000000000fb), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packh, x22, x10, x26, 0x00000000000000fb, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x00000000000000f7), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packh, x23, x9, x25, 0x00000000000000f7, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x00000000000000ef), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packh, x24, x8, x24, 0x00000000000000ef, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x00000000000000df), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packh, x25, x7, x23, 0x00000000000000df, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x00000000000000bf), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packh, x26, x6, x22, 0x00000000000000bf, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x000000000000007f), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packh, x27, x5, x21, 0x000000000000007f, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x00000000000000ff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packh, x28, x4, x20, 0x00000000000000ff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x00000000000000ff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packh, x29, x3, x19, 0x00000000000000ff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x00000000000000ff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packh, x30, x2, x18, 0x00000000000000ff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x00000000000000ff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packh, x31, x1, x17, 0x00000000000000ff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x00000000000000ff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packh, x1, x31, x16, 0x00000000000000ff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x00000000000000ff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packh, x2, x30, x15, 0x00000000000000ff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x00000000000000ff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packh, x3, x29, x14, 0x00000000000000ff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x00000000000000ff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packh, x4, x28, x13, 0x00000000000000ff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x00000000000000ff), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packh, x5, x27, x12, 0x00000000000000ff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x00000000000000ff), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packh, x6, x26, x11, 0x00000000000000ff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x00000000000000ff), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packh, x7, x25, x10, 0x00000000000000ff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x00000000000000ff), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packh, x8, x24, x9, 0x00000000000000ff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x00000000000000ff), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packh, x9, x23, x8, 0x00000000000000ff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x00000000000000ff), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packh, x10, x22, x7, 0x00000000000000ff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x00000000000000ff), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packh, x11, x21, x6, 0x00000000000000ff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x00000000000000ff), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packh, x12, x20, x5, 0x00000000000000ff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x00000000000000ff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packh, x13, x19, x4, 0x00000000000000ff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x00000000000000ff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packh, x14, x18, x3, 0x00000000000000ff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x00000000000000ff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packh, x15, x17, x2, 0x00000000000000ff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x00000000000000ff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packh, x16, x16, x1, 0x00000000000000ff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x00000000000000ff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packh, x17, x15, x31, 0x00000000000000ff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x00000000000000ff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packh, x18, x14, x30, 0x00000000000000ff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x00000000000000ff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packh, x19, x13, x29, 0x00000000000000ff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x00000000000000ff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packh, x20, x12, x28, 0x00000000000000ff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x00000000000000ff), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packh, x21, x11, x27, 0x00000000000000ff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x00000000000000ff), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packh, x22, x10, x26, 0x00000000000000ff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x00000000000000ff), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packh, x23, x9, x25, 0x00000000000000ff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x00000000000000ff), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packh, x24, x8, x24, 0x00000000000000ff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x00000000000000ff), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packh, x25, x7, x23, 0x00000000000000ff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x00000000000000ff), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packh, x26, x6, x22, 0x00000000000000ff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x00000000000000ff), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packh, x27, x5, x21, 0x00000000000000ff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x00000000000000ff), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packh, x28, x4, x20, 0x00000000000000ff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x00000000000000ff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packh, x29, x3, x19, 0x00000000000000ff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x00000000000000ff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packh, x30, x2, x18, 0x00000000000000ff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x00000000000000ff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packh, x31, x1, x17, 0x00000000000000ff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x00000000000000ff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packh, x1, x31, x16, 0x00000000000000ff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x00000000000000ff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packh, x2, x30, x15, 0x00000000000000ff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x00000000000000ff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packh, x3, x29, x14, 0x00000000000000ff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x00000000000000ff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packh, x4, x28, x13, 0x00000000000000ff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x00000000000000ff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packh, x5, x27, x12, 0x00000000000000ff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x00000000000000ff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packh, x6, x26, x11, 0x00000000000000ff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x00000000000000ff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packh, x7, x25, x10, 0x00000000000000ff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x00000000000000ff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packh, x8, x24, x9, 0x00000000000000ff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x00000000000000ff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packh, x9, x23, x8, 0x00000000000000ff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x00000000000000ff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packh, x10, x22, x7, 0x00000000000000ff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x00000000000000ff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packh, x11, x21, x6, 0x00000000000000ff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x00000000000000ff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packh, x12, x20, x5, 0x00000000000000ff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x00000000000000ff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packh, x13, x19, x4, 0x00000000000000ff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x00000000000000ff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packh, x14, x18, x3, 0x00000000000000ff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x00000000000000ff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packh, x15, x17, x2, 0x00000000000000ff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x00000000000000ff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packh, x16, x16, x1, 0x00000000000000ff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x00000000000000ff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packh, x17, x15, x31, 0x00000000000000ff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x00000000000000ff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packh, x18, x14, x30, 0x00000000000000ff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x00000000000000ff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packh, x19, x13, x29, 0x00000000000000ff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x00000000000000ff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packh, x20, x12, x28, 0x00000000000000ff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x00000000000000ff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packh, x21, x11, x27, 0x00000000000000ff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x00000000000000ff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packh, x22, x10, x26, 0x00000000000000ff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x0000000000002323), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(packh, x23, x25, x25, 0x0000000000002323, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(packh, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x00000000000000bb), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(packh, x25, x7, x0, 0x00000000000000bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x000000000000c300), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(packh, x26, x0, x22, 0x000000000000c300, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/PACKU-01.S b/riscof/suite/rv64i_m/K_unratified/PACKU-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..37e1961e66450b6f42360333bdb4fbe976cac7e1
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/PACKU-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test PACKU-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'packu'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",packu)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",packu)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",packu)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xdf7f384410fd3ded), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(packu, x1, x31, x16, 0xdf7f384410fd3ded, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xf5adb41abd295ce2), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(packu, x2, x30, x15, 0xf5adb41abd295ce2, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x82f6747fc9649f05), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(packu, x3, x29, x14, 0x82f6747fc9649f05, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x73a92fd435412918), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(packu, x4, x28, x13, 0x73a92fd435412918, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x546b0e5410a24740), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(packu, x5, x27, x12, 0x546b0e5410a24740, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x10a24740546b0e54), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(packu, x6, x26, x11, 0x10a24740546b0e54, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x3541291873a92fd4), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(packu, x7, x25, x10, 0x3541291873a92fd4, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xc9649f0582f6747f), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(packu, x8, x24, x9, 0xc9649f0582f6747f, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xbd295ce2f5adb41a), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(packu, x9, x23, x8, 0xbd295ce2f5adb41a, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x10fd3deddf7f3844), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(packu, x10, x22, x7, 0x10fd3deddf7f3844, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0xffffffff00000000), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(packu, x11, x21, x6, 0xffffffff00000000, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x7fffffff00000000), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(packu, x12, x20, x5, 0x7fffffff00000000, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0xbfffffff00000000), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(packu, x13, x19, x4, 0xbfffffff00000000, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0xdfffffff00000000), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(packu, x14, x18, x3, 0xdfffffff00000000, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0xefffffff00000000), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(packu, x15, x17, x2, 0xefffffff00000000, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0xf7ffffff00000000), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(packu, x16, x16, x1, 0xf7ffffff00000000, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0xfbffffff00000000), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(packu, x17, x15, x31, 0xfbffffff00000000, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xfdffffff00000000), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(packu, x18, x14, x30, 0xfdffffff00000000, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0xfeffffff00000000), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(packu, x19, x13, x29, 0xfeffffff00000000, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0xff7fffff00000000), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(packu, x20, x12, x28, 0xff7fffff00000000, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0xffbfffff00000000), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(packu, x21, x11, x27, 0xffbfffff00000000, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0xffdfffff00000000), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(packu, x22, x10, x26, 0xffdfffff00000000, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0xffefffff00000000), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(packu, x23, x9, x25, 0xffefffff00000000, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0xfff7ffff00000000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(packu, x24, x8, x24, 0xfff7ffff00000000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0xfffbffff00000000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(packu, x25, x7, x23, 0xfffbffff00000000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0xfffdffff00000000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(packu, x26, x6, x22, 0xfffdffff00000000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0xfffeffff00000000), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(packu, x27, x5, x21, 0xfffeffff00000000, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0xffff7fff00000000), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(packu, x28, x4, x20, 0xffff7fff00000000, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0xffffbfff00000000), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(packu, x29, x3, x19, 0xffffbfff00000000, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0xffffdfff00000000), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(packu, x30, x2, x18, 0xffffdfff00000000, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0xffffefff00000000), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(packu, x31, x1, x17, 0xffffefff00000000, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0xfffff7ff00000000), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(packu, x1, x31, x16, 0xfffff7ff00000000, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0xfffffbff00000000), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(packu, x2, x30, x15, 0xfffffbff00000000, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0xfffffdff00000000), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(packu, x3, x29, x14, 0xfffffdff00000000, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0xfffffeff00000000), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(packu, x4, x28, x13, 0xfffffeff00000000, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0xffffff7f00000000), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(packu, x5, x27, x12, 0xffffff7f00000000, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0xffffffbf00000000), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(packu, x6, x26, x11, 0xffffffbf00000000, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xffffffdf00000000), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(packu, x7, x25, x10, 0xffffffdf00000000, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0xffffffef00000000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(packu, x8, x24, x9, 0xffffffef00000000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0xfffffff700000000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(packu, x9, x23, x8, 0xfffffff700000000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0xfffffffb00000000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(packu, x10, x22, x7, 0xfffffffb00000000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0xfffffffd00000000), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(packu, x11, x21, x6, 0xfffffffd00000000, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0xfffffffe00000001), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(packu, x12, x20, x5, 0xfffffffe00000001, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xffffffff00000002), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(packu, x13, x19, x4, 0xffffffff00000002, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xffffffff00000004), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(packu, x14, x18, x3, 0xffffffff00000004, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xffffffff00000008), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(packu, x15, x17, x2, 0xffffffff00000008, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xffffffff00000010), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(packu, x16, x16, x1, 0xffffffff00000010, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xffffffff00000020), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(packu, x17, x15, x31, 0xffffffff00000020, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xffffffff00000040), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(packu, x18, x14, x30, 0xffffffff00000040, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xffffffff00000080), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(packu, x19, x13, x29, 0xffffffff00000080, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xffffffff00000100), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(packu, x20, x12, x28, 0xffffffff00000100, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xffffffff00000200), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(packu, x21, x11, x27, 0xffffffff00000200, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xffffffff00000400), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(packu, x22, x10, x26, 0xffffffff00000400, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xffffffff00000800), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(packu, x23, x9, x25, 0xffffffff00000800, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xffffffff00001000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(packu, x24, x8, x24, 0xffffffff00001000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xffffffff00002000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(packu, x25, x7, x23, 0xffffffff00002000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xffffffff00004000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(packu, x26, x6, x22, 0xffffffff00004000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xffffffff00008000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(packu, x27, x5, x21, 0xffffffff00008000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xffffffff00010000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(packu, x28, x4, x20, 0xffffffff00010000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xffffffff00020000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(packu, x29, x3, x19, 0xffffffff00020000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xffffffff00040000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(packu, x30, x2, x18, 0xffffffff00040000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xffffffff00080000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(packu, x31, x1, x17, 0xffffffff00080000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xffffffff00100000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(packu, x1, x31, x16, 0xffffffff00100000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xffffffff00200000), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(packu, x2, x30, x15, 0xffffffff00200000, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xffffffff00400000), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(packu, x3, x29, x14, 0xffffffff00400000, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xffffffff00800000), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(packu, x4, x28, x13, 0xffffffff00800000, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xffffffff01000000), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(packu, x5, x27, x12, 0xffffffff01000000, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xffffffff02000000), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(packu, x6, x26, x11, 0xffffffff02000000, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xffffffff04000000), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(packu, x7, x25, x10, 0xffffffff04000000, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xffffffff08000000), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(packu, x8, x24, x9, 0xffffffff08000000, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xffffffff10000000), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(packu, x9, x23, x8, 0xffffffff10000000, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xffffffff20000000), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(packu, x10, x22, x7, 0xffffffff20000000, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xffffffff40000000), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(packu, x11, x21, x6, 0xffffffff40000000, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xffffffff80000000), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(packu, x12, x20, x5, 0xffffffff80000000, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xffffffff00000000), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(packu, x13, x19, x4, 0xffffffff00000000, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x00000000ffffffff), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packu, x14, x18, x3, 0x00000000ffffffff, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x80000000ffffffff), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(packu, x15, x17, x2, 0x80000000ffffffff, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x40000000ffffffff), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(packu, x16, x16, x1, 0x40000000ffffffff, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x20000000ffffffff), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(packu, x17, x15, x31, 0x20000000ffffffff, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x10000000ffffffff), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(packu, x18, x14, x30, 0x10000000ffffffff, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x08000000ffffffff), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(packu, x19, x13, x29, 0x08000000ffffffff, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x04000000ffffffff), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(packu, x20, x12, x28, 0x04000000ffffffff, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x02000000ffffffff), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(packu, x21, x11, x27, 0x02000000ffffffff, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x01000000ffffffff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(packu, x22, x10, x26, 0x01000000ffffffff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00800000ffffffff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(packu, x23, x9, x25, 0x00800000ffffffff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00400000ffffffff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(packu, x24, x8, x24, 0x00400000ffffffff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00200000ffffffff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(packu, x25, x7, x23, 0x00200000ffffffff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00100000ffffffff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(packu, x26, x6, x22, 0x00100000ffffffff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00080000ffffffff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(packu, x27, x5, x21, 0x00080000ffffffff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00040000ffffffff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(packu, x28, x4, x20, 0x00040000ffffffff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00020000ffffffff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(packu, x29, x3, x19, 0x00020000ffffffff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00010000ffffffff), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(packu, x30, x2, x18, 0x00010000ffffffff, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00008000ffffffff), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(packu, x31, x1, x17, 0x00008000ffffffff, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00004000ffffffff), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(packu, x1, x31, x16, 0x00004000ffffffff, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00002000ffffffff), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(packu, x2, x30, x15, 0x00002000ffffffff, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00001000ffffffff), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(packu, x3, x29, x14, 0x00001000ffffffff, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000800ffffffff), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(packu, x4, x28, x13, 0x00000800ffffffff, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000400ffffffff), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(packu, x5, x27, x12, 0x00000400ffffffff, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000200ffffffff), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(packu, x6, x26, x11, 0x00000200ffffffff, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000100ffffffff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(packu, x7, x25, x10, 0x00000100ffffffff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000080ffffffff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(packu, x8, x24, x9, 0x00000080ffffffff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000040ffffffff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(packu, x9, x23, x8, 0x00000040ffffffff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000020ffffffff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(packu, x10, x22, x7, 0x00000020ffffffff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000010ffffffff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(packu, x11, x21, x6, 0x00000010ffffffff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000008ffffffff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(packu, x12, x20, x5, 0x00000008ffffffff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000004ffffffff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(packu, x13, x19, x4, 0x00000004ffffffff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000002ffffffff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(packu, x14, x18, x3, 0x00000002ffffffff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000001fffffffe), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(packu, x15, x17, x2, 0x00000001fffffffe, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000fffffffd), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(packu, x16, x16, x1, 0x00000000fffffffd, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x00000000fffffffb), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(packu, x17, x15, x31, 0x00000000fffffffb, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x00000000fffffff7), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(packu, x18, x14, x30, 0x00000000fffffff7, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x00000000ffffffef), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(packu, x19, x13, x29, 0x00000000ffffffef, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x00000000ffffffdf), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(packu, x20, x12, x28, 0x00000000ffffffdf, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffbf), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(packu, x21, x11, x27, 0x00000000ffffffbf, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffff7f), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(packu, x22, x10, x26, 0x00000000ffffff7f, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x00000000fffffeff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(packu, x23, x9, x25, 0x00000000fffffeff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000000fffffdff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(packu, x24, x8, x24, 0x00000000fffffdff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x00000000fffffbff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(packu, x25, x7, x23, 0x00000000fffffbff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x00000000fffff7ff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(packu, x26, x6, x22, 0x00000000fffff7ff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffefff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(packu, x27, x5, x21, 0x00000000ffffefff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffdfff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(packu, x28, x4, x20, 0x00000000ffffdfff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x00000000ffffbfff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(packu, x29, x3, x19, 0x00000000ffffbfff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x00000000ffff7fff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(packu, x30, x2, x18, 0x00000000ffff7fff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x00000000fffeffff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(packu, x31, x1, x17, 0x00000000fffeffff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x00000000fffdffff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(packu, x1, x31, x16, 0x00000000fffdffff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x00000000fffbffff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(packu, x2, x30, x15, 0x00000000fffbffff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x00000000fff7ffff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(packu, x3, x29, x14, 0x00000000fff7ffff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffefffff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(packu, x4, x28, x13, 0x00000000ffefffff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffdfffff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(packu, x5, x27, x12, 0x00000000ffdfffff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x00000000ffbfffff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(packu, x6, x26, x11, 0x00000000ffbfffff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x00000000ff7fffff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(packu, x7, x25, x10, 0x00000000ff7fffff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x00000000feffffff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(packu, x8, x24, x9, 0x00000000feffffff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00000000fdffffff), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(packu, x9, x23, x8, 0x00000000fdffffff, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x00000000fbffffff), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(packu, x10, x22, x7, 0x00000000fbffffff, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x00000000f7ffffff), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(packu, x11, x21, x6, 0x00000000f7ffffff, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x00000000efffffff), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(packu, x12, x20, x5, 0x00000000efffffff, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x00000000dfffffff), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(packu, x13, x19, x4, 0x00000000dfffffff, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x00000000bfffffff), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(packu, x14, x18, x3, 0x00000000bfffffff, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x000000007fffffff), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(packu, x15, x17, x2, 0x000000007fffffff, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(packu, x16, x16, x1, 0x00000000ffffffff, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packu, x17, x15, x31, 0x0000000000000000, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packu, x18, x14, x30, 0x0000000000000000, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packu, x19, x13, x29, 0x0000000000000000, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packu, x20, x12, x28, 0x0000000000000000, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packu, x21, x11, x27, 0x0000000000000000, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packu, x22, x10, x26, 0x0000000000000000, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packu, x23, x9, x25, 0x0000000000000000, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packu, x24, x8, x24, 0x0000000000000000, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packu, x25, x7, x23, 0x0000000000000000, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packu, x26, x6, x22, 0x0000000000000000, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packu, x27, x5, x21, 0x0000000000000000, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packu, x28, x4, x20, 0x0000000000000000, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packu, x29, x3, x19, 0x0000000000000000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packu, x30, x2, x18, 0x0000000000000000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packu, x31, x1, x17, 0x0000000000000000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packu, x1, x31, x16, 0x0000000000000000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packu, x2, x30, x15, 0x0000000000000000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packu, x3, x29, x14, 0x0000000000000000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packu, x4, x28, x13, 0x0000000000000000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packu, x5, x27, x12, 0x0000000000000000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packu, x6, x26, x11, 0x0000000000000000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packu, x7, x25, x10, 0x0000000000000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packu, x8, x24, x9, 0x0000000000000000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packu, x9, x23, x8, 0x0000000000000000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packu, x10, x22, x7, 0x0000000000000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packu, x11, x21, x6, 0x0000000000000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packu, x12, x20, x5, 0x0000000000000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packu, x13, x19, x4, 0x0000000000000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packu, x14, x18, x3, 0x0000000000000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packu, x15, x17, x2, 0x0000000000000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packu, x16, x16, x1, 0x0000000000000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packu, x17, x15, x31, 0x0000000000000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000001), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packu, x18, x14, x30, 0x0000000000000001, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000002), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packu, x19, x13, x29, 0x0000000000000002, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000004), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packu, x20, x12, x28, 0x0000000000000004, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000008), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packu, x21, x11, x27, 0x0000000000000008, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000010), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packu, x22, x10, x26, 0x0000000000000010, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000020), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packu, x23, x9, x25, 0x0000000000000020, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000040), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packu, x24, x8, x24, 0x0000000000000040, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000080), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packu, x25, x7, x23, 0x0000000000000080, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000100), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packu, x26, x6, x22, 0x0000000000000100, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000200), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packu, x27, x5, x21, 0x0000000000000200, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000400), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packu, x28, x4, x20, 0x0000000000000400, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000800), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packu, x29, x3, x19, 0x0000000000000800, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000001000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packu, x30, x2, x18, 0x0000000000001000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000002000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packu, x31, x1, x17, 0x0000000000002000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000004000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packu, x1, x31, x16, 0x0000000000004000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000008000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packu, x2, x30, x15, 0x0000000000008000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000010000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packu, x3, x29, x14, 0x0000000000010000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000020000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packu, x4, x28, x13, 0x0000000000020000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000040000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packu, x5, x27, x12, 0x0000000000040000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000080000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packu, x6, x26, x11, 0x0000000000080000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000100000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packu, x7, x25, x10, 0x0000000000100000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000200000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packu, x8, x24, x9, 0x0000000000200000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000400000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packu, x9, x23, x8, 0x0000000000400000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000800000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packu, x10, x22, x7, 0x0000000000800000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000001000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packu, x11, x21, x6, 0x0000000001000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000002000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packu, x12, x20, x5, 0x0000000002000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000004000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packu, x13, x19, x4, 0x0000000004000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000008000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packu, x14, x18, x3, 0x0000000008000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000010000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packu, x15, x17, x2, 0x0000000010000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000020000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packu, x16, x16, x1, 0x0000000020000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000040000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packu, x17, x15, x31, 0x0000000040000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000080000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packu, x18, x14, x30, 0x0000000080000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packu, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x00000000ffffffff), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packu, x20, x12, x28, 0x00000000ffffffff, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packu, x21, x11, x27, 0x00000000ffffffff, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packu, x22, x10, x26, 0x00000000ffffffff, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x00000000ffffffff), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packu, x23, x9, x25, 0x00000000ffffffff, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x00000000ffffffff), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packu, x24, x8, x24, 0x00000000ffffffff, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x00000000ffffffff), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packu, x25, x7, x23, 0x00000000ffffffff, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x00000000ffffffff), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packu, x26, x6, x22, 0x00000000ffffffff, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffffff), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packu, x27, x5, x21, 0x00000000ffffffff, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffffff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packu, x28, x4, x20, 0x00000000ffffffff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x00000000ffffffff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packu, x29, x3, x19, 0x00000000ffffffff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x00000000ffffffff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packu, x30, x2, x18, 0x00000000ffffffff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x00000000ffffffff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packu, x31, x1, x17, 0x00000000ffffffff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x00000000ffffffff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packu, x1, x31, x16, 0x00000000ffffffff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x00000000ffffffff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packu, x2, x30, x15, 0x00000000ffffffff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffffffff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packu, x3, x29, x14, 0x00000000ffffffff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffffffff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packu, x4, x28, x13, 0x00000000ffffffff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffffffff), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packu, x5, x27, x12, 0x00000000ffffffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x00000000ffffffff), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packu, x6, x26, x11, 0x00000000ffffffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x00000000ffffffff), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packu, x7, x25, x10, 0x00000000ffffffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x00000000ffffffff), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packu, x8, x24, x9, 0x00000000ffffffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x00000000ffffffff), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packu, x9, x23, x8, 0x00000000ffffffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffffffff), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packu, x10, x22, x7, 0x00000000ffffffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffffffff), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packu, x11, x21, x6, 0x00000000ffffffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x00000000ffffffff), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packu, x12, x20, x5, 0x00000000ffffffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x00000000ffffffff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packu, x13, x19, x4, 0x00000000ffffffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x00000000ffffffff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packu, x14, x18, x3, 0x00000000ffffffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packu, x15, x17, x2, 0x00000000ffffffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packu, x16, x16, x1, 0x00000000ffffffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x00000000ffffffff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packu, x17, x15, x31, 0x00000000ffffffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x00000000ffffffff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packu, x18, x14, x30, 0x00000000ffffffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x00000000ffffffff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packu, x19, x13, x29, 0x00000000ffffffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x00000000ffffffff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packu, x20, x12, x28, 0x00000000ffffffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x00000000fffffffe), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packu, x21, x11, x27, 0x00000000fffffffe, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x00000000fffffffd), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packu, x22, x10, x26, 0x00000000fffffffd, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x00000000fffffffb), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packu, x23, x9, x25, 0x00000000fffffffb, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x00000000fffffff7), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packu, x24, x8, x24, 0x00000000fffffff7, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x00000000ffffffef), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packu, x25, x7, x23, 0x00000000ffffffef, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x00000000ffffffdf), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packu, x26, x6, x22, 0x00000000ffffffdf, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffffbf), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packu, x27, x5, x21, 0x00000000ffffffbf, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffff7f), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packu, x28, x4, x20, 0x00000000ffffff7f, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x00000000fffffeff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packu, x29, x3, x19, 0x00000000fffffeff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x00000000fffffdff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packu, x30, x2, x18, 0x00000000fffffdff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x00000000fffffbff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packu, x31, x1, x17, 0x00000000fffffbff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x00000000fffff7ff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packu, x1, x31, x16, 0x00000000fffff7ff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x00000000ffffefff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packu, x2, x30, x15, 0x00000000ffffefff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffffdfff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packu, x3, x29, x14, 0x00000000ffffdfff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffffbfff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packu, x4, x28, x13, 0x00000000ffffbfff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffff7fff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packu, x5, x27, x12, 0x00000000ffff7fff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x00000000fffeffff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packu, x6, x26, x11, 0x00000000fffeffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x00000000fffdffff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packu, x7, x25, x10, 0x00000000fffdffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x00000000fffbffff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packu, x8, x24, x9, 0x00000000fffbffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x00000000fff7ffff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packu, x9, x23, x8, 0x00000000fff7ffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffefffff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packu, x10, x22, x7, 0x00000000ffefffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffdfffff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packu, x11, x21, x6, 0x00000000ffdfffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x00000000ffbfffff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packu, x12, x20, x5, 0x00000000ffbfffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x00000000ff7fffff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packu, x13, x19, x4, 0x00000000ff7fffff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x00000000feffffff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packu, x14, x18, x3, 0x00000000feffffff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x00000000fdffffff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packu, x15, x17, x2, 0x00000000fdffffff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x00000000fbffffff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packu, x16, x16, x1, 0x00000000fbffffff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x00000000f7ffffff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packu, x17, x15, x31, 0x00000000f7ffffff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x00000000efffffff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packu, x18, x14, x30, 0x00000000efffffff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x00000000dfffffff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packu, x19, x13, x29, 0x00000000dfffffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x00000000bfffffff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packu, x20, x12, x28, 0x00000000bfffffff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x000000007fffffff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packu, x21, x11, x27, 0x000000007fffffff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packu, x22, x10, x26, 0x00000000ffffffff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0xdf7f3844df7f3844), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(packu, x23, x25, x25, 0xdf7f3844df7f3844, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(packu, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x00000000c9649f05), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(packu, x25, x7, x0, 0x00000000c9649f05, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x73a92fd400000000), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(packu, x26, x0, x22, 0x73a92fd400000000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/PACKUW-01.S b/riscof/suite/rv64i_m/K_unratified/PACKUW-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..78499113b035dce612c5a4eaacb8b73db03974cc
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/PACKUW-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test PACKUW-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'packuw'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",packuw)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",packuw)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",packuw)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x00000000121badea), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(packuw, x1, x31, x16, 0x00000000121badea, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xffffffffa47dd2ff), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(packuw, x2, x30, x15, 0xffffffffa47dd2ff, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x00000000707aa8e1), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(packuw, x3, x29, x14, 0x00000000707aa8e1, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xffffffffe19b48c9), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(packuw, x4, x28, x13, 0xffffffffe19b48c9, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x00000000528a461d), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(packuw, x5, x27, x12, 0x00000000528a461d, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x00000000461d528a), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(packuw, x6, x26, x11, 0x00000000461d528a, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x0000000048c9e19b), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(packuw, x7, x25, x10, 0x0000000048c9e19b, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xffffffffa8e1707a), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(packuw, x8, x24, x9, 0xffffffffa8e1707a, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xffffffffd2ffa47d), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(packuw, x9, x23, x8, 0xffffffffd2ffa47d, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xffffffffadea121b), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(packuw, x10, x22, x7, 0xffffffffadea121b, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffff0000), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(packuw, x11, x21, x6, 0xffffffffffff0000, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffff0000), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(packuw, x12, x20, x5, 0xffffffffffff0000, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffff0000), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(packuw, x13, x19, x4, 0xffffffffffff0000, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffff0000), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(packuw, x14, x18, x3, 0xffffffffffff0000, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffff0000), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(packuw, x15, x17, x2, 0xffffffffffff0000, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffff0000), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(packuw, x16, x16, x1, 0xffffffffffff0000, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffff0000), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(packuw, x17, x15, x31, 0xffffffffffff0000, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffff0000), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(packuw, x18, x14, x30, 0xffffffffffff0000, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffff0000), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(packuw, x19, x13, x29, 0xffffffffffff0000, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffff0000), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(packuw, x20, x12, x28, 0xffffffffffff0000, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffff0000), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(packuw, x21, x11, x27, 0xffffffffffff0000, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffff0000), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(packuw, x22, x10, x26, 0xffffffffffff0000, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffff0000), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(packuw, x23, x9, x25, 0xffffffffffff0000, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffff0000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(packuw, x24, x8, x24, 0xffffffffffff0000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffff0000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(packuw, x25, x7, x23, 0xffffffffffff0000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffff0000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(packuw, x26, x6, x22, 0xffffffffffff0000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffff0001), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(packuw, x27, x5, x21, 0xffffffffffff0001, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffff0002), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(packuw, x28, x4, x20, 0xffffffffffff0002, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffff0004), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(packuw, x29, x3, x19, 0xffffffffffff0004, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffff0008), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(packuw, x30, x2, x18, 0xffffffffffff0008, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffff0010), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(packuw, x31, x1, x17, 0xffffffffffff0010, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffff0020), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(packuw, x1, x31, x16, 0xffffffffffff0020, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffff0040), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(packuw, x2, x30, x15, 0xffffffffffff0040, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffff0080), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(packuw, x3, x29, x14, 0xffffffffffff0080, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffff0100), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(packuw, x4, x28, x13, 0xffffffffffff0100, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffff0200), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(packuw, x5, x27, x12, 0xffffffffffff0200, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffff0400), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(packuw, x6, x26, x11, 0xffffffffffff0400, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffff0800), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(packuw, x7, x25, x10, 0xffffffffffff0800, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffff1000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(packuw, x8, x24, x9, 0xffffffffffff1000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffff2000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(packuw, x9, x23, x8, 0xffffffffffff2000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffff4000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(packuw, x10, x22, x7, 0xffffffffffff4000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffff8000), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(packuw, x11, x21, x6, 0xffffffffffff8000, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffff0000), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(packuw, x12, x20, x5, 0xffffffffffff0000, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x000000007fff0000), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(packuw, x13, x19, x4, 0x000000007fff0000, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xffffffffbfff0000), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(packuw, x14, x18, x3, 0xffffffffbfff0000, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xffffffffdfff0000), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(packuw, x15, x17, x2, 0xffffffffdfff0000, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xffffffffefff0000), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(packuw, x16, x16, x1, 0xffffffffefff0000, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xfffffffff7ff0000), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(packuw, x17, x15, x31, 0xfffffffff7ff0000, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xfffffffffbff0000), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(packuw, x18, x14, x30, 0xfffffffffbff0000, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xfffffffffdff0000), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(packuw, x19, x13, x29, 0xfffffffffdff0000, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffeff0000), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(packuw, x20, x12, x28, 0xfffffffffeff0000, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xffffffffff7f0000), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(packuw, x21, x11, x27, 0xffffffffff7f0000, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffbf0000), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(packuw, x22, x10, x26, 0xffffffffffbf0000, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffdf0000), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(packuw, x23, x9, x25, 0xffffffffffdf0000, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffef0000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(packuw, x24, x8, x24, 0xffffffffffef0000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xfffffffffff70000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(packuw, x25, x7, x23, 0xfffffffffff70000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xfffffffffffb0000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(packuw, x26, x6, x22, 0xfffffffffffb0000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xfffffffffffd0000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(packuw, x27, x5, x21, 0xfffffffffffd0000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffe0000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(packuw, x28, x4, x20, 0xfffffffffffe0000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffff0000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(packuw, x29, x3, x19, 0xffffffffffff0000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffff0000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(packuw, x30, x2, x18, 0xffffffffffff0000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffff0000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(packuw, x31, x1, x17, 0xffffffffffff0000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffff0000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(packuw, x1, x31, x16, 0xffffffffffff0000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffff0000), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(packuw, x2, x30, x15, 0xffffffffffff0000, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffff0000), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(packuw, x3, x29, x14, 0xffffffffffff0000, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffff0000), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(packuw, x4, x28, x13, 0xffffffffffff0000, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffff0000), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(packuw, x5, x27, x12, 0xffffffffffff0000, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffff0000), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(packuw, x6, x26, x11, 0xffffffffffff0000, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffff0000), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(packuw, x7, x25, x10, 0xffffffffffff0000, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffff0000), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(packuw, x8, x24, x9, 0xffffffffffff0000, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffff0000), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(packuw, x9, x23, x8, 0xffffffffffff0000, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffff0000), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(packuw, x10, x22, x7, 0xffffffffffff0000, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffff0000), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(packuw, x11, x21, x6, 0xffffffffffff0000, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffff0000), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(packuw, x12, x20, x5, 0xffffffffffff0000, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffff0000), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(packuw, x13, x19, x4, 0xffffffffffff0000, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x000000000000ffff), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packuw, x14, x18, x3, 0x000000000000ffff, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x000000000000ffff), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(packuw, x15, x17, x2, 0x000000000000ffff, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x000000000000ffff), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(packuw, x16, x16, x1, 0x000000000000ffff, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x000000000000ffff), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(packuw, x17, x15, x31, 0x000000000000ffff, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x000000000000ffff), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(packuw, x18, x14, x30, 0x000000000000ffff, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x000000000000ffff), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(packuw, x19, x13, x29, 0x000000000000ffff, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x000000000000ffff), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(packuw, x20, x12, x28, 0x000000000000ffff, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x000000000000ffff), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(packuw, x21, x11, x27, 0x000000000000ffff, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x000000000000ffff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(packuw, x22, x10, x26, 0x000000000000ffff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x000000000000ffff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(packuw, x23, x9, x25, 0x000000000000ffff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x000000000000ffff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(packuw, x24, x8, x24, 0x000000000000ffff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x000000000000ffff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(packuw, x25, x7, x23, 0x000000000000ffff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x000000000000ffff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(packuw, x26, x6, x22, 0x000000000000ffff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x000000000000ffff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(packuw, x27, x5, x21, 0x000000000000ffff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x000000000000ffff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(packuw, x28, x4, x20, 0x000000000000ffff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x000000000000ffff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(packuw, x29, x3, x19, 0x000000000000ffff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x000000000000fffe), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(packuw, x30, x2, x18, 0x000000000000fffe, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x000000000000fffd), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(packuw, x31, x1, x17, 0x000000000000fffd, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x000000000000fffb), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(packuw, x1, x31, x16, 0x000000000000fffb, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x000000000000fff7), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(packuw, x2, x30, x15, 0x000000000000fff7, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x000000000000ffef), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(packuw, x3, x29, x14, 0x000000000000ffef, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x000000000000ffdf), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(packuw, x4, x28, x13, 0x000000000000ffdf, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x000000000000ffbf), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(packuw, x5, x27, x12, 0x000000000000ffbf, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x000000000000ff7f), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(packuw, x6, x26, x11, 0x000000000000ff7f, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x000000000000feff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(packuw, x7, x25, x10, 0x000000000000feff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x000000000000fdff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(packuw, x8, x24, x9, 0x000000000000fdff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x000000000000fbff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(packuw, x9, x23, x8, 0x000000000000fbff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x000000000000f7ff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(packuw, x10, x22, x7, 0x000000000000f7ff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x000000000000efff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(packuw, x11, x21, x6, 0x000000000000efff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x000000000000dfff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(packuw, x12, x20, x5, 0x000000000000dfff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x000000000000bfff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(packuw, x13, x19, x4, 0x000000000000bfff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x0000000000007fff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(packuw, x14, x18, x3, 0x0000000000007fff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x000000000000ffff), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(packuw, x15, x17, x2, 0x000000000000ffff, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xffffffff8000ffff), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(packuw, x16, x16, x1, 0xffffffff8000ffff, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x000000004000ffff), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(packuw, x17, x15, x31, 0x000000004000ffff, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x000000002000ffff), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(packuw, x18, x14, x30, 0x000000002000ffff, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x000000001000ffff), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(packuw, x19, x13, x29, 0x000000001000ffff, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x000000000800ffff), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(packuw, x20, x12, x28, 0x000000000800ffff, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x000000000400ffff), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(packuw, x21, x11, x27, 0x000000000400ffff, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x000000000200ffff), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(packuw, x22, x10, x26, 0x000000000200ffff, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x000000000100ffff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(packuw, x23, x9, x25, 0x000000000100ffff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x000000000080ffff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(packuw, x24, x8, x24, 0x000000000080ffff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x000000000040ffff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(packuw, x25, x7, x23, 0x000000000040ffff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x000000000020ffff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(packuw, x26, x6, x22, 0x000000000020ffff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x000000000010ffff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(packuw, x27, x5, x21, 0x000000000010ffff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x000000000008ffff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(packuw, x28, x4, x20, 0x000000000008ffff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x000000000004ffff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(packuw, x29, x3, x19, 0x000000000004ffff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x000000000002ffff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(packuw, x30, x2, x18, 0x000000000002ffff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x000000000001ffff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(packuw, x31, x1, x17, 0x000000000001ffff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x000000000000ffff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(packuw, x1, x31, x16, 0x000000000000ffff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x000000000000ffff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(packuw, x2, x30, x15, 0x000000000000ffff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x000000000000ffff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(packuw, x3, x29, x14, 0x000000000000ffff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x000000000000ffff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(packuw, x4, x28, x13, 0x000000000000ffff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x000000000000ffff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(packuw, x5, x27, x12, 0x000000000000ffff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x000000000000ffff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(packuw, x6, x26, x11, 0x000000000000ffff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x000000000000ffff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(packuw, x7, x25, x10, 0x000000000000ffff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x000000000000ffff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(packuw, x8, x24, x9, 0x000000000000ffff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x000000000000ffff), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(packuw, x9, x23, x8, 0x000000000000ffff, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x000000000000ffff), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(packuw, x10, x22, x7, 0x000000000000ffff, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x000000000000ffff), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(packuw, x11, x21, x6, 0x000000000000ffff, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x000000000000ffff), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(packuw, x12, x20, x5, 0x000000000000ffff, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x000000000000ffff), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(packuw, x13, x19, x4, 0x000000000000ffff, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x000000000000ffff), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(packuw, x14, x18, x3, 0x000000000000ffff, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x000000000000ffff), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(packuw, x15, x17, x2, 0x000000000000ffff, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x000000000000ffff), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(packuw, x16, x16, x1, 0x000000000000ffff, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packuw, x17, x15, x31, 0x0000000000000000, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packuw, x18, x14, x30, 0x0000000000000000, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packuw, x19, x13, x29, 0x0000000000000000, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packuw, x20, x12, x28, 0x0000000000000000, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packuw, x21, x11, x27, 0x0000000000000000, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packuw, x22, x10, x26, 0x0000000000000000, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packuw, x23, x9, x25, 0x0000000000000000, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packuw, x24, x8, x24, 0x0000000000000000, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packuw, x25, x7, x23, 0x0000000000000000, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packuw, x26, x6, x22, 0x0000000000000000, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packuw, x27, x5, x21, 0x0000000000000000, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packuw, x28, x4, x20, 0x0000000000000000, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packuw, x29, x3, x19, 0x0000000000000000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packuw, x30, x2, x18, 0x0000000000000000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packuw, x31, x1, x17, 0x0000000000000000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packuw, x1, x31, x16, 0x0000000000000000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000001), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packuw, x2, x30, x15, 0x0000000000000001, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000002), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packuw, x3, x29, x14, 0x0000000000000002, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000004), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packuw, x4, x28, x13, 0x0000000000000004, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000008), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packuw, x5, x27, x12, 0x0000000000000008, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000010), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packuw, x6, x26, x11, 0x0000000000000010, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000020), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packuw, x7, x25, x10, 0x0000000000000020, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000040), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packuw, x8, x24, x9, 0x0000000000000040, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000080), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packuw, x9, x23, x8, 0x0000000000000080, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000100), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packuw, x10, x22, x7, 0x0000000000000100, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000200), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packuw, x11, x21, x6, 0x0000000000000200, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000400), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packuw, x12, x20, x5, 0x0000000000000400, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000800), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packuw, x13, x19, x4, 0x0000000000000800, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000000001000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packuw, x14, x18, x3, 0x0000000000001000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000000002000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packuw, x15, x17, x2, 0x0000000000002000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000000004000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packuw, x16, x16, x1, 0x0000000000004000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000000008000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packuw, x17, x15, x31, 0x0000000000008000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packuw, x18, x14, x30, 0x0000000000000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packuw, x19, x13, x29, 0x0000000000000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packuw, x20, x12, x28, 0x0000000000000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packuw, x21, x11, x27, 0x0000000000000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packuw, x22, x10, x26, 0x0000000000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packuw, x23, x9, x25, 0x0000000000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packuw, x24, x8, x24, 0x0000000000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packuw, x25, x7, x23, 0x0000000000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packuw, x26, x6, x22, 0x0000000000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packuw, x27, x5, x21, 0x0000000000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packuw, x28, x4, x20, 0x0000000000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packuw, x29, x3, x19, 0x0000000000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packuw, x30, x2, x18, 0x0000000000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packuw, x31, x1, x17, 0x0000000000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packuw, x1, x31, x16, 0x0000000000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packuw, x2, x30, x15, 0x0000000000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packuw, x3, x29, x14, 0x0000000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packuw, x4, x28, x13, 0x0000000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packuw, x5, x27, x12, 0x0000000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packuw, x6, x26, x11, 0x0000000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packuw, x7, x25, x10, 0x0000000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packuw, x8, x24, x9, 0x0000000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packuw, x9, x23, x8, 0x0000000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packuw, x10, x22, x7, 0x0000000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packuw, x11, x21, x6, 0x0000000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packuw, x12, x20, x5, 0x0000000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packuw, x13, x19, x4, 0x0000000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packuw, x14, x18, x3, 0x0000000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packuw, x15, x17, x2, 0x0000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packuw, x16, x16, x1, 0x0000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packuw, x17, x15, x31, 0x0000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packuw, x18, x14, x30, 0x0000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packuw, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x000000000000ffff), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packuw, x20, x12, x28, 0x000000000000ffff, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x000000000000ffff), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packuw, x21, x11, x27, 0x000000000000ffff, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x000000000000ffff), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packuw, x22, x10, x26, 0x000000000000ffff, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x000000000000ffff), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packuw, x23, x9, x25, 0x000000000000ffff, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x000000000000ffff), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packuw, x24, x8, x24, 0x000000000000ffff, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x000000000000ffff), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packuw, x25, x7, x23, 0x000000000000ffff, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x000000000000ffff), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packuw, x26, x6, x22, 0x000000000000ffff, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x000000000000ffff), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packuw, x27, x5, x21, 0x000000000000ffff, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x000000000000ffff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packuw, x28, x4, x20, 0x000000000000ffff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x000000000000ffff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packuw, x29, x3, x19, 0x000000000000ffff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x000000000000ffff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packuw, x30, x2, x18, 0x000000000000ffff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x000000000000ffff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packuw, x31, x1, x17, 0x000000000000ffff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x000000000000ffff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packuw, x1, x31, x16, 0x000000000000ffff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x000000000000ffff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packuw, x2, x30, x15, 0x000000000000ffff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x000000000000ffff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packuw, x3, x29, x14, 0x000000000000ffff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x000000000000ffff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packuw, x4, x28, x13, 0x000000000000ffff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x000000000000fffe), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packuw, x5, x27, x12, 0x000000000000fffe, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x000000000000fffd), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packuw, x6, x26, x11, 0x000000000000fffd, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x000000000000fffb), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packuw, x7, x25, x10, 0x000000000000fffb, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x000000000000fff7), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packuw, x8, x24, x9, 0x000000000000fff7, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x000000000000ffef), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packuw, x9, x23, x8, 0x000000000000ffef, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x000000000000ffdf), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packuw, x10, x22, x7, 0x000000000000ffdf, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x000000000000ffbf), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packuw, x11, x21, x6, 0x000000000000ffbf, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x000000000000ff7f), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packuw, x12, x20, x5, 0x000000000000ff7f, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x000000000000feff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packuw, x13, x19, x4, 0x000000000000feff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x000000000000fdff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packuw, x14, x18, x3, 0x000000000000fdff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x000000000000fbff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packuw, x15, x17, x2, 0x000000000000fbff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x000000000000f7ff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packuw, x16, x16, x1, 0x000000000000f7ff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x000000000000efff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packuw, x17, x15, x31, 0x000000000000efff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x000000000000dfff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packuw, x18, x14, x30, 0x000000000000dfff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x000000000000bfff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packuw, x19, x13, x29, 0x000000000000bfff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x0000000000007fff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packuw, x20, x12, x28, 0x0000000000007fff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x000000000000ffff), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packuw, x21, x11, x27, 0x000000000000ffff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x000000000000ffff), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packuw, x22, x10, x26, 0x000000000000ffff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x000000000000ffff), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packuw, x23, x9, x25, 0x000000000000ffff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x000000000000ffff), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packuw, x24, x8, x24, 0x000000000000ffff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x000000000000ffff), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packuw, x25, x7, x23, 0x000000000000ffff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x000000000000ffff), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packuw, x26, x6, x22, 0x000000000000ffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x000000000000ffff), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packuw, x27, x5, x21, 0x000000000000ffff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x000000000000ffff), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packuw, x28, x4, x20, 0x000000000000ffff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x000000000000ffff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packuw, x29, x3, x19, 0x000000000000ffff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x000000000000ffff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packuw, x30, x2, x18, 0x000000000000ffff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x000000000000ffff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packuw, x31, x1, x17, 0x000000000000ffff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x000000000000ffff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packuw, x1, x31, x16, 0x000000000000ffff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x000000000000ffff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packuw, x2, x30, x15, 0x000000000000ffff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x000000000000ffff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packuw, x3, x29, x14, 0x000000000000ffff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x000000000000ffff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packuw, x4, x28, x13, 0x000000000000ffff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x000000000000ffff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packuw, x5, x27, x12, 0x000000000000ffff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x000000000000ffff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packuw, x6, x26, x11, 0x000000000000ffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x000000000000ffff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packuw, x7, x25, x10, 0x000000000000ffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x000000000000ffff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packuw, x8, x24, x9, 0x000000000000ffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x000000000000ffff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packuw, x9, x23, x8, 0x000000000000ffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x000000000000ffff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packuw, x10, x22, x7, 0x000000000000ffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x000000000000ffff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packuw, x11, x21, x6, 0x000000000000ffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x000000000000ffff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packuw, x12, x20, x5, 0x000000000000ffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x000000000000ffff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packuw, x13, x19, x4, 0x000000000000ffff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x000000000000ffff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packuw, x14, x18, x3, 0x000000000000ffff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x000000000000ffff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packuw, x15, x17, x2, 0x000000000000ffff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x000000000000ffff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packuw, x16, x16, x1, 0x000000000000ffff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x000000000000ffff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packuw, x17, x15, x31, 0x000000000000ffff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x000000000000ffff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packuw, x18, x14, x30, 0x000000000000ffff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x000000000000ffff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packuw, x19, x13, x29, 0x000000000000ffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x000000000000ffff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packuw, x20, x12, x28, 0x000000000000ffff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x000000000000ffff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packuw, x21, x11, x27, 0x000000000000ffff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x000000000000ffff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packuw, x22, x10, x26, 0x000000000000ffff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x00000000121b121b), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(packuw, x23, x25, x25, 0x00000000121b121b, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(packuw, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x000000000000a8e1), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(packuw, x25, x7, x0, 0x000000000000a8e1, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0xffffffffe19b0000), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(packuw, x26, x0, x22, 0xffffffffe19b0000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/PACKW-01.S b/riscof/suite/rv64i_m/K_unratified/PACKW-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..e12c4c6ccf7641e8bd651e3b22ddd3d0e16c9bbb
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/PACKW-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test PACKW-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'packw'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",packw)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",packw)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",packw)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xffffffffcc235195), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(packw, x1, x31, x16, 0xffffffffcc235195, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x00000000105bbec1), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(packw, x2, x30, x15, 0x00000000105bbec1, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xfffffffff2c0a8bb), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(packw, x3, x29, x14, 0xfffffffff2c0a8bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xfffffffffbc39fcb), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(packw, x4, x28, x13, 0xfffffffffbc39fcb, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x0000000010af524f), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(packw, x5, x27, x12, 0x0000000010af524f, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x00000000524f10af), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(packw, x6, x26, x11, 0x00000000524f10af, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xffffffff9fcbfbc3), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(packw, x7, x25, x10, 0xffffffff9fcbfbc3, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xffffffffa8bbf2c0), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(packw, x8, x24, x9, 0xffffffffa8bbf2c0, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xffffffffbec1105b), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(packw, x9, x23, x8, 0xffffffffbec1105b, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x000000005195cc23), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(packw, x10, x22, x7, 0x000000005195cc23, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffff0001), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(packw, x11, x21, x6, 0xffffffffffff0001, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffff0002), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(packw, x12, x20, x5, 0xffffffffffff0002, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffff0004), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(packw, x13, x19, x4, 0xffffffffffff0004, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffff0008), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(packw, x14, x18, x3, 0xffffffffffff0008, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffff0010), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(packw, x15, x17, x2, 0xffffffffffff0010, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffff0020), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(packw, x16, x16, x1, 0xffffffffffff0020, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffff0040), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(packw, x17, x15, x31, 0xffffffffffff0040, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffff0080), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(packw, x18, x14, x30, 0xffffffffffff0080, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffff0100), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(packw, x19, x13, x29, 0xffffffffffff0100, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffff0200), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(packw, x20, x12, x28, 0xffffffffffff0200, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffff0400), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(packw, x21, x11, x27, 0xffffffffffff0400, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffff0800), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(packw, x22, x10, x26, 0xffffffffffff0800, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffff1000), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(packw, x23, x9, x25, 0xffffffffffff1000, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffff2000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(packw, x24, x8, x24, 0xffffffffffff2000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffff4000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(packw, x25, x7, x23, 0xffffffffffff4000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffff8000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(packw, x26, x6, x22, 0xffffffffffff8000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffff0000), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(packw, x27, x5, x21, 0xffffffffffff0000, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffff0000), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(packw, x28, x4, x20, 0xffffffffffff0000, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffff0000), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(packw, x29, x3, x19, 0xffffffffffff0000, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffff0000), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(packw, x30, x2, x18, 0xffffffffffff0000, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffff0000), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(packw, x31, x1, x17, 0xffffffffffff0000, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffff0000), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(packw, x1, x31, x16, 0xffffffffffff0000, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffff0000), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(packw, x2, x30, x15, 0xffffffffffff0000, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffff0000), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(packw, x3, x29, x14, 0xffffffffffff0000, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffff0000), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(packw, x4, x28, x13, 0xffffffffffff0000, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffff0000), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(packw, x5, x27, x12, 0xffffffffffff0000, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffff0000), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(packw, x6, x26, x11, 0xffffffffffff0000, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffff0000), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(packw, x7, x25, x10, 0xffffffffffff0000, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffff0000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(packw, x8, x24, x9, 0xffffffffffff0000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffff0000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(packw, x9, x23, x8, 0xffffffffffff0000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffff0000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(packw, x10, x22, x7, 0xffffffffffff0000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffff0000), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(packw, x11, x21, x6, 0xffffffffffff0000, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffff0000), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(packw, x12, x20, x5, 0xffffffffffff0000, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffff0000), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(packw, x13, x19, x4, 0xffffffffffff0000, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffff0000), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(packw, x14, x18, x3, 0xffffffffffff0000, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffff0000), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(packw, x15, x17, x2, 0xffffffffffff0000, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffff0000), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(packw, x16, x16, x1, 0xffffffffffff0000, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffff0000), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(packw, x17, x15, x31, 0xffffffffffff0000, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffff0000), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(packw, x18, x14, x30, 0xffffffffffff0000, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffff0000), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(packw, x19, x13, x29, 0xffffffffffff0000, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffff0000), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(packw, x20, x12, x28, 0xffffffffffff0000, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffff0000), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(packw, x21, x11, x27, 0xffffffffffff0000, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffff0000), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(packw, x22, x10, x26, 0xffffffffffff0000, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffff0000), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(packw, x23, x9, x25, 0xffffffffffff0000, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffff0000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(packw, x24, x8, x24, 0xffffffffffff0000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffff0000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(packw, x25, x7, x23, 0xffffffffffff0000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffff0000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(packw, x26, x6, x22, 0xffffffffffff0000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffff0000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(packw, x27, x5, x21, 0xffffffffffff0000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffff0000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(packw, x28, x4, x20, 0xffffffffffff0000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x000000007fff0000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(packw, x29, x3, x19, 0x000000007fff0000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0xffffffffbfff0000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(packw, x30, x2, x18, 0xffffffffbfff0000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0xffffffffdfff0000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(packw, x31, x1, x17, 0xffffffffdfff0000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0xffffffffefff0000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(packw, x1, x31, x16, 0xffffffffefff0000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0xfffffffff7ff0000), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(packw, x2, x30, x15, 0xfffffffff7ff0000, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0xfffffffffbff0000), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(packw, x3, x29, x14, 0xfffffffffbff0000, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0xfffffffffdff0000), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(packw, x4, x28, x13, 0xfffffffffdff0000, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffeff0000), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(packw, x5, x27, x12, 0xfffffffffeff0000, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0xffffffffff7f0000), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(packw, x6, x26, x11, 0xffffffffff7f0000, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffbf0000), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(packw, x7, x25, x10, 0xffffffffffbf0000, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffdf0000), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(packw, x8, x24, x9, 0xffffffffffdf0000, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffef0000), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(packw, x9, x23, x8, 0xffffffffffef0000, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0xfffffffffff70000), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(packw, x10, x22, x7, 0xfffffffffff70000, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0xfffffffffffb0000), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(packw, x11, x21, x6, 0xfffffffffffb0000, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0xfffffffffffd0000), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(packw, x12, x20, x5, 0xfffffffffffd0000, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0xfffffffffffe0000), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(packw, x13, x19, x4, 0xfffffffffffe0000, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x000000000000fffe), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packw, x14, x18, x3, 0x000000000000fffe, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x000000000000fffd), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(packw, x15, x17, x2, 0x000000000000fffd, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x000000000000fffb), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(packw, x16, x16, x1, 0x000000000000fffb, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x000000000000fff7), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(packw, x17, x15, x31, 0x000000000000fff7, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x000000000000ffef), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(packw, x18, x14, x30, 0x000000000000ffef, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x000000000000ffdf), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(packw, x19, x13, x29, 0x000000000000ffdf, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x000000000000ffbf), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(packw, x20, x12, x28, 0x000000000000ffbf, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x000000000000ff7f), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(packw, x21, x11, x27, 0x000000000000ff7f, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x000000000000feff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(packw, x22, x10, x26, 0x000000000000feff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x000000000000fdff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(packw, x23, x9, x25, 0x000000000000fdff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x000000000000fbff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(packw, x24, x8, x24, 0x000000000000fbff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x000000000000f7ff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(packw, x25, x7, x23, 0x000000000000f7ff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x000000000000efff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(packw, x26, x6, x22, 0x000000000000efff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x000000000000dfff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(packw, x27, x5, x21, 0x000000000000dfff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x000000000000bfff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(packw, x28, x4, x20, 0x000000000000bfff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x0000000000007fff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(packw, x29, x3, x19, 0x0000000000007fff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x000000000000ffff), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(packw, x30, x2, x18, 0x000000000000ffff, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x000000000000ffff), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(packw, x31, x1, x17, 0x000000000000ffff, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x000000000000ffff), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(packw, x1, x31, x16, 0x000000000000ffff, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x000000000000ffff), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(packw, x2, x30, x15, 0x000000000000ffff, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x000000000000ffff), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(packw, x3, x29, x14, 0x000000000000ffff, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x000000000000ffff), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(packw, x4, x28, x13, 0x000000000000ffff, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x000000000000ffff), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(packw, x5, x27, x12, 0x000000000000ffff, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x000000000000ffff), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(packw, x6, x26, x11, 0x000000000000ffff, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x000000000000ffff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(packw, x7, x25, x10, 0x000000000000ffff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x000000000000ffff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(packw, x8, x24, x9, 0x000000000000ffff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x000000000000ffff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(packw, x9, x23, x8, 0x000000000000ffff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x000000000000ffff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(packw, x10, x22, x7, 0x000000000000ffff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x000000000000ffff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(packw, x11, x21, x6, 0x000000000000ffff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x000000000000ffff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(packw, x12, x20, x5, 0x000000000000ffff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x000000000000ffff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(packw, x13, x19, x4, 0x000000000000ffff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x000000000000ffff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(packw, x14, x18, x3, 0x000000000000ffff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x000000000000ffff), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(packw, x15, x17, x2, 0x000000000000ffff, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x000000000000ffff), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(packw, x16, x16, x1, 0x000000000000ffff, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x000000000000ffff), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(packw, x17, x15, x31, 0x000000000000ffff, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x000000000000ffff), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(packw, x18, x14, x30, 0x000000000000ffff, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x000000000000ffff), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(packw, x19, x13, x29, 0x000000000000ffff, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x000000000000ffff), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(packw, x20, x12, x28, 0x000000000000ffff, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x000000000000ffff), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(packw, x21, x11, x27, 0x000000000000ffff, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x000000000000ffff), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(packw, x22, x10, x26, 0x000000000000ffff, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x000000000000ffff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(packw, x23, x9, x25, 0x000000000000ffff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x000000000000ffff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(packw, x24, x8, x24, 0x000000000000ffff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x000000000000ffff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(packw, x25, x7, x23, 0x000000000000ffff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x000000000000ffff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(packw, x26, x6, x22, 0x000000000000ffff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x000000000000ffff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(packw, x27, x5, x21, 0x000000000000ffff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x000000000000ffff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(packw, x28, x4, x20, 0x000000000000ffff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x000000000000ffff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(packw, x29, x3, x19, 0x000000000000ffff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x000000000000ffff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(packw, x30, x2, x18, 0x000000000000ffff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x000000000000ffff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(packw, x31, x1, x17, 0x000000000000ffff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffffffff8000ffff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(packw, x1, x31, x16, 0xffffffff8000ffff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x000000004000ffff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(packw, x2, x30, x15, 0x000000004000ffff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x000000002000ffff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(packw, x3, x29, x14, 0x000000002000ffff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x000000001000ffff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(packw, x4, x28, x13, 0x000000001000ffff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x000000000800ffff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(packw, x5, x27, x12, 0x000000000800ffff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x000000000400ffff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(packw, x6, x26, x11, 0x000000000400ffff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x000000000200ffff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(packw, x7, x25, x10, 0x000000000200ffff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x000000000100ffff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(packw, x8, x24, x9, 0x000000000100ffff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x000000000080ffff), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(packw, x9, x23, x8, 0x000000000080ffff, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x000000000040ffff), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(packw, x10, x22, x7, 0x000000000040ffff, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x000000000020ffff), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(packw, x11, x21, x6, 0x000000000020ffff, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x000000000010ffff), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(packw, x12, x20, x5, 0x000000000010ffff, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x000000000008ffff), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(packw, x13, x19, x4, 0x000000000008ffff, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x000000000004ffff), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(packw, x14, x18, x3, 0x000000000004ffff, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x000000000002ffff), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(packw, x15, x17, x2, 0x000000000002ffff, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x000000000001ffff), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(packw, x16, x16, x1, 0x000000000001ffff, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000001), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packw, x17, x15, x31, 0x0000000000000001, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000002), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packw, x18, x14, x30, 0x0000000000000002, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000004), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packw, x19, x13, x29, 0x0000000000000004, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000008), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packw, x20, x12, x28, 0x0000000000000008, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000010), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packw, x21, x11, x27, 0x0000000000000010, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000020), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packw, x22, x10, x26, 0x0000000000000020, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000040), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packw, x23, x9, x25, 0x0000000000000040, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000080), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packw, x24, x8, x24, 0x0000000000000080, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000100), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packw, x25, x7, x23, 0x0000000000000100, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000200), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packw, x26, x6, x22, 0x0000000000000200, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000400), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packw, x27, x5, x21, 0x0000000000000400, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000800), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packw, x28, x4, x20, 0x0000000000000800, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000001000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packw, x29, x3, x19, 0x0000000000001000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000002000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packw, x30, x2, x18, 0x0000000000002000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000004000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packw, x31, x1, x17, 0x0000000000004000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000008000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packw, x1, x31, x16, 0x0000000000008000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packw, x2, x30, x15, 0x0000000000000000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packw, x3, x29, x14, 0x0000000000000000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packw, x4, x28, x13, 0x0000000000000000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packw, x5, x27, x12, 0x0000000000000000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packw, x6, x26, x11, 0x0000000000000000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packw, x7, x25, x10, 0x0000000000000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packw, x8, x24, x9, 0x0000000000000000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packw, x9, x23, x8, 0x0000000000000000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packw, x10, x22, x7, 0x0000000000000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packw, x11, x21, x6, 0x0000000000000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packw, x12, x20, x5, 0x0000000000000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packw, x13, x19, x4, 0x0000000000000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packw, x14, x18, x3, 0x0000000000000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packw, x15, x17, x2, 0x0000000000000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packw, x16, x16, x1, 0x0000000000000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packw, x17, x15, x31, 0x0000000000000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packw, x18, x14, x30, 0x0000000000000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packw, x19, x13, x29, 0x0000000000000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packw, x20, x12, x28, 0x0000000000000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packw, x21, x11, x27, 0x0000000000000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packw, x22, x10, x26, 0x0000000000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packw, x23, x9, x25, 0x0000000000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packw, x24, x8, x24, 0x0000000000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packw, x25, x7, x23, 0x0000000000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packw, x26, x6, x22, 0x0000000000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packw, x27, x5, x21, 0x0000000000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packw, x28, x4, x20, 0x0000000000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packw, x29, x3, x19, 0x0000000000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packw, x30, x2, x18, 0x0000000000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packw, x31, x1, x17, 0x0000000000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packw, x1, x31, x16, 0x0000000000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packw, x2, x30, x15, 0x0000000000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packw, x3, x29, x14, 0x0000000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packw, x4, x28, x13, 0x0000000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packw, x5, x27, x12, 0x0000000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packw, x6, x26, x11, 0x0000000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packw, x7, x25, x10, 0x0000000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packw, x8, x24, x9, 0x0000000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packw, x9, x23, x8, 0x0000000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packw, x10, x22, x7, 0x0000000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packw, x11, x21, x6, 0x0000000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packw, x12, x20, x5, 0x0000000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packw, x13, x19, x4, 0x0000000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packw, x14, x18, x3, 0x0000000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packw, x15, x17, x2, 0x0000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packw, x16, x16, x1, 0x0000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packw, x17, x15, x31, 0x0000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packw, x18, x14, x30, 0x0000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packw, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x000000000000fffe), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packw, x20, x12, x28, 0x000000000000fffe, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x000000000000fffd), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packw, x21, x11, x27, 0x000000000000fffd, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x000000000000fffb), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packw, x22, x10, x26, 0x000000000000fffb, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x000000000000fff7), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packw, x23, x9, x25, 0x000000000000fff7, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x000000000000ffef), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packw, x24, x8, x24, 0x000000000000ffef, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x000000000000ffdf), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packw, x25, x7, x23, 0x000000000000ffdf, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x000000000000ffbf), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packw, x26, x6, x22, 0x000000000000ffbf, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x000000000000ff7f), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packw, x27, x5, x21, 0x000000000000ff7f, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x000000000000feff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packw, x28, x4, x20, 0x000000000000feff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x000000000000fdff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packw, x29, x3, x19, 0x000000000000fdff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x000000000000fbff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packw, x30, x2, x18, 0x000000000000fbff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x000000000000f7ff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packw, x31, x1, x17, 0x000000000000f7ff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x000000000000efff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packw, x1, x31, x16, 0x000000000000efff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x000000000000dfff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packw, x2, x30, x15, 0x000000000000dfff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x000000000000bfff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packw, x3, x29, x14, 0x000000000000bfff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x0000000000007fff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packw, x4, x28, x13, 0x0000000000007fff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x000000000000ffff), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packw, x5, x27, x12, 0x000000000000ffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x000000000000ffff), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packw, x6, x26, x11, 0x000000000000ffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x000000000000ffff), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packw, x7, x25, x10, 0x000000000000ffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x000000000000ffff), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packw, x8, x24, x9, 0x000000000000ffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x000000000000ffff), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packw, x9, x23, x8, 0x000000000000ffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x000000000000ffff), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packw, x10, x22, x7, 0x000000000000ffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x000000000000ffff), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packw, x11, x21, x6, 0x000000000000ffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x000000000000ffff), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packw, x12, x20, x5, 0x000000000000ffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x000000000000ffff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packw, x13, x19, x4, 0x000000000000ffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x000000000000ffff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packw, x14, x18, x3, 0x000000000000ffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x000000000000ffff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packw, x15, x17, x2, 0x000000000000ffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x000000000000ffff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packw, x16, x16, x1, 0x000000000000ffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x000000000000ffff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packw, x17, x15, x31, 0x000000000000ffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x000000000000ffff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packw, x18, x14, x30, 0x000000000000ffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x000000000000ffff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packw, x19, x13, x29, 0x000000000000ffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x000000000000ffff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packw, x20, x12, x28, 0x000000000000ffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x000000000000ffff), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packw, x21, x11, x27, 0x000000000000ffff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x000000000000ffff), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packw, x22, x10, x26, 0x000000000000ffff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x000000000000ffff), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(packw, x23, x9, x25, 0x000000000000ffff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x000000000000ffff), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(packw, x24, x8, x24, 0x000000000000ffff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x000000000000ffff), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(packw, x25, x7, x23, 0x000000000000ffff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x000000000000ffff), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(packw, x26, x6, x22, 0x000000000000ffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x000000000000ffff), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(packw, x27, x5, x21, 0x000000000000ffff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x000000000000ffff), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(packw, x28, x4, x20, 0x000000000000ffff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x000000000000ffff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(packw, x29, x3, x19, 0x000000000000ffff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x000000000000ffff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(packw, x30, x2, x18, 0x000000000000ffff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x000000000000ffff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(packw, x31, x1, x17, 0x000000000000ffff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x000000000000ffff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(packw, x1, x31, x16, 0x000000000000ffff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x000000000000ffff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(packw, x2, x30, x15, 0x000000000000ffff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x000000000000ffff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(packw, x3, x29, x14, 0x000000000000ffff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x000000000000ffff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(packw, x4, x28, x13, 0x000000000000ffff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x000000000000ffff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(packw, x5, x27, x12, 0x000000000000ffff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x000000000000ffff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(packw, x6, x26, x11, 0x000000000000ffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x000000000000ffff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(packw, x7, x25, x10, 0x000000000000ffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x000000000000ffff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(packw, x8, x24, x9, 0x000000000000ffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x000000000000ffff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(packw, x9, x23, x8, 0x000000000000ffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x000000000000ffff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(packw, x10, x22, x7, 0x000000000000ffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x000000000000ffff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(packw, x11, x21, x6, 0x000000000000ffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x000000000000ffff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(packw, x12, x20, x5, 0x000000000000ffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x000000000000ffff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(packw, x13, x19, x4, 0x000000000000ffff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x000000000000ffff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(packw, x14, x18, x3, 0x000000000000ffff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x000000000000ffff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(packw, x15, x17, x2, 0x000000000000ffff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x000000000000ffff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(packw, x16, x16, x1, 0x000000000000ffff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x000000000000ffff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(packw, x17, x15, x31, 0x000000000000ffff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x000000000000ffff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(packw, x18, x14, x30, 0x000000000000ffff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x000000000000ffff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(packw, x19, x13, x29, 0x000000000000ffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x000000000000ffff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(packw, x20, x12, x28, 0x000000000000ffff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x000000000000ffff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(packw, x21, x11, x27, 0x000000000000ffff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x000000000000ffff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(packw, x22, x10, x26, 0x000000000000ffff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0xffffffffcc23cc23), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(packw, x23, x25, x25, 0xffffffffcc23cc23, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(packw, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x000000000000a8bb), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(packw, x25, x7, x0, 0x000000000000a8bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0xfffffffffbc30000), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(packw, x26, x0, x22, 0xfffffffffbc30000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/REV-B-01.S b/riscof/suite/rv64i_m/K_unratified/REV-B-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..c25c1d76da010836f2f038cd046e78faaa4eead8
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/REV-B-01.S
@@ -0,0 +1,2716 @@
+// RISC-V Architectural Validation Test REV-B-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'rev.b'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",rev.b)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",rev.b)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",rev.b)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x08bfbcb7b5578aa9), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ rev.b x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x08bfbcb7b5578aa9)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xbd943a474bff7d83), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ rev.b x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xbd943a474bff7d83)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x9326f9a0158715dd), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ rev.b x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x9326f9a0158715dd)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xac8294181293f9d3), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ rev.b x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xac8294181293f9d3)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x0845e20262b84af2), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ rev.b x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0845e20262b84af2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x2ad6702a4a5108f5), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ rev.b x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x2ad6702a4a5108f5)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xce95f42b87d9dfc3), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ rev.b x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xce95f42b87d9dfc3)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x416f2efe0e5e4f03), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ rev.b x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x416f2efe0e5e4f03)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xafb52d5825be08da), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ rev.b x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xafb52d5825be08da)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xfbfe1c2248d833c4), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ rev.b x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfbfe1c2248d833c4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000080), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ rev.b x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000000000080)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000040), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ rev.b x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000000000040)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000020), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ rev.b x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000000000020)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000010), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ rev.b x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000000000010)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000008), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ rev.b x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000000000008)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000004), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ rev.b x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000000000004)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000002), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ rev.b x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000000000002)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000001), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ rev.b x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000000000001)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000008000), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ rev.b x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000000008000)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000000004000), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ rev.b x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000000004000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000000002000), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ rev.b x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000002000)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000000001000), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ rev.b x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000001000)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000800), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ rev.b x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000800)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000400), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ rev.b x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000400)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000200), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ rev.b x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000200)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000100), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ rev.b x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000000000100)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000000800000), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ rev.b x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000800000)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000000400000), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ rev.b x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000400000)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000200000), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ rev.b x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000200000)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000100000), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ rev.b x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000100000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000080000), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ rev.b x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000080000)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000040000), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ rev.b x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000040000)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000020000), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ rev.b x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000020000)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000010000), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ rev.b x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000010000)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000080000000), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ rev.b x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000080000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000040000000), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ rev.b x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000040000000)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000020000000), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ rev.b x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000020000000)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000010000000), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ rev.b x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000010000000)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000008000000), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ rev.b x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000008000000)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000004000000), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ rev.b x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000004000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000002000000), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ rev.b x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000002000000)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000001000000), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ rev.b x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000001000000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000008000000000), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ rev.b x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000008000000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000004000000000), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ rev.b x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000004000000000)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000002000000000), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ rev.b x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000002000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000001000000000), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ rev.b x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000001000000000)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000800000000), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ rev.b x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000800000000)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000400000000), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ rev.b x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000400000000)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000200000000), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ rev.b x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000200000000)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000100000000), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ rev.b x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000100000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000800000000000), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ rev.b x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000800000000000)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000400000000000), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ rev.b x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000400000000000)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000200000000000), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ rev.b x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000200000000000)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000100000000000), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ rev.b x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000100000000000)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000080000000000), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ rev.b x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000080000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000040000000000), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ rev.b x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000040000000000)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000020000000000), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ rev.b x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000020000000000)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000010000000000), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ rev.b x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0000010000000000)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0080000000000000), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ rev.b x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0080000000000000)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0040000000000000), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ rev.b x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x0040000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0020000000000000), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ rev.b x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x0020000000000000)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0010000000000000), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ rev.b x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x0010000000000000)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0008000000000000), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ rev.b x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x0008000000000000)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0004000000000000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ rev.b x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0004000000000000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0002000000000000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ rev.b x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0002000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0001000000000000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ rev.b x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0001000000000000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x8000000000000000), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ rev.b x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x8000000000000000)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x4000000000000000), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ rev.b x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x4000000000000000)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x2000000000000000), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ rev.b x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x2000000000000000)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x1000000000000000), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ rev.b x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x1000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0800000000000000), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ rev.b x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0800000000000000)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0400000000000000), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ rev.b x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0400000000000000)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0200000000000000), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ rev.b x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0200000000000000)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0100000000000000), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ rev.b x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0100000000000000)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ rev.b x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffff7f), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ rev.b x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xffffffffffffff7f)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffbf), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ rev.b x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xffffffffffffffbf)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffdf), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ rev.b x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xffffffffffffffdf)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffef), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ rev.b x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0xffffffffffffffef)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xfffffffffffffff7), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ rev.b x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0xfffffffffffffff7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xfffffffffffffffb), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ rev.b x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xfffffffffffffffb)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffffffffd), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ rev.b x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfffffffffffffffd)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xfffffffffffffffe), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ rev.b x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfffffffffffffffe)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffff7fff), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ rev.b x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffffffffff7fff)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffbfff), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ rev.b x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffffffffffffbfff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffdfff), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ rev.b x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xffffffffffffdfff)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffefff), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ rev.b x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xffffffffffffefff)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xfffffffffffff7ff), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ rev.b x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfffffffffffff7ff)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xfffffffffffffbff), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ rev.b x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xfffffffffffffbff)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffffdff), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ rev.b x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xfffffffffffffdff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xfffffffffffffeff), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ rev.b x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0xfffffffffffffeff)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xffffffffff7fffff), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ rev.b x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xffffffffff7fffff)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffbfffff), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ rev.b x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xffffffffffbfffff)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffdfffff), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ rev.b x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xffffffffffdfffff)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffefffff), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ rev.b x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xffffffffffefffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xfffffffffff7ffff), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ rev.b x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0xfffffffffff7ffff)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xfffffffffffbffff), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ rev.b x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xfffffffffffbffff)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffffdffff), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ rev.b x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xfffffffffffdffff)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffffeffff), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ rev.b x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xfffffffffffeffff)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xffffffff7fffffff), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ rev.b x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffffffff7fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xffffffffbfffffff), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ rev.b x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffffffffbfffffff)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xffffffffdfffffff), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ rev.b x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xffffffffdfffffff)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xffffffffefffffff), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ rev.b x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffffffefffffff)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xfffffffff7ffffff), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ rev.b x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfffffffff7ffffff)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xfffffffffbffffff), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ rev.b x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xfffffffffbffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xfffffffffdffffff), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ rev.b x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0xfffffffffdffffff)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffeffffff), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ rev.b x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0xfffffffffeffffff)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xffffff7fffffffff), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ rev.b x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0xffffff7fffffffff)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xffffffbfffffffff), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ rev.b x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0xffffffbfffffffff)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xffffffdfffffffff), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ rev.b x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xffffffdfffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xffffffefffffffff), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ rev.b x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xffffffefffffffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfffffff7ffffffff), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ rev.b x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xfffffff7ffffffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xfffffffbffffffff), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ rev.b x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfffffffbffffffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xfffffffdffffffff), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ rev.b x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfffffffdffffffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xfffffffeffffffff), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ rev.b x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfffffffeffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffff7fffffffffff), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ rev.b x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffff7fffffffffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffbfffffffffff), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ rev.b x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xffffbfffffffffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffdfffffffffff), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ rev.b x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xffffdfffffffffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffefffffffffff), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ rev.b x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffffefffffffffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xfffff7ffffffffff), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ rev.b x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xfffff7ffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfffffbffffffffff), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ rev.b x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0xfffffbffffffffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xfffffdffffffffff), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ rev.b x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0xfffffdffffffffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xfffffeffffffffff), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ rev.b x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0xfffffeffffffffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xff7fffffffffffff), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ rev.b x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xff7fffffffffffff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffbfffffffffffff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ rev.b x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xffbfffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffdfffffffffffff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ rev.b x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xffdfffffffffffff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffefffffffffffff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ rev.b x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xffefffffffffffff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfff7ffffffffffff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ rev.b x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xfff7ffffffffffff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfffbffffffffffff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ rev.b x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xfffbffffffffffff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xfffdffffffffffff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ rev.b x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0xfffdffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xfffeffffffffffff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ rev.b x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffeffffffffffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x7fffffffffffffff), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ rev.b x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x7fffffffffffffff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xbfffffffffffffff), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ rev.b x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xbfffffffffffffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xdfffffffffffffff), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ rev.b x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xdfffffffffffffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xefffffffffffffff), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ rev.b x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xefffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xf7ffffffffffffff), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ rev.b x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xf7ffffffffffffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xfbffffffffffffff), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ rev.b x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xfbffffffffffffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xfdffffffffffffff), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ rev.b x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xfdffffffffffffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xfeffffffffffffff), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ rev.b x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xfeffffffffffffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ rev.b x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xffffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000080), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ rev.b x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x0000000000000080)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000040), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ rev.b x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x0000000000000040)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000020), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ rev.b x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x0000000000000020)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000010), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ rev.b x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000000000010)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000008), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ rev.b x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000000008)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000004), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ rev.b x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000004)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000002), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ rev.b x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000002)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000001), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ rev.b x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000001)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000008000), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ rev.b x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000008000)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000004000), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ rev.b x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000004000)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000002000), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ rev.b x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000002000)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000001000), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ rev.b x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000001000)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000800), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ rev.b x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000000800)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000400), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ rev.b x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000000400)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000200), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ rev.b x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x0000000000000200)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000100), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ rev.b x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x0000000000000100)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000800000), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ rev.b x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x0000000000800000)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000400000), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ rev.b x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0000000000400000)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000200000), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ rev.b x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0000000000200000)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000100000), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ rev.b x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000000000100000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000080000), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ rev.b x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000080000)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000040000), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ rev.b x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000040000)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000020000), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ rev.b x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000020000)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000010000), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ rev.b x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000010000)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000080000000), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ rev.b x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000080000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000040000000), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ rev.b x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000040000000)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000020000000), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ rev.b x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000020000000)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000010000000), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ rev.b x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000010000000)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000008000000), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ rev.b x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000008000000)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000004000000), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ rev.b x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000004000000)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000002000000), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ rev.b x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000002000000)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000001000000), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ rev.b x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000001000000)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000008000000000), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ rev.b x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000008000000000)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000004000000000), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ rev.b x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000004000000000)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000002000000000), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ rev.b x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000002000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000001000000000), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ rev.b x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000001000000000)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000800000000), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ rev.b x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000800000000)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000400000000), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ rev.b x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000400000000)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000200000000), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ rev.b x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000200000000)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000100000000), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ rev.b x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000100000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000800000000000), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ rev.b x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000800000000000)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000400000000000), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ rev.b x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000400000000000)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000200000000000), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ rev.b x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000200000000000)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000100000000000), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ rev.b x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000100000000000)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000080000000000), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ rev.b x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000080000000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000040000000000), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ rev.b x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000040000000000)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000020000000000), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ rev.b x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000020000000000)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000010000000000), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ rev.b x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000010000000000)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0080000000000000), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ rev.b x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0080000000000000)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0040000000000000), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ rev.b x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0040000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0020000000000000), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ rev.b x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0020000000000000)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0010000000000000), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ rev.b x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0010000000000000)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0008000000000000), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ rev.b x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0008000000000000)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0004000000000000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ rev.b x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0004000000000000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0002000000000000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ rev.b x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0002000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0001000000000000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ rev.b x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0001000000000000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x8000000000000000), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ rev.b x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x8000000000000000)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x4000000000000000), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ rev.b x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x4000000000000000)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x2000000000000000), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ rev.b x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x2000000000000000)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x1000000000000000), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ rev.b x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x1000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0800000000000000), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ rev.b x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0800000000000000)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0400000000000000), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ rev.b x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0400000000000000)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0200000000000000), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ rev.b x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0200000000000000)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0100000000000000), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ rev.b x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0100000000000000)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ rev.b x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffff7f), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ rev.b x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffffffffffffff7f)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffbf), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ rev.b x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xffffffffffffffbf)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffdf), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ rev.b x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffffffffffffdf)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffef), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ rev.b x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffffffffffffffef)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xfffffffffffffff7), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ rev.b x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfffffffffffffff7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xfffffffffffffffb), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ rev.b x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xfffffffffffffffb)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xfffffffffffffffd), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ rev.b x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfffffffffffffffd)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xfffffffffffffffe), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ rev.b x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xfffffffffffffffe)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffff7fff), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ rev.b x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xffffffffffff7fff)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffbfff), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ rev.b x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xffffffffffffbfff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffdfff), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ rev.b x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xffffffffffffdfff)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffefff), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ rev.b x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xffffffffffffefff)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xfffffffffffff7ff), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ rev.b x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xfffffffffffff7ff)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xfffffffffffffbff), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ rev.b x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xfffffffffffffbff)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xfffffffffffffdff), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ rev.b x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xfffffffffffffdff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xfffffffffffffeff), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ rev.b x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xfffffffffffffeff)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xffffffffff7fffff), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ rev.b x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xffffffffff7fffff)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffbfffff), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ rev.b x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xffffffffffbfffff)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffdfffff), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ rev.b x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffffffffffdfffff)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffefffff), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ rev.b x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffffffffffefffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xfffffffffff7ffff), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ rev.b x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfffffffffff7ffff)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xfffffffffffbffff), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ rev.b x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfffffffffffbffff)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xfffffffffffdffff), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ rev.b x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfffffffffffdffff)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xfffffffffffeffff), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ rev.b x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xfffffffffffeffff)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xffffffff7fffffff), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ rev.b x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xffffffff7fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xffffffffbfffffff), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ rev.b x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xffffffffbfffffff)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xffffffffdfffffff), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ rev.b x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xffffffffdfffffff)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xffffffffefffffff), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ rev.b x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xffffffffefffffff)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xfffffffff7ffffff), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ rev.b x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0xfffffffff7ffffff)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xfffffffffbffffff), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ rev.b x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0xfffffffffbffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xfffffffffdffffff), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ rev.b x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xfffffffffdffffff)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffeffffff), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ rev.b x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfffffffffeffffff)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xffffff7fffffffff), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ rev.b x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xffffff7fffffffff)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xffffffbfffffffff), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ rev.b x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffffbfffffffff)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xffffffdfffffffff), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ rev.b x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffffffdfffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xffffffefffffffff), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ rev.b x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xffffffefffffffff)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xfffffff7ffffffff), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ rev.b x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xfffffff7ffffffff)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xfffffffbffffffff), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ rev.b x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfffffffbffffffff)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xfffffffdffffffff), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ rev.b x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xfffffffdffffffff)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xfffffffeffffffff), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ rev.b x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xfffffffeffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xffff7fffffffffff), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ rev.b x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0xffff7fffffffffff)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xffffbfffffffffff), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ rev.b x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xffffbfffffffffff)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xffffdfffffffffff), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ rev.b x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xffffdfffffffffff)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xffffefffffffffff), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ rev.b x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xffffefffffffffff)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xfffff7ffffffffff), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ rev.b x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xfffff7ffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xfffffbffffffffff), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ rev.b x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0xfffffbffffffffff)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xfffffdffffffffff), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ rev.b x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xfffffdffffffffff)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xfffffeffffffffff), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ rev.b x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xfffffeffffffffff)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xff7fffffffffffff), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ rev.b x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xff7fffffffffffff)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xffbfffffffffffff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ rev.b x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffbfffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xffdfffffffffffff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ rev.b x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffdfffffffffffff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xffefffffffffffff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ rev.b x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xffefffffffffffff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xfff7ffffffffffff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ rev.b x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfff7ffffffffffff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xfffbffffffffffff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ rev.b x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfffbffffffffffff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xfffdffffffffffff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ rev.b x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xfffdffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xfffeffffffffffff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ rev.b x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0xfffeffffffffffff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x7fffffffffffffff), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ rev.b x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x7fffffffffffffff)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xbfffffffffffffff), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ rev.b x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0xbfffffffffffffff)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xdfffffffffffffff), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ rev.b x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0xdfffffffffffffff)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xefffffffffffffff), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ rev.b x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xefffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xf7ffffffffffffff), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ rev.b x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xf7ffffffffffffff)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xfbffffffffffffff), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ rev.b x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xfbffffffffffffff)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xfdffffffffffffff), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ rev.b x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfdffffffffffffff)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xfeffffffffffffff), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ rev.b x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfeffffffffffffff)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ rev.b x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x08bfbcb7b5578aa9), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ rev.b x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x08bfbcb7b5578aa9)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ rev.b x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x9326f9a0158715dd), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ rev.b x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x9326f9a0158715dd)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ rev.b x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/REV8-01.S b/riscof/suite/rv64i_m/K_unratified/REV8-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..67aa0e0be3deac57325ee82e48e1bf5c84aecfeb
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/REV8-01.S
@@ -0,0 +1,2716 @@
+// RISC-V Architectural Validation Test REV8-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'rev8'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",rev8)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",rev8)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",rev8)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x9551eaaded3dfd10), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ rev8 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x9551eaaded3dfd10)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xc1beffd2e25c29bd), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ rev8 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xc1beffd2e25c29bd)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xbba8e1a8059f64c9), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ rev8 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xbba8e1a8059f64c9)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xcb9fc94818294135), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ rev8 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xcb9fc94818294135)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x4f521d464047a210), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ rev8 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x4f521d464047a210)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xaf108a52540e6b54), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ rev8 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xaf108a52540e6b54)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xc3fb9be1d42fa973), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ rev8 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xc3fb9be1d42fa973)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xc0f27a707f74f682), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ rev8 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xc0f27a707f74f682)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x5b107da41ab4adf5), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ rev8 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x5b107da41ab4adf5)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x23cc1b1244387fdf), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ rev8 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x23cc1b1244387fdf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0100000000000000), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ rev8 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0100000000000000)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0200000000000000), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ rev8 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0200000000000000)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0400000000000000), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ rev8 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0400000000000000)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0800000000000000), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ rev8 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0800000000000000)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x1000000000000000), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ rev8 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x1000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x2000000000000000), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ rev8 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x2000000000000000)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x4000000000000000), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ rev8 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x4000000000000000)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x8000000000000000), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ rev8 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x8000000000000000)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0001000000000000), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ rev8 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0001000000000000)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0002000000000000), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ rev8 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0002000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0004000000000000), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ rev8 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0004000000000000)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0008000000000000), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ rev8 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0008000000000000)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0010000000000000), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ rev8 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0010000000000000)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0020000000000000), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ rev8 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0020000000000000)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0040000000000000), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ rev8 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0040000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0080000000000000), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ rev8 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0080000000000000)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000010000000000), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ rev8 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000010000000000)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000020000000000), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ rev8 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000020000000000)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000040000000000), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ rev8 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000040000000000)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000080000000000), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ rev8 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000080000000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000100000000000), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ rev8 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000100000000000)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000200000000000), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ rev8 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000200000000000)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000400000000000), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ rev8 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000400000000000)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000800000000000), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ rev8 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000800000000000)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000100000000), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ rev8 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000100000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000200000000), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ rev8 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000200000000)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000400000000), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ rev8 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000400000000)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000800000000), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ rev8 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000800000000)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000001000000000), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ rev8 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000001000000000)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000002000000000), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ rev8 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000002000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000004000000000), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ rev8 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000004000000000)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000008000000000), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ rev8 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000008000000000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000001000000), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ rev8 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000001000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000002000000), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ rev8 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000002000000)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000004000000), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ rev8 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000004000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000008000000), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ rev8 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000008000000)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000010000000), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ rev8 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000010000000)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000020000000), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ rev8 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000020000000)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000040000000), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ rev8 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000040000000)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000080000000), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ rev8 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000080000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000010000), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ rev8 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000000010000)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000020000), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ rev8 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000020000)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000040000), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ rev8 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000040000)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000080000), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ rev8 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000080000)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000100000), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ rev8 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000100000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000200000), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ rev8 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000200000)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000400000), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ rev8 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000400000)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000800000), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ rev8 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0000000000800000)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000100), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ rev8 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0000000000000100)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000200), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ rev8 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x0000000000000200)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000400), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ rev8 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x0000000000000400)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000800), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ rev8 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x0000000000000800)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000000001000), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ rev8 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x0000000000001000)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000000002000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ rev8 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0000000000002000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000000004000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ rev8 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0000000000004000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000000008000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ rev8 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0000000000008000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000001), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ rev8 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000001)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000002), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ rev8 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000002)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000004), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ rev8 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000004)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000008), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ rev8 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000008)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000010), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ rev8 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000010)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000020), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ rev8 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000020)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000040), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ rev8 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000040)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000080), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ rev8 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000080)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ rev8 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfeffffffffffffff), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ rev8 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xfeffffffffffffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xfdffffffffffffff), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ rev8 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xfdffffffffffffff)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xfbffffffffffffff), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ rev8 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xfbffffffffffffff)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xf7ffffffffffffff), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ rev8 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0xf7ffffffffffffff)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xefffffffffffffff), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ rev8 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0xefffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xdfffffffffffffff), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ rev8 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xdfffffffffffffff)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xbfffffffffffffff), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ rev8 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xbfffffffffffffff)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x7fffffffffffffff), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ rev8 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x7fffffffffffffff)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xfffeffffffffffff), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ rev8 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfffeffffffffffff)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xfffdffffffffffff), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ rev8 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfffdffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xfffbffffffffffff), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ rev8 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfffbffffffffffff)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xfff7ffffffffffff), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ rev8 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xfff7ffffffffffff)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xffefffffffffffff), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ rev8 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffefffffffffffff)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xffdfffffffffffff), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ rev8 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffdfffffffffffff)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xffbfffffffffffff), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ rev8 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xffbfffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xff7fffffffffffff), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ rev8 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0xff7fffffffffffff)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xfffffeffffffffff), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ rev8 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfffffeffffffffff)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xfffffdffffffffff), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ rev8 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xfffffdffffffffff)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xfffffbffffffffff), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ rev8 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xfffffbffffffffff)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xfffff7ffffffffff), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ rev8 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xfffff7ffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xffffefffffffffff), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ rev8 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0xffffefffffffffff)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffffdfffffffffff), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ rev8 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xffffdfffffffffff)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xffffbfffffffffff), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ rev8 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xffffbfffffffffff)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xffff7fffffffffff), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ rev8 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xffff7fffffffffff)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xfffffffeffffffff), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ rev8 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffffffeffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xfffffffdffffffff), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ rev8 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffffffdffffffff)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xfffffffbffffffff), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ rev8 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfffffffbffffffff)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xfffffff7ffffffff), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ rev8 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfffffff7ffffffff)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffffefffffffff), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ rev8 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xffffffefffffffff)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffffffdfffffffff), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ rev8 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xffffffdfffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffffffbfffffffff), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ rev8 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0xffffffbfffffffff)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xffffff7fffffffff), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ rev8 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0xffffff7fffffffff)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffeffffff), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ rev8 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0xfffffffffeffffff)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xfffffffffdffffff), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ rev8 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0xfffffffffdffffff)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfffffffffbffffff), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ rev8 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xfffffffffbffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfffffffff7ffffff), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ rev8 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xfffffffff7ffffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffffefffffff), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ rev8 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xffffffffefffffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffffdfffffff), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ rev8 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffffffffdfffffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffffbfffffff), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ rev8 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xffffffffbfffffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffff7fffffff), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ rev8 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffffff7fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffeffff), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ rev8 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfffffffffffeffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xfffffffffffdffff), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ rev8 x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfffffffffffdffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfffffffffffbffff), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ rev8 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xfffffffffffbffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfffffffffff7ffff), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ rev8 x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfffffffffff7ffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffefffff), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ rev8 x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffffffffffefffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffdfffff), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ rev8 x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0xffffffffffdfffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffbfffff), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ rev8 x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0xffffffffffbfffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffffffff7fffff), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ rev8 x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0xffffffffff7fffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffffeff), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ rev8 x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xfffffffffffffeff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xfffffffffffffdff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ rev8 x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xfffffffffffffdff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffffffffffffbff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ rev8 x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xfffffffffffffbff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfffffffffffff7ff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ rev8 x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xfffffffffffff7ff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffefff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ rev8 x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xffffffffffffefff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffdfff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ rev8 x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xffffffffffffdfff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffbfff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ rev8 x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0xffffffffffffbfff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffff7fff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ rev8 x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffffffffffff7fff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffffffffe), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ rev8 x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffffffffffffffe)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xfffffffffffffffd), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ rev8 x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfffffffffffffffd)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfffffffffffffffb), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ rev8 x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfffffffffffffffb)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xfffffffffffffff7), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ rev8 x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfffffffffffffff7)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffef), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ rev8 x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xffffffffffffffef)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffdf), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ rev8 x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xffffffffffffffdf)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffbf), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ rev8 x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xffffffffffffffbf)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffff7f), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ rev8 x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xffffffffffffff7f)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ rev8 x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xffffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0100000000000000), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ rev8 x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x0100000000000000)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0200000000000000), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ rev8 x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x0200000000000000)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0400000000000000), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ rev8 x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x0400000000000000)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0800000000000000), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ rev8 x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0800000000000000)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x1000000000000000), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ rev8 x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x1000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x2000000000000000), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ rev8 x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x2000000000000000)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x4000000000000000), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ rev8 x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x4000000000000000)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x8000000000000000), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ rev8 x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x8000000000000000)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0001000000000000), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ rev8 x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0001000000000000)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0002000000000000), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ rev8 x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0002000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0004000000000000), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ rev8 x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0004000000000000)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0008000000000000), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ rev8 x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0008000000000000)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0010000000000000), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ rev8 x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0010000000000000)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0020000000000000), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ rev8 x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0020000000000000)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0040000000000000), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ rev8 x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x0040000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0080000000000000), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ rev8 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x0080000000000000)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000010000000000), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ rev8 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x0000010000000000)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000020000000000), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ rev8 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0000020000000000)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000040000000000), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ rev8 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0000040000000000)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000080000000000), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ rev8 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000080000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000100000000000), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ rev8 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000100000000000)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000200000000000), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ rev8 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000200000000000)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000400000000000), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ rev8 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000400000000000)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000800000000000), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ rev8 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000800000000000)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000100000000), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ rev8 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000100000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000200000000), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ rev8 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000200000000)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000400000000), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ rev8 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000400000000)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000800000000), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ rev8 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000800000000)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000001000000000), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ rev8 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000001000000000)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000002000000000), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ rev8 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000002000000000)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000004000000000), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ rev8 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000004000000000)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000008000000000), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ rev8 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000008000000000)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000001000000), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ rev8 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000001000000)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000002000000), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ rev8 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000002000000)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000004000000), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ rev8 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000004000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000008000000), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ rev8 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000008000000)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000010000000), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ rev8 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000010000000)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000020000000), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ rev8 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000020000000)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000040000000), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ rev8 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000040000000)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000080000000), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ rev8 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000080000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000010000), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ rev8 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000000010000)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000020000), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ rev8 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000020000)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000040000), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ rev8 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000040000)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000080000), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ rev8 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000080000)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000100000), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ rev8 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000100000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000200000), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ rev8 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000200000)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000400000), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ rev8 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000400000)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000800000), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ rev8 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000800000)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000100), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ rev8 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000000100)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000200), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ rev8 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000000000200)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000400), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ rev8 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000400)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000800), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ rev8 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000800)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000001000), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ rev8 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000001000)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000002000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ rev8 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000002000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000004000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ rev8 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000004000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000008000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ rev8 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000008000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000001), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ rev8 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000001)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000002), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ rev8 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000002)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000004), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ rev8 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000004)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000008), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ rev8 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000000000008)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000010), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ rev8 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000000000010)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000020), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ rev8 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000000000020)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000040), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ rev8 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000000000040)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000080), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ rev8 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000000000080)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ rev8 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xfeffffffffffffff), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ rev8 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfeffffffffffffff)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xfdffffffffffffff), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ rev8 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfdffffffffffffff)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xfbffffffffffffff), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ rev8 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfbffffffffffffff)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xf7ffffffffffffff), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ rev8 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xf7ffffffffffffff)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xefffffffffffffff), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ rev8 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xefffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xdfffffffffffffff), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ rev8 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xdfffffffffffffff)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xbfffffffffffffff), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ rev8 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xbfffffffffffffff)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x7fffffffffffffff), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ rev8 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x7fffffffffffffff)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xfffeffffffffffff), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ rev8 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xfffeffffffffffff)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xfffdffffffffffff), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ rev8 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xfffdffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xfffbffffffffffff), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ rev8 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfffbffffffffffff)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xfff7ffffffffffff), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ rev8 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xfff7ffffffffffff)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffefffffffffffff), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ rev8 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xffefffffffffffff)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffdfffffffffffff), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ rev8 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xffdfffffffffffff)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffbfffffffffffff), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ rev8 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xffbfffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xff7fffffffffffff), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ rev8 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xff7fffffffffffff)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xfffffeffffffffff), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ rev8 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xfffffeffffffffff)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xfffffdffffffffff), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ rev8 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xfffffdffffffffff)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xfffffbffffffffff), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ rev8 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffffbffffffffff)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xfffff7ffffffffff), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ rev8 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffff7ffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffefffffffffff), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ rev8 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xffffefffffffffff)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffdfffffffffff), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ rev8 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffdfffffffffff)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffbfffffffffff), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ rev8 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xffffbfffffffffff)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffff7fffffffffff), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ rev8 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xffff7fffffffffff)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xfffffffeffffffff), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ rev8 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xfffffffeffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xfffffffdffffffff), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ rev8 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xfffffffdffffffff)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xfffffffbffffffff), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ rev8 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xfffffffbffffffff)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xfffffff7ffffffff), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ rev8 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xfffffff7ffffffff)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffefffffffff), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ rev8 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0xffffffefffffffff)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffdfffffffff), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ rev8 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0xffffffdfffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffbfffffffff), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ rev8 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xffffffbfffffffff)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xffffff7fffffffff), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ rev8 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffffff7fffffffff)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xfffffffffeffffff), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ rev8 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfffffffffeffffff)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffdffffff), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ rev8 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfffffffffdffffff)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffbffffff), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ rev8 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfffffffffbffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xfffffffff7ffffff), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ rev8 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfffffffff7ffffff)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xffffffffefffffff), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ rev8 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xffffffffefffffff)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xffffffffdfffffff), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ rev8 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffffffffdfffffff)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xffffffffbfffffff), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ rev8 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffffffffbfffffff)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xffffffff7fffffff), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ rev8 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xffffffff7fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xfffffffffffeffff), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ rev8 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0xfffffffffffeffff)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffdffff), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ rev8 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfffffffffffdffff)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffbffff), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ rev8 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xfffffffffffbffff)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xfffffffffff7ffff), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ rev8 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xfffffffffff7ffff)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffefffff), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ rev8 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xffffffffffefffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffdfffff), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ rev8 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0xffffffffffdfffff)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffbfffff), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ rev8 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xffffffffffbfffff)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xffffffffff7fffff), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ rev8 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xffffffffff7fffff)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffffffeff), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ rev8 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xfffffffffffffeff)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffffffdff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ rev8 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffffffffffffdff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffffffbff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ rev8 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffffffffffffbff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xfffffffffffff7ff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ rev8 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfffffffffffff7ff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffefff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ rev8 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffffffffffefff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffdfff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ rev8 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xffffffffffffdfff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffbfff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ rev8 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xffffffffffffbfff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffff7fff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ rev8 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0xffffffffffff7fff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffffffffe), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ rev8 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0xfffffffffffffffe)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffffffffd), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ rev8 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0xfffffffffffffffd)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xfffffffffffffffb), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ rev8 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0xfffffffffffffffb)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xfffffffffffffff7), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ rev8 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xfffffffffffffff7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffef), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ rev8 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xffffffffffffffef)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffdf), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ rev8 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xffffffffffffffdf)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffbf), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ rev8 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffffffffffffffbf)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffff7f), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ rev8 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xffffffffffffff7f)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ rev8 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x9551eaaded3dfd10), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ rev8 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x9551eaaded3dfd10)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ rev8 x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xbba8e1a8059f64c9), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ rev8 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xbba8e1a8059f64c9)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ rev8 x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/REV8-W-01.S b/riscof/suite/rv64i_m/K_unratified/REV8-W-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..449b3d2956ecebd424a34311342b68f1c73c0b35
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/REV8-W-01.S
@@ -0,0 +1,2716 @@
+// RISC-V Architectural Validation Test REV8-W-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'rev8.w'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",rev8.w)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",rev8.w)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",rev8.w)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xed3dfd109551eaad), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ rev8.w x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0xed3dfd109551eaad)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xe25c29bdc1beffd2), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ rev8.w x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xe25c29bdc1beffd2)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x059f64c9bba8e1a8), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ rev8.w x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x059f64c9bba8e1a8)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x18294135cb9fc948), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ rev8.w x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x18294135cb9fc948)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x4047a2104f521d46), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ rev8.w x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x4047a2104f521d46)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x540e6b54af108a52), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ rev8.w x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x540e6b54af108a52)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xd42fa973c3fb9be1), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ rev8.w x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xd42fa973c3fb9be1)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x7f74f682c0f27a70), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ rev8.w x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x7f74f682c0f27a70)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x1ab4adf55b107da4), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ rev8.w x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x1ab4adf55b107da4)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x44387fdf23cc1b12), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ rev8.w x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x44387fdf23cc1b12)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000001000000), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ rev8.w x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000001000000)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000002000000), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ rev8.w x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000002000000)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000004000000), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ rev8.w x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000004000000)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000008000000), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ rev8.w x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000008000000)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000010000000), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ rev8.w x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000010000000)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000020000000), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ rev8.w x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000020000000)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000040000000), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ rev8.w x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000040000000)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000080000000), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ rev8.w x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000080000000)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000010000), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ rev8.w x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000000010000)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000000020000), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ rev8.w x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000000020000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000000040000), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ rev8.w x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000040000)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000000080000), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ rev8.w x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000080000)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000100000), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ rev8.w x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000100000)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000200000), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ rev8.w x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000200000)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000000400000), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ rev8.w x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000400000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000800000), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ rev8.w x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000000800000)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000100), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ rev8.w x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000000100)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000200), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ rev8.w x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000000200)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000400), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ rev8.w x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000000400)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000800), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ rev8.w x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000000800)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000001000), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ rev8.w x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000001000)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000002000), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ rev8.w x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000002000)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000004000), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ rev8.w x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000004000)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000008000), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ rev8.w x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000008000)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000001), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ rev8.w x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000000000001)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000002), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ rev8.w x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000002)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000004), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ rev8.w x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000004)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000008), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ rev8.w x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000008)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000010), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ rev8.w x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000010)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000020), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ rev8.w x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000020)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000040), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ rev8.w x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000040)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000080), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ rev8.w x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000080)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0100000000000000), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ rev8.w x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0100000000000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0200000000000000), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ rev8.w x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0200000000000000)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0400000000000000), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ rev8.w x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0400000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0800000000000000), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ rev8.w x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0800000000000000)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x1000000000000000), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ rev8.w x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x1000000000000000)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x2000000000000000), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ rev8.w x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x2000000000000000)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x4000000000000000), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ rev8.w x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x4000000000000000)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x8000000000000000), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ rev8.w x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x8000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0001000000000000), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ rev8.w x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0001000000000000)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0002000000000000), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ rev8.w x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0002000000000000)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0004000000000000), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ rev8.w x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0004000000000000)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0008000000000000), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ rev8.w x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0008000000000000)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0010000000000000), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ rev8.w x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0010000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0020000000000000), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ rev8.w x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0020000000000000)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0040000000000000), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ rev8.w x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0040000000000000)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0080000000000000), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ rev8.w x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0080000000000000)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000010000000000), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ rev8.w x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0000010000000000)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000020000000000), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ rev8.w x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x0000020000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000040000000000), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ rev8.w x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x0000040000000000)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000080000000000), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ rev8.w x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x0000080000000000)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000100000000000), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ rev8.w x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x0000100000000000)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000200000000000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ rev8.w x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0000200000000000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000400000000000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ rev8.w x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0000400000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000800000000000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ rev8.w x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0000800000000000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000100000000), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ rev8.w x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000100000000)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000200000000), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ rev8.w x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000200000000)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000400000000), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ rev8.w x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000400000000)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000800000000), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ rev8.w x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000800000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000001000000000), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ rev8.w x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000001000000000)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000002000000000), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ rev8.w x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000002000000000)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000004000000000), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ rev8.w x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000004000000000)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000008000000000), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ rev8.w x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000008000000000)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ rev8.w x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffeffffff), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ rev8.w x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xfffffffffeffffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffdffffff), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ rev8.w x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xfffffffffdffffff)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xfffffffffbffffff), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ rev8.w x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xfffffffffbffffff)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xfffffffff7ffffff), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ rev8.w x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0xfffffffff7ffffff)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xffffffffefffffff), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ rev8.w x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0xffffffffefffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xffffffffdfffffff), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ rev8.w x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xffffffffdfffffff)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xffffffffbfffffff), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ rev8.w x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffffffffbfffffff)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xffffffff7fffffff), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ rev8.w x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xffffffff7fffffff)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffeffff), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ rev8.w x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfffffffffffeffff)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffdffff), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ rev8.w x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfffffffffffdffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xfffffffffffbffff), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ rev8.w x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfffffffffffbffff)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xfffffffffff7ffff), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ rev8.w x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xfffffffffff7ffff)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffefffff), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ rev8.w x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffffffffffefffff)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffdfffff), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ rev8.w x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffffffffffdfffff)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffbfffff), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ rev8.w x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xffffffffffbfffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xffffffffff7fffff), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ rev8.w x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0xffffffffff7fffff)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffffeff), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ rev8.w x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfffffffffffffeff)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffffdff), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ rev8.w x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xfffffffffffffdff)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xfffffffffffffbff), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ rev8.w x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xfffffffffffffbff)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xfffffffffffff7ff), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ rev8.w x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xfffffffffffff7ff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffefff), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ rev8.w x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0xffffffffffffefff)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffdfff), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ rev8.w x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xffffffffffffdfff)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffbfff), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ rev8.w x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xffffffffffffbfff)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffff7fff), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ rev8.w x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xffffffffffff7fff)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffffffffe), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ rev8.w x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffffffffffffffe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffffffffd), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ rev8.w x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffffffffffffffd)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xfffffffffffffffb), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ rev8.w x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfffffffffffffffb)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xfffffffffffffff7), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ rev8.w x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfffffffffffffff7)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffef), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ rev8.w x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xffffffffffffffef)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffdf), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ rev8.w x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xffffffffffffffdf)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffbf), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ rev8.w x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0xffffffffffffffbf)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffff7f), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ rev8.w x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0xffffffffffffff7f)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xfeffffffffffffff), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ rev8.w x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0xfeffffffffffffff)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xfdffffffffffffff), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ rev8.w x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0xfdffffffffffffff)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfbffffffffffffff), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ rev8.w x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xfbffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xf7ffffffffffffff), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ rev8.w x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xf7ffffffffffffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xefffffffffffffff), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ rev8.w x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xefffffffffffffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xdfffffffffffffff), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ rev8.w x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xdfffffffffffffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xbfffffffffffffff), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ rev8.w x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xbfffffffffffffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x7fffffffffffffff), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ rev8.w x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x7fffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xfffeffffffffffff), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ rev8.w x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfffeffffffffffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xfffdffffffffffff), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ rev8.w x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfffdffffffffffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfffbffffffffffff), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ rev8.w x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xfffbffffffffffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfff7ffffffffffff), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ rev8.w x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfff7ffffffffffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffefffffffffffff), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ rev8.w x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffefffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffdfffffffffffff), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ rev8.w x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0xffdfffffffffffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffbfffffffffffff), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ rev8.w x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0xffbfffffffffffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xff7fffffffffffff), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ rev8.w x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0xff7fffffffffffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xfffffeffffffffff), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ rev8.w x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xfffffeffffffffff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xfffffdffffffffff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ rev8.w x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xfffffdffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffffbffffffffff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ rev8.w x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xfffffbffffffffff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfffff7ffffffffff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ rev8.w x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xfffff7ffffffffff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffefffffffffff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ rev8.w x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xffffefffffffffff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffdfffffffffff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ rev8.w x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xffffdfffffffffff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffffbfffffffffff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ rev8.w x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0xffffbfffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffff7fffffffffff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ rev8.w x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffff7fffffffffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xfffffffeffffffff), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ rev8.w x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffffffeffffffff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xfffffffdffffffff), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ rev8.w x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfffffffdffffffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfffffffbffffffff), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ rev8.w x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfffffffbffffffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xfffffff7ffffffff), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ rev8.w x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfffffff7ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffffefffffffff), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ rev8.w x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xffffffefffffffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffffffdfffffffff), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ rev8.w x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xffffffdfffffffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffffbfffffffff), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ rev8.w x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xffffffbfffffffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xffffff7fffffffff), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ rev8.w x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xffffff7fffffffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ rev8.w x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xffffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000001000000), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ rev8.w x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x0000000001000000)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000002000000), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ rev8.w x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x0000000002000000)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000004000000), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ rev8.w x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x0000000004000000)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000008000000), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ rev8.w x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000008000000)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000010000000), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ rev8.w x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000010000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000020000000), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ rev8.w x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000020000000)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000040000000), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ rev8.w x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000040000000)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000080000000), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ rev8.w x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000080000000)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000010000), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ rev8.w x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000010000)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000020000), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ rev8.w x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000020000)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000040000), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ rev8.w x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000040000)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000080000), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ rev8.w x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000080000)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000100000), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ rev8.w x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000100000)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000200000), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ rev8.w x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000200000)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000400000), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ rev8.w x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x0000000000400000)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000800000), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ rev8.w x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x0000000000800000)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000100), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ rev8.w x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x0000000000000100)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000200), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ rev8.w x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0000000000000200)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000400), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ rev8.w x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0000000000000400)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000800), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ rev8.w x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000000000000800)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000001000), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ rev8.w x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000001000)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000002000), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ rev8.w x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000002000)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000004000), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ rev8.w x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000004000)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000008000), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ rev8.w x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000008000)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000001), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ rev8.w x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000001)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000002), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ rev8.w x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000000000002)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000004), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ rev8.w x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000000000004)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000008), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ rev8.w x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000000000008)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000010), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ rev8.w x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000000000010)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000020), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ rev8.w x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000000000020)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000040), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ rev8.w x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000000000040)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000080), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ rev8.w x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000000000080)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0100000000000000), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ rev8.w x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0100000000000000)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0200000000000000), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ rev8.w x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0200000000000000)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0400000000000000), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ rev8.w x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0400000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0800000000000000), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ rev8.w x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0800000000000000)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x1000000000000000), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ rev8.w x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x1000000000000000)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x2000000000000000), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ rev8.w x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x2000000000000000)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x4000000000000000), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ rev8.w x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x4000000000000000)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x8000000000000000), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ rev8.w x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x8000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0001000000000000), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ rev8.w x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0001000000000000)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0002000000000000), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ rev8.w x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0002000000000000)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0004000000000000), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ rev8.w x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0004000000000000)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0008000000000000), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ rev8.w x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0008000000000000)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0010000000000000), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ rev8.w x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0010000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0020000000000000), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ rev8.w x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0020000000000000)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0040000000000000), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ rev8.w x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0040000000000000)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0080000000000000), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ rev8.w x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0080000000000000)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000010000000000), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ rev8.w x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000010000000000)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000020000000000), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ rev8.w x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000020000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000040000000000), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ rev8.w x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000040000000000)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000080000000000), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ rev8.w x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000080000000000)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000100000000000), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ rev8.w x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000100000000000)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000200000000000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ rev8.w x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000200000000000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000400000000000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ rev8.w x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000400000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000800000000000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ rev8.w x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000800000000000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000100000000), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ rev8.w x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000100000000)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000200000000), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ rev8.w x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000200000000)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000400000000), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ rev8.w x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000400000000)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000800000000), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ rev8.w x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000800000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000001000000000), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ rev8.w x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000001000000000)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000002000000000), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ rev8.w x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000002000000000)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000004000000000), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ rev8.w x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000004000000000)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000008000000000), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ rev8.w x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000008000000000)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ rev8.w x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffeffffff), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ rev8.w x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfffffffffeffffff)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xfffffffffdffffff), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ rev8.w x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfffffffffdffffff)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffbffffff), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ rev8.w x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfffffffffbffffff)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xfffffffff7ffffff), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ rev8.w x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfffffffff7ffffff)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xffffffffefffffff), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ rev8.w x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xffffffffefffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xffffffffdfffffff), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ rev8.w x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xffffffffdfffffff)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xffffffffbfffffff), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ rev8.w x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffffffffbfffffff)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xffffffff7fffffff), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ rev8.w x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffffffff7fffffff)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffeffff), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ rev8.w x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xfffffffffffeffff)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xfffffffffffdffff), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ rev8.w x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xfffffffffffdffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffbffff), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ rev8.w x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfffffffffffbffff)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffff7ffff), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ rev8.w x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xfffffffffff7ffff)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffefffff), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ rev8.w x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xffffffffffefffff)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffdfffff), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ rev8.w x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xffffffffffdfffff)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffbfffff), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ rev8.w x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xffffffffffbfffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xffffffffff7fffff), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ rev8.w x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xffffffffff7fffff)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffffffeff), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ rev8.w x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xfffffffffffffeff)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffffffdff), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ rev8.w x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xfffffffffffffdff)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffffffbff), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ rev8.w x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffffffffffffbff)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffffff7ff), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ rev8.w x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffffffffffff7ff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffefff), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ rev8.w x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xffffffffffffefff)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffdfff), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ rev8.w x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffffffffffdfff)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffbfff), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ rev8.w x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xffffffffffffbfff)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffff7fff), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ rev8.w x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xffffffffffff7fff)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xfffffffffffffffe), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ rev8.w x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xfffffffffffffffe)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffffffffd), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ rev8.w x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xfffffffffffffffd)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffffffffb), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ rev8.w x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xfffffffffffffffb)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xfffffffffffffff7), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ rev8.w x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xfffffffffffffff7)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffef), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ rev8.w x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0xffffffffffffffef)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffdf), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ rev8.w x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0xffffffffffffffdf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffbf), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ rev8.w x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xffffffffffffffbf)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffff7f), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ rev8.w x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffffffffffffff7f)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xfeffffffffffffff), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ rev8.w x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfeffffffffffffff)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xfdffffffffffffff), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ rev8.w x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfdffffffffffffff)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xfbffffffffffffff), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ rev8.w x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfbffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xf7ffffffffffffff), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ rev8.w x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xf7ffffffffffffff)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xefffffffffffffff), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ rev8.w x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xefffffffffffffff)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xdfffffffffffffff), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ rev8.w x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xdfffffffffffffff)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xbfffffffffffffff), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ rev8.w x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xbfffffffffffffff)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x7fffffffffffffff), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ rev8.w x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x7fffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xfffeffffffffffff), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ rev8.w x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0xfffeffffffffffff)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xfffdffffffffffff), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ rev8.w x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfffdffffffffffff)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xfffbffffffffffff), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ rev8.w x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xfffbffffffffffff)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xfff7ffffffffffff), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ rev8.w x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xfff7ffffffffffff)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffefffffffffffff), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ rev8.w x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xffefffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffdfffffffffffff), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ rev8.w x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0xffdfffffffffffff)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xffbfffffffffffff), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ rev8.w x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xffbfffffffffffff)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xff7fffffffffffff), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ rev8.w x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xff7fffffffffffff)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xfffffeffffffffff), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ rev8.w x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xfffffeffffffffff)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xfffffdffffffffff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ rev8.w x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffffdffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xfffffbffffffffff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ rev8.w x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffffbffffffffff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xfffff7ffffffffff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ rev8.w x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfffff7ffffffffff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffffefffffffffff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ rev8.w x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffefffffffffff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffffdfffffffffff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ rev8.w x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xffffdfffffffffff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xffffbfffffffffff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ rev8.w x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xffffbfffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xffff7fffffffffff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ rev8.w x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0xffff7fffffffffff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xfffffffeffffffff), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ rev8.w x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0xfffffffeffffffff)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xfffffffdffffffff), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ rev8.w x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0xfffffffdffffffff)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xfffffffbffffffff), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ rev8.w x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0xfffffffbffffffff)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xfffffff7ffffffff), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ rev8.w x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xfffffff7ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xffffffefffffffff), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ rev8.w x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xffffffefffffffff)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xffffffdfffffffff), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ rev8.w x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xffffffdfffffffff)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xffffffbfffffffff), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ rev8.w x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffffffbfffffffff)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xffffff7fffffffff), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ rev8.w x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xffffff7fffffffff)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ rev8.w x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0xed3dfd109551eaad), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ rev8.w x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xed3dfd109551eaad)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ rev8.w x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x059f64c9bba8e1a8), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ rev8.w x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x059f64c9bba8e1a8)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ rev8.w x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/ROL-01.S b/riscof/suite/rv64i_m/K_unratified/ROL-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..155a90b40fd00b1f2d638b114dcf26c77b8ed91d
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/ROL-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test ROL-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'rol'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",rol)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",rol)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",rol)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x6f528ca887e9ef6d), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(rol, x1, x31, x16, 0x6f528ca887e9ef6d, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x1697fdf60de94ae7), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(rol, x2, x30, x15, 0x1697fdf60de94ae7, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xc9649f05a8e1a8bb), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(rol, x3, x29, x14, 0xc9649f05a8e1a8bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xaa0948c2464cfe59), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(rol, x4, x28, x13, 0xaa0948c2464cfe59, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xa927885123a0230e), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(rol, x5, x27, x12, 0xa927885123a0230e, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x872a29450857aa35), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(rol, x6, x26, x11, 0x872a29450857aa35, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x497ea70cdfde1b9d), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(rol, x7, x25, x10, 0x497ea70cdfde1b9d, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x0417b3a3fb83d796), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(rol, x8, x24, x9, 0x0417b3a3fb83d796, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xeb5b683548fa20b7), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(rol, x9, x23, x8, 0xeb5b683548fa20b7, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x08824379847befe7), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(rol, x10, x22, x7, 0x08824379847befe7, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x8000000000000000), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(rol, x11, x21, x6, 0x8000000000000000, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000001), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(rol, x12, x20, x5, 0x0000000000000001, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000002), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(rol, x13, x19, x4, 0x0000000000000002, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000004), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(rol, x14, x18, x3, 0x0000000000000004, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000008), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(rol, x15, x17, x2, 0x0000000000000008, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000010), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(rol, x16, x16, x1, 0x0000000000000010, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000020), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(rol, x17, x15, x31, 0x0000000000000020, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000040), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(rol, x18, x14, x30, 0x0000000000000040, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000080), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(rol, x19, x13, x29, 0x0000000000000080, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000100), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(rol, x20, x12, x28, 0x0000000000000100, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000200), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(rol, x21, x11, x27, 0x0000000000000200, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000400), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(rol, x22, x10, x26, 0x0000000000000400, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000800), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(rol, x23, x9, x25, 0x0000000000000800, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000001000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(rol, x24, x8, x24, 0x0000000000001000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000000002000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(rol, x25, x7, x23, 0x0000000000002000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000004000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(rol, x26, x6, x22, 0x0000000000004000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000000008000), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(rol, x27, x5, x21, 0x0000000000008000, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000000010000), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(rol, x28, x4, x20, 0x0000000000010000, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000020000), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(rol, x29, x3, x19, 0x0000000000020000, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000040000), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(rol, x30, x2, x18, 0x0000000000040000, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000080000), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(rol, x31, x1, x17, 0x0000000000080000, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000100000), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(rol, x1, x31, x16, 0x0000000000100000, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000200000), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(rol, x2, x30, x15, 0x0000000000200000, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000400000), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(rol, x3, x29, x14, 0x0000000000400000, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000000800000), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(rol, x4, x28, x13, 0x0000000000800000, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000001000000), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(rol, x5, x27, x12, 0x0000000001000000, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000002000000), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(rol, x6, x26, x11, 0x0000000002000000, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000004000000), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(rol, x7, x25, x10, 0x0000000004000000, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000008000000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(rol, x8, x24, x9, 0x0000000008000000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000010000000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(rol, x9, x23, x8, 0x0000000010000000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000020000000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(rol, x10, x22, x7, 0x0000000020000000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000040000000), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(rol, x11, x21, x6, 0x0000000040000000, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000080000000), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(rol, x12, x20, x5, 0x0000000080000000, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000100000000), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(rol, x13, x19, x4, 0x0000000100000000, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000200000000), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(rol, x14, x18, x3, 0x0000000200000000, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000400000000), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(rol, x15, x17, x2, 0x0000000400000000, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000800000000), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(rol, x16, x16, x1, 0x0000000800000000, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000001000000000), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(rol, x17, x15, x31, 0x0000001000000000, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000002000000000), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(rol, x18, x14, x30, 0x0000002000000000, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000004000000000), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(rol, x19, x13, x29, 0x0000004000000000, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000008000000000), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(rol, x20, x12, x28, 0x0000008000000000, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000010000000000), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(rol, x21, x11, x27, 0x0000010000000000, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000020000000000), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(rol, x22, x10, x26, 0x0000020000000000, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000040000000000), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(rol, x23, x9, x25, 0x0000040000000000, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000080000000000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(rol, x24, x8, x24, 0x0000080000000000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000100000000000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(rol, x25, x7, x23, 0x0000100000000000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000200000000000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(rol, x26, x6, x22, 0x0000200000000000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000400000000000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(rol, x27, x5, x21, 0x0000400000000000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000800000000000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(rol, x28, x4, x20, 0x0000800000000000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0001000000000000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(rol, x29, x3, x19, 0x0001000000000000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0002000000000000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(rol, x30, x2, x18, 0x0002000000000000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0004000000000000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(rol, x31, x1, x17, 0x0004000000000000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0008000000000000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(rol, x1, x31, x16, 0x0008000000000000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0010000000000000), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(rol, x2, x30, x15, 0x0010000000000000, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0020000000000000), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(rol, x3, x29, x14, 0x0020000000000000, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0040000000000000), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(rol, x4, x28, x13, 0x0040000000000000, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0080000000000000), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(rol, x5, x27, x12, 0x0080000000000000, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0100000000000000), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(rol, x6, x26, x11, 0x0100000000000000, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0200000000000000), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(rol, x7, x25, x10, 0x0200000000000000, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000004000000), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(rol, x8, x24, x9, 0x0000000004000000, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000080000000000), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(rol, x9, x23, x8, 0x0000080000000000, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0010000000000000), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(rol, x10, x22, x7, 0x0010000000000000, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0200000000000000), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(rol, x11, x21, x6, 0x0200000000000000, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x1000000000000000), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(rol, x12, x20, x5, 0x1000000000000000, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(rol, x13, x19, x4, 0x0000000000000000, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffffffffe), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rol, x14, x18, x3, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffffffffd), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(rol, x15, x17, x2, 0xfffffffffffffffd, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xfffffffffffffffb), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(rol, x16, x16, x1, 0xfffffffffffffffb, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xfffffffffffffff7), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(rol, x17, x15, x31, 0xfffffffffffffff7, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffef), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(rol, x18, x14, x30, 0xffffffffffffffef, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffdf), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(rol, x19, x13, x29, 0xffffffffffffffdf, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffbf), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(rol, x20, x12, x28, 0xffffffffffffffbf, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffff7f), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(rol, x21, x11, x27, 0xffffffffffffff7f, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffffeff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(rol, x22, x10, x26, 0xfffffffffffffeff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffffdff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(rol, x23, x9, x25, 0xfffffffffffffdff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xfffffffffffffbff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(rol, x24, x8, x24, 0xfffffffffffffbff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xfffffffffffff7ff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(rol, x25, x7, x23, 0xfffffffffffff7ff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffefff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(rol, x26, x6, x22, 0xffffffffffffefff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffdfff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(rol, x27, x5, x21, 0xffffffffffffdfff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffbfff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(rol, x28, x4, x20, 0xffffffffffffbfff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffff7fff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(rol, x29, x3, x19, 0xffffffffffff7fff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffeffff), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(rol, x30, x2, x18, 0xfffffffffffeffff, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffdffff), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(rol, x31, x1, x17, 0xfffffffffffdffff, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xfffffffffffbffff), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(rol, x1, x31, x16, 0xfffffffffffbffff, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xfffffffffff7ffff), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(rol, x2, x30, x15, 0xfffffffffff7ffff, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffefffff), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(rol, x3, x29, x14, 0xffffffffffefffff, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffdfffff), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(rol, x4, x28, x13, 0xffffffffffdfffff, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffbfffff), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(rol, x5, x27, x12, 0xffffffffffbfffff, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xffffffffff7fffff), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(rol, x6, x26, x11, 0xffffffffff7fffff, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffeffffff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(rol, x7, x25, x10, 0xfffffffffeffffff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffdffffff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(rol, x8, x24, x9, 0xfffffffffdffffff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xfffffffffbffffff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(rol, x9, x23, x8, 0xfffffffffbffffff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xfffffffff7ffffff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(rol, x10, x22, x7, 0xfffffffff7ffffff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffffffefffffff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(rol, x11, x21, x6, 0xffffffffefffffff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffffffffdfffffff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(rol, x12, x20, x5, 0xffffffffdfffffff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffffffffbfffffff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(rol, x13, x19, x4, 0xffffffffbfffffff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xffffffff7fffffff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(rol, x14, x18, x3, 0xffffffff7fffffff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xfffffffeffffffff), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(rol, x15, x17, x2, 0xfffffffeffffffff, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xfffffffdffffffff), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(rol, x16, x16, x1, 0xfffffffdffffffff, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfffffffbffffffff), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(rol, x17, x15, x31, 0xfffffffbffffffff, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfffffff7ffffffff), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(rol, x18, x14, x30, 0xfffffff7ffffffff, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffefffffffff), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(rol, x19, x13, x29, 0xffffffefffffffff, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffdfffffffff), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(rol, x20, x12, x28, 0xffffffdfffffffff, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffbfffffffff), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(rol, x21, x11, x27, 0xffffffbfffffffff, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffff7fffffffff), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(rol, x22, x10, x26, 0xffffff7fffffffff, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xfffffeffffffffff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(rol, x23, x9, x25, 0xfffffeffffffffff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xfffffdffffffffff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(rol, x24, x8, x24, 0xfffffdffffffffff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfffffbffffffffff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(rol, x25, x7, x23, 0xfffffbffffffffff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfffff7ffffffffff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(rol, x26, x6, x22, 0xfffff7ffffffffff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffefffffffffff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(rol, x27, x5, x21, 0xffffefffffffffff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffdfffffffffff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(rol, x28, x4, x20, 0xffffdfffffffffff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffbfffffffffff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(rol, x29, x3, x19, 0xffffbfffffffffff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffff7fffffffffff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(rol, x30, x2, x18, 0xffff7fffffffffff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xfffeffffffffffff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(rol, x31, x1, x17, 0xfffeffffffffffff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xfffdffffffffffff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(rol, x1, x31, x16, 0xfffdffffffffffff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffbffffffffffff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(rol, x2, x30, x15, 0xfffbffffffffffff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfff7ffffffffffff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(rol, x3, x29, x14, 0xfff7ffffffffffff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffefffffffffffff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(rol, x4, x28, x13, 0xffefffffffffffff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffdfffffffffffff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(rol, x5, x27, x12, 0xffdfffffffffffff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffbfffffffffffff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(rol, x6, x26, x11, 0xffbfffffffffffff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xff7fffffffffffff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(rol, x7, x25, x10, 0xff7fffffffffffff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xfeffffffffffffff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(rol, x8, x24, x9, 0xfeffffffffffffff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xfdffffffffffffff), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(rol, x9, x23, x8, 0xfdffffffffffffff, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfbffffffffffffff), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(rol, x10, x22, x7, 0xfbffffffffffffff, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xfffffffff7ffffff), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(rol, x11, x21, x6, 0xfffffffff7ffffff, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffefff), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(rol, x12, x20, x5, 0xffffffffffffefff, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffdf), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(rol, x13, x19, x4, 0xffffffffffffffdf, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffffffffb), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(rol, x14, x18, x3, 0xfffffffffffffffb, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffffffffd), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(rol, x15, x17, x2, 0xfffffffffffffffd, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(rol, x16, x16, x1, 0xffffffffffffffff, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000001), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rol, x17, x15, x31, 0x0000000000000001, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000002), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rol, x18, x14, x30, 0x0000000000000002, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000004), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rol, x19, x13, x29, 0x0000000000000004, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000008), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rol, x20, x12, x28, 0x0000000000000008, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000010), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rol, x21, x11, x27, 0x0000000000000010, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000020), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rol, x22, x10, x26, 0x0000000000000020, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000040), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(rol, x23, x9, x25, 0x0000000000000040, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000080), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(rol, x24, x8, x24, 0x0000000000000080, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000100), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(rol, x25, x7, x23, 0x0000000000000100, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000200), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(rol, x26, x6, x22, 0x0000000000000200, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000400), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(rol, x27, x5, x21, 0x0000000000000400, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000800), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(rol, x28, x4, x20, 0x0000000000000800, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000001000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(rol, x29, x3, x19, 0x0000000000001000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000002000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(rol, x30, x2, x18, 0x0000000000002000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000004000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(rol, x31, x1, x17, 0x0000000000004000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000008000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(rol, x1, x31, x16, 0x0000000000008000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000010000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(rol, x2, x30, x15, 0x0000000000010000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000020000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(rol, x3, x29, x14, 0x0000000000020000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000040000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(rol, x4, x28, x13, 0x0000000000040000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000080000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(rol, x5, x27, x12, 0x0000000000080000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000100000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(rol, x6, x26, x11, 0x0000000000100000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000200000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(rol, x7, x25, x10, 0x0000000000200000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000400000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(rol, x8, x24, x9, 0x0000000000400000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000800000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(rol, x9, x23, x8, 0x0000000000800000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000001000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(rol, x10, x22, x7, 0x0000000001000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000002000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(rol, x11, x21, x6, 0x0000000002000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000004000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(rol, x12, x20, x5, 0x0000000004000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000008000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(rol, x13, x19, x4, 0x0000000008000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000010000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rol, x14, x18, x3, 0x0000000010000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000020000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(rol, x15, x17, x2, 0x0000000020000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000040000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(rol, x16, x16, x1, 0x0000000040000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000080000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rol, x17, x15, x31, 0x0000000080000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000100000000), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rol, x18, x14, x30, 0x0000000100000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000200000000), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rol, x19, x13, x29, 0x0000000200000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000400000000), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rol, x20, x12, x28, 0x0000000400000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000800000000), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rol, x21, x11, x27, 0x0000000800000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000001000000000), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rol, x22, x10, x26, 0x0000001000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000002000000000), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(rol, x23, x9, x25, 0x0000002000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000004000000000), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(rol, x24, x8, x24, 0x0000004000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000008000000000), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(rol, x25, x7, x23, 0x0000008000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000010000000000), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(rol, x26, x6, x22, 0x0000010000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000020000000000), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(rol, x27, x5, x21, 0x0000020000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000040000000000), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(rol, x28, x4, x20, 0x0000040000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000080000000000), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(rol, x29, x3, x19, 0x0000080000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000100000000000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(rol, x30, x2, x18, 0x0000100000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000200000000000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(rol, x31, x1, x17, 0x0000200000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000400000000000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(rol, x1, x31, x16, 0x0000400000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000800000000000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(rol, x2, x30, x15, 0x0000800000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0001000000000000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(rol, x3, x29, x14, 0x0001000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0002000000000000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(rol, x4, x28, x13, 0x0002000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0004000000000000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(rol, x5, x27, x12, 0x0004000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0008000000000000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(rol, x6, x26, x11, 0x0008000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0010000000000000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(rol, x7, x25, x10, 0x0010000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0020000000000000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(rol, x8, x24, x9, 0x0020000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0040000000000000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(rol, x9, x23, x8, 0x0040000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0080000000000000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(rol, x10, x22, x7, 0x0080000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0100000000000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(rol, x11, x21, x6, 0x0100000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0200000000000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(rol, x12, x20, x5, 0x0200000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0400000000000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(rol, x13, x19, x4, 0x0400000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0800000000000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rol, x14, x18, x3, 0x0800000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x1000000000000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(rol, x15, x17, x2, 0x1000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x2000000000000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(rol, x16, x16, x1, 0x2000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x4000000000000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rol, x17, x15, x31, 0x4000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x8000000000000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rol, x18, x14, x30, 0x8000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rol, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffffffffe), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rol, x20, x12, x28, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xfffffffffffffffd), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rol, x21, x11, x27, 0xfffffffffffffffd, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffffffb), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rol, x22, x10, x26, 0xfffffffffffffffb, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffffff7), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(rol, x23, x9, x25, 0xfffffffffffffff7, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffef), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(rol, x24, x8, x24, 0xffffffffffffffef, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffdf), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(rol, x25, x7, x23, 0xffffffffffffffdf, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffbf), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(rol, x26, x6, x22, 0xffffffffffffffbf, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffff7f), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(rol, x27, x5, x21, 0xffffffffffffff7f, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffffeff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(rol, x28, x4, x20, 0xfffffffffffffeff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xfffffffffffffdff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(rol, x29, x3, x19, 0xfffffffffffffdff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffffbff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(rol, x30, x2, x18, 0xfffffffffffffbff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffff7ff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(rol, x31, x1, x17, 0xfffffffffffff7ff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffefff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(rol, x1, x31, x16, 0xffffffffffffefff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffdfff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(rol, x2, x30, x15, 0xffffffffffffdfff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffbfff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(rol, x3, x29, x14, 0xffffffffffffbfff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffff7fff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(rol, x4, x28, x13, 0xffffffffffff7fff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffffeffff), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(rol, x5, x27, x12, 0xfffffffffffeffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffffdffff), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(rol, x6, x26, x11, 0xfffffffffffdffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffffbffff), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(rol, x7, x25, x10, 0xfffffffffffbffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffff7ffff), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(rol, x8, x24, x9, 0xfffffffffff7ffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffefffff), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(rol, x9, x23, x8, 0xffffffffffefffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffdfffff), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(rol, x10, x22, x7, 0xffffffffffdfffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffbfffff), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(rol, x11, x21, x6, 0xffffffffffbfffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffffffff7fffff), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(rol, x12, x20, x5, 0xffffffffff7fffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xfffffffffeffffff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(rol, x13, x19, x4, 0xfffffffffeffffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffdffffff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rol, x14, x18, x3, 0xfffffffffdffffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffbffffff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(rol, x15, x17, x2, 0xfffffffffbffffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xfffffffff7ffffff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(rol, x16, x16, x1, 0xfffffffff7ffffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffffefffffff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rol, x17, x15, x31, 0xffffffffefffffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffffdfffffff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rol, x18, x14, x30, 0xffffffffdfffffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffffbfffffff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rol, x19, x13, x29, 0xffffffffbfffffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xffffffff7fffffff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rol, x20, x12, x28, 0xffffffff7fffffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xfffffffeffffffff), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rol, x21, x11, x27, 0xfffffffeffffffff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xfffffffdffffffff), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rol, x22, x10, x26, 0xfffffffdffffffff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xfffffffbffffffff), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(rol, x23, x9, x25, 0xfffffffbffffffff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xfffffff7ffffffff), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(rol, x24, x8, x24, 0xfffffff7ffffffff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xffffffefffffffff), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(rol, x25, x7, x23, 0xffffffefffffffff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xffffffdfffffffff), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(rol, x26, x6, x22, 0xffffffdfffffffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xffffffbfffffffff), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(rol, x27, x5, x21, 0xffffffbfffffffff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xffffff7fffffffff), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(rol, x28, x4, x20, 0xffffff7fffffffff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xfffffeffffffffff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(rol, x29, x3, x19, 0xfffffeffffffffff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xfffffdffffffffff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(rol, x30, x2, x18, 0xfffffdffffffffff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xfffffbffffffffff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(rol, x31, x1, x17, 0xfffffbffffffffff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xfffff7ffffffffff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(rol, x1, x31, x16, 0xfffff7ffffffffff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffffefffffffffff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(rol, x2, x30, x15, 0xffffefffffffffff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffffdfffffffffff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(rol, x3, x29, x14, 0xffffdfffffffffff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xffffbfffffffffff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(rol, x4, x28, x13, 0xffffbfffffffffff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xffff7fffffffffff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(rol, x5, x27, x12, 0xffff7fffffffffff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xfffeffffffffffff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(rol, x6, x26, x11, 0xfffeffffffffffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xfffdffffffffffff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(rol, x7, x25, x10, 0xfffdffffffffffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xfffbffffffffffff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(rol, x8, x24, x9, 0xfffbffffffffffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xfff7ffffffffffff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(rol, x9, x23, x8, 0xfff7ffffffffffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffefffffffffffff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(rol, x10, x22, x7, 0xffefffffffffffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffdfffffffffffff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(rol, x11, x21, x6, 0xffdfffffffffffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xffbfffffffffffff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(rol, x12, x20, x5, 0xffbfffffffffffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xff7fffffffffffff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(rol, x13, x19, x4, 0xff7fffffffffffff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xfeffffffffffffff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rol, x14, x18, x3, 0xfeffffffffffffff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xfdffffffffffffff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(rol, x15, x17, x2, 0xfdffffffffffffff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xfbffffffffffffff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(rol, x16, x16, x1, 0xfbffffffffffffff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xf7ffffffffffffff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rol, x17, x15, x31, 0xf7ffffffffffffff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xefffffffffffffff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rol, x18, x14, x30, 0xefffffffffffffff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xdfffffffffffffff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rol, x19, x13, x29, 0xdfffffffffffffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xbfffffffffffffff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rol, x20, x12, x28, 0xbfffffffffffffff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x7fffffffffffffff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rol, x21, x11, x27, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rol, x22, x10, x26, 0xffffffffffffffff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x90de611efbf9c220), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(rol, x23, x25, x25, 0x90de611efbf9c220, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(rol, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xc9649f05a8e1a8bb), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(rol, x25, x7, x0, 0xc9649f05a8e1a8bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(rol, x26, x0, x22, 0x0000000000000000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/ROLW-01.S b/riscof/suite/rv64i_m/K_unratified/ROLW-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..a2db6efe8ac16ce257cd11e2f23bd2098d89321d
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/ROLW-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test ROLW-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'rolw'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",rolw)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",rolw)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",rolw)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x000000006f528cad), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(rolw, x1, x31, x16, 0x000000006f528cad, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x000000000e97fdf6), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(rolw, x2, x30, x15, 0x000000000e97fdf6, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xffffffffa8e1a8bb), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(rolw, x3, x29, x14, 0xffffffffa8e1a8bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x00000000464cfe5a), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(rolw, x4, x28, x13, 0x00000000464cfe5a, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xffffffffa927a30e), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(rolw, x5, x27, x12, 0xffffffffa927a30e, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x000000000857a945), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(rolw, x6, x26, x11, 0x000000000857a945, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xffffffffdfde1f0c), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(rolw, x7, x25, x10, 0xffffffffdfde1f0c, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x000000000383d796), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(rolw, x8, x24, x9, 0x000000000383d796, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x0000000048fa20b7), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(rolw, x9, x23, x8, 0x0000000048fa20b7, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xffffffff84624379), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(rolw, x10, x22, x7, 0xffffffff84624379, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0xffffffff80000000), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(rolw, x11, x21, x6, 0xffffffff80000000, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000001), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(rolw, x12, x20, x5, 0x0000000000000001, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000002), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(rolw, x13, x19, x4, 0x0000000000000002, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000004), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(rolw, x14, x18, x3, 0x0000000000000004, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000008), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(rolw, x15, x17, x2, 0x0000000000000008, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000010), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(rolw, x16, x16, x1, 0x0000000000000010, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000020), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(rolw, x17, x15, x31, 0x0000000000000020, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000040), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(rolw, x18, x14, x30, 0x0000000000000040, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000080), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(rolw, x19, x13, x29, 0x0000000000000080, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000100), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(rolw, x20, x12, x28, 0x0000000000000100, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000200), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(rolw, x21, x11, x27, 0x0000000000000200, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000400), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(rolw, x22, x10, x26, 0x0000000000000400, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000800), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(rolw, x23, x9, x25, 0x0000000000000800, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000001000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(rolw, x24, x8, x24, 0x0000000000001000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000000002000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(rolw, x25, x7, x23, 0x0000000000002000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000004000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(rolw, x26, x6, x22, 0x0000000000004000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000000008000), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(rolw, x27, x5, x21, 0x0000000000008000, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000000010000), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(rolw, x28, x4, x20, 0x0000000000010000, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000020000), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(rolw, x29, x3, x19, 0x0000000000020000, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000040000), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(rolw, x30, x2, x18, 0x0000000000040000, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000080000), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(rolw, x31, x1, x17, 0x0000000000080000, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000100000), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(rolw, x1, x31, x16, 0x0000000000100000, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000200000), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(rolw, x2, x30, x15, 0x0000000000200000, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000400000), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(rolw, x3, x29, x14, 0x0000000000400000, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000000800000), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(rolw, x4, x28, x13, 0x0000000000800000, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000001000000), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(rolw, x5, x27, x12, 0x0000000001000000, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000002000000), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(rolw, x6, x26, x11, 0x0000000002000000, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000004000000), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(rolw, x7, x25, x10, 0x0000000004000000, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000008000000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(rolw, x8, x24, x9, 0x0000000008000000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000010000000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(rolw, x9, x23, x8, 0x0000000010000000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000020000000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(rolw, x10, x22, x7, 0x0000000020000000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000040000000), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(rolw, x11, x21, x6, 0x0000000040000000, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(rolw, x12, x20, x5, 0x0000000000000000, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(rolw, x13, x19, x4, 0x0000000000000000, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(rolw, x14, x18, x3, 0x0000000000000000, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(rolw, x15, x17, x2, 0x0000000000000000, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(rolw, x16, x16, x1, 0x0000000000000000, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(rolw, x17, x15, x31, 0x0000000000000000, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(rolw, x18, x14, x30, 0x0000000000000000, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(rolw, x19, x13, x29, 0x0000000000000000, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(rolw, x20, x12, x28, 0x0000000000000000, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(rolw, x21, x11, x27, 0x0000000000000000, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(rolw, x22, x10, x26, 0x0000000000000000, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(rolw, x23, x9, x25, 0x0000000000000000, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(rolw, x24, x8, x24, 0x0000000000000000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(rolw, x25, x7, x23, 0x0000000000000000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(rolw, x26, x6, x22, 0x0000000000000000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(rolw, x27, x5, x21, 0x0000000000000000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(rolw, x28, x4, x20, 0x0000000000000000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(rolw, x29, x3, x19, 0x0000000000000000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(rolw, x30, x2, x18, 0x0000000000000000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(rolw, x31, x1, x17, 0x0000000000000000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(rolw, x1, x31, x16, 0x0000000000000000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(rolw, x2, x30, x15, 0x0000000000000000, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(rolw, x3, x29, x14, 0x0000000000000000, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(rolw, x4, x28, x13, 0x0000000000000000, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(rolw, x5, x27, x12, 0x0000000000000000, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(rolw, x6, x26, x11, 0x0000000000000000, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(rolw, x7, x25, x10, 0x0000000000000000, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(rolw, x8, x24, x9, 0x0000000000000000, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(rolw, x9, x23, x8, 0x0000000000000000, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(rolw, x10, x22, x7, 0x0000000000000000, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(rolw, x11, x21, x6, 0x0000000000000000, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(rolw, x12, x20, x5, 0x0000000000000000, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(rolw, x13, x19, x4, 0x0000000000000000, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffffffffe), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rolw, x14, x18, x3, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffffffffd), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(rolw, x15, x17, x2, 0xfffffffffffffffd, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xfffffffffffffffb), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(rolw, x16, x16, x1, 0xfffffffffffffffb, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xfffffffffffffff7), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(rolw, x17, x15, x31, 0xfffffffffffffff7, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffef), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(rolw, x18, x14, x30, 0xffffffffffffffef, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffdf), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(rolw, x19, x13, x29, 0xffffffffffffffdf, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffbf), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(rolw, x20, x12, x28, 0xffffffffffffffbf, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffff7f), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(rolw, x21, x11, x27, 0xffffffffffffff7f, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffffeff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(rolw, x22, x10, x26, 0xfffffffffffffeff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffffdff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(rolw, x23, x9, x25, 0xfffffffffffffdff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xfffffffffffffbff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(rolw, x24, x8, x24, 0xfffffffffffffbff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xfffffffffffff7ff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(rolw, x25, x7, x23, 0xfffffffffffff7ff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffefff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(rolw, x26, x6, x22, 0xffffffffffffefff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffdfff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(rolw, x27, x5, x21, 0xffffffffffffdfff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffbfff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(rolw, x28, x4, x20, 0xffffffffffffbfff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffff7fff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(rolw, x29, x3, x19, 0xffffffffffff7fff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffeffff), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(rolw, x30, x2, x18, 0xfffffffffffeffff, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffdffff), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(rolw, x31, x1, x17, 0xfffffffffffdffff, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xfffffffffffbffff), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(rolw, x1, x31, x16, 0xfffffffffffbffff, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xfffffffffff7ffff), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(rolw, x2, x30, x15, 0xfffffffffff7ffff, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffefffff), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(rolw, x3, x29, x14, 0xffffffffffefffff, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffdfffff), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(rolw, x4, x28, x13, 0xffffffffffdfffff, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffbfffff), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(rolw, x5, x27, x12, 0xffffffffffbfffff, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xffffffffff7fffff), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(rolw, x6, x26, x11, 0xffffffffff7fffff, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffeffffff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(rolw, x7, x25, x10, 0xfffffffffeffffff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffdffffff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(rolw, x8, x24, x9, 0xfffffffffdffffff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xfffffffffbffffff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(rolw, x9, x23, x8, 0xfffffffffbffffff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xfffffffff7ffffff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(rolw, x10, x22, x7, 0xfffffffff7ffffff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffffffefffffff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(rolw, x11, x21, x6, 0xffffffffefffffff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffffffffdfffffff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(rolw, x12, x20, x5, 0xffffffffdfffffff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffffffffbfffffff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(rolw, x13, x19, x4, 0xffffffffbfffffff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x000000007fffffff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(rolw, x14, x18, x3, 0x000000007fffffff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(rolw, x15, x17, x2, 0xffffffffffffffff, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(rolw, x16, x16, x1, 0xffffffffffffffff, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(rolw, x17, x15, x31, 0xffffffffffffffff, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(rolw, x18, x14, x30, 0xffffffffffffffff, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(rolw, x19, x13, x29, 0xffffffffffffffff, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(rolw, x20, x12, x28, 0xffffffffffffffff, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(rolw, x21, x11, x27, 0xffffffffffffffff, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(rolw, x22, x10, x26, 0xffffffffffffffff, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(rolw, x23, x9, x25, 0xffffffffffffffff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(rolw, x24, x8, x24, 0xffffffffffffffff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(rolw, x25, x7, x23, 0xffffffffffffffff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(rolw, x26, x6, x22, 0xffffffffffffffff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(rolw, x27, x5, x21, 0xffffffffffffffff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(rolw, x28, x4, x20, 0xffffffffffffffff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(rolw, x29, x3, x19, 0xffffffffffffffff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(rolw, x30, x2, x18, 0xffffffffffffffff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(rolw, x31, x1, x17, 0xffffffffffffffff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(rolw, x1, x31, x16, 0xffffffffffffffff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(rolw, x2, x30, x15, 0xffffffffffffffff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(rolw, x3, x29, x14, 0xffffffffffffffff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(rolw, x4, x28, x13, 0xffffffffffffffff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(rolw, x5, x27, x12, 0xffffffffffffffff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(rolw, x6, x26, x11, 0xffffffffffffffff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(rolw, x7, x25, x10, 0xffffffffffffffff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(rolw, x8, x24, x9, 0xffffffffffffffff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(rolw, x9, x23, x8, 0xffffffffffffffff, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(rolw, x10, x22, x7, 0xffffffffffffffff, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(rolw, x11, x21, x6, 0xffffffffffffffff, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(rolw, x12, x20, x5, 0xffffffffffffffff, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(rolw, x13, x19, x4, 0xffffffffffffffff, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(rolw, x14, x18, x3, 0xffffffffffffffff, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(rolw, x15, x17, x2, 0xffffffffffffffff, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(rolw, x16, x16, x1, 0xffffffffffffffff, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000001), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rolw, x17, x15, x31, 0x0000000000000001, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000002), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rolw, x18, x14, x30, 0x0000000000000002, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000004), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rolw, x19, x13, x29, 0x0000000000000004, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000008), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rolw, x20, x12, x28, 0x0000000000000008, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000010), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rolw, x21, x11, x27, 0x0000000000000010, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000020), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rolw, x22, x10, x26, 0x0000000000000020, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000040), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(rolw, x23, x9, x25, 0x0000000000000040, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000080), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(rolw, x24, x8, x24, 0x0000000000000080, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000100), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(rolw, x25, x7, x23, 0x0000000000000100, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000200), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(rolw, x26, x6, x22, 0x0000000000000200, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000400), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(rolw, x27, x5, x21, 0x0000000000000400, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000800), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(rolw, x28, x4, x20, 0x0000000000000800, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000001000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(rolw, x29, x3, x19, 0x0000000000001000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000002000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(rolw, x30, x2, x18, 0x0000000000002000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000004000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(rolw, x31, x1, x17, 0x0000000000004000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000008000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(rolw, x1, x31, x16, 0x0000000000008000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000010000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(rolw, x2, x30, x15, 0x0000000000010000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000020000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(rolw, x3, x29, x14, 0x0000000000020000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000040000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(rolw, x4, x28, x13, 0x0000000000040000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000080000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(rolw, x5, x27, x12, 0x0000000000080000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000100000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(rolw, x6, x26, x11, 0x0000000000100000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000200000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(rolw, x7, x25, x10, 0x0000000000200000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000400000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(rolw, x8, x24, x9, 0x0000000000400000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000800000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(rolw, x9, x23, x8, 0x0000000000800000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000001000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(rolw, x10, x22, x7, 0x0000000001000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000002000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(rolw, x11, x21, x6, 0x0000000002000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000004000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(rolw, x12, x20, x5, 0x0000000004000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000008000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(rolw, x13, x19, x4, 0x0000000008000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000010000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rolw, x14, x18, x3, 0x0000000010000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000020000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(rolw, x15, x17, x2, 0x0000000020000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000040000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(rolw, x16, x16, x1, 0x0000000040000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0xffffffff80000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rolw, x17, x15, x31, 0xffffffff80000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rolw, x18, x14, x30, 0x0000000000000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rolw, x19, x13, x29, 0x0000000000000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rolw, x20, x12, x28, 0x0000000000000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rolw, x21, x11, x27, 0x0000000000000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rolw, x22, x10, x26, 0x0000000000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(rolw, x23, x9, x25, 0x0000000000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(rolw, x24, x8, x24, 0x0000000000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(rolw, x25, x7, x23, 0x0000000000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(rolw, x26, x6, x22, 0x0000000000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(rolw, x27, x5, x21, 0x0000000000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(rolw, x28, x4, x20, 0x0000000000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(rolw, x29, x3, x19, 0x0000000000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(rolw, x30, x2, x18, 0x0000000000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(rolw, x31, x1, x17, 0x0000000000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(rolw, x1, x31, x16, 0x0000000000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(rolw, x2, x30, x15, 0x0000000000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(rolw, x3, x29, x14, 0x0000000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(rolw, x4, x28, x13, 0x0000000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(rolw, x5, x27, x12, 0x0000000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(rolw, x6, x26, x11, 0x0000000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(rolw, x7, x25, x10, 0x0000000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(rolw, x8, x24, x9, 0x0000000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(rolw, x9, x23, x8, 0x0000000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(rolw, x10, x22, x7, 0x0000000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(rolw, x11, x21, x6, 0x0000000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(rolw, x12, x20, x5, 0x0000000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(rolw, x13, x19, x4, 0x0000000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rolw, x14, x18, x3, 0x0000000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(rolw, x15, x17, x2, 0x0000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(rolw, x16, x16, x1, 0x0000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rolw, x17, x15, x31, 0x0000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rolw, x18, x14, x30, 0x0000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rolw, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffffffffe), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rolw, x20, x12, x28, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xfffffffffffffffd), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rolw, x21, x11, x27, 0xfffffffffffffffd, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffffffb), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rolw, x22, x10, x26, 0xfffffffffffffffb, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffffff7), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(rolw, x23, x9, x25, 0xfffffffffffffff7, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffef), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(rolw, x24, x8, x24, 0xffffffffffffffef, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffdf), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(rolw, x25, x7, x23, 0xffffffffffffffdf, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffbf), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(rolw, x26, x6, x22, 0xffffffffffffffbf, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffff7f), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(rolw, x27, x5, x21, 0xffffffffffffff7f, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffffeff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(rolw, x28, x4, x20, 0xfffffffffffffeff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xfffffffffffffdff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(rolw, x29, x3, x19, 0xfffffffffffffdff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffffbff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(rolw, x30, x2, x18, 0xfffffffffffffbff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffff7ff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(rolw, x31, x1, x17, 0xfffffffffffff7ff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffefff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(rolw, x1, x31, x16, 0xffffffffffffefff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffdfff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(rolw, x2, x30, x15, 0xffffffffffffdfff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffbfff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(rolw, x3, x29, x14, 0xffffffffffffbfff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffff7fff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(rolw, x4, x28, x13, 0xffffffffffff7fff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffffeffff), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(rolw, x5, x27, x12, 0xfffffffffffeffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffffdffff), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(rolw, x6, x26, x11, 0xfffffffffffdffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffffbffff), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(rolw, x7, x25, x10, 0xfffffffffffbffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffff7ffff), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(rolw, x8, x24, x9, 0xfffffffffff7ffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffefffff), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(rolw, x9, x23, x8, 0xffffffffffefffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffdfffff), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(rolw, x10, x22, x7, 0xffffffffffdfffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffbfffff), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(rolw, x11, x21, x6, 0xffffffffffbfffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffffffff7fffff), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(rolw, x12, x20, x5, 0xffffffffff7fffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xfffffffffeffffff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(rolw, x13, x19, x4, 0xfffffffffeffffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffdffffff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rolw, x14, x18, x3, 0xfffffffffdffffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffbffffff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(rolw, x15, x17, x2, 0xfffffffffbffffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xfffffffff7ffffff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(rolw, x16, x16, x1, 0xfffffffff7ffffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffffefffffff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rolw, x17, x15, x31, 0xffffffffefffffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffffdfffffff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rolw, x18, x14, x30, 0xffffffffdfffffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffffbfffffff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rolw, x19, x13, x29, 0xffffffffbfffffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x000000007fffffff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rolw, x20, x12, x28, 0x000000007fffffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rolw, x21, x11, x27, 0xffffffffffffffff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rolw, x22, x10, x26, 0xffffffffffffffff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(rolw, x23, x9, x25, 0xffffffffffffffff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(rolw, x24, x8, x24, 0xffffffffffffffff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(rolw, x25, x7, x23, 0xffffffffffffffff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(rolw, x26, x6, x22, 0xffffffffffffffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(rolw, x27, x5, x21, 0xffffffffffffffff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(rolw, x28, x4, x20, 0xffffffffffffffff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(rolw, x29, x3, x19, 0xffffffffffffffff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(rolw, x30, x2, x18, 0xffffffffffffffff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(rolw, x31, x1, x17, 0xffffffffffffffff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(rolw, x1, x31, x16, 0xffffffffffffffff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(rolw, x2, x30, x15, 0xffffffffffffffff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(rolw, x3, x29, x14, 0xffffffffffffffff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(rolw, x4, x28, x13, 0xffffffffffffffff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(rolw, x5, x27, x12, 0xffffffffffffffff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(rolw, x6, x26, x11, 0xffffffffffffffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(rolw, x7, x25, x10, 0xffffffffffffffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(rolw, x8, x24, x9, 0xffffffffffffffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(rolw, x9, x23, x8, 0xffffffffffffffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(rolw, x10, x22, x7, 0xffffffffffffffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(rolw, x11, x21, x6, 0xffffffffffffffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(rolw, x12, x20, x5, 0xffffffffffffffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(rolw, x13, x19, x4, 0xffffffffffffffff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rolw, x14, x18, x3, 0xffffffffffffffff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(rolw, x15, x17, x2, 0xffffffffffffffff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(rolw, x16, x16, x1, 0xffffffffffffffff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rolw, x17, x15, x31, 0xffffffffffffffff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rolw, x18, x14, x30, 0xffffffffffffffff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rolw, x19, x13, x29, 0xffffffffffffffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rolw, x20, x12, x28, 0xffffffffffffffff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rolw, x21, x11, x27, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rolw, x22, x10, x26, 0xffffffffffffffff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0xffffffff90de6118), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(rolw, x23, x25, x25, 0xffffffff90de6118, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(rolw, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xffffffffa8e1a8bb), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(rolw, x25, x7, x0, 0xffffffffa8e1a8bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(rolw, x26, x0, x22, 0x0000000000000000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/ROR-01.S b/riscof/suite/rv64i_m/K_unratified/ROR-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..751925201b8fd69ca432f543836c5469fc414061
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/ROR-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test ROR-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'ror'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",ror)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",ror)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",ror)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xb5bd4a32a21fa7bd), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(ror, x1, x31, x16, 0xb5bd4a32a21fa7bd, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x5ff7d837a52b9c5a), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(ror, x2, x30, x15, 0x5ff7d837a52b9c5a, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xc9649f05a8e1a8bb), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(ror, x3, x29, x14, 0xc9649f05a8e1a8bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x66a82523091933f9), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(ror, x4, x28, x13, 0x66a82523091933f9, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x8e808c3aa49e2144), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(ror, x5, x27, x12, 0x8e808c3aa49e2144, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x215ea8d61ca8a514), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(ror, x6, x26, x11, 0x215ea8d61ca8a514, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x786e7525fa9c337f), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(ror, x7, x25, x10, 0x786e7525fa9c337f, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x5ece8fee0f5e5810), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(ror, x8, x24, x9, 0x5ece8fee0f5e5810, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xfad6da0d523e882d), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(ror, x9, x23, x8, 0xfad6da0d523e882d, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xde611efbf9c22090), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(ror, x10, x22, x7, 0xde611efbf9c22090, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000002), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(ror, x11, x21, x6, 0x0000000000000002, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000004), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(ror, x12, x20, x5, 0x0000000000000004, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000008), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(ror, x13, x19, x4, 0x0000000000000008, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000010), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(ror, x14, x18, x3, 0x0000000000000010, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000020), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(ror, x15, x17, x2, 0x0000000000000020, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000040), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(ror, x16, x16, x1, 0x0000000000000040, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000080), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(ror, x17, x15, x31, 0x0000000000000080, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000100), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(ror, x18, x14, x30, 0x0000000000000100, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000200), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(ror, x19, x13, x29, 0x0000000000000200, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000400), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(ror, x20, x12, x28, 0x0000000000000400, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000800), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(ror, x21, x11, x27, 0x0000000000000800, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000000001000), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(ror, x22, x10, x26, 0x0000000000001000, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000002000), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(ror, x23, x9, x25, 0x0000000000002000, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000004000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(ror, x24, x8, x24, 0x0000000000004000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000000008000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(ror, x25, x7, x23, 0x0000000000008000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000010000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(ror, x26, x6, x22, 0x0000000000010000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000000020000), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(ror, x27, x5, x21, 0x0000000000020000, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000000040000), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(ror, x28, x4, x20, 0x0000000000040000, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000080000), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(ror, x29, x3, x19, 0x0000000000080000, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000100000), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(ror, x30, x2, x18, 0x0000000000100000, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000200000), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(ror, x31, x1, x17, 0x0000000000200000, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000400000), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(ror, x1, x31, x16, 0x0000000000400000, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000800000), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(ror, x2, x30, x15, 0x0000000000800000, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000001000000), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(ror, x3, x29, x14, 0x0000000001000000, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000002000000), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(ror, x4, x28, x13, 0x0000000002000000, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000004000000), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(ror, x5, x27, x12, 0x0000000004000000, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000008000000), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(ror, x6, x26, x11, 0x0000000008000000, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000010000000), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(ror, x7, x25, x10, 0x0000000010000000, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000020000000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(ror, x8, x24, x9, 0x0000000020000000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000040000000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(ror, x9, x23, x8, 0x0000000040000000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000080000000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(ror, x10, x22, x7, 0x0000000080000000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000100000000), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(ror, x11, x21, x6, 0x0000000100000000, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000200000000), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(ror, x12, x20, x5, 0x0000000200000000, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000400000000), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(ror, x13, x19, x4, 0x0000000400000000, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000800000000), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(ror, x14, x18, x3, 0x0000000800000000, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000001000000000), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(ror, x15, x17, x2, 0x0000001000000000, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000002000000000), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(ror, x16, x16, x1, 0x0000002000000000, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000004000000000), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(ror, x17, x15, x31, 0x0000004000000000, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000008000000000), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(ror, x18, x14, x30, 0x0000008000000000, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000010000000000), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(ror, x19, x13, x29, 0x0000010000000000, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000020000000000), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(ror, x20, x12, x28, 0x0000020000000000, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000040000000000), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(ror, x21, x11, x27, 0x0000040000000000, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000080000000000), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(ror, x22, x10, x26, 0x0000080000000000, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000100000000000), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(ror, x23, x9, x25, 0x0000100000000000, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000200000000000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(ror, x24, x8, x24, 0x0000200000000000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000400000000000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(ror, x25, x7, x23, 0x0000400000000000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000800000000000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(ror, x26, x6, x22, 0x0000800000000000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0001000000000000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(ror, x27, x5, x21, 0x0001000000000000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0002000000000000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(ror, x28, x4, x20, 0x0002000000000000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0004000000000000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(ror, x29, x3, x19, 0x0004000000000000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0008000000000000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(ror, x30, x2, x18, 0x0008000000000000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0010000000000000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(ror, x31, x1, x17, 0x0010000000000000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0020000000000000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(ror, x1, x31, x16, 0x0020000000000000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0040000000000000), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(ror, x2, x30, x15, 0x0040000000000000, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0080000000000000), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(ror, x3, x29, x14, 0x0080000000000000, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0100000000000000), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(ror, x4, x28, x13, 0x0100000000000000, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0200000000000000), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(ror, x5, x27, x12, 0x0200000000000000, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0400000000000000), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(ror, x6, x26, x11, 0x0400000000000000, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0800000000000000), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(ror, x7, x25, x10, 0x0800000000000000, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000010000000), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(ror, x8, x24, x9, 0x0000000010000000, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000000002000), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(ror, x9, x23, x8, 0x0000000000002000, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000040), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(ror, x10, x22, x7, 0x0000000000000040, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000008), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(ror, x11, x21, x6, 0x0000000000000008, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000004), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(ror, x12, x20, x5, 0x0000000000000004, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(ror, x13, x19, x4, 0x0000000000000000, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffffffffe), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(ror, x14, x18, x3, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffffffffd), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(ror, x15, x17, x2, 0xfffffffffffffffd, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xfffffffffffffffb), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(ror, x16, x16, x1, 0xfffffffffffffffb, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xfffffffffffffff7), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(ror, x17, x15, x31, 0xfffffffffffffff7, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffef), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(ror, x18, x14, x30, 0xffffffffffffffef, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffdf), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(ror, x19, x13, x29, 0xffffffffffffffdf, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffbf), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(ror, x20, x12, x28, 0xffffffffffffffbf, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffff7f), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(ror, x21, x11, x27, 0xffffffffffffff7f, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffffeff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(ror, x22, x10, x26, 0xfffffffffffffeff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffffdff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(ror, x23, x9, x25, 0xfffffffffffffdff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xfffffffffffffbff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(ror, x24, x8, x24, 0xfffffffffffffbff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xfffffffffffff7ff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(ror, x25, x7, x23, 0xfffffffffffff7ff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffefff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(ror, x26, x6, x22, 0xffffffffffffefff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffdfff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(ror, x27, x5, x21, 0xffffffffffffdfff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffbfff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(ror, x28, x4, x20, 0xffffffffffffbfff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffff7fff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(ror, x29, x3, x19, 0xffffffffffff7fff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffeffff), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(ror, x30, x2, x18, 0xfffffffffffeffff, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffdffff), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(ror, x31, x1, x17, 0xfffffffffffdffff, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xfffffffffffbffff), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(ror, x1, x31, x16, 0xfffffffffffbffff, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xfffffffffff7ffff), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(ror, x2, x30, x15, 0xfffffffffff7ffff, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffefffff), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(ror, x3, x29, x14, 0xffffffffffefffff, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffdfffff), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(ror, x4, x28, x13, 0xffffffffffdfffff, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffbfffff), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(ror, x5, x27, x12, 0xffffffffffbfffff, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xffffffffff7fffff), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(ror, x6, x26, x11, 0xffffffffff7fffff, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffeffffff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(ror, x7, x25, x10, 0xfffffffffeffffff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffdffffff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(ror, x8, x24, x9, 0xfffffffffdffffff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xfffffffffbffffff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(ror, x9, x23, x8, 0xfffffffffbffffff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xfffffffff7ffffff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(ror, x10, x22, x7, 0xfffffffff7ffffff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffffffefffffff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(ror, x11, x21, x6, 0xffffffffefffffff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffffffffdfffffff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(ror, x12, x20, x5, 0xffffffffdfffffff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffffffffbfffffff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(ror, x13, x19, x4, 0xffffffffbfffffff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xffffffff7fffffff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(ror, x14, x18, x3, 0xffffffff7fffffff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xfffffffeffffffff), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(ror, x15, x17, x2, 0xfffffffeffffffff, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xfffffffdffffffff), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(ror, x16, x16, x1, 0xfffffffdffffffff, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfffffffbffffffff), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(ror, x17, x15, x31, 0xfffffffbffffffff, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfffffff7ffffffff), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(ror, x18, x14, x30, 0xfffffff7ffffffff, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffefffffffff), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(ror, x19, x13, x29, 0xffffffefffffffff, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffdfffffffff), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(ror, x20, x12, x28, 0xffffffdfffffffff, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffbfffffffff), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(ror, x21, x11, x27, 0xffffffbfffffffff, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffff7fffffffff), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(ror, x22, x10, x26, 0xffffff7fffffffff, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xfffffeffffffffff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(ror, x23, x9, x25, 0xfffffeffffffffff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xfffffdffffffffff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(ror, x24, x8, x24, 0xfffffdffffffffff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xfffffbffffffffff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(ror, x25, x7, x23, 0xfffffbffffffffff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfffff7ffffffffff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(ror, x26, x6, x22, 0xfffff7ffffffffff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffefffffffffff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(ror, x27, x5, x21, 0xffffefffffffffff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffdfffffffffff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(ror, x28, x4, x20, 0xffffdfffffffffff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffbfffffffffff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(ror, x29, x3, x19, 0xffffbfffffffffff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffff7fffffffffff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(ror, x30, x2, x18, 0xffff7fffffffffff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xfffeffffffffffff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(ror, x31, x1, x17, 0xfffeffffffffffff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xfffdffffffffffff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(ror, x1, x31, x16, 0xfffdffffffffffff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xfffbffffffffffff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(ror, x2, x30, x15, 0xfffbffffffffffff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfff7ffffffffffff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(ror, x3, x29, x14, 0xfff7ffffffffffff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffefffffffffffff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(ror, x4, x28, x13, 0xffefffffffffffff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffdfffffffffffff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(ror, x5, x27, x12, 0xffdfffffffffffff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffbfffffffffffff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(ror, x6, x26, x11, 0xffbfffffffffffff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xff7fffffffffffff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(ror, x7, x25, x10, 0xff7fffffffffffff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xfeffffffffffffff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(ror, x8, x24, x9, 0xfeffffffffffffff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xfdffffffffffffff), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(ror, x9, x23, x8, 0xfdffffffffffffff, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfbffffffffffffff), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(ror, x10, x22, x7, 0xfbffffffffffffff, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xfffffffff7ffffff), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(ror, x11, x21, x6, 0xfffffffff7ffffff, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffefffffffffff), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(ror, x12, x20, x5, 0xffffefffffffffff, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffdfffffffffffff), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(ror, x13, x19, x4, 0xffdfffffffffffff, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xfbffffffffffffff), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(ror, x14, x18, x3, 0xfbffffffffffffff, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xdfffffffffffffff), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(ror, x15, x17, x2, 0xdfffffffffffffff, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(ror, x16, x16, x1, 0xffffffffffffffff, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000001), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(ror, x17, x15, x31, 0x0000000000000001, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000002), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(ror, x18, x14, x30, 0x0000000000000002, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000004), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(ror, x19, x13, x29, 0x0000000000000004, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000008), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(ror, x20, x12, x28, 0x0000000000000008, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000010), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(ror, x21, x11, x27, 0x0000000000000010, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000020), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(ror, x22, x10, x26, 0x0000000000000020, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000040), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(ror, x23, x9, x25, 0x0000000000000040, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000080), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(ror, x24, x8, x24, 0x0000000000000080, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000100), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(ror, x25, x7, x23, 0x0000000000000100, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000200), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(ror, x26, x6, x22, 0x0000000000000200, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000400), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(ror, x27, x5, x21, 0x0000000000000400, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000800), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(ror, x28, x4, x20, 0x0000000000000800, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000001000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(ror, x29, x3, x19, 0x0000000000001000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000002000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(ror, x30, x2, x18, 0x0000000000002000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000004000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(ror, x31, x1, x17, 0x0000000000004000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000008000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(ror, x1, x31, x16, 0x0000000000008000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000010000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(ror, x2, x30, x15, 0x0000000000010000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000020000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(ror, x3, x29, x14, 0x0000000000020000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000040000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(ror, x4, x28, x13, 0x0000000000040000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000080000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(ror, x5, x27, x12, 0x0000000000080000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000100000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(ror, x6, x26, x11, 0x0000000000100000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000200000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(ror, x7, x25, x10, 0x0000000000200000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000400000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(ror, x8, x24, x9, 0x0000000000400000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000800000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(ror, x9, x23, x8, 0x0000000000800000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000001000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(ror, x10, x22, x7, 0x0000000001000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000002000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(ror, x11, x21, x6, 0x0000000002000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000004000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(ror, x12, x20, x5, 0x0000000004000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000008000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(ror, x13, x19, x4, 0x0000000008000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000010000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(ror, x14, x18, x3, 0x0000000010000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000020000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(ror, x15, x17, x2, 0x0000000020000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000040000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(ror, x16, x16, x1, 0x0000000040000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000080000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(ror, x17, x15, x31, 0x0000000080000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000100000000), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(ror, x18, x14, x30, 0x0000000100000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000200000000), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(ror, x19, x13, x29, 0x0000000200000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000400000000), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(ror, x20, x12, x28, 0x0000000400000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000800000000), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(ror, x21, x11, x27, 0x0000000800000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000001000000000), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(ror, x22, x10, x26, 0x0000001000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000002000000000), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(ror, x23, x9, x25, 0x0000002000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000004000000000), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(ror, x24, x8, x24, 0x0000004000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000008000000000), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(ror, x25, x7, x23, 0x0000008000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000010000000000), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(ror, x26, x6, x22, 0x0000010000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000020000000000), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(ror, x27, x5, x21, 0x0000020000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000040000000000), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(ror, x28, x4, x20, 0x0000040000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000080000000000), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(ror, x29, x3, x19, 0x0000080000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000100000000000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(ror, x30, x2, x18, 0x0000100000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000200000000000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(ror, x31, x1, x17, 0x0000200000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000400000000000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(ror, x1, x31, x16, 0x0000400000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000800000000000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(ror, x2, x30, x15, 0x0000800000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0001000000000000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(ror, x3, x29, x14, 0x0001000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0002000000000000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(ror, x4, x28, x13, 0x0002000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0004000000000000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(ror, x5, x27, x12, 0x0004000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0008000000000000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(ror, x6, x26, x11, 0x0008000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0010000000000000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(ror, x7, x25, x10, 0x0010000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0020000000000000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(ror, x8, x24, x9, 0x0020000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0040000000000000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(ror, x9, x23, x8, 0x0040000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0080000000000000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(ror, x10, x22, x7, 0x0080000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0100000000000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(ror, x11, x21, x6, 0x0100000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0200000000000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(ror, x12, x20, x5, 0x0200000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0400000000000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(ror, x13, x19, x4, 0x0400000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0800000000000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(ror, x14, x18, x3, 0x0800000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x1000000000000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(ror, x15, x17, x2, 0x1000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x2000000000000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(ror, x16, x16, x1, 0x2000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x4000000000000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(ror, x17, x15, x31, 0x4000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x8000000000000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(ror, x18, x14, x30, 0x8000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(ror, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffffffffe), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(ror, x20, x12, x28, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xfffffffffffffffd), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(ror, x21, x11, x27, 0xfffffffffffffffd, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffffffb), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(ror, x22, x10, x26, 0xfffffffffffffffb, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffffff7), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(ror, x23, x9, x25, 0xfffffffffffffff7, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffef), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(ror, x24, x8, x24, 0xffffffffffffffef, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffdf), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(ror, x25, x7, x23, 0xffffffffffffffdf, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffbf), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(ror, x26, x6, x22, 0xffffffffffffffbf, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffff7f), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(ror, x27, x5, x21, 0xffffffffffffff7f, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffffeff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(ror, x28, x4, x20, 0xfffffffffffffeff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xfffffffffffffdff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(ror, x29, x3, x19, 0xfffffffffffffdff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffffbff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(ror, x30, x2, x18, 0xfffffffffffffbff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffff7ff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(ror, x31, x1, x17, 0xfffffffffffff7ff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffefff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(ror, x1, x31, x16, 0xffffffffffffefff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffdfff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(ror, x2, x30, x15, 0xffffffffffffdfff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffbfff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(ror, x3, x29, x14, 0xffffffffffffbfff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffff7fff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(ror, x4, x28, x13, 0xffffffffffff7fff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffffeffff), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(ror, x5, x27, x12, 0xfffffffffffeffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffffdffff), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(ror, x6, x26, x11, 0xfffffffffffdffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffffbffff), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(ror, x7, x25, x10, 0xfffffffffffbffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffff7ffff), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(ror, x8, x24, x9, 0xfffffffffff7ffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffefffff), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(ror, x9, x23, x8, 0xffffffffffefffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffdfffff), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(ror, x10, x22, x7, 0xffffffffffdfffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffbfffff), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(ror, x11, x21, x6, 0xffffffffffbfffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffffffff7fffff), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(ror, x12, x20, x5, 0xffffffffff7fffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xfffffffffeffffff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(ror, x13, x19, x4, 0xfffffffffeffffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffdffffff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(ror, x14, x18, x3, 0xfffffffffdffffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffbffffff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(ror, x15, x17, x2, 0xfffffffffbffffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xfffffffff7ffffff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(ror, x16, x16, x1, 0xfffffffff7ffffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffffefffffff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(ror, x17, x15, x31, 0xffffffffefffffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffffdfffffff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(ror, x18, x14, x30, 0xffffffffdfffffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffffbfffffff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(ror, x19, x13, x29, 0xffffffffbfffffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xffffffff7fffffff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(ror, x20, x12, x28, 0xffffffff7fffffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xfffffffeffffffff), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(ror, x21, x11, x27, 0xfffffffeffffffff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xfffffffdffffffff), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(ror, x22, x10, x26, 0xfffffffdffffffff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xfffffffbffffffff), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(ror, x23, x9, x25, 0xfffffffbffffffff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xfffffff7ffffffff), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(ror, x24, x8, x24, 0xfffffff7ffffffff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xffffffefffffffff), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(ror, x25, x7, x23, 0xffffffefffffffff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xffffffdfffffffff), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(ror, x26, x6, x22, 0xffffffdfffffffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xffffffbfffffffff), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(ror, x27, x5, x21, 0xffffffbfffffffff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xffffff7fffffffff), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(ror, x28, x4, x20, 0xffffff7fffffffff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xfffffeffffffffff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(ror, x29, x3, x19, 0xfffffeffffffffff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xfffffdffffffffff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(ror, x30, x2, x18, 0xfffffdffffffffff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xfffffbffffffffff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(ror, x31, x1, x17, 0xfffffbffffffffff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xfffff7ffffffffff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(ror, x1, x31, x16, 0xfffff7ffffffffff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffffefffffffffff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(ror, x2, x30, x15, 0xffffefffffffffff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffffdfffffffffff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(ror, x3, x29, x14, 0xffffdfffffffffff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xffffbfffffffffff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(ror, x4, x28, x13, 0xffffbfffffffffff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xffff7fffffffffff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(ror, x5, x27, x12, 0xffff7fffffffffff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xfffeffffffffffff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(ror, x6, x26, x11, 0xfffeffffffffffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xfffdffffffffffff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(ror, x7, x25, x10, 0xfffdffffffffffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xfffbffffffffffff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(ror, x8, x24, x9, 0xfffbffffffffffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xfff7ffffffffffff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(ror, x9, x23, x8, 0xfff7ffffffffffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffefffffffffffff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(ror, x10, x22, x7, 0xffefffffffffffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffdfffffffffffff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(ror, x11, x21, x6, 0xffdfffffffffffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xffbfffffffffffff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(ror, x12, x20, x5, 0xffbfffffffffffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xff7fffffffffffff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(ror, x13, x19, x4, 0xff7fffffffffffff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xfeffffffffffffff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(ror, x14, x18, x3, 0xfeffffffffffffff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xfdffffffffffffff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(ror, x15, x17, x2, 0xfdffffffffffffff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xfbffffffffffffff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(ror, x16, x16, x1, 0xfbffffffffffffff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xf7ffffffffffffff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(ror, x17, x15, x31, 0xf7ffffffffffffff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xefffffffffffffff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(ror, x18, x14, x30, 0xefffffffffffffff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xdfffffffffffffff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(ror, x19, x13, x29, 0xdfffffffffffffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xbfffffffffffffff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(ror, x20, x12, x28, 0xbfffffffffffffff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x7fffffffffffffff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(ror, x21, x11, x27, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(ror, x22, x10, x26, 0xffffffffffffffff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x824379847befe708), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(ror, x23, x25, x25, 0x824379847befe708, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(ror, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xc9649f05a8e1a8bb), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(ror, x25, x7, x0, 0xc9649f05a8e1a8bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(ror, x26, x0, x22, 0x0000000000000000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/RORI-01.S b/riscof/suite/rv64i_m/K_unratified/RORI-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..1a46832b445e592b1d0e5d371f626f99e64500d6
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/RORI-01.S
@@ -0,0 +1,1838 @@
+// RISC-V Architectural Validation Test RORI-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'rori'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",rori)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",rori)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",rori)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xa21fa7bdb5bd4a32), rs1:x31(0x10fd3dedadea5195), imm:0x3
+ TEST_IMM_OP(rori, x1, x31, 0xa21fa7bdb5bd4a32, 0x10fd3dedadea5195, 0x3, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x5ff7d837a52b9c5a), rs1:x30(0xbd295ce2d2ffbec1), imm:0x1b
+ TEST_IMM_OP(rori, x2, x30, 0x5ff7d837a52b9c5a, 0xbd295ce2d2ffbec1, 0x1b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xc9649f05a8e1a8bb), rs1:x29(0xc9649f05a8e1a8bb), imm:0x0
+ TEST_IMM_OP(rori, x3, x29, 0xc9649f05a8e1a8bb, 0xc9649f05a8e1a8bb, 0x0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x66a82523091933f9), rs1:x28(0x3541291848c99fcb), imm:0x3
+ TEST_IMM_OP(rori, x4, x28, 0x66a82523091933f9, 0x3541291848c99fcb, 0x3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xa49e21448e808c3a), rs1:x27(0x10a24740461d524f), imm:0xf
+ TEST_IMM_OP(rori, x5, x27, 0xa49e21448e808c3a, 0x10a24740461d524f, 0xf, x6, 32, x7)
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x215ea8d61ca8a514), rs1:x26(0x546b0e54528a10af), imm:0xf
+ TEST_IMM_OP(rori, x6, x26, 0x215ea8d61ca8a514, 0x546b0e54528a10af, 0xf, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x786e7525fa9c337f), rs1:x25(0x73a92fd4e19bfbc3), imm:0xb
+ TEST_IMM_OP(rori, x7, x25, 0x786e7525fa9c337f, 0x73a92fd4e19bfbc3, 0xb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x0f5e58105ece8fee), rs1:x24(0x82f6747f707af2c0), imm:0x1b
+ TEST_IMM_OP(rori, x8, x24, 0x0f5e58105ece8fee, 0x82f6747f707af2c0, 0x1b, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xfad6da0d523e882d), rs1:x23(0xf5adb41aa47d105b), imm:0x1
+ TEST_IMM_OP(rori, x9, x23, 0xfad6da0d523e882d, 0xf5adb41aa47d105b, 0x1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xde611efbf9c22090), rs1:x22(0xdf7f3844121bcc23), imm:0x15
+ TEST_IMM_OP(rori, x10, x22, 0xde611efbf9c22090, 0xdf7f3844121bcc23, 0x15, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000200000000), rs1:x21(0x0000000000000001), imm:0x1f
+ TEST_IMM_OP(rori, x11, x21, 0x0000000200000000, 0x1, 0x1f, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0004000000000000), rs1:x20(0x0000000000000002), imm:0xf
+ TEST_IMM_OP(rori, x12, x20, 0x0004000000000000, 0x2, 0xf, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000080000000000), rs1:x19(0x0000000000000004), imm:0x17
+ TEST_IMM_OP(rori, x13, x19, 0x0000080000000000, 0x4, 0x17, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000010000000000), rs1:x18(0x0000000000000008), imm:0x1b
+ TEST_IMM_OP(rori, x14, x18, 0x0000010000000000, 0x8, 0x1b, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000008000000000), rs1:x17(0x0000000000000010), imm:0x1d
+ TEST_IMM_OP(rori, x15, x17, 0x0000008000000000, 0x10, 0x1d, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000008000000000), rs1:x16(0x0000000000000020), imm:0x1e
+ TEST_IMM_OP(rori, x16, x16, 0x0000008000000000, 0x20, 0x1e, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000040), rs1:x15(0x0000000000000040), imm:0x0
+ TEST_IMM_OP(rori, x17, x15, 0x0000000000000040, 0x40, 0x0, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0080000000000000), rs1:x14(0x0000000000000080), imm:0x10
+ TEST_IMM_OP(rori, x18, x14, 0x0080000000000000, 0x80, 0x10, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000001), rs1:x13(0x0000000000000100), imm:0x8
+ TEST_IMM_OP(rori, x19, x13, 0x0000000000000001, 0x100, 0x8, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000020), rs1:x12(0x0000000000000200), imm:0x4
+ TEST_IMM_OP(rori, x20, x12, 0x0000000000000020, 0x200, 0x4, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000100), rs1:x11(0x0000000000000400), imm:0x2
+ TEST_IMM_OP(rori, x21, x11, 0x0000000000000100, 0x400, 0x2, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000400), rs1:x10(0x0000000000000800), imm:0x1
+ TEST_IMM_OP(rori, x22, x10, 0x0000000000000400, 0x800, 0x1, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000200), rs1:x9(0x0000000000001000), imm:0x3
+ TEST_IMM_OP(rori, x23, x9, 0x0000000000000200, 0x1000, 0x3, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0004000000000000), rs1:x8(0x0000000000002000), imm:0x1b
+ TEST_IMM_OP(rori, x24, x8, 0x0004000000000000, 0x2000, 0x1b, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000000004000), rs1:x7(0x0000000000004000), imm:0x0
+ TEST_IMM_OP(rori, x25, x7, 0x0000000000004000, 0x4000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000001000), rs1:x6(0x0000000000008000), imm:0x3
+ TEST_IMM_OP(rori, x26, x6, 0x0000000000001000, 0x8000, 0x3, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000002), rs1:x5(0x0000000000010000), imm:0xf
+ TEST_IMM_OP(rori, x27, x5, 0x0000000000000002, 0x10000, 0xf, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000004), rs1:x4(0x0000000000020000), imm:0xf
+ TEST_IMM_OP(rori, x28, x4, 0x0000000000000004, 0x20000, 0xf, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000080), rs1:x3(0x0000000000040000), imm:0xb
+ TEST_IMM_OP(rori, x29, x3, 0x0000000000000080, 0x40000, 0xb, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0100000000000000), rs1:x2(0x0000000000080000), imm:0x1b
+ TEST_IMM_OP(rori, x30, x2, 0x0100000000000000, 0x80000, 0x1b, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000080000), rs1:x1(0x0000000000100000), imm:0x1
+ TEST_IMM_OP(rori, x31, x1, 0x0000000000080000, 0x100000, 0x1, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000001), rs1:x31(0x0000000000200000), imm:0x15
+ TEST_IMM_OP(rori, x1, x31, 0x0000000000000001, 0x200000, 0x15, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0080000000000000), rs1:x30(0x0000000000400000), imm:0x1f
+ TEST_IMM_OP(rori, x2, x30, 0x0080000000000000, 0x400000, 0x1f, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000100), rs1:x29(0x0000000000800000), imm:0xf
+ TEST_IMM_OP(rori, x3, x29, 0x0000000000000100, 0x800000, 0xf, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000002), rs1:x28(0x0000000001000000), imm:0x17
+ TEST_IMM_OP(rori, x4, x28, 0x0000000000000002, 0x1000000, 0x17, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x4000000000000000), rs1:x27(0x0000000002000000), imm:0x1b
+ TEST_IMM_OP(rori, x5, x27, 0x4000000000000000, 0x2000000, 0x1b, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x2000000000000000), rs1:x26(0x0000000004000000), imm:0x1d
+ TEST_IMM_OP(rori, x6, x26, 0x2000000000000000, 0x4000000, 0x1d, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x2000000000000000), rs1:x25(0x0000000008000000), imm:0x1e
+ TEST_IMM_OP(rori, x7, x25, 0x2000000000000000, 0x8000000, 0x1e, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000010000000), rs1:x24(0x0000000010000000), imm:0x0
+ TEST_IMM_OP(rori, x8, x24, 0x0000000010000000, 0x10000000, 0x0, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000000002000), rs1:x23(0x0000000020000000), imm:0x10
+ TEST_IMM_OP(rori, x9, x23, 0x0000000000002000, 0x20000000, 0x10, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000000400000), rs1:x22(0x0000000040000000), imm:0x8
+ TEST_IMM_OP(rori, x10, x22, 0x0000000000400000, 0x40000000, 0x8, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000008000000), rs1:x21(0x0000000080000000), imm:0x4
+ TEST_IMM_OP(rori, x11, x21, 0x0000000008000000, 0x80000000, 0x4, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000040000000), rs1:x20(0x0000000100000000), imm:0x2
+ TEST_IMM_OP(rori, x12, x20, 0x0000000040000000, 0x100000000, 0x2, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000100000000), rs1:x19(0x0000000200000000), imm:0x1
+ TEST_IMM_OP(rori, x13, x19, 0x0000000100000000, 0x200000000, 0x1, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000080000000), rs1:x18(0x0000000400000000), imm:0x3
+ TEST_IMM_OP(rori, x14, x18, 0x0000000080000000, 0x400000000, 0x3, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000100), rs1:x17(0x0000000800000000), imm:0x1b
+ TEST_IMM_OP(rori, x15, x17, 0x0000000000000100, 0x800000000, 0x1b, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000001000000000), rs1:x16(0x0000001000000000), imm:0x0
+ TEST_IMM_OP(rori, x16, x16, 0x0000001000000000, 0x1000000000, 0x0, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000400000000), rs1:x15(0x0000002000000000), imm:0x3
+ TEST_IMM_OP(rori, x17, x15, 0x0000000400000000, 0x2000000000, 0x3, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000000800000), rs1:x14(0x0000004000000000), imm:0xf
+ TEST_IMM_OP(rori, x18, x14, 0x0000000000800000, 0x4000000000, 0xf, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000001000000), rs1:x13(0x0000008000000000), imm:0xf
+ TEST_IMM_OP(rori, x19, x13, 0x0000000001000000, 0x8000000000, 0xf, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000020000000), rs1:x12(0x0000010000000000), imm:0xb
+ TEST_IMM_OP(rori, x20, x12, 0x0000000020000000, 0x10000000000, 0xb, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000004000), rs1:x11(0x0000020000000000), imm:0x1b
+ TEST_IMM_OP(rori, x21, x11, 0x0000000000004000, 0x20000000000, 0x1b, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000020000000000), rs1:x10(0x0000040000000000), imm:0x1
+ TEST_IMM_OP(rori, x22, x10, 0x0000020000000000, 0x40000000000, 0x1, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000400000), rs1:x9(0x0000080000000000), imm:0x15
+ TEST_IMM_OP(rori, x23, x9, 0x0000000000400000, 0x80000000000, 0x15, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000002000), rs1:x8(0x0000100000000000), imm:0x1f
+ TEST_IMM_OP(rori, x24, x8, 0x0000000000002000, 0x100000000000, 0x1f, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000040000000), rs1:x7(0x0000200000000000), imm:0xf
+ TEST_IMM_OP(rori, x25, x7, 0x0000000040000000, 0x200000000000, 0xf, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000800000), rs1:x6(0x0000400000000000), imm:0x17
+ TEST_IMM_OP(rori, x26, x6, 0x0000000000800000, 0x400000000000, 0x17, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000100000), rs1:x5(0x0000800000000000), imm:0x1b
+ TEST_IMM_OP(rori, x27, x5, 0x0000000000100000, 0x800000000000, 0x1b, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000080000), rs1:x4(0x0001000000000000), imm:0x1d
+ TEST_IMM_OP(rori, x28, x4, 0x0000000000080000, 0x1000000000000, 0x1d, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000080000), rs1:x3(0x0002000000000000), imm:0x1e
+ TEST_IMM_OP(rori, x29, x3, 0x0000000000080000, 0x2000000000000, 0x1e, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0004000000000000), rs1:x2(0x0004000000000000), imm:0x0
+ TEST_IMM_OP(rori, x30, x2, 0x0004000000000000, 0x4000000000000, 0x0, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000800000000), rs1:x1(0x0008000000000000), imm:0x10
+ TEST_IMM_OP(rori, x31, x1, 0x0000000800000000, 0x8000000000000, 0x10, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000100000000000), rs1:x31(0x0010000000000000), imm:0x8
+ TEST_IMM_OP(rori, x1, x31, 0x0000100000000000, 0x10000000000000, 0x8, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0002000000000000), rs1:x30(0x0020000000000000), imm:0x4
+ TEST_IMM_OP(rori, x2, x30, 0x0002000000000000, 0x20000000000000, 0x4, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0010000000000000), rs1:x29(0x0040000000000000), imm:0x2
+ TEST_IMM_OP(rori, x3, x29, 0x0010000000000000, 0x40000000000000, 0x2, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0040000000000000), rs1:x28(0x0080000000000000), imm:0x1
+ TEST_IMM_OP(rori, x4, x28, 0x0040000000000000, 0x80000000000000, 0x1, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0020000000000000), rs1:x27(0x0100000000000000), imm:0x3
+ TEST_IMM_OP(rori, x5, x27, 0x0020000000000000, 0x100000000000000, 0x3, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000040000000), rs1:x26(0x0200000000000000), imm:0x1b
+ TEST_IMM_OP(rori, x6, x26, 0x0000000040000000, 0x200000000000000, 0x1b, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0400000000000000), rs1:x25(0x0400000000000000), imm:0x0
+ TEST_IMM_OP(rori, x7, x25, 0x0400000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0100000000000000), rs1:x24(0x0800000000000000), imm:0x3
+ TEST_IMM_OP(rori, x8, x24, 0x0100000000000000, 0x800000000000000, 0x3, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000200000000000), rs1:x23(0x1000000000000000), imm:0xf
+ TEST_IMM_OP(rori, x9, x23, 0x0000200000000000, 0x1000000000000000, 0xf, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000400000000000), rs1:x22(0x2000000000000000), imm:0xf
+ TEST_IMM_OP(rori, x10, x22, 0x0000400000000000, 0x2000000000000000, 0xf, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0008000000000000), rs1:x21(0x4000000000000000), imm:0xb
+ TEST_IMM_OP(rori, x11, x21, 0x0008000000000000, 0x4000000000000000, 0xb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000001000000000), rs1:x20(0x8000000000000000), imm:0x1b
+ TEST_IMM_OP(rori, x12, x20, 0x0000001000000000, 0x8000000000000000, 0x1b, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000), imm:0x1
+ TEST_IMM_OP(rori, x13, x19, 0x0000000000000000, 0x0, 0x1, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfffff7ffffffffff), rs1:x18(0xfffffffffffffffe), imm:0x15
+ TEST_IMM_OP(rori, x14, x18, 0xfffff7ffffffffff, 0xfffffffffffffffe, 0x15, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xfffffffbffffffff), rs1:x17(0xfffffffffffffffd), imm:0x1f
+ TEST_IMM_OP(rori, x15, x17, 0xfffffffbffffffff, 0xfffffffffffffffd, 0x1f, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xfff7ffffffffffff), rs1:x16(0xfffffffffffffffb), imm:0xf
+ TEST_IMM_OP(rori, x16, x16, 0xfff7ffffffffffff, 0xfffffffffffffffb, 0xf, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xffffefffffffffff), rs1:x15(0xfffffffffffffff7), imm:0x17
+ TEST_IMM_OP(rori, x17, x15, 0xffffefffffffffff, 0xfffffffffffffff7, 0x17, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xfffffdffffffffff), rs1:x14(0xffffffffffffffef), imm:0x1b
+ TEST_IMM_OP(rori, x18, x14, 0xfffffdffffffffff, 0xffffffffffffffef, 0x1b, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xfffffeffffffffff), rs1:x13(0xffffffffffffffdf), imm:0x1d
+ TEST_IMM_OP(rori, x19, x13, 0xfffffeffffffffff, 0xffffffffffffffdf, 0x1d, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xfffffeffffffffff), rs1:x12(0xffffffffffffffbf), imm:0x1e
+ TEST_IMM_OP(rori, x20, x12, 0xfffffeffffffffff, 0xffffffffffffffbf, 0x1e, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffff7f), rs1:x11(0xffffffffffffff7f), imm:0x0
+ TEST_IMM_OP(rori, x21, x11, 0xffffffffffffff7f, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xfeffffffffffffff), rs1:x10(0xfffffffffffffeff), imm:0x10
+ TEST_IMM_OP(rori, x22, x10, 0xfeffffffffffffff, 0xfffffffffffffeff, 0x10, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffffffd), rs1:x9(0xfffffffffffffdff), imm:0x8
+ TEST_IMM_OP(rori, x23, x9, 0xfffffffffffffffd, 0xfffffffffffffdff, 0x8, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffbf), rs1:x8(0xfffffffffffffbff), imm:0x4
+ TEST_IMM_OP(rori, x24, x8, 0xffffffffffffffbf, 0xfffffffffffffbff, 0x4, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xfffffffffffffdff), rs1:x7(0xfffffffffffff7ff), imm:0x2
+ TEST_IMM_OP(rori, x25, x7, 0xfffffffffffffdff, 0xfffffffffffff7ff, 0x2, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xfffffffffffff7ff), rs1:x6(0xffffffffffffefff), imm:0x1
+ TEST_IMM_OP(rori, x26, x6, 0xfffffffffffff7ff, 0xffffffffffffefff, 0x1, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xfffffffffffffbff), rs1:x5(0xffffffffffffdfff), imm:0x3
+ TEST_IMM_OP(rori, x27, x5, 0xfffffffffffffbff, 0xffffffffffffdfff, 0x3, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xfff7ffffffffffff), rs1:x4(0xffffffffffffbfff), imm:0x1b
+ TEST_IMM_OP(rori, x28, x4, 0xfff7ffffffffffff, 0xffffffffffffbfff, 0x1b, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffff7fff), rs1:x3(0xffffffffffff7fff), imm:0x0
+ TEST_IMM_OP(rori, x29, x3, 0xffffffffffff7fff, 0xffffffffffff7fff, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffdfff), rs1:x2(0xfffffffffffeffff), imm:0x3
+ TEST_IMM_OP(rori, x30, x2, 0xffffffffffffdfff, 0xfffffffffffeffff, 0x3, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffffffb), rs1:x1(0xfffffffffffdffff), imm:0xf
+ TEST_IMM_OP(rori, x31, x1, 0xfffffffffffffffb, 0xfffffffffffdffff, 0xf, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xfffffffffffffff7), rs1:x31(0xfffffffffffbffff), imm:0xf
+ TEST_IMM_OP(rori, x1, x31, 0xfffffffffffffff7, 0xfffffffffffbffff, 0xf, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xfffffffffffffeff), rs1:x30(0xfffffffffff7ffff), imm:0xb
+ TEST_IMM_OP(rori, x2, x30, 0xfffffffffffffeff, 0xfffffffffff7ffff, 0xb, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xfdffffffffffffff), rs1:x29(0xffffffffffefffff), imm:0x1b
+ TEST_IMM_OP(rori, x3, x29, 0xfdffffffffffffff, 0xffffffffffefffff, 0x1b, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffefffff), rs1:x28(0xffffffffffdfffff), imm:0x1
+ TEST_IMM_OP(rori, x4, x28, 0xffffffffffefffff, 0xffffffffffdfffff, 0x1, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffffffffd), rs1:x27(0xffffffffffbfffff), imm:0x15
+ TEST_IMM_OP(rori, x5, x27, 0xfffffffffffffffd, 0xffffffffffbfffff, 0x15, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xfeffffffffffffff), rs1:x26(0xffffffffff7fffff), imm:0x1f
+ TEST_IMM_OP(rori, x6, x26, 0xfeffffffffffffff, 0xffffffffff7fffff, 0x1f, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffffffdff), rs1:x25(0xfffffffffeffffff), imm:0xf
+ TEST_IMM_OP(rori, x7, x25, 0xfffffffffffffdff, 0xfffffffffeffffff, 0xf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffffffffb), rs1:x24(0xfffffffffdffffff), imm:0x17
+ TEST_IMM_OP(rori, x8, x24, 0xfffffffffffffffb, 0xfffffffffdffffff, 0x17, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x7fffffffffffffff), rs1:x23(0xfffffffffbffffff), imm:0x1b
+ TEST_IMM_OP(rori, x9, x23, 0x7fffffffffffffff, 0xfffffffffbffffff, 0x1b, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xbfffffffffffffff), rs1:x22(0xfffffffff7ffffff), imm:0x1d
+ TEST_IMM_OP(rori, x10, x22, 0xbfffffffffffffff, 0xfffffffff7ffffff, 0x1d, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xbfffffffffffffff), rs1:x21(0xffffffffefffffff), imm:0x1e
+ TEST_IMM_OP(rori, x11, x21, 0xbfffffffffffffff, 0xffffffffefffffff, 0x1e, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffffffffdfffffff), rs1:x20(0xffffffffdfffffff), imm:0x0
+ TEST_IMM_OP(rori, x12, x20, 0xffffffffdfffffff, 0xffffffffdfffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffbfff), rs1:x19(0xffffffffbfffffff), imm:0x10
+ TEST_IMM_OP(rori, x13, x19, 0xffffffffffffbfff, 0xffffffffbfffffff, 0x10, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xffffffffff7fffff), rs1:x18(0xffffffff7fffffff), imm:0x8
+ TEST_IMM_OP(rori, x14, x18, 0xffffffffff7fffff, 0xffffffff7fffffff, 0x8, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xffffffffefffffff), rs1:x17(0xfffffffeffffffff), imm:0x4
+ TEST_IMM_OP(rori, x15, x17, 0xffffffffefffffff, 0xfffffffeffffffff, 0x4, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xffffffff7fffffff), rs1:x16(0xfffffffdffffffff), imm:0x2
+ TEST_IMM_OP(rori, x16, x16, 0xffffffff7fffffff, 0xfffffffdffffffff, 0x2, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfffffffdffffffff), rs1:x15(0xfffffffbffffffff), imm:0x1
+ TEST_IMM_OP(rori, x17, x15, 0xfffffffdffffffff, 0xfffffffbffffffff, 0x1, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfffffffeffffffff), rs1:x14(0xfffffff7ffffffff), imm:0x3
+ TEST_IMM_OP(rori, x18, x14, 0xfffffffeffffffff, 0xfffffff7ffffffff, 0x3, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xfffffffffffffdff), rs1:x13(0xffffffefffffffff), imm:0x1b
+ TEST_IMM_OP(rori, x19, x13, 0xfffffffffffffdff, 0xffffffefffffffff, 0x1b, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffdfffffffff), rs1:x12(0xffffffdfffffffff), imm:0x0
+ TEST_IMM_OP(rori, x20, x12, 0xffffffdfffffffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xfffffff7ffffffff), rs1:x11(0xffffffbfffffffff), imm:0x3
+ TEST_IMM_OP(rori, x21, x11, 0xfffffff7ffffffff, 0xffffffbfffffffff, 0x3, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffeffffff), rs1:x10(0xffffff7fffffffff), imm:0xf
+ TEST_IMM_OP(rori, x22, x10, 0xfffffffffeffffff, 0xffffff7fffffffff, 0xf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffdffffff), rs1:x9(0xfffffeffffffffff), imm:0xf
+ TEST_IMM_OP(rori, x23, x9, 0xfffffffffdffffff, 0xfffffeffffffffff, 0xf, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffffffbfffffff), rs1:x8(0xfffffdffffffffff), imm:0xb
+ TEST_IMM_OP(rori, x24, x8, 0xffffffffbfffffff, 0xfffffdffffffffff, 0xb, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffff7fff), rs1:x7(0xfffffbffffffffff), imm:0x1b
+ TEST_IMM_OP(rori, x25, x7, 0xffffffffffff7fff, 0xfffffbffffffffff, 0x1b, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xfffffbffffffffff), rs1:x6(0xfffff7ffffffffff), imm:0x1
+ TEST_IMM_OP(rori, x26, x6, 0xfffffbffffffffff, 0xfffff7ffffffffff, 0x1, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffffffff7fffff), rs1:x5(0xffffefffffffffff), imm:0x15
+ TEST_IMM_OP(rori, x27, x5, 0xffffffffff7fffff, 0xffffefffffffffff, 0x15, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffbfff), rs1:x4(0xffffdfffffffffff), imm:0x1f
+ TEST_IMM_OP(rori, x28, x4, 0xffffffffffffbfff, 0xffffdfffffffffff, 0x1f, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffffff7fffffff), rs1:x3(0xffffbfffffffffff), imm:0xf
+ TEST_IMM_OP(rori, x29, x3, 0xffffffff7fffffff, 0xffffbfffffffffff, 0xf, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffeffffff), rs1:x2(0xffff7fffffffffff), imm:0x17
+ TEST_IMM_OP(rori, x30, x2, 0xfffffffffeffffff, 0xffff7fffffffffff, 0x17, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffdfffff), rs1:x1(0xfffeffffffffffff), imm:0x1b
+ TEST_IMM_OP(rori, x31, x1, 0xffffffffffdfffff, 0xfffeffffffffffff, 0x1b, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffefffff), rs1:x31(0xfffdffffffffffff), imm:0x1d
+ TEST_IMM_OP(rori, x1, x31, 0xffffffffffefffff, 0xfffdffffffffffff, 0x1d, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffefffff), rs1:x30(0xfffbffffffffffff), imm:0x1e
+ TEST_IMM_OP(rori, x2, x30, 0xffffffffffefffff, 0xfffbffffffffffff, 0x1e, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xfff7ffffffffffff), rs1:x29(0xfff7ffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x3, x29, 0xfff7ffffffffffff, 0xfff7ffffffffffff, 0x0, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffffefffffffff), rs1:x28(0xffefffffffffffff), imm:0x10
+ TEST_IMM_OP(rori, x4, x28, 0xffffffefffffffff, 0xffefffffffffffff, 0x10, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffdfffffffffff), rs1:x27(0xffdfffffffffffff), imm:0x8
+ TEST_IMM_OP(rori, x5, x27, 0xffffdfffffffffff, 0xffdfffffffffffff, 0x8, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xfffbffffffffffff), rs1:x26(0xffbfffffffffffff), imm:0x4
+ TEST_IMM_OP(rori, x6, x26, 0xfffbffffffffffff, 0xffbfffffffffffff, 0x4, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xff7fffffffffffff), rs1:x25(0xff7fffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x7, x25, 0xff7fffffffffffff, 0xff7fffffffffffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xfeffffffffffffff), rs1:x24(0xfeffffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x8, x24, 0xfeffffffffffffff, 0xfeffffffffffffff, 0x0, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xfdffffffffffffff), rs1:x23(0xfdffffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x9, x23, 0xfdffffffffffffff, 0xfdffffffffffffff, 0x0, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xfbffffffffffffff), rs1:x22(0xfbffffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x10, x22, 0xfbffffffffffffff, 0xfbffffffffffffff, 0x0, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xf7ffffffffffffff), rs1:x21(0xf7ffffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x11, x21, 0xf7ffffffffffffff, 0xf7ffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xefffffffffffffff), rs1:x20(0xefffffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x12, x20, 0xefffffffffffffff, 0xefffffffffffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xdfffffffffffffff), rs1:x19(0xdfffffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x13, x19, 0xdfffffffffffffff, 0xdfffffffffffffff, 0x0, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xbfffffffffffffff), rs1:x18(0xbfffffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x14, x18, 0xbfffffffffffffff, 0xbfffffffffffffff, 0x0, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x7fffffffffffffff), rs1:x17(0x7fffffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x15, x17, 0x7fffffffffffffff, 0x7fffffffffffffff, 0x0, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x16, x16, 0xffffffffffffffff, 0xffffffffffffffff, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000001), rs1:x15(0x0000000000000001), imm:0x0
+ TEST_IMM_OP(rori, x17, x15, 0x0000000000000001, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000002), rs1:x14(0x0000000000000002), imm:0x0
+ TEST_IMM_OP(rori, x18, x14, 0x0000000000000002, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000004), rs1:x13(0x0000000000000004), imm:0x0
+ TEST_IMM_OP(rori, x19, x13, 0x0000000000000004, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000008), rs1:x12(0x0000000000000008), imm:0x0
+ TEST_IMM_OP(rori, x20, x12, 0x0000000000000008, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000010), rs1:x11(0x0000000000000010), imm:0x0
+ TEST_IMM_OP(rori, x21, x11, 0x0000000000000010, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000020), rs1:x10(0x0000000000000020), imm:0x0
+ TEST_IMM_OP(rori, x22, x10, 0x0000000000000020, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000040), rs1:x9(0x0000000000000040), imm:0x0
+ TEST_IMM_OP(rori, x23, x9, 0x0000000000000040, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000080), rs1:x8(0x0000000000000080), imm:0x0
+ TEST_IMM_OP(rori, x24, x8, 0x0000000000000080, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000100), rs1:x7(0x0000000000000100), imm:0x0
+ TEST_IMM_OP(rori, x25, x7, 0x0000000000000100, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000200), rs1:x6(0x0000000000000200), imm:0x0
+ TEST_IMM_OP(rori, x26, x6, 0x0000000000000200, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000400), rs1:x5(0x0000000000000400), imm:0x0
+ TEST_IMM_OP(rori, x27, x5, 0x0000000000000400, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000800), rs1:x4(0x0000000000000800), imm:0x0
+ TEST_IMM_OP(rori, x28, x4, 0x0000000000000800, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000001000), rs1:x3(0x0000000000001000), imm:0x0
+ TEST_IMM_OP(rori, x29, x3, 0x0000000000001000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000002000), rs1:x2(0x0000000000002000), imm:0x0
+ TEST_IMM_OP(rori, x30, x2, 0x0000000000002000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000004000), rs1:x1(0x0000000000004000), imm:0x0
+ TEST_IMM_OP(rori, x31, x1, 0x0000000000004000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000008000), rs1:x31(0x0000000000008000), imm:0x0
+ TEST_IMM_OP(rori, x1, x31, 0x0000000000008000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000010000), rs1:x30(0x0000000000010000), imm:0x0
+ TEST_IMM_OP(rori, x2, x30, 0x0000000000010000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000020000), rs1:x29(0x0000000000020000), imm:0x0
+ TEST_IMM_OP(rori, x3, x29, 0x0000000000020000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000040000), rs1:x28(0x0000000000040000), imm:0x0
+ TEST_IMM_OP(rori, x4, x28, 0x0000000000040000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000080000), rs1:x27(0x0000000000080000), imm:0x0
+ TEST_IMM_OP(rori, x5, x27, 0x0000000000080000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000100000), rs1:x26(0x0000000000100000), imm:0x0
+ TEST_IMM_OP(rori, x6, x26, 0x0000000000100000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000200000), rs1:x25(0x0000000000200000), imm:0x0
+ TEST_IMM_OP(rori, x7, x25, 0x0000000000200000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000400000), rs1:x24(0x0000000000400000), imm:0x0
+ TEST_IMM_OP(rori, x8, x24, 0x0000000000400000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000800000), rs1:x23(0x0000000000800000), imm:0x0
+ TEST_IMM_OP(rori, x9, x23, 0x0000000000800000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000001000000), rs1:x22(0x0000000001000000), imm:0x0
+ TEST_IMM_OP(rori, x10, x22, 0x0000000001000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000002000000), rs1:x21(0x0000000002000000), imm:0x0
+ TEST_IMM_OP(rori, x11, x21, 0x0000000002000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000004000000), rs1:x20(0x0000000004000000), imm:0x0
+ TEST_IMM_OP(rori, x12, x20, 0x0000000004000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000008000000), rs1:x19(0x0000000008000000), imm:0x0
+ TEST_IMM_OP(rori, x13, x19, 0x0000000008000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000010000000), rs1:x18(0x0000000010000000), imm:0x0
+ TEST_IMM_OP(rori, x14, x18, 0x0000000010000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000020000000), rs1:x17(0x0000000020000000), imm:0x0
+ TEST_IMM_OP(rori, x15, x17, 0x0000000020000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000040000000), rs1:x16(0x0000000040000000), imm:0x0
+ TEST_IMM_OP(rori, x16, x16, 0x0000000040000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000080000000), rs1:x15(0x0000000080000000), imm:0x0
+ TEST_IMM_OP(rori, x17, x15, 0x0000000080000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000100000000), rs1:x14(0x0000000100000000), imm:0x0
+ TEST_IMM_OP(rori, x18, x14, 0x0000000100000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000200000000), rs1:x13(0x0000000200000000), imm:0x0
+ TEST_IMM_OP(rori, x19, x13, 0x0000000200000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000400000000), rs1:x12(0x0000000400000000), imm:0x0
+ TEST_IMM_OP(rori, x20, x12, 0x0000000400000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000800000000), rs1:x11(0x0000000800000000), imm:0x0
+ TEST_IMM_OP(rori, x21, x11, 0x0000000800000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000001000000000), rs1:x10(0x0000001000000000), imm:0x0
+ TEST_IMM_OP(rori, x22, x10, 0x0000001000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000002000000000), rs1:x9(0x0000002000000000), imm:0x0
+ TEST_IMM_OP(rori, x23, x9, 0x0000002000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000004000000000), rs1:x8(0x0000004000000000), imm:0x0
+ TEST_IMM_OP(rori, x24, x8, 0x0000004000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000008000000000), rs1:x7(0x0000008000000000), imm:0x0
+ TEST_IMM_OP(rori, x25, x7, 0x0000008000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000010000000000), rs1:x6(0x0000010000000000), imm:0x0
+ TEST_IMM_OP(rori, x26, x6, 0x0000010000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000020000000000), rs1:x5(0x0000020000000000), imm:0x0
+ TEST_IMM_OP(rori, x27, x5, 0x0000020000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000040000000000), rs1:x4(0x0000040000000000), imm:0x0
+ TEST_IMM_OP(rori, x28, x4, 0x0000040000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000080000000000), rs1:x3(0x0000080000000000), imm:0x0
+ TEST_IMM_OP(rori, x29, x3, 0x0000080000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000100000000000), rs1:x2(0x0000100000000000), imm:0x0
+ TEST_IMM_OP(rori, x30, x2, 0x0000100000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000200000000000), rs1:x1(0x0000200000000000), imm:0x0
+ TEST_IMM_OP(rori, x31, x1, 0x0000200000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000400000000000), rs1:x31(0x0000400000000000), imm:0x0
+ TEST_IMM_OP(rori, x1, x31, 0x0000400000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000800000000000), rs1:x30(0x0000800000000000), imm:0x0
+ TEST_IMM_OP(rori, x2, x30, 0x0000800000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0001000000000000), rs1:x29(0x0001000000000000), imm:0x0
+ TEST_IMM_OP(rori, x3, x29, 0x0001000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0002000000000000), rs1:x28(0x0002000000000000), imm:0x0
+ TEST_IMM_OP(rori, x4, x28, 0x0002000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0004000000000000), rs1:x27(0x0004000000000000), imm:0x0
+ TEST_IMM_OP(rori, x5, x27, 0x0004000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0008000000000000), rs1:x26(0x0008000000000000), imm:0x0
+ TEST_IMM_OP(rori, x6, x26, 0x0008000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0010000000000000), rs1:x25(0x0010000000000000), imm:0x0
+ TEST_IMM_OP(rori, x7, x25, 0x0010000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0020000000000000), rs1:x24(0x0020000000000000), imm:0x0
+ TEST_IMM_OP(rori, x8, x24, 0x0020000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0040000000000000), rs1:x23(0x0040000000000000), imm:0x0
+ TEST_IMM_OP(rori, x9, x23, 0x0040000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0080000000000000), rs1:x22(0x0080000000000000), imm:0x0
+ TEST_IMM_OP(rori, x10, x22, 0x0080000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0100000000000000), rs1:x21(0x0100000000000000), imm:0x0
+ TEST_IMM_OP(rori, x11, x21, 0x0100000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0200000000000000), rs1:x20(0x0200000000000000), imm:0x0
+ TEST_IMM_OP(rori, x12, x20, 0x0200000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0400000000000000), rs1:x19(0x0400000000000000), imm:0x0
+ TEST_IMM_OP(rori, x13, x19, 0x0400000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0800000000000000), rs1:x18(0x0800000000000000), imm:0x0
+ TEST_IMM_OP(rori, x14, x18, 0x0800000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x1000000000000000), rs1:x17(0x1000000000000000), imm:0x0
+ TEST_IMM_OP(rori, x15, x17, 0x1000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x2000000000000000), rs1:x16(0x2000000000000000), imm:0x0
+ TEST_IMM_OP(rori, x16, x16, 0x2000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x4000000000000000), rs1:x15(0x4000000000000000), imm:0x0
+ TEST_IMM_OP(rori, x17, x15, 0x4000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x8000000000000000), rs1:x14(0x8000000000000000), imm:0x0
+ TEST_IMM_OP(rori, x18, x14, 0x8000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), imm:0x0
+ TEST_IMM_OP(rori, x19, x13, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffffffffe), rs1:x12(0xfffffffffffffffe), imm:0x0
+ TEST_IMM_OP(rori, x20, x12, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xfffffffffffffffd), rs1:x11(0xfffffffffffffffd), imm:0x0
+ TEST_IMM_OP(rori, x21, x11, 0xfffffffffffffffd, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffffffb), rs1:x10(0xfffffffffffffffb), imm:0x0
+ TEST_IMM_OP(rori, x22, x10, 0xfffffffffffffffb, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffffff7), rs1:x9(0xfffffffffffffff7), imm:0x0
+ TEST_IMM_OP(rori, x23, x9, 0xfffffffffffffff7, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffef), rs1:x8(0xffffffffffffffef), imm:0x0
+ TEST_IMM_OP(rori, x24, x8, 0xffffffffffffffef, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffdf), rs1:x7(0xffffffffffffffdf), imm:0x0
+ TEST_IMM_OP(rori, x25, x7, 0xffffffffffffffdf, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffbf), rs1:x6(0xffffffffffffffbf), imm:0x0
+ TEST_IMM_OP(rori, x26, x6, 0xffffffffffffffbf, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffff7f), rs1:x5(0xffffffffffffff7f), imm:0x0
+ TEST_IMM_OP(rori, x27, x5, 0xffffffffffffff7f, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffffeff), rs1:x4(0xfffffffffffffeff), imm:0x0
+ TEST_IMM_OP(rori, x28, x4, 0xfffffffffffffeff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xfffffffffffffdff), rs1:x3(0xfffffffffffffdff), imm:0x0
+ TEST_IMM_OP(rori, x29, x3, 0xfffffffffffffdff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffffbff), rs1:x2(0xfffffffffffffbff), imm:0x0
+ TEST_IMM_OP(rori, x30, x2, 0xfffffffffffffbff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffff7ff), rs1:x1(0xfffffffffffff7ff), imm:0x0
+ TEST_IMM_OP(rori, x31, x1, 0xfffffffffffff7ff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffefff), rs1:x31(0xffffffffffffefff), imm:0x0
+ TEST_IMM_OP(rori, x1, x31, 0xffffffffffffefff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffdfff), rs1:x30(0xffffffffffffdfff), imm:0x0
+ TEST_IMM_OP(rori, x2, x30, 0xffffffffffffdfff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffbfff), rs1:x29(0xffffffffffffbfff), imm:0x0
+ TEST_IMM_OP(rori, x3, x29, 0xffffffffffffbfff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffff7fff), rs1:x28(0xffffffffffff7fff), imm:0x0
+ TEST_IMM_OP(rori, x4, x28, 0xffffffffffff7fff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffffeffff), rs1:x27(0xfffffffffffeffff), imm:0x0
+ TEST_IMM_OP(rori, x5, x27, 0xfffffffffffeffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffffdffff), rs1:x26(0xfffffffffffdffff), imm:0x0
+ TEST_IMM_OP(rori, x6, x26, 0xfffffffffffdffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffffbffff), rs1:x25(0xfffffffffffbffff), imm:0x0
+ TEST_IMM_OP(rori, x7, x25, 0xfffffffffffbffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffff7ffff), rs1:x24(0xfffffffffff7ffff), imm:0x0
+ TEST_IMM_OP(rori, x8, x24, 0xfffffffffff7ffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffefffff), rs1:x23(0xffffffffffefffff), imm:0x0
+ TEST_IMM_OP(rori, x9, x23, 0xffffffffffefffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffdfffff), rs1:x22(0xffffffffffdfffff), imm:0x0
+ TEST_IMM_OP(rori, x10, x22, 0xffffffffffdfffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffbfffff), rs1:x21(0xffffffffffbfffff), imm:0x0
+ TEST_IMM_OP(rori, x11, x21, 0xffffffffffbfffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffffffff7fffff), rs1:x20(0xffffffffff7fffff), imm:0x0
+ TEST_IMM_OP(rori, x12, x20, 0xffffffffff7fffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xfffffffffeffffff), rs1:x19(0xfffffffffeffffff), imm:0x0
+ TEST_IMM_OP(rori, x13, x19, 0xfffffffffeffffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffdffffff), rs1:x18(0xfffffffffdffffff), imm:0x0
+ TEST_IMM_OP(rori, x14, x18, 0xfffffffffdffffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffbffffff), rs1:x17(0xfffffffffbffffff), imm:0x0
+ TEST_IMM_OP(rori, x15, x17, 0xfffffffffbffffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xfffffffff7ffffff), rs1:x16(0xfffffffff7ffffff), imm:0x0
+ TEST_IMM_OP(rori, x16, x16, 0xfffffffff7ffffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffffefffffff), rs1:x15(0xffffffffefffffff), imm:0x0
+ TEST_IMM_OP(rori, x17, x15, 0xffffffffefffffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffffdfffffff), rs1:x14(0xffffffffdfffffff), imm:0x0
+ TEST_IMM_OP(rori, x18, x14, 0xffffffffdfffffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffffbfffffff), rs1:x13(0xffffffffbfffffff), imm:0x0
+ TEST_IMM_OP(rori, x19, x13, 0xffffffffbfffffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xffffffff7fffffff), rs1:x12(0xffffffff7fffffff), imm:0x0
+ TEST_IMM_OP(rori, x20, x12, 0xffffffff7fffffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xfffffffeffffffff), rs1:x11(0xfffffffeffffffff), imm:0x0
+ TEST_IMM_OP(rori, x21, x11, 0xfffffffeffffffff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xfffffffdffffffff), rs1:x10(0xfffffffdffffffff), imm:0x0
+ TEST_IMM_OP(rori, x22, x10, 0xfffffffdffffffff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xfffffffbffffffff), rs1:x9(0xfffffffbffffffff), imm:0x0
+ TEST_IMM_OP(rori, x23, x9, 0xfffffffbffffffff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xfffffff7ffffffff), rs1:x8(0xfffffff7ffffffff), imm:0x0
+ TEST_IMM_OP(rori, x24, x8, 0xfffffff7ffffffff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xffffffefffffffff), rs1:x7(0xffffffefffffffff), imm:0x0
+ TEST_IMM_OP(rori, x25, x7, 0xffffffefffffffff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xffffffdfffffffff), rs1:x6(0xffffffdfffffffff), imm:0x0
+ TEST_IMM_OP(rori, x26, x6, 0xffffffdfffffffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xffffffbfffffffff), rs1:x5(0xffffffbfffffffff), imm:0x0
+ TEST_IMM_OP(rori, x27, x5, 0xffffffbfffffffff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xffffff7fffffffff), rs1:x4(0xffffff7fffffffff), imm:0x0
+ TEST_IMM_OP(rori, x28, x4, 0xffffff7fffffffff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xfffffeffffffffff), rs1:x3(0xfffffeffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x29, x3, 0xfffffeffffffffff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xfffffdffffffffff), rs1:x2(0xfffffdffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x30, x2, 0xfffffdffffffffff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xfffffbffffffffff), rs1:x1(0xfffffbffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x31, x1, 0xfffffbffffffffff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xfffff7ffffffffff), rs1:x31(0xfffff7ffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x1, x31, 0xfffff7ffffffffff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffffefffffffffff), rs1:x30(0xffffefffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x2, x30, 0xffffefffffffffff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffffdfffffffffff), rs1:x29(0xffffdfffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x3, x29, 0xffffdfffffffffff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xffffbfffffffffff), rs1:x28(0xffffbfffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x4, x28, 0xffffbfffffffffff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xffff7fffffffffff), rs1:x27(0xffff7fffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x5, x27, 0xffff7fffffffffff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xfffeffffffffffff), rs1:x26(0xfffeffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x6, x26, 0xfffeffffffffffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xfffdffffffffffff), rs1:x25(0xfffdffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x7, x25, 0xfffdffffffffffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xfffbffffffffffff), rs1:x24(0xfffbffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x8, x24, 0xfffbffffffffffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xfff7ffffffffffff), rs1:x23(0xfff7ffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x9, x23, 0xfff7ffffffffffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffefffffffffffff), rs1:x22(0xffefffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x10, x22, 0xffefffffffffffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffdfffffffffffff), rs1:x21(0xffdfffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x11, x21, 0xffdfffffffffffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xffbfffffffffffff), rs1:x20(0xffbfffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x12, x20, 0xffbfffffffffffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xffff7fffffffffff), rs1:x19(0xff7fffffffffffff), imm:0x8
+ TEST_IMM_OP(rori, x13, x19, 0xffff7fffffffffff, 0xff7fffffffffffff, 0x8, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xffefffffffffffff), rs1:x18(0xfeffffffffffffff), imm:0x4
+ TEST_IMM_OP(rori, x14, x18, 0xffefffffffffffff, 0xfeffffffffffffff, 0x4, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xff7fffffffffffff), rs1:x17(0xfdffffffffffffff), imm:0x2
+ TEST_IMM_OP(rori, x15, x17, 0xff7fffffffffffff, 0xfdffffffffffffff, 0x2, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xfdffffffffffffff), rs1:x16(0xfbffffffffffffff), imm:0x1
+ TEST_IMM_OP(rori, x16, x16, 0xfdffffffffffffff, 0xfbffffffffffffff, 0x1, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xfeffffffffffffff), rs1:x15(0xf7ffffffffffffff), imm:0x3
+ TEST_IMM_OP(rori, x17, x15, 0xfeffffffffffffff, 0xf7ffffffffffffff, 0x3, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xfffffffdffffffff), rs1:x14(0xefffffffffffffff), imm:0x1b
+ TEST_IMM_OP(rori, x18, x14, 0xfffffffdffffffff, 0xefffffffffffffff, 0x1b, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xdfffffffffffffff), rs1:x13(0xdfffffffffffffff), imm:0x0
+ TEST_IMM_OP(rori, x19, x13, 0xdfffffffffffffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xf7ffffffffffffff), rs1:x12(0xbfffffffffffffff), imm:0x3
+ TEST_IMM_OP(rori, x20, x12, 0xf7ffffffffffffff, 0xbfffffffffffffff, 0x3, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xfffeffffffffffff), rs1:x11(0x7fffffffffffffff), imm:0xf
+ TEST_IMM_OP(rori, x21, x11, 0xfffeffffffffffff, 0x7fffffffffffffff, 0xf, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff), imm:0xf
+ TEST_IMM_OP(rori, x22, x10, 0xffffffffffffffff, 0xffffffffffffffff, 0xf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x32a21fa7bdb5bd4a), rs1:x9(0x10fd3dedadea5195), imm:0xb
+ TEST_IMM_OP(rori, x23, x9, 0x32a21fa7bdb5bd4a, 0x10fd3dedadea5195, 0xb, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), imm:0x1b
+ TEST_IMM_OP(rori, x0, x8, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0x1b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xe4b24f82d470d45d), rs1:x7(0xc9649f05a8e1a8bb), imm:0x1
+ TEST_IMM_OP(rori, x25, x7, 0xe4b24f82d470d45d, 0xc9649f05a8e1a8bb, 0x1, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb), imm:0x15
+ TEST_IMM_OP(rori, x26, x0, 0x0000000000000000, 0x3541291848c99fcb, 0x15, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/RORIW-01.S b/riscof/suite/rv64i_m/K_unratified/RORIW-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..58b41197f3aa050c5a43ad6387d0eb714cfe6dff
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/RORIW-01.S
@@ -0,0 +1,1838 @@
+// RISC-V Architectural Validation Test RORIW-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'roriw'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",roriw)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",roriw)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",roriw)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xffffffffb5bd4a32), rs1:x31(0x10fd3dedadea5195), imm:0x3
+ TEST_IMM_OP(roriw, x1, x31, 0xffffffffb5bd4a32, 0x10fd3dedadea5195, 0x3, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x000000005ff7d83a), rs1:x30(0xbd295ce2d2ffbec1), imm:0x1b
+ TEST_IMM_OP(roriw, x2, x30, 0x000000005ff7d83a, 0xbd295ce2d2ffbec1, 0x1b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xffffffffa8e1a8bb), rs1:x29(0xc9649f05a8e1a8bb), imm:0x0
+ TEST_IMM_OP(roriw, x3, x29, 0xffffffffa8e1a8bb, 0xc9649f05a8e1a8bb, 0x0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x00000000691933f9), rs1:x28(0x3541291848c99fcb), imm:0x3
+ TEST_IMM_OP(roriw, x4, x28, 0x00000000691933f9, 0x3541291848c99fcb, 0x3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xffffffffa49e8c3a), rs1:x27(0x10a24740461d524f), imm:0xf
+ TEST_IMM_OP(roriw, x5, x27, 0xffffffffa49e8c3a, 0x10a24740461d524f, 0xf, x6, 32, x7)
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x00000000215ea514), rs1:x26(0x546b0e54528a10af), imm:0xf
+ TEST_IMM_OP(roriw, x6, x26, 0x00000000215ea514, 0x546b0e54528a10af, 0xf, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x00000000787c337f), rs1:x25(0x73a92fd4e19bfbc3), imm:0xb
+ TEST_IMM_OP(roriw, x7, x25, 0x00000000787c337f, 0x73a92fd4e19bfbc3, 0xb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x000000000f5e580e), rs1:x24(0x82f6747f707af2c0), imm:0x1b
+ TEST_IMM_OP(roriw, x8, x24, 0x000000000f5e580e, 0x82f6747f707af2c0, 0x1b, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xffffffffd23e882d), rs1:x23(0xf5adb41aa47d105b), imm:0x1
+ TEST_IMM_OP(roriw, x9, x23, 0xffffffffd23e882d, 0xf5adb41aa47d105b, 0x1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xffffffffde611890), rs1:x22(0xdf7f3844121bcc23), imm:0x15
+ TEST_IMM_OP(roriw, x10, x22, 0xffffffffde611890, 0xdf7f3844121bcc23, 0x15, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000002), rs1:x21(0x0000000000000001), imm:0x1f
+ TEST_IMM_OP(roriw, x11, x21, 0x0000000000000002, 0x1, 0x1f, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000000040000), rs1:x20(0x0000000000000002), imm:0xf
+ TEST_IMM_OP(roriw, x12, x20, 0x0000000000040000, 0x2, 0xf, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000800), rs1:x19(0x0000000000000004), imm:0x17
+ TEST_IMM_OP(roriw, x13, x19, 0x0000000000000800, 0x4, 0x17, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000100), rs1:x18(0x0000000000000008), imm:0x1b
+ TEST_IMM_OP(roriw, x14, x18, 0x0000000000000100, 0x8, 0x1b, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000080), rs1:x17(0x0000000000000010), imm:0x1d
+ TEST_IMM_OP(roriw, x15, x17, 0x0000000000000080, 0x10, 0x1d, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000080), rs1:x16(0x0000000000000020), imm:0x1e
+ TEST_IMM_OP(roriw, x16, x16, 0x0000000000000080, 0x20, 0x1e, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000040), rs1:x15(0x0000000000000040), imm:0x0
+ TEST_IMM_OP(roriw, x17, x15, 0x0000000000000040, 0x40, 0x0, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000000800000), rs1:x14(0x0000000000000080), imm:0x10
+ TEST_IMM_OP(roriw, x18, x14, 0x0000000000800000, 0x80, 0x10, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000001), rs1:x13(0x0000000000000100), imm:0x8
+ TEST_IMM_OP(roriw, x19, x13, 0x0000000000000001, 0x100, 0x8, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000020), rs1:x12(0x0000000000000200), imm:0x4
+ TEST_IMM_OP(roriw, x20, x12, 0x0000000000000020, 0x200, 0x4, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000100), rs1:x11(0x0000000000000400), imm:0x2
+ TEST_IMM_OP(roriw, x21, x11, 0x0000000000000100, 0x400, 0x2, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000400), rs1:x10(0x0000000000000800), imm:0x1
+ TEST_IMM_OP(roriw, x22, x10, 0x0000000000000400, 0x800, 0x1, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000200), rs1:x9(0x0000000000001000), imm:0x3
+ TEST_IMM_OP(roriw, x23, x9, 0x0000000000000200, 0x1000, 0x3, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000040000), rs1:x8(0x0000000000002000), imm:0x1b
+ TEST_IMM_OP(roriw, x24, x8, 0x0000000000040000, 0x2000, 0x1b, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000000004000), rs1:x7(0x0000000000004000), imm:0x0
+ TEST_IMM_OP(roriw, x25, x7, 0x0000000000004000, 0x4000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000001000), rs1:x6(0x0000000000008000), imm:0x3
+ TEST_IMM_OP(roriw, x26, x6, 0x0000000000001000, 0x8000, 0x3, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000002), rs1:x5(0x0000000000010000), imm:0xf
+ TEST_IMM_OP(roriw, x27, x5, 0x0000000000000002, 0x10000, 0xf, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000004), rs1:x4(0x0000000000020000), imm:0xf
+ TEST_IMM_OP(roriw, x28, x4, 0x0000000000000004, 0x20000, 0xf, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000080), rs1:x3(0x0000000000040000), imm:0xb
+ TEST_IMM_OP(roriw, x29, x3, 0x0000000000000080, 0x40000, 0xb, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000001000000), rs1:x2(0x0000000000080000), imm:0x1b
+ TEST_IMM_OP(roriw, x30, x2, 0x0000000001000000, 0x80000, 0x1b, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000080000), rs1:x1(0x0000000000100000), imm:0x1
+ TEST_IMM_OP(roriw, x31, x1, 0x0000000000080000, 0x100000, 0x1, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000001), rs1:x31(0x0000000000200000), imm:0x15
+ TEST_IMM_OP(roriw, x1, x31, 0x0000000000000001, 0x200000, 0x15, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000800000), rs1:x30(0x0000000000400000), imm:0x1f
+ TEST_IMM_OP(roriw, x2, x30, 0x0000000000800000, 0x400000, 0x1f, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000100), rs1:x29(0x0000000000800000), imm:0xf
+ TEST_IMM_OP(roriw, x3, x29, 0x0000000000000100, 0x800000, 0xf, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000002), rs1:x28(0x0000000001000000), imm:0x17
+ TEST_IMM_OP(roriw, x4, x28, 0x0000000000000002, 0x1000000, 0x17, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000040000000), rs1:x27(0x0000000002000000), imm:0x1b
+ TEST_IMM_OP(roriw, x5, x27, 0x0000000040000000, 0x2000000, 0x1b, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000020000000), rs1:x26(0x0000000004000000), imm:0x1d
+ TEST_IMM_OP(roriw, x6, x26, 0x0000000020000000, 0x4000000, 0x1d, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000020000000), rs1:x25(0x0000000008000000), imm:0x1e
+ TEST_IMM_OP(roriw, x7, x25, 0x0000000020000000, 0x8000000, 0x1e, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000010000000), rs1:x24(0x0000000010000000), imm:0x0
+ TEST_IMM_OP(roriw, x8, x24, 0x0000000010000000, 0x10000000, 0x0, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000000002000), rs1:x23(0x0000000020000000), imm:0x10
+ TEST_IMM_OP(roriw, x9, x23, 0x0000000000002000, 0x20000000, 0x10, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000000400000), rs1:x22(0x0000000040000000), imm:0x8
+ TEST_IMM_OP(roriw, x10, x22, 0x0000000000400000, 0x40000000, 0x8, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000008000000), rs1:x21(0x0000000080000000), imm:0x4
+ TEST_IMM_OP(roriw, x11, x21, 0x0000000008000000, 0x80000000, 0x4, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000100000000), imm:0x2
+ TEST_IMM_OP(roriw, x12, x20, 0x0000000000000000, 0x100000000, 0x2, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000200000000), imm:0x1
+ TEST_IMM_OP(roriw, x13, x19, 0x0000000000000000, 0x200000000, 0x1, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000400000000), imm:0x3
+ TEST_IMM_OP(roriw, x14, x18, 0x0000000000000000, 0x400000000, 0x3, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000800000000), imm:0x1b
+ TEST_IMM_OP(roriw, x15, x17, 0x0000000000000000, 0x800000000, 0x1b, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000001000000000), imm:0x0
+ TEST_IMM_OP(roriw, x16, x16, 0x0000000000000000, 0x1000000000, 0x0, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000002000000000), imm:0x3
+ TEST_IMM_OP(roriw, x17, x15, 0x0000000000000000, 0x2000000000, 0x3, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000004000000000), imm:0xf
+ TEST_IMM_OP(roriw, x18, x14, 0x0000000000000000, 0x4000000000, 0xf, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000008000000000), imm:0xf
+ TEST_IMM_OP(roriw, x19, x13, 0x0000000000000000, 0x8000000000, 0xf, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000010000000000), imm:0xb
+ TEST_IMM_OP(roriw, x20, x12, 0x0000000000000000, 0x10000000000, 0xb, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000020000000000), imm:0x1b
+ TEST_IMM_OP(roriw, x21, x11, 0x0000000000000000, 0x20000000000, 0x1b, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000040000000000), imm:0x1
+ TEST_IMM_OP(roriw, x22, x10, 0x0000000000000000, 0x40000000000, 0x1, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000080000000000), imm:0x15
+ TEST_IMM_OP(roriw, x23, x9, 0x0000000000000000, 0x80000000000, 0x15, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000100000000000), imm:0x1f
+ TEST_IMM_OP(roriw, x24, x8, 0x0000000000000000, 0x100000000000, 0x1f, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000200000000000), imm:0xf
+ TEST_IMM_OP(roriw, x25, x7, 0x0000000000000000, 0x200000000000, 0xf, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000400000000000), imm:0x17
+ TEST_IMM_OP(roriw, x26, x6, 0x0000000000000000, 0x400000000000, 0x17, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000800000000000), imm:0x1b
+ TEST_IMM_OP(roriw, x27, x5, 0x0000000000000000, 0x800000000000, 0x1b, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0001000000000000), imm:0x1d
+ TEST_IMM_OP(roriw, x28, x4, 0x0000000000000000, 0x1000000000000, 0x1d, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0002000000000000), imm:0x1e
+ TEST_IMM_OP(roriw, x29, x3, 0x0000000000000000, 0x2000000000000, 0x1e, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0004000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x30, x2, 0x0000000000000000, 0x4000000000000, 0x0, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0008000000000000), imm:0x10
+ TEST_IMM_OP(roriw, x31, x1, 0x0000000000000000, 0x8000000000000, 0x10, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0010000000000000), imm:0x8
+ TEST_IMM_OP(roriw, x1, x31, 0x0000000000000000, 0x10000000000000, 0x8, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0020000000000000), imm:0x4
+ TEST_IMM_OP(roriw, x2, x30, 0x0000000000000000, 0x20000000000000, 0x4, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0040000000000000), imm:0x2
+ TEST_IMM_OP(roriw, x3, x29, 0x0000000000000000, 0x40000000000000, 0x2, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0080000000000000), imm:0x1
+ TEST_IMM_OP(roriw, x4, x28, 0x0000000000000000, 0x80000000000000, 0x1, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0100000000000000), imm:0x3
+ TEST_IMM_OP(roriw, x5, x27, 0x0000000000000000, 0x100000000000000, 0x3, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0200000000000000), imm:0x1b
+ TEST_IMM_OP(roriw, x6, x26, 0x0000000000000000, 0x200000000000000, 0x1b, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0400000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x7, x25, 0x0000000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0800000000000000), imm:0x3
+ TEST_IMM_OP(roriw, x8, x24, 0x0000000000000000, 0x800000000000000, 0x3, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x1000000000000000), imm:0xf
+ TEST_IMM_OP(roriw, x9, x23, 0x0000000000000000, 0x1000000000000000, 0xf, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x2000000000000000), imm:0xf
+ TEST_IMM_OP(roriw, x10, x22, 0x0000000000000000, 0x2000000000000000, 0xf, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x4000000000000000), imm:0xb
+ TEST_IMM_OP(roriw, x11, x21, 0x0000000000000000, 0x4000000000000000, 0xb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x8000000000000000), imm:0x1b
+ TEST_IMM_OP(roriw, x12, x20, 0x0000000000000000, 0x8000000000000000, 0x1b, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000), imm:0x1
+ TEST_IMM_OP(roriw, x13, x19, 0x0000000000000000, 0x0, 0x1, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffffff7ff), rs1:x18(0xfffffffffffffffe), imm:0x15
+ TEST_IMM_OP(roriw, x14, x18, 0xfffffffffffff7ff, 0xfffffffffffffffe, 0x15, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffffffffb), rs1:x17(0xfffffffffffffffd), imm:0x1f
+ TEST_IMM_OP(roriw, x15, x17, 0xfffffffffffffffb, 0xfffffffffffffffd, 0x1f, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xfffffffffff7ffff), rs1:x16(0xfffffffffffffffb), imm:0xf
+ TEST_IMM_OP(roriw, x16, x16, 0xfffffffffff7ffff, 0xfffffffffffffffb, 0xf, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffefff), rs1:x15(0xfffffffffffffff7), imm:0x17
+ TEST_IMM_OP(roriw, x17, x15, 0xffffffffffffefff, 0xfffffffffffffff7, 0x17, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xfffffffffffffdff), rs1:x14(0xffffffffffffffef), imm:0x1b
+ TEST_IMM_OP(roriw, x18, x14, 0xfffffffffffffdff, 0xffffffffffffffef, 0x1b, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xfffffffffffffeff), rs1:x13(0xffffffffffffffdf), imm:0x1d
+ TEST_IMM_OP(roriw, x19, x13, 0xfffffffffffffeff, 0xffffffffffffffdf, 0x1d, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffffffeff), rs1:x12(0xffffffffffffffbf), imm:0x1e
+ TEST_IMM_OP(roriw, x20, x12, 0xfffffffffffffeff, 0xffffffffffffffbf, 0x1e, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffff7f), rs1:x11(0xffffffffffffff7f), imm:0x0
+ TEST_IMM_OP(roriw, x21, x11, 0xffffffffffffff7f, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffeffffff), rs1:x10(0xfffffffffffffeff), imm:0x10
+ TEST_IMM_OP(roriw, x22, x10, 0xfffffffffeffffff, 0xfffffffffffffeff, 0x10, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffffffd), rs1:x9(0xfffffffffffffdff), imm:0x8
+ TEST_IMM_OP(roriw, x23, x9, 0xfffffffffffffffd, 0xfffffffffffffdff, 0x8, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffbf), rs1:x8(0xfffffffffffffbff), imm:0x4
+ TEST_IMM_OP(roriw, x24, x8, 0xffffffffffffffbf, 0xfffffffffffffbff, 0x4, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xfffffffffffffdff), rs1:x7(0xfffffffffffff7ff), imm:0x2
+ TEST_IMM_OP(roriw, x25, x7, 0xfffffffffffffdff, 0xfffffffffffff7ff, 0x2, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xfffffffffffff7ff), rs1:x6(0xffffffffffffefff), imm:0x1
+ TEST_IMM_OP(roriw, x26, x6, 0xfffffffffffff7ff, 0xffffffffffffefff, 0x1, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xfffffffffffffbff), rs1:x5(0xffffffffffffdfff), imm:0x3
+ TEST_IMM_OP(roriw, x27, x5, 0xfffffffffffffbff, 0xffffffffffffdfff, 0x3, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffff7ffff), rs1:x4(0xffffffffffffbfff), imm:0x1b
+ TEST_IMM_OP(roriw, x28, x4, 0xfffffffffff7ffff, 0xffffffffffffbfff, 0x1b, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffff7fff), rs1:x3(0xffffffffffff7fff), imm:0x0
+ TEST_IMM_OP(roriw, x29, x3, 0xffffffffffff7fff, 0xffffffffffff7fff, 0x0, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffdfff), rs1:x2(0xfffffffffffeffff), imm:0x3
+ TEST_IMM_OP(roriw, x30, x2, 0xffffffffffffdfff, 0xfffffffffffeffff, 0x3, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffffffb), rs1:x1(0xfffffffffffdffff), imm:0xf
+ TEST_IMM_OP(roriw, x31, x1, 0xfffffffffffffffb, 0xfffffffffffdffff, 0xf, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xfffffffffffffff7), rs1:x31(0xfffffffffffbffff), imm:0xf
+ TEST_IMM_OP(roriw, x1, x31, 0xfffffffffffffff7, 0xfffffffffffbffff, 0xf, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xfffffffffffffeff), rs1:x30(0xfffffffffff7ffff), imm:0xb
+ TEST_IMM_OP(roriw, x2, x30, 0xfffffffffffffeff, 0xfffffffffff7ffff, 0xb, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xfffffffffdffffff), rs1:x29(0xffffffffffefffff), imm:0x1b
+ TEST_IMM_OP(roriw, x3, x29, 0xfffffffffdffffff, 0xffffffffffefffff, 0x1b, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffefffff), rs1:x28(0xffffffffffdfffff), imm:0x1
+ TEST_IMM_OP(roriw, x4, x28, 0xffffffffffefffff, 0xffffffffffdfffff, 0x1, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffffffffd), rs1:x27(0xffffffffffbfffff), imm:0x15
+ TEST_IMM_OP(roriw, x5, x27, 0xfffffffffffffffd, 0xffffffffffbfffff, 0x15, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffeffffff), rs1:x26(0xffffffffff7fffff), imm:0x1f
+ TEST_IMM_OP(roriw, x6, x26, 0xfffffffffeffffff, 0xffffffffff7fffff, 0x1f, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffffffdff), rs1:x25(0xfffffffffeffffff), imm:0xf
+ TEST_IMM_OP(roriw, x7, x25, 0xfffffffffffffdff, 0xfffffffffeffffff, 0xf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffffffffb), rs1:x24(0xfffffffffdffffff), imm:0x17
+ TEST_IMM_OP(roriw, x8, x24, 0xfffffffffffffffb, 0xfffffffffdffffff, 0x17, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x000000007fffffff), rs1:x23(0xfffffffffbffffff), imm:0x1b
+ TEST_IMM_OP(roriw, x9, x23, 0x000000007fffffff, 0xfffffffffbffffff, 0x1b, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xffffffffbfffffff), rs1:x22(0xfffffffff7ffffff), imm:0x1d
+ TEST_IMM_OP(roriw, x10, x22, 0xffffffffbfffffff, 0xfffffffff7ffffff, 0x1d, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffffffbfffffff), rs1:x21(0xffffffffefffffff), imm:0x1e
+ TEST_IMM_OP(roriw, x11, x21, 0xffffffffbfffffff, 0xffffffffefffffff, 0x1e, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffffffffdfffffff), rs1:x20(0xffffffffdfffffff), imm:0x0
+ TEST_IMM_OP(roriw, x12, x20, 0xffffffffdfffffff, 0xffffffffdfffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffbfff), rs1:x19(0xffffffffbfffffff), imm:0x10
+ TEST_IMM_OP(roriw, x13, x19, 0xffffffffffffbfff, 0xffffffffbfffffff, 0x10, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xffffffffff7fffff), rs1:x18(0xffffffff7fffffff), imm:0x8
+ TEST_IMM_OP(roriw, x14, x18, 0xffffffffff7fffff, 0xffffffff7fffffff, 0x8, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfffffffeffffffff), imm:0x4
+ TEST_IMM_OP(roriw, x15, x17, 0xffffffffffffffff, 0xfffffffeffffffff, 0x4, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfffffffdffffffff), imm:0x2
+ TEST_IMM_OP(roriw, x16, x16, 0xffffffffffffffff, 0xfffffffdffffffff, 0x2, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xfffffffbffffffff), imm:0x1
+ TEST_IMM_OP(roriw, x17, x15, 0xffffffffffffffff, 0xfffffffbffffffff, 0x1, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xfffffff7ffffffff), imm:0x3
+ TEST_IMM_OP(roriw, x18, x14, 0xffffffffffffffff, 0xfffffff7ffffffff, 0x3, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xffffffefffffffff), imm:0x1b
+ TEST_IMM_OP(roriw, x19, x13, 0xffffffffffffffff, 0xffffffefffffffff, 0x1b, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xffffffdfffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x20, x12, 0xffffffffffffffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xffffffbfffffffff), imm:0x3
+ TEST_IMM_OP(roriw, x21, x11, 0xffffffffffffffff, 0xffffffbfffffffff, 0x3, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffff7fffffffff), imm:0xf
+ TEST_IMM_OP(roriw, x22, x10, 0xffffffffffffffff, 0xffffff7fffffffff, 0xf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffeffffffffff), imm:0xf
+ TEST_IMM_OP(roriw, x23, x9, 0xffffffffffffffff, 0xfffffeffffffffff, 0xf, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xfffffdffffffffff), imm:0xb
+ TEST_IMM_OP(roriw, x24, x8, 0xffffffffffffffff, 0xfffffdffffffffff, 0xb, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xfffffbffffffffff), imm:0x1b
+ TEST_IMM_OP(roriw, x25, x7, 0xffffffffffffffff, 0xfffffbffffffffff, 0x1b, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xfffff7ffffffffff), imm:0x1
+ TEST_IMM_OP(roriw, x26, x6, 0xffffffffffffffff, 0xfffff7ffffffffff, 0x1, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffefffffffffff), imm:0x15
+ TEST_IMM_OP(roriw, x27, x5, 0xffffffffffffffff, 0xffffefffffffffff, 0x15, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffdfffffffffff), imm:0x1f
+ TEST_IMM_OP(roriw, x28, x4, 0xffffffffffffffff, 0xffffdfffffffffff, 0x1f, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xffffbfffffffffff), imm:0xf
+ TEST_IMM_OP(roriw, x29, x3, 0xffffffffffffffff, 0xffffbfffffffffff, 0xf, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xffff7fffffffffff), imm:0x17
+ TEST_IMM_OP(roriw, x30, x2, 0xffffffffffffffff, 0xffff7fffffffffff, 0x17, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffeffffffffffff), imm:0x1b
+ TEST_IMM_OP(roriw, x31, x1, 0xffffffffffffffff, 0xfffeffffffffffff, 0x1b, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xfffdffffffffffff), imm:0x1d
+ TEST_IMM_OP(roriw, x1, x31, 0xffffffffffffffff, 0xfffdffffffffffff, 0x1d, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xfffbffffffffffff), imm:0x1e
+ TEST_IMM_OP(roriw, x2, x30, 0xffffffffffffffff, 0xfffbffffffffffff, 0x1e, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xfff7ffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x3, x29, 0xffffffffffffffff, 0xfff7ffffffffffff, 0x0, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffefffffffffffff), imm:0x10
+ TEST_IMM_OP(roriw, x4, x28, 0xffffffffffffffff, 0xffefffffffffffff, 0x10, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffdfffffffffffff), imm:0x8
+ TEST_IMM_OP(roriw, x5, x27, 0xffffffffffffffff, 0xffdfffffffffffff, 0x8, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xffbfffffffffffff), imm:0x4
+ TEST_IMM_OP(roriw, x6, x26, 0xffffffffffffffff, 0xffbfffffffffffff, 0x4, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xff7fffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x7, x25, 0xffffffffffffffff, 0xff7fffffffffffff, 0x0, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfeffffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x8, x24, 0xffffffffffffffff, 0xfeffffffffffffff, 0x0, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xfdffffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x9, x23, 0xffffffffffffffff, 0xfdffffffffffffff, 0x0, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xfbffffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x10, x22, 0xffffffffffffffff, 0xfbffffffffffffff, 0x0, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xf7ffffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x11, x21, 0xffffffffffffffff, 0xf7ffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xefffffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x12, x20, 0xffffffffffffffff, 0xefffffffffffffff, 0x0, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xdfffffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x13, x19, 0xffffffffffffffff, 0xdfffffffffffffff, 0x0, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xbfffffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x14, x18, 0xffffffffffffffff, 0xbfffffffffffffff, 0x0, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0x7fffffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x15, x17, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x16, x16, 0xffffffffffffffff, 0xffffffffffffffff, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000001), rs1:x15(0x0000000000000001), imm:0x0
+ TEST_IMM_OP(roriw, x17, x15, 0x0000000000000001, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000002), rs1:x14(0x0000000000000002), imm:0x0
+ TEST_IMM_OP(roriw, x18, x14, 0x0000000000000002, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000004), rs1:x13(0x0000000000000004), imm:0x0
+ TEST_IMM_OP(roriw, x19, x13, 0x0000000000000004, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000008), rs1:x12(0x0000000000000008), imm:0x0
+ TEST_IMM_OP(roriw, x20, x12, 0x0000000000000008, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000010), rs1:x11(0x0000000000000010), imm:0x0
+ TEST_IMM_OP(roriw, x21, x11, 0x0000000000000010, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000020), rs1:x10(0x0000000000000020), imm:0x0
+ TEST_IMM_OP(roriw, x22, x10, 0x0000000000000020, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000040), rs1:x9(0x0000000000000040), imm:0x0
+ TEST_IMM_OP(roriw, x23, x9, 0x0000000000000040, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000080), rs1:x8(0x0000000000000080), imm:0x0
+ TEST_IMM_OP(roriw, x24, x8, 0x0000000000000080, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000100), rs1:x7(0x0000000000000100), imm:0x0
+ TEST_IMM_OP(roriw, x25, x7, 0x0000000000000100, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000200), rs1:x6(0x0000000000000200), imm:0x0
+ TEST_IMM_OP(roriw, x26, x6, 0x0000000000000200, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000400), rs1:x5(0x0000000000000400), imm:0x0
+ TEST_IMM_OP(roriw, x27, x5, 0x0000000000000400, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000800), rs1:x4(0x0000000000000800), imm:0x0
+ TEST_IMM_OP(roriw, x28, x4, 0x0000000000000800, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000001000), rs1:x3(0x0000000000001000), imm:0x0
+ TEST_IMM_OP(roriw, x29, x3, 0x0000000000001000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000002000), rs1:x2(0x0000000000002000), imm:0x0
+ TEST_IMM_OP(roriw, x30, x2, 0x0000000000002000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000004000), rs1:x1(0x0000000000004000), imm:0x0
+ TEST_IMM_OP(roriw, x31, x1, 0x0000000000004000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000008000), rs1:x31(0x0000000000008000), imm:0x0
+ TEST_IMM_OP(roriw, x1, x31, 0x0000000000008000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000010000), rs1:x30(0x0000000000010000), imm:0x0
+ TEST_IMM_OP(roriw, x2, x30, 0x0000000000010000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000020000), rs1:x29(0x0000000000020000), imm:0x0
+ TEST_IMM_OP(roriw, x3, x29, 0x0000000000020000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000040000), rs1:x28(0x0000000000040000), imm:0x0
+ TEST_IMM_OP(roriw, x4, x28, 0x0000000000040000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000080000), rs1:x27(0x0000000000080000), imm:0x0
+ TEST_IMM_OP(roriw, x5, x27, 0x0000000000080000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000100000), rs1:x26(0x0000000000100000), imm:0x0
+ TEST_IMM_OP(roriw, x6, x26, 0x0000000000100000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000200000), rs1:x25(0x0000000000200000), imm:0x0
+ TEST_IMM_OP(roriw, x7, x25, 0x0000000000200000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000400000), rs1:x24(0x0000000000400000), imm:0x0
+ TEST_IMM_OP(roriw, x8, x24, 0x0000000000400000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000800000), rs1:x23(0x0000000000800000), imm:0x0
+ TEST_IMM_OP(roriw, x9, x23, 0x0000000000800000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000001000000), rs1:x22(0x0000000001000000), imm:0x0
+ TEST_IMM_OP(roriw, x10, x22, 0x0000000001000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000002000000), rs1:x21(0x0000000002000000), imm:0x0
+ TEST_IMM_OP(roriw, x11, x21, 0x0000000002000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000004000000), rs1:x20(0x0000000004000000), imm:0x0
+ TEST_IMM_OP(roriw, x12, x20, 0x0000000004000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000008000000), rs1:x19(0x0000000008000000), imm:0x0
+ TEST_IMM_OP(roriw, x13, x19, 0x0000000008000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000010000000), rs1:x18(0x0000000010000000), imm:0x0
+ TEST_IMM_OP(roriw, x14, x18, 0x0000000010000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000020000000), rs1:x17(0x0000000020000000), imm:0x0
+ TEST_IMM_OP(roriw, x15, x17, 0x0000000020000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000040000000), rs1:x16(0x0000000040000000), imm:0x0
+ TEST_IMM_OP(roriw, x16, x16, 0x0000000040000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0xffffffff80000000), rs1:x15(0x0000000080000000), imm:0x0
+ TEST_IMM_OP(roriw, x17, x15, 0xffffffff80000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000), imm:0x0
+ TEST_IMM_OP(roriw, x18, x14, 0x0000000000000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000), imm:0x0
+ TEST_IMM_OP(roriw, x19, x13, 0x0000000000000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000), imm:0x0
+ TEST_IMM_OP(roriw, x20, x12, 0x0000000000000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000), imm:0x0
+ TEST_IMM_OP(roriw, x21, x11, 0x0000000000000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000), imm:0x0
+ TEST_IMM_OP(roriw, x22, x10, 0x0000000000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000), imm:0x0
+ TEST_IMM_OP(roriw, x23, x9, 0x0000000000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000), imm:0x0
+ TEST_IMM_OP(roriw, x24, x8, 0x0000000000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000), imm:0x0
+ TEST_IMM_OP(roriw, x25, x7, 0x0000000000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000), imm:0x0
+ TEST_IMM_OP(roriw, x26, x6, 0x0000000000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000), imm:0x0
+ TEST_IMM_OP(roriw, x27, x5, 0x0000000000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000), imm:0x0
+ TEST_IMM_OP(roriw, x28, x4, 0x0000000000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000), imm:0x0
+ TEST_IMM_OP(roriw, x29, x3, 0x0000000000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000), imm:0x0
+ TEST_IMM_OP(roriw, x30, x2, 0x0000000000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000), imm:0x0
+ TEST_IMM_OP(roriw, x31, x1, 0x0000000000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000), imm:0x0
+ TEST_IMM_OP(roriw, x1, x31, 0x0000000000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000), imm:0x0
+ TEST_IMM_OP(roriw, x2, x30, 0x0000000000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x3, x29, 0x0000000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x4, x28, 0x0000000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x5, x27, 0x0000000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x6, x26, 0x0000000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x7, x25, 0x0000000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x8, x24, 0x0000000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x9, x23, 0x0000000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x10, x22, 0x0000000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x11, x21, 0x0000000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x12, x20, 0x0000000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x13, x19, 0x0000000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x14, x18, 0x0000000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x15, x17, 0x0000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x16, x16, 0x0000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x17, x15, 0x0000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x18, x14, 0x0000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), imm:0x0
+ TEST_IMM_OP(roriw, x19, x13, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffffffffe), rs1:x12(0xfffffffffffffffe), imm:0x0
+ TEST_IMM_OP(roriw, x20, x12, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xfffffffffffffffd), rs1:x11(0xfffffffffffffffd), imm:0x0
+ TEST_IMM_OP(roriw, x21, x11, 0xfffffffffffffffd, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffffffb), rs1:x10(0xfffffffffffffffb), imm:0x0
+ TEST_IMM_OP(roriw, x22, x10, 0xfffffffffffffffb, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffffff7), rs1:x9(0xfffffffffffffff7), imm:0x0
+ TEST_IMM_OP(roriw, x23, x9, 0xfffffffffffffff7, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffef), rs1:x8(0xffffffffffffffef), imm:0x0
+ TEST_IMM_OP(roriw, x24, x8, 0xffffffffffffffef, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffdf), rs1:x7(0xffffffffffffffdf), imm:0x0
+ TEST_IMM_OP(roriw, x25, x7, 0xffffffffffffffdf, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffbf), rs1:x6(0xffffffffffffffbf), imm:0x0
+ TEST_IMM_OP(roriw, x26, x6, 0xffffffffffffffbf, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffff7f), rs1:x5(0xffffffffffffff7f), imm:0x0
+ TEST_IMM_OP(roriw, x27, x5, 0xffffffffffffff7f, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffffeff), rs1:x4(0xfffffffffffffeff), imm:0x0
+ TEST_IMM_OP(roriw, x28, x4, 0xfffffffffffffeff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xfffffffffffffdff), rs1:x3(0xfffffffffffffdff), imm:0x0
+ TEST_IMM_OP(roriw, x29, x3, 0xfffffffffffffdff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffffbff), rs1:x2(0xfffffffffffffbff), imm:0x0
+ TEST_IMM_OP(roriw, x30, x2, 0xfffffffffffffbff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffff7ff), rs1:x1(0xfffffffffffff7ff), imm:0x0
+ TEST_IMM_OP(roriw, x31, x1, 0xfffffffffffff7ff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffefff), rs1:x31(0xffffffffffffefff), imm:0x0
+ TEST_IMM_OP(roriw, x1, x31, 0xffffffffffffefff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffdfff), rs1:x30(0xffffffffffffdfff), imm:0x0
+ TEST_IMM_OP(roriw, x2, x30, 0xffffffffffffdfff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffbfff), rs1:x29(0xffffffffffffbfff), imm:0x0
+ TEST_IMM_OP(roriw, x3, x29, 0xffffffffffffbfff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffff7fff), rs1:x28(0xffffffffffff7fff), imm:0x0
+ TEST_IMM_OP(roriw, x4, x28, 0xffffffffffff7fff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffffeffff), rs1:x27(0xfffffffffffeffff), imm:0x0
+ TEST_IMM_OP(roriw, x5, x27, 0xfffffffffffeffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffffdffff), rs1:x26(0xfffffffffffdffff), imm:0x0
+ TEST_IMM_OP(roriw, x6, x26, 0xfffffffffffdffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffffbffff), rs1:x25(0xfffffffffffbffff), imm:0x0
+ TEST_IMM_OP(roriw, x7, x25, 0xfffffffffffbffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffff7ffff), rs1:x24(0xfffffffffff7ffff), imm:0x0
+ TEST_IMM_OP(roriw, x8, x24, 0xfffffffffff7ffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffefffff), rs1:x23(0xffffffffffefffff), imm:0x0
+ TEST_IMM_OP(roriw, x9, x23, 0xffffffffffefffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffdfffff), rs1:x22(0xffffffffffdfffff), imm:0x0
+ TEST_IMM_OP(roriw, x10, x22, 0xffffffffffdfffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffbfffff), rs1:x21(0xffffffffffbfffff), imm:0x0
+ TEST_IMM_OP(roriw, x11, x21, 0xffffffffffbfffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffffffff7fffff), rs1:x20(0xffffffffff7fffff), imm:0x0
+ TEST_IMM_OP(roriw, x12, x20, 0xffffffffff7fffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xfffffffffeffffff), rs1:x19(0xfffffffffeffffff), imm:0x0
+ TEST_IMM_OP(roriw, x13, x19, 0xfffffffffeffffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffdffffff), rs1:x18(0xfffffffffdffffff), imm:0x0
+ TEST_IMM_OP(roriw, x14, x18, 0xfffffffffdffffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffbffffff), rs1:x17(0xfffffffffbffffff), imm:0x0
+ TEST_IMM_OP(roriw, x15, x17, 0xfffffffffbffffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xfffffffff7ffffff), rs1:x16(0xfffffffff7ffffff), imm:0x0
+ TEST_IMM_OP(roriw, x16, x16, 0xfffffffff7ffffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffffefffffff), rs1:x15(0xffffffffefffffff), imm:0x0
+ TEST_IMM_OP(roriw, x17, x15, 0xffffffffefffffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffffdfffffff), rs1:x14(0xffffffffdfffffff), imm:0x0
+ TEST_IMM_OP(roriw, x18, x14, 0xffffffffdfffffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffffbfffffff), rs1:x13(0xffffffffbfffffff), imm:0x0
+ TEST_IMM_OP(roriw, x19, x13, 0xffffffffbfffffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x000000007fffffff), rs1:x12(0xffffffff7fffffff), imm:0x0
+ TEST_IMM_OP(roriw, x20, x12, 0x000000007fffffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xfffffffeffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x21, x11, 0xffffffffffffffff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xfffffffdffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x22, x10, 0xffffffffffffffff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffffbffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x23, x9, 0xffffffffffffffff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xfffffff7ffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x24, x8, 0xffffffffffffffff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xffffffefffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x25, x7, 0xffffffffffffffff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xffffffdfffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x26, x6, 0xffffffffffffffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffffbfffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x27, x5, 0xffffffffffffffff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffff7fffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x28, x4, 0xffffffffffffffff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xfffffeffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x29, x3, 0xffffffffffffffff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xfffffdffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x30, x2, 0xffffffffffffffff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffffbffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x31, x1, 0xffffffffffffffff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xfffff7ffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x1, x31, 0xffffffffffffffff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xffffefffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x2, x30, 0xffffffffffffffff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xffffdfffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x3, x29, 0xffffffffffffffff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffffbfffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x4, x28, 0xffffffffffffffff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffff7fffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x5, x27, 0xffffffffffffffff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xfffeffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x6, x26, 0xffffffffffffffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xfffdffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x7, x25, 0xffffffffffffffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfffbffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x8, x24, 0xffffffffffffffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xfff7ffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x9, x23, 0xffffffffffffffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xffefffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x10, x22, 0xffffffffffffffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xffdfffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x11, x21, 0xffffffffffffffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xffbfffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x12, x20, 0xffffffffffffffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xff7fffffffffffff), imm:0x8
+ TEST_IMM_OP(roriw, x13, x19, 0xffffffffffffffff, 0xff7fffffffffffff, 0x8, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xfeffffffffffffff), imm:0x4
+ TEST_IMM_OP(roriw, x14, x18, 0xffffffffffffffff, 0xfeffffffffffffff, 0x4, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfdffffffffffffff), imm:0x2
+ TEST_IMM_OP(roriw, x15, x17, 0xffffffffffffffff, 0xfdffffffffffffff, 0x2, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfbffffffffffffff), imm:0x1
+ TEST_IMM_OP(roriw, x16, x16, 0xffffffffffffffff, 0xfbffffffffffffff, 0x1, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xf7ffffffffffffff), imm:0x3
+ TEST_IMM_OP(roriw, x17, x15, 0xffffffffffffffff, 0xf7ffffffffffffff, 0x3, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xefffffffffffffff), imm:0x1b
+ TEST_IMM_OP(roriw, x18, x14, 0xffffffffffffffff, 0xefffffffffffffff, 0x1b, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xdfffffffffffffff), imm:0x0
+ TEST_IMM_OP(roriw, x19, x13, 0xffffffffffffffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xbfffffffffffffff), imm:0x3
+ TEST_IMM_OP(roriw, x20, x12, 0xffffffffffffffff, 0xbfffffffffffffff, 0x3, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0x7fffffffffffffff), imm:0xf
+ TEST_IMM_OP(roriw, x21, x11, 0xffffffffffffffff, 0x7fffffffffffffff, 0xf, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff), imm:0xf
+ TEST_IMM_OP(roriw, x22, x10, 0xffffffffffffffff, 0xffffffffffffffff, 0xf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x0000000032b5bd4a), rs1:x9(0x10fd3dedadea5195), imm:0xb
+ TEST_IMM_OP(roriw, x23, x9, 0x0000000032b5bd4a, 0x10fd3dedadea5195, 0xb, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), imm:0x1b
+ TEST_IMM_OP(roriw, x0, x8, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0x1b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xffffffffd470d45d), rs1:x7(0xc9649f05a8e1a8bb), imm:0x1
+ TEST_IMM_OP(roriw, x25, x7, 0xffffffffd470d45d, 0xc9649f05a8e1a8bb, 0x1, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb), imm:0x15
+ TEST_IMM_OP(roriw, x26, x0, 0x0000000000000000, 0x3541291848c99fcb, 0x15, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/RORW-01.S b/riscof/suite/rv64i_m/K_unratified/RORW-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..33eb7848c66adc733d91091ff0e35a2f5baf3682
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/RORW-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test RORW-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'rorw'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",rorw)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",rorw)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",rorw)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xffffffffb5bd4a32), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(rorw, x1, x31, x16, 0xffffffffb5bd4a32, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x000000005ff7d83a), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(rorw, x2, x30, x15, 0x000000005ff7d83a, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xffffffffa8e1a8bb), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(rorw, x3, x29, x14, 0xffffffffa8e1a8bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x00000000691933f9), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(rorw, x4, x28, x13, 0x00000000691933f9, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xffffffffa49e8c3a), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(rorw, x5, x27, x12, 0xffffffffa49e8c3a, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x00000000215ea514), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(rorw, x6, x26, x11, 0x00000000215ea514, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x00000000787c337f), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(rorw, x7, x25, x10, 0x00000000787c337f, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x000000000f5e580e), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(rorw, x8, x24, x9, 0x000000000f5e580e, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xffffffffd23e882d), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(rorw, x9, x23, x8, 0xffffffffd23e882d, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xffffffffde611890), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(rorw, x10, x22, x7, 0xffffffffde611890, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000002), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(rorw, x11, x21, x6, 0x0000000000000002, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000004), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(rorw, x12, x20, x5, 0x0000000000000004, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000008), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(rorw, x13, x19, x4, 0x0000000000000008, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000010), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(rorw, x14, x18, x3, 0x0000000000000010, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000020), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(rorw, x15, x17, x2, 0x0000000000000020, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000040), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(rorw, x16, x16, x1, 0x0000000000000040, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000080), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(rorw, x17, x15, x31, 0x0000000000000080, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000100), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(rorw, x18, x14, x30, 0x0000000000000100, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000200), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(rorw, x19, x13, x29, 0x0000000000000200, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000400), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(rorw, x20, x12, x28, 0x0000000000000400, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000800), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(rorw, x21, x11, x27, 0x0000000000000800, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000000001000), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(rorw, x22, x10, x26, 0x0000000000001000, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000002000), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(rorw, x23, x9, x25, 0x0000000000002000, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000004000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(rorw, x24, x8, x24, 0x0000000000004000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000000008000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(rorw, x25, x7, x23, 0x0000000000008000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000010000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(rorw, x26, x6, x22, 0x0000000000010000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000000020000), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(rorw, x27, x5, x21, 0x0000000000020000, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000000040000), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(rorw, x28, x4, x20, 0x0000000000040000, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000080000), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(rorw, x29, x3, x19, 0x0000000000080000, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000100000), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(rorw, x30, x2, x18, 0x0000000000100000, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000200000), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(rorw, x31, x1, x17, 0x0000000000200000, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000400000), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(rorw, x1, x31, x16, 0x0000000000400000, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000800000), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(rorw, x2, x30, x15, 0x0000000000800000, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000001000000), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(rorw, x3, x29, x14, 0x0000000001000000, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000002000000), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(rorw, x4, x28, x13, 0x0000000002000000, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000004000000), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(rorw, x5, x27, x12, 0x0000000004000000, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000008000000), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(rorw, x6, x26, x11, 0x0000000008000000, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000010000000), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(rorw, x7, x25, x10, 0x0000000010000000, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000020000000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(rorw, x8, x24, x9, 0x0000000020000000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000040000000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(rorw, x9, x23, x8, 0x0000000040000000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0xffffffff80000000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(rorw, x10, x22, x7, 0xffffffff80000000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000001), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(rorw, x11, x21, x6, 0x0000000000000001, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(rorw, x12, x20, x5, 0x0000000000000000, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(rorw, x13, x19, x4, 0x0000000000000000, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(rorw, x14, x18, x3, 0x0000000000000000, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(rorw, x15, x17, x2, 0x0000000000000000, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(rorw, x16, x16, x1, 0x0000000000000000, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(rorw, x17, x15, x31, 0x0000000000000000, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(rorw, x18, x14, x30, 0x0000000000000000, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(rorw, x19, x13, x29, 0x0000000000000000, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(rorw, x20, x12, x28, 0x0000000000000000, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(rorw, x21, x11, x27, 0x0000000000000000, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(rorw, x22, x10, x26, 0x0000000000000000, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(rorw, x23, x9, x25, 0x0000000000000000, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(rorw, x24, x8, x24, 0x0000000000000000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(rorw, x25, x7, x23, 0x0000000000000000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(rorw, x26, x6, x22, 0x0000000000000000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(rorw, x27, x5, x21, 0x0000000000000000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(rorw, x28, x4, x20, 0x0000000000000000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(rorw, x29, x3, x19, 0x0000000000000000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(rorw, x30, x2, x18, 0x0000000000000000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(rorw, x31, x1, x17, 0x0000000000000000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(rorw, x1, x31, x16, 0x0000000000000000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(rorw, x2, x30, x15, 0x0000000000000000, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(rorw, x3, x29, x14, 0x0000000000000000, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(rorw, x4, x28, x13, 0x0000000000000000, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(rorw, x5, x27, x12, 0x0000000000000000, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(rorw, x6, x26, x11, 0x0000000000000000, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(rorw, x7, x25, x10, 0x0000000000000000, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(rorw, x8, x24, x9, 0x0000000000000000, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(rorw, x9, x23, x8, 0x0000000000000000, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(rorw, x10, x22, x7, 0x0000000000000000, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(rorw, x11, x21, x6, 0x0000000000000000, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(rorw, x12, x20, x5, 0x0000000000000000, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(rorw, x13, x19, x4, 0x0000000000000000, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffffffffe), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rorw, x14, x18, x3, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffffffffd), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(rorw, x15, x17, x2, 0xfffffffffffffffd, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xfffffffffffffffb), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(rorw, x16, x16, x1, 0xfffffffffffffffb, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xfffffffffffffff7), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(rorw, x17, x15, x31, 0xfffffffffffffff7, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffef), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(rorw, x18, x14, x30, 0xffffffffffffffef, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffdf), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(rorw, x19, x13, x29, 0xffffffffffffffdf, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffbf), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(rorw, x20, x12, x28, 0xffffffffffffffbf, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffff7f), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(rorw, x21, x11, x27, 0xffffffffffffff7f, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffffeff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(rorw, x22, x10, x26, 0xfffffffffffffeff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffffdff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(rorw, x23, x9, x25, 0xfffffffffffffdff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xfffffffffffffbff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(rorw, x24, x8, x24, 0xfffffffffffffbff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xfffffffffffff7ff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(rorw, x25, x7, x23, 0xfffffffffffff7ff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffefff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(rorw, x26, x6, x22, 0xffffffffffffefff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffdfff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(rorw, x27, x5, x21, 0xffffffffffffdfff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffbfff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(rorw, x28, x4, x20, 0xffffffffffffbfff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffff7fff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(rorw, x29, x3, x19, 0xffffffffffff7fff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffeffff), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(rorw, x30, x2, x18, 0xfffffffffffeffff, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffdffff), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(rorw, x31, x1, x17, 0xfffffffffffdffff, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xfffffffffffbffff), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(rorw, x1, x31, x16, 0xfffffffffffbffff, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xfffffffffff7ffff), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(rorw, x2, x30, x15, 0xfffffffffff7ffff, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffefffff), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(rorw, x3, x29, x14, 0xffffffffffefffff, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffdfffff), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(rorw, x4, x28, x13, 0xffffffffffdfffff, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffbfffff), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(rorw, x5, x27, x12, 0xffffffffffbfffff, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xffffffffff7fffff), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(rorw, x6, x26, x11, 0xffffffffff7fffff, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffeffffff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(rorw, x7, x25, x10, 0xfffffffffeffffff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffdffffff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(rorw, x8, x24, x9, 0xfffffffffdffffff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xfffffffffbffffff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(rorw, x9, x23, x8, 0xfffffffffbffffff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xfffffffff7ffffff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(rorw, x10, x22, x7, 0xfffffffff7ffffff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffffffefffffff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(rorw, x11, x21, x6, 0xffffffffefffffff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffffffffdfffffff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(rorw, x12, x20, x5, 0xffffffffdfffffff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffffffffbfffffff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(rorw, x13, x19, x4, 0xffffffffbfffffff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x000000007fffffff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(rorw, x14, x18, x3, 0x000000007fffffff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(rorw, x15, x17, x2, 0xffffffffffffffff, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(rorw, x16, x16, x1, 0xffffffffffffffff, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(rorw, x17, x15, x31, 0xffffffffffffffff, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(rorw, x18, x14, x30, 0xffffffffffffffff, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(rorw, x19, x13, x29, 0xffffffffffffffff, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(rorw, x20, x12, x28, 0xffffffffffffffff, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(rorw, x21, x11, x27, 0xffffffffffffffff, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(rorw, x22, x10, x26, 0xffffffffffffffff, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(rorw, x23, x9, x25, 0xffffffffffffffff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(rorw, x24, x8, x24, 0xffffffffffffffff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(rorw, x25, x7, x23, 0xffffffffffffffff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(rorw, x26, x6, x22, 0xffffffffffffffff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(rorw, x27, x5, x21, 0xffffffffffffffff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(rorw, x28, x4, x20, 0xffffffffffffffff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(rorw, x29, x3, x19, 0xffffffffffffffff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(rorw, x30, x2, x18, 0xffffffffffffffff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(rorw, x31, x1, x17, 0xffffffffffffffff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(rorw, x1, x31, x16, 0xffffffffffffffff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(rorw, x2, x30, x15, 0xffffffffffffffff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(rorw, x3, x29, x14, 0xffffffffffffffff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(rorw, x4, x28, x13, 0xffffffffffffffff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(rorw, x5, x27, x12, 0xffffffffffffffff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(rorw, x6, x26, x11, 0xffffffffffffffff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(rorw, x7, x25, x10, 0xffffffffffffffff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(rorw, x8, x24, x9, 0xffffffffffffffff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(rorw, x9, x23, x8, 0xffffffffffffffff, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(rorw, x10, x22, x7, 0xffffffffffffffff, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(rorw, x11, x21, x6, 0xffffffffffffffff, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(rorw, x12, x20, x5, 0xffffffffffffffff, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(rorw, x13, x19, x4, 0xffffffffffffffff, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(rorw, x14, x18, x3, 0xffffffffffffffff, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(rorw, x15, x17, x2, 0xffffffffffffffff, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(rorw, x16, x16, x1, 0xffffffffffffffff, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000001), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rorw, x17, x15, x31, 0x0000000000000001, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000002), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rorw, x18, x14, x30, 0x0000000000000002, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000004), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rorw, x19, x13, x29, 0x0000000000000004, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000008), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rorw, x20, x12, x28, 0x0000000000000008, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000010), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rorw, x21, x11, x27, 0x0000000000000010, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000020), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rorw, x22, x10, x26, 0x0000000000000020, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000040), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(rorw, x23, x9, x25, 0x0000000000000040, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000080), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(rorw, x24, x8, x24, 0x0000000000000080, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000100), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(rorw, x25, x7, x23, 0x0000000000000100, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000200), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(rorw, x26, x6, x22, 0x0000000000000200, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000400), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(rorw, x27, x5, x21, 0x0000000000000400, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000800), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(rorw, x28, x4, x20, 0x0000000000000800, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000001000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(rorw, x29, x3, x19, 0x0000000000001000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000002000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(rorw, x30, x2, x18, 0x0000000000002000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000004000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(rorw, x31, x1, x17, 0x0000000000004000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000008000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(rorw, x1, x31, x16, 0x0000000000008000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000010000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(rorw, x2, x30, x15, 0x0000000000010000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000020000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(rorw, x3, x29, x14, 0x0000000000020000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000040000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(rorw, x4, x28, x13, 0x0000000000040000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000080000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(rorw, x5, x27, x12, 0x0000000000080000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000100000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(rorw, x6, x26, x11, 0x0000000000100000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000200000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(rorw, x7, x25, x10, 0x0000000000200000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000400000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(rorw, x8, x24, x9, 0x0000000000400000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000800000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(rorw, x9, x23, x8, 0x0000000000800000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000001000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(rorw, x10, x22, x7, 0x0000000001000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000002000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(rorw, x11, x21, x6, 0x0000000002000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000004000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(rorw, x12, x20, x5, 0x0000000004000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000008000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(rorw, x13, x19, x4, 0x0000000008000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000010000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rorw, x14, x18, x3, 0x0000000010000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000020000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(rorw, x15, x17, x2, 0x0000000020000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000040000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(rorw, x16, x16, x1, 0x0000000040000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0xffffffff80000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rorw, x17, x15, x31, 0xffffffff80000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rorw, x18, x14, x30, 0x0000000000000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rorw, x19, x13, x29, 0x0000000000000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rorw, x20, x12, x28, 0x0000000000000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rorw, x21, x11, x27, 0x0000000000000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rorw, x22, x10, x26, 0x0000000000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(rorw, x23, x9, x25, 0x0000000000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(rorw, x24, x8, x24, 0x0000000000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(rorw, x25, x7, x23, 0x0000000000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(rorw, x26, x6, x22, 0x0000000000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(rorw, x27, x5, x21, 0x0000000000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(rorw, x28, x4, x20, 0x0000000000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(rorw, x29, x3, x19, 0x0000000000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(rorw, x30, x2, x18, 0x0000000000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(rorw, x31, x1, x17, 0x0000000000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(rorw, x1, x31, x16, 0x0000000000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(rorw, x2, x30, x15, 0x0000000000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(rorw, x3, x29, x14, 0x0000000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(rorw, x4, x28, x13, 0x0000000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(rorw, x5, x27, x12, 0x0000000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(rorw, x6, x26, x11, 0x0000000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(rorw, x7, x25, x10, 0x0000000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(rorw, x8, x24, x9, 0x0000000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(rorw, x9, x23, x8, 0x0000000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(rorw, x10, x22, x7, 0x0000000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(rorw, x11, x21, x6, 0x0000000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(rorw, x12, x20, x5, 0x0000000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(rorw, x13, x19, x4, 0x0000000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rorw, x14, x18, x3, 0x0000000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(rorw, x15, x17, x2, 0x0000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(rorw, x16, x16, x1, 0x0000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rorw, x17, x15, x31, 0x0000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rorw, x18, x14, x30, 0x0000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rorw, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffffffffe), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rorw, x20, x12, x28, 0xfffffffffffffffe, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xfffffffffffffffd), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rorw, x21, x11, x27, 0xfffffffffffffffd, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffffffb), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rorw, x22, x10, x26, 0xfffffffffffffffb, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xfffffffffffffff7), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(rorw, x23, x9, x25, 0xfffffffffffffff7, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffef), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(rorw, x24, x8, x24, 0xffffffffffffffef, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffdf), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(rorw, x25, x7, x23, 0xffffffffffffffdf, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffbf), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(rorw, x26, x6, x22, 0xffffffffffffffbf, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffff7f), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(rorw, x27, x5, x21, 0xffffffffffffff7f, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffffeff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(rorw, x28, x4, x20, 0xfffffffffffffeff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xfffffffffffffdff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(rorw, x29, x3, x19, 0xfffffffffffffdff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffffffbff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(rorw, x30, x2, x18, 0xfffffffffffffbff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xfffffffffffff7ff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(rorw, x31, x1, x17, 0xfffffffffffff7ff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffefff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(rorw, x1, x31, x16, 0xffffffffffffefff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffdfff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(rorw, x2, x30, x15, 0xffffffffffffdfff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffbfff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(rorw, x3, x29, x14, 0xffffffffffffbfff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffff7fff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(rorw, x4, x28, x13, 0xffffffffffff7fff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffffeffff), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(rorw, x5, x27, x12, 0xfffffffffffeffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffffdffff), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(rorw, x6, x26, x11, 0xfffffffffffdffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xfffffffffffbffff), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(rorw, x7, x25, x10, 0xfffffffffffbffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xfffffffffff7ffff), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(rorw, x8, x24, x9, 0xfffffffffff7ffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffefffff), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(rorw, x9, x23, x8, 0xffffffffffefffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffdfffff), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(rorw, x10, x22, x7, 0xffffffffffdfffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffbfffff), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(rorw, x11, x21, x6, 0xffffffffffbfffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffffffff7fffff), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(rorw, x12, x20, x5, 0xffffffffff7fffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xfffffffffeffffff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(rorw, x13, x19, x4, 0xfffffffffeffffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xfffffffffdffffff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rorw, x14, x18, x3, 0xfffffffffdffffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xfffffffffbffffff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(rorw, x15, x17, x2, 0xfffffffffbffffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xfffffffff7ffffff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(rorw, x16, x16, x1, 0xfffffffff7ffffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffffefffffff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rorw, x17, x15, x31, 0xffffffffefffffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffffdfffffff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rorw, x18, x14, x30, 0xffffffffdfffffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffffbfffffff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rorw, x19, x13, x29, 0xffffffffbfffffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x000000007fffffff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rorw, x20, x12, x28, 0x000000007fffffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rorw, x21, x11, x27, 0xffffffffffffffff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rorw, x22, x10, x26, 0xffffffffffffffff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(rorw, x23, x9, x25, 0xffffffffffffffff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(rorw, x24, x8, x24, 0xffffffffffffffff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(rorw, x25, x7, x23, 0xffffffffffffffff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(rorw, x26, x6, x22, 0xffffffffffffffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(rorw, x27, x5, x21, 0xffffffffffffffff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(rorw, x28, x4, x20, 0xffffffffffffffff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(rorw, x29, x3, x19, 0xffffffffffffffff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(rorw, x30, x2, x18, 0xffffffffffffffff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(rorw, x31, x1, x17, 0xffffffffffffffff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(rorw, x1, x31, x16, 0xffffffffffffffff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(rorw, x2, x30, x15, 0xffffffffffffffff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(rorw, x3, x29, x14, 0xffffffffffffffff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(rorw, x4, x28, x13, 0xffffffffffffffff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(rorw, x5, x27, x12, 0xffffffffffffffff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(rorw, x6, x26, x11, 0xffffffffffffffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(rorw, x7, x25, x10, 0xffffffffffffffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(rorw, x8, x24, x9, 0xffffffffffffffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(rorw, x9, x23, x8, 0xffffffffffffffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(rorw, x10, x22, x7, 0xffffffffffffffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(rorw, x11, x21, x6, 0xffffffffffffffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(rorw, x12, x20, x5, 0xffffffffffffffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(rorw, x13, x19, x4, 0xffffffffffffffff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(rorw, x14, x18, x3, 0xffffffffffffffff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(rorw, x15, x17, x2, 0xffffffffffffffff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(rorw, x16, x16, x1, 0xffffffffffffffff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(rorw, x17, x15, x31, 0xffffffffffffffff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(rorw, x18, x14, x30, 0xffffffffffffffff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(rorw, x19, x13, x29, 0xffffffffffffffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(rorw, x20, x12, x28, 0xffffffffffffffff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(rorw, x21, x11, x27, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(rorw, x22, x10, x26, 0xffffffffffffffff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x0000000062437984), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(rorw, x23, x25, x25, 0x0000000062437984, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(rorw, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xffffffffa8e1a8bb), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(rorw, x25, x7, x0, 0xffffffffa8e1a8bb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(rorw, x26, x0, x22, 0x0000000000000000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SHA256SIG0-01.S b/riscof/suite/rv64i_m/K_unratified/SHA256SIG0-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..563b647087e02ab016af7971d3856998e4656505
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SHA256SIG0-01.S
@@ -0,0 +1,2715 @@
+// RISC-V Architectural Validation Test SHA256SIG0-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha256sig0'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha256sig0)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha256sig0)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x00000000aa83f5eb), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ sha256sig0 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x00000000aa83f5eb)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x00000000764a7c1a), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ sha256sig0 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x00000000764a7c1a)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x0000000008631c7e), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ sha256sig0 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0000000008631c7e)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x00000000f87a72f4), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ sha256sig0 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x00000000f87a72f4)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x00000000c2dc416a), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ sha256sig0 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x00000000c2dc416a)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x00000000d0df8296), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ sha256sig0 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000d0df8296)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x000000006500b0e9), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ sha256sig0 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x000000006500b0e9)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x00000000325fb7a3), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ sha256sig0 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000325fb7a3)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x00000000e7d1b134), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ sha256sig0 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000e7d1b134)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x00000000b76f8a9a), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ sha256sig0 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000b76f8a9a)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000002004000), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ sha256sig0 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000002004000)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000004008000), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ sha256sig0 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000004008000)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000008010000), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ sha256sig0 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000008010000)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000010020001), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ sha256sig0 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000010020001)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000020040002), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ sha256sig0 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000020040002)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000040080004), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ sha256sig0 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000040080004)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000080100008), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ sha256sig0 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000080100008)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000000200011), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ sha256sig0 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000000200011)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000400022), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ sha256sig0 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000000400022)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000000800044), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ sha256sig0 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000000800044)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000001000088), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ sha256sig0 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000001000088)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000002000110), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ sha256sig0 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000002000110)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000004000220), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ sha256sig0 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000004000220)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000008000440), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ sha256sig0 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000008000440)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000010000880), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ sha256sig0 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000010000880)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000020001100), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ sha256sig0 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000020001100)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000040002200), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ sha256sig0 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000040002200)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000080004400), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ sha256sig0 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000080004400)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000008801), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ sha256sig0 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000008801)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000011002), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ sha256sig0 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000011002)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000022004), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ sha256sig0 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000022004)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000044008), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ sha256sig0 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000044008)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000088010), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ sha256sig0 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000088010)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000110020), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ sha256sig0 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000110020)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000000220040), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ sha256sig0 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000000220040)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000000440080), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ sha256sig0 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000440080)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000000880100), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ sha256sig0 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000880100)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000001100200), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ sha256sig0 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000001100200)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000002200400), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ sha256sig0 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000002200400)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000004400800), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ sha256sig0 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000004400800)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000008801000), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ sha256sig0 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000008801000)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000011002000), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ sha256sig0 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000011002000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ sha256sig0 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ sha256sig0 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ sha256sig0 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ sha256sig0 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000000000000)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ sha256sig0 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000000000000)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ sha256sig0 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000000000000)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ sha256sig0 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000000000000)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ sha256sig0 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ sha256sig0 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000000000000)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ sha256sig0 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000000000)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ sha256sig0 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000000)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ sha256sig0 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000000)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ sha256sig0 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ sha256sig0 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000000)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ sha256sig0 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ sha256sig0 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0000000000000000)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ sha256sig0 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0000000000000000)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ sha256sig0 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ sha256sig0 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x0000000000000000)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ sha256sig0 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x0000000000000000)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ sha256sig0 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x0000000000000000)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ sha256sig0 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0000000000000000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ sha256sig0 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ sha256sig0 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0000000000000000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ sha256sig0 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000000)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ sha256sig0 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000000)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ sha256sig0 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000000)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ sha256sig0 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ sha256sig0 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000000)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ sha256sig0 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000000)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ sha256sig0 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000000)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ sha256sig0 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ sha256sig0 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x000000001dffbfff), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ sha256sig0 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x000000001dffbfff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x000000001bff7fff), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ sha256sig0 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x000000001bff7fff)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x0000000017feffff), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ sha256sig0 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x0000000017feffff)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x000000000ffdfffe), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ sha256sig0 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x000000000ffdfffe)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x000000003ffbfffd), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ sha256sig0 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x000000003ffbfffd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x000000005ff7fffb), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ sha256sig0 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x000000005ff7fffb)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x000000009feffff7), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ sha256sig0 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x000000009feffff7)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x000000001fdfffee), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ sha256sig0 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x000000001fdfffee)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x000000001fbfffdd), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ sha256sig0 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x000000001fbfffdd)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x000000001f7fffbb), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ sha256sig0 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x000000001f7fffbb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x000000001effff77), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ sha256sig0 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x000000001effff77)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x000000001dfffeef), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ sha256sig0 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x000000001dfffeef)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x000000001bfffddf), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ sha256sig0 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x000000001bfffddf)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x0000000017fffbbf), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ sha256sig0 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0000000017fffbbf)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x000000000ffff77f), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ sha256sig0 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x000000000ffff77f)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x000000003fffeeff), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ sha256sig0 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x000000003fffeeff)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x000000005fffddff), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ sha256sig0 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x000000005fffddff)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x000000009fffbbff), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ sha256sig0 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x000000009fffbbff)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x000000001fff77fe), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ sha256sig0 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x000000001fff77fe)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x000000001ffeeffd), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ sha256sig0 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x000000001ffeeffd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x000000001ffddffb), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ sha256sig0 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x000000001ffddffb)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x000000001ffbbff7), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ sha256sig0 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x000000001ffbbff7)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x000000001ff77fef), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ sha256sig0 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x000000001ff77fef)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x000000001feeffdf), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ sha256sig0 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x000000001feeffdf)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x000000001fddffbf), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ sha256sig0 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x000000001fddffbf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x000000001fbbff7f), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ sha256sig0 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x000000001fbbff7f)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x000000001f77feff), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ sha256sig0 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x000000001f77feff)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x000000001eeffdff), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ sha256sig0 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x000000001eeffdff)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x000000001ddffbff), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ sha256sig0 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x000000001ddffbff)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x000000001bbff7ff), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ sha256sig0 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x000000001bbff7ff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000177fefff), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ sha256sig0 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00000000177fefff)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x000000000effdfff), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ sha256sig0 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x000000000effdfff)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x000000001fffffff), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ sha256sig0 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x000000001fffffff)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x000000001fffffff), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ sha256sig0 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x000000001fffffff)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x000000001fffffff), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ sha256sig0 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x000000001fffffff), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ sha256sig0 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x000000001fffffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x000000001fffffff), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ sha256sig0 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x000000001fffffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x000000001fffffff), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ sha256sig0 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x000000001fffffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x000000001fffffff), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ sha256sig0 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x000000001fffffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x000000001fffffff), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ sha256sig0 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x000000001fffffff), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ sha256sig0 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x000000001fffffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x000000001fffffff), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ sha256sig0 x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x000000001fffffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x000000001fffffff), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ sha256sig0 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x000000001fffffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x000000001fffffff), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ sha256sig0 x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x000000001fffffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x000000001fffffff), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ sha256sig0 x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x000000001fffffff), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ sha256sig0 x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0x000000001fffffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x000000001fffffff), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ sha256sig0 x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0x000000001fffffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x000000001fffffff), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ sha256sig0 x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0x000000001fffffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x000000001fffffff), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ sha256sig0 x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x000000001fffffff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x000000001fffffff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ sha256sig0 x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x000000001fffffff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ sha256sig0 x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x000000001fffffff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x000000001fffffff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ sha256sig0 x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x000000001fffffff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x000000001fffffff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ sha256sig0 x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x000000001fffffff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x000000001fffffff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ sha256sig0 x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x000000001fffffff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x000000001fffffff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ sha256sig0 x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x000000001fffffff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ sha256sig0 x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x000000001fffffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x000000001fffffff), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ sha256sig0 x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x000000001fffffff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x000000001fffffff), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ sha256sig0 x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x000000001fffffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x000000001fffffff), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ sha256sig0 x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x000000001fffffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x000000001fffffff), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ sha256sig0 x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x000000001fffffff), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ sha256sig0 x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x000000001fffffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x000000001fffffff), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ sha256sig0 x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x000000001fffffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x000000001fffffff), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ sha256sig0 x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x000000001fffffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x000000001fffffff), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ sha256sig0 x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x000000001fffffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x000000001fffffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ sha256sig0 x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000002004000), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ sha256sig0 x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x0000000002004000)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000004008000), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ sha256sig0 x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x0000000004008000)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000008010000), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ sha256sig0 x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x0000000008010000)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000010020001), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ sha256sig0 x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000010020001)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000020040002), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ sha256sig0 x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000020040002)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000040080004), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ sha256sig0 x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000040080004)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000080100008), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ sha256sig0 x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000080100008)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000200011), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ sha256sig0 x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000200011)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000400022), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ sha256sig0 x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000400022)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000800044), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ sha256sig0 x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000800044)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000001000088), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ sha256sig0 x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000001000088)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000002000110), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ sha256sig0 x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000002000110)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000004000220), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ sha256sig0 x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000004000220)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000008000440), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ sha256sig0 x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000008000440)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000010000880), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ sha256sig0 x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x0000000010000880)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000020001100), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ sha256sig0 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x0000000020001100)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000040002200), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ sha256sig0 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x0000000040002200)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000080004400), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ sha256sig0 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0000000080004400)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000008801), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ sha256sig0 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0000000000008801)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000011002), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ sha256sig0 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000000000011002)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000022004), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ sha256sig0 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000022004)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000044008), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ sha256sig0 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000044008)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000088010), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ sha256sig0 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000088010)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000110020), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ sha256sig0 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000110020)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000000220040), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ sha256sig0 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000220040)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000440080), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ sha256sig0 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000000440080)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000000880100), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ sha256sig0 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000000880100)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000001100200), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ sha256sig0 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000001100200)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000002200400), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ sha256sig0 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000002200400)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000004400800), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ sha256sig0 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000004400800)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000008801000), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ sha256sig0 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000008801000)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000011002000), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ sha256sig0 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000011002000)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ sha256sig0 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000000000000)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ sha256sig0 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000000000000)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ sha256sig0 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ sha256sig0 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000000000)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ sha256sig0 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000000)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ sha256sig0 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000000)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ sha256sig0 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000000)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ sha256sig0 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ sha256sig0 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000000000000)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ sha256sig0 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000000000)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ sha256sig0 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000000000)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ sha256sig0 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000000000)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ sha256sig0 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ sha256sig0 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000000000)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ sha256sig0 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000000000)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ sha256sig0 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000000000)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ sha256sig0 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000000000)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ sha256sig0 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ sha256sig0 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000000)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ sha256sig0 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000000)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ sha256sig0 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000000)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ sha256sig0 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ sha256sig0 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ sha256sig0 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ sha256sig0 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000000)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ sha256sig0 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ sha256sig0 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ sha256sig0 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ sha256sig0 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000000000000)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ sha256sig0 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000000000000)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ sha256sig0 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000000000000)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ sha256sig0 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000000000000)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ sha256sig0 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x000000001dffbfff), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ sha256sig0 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x000000001dffbfff)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x000000001bff7fff), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ sha256sig0 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x000000001bff7fff)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x0000000017feffff), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ sha256sig0 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000017feffff)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x000000000ffdfffe), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ sha256sig0 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x000000000ffdfffe)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x000000003ffbfffd), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ sha256sig0 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x000000003ffbfffd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x000000005ff7fffb), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ sha256sig0 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x000000005ff7fffb)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x000000009feffff7), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ sha256sig0 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x000000009feffff7)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x000000001fdfffee), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ sha256sig0 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x000000001fdfffee)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x000000001fbfffdd), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ sha256sig0 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x000000001fbfffdd)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x000000001f7fffbb), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ sha256sig0 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x000000001f7fffbb)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x000000001effff77), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ sha256sig0 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x000000001effff77)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x000000001dfffeef), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ sha256sig0 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x000000001dfffeef)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x000000001bfffddf), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ sha256sig0 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x000000001bfffddf)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x0000000017fffbbf), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ sha256sig0 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0000000017fffbbf)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x000000000ffff77f), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ sha256sig0 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x000000000ffff77f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x000000003fffeeff), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ sha256sig0 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x000000003fffeeff)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x000000005fffddff), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ sha256sig0 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x000000005fffddff)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x000000009fffbbff), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ sha256sig0 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x000000009fffbbff)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x000000001fff77fe), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ sha256sig0 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x000000001fff77fe)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x000000001ffeeffd), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ sha256sig0 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x000000001ffeeffd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x000000001ffddffb), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ sha256sig0 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x000000001ffddffb)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x000000001ffbbff7), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ sha256sig0 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x000000001ffbbff7)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x000000001ff77fef), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ sha256sig0 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x000000001ff77fef)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x000000001feeffdf), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ sha256sig0 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x000000001feeffdf)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x000000001fddffbf), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ sha256sig0 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x000000001fddffbf)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x000000001fbbff7f), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ sha256sig0 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x000000001fbbff7f)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x000000001f77feff), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ sha256sig0 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x000000001f77feff)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x000000001eeffdff), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ sha256sig0 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x000000001eeffdff)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x000000001ddffbff), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ sha256sig0 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x000000001ddffbff)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x000000001bbff7ff), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ sha256sig0 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x000000001bbff7ff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x00000000177fefff), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ sha256sig0 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000177fefff)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x000000000effdfff), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ sha256sig0 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x000000000effdfff)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x000000001fffffff), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ sha256sig0 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x000000001fffffff)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x000000001fffffff), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ sha256sig0 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x000000001fffffff)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x000000001fffffff), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ sha256sig0 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x000000001fffffff), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ sha256sig0 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x000000001fffffff)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x000000001fffffff), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ sha256sig0 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x000000001fffffff)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x000000001fffffff), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ sha256sig0 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x000000001fffffff)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x000000001fffffff), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ sha256sig0 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x000000001fffffff)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x000000001fffffff), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ sha256sig0 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x000000001fffffff), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ sha256sig0 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x000000001fffffff)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x000000001fffffff), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ sha256sig0 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x000000001fffffff)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x000000001fffffff), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ sha256sig0 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x000000001fffffff)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x000000001fffffff), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ sha256sig0 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x000000001fffffff)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x000000001fffffff), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ sha256sig0 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x000000001fffffff), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ sha256sig0 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x000000001fffffff)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x000000001fffffff), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ sha256sig0 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x000000001fffffff)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x000000001fffffff), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ sha256sig0 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x000000001fffffff)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x000000001fffffff), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ sha256sig0 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x000000001fffffff)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x000000001fffffff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ sha256sig0 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x000000001fffffff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ sha256sig0 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x000000001fffffff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x000000001fffffff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ sha256sig0 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x000000001fffffff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x000000001fffffff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ sha256sig0 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x000000001fffffff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x000000001fffffff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ sha256sig0 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x000000001fffffff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x000000001fffffff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ sha256sig0 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x000000001fffffff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ sha256sig0 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x000000001fffffff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x000000001fffffff), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ sha256sig0 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x000000001fffffff)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x000000001fffffff), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ sha256sig0 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x000000001fffffff)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x000000001fffffff), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ sha256sig0 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x000000001fffffff)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x000000001fffffff), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ sha256sig0 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x000000001fffffff), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ sha256sig0 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x000000001fffffff)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x000000001fffffff), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ sha256sig0 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x000000001fffffff)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x000000001fffffff), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ sha256sig0 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x000000001fffffff)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x000000001fffffff), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ sha256sig0 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x000000001fffffff)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x000000001fffffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ sha256sig0 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x000000001fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x00000000aa83f5eb), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ sha256sig0 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000aa83f5eb)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ sha256sig0 x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x0000000008631c7e), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ sha256sig0 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000008631c7e)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ sha256sig0 x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SHA256SIG1-01.S b/riscof/suite/rv64i_m/K_unratified/SHA256SIG1-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..fef028ca7293c506ac054b8389fe75cdf22d7226
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SHA256SIG1-01.S
@@ -0,0 +1,2715 @@
+// RISC-V Architectural Validation Test SHA256SIG1-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha256sig1'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha256sig1)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha256sig1)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x0000000062d319dc), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ sha256sig1 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x0000000062d319dc)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x00000000288c6ccf), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ sha256sig1 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x00000000288c6ccf)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x00000000e1609906), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ sha256sig1 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x00000000e1609906)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x00000000fc0eff1a), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ sha256sig1 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x00000000fc0eff1a)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x00000000037fcc99), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ sha256sig1 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x00000000037fcc99)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x000000004a56e190), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ sha256sig1 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x000000004a56e190)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x0000000082a1ea00), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ sha256sig1 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000082a1ea00)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x000000002724288e), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ sha256sig1 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x000000002724288e)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x000000002a0fb9f5), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ sha256sig1 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x000000002a0fb9f5)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x000000009f916dbd), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ sha256sig1 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x000000009f916dbd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x000000000000a000), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ sha256sig1 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x000000000000a000)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000000014000), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ sha256sig1 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000000014000)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000000028000), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ sha256sig1 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000000028000)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000050000), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ sha256sig1 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000000050000)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x00000000000a0000), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ sha256sig1 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x00000000000a0000)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000000140000), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ sha256sig1 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000000140000)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000000280000), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ sha256sig1 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000000280000)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000000500000), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ sha256sig1 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000000500000)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000a00000), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ sha256sig1 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000000a00000)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000001400000), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ sha256sig1 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000001400000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000002800001), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ sha256sig1 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000002800001)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000005000002), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ sha256sig1 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000005000002)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x000000000a000004), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ sha256sig1 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x000000000a000004)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000014000008), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ sha256sig1 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000014000008)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000028000010), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ sha256sig1 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000028000010)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000050000020), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ sha256sig1 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000050000020)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x00000000a0000040), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ sha256sig1 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x00000000a0000040)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000040000081), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ sha256sig1 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000040000081)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000080000102), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ sha256sig1 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000080000102)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000205), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ sha256sig1 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000000205)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x000000000000040a), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ sha256sig1 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x000000000000040a)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000814), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ sha256sig1 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000000814)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000001028), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ sha256sig1 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000001028)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000002050), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ sha256sig1 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000002050)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x00000000000040a0), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ sha256sig1 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x00000000000040a0)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000000008140), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ sha256sig1 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000008140)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000000010280), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ sha256sig1 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000010280)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000000020500), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ sha256sig1 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000020500)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000000040a00), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ sha256sig1 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000040a00)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000000081400), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ sha256sig1 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000081400)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000000102800), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ sha256sig1 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000102800)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000000205000), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ sha256sig1 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000205000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ sha256sig1 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ sha256sig1 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ sha256sig1 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ sha256sig1 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000000000000)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ sha256sig1 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000000000000)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ sha256sig1 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000000000000)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ sha256sig1 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000000000000)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ sha256sig1 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ sha256sig1 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000000000000)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ sha256sig1 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000000000)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ sha256sig1 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000000)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ sha256sig1 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000000)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ sha256sig1 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ sha256sig1 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000000)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ sha256sig1 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ sha256sig1 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0000000000000000)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ sha256sig1 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0000000000000000)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ sha256sig1 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ sha256sig1 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x0000000000000000)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ sha256sig1 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x0000000000000000)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ sha256sig1 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x0000000000000000)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ sha256sig1 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0000000000000000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ sha256sig1 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ sha256sig1 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0000000000000000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ sha256sig1 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000000)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ sha256sig1 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000000)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ sha256sig1 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000000)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ sha256sig1 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ sha256sig1 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000000)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ sha256sig1 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000000)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ sha256sig1 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000000)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ sha256sig1 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ sha256sig1 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x00000000003f5fff), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ sha256sig1 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x00000000003f5fff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000000003ebfff), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ sha256sig1 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00000000003ebfff)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000000003d7fff), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ sha256sig1 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00000000003d7fff)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000000003affff), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ sha256sig1 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00000000003affff)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x000000000035ffff), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ sha256sig1 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x000000000035ffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000000002bffff), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ sha256sig1 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000002bffff)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x000000000017ffff), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ sha256sig1 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x000000000017ffff)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000000006fffff), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ sha256sig1 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000006fffff)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000000009fffff), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ sha256sig1 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000009fffff)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000017fffff), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ sha256sig1 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000017fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x0000000002bffffe), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ sha256sig1 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000002bffffe)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000053ffffd), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ sha256sig1 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000053ffffd)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x000000000a3ffffb), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ sha256sig1 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x000000000a3ffffb)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000143ffff7), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ sha256sig1 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000143ffff7)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000283fffef), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ sha256sig1 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000283fffef)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000503fffdf), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ sha256sig1 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00000000503fffdf)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000a03fffbf), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ sha256sig1 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00000000a03fffbf)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000403fff7e), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ sha256sig1 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000403fff7e)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000803ffefd), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ sha256sig1 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000000803ffefd)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000003ffdfa), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ sha256sig1 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000003ffdfa)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000003ffbf5), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ sha256sig1 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000000003ffbf5)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000003ff7eb), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ sha256sig1 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000003ff7eb)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000003fefd7), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ sha256sig1 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000003fefd7)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000003fdfaf), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ sha256sig1 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000003fdfaf)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000003fbf5f), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ sha256sig1 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000003fbf5f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000003f7ebf), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ sha256sig1 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000003f7ebf)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000003efd7f), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ sha256sig1 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000003efd7f)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000003dfaff), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ sha256sig1 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000003dfaff)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000003bf5ff), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ sha256sig1 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000003bf5ff)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x000000000037ebff), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ sha256sig1 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x000000000037ebff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000002fd7ff), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ sha256sig1 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00000000002fd7ff)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000000001fafff), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ sha256sig1 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x00000000001fafff)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000003fffff), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ sha256sig1 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x00000000003fffff)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000003fffff), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ sha256sig1 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000003fffff)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x00000000003fffff), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ sha256sig1 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x00000000003fffff), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ sha256sig1 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x00000000003fffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x00000000003fffff), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ sha256sig1 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000003fffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x00000000003fffff), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ sha256sig1 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000003fffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x00000000003fffff), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ sha256sig1 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000003fffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x00000000003fffff), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ sha256sig1 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x00000000003fffff), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ sha256sig1 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000003fffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000000003fffff), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ sha256sig1 x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000003fffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x00000000003fffff), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ sha256sig1 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000003fffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x00000000003fffff), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ sha256sig1 x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000003fffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x00000000003fffff), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ sha256sig1 x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x00000000003fffff), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ sha256sig1 x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0x00000000003fffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x00000000003fffff), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ sha256sig1 x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0x00000000003fffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x00000000003fffff), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ sha256sig1 x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0x00000000003fffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x00000000003fffff), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ sha256sig1 x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x00000000003fffff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x00000000003fffff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ sha256sig1 x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x00000000003fffff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ sha256sig1 x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x00000000003fffff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x00000000003fffff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ sha256sig1 x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x00000000003fffff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x00000000003fffff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ sha256sig1 x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x00000000003fffff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x00000000003fffff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ sha256sig1 x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x00000000003fffff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x00000000003fffff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ sha256sig1 x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x00000000003fffff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ sha256sig1 x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000003fffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x00000000003fffff), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ sha256sig1 x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000003fffff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00000000003fffff), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ sha256sig1 x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000003fffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x00000000003fffff), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ sha256sig1 x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000003fffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x00000000003fffff), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ sha256sig1 x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x00000000003fffff), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ sha256sig1 x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x00000000003fffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x00000000003fffff), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ sha256sig1 x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x00000000003fffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x00000000003fffff), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ sha256sig1 x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x00000000003fffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x00000000003fffff), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ sha256sig1 x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x00000000003fffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x00000000003fffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ sha256sig1 x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x000000000000a000), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ sha256sig1 x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x000000000000a000)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000014000), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ sha256sig1 x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x0000000000014000)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000028000), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ sha256sig1 x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x0000000000028000)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000050000), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ sha256sig1 x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000000050000)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x00000000000a0000), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ sha256sig1 x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000000a0000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000140000), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ sha256sig1 x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000140000)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000280000), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ sha256sig1 x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000280000)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000500000), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ sha256sig1 x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000500000)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000a00000), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ sha256sig1 x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000a00000)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000001400000), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ sha256sig1 x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000001400000)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000002800001), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ sha256sig1 x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000002800001)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000005000002), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ sha256sig1 x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000005000002)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x000000000a000004), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ sha256sig1 x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x000000000a000004)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000014000008), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ sha256sig1 x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000014000008)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000028000010), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ sha256sig1 x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x0000000028000010)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000050000020), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ sha256sig1 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x0000000050000020)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x00000000a0000040), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ sha256sig1 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x00000000a0000040)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000040000081), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ sha256sig1 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0000000040000081)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000080000102), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ sha256sig1 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0000000080000102)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000205), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ sha256sig1 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000000000000205)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x000000000000040a), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ sha256sig1 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x000000000000040a)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000814), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ sha256sig1 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000814)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000001028), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ sha256sig1 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000001028)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000002050), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ sha256sig1 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000002050)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x00000000000040a0), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ sha256sig1 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000000040a0)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000008140), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ sha256sig1 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000000008140)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000000010280), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ sha256sig1 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000000010280)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000000020500), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ sha256sig1 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000000020500)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000000040a00), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ sha256sig1 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000000040a00)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000000081400), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ sha256sig1 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000000081400)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000000102800), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ sha256sig1 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000000102800)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000000205000), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ sha256sig1 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000000205000)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ sha256sig1 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000000000000)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ sha256sig1 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000000000000)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ sha256sig1 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ sha256sig1 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000000000)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ sha256sig1 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000000)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ sha256sig1 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000000)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ sha256sig1 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000000)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ sha256sig1 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ sha256sig1 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000000000000)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ sha256sig1 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000000000)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ sha256sig1 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000000000)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ sha256sig1 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000000000)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ sha256sig1 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ sha256sig1 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000000000)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ sha256sig1 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000000000)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ sha256sig1 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000000000)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ sha256sig1 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000000000)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ sha256sig1 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ sha256sig1 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000000)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ sha256sig1 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000000)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ sha256sig1 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000000)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ sha256sig1 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ sha256sig1 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ sha256sig1 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ sha256sig1 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000000)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ sha256sig1 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ sha256sig1 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ sha256sig1 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ sha256sig1 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000000000000)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ sha256sig1 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000000000000)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ sha256sig1 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000000000000)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ sha256sig1 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000000000000)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ sha256sig1 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x00000000003f5fff), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ sha256sig1 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000003f5fff)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x00000000003ebfff), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ sha256sig1 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000003ebfff)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x00000000003d7fff), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ sha256sig1 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000003d7fff)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x00000000003affff), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ sha256sig1 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000003affff)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x000000000035ffff), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ sha256sig1 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x000000000035ffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x00000000002bffff), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ sha256sig1 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000002bffff)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x000000000017ffff), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ sha256sig1 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x000000000017ffff)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x00000000006fffff), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ sha256sig1 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000006fffff)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x00000000009fffff), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ sha256sig1 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000009fffff)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x00000000017fffff), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ sha256sig1 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x00000000017fffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x0000000002bffffe), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ sha256sig1 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x0000000002bffffe)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x00000000053ffffd), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ sha256sig1 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000053ffffd)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x000000000a3ffffb), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ sha256sig1 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x000000000a3ffffb)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x00000000143ffff7), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ sha256sig1 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000143ffff7)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x00000000283fffef), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ sha256sig1 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x00000000283fffef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x00000000503fffdf), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ sha256sig1 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000503fffdf)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x00000000a03fffbf), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ sha256sig1 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000a03fffbf)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x00000000403fff7e), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ sha256sig1 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000403fff7e)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x00000000803ffefd), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ sha256sig1 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000803ffefd)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x00000000003ffdfa), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ sha256sig1 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000003ffdfa)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x00000000003ffbf5), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ sha256sig1 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000003ffbf5)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x00000000003ff7eb), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ sha256sig1 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000003ff7eb)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x00000000003fefd7), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ sha256sig1 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000003fefd7)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x00000000003fdfaf), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ sha256sig1 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000003fdfaf)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x00000000003fbf5f), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ sha256sig1 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x00000000003fbf5f)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x00000000003f7ebf), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ sha256sig1 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x00000000003f7ebf)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x00000000003efd7f), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ sha256sig1 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00000000003efd7f)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x00000000003dfaff), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ sha256sig1 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00000000003dfaff)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x00000000003bf5ff), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ sha256sig1 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00000000003bf5ff)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x000000000037ebff), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ sha256sig1 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x000000000037ebff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x00000000002fd7ff), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ sha256sig1 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000002fd7ff)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x00000000001fafff), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ sha256sig1 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000001fafff)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x00000000003fffff), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ sha256sig1 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000003fffff)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x00000000003fffff), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ sha256sig1 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000003fffff)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x00000000003fffff), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ sha256sig1 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x00000000003fffff), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ sha256sig1 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000003fffff)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x00000000003fffff), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ sha256sig1 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000003fffff)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x00000000003fffff), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ sha256sig1 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000003fffff)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x00000000003fffff), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ sha256sig1 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000003fffff)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x00000000003fffff), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ sha256sig1 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x00000000003fffff), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ sha256sig1 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00000000003fffff)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x00000000003fffff), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ sha256sig1 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00000000003fffff)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x00000000003fffff), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ sha256sig1 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000003fffff)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x00000000003fffff), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ sha256sig1 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000000003fffff)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x00000000003fffff), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ sha256sig1 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x00000000003fffff), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ sha256sig1 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000000003fffff)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x00000000003fffff), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ sha256sig1 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000003fffff)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x00000000003fffff), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ sha256sig1 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000003fffff)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x00000000003fffff), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ sha256sig1 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000003fffff)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x00000000003fffff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ sha256sig1 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x00000000003fffff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ sha256sig1 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000003fffff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x00000000003fffff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ sha256sig1 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000003fffff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x00000000003fffff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ sha256sig1 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000003fffff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x00000000003fffff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ sha256sig1 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000003fffff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x00000000003fffff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ sha256sig1 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x00000000003fffff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ sha256sig1 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00000000003fffff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x00000000003fffff), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ sha256sig1 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x00000000003fffff)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x00000000003fffff), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ sha256sig1 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x00000000003fffff)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x00000000003fffff), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ sha256sig1 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000003fffff)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x00000000003fffff), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ sha256sig1 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x00000000003fffff), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ sha256sig1 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x00000000003fffff)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x00000000003fffff), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ sha256sig1 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000003fffff)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x00000000003fffff), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ sha256sig1 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000003fffff)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x00000000003fffff), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ sha256sig1 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000003fffff)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x00000000003fffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ sha256sig1 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000003fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x0000000062d319dc), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ sha256sig1 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000062d319dc)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ sha256sig1 x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x00000000e1609906), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ sha256sig1 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000e1609906)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ sha256sig1 x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SHA256SUM0-01.S b/riscof/suite/rv64i_m/K_unratified/SHA256SUM0-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..a6a8c682927c1e7b58713e03a32d379973eb8d39
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SHA256SUM0-01.S
@@ -0,0 +1,2715 @@
+// RISC-V Architectural Validation Test SHA256SUM0-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha256sum0'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha256sum0)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha256sum0)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x000000004e91ad80), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ sha256sum0 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x000000004e91ad80)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x000000007c4a7f06), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ sha256sum0 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x000000007c4a7f06)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x000000002947c380), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ sha256sum0 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x000000002947c380)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x000000000a170c9d), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ sha256sum0 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x000000000a170c9d)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x0000000036b45961), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ sha256sum0 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000000036b45961)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x00000000799aad31), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ sha256sum0 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000799aad31)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x000000004996fda9), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ sha256sum0 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x000000004996fda9)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x0000000061d63ea6), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ sha256sum0 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000061d63ea6)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x000000009f83096f), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ sha256sum0 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x000000009f83096f)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x00000000caaeef9e), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ sha256sum0 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000caaeef9e)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000040080400), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ sha256sum0 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000040080400)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000080100800), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ sha256sum0 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000080100800)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000000201001), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ sha256sum0 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000000201001)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000402002), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ sha256sum0 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000000402002)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000000804004), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ sha256sum0 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000000804004)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000001008008), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ sha256sum0 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000001008008)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000002010010), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ sha256sum0 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000002010010)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000004020020), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ sha256sum0 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000004020020)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000008040040), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ sha256sum0 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000008040040)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000010080080), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ sha256sum0 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000010080080)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000020100100), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ sha256sum0 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000020100100)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000040200200), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ sha256sum0 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000040200200)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000080400400), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ sha256sum0 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000080400400)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000800801), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ sha256sum0 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000800801)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000001001002), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ sha256sum0 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000001001002)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000002002004), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ sha256sum0 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000002002004)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000004004008), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ sha256sum0 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000004004008)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000008008010), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ sha256sum0 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000008008010)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000010010020), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ sha256sum0 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000010010020)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000020020040), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ sha256sum0 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000020020040)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000040040080), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ sha256sum0 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000040040080)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000080080100), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ sha256sum0 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000080080100)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000100201), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ sha256sum0 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000100201)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000200402), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ sha256sum0 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000200402)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000000400804), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ sha256sum0 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000000400804)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000000801008), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ sha256sum0 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000801008)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000001002010), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ sha256sum0 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000001002010)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000002004020), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ sha256sum0 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000002004020)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000004008040), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ sha256sum0 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000004008040)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000008010080), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ sha256sum0 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000008010080)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000010020100), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ sha256sum0 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000010020100)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000020040200), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ sha256sum0 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000020040200)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ sha256sum0 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ sha256sum0 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ sha256sum0 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ sha256sum0 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000000000000)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ sha256sum0 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000000000000)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ sha256sum0 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000000000000)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ sha256sum0 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000000000000)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ sha256sum0 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ sha256sum0 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000000000000)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ sha256sum0 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000000000)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ sha256sum0 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000000)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ sha256sum0 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000000)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ sha256sum0 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ sha256sum0 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000000)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ sha256sum0 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ sha256sum0 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0000000000000000)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ sha256sum0 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0000000000000000)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ sha256sum0 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ sha256sum0 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x0000000000000000)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ sha256sum0 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x0000000000000000)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ sha256sum0 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x0000000000000000)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ sha256sum0 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0000000000000000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ sha256sum0 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ sha256sum0 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0000000000000000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ sha256sum0 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000000)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ sha256sum0 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000000)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ sha256sum0 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000000)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ sha256sum0 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ sha256sum0 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000000)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ sha256sum0 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000000)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ sha256sum0 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000000)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ sha256sum0 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ sha256sum0 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x00000000bff7fbff), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ sha256sum0 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x00000000bff7fbff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x000000007feff7ff), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ sha256sum0 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x000000007feff7ff)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffdfeffe), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ sha256sum0 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00000000ffdfeffe)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000000ffbfdffd), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ sha256sum0 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00000000ffbfdffd)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000000ff7fbffb), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ sha256sum0 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00000000ff7fbffb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000000feff7ff7), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ sha256sum0 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000feff7ff7)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000000fdfeffef), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ sha256sum0 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000fdfeffef)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000000fbfdffdf), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ sha256sum0 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000fbfdffdf)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000000f7fbffbf), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ sha256sum0 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000f7fbffbf)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000eff7ff7f), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ sha256sum0 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000eff7ff7f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000dfeffeff), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ sha256sum0 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000dfeffeff)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000bfdffdff), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ sha256sum0 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000bfdffdff)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x000000007fbffbff), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ sha256sum0 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x000000007fbffbff)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000ff7ff7fe), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ sha256sum0 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000ff7ff7fe)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000feffeffd), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ sha256sum0 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000feffeffd)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000fdffdffb), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ sha256sum0 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00000000fdffdffb)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000fbffbff7), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ sha256sum0 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00000000fbffbff7)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000f7ff7fef), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ sha256sum0 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000f7ff7fef)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000effeffdf), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ sha256sum0 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000000effeffdf)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000dffdffbf), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ sha256sum0 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000dffdffbf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000bffbff7f), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ sha256sum0 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000000bffbff7f)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x000000007ff7feff), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ sha256sum0 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x000000007ff7feff)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffeffdfe), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ sha256sum0 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000ffeffdfe)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000ffdffbfd), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ sha256sum0 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000ffdffbfd)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000ffbff7fb), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ sha256sum0 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000ffbff7fb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000ff7feff7), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ sha256sum0 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000ff7feff7)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000feffdfef), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ sha256sum0 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000feffdfef)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000fdffbfdf), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ sha256sum0 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000fdffbfdf)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000fbff7fbf), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ sha256sum0 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000fbff7fbf)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000f7feff7f), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ sha256sum0 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000f7feff7f)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000effdfeff), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ sha256sum0 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00000000effdfeff)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000000dffbfdff), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ sha256sum0 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x00000000dffbfdff)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ sha256sum0 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x00000000ffffffff)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ sha256sum0 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000ffffffff)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x00000000ffffffff), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ sha256sum0 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x00000000ffffffff), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ sha256sum0 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x00000000ffffffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x00000000ffffffff), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ sha256sum0 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000ffffffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x00000000ffffffff), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ sha256sum0 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000ffffffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ sha256sum0 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000ffffffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ sha256sum0 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x00000000ffffffff), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ sha256sum0 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000ffffffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000000ffffffff), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ sha256sum0 x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000ffffffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x00000000ffffffff), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ sha256sum0 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000ffffffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x00000000ffffffff), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ sha256sum0 x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000ffffffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffffff), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ sha256sum0 x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffffff), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ sha256sum0 x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0x00000000ffffffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x00000000ffffffff), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ sha256sum0 x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0x00000000ffffffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x00000000ffffffff), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ sha256sum0 x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0x00000000ffffffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x00000000ffffffff), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ sha256sum0 x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x00000000ffffffff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x00000000ffffffff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ sha256sum0 x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x00000000ffffffff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ sha256sum0 x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x00000000ffffffff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffffffff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ sha256sum0 x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x00000000ffffffff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffffffff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ sha256sum0 x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x00000000ffffffff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffffffff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ sha256sum0 x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x00000000ffffffff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x00000000ffffffff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ sha256sum0 x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x00000000ffffffff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ sha256sum0 x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000ffffffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x00000000ffffffff), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ sha256sum0 x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000ffffffff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00000000ffffffff), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ sha256sum0 x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000ffffffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffffffff), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ sha256sum0 x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000ffffffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffffffff), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ sha256sum0 x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x00000000ffffffff), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ sha256sum0 x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x00000000ffffffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x00000000ffffffff), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ sha256sum0 x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x00000000ffffffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x00000000ffffffff), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ sha256sum0 x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x00000000ffffffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ sha256sum0 x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x00000000ffffffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ sha256sum0 x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000040080400), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ sha256sum0 x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x0000000040080400)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000080100800), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ sha256sum0 x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x0000000080100800)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000201001), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ sha256sum0 x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x0000000000201001)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000402002), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ sha256sum0 x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000000402002)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000804004), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ sha256sum0 x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000804004)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000001008008), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ sha256sum0 x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000001008008)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000002010010), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ sha256sum0 x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000002010010)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000004020020), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ sha256sum0 x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000004020020)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000008040040), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ sha256sum0 x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000008040040)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000010080080), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ sha256sum0 x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000010080080)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000020100100), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ sha256sum0 x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000020100100)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000040200200), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ sha256sum0 x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000040200200)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000080400400), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ sha256sum0 x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000080400400)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000800801), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ sha256sum0 x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000800801)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000001001002), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ sha256sum0 x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x0000000001001002)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000002002004), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ sha256sum0 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x0000000002002004)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000004004008), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ sha256sum0 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x0000000004004008)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000008008010), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ sha256sum0 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0000000008008010)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000010010020), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ sha256sum0 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0000000010010020)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000020020040), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ sha256sum0 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000000020020040)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000040040080), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ sha256sum0 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000040040080)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000080080100), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ sha256sum0 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000080080100)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000100201), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ sha256sum0 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000100201)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000200402), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ sha256sum0 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000200402)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000000400804), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ sha256sum0 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000400804)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000801008), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ sha256sum0 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000000801008)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000001002010), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ sha256sum0 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000001002010)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000002004020), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ sha256sum0 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000002004020)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000004008040), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ sha256sum0 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000004008040)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000008010080), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ sha256sum0 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000008010080)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000010020100), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ sha256sum0 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000010020100)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000020040200), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ sha256sum0 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000020040200)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ sha256sum0 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000000000000)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ sha256sum0 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000000000000)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ sha256sum0 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ sha256sum0 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000000000)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ sha256sum0 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000000)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ sha256sum0 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000000)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ sha256sum0 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000000)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ sha256sum0 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ sha256sum0 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000000000000)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ sha256sum0 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000000000)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ sha256sum0 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000000000)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ sha256sum0 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000000000)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ sha256sum0 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ sha256sum0 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000000000)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ sha256sum0 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000000000)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ sha256sum0 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000000000)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ sha256sum0 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000000000)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ sha256sum0 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ sha256sum0 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000000)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ sha256sum0 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000000)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ sha256sum0 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000000)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ sha256sum0 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ sha256sum0 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ sha256sum0 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ sha256sum0 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000000)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ sha256sum0 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ sha256sum0 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ sha256sum0 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ sha256sum0 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000000000000)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ sha256sum0 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000000000000)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ sha256sum0 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000000000000)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ sha256sum0 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000000000000)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ sha256sum0 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x00000000bff7fbff), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ sha256sum0 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000bff7fbff)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x000000007feff7ff), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ sha256sum0 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x000000007feff7ff)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffdfeffe), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ sha256sum0 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ffdfeffe)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x00000000ffbfdffd), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ sha256sum0 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000ffbfdffd)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x00000000ff7fbffb), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ sha256sum0 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000ff7fbffb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x00000000feff7ff7), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ sha256sum0 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000feff7ff7)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x00000000fdfeffef), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ sha256sum0 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000fdfeffef)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x00000000fbfdffdf), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ sha256sum0 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000fbfdffdf)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x00000000f7fbffbf), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ sha256sum0 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000f7fbffbf)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x00000000eff7ff7f), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ sha256sum0 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x00000000eff7ff7f)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x00000000dfeffeff), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ sha256sum0 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00000000dfeffeff)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x00000000bfdffdff), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ sha256sum0 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000bfdffdff)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x000000007fbffbff), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ sha256sum0 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x000000007fbffbff)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x00000000ff7ff7fe), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ sha256sum0 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000ff7ff7fe)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x00000000feffeffd), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ sha256sum0 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x00000000feffeffd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x00000000fdffdffb), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ sha256sum0 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000fdffdffb)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x00000000fbffbff7), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ sha256sum0 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000fbffbff7)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x00000000f7ff7fef), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ sha256sum0 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000f7ff7fef)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x00000000effeffdf), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ sha256sum0 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000effeffdf)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x00000000dffdffbf), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ sha256sum0 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000dffdffbf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x00000000bffbff7f), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ sha256sum0 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000bffbff7f)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x000000007ff7feff), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ sha256sum0 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x000000007ff7feff)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffeffdfe), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ sha256sum0 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000ffeffdfe)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x00000000ffdffbfd), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ sha256sum0 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000ffdffbfd)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x00000000ffbff7fb), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ sha256sum0 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x00000000ffbff7fb)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x00000000ff7feff7), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ sha256sum0 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x00000000ff7feff7)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x00000000feffdfef), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ sha256sum0 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00000000feffdfef)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x00000000fdffbfdf), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ sha256sum0 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00000000fdffbfdf)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x00000000fbff7fbf), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ sha256sum0 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00000000fbff7fbf)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x00000000f7feff7f), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ sha256sum0 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00000000f7feff7f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x00000000effdfeff), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ sha256sum0 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000effdfeff)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x00000000dffbfdff), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ sha256sum0 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000dffbfdff)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ sha256sum0 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000ffffffff)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ sha256sum0 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ffffffff)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x00000000ffffffff), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ sha256sum0 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x00000000ffffffff), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ sha256sum0 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000ffffffff)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x00000000ffffffff), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ sha256sum0 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000ffffffff)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x00000000ffffffff), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ sha256sum0 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000ffffffff)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffffff), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ sha256sum0 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000ffffffff)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffffff), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ sha256sum0 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x00000000ffffffff), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ sha256sum0 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00000000ffffffff)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x00000000ffffffff), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ sha256sum0 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00000000ffffffff)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x00000000ffffffff), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ sha256sum0 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000ffffffff)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x00000000ffffffff), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ sha256sum0 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000000ffffffff)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x00000000ffffffff), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ sha256sum0 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffffffff), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ sha256sum0 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000000ffffffff)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffffffff), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ sha256sum0 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000ffffffff)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffffffff), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ sha256sum0 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000ffffffff)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x00000000ffffffff), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ sha256sum0 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000ffffffff)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x00000000ffffffff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ sha256sum0 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x00000000ffffffff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ sha256sum0 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000ffffffff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x00000000ffffffff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ sha256sum0 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000ffffffff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffffffff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ sha256sum0 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000ffffffff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffffffff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ sha256sum0 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000ffffffff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x00000000ffffffff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ sha256sum0 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x00000000ffffffff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ sha256sum0 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00000000ffffffff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x00000000ffffffff), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ sha256sum0 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x00000000ffffffff)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ sha256sum0 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x00000000ffffffff)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ sha256sum0 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000ffffffff)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x00000000ffffffff), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ sha256sum0 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x00000000ffffffff), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ sha256sum0 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x00000000ffffffff)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x00000000ffffffff), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ sha256sum0 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000ffffffff)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x00000000ffffffff), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ sha256sum0 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000ffffffff)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ sha256sum0 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000ffffffff)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ sha256sum0 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x000000004e91ad80), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ sha256sum0 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x000000004e91ad80)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ sha256sum0 x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x000000002947c380), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ sha256sum0 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x000000002947c380)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ sha256sum0 x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SHA256SUM1-01.S b/riscof/suite/rv64i_m/K_unratified/SHA256SUM1-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..a578f86c0f5c9974868ab9a1b77aca983603a239
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SHA256SUM1-01.S
@@ -0,0 +1,2714 @@
+// RISC-V Architectural Validation Test SHA256SUM1-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha256sum1'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha256sum0)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha256sum0)
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x00000000912adeda), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ sha256sum1 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x00000000912adeda)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x00000000a0aec1e5), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ sha256sum1 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x00000000a0aec1e5)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x000000008902c743), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ sha256sum1 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x000000008902c743)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x00000000b085dae8), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ sha256sum1 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x00000000b085dae8)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x000000007a599140), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ sha256sum1 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x000000007a599140)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x00000000eda82ea9), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ sha256sum1 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000eda82ea9)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x00000000ba07bd60), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ sha256sum1 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000ba07bd60)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x0000000064b684ad), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ sha256sum1 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000064b684ad)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x000000005b6d5631), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ sha256sum1 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x000000005b6d5631)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x0000000005cc3dc0), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ sha256sum1 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000005cc3dc0)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000004200080), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ sha256sum1 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000004200080)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000008400100), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ sha256sum1 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000008400100)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000010800200), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ sha256sum1 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000010800200)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000021000400), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ sha256sum1 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000021000400)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000042000800), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ sha256sum1 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000042000800)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000084001000), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ sha256sum1 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000084001000)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000008002001), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ sha256sum1 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000008002001)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000010004002), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ sha256sum1 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000010004002)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000020008004), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ sha256sum1 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000020008004)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000040010008), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ sha256sum1 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000040010008)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000080020010), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ sha256sum1 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000080020010)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000000040021), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ sha256sum1 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000040021)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000080042), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ sha256sum1 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000080042)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000100084), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ sha256sum1 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000100084)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000000200108), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ sha256sum1 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000200108)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000400210), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ sha256sum1 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000000400210)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000000800420), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ sha256sum1 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000800420)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000001000840), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ sha256sum1 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000001000840)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000002001080), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ sha256sum1 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000002001080)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000004002100), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ sha256sum1 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000004002100)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000008004200), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ sha256sum1 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000008004200)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000010008400), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ sha256sum1 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000010008400)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000020010800), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ sha256sum1 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000020010800)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000040021000), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ sha256sum1 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000040021000)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000080042000), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ sha256sum1 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000080042000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000000084001), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ sha256sum1 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000084001)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000000108002), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ sha256sum1 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000108002)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000000210004), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ sha256sum1 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000210004)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000000420008), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ sha256sum1 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000420008)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000000840010), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ sha256sum1 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000840010)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000001080020), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ sha256sum1 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000001080020)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000002100040), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ sha256sum1 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000002100040)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ sha256sum1 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ sha256sum1 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ sha256sum1 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ sha256sum1 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000000000000)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ sha256sum1 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000000000000)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ sha256sum1 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000000000000)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ sha256sum1 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000000000000)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ sha256sum1 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ sha256sum1 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000000000000)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ sha256sum1 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000000000)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ sha256sum1 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000000)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ sha256sum1 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000000)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ sha256sum1 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ sha256sum1 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000000)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ sha256sum1 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ sha256sum1 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0000000000000000)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ sha256sum1 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0000000000000000)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ sha256sum1 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ sha256sum1 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x0000000000000000)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ sha256sum1 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x0000000000000000)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ sha256sum1 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x0000000000000000)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ sha256sum1 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0000000000000000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ sha256sum1 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ sha256sum1 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0000000000000000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ sha256sum1 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000000)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ sha256sum1 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000000)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ sha256sum1 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000000)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ sha256sum1 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ sha256sum1 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000000)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ sha256sum1 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000000)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ sha256sum1 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000000)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ sha256sum1 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ sha256sum1 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x00000000fbdfff7f), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ sha256sum1 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x00000000fbdfff7f)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000000f7bffeff), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ sha256sum1 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00000000f7bffeff)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000000ef7ffdff), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ sha256sum1 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00000000ef7ffdff)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000000defffbff), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ sha256sum1 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00000000defffbff)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000000bdfff7ff), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ sha256sum1 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00000000bdfff7ff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x000000007bffefff), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ sha256sum1 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x000000007bffefff)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000000f7ffdffe), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ sha256sum1 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000f7ffdffe)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000000efffbffd), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ sha256sum1 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000efffbffd)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000000dfff7ffb), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ sha256sum1 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000dfff7ffb)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000bffefff7), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ sha256sum1 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000bffefff7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x000000007ffdffef), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ sha256sum1 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x000000007ffdffef)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000fffbffde), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ sha256sum1 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000fffbffde)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000fff7ffbd), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ sha256sum1 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000fff7ffbd)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffefff7b), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ sha256sum1 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000ffefff7b)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffdffef7), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ sha256sum1 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000ffdffef7)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000ffbffdef), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ sha256sum1 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00000000ffbffdef)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000ff7ffbdf), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ sha256sum1 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00000000ff7ffbdf)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000fefff7bf), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ sha256sum1 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000fefff7bf)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000fdffef7f), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ sha256sum1 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000000fdffef7f)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000fbffdeff), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ sha256sum1 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000fbffdeff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000f7ffbdff), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ sha256sum1 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000000f7ffbdff)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000efff7bff), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ sha256sum1 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000efff7bff)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000dffef7ff), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ sha256sum1 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000dffef7ff)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000bffdefff), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ sha256sum1 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000bffdefff)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x000000007ffbdfff), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ sha256sum1 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x000000007ffbdfff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000fff7bffe), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ sha256sum1 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000fff7bffe)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000ffef7ffd), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ sha256sum1 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000ffef7ffd)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffdefffb), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ sha256sum1 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000ffdefffb)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffbdfff7), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ sha256sum1 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000ffbdfff7)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000ff7bffef), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ sha256sum1 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000ff7bffef)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000fef7ffdf), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ sha256sum1 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00000000fef7ffdf)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000000fdefffbf), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ sha256sum1 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x00000000fdefffbf)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ sha256sum1 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x00000000ffffffff)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ sha256sum1 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000ffffffff)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x00000000ffffffff), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ sha256sum1 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x00000000ffffffff), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ sha256sum1 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x00000000ffffffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x00000000ffffffff), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ sha256sum1 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000ffffffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x00000000ffffffff), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ sha256sum1 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000ffffffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ sha256sum1 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000ffffffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ sha256sum1 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x00000000ffffffff), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ sha256sum1 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000ffffffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000000ffffffff), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ sha256sum1 x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000ffffffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x00000000ffffffff), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ sha256sum1 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000ffffffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x00000000ffffffff), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ sha256sum1 x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000ffffffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffffff), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ sha256sum1 x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffffff), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ sha256sum1 x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0x00000000ffffffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x00000000ffffffff), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ sha256sum1 x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0x00000000ffffffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x00000000ffffffff), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ sha256sum1 x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0x00000000ffffffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x00000000ffffffff), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ sha256sum1 x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x00000000ffffffff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x00000000ffffffff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ sha256sum1 x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x00000000ffffffff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ sha256sum1 x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x00000000ffffffff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffffffff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ sha256sum1 x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x00000000ffffffff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffffffff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ sha256sum1 x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x00000000ffffffff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffffffff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ sha256sum1 x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x00000000ffffffff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x00000000ffffffff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ sha256sum1 x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x00000000ffffffff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ sha256sum1 x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000ffffffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x00000000ffffffff), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ sha256sum1 x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000ffffffff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00000000ffffffff), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ sha256sum1 x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000ffffffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffffffff), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ sha256sum1 x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000ffffffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffffffff), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ sha256sum1 x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x00000000ffffffff), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ sha256sum1 x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x00000000ffffffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x00000000ffffffff), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ sha256sum1 x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x00000000ffffffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x00000000ffffffff), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ sha256sum1 x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x00000000ffffffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ sha256sum1 x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x00000000ffffffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ sha256sum1 x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000004200080), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ sha256sum1 x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x0000000004200080)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000008400100), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ sha256sum1 x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x0000000008400100)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000010800200), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ sha256sum1 x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x0000000010800200)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000021000400), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ sha256sum1 x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000021000400)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000042000800), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ sha256sum1 x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000042000800)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000084001000), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ sha256sum1 x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000084001000)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000008002001), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ sha256sum1 x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000008002001)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000010004002), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ sha256sum1 x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000010004002)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000020008004), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ sha256sum1 x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000020008004)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000040010008), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ sha256sum1 x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000040010008)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000080020010), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ sha256sum1 x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000080020010)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000040021), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ sha256sum1 x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000040021)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000080042), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ sha256sum1 x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000080042)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000100084), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ sha256sum1 x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000100084)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000200108), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ sha256sum1 x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x0000000000200108)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000400210), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ sha256sum1 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x0000000000400210)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000800420), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ sha256sum1 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x0000000000800420)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000001000840), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ sha256sum1 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0000000001000840)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000002001080), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ sha256sum1 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0000000002001080)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000004002100), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ sha256sum1 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000000004002100)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000008004200), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ sha256sum1 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000008004200)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000010008400), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ sha256sum1 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000010008400)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000020010800), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ sha256sum1 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000020010800)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000040021000), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ sha256sum1 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000040021000)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000080042000), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ sha256sum1 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000080042000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000084001), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ sha256sum1 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000000084001)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000000108002), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ sha256sum1 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000000108002)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000000210004), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ sha256sum1 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000000210004)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000000420008), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ sha256sum1 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000000420008)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000000840010), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ sha256sum1 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000000840010)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000001080020), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ sha256sum1 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000001080020)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000002100040), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ sha256sum1 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000002100040)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ sha256sum1 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000000000000)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ sha256sum1 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000000000000)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ sha256sum1 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ sha256sum1 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000000000)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ sha256sum1 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000000)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ sha256sum1 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000000)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ sha256sum1 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000000)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ sha256sum1 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ sha256sum1 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000000000000)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ sha256sum1 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000000000)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ sha256sum1 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000000000)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ sha256sum1 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000000000)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ sha256sum1 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ sha256sum1 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000000000)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ sha256sum1 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000000000)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ sha256sum1 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000000000)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ sha256sum1 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000000000)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ sha256sum1 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ sha256sum1 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000000)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ sha256sum1 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000000)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ sha256sum1 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000000)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ sha256sum1 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ sha256sum1 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ sha256sum1 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ sha256sum1 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000000)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ sha256sum1 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ sha256sum1 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ sha256sum1 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ sha256sum1 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000000000000)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ sha256sum1 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000000000000)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ sha256sum1 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000000000000)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ sha256sum1 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000000000000)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ sha256sum1 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x00000000fbdfff7f), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ sha256sum1 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000fbdfff7f)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x00000000f7bffeff), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ sha256sum1 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000f7bffeff)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x00000000ef7ffdff), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ sha256sum1 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ef7ffdff)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x00000000defffbff), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ sha256sum1 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000defffbff)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x00000000bdfff7ff), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ sha256sum1 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000bdfff7ff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x000000007bffefff), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ sha256sum1 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x000000007bffefff)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x00000000f7ffdffe), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ sha256sum1 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000f7ffdffe)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x00000000efffbffd), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ sha256sum1 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000efffbffd)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x00000000dfff7ffb), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ sha256sum1 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000dfff7ffb)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x00000000bffefff7), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ sha256sum1 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x00000000bffefff7)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x000000007ffdffef), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ sha256sum1 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x000000007ffdffef)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x00000000fffbffde), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ sha256sum1 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000fffbffde)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x00000000fff7ffbd), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ sha256sum1 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000000fff7ffbd)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x00000000ffefff7b), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ sha256sum1 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000ffefff7b)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffdffef7), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ sha256sum1 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x00000000ffdffef7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffbffdef), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ sha256sum1 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000ffbffdef)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x00000000ff7ffbdf), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ sha256sum1 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000ff7ffbdf)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x00000000fefff7bf), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ sha256sum1 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000fefff7bf)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x00000000fdffef7f), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ sha256sum1 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000fdffef7f)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x00000000fbffdeff), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ sha256sum1 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000fbffdeff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x00000000f7ffbdff), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ sha256sum1 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000f7ffbdff)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x00000000efff7bff), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ sha256sum1 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000efff7bff)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x00000000dffef7ff), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ sha256sum1 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000dffef7ff)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x00000000bffdefff), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ sha256sum1 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000bffdefff)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x000000007ffbdfff), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ sha256sum1 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x000000007ffbdfff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x00000000fff7bffe), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ sha256sum1 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x00000000fff7bffe)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffef7ffd), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ sha256sum1 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00000000ffef7ffd)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffdefffb), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ sha256sum1 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00000000ffdefffb)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x00000000ffbdfff7), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ sha256sum1 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00000000ffbdfff7)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x00000000ff7bffef), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ sha256sum1 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00000000ff7bffef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x00000000fef7ffdf), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ sha256sum1 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000fef7ffdf)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x00000000fdefffbf), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ sha256sum1 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000fdefffbf)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ sha256sum1 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000ffffffff)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ sha256sum1 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ffffffff)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x00000000ffffffff), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ sha256sum1 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x00000000ffffffff), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ sha256sum1 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000ffffffff)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x00000000ffffffff), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ sha256sum1 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000ffffffff)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x00000000ffffffff), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ sha256sum1 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000ffffffff)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffffff), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ sha256sum1 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000ffffffff)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffffff), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ sha256sum1 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x00000000ffffffff), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ sha256sum1 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00000000ffffffff)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x00000000ffffffff), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ sha256sum1 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00000000ffffffff)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x00000000ffffffff), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ sha256sum1 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000ffffffff)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x00000000ffffffff), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ sha256sum1 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000000ffffffff)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x00000000ffffffff), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ sha256sum1 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffffffff), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ sha256sum1 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000000ffffffff)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffffffff), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ sha256sum1 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000ffffffff)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffffffff), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ sha256sum1 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000ffffffff)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x00000000ffffffff), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ sha256sum1 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000ffffffff)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x00000000ffffffff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ sha256sum1 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x00000000ffffffff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ sha256sum1 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000ffffffff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x00000000ffffffff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ sha256sum1 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000ffffffff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffffffff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ sha256sum1 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000ffffffff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffffffff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ sha256sum1 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000ffffffff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x00000000ffffffff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ sha256sum1 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x00000000ffffffff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ sha256sum1 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00000000ffffffff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x00000000ffffffff), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ sha256sum1 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x00000000ffffffff)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ sha256sum1 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x00000000ffffffff)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ sha256sum1 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000ffffffff)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x00000000ffffffff), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ sha256sum1 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x00000000ffffffff), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ sha256sum1 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x00000000ffffffff)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x00000000ffffffff), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ sha256sum1 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000ffffffff)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x00000000ffffffff), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ sha256sum1 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000ffffffff)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ sha256sum1 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000ffffffff)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ sha256sum1 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x00000000912adeda), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ sha256sum1 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000912adeda)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ sha256sum1 x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x000000008902c743), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ sha256sum1 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x000000008902c743)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ sha256sum1 x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SHA512SIG0-01.S b/riscof/suite/rv64i_m/K_unratified/SHA512SIG0-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..20037611bea714ea951285763370246c8a0a9c3a
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SHA512SIG0-01.S
@@ -0,0 +1,2715 @@
+// RISC-V Architectural Validation Test SHA512SIG0-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha512sig0'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha512sig0)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha512sig0)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x1d4f99b0e0031638), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ sha512sig0 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x1d4f99b0e0031638)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x1e53d5944e08dfa3), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ sha512sig0 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x1e53d5944e08dfa3)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x5ee9e223da89f6a4), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ sha512sig0 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x5ee9e223da89f6a4)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x51ff57f70cbd9545), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ sha512sig0 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x51ff57f70cbd9545)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xc760c569e3c48ed1), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ sha512sig0 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xc760c569e3c48ed1)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x05c93a38d5b29666), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ sha512sig0 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x05c93a38d5b29666)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x7a406c9a0def51ed), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ sha512sig0 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x7a406c9a0def51ed)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x80fc20a339adf677), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ sha512sig0 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x80fc20a339adf677)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xa0c82cd17dd20f1d), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ sha512sig0 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xa0c82cd17dd20f1d)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xcdde1d6ac53bca45), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ sha512sig0 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xcdde1d6ac53bca45)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x8100000000000000), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ sha512sig0 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x8100000000000000)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0200000000000001), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ sha512sig0 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0200000000000001)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0400000000000002), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ sha512sig0 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0400000000000002)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0800000000000004), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ sha512sig0 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0800000000000004)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x1000000000000008), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ sha512sig0 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x1000000000000008)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x2000000000000010), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ sha512sig0 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x2000000000000010)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x4000000000000020), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ sha512sig0 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x4000000000000020)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x8000000000000041), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ sha512sig0 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x8000000000000041)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000083), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ sha512sig0 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000000000083)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000106), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ sha512sig0 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000000000106)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x000000000000020c), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ sha512sig0 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x000000000000020c)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000418), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ sha512sig0 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000418)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000830), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ sha512sig0 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000830)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000001060), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ sha512sig0 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000001060)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x00000000000020c0), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ sha512sig0 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000000020c0)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000004180), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ sha512sig0 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000000004180)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000000008300), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ sha512sig0 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000008300)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000000010600), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ sha512sig0 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000010600)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000020c00), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ sha512sig0 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000020c00)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000041800), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ sha512sig0 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000041800)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000083000), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ sha512sig0 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000083000)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000106000), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ sha512sig0 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000106000)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x000000000020c000), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ sha512sig0 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x000000000020c000)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000418000), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ sha512sig0 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000418000)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000000830000), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ sha512sig0 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000000830000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000001060000), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ sha512sig0 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000001060000)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x00000000020c0000), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ sha512sig0 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000020c0000)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000004180000), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ sha512sig0 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000004180000)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000008300000), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ sha512sig0 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000008300000)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000010600000), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ sha512sig0 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000010600000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000020c00000), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ sha512sig0 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000020c00000)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000041800000), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ sha512sig0 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000041800000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000083000000), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ sha512sig0 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000083000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000106000000), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ sha512sig0 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000106000000)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x000000020c000000), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ sha512sig0 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x000000020c000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000418000000), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ sha512sig0 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000418000000)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000830000000), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ sha512sig0 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000830000000)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000001060000000), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ sha512sig0 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000001060000000)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x00000020c0000000), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ sha512sig0 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x00000020c0000000)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000004180000000), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ sha512sig0 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000004180000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000008300000000), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ sha512sig0 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000008300000000)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000010600000000), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ sha512sig0 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000010600000000)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000020c00000000), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ sha512sig0 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000020c00000000)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000041800000000), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ sha512sig0 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000041800000000)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000083000000000), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ sha512sig0 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000083000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000106000000000), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ sha512sig0 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000106000000000)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x000020c000000000), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ sha512sig0 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x000020c000000000)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000418000000000), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ sha512sig0 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0000418000000000)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000830000000000), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ sha512sig0 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0000830000000000)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0001060000000000), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ sha512sig0 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x0001060000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x00020c0000000000), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ sha512sig0 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00020c0000000000)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0004180000000000), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ sha512sig0 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x0004180000000000)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0008300000000000), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ sha512sig0 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x0008300000000000)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0010600000000000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ sha512sig0 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0010600000000000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0020c00000000000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ sha512sig0 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0020c00000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0041800000000000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ sha512sig0 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0041800000000000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0083000000000000), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ sha512sig0 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0083000000000000)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0106000000000000), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ sha512sig0 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0106000000000000)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x020c000000000000), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ sha512sig0 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x020c000000000000)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0418000000000000), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ sha512sig0 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0418000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0830000000000000), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ sha512sig0 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0830000000000000)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x1060000000000000), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ sha512sig0 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x1060000000000000)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x20c0000000000000), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ sha512sig0 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x20c0000000000000)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x4180000000000000), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ sha512sig0 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x4180000000000000)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ sha512sig0 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x80ffffffffffffff), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ sha512sig0 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x80ffffffffffffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x03fffffffffffffe), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ sha512sig0 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x03fffffffffffffe)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x05fffffffffffffd), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ sha512sig0 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x05fffffffffffffd)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x09fffffffffffffb), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ sha512sig0 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x09fffffffffffffb)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x11fffffffffffff7), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ sha512sig0 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x11fffffffffffff7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x21ffffffffffffef), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ sha512sig0 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x21ffffffffffffef)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x41ffffffffffffdf), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ sha512sig0 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x41ffffffffffffdf)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x81ffffffffffffbe), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ sha512sig0 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x81ffffffffffffbe)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x01ffffffffffff7c), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ sha512sig0 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x01ffffffffffff7c)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x01fffffffffffef9), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ sha512sig0 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x01fffffffffffef9)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x01fffffffffffdf3), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ sha512sig0 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x01fffffffffffdf3)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x01fffffffffffbe7), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ sha512sig0 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x01fffffffffffbe7)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x01fffffffffff7cf), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ sha512sig0 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x01fffffffffff7cf)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x01ffffffffffef9f), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ sha512sig0 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x01ffffffffffef9f)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x01ffffffffffdf3f), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ sha512sig0 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x01ffffffffffdf3f)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x01ffffffffffbe7f), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ sha512sig0 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x01ffffffffffbe7f)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x01ffffffffff7cff), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ sha512sig0 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x01ffffffffff7cff)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x01fffffffffef9ff), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ sha512sig0 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x01fffffffffef9ff)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x01fffffffffdf3ff), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ sha512sig0 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x01fffffffffdf3ff)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x01fffffffffbe7ff), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ sha512sig0 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x01fffffffffbe7ff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x01fffffffff7cfff), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ sha512sig0 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x01fffffffff7cfff)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x01ffffffffef9fff), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ sha512sig0 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x01ffffffffef9fff)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x01ffffffffdf3fff), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ sha512sig0 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x01ffffffffdf3fff)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x01ffffffffbe7fff), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ sha512sig0 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x01ffffffffbe7fff)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x01ffffffff7cffff), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ sha512sig0 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x01ffffffff7cffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x01fffffffef9ffff), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ sha512sig0 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x01fffffffef9ffff)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x01fffffffdf3ffff), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ sha512sig0 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x01fffffffdf3ffff)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x01fffffffbe7ffff), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ sha512sig0 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x01fffffffbe7ffff)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x01fffffff7cfffff), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ sha512sig0 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x01fffffff7cfffff)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x01ffffffef9fffff), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ sha512sig0 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x01ffffffef9fffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x01ffffffdf3fffff), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ sha512sig0 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x01ffffffdf3fffff)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x01ffffffbe7fffff), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ sha512sig0 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x01ffffffbe7fffff)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x01ffffff7cffffff), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ sha512sig0 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x01ffffff7cffffff)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x01fffffef9ffffff), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ sha512sig0 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x01fffffef9ffffff)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x01fffffdf3ffffff), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ sha512sig0 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x01fffffdf3ffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x01fffffbe7ffffff), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ sha512sig0 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x01fffffbe7ffffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x01fffff7cfffffff), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ sha512sig0 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x01fffff7cfffffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x01ffffef9fffffff), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ sha512sig0 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x01ffffef9fffffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x01ffffdf3fffffff), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ sha512sig0 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x01ffffdf3fffffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x01ffffbe7fffffff), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ sha512sig0 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x01ffffbe7fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x01ffff7cffffffff), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ sha512sig0 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x01ffff7cffffffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x01fffef9ffffffff), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ sha512sig0 x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x01fffef9ffffffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x01fffdf3ffffffff), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ sha512sig0 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x01fffdf3ffffffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x01fffbe7ffffffff), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ sha512sig0 x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x01fffbe7ffffffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x01fff7cfffffffff), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ sha512sig0 x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x01fff7cfffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x01ffef9fffffffff), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ sha512sig0 x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0x01ffef9fffffffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x01ffdf3fffffffff), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ sha512sig0 x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0x01ffdf3fffffffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x01ffbe7fffffffff), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ sha512sig0 x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0x01ffbe7fffffffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x01ff7cffffffffff), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ sha512sig0 x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x01ff7cffffffffff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x01fef9ffffffffff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ sha512sig0 x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x01fef9ffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x01fdf3ffffffffff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ sha512sig0 x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x01fdf3ffffffffff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x01fbe7ffffffffff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ sha512sig0 x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x01fbe7ffffffffff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x01f7cfffffffffff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ sha512sig0 x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x01f7cfffffffffff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x01ef9fffffffffff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ sha512sig0 x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x01ef9fffffffffff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x01df3fffffffffff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ sha512sig0 x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x01df3fffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x01be7fffffffffff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ sha512sig0 x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x01be7fffffffffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x017cffffffffffff), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ sha512sig0 x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x017cffffffffffff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00f9ffffffffffff), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ sha512sig0 x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00f9ffffffffffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x03f3ffffffffffff), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ sha512sig0 x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x03f3ffffffffffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x05e7ffffffffffff), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ sha512sig0 x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x05e7ffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x09cfffffffffffff), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ sha512sig0 x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x09cfffffffffffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x119fffffffffffff), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ sha512sig0 x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x119fffffffffffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x213fffffffffffff), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ sha512sig0 x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x213fffffffffffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x407fffffffffffff), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ sha512sig0 x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x407fffffffffffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x01ffffffffffffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ sha512sig0 x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0x01ffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x8100000000000000), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ sha512sig0 x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x8100000000000000)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0200000000000001), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ sha512sig0 x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x0200000000000001)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0400000000000002), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ sha512sig0 x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x0400000000000002)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0800000000000004), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ sha512sig0 x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0800000000000004)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x1000000000000008), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ sha512sig0 x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x1000000000000008)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x2000000000000010), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ sha512sig0 x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x2000000000000010)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x4000000000000020), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ sha512sig0 x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x4000000000000020)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x8000000000000041), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ sha512sig0 x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x8000000000000041)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000083), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ sha512sig0 x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000083)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000106), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ sha512sig0 x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000106)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x000000000000020c), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ sha512sig0 x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x000000000000020c)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000418), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ sha512sig0 x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000000418)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000830), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ sha512sig0 x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000000830)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000001060), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ sha512sig0 x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000001060)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x00000000000020c0), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ sha512sig0 x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x00000000000020c0)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000004180), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ sha512sig0 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x0000000000004180)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000008300), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ sha512sig0 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x0000000000008300)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000010600), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ sha512sig0 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0000000000010600)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000020c00), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ sha512sig0 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0000000000020c00)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000041800), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ sha512sig0 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000000000041800)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000083000), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ sha512sig0 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000083000)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000106000), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ sha512sig0 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000106000)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x000000000020c000), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ sha512sig0 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x000000000020c000)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000418000), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ sha512sig0 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000418000)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000000830000), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ sha512sig0 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000830000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000001060000), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ sha512sig0 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000001060000)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x00000000020c0000), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ sha512sig0 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x00000000020c0000)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000004180000), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ sha512sig0 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000004180000)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000008300000), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ sha512sig0 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000008300000)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000010600000), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ sha512sig0 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000010600000)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000020c00000), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ sha512sig0 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000020c00000)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000041800000), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ sha512sig0 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000041800000)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000083000000), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ sha512sig0 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000083000000)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000106000000), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ sha512sig0 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000106000000)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x000000020c000000), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ sha512sig0 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x000000020c000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000418000000), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ sha512sig0 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000418000000)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000830000000), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ sha512sig0 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000830000000)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000001060000000), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ sha512sig0 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000001060000000)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x00000020c0000000), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ sha512sig0 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000020c0000000)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000004180000000), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ sha512sig0 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000004180000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000008300000000), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ sha512sig0 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000008300000000)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000010600000000), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ sha512sig0 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000010600000000)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000020c00000000), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ sha512sig0 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000020c00000000)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000041800000000), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ sha512sig0 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000041800000000)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000083000000000), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ sha512sig0 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000083000000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000106000000000), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ sha512sig0 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000106000000000)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x000020c000000000), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ sha512sig0 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x000020c000000000)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000418000000000), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ sha512sig0 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000418000000000)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000830000000000), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ sha512sig0 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000830000000000)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0001060000000000), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ sha512sig0 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0001060000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x00020c0000000000), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ sha512sig0 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00020c0000000000)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0004180000000000), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ sha512sig0 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0004180000000000)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0008300000000000), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ sha512sig0 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0008300000000000)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0010600000000000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ sha512sig0 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0010600000000000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0020c00000000000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ sha512sig0 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0020c00000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0041800000000000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ sha512sig0 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0041800000000000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0083000000000000), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ sha512sig0 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0083000000000000)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0106000000000000), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ sha512sig0 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0106000000000000)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x020c000000000000), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ sha512sig0 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x020c000000000000)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0418000000000000), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ sha512sig0 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0418000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0830000000000000), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ sha512sig0 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0830000000000000)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x1060000000000000), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ sha512sig0 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x1060000000000000)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x20c0000000000000), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ sha512sig0 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x20c0000000000000)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x4180000000000000), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ sha512sig0 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x4180000000000000)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ sha512sig0 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x80ffffffffffffff), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ sha512sig0 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x80ffffffffffffff)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x03fffffffffffffe), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ sha512sig0 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x03fffffffffffffe)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x05fffffffffffffd), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ sha512sig0 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x05fffffffffffffd)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x09fffffffffffffb), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ sha512sig0 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x09fffffffffffffb)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x11fffffffffffff7), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ sha512sig0 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x11fffffffffffff7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x21ffffffffffffef), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ sha512sig0 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x21ffffffffffffef)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x41ffffffffffffdf), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ sha512sig0 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x41ffffffffffffdf)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x81ffffffffffffbe), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ sha512sig0 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x81ffffffffffffbe)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x01ffffffffffff7c), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ sha512sig0 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x01ffffffffffff7c)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x01fffffffffffef9), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ sha512sig0 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x01fffffffffffef9)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x01fffffffffffdf3), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ sha512sig0 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x01fffffffffffdf3)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x01fffffffffffbe7), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ sha512sig0 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x01fffffffffffbe7)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x01fffffffffff7cf), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ sha512sig0 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x01fffffffffff7cf)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x01ffffffffffef9f), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ sha512sig0 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x01ffffffffffef9f)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x01ffffffffffdf3f), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ sha512sig0 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x01ffffffffffdf3f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x01ffffffffffbe7f), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ sha512sig0 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x01ffffffffffbe7f)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x01ffffffffff7cff), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ sha512sig0 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x01ffffffffff7cff)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x01fffffffffef9ff), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ sha512sig0 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x01fffffffffef9ff)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x01fffffffffdf3ff), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ sha512sig0 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x01fffffffffdf3ff)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x01fffffffffbe7ff), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ sha512sig0 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x01fffffffffbe7ff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x01fffffffff7cfff), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ sha512sig0 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x01fffffffff7cfff)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x01ffffffffef9fff), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ sha512sig0 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x01ffffffffef9fff)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x01ffffffffdf3fff), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ sha512sig0 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x01ffffffffdf3fff)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x01ffffffffbe7fff), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ sha512sig0 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x01ffffffffbe7fff)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x01ffffffff7cffff), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ sha512sig0 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x01ffffffff7cffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x01fffffffef9ffff), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ sha512sig0 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x01fffffffef9ffff)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x01fffffffdf3ffff), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ sha512sig0 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x01fffffffdf3ffff)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x01fffffffbe7ffff), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ sha512sig0 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x01fffffffbe7ffff)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x01fffffff7cfffff), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ sha512sig0 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x01fffffff7cfffff)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x01ffffffef9fffff), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ sha512sig0 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x01ffffffef9fffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x01ffffffdf3fffff), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ sha512sig0 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x01ffffffdf3fffff)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x01ffffffbe7fffff), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ sha512sig0 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x01ffffffbe7fffff)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x01ffffff7cffffff), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ sha512sig0 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x01ffffff7cffffff)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x01fffffef9ffffff), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ sha512sig0 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x01fffffef9ffffff)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x01fffffdf3ffffff), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ sha512sig0 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x01fffffdf3ffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x01fffffbe7ffffff), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ sha512sig0 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x01fffffbe7ffffff)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x01fffff7cfffffff), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ sha512sig0 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x01fffff7cfffffff)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x01ffffef9fffffff), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ sha512sig0 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x01ffffef9fffffff)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x01ffffdf3fffffff), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ sha512sig0 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x01ffffdf3fffffff)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x01ffffbe7fffffff), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ sha512sig0 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x01ffffbe7fffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x01ffff7cffffffff), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ sha512sig0 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x01ffff7cffffffff)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x01fffef9ffffffff), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ sha512sig0 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x01fffef9ffffffff)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x01fffdf3ffffffff), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ sha512sig0 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x01fffdf3ffffffff)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x01fffbe7ffffffff), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ sha512sig0 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x01fffbe7ffffffff)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x01fff7cfffffffff), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ sha512sig0 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x01fff7cfffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x01ffef9fffffffff), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ sha512sig0 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x01ffef9fffffffff)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x01ffdf3fffffffff), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ sha512sig0 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x01ffdf3fffffffff)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x01ffbe7fffffffff), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ sha512sig0 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x01ffbe7fffffffff)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x01ff7cffffffffff), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ sha512sig0 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x01ff7cffffffffff)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x01fef9ffffffffff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ sha512sig0 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x01fef9ffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x01fdf3ffffffffff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ sha512sig0 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x01fdf3ffffffffff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x01fbe7ffffffffff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ sha512sig0 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x01fbe7ffffffffff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x01f7cfffffffffff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ sha512sig0 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x01f7cfffffffffff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x01ef9fffffffffff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ sha512sig0 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x01ef9fffffffffff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x01df3fffffffffff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ sha512sig0 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x01df3fffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x01be7fffffffffff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ sha512sig0 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x01be7fffffffffff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x017cffffffffffff), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ sha512sig0 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x017cffffffffffff)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x00f9ffffffffffff), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ sha512sig0 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x00f9ffffffffffff)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x03f3ffffffffffff), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ sha512sig0 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x03f3ffffffffffff)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x05e7ffffffffffff), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ sha512sig0 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x05e7ffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x09cfffffffffffff), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ sha512sig0 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x09cfffffffffffff)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x119fffffffffffff), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ sha512sig0 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x119fffffffffffff)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x213fffffffffffff), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ sha512sig0 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x213fffffffffffff)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x407fffffffffffff), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ sha512sig0 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x407fffffffffffff)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x01ffffffffffffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ sha512sig0 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x01ffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x1d4f99b0e0031638), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ sha512sig0 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x1d4f99b0e0031638)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ sha512sig0 x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x5ee9e223da89f6a4), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ sha512sig0 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x5ee9e223da89f6a4)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ sha512sig0 x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SHA512SIG1-01.S b/riscof/suite/rv64i_m/K_unratified/SHA512SIG1-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..7f22e93d0f13859c3bb487c0ff62a68377a6738c
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SHA512SIG1-01.S
@@ -0,0 +1,2715 @@
+// RISC-V Architectural Validation Test SHA512SIG1-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha512sig1'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha512sig1)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha512sig1)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xcd98b9857e589053), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ sha512sig1 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0xcd98b9857e589053)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x1c6675c0372a52a9), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ sha512sig1 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x1c6675c0372a52a9)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x7d16137dc24e7660), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ sha512sig1 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x7d16137dc24e7660)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x99252ace024cd13f), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ sha512sig1 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x99252ace024cd13f)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x2f19510b791aeff2), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ sha512sig1 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x2f19510b791aeff2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xe01c3416a4d02769), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ sha512sig1 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xe01c3416a4d02769)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xe3ffb46d7aa32dc7), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ sha512sig1 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xe3ffb46d7aa32dc7)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x4be06a74b09993c0), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ sha512sig1 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x4be06a74b09993c0)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x0cb068b0fffa2211), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ sha512sig1 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0cb068b0fffa2211)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x8100452e679e8c6d), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ sha512sig1 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x8100452e679e8c6d)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000200000000008), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ sha512sig1 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000200000000008)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000400000000010), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ sha512sig1 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000400000000010)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000800000000020), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ sha512sig1 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000800000000020)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0001000000000040), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ sha512sig1 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0001000000000040)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0002000000000080), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ sha512sig1 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0002000000000080)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0004000000000100), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ sha512sig1 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0004000000000100)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0008000000000201), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ sha512sig1 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0008000000000201)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0010000000000402), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ sha512sig1 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0010000000000402)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0020000000000804), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ sha512sig1 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0020000000000804)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0040000000001008), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ sha512sig1 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0040000000001008)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0080000000002010), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ sha512sig1 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0080000000002010)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0100000000004020), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ sha512sig1 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0100000000004020)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0200000000008040), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ sha512sig1 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0200000000008040)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0400000000010080), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ sha512sig1 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0400000000010080)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0800000000020100), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ sha512sig1 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0800000000020100)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x1000000000040200), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ sha512sig1 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x1000000000040200)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x2000000000080400), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ sha512sig1 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x2000000000080400)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x4000000000100800), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ sha512sig1 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x4000000000100800)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x8000000000201000), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ sha512sig1 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x8000000000201000)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000402001), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ sha512sig1 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000402001)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000804002), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ sha512sig1 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000804002)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000001008004), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ sha512sig1 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000001008004)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000002010008), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ sha512sig1 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000002010008)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000004020010), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ sha512sig1 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000004020010)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000008040020), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ sha512sig1 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000008040020)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000010080040), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ sha512sig1 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000010080040)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000020100080), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ sha512sig1 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000020100080)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000040200100), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ sha512sig1 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000040200100)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000080400200), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ sha512sig1 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000080400200)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000100800400), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ sha512sig1 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000100800400)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000201000800), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ sha512sig1 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000201000800)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000402001000), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ sha512sig1 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000402001000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000804002000), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ sha512sig1 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000804002000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000001008004000), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ sha512sig1 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000001008004000)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000002010008000), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ sha512sig1 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000002010008000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000004020010000), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ sha512sig1 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000004020010000)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000008040020000), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ sha512sig1 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000008040020000)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000010080040000), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ sha512sig1 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000010080040000)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000020100080000), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ sha512sig1 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000020100080000)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000040200100000), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ sha512sig1 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000040200100000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000080400200000), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ sha512sig1 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000080400200000)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000100800400000), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ sha512sig1 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000100800400000)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000201000800000), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ sha512sig1 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000201000800000)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000402001000000), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ sha512sig1 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000402001000000)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000804002000000), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ sha512sig1 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000804002000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0001008004000000), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ sha512sig1 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0001008004000000)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0002010008000000), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ sha512sig1 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0002010008000000)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0004020010000000), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ sha512sig1 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0004020010000000)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0008040020000000), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ sha512sig1 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0008040020000000)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0010080040000000), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ sha512sig1 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x0010080040000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0020100080000000), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ sha512sig1 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x0020100080000000)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0040200100000000), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ sha512sig1 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x0040200100000000)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0080400200000000), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ sha512sig1 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x0080400200000000)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0100800400000000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ sha512sig1 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0100800400000000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0201000800000000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ sha512sig1 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0201000800000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0402001000000000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ sha512sig1 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0402001000000000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0804002000000000), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ sha512sig1 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0804002000000000)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x1008004000000000), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ sha512sig1 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x1008004000000000)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x2010008000000000), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ sha512sig1 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x2010008000000000)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x4020010000000000), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ sha512sig1 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x4020010000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x8040020000000000), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ sha512sig1 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x8040020000000000)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0080040000000001), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ sha512sig1 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0080040000000001)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0100080000000002), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ sha512sig1 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0100080000000002)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0200100000000004), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ sha512sig1 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0200100000000004)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ sha512sig1 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x03ffdffffffffff7), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ sha512sig1 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x03ffdffffffffff7)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x03ffbfffffffffef), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ sha512sig1 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x03ffbfffffffffef)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x03ff7fffffffffdf), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ sha512sig1 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x03ff7fffffffffdf)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x03feffffffffffbf), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ sha512sig1 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x03feffffffffffbf)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x03fdffffffffff7f), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ sha512sig1 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x03fdffffffffff7f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x03fbfffffffffeff), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ sha512sig1 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x03fbfffffffffeff)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x03f7fffffffffdfe), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ sha512sig1 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x03f7fffffffffdfe)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x03effffffffffbfd), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ sha512sig1 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x03effffffffffbfd)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x03dffffffffff7fb), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ sha512sig1 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x03dffffffffff7fb)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x03bfffffffffeff7), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ sha512sig1 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x03bfffffffffeff7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x037fffffffffdfef), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ sha512sig1 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x037fffffffffdfef)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x02ffffffffffbfdf), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ sha512sig1 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x02ffffffffffbfdf)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x01ffffffffff7fbf), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ sha512sig1 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x01ffffffffff7fbf)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x07fffffffffeff7f), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ sha512sig1 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x07fffffffffeff7f)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x0bfffffffffdfeff), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ sha512sig1 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0bfffffffffdfeff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x13fffffffffbfdff), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ sha512sig1 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x13fffffffffbfdff)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x23fffffffff7fbff), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ sha512sig1 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x23fffffffff7fbff)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x43ffffffffeff7ff), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ sha512sig1 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x43ffffffffeff7ff)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x83ffffffffdfefff), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ sha512sig1 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x83ffffffffdfefff)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x03ffffffffbfdffe), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ sha512sig1 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x03ffffffffbfdffe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x03ffffffff7fbffd), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ sha512sig1 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x03ffffffff7fbffd)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x03fffffffeff7ffb), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ sha512sig1 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x03fffffffeff7ffb)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x03fffffffdfefff7), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ sha512sig1 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x03fffffffdfefff7)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x03fffffffbfdffef), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ sha512sig1 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x03fffffffbfdffef)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x03fffffff7fbffdf), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ sha512sig1 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x03fffffff7fbffdf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x03ffffffeff7ffbf), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ sha512sig1 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x03ffffffeff7ffbf)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x03ffffffdfefff7f), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ sha512sig1 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x03ffffffdfefff7f)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x03ffffffbfdffeff), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ sha512sig1 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x03ffffffbfdffeff)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x03ffffff7fbffdff), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ sha512sig1 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x03ffffff7fbffdff)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x03fffffeff7ffbff), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ sha512sig1 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x03fffffeff7ffbff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x03fffffdfefff7ff), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ sha512sig1 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x03fffffdfefff7ff)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x03fffffbfdffefff), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ sha512sig1 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x03fffffbfdffefff)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x03fffff7fbffdfff), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ sha512sig1 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x03fffff7fbffdfff)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x03ffffeff7ffbfff), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ sha512sig1 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x03ffffeff7ffbfff)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x03ffffdfefff7fff), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ sha512sig1 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x03ffffdfefff7fff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x03ffffbfdffeffff), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ sha512sig1 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x03ffffbfdffeffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x03ffff7fbffdffff), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ sha512sig1 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x03ffff7fbffdffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x03fffeff7ffbffff), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ sha512sig1 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x03fffeff7ffbffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x03fffdfefff7ffff), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ sha512sig1 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x03fffdfefff7ffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x03fffbfdffefffff), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ sha512sig1 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x03fffbfdffefffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x03fff7fbffdfffff), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ sha512sig1 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x03fff7fbffdfffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x03ffeff7ffbfffff), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ sha512sig1 x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x03ffeff7ffbfffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x03ffdfefff7fffff), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ sha512sig1 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x03ffdfefff7fffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x03ffbfdffeffffff), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ sha512sig1 x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x03ffbfdffeffffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x03ff7fbffdffffff), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ sha512sig1 x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x03ff7fbffdffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x03feff7ffbffffff), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ sha512sig1 x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0x03feff7ffbffffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x03fdfefff7ffffff), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ sha512sig1 x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0x03fdfefff7ffffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x03fbfdffefffffff), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ sha512sig1 x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0x03fbfdffefffffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x03f7fbffdfffffff), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ sha512sig1 x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x03f7fbffdfffffff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x03eff7ffbfffffff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ sha512sig1 x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x03eff7ffbfffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x03dfefff7fffffff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ sha512sig1 x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x03dfefff7fffffff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x03bfdffeffffffff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ sha512sig1 x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x03bfdffeffffffff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x037fbffdffffffff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ sha512sig1 x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x037fbffdffffffff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x02ff7ffbffffffff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ sha512sig1 x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x02ff7ffbffffffff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x01fefff7ffffffff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ sha512sig1 x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x01fefff7ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x07fdffefffffffff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ sha512sig1 x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x07fdffefffffffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x0bfbffdfffffffff), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ sha512sig1 x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0bfbffdfffffffff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x13f7ffbfffffffff), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ sha512sig1 x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x13f7ffbfffffffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x23efff7fffffffff), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ sha512sig1 x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x23efff7fffffffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x43dffeffffffffff), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ sha512sig1 x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x43dffeffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x83bffdffffffffff), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ sha512sig1 x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x83bffdffffffffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x037ffbfffffffffe), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ sha512sig1 x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x037ffbfffffffffe)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x02fff7fffffffffd), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ sha512sig1 x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x02fff7fffffffffd)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x01ffeffffffffffb), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ sha512sig1 x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x01ffeffffffffffb)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x03ffffffffffffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ sha512sig1 x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0x03ffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000200000000008), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ sha512sig1 x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x0000200000000008)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000400000000010), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ sha512sig1 x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x0000400000000010)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000800000000020), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ sha512sig1 x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x0000800000000020)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0001000000000040), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ sha512sig1 x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0001000000000040)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0002000000000080), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ sha512sig1 x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0002000000000080)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0004000000000100), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ sha512sig1 x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0004000000000100)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0008000000000201), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ sha512sig1 x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0008000000000201)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0010000000000402), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ sha512sig1 x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0010000000000402)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0020000000000804), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ sha512sig1 x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0020000000000804)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0040000000001008), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ sha512sig1 x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0040000000001008)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0080000000002010), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ sha512sig1 x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0080000000002010)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0100000000004020), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ sha512sig1 x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0100000000004020)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0200000000008040), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ sha512sig1 x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0200000000008040)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0400000000010080), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ sha512sig1 x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0400000000010080)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0800000000020100), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ sha512sig1 x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x0800000000020100)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x1000000000040200), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ sha512sig1 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x1000000000040200)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x2000000000080400), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ sha512sig1 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x2000000000080400)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x4000000000100800), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ sha512sig1 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x4000000000100800)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x8000000000201000), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ sha512sig1 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x8000000000201000)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000402001), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ sha512sig1 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000000000402001)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000804002), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ sha512sig1 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000804002)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000001008004), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ sha512sig1 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000001008004)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000002010008), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ sha512sig1 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000002010008)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000004020010), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ sha512sig1 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000004020010)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000008040020), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ sha512sig1 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000008040020)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000010080040), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ sha512sig1 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000010080040)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000020100080), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ sha512sig1 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000020100080)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000040200100), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ sha512sig1 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000040200100)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000080400200), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ sha512sig1 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000080400200)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000100800400), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ sha512sig1 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000100800400)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000201000800), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ sha512sig1 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000201000800)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000402001000), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ sha512sig1 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000402001000)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000804002000), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ sha512sig1 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000804002000)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000001008004000), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ sha512sig1 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000001008004000)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000002010008000), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ sha512sig1 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000002010008000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000004020010000), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ sha512sig1 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000004020010000)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000008040020000), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ sha512sig1 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000008040020000)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000010080040000), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ sha512sig1 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000010080040000)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000020100080000), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ sha512sig1 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000020100080000)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000040200100000), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ sha512sig1 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000040200100000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000080400200000), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ sha512sig1 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000080400200000)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000100800400000), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ sha512sig1 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000100800400000)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000201000800000), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ sha512sig1 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000201000800000)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000402001000000), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ sha512sig1 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000402001000000)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000804002000000), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ sha512sig1 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000804002000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0001008004000000), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ sha512sig1 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0001008004000000)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0002010008000000), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ sha512sig1 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0002010008000000)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0004020010000000), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ sha512sig1 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0004020010000000)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0008040020000000), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ sha512sig1 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0008040020000000)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0010080040000000), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ sha512sig1 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0010080040000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0020100080000000), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ sha512sig1 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0020100080000000)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0040200100000000), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ sha512sig1 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0040200100000000)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0080400200000000), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ sha512sig1 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0080400200000000)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0100800400000000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ sha512sig1 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0100800400000000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0201000800000000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ sha512sig1 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0201000800000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0402001000000000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ sha512sig1 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0402001000000000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0804002000000000), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ sha512sig1 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0804002000000000)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x1008004000000000), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ sha512sig1 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x1008004000000000)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x2010008000000000), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ sha512sig1 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x2010008000000000)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x4020010000000000), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ sha512sig1 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x4020010000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x8040020000000000), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ sha512sig1 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x8040020000000000)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0080040000000001), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ sha512sig1 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0080040000000001)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0100080000000002), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ sha512sig1 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0100080000000002)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0200100000000004), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ sha512sig1 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0200100000000004)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ sha512sig1 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x03ffdffffffffff7), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ sha512sig1 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x03ffdffffffffff7)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x03ffbfffffffffef), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ sha512sig1 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x03ffbfffffffffef)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x03ff7fffffffffdf), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ sha512sig1 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x03ff7fffffffffdf)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x03feffffffffffbf), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ sha512sig1 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x03feffffffffffbf)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x03fdffffffffff7f), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ sha512sig1 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x03fdffffffffff7f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x03fbfffffffffeff), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ sha512sig1 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x03fbfffffffffeff)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x03f7fffffffffdfe), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ sha512sig1 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x03f7fffffffffdfe)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x03effffffffffbfd), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ sha512sig1 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x03effffffffffbfd)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x03dffffffffff7fb), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ sha512sig1 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x03dffffffffff7fb)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x03bfffffffffeff7), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ sha512sig1 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x03bfffffffffeff7)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x037fffffffffdfef), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ sha512sig1 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x037fffffffffdfef)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x02ffffffffffbfdf), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ sha512sig1 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x02ffffffffffbfdf)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x01ffffffffff7fbf), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ sha512sig1 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x01ffffffffff7fbf)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x07fffffffffeff7f), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ sha512sig1 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x07fffffffffeff7f)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x0bfffffffffdfeff), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ sha512sig1 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0bfffffffffdfeff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x13fffffffffbfdff), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ sha512sig1 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x13fffffffffbfdff)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x23fffffffff7fbff), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ sha512sig1 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x23fffffffff7fbff)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x43ffffffffeff7ff), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ sha512sig1 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x43ffffffffeff7ff)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x83ffffffffdfefff), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ sha512sig1 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x83ffffffffdfefff)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x03ffffffffbfdffe), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ sha512sig1 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x03ffffffffbfdffe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x03ffffffff7fbffd), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ sha512sig1 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x03ffffffff7fbffd)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x03fffffffeff7ffb), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ sha512sig1 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x03fffffffeff7ffb)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x03fffffffdfefff7), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ sha512sig1 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x03fffffffdfefff7)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x03fffffffbfdffef), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ sha512sig1 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x03fffffffbfdffef)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x03fffffff7fbffdf), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ sha512sig1 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x03fffffff7fbffdf)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x03ffffffeff7ffbf), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ sha512sig1 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x03ffffffeff7ffbf)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x03ffffffdfefff7f), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ sha512sig1 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x03ffffffdfefff7f)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x03ffffffbfdffeff), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ sha512sig1 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x03ffffffbfdffeff)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x03ffffff7fbffdff), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ sha512sig1 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x03ffffff7fbffdff)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x03fffffeff7ffbff), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ sha512sig1 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x03fffffeff7ffbff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x03fffffdfefff7ff), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ sha512sig1 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x03fffffdfefff7ff)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x03fffffbfdffefff), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ sha512sig1 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x03fffffbfdffefff)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x03fffff7fbffdfff), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ sha512sig1 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x03fffff7fbffdfff)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x03ffffeff7ffbfff), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ sha512sig1 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x03ffffeff7ffbfff)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x03ffffdfefff7fff), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ sha512sig1 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x03ffffdfefff7fff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x03ffffbfdffeffff), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ sha512sig1 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x03ffffbfdffeffff)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x03ffff7fbffdffff), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ sha512sig1 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x03ffff7fbffdffff)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x03fffeff7ffbffff), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ sha512sig1 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x03fffeff7ffbffff)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x03fffdfefff7ffff), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ sha512sig1 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x03fffdfefff7ffff)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x03fffbfdffefffff), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ sha512sig1 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x03fffbfdffefffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x03fff7fbffdfffff), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ sha512sig1 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x03fff7fbffdfffff)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x03ffeff7ffbfffff), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ sha512sig1 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x03ffeff7ffbfffff)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x03ffdfefff7fffff), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ sha512sig1 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x03ffdfefff7fffff)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x03ffbfdffeffffff), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ sha512sig1 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x03ffbfdffeffffff)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x03ff7fbffdffffff), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ sha512sig1 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x03ff7fbffdffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x03feff7ffbffffff), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ sha512sig1 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x03feff7ffbffffff)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x03fdfefff7ffffff), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ sha512sig1 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x03fdfefff7ffffff)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x03fbfdffefffffff), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ sha512sig1 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x03fbfdffefffffff)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x03f7fbffdfffffff), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ sha512sig1 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x03f7fbffdfffffff)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x03eff7ffbfffffff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ sha512sig1 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x03eff7ffbfffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x03dfefff7fffffff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ sha512sig1 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x03dfefff7fffffff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x03bfdffeffffffff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ sha512sig1 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x03bfdffeffffffff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x037fbffdffffffff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ sha512sig1 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x037fbffdffffffff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x02ff7ffbffffffff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ sha512sig1 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x02ff7ffbffffffff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x01fefff7ffffffff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ sha512sig1 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x01fefff7ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x07fdffefffffffff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ sha512sig1 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x07fdffefffffffff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x0bfbffdfffffffff), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ sha512sig1 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x0bfbffdfffffffff)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x13f7ffbfffffffff), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ sha512sig1 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x13f7ffbfffffffff)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x23efff7fffffffff), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ sha512sig1 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x23efff7fffffffff)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x43dffeffffffffff), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ sha512sig1 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x43dffeffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x83bffdffffffffff), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ sha512sig1 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x83bffdffffffffff)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x037ffbfffffffffe), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ sha512sig1 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x037ffbfffffffffe)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x02fff7fffffffffd), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ sha512sig1 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x02fff7fffffffffd)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x01ffeffffffffffb), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ sha512sig1 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x01ffeffffffffffb)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x03ffffffffffffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ sha512sig1 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x03ffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0xcd98b9857e589053), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ sha512sig1 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xcd98b9857e589053)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ sha512sig1 x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x7d16137dc24e7660), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ sha512sig1 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x7d16137dc24e7660)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ sha512sig1 x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SHA512SUM0-01.S b/riscof/suite/rv64i_m/K_unratified/SHA512SUM0-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..8126d4708e145701e688ce4a22e1752aba523240
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SHA512SUM0-01.S
@@ -0,0 +1,2715 @@
+// RISC-V Architectural Validation Test SHA512SUM0-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha512sum0'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha512sum0)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha512sum0)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x6e84599761cd6bda), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ sha512sum0 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x6e84599761cd6bda)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x5ee1fcd63ea5cbac), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ sha512sum0 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x5ee1fcd63ea5cbac)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xef7322c313821ea5), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ sha512sum0 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xef7322c313821ea5)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xae3a087e0f285990), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ sha512sum0 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xae3a087e0f285990)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xf0de4ac6502da15a), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ sha512sum0 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xf0de4ac6502da15a)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x94a69affcd02f0cc), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ sha512sum0 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x94a69affcd02f0cc)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x881a7530609fe4e4), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ sha512sum0 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x881a7530609fe4e4)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x2551655d8edf3600), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ sha512sum0 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x2551655d8edf3600)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xdb86bb89105b77c4), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ sha512sum0 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xdb86bb89105b77c4)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xad1e06ad4792b420), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ sha512sum0 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xad1e06ad4792b420)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000001042000000), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ sha512sum0 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000001042000000)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000002084000000), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ sha512sum0 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000002084000000)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000004108000000), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ sha512sum0 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000004108000000)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000008210000000), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ sha512sum0 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000008210000000)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000010420000000), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ sha512sum0 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000010420000000)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000020840000000), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ sha512sum0 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000020840000000)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000041080000000), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ sha512sum0 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000041080000000)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000082100000000), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ sha512sum0 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000082100000000)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000104200000000), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ sha512sum0 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000104200000000)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000208400000000), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ sha512sum0 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000208400000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000410800000000), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ sha512sum0 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000410800000000)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000821000000000), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ sha512sum0 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000821000000000)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0001042000000000), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ sha512sum0 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0001042000000000)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0002084000000000), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ sha512sum0 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0002084000000000)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0004108000000000), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ sha512sum0 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0004108000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0008210000000000), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ sha512sum0 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0008210000000000)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0010420000000000), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ sha512sum0 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0010420000000000)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0020840000000000), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ sha512sum0 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0020840000000000)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0041080000000000), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ sha512sum0 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0041080000000000)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0082100000000000), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ sha512sum0 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0082100000000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0104200000000000), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ sha512sum0 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0104200000000000)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0208400000000000), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ sha512sum0 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0208400000000000)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0410800000000000), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ sha512sum0 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0410800000000000)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0821000000000000), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ sha512sum0 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0821000000000000)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x1042000000000000), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ sha512sum0 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x1042000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x2084000000000000), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ sha512sum0 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x2084000000000000)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x4108000000000000), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ sha512sum0 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x4108000000000000)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x8210000000000000), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ sha512sum0 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x8210000000000000)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0420000000000001), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ sha512sum0 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0420000000000001)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0840000000000002), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ sha512sum0 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0840000000000002)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x1080000000000004), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ sha512sum0 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x1080000000000004)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x2100000000000008), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ sha512sum0 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x2100000000000008)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x4200000000000010), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ sha512sum0 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x4200000000000010)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x8400000000000020), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ sha512sum0 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x8400000000000020)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0800000000000041), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ sha512sum0 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0800000000000041)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x1000000000000082), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ sha512sum0 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x1000000000000082)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x2000000000000104), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ sha512sum0 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x2000000000000104)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x4000000000000208), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ sha512sum0 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x4000000000000208)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x8000000000000410), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ sha512sum0 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x8000000000000410)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000821), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ sha512sum0 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000821)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000001042), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ sha512sum0 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000000001042)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000002084), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ sha512sum0 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000002084)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000004108), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ sha512sum0 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000004108)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000008210), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ sha512sum0 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000008210)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000010420), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ sha512sum0 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000010420)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000020840), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ sha512sum0 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000020840)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000041080), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ sha512sum0 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000041080)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000082100), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ sha512sum0 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0000000000082100)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000104200), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ sha512sum0 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0000000000104200)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000208400), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ sha512sum0 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x0000000000208400)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000410800), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ sha512sum0 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x0000000000410800)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000821000), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ sha512sum0 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x0000000000821000)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000001042000), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ sha512sum0 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x0000000001042000)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000002084000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ sha512sum0 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0000000002084000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000004108000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ sha512sum0 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0000000004108000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000008210000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ sha512sum0 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0000000008210000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000010420000), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ sha512sum0 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000010420000)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000020840000), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ sha512sum0 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000020840000)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000041080000), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ sha512sum0 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000041080000)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000082100000), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ sha512sum0 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000082100000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000104200000), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ sha512sum0 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000104200000)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000208400000), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ sha512sum0 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000208400000)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000410800000), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ sha512sum0 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000410800000)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000821000000), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ sha512sum0 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000821000000)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ sha512sum0 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xffffffefbdffffff), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ sha512sum0 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xffffffefbdffffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xffffffdf7bffffff), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ sha512sum0 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xffffffdf7bffffff)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xffffffbef7ffffff), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ sha512sum0 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xffffffbef7ffffff)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xffffff7defffffff), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ sha512sum0 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0xffffff7defffffff)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xfffffefbdfffffff), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ sha512sum0 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0xfffffefbdfffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xfffffdf7bfffffff), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ sha512sum0 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xfffffdf7bfffffff)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xfffffbef7fffffff), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ sha512sum0 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfffffbef7fffffff)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xfffff7deffffffff), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ sha512sum0 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfffff7deffffffff)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xffffefbdffffffff), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ sha512sum0 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffefbdffffffff)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xffffdf7bffffffff), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ sha512sum0 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffffdf7bffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xffffbef7ffffffff), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ sha512sum0 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xffffbef7ffffffff)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xffff7defffffffff), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ sha512sum0 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xffff7defffffffff)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xfffefbdfffffffff), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ sha512sum0 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfffefbdfffffffff)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xfffdf7bfffffffff), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ sha512sum0 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xfffdf7bfffffffff)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xfffbef7fffffffff), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ sha512sum0 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xfffbef7fffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xfff7deffffffffff), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ sha512sum0 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0xfff7deffffffffff)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xffefbdffffffffff), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ sha512sum0 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xffefbdffffffffff)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xffdf7bffffffffff), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ sha512sum0 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xffdf7bffffffffff)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xffbef7ffffffffff), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ sha512sum0 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xffbef7ffffffffff)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xff7defffffffffff), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ sha512sum0 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xff7defffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xfefbdfffffffffff), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ sha512sum0 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0xfefbdfffffffffff)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xfdf7bfffffffffff), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ sha512sum0 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xfdf7bfffffffffff)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xfbef7fffffffffff), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ sha512sum0 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xfbef7fffffffffff)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xf7deffffffffffff), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ sha512sum0 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xf7deffffffffffff)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xefbdffffffffffff), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ sha512sum0 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xefbdffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xdf7bffffffffffff), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ sha512sum0 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xdf7bffffffffffff)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xbef7ffffffffffff), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ sha512sum0 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xbef7ffffffffffff)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x7defffffffffffff), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ sha512sum0 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x7defffffffffffff)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xfbdffffffffffffe), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ sha512sum0 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfbdffffffffffffe)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xf7bffffffffffffd), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ sha512sum0 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xf7bffffffffffffd)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xef7ffffffffffffb), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ sha512sum0 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0xef7ffffffffffffb)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xdefffffffffffff7), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ sha512sum0 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0xdefffffffffffff7)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xbdffffffffffffef), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ sha512sum0 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0xbdffffffffffffef)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x7bffffffffffffdf), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ sha512sum0 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x7bffffffffffffdf)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xf7ffffffffffffbe), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ sha512sum0 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xf7ffffffffffffbe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xefffffffffffff7d), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ sha512sum0 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xefffffffffffff7d)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xdffffffffffffefb), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ sha512sum0 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xdffffffffffffefb)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xbffffffffffffdf7), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ sha512sum0 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xbffffffffffffdf7)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x7ffffffffffffbef), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ sha512sum0 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x7ffffffffffffbef)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xfffffffffffff7de), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ sha512sum0 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfffffffffffff7de)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffefbd), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ sha512sum0 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffffffffffffefbd)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffdf7b), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ sha512sum0 x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xffffffffffffdf7b)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffbef7), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ sha512sum0 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xffffffffffffbef7)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffff7def), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ sha512sum0 x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffffffffffff7def)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xfffffffffffefbdf), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ sha512sum0 x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xfffffffffffefbdf)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffdf7bf), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ sha512sum0 x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0xfffffffffffdf7bf)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xfffffffffffbef7f), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ sha512sum0 x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0xfffffffffffbef7f)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xfffffffffff7deff), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ sha512sum0 x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0xfffffffffff7deff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffefbdff), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ sha512sum0 x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xffffffffffefbdff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffdf7bff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ sha512sum0 x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xffffffffffdf7bff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffbef7ff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ sha512sum0 x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xffffffffffbef7ff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffffffffff7defff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ sha512sum0 x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xffffffffff7defff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xfffffffffefbdfff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ sha512sum0 x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xfffffffffefbdfff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffdf7bfff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ sha512sum0 x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xfffffffffdf7bfff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xfffffffffbef7fff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ sha512sum0 x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0xfffffffffbef7fff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xfffffffff7deffff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ sha512sum0 x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffffffff7deffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffffffffefbdffff), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ sha512sum0 x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffffffffefbdffff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffffffffdf7bffff), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ sha512sum0 x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xffffffffdf7bffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffffffffbef7ffff), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ sha512sum0 x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffffffbef7ffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xffffffff7defffff), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ sha512sum0 x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xffffffff7defffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xfffffffefbdfffff), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ sha512sum0 x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xfffffffefbdfffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xfffffffdf7bfffff), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ sha512sum0 x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xfffffffdf7bfffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xfffffffbef7fffff), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ sha512sum0 x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xfffffffbef7fffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xfffffff7deffffff), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ sha512sum0 x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xfffffff7deffffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ sha512sum0 x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xffffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000001042000000), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ sha512sum0 x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x0000001042000000)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000002084000000), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ sha512sum0 x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x0000002084000000)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000004108000000), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ sha512sum0 x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x0000004108000000)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000008210000000), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ sha512sum0 x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000008210000000)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000010420000000), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ sha512sum0 x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000010420000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000020840000000), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ sha512sum0 x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000020840000000)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000041080000000), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ sha512sum0 x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000041080000000)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000082100000000), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ sha512sum0 x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000082100000000)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000104200000000), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ sha512sum0 x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000104200000000)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000208400000000), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ sha512sum0 x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000208400000000)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000410800000000), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ sha512sum0 x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000410800000000)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000821000000000), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ sha512sum0 x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000821000000000)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0001042000000000), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ sha512sum0 x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0001042000000000)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0002084000000000), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ sha512sum0 x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0002084000000000)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0004108000000000), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ sha512sum0 x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x0004108000000000)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0008210000000000), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ sha512sum0 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x0008210000000000)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0010420000000000), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ sha512sum0 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x0010420000000000)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0020840000000000), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ sha512sum0 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0020840000000000)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0041080000000000), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ sha512sum0 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0041080000000000)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0082100000000000), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ sha512sum0 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0082100000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0104200000000000), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ sha512sum0 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0104200000000000)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0208400000000000), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ sha512sum0 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0208400000000000)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0410800000000000), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ sha512sum0 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0410800000000000)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0821000000000000), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ sha512sum0 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0821000000000000)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x1042000000000000), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ sha512sum0 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x1042000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x2084000000000000), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ sha512sum0 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x2084000000000000)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x4108000000000000), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ sha512sum0 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x4108000000000000)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x8210000000000000), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ sha512sum0 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x8210000000000000)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0420000000000001), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ sha512sum0 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0420000000000001)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0840000000000002), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ sha512sum0 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0840000000000002)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x1080000000000004), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ sha512sum0 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x1080000000000004)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x2100000000000008), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ sha512sum0 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x2100000000000008)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x4200000000000010), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ sha512sum0 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x4200000000000010)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x8400000000000020), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ sha512sum0 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x8400000000000020)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0800000000000041), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ sha512sum0 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0800000000000041)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x1000000000000082), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ sha512sum0 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x1000000000000082)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x2000000000000104), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ sha512sum0 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x2000000000000104)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x4000000000000208), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ sha512sum0 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x4000000000000208)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x8000000000000410), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ sha512sum0 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x8000000000000410)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000821), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ sha512sum0 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000821)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000001042), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ sha512sum0 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000000001042)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000002084), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ sha512sum0 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000002084)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000004108), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ sha512sum0 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000004108)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000008210), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ sha512sum0 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000008210)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000010420), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ sha512sum0 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000010420)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000020840), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ sha512sum0 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000020840)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000041080), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ sha512sum0 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000041080)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000082100), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ sha512sum0 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000082100)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000104200), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ sha512sum0 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000104200)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000208400), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ sha512sum0 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000000208400)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000410800), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ sha512sum0 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000410800)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000821000), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ sha512sum0 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000821000)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000001042000), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ sha512sum0 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000001042000)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000002084000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ sha512sum0 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000002084000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000004108000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ sha512sum0 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000004108000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000008210000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ sha512sum0 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000008210000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000010420000), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ sha512sum0 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000010420000)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000020840000), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ sha512sum0 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000020840000)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000041080000), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ sha512sum0 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000041080000)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000082100000), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ sha512sum0 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000082100000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000104200000), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ sha512sum0 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000104200000)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000208400000), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ sha512sum0 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000208400000)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000410800000), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ sha512sum0 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000410800000)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000821000000), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ sha512sum0 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000821000000)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ sha512sum0 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xffffffefbdffffff), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ sha512sum0 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffffffefbdffffff)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xffffffdf7bffffff), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ sha512sum0 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xffffffdf7bffffff)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xffffffbef7ffffff), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ sha512sum0 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffffbef7ffffff)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xffffff7defffffff), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ sha512sum0 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffffff7defffffff)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xfffffefbdfffffff), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ sha512sum0 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfffffefbdfffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xfffffdf7bfffffff), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ sha512sum0 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xfffffdf7bfffffff)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xfffffbef7fffffff), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ sha512sum0 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfffffbef7fffffff)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xfffff7deffffffff), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ sha512sum0 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xfffff7deffffffff)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xffffefbdffffffff), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ sha512sum0 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xffffefbdffffffff)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xffffdf7bffffffff), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ sha512sum0 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xffffdf7bffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xffffbef7ffffffff), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ sha512sum0 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xffffbef7ffffffff)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xffff7defffffffff), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ sha512sum0 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xffff7defffffffff)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xfffefbdfffffffff), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ sha512sum0 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xfffefbdfffffffff)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xfffdf7bfffffffff), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ sha512sum0 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xfffdf7bfffffffff)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xfffbef7fffffffff), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ sha512sum0 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xfffbef7fffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xfff7deffffffffff), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ sha512sum0 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xfff7deffffffffff)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xffefbdffffffffff), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ sha512sum0 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xffefbdffffffffff)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xffdf7bffffffffff), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ sha512sum0 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xffdf7bffffffffff)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xffbef7ffffffffff), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ sha512sum0 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffbef7ffffffffff)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xff7defffffffffff), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ sha512sum0 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xff7defffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xfefbdfffffffffff), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ sha512sum0 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfefbdfffffffffff)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xfdf7bfffffffffff), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ sha512sum0 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfdf7bfffffffffff)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xfbef7fffffffffff), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ sha512sum0 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfbef7fffffffffff)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xf7deffffffffffff), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ sha512sum0 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xf7deffffffffffff)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xefbdffffffffffff), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ sha512sum0 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xefbdffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xdf7bffffffffffff), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ sha512sum0 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xdf7bffffffffffff)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xbef7ffffffffffff), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ sha512sum0 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xbef7ffffffffffff)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x7defffffffffffff), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ sha512sum0 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x7defffffffffffff)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xfbdffffffffffffe), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ sha512sum0 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0xfbdffffffffffffe)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xf7bffffffffffffd), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ sha512sum0 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0xf7bffffffffffffd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xef7ffffffffffffb), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ sha512sum0 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xef7ffffffffffffb)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xdefffffffffffff7), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ sha512sum0 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xdefffffffffffff7)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xbdffffffffffffef), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ sha512sum0 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xbdffffffffffffef)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x7bffffffffffffdf), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ sha512sum0 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x7bffffffffffffdf)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xf7ffffffffffffbe), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ sha512sum0 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xf7ffffffffffffbe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xefffffffffffff7d), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ sha512sum0 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xefffffffffffff7d)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xdffffffffffffefb), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ sha512sum0 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xdffffffffffffefb)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xbffffffffffffdf7), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ sha512sum0 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xbffffffffffffdf7)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x7ffffffffffffbef), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ sha512sum0 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x7ffffffffffffbef)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffff7de), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ sha512sum0 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xfffffffffffff7de)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffefbd), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ sha512sum0 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0xffffffffffffefbd)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffdf7b), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ sha512sum0 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xffffffffffffdf7b)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffbef7), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ sha512sum0 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xffffffffffffbef7)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffff7def), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ sha512sum0 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xffffffffffff7def)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xfffffffffffefbdf), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ sha512sum0 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xfffffffffffefbdf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xfffffffffffdf7bf), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ sha512sum0 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0xfffffffffffdf7bf)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xfffffffffffbef7f), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ sha512sum0 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xfffffffffffbef7f)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffff7deff), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ sha512sum0 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xfffffffffff7deff)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffefbdff), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ sha512sum0 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xffffffffffefbdff)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffdf7bff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ sha512sum0 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffffffffffdf7bff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffbef7ff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ sha512sum0 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffffffffffbef7ff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xffffffffff7defff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ sha512sum0 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xffffffffff7defff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xfffffffffefbdfff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ sha512sum0 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfffffffffefbdfff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xfffffffffdf7bfff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ sha512sum0 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfffffffffdf7bfff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xfffffffffbef7fff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ sha512sum0 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xfffffffffbef7fff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xfffffffff7deffff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ sha512sum0 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0xfffffffff7deffff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xffffffffefbdffff), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ sha512sum0 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0xffffffffefbdffff)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xffffffffdf7bffff), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ sha512sum0 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0xffffffffdf7bffff)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xffffffffbef7ffff), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ sha512sum0 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0xffffffffbef7ffff)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xffffffff7defffff), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ sha512sum0 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xffffffff7defffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xfffffffefbdfffff), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ sha512sum0 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xfffffffefbdfffff)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xfffffffdf7bfffff), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ sha512sum0 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xfffffffdf7bfffff)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xfffffffbef7fffff), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ sha512sum0 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfffffffbef7fffff)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xfffffff7deffffff), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ sha512sum0 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfffffff7deffffff)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ sha512sum0 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x6e84599761cd6bda), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ sha512sum0 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x6e84599761cd6bda)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ sha512sum0 x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xef7322c313821ea5), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ sha512sum0 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xef7322c313821ea5)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ sha512sum0 x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SHA512SUM1-01.S b/riscof/suite/rv64i_m/K_unratified/SHA512SUM1-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..464a3b66852248c4b5f1f440a13cf68b5df4a4c7
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SHA512SUM1-01.S
@@ -0,0 +1,2715 @@
+// RISC-V Architectural Validation Test SHA512SUM1-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sha512sum1'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",sha512sum1)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",sha512sum1)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x24e7f2e37245a24d), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ sha512sum1 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x24e7f2e37245a24d)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x65dfe430446d6bef), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ sha512sum1 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x65dfe430446d6bef)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x4a15a71f06337bf1), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ sha512sum1 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x4a15a71f06337bf1)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x94fa7c9b0bbd9180), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ sha512sum1 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x94fa7c9b0bbd9180)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xbd8c8808ab5958d1), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ sha512sum1 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xbd8c8808ab5958d1)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xecbfc1bead6e6b0d), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ sha512sum1 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xecbfc1bead6e6b0d)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xfb8ddfb3151f6a9e), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ sha512sum1 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfb8ddfb3151f6a9e)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x480a161d2ca366cf), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ sha512sum1 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x480a161d2ca366cf)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x082b15559096ee31), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ sha512sum1 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x082b15559096ee31)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0xe18e87c53eeef375), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ sha512sum1 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xe18e87c53eeef375)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0004400000800000), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ sha512sum1 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0004400000800000)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0008800001000000), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ sha512sum1 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0008800001000000)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0011000002000000), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ sha512sum1 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0011000002000000)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0022000004000000), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ sha512sum1 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0022000004000000)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0044000008000000), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ sha512sum1 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0044000008000000)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0088000010000000), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ sha512sum1 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0088000010000000)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0110000020000000), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ sha512sum1 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0110000020000000)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0220000040000000), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ sha512sum1 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0220000040000000)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0440000080000000), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ sha512sum1 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0440000080000000)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0880000100000000), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ sha512sum1 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0880000100000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x1100000200000000), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ sha512sum1 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x1100000200000000)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x2200000400000000), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ sha512sum1 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x2200000400000000)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x4400000800000000), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ sha512sum1 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x4400000800000000)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x8800001000000000), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ sha512sum1 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x8800001000000000)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x1000002000000001), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ sha512sum1 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x1000002000000001)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x2000004000000002), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ sha512sum1 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x2000004000000002)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x4000008000000004), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ sha512sum1 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x4000008000000004)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x8000010000000008), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ sha512sum1 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x8000010000000008)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000020000000011), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ sha512sum1 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000020000000011)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000040000000022), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ sha512sum1 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000040000000022)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000080000000044), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ sha512sum1 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000080000000044)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000100000000088), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ sha512sum1 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000100000000088)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000200000000110), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ sha512sum1 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000200000000110)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000400000000220), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ sha512sum1 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000400000000220)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000800000000440), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ sha512sum1 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000800000000440)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0001000000000880), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ sha512sum1 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0001000000000880)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0002000000001100), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ sha512sum1 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0002000000001100)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0004000000002200), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ sha512sum1 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0004000000002200)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0008000000004400), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ sha512sum1 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0008000000004400)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0010000000008800), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ sha512sum1 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0010000000008800)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0020000000011000), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ sha512sum1 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0020000000011000)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0040000000022000), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ sha512sum1 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0040000000022000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0080000000044000), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ sha512sum1 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0080000000044000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0100000000088000), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ sha512sum1 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0100000000088000)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0200000000110000), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ sha512sum1 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0200000000110000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0400000000220000), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ sha512sum1 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0400000000220000)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0800000000440000), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ sha512sum1 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0800000000440000)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x1000000000880000), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ sha512sum1 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x1000000000880000)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x2000000001100000), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ sha512sum1 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x2000000001100000)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x4000000002200000), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ sha512sum1 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x4000000002200000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x8000000004400000), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ sha512sum1 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x8000000004400000)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000008800001), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ sha512sum1 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000008800001)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000011000002), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ sha512sum1 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000011000002)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000022000004), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ sha512sum1 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000022000004)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000044000008), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ sha512sum1 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000044000008)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000088000010), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ sha512sum1 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000088000010)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000110000020), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ sha512sum1 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000110000020)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000220000040), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ sha512sum1 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0000000220000040)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000440000080), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ sha512sum1 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0000000440000080)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000880000100), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ sha512sum1 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x0000000880000100)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000001100000200), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ sha512sum1 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x0000001100000200)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000002200000400), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ sha512sum1 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x0000002200000400)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000004400000800), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ sha512sum1 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x0000004400000800)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000008800001000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ sha512sum1 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0000008800001000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000011000002000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ sha512sum1 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0000011000002000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000022000004000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ sha512sum1 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0000022000004000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000044000008000), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ sha512sum1 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000044000008000)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000088000010000), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ sha512sum1 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000088000010000)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000110000020000), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ sha512sum1 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000110000020000)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000220000040000), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ sha512sum1 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000220000040000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000440000080000), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ sha512sum1 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000440000080000)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000880000100000), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ sha512sum1 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000880000100000)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0001100000200000), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ sha512sum1 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0001100000200000)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0002200000400000), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ sha512sum1 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0002200000400000)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ sha512sum1 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfffbbfffff7fffff), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ sha512sum1 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xfffbbfffff7fffff)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xfff77ffffeffffff), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ sha512sum1 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xfff77ffffeffffff)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xffeefffffdffffff), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ sha512sum1 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xffeefffffdffffff)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xffddfffffbffffff), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ sha512sum1 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0xffddfffffbffffff)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xffbbfffff7ffffff), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ sha512sum1 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0xffbbfffff7ffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xff77ffffefffffff), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ sha512sum1 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xff77ffffefffffff)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xfeefffffdfffffff), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ sha512sum1 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfeefffffdfffffff)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xfddfffffbfffffff), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ sha512sum1 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfddfffffbfffffff)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xfbbfffff7fffffff), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ sha512sum1 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfbbfffff7fffffff)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xf77ffffeffffffff), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ sha512sum1 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xf77ffffeffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xeefffffdffffffff), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ sha512sum1 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xeefffffdffffffff)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xddfffffbffffffff), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ sha512sum1 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xddfffffbffffffff)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xbbfffff7ffffffff), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ sha512sum1 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xbbfffff7ffffffff)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x77ffffefffffffff), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ sha512sum1 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x77ffffefffffffff)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xefffffdffffffffe), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ sha512sum1 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xefffffdffffffffe)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xdfffffbffffffffd), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ sha512sum1 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0xdfffffbffffffffd)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xbfffff7ffffffffb), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ sha512sum1 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xbfffff7ffffffffb)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x7ffffefffffffff7), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ sha512sum1 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x7ffffefffffffff7)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xfffffdffffffffee), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ sha512sum1 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xfffffdffffffffee)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xfffffbffffffffdd), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ sha512sum1 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xfffffbffffffffdd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xfffff7ffffffffbb), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ sha512sum1 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0xfffff7ffffffffbb)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffffefffffffff77), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ sha512sum1 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xffffefffffffff77)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xffffdffffffffeef), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ sha512sum1 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xffffdffffffffeef)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xffffbffffffffddf), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ sha512sum1 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xffffbffffffffddf)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xffff7ffffffffbbf), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ sha512sum1 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xffff7ffffffffbbf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xfffefffffffff77f), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ sha512sum1 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffefffffffff77f)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xfffdffffffffeeff), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ sha512sum1 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfffdffffffffeeff)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xfffbffffffffddff), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ sha512sum1 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xfffbffffffffddff)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xfff7ffffffffbbff), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ sha512sum1 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xfff7ffffffffbbff)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffefffffffff77ff), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ sha512sum1 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xffefffffffff77ff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffdffffffffeefff), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ sha512sum1 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0xffdffffffffeefff)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xffbffffffffddfff), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ sha512sum1 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0xffbffffffffddfff)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xff7ffffffffbbfff), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ sha512sum1 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0xff7ffffffffbbfff)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xfefffffffff77fff), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ sha512sum1 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0xfefffffffff77fff)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xfdffffffffeeffff), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ sha512sum1 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xfdffffffffeeffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xfbffffffffddffff), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ sha512sum1 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xfbffffffffddffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xf7ffffffffbbffff), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ sha512sum1 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xf7ffffffffbbffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xefffffffff77ffff), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ sha512sum1 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xefffffffff77ffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xdffffffffeefffff), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ sha512sum1 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xdffffffffeefffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xbffffffffddfffff), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ sha512sum1 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xbffffffffddfffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x7ffffffffbbfffff), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ sha512sum1 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x7ffffffffbbfffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xfffffffff77ffffe), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ sha512sum1 x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfffffffff77ffffe)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffffeefffffd), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ sha512sum1 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xffffffffeefffffd)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffffffddfffffb), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ sha512sum1 x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xffffffffddfffffb)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffffffbbfffff7), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ sha512sum1 x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xffffffffbbfffff7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffffff77ffffef), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ sha512sum1 x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0xffffffff77ffffef)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xfffffffeefffffdf), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ sha512sum1 x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0xfffffffeefffffdf)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xfffffffddfffffbf), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ sha512sum1 x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0xfffffffddfffffbf)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xfffffffbbfffff7f), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ sha512sum1 x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0xfffffffbbfffff7f)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xfffffff77ffffeff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ sha512sum1 x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0xfffffff77ffffeff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffffffeefffffdff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ sha512sum1 x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0xffffffeefffffdff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffffffddfffffbff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ sha512sum1 x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0xffffffddfffffbff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffffbbfffff7ff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ sha512sum1 x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0xffffffbbfffff7ff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffff77ffffefff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ sha512sum1 x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0xffffff77ffffefff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xfffffeefffffdfff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ sha512sum1 x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0xfffffeefffffdfff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xfffffddfffffbfff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ sha512sum1 x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffffddfffffbfff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xfffffbbfffff7fff), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ sha512sum1 x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffffbbfffff7fff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xfffff77ffffeffff), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ sha512sum1 x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfffff77ffffeffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffffeefffffdffff), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ sha512sum1 x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffeefffffdffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xffffddfffffbffff), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ sha512sum1 x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xffffddfffffbffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffbbfffff7ffff), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ sha512sum1 x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0xffffbbfffff7ffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffff77ffffefffff), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ sha512sum1 x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0xffff77ffffefffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xfffeefffffdfffff), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ sha512sum1 x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0xfffeefffffdfffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xfffddfffffbfffff), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ sha512sum1 x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0xfffddfffffbfffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ sha512sum1 x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0xffffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0004400000800000), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ sha512sum1 x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x0004400000800000)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0008800001000000), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ sha512sum1 x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x0008800001000000)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0011000002000000), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ sha512sum1 x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x0011000002000000)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0022000004000000), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ sha512sum1 x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0022000004000000)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0044000008000000), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ sha512sum1 x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0044000008000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0088000010000000), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ sha512sum1 x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0088000010000000)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0110000020000000), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ sha512sum1 x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0110000020000000)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0220000040000000), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ sha512sum1 x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0220000040000000)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0440000080000000), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ sha512sum1 x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0440000080000000)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0880000100000000), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ sha512sum1 x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0880000100000000)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x1100000200000000), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ sha512sum1 x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x1100000200000000)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x2200000400000000), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ sha512sum1 x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x2200000400000000)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x4400000800000000), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ sha512sum1 x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x4400000800000000)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x8800001000000000), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ sha512sum1 x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x8800001000000000)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x1000002000000001), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ sha512sum1 x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x1000002000000001)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x2000004000000002), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ sha512sum1 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x2000004000000002)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x4000008000000004), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ sha512sum1 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x4000008000000004)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x8000010000000008), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ sha512sum1 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x8000010000000008)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000020000000011), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ sha512sum1 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0000020000000011)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000040000000022), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ sha512sum1 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000040000000022)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000080000000044), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ sha512sum1 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000080000000044)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000100000000088), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ sha512sum1 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000100000000088)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000200000000110), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ sha512sum1 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000200000000110)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000400000000220), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ sha512sum1 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000400000000220)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000800000000440), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ sha512sum1 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000800000000440)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0001000000000880), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ sha512sum1 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0001000000000880)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0002000000001100), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ sha512sum1 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0002000000001100)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0004000000002200), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ sha512sum1 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0004000000002200)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0008000000004400), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ sha512sum1 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0008000000004400)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0010000000008800), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ sha512sum1 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0010000000008800)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0020000000011000), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ sha512sum1 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0020000000011000)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0040000000022000), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ sha512sum1 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0040000000022000)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0080000000044000), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ sha512sum1 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0080000000044000)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0100000000088000), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ sha512sum1 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0100000000088000)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0200000000110000), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ sha512sum1 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0200000000110000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0400000000220000), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ sha512sum1 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0400000000220000)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0800000000440000), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ sha512sum1 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0800000000440000)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x1000000000880000), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ sha512sum1 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x1000000000880000)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x2000000001100000), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ sha512sum1 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x2000000001100000)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x4000000002200000), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ sha512sum1 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x4000000002200000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x8000000004400000), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ sha512sum1 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x8000000004400000)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000008800001), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ sha512sum1 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000008800001)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000011000002), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ sha512sum1 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000011000002)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000022000004), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ sha512sum1 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000022000004)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000044000008), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ sha512sum1 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000044000008)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000088000010), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ sha512sum1 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000088000010)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000110000020), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ sha512sum1 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000110000020)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000220000040), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ sha512sum1 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000220000040)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000440000080), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ sha512sum1 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000440000080)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000880000100), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ sha512sum1 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000880000100)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000001100000200), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ sha512sum1 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000001100000200)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000002200000400), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ sha512sum1 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000002200000400)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000004400000800), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ sha512sum1 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000004400000800)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000008800001000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ sha512sum1 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000008800001000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000011000002000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ sha512sum1 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000011000002000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000022000004000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ sha512sum1 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000022000004000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000044000008000), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ sha512sum1 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000044000008000)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000088000010000), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ sha512sum1 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000088000010000)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000110000020000), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ sha512sum1 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000110000020000)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000220000040000), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ sha512sum1 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000220000040000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000440000080000), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ sha512sum1 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000440000080000)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000880000100000), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ sha512sum1 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000880000100000)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0001100000200000), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ sha512sum1 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0001100000200000)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0002200000400000), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ sha512sum1 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0002200000400000)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ sha512sum1 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xfffbbfffff7fffff), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ sha512sum1 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfffbbfffff7fffff)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xfff77ffffeffffff), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ sha512sum1 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfff77ffffeffffff)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xffeefffffdffffff), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ sha512sum1 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffeefffffdffffff)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xffddfffffbffffff), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ sha512sum1 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xffddfffffbffffff)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xffbbfffff7ffffff), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ sha512sum1 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xffbbfffff7ffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xff77ffffefffffff), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ sha512sum1 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xff77ffffefffffff)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xfeefffffdfffffff), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ sha512sum1 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xfeefffffdfffffff)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xfddfffffbfffffff), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ sha512sum1 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xfddfffffbfffffff)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xfbbfffff7fffffff), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ sha512sum1 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xfbbfffff7fffffff)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xf77ffffeffffffff), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ sha512sum1 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0xf77ffffeffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xeefffffdffffffff), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ sha512sum1 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xeefffffdffffffff)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xddfffffbffffffff), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ sha512sum1 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xddfffffbffffffff)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xbbfffff7ffffffff), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ sha512sum1 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xbbfffff7ffffffff)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x77ffffefffffffff), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ sha512sum1 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x77ffffefffffffff)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xefffffdffffffffe), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ sha512sum1 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0xefffffdffffffffe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xdfffffbffffffffd), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ sha512sum1 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xdfffffbffffffffd)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xbfffff7ffffffffb), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ sha512sum1 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xbfffff7ffffffffb)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x7ffffefffffffff7), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ sha512sum1 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x7ffffefffffffff7)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xfffffdffffffffee), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ sha512sum1 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffffdffffffffee)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xfffffbffffffffdd), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ sha512sum1 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xfffffbffffffffdd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xfffff7ffffffffbb), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ sha512sum1 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xfffff7ffffffffbb)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffefffffffff77), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ sha512sum1 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffefffffffff77)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffdffffffffeef), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ sha512sum1 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xffffdffffffffeef)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffbffffffffddf), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ sha512sum1 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xffffbffffffffddf)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xffff7ffffffffbbf), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ sha512sum1 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0xffff7ffffffffbbf)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xfffefffffffff77f), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ sha512sum1 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0xfffefffffffff77f)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xfffdffffffffeeff), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ sha512sum1 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0xfffdffffffffeeff)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xfffbffffffffddff), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ sha512sum1 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0xfffbffffffffddff)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xfff7ffffffffbbff), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ sha512sum1 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0xfff7ffffffffbbff)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffefffffffff77ff), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ sha512sum1 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0xffefffffffff77ff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffdffffffffeefff), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ sha512sum1 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xffdffffffffeefff)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xffbffffffffddfff), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ sha512sum1 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xffbffffffffddfff)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xff7ffffffffbbfff), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ sha512sum1 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xff7ffffffffbbfff)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xfefffffffff77fff), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ sha512sum1 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xfefffffffff77fff)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xfdffffffffeeffff), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ sha512sum1 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0xfdffffffffeeffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xfbffffffffddffff), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ sha512sum1 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0xfbffffffffddffff)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xf7ffffffffbbffff), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ sha512sum1 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0xf7ffffffffbbffff)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xefffffffff77ffff), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ sha512sum1 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0xefffffffff77ffff)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xdffffffffeefffff), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ sha512sum1 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0xdffffffffeefffff)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xbffffffffddfffff), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ sha512sum1 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0xbffffffffddfffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x7ffffffffbbfffff), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ sha512sum1 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x7ffffffffbbfffff)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xfffffffff77ffffe), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ sha512sum1 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0xfffffffff77ffffe)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xffffffffeefffffd), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ sha512sum1 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0xffffffffeefffffd)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xffffffffddfffffb), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ sha512sum1 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0xffffffffddfffffb)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffffffffbbfffff7), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ sha512sum1 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0xffffffffbbfffff7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffffffff77ffffef), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ sha512sum1 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0xffffffff77ffffef)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xfffffffeefffffdf), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ sha512sum1 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0xfffffffeefffffdf)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xfffffffddfffffbf), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ sha512sum1 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0xfffffffddfffffbf)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xfffffffbbfffff7f), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ sha512sum1 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0xfffffffbbfffff7f)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xfffffff77ffffeff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ sha512sum1 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0xfffffff77ffffeff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xffffffeefffffdff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ sha512sum1 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0xffffffeefffffdff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xffffffddfffffbff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ sha512sum1 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0xffffffddfffffbff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffffffbbfffff7ff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ sha512sum1 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0xffffffbbfffff7ff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffffff77ffffefff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ sha512sum1 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0xffffff77ffffefff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xfffffeefffffdfff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ sha512sum1 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0xfffffeefffffdfff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xfffffddfffffbfff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ sha512sum1 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0xfffffddfffffbfff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xfffffbbfffff7fff), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ sha512sum1 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0xfffffbbfffff7fff)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xfffff77ffffeffff), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ sha512sum1 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0xfffff77ffffeffff)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xffffeefffffdffff), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ sha512sum1 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0xffffeefffffdffff)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xffffddfffffbffff), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ sha512sum1 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0xffffddfffffbffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xffffbbfffff7ffff), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ sha512sum1 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0xffffbbfffff7ffff)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xffff77ffffefffff), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ sha512sum1 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0xffff77ffffefffff)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xfffeefffffdfffff), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ sha512sum1 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0xfffeefffffdfffff)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xfffddfffffbfffff), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ sha512sum1 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0xfffddfffffbfffff)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ sha512sum1 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0xffffffffffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x24e7f2e37245a24d), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ sha512sum1 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x24e7f2e37245a24d)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ sha512sum1 x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x4a15a71f06337bf1), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ sha512sum1 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x4a15a71f06337bf1)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ sha512sum1 x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SM3P0-01.S b/riscof/suite/rv64i_m/K_unratified/SM3P0-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..0508e832bdc587f5382da4b0f2899a5bdf9226d1
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SM3P0-01.S
@@ -0,0 +1,2714 @@
+// RISC-V Architectural Validation Test SM3P0-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sm3p0'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",sm3p0)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x00000000da62211a), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ sm3p0 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x00000000da62211a)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x000000005001989b), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ sm3p0 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x000000005001989b)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x000000003ac78e29), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ sm3p0 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x000000003ac78e29)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x00000000e46098c9), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ sm3p0 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x00000000e46098c9)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x00000000d82740f9), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ sm3p0 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x00000000d82740f9)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x0000000067f5eb1e), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ sm3p0 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000067f5eb1e)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x0000000021ebbf37), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ sm3p0 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000021ebbf37)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x00000000601f92d5), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ sm3p0 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000601f92d5)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x000000007eeaefe9), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ sm3p0 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x000000007eeaefe9)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x00000000bdc5ae30), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ sm3p0 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000bdc5ae30)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000000020201), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ sm3p0 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000000020201)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000000040402), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ sm3p0 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000000040402)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000000080804), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ sm3p0 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000000080804)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000101008), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ sm3p0 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000000101008)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000000202010), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ sm3p0 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000000202010)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000000404020), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ sm3p0 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000000404020)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000000808040), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ sm3p0 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000000808040)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000001010080), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ sm3p0 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000001010080)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000002020100), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ sm3p0 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000002020100)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000004040200), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ sm3p0 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000004040200)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000008080400), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ sm3p0 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000008080400)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000010100800), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ sm3p0 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000010100800)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000020201000), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ sm3p0 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000020201000)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000040402000), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ sm3p0 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000040402000)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000080804000), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ sm3p0 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000080804000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000001008001), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ sm3p0 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000001008001)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000002010002), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ sm3p0 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000002010002)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000004020004), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ sm3p0 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000004020004)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000008040008), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ sm3p0 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000008040008)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000010080010), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ sm3p0 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000010080010)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000020100020), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ sm3p0 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000020100020)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000040200040), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ sm3p0 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000040200040)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000080400080), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ sm3p0 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000080400080)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000800101), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ sm3p0 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000800101)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000001000202), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ sm3p0 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000001000202)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000002000404), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ sm3p0 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000002000404)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000004000808), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ sm3p0 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000004000808)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000008001010), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ sm3p0 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000008001010)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000010002020), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ sm3p0 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000010002020)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000020004040), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ sm3p0 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000020004040)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000040008080), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ sm3p0 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000040008080)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000080010100), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ sm3p0 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000080010100)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ sm3p0 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ sm3p0 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ sm3p0 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ sm3p0 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000000000000)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ sm3p0 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000000000000)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ sm3p0 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000000000000)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ sm3p0 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000000000000)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ sm3p0 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ sm3p0 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000000000000)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ sm3p0 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000000000)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ sm3p0 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000000)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ sm3p0 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000000)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ sm3p0 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ sm3p0 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000000)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ sm3p0 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ sm3p0 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0000000000000000)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ sm3p0 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0000000000000000)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ sm3p0 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ sm3p0 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x0000000000000000)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ sm3p0 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x0000000000000000)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ sm3p0 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x0000000000000000)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ sm3p0 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0000000000000000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ sm3p0 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ sm3p0 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0000000000000000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ sm3p0 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000000)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ sm3p0 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000000)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ sm3p0 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000000)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ sm3p0 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ sm3p0 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000000)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ sm3p0 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000000)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ sm3p0 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000000)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ sm3p0 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ sm3p0 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x00000000fffdfdfe), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ sm3p0 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x00000000fffdfdfe)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000000fffbfbfd), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ sm3p0 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00000000fffbfbfd)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000000fff7f7fb), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ sm3p0 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00000000fff7f7fb)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000000ffefeff7), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ sm3p0 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00000000ffefeff7)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000000ffdfdfef), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ sm3p0 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00000000ffdfdfef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000000ffbfbfdf), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ sm3p0 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000ffbfbfdf)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000000ff7f7fbf), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ sm3p0 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000ff7f7fbf)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000000fefeff7f), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ sm3p0 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000fefeff7f)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000000fdfdfeff), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ sm3p0 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000fdfdfeff)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000fbfbfdff), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ sm3p0 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000fbfbfdff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000f7f7fbff), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ sm3p0 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000f7f7fbff)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000efeff7ff), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ sm3p0 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000efeff7ff)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000dfdfefff), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ sm3p0 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000dfdfefff)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000bfbfdfff), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ sm3p0 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000bfbfdfff)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x000000007f7fbfff), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ sm3p0 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x000000007f7fbfff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000feff7ffe), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ sm3p0 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00000000feff7ffe)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000fdfefffd), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ sm3p0 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00000000fdfefffd)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000fbfdfffb), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ sm3p0 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000fbfdfffb)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000f7fbfff7), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ sm3p0 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000000f7fbfff7)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000eff7ffef), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ sm3p0 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000eff7ffef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000dfefffdf), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ sm3p0 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000000dfefffdf)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000bfdfffbf), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ sm3p0 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000bfdfffbf)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x000000007fbfff7f), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ sm3p0 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x000000007fbfff7f)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000ff7ffefe), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ sm3p0 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000ff7ffefe)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000fefffdfd), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ sm3p0 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000fefffdfd)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000fdfffbfb), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ sm3p0 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000fdfffbfb)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000fbfff7f7), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ sm3p0 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000fbfff7f7)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000f7ffefef), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ sm3p0 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000f7ffefef)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000efffdfdf), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ sm3p0 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000efffdfdf)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000dfffbfbf), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ sm3p0 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000dfffbfbf)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000bfff7f7f), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ sm3p0 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00000000bfff7f7f)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x000000007ffefeff), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ sm3p0 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x000000007ffefeff)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ sm3p0 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x00000000ffffffff)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ sm3p0 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000ffffffff)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x00000000ffffffff), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ sm3p0 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x00000000ffffffff), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ sm3p0 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x00000000ffffffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x00000000ffffffff), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ sm3p0 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000ffffffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x00000000ffffffff), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ sm3p0 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000ffffffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ sm3p0 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000ffffffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ sm3p0 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x00000000ffffffff), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ sm3p0 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000ffffffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000000ffffffff), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ sm3p0 x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000ffffffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x00000000ffffffff), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ sm3p0 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000ffffffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x00000000ffffffff), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ sm3p0 x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000ffffffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffffff), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ sm3p0 x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffffff), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ sm3p0 x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0x00000000ffffffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x00000000ffffffff), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ sm3p0 x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0x00000000ffffffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x00000000ffffffff), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ sm3p0 x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0x00000000ffffffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x00000000ffffffff), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ sm3p0 x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x00000000ffffffff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x00000000ffffffff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ sm3p0 x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x00000000ffffffff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ sm3p0 x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x00000000ffffffff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffffffff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ sm3p0 x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x00000000ffffffff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffffffff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ sm3p0 x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x00000000ffffffff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffffffff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ sm3p0 x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x00000000ffffffff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x00000000ffffffff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ sm3p0 x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x00000000ffffffff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ sm3p0 x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000ffffffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x00000000ffffffff), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ sm3p0 x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000ffffffff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00000000ffffffff), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ sm3p0 x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000ffffffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffffffff), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ sm3p0 x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000ffffffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffffffff), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ sm3p0 x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x00000000ffffffff), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ sm3p0 x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x00000000ffffffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x00000000ffffffff), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ sm3p0 x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x00000000ffffffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x00000000ffffffff), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ sm3p0 x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x00000000ffffffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ sm3p0 x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x00000000ffffffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ sm3p0 x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000020201), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ sm3p0 x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x0000000000020201)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000000040402), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ sm3p0 x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x0000000000040402)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000000080804), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ sm3p0 x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x0000000000080804)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000000101008), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ sm3p0 x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000000101008)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000202010), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ sm3p0 x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000202010)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000404020), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ sm3p0 x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000404020)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000808040), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ sm3p0 x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000808040)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000001010080), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ sm3p0 x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000001010080)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000002020100), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ sm3p0 x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000002020100)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000004040200), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ sm3p0 x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000004040200)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000008080400), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ sm3p0 x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000008080400)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000010100800), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ sm3p0 x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000010100800)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000020201000), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ sm3p0 x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000020201000)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000040402000), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ sm3p0 x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000040402000)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000080804000), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ sm3p0 x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x0000000080804000)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000001008001), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ sm3p0 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x0000000001008001)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000002010002), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ sm3p0 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x0000000002010002)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000004020004), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ sm3p0 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0000000004020004)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000008040008), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ sm3p0 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0000000008040008)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000010080010), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ sm3p0 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000000010080010)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000020100020), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ sm3p0 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000020100020)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000040200040), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ sm3p0 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000040200040)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000080400080), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ sm3p0 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000080400080)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000800101), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ sm3p0 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000800101)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000001000202), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ sm3p0 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000001000202)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000002000404), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ sm3p0 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000002000404)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000004000808), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ sm3p0 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000004000808)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000008001010), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ sm3p0 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000008001010)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000010002020), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ sm3p0 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000010002020)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000020004040), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ sm3p0 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000020004040)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000040008080), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ sm3p0 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000040008080)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000080010100), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ sm3p0 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000080010100)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ sm3p0 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000000000000)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ sm3p0 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000000000000)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ sm3p0 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ sm3p0 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000000000)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ sm3p0 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000000)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ sm3p0 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000000)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ sm3p0 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000000)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ sm3p0 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ sm3p0 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000000000000)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ sm3p0 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000000000)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ sm3p0 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000000000)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ sm3p0 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000000000)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ sm3p0 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ sm3p0 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000000000)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ sm3p0 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000000000)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ sm3p0 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000000000)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ sm3p0 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000000000)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ sm3p0 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ sm3p0 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000000)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ sm3p0 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000000)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ sm3p0 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000000)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ sm3p0 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ sm3p0 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ sm3p0 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ sm3p0 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000000)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ sm3p0 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ sm3p0 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ sm3p0 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ sm3p0 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000000000000)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ sm3p0 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000000000000)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ sm3p0 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000000000000)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ sm3p0 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000000000000)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ sm3p0 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x00000000fffdfdfe), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ sm3p0 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000fffdfdfe)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x00000000fffbfbfd), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ sm3p0 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000fffbfbfd)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x00000000fff7f7fb), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ sm3p0 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000fff7f7fb)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x00000000ffefeff7), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ sm3p0 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000ffefeff7)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x00000000ffdfdfef), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ sm3p0 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000ffdfdfef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x00000000ffbfbfdf), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ sm3p0 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000ffbfbfdf)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x00000000ff7f7fbf), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ sm3p0 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000ff7f7fbf)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x00000000fefeff7f), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ sm3p0 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000fefeff7f)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x00000000fdfdfeff), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ sm3p0 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000fdfdfeff)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x00000000fbfbfdff), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ sm3p0 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x00000000fbfbfdff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x00000000f7f7fbff), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ sm3p0 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00000000f7f7fbff)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x00000000efeff7ff), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ sm3p0 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000efeff7ff)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x00000000dfdfefff), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ sm3p0 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000000dfdfefff)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x00000000bfbfdfff), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ sm3p0 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000bfbfdfff)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x000000007f7fbfff), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ sm3p0 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x000000007f7fbfff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x00000000feff7ffe), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ sm3p0 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000feff7ffe)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x00000000fdfefffd), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ sm3p0 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000fdfefffd)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x00000000fbfdfffb), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ sm3p0 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000fbfdfffb)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x00000000f7fbfff7), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ sm3p0 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000f7fbfff7)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x00000000eff7ffef), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ sm3p0 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000eff7ffef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x00000000dfefffdf), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ sm3p0 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000dfefffdf)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x00000000bfdfffbf), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ sm3p0 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000bfdfffbf)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x000000007fbfff7f), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ sm3p0 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x000000007fbfff7f)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x00000000ff7ffefe), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ sm3p0 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000ff7ffefe)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x00000000fefffdfd), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ sm3p0 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x00000000fefffdfd)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x00000000fdfffbfb), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ sm3p0 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x00000000fdfffbfb)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x00000000fbfff7f7), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ sm3p0 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00000000fbfff7f7)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x00000000f7ffefef), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ sm3p0 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00000000f7ffefef)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x00000000efffdfdf), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ sm3p0 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00000000efffdfdf)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x00000000dfffbfbf), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ sm3p0 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00000000dfffbfbf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x00000000bfff7f7f), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ sm3p0 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000bfff7f7f)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x000000007ffefeff), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ sm3p0 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x000000007ffefeff)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ sm3p0 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000ffffffff)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ sm3p0 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ffffffff)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x00000000ffffffff), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ sm3p0 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x00000000ffffffff), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ sm3p0 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000ffffffff)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x00000000ffffffff), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ sm3p0 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000ffffffff)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x00000000ffffffff), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ sm3p0 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000ffffffff)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffffff), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ sm3p0 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000ffffffff)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffffff), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ sm3p0 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x00000000ffffffff), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ sm3p0 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00000000ffffffff)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x00000000ffffffff), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ sm3p0 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00000000ffffffff)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x00000000ffffffff), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ sm3p0 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000ffffffff)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x00000000ffffffff), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ sm3p0 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000000ffffffff)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x00000000ffffffff), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ sm3p0 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffffffff), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ sm3p0 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000000ffffffff)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffffffff), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ sm3p0 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000ffffffff)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffffffff), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ sm3p0 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000ffffffff)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x00000000ffffffff), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ sm3p0 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000ffffffff)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x00000000ffffffff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ sm3p0 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x00000000ffffffff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ sm3p0 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000ffffffff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x00000000ffffffff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ sm3p0 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000ffffffff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffffffff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ sm3p0 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000ffffffff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffffffff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ sm3p0 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000ffffffff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x00000000ffffffff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ sm3p0 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x00000000ffffffff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ sm3p0 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00000000ffffffff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x00000000ffffffff), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ sm3p0 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x00000000ffffffff)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ sm3p0 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x00000000ffffffff)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ sm3p0 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000ffffffff)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x00000000ffffffff), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ sm3p0 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x00000000ffffffff), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ sm3p0 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x00000000ffffffff)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x00000000ffffffff), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ sm3p0 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000ffffffff)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x00000000ffffffff), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ sm3p0 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000ffffffff)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ sm3p0 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000ffffffff)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ sm3p0 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x00000000da62211a), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ sm3p0 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000da62211a)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ sm3p0 x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x000000003ac78e29), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ sm3p0 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x000000003ac78e29)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ sm3p0 x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SM3P1-01.S b/riscof/suite/rv64i_m/K_unratified/SM3P1-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..8a14903e21a44bb57ebf1e15fac919c1c5de2218
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SM3P1-01.S
@@ -0,0 +1,2714 @@
+// RISC-V Architectural Validation Test SM3P1-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sm3p1'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",sm3p1)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+ inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x000000004ff67248), rs1:x31(0x10fd3dedadea5195)
+ li x31, 0x10fd3dedadea5195
+ sm3p1 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x000000004ff67248)
+
+ inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x000000006d762861), rs1:x30(0xbd295ce2d2ffbec1)
+ li x30, 0xbd295ce2d2ffbec1
+ sm3p1 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x000000006d762861)
+
+ inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x0000000021680c1f), rs1:x29(0xc9649f05a8e1a8bb)
+ li x29, 0xc9649f05a8e1a8bb
+ sm3p1 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0000000021680c1f)
+
+ inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x0000000062885f60), rs1:x28(0x3541291848c99fcb)
+ li x28, 0x3541291848c99fcb
+ sm3p1 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0000000062885f60)
+
+ inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x00000000c899ffe8), rs1:x27(0x10a24740461d524f)
+ li x27, 0x10a24740461d524f
+ sm3p1 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x00000000c899ffe8)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+ inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x000000000d74fce2), rs1:x26(0x546b0e54528a10af)
+ li x26, 0x546b0e54528a10af
+ sm3p1 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x000000000d74fce2)
+
+ inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x00000000fd8ac6f3), rs1:x25(0x73a92fd4e19bfbc3)
+ li x25, 0x73a92fd4e19bfbc3
+ sm3p1 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000fd8ac6f3)
+
+ inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x000000006922f784), rs1:x24(0x82f6747f707af2c0)
+ li x24, 0x82f6747f707af2c0
+ sm3p1 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x000000006922f784)
+
+ inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x000000000182fced), rs1:x23(0xf5adb41aa47d105b)
+ li x23, 0xf5adb41aa47d105b
+ sm3p1 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x000000000182fced)
+
+ inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x00000000e58348c8), rs1:x22(0xdf7f3844121bcc23)
+ li x22, 0xdf7f3844121bcc23
+ sm3p1 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000e58348c8)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+ inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000000808001), rs1:x21(0x0000000000000001)
+ li x21, 0x1
+ sm3p1 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000000808001)
+
+ inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000001010002), rs1:x20(0x0000000000000002)
+ li x20, 0x2
+ sm3p1 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000001010002)
+
+ inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000002020004), rs1:x19(0x0000000000000004)
+ li x19, 0x4
+ sm3p1 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000002020004)
+
+ inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000004040008), rs1:x18(0x0000000000000008)
+ li x18, 0x8
+ sm3p1 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000004040008)
+
+ inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000008080010), rs1:x17(0x0000000000000010)
+ li x17, 0x10
+ sm3p1 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000008080010)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+ inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000010100020), rs1:x16(0x0000000000000020)
+ li x16, 0x20
+ sm3p1 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000010100020)
+
+ inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000020200040), rs1:x15(0x0000000000000040)
+ li x15, 0x40
+ sm3p1 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000020200040)
+
+ inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000040400080), rs1:x14(0x0000000000000080)
+ li x14, 0x80
+ sm3p1 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000040400080)
+
+ inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000080800100), rs1:x13(0x0000000000000100)
+ li x13, 0x100
+ sm3p1 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000080800100)
+
+ inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000001000201), rs1:x12(0x0000000000000200)
+ li x12, 0x200
+ sm3p1 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000001000201)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+ inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000002000402), rs1:x11(0x0000000000000400)
+ li x11, 0x400
+ sm3p1 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000002000402)
+
+ inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000004000804), rs1:x10(0x0000000000000800)
+ li x10, 0x800
+ sm3p1 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000004000804)
+
+ inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000008001008), rs1:x9(0x0000000000001000)
+ li x9, 0x1000
+ sm3p1 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000008001008)
+
+ inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000010002010), rs1:x8(0x0000000000002000)
+ li x8, 0x2000
+ sm3p1 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000010002010)
+
+ inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000020004020), rs1:x7(0x0000000000004000)
+ li x7, 0x4000
+ sm3p1 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000020004020)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+ inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000040008040), rs1:x6(0x0000000000008000)
+ li x6, 0x8000
+ sm3p1 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000040008040)
+
+ inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000080010080), rs1:x5(0x0000000000010000)
+ li x5, 0x10000
+ sm3p1 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000080010080)
+
+ inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000000020101), rs1:x4(0x0000000000020000)
+ li x4, 0x20000
+ sm3p1 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000020101)
+
+ inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000040202), rs1:x3(0x0000000000040000)
+ li x3, 0x40000
+ sm3p1 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000040202)
+
+ inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000080404), rs1:x2(0x0000000000080000)
+ li x2, 0x80000
+ sm3p1 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000080404)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+ inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000100808), rs1:x1(0x0000000000100000)
+ li x1, 0x100000
+ sm3p1 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000100808)
+
+ inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000201010), rs1:x31(0x0000000000200000)
+ li x31, 0x200000
+ sm3p1 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000201010)
+
+ inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000402020), rs1:x30(0x0000000000400000)
+ li x30, 0x400000
+ sm3p1 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000402020)
+
+ inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000804040), rs1:x29(0x0000000000800000)
+ li x29, 0x800000
+ sm3p1 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000804040)
+
+ inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000001008080), rs1:x28(0x0000000001000000)
+ li x28, 0x1000000
+ sm3p1 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000001008080)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+ inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000002010100), rs1:x27(0x0000000002000000)
+ li x27, 0x2000000
+ sm3p1 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000002010100)
+
+ inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000004020200), rs1:x26(0x0000000004000000)
+ li x26, 0x4000000
+ sm3p1 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000004020200)
+
+ inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000008040400), rs1:x25(0x0000000008000000)
+ li x25, 0x8000000
+ sm3p1 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000008040400)
+
+ inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000010080800), rs1:x24(0x0000000010000000)
+ li x24, 0x10000000
+ sm3p1 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000010080800)
+
+ inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000020101000), rs1:x23(0x0000000020000000)
+ li x23, 0x20000000
+ sm3p1 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000020101000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+ inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000040202000), rs1:x22(0x0000000040000000)
+ li x22, 0x40000000
+ sm3p1 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000040202000)
+
+ inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000080404000), rs1:x21(0x0000000080000000)
+ li x21, 0x80000000
+ sm3p1 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000080404000)
+
+ inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000100000000)
+ li x20, 0x100000000
+ sm3p1 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000200000000)
+ li x19, 0x200000000
+ sm3p1 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+ inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000400000000)
+ li x18, 0x400000000
+ sm3p1 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+ inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000800000000)
+ li x17, 0x800000000
+ sm3p1 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000000000000)
+
+ inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000001000000000)
+ li x16, 0x1000000000
+ sm3p1 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000000000000)
+
+ inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000002000000000)
+ li x15, 0x2000000000
+ sm3p1 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000000000000)
+
+ inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000004000000000)
+ li x14, 0x4000000000
+ sm3p1 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000000000000)
+
+ inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000008000000000)
+ li x13, 0x8000000000
+ sm3p1 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+ inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000010000000000)
+ li x12, 0x10000000000
+ sm3p1 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000000000000)
+
+ inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000020000000000)
+ li x11, 0x20000000000
+ sm3p1 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000000000)
+
+ inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000040000000000)
+ li x10, 0x40000000000
+ sm3p1 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000000)
+
+ inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000080000000000)
+ li x9, 0x80000000000
+ sm3p1 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000000)
+
+ inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000100000000000)
+ li x8, 0x100000000000
+ sm3p1 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+ inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000200000000000)
+ li x7, 0x200000000000
+ sm3p1 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000000)
+
+ inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000400000000000)
+ li x6, 0x400000000000
+ sm3p1 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+ inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000800000000000)
+ li x5, 0x800000000000
+ sm3p1 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x0000000000000000)
+
+ inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0001000000000000)
+ li x4, 0x1000000000000
+ sm3p1 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x0000000000000000)
+
+ inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0002000000000000)
+ li x3, 0x2000000000000
+ sm3p1 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+ inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0004000000000000)
+ li x2, 0x4000000000000
+ sm3p1 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x0000000000000000)
+
+ inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0008000000000000)
+ li x1, 0x8000000000000
+ sm3p1 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x0000000000000000)
+
+ inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0010000000000000)
+ li x31, 0x10000000000000
+ sm3p1 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x0000000000000000)
+
+ inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0020000000000000)
+ li x30, 0x20000000000000
+ sm3p1 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x0000000000000000)
+
+ inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0040000000000000)
+ li x29, 0x40000000000000
+ sm3p1 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+ inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0080000000000000)
+ li x28, 0x80000000000000
+ sm3p1 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x0000000000000000)
+
+ inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0100000000000000)
+ li x27, 0x100000000000000
+ sm3p1 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000000)
+
+ inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0200000000000000)
+ li x26, 0x200000000000000
+ sm3p1 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000000)
+
+ inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0400000000000000)
+ li x25, 0x400000000000000
+ sm3p1 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000000)
+
+ inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0800000000000000)
+ li x24, 0x800000000000000
+ sm3p1 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+ inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x1000000000000000)
+ li x23, 0x1000000000000000
+ sm3p1 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000000)
+
+ inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x2000000000000000)
+ li x22, 0x2000000000000000
+ sm3p1 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000000)
+
+ inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x4000000000000000)
+ li x21, 0x4000000000000000
+ sm3p1 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000000)
+
+ inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x8000000000000000)
+ li x20, 0x8000000000000000
+ sm3p1 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000)
+ li x19, 0x0
+ sm3p1 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+ inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x00000000ff7f7ffe), rs1:x18(0xfffffffffffffffe)
+ li x18, 0xfffffffffffffffe
+ sm3p1 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x00000000ff7f7ffe)
+
+ inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00000000fefefffd), rs1:x17(0xfffffffffffffffd)
+ li x17, 0xfffffffffffffffd
+ sm3p1 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00000000fefefffd)
+
+ inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000000fdfdfffb), rs1:x16(0xfffffffffffffffb)
+ li x16, 0xfffffffffffffffb
+ sm3p1 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00000000fdfdfffb)
+
+ inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00000000fbfbfff7), rs1:x15(0xfffffffffffffff7)
+ li x15, 0xfffffffffffffff7
+ sm3p1 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00000000fbfbfff7)
+
+ inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000000f7f7ffef), rs1:x14(0xffffffffffffffef)
+ li x14, 0xffffffffffffffef
+ sm3p1 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00000000f7f7ffef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+ inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000000efefffdf), rs1:x13(0xffffffffffffffdf)
+ li x13, 0xffffffffffffffdf
+ sm3p1 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000efefffdf)
+
+ inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000000dfdfffbf), rs1:x12(0xffffffffffffffbf)
+ li x12, 0xffffffffffffffbf
+ sm3p1 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000dfdfffbf)
+
+ inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000000bfbfff7f), rs1:x11(0xffffffffffffff7f)
+ li x11, 0xffffffffffffff7f
+ sm3p1 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000bfbfff7f)
+
+ inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x000000007f7ffeff), rs1:x10(0xfffffffffffffeff)
+ li x10, 0xfffffffffffffeff
+ sm3p1 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x000000007f7ffeff)
+
+ inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000fefffdfe), rs1:x9(0xfffffffffffffdff)
+ li x9, 0xfffffffffffffdff
+ sm3p1 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000fefffdfe)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+ inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000fdfffbfd), rs1:x8(0xfffffffffffffbff)
+ li x8, 0xfffffffffffffbff
+ sm3p1 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000fdfffbfd)
+
+ inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000fbfff7fb), rs1:x7(0xfffffffffffff7ff)
+ li x7, 0xfffffffffffff7ff
+ sm3p1 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000fbfff7fb)
+
+ inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000f7ffeff7), rs1:x6(0xffffffffffffefff)
+ li x6, 0xffffffffffffefff
+ sm3p1 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000f7ffeff7)
+
+ inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000efffdfef), rs1:x5(0xffffffffffffdfff)
+ li x5, 0xffffffffffffdfff
+ sm3p1 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000efffdfef)
+
+ inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000dfffbfdf), rs1:x4(0xffffffffffffbfff)
+ li x4, 0xffffffffffffbfff
+ sm3p1 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000dfffbfdf)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+ inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000bfff7fbf), rs1:x3(0xffffffffffff7fff)
+ li x3, 0xffffffffffff7fff
+ sm3p1 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00000000bfff7fbf)
+
+ inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x000000007ffeff7f), rs1:x2(0xfffffffffffeffff)
+ li x2, 0xfffffffffffeffff
+ sm3p1 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x000000007ffeff7f)
+
+ inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000fffdfefe), rs1:x1(0xfffffffffffdffff)
+ li x1, 0xfffffffffffdffff
+ sm3p1 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000fffdfefe)
+
+ inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000fffbfdfd), rs1:x31(0xfffffffffffbffff)
+ li x31, 0xfffffffffffbffff
+ sm3p1 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000000fffbfdfd)
+
+ inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x00000000fff7fbfb), rs1:x30(0xfffffffffff7ffff)
+ li x30, 0xfffffffffff7ffff
+ sm3p1 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000fff7fbfb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+ inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffeff7f7), rs1:x29(0xffffffffffefffff)
+ li x29, 0xffffffffffefffff
+ sm3p1 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000000ffeff7f7)
+
+ inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffdfefef), rs1:x28(0xffffffffffdfffff)
+ li x28, 0xffffffffffdfffff
+ sm3p1 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000ffdfefef)
+
+ inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffbfdfdf), rs1:x27(0xffffffffffbfffff)
+ li x27, 0xffffffffffbfffff
+ sm3p1 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000ffbfdfdf)
+
+ inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000ff7fbfbf), rs1:x26(0xffffffffff7fffff)
+ li x26, 0xffffffffff7fffff
+ sm3p1 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000ff7fbfbf)
+
+ inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000feff7f7f), rs1:x25(0xfffffffffeffffff)
+ li x25, 0xfffffffffeffffff
+ sm3p1 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000feff7f7f)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+ inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x00000000fdfefeff), rs1:x24(0xfffffffffdffffff)
+ li x24, 0xfffffffffdffffff
+ sm3p1 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000fdfefeff)
+
+ inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x00000000fbfdfdff), rs1:x23(0xfffffffffbffffff)
+ li x23, 0xfffffffffbffffff
+ sm3p1 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000fbfdfdff)
+
+ inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000f7fbfbff), rs1:x22(0xfffffffff7ffffff)
+ li x22, 0xfffffffff7ffffff
+ sm3p1 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000f7fbfbff)
+
+ inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000eff7f7ff), rs1:x21(0xffffffffefffffff)
+ li x21, 0xffffffffefffffff
+ sm3p1 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000eff7f7ff)
+
+ inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000dfefefff), rs1:x20(0xffffffffdfffffff)
+ li x20, 0xffffffffdfffffff
+ sm3p1 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000dfefefff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+ inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000bfdfdfff), rs1:x19(0xffffffffbfffffff)
+ li x19, 0xffffffffbfffffff
+ sm3p1 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00000000bfdfdfff)
+
+ inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x000000007fbfbfff), rs1:x18(0xffffffff7fffffff)
+ li x18, 0xffffffff7fffffff
+ sm3p1 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x000000007fbfbfff)
+
+ inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0xfffffffeffffffff)
+ li x17, 0xfffffffeffffffff
+ sm3p1 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x00000000ffffffff)
+
+ inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xfffffffdffffffff)
+ li x16, 0xfffffffdffffffff
+ sm3p1 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000ffffffff)
+
+ inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x00000000ffffffff), rs1:x15(0xfffffffbffffffff)
+ li x15, 0xfffffffbffffffff
+ sm3p1 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+ inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x00000000ffffffff), rs1:x14(0xfffffff7ffffffff)
+ li x14, 0xfffffff7ffffffff
+ sm3p1 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x00000000ffffffff)
+
+ inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x00000000ffffffff), rs1:x13(0xffffffefffffffff)
+ li x13, 0xffffffefffffffff
+ sm3p1 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000ffffffff)
+
+ inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x00000000ffffffff), rs1:x12(0xffffffdfffffffff)
+ li x12, 0xffffffdfffffffff
+ sm3p1 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000ffffffff)
+
+ inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0xffffffbfffffffff)
+ li x11, 0xffffffbfffffffff
+ sm3p1 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000ffffffff)
+
+ inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xffffff7fffffffff)
+ li x10, 0xffffff7fffffffff
+ sm3p1 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+ inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x00000000ffffffff), rs1:x9(0xfffffeffffffffff)
+ li x9, 0xfffffeffffffffff
+ sm3p1 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000ffffffff)
+
+ inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000000ffffffff), rs1:x8(0xfffffdffffffffff)
+ li x8, 0xfffffdffffffffff
+ sm3p1 x24, x8
+ sd x24, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000ffffffff)
+
+ inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x00000000ffffffff), rs1:x7(0xfffffbffffffffff)
+ li x7, 0xfffffbffffffffff
+ sm3p1 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000ffffffff)
+
+ inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x00000000ffffffff), rs1:x6(0xfffff7ffffffffff)
+ li x6, 0xfffff7ffffffffff
+ sm3p1 x26, x6
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000ffffffff)
+
+ inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffffff), rs1:x5(0xffffefffffffffff)
+ li x5, 0xffffefffffffffff
+ sm3p1 x27, x5
+ sd x27, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+ inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffffff), rs1:x4(0xffffdfffffffffff)
+ li x4, 0xffffdfffffffffff
+ sm3p1 x28, x4
+ sd x28, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x28, 0x00000000ffffffff)
+
+ inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x00000000ffffffff), rs1:x3(0xffffbfffffffffff)
+ li x3, 0xffffbfffffffffff
+ sm3p1 x29, x3
+ sd x29, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x29, 0x00000000ffffffff)
+
+ inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x00000000ffffffff), rs1:x2(0xffff7fffffffffff)
+ li x2, 0xffff7fffffffffff
+ sm3p1 x30, x2
+ sd x30, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x30, 0x00000000ffffffff)
+
+ inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x00000000ffffffff), rs1:x1(0xfffeffffffffffff)
+ li x1, 0xfffeffffffffffff
+ sm3p1 x31, x1
+ sd x31, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x00000000ffffffff)
+
+ inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x00000000ffffffff), rs1:x31(0xfffdffffffffffff)
+ li x31, 0xfffdffffffffffff
+ sm3p1 x1, x31
+ sd x1, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+ inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x00000000ffffffff), rs1:x30(0xfffbffffffffffff)
+ li x30, 0xfffbffffffffffff
+ sm3p1 x2, x30
+ sd x2, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x00000000ffffffff)
+
+ inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffffffff), rs1:x29(0xfff7ffffffffffff)
+ li x29, 0xfff7ffffffffffff
+ sm3p1 x3, x29
+ sd x3, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x00000000ffffffff)
+
+ inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffffffff), rs1:x28(0xffefffffffffffff)
+ li x28, 0xffefffffffffffff
+ sm3p1 x4, x28
+ sd x4, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x00000000ffffffff)
+
+ inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffffffff), rs1:x27(0xffdfffffffffffff)
+ li x27, 0xffdfffffffffffff
+ sm3p1 x5, x27
+ sd x5, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x00000000ffffffff)
+
+ inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x00000000ffffffff), rs1:x26(0xffbfffffffffffff)
+ li x26, 0xffbfffffffffffff
+ sm3p1 x6, x26
+ sd x6, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x6, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+ inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x00000000ffffffff), rs1:x25(0xff7fffffffffffff)
+ li x25, 0xff7fffffffffffff
+ sm3p1 x7, x25
+ sd x7, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000ffffffff)
+
+ inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x00000000ffffffff), rs1:x24(0xfeffffffffffffff)
+ li x24, 0xfeffffffffffffff
+ sm3p1 x8, x24
+ sd x8, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000ffffffff)
+
+ inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00000000ffffffff), rs1:x23(0xfdffffffffffffff)
+ li x23, 0xfdffffffffffffff
+ sm3p1 x9, x23
+ sd x9, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000ffffffff)
+
+ inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffffffff), rs1:x22(0xfbffffffffffffff)
+ li x22, 0xfbffffffffffffff
+ sm3p1 x10, x22
+ sd x10, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000ffffffff)
+
+ inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffffffff), rs1:x21(0xf7ffffffffffffff)
+ li x21, 0xf7ffffffffffffff
+ sm3p1 x11, x21
+ sd x11, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+ inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x00000000ffffffff), rs1:x20(0xefffffffffffffff)
+ li x20, 0xefffffffffffffff
+ sm3p1 x12, x20
+ sd x12, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x00000000ffffffff)
+
+ inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x00000000ffffffff), rs1:x19(0xdfffffffffffffff)
+ li x19, 0xdfffffffffffffff
+ sm3p1 x13, x19
+ sd x13, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x00000000ffffffff)
+
+ inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x00000000ffffffff), rs1:x18(0xbfffffffffffffff)
+ li x18, 0xbfffffffffffffff
+ sm3p1 x14, x18
+ sd x14, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x00000000ffffffff)
+
+ inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0x7fffffffffffffff)
+ li x17, 0x7fffffffffffffff
+ sm3p1 x15, x17
+ sd x15, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x00000000ffffffff)
+
+ inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xffffffffffffffff)
+ li x16, 0xffffffffffffffff
+ sm3p1 x16, x16
+ sd x16, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x16, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+ inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0000000000808001), rs1:x15(0x0000000000000001)
+ li x15, 0x1
+ sm3p1 x17, x15
+ sd x17, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x17, 0x0000000000808001)
+
+ inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0000000001010002), rs1:x14(0x0000000000000002)
+ li x14, 0x2
+ sm3p1 x18, x14
+ sd x18, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x0000000001010002)
+
+ inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0000000002020004), rs1:x13(0x0000000000000004)
+ li x13, 0x4
+ sm3p1 x19, x13
+ sd x19, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x0000000002020004)
+
+ inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0000000004040008), rs1:x12(0x0000000000000008)
+ li x12, 0x8
+ sm3p1 x20, x12
+ sd x20, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x0000000004040008)
+
+ inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000008080010), rs1:x11(0x0000000000000010)
+ li x11, 0x10
+ sm3p1 x21, x11
+ sd x21, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000008080010)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+ inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000010100020), rs1:x10(0x0000000000000020)
+ li x10, 0x20
+ sm3p1 x22, x10
+ sd x22, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000010100020)
+
+ inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000020200040), rs1:x9(0x0000000000000040)
+ li x9, 0x40
+ sm3p1 x23, x9
+ sd x23, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000020200040)
+
+ inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000040400080), rs1:x8(0x0000000000000080)
+ li x8, 0x80
+ sm3p1 x24, x8
+ sd x24, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000040400080)
+
+ inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000080800100), rs1:x7(0x0000000000000100)
+ li x7, 0x100
+ sm3p1 x25, x7
+ sd x25, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000080800100)
+
+ inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000001000201), rs1:x6(0x0000000000000200)
+ li x6, 0x200
+ sm3p1 x26, x6
+ sd x26, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000001000201)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+ inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000002000402), rs1:x5(0x0000000000000400)
+ li x5, 0x400
+ sm3p1 x27, x5
+ sd x27, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000002000402)
+
+ inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000004000804), rs1:x4(0x0000000000000800)
+ li x4, 0x800
+ sm3p1 x28, x4
+ sd x28, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000004000804)
+
+ inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000008001008), rs1:x3(0x0000000000001000)
+ li x3, 0x1000
+ sm3p1 x29, x3
+ sd x29, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000008001008)
+
+ inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000010002010), rs1:x2(0x0000000000002000)
+ li x2, 0x2000
+ sm3p1 x30, x2
+ sd x30, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000010002010)
+
+ inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000020004020), rs1:x1(0x0000000000004000)
+ li x1, 0x4000
+ sm3p1 x31, x1
+ sd x31, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x31, 0x0000000020004020)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+ inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000040008040), rs1:x31(0x0000000000008000)
+ li x31, 0x8000
+ sm3p1 x1, x31
+ sd x1, 0(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x1, 0x0000000040008040)
+
+ inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000080010080), rs1:x30(0x0000000000010000)
+ li x30, 0x10000
+ sm3p1 x2, x30
+ sd x2, 8(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x2, 0x0000000080010080)
+
+ inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000020101), rs1:x29(0x0000000000020000)
+ li x29, 0x20000
+ sm3p1 x3, x29
+ sd x3, 16(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x3, 0x0000000000020101)
+
+ inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000040202), rs1:x28(0x0000000000040000)
+ li x28, 0x40000
+ sm3p1 x4, x28
+ sd x4, 24(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x4, 0x0000000000040202)
+
+ inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000080404), rs1:x27(0x0000000000080000)
+ li x27, 0x80000
+ sm3p1 x5, x27
+ sd x5, 32(x6)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x5, 0x0000000000080404)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+ inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000100808), rs1:x26(0x0000000000100000)
+ li x26, 0x100000
+ sm3p1 x6, x26
+ sd x6, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000100808)
+
+ inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000201010), rs1:x25(0x0000000000200000)
+ li x25, 0x200000
+ sm3p1 x7, x25
+ sd x7, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000201010)
+
+ inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000402020), rs1:x24(0x0000000000400000)
+ li x24, 0x400000
+ sm3p1 x8, x24
+ sd x8, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000402020)
+
+ inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000804040), rs1:x23(0x0000000000800000)
+ li x23, 0x800000
+ sm3p1 x9, x23
+ sd x9, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000804040)
+
+ inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000001008080), rs1:x22(0x0000000001000000)
+ li x22, 0x1000000
+ sm3p1 x10, x22
+ sd x10, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000001008080)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+ inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000002010100), rs1:x21(0x0000000002000000)
+ li x21, 0x2000000
+ sm3p1 x11, x21
+ sd x11, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x11, 0x0000000002010100)
+
+ inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000004020200), rs1:x20(0x0000000004000000)
+ li x20, 0x4000000
+ sm3p1 x12, x20
+ sd x12, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x12, 0x0000000004020200)
+
+ inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000008040400), rs1:x19(0x0000000008000000)
+ li x19, 0x8000000
+ sm3p1 x13, x19
+ sd x13, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x13, 0x0000000008040400)
+
+ inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000010080800), rs1:x18(0x0000000010000000)
+ li x18, 0x10000000
+ sm3p1 x14, x18
+ sd x14, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x14, 0x0000000010080800)
+
+ inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000020101000), rs1:x17(0x0000000020000000)
+ li x17, 0x20000000
+ sm3p1 x15, x17
+ sd x15, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x15, 0x0000000020101000)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+ inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000040202000), rs1:x16(0x0000000040000000)
+ li x16, 0x40000000
+ sm3p1 x16, x16
+ sd x16, 0(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x16, 0x0000000040202000)
+
+ inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000080404000), rs1:x15(0x0000000080000000)
+ li x15, 0x80000000
+ sm3p1 x17, x15
+ sd x17, 8(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x17, 0x0000000080404000)
+
+ inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000)
+ li x14, 0x100000000
+ sm3p1 x18, x14
+ sd x18, 16(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x0000000000000000)
+
+ inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000)
+ li x13, 0x200000000
+ sm3p1 x19, x13
+ sd x19, 24(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x0000000000000000)
+
+ inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000)
+ li x12, 0x400000000
+ sm3p1 x20, x12
+ sd x20, 32(x2)
+ RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+ inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000)
+ li x11, 0x800000000
+ sm3p1 x21, x11
+ sd x21, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x0000000000000000)
+
+ inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000)
+ li x10, 0x1000000000
+ sm3p1 x22, x10
+ sd x22, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x0000000000000000)
+
+ inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000)
+ li x9, 0x2000000000
+ sm3p1 x23, x9
+ sd x23, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x0000000000000000)
+
+ inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000)
+ li x8, 0x4000000000
+ sm3p1 x24, x8
+ sd x24, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x0000000000000000)
+
+ inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000)
+ li x7, 0x8000000000
+ sm3p1 x25, x7
+ sd x25, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+ inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000)
+ li x6, 0x10000000000
+ sm3p1 x26, x6
+ sd x26, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x26, 0x0000000000000000)
+
+ inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000)
+ li x5, 0x20000000000
+ sm3p1 x27, x5
+ sd x27, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x27, 0x0000000000000000)
+
+ inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000)
+ li x4, 0x40000000000
+ sm3p1 x28, x4
+ sd x28, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x28, 0x0000000000000000)
+
+ inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000)
+ li x3, 0x80000000000
+ sm3p1 x29, x3
+ sd x29, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x29, 0x0000000000000000)
+
+ inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000)
+ li x2, 0x100000000000
+ sm3p1 x30, x2
+ sd x30, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x7, x30, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+ inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000)
+ li x1, 0x200000000000
+ sm3p1 x31, x1
+ sd x31, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x31, 0x0000000000000000)
+
+ inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000)
+ li x31, 0x400000000000
+ sm3p1 x1, x31
+ sd x1, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x1, 0x0000000000000000)
+
+ inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000)
+ li x30, 0x800000000000
+ sm3p1 x2, x30
+ sd x2, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x2, 0x0000000000000000)
+
+ inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000)
+ li x29, 0x1000000000000
+ sm3p1 x3, x29
+ sd x3, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x3, 0x0000000000000000)
+
+ inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000)
+ li x28, 0x2000000000000
+ sm3p1 x4, x28
+ sd x4, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x4, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+ inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000)
+ li x27, 0x4000000000000
+ sm3p1 x5, x27
+ sd x5, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x0000000000000000)
+
+ inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000)
+ li x26, 0x8000000000000
+ sm3p1 x6, x26
+ sd x6, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x0000000000000000)
+
+ inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000)
+ li x25, 0x10000000000000
+ sm3p1 x7, x25
+ sd x7, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x0000000000000000)
+
+ inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000)
+ li x24, 0x20000000000000
+ sm3p1 x8, x24
+ sd x8, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x0000000000000000)
+
+ inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000)
+ li x23, 0x40000000000000
+ sm3p1 x9, x23
+ sd x9, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+ inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000)
+ li x22, 0x80000000000000
+ sm3p1 x10, x22
+ sd x10, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x0000000000000000)
+
+ inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000)
+ li x21, 0x100000000000000
+ sm3p1 x11, x21
+ sd x11, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x0000000000000000)
+
+ inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000)
+ li x20, 0x200000000000000
+ sm3p1 x12, x20
+ sd x12, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x0000000000000000)
+
+ inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000)
+ li x19, 0x400000000000000
+ sm3p1 x13, x19
+ sd x13, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x0000000000000000)
+
+ inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000)
+ li x18, 0x800000000000000
+ sm3p1 x14, x18
+ sd x14, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x14, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+ inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000)
+ li x17, 0x1000000000000000
+ sm3p1 x15, x17
+ sd x15, 0(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x15, 0x0000000000000000)
+
+ inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000)
+ li x16, 0x2000000000000000
+ sm3p1 x16, x16
+ sd x16, 8(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x16, 0x0000000000000000)
+
+ inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000)
+ li x15, 0x4000000000000000
+ sm3p1 x17, x15
+ sd x17, 16(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x17, 0x0000000000000000)
+
+ inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000)
+ li x14, 0x8000000000000000
+ sm3p1 x18, x14
+ sd x18, 24(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x18, 0x0000000000000000)
+
+ inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000)
+ li x13, 0x0
+ sm3p1 x19, x13
+ sd x19, 32(x3)
+ RVMODEL_IO_ASSERT_GPR_EQ(x4, x19, 0x0000000000000000)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+ inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x00000000ff7f7ffe), rs1:x12(0xfffffffffffffffe)
+ li x12, 0xfffffffffffffffe
+ sm3p1 x20, x12
+ sd x20, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000ff7f7ffe)
+
+ inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x00000000fefefffd), rs1:x11(0xfffffffffffffffd)
+ li x11, 0xfffffffffffffffd
+ sm3p1 x21, x11
+ sd x21, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000fefefffd)
+
+ inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x00000000fdfdfffb), rs1:x10(0xfffffffffffffffb)
+ li x10, 0xfffffffffffffffb
+ sm3p1 x22, x10
+ sd x22, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000fdfdfffb)
+
+ inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x00000000fbfbfff7), rs1:x9(0xfffffffffffffff7)
+ li x9, 0xfffffffffffffff7
+ sm3p1 x23, x9
+ sd x23, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000fbfbfff7)
+
+ inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x00000000f7f7ffef), rs1:x8(0xffffffffffffffef)
+ li x8, 0xffffffffffffffef
+ sm3p1 x24, x8
+ sd x24, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000f7f7ffef)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+ inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x00000000efefffdf), rs1:x7(0xffffffffffffffdf)
+ li x7, 0xffffffffffffffdf
+ sm3p1 x25, x7
+ sd x25, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000efefffdf)
+
+ inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x00000000dfdfffbf), rs1:x6(0xffffffffffffffbf)
+ li x6, 0xffffffffffffffbf
+ sm3p1 x26, x6
+ sd x26, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000dfdfffbf)
+
+ inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x00000000bfbfff7f), rs1:x5(0xffffffffffffff7f)
+ li x5, 0xffffffffffffff7f
+ sm3p1 x27, x5
+ sd x27, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000bfbfff7f)
+
+ inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x000000007f7ffeff), rs1:x4(0xfffffffffffffeff)
+ li x4, 0xfffffffffffffeff
+ sm3p1 x28, x4
+ sd x28, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x000000007f7ffeff)
+
+ inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x00000000fefffdfe), rs1:x3(0xfffffffffffffdff)
+ li x3, 0xfffffffffffffdff
+ sm3p1 x29, x3
+ sd x29, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x29, 0x00000000fefffdfe)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+ inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x00000000fdfffbfd), rs1:x2(0xfffffffffffffbff)
+ li x2, 0xfffffffffffffbff
+ sm3p1 x30, x2
+ sd x30, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00000000fdfffbfd)
+
+ inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x00000000fbfff7fb), rs1:x1(0xfffffffffffff7ff)
+ li x1, 0xfffffffffffff7ff
+ sm3p1 x31, x1
+ sd x31, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000fbfff7fb)
+
+ inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x00000000f7ffeff7), rs1:x31(0xffffffffffffefff)
+ li x31, 0xffffffffffffefff
+ sm3p1 x1, x31
+ sd x1, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000000f7ffeff7)
+
+ inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x00000000efffdfef), rs1:x30(0xffffffffffffdfff)
+ li x30, 0xffffffffffffdfff
+ sm3p1 x2, x30
+ sd x2, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000efffdfef)
+
+ inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x00000000dfffbfdf), rs1:x29(0xffffffffffffbfff)
+ li x29, 0xffffffffffffbfff
+ sm3p1 x3, x29
+ sd x3, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x3, 0x00000000dfffbfdf)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+ inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x00000000bfff7fbf), rs1:x28(0xffffffffffff7fff)
+ li x28, 0xffffffffffff7fff
+ sm3p1 x4, x28
+ sd x4, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000bfff7fbf)
+
+ inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x000000007ffeff7f), rs1:x27(0xfffffffffffeffff)
+ li x27, 0xfffffffffffeffff
+ sm3p1 x5, x27
+ sd x5, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x000000007ffeff7f)
+
+ inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x00000000fffdfefe), rs1:x26(0xfffffffffffdffff)
+ li x26, 0xfffffffffffdffff
+ sm3p1 x6, x26
+ sd x6, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000fffdfefe)
+
+ inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x00000000fffbfdfd), rs1:x25(0xfffffffffffbffff)
+ li x25, 0xfffffffffffbffff
+ sm3p1 x7, x25
+ sd x7, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000fffbfdfd)
+
+ inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x00000000fff7fbfb), rs1:x24(0xfffffffffff7ffff)
+ li x24, 0xfffffffffff7ffff
+ sm3p1 x8, x24
+ sd x8, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000fff7fbfb)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+ inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x00000000ffeff7f7), rs1:x23(0xffffffffffefffff)
+ li x23, 0xffffffffffefffff
+ sm3p1 x9, x23
+ sd x9, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000ffeff7f7)
+
+ inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffdfefef), rs1:x22(0xffffffffffdfffff)
+ li x22, 0xffffffffffdfffff
+ sm3p1 x10, x22
+ sd x10, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000ffdfefef)
+
+ inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffbfdfdf), rs1:x21(0xffffffffffbfffff)
+ li x21, 0xffffffffffbfffff
+ sm3p1 x11, x21
+ sd x11, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000ffbfdfdf)
+
+ inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x00000000ff7fbfbf), rs1:x20(0xffffffffff7fffff)
+ li x20, 0xffffffffff7fffff
+ sm3p1 x12, x20
+ sd x12, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000ff7fbfbf)
+
+ inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x00000000feff7f7f), rs1:x19(0xfffffffffeffffff)
+ li x19, 0xfffffffffeffffff
+ sm3p1 x13, x19
+ sd x13, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x13, 0x00000000feff7f7f)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+ inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x00000000fdfefeff), rs1:x18(0xfffffffffdffffff)
+ li x18, 0xfffffffffdffffff
+ sm3p1 x14, x18
+ sd x14, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x14, 0x00000000fdfefeff)
+
+ inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x00000000fbfdfdff), rs1:x17(0xfffffffffbffffff)
+ li x17, 0xfffffffffbffffff
+ sm3p1 x15, x17
+ sd x15, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x15, 0x00000000fbfdfdff)
+
+ inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x00000000f7fbfbff), rs1:x16(0xfffffffff7ffffff)
+ li x16, 0xfffffffff7ffffff
+ sm3p1 x16, x16
+ sd x16, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x16, 0x00000000f7fbfbff)
+
+ inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x00000000eff7f7ff), rs1:x15(0xffffffffefffffff)
+ li x15, 0xffffffffefffffff
+ sm3p1 x17, x15
+ sd x17, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x17, 0x00000000eff7f7ff)
+
+ inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x00000000dfefefff), rs1:x14(0xffffffffdfffffff)
+ li x14, 0xffffffffdfffffff
+ sm3p1 x18, x14
+ sd x18, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x18, 0x00000000dfefefff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+ inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x00000000bfdfdfff), rs1:x13(0xffffffffbfffffff)
+ li x13, 0xffffffffbfffffff
+ sm3p1 x19, x13
+ sd x19, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000bfdfdfff)
+
+ inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x000000007fbfbfff), rs1:x12(0xffffffff7fffffff)
+ li x12, 0xffffffff7fffffff
+ sm3p1 x20, x12
+ sd x20, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x000000007fbfbfff)
+
+ inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0xfffffffeffffffff)
+ li x11, 0xfffffffeffffffff
+ sm3p1 x21, x11
+ sd x21, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000ffffffff)
+
+ inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xfffffffdffffffff)
+ li x10, 0xfffffffdffffffff
+ sm3p1 x22, x10
+ sd x22, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ffffffff)
+
+ inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x00000000ffffffff), rs1:x9(0xfffffffbffffffff)
+ li x9, 0xfffffffbffffffff
+ sm3p1 x23, x9
+ sd x23, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+ inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x00000000ffffffff), rs1:x8(0xfffffff7ffffffff)
+ li x8, 0xfffffff7ffffffff
+ sm3p1 x24, x8
+ sd x24, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x24, 0x00000000ffffffff)
+
+ inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x00000000ffffffff), rs1:x7(0xffffffefffffffff)
+ li x7, 0xffffffefffffffff
+ sm3p1 x25, x7
+ sd x25, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x00000000ffffffff)
+
+ inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x00000000ffffffff), rs1:x6(0xffffffdfffffffff)
+ li x6, 0xffffffdfffffffff
+ sm3p1 x26, x6
+ sd x26, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x00000000ffffffff)
+
+ inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x00000000ffffffff), rs1:x5(0xffffffbfffffffff)
+ li x5, 0xffffffbfffffffff
+ sm3p1 x27, x5
+ sd x27, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x27, 0x00000000ffffffff)
+
+ inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x00000000ffffffff), rs1:x4(0xffffff7fffffffff)
+ li x4, 0xffffff7fffffffff
+ sm3p1 x28, x4
+ sd x28, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x28, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+ inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x00000000ffffffff), rs1:x3(0xfffffeffffffffff)
+ li x3, 0xfffffeffffffffff
+ sm3p1 x29, x3
+ sd x29, 0(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x29, 0x00000000ffffffff)
+
+ inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x00000000ffffffff), rs1:x2(0xfffffdffffffffff)
+ li x2, 0xfffffdffffffffff
+ sm3p1 x30, x2
+ sd x30, 8(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x30, 0x00000000ffffffff)
+
+ inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x00000000ffffffff), rs1:x1(0xfffffbffffffffff)
+ li x1, 0xfffffbffffffffff
+ sm3p1 x31, x1
+ sd x31, 16(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x31, 0x00000000ffffffff)
+
+ inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x00000000ffffffff), rs1:x31(0xfffff7ffffffffff)
+ li x31, 0xfffff7ffffffffff
+ sm3p1 x1, x31
+ sd x1, 24(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x1, 0x00000000ffffffff)
+
+ inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x00000000ffffffff), rs1:x30(0xffffefffffffffff)
+ li x30, 0xffffefffffffffff
+ sm3p1 x2, x30
+ sd x2, 32(x4)
+ RVMODEL_IO_ASSERT_GPR_EQ(x5, x2, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+ inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x00000000ffffffff), rs1:x29(0xffffdfffffffffff)
+ li x29, 0xffffdfffffffffff
+ sm3p1 x3, x29
+ sd x3, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x3, 0x00000000ffffffff)
+
+ inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x00000000ffffffff), rs1:x28(0xffffbfffffffffff)
+ li x28, 0xffffbfffffffffff
+ sm3p1 x4, x28
+ sd x4, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x4, 0x00000000ffffffff)
+
+ inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x00000000ffffffff), rs1:x27(0xffff7fffffffffff)
+ li x27, 0xffff7fffffffffff
+ sm3p1 x5, x27
+ sd x5, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x5, 0x00000000ffffffff)
+
+ inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x00000000ffffffff), rs1:x26(0xfffeffffffffffff)
+ li x26, 0xfffeffffffffffff
+ sm3p1 x6, x26
+ sd x6, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x6, 0x00000000ffffffff)
+
+ inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x00000000ffffffff), rs1:x25(0xfffdffffffffffff)
+ li x25, 0xfffdffffffffffff
+ sm3p1 x7, x25
+ sd x7, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x7, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+ inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x00000000ffffffff), rs1:x24(0xfffbffffffffffff)
+ li x24, 0xfffbffffffffffff
+ sm3p1 x8, x24
+ sd x8, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x8, 0x00000000ffffffff)
+
+ inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x00000000ffffffff), rs1:x23(0xfff7ffffffffffff)
+ li x23, 0xfff7ffffffffffff
+ sm3p1 x9, x23
+ sd x9, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x9, 0x00000000ffffffff)
+
+ inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x00000000ffffffff), rs1:x22(0xffefffffffffffff)
+ li x22, 0xffefffffffffffff
+ sm3p1 x10, x22
+ sd x10, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x10, 0x00000000ffffffff)
+
+ inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x00000000ffffffff), rs1:x21(0xffdfffffffffffff)
+ li x21, 0xffdfffffffffffff
+ sm3p1 x11, x21
+ sd x11, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x11, 0x00000000ffffffff)
+
+ inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x00000000ffffffff), rs1:x20(0xffbfffffffffffff)
+ li x20, 0xffbfffffffffffff
+ sm3p1 x12, x20
+ sd x12, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x12, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+ inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x00000000ffffffff), rs1:x19(0xff7fffffffffffff)
+ li x19, 0xff7fffffffffffff
+ sm3p1 x13, x19
+ sd x13, 0(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x13, 0x00000000ffffffff)
+
+ inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x00000000ffffffff), rs1:x18(0xfeffffffffffffff)
+ li x18, 0xfeffffffffffffff
+ sm3p1 x14, x18
+ sd x14, 8(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x14, 0x00000000ffffffff)
+
+ inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x00000000ffffffff), rs1:x17(0xfdffffffffffffff)
+ li x17, 0xfdffffffffffffff
+ sm3p1 x15, x17
+ sd x15, 16(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x15, 0x00000000ffffffff)
+
+ inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffffffff), rs1:x16(0xfbffffffffffffff)
+ li x16, 0xfbffffffffffffff
+ sm3p1 x16, x16
+ sd x16, 24(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x16, 0x00000000ffffffff)
+
+ inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x00000000ffffffff), rs1:x15(0xf7ffffffffffffff)
+ li x15, 0xf7ffffffffffffff
+ sm3p1 x17, x15
+ sd x17, 32(x5)
+ RVMODEL_IO_ASSERT_GPR_EQ(x6, x17, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+ inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x00000000ffffffff), rs1:x14(0xefffffffffffffff)
+ li x14, 0xefffffffffffffff
+ sm3p1 x18, x14
+ sd x18, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x18, 0x00000000ffffffff)
+
+ inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x00000000ffffffff), rs1:x13(0xdfffffffffffffff)
+ li x13, 0xdfffffffffffffff
+ sm3p1 x19, x13
+ sd x19, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x19, 0x00000000ffffffff)
+
+ inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x00000000ffffffff), rs1:x12(0xbfffffffffffffff)
+ li x12, 0xbfffffffffffffff
+ sm3p1 x20, x12
+ sd x20, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x20, 0x00000000ffffffff)
+
+ inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x00000000ffffffff), rs1:x11(0x7fffffffffffffff)
+ li x11, 0x7fffffffffffffff
+ sm3p1 x21, x11
+ sd x21, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x21, 0x00000000ffffffff)
+
+ inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x00000000ffffffff), rs1:x10(0xffffffffffffffff)
+ li x10, 0xffffffffffffffff
+ sm3p1 x22, x10
+ sd x22, 32(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x22, 0x00000000ffffffff)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+ inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x000000004ff67248), rs1:x9(0x10fd3dedadea5195)
+ li x9, 0x10fd3dedadea5195
+ sm3p1 x23, x9
+ sd x23, 0(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x23, 0x000000004ff67248)
+
+ inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1)
+ li x8, 0xbd295ce2d2ffbec1
+ sm3p1 x0, x8
+ sd x0, 8(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x0, 0x0000000000000000)
+
+ inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x0000000021680c1f), rs1:x7(0xc9649f05a8e1a8bb)
+ li x7, 0xc9649f05a8e1a8bb
+ sm3p1 x25, x7
+ sd x25, 16(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x25, 0x0000000021680c1f)
+
+ inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb)
+ li x0, 0x3541291848c99fcb
+ sm3p1 x26, x0
+ sd x26, 24(x1)
+ RVMODEL_IO_ASSERT_GPR_EQ(x2, x26, 0x0000000000000000)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SM4ED-01.S b/riscof/suite/rv64i_m/K_unratified/SM4ED-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..3b0e8a4e4fa4a7a5d0dc37159f9e049beb620279
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SM4ED-01.S
@@ -0,0 +1,1892 @@
+// RISC-V Architectural Validation Test SM4ED-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sm4ed'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",sm4ed)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x000000005f803b0d), rs1=>rd:x1(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23), imm:0x3
+ TEST_RI_OP(sm4ed, x1, x16, 0x3, 0x000000005f803b0d, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x0000000058f5b441), rs1=>rd:x2(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b), imm:0x3
+ TEST_RI_OP(sm4ed, x2, x15, 0x3, 0x0000000058f5b441, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x000000009ed72702), rs1=>rd:x3(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0), imm:0x0
+ TEST_RI_OP(sm4ed, x3, x14, 0x0, 0x000000009ed72702, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x00000000856c3aa3), rs1=>rd:x4(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3), imm:0x3
+ TEST_RI_OP(sm4ed, x4, x13, 0x3, 0x00000000856c3aa3, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x00000000c31b54cc), rs1=>rd:x5(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af), imm:0x3
+ TEST_RI_OP(sm4ed, x5, x12, 0x3, 0x00000000c31b54cc, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x0000000019d64cb8), rs1=>rd:x6(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f), imm:0x3
+ TEST_RI_OP(sm4ed, x6, x11, 0x3, 0x0000000019d64cb8, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x000000006e95f542), rs1=>rd:x7(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb), imm:0x3
+ TEST_RI_OP(sm4ed, x7, x10, 0x3, 0x000000006e95f542, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x00000000b079f103), rs1=>rd:x8(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb), imm:0x3
+ TEST_RI_OP(sm4ed, x8, x9, 0x3, 0x00000000b079f103, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x00000000c9272736), rs1=>rd:x9(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1), imm:0x1
+ TEST_RI_OP(sm4ed, x9, x8, 0x1, 0x00000000c9272736, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x00000000bf710b8e), rs1=>rd:x10(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195), imm:0x1
+ TEST_RI_OP(sm4ed, x10, x7, 0x1, 0x00000000bf710b8e, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000068212148), rs1=>rd:x11(0x0000000000000001), rs2:x6(0xffffffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x11, x6, 0x3, 0x0000000068212148, 0x0000000000000001, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000021496823), rs1=>rd:x12(0x0000000000000002), rs2:x5(0x7fffffffffffffff), imm:0x1
+ TEST_RI_OP(sm4ed, x12, x5, 0x1, 0x0000000021496823, 0x0000000000000002, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000049682125), rs1=>rd:x13(0x0000000000000004), rs2:x4(0xbfffffffffffffff), imm:0x2
+ TEST_RI_OP(sm4ed, x13, x4, 0x2, 0x0000000049682125, 0x0000000000000004, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000021214960), rs1=>rd:x14(0x0000000000000008), rs2:x3(0xdfffffffffffffff), imm:0x0
+ TEST_RI_OP(sm4ed, x14, x3, 0x0, 0x0000000021214960, 0x0000000000000008, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000049682131), rs1=>rd:x15(0x0000000000000010), rs2:x2(0xefffffffffffffff), imm:0x2
+ TEST_RI_OP(sm4ed, x15, x2, 0x2, 0x0000000049682131, 0x0000000000000010, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000021496801), rs1=>rd:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff), imm:0x1
+ TEST_RI_OP(sm4ed, x16, x1, 0x1, 0x0000000021496801, 0x0000000000000020, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000068212109), rs1=>rd:x17(0x0000000000000040), rs2:x31(0xfbffffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x17, x31, 0x3, 0x0000000068212109, 0x0000000000000040, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00000000682121c9), rs1=>rd:x18(0x0000000000000080), rs2:x30(0xfdffffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x18, x30, 0x3, 0x00000000682121c9, 0x0000000000000080, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000021214868), rs1=>rd:x19(0x0000000000000100), rs2:x29(0xfeffffffffffffff), imm:0x0
+ TEST_RI_OP(sm4ed, x19, x29, 0x0, 0x0000000021214868, 0x0000000000000100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000068212349), rs1=>rd:x20(0x0000000000000200), rs2:x28(0xff7fffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x20, x28, 0x3, 0x0000000068212349, 0x0000000000000200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000068212549), rs1=>rd:x21(0x0000000000000400), rs2:x27(0xffbfffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x21, x27, 0x3, 0x0000000068212549, 0x0000000000000400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000068212949), rs1=>rd:x22(0x0000000000000800), rs2:x26(0xffdfffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x22, x26, 0x3, 0x0000000068212949, 0x0000000000000800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000068213149), rs1=>rd:x23(0x0000000000001000), rs2:x25(0xffefffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x23, x25, 0x3, 0x0000000068213149, 0x0000000000001000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000097dedeb6), rs1=>rd:x24(0x0000000000002000), rs2:x24(0xfff7ffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x24, x24, 0x3, 0x0000000097dedeb6, 0x0000000000002000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000021492821), rs1=>rd:x25(0x0000000000004000), rs2:x23(0xfffbffffffffffff), imm:0x1
+ TEST_RI_OP(sm4ed, x25, x23, 0x1, 0x0000000021492821, 0x0000000000004000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x000000002149e821), rs1=>rd:x26(0x0000000000008000), rs2:x22(0xfffdffffffffffff), imm:0x1
+ TEST_RI_OP(sm4ed, x26, x22, 0x1, 0x000000002149e821, 0x0000000000008000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000068202149), rs1=>rd:x27(0x0000000000010000), rs2:x21(0xfffeffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x27, x21, 0x3, 0x0000000068202149, 0x0000000000010000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x00000000214b6821), rs1=>rd:x28(0x0000000000020000), rs2:x20(0xffff7fffffffffff), imm:0x1
+ TEST_RI_OP(sm4ed, x28, x20, 0x1, 0x00000000214b6821, 0x0000000000020000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00000000496c2121), rs1=>rd:x29(0x0000000000040000), rs2:x19(0xffffbfffffffffff), imm:0x2
+ TEST_RI_OP(sm4ed, x29, x19, 0x2, 0x00000000496c2121, 0x0000000000040000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000021294968), rs1=>rd:x30(0x0000000000080000), rs2:x18(0xffffdfffffffffff), imm:0x0
+ TEST_RI_OP(sm4ed, x30, x18, 0x0, 0x0000000021294968, 0x0000000000080000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000049782121), rs1=>rd:x31(0x0000000000100000), rs2:x17(0xffffefffffffffff), imm:0x2
+ TEST_RI_OP(sm4ed, x31, x17, 0x2, 0x0000000049782121, 0x0000000000100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000021696821), rs1=>rd:x1(0x0000000000200000), rs2:x16(0xfffff7ffffffffff), imm:0x1
+ TEST_RI_OP(sm4ed, x1, x16, 0x1, 0x0000000021696821, 0x0000000000200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000068612149), rs1=>rd:x2(0x0000000000400000), rs2:x15(0xfffffbffffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x2, x15, 0x3, 0x0000000068612149, 0x0000000000400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000068a12149), rs1=>rd:x3(0x0000000000800000), rs2:x14(0xfffffdffffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x3, x14, 0x3, 0x0000000068a12149, 0x0000000000800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000020214968), rs1=>rd:x4(0x0000000001000000), rs2:x13(0xfffffeffffffffff), imm:0x0
+ TEST_RI_OP(sm4ed, x4, x13, 0x0, 0x0000000020214968, 0x0000000001000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x000000006a212149), rs1=>rd:x5(0x0000000002000000), rs2:x12(0xffffff7fffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x5, x12, 0x3, 0x000000006a212149, 0x0000000002000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x000000006c212149), rs1=>rd:x6(0x0000000004000000), rs2:x11(0xffffffbfffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x6, x11, 0x3, 0x000000006c212149, 0x0000000004000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000060212149), rs1=>rd:x7(0x0000000008000000), rs2:x10(0xffffffdfffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x7, x10, 0x3, 0x0000000060212149, 0x0000000008000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000078212149), rs1=>rd:x8(0x0000000010000000), rs2:x9(0xffffffefffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x8, x9, 0x3, 0x0000000078212149, 0x0000000010000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000048212149), rs1=>rd:x9(0x0000000020000000), rs2:x8(0xfffffff7ffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x9, x8, 0x3, 0x0000000048212149, 0x0000000020000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000061496821), rs1=>rd:x10(0x0000000040000000), rs2:x7(0xfffffffbffffffff), imm:0x1
+ TEST_RI_OP(sm4ed, x10, x7, 0x1, 0x0000000061496821, 0x0000000040000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x00000000a1496821), rs1=>rd:x11(0x0000000080000000), rs2:x6(0xfffffffdffffffff), imm:0x1
+ TEST_RI_OP(sm4ed, x11, x6, 0x1, 0x00000000a1496821, 0x0000000080000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000068212149), rs1=>rd:x12(0x0000000100000000), rs2:x5(0xfffffffeffffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x12, x5, 0x3, 0x0000000068212149, 0x0000000100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000021496821), rs1=>rd:x13(0x0000000200000000), rs2:x4(0xffffffff7fffffff), imm:0x1
+ TEST_RI_OP(sm4ed, x13, x4, 0x1, 0x0000000021496821, 0x0000000200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000049682121), rs1=>rd:x14(0x0000000400000000), rs2:x3(0xffffffffbfffffff), imm:0x2
+ TEST_RI_OP(sm4ed, x14, x3, 0x2, 0x0000000049682121, 0x0000000400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000021214968), rs1=>rd:x15(0x0000000800000000), rs2:x2(0xffffffffdfffffff), imm:0x0
+ TEST_RI_OP(sm4ed, x15, x2, 0x0, 0x0000000021214968, 0x0000000800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000049682121), rs1=>rd:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff), imm:0x2
+ TEST_RI_OP(sm4ed, x16, x1, 0x2, 0x0000000049682121, 0x0000001000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000021496821), rs1=>rd:x17(0x0000002000000000), rs2:x31(0xfffffffff7ffffff), imm:0x1
+ TEST_RI_OP(sm4ed, x17, x31, 0x1, 0x0000000021496821, 0x0000002000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x00000000c6f8f83e), rs1=>rd:x18(0x0000004000000000), rs2:x30(0xfffffffffbffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x18, x30, 0x3, 0x00000000c6f8f83e, 0x0000004000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x00000000e72f2fc8), rs1=>rd:x19(0x0000008000000000), rs2:x29(0xfffffffffdffffff), imm:0x3
+ TEST_RI_OP(sm4ed, x19, x29, 0x3, 0x00000000e72f2fc8, 0x0000008000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000021214968), rs1=>rd:x20(0x0000010000000000), rs2:x28(0xfffffffffeffffff), imm:0x0
+ TEST_RI_OP(sm4ed, x20, x28, 0x0, 0x0000000021214968, 0x0000010000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000068212149), rs1=>rd:x21(0x0000020000000000), rs2:x27(0xffffffffff7fffff), imm:0x3
+ TEST_RI_OP(sm4ed, x21, x27, 0x3, 0x0000000068212149, 0x0000020000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000068212149), rs1=>rd:x22(0x0000040000000000), rs2:x26(0xffffffffffbfffff), imm:0x3
+ TEST_RI_OP(sm4ed, x22, x26, 0x3, 0x0000000068212149, 0x0000040000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000068212149), rs1=>rd:x23(0x0000080000000000), rs2:x25(0xffffffffffdfffff), imm:0x3
+ TEST_RI_OP(sm4ed, x23, x25, 0x3, 0x0000000068212149, 0x0000080000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000097cedeb6), rs1=>rd:x24(0x0000100000000000), rs2:x24(0xffffffffffefffff), imm:0x3
+ TEST_RI_OP(sm4ed, x24, x24, 0x3, 0x0000000097cedeb6, 0x0000100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000068212149), rs1=>rd:x25(0x0000200000000000), rs2:x23(0xfffffffffff7ffff), imm:0x3
+ TEST_RI_OP(sm4ed, x25, x23, 0x3, 0x0000000068212149, 0x0000200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000021496821), rs1=>rd:x26(0x0000400000000000), rs2:x22(0xfffffffffffbffff), imm:0x1
+ TEST_RI_OP(sm4ed, x26, x22, 0x1, 0x0000000021496821, 0x0000400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000021496821), rs1=>rd:x27(0x0000800000000000), rs2:x21(0xfffffffffffdffff), imm:0x1
+ TEST_RI_OP(sm4ed, x27, x21, 0x1, 0x0000000021496821, 0x0000800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000068212149), rs1=>rd:x28(0x0001000000000000), rs2:x20(0xfffffffffffeffff), imm:0x3
+ TEST_RI_OP(sm4ed, x28, x20, 0x3, 0x0000000068212149, 0x0001000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x000000007a9ce67a), rs1=>rd:x29(0x0002000000000000), rs2:x19(0xffffffffffff7fff), imm:0x1
+ TEST_RI_OP(sm4ed, x29, x19, 0x1, 0x000000007a9ce67a, 0x0002000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000049682121), rs1=>rd:x30(0x0004000000000000), rs2:x18(0xffffffffffffbfff), imm:0x2
+ TEST_RI_OP(sm4ed, x30, x18, 0x2, 0x0000000049682121, 0x0004000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000021214968), rs1=>rd:x31(0x0008000000000000), rs2:x17(0xffffffffffffdfff), imm:0x0
+ TEST_RI_OP(sm4ed, x31, x17, 0x0, 0x0000000021214968, 0x0008000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000049682121), rs1=>rd:x1(0x0010000000000000), rs2:x16(0xffffffffffffefff), imm:0x2
+ TEST_RI_OP(sm4ed, x1, x16, 0x2, 0x0000000049682121, 0x0010000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x000000008020a080), rs1=>rd:x2(0x0020000000000000), rs2:x15(0xfffffffffffff7ff), imm:0x1
+ TEST_RI_OP(sm4ed, x2, x15, 0x1, 0x000000008020a080, 0x0020000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000068212149), rs1=>rd:x3(0x0040000000000000), rs2:x14(0xfffffffffffffbff), imm:0x3
+ TEST_RI_OP(sm4ed, x3, x14, 0x3, 0x0000000068212149, 0x0040000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000068212149), rs1=>rd:x4(0x0080000000000000), rs2:x13(0xfffffffffffffdff), imm:0x3
+ TEST_RI_OP(sm4ed, x4, x13, 0x3, 0x0000000068212149, 0x0080000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000021214968), rs1=>rd:x5(0x0100000000000000), rs2:x12(0xfffffffffffffeff), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0x0000000021214968, 0x0100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000068212149), rs1=>rd:x6(0x0200000000000000), rs2:x11(0xffffffffffffff7f), imm:0x3
+ TEST_RI_OP(sm4ed, x6, x11, 0x3, 0x0000000068212149, 0x0200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000068212149), rs1=>rd:x7(0x0400000000000000), rs2:x10(0xffffffffffffffbf), imm:0x3
+ TEST_RI_OP(sm4ed, x7, x10, 0x3, 0x0000000068212149, 0x0400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000068212149), rs1=>rd:x8(0x0800000000000000), rs2:x9(0xffffffffffffffdf), imm:0x3
+ TEST_RI_OP(sm4ed, x8, x9, 0x3, 0x0000000068212149, 0x0800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000068212149), rs1=>rd:x9(0x1000000000000000), rs2:x8(0xffffffffffffffef), imm:0x3
+ TEST_RI_OP(sm4ed, x9, x8, 0x3, 0x0000000068212149, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000068212149), rs1=>rd:x10(0x2000000000000000), rs2:x7(0xfffffffffffffff7), imm:0x3
+ TEST_RI_OP(sm4ed, x10, x7, 0x3, 0x0000000068212149, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000021496821), rs1=>rd:x11(0x4000000000000000), rs2:x6(0xfffffffffffffffb), imm:0x1
+ TEST_RI_OP(sm4ed, x11, x6, 0x1, 0x0000000021496821, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000021496821), rs1=>rd:x12(0x8000000000000000), rs2:x5(0xfffffffffffffffd), imm:0x1
+ TEST_RI_OP(sm4ed, x12, x5, 0x1, 0x0000000021496821, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000068212149), rs1=>rd:x13(0x0000000000000000), rs2:x4(0xfffffffffffffffe), imm:0x3
+ TEST_RI_OP(sm4ed, x13, x4, 0x3, 0x0000000068212149, 0x0000000000000000, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x00000000a42a71a5), rs1=>rd:x14(0xfffffffffffffffe), rs2:x3(0x0000000000000000), imm:0x1
+ TEST_RI_OP(sm4ed, x14, x3, 0x1, 0x00000000a42a71a5, 0xfffffffffffffffe, 0x0000000000000000, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x000000002a71a4a6), rs1=>rd:x15(0xfffffffffffffffd), rs2:x2(0x8000000000000000), imm:0x2
+ TEST_RI_OP(sm4ed, x15, x2, 0x2, 0x000000002a71a4a6, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00000000a4a42a75), rs1=>rd:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x16, x1, 0x0, 0x00000000a4a42a75, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x000000002a71a4ac), rs1=>rd:x17(0xfffffffffffffff7), rs2:x31(0x2000000000000000), imm:0x2
+ TEST_RI_OP(sm4ed, x17, x31, 0x2, 0x000000002a71a4ac, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000000a42a71b4), rs1=>rd:x18(0xffffffffffffffef), rs2:x30(0x1000000000000000), imm:0x1
+ TEST_RI_OP(sm4ed, x18, x30, 0x1, 0x00000000a42a71b4, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x0000000071a4a40a), rs1=>rd:x19(0xffffffffffffffdf), rs2:x29(0x0800000000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x19, x29, 0x3, 0x0000000071a4a40a, 0xffffffffffffffdf, 0x0800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x0000000071a4a46a), rs1=>rd:x20(0xffffffffffffffbf), rs2:x28(0x0400000000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x20, x28, 0x3, 0x0000000071a4a46a, 0xffffffffffffffbf, 0x0400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x00000000a4a42af1), rs1=>rd:x21(0xffffffffffffff7f), rs2:x27(0x0200000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x21, x27, 0x0, 0x00000000a4a42af1, 0xffffffffffffff7f, 0x0200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x0000000071a4a52a), rs1=>rd:x22(0xfffffffffffffeff), rs2:x26(0x0100000000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x22, x26, 0x3, 0x0000000071a4a52a, 0xfffffffffffffeff, 0x0100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x0000000071a4a62a), rs1=>rd:x23(0xfffffffffffffdff), rs2:x25(0x0080000000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x23, x25, 0x3, 0x0000000071a4a62a, 0xfffffffffffffdff, 0x0080000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x000000008e5b5bd5), rs1=>rd:x24(0xfffffffffffffbff), rs2:x24(0x0040000000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x24, x24, 0x3, 0x000000008e5b5bd5, 0xfffffffffffffbff, 0x0040000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x0000000071a4ac2a), rs1=>rd:x25(0xfffffffffffff7ff), rs2:x23(0x0020000000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x25, x23, 0x3, 0x0000000071a4ac2a, 0xfffffffffffff7ff, 0x0020000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x0000000071a4b42a), rs1=>rd:x26(0xffffffffffffefff), rs2:x22(0x0010000000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x26, x22, 0x3, 0x0000000071a4b42a, 0xffffffffffffefff, 0x0010000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000a42a51a4), rs1=>rd:x27(0xffffffffffffdfff), rs2:x21(0x0008000000000000), imm:0x1
+ TEST_RI_OP(sm4ed, x27, x21, 0x1, 0x00000000a42a51a4, 0xffffffffffffdfff, 0x0008000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000a42a31a4), rs1=>rd:x28(0xffffffffffffbfff), rs2:x20(0x0004000000000000), imm:0x1
+ TEST_RI_OP(sm4ed, x28, x20, 0x1, 0x00000000a42a31a4, 0xffffffffffffbfff, 0x0004000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x0000000071a4242a), rs1=>rd:x29(0xffffffffffff7fff), rs2:x19(0x0002000000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x29, x19, 0x3, 0x0000000071a4242a, 0xffffffffffff7fff, 0x0002000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000a42b71a4), rs1=>rd:x30(0xfffffffffffeffff), rs2:x18(0x0001000000000000), imm:0x1
+ TEST_RI_OP(sm4ed, x30, x18, 0x1, 0x00000000a42b71a4, 0xfffffffffffeffff, 0x0001000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x000000002a73a4a4), rs1=>rd:x31(0xfffffffffffdffff), rs2:x17(0x0000800000000000), imm:0x2
+ TEST_RI_OP(sm4ed, x31, x17, 0x2, 0x000000002a73a4a4, 0xfffffffffffdffff, 0x0000800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x00000000a4a02a71), rs1=>rd:x1(0xfffffffffffbffff), rs2:x16(0x0000400000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x1, x16, 0x0, 0x00000000a4a02a71, 0xfffffffffffbffff, 0x0000400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x000000002a79a4a4), rs1=>rd:x2(0xfffffffffff7ffff), rs2:x15(0x0000200000000000), imm:0x2
+ TEST_RI_OP(sm4ed, x2, x15, 0x2, 0x000000002a79a4a4, 0xfffffffffff7ffff, 0x0000200000000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000a43a71a4), rs1=>rd:x3(0xffffffffffefffff), rs2:x14(0x0000100000000000), imm:0x1
+ TEST_RI_OP(sm4ed, x3, x14, 0x1, 0x00000000a43a71a4, 0xffffffffffefffff, 0x0000100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x000000007184a42a), rs1=>rd:x4(0xffffffffffdfffff), rs2:x13(0x0000080000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x4, x13, 0x3, 0x000000007184a42a, 0xffffffffffdfffff, 0x0000080000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x0000000071e4a42a), rs1=>rd:x5(0xffffffffffbfffff), rs2:x12(0x0000040000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x5, x12, 0x3, 0x0000000071e4a42a, 0xffffffffffbfffff, 0x0000040000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x00000000a4242a71), rs1=>rd:x6(0xffffffffff7fffff), rs2:x11(0x0000020000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x6, x11, 0x0, 0x00000000a4242a71, 0xffffffffff7fffff, 0x0000020000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x0000000070a4a42a), rs1=>rd:x7(0xfffffffffeffffff), rs2:x10(0x0000010000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x7, x10, 0x3, 0x0000000070a4a42a, 0xfffffffffeffffff, 0x0000010000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x0000000073a4a42a), rs1=>rd:x8(0xfffffffffdffffff), rs2:x9(0x0000008000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x8, x9, 0x3, 0x0000000073a4a42a, 0xfffffffffdffffff, 0x0000008000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x0000000075a4a42a), rs1=>rd:x9(0xfffffffffbffffff), rs2:x8(0x0000004000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x9, x8, 0x3, 0x0000000075a4a42a, 0xfffffffffbffffff, 0x0000004000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x0000000079a4a42a), rs1=>rd:x10(0xfffffffff7ffffff), rs2:x7(0x0000002000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x10, x7, 0x3, 0x0000000079a4a42a, 0xfffffffff7ffffff, 0x0000002000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x0000000061a4a42a), rs1=>rd:x11(0xffffffffefffffff), rs2:x6(0x0000001000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x11, x6, 0x3, 0x0000000061a4a42a, 0xffffffffefffffff, 0x0000001000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000842a71a4), rs1=>rd:x12(0xffffffffdfffffff), rs2:x5(0x0000000800000000), imm:0x1
+ TEST_RI_OP(sm4ed, x12, x5, 0x1, 0x00000000842a71a4, 0xffffffffdfffffff, 0x0000000800000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000e42a71a4), rs1=>rd:x13(0xffffffffbfffffff), rs2:x4(0x0000000400000000), imm:0x1
+ TEST_RI_OP(sm4ed, x13, x4, 0x1, 0x00000000e42a71a4, 0xffffffffbfffffff, 0x0000000400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000000f1a4a42a), rs1=>rd:x14(0xffffffff7fffffff), rs2:x3(0x0000000200000000), imm:0x3
+ TEST_RI_OP(sm4ed, x14, x3, 0x3, 0x00000000f1a4a42a, 0xffffffff7fffffff, 0x0000000200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000a42a71a4), rs1=>rd:x15(0xfffffffeffffffff), rs2:x2(0x0000000100000000), imm:0x1
+ TEST_RI_OP(sm4ed, x15, x2, 0x1, 0x00000000a42a71a4, 0xfffffffeffffffff, 0x0000000100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x000000002a71a4a4), rs1=>rd:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000), imm:0x2
+ TEST_RI_OP(sm4ed, x16, x1, 0x2, 0x000000002a71a4a4, 0xfffffffdffffffff, 0x0000000080000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x00000000a4a42a71), rs1=>rd:x17(0xfffffffbffffffff), rs2:x31(0x0000000040000000), imm:0x0
+ TEST_RI_OP(sm4ed, x17, x31, 0x0, 0x00000000a4a42a71, 0xfffffffbffffffff, 0x0000000040000000, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x000000002a71a4a4), rs1=>rd:x18(0xfffffff7ffffffff), rs2:x30(0x0000000020000000), imm:0x2
+ TEST_RI_OP(sm4ed, x18, x30, 0x2, 0x000000002a71a4a4, 0xfffffff7ffffffff, 0x0000000020000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x00000000a42a71a4), rs1=>rd:x19(0xffffffefffffffff), rs2:x29(0x0000000010000000), imm:0x1
+ TEST_RI_OP(sm4ed, x19, x29, 0x1, 0x00000000a42a71a4, 0xffffffefffffffff, 0x0000000010000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x00000000b1a7a7e9), rs1=>rd:x20(0xffffffdfffffffff), rs2:x28(0x0000000008000000), imm:0x3
+ TEST_RI_OP(sm4ed, x20, x28, 0x3, 0x00000000b1a7a7e9, 0xffffffdfffffffff, 0x0000000008000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x0000000003cccc30), rs1=>rd:x21(0xffffffbfffffffff), rs2:x27(0x0000000004000000), imm:0x3
+ TEST_RI_OP(sm4ed, x21, x27, 0x3, 0x0000000003cccc30, 0xffffffbfffffffff, 0x0000000004000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x00000000a4a42a71), rs1=>rd:x22(0xffffff7fffffffff), rs2:x26(0x0000000002000000), imm:0x0
+ TEST_RI_OP(sm4ed, x22, x26, 0x0, 0x00000000a4a42a71, 0xffffff7fffffffff, 0x0000000002000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x000000002fbdbd6d), rs1=>rd:x23(0xfffffeffffffffff), rs2:x25(0x0000000001000000), imm:0x3
+ TEST_RI_OP(sm4ed, x23, x25, 0x3, 0x000000002fbdbd6d, 0xfffffeffffffffff, 0x0000000001000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x000000008edb5bd5), rs1=>rd:x24(0xfffffdffffffffff), rs2:x24(0x0000000000800000), imm:0x3
+ TEST_RI_OP(sm4ed, x24, x24, 0x3, 0x000000008edb5bd5, 0xfffffdffffffffff, 0x0000000000800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x0000000071a4a42a), rs1=>rd:x25(0xfffffbffffffffff), rs2:x23(0x0000000000400000), imm:0x3
+ TEST_RI_OP(sm4ed, x25, x23, 0x3, 0x0000000071a4a42a, 0xfffffbffffffffff, 0x0000000000400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x0000000071a4a42a), rs1=>rd:x26(0xfffff7ffffffffff), rs2:x22(0x0000000000200000), imm:0x3
+ TEST_RI_OP(sm4ed, x26, x22, 0x3, 0x0000000071a4a42a, 0xfffff7ffffffffff, 0x0000000000200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x0000000071a4a42a), rs1=>rd:x27(0xffffefffffffffff), rs2:x21(0x0000000000100000), imm:0x3
+ TEST_RI_OP(sm4ed, x27, x21, 0x3, 0x0000000071a4a42a, 0xffffefffffffffff, 0x0000000000100000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x00000000a42a71a4), rs1=>rd:x28(0xffffdfffffffffff), rs2:x20(0x0000000000080000), imm:0x1
+ TEST_RI_OP(sm4ed, x28, x20, 0x1, 0x00000000a42a71a4, 0xffffdfffffffffff, 0x0000000000080000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x00000000a42a71a4), rs1=>rd:x29(0xffffbfffffffffff), rs2:x19(0x0000000000040000), imm:0x1
+ TEST_RI_OP(sm4ed, x29, x19, 0x1, 0x00000000a42a71a4, 0xffffbfffffffffff, 0x0000000000040000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x0000000071a4a42a), rs1=>rd:x30(0xffff7fffffffffff), rs2:x18(0x0000000000020000), imm:0x3
+ TEST_RI_OP(sm4ed, x30, x18, 0x3, 0x0000000071a4a42a, 0xffff7fffffffffff, 0x0000000000020000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x00000000a42a71a4), rs1=>rd:x31(0xfffeffffffffffff), rs2:x17(0x0000000000010000), imm:0x1
+ TEST_RI_OP(sm4ed, x31, x17, 0x1, 0x00000000a42a71a4, 0xfffeffffffffffff, 0x0000000000010000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x000000002a71a4a4), rs1=>rd:x1(0xfffdffffffffffff), rs2:x16(0x0000000000008000), imm:0x2
+ TEST_RI_OP(sm4ed, x1, x16, 0x2, 0x000000002a71a4a4, 0xfffdffffffffffff, 0x0000000000008000, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x00000000a4a42a71), rs1=>rd:x2(0xfffbffffffffffff), rs2:x15(0x0000000000004000), imm:0x0
+ TEST_RI_OP(sm4ed, x2, x15, 0x0, 0x00000000a4a42a71, 0xfffbffffffffffff, 0x0000000000004000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x000000002a71a4a4), rs1=>rd:x3(0xfff7ffffffffffff), rs2:x14(0x0000000000002000), imm:0x2
+ TEST_RI_OP(sm4ed, x3, x14, 0x2, 0x000000002a71a4a4, 0xfff7ffffffffffff, 0x0000000000002000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x0000000053d47853), rs1=>rd:x4(0xffefffffffffffff), rs2:x13(0x0000000000001000), imm:0x1
+ TEST_RI_OP(sm4ed, x4, x13, 0x1, 0x0000000053d47853, 0xffefffffffffffff, 0x0000000000001000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x0000000071a4a42a), rs1=>rd:x5(0xffdfffffffffffff), rs2:x12(0x0000000000000800), imm:0x3
+ TEST_RI_OP(sm4ed, x5, x12, 0x3, 0x0000000071a4a42a, 0xffdfffffffffffff, 0x0000000000000800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x0000000071a4a42a), rs1=>rd:x6(0xffbfffffffffffff), rs2:x11(0x0000000000000400), imm:0x3
+ TEST_RI_OP(sm4ed, x6, x11, 0x3, 0x0000000071a4a42a, 0xffbfffffffffffff, 0x0000000000000400, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x00000000a4a42a71), rs1=>rd:x7(0xff7fffffffffffff), rs2:x10(0x0000000000000200), imm:0x0
+ TEST_RI_OP(sm4ed, x7, x10, 0x0, 0x00000000a4a42a71, 0xff7fffffffffffff, 0x0000000000000200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x00000000a4a42a71), rs1=>rd:x8(0xfeffffffffffffff), rs2:x9(0x0000000000000100), imm:0x0
+ TEST_RI_OP(sm4ed, x8, x9, 0x0, 0x00000000a4a42a71, 0xfeffffffffffffff, 0x0000000000000100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00000000545416bd), rs1=>rd:x9(0xfdffffffffffffff), rs2:x8(0x0000000000000080), imm:0x0
+ TEST_RI_OP(sm4ed, x9, x8, 0x0, 0x00000000545416bd, 0xfdffffffffffffff, 0x0000000000000080, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x00000000e2e2b9a4), rs1=>rd:x10(0xfbffffffffffffff), rs2:x7(0x0000000000000040), imm:0x0
+ TEST_RI_OP(sm4ed, x10, x7, 0x0, 0x00000000e2e2b9a4, 0xfbffffffffffffff, 0x0000000000000040, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x000000008d8d6113), rs1=>rd:x11(0xf7ffffffffffffff), rs2:x6(0x0000000000000020), imm:0x0
+ TEST_RI_OP(sm4ed, x11, x6, 0x0, 0x000000008d8d6113, 0xf7ffffffffffffff, 0x0000000000000020, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x000000005353d478), rs1=>rd:x12(0xefffffffffffffff), rs2:x5(0x0000000000000010), imm:0x0
+ TEST_RI_OP(sm4ed, x12, x5, 0x0, 0x000000005353d478, 0xefffffffffffffff, 0x0000000000000010, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x00000000a7a7e9b1), rs1=>rd:x13(0xdfffffffffffffff), rs2:x4(0x0000000000000008), imm:0x0
+ TEST_RI_OP(sm4ed, x13, x4, 0x0, 0x00000000a7a7e9b1, 0xdfffffffffffffff, 0x0000000000000008, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x00000000cccc3003), rs1=>rd:x14(0xbfffffffffffffff), rs2:x3(0x0000000000000004), imm:0x0
+ TEST_RI_OP(sm4ed, x14, x3, 0x0, 0x00000000cccc3003, 0xbfffffffffffffff, 0x0000000000000004, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x00000000585815b2), rs1=>rd:x15(0x7fffffffffffffff), rs2:x2(0x0000000000000002), imm:0x0
+ TEST_RI_OP(sm4ed, x15, x2, 0x0, 0x00000000585815b2, 0x7fffffffffffffff, 0x0000000000000002, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x00000000bdbd6d2f), rs1=>rd:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001), imm:0x0
+ TEST_RI_OP(sm4ed, x16, x1, 0x0, 0x00000000bdbd6d2f, 0xffffffffffffffff, 0x0000000000000001, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x000000005b5bd58f), rs1=>rd:x17(0x0000000000000001), rs2:x31(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x17, x31, 0x0, 0x000000005b5bd58f, 0x0000000000000001, 0x0000000000000000, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x000000005b5bd58c), rs1=>rd:x18(0x0000000000000002), rs2:x30(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x18, x30, 0x0, 0x000000005b5bd58c, 0x0000000000000002, 0x0000000000000000, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x000000005b5bd58a), rs1=>rd:x19(0x0000000000000004), rs2:x29(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x19, x29, 0x0, 0x000000005b5bd58a, 0x0000000000000004, 0x0000000000000000, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x000000005b5bd586), rs1=>rd:x20(0x0000000000000008), rs2:x28(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x20, x28, 0x0, 0x000000005b5bd586, 0x0000000000000008, 0x0000000000000000, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x000000005b5bd59e), rs1=>rd:x21(0x0000000000000010), rs2:x27(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x21, x27, 0x0, 0x000000005b5bd59e, 0x0000000000000010, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x000000005b5bd5ae), rs1=>rd:x22(0x0000000000000020), rs2:x26(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x22, x26, 0x0, 0x000000005b5bd5ae, 0x0000000000000020, 0x0000000000000000, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x000000005b5bd5ce), rs1=>rd:x23(0x0000000000000040), rs2:x25(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x23, x25, 0x0, 0x000000005b5bd5ce, 0x0000000000000040, 0x0000000000000000, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x000000005b5bd58e), rs1=>rd:x24(0x0000000000000080), rs2:x24(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x24, x24, 0x0, 0x000000005b5bd58e, 0x0000000000000080, 0x0000000000000000, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x000000005b5bd48e), rs1=>rd:x25(0x0000000000000100), rs2:x23(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x25, x23, 0x0, 0x000000005b5bd48e, 0x0000000000000100, 0x0000000000000000, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x000000005b5bd78e), rs1=>rd:x26(0x0000000000000200), rs2:x22(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x26, x22, 0x0, 0x000000005b5bd78e, 0x0000000000000200, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x000000005b5bd18e), rs1=>rd:x27(0x0000000000000400), rs2:x21(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x27, x21, 0x0, 0x000000005b5bd18e, 0x0000000000000400, 0x0000000000000000, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x000000005b5bdd8e), rs1=>rd:x28(0x0000000000000800), rs2:x20(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x28, x20, 0x0, 0x000000005b5bdd8e, 0x0000000000000800, 0x0000000000000000, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x000000005b5bc58e), rs1=>rd:x29(0x0000000000001000), rs2:x19(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x29, x19, 0x0, 0x000000005b5bc58e, 0x0000000000001000, 0x0000000000000000, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x000000005b5bf58e), rs1=>rd:x30(0x0000000000002000), rs2:x18(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x30, x18, 0x0, 0x000000005b5bf58e, 0x0000000000002000, 0x0000000000000000, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x000000005b5b958e), rs1=>rd:x31(0x0000000000004000), rs2:x17(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x31, x17, 0x0, 0x000000005b5b958e, 0x0000000000004000, 0x0000000000000000, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x000000005b5b558e), rs1=>rd:x1(0x0000000000008000), rs2:x16(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x1, x16, 0x0, 0x000000005b5b558e, 0x0000000000008000, 0x0000000000000000, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x000000005b5ad58e), rs1=>rd:x2(0x0000000000010000), rs2:x15(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x2, x15, 0x0, 0x000000005b5ad58e, 0x0000000000010000, 0x0000000000000000, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x000000005b59d58e), rs1=>rd:x3(0x0000000000020000), rs2:x14(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x3, x14, 0x0, 0x000000005b59d58e, 0x0000000000020000, 0x0000000000000000, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x000000005b5fd58e), rs1=>rd:x4(0x0000000000040000), rs2:x13(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x4, x13, 0x0, 0x000000005b5fd58e, 0x0000000000040000, 0x0000000000000000, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x000000005b53d58e), rs1=>rd:x5(0x0000000000080000), rs2:x12(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0x000000005b53d58e, 0x0000000000080000, 0x0000000000000000, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x000000005b4bd58e), rs1=>rd:x6(0x0000000000100000), rs2:x11(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x6, x11, 0x0, 0x000000005b4bd58e, 0x0000000000100000, 0x0000000000000000, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x000000005b7bd58e), rs1=>rd:x7(0x0000000000200000), rs2:x10(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x7, x10, 0x0, 0x000000005b7bd58e, 0x0000000000200000, 0x0000000000000000, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x000000005b1bd58e), rs1=>rd:x8(0x0000000000400000), rs2:x9(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x8, x9, 0x0, 0x000000005b1bd58e, 0x0000000000400000, 0x0000000000000000, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x000000005bdbd58e), rs1=>rd:x9(0x0000000000800000), rs2:x8(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x9, x8, 0x0, 0x000000005bdbd58e, 0x0000000000800000, 0x0000000000000000, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x000000005a5bd58e), rs1=>rd:x10(0x0000000001000000), rs2:x7(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x10, x7, 0x0, 0x000000005a5bd58e, 0x0000000001000000, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x00000000595bd58e), rs1=>rd:x11(0x0000000002000000), rs2:x6(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x11, x6, 0x0, 0x00000000595bd58e, 0x0000000002000000, 0x0000000000000000, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x000000005f5bd58e), rs1=>rd:x12(0x0000000004000000), rs2:x5(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x12, x5, 0x0, 0x000000005f5bd58e, 0x0000000004000000, 0x0000000000000000, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x00000000535bd58e), rs1=>rd:x13(0x0000000008000000), rs2:x4(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x13, x4, 0x0, 0x00000000535bd58e, 0x0000000008000000, 0x0000000000000000, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x000000004b5bd58e), rs1=>rd:x14(0x0000000010000000), rs2:x3(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x14, x3, 0x0, 0x000000004b5bd58e, 0x0000000010000000, 0x0000000000000000, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x000000007b5bd58e), rs1=>rd:x15(0x0000000020000000), rs2:x2(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x15, x2, 0x0, 0x000000007b5bd58e, 0x0000000020000000, 0x0000000000000000, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x000000001b5bd58e), rs1=>rd:x16(0x0000000040000000), rs2:x1(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x16, x1, 0x0, 0x000000001b5bd58e, 0x0000000040000000, 0x0000000000000000, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x00000000db5bd58e), rs1=>rd:x17(0x0000000080000000), rs2:x31(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x17, x31, 0x0, 0x00000000db5bd58e, 0x0000000080000000, 0x0000000000000000, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x000000005b5bd58e), rs1=>rd:x18(0x0000000100000000), rs2:x30(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x18, x30, 0x0, 0x000000005b5bd58e, 0x0000000100000000, 0x0000000000000000, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x000000005b5bd58e), rs1=>rd:x19(0x0000000200000000), rs2:x29(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x19, x29, 0x0, 0x000000005b5bd58e, 0x0000000200000000, 0x0000000000000000, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x000000005b5bd58e), rs1=>rd:x20(0x0000000400000000), rs2:x28(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x20, x28, 0x0, 0x000000005b5bd58e, 0x0000000400000000, 0x0000000000000000, x2, 32, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x000000005b5bd58e), rs1=>rd:x21(0x0000000800000000), rs2:x27(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x21, x27, 0x0, 0x000000005b5bd58e, 0x0000000800000000, 0x0000000000000000, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x000000005b5bd58e), rs1=>rd:x22(0x0000001000000000), rs2:x26(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x22, x26, 0x0, 0x000000005b5bd58e, 0x0000001000000000, 0x0000000000000000, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x000000005b5bd58e), rs1=>rd:x23(0x0000002000000000), rs2:x25(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x23, x25, 0x0, 0x000000005b5bd58e, 0x0000002000000000, 0x0000000000000000, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x000000005b5bd58e), rs1=>rd:x24(0x0000004000000000), rs2:x24(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x24, x24, 0x0, 0x000000005b5bd58e, 0x0000004000000000, 0x0000000000000000, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x000000005b5bd58e), rs1=>rd:x25(0x0000008000000000), rs2:x23(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x25, x23, 0x0, 0x000000005b5bd58e, 0x0000008000000000, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x000000005b5bd58e), rs1=>rd:x26(0x0000010000000000), rs2:x22(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x26, x22, 0x0, 0x000000005b5bd58e, 0x0000010000000000, 0x0000000000000000, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x000000005b5bd58e), rs1=>rd:x27(0x0000020000000000), rs2:x21(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x27, x21, 0x0, 0x000000005b5bd58e, 0x0000020000000000, 0x0000000000000000, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x000000005b5bd58e), rs1=>rd:x28(0x0000040000000000), rs2:x20(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x28, x20, 0x0, 0x000000005b5bd58e, 0x0000040000000000, 0x0000000000000000, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x000000005b5bd58e), rs1=>rd:x29(0x0000080000000000), rs2:x19(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x29, x19, 0x0, 0x000000005b5bd58e, 0x0000080000000000, 0x0000000000000000, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x000000005b5bd58e), rs1=>rd:x30(0x0000100000000000), rs2:x18(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x30, x18, 0x0, 0x000000005b5bd58e, 0x0000100000000000, 0x0000000000000000, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x000000005b5bd58e), rs1=>rd:x31(0x0000200000000000), rs2:x17(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x31, x17, 0x0, 0x000000005b5bd58e, 0x0000200000000000, 0x0000000000000000, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x000000005b5bd58e), rs1=>rd:x1(0x0000400000000000), rs2:x16(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x1, x16, 0x0, 0x000000005b5bd58e, 0x0000400000000000, 0x0000000000000000, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x000000005b5bd58e), rs1=>rd:x2(0x0000800000000000), rs2:x15(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x2, x15, 0x0, 0x000000005b5bd58e, 0x0000800000000000, 0x0000000000000000, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x000000005b5bd58e), rs1=>rd:x3(0x0001000000000000), rs2:x14(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x3, x14, 0x0, 0x000000005b5bd58e, 0x0001000000000000, 0x0000000000000000, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x000000005b5bd58e), rs1=>rd:x4(0x0002000000000000), rs2:x13(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x4, x13, 0x0, 0x000000005b5bd58e, 0x0002000000000000, 0x0000000000000000, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x000000005b5bd58e), rs1=>rd:x5(0x0004000000000000), rs2:x12(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0x000000005b5bd58e, 0x0004000000000000, 0x0000000000000000, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x000000005b5bd58e), rs1=>rd:x6(0x0008000000000000), rs2:x11(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x6, x11, 0x0, 0x000000005b5bd58e, 0x0008000000000000, 0x0000000000000000, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x000000005b5bd58e), rs1=>rd:x7(0x0010000000000000), rs2:x10(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x7, x10, 0x0, 0x000000005b5bd58e, 0x0010000000000000, 0x0000000000000000, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x000000005b5bd58e), rs1=>rd:x8(0x0020000000000000), rs2:x9(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x8, x9, 0x0, 0x000000005b5bd58e, 0x0020000000000000, 0x0000000000000000, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x000000005b5bd58e), rs1=>rd:x9(0x0040000000000000), rs2:x8(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x9, x8, 0x0, 0x000000005b5bd58e, 0x0040000000000000, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x000000005b5bd58e), rs1=>rd:x10(0x0080000000000000), rs2:x7(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x10, x7, 0x0, 0x000000005b5bd58e, 0x0080000000000000, 0x0000000000000000, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x000000005b5bd58e), rs1=>rd:x11(0x0100000000000000), rs2:x6(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x11, x6, 0x0, 0x000000005b5bd58e, 0x0100000000000000, 0x0000000000000000, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x000000005b5bd58e), rs1=>rd:x12(0x0200000000000000), rs2:x5(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x12, x5, 0x0, 0x000000005b5bd58e, 0x0200000000000000, 0x0000000000000000, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x000000005b5bd58e), rs1=>rd:x13(0x0400000000000000), rs2:x4(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x13, x4, 0x0, 0x000000005b5bd58e, 0x0400000000000000, 0x0000000000000000, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x000000005b5bd58e), rs1=>rd:x14(0x0800000000000000), rs2:x3(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x14, x3, 0x0, 0x000000005b5bd58e, 0x0800000000000000, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x000000005b5bd58e), rs1=>rd:x15(0x1000000000000000), rs2:x2(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x15, x2, 0x0, 0x000000005b5bd58e, 0x1000000000000000, 0x0000000000000000, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x000000005b5bd58e), rs1=>rd:x16(0x2000000000000000), rs2:x1(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x16, x1, 0x0, 0x000000005b5bd58e, 0x2000000000000000, 0x0000000000000000, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x000000005b5bd58e), rs1=>rd:x17(0x4000000000000000), rs2:x31(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x17, x31, 0x0, 0x000000005b5bd58e, 0x4000000000000000, 0x0000000000000000, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x000000005b5bd58e), rs1=>rd:x18(0x8000000000000000), rs2:x30(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x18, x30, 0x0, 0x000000005b5bd58e, 0x8000000000000000, 0x0000000000000000, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x000000005b5bd58e), rs1=>rd:x19(0x0000000000000000), rs2:x29(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x19, x29, 0x0, 0x000000005b5bd58e, 0x0000000000000000, 0x0000000000000000, x3, 32, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x00000000a4a42a70), rs1=>rd:x20(0xfffffffffffffffe), rs2:x28(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x20, x28, 0x0, 0x00000000a4a42a70, 0xfffffffffffffffe, 0x0000000000000000, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x00000000a4a42a73), rs1=>rd:x21(0xfffffffffffffffd), rs2:x27(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x21, x27, 0x0, 0x00000000a4a42a73, 0xfffffffffffffffd, 0x0000000000000000, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x00000000a4a42a75), rs1=>rd:x22(0xfffffffffffffffb), rs2:x26(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x22, x26, 0x0, 0x00000000a4a42a75, 0xfffffffffffffffb, 0x0000000000000000, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x00000000a4a42a79), rs1=>rd:x23(0xfffffffffffffff7), rs2:x25(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x23, x25, 0x0, 0x00000000a4a42a79, 0xfffffffffffffff7, 0x0000000000000000, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x000000005b5bd58e), rs1=>rd:x24(0xffffffffffffffef), rs2:x24(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x24, x24, 0x0, 0x000000005b5bd58e, 0xffffffffffffffef, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x00000000a4a42a51), rs1=>rd:x25(0xffffffffffffffdf), rs2:x23(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x25, x23, 0x0, 0x00000000a4a42a51, 0xffffffffffffffdf, 0x0000000000000000, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x00000000a4a42a31), rs1=>rd:x26(0xffffffffffffffbf), rs2:x22(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x26, x22, 0x0, 0x00000000a4a42a31, 0xffffffffffffffbf, 0x0000000000000000, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x00000000a4a42af1), rs1=>rd:x27(0xffffffffffffff7f), rs2:x21(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x27, x21, 0x0, 0x00000000a4a42af1, 0xffffffffffffff7f, 0x0000000000000000, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x00000000a4a42b71), rs1=>rd:x28(0xfffffffffffffeff), rs2:x20(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x28, x20, 0x0, 0x00000000a4a42b71, 0xfffffffffffffeff, 0x0000000000000000, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x00000000a4a42871), rs1=>rd:x29(0xfffffffffffffdff), rs2:x19(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x29, x19, 0x0, 0x00000000a4a42871, 0xfffffffffffffdff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x00000000a4a42e71), rs1=>rd:x30(0xfffffffffffffbff), rs2:x18(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x30, x18, 0x0, 0x00000000a4a42e71, 0xfffffffffffffbff, 0x0000000000000000, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x00000000a4a42271), rs1=>rd:x31(0xfffffffffffff7ff), rs2:x17(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x31, x17, 0x0, 0x00000000a4a42271, 0xfffffffffffff7ff, 0x0000000000000000, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x00000000a4a43a71), rs1=>rd:x1(0xffffffffffffefff), rs2:x16(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x1, x16, 0x0, 0x00000000a4a43a71, 0xffffffffffffefff, 0x0000000000000000, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x00000000a4a40a71), rs1=>rd:x2(0xffffffffffffdfff), rs2:x15(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x2, x15, 0x0, 0x00000000a4a40a71, 0xffffffffffffdfff, 0x0000000000000000, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x00000000a4a46a71), rs1=>rd:x3(0xffffffffffffbfff), rs2:x14(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x3, x14, 0x0, 0x00000000a4a46a71, 0xffffffffffffbfff, 0x0000000000000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x00000000a4a4aa71), rs1=>rd:x4(0xffffffffffff7fff), rs2:x13(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x4, x13, 0x0, 0x00000000a4a4aa71, 0xffffffffffff7fff, 0x0000000000000000, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x00000000a4a52a71), rs1=>rd:x5(0xfffffffffffeffff), rs2:x12(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0x00000000a4a52a71, 0xfffffffffffeffff, 0x0000000000000000, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x00000000a4a62a71), rs1=>rd:x6(0xfffffffffffdffff), rs2:x11(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x6, x11, 0x0, 0x00000000a4a62a71, 0xfffffffffffdffff, 0x0000000000000000, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x00000000a4a02a71), rs1=>rd:x7(0xfffffffffffbffff), rs2:x10(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x7, x10, 0x0, 0x00000000a4a02a71, 0xfffffffffffbffff, 0x0000000000000000, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x00000000a4ac2a71), rs1=>rd:x8(0xfffffffffff7ffff), rs2:x9(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x8, x9, 0x0, 0x00000000a4ac2a71, 0xfffffffffff7ffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x00000000a4b42a71), rs1=>rd:x9(0xffffffffffefffff), rs2:x8(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x9, x8, 0x0, 0x00000000a4b42a71, 0xffffffffffefffff, 0x0000000000000000, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x00000000a4842a71), rs1=>rd:x10(0xffffffffffdfffff), rs2:x7(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x10, x7, 0x0, 0x00000000a4842a71, 0xffffffffffdfffff, 0x0000000000000000, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x00000000a4e42a71), rs1=>rd:x11(0xffffffffffbfffff), rs2:x6(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x11, x6, 0x0, 0x00000000a4e42a71, 0xffffffffffbfffff, 0x0000000000000000, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x00000000a4242a71), rs1=>rd:x12(0xffffffffff7fffff), rs2:x5(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x12, x5, 0x0, 0x00000000a4242a71, 0xffffffffff7fffff, 0x0000000000000000, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x00000000a5a42a71), rs1=>rd:x13(0xfffffffffeffffff), rs2:x4(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x13, x4, 0x0, 0x00000000a5a42a71, 0xfffffffffeffffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x00000000a6a42a71), rs1=>rd:x14(0xfffffffffdffffff), rs2:x3(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x14, x3, 0x0, 0x00000000a6a42a71, 0xfffffffffdffffff, 0x0000000000000000, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x00000000a0a42a71), rs1=>rd:x15(0xfffffffffbffffff), rs2:x2(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x15, x2, 0x0, 0x00000000a0a42a71, 0xfffffffffbffffff, 0x0000000000000000, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x00000000aca42a71), rs1=>rd:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x16, x1, 0x0, 0x00000000aca42a71, 0xfffffffff7ffffff, 0x0000000000000000, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x00000000b4a42a71), rs1=>rd:x17(0xffffffffefffffff), rs2:x31(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x17, x31, 0x0, 0x00000000b4a42a71, 0xffffffffefffffff, 0x0000000000000000, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x0000000084a42a71), rs1=>rd:x18(0xffffffffdfffffff), rs2:x30(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x18, x30, 0x0, 0x0000000084a42a71, 0xffffffffdfffffff, 0x0000000000000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x00000000e4a42a71), rs1=>rd:x19(0xffffffffbfffffff), rs2:x29(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x19, x29, 0x0, 0x00000000e4a42a71, 0xffffffffbfffffff, 0x0000000000000000, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x0000000024a42a71), rs1=>rd:x20(0xffffffff7fffffff), rs2:x28(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x20, x28, 0x0, 0x0000000024a42a71, 0xffffffff7fffffff, 0x0000000000000000, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x00000000a4a42a71), rs1=>rd:x21(0xfffffffeffffffff), rs2:x27(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x21, x27, 0x0, 0x00000000a4a42a71, 0xfffffffeffffffff, 0x0000000000000000, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x00000000a4a42a71), rs1=>rd:x22(0xfffffffdffffffff), rs2:x26(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x22, x26, 0x0, 0x00000000a4a42a71, 0xfffffffdffffffff, 0x0000000000000000, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x00000000a4a42a71), rs1=>rd:x23(0xfffffffbffffffff), rs2:x25(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x23, x25, 0x0, 0x00000000a4a42a71, 0xfffffffbffffffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x000000005b5bd58e), rs1=>rd:x24(0xfffffff7ffffffff), rs2:x24(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x24, x24, 0x0, 0x000000005b5bd58e, 0xfffffff7ffffffff, 0x0000000000000000, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x00000000a4a42a71), rs1=>rd:x25(0xffffffefffffffff), rs2:x23(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x25, x23, 0x0, 0x00000000a4a42a71, 0xffffffefffffffff, 0x0000000000000000, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x00000000a4a42a71), rs1=>rd:x26(0xffffffdfffffffff), rs2:x22(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x26, x22, 0x0, 0x00000000a4a42a71, 0xffffffdfffffffff, 0x0000000000000000, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x00000000a4a42a71), rs1=>rd:x27(0xffffffbfffffffff), rs2:x21(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x27, x21, 0x0, 0x00000000a4a42a71, 0xffffffbfffffffff, 0x0000000000000000, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x00000000a4a42a71), rs1=>rd:x28(0xffffff7fffffffff), rs2:x20(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x28, x20, 0x0, 0x00000000a4a42a71, 0xffffff7fffffffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x00000000a4a42a71), rs1=>rd:x29(0xfffffeffffffffff), rs2:x19(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x29, x19, 0x0, 0x00000000a4a42a71, 0xfffffeffffffffff, 0x0000000000000000, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x00000000a4a42a71), rs1=>rd:x30(0xfffffdffffffffff), rs2:x18(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x30, x18, 0x0, 0x00000000a4a42a71, 0xfffffdffffffffff, 0x0000000000000000, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x00000000a4a42a71), rs1=>rd:x31(0xfffffbffffffffff), rs2:x17(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x31, x17, 0x0, 0x00000000a4a42a71, 0xfffffbffffffffff, 0x0000000000000000, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x00000000a4a42a71), rs1=>rd:x1(0xfffff7ffffffffff), rs2:x16(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x1, x16, 0x0, 0x00000000a4a42a71, 0xfffff7ffffffffff, 0x0000000000000000, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x00000000a4a42a71), rs1=>rd:x2(0xffffefffffffffff), rs2:x15(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x2, x15, 0x0, 0x00000000a4a42a71, 0xffffefffffffffff, 0x0000000000000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x00000000a4a42a71), rs1=>rd:x3(0xffffdfffffffffff), rs2:x14(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x3, x14, 0x0, 0x00000000a4a42a71, 0xffffdfffffffffff, 0x0000000000000000, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x00000000a4a42a71), rs1=>rd:x4(0xffffbfffffffffff), rs2:x13(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x4, x13, 0x0, 0x00000000a4a42a71, 0xffffbfffffffffff, 0x0000000000000000, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x00000000a4a42a71), rs1=>rd:x5(0xffff7fffffffffff), rs2:x12(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0x00000000a4a42a71, 0xffff7fffffffffff, 0x0000000000000000, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x00000000a4a42a71), rs1=>rd:x6(0xfffeffffffffffff), rs2:x11(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x6, x11, 0x0, 0x00000000a4a42a71, 0xfffeffffffffffff, 0x0000000000000000, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x00000000a4a42a71), rs1=>rd:x7(0xfffdffffffffffff), rs2:x10(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x7, x10, 0x0, 0x00000000a4a42a71, 0xfffdffffffffffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x00000000a4a42a71), rs1=>rd:x8(0xfffbffffffffffff), rs2:x9(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x8, x9, 0x0, 0x00000000a4a42a71, 0xfffbffffffffffff, 0x0000000000000000, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x00000000a4a42a71), rs1=>rd:x9(0xfff7ffffffffffff), rs2:x8(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x9, x8, 0x0, 0x00000000a4a42a71, 0xfff7ffffffffffff, 0x0000000000000000, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x00000000a4a42a71), rs1=>rd:x10(0xffefffffffffffff), rs2:x7(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x10, x7, 0x0, 0x00000000a4a42a71, 0xffefffffffffffff, 0x0000000000000000, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x00000000a4a42a71), rs1=>rd:x11(0xffdfffffffffffff), rs2:x6(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x11, x6, 0x0, 0x00000000a4a42a71, 0xffdfffffffffffff, 0x0000000000000000, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x00000000a4a42a71), rs1=>rd:x12(0xffbfffffffffffff), rs2:x5(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x12, x5, 0x0, 0x00000000a4a42a71, 0xffbfffffffffffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x0000000071a4a42a), rs1=>rd:x13(0xff7fffffffffffff), rs2:x4(0x0000000000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x13, x4, 0x3, 0x0000000071a4a42a, 0xff7fffffffffffff, 0x0000000000000000, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x0000000071a4a42a), rs1=>rd:x14(0xfeffffffffffffff), rs2:x3(0x0000000000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x14, x3, 0x3, 0x0000000071a4a42a, 0xfeffffffffffffff, 0x0000000000000000, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x0000000071a4a42a), rs1=>rd:x15(0xfdffffffffffffff), rs2:x2(0x0000000000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x15, x2, 0x3, 0x0000000071a4a42a, 0xfdffffffffffffff, 0x0000000000000000, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x0000000071a4a42a), rs1=>rd:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x16, x1, 0x3, 0x0000000071a4a42a, 0xfbffffffffffffff, 0x0000000000000000, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x00000000a42a71a4), rs1=>rd:x17(0xf7ffffffffffffff), rs2:x31(0x0000000000000000), imm:0x1
+ TEST_RI_OP(sm4ed, x17, x31, 0x1, 0x00000000a42a71a4, 0xf7ffffffffffffff, 0x0000000000000000, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x00000000a42a71a4), rs1=>rd:x18(0xefffffffffffffff), rs2:x30(0x0000000000000000), imm:0x1
+ TEST_RI_OP(sm4ed, x18, x30, 0x1, 0x00000000a42a71a4, 0xefffffffffffffff, 0x0000000000000000, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x0000000071a4a42a), rs1=>rd:x19(0xdfffffffffffffff), rs2:x29(0x0000000000000000), imm:0x3
+ TEST_RI_OP(sm4ed, x19, x29, 0x3, 0x0000000071a4a42a, 0xdfffffffffffffff, 0x0000000000000000, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x00000000a42a71a4), rs1=>rd:x20(0xbfffffffffffffff), rs2:x28(0x0000000000000000), imm:0x1
+ TEST_RI_OP(sm4ed, x20, x28, 0x1, 0x00000000a42a71a4, 0xbfffffffffffffff, 0x0000000000000000, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x000000002a71a4a4), rs1=>rd:x21(0x7fffffffffffffff), rs2:x27(0x0000000000000000), imm:0x2
+ TEST_RI_OP(sm4ed, x21, x27, 0x2, 0x000000002a71a4a4, 0x7fffffffffffffff, 0x0000000000000000, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x00000000a4a42a71), rs1=>rd:x22(0xffffffffffffffff), rs2:x26(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x22, x26, 0x0, 0x00000000a4a42a71, 0xffffffffffffffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x000000008b54c90d), rs1=>rd:x23(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23), imm:0x2
+ TEST_RI_OP(sm4ed, x23, x25, 0x2, 0x000000008b54c90d, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1=>rd:x0(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b), imm:0x1
+ TEST_RI_OP(sm4ed, x0, x24, 0x1, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x0000000026baf36e), rs1=>rd:x25(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0), imm:0x3
+ TEST_RI_OP(sm4ed, x25, x0, 0x3, 0x0000000026baf36e, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with random values
+ // result rd:x26(0x00000000856c3aa3), rs1=>rd:x26(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3), imm:0x3
+ TEST_RI_OP(sm4ed, x26, x22, 0x3, 0x00000000856c3aa3, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SM4ED-02.S b/riscof/suite/rv64i_m/K_unratified/SM4ED-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..700adedee71bd1380333f75ae9ecf3f5196cef73
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SM4ED-02.S
@@ -0,0 +1,1779 @@
+// RISC-V Architectural Validation Test SM4ED-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sm4ed'.
+// Using dataset: sbox32
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",sm4ed)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox32
+ // result rd:x1(0x00000000f6b1841b), rs1=>rd:x1(0x10fd3dedadea5195), rs2:x16(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ed, x1, x16, 0x0, 0x00000000f6b1841b, 0x10fd3dedadea5195, 0x0000000000000000, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox32
+ // result rd:x2(0x00000000906d6e83), rs1=>rd:x2(0xbd295ce2d2ffbec1), rs2:x15(0x0000000000000100), imm:0x1
+ TEST_RI_OP(sm4ed, x2, x15, 0x1, 0x00000000906d6e83, 0xbd295ce2d2ffbec1, 0x0000000000000100, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox32
+ // result rd:x3(0x0000000042ac0f1c), rs1=>rd:x3(0xc9649f05a8e1a8bb), rs2:x14(0x0000000000020000), imm:0x2
+ TEST_RI_OP(sm4ed, x3, x14, 0x2, 0x0000000042ac0f1c, 0xc9649f05a8e1a8bb, 0x0000000000020000, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox32
+ // result rd:x4(0x000000004e326436), rs1=>rd:x4(0x3541291848c99fcb), rs2:x13(0x0000000003000000), imm:0x3
+ TEST_RI_OP(sm4ed, x4, x13, 0x3, 0x000000004e326436, 0x3541291848c99fcb, 0x0000000003000000, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox32
+ // result rd:x5(0x00000000752e9db3), rs1=>rd:x5(0x10a24740461d524f), rs2:x12(0x0000000000000004), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0x00000000752e9db3, 0x10a24740461d524f, 0x0000000000000004, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox32
+ // result rd:x6(0x00000000d5687528), rs1=>rd:x6(0x546b0e54528a10af), rs2:x11(0x0000000000000500), imm:0x1
+ TEST_RI_OP(sm4ed, x6, x11, 0x1, 0x00000000d5687528, 0x546b0e54528a10af, 0x0000000000000500, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox32
+ // result rd:x7(0x00000000dc520f37), rs1=>rd:x7(0x73a92fd4e19bfbc3), rs2:x10(0x0000000000060000), imm:0x2
+ TEST_RI_OP(sm4ed, x7, x10, 0x2, 0x00000000dc520f37, 0x73a92fd4e19bfbc3, 0x0000000000060000, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox32
+ // result rd:x8(0x000000001ba42c75), rs1=>rd:x8(0x82f6747f707af2c0), rs2:x9(0x0000000007000000), imm:0x3
+ TEST_RI_OP(sm4ed, x8, x9, 0x3, 0x000000001ba42c75, 0x82f6747f707af2c0, 0x0000000007000000, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox32
+ // result rd:x9(0x00000000fc250615), rs1=>rd:x9(0xf5adb41aa47d105b), rs2:x8(0x0000000000000008), imm:0x0
+ TEST_RI_OP(sm4ed, x9, x8, 0x0, 0x00000000fc250615, 0xf5adb41aa47d105b, 0x0000000000000008, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox32
+ // result rd:x10(0x00000000c8afa2f9), rs1=>rd:x10(0xdf7f3844121bcc23), rs2:x7(0x0000000000000900), imm:0x1
+ TEST_RI_OP(sm4ed, x10, x7, 0x1, 0x00000000c8afa2f9, 0xdf7f3844121bcc23, 0x0000000000000900, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox32
+ // result rd:x11(0x00000000b9ae01c5), rs1=>rd:x11(0x10fd3dedadea5195), rs2:x6(0x00000000000a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x11, x6, 0x2, 0x00000000b9ae01c5, 0x10fd3dedadea5195, 0x00000000000a0000, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox32
+ // result rd:x12(0x0000000018f4b500), rs1=>rd:x12(0xbd295ce2d2ffbec1), rs2:x5(0x000000000b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x12, x5, 0x3, 0x0000000018f4b500, 0xbd295ce2d2ffbec1, 0x000000000b000000, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox32
+ // result rd:x13(0x0000000008418033), rs1=>rd:x13(0xc9649f05a8e1a8bb), rs2:x4(0x000000000000000c), imm:0x0
+ TEST_RI_OP(sm4ed, x13, x4, 0x0, 0x0000000008418033, 0xc9649f05a8e1a8bb, 0x000000000000000c, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox32
+ // result rd:x14(0x00000000a7318824), rs1=>rd:x14(0x3541291848c99fcb), rs2:x3(0x0000000000000d00), imm:0x1
+ TEST_RI_OP(sm4ed, x14, x3, 0x1, 0x00000000a7318824, 0x3541291848c99fcb, 0x0000000000000d00, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox32
+ // result rd:x15(0x000000006a81e2ff), rs1=>rd:x15(0x10a24740461d524f), rs2:x2(0x00000000000e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x15, x2, 0x2, 0x000000006a81e2ff, 0x10a24740461d524f, 0x00000000000e0000, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox32
+ // result rd:x16(0x00000000439e04aa), rs1=>rd:x16(0x546b0e54528a10af), rs2:x1(0x000000000f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x16, x1, 0x3, 0x00000000439e04aa, 0x546b0e54528a10af, 0x000000000f000000, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox32
+ // result rd:x17(0x000000004d37d044), rs1=>rd:x17(0x73a92fd4e19bfbc3), rs2:x31(0x0000000000000010), imm:0x0
+ TEST_RI_OP(sm4ed, x17, x31, 0x0, 0x000000004d37d044, 0x73a92fd4e19bfbc3, 0x0000000000000010, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox32
+ // result rd:x18(0x00000000ed1c095d), rs1=>rd:x18(0x82f6747f707af2c0), rs2:x30(0x0000000000001100), imm:0x1
+ TEST_RI_OP(sm4ed, x18, x30, 0x1, 0x00000000ed1c095d, 0x82f6747f707af2c0, 0x0000000000001100, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox32
+ // result rd:x19(0x000000003c8f7a31), rs1=>rd:x19(0xf5adb41aa47d105b), rs2:x29(0x0000000000120000), imm:0x2
+ TEST_RI_OP(sm4ed, x19, x29, 0x2, 0x000000003c8f7a31, 0xf5adb41aa47d105b, 0x0000000000120000, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox32
+ // result rd:x20(0x00000000bcc21554), rs1=>rd:x20(0xdf7f3844121bcc23), rs2:x28(0x0000000013000000), imm:0x3
+ TEST_RI_OP(sm4ed, x20, x28, 0x3, 0x00000000bcc21554, 0xdf7f3844121bcc23, 0x0000000013000000, x2, 32, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox32
+ // result rd:x21(0x0000000005427b17), rs1=>rd:x21(0x10fd3dedadea5195), rs2:x27(0x0000000000000014), imm:0x0
+ TEST_RI_OP(sm4ed, x21, x27, 0x0, 0x0000000005427b17, 0x10fd3dedadea5195, 0x0000000000000014, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox32
+ // result rd:x22(0x000000002843f83b), rs1=>rd:x22(0xbd295ce2d2ffbec1), rs2:x26(0x0000000000001500), imm:0x1
+ TEST_RI_OP(sm4ed, x22, x26, 0x1, 0x000000002843f83b, 0xbd295ce2d2ffbec1, 0x0000000000001500, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox32
+ // result rd:x23(0x00000000acf5b8ab), rs1=>rd:x23(0xc9649f05a8e1a8bb), rs2:x25(0x0000000000160000), imm:0x2
+ TEST_RI_OP(sm4ed, x23, x25, 0x2, 0x00000000acf5b8ab, 0xc9649f05a8e1a8bb, 0x0000000000160000, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox32
+ // result rd:x24(0x00000000d80f0fc0), rs1=>rd:x24(0x3541291848c99fcb), rs2:x24(0x0000000017000000), imm:0x3
+ TEST_RI_OP(sm4ed, x24, x24, 0x3, 0x00000000d80f0fc0, 0x3541291848c99fcb, 0x0000000017000000, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox32
+ // result rd:x25(0x00000000ecb7fa4d), rs1=>rd:x25(0x10a24740461d524f), rs2:x23(0x0000000000000018), imm:0x0
+ TEST_RI_OP(sm4ed, x25, x23, 0x0, 0x00000000ecb7fa4d, 0x10a24740461d524f, 0x0000000000000018, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox32
+ // result rd:x26(0x0000000043cf44be), rs1=>rd:x26(0x546b0e54528a10af), rs2:x22(0x0000000000001900), imm:0x1
+ TEST_RI_OP(sm4ed, x26, x22, 0x1, 0x0000000043cf44be, 0x546b0e54528a10af, 0x0000000000001900, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox32
+ // result rd:x27(0x00000000f2c4b78f), rs1=>rd:x27(0x73a92fd4e19bfbc3), rs2:x21(0x00000000001a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x27, x21, 0x2, 0x00000000f2c4b78f, 0x73a92fd4e19bfbc3, 0x00000000001a0000, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox32
+ // result rd:x28(0x00000000cee26ae6), rs1=>rd:x28(0x82f6747f707af2c0), rs2:x20(0x000000001b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x28, x20, 0x3, 0x00000000cee26ae6, 0x82f6747f707af2c0, 0x000000001b000000, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox32
+ // result rd:x29(0x0000000081585836), rs1=>rd:x29(0xf5adb41aa47d105b), rs2:x19(0x000000000000001c), imm:0x0
+ TEST_RI_OP(sm4ed, x29, x19, 0x0, 0x0000000081585836, 0xf5adb41aa47d105b, 0x000000000000001c, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox32
+ // result rd:x30(0x00000000089f5239), rs1=>rd:x30(0xdf7f3844121bcc23), rs2:x18(0x0000000000001d00), imm:0x1
+ TEST_RI_OP(sm4ed, x30, x18, 0x1, 0x00000000089f5239, 0xdf7f3844121bcc23, 0x0000000000001d00, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox32
+ // result rd:x31(0x00000000abf4498d), rs1=>rd:x31(0x10fd3dedadea5195), rs2:x17(0x00000000001e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x31, x17, 0x2, 0x00000000abf4498d, 0x10fd3dedadea5195, 0x00000000001e0000, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox32
+ // result rd:x1(0x000000002f99d85a), rs1=>rd:x1(0xbd295ce2d2ffbec1), rs2:x16(0x000000001f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x1, x16, 0x3, 0x000000002f99d85a, 0xbd295ce2d2ffbec1, 0x000000001f000000, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox32
+ // result rd:x2(0x00000000da933657), rs1=>rd:x2(0xc9649f05a8e1a8bb), rs2:x15(0x0000000000000020), imm:0x0
+ TEST_RI_OP(sm4ed, x2, x15, 0x0, 0x00000000da933657, 0xc9649f05a8e1a8bb, 0x0000000000000020, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox32
+ // result rd:x3(0x00000000418ad5c2), rs1=>rd:x3(0x3541291848c99fcb), rs2:x14(0x0000000000002100), imm:0x1
+ TEST_RI_OP(sm4ed, x3, x14, 0x1, 0x00000000418ad5c2, 0x3541291848c99fcb, 0x0000000000002100, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox32
+ // result rd:x4(0x00000000170d130e), rs1=>rd:x4(0x10a24740461d524f), rs2:x13(0x0000000000220000), imm:0x2
+ TEST_RI_OP(sm4ed, x4, x13, 0x2, 0x00000000170d130e, 0x10a24740461d524f, 0x0000000000220000, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox32
+ // result rd:x5(0x000000007659c358), rs1=>rd:x5(0x546b0e54528a10af), rs2:x12(0x0000000023000000), imm:0x3
+ TEST_RI_OP(sm4ed, x5, x12, 0x3, 0x000000007659c358, 0x546b0e54528a10af, 0x0000000023000000, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox32
+ // result rd:x6(0x00000000a7dd6816), rs1=>rd:x6(0x73a92fd4e19bfbc3), rs2:x11(0x0000000000000024), imm:0x0
+ TEST_RI_OP(sm4ed, x6, x11, 0x0, 0x00000000a7dd6816, 0x73a92fd4e19bfbc3, 0x0000000000000024, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox32
+ // result rd:x7(0x00000000cf96a17f), rs1=>rd:x7(0x82f6747f707af2c0), rs2:x10(0x0000000000002500), imm:0x1
+ TEST_RI_OP(sm4ed, x7, x10, 0x1, 0x00000000cf96a17f, 0x82f6747f707af2c0, 0x0000000000002500, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox32
+ // result rd:x8(0x000000003e857239), rs1=>rd:x8(0xf5adb41aa47d105b), rs2:x9(0x0000000000260000), imm:0x2
+ TEST_RI_OP(sm4ed, x8, x9, 0x2, 0x000000003e857239, 0xf5adb41aa47d105b, 0x0000000000260000, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox32
+ // result rd:x9(0x0000000080f22558), rs1=>rd:x9(0xdf7f3844121bcc23), rs2:x8(0x0000000027000000), imm:0x3
+ TEST_RI_OP(sm4ed, x9, x8, 0x3, 0x0000000080f22558, 0xdf7f3844121bcc23, 0x0000000027000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox32
+ // result rd:x10(0x000000006126626a), rs1=>rd:x10(0x10fd3dedadea5195), rs2:x7(0x0000000000000028), imm:0x0
+ TEST_RI_OP(sm4ed, x10, x7, 0x0, 0x000000006126626a, 0x10fd3dedadea5195, 0x0000000000000028, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox32
+ // result rd:x11(0x0000000083aaba90), rs1=>rd:x11(0xbd295ce2d2ffbec1), rs2:x6(0x0000000000002900), imm:0x1
+ TEST_RI_OP(sm4ed, x11, x6, 0x1, 0x0000000083aaba90, 0xbd295ce2d2ffbec1, 0x0000000000002900, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox32
+ // result rd:x12(0x00000000a3c68497), rs1=>rd:x12(0xc9649f05a8e1a8bb), rs2:x5(0x00000000002a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x12, x5, 0x2, 0x00000000a3c68497, 0xc9649f05a8e1a8bb, 0x00000000002a0000, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox32
+ // result rd:x13(0x0000000007c49289), rs1=>rd:x13(0x3541291848c99fcb), rs2:x4(0x000000002b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x13, x4, 0x3, 0x0000000007c49289, 0x3541291848c99fcb, 0x000000002b000000, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox32
+ // result rd:x14(0x00000000f1aabc16), rs1=>rd:x14(0x10a24740461d524f), rs2:x3(0x000000000000002c), imm:0x0
+ TEST_RI_OP(sm4ed, x14, x3, 0x0, 0x00000000f1aabc16, 0x10a24740461d524f, 0x000000000000002c, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox32
+ // result rd:x15(0x000000006d46e390), rs1=>rd:x15(0x546b0e54528a10af), rs2:x2(0x0000000000002d00), imm:0x1
+ TEST_RI_OP(sm4ed, x15, x2, 0x1, 0x000000006d46e390, 0x546b0e54528a10af, 0x0000000000002d00, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox32
+ // result rd:x16(0x000000004f874971), rs1=>rd:x16(0x73a92fd4e19bfbc3), rs2:x1(0x00000000002e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x16, x1, 0x2, 0x000000004f874971, 0x73a92fd4e19bfbc3, 0x00000000002e0000, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox32
+ // result rd:x17(0x000000009af37ba3), rs1=>rd:x17(0x82f6747f707af2c0), rs2:x31(0x000000002f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x17, x31, 0x3, 0x000000009af37ba3, 0x82f6747f707af2c0, 0x000000002f000000, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox32
+ // result rd:x18(0x0000000037eef72f), rs1=>rd:x18(0xf5adb41aa47d105b), rs2:x30(0x0000000000000030), imm:0x0
+ TEST_RI_OP(sm4ed, x18, x30, 0x0, 0x0000000037eef72f, 0xf5adb41aa47d105b, 0x0000000000000030, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox32
+ // result rd:x19(0x00000000dcaab3ed), rs1=>rd:x19(0xdf7f3844121bcc23), rs2:x29(0x0000000000003100), imm:0x1
+ TEST_RI_OP(sm4ed, x19, x29, 0x1, 0x00000000dcaab3ed, 0xdf7f3844121bcc23, 0x0000000000003100, x3, 32, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox32
+ // result rd:x20(0x00000000b18621e5), rs1=>rd:x20(0x10fd3dedadea5195), rs2:x28(0x0000000000320000), imm:0x2
+ TEST_RI_OP(sm4ed, x20, x28, 0x2, 0x00000000b18621e5, 0x10fd3dedadea5195, 0x0000000000320000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox32
+ // result rd:x21(0x00000000df59186a), rs1=>rd:x21(0xbd295ce2d2ffbec1), rs2:x27(0x0000000033000000), imm:0x3
+ TEST_RI_OP(sm4ed, x21, x27, 0x3, 0x00000000df59186a, 0xbd295ce2d2ffbec1, 0x0000000033000000, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox32
+ // result rd:x22(0x000000008fc66256), rs1=>rd:x22(0xc9649f05a8e1a8bb), rs2:x26(0x0000000000000034), imm:0x0
+ TEST_RI_OP(sm4ed, x22, x26, 0x0, 0x000000008fc66256, 0xc9649f05a8e1a8bb, 0x0000000000000034, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox32
+ // result rd:x23(0x0000000068c1b7eb), rs1=>rd:x23(0x3541291848c99fcb), rs2:x25(0x0000000000003500), imm:0x1
+ TEST_RI_OP(sm4ed, x23, x25, 0x1, 0x0000000068c1b7eb, 0x3541291848c99fcb, 0x0000000000003500, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox32
+ // result rd:x24(0x00000000eb7ea3a3), rs1=>rd:x24(0x10a24740461d524f), rs2:x24(0x0000000000360000), imm:0x2
+ TEST_RI_OP(sm4ed, x24, x24, 0x2, 0x00000000eb7ea3a3, 0x10a24740461d524f, 0x0000000000360000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox32
+ // result rd:x25(0x0000000093dc4638), rs1=>rd:x25(0x546b0e54528a10af), rs2:x23(0x0000000037000000), imm:0x3
+ TEST_RI_OP(sm4ed, x25, x23, 0x3, 0x0000000093dc4638, 0x546b0e54528a10af, 0x0000000037000000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox32
+ // result rd:x26(0x00000000e3997943), rs1=>rd:x26(0x73a92fd4e19bfbc3), rs2:x22(0x0000000000000038), imm:0x0
+ TEST_RI_OP(sm4ed, x26, x22, 0x0, 0x00000000e3997943, 0x73a92fd4e19bfbc3, 0x0000000000000038, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox32
+ // result rd:x27(0x000000000fa651bf), rs1=>rd:x27(0x82f6747f707af2c0), rs2:x21(0x0000000000003900), imm:0x1
+ TEST_RI_OP(sm4ed, x27, x21, 0x1, 0x000000000fa651bf, 0x82f6747f707af2c0, 0x0000000000003900, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox32
+ // result rd:x28(0x0000000032b94209), rs1=>rd:x28(0xf5adb41aa47d105b), rs2:x20(0x00000000003a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x28, x20, 0x2, 0x0000000032b94209, 0xf5adb41aa47d105b, 0x00000000003a0000, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox32
+ // result rd:x29(0x0000000000f027da), rs1=>rd:x29(0xdf7f3844121bcc23), rs2:x19(0x000000003b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x29, x19, 0x3, 0x0000000000f027da, 0xdf7f3844121bcc23, 0x000000003b000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox32
+ // result rd:x30(0x00000000783f2534), rs1=>rd:x30(0x10fd3dedadea5195), rs2:x18(0x000000000000003c), imm:0x0
+ TEST_RI_OP(sm4ed, x30, x18, 0x0, 0x00000000783f2534, 0x10fd3dedadea5195, 0x000000000000003c, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox32
+ // result rd:x31(0x00000000ec720dff), rs1=>rd:x31(0xbd295ce2d2ffbec1), rs2:x17(0x0000000000003d00), imm:0x1
+ TEST_RI_OP(sm4ed, x31, x17, 0x1, 0x00000000ec720dff, 0xbd295ce2d2ffbec1, 0x0000000000003d00, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox32
+ // result rd:x1(0x0000000097225447), rs1=>rd:x1(0xc9649f05a8e1a8bb), rs2:x16(0x00000000003e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x1, x16, 0x2, 0x0000000097225447, 0xc9649f05a8e1a8bb, 0x00000000003e0000, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox32
+ // result rd:x2(0x000000007653056f), rs1=>rd:x2(0x3541291848c99fcb), rs2:x15(0x000000003f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x2, x15, 0x3, 0x000000007653056f, 0x3541291848c99fcb, 0x000000003f000000, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox32
+ // result rd:x3(0x000000005b001414), rs1=>rd:x3(0x10a24740461d524f), rs2:x14(0x0000000000000040), imm:0x0
+ TEST_RI_OP(sm4ed, x3, x14, 0x0, 0x000000005b001414, 0x10a24740461d524f, 0x0000000000000040, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox32
+ // result rd:x4(0x000000004e8d0bb3), rs1=>rd:x4(0x546b0e54528a10af), rs2:x13(0x0000000000004100), imm:0x1
+ TEST_RI_OP(sm4ed, x4, x13, 0x1, 0x000000004e8d0bb3, 0x546b0e54528a10af, 0x0000000000004100, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox32
+ // result rd:x5(0x0000000044a0655d), rs1=>rd:x5(0x73a92fd4e19bfbc3), rs2:x12(0x0000000000420000), imm:0x2
+ TEST_RI_OP(sm4ed, x5, x12, 0x2, 0x0000000044a0655d, 0x73a92fd4e19bfbc3, 0x0000000000420000, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox32
+ // result rd:x6(0x000000007c89013f), rs1=>rd:x6(0x82f6747f707af2c0), rs2:x11(0x0000000043000000), imm:0x3
+ TEST_RI_OP(sm4ed, x6, x11, 0x3, 0x000000007c89013f, 0x82f6747f707af2c0, 0x0000000043000000, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox32
+ // result rd:x7(0x000000006bb2e064), rs1=>rd:x7(0xf5adb41aa47d105b), rs2:x10(0x0000000000000044), imm:0x0
+ TEST_RI_OP(sm4ed, x7, x10, 0x0, 0x000000006bb2e064, 0xf5adb41aa47d105b, 0x0000000000000044, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox32
+ // result rd:x8(0x00000000df6973ee), rs1=>rd:x8(0xdf7f3844121bcc23), rs2:x9(0x0000000000004500), imm:0x1
+ TEST_RI_OP(sm4ed, x8, x9, 0x1, 0x00000000df6973ee, 0xdf7f3844121bcc23, 0x0000000000004500, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox32
+ // result rd:x9(0x00000000baa10dc9), rs1=>rd:x9(0x10fd3dedadea5195), rs2:x8(0x0000000000460000), imm:0x2
+ TEST_RI_OP(sm4ed, x9, x8, 0x2, 0x00000000baa10dc9, 0x10fd3dedadea5195, 0x0000000000460000, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox32
+ // result rd:x10(0x0000000080155479), rs1=>rd:x10(0xbd295ce2d2ffbec1), rs2:x7(0x0000000047000000), imm:0x3
+ TEST_RI_OP(sm4ed, x10, x7, 0x3, 0x0000000080155479, 0xbd295ce2d2ffbec1, 0x0000000047000000, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox32
+ // result rd:x11(0x00000000a6ef2934), rs1=>rd:x11(0xc9649f05a8e1a8bb), rs2:x6(0x0000000000000048), imm:0x0
+ TEST_RI_OP(sm4ed, x11, x6, 0x0, 0x00000000a6ef2934, 0xc9649f05a8e1a8bb, 0x0000000000000048, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox32
+ // result rd:x12(0x000000002d91a2ae), rs1=>rd:x12(0x3541291848c99fcb), rs2:x5(0x0000000000004900), imm:0x1
+ TEST_RI_OP(sm4ed, x12, x5, 0x1, 0x000000002d91a2ae, 0x3541291848c99fcb, 0x0000000000004900, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox32
+ // result rd:x13(0x000000007ad1a2bf), rs1=>rd:x13(0x10a24740461d524f), rs2:x4(0x00000000004a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x13, x4, 0x2, 0x000000007ad1a2bf, 0x10a24740461d524f, 0x00000000004a0000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox32
+ // result rd:x14(0x000000002fee74b6), rs1=>rd:x14(0x546b0e54528a10af), rs2:x3(0x000000004b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x14, x3, 0x3, 0x000000002fee74b6, 0x546b0e54528a10af, 0x000000004b000000, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox32
+ // result rd:x15(0x000000007a001ebd), rs1=>rd:x15(0x73a92fd4e19bfbc3), rs2:x2(0x000000000000004c), imm:0x0
+ TEST_RI_OP(sm4ed, x15, x2, 0x0, 0x000000007a001ebd, 0x73a92fd4e19bfbc3, 0x000000000000004c, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox32
+ // result rd:x16(0x0000000066fd63d6), rs1=>rd:x16(0x82f6747f707af2c0), rs2:x1(0x0000000000004d00), imm:0x1
+ TEST_RI_OP(sm4ed, x16, x1, 0x1, 0x0000000066fd63d6, 0x82f6747f707af2c0, 0x0000000000004d00, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox32
+ // result rd:x17(0x00000000ea0e2d66), rs1=>rd:x17(0xf5adb41aa47d105b), rs2:x31(0x00000000004e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x17, x31, 0x2, 0x00000000ea0e2d66, 0xf5adb41aa47d105b, 0x00000000004e0000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox32
+ // result rd:x18(0x000000001ab96e89), rs1=>rd:x18(0xdf7f3844121bcc23), rs2:x30(0x000000004f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x18, x30, 0x3, 0x000000001ab96e89, 0xdf7f3844121bcc23, 0x000000004f000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox32
+ // result rd:x19(0x000000000c4b385d), rs1=>rd:x19(0x10fd3dedadea5195), rs2:x29(0x0000000000000050), imm:0x0
+ TEST_RI_OP(sm4ed, x19, x29, 0x0, 0x000000000c4b385d, 0x10fd3dedadea5195, 0x0000000000000050, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox32
+ // result rd:x20(0x000000007f95796c), rs1=>rd:x20(0xbd295ce2d2ffbec1), rs2:x28(0x0000000000005100), imm:0x1
+ TEST_RI_OP(sm4ed, x20, x28, 0x1, 0x000000007f95796c, 0xbd295ce2d2ffbec1, 0x0000000000005100, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox32
+ // result rd:x21(0x000000002b64aebd), rs1=>rd:x21(0xc9649f05a8e1a8bb), rs2:x27(0x0000000000520000), imm:0x2
+ TEST_RI_OP(sm4ed, x21, x27, 0x2, 0x000000002b64aebd, 0xc9649f05a8e1a8bb, 0x0000000000520000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox32
+ // result rd:x22(0x000000003203557b), rs1=>rd:x22(0x3541291848c99fcb), rs2:x26(0x0000000053000000), imm:0x3
+ TEST_RI_OP(sm4ed, x22, x26, 0x3, 0x000000003203557b, 0x3541291848c99fcb, 0x0000000053000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox32
+ // result rd:x23(0x0000000083d822fa), rs1=>rd:x23(0x10a24740461d524f), rs2:x25(0x0000000000000054), imm:0x0
+ TEST_RI_OP(sm4ed, x23, x25, 0x0, 0x0000000083d822fa, 0x10a24740461d524f, 0x0000000000000054, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox32
+ // result rd:x24(0x000000009165a191), rs1=>rd:x24(0x546b0e54528a10af), rs2:x24(0x0000000000005500), imm:0x1
+ TEST_RI_OP(sm4ed, x24, x24, 0x1, 0x000000009165a191, 0x546b0e54528a10af, 0x0000000000005500, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox32
+ // result rd:x25(0x00000000382990a8), rs1=>rd:x25(0x73a92fd4e19bfbc3), rs2:x23(0x0000000000560000), imm:0x2
+ TEST_RI_OP(sm4ed, x25, x23, 0x2, 0x00000000382990a8, 0x73a92fd4e19bfbc3, 0x0000000000560000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox32
+ // result rd:x26(0x00000000d754dc49), rs1=>rd:x26(0x82f6747f707af2c0), rs2:x22(0x0000000057000000), imm:0x3
+ TEST_RI_OP(sm4ed, x26, x22, 0x3, 0x00000000d754dc49, 0x82f6747f707af2c0, 0x0000000057000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox32
+ // result rd:x27(0x00000000479eeb43), rs1=>rd:x27(0xf5adb41aa47d105b), rs2:x21(0x0000000000000058), imm:0x0
+ TEST_RI_OP(sm4ed, x27, x21, 0x0, 0x00000000479eeb43, 0xf5adb41aa47d105b, 0x0000000000000058, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox32
+ // result rd:x28(0x00000000bdf38b8c), rs1=>rd:x28(0xdf7f3844121bcc23), rs2:x20(0x0000000000005900), imm:0x1
+ TEST_RI_OP(sm4ed, x28, x20, 0x1, 0x00000000bdf38b8c, 0xdf7f3844121bcc23, 0x0000000000005900, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox32
+ // result rd:x29(0x00000000a2d96da9), rs1=>rd:x29(0x10fd3dedadea5195), rs2:x19(0x00000000005a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x29, x19, 0x2, 0x00000000a2d96da9, 0x10fd3dedadea5195, 0x00000000005a0000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox32
+ // result rd:x30(0x00000000b5d2938b), rs1=>rd:x30(0xbd295ce2d2ffbec1), rs2:x18(0x000000005b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x30, x18, 0x3, 0x00000000b5d2938b, 0xbd295ce2d2ffbec1, 0x000000005b000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox32
+ // result rd:x31(0x000000006920d90b), rs1=>rd:x31(0xc9649f05a8e1a8bb), rs2:x17(0x000000000000005c), imm:0x0
+ TEST_RI_OP(sm4ed, x31, x17, 0x0, 0x000000006920d90b, 0xc9649f05a8e1a8bb, 0x000000000000005c, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox32
+ // result rd:x1(0x00000000119e9192), rs1=>rd:x1(0x3541291848c99fcb), rs2:x16(0x0000000000005d00), imm:0x1
+ TEST_RI_OP(sm4ed, x1, x16, 0x1, 0x00000000119e9192, 0x3541291848c99fcb, 0x0000000000005d00, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox32
+ // result rd:x2(0x00000000d9f42439), rs1=>rd:x2(0x10a24740461d524f), rs2:x15(0x00000000005e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x2, x15, 0x2, 0x00000000d9f42439, 0x10a24740461d524f, 0x00000000005e0000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox32
+ // result rd:x3(0x00000000b35ec49a), rs1=>rd:x3(0x546b0e54528a10af), rs2:x14(0x000000005f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x3, x14, 0x3, 0x00000000b35ec49a, 0x546b0e54528a10af, 0x000000005f000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox32
+ // result rd:x4(0x0000000099e3e5a5), rs1=>rd:x4(0x73a92fd4e19bfbc3), rs2:x13(0x0000000000000060), imm:0x0
+ TEST_RI_OP(sm4ed, x4, x13, 0x0, 0x0000000099e3e5a5, 0x73a92fd4e19bfbc3, 0x0000000000000060, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox32
+ // result rd:x5(0x00000000e05e4650), rs1=>rd:x5(0x82f6747f707af2c0), rs2:x12(0x0000000000006100), imm:0x1
+ TEST_RI_OP(sm4ed, x5, x12, 0x1, 0x00000000e05e4650, 0x82f6747f707af2c0, 0x0000000000006100, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox32
+ // result rd:x6(0x00000000aa4b2863), rs1=>rd:x6(0xf5adb41aa47d105b), rs2:x11(0x0000000000620000), imm:0x2
+ TEST_RI_OP(sm4ed, x6, x11, 0x2, 0x00000000aa4b2863, 0xf5adb41aa47d105b, 0x0000000000620000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox32
+ // result rd:x7(0x000000003462b57c), rs1=>rd:x7(0xdf7f3844121bcc23), rs2:x10(0x0000000063000000), imm:0x3
+ TEST_RI_OP(sm4ed, x7, x10, 0x3, 0x000000003462b57c, 0xdf7f3844121bcc23, 0x0000000063000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox32
+ // result rd:x8(0x000000002067337a), rs1=>rd:x8(0x10fd3dedadea5195), rs2:x9(0x0000000000000064), imm:0x0
+ TEST_RI_OP(sm4ed, x8, x9, 0x0, 0x000000002067337a, 0x10fd3dedadea5195, 0x0000000000000064, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox32
+ // result rd:x9(0x00000000b3a686a0), rs1=>rd:x9(0xbd295ce2d2ffbec1), rs2:x8(0x0000000000006500), imm:0x1
+ TEST_RI_OP(sm4ed, x9, x8, 0x1, 0x00000000b3a686a0, 0xbd295ce2d2ffbec1, 0x0000000000006500, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox32
+ // result rd:x10(0x000000007a74effc), rs1=>rd:x10(0xc9649f05a8e1a8bb), rs2:x7(0x0000000000660000), imm:0x2
+ TEST_RI_OP(sm4ed, x10, x7, 0x2, 0x000000007a74effc, 0xc9649f05a8e1a8bb, 0x0000000000660000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox32
+ // result rd:x11(0x000000006243156b), rs1=>rd:x11(0x3541291848c99fcb), rs2:x6(0x0000000067000000), imm:0x3
+ TEST_RI_OP(sm4ed, x11, x6, 0x3, 0x000000006243156b, 0x3541291848c99fcb, 0x0000000067000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox32
+ // result rd:x12(0x00000000d28977fe), rs1=>rd:x12(0x10a24740461d524f), rs2:x5(0x0000000000000068), imm:0x0
+ TEST_RI_OP(sm4ed, x12, x5, 0x0, 0x00000000d28977fe, 0x10a24740461d524f, 0x0000000000000068, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox32
+ // result rd:x13(0x00000000daa8ba27), rs1=>rd:x13(0x546b0e54528a10af), rs2:x4(0x0000000000006900), imm:0x1
+ TEST_RI_OP(sm4ed, x13, x4, 0x1, 0x00000000daa8ba27, 0x546b0e54528a10af, 0x0000000000006900, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox32
+ // result rd:x14(0x000000009c170a32), rs1=>rd:x14(0x73a92fd4e19bfbc3), rs2:x3(0x00000000006a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x14, x3, 0x2, 0x000000009c170a32, 0x73a92fd4e19bfbc3, 0x00000000006a0000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox32
+ // result rd:x15(0x00000000a7961efb), rs1=>rd:x15(0x82f6747f707af2c0), rs2:x2(0x000000006b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x15, x2, 0x3, 0x00000000a7961efb, 0x82f6747f707af2c0, 0x000000006b000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox32
+ // result rd:x16(0x00000000a079115e), rs1=>rd:x16(0xf5adb41aa47d105b), rs2:x1(0x000000000000006c), imm:0x0
+ TEST_RI_OP(sm4ed, x16, x1, 0x0, 0x00000000a079115e, 0xf5adb41aa47d105b, 0x000000000000006c, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox32
+ // result rd:x17(0x00000000963a69a7), rs1=>rd:x17(0xdf7f3844121bcc23), rs2:x31(0x0000000000006d00), imm:0x1
+ TEST_RI_OP(sm4ed, x17, x31, 0x1, 0x00000000963a69a7, 0xdf7f3844121bcc23, 0x0000000000006d00, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox32
+ // result rd:x18(0x00000000d472b074), rs1=>rd:x18(0x10fd3dedadea5195), rs2:x30(0x00000000006e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x18, x30, 0x2, 0x00000000d472b074, 0x10fd3dedadea5195, 0x00000000006e0000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox32
+ // result rd:x19(0x0000000049e1a044), rs1=>rd:x19(0xbd295ce2d2ffbec1), rs2:x29(0x000000006f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x19, x29, 0x3, 0x0000000049e1a044, 0xbd295ce2d2ffbec1, 0x000000006f000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox32
+ // result rd:x20(0x00000000fbb27f3f), rs1=>rd:x20(0xc9649f05a8e1a8bb), rs2:x28(0x0000000000000070), imm:0x0
+ TEST_RI_OP(sm4ed, x20, x28, 0x0, 0x00000000fbb27f3f, 0xc9649f05a8e1a8bb, 0x0000000000000070, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox32
+ // result rd:x21(0x0000000048c99fcb), rs1=>rd:x21(0x3541291848c99fcb), rs2:x27(0x0000000000007100), imm:0x1
+ TEST_RI_OP(sm4ed, x21, x27, 0x1, 0x0000000048c99fcb, 0x3541291848c99fcb, 0x0000000000007100, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox32
+ // result rd:x22(0x0000000001434b56), rs1=>rd:x22(0x10a24740461d524f), rs2:x26(0x0000000000720000), imm:0x2
+ TEST_RI_OP(sm4ed, x22, x26, 0x2, 0x0000000001434b56, 0x10a24740461d524f, 0x0000000000720000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox32
+ // result rd:x23(0x0000000059d74df9), rs1=>rd:x23(0x546b0e54528a10af), rs2:x25(0x0000000073000000), imm:0x3
+ TEST_RI_OP(sm4ed, x23, x25, 0x3, 0x0000000059d74df9, 0x546b0e54528a10af, 0x0000000073000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox32
+ // result rd:x24(0x000000007e7e9d97), rs1=>rd:x24(0x73a92fd4e19bfbc3), rs2:x24(0x0000000000000074), imm:0x0
+ TEST_RI_OP(sm4ed, x24, x24, 0x0, 0x000000007e7e9d97, 0x73a92fd4e19bfbc3, 0x0000000000000074, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox32
+ // result rd:x25(0x000000003faa6d8f), rs1=>rd:x25(0x82f6747f707af2c0), rs2:x23(0x0000000000007500), imm:0x1
+ TEST_RI_OP(sm4ed, x25, x23, 0x1, 0x000000003faa6d8f, 0x82f6747f707af2c0, 0x0000000000007500, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox32
+ // result rd:x26(0x0000000083c68cc7), rs1=>rd:x26(0xf5adb41aa47d105b), rs2:x22(0x0000000000760000), imm:0x2
+ TEST_RI_OP(sm4ed, x26, x22, 0x2, 0x0000000083c68cc7, 0xf5adb41aa47d105b, 0x0000000000760000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox32
+ // result rd:x27(0x0000000008528570), rs1=>rd:x27(0xdf7f3844121bcc23), rs2:x21(0x0000000077000000), imm:0x3
+ TEST_RI_OP(sm4ed, x27, x21, 0x3, 0x0000000008528570, 0xdf7f3844121bcc23, 0x0000000077000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox32
+ // result rd:x28(0x000000009cdb1ce9), rs1=>rd:x28(0x10fd3dedadea5195), rs2:x20(0x0000000000000078), imm:0x0
+ TEST_RI_OP(sm4ed, x28, x20, 0x0, 0x000000009cdb1ce9, 0x10fd3dedadea5195, 0x0000000000000078, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox32
+ // result rd:x29(0x000000000ac95019), rs1=>rd:x29(0xbd295ce2d2ffbec1), rs2:x19(0x0000000000007900), imm:0x1
+ TEST_RI_OP(sm4ed, x29, x19, 0x1, 0x000000000ac95019, 0xbd295ce2d2ffbec1, 0x0000000000007900, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox32
+ // result rd:x30(0x00000000aaeba0b3), rs1=>rd:x30(0xc9649f05a8e1a8bb), rs2:x18(0x00000000007a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x30, x18, 0x2, 0x00000000aaeba0b3, 0xc9649f05a8e1a8bb, 0x00000000007a0000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox32
+ // result rd:x31(0x000000003356002f), rs1=>rd:x31(0x3541291848c99fcb), rs2:x17(0x000000007b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x31, x17, 0x3, 0x000000003356002f, 0x3541291848c99fcb, 0x000000007b000000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox32
+ // result rd:x1(0x00000000c49ff06f), rs1=>rd:x1(0x10a24740461d524f), rs2:x16(0x000000000000007c), imm:0x0
+ TEST_RI_OP(sm4ed, x1, x16, 0x0, 0x00000000c49ff06f, 0x10a24740461d524f, 0x000000000000007c, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox32
+ // result rd:x2(0x00000000414dc4bc), rs1=>rd:x2(0x546b0e54528a10af), rs2:x15(0x0000000000007d00), imm:0x1
+ TEST_RI_OP(sm4ed, x2, x15, 0x1, 0x00000000414dc4bc, 0x546b0e54528a10af, 0x0000000000007d00, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox32
+ // result rd:x3(0x000000002a73d8e0), rs1=>rd:x3(0x73a92fd4e19bfbc3), rs2:x14(0x00000000007e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x3, x14, 0x2, 0x000000002a73d8e0, 0x73a92fd4e19bfbc3, 0x00000000007e0000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox32
+ // result rd:x4(0x000000009600885c), rs1=>rd:x4(0x82f6747f707af2c0), rs2:x13(0x000000007f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x4, x13, 0x3, 0x000000009600885c, 0x82f6747f707af2c0, 0x000000007f000000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox32
+ // result rd:x5(0x000000000fd6f919), rs1=>rd:x5(0xf5adb41aa47d105b), rs2:x12(0x0000000000000080), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0x000000000fd6f919, 0xf5adb41aa47d105b, 0x0000000000000080, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox32
+ // result rd:x6(0x00000000eca68fdd), rs1=>rd:x6(0xdf7f3844121bcc23), rs2:x11(0x0000000000008100), imm:0x1
+ TEST_RI_OP(sm4ed, x6, x11, 0x1, 0x00000000eca68fdd, 0xdf7f3844121bcc23, 0x0000000000008100, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox32
+ // result rd:x7(0x0000000025487bbf), rs1=>rd:x7(0x10fd3dedadea5195), rs2:x10(0x0000000000820000), imm:0x2
+ TEST_RI_OP(sm4ed, x7, x10, 0x2, 0x0000000025487bbf, 0x10fd3dedadea5195, 0x0000000000820000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox32
+ // result rd:x8(0x0000000048b4f510), rs1=>rd:x8(0xbd295ce2d2ffbec1), rs2:x9(0x0000000083000000), imm:0x3
+ TEST_RI_OP(sm4ed, x8, x9, 0x3, 0x0000000048b4f510, 0xbd295ce2d2ffbec1, 0x0000000083000000, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox32
+ // result rd:x9(0x00000000a9e0e9fb), rs1=>rd:x9(0xc9649f05a8e1a8bb), rs2:x8(0x0000000000000084), imm:0x0
+ TEST_RI_OP(sm4ed, x9, x8, 0x0, 0x00000000a9e0e9fb, 0xc9649f05a8e1a8bb, 0x0000000000000084, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox32
+ // result rd:x10(0x00000000570d44d4), rs1=>rd:x10(0x3541291848c99fcb), rs2:x7(0x0000000000008500), imm:0x1
+ TEST_RI_OP(sm4ed, x10, x7, 0x1, 0x00000000570d44d4, 0x3541291848c99fcb, 0x0000000000008500, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox32
+ // result rd:x11(0x000000007ec5b2af), rs1=>rd:x11(0x10a24740461d524f), rs2:x6(0x0000000000860000), imm:0x2
+ TEST_RI_OP(sm4ed, x11, x6, 0x2, 0x000000007ec5b2af, 0x10a24740461d524f, 0x0000000000860000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox32
+ // result rd:x12(0x00000000335cc618), rs1=>rd:x12(0x546b0e54528a10af), rs2:x5(0x0000000087000000), imm:0x3
+ TEST_RI_OP(sm4ed, x12, x5, 0x3, 0x00000000335cc618, 0x546b0e54528a10af, 0x0000000087000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox32
+ // result rd:x13(0x000000006f155aec), rs1=>rd:x13(0x73a92fd4e19bfbc3), rs2:x4(0x0000000000000088), imm:0x0
+ TEST_RI_OP(sm4ed, x13, x4, 0x0, 0x000000006f155aec, 0x73a92fd4e19bfbc3, 0x0000000000000088, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox32
+ // result rd:x14(0x00000000af8ed91f), rs1=>rd:x14(0x82f6747f707af2c0), rs2:x3(0x0000000000008900), imm:0x1
+ TEST_RI_OP(sm4ed, x14, x3, 0x1, 0x00000000af8ed91f, 0x82f6747f707af2c0, 0x0000000000008900, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox32
+ // result rd:x15(0x000000005547db90), rs1=>rd:x15(0xf5adb41aa47d105b), rs2:x2(0x00000000008a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x15, x2, 0x2, 0x000000005547db90, 0xf5adb41aa47d105b, 0x00000000008a0000, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox32
+ // result rd:x16(0x00000000e420f7ee), rs1=>rd:x16(0xdf7f3844121bcc23), rs2:x1(0x000000008b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x16, x1, 0x3, 0x00000000e420f7ee, 0xdf7f3844121bcc23, 0x000000008b000000, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox32
+ // result rd:x17(0x000000004a0dab88), rs1=>rd:x17(0x10fd3dedadea5195), rs2:x31(0x000000000000008c), imm:0x0
+ TEST_RI_OP(sm4ed, x17, x31, 0x0, 0x000000004a0dab88, 0x10fd3dedadea5195, 0x000000000000008c, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox32
+ // result rd:x18(0x00000000579f5b44), rs1=>rd:x18(0xbd295ce2d2ffbec1), rs2:x30(0x0000000000008d00), imm:0x1
+ TEST_RI_OP(sm4ed, x18, x30, 0x1, 0x00000000579f5b44, 0xbd295ce2d2ffbec1, 0x0000000000008d00, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox32
+ // result rd:x19(0x00000000bda0fcef), rs1=>rd:x19(0xc9649f05a8e1a8bb), rs2:x29(0x00000000008e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x19, x29, 0x2, 0x00000000bda0fcef, 0xc9649f05a8e1a8bb, 0x00000000008e0000, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox32
+ // result rd:x20(0x000000006d4f1968), rs1=>rd:x20(0x3541291848c99fcb), rs2:x28(0x000000008f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x20, x28, 0x3, 0x000000006d4f1968, 0x3541291848c99fcb, 0x000000008f000000, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox32
+ // result rd:x21(0x00000000c59eb12f), rs1=>rd:x21(0x10a24740461d524f), rs2:x27(0x0000000000000090), imm:0x0
+ TEST_RI_OP(sm4ed, x21, x27, 0x0, 0x00000000c59eb12f, 0x10a24740461d524f, 0x0000000000000090, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox32
+ // result rd:x22(0x00000000e8260615), rs1=>rd:x22(0x546b0e54528a10af), rs2:x26(0x0000000000009100), imm:0x1
+ TEST_RI_OP(sm4ed, x22, x26, 0x1, 0x00000000e8260615, 0x546b0e54528a10af, 0x0000000000009100, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox32
+ // result rd:x23(0x00000000bdb28eb6), rs1=>rd:x23(0x73a92fd4e19bfbc3), rs2:x25(0x0000000000920000), imm:0x2
+ TEST_RI_OP(sm4ed, x23, x25, 0x2, 0x00000000bdb28eb6, 0x73a92fd4e19bfbc3, 0x0000000000920000, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox32
+ // result rd:x24(0x00000000a79292a6), rs1=>rd:x24(0x82f6747f707af2c0), rs2:x24(0x0000000093000000), imm:0x3
+ TEST_RI_OP(sm4ed, x24, x24, 0x3, 0x00000000a79292a6, 0x82f6747f707af2c0, 0x0000000093000000, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox32
+ // result rd:x25(0x00000000ca1389ac), rs1=>rd:x25(0xf5adb41aa47d105b), rs2:x23(0x0000000000000094), imm:0x0
+ TEST_RI_OP(sm4ed, x25, x23, 0x0, 0x00000000ca1389ac, 0xf5adb41aa47d105b, 0x0000000000000094, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox32
+ // result rd:x26(0x00000000c22f28f3), rs1=>rd:x26(0xdf7f3844121bcc23), rs2:x22(0x0000000000009500), imm:0x1
+ TEST_RI_OP(sm4ed, x26, x22, 0x1, 0x00000000c22f28f3, 0xdf7f3844121bcc23, 0x0000000000009500, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox32
+ // result rd:x27(0x00000000b79839fd), rs1=>rd:x27(0x10fd3dedadea5195), rs2:x21(0x0000000000960000), imm:0x2
+ TEST_RI_OP(sm4ed, x27, x21, 0x2, 0x00000000b79839fd, 0x10fd3dedadea5195, 0x0000000000960000, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox32
+ // result rd:x28(0x00000000d3aaeb95), rs1=>rd:x28(0xbd295ce2d2ffbec1), rs2:x20(0x0000000097000000), imm:0x3
+ TEST_RI_OP(sm4ed, x28, x20, 0x3, 0x00000000d3aaeb95, 0xbd295ce2d2ffbec1, 0x0000000097000000, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox32
+ // result rd:x29(0x000000001e5707a2), rs1=>rd:x29(0xc9649f05a8e1a8bb), rs2:x19(0x0000000000000098), imm:0x0
+ TEST_RI_OP(sm4ed, x29, x19, 0x0, 0x000000001e5707a2, 0xc9649f05a8e1a8bb, 0x0000000000000098, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox32
+ // result rd:x30(0x0000000006584085), rs1=>rd:x30(0x3541291848c99fcb), rs2:x18(0x0000000000009900), imm:0x1
+ TEST_RI_OP(sm4ed, x30, x18, 0x1, 0x0000000006584085, 0x3541291848c99fcb, 0x0000000000009900, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox32
+ // result rd:x31(0x0000000074e79a87), rs1=>rd:x31(0x10a24740461d524f), rs2:x17(0x00000000009a0000), imm:0x2
+ TEST_RI_OP(sm4ed, x31, x17, 0x2, 0x0000000074e79a87, 0x10a24740461d524f, 0x00000000009a0000, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox32
+ // result rd:x1(0x00000000a24ad09f), rs1=>rd:x1(0x546b0e54528a10af), rs2:x16(0x000000009b000000), imm:0x3
+ TEST_RI_OP(sm4ed, x1, x16, 0x3, 0x00000000a24ad09f, 0x546b0e54528a10af, 0x000000009b000000, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox32
+ // result rd:x2(0x00000000364c0de2), rs1=>rd:x2(0x73a92fd4e19bfbc3), rs2:x15(0x000000000000009c), imm:0x0
+ TEST_RI_OP(sm4ed, x2, x15, 0x0, 0x00000000364c0de2, 0x73a92fd4e19bfbc3, 0x000000000000009c, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox32
+ // result rd:x3(0x0000000042f44ef2), rs1=>rd:x3(0x82f6747f707af2c0), rs2:x14(0x0000000000009d00), imm:0x1
+ TEST_RI_OP(sm4ed, x3, x14, 0x1, 0x0000000042f44ef2, 0x82f6747f707af2c0, 0x0000000000009d00, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox32
+ // result rd:x4(0x000000001708d69d), rs1=>rd:x4(0xf5adb41aa47d105b), rs2:x13(0x00000000009e0000), imm:0x2
+ TEST_RI_OP(sm4ed, x4, x13, 0x2, 0x000000001708d69d, 0xf5adb41aa47d105b, 0x00000000009e0000, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox32
+ // result rd:x5(0x000000007d9443c3), rs1=>rd:x5(0xdf7f3844121bcc23), rs2:x12(0x000000009f000000), imm:0x3
+ TEST_RI_OP(sm4ed, x5, x12, 0x3, 0x000000007d9443c3, 0xdf7f3844121bcc23, 0x000000009f000000, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox32
+ // result rd:x6(0x00000000d99e4cfc), rs1=>rd:x6(0x10fd3dedadea5195), rs2:x11(0x00000000000000a0), imm:0x0
+ TEST_RI_OP(sm4ed, x6, x11, 0x0, 0x00000000d99e4cfc, 0x10fd3dedadea5195, 0x00000000000000a0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox32
+ // result rd:x7(0x00000000090a901a), rs1=>rd:x7(0xbd295ce2d2ffbec1), rs2:x10(0x000000000000a100), imm:0x1
+ TEST_RI_OP(sm4ed, x7, x10, 0x1, 0x00000000090a901a, 0xbd295ce2d2ffbec1, 0x000000000000a100, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox32
+ // result rd:x8(0x00000000498b2330), rs1=>rd:x8(0xc9649f05a8e1a8bb), rs2:x9(0x0000000000a20000), imm:0x2
+ TEST_RI_OP(sm4ed, x8, x9, 0x2, 0x00000000498b2330, 0xc9649f05a8e1a8bb, 0x0000000000a20000, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox32
+ // result rd:x9(0x00000000de7127e5), rs1=>rd:x9(0x3541291848c99fcb), rs2:x8(0x00000000a3000000), imm:0x3
+ TEST_RI_OP(sm4ed, x9, x8, 0x3, 0x00000000de7127e5, 0x3541291848c99fcb, 0x00000000a3000000, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox32
+ // result rd:x10(0x000000004c17d2c5), rs1=>rd:x10(0x10a24740461d524f), rs2:x7(0x00000000000000a4), imm:0x0
+ TEST_RI_OP(sm4ed, x10, x7, 0x0, 0x000000004c17d2c5, 0x10a24740461d524f, 0x00000000000000a4, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox32
+ // result rd:x11(0x00000000cbedee36), rs1=>rd:x11(0x546b0e54528a10af), rs2:x6(0x000000000000a500), imm:0x1
+ TEST_RI_OP(sm4ed, x11, x6, 0x1, 0x00000000cbedee36, 0x546b0e54528a10af, 0x000000000000a500, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox32
+ // result rd:x12(0x000000002879d0e8), rs1=>rd:x12(0x73a92fd4e19bfbc3), rs2:x5(0x0000000000a60000), imm:0x2
+ TEST_RI_OP(sm4ed, x12, x5, 0x2, 0x000000002879d0e8, 0x73a92fd4e19bfbc3, 0x0000000000a60000, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox32
+ // result rd:x13(0x0000000090fb73a1), rs1=>rd:x13(0x82f6747f707af2c0), rs2:x4(0x00000000a7000000), imm:0x3
+ TEST_RI_OP(sm4ed, x13, x4, 0x3, 0x0000000090fb73a1, 0x82f6747f707af2c0, 0x00000000a7000000, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox32
+ // result rd:x14(0x00000000a77ed39b), rs1=>rd:x14(0xf5adb41aa47d105b), rs2:x3(0x00000000000000a8), imm:0x0
+ TEST_RI_OP(sm4ed, x14, x3, 0x0, 0x00000000a77ed39b, 0xf5adb41aa47d105b, 0x00000000000000a8, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox32
+ // result rd:x15(0x00000000b6324187), rs1=>rd:x15(0xdf7f3844121bcc23), rs2:x2(0x000000000000a900), imm:0x1
+ TEST_RI_OP(sm4ed, x15, x2, 0x1, 0x00000000b6324187, 0xdf7f3844121bcc23, 0x000000000000a900, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox32
+ // result rd:x16(0x000000008e45dd19), rs1=>rd:x16(0x10fd3dedadea5195), rs2:x1(0x0000000000aa0000), imm:0x2
+ TEST_RI_OP(sm4ed, x16, x1, 0x2, 0x000000008e45dd19, 0x10fd3dedadea5195, 0x0000000000aa0000, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox32
+ // result rd:x17(0x00000000d5511068), rs1=>rd:x17(0xbd295ce2d2ffbec1), rs2:x31(0x00000000ab000000), imm:0x3
+ TEST_RI_OP(sm4ed, x17, x31, 0x3, 0x00000000d5511068, 0xbd295ce2d2ffbec1, 0x00000000ab000000, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox32
+ // result rd:x18(0x000000009cd5a582), rs1=>rd:x18(0xc9649f05a8e1a8bb), rs2:x30(0x00000000000000ac), imm:0x0
+ TEST_RI_OP(sm4ed, x18, x30, 0x0, 0x000000009cd5a582, 0xc9649f05a8e1a8bb, 0x00000000000000ac, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox32
+ // result rd:x19(0x00000000059b8086), rs1=>rd:x19(0x3541291848c99fcb), rs2:x29(0x000000000000ad00), imm:0x1
+ TEST_RI_OP(sm4ed, x19, x29, 0x1, 0x00000000059b8086, 0x3541291848c99fcb, 0x000000000000ad00, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox32
+ // result rd:x20(0x00000000096b6b76), rs1=>rd:x20(0x10a24740461d524f), rs2:x28(0x0000000000ae0000), imm:0x2
+ TEST_RI_OP(sm4ed, x20, x28, 0x2, 0x00000000096b6b76, 0x10a24740461d524f, 0x0000000000ae0000, x2, 32, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox32
+ // result rd:x21(0x000000008137adc1), rs1=>rd:x21(0x546b0e54528a10af), rs2:x27(0x00000000af000000), imm:0x3
+ TEST_RI_OP(sm4ed, x21, x27, 0x3, 0x000000008137adc1, 0x546b0e54528a10af, 0x00000000af000000, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox32
+ // result rd:x22(0x00000000b6cc2d42), rs1=>rd:x22(0x73a92fd4e19bfbc3), rs2:x26(0x00000000000000b0), imm:0x0
+ TEST_RI_OP(sm4ed, x22, x26, 0x0, 0x00000000b6cc2d42, 0x73a92fd4e19bfbc3, 0x00000000000000b0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox32
+ // result rd:x23(0x000000001fa245af), rs1=>rd:x23(0x82f6747f707af2c0), rs2:x25(0x000000000000b100), imm:0x1
+ TEST_RI_OP(sm4ed, x23, x25, 0x1, 0x000000001fa245af, 0x82f6747f707af2c0, 0x000000000000b100, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox32
+ // result rd:x24(0x000000003759dcdc), rs1=>rd:x24(0xf5adb41aa47d105b), rs2:x24(0x0000000000b20000), imm:0x2
+ TEST_RI_OP(sm4ed, x24, x24, 0x2, 0x000000003759dcdc, 0xf5adb41aa47d105b, 0x0000000000b20000, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox32
+ // result rd:x25(0x00000000430ed967), rs1=>rd:x25(0xdf7f3844121bcc23), rs2:x23(0x00000000b3000000), imm:0x3
+ TEST_RI_OP(sm4ed, x25, x23, 0x3, 0x00000000430ed967, 0xdf7f3844121bcc23, 0x00000000b3000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox32
+ // result rd:x26(0x00000000d6918c33), rs1=>rd:x26(0x10fd3dedadea5195), rs2:x22(0x00000000000000b4), imm:0x0
+ TEST_RI_OP(sm4ed, x26, x22, 0x0, 0x00000000d6918c33, 0x10fd3dedadea5195, 0x00000000000000b4, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox32
+ // result rd:x27(0x000000002501b736), rs1=>rd:x27(0xbd295ce2d2ffbec1), rs2:x21(0x000000000000b500), imm:0x1
+ TEST_RI_OP(sm4ed, x27, x21, 0x1, 0x000000002501b736, 0xbd295ce2d2ffbec1, 0x000000000000b500, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox32
+ // result rd:x28(0x0000000024579281), rs1=>rd:x28(0xc9649f05a8e1a8bb), rs2:x20(0x0000000000b60000), imm:0x2
+ TEST_RI_OP(sm4ed, x28, x20, 0x2, 0x0000000024579281, 0xc9649f05a8e1a8bb, 0x0000000000b60000, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox32
+ // result rd:x29(0x00000000db7523e4), rs1=>rd:x29(0x3541291848c99fcb), rs2:x19(0x00000000b7000000), imm:0x3
+ TEST_RI_OP(sm4ed, x29, x19, 0x3, 0x00000000db7523e4, 0x3541291848c99fcb, 0x00000000b7000000, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox32
+ // result rd:x30(0x000000004a115140), rs1=>rd:x30(0x10a24740461d524f), rs2:x18(0x00000000000000b8), imm:0x0
+ TEST_RI_OP(sm4ed, x30, x18, 0x0, 0x000000004a115140, 0x10a24740461d524f, 0x00000000000000b8, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox32
+ // result rd:x31(0x00000000ad761350), rs1=>rd:x31(0x546b0e54528a10af), rs2:x17(0x000000000000b900), imm:0x1
+ TEST_RI_OP(sm4ed, x31, x17, 0x1, 0x00000000ad761350, 0x546b0e54528a10af, 0x000000000000b900, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox32
+ // result rd:x1(0x000000008a59526a), rs1=>rd:x1(0x73a92fd4e19bfbc3), rs2:x16(0x0000000000ba0000), imm:0x2
+ TEST_RI_OP(sm4ed, x1, x16, 0x2, 0x000000008a59526a, 0x73a92fd4e19bfbc3, 0x0000000000ba0000, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox32
+ // result rd:x2(0x00000000cab33bb3), rs1=>rd:x2(0x82f6747f707af2c0), rs2:x15(0x00000000bb000000), imm:0x3
+ TEST_RI_OP(sm4ed, x2, x15, 0x3, 0x00000000cab33bb3, 0x82f6747f707af2c0, 0x00000000bb000000, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox32
+ // result rd:x3(0x0000000011c87c82), rs1=>rd:x3(0xf5adb41aa47d105b), rs2:x14(0x00000000000000bc), imm:0x0
+ TEST_RI_OP(sm4ed, x3, x14, 0x0, 0x0000000011c87c82, 0xf5adb41aa47d105b, 0x00000000000000bc, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox32
+ // result rd:x4(0x00000000a3761092), rs1=>rd:x4(0xdf7f3844121bcc23), rs2:x13(0x000000000000bd00), imm:0x1
+ TEST_RI_OP(sm4ed, x4, x13, 0x1, 0x00000000a3761092, 0xdf7f3844121bcc23, 0x000000000000bd00, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox32
+ // result rd:x5(0x00000000f7dd3cf8), rs1=>rd:x5(0x10fd3dedadea5195), rs2:x12(0x0000000000be0000), imm:0x2
+ TEST_RI_OP(sm4ed, x5, x12, 0x2, 0x00000000f7dd3cf8, 0x10fd3dedadea5195, 0x0000000000be0000, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox32
+ // result rd:x6(0x00000000c7bafb91), rs1=>rd:x6(0xbd295ce2d2ffbec1), rs2:x11(0x00000000bf000000), imm:0x3
+ TEST_RI_OP(sm4ed, x6, x11, 0x3, 0x00000000c7bafb91, 0xbd295ce2d2ffbec1, 0x00000000bf000000, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox32
+ // result rd:x7(0x000000009ed72702), rs1=>rd:x7(0xc9649f05a8e1a8bb), rs2:x10(0x00000000000000c0), imm:0x0
+ TEST_RI_OP(sm4ed, x7, x10, 0x0, 0x000000009ed72702, 0xc9649f05a8e1a8bb, 0x00000000000000c0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox32
+ // result rd:x8(0x0000000024d2e8a7), rs1=>rd:x8(0x3541291848c99fcb), rs2:x9(0x000000000000c100), imm:0x1
+ TEST_RI_OP(sm4ed, x8, x9, 0x1, 0x0000000024d2e8a7, 0x3541291848c99fcb, 0x000000000000c100, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox32
+ // result rd:x9(0x00000000eb0eecf1), rs1=>rd:x9(0x10a24740461d524f), rs2:x8(0x0000000000c20000), imm:0x2
+ TEST_RI_OP(sm4ed, x9, x8, 0x2, 0x00000000eb0eecf1, 0x10a24740461d524f, 0x0000000000c20000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox32
+ // result rd:x10(0x0000000088c05a3f), rs1=>rd:x10(0x546b0e54528a10af), rs2:x7(0x00000000c3000000), imm:0x3
+ TEST_RI_OP(sm4ed, x10, x7, 0x3, 0x0000000088c05a3f, 0x546b0e54528a10af, 0x00000000c3000000, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox32
+ // result rd:x11(0x000000000f754294), rs1=>rd:x11(0x73a92fd4e19bfbc3), rs2:x6(0x00000000000000c4), imm:0x0
+ TEST_RI_OP(sm4ed, x11, x6, 0x0, 0x000000000f754294, 0x73a92fd4e19bfbc3, 0x00000000000000c4, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox32
+ // result rd:x12(0x0000000007a45bb7), rs1=>rd:x12(0x82f6747f707af2c0), rs2:x5(0x000000000000c500), imm:0x1
+ TEST_RI_OP(sm4ed, x12, x5, 0x1, 0x0000000007a45bb7, 0x82f6747f707af2c0, 0x000000000000c500, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox32
+ // result rd:x13(0x000000001a31e2a9), rs1=>rd:x13(0xf5adb41aa47d105b), rs2:x4(0x0000000000c60000), imm:0x2
+ TEST_RI_OP(sm4ed, x13, x4, 0x2, 0x000000001a31e2a9, 0xf5adb41aa47d105b, 0x0000000000c60000, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox32
+ // result rd:x14(0x0000000091e6315d), rs1=>rd:x14(0xdf7f3844121bcc23), rs2:x3(0x00000000c7000000), imm:0x3
+ TEST_RI_OP(sm4ed, x14, x3, 0x3, 0x0000000091e6315d, 0xdf7f3844121bcc23, 0x00000000c7000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox32
+ // result rd:x15(0x00000000e9ae40c0), rs1=>rd:x15(0x10fd3dedadea5195), rs2:x2(0x00000000000000c8), imm:0x0
+ TEST_RI_OP(sm4ed, x15, x2, 0x0, 0x00000000e9ae40c0, 0x10fd3dedadea5195, 0x00000000000000c8, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox32
+ // result rd:x16(0x00000000b52503a6), rs1=>rd:x16(0xbd295ce2d2ffbec1), rs2:x1(0x000000000000c900), imm:0x1
+ TEST_RI_OP(sm4ed, x16, x1, 0x1, 0x00000000b52503a6, 0xbd295ce2d2ffbec1, 0x000000000000c900, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox32
+ // result rd:x17(0x00000000f5cdd9ca), rs1=>rd:x17(0xc9649f05a8e1a8bb), rs2:x31(0x0000000000ca0000), imm:0x2
+ TEST_RI_OP(sm4ed, x17, x31, 0x2, 0x00000000f5cdd9ca, 0xc9649f05a8e1a8bb, 0x0000000000ca0000, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox32
+ // result rd:x18(0x000000000dcc9a8b), rs1=>rd:x18(0x3541291848c99fcb), rs2:x30(0x00000000cb000000), imm:0x3
+ TEST_RI_OP(sm4ed, x18, x30, 0x3, 0x000000000dcc9a8b, 0x3541291848c99fcb, 0x00000000cb000000, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox32
+ // result rd:x19(0x000000003a614d2c), rs1=>rd:x19(0x10a24740461d524f), rs2:x29(0x00000000000000cc), imm:0x0
+ TEST_RI_OP(sm4ed, x19, x29, 0x0, 0x000000003a614d2c, 0x10a24740461d524f, 0x00000000000000cc, x3, 32, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox32
+ // result rd:x20(0x00000000129a40ef), rs1=>rd:x20(0x546b0e54528a10af), rs2:x28(0x000000000000cd00), imm:0x1
+ TEST_RI_OP(sm4ed, x20, x28, 0x1, 0x00000000129a40ef, 0x546b0e54528a10af, 0x000000000000cd00, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox32
+ // result rd:x21(0x00000000baa992aa), rs1=>rd:x21(0x73a92fd4e19bfbc3), rs2:x27(0x0000000000ce0000), imm:0x2
+ TEST_RI_OP(sm4ed, x21, x27, 0x2, 0x00000000baa992aa, 0x73a92fd4e19bfbc3, 0x0000000000ce0000, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox32
+ // result rd:x22(0x00000000c819911b), rs1=>rd:x22(0x82f6747f707af2c0), rs2:x26(0x00000000cf000000), imm:0x3
+ TEST_RI_OP(sm4ed, x22, x26, 0x3, 0x00000000c819911b, 0x82f6747f707af2c0, 0x00000000cf000000, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox32
+ // result rd:x23(0x000000008c551a79), rs1=>rd:x23(0xf5adb41aa47d105b), rs2:x25(0x00000000000000d0), imm:0x0
+ TEST_RI_OP(sm4ed, x23, x25, 0x0, 0x000000008c551a79, 0xf5adb41aa47d105b, 0x00000000000000d0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox32
+ // result rd:x24(0x0000000007c21407), rs1=>rd:x24(0xdf7f3844121bcc23), rs2:x24(0x000000000000d100), imm:0x1
+ TEST_RI_OP(sm4ed, x24, x24, 0x1, 0x0000000007c21407, 0xdf7f3844121bcc23, 0x000000000000d100, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox32
+ // result rd:x25(0x000000009c1f9551), rs1=>rd:x25(0x10fd3dedadea5195), rs2:x23(0x0000000000d20000), imm:0x2
+ TEST_RI_OP(sm4ed, x25, x23, 0x2, 0x000000009c1f9551, 0x10fd3dedadea5195, 0x0000000000d20000, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox32
+ // result rd:x26(0x000000007add9c4b), rs1=>rd:x26(0xbd295ce2d2ffbec1), rs2:x22(0x00000000d3000000), imm:0x3
+ TEST_RI_OP(sm4ed, x26, x22, 0x3, 0x000000007add9c4b, 0xbd295ce2d2ffbec1, 0x00000000d3000000, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox32
+ // result rd:x27(0x000000003e770f8a), rs1=>rd:x27(0xc9649f05a8e1a8bb), rs2:x21(0x00000000000000d4), imm:0x0
+ TEST_RI_OP(sm4ed, x27, x21, 0x0, 0x000000003e770f8a, 0xc9649f05a8e1a8bb, 0x00000000000000d4, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox32
+ // result rd:x28(0x000000007f0766fc), rs1=>rd:x28(0x3541291848c99fcb), rs2:x20(0x000000000000d500), imm:0x1
+ TEST_RI_OP(sm4ed, x28, x20, 0x1, 0x000000007f0766fc, 0x3541291848c99fcb, 0x000000000000d500, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox32
+ // result rd:x29(0x000000003c8abfa2), rs1=>rd:x29(0x10a24740461d524f), rs2:x19(0x0000000000d60000), imm:0x2
+ TEST_RI_OP(sm4ed, x29, x19, 0x2, 0x000000003c8abfa2, 0x10a24740461d524f, 0x0000000000d60000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox32
+ // result rd:x30(0x000000001b7ce610), rs1=>rd:x30(0x546b0e54528a10af), rs2:x18(0x00000000d7000000), imm:0x3
+ TEST_RI_OP(sm4ed, x30, x18, 0x3, 0x000000001b7ce610, 0x546b0e54528a10af, 0x00000000d7000000, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox32
+ // result rd:x31(0x00000000552fd65a), rs1=>rd:x31(0x73a92fd4e19bfbc3), rs2:x17(0x00000000000000d8), imm:0x0
+ TEST_RI_OP(sm4ed, x31, x17, 0x0, 0x00000000552fd65a, 0x73a92fd4e19bfbc3, 0x00000000000000d8, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox32
+ // result rd:x1(0x00000000a10f5611), rs1=>rd:x1(0x82f6747f707af2c0), rs2:x16(0x000000000000d900), imm:0x1
+ TEST_RI_OP(sm4ed, x1, x16, 0x1, 0x00000000a10f5611, 0x82f6747f707af2c0, 0x000000000000d900, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox32
+ // result rd:x2(0x0000000077ed5318), rs1=>rd:x2(0xf5adb41aa47d105b), rs2:x15(0x0000000000da0000), imm:0x2
+ TEST_RI_OP(sm4ed, x2, x15, 0x2, 0x0000000077ed5318, 0xf5adb41aa47d105b, 0x0000000000da0000, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox32
+ // result rd:x3(0x0000000048538431), rs1=>rd:x3(0xdf7f3844121bcc23), rs2:x14(0x00000000db000000), imm:0x3
+ TEST_RI_OP(sm4ed, x3, x14, 0x3, 0x0000000048538431, 0xdf7f3844121bcc23, 0x00000000db000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox32
+ // result rd:x4(0x000000004f08ebcd), rs1=>rd:x4(0x10fd3dedadea5195), rs2:x13(0x00000000000000dc), imm:0x0
+ TEST_RI_OP(sm4ed, x4, x13, 0x0, 0x000000004f08ebcd, 0x10fd3dedadea5195, 0x00000000000000dc, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox32
+ // result rd:x5(0x000000004519cf56), rs1=>rd:x5(0xbd295ce2d2ffbec1), rs2:x12(0x000000000000dd00), imm:0x1
+ TEST_RI_OP(sm4ed, x5, x12, 0x1, 0x000000004519cf56, 0xbd295ce2d2ffbec1, 0x000000000000dd00, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox32
+ // result rd:x6(0x000000001e857a69), rs1=>rd:x6(0xc9649f05a8e1a8bb), rs2:x11(0x0000000000de0000), imm:0x2
+ TEST_RI_OP(sm4ed, x6, x11, 0x2, 0x000000001e857a69, 0xc9649f05a8e1a8bb, 0x0000000000de0000, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox32
+ // result rd:x7(0x00000000380b5d79), rs1=>rd:x7(0x3541291848c99fcb), rs2:x10(0x00000000df000000), imm:0x3
+ TEST_RI_OP(sm4ed, x7, x10, 0x3, 0x00000000380b5d79, 0x3541291848c99fcb, 0x00000000df000000, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox32
+ // result rd:x8(0x00000000603bd9e2), rs1=>rd:x8(0x10a24740461d524f), rs2:x9(0x00000000000000e0), imm:0x0
+ TEST_RI_OP(sm4ed, x8, x9, 0x0, 0x00000000603bd9e2, 0x10a24740461d524f, 0x00000000000000e0, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox32
+ // result rd:x9(0x00000000f7e2dd0a), rs1=>rd:x9(0x546b0e54528a10af), rs2:x8(0x000000000000e100), imm:0x1
+ TEST_RI_OP(sm4ed, x9, x8, 0x1, 0x00000000f7e2dd0a, 0x546b0e54528a10af, 0x000000000000e100, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox32
+ // result rd:x10(0x000000007450a59d), rs1=>rd:x10(0x73a92fd4e19bfbc3), rs2:x7(0x0000000000e20000), imm:0x2
+ TEST_RI_OP(sm4ed, x10, x7, 0x2, 0x000000007450a59d, 0x73a92fd4e19bfbc3, 0x0000000000e20000, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox32
+ // result rd:x11(0x000000001253db8b), rs1=>rd:x11(0x82f6747f707af2c0), rs2:x6(0x00000000e3000000), imm:0x3
+ TEST_RI_OP(sm4ed, x11, x6, 0x3, 0x000000001253db8b, 0x82f6747f707af2c0, 0x00000000e3000000, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox32
+ // result rd:x12(0x00000000944d1c67), rs1=>rd:x12(0xf5adb41aa47d105b), rs2:x5(0x00000000000000e4), imm:0x0
+ TEST_RI_OP(sm4ed, x12, x5, 0x0, 0x00000000944d1c67, 0xf5adb41aa47d105b, 0x00000000000000e4, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox32
+ // result rd:x13(0x00000000488f0279), rs1=>rd:x13(0xdf7f3844121bcc23), rs2:x4(0x000000000000e500), imm:0x1
+ TEST_RI_OP(sm4ed, x13, x4, 0x1, 0x00000000488f0279, 0xdf7f3844121bcc23, 0x000000000000e500, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox32
+ // result rd:x14(0x00000000db418c48), rs1=>rd:x14(0x10fd3dedadea5195), rs2:x3(0x0000000000e60000), imm:0x2
+ TEST_RI_OP(sm4ed, x14, x3, 0x2, 0x00000000db418c48, 0x10fd3dedadea5195, 0x0000000000e60000, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox32
+ // result rd:x15(0x00000000540647be), rs1=>rd:x15(0xbd295ce2d2ffbec1), rs2:x2(0x00000000e7000000), imm:0x3
+ TEST_RI_OP(sm4ed, x15, x2, 0x3, 0x00000000540647be, 0xbd295ce2d2ffbec1, 0x00000000e7000000, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox32
+ // result rd:x16(0x000000003d74cc4a), rs1=>rd:x16(0xc9649f05a8e1a8bb), rs2:x1(0x00000000000000e8), imm:0x0
+ TEST_RI_OP(sm4ed, x16, x1, 0x0, 0x000000003d74cc4a, 0xc9649f05a8e1a8bb, 0x00000000000000e8, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox32
+ // result rd:x17(0x00000000ae72c22d), rs1=>rd:x17(0x3541291848c99fcb), rs2:x31(0x000000000000e900), imm:0x1
+ TEST_RI_OP(sm4ed, x17, x31, 0x1, 0x00000000ae72c22d, 0x3541291848c99fcb, 0x000000000000e900, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox32
+ // result rd:x18(0x00000000b4289588), rs1=>rd:x18(0x10a24740461d524f), rs2:x30(0x0000000000ea0000), imm:0x2
+ TEST_RI_OP(sm4ed, x18, x30, 0x2, 0x00000000b4289588, 0x10a24740461d524f, 0x0000000000ea0000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox32
+ // result rd:x19(0x000000007fae34a6), rs1=>rd:x19(0x546b0e54528a10af), rs2:x29(0x00000000eb000000), imm:0x3
+ TEST_RI_OP(sm4ed, x19, x29, 0x3, 0x000000007fae34a6, 0x546b0e54528a10af, 0x00000000eb000000, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox32
+ // result rd:x20(0x00000000f68c3d12), rs1=>rd:x20(0x73a92fd4e19bfbc3), rs2:x28(0x00000000000000ec), imm:0x0
+ TEST_RI_OP(sm4ed, x20, x28, 0x0, 0x00000000f68c3d12, 0x73a92fd4e19bfbc3, 0x00000000000000ec, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox32
+ // result rd:x21(0x00000000c9152479), rs1=>rd:x21(0x82f6747f707af2c0), rs2:x27(0x000000000000ed00), imm:0x1
+ TEST_RI_OP(sm4ed, x21, x27, 0x1, 0x00000000c9152479, 0x82f6747f707af2c0, 0x000000000000ed00, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox32
+ // result rd:x22(0x0000000061a30b40), rs1=>rd:x22(0xf5adb41aa47d105b), rs2:x26(0x0000000000ee0000), imm:0x2
+ TEST_RI_OP(sm4ed, x22, x26, 0x2, 0x0000000061a30b40, 0xf5adb41aa47d105b, 0x0000000000ee0000, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox32
+ // result rd:x23(0x000000008609dea5), rs1=>rd:x23(0xdf7f3844121bcc23), rs2:x25(0x00000000ef000000), imm:0x3
+ TEST_RI_OP(sm4ed, x23, x25, 0x3, 0x000000008609dea5, 0xdf7f3844121bcc23, 0x00000000ef000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox32
+ // result rd:x24(0x0000000060601888), rs1=>rd:x24(0x10fd3dedadea5195), rs2:x24(0x00000000000000f0), imm:0x0
+ TEST_RI_OP(sm4ed, x24, x24, 0x0, 0x0000000060601888, 0x10fd3dedadea5195, 0x00000000000000f0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox32
+ // result rd:x25(0x00000000110c8e02), rs1=>rd:x25(0xbd295ce2d2ffbec1), rs2:x23(0x000000000000f100), imm:0x1
+ TEST_RI_OP(sm4ed, x25, x23, 0x1, 0x00000000110c8e02, 0xbd295ce2d2ffbec1, 0x000000000000f100, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox32
+ // result rd:x26(0x00000000d4685d4e), rs1=>rd:x26(0xc9649f05a8e1a8bb), rs2:x22(0x0000000000f20000), imm:0x2
+ TEST_RI_OP(sm4ed, x26, x22, 0x2, 0x00000000d4685d4e, 0xc9649f05a8e1a8bb, 0x0000000000f20000, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox32
+ // result rd:x27(0x00000000147a2c24), rs1=>rd:x27(0x3541291848c99fcb), rs2:x21(0x00000000f3000000), imm:0x3
+ TEST_RI_OP(sm4ed, x27, x21, 0x3, 0x00000000147a2c24, 0x3541291848c99fcb, 0x00000000f3000000, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox32
+ // result rd:x28(0x00000000aef5689d), rs1=>rd:x28(0x10a24740461d524f), rs2:x20(0x00000000000000f4), imm:0x0
+ TEST_RI_OP(sm4ed, x28, x20, 0x0, 0x00000000aef5689d, 0x10a24740461d524f, 0x00000000000000f4, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox32
+ // result rd:x29(0x000000002155bcdc), rs1=>rd:x29(0x546b0e54528a10af), rs2:x19(0x000000000000f500), imm:0x1
+ TEST_RI_OP(sm4ed, x29, x19, 0x1, 0x000000002155bcdc, 0x546b0e54528a10af, 0x000000000000f500, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox32
+ // result rd:x30(0x00000000ade2cef6), rs1=>rd:x30(0x73a92fd4e19bfbc3), rs2:x18(0x0000000000f60000), imm:0x2
+ TEST_RI_OP(sm4ed, x30, x18, 0x2, 0x00000000ade2cef6, 0x73a92fd4e19bfbc3, 0x0000000000f60000, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox32
+ // result rd:x31(0x00000000d0fa72e0), rs1=>rd:x31(0x82f6747f707af2c0), rs2:x17(0x00000000f7000000), imm:0x3
+ TEST_RI_OP(sm4ed, x31, x17, 0x3, 0x00000000d0fa72e0, 0x82f6747f707af2c0, 0x00000000f7000000, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox32
+ // result rd:x1(0x00000000419868c6), rs1=>rd:x1(0xf5adb41aa47d105b), rs2:x16(0x00000000000000f8), imm:0x0
+ TEST_RI_OP(sm4ed, x1, x16, 0x0, 0x00000000419868c6, 0xf5adb41aa47d105b, 0x00000000000000f8, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox32
+ // result rd:x2(0x00000000a9f69a98), rs1=>rd:x2(0xdf7f3844121bcc23), rs2:x15(0x000000000000f900), imm:0x1
+ TEST_RI_OP(sm4ed, x2, x15, 0x1, 0x00000000a9f69a98, 0xdf7f3844121bcc23, 0x000000000000f900, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox32
+ // result rd:x3(0x00000000f3c92ce8), rs1=>rd:x3(0x10fd3dedadea5195), rs2:x14(0x0000000000fa0000), imm:0x2
+ TEST_RI_OP(sm4ed, x3, x14, 0x2, 0x00000000f3c92ce8, 0x10fd3dedadea5195, 0x0000000000fa0000, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox32
+ // result rd:x4(0x00000000140746ff), rs1=>rd:x4(0xbd295ce2d2ffbec1), rs2:x13(0x00000000fb000000), imm:0x3
+ TEST_RI_OP(sm4ed, x4, x13, 0x3, 0x00000000140746ff, 0xbd295ce2d2ffbec1, 0x00000000fb000000, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox32
+ // result rd:x5(0x00000000f7be7c30), rs1=>rd:x5(0xc9649f05a8e1a8bb), rs2:x12(0x00000000000000fc), imm:0x0
+ TEST_RI_OP(sm4ed, x5, x12, 0x0, 0x00000000f7be7c30, 0xc9649f05a8e1a8bb, 0x00000000000000fc, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox32
+ // result rd:x6(0x00000000670178e4), rs1=>rd:x6(0x3541291848c99fcb), rs2:x11(0x000000000000fd00), imm:0x1
+ TEST_RI_OP(sm4ed, x6, x11, 0x1, 0x00000000670178e4, 0x3541291848c99fcb, 0x000000000000fd00, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox32
+ // result rd:x7(0x000000007fc0b6ab), rs1=>rd:x7(0x10a24740461d524f), rs2:x10(0x0000000000fe0000), imm:0x2
+ TEST_RI_OP(sm4ed, x7, x10, 0x2, 0x000000007fc0b6ab, 0x10a24740461d524f, 0x0000000000fe0000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox32
+ // result rd:x8(0x000000003aab31e6), rs1=>rd:x8(0x546b0e54528a10af), rs2:x9(0x00000000ff000000), imm:0x3
+ TEST_RI_OP(sm4ed, x8, x9, 0x3, 0x000000003aab31e6, 0x546b0e54528a10af, 0x00000000ff000000, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SM4KS-01.S b/riscof/suite/rv64i_m/K_unratified/SM4KS-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..283184bde468e5bd96a502e4a52d81b72fa15f51
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SM4KS-01.S
@@ -0,0 +1,1892 @@
+// RISC-V Architectural Validation Test SM4KS-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sm4ks'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",sm4ks)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x0000000037aa42d8), rs1=>rd:x1(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23), imm:0x3
+ TEST_RI_OP(sm4ks, x1, x16, 0x3, 0x0000000037aa42d8, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x0000000050bfae80), rs1=>rd:x2(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b), imm:0x3
+ TEST_RI_OP(sm4ks, x2, x15, 0x3, 0x0000000050bfae80, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x000000000870ee36), rs1=>rd:x3(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0), imm:0x0
+ TEST_RI_OP(sm4ks, x3, x14, 0x0, 0x000000000870ee36, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x0000000021e912ff), rs1=>rd:x4(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3), imm:0x3
+ TEST_RI_OP(sm4ks, x4, x13, 0x3, 0x0000000021e912ff, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x00000000c73dc20f), rs1=>rd:x5(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af), imm:0x3
+ TEST_RI_OP(sm4ks, x5, x12, 0x3, 0x00000000c73dc20f, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x00000000456a92a4), rs1=>rd:x6(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f), imm:0x3
+ TEST_RI_OP(sm4ks, x6, x11, 0x3, 0x00000000456a92a4, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x0000000062fb6b82), rs1=>rd:x7(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb), imm:0x3
+ TEST_RI_OP(sm4ks, x7, x10, 0x3, 0x0000000062fb6b82, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x00000000b07aeaa0), rs1=>rd:x8(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb), imm:0x3
+ TEST_RI_OP(sm4ks, x8, x9, 0x3, 0x00000000b07aeaa0, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x000000002f504b3b), rs1=>rd:x9(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1), imm:0x1
+ TEST_RI_OP(sm4ks, x9, x8, 0x1, 0x000000002f504b3b, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x000000009f2ea743), rs1=>rd:x10(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195), imm:0x1
+ TEST_RI_OP(sm4ks, x10, x7, 0x1, 0x000000009f2ea743, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000048000925), rs1=>rd:x11(0x0000000000000001), rs2:x6(0xffffffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x11, x6, 0x3, 0x0000000048000925, 0x0000000000000001, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000009244802), rs1=>rd:x12(0x0000000000000002), rs2:x5(0x7fffffffffffffff), imm:0x1
+ TEST_RI_OP(sm4ks, x12, x5, 0x1, 0x0000000009244802, 0x0000000000000002, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x000000002448000d), rs1=>rd:x13(0x0000000000000004), rs2:x4(0xbfffffffffffffff), imm:0x2
+ TEST_RI_OP(sm4ks, x13, x4, 0x2, 0x000000002448000d, 0x0000000000000004, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000092440), rs1=>rd:x14(0x0000000000000008), rs2:x3(0xdfffffffffffffff), imm:0x0
+ TEST_RI_OP(sm4ks, x14, x3, 0x0, 0x0000000000092440, 0x0000000000000008, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000024480019), rs1=>rd:x15(0x0000000000000010), rs2:x2(0xefffffffffffffff), imm:0x2
+ TEST_RI_OP(sm4ks, x15, x2, 0x2, 0x0000000024480019, 0x0000000000000010, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000009244820), rs1=>rd:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff), imm:0x1
+ TEST_RI_OP(sm4ks, x16, x1, 0x1, 0x0000000009244820, 0x0000000000000020, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000048000964), rs1=>rd:x17(0x0000000000000040), rs2:x31(0xfbffffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x17, x31, 0x3, 0x0000000048000964, 0x0000000000000040, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x00000000480009a4), rs1=>rd:x18(0x0000000000000080), rs2:x30(0xfdffffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x18, x30, 0x3, 0x00000000480009a4, 0x0000000000000080, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000092548), rs1=>rd:x19(0x0000000000000100), rs2:x29(0xfeffffffffffffff), imm:0x0
+ TEST_RI_OP(sm4ks, x19, x29, 0x0, 0x0000000000092548, 0x0000000000000100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000048000b24), rs1=>rd:x20(0x0000000000000200), rs2:x28(0xff7fffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x20, x28, 0x3, 0x0000000048000b24, 0x0000000000000200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000048000d24), rs1=>rd:x21(0x0000000000000400), rs2:x27(0xffbfffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x21, x27, 0x3, 0x0000000048000d24, 0x0000000000000400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000048000124), rs1=>rd:x22(0x0000000000000800), rs2:x26(0xffdfffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x22, x26, 0x3, 0x0000000048000124, 0x0000000000000800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000048001924), rs1=>rd:x23(0x0000000000001000), rs2:x25(0xffefffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x23, x25, 0x3, 0x0000000048001924, 0x0000000000001000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x00000000b7fff6db), rs1=>rd:x24(0x0000000000002000), rs2:x24(0xfff7ffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x24, x24, 0x3, 0x00000000b7fff6db, 0x0000000000002000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000009240800), rs1=>rd:x25(0x0000000000004000), rs2:x23(0xfffbffffffffffff), imm:0x1
+ TEST_RI_OP(sm4ks, x25, x23, 0x1, 0x0000000009240800, 0x0000000000004000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x000000000924c800), rs1=>rd:x26(0x0000000000008000), rs2:x22(0xfffdffffffffffff), imm:0x1
+ TEST_RI_OP(sm4ks, x26, x22, 0x1, 0x000000000924c800, 0x0000000000008000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000048010924), rs1=>rd:x27(0x0000000000010000), rs2:x21(0xfffeffffffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x27, x21, 0x3, 0x0000000048010924, 0x0000000000010000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000009264800), rs1=>rd:x28(0x0000000000020000), rs2:x20(0xffff7fffffffffff), imm:0x1
+ TEST_RI_OP(sm4ks, x28, x20, 0x1, 0x0000000009264800, 0x0000000000020000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x00000000244c0009), rs1=>rd:x29(0x0000000000040000), rs2:x19(0xffffbfffffffffff), imm:0x2
+ TEST_RI_OP(sm4ks, x29, x19, 0x2, 0x00000000244c0009, 0x0000000000040000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000012448), rs1=>rd:x30(0x0000000000080000), rs2:x18(0xffffdfffffffffff), imm:0x0
+ TEST_RI_OP(sm4ks, x30, x18, 0x0, 0x0000000000012448, 0x0000000000080000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000024580009), rs1=>rd:x31(0x0000000000100000), rs2:x17(0xffffefffffffffff), imm:0x2
+ TEST_RI_OP(sm4ks, x31, x17, 0x2, 0x0000000024580009, 0x0000000000100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000009044800), rs1=>rd:x1(0x0000000000200000), rs2:x16(0xfffff7ffffffffff), imm:0x1
+ TEST_RI_OP(sm4ks, x1, x16, 0x1, 0x0000000009044800, 0x0000000000200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000048400924), rs1=>rd:x2(0x0000000000400000), rs2:x15(0xfffffbffffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x2, x15, 0x3, 0x0000000048400924, 0x0000000000400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000048800924), rs1=>rd:x3(0x0000000000800000), rs2:x14(0xfffffdffffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x3, x14, 0x3, 0x0000000048800924, 0x0000000000800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000001092448), rs1=>rd:x4(0x0000000001000000), rs2:x13(0xfffffeffffffffff), imm:0x0
+ TEST_RI_OP(sm4ks, x4, x13, 0x0, 0x0000000001092448, 0x0000000001000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x000000004a000924), rs1=>rd:x5(0x0000000002000000), rs2:x12(0xffffff7fffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x5, x12, 0x3, 0x000000004a000924, 0x0000000002000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x000000004c000924), rs1=>rd:x6(0x0000000004000000), rs2:x11(0xffffffbfffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x6, x11, 0x3, 0x000000004c000924, 0x0000000004000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000040000924), rs1=>rd:x7(0x0000000008000000), rs2:x10(0xffffffdfffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x7, x10, 0x3, 0x0000000040000924, 0x0000000008000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000058000924), rs1=>rd:x8(0x0000000010000000), rs2:x9(0xffffffefffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x8, x9, 0x3, 0x0000000058000924, 0x0000000010000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000068000924), rs1=>rd:x9(0x0000000020000000), rs2:x8(0xfffffff7ffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x9, x8, 0x3, 0x0000000068000924, 0x0000000020000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000049244800), rs1=>rd:x10(0x0000000040000000), rs2:x7(0xfffffffbffffffff), imm:0x1
+ TEST_RI_OP(sm4ks, x10, x7, 0x1, 0x0000000049244800, 0x0000000040000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000089244800), rs1=>rd:x11(0x0000000080000000), rs2:x6(0xfffffffdffffffff), imm:0x1
+ TEST_RI_OP(sm4ks, x11, x6, 0x1, 0x0000000089244800, 0x0000000080000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000048000924), rs1=>rd:x12(0x0000000100000000), rs2:x5(0xfffffffeffffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x12, x5, 0x3, 0x0000000048000924, 0x0000000100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000009244800), rs1=>rd:x13(0x0000000200000000), rs2:x4(0xffffffff7fffffff), imm:0x1
+ TEST_RI_OP(sm4ks, x13, x4, 0x1, 0x0000000009244800, 0x0000000200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000024480009), rs1=>rd:x14(0x0000000400000000), rs2:x3(0xffffffffbfffffff), imm:0x2
+ TEST_RI_OP(sm4ks, x14, x3, 0x2, 0x0000000024480009, 0x0000000400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000092448), rs1=>rd:x15(0x0000000800000000), rs2:x2(0xffffffffdfffffff), imm:0x0
+ TEST_RI_OP(sm4ks, x15, x2, 0x0, 0x0000000000092448, 0x0000000800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000024480009), rs1=>rd:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff), imm:0x2
+ TEST_RI_OP(sm4ks, x16, x1, 0x2, 0x0000000024480009, 0x0000001000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000009244800), rs1=>rd:x17(0x0000002000000000), rs2:x31(0xfffffffff7ffffff), imm:0x1
+ TEST_RI_OP(sm4ks, x17, x31, 0x1, 0x0000000009244800, 0x0000002000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x000000003ec0071f), rs1=>rd:x18(0x0000004000000000), rs2:x30(0xfffffffffbffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x18, x30, 0x3, 0x000000003ec0071f, 0x0000004000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x00000000cb609965), rs1=>rd:x19(0x0000008000000000), rs2:x29(0xfffffffffdffffff), imm:0x3
+ TEST_RI_OP(sm4ks, x19, x29, 0x3, 0x00000000cb609965, 0x0000008000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000092448), rs1=>rd:x20(0x0000010000000000), rs2:x28(0xfffffffffeffffff), imm:0x0
+ TEST_RI_OP(sm4ks, x20, x28, 0x0, 0x0000000000092448, 0x0000010000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000048000924), rs1=>rd:x21(0x0000020000000000), rs2:x27(0xffffffffff7fffff), imm:0x3
+ TEST_RI_OP(sm4ks, x21, x27, 0x3, 0x0000000048000924, 0x0000020000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000048000924), rs1=>rd:x22(0x0000040000000000), rs2:x26(0xffffffffffbfffff), imm:0x3
+ TEST_RI_OP(sm4ks, x22, x26, 0x3, 0x0000000048000924, 0x0000040000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000048000924), rs1=>rd:x23(0x0000080000000000), rs2:x25(0xffffffffffdfffff), imm:0x3
+ TEST_RI_OP(sm4ks, x23, x25, 0x3, 0x0000000048000924, 0x0000080000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x00000000b7eff6db), rs1=>rd:x24(0x0000100000000000), rs2:x24(0xffffffffffefffff), imm:0x3
+ TEST_RI_OP(sm4ks, x24, x24, 0x3, 0x00000000b7eff6db, 0x0000100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000048000924), rs1=>rd:x25(0x0000200000000000), rs2:x23(0xfffffffffff7ffff), imm:0x3
+ TEST_RI_OP(sm4ks, x25, x23, 0x3, 0x0000000048000924, 0x0000200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000009244800), rs1=>rd:x26(0x0000400000000000), rs2:x22(0xfffffffffffbffff), imm:0x1
+ TEST_RI_OP(sm4ks, x26, x22, 0x1, 0x0000000009244800, 0x0000400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000009244800), rs1=>rd:x27(0x0000800000000000), rs2:x21(0xfffffffffffdffff), imm:0x1
+ TEST_RI_OP(sm4ks, x27, x21, 0x1, 0x0000000009244800, 0x0000800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000048000924), rs1=>rd:x28(0x0001000000000000), rs2:x20(0xfffffffffffeffff), imm:0x3
+ TEST_RI_OP(sm4ks, x28, x20, 0x3, 0x0000000048000924, 0x0001000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x00000000134f9ec0), rs1=>rd:x29(0x0002000000000000), rs2:x19(0xffffffffffff7fff), imm:0x1
+ TEST_RI_OP(sm4ks, x29, x19, 0x1, 0x00000000134f9ec0, 0x0002000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000024480009), rs1=>rd:x30(0x0004000000000000), rs2:x18(0xffffffffffffbfff), imm:0x2
+ TEST_RI_OP(sm4ks, x30, x18, 0x2, 0x0000000024480009, 0x0004000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000092448), rs1=>rd:x31(0x0008000000000000), rs2:x17(0xffffffffffffdfff), imm:0x0
+ TEST_RI_OP(sm4ks, x31, x17, 0x0, 0x0000000000092448, 0x0008000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000024480009), rs1=>rd:x1(0x0010000000000000), rs2:x16(0xffffffffffffefff), imm:0x2
+ TEST_RI_OP(sm4ks, x1, x16, 0x2, 0x0000000024480009, 0x0010000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000004102000), rs1=>rd:x2(0x0020000000000000), rs2:x15(0xfffffffffffff7ff), imm:0x1
+ TEST_RI_OP(sm4ks, x2, x15, 0x1, 0x0000000004102000, 0x0020000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000048000924), rs1=>rd:x3(0x0040000000000000), rs2:x14(0xfffffffffffffbff), imm:0x3
+ TEST_RI_OP(sm4ks, x3, x14, 0x3, 0x0000000048000924, 0x0040000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000048000924), rs1=>rd:x4(0x0080000000000000), rs2:x13(0xfffffffffffffdff), imm:0x3
+ TEST_RI_OP(sm4ks, x4, x13, 0x3, 0x0000000048000924, 0x0080000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000092448), rs1=>rd:x5(0x0100000000000000), rs2:x12(0xfffffffffffffeff), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0x0000000000092448, 0x0100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000048000924), rs1=>rd:x6(0x0200000000000000), rs2:x11(0xffffffffffffff7f), imm:0x3
+ TEST_RI_OP(sm4ks, x6, x11, 0x3, 0x0000000048000924, 0x0200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000048000924), rs1=>rd:x7(0x0400000000000000), rs2:x10(0xffffffffffffffbf), imm:0x3
+ TEST_RI_OP(sm4ks, x7, x10, 0x3, 0x0000000048000924, 0x0400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000048000924), rs1=>rd:x8(0x0800000000000000), rs2:x9(0xffffffffffffffdf), imm:0x3
+ TEST_RI_OP(sm4ks, x8, x9, 0x3, 0x0000000048000924, 0x0800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000048000924), rs1=>rd:x9(0x1000000000000000), rs2:x8(0xffffffffffffffef), imm:0x3
+ TEST_RI_OP(sm4ks, x9, x8, 0x3, 0x0000000048000924, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000048000924), rs1=>rd:x10(0x2000000000000000), rs2:x7(0xfffffffffffffff7), imm:0x3
+ TEST_RI_OP(sm4ks, x10, x7, 0x3, 0x0000000048000924, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000009244800), rs1=>rd:x11(0x4000000000000000), rs2:x6(0xfffffffffffffffb), imm:0x1
+ TEST_RI_OP(sm4ks, x11, x6, 0x1, 0x0000000009244800, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000009244800), rs1=>rd:x12(0x8000000000000000), rs2:x5(0xfffffffffffffffd), imm:0x1
+ TEST_RI_OP(sm4ks, x12, x5, 0x1, 0x0000000009244800, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000048000924), rs1=>rd:x13(0x0000000000000000), rs2:x4(0xfffffffffffffffe), imm:0x3
+ TEST_RI_OP(sm4ks, x13, x4, 0x3, 0x0000000048000924, 0x0000000000000000, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x00000000e594293e), rs1=>rd:x14(0xfffffffffffffffe), rs2:x3(0x0000000000000000), imm:0x1
+ TEST_RI_OP(sm4ks, x14, x3, 0x1, 0x00000000e594293e, 0xfffffffffffffffe, 0x0000000000000000, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x0000000094293fe7), rs1=>rd:x15(0xfffffffffffffffd), rs2:x2(0x8000000000000000), imm:0x2
+ TEST_RI_OP(sm4ks, x15, x2, 0x2, 0x0000000094293fe7, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x000000003fe5942d), rs1=>rd:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x16, x1, 0x0, 0x000000003fe5942d, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x0000000094293fed), rs1=>rd:x17(0xfffffffffffffff7), rs2:x31(0x2000000000000000), imm:0x2
+ TEST_RI_OP(sm4ks, x17, x31, 0x2, 0x0000000094293fed, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00000000e594292f), rs1=>rd:x18(0xffffffffffffffef), rs2:x30(0x1000000000000000), imm:0x1
+ TEST_RI_OP(sm4ks, x18, x30, 0x1, 0x00000000e594292f, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00000000293fe5b4), rs1=>rd:x19(0xffffffffffffffdf), rs2:x29(0x0800000000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x19, x29, 0x3, 0x00000000293fe5b4, 0xffffffffffffffdf, 0x0800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x00000000293fe5d4), rs1=>rd:x20(0xffffffffffffffbf), rs2:x28(0x0400000000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x20, x28, 0x3, 0x00000000293fe5d4, 0xffffffffffffffbf, 0x0400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x000000003fe594a9), rs1=>rd:x21(0xffffffffffffff7f), rs2:x27(0x0200000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x21, x27, 0x0, 0x000000003fe594a9, 0xffffffffffffff7f, 0x0200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x00000000293fe494), rs1=>rd:x22(0xfffffffffffffeff), rs2:x26(0x0100000000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x22, x26, 0x3, 0x00000000293fe494, 0xfffffffffffffeff, 0x0100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x00000000293fe794), rs1=>rd:x23(0xfffffffffffffdff), rs2:x25(0x0080000000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x23, x25, 0x3, 0x00000000293fe794, 0xfffffffffffffdff, 0x0080000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x00000000d6c01a6b), rs1=>rd:x24(0xfffffffffffffbff), rs2:x24(0x0040000000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x24, x24, 0x3, 0x00000000d6c01a6b, 0xfffffffffffffbff, 0x0040000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x00000000293fed94), rs1=>rd:x25(0xfffffffffffff7ff), rs2:x23(0x0020000000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x25, x23, 0x3, 0x00000000293fed94, 0xfffffffffffff7ff, 0x0020000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x00000000293ff594), rs1=>rd:x26(0xffffffffffffefff), rs2:x22(0x0010000000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x26, x22, 0x3, 0x00000000293ff594, 0xffffffffffffefff, 0x0010000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x00000000e594093f), rs1=>rd:x27(0xffffffffffffdfff), rs2:x21(0x0008000000000000), imm:0x1
+ TEST_RI_OP(sm4ks, x27, x21, 0x1, 0x00000000e594093f, 0xffffffffffffdfff, 0x0008000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x00000000e594693f), rs1=>rd:x28(0xffffffffffffbfff), rs2:x20(0x0004000000000000), imm:0x1
+ TEST_RI_OP(sm4ks, x28, x20, 0x1, 0x00000000e594693f, 0xffffffffffffbfff, 0x0004000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x00000000293f6594), rs1=>rd:x29(0xffffffffffff7fff), rs2:x19(0x0002000000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x29, x19, 0x3, 0x00000000293f6594, 0xffffffffffff7fff, 0x0002000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x00000000e595293f), rs1=>rd:x30(0xfffffffffffeffff), rs2:x18(0x0001000000000000), imm:0x1
+ TEST_RI_OP(sm4ks, x30, x18, 0x1, 0x00000000e595293f, 0xfffffffffffeffff, 0x0001000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x00000000942b3fe5), rs1=>rd:x31(0xfffffffffffdffff), rs2:x17(0x0000800000000000), imm:0x2
+ TEST_RI_OP(sm4ks, x31, x17, 0x2, 0x00000000942b3fe5, 0xfffffffffffdffff, 0x0000800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x000000003fe19429), rs1=>rd:x1(0xfffffffffffbffff), rs2:x16(0x0000400000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x1, x16, 0x0, 0x000000003fe19429, 0xfffffffffffbffff, 0x0000400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x0000000094213fe5), rs1=>rd:x2(0xfffffffffff7ffff), rs2:x15(0x0000200000000000), imm:0x2
+ TEST_RI_OP(sm4ks, x2, x15, 0x2, 0x0000000094213fe5, 0xfffffffffff7ffff, 0x0000200000000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x00000000e584293f), rs1=>rd:x3(0xffffffffffefffff), rs2:x14(0x0000100000000000), imm:0x1
+ TEST_RI_OP(sm4ks, x3, x14, 0x1, 0x00000000e584293f, 0xffffffffffefffff, 0x0000100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x00000000291fe594), rs1=>rd:x4(0xffffffffffdfffff), rs2:x13(0x0000080000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x4, x13, 0x3, 0x00000000291fe594, 0xffffffffffdfffff, 0x0000080000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x00000000297fe594), rs1=>rd:x5(0xffffffffffbfffff), rs2:x12(0x0000040000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x5, x12, 0x3, 0x00000000297fe594, 0xffffffffffbfffff, 0x0000040000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x000000003f659429), rs1=>rd:x6(0xffffffffff7fffff), rs2:x11(0x0000020000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x6, x11, 0x0, 0x000000003f659429, 0xffffffffff7fffff, 0x0000020000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x00000000283fe594), rs1=>rd:x7(0xfffffffffeffffff), rs2:x10(0x0000010000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x7, x10, 0x3, 0x00000000283fe594, 0xfffffffffeffffff, 0x0000010000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x000000002b3fe594), rs1=>rd:x8(0xfffffffffdffffff), rs2:x9(0x0000008000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x8, x9, 0x3, 0x000000002b3fe594, 0xfffffffffdffffff, 0x0000008000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x000000002d3fe594), rs1=>rd:x9(0xfffffffffbffffff), rs2:x8(0x0000004000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x9, x8, 0x3, 0x000000002d3fe594, 0xfffffffffbffffff, 0x0000004000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x00000000213fe594), rs1=>rd:x10(0xfffffffff7ffffff), rs2:x7(0x0000002000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x10, x7, 0x3, 0x00000000213fe594, 0xfffffffff7ffffff, 0x0000002000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x00000000393fe594), rs1=>rd:x11(0xffffffffefffffff), rs2:x6(0x0000001000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x11, x6, 0x3, 0x00000000393fe594, 0xffffffffefffffff, 0x0000001000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x00000000c594293f), rs1=>rd:x12(0xffffffffdfffffff), rs2:x5(0x0000000800000000), imm:0x1
+ TEST_RI_OP(sm4ks, x12, x5, 0x1, 0x00000000c594293f, 0xffffffffdfffffff, 0x0000000800000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x00000000a594293f), rs1=>rd:x13(0xffffffffbfffffff), rs2:x4(0x0000000400000000), imm:0x1
+ TEST_RI_OP(sm4ks, x13, x4, 0x1, 0x00000000a594293f, 0xffffffffbfffffff, 0x0000000400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x00000000a93fe594), rs1=>rd:x14(0xffffffff7fffffff), rs2:x3(0x0000000200000000), imm:0x3
+ TEST_RI_OP(sm4ks, x14, x3, 0x3, 0x00000000a93fe594, 0xffffffff7fffffff, 0x0000000200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x00000000e594293f), rs1=>rd:x15(0xfffffffeffffffff), rs2:x2(0x0000000100000000), imm:0x1
+ TEST_RI_OP(sm4ks, x15, x2, 0x1, 0x00000000e594293f, 0xfffffffeffffffff, 0x0000000100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x0000000094293fe5), rs1=>rd:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000), imm:0x2
+ TEST_RI_OP(sm4ks, x16, x1, 0x2, 0x0000000094293fe5, 0xfffffffdffffffff, 0x0000000080000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x000000003fe59429), rs1=>rd:x17(0xfffffffbffffffff), rs2:x31(0x0000000040000000), imm:0x0
+ TEST_RI_OP(sm4ks, x17, x31, 0x0, 0x000000003fe59429, 0xfffffffbffffffff, 0x0000000040000000, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x0000000094293fe5), rs1=>rd:x18(0xfffffff7ffffffff), rs2:x30(0x0000000020000000), imm:0x2
+ TEST_RI_OP(sm4ks, x18, x30, 0x2, 0x0000000094293fe5, 0xfffffff7ffffffff, 0x0000000020000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x00000000e594293f), rs1=>rd:x19(0xffffffefffffffff), rs2:x29(0x0000000010000000), imm:0x1
+ TEST_RI_OP(sm4ks, x19, x29, 0x1, 0x00000000e594293f, 0xffffffefffffffff, 0x0000000010000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x00000000e93ffdf4), rs1=>rd:x20(0xffffffdfffffffff), rs2:x28(0x0000000008000000), imm:0x3
+ TEST_RI_OP(sm4ks, x20, x28, 0x3, 0x00000000e93ffdf4, 0xffffffdfffffffff, 0x0000000008000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x00000000337fe699), rs1=>rd:x21(0xffffffbfffffffff), rs2:x27(0x0000000004000000), imm:0x3
+ TEST_RI_OP(sm4ks, x21, x27, 0x3, 0x00000000337fe699, 0xffffffbfffffffff, 0x0000000004000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x000000003fe59429), rs1=>rd:x22(0xffffff7fffffffff), rs2:x26(0x0000000002000000), imm:0x0
+ TEST_RI_OP(sm4ks, x22, x26, 0x0, 0x000000003fe59429, 0xffffff7fffffffff, 0x0000000002000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x000000006fffedb7), rs1=>rd:x23(0xfffffeffffffffff), rs2:x25(0x0000000001000000), imm:0x3
+ TEST_RI_OP(sm4ks, x23, x25, 0x3, 0x000000006fffedb7, 0xfffffeffffffffff, 0x0000000001000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x00000000d6401a6b), rs1=>rd:x24(0xfffffdffffffffff), rs2:x24(0x0000000000800000), imm:0x3
+ TEST_RI_OP(sm4ks, x24, x24, 0x3, 0x00000000d6401a6b, 0xfffffdffffffffff, 0x0000000000800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x00000000293fe594), rs1=>rd:x25(0xfffffbffffffffff), rs2:x23(0x0000000000400000), imm:0x3
+ TEST_RI_OP(sm4ks, x25, x23, 0x3, 0x00000000293fe594, 0xfffffbffffffffff, 0x0000000000400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x00000000293fe594), rs1=>rd:x26(0xfffff7ffffffffff), rs2:x22(0x0000000000200000), imm:0x3
+ TEST_RI_OP(sm4ks, x26, x22, 0x3, 0x00000000293fe594, 0xfffff7ffffffffff, 0x0000000000200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x00000000293fe594), rs1=>rd:x27(0xffffefffffffffff), rs2:x21(0x0000000000100000), imm:0x3
+ TEST_RI_OP(sm4ks, x27, x21, 0x3, 0x00000000293fe594, 0xffffefffffffffff, 0x0000000000100000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x00000000e594293f), rs1=>rd:x28(0xffffdfffffffffff), rs2:x20(0x0000000000080000), imm:0x1
+ TEST_RI_OP(sm4ks, x28, x20, 0x1, 0x00000000e594293f, 0xffffdfffffffffff, 0x0000000000080000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x00000000e594293f), rs1=>rd:x29(0xffffbfffffffffff), rs2:x19(0x0000000000040000), imm:0x1
+ TEST_RI_OP(sm4ks, x29, x19, 0x1, 0x00000000e594293f, 0xffffbfffffffffff, 0x0000000000040000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x00000000293fe594), rs1=>rd:x30(0xffff7fffffffffff), rs2:x18(0x0000000000020000), imm:0x3
+ TEST_RI_OP(sm4ks, x30, x18, 0x3, 0x00000000293fe594, 0xffff7fffffffffff, 0x0000000000020000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x00000000e594293f), rs1=>rd:x31(0xfffeffffffffffff), rs2:x17(0x0000000000010000), imm:0x1
+ TEST_RI_OP(sm4ks, x31, x17, 0x1, 0x00000000e594293f, 0xfffeffffffffffff, 0x0000000000010000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x0000000094293fe5), rs1=>rd:x1(0xfffdffffffffffff), rs2:x16(0x0000000000008000), imm:0x2
+ TEST_RI_OP(sm4ks, x1, x16, 0x2, 0x0000000094293fe5, 0xfffdffffffffffff, 0x0000000000008000, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x000000003fe59429), rs1=>rd:x2(0xfffbffffffffffff), rs2:x15(0x0000000000004000), imm:0x0
+ TEST_RI_OP(sm4ks, x2, x15, 0x0, 0x000000003fe59429, 0xfffbffffffffffff, 0x0000000000004000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x0000000094293fe5), rs1=>rd:x3(0xfff7ffffffffffff), rs2:x14(0x0000000000002000), imm:0x2
+ TEST_RI_OP(sm4ks, x3, x14, 0x2, 0x0000000094293fe5, 0xfff7ffffffffffff, 0x0000000000002000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x000000007aead49f), rs1=>rd:x4(0xffefffffffffffff), rs2:x13(0x0000000000001000), imm:0x1
+ TEST_RI_OP(sm4ks, x4, x13, 0x1, 0x000000007aead49f, 0xffefffffffffffff, 0x0000000000001000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x00000000293fe594), rs1=>rd:x5(0xffdfffffffffffff), rs2:x12(0x0000000000000800), imm:0x3
+ TEST_RI_OP(sm4ks, x5, x12, 0x3, 0x00000000293fe594, 0xffdfffffffffffff, 0x0000000000000800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x00000000293fe594), rs1=>rd:x6(0xffbfffffffffffff), rs2:x11(0x0000000000000400), imm:0x3
+ TEST_RI_OP(sm4ks, x6, x11, 0x3, 0x00000000293fe594, 0xffbfffffffffffff, 0x0000000000000400, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x000000003fe59429), rs1=>rd:x7(0xff7fffffffffffff), rs2:x10(0x0000000000000200), imm:0x0
+ TEST_RI_OP(sm4ks, x7, x10, 0x0, 0x000000003fe59429, 0xff7fffffffffffff, 0x0000000000000200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x000000003fe59429), rs1=>rd:x8(0xfeffffffffffffff), rs2:x9(0x0000000000000100), imm:0x0
+ TEST_RI_OP(sm4ks, x8, x9, 0x0, 0x000000003fe59429, 0xfeffffffffffffff, 0x0000000000000100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x00000000bfe28a15), rs1=>rd:x9(0xfdffffffffffffff), rs2:x8(0x0000000000000080), imm:0x0
+ TEST_RI_OP(sm4ks, x9, x8, 0x0, 0x00000000bfe28a15, 0xfdffffffffffffff, 0x0000000000000080, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x000000001f77dcb8), rs1=>rd:x10(0xfbffffffffffffff), rs2:x7(0x0000000000000040), imm:0x0
+ TEST_RI_OP(sm4ks, x10, x7, 0x0, 0x000000001f77dcb8, 0xfbffffffffffffff, 0x0000000000000040, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x000000007fecb163), rs1=>rd:x11(0xf7ffffffffffffff), rs2:x6(0x0000000000000020), imm:0x0
+ TEST_RI_OP(sm4ks, x11, x6, 0x0, 0x000000007fecb163, 0xf7ffffffffffffff, 0x0000000000000020, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x000000009f7aead4), rs1=>rd:x12(0xefffffffffffffff), rs2:x5(0x0000000000000010), imm:0x0
+ TEST_RI_OP(sm4ks, x12, x5, 0x0, 0x000000009f7aead4, 0xefffffffffffffff, 0x0000000000000010, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x000000003ffdf4e9), rs1=>rd:x13(0xdfffffffffffffff), rs2:x4(0x0000000000000008), imm:0x0
+ TEST_RI_OP(sm4ks, x13, x4, 0x0, 0x000000003ffdf4e9, 0xdfffffffffffffff, 0x0000000000000008, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x000000007fe69933), rs1=>rd:x14(0xbfffffffffffffff), rs2:x3(0x0000000000000004), imm:0x0
+ TEST_RI_OP(sm4ks, x14, x3, 0x0, 0x000000007fe69933, 0xbfffffffffffffff, 0x0000000000000004, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x00000000df628b16), rs1=>rd:x15(0x7fffffffffffffff), rs2:x2(0x0000000000000002), imm:0x0
+ TEST_RI_OP(sm4ks, x15, x2, 0x0, 0x00000000df628b16, 0x7fffffffffffffff, 0x0000000000000002, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x00000000ffedb76f), rs1=>rd:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001), imm:0x0
+ TEST_RI_OP(sm4ks, x16, x1, 0x0, 0x00000000ffedb76f, 0xffffffffffffffff, 0x0000000000000001, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x00000000c01a6bd7), rs1=>rd:x17(0x0000000000000001), rs2:x31(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x17, x31, 0x0, 0x00000000c01a6bd7, 0x0000000000000001, 0x0000000000000000, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x00000000c01a6bd4), rs1=>rd:x18(0x0000000000000002), rs2:x30(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x18, x30, 0x0, 0x00000000c01a6bd4, 0x0000000000000002, 0x0000000000000000, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x00000000c01a6bd2), rs1=>rd:x19(0x0000000000000004), rs2:x29(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x19, x29, 0x0, 0x00000000c01a6bd2, 0x0000000000000004, 0x0000000000000000, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x00000000c01a6bde), rs1=>rd:x20(0x0000000000000008), rs2:x28(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x20, x28, 0x0, 0x00000000c01a6bde, 0x0000000000000008, 0x0000000000000000, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x00000000c01a6bc6), rs1=>rd:x21(0x0000000000000010), rs2:x27(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x21, x27, 0x0, 0x00000000c01a6bc6, 0x0000000000000010, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x00000000c01a6bf6), rs1=>rd:x22(0x0000000000000020), rs2:x26(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x22, x26, 0x0, 0x00000000c01a6bf6, 0x0000000000000020, 0x0000000000000000, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x00000000c01a6b96), rs1=>rd:x23(0x0000000000000040), rs2:x25(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x23, x25, 0x0, 0x00000000c01a6b96, 0x0000000000000040, 0x0000000000000000, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x00000000c01a6bd6), rs1=>rd:x24(0x0000000000000080), rs2:x24(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x24, x24, 0x0, 0x00000000c01a6bd6, 0x0000000000000080, 0x0000000000000000, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x00000000c01a6ad6), rs1=>rd:x25(0x0000000000000100), rs2:x23(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x25, x23, 0x0, 0x00000000c01a6ad6, 0x0000000000000100, 0x0000000000000000, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x00000000c01a69d6), rs1=>rd:x26(0x0000000000000200), rs2:x22(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x26, x22, 0x0, 0x00000000c01a69d6, 0x0000000000000200, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x00000000c01a6fd6), rs1=>rd:x27(0x0000000000000400), rs2:x21(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x27, x21, 0x0, 0x00000000c01a6fd6, 0x0000000000000400, 0x0000000000000000, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x00000000c01a63d6), rs1=>rd:x28(0x0000000000000800), rs2:x20(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x28, x20, 0x0, 0x00000000c01a63d6, 0x0000000000000800, 0x0000000000000000, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x00000000c01a7bd6), rs1=>rd:x29(0x0000000000001000), rs2:x19(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x29, x19, 0x0, 0x00000000c01a7bd6, 0x0000000000001000, 0x0000000000000000, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x00000000c01a4bd6), rs1=>rd:x30(0x0000000000002000), rs2:x18(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x30, x18, 0x0, 0x00000000c01a4bd6, 0x0000000000002000, 0x0000000000000000, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x00000000c01a2bd6), rs1=>rd:x31(0x0000000000004000), rs2:x17(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x31, x17, 0x0, 0x00000000c01a2bd6, 0x0000000000004000, 0x0000000000000000, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x00000000c01aebd6), rs1=>rd:x1(0x0000000000008000), rs2:x16(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x1, x16, 0x0, 0x00000000c01aebd6, 0x0000000000008000, 0x0000000000000000, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x00000000c01b6bd6), rs1=>rd:x2(0x0000000000010000), rs2:x15(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x2, x15, 0x0, 0x00000000c01b6bd6, 0x0000000000010000, 0x0000000000000000, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x00000000c0186bd6), rs1=>rd:x3(0x0000000000020000), rs2:x14(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x3, x14, 0x0, 0x00000000c0186bd6, 0x0000000000020000, 0x0000000000000000, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x00000000c01e6bd6), rs1=>rd:x4(0x0000000000040000), rs2:x13(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x4, x13, 0x0, 0x00000000c01e6bd6, 0x0000000000040000, 0x0000000000000000, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x00000000c0126bd6), rs1=>rd:x5(0x0000000000080000), rs2:x12(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0x00000000c0126bd6, 0x0000000000080000, 0x0000000000000000, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x00000000c00a6bd6), rs1=>rd:x6(0x0000000000100000), rs2:x11(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x6, x11, 0x0, 0x00000000c00a6bd6, 0x0000000000100000, 0x0000000000000000, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x00000000c03a6bd6), rs1=>rd:x7(0x0000000000200000), rs2:x10(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x7, x10, 0x0, 0x00000000c03a6bd6, 0x0000000000200000, 0x0000000000000000, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x00000000c05a6bd6), rs1=>rd:x8(0x0000000000400000), rs2:x9(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x8, x9, 0x0, 0x00000000c05a6bd6, 0x0000000000400000, 0x0000000000000000, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x00000000c09a6bd6), rs1=>rd:x9(0x0000000000800000), rs2:x8(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x9, x8, 0x0, 0x00000000c09a6bd6, 0x0000000000800000, 0x0000000000000000, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x00000000c11a6bd6), rs1=>rd:x10(0x0000000001000000), rs2:x7(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x10, x7, 0x0, 0x00000000c11a6bd6, 0x0000000001000000, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x00000000c21a6bd6), rs1=>rd:x11(0x0000000002000000), rs2:x6(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x11, x6, 0x0, 0x00000000c21a6bd6, 0x0000000002000000, 0x0000000000000000, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x00000000c41a6bd6), rs1=>rd:x12(0x0000000004000000), rs2:x5(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x12, x5, 0x0, 0x00000000c41a6bd6, 0x0000000004000000, 0x0000000000000000, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x00000000c81a6bd6), rs1=>rd:x13(0x0000000008000000), rs2:x4(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x13, x4, 0x0, 0x00000000c81a6bd6, 0x0000000008000000, 0x0000000000000000, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x00000000d01a6bd6), rs1=>rd:x14(0x0000000010000000), rs2:x3(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x14, x3, 0x0, 0x00000000d01a6bd6, 0x0000000010000000, 0x0000000000000000, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x00000000e01a6bd6), rs1=>rd:x15(0x0000000020000000), rs2:x2(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x15, x2, 0x0, 0x00000000e01a6bd6, 0x0000000020000000, 0x0000000000000000, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x00000000801a6bd6), rs1=>rd:x16(0x0000000040000000), rs2:x1(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x16, x1, 0x0, 0x00000000801a6bd6, 0x0000000040000000, 0x0000000000000000, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x00000000401a6bd6), rs1=>rd:x17(0x0000000080000000), rs2:x31(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x17, x31, 0x0, 0x00000000401a6bd6, 0x0000000080000000, 0x0000000000000000, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x00000000c01a6bd6), rs1=>rd:x18(0x0000000100000000), rs2:x30(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x18, x30, 0x0, 0x00000000c01a6bd6, 0x0000000100000000, 0x0000000000000000, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x00000000c01a6bd6), rs1=>rd:x19(0x0000000200000000), rs2:x29(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x19, x29, 0x0, 0x00000000c01a6bd6, 0x0000000200000000, 0x0000000000000000, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x00000000c01a6bd6), rs1=>rd:x20(0x0000000400000000), rs2:x28(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x20, x28, 0x0, 0x00000000c01a6bd6, 0x0000000400000000, 0x0000000000000000, x2, 32, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x00000000c01a6bd6), rs1=>rd:x21(0x0000000800000000), rs2:x27(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x21, x27, 0x0, 0x00000000c01a6bd6, 0x0000000800000000, 0x0000000000000000, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x00000000c01a6bd6), rs1=>rd:x22(0x0000001000000000), rs2:x26(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x22, x26, 0x0, 0x00000000c01a6bd6, 0x0000001000000000, 0x0000000000000000, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x00000000c01a6bd6), rs1=>rd:x23(0x0000002000000000), rs2:x25(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x23, x25, 0x0, 0x00000000c01a6bd6, 0x0000002000000000, 0x0000000000000000, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x00000000c01a6bd6), rs1=>rd:x24(0x0000004000000000), rs2:x24(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x24, x24, 0x0, 0x00000000c01a6bd6, 0x0000004000000000, 0x0000000000000000, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x00000000c01a6bd6), rs1=>rd:x25(0x0000008000000000), rs2:x23(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x25, x23, 0x0, 0x00000000c01a6bd6, 0x0000008000000000, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x00000000c01a6bd6), rs1=>rd:x26(0x0000010000000000), rs2:x22(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x26, x22, 0x0, 0x00000000c01a6bd6, 0x0000010000000000, 0x0000000000000000, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x00000000c01a6bd6), rs1=>rd:x27(0x0000020000000000), rs2:x21(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x27, x21, 0x0, 0x00000000c01a6bd6, 0x0000020000000000, 0x0000000000000000, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x00000000c01a6bd6), rs1=>rd:x28(0x0000040000000000), rs2:x20(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x28, x20, 0x0, 0x00000000c01a6bd6, 0x0000040000000000, 0x0000000000000000, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x00000000c01a6bd6), rs1=>rd:x29(0x0000080000000000), rs2:x19(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x29, x19, 0x0, 0x00000000c01a6bd6, 0x0000080000000000, 0x0000000000000000, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x00000000c01a6bd6), rs1=>rd:x30(0x0000100000000000), rs2:x18(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x30, x18, 0x0, 0x00000000c01a6bd6, 0x0000100000000000, 0x0000000000000000, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x00000000c01a6bd6), rs1=>rd:x31(0x0000200000000000), rs2:x17(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x31, x17, 0x0, 0x00000000c01a6bd6, 0x0000200000000000, 0x0000000000000000, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x00000000c01a6bd6), rs1=>rd:x1(0x0000400000000000), rs2:x16(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x1, x16, 0x0, 0x00000000c01a6bd6, 0x0000400000000000, 0x0000000000000000, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x00000000c01a6bd6), rs1=>rd:x2(0x0000800000000000), rs2:x15(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x2, x15, 0x0, 0x00000000c01a6bd6, 0x0000800000000000, 0x0000000000000000, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x00000000c01a6bd6), rs1=>rd:x3(0x0001000000000000), rs2:x14(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x3, x14, 0x0, 0x00000000c01a6bd6, 0x0001000000000000, 0x0000000000000000, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x00000000c01a6bd6), rs1=>rd:x4(0x0002000000000000), rs2:x13(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x4, x13, 0x0, 0x00000000c01a6bd6, 0x0002000000000000, 0x0000000000000000, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x00000000c01a6bd6), rs1=>rd:x5(0x0004000000000000), rs2:x12(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0x00000000c01a6bd6, 0x0004000000000000, 0x0000000000000000, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x00000000c01a6bd6), rs1=>rd:x6(0x0008000000000000), rs2:x11(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x6, x11, 0x0, 0x00000000c01a6bd6, 0x0008000000000000, 0x0000000000000000, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x00000000c01a6bd6), rs1=>rd:x7(0x0010000000000000), rs2:x10(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x7, x10, 0x0, 0x00000000c01a6bd6, 0x0010000000000000, 0x0000000000000000, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x00000000c01a6bd6), rs1=>rd:x8(0x0020000000000000), rs2:x9(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x8, x9, 0x0, 0x00000000c01a6bd6, 0x0020000000000000, 0x0000000000000000, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x00000000c01a6bd6), rs1=>rd:x9(0x0040000000000000), rs2:x8(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x9, x8, 0x0, 0x00000000c01a6bd6, 0x0040000000000000, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x00000000c01a6bd6), rs1=>rd:x10(0x0080000000000000), rs2:x7(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x10, x7, 0x0, 0x00000000c01a6bd6, 0x0080000000000000, 0x0000000000000000, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x00000000c01a6bd6), rs1=>rd:x11(0x0100000000000000), rs2:x6(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x11, x6, 0x0, 0x00000000c01a6bd6, 0x0100000000000000, 0x0000000000000000, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x00000000c01a6bd6), rs1=>rd:x12(0x0200000000000000), rs2:x5(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x12, x5, 0x0, 0x00000000c01a6bd6, 0x0200000000000000, 0x0000000000000000, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x00000000c01a6bd6), rs1=>rd:x13(0x0400000000000000), rs2:x4(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x13, x4, 0x0, 0x00000000c01a6bd6, 0x0400000000000000, 0x0000000000000000, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x00000000c01a6bd6), rs1=>rd:x14(0x0800000000000000), rs2:x3(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x14, x3, 0x0, 0x00000000c01a6bd6, 0x0800000000000000, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x00000000c01a6bd6), rs1=>rd:x15(0x1000000000000000), rs2:x2(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x15, x2, 0x0, 0x00000000c01a6bd6, 0x1000000000000000, 0x0000000000000000, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x00000000c01a6bd6), rs1=>rd:x16(0x2000000000000000), rs2:x1(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x16, x1, 0x0, 0x00000000c01a6bd6, 0x2000000000000000, 0x0000000000000000, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x00000000c01a6bd6), rs1=>rd:x17(0x4000000000000000), rs2:x31(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x17, x31, 0x0, 0x00000000c01a6bd6, 0x4000000000000000, 0x0000000000000000, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x00000000c01a6bd6), rs1=>rd:x18(0x8000000000000000), rs2:x30(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x18, x30, 0x0, 0x00000000c01a6bd6, 0x8000000000000000, 0x0000000000000000, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x00000000c01a6bd6), rs1=>rd:x19(0x0000000000000000), rs2:x29(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x19, x29, 0x0, 0x00000000c01a6bd6, 0x0000000000000000, 0x0000000000000000, x3, 32, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x000000003fe59428), rs1=>rd:x20(0xfffffffffffffffe), rs2:x28(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x20, x28, 0x0, 0x000000003fe59428, 0xfffffffffffffffe, 0x0000000000000000, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x000000003fe5942b), rs1=>rd:x21(0xfffffffffffffffd), rs2:x27(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x21, x27, 0x0, 0x000000003fe5942b, 0xfffffffffffffffd, 0x0000000000000000, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x000000003fe5942d), rs1=>rd:x22(0xfffffffffffffffb), rs2:x26(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x22, x26, 0x0, 0x000000003fe5942d, 0xfffffffffffffffb, 0x0000000000000000, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x000000003fe59421), rs1=>rd:x23(0xfffffffffffffff7), rs2:x25(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x23, x25, 0x0, 0x000000003fe59421, 0xfffffffffffffff7, 0x0000000000000000, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x00000000c01a6bd6), rs1=>rd:x24(0xffffffffffffffef), rs2:x24(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x24, x24, 0x0, 0x00000000c01a6bd6, 0xffffffffffffffef, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x000000003fe59409), rs1=>rd:x25(0xffffffffffffffdf), rs2:x23(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x25, x23, 0x0, 0x000000003fe59409, 0xffffffffffffffdf, 0x0000000000000000, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x000000003fe59469), rs1=>rd:x26(0xffffffffffffffbf), rs2:x22(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x26, x22, 0x0, 0x000000003fe59469, 0xffffffffffffffbf, 0x0000000000000000, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x000000003fe594a9), rs1=>rd:x27(0xffffffffffffff7f), rs2:x21(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x27, x21, 0x0, 0x000000003fe594a9, 0xffffffffffffff7f, 0x0000000000000000, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x000000003fe59529), rs1=>rd:x28(0xfffffffffffffeff), rs2:x20(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x28, x20, 0x0, 0x000000003fe59529, 0xfffffffffffffeff, 0x0000000000000000, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x000000003fe59629), rs1=>rd:x29(0xfffffffffffffdff), rs2:x19(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x29, x19, 0x0, 0x000000003fe59629, 0xfffffffffffffdff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x000000003fe59029), rs1=>rd:x30(0xfffffffffffffbff), rs2:x18(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x30, x18, 0x0, 0x000000003fe59029, 0xfffffffffffffbff, 0x0000000000000000, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x000000003fe59c29), rs1=>rd:x31(0xfffffffffffff7ff), rs2:x17(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x31, x17, 0x0, 0x000000003fe59c29, 0xfffffffffffff7ff, 0x0000000000000000, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x000000003fe58429), rs1=>rd:x1(0xffffffffffffefff), rs2:x16(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x1, x16, 0x0, 0x000000003fe58429, 0xffffffffffffefff, 0x0000000000000000, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x000000003fe5b429), rs1=>rd:x2(0xffffffffffffdfff), rs2:x15(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x2, x15, 0x0, 0x000000003fe5b429, 0xffffffffffffdfff, 0x0000000000000000, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x000000003fe5d429), rs1=>rd:x3(0xffffffffffffbfff), rs2:x14(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x3, x14, 0x0, 0x000000003fe5d429, 0xffffffffffffbfff, 0x0000000000000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x000000003fe51429), rs1=>rd:x4(0xffffffffffff7fff), rs2:x13(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x4, x13, 0x0, 0x000000003fe51429, 0xffffffffffff7fff, 0x0000000000000000, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x000000003fe49429), rs1=>rd:x5(0xfffffffffffeffff), rs2:x12(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0x000000003fe49429, 0xfffffffffffeffff, 0x0000000000000000, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x000000003fe79429), rs1=>rd:x6(0xfffffffffffdffff), rs2:x11(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x6, x11, 0x0, 0x000000003fe79429, 0xfffffffffffdffff, 0x0000000000000000, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x000000003fe19429), rs1=>rd:x7(0xfffffffffffbffff), rs2:x10(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x7, x10, 0x0, 0x000000003fe19429, 0xfffffffffffbffff, 0x0000000000000000, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x000000003fed9429), rs1=>rd:x8(0xfffffffffff7ffff), rs2:x9(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x8, x9, 0x0, 0x000000003fed9429, 0xfffffffffff7ffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x000000003ff59429), rs1=>rd:x9(0xffffffffffefffff), rs2:x8(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x9, x8, 0x0, 0x000000003ff59429, 0xffffffffffefffff, 0x0000000000000000, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x000000003fc59429), rs1=>rd:x10(0xffffffffffdfffff), rs2:x7(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x10, x7, 0x0, 0x000000003fc59429, 0xffffffffffdfffff, 0x0000000000000000, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x000000003fa59429), rs1=>rd:x11(0xffffffffffbfffff), rs2:x6(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x11, x6, 0x0, 0x000000003fa59429, 0xffffffffffbfffff, 0x0000000000000000, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x000000003f659429), rs1=>rd:x12(0xffffffffff7fffff), rs2:x5(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x12, x5, 0x0, 0x000000003f659429, 0xffffffffff7fffff, 0x0000000000000000, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x000000003ee59429), rs1=>rd:x13(0xfffffffffeffffff), rs2:x4(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x13, x4, 0x0, 0x000000003ee59429, 0xfffffffffeffffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x000000003de59429), rs1=>rd:x14(0xfffffffffdffffff), rs2:x3(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x14, x3, 0x0, 0x000000003de59429, 0xfffffffffdffffff, 0x0000000000000000, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x000000003be59429), rs1=>rd:x15(0xfffffffffbffffff), rs2:x2(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x15, x2, 0x0, 0x000000003be59429, 0xfffffffffbffffff, 0x0000000000000000, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x0000000037e59429), rs1=>rd:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x16, x1, 0x0, 0x0000000037e59429, 0xfffffffff7ffffff, 0x0000000000000000, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x000000002fe59429), rs1=>rd:x17(0xffffffffefffffff), rs2:x31(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x17, x31, 0x0, 0x000000002fe59429, 0xffffffffefffffff, 0x0000000000000000, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x000000001fe59429), rs1=>rd:x18(0xffffffffdfffffff), rs2:x30(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x18, x30, 0x0, 0x000000001fe59429, 0xffffffffdfffffff, 0x0000000000000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x000000007fe59429), rs1=>rd:x19(0xffffffffbfffffff), rs2:x29(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x19, x29, 0x0, 0x000000007fe59429, 0xffffffffbfffffff, 0x0000000000000000, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x00000000bfe59429), rs1=>rd:x20(0xffffffff7fffffff), rs2:x28(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x20, x28, 0x0, 0x00000000bfe59429, 0xffffffff7fffffff, 0x0000000000000000, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x000000003fe59429), rs1=>rd:x21(0xfffffffeffffffff), rs2:x27(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x21, x27, 0x0, 0x000000003fe59429, 0xfffffffeffffffff, 0x0000000000000000, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x000000003fe59429), rs1=>rd:x22(0xfffffffdffffffff), rs2:x26(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x22, x26, 0x0, 0x000000003fe59429, 0xfffffffdffffffff, 0x0000000000000000, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x000000003fe59429), rs1=>rd:x23(0xfffffffbffffffff), rs2:x25(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x23, x25, 0x0, 0x000000003fe59429, 0xfffffffbffffffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x00000000c01a6bd6), rs1=>rd:x24(0xfffffff7ffffffff), rs2:x24(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x24, x24, 0x0, 0x00000000c01a6bd6, 0xfffffff7ffffffff, 0x0000000000000000, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x000000003fe59429), rs1=>rd:x25(0xffffffefffffffff), rs2:x23(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x25, x23, 0x0, 0x000000003fe59429, 0xffffffefffffffff, 0x0000000000000000, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x000000003fe59429), rs1=>rd:x26(0xffffffdfffffffff), rs2:x22(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x26, x22, 0x0, 0x000000003fe59429, 0xffffffdfffffffff, 0x0000000000000000, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x000000003fe59429), rs1=>rd:x27(0xffffffbfffffffff), rs2:x21(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x27, x21, 0x0, 0x000000003fe59429, 0xffffffbfffffffff, 0x0000000000000000, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x000000003fe59429), rs1=>rd:x28(0xffffff7fffffffff), rs2:x20(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x28, x20, 0x0, 0x000000003fe59429, 0xffffff7fffffffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x000000003fe59429), rs1=>rd:x29(0xfffffeffffffffff), rs2:x19(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x29, x19, 0x0, 0x000000003fe59429, 0xfffffeffffffffff, 0x0000000000000000, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x000000003fe59429), rs1=>rd:x30(0xfffffdffffffffff), rs2:x18(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x30, x18, 0x0, 0x000000003fe59429, 0xfffffdffffffffff, 0x0000000000000000, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x000000003fe59429), rs1=>rd:x31(0xfffffbffffffffff), rs2:x17(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x31, x17, 0x0, 0x000000003fe59429, 0xfffffbffffffffff, 0x0000000000000000, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x000000003fe59429), rs1=>rd:x1(0xfffff7ffffffffff), rs2:x16(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x1, x16, 0x0, 0x000000003fe59429, 0xfffff7ffffffffff, 0x0000000000000000, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x000000003fe59429), rs1=>rd:x2(0xffffefffffffffff), rs2:x15(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x2, x15, 0x0, 0x000000003fe59429, 0xffffefffffffffff, 0x0000000000000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x000000003fe59429), rs1=>rd:x3(0xffffdfffffffffff), rs2:x14(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x3, x14, 0x0, 0x000000003fe59429, 0xffffdfffffffffff, 0x0000000000000000, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x000000003fe59429), rs1=>rd:x4(0xffffbfffffffffff), rs2:x13(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x4, x13, 0x0, 0x000000003fe59429, 0xffffbfffffffffff, 0x0000000000000000, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x000000003fe59429), rs1=>rd:x5(0xffff7fffffffffff), rs2:x12(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0x000000003fe59429, 0xffff7fffffffffff, 0x0000000000000000, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x000000003fe59429), rs1=>rd:x6(0xfffeffffffffffff), rs2:x11(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x6, x11, 0x0, 0x000000003fe59429, 0xfffeffffffffffff, 0x0000000000000000, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x000000003fe59429), rs1=>rd:x7(0xfffdffffffffffff), rs2:x10(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x7, x10, 0x0, 0x000000003fe59429, 0xfffdffffffffffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x000000003fe59429), rs1=>rd:x8(0xfffbffffffffffff), rs2:x9(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x8, x9, 0x0, 0x000000003fe59429, 0xfffbffffffffffff, 0x0000000000000000, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x000000003fe59429), rs1=>rd:x9(0xfff7ffffffffffff), rs2:x8(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x9, x8, 0x0, 0x000000003fe59429, 0xfff7ffffffffffff, 0x0000000000000000, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x000000003fe59429), rs1=>rd:x10(0xffefffffffffffff), rs2:x7(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x10, x7, 0x0, 0x000000003fe59429, 0xffefffffffffffff, 0x0000000000000000, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x000000003fe59429), rs1=>rd:x11(0xffdfffffffffffff), rs2:x6(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x11, x6, 0x0, 0x000000003fe59429, 0xffdfffffffffffff, 0x0000000000000000, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x000000003fe59429), rs1=>rd:x12(0xffbfffffffffffff), rs2:x5(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x12, x5, 0x0, 0x000000003fe59429, 0xffbfffffffffffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x00000000293fe594), rs1=>rd:x13(0xff7fffffffffffff), rs2:x4(0x0000000000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x13, x4, 0x3, 0x00000000293fe594, 0xff7fffffffffffff, 0x0000000000000000, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x00000000293fe594), rs1=>rd:x14(0xfeffffffffffffff), rs2:x3(0x0000000000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x14, x3, 0x3, 0x00000000293fe594, 0xfeffffffffffffff, 0x0000000000000000, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x00000000293fe594), rs1=>rd:x15(0xfdffffffffffffff), rs2:x2(0x0000000000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x15, x2, 0x3, 0x00000000293fe594, 0xfdffffffffffffff, 0x0000000000000000, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x00000000293fe594), rs1=>rd:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x16, x1, 0x3, 0x00000000293fe594, 0xfbffffffffffffff, 0x0000000000000000, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x00000000e594293f), rs1=>rd:x17(0xf7ffffffffffffff), rs2:x31(0x0000000000000000), imm:0x1
+ TEST_RI_OP(sm4ks, x17, x31, 0x1, 0x00000000e594293f, 0xf7ffffffffffffff, 0x0000000000000000, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x00000000e594293f), rs1=>rd:x18(0xefffffffffffffff), rs2:x30(0x0000000000000000), imm:0x1
+ TEST_RI_OP(sm4ks, x18, x30, 0x1, 0x00000000e594293f, 0xefffffffffffffff, 0x0000000000000000, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x00000000293fe594), rs1=>rd:x19(0xdfffffffffffffff), rs2:x29(0x0000000000000000), imm:0x3
+ TEST_RI_OP(sm4ks, x19, x29, 0x3, 0x00000000293fe594, 0xdfffffffffffffff, 0x0000000000000000, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x00000000e594293f), rs1=>rd:x20(0xbfffffffffffffff), rs2:x28(0x0000000000000000), imm:0x1
+ TEST_RI_OP(sm4ks, x20, x28, 0x1, 0x00000000e594293f, 0xbfffffffffffffff, 0x0000000000000000, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x0000000094293fe5), rs1=>rd:x21(0x7fffffffffffffff), rs2:x27(0x0000000000000000), imm:0x2
+ TEST_RI_OP(sm4ks, x21, x27, 0x2, 0x0000000094293fe5, 0x7fffffffffffffff, 0x0000000000000000, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x000000003fe59429), rs1=>rd:x22(0xffffffffffffffff), rs2:x26(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x22, x26, 0x0, 0x000000003fe59429, 0xffffffffffffffff, 0x0000000000000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with random values
+ // result rd:x23(0x00000000becc9191), rs1=>rd:x23(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23), imm:0x2
+ TEST_RI_OP(sm4ks, x23, x25, 0x2, 0x00000000becc9191, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1=>rd:x0(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b), imm:0x1
+ TEST_RI_OP(sm4ks, x0, x24, 0x1, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x000000007e21b2d0), rs1=>rd:x25(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0), imm:0x3
+ TEST_RI_OP(sm4ks, x25, x0, 0x3, 0x000000007e21b2d0, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with random values
+ // result rd:x26(0x0000000021e912ff), rs1=>rd:x26(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3), imm:0x3
+ TEST_RI_OP(sm4ks, x26, x22, 0x3, 0x0000000021e912ff, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/SM4KS-02.S b/riscof/suite/rv64i_m/K_unratified/SM4KS-02.S
new file mode 100644
index 0000000000000000000000000000000000000000..e4f496e9f11a6113ade32dc40267ffc060b56e48
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/SM4KS-02.S
@@ -0,0 +1,1779 @@
+// RISC-V Architectural Validation Test SM4KS-02
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'sm4ks'.
+// Using dataset: sbox32
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",sm4ks)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with dataset: sbox32
+ // result rd:x1(0x000000006df03a43), rs1=>rd:x1(0x10fd3dedadea5195), rs2:x16(0x0000000000000000), imm:0x0
+ TEST_RI_OP(sm4ks, x1, x16, 0x0, 0x000000006df03a43, 0x10fd3dedadea5195, 0x0000000000000000, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with dataset: sbox32
+ // result rd:x2(0x00000000c0b72ec1), rs1=>rd:x2(0xbd295ce2d2ffbec1), rs2:x15(0x0000000000000100), imm:0x1
+ TEST_RI_OP(sm4ks, x2, x15, 0x1, 0x00000000c0b72ec1, 0xbd295ce2d2ffbec1, 0x0000000000000100, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with dataset: sbox32
+ // result rd:x3(0x00000000dc088826), rs1=>rd:x3(0xc9649f05a8e1a8bb), rs2:x14(0x0000000000020000), imm:0x2
+ TEST_RI_OP(sm4ks, x3, x14, 0x2, 0x00000000dc088826, 0xc9649f05a8e1a8bb, 0x0000000000020000, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with dataset: sbox32
+ // result rd:x4(0x00000000b60980b4), rs1=>rd:x4(0x3541291848c99fcb), rs2:x13(0x0000000003000000), imm:0x3
+ TEST_RI_OP(sm4ks, x4, x13, 0x3, 0x00000000b60980b4, 0x3541291848c99fcb, 0x0000000003000000, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with dataset: sbox32
+ // result rd:x5(0x00000000c6043483), rs1=>rd:x5(0x10a24740461d524f), rs2:x12(0x0000000000000004), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0x00000000c6043483, 0x10a24740461d524f, 0x0000000000000004, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with dataset: sbox32
+ // result rd:x6(0x00000000cefaf18f), rs1=>rd:x6(0x546b0e54528a10af), rs2:x11(0x0000000000000500), imm:0x1
+ TEST_RI_OP(sm4ks, x6, x11, 0x1, 0x00000000cefaf18f, 0x546b0e54528a10af, 0x0000000000000500, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with dataset: sbox32
+ // result rd:x7(0x00000000ffa65b44), rs1=>rd:x7(0x73a92fd4e19bfbc3), rs2:x10(0x0000000000060000), imm:0x2
+ TEST_RI_OP(sm4ks, x7, x10, 0x2, 0x00000000ffa65b44, 0x73a92fd4e19bfbc3, 0x0000000000060000, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with dataset: sbox32
+ // result rd:x8(0x00000000c79a649b), rs1=>rd:x8(0x82f6747f707af2c0), rs2:x9(0x0000000007000000), imm:0x3
+ TEST_RI_OP(sm4ks, x8, x9, 0x3, 0x00000000c79a649b, 0x82f6747f707af2c0, 0x0000000007000000, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with dataset: sbox32
+ // result rd:x9(0x00000000647f1b4d), rs1=>rd:x9(0xf5adb41aa47d105b), rs2:x8(0x0000000000000008), imm:0x0
+ TEST_RI_OP(sm4ks, x9, x8, 0x0, 0x00000000647f1b4d, 0xf5adb41aa47d105b, 0x0000000000000008, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with dataset: sbox32
+ // result rd:x10(0x0000000004407ae3), rs1=>rd:x10(0xdf7f3844121bcc23), rs2:x7(0x0000000000000900), imm:0x1
+ TEST_RI_OP(sm4ks, x10, x7, 0x1, 0x0000000004407ae3, 0xdf7f3844121bcc23, 0x0000000000000900, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with dataset: sbox32
+ // result rd:x11(0x00000000a7fed197), rs1=>rd:x11(0x10fd3dedadea5195), rs2:x6(0x00000000000a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x11, x6, 0x2, 0x00000000a7fed197, 0x10fd3dedadea5195, 0x00000000000a0000, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with dataset: sbox32
+ // result rd:x12(0x0000000010bfa6a0), rs1=>rd:x12(0xbd295ce2d2ffbec1), rs2:x5(0x000000000b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x12, x5, 0x3, 0x0000000010bfa6a0, 0xbd295ce2d2ffbec1, 0x000000000b000000, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with dataset: sbox32
+ // result rd:x13(0x00000000a8e4bc93), rs1=>rd:x13(0xc9649f05a8e1a8bb), rs2:x4(0x000000000000000c), imm:0x0
+ TEST_RI_OP(sm4ks, x13, x4, 0x0, 0x00000000a8e4bc93, 0xc9649f05a8e1a8bb, 0x000000000000000c, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with dataset: sbox32
+ // result rd:x14(0x00000000d7b464ab), rs1=>rd:x14(0x3541291848c99fcb), rs2:x3(0x0000000000000d00), imm:0x1
+ TEST_RI_OP(sm4ks, x14, x3, 0x1, 0x00000000d7b464ab, 0x3541291848c99fcb, 0x0000000000000d00, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with dataset: sbox32
+ // result rd:x15(0x000000005031d24a), rs1=>rd:x15(0x10a24740461d524f), rs2:x2(0x00000000000e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x15, x2, 0x2, 0x000000005031d24a, 0x10a24740461d524f, 0x00000000000e0000, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with dataset: sbox32
+ // result rd:x16(0x00000000572a90ad), rs1=>rd:x16(0x546b0e54528a10af), rs2:x1(0x000000000f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x16, x1, 0x3, 0x00000000572a90ad, 0x546b0e54528a10af, 0x000000000f000000, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with dataset: sbox32
+ // result rd:x17(0x00000000811eeee8), rs1=>rd:x17(0x73a92fd4e19bfbc3), rs2:x31(0x0000000000000010), imm:0x0
+ TEST_RI_OP(sm4ks, x17, x31, 0x0, 0x00000000811eeee8, 0x73a92fd4e19bfbc3, 0x0000000000000010, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with dataset: sbox32
+ // result rd:x18(0x00000000fc499520), rs1=>rd:x18(0x82f6747f707af2c0), rs2:x30(0x0000000000001100), imm:0x1
+ TEST_RI_OP(sm4ks, x18, x30, 0x1, 0x00000000fc499520, 0x82f6747f707af2c0, 0x0000000000001100, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with dataset: sbox32
+ // result rd:x19(0x00000000e9e75048), rs1=>rd:x19(0xf5adb41aa47d105b), rs2:x29(0x0000000000120000), imm:0x2
+ TEST_RI_OP(sm4ks, x19, x29, 0x2, 0x00000000e9e75048, 0xf5adb41aa47d105b, 0x0000000000120000, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with dataset: sbox32
+ // result rd:x20(0x0000000064dbc218), rs1=>rd:x20(0xdf7f3844121bcc23), rs2:x28(0x0000000013000000), imm:0x3
+ TEST_RI_OP(sm4ks, x20, x28, 0x3, 0x0000000064dbc218, 0xdf7f3844121bcc23, 0x0000000013000000, x2, 32, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with dataset: sbox32
+ // result rd:x21(0x00000000edef44bf), rs1=>rd:x21(0x10fd3dedadea5195), rs2:x27(0x0000000000000014), imm:0x0
+ TEST_RI_OP(sm4ks, x21, x27, 0x0, 0x00000000edef44bf, 0x10fd3dedadea5195, 0x0000000000000014, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with dataset: sbox32
+ // result rd:x22(0x00000000c5a00001), rs1=>rd:x22(0xbd295ce2d2ffbec1), rs2:x26(0x0000000000001500), imm:0x1
+ TEST_RI_OP(sm4ks, x22, x26, 0x1, 0x00000000c5a00001, 0xbd295ce2d2ffbec1, 0x0000000000001500, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with dataset: sbox32
+ // result rd:x23(0x00000000aae528bb), rs1=>rd:x23(0xc9649f05a8e1a8bb), rs2:x25(0x0000000000160000), imm:0x2
+ TEST_RI_OP(sm4ks, x23, x25, 0x2, 0x00000000aae528bb, 0xc9649f05a8e1a8bb, 0x0000000000160000, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with dataset: sbox32
+ // result rd:x24(0x00000000d4609861), rs1=>rd:x24(0x3541291848c99fcb), rs2:x24(0x0000000017000000), imm:0x3
+ TEST_RI_OP(sm4ks, x24, x24, 0x3, 0x00000000d4609861, 0x3541291848c99fcb, 0x0000000017000000, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with dataset: sbox32
+ // result rd:x25(0x00000000060807e5), rs1=>rd:x25(0x10a24740461d524f), rs2:x23(0x0000000000000018), imm:0x0
+ TEST_RI_OP(sm4ks, x25, x23, 0x0, 0x00000000060807e5, 0x10a24740461d524f, 0x0000000000000018, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with dataset: sbox32
+ // result rd:x26(0x000000005aa8542f), rs1=>rd:x26(0x546b0e54528a10af), rs2:x22(0x0000000000001900), imm:0x1
+ TEST_RI_OP(sm4ks, x26, x22, 0x1, 0x000000005aa8542f, 0x546b0e54528a10af, 0x0000000000001900, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with dataset: sbox32
+ // result rd:x27(0x00000000e8889b41), rs1=>rd:x27(0x73a92fd4e19bfbc3), rs2:x21(0x00000000001a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x27, x21, 0x2, 0x00000000e8889b41, 0x73a92fd4e19bfbc3, 0x00000000001a0000, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with dataset: sbox32
+ // result rd:x28(0x0000000056baf6d3), rs1=>rd:x28(0x82f6747f707af2c0), rs2:x20(0x000000001b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x28, x20, 0x3, 0x0000000056baf6d3, 0x82f6747f707af2c0, 0x000000001b000000, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with dataset: sbox32
+ // result rd:x29(0x0000000084f43412), rs1=>rd:x29(0xf5adb41aa47d105b), rs2:x19(0x000000000000001c), imm:0x0
+ TEST_RI_OP(sm4ks, x29, x19, 0x0, 0x0000000084f43412, 0xf5adb41aa47d105b, 0x000000000000001c, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with dataset: sbox32
+ // result rd:x30(0x0000000002584ae3), rs1=>rd:x30(0xdf7f3844121bcc23), rs2:x18(0x0000000000001d00), imm:0x1
+ TEST_RI_OP(sm4ks, x30, x18, 0x1, 0x0000000002584ae3, 0xdf7f3844121bcc23, 0x0000000000001d00, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with dataset: sbox32
+ // result rd:x31(0x00000000aeec9195), rs1=>rd:x31(0x10fd3dedadea5195), rs2:x17(0x00000000001e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x31, x17, 0x2, 0x00000000aeec9195, 0x10fd3dedadea5195, 0x00000000001e0000, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with dataset: sbox32
+ // result rd:x1(0x000000004bdf2d8d), rs1=>rd:x1(0xbd295ce2d2ffbec1), rs2:x16(0x000000001f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x1, x16, 0x3, 0x000000004bdf2d8d, 0xbd295ce2d2ffbec1, 0x000000001f000000, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with dataset: sbox32
+ // result rd:x2(0x0000000028f2e627), rs1=>rd:x2(0xc9649f05a8e1a8bb), rs2:x15(0x0000000000000020), imm:0x0
+ TEST_RI_OP(sm4ks, x2, x15, 0x0, 0x0000000028f2e627, 0xc9649f05a8e1a8bb, 0x0000000000000020, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with dataset: sbox32
+ // result rd:x3(0x0000000040e8dd8b), rs1=>rd:x3(0x3541291848c99fcb), rs2:x14(0x0000000000002100), imm:0x1
+ TEST_RI_OP(sm4ks, x3, x14, 0x1, 0x0000000040e8dd8b, 0x3541291848c99fcb, 0x0000000000002100, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with dataset: sbox32
+ // result rd:x4(0x000000006e4d5245), rs1=>rd:x4(0x10a24740461d524f), rs2:x13(0x0000000000220000), imm:0x2
+ TEST_RI_OP(sm4ks, x4, x13, 0x2, 0x000000006e4d5245, 0x10a24740461d524f, 0x0000000000220000, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with dataset: sbox32
+ // result rd:x5(0x00000000a60a0ed5), rs1=>rd:x5(0x546b0e54528a10af), rs2:x12(0x0000000023000000), imm:0x3
+ TEST_RI_OP(sm4ks, x5, x12, 0x3, 0x00000000a60a0ed5, 0x546b0e54528a10af, 0x0000000023000000, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with dataset: sbox32
+ // result rd:x6(0x00000000c109b352), rs1=>rd:x6(0x73a92fd4e19bfbc3), rs2:x11(0x0000000000000024), imm:0x0
+ TEST_RI_OP(sm4ks, x6, x11, 0x0, 0x00000000c109b352, 0x73a92fd4e19bfbc3, 0x0000000000000024, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with dataset: sbox32
+ // result rd:x7(0x00000000ed0d1d20), rs1=>rd:x7(0x82f6747f707af2c0), rs2:x10(0x0000000000002500), imm:0x1
+ TEST_RI_OP(sm4ks, x7, x10, 0x1, 0x00000000ed0d1d20, 0x82f6747f707af2c0, 0x0000000000002500, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with dataset: sbox32
+ // result rd:x8(0x00000000e8e51048), rs1=>rd:x8(0xf5adb41aa47d105b), rs2:x9(0x0000000000260000), imm:0x2
+ TEST_RI_OP(sm4ks, x8, x9, 0x2, 0x00000000e8e51048, 0xf5adb41aa47d105b, 0x0000000000260000, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with dataset: sbox32
+ // result rd:x9(0x00000000685bc31e), rs1=>rd:x9(0xdf7f3844121bcc23), rs2:x8(0x0000000027000000), imm:0x3
+ TEST_RI_OP(sm4ks, x9, x8, 0x3, 0x00000000685bc31e, 0xdf7f3844121bcc23, 0x0000000027000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with dataset: sbox32
+ // result rd:x10(0x00000000cd6c48a6), rs1=>rd:x10(0x10fd3dedadea5195), rs2:x7(0x0000000000000028), imm:0x0
+ TEST_RI_OP(sm4ks, x10, x7, 0x0, 0x00000000cd6c48a6, 0x10fd3dedadea5195, 0x0000000000000028, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with dataset: sbox32
+ // result rd:x11(0x00000000d8d5ea41), rs1=>rd:x11(0xbd295ce2d2ffbec1), rs2:x6(0x0000000000002900), imm:0x1
+ TEST_RI_OP(sm4ks, x11, x6, 0x1, 0x00000000d8d5ea41, 0xbd295ce2d2ffbec1, 0x0000000000002900, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with dataset: sbox32
+ // result rd:x12(0x00000000adeac83a), rs1=>rd:x12(0xc9649f05a8e1a8bb), rs2:x5(0x00000000002a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x12, x5, 0x2, 0x00000000adeac83a, 0xc9649f05a8e1a8bb, 0x00000000002a0000, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with dataset: sbox32
+ // result rd:x13(0x000000000ba917ea), rs1=>rd:x13(0x3541291848c99fcb), rs2:x4(0x000000002b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x13, x4, 0x3, 0x000000000ba917ea, 0x3541291848c99fcb, 0x000000002b000000, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with dataset: sbox32
+ // result rd:x14(0x00000000e68024a2), rs1=>rd:x14(0x10a24740461d524f), rs2:x3(0x000000000000002c), imm:0x0
+ TEST_RI_OP(sm4ks, x14, x3, 0x0, 0x00000000e68024a2, 0x10a24740461d524f, 0x000000000000002c, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with dataset: sbox32
+ // result rd:x15(0x00000000cbeddf4f), rs1=>rd:x15(0x546b0e54528a10af), rs2:x2(0x0000000000002d00), imm:0x1
+ TEST_RI_OP(sm4ks, x15, x2, 0x1, 0x00000000cbeddf4f, 0x546b0e54528a10af, 0x0000000000002d00, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with dataset: sbox32
+ // result rd:x16(0x00000000b7377bd6), rs1=>rd:x16(0x73a92fd4e19bfbc3), rs2:x1(0x00000000002e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x16, x1, 0x2, 0x00000000b7377bd6, 0x73a92fd4e19bfbc3, 0x00000000002e0000, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with dataset: sbox32
+ // result rd:x17(0x00000000123afef1), rs1=>rd:x17(0x82f6747f707af2c0), rs2:x31(0x000000002f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x17, x31, 0x3, 0x00000000123afef1, 0x82f6747f707af2c0, 0x000000002f000000, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with dataset: sbox32
+ // result rd:x18(0x00000000246162bf), rs1=>rd:x18(0xf5adb41aa47d105b), rs2:x30(0x0000000000000030), imm:0x0
+ TEST_RI_OP(sm4ks, x18, x30, 0x0, 0x00000000246162bf, 0xf5adb41aa47d105b, 0x0000000000000030, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with dataset: sbox32
+ // result rd:x19(0x0000000084427f43), rs1=>rd:x19(0xdf7f3844121bcc23), rs2:x29(0x0000000000003100), imm:0x1
+ TEST_RI_OP(sm4ks, x19, x29, 0x1, 0x0000000084427f43, 0xdf7f3844121bcc23, 0x0000000000003100, x3, 32, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with dataset: sbox32
+ // result rd:x20(0x00000000a3f6d196), rs1=>rd:x20(0x10fd3dedadea5195), rs2:x28(0x0000000000320000), imm:0x2
+ TEST_RI_OP(sm4ks, x20, x28, 0x2, 0x00000000a3f6d196, 0x10fd3dedadea5195, 0x0000000000320000, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with dataset: sbox32
+ // result rd:x21(0x000000007bdf2b95), rs1=>rd:x21(0xbd295ce2d2ffbec1), rs2:x27(0x0000000033000000), imm:0x3
+ TEST_RI_OP(sm4ks, x21, x27, 0x3, 0x000000007bdf2b95, 0xbd295ce2d2ffbec1, 0x0000000033000000, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with dataset: sbox32
+ // result rd:x22(0x000000008878cc72), rs1=>rd:x22(0xc9649f05a8e1a8bb), rs2:x26(0x0000000000000034), imm:0x0
+ TEST_RI_OP(sm4ks, x22, x26, 0x0, 0x000000008878cc72, 0xc9649f05a8e1a8bb, 0x0000000000000034, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with dataset: sbox32
+ // result rd:x23(0x0000000049cd97cb), rs1=>rd:x23(0x3541291848c99fcb), rs2:x25(0x0000000000003500), imm:0x1
+ TEST_RI_OP(sm4ks, x23, x25, 0x1, 0x0000000049cd97cb, 0x3541291848c99fcb, 0x0000000000003500, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with dataset: sbox32
+ // result rd:x24(0x0000000074de001d), rs1=>rd:x24(0x10a24740461d524f), rs2:x24(0x0000000000360000), imm:0x2
+ TEST_RI_OP(sm4ks, x24, x24, 0x2, 0x0000000074de001d, 0x10a24740461d524f, 0x0000000000360000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with dataset: sbox32
+ // result rd:x25(0x00000000c72a82e5), rs1=>rd:x25(0x546b0e54528a10af), rs2:x23(0x0000000037000000), imm:0x3
+ TEST_RI_OP(sm4ks, x25, x23, 0x3, 0x00000000c72a82e5, 0x546b0e54528a10af, 0x0000000037000000, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with dataset: sbox32
+ // result rd:x26(0x00000000e18bbb43), rs1=>rd:x26(0x73a92fd4e19bfbc3), rs2:x22(0x0000000000000038), imm:0x0
+ TEST_RI_OP(sm4ks, x26, x22, 0x0, 0x00000000e18bbb43, 0x73a92fd4e19bfbc3, 0x0000000000000038, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with dataset: sbox32
+ // result rd:x27(0x00000000eb152d20), rs1=>rd:x27(0x82f6747f707af2c0), rs2:x21(0x0000000000003900), imm:0x1
+ TEST_RI_OP(sm4ks, x27, x21, 0x1, 0x00000000eb152d20, 0x82f6747f707af2c0, 0x0000000000003900, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with dataset: sbox32
+ // result rd:x28(0x00000000eee99049), rs1=>rd:x28(0xf5adb41aa47d105b), rs2:x20(0x00000000003a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x28, x20, 0x2, 0x00000000eee99049, 0xf5adb41aa47d105b, 0x00000000003a0000, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with dataset: sbox32
+ // result rd:x29(0x00000000e85bd35e), rs1=>rd:x29(0xdf7f3844121bcc23), rs2:x19(0x000000003b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x29, x19, 0x3, 0x00000000e85bd35e, 0xdf7f3844121bcc23, 0x000000003b000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with dataset: sbox32
+ // result rd:x30(0x000000000d646be0), rs1=>rd:x30(0x10fd3dedadea5195), rs2:x18(0x000000000000003c), imm:0x0
+ TEST_RI_OP(sm4ks, x30, x18, 0x0, 0x000000000d646be0, 0x10fd3dedadea5195, 0x000000000000003c, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with dataset: sbox32
+ // result rd:x31(0x0000000043b83121), rs1=>rd:x31(0xbd295ce2d2ffbec1), rs2:x17(0x0000000000003d00), imm:0x1
+ TEST_RI_OP(sm4ks, x31, x17, 0x1, 0x0000000043b83121, 0xbd295ce2d2ffbec1, 0x0000000000003d00, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with dataset: sbox32
+ // result rd:x1(0x00000000b7de483c), rs1=>rd:x1(0xc9649f05a8e1a8bb), rs2:x16(0x00000000003e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x1, x16, 0x2, 0x00000000b7de483c, 0xc9649f05a8e1a8bb, 0x00000000003e0000, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with dataset: sbox32
+ // result rd:x2(0x00000000ee098b98), rs1=>rd:x2(0x3541291848c99fcb), rs2:x15(0x000000003f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x2, x15, 0x3, 0x00000000ee098b98, 0x3541291848c99fcb, 0x000000003f000000, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with dataset: sbox32
+ // result rd:x3(0x00000000a6957108), rs1=>rd:x3(0x10a24740461d524f), rs2:x14(0x0000000000000040), imm:0x0
+ TEST_RI_OP(sm4ks, x3, x14, 0x0, 0x00000000a6957108, 0x10a24740461d524f, 0x0000000000000040, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with dataset: sbox32
+ // result rd:x4(0x00000000d289174f), rs1=>rd:x4(0x546b0e54528a10af), rs2:x13(0x0000000000004100), imm:0x1
+ TEST_RI_OP(sm4ks, x4, x13, 0x1, 0x00000000d289174f, 0x546b0e54528a10af, 0x0000000000004100, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with dataset: sbox32
+ // result rd:x5(0x00000000b23c1b57), rs1=>rd:x5(0x73a92fd4e19bfbc3), rs2:x12(0x0000000000420000), imm:0x2
+ TEST_RI_OP(sm4ks, x5, x12, 0x2, 0x00000000b23c1b57, 0x73a92fd4e19bfbc3, 0x0000000000420000, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with dataset: sbox32
+ // result rd:x6(0x000000008cfaedbe), rs1=>rd:x6(0x82f6747f707af2c0), rs2:x11(0x0000000043000000), imm:0x3
+ TEST_RI_OP(sm4ks, x6, x11, 0x3, 0x000000008cfaedbe, 0x82f6747f707af2c0, 0x0000000043000000, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with dataset: sbox32
+ // result rd:x7(0x00000000c4e369a8), rs1=>rd:x7(0xf5adb41aa47d105b), rs2:x10(0x0000000000000044), imm:0x0
+ TEST_RI_OP(sm4ks, x7, x10, 0x0, 0x00000000c4e369a8, 0xf5adb41aa47d105b, 0x0000000000000044, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with dataset: sbox32
+ // result rd:x8(0x000000009c22bf43), rs1=>rd:x8(0xdf7f3844121bcc23), rs2:x9(0x0000000000004500), imm:0x1
+ TEST_RI_OP(sm4ks, x8, x9, 0x1, 0x000000009c22bf43, 0xdf7f3844121bcc23, 0x0000000000004500, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with dataset: sbox32
+ // result rd:x9(0x00000000a6fdb117), rs1=>rd:x9(0x10fd3dedadea5195), rs2:x8(0x0000000000460000), imm:0x2
+ TEST_RI_OP(sm4ks, x9, x8, 0x2, 0x00000000a6fdb117, 0x10fd3dedadea5195, 0x0000000000460000, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with dataset: sbox32
+ // result rd:x10(0x0000000068bfa99c), rs1=>rd:x10(0xbd295ce2d2ffbec1), rs2:x7(0x0000000047000000), imm:0x3
+ TEST_RI_OP(sm4ks, x10, x7, 0x3, 0x0000000068bfa99c, 0xbd295ce2d2ffbec1, 0x0000000047000000, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with dataset: sbox32
+ // result rd:x11(0x00000000c871e938), rs1=>rd:x11(0xc9649f05a8e1a8bb), rs2:x6(0x0000000000000048), imm:0x0
+ TEST_RI_OP(sm4ks, x11, x6, 0x0, 0x00000000c871e938, 0xc9649f05a8e1a8bb, 0x0000000000000048, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with dataset: sbox32
+ // result rd:x12(0x00000000c3e5c6eb), rs1=>rd:x12(0x3541291848c99fcb), rs2:x5(0x0000000000004900), imm:0x1
+ TEST_RI_OP(sm4ks, x12, x5, 0x1, 0x00000000c3e5c6eb, 0x3541291848c99fcb, 0x0000000000004900, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with dataset: sbox32
+ // result rd:x13(0x000000005821d248), rs1=>rd:x13(0x10a24740461d524f), rs2:x4(0x00000000004a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x13, x4, 0x2, 0x000000005821d248, 0x10a24740461d524f, 0x00000000004a0000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with dataset: sbox32
+ // result rd:x14(0x000000004baa93a3), rs1=>rd:x14(0x546b0e54528a10af), rs2:x3(0x000000004b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x14, x3, 0x3, 0x000000004baa93a3, 0x546b0e54528a10af, 0x000000004b000000, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with dataset: sbox32
+ // result rd:x15(0x0000000021878825), rs1=>rd:x15(0x73a92fd4e19bfbc3), rs2:x2(0x000000000000004c), imm:0x0
+ TEST_RI_OP(sm4ks, x15, x2, 0x0, 0x0000000021878825, 0x73a92fd4e19bfbc3, 0x000000000000004c, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with dataset: sbox32
+ // result rd:x16(0x00000000e0387760), rs1=>rd:x16(0x82f6747f707af2c0), rs2:x1(0x0000000000004d00), imm:0x1
+ TEST_RI_OP(sm4ks, x16, x1, 0x1, 0x00000000e0387760, 0x82f6747f707af2c0, 0x0000000000004d00, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with dataset: sbox32
+ // result rd:x17(0x000000008332f0d2), rs1=>rd:x17(0xf5adb41aa47d105b), rs2:x31(0x00000000004e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x17, x31, 0x2, 0x000000008332f0d2, 0xf5adb41aa47d105b, 0x00000000004e0000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with dataset: sbox32
+ // result rd:x18(0x00000000ba1bd977), rs1=>rd:x18(0xdf7f3844121bcc23), rs2:x30(0x000000004f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x18, x30, 0x3, 0x00000000ba1bd977, 0xdf7f3844121bcc23, 0x000000004f000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with dataset: sbox32
+ // result rd:x19(0x00000000ade765fd), rs1=>rd:x19(0x10fd3dedadea5195), rs2:x29(0x0000000000000050), imm:0x0
+ TEST_RI_OP(sm4ks, x19, x29, 0x0, 0x00000000ade765fd, 0x10fd3dedadea5195, 0x0000000000000050, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with dataset: sbox32
+ // result rd:x20(0x000000005fcad5a1), rs1=>rd:x20(0xbd295ce2d2ffbec1), rs2:x28(0x0000000000005100), imm:0x1
+ TEST_RI_OP(sm4ks, x20, x28, 0x1, 0x000000005fcad5a1, 0xbd295ce2d2ffbec1, 0x0000000000005100, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with dataset: sbox32
+ // result rd:x21(0x00000000e860882b), rs1=>rd:x21(0xc9649f05a8e1a8bb), rs2:x27(0x0000000000520000), imm:0x2
+ TEST_RI_OP(sm4ks, x21, x27, 0x2, 0x00000000e860882b, 0xc9649f05a8e1a8bb, 0x0000000000520000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with dataset: sbox32
+ // result rd:x22(0x00000000fa898992), rs1=>rd:x22(0x3541291848c99fcb), rs2:x26(0x0000000053000000), imm:0x3
+ TEST_RI_OP(sm4ks, x22, x26, 0x3, 0x00000000fa898992, 0x3541291848c99fcb, 0x0000000053000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with dataset: sbox32
+ // result rd:x23(0x0000000066936a3e), rs1=>rd:x23(0x10a24740461d524f), rs2:x25(0x0000000000000054), imm:0x0
+ TEST_RI_OP(sm4ks, x23, x25, 0x0, 0x0000000066936a3e, 0x10a24740461d524f, 0x0000000000000054, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with dataset: sbox32
+ // result rd:x24(0x000000000c323180), rs1=>rd:x24(0x546b0e54528a10af), rs2:x24(0x0000000000005500), imm:0x1
+ TEST_RI_OP(sm4ks, x24, x24, 0x1, 0x000000000c323180, 0x546b0e54528a10af, 0x0000000000005500, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with dataset: sbox32
+ // result rd:x25(0x000000008c41bbd8), rs1=>rd:x25(0x73a92fd4e19bfbc3), rs2:x23(0x0000000000560000), imm:0x2
+ TEST_RI_OP(sm4ks, x25, x23, 0x2, 0x000000008c41bbd8, 0x73a92fd4e19bfbc3, 0x0000000000560000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with dataset: sbox32
+ // result rd:x26(0x00000000fb1a6385), rs1=>rd:x26(0x82f6747f707af2c0), rs2:x22(0x0000000057000000), imm:0x3
+ TEST_RI_OP(sm4ks, x26, x22, 0x3, 0x00000000fb1a6385, 0x82f6747f707af2c0, 0x0000000057000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with dataset: sbox32
+ // result rd:x27(0x00000000a4626ca3), rs1=>rd:x27(0xf5adb41aa47d105b), rs2:x21(0x0000000000000058), imm:0x0
+ TEST_RI_OP(sm4ks, x27, x21, 0x0, 0x00000000a4626ca3, 0xf5adb41aa47d105b, 0x0000000000000058, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with dataset: sbox32
+ // result rd:x28(0x000000008f6e2743), rs1=>rd:x28(0xdf7f3844121bcc23), rs2:x20(0x0000000000005900), imm:0x1
+ TEST_RI_OP(sm4ks, x28, x20, 0x1, 0x000000008f6e2743, 0xdf7f3844121bcc23, 0x0000000000005900, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with dataset: sbox32
+ // result rd:x29(0x00000000aae5b114), rs1=>rd:x29(0x10fd3dedadea5195), rs2:x19(0x00000000005a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x29, x19, 0x2, 0x00000000aae5b114, 0x10fd3dedadea5195, 0x00000000005a0000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with dataset: sbox32
+ // result rd:x30(0x00000000999f37e4), rs1=>rd:x30(0xbd295ce2d2ffbec1), rs2:x18(0x000000005b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x30, x18, 0x3, 0x00000000999f37e4, 0xbd295ce2d2ffbec1, 0x000000005b000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with dataset: sbox32
+ // result rd:x31(0x00000000a8ef90cb), rs1=>rd:x31(0xc9649f05a8e1a8bb), rs2:x17(0x000000000000005c), imm:0x0
+ TEST_RI_OP(sm4ks, x31, x17, 0x0, 0x00000000a8ef90cb, 0xc9649f05a8e1a8bb, 0x000000000000005c, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with dataset: sbox32
+ // result rd:x1(0x0000000042e2c90b), rs1=>rd:x1(0x3541291848c99fcb), rs2:x16(0x0000000000005d00), imm:0x1
+ TEST_RI_OP(sm4ks, x1, x16, 0x1, 0x0000000042e2c90b, 0x3541291848c99fcb, 0x0000000000005d00, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with dataset: sbox32
+ // result rd:x2(0x000000000880f2dc), rs1=>rd:x2(0x10a24740461d524f), rs2:x15(0x00000000005e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x2, x15, 0x2, 0x000000000880f2dc, 0x10a24740461d524f, 0x00000000005e0000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with dataset: sbox32
+ // result rd:x3(0x00000000672a96b5), rs1=>rd:x3(0x546b0e54528a10af), rs2:x14(0x000000005f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x3, x14, 0x3, 0x00000000672a96b5, 0x546b0e54528a10af, 0x000000005f000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with dataset: sbox32
+ // result rd:x4(0x000000002198f4dd), rs1=>rd:x4(0x73a92fd4e19bfbc3), rs2:x13(0x0000000000000060), imm:0x0
+ TEST_RI_OP(sm4ks, x4, x13, 0x0, 0x000000002198f4dd, 0x73a92fd4e19bfbc3, 0x0000000000000060, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with dataset: sbox32
+ // result rd:x5(0x000000007468d640), rs1=>rd:x5(0x82f6747f707af2c0), rs2:x12(0x0000000000006100), imm:0x1
+ TEST_RI_OP(sm4ks, x5, x12, 0x1, 0x000000007468d640, 0x82f6747f707af2c0, 0x0000000000006100, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with dataset: sbox32
+ // result rd:x6(0x00000000a373d05a), rs1=>rd:x6(0xf5adb41aa47d105b), rs2:x11(0x0000000000620000), imm:0x2
+ TEST_RI_OP(sm4ks, x6, x11, 0x2, 0x00000000a373d05a, 0xf5adb41aa47d105b, 0x0000000000620000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with dataset: sbox32
+ // result rd:x7(0x000000004cdbc70c), rs1=>rd:x7(0xdf7f3844121bcc23), rs2:x10(0x0000000063000000), imm:0x3
+ TEST_RI_OP(sm4ks, x7, x10, 0x3, 0x000000004cdbc70c, 0xdf7f3844121bcc23, 0x0000000063000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with dataset: sbox32
+ // result rd:x8(0x00000000cd6660f6), rs1=>rd:x8(0x10fd3dedadea5195), rs2:x9(0x0000000000000064), imm:0x0
+ TEST_RI_OP(sm4ks, x8, x9, 0x0, 0x00000000cd6660f6, 0x10fd3dedadea5195, 0x0000000000000064, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with dataset: sbox32
+ // result rd:x9(0x00000000d9d3e6c1), rs1=>rd:x9(0xbd295ce2d2ffbec1), rs2:x8(0x0000000000006500), imm:0x1
+ TEST_RI_OP(sm4ks, x9, x8, 0x1, 0x00000000d9d3e6c1, 0xbd295ce2d2ffbec1, 0x0000000000006500, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with dataset: sbox32
+ // result rd:x10(0x00000000c0308821), rs1=>rd:x10(0xc9649f05a8e1a8bb), rs2:x7(0x0000000000660000), imm:0x2
+ TEST_RI_OP(sm4ks, x10, x7, 0x2, 0x00000000c0308821, 0xc9649f05a8e1a8bb, 0x0000000000660000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with dataset: sbox32
+ // result rd:x11(0x00000000ea898b9a), rs1=>rd:x11(0x3541291848c99fcb), rs2:x6(0x0000000067000000), imm:0x3
+ TEST_RI_OP(sm4ks, x11, x6, 0x3, 0x00000000ea898b9a, 0x3541291848c99fcb, 0x0000000067000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with dataset: sbox32
+ // result rd:x12(0x00000000e699406a), rs1=>rd:x12(0x10a24740461d524f), rs2:x5(0x0000000000000068), imm:0x0
+ TEST_RI_OP(sm4ks, x12, x5, 0x0, 0x00000000e699406a, 0x10a24740461d524f, 0x0000000000000068, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with dataset: sbox32
+ // result rd:x13(0x00000000569b32ef), rs1=>rd:x13(0x546b0e54528a10af), rs2:x4(0x0000000000006900), imm:0x1
+ TEST_RI_OP(sm4ks, x13, x4, 0x1, 0x00000000569b32ef, 0x546b0e54528a10af, 0x0000000000006900, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with dataset: sbox32
+ // result rd:x14(0x00000000dfe77bcc), rs1=>rd:x14(0x73a92fd4e19bfbc3), rs2:x3(0x00000000006a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x14, x3, 0x2, 0x00000000dfe77bcc, 0x73a92fd4e19bfbc3, 0x00000000006a0000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with dataset: sbox32
+ // result rd:x15(0x000000004b1a75dd), rs1=>rd:x15(0x82f6747f707af2c0), rs2:x2(0x000000006b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x15, x2, 0x3, 0x000000004b1a75dd, 0x82f6747f707af2c0, 0x000000006b000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with dataset: sbox32
+ // result rd:x16(0x0000000084fd105a), rs1=>rd:x16(0xf5adb41aa47d105b), rs2:x1(0x000000000000006c), imm:0x0
+ TEST_RI_OP(sm4ks, x16, x1, 0x0, 0x0000000084fd105a, 0xf5adb41aa47d105b, 0x000000000000006c, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with dataset: sbox32
+ // result rd:x17(0x00000000960bed03), rs1=>rd:x17(0xdf7f3844121bcc23), rs2:x31(0x0000000000006d00), imm:0x1
+ TEST_RI_OP(sm4ks, x17, x31, 0x1, 0x00000000960bed03, 0xdf7f3844121bcc23, 0x0000000000006d00, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with dataset: sbox32
+ // result rd:x18(0x000000009192519a), rs1=>rd:x18(0x10fd3dedadea5195), rs2:x30(0x00000000006e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x18, x30, 0x2, 0x000000009192519a, 0x10fd3dedadea5195, 0x00000000006e0000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with dataset: sbox32
+ // result rd:x19(0x00000000551f2e82), rs1=>rd:x19(0xbd295ce2d2ffbec1), rs2:x29(0x000000006f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x19, x29, 0x3, 0x00000000551f2e82, 0xbd295ce2d2ffbec1, 0x000000006f000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with dataset: sbox32
+ // result rd:x20(0x0000000028fbc26f), rs1=>rd:x20(0xc9649f05a8e1a8bb), rs2:x28(0x0000000000000070), imm:0x0
+ TEST_RI_OP(sm4ks, x20, x28, 0x0, 0x0000000028fbc26f, 0xc9649f05a8e1a8bb, 0x0000000000000070, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with dataset: sbox32
+ // result rd:x21(0x0000000048c99fcb), rs1=>rd:x21(0x3541291848c99fcb), rs2:x27(0x0000000000007100), imm:0x1
+ TEST_RI_OP(sm4ks, x21, x27, 0x1, 0x0000000048c99fcb, 0x3541291848c99fcb, 0x0000000000007100, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with dataset: sbox32
+ // result rd:x22(0x00000000655b9247), rs1=>rd:x22(0x10a24740461d524f), rs2:x26(0x0000000000720000), imm:0x2
+ TEST_RI_OP(sm4ks, x22, x26, 0x2, 0x00000000655b9247, 0x10a24740461d524f, 0x0000000000720000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with dataset: sbox32
+ // result rd:x23(0x00000000056a9a84), rs1=>rd:x23(0x546b0e54528a10af), rs2:x25(0x0000000073000000), imm:0x3
+ TEST_RI_OP(sm4ks, x23, x25, 0x3, 0x00000000056a9a84, 0x546b0e54528a10af, 0x0000000073000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with dataset: sbox32
+ // result rd:x24(0x00000000e0934feb), rs1=>rd:x24(0x73a92fd4e19bfbc3), rs2:x24(0x0000000000000074), imm:0x0
+ TEST_RI_OP(sm4ks, x24, x24, 0x0, 0x00000000e0934feb, 0x73a92fd4e19bfbc3, 0x0000000000000074, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with dataset: sbox32
+ // result rd:x25(0x00000000ea1321a0), rs1=>rd:x25(0x82f6747f707af2c0), rs2:x23(0x0000000000007500), imm:0x1
+ TEST_RI_OP(sm4ks, x25, x23, 0x1, 0x00000000ea1321a0, 0x82f6747f707af2c0, 0x0000000000007500, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with dataset: sbox32
+ // result rd:x26(0x00000000b75af0df), rs1=>rd:x26(0xf5adb41aa47d105b), rs2:x22(0x0000000000760000), imm:0x2
+ TEST_RI_OP(sm4ks, x26, x22, 0x2, 0x00000000b75af0df, 0xf5adb41aa47d105b, 0x0000000000760000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with dataset: sbox32
+ // result rd:x27(0x00000000405bc60a), rs1=>rd:x27(0xdf7f3844121bcc23), rs2:x21(0x0000000077000000), imm:0x3
+ TEST_RI_OP(sm4ks, x27, x21, 0x3, 0x00000000405bc60a, 0xdf7f3844121bcc23, 0x0000000077000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with dataset: sbox32
+ // result rd:x28(0x000000002de377d9), rs1=>rd:x28(0x10fd3dedadea5195), rs2:x20(0x0000000000000078), imm:0x0
+ TEST_RI_OP(sm4ks, x28, x20, 0x0, 0x000000002de377d9, 0x10fd3dedadea5195, 0x0000000000000078, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with dataset: sbox32
+ // result rd:x29(0x00000000d4e48801), rs1=>rd:x29(0xbd295ce2d2ffbec1), rs2:x19(0x0000000000007900), imm:0x1
+ TEST_RI_OP(sm4ks, x29, x19, 0x1, 0x00000000d4e48801, 0xbd295ce2d2ffbec1, 0x0000000000007900, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with dataset: sbox32
+ // result rd:x30(0x00000000a9e3e8bb), rs1=>rd:x30(0xc9649f05a8e1a8bb), rs2:x18(0x00000000007a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x30, x18, 0x2, 0x00000000a9e3e8bb, 0xc9649f05a8e1a8bb, 0x00000000007a0000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with dataset: sbox32
+ // result rd:x31(0x00000000af2903b8), rs1=>rd:x31(0x3541291848c99fcb), rs2:x17(0x000000007b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x31, x17, 0x3, 0x00000000af2903b8, 0x3541291848c99fcb, 0x000000007b000000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with dataset: sbox32
+ // result rd:x1(0x00000000460902ef), rs1=>rd:x1(0x10a24740461d524f), rs2:x16(0x000000000000007c), imm:0x0
+ TEST_RI_OP(sm4ks, x1, x16, 0x0, 0x00000000460902ef, 0x10a24740461d524f, 0x000000000000007c, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with dataset: sbox32
+ // result rd:x2(0x000000004ae8d42f), rs1=>rd:x2(0x546b0e54528a10af), rs2:x15(0x0000000000007d00), imm:0x1
+ TEST_RI_OP(sm4ks, x2, x15, 0x1, 0x000000004ae8d42f, 0x546b0e54528a10af, 0x0000000000007d00, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with dataset: sbox32
+ // result rd:x3(0x000000008553fbda), rs1=>rd:x3(0x73a92fd4e19bfbc3), rs2:x14(0x00000000007e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x3, x14, 0x2, 0x000000008553fbda, 0x73a92fd4e19bfbc3, 0x00000000007e0000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with dataset: sbox32
+ // result rd:x4(0x00000000eebae18f), rs1=>rd:x4(0x82f6747f707af2c0), rs2:x13(0x000000007f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x4, x13, 0x3, 0x00000000eebae18f, 0x82f6747f707af2c0, 0x000000007f000000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with dataset: sbox32
+ // result rd:x5(0x00000000e46065b1), rs1=>rd:x5(0xf5adb41aa47d105b), rs2:x12(0x0000000000000080), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0x00000000e46065b1, 0xf5adb41aa47d105b, 0x0000000000000080, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with dataset: sbox32
+ // result rd:x6(0x00000000854473c3), rs1=>rd:x6(0xdf7f3844121bcc23), rs2:x11(0x0000000000008100), imm:0x1
+ TEST_RI_OP(sm4ks, x6, x11, 0x1, 0x00000000854473c3, 0xdf7f3844121bcc23, 0x0000000000008100, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with dataset: sbox32
+ // result rd:x7(0x00000000e8601184), rs1=>rd:x7(0x10fd3dedadea5195), rs2:x10(0x0000000000820000), imm:0x2
+ TEST_RI_OP(sm4ks, x7, x10, 0x2, 0x00000000e8601184, 0x10fd3dedadea5195, 0x0000000000820000, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with dataset: sbox32
+ // result rd:x8(0x0000000000bfa4a8), rs1=>rd:x8(0xbd295ce2d2ffbec1), rs2:x9(0x0000000083000000), imm:0x3
+ TEST_RI_OP(sm4ks, x8, x9, 0x3, 0x0000000000bfa4a8, 0xbd295ce2d2ffbec1, 0x0000000083000000, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with dataset: sbox32
+ // result rd:x9(0x00000000a8e988fb), rs1=>rd:x9(0xc9649f05a8e1a8bb), rs2:x8(0x0000000000000084), imm:0x0
+ TEST_RI_OP(sm4ks, x9, x8, 0x0, 0x00000000a8e988fb, 0xc9649f05a8e1a8bb, 0x0000000000000084, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with dataset: sbox32
+ // result rd:x10(0x00000000d0aa582b), rs1=>rd:x10(0x3541291848c99fcb), rs2:x7(0x0000000000008500), imm:0x1
+ TEST_RI_OP(sm4ks, x10, x7, 0x1, 0x00000000d0aa582b, 0x3541291848c99fcb, 0x0000000000008500, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with dataset: sbox32
+ // result rd:x11(0x000000005a255248), rs1=>rd:x11(0x10a24740461d524f), rs2:x6(0x0000000000860000), imm:0x2
+ TEST_RI_OP(sm4ks, x11, x6, 0x2, 0x000000005a255248, 0x10a24740461d524f, 0x0000000000860000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with dataset: sbox32
+ // result rd:x12(0x00000000e72a86f5), rs1=>rd:x12(0x546b0e54528a10af), rs2:x5(0x0000000087000000), imm:0x3
+ TEST_RI_OP(sm4ks, x12, x5, 0x3, 0x00000000e72a86f5, 0x546b0e54528a10af, 0x0000000087000000, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with dataset: sbox32
+ // result rd:x13(0x00000000810faa60), rs1=>rd:x13(0x73a92fd4e19bfbc3), rs2:x4(0x0000000000000088), imm:0x0
+ TEST_RI_OP(sm4ks, x13, x4, 0x0, 0x00000000810faa60, 0x73a92fd4e19bfbc3, 0x0000000000000088, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with dataset: sbox32
+ // result rd:x14(0x00000000ee010520), rs1=>rd:x14(0x82f6747f707af2c0), rs2:x3(0x0000000000008900), imm:0x1
+ TEST_RI_OP(sm4ks, x14, x3, 0x1, 0x00000000ee010520, 0x82f6747f707af2c0, 0x0000000000008900, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with dataset: sbox32
+ // result rd:x15(0x00000000dd8f5045), rs1=>rd:x15(0xf5adb41aa47d105b), rs2:x2(0x00000000008a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x15, x2, 0x2, 0x00000000dd8f5045, 0xf5adb41aa47d105b, 0x00000000008a0000, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with dataset: sbox32
+ // result rd:x16(0x00000000dcdbd544), rs1=>rd:x16(0xdf7f3844121bcc23), rs2:x1(0x000000008b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x16, x1, 0x3, 0x00000000dcdbd544, 0xdf7f3844121bcc23, 0x000000008b000000, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with dataset: sbox32
+ // result rd:x17(0x000000008d752d6c), rs1=>rd:x17(0x10fd3dedadea5195), rs2:x31(0x000000000000008c), imm:0x0
+ TEST_RI_OP(sm4ks, x17, x31, 0x0, 0x000000008d752d6c, 0x10fd3dedadea5195, 0x000000000000008c, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with dataset: sbox32
+ // result rd:x18(0x000000005ecfdfe1), rs1=>rd:x18(0xbd295ce2d2ffbec1), rs2:x30(0x0000000000008d00), imm:0x1
+ TEST_RI_OP(sm4ks, x18, x30, 0x1, 0x000000005ecfdfe1, 0xbd295ce2d2ffbec1, 0x0000000000008d00, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with dataset: sbox32
+ // result rd:x19(0x00000000a2f40839), rs1=>rd:x19(0xc9649f05a8e1a8bb), rs2:x29(0x00000000008e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x19, x29, 0x2, 0x00000000a2f40839, 0xc9649f05a8e1a8bb, 0x00000000008e0000, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with dataset: sbox32
+ // result rd:x20(0x00000000e9e90b9b), rs1=>rd:x20(0x3541291848c99fcb), rs2:x28(0x000000008f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x20, x28, 0x3, 0x00000000e9e90b9b, 0x3541291848c99fcb, 0x000000008f000000, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with dataset: sbox32
+ // result rd:x21(0x00000000460122af), rs1=>rd:x21(0x10a24740461d524f), rs2:x27(0x0000000000000090), imm:0x0
+ TEST_RI_OP(sm4ks, x21, x27, 0x0, 0x00000000460122af, 0x10a24740461d524f, 0x0000000000000090, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with dataset: sbox32
+ // result rd:x22(0x0000000047ddbe6f), rs1=>rd:x22(0x546b0e54528a10af), rs2:x26(0x0000000000009100), imm:0x1
+ TEST_RI_OP(sm4ks, x22, x26, 0x1, 0x0000000047ddbe6f, 0x546b0e54528a10af, 0x0000000000009100, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with dataset: sbox32
+ // result rd:x23(0x00000000cfc65b48), rs1=>rd:x23(0x73a92fd4e19bfbc3), rs2:x25(0x0000000000920000), imm:0x2
+ TEST_RI_OP(sm4ks, x23, x25, 0x2, 0x00000000cfc65b48, 0x73a92fd4e19bfbc3, 0x0000000000920000, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with dataset: sbox32
+ // result rd:x24(0x0000000037801452), rs1=>rd:x24(0x82f6747f707af2c0), rs2:x24(0x0000000093000000), imm:0x3
+ TEST_RI_OP(sm4ks, x24, x24, 0x3, 0x0000000037801452, 0x82f6747f707af2c0, 0x0000000093000000, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with dataset: sbox32
+ // result rd:x25(0x00000000c4ee5dc0), rs1=>rd:x25(0xf5adb41aa47d105b), rs2:x23(0x0000000000000094), imm:0x0
+ TEST_RI_OP(sm4ks, x25, x23, 0x0, 0x00000000c4ee5dc0, 0xf5adb41aa47d105b, 0x0000000000000094, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with dataset: sbox32
+ // result rd:x26(0x000000001401f8a3), rs1=>rd:x26(0xdf7f3844121bcc23), rs2:x22(0x0000000000009500), imm:0x1
+ TEST_RI_OP(sm4ks, x26, x22, 0x1, 0x000000001401f8a3, 0xdf7f3844121bcc23, 0x0000000000009500, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with dataset: sbox32
+ // result rd:x27(0x00000000a0f01196), rs1=>rd:x27(0x10fd3dedadea5195), rs2:x21(0x0000000000960000), imm:0x2
+ TEST_RI_OP(sm4ks, x27, x21, 0x2, 0x00000000a0f01196, 0x10fd3dedadea5195, 0x0000000000960000, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with dataset: sbox32
+ // result rd:x28(0x00000000875f34eb), rs1=>rd:x28(0xbd295ce2d2ffbec1), rs2:x20(0x0000000097000000), imm:0x3
+ TEST_RI_OP(sm4ks, x28, x20, 0x3, 0x00000000875f34eb, 0xbd295ce2d2ffbec1, 0x0000000097000000, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with dataset: sbox32
+ // result rd:x29(0x000000000874fe16), rs1=>rd:x29(0xc9649f05a8e1a8bb), rs2:x19(0x0000000000000098), imm:0x0
+ TEST_RI_OP(sm4ks, x29, x19, 0x0, 0x000000000874fe16, 0xc9649f05a8e1a8bb, 0x0000000000000098, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with dataset: sbox32
+ // result rd:x30(0x00000000da800cab), rs1=>rd:x30(0x3541291848c99fcb), rs2:x18(0x0000000000009900), imm:0x1
+ TEST_RI_OP(sm4ks, x30, x18, 0x1, 0x00000000da800cab, 0x3541291848c99fcb, 0x0000000000009900, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with dataset: sbox32
+ // result rd:x31(0x000000005f2f1249), rs1=>rd:x31(0x10a24740461d524f), rs2:x17(0x00000000009a0000), imm:0x2
+ TEST_RI_OP(sm4ks, x31, x17, 0x2, 0x000000005f2f1249, 0x10a24740461d524f, 0x00000000009a0000, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with dataset: sbox32
+ // result rd:x1(0x00000000628a16b7), rs1=>rd:x1(0x546b0e54528a10af), rs2:x16(0x000000009b000000), imm:0x3
+ TEST_RI_OP(sm4ks, x1, x16, 0x3, 0x00000000628a16b7, 0x546b0e54528a10af, 0x000000009b000000, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with dataset: sbox32
+ // result rd:x2(0x0000000041058136), rs1=>rd:x2(0x73a92fd4e19bfbc3), rs2:x15(0x000000000000009c), imm:0x0
+ TEST_RI_OP(sm4ks, x2, x15, 0x0, 0x0000000041058136, 0x73a92fd4e19bfbc3, 0x000000000000009c, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with dataset: sbox32
+ // result rd:x3(0x00000000613c7e40), rs1=>rd:x3(0x82f6747f707af2c0), rs2:x14(0x0000000000009d00), imm:0x1
+ TEST_RI_OP(sm4ks, x3, x14, 0x1, 0x00000000613c7e40, 0x82f6747f707af2c0, 0x0000000000009d00, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with dataset: sbox32
+ // result rd:x4(0x00000000fccc30cd), rs1=>rd:x4(0xf5adb41aa47d105b), rs2:x13(0x00000000009e0000), imm:0x2
+ TEST_RI_OP(sm4ks, x4, x13, 0x2, 0x00000000fccc30cd, 0xf5adb41aa47d105b, 0x00000000009e0000, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with dataset: sbox32
+ // result rd:x5(0x00000000f17b5052), rs1=>rd:x5(0xdf7f3844121bcc23), rs2:x12(0x000000009f000000), imm:0x3
+ TEST_RI_OP(sm4ks, x5, x12, 0x3, 0x00000000f17b5052, 0xdf7f3844121bcc23, 0x000000009f000000, x6, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with dataset: sbox32
+ // result rd:x6(0x000000000d695f88), rs1=>rd:x6(0x10fd3dedadea5195), rs2:x11(0x00000000000000a0), imm:0x0
+ TEST_RI_OP(sm4ks, x6, x11, 0x0, 0x000000000d695f88, 0x10fd3dedadea5195, 0x00000000000000a0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with dataset: sbox32
+ // result rd:x7(0x00000000cc844801), rs1=>rd:x7(0xbd295ce2d2ffbec1), rs2:x10(0x000000000000a100), imm:0x1
+ TEST_RI_OP(sm4ks, x7, x10, 0x1, 0x00000000cc844801, 0xbd295ce2d2ffbec1, 0x000000000000a100, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with dataset: sbox32
+ // result rd:x8(0x00000000d903e8a7), rs1=>rd:x8(0xc9649f05a8e1a8bb), rs2:x9(0x0000000000a20000), imm:0x2
+ TEST_RI_OP(sm4ks, x8, x9, 0x2, 0x00000000d903e8a7, 0xc9649f05a8e1a8bb, 0x0000000000a20000, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with dataset: sbox32
+ // result rd:x9(0x0000000066099adc), rs1=>rd:x9(0x3541291848c99fcb), rs2:x8(0x00000000a3000000), imm:0x3
+ TEST_RI_OP(sm4ks, x9, x8, 0x3, 0x0000000066099adc, 0x3541291848c99fcb, 0x00000000a3000000, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with dataset: sbox32
+ // result rd:x10(0x00000000060d13cd), rs1=>rd:x10(0x10a24740461d524f), rs2:x7(0x00000000000000a4), imm:0x0
+ TEST_RI_OP(sm4ks, x10, x7, 0x0, 0x00000000060d13cd, 0x10a24740461d524f, 0x00000000000000a4, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with dataset: sbox32
+ // result rd:x11(0x000000005eb9766f), rs1=>rd:x11(0x546b0e54528a10af), rs2:x6(0x000000000000a500), imm:0x1
+ TEST_RI_OP(sm4ks, x11, x6, 0x1, 0x000000005eb9766f, 0x546b0e54528a10af, 0x000000000000a500, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with dataset: sbox32
+ // result rd:x12(0x000000008451bbda), rs1=>rd:x12(0x73a92fd4e19bfbc3), rs2:x5(0x0000000000a60000), imm:0x2
+ TEST_RI_OP(sm4ks, x12, x5, 0x2, 0x000000008451bbda, 0x73a92fd4e19bfbc3, 0x0000000000a60000, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with dataset: sbox32
+ // result rd:x13(0x00000000107afef0), rs1=>rd:x13(0x82f6747f707af2c0), rs2:x4(0x00000000a7000000), imm:0x3
+ TEST_RI_OP(sm4ks, x13, x4, 0x3, 0x00000000107afef0, 0x82f6747f707af2c0, 0x00000000a7000000, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with dataset: sbox32
+ // result rd:x14(0x00000000a465709b), rs1=>rd:x14(0xf5adb41aa47d105b), rs2:x3(0x00000000000000a8), imm:0x0
+ TEST_RI_OP(sm4ks, x14, x3, 0x0, 0x00000000a465709b, 0xf5adb41aa47d105b, 0x00000000000000a8, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with dataset: sbox32
+ // result rd:x15(0x00000000970fe503), rs1=>rd:x15(0xdf7f3844121bcc23), rs2:x2(0x000000000000a900), imm:0x1
+ TEST_RI_OP(sm4ks, x15, x2, 0x1, 0x00000000970fe503, 0xdf7f3844121bcc23, 0x000000000000a900, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with dataset: sbox32
+ // result rd:x16(0x00000000bcc93111), rs1=>rd:x16(0x10fd3dedadea5195), rs2:x1(0x0000000000aa0000), imm:0x2
+ TEST_RI_OP(sm4ks, x16, x1, 0x2, 0x00000000bcc93111, 0x10fd3dedadea5195, 0x0000000000aa0000, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with dataset: sbox32
+ // result rd:x17(0x00000000799f2b94), rs1=>rd:x17(0xbd295ce2d2ffbec1), rs2:x31(0x00000000ab000000), imm:0x3
+ TEST_RI_OP(sm4ks, x17, x31, 0x3, 0x00000000799f2b94, 0xbd295ce2d2ffbec1, 0x00000000ab000000, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with dataset: sbox32
+ // result rd:x18(0x000000000860aeb6), rs1=>rd:x18(0xc9649f05a8e1a8bb), rs2:x30(0x00000000000000ac), imm:0x0
+ TEST_RI_OP(sm4ks, x18, x30, 0x0, 0x000000000860aeb6, 0xc9649f05a8e1a8bb, 0x00000000000000ac, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with dataset: sbox32
+ // result rd:x19(0x00000000c2e0ccab), rs1=>rd:x19(0x3541291848c99fcb), rs2:x29(0x000000000000ad00), imm:0x1
+ TEST_RI_OP(sm4ks, x19, x29, 0x1, 0x00000000c2e0ccab, 0x3541291848c99fcb, 0x000000000000ad00, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with dataset: sbox32
+ // result rd:x20(0x0000000061539246), rs1=>rd:x20(0x10a24740461d524f), rs2:x28(0x0000000000ae0000), imm:0x2
+ TEST_RI_OP(sm4ks, x20, x28, 0x2, 0x0000000061539246, 0x10a24740461d524f, 0x0000000000ae0000, x2, 32, x3)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with dataset: sbox32
+ // result rd:x21(0x000000003d6a9d98), rs1=>rd:x21(0x546b0e54528a10af), rs2:x27(0x00000000af000000), imm:0x3
+ TEST_RI_OP(sm4ks, x21, x27, 0x3, 0x000000003d6a9d98, 0x546b0e54528a10af, 0x00000000af000000, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with dataset: sbox32
+ // result rd:x22(0x0000000041019116), rs1=>rd:x22(0x73a92fd4e19bfbc3), rs2:x26(0x00000000000000b0), imm:0x0
+ TEST_RI_OP(sm4ks, x22, x26, 0x0, 0x0000000041019116, 0x73a92fd4e19bfbc3, 0x00000000000000b0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with dataset: sbox32
+ // result rd:x23(0x00000000eb1729a0), rs1=>rd:x23(0x82f6747f707af2c0), rs2:x25(0x000000000000b100), imm:0x1
+ TEST_RI_OP(sm4ks, x23, x25, 0x1, 0x00000000eb1729a0, 0x82f6747f707af2c0, 0x000000000000b100, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with dataset: sbox32
+ // result rd:x24(0x000000001b85e086), rs1=>rd:x24(0xf5adb41aa47d105b), rs2:x24(0x0000000000b20000), imm:0x2
+ TEST_RI_OP(sm4ks, x24, x24, 0x2, 0x000000001b85e086, 0xf5adb41aa47d105b, 0x0000000000b20000, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with dataset: sbox32
+ // result rd:x25(0x0000000057bb4401), rs1=>rd:x25(0xdf7f3844121bcc23), rs2:x23(0x00000000b3000000), imm:0x3
+ TEST_RI_OP(sm4ks, x25, x23, 0x3, 0x0000000057bb4401, 0xdf7f3844121bcc23, 0x00000000b3000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with dataset: sbox32
+ // result rd:x26(0x000000006df13e4b), rs1=>rd:x26(0x10fd3dedadea5195), rs2:x22(0x00000000000000b4), imm:0x0
+ TEST_RI_OP(sm4ks, x26, x22, 0x0, 0x000000006df13e4b, 0x10fd3dedadea5195, 0x00000000000000b4, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with dataset: sbox32
+ // result rd:x27(0x000000004d814361), rs1=>rd:x27(0xbd295ce2d2ffbec1), rs2:x21(0x000000000000b500), imm:0x1
+ TEST_RI_OP(sm4ks, x27, x21, 0x1, 0x000000004d814361, 0xbd295ce2d2ffbec1, 0x000000000000b500, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with dataset: sbox32
+ // result rd:x28(0x00000000ef6f68aa), rs1=>rd:x28(0xc9649f05a8e1a8bb), rs2:x20(0x0000000000b60000), imm:0x2
+ TEST_RI_OP(sm4ks, x28, x20, 0x2, 0x00000000ef6f68aa, 0xc9649f05a8e1a8bb, 0x0000000000b60000, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with dataset: sbox32
+ // result rd:x29(0x0000000067291adc), rs1=>rd:x29(0x3541291848c99fcb), rs2:x19(0x00000000b7000000), imm:0x3
+ TEST_RI_OP(sm4ks, x29, x19, 0x3, 0x0000000067291adc, 0x3541291848c99fcb, 0x00000000b7000000, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with dataset: sbox32
+ // result rd:x30(0x00000000269d534c), rs1=>rd:x30(0x10a24740461d524f), rs2:x18(0x00000000000000b8), imm:0x0
+ TEST_RI_OP(sm4ks, x30, x18, 0x0, 0x00000000269d534c, 0x10a24740461d524f, 0x00000000000000b8, x1, 32, x7)
+
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with dataset: sbox32
+ // result rd:x31(0x00000000cdf5ef4f), rs1=>rd:x31(0x546b0e54528a10af), rs2:x17(0x000000000000b900), imm:0x1
+ TEST_RI_OP(sm4ks, x31, x17, 0x1, 0x00000000cdf5ef4f, 0x546b0e54528a10af, 0x000000000000b900, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with dataset: sbox32
+ // result rd:x1(0x00000000d4f1bbce), rs1=>rd:x1(0x73a92fd4e19bfbc3), rs2:x16(0x0000000000ba0000), imm:0x2
+ TEST_RI_OP(sm4ks, x1, x16, 0x2, 0x00000000d4f1bbce, 0x73a92fd4e19bfbc3, 0x0000000000ba0000, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with dataset: sbox32
+ // result rd:x2(0x00000000023afcf9), rs1=>rd:x2(0x82f6747f707af2c0), rs2:x15(0x00000000bb000000), imm:0x3
+ TEST_RI_OP(sm4ks, x2, x15, 0x3, 0x00000000023afcf9, 0x82f6747f707af2c0, 0x00000000bb000000, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with dataset: sbox32
+ // result rd:x3(0x0000000004f02636), rs1=>rd:x3(0xf5adb41aa47d105b), rs2:x14(0x00000000000000bc), imm:0x0
+ TEST_RI_OP(sm4ks, x3, x14, 0x0, 0x0000000004f02636, 0xf5adb41aa47d105b, 0x00000000000000bc, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with dataset: sbox32
+ // result rd:x4(0x000000001f2da0a3), rs1=>rd:x4(0xdf7f3844121bcc23), rs2:x13(0x000000000000bd00), imm:0x1
+ TEST_RI_OP(sm4ks, x4, x13, 0x1, 0x000000001f2da0a3, 0xdf7f3844121bcc23, 0x000000000000bd00, x5, 32, x6)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with dataset: sbox32
+ // result rd:x5(0x0000000080b1311e), rs1=>rd:x5(0x10fd3dedadea5195), rs2:x12(0x0000000000be0000), imm:0x2
+ TEST_RI_OP(sm4ks, x5, x12, 0x2, 0x0000000080b1311e, 0x10fd3dedadea5195, 0x0000000000be0000, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with dataset: sbox32
+ // result rd:x6(0x0000000083df34e9), rs1=>rd:x6(0xbd295ce2d2ffbec1), rs2:x11(0x00000000bf000000), imm:0x3
+ TEST_RI_OP(sm4ks, x6, x11, 0x3, 0x0000000083df34e9, 0xbd295ce2d2ffbec1, 0x00000000bf000000, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with dataset: sbox32
+ // result rd:x7(0x000000000870ee36), rs1=>rd:x7(0xc9649f05a8e1a8bb), rs2:x10(0x00000000000000c0), imm:0x0
+ TEST_RI_OP(sm4ks, x7, x10, 0x0, 0x000000000870ee36, 0xc9649f05a8e1a8bb, 0x00000000000000c0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with dataset: sbox32
+ // result rd:x8(0x00000000cbc484ab), rs1=>rd:x8(0x3541291848c99fcb), rs2:x9(0x000000000000c100), imm:0x1
+ TEST_RI_OP(sm4ks, x8, x9, 0x1, 0x00000000cbc484ab, 0x3541291848c99fcb, 0x000000000000c100, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with dataset: sbox32
+ // result rd:x9(0x0000000011b2b2da), rs1=>rd:x9(0x10a24740461d524f), rs2:x8(0x0000000000c20000), imm:0x2
+ TEST_RI_OP(sm4ks, x9, x8, 0x2, 0x0000000011b2b2da, 0x10a24740461d524f, 0x0000000000c20000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with dataset: sbox32
+ // result rd:x10(0x00000000c0ca02e6), rs1=>rd:x10(0x546b0e54528a10af), rs2:x7(0x00000000c3000000), imm:0x3
+ TEST_RI_OP(sm4ks, x10, x7, 0x3, 0x00000000c0ca02e6, 0x546b0e54528a10af, 0x00000000c3000000, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with dataset: sbox32
+ // result rd:x11(0x00000000810ca678), rs1=>rd:x11(0x73a92fd4e19bfbc3), rs2:x6(0x00000000000000c4), imm:0x0
+ TEST_RI_OP(sm4ks, x11, x6, 0x0, 0x00000000810ca678, 0x73a92fd4e19bfbc3, 0x00000000000000c4, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with dataset: sbox32
+ // result rd:x12(0x00000000eb142f60), rs1=>rd:x12(0x82f6747f707af2c0), rs2:x5(0x000000000000c500), imm:0x1
+ TEST_RI_OP(sm4ks, x12, x5, 0x1, 0x00000000eb142f60, 0x82f6747f707af2c0, 0x000000000000c500, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with dataset: sbox32
+ // result rd:x13(0x00000000fac1904c), rs1=>rd:x13(0xf5adb41aa47d105b), rs2:x4(0x0000000000c60000), imm:0x2
+ TEST_RI_OP(sm4ks, x13, x4, 0x2, 0x00000000fac1904c, 0xf5adb41aa47d105b, 0x0000000000c60000, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with dataset: sbox32
+ // result rd:x14(0x000000006dfb431c), rs1=>rd:x14(0xdf7f3844121bcc23), rs2:x3(0x00000000c7000000), imm:0x3
+ TEST_RI_OP(sm4ks, x14, x3, 0x3, 0x000000006dfb431c, 0xdf7f3844121bcc23, 0x00000000c7000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with dataset: sbox32
+ // result rd:x15(0x000000008d685984), rs1=>rd:x15(0x10fd3dedadea5195), rs2:x2(0x00000000000000c8), imm:0x0
+ TEST_RI_OP(sm4ks, x15, x2, 0x0, 0x000000008d685984, 0x10fd3dedadea5195, 0x00000000000000c8, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with dataset: sbox32
+ // result rd:x16(0x00000000499367e1), rs1=>rd:x16(0xbd295ce2d2ffbec1), rs2:x1(0x000000000000c900), imm:0x1
+ TEST_RI_OP(sm4ks, x16, x1, 0x1, 0x00000000499367e1, 0xbd295ce2d2ffbec1, 0x000000000000c900, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with dataset: sbox32
+ // result rd:x17(0x0000000086bd28b0), rs1=>rd:x17(0xc9649f05a8e1a8bb), rs2:x31(0x0000000000ca0000), imm:0x2
+ TEST_RI_OP(sm4ks, x17, x31, 0x2, 0x0000000086bd28b0, 0xc9649f05a8e1a8bb, 0x0000000000ca0000, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with dataset: sbox32
+ // result rd:x18(0x0000000009e917eb), rs1=>rd:x18(0x3541291848c99fcb), rs2:x30(0x00000000cb000000), imm:0x3
+ TEST_RI_OP(sm4ks, x18, x30, 0x3, 0x0000000009e917eb, 0x3541291848c99fcb, 0x00000000cb000000, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with dataset: sbox32
+ // result rd:x19(0x00000000a69e5d50), rs1=>rd:x19(0x10a24740461d524f), rs2:x29(0x00000000000000cc), imm:0x0
+ TEST_RI_OP(sm4ks, x19, x29, 0x0, 0x00000000a69e5d50, 0x10a24740461d524f, 0x00000000000000cc, x3, 32, x4)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with dataset: sbox32
+ // result rd:x20(0x00000000508200af), rs1=>rd:x20(0x546b0e54528a10af), rs2:x28(0x000000000000cd00), imm:0x1
+ TEST_RI_OP(sm4ks, x20, x28, 0x1, 0x00000000508200af, 0x546b0e54528a10af, 0x000000000000cd00, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with dataset: sbox32
+ // result rd:x21(0x00000000ccc1bbc8), rs1=>rd:x21(0x73a92fd4e19bfbc3), rs2:x27(0x0000000000ce0000), imm:0x2
+ TEST_RI_OP(sm4ks, x21, x27, 0x2, 0x00000000ccc1bbc8, 0x73a92fd4e19bfbc3, 0x0000000000ce0000, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with dataset: sbox32
+ // result rd:x22(0x00000000a87ae9ac), rs1=>rd:x22(0x82f6747f707af2c0), rs2:x26(0x00000000cf000000), imm:0x3
+ TEST_RI_OP(sm4ks, x22, x26, 0x3, 0x00000000a87ae9ac, 0x82f6747f707af2c0, 0x00000000cf000000, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with dataset: sbox32
+ // result rd:x23(0x00000000e47c1551), rs1=>rd:x23(0xf5adb41aa47d105b), rs2:x25(0x00000000000000d0), imm:0x0
+ TEST_RI_OP(sm4ks, x23, x25, 0x0, 0x00000000e47c1551, 0xf5adb41aa47d105b, 0x00000000000000d0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with dataset: sbox32
+ // result rd:x24(0x0000000098601020), rs1=>rd:x24(0xdf7f3844121bcc23), rs2:x24(0x000000000000d100), imm:0x1
+ TEST_RI_OP(sm4ks, x24, x24, 0x1, 0x0000000098601020, 0xdf7f3844121bcc23, 0x000000000000d100, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with dataset: sbox32
+ // result rd:x25(0x00000000b5db7113), rs1=>rd:x25(0x10fd3dedadea5195), rs2:x23(0x0000000000d20000), imm:0x2
+ TEST_RI_OP(sm4ks, x25, x23, 0x2, 0x00000000b5db7113, 0x10fd3dedadea5195, 0x0000000000d20000, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with dataset: sbox32
+ // result rd:x26(0x000000005affaf85), rs1=>rd:x26(0xbd295ce2d2ffbec1), rs2:x22(0x00000000d3000000), imm:0x3
+ TEST_RI_OP(sm4ks, x26, x22, 0x3, 0x000000005affaf85, 0xbd295ce2d2ffbec1, 0x00000000d3000000, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with dataset: sbox32
+ // result rd:x27(0x000000000875fa1e), rs1=>rd:x27(0xc9649f05a8e1a8bb), rs2:x21(0x00000000000000d4), imm:0x0
+ TEST_RI_OP(sm4ks, x27, x21, 0x0, 0x000000000875fa1e, 0xc9649f05a8e1a8bb, 0x00000000000000d4, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with dataset: sbox32
+ // result rd:x28(0x00000000d1af526b), rs1=>rd:x28(0x3541291848c99fcb), rs2:x20(0x000000000000d500), imm:0x1
+ TEST_RI_OP(sm4ks, x28, x20, 0x1, 0x00000000d1af526b, 0x3541291848c99fcb, 0x000000000000d500, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with dataset: sbox32
+ // result rd:x29(0x000000007b6632c0), rs1=>rd:x29(0x10a24740461d524f), rs2:x19(0x0000000000d60000), imm:0x2
+ TEST_RI_OP(sm4ks, x29, x19, 0x2, 0x000000007b6632c0, 0x10a24740461d524f, 0x0000000000d60000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with dataset: sbox32
+ // result rd:x30(0x00000000ef2a87f1), rs1=>rd:x30(0x546b0e54528a10af), rs2:x18(0x00000000d7000000), imm:0x3
+ TEST_RI_OP(sm4ks, x30, x18, 0x3, 0x00000000ef2a87f1, 0x546b0e54528a10af, 0x00000000d7000000, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with dataset: sbox32
+ // result rd:x31(0x00000000411eedee), rs1=>rd:x31(0x73a92fd4e19bfbc3), rs2:x17(0x00000000000000d8), imm:0x0
+ TEST_RI_OP(sm4ks, x31, x17, 0x0, 0x00000000411eedee, 0x73a92fd4e19bfbc3, 0x00000000000000d8, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with dataset: sbox32
+ // result rd:x1(0x000000007e408640), rs1=>rd:x1(0x82f6747f707af2c0), rs2:x16(0x000000000000d900), imm:0x1
+ TEST_RI_OP(sm4ks, x1, x16, 0x1, 0x000000007e408640, 0x82f6747f707af2c0, 0x000000000000d900, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with dataset: sbox32
+ // result rd:x2(0x00000000ccad1041), rs1=>rd:x2(0xf5adb41aa47d105b), rs2:x15(0x0000000000da0000), imm:0x2
+ TEST_RI_OP(sm4ks, x2, x15, 0x2, 0x00000000ccad1041, 0xf5adb41aa47d105b, 0x0000000000da0000, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with dataset: sbox32
+ // result rd:x3(0x00000000005bce2a), rs1=>rd:x3(0xdf7f3844121bcc23), rs2:x14(0x00000000db000000), imm:0x3
+ TEST_RI_OP(sm4ks, x3, x14, 0x3, 0x00000000005bce2a, 0xdf7f3844121bcc23, 0x00000000db000000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with dataset: sbox32
+ // result rd:x4(0x00000000adfd0d2d), rs1=>rd:x4(0x10fd3dedadea5195), rs2:x13(0x00000000000000dc), imm:0x0
+ TEST_RI_OP(sm4ks, x4, x13, 0x0, 0x00000000adfd0d2d, 0x10fd3dedadea5195, 0x00000000000000dc, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with dataset: sbox32
+ // result rd:x5(0x000000004e8d5b61), rs1=>rd:x5(0xbd295ce2d2ffbec1), rs2:x12(0x000000000000dd00), imm:0x1
+ TEST_RI_OP(sm4ks, x5, x12, 0x1, 0x000000004e8d5b61, 0xbd295ce2d2ffbec1, 0x000000000000dd00, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with dataset: sbox32
+ // result rd:x6(0x00000000f25528ad), rs1=>rd:x6(0xc9649f05a8e1a8bb), rs2:x11(0x0000000000de0000), imm:0x2
+ TEST_RI_OP(sm4ks, x6, x11, 0x2, 0x00000000f25528ad, 0xc9649f05a8e1a8bb, 0x0000000000de0000, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with dataset: sbox32
+ // result rd:x7(0x00000000f8c98993), rs1=>rd:x7(0x3541291848c99fcb), rs2:x10(0x00000000df000000), imm:0x3
+ TEST_RI_OP(sm4ks, x7, x10, 0x3, 0x00000000f8c98993, 0x3541291848c99fcb, 0x00000000df000000, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with dataset: sbox32
+ // result rd:x8(0x00000000668c16c6), rs1=>rd:x8(0x10a24740461d524f), rs2:x9(0x00000000000000e0), imm:0x0
+ TEST_RI_OP(sm4ks, x8, x9, 0x0, 0x00000000668c16c6, 0x10a24740461d524f, 0x00000000000000e0, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with dataset: sbox32
+ // result rd:x9(0x00000000dfbe798f), rs1=>rd:x9(0x546b0e54528a10af), rs2:x8(0x000000000000e100), imm:0x1
+ TEST_RI_OP(sm4ks, x9, x8, 0x1, 0x00000000dfbe798f, 0x546b0e54528a10af, 0x000000000000e100, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with dataset: sbox32
+ // result rd:x10(0x00000000aa0c1b51), rs1=>rd:x10(0x73a92fd4e19bfbc3), rs2:x7(0x0000000000e20000), imm:0x2
+ TEST_RI_OP(sm4ks, x10, x7, 0x2, 0x00000000aa0c1b51, 0x73a92fd4e19bfbc3, 0x0000000000e20000, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with dataset: sbox32
+ // result rd:x11(0x000000003a3afbe5), rs1=>rd:x11(0x82f6747f707af2c0), rs2:x6(0x00000000e3000000), imm:0x3
+ TEST_RI_OP(sm4ks, x11, x6, 0x3, 0x000000003a3afbe5, 0x82f6747f707af2c0, 0x00000000e3000000, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with dataset: sbox32
+ // result rd:x12(0x00000000247c1657), rs1=>rd:x12(0xf5adb41aa47d105b), rs2:x5(0x00000000000000e4), imm:0x0
+ TEST_RI_OP(sm4ks, x12, x5, 0x0, 0x00000000247c1657, 0xf5adb41aa47d105b, 0x00000000000000e4, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with dataset: sbox32
+ // result rd:x13(0x0000000000505ae3), rs1=>rd:x13(0xdf7f3844121bcc23), rs2:x4(0x000000000000e500), imm:0x1
+ TEST_RI_OP(sm4ks, x13, x4, 0x1, 0x0000000000505ae3, 0xdf7f3844121bcc23, 0x000000000000e500, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with dataset: sbox32
+ // result rd:x14(0x00000000969db11b), rs1=>rd:x14(0x10fd3dedadea5195), rs2:x3(0x0000000000e60000), imm:0x2
+ TEST_RI_OP(sm4ks, x14, x3, 0x2, 0x00000000969db11b, 0x10fd3dedadea5195, 0x0000000000e60000, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with dataset: sbox32
+ // result rd:x15(0x00000000ac3fb1fe), rs1=>rd:x15(0xbd295ce2d2ffbec1), rs2:x2(0x00000000e7000000), imm:0x3
+ TEST_RI_OP(sm4ks, x15, x2, 0x3, 0x00000000ac3fb1fe, 0xbd295ce2d2ffbec1, 0x00000000e7000000, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with dataset: sbox32
+ // result rd:x16(0x00000000086d9ade), rs1=>rd:x16(0xc9649f05a8e1a8bb), rs2:x1(0x00000000000000e8), imm:0x0
+ TEST_RI_OP(sm4ks, x16, x1, 0x0, 0x00000000086d9ade, 0xc9649f05a8e1a8bb, 0x00000000000000e8, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with dataset: sbox32
+ // result rd:x17(0x00000000df9526eb), rs1=>rd:x17(0x3541291848c99fcb), rs2:x31(0x000000000000e900), imm:0x1
+ TEST_RI_OP(sm4ks, x17, x31, 0x1, 0x00000000df9526eb, 0x3541291848c99fcb, 0x000000000000e900, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with dataset: sbox32
+ // result rd:x18(0x000000003eec72d1), rs1=>rd:x18(0x10a24740461d524f), rs2:x30(0x0000000000ea0000), imm:0x2
+ TEST_RI_OP(sm4ks, x18, x30, 0x2, 0x000000003eec72d1, 0x10a24740461d524f, 0x0000000000ea0000, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with dataset: sbox32
+ // result rd:x19(0x000000005baa91ab), rs1=>rd:x19(0x546b0e54528a10af), rs2:x29(0x00000000eb000000), imm:0x3
+ TEST_RI_OP(sm4ks, x19, x29, 0x3, 0x000000005baa91ab, 0x546b0e54528a10af, 0x00000000eb000000, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with dataset: sbox32
+ // result rd:x20(0x0000000041039906), rs1=>rd:x20(0x73a92fd4e19bfbc3), rs2:x28(0x00000000000000ec), imm:0x0
+ TEST_RI_OP(sm4ks, x20, x28, 0x0, 0x0000000041039906, 0x73a92fd4e19bfbc3, 0x00000000000000ec, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with dataset: sbox32
+ // result rd:x21(0x000000007d4d9c00), rs1=>rd:x21(0x82f6747f707af2c0), rs2:x27(0x000000000000ed00), imm:0x1
+ TEST_RI_OP(sm4ks, x21, x27, 0x1, 0x000000007d4d9c00, 0x82f6747f707af2c0, 0x000000000000ed00, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with dataset: sbox32
+ // result rd:x22(0x00000000c7bbd043), rs1=>rd:x22(0xf5adb41aa47d105b), rs2:x26(0x0000000000ee0000), imm:0x2
+ TEST_RI_OP(sm4ks, x22, x26, 0x2, 0x00000000c7bbd043, 0xf5adb41aa47d105b, 0x0000000000ee0000, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with dataset: sbox32
+ // result rd:x23(0x00000000969bdc61), rs1=>rd:x23(0xdf7f3844121bcc23), rs2:x25(0x00000000ef000000), imm:0x3
+ TEST_RI_OP(sm4ks, x23, x25, 0x3, 0x00000000969bdc61, 0xdf7f3844121bcc23, 0x00000000ef000000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with dataset: sbox32
+ // result rd:x24(0x0000000000030ce8), rs1=>rd:x24(0x10fd3dedadea5195), rs2:x24(0x00000000000000f0), imm:0x0
+ TEST_RI_OP(sm4ks, x24, x24, 0x0, 0x0000000000030ce8, 0x10fd3dedadea5195, 0x00000000000000f0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with dataset: sbox32
+ // result rd:x25(0x00000000cc874ec1), rs1=>rd:x25(0xbd295ce2d2ffbec1), rs2:x23(0x000000000000f100), imm:0x1
+ TEST_RI_OP(sm4ks, x25, x23, 0x1, 0x00000000cc874ec1, 0xbd295ce2d2ffbec1, 0x000000000000f100, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with dataset: sbox32
+ // result rd:x26(0x00000000969c0834), rs1=>rd:x26(0xc9649f05a8e1a8bb), rs2:x22(0x0000000000f20000), imm:0x2
+ TEST_RI_OP(sm4ks, x26, x22, 0x2, 0x00000000969c0834, 0xc9649f05a8e1a8bb, 0x0000000000f20000, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with dataset: sbox32
+ // result rd:x27(0x00000000a44982bd), rs1=>rd:x27(0x3541291848c99fcb), rs2:x21(0x00000000f3000000), imm:0x3
+ TEST_RI_OP(sm4ks, x27, x21, 0x3, 0x00000000a44982bd, 0x3541291848c99fcb, 0x00000000f3000000, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with dataset: sbox32
+ // result rd:x28(0x00000000061a4f75), rs1=>rd:x28(0x10a24740461d524f), rs2:x20(0x00000000000000f4), imm:0x0
+ TEST_RI_OP(sm4ks, x28, x20, 0x0, 0x00000000061a4f75, 0x10a24740461d524f, 0x00000000000000f4, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with dataset: sbox32
+ // result rd:x29(0x0000000049e4cc2f), rs1=>rd:x29(0x546b0e54528a10af), rs2:x19(0x000000000000f500), imm:0x1
+ TEST_RI_OP(sm4ks, x29, x19, 0x1, 0x0000000049e4cc2f, 0x546b0e54528a10af, 0x000000000000f500, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with dataset: sbox32
+ // result rd:x30(0x00000000c7d65b4a), rs1=>rd:x30(0x73a92fd4e19bfbc3), rs2:x18(0x0000000000f60000), imm:0x2
+ TEST_RI_OP(sm4ks, x30, x18, 0x2, 0x00000000c7d65b4a, 0x73a92fd4e19bfbc3, 0x0000000000f60000, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with dataset: sbox32
+ // result rd:x31(0x00000000507af6d0), rs1=>rd:x31(0x82f6747f707af2c0), rs2:x17(0x00000000f7000000), imm:0x3
+ TEST_RI_OP(sm4ks, x31, x17, 0x3, 0x00000000507af6d0, 0x82f6747f707af2c0, 0x00000000f7000000, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with dataset: sbox32
+ // result rd:x1(0x0000000084f22c22), rs1=>rd:x1(0xf5adb41aa47d105b), rs2:x16(0x00000000000000f8), imm:0x0
+ TEST_RI_OP(sm4ks, x1, x16, 0x0, 0x0000000084f22c22, 0xf5adb41aa47d105b, 0x00000000000000f8, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with dataset: sbox32
+ // result rd:x2(0x000000000f6c22e3), rs1=>rd:x2(0xdf7f3844121bcc23), rs2:x15(0x000000000000f900), imm:0x1
+ TEST_RI_OP(sm4ks, x2, x15, 0x1, 0x000000000f6c22e3, 0xdf7f3844121bcc23, 0x000000000000f900, x4, 32, x5)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with dataset: sbox32
+ // result rd:x3(0x0000000082b5b11e), rs1=>rd:x3(0x10fd3dedadea5195), rs2:x14(0x0000000000fa0000), imm:0x2
+ TEST_RI_OP(sm4ks, x3, x14, 0x2, 0x0000000082b5b11e, 0x10fd3dedadea5195, 0x0000000000fa0000, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with dataset: sbox32
+ // result rd:x4(0x00000000ec3fb9de), rs1=>rd:x4(0xbd295ce2d2ffbec1), rs2:x13(0x00000000fb000000), imm:0x3
+ TEST_RI_OP(sm4ks, x4, x13, 0x3, 0x00000000ec3fb9de, 0xbd295ce2d2ffbec1, 0x00000000fb000000, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with dataset: sbox32
+ // result rd:x5(0x00000000487bc36c), rs1=>rd:x5(0xc9649f05a8e1a8bb), rs2:x12(0x00000000000000fc), imm:0x0
+ TEST_RI_OP(sm4ks, x5, x12, 0x0, 0x00000000487bc36c, 0xc9649f05a8e1a8bb, 0x00000000000000fc, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with dataset: sbox32
+ // result rd:x6(0x00000000d1ac54ab), rs1=>rd:x6(0x3541291848c99fcb), rs2:x11(0x000000000000fd00), imm:0x1
+ TEST_RI_OP(sm4ks, x6, x11, 0x1, 0x00000000d1ac54ab, 0x3541291848c99fcb, 0x000000000000fd00, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with dataset: sbox32
+ // result rd:x7(0x000000005a2472c8), rs1=>rd:x7(0x10a24740461d524f), rs2:x10(0x0000000000fe0000), imm:0x2
+ TEST_RI_OP(sm4ks, x7, x10, 0x2, 0x000000005a2472c8, 0x10a24740461d524f, 0x0000000000fe0000, x1, 32, x2)
+
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with dataset: sbox32
+ // result rd:x8(0x000000001a8a198b), rs1=>rd:x8(0x546b0e54528a10af), rs2:x9(0x00000000ff000000), imm:0x3
+ TEST_RI_OP(sm4ks, x8, x9, 0x3, 0x000000001a8a198b, 0x546b0e54528a10af, 0x00000000ff000000, x1, 0, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/XNOR-01.S b/riscof/suite/rv64i_m/K_unratified/XNOR-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..5cc8e6e32c050f2124e5412595a47052e12df5ac
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/XNOR-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test XNOR-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'xnor'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",xnor)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",xnor)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",xnor)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x307dfa56400e6249), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(xnor, x1, x31, x16, 0x307dfa56400e6249, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xb77b1707897d5165), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(xnor, x2, x30, x15, 0xb77b1707897d5165, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0xb46d14852764a584), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(xnor, x3, x29, x14, 0xb46d14852764a584, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0xb917f93356ad9bf7), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(xnor, x4, x28, x13, 0xb917f93356ad9bf7, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0xbb36b6ebeb68bd1f), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(xnor, x5, x27, x12, 0xbb36b6ebeb68bd1f, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xbb36b6ebeb68bd1f), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(xnor, x6, x26, x11, 0xbb36b6ebeb68bd1f, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xb917f93356ad9bf7), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(xnor, x7, x25, x10, 0xb917f93356ad9bf7, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0xb46d14852764a584), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(xnor, x8, x24, x9, 0xb46d14852764a584, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xb77b1707897d5165), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(xnor, x9, x23, x8, 0xb77b1707897d5165, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x307dfa56400e6249), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(xnor, x10, x22, x7, 0x307dfa56400e6249, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000001), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(xnor, x11, x21, x6, 0x0000000000000001, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x8000000000000002), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(xnor, x12, x20, x5, 0x8000000000000002, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x4000000000000004), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(xnor, x13, x19, x4, 0x4000000000000004, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x2000000000000008), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(xnor, x14, x18, x3, 0x2000000000000008, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x1000000000000010), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(xnor, x15, x17, x2, 0x1000000000000010, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0800000000000020), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(xnor, x16, x16, x1, 0x0800000000000020, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0400000000000040), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(xnor, x17, x15, x31, 0x0400000000000040, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0200000000000080), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(xnor, x18, x14, x30, 0x0200000000000080, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0100000000000100), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(xnor, x19, x13, x29, 0x0100000000000100, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0080000000000200), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(xnor, x20, x12, x28, 0x0080000000000200, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0040000000000400), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(xnor, x21, x11, x27, 0x0040000000000400, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0020000000000800), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(xnor, x22, x10, x26, 0x0020000000000800, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0010000000001000), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(xnor, x23, x9, x25, 0x0010000000001000, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0008000000002000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(xnor, x24, x8, x24, 0x0008000000002000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0004000000004000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(xnor, x25, x7, x23, 0x0004000000004000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0002000000008000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(xnor, x26, x6, x22, 0x0002000000008000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0001000000010000), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(xnor, x27, x5, x21, 0x0001000000010000, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000800000020000), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(xnor, x28, x4, x20, 0x0000800000020000, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000400000040000), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(xnor, x29, x3, x19, 0x0000400000040000, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000200000080000), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(xnor, x30, x2, x18, 0x0000200000080000, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000100000100000), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(xnor, x31, x1, x17, 0x0000100000100000, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000080000200000), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(xnor, x1, x31, x16, 0x0000080000200000, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000040000400000), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(xnor, x2, x30, x15, 0x0000040000400000, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000020000800000), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(xnor, x3, x29, x14, 0x0000020000800000, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000010001000000), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(xnor, x4, x28, x13, 0x0000010001000000, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000008002000000), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(xnor, x5, x27, x12, 0x0000008002000000, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000004004000000), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(xnor, x6, x26, x11, 0x0000004004000000, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000002008000000), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(xnor, x7, x25, x10, 0x0000002008000000, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000001010000000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(xnor, x8, x24, x9, 0x0000001010000000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000820000000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(xnor, x9, x23, x8, 0x0000000820000000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000440000000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(xnor, x10, x22, x7, 0x0000000440000000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000280000000), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(xnor, x11, x21, x6, 0x0000000280000000, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(xnor, x12, x20, x5, 0x0000000000000000, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000280000000), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(xnor, x13, x19, x4, 0x0000000280000000, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000440000000), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(xnor, x14, x18, x3, 0x0000000440000000, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000820000000), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(xnor, x15, x17, x2, 0x0000000820000000, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000001010000000), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(xnor, x16, x16, x1, 0x0000001010000000, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000002008000000), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(xnor, x17, x15, x31, 0x0000002008000000, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000004004000000), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(xnor, x18, x14, x30, 0x0000004004000000, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000008002000000), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(xnor, x19, x13, x29, 0x0000008002000000, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000010001000000), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(xnor, x20, x12, x28, 0x0000010001000000, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000020000800000), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(xnor, x21, x11, x27, 0x0000020000800000, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000040000400000), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(xnor, x22, x10, x26, 0x0000040000400000, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000080000200000), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(xnor, x23, x9, x25, 0x0000080000200000, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000100000100000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(xnor, x24, x8, x24, 0x0000100000100000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000200000080000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(xnor, x25, x7, x23, 0x0000200000080000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000400000040000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(xnor, x26, x6, x22, 0x0000400000040000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000800000020000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(xnor, x27, x5, x21, 0x0000800000020000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0001000000010000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(xnor, x28, x4, x20, 0x0001000000010000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0002000000008000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(xnor, x29, x3, x19, 0x0002000000008000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0004000000004000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(xnor, x30, x2, x18, 0x0004000000004000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0008000000002000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(xnor, x31, x1, x17, 0x0008000000002000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0010000000001000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(xnor, x1, x31, x16, 0x0010000000001000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0020000000000800), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(xnor, x2, x30, x15, 0x0020000000000800, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0040000000000400), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(xnor, x3, x29, x14, 0x0040000000000400, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0080000000000200), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(xnor, x4, x28, x13, 0x0080000000000200, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0100000000000100), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(xnor, x5, x27, x12, 0x0100000000000100, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0200000000000080), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(xnor, x6, x26, x11, 0x0200000000000080, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0400000000000040), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(xnor, x7, x25, x10, 0x0400000000000040, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0800000000000020), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(xnor, x8, x24, x9, 0x0800000000000020, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x1000000000000010), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(xnor, x9, x23, x8, 0x1000000000000010, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x2000000000000008), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(xnor, x10, x22, x7, 0x2000000000000008, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x4000000000000004), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(xnor, x11, x21, x6, 0x4000000000000004, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x8000000000000002), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(xnor, x12, x20, x5, 0x8000000000000002, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000001), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(xnor, x13, x19, x4, 0x0000000000000001, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000001), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xnor, x14, x18, x3, 0x0000000000000001, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x8000000000000002), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(xnor, x15, x17, x2, 0x8000000000000002, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x4000000000000004), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(xnor, x16, x16, x1, 0x4000000000000004, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x2000000000000008), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(xnor, x17, x15, x31, 0x2000000000000008, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x1000000000000010), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(xnor, x18, x14, x30, 0x1000000000000010, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x0800000000000020), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(xnor, x19, x13, x29, 0x0800000000000020, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0x0400000000000040), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(xnor, x20, x12, x28, 0x0400000000000040, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0x0200000000000080), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(xnor, x21, x11, x27, 0x0200000000000080, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0x0100000000000100), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(xnor, x22, x10, x26, 0x0100000000000100, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0x0080000000000200), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(xnor, x23, x9, x25, 0x0080000000000200, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0x0040000000000400), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(xnor, x24, x8, x24, 0x0040000000000400, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0x0020000000000800), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(xnor, x25, x7, x23, 0x0020000000000800, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0x0010000000001000), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(xnor, x26, x6, x22, 0x0010000000001000, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0x0008000000002000), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(xnor, x27, x5, x21, 0x0008000000002000, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0x0004000000004000), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(xnor, x28, x4, x20, 0x0004000000004000, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0x0002000000008000), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(xnor, x29, x3, x19, 0x0002000000008000, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0x0001000000010000), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(xnor, x30, x2, x18, 0x0001000000010000, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0x0000800000020000), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(xnor, x31, x1, x17, 0x0000800000020000, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0x0000400000040000), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(xnor, x1, x31, x16, 0x0000400000040000, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0x0000200000080000), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(xnor, x2, x30, x15, 0x0000200000080000, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0x0000100000100000), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(xnor, x3, x29, x14, 0x0000100000100000, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0x0000080000200000), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(xnor, x4, x28, x13, 0x0000080000200000, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0x0000040000400000), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(xnor, x5, x27, x12, 0x0000040000400000, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0x0000020000800000), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(xnor, x6, x26, x11, 0x0000020000800000, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0x0000010001000000), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(xnor, x7, x25, x10, 0x0000010001000000, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0x0000008002000000), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(xnor, x8, x24, x9, 0x0000008002000000, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0x0000004004000000), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(xnor, x9, x23, x8, 0x0000004004000000, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0x0000002008000000), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(xnor, x10, x22, x7, 0x0000002008000000, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0x0000001010000000), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(xnor, x11, x21, x6, 0x0000001010000000, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0x0000000820000000), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(xnor, x12, x20, x5, 0x0000000820000000, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0x0000000440000000), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(xnor, x13, x19, x4, 0x0000000440000000, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0x0000000280000000), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(xnor, x14, x18, x3, 0x0000000280000000, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(xnor, x15, x17, x2, 0x0000000000000000, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0x0000000280000000), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(xnor, x16, x16, x1, 0x0000000280000000, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0x0000000440000000), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(xnor, x17, x15, x31, 0x0000000440000000, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0x0000000820000000), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(xnor, x18, x14, x30, 0x0000000820000000, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0x0000001010000000), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(xnor, x19, x13, x29, 0x0000001010000000, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0x0000002008000000), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(xnor, x20, x12, x28, 0x0000002008000000, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0x0000004004000000), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(xnor, x21, x11, x27, 0x0000004004000000, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0x0000008002000000), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(xnor, x22, x10, x26, 0x0000008002000000, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0x0000010001000000), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(xnor, x23, x9, x25, 0x0000010001000000, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0x0000020000800000), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(xnor, x24, x8, x24, 0x0000020000800000, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0x0000040000400000), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(xnor, x25, x7, x23, 0x0000040000400000, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0x0000080000200000), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(xnor, x26, x6, x22, 0x0000080000200000, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0x0000100000100000), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(xnor, x27, x5, x21, 0x0000100000100000, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0x0000200000080000), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(xnor, x28, x4, x20, 0x0000200000080000, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0x0000400000040000), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(xnor, x29, x3, x19, 0x0000400000040000, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0x0000800000020000), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(xnor, x30, x2, x18, 0x0000800000020000, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0x0001000000010000), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(xnor, x31, x1, x17, 0x0001000000010000, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0x0002000000008000), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(xnor, x1, x31, x16, 0x0002000000008000, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0x0004000000004000), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(xnor, x2, x30, x15, 0x0004000000004000, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0x0008000000002000), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(xnor, x3, x29, x14, 0x0008000000002000, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0x0010000000001000), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(xnor, x4, x28, x13, 0x0010000000001000, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0x0020000000000800), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(xnor, x5, x27, x12, 0x0020000000000800, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0x0040000000000400), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(xnor, x6, x26, x11, 0x0040000000000400, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0x0080000000000200), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(xnor, x7, x25, x10, 0x0080000000000200, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0x0100000000000100), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(xnor, x8, x24, x9, 0x0100000000000100, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0x0200000000000080), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(xnor, x9, x23, x8, 0x0200000000000080, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0x0400000000000040), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(xnor, x10, x22, x7, 0x0400000000000040, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0x0800000000000020), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(xnor, x11, x21, x6, 0x0800000000000020, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0x1000000000000010), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(xnor, x12, x20, x5, 0x1000000000000010, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0x2000000000000008), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(xnor, x13, x19, x4, 0x2000000000000008, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0x4000000000000004), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(xnor, x14, x18, x3, 0x4000000000000004, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0x8000000000000002), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(xnor, x15, x17, x2, 0x8000000000000002, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000001), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(xnor, x16, x16, x1, 0x0000000000000001, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0xfffffffffffffffe), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xnor, x17, x15, x31, 0xfffffffffffffffe, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0xfffffffffffffffd), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xnor, x18, x14, x30, 0xfffffffffffffffd, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0xfffffffffffffffb), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xnor, x19, x13, x29, 0xfffffffffffffffb, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0xfffffffffffffff7), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xnor, x20, x12, x28, 0xfffffffffffffff7, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffef), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xnor, x21, x11, x27, 0xffffffffffffffef, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffdf), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xnor, x22, x10, x26, 0xffffffffffffffdf, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffbf), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(xnor, x23, x9, x25, 0xffffffffffffffbf, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffff7f), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(xnor, x24, x8, x24, 0xffffffffffffff7f, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0xfffffffffffffeff), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(xnor, x25, x7, x23, 0xfffffffffffffeff, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0xfffffffffffffdff), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(xnor, x26, x6, x22, 0xfffffffffffffdff, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0xfffffffffffffbff), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(xnor, x27, x5, x21, 0xfffffffffffffbff, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0xfffffffffffff7ff), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(xnor, x28, x4, x20, 0xfffffffffffff7ff, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffefff), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(xnor, x29, x3, x19, 0xffffffffffffefff, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffdfff), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(xnor, x30, x2, x18, 0xffffffffffffdfff, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffbfff), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(xnor, x31, x1, x17, 0xffffffffffffbfff, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffff7fff), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(xnor, x1, x31, x16, 0xffffffffffff7fff, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0xfffffffffffeffff), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(xnor, x2, x30, x15, 0xfffffffffffeffff, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0xfffffffffffdffff), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(xnor, x3, x29, x14, 0xfffffffffffdffff, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0xfffffffffffbffff), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(xnor, x4, x28, x13, 0xfffffffffffbffff, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0xfffffffffff7ffff), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(xnor, x5, x27, x12, 0xfffffffffff7ffff, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffefffff), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(xnor, x6, x26, x11, 0xffffffffffefffff, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffdfffff), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(xnor, x7, x25, x10, 0xffffffffffdfffff, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffbfffff), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(xnor, x8, x24, x9, 0xffffffffffbfffff, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0xffffffffff7fffff), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(xnor, x9, x23, x8, 0xffffffffff7fffff, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0xfffffffffeffffff), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(xnor, x10, x22, x7, 0xfffffffffeffffff, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0xfffffffffdffffff), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(xnor, x11, x21, x6, 0xfffffffffdffffff, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0xfffffffffbffffff), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(xnor, x12, x20, x5, 0xfffffffffbffffff, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0xfffffffff7ffffff), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(xnor, x13, x19, x4, 0xfffffffff7ffffff, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0xffffffffefffffff), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xnor, x14, x18, x3, 0xffffffffefffffff, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0xffffffffdfffffff), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(xnor, x15, x17, x2, 0xffffffffdfffffff, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0xffffffffbfffffff), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(xnor, x16, x16, x1, 0xffffffffbfffffff, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0xffffffff7fffffff), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xnor, x17, x15, x31, 0xffffffff7fffffff, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0xfffffffeffffffff), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xnor, x18, x14, x30, 0xfffffffeffffffff, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0xfffffffdffffffff), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xnor, x19, x13, x29, 0xfffffffdffffffff, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0xfffffffbffffffff), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xnor, x20, x12, x28, 0xfffffffbffffffff, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0xfffffff7ffffffff), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xnor, x21, x11, x27, 0xfffffff7ffffffff, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0xffffffefffffffff), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xnor, x22, x10, x26, 0xffffffefffffffff, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0xffffffdfffffffff), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(xnor, x23, x9, x25, 0xffffffdfffffffff, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0xffffffbfffffffff), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(xnor, x24, x8, x24, 0xffffffbfffffffff, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0xffffff7fffffffff), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(xnor, x25, x7, x23, 0xffffff7fffffffff, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0xfffffeffffffffff), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(xnor, x26, x6, x22, 0xfffffeffffffffff, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0xfffffdffffffffff), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(xnor, x27, x5, x21, 0xfffffdffffffffff, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0xfffffbffffffffff), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(xnor, x28, x4, x20, 0xfffffbffffffffff, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0xfffff7ffffffffff), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(xnor, x29, x3, x19, 0xfffff7ffffffffff, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0xffffefffffffffff), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(xnor, x30, x2, x18, 0xffffefffffffffff, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0xffffdfffffffffff), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(xnor, x31, x1, x17, 0xffffdfffffffffff, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0xffffbfffffffffff), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(xnor, x1, x31, x16, 0xffffbfffffffffff, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0xffff7fffffffffff), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(xnor, x2, x30, x15, 0xffff7fffffffffff, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0xfffeffffffffffff), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(xnor, x3, x29, x14, 0xfffeffffffffffff, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0xfffdffffffffffff), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(xnor, x4, x28, x13, 0xfffdffffffffffff, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0xfffbffffffffffff), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(xnor, x5, x27, x12, 0xfffbffffffffffff, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0xfff7ffffffffffff), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(xnor, x6, x26, x11, 0xfff7ffffffffffff, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0xffefffffffffffff), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(xnor, x7, x25, x10, 0xffefffffffffffff, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0xffdfffffffffffff), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(xnor, x8, x24, x9, 0xffdfffffffffffff, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0xffbfffffffffffff), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(xnor, x9, x23, x8, 0xffbfffffffffffff, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0xff7fffffffffffff), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(xnor, x10, x22, x7, 0xff7fffffffffffff, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0xfeffffffffffffff), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(xnor, x11, x21, x6, 0xfeffffffffffffff, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0xfdffffffffffffff), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(xnor, x12, x20, x5, 0xfdffffffffffffff, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0xfbffffffffffffff), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(xnor, x13, x19, x4, 0xfbffffffffffffff, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0xf7ffffffffffffff), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xnor, x14, x18, x3, 0xf7ffffffffffffff, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0xefffffffffffffff), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(xnor, x15, x17, x2, 0xefffffffffffffff, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0xdfffffffffffffff), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(xnor, x16, x16, x1, 0xdfffffffffffffff, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0xbfffffffffffffff), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xnor, x17, x15, x31, 0xbfffffffffffffff, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x7fffffffffffffff), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xnor, x18, x14, x30, 0x7fffffffffffffff, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xnor, x19, x13, x29, 0xffffffffffffffff, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000001), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xnor, x20, x12, x28, 0x0000000000000001, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000002), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xnor, x21, x11, x27, 0x0000000000000002, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000004), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xnor, x22, x10, x26, 0x0000000000000004, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000008), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(xnor, x23, x9, x25, 0x0000000000000008, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000010), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(xnor, x24, x8, x24, 0x0000000000000010, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000020), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(xnor, x25, x7, x23, 0x0000000000000020, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000040), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(xnor, x26, x6, x22, 0x0000000000000040, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000080), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(xnor, x27, x5, x21, 0x0000000000000080, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000100), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(xnor, x28, x4, x20, 0x0000000000000100, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000200), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(xnor, x29, x3, x19, 0x0000000000000200, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000400), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(xnor, x30, x2, x18, 0x0000000000000400, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000800), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(xnor, x31, x1, x17, 0x0000000000000800, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0x0000000000001000), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(xnor, x1, x31, x16, 0x0000000000001000, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0x0000000000002000), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(xnor, x2, x30, x15, 0x0000000000002000, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0x0000000000004000), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(xnor, x3, x29, x14, 0x0000000000004000, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0x0000000000008000), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(xnor, x4, x28, x13, 0x0000000000008000, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0x0000000000010000), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(xnor, x5, x27, x12, 0x0000000000010000, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0x0000000000020000), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(xnor, x6, x26, x11, 0x0000000000020000, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0x0000000000040000), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(xnor, x7, x25, x10, 0x0000000000040000, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0x0000000000080000), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(xnor, x8, x24, x9, 0x0000000000080000, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0x0000000000100000), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(xnor, x9, x23, x8, 0x0000000000100000, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0x0000000000200000), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(xnor, x10, x22, x7, 0x0000000000200000, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0x0000000000400000), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(xnor, x11, x21, x6, 0x0000000000400000, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0x0000000000800000), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(xnor, x12, x20, x5, 0x0000000000800000, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0x0000000001000000), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(xnor, x13, x19, x4, 0x0000000001000000, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0x0000000002000000), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xnor, x14, x18, x3, 0x0000000002000000, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0x0000000004000000), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(xnor, x15, x17, x2, 0x0000000004000000, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0x0000000008000000), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(xnor, x16, x16, x1, 0x0000000008000000, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0x0000000010000000), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xnor, x17, x15, x31, 0x0000000010000000, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0x0000000020000000), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xnor, x18, x14, x30, 0x0000000020000000, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0x0000000040000000), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xnor, x19, x13, x29, 0x0000000040000000, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0x0000000080000000), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xnor, x20, x12, x28, 0x0000000080000000, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0x0000000100000000), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xnor, x21, x11, x27, 0x0000000100000000, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0x0000000200000000), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xnor, x22, x10, x26, 0x0000000200000000, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0x0000000400000000), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(xnor, x23, x9, x25, 0x0000000400000000, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0x0000000800000000), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(xnor, x24, x8, x24, 0x0000000800000000, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0x0000001000000000), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(xnor, x25, x7, x23, 0x0000001000000000, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0x0000002000000000), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(xnor, x26, x6, x22, 0x0000002000000000, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0x0000004000000000), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(xnor, x27, x5, x21, 0x0000004000000000, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0x0000008000000000), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(xnor, x28, x4, x20, 0x0000008000000000, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0x0000010000000000), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(xnor, x29, x3, x19, 0x0000010000000000, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0x0000020000000000), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(xnor, x30, x2, x18, 0x0000020000000000, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0x0000040000000000), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(xnor, x31, x1, x17, 0x0000040000000000, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0x0000080000000000), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(xnor, x1, x31, x16, 0x0000080000000000, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0x0000100000000000), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(xnor, x2, x30, x15, 0x0000100000000000, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0x0000200000000000), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(xnor, x3, x29, x14, 0x0000200000000000, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0x0000400000000000), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(xnor, x4, x28, x13, 0x0000400000000000, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0x0000800000000000), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(xnor, x5, x27, x12, 0x0000800000000000, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0x0001000000000000), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(xnor, x6, x26, x11, 0x0001000000000000, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0x0002000000000000), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(xnor, x7, x25, x10, 0x0002000000000000, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0x0004000000000000), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(xnor, x8, x24, x9, 0x0004000000000000, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0x0008000000000000), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(xnor, x9, x23, x8, 0x0008000000000000, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0x0010000000000000), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(xnor, x10, x22, x7, 0x0010000000000000, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0x0020000000000000), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(xnor, x11, x21, x6, 0x0020000000000000, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0x0040000000000000), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(xnor, x12, x20, x5, 0x0040000000000000, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0x0080000000000000), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(xnor, x13, x19, x4, 0x0080000000000000, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0x0100000000000000), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xnor, x14, x18, x3, 0x0100000000000000, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0x0200000000000000), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(xnor, x15, x17, x2, 0x0200000000000000, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0x0400000000000000), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(xnor, x16, x16, x1, 0x0400000000000000, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0x0800000000000000), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xnor, x17, x15, x31, 0x0800000000000000, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0x1000000000000000), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xnor, x18, x14, x30, 0x1000000000000000, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0x2000000000000000), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xnor, x19, x13, x29, 0x2000000000000000, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0x4000000000000000), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xnor, x20, x12, x28, 0x4000000000000000, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0x8000000000000000), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xnor, x21, x11, x27, 0x8000000000000000, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xnor, x22, x10, x26, 0x0000000000000000, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0xffffffffffffffff), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(xnor, x23, x25, x25, 0xffffffffffffffff, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(xnor, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0x369b60fa571e5744), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(xnor, x25, x7, x0, 0x369b60fa571e5744, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x8c56d02b1e64043c), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(xnor, x26, x0, x22, 0x8c56d02b1e64043c, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/XPERM-B-01.S b/riscof/suite/rv64i_m/K_unratified/XPERM-B-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..16c7658c15e0c0b348069374bff4ec9b72c73211
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/XPERM-B-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test XPERM-B-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'xperm.b'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",xperm.b)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",xperm.b)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",xperm.b)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0x0000000000000000), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0x0000000000000000, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0x0000000000000000), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x0000000000000000), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0x0000000000000000, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x0000000000000000), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0x0000000000000000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x0000000000000000), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0x0000000000000000, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0x0000000000000000), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0x0000000000000000, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0x0000000000000000), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0x0000000000000000, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x0000007400000000), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0x0000007400000000, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0x0000000000000000), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0x0000000000000000, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x0000000000000000), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0x0000000000000000, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0x0000000000000000, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0x0000000000000000, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0x0000000000000000, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0x0000000000000000, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0x0000000000000000, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0x0000000000000000, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0x0000000000000000, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0x0000000000000000, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(xperm.b, x19, x13, x29, 0x0000000000000000, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(xperm.b, x20, x12, x28, 0x0000000000000000, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(xperm.b, x21, x11, x27, 0x0000000000000000, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(xperm.b, x22, x10, x26, 0x0000000000000000, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(xperm.b, x23, x9, x25, 0x0000000000000000, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(xperm.b, x24, x8, x24, 0x0000000000000000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(xperm.b, x25, x7, x23, 0x0000000000000000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(xperm.b, x26, x6, x22, 0x0000000000000000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(xperm.b, x27, x5, x21, 0x0000000000000000, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(xperm.b, x28, x4, x20, 0x0000000000000000, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(xperm.b, x29, x3, x19, 0x0000000000000000, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(xperm.b, x30, x2, x18, 0x0000000000000000, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(xperm.b, x31, x1, x17, 0x0000000000000000, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0x0000000000000000, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0x0000000000000000, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0x0000000000000000, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0x0000000000000000, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0x0000000000000000, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0x0000000000000000, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0x0000000000000000, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0x0000000000000000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0x0000000000000000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0x0000000000000000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0x0000000000000000, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0x0000000000000000, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0x0000000000000000, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0x0000000000000000, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0x0000000000000000, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0x0000000000000000, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0x0000000000000000, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0x0000000000000000, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(xperm.b, x19, x13, x29, 0x0000000000000000, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(xperm.b, x20, x12, x28, 0x0000000000000000, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(xperm.b, x21, x11, x27, 0x0000000000000000, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(xperm.b, x22, x10, x26, 0x0000000000000000, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(xperm.b, x23, x9, x25, 0x0000000000000000, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(xperm.b, x24, x8, x24, 0x0000000000000000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(xperm.b, x25, x7, x23, 0x0000000000000000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(xperm.b, x26, x6, x22, 0x0000000000000000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(xperm.b, x27, x5, x21, 0x0000000000000000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(xperm.b, x28, x4, x20, 0x0000000000000000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(xperm.b, x29, x3, x19, 0x0000000000000000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(xperm.b, x30, x2, x18, 0x0000000000000000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(xperm.b, x31, x1, x17, 0x0000000000000000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0x0000000000000000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0x0000000000000000, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0x0000000000000000, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0x0000000000000000, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0x0000000000000000, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0x0000000000000000, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0x0000000000000000, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0x0000000000000000, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0x0000000000000000, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0x0000000000000000, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0x0000000000000000, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0x0000000000000000, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0x0000000000000000, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xfefefefefefefefe), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0xfefefefefefefefe, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0x00fdfdfdfdfdfdfd), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0x00fdfdfdfdfdfdfd, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0x00fbfbfbfbfbfbfb), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0x00fbfbfbfbfbfbfb, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0x00f7f7f7f7f7f7f7), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0x00f7f7f7f7f7f7f7, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0x00efefefefefefef), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0x00efefefefefefef, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0x00dfdfdfdfdfdfdf), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(xperm.b, x19, x13, x29, 0x00dfdfdfdfdfdfdf, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xffbfbfbfbfbfbfbf), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(xperm.b, x20, x12, x28, 0xffbfbfbfbfbfbfbf, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xff7f7f7f7f7f7f7f), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(xperm.b, x21, x11, x27, 0xff7f7f7f7f7f7f7f, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xfeffffffffffffff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(xperm.b, x22, x10, x26, 0xfeffffffffffffff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xff00ffffffffffff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(xperm.b, x23, x9, x25, 0xff00ffffffffffff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xff00ffffffffffff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(xperm.b, x24, x8, x24, 0xff00ffffffffffff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xff00ffffffffffff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(xperm.b, x25, x7, x23, 0xff00ffffffffffff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xff00ffffffffffff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(xperm.b, x26, x6, x22, 0xff00ffffffffffff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xff00ffffffffffff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(xperm.b, x27, x5, x21, 0xff00ffffffffffff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(xperm.b, x28, x4, x20, 0xffffffffffffffff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(xperm.b, x29, x3, x19, 0xffffffffffffffff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(xperm.b, x30, x2, x18, 0xffffffffffffffff, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xffff00ffffffffff), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(xperm.b, x31, x1, x17, 0xffff00ffffffffff, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xffff00ffffffffff), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0xffff00ffffffffff, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xffff00ffffffffff), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0xffff00ffffffffff, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xffff00ffffffffff), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0xffff00ffffffffff, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffff00ffffffffff), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0xffff00ffffffffff, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0xffffffffffffffff, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xffff7fffffffffff), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0xffff7fffffffffff, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0xffffffffffffffff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xffffff00ffffffff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0xffffff00ffffffff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xffffff00ffffffff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0xffffff00ffffffff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xffffff00ffffffff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0xffffff00ffffffff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffff00ffffffff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0xffffff00ffffffff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffffff00ffffffff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0xffffff00ffffffff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0xffffffffffffffff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0xffffffffffffffff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0xffffffffffffffff, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xffffffff00ffffff), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0xffffffff00ffffff, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xffffffff00ffffff), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0xffffffff00ffffff, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xffffffff00ffffff), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0xffffffff00ffffff, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffff00ffffff), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(xperm.b, x19, x13, x29, 0xffffffff00ffffff, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffff00ffffff), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(xperm.b, x20, x12, x28, 0xffffffff00ffffff, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffffbfffffff), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(xperm.b, x21, x11, x27, 0xffffffffbfffffff, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(xperm.b, x22, x10, x26, 0xffffffffffffffff, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(xperm.b, x23, x9, x25, 0xffffffffffffffff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffffffff00ffff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(xperm.b, x24, x8, x24, 0xffffffffff00ffff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffffff00ffff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(xperm.b, x25, x7, x23, 0xffffffffff00ffff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffffffff00ffff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(xperm.b, x26, x6, x22, 0xffffffffff00ffff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffffffff00ffff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(xperm.b, x27, x5, x21, 0xffffffffff00ffff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffffffff00ffff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(xperm.b, x28, x4, x20, 0xffffffffff00ffff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(xperm.b, x29, x3, x19, 0xffffffffffffffff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(xperm.b, x30, x2, x18, 0xffffffffffffffff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(xperm.b, x31, x1, x17, 0xffffffffffffffff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffff00ff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0xffffffffffff00ff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffff00ff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0xffffffffffff00ff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffff00ff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0xffffffffffff00ff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffff00ff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0xffffffffffff00ff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffff00ff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0xffffffffffff00ff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0xffffffffffffffff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0xffffffffffffffff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0xffffffffffffffff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffff00), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0xffffffffffffff00, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffff00), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0xffffffffffffff00, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffff00), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0xffffffffffffff00, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffff00), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0xffffffffffffff00, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffff00), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0xffffffffffffff00, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0xffffffffffffffff, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0xffffffffffffffff, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0xffffffffffffffff, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x0101010101010101), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0x0101010101010101, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x0202020202020202), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0x0202020202020202, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x0404040404040404), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x19, x13, x29, 0x0404040404040404, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x0808080808080808), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x20, x12, x28, 0x0808080808080808, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x1010101010101010), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x21, x11, x27, 0x1010101010101010, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x2020202020202020), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x22, x10, x26, 0x2020202020202020, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x4040404040404040), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x23, x9, x25, 0x4040404040404040, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x8080808080808080), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x24, x8, x24, 0x8080808080808080, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x25, x7, x23, 0x0000000000000000, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x26, x6, x22, 0x0000000000000000, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x27, x5, x21, 0x0000000000000000, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x28, x4, x20, 0x0000000000000000, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x29, x3, x19, 0x0000000000000000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x30, x2, x18, 0x0000000000000000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x31, x1, x17, 0x0000000000000000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0x0000000000000000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0x0000000000000000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0x0000000000000000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0x0000000000000000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0x0000000000000000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0x0000000000000000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0x0000000000000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0x0000000000000000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0x0000000000000000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0x0000000000000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0x0000000000000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0x0000000000000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0x0000000000000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0x0000000000000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0x0000000000000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0x0000000000000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0x0000000000000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0x0000000000000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x19, x13, x29, 0x0000000000000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x20, x12, x28, 0x0000000000000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x21, x11, x27, 0x0000000000000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x22, x10, x26, 0x0000000000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x23, x9, x25, 0x0000000000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x24, x8, x24, 0x0000000000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x25, x7, x23, 0x0000000000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x26, x6, x22, 0x0000000000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x27, x5, x21, 0x0000000000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x28, x4, x20, 0x0000000000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x29, x3, x19, 0x0000000000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x30, x2, x18, 0x0000000000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x31, x1, x17, 0x0000000000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0x0000000000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0x0000000000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0x0000000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0x0000000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0x0000000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0x0000000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0x0000000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0x0000000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0x0000000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0x0000000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0x0000000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0x0000000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0x0000000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0x0000000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0x0000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0x0000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0x0000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0x0000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xfefefefefefefefe), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x20, x12, x28, 0xfefefefefefefefe, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xfdfdfdfdfdfdfdfd), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x21, x11, x27, 0xfdfdfdfdfdfdfdfd, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xfbfbfbfbfbfbfbfb), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x22, x10, x26, 0xfbfbfbfbfbfbfbfb, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0xf7f7f7f7f7f7f7f7), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x23, x9, x25, 0xf7f7f7f7f7f7f7f7, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xefefefefefefefef), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x24, x8, x24, 0xefefefefefefefef, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xdfdfdfdfdfdfdfdf), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x25, x7, x23, 0xdfdfdfdfdfdfdfdf, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xbfbfbfbfbfbfbfbf), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x26, x6, x22, 0xbfbfbfbfbfbfbfbf, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0x7f7f7f7f7f7f7f7f), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x27, x5, x21, 0x7f7f7f7f7f7f7f7f, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x28, x4, x20, 0xffffffffffffffff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x29, x3, x19, 0xffffffffffffffff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x30, x2, x18, 0xffffffffffffffff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x31, x1, x17, 0xffffffffffffffff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0xffffffffffffffff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0xffffffffffffffff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0xffffffffffffffff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0xffffffffffffffff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0xffffffffffffffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0xffffffffffffffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0xffffffffffffffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0xffffffffffffffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0xffffffffffffffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0xffffffffffffffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0xffffffffffffffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0xffffffffffffffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0xffffffffffffffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0xffffffffffffffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0xffffffffffffffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0xffffffffffffffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0xffffffffffffffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0xffffffffffffffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x19, x13, x29, 0xffffffffffffffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x20, x12, x28, 0xffffffffffffffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x21, x11, x27, 0xffffffffffffffff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x22, x10, x26, 0xffffffffffffffff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x23, x9, x25, 0xffffffffffffffff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x24, x8, x24, 0xffffffffffffffff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x25, x7, x23, 0xffffffffffffffff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x26, x6, x22, 0xffffffffffffffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x27, x5, x21, 0xffffffffffffffff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x28, x4, x20, 0xffffffffffffffff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x29, x3, x19, 0xffffffffffffffff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x30, x2, x18, 0xffffffffffffffff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x31, x1, x17, 0xffffffffffffffff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x1, x31, x16, 0xffffffffffffffff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x2, x30, x15, 0xffffffffffffffff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x3, x29, x14, 0xffffffffffffffff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x4, x28, x13, 0xffffffffffffffff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x5, x27, x12, 0xffffffffffffffff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x6, x26, x11, 0xffffffffffffffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x7, x25, x10, 0xffffffffffffffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x8, x24, x9, 0xffffffffffffffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x9, x23, x8, 0xffffffffffffffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x10, x22, x7, 0xffffffffffffffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x11, x21, x6, 0xffffffffffffffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x12, x20, x5, 0xffffffffffffffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x13, x19, x4, 0xffffffffffffffff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x14, x18, x3, 0xffffffffffffffff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x15, x17, x2, 0xffffffffffffffff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x16, x16, x1, 0xffffffffffffffff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x17, x15, x31, 0xffffffffffffffff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x18, x14, x30, 0xffffffffffffffff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x19, x13, x29, 0xffffffffffffffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x20, x12, x28, 0xffffffffffffffff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x21, x11, x27, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xperm.b, x22, x10, x26, 0xffffffffffffffff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x0000000000000000), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(xperm.b, x23, x25, x25, 0x0000000000000000, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(xperm.b, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xbbbbbbbbbbbbbbbb), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(xperm.b, x25, x7, x0, 0xbbbbbbbbbbbbbbbb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(xperm.b, x26, x0, x22, 0x0000000000000000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/K_unratified/XPERM-N-01.S b/riscof/suite/rv64i_m/K_unratified/XPERM-N-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..9d7f44086eb16f9e0cc352feaa6a3357779e47f0
--- /dev/null
+++ b/riscof/suite/rv64i_m/K_unratified/XPERM-N-01.S
@@ -0,0 +1,1839 @@
+// RISC-V Architectural Validation Test XPERM-N-01
+//
+//
+// Copyright (c) 2021 Imperas Software Ltd., www.imperas.com
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+// either express or implied.
+//
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//
+
+//
+// Specification: K Crypto/Scalar
+// Description: Testing instruction 'xperm.n'.
+
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IK")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+
+
+
+
+
+#ifdef TEST_CASE_1
+
+
+ RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",xperm.n)
+ RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zkn.*);def TEST_CASE_1=True;",xperm.n)
+ RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zks.*);def TEST_CASE_1=True;",xperm.n)
+
+ RVTEST_SIGBASE(x6,signature_1_0)
+
+
+inst_0:
+ // Test 0: Test with random values
+ // result rd:x1(0xf1a15daa9193dd15), rs1:x31(0x10fd3dedadea5195), rs2:x16(0xdf7f3844121bcc23)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0xf1a15daa9193dd15, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x6, 0, x7)
+
+inst_1:
+ // Test 1: Test with random values
+ // result rd:x2(0xbfc25fcccfd2c1f5), rs1:x30(0xbd295ce2d2ffbec1), rs2:x15(0xf5adb41aa47d105b)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0xbfc25fcccfd2c1f5, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x6, 8, x7)
+
+inst_2:
+ // Test 2: Test with random values
+ // result rd:x3(0x58c8a1acabafc84b), rs1:x29(0xc9649f05a8e1a8bb), rs2:x14(0x82f6747f707af2c0)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0x58c8a1acabafc84b, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x6, 16, x7)
+
+inst_3:
+ // Test 3: Test with random values
+ // result rd:x4(0x4991f3495c123219), rs1:x28(0x3541291848c99fcb), rs2:x13(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0x4991f3495c123219, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x6, 24, x7)
+
+inst_4:
+ // Test 4: Test with random values
+ // result rd:x5(0x1d64f01d12074f71), rs1:x27(0x10a24740461d524f), rs2:x12(0x546b0e54528a10af)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0x1d64f01d12074f71, 0x10a24740461d524f, 0x546b0e54528a10af, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_2_0)
+
+
+inst_5:
+ // Test 5: Test with random values
+ // result rd:x6(0xafe0a5afa2a680a5), rs1:x26(0x546b0e54528a10af), rs2:x11(0x10a24740461d524f)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0xafe0a5afa2a680a5, 0x546b0e54528a10af, 0x10a24740461d524f, x1, 0, x2)
+
+inst_6:
+ // Test 6: Test with random values
+ // result rd:x7(0xf9bcbdc4b49dd792), rs1:x25(0x73a92fd4e19bfbc3), rs2:x10(0x3541291848c99fcb)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0xf9bcbdc4b49dd792, 0x73a92fd4e19bfbc3, 0x3541291848c99fcb, x1, 8, x2)
+
+inst_7:
+ // Test 7: Test with random values
+ // result rd:x8(0x670a78074f2c4f77), rs1:x24(0x82f6747f707af2c0), rs2:x9(0xc9649f05a8e1a8bb)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0x670a78074f2c4f77, 0x82f6747f707af2c0, 0xc9649f05a8e1a8bb, x1, 16, x2)
+
+inst_8:
+ // Test 8: Test with random values
+ // result rd:x9(0xba017d50a0ffb5d5), rs1:x23(0xf5adb41aa47d105b), rs2:x8(0xbd295ce2d2ffbec1)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0xba017d50a0ffb5d5, 0xf5adb41aa47d105b, 0xbd295ce2d2ffbec1, x1, 24, x2)
+
+inst_9:
+ // Test 9: Test with random values
+ // result rd:x10(0x23d7c7f787f81241), rs1:x22(0xdf7f3844121bcc23), rs2:x7(0x10fd3dedadea5195)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0x23d7c7f787f81241, 0xdf7f3844121bcc23, 0x10fd3dedadea5195, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_3_0)
+
+
+inst_10:
+ // Test 10: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000000000001), rs2:x6(0xffffffffffffffff)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0x0000000000000000, 0x1, 0xffffffffffffffff, x1, 0, x7)
+
+inst_11:
+ // Test 11: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000000000002), rs2:x5(0x7fffffffffffffff)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0x0000000000000000, 0x2, 0x7fffffffffffffff, x1, 8, x7)
+
+inst_12:
+ // Test 12: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000004), rs2:x4(0xbfffffffffffffff)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0x0000000000000000, 0x4, 0xbfffffffffffffff, x1, 16, x7)
+
+inst_13:
+ // Test 13: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000000000008), rs2:x3(0xdfffffffffffffff)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0x0000000000000000, 0x8, 0xdfffffffffffffff, x1, 24, x7)
+
+inst_14:
+ // Test 14: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000000000010), rs2:x2(0xefffffffffffffff)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0x0000000000000000, 0x10, 0xefffffffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_4_0)
+
+
+inst_15:
+ // Test 15: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000000000000020), rs2:x1(0xf7ffffffffffffff)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0x0000000000000000, 0x20, 0xf7ffffffffffffff, x2, 0, x3)
+
+inst_16:
+ // Test 16: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000000000040), rs2:x31(0xfbffffffffffffff)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0x0000000000000000, 0x40, 0xfbffffffffffffff, x2, 8, x3)
+
+inst_17:
+ // Test 17: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000000000080), rs2:x30(0xfdffffffffffffff)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0x0000000000000000, 0x80, 0xfdffffffffffffff, x2, 16, x3)
+
+inst_18:
+ // Test 18: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000100), rs2:x29(0xfeffffffffffffff)
+ TEST_RR_OP(xperm.n, x19, x13, x29, 0x0000000000000000, 0x100, 0xfeffffffffffffff, x2, 24, x3)
+
+inst_19:
+ // Test 19: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000000000200), rs2:x28(0xff7fffffffffffff)
+ TEST_RR_OP(xperm.n, x20, x12, x28, 0x0000000000000000, 0x200, 0xff7fffffffffffff, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_5_0)
+
+
+inst_20:
+ // Test 20: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000000000400), rs2:x27(0xffbfffffffffffff)
+ TEST_RR_OP(xperm.n, x21, x11, x27, 0x0000000000000000, 0x400, 0xffbfffffffffffff, x1, 0, x2)
+
+inst_21:
+ // Test 21: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000000000000800), rs2:x26(0xffdfffffffffffff)
+ TEST_RR_OP(xperm.n, x22, x10, x26, 0x0000000000000000, 0x800, 0xffdfffffffffffff, x1, 8, x2)
+
+inst_22:
+ // Test 22: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000000000001000), rs2:x25(0xffefffffffffffff)
+ TEST_RR_OP(xperm.n, x23, x9, x25, 0x0000000000000000, 0x1000, 0xffefffffffffffff, x1, 16, x2)
+
+inst_23:
+ // Test 23: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000000000002000), rs2:x24(0xfff7ffffffffffff)
+ TEST_RR_OP(xperm.n, x24, x8, x24, 0x0000000000000000, 0x2000, 0xfff7ffffffffffff, x1, 24, x2)
+
+inst_24:
+ // Test 24: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000000000004000), rs2:x23(0xfffbffffffffffff)
+ TEST_RR_OP(xperm.n, x25, x7, x23, 0x0000000000000000, 0x4000, 0xfffbffffffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_6_0)
+
+
+inst_25:
+ // Test 25: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000000000008000), rs2:x22(0xfffdffffffffffff)
+ TEST_RR_OP(xperm.n, x26, x6, x22, 0x0000000000000000, 0x8000, 0xfffdffffffffffff, x1, 0, x7)
+
+inst_26:
+ // Test 26: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000000000010000), rs2:x21(0xfffeffffffffffff)
+ TEST_RR_OP(xperm.n, x27, x5, x21, 0x0000000000000000, 0x10000, 0xfffeffffffffffff, x1, 8, x7)
+
+inst_27:
+ // Test 27: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000000000020000), rs2:x20(0xffff7fffffffffff)
+ TEST_RR_OP(xperm.n, x28, x4, x20, 0x0000000000000000, 0x20000, 0xffff7fffffffffff, x1, 16, x7)
+
+inst_28:
+ // Test 28: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000000000040000), rs2:x19(0xffffbfffffffffff)
+ TEST_RR_OP(xperm.n, x29, x3, x19, 0x0000000000000000, 0x40000, 0xffffbfffffffffff, x1, 24, x7)
+
+inst_29:
+ // Test 29: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000000000080000), rs2:x18(0xffffdfffffffffff)
+ TEST_RR_OP(xperm.n, x30, x2, x18, 0x0000000000000000, 0x80000, 0xffffdfffffffffff, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_7_0)
+
+
+inst_30:
+ // Test 30: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000000000100000), rs2:x17(0xffffefffffffffff)
+ TEST_RR_OP(xperm.n, x31, x1, x17, 0x0000000000000000, 0x100000, 0xffffefffffffffff, x5, 0, x6)
+
+inst_31:
+ // Test 31: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000000000200000), rs2:x16(0xfffff7ffffffffff)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0x0000000000000000, 0x200000, 0xfffff7ffffffffff, x5, 8, x6)
+
+inst_32:
+ // Test 32: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000000000400000), rs2:x15(0xfffffbffffffffff)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0x0000000000000000, 0x400000, 0xfffffbffffffffff, x5, 16, x6)
+
+inst_33:
+ // Test 33: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0000000000800000), rs2:x14(0xfffffdffffffffff)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0x0000000000000000, 0x800000, 0xfffffdffffffffff, x5, 24, x6)
+
+inst_34:
+ // Test 34: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0000000001000000), rs2:x13(0xfffffeffffffffff)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0x0000000000000000, 0x1000000, 0xfffffeffffffffff, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_8_0)
+
+
+inst_35:
+ // Test 35: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0000000002000000), rs2:x12(0xffffff7fffffffff)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0x0000000000000000, 0x2000000, 0xffffff7fffffffff, x1, 0, x2)
+
+inst_36:
+ // Test 36: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0000000004000000), rs2:x11(0xffffffbfffffffff)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0x0000000000000000, 0x4000000, 0xffffffbfffffffff, x1, 8, x2)
+
+inst_37:
+ // Test 37: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0000000008000000), rs2:x10(0xffffffdfffffffff)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0x0000000000000000, 0x8000000, 0xffffffdfffffffff, x1, 16, x2)
+
+inst_38:
+ // Test 38: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0000000010000000), rs2:x9(0xffffffefffffffff)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0x0000000000000000, 0x10000000, 0xffffffefffffffff, x1, 24, x2)
+
+inst_39:
+ // Test 39: Test with marching zeros/ones
+ // result rd:x9(0x0000000200000000), rs1:x23(0x0000000020000000), rs2:x8(0xfffffff7ffffffff)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0x0000000200000000, 0x20000000, 0xfffffff7ffffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_9_0)
+
+
+inst_40:
+ // Test 40: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0000000040000000), rs2:x7(0xfffffffbffffffff)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0x0000000000000000, 0x40000000, 0xfffffffbffffffff, x1, 0, x2)
+
+inst_41:
+ // Test 41: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000080000000), rs2:x6(0xfffffffdffffffff)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0x0000000000000000, 0x80000000, 0xfffffffdffffffff, x1, 8, x2)
+
+inst_42:
+ // Test 42: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000100000000), rs2:x5(0xfffffffeffffffff)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0x0000000000000000, 0x100000000, 0xfffffffeffffffff, x1, 16, x2)
+
+inst_43:
+ // Test 43: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000200000000), rs2:x4(0xffffffff7fffffff)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0x0000000000000000, 0x200000000, 0xffffffff7fffffff, x1, 24, x2)
+
+inst_44:
+ // Test 44: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000400000000), rs2:x3(0xffffffffbfffffff)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0x0000000000000000, 0x400000000, 0xffffffffbfffffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_10_0)
+
+
+inst_45:
+ // Test 45: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000800000000), rs2:x2(0xffffffffdfffffff)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0x0000000000000000, 0x800000000, 0xffffffffdfffffff, x3, 0, x4)
+
+inst_46:
+ // Test 46: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000001000000000), rs2:x1(0xffffffffefffffff)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0x0000000000000000, 0x1000000000, 0xffffffffefffffff, x3, 8, x4)
+
+inst_47:
+ // Test 47: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000002000000000), rs2:x31(0xfffffffff7ffffff)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0x0000000000000000, 0x2000000000, 0xfffffffff7ffffff, x3, 16, x4)
+
+inst_48:
+ // Test 48: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000004000000000), rs2:x30(0xfffffffffbffffff)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0x0000000000000000, 0x4000000000, 0xfffffffffbffffff, x3, 24, x4)
+
+inst_49:
+ // Test 49: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000008000000000), rs2:x29(0xfffffffffdffffff)
+ TEST_RR_OP(xperm.n, x19, x13, x29, 0x0000000000000000, 0x8000000000, 0xfffffffffdffffff, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_11_0)
+
+
+inst_50:
+ // Test 50: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000010000000000), rs2:x28(0xfffffffffeffffff)
+ TEST_RR_OP(xperm.n, x20, x12, x28, 0x0000000000000000, 0x10000000000, 0xfffffffffeffffff, x1, 0, x2)
+
+inst_51:
+ // Test 51: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000020000000000), rs2:x27(0xffffffffff7fffff)
+ TEST_RR_OP(xperm.n, x21, x11, x27, 0x0000000000000000, 0x20000000000, 0xffffffffff7fffff, x1, 8, x2)
+
+inst_52:
+ // Test 52: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000040000000000), rs2:x26(0xffffffffffbfffff)
+ TEST_RR_OP(xperm.n, x22, x10, x26, 0x0000000000000000, 0x40000000000, 0xffffffffffbfffff, x1, 16, x2)
+
+inst_53:
+ // Test 53: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000080000000000), rs2:x25(0xffffffffffdfffff)
+ TEST_RR_OP(xperm.n, x23, x9, x25, 0x0000000000000000, 0x80000000000, 0xffffffffffdfffff, x1, 24, x2)
+
+inst_54:
+ // Test 54: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000100000000000), rs2:x24(0xffffffffffefffff)
+ TEST_RR_OP(xperm.n, x24, x8, x24, 0x0000000000000000, 0x100000000000, 0xffffffffffefffff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_12_0)
+
+
+inst_55:
+ // Test 55: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000200000000000), rs2:x23(0xfffffffffff7ffff)
+ TEST_RR_OP(xperm.n, x25, x7, x23, 0x0000000000000000, 0x200000000000, 0xfffffffffff7ffff, x1, 0, x2)
+
+inst_56:
+ // Test 56: Test with marching zeros/ones
+ // result rd:x26(0x0000000000040000), rs1:x6(0x0000400000000000), rs2:x22(0xfffffffffffbffff)
+ TEST_RR_OP(xperm.n, x26, x6, x22, 0x0000000000040000, 0x400000000000, 0xfffffffffffbffff, x1, 8, x2)
+
+inst_57:
+ // Test 57: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000800000000000), rs2:x21(0xfffffffffffdffff)
+ TEST_RR_OP(xperm.n, x27, x5, x21, 0x0000000000000000, 0x800000000000, 0xfffffffffffdffff, x1, 16, x2)
+
+inst_58:
+ // Test 58: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0001000000000000), rs2:x20(0xfffffffffffeffff)
+ TEST_RR_OP(xperm.n, x28, x4, x20, 0x0000000000000000, 0x1000000000000, 0xfffffffffffeffff, x1, 24, x2)
+
+inst_59:
+ // Test 59: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0002000000000000), rs2:x19(0xffffffffffff7fff)
+ TEST_RR_OP(xperm.n, x29, x3, x19, 0x0000000000000000, 0x2000000000000, 0xffffffffffff7fff, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_13_0)
+
+
+inst_60:
+ // Test 60: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0004000000000000), rs2:x18(0xffffffffffffbfff)
+ TEST_RR_OP(xperm.n, x30, x2, x18, 0x0000000000000000, 0x4000000000000, 0xffffffffffffbfff, x4, 0, x5)
+
+inst_61:
+ // Test 61: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0008000000000000), rs2:x17(0xffffffffffffdfff)
+ TEST_RR_OP(xperm.n, x31, x1, x17, 0x0000000000000000, 0x8000000000000, 0xffffffffffffdfff, x4, 8, x5)
+
+inst_62:
+ // Test 62: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0010000000000000), rs2:x16(0xffffffffffffefff)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0x0000000000000000, 0x10000000000000, 0xffffffffffffefff, x4, 16, x5)
+
+inst_63:
+ // Test 63: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0020000000000000), rs2:x15(0xfffffffffffff7ff)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0x0000000000000000, 0x20000000000000, 0xfffffffffffff7ff, x4, 24, x5)
+
+inst_64:
+ // Test 64: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0040000000000000), rs2:x14(0xfffffffffffffbff)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0x0000000000000000, 0x40000000000000, 0xfffffffffffffbff, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_14_0)
+
+
+inst_65:
+ // Test 65: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000800), rs1:x28(0x0080000000000000), rs2:x13(0xfffffffffffffdff)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0x0000000000000800, 0x80000000000000, 0xfffffffffffffdff, x1, 0, x2)
+
+inst_66:
+ // Test 66: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000100), rs1:x27(0x0100000000000000), rs2:x12(0xfffffffffffffeff)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0x0000000000000100, 0x100000000000000, 0xfffffffffffffeff, x1, 8, x2)
+
+inst_67:
+ // Test 67: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0200000000000000), rs2:x11(0xffffffffffffff7f)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0x0000000000000000, 0x200000000000000, 0xffffffffffffff7f, x1, 16, x2)
+
+inst_68:
+ // Test 68: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0400000000000000), rs2:x10(0xffffffffffffffbf)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0x0000000000000000, 0x400000000000000, 0xffffffffffffffbf, x1, 24, x2)
+
+inst_69:
+ // Test 69: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0800000000000000), rs2:x9(0xffffffffffffffdf)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0x0000000000000000, 0x800000000000000, 0xffffffffffffffdf, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_15_0)
+
+
+inst_70:
+ // Test 70: Test with marching zeros/ones
+ // result rd:x9(0x1111111111111101), rs1:x23(0x1000000000000000), rs2:x8(0xffffffffffffffef)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0x1111111111111101, 0x1000000000000000, 0xffffffffffffffef, x1, 0, x2)
+
+inst_71:
+ // Test 71: Test with marching zeros/ones
+ // result rd:x10(0x2222222222222220), rs1:x22(0x2000000000000000), rs2:x7(0xfffffffffffffff7)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0x2222222222222220, 0x2000000000000000, 0xfffffffffffffff7, x1, 8, x2)
+
+inst_72:
+ // Test 72: Test with marching zeros/ones
+ // result rd:x11(0x4444444444444440), rs1:x21(0x4000000000000000), rs2:x6(0xfffffffffffffffb)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0x4444444444444440, 0x4000000000000000, 0xfffffffffffffffb, x1, 16, x2)
+
+inst_73:
+ // Test 73: Test with marching zeros/ones
+ // result rd:x12(0x8888888888888880), rs1:x20(0x8000000000000000), rs2:x5(0xfffffffffffffffd)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0x8888888888888880, 0x8000000000000000, 0xfffffffffffffffd, x1, 24, x2)
+
+inst_74:
+ // Test 74: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000000000000), rs2:x4(0xfffffffffffffffe)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0x0000000000000000, 0x0, 0xfffffffffffffffe, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_16_0)
+
+
+inst_75:
+ // Test 75: Test with marching zeros/ones
+ // result rd:x14(0xeeeeeeeeeeeeeeee), rs1:x18(0xfffffffffffffffe), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0xeeeeeeeeeeeeeeee, 0xfffffffffffffffe, 0x0, x4, 0, x5)
+
+inst_76:
+ // Test 76: Test with marching zeros/ones
+ // result rd:x15(0xfddddddddddddddd), rs1:x17(0xfffffffffffffffd), rs2:x2(0x8000000000000000)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0xfddddddddddddddd, 0xfffffffffffffffd, 0x8000000000000000, x4, 8, x5)
+
+inst_77:
+ // Test 77: Test with marching zeros/ones
+ // result rd:x16(0xfbbbbbbbbbbbbbbb), rs1:x16(0xfffffffffffffffb), rs2:x1(0x4000000000000000)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0xfbbbbbbbbbbbbbbb, 0xfffffffffffffffb, 0x4000000000000000, x4, 16, x5)
+
+inst_78:
+ // Test 78: Test with marching zeros/ones
+ // result rd:x17(0xf777777777777777), rs1:x15(0xfffffffffffffff7), rs2:x31(0x2000000000000000)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0xf777777777777777, 0xfffffffffffffff7, 0x2000000000000000, x4, 24, x5)
+
+inst_79:
+ // Test 79: Test with marching zeros/ones
+ // result rd:x18(0xefffffffffffffff), rs1:x14(0xffffffffffffffef), rs2:x30(0x1000000000000000)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0xefffffffffffffff, 0xffffffffffffffef, 0x1000000000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_17_0)
+
+
+inst_80:
+ // Test 80: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xffffffffffffffdf), rs2:x29(0x0800000000000000)
+ TEST_RR_OP(xperm.n, x19, x13, x29, 0xffffffffffffffff, 0xffffffffffffffdf, 0x800000000000000, x1, 0, x2)
+
+inst_81:
+ // Test 81: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xffffffffffffffbf), rs2:x28(0x0400000000000000)
+ TEST_RR_OP(xperm.n, x20, x12, x28, 0xffffffffffffffff, 0xffffffffffffffbf, 0x400000000000000, x1, 8, x2)
+
+inst_82:
+ // Test 82: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xffffffffffffff7f), rs2:x27(0x0200000000000000)
+ TEST_RR_OP(xperm.n, x21, x11, x27, 0xffffffffffffffff, 0xffffffffffffff7f, 0x200000000000000, x1, 16, x2)
+
+inst_83:
+ // Test 83: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xfffffffffffffeff), rs2:x26(0x0100000000000000)
+ TEST_RR_OP(xperm.n, x22, x10, x26, 0xffffffffffffffff, 0xfffffffffffffeff, 0x100000000000000, x1, 24, x2)
+
+inst_84:
+ // Test 84: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffffffffffdff), rs2:x25(0x0080000000000000)
+ TEST_RR_OP(xperm.n, x23, x9, x25, 0xffffffffffffffff, 0xfffffffffffffdff, 0x80000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_18_0)
+
+
+inst_85:
+ // Test 85: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xfffffffffffffbff), rs2:x24(0x0040000000000000)
+ TEST_RR_OP(xperm.n, x24, x8, x24, 0xffffffffffffffff, 0xfffffffffffffbff, 0x40000000000000, x1, 0, x2)
+
+inst_86:
+ // Test 86: Test with marching zeros/ones
+ // result rd:x25(0xff7fffffffffffff), rs1:x7(0xfffffffffffff7ff), rs2:x23(0x0020000000000000)
+ TEST_RR_OP(xperm.n, x25, x7, x23, 0xff7fffffffffffff, 0xfffffffffffff7ff, 0x20000000000000, x1, 8, x2)
+
+inst_87:
+ // Test 87: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xffffffffffffefff), rs2:x22(0x0010000000000000)
+ TEST_RR_OP(xperm.n, x26, x6, x22, 0xffffffffffffffff, 0xffffffffffffefff, 0x10000000000000, x1, 16, x2)
+
+inst_88:
+ // Test 88: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffffffffffdfff), rs2:x21(0x0008000000000000)
+ TEST_RR_OP(xperm.n, x27, x5, x21, 0xffffffffffffffff, 0xffffffffffffdfff, 0x8000000000000, x1, 24, x2)
+
+inst_89:
+ // Test 89: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffffffffffbfff), rs2:x20(0x0004000000000000)
+ TEST_RR_OP(xperm.n, x28, x4, x20, 0xffffffffffffffff, 0xffffffffffffbfff, 0x4000000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_19_0)
+
+
+inst_90:
+ // Test 90: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xffffffffffff7fff), rs2:x19(0x0002000000000000)
+ TEST_RR_OP(xperm.n, x29, x3, x19, 0xffffffffffffffff, 0xffffffffffff7fff, 0x2000000000000, x4, 0, x5)
+
+inst_91:
+ // Test 91: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xfffffffffffeffff), rs2:x18(0x0001000000000000)
+ TEST_RR_OP(xperm.n, x30, x2, x18, 0xffffffffffffffff, 0xfffffffffffeffff, 0x1000000000000, x4, 8, x5)
+
+inst_92:
+ // Test 92: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffffffffffdffff), rs2:x17(0x0000800000000000)
+ TEST_RR_OP(xperm.n, x31, x1, x17, 0xffffffffffffffff, 0xfffffffffffdffff, 0x800000000000, x4, 16, x5)
+
+inst_93:
+ // Test 93: Test with marching zeros/ones
+ // result rd:x1(0xffffbfffffffffff), rs1:x31(0xfffffffffffbffff), rs2:x16(0x0000400000000000)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0xffffbfffffffffff, 0xfffffffffffbffff, 0x400000000000, x4, 24, x5)
+
+inst_94:
+ // Test 94: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xfffffffffff7ffff), rs2:x15(0x0000200000000000)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0xffffffffffffffff, 0xfffffffffff7ffff, 0x200000000000, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_20_0)
+
+
+inst_95:
+ // Test 95: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xffffffffffefffff), rs2:x14(0x0000100000000000)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0xffffffffffffffff, 0xffffffffffefffff, 0x100000000000, x1, 0, x2)
+
+inst_96:
+ // Test 96: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffffffffffdfffff), rs2:x13(0x0000080000000000)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0xffffffffffffffff, 0xffffffffffdfffff, 0x80000000000, x1, 8, x2)
+
+inst_97:
+ // Test 97: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffffffffffbfffff), rs2:x12(0x0000040000000000)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0xffffffffffffffff, 0xffffffffffbfffff, 0x40000000000, x1, 16, x2)
+
+inst_98:
+ // Test 98: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xffffffffff7fffff), rs2:x11(0x0000020000000000)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0xffffffffffffffff, 0xffffffffff7fffff, 0x20000000000, x1, 24, x2)
+
+inst_99:
+ // Test 99: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xfffffffffeffffff), rs2:x10(0x0000010000000000)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0xffffffffffffffff, 0xfffffffffeffffff, 0x10000000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_21_0)
+
+
+inst_100:
+ // Test 100: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfffffffffdffffff), rs2:x9(0x0000008000000000)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0xffffffffffffffff, 0xfffffffffdffffff, 0x8000000000, x1, 0, x2)
+
+inst_101:
+ // Test 101: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xfffffffffbffffff), rs2:x8(0x0000004000000000)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0xffffffffffffffff, 0xfffffffffbffffff, 0x4000000000, x1, 8, x2)
+
+inst_102:
+ // Test 102: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xfffffffff7ffffff), rs2:x7(0x0000002000000000)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0xffffffffffffffff, 0xfffffffff7ffffff, 0x2000000000, x1, 16, x2)
+
+inst_103:
+ // Test 103: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xffffffffefffffff), rs2:x6(0x0000001000000000)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0xffffffffffffffff, 0xffffffffefffffff, 0x1000000000, x1, 24, x2)
+
+inst_104:
+ // Test 104: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xffffffffdfffffff), rs2:x5(0x0000000800000000)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0xffffffffffffffff, 0xffffffffdfffffff, 0x800000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_22_0)
+
+
+inst_105:
+ // Test 105: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xffffffffbfffffff), rs2:x4(0x0000000400000000)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0xffffffffffffffff, 0xffffffffbfffffff, 0x400000000, x5, 0, x6)
+
+inst_106:
+ // Test 106: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xffffffff7fffffff), rs2:x3(0x0000000200000000)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0xffffffffffffffff, 0xffffffff7fffffff, 0x200000000, x5, 8, x6)
+
+inst_107:
+ // Test 107: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfffffffeffffffff), rs2:x2(0x0000000100000000)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0xffffffffffffffff, 0xfffffffeffffffff, 0x100000000, x5, 16, x6)
+
+inst_108:
+ // Test 108: Test with marching zeros/ones
+ // result rd:x16(0xffffffffdfffffff), rs1:x16(0xfffffffdffffffff), rs2:x1(0x0000000080000000)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0xffffffffdfffffff, 0xfffffffdffffffff, 0x80000000, x5, 24, x6)
+
+inst_109:
+ // Test 109: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xfffffffbffffffff), rs2:x31(0x0000000040000000)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0xffffffffffffffff, 0xfffffffbffffffff, 0x40000000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_23_0)
+
+
+inst_110:
+ // Test 110: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xfffffff7ffffffff), rs2:x30(0x0000000020000000)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0xffffffffffffffff, 0xfffffff7ffffffff, 0x20000000, x1, 0, x2)
+
+inst_111:
+ // Test 111: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xffffffefffffffff), rs2:x29(0x0000000010000000)
+ TEST_RR_OP(xperm.n, x19, x13, x29, 0xffffffffffffffff, 0xffffffefffffffff, 0x10000000, x1, 8, x2)
+
+inst_112:
+ // Test 112: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xffffffdfffffffff), rs2:x28(0x0000000008000000)
+ TEST_RR_OP(xperm.n, x20, x12, x28, 0xffffffffffffffff, 0xffffffdfffffffff, 0x8000000, x1, 16, x2)
+
+inst_113:
+ // Test 113: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xffffffbfffffffff), rs2:x27(0x0000000004000000)
+ TEST_RR_OP(xperm.n, x21, x11, x27, 0xffffffffffffffff, 0xffffffbfffffffff, 0x4000000, x1, 24, x2)
+
+inst_114:
+ // Test 114: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffff7fffffffff), rs2:x26(0x0000000002000000)
+ TEST_RR_OP(xperm.n, x22, x10, x26, 0xffffffffffffffff, 0xffffff7fffffffff, 0x2000000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_24_0)
+
+
+inst_115:
+ // Test 115: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffeffffffffff), rs2:x25(0x0000000001000000)
+ TEST_RR_OP(xperm.n, x23, x9, x25, 0xffffffffffffffff, 0xfffffeffffffffff, 0x1000000, x1, 0, x2)
+
+inst_116:
+ // Test 116: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xfffffdffffffffff), rs2:x24(0x0000000000800000)
+ TEST_RR_OP(xperm.n, x24, x8, x24, 0xffffffffffffffff, 0xfffffdffffffffff, 0x800000, x1, 8, x2)
+
+inst_117:
+ // Test 117: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xfffffbffffffffff), rs2:x23(0x0000000000400000)
+ TEST_RR_OP(xperm.n, x25, x7, x23, 0xffffffffffffffff, 0xfffffbffffffffff, 0x400000, x1, 16, x2)
+
+inst_118:
+ // Test 118: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xfffff7ffffffffff), rs2:x22(0x0000000000200000)
+ TEST_RR_OP(xperm.n, x26, x6, x22, 0xffffffffffffffff, 0xfffff7ffffffffff, 0x200000, x1, 24, x2)
+
+inst_119:
+ // Test 119: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffefffffffffff), rs2:x21(0x0000000000100000)
+ TEST_RR_OP(xperm.n, x27, x5, x21, 0xffffffffffffffff, 0xffffefffffffffff, 0x100000, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_25_0)
+
+
+inst_120:
+ // Test 120: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffdfffffffffff), rs2:x20(0x0000000000080000)
+ TEST_RR_OP(xperm.n, x28, x4, x20, 0xffffffffffffffff, 0xffffdfffffffffff, 0x80000, x5, 0, x6)
+
+inst_121:
+ // Test 121: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xffffbfffffffffff), rs2:x19(0x0000000000040000)
+ TEST_RR_OP(xperm.n, x29, x3, x19, 0xffffffffffffffff, 0xffffbfffffffffff, 0x40000, x5, 8, x6)
+
+inst_122:
+ // Test 122: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xffff7fffffffffff), rs2:x18(0x0000000000020000)
+ TEST_RR_OP(xperm.n, x30, x2, x18, 0xffffffffffffffff, 0xffff7fffffffffff, 0x20000, x5, 16, x6)
+
+inst_123:
+ // Test 123: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffeffffffffffff), rs2:x17(0x0000000000010000)
+ TEST_RR_OP(xperm.n, x31, x1, x17, 0xffffffffffffffff, 0xfffeffffffffffff, 0x10000, x5, 24, x6)
+
+inst_124:
+ // Test 124: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xfffdffffffffffff), rs2:x16(0x0000000000008000)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0xffffffffffffffff, 0xfffdffffffffffff, 0x8000, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_26_0)
+
+
+inst_125:
+ // Test 125: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xfffbffffffffffff), rs2:x15(0x0000000000004000)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0xffffffffffffffff, 0xfffbffffffffffff, 0x4000, x1, 0, x7)
+
+inst_126:
+ // Test 126: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xfff7ffffffffffff), rs2:x14(0x0000000000002000)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0xffffffffffffffff, 0xfff7ffffffffffff, 0x2000, x1, 8, x7)
+
+inst_127:
+ // Test 127: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffefffffffffffff), rs2:x13(0x0000000000001000)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0xffffffffffffffff, 0xffefffffffffffff, 0x1000, x1, 16, x7)
+
+inst_128:
+ // Test 128: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffdfffffffffffff), rs2:x12(0x0000000000000800)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0xffffffffffffffff, 0xffdfffffffffffff, 0x800, x1, 24, x7)
+
+inst_129:
+ // Test 129: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xffbfffffffffffff), rs2:x11(0x0000000000000400)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0xffffffffffffffff, 0xffbfffffffffffff, 0x400, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_27_0)
+
+
+inst_130:
+ // Test 130: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xff7fffffffffffff), rs2:x10(0x0000000000000200)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0xffffffffffffffff, 0xff7fffffffffffff, 0x200, x1, 0, x2)
+
+inst_131:
+ // Test 131: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfeffffffffffffff), rs2:x9(0x0000000000000100)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0xffffffffffffffff, 0xfeffffffffffffff, 0x100, x1, 8, x2)
+
+inst_132:
+ // Test 132: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xfdffffffffffffff), rs2:x8(0x0000000000000080)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0xffffffffffffffff, 0xfdffffffffffffff, 0x80, x1, 16, x2)
+
+inst_133:
+ // Test 133: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xfbffffffffffffff), rs2:x7(0x0000000000000040)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0xffffffffffffffff, 0xfbffffffffffffff, 0x40, x1, 24, x2)
+
+inst_134:
+ // Test 134: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xf7ffffffffffffff), rs2:x6(0x0000000000000020)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0xffffffffffffffff, 0xf7ffffffffffffff, 0x20, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_28_0)
+
+
+inst_135:
+ // Test 135: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xefffffffffffffff), rs2:x5(0x0000000000000010)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0xffffffffffffffff, 0xefffffffffffffff, 0x10, x6, 0, x7)
+
+inst_136:
+ // Test 136: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xdfffffffffffffff), rs2:x4(0x0000000000000008)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0xffffffffffffffff, 0xdfffffffffffffff, 0x8, x6, 8, x7)
+
+inst_137:
+ // Test 137: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xbfffffffffffffff), rs2:x3(0x0000000000000004)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0xffffffffffffffff, 0xbfffffffffffffff, 0x4, x6, 16, x7)
+
+inst_138:
+ // Test 138: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0x7fffffffffffffff), rs2:x2(0x0000000000000002)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0xffffffffffffffff, 0x7fffffffffffffff, 0x2, x6, 24, x7)
+
+inst_139:
+ // Test 139: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xffffffffffffffff), rs2:x1(0x0000000000000001)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0xffffffffffffffff, 0xffffffffffffffff, 0x1, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_29_0)
+
+
+inst_140:
+ // Test 140: Test with marching zeros/ones
+ // result rd:x17(0x1111111111111111), rs1:x15(0x0000000000000001), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0x1111111111111111, 0x1, 0x0, x1, 0, x2)
+
+inst_141:
+ // Test 141: Test with marching zeros/ones
+ // result rd:x18(0x2222222222222222), rs1:x14(0x0000000000000002), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0x2222222222222222, 0x2, 0x0, x1, 8, x2)
+
+inst_142:
+ // Test 142: Test with marching zeros/ones
+ // result rd:x19(0x4444444444444444), rs1:x13(0x0000000000000004), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x19, x13, x29, 0x4444444444444444, 0x4, 0x0, x1, 16, x2)
+
+inst_143:
+ // Test 143: Test with marching zeros/ones
+ // result rd:x20(0x8888888888888888), rs1:x12(0x0000000000000008), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x20, x12, x28, 0x8888888888888888, 0x8, 0x0, x1, 24, x2)
+
+inst_144:
+ // Test 144: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000000000010), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x21, x11, x27, 0x0000000000000000, 0x10, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_30_0)
+
+
+inst_145:
+ // Test 145: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000000000000020), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x22, x10, x26, 0x0000000000000000, 0x20, 0x0, x1, 0, x2)
+
+inst_146:
+ // Test 146: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000000000000040), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x23, x9, x25, 0x0000000000000000, 0x40, 0x0, x1, 8, x2)
+
+inst_147:
+ // Test 147: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000000000000080), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x24, x8, x24, 0x0000000000000000, 0x80, 0x0, x1, 16, x2)
+
+inst_148:
+ // Test 148: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000000000000100), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x25, x7, x23, 0x0000000000000000, 0x100, 0x0, x1, 24, x2)
+
+inst_149:
+ // Test 149: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000000000000200), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x26, x6, x22, 0x0000000000000000, 0x200, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x6,signature_31_0)
+
+
+inst_150:
+ // Test 150: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000000000000400), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x27, x5, x21, 0x0000000000000000, 0x400, 0x0, x6, 0, x7)
+
+inst_151:
+ // Test 151: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000000000000800), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x28, x4, x20, 0x0000000000000000, 0x800, 0x0, x6, 8, x7)
+
+inst_152:
+ // Test 152: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000000000001000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x29, x3, x19, 0x0000000000000000, 0x1000, 0x0, x6, 16, x7)
+
+inst_153:
+ // Test 153: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000000000002000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x30, x2, x18, 0x0000000000000000, 0x2000, 0x0, x6, 24, x7)
+
+inst_154:
+ // Test 154: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000000000004000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x31, x1, x17, 0x0000000000000000, 0x4000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x6,signature_32_0)
+
+
+inst_155:
+ // Test 155: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000000000008000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0x0000000000000000, 0x8000, 0x0, x6, 0, x7)
+
+inst_156:
+ // Test 156: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000000000010000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0x0000000000000000, 0x10000, 0x0, x6, 8, x7)
+
+inst_157:
+ // Test 157: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0000000000020000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0x0000000000000000, 0x20000, 0x0, x6, 16, x7)
+
+inst_158:
+ // Test 158: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0000000000040000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0x0000000000000000, 0x40000, 0x0, x6, 24, x7)
+
+inst_159:
+ // Test 159: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0000000000080000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0x0000000000000000, 0x80000, 0x0, x6, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x1,signature_33_0)
+
+
+inst_160:
+ // Test 160: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0000000000100000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0x0000000000000000, 0x100000, 0x0, x1, 0, x2)
+
+inst_161:
+ // Test 161: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0000000000200000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0x0000000000000000, 0x200000, 0x0, x1, 8, x2)
+
+inst_162:
+ // Test 162: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0000000000400000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0x0000000000000000, 0x400000, 0x0, x1, 16, x2)
+
+inst_163:
+ // Test 163: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0000000000800000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0x0000000000000000, 0x800000, 0x0, x1, 24, x2)
+
+inst_164:
+ // Test 164: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0000000001000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0x0000000000000000, 0x1000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_34_0)
+
+
+inst_165:
+ // Test 165: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0000000002000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0x0000000000000000, 0x2000000, 0x0, x1, 0, x7)
+
+inst_166:
+ // Test 166: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0000000004000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0x0000000000000000, 0x4000000, 0x0, x1, 8, x7)
+
+inst_167:
+ // Test 167: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0000000008000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0x0000000000000000, 0x8000000, 0x0, x1, 16, x7)
+
+inst_168:
+ // Test 168: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0000000010000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0x0000000000000000, 0x10000000, 0x0, x1, 24, x7)
+
+inst_169:
+ // Test 169: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x0000000020000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0x0000000000000000, 0x20000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x2,signature_35_0)
+
+
+inst_170:
+ // Test 170: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x0000000040000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0x0000000000000000, 0x40000000, 0x0, x2, 0, x3)
+
+inst_171:
+ // Test 171: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x0000000080000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0x0000000000000000, 0x80000000, 0x0, x2, 8, x3)
+
+inst_172:
+ // Test 172: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x0000000100000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0x0000000000000000, 0x100000000, 0x0, x2, 16, x3)
+
+inst_173:
+ // Test 173: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000200000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x19, x13, x29, 0x0000000000000000, 0x200000000, 0x0, x2, 24, x3)
+
+inst_174:
+ // Test 174: Test with marching zeros/ones
+ // result rd:x20(0x0000000000000000), rs1:x12(0x0000000400000000), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x20, x12, x28, 0x0000000000000000, 0x400000000, 0x0, x2, 32, x3)
+
+
+
+ RVTEST_SIGBASE(x1,signature_36_0)
+
+
+inst_175:
+ // Test 175: Test with marching zeros/ones
+ // result rd:x21(0x0000000000000000), rs1:x11(0x0000000800000000), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x21, x11, x27, 0x0000000000000000, 0x800000000, 0x0, x1, 0, x2)
+
+inst_176:
+ // Test 176: Test with marching zeros/ones
+ // result rd:x22(0x0000000000000000), rs1:x10(0x0000001000000000), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x22, x10, x26, 0x0000000000000000, 0x1000000000, 0x0, x1, 8, x2)
+
+inst_177:
+ // Test 177: Test with marching zeros/ones
+ // result rd:x23(0x0000000000000000), rs1:x9(0x0000002000000000), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x23, x9, x25, 0x0000000000000000, 0x2000000000, 0x0, x1, 16, x2)
+
+inst_178:
+ // Test 178: Test with marching zeros/ones
+ // result rd:x24(0x0000000000000000), rs1:x8(0x0000004000000000), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x24, x8, x24, 0x0000000000000000, 0x4000000000, 0x0, x1, 24, x2)
+
+inst_179:
+ // Test 179: Test with marching zeros/ones
+ // result rd:x25(0x0000000000000000), rs1:x7(0x0000008000000000), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x25, x7, x23, 0x0000000000000000, 0x8000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_37_0)
+
+
+inst_180:
+ // Test 180: Test with marching zeros/ones
+ // result rd:x26(0x0000000000000000), rs1:x6(0x0000010000000000), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x26, x6, x22, 0x0000000000000000, 0x10000000000, 0x0, x1, 0, x7)
+
+inst_181:
+ // Test 181: Test with marching zeros/ones
+ // result rd:x27(0x0000000000000000), rs1:x5(0x0000020000000000), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x27, x5, x21, 0x0000000000000000, 0x20000000000, 0x0, x1, 8, x7)
+
+inst_182:
+ // Test 182: Test with marching zeros/ones
+ // result rd:x28(0x0000000000000000), rs1:x4(0x0000040000000000), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x28, x4, x20, 0x0000000000000000, 0x40000000000, 0x0, x1, 16, x7)
+
+inst_183:
+ // Test 183: Test with marching zeros/ones
+ // result rd:x29(0x0000000000000000), rs1:x3(0x0000080000000000), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x29, x3, x19, 0x0000000000000000, 0x80000000000, 0x0, x1, 24, x7)
+
+inst_184:
+ // Test 184: Test with marching zeros/ones
+ // result rd:x30(0x0000000000000000), rs1:x2(0x0000100000000000), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x30, x2, x18, 0x0000000000000000, 0x100000000000, 0x0, x1, 32, x7)
+
+
+
+ RVTEST_SIGBASE(x5,signature_38_0)
+
+
+inst_185:
+ // Test 185: Test with marching zeros/ones
+ // result rd:x31(0x0000000000000000), rs1:x1(0x0000200000000000), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x31, x1, x17, 0x0000000000000000, 0x200000000000, 0x0, x5, 0, x6)
+
+inst_186:
+ // Test 186: Test with marching zeros/ones
+ // result rd:x1(0x0000000000000000), rs1:x31(0x0000400000000000), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0x0000000000000000, 0x400000000000, 0x0, x5, 8, x6)
+
+inst_187:
+ // Test 187: Test with marching zeros/ones
+ // result rd:x2(0x0000000000000000), rs1:x30(0x0000800000000000), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0x0000000000000000, 0x800000000000, 0x0, x5, 16, x6)
+
+inst_188:
+ // Test 188: Test with marching zeros/ones
+ // result rd:x3(0x0000000000000000), rs1:x29(0x0001000000000000), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0x0000000000000000, 0x1000000000000, 0x0, x5, 24, x6)
+
+inst_189:
+ // Test 189: Test with marching zeros/ones
+ // result rd:x4(0x0000000000000000), rs1:x28(0x0002000000000000), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0x0000000000000000, 0x2000000000000, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_39_0)
+
+
+inst_190:
+ // Test 190: Test with marching zeros/ones
+ // result rd:x5(0x0000000000000000), rs1:x27(0x0004000000000000), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0x0000000000000000, 0x4000000000000, 0x0, x1, 0, x2)
+
+inst_191:
+ // Test 191: Test with marching zeros/ones
+ // result rd:x6(0x0000000000000000), rs1:x26(0x0008000000000000), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0x0000000000000000, 0x8000000000000, 0x0, x1, 8, x2)
+
+inst_192:
+ // Test 192: Test with marching zeros/ones
+ // result rd:x7(0x0000000000000000), rs1:x25(0x0010000000000000), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0x0000000000000000, 0x10000000000000, 0x0, x1, 16, x2)
+
+inst_193:
+ // Test 193: Test with marching zeros/ones
+ // result rd:x8(0x0000000000000000), rs1:x24(0x0020000000000000), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0x0000000000000000, 0x20000000000000, 0x0, x1, 24, x2)
+
+inst_194:
+ // Test 194: Test with marching zeros/ones
+ // result rd:x9(0x0000000000000000), rs1:x23(0x0040000000000000), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0x0000000000000000, 0x40000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_40_0)
+
+
+inst_195:
+ // Test 195: Test with marching zeros/ones
+ // result rd:x10(0x0000000000000000), rs1:x22(0x0080000000000000), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0x0000000000000000, 0x80000000000000, 0x0, x1, 0, x2)
+
+inst_196:
+ // Test 196: Test with marching zeros/ones
+ // result rd:x11(0x0000000000000000), rs1:x21(0x0100000000000000), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0x0000000000000000, 0x100000000000000, 0x0, x1, 8, x2)
+
+inst_197:
+ // Test 197: Test with marching zeros/ones
+ // result rd:x12(0x0000000000000000), rs1:x20(0x0200000000000000), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0x0000000000000000, 0x200000000000000, 0x0, x1, 16, x2)
+
+inst_198:
+ // Test 198: Test with marching zeros/ones
+ // result rd:x13(0x0000000000000000), rs1:x19(0x0400000000000000), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0x0000000000000000, 0x400000000000000, 0x0, x1, 24, x2)
+
+inst_199:
+ // Test 199: Test with marching zeros/ones
+ // result rd:x14(0x0000000000000000), rs1:x18(0x0800000000000000), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0x0000000000000000, 0x800000000000000, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x3,signature_41_0)
+
+
+inst_200:
+ // Test 200: Test with marching zeros/ones
+ // result rd:x15(0x0000000000000000), rs1:x17(0x1000000000000000), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0x0000000000000000, 0x1000000000000000, 0x0, x3, 0, x4)
+
+inst_201:
+ // Test 201: Test with marching zeros/ones
+ // result rd:x16(0x0000000000000000), rs1:x16(0x2000000000000000), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0x0000000000000000, 0x2000000000000000, 0x0, x3, 8, x4)
+
+inst_202:
+ // Test 202: Test with marching zeros/ones
+ // result rd:x17(0x0000000000000000), rs1:x15(0x4000000000000000), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0x0000000000000000, 0x4000000000000000, 0x0, x3, 16, x4)
+
+inst_203:
+ // Test 203: Test with marching zeros/ones
+ // result rd:x18(0x0000000000000000), rs1:x14(0x8000000000000000), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0x0000000000000000, 0x8000000000000000, 0x0, x3, 24, x4)
+
+inst_204:
+ // Test 204: Test with marching zeros/ones
+ // result rd:x19(0x0000000000000000), rs1:x13(0x0000000000000000), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x19, x13, x29, 0x0000000000000000, 0x0, 0x0, x3, 32, x4)
+
+
+
+ RVTEST_SIGBASE(x1,signature_42_0)
+
+
+inst_205:
+ // Test 205: Test with marching zeros/ones
+ // result rd:x20(0xeeeeeeeeeeeeeeee), rs1:x12(0xfffffffffffffffe), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x20, x12, x28, 0xeeeeeeeeeeeeeeee, 0xfffffffffffffffe, 0x0, x1, 0, x2)
+
+inst_206:
+ // Test 206: Test with marching zeros/ones
+ // result rd:x21(0xdddddddddddddddd), rs1:x11(0xfffffffffffffffd), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x21, x11, x27, 0xdddddddddddddddd, 0xfffffffffffffffd, 0x0, x1, 8, x2)
+
+inst_207:
+ // Test 207: Test with marching zeros/ones
+ // result rd:x22(0xbbbbbbbbbbbbbbbb), rs1:x10(0xfffffffffffffffb), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x22, x10, x26, 0xbbbbbbbbbbbbbbbb, 0xfffffffffffffffb, 0x0, x1, 16, x2)
+
+inst_208:
+ // Test 208: Test with marching zeros/ones
+ // result rd:x23(0x7777777777777777), rs1:x9(0xfffffffffffffff7), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x23, x9, x25, 0x7777777777777777, 0xfffffffffffffff7, 0x0, x1, 24, x2)
+
+inst_209:
+ // Test 209: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xffffffffffffffef), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x24, x8, x24, 0xffffffffffffffff, 0xffffffffffffffef, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_43_0)
+
+
+inst_210:
+ // Test 210: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xffffffffffffffdf), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x25, x7, x23, 0xffffffffffffffff, 0xffffffffffffffdf, 0x0, x1, 0, x2)
+
+inst_211:
+ // Test 211: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xffffffffffffffbf), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x26, x6, x22, 0xffffffffffffffff, 0xffffffffffffffbf, 0x0, x1, 8, x2)
+
+inst_212:
+ // Test 212: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffffffffffff7f), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x27, x5, x21, 0xffffffffffffffff, 0xffffffffffffff7f, 0x0, x1, 16, x2)
+
+inst_213:
+ // Test 213: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xfffffffffffffeff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x28, x4, x20, 0xffffffffffffffff, 0xfffffffffffffeff, 0x0, x1, 24, x2)
+
+inst_214:
+ // Test 214: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xfffffffffffffdff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x29, x3, x19, 0xffffffffffffffff, 0xfffffffffffffdff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_44_0)
+
+
+inst_215:
+ // Test 215: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xfffffffffffffbff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x30, x2, x18, 0xffffffffffffffff, 0xfffffffffffffbff, 0x0, x4, 0, x5)
+
+inst_216:
+ // Test 216: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffffffffffff7ff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x31, x1, x17, 0xffffffffffffffff, 0xfffffffffffff7ff, 0x0, x4, 8, x5)
+
+inst_217:
+ // Test 217: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xffffffffffffefff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0xffffffffffffffff, 0xffffffffffffefff, 0x0, x4, 16, x5)
+
+inst_218:
+ // Test 218: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xffffffffffffdfff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0xffffffffffffffff, 0xffffffffffffdfff, 0x0, x4, 24, x5)
+
+inst_219:
+ // Test 219: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xffffffffffffbfff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0xffffffffffffffff, 0xffffffffffffbfff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_45_0)
+
+
+inst_220:
+ // Test 220: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffffffffffff7fff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0xffffffffffffffff, 0xffffffffffff7fff, 0x0, x1, 0, x2)
+
+inst_221:
+ // Test 221: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xfffffffffffeffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0xffffffffffffffff, 0xfffffffffffeffff, 0x0, x1, 8, x2)
+
+inst_222:
+ // Test 222: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xfffffffffffdffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0xffffffffffffffff, 0xfffffffffffdffff, 0x0, x1, 16, x2)
+
+inst_223:
+ // Test 223: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xfffffffffffbffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0xffffffffffffffff, 0xfffffffffffbffff, 0x0, x1, 24, x2)
+
+inst_224:
+ // Test 224: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfffffffffff7ffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0xffffffffffffffff, 0xfffffffffff7ffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_46_0)
+
+
+inst_225:
+ // Test 225: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xffffffffffefffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0xffffffffffffffff, 0xffffffffffefffff, 0x0, x1, 0, x2)
+
+inst_226:
+ // Test 226: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xffffffffffdfffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0xffffffffffffffff, 0xffffffffffdfffff, 0x0, x1, 8, x2)
+
+inst_227:
+ // Test 227: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xffffffffffbfffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0xffffffffffffffff, 0xffffffffffbfffff, 0x0, x1, 16, x2)
+
+inst_228:
+ // Test 228: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xffffffffff7fffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0xffffffffffffffff, 0xffffffffff7fffff, 0x0, x1, 24, x2)
+
+inst_229:
+ // Test 229: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xfffffffffeffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0xffffffffffffffff, 0xfffffffffeffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_47_0)
+
+
+inst_230:
+ // Test 230: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xfffffffffdffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0xffffffffffffffff, 0xfffffffffdffffff, 0x0, x4, 0, x5)
+
+inst_231:
+ // Test 231: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfffffffffbffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0xffffffffffffffff, 0xfffffffffbffffff, 0x0, x4, 8, x5)
+
+inst_232:
+ // Test 232: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfffffffff7ffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0xffffffffffffffff, 0xfffffffff7ffffff, 0x0, x4, 16, x5)
+
+inst_233:
+ // Test 233: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xffffffffefffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0xffffffffffffffff, 0xffffffffefffffff, 0x0, x4, 24, x5)
+
+inst_234:
+ // Test 234: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xffffffffdfffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0xffffffffffffffff, 0xffffffffdfffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_48_0)
+
+
+inst_235:
+ // Test 235: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xffffffffbfffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x19, x13, x29, 0xffffffffffffffff, 0xffffffffbfffffff, 0x0, x1, 0, x2)
+
+inst_236:
+ // Test 236: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xffffffff7fffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x20, x12, x28, 0xffffffffffffffff, 0xffffffff7fffffff, 0x0, x1, 8, x2)
+
+inst_237:
+ // Test 237: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0xfffffffeffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x21, x11, x27, 0xffffffffffffffff, 0xfffffffeffffffff, 0x0, x1, 16, x2)
+
+inst_238:
+ // Test 238: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xfffffffdffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x22, x10, x26, 0xffffffffffffffff, 0xfffffffdffffffff, 0x0, x1, 24, x2)
+
+inst_239:
+ // Test 239: Test with marching zeros/ones
+ // result rd:x23(0xffffffffffffffff), rs1:x9(0xfffffffbffffffff), rs2:x25(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x23, x9, x25, 0xffffffffffffffff, 0xfffffffbffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_49_0)
+
+
+inst_240:
+ // Test 240: Test with marching zeros/ones
+ // result rd:x24(0xffffffffffffffff), rs1:x8(0xfffffff7ffffffff), rs2:x24(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x24, x8, x24, 0xffffffffffffffff, 0xfffffff7ffffffff, 0x0, x1, 0, x2)
+
+inst_241:
+ // Test 241: Test with marching zeros/ones
+ // result rd:x25(0xffffffffffffffff), rs1:x7(0xffffffefffffffff), rs2:x23(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x25, x7, x23, 0xffffffffffffffff, 0xffffffefffffffff, 0x0, x1, 8, x2)
+
+inst_242:
+ // Test 242: Test with marching zeros/ones
+ // result rd:x26(0xffffffffffffffff), rs1:x6(0xffffffdfffffffff), rs2:x22(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x26, x6, x22, 0xffffffffffffffff, 0xffffffdfffffffff, 0x0, x1, 16, x2)
+
+inst_243:
+ // Test 243: Test with marching zeros/ones
+ // result rd:x27(0xffffffffffffffff), rs1:x5(0xffffffbfffffffff), rs2:x21(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x27, x5, x21, 0xffffffffffffffff, 0xffffffbfffffffff, 0x0, x1, 24, x2)
+
+inst_244:
+ // Test 244: Test with marching zeros/ones
+ // result rd:x28(0xffffffffffffffff), rs1:x4(0xffffff7fffffffff), rs2:x20(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x28, x4, x20, 0xffffffffffffffff, 0xffffff7fffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x4,signature_50_0)
+
+
+inst_245:
+ // Test 245: Test with marching zeros/ones
+ // result rd:x29(0xffffffffffffffff), rs1:x3(0xfffffeffffffffff), rs2:x19(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x29, x3, x19, 0xffffffffffffffff, 0xfffffeffffffffff, 0x0, x4, 0, x5)
+
+inst_246:
+ // Test 246: Test with marching zeros/ones
+ // result rd:x30(0xffffffffffffffff), rs1:x2(0xfffffdffffffffff), rs2:x18(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x30, x2, x18, 0xffffffffffffffff, 0xfffffdffffffffff, 0x0, x4, 8, x5)
+
+inst_247:
+ // Test 247: Test with marching zeros/ones
+ // result rd:x31(0xffffffffffffffff), rs1:x1(0xfffffbffffffffff), rs2:x17(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x31, x1, x17, 0xffffffffffffffff, 0xfffffbffffffffff, 0x0, x4, 16, x5)
+
+inst_248:
+ // Test 248: Test with marching zeros/ones
+ // result rd:x1(0xffffffffffffffff), rs1:x31(0xfffff7ffffffffff), rs2:x16(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x1, x31, x16, 0xffffffffffffffff, 0xfffff7ffffffffff, 0x0, x4, 24, x5)
+
+inst_249:
+ // Test 249: Test with marching zeros/ones
+ // result rd:x2(0xffffffffffffffff), rs1:x30(0xffffefffffffffff), rs2:x15(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x2, x30, x15, 0xffffffffffffffff, 0xffffefffffffffff, 0x0, x4, 32, x5)
+
+
+
+ RVTEST_SIGBASE(x1,signature_51_0)
+
+
+inst_250:
+ // Test 250: Test with marching zeros/ones
+ // result rd:x3(0xffffffffffffffff), rs1:x29(0xffffdfffffffffff), rs2:x14(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x3, x29, x14, 0xffffffffffffffff, 0xffffdfffffffffff, 0x0, x1, 0, x2)
+
+inst_251:
+ // Test 251: Test with marching zeros/ones
+ // result rd:x4(0xffffffffffffffff), rs1:x28(0xffffbfffffffffff), rs2:x13(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x4, x28, x13, 0xffffffffffffffff, 0xffffbfffffffffff, 0x0, x1, 8, x2)
+
+inst_252:
+ // Test 252: Test with marching zeros/ones
+ // result rd:x5(0xffffffffffffffff), rs1:x27(0xffff7fffffffffff), rs2:x12(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x5, x27, x12, 0xffffffffffffffff, 0xffff7fffffffffff, 0x0, x1, 16, x2)
+
+inst_253:
+ // Test 253: Test with marching zeros/ones
+ // result rd:x6(0xffffffffffffffff), rs1:x26(0xfffeffffffffffff), rs2:x11(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x6, x26, x11, 0xffffffffffffffff, 0xfffeffffffffffff, 0x0, x1, 24, x2)
+
+inst_254:
+ // Test 254: Test with marching zeros/ones
+ // result rd:x7(0xffffffffffffffff), rs1:x25(0xfffdffffffffffff), rs2:x10(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x7, x25, x10, 0xffffffffffffffff, 0xfffdffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_52_0)
+
+
+inst_255:
+ // Test 255: Test with marching zeros/ones
+ // result rd:x8(0xffffffffffffffff), rs1:x24(0xfffbffffffffffff), rs2:x9(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x8, x24, x9, 0xffffffffffffffff, 0xfffbffffffffffff, 0x0, x1, 0, x2)
+
+inst_256:
+ // Test 256: Test with marching zeros/ones
+ // result rd:x9(0xffffffffffffffff), rs1:x23(0xfff7ffffffffffff), rs2:x8(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x9, x23, x8, 0xffffffffffffffff, 0xfff7ffffffffffff, 0x0, x1, 8, x2)
+
+inst_257:
+ // Test 257: Test with marching zeros/ones
+ // result rd:x10(0xffffffffffffffff), rs1:x22(0xffefffffffffffff), rs2:x7(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x10, x22, x7, 0xffffffffffffffff, 0xffefffffffffffff, 0x0, x1, 16, x2)
+
+inst_258:
+ // Test 258: Test with marching zeros/ones
+ // result rd:x11(0xffffffffffffffff), rs1:x21(0xffdfffffffffffff), rs2:x6(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x11, x21, x6, 0xffffffffffffffff, 0xffdfffffffffffff, 0x0, x1, 24, x2)
+
+inst_259:
+ // Test 259: Test with marching zeros/ones
+ // result rd:x12(0xffffffffffffffff), rs1:x20(0xffbfffffffffffff), rs2:x5(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x12, x20, x5, 0xffffffffffffffff, 0xffbfffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x5,signature_53_0)
+
+
+inst_260:
+ // Test 260: Test with marching zeros/ones
+ // result rd:x13(0xffffffffffffffff), rs1:x19(0xff7fffffffffffff), rs2:x4(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x13, x19, x4, 0xffffffffffffffff, 0xff7fffffffffffff, 0x0, x5, 0, x6)
+
+inst_261:
+ // Test 261: Test with marching zeros/ones
+ // result rd:x14(0xffffffffffffffff), rs1:x18(0xfeffffffffffffff), rs2:x3(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x14, x18, x3, 0xffffffffffffffff, 0xfeffffffffffffff, 0x0, x5, 8, x6)
+
+inst_262:
+ // Test 262: Test with marching zeros/ones
+ // result rd:x15(0xffffffffffffffff), rs1:x17(0xfdffffffffffffff), rs2:x2(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x15, x17, x2, 0xffffffffffffffff, 0xfdffffffffffffff, 0x0, x5, 16, x6)
+
+inst_263:
+ // Test 263: Test with marching zeros/ones
+ // result rd:x16(0xffffffffffffffff), rs1:x16(0xfbffffffffffffff), rs2:x1(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x16, x16, x1, 0xffffffffffffffff, 0xfbffffffffffffff, 0x0, x5, 24, x6)
+
+inst_264:
+ // Test 264: Test with marching zeros/ones
+ // result rd:x17(0xffffffffffffffff), rs1:x15(0xf7ffffffffffffff), rs2:x31(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x17, x15, x31, 0xffffffffffffffff, 0xf7ffffffffffffff, 0x0, x5, 32, x6)
+
+
+
+ RVTEST_SIGBASE(x1,signature_54_0)
+
+
+inst_265:
+ // Test 265: Test with marching zeros/ones
+ // result rd:x18(0xffffffffffffffff), rs1:x14(0xefffffffffffffff), rs2:x30(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x18, x14, x30, 0xffffffffffffffff, 0xefffffffffffffff, 0x0, x1, 0, x2)
+
+inst_266:
+ // Test 266: Test with marching zeros/ones
+ // result rd:x19(0xffffffffffffffff), rs1:x13(0xdfffffffffffffff), rs2:x29(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x19, x13, x29, 0xffffffffffffffff, 0xdfffffffffffffff, 0x0, x1, 8, x2)
+
+inst_267:
+ // Test 267: Test with marching zeros/ones
+ // result rd:x20(0xffffffffffffffff), rs1:x12(0xbfffffffffffffff), rs2:x28(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x20, x12, x28, 0xffffffffffffffff, 0xbfffffffffffffff, 0x0, x1, 16, x2)
+
+inst_268:
+ // Test 268: Test with marching zeros/ones
+ // result rd:x21(0xffffffffffffffff), rs1:x11(0x7fffffffffffffff), rs2:x27(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x21, x11, x27, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x1, 24, x2)
+
+inst_269:
+ // Test 269: Test with marching zeros/ones
+ // result rd:x22(0xffffffffffffffff), rs1:x10(0xffffffffffffffff), rs2:x26(0x0000000000000000)
+ TEST_RR_OP(xperm.n, x22, x10, x26, 0xffffffffffffffff, 0xffffffffffffffff, 0x0, x1, 32, x2)
+
+
+
+ RVTEST_SIGBASE(x1,signature_55_0)
+
+
+inst_270:
+ // Test 270: Test with rs1 == rs2
+ // result rd:x23(0x7d1dc4bb2c23ffcc), rs1:x25(0x10fd3dedadea5195), rs2:x25(0xdf7f3844121bcc23)
+ TEST_RR_OP(xperm.n, x23, x25, x25, 0x7d1dc4bb2c23ffcc, 0x10fd3dedadea5195, 0xdf7f3844121bcc23, x1, 0, x2)
+
+inst_271:
+ // Test 271: Test with rd == x0
+ // result rd:x0(0x0000000000000000), rs1:x8(0xbd295ce2d2ffbec1), rs2:x24(0xf5adb41aa47d105b)
+ TEST_RR_OP(xperm.n, x0, x8, x24, 0x0000000000000000, 0xbd295ce2d2ffbec1, 0xf5adb41aa47d105b, x1, 8, x2)
+
+inst_272:
+ // Test 272: Test with rs2 == x0
+ // result rd:x25(0xbbbbbbbbbbbbbbbb), rs1:x7(0xc9649f05a8e1a8bb), rs2:x0(0x82f6747f707af2c0)
+ TEST_RR_OP(xperm.n, x25, x7, x0, 0xbbbbbbbbbbbbbbbb, 0xc9649f05a8e1a8bb, 0x82f6747f707af2c0, x1, 16, x2)
+
+inst_273:
+ // Test 273: Test with rs1 == x0
+ // result rd:x26(0x0000000000000000), rs1:x0(0x3541291848c99fcb), rs2:x22(0x73a92fd4e19bfbc3)
+ TEST_RR_OP(xperm.n, x26, x0, x22, 0x0000000000000000, 0x3541291848c99fcb, 0x73a92fd4e19bfbc3, x1, 24, x2)
+
+#endif
+
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+.align 4
+rvtest_data:
+.word 0xbabecafe
+
+# Input data section.
+ .data
+
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+
+
+
+
+signature_1_0:
+ .fill 5, 8, 0xdeadbeef
+signature_2_0:
+ .fill 5, 8, 0xdeadbeef
+signature_3_0:
+ .fill 5, 8, 0xdeadbeef
+signature_4_0:
+ .fill 5, 8, 0xdeadbeef
+signature_5_0:
+ .fill 5, 8, 0xdeadbeef
+signature_6_0:
+ .fill 5, 8, 0xdeadbeef
+signature_7_0:
+ .fill 5, 8, 0xdeadbeef
+signature_8_0:
+ .fill 5, 8, 0xdeadbeef
+signature_9_0:
+ .fill 5, 8, 0xdeadbeef
+signature_10_0:
+ .fill 5, 8, 0xdeadbeef
+signature_11_0:
+ .fill 5, 8, 0xdeadbeef
+signature_12_0:
+ .fill 5, 8, 0xdeadbeef
+signature_13_0:
+ .fill 5, 8, 0xdeadbeef
+signature_14_0:
+ .fill 5, 8, 0xdeadbeef
+signature_15_0:
+ .fill 5, 8, 0xdeadbeef
+signature_16_0:
+ .fill 5, 8, 0xdeadbeef
+signature_17_0:
+ .fill 5, 8, 0xdeadbeef
+signature_18_0:
+ .fill 5, 8, 0xdeadbeef
+signature_19_0:
+ .fill 5, 8, 0xdeadbeef
+signature_20_0:
+ .fill 5, 8, 0xdeadbeef
+signature_21_0:
+ .fill 5, 8, 0xdeadbeef
+signature_22_0:
+ .fill 5, 8, 0xdeadbeef
+signature_23_0:
+ .fill 5, 8, 0xdeadbeef
+signature_24_0:
+ .fill 5, 8, 0xdeadbeef
+signature_25_0:
+ .fill 5, 8, 0xdeadbeef
+signature_26_0:
+ .fill 5, 8, 0xdeadbeef
+signature_27_0:
+ .fill 5, 8, 0xdeadbeef
+signature_28_0:
+ .fill 5, 8, 0xdeadbeef
+signature_29_0:
+ .fill 5, 8, 0xdeadbeef
+signature_30_0:
+ .fill 5, 8, 0xdeadbeef
+signature_31_0:
+ .fill 5, 8, 0xdeadbeef
+signature_32_0:
+ .fill 5, 8, 0xdeadbeef
+signature_33_0:
+ .fill 5, 8, 0xdeadbeef
+signature_34_0:
+ .fill 5, 8, 0xdeadbeef
+signature_35_0:
+ .fill 5, 8, 0xdeadbeef
+signature_36_0:
+ .fill 5, 8, 0xdeadbeef
+signature_37_0:
+ .fill 5, 8, 0xdeadbeef
+signature_38_0:
+ .fill 5, 8, 0xdeadbeef
+signature_39_0:
+ .fill 5, 8, 0xdeadbeef
+signature_40_0:
+ .fill 5, 8, 0xdeadbeef
+signature_41_0:
+ .fill 5, 8, 0xdeadbeef
+signature_42_0:
+ .fill 5, 8, 0xdeadbeef
+signature_43_0:
+ .fill 5, 8, 0xdeadbeef
+signature_44_0:
+ .fill 5, 8, 0xdeadbeef
+signature_45_0:
+ .fill 5, 8, 0xdeadbeef
+signature_46_0:
+ .fill 5, 8, 0xdeadbeef
+signature_47_0:
+ .fill 5, 8, 0xdeadbeef
+signature_48_0:
+ .fill 5, 8, 0xdeadbeef
+signature_49_0:
+ .fill 5, 8, 0xdeadbeef
+signature_50_0:
+ .fill 5, 8, 0xdeadbeef
+signature_51_0:
+ .fill 5, 8, 0xdeadbeef
+signature_52_0:
+ .fill 5, 8, 0xdeadbeef
+signature_53_0:
+ .fill 5, 8, 0xdeadbeef
+signature_54_0:
+ .fill 5, 8, 0xdeadbeef
+signature_55_0:
+ .fill 5, 8, 0xdeadbeef
+
+
+#ifdef rvtest_mtrap_routine
+
+mtrap_sigptr:
+ .fill 64*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+#ifdef rvtest_gpr_save
+
+gpr_save:
+ .fill 32*(XLEN/32),4,0xdeadbeef
+
+#endif
+
+RVMODEL_DATA_END
+
diff --git a/riscof/suite/rv64i_m/M/div-01.S b/riscof/suite/rv64i_m/M/div-01.S
new file mode 100644
index 0000000000000000000000000000000000000000..8808923f696422932fb68f572c16cc42995fca6b
--- /dev/null
+++ b/riscof/suite/rv64i_m/M/div-01.S
@@ -0,0 +1,3479 @@
+
+// -----------
+// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
+// version : 0.4.1
+// timestamp : Wed Dec 16 17:47:56 2020 GMT
+// usage : riscv_ctg \
+// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/rv64im.cgf') \
+// -- xlen 64 \
+// -----------
+//
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the div instruction of the RISC-V M extension for the div covergroup.
+//
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("RV64IM")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+#ifdef TEST_CASE_1
+
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*M.*);def TEST_CASE_1=True;",div)
+
+RVTEST_SIGBASE( x15,signature_x15_1)
+
+inst_0:
+// rs1 == rs2 == rd, rs1==x21, rs2==x21, rd==x21, rs1_val > 0 and rs2_val > 0, rs1_val == 8, rs1_val != rs2_val
+// opcode: div ; op1:x21; op2:x21; dest:x21; op1val:0x8; op2val:0x8
+TEST_RR_OP(div, x21, x21, x21, 0x1, 0x8, 0x8, x15, 0, x28)
+
+inst_1:
+// rs1 != rs2 and rs1 != rd and rs2 != rd, rs1==x16, rs2==x0, rd==x26, rs1_val > 0 and rs2_val < 0, rs2_val == -9, rs1_val == 68719476736
+// opcode: div ; op1:x16; op2:x0; dest:x26; op1val:0x1000000000; op2val:0x0
+TEST_RR_OP(div, x26, x16, x0, 0xFFFFFFFFFFFFFFFF, 0x1000000000, 0x0, x15, 8, x28)
+
+inst_2:
+// rs1 == rd != rs2, rs1==x13, rs2==x8, rd==x13, rs1_val < 0 and rs2_val < 0, rs1_val == -17179869185, rs2_val == -33
+// opcode: div ; op1:x13; op2:x8; dest:x13; op1val:-0x400000001; op2val:-0x21
+TEST_RR_OP(div, x13, x13, x8, 0x1f07c1f0, -0x400000001, -0x21, x15, 16, x28)
+
+inst_3:
+// rs2 == rd != rs1, rs1==x3, rs2==x5, rd==x5, rs1_val < 0 and rs2_val > 0, rs2_val == 128
+// opcode: div ; op1:x3; op2:x5; dest:x5; op1val:-0x8; op2val:0x80
+TEST_RR_OP(div, x5, x3, x5, 0x0, -0x8, 0x80, x15, 24, x28)
+
+inst_4:
+// rs1 == rs2 != rd, rs1==x1, rs2==x1, rd==x14, rs1_val == rs2_val, rs1_val==3 and rs2_val==3
+// opcode: div ; op1:x1; op2:x1; dest:x14; op1val:0x3; op2val:0x3
+TEST_RR_OP(div, x14, x1, x1, 0x1, 0x3, 0x3, x15, 32, x28)
+
+inst_5:
+// rs1==x24, rs2==x10, rd==x7, rs2_val == (-2**(xlen-1)), rs2_val == -9223372036854775808, rs1_val == -2199023255553
+// opcode: div ; op1:x24; op2:x10; dest:x7; op1val:-0x20000000001; op2val:-0x8000000000000000
+TEST_RR_OP(div, x7, x24, x10, 0x0, -0x20000000001, -0x8000000000000000, x15, 40, x28)
+
+inst_6:
+// rs1==x23, rs2==x26, rd==x27, rs2_val == 0, rs1_val == 72057594037927936
+// opcode: div ; op1:x23; op2:x26; dest:x27; op1val:0x100000000000000; op2val:0x0
+TEST_RR_OP(div, x27, x23, x26, 0xFFFFFFFFFFFFFFFF, 0x100000000000000, 0x0, x15, 48, x28)
+
+inst_7:
+// rs1==x6, rs2==x18, rd==x12, rs2_val == (2**(xlen-1)-1), rs2_val == 9223372036854775807, rs1_val == -4194305
+// opcode: div ; op1:x6; op2:x18; dest:x12; op1val:-0x400001; op2val:0x7fffffffffffffff
+TEST_RR_OP(div, x12, x6, x18, 0x0, -0x400001, 0x7fffffffffffffff, x15, 56, x28)
+
+inst_8:
+// rs1==x0, rs2==x24, rd==x8, rs2_val == 1, rs1_val == 549755813888
+// opcode: div ; op1:x0; op2:x24; dest:x8; op1val:0x0; op2val:0x1
+TEST_RR_OP(div, x8, x0, x24, 0x0, 0x0, 0x1, x15, 64, x28)
+
+inst_9:
+// rs1==x20, rs2==x23, rd==x6, rs1_val == (-2**(xlen-1)), rs1_val == -9223372036854775808
+// opcode: div ; op1:x20; op2:x23; dest:x6; op1val:-0x8000000000000000; op2val:-0xb504f332
+TEST_RR_OP(div, x6, x20, x23, 0xb504f335, -0x8000000000000000, -0xb504f332, x15, 72, x28)
+
+inst_10:
+// rs1==x14, rs2==x22, rd==x2, rs1_val == 0, rs1_val==0 and rs2_val==6148914691236517204
+// opcode: div ; op1:x14; op2:x22; dest:x2; op1val:0x0; op2val:0x5555555555555554
+TEST_RR_OP(div, x2, x14, x22, 0x0, 0x0, 0x5555555555555554, x15, 80, x28)
+
+inst_11:
+// rs1==x12, rs2==x3, rd==x4, rs1_val == (2**(xlen-1)-1), rs2_val == -137438953473, rs1_val == 9223372036854775807
+// opcode: div ; op1:x12; op2:x3; dest:x4; op1val:0x7fffffffffffffff; op2val:-0x2000000001
+TEST_RR_OP(div, x4, x12, x3, -0x3ffffff, 0x7fffffffffffffff, -0x2000000001, x15, 88, x28)
+
+inst_12:
+// rs1==x10, rs2==x31, rd==x11, rs1_val == 1,
+// opcode: div ; op1:x10; op2:x31; dest:x11; op1val:0x1; op2val:-0x5555555555555555
+TEST_RR_OP(div, x11, x10, x31, 0x0, 0x1, -0x5555555555555555, x15, 96, x28)
+
+inst_13:
+// rs1==x31, rs2==x2, rd==x9, rs2_val == 2, rs1_val == 1125899906842624
+// opcode: div ; op1:x31; op2:x2; dest:x9; op1val:0x4000000000000; op2val:0x2
+TEST_RR_OP(div, x9, x31, x2, 0x2000000000000, 0x4000000000000, 0x2, x15, 104, x28)
+
+inst_14:
+// rs1==x27, rs2==x4, rd==x23, rs2_val == 4, rs1_val==5 and rs2_val==4
+// opcode: div ; op1:x27; op2:x4; dest:x23; op1val:0x5; op2val:0x4
+TEST_RR_OP(div, x23, x27, x4, 0x1, 0x5, 0x4, x15, 112, x28)
+
+inst_15:
+// rs1==x25, rs2==x20, rd==x10, rs2_val == 8, rs1_val == -2147483649
+// opcode: div ; op1:x25; op2:x20; dest:x10; op1val:-0x80000001; op2val:0x8
+TEST_RR_OP(div, x10, x25, x20, -0x10000000, -0x80000001, 0x8, x15, 120, x28)
+
+inst_16:
+// rs1==x30, rs2==x19, rd==x17, rs2_val == 16,
+// opcode: div ; op1:x30; op2:x19; dest:x17; op1val:-0x400001; op2val:0x10
+TEST_RR_OP(div, x17, x30, x19, -0x40000, -0x400001, 0x10, x15, 128, x28)
+RVTEST_SIGBASE( x10,signature_x10_0)
+
+inst_17:
+// rs1==x22, rs2==x16, rd==x19, rs2_val == 32,
+// opcode: div ; op1:x22; op2:x16; dest:x19; op1val:-0x1; op2val:0x20
+TEST_RR_OP(div, x19, x22, x16, 0x0, -0x1, 0x20, x10, 0, x12)
+
+inst_18:
+// rs1==x28, rs2==x11, rd==x29, rs2_val == 64, rs1_val == 16
+// opcode: div ; op1:x28; op2:x11; dest:x29; op1val:0x10; op2val:0x40
+TEST_RR_OP(div, x29, x28, x11, 0x0, 0x10, 0x40, x10, 8, x12)
+
+inst_19:
+// rs1==x19, rs2==x7, rd==x1, rs2_val == 256, rs1_val == -18014398509481985
+// opcode: div ; op1:x19; op2:x7; dest:x1; op1val:-0x40000000000001; op2val:0x100
+TEST_RR_OP(div, x1, x19, x7, -0x400000000000, -0x40000000000001, 0x100, x10, 16, x12)
+
+inst_20:
+// rs1==x7, rs2==x15, rd==x20, rs2_val == 512, rs1_val == 4
+// opcode: div ; op1:x7; op2:x15; dest:x20; op1val:0x4; op2val:0x200
+TEST_RR_OP(div, x20, x7, x15, 0x0, 0x4, 0x200, x10, 24, x12)
+
+inst_21:
+// rs1==x29, rs2==x14, rd==x16, rs2_val == 1024, rs1_val == 268435456
+// opcode: div ; op1:x29; op2:x14; dest:x16; op1val:0x10000000; op2val:0x400
+TEST_RR_OP(div, x16, x29, x14, 0x40000, 0x10000000, 0x400, x10, 32, x12)
+
+inst_22:
+// rs1==x2, rs2==x6, rd==x24, rs2_val == 2048, rs1_val == 2199023255552
+// opcode: div ; op1:x2; op2:x6; dest:x24; op1val:0x20000000000; op2val:0x800
+TEST_RR_OP(div, x24, x2, x6, 0x40000000, 0x20000000000, 0x800, x10, 40, x12)
+
+inst_23:
+// rs1==x5, rs2==x13, rd==x3, rs2_val == 4096, rs1_val == -1025
+// opcode: div ; op1:x5; op2:x13; dest:x3; op1val:-0x401; op2val:0x1000
+TEST_RR_OP(div, x3, x5, x13, 0x0, -0x401, 0x1000, x10, 48, x12)
+
+inst_24:
+// rs1==x26, rs2==x17, rd==x15, rs2_val == 8192, rs1_val == 134217728
+// opcode: div ; op1:x26; op2:x17; dest:x15; op1val:0x8000000; op2val:0x2000
+TEST_RR_OP(div, x15, x26, x17, 0x4000, 0x8000000, 0x2000, x10, 56, x12)
+
+inst_25:
+// rs1==x4, rs2==x9, rd==x0, rs2_val == 16384,
+// opcode: div ; op1:x4; op2:x9; dest:x0; op1val:0x6666666666666666; op2val:0x4000
+TEST_RR_OP(div, x0, x4, x9, 0, 0x6666666666666666, 0x4000, x10, 64, x12)
+
+inst_26:
+// rs1==x8, rs2==x30, rd==x31, rs2_val == 32768,
+// opcode: div ; op1:x8; op2:x30; dest:x31; op1val:0xb504f333; op2val:0x8000
+TEST_RR_OP(div, x31, x8, x30, 0x16a09, 0xb504f333, 0x8000, x10, 72, x12)
+
+inst_27:
+// rs1==x9, rs2==x29, rd==x18, rs2_val == 65536,
+// opcode: div ; op1:x9; op2:x29; dest:x18; op1val:0x3333333333333332; op2val:0x10000
+TEST_RR_OP(div, x18, x9, x29, 0x333333333333, 0x3333333333333332, 0x10000, x10, 80, x12)
+
+inst_28:
+// rs1==x15, rs2==x27, rd==x22, rs2_val == 131072, rs1_val == 131072
+// opcode: div ; op1:x15; op2:x27; dest:x22; op1val:0x20000; op2val:0x20000
+TEST_RR_OP(div, x22, x15, x27, 0x1, 0x20000, 0x20000, x10, 88, x12)
+
+inst_29:
+// rs1==x17, rs2==x25, rd==x30, rs2_val == 262144, rs1_val == 6148914691236517205
+// opcode: div ; op1:x17; op2:x25; dest:x30; op1val:0x5555555555555555; op2val:0x40000
+TEST_RR_OP(div, x30, x17, x25, 0x155555555555, 0x5555555555555555, 0x40000, x10, 96, x12)
+
+inst_30:
+// rs1==x11, rs2==x12, rd==x28, rs2_val == 524288, rs1_val == 274877906944
+// opcode: div ; op1:x11; op2:x12; dest:x28; op1val:0x4000000000; op2val:0x80000
+TEST_RR_OP(div, x28, x11, x12, 0x80000, 0x4000000000, 0x80000, x10, 104, x2)
+RVTEST_SIGBASE( x1,signature_x1_0)
+
+inst_31:
+// rs1==x18, rs2==x28, rd==x25, rs2_val == 1048576,
+// opcode: div ; op1:x18; op2:x28; dest:x25; op1val:0x6666666666666666; op2val:0x100000
+TEST_RR_OP(div, x25, x18, x28, 0x66666666666, 0x6666666666666666, 0x100000, x1, 0, x2)
+
+inst_32:
+// rs2_val == 2097152, rs1_val == 35184372088832
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000; op2val:0x200000
+TEST_RR_OP(div, x12, x10, x11, 0x1000000, 0x200000000000, 0x200000, x1, 8, x2)
+
+inst_33:
+// rs2_val == 4194304,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x20000; op2val:0x400000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x20000, 0x400000, x1, 16, x2)
+
+inst_34:
+// rs2_val == 8388608, rs1_val == -65
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x41; op2val:0x800000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x41, 0x800000, x1, 24, x2)
+
+inst_35:
+// rs2_val == 16777216,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x1000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x1000000, x1, 32, x2)
+
+inst_36:
+// rs2_val == 33554432, rs1_val == 256
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x100; op2val:0x2000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x100, 0x2000000, x1, 40, x2)
+
+inst_37:
+// rs2_val == 67108864, rs1_val == -4294967297
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x100000001; op2val:0x4000000
+TEST_RR_OP(div, x12, x10, x11, -0x40, -0x100000001, 0x4000000, x1, 48, x2)
+
+inst_38:
+// rs2_val == 134217728,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x8; op2val:0x8000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x8, 0x8000000, x1, 56, x2)
+
+inst_39:
+// rs2_val == 268435456,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x10000000
+TEST_RR_OP(div, x12, x10, x11, -0xb, -0xb504f333, 0x10000000, x1, 64, x2)
+
+inst_40:
+// rs2_val == 536870912,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x6; op2val:0x20000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x6, 0x20000000, x1, 72, x2)
+
+inst_41:
+// rs2_val == 1073741824, rs1_val == 576460752303423488
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000000; op2val:0x40000000
+TEST_RR_OP(div, x12, x10, x11, 0x20000000, 0x800000000000000, 0x40000000, x1, 80, x2)
+
+inst_42:
+// rs2_val == 2147483648, rs1_val == 17592186044416
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x100000000000; op2val:0x80000000
+TEST_RR_OP(div, x12, x10, x11, 0x2000, 0x100000000000, 0x80000000, x1, 88, x2)
+
+inst_43:
+// rs2_val == 4294967296, rs1_val == -1152921504606846977
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000000001; op2val:0x100000000
+TEST_RR_OP(div, x12, x10, x11, -0x10000000, -0x1000000000000001, 0x100000000, x1, 96, x2)
+
+inst_44:
+// rs2_val == 8589934592,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x200000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x200000000, x1, 104, x2)
+
+inst_45:
+// rs2_val == 17179869184,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x400000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x8000000, 0x400000000, x1, 112, x2)
+
+inst_46:
+// rs2_val == 34359738368, rs1_val == -2305843009213693953
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000000001; op2val:0x800000000
+TEST_RR_OP(div, x12, x10, x11, -0x4000000, -0x2000000000000001, 0x800000000, x1, 120, x2)
+
+inst_47:
+// rs2_val == 68719476736, rs1_val == -36028797018963969
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000000001; op2val:0x1000000000
+TEST_RR_OP(div, x12, x10, x11, -0x80000, -0x80000000000001, 0x1000000000, x1, 128, x2)
+
+inst_48:
+// rs2_val == 137438953472,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x2000000000, x1, 136, x2)
+
+inst_49:
+// rs2_val == 274877906944, rs1_val == 1073741824
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:0x4000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x40000000, 0x4000000000, x1, 144, x2)
+
+inst_50:
+// rs2_val == 549755813888, rs1_val == -144115188075855873
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000000001; op2val:0x8000000000
+TEST_RR_OP(div, x12, x10, x11, -0x40000, -0x200000000000001, 0x8000000000, x1, 152, x2)
+
+inst_51:
+// rs2_val == 1099511627776, rs1_val == 34359738368
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x800000000; op2val:0x10000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x800000000, 0x10000000000, x1, 160, x2)
+
+inst_52:
+// rs2_val == 2199023255552, rs1_val == -2
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:0x20000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x2, 0x20000000000, x1, 168, x2)
+
+inst_53:
+// rs2_val == 4398046511104, rs1_val == 536870912
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:0x40000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x20000000, 0x40000000000, x1, 176, x2)
+
+inst_54:
+// rs2_val == 8796093022208,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x6; op2val:0x80000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x6, 0x80000000000, x1, 184, x2)
+
+inst_55:
+// rs2_val == 17592186044416, rs1_val == 36028797018963968
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000000; op2val:0x100000000000
+TEST_RR_OP(div, x12, x10, x11, 0x800, 0x80000000000000, 0x100000000000, x1, 192, x2)
+
+inst_56:
+// rs2_val == 35184372088832,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x200000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x200000000000, x1, 200, x2)
+
+inst_57:
+// rs2_val == 70368744177664, rs1_val == 1099511627776
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000; op2val:0x400000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x10000000000, 0x400000000000, x1, 208, x2)
+
+inst_58:
+// rs2_val == 140737488355328,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x800000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x800000000000, x1, 216, x2)
+
+inst_59:
+// rs2_val == 281474976710656,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x1000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x1000000000000, x1, 224, x2)
+
+inst_60:
+// rs2_val == 562949953421312, rs1_val == -72057594037927937
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000000001; op2val:0x2000000000000
+TEST_RR_OP(div, x12, x10, x11, -0x80, -0x100000000000001, 0x2000000000000, x1, 232, x2)
+
+inst_61:
+// rs2_val == 1125899906842624,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x4; op2val:0x4000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x4, 0x4000000000000, x1, 240, x2)
+
+inst_62:
+// rs2_val == 2251799813685248, rs1_val == 262144
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:0x8000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x40000, 0x8000000000000, x1, 248, x2)
+
+inst_63:
+// rs2_val == 4503599627370496, rs1_val == -262145
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x40001; op2val:0x10000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x40001, 0x10000000000000, x1, 256, x2)
+
+inst_64:
+// rs2_val == 9007199254740992,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x6; op2val:0x20000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x6, 0x20000000000000, x1, 264, x2)
+
+inst_65:
+// rs2_val == 18014398509481984, rs1_val == -32769
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x8001; op2val:0x40000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x8001, 0x40000000000000, x1, 272, x2)
+
+inst_66:
+// rs2_val == 36028797018963968,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x80000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x80000000000000, x1, 280, x2)
+
+inst_67:
+// rs2_val == 72057594037927936,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x100000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x66, 0x6666666666666665, 0x100000000000000, x1, 288, x2)
+
+inst_68:
+// rs2_val == 144115188075855872, rs1_val == 1152921504606846976
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000000; op2val:0x200000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x8, 0x1000000000000000, 0x200000000000000, x1, 296, x2)
+
+inst_69:
+// rs2_val == 288230376151711744,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x8000000; op2val:0x400000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x8000000, 0x400000000000000, x1, 304, x2)
+
+inst_70:
+// rs2_val == 576460752303423488, rs1_val == -65537
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:0x800000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x10001, 0x800000000000000, x1, 312, x2)
+
+inst_71:
+// rs2_val == 1152921504606846976, rs1_val == -9007199254740993
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000000001; op2val:0x1000000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x20000000000001, 0x1000000000000000, x1, 320, x2)
+
+inst_72:
+// rs2_val == 2305843009213693952, rs1_val == -1099511627777
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:0x2000000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x10000000001, 0x2000000000000000, x1, 328, x2)
+
+inst_73:
+// rs2_val == 4611686018427387904,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4000000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x4000000000000000, x1, 336, x2)
+
+inst_74:
+// rs2_val == -2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x2
+TEST_RR_OP(div, x12, x10, x11, -0x2, 0x4, -0x2, x1, 344, x2)
+
+inst_75:
+// rs2_val == -3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x3
+TEST_RR_OP(div, x12, x10, x11, -0x2222222222222222, 0x6666666666666666, -0x3, x1, 352, x2)
+
+inst_76:
+// rs2_val == -5, rs1_val == -3
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x3; op2val:-0x5
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x3, -0x5, x1, 360, x2)
+
+inst_77:
+// rs2_val == -17, rs1_val == 18014398509481984
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000000; op2val:-0x11
+TEST_RR_OP(div, x12, x10, x11, -0x3c3c3c3c3c3c3, 0x40000000000000, -0x11, x1, 368, x2)
+
+inst_78:
+// rs2_val == -65, rs1_val == -33
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x21; op2val:-0x41
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x21, -0x41, x1, 376, x2)
+
+inst_79:
+// rs2_val == -129,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x9; op2val:-0x81
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x9, -0x81, x1, 384, x2)
+
+inst_80:
+// rs2_val == -257, rs1_val == 2097152
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:-0x101
+TEST_RR_OP(div, x12, x10, x11, -0x1fe0, 0x200000, -0x101, x1, 392, x2)
+
+inst_81:
+// rs2_val == -513, rs1_val == 2251799813685248
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:-0x201
+TEST_RR_OP(div, x12, x10, x11, -0x3fe00ff803f, 0x8000000000000, -0x201, x1, 400, x2)
+
+inst_82:
+// rs2_val == -1025,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x401
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, -0x401, x1, 408, x2)
+
+inst_83:
+// rs2_val == -2049, rs1_val == 4096
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x1000; op2val:-0x801
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0x1000, -0x801, x1, 416, x2)
+
+inst_84:
+// rs2_val == -4097, rs1_val == -4097
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x1001; op2val:-0x1001
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0x1001, -0x1001, x1, 424, x2)
+
+inst_85:
+// rs2_val == -8193, rs1_val == 8192
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:-0x2001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2000, -0x2001, x1, 432, x2)
+
+inst_86:
+// rs2_val == -16385, rs1_val == 32768
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x8000; op2val:-0x4001
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0x8000, -0x4001, x1, 440, x2)
+
+inst_87:
+// rs2_val == -32769, rs1_val == 2
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x8001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, -0x8001, x1, 448, x2)
+
+inst_88:
+// rs2_val == -65537,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2000; op2val:-0x10001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2000, -0x10001, x1, 456, x2)
+
+inst_89:
+// rs2_val == -131073,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:-0x20001
+TEST_RR_OP(div, x12, x10, x11, -0xfff, 0x20000000, -0x20001, x1, 464, x2)
+
+inst_90:
+// rs2_val == -262145, rs1_val == -129
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x81; op2val:-0x40001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x81, -0x40001, x1, 472, x2)
+
+inst_91:
+// rs2_val == -524289, rs1_val == 2147483648
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x80000000; op2val:-0x80001
+TEST_RR_OP(div, x12, x10, x11, -0xfff, 0x80000000, -0x80001, x1, 480, x2)
+
+inst_92:
+// rs2_val == -1048577,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x100001
+TEST_RR_OP(div, x12, x10, x11, -0xb50, 0xb504f333, -0x100001, x1, 488, x2)
+
+inst_93:
+// rs2_val == -2097153,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x200001
+TEST_RR_OP(div, x12, x10, x11, 0x5a8, -0xb504f332, -0x200001, x1, 496, x2)
+
+inst_94:
+// rs2_val == -4194305, rs1_val == -5
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:-0x400001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x5, -0x400001, x1, 504, x2)
+
+inst_95:
+// rs2_val == -8388609, rs1_val == -16385
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x4001; op2val:-0x800001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x4001, -0x800001, x1, 512, x2)
+
+inst_96:
+// rs2_val == -16777217,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x80000001; op2val:-0x1000001
+TEST_RR_OP(div, x12, x10, x11, 0x7f, -0x80000001, -0x1000001, x1, 520, x2)
+
+inst_97:
+// rs2_val == -33554433, rs1_val == 65536
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x10000; op2val:-0x2000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x10000, -0x2000001, x1, 528, x2)
+
+inst_98:
+// rs2_val == -67108865,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x200000; op2val:-0x4000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x200000, -0x4000001, x1, 536, x2)
+
+inst_99:
+// rs2_val == -134217729, rs1_val == -549755813889
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:-0x8000001
+TEST_RR_OP(div, x12, x10, x11, 0xfff, -0x8000000001, -0x8000001, x1, 544, x2)
+
+inst_100:
+// rs2_val == -268435457,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x40000; op2val:-0x10000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x40000, -0x10000001, x1, 552, x2)
+
+inst_101:
+// rs2_val == -536870913,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x8000000000000; op2val:-0x20000001
+TEST_RR_OP(div, x12, x10, x11, -0x3fffff, 0x8000000000000, -0x20000001, x1, 560, x2)
+
+inst_102:
+// rs2_val == -1073741825,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:-0x40000001
+TEST_RR_OP(div, x12, x10, x11, -0x3f, 0x1000000000, -0x40000001, x1, 568, x2)
+
+inst_103:
+// rs2_val == -2147483649, rs1_val == -67108865
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x4000001; op2val:-0x80000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x4000001, -0x80000001, x1, 576, x2)
+
+inst_104:
+// rs2_val == -4294967297, rs1_val == 4503599627370496
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x10000000000000; op2val:-0x100000001
+TEST_RR_OP(div, x12, x10, x11, -0xfffff, 0x10000000000000, -0x100000001, x1, 584, x2)
+
+inst_105:
+// rs2_val == -8589934593, rs1_val == 4194304
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x400000; op2val:-0x200000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x400000, -0x200000001, x1, 592, x2)
+
+inst_106:
+// rs2_val == -17179869185,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000001; op2val:-0x400000001
+TEST_RR_OP(div, x12, x10, x11, 0x3f, -0x10000000001, -0x400000001, x1, 600, x2)
+
+inst_107:
+// rs2_val == -34359738369,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x800000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x10001, -0x800000001, x1, 608, x2)
+
+inst_108:
+// rs2_val == -68719476737,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xa; op2val:-0x1000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xa, -0x1000000001, x1, 616, x2)
+
+inst_109:
+// rs2_val == -274877906945,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x4000000001
+TEST_RR_OP(div, x12, x10, x11, -0x1555555, 0x5555555555555554, -0x4000000001, x1, 624, x2)
+
+inst_110:
+// rs2_val == -549755813889,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x20000000; op2val:-0x8000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x20000000, -0x8000000001, x1, 632, x2)
+
+inst_111:
+// rs2_val == -1099511627777,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x10000000; op2val:-0x10000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x10000000, -0x10000000001, x1, 640, x2)
+
+inst_112:
+// rs2_val == -2199023255553,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x20000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, -0x20000000001, x1, 648, x2)
+
+inst_113:
+// rs2_val == -4398046511105,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000; op2val:-0x40000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x1000000000, -0x40000000001, x1, 656, x2)
+
+inst_114:
+// rs2_val == -8796093022209,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x40000000; op2val:-0x80000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x40000000, -0x80000000001, x1, 664, x2)
+
+inst_115:
+// rs2_val == -17592186044417,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5; op2val:-0x100000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x5, -0x100000000001, x1, 672, x2)
+
+inst_116:
+// rs2_val == -35184372088833,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000; op2val:-0x200000000001
+TEST_RR_OP(div, x12, x10, x11, -0x1f, 0x4000000000000, -0x200000000001, x1, 680, x2)
+
+inst_117:
+// rs2_val == -70368744177665,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x10001; op2val:-0x400000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x10001, -0x400000000001, x1, 688, x2)
+
+inst_118:
+// rs2_val == -140737488355329,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x800000000001
+TEST_RR_OP(div, x12, x10, x11, -0xaaaa, 0x5555555555555554, -0x800000000001, x1, 696, x2)
+
+inst_119:
+// rs2_val == -281474976710657,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x7; op2val:-0x1000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x7, -0x1000000000001, x1, 704, x2)
+
+inst_120:
+// rs2_val == -562949953421313, rs1_val == 16777216
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x1000000; op2val:-0x2000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x1000000, -0x2000000000001, x1, 712, x2)
+
+inst_121:
+// rs2_val == -1125899906842625, rs1_val == -9
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x9; op2val:-0x4000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x9, -0x4000000000001, x1, 720, x2)
+
+inst_122:
+// rs2_val == -2251799813685249,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x2; op2val:-0x8000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x2, -0x8000000000001, x1, 728, x2)
+
+inst_123:
+// rs2_val == -4503599627370497, rs1_val == 2048
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x800; op2val:-0x10000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x800, -0x10000000000001, x1, 736, x2)
+
+inst_124:
+// rs2_val == -9007199254740993,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x20000000000001
+TEST_RR_OP(div, x12, x10, x11, -0x2aa, 0x5555555555555555, -0x20000000000001, x1, 744, x2)
+
+inst_125:
+// rs2_val == -18014398509481985, rs1_val == 288230376151711744
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000000; op2val:-0x40000000000001
+TEST_RR_OP(div, x12, x10, x11, -0xf, 0x400000000000000, -0x40000000000001, x1, 752, x2)
+
+inst_126:
+// rs2_val == -36028797018963969, rs1_val == -70368744177665
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000001; op2val:-0x80000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x400000000001, -0x80000000000001, x1, 760, x2)
+
+inst_127:
+// rs2_val == -72057594037927937,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x100000000000001
+TEST_RR_OP(div, x12, x10, x11, -0x66, 0x6666666666666667, -0x100000000000001, x1, 768, x2)
+
+inst_128:
+// rs2_val == -144115188075855873,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x20000000001; op2val:-0x200000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x20000000001, -0x200000000000001, x1, 776, x2)
+
+inst_129:
+// rs2_val == -288230376151711745,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x4; op2val:-0x400000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x4, -0x400000000000001, x1, 784, x2)
+
+inst_130:
+// rs2_val == -576460752303423489, rs1_val == -140737488355329
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000001; op2val:-0x800000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x800000000001, -0x800000000000001, x1, 792, x2)
+
+inst_131:
+// rs2_val == -1152921504606846977, rs1_val == 16384
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4000; op2val:-0x1000000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4000, -0x1000000000000001, x1, 800, x2)
+
+inst_132:
+// rs2_val == -2305843009213693953,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x2000000000000001
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0x3333333333333333, -0x2000000000000001, x1, 808, x2)
+
+inst_133:
+// rs2_val == -4611686018427387905, rs1_val == -33554433
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x2000001; op2val:-0x4000000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x2000001, -0x4000000000000001, x1, 816, x2)
+
+inst_134:
+// rs2_val == 6148914691236517205, rs1_val == 32
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x20; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x20, 0x5555555555555555, x1, 824, x2)
+
+inst_135:
+// rs2_val == -6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000001; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x8000000001, -0x5555555555555556, x1, 832, x2)
+
+inst_136:
+// rs1_val == 64,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x40; op2val:-0x2000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x40, -0x2000001, x1, 840, x2)
+
+inst_137:
+// rs1_val == 128,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x80; op2val:0x9
+TEST_RR_OP(div, x12, x10, x11, 0xe, 0x80, 0x9, x1, 848, x2)
+
+inst_138:
+// rs1_val == 512,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x200; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x200, 0x6666666666666665, x1, 856, x2)
+
+inst_139:
+// rs1_val == 1024,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x400; op2val:-0x41
+TEST_RR_OP(div, x12, x10, x11, -0xf, 0x400, -0x41, x1, 864, x2)
+
+inst_140:
+// rs1_val == 524288,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x80000; op2val:-0x10001
+TEST_RR_OP(div, x12, x10, x11, -0x7, 0x80000, -0x10001, x1, 872, x2)
+
+inst_141:
+// rs1_val == 1048576,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x100000; op2val:0x800000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x100000, 0x800000000, x1, 880, x2)
+
+inst_142:
+// rs1_val == 8388608,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x800000; op2val:0x100000
+TEST_RR_OP(div, x12, x10, x11, 0x8, 0x800000, 0x100000, x1, 888, x2)
+
+inst_143:
+// rs1_val == 33554432,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2000000; op2val:0x2000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2000000, 0x2000000000000, x1, 896, x2)
+
+inst_144:
+// rs1_val == 67108864,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4000000; op2val:0x100000
+TEST_RR_OP(div, x12, x10, x11, 0x40, 0x4000000, 0x100000, x1, 904, x2)
+
+inst_145:
+// rs1_val == 4294967296,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x100000000; op2val:0x100
+TEST_RR_OP(div, x12, x10, x11, 0x1000000, 0x100000000, 0x100, x1, 912, x2)
+
+inst_146:
+// rs1_val == 8589934592,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x200000000; op2val:-0x10001
+TEST_RR_OP(div, x12, x10, x11, -0x1fffe, 0x200000000, -0x10001, x1, 920, x2)
+
+inst_147:
+// rs1_val == 17179869184,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x400000000; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x400000000, 0x5555555555555555, x1, 928, x2)
+
+inst_148:
+// rs1_val == 137438953472,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000; op2val:0x200000000
+TEST_RR_OP(div, x12, x10, x11, 0x10, 0x2000000000, 0x200000000, x1, 936, x2)
+
+inst_149:
+// rs1_val == 4398046511104,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x40000000000; op2val:-0x1000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x40000000000, -0x1000000000001, x1, 944, x2)
+
+inst_150:
+// rs1_val == 8796093022208,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x80000000000; op2val:-0x40000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x80000000000, -0x40000000000001, x1, 952, x2)
+
+inst_151:
+// rs1_val == 70368744177664,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x400000000000; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x5a82, 0x400000000000, -0xb504f333, x1, 960, x2)
+
+inst_152:
+// rs1_val == 140737488355328,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x800000000000; op2val:0x100000
+TEST_RR_OP(div, x12, x10, x11, 0x8000000, 0x800000000000, 0x100000, x1, 968, x2)
+
+inst_153:
+// rs1_val == 281474976710656,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x1000000000000; op2val:-0xa
+TEST_RR_OP(div, x12, x10, x11, -0x199999999999, 0x1000000000000, -0xa, x1, 976, x2)
+
+inst_154:
+// rs1_val == 562949953421312,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0xaaaaaaaaaaaa, 0x2000000000000, 0x3, x1, 984, x2)
+
+inst_155:
+// rs1_val == 9007199254740992,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x20000000000000; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x6666666666666, 0x20000000000000, 0x5, x1, 992, x2)
+
+inst_156:
+// rs1_val == 144115188075855872,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x200000000000000; op2val:-0x2000000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x200000000000000, -0x2000000000000001, x1, 1000, x2)
+
+inst_157:
+// rs1_val == 2305843009213693952,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2000000000000000; op2val:-0x801
+TEST_RR_OP(div, x12, x10, x11, -0x3ff800ffe003f, 0x2000000000000000, -0x801, x1, 1008, x2)
+
+inst_158:
+// rs1_val == 4611686018427387904,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4000000000000000; op2val:-0x2
+TEST_RR_OP(div, x12, x10, x11, -0x2000000000000000, 0x4000000000000000, -0x2, x1, 1016, x2)
+
+inst_159:
+// rs1_val == -17,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x11; op2val:-0x80000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x11, -0x80000000000001, x1, 1024, x2)
+
+inst_160:
+// rs1_val == -257,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x101; op2val:0x800000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x101, 0x800000000000, x1, 1032, x2)
+
+inst_161:
+// rs1_val == -513,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x201; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, -0x66, -0x201, 0x5, x1, 1040, x2)
+
+inst_162:
+// rs1_val == -2049,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x801; op2val:0x10000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x801, 0x10000, x1, 1048, x2)
+
+inst_163:
+// rs1_val == -8193,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x2001; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x2001, 0x3333333333333334, x1, 1056, x2)
+
+inst_164:
+// rs1_val == -131073,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x20001; op2val:0x80000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x20001, 0x80000000, x1, 1064, x2)
+
+inst_165:
+// rs1_val == -524289,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x80001; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, -0x40000, -0x80001, 0x2, x1, 1072, x2)
+
+inst_166:
+// rs1_val == -1048577,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x100001; op2val:0x1000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x100001, 0x1000000, x1, 1080, x2)
+
+inst_167:
+// rs1_val == -2097153,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x200001; op2val:-0x2000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x200001, -0x2000000000001, x1, 1088, x2)
+
+inst_168:
+// rs1_val == -8388609,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x800001; op2val:-0x201
+TEST_RR_OP(div, x12, x10, x11, 0x3fe0, -0x800001, -0x201, x1, 1096, x2)
+
+inst_169:
+// rs1_val == -16777217,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x1000001; op2val:-0x800000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x1000001, -0x800000000001, x1, 1104, x2)
+
+inst_170:
+// rs1_val == -134217729,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x8000001; op2val:-0x2000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x8000001, -0x2000000001, x1, 1112, x2)
+
+inst_171:
+// rs1_val == -268435457,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x10000001; op2val:0x1000000
+TEST_RR_OP(div, x12, x10, x11, -0x10, -0x10000001, 0x1000000, x1, 1120, x2)
+
+inst_172:
+// rs1_val == -536870913,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x20000001; op2val:0x1000000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x20000001, 0x1000000000000000, x1, 1128, x2)
+
+inst_173:
+// rs1_val == -1073741825,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x40000001; op2val:-0x4000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x40000001, -0x4000000001, x1, 1136, x2)
+
+inst_174:
+// rs1_val == -8589934593,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x200000001; op2val:-0x21
+TEST_RR_OP(div, x12, x10, x11, 0xf83e0f8, -0x200000001, -0x21, x1, 1144, x2)
+
+inst_175:
+// rs1_val == -34359738369,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x800000001; op2val:0x2000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x800000001, 0x2000000000000, x1, 1152, x2)
+
+inst_176:
+// rs1_val == -68719476737,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000001; op2val:-0x1000000001
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0x1000000001, -0x1000000001, x1, 1160, x2)
+
+inst_177:
+// rs1_val == -137438953473,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000001; op2val:-0x200000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x2000000001, -0x200000000000001, x1, 1168, x2)
+
+inst_178:
+// rs1_val == -274877906945,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000001; op2val:0x800000000
+TEST_RR_OP(div, x12, x10, x11, -0x8, -0x4000000001, 0x800000000, x1, 1176, x2)
+
+inst_179:
+// rs1_val == -4398046511105,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x40000000001; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x40000000001, 0x3333333333333333, x1, 1184, x2)
+
+inst_180:
+// rs1_val == -8796093022209,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x80000000001; op2val:0x20
+TEST_RR_OP(div, x12, x10, x11, -0x4000000000, -0x80000000001, 0x20, x1, 1192, x2)
+
+inst_181:
+// rs1_val == -17592186044417,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x100000000001; op2val:0x200000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x100000000001, 0x200000000000, x1, 1200, x2)
+
+inst_182:
+// rs1_val == -35184372088833,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x200000000001; op2val:-0x1000001
+TEST_RR_OP(div, x12, x10, x11, 0x1fffff, -0x200000000001, -0x1000001, x1, 1208, x2)
+
+inst_183:
+// rs1_val == -281474976710657,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x1000000000001; op2val:-0x20001
+TEST_RR_OP(div, x12, x10, x11, 0x7fffc000, -0x1000000000001, -0x20001, x1, 1216, x2)
+
+inst_184:
+// rs1_val == -562949953421313,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x2000000000001; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x2d413, -0x2000000000001, -0xb504f332, x1, 1224, x2)
+
+inst_185:
+// rs1_val == -1125899906842625,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000001; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x4000000000001, 0x5555555555555555, x1, 1232, x2)
+
+inst_186:
+// rs1_val == -2251799813685249,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x8000000000001; op2val:0x20000000000000
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x8000000000001, 0x20000000000000, x1, 1240, x2)
+
+inst_187:
+// rs1_val == -4503599627370497,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x10000000000001; op2val:-0x800000000000001
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x10000000000001, -0x800000000000001, x1, 1248, x2)
+
+inst_188:
+// rs1_val == -288230376151711745,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x400000000000001; op2val:-0x41
+TEST_RR_OP(div, x12, x10, x11, 0xfc0fc0fc0fc0f, -0x400000000000001, -0x41, x1, 1256, x2)
+
+inst_189:
+// rs1_val == -576460752303423489,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x800000000000001; op2val:-0x6
+TEST_RR_OP(div, x12, x10, x11, 0x155555555555555, -0x800000000000001, -0x6, x1, 1264, x2)
+
+inst_190:
+// rs1_val == -4611686018427387905,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x4000000000000001; op2val:0x400000000000000
+TEST_RR_OP(div, x12, x10, x11, -0x10, -0x4000000000000001, 0x400000000000000, x1, 1272, x2)
+
+inst_191:
+// rs1_val == -6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x401
+TEST_RR_OP(div, x12, x10, x11, 0x15500155001550, -0x5555555555555556, -0x401, x1, 1280, x2)
+
+inst_192:
+// rs1_val==3 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x5555555555555555, x1, 1288, x2)
+
+inst_193:
+// rs1_val==3 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, -0x5555555555555556, x1, 1296, x2)
+
+inst_194:
+// rs1_val==3 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x5, x1, 1304, x2)
+
+inst_195:
+// rs1_val==3 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x3333333333333333, x1, 1312, x2)
+
+inst_196:
+// rs1_val==3 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x6666666666666666, x1, 1320, x2)
+
+inst_197:
+// rs1_val==3 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, -0xb504f333, x1, 1328, x2)
+
+inst_198:
+// rs1_val==3 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0xb504f333, x1, 1336, x2)
+
+inst_199:
+// rs1_val==3 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x3, 0x2, x1, 1344, x2)
+
+inst_200:
+// rs1_val==3 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x5555555555555554, x1, 1352, x2)
+
+inst_201:
+// rs1_val==3 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x3, 0x0, x1, 1360, x2)
+
+inst_202:
+// rs1_val==3 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x4, x1, 1368, x2)
+
+inst_203:
+// rs1_val==3 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x3333333333333332, x1, 1376, x2)
+
+inst_204:
+// rs1_val==3 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x6666666666666665, x1, 1384, x2)
+
+inst_205:
+// rs1_val==3 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0xb504f332, x1, 1392, x2)
+
+inst_206:
+// rs1_val==3 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x5555555555555556, x1, 1400, x2)
+
+inst_207:
+// rs1_val==3 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, -0x5555555555555555, x1, 1408, x2)
+
+inst_208:
+// rs1_val==3 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x6, x1, 1416, x2)
+
+inst_209:
+// rs1_val==3 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x3333333333333334, x1, 1424, x2)
+
+inst_210:
+// rs1_val==3 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0x6666666666666667, x1, 1432, x2)
+
+inst_211:
+// rs1_val==3 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, -0xb504f332, x1, 1440, x2)
+
+inst_212:
+// rs1_val==3 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3, 0xb504f334, x1, 1448, x2)
+
+inst_213:
+// rs1_val==6148914691236517205 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1c71c71c71c71c71, 0x5555555555555555, 0x3, x1, 1456, x2)
+
+inst_214:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555555, 0x5555555555555555, x1, 1464, x2)
+
+inst_215:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555555, -0x5555555555555556, x1, 1472, x2)
+
+inst_216:
+// rs1_val==6148914691236517205 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x1111111111111111, 0x5555555555555555, 0x5, x1, 1480, x2)
+
+inst_217:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555555, 0x3333333333333333, x1, 1488, x2)
+
+inst_218:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555555, 0x6666666666666666, x1, 1496, x2)
+
+inst_219:
+// rs1_val==6148914691236517205 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x78adf778, 0x5555555555555555, -0xb504f333, x1, 1504, x2)
+
+inst_220:
+// rs1_val==6148914691236517205 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x78adf778, 0x5555555555555555, 0xb504f333, x1, 1512, x2)
+
+inst_221:
+// rs1_val==6148914691236517205 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x2aaaaaaaaaaaaaaa, 0x5555555555555555, 0x2, x1, 1520, x2)
+
+inst_222:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555555, 0x5555555555555554, x1, 1528, x2)
+
+inst_223:
+// rs1_val==6148914691236517205 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x5555555555555555, 0x0, x1, 1536, x2)
+
+inst_224:
+// rs1_val==6148914691236517205 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x1555555555555555, 0x5555555555555555, 0x4, x1, 1544, x2)
+
+inst_225:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555555, 0x3333333333333332, x1, 1552, x2)
+
+inst_226:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555555, 0x6666666666666665, x1, 1560, x2)
+
+inst_227:
+// rs1_val==6148914691236517205 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x78adf779, 0x5555555555555555, 0xb504f332, x1, 1568, x2)
+
+inst_228:
+// rs1_val==6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555555, 0x5555555555555556, x1, 1576, x2)
+
+inst_229:
+// rs1_val==6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0x5555555555555555, -0x5555555555555555, x1, 1584, x2)
+
+inst_230:
+// rs1_val==6148914691236517205 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0xe38e38e38e38e38, 0x5555555555555555, 0x6, x1, 1592, x2)
+
+inst_231:
+// rs1_val==6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555555, 0x3333333333333334, x1, 1600, x2)
+
+inst_232:
+// rs1_val==6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555555, 0x6666666666666667, x1, 1608, x2)
+
+inst_233:
+// rs1_val==6148914691236517205 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x78adf779, 0x5555555555555555, -0xb504f332, x1, 1616, x2)
+
+inst_234:
+// rs1_val==6148914691236517205 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x78adf777, 0x5555555555555555, 0xb504f334, x1, 1624, x2)
+
+inst_235:
+// rs1_val==-6148914691236517206 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, -0x1c71c71c71c71c72, -0x5555555555555556, 0x3, x1, 1632, x2)
+
+inst_236:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0x5555555555555556, 0x5555555555555555, x1, 1640, x2)
+
+inst_237:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0x5555555555555556, -0x5555555555555556, x1, 1648, x2)
+
+inst_238:
+// rs1_val==-6148914691236517206 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, -0x1111111111111111, -0x5555555555555556, 0x5, x1, 1656, x2)
+
+inst_239:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0x5555555555555556, 0x3333333333333333, x1, 1664, x2)
+
+inst_240:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x5555555555555556, 0x6666666666666666, x1, 1672, x2)
+
+inst_241:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x78adf778, -0x5555555555555556, -0xb504f333, x1, 1680, x2)
+
+inst_242:
+// rs1_val==-6148914691236517206 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x78adf778, -0x5555555555555556, 0xb504f333, x1, 1688, x2)
+
+inst_243:
+// rs1_val==-6148914691236517206 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, -0x2aaaaaaaaaaaaaab, -0x5555555555555556, 0x2, x1, 1696, x2)
+
+inst_244:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0x5555555555555556, 0x5555555555555554, x1, 1704, x2)
+
+inst_245:
+// rs1_val==-6148914691236517206 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, -0x5555555555555556, 0x0, x1, 1712, x2)
+
+inst_246:
+// rs1_val==-6148914691236517206 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, -0x1555555555555555, -0x5555555555555556, 0x4, x1, 1720, x2)
+
+inst_247:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0x5555555555555556, 0x3333333333333332, x1, 1728, x2)
+
+inst_248:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x5555555555555556, 0x6666666666666665, x1, 1736, x2)
+
+inst_249:
+// rs1_val==-6148914691236517206 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x78adf779, -0x5555555555555556, 0xb504f332, x1, 1744, x2)
+
+inst_250:
+// rs1_val==-6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0x5555555555555556, 0x5555555555555556, x1, 1752, x2)
+
+inst_251:
+// rs1_val==-6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0x5555555555555556, -0x5555555555555555, x1, 1760, x2)
+
+inst_252:
+// rs1_val==-6148914691236517206 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, -0xe38e38e38e38e39, -0x5555555555555556, 0x6, x1, 1768, x2)
+
+inst_253:
+// rs1_val==-6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0x5555555555555556, 0x3333333333333334, x1, 1776, x2)
+
+inst_254:
+// rs1_val==-6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x5555555555555556, 0x6666666666666667, x1, 1784, x2)
+
+inst_255:
+// rs1_val==-6148914691236517206 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x78adf779, -0x5555555555555556, -0xb504f332, x1, 1792, x2)
+
+inst_256:
+// rs1_val==-6148914691236517206 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, -0x78adf777, -0x5555555555555556, 0xb504f334, x1, 1800, x2)
+
+inst_257:
+// rs1_val==5 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5, 0x3, x1, 1808, x2)
+
+inst_258:
+// rs1_val==5 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x5555555555555555, x1, 1816, x2)
+
+inst_259:
+// rs1_val==5 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, -0x5555555555555556, x1, 1824, x2)
+
+inst_260:
+// rs1_val==5 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5, 0x5, x1, 1832, x2)
+
+inst_261:
+// rs1_val==5 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x3333333333333333, x1, 1840, x2)
+
+inst_262:
+// rs1_val==5 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x6666666666666666, x1, 1848, x2)
+
+inst_263:
+// rs1_val==5 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, -0xb504f333, x1, 1856, x2)
+
+inst_264:
+// rs1_val==5 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0xb504f333, x1, 1864, x2)
+
+inst_265:
+// rs1_val==5 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x5, 0x2, x1, 1872, x2)
+
+inst_266:
+// rs1_val==5 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x5555555555555554, x1, 1880, x2)
+
+inst_267:
+// rs1_val==5 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x5, 0x0, x1, 1888, x2)
+
+inst_268:
+// rs1_val==5 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x3333333333333332, x1, 1896, x2)
+
+inst_269:
+// rs1_val==5 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x6666666666666665, x1, 1904, x2)
+
+inst_270:
+// rs1_val==5 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0xb504f332, x1, 1912, x2)
+
+inst_271:
+// rs1_val==5 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x5555555555555556, x1, 1920, x2)
+
+inst_272:
+// rs1_val==5 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, -0x5555555555555555, x1, 1928, x2)
+
+inst_273:
+// rs1_val==5 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x6, x1, 1936, x2)
+
+inst_274:
+// rs1_val==5 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x3333333333333334, x1, 1944, x2)
+
+inst_275:
+// rs1_val==5 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0x6666666666666667, x1, 1952, x2)
+
+inst_276:
+// rs1_val==5 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, -0xb504f332, x1, 1960, x2)
+
+inst_277:
+// rs1_val==5 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5, 0xb504f334, x1, 1968, x2)
+
+inst_278:
+// rs1_val==3689348814741910323 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1111111111111111, 0x3333333333333333, 0x3, x1, 1976, x2)
+
+inst_279:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333333, 0x5555555555555555, x1, 1984, x2)
+
+inst_280:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333333, -0x5555555555555556, x1, 1992, x2)
+
+inst_281:
+// rs1_val==3689348814741910323 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0xa3d70a3d70a3d70, 0x3333333333333333, 0x5, x1, 2000, x2)
+
+inst_282:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x3333333333333333, 0x3333333333333333, x1, 2008, x2)
+
+inst_283:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333333, 0x6666666666666666, x1, 2016, x2)
+
+inst_284:
+// rs1_val==3689348814741910323 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x48686148, 0x3333333333333333, -0xb504f333, x1, 2024, x2)
+
+inst_285:
+// rs1_val==3689348814741910323 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x48686148, 0x3333333333333333, 0xb504f333, x1, 2032, x2)
+
+inst_286:
+// rs1_val==3689348814741910323 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x1999999999999999, 0x3333333333333333, 0x2, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_1)
+
+inst_287:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333333, 0x5555555555555554, x1, 0, x2)
+
+inst_288:
+// rs1_val==3689348814741910323 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x3333333333333333, 0x0, x1, 8, x2)
+
+inst_289:
+// rs1_val==3689348814741910323 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0xccccccccccccccc, 0x3333333333333333, 0x4, x1, 16, x2)
+
+inst_290:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x3333333333333333, 0x3333333333333332, x1, 24, x2)
+
+inst_291:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333333, 0x6666666666666665, x1, 32, x2)
+
+inst_292:
+// rs1_val==3689348814741910323 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x48686148, 0x3333333333333333, 0xb504f332, x1, 40, x2)
+
+inst_293:
+// rs1_val==3689348814741910323 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333333, 0x5555555555555556, x1, 48, x2)
+
+inst_294:
+// rs1_val==3689348814741910323 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333333, -0x5555555555555555, x1, 56, x2)
+
+inst_295:
+// rs1_val==3689348814741910323 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x888888888888888, 0x3333333333333333, 0x6, x1, 64, x2)
+
+inst_296:
+// rs1_val==3689348814741910323 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333333, 0x3333333333333334, x1, 72, x2)
+
+inst_297:
+// rs1_val==3689348814741910323 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333333, 0x6666666666666667, x1, 80, x2)
+
+inst_298:
+// rs1_val==3689348814741910323 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x48686148, 0x3333333333333333, -0xb504f332, x1, 88, x2)
+
+inst_299:
+// rs1_val==3689348814741910323 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333333; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x48686147, 0x3333333333333333, 0xb504f334, x1, 96, x2)
+
+inst_300:
+// rs1_val==7378697629483820646 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x2222222222222222, 0x6666666666666666, 0x3, x1, 104, x2)
+
+inst_301:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666666, 0x5555555555555555, x1, 112, x2)
+
+inst_302:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0x6666666666666666, -0x5555555555555556, x1, 120, x2)
+
+inst_303:
+// rs1_val==7378697629483820646 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x147ae147ae147ae1, 0x6666666666666666, 0x5, x1, 128, x2)
+
+inst_304:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x6666666666666666, 0x3333333333333333, x1, 136, x2)
+
+inst_305:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666666, 0x6666666666666666, x1, 144, x2)
+
+inst_306:
+// rs1_val==7378697629483820646 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x90d0c290, 0x6666666666666666, -0xb504f333, x1, 152, x2)
+
+inst_307:
+// rs1_val==7378697629483820646 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x90d0c290, 0x6666666666666666, 0xb504f333, x1, 160, x2)
+
+inst_308:
+// rs1_val==7378697629483820646 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x3333333333333333, 0x6666666666666666, 0x2, x1, 168, x2)
+
+inst_309:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666666, 0x5555555555555554, x1, 176, x2)
+
+inst_310:
+// rs1_val==7378697629483820646 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x6666666666666666, 0x0, x1, 184, x2)
+
+inst_311:
+// rs1_val==7378697629483820646 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x1999999999999999, 0x6666666666666666, 0x4, x1, 192, x2)
+
+inst_312:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x6666666666666666, 0x3333333333333332, x1, 200, x2)
+
+inst_313:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666666, 0x6666666666666665, x1, 208, x2)
+
+inst_314:
+// rs1_val==7378697629483820646 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x90d0c291, 0x6666666666666666, 0xb504f332, x1, 216, x2)
+
+inst_315:
+// rs1_val==7378697629483820646 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666666, 0x5555555555555556, x1, 224, x2)
+
+inst_316:
+// rs1_val==7378697629483820646 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0x6666666666666666, -0x5555555555555555, x1, 232, x2)
+
+inst_317:
+// rs1_val==7378697629483820646 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x1111111111111111, 0x6666666666666666, 0x6, x1, 240, x2)
+
+inst_318:
+// rs1_val==7378697629483820646 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666666, 0x3333333333333334, x1, 248, x2)
+
+inst_319:
+// rs1_val==7378697629483820646 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6666666666666666, 0x6666666666666667, x1, 256, x2)
+
+inst_320:
+// rs1_val==7378697629483820646 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x90d0c291, 0x6666666666666666, -0xb504f332, x1, 264, x2)
+
+inst_321:
+// rs1_val==7378697629483820646 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666666; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x90d0c28f, 0x6666666666666666, 0xb504f334, x1, 272, x2)
+
+inst_322:
+// rs1_val==-3037000499 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, -0x3c56fbbb, -0xb504f333, 0x3, x1, 280, x2)
+
+inst_323:
+// rs1_val==-3037000499 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f333, 0x5555555555555555, x1, 288, x2)
+
+inst_324:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f333, -0x5555555555555556, x1, 296, x2)
+
+inst_325:
+// rs1_val==-3037000499 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, -0x243430a3, -0xb504f333, 0x5, x1, 304, x2)
+
+inst_326:
+// rs1_val==-3037000499 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f333, 0x3333333333333333, x1, 312, x2)
+
+inst_327:
+// rs1_val==-3037000499 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f333, 0x6666666666666666, x1, 320, x2)
+
+inst_328:
+// rs1_val==-3037000499 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0xb504f333, -0xb504f333, x1, 328, x2)
+
+inst_329:
+// rs1_val==-3037000499 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0xb504f333, 0xb504f333, x1, 336, x2)
+
+inst_330:
+// rs1_val==-3037000499 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, -0x5a827999, -0xb504f333, 0x2, x1, 344, x2)
+
+inst_331:
+// rs1_val==-3037000499 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f333, 0x5555555555555554, x1, 352, x2)
+
+inst_332:
+// rs1_val==-3037000499 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, -0xb504f333, 0x0, x1, 360, x2)
+
+inst_333:
+// rs1_val==-3037000499 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, -0x2d413ccc, -0xb504f333, 0x4, x1, 368, x2)
+
+inst_334:
+// rs1_val==-3037000499 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f333, 0x3333333333333332, x1, 376, x2)
+
+inst_335:
+// rs1_val==-3037000499 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f333, 0x6666666666666665, x1, 384, x2)
+
+inst_336:
+// rs1_val==-3037000499 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0xb504f333, 0xb504f332, x1, 392, x2)
+
+inst_337:
+// rs1_val==-3037000499 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f333, 0x5555555555555556, x1, 400, x2)
+
+inst_338:
+// rs1_val==-3037000499 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f333, -0x5555555555555555, x1, 408, x2)
+
+inst_339:
+// rs1_val==-3037000499 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, -0x1e2b7ddd, -0xb504f333, 0x6, x1, 416, x2)
+
+inst_340:
+// rs1_val==-3037000499 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f333, 0x3333333333333334, x1, 424, x2)
+
+inst_341:
+// rs1_val==-3037000499 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f333, 0x6666666666666667, x1, 432, x2)
+
+inst_342:
+// rs1_val==-3037000499 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0xb504f333, -0xb504f332, x1, 440, x2)
+
+inst_343:
+// rs1_val==-3037000499 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f333; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f333, 0xb504f334, x1, 448, x2)
+
+inst_344:
+// rs1_val==3037000499 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x3c56fbbb, 0xb504f333, 0x3, x1, 456, x2)
+
+inst_345:
+// rs1_val==3037000499 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f333, 0x5555555555555555, x1, 464, x2)
+
+inst_346:
+// rs1_val==3037000499 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f333, -0x5555555555555556, x1, 472, x2)
+
+inst_347:
+// rs1_val==3037000499 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x243430a3, 0xb504f333, 0x5, x1, 480, x2)
+
+inst_348:
+// rs1_val==3037000499 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f333, 0x3333333333333333, x1, 488, x2)
+
+inst_349:
+// rs1_val==3037000499 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f333, 0x6666666666666666, x1, 496, x2)
+
+inst_350:
+// rs1_val==3037000499 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0xb504f333, -0xb504f333, x1, 504, x2)
+
+inst_351:
+// rs1_val==3037000499 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0xb504f333, 0xb504f333, x1, 512, x2)
+
+inst_352:
+// rs1_val==3037000499 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x5a827999, 0xb504f333, 0x2, x1, 520, x2)
+
+inst_353:
+// rs1_val==3037000499 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f333, 0x5555555555555554, x1, 528, x2)
+
+inst_354:
+// rs1_val==3037000499 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0xb504f333, 0x0, x1, 536, x2)
+
+inst_355:
+// rs1_val==3037000499 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x2d413ccc, 0xb504f333, 0x4, x1, 544, x2)
+
+inst_356:
+// rs1_val==3037000499 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f333, 0x3333333333333332, x1, 552, x2)
+
+inst_357:
+// rs1_val==3037000499 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f333, 0x6666666666666665, x1, 560, x2)
+
+inst_358:
+// rs1_val==3037000499 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0xb504f333, 0xb504f332, x1, 568, x2)
+
+inst_359:
+// rs1_val==3037000499 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f333, 0x5555555555555556, x1, 576, x2)
+
+inst_360:
+// rs1_val==3037000499 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f333, -0x5555555555555555, x1, 584, x2)
+
+inst_361:
+// rs1_val==3037000499 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x1e2b7ddd, 0xb504f333, 0x6, x1, 592, x2)
+
+inst_362:
+// rs1_val==3037000499 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f333, 0x3333333333333334, x1, 600, x2)
+
+inst_363:
+// rs1_val==3037000499 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f333, 0x6666666666666667, x1, 608, x2)
+
+inst_364:
+// rs1_val==3037000499 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0xb504f333, -0xb504f332, x1, 616, x2)
+
+inst_365:
+// rs1_val==3037000499 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f333; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f333, 0xb504f334, x1, 624, x2)
+
+inst_366:
+// rs1_val==2 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x3, x1, 632, x2)
+
+inst_367:
+// rs1_val==2 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x5555555555555555, x1, 640, x2)
+
+inst_368:
+// rs1_val==2 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, -0x5555555555555556, x1, 648, x2)
+
+inst_369:
+// rs1_val==2 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x5, x1, 656, x2)
+
+inst_370:
+// rs1_val==2 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x3333333333333333, x1, 664, x2)
+
+inst_371:
+// rs1_val==2 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x6666666666666666, x1, 672, x2)
+
+inst_372:
+// rs1_val==2 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, -0xb504f333, x1, 680, x2)
+
+inst_373:
+// rs1_val==2 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0xb504f333, x1, 688, x2)
+
+inst_374:
+// rs1_val==2 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x2, 0x2, x1, 696, x2)
+
+inst_375:
+// rs1_val==2 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x5555555555555554, x1, 704, x2)
+
+inst_376:
+// rs1_val==2 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x2, 0x0, x1, 712, x2)
+
+inst_377:
+// rs1_val==2 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x4, x1, 720, x2)
+
+inst_378:
+// rs1_val==2 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x3333333333333332, x1, 728, x2)
+
+inst_379:
+// rs1_val==2 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x6666666666666665, x1, 736, x2)
+
+inst_380:
+// rs1_val==2 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0xb504f332, x1, 744, x2)
+
+inst_381:
+// rs1_val==2 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x5555555555555556, x1, 752, x2)
+
+inst_382:
+// rs1_val==2 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, -0x5555555555555555, x1, 760, x2)
+
+inst_383:
+// rs1_val==2 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x6, x1, 768, x2)
+
+inst_384:
+// rs1_val==2 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x3333333333333334, x1, 776, x2)
+
+inst_385:
+// rs1_val==2 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0x6666666666666667, x1, 784, x2)
+
+inst_386:
+// rs1_val==2 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, -0xb504f332, x1, 792, x2)
+
+inst_387:
+// rs1_val==2 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x2; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x2, 0xb504f334, x1, 800, x2)
+
+inst_388:
+// rs1_val==6148914691236517204 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1c71c71c71c71c71, 0x5555555555555554, 0x3, x1, 808, x2)
+
+inst_389:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555554, 0x5555555555555555, x1, 816, x2)
+
+inst_390:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555554, -0x5555555555555556, x1, 824, x2)
+
+inst_391:
+// rs1_val==6148914691236517204 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x1111111111111110, 0x5555555555555554, 0x5, x1, 832, x2)
+
+inst_392:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555554, 0x3333333333333333, x1, 840, x2)
+
+inst_393:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555554, 0x6666666666666666, x1, 848, x2)
+
+inst_394:
+// rs1_val==6148914691236517204 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x78adf778, 0x5555555555555554, -0xb504f333, x1, 856, x2)
+
+inst_395:
+// rs1_val==6148914691236517204 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x78adf778, 0x5555555555555554, 0xb504f333, x1, 864, x2)
+
+inst_396:
+// rs1_val==6148914691236517204 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x2aaaaaaaaaaaaaaa, 0x5555555555555554, 0x2, x1, 872, x2)
+
+inst_397:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555554, 0x5555555555555554, x1, 880, x2)
+
+inst_398:
+// rs1_val==6148914691236517204 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x5555555555555554, 0x0, x1, 888, x2)
+
+inst_399:
+// rs1_val==6148914691236517204 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x1555555555555555, 0x5555555555555554, 0x4, x1, 896, x2)
+
+inst_400:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555554, 0x3333333333333332, x1, 904, x2)
+
+inst_401:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555554, 0x6666666666666665, x1, 912, x2)
+
+inst_402:
+// rs1_val==6148914691236517204 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x78adf779, 0x5555555555555554, 0xb504f332, x1, 920, x2)
+
+inst_403:
+// rs1_val==6148914691236517204 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555554, 0x5555555555555556, x1, 928, x2)
+
+inst_404:
+// rs1_val==6148914691236517204 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555554, -0x5555555555555555, x1, 936, x2)
+
+inst_405:
+// rs1_val==6148914691236517204 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0xe38e38e38e38e38, 0x5555555555555554, 0x6, x1, 944, x2)
+
+inst_406:
+// rs1_val==6148914691236517204 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555554, 0x3333333333333334, x1, 952, x2)
+
+inst_407:
+// rs1_val==6148914691236517204 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555554, 0x6666666666666667, x1, 960, x2)
+
+inst_408:
+// rs1_val==6148914691236517204 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x78adf779, 0x5555555555555554, -0xb504f332, x1, 968, x2)
+
+inst_409:
+// rs1_val==6148914691236517204 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555554; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x78adf777, 0x5555555555555554, 0xb504f334, x1, 976, x2)
+
+inst_410:
+// rs1_val==0 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x3, x1, 984, x2)
+
+inst_411:
+// rs1_val==0 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x5555555555555555, x1, 992, x2)
+
+inst_412:
+// rs1_val==0 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, -0x5555555555555556, x1, 1000, x2)
+
+inst_413:
+// rs1_val==0 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x5, x1, 1008, x2)
+
+inst_414:
+// rs1_val==0 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x3333333333333333, x1, 1016, x2)
+
+inst_415:
+// rs1_val==0 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x6666666666666666, x1, 1024, x2)
+
+inst_416:
+// rs1_val==0 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, -0xb504f333, x1, 1032, x2)
+
+inst_417:
+// rs1_val==0 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0xb504f333, x1, 1040, x2)
+
+inst_418:
+// rs1_val==0 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, -0xb504f332, x1, 1048, x2)
+
+inst_419:
+// rs1_val==0 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0xb504f334, x1, 1056, x2)
+
+inst_420:
+// rs1_val==4 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x4, 0x3, x1, 1064, x2)
+
+inst_421:
+// rs1_val==4 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x5555555555555555, x1, 1072, x2)
+
+inst_422:
+// rs1_val==4 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, -0x5555555555555556, x1, 1080, x2)
+
+inst_423:
+// rs1_val==4 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x5, x1, 1088, x2)
+
+inst_424:
+// rs1_val==4 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x3333333333333333, x1, 1096, x2)
+
+inst_425:
+// rs1_val==4 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x6666666666666666, x1, 1104, x2)
+
+inst_426:
+// rs1_val==4 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, -0xb504f333, x1, 1112, x2)
+
+inst_427:
+// rs1_val==4 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0xb504f333, x1, 1120, x2)
+
+inst_428:
+// rs1_val==4 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x4, 0x2, x1, 1128, x2)
+
+inst_429:
+// rs1_val==4 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x5555555555555554, x1, 1136, x2)
+
+inst_430:
+// rs1_val==4 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x4, 0x0, x1, 1144, x2)
+
+inst_431:
+// rs1_val==4 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x4, 0x4, x1, 1152, x2)
+
+inst_432:
+// rs1_val==4 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x3333333333333332, x1, 1160, x2)
+
+inst_433:
+// rs1_val==4 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x6666666666666665, x1, 1168, x2)
+
+inst_434:
+// rs1_val==4 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0xb504f332, x1, 1176, x2)
+
+inst_435:
+// rs1_val==4 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x5555555555555556, x1, 1184, x2)
+
+inst_436:
+// rs1_val==4 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, -0x5555555555555555, x1, 1192, x2)
+
+inst_437:
+// rs1_val==4 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x6, x1, 1200, x2)
+
+inst_438:
+// rs1_val==4 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x3333333333333334, x1, 1208, x2)
+
+inst_439:
+// rs1_val==4 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0x6666666666666667, x1, 1216, x2)
+
+inst_440:
+// rs1_val==4 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, -0xb504f332, x1, 1224, x2)
+
+inst_441:
+// rs1_val==4 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x4; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x4, 0xb504f334, x1, 1232, x2)
+
+inst_442:
+// rs1_val==3689348814741910322 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1111111111111110, 0x3333333333333332, 0x3, x1, 1240, x2)
+
+inst_443:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333332, 0x5555555555555555, x1, 1248, x2)
+
+inst_444:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333332, -0x5555555555555556, x1, 1256, x2)
+
+inst_445:
+// rs1_val==3689348814741910322 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0xa3d70a3d70a3d70, 0x3333333333333332, 0x5, x1, 1264, x2)
+
+inst_446:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333332, 0x3333333333333333, x1, 1272, x2)
+
+inst_447:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333332, 0x6666666666666666, x1, 1280, x2)
+
+inst_448:
+// rs1_val==3689348814741910322 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x48686148, 0x3333333333333332, -0xb504f333, x1, 1288, x2)
+
+inst_449:
+// rs1_val==3689348814741910322 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x48686148, 0x3333333333333332, 0xb504f333, x1, 1296, x2)
+
+inst_450:
+// rs1_val==3689348814741910322 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x1999999999999999, 0x3333333333333332, 0x2, x1, 1304, x2)
+
+inst_451:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333332, 0x5555555555555554, x1, 1312, x2)
+
+inst_452:
+// rs1_val==3689348814741910322 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x3333333333333332, 0x0, x1, 1320, x2)
+
+inst_453:
+// rs1_val==3689348814741910322 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0xccccccccccccccc, 0x3333333333333332, 0x4, x1, 1328, x2)
+
+inst_454:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x3333333333333332, 0x3333333333333332, x1, 1336, x2)
+
+inst_455:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333332, 0x6666666666666665, x1, 1344, x2)
+
+inst_456:
+// rs1_val==3689348814741910322 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x48686148, 0x3333333333333332, 0xb504f332, x1, 1352, x2)
+
+inst_457:
+// rs1_val==3689348814741910322 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333332, 0x5555555555555556, x1, 1360, x2)
+
+inst_458:
+// rs1_val==3689348814741910322 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333332, -0x5555555555555555, x1, 1368, x2)
+
+inst_459:
+// rs1_val==3689348814741910322 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x888888888888888, 0x3333333333333332, 0x6, x1, 1376, x2)
+
+inst_460:
+// rs1_val==3689348814741910322 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333332, 0x3333333333333334, x1, 1384, x2)
+
+inst_461:
+// rs1_val==3689348814741910322 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333332, 0x6666666666666667, x1, 1392, x2)
+
+inst_462:
+// rs1_val==3689348814741910322 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x48686148, 0x3333333333333332, -0xb504f332, x1, 1400, x2)
+
+inst_463:
+// rs1_val==3689348814741910322 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333332; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x48686147, 0x3333333333333332, 0xb504f334, x1, 1408, x2)
+
+inst_464:
+// rs1_val==7378697629483820645 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x2222222222222221, 0x6666666666666665, 0x3, x1, 1416, x2)
+
+inst_465:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666665, 0x5555555555555555, x1, 1424, x2)
+
+inst_466:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0x6666666666666665, -0x5555555555555556, x1, 1432, x2)
+
+inst_467:
+// rs1_val==7378697629483820645 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x147ae147ae147ae1, 0x6666666666666665, 0x5, x1, 1440, x2)
+
+inst_468:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666665, 0x3333333333333333, x1, 1448, x2)
+
+inst_469:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6666666666666665, 0x6666666666666666, x1, 1456, x2)
+
+inst_470:
+// rs1_val==7378697629483820645 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x90d0c290, 0x6666666666666665, -0xb504f333, x1, 1464, x2)
+
+inst_471:
+// rs1_val==7378697629483820645 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x90d0c290, 0x6666666666666665, 0xb504f333, x1, 1472, x2)
+
+inst_472:
+// rs1_val==7378697629483820645 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x3333333333333332, 0x6666666666666665, 0x2, x1, 1480, x2)
+
+inst_473:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666665, 0x5555555555555554, x1, 1488, x2)
+
+inst_474:
+// rs1_val==7378697629483820645 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x6666666666666665, 0x0, x1, 1496, x2)
+
+inst_475:
+// rs1_val==7378697629483820645 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x1999999999999999, 0x6666666666666665, 0x4, x1, 1504, x2)
+
+inst_476:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x6666666666666665, 0x3333333333333332, x1, 1512, x2)
+
+inst_477:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666665, 0x6666666666666665, x1, 1520, x2)
+
+inst_478:
+// rs1_val==7378697629483820645 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x90d0c291, 0x6666666666666665, 0xb504f332, x1, 1528, x2)
+
+inst_479:
+// rs1_val==7378697629483820645 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666665, 0x5555555555555556, x1, 1536, x2)
+
+inst_480:
+// rs1_val==7378697629483820645 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0x6666666666666665, -0x5555555555555555, x1, 1544, x2)
+
+inst_481:
+// rs1_val==7378697629483820645 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x1111111111111110, 0x6666666666666665, 0x6, x1, 1552, x2)
+
+inst_482:
+// rs1_val==7378697629483820645 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666665, 0x3333333333333334, x1, 1560, x2)
+
+inst_483:
+// rs1_val==7378697629483820645 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6666666666666665, 0x6666666666666667, x1, 1568, x2)
+
+inst_484:
+// rs1_val==7378697629483820645 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x90d0c291, 0x6666666666666665, -0xb504f332, x1, 1576, x2)
+
+inst_485:
+// rs1_val==7378697629483820645 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666665; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x90d0c28f, 0x6666666666666665, 0xb504f334, x1, 1584, x2)
+
+inst_486:
+// rs1_val==3037000498 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x3c56fbbb, 0xb504f332, 0x3, x1, 1592, x2)
+
+inst_487:
+// rs1_val==3037000498 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, 0x5555555555555555, x1, 1600, x2)
+
+inst_488:
+// rs1_val==3037000498 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, -0x5555555555555556, x1, 1608, x2)
+
+inst_489:
+// rs1_val==3037000498 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x243430a3, 0xb504f332, 0x5, x1, 1616, x2)
+
+inst_490:
+// rs1_val==3037000498 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, 0x3333333333333333, x1, 1624, x2)
+
+inst_491:
+// rs1_val==3037000498 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, 0x6666666666666666, x1, 1632, x2)
+
+inst_492:
+// rs1_val==3037000498 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, -0xb504f333, x1, 1640, x2)
+
+inst_493:
+// rs1_val==3037000498 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, 0xb504f333, x1, 1648, x2)
+
+inst_494:
+// rs1_val==3037000498 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x5a827999, 0xb504f332, 0x2, x1, 1656, x2)
+
+inst_495:
+// rs1_val==3037000498 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, 0x5555555555555554, x1, 1664, x2)
+
+inst_496:
+// rs1_val==3037000498 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0xb504f332, 0x0, x1, 1672, x2)
+
+inst_497:
+// rs1_val==3037000498 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x2d413ccc, 0xb504f332, 0x4, x1, 1680, x2)
+
+inst_498:
+// rs1_val==3037000498 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, 0x3333333333333332, x1, 1688, x2)
+
+inst_499:
+// rs1_val==3037000498 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, 0x6666666666666665, x1, 1696, x2)
+
+inst_500:
+// rs1_val==3037000498 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0xb504f332, 0xb504f332, x1, 1704, x2)
+
+inst_501:
+// rs1_val==3037000498 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, 0x5555555555555556, x1, 1712, x2)
+
+inst_502:
+// rs1_val==3037000498 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, -0x5555555555555555, x1, 1720, x2)
+
+inst_503:
+// rs1_val==3037000498 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x1e2b7ddd, 0xb504f332, 0x6, x1, 1728, x2)
+
+inst_504:
+// rs1_val==3037000498 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, 0x3333333333333334, x1, 1736, x2)
+
+inst_505:
+// rs1_val==3037000498 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, 0x6666666666666667, x1, 1744, x2)
+
+inst_506:
+// rs1_val==3037000498 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0xb504f332, -0xb504f332, x1, 1752, x2)
+
+inst_507:
+// rs1_val==3037000498 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f332; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f332, 0xb504f334, x1, 1760, x2)
+
+inst_508:
+// rs1_val==6148914691236517206 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1c71c71c71c71c72, 0x5555555555555556, 0x3, x1, 1768, x2)
+
+inst_509:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555556, 0x5555555555555555, x1, 1776, x2)
+
+inst_510:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0x5555555555555556, -0x5555555555555556, x1, 1784, x2)
+
+inst_511:
+// rs1_val==6148914691236517206 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x1111111111111111, 0x5555555555555556, 0x5, x1, 1792, x2)
+
+inst_512:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555556, 0x3333333333333333, x1, 1800, x2)
+
+inst_513:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555556, 0x6666666666666666, x1, 1808, x2)
+
+inst_514:
+// rs1_val==6148914691236517206 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x78adf778, 0x5555555555555556, -0xb504f333, x1, 1816, x2)
+
+inst_515:
+// rs1_val==6148914691236517206 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x78adf778, 0x5555555555555556, 0xb504f333, x1, 1824, x2)
+
+inst_516:
+// rs1_val==6148914691236517206 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x2aaaaaaaaaaaaaab, 0x5555555555555556, 0x2, x1, 1832, x2)
+
+inst_517:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555556, 0x5555555555555554, x1, 1840, x2)
+
+inst_518:
+// rs1_val==6148914691236517206 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x5555555555555556, 0x0, x1, 1848, x2)
+
+inst_519:
+// rs1_val==6148914691236517206 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x1555555555555555, 0x5555555555555556, 0x4, x1, 1856, x2)
+
+inst_520:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555556, 0x3333333333333332, x1, 1864, x2)
+
+inst_521:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555556, 0x6666666666666665, x1, 1872, x2)
+
+inst_522:
+// rs1_val==6148914691236517206 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x78adf779, 0x5555555555555556, 0xb504f332, x1, 1880, x2)
+
+inst_523:
+// rs1_val==6148914691236517206 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555556, 0x5555555555555556, x1, 1888, x2)
+
+inst_524:
+// rs1_val==6148914691236517206 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0x5555555555555556, -0x5555555555555555, x1, 1896, x2)
+
+inst_525:
+// rs1_val==6148914691236517206 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0xe38e38e38e38e39, 0x5555555555555556, 0x6, x1, 1904, x2)
+
+inst_526:
+// rs1_val==6148914691236517206 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x5555555555555556, 0x3333333333333334, x1, 1912, x2)
+
+inst_527:
+// rs1_val==6148914691236517206 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x5555555555555556, 0x6666666666666667, x1, 1920, x2)
+
+inst_528:
+// rs1_val==6148914691236517206 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x78adf779, 0x5555555555555556, -0xb504f332, x1, 1928, x2)
+
+inst_529:
+// rs1_val==6148914691236517206 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x5555555555555556; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x78adf777, 0x5555555555555556, 0xb504f334, x1, 1936, x2)
+
+inst_530:
+// rs1_val==-6148914691236517205 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, -0x1c71c71c71c71c71, -0x5555555555555555, 0x3, x1, 1944, x2)
+
+inst_531:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0x5555555555555555, 0x5555555555555555, x1, 1952, x2)
+
+inst_532:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x5555555555555555, -0x5555555555555556, x1, 1960, x2)
+
+inst_533:
+// rs1_val==-6148914691236517205 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, -0x1111111111111111, -0x5555555555555555, 0x5, x1, 1968, x2)
+
+inst_534:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0x5555555555555555, 0x3333333333333333, x1, 1976, x2)
+
+inst_535:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x5555555555555555, 0x6666666666666666, x1, 1984, x2)
+
+inst_536:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x78adf778, -0x5555555555555555, -0xb504f333, x1, 1992, x2)
+
+inst_537:
+// rs1_val==-6148914691236517205 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x78adf778, -0x5555555555555555, 0xb504f333, x1, 2000, x2)
+
+inst_538:
+// rs1_val==-6148914691236517205 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, -0x2aaaaaaaaaaaaaaa, -0x5555555555555555, 0x2, x1, 2008, x2)
+
+inst_539:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0x5555555555555555, 0x5555555555555554, x1, 2016, x2)
+
+inst_540:
+// rs1_val==-6148914691236517205 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, -0x5555555555555555, 0x0, x1, 2024, x2)
+
+inst_541:
+// rs1_val==-6148914691236517205 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, -0x1555555555555555, -0x5555555555555555, 0x4, x1, 2032, x2)
+
+inst_542:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0x5555555555555555, 0x3333333333333332, x1, 2040, x2)
+RVTEST_SIGBASE( x1,signature_x1_2)
+
+inst_543:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x5555555555555555, 0x6666666666666665, x1, 0, x2)
+
+inst_544:
+// rs1_val==-6148914691236517205 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x78adf779, -0x5555555555555555, 0xb504f332, x1, 8, x2)
+
+inst_545:
+// rs1_val==-6148914691236517205 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x5555555555555555, 0x5555555555555556, x1, 16, x2)
+
+inst_546:
+// rs1_val==-6148914691236517205 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0x5555555555555555, -0x5555555555555555, x1, 24, x2)
+
+inst_547:
+// rs1_val==-6148914691236517205 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, -0xe38e38e38e38e38, -0x5555555555555555, 0x6, x1, 32, x2)
+
+inst_548:
+// rs1_val==-6148914691236517205 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0x5555555555555555, 0x3333333333333334, x1, 40, x2)
+
+inst_549:
+// rs1_val==-6148914691236517205 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0x5555555555555555, 0x6666666666666667, x1, 48, x2)
+
+inst_550:
+// rs1_val==-6148914691236517205 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x78adf779, -0x5555555555555555, -0xb504f332, x1, 56, x2)
+
+inst_551:
+// rs1_val==-6148914691236517205 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0x5555555555555555; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, -0x78adf777, -0x5555555555555555, 0xb504f334, x1, 64, x2)
+
+inst_552:
+// rs1_val==6 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x6, 0x3, x1, 72, x2)
+
+inst_553:
+// rs1_val==6 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x5555555555555555, x1, 80, x2)
+
+inst_554:
+// rs1_val==6 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, -0x5555555555555556, x1, 88, x2)
+
+inst_555:
+// rs1_val==6 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6, 0x5, x1, 96, x2)
+
+inst_556:
+// rs1_val==6 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x3333333333333333, x1, 104, x2)
+
+inst_557:
+// rs1_val==6 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x6666666666666666, x1, 112, x2)
+
+inst_558:
+// rs1_val==6 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, -0xb504f333, x1, 120, x2)
+
+inst_559:
+// rs1_val==6 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0xb504f333, x1, 128, x2)
+
+inst_560:
+// rs1_val==6 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x3, 0x6, 0x2, x1, 136, x2)
+
+inst_561:
+// rs1_val==6 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x5555555555555554, x1, 144, x2)
+
+inst_562:
+// rs1_val==6 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x6, 0x0, x1, 152, x2)
+
+inst_563:
+// rs1_val==6 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6, 0x4, x1, 160, x2)
+
+inst_564:
+// rs1_val==6 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x3333333333333332, x1, 168, x2)
+
+inst_565:
+// rs1_val==6 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x6666666666666665, x1, 176, x2)
+
+inst_566:
+// rs1_val==6 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0xb504f332, x1, 184, x2)
+
+inst_567:
+// rs1_val==6 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x5555555555555556, x1, 192, x2)
+
+inst_568:
+// rs1_val==6 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, -0x5555555555555555, x1, 200, x2)
+
+inst_569:
+// rs1_val==6 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6, 0x6, x1, 208, x2)
+
+inst_570:
+// rs1_val==6 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x3333333333333334, x1, 216, x2)
+
+inst_571:
+// rs1_val==6 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0x6666666666666667, x1, 224, x2)
+
+inst_572:
+// rs1_val==6 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, -0xb504f332, x1, 232, x2)
+
+inst_573:
+// rs1_val==6 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x6, 0xb504f334, x1, 240, x2)
+
+inst_574:
+// rs1_val==3689348814741910324 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x1111111111111111, 0x3333333333333334, 0x3, x1, 248, x2)
+
+inst_575:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333334, 0x5555555555555555, x1, 256, x2)
+
+inst_576:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333334, -0x5555555555555556, x1, 264, x2)
+
+inst_577:
+// rs1_val==3689348814741910324 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0xa3d70a3d70a3d70, 0x3333333333333334, 0x5, x1, 272, x2)
+
+inst_578:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x3333333333333334, 0x3333333333333333, x1, 280, x2)
+
+inst_579:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333334, 0x6666666666666666, x1, 288, x2)
+
+inst_580:
+// rs1_val==3689348814741910324 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x48686148, 0x3333333333333334, -0xb504f333, x1, 296, x2)
+
+inst_581:
+// rs1_val==3689348814741910324 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x48686148, 0x3333333333333334, 0xb504f333, x1, 304, x2)
+
+inst_582:
+// rs1_val==3689348814741910324 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x199999999999999a, 0x3333333333333334, 0x2, x1, 312, x2)
+
+inst_583:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333334, 0x5555555555555554, x1, 320, x2)
+
+inst_584:
+// rs1_val==3689348814741910324 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x3333333333333334, 0x0, x1, 328, x2)
+
+inst_585:
+// rs1_val==3689348814741910324 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0xccccccccccccccd, 0x3333333333333334, 0x4, x1, 336, x2)
+
+inst_586:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x3333333333333334, 0x3333333333333332, x1, 344, x2)
+
+inst_587:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333334, 0x6666666666666665, x1, 352, x2)
+
+inst_588:
+// rs1_val==3689348814741910324 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x48686148, 0x3333333333333334, 0xb504f332, x1, 360, x2)
+
+inst_589:
+// rs1_val==3689348814741910324 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333334, 0x5555555555555556, x1, 368, x2)
+
+inst_590:
+// rs1_val==3689348814741910324 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333334, -0x5555555555555555, x1, 376, x2)
+
+inst_591:
+// rs1_val==3689348814741910324 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x888888888888888, 0x3333333333333334, 0x6, x1, 384, x2)
+
+inst_592:
+// rs1_val==3689348814741910324 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x3333333333333334, 0x3333333333333334, x1, 392, x2)
+
+inst_593:
+// rs1_val==3689348814741910324 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x3333333333333334, 0x6666666666666667, x1, 400, x2)
+
+inst_594:
+// rs1_val==3689348814741910324 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x48686148, 0x3333333333333334, -0xb504f332, x1, 408, x2)
+
+inst_595:
+// rs1_val==3689348814741910324 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x3333333333333334; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x48686147, 0x3333333333333334, 0xb504f334, x1, 416, x2)
+
+inst_596:
+// rs1_val==7378697629483820647 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x2222222222222222, 0x6666666666666667, 0x3, x1, 424, x2)
+
+inst_597:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666667, 0x5555555555555555, x1, 432, x2)
+
+inst_598:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0x6666666666666667, -0x5555555555555556, x1, 440, x2)
+
+inst_599:
+// rs1_val==7378697629483820647 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x147ae147ae147ae1, 0x6666666666666667, 0x5, x1, 448, x2)
+
+inst_600:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x6666666666666667, 0x3333333333333333, x1, 456, x2)
+
+inst_601:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666667, 0x6666666666666666, x1, 464, x2)
+
+inst_602:
+// rs1_val==7378697629483820647 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x90d0c290, 0x6666666666666667, -0xb504f333, x1, 472, x2)
+
+inst_603:
+// rs1_val==7378697629483820647 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x90d0c290, 0x6666666666666667, 0xb504f333, x1, 480, x2)
+
+inst_604:
+// rs1_val==7378697629483820647 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x3333333333333333, 0x6666666666666667, 0x2, x1, 488, x2)
+
+inst_605:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666667, 0x5555555555555554, x1, 496, x2)
+
+inst_606:
+// rs1_val==7378697629483820647 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x6666666666666667, 0x0, x1, 504, x2)
+
+inst_607:
+// rs1_val==7378697629483820647 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x1999999999999999, 0x6666666666666667, 0x4, x1, 512, x2)
+
+inst_608:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x2, 0x6666666666666667, 0x3333333333333332, x1, 520, x2)
+
+inst_609:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666667, 0x6666666666666665, x1, 528, x2)
+
+inst_610:
+// rs1_val==7378697629483820647 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x90d0c291, 0x6666666666666667, 0xb504f332, x1, 536, x2)
+
+inst_611:
+// rs1_val==7378697629483820647 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666667, 0x5555555555555556, x1, 544, x2)
+
+inst_612:
+// rs1_val==7378697629483820647 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0x6666666666666667, -0x5555555555555555, x1, 552, x2)
+
+inst_613:
+// rs1_val==7378697629483820647 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x1111111111111111, 0x6666666666666667, 0x6, x1, 560, x2)
+
+inst_614:
+// rs1_val==7378697629483820647 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666667, 0x3333333333333334, x1, 568, x2)
+
+inst_615:
+// rs1_val==7378697629483820647 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0x6666666666666667, 0x6666666666666667, x1, 576, x2)
+
+inst_616:
+// rs1_val==7378697629483820647 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x90d0c291, 0x6666666666666667, -0xb504f332, x1, 584, x2)
+
+inst_617:
+// rs1_val==7378697629483820647 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x6666666666666667; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x90d0c28f, 0x6666666666666667, 0xb504f334, x1, 592, x2)
+
+inst_618:
+// rs1_val==-3037000498 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, -0x3c56fbbb, -0xb504f332, 0x3, x1, 600, x2)
+
+inst_619:
+// rs1_val==-3037000498 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, 0x5555555555555555, x1, 608, x2)
+
+inst_620:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, -0x5555555555555556, x1, 616, x2)
+
+inst_621:
+// rs1_val==-3037000498 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, -0x243430a3, -0xb504f332, 0x5, x1, 624, x2)
+
+inst_622:
+// rs1_val==-3037000498 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, 0x3333333333333333, x1, 632, x2)
+
+inst_623:
+// rs1_val==-3037000498 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, 0x6666666666666666, x1, 640, x2)
+
+inst_624:
+// rs1_val==-3037000498 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, -0xb504f333, x1, 648, x2)
+
+inst_625:
+// rs1_val==-3037000498 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, 0xb504f333, x1, 656, x2)
+
+inst_626:
+// rs1_val==-3037000498 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, -0x5a827999, -0xb504f332, 0x2, x1, 664, x2)
+
+inst_627:
+// rs1_val==-3037000498 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, 0x5555555555555554, x1, 672, x2)
+
+inst_628:
+// rs1_val==-3037000498 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, -0xb504f332, 0x0, x1, 680, x2)
+
+inst_629:
+// rs1_val==-3037000498 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, -0x2d413ccc, -0xb504f332, 0x4, x1, 688, x2)
+
+inst_630:
+// rs1_val==-3037000498 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, 0x3333333333333332, x1, 696, x2)
+
+inst_631:
+// rs1_val==-3037000498 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, 0x6666666666666665, x1, 704, x2)
+
+inst_632:
+// rs1_val==-3037000498 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x1, -0xb504f332, 0xb504f332, x1, 712, x2)
+
+inst_633:
+// rs1_val==-3037000498 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, 0x5555555555555556, x1, 720, x2)
+
+inst_634:
+// rs1_val==-3037000498 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, -0x5555555555555555, x1, 728, x2)
+
+inst_635:
+// rs1_val==-3037000498 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, -0x1e2b7ddd, -0xb504f332, 0x6, x1, 736, x2)
+
+inst_636:
+// rs1_val==-3037000498 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, 0x3333333333333334, x1, 744, x2)
+
+inst_637:
+// rs1_val==-3037000498 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, 0x6666666666666667, x1, 752, x2)
+
+inst_638:
+// rs1_val==-3037000498 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x1, -0xb504f332, -0xb504f332, x1, 760, x2)
+
+inst_639:
+// rs1_val==-3037000498 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:-0xb504f332; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x0, -0xb504f332, 0xb504f334, x1, 768, x2)
+
+inst_640:
+// rs1_val==3037000500 and rs2_val==3,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3
+TEST_RR_OP(div, x12, x10, x11, 0x3c56fbbc, 0xb504f334, 0x3, x1, 776, x2)
+
+inst_641:
+// rs1_val==3037000500 and rs2_val==6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f334, 0x5555555555555555, x1, 784, x2)
+
+inst_642:
+// rs1_val==3037000500 and rs2_val==-6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f334, -0x5555555555555556, x1, 792, x2)
+
+inst_643:
+// rs1_val==3037000500 and rs2_val==5,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5
+TEST_RR_OP(div, x12, x10, x11, 0x243430a4, 0xb504f334, 0x5, x1, 800, x2)
+
+inst_644:
+// rs1_val==3037000500 and rs2_val==3689348814741910323,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f334, 0x3333333333333333, x1, 808, x2)
+
+inst_645:
+// rs1_val==3037000500 and rs2_val==7378697629483820646,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666666
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f334, 0x6666666666666666, x1, 816, x2)
+
+inst_646:
+// rs1_val==3037000500 and rs2_val==-3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f333
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0xb504f334, -0xb504f333, x1, 824, x2)
+
+inst_647:
+// rs1_val==3037000500 and rs2_val==3037000499,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f333
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0xb504f334, 0xb504f333, x1, 832, x2)
+
+inst_648:
+// rs1_val==3037000500 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x5a82799a, 0xb504f334, 0x2, x1, 840, x2)
+
+inst_649:
+// rs1_val==3037000500 and rs2_val==6148914691236517204,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555554
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f334, 0x5555555555555554, x1, 848, x2)
+
+inst_650:
+// rs1_val==3037000500 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0xb504f334, 0x0, x1, 856, x2)
+
+inst_651:
+// rs1_val==3037000500 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x2d413ccd, 0xb504f334, 0x4, x1, 864, x2)
+
+inst_652:
+// rs1_val==3037000500 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f334, 0x3333333333333332, x1, 872, x2)
+
+inst_653:
+// rs1_val==3037000500 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f334, 0x6666666666666665, x1, 880, x2)
+
+inst_654:
+// rs1_val==3037000500 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0xb504f334, 0xb504f332, x1, 888, x2)
+
+inst_655:
+// rs1_val==3037000500 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f334, 0x5555555555555556, x1, 896, x2)
+
+inst_656:
+// rs1_val==3037000500 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f334, -0x5555555555555555, x1, 904, x2)
+
+inst_657:
+// rs1_val==3037000500 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x1e2b7dde, 0xb504f334, 0x6, x1, 912, x2)
+
+inst_658:
+// rs1_val==3037000500 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f334, 0x3333333333333334, x1, 920, x2)
+
+inst_659:
+// rs1_val==3037000500 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0xb504f334, 0x6666666666666667, x1, 928, x2)
+
+inst_660:
+// rs1_val==3037000500 and rs2_val==-3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:-0xb504f332
+TEST_RR_OP(div, x12, x10, x11, -0x1, 0xb504f334, -0xb504f332, x1, 936, x2)
+
+inst_661:
+// rs1_val==3037000500 and rs2_val==3037000500,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0xb504f334; op2val:0xb504f334
+TEST_RR_OP(div, x12, x10, x11, 0x1, 0xb504f334, 0xb504f334, x1, 944, x2)
+
+inst_662:
+// rs1_val==0 and rs2_val==2,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x2
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x2, x1, 952, x2)
+
+inst_663:
+// rs1_val==0 and rs2_val==0,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x0
+TEST_RR_OP(div, x12, x10, x11, 0xFFFFFFFFFFFFFFFF, 0x0, 0x0, x1, 960, x2)
+
+inst_664:
+// rs1_val==0 and rs2_val==4,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x4
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x4, x1, 968, x2)
+
+inst_665:
+// rs1_val==0 and rs2_val==3689348814741910322,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x3333333333333332, x1, 976, x2)
+
+inst_666:
+// rs1_val==0 and rs2_val==7378697629483820645,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666665
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x6666666666666665, x1, 984, x2)
+
+inst_667:
+// rs1_val==0 and rs2_val==3037000498,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0xb504f332
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0xb504f332, x1, 992, x2)
+
+inst_668:
+// rs1_val==0 and rs2_val==6148914691236517206,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x5555555555555556
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x5555555555555556, x1, 1000, x2)
+
+inst_669:
+// rs1_val==0 and rs2_val==-6148914691236517205,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:-0x5555555555555555
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, -0x5555555555555555, x1, 1008, x2)
+
+inst_670:
+// rs1_val==0 and rs2_val==6,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x6, x1, 1016, x2)
+
+inst_671:
+// rs1_val==0 and rs2_val==3689348814741910324,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x3333333333333334
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x3333333333333334, x1, 1024, x2)
+
+inst_672:
+// rs1_val==0 and rs2_val==7378697629483820647,
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x0; op2val:0x6666666666666667
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x0, 0x6666666666666667, x1, 1032, x2)
+
+inst_673:
+// rs1_val > 0 and rs2_val > 0, rs1_val == 8, rs1_val != rs2_val
+// opcode: div ; op1:x10; op2:x11; dest:x12; op1val:0x8; op2val:0x3333333333333333
+TEST_RR_OP(div, x12, x10, x11, 0x0, 0x8, 0x3333333333333333, x1, 1040, x2)
+
+inst_674:
+// rs1_val > 0 and rs2_val <